From 163d3fe6a2357aba7b18b938d6ae6ce9570324e4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 25 May 2011 11:09:59 +0200 Subject: kbuild: Fix reference to vermagic.h It's "include/linux/vermagic.h", not "include/vermagic.h" Signed-off-by: Geert Uytterhoeven Signed-off-by: Michal Marek diff --git a/scripts/Makefile.modpost b/scripts/Makefile.modpost index 7d22056..6ba4332 100644 --- a/scripts/Makefile.modpost +++ b/scripts/Makefile.modpost @@ -18,7 +18,7 @@ # Step 3 is used to place certain information in the module's ELF # section, including information such as: -# Version magic (see include/vermagic.h for full details) +# Version magic (see include/linux/vermagic.h for full details) # - Kernel release # - SMP is CONFIG_SMP # - PREEMPT is CONFIG_PREEMPT -- cgit v0.10.2 From 988acec9ee9d8b38ca0d1187d904cb53588e8c64 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Wed, 25 May 2011 15:12:20 +0300 Subject: hwrng: fix spelling mistake in header comment Cc: Herbert Xu Cc: Matt Mackall Signed-off-by: Sasha Levin Signed-off-by: Jiri Kosina diff --git a/include/linux/hw_random.h b/include/linux/hw_random.h index 9bede76..b4b0eef 100644 --- a/include/linux/hw_random.h +++ b/include/linux/hw_random.h @@ -25,7 +25,7 @@ * there is always data available. *OBSOLETE* * @data_read: Read data from the RNG device. * Returns the number of lower random bytes in "data". - * Must not be NULL. *OSOLETE* + * Must not be NULL. *OBSOLETE* * @read: New API. drivers can fill up to max bytes of data * into the buffer. The buffer is aligned for any type. * @priv: Private data, for use by the RNG driver. -- cgit v0.10.2 From 796d5116c407690b14fd5bda136aa67a39e7061a Mon Sep 17 00:00:00 2001 From: Jeff Moyer Date: Thu, 2 Jun 2011 21:19:05 +0200 Subject: iosched: prevent aliased requests from starving other I/O Hi, Jens, If you recall, I posted an RFC patch for this back in July of last year: http://lkml.org/lkml/2010/7/13/279 The basic problem is that a process can issue a never-ending stream of async direct I/Os to the same sector on a device, thus starving out other I/O in the system (due to the way the alias handling works in both cfq and deadline). The solution I proposed back then was to start dispatching from the fifo after a certain number of aliases had been dispatched. Vivek asked why we had to treat aliases differently at all, and I never had a good answer. So, I put together a simple patch which allows aliases to be added to the rb tree (it adds them to the right, though that doesn't matter as the order isn't guaranteed anyway). I think this is the preferred solution, as it doesn't break up time slices in CFQ or batches in deadline. I've tested it, and it does solve the starvation issue. Let me know what you think. Cheers, Jeff Signed-off-by: Jeff Moyer Signed-off-by: Jens Axboe diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 7c52d68..a2fb14b 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -1501,16 +1501,11 @@ static void cfq_add_rq_rb(struct request *rq) { struct cfq_queue *cfqq = RQ_CFQQ(rq); struct cfq_data *cfqd = cfqq->cfqd; - struct request *__alias, *prev; + struct request *prev; cfqq->queued[rq_is_sync(rq)]++; - /* - * looks a little odd, but the first insert might return an alias. - * if that happens, put the alias on the dispatch list - */ - while ((__alias = elv_rb_add(&cfqq->sort_list, rq)) != NULL) - cfq_dispatch_insert(cfqd->queue, __alias); + elv_rb_add(&cfqq->sort_list, rq); if (!cfq_cfqq_on_rr(cfqq)) cfq_add_cfqq_rr(cfqd, cfqq); diff --git a/block/deadline-iosched.c b/block/deadline-iosched.c index 5139c0e..c644137 100644 --- a/block/deadline-iosched.c +++ b/block/deadline-iosched.c @@ -77,10 +77,8 @@ static void deadline_add_rq_rb(struct deadline_data *dd, struct request *rq) { struct rb_root *root = deadline_rb_root(dd, rq); - struct request *__alias; - while (unlikely(__alias = elv_rb_add(root, rq))) - deadline_move_request(dd, __alias); + elv_rb_add(root, rq); } static inline void diff --git a/block/elevator.c b/block/elevator.c index b0b38ce..a3b64bc 100644 --- a/block/elevator.c +++ b/block/elevator.c @@ -353,7 +353,7 @@ static struct request *elv_rqhash_find(struct request_queue *q, sector_t offset) * RB-tree support functions for inserting/lookup/removal of requests * in a sorted RB tree. */ -struct request *elv_rb_add(struct rb_root *root, struct request *rq) +void elv_rb_add(struct rb_root *root, struct request *rq) { struct rb_node **p = &root->rb_node; struct rb_node *parent = NULL; @@ -365,15 +365,12 @@ struct request *elv_rb_add(struct rb_root *root, struct request *rq) if (blk_rq_pos(rq) < blk_rq_pos(__rq)) p = &(*p)->rb_left; - else if (blk_rq_pos(rq) > blk_rq_pos(__rq)) + else if (blk_rq_pos(rq) >= blk_rq_pos(__rq)) p = &(*p)->rb_right; - else - return __rq; } rb_link_node(&rq->rb_node, parent, p); rb_insert_color(&rq->rb_node, root); - return NULL; } EXPORT_SYMBOL(elv_rb_add); diff --git a/include/linux/elevator.h b/include/linux/elevator.h index 21a8ebf..d800d51 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h @@ -146,7 +146,7 @@ extern struct request *elv_rb_latter_request(struct request_queue *, struct requ /* * rb support functions. */ -extern struct request *elv_rb_add(struct rb_root *, struct request *); +extern void elv_rb_add(struct rb_root *, struct request *); extern void elv_rb_del(struct rb_root *, struct request *); extern struct request *elv_rb_find(struct rb_root *, sector_t); -- cgit v0.10.2 From f5960b698eb50a39fce1a066dc19a6a5a1148e16 Mon Sep 17 00:00:00 2001 From: Matt Evans Date: Wed, 1 Jun 2011 10:22:55 +1000 Subject: xhci: Remove some unnecessary casts and tidy some endian swap code Some of the recently-added cpu_to_leXX and leXX_to_cpu made things somewhat messy; this patch neatens some of these areas, removing unnecessary casts in those parts also. In some places (where Y & Z are constants) a comparison of (leXX_to_cpu(X) & Y) == Z has been replaced with (X & cpu_to_leXX(Y)) == cpu_to_leXX(Z). The endian reversal of the constants should wash out at compile time. Signed-off-by: Matt Evans Signed-off-by: Sarah Sharp diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index 2e04861..17d3e35 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c @@ -266,11 +266,11 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) xhci_dbg(xhci, "Interrupter target = 0x%x\n", GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target))); xhci_dbg(xhci, "Cycle bit = %u\n", - (unsigned int) (le32_to_cpu(trb->link.control) & TRB_CYCLE)); + le32_to_cpu(trb->link.control) & TRB_CYCLE); xhci_dbg(xhci, "Toggle cycle bit = %u\n", - (unsigned int) (le32_to_cpu(trb->link.control) & LINK_TOGGLE)); + le32_to_cpu(trb->link.control) & LINK_TOGGLE); xhci_dbg(xhci, "No Snoop bit = %u\n", - (unsigned int) (le32_to_cpu(trb->link.control) & TRB_NO_SNOOP)); + le32_to_cpu(trb->link.control) & TRB_NO_SNOOP); break; case TRB_TYPE(TRB_TRANSFER): address = le64_to_cpu(trb->trans_event.buffer); @@ -284,9 +284,9 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) address = le64_to_cpu(trb->event_cmd.cmd_trb); xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); xhci_dbg(xhci, "Completion status = %u\n", - (unsigned int) GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status))); + GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status))); xhci_dbg(xhci, "Flags = 0x%x\n", - (unsigned int) le32_to_cpu(trb->event_cmd.flags)); + le32_to_cpu(trb->event_cmd.flags)); break; default: xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", @@ -318,10 +318,10 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) for (i = 0; i < TRBS_PER_SEGMENT; ++i) { trb = &seg->trbs[i]; xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr, - (u32)lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), - (u32)upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), - (unsigned int) le32_to_cpu(trb->link.intr_target), - (unsigned int) le32_to_cpu(trb->link.control)); + lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), + upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), + le32_to_cpu(trb->link.intr_target), + le32_to_cpu(trb->link.control)); addr += sizeof(*trb); } } @@ -402,8 +402,8 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst) addr, lower_32_bits(le64_to_cpu(entry->seg_addr)), upper_32_bits(le64_to_cpu(entry->seg_addr)), - (unsigned int) le32_to_cpu(entry->seg_size), - (unsigned int) le32_to_cpu(entry->rsvd)); + le32_to_cpu(entry->seg_size), + le32_to_cpu(entry->rsvd)); addr += sizeof(*entry); } } diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 26caba4..596d8fb 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -89,8 +89,8 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, return; prev->next = next; if (link_trbs) { - prev->trbs[TRBS_PER_SEGMENT-1].link. - segment_ptr = cpu_to_le64(next->dma); + prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = + cpu_to_le64(next->dma); /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control); @@ -187,8 +187,8 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, if (link_trbs) { /* See section 4.9.2.1 and 6.4.4.1 */ - prev->trbs[TRBS_PER_SEGMENT-1].link. - control |= cpu_to_le32(LINK_TOGGLE); + prev->trbs[TRBS_PER_SEGMENT-1].link.control |= + cpu_to_le32(LINK_TOGGLE); xhci_dbg(xhci, "Wrote link toggle flag to" " segment %p (virtual), 0x%llx (DMA)\n", prev, (unsigned long long)prev->dma); @@ -549,8 +549,8 @@ struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci, addr = cur_ring->first_seg->dma | SCT_FOR_CTX(SCT_PRI_TR) | cur_ring->cycle_state; - stream_info->stream_ctx_array[cur_stream]. - stream_ring = cpu_to_le64(addr); + stream_info->stream_ctx_array[cur_stream].stream_ring = + cpu_to_le64(addr); xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", cur_stream, (unsigned long long) addr); @@ -786,7 +786,7 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", slot_id, &xhci->dcbaa->dev_context_ptrs[slot_id], - (unsigned long long) le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); + le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); return 1; fail: @@ -890,19 +890,19 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); /* 3) Only the control endpoint is valid - one endpoint context */ - slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | (u32) udev->route); + slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route); switch (udev->speed) { case USB_SPEED_SUPER: - slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_SS); + slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); break; case USB_SPEED_HIGH: - slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_HS); + slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS); break; case USB_SPEED_FULL: - slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_FS); + slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS); break; case USB_SPEED_LOW: - slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_LS); + slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); break; case USB_SPEED_WIRELESS: xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); @@ -916,7 +916,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud port_num = xhci_find_real_port_number(xhci, udev); if (!port_num) return -EINVAL; - slot_ctx->dev_info2 |= cpu_to_le32((u32) ROOT_HUB_PORT(port_num)); + slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num)); /* Set the port number in the virtual_device to the faked port number */ for (top_dev = udev; top_dev->parent && top_dev->parent->parent; top_dev = top_dev->parent) diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index cc1485b..4b40e4c 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -113,15 +113,13 @@ static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, if (ring == xhci->event_ring) return trb == &seg->trbs[TRBS_PER_SEGMENT]; else - return (le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK) - == TRB_TYPE(TRB_LINK); + return TRB_TYPE_LINK_LE32(trb->link.control); } static int enqueue_is_link_trb(struct xhci_ring *ring) { struct xhci_link_trb *link = &ring->enqueue->link; - return ((le32_to_cpu(link->control) & TRB_TYPE_BITMASK) == - TRB_TYPE(TRB_LINK)); + return TRB_TYPE_LINK_LE32(link->control); } /* Updates trb to point to the next TRB in the ring, and updates seg if the next @@ -372,7 +370,7 @@ static struct xhci_segment *find_trb_seg( while (cur_seg->trbs > trb || &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) { generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic; - if (le32_to_cpu(generic_trb->field[3]) & LINK_TOGGLE) + if (generic_trb->field[3] & cpu_to_le32(LINK_TOGGLE)) *cycle_state ^= 0x1; cur_seg = cur_seg->next; if (cur_seg == start_seg) @@ -489,8 +487,8 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, } trb = &state->new_deq_ptr->generic; - if ((le32_to_cpu(trb->field[3]) & TRB_TYPE_BITMASK) == - TRB_TYPE(TRB_LINK) && (le32_to_cpu(trb->field[3]) & LINK_TOGGLE)) + if (TRB_TYPE_LINK_LE32(trb->field[3]) && + (trb->field[3] & cpu_to_le32(LINK_TOGGLE))) state->new_cycle_state ^= 0x1; next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); @@ -525,8 +523,7 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb; true; next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { - if ((le32_to_cpu(cur_trb->generic.field[3]) & TRB_TYPE_BITMASK) - == TRB_TYPE(TRB_LINK)) { + if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) { /* Unchain any chained Link TRBs, but * leave the pointers intact. */ @@ -1000,7 +997,7 @@ static void handle_reset_ep_completion(struct xhci_hcd *xhci, * but we don't care. */ xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n", - (unsigned int) GET_COMP_CODE(le32_to_cpu(event->status))); + GET_COMP_CODE(le32_to_cpu(event->status))); /* HW with the reset endpoint quirk needs to have a configure endpoint * command complete before the endpoint can be used. Queue that here @@ -1458,7 +1455,8 @@ static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci, * endpoint anyway. Check if a babble halted the * endpoint. */ - if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == EP_STATE_HALTED) + if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == + cpu_to_le32(EP_STATE_HALTED)) return 1; return 0; @@ -1752,10 +1750,8 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg; cur_trb != event_trb; next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { - if ((le32_to_cpu(cur_trb->generic.field[3]) & - TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && - (le32_to_cpu(cur_trb->generic.field[3]) & - TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) + if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) && + !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); } len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - @@ -1888,10 +1884,8 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg; cur_trb != event_trb; next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { - if ((le32_to_cpu(cur_trb->generic.field[3]) & - TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && - (le32_to_cpu(cur_trb->generic.field[3]) & - TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) + if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) && + !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) td->urb->actual_length += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); } @@ -2046,8 +2040,8 @@ static int handle_tx_event(struct xhci_hcd *xhci, TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), ep_index); xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", - (unsigned int) (le32_to_cpu(event->flags) - & TRB_TYPE_BITMASK)>>10); + (le32_to_cpu(event->flags) & + TRB_TYPE_BITMASK)>>10); xhci_print_trb_offsets(xhci, (union xhci_trb *) event); if (ep->skip) { ep->skip = false; @@ -2104,9 +2098,7 @@ static int handle_tx_event(struct xhci_hcd *xhci, * corresponding TD has been cancelled. Just ignore * the TD. */ - if ((le32_to_cpu(event_trb->generic.field[3]) - & TRB_TYPE_BITMASK) - == TRB_TYPE(TRB_TR_NOOP)) { + if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) { xhci_dbg(xhci, "event_trb is a no-op TRB. Skip it\n"); goto cleanup; @@ -2432,7 +2424,7 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, next->link.control |= cpu_to_le32(TRB_CHAIN); wmb(); - next->link.control ^= cpu_to_le32((u32) TRB_CYCLE); + next->link.control ^= cpu_to_le32(TRB_CYCLE); /* Toggle the cycle bit after the last ring segment. */ if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index d9660eb..743cf80 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -1333,8 +1333,8 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, /* If the HC already knows the endpoint is disabled, * or the HCD has noted it is disabled, ignore this request */ - if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == - EP_STATE_DISABLED || + if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == + cpu_to_le32(EP_STATE_DISABLED)) || le32_to_cpu(ctrl_ctx->drop_flags) & xhci_get_endpoint_flag(&ep->desc)) { xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", @@ -1725,8 +1725,7 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci, /* Enqueue pointer can be left pointing to the link TRB, * we must handle that */ - if ((le32_to_cpu(command->command_trb->link.control) - & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) + if (TRB_TYPE_LINK_LE32(command->command_trb->link.control)) command->command_trb = xhci->cmd_ring->enq_seg->next->trbs; @@ -2519,8 +2518,7 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) /* Enqueue pointer can be left pointing to the link TRB, * we must handle that */ - if ((le32_to_cpu(reset_device_cmd->command_trb->link.control) - & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) + if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control)) reset_device_cmd->command_trb = xhci->cmd_ring->enq_seg->next->trbs; diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index ac0196e..f9098a2 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1065,6 +1065,13 @@ union xhci_trb { /* Get NEC firmware revision. */ #define TRB_NEC_GET_FW 49 +#define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) +/* Above, but for __le32 types -- can avoid work by swapping constants: */ +#define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ + cpu_to_le32(TRB_TYPE(TRB_LINK))) +#define TRB_TYPE_NOOP_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ + cpu_to_le32(TRB_TYPE(TRB_TR_NOOP))) + #define NEC_FW_MINOR(p) (((p) >> 0) & 0xff) #define NEC_FW_MAJOR(p) (((p) >> 8) & 0xff) -- cgit v0.10.2 From 9b50902db5eb8a220160fb89e95aa11967998d12 Mon Sep 17 00:00:00 2001 From: Jens Axboe Date: Sun, 5 Jun 2011 06:01:13 +0200 Subject: cfq-iosched: fix locking around ioc->ioc_data assignment Since we are modifying this RCU pointer, we need to hold the lock protecting it around it. This fixes a potential reuse and double free of a cfq io_context structure. The bug has been in CFQ for a long time, it hit very few people but those it did hit seemed to see it a lot. Tracked in RH bugzilla here: https://bugzilla.redhat.com/show_bug.cgi?id=577968 Credit goes to Paul Bolle for figuring out that the issue was around the one-hit ioc->ioc_data cache. Thanks to his hard work the issue is now fixed. Cc: stable@kernel.org Signed-off-by: Jens Axboe diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index a2fb14b..000719c 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -2767,8 +2767,11 @@ static void __cfq_exit_single_io_context(struct cfq_data *cfqd, smp_wmb(); cic->key = cfqd_dead_key(cfqd); - if (ioc->ioc_data == cic) + if (rcu_dereference(ioc->ioc_data) == cic) { + spin_lock(&ioc->lock); rcu_assign_pointer(ioc->ioc_data, NULL); + spin_unlock(&ioc->lock); + } if (cic->cfqq[BLK_RW_ASYNC]) { cfq_exit_cfqq(cfqd, cic->cfqq[BLK_RW_ASYNC]); -- cgit v0.10.2 From 8aea45451b252e4be09ee9974c5658bb47c81625 Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Mon, 6 Jun 2011 05:07:54 +0200 Subject: CFQ: make two functions static Correctly suggested by sparse. Signed-off-by: Paul Bolle Signed-off-by: Jens Axboe diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 000719c..2b2d7a9 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -1004,8 +1004,8 @@ static inline struct cfq_group *cfqg_of_blkg(struct blkio_group *blkg) return NULL; } -void cfq_update_blkio_group_weight(void *key, struct blkio_group *blkg, - unsigned int weight) +static void cfq_update_blkio_group_weight(void *key, struct blkio_group *blkg, + unsigned int weight) { struct cfq_group *cfqg = cfqg_of_blkg(blkg); cfqg->new_weight = weight; @@ -1234,7 +1234,7 @@ static void cfq_release_cfq_groups(struct cfq_data *cfqd) * it should not be NULL as even if elevator was exiting, cgroup deltion * path got to it first. */ -void cfq_unlink_blkio_group(void *key, struct blkio_group *blkg) +static void cfq_unlink_blkio_group(void *key, struct blkio_group *blkg) { unsigned long flags; struct cfq_data *cfqd = key; -- cgit v0.10.2 From df4156569d4ace581bd1581e7aa4a9dd7d2f0775 Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Mon, 6 Jun 2011 05:11:34 +0200 Subject: block: rename the return of two functions If we rename the return of alloc_io_context() and get_io_context() from "ret" to "ioc" the code get's (a bit) more readable and (a lot) more grepable. Signed-off-by: Paul Bolle Signed-off-by: Jens Axboe diff --git a/block/blk-ioc.c b/block/blk-ioc.c index c898049..bfb0493 100644 --- a/block/blk-ioc.c +++ b/block/blk-ioc.c @@ -82,26 +82,26 @@ void exit_io_context(struct task_struct *task) struct io_context *alloc_io_context(gfp_t gfp_flags, int node) { - struct io_context *ret; + struct io_context *ioc; - ret = kmem_cache_alloc_node(iocontext_cachep, gfp_flags, node); - if (ret) { - atomic_long_set(&ret->refcount, 1); - atomic_set(&ret->nr_tasks, 1); - spin_lock_init(&ret->lock); - ret->ioprio_changed = 0; - ret->ioprio = 0; - ret->last_waited = 0; /* doesn't matter... */ - ret->nr_batch_requests = 0; /* because this is 0 */ - INIT_RADIX_TREE(&ret->radix_root, GFP_ATOMIC | __GFP_HIGH); - INIT_HLIST_HEAD(&ret->cic_list); - ret->ioc_data = NULL; + ioc = kmem_cache_alloc_node(iocontext_cachep, gfp_flags, node); + if (ioc) { + atomic_long_set(&ioc->refcount, 1); + atomic_set(&ioc->nr_tasks, 1); + spin_lock_init(&ioc->lock); + ioc->ioprio_changed = 0; + ioc->ioprio = 0; + ioc->last_waited = 0; /* doesn't matter... */ + ioc->nr_batch_requests = 0; /* because this is 0 */ + INIT_RADIX_TREE(&ioc->radix_root, GFP_ATOMIC | __GFP_HIGH); + INIT_HLIST_HEAD(&ioc->cic_list); + ioc->ioc_data = NULL; #if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE) - ret->cgroup_changed = 0; + ioc->cgroup_changed = 0; #endif } - return ret; + return ioc; } /* @@ -139,19 +139,19 @@ struct io_context *current_io_context(gfp_t gfp_flags, int node) */ struct io_context *get_io_context(gfp_t gfp_flags, int node) { - struct io_context *ret = NULL; + struct io_context *ioc = NULL; /* * Check for unlikely race with exiting task. ioc ref count is * zero when ioc is being detached. */ do { - ret = current_io_context(gfp_flags, node); - if (unlikely(!ret)) + ioc = current_io_context(gfp_flags, node); + if (unlikely(!ioc)) break; - } while (!atomic_long_inc_not_zero(&ret->refcount)); + } while (!atomic_long_inc_not_zero(&ioc->refcount)); - return ret; + return ioc; } EXPORT_SYMBOL(get_io_context); -- cgit v0.10.2 From 1acb30ef28c4cb08bc6f7bc7f68ee7eebd4b9c84 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Fri, 20 May 2011 20:48:33 +0900 Subject: USB: ehci-s5p: add PM support This patch adds power management support such as suspend and resume functions. Signed-off-by: Jingoo Han Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index e3374c8..b3958b3 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c @@ -189,6 +189,100 @@ static void s5p_ehci_shutdown(struct platform_device *pdev) hcd->driver->shutdown(hcd); } +#ifdef CONFIG_PM +static int s5p_ehci_suspend(struct device *dev) +{ + struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev); + struct usb_hcd *hcd = s5p_ehci->hcd; + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + struct platform_device *pdev = to_platform_device(dev); + struct s5p_ehci_platdata *pdata = pdev->dev.platform_data; + unsigned long flags; + int rc = 0; + + if (time_before(jiffies, ehci->next_statechange)) + msleep(20); + + /* + * Root hub was already suspended. Disable irq emission and + * mark HW unaccessible. The PM and USB cores make sure that + * the root hub is either suspended or stopped. + */ + ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev)); + spin_lock_irqsave(&ehci->lock, flags); + ehci_writel(ehci, 0, &ehci->regs->intr_enable); + (void)ehci_readl(ehci, &ehci->regs->intr_enable); + + clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + spin_unlock_irqrestore(&ehci->lock, flags); + + if (pdata && pdata->phy_exit) + pdata->phy_exit(pdev, S5P_USB_PHY_HOST); + + return rc; +} + +static int s5p_ehci_resume(struct device *dev) +{ + struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev); + struct usb_hcd *hcd = s5p_ehci->hcd; + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + struct platform_device *pdev = to_platform_device(dev); + struct s5p_ehci_platdata *pdata = pdev->dev.platform_data; + + if (pdata && pdata->phy_init) + pdata->phy_init(pdev, S5P_USB_PHY_HOST); + + if (time_before(jiffies, ehci->next_statechange)) + msleep(100); + + /* Mark hardware accessible again as we are out of D3 state by now */ + set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) { + int mask = INTR_MASK; + + ehci_prepare_ports_for_controller_resume(ehci); + if (!hcd->self.root_hub->do_remote_wakeup) + mask &= ~STS_PCD; + ehci_writel(ehci, mask, &ehci->regs->intr_enable); + ehci_readl(ehci, &ehci->regs->intr_enable); + return 0; + } + + usb_root_hub_lost_power(hcd->self.root_hub); + + (void) ehci_halt(ehci); + (void) ehci_reset(ehci); + + /* emptying the schedule aborts any urbs */ + spin_lock_irq(&ehci->lock); + if (ehci->reclaim) + end_unlink_async(ehci); + ehci_work(ehci); + spin_unlock_irq(&ehci->lock); + + ehci_writel(ehci, ehci->command, &ehci->regs->command); + ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); + ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ + + /* here we "know" root ports should always stay powered */ + ehci_port_power(ehci, 1); + + hcd->state = HC_STATE_SUSPENDED; + + return 0; +} +#else +#define s5p_ehci_suspend NULL +#define s5p_ehci_resume NULL +#endif + +static const struct dev_pm_ops s5p_ehci_pm_ops = { + .suspend = s5p_ehci_suspend, + .resume = s5p_ehci_resume, +}; + static struct platform_driver s5p_ehci_driver = { .probe = s5p_ehci_probe, .remove = __devexit_p(s5p_ehci_remove), @@ -196,6 +290,7 @@ static struct platform_driver s5p_ehci_driver = { .driver = { .name = "s5p-ehci", .owner = THIS_MODULE, + .pm = &s5p_ehci_pm_ops, } }; -- cgit v0.10.2 From 680681747ff933fdedfbf11bd03c369e5b14085c Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 26 May 2011 00:02:56 -0700 Subject: usb/gadget: (fusb300_udc) Remove unused function fusb300_ep0_complete fusb300_ep0_complete() is an empty function, not called from anywhere, and causes the following build warning. fusb300_udc.c:983: warning: fusb300_ep0_complete defined but not used Remove it. Signed-off-by: Guenter Roeck Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/gadget/fusb300_udc.c b/drivers/usb/gadget/fusb300_udc.c index 763d462..b82a114 100644 --- a/drivers/usb/gadget/fusb300_udc.c +++ b/drivers/usb/gadget/fusb300_udc.c @@ -980,11 +980,6 @@ static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl) } \ } while (0) -static void fusb300_ep0_complete(struct usb_ep *ep, - struct usb_request *req) -{ -} - static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl) { u8 *p = (u8 *)ctrl; -- cgit v0.10.2 From c4fc2342cb611f945fa468e742759e25984005ad Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Tue, 31 May 2011 21:31:08 +0200 Subject: USB: Add "authorized_default" parameter to the usbcore module The "authorized_default" module parameter of usbcore controls the default for the authorized_default variable of each USB host controller. -1 is authorized for all devices except wireless (default, old behaviour) 0 is unauthorized for all devices 1 is authorized for all devices Signed-off-by: Carl-Daniel Hailfinger Signed-off-by: Greg Kroah-Hartman diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index d9a203b..74230bd 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2538,6 +2538,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. unknown_nmi_panic [X86] Cause panic on unknown NMI. + usbcore.authorized_default= + [USB] Default USB device authorization: + (default -1 = authorized except for wireless USB, + 0 = not authorized, 1 = authorized) + usbcore.autosuspend= [USB] The autosuspend time delay (in seconds) used for newly-detected USB devices (default 2). This diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index ace9f844..8669ba3 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c @@ -337,6 +337,17 @@ static const u8 ss_rh_config_descriptor[] = { 0x02, 0x00 /* __le16 ss_wBytesPerInterval; 15 bits for max 15 ports */ }; +/* authorized_default behaviour: + * -1 is authorized for all devices except wireless (old behaviour) + * 0 is unauthorized for all devices + * 1 is authorized for all devices + */ +static int authorized_default = -1; +module_param(authorized_default, int, S_IRUGO|S_IWUSR); +MODULE_PARM_DESC(authorized_default, + "Default USB device authorization: 0 is not authorized, 1 is " + "authorized, -1 is authorized except for wireless USB (default, " + "old behaviour"); /*-------------------------------------------------------------------------*/ /** @@ -2371,7 +2382,11 @@ int usb_add_hcd(struct usb_hcd *hcd, dev_info(hcd->self.controller, "%s\n", hcd->product_desc); - hcd->authorized_default = hcd->wireless? 0 : 1; + /* Keep old behaviour if authorized_default is not in [0, 1]. */ + if (authorized_default < 0 || authorized_default > 1) + hcd->authorized_default = hcd->wireless? 0 : 1; + else + hcd->authorized_default = authorized_default; set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); /* HC is in reset state, but accessible. Now do the one-time init, -- cgit v0.10.2 From ceb80363b2ec1091dffd78064771e3d4679f69c7 Mon Sep 17 00:00:00 2001 From: Seth Levy Date: Mon, 6 Jun 2011 19:42:44 -0400 Subject: USB: net2272: driver for PLX NET2272 USB device controller This is based on the last release from PLX: http://www.plxtech.com/files/products/net2000/software/selectiontool/RE061204-net2272-linux2.6.18.tgz I've managed to contact them and they've confirmed that this driver was wholly written by PLX (Seth Levy). While they have no problem with it being merged (and they've already licensed it as GPL), they don't have any interest in doing so themselves as this is an old part for them. ADI has long had an add-on card which has this part on it, so we've been keeping it up-to-date out of tree. But now that PLX has confirmed the source of the driver, we can can take the next step of cleaning it up and getting it merged. So here we are! I've done quite a large clean up of the driver and attempted to address all the common issues. Hopefully in the process, I haven't broken anything. While it seems to still work with the board that I have access to, it is not a PCI variant. So I have not tested any of the PCI logic myself (beyond clean compile). Perhaps someone who actually has a card and cares can do so. I'll try to address further feedback, but don't expect miracles. I'm not really familiar with the part itself, just the platform glue. Signed-off-by: Seth Levy Signed-off-by: Ash Aziz Signed-off-by: Roy Huang Signed-off-by: Michael Hennerich Signed-off-by: Mike Frysinger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 58456d1..be44545 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -480,6 +480,35 @@ config USB_CI13XXX_PCI default USB_GADGET select USB_GADGET_SELECTED +config USB_GADGET_NET2272 + boolean "PLX NET2272" + select USB_GADGET_DUALSPEED + help + PLX NET2272 is a USB peripheral controller which supports + both full and high speed USB 2.0 data transfers. + + It has three configurable endpoints, as well as endpoint zero + (for control transfer). + Say "y" to link the driver statically, or "m" to build a + dynamically linked module called "net2272" and force all + gadget drivers to also be dynamically linked. + +config USB_GADGET_NET2272_DMA + boolean "Support external DMA controller" + depends on USB_GADGET_NET2272 + help + The NET2272 part can optionally support an external DMA + controller, but your board has to have support in the + driver itself. + + If unsure, say "N" here. The driver works fine in PIO mode. + +config USB_NET2272 + tristate + depends on USB_GADGET_NET2272 + default USB_GADGET + select USB_GADGET_SELECTED + config USB_GADGET_NET2280 boolean "NetChip 228x" depends on PCI diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 4fe92b1..3452617 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -4,6 +4,7 @@ ccflags-$(CONFIG_USB_GADGET_DEBUG) := -DDEBUG obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o +obj-$(CONFIG_USB_NET2272) += net2272.o obj-$(CONFIG_USB_NET2280) += net2280.o obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o obj-$(CONFIG_USB_PXA25X) += pxa25x_udc.o diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index bcdac7c..13c2f9e 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -15,6 +15,12 @@ #ifndef __GADGET_CHIPS_H #define __GADGET_CHIPS_H +#ifdef CONFIG_USB_GADGET_NET2272 +#define gadget_is_net2272(g) !strcmp("net2272", (g)->name) +#else +#define gadget_is_net2272(g) 0 +#endif + #ifdef CONFIG_USB_GADGET_NET2280 #define gadget_is_net2280(g) !strcmp("net2280", (g)->name) #else @@ -223,6 +229,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x29; else if (gadget_is_s3c_hsudc(gadget)) return 0x30; + else if (gadget_is_net2272(gadget)) + return 0x31; return -ENOENT; } diff --git a/drivers/usb/gadget/net2272.c b/drivers/usb/gadget/net2272.c new file mode 100644 index 0000000..29151c4 --- /dev/null +++ b/drivers/usb/gadget/net2272.c @@ -0,0 +1,2718 @@ +/* + * Driver for PLX NET2272 USB device controller + * + * Copyright (C) 2005-2006 PLX Technology, Inc. + * Copyright (C) 2006-2011 Analog Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "net2272.h" + +#define DRIVER_DESC "PLX NET2272 USB Peripheral Controller" + +static const char driver_name[] = "net2272"; +static const char driver_vers[] = "2006 October 17/mainline"; +static const char driver_desc[] = DRIVER_DESC; + +static const char ep0name[] = "ep0"; +static const char * const ep_name[] = { + ep0name, + "ep-a", "ep-b", "ep-c", +}; + +#define DMA_ADDR_INVALID (~(dma_addr_t)0) +#ifdef CONFIG_USB_GADGET_NET2272_DMA +/* + * use_dma: the NET2272 can use an external DMA controller. + * Note that since there is no generic DMA api, some functions, + * notably request_dma, start_dma, and cancel_dma will need to be + * modified for your platform's particular dma controller. + * + * If use_dma is disabled, pio will be used instead. + */ +static int use_dma = 0; +module_param(use_dma, bool, 0644); + +/* + * dma_ep: selects the endpoint for use with dma (1=ep-a, 2=ep-b) + * The NET2272 can only use dma for a single endpoint at a time. + * At some point this could be modified to allow either endpoint + * to take control of dma as it becomes available. + * + * Note that DMA should not be used on OUT endpoints unless it can + * be guaranteed that no short packets will arrive on an IN endpoint + * while the DMA operation is pending. Otherwise the OUT DMA will + * terminate prematurely (See NET2272 Errata 630-0213-0101) + */ +static ushort dma_ep = 1; +module_param(dma_ep, ushort, 0644); + +/* + * dma_mode: net2272 dma mode setting (see LOCCTL1 definiton): + * mode 0 == Slow DREQ mode + * mode 1 == Fast DREQ mode + * mode 2 == Burst mode + */ +static ushort dma_mode = 2; +module_param(dma_mode, ushort, 0644); +#else +#define use_dma 0 +#define dma_ep 1 +#define dma_mode 2 +#endif + +/* + * fifo_mode: net2272 buffer configuration: + * mode 0 == ep-{a,b,c} 512db each + * mode 1 == ep-a 1k, ep-{b,c} 512db + * mode 2 == ep-a 1k, ep-b 1k, ep-c 512db + * mode 3 == ep-a 1k, ep-b disabled, ep-c 512db + */ +static ushort fifo_mode = 0; +module_param(fifo_mode, ushort, 0644); + +/* + * enable_suspend: When enabled, the driver will respond to + * USB suspend requests by powering down the NET2272. Otherwise, + * USB suspend requests will be ignored. This is acceptible for + * self-powered devices. For bus powered devices set this to 1. + */ +static ushort enable_suspend = 0; +module_param(enable_suspend, ushort, 0644); + +static void assert_out_naking(struct net2272_ep *ep, const char *where) +{ + u8 tmp; + +#ifndef DEBUG + return; +#endif + + tmp = net2272_ep_read(ep, EP_STAT0); + if ((tmp & (1 << NAK_OUT_PACKETS)) == 0) { + dev_dbg(ep->dev->dev, "%s %s %02x !NAK\n", + ep->ep.name, where, tmp); + net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS); + } +} +#define ASSERT_OUT_NAKING(ep) assert_out_naking(ep, __func__) + +static void stop_out_naking(struct net2272_ep *ep) +{ + u8 tmp = net2272_ep_read(ep, EP_STAT0); + + if ((tmp & (1 << NAK_OUT_PACKETS)) != 0) + net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS); +} + +#define PIPEDIR(bAddress) (usb_pipein(bAddress) ? "in" : "out") + +static char *type_string(u8 bmAttributes) +{ + switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) { + case USB_ENDPOINT_XFER_BULK: return "bulk"; + case USB_ENDPOINT_XFER_ISOC: return "iso"; + case USB_ENDPOINT_XFER_INT: return "intr"; + default: return "control"; + } +} + +static char *buf_state_string(unsigned state) +{ + switch (state) { + case BUFF_FREE: return "free"; + case BUFF_VALID: return "valid"; + case BUFF_LCL: return "local"; + case BUFF_USB: return "usb"; + default: return "unknown"; + } +} + +static char *dma_mode_string(void) +{ + if (!use_dma) + return "PIO"; + switch (dma_mode) { + case 0: return "SLOW DREQ"; + case 1: return "FAST DREQ"; + case 2: return "BURST"; + default: return "invalid"; + } +} + +static void net2272_dequeue_all(struct net2272_ep *); +static int net2272_kick_dma(struct net2272_ep *, struct net2272_request *); +static int net2272_fifo_status(struct usb_ep *); + +static struct usb_ep_ops net2272_ep_ops; + +/*---------------------------------------------------------------------------*/ + +static int +net2272_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) +{ + struct net2272 *dev; + struct net2272_ep *ep; + u32 max; + u8 tmp; + unsigned long flags; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || !desc || ep->desc || _ep->name == ep0name + || desc->bDescriptorType != USB_DT_ENDPOINT) + return -EINVAL; + dev = ep->dev; + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff; + + spin_lock_irqsave(&dev->lock, flags); + _ep->maxpacket = max & 0x7fff; + ep->desc = desc; + + /* net2272_ep_reset() has already been called */ + ep->stopped = 0; + ep->wedged = 0; + + /* set speed-dependent max packet */ + net2272_ep_write(ep, EP_MAXPKT0, max & 0xff); + net2272_ep_write(ep, EP_MAXPKT1, (max & 0xff00) >> 8); + + /* set type, direction, address; reset fifo counters */ + net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH); + tmp = usb_endpoint_type(desc); + if (usb_endpoint_xfer_bulk(desc)) { + /* catch some particularly blatant driver bugs */ + if ((dev->gadget.speed == USB_SPEED_HIGH && max != 512) || + (dev->gadget.speed == USB_SPEED_FULL && max > 64)) { + spin_unlock_irqrestore(&dev->lock, flags); + return -ERANGE; + } + } + ep->is_iso = usb_endpoint_xfer_isoc(desc) ? 1 : 0; + tmp <<= ENDPOINT_TYPE; + tmp |= ((desc->bEndpointAddress & 0x0f) << ENDPOINT_NUMBER); + tmp |= usb_endpoint_dir_in(desc) << ENDPOINT_DIRECTION; + tmp |= (1 << ENDPOINT_ENABLE); + + /* for OUT transfers, block the rx fifo until a read is posted */ + ep->is_in = usb_endpoint_dir_in(desc); + if (!ep->is_in) + net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS); + + net2272_ep_write(ep, EP_CFG, tmp); + + /* enable irqs */ + tmp = (1 << ep->num) | net2272_read(dev, IRQENB0); + net2272_write(dev, IRQENB0, tmp); + + tmp = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) + | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE) + | net2272_ep_read(ep, EP_IRQENB); + net2272_ep_write(ep, EP_IRQENB, tmp); + + tmp = desc->bEndpointAddress; + dev_dbg(dev->dev, "enabled %s (ep%d%s-%s) max %04x cfg %02x\n", + _ep->name, tmp & 0x0f, PIPEDIR(tmp), + type_string(desc->bmAttributes), max, + net2272_ep_read(ep, EP_CFG)); + + spin_unlock_irqrestore(&dev->lock, flags); + return 0; +} + +static void net2272_ep_reset(struct net2272_ep *ep) +{ + u8 tmp; + + ep->desc = NULL; + INIT_LIST_HEAD(&ep->queue); + + ep->ep.maxpacket = ~0; + ep->ep.ops = &net2272_ep_ops; + + /* disable irqs, endpoint */ + net2272_ep_write(ep, EP_IRQENB, 0); + + /* init to our chosen defaults, notably so that we NAK OUT + * packets until the driver queues a read. + */ + tmp = (1 << NAK_OUT_PACKETS_MODE) | (1 << ALT_NAK_OUT_PACKETS); + net2272_ep_write(ep, EP_RSPSET, tmp); + + tmp = (1 << INTERRUPT_MODE) | (1 << HIDE_STATUS_PHASE); + if (ep->num != 0) + tmp |= (1 << ENDPOINT_TOGGLE) | (1 << ENDPOINT_HALT); + + net2272_ep_write(ep, EP_RSPCLR, tmp); + + /* scrub most status bits, and flush any fifo state */ + net2272_ep_write(ep, EP_STAT0, + (1 << DATA_IN_TOKEN_INTERRUPT) + | (1 << DATA_OUT_TOKEN_INTERRUPT) + | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT) + | (1 << DATA_PACKET_RECEIVED_INTERRUPT) + | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)); + + net2272_ep_write(ep, EP_STAT1, + (1 << TIMEOUT) + | (1 << USB_OUT_ACK_SENT) + | (1 << USB_OUT_NAK_SENT) + | (1 << USB_IN_ACK_RCVD) + | (1 << USB_IN_NAK_SENT) + | (1 << USB_STALL_SENT) + | (1 << LOCAL_OUT_ZLP) + | (1 << BUFFER_FLUSH)); + + /* fifo size is handled seperately */ +} + +static int net2272_disable(struct usb_ep *_ep) +{ + struct net2272_ep *ep; + unsigned long flags; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || !ep->desc || _ep->name == ep0name) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + net2272_dequeue_all(ep); + net2272_ep_reset(ep); + + dev_vdbg(ep->dev->dev, "disabled %s\n", _ep->name); + + spin_unlock_irqrestore(&ep->dev->lock, flags); + return 0; +} + +/*---------------------------------------------------------------------------*/ + +static struct usb_request * +net2272_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) +{ + struct net2272_ep *ep; + struct net2272_request *req; + + if (!_ep) + return NULL; + ep = container_of(_ep, struct net2272_ep, ep); + + req = kzalloc(sizeof(*req), gfp_flags); + if (!req) + return NULL; + + req->req.dma = DMA_ADDR_INVALID; + INIT_LIST_HEAD(&req->queue); + + return &req->req; +} + +static void +net2272_free_request(struct usb_ep *_ep, struct usb_request *_req) +{ + struct net2272_ep *ep; + struct net2272_request *req; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || !_req) + return; + + req = container_of(_req, struct net2272_request, req); + WARN_ON(!list_empty(&req->queue)); + kfree(req); +} + +static void +net2272_done(struct net2272_ep *ep, struct net2272_request *req, int status) +{ + struct net2272 *dev; + unsigned stopped = ep->stopped; + + if (ep->num == 0) { + if (ep->dev->protocol_stall) { + ep->stopped = 1; + set_halt(ep); + } + allow_status(ep); + } + + list_del_init(&req->queue); + + if (req->req.status == -EINPROGRESS) + req->req.status = status; + else + status = req->req.status; + + dev = ep->dev; + if (use_dma && req->mapped) { + dma_unmap_single(dev->dev, req->req.dma, req->req.length, + ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); + req->req.dma = DMA_ADDR_INVALID; + req->mapped = 0; + } + + if (status && status != -ESHUTDOWN) + dev_vdbg(dev->dev, "complete %s req %p stat %d len %u/%u buf %p\n", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length, req->req.buf); + + /* don't modify queue heads during completion callback */ + ep->stopped = 1; + spin_unlock(&dev->lock); + req->req.complete(&ep->ep, &req->req); + spin_lock(&dev->lock); + ep->stopped = stopped; +} + +static int +net2272_write_packet(struct net2272_ep *ep, u8 *buf, + struct net2272_request *req, unsigned max) +{ + u16 __iomem *ep_data = net2272_reg_addr(ep->dev, EP_DATA); + u16 *bufp; + unsigned length, count; + u8 tmp; + + length = min(req->req.length - req->req.actual, max); + req->req.actual += length; + + dev_vdbg(ep->dev->dev, "write packet %s req %p max %u len %u avail %u\n", + ep->ep.name, req, max, length, + (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0)); + + count = length; + bufp = (u16 *)buf; + + while (likely(count >= 2)) { + /* no byte-swap required; chip endian set during init */ + writew(*bufp++, ep_data); + count -= 2; + } + buf = (u8 *)bufp; + + /* write final byte by placing the NET2272 into 8-bit mode */ + if (unlikely(count)) { + tmp = net2272_read(ep->dev, LOCCTL); + net2272_write(ep->dev, LOCCTL, tmp & ~(1 << DATA_WIDTH)); + writeb(*buf, ep_data); + net2272_write(ep->dev, LOCCTL, tmp); + } + return length; +} + +/* returns: 0: still running, 1: completed, negative: errno */ +static int +net2272_write_fifo(struct net2272_ep *ep, struct net2272_request *req) +{ + u8 *buf; + unsigned count, max; + int status; + + dev_vdbg(ep->dev->dev, "write_fifo %s actual %d len %d\n", + ep->ep.name, req->req.actual, req->req.length); + + /* + * Keep loading the endpoint until the final packet is loaded, + * or the endpoint buffer is full. + */ + top: + /* + * Clear interrupt status + * - Packet Transmitted interrupt will become set again when the + * host successfully takes another packet + */ + net2272_ep_write(ep, EP_STAT0, (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)); + while (!(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_FULL))) { + buf = req->req.buf + req->req.actual; + prefetch(buf); + + /* force pagesel */ + net2272_ep_read(ep, EP_STAT0); + + max = (net2272_ep_read(ep, EP_AVAIL1) << 8) | + (net2272_ep_read(ep, EP_AVAIL0)); + + if (max < ep->ep.maxpacket) + max = (net2272_ep_read(ep, EP_AVAIL1) << 8) + | (net2272_ep_read(ep, EP_AVAIL0)); + + count = net2272_write_packet(ep, buf, req, max); + /* see if we are done */ + if (req->req.length == req->req.actual) { + /* validate short or zlp packet */ + if (count < ep->ep.maxpacket) + set_fifo_bytecount(ep, 0); + net2272_done(ep, req, 0); + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct net2272_request, + queue); + status = net2272_kick_dma(ep, req); + + if (status < 0) + if ((net2272_ep_read(ep, EP_STAT0) + & (1 << BUFFER_EMPTY))) + goto top; + } + return 1; + } + net2272_ep_write(ep, EP_STAT0, (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)); + } + return 0; +} + +static void +net2272_out_flush(struct net2272_ep *ep) +{ + ASSERT_OUT_NAKING(ep); + + net2272_ep_write(ep, EP_STAT0, (1 << DATA_OUT_TOKEN_INTERRUPT) + | (1 << DATA_PACKET_RECEIVED_INTERRUPT)); + net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH); +} + +static int +net2272_read_packet(struct net2272_ep *ep, u8 *buf, + struct net2272_request *req, unsigned avail) +{ + u16 __iomem *ep_data = net2272_reg_addr(ep->dev, EP_DATA); + unsigned is_short; + u16 *bufp; + + req->req.actual += avail; + + dev_vdbg(ep->dev->dev, "read packet %s req %p len %u avail %u\n", + ep->ep.name, req, avail, + (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0)); + + is_short = (avail < ep->ep.maxpacket); + + if (unlikely(avail == 0)) { + /* remove any zlp from the buffer */ + (void)readw(ep_data); + return is_short; + } + + /* Ensure we get the final byte */ + if (unlikely(avail % 2)) + avail++; + bufp = (u16 *)buf; + + do { + *bufp++ = readw(ep_data); + avail -= 2; + } while (avail); + + /* + * To avoid false endpoint available race condition must read + * ep stat0 twice in the case of a short transfer + */ + if (net2272_ep_read(ep, EP_STAT0) & (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)) + net2272_ep_read(ep, EP_STAT0); + + return is_short; +} + +static int +net2272_read_fifo(struct net2272_ep *ep, struct net2272_request *req) +{ + u8 *buf; + unsigned is_short; + int count; + int tmp; + int cleanup = 0; + int status = -1; + + dev_vdbg(ep->dev->dev, "read_fifo %s actual %d len %d\n", + ep->ep.name, req->req.actual, req->req.length); + + top: + do { + buf = req->req.buf + req->req.actual; + prefetchw(buf); + + count = (net2272_ep_read(ep, EP_AVAIL1) << 8) + | net2272_ep_read(ep, EP_AVAIL0); + + net2272_ep_write(ep, EP_STAT0, + (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT) | + (1 << DATA_PACKET_RECEIVED_INTERRUPT)); + + tmp = req->req.length - req->req.actual; + + if (count > tmp) { + if ((tmp % ep->ep.maxpacket) != 0) { + dev_err(ep->dev->dev, + "%s out fifo %d bytes, expected %d\n", + ep->ep.name, count, tmp); + cleanup = 1; + } + count = (tmp > 0) ? tmp : 0; + } + + is_short = net2272_read_packet(ep, buf, req, count); + + /* completion */ + if (unlikely(cleanup || is_short || + ((req->req.actual == req->req.length) + && !req->req.zero))) { + + if (cleanup) { + net2272_out_flush(ep); + net2272_done(ep, req, -EOVERFLOW); + } else + net2272_done(ep, req, 0); + + /* re-initialize endpoint transfer registers + * otherwise they may result in erroneous pre-validation + * for subsequent control reads + */ + if (unlikely(ep->num == 0)) { + net2272_ep_write(ep, EP_TRANSFER2, 0); + net2272_ep_write(ep, EP_TRANSFER1, 0); + net2272_ep_write(ep, EP_TRANSFER0, 0); + } + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct net2272_request, queue); + status = net2272_kick_dma(ep, req); + if ((status < 0) && + !(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_EMPTY))) + goto top; + } + return 1; + } + } while (!(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_EMPTY))); + + return 0; +} + +static void +net2272_pio_advance(struct net2272_ep *ep) +{ + struct net2272_request *req; + + if (unlikely(list_empty(&ep->queue))) + return; + + req = list_entry(ep->queue.next, struct net2272_request, queue); + (ep->is_in ? net2272_write_fifo : net2272_read_fifo)(ep, req); +} + +/* returns 0 on success, else negative errno */ +static int +net2272_request_dma(struct net2272 *dev, unsigned ep, u32 buf, + unsigned len, unsigned dir) +{ + dev_vdbg(dev->dev, "request_dma ep %d buf %08x len %d dir %d\n", + ep, buf, len, dir); + + /* The NET2272 only supports a single dma channel */ + if (dev->dma_busy) + return -EBUSY; + /* + * EP_TRANSFER (used to determine the number of bytes received + * in an OUT transfer) is 24 bits wide; don't ask for more than that. + */ + if ((dir == 1) && (len > 0x1000000)) + return -EINVAL; + + dev->dma_busy = 1; + + /* initialize platform's dma */ +#ifdef CONFIG_PCI + /* NET2272 addr, buffer addr, length, etc. */ + switch (dev->dev_id) { + case PCI_DEVICE_ID_RDK1: + /* Setup PLX 9054 DMA mode */ + writel((1 << LOCAL_BUS_WIDTH) | + (1 << TA_READY_INPUT_ENABLE) | + (0 << LOCAL_BURST_ENABLE) | + (1 << DONE_INTERRUPT_ENABLE) | + (1 << LOCAL_ADDRESSING_MODE) | + (1 << DEMAND_MODE) | + (1 << DMA_EOT_ENABLE) | + (1 << FAST_SLOW_TERMINATE_MODE_SELECT) | + (1 << DMA_CHANNEL_INTERRUPT_SELECT), + dev->rdk1.plx9054_base_addr + DMAMODE0); + + writel(0x100000, dev->rdk1.plx9054_base_addr + DMALADR0); + writel(buf, dev->rdk1.plx9054_base_addr + DMAPADR0); + writel(len, dev->rdk1.plx9054_base_addr + DMASIZ0); + writel((dir << DIRECTION_OF_TRANSFER) | + (1 << INTERRUPT_AFTER_TERMINAL_COUNT), + dev->rdk1.plx9054_base_addr + DMADPR0); + writel((1 << LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE) | + readl(dev->rdk1.plx9054_base_addr + INTCSR), + dev->rdk1.plx9054_base_addr + INTCSR); + + break; + } +#endif + + net2272_write(dev, DMAREQ, + (0 << DMA_BUFFER_VALID) | + (1 << DMA_REQUEST_ENABLE) | + (1 << DMA_CONTROL_DACK) | + (dev->dma_eot_polarity << EOT_POLARITY) | + (dev->dma_dack_polarity << DACK_POLARITY) | + (dev->dma_dreq_polarity << DREQ_POLARITY) | + ((ep >> 1) << DMA_ENDPOINT_SELECT)); + + (void) net2272_read(dev, SCRATCH); + + return 0; +} + +static void +net2272_start_dma(struct net2272 *dev) +{ + /* start platform's dma controller */ +#ifdef CONFIG_PCI + switch (dev->dev_id) { + case PCI_DEVICE_ID_RDK1: + writeb((1 << CHANNEL_ENABLE) | (1 << CHANNEL_START), + dev->rdk1.plx9054_base_addr + DMACSR0); + break; + } +#endif +} + +/* returns 0 on success, else negative errno */ +static int +net2272_kick_dma(struct net2272_ep *ep, struct net2272_request *req) +{ + unsigned size; + u8 tmp; + + if (!use_dma || (ep->num < 1) || (ep->num > 2) || !ep->dma) + return -EINVAL; + + /* don't use dma for odd-length transfers + * otherwise, we'd need to deal with the last byte with pio + */ + if (req->req.length & 1) + return -EINVAL; + + dev_vdbg(ep->dev->dev, "kick_dma %s req %p dma %08x\n", + ep->ep.name, req, req->req.dma); + + net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS); + + /* The NET2272 can only use DMA on one endpoint at a time */ + if (ep->dev->dma_busy) + return -EBUSY; + + /* Make sure we only DMA an even number of bytes (we'll use + * pio to complete the transfer) + */ + size = req->req.length; + size &= ~1; + + /* device-to-host transfer */ + if (ep->is_in) { + /* initialize platform's dma controller */ + if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 0)) + /* unable to obtain DMA channel; return error and use pio mode */ + return -EBUSY; + req->req.actual += size; + + /* host-to-device transfer */ + } else { + tmp = net2272_ep_read(ep, EP_STAT0); + + /* initialize platform's dma controller */ + if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 1)) + /* unable to obtain DMA channel; return error and use pio mode */ + return -EBUSY; + + if (!(tmp & (1 << BUFFER_EMPTY))) + ep->not_empty = 1; + else + ep->not_empty = 0; + + + /* allow the endpoint's buffer to fill */ + net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS); + + /* this transfer completed and data's already in the fifo + * return error so pio gets used. + */ + if (tmp & (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)) { + + /* deassert dreq */ + net2272_write(ep->dev, DMAREQ, + (0 << DMA_BUFFER_VALID) | + (0 << DMA_REQUEST_ENABLE) | + (1 << DMA_CONTROL_DACK) | + (ep->dev->dma_eot_polarity << EOT_POLARITY) | + (ep->dev->dma_dack_polarity << DACK_POLARITY) | + (ep->dev->dma_dreq_polarity << DREQ_POLARITY) | + ((ep->num >> 1) << DMA_ENDPOINT_SELECT)); + + return -EBUSY; + } + } + + /* Don't use per-packet interrupts: use dma interrupts only */ + net2272_ep_write(ep, EP_IRQENB, 0); + + net2272_start_dma(ep->dev); + + return 0; +} + +static void net2272_cancel_dma(struct net2272 *dev) +{ +#ifdef CONFIG_PCI + switch (dev->dev_id) { + case PCI_DEVICE_ID_RDK1: + writeb(0, dev->rdk1.plx9054_base_addr + DMACSR0); + writeb(1 << CHANNEL_ABORT, dev->rdk1.plx9054_base_addr + DMACSR0); + while (!(readb(dev->rdk1.plx9054_base_addr + DMACSR0) & + (1 << CHANNEL_DONE))) + continue; /* wait for dma to stabalize */ + + /* dma abort generates an interrupt */ + writeb(1 << CHANNEL_CLEAR_INTERRUPT, + dev->rdk1.plx9054_base_addr + DMACSR0); + break; + } +#endif + + dev->dma_busy = 0; +} + +/*---------------------------------------------------------------------------*/ + +static int +net2272_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) +{ + struct net2272_request *req; + struct net2272_ep *ep; + struct net2272 *dev; + unsigned long flags; + int status = -1; + u8 s; + + req = container_of(_req, struct net2272_request, req); + if (!_req || !_req->complete || !_req->buf + || !list_empty(&req->queue)) + return -EINVAL; + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return -EINVAL; + dev = ep->dev; + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + /* set up dma mapping in case the caller didn't */ + if (use_dma && ep->dma && _req->dma == DMA_ADDR_INVALID) { + _req->dma = dma_map_single(dev->dev, _req->buf, _req->length, + ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); + req->mapped = 1; + } + + dev_vdbg(dev->dev, "%s queue req %p, len %d buf %p dma %08x %s\n", + _ep->name, _req, _req->length, _req->buf, + _req->dma, _req->zero ? "zero" : "!zero"); + + spin_lock_irqsave(&dev->lock, flags); + + _req->status = -EINPROGRESS; + _req->actual = 0; + + /* kickstart this i/o queue? */ + if (list_empty(&ep->queue) && !ep->stopped) { + /* maybe there's no control data, just status ack */ + if (ep->num == 0 && _req->length == 0) { + net2272_done(ep, req, 0); + dev_vdbg(dev->dev, "%s status ack\n", ep->ep.name); + goto done; + } + + /* Return zlp, don't let it block subsequent packets */ + s = net2272_ep_read(ep, EP_STAT0); + if (s & (1 << BUFFER_EMPTY)) { + /* Buffer is empty check for a blocking zlp, handle it */ + if ((s & (1 << NAK_OUT_PACKETS)) && + net2272_ep_read(ep, EP_STAT1) & (1 << LOCAL_OUT_ZLP)) { + dev_dbg(dev->dev, "WARNING: returning ZLP short packet termination!\n"); + /* + * Request is going to terminate with a short packet ... + * hope the client is ready for it! + */ + status = net2272_read_fifo(ep, req); + /* clear short packet naking */ + net2272_ep_write(ep, EP_STAT0, (1 << NAK_OUT_PACKETS)); + goto done; + } + } + + /* try dma first */ + status = net2272_kick_dma(ep, req); + + if (status < 0) { + /* dma failed (most likely in use by another endpoint) + * fallback to pio + */ + status = 0; + + if (ep->is_in) + status = net2272_write_fifo(ep, req); + else { + s = net2272_ep_read(ep, EP_STAT0); + if ((s & (1 << BUFFER_EMPTY)) == 0) + status = net2272_read_fifo(ep, req); + } + + if (unlikely(status != 0)) { + if (status > 0) + status = 0; + req = NULL; + } + } + } + if (likely(req != 0)) + list_add_tail(&req->queue, &ep->queue); + + if (likely(!list_empty(&ep->queue))) + net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS); + done: + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +/* dequeue ALL requests */ +static void +net2272_dequeue_all(struct net2272_ep *ep) +{ + struct net2272_request *req; + + /* called with spinlock held */ + ep->stopped = 1; + + while (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct net2272_request, + queue); + net2272_done(ep, req, -ESHUTDOWN); + } +} + +/* dequeue JUST ONE request */ +static int +net2272_dequeue(struct usb_ep *_ep, struct usb_request *_req) +{ + struct net2272_ep *ep; + struct net2272_request *req; + unsigned long flags; + int stopped; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0) || !_req) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + stopped = ep->stopped; + ep->stopped = 1; + + /* make sure it's still queued on this endpoint */ + list_for_each_entry(req, &ep->queue, queue) { + if (&req->req == _req) + break; + } + if (&req->req != _req) { + spin_unlock_irqrestore(&ep->dev->lock, flags); + return -EINVAL; + } + + /* queue head may be partially complete */ + if (ep->queue.next == &req->queue) { + dev_dbg(ep->dev->dev, "unlink (%s) pio\n", _ep->name); + net2272_done(ep, req, -ECONNRESET); + } + req = NULL; + ep->stopped = stopped; + + spin_unlock_irqrestore(&ep->dev->lock, flags); + return 0; +} + +/*---------------------------------------------------------------------------*/ + +static int +net2272_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged) +{ + struct net2272_ep *ep; + unsigned long flags; + int ret = 0; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return -EINVAL; + if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + if (ep->desc /* not ep0 */ && usb_endpoint_xfer_isoc(ep->desc)) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + if (!list_empty(&ep->queue)) + ret = -EAGAIN; + else if (ep->is_in && value && net2272_fifo_status(_ep) != 0) + ret = -EAGAIN; + else { + dev_vdbg(ep->dev->dev, "%s %s %s\n", _ep->name, + value ? "set" : "clear", + wedged ? "wedge" : "halt"); + /* set/clear */ + if (value) { + if (ep->num == 0) + ep->dev->protocol_stall = 1; + else + set_halt(ep); + if (wedged) + ep->wedged = 1; + } else { + clear_halt(ep); + ep->wedged = 0; + } + } + spin_unlock_irqrestore(&ep->dev->lock, flags); + + return ret; +} + +static int +net2272_set_halt(struct usb_ep *_ep, int value) +{ + return net2272_set_halt_and_wedge(_ep, value, 0); +} + +static int +net2272_set_wedge(struct usb_ep *_ep) +{ + if (!_ep || _ep->name == ep0name) + return -EINVAL; + return net2272_set_halt_and_wedge(_ep, 1, 1); +} + +static int +net2272_fifo_status(struct usb_ep *_ep) +{ + struct net2272_ep *ep; + u16 avail; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return -ENODEV; + if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + avail = net2272_ep_read(ep, EP_AVAIL1) << 8; + avail |= net2272_ep_read(ep, EP_AVAIL0); + if (avail > ep->fifo_size) + return -EOVERFLOW; + if (ep->is_in) + avail = ep->fifo_size - avail; + return avail; +} + +static void +net2272_fifo_flush(struct usb_ep *_ep) +{ + struct net2272_ep *ep; + + ep = container_of(_ep, struct net2272_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return; + if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return; + + net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH); +} + +static struct usb_ep_ops net2272_ep_ops = { + .enable = net2272_enable, + .disable = net2272_disable, + + .alloc_request = net2272_alloc_request, + .free_request = net2272_free_request, + + .queue = net2272_queue, + .dequeue = net2272_dequeue, + + .set_halt = net2272_set_halt, + .set_wedge = net2272_set_wedge, + .fifo_status = net2272_fifo_status, + .fifo_flush = net2272_fifo_flush, +}; + +/*---------------------------------------------------------------------------*/ + +static int +net2272_get_frame(struct usb_gadget *_gadget) +{ + struct net2272 *dev; + unsigned long flags; + u16 ret; + + if (!_gadget) + return -ENODEV; + dev = container_of(_gadget, struct net2272, gadget); + spin_lock_irqsave(&dev->lock, flags); + + ret = net2272_read(dev, FRAME1) << 8; + ret |= net2272_read(dev, FRAME0); + + spin_unlock_irqrestore(&dev->lock, flags); + return ret; +} + +static int +net2272_wakeup(struct usb_gadget *_gadget) +{ + struct net2272 *dev; + u8 tmp; + unsigned long flags; + + if (!_gadget) + return 0; + dev = container_of(_gadget, struct net2272, gadget); + + spin_lock_irqsave(&dev->lock, flags); + tmp = net2272_read(dev, USBCTL0); + if (tmp & (1 << IO_WAKEUP_ENABLE)) + net2272_write(dev, USBCTL1, (1 << GENERATE_RESUME)); + + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +static int +net2272_set_selfpowered(struct usb_gadget *_gadget, int value) +{ + struct net2272 *dev; + + if (!_gadget) + return -ENODEV; + dev = container_of(_gadget, struct net2272, gadget); + + dev->is_selfpowered = value; + + return 0; +} + +static int +net2272_pullup(struct usb_gadget *_gadget, int is_on) +{ + struct net2272 *dev; + u8 tmp; + unsigned long flags; + + if (!_gadget) + return -ENODEV; + dev = container_of(_gadget, struct net2272, gadget); + + spin_lock_irqsave(&dev->lock, flags); + tmp = net2272_read(dev, USBCTL0); + dev->softconnect = (is_on != 0); + if (is_on) + tmp |= (1 << USB_DETECT_ENABLE); + else + tmp &= ~(1 << USB_DETECT_ENABLE); + net2272_write(dev, USBCTL0, tmp); + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +static const struct usb_gadget_ops net2272_ops = { + .get_frame = net2272_get_frame, + .wakeup = net2272_wakeup, + .set_selfpowered = net2272_set_selfpowered, + .pullup = net2272_pullup +}; + +/*---------------------------------------------------------------------------*/ + +static ssize_t +net2272_show_registers(struct device *_dev, struct device_attribute *attr, char *buf) +{ + struct net2272 *dev; + char *next; + unsigned size, t; + unsigned long flags; + u8 t1, t2; + int i; + const char *s; + + dev = dev_get_drvdata(_dev); + next = buf; + size = PAGE_SIZE; + spin_lock_irqsave(&dev->lock, flags); + + if (dev->driver) + s = dev->driver->driver.name; + else + s = "(none)"; + + /* Main Control Registers */ + t = scnprintf(next, size, "%s version %s," + "chiprev %02x, locctl %02x\n" + "irqenb0 %02x irqenb1 %02x " + "irqstat0 %02x irqstat1 %02x\n", + driver_name, driver_vers, dev->chiprev, + net2272_read(dev, LOCCTL), + net2272_read(dev, IRQENB0), + net2272_read(dev, IRQENB1), + net2272_read(dev, IRQSTAT0), + net2272_read(dev, IRQSTAT1)); + size -= t; + next += t; + + /* DMA */ + t1 = net2272_read(dev, DMAREQ); + t = scnprintf(next, size, "\ndmareq %02x: %s %s%s%s%s\n", + t1, ep_name[(t1 & 0x01) + 1], + t1 & (1 << DMA_CONTROL_DACK) ? "dack " : "", + t1 & (1 << DMA_REQUEST_ENABLE) ? "reqenb " : "", + t1 & (1 << DMA_REQUEST) ? "req " : "", + t1 & (1 << DMA_BUFFER_VALID) ? "valid " : ""); + size -= t; + next += t; + + /* USB Control Registers */ + t1 = net2272_read(dev, USBCTL1); + if (t1 & (1 << VBUS_PIN)) { + if (t1 & (1 << USB_HIGH_SPEED)) + s = "high speed"; + else if (dev->gadget.speed == USB_SPEED_UNKNOWN) + s = "powered"; + else + s = "full speed"; + } else + s = "not attached"; + t = scnprintf(next, size, + "usbctl0 %02x usbctl1 %02x addr 0x%02x (%s)\n", + net2272_read(dev, USBCTL0), t1, + net2272_read(dev, OURADDR), s); + size -= t; + next += t; + + /* Endpoint Registers */ + for (i = 0; i < 4; ++i) { + struct net2272_ep *ep; + + ep = &dev->ep[i]; + if (i && !ep->desc) + continue; + + t1 = net2272_ep_read(ep, EP_CFG); + t2 = net2272_ep_read(ep, EP_RSPSET); + t = scnprintf(next, size, + "\n%s\tcfg %02x rsp (%02x) %s%s%s%s%s%s%s%s" + "irqenb %02x\n", + ep->ep.name, t1, t2, + (t2 & (1 << ALT_NAK_OUT_PACKETS)) ? "NAK " : "", + (t2 & (1 << HIDE_STATUS_PHASE)) ? "hide " : "", + (t2 & (1 << AUTOVALIDATE)) ? "auto " : "", + (t2 & (1 << INTERRUPT_MODE)) ? "interrupt " : "", + (t2 & (1 << CONTROL_STATUS_PHASE_HANDSHAKE)) ? "status " : "", + (t2 & (1 << NAK_OUT_PACKETS_MODE)) ? "NAKmode " : "", + (t2 & (1 << ENDPOINT_TOGGLE)) ? "DATA1 " : "DATA0 ", + (t2 & (1 << ENDPOINT_HALT)) ? "HALT " : "", + net2272_ep_read(ep, EP_IRQENB)); + size -= t; + next += t; + + t = scnprintf(next, size, + "\tstat0 %02x stat1 %02x avail %04x " + "(ep%d%s-%s)%s\n", + net2272_ep_read(ep, EP_STAT0), + net2272_ep_read(ep, EP_STAT1), + (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0), + t1 & 0x0f, + ep->is_in ? "in" : "out", + type_string(t1 >> 5), + ep->stopped ? "*" : ""); + size -= t; + next += t; + + t = scnprintf(next, size, + "\tep_transfer %06x\n", + ((net2272_ep_read(ep, EP_TRANSFER2) & 0xff) << 16) | + ((net2272_ep_read(ep, EP_TRANSFER1) & 0xff) << 8) | + ((net2272_ep_read(ep, EP_TRANSFER0) & 0xff))); + size -= t; + next += t; + + t1 = net2272_ep_read(ep, EP_BUFF_STATES) & 0x03; + t2 = (net2272_ep_read(ep, EP_BUFF_STATES) >> 2) & 0x03; + t = scnprintf(next, size, + "\tbuf-a %s buf-b %s\n", + buf_state_string(t1), + buf_state_string(t2)); + size -= t; + next += t; + } + + spin_unlock_irqrestore(&dev->lock, flags); + + return PAGE_SIZE - size; +} +static DEVICE_ATTR(registers, S_IRUGO, net2272_show_registers, NULL); + +/*---------------------------------------------------------------------------*/ + +static void +net2272_set_fifo_mode(struct net2272 *dev, int mode) +{ + u8 tmp; + + tmp = net2272_read(dev, LOCCTL) & 0x3f; + tmp |= (mode << 6); + net2272_write(dev, LOCCTL, tmp); + + INIT_LIST_HEAD(&dev->gadget.ep_list); + + /* always ep-a, ep-c ... maybe not ep-b */ + list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list); + + switch (mode) { + case 0: + list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); + dev->ep[1].fifo_size = dev->ep[2].fifo_size = 512; + break; + case 1: + list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); + dev->ep[1].fifo_size = 1024; + dev->ep[2].fifo_size = 512; + break; + case 2: + list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); + dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024; + break; + case 3: + dev->ep[1].fifo_size = 1024; + break; + } + + /* ep-c is always 2 512 byte buffers */ + list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); + dev->ep[3].fifo_size = 512; +} + +/*---------------------------------------------------------------------------*/ + +static struct net2272 *the_controller; + +static void +net2272_usb_reset(struct net2272 *dev) +{ + dev->gadget.speed = USB_SPEED_UNKNOWN; + + net2272_cancel_dma(dev); + + net2272_write(dev, IRQENB0, 0); + net2272_write(dev, IRQENB1, 0); + + /* clear irq state */ + net2272_write(dev, IRQSTAT0, 0xff); + net2272_write(dev, IRQSTAT1, ~(1 << SUSPEND_REQUEST_INTERRUPT)); + + net2272_write(dev, DMAREQ, + (0 << DMA_BUFFER_VALID) | + (0 << DMA_REQUEST_ENABLE) | + (1 << DMA_CONTROL_DACK) | + (dev->dma_eot_polarity << EOT_POLARITY) | + (dev->dma_dack_polarity << DACK_POLARITY) | + (dev->dma_dreq_polarity << DREQ_POLARITY) | + ((dma_ep >> 1) << DMA_ENDPOINT_SELECT)); + + net2272_cancel_dma(dev); + net2272_set_fifo_mode(dev, (fifo_mode <= 3) ? fifo_mode : 0); + + /* Set the NET2272 ep fifo data width to 16-bit mode and for correct byte swapping + * note that the higher level gadget drivers are expected to convert data to little endian. + * Enable byte swap for your local bus/cpu if needed by setting BYTE_SWAP in LOCCTL here + */ + net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) | (1 << DATA_WIDTH)); + net2272_write(dev, LOCCTL1, (dma_mode << DMA_MODE)); +} + +static void +net2272_usb_reinit(struct net2272 *dev) +{ + int i; + + /* basic endpoint init */ + for (i = 0; i < 4; ++i) { + struct net2272_ep *ep = &dev->ep[i]; + + ep->ep.name = ep_name[i]; + ep->dev = dev; + ep->num = i; + ep->not_empty = 0; + + if (use_dma && ep->num == dma_ep) + ep->dma = 1; + + if (i > 0 && i <= 3) + ep->fifo_size = 512; + else + ep->fifo_size = 64; + net2272_ep_reset(ep); + } + dev->ep[0].ep.maxpacket = 64; + + dev->gadget.ep0 = &dev->ep[0].ep; + dev->ep[0].stopped = 0; + INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); +} + +static void +net2272_ep0_start(struct net2272 *dev) +{ + struct net2272_ep *ep0 = &dev->ep[0]; + + net2272_ep_write(ep0, EP_RSPSET, + (1 << NAK_OUT_PACKETS_MODE) | + (1 << ALT_NAK_OUT_PACKETS)); + net2272_ep_write(ep0, EP_RSPCLR, + (1 << HIDE_STATUS_PHASE) | + (1 << CONTROL_STATUS_PHASE_HANDSHAKE)); + net2272_write(dev, USBCTL0, + (dev->softconnect << USB_DETECT_ENABLE) | + (1 << USB_ROOT_PORT_WAKEUP_ENABLE) | + (1 << IO_WAKEUP_ENABLE)); + net2272_write(dev, IRQENB0, + (1 << SETUP_PACKET_INTERRUPT_ENABLE) | + (1 << ENDPOINT_0_INTERRUPT_ENABLE) | + (1 << DMA_DONE_INTERRUPT_ENABLE)); + net2272_write(dev, IRQENB1, + (1 << VBUS_INTERRUPT_ENABLE) | + (1 << ROOT_PORT_RESET_INTERRUPT_ENABLE) | + (1 << SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE)); +} + +/* when a driver is successfully registered, it will receive + * control requests including set_configuration(), which enables + * non-control requests. then usb traffic follows until a + * disconnect is reported. then a host may connect again, or + * the driver might get unbound. + */ +int usb_gadget_probe_driver(struct usb_gadget_driver *driver, + int (*bind)(struct usb_gadget *)) +{ + struct net2272 *dev = the_controller; + int ret; + unsigned i; + + if (!driver || !bind || !driver->unbind || !driver->setup || + driver->speed != USB_SPEED_HIGH) + return -EINVAL; + if (!dev) + return -ENODEV; + if (dev->driver) + return -EBUSY; + + for (i = 0; i < 4; ++i) + dev->ep[i].irqs = 0; + /* hook up the driver ... */ + dev->softconnect = 1; + driver->driver.bus = NULL; + dev->driver = driver; + dev->gadget.dev.driver = &driver->driver; + ret = bind(&dev->gadget); + if (ret) { + dev_dbg(dev->dev, "bind to driver %s --> %d\n", + driver->driver.name, ret); + dev->driver = NULL; + dev->gadget.dev.driver = NULL; + return ret; + } + + /* ... then enable host detection and ep0; and we're ready + * for set_configuration as well as eventual disconnect. + */ + net2272_ep0_start(dev); + + dev_dbg(dev->dev, "%s ready\n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL(usb_gadget_probe_driver); + +static void +stop_activity(struct net2272 *dev, struct usb_gadget_driver *driver) +{ + int i; + + /* don't disconnect if it's not connected */ + if (dev->gadget.speed == USB_SPEED_UNKNOWN) + driver = NULL; + + /* stop hardware; prevent new request submissions; + * and kill any outstanding requests. + */ + net2272_usb_reset(dev); + for (i = 0; i < 4; ++i) + net2272_dequeue_all(&dev->ep[i]); + + /* report disconnect; the driver is already quiesced */ + if (driver) { + spin_unlock(&dev->lock); + driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + + } + net2272_usb_reinit(dev); +} + +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) +{ + struct net2272 *dev = the_controller; + unsigned long flags; + + if (!dev) + return -ENODEV; + if (!driver || driver != dev->driver) + return -EINVAL; + + spin_lock_irqsave(&dev->lock, flags); + stop_activity(dev, driver); + spin_unlock_irqrestore(&dev->lock, flags); + + net2272_pullup(&dev->gadget, 0); + + driver->unbind(&dev->gadget); + dev->gadget.dev.driver = NULL; + dev->driver = NULL; + + dev_dbg(dev->dev, "unregistered driver '%s'\n", driver->driver.name); + return 0; +} +EXPORT_SYMBOL(usb_gadget_unregister_driver); + +/*---------------------------------------------------------------------------*/ +/* handle ep-a/ep-b dma completions */ +static void +net2272_handle_dma(struct net2272_ep *ep) +{ + struct net2272_request *req; + unsigned len; + int status; + + if (!list_empty(&ep->queue)) + req = list_entry(ep->queue.next, + struct net2272_request, queue); + else + req = NULL; + + dev_vdbg(ep->dev->dev, "handle_dma %s req %p\n", ep->ep.name, req); + + /* Ensure DREQ is de-asserted */ + net2272_write(ep->dev, DMAREQ, + (0 << DMA_BUFFER_VALID) + | (0 << DMA_REQUEST_ENABLE) + | (1 << DMA_CONTROL_DACK) + | (ep->dev->dma_eot_polarity << EOT_POLARITY) + | (ep->dev->dma_dack_polarity << DACK_POLARITY) + | (ep->dev->dma_dreq_polarity << DREQ_POLARITY) + | ((ep->dma >> 1) << DMA_ENDPOINT_SELECT)); + + ep->dev->dma_busy = 0; + + net2272_ep_write(ep, EP_IRQENB, + (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) + | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE) + | net2272_ep_read(ep, EP_IRQENB)); + + /* device-to-host transfer completed */ + if (ep->is_in) { + /* validate a short packet or zlp if necessary */ + if ((req->req.length % ep->ep.maxpacket != 0) || + req->req.zero) + set_fifo_bytecount(ep, 0); + + net2272_done(ep, req, 0); + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct net2272_request, queue); + status = net2272_kick_dma(ep, req); + if (status < 0) + net2272_pio_advance(ep); + } + + /* host-to-device transfer completed */ + } else { + /* terminated with a short packet? */ + if (net2272_read(ep->dev, IRQSTAT0) & + (1 << DMA_DONE_INTERRUPT)) { + /* abort system dma */ + net2272_cancel_dma(ep->dev); + } + + /* EP_TRANSFER will contain the number of bytes + * actually received. + * NOTE: There is no overflow detection on EP_TRANSFER: + * We can't deal with transfers larger than 2^24 bytes! + */ + len = (net2272_ep_read(ep, EP_TRANSFER2) << 16) + | (net2272_ep_read(ep, EP_TRANSFER1) << 8) + | (net2272_ep_read(ep, EP_TRANSFER0)); + + if (ep->not_empty) + len += 4; + + req->req.actual += len; + + /* get any remaining data */ + net2272_pio_advance(ep); + } +} + +/*---------------------------------------------------------------------------*/ + +static void +net2272_handle_ep(struct net2272_ep *ep) +{ + struct net2272_request *req; + u8 stat0, stat1; + + if (!list_empty(&ep->queue)) + req = list_entry(ep->queue.next, + struct net2272_request, queue); + else + req = NULL; + + /* ack all, and handle what we care about */ + stat0 = net2272_ep_read(ep, EP_STAT0); + stat1 = net2272_ep_read(ep, EP_STAT1); + ep->irqs++; + + dev_vdbg(ep->dev->dev, "%s ack ep_stat0 %02x, ep_stat1 %02x, req %p\n", + ep->ep.name, stat0, stat1, req ? &req->req : 0); + + net2272_ep_write(ep, EP_STAT0, stat0 & + ~((1 << NAK_OUT_PACKETS) + | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT))); + net2272_ep_write(ep, EP_STAT1, stat1); + + /* data packet(s) received (in the fifo, OUT) + * direction must be validated, otherwise control read status phase + * could be interpreted as a valid packet + */ + if (!ep->is_in && (stat0 & (1 << DATA_PACKET_RECEIVED_INTERRUPT))) + net2272_pio_advance(ep); + /* data packet(s) transmitted (IN) */ + else if (stat0 & (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)) + net2272_pio_advance(ep); +} + +static struct net2272_ep * +net2272_get_ep_by_addr(struct net2272 *dev, u16 wIndex) +{ + struct net2272_ep *ep; + + if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) + return &dev->ep[0]; + + list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) { + u8 bEndpointAddress; + + if (!ep->desc) + continue; + bEndpointAddress = ep->desc->bEndpointAddress; + if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) + continue; + if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f)) + return ep; + } + return NULL; +} + +/* + * USB Test Packet: + * JKJKJKJK * 9 + * JJKKJJKK * 8 + * JJJJKKKK * 8 + * JJJJJJJKKKKKKK * 8 + * JJJJJJJK * 8 + * {JKKKKKKK * 10}, JK + */ +static const u8 net2272_test_packet[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, + 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, + 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFD, 0x7E +}; + +static void +net2272_set_test_mode(struct net2272 *dev, int mode) +{ + int i; + + /* Disable all net2272 interrupts: + * Nothing but a power cycle should stop the test. + */ + net2272_write(dev, IRQENB0, 0x00); + net2272_write(dev, IRQENB1, 0x00); + + /* Force tranceiver to high-speed */ + net2272_write(dev, XCVRDIAG, 1 << FORCE_HIGH_SPEED); + + net2272_write(dev, PAGESEL, 0); + net2272_write(dev, EP_STAT0, 1 << DATA_PACKET_TRANSMITTED_INTERRUPT); + net2272_write(dev, EP_RSPCLR, + (1 << CONTROL_STATUS_PHASE_HANDSHAKE) + | (1 << HIDE_STATUS_PHASE)); + net2272_write(dev, EP_CFG, 1 << ENDPOINT_DIRECTION); + net2272_write(dev, EP_STAT1, 1 << BUFFER_FLUSH); + + /* wait for status phase to complete */ + while (!(net2272_read(dev, EP_STAT0) & + (1 << DATA_PACKET_TRANSMITTED_INTERRUPT))) + ; + + /* Enable test mode */ + net2272_write(dev, USBTEST, mode); + + /* load test packet */ + if (mode == TEST_PACKET) { + /* switch to 8 bit mode */ + net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) & + ~(1 << DATA_WIDTH)); + + for (i = 0; i < sizeof(net2272_test_packet); ++i) + net2272_write(dev, EP_DATA, net2272_test_packet[i]); + + /* Validate test packet */ + net2272_write(dev, EP_TRANSFER0, 0); + } +} + +static void +net2272_handle_stat0_irqs(struct net2272 *dev, u8 stat) +{ + struct net2272_ep *ep; + u8 num, scratch; + + /* starting a control request? */ + if (unlikely(stat & (1 << SETUP_PACKET_INTERRUPT))) { + union { + u8 raw[8]; + struct usb_ctrlrequest r; + } u; + int tmp = 0; + struct net2272_request *req; + + if (dev->gadget.speed == USB_SPEED_UNKNOWN) { + if (net2272_read(dev, USBCTL1) & (1 << USB_HIGH_SPEED)) + dev->gadget.speed = USB_SPEED_HIGH; + else + dev->gadget.speed = USB_SPEED_FULL; + dev_dbg(dev->dev, "%s speed\n", + (dev->gadget.speed == USB_SPEED_HIGH) ? "high" : "full"); + } + + ep = &dev->ep[0]; + ep->irqs++; + + /* make sure any leftover interrupt state is cleared */ + stat &= ~(1 << ENDPOINT_0_INTERRUPT); + while (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct net2272_request, queue); + net2272_done(ep, req, + (req->req.actual == req->req.length) ? 0 : -EPROTO); + } + ep->stopped = 0; + dev->protocol_stall = 0; + net2272_ep_write(ep, EP_STAT0, + (1 << DATA_IN_TOKEN_INTERRUPT) + | (1 << DATA_OUT_TOKEN_INTERRUPT) + | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT) + | (1 << DATA_PACKET_RECEIVED_INTERRUPT) + | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)); + net2272_ep_write(ep, EP_STAT1, + (1 << TIMEOUT) + | (1 << USB_OUT_ACK_SENT) + | (1 << USB_OUT_NAK_SENT) + | (1 << USB_IN_ACK_RCVD) + | (1 << USB_IN_NAK_SENT) + | (1 << USB_STALL_SENT) + | (1 << LOCAL_OUT_ZLP)); + + /* + * Ensure Control Read pre-validation setting is beyond maximum size + * - Control Writes can leave non-zero values in EP_TRANSFER. If + * an EP0 transfer following the Control Write is a Control Read, + * the NET2272 sees the non-zero EP_TRANSFER as an unexpected + * pre-validation count. + * - Setting EP_TRANSFER beyond the maximum EP0 transfer size ensures + * the pre-validation count cannot cause an unexpected validatation + */ + net2272_write(dev, PAGESEL, 0); + net2272_write(dev, EP_TRANSFER2, 0xff); + net2272_write(dev, EP_TRANSFER1, 0xff); + net2272_write(dev, EP_TRANSFER0, 0xff); + + u.raw[0] = net2272_read(dev, SETUP0); + u.raw[1] = net2272_read(dev, SETUP1); + u.raw[2] = net2272_read(dev, SETUP2); + u.raw[3] = net2272_read(dev, SETUP3); + u.raw[4] = net2272_read(dev, SETUP4); + u.raw[5] = net2272_read(dev, SETUP5); + u.raw[6] = net2272_read(dev, SETUP6); + u.raw[7] = net2272_read(dev, SETUP7); + /* + * If you have a big endian cpu make sure le16_to_cpus + * performs the proper byte swapping here... + */ + le16_to_cpus(&u.r.wValue); + le16_to_cpus(&u.r.wIndex); + le16_to_cpus(&u.r.wLength); + + /* ack the irq */ + net2272_write(dev, IRQSTAT0, 1 << SETUP_PACKET_INTERRUPT); + stat ^= (1 << SETUP_PACKET_INTERRUPT); + + /* watch control traffic at the token level, and force + * synchronization before letting the status phase happen. + */ + ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0; + if (ep->is_in) { + scratch = (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE) + | (1 << DATA_OUT_TOKEN_INTERRUPT_ENABLE) + | (1 << DATA_IN_TOKEN_INTERRUPT_ENABLE); + stop_out_naking(ep); + } else + scratch = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) + | (1 << DATA_OUT_TOKEN_INTERRUPT_ENABLE) + | (1 << DATA_IN_TOKEN_INTERRUPT_ENABLE); + net2272_ep_write(ep, EP_IRQENB, scratch); + + if ((u.r.bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD) + goto delegate; + switch (u.r.bRequest) { + case USB_REQ_GET_STATUS: { + struct net2272_ep *e; + u16 status = 0; + + switch (u.r.bRequestType & USB_RECIP_MASK) { + case USB_RECIP_ENDPOINT: + e = net2272_get_ep_by_addr(dev, u.r.wIndex); + if (!e || u.r.wLength > 2) + goto do_stall; + if (net2272_ep_read(e, EP_RSPSET) & (1 << ENDPOINT_HALT)) + status = __constant_cpu_to_le16(1); + else + status = __constant_cpu_to_le16(0); + + /* don't bother with a request object! */ + net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); + writew(status, net2272_reg_addr(dev, EP_DATA)); + set_fifo_bytecount(&dev->ep[0], 0); + allow_status(ep); + dev_vdbg(dev->dev, "%s stat %02x\n", + ep->ep.name, status); + goto next_endpoints; + case USB_RECIP_DEVICE: + if (u.r.wLength > 2) + goto do_stall; + if (dev->is_selfpowered) + status = (1 << USB_DEVICE_SELF_POWERED); + + /* don't bother with a request object! */ + net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); + writew(status, net2272_reg_addr(dev, EP_DATA)); + set_fifo_bytecount(&dev->ep[0], 0); + allow_status(ep); + dev_vdbg(dev->dev, "device stat %02x\n", status); + goto next_endpoints; + case USB_RECIP_INTERFACE: + if (u.r.wLength > 2) + goto do_stall; + + /* don't bother with a request object! */ + net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); + writew(status, net2272_reg_addr(dev, EP_DATA)); + set_fifo_bytecount(&dev->ep[0], 0); + allow_status(ep); + dev_vdbg(dev->dev, "interface status %02x\n", status); + goto next_endpoints; + } + + break; + } + case USB_REQ_CLEAR_FEATURE: { + struct net2272_ep *e; + + if (u.r.bRequestType != USB_RECIP_ENDPOINT) + goto delegate; + if (u.r.wValue != USB_ENDPOINT_HALT || + u.r.wLength != 0) + goto do_stall; + e = net2272_get_ep_by_addr(dev, u.r.wIndex); + if (!e) + goto do_stall; + if (e->wedged) { + dev_vdbg(dev->dev, "%s wedged, halt not cleared\n", + ep->ep.name); + } else { + dev_vdbg(dev->dev, "%s clear halt\n", ep->ep.name); + clear_halt(e); + } + allow_status(ep); + goto next_endpoints; + } + case USB_REQ_SET_FEATURE: { + struct net2272_ep *e; + + if (u.r.bRequestType == USB_RECIP_DEVICE) { + if (u.r.wIndex != NORMAL_OPERATION) + net2272_set_test_mode(dev, (u.r.wIndex >> 8)); + allow_status(ep); + dev_vdbg(dev->dev, "test mode: %d\n", u.r.wIndex); + goto next_endpoints; + } else if (u.r.bRequestType != USB_RECIP_ENDPOINT) + goto delegate; + if (u.r.wValue != USB_ENDPOINT_HALT || + u.r.wLength != 0) + goto do_stall; + e = net2272_get_ep_by_addr(dev, u.r.wIndex); + if (!e) + goto do_stall; + set_halt(e); + allow_status(ep); + dev_vdbg(dev->dev, "%s set halt\n", ep->ep.name); + goto next_endpoints; + } + case USB_REQ_SET_ADDRESS: { + net2272_write(dev, OURADDR, u.r.wValue & 0xff); + allow_status(ep); + break; + } + default: + delegate: + dev_vdbg(dev->dev, "setup %02x.%02x v%04x i%04x " + "ep_cfg %08x\n", + u.r.bRequestType, u.r.bRequest, + u.r.wValue, u.r.wIndex, + net2272_ep_read(ep, EP_CFG)); + spin_unlock(&dev->lock); + tmp = dev->driver->setup(&dev->gadget, &u.r); + spin_lock(&dev->lock); + } + + /* stall ep0 on error */ + if (tmp < 0) { + do_stall: + dev_vdbg(dev->dev, "req %02x.%02x protocol STALL; stat %d\n", + u.r.bRequestType, u.r.bRequest, tmp); + dev->protocol_stall = 1; + } + /* endpoint dma irq? */ + } else if (stat & (1 << DMA_DONE_INTERRUPT)) { + net2272_cancel_dma(dev); + net2272_write(dev, IRQSTAT0, 1 << DMA_DONE_INTERRUPT); + stat &= ~(1 << DMA_DONE_INTERRUPT); + num = (net2272_read(dev, DMAREQ) & (1 << DMA_ENDPOINT_SELECT)) + ? 2 : 1; + + ep = &dev->ep[num]; + net2272_handle_dma(ep); + } + + next_endpoints: + /* endpoint data irq? */ + scratch = stat & 0x0f; + stat &= ~0x0f; + for (num = 0; scratch; num++) { + u8 t; + + /* does this endpoint's FIFO and queue need tending? */ + t = 1 << num; + if ((scratch & t) == 0) + continue; + scratch ^= t; + + ep = &dev->ep[num]; + net2272_handle_ep(ep); + } + + /* some interrupts we can just ignore */ + stat &= ~(1 << SOF_INTERRUPT); + + if (stat) + dev_dbg(dev->dev, "unhandled irqstat0 %02x\n", stat); +} + +static void +net2272_handle_stat1_irqs(struct net2272 *dev, u8 stat) +{ + u8 tmp, mask; + + /* after disconnect there's nothing else to do! */ + tmp = (1 << VBUS_INTERRUPT) | (1 << ROOT_PORT_RESET_INTERRUPT); + mask = (1 << USB_HIGH_SPEED) | (1 << USB_FULL_SPEED); + + if (stat & tmp) { + net2272_write(dev, IRQSTAT1, tmp); + if ((((stat & (1 << ROOT_PORT_RESET_INTERRUPT)) && + ((net2272_read(dev, USBCTL1) & mask) == 0)) + || ((net2272_read(dev, USBCTL1) & (1 << VBUS_PIN)) + == 0)) + && (dev->gadget.speed != USB_SPEED_UNKNOWN)) { + dev_dbg(dev->dev, "disconnect %s\n", + dev->driver->driver.name); + stop_activity(dev, dev->driver); + net2272_ep0_start(dev); + return; + } + stat &= ~tmp; + + if (!stat) + return; + } + + tmp = (1 << SUSPEND_REQUEST_CHANGE_INTERRUPT); + if (stat & tmp) { + net2272_write(dev, IRQSTAT1, tmp); + if (stat & (1 << SUSPEND_REQUEST_INTERRUPT)) { + if (dev->driver->suspend) + dev->driver->suspend(&dev->gadget); + if (!enable_suspend) { + stat &= ~(1 << SUSPEND_REQUEST_INTERRUPT); + dev_dbg(dev->dev, "Suspend disabled, ignoring\n"); + } + } else { + if (dev->driver->resume) + dev->driver->resume(&dev->gadget); + } + stat &= ~tmp; + } + + /* clear any other status/irqs */ + if (stat) + net2272_write(dev, IRQSTAT1, stat); + + /* some status we can just ignore */ + stat &= ~((1 << CONTROL_STATUS_INTERRUPT) + | (1 << SUSPEND_REQUEST_INTERRUPT) + | (1 << RESUME_INTERRUPT)); + if (!stat) + return; + else + dev_dbg(dev->dev, "unhandled irqstat1 %02x\n", stat); +} + +static irqreturn_t net2272_irq(int irq, void *_dev) +{ + struct net2272 *dev = _dev; +#if defined(PLX_PCI_RDK) || defined(PLX_PCI_RDK2) + u32 intcsr; +#endif +#if defined(PLX_PCI_RDK) + u8 dmareq; +#endif + spin_lock(&dev->lock); +#if defined(PLX_PCI_RDK) + intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR); + + if ((intcsr & LOCAL_INTERRUPT_TEST) == LOCAL_INTERRUPT_TEST) { + writel(intcsr & ~(1 << PCI_INTERRUPT_ENABLE), + dev->rdk1.plx9054_base_addr + INTCSR); + net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1)); + net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0)); + intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR); + writel(intcsr | (1 << PCI_INTERRUPT_ENABLE), + dev->rdk1.plx9054_base_addr + INTCSR); + } + if ((intcsr & DMA_CHANNEL_0_TEST) == DMA_CHANNEL_0_TEST) { + writeb((1 << CHANNEL_CLEAR_INTERRUPT | (0 << CHANNEL_ENABLE)), + dev->rdk1.plx9054_base_addr + DMACSR0); + + dmareq = net2272_read(dev, DMAREQ); + if (dmareq & 0x01) + net2272_handle_dma(&dev->ep[2]); + else + net2272_handle_dma(&dev->ep[1]); + } +#endif +#if defined(PLX_PCI_RDK2) + /* see if PCI int for us by checking irqstat */ + intcsr = readl(dev->rdk2.fpga_base_addr + RDK2_IRQSTAT); + if (!intcsr & (1 << NET2272_PCI_IRQ)) + return IRQ_NONE; + /* check dma interrupts */ +#endif + /* Platform/devcice interrupt handler */ +#if !defined(PLX_PCI_RDK) + net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1)); + net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0)); +#endif + spin_unlock(&dev->lock); + + return IRQ_HANDLED; +} + +static int net2272_present(struct net2272 *dev) +{ + /* + * Quick test to see if CPU can communicate properly with the NET2272. + * Verifies connection using writes and reads to write/read and + * read-only registers. + * + * This routine is strongly recommended especially during early bring-up + * of new hardware, however for designs that do not apply Power On System + * Tests (POST) it may discarded (or perhaps minimized). + */ + unsigned int ii; + u8 val, refval; + + /* Verify NET2272 write/read SCRATCH register can write and read */ + refval = net2272_read(dev, SCRATCH); + for (ii = 0; ii < 0x100; ii += 7) { + net2272_write(dev, SCRATCH, ii); + val = net2272_read(dev, SCRATCH); + if (val != ii) { + dev_dbg(dev->dev, + "%s: write/read SCRATCH register test failed: " + "wrote:0x%2.2x, read:0x%2.2x\n", + __func__, ii, val); + return -EINVAL; + } + } + /* To be nice, we write the original SCRATCH value back: */ + net2272_write(dev, SCRATCH, refval); + + /* Verify NET2272 CHIPREV register is read-only: */ + refval = net2272_read(dev, CHIPREV_2272); + for (ii = 0; ii < 0x100; ii += 7) { + net2272_write(dev, CHIPREV_2272, ii); + val = net2272_read(dev, CHIPREV_2272); + if (val != refval) { + dev_dbg(dev->dev, + "%s: write/read CHIPREV register test failed: " + "wrote 0x%2.2x, read:0x%2.2x expected:0x%2.2x\n", + __func__, ii, val, refval); + return -EINVAL; + } + } + + /* + * Verify NET2272's "NET2270 legacy revision" register + * - NET2272 has two revision registers. The NET2270 legacy revision + * register should read the same value, regardless of the NET2272 + * silicon revision. The legacy register applies to NET2270 + * firmware being applied to the NET2272. + */ + val = net2272_read(dev, CHIPREV_LEGACY); + if (val != NET2270_LEGACY_REV) { + /* + * Unexpected legacy revision value + * - Perhaps the chip is a NET2270? + */ + dev_dbg(dev->dev, + "%s: WARNING: UNEXPECTED NET2272 LEGACY REGISTER VALUE:\n" + " - CHIPREV_LEGACY: expected 0x%2.2x, got:0x%2.2x. (Not NET2272?)\n", + __func__, NET2270_LEGACY_REV, val); + return -EINVAL; + } + + /* + * Verify NET2272 silicon revision + * - This revision register is appropriate for the silicon version + * of the NET2272 + */ + val = net2272_read(dev, CHIPREV_2272); + switch (val) { + case CHIPREV_NET2272_R1: + /* + * NET2272 Rev 1 has DMA related errata: + * - Newer silicon (Rev 1A or better) required + */ + dev_dbg(dev->dev, + "%s: Rev 1 detected: newer silicon recommended for DMA support\n", + __func__); + break; + case CHIPREV_NET2272_R1A: + break; + default: + /* NET2272 silicon version *may* not work with this firmware */ + dev_dbg(dev->dev, + "%s: unexpected silicon revision register value: " + " CHIPREV_2272: 0x%2.2x\n", + __func__, val); + /* + * Return Success, even though the chip rev is not an expected value + * - Older, pre-built firmware can attempt to operate on newer silicon + * - Often, new silicon is perfectly compatible + */ + } + + /* Success: NET2272 checks out OK */ + return 0; +} + +static void +net2272_gadget_release(struct device *_dev) +{ + struct net2272 *dev = dev_get_drvdata(_dev); + kfree(dev); +} + +/*---------------------------------------------------------------------------*/ + +static void __devexit +net2272_remove(struct net2272 *dev) +{ + /* start with the driver above us */ + if (dev->driver) { + /* should have been done already by driver model core */ + dev_warn(dev->dev, "pci remove, driver '%s' is still registered\n", + dev->driver->driver.name); + usb_gadget_unregister_driver(dev->driver); + } + + free_irq(dev->irq, dev); + iounmap(dev->base_addr); + + device_unregister(&dev->gadget.dev); + device_remove_file(dev->dev, &dev_attr_registers); + + dev_info(dev->dev, "unbind\n"); + the_controller = NULL; +} + +static struct net2272 * __devinit +net2272_probe_init(struct device *dev, unsigned int irq) +{ + struct net2272 *ret; + + if (the_controller) { + dev_warn(dev, "ignoring\n"); + return ERR_PTR(-EBUSY); + } + + if (!irq) { + dev_dbg(dev, "No IRQ!\n"); + return ERR_PTR(-ENODEV); + } + + /* alloc, and start init */ + ret = kzalloc(sizeof(*ret), GFP_KERNEL); + if (!ret) + return ERR_PTR(-ENOMEM); + + spin_lock_init(&ret->lock); + ret->irq = irq; + ret->dev = dev; + ret->gadget.ops = &net2272_ops; + ret->gadget.is_dualspeed = 1; + + /* the "gadget" abstracts/virtualizes the controller */ + dev_set_name(&ret->gadget.dev, "gadget"); + ret->gadget.dev.parent = dev; + ret->gadget.dev.dma_mask = dev->dma_mask; + ret->gadget.dev.release = net2272_gadget_release; + ret->gadget.name = driver_name; + + return ret; +} + +static int __devinit +net2272_probe_fin(struct net2272 *dev, unsigned int irqflags) +{ + int ret; + + /* See if there... */ + if (net2272_present(dev)) { + dev_warn(dev->dev, "2272 not found!\n"); + ret = -ENODEV; + goto err; + } + + net2272_usb_reset(dev); + net2272_usb_reinit(dev); + + ret = request_irq(dev->irq, net2272_irq, irqflags, driver_name, dev); + if (ret) { + dev_err(dev->dev, "request interrupt %i failed\n", dev->irq); + goto err; + } + + dev->chiprev = net2272_read(dev, CHIPREV_2272); + + /* done */ + dev_info(dev->dev, "%s\n", driver_desc); + dev_info(dev->dev, "irq %i, mem %p, chip rev %04x, dma %s\n", + dev->irq, dev->base_addr, dev->chiprev, + dma_mode_string()); + dev_info(dev->dev, "version: %s\n", driver_vers); + + the_controller = dev; + + ret = device_register(&dev->gadget.dev); + if (ret) + goto err_irq; + ret = device_create_file(dev->dev, &dev_attr_registers); + if (ret) + goto err_dev_reg; + + return 0; + + err_dev_reg: + device_unregister(&dev->gadget.dev); + err_irq: + free_irq(dev->irq, dev); + err: + return ret; +} + +#ifdef CONFIG_PCI + +/* + * wrap this driver around the specified device, but + * don't respond over USB until a gadget driver binds to us + */ + +static int __devinit +net2272_rdk1_probe(struct pci_dev *pdev, struct net2272 *dev) +{ + unsigned long resource, len, tmp; + void __iomem *mem_mapped_addr[4]; + int ret, i; + + /* + * BAR 0 holds PLX 9054 config registers + * BAR 1 is i/o memory; unused here + * BAR 2 holds EPLD config registers + * BAR 3 holds NET2272 registers + */ + + /* Find and map all address spaces */ + for (i = 0; i < 4; ++i) { + if (i == 1) + continue; /* BAR1 unused */ + + resource = pci_resource_start(pdev, i); + len = pci_resource_len(pdev, i); + + if (!request_mem_region(resource, len, driver_name)) { + dev_dbg(dev->dev, "controller already in use\n"); + ret = -EBUSY; + goto err; + } + + mem_mapped_addr[i] = ioremap_nocache(resource, len); + if (mem_mapped_addr[i] == NULL) { + release_mem_region(resource, len); + dev_dbg(dev->dev, "can't map memory\n"); + ret = -EFAULT; + goto err; + } + } + + dev->rdk1.plx9054_base_addr = mem_mapped_addr[0]; + dev->rdk1.epld_base_addr = mem_mapped_addr[2]; + dev->base_addr = mem_mapped_addr[3]; + + /* Set PLX 9054 bus width (16 bits) */ + tmp = readl(dev->rdk1.plx9054_base_addr + LBRD1); + writel((tmp & ~(3 << MEMORY_SPACE_LOCAL_BUS_WIDTH)) | W16_BIT, + dev->rdk1.plx9054_base_addr + LBRD1); + + /* Enable PLX 9054 Interrupts */ + writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) | + (1 << PCI_INTERRUPT_ENABLE) | + (1 << LOCAL_INTERRUPT_INPUT_ENABLE), + dev->rdk1.plx9054_base_addr + INTCSR); + + writeb((1 << CHANNEL_CLEAR_INTERRUPT | (0 << CHANNEL_ENABLE)), + dev->rdk1.plx9054_base_addr + DMACSR0); + + /* reset */ + writeb((1 << EPLD_DMA_ENABLE) | + (1 << DMA_CTL_DACK) | + (1 << DMA_TIMEOUT_ENABLE) | + (1 << USER) | + (0 << MPX_MODE) | + (1 << BUSWIDTH) | + (1 << NET2272_RESET), + dev->base_addr + EPLD_IO_CONTROL_REGISTER); + + mb(); + writeb(readb(dev->base_addr + EPLD_IO_CONTROL_REGISTER) & + ~(1 << NET2272_RESET), + dev->base_addr + EPLD_IO_CONTROL_REGISTER); + udelay(200); + + return 0; + + err: + while (--i >= 0) { + iounmap(mem_mapped_addr[i]); + release_mem_region(pci_resource_start(pdev, i), + pci_resource_len(pdev, i)); + } + + return ret; +} + +static int __devinit +net2272_rdk2_probe(struct pci_dev *pdev, struct net2272 *dev) +{ + unsigned long resource, len; + void __iomem *mem_mapped_addr[2]; + int ret, i; + + /* + * BAR 0 holds FGPA config registers + * BAR 1 holds NET2272 registers + */ + + /* Find and map all address spaces, bar2-3 unused in rdk 2 */ + for (i = 0; i < 2; ++i) { + resource = pci_resource_start(pdev, i); + len = pci_resource_len(pdev, i); + + if (!request_mem_region(resource, len, driver_name)) { + dev_dbg(dev->dev, "controller already in use\n"); + ret = -EBUSY; + goto err; + } + + mem_mapped_addr[i] = ioremap_nocache(resource, len); + if (mem_mapped_addr[i] == NULL) { + release_mem_region(resource, len); + dev_dbg(dev->dev, "can't map memory\n"); + ret = -EFAULT; + goto err; + } + } + + dev->rdk2.fpga_base_addr = mem_mapped_addr[0]; + dev->base_addr = mem_mapped_addr[1]; + + mb(); + /* Set 2272 bus width (16 bits) and reset */ + writel((1 << CHIP_RESET), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK); + udelay(200); + writel((1 << BUS_WIDTH), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK); + /* Print fpga version number */ + dev_info(dev->dev, "RDK2 FPGA version %08x\n", + readl(dev->rdk2.fpga_base_addr + RDK2_FPGAREV)); + /* Enable FPGA Interrupts */ + writel((1 << NET2272_PCI_IRQ), dev->rdk2.fpga_base_addr + RDK2_IRQENB); + + return 0; + + err: + while (--i >= 0) { + iounmap(mem_mapped_addr[i]); + release_mem_region(pci_resource_start(pdev, i), + pci_resource_len(pdev, i)); + } + + return ret; +} + +static int __devinit +net2272_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct net2272 *dev; + int ret; + + dev = net2272_probe_init(&pdev->dev, pdev->irq); + if (IS_ERR(dev)) + return PTR_ERR(dev); + dev->dev_id = pdev->device; + + if (pci_enable_device(pdev) < 0) { + ret = -ENODEV; + goto err_free; + } + + pci_set_master(pdev); + + switch (pdev->device) { + case PCI_DEVICE_ID_RDK1: ret = net2272_rdk1_probe(pdev, dev); break; + case PCI_DEVICE_ID_RDK2: ret = net2272_rdk2_probe(pdev, dev); break; + default: BUG(); + } + if (ret) + goto err_pci; + + ret = net2272_probe_fin(dev, 0); + if (ret) + goto err_pci; + + pci_set_drvdata(pdev, dev); + + return 0; + + err_pci: + pci_disable_device(pdev); + err_free: + kfree(dev); + + return ret; +} + +static void __devexit +net2272_rdk1_remove(struct pci_dev *pdev, struct net2272 *dev) +{ + int i; + + /* disable PLX 9054 interrupts */ + writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) & + ~(1 << PCI_INTERRUPT_ENABLE), + dev->rdk1.plx9054_base_addr + INTCSR); + + /* clean up resources allocated during probe() */ + iounmap(dev->rdk1.plx9054_base_addr); + iounmap(dev->rdk1.epld_base_addr); + + for (i = 0; i < 4; ++i) { + if (i == 1) + continue; /* BAR1 unused */ + release_mem_region(pci_resource_start(pdev, i), + pci_resource_len(pdev, i)); + } +} + +static void __devexit +net2272_rdk2_remove(struct pci_dev *pdev, struct net2272 *dev) +{ + int i; + + /* disable fpga interrupts + writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) & + ~(1 << PCI_INTERRUPT_ENABLE), + dev->rdk1.plx9054_base_addr + INTCSR); + */ + + /* clean up resources allocated during probe() */ + iounmap(dev->rdk2.fpga_base_addr); + + for (i = 0; i < 2; ++i) + release_mem_region(pci_resource_start(pdev, i), + pci_resource_len(pdev, i)); +} + +static void __devexit +net2272_pci_remove(struct pci_dev *pdev) +{ + struct net2272 *dev = pci_get_drvdata(pdev); + + net2272_remove(dev); + + switch (pdev->device) { + case PCI_DEVICE_ID_RDK1: net2272_rdk1_remove(pdev, dev); break; + case PCI_DEVICE_ID_RDK2: net2272_rdk2_remove(pdev, dev); break; + default: BUG(); + } + + pci_disable_device(pdev); + + kfree(dev); +} + +/* Table of matching PCI IDs */ +static struct pci_device_id __devinitdata pci_ids[] = { + { /* RDK 1 card */ + .class = ((PCI_CLASS_BRIDGE_OTHER << 8) | 0xfe), + .class_mask = 0, + .vendor = PCI_VENDOR_ID_PLX, + .device = PCI_DEVICE_ID_RDK1, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + }, + { /* RDK 2 card */ + .class = ((PCI_CLASS_BRIDGE_OTHER << 8) | 0xfe), + .class_mask = 0, + .vendor = PCI_VENDOR_ID_PLX, + .device = PCI_DEVICE_ID_RDK2, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + }, + { } +}; +MODULE_DEVICE_TABLE(pci, pci_ids); + +static struct pci_driver net2272_pci_driver = { + .name = driver_name, + .id_table = pci_ids, + + .probe = net2272_pci_probe, + .remove = __devexit_p(net2272_pci_remove), +}; + +#else +# define pci_register_driver(x) 1 +# define pci_unregister_driver(x) 1 +#endif + +/*---------------------------------------------------------------------------*/ + +static int __devinit +net2272_plat_probe(struct platform_device *pdev) +{ + struct net2272 *dev; + int ret; + unsigned int irqflags; + resource_size_t base, len; + struct resource *iomem, *iomem_bus, *irq_res; + + irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + iomem_bus = platform_get_resource(pdev, IORESOURCE_BUS, 0); + if (!irq_res || !iomem) { + dev_err(&pdev->dev, "must provide irq/base addr"); + return -EINVAL; + } + + dev = net2272_probe_init(&pdev->dev, irq_res->start); + if (IS_ERR(dev)) + return PTR_ERR(dev); + + irqflags = 0; + if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE) + irqflags |= IRQF_TRIGGER_RISING; + if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE) + irqflags |= IRQF_TRIGGER_FALLING; + if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL) + irqflags |= IRQF_TRIGGER_HIGH; + if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL) + irqflags |= IRQF_TRIGGER_LOW; + + base = iomem->start; + len = resource_size(iomem); + if (iomem_bus) + dev->base_shift = iomem_bus->start; + + if (!request_mem_region(base, len, driver_name)) { + dev_dbg(dev->dev, "get request memory region!\n"); + ret = -EBUSY; + goto err; + } + dev->base_addr = ioremap_nocache(base, len); + if (!dev->base_addr) { + dev_dbg(dev->dev, "can't map memory\n"); + ret = -EFAULT; + goto err_req; + } + + ret = net2272_probe_fin(dev, IRQF_TRIGGER_LOW); + if (ret) + goto err_io; + + platform_set_drvdata(pdev, dev); + dev_info(&pdev->dev, "running in 16-bit, %sbyte swap local bus mode\n", + (net2272_read(dev, LOCCTL) & (1 << BYTE_SWAP)) ? "" : "no "); + + the_controller = dev; + + return 0; + + err_io: + iounmap(dev->base_addr); + err_req: + release_mem_region(base, len); + err: + return ret; +} + +static int __devexit +net2272_plat_remove(struct platform_device *pdev) +{ + struct net2272 *dev = platform_get_drvdata(pdev); + + net2272_remove(dev); + + release_mem_region(pdev->resource[0].start, + resource_size(&pdev->resource[0])); + + kfree(dev); + + return 0; +} + +static struct platform_driver net2272_plat_driver = { + .probe = net2272_plat_probe, + .remove = __devexit_p(net2272_plat_remove), + .driver = { + .name = driver_name, + .owner = THIS_MODULE, + }, + /* FIXME .suspend, .resume */ +}; + +static int __init net2272_init(void) +{ + return pci_register_driver(&net2272_pci_driver) & + platform_driver_register(&net2272_plat_driver); +} +module_init(net2272_init); + +static void __exit net2272_cleanup(void) +{ + pci_unregister_driver(&net2272_pci_driver); + platform_driver_unregister(&net2272_plat_driver); +} +module_exit(net2272_cleanup); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR("PLX Technology, Inc."); +MODULE_LICENSE("GPL"); diff --git a/drivers/usb/gadget/net2272.h b/drivers/usb/gadget/net2272.h new file mode 100644 index 0000000..e595057 --- /dev/null +++ b/drivers/usb/gadget/net2272.h @@ -0,0 +1,601 @@ +/* + * PLX NET2272 high/full speed USB device controller + * + * Copyright (C) 2005-2006 PLX Technology, Inc. + * Copyright (C) 2006-2011 Analog Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __NET2272_H__ +#define __NET2272_H__ + +/* Main Registers */ +#define REGADDRPTR 0x00 +#define REGDATA 0x01 +#define IRQSTAT0 0x02 +#define ENDPOINT_0_INTERRUPT 0 +#define ENDPOINT_A_INTERRUPT 1 +#define ENDPOINT_B_INTERRUPT 2 +#define ENDPOINT_C_INTERRUPT 3 +#define VIRTUALIZED_ENDPOINT_INTERRUPT 4 +#define SETUP_PACKET_INTERRUPT 5 +#define DMA_DONE_INTERRUPT 6 +#define SOF_INTERRUPT 7 +#define IRQSTAT1 0x03 +#define CONTROL_STATUS_INTERRUPT 1 +#define VBUS_INTERRUPT 2 +#define SUSPEND_REQUEST_INTERRUPT 3 +#define SUSPEND_REQUEST_CHANGE_INTERRUPT 4 +#define RESUME_INTERRUPT 5 +#define ROOT_PORT_RESET_INTERRUPT 6 +#define RESET_STATUS 7 +#define PAGESEL 0x04 +#define DMAREQ 0x1c +#define DMA_ENDPOINT_SELECT 0 +#define DREQ_POLARITY 1 +#define DACK_POLARITY 2 +#define EOT_POLARITY 3 +#define DMA_CONTROL_DACK 4 +#define DMA_REQUEST_ENABLE 5 +#define DMA_REQUEST 6 +#define DMA_BUFFER_VALID 7 +#define SCRATCH 0x1d +#define IRQENB0 0x20 +#define ENDPOINT_0_INTERRUPT_ENABLE 0 +#define ENDPOINT_A_INTERRUPT_ENABLE 1 +#define ENDPOINT_B_INTERRUPT_ENABLE 2 +#define ENDPOINT_C_INTERRUPT_ENABLE 3 +#define VIRTUALIZED_ENDPOINT_INTERRUPT_ENABLE 4 +#define SETUP_PACKET_INTERRUPT_ENABLE 5 +#define DMA_DONE_INTERRUPT_ENABLE 6 +#define SOF_INTERRUPT_ENABLE 7 +#define IRQENB1 0x21 +#define VBUS_INTERRUPT_ENABLE 2 +#define SUSPEND_REQUEST_INTERRUPT_ENABLE 3 +#define SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE 4 +#define RESUME_INTERRUPT_ENABLE 5 +#define ROOT_PORT_RESET_INTERRUPT_ENABLE 6 +#define LOCCTL 0x22 +#define DATA_WIDTH 0 +#define LOCAL_CLOCK_OUTPUT 1 +#define LOCAL_CLOCK_OUTPUT_OFF 0 +#define LOCAL_CLOCK_OUTPUT_3_75MHZ 1 +#define LOCAL_CLOCK_OUTPUT_7_5MHZ 2 +#define LOCAL_CLOCK_OUTPUT_15MHZ 3 +#define LOCAL_CLOCK_OUTPUT_30MHZ 4 +#define LOCAL_CLOCK_OUTPUT_60MHZ 5 +#define DMA_SPLIT_BUS_MODE 4 +#define BYTE_SWAP 5 +#define BUFFER_CONFIGURATION 6 +#define BUFFER_CONFIGURATION_EPA512_EPB512 0 +#define BUFFER_CONFIGURATION_EPA1024_EPB512 1 +#define BUFFER_CONFIGURATION_EPA1024_EPB1024 2 +#define BUFFER_CONFIGURATION_EPA1024DB 3 +#define CHIPREV_LEGACY 0x23 +#define NET2270_LEGACY_REV 0x40 +#define LOCCTL1 0x24 +#define DMA_MODE 0 +#define SLOW_DREQ 0 +#define FAST_DREQ 1 +#define BURST_MODE 2 +#define DMA_DACK_ENABLE 2 +#define CHIPREV_2272 0x25 +#define CHIPREV_NET2272_R1 0x10 +#define CHIPREV_NET2272_R1A 0x11 +/* USB Registers */ +#define USBCTL0 0x18 +#define IO_WAKEUP_ENABLE 1 +#define USB_DETECT_ENABLE 3 +#define USB_ROOT_PORT_WAKEUP_ENABLE 5 +#define USBCTL1 0x19 +#define VBUS_PIN 0 +#define USB_FULL_SPEED 1 +#define USB_HIGH_SPEED 2 +#define GENERATE_RESUME 3 +#define VIRTUAL_ENDPOINT_ENABLE 4 +#define FRAME0 0x1a +#define FRAME1 0x1b +#define OURADDR 0x30 +#define FORCE_IMMEDIATE 7 +#define USBDIAG 0x31 +#define FORCE_TRANSMIT_CRC_ERROR 0 +#define PREVENT_TRANSMIT_BIT_STUFF 1 +#define FORCE_RECEIVE_ERROR 2 +#define FAST_TIMES 4 +#define USBTEST 0x32 +#define TEST_MODE_SELECT 0 +#define NORMAL_OPERATION 0 +#define TEST_J 1 +#define TEST_K 2 +#define TEST_SE0_NAK 3 +#define TEST_PACKET 4 +#define TEST_FORCE_ENABLE 5 +#define XCVRDIAG 0x33 +#define FORCE_FULL_SPEED 2 +#define FORCE_HIGH_SPEED 3 +#define OPMODE 4 +#define NORMAL_OPERATION 0 +#define NON_DRIVING 1 +#define DISABLE_BITSTUFF_AND_NRZI_ENCODE 2 +#define LINESTATE 6 +#define SE0_STATE 0 +#define J_STATE 1 +#define K_STATE 2 +#define SE1_STATE 3 +#define VIRTOUT0 0x34 +#define VIRTOUT1 0x35 +#define VIRTIN0 0x36 +#define VIRTIN1 0x37 +#define SETUP0 0x40 +#define SETUP1 0x41 +#define SETUP2 0x42 +#define SETUP3 0x43 +#define SETUP4 0x44 +#define SETUP5 0x45 +#define SETUP6 0x46 +#define SETUP7 0x47 +/* Endpoint Registers (Paged via PAGESEL) */ +#define EP_DATA 0x05 +#define EP_STAT0 0x06 +#define DATA_IN_TOKEN_INTERRUPT 0 +#define DATA_OUT_TOKEN_INTERRUPT 1 +#define DATA_PACKET_TRANSMITTED_INTERRUPT 2 +#define DATA_PACKET_RECEIVED_INTERRUPT 3 +#define SHORT_PACKET_TRANSFERRED_INTERRUPT 4 +#define NAK_OUT_PACKETS 5 +#define BUFFER_EMPTY 6 +#define BUFFER_FULL 7 +#define EP_STAT1 0x07 +#define TIMEOUT 0 +#define USB_OUT_ACK_SENT 1 +#define USB_OUT_NAK_SENT 2 +#define USB_IN_ACK_RCVD 3 +#define USB_IN_NAK_SENT 4 +#define USB_STALL_SENT 5 +#define LOCAL_OUT_ZLP 6 +#define BUFFER_FLUSH 7 +#define EP_TRANSFER0 0x08 +#define EP_TRANSFER1 0x09 +#define EP_TRANSFER2 0x0a +#define EP_IRQENB 0x0b +#define DATA_IN_TOKEN_INTERRUPT_ENABLE 0 +#define DATA_OUT_TOKEN_INTERRUPT_ENABLE 1 +#define DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE 2 +#define DATA_PACKET_RECEIVED_INTERRUPT_ENABLE 3 +#define SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE 4 +#define EP_AVAIL0 0x0c +#define EP_AVAIL1 0x0d +#define EP_RSPCLR 0x0e +#define EP_RSPSET 0x0f +#define ENDPOINT_HALT 0 +#define ENDPOINT_TOGGLE 1 +#define NAK_OUT_PACKETS_MODE 2 +#define CONTROL_STATUS_PHASE_HANDSHAKE 3 +#define INTERRUPT_MODE 4 +#define AUTOVALIDATE 5 +#define HIDE_STATUS_PHASE 6 +#define ALT_NAK_OUT_PACKETS 7 +#define EP_MAXPKT0 0x28 +#define EP_MAXPKT1 0x29 +#define ADDITIONAL_TRANSACTION_OPPORTUNITIES 3 +#define NONE_ADDITIONAL_TRANSACTION 0 +#define ONE_ADDITIONAL_TRANSACTION 1 +#define TWO_ADDITIONAL_TRANSACTION 2 +#define EP_CFG 0x2a +#define ENDPOINT_NUMBER 0 +#define ENDPOINT_DIRECTION 4 +#define ENDPOINT_TYPE 5 +#define ENDPOINT_ENABLE 7 +#define EP_HBW 0x2b +#define HIGH_BANDWIDTH_OUT_TRANSACTION_PID 0 +#define DATA0_PID 0 +#define DATA1_PID 1 +#define DATA2_PID 2 +#define MDATA_PID 3 +#define EP_BUFF_STATES 0x2c +#define BUFFER_A_STATE 0 +#define BUFFER_B_STATE 2 +#define BUFF_FREE 0 +#define BUFF_VALID 1 +#define BUFF_LCL 2 +#define BUFF_USB 3 + +/*---------------------------------------------------------------------------*/ + +#define PCI_DEVICE_ID_RDK1 0x9054 + +/* PCI-RDK EPLD Registers */ +#define RDK_EPLD_IO_REGISTER1 0x00000000 +#define RDK_EPLD_USB_RESET 0 +#define RDK_EPLD_USB_POWERDOWN 1 +#define RDK_EPLD_USB_WAKEUP 2 +#define RDK_EPLD_USB_EOT 3 +#define RDK_EPLD_DPPULL 4 +#define RDK_EPLD_IO_REGISTER2 0x00000004 +#define RDK_EPLD_BUSWIDTH 0 +#define RDK_EPLD_USER 2 +#define RDK_EPLD_RESET_INTERRUPT_ENABLE 3 +#define RDK_EPLD_DMA_TIMEOUT_ENABLE 4 +#define RDK_EPLD_STATUS_REGISTER 0x00000008 +#define RDK_EPLD_USB_LRESET 0 +#define RDK_EPLD_REVISION_REGISTER 0x0000000c + +/* PCI-RDK PLX 9054 Registers */ +#define INTCSR 0x68 +#define PCI_INTERRUPT_ENABLE 8 +#define LOCAL_INTERRUPT_INPUT_ENABLE 11 +#define LOCAL_INPUT_INTERRUPT_ACTIVE 15 +#define LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE 18 +#define LOCAL_DMA_CHANNEL_1_INTERRUPT_ENABLE 19 +#define DMA_CHANNEL_0_INTERRUPT_ACTIVE 21 +#define DMA_CHANNEL_1_INTERRUPT_ACTIVE 22 +#define CNTRL 0x6C +#define RELOAD_CONFIGURATION_REGISTERS 29 +#define PCI_ADAPTER_SOFTWARE_RESET 30 +#define DMAMODE0 0x80 +#define LOCAL_BUS_WIDTH 0 +#define INTERNAL_WAIT_STATES 2 +#define TA_READY_INPUT_ENABLE 6 +#define LOCAL_BURST_ENABLE 8 +#define SCATTER_GATHER_MODE 9 +#define DONE_INTERRUPT_ENABLE 10 +#define LOCAL_ADDRESSING_MODE 11 +#define DEMAND_MODE 12 +#define DMA_EOT_ENABLE 14 +#define FAST_SLOW_TERMINATE_MODE_SELECT 15 +#define DMA_CHANNEL_INTERRUPT_SELECT 17 +#define DMAPADR0 0x84 +#define DMALADR0 0x88 +#define DMASIZ0 0x8c +#define DMADPR0 0x90 +#define DESCRIPTOR_LOCATION 0 +#define END_OF_CHAIN 1 +#define INTERRUPT_AFTER_TERMINAL_COUNT 2 +#define DIRECTION_OF_TRANSFER 3 +#define DMACSR0 0xa8 +#define CHANNEL_ENABLE 0 +#define CHANNEL_START 1 +#define CHANNEL_ABORT 2 +#define CHANNEL_CLEAR_INTERRUPT 3 +#define CHANNEL_DONE 4 +#define DMATHR 0xb0 +#define LBRD1 0xf8 +#define MEMORY_SPACE_LOCAL_BUS_WIDTH 0 +#define W8_BIT 0 +#define W16_BIT 1 + +/* Special OR'ing of INTCSR bits */ +#define LOCAL_INTERRUPT_TEST \ + ((1 << LOCAL_INPUT_INTERRUPT_ACTIVE) | \ + (1 << LOCAL_INTERRUPT_INPUT_ENABLE)) + +#define DMA_CHANNEL_0_TEST \ + ((1 << DMA_CHANNEL_0_INTERRUPT_ACTIVE) | \ + (1 << LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE)) + +#define DMA_CHANNEL_1_TEST \ + ((1 << DMA_CHANNEL_1_INTERRUPT_ACTIVE) | \ + (1 << LOCAL_DMA_CHANNEL_1_INTERRUPT_ENABLE)) + +/* EPLD Registers */ +#define RDK_EPLD_IO_REGISTER1 0x00000000 +#define RDK_EPLD_USB_RESET 0 +#define RDK_EPLD_USB_POWERDOWN 1 +#define RDK_EPLD_USB_WAKEUP 2 +#define RDK_EPLD_USB_EOT 3 +#define RDK_EPLD_DPPULL 4 +#define RDK_EPLD_IO_REGISTER2 0x00000004 +#define RDK_EPLD_BUSWIDTH 0 +#define RDK_EPLD_USER 2 +#define RDK_EPLD_RESET_INTERRUPT_ENABLE 3 +#define RDK_EPLD_DMA_TIMEOUT_ENABLE 4 +#define RDK_EPLD_STATUS_REGISTER 0x00000008 +#define RDK_EPLD_USB_LRESET 0 +#define RDK_EPLD_REVISION_REGISTER 0x0000000c + +#define EPLD_IO_CONTROL_REGISTER 0x400 +#define NET2272_RESET 0 +#define BUSWIDTH 1 +#define MPX_MODE 3 +#define USER 4 +#define DMA_TIMEOUT_ENABLE 5 +#define DMA_CTL_DACK 6 +#define EPLD_DMA_ENABLE 7 +#define EPLD_DMA_CONTROL_REGISTER 0x800 +#define SPLIT_DMA_MODE 0 +#define SPLIT_DMA_DIRECTION 1 +#define SPLIT_DMA_ENABLE 2 +#define SPLIT_DMA_INTERRUPT_ENABLE 3 +#define SPLIT_DMA_INTERRUPT 4 +#define EPLD_DMA_MODE 5 +#define EPLD_DMA_CONTROLLER_ENABLE 7 +#define SPLIT_DMA_ADDRESS_LOW 0xc00 +#define SPLIT_DMA_ADDRESS_HIGH 0x1000 +#define SPLIT_DMA_BYTE_COUNT_LOW 0x1400 +#define SPLIT_DMA_BYTE_COUNT_HIGH 0x1800 +#define EPLD_REVISION_REGISTER 0x1c00 +#define SPLIT_DMA_RAM 0x4000 +#define DMA_RAM_SIZE 0x1000 + +/*---------------------------------------------------------------------------*/ + +#define PCI_DEVICE_ID_RDK2 0x3272 + +/* PCI-RDK version 2 registers */ + +/* Main Control Registers */ + +#define RDK2_IRQENB 0x00 +#define RDK2_IRQSTAT 0x04 +#define PB7 23 +#define PB6 22 +#define PB5 21 +#define PB4 20 +#define PB3 19 +#define PB2 18 +#define PB1 17 +#define PB0 16 +#define GP3 23 +#define GP2 23 +#define GP1 23 +#define GP0 23 +#define DMA_RETRY_ABORT 6 +#define DMA_PAUSE_DONE 5 +#define DMA_ABORT_DONE 4 +#define DMA_OUT_FIFO_TRANSFER_DONE 3 +#define DMA_LOCAL_DONE 2 +#define DMA_PCI_DONE 1 +#define NET2272_PCI_IRQ 0 + +#define RDK2_LOCCTLRDK 0x08 +#define CHIP_RESET 3 +#define SPLIT_DMA 2 +#define MULTIPLEX_MODE 1 +#define BUS_WIDTH 0 + +#define RDK2_GPIOCTL 0x10 +#define GP3_OUT_ENABLE 7 +#define GP2_OUT_ENABLE 6 +#define GP1_OUT_ENABLE 5 +#define GP0_OUT_ENABLE 4 +#define GP3_DATA 3 +#define GP2_DATA 2 +#define GP1_DATA 1 +#define GP0_DATA 0 + +#define RDK2_LEDSW 0x14 +#define LED3 27 +#define LED2 26 +#define LED1 25 +#define LED0 24 +#define PBUTTON 16 +#define DIPSW 0 + +#define RDK2_DIAG 0x18 +#define RDK2_FAST_TIMES 2 +#define FORCE_PCI_SERR 1 +#define FORCE_PCI_INT 0 +#define RDK2_FPGAREV 0x1C + +/* Dma Control registers */ +#define RDK2_DMACTL 0x80 +#define ADDR_HOLD 24 +#define RETRY_COUNT 16 /* 23:16 */ +#define FIFO_THRESHOLD 11 /* 15:11 */ +#define MEM_WRITE_INVALIDATE 10 +#define READ_MULTIPLE 9 +#define READ_LINE 8 +#define RDK2_DMA_MODE 6 /* 7:6 */ +#define CONTROL_DACK 5 +#define EOT_ENABLE 4 +#define EOT_POLARITY 3 +#define DACK_POLARITY 2 +#define DREQ_POLARITY 1 +#define DMA_ENABLE 0 + +#define RDK2_DMASTAT 0x84 +#define GATHER_COUNT 12 /* 14:12 */ +#define FIFO_COUNT 6 /* 11:6 */ +#define FIFO_FLUSH 5 +#define FIFO_TRANSFER 4 +#define PAUSE_DONE 3 +#define ABORT_DONE 2 +#define DMA_ABORT 1 +#define DMA_START 0 + +#define RDK2_DMAPCICOUNT 0x88 +#define DMA_DIRECTION 31 +#define DMA_PCI_BYTE_COUNT 0 /* 0:23 */ + +#define RDK2_DMALOCCOUNT 0x8C /* 0:23 dma local byte count */ + +#define RDK2_DMAADDR 0x90 /* 2:31 PCI bus starting address */ + +/*---------------------------------------------------------------------------*/ + +#define REG_INDEXED_THRESHOLD (1 << 5) + +/* DRIVER DATA STRUCTURES and UTILITIES */ +struct net2272_ep { + struct usb_ep ep; + struct net2272 *dev; + unsigned long irqs; + + /* analogous to a host-side qh */ + struct list_head queue; + const struct usb_endpoint_descriptor *desc; + unsigned num:8, + fifo_size:12, + stopped:1, + wedged:1, + is_in:1, + is_iso:1, + dma:1, + not_empty:1; +}; + +struct net2272 { + /* each device provides one gadget, several endpoints */ + struct usb_gadget gadget; + struct device *dev; + unsigned short dev_id; + + spinlock_t lock; + struct net2272_ep ep[4]; + struct usb_gadget_driver *driver; + unsigned protocol_stall:1, + softconnect:1, + is_selfpowered:1, + wakeup:1, + dma_eot_polarity:1, + dma_dack_polarity:1, + dma_dreq_polarity:1, + dma_busy:1; + u16 chiprev; + u8 pagesel; + + unsigned int irq; + unsigned short fifo_mode; + + unsigned int base_shift; + u16 __iomem *base_addr; + union { +#ifdef CONFIG_PCI + struct { + void __iomem *plx9054_base_addr; + void __iomem *epld_base_addr; + } rdk1; + struct { + /* Bar0, Bar1 is base_addr both mem-mapped */ + void __iomem *fpga_base_addr; + } rdk2; +#endif + }; +}; + +static void __iomem * +net2272_reg_addr(struct net2272 *dev, unsigned int reg) +{ + return dev->base_addr + (reg << dev->base_shift); +} + +static void +net2272_write(struct net2272 *dev, unsigned int reg, u8 value) +{ + if (reg >= REG_INDEXED_THRESHOLD) { + /* + * Indexed register; use REGADDRPTR/REGDATA + * - Save and restore REGADDRPTR. This prevents REGADDRPTR from + * changes between other code sections, but it is time consuming. + * - Performance tips: either do not save and restore REGADDRPTR (if it + * is safe) or do save/restore operations only in critical sections. + u8 tmp = readb(dev->base_addr + REGADDRPTR); + */ + writeb((u8)reg, net2272_reg_addr(dev, REGADDRPTR)); + writeb(value, net2272_reg_addr(dev, REGDATA)); + /* writeb(tmp, net2272_reg_addr(dev, REGADDRPTR)); */ + } else + writeb(value, net2272_reg_addr(dev, reg)); +} + +static u8 +net2272_read(struct net2272 *dev, unsigned int reg) +{ + u8 ret; + + if (reg >= REG_INDEXED_THRESHOLD) { + /* + * Indexed register; use REGADDRPTR/REGDATA + * - Save and restore REGADDRPTR. This prevents REGADDRPTR from + * changes between other code sections, but it is time consuming. + * - Performance tips: either do not save and restore REGADDRPTR (if it + * is safe) or do save/restore operations only in critical sections. + u8 tmp = readb(dev->base_addr + REGADDRPTR); + */ + writeb((u8)reg, net2272_reg_addr(dev, REGADDRPTR)); + ret = readb(net2272_reg_addr(dev, REGDATA)); + /* writeb(tmp, net2272_reg_addr(dev, REGADDRPTR)); */ + } else + ret = readb(net2272_reg_addr(dev, reg)); + + return ret; +} + +static void +net2272_ep_write(struct net2272_ep *ep, unsigned int reg, u8 value) +{ + struct net2272 *dev = ep->dev; + + if (dev->pagesel != ep->num) { + net2272_write(dev, PAGESEL, ep->num); + dev->pagesel = ep->num; + } + net2272_write(dev, reg, value); +} + +static u8 +net2272_ep_read(struct net2272_ep *ep, unsigned int reg) +{ + struct net2272 *dev = ep->dev; + + if (dev->pagesel != ep->num) { + net2272_write(dev, PAGESEL, ep->num); + dev->pagesel = ep->num; + } + return net2272_read(dev, reg); +} + +static void allow_status(struct net2272_ep *ep) +{ + /* ep0 only */ + net2272_ep_write(ep, EP_RSPCLR, + (1 << CONTROL_STATUS_PHASE_HANDSHAKE) | + (1 << ALT_NAK_OUT_PACKETS) | + (1 << NAK_OUT_PACKETS_MODE)); + ep->stopped = 1; +} + +static void set_halt(struct net2272_ep *ep) +{ + /* ep0 and bulk/intr endpoints */ + net2272_ep_write(ep, EP_RSPCLR, 1 << CONTROL_STATUS_PHASE_HANDSHAKE); + net2272_ep_write(ep, EP_RSPSET, 1 << ENDPOINT_HALT); +} + +static void clear_halt(struct net2272_ep *ep) +{ + /* ep0 and bulk/intr endpoints */ + net2272_ep_write(ep, EP_RSPCLR, + (1 << ENDPOINT_HALT) | (1 << ENDPOINT_TOGGLE)); +} + +/* count (<= 4) bytes in the next fifo write will be valid */ +static void set_fifo_bytecount(struct net2272_ep *ep, unsigned count) +{ + /* net2272_ep_write will truncate to u8 for us */ + net2272_ep_write(ep, EP_TRANSFER2, count >> 16); + net2272_ep_write(ep, EP_TRANSFER1, count >> 8); + net2272_ep_write(ep, EP_TRANSFER0, count); +} + +struct net2272_request { + struct usb_request req; + struct list_head queue; + unsigned mapped:1, + valid:1; +}; + +#endif -- cgit v0.10.2 From 71f66a6580c4e42df377bebbcca5c72661a40700 Mon Sep 17 00:00:00 2001 From: "Justin P. Mattock" Date: Mon, 6 Jun 2011 09:08:10 -0700 Subject: doc: i2o: fix typo 'Settting' The below patch fixes a typo "Settting" to "Setting". Signed-off-by: Justin P. Mattock Signed-off-by: Jiri Kosina diff --git a/Documentation/i2o/ioctl b/Documentation/i2o/ioctl index 1e77fac..22ca53a 100644 --- a/Documentation/i2o/ioctl +++ b/Documentation/i2o/ioctl @@ -110,7 +110,7 @@ V. Getting Logical Configuration Table ENOBUFS Buffer not large enough. If this occurs, the required buffer length is written into *(lct->reslen) -VI. Settting Parameters +VI. Setting Parameters SYNOPSIS -- cgit v0.10.2 From 325fd182cafe5c5ead51c27afb6b8be83c9081d4 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 7 Jun 2011 15:39:18 +0100 Subject: USB: gadget.h depends on ch9.h so include ch9.h directly The struct definitions are used. Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index dd1571d..55d1a88 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -16,6 +16,7 @@ #define __LINUX_USB_GADGET_H #include +#include struct usb_ep; -- cgit v0.10.2 From e90ed12cc4388d2919823fb31368781baa6dfbe5 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Sat, 4 Jun 2011 09:10:21 +0300 Subject: USB: wusbcore: return negative error codes cbaf_cdid_get() is only used in cbaf_wusb_chid_store(). In the original code cbaf_cdid_get() returns either a negative error code or a small positive value on error. I have changed it to return -ENOENT if there is not enough data available. In the original code the caller changed the negative error codes to positive return values. I've changed it to just return the error value directly. Signed-off-by: Dan Carpenter Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/wusbcore/cbaf.c b/drivers/usb/wusbcore/cbaf.c index c0c5665..200fd7c 100644 --- a/drivers/usb/wusbcore/cbaf.c +++ b/drivers/usb/wusbcore/cbaf.c @@ -298,7 +298,7 @@ static int cbaf_cdid_get(struct cbaf *cbaf) if (result < needed) { dev_err(dev, "Not enough data in DEVICE_INFO reply (%zu vs " "%zu bytes needed)\n", (size_t)result, needed); - return result; + return -ENOENT; } strlcpy(cbaf->device_name, di->DeviceFriendlyName, CBA_NAME_LEN); @@ -350,7 +350,7 @@ static ssize_t cbaf_wusb_chid_store(struct device *dev, return result; result = cbaf_cdid_get(cbaf); if (result < 0) - return -result; + return result; return size; } static DEVICE_ATTR(wusb_chid, 0600, cbaf_wusb_chid_show, cbaf_wusb_chid_store); -- cgit v0.10.2 From cc55687124426e3a6a5301780c4e6bb36bb531fd Mon Sep 17 00:00:00 2001 From: Niels de Vos Date: Tue, 31 May 2011 23:00:10 +0100 Subject: ehci-hcd: remove EOL from MODULE_PARM_DESC for 'hird' option There is no need to have a "\n" on a MODULE_PARM_DESC, remove it Signed-off-by: Niels de Vos Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index b435ed6..e18862c 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -110,7 +110,7 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); /* for link power management(LPM) feature */ static unsigned int hird; module_param(hird, int, S_IRUGO); -MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us\n"); +MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us"); #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) -- cgit v0.10.2 From ad6f2a8bc53b7cc104f481a648ce357528cc08eb Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:17:56 +0900 Subject: usb: renesas_usbhs: modify pipe direction flags Current driver had pipe direction flag which came from usb_endpoint_dir_in(). It means "input direction" for HOST, and "out direction" for Gadget. But driver needs "input direction for pipe". This patch adds IS_DIR_HOST flags and care both "input direction for HOST" and "input direction for pipe" Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index bc4521c..80fc4ad 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -550,12 +550,15 @@ static u16 usbhsp_setup_pipecfg(struct usbhs_pipe *pipe, /* DIR */ if (usb_endpoint_dir_in(desc)) - usbhsp_flags_set(pipe, IS_DIR_IN); + usbhsp_flags_set(pipe, IS_DIR_HOST); if ((is_host && usb_endpoint_dir_out(desc)) || (!is_host && usb_endpoint_dir_in(desc))) dir |= DIR_OUT; + if (!dir) + usbhsp_flags_set(pipe, IS_DIR_IN); + /* SHTNAK */ if (usbhsp_type_is(pipe, USB_ENDPOINT_XFER_BULK) && !dir) @@ -678,6 +681,11 @@ int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe) return usbhsp_flags_has(pipe, IS_DIR_IN); } +int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe) +{ + return usbhsp_flags_has(pipe, IS_DIR_HOST); +} + void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe) { usbhsp_pipectrl_set(pipe, SQCLR, SQCLR); diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 1cca9b7..c906eb6 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -30,6 +30,7 @@ struct usbhs_pipe { u32 flags; #define USBHS_PIPE_FLAGS_IS_USED (1 << 0) #define USBHS_PIPE_FLAGS_IS_DIR_IN (1 << 1) +#define USBHS_PIPE_FLAGS_IS_DIR_HOST (1 << 2) void *mod_private; }; @@ -89,6 +90,7 @@ struct usbhs_pipe const struct usb_endpoint_descriptor *desc); int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe); +int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe); void usbhs_pipe_init(struct usbhs_priv *priv); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); -- cgit v0.10.2 From e8d548d549688d335236f7f6f8bcee141a207ff8 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:03 +0900 Subject: usb: renesas_usbhs: fifo became independent from pipe. Current renesas_usbhs has PIO data transfer mode which controls CFIFO. And it was implemented in pipe.c. But, fifo control method needs more flexible implementation to support DMAEngine. This patch create fifo.c, and it became independent from pipe.c. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/Makefile b/drivers/usb/renesas_usbhs/Makefile index b8798ad..ce08345 100644 --- a/drivers/usb/renesas_usbhs/Makefile +++ b/drivers/usb/renesas_usbhs/Makefile @@ -4,6 +4,6 @@ obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs.o -renesas_usbhs-y := common.o mod.o pipe.o +renesas_usbhs-y := common.o mod.o pipe.o fifo.o renesas_usbhs-$(CONFIG_USB_RENESAS_USBHS_UDC) += mod_gadget.o diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h index 0aadcb4..24f7560 100644 --- a/drivers/usb/renesas_usbhs/common.h +++ b/drivers/usb/renesas_usbhs/common.h @@ -24,6 +24,7 @@ struct usbhs_priv; #include "./mod.h" #include "./pipe.h" +#include "./fifo.h" /* * diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c new file mode 100644 index 0000000..3fd3adf --- /dev/null +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -0,0 +1,211 @@ +/* + * Renesas USB driver + * + * Copyright (C) 2011 Renesas Solutions Corp. + * Kuninori Morimoto + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ +#include +#include +#include "./common.h" +#include "./pipe.h" + +/* + * FIFO ctrl + */ +static void usbhsf_send_terminator(struct usbhs_pipe *pipe) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + + usbhs_bset(priv, CFIFOCTR, BVAL, BVAL); +} + +static int usbhsf_fifo_barrier(struct usbhs_priv *priv) +{ + int timeout = 1024; + + do { + /* The FIFO port is accessible */ + if (usbhs_read(priv, CFIFOCTR) & FRDY) + return 0; + + udelay(10); + } while (timeout--); + + return -EBUSY; +} + +static void usbhsf_fifo_clear(struct usbhs_pipe *pipe) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + + if (!usbhs_pipe_is_dcp(pipe)) + usbhsf_fifo_barrier(priv); + + usbhs_write(priv, CFIFOCTR, BCLR); +} + +static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv) +{ + return usbhs_read(priv, CFIFOCTR) & DTLN_MASK; +} + +static int usbhsf_fifo_select(struct usbhs_pipe *pipe, int write) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct device *dev = usbhs_priv_to_dev(priv); + int timeout = 1024; + u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ + u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ + + if (usbhs_pipe_is_dcp(pipe)) + base |= (1 == write) << 5; /* ISEL */ + + /* "base" will be used below */ + usbhs_write(priv, CFIFOSEL, base | MBW_32); + + /* check ISEL and CURPIPE value */ + while (timeout--) { + if (base == (mask & usbhs_read(priv, CFIFOSEL))) + return 0; + udelay(10); + } + + dev_err(dev, "fifo select error\n"); + + return -EIO; +} + +/* + * PIO fifo functions + */ +int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe) +{ + return usbhsf_fifo_select(pipe, 1); +} + +int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + void __iomem *addr = priv->base + CFIFO; + int maxp = usbhs_pipe_get_maxpacket(pipe); + int total_len; + int i, ret; + + ret = usbhs_pipe_is_accessible(pipe); + if (ret < 0) + return ret; + + ret = usbhsf_fifo_select(pipe, 1); + if (ret < 0) + return ret; + + ret = usbhsf_fifo_barrier(priv); + if (ret < 0) + return ret; + + len = min(len, maxp); + total_len = len; + + /* + * FIXME + * + * 32-bit access only + */ + if (len >= 4 && + !((unsigned long)buf & 0x03)) { + iowrite32_rep(addr, buf, len / 4); + len %= 4; + buf += total_len - len; + } + + /* the rest operation */ + for (i = 0; i < len; i++) + iowrite8(buf[i], addr + (0x03 - (i & 0x03))); + + if (total_len < maxp) + usbhsf_send_terminator(pipe); + + return total_len; +} + +int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) +{ + int ret; + + /* + * select pipe and enable it to prepare packet receive + */ + ret = usbhsf_fifo_select(pipe, 0); + if (ret < 0) + return ret; + + usbhs_pipe_enable(pipe); + + return ret; +} + +int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + void __iomem *addr = priv->base + CFIFO; + int rcv_len; + int i, ret; + int total_len; + u32 data = 0; + + ret = usbhsf_fifo_select(pipe, 0); + if (ret < 0) + return ret; + + ret = usbhsf_fifo_barrier(priv); + if (ret < 0) + return ret; + + rcv_len = usbhsf_fifo_rcv_len(priv); + + /* + * Buffer clear if Zero-Length packet + * + * see + * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" + */ + if (0 == rcv_len) { + usbhsf_fifo_clear(pipe); + return 0; + } + + len = min(rcv_len, len); + total_len = len; + + /* + * FIXME + * + * 32-bit access only + */ + if (len >= 4 && + !((unsigned long)buf & 0x03)) { + ioread32_rep(addr, buf, len / 4); + len %= 4; + buf += rcv_len - len; + } + + /* the rest operation */ + for (i = 0; i < len; i++) { + if (!(i & 0x03)) + data = ioread32(addr); + + buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; + } + + return total_len; +} diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h new file mode 100644 index 0000000..75a7c15 --- /dev/null +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -0,0 +1,30 @@ +/* + * Renesas USB driver + * + * Copyright (C) 2011 Renesas Solutions Corp. + * Kuninori Morimoto + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ +#ifndef RENESAS_USB_FIFO_H +#define RENESAS_USB_FIFO_H + +#include "common.h" + +/* + * fifo + */ +int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len); +int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len); +int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe); +int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); + +#endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 206cfab..128c8da 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -376,7 +376,7 @@ static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, * - after callback_update, * - before queue_pop / stage_end */ - usbhs_fifo_enable(pipe); + usbhs_pipe_enable(pipe); /* * all data were sent ? @@ -454,7 +454,7 @@ static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, int disable = 0; uep->handler->irq_mask(uep, disable); - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); usbhsg_queue_pop(uep, ureq, 0); } @@ -546,9 +546,9 @@ static int usbhsg_recip_handler_std_clear_endpoint(struct usbhs_priv *priv, struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); if (!usbhsg_status_has(gpriv, USBHSG_STATUS_WEDGE)) { - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); usbhs_pipe_clear_sequence(pipe); - usbhs_fifo_enable(pipe); + usbhs_pipe_enable(pipe); } usbhsg_recip_handler_std_control_done(priv, uep, ctrl); @@ -695,7 +695,7 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv, ret = gpriv->driver->setup(&gpriv->gadget, &ctrl); if (ret < 0) - usbhs_fifo_stall(pipe); + usbhs_pipe_stall(pipe); return ret; } @@ -803,7 +803,7 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep) ********* assume under spin lock ********* */ - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); /* * disable pipe irq @@ -1016,9 +1016,9 @@ static int __usbhsg_ep_set_halt_wedge(struct usb_ep *ep, int halt, int wedge) halt, usbhs_pipe_number(pipe)); if (halt) - usbhs_fifo_stall(pipe); + usbhs_pipe_stall(pipe); else - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); if (halt && wedge) usbhsg_status_set(gpriv, USBHSG_STATUS_WEDGE); diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index 80fc4ad..75e9e3c 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -15,7 +15,6 @@ * */ #include -#include #include #include "./common.h" #include "./pipe.h" @@ -23,13 +22,8 @@ /* * macros */ -#define usbhsp_priv_to_pipeinfo(pr) (&(pr)->pipe_info) -#define usbhsp_pipe_to_priv(p) ((p)->priv) - #define usbhsp_addr_offset(p) ((usbhs_pipe_number(p) - 1) * 2) -#define usbhsp_is_dcp(p) ((p)->priv->pipe_info.pipe == (p)) - #define usbhsp_flags_set(p, f) ((p)->flags |= USBHS_PIPE_FLAGS_##f) #define usbhsp_flags_clr(p, f) ((p)->flags &= ~USBHS_PIPE_FLAGS_##f) #define usbhsp_flags_has(p, f) ((p)->flags & USBHS_PIPE_FLAGS_##f) @@ -77,10 +71,10 @@ void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req) */ static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); int offset = usbhsp_addr_offset(pipe); - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) usbhs_bset(priv, DCPCTR, mask, val); else usbhs_bset(priv, PIPEnCTR + offset, mask, val); @@ -88,10 +82,10 @@ static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); int offset = usbhsp_addr_offset(pipe); - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) return usbhs_read(priv, DCPCTR); else return usbhs_read(priv, PIPEnCTR + offset); @@ -104,9 +98,9 @@ static void __usbhsp_pipe_xxx_set(struct usbhs_pipe *pipe, u16 dcp_reg, u16 pipe_reg, u16 mask, u16 val) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) usbhs_bset(priv, dcp_reg, mask, val); else usbhs_bset(priv, pipe_reg, mask, val); @@ -115,9 +109,9 @@ static void __usbhsp_pipe_xxx_set(struct usbhs_pipe *pipe, static u16 __usbhsp_pipe_xxx_get(struct usbhs_pipe *pipe, u16 dcp_reg, u16 pipe_reg) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) return usbhs_read(priv, dcp_reg); else return usbhs_read(priv, pipe_reg); @@ -136,7 +130,7 @@ static void usbhsp_pipe_cfg_set(struct usbhs_pipe *pipe, u16 mask, u16 val) */ static void usbhsp_pipe_buf_set(struct usbhs_pipe *pipe, u16 mask, u16 val) { - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) return; __usbhsp_pipe_xxx_set(pipe, 0, PIPEBUF, mask, val); @@ -160,7 +154,7 @@ static u16 usbhsp_pipe_maxp_get(struct usbhs_pipe *pipe) */ static void usbhsp_pipe_select(struct usbhs_pipe *pipe) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); /* * On pipe, this is necessary before @@ -182,7 +176,7 @@ static void usbhsp_pipe_select(struct usbhs_pipe *pipe) static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); int timeout = 1024; u16 val; @@ -205,7 +199,7 @@ static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe) * - "Pipe Control Registers Switching Procedure" */ usbhs_write(priv, CFIFOSEL, 0); - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); do { val = usbhsp_pipectrl_get(pipe); @@ -220,7 +214,7 @@ static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe) return -EBUSY; } -static int usbhsp_pipe_is_accessible(struct usbhs_pipe *pipe) +int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe) { u16 val; @@ -253,7 +247,7 @@ static void __usbhsp_pid_try_nak_if_stall(struct usbhs_pipe *pipe) } } -void usbhs_fifo_disable(struct usbhs_pipe *pipe) +void usbhs_pipe_disable(struct usbhs_pipe *pipe) { int timeout = 1024; u16 val; @@ -273,7 +267,7 @@ void usbhs_fifo_disable(struct usbhs_pipe *pipe) } while (timeout--); } -void usbhs_fifo_enable(struct usbhs_pipe *pipe) +void usbhs_pipe_enable(struct usbhs_pipe *pipe) { /* see "Pipe n Control Register" - "PID" */ __usbhsp_pid_try_nak_if_stall(pipe); @@ -281,7 +275,7 @@ void usbhs_fifo_enable(struct usbhs_pipe *pipe) usbhsp_pipectrl_set(pipe, PID_MASK, PID_BUF); } -void usbhs_fifo_stall(struct usbhs_pipe *pipe) +void usbhs_pipe_stall(struct usbhs_pipe *pipe) { u16 pid = usbhsp_pipectrl_get(pipe); @@ -302,191 +296,6 @@ void usbhs_fifo_stall(struct usbhs_pipe *pipe) } /* - * CFIFO ctrl - */ -void usbhs_fifo_send_terminator(struct usbhs_pipe *pipe) -{ - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - - usbhs_bset(priv, CFIFOCTR, BVAL, BVAL); -} - -static void usbhsp_fifo_clear(struct usbhs_pipe *pipe) -{ - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - - usbhs_write(priv, CFIFOCTR, BCLR); -} - -static int usbhsp_fifo_barrier(struct usbhs_priv *priv) -{ - int timeout = 1024; - - do { - /* The FIFO port is accessible */ - if (usbhs_read(priv, CFIFOCTR) & FRDY) - return 0; - - udelay(10); - } while (timeout--); - - return -EBUSY; -} - -static int usbhsp_fifo_rcv_len(struct usbhs_priv *priv) -{ - return usbhs_read(priv, CFIFOCTR) & DTLN_MASK; -} - -static int usbhsp_fifo_select(struct usbhs_pipe *pipe, int write) -{ - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - struct device *dev = usbhs_priv_to_dev(priv); - int timeout = 1024; - u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ - u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ - - if (usbhsp_is_dcp(pipe)) - base |= (1 == write) << 5; /* ISEL */ - - /* "base" will be used below */ - usbhs_write(priv, CFIFOSEL, base | MBW_32); - - /* check ISEL and CURPIPE value */ - while (timeout--) { - if (base == (mask & usbhs_read(priv, CFIFOSEL))) - return 0; - udelay(10); - } - - dev_err(dev, "fifo select error\n"); - - return -EIO; -} - -int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe) -{ - return usbhsp_fifo_select(pipe, 1); -} - -int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len) -{ - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - void __iomem *addr = priv->base + CFIFO; - int maxp = usbhs_pipe_get_maxpacket(pipe); - int total_len; - int i, ret; - - ret = usbhsp_pipe_is_accessible(pipe); - if (ret < 0) - return ret; - - ret = usbhsp_fifo_select(pipe, 1); - if (ret < 0) - return ret; - - ret = usbhsp_fifo_barrier(priv); - if (ret < 0) - return ret; - - len = min(len, maxp); - total_len = len; - - /* - * FIXME - * - * 32-bit access only - */ - if (len >= 4 && - !((unsigned long)buf & 0x03)) { - iowrite32_rep(addr, buf, len / 4); - len %= 4; - buf += total_len - len; - } - - /* the rest operation */ - for (i = 0; i < len; i++) - iowrite8(buf[i], addr + (0x03 - (i & 0x03))); - - if (total_len < maxp) - usbhs_fifo_send_terminator(pipe); - - return total_len; -} - -int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) -{ - int ret; - - /* - * select pipe and enable it to prepare packet receive - */ - ret = usbhsp_fifo_select(pipe, 0); - if (ret < 0) - return ret; - - usbhs_fifo_enable(pipe); - - return ret; -} - -int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len) -{ - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - void __iomem *addr = priv->base + CFIFO; - int rcv_len; - int i, ret; - int total_len; - u32 data = 0; - - ret = usbhsp_fifo_select(pipe, 0); - if (ret < 0) - return ret; - - ret = usbhsp_fifo_barrier(priv); - if (ret < 0) - return ret; - - rcv_len = usbhsp_fifo_rcv_len(priv); - - /* - * Buffer clear if Zero-Length packet - * - * see - * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" - */ - if (0 == rcv_len) { - usbhsp_fifo_clear(pipe); - return 0; - } - - len = min(rcv_len, len); - total_len = len; - - /* - * FIXME - * - * 32-bit access only - */ - if (len >= 4 && - !((unsigned long)buf & 0x03)) { - ioread32_rep(addr, buf, len / 4); - len %= 4; - buf += rcv_len - len; - } - - /* the rest operation */ - for (i = 0; i < len; i++) { - if (!(i & 0x03)) - data = ioread32(addr); - - buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; - } - - return total_len; -} - -/* * pipe setup */ static int usbhsp_possible_double_buffer(struct usbhs_pipe *pipe) @@ -519,7 +328,7 @@ static u16 usbhsp_setup_pipecfg(struct usbhs_pipe *pipe, }; int is_double = usbhsp_possible_double_buffer(pipe); - if (usbhsp_is_dcp(pipe)) + if (usbhs_pipe_is_dcp(pipe)) return -EINVAL; /* @@ -590,8 +399,8 @@ static u16 usbhsp_setup_pipebuff(struct usbhs_pipe *pipe, const struct usb_endpoint_descriptor *desc, int is_host) { - struct usbhs_priv *priv = usbhsp_pipe_to_priv(pipe); - struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct device *dev = usbhs_priv_to_dev(priv); int pipe_num = usbhs_pipe_number(pipe); int is_double = usbhsp_possible_double_buffer(pipe); @@ -669,7 +478,7 @@ static u16 usbhsp_setup_pipebuff(struct usbhs_pipe *pipe, */ int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe) { - u16 mask = usbhsp_is_dcp(pipe) ? DCP_MAXP_MASK : PIPE_MAXP_MASK; + u16 mask = usbhs_pipe_is_dcp(pipe) ? DCP_MAXP_MASK : PIPE_MAXP_MASK; usbhsp_pipe_select(pipe); @@ -724,7 +533,7 @@ static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type) void usbhs_pipe_init(struct usbhs_priv *priv) { - struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct usbhs_pipe *pipe; int i; @@ -748,7 +557,9 @@ void usbhs_pipe_init(struct usbhs_priv *priv) usbhsp_flags_init(pipe); pipe->mod_private = NULL; - usbhsp_fifo_clear(pipe); + /* pipe force init */ + usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); + usbhsp_pipectrl_set(pipe, ACLRM, 0); } } @@ -769,7 +580,7 @@ struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, return NULL; } - usbhs_fifo_disable(pipe); + usbhs_pipe_disable(pipe); /* make sure pipe is not busy */ ret = usbhsp_pipe_barrier(pipe); @@ -782,11 +593,6 @@ struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, pipebuf = usbhsp_setup_pipebuff(pipe, desc, is_host); pipemaxp = usbhsp_setup_pipemaxp(pipe, desc, is_host); - /* buffer clear - * see PIPECFG :: BFRE */ - usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); - usbhsp_pipectrl_set(pipe, ACLRM, 0); - usbhsp_pipe_select(pipe); usbhsp_pipe_cfg_set(pipe, 0xFFFF, pipecfg); usbhsp_pipe_buf_set(pipe, 0xFFFF, pipebuf); @@ -827,9 +633,9 @@ struct usbhs_pipe *usbhs_dcp_malloc(struct usbhs_priv *priv) void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe) { - WARN_ON(!usbhsp_is_dcp(pipe)); + WARN_ON(!usbhs_pipe_is_dcp(pipe)); - usbhs_fifo_enable(pipe); + usbhs_pipe_enable(pipe); usbhsp_pipectrl_set(pipe, CCPL, CCPL); } @@ -839,7 +645,7 @@ void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe) */ int usbhs_pipe_probe(struct usbhs_priv *priv) { - struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct usbhs_pipe *pipe; struct device *dev = usbhs_priv_to_dev(priv); u32 *pipe_type = usbhs_get_dparam(priv, pipe_type); @@ -876,7 +682,7 @@ int usbhs_pipe_probe(struct usbhs_priv *priv) void usbhs_pipe_remove(struct usbhs_priv *priv) { - struct usbhs_pipe_info *info = usbhsp_priv_to_pipeinfo(priv); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); kfree(info->pipe); } diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index c906eb6..2fb69df 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -56,25 +56,9 @@ struct usbhs_pipe_info { __usbhs_for_each_pipe(0, pos, &((priv)->pipe_info), i) /* - * pipe module probe / remove + * data */ -int usbhs_pipe_probe(struct usbhs_priv *priv); -void usbhs_pipe_remove(struct usbhs_priv *priv); - -/* - * cfifo - */ -int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len); -int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len); -int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe); -int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); - -void usbhs_fifo_enable(struct usbhs_pipe *pipe); -void usbhs_fifo_disable(struct usbhs_pipe *pipe); -void usbhs_fifo_stall(struct usbhs_pipe *pipe); - -void usbhs_fifo_send_terminator(struct usbhs_pipe *pipe); - +#define usbhs_priv_to_pipeinfo(pr) (&(pr)->pipe_info) /* * usb request @@ -88,14 +72,21 @@ void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req); struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, const struct usb_endpoint_descriptor *desc); - +int usbhs_pipe_probe(struct usbhs_priv *priv); +void usbhs_pipe_remove(struct usbhs_priv *priv); int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe); int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe); void usbhs_pipe_init(struct usbhs_priv *priv); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); +int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); +void usbhs_pipe_enable(struct usbhs_pipe *pipe); +void usbhs_pipe_disable(struct usbhs_pipe *pipe); +void usbhs_pipe_stall(struct usbhs_pipe *pipe); +#define usbhs_pipe_to_priv(p) ((p)->priv) #define usbhs_pipe_number(p) (int)((p) - (p)->priv->pipe_info.pipe) +#define usbhs_pipe_is_dcp(p) ((p)->priv->pipe_info.pipe == (p)) /* * dcp control -- cgit v0.10.2 From 4bd0481152d0d5e8326d7e24329b0069713ed718 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:07 +0900 Subject: usb: renesas_usbhs: divide data transfer functions DMAEngine will be supported to this driver in the future. Then, both PIO and DMA data transfer method should be supported. But, the transfer function can returns the result immediately in PIO version, but it can't in DMA version. This patch divides data transfer functions into top/bottom half in preparation for DMAEngine support. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h index 24f7560..0aadcb4 100644 --- a/drivers/usb/renesas_usbhs/common.h +++ b/drivers/usb/renesas_usbhs/common.h @@ -24,7 +24,6 @@ struct usbhs_priv; #include "./mod.h" #include "./pipe.h" -#include "./fifo.h" /* * diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 3fd3adf..0983884 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -20,6 +20,20 @@ #include "./pipe.h" /* + * packet info function + */ +void usbhs_pkt_update(struct usbhs_pkt *pkt, + struct usbhs_pipe *pipe, + void *buf, int len) +{ + pkt->pipe = pipe; + pkt->buf = buf; + pkt->length = len; + pkt->actual = 0; + pkt->maxp = 0; +} + +/* * FIFO ctrl */ static void usbhsf_send_terminator(struct usbhs_pipe *pipe) @@ -93,13 +107,16 @@ int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe) return usbhsf_fifo_select(pipe, 1); } -int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len) +int usbhs_fifo_write(struct usbhs_pkt *pkt) { + struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); void __iomem *addr = priv->base + CFIFO; int maxp = usbhs_pipe_get_maxpacket(pipe); int total_len; - int i, ret; + u8 *buf = pkt->buf; + int i, ret, len; ret = usbhs_pipe_is_accessible(pipe); if (ret < 0) @@ -113,7 +130,7 @@ int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len) if (ret < 0) return ret; - len = min(len, maxp); + len = min(pkt->length, maxp); total_len = len; /* @@ -135,7 +152,16 @@ int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len) if (total_len < maxp) usbhsf_send_terminator(pipe); - return total_len; + usbhs_pipe_enable(pipe); + + /* update pkt */ + if (info->tx_done) { + pkt->actual = total_len; + pkt->maxp = maxp; + info->tx_done(pkt); + } + + return 0; } int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) @@ -154,13 +180,16 @@ int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) return ret; } -int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len) +int usbhs_fifo_read(struct usbhs_pkt *pkt) { + struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); void __iomem *addr = priv->base + CFIFO; - int rcv_len; + u8 *buf = pkt->buf; + int rcv_len, len; int i, ret; - int total_len; + int total_len = 0; u32 data = 0; ret = usbhsf_fifo_select(pipe, 0); @@ -181,10 +210,10 @@ int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len) */ if (0 == rcv_len) { usbhsf_fifo_clear(pipe); - return 0; + goto usbhs_fifo_read_end; } - len = min(rcv_len, len); + len = min(rcv_len, pkt->length); total_len = len; /* @@ -207,5 +236,13 @@ int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len) buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; } - return total_len; +usbhs_fifo_read_end: + if (info->rx_done) { + /* update pkt */ + pkt->actual = total_len; + pkt->maxp = usbhs_pipe_get_maxpacket(pipe); + info->rx_done(pkt); + } + + return 0; } diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 75a7c15..758d85d 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -17,14 +17,29 @@ #ifndef RENESAS_USB_FIFO_H #define RENESAS_USB_FIFO_H -#include "common.h" +#include "pipe.h" + +struct usbhs_pkt { + struct usbhs_pipe *pipe; + int maxp; + void *buf; + int length; + int actual; +}; /* * fifo */ -int usbhs_fifo_write(struct usbhs_pipe *pipe, u8 *buf, int len); -int usbhs_fifo_read(struct usbhs_pipe *pipe, u8 *buf, int len); +int usbhs_fifo_write(struct usbhs_pkt *pkt); +int usbhs_fifo_read(struct usbhs_pkt *pkt); int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe); int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); +/* + * packet info + */ +void usbhs_pkt_update(struct usbhs_pkt *pkt, + struct usbhs_pipe *pipe, + void *buf, int len); + #endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 128c8da..4a1d1fc 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -27,6 +27,7 @@ struct usbhsg_request { struct usb_request req; struct list_head node; + struct usbhs_pkt pkt; }; #define EP_NAME_SIZE 8 @@ -110,6 +111,10 @@ struct usbhsg_recip_handle { #define usbhsg_pipe_to_uep(p) ((p)->mod_private) #define usbhsg_is_dcp(u) ((u) == usbhsg_gpriv_to_dcp((u)->gpriv)) +#define usbhsg_ureq_to_pkt(u) (&(u)->pkt) +#define usbhsg_pkt_to_ureq(i) \ + container_of(i, struct usbhsg_request, pkt) + #define usbhsg_is_not_connected(gp) ((gp)->gadget.speed == USB_SPEED_UNKNOWN) /* status */ @@ -319,38 +324,32 @@ static int usbhsg_try_run_ctrl_stage_end(struct usbhsg_uep *uep, return 0; } -static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) +/* + * packet send hander + */ +static void usbhsg_try_run_send_packet_bh(struct usbhs_pkt *pkt) { - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); + struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); struct usb_request *req = &ureq->req; struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct device *dev = usbhsg_gpriv_to_dev(gpriv); - void *buf; - int remainder, send; + int remainder, send, maxp; int is_done = 0; int enable; - int maxp; - /* - ********* assume under spin lock ********* - */ - - maxp = usbhs_pipe_get_maxpacket(pipe); - buf = req->buf + req->actual; - remainder = req->length - req->actual; - - send = usbhs_fifo_write(pipe, buf, remainder); + maxp = pkt->maxp; + send = pkt->actual; + remainder = pkt->length; /* - * send < 0 : pipe busy * send = 0 : send zero packet * send > 0 : send data * * send <= max_packet */ - if (send > 0) - req->actual += send; + req->actual += send; /* send all packet ? */ if (send < remainder) @@ -372,13 +371,6 @@ static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, uep->handler->irq_mask(uep, enable); /* - * usbhs_fifo_enable execute - * - after callback_update, - * - before queue_pop / stage_end - */ - usbhs_pipe_enable(pipe); - - /* * all data were sent ? */ if (is_done) { @@ -389,6 +381,30 @@ static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, usbhsg_queue_pop(uep, ureq, 0); } +} + +static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, + struct usbhsg_request *ureq) +{ + struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usb_request *req = &ureq->req; + struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); + int ret; + + /* + ********* assume under spin lock ********* + */ + + usbhs_pkt_update(pkt, pipe, + req->buf + req->actual, + req->length - req->actual); + + ret = usbhs_fifo_write(pkt); + if (ret < 0) { + /* pipe is busy. + * retry in interrupt */ + uep->handler->irq_mask(uep, 1); + } return 0; } @@ -408,35 +424,30 @@ static int usbhsg_prepare_send_packet(struct usbhsg_uep *uep, return 0; } -static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) +/* + * packet recv hander + */ +static void usbhsg_try_run_receive_packet_bh(struct usbhs_pkt *pkt) { - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); + struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); struct usb_request *req = &ureq->req; struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct device *dev = usbhsg_gpriv_to_dev(gpriv); - void *buf; - int maxp; - int remainder, recv; + int remainder, recv, maxp; int is_done = 0; - /* - ********* assume under spin lock ********* - */ - - maxp = usbhs_pipe_get_maxpacket(pipe); - buf = req->buf + req->actual; - remainder = req->length - req->actual; + maxp = pkt->maxp; + remainder = pkt->length; + recv = pkt->actual; - recv = usbhs_fifo_read(pipe, buf, remainder); /* * recv < 0 : pipe busy * recv >= 0 : receive data * * recv <= max_packet */ - if (recv < 0) - return -EBUSY; /* update parameters */ req->actual += recv; @@ -457,8 +468,24 @@ static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, usbhs_pipe_disable(pipe); usbhsg_queue_pop(uep, ureq, 0); } +} - return 0; +static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, + struct usbhsg_request *ureq) +{ + struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usb_request *req = &ureq->req; + struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); + + /* + ********* assume under spin lock ********* + */ + + usbhs_pkt_update(pkt, pipe, + req->buf + req->actual, + req->length - req->actual); + + return usbhs_fifo_read(pkt); } static int usbhsg_prepare_receive_packet(struct usbhsg_uep *uep, @@ -1086,7 +1113,9 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) /* * pipe initialize and enable DCP */ - usbhs_pipe_init(priv); + usbhs_pipe_init(priv, + usbhsg_try_run_send_packet_bh, + usbhsg_try_run_receive_packet_bh); usbhsg_uep_init(gpriv); usbhsg_dcp_enable(dcp); diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index 75e9e3c..7a11616 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -531,7 +531,9 @@ static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type) return pipe; } -void usbhs_pipe_init(struct usbhs_priv *priv) +void usbhs_pipe_init(struct usbhs_priv *priv, + void (*tx_done)(struct usbhs_pkt *pkt), + void (*rx_done)(struct usbhs_pkt *pkt)) { struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct usbhs_pipe *pipe; @@ -561,6 +563,9 @@ void usbhs_pipe_init(struct usbhs_priv *priv) usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); usbhsp_pipectrl_set(pipe, ACLRM, 0); } + + info->tx_done = tx_done; + info->rx_done = rx_done; } struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, @@ -639,7 +644,6 @@ void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe) usbhsp_pipectrl_set(pipe, CCPL, CCPL); } - /* * pipe module function */ diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 2fb69df..1f871b0 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -18,6 +18,7 @@ #define RENESAS_USB_PIPE_H #include "./common.h" +#include "./fifo.h" /* * struct @@ -39,6 +40,9 @@ struct usbhs_pipe_info { struct usbhs_pipe *pipe; int size; /* array size of "pipe" */ int bufnmb_last; /* FIXME : driver needs good allocator */ + + void (*tx_done)(struct usbhs_pkt *pkt); + void (*rx_done)(struct usbhs_pkt *pkt); }; /* @@ -76,7 +80,9 @@ int usbhs_pipe_probe(struct usbhs_priv *priv); void usbhs_pipe_remove(struct usbhs_priv *priv); int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe); int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe); -void usbhs_pipe_init(struct usbhs_priv *priv); +void usbhs_pipe_init(struct usbhs_priv *priv, + void (*tx_done)(struct usbhs_pkt *pkt), + void (*rx_done)(struct usbhs_pkt *pkt)); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); -- cgit v0.10.2 From 6acb95d4e0709a582023e87f9b3537fb4d837fd0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:16 +0900 Subject: usb: renesas_usbhs: modify packet queue control method Current renesas_usbhs driver is controlling packet queue on mod_gadget.c. But it has relationship with pipe/fifo, not host/gadget. So, controlling USB packet queue in pipe.c/fifo.c is more convenient than in mod_gadget.c. This patch modify it. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 0983884..088bfd7 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -22,17 +22,40 @@ /* * packet info function */ -void usbhs_pkt_update(struct usbhs_pkt *pkt, - struct usbhs_pipe *pipe, - void *buf, int len) +void usbhs_pkt_init(struct usbhs_pkt *pkt) +{ + INIT_LIST_HEAD(&pkt->node); +} + +void usbhs_pkt_update(struct usbhs_pkt *pkt, void *buf, int len) { - pkt->pipe = pipe; pkt->buf = buf; pkt->length = len; pkt->actual = 0; pkt->maxp = 0; } +void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) +{ + list_del_init(&pkt->node); + list_add_tail(&pkt->node, &pipe->list); + + pkt->pipe = pipe; +} + +void usbhs_pkt_pop(struct usbhs_pkt *pkt) +{ + list_del_init(&pkt->node); +} + +struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe) +{ + if (list_empty(&pipe->list)) + return NULL; + + return list_entry(pipe->list.next, struct usbhs_pkt, node); +} + /* * FIFO ctrl */ diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 758d85d..c34d1d1 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -20,6 +20,7 @@ #include "pipe.h" struct usbhs_pkt { + struct list_head node; struct usbhs_pipe *pipe; int maxp; void *buf; @@ -38,8 +39,10 @@ int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); /* * packet info */ -void usbhs_pkt_update(struct usbhs_pkt *pkt, - struct usbhs_pipe *pipe, - void *buf, int len); +void usbhs_pkt_init(struct usbhs_pkt *pkt); +void usbhs_pkt_update(struct usbhs_pkt *pkt, void *buf, int len); +void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt); +void usbhs_pkt_pop(struct usbhs_pkt *pkt); +struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe); #endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 4a1d1fc..a381877 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -26,7 +26,6 @@ */ struct usbhsg_request { struct usb_request req; - struct list_head node; struct usbhs_pkt pkt; }; @@ -36,7 +35,6 @@ struct usbhsg_pipe_handle; struct usbhsg_uep { struct usb_ep ep; struct usbhs_pipe *pipe; - struct list_head list; char ep_name[EP_NAME_SIZE]; @@ -161,12 +159,12 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct device *dev = usbhsg_gpriv_to_dev(gpriv); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); /* ********* assume under spin lock ********* */ - list_del_init(&ureq->node); - list_add_tail(&ureq->node, &uep->list); + usbhs_pkt_push(pipe, pkt); ureq->req.actual = 0; ureq->req.status = -EINPROGRESS; @@ -177,13 +175,16 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, static struct usbhsg_request *usbhsg_queue_get(struct usbhsg_uep *uep) { + struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usbhs_pkt *pkt = usbhs_pkt_get(pipe); + /* ********* assume under spin lock ********* */ - if (list_empty(&uep->list)) - return NULL; + if (!pkt) + return 0; - return list_entry(uep->list.next, struct usbhsg_request, node); + return usbhsg_pkt_to_ureq(pkt); } #define usbhsg_queue_prepare(uep) __usbhsg_queue_handler(uep, 1); @@ -243,6 +244,7 @@ static void usbhsg_queue_pop(struct usbhsg_uep *uep, struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct device *dev = usbhsg_gpriv_to_dev(gpriv); + struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); /* ********* assume under spin lock ********* @@ -268,7 +270,7 @@ static void usbhsg_queue_pop(struct usbhsg_uep *uep, dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe)); - list_del_init(&ureq->node); + usbhs_pkt_pop(pkt); ureq->req.status = status; ureq->req.complete(&uep->ep, &ureq->req); @@ -386,7 +388,6 @@ static void usbhsg_try_run_send_packet_bh(struct usbhs_pkt *pkt) static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, struct usbhsg_request *ureq) { - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usb_request *req = &ureq->req; struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); int ret; @@ -395,7 +396,7 @@ static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, ********* assume under spin lock ********* */ - usbhs_pkt_update(pkt, pipe, + usbhs_pkt_update(pkt, req->buf + req->actual, req->length - req->actual); @@ -473,7 +474,6 @@ static void usbhsg_try_run_receive_packet_bh(struct usbhs_pkt *pkt) static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, struct usbhsg_request *ureq) { - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usb_request *req = &ureq->req; struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); @@ -481,7 +481,7 @@ static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, ********* assume under spin lock ********* */ - usbhs_pkt_update(pkt, pipe, + usbhs_pkt_update(pkt, req->buf + req->actual, req->length - req->actual); @@ -814,7 +814,6 @@ static int usbhsg_dcp_enable(struct usbhsg_uep *uep) uep->pipe = pipe; uep->pipe->mod_private = uep; - INIT_LIST_HEAD(&uep->list); return 0; } @@ -888,7 +887,6 @@ static int usbhsg_ep_enable(struct usb_ep *ep, if (pipe) { uep->pipe = pipe; pipe->mod_private = uep; - INIT_LIST_HEAD(&uep->list); if (usb_endpoint_dir_in(desc)) uep->handler = &usbhsg_handler_send_packet; @@ -932,7 +930,8 @@ static struct usb_request *usbhsg_ep_alloc_request(struct usb_ep *ep, if (!ureq) return NULL; - INIT_LIST_HEAD(&ureq->node); + usbhs_pkt_init(usbhsg_ureq_to_pkt(ureq)); + return &ureq->req; } @@ -941,7 +940,7 @@ static void usbhsg_ep_free_request(struct usb_ep *ep, { struct usbhsg_request *ureq = usbhsg_req_to_ureq(req); - WARN_ON(!list_empty(&ureq->node)); + WARN_ON(!list_empty(&ureq->pkt.node)); kfree(ureq); } @@ -1379,7 +1378,6 @@ int __devinit usbhs_mod_gadget_probe(struct usbhs_priv *priv) uep->ep.name = uep->ep_name; uep->ep.ops = &usbhsg_ep_ops; INIT_LIST_HEAD(&uep->ep.ep_list); - INIT_LIST_HEAD(&uep->list); /* init DCP */ if (usbhsg_is_dcp(uep)) { diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index 7a11616..6e77791 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -558,6 +558,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, usbhsp_flags_init(pipe); pipe->mod_private = NULL; + INIT_LIST_HEAD(&pipe->list); /* pipe force init */ usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); @@ -585,6 +586,8 @@ struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, return NULL; } + INIT_LIST_HEAD(&pipe->list); + usbhs_pipe_disable(pipe); /* make sure pipe is not busy */ @@ -632,6 +635,7 @@ struct usbhs_pipe *usbhs_dcp_malloc(struct usbhs_priv *priv) usbhsp_pipe_select(pipe); usbhs_pipe_clear_sequence(pipe); + INIT_LIST_HEAD(&pipe->list); return pipe; } diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 1f871b0..535e6aa 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -27,6 +27,7 @@ struct usbhs_pipe { u32 pipe_type; /* USB_ENDPOINT_XFER_xxx */ struct usbhs_priv *priv; + struct list_head list; u32 flags; #define USBHS_PIPE_FLAGS_IS_USED (1 << 0) -- cgit v0.10.2 From 659d495404d20ff8f96644fca82c772455f1226c Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:23 +0900 Subject: usb: renesas_usbhs: modify data transfer method On current driver, main data transfer function was implemented in fifo.c, but the overall controlling was implementing in mod_gadget.c. This style is not useful to support host and DMAEngine in the future. But the interrupt for data transfer cannot separate easily for now, because it is deeply related to mod_gadget. This patch move the overall data transfer method into fifo.c except interrupt. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 088bfd7..b5031e3 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -27,20 +27,17 @@ void usbhs_pkt_init(struct usbhs_pkt *pkt) INIT_LIST_HEAD(&pkt->node); } -void usbhs_pkt_update(struct usbhs_pkt *pkt, void *buf, int len) -{ - pkt->buf = buf; - pkt->length = len; - pkt->actual = 0; - pkt->maxp = 0; -} - -void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) +void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, + void *buf, int len, int zero) { list_del_init(&pkt->node); list_add_tail(&pkt->node, &pipe->list); - pkt->pipe = pipe; + pkt->pipe = pipe; + pkt->buf = buf; + pkt->length = len; + pkt->zero = zero; + pkt->actual = 0; } void usbhs_pkt_pop(struct usbhs_pkt *pkt) @@ -57,6 +54,47 @@ struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe) } /* + * irq enable/disable function + */ +#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, bempsts, e) +#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, brdysts, e) +#define usbhsf_irq_callback_ctrl(pipe, status, enable) \ + ({ \ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \ + struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ + u16 status = (1 << usbhs_pipe_number(pipe)); \ + if (!mod) \ + return; \ + if (enable) \ + mod->irq_##status |= status; \ + else \ + mod->irq_##status &= ~status; \ + usbhs_irq_callback_update(priv, mod); \ + }) + +static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable) +{ + /* + * And DCP pipe can NOT use "ready interrupt" for "send" + * it should use "empty" interrupt. + * see + * "Operation" - "Interrupt Function" - "BRDY Interrupt" + * + * on the other hand, normal pipe can use "ready interrupt" for "send" + * even though it is single/double buffer + */ + if (usbhs_pipe_is_dcp(pipe)) + usbhsf_irq_empty_ctrl(pipe, enable); + else + usbhsf_irq_ready_ctrl(pipe, enable); +} + +static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) +{ + usbhsf_irq_ready_ctrl(pipe, enable); +} + +/* * FIFO ctrl */ static void usbhsf_send_terminator(struct usbhs_pipe *pipe) @@ -135,34 +173,38 @@ int usbhs_fifo_write(struct usbhs_pkt *pkt) struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + struct device *dev = usbhs_priv_to_dev(priv); void __iomem *addr = priv->base + CFIFO; + u8 *buf; int maxp = usbhs_pipe_get_maxpacket(pipe); int total_len; - u8 *buf = pkt->buf; int i, ret, len; + int is_short, is_done; ret = usbhs_pipe_is_accessible(pipe); if (ret < 0) - return ret; + goto usbhs_fifo_write_busy; ret = usbhsf_fifo_select(pipe, 1); if (ret < 0) - return ret; + goto usbhs_fifo_write_busy; ret = usbhsf_fifo_barrier(priv); if (ret < 0) - return ret; + goto usbhs_fifo_write_busy; - len = min(pkt->length, maxp); - total_len = len; + buf = pkt->buf + pkt->actual; + len = pkt->length - pkt->actual; + len = min(len, maxp); + total_len = len; + is_short = total_len < maxp; /* * FIXME * * 32-bit access only */ - if (len >= 4 && - !((unsigned long)buf & 0x03)) { + if (len >= 4 && !((unsigned long)buf & 0x03)) { iowrite32_rep(addr, buf, len / 4); len %= 4; buf += total_len - len; @@ -172,19 +214,52 @@ int usbhs_fifo_write(struct usbhs_pkt *pkt) for (i = 0; i < len; i++) iowrite8(buf[i], addr + (0x03 - (i & 0x03))); - if (total_len < maxp) + /* + * variable update + */ + pkt->actual += total_len; + + if (pkt->actual < pkt->length) + is_done = 0; /* there are remainder data */ + else if (is_short) + is_done = 1; /* short packet */ + else + is_done = !pkt->zero; /* send zero packet ? */ + + /* + * pipe/irq handling + */ + if (is_short) usbhsf_send_terminator(pipe); + usbhsf_tx_irq_ctrl(pipe, !is_done); usbhs_pipe_enable(pipe); - /* update pkt */ - if (info->tx_done) { - pkt->actual = total_len; - pkt->maxp = maxp; - info->tx_done(pkt); + dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", + usbhs_pipe_number(pipe), + pkt->length, pkt->actual, is_done, pkt->zero); + + /* + * Transmission end + */ + if (is_done) { + if (usbhs_pipe_is_dcp(pipe)) + usbhs_dcp_control_transfer_done(pipe); + + if (info->tx_done) + info->tx_done(pkt); } return 0; + +usbhs_fifo_write_busy: + /* + * pipe is busy. + * retry in interrupt + */ + usbhsf_tx_irq_ctrl(pipe, 1); + + return ret; } int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) @@ -199,6 +274,7 @@ int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) return ret; usbhs_pipe_enable(pipe); + usbhsf_rx_irq_ctrl(pipe, 1); return ret; } @@ -207,13 +283,15 @@ int usbhs_fifo_read(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + struct device *dev = usbhs_priv_to_dev(priv); void __iomem *addr = priv->base + CFIFO; - u8 *buf = pkt->buf; + u8 *buf; + u32 data = 0; + int maxp = usbhs_pipe_get_maxpacket(pipe); int rcv_len, len; int i, ret; int total_len = 0; - u32 data = 0; + int is_done = 0; ret = usbhsf_fifo_select(pipe, 0); if (ret < 0) @@ -225,6 +303,11 @@ int usbhs_fifo_read(struct usbhs_pkt *pkt) rcv_len = usbhsf_fifo_rcv_len(priv); + buf = pkt->buf + pkt->actual; + len = pkt->length - pkt->actual; + len = min(len, rcv_len); + total_len = len; + /* * Buffer clear if Zero-Length packet * @@ -236,19 +319,15 @@ int usbhs_fifo_read(struct usbhs_pkt *pkt) goto usbhs_fifo_read_end; } - len = min(rcv_len, pkt->length); - total_len = len; - /* * FIXME * * 32-bit access only */ - if (len >= 4 && - !((unsigned long)buf & 0x03)) { + if (len >= 4 && !((unsigned long)buf & 0x03)) { ioread32_rep(addr, buf, len / 4); len %= 4; - buf += rcv_len - len; + buf += total_len - len; } /* the rest operation */ @@ -259,12 +338,25 @@ int usbhs_fifo_read(struct usbhs_pkt *pkt) buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; } + pkt->actual += total_len; + usbhs_fifo_read_end: - if (info->rx_done) { - /* update pkt */ - pkt->actual = total_len; - pkt->maxp = usbhs_pipe_get_maxpacket(pipe); - info->rx_done(pkt); + if ((pkt->actual == pkt->length) || /* receive all data */ + (total_len < maxp)) /* short packet */ + is_done = 1; + + dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", + usbhs_pipe_number(pipe), + pkt->length, pkt->actual, is_done, pkt->zero); + + if (is_done) { + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + + usbhsf_rx_irq_ctrl(pipe, 0); + usbhs_pipe_disable(pipe); + + if (info->rx_done) + info->rx_done(pkt); } return 0; diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index c34d1d1..04d8cdd 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -22,10 +22,10 @@ struct usbhs_pkt { struct list_head node; struct usbhs_pipe *pipe; - int maxp; void *buf; int length; int actual; + int zero; }; /* @@ -40,8 +40,8 @@ int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); * packet info */ void usbhs_pkt_init(struct usbhs_pkt *pkt); -void usbhs_pkt_update(struct usbhs_pkt *pkt, void *buf, int len); -void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt); +void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, + void *buf, int len, int zero); void usbhs_pkt_pop(struct usbhs_pkt *pkt); struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe); diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index a381877..298984f 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -60,7 +60,6 @@ struct usbhsg_gpriv { struct usbhsg_pipe_handle { int (*prepare)(struct usbhsg_uep *uep, struct usbhsg_request *ureq); int (*try_run)(struct usbhsg_uep *uep, struct usbhsg_request *ureq); - void (*irq_mask)(struct usbhsg_uep *uep, int enable); }; struct usbhsg_recip_handle { @@ -160,17 +159,18 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, struct device *dev = usbhsg_gpriv_to_dev(gpriv); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); + struct usb_request *req = &ureq->req; /* ********* assume under spin lock ********* */ - usbhs_pkt_push(pipe, pkt); - ureq->req.actual = 0; - ureq->req.status = -EINPROGRESS; + usbhs_pkt_push(pipe, pkt, req->buf, req->length, req->zero); + req->actual = 0; + req->status = -EINPROGRESS; dev_dbg(dev, "pipe %d : queue push (%d)\n", usbhs_pipe_number(pipe), - ureq->req.length); + req->length); } static struct usbhsg_request *usbhsg_queue_get(struct usbhsg_uep *uep) @@ -329,83 +329,27 @@ static int usbhsg_try_run_ctrl_stage_end(struct usbhsg_uep *uep, /* * packet send hander */ -static void usbhsg_try_run_send_packet_bh(struct usbhs_pkt *pkt) +static void usbhsg_send_packet_done(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); - struct usb_request *req = &ureq->req; - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - int remainder, send, maxp; - int is_done = 0; - int enable; - maxp = pkt->maxp; - send = pkt->actual; - remainder = pkt->length; + ureq->req.actual = pkt->actual; - /* - * send = 0 : send zero packet - * send > 0 : send data - * - * send <= max_packet - */ - req->actual += send; - - /* send all packet ? */ - if (send < remainder) - is_done = 0; /* there are remainder data */ - else if (send < maxp) - is_done = 1; /* short packet */ - else - is_done = !req->zero; /* send zero packet ? */ - - dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", - usbhs_pipe_number(pipe), - remainder, send, is_done, req->zero); - - /* - * enable interrupt and send again in irq handler - * if it still have remainder data which should be sent. - */ - enable = !is_done; - uep->handler->irq_mask(uep, enable); - - /* - * all data were sent ? - */ - if (is_done) { - /* it care below call in - "function mode" */ - if (usbhsg_is_dcp(uep)) - usbhs_dcp_control_transfer_done(pipe); - - usbhsg_queue_pop(uep, ureq, 0); - } + usbhsg_queue_pop(uep, ureq, 0); } static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, struct usbhsg_request *ureq) { - struct usb_request *req = &ureq->req; struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); - int ret; /* ********* assume under spin lock ********* */ - usbhs_pkt_update(pkt, - req->buf + req->actual, - req->length - req->actual); - - ret = usbhs_fifo_write(pkt); - if (ret < 0) { - /* pipe is busy. - * retry in interrupt */ - uep->handler->irq_mask(uep, 1); - } + usbhs_fifo_write(pkt); return 0; } @@ -428,63 +372,26 @@ static int usbhsg_prepare_send_packet(struct usbhsg_uep *uep, /* * packet recv hander */ -static void usbhsg_try_run_receive_packet_bh(struct usbhs_pkt *pkt) +static void usbhsg_receive_packet_done(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); - struct usb_request *req = &ureq->req; - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - int remainder, recv, maxp; - int is_done = 0; - - maxp = pkt->maxp; - remainder = pkt->length; - recv = pkt->actual; - - /* - * recv < 0 : pipe busy - * recv >= 0 : receive data - * - * recv <= max_packet - */ - - /* update parameters */ - req->actual += recv; - - if ((recv == remainder) || /* receive all data */ - (recv < maxp)) /* short packet */ - is_done = 1; - dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", - usbhs_pipe_number(pipe), - remainder, recv, is_done, req->zero); - - /* read all data ? */ - if (is_done) { - int disable = 0; + ureq->req.actual = pkt->actual; - uep->handler->irq_mask(uep, disable); - usbhs_pipe_disable(pipe); - usbhsg_queue_pop(uep, ureq, 0); - } + usbhsg_queue_pop(uep, ureq, 0); } static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, struct usbhsg_request *ureq) { - struct usb_request *req = &ureq->req; struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); /* ********* assume under spin lock ********* */ - usbhs_pkt_update(pkt, - req->buf + req->actual, - req->length - req->actual); - return usbhs_fifo_read(pkt); } @@ -492,41 +399,27 @@ static int usbhsg_prepare_receive_packet(struct usbhsg_uep *uep, struct usbhsg_request *ureq) { struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - int enable = 1; - int ret; /* ********* assume under spin lock ********* */ - ret = usbhs_fifo_prepare_read(pipe); - if (ret < 0) - return ret; - - /* - * data will be read in interrupt handler - */ - uep->handler->irq_mask(uep, enable); - - return ret; + return usbhs_fifo_prepare_read(pipe); } static struct usbhsg_pipe_handle usbhsg_handler_send_by_empty = { .prepare = usbhsg_prepare_send_packet, .try_run = usbhsg_try_run_send_packet, - .irq_mask = usbhsg_irq_empty_ctrl, }; static struct usbhsg_pipe_handle usbhsg_handler_send_by_ready = { .prepare = usbhsg_prepare_send_packet, .try_run = usbhsg_try_run_send_packet, - .irq_mask = usbhsg_irq_ready_ctrl, }; static struct usbhsg_pipe_handle usbhsg_handler_recv_by_ready = { .prepare = usbhsg_prepare_receive_packet, .try_run = usbhsg_try_run_receive_packet, - .irq_mask = usbhsg_irq_ready_ctrl, }; static struct usbhsg_pipe_handle usbhsg_handler_ctrl_stage_end = { @@ -1113,8 +1006,8 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) * pipe initialize and enable DCP */ usbhs_pipe_init(priv, - usbhsg_try_run_send_packet_bh, - usbhsg_try_run_receive_packet_bh); + usbhsg_send_packet_done, + usbhsg_receive_packet_done); usbhsg_uep_init(gpriv); usbhsg_dcp_enable(dcp); -- cgit v0.10.2 From dad67397f2090b29cd1f169e6a4ac6f3532c6858 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:28 +0900 Subject: usb: renesas_usbhs: modify data transfer interrupt On current driver, overall data transfer method was implemented in fifo.c, but its interrupt which is member of packet queue control was still in mod_gadget.c. This patch move it into fifo.c. By this patch, the packet/fifo control is independent from mod_gadget. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index b5031e3..e9c4d3d 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -22,19 +22,44 @@ /* * packet info function */ +static int usbhsf_null_handle(struct usbhs_pkt *pkt) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); + struct device *dev = usbhs_priv_to_dev(priv); + + dev_err(dev, "null handler\n"); + + return -EINVAL; +} + +static struct usbhs_pkt_handle usbhsf_null_handler = { + .prepare = usbhsf_null_handle, + .try_run = usbhsf_null_handle, +}; + void usbhs_pkt_init(struct usbhs_pkt *pkt) { INIT_LIST_HEAD(&pkt->node); } void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, + struct usbhs_pkt_handle *handler, void *buf, int len, int zero) { + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct device *dev = usbhs_priv_to_dev(priv); + + if (!handler) { + dev_err(dev, "no handler function\n"); + handler = &usbhsf_null_handler; + } + list_del_init(&pkt->node); list_add_tail(&pkt->node, &pipe->list); pkt->pipe = pipe; pkt->buf = buf; + pkt->handler = handler; pkt->length = len; pkt->zero = zero; pkt->actual = 0; @@ -163,12 +188,7 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, int write) /* * PIO fifo functions */ -int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe) -{ - return usbhsf_fifo_select(pipe, 1); -} - -int usbhs_fifo_write(struct usbhs_pkt *pkt) +static int usbhsf_try_push(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); @@ -181,11 +201,11 @@ int usbhs_fifo_write(struct usbhs_pkt *pkt) int i, ret, len; int is_short, is_done; - ret = usbhs_pipe_is_accessible(pipe); + ret = usbhsf_fifo_select(pipe, 1); if (ret < 0) goto usbhs_fifo_write_busy; - ret = usbhsf_fifo_select(pipe, 1); + ret = usbhs_pipe_is_accessible(pipe); if (ret < 0) goto usbhs_fifo_write_busy; @@ -246,8 +266,7 @@ int usbhs_fifo_write(struct usbhs_pkt *pkt) if (usbhs_pipe_is_dcp(pipe)) usbhs_dcp_control_transfer_done(pipe); - if (info->tx_done) - info->tx_done(pkt); + info->done(pkt); } return 0; @@ -262,8 +281,14 @@ usbhs_fifo_write_busy: return ret; } -int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) +struct usbhs_pkt_handle usbhs_fifo_push_handler = { + .prepare = usbhsf_try_push, + .try_run = usbhsf_try_push, +}; + +static int usbhsf_prepare_pop(struct usbhs_pkt *pkt) { + struct usbhs_pipe *pipe = pkt->pipe; int ret; /* @@ -279,7 +304,7 @@ int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe) return ret; } -int usbhs_fifo_read(struct usbhs_pkt *pkt) +static int usbhsf_try_pop(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); @@ -355,9 +380,124 @@ usbhs_fifo_read_end: usbhsf_rx_irq_ctrl(pipe, 0); usbhs_pipe_disable(pipe); - if (info->rx_done) - info->rx_done(pkt); + info->done(pkt); } return 0; } + +struct usbhs_pkt_handle usbhs_fifo_pop_handler = { + .prepare = usbhsf_prepare_pop, + .try_run = usbhsf_try_pop, +}; + +/* + * handler function + */ +static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt) +{ + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + + usbhs_dcp_control_transfer_done(pipe); + + info->done(pkt); + + return 0; +} + +struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { + .prepare = usbhsf_ctrl_stage_end, + .try_run = usbhsf_ctrl_stage_end, +}; + +/* + * irq functions + */ +static int usbhsf_irq_empty(struct usbhs_priv *priv, + struct usbhs_irq_state *irq_state) +{ + struct usbhs_pipe *pipe; + struct usbhs_pkt *pkt; + struct device *dev = usbhs_priv_to_dev(priv); + int i, ret; + + if (!irq_state->bempsts) { + dev_err(dev, "debug %s !!\n", __func__); + return -EIO; + } + + dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); + + /* + * search interrupted "pipe" + * not "uep". + */ + usbhs_for_each_pipe_with_dcp(pipe, priv, i) { + if (!(irq_state->bempsts & (1 << i))) + continue; + + pkt = usbhs_pkt_get(pipe); + ret = usbhs_pkt_run(pkt); + if (ret < 0) + dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); + } + + return 0; +} + +static int usbhsf_irq_ready(struct usbhs_priv *priv, + struct usbhs_irq_state *irq_state) +{ + struct usbhs_pipe *pipe; + struct usbhs_pkt *pkt; + struct device *dev = usbhs_priv_to_dev(priv); + int i, ret; + + if (!irq_state->brdysts) { + dev_err(dev, "debug %s !!\n", __func__); + return -EIO; + } + + dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); + + /* + * search interrupted "pipe" + * not "uep". + */ + usbhs_for_each_pipe_with_dcp(pipe, priv, i) { + if (!(irq_state->brdysts & (1 << i))) + continue; + + pkt = usbhs_pkt_get(pipe); + ret = usbhs_pkt_run(pkt); + if (ret < 0) + dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); + } + + return 0; +} + +/* + * fifo init + */ +void usbhs_fifo_init(struct usbhs_priv *priv) +{ + struct usbhs_mod *mod = usbhs_mod_get_current(priv); + + mod->irq_empty = usbhsf_irq_empty; + mod->irq_ready = usbhsf_irq_ready; + mod->irq_bempsts = 0; + mod->irq_brdysts = 0; +} + +void usbhs_fifo_quit(struct usbhs_priv *priv) +{ + struct usbhs_mod *mod = usbhs_mod_get_current(priv); + + mod->irq_empty = NULL; + mod->irq_ready = NULL; + mod->irq_bempsts = 0; + mod->irq_brdysts = 0; +} diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 04d8cdd..eab3258 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -19,30 +19,43 @@ #include "pipe.h" +struct usbhs_pkt_handle; struct usbhs_pkt { struct list_head node; struct usbhs_pipe *pipe; + struct usbhs_pkt_handle *handler; void *buf; int length; int actual; int zero; }; +struct usbhs_pkt_handle { + int (*prepare)(struct usbhs_pkt *pkt); + int (*try_run)(struct usbhs_pkt *pkt); +}; + /* * fifo */ -int usbhs_fifo_write(struct usbhs_pkt *pkt); -int usbhs_fifo_read(struct usbhs_pkt *pkt); -int usbhs_fifo_prepare_write(struct usbhs_pipe *pipe); -int usbhs_fifo_prepare_read(struct usbhs_pipe *pipe); +void usbhs_fifo_init(struct usbhs_priv *priv); +void usbhs_fifo_quit(struct usbhs_priv *priv); /* * packet info */ +extern struct usbhs_pkt_handle usbhs_fifo_push_handler; +extern struct usbhs_pkt_handle usbhs_fifo_pop_handler; +extern struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler; + void usbhs_pkt_init(struct usbhs_pkt *pkt); void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, + struct usbhs_pkt_handle *handler, void *buf, int len, int zero); void usbhs_pkt_pop(struct usbhs_pkt *pkt); struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe); +#define usbhs_pkt_start(p) ((p)->handler->prepare(p)) +#define usbhs_pkt_run(p) ((p)->handler->try_run(p)) + #endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 298984f..50c7566 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -31,7 +31,6 @@ struct usbhsg_request { #define EP_NAME_SIZE 8 struct usbhsg_gpriv; -struct usbhsg_pipe_handle; struct usbhsg_uep { struct usb_ep ep; struct usbhs_pipe *pipe; @@ -39,7 +38,7 @@ struct usbhsg_uep { char ep_name[EP_NAME_SIZE]; struct usbhsg_gpriv *gpriv; - struct usbhsg_pipe_handle *handler; + struct usbhs_pkt_handle *handler; }; struct usbhsg_gpriv { @@ -57,11 +56,6 @@ struct usbhsg_gpriv { #define USBHSG_STATUS_WEDGE (1 << 2) }; -struct usbhsg_pipe_handle { - int (*prepare)(struct usbhsg_uep *uep, struct usbhsg_request *ureq); - int (*try_run)(struct usbhsg_uep *uep, struct usbhsg_request *ureq); -}; - struct usbhsg_recip_handle { char *name; int (*device)(struct usbhs_priv *priv, struct usbhsg_uep *uep, @@ -164,7 +158,8 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, /* ********* assume under spin lock ********* */ - usbhs_pkt_push(pipe, pkt, req->buf, req->length, req->zero); + usbhs_pkt_push(pipe, pkt, uep->handler, + req->buf, req->length, req->zero); req->actual = 0; req->status = -EINPROGRESS; @@ -187,22 +182,15 @@ static struct usbhsg_request *usbhsg_queue_get(struct usbhsg_uep *uep) return usbhsg_pkt_to_ureq(pkt); } -#define usbhsg_queue_prepare(uep) __usbhsg_queue_handler(uep, 1); -#define usbhsg_queue_handle(uep) __usbhsg_queue_handler(uep, 0); -static int __usbhsg_queue_handler(struct usbhsg_uep *uep, int prepare) +static int usbhsg_queue_start(struct usbhsg_uep *uep) { struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - struct usbhsg_request *ureq; + struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + struct usbhs_pkt *pkt; spinlock_t *lock; unsigned long flags; int ret = 0; - if (!uep->handler) { - dev_err(dev, "no handler function\n"); - return -EIO; - } - /* * CAUTION [*queue handler*] * @@ -224,13 +212,10 @@ static int __usbhsg_queue_handler(struct usbhsg_uep *uep, int prepare) /****************** spin try lock *******************/ lock = usbhsg_trylock(gpriv, &flags); - ureq = usbhsg_queue_get(uep); - if (ureq) { - if (prepare) - ret = uep->handler->prepare(uep, ureq); - else - ret = uep->handler->try_run(uep, ureq); - } + pkt = usbhs_pkt_get(pipe); + if (pkt) + ret = usbhs_pkt_start(pkt); + usbhsg_unlock(lock, &flags); /******************** spin unlock ******************/ @@ -277,59 +262,10 @@ static void usbhsg_queue_pop(struct usbhsg_uep *uep, /* more request ? */ if (0 == status) - usbhsg_queue_prepare(uep); + usbhsg_queue_start(uep); } -/* - * irq enable/disable function - */ -#define usbhsg_irq_callback_ctrl(uep, status, enable) \ - ({ \ - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); \ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); \ - struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv); \ - struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ - if (!mod) \ - return; \ - if (enable) \ - mod->irq_##status |= (1 << usbhs_pipe_number(pipe)); \ - else \ - mod->irq_##status &= ~(1 << usbhs_pipe_number(pipe)); \ - usbhs_irq_callback_update(priv, mod); \ - }) - -static void usbhsg_irq_empty_ctrl(struct usbhsg_uep *uep, int enable) -{ - usbhsg_irq_callback_ctrl(uep, bempsts, enable); -} - -static void usbhsg_irq_ready_ctrl(struct usbhsg_uep *uep, int enable) -{ - usbhsg_irq_callback_ctrl(uep, brdysts, enable); -} - -/* - * handler function - */ -static int usbhsg_try_run_ctrl_stage_end(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) -{ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - - /* - ********* assume under spin lock ********* - */ - - usbhs_dcp_control_transfer_done(pipe); - usbhsg_queue_pop(uep, ureq, 0); - - return 0; -} - -/* - * packet send hander - */ -static void usbhsg_send_packet_done(struct usbhs_pkt *pkt) +static void usbhsg_queue_done(struct usbhs_pkt *pkt) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); @@ -340,108 +276,6 @@ static void usbhsg_send_packet_done(struct usbhs_pkt *pkt) usbhsg_queue_pop(uep, ureq, 0); } -static int usbhsg_try_run_send_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) -{ - struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); - - /* - ********* assume under spin lock ********* - */ - - usbhs_fifo_write(pkt); - - return 0; -} - -static int usbhsg_prepare_send_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) -{ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - - /* - ********* assume under spin lock ********* - */ - - usbhs_fifo_prepare_write(pipe); - usbhsg_try_run_send_packet(uep, ureq); - - return 0; -} - -/* - * packet recv hander - */ -static void usbhsg_receive_packet_done(struct usbhs_pkt *pkt) -{ - struct usbhs_pipe *pipe = pkt->pipe; - struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); - struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); - - ureq->req.actual = pkt->actual; - - usbhsg_queue_pop(uep, ureq, 0); -} - -static int usbhsg_try_run_receive_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) -{ - struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); - - /* - ********* assume under spin lock ********* - */ - - return usbhs_fifo_read(pkt); -} - -static int usbhsg_prepare_receive_packet(struct usbhsg_uep *uep, - struct usbhsg_request *ureq) -{ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - - /* - ********* assume under spin lock ********* - */ - - return usbhs_fifo_prepare_read(pipe); -} - -static struct usbhsg_pipe_handle usbhsg_handler_send_by_empty = { - .prepare = usbhsg_prepare_send_packet, - .try_run = usbhsg_try_run_send_packet, -}; - -static struct usbhsg_pipe_handle usbhsg_handler_send_by_ready = { - .prepare = usbhsg_prepare_send_packet, - .try_run = usbhsg_try_run_send_packet, -}; - -static struct usbhsg_pipe_handle usbhsg_handler_recv_by_ready = { - .prepare = usbhsg_prepare_receive_packet, - .try_run = usbhsg_try_run_receive_packet, -}; - -static struct usbhsg_pipe_handle usbhsg_handler_ctrl_stage_end = { - .prepare = usbhsg_try_run_ctrl_stage_end, - .try_run = usbhsg_try_run_ctrl_stage_end, -}; - -/* - * DCP pipe can NOT use "ready interrupt" for "send" - * it should use "empty" interrupt. - * see - * "Operation" - "Interrupt Function" - "BRDY Interrupt" - * - * on the other hand, normal pipe can use "ready interrupt" for "send" - * even though it is single/double buffer - */ -#define usbhsg_handler_send_ctrl usbhsg_handler_send_by_empty -#define usbhsg_handler_recv_ctrl usbhsg_handler_recv_by_ready - -#define usbhsg_handler_send_packet usbhsg_handler_send_by_ready -#define usbhsg_handler_recv_packet usbhsg_handler_recv_by_ready - /* * USB_TYPE_STANDARD / clear feature functions */ @@ -473,7 +307,7 @@ static int usbhsg_recip_handler_std_clear_endpoint(struct usbhs_priv *priv, usbhsg_recip_handler_std_control_done(priv, uep, ctrl); - usbhsg_queue_prepare(uep); + usbhsg_queue_start(uep); return 0; } @@ -580,13 +414,13 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv, switch (stage) { case READ_DATA_STAGE: - dcp->handler = &usbhsg_handler_send_ctrl; + dcp->handler = &usbhs_fifo_push_handler; break; case WRITE_DATA_STAGE: - dcp->handler = &usbhsg_handler_recv_ctrl; + dcp->handler = &usbhs_fifo_pop_handler; break; case NODATA_STATUS_STAGE: - dcp->handler = &usbhsg_handler_ctrl_stage_end; + dcp->handler = &usbhs_ctrl_stage_end_handler; break; default: return ret; @@ -620,72 +454,6 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv, return ret; } -static int usbhsg_irq_empty(struct usbhs_priv *priv, - struct usbhs_irq_state *irq_state) -{ - struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); - struct usbhsg_uep *uep; - struct usbhs_pipe *pipe; - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - int i, ret; - - if (!irq_state->bempsts) { - dev_err(dev, "debug %s !!\n", __func__); - return -EIO; - } - - dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); - - /* - * search interrupted "pipe" - * not "uep". - */ - usbhs_for_each_pipe_with_dcp(pipe, priv, i) { - if (!(irq_state->bempsts & (1 << i))) - continue; - - uep = usbhsg_pipe_to_uep(pipe); - ret = usbhsg_queue_handle(uep); - if (ret < 0) - dev_err(dev, "send error %d : %d\n", i, ret); - } - - return 0; -} - -static int usbhsg_irq_ready(struct usbhs_priv *priv, - struct usbhs_irq_state *irq_state) -{ - struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); - struct usbhsg_uep *uep; - struct usbhs_pipe *pipe; - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - int i, ret; - - if (!irq_state->brdysts) { - dev_err(dev, "debug %s !!\n", __func__); - return -EIO; - } - - dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); - - /* - * search interrupted "pipe" - * not "uep". - */ - usbhs_for_each_pipe_with_dcp(pipe, priv, i) { - if (!(irq_state->brdysts & (1 << i))) - continue; - - uep = usbhsg_pipe_to_uep(pipe); - ret = usbhsg_queue_handle(uep); - if (ret < 0) - dev_err(dev, "receive error %d : %d\n", i, ret); - } - - return 0; -} - /* * * usb_dcp_ops @@ -716,7 +484,6 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep) { struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usbhsg_request *ureq; - int disable = 0; /* ********* assume under spin lock ********* @@ -724,12 +491,6 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep) usbhs_pipe_disable(pipe); - /* - * disable pipe irq - */ - usbhsg_irq_empty_ctrl(uep, disable); - usbhsg_irq_ready_ctrl(uep, disable); - while (1) { ureq = usbhsg_queue_get(uep); if (!ureq) @@ -782,9 +543,9 @@ static int usbhsg_ep_enable(struct usb_ep *ep, pipe->mod_private = uep; if (usb_endpoint_dir_in(desc)) - uep->handler = &usbhsg_handler_send_packet; + uep->handler = &usbhs_fifo_push_handler; else - uep->handler = &usbhsg_handler_recv_packet; + uep->handler = &usbhs_fifo_pop_handler; ret = 0; } @@ -879,7 +640,7 @@ static int usbhsg_ep_queue(struct usb_ep *ep, struct usb_request *req, usbhsg_unlock(lock, &flags); /******************** spin unlock ******************/ - usbhsg_queue_prepare(uep); + usbhsg_queue_start(uep); return ret; } @@ -1006,8 +767,8 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) * pipe initialize and enable DCP */ usbhs_pipe_init(priv, - usbhsg_send_packet_done, - usbhsg_receive_packet_done); + usbhsg_queue_done); + usbhs_fifo_init(priv); usbhsg_uep_init(gpriv); usbhsg_dcp_enable(dcp); @@ -1026,10 +787,6 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) */ mod->irq_dev_state = usbhsg_irq_dev_state; mod->irq_ctrl_stage = usbhsg_irq_ctrl_stage; - mod->irq_empty = usbhsg_irq_empty; - mod->irq_ready = usbhsg_irq_ready; - mod->irq_bempsts = 0; - mod->irq_brdysts = 0; usbhs_irq_callback_update(priv, mod); usbhsg_try_start_unlock: @@ -1059,13 +816,11 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) !usbhsg_status_has(gpriv, USBHSG_STATUS_REGISTERD)) goto usbhsg_try_stop_unlock; + usbhs_fifo_quit(priv); + /* disable all irq */ mod->irq_dev_state = NULL; mod->irq_ctrl_stage = NULL; - mod->irq_empty = NULL; - mod->irq_ready = NULL; - mod->irq_bempsts = 0; - mod->irq_brdysts = 0; usbhs_irq_callback_update(priv, mod); usbhsg_dcp_disable(dcp); diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index 6e77791..56137d5 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -532,13 +532,18 @@ static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type) } void usbhs_pipe_init(struct usbhs_priv *priv, - void (*tx_done)(struct usbhs_pkt *pkt), - void (*rx_done)(struct usbhs_pkt *pkt)) + void (*done)(struct usbhs_pkt *pkt)) { struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + struct device *dev = usbhs_priv_to_dev(priv); struct usbhs_pipe *pipe; int i; + if (!done) { + dev_err(dev, "no done function\n"); + return; + } + /* * FIXME * @@ -565,8 +570,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, usbhsp_pipectrl_set(pipe, ACLRM, 0); } - info->tx_done = tx_done; - info->rx_done = rx_done; + info->done = done; } struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 535e6aa..20e3cf4 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -42,8 +42,7 @@ struct usbhs_pipe_info { int size; /* array size of "pipe" */ int bufnmb_last; /* FIXME : driver needs good allocator */ - void (*tx_done)(struct usbhs_pkt *pkt); - void (*rx_done)(struct usbhs_pkt *pkt); + void (*done)(struct usbhs_pkt *pkt); }; /* @@ -82,8 +81,7 @@ void usbhs_pipe_remove(struct usbhs_priv *priv); int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe); int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe); void usbhs_pipe_init(struct usbhs_priv *priv, - void (*tx_done)(struct usbhs_pkt *pkt), - void (*rx_done)(struct usbhs_pkt *pkt)); + void (*done)(struct usbhs_pkt *pkt)); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); -- cgit v0.10.2 From 8a2c225ddb2d23a9b3f70af2ec70d28e4abd0b8e Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:33 +0900 Subject: usb: renesas_usbhs: remove usbhsg_queue_get usbhsg_queue_get is no longer needed. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 50c7566..28b2b37 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -168,20 +168,6 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, req->length); } -static struct usbhsg_request *usbhsg_queue_get(struct usbhsg_uep *uep) -{ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - struct usbhs_pkt *pkt = usbhs_pkt_get(pipe); - - /* - ********* assume under spin lock ********* - */ - if (!pkt) - return 0; - - return usbhsg_pkt_to_ureq(pkt); -} - static int usbhsg_queue_start(struct usbhsg_uep *uep) { struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); @@ -483,7 +469,7 @@ static int usbhsg_dcp_enable(struct usbhsg_uep *uep) static int usbhsg_pipe_disable(struct usbhsg_uep *uep) { struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - struct usbhsg_request *ureq; + struct usbhs_pkt *pkt; /* ********* assume under spin lock ********* @@ -492,11 +478,11 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep) usbhs_pipe_disable(pipe); while (1) { - ureq = usbhsg_queue_get(uep); - if (!ureq) + pkt = usbhs_pkt_get(pipe); + if (!pkt) break; - usbhsg_queue_pop(uep, ureq, -ECONNRESET); + usbhs_pkt_pop(pkt); } return 0; @@ -690,7 +676,7 @@ static int __usbhsg_ep_set_halt_wedge(struct usb_ep *ep, int halt, int wedge) /******************** spin lock ********************/ lock = usbhsg_trylock(gpriv, &flags); - if (!usbhsg_queue_get(uep)) { + if (!usbhs_pkt_get(pipe)) { dev_dbg(dev, "set halt %d (pipe %d)\n", halt, usbhs_pipe_number(pipe)); -- cgit v0.10.2 From 97664a207bc2601a03a300f00e6922038cd5b99c Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:38 +0900 Subject: usb: renesas_usbhs: shrink spin lock area spin lock was very effective while doing 1 packet send/recv on current renesas_usbhs driver. But this lock is enough only - modify packet/pipe link - modify interrpt mask - modify fifo access This patch shrink spin lock area Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h index 0aadcb4..7bf675c 100644 --- a/drivers/usb/renesas_usbhs/common.h +++ b/drivers/usb/renesas_usbhs/common.h @@ -204,6 +204,10 @@ void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data); void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data); int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev); + +#define usbhs_lock(p, f) spin_lock_irqsave(usbhs_priv_to_lock(p), f) +#define usbhs_unlock(p, f) spin_unlock_irqrestore(usbhs_priv_to_lock(p), f) + /* * sysconfig */ diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index e9c4d3d..3cda71e 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -22,7 +22,7 @@ /* * packet info function */ -static int usbhsf_null_handle(struct usbhs_pkt *pkt) +static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); struct device *dev = usbhs_priv_to_dev(priv); @@ -48,6 +48,10 @@ void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, { struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); struct device *dev = usbhs_priv_to_dev(priv); + unsigned long flags; + + /******************** spin lock ********************/ + usbhs_lock(priv, flags); if (!handler) { dev_err(dev, "no handler function\n"); @@ -63,14 +67,17 @@ void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, pkt->length = len; pkt->zero = zero; pkt->actual = 0; + + usbhs_unlock(priv, flags); + /******************** spin unlock ******************/ } -void usbhs_pkt_pop(struct usbhs_pkt *pkt) +static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) { list_del_init(&pkt->node); } -struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe) +static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) { if (list_empty(&pipe->list)) return NULL; @@ -78,6 +85,71 @@ struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe) return list_entry(pipe->list.next, struct usbhs_pkt, node); } +struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + unsigned long flags; + + /******************** spin lock ********************/ + usbhs_lock(priv, flags); + + if (!pkt) + pkt = __usbhsf_pkt_get(pipe); + + if (pkt) + __usbhsf_pkt_del(pkt); + + usbhs_unlock(priv, flags); + /******************** spin unlock ******************/ + + return pkt; +} + +int __usbhs_pkt_handler(struct usbhs_pipe *pipe, int type) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + struct usbhs_pkt *pkt; + struct device *dev = usbhs_priv_to_dev(priv); + int (*func)(struct usbhs_pkt *pkt, int *is_done); + unsigned long flags; + int ret = 0; + int is_done = 0; + + /******************** spin lock ********************/ + usbhs_lock(priv, flags); + + pkt = __usbhsf_pkt_get(pipe); + if (!pkt) + goto __usbhs_pkt_handler_end; + + switch (type) { + case USBHSF_PKT_PREPARE: + func = pkt->handler->prepare; + break; + case USBHSF_PKT_TRY_RUN: + func = pkt->handler->try_run; + break; + default: + dev_err(dev, "unknown pkt hander\n"); + goto __usbhs_pkt_handler_end; + } + + ret = func(pkt, &is_done); + + if (is_done) + __usbhsf_pkt_del(pkt); + +__usbhs_pkt_handler_end: + usbhs_unlock(priv, flags); + /******************** spin unlock ******************/ + + if (is_done) + info->done(pkt); + + return ret; +} + /* * irq enable/disable function */ @@ -188,18 +260,17 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, int write) /* * PIO fifo functions */ -static int usbhsf_try_push(struct usbhs_pkt *pkt) +static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct device *dev = usbhs_priv_to_dev(priv); void __iomem *addr = priv->base + CFIFO; u8 *buf; int maxp = usbhs_pipe_get_maxpacket(pipe); int total_len; int i, ret, len; - int is_short, is_done; + int is_short; ret = usbhsf_fifo_select(pipe, 1); if (ret < 0) @@ -240,11 +311,11 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt) pkt->actual += total_len; if (pkt->actual < pkt->length) - is_done = 0; /* there are remainder data */ + *is_done = 0; /* there are remainder data */ else if (is_short) - is_done = 1; /* short packet */ + *is_done = 1; /* short packet */ else - is_done = !pkt->zero; /* send zero packet ? */ + *is_done = !pkt->zero; /* send zero packet ? */ /* * pipe/irq handling @@ -252,21 +323,19 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt) if (is_short) usbhsf_send_terminator(pipe); - usbhsf_tx_irq_ctrl(pipe, !is_done); + usbhsf_tx_irq_ctrl(pipe, !*is_done); usbhs_pipe_enable(pipe); dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", usbhs_pipe_number(pipe), - pkt->length, pkt->actual, is_done, pkt->zero); + pkt->length, pkt->actual, *is_done, pkt->zero); /* * Transmission end */ - if (is_done) { + if (*is_done) { if (usbhs_pipe_is_dcp(pipe)) usbhs_dcp_control_transfer_done(pipe); - - info->done(pkt); } return 0; @@ -286,7 +355,7 @@ struct usbhs_pkt_handle usbhs_fifo_push_handler = { .try_run = usbhsf_try_push, }; -static int usbhsf_prepare_pop(struct usbhs_pkt *pkt) +static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; int ret; @@ -304,7 +373,7 @@ static int usbhsf_prepare_pop(struct usbhs_pkt *pkt) return ret; } -static int usbhsf_try_pop(struct usbhs_pkt *pkt) +static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); @@ -316,7 +385,6 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt) int rcv_len, len; int i, ret; int total_len = 0; - int is_done = 0; ret = usbhsf_fifo_select(pipe, 0); if (ret < 0) @@ -367,22 +435,16 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt) usbhs_fifo_read_end: if ((pkt->actual == pkt->length) || /* receive all data */ - (total_len < maxp)) /* short packet */ - is_done = 1; - - dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", - usbhs_pipe_number(pipe), - pkt->length, pkt->actual, is_done, pkt->zero); - - if (is_done) { - struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); - + (total_len < maxp)) { /* short packet */ + *is_done = 1; usbhsf_rx_irq_ctrl(pipe, 0); usbhs_pipe_disable(pipe); - - info->done(pkt); } + dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", + usbhs_pipe_number(pipe), + pkt->length, pkt->actual, *is_done, pkt->zero); + return 0; } @@ -394,15 +456,11 @@ struct usbhs_pkt_handle usbhs_fifo_pop_handler = { /* * handler function */ -static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt) +static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) { - struct usbhs_pipe *pipe = pkt->pipe; - struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + usbhs_dcp_control_transfer_done(pkt->pipe); - usbhs_dcp_control_transfer_done(pipe); - - info->done(pkt); + *is_done = 1; return 0; } @@ -419,7 +477,6 @@ static int usbhsf_irq_empty(struct usbhs_priv *priv, struct usbhs_irq_state *irq_state) { struct usbhs_pipe *pipe; - struct usbhs_pkt *pkt; struct device *dev = usbhs_priv_to_dev(priv); int i, ret; @@ -438,8 +495,7 @@ static int usbhsf_irq_empty(struct usbhs_priv *priv, if (!(irq_state->bempsts & (1 << i))) continue; - pkt = usbhs_pkt_get(pipe); - ret = usbhs_pkt_run(pkt); + ret = usbhs_pkt_run(pipe); if (ret < 0) dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); } @@ -451,7 +507,6 @@ static int usbhsf_irq_ready(struct usbhs_priv *priv, struct usbhs_irq_state *irq_state) { struct usbhs_pipe *pipe; - struct usbhs_pkt *pkt; struct device *dev = usbhs_priv_to_dev(priv); int i, ret; @@ -470,8 +525,7 @@ static int usbhsf_irq_ready(struct usbhs_priv *priv, if (!(irq_state->brdysts & (1 << i))) continue; - pkt = usbhs_pkt_get(pipe); - ret = usbhs_pkt_run(pkt); + ret = usbhs_pkt_run(pipe); if (ret < 0) dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); } diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index eab3258..fcb1ece 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -31,8 +31,8 @@ struct usbhs_pkt { }; struct usbhs_pkt_handle { - int (*prepare)(struct usbhs_pkt *pkt); - int (*try_run)(struct usbhs_pkt *pkt); + int (*prepare)(struct usbhs_pkt *pkt, int *is_done); + int (*try_run)(struct usbhs_pkt *pkt, int *is_done); }; /* @@ -44,6 +44,11 @@ void usbhs_fifo_quit(struct usbhs_priv *priv); /* * packet info */ +enum { + USBHSF_PKT_PREPARE, + USBHSF_PKT_TRY_RUN, +}; + extern struct usbhs_pkt_handle usbhs_fifo_push_handler; extern struct usbhs_pkt_handle usbhs_fifo_pop_handler; extern struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler; @@ -52,10 +57,10 @@ void usbhs_pkt_init(struct usbhs_pkt *pkt); void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, struct usbhs_pkt_handle *handler, void *buf, int len, int zero); -void usbhs_pkt_pop(struct usbhs_pkt *pkt); -struct usbhs_pkt *usbhs_pkt_get(struct usbhs_pipe *pipe); +struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt); +int __usbhs_pkt_handler(struct usbhs_pipe *pipe, int type); -#define usbhs_pkt_start(p) ((p)->handler->prepare(p)) -#define usbhs_pkt_run(p) ((p)->handler->try_run(p)) +#define usbhs_pkt_start(p) __usbhs_pkt_handler(p, USBHSF_PKT_PREPARE) +#define usbhs_pkt_run(p) __usbhs_pkt_handler(p, USBHSF_PKT_TRY_RUN) #endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 28b2b37..b5a5ba7 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -92,7 +92,6 @@ struct usbhsg_recip_handle { container_of(r, struct usbhsg_request, req) #define usbhsg_ep_to_uep(e) container_of(e, struct usbhsg_uep, ep) -#define usbhsg_gpriv_to_lock(gp) usbhs_priv_to_lock((gp)->mod.priv) #define usbhsg_gpriv_to_dev(gp) usbhs_priv_to_dev((gp)->mod.priv) #define usbhsg_gpriv_to_priv(gp) ((gp)->mod.priv) #define usbhsg_gpriv_to_dcp(gp) ((gp)->uep) @@ -115,35 +114,6 @@ struct usbhsg_recip_handle { #define usbhsg_status_has(gp, b) (gp->status & b) /* - * usbhsg_trylock - * - * This driver don't use spin_try_lock - * to avoid warning of CONFIG_DEBUG_SPINLOCK - */ -static spinlock_t *usbhsg_trylock(struct usbhsg_gpriv *gpriv, - unsigned long *flags) -{ - spinlock_t *lock = usbhsg_gpriv_to_lock(gpriv); - - /* check spin lock status - * to avoid deadlock/nest */ - if (spin_is_locked(lock)) - return NULL; - - spin_lock_irqsave(lock, *flags); - - return lock; -} - -static void usbhsg_unlock(spinlock_t *lock, unsigned long *flags) -{ - if (!lock) - return; - - spin_unlock_irqrestore(lock, *flags); -} - -/* * list push/pop */ static void usbhsg_queue_push(struct usbhsg_uep *uep, @@ -155,9 +125,6 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); struct usb_request *req = &ureq->req; - /* - ********* assume under spin lock ********* - */ usbhs_pkt_push(pipe, pkt, uep->handler, req->buf, req->length, req->zero); req->actual = 0; @@ -168,44 +135,11 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, req->length); } -static int usbhsg_queue_start(struct usbhsg_uep *uep) +static void usbhsg_queue_start(struct usbhsg_uep *uep) { - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - struct usbhs_pkt *pkt; - spinlock_t *lock; - unsigned long flags; - int ret = 0; - - /* - * CAUTION [*queue handler*] - * - * This function will be called for start/restart queue operation. - * OTOH the most much worry for USB driver is spinlock nest. - * Specially it are - * - usb_ep_ops :: queue - * - usb_request :: complete - * - * But the caller of this function need not care about spinlock. - * This function is using usbhsg_trylock for it. - * if "is_locked" is 1, this mean this function lock it. - * but if it is 0, this mean it is already under spin lock. - * see also - * CAUTION [*endpoint queue*] - * CAUTION [*request complete*] - */ - - /****************** spin try lock *******************/ - lock = usbhsg_trylock(gpriv, &flags); - - pkt = usbhs_pkt_get(pipe); - if (pkt) - ret = usbhs_pkt_start(pkt); - - usbhsg_unlock(lock, &flags); - /******************** spin unlock ******************/ - return ret; + usbhs_pkt_start(pipe); } static void usbhsg_queue_pop(struct usbhsg_uep *uep, @@ -215,34 +149,9 @@ static void usbhsg_queue_pop(struct usbhsg_uep *uep, struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct device *dev = usbhsg_gpriv_to_dev(gpriv); - struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); - - /* - ********* assume under spin lock ********* - */ - - /* - * CAUTION [*request complete*] - * - * There is a possibility not to be called in correct order - * if "complete" is called without spinlock. - * - * So, this function assume it is under spinlock, - * and call usb_request :: complete. - * - * But this "complete" will push next usb_request. - * It mean "usb_ep_ops :: queue" which is using spinlock is called - * under spinlock. - * - * To avoid dead-lock, this driver is using usbhsg_trylock. - * CAUTION [*endpoint queue*] - * CAUTION [*queue handler*] - */ dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe)); - usbhs_pkt_pop(pkt); - ureq->req.status = status; ureq->req.complete(&uep->ep, &ureq->req); @@ -293,8 +202,6 @@ static int usbhsg_recip_handler_std_clear_endpoint(struct usbhs_priv *priv, usbhsg_recip_handler_std_control_done(priv, uep, ctrl); - usbhsg_queue_start(uep); - return 0; } @@ -325,7 +232,8 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv, uep = usbhsg_gpriv_to_nth_uep(gpriv, nth); if (!usbhsg_uep_to_pipe(uep)) { dev_err(dev, "wrong recip request\n"); - return -EINVAL; + ret = -EINVAL; + goto usbhsg_recip_run_handle_end; } switch (recip) { @@ -348,10 +256,20 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv, } if (func) { + unsigned long flags; + dev_dbg(dev, "%s (pipe %d :%s)\n", handler->name, nth, msg); + + /******************** spin lock ********************/ + usbhs_lock(priv, flags); ret = func(priv, uep, ctrl); + usbhs_unlock(priv, flags); + /******************** spin unlock ******************/ } +usbhsg_recip_run_handle_end: + usbhsg_queue_start(uep); + return ret; } @@ -445,44 +363,17 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv, * usb_dcp_ops * */ -static int usbhsg_dcp_enable(struct usbhsg_uep *uep) -{ - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv); - struct usbhs_pipe *pipe; - - /* - ********* assume under spin lock ********* - */ - - pipe = usbhs_dcp_malloc(priv); - if (!pipe) - return -EIO; - - uep->pipe = pipe; - uep->pipe->mod_private = uep; - - return 0; -} - -#define usbhsg_dcp_disable usbhsg_pipe_disable static int usbhsg_pipe_disable(struct usbhsg_uep *uep) { struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usbhs_pkt *pkt; - /* - ********* assume under spin lock ********* - */ - usbhs_pipe_disable(pipe); while (1) { - pkt = usbhs_pkt_get(pipe); + pkt = usbhs_pkt_pop(pipe, NULL); if (!pkt) break; - - usbhs_pkt_pop(pkt); } return 0; @@ -509,8 +400,6 @@ static int usbhsg_ep_enable(struct usb_ep *ep, struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv); struct usbhs_pipe *pipe; - spinlock_t *lock; - unsigned long flags; int ret = -EIO; /* @@ -520,9 +409,6 @@ static int usbhsg_ep_enable(struct usb_ep *ep, if (uep->pipe) return 0; - /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); - pipe = usbhs_pipe_malloc(priv, desc); if (pipe) { uep->pipe = pipe; @@ -536,29 +422,14 @@ static int usbhsg_ep_enable(struct usb_ep *ep, ret = 0; } - usbhsg_unlock(lock, &flags); - /******************** spin unlock ******************/ - return ret; } static int usbhsg_ep_disable(struct usb_ep *ep) { struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep); - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - spinlock_t *lock; - unsigned long flags; - int ret; - /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); - - ret = usbhsg_pipe_disable(uep); - - usbhsg_unlock(lock, &flags); - /******************** spin unlock ******************/ - - return ret; + return usbhsg_pipe_disable(uep); } static struct usb_request *usbhsg_ep_alloc_request(struct usb_ep *ep, @@ -591,69 +462,28 @@ static int usbhsg_ep_queue(struct usb_ep *ep, struct usb_request *req, struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); struct usbhsg_request *ureq = usbhsg_req_to_ureq(req); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - spinlock_t *lock; - unsigned long flags; - int ret = 0; - - /* - * CAUTION [*endpoint queue*] - * - * This function will be called from usb_request :: complete - * or usb driver timing. - * If this function is called from usb_request :: complete, - * it is already under spinlock on this driver. - * but it is called frm usb driver, this function should call spinlock. - * - * This function is using usbshg_trylock to solve this issue. - * if "is_locked" is 1, this mean this function lock it. - * but if it is 0, this mean it is already under spin lock. - * see also - * CAUTION [*queue handler*] - * CAUTION [*request complete*] - */ - - /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); /* param check */ if (usbhsg_is_not_connected(gpriv) || unlikely(!gpriv->driver) || unlikely(!pipe)) - ret = -ESHUTDOWN; - else - usbhsg_queue_push(uep, ureq); - - usbhsg_unlock(lock, &flags); - /******************** spin unlock ******************/ + return -ESHUTDOWN; + usbhsg_queue_push(uep, ureq); usbhsg_queue_start(uep); - return ret; + return 0; } static int usbhsg_ep_dequeue(struct usb_ep *ep, struct usb_request *req) { struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep); struct usbhsg_request *ureq = usbhsg_req_to_ureq(req); - struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); - spinlock_t *lock; - unsigned long flags; - - /* - * see - * CAUTION [*queue handler*] - * CAUTION [*endpoint queue*] - * CAUTION [*request complete*] - */ - - /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); + struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); + usbhs_pkt_pop(pipe, usbhsg_ureq_to_pkt(ureq)); usbhsg_queue_pop(uep, ureq, -ECONNRESET); - usbhsg_unlock(lock, &flags); - /******************** spin unlock ******************/ - return 0; } @@ -662,42 +492,32 @@ static int __usbhsg_ep_set_halt_wedge(struct usb_ep *ep, int halt, int wedge) struct usbhsg_uep *uep = usbhsg_ep_to_uep(ep); struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); + struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv); struct device *dev = usbhsg_gpriv_to_dev(gpriv); - spinlock_t *lock; unsigned long flags; - int ret = -EAGAIN; - /* - * see - * CAUTION [*queue handler*] - * CAUTION [*endpoint queue*] - * CAUTION [*request complete*] - */ - - /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); - if (!usbhs_pkt_get(pipe)) { + usbhsg_pipe_disable(uep); - dev_dbg(dev, "set halt %d (pipe %d)\n", - halt, usbhs_pipe_number(pipe)); + dev_dbg(dev, "set halt %d (pipe %d)\n", + halt, usbhs_pipe_number(pipe)); - if (halt) - usbhs_pipe_stall(pipe); - else - usbhs_pipe_disable(pipe); + /******************** spin lock ********************/ + usbhs_lock(priv, flags); - if (halt && wedge) - usbhsg_status_set(gpriv, USBHSG_STATUS_WEDGE); - else - usbhsg_status_clr(gpriv, USBHSG_STATUS_WEDGE); + if (halt) + usbhs_pipe_stall(pipe); + else + usbhs_pipe_disable(pipe); - ret = 0; - } + if (halt && wedge) + usbhsg_status_set(gpriv, USBHSG_STATUS_WEDGE); + else + usbhsg_status_clr(gpriv, USBHSG_STATUS_WEDGE); - usbhsg_unlock(lock, &flags); + usbhs_unlock(priv, flags); /******************** spin unlock ******************/ - return ret; + return 0; } static int usbhsg_ep_set_halt(struct usb_ep *ep, int value) @@ -733,20 +553,26 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv); struct usbhs_mod *mod = usbhs_mod_get_current(priv); struct device *dev = usbhs_priv_to_dev(priv); - spinlock_t *lock; unsigned long flags; + int ret = 0; /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); + usbhs_lock(priv, flags); - /* - * enable interrupt and systems if ready - */ usbhsg_status_set(gpriv, status); if (!(usbhsg_status_has(gpriv, USBHSG_STATUS_STARTED) && usbhsg_status_has(gpriv, USBHSG_STATUS_REGISTERD))) - goto usbhsg_try_start_unlock; + ret = -1; /* not ready */ + + usbhs_unlock(priv, flags); + /******************** spin unlock ********************/ + + if (ret < 0) + return 0; /* not ready is not error */ + /* + * enable interrupt and systems if ready + */ dev_dbg(dev, "start gadget\n"); /* @@ -756,7 +582,10 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) usbhsg_queue_done); usbhs_fifo_init(priv); usbhsg_uep_init(gpriv); - usbhsg_dcp_enable(dcp); + + /* dcp init */ + dcp->pipe = usbhs_dcp_malloc(priv); + dcp->pipe->mod_private = dcp; /* * system config enble @@ -775,10 +604,6 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) mod->irq_ctrl_stage = usbhsg_irq_ctrl_stage; usbhs_irq_callback_update(priv, mod); -usbhsg_try_start_unlock: - usbhsg_unlock(lock, &flags); - /******************** spin unlock ********************/ - return 0; } @@ -788,20 +613,26 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) struct usbhs_mod *mod = usbhs_mod_get_current(priv); struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv); struct device *dev = usbhs_priv_to_dev(priv); - spinlock_t *lock; unsigned long flags; + int ret = 0; /******************** spin lock ********************/ - lock = usbhsg_trylock(gpriv, &flags); + usbhs_lock(priv, flags); - /* - * disable interrupt and systems if 1st try - */ usbhsg_status_clr(gpriv, status); if (!usbhsg_status_has(gpriv, USBHSG_STATUS_STARTED) && !usbhsg_status_has(gpriv, USBHSG_STATUS_REGISTERD)) - goto usbhsg_try_stop_unlock; + ret = -1; /* already done */ + + usbhs_unlock(priv, flags); + /******************** spin unlock ********************/ + + if (ret < 0) + return 0; /* already done is not error */ + /* + * disable interrupt and systems if 1st try + */ usbhs_fifo_quit(priv); /* disable all irq */ @@ -809,8 +640,6 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) mod->irq_ctrl_stage = NULL; usbhs_irq_callback_update(priv, mod); - usbhsg_dcp_disable(dcp); - gpriv->gadget.speed = USB_SPEED_UNKNOWN; /* disable sys */ @@ -818,8 +647,7 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) usbhs_sys_function_ctrl(priv, 0); usbhs_sys_usb_ctrl(priv, 0); - usbhsg_unlock(lock, &flags); - /******************** spin unlock ********************/ + usbhsg_pipe_disable(dcp); if (gpriv->driver && gpriv->driver->disconnect) @@ -828,11 +656,6 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) dev_dbg(dev, "stop gadget\n"); return 0; - -usbhsg_try_stop_unlock: - usbhsg_unlock(lock, &flags); - - return 0; } /* -- cgit v0.10.2 From d3af90a5e4e8fb7a93d408799682e566c9270808 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:44 +0900 Subject: usb: renesas_usbhs: add usbhsf_fifo renesas_usbhs has CFIFO/D0FIFO/D1FIFO. But current renesas_usbhs is using CFIFO (for PIO) only for now. The fifo selection method is needed for DMAEngine support. This is a preparation for DMAEngine support Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c index f3664d6..e510b29 100644 --- a/drivers/usb/renesas_usbhs/common.c +++ b/drivers/usb/renesas_usbhs/common.c @@ -323,10 +323,14 @@ static int __devinit usbhs_probe(struct platform_device *pdev) if (ret < 0) goto probe_end_iounmap; - ret = usbhs_mod_probe(priv); + ret = usbhs_fifo_probe(priv); if (ret < 0) goto probe_end_pipe_exit; + ret = usbhs_mod_probe(priv); + if (ret < 0) + goto probe_end_fifo_exit; + /* dev_set_drvdata should be called after usbhs_mod_init */ dev_set_drvdata(&pdev->dev, priv); @@ -374,6 +378,8 @@ probe_end_call_remove: usbhs_platform_call(priv, hardware_exit, pdev); probe_end_mod_exit: usbhs_mod_remove(priv); +probe_end_fifo_exit: + usbhs_fifo_remove(priv); probe_end_pipe_exit: usbhs_pipe_remove(priv); probe_end_iounmap: @@ -404,6 +410,7 @@ static int __devexit usbhs_remove(struct platform_device *pdev) usbhs_platform_call(priv, hardware_exit, pdev); usbhs_mod_remove(priv); + usbhs_fifo_remove(priv); usbhs_pipe_remove(priv); iounmap(priv->base); kfree(priv); diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h index 7bf675c..06d7239 100644 --- a/drivers/usb/renesas_usbhs/common.h +++ b/drivers/usb/renesas_usbhs/common.h @@ -194,6 +194,11 @@ struct usbhs_priv { * pipe control */ struct usbhs_pipe_info pipe_info; + + /* + * fifo control + */ + struct usbhs_fifo_info fifo_info; }; /* diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 3cda71e..53e2b35 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -19,6 +19,8 @@ #include "./common.h" #include "./pipe.h" +#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) + /* * packet info function */ @@ -194,20 +196,22 @@ static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) /* * FIFO ctrl */ -static void usbhsf_send_terminator(struct usbhs_pipe *pipe) +static void usbhsf_send_terminator(struct usbhs_pipe *pipe, + struct usbhs_fifo *fifo) { struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - usbhs_bset(priv, CFIFOCTR, BVAL, BVAL); + usbhs_bset(priv, fifo->ctr, BVAL, BVAL); } -static int usbhsf_fifo_barrier(struct usbhs_priv *priv) +static int usbhsf_fifo_barrier(struct usbhs_priv *priv, + struct usbhs_fifo *fifo) { int timeout = 1024; do { /* The FIFO port is accessible */ - if (usbhs_read(priv, CFIFOCTR) & FRDY) + if (usbhs_read(priv, fifo->ctr) & FRDY) return 0; udelay(10); @@ -216,22 +220,26 @@ static int usbhsf_fifo_barrier(struct usbhs_priv *priv) return -EBUSY; } -static void usbhsf_fifo_clear(struct usbhs_pipe *pipe) +static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, + struct usbhs_fifo *fifo) { struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); if (!usbhs_pipe_is_dcp(pipe)) - usbhsf_fifo_barrier(priv); + usbhsf_fifo_barrier(priv, fifo); - usbhs_write(priv, CFIFOCTR, BCLR); + usbhs_write(priv, fifo->ctr, BCLR); } -static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv) +static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, + struct usbhs_fifo *fifo) { - return usbhs_read(priv, CFIFOCTR) & DTLN_MASK; + return usbhs_read(priv, fifo->ctr) & DTLN_MASK; } -static int usbhsf_fifo_select(struct usbhs_pipe *pipe, int write) +static int usbhsf_fifo_select(struct usbhs_pipe *pipe, + struct usbhs_fifo *fifo, + int write) { struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); struct device *dev = usbhs_priv_to_dev(priv); @@ -243,11 +251,11 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, int write) base |= (1 == write) << 5; /* ISEL */ /* "base" will be used below */ - usbhs_write(priv, CFIFOSEL, base | MBW_32); + usbhs_write(priv, fifo->sel, base | MBW_32); /* check ISEL and CURPIPE value */ while (timeout--) { - if (base == (mask & usbhs_read(priv, CFIFOSEL))) + if (base == (mask & usbhs_read(priv, fifo->sel))) return 0; udelay(10); } @@ -265,14 +273,15 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); struct device *dev = usbhs_priv_to_dev(priv); - void __iomem *addr = priv->base + CFIFO; + struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ + void __iomem *addr = priv->base + fifo->port; u8 *buf; int maxp = usbhs_pipe_get_maxpacket(pipe); int total_len; int i, ret, len; int is_short; - ret = usbhsf_fifo_select(pipe, 1); + ret = usbhsf_fifo_select(pipe, fifo, 1); if (ret < 0) goto usbhs_fifo_write_busy; @@ -280,7 +289,7 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) if (ret < 0) goto usbhs_fifo_write_busy; - ret = usbhsf_fifo_barrier(priv); + ret = usbhsf_fifo_barrier(priv, fifo); if (ret < 0) goto usbhs_fifo_write_busy; @@ -321,7 +330,7 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) * pipe/irq handling */ if (is_short) - usbhsf_send_terminator(pipe); + usbhsf_send_terminator(pipe, fifo); usbhsf_tx_irq_ctrl(pipe, !*is_done); usbhs_pipe_enable(pipe); @@ -358,19 +367,21 @@ struct usbhs_pkt_handle usbhs_fifo_push_handler = { static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ int ret; /* * select pipe and enable it to prepare packet receive */ - ret = usbhsf_fifo_select(pipe, 0); + ret = usbhsf_fifo_select(pipe, fifo, 0); if (ret < 0) return ret; usbhs_pipe_enable(pipe); usbhsf_rx_irq_ctrl(pipe, 1); - return ret; + return 0; } static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) @@ -378,7 +389,8 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); struct device *dev = usbhs_priv_to_dev(priv); - void __iomem *addr = priv->base + CFIFO; + struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ + void __iomem *addr = priv->base + fifo->port; u8 *buf; u32 data = 0; int maxp = usbhs_pipe_get_maxpacket(pipe); @@ -386,15 +398,15 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) int i, ret; int total_len = 0; - ret = usbhsf_fifo_select(pipe, 0); + ret = usbhsf_fifo_select(pipe, fifo, 0); if (ret < 0) return ret; - ret = usbhsf_fifo_barrier(priv); + ret = usbhsf_fifo_barrier(priv, fifo); if (ret < 0) return ret; - rcv_len = usbhsf_fifo_rcv_len(priv); + rcv_len = usbhsf_fifo_rcv_len(priv, fifo); buf = pkt->buf + pkt->actual; len = pkt->length - pkt->actual; @@ -408,7 +420,7 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" */ if (0 == rcv_len) { - usbhsf_fifo_clear(pipe); + usbhsf_fifo_clear(pipe, fifo); goto usbhs_fifo_read_end; } @@ -555,3 +567,20 @@ void usbhs_fifo_quit(struct usbhs_priv *priv) mod->irq_bempsts = 0; mod->irq_brdysts = 0; } + +int usbhs_fifo_probe(struct usbhs_priv *priv) +{ + struct usbhs_fifo *fifo; + + /* CFIFO */ + fifo = usbhsf_get_cfifo(priv); + fifo->port = CFIFO; + fifo->sel = CFIFOSEL; + fifo->ctr = CFIFOCTR; + + return 0; +} + +void usbhs_fifo_remove(struct usbhs_priv *priv) +{ +} diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index fcb1ece..04d000a 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -19,6 +19,16 @@ #include "pipe.h" +struct usbhs_fifo { + u32 port; /* xFIFO */ + u32 sel; /* xFIFOSEL */ + u32 ctr; /* xFIFOCTR */ +}; + +struct usbhs_fifo_info { + struct usbhs_fifo cfifo; +}; + struct usbhs_pkt_handle; struct usbhs_pkt { struct list_head node; @@ -38,6 +48,8 @@ struct usbhs_pkt_handle { /* * fifo */ +int usbhs_fifo_probe(struct usbhs_priv *priv); +void usbhs_fifo_remove(struct usbhs_priv *priv); void usbhs_fifo_init(struct usbhs_priv *priv); void usbhs_fifo_quit(struct usbhs_priv *priv); -- cgit v0.10.2 From d77e3f4e1743834c7b4acb54004ffd7f57c82582 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:50 +0900 Subject: usb: renesas_usbhs: add pipe/fifo link renesas_usbhs has CFIFO which is for PIO transfer, and D0FIFO/D1FIFO which are for DMA transfer. The pipe selects one of these fifo when it send/recv data. But fifo must not be selected to different pipe in same time. This patch add pipe/fifo link for each other, and fifo is not selected by another pipe until it is unselected. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 53e2b35..8852423 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -21,6 +21,8 @@ #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) +#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ + /* * packet info function */ @@ -237,6 +239,15 @@ static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, return usbhs_read(priv, fifo->ctr) & DTLN_MASK; } +static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, + struct usbhs_fifo *fifo) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + + usbhs_pipe_select_fifo(pipe, NULL); + usbhs_write(priv, fifo->sel, 0); +} + static int usbhsf_fifo_select(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo, int write) @@ -247,6 +258,10 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ + if (usbhs_pipe_is_busy(pipe) || + usbhsf_fifo_is_busy(fifo)) + return -EBUSY; + if (usbhs_pipe_is_dcp(pipe)) base |= (1 == write) << 5; /* ISEL */ @@ -255,8 +270,10 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, /* check ISEL and CURPIPE value */ while (timeout--) { - if (base == (mask & usbhs_read(priv, fifo->sel))) + if (base == (mask & usbhs_read(priv, fifo->sel))) { + usbhs_pipe_select_fifo(pipe, fifo); return 0; + } udelay(10); } @@ -283,7 +300,7 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) ret = usbhsf_fifo_select(pipe, fifo, 1); if (ret < 0) - goto usbhs_fifo_write_busy; + return 0; ret = usbhs_pipe_is_accessible(pipe); if (ret < 0) @@ -347,9 +364,13 @@ static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) usbhs_dcp_control_transfer_done(pipe); } + usbhsf_fifo_unselect(pipe, fifo); + return 0; usbhs_fifo_write_busy: + usbhsf_fifo_unselect(pipe, fifo); + /* * pipe is busy. * retry in interrupt @@ -367,16 +388,13 @@ struct usbhs_pkt_handle usbhs_fifo_push_handler = { static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; - struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); - struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ - int ret; + + if (usbhs_pipe_is_busy(pipe)) + return 0; /* - * select pipe and enable it to prepare packet receive + * pipe enable to prepare packet receive */ - ret = usbhsf_fifo_select(pipe, fifo, 0); - if (ret < 0) - return ret; usbhs_pipe_enable(pipe); usbhsf_rx_irq_ctrl(pipe, 1); @@ -400,11 +418,11 @@ static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) ret = usbhsf_fifo_select(pipe, fifo, 0); if (ret < 0) - return ret; + return 0; ret = usbhsf_fifo_barrier(priv, fifo); if (ret < 0) - return ret; + goto usbhs_fifo_read_busy; rcv_len = usbhsf_fifo_rcv_len(priv, fifo); @@ -457,7 +475,10 @@ usbhs_fifo_read_end: usbhs_pipe_number(pipe), pkt->length, pkt->actual, *is_done, pkt->zero); - return 0; +usbhs_fifo_read_busy: + usbhsf_fifo_unselect(pipe, fifo); + + return ret; } struct usbhs_pkt_handle usbhs_fifo_pop_handler = { @@ -551,11 +572,14 @@ static int usbhsf_irq_ready(struct usbhs_priv *priv, void usbhs_fifo_init(struct usbhs_priv *priv) { struct usbhs_mod *mod = usbhs_mod_get_current(priv); + struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); mod->irq_empty = usbhsf_irq_empty; mod->irq_ready = usbhsf_irq_ready; mod->irq_bempsts = 0; mod->irq_brdysts = 0; + + cfifo->pipe = NULL; } void usbhs_fifo_quit(struct usbhs_priv *priv) diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 04d000a..4292f8c 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -23,6 +23,8 @@ struct usbhs_fifo { u32 port; /* xFIFO */ u32 sel; /* xFIFOSEL */ u32 ctr; /* xFIFOCTR */ + + struct usbhs_pipe *pipe; }; struct usbhs_fifo_info { diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index 56137d5..c050587 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -562,6 +562,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, info->bufnmb_last++; usbhsp_flags_init(pipe); + pipe->fifo = NULL; pipe->mod_private = NULL; INIT_LIST_HEAD(&pipe->list); @@ -620,6 +621,18 @@ struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, return pipe; } +void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo) +{ + if (pipe->fifo) + pipe->fifo->pipe = NULL; + + pipe->fifo = fifo; + + if (fifo) + fifo->pipe = pipe; +} + + /* * dcp control */ diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 20e3cf4..484adbe 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -27,6 +27,7 @@ struct usbhs_pipe { u32 pipe_type; /* USB_ENDPOINT_XFER_xxx */ struct usbhs_priv *priv; + struct usbhs_fifo *fifo; struct list_head list; u32 flags; @@ -88,10 +89,13 @@ int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); void usbhs_pipe_enable(struct usbhs_pipe *pipe); void usbhs_pipe_disable(struct usbhs_pipe *pipe); void usbhs_pipe_stall(struct usbhs_pipe *pipe); +void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo); #define usbhs_pipe_to_priv(p) ((p)->priv) #define usbhs_pipe_number(p) (int)((p) - (p)->priv->pipe_info.pipe) #define usbhs_pipe_is_dcp(p) ((p)->priv->pipe_info.pipe == (p)) +#define usbhs_pipe_to_fifo(p) ((p)->fifo) +#define usbhs_pipe_is_busy(p) usbhs_pipe_to_fifo(p) /* * dcp control -- cgit v0.10.2 From 0432eed008024e0e90f16207ab406ac6ec877cac Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:54 +0900 Subject: usb: renesas_usbhs: tifyup packet start timing packet transfer timing are controlled in mod_gadget on current renesas_usbhs, and this style will be imitated on mod_host. But it need not be managed with host/gadget if it is general transfer. By this patch, the packet transfer timing is managed in fifo.c Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 8852423..0efee5f 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -74,6 +74,8 @@ void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, usbhs_unlock(priv, flags); /******************** spin unlock ******************/ + + usbhs_pkt_start(pipe); } static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) @@ -148,8 +150,10 @@ __usbhs_pkt_handler_end: usbhs_unlock(priv, flags); /******************** spin unlock ******************/ - if (is_done) + if (is_done) { info->done(pkt); + usbhs_pkt_start(pipe); + } return ret; } diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index b5a5ba7..3c58248 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -125,23 +125,16 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep, struct usbhs_pkt *pkt = usbhsg_ureq_to_pkt(ureq); struct usb_request *req = &ureq->req; - usbhs_pkt_push(pipe, pkt, uep->handler, - req->buf, req->length, req->zero); req->actual = 0; req->status = -EINPROGRESS; + usbhs_pkt_push(pipe, pkt, uep->handler, + req->buf, req->length, req->zero); dev_dbg(dev, "pipe %d : queue push (%d)\n", usbhs_pipe_number(pipe), req->length); } -static void usbhsg_queue_start(struct usbhsg_uep *uep) -{ - struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); - - usbhs_pkt_start(pipe); -} - static void usbhsg_queue_pop(struct usbhsg_uep *uep, struct usbhsg_request *ureq, int status) @@ -154,10 +147,6 @@ static void usbhsg_queue_pop(struct usbhsg_uep *uep, ureq->req.status = status; ureq->req.complete(&uep->ep, &ureq->req); - - /* more request ? */ - if (0 == status) - usbhsg_queue_start(uep); } static void usbhsg_queue_done(struct usbhs_pkt *pkt) @@ -222,6 +211,7 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv, struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); struct device *dev = usbhsg_gpriv_to_dev(gpriv); struct usbhsg_uep *uep; + struct usbhs_pipe *pipe; int recip = ctrl->bRequestType & USB_RECIP_MASK; int nth = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; int ret; @@ -230,7 +220,8 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv, char *msg; uep = usbhsg_gpriv_to_nth_uep(gpriv, nth); - if (!usbhsg_uep_to_pipe(uep)) { + pipe = usbhsg_uep_to_pipe(uep); + if (!pipe) { dev_err(dev, "wrong recip request\n"); ret = -EINVAL; goto usbhsg_recip_run_handle_end; @@ -268,7 +259,7 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv, } usbhsg_recip_run_handle_end: - usbhsg_queue_start(uep); + usbhs_pkt_start(pipe); return ret; } @@ -470,7 +461,6 @@ static int usbhsg_ep_queue(struct usb_ep *ep, struct usb_request *req, return -ESHUTDOWN; usbhsg_queue_push(uep, ureq); - usbhsg_queue_start(uep); return 0; } -- cgit v0.10.2 From 0cb7e61d16ac68a2c5dd73a00e211287848d16e7 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:18:58 +0900 Subject: usb: renesas_usbhs: tidyup pio handler name This patch tidyup PIO packet handler name. This is a preparation for DMAEngine support Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 0efee5f..14baaad 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -289,7 +289,7 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, /* * PIO fifo functions */ -static int usbhsf_try_push(struct usbhs_pkt *pkt, int *is_done) +static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); @@ -384,9 +384,9 @@ usbhs_fifo_write_busy: return ret; } -struct usbhs_pkt_handle usbhs_fifo_push_handler = { - .prepare = usbhsf_try_push, - .try_run = usbhsf_try_push, +struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { + .prepare = usbhsf_pio_try_push, + .try_run = usbhsf_pio_try_push, }; static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) @@ -406,7 +406,7 @@ static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) return 0; } -static int usbhsf_try_pop(struct usbhs_pkt *pkt, int *is_done) +static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); @@ -485,9 +485,9 @@ usbhs_fifo_read_busy: return ret; } -struct usbhs_pkt_handle usbhs_fifo_pop_handler = { +struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { .prepare = usbhsf_prepare_pop, - .try_run = usbhsf_try_pop, + .try_run = usbhsf_pio_try_pop, }; /* diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 4292f8c..94db269 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -63,8 +63,8 @@ enum { USBHSF_PKT_TRY_RUN, }; -extern struct usbhs_pkt_handle usbhs_fifo_push_handler; -extern struct usbhs_pkt_handle usbhs_fifo_pop_handler; +extern struct usbhs_pkt_handle usbhs_fifo_pio_push_handler; +extern struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler; extern struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler; void usbhs_pkt_init(struct usbhs_pkt *pkt); diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 3c58248..89d2b16 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -309,10 +309,10 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv, switch (stage) { case READ_DATA_STAGE: - dcp->handler = &usbhs_fifo_push_handler; + dcp->handler = &usbhs_fifo_pio_push_handler; break; case WRITE_DATA_STAGE: - dcp->handler = &usbhs_fifo_pop_handler; + dcp->handler = &usbhs_fifo_pio_pop_handler; break; case NODATA_STATUS_STAGE: dcp->handler = &usbhs_ctrl_stage_end_handler; @@ -406,9 +406,9 @@ static int usbhsg_ep_enable(struct usb_ep *ep, pipe->mod_private = uep; if (usb_endpoint_dir_in(desc)) - uep->handler = &usbhs_fifo_push_handler; + uep->handler = &usbhs_fifo_pio_push_handler; else - uep->handler = &usbhs_fifo_pop_handler; + uep->handler = &usbhs_fifo_pio_pop_handler; ret = 0; } -- cgit v0.10.2 From e73a9891b3a1c9fc0970e0c9dbe2cc47933ad752 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 6 Jun 2011 14:19:03 +0900 Subject: usb: renesas_usbhs: add DMAEngine support USB DMA was installed on "normal DMAC" when SH7724 or older SuperH, but the "USB-DMAC" was prepared on recent SuperH. These 2 DMAC have a little bit different behavior. This patch add DMAEngine code for "normal DMAC", but it is still using PIO fifo. The DMA fifo will be formally supported in the future. You can enable DMA fifo by local fixup usbhs_fifo_pio_push_handler -> usbhs_fifo_dma_push_handler usbhs_fifo_pio_pop_handler -> usbhs_fifo_dma_pop_handler on usbhsg_ep_enable. This DMAEngine was tested by g_file_storage on SH7724 Ecovec board Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c index e510b29..665259a 100644 --- a/drivers/usb/renesas_usbhs/common.c +++ b/drivers/usb/renesas_usbhs/common.c @@ -304,6 +304,8 @@ static int __devinit usbhs_probe(struct platform_device *pdev) priv->dparam->pipe_type = usbhsc_default_pipe_type; priv->dparam->pipe_size = ARRAY_SIZE(usbhsc_default_pipe_type); } + if (!priv->dparam->pio_dma_border) + priv->dparam->pio_dma_border = 64; /* 64byte */ /* FIXME */ /* runtime power control ? */ diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h index 06d7239..b410463 100644 --- a/drivers/usb/renesas_usbhs/common.h +++ b/drivers/usb/renesas_usbhs/common.h @@ -36,6 +36,12 @@ struct usbhs_priv; #define CFIFO 0x0014 #define CFIFOSEL 0x0020 #define CFIFOCTR 0x0022 +#define D0FIFO 0x0100 +#define D0FIFOSEL 0x0028 +#define D0FIFOCTR 0x002A +#define D1FIFO 0x0120 +#define D1FIFOSEL 0x002C +#define D1FIFOCTR 0x002E #define INTENB0 0x0030 #define INTENB1 0x0032 #define BRDYENB 0x0036 @@ -60,6 +66,30 @@ struct usbhs_priv; #define PIPEMAXP 0x006C #define PIPEPERI 0x006E #define PIPEnCTR 0x0070 +#define PIPE1TRE 0x0090 +#define PIPE1TRN 0x0092 +#define PIPE2TRE 0x0094 +#define PIPE2TRN 0x0096 +#define PIPE3TRE 0x0098 +#define PIPE3TRN 0x009A +#define PIPE4TRE 0x009C +#define PIPE4TRN 0x009E +#define PIPE5TRE 0x00A0 +#define PIPE5TRN 0x00A2 +#define PIPEBTRE 0x00A4 +#define PIPEBTRN 0x00A6 +#define PIPECTRE 0x00A8 +#define PIPECTRN 0x00AA +#define PIPEDTRE 0x00AC +#define PIPEDTRN 0x00AE +#define PIPEETRE 0x00B0 +#define PIPEETRN 0x00B2 +#define PIPEFTRE 0x00B4 +#define PIPEFTRN 0x00B6 +#define PIPE9TRE 0x00B8 +#define PIPE9TRN 0x00BA +#define PIPEATRE 0x00BC +#define PIPEATRN 0x00BE /* SYSCFG */ #define SCKE (1 << 10) /* USB Module Clock Enable */ @@ -78,6 +108,7 @@ struct usbhs_priv; #define RHST_HIGH_SPEED 3 /* High-speed connection */ /* CFIFOSEL */ +#define DREQE (1 << 12) /* DMA Transfer Request Enable */ #define MBW_32 (0x2 << 10) /* CFIFO Port Access Bit Width */ /* CFIFOCTR */ @@ -164,6 +195,10 @@ struct usbhs_priv; #define CCPL (1 << 2) /* Control Transfer End Enable */ +/* PIPEnTRE */ +#define TRENB (1 << 9) /* Transaction Counter Enable */ +#define TRCLR (1 << 8) /* Transaction Counter Clear */ + /* FRMNUM */ #define FRNM_MASK (0x7FF) diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 14baaad..2016a24 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -20,6 +20,8 @@ #include "./pipe.h" #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) +#define usbhsf_get_d0fifo(p) (&((p)->fifo_info.d0fifo)) +#define usbhsf_get_d1fifo(p) (&((p)->fifo_info.d1fifo)) #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ @@ -43,6 +45,7 @@ static struct usbhs_pkt_handle usbhsf_null_handler = { void usbhs_pkt_init(struct usbhs_pkt *pkt) { + pkt->dma = DMA_ADDR_INVALID; INIT_LIST_HEAD(&pkt->node); } @@ -136,6 +139,9 @@ int __usbhs_pkt_handler(struct usbhs_pipe *pipe, int type) case USBHSF_PKT_TRY_RUN: func = pkt->handler->try_run; break; + case USBHSF_PKT_DMA_DONE: + func = pkt->handler->dma_done; + break; default: dev_err(dev, "unknown pkt hander\n"); goto __usbhs_pkt_handler_end; @@ -508,6 +514,330 @@ struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { }; /* + * DMA fifo functions + */ +static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, + struct usbhs_pkt *pkt) +{ + if (&usbhs_fifo_dma_push_handler == pkt->handler) + return fifo->tx_chan; + + if (&usbhs_fifo_dma_pop_handler == pkt->handler) + return fifo->rx_chan; + + return NULL; +} + +static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv, + struct usbhs_pkt *pkt) +{ + struct usbhs_fifo *fifo; + + /* DMA :: D0FIFO */ + fifo = usbhsf_get_d0fifo(priv); + if (usbhsf_dma_chan_get(fifo, pkt) && + !usbhsf_fifo_is_busy(fifo)) + return fifo; + + /* DMA :: D1FIFO */ + fifo = usbhsf_get_d1fifo(priv); + if (usbhsf_dma_chan_get(fifo, pkt) && + !usbhsf_fifo_is_busy(fifo)) + return fifo; + + return NULL; +} + +#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE) +#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0) +static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe, + struct usbhs_fifo *fifo, + u16 dreqe) +{ + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + + usbhs_bset(priv, fifo->sel, DREQE, dreqe); +} + +#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1) +#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0) +static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map) +{ + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); + + return info->dma_map_ctrl(pkt, map); +} + +static void usbhsf_dma_complete(void *arg); +static void usbhsf_dma_prepare_tasklet(unsigned long data) +{ + struct usbhs_pkt *pkt = (struct usbhs_pkt *)data; + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct scatterlist sg; + struct dma_async_tx_descriptor *desc; + struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); + struct device *dev = usbhs_priv_to_dev(priv); + enum dma_data_direction dir; + dma_cookie_t cookie; + + dir = usbhs_pipe_is_dir_in(pipe) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; + + sg_init_table(&sg, 1); + sg_set_page(&sg, virt_to_page(pkt->dma), + pkt->length, offset_in_page(pkt->dma)); + sg_dma_address(&sg) = pkt->dma + pkt->actual; + sg_dma_len(&sg) = pkt->trans; + + desc = chan->device->device_prep_slave_sg(chan, &sg, 1, dir, + DMA_PREP_INTERRUPT | + DMA_CTRL_ACK); + if (!desc) + return; + + desc->callback = usbhsf_dma_complete; + desc->callback_param = pipe; + + cookie = desc->tx_submit(desc); + if (cookie < 0) { + dev_err(dev, "Failed to submit dma descriptor\n"); + return; + } + + dev_dbg(dev, " %s %d (%d/ %d)\n", + fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero); + + usbhsf_dma_start(pipe, fifo); + dma_async_issue_pending(chan); +} + +static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) +{ + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_fifo *fifo; + int len = pkt->length - pkt->actual; + int ret; + + if (usbhs_pipe_is_busy(pipe)) + return 0; + + /* use PIO if packet is less than pio_dma_border or pipe is DCP */ + if ((len < usbhs_get_dparam(priv, pio_dma_border)) || + usbhs_pipe_is_dcp(pipe)) + goto usbhsf_pio_prepare_push; + + if (len % 4) /* 32bit alignment */ + goto usbhsf_pio_prepare_push; + + /* get enable DMA fifo */ + fifo = usbhsf_get_dma_fifo(priv, pkt); + if (!fifo) + goto usbhsf_pio_prepare_push; + + if (usbhsf_dma_map(pkt) < 0) + goto usbhsf_pio_prepare_push; + + ret = usbhsf_fifo_select(pipe, fifo, 0); + if (ret < 0) + goto usbhsf_pio_prepare_push_unmap; + + pkt->trans = len; + + tasklet_init(&fifo->tasklet, + usbhsf_dma_prepare_tasklet, + (unsigned long)pkt); + + tasklet_schedule(&fifo->tasklet); + + return 0; + +usbhsf_pio_prepare_push_unmap: + usbhsf_dma_unmap(pkt); +usbhsf_pio_prepare_push: + /* + * change handler to PIO + */ + pkt->handler = &usbhs_fifo_pio_push_handler; + + return pkt->handler->prepare(pkt, is_done); +} + +static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done) +{ + struct usbhs_pipe *pipe = pkt->pipe; + + pkt->actual = pkt->trans; + + *is_done = !pkt->zero; /* send zero packet ? */ + + usbhsf_dma_stop(pipe, pipe->fifo); + usbhsf_dma_unmap(pkt); + usbhsf_fifo_unselect(pipe, pipe->fifo); + + return 0; +} + +struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { + .prepare = usbhsf_dma_prepare_push, + .dma_done = usbhsf_dma_push_done, +}; + +static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) +{ + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct usbhs_fifo *fifo; + int len, ret; + + if (usbhs_pipe_is_busy(pipe)) + return 0; + + if (usbhs_pipe_is_dcp(pipe)) + goto usbhsf_pio_prepare_pop; + + /* get enable DMA fifo */ + fifo = usbhsf_get_dma_fifo(priv, pkt); + if (!fifo) + goto usbhsf_pio_prepare_pop; + + ret = usbhsf_fifo_select(pipe, fifo, 0); + if (ret < 0) + goto usbhsf_pio_prepare_pop; + + /* use PIO if packet is less than pio_dma_border */ + len = usbhsf_fifo_rcv_len(priv, fifo); + len = min(pkt->length - pkt->actual, len); + if (len % 4) /* 32bit alignment */ + goto usbhsf_pio_prepare_pop_unselect; + + if (len < usbhs_get_dparam(priv, pio_dma_border)) + goto usbhsf_pio_prepare_pop_unselect; + + ret = usbhsf_fifo_barrier(priv, fifo); + if (ret < 0) + goto usbhsf_pio_prepare_pop_unselect; + + if (usbhsf_dma_map(pkt) < 0) + goto usbhsf_pio_prepare_pop_unselect; + + /* DMA */ + + /* + * usbhs_fifo_dma_pop_handler :: prepare + * enabled irq to come here. + * but it is no longer needed for DMA. disable it. + */ + usbhsf_rx_irq_ctrl(pipe, 0); + + pkt->trans = len; + + tasklet_init(&fifo->tasklet, + usbhsf_dma_prepare_tasklet, + (unsigned long)pkt); + + tasklet_schedule(&fifo->tasklet); + + return 0; + +usbhsf_pio_prepare_pop_unselect: + usbhsf_fifo_unselect(pipe, fifo); +usbhsf_pio_prepare_pop: + + /* + * change handler to PIO + */ + pkt->handler = &usbhs_fifo_pio_pop_handler; + + return pkt->handler->try_run(pkt, is_done); +} + +static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done) +{ + struct usbhs_pipe *pipe = pkt->pipe; + int maxp = usbhs_pipe_get_maxpacket(pipe); + + usbhsf_dma_stop(pipe, pipe->fifo); + usbhsf_dma_unmap(pkt); + usbhsf_fifo_unselect(pipe, pipe->fifo); + + pkt->actual += pkt->trans; + + if ((pkt->actual == pkt->length) || /* receive all data */ + (pkt->trans < maxp)) { /* short packet */ + *is_done = 1; + } else { + /* re-enable */ + usbhsf_prepare_pop(pkt, is_done); + } + + return 0; +} + +struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { + .prepare = usbhsf_prepare_pop, + .try_run = usbhsf_dma_try_pop, + .dma_done = usbhsf_dma_pop_done +}; + +/* + * DMA setting + */ +static bool usbhsf_dma_filter(struct dma_chan *chan, void *param) +{ + struct sh_dmae_slave *slave = param; + + /* + * FIXME + * + * usbhs doesn't recognize id = 0 as valid DMA + */ + if (0 == slave->slave_id) + return false; + + chan->private = slave; + + return true; +} + +static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo) +{ + if (fifo->tx_chan) + dma_release_channel(fifo->tx_chan); + if (fifo->rx_chan) + dma_release_channel(fifo->rx_chan); + + fifo->tx_chan = NULL; + fifo->rx_chan = NULL; +} + +static void usbhsf_dma_init(struct usbhs_priv *priv, + struct usbhs_fifo *fifo) +{ + struct device *dev = usbhs_priv_to_dev(priv); + dma_cap_mask_t mask; + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter, + &fifo->tx_slave); + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter, + &fifo->rx_slave); + + if (fifo->tx_chan || fifo->rx_chan) + dev_info(dev, "enable DMAEngine (%s%s%s)\n", + fifo->name, + fifo->tx_chan ? "[TX]" : " ", + fifo->rx_chan ? "[RX]" : " "); +} + +/* * irq functions */ static int usbhsf_irq_empty(struct usbhs_priv *priv, @@ -570,6 +900,19 @@ static int usbhsf_irq_ready(struct usbhs_priv *priv, return 0; } +static void usbhsf_dma_complete(void *arg) +{ + struct usbhs_pipe *pipe = arg; + struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); + struct device *dev = usbhs_priv_to_dev(priv); + int ret; + + ret = usbhs_pkt_dmadone(pipe); + if (ret < 0) + dev_err(dev, "dma_complete run_error %d : %d\n", + usbhs_pipe_number(pipe), ret); +} + /* * fifo init */ @@ -577,6 +920,8 @@ void usbhs_fifo_init(struct usbhs_priv *priv) { struct usbhs_mod *mod = usbhs_mod_get_current(priv); struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); + struct usbhs_fifo *d0fifo = usbhsf_get_d0fifo(priv); + struct usbhs_fifo *d1fifo = usbhsf_get_d1fifo(priv); mod->irq_empty = usbhsf_irq_empty; mod->irq_ready = usbhsf_irq_ready; @@ -584,6 +929,19 @@ void usbhs_fifo_init(struct usbhs_priv *priv) mod->irq_brdysts = 0; cfifo->pipe = NULL; + cfifo->tx_chan = NULL; + cfifo->rx_chan = NULL; + + d0fifo->pipe = NULL; + d0fifo->tx_chan = NULL; + d0fifo->rx_chan = NULL; + + d1fifo->pipe = NULL; + d1fifo->tx_chan = NULL; + d1fifo->rx_chan = NULL; + + usbhsf_dma_init(priv, usbhsf_get_d0fifo(priv)); + usbhsf_dma_init(priv, usbhsf_get_d1fifo(priv)); } void usbhs_fifo_quit(struct usbhs_priv *priv) @@ -594,6 +952,9 @@ void usbhs_fifo_quit(struct usbhs_priv *priv) mod->irq_ready = NULL; mod->irq_bempsts = 0; mod->irq_brdysts = 0; + + usbhsf_dma_quit(priv, usbhsf_get_d0fifo(priv)); + usbhsf_dma_quit(priv, usbhsf_get_d1fifo(priv)); } int usbhs_fifo_probe(struct usbhs_priv *priv) @@ -602,10 +963,29 @@ int usbhs_fifo_probe(struct usbhs_priv *priv) /* CFIFO */ fifo = usbhsf_get_cfifo(priv); + fifo->name = "CFIFO"; fifo->port = CFIFO; fifo->sel = CFIFOSEL; fifo->ctr = CFIFOCTR; + /* D0FIFO */ + fifo = usbhsf_get_d0fifo(priv); + fifo->name = "D0FIFO"; + fifo->port = D0FIFO; + fifo->sel = D0FIFOSEL; + fifo->ctr = D0FIFOCTR; + fifo->tx_slave.slave_id = usbhs_get_dparam(priv, d0_tx_id); + fifo->rx_slave.slave_id = usbhs_get_dparam(priv, d0_rx_id); + + /* D1FIFO */ + fifo = usbhsf_get_d1fifo(priv); + fifo->name = "D1FIFO"; + fifo->port = D1FIFO; + fifo->sel = D1FIFOSEL; + fifo->ctr = D1FIFOCTR; + fifo->tx_slave.slave_id = usbhs_get_dparam(priv, d1_tx_id); + fifo->rx_slave.slave_id = usbhs_get_dparam(priv, d1_rx_id); + return 0; } diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h index 94db269..ed6d8e5 100644 --- a/drivers/usb/renesas_usbhs/fifo.h +++ b/drivers/usb/renesas_usbhs/fifo.h @@ -17,18 +17,33 @@ #ifndef RENESAS_USB_FIFO_H #define RENESAS_USB_FIFO_H +#include +#include +#include #include "pipe.h" +#define DMA_ADDR_INVALID (~(dma_addr_t)0) + struct usbhs_fifo { + char *name; u32 port; /* xFIFO */ u32 sel; /* xFIFOSEL */ u32 ctr; /* xFIFOCTR */ struct usbhs_pipe *pipe; + struct tasklet_struct tasklet; + + struct dma_chan *tx_chan; + struct dma_chan *rx_chan; + + struct sh_dmae_slave tx_slave; + struct sh_dmae_slave rx_slave; }; struct usbhs_fifo_info { struct usbhs_fifo cfifo; + struct usbhs_fifo d0fifo; + struct usbhs_fifo d1fifo; }; struct usbhs_pkt_handle; @@ -36,8 +51,10 @@ struct usbhs_pkt { struct list_head node; struct usbhs_pipe *pipe; struct usbhs_pkt_handle *handler; + dma_addr_t dma; void *buf; int length; + int trans; int actual; int zero; }; @@ -45,6 +62,7 @@ struct usbhs_pkt { struct usbhs_pkt_handle { int (*prepare)(struct usbhs_pkt *pkt, int *is_done); int (*try_run)(struct usbhs_pkt *pkt, int *is_done); + int (*dma_done)(struct usbhs_pkt *pkt, int *is_done); }; /* @@ -61,12 +79,17 @@ void usbhs_fifo_quit(struct usbhs_priv *priv); enum { USBHSF_PKT_PREPARE, USBHSF_PKT_TRY_RUN, + USBHSF_PKT_DMA_DONE, }; extern struct usbhs_pkt_handle usbhs_fifo_pio_push_handler; extern struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler; extern struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler; +extern struct usbhs_pkt_handle usbhs_fifo_dma_push_handler; +extern struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler; + + void usbhs_pkt_init(struct usbhs_pkt *pkt); void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, struct usbhs_pkt_handle *handler, @@ -76,5 +99,6 @@ int __usbhs_pkt_handler(struct usbhs_pipe *pipe, int type); #define usbhs_pkt_start(p) __usbhs_pkt_handler(p, USBHSF_PKT_PREPARE) #define usbhs_pkt_run(p) __usbhs_pkt_handler(p, USBHSF_PKT_TRY_RUN) +#define usbhs_pkt_dmadone(p) __usbhs_pkt_handler(p, USBHSF_PKT_DMA_DONE) #endif /* RENESAS_USB_FIFO_H */ diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 89d2b16..31d28dc 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -160,6 +160,71 @@ static void usbhsg_queue_done(struct usbhs_pkt *pkt) usbhsg_queue_pop(uep, ureq, 0); } +static int usbhsg_dma_map(struct device *dev, + struct usbhs_pkt *pkt, + enum dma_data_direction dir) +{ + struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); + struct usb_request *req = &ureq->req; + + if (pkt->dma != DMA_ADDR_INVALID) { + dev_err(dev, "dma is already mapped\n"); + return -EIO; + } + + if (req->dma == DMA_ADDR_INVALID) { + pkt->dma = dma_map_single(dev, pkt->buf, pkt->length, dir); + } else { + dma_sync_single_for_device(dev, req->dma, req->length, dir); + pkt->dma = req->dma; + } + + if (dma_mapping_error(dev, pkt->dma)) { + dev_err(dev, "dma mapping error %x\n", pkt->dma); + return -EIO; + } + + return 0; +} + +static int usbhsg_dma_unmap(struct device *dev, + struct usbhs_pkt *pkt, + enum dma_data_direction dir) +{ + struct usbhsg_request *ureq = usbhsg_pkt_to_ureq(pkt); + struct usb_request *req = &ureq->req; + + if (pkt->dma == DMA_ADDR_INVALID) { + dev_err(dev, "dma is not mapped\n"); + return -EIO; + } + + if (req->dma == DMA_ADDR_INVALID) + dma_unmap_single(dev, pkt->dma, pkt->length, dir); + else + dma_sync_single_for_cpu(dev, req->dma, req->length, dir); + + pkt->dma = DMA_ADDR_INVALID; + + return 0; +} + +static int usbhsg_dma_map_ctrl(struct usbhs_pkt *pkt, int map) +{ + struct usbhs_pipe *pipe = pkt->pipe; + struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe); + struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep); + struct device *dev = usbhsg_gpriv_to_dev(gpriv); + enum dma_data_direction dir; + + dir = usbhs_pipe_is_dir_in(pipe) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; + + if (map) + return usbhsg_dma_map(dev, pkt, dir); + else + return usbhsg_dma_unmap(dev, pkt, dir); +} + /* * USB_TYPE_STANDARD / clear feature functions */ @@ -434,6 +499,8 @@ static struct usb_request *usbhsg_ep_alloc_request(struct usb_ep *ep, usbhs_pkt_init(usbhsg_ureq_to_pkt(ureq)); + ureq->req.dma = DMA_ADDR_INVALID; + return &ureq->req; } @@ -569,7 +636,8 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status) * pipe initialize and enable DCP */ usbhs_pipe_init(priv, - usbhsg_queue_done); + usbhsg_queue_done, + usbhsg_dma_map_ctrl); usbhs_fifo_init(priv); usbhsg_uep_init(gpriv); diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index c050587..d0ae846 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -532,7 +532,8 @@ static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type) } void usbhs_pipe_init(struct usbhs_priv *priv, - void (*done)(struct usbhs_pkt *pkt)) + void (*done)(struct usbhs_pkt *pkt), + int (*dma_map_ctrl)(struct usbhs_pkt *pkt, int map)) { struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); struct device *dev = usbhs_priv_to_dev(priv); @@ -572,6 +573,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, } info->done = done; + info->dma_map_ctrl = dma_map_ctrl; } struct usbhs_pipe *usbhs_pipe_malloc(struct usbhs_priv *priv, diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 484adbe..35e1004 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -44,6 +44,7 @@ struct usbhs_pipe_info { int bufnmb_last; /* FIXME : driver needs good allocator */ void (*done)(struct usbhs_pkt *pkt); + int (*dma_map_ctrl)(struct usbhs_pkt *pkt, int map); }; /* @@ -82,7 +83,8 @@ void usbhs_pipe_remove(struct usbhs_priv *priv); int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe); int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe); void usbhs_pipe_init(struct usbhs_priv *priv, - void (*done)(struct usbhs_pkt *pkt)); + void (*done)(struct usbhs_pkt *pkt), + int (*dma_map_ctrl)(struct usbhs_pkt *pkt, int map)); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h index 3a7f1d9..8977431 100644 --- a/include/linux/usb/renesas_usbhs.h +++ b/include/linux/usb/renesas_usbhs.h @@ -110,6 +110,23 @@ struct renesas_usbhs_driver_param { * delay time from notify_hotplug callback */ int detection_delay; + + /* + * option: + * + * dma id for dmaengine + */ + int d0_tx_id; + int d0_rx_id; + int d1_tx_id; + int d1_rx_id; + + /* + * option: + * + * pio <--> dma border. + */ + int pio_dma_border; /* default is 64byte */ }; /* -- cgit v0.10.2 From 7808edcd306f22aeb23775d34e70b7fa2f58b852 Mon Sep 17 00:00:00 2001 From: Nicos Gollan Date: Thu, 5 May 2011 21:00:37 +0200 Subject: Basic support for Moschip 9900 family I/O chips Add I/O based support for serial and parallel ports of the following chips: Vendor: Moschip (0x9710) Parts (device IDs) * 9900 (0x9900) * 9904 (0x9904 * 9901 (0x9912, also sold as 9912) * 9922 (0x9922) On all chips but the 9900, a single port is provided per PCI subdevice (subvendor-ID 0xA000, subdevice-IDs 0x1000 for serial, 0x2000 for parallel with proper class codes). In cascading configurations, the 9900 provides two devices per subdevice, with subvendor-ID 0xA000 and subdevice-IDs 0x30ps where p is the number of parallel ports and s the number of serial ports. Basic testing was only done on the serial part of a 9912 to the point where it can be used for a serial kernel console, and advanced features are completely untested. It is possible to reduce functionality of the chips by adding a configuration EEPROM, and the datasheet [1] is inconsistent w.r.t subdevices in the 4s+2s1p and 2s1p+4s configurations. The subdevice-ID 0x3012 should likely read 0x3011 with a serial port in function 3, which would be consistent with the BAR layouts. For now, the drivers ignore subdevices with ID 0x1000 and no class code. The parallel ports are integrated in parport_serial even for purely parallel parts to reduce the footprint of the patch. [1] http://www.moschip.com/data/products/MCS9900/MCS9900_Datasheet.pdf Signed-off-by: Nicos Gollan Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/parport/parport_serial.c b/drivers/parport/parport_serial.c index f01e264..342a3de 100644 --- a/drivers/parport/parport_serial.c +++ b/drivers/parport/parport_serial.c @@ -33,6 +33,9 @@ enum parport_pc_pci_cards { netmos_9xx5_combo, netmos_9855, netmos_9855_2p, + netmos_9900, + netmos_9900_2p, + netmos_99xx_1p, avlab_1s1p, avlab_1s2p, avlab_2s1p, @@ -72,22 +75,20 @@ static int __devinit netmos_parallel_init(struct pci_dev *dev, struct parport_pc dev->subsystem_vendor == PCI_VENDOR_ID_IBM && dev->subsystem_device == 0x0299) return -ENODEV; - /* - * Netmos uses the subdevice ID to indicate the number of parallel - * and serial ports. The form is 0x00PS, where

is the number of - * parallel ports and is the number of serial ports. - */ - par->numports = (dev->subsystem_device & 0xf0) >> 4; - if (par->numports > ARRAY_SIZE(par->addr)) - par->numports = ARRAY_SIZE(par->addr); - /* - * This function is currently only called for cards with up to - * one parallel port. - * Parallel port BAR is either before or after serial ports BARS; - * hence, lo should be either 0 or equal to the number of serial ports. - */ - if (par->addr[0].lo != 0) - par->addr[0].lo = dev->subsystem_device & 0xf; + + if (dev->device == PCI_DEVICE_ID_NETMOS_9912) { + par->numports = 1; + } else { + /* + * Netmos uses the subdevice ID to indicate the number of parallel + * and serial ports. The form is 0x00PS, where

is the number of + * parallel ports and is the number of serial ports. + */ + par->numports = (dev->subsystem_device & 0xf0) >> 4; + if (par->numports > ARRAY_SIZE(par->addr)) + par->numports = ARRAY_SIZE(par->addr); + } + return 0; } @@ -97,6 +98,9 @@ static struct parport_pc_pci cards[] __devinitdata = { /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init }, /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init }, /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } }, + /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init }, + /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } }, + /* netmos_99xx_1p */ {1, { { 0, 1 }, } }, /* avlab_1s1p */ { 1, { { 1, 2}, } }, /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} }, /* avlab_2s1p */ { 1, { { 2, 3}, } }, @@ -127,6 +131,14 @@ static struct pci_device_id parport_serial_pci_tbl[] = { 0x1000, 0x0022, 0, 0, netmos_9855_2p }, { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, + 0xA000, 0x3011, 0, 0, netmos_9900 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, + 0xA000, 0x3012, 0, 0, netmos_9900 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, + 0xA000, 0x3020, 0, 0, netmos_9900_2p }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912, + 0xA000, 0x2000, 0, 0, netmos_99xx_1p }, /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ { PCI_VENDOR_ID_AFAVLAB, 0x2110, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, @@ -219,6 +231,24 @@ static struct pciserial_board pci_parport_serial_boards[] __devinitdata = { .base_baud = 115200, .uart_offset = 8, }, + [netmos_9900] = { /* n/t */ + .flags = FL_BASE0 | FL_BASE_BARS, + .num_ports = 1, + .base_baud = 115200, + .uart_offset = 8, + }, + [netmos_9900_2p] = { /* parallel only */ /* n/t */ + .flags = FL_BASE0, + .num_ports = 0, + .base_baud = 115200, + .uart_offset = 8, + }, + [netmos_99xx_1p] = { /* parallel only */ /* n/t */ + .flags = FL_BASE0, + .num_ports = 0, + .base_baud = 115200, + .uart_offset = 8, + }, [avlab_1s1p] = { /* n/t */ .flags = FL_BASE0 | FL_BASE_BARS, .num_ports = 1, @@ -285,6 +315,10 @@ static int __devinit serial_register (struct pci_dev *dev, struct serial_private *serial; board = &pci_parport_serial_boards[id->driver_data]; + + if (board->num_ports == 0) + return 0; + serial = pciserial_init_ports(dev, board); if (IS_ERR(serial)) diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c index 4b4968a..0b255ce 100644 --- a/drivers/tty/serial/8250_pci.c +++ b/drivers/tty/serial/8250_pci.c @@ -56,6 +56,9 @@ struct serial_private { int line[0]; }; +static int pci_default_setup(struct serial_private*, + const struct pciserial_board*, struct uart_port*, int); + static void moan_device(const char *str, struct pci_dev *dev) { printk(KERN_WARNING @@ -752,6 +755,62 @@ pci_ni8430_setup(struct serial_private *priv, return setup_port(priv, port, bar, offset, board->reg_shift); } +static int pci_netmos_9900_setup(struct serial_private *priv, + const struct pciserial_board *board, + struct uart_port *port, int idx) +{ + unsigned int bar; + + if ((priv->dev->subsystem_device & 0xff00) == 0x3000) { + /* netmos apparently orders BARs by datasheet layout, so serial + * ports get BARs 0 and 3 (or 1 and 4 for memmapped) + */ + bar = 3 * idx; + + return setup_port(priv, port, bar, 0, board->reg_shift); + } else { + return pci_default_setup(priv, board, port, idx); + } +} + +/* the 99xx series comes with a range of device IDs and a variety + * of capabilities: + * + * 9900 has varying capabilities and can cascade to sub-controllers + * (cascading should be purely internal) + * 9904 is hardwired with 4 serial ports + * 9912 and 9922 are hardwired with 2 serial ports + */ +static int pci_netmos_9900_numports(struct pci_dev *dev) +{ + unsigned int c = dev->class; + unsigned int pi; + unsigned short sub_serports; + + pi = (c & 0xff); + + if (pi == 2) { + return 1; + } else if ((pi == 0) && + (dev->device == PCI_DEVICE_ID_NETMOS_9900)) { + /* two possibilities: 0x30ps encodes number of parallel and + * serial ports, or 0x1000 indicates *something*. This is not + * immediately obvious, since the 2s1p+4s configuration seems + * to offer all functionality on functions 0..2, while still + * advertising the same function 3 as the 4s+2s1p config. + */ + sub_serports = dev->subsystem_device & 0xf; + if (sub_serports > 0) { + return sub_serports; + } else { + printk(KERN_NOTICE "NetMos/Mostech serial driver ignoring port on ambiguous config.\n"); + return 0; + } + } + + moan_device("unknown NetMos/Mostech program interface", dev); + return 0; +} static int pci_netmos_init(struct pci_dev *dev) { @@ -761,12 +820,28 @@ static int pci_netmos_init(struct pci_dev *dev) if ((dev->device == PCI_DEVICE_ID_NETMOS_9901) || (dev->device == PCI_DEVICE_ID_NETMOS_9865)) return 0; + if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM && dev->subsystem_device == 0x0299) return 0; + switch (dev->device) { /* FALLTHROUGH on all */ + case PCI_DEVICE_ID_NETMOS_9904: + case PCI_DEVICE_ID_NETMOS_9912: + case PCI_DEVICE_ID_NETMOS_9922: + case PCI_DEVICE_ID_NETMOS_9900: + num_serial = pci_netmos_9900_numports(dev); + break; + + default: + if (num_serial == 0 ) { + moan_device("unknown NetMos/Mostech device", dev); + } + } + if (num_serial == 0) return -ENODEV; + return num_serial; } @@ -1417,7 +1492,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, .init = pci_netmos_init, - .setup = pci_default_setup, + .setup = pci_netmos_9900_setup, }, /* * For Oxford Semiconductor Tornado based devices @@ -1644,6 +1719,7 @@ enum pci_board_num_t { pbn_ADDIDATA_PCIe_8_3906250, pbn_ce4100_1_115200, pbn_omegapci, + pbn_NETMOS9900_2s_115200, }; /* @@ -2345,6 +2421,11 @@ static struct pciserial_board pci_boards[] __devinitdata = { .base_baud = 115200, .uart_offset = 0x200, }, + [pbn_NETMOS9900_2s_115200] = { + .flags = FL_BASE0, + .num_ports = 2, + .base_baud = 115200, + }, }; static const struct pci_device_id softmodem_blacklist[] = { @@ -3826,6 +3907,27 @@ static struct pci_device_id serial_pci_tbl[] = { 0xA000, 0x1000, 0, 0, pbn_b0_1_115200 }, + /* the 9901 is a rebranded 9912 */ + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912, + 0xA000, 0x1000, + 0, 0, pbn_b0_1_115200 }, + + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9922, + 0xA000, 0x1000, + 0, 0, pbn_b0_1_115200 }, + + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9904, + 0xA000, 0x1000, + 0, 0, pbn_b0_1_115200 }, + + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, + 0xA000, 0x1000, + 0, 0, pbn_b0_1_115200 }, + + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, + 0xA000, 0x3002, + 0, 0, pbn_NETMOS9900_2s_115200 }, + /* * Best Connectivity PCI Multi I/O cards */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index a311008..034ebb4 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2821,7 +2821,11 @@ #define PCI_DEVICE_ID_NETMOS_9845 0x9845 #define PCI_DEVICE_ID_NETMOS_9855 0x9855 #define PCI_DEVICE_ID_NETMOS_9865 0x9865 +#define PCI_DEVICE_ID_NETMOS_9900 0x9900 #define PCI_DEVICE_ID_NETMOS_9901 0x9901 +#define PCI_DEVICE_ID_NETMOS_9904 0x9904 +#define PCI_DEVICE_ID_NETMOS_9912 0x9912 +#define PCI_DEVICE_ID_NETMOS_9922 0x9922 #define PCI_VENDOR_ID_3COM_2 0xa727 -- cgit v0.10.2 From 5bf8f501e05930364b345ed8710c5b1a13207134 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Bri=C3=A8re?= Date: Sun, 29 May 2011 15:08:03 -0400 Subject: serial: 8250_pci: add .probe member to struct pci_serial_quirk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function, if present, is called early on by the 8250_pci probe; it can be used to reject devices meant for parport_serial. (The .init function cannot be used for this purpose, as it is also called by parport_serial.) Signed-off-by: Frédéric Brière Acked-by: Alan Cox Cc: linux-serial@vger.kernel.org Cc: linux-parport@lists.infradead.org Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c index 0b255ce..9b119fe 100644 --- a/drivers/tty/serial/8250_pci.c +++ b/drivers/tty/serial/8250_pci.c @@ -39,6 +39,7 @@ struct pci_serial_quirk { u32 device; u32 subvendor; u32 subdevice; + int (*probe)(struct pci_dev *dev); int (*init)(struct pci_dev *dev); int (*setup)(struct serial_private *, const struct pciserial_board *, @@ -2662,11 +2663,19 @@ EXPORT_SYMBOL_GPL(pciserial_resume_ports); static int __devinit pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) { + struct pci_serial_quirk *quirk; struct serial_private *priv; const struct pciserial_board *board; struct pciserial_board tmp; int rc; + quirk = find_quirk(dev); + if (quirk->probe) { + rc = quirk->probe(dev); + if (rc) + return rc; + } + if (ent->driver_data >= ARRAY_SIZE(pci_boards)) { printk(KERN_ERR "pci_init_one: invalid driver_data: %ld\n", ent->driver_data); -- cgit v0.10.2 From b9b24558f7d36c550b5cf0b550a8926f8c03cdbd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Bri=C3=A8re?= Date: Sun, 29 May 2011 15:08:04 -0400 Subject: parport/serial: add support for Timedia/SUNIX cards to parport_serial MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Timedia/SUNIX PCI cards with both serial and parallel ports are currently supported by 8250_pci and parport_pc individually. Moving that support into parport_serial allows using both types of ports at the same time. This was successfully tested with a SUNIX 4079T. Signed-off-by: Frédéric Brière Acked-by: Alan Cox Cc: linux-serial@vger.kernel.org Cc: linux-parport@lists.infradead.org Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c index f330338..d1cdb94 100644 --- a/drivers/parport/parport_pc.c +++ b/drivers/parport/parport_pc.c @@ -2864,24 +2864,6 @@ enum parport_pc_pci_cards { lava_parallel_dual_b, boca_ioppar, plx_9050, - timedia_4078a, - timedia_4079h, - timedia_4085h, - timedia_4088a, - timedia_4089a, - timedia_4095a, - timedia_4096a, - timedia_4078u, - timedia_4079a, - timedia_4085u, - timedia_4079r, - timedia_4079s, - timedia_4079d, - timedia_4079e, - timedia_4079f, - timedia_9079a, - timedia_9079b, - timedia_9079c, timedia_4006a, timedia_4014, timedia_4008a, @@ -2940,24 +2922,6 @@ static struct parport_pc_pci { /* lava_parallel_dual_b */ { 1, { { 0, -1 }, } }, /* boca_ioppar */ { 1, { { 0, -1 }, } }, /* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } }, - /* timedia_4078a */ { 1, { { 2, -1 }, } }, - /* timedia_4079h */ { 1, { { 2, 3 }, } }, - /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, - /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, - /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, - /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, - /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, - /* timedia_4078u */ { 1, { { 2, -1 }, } }, - /* timedia_4079a */ { 1, { { 2, 3 }, } }, - /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, - /* timedia_4079r */ { 1, { { 2, 3 }, } }, - /* timedia_4079s */ { 1, { { 2, 3 }, } }, - /* timedia_4079d */ { 1, { { 2, 3 }, } }, - /* timedia_4079e */ { 1, { { 2, 3 }, } }, - /* timedia_4079f */ { 1, { { 2, 3 }, } }, - /* timedia_9079a */ { 1, { { 2, 3 }, } }, - /* timedia_9079b */ { 1, { { 2, 3 }, } }, - /* timedia_9079c */ { 1, { { 2, 3 }, } }, /* timedia_4006a */ { 1, { { 0, -1 }, } }, /* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } }, /* timedia_4008a */ { 1, { { 0, 1 }, } }, @@ -3019,24 +2983,6 @@ static const struct pci_device_id parport_pc_pci_tbl[] = { { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0, 0, plx_9050 }, /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ - { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, - { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, - { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, - { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, - { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, - { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, - { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, - { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, - { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, - { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, - { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, - { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, - { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, - { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, - { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, - { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, - { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, - { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, { 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a }, { 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 }, { 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a }, diff --git a/drivers/parport/parport_serial.c b/drivers/parport/parport_serial.c index 342a3de..e9c3227 100644 --- a/drivers/parport/parport_serial.c +++ b/drivers/parport/parport_serial.c @@ -44,6 +44,24 @@ enum parport_pc_pci_cards { siig_2p1s_20x, siig_1s1p_20x, siig_2s1p_20x, + timedia_4078a, + timedia_4079h, + timedia_4085h, + timedia_4088a, + timedia_4089a, + timedia_4095a, + timedia_4096a, + timedia_4078u, + timedia_4079a, + timedia_4085u, + timedia_4079r, + timedia_4079s, + timedia_4079d, + timedia_4079e, + timedia_4079f, + timedia_9079a, + timedia_9079b, + timedia_9079c, }; /* each element directly indexed from enum list, above */ @@ -109,6 +127,24 @@ static struct parport_pc_pci cards[] __devinitdata = { /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } }, /* siig_1s1p_20x */ { 1, { { 1, 2 }, } }, /* siig_2s1p_20x */ { 1, { { 2, 3 }, } }, + /* timedia_4078a */ { 1, { { 2, -1 }, } }, + /* timedia_4079h */ { 1, { { 2, 3 }, } }, + /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, + /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, + /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, + /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, + /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, + /* timedia_4078u */ { 1, { { 2, -1 }, } }, + /* timedia_4079a */ { 1, { { 2, 3 }, } }, + /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, + /* timedia_4079r */ { 1, { { 2, 3 }, } }, + /* timedia_4079s */ { 1, { { 2, 3 }, } }, + /* timedia_4079d */ { 1, { { 2, 3 }, } }, + /* timedia_4079e */ { 1, { { 2, 3 }, } }, + /* timedia_4079f */ { 1, { { 2, 3 }, } }, + /* timedia_9079a */ { 1, { { 2, 3 }, } }, + /* timedia_9079b */ { 1, { { 2, 3 }, } }, + /* timedia_9079c */ { 1, { { 2, 3 }, } }, }; static struct pci_device_id parport_serial_pci_tbl[] = { @@ -188,6 +224,25 @@ static struct pci_device_id parport_serial_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, + /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ + { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, + { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, + { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, + { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, + { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, + { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, + { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, + { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, + { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, + { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, + { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, + { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, + { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, + { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, + { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, + { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, + { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, + { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, { 0, } /* terminate list */ }; @@ -297,6 +352,114 @@ static struct pciserial_board pci_parport_serial_boards[] __devinitdata = { .base_baud = 921600, .uart_offset = 8, }, + [timedia_4078a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079h] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4085h] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4088a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4089a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4095a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4096a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4078u] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4085u] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079r] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079s] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079d] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079e] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_4079f] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_9079a] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_9079b] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, + [timedia_9079c] = { + .flags = FL_BASE0|FL_BASE_BARS, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 8, + }, }; struct parport_serial_private { diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c index 9b119fe..e1d4668 100644 --- a/drivers/tty/serial/8250_pci.c +++ b/drivers/tty/serial/8250_pci.c @@ -575,6 +575,28 @@ static const struct timedia_struct { { 8, timedia_eight_port } }; +/* + * There are nearly 70 different Timedia/SUNIX PCI serial devices. Instead of + * listing them individually, this driver merely grabs them all with + * PCI_ANY_ID. Some of these devices, however, also feature a parallel port, + * and should be left free to be claimed by parport_serial instead. + */ +static int pci_timedia_probe(struct pci_dev *dev) +{ + /* + * Check the third digit of the subdevice ID + * (0,2,3,5,6: serial only -- 7,8,9: serial + parallel) + */ + if ((dev->subsystem_device & 0x00f0) >= 0x70) { + dev_info(&dev->dev, + "ignoring Timedia subdevice %04x for parport_serial\n", + dev->subsystem_device); + return -ENODEV; + } + + return 0; +} + static int pci_timedia_init(struct pci_dev *dev) { const unsigned short *ids; @@ -1463,6 +1485,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .device = PCI_DEVICE_ID_TIMEDIA_1889, .subvendor = PCI_VENDOR_ID_TIMEDIA, .subdevice = PCI_ANY_ID, + .probe = pci_timedia_probe, .init = pci_timedia_init, .setup = pci_timedia_setup, }, -- cgit v0.10.2 From 0e2adc06843a9b5a28af4ca5f796240297907897 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 26 May 2011 10:41:17 +0200 Subject: serial/pch: use global div helper instead of creating a private one MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Acked-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index f2cb750..ae28250 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -14,6 +14,7 @@ *along with this program; if not, write to the Free Software *Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. */ +#include #include #include #include @@ -137,8 +138,6 @@ enum { #define PCH_UART_DLL 0x00 #define PCH_UART_DLM 0x01 -#define DIV_ROUND(a, b) (((a) + ((b)/2)) / (b)) - #define PCH_UART_IID_RLS (PCH_UART_IIR_REI) #define PCH_UART_IID_RDR (PCH_UART_IIR_RRI) #define PCH_UART_IID_RDR_TO (PCH_UART_IIR_RRI | PCH_UART_IIR_TOI) @@ -316,7 +315,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud, unsigned int dll, dlm, lcr; int div; - div = DIV_ROUND(priv->base_baud / 16, baud); + div = DIV_ROUND_CLOSEST(priv->base_baud / 16, baud); if (div < 0 || USHRT_MAX <= div) { dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div); return -EINVAL; -- cgit v0.10.2 From ae92c1f5e7b6708371365d262625ac19e67c1e79 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 24 May 2011 10:43:03 +0200 Subject: TTY: export NR_LDISC and N_* line discipline numbers to user-space Since commit (4564f9e5: consolidate line discipline number definitions) the patch moved all line discipline number from a per-architecture termios.h to a shared one: tty.h. However, prior to this consolidation work, the line discipline numbers were outside of an ifdef __KERNEL__/endif block so these numbers used to be exported to user-space. Since such numbers are kernel ABI anyway, and tty.h is already included for user- space header processing, just move these relevant defines outside of the ifdef __KERNEL__/endif block in include/linux/tty.h. CC: Maxime Bizon Signed-off-by: Florian Fainelli Acked-by: Tilman Schmidt Signed-off-by: Greg Kroah-Hartman diff --git a/include/linux/tty.h b/include/linux/tty.h index d6f0529..44bc0c5 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -5,24 +5,6 @@ * 'tty.h' defines some structures used by tty_io.c and some defines. */ -#ifdef __KERNEL__ -#include -#include -#include -#include -#include -#include -#include - -#include - - -/* - * (Note: the *_driver.minor_start values 1, 64, 128, 192 are - * hardcoded at present.) - */ -#define NR_UNIX98_PTY_DEFAULT 4096 /* Default maximum for Unix98 ptys */ -#define NR_UNIX98_PTY_MAX (1 << MINORBITS) /* Absolute limit */ #define NR_LDISCS 30 /* line disciplines */ @@ -53,6 +35,25 @@ #define N_TRACESINK 23 /* Trace data routing for MIPI P1149.7 */ #define N_TRACEROUTER 24 /* Trace data routing for MIPI P1149.7 */ +#ifdef __KERNEL__ +#include +#include +#include +#include +#include +#include +#include + +#include + + +/* + * (Note: the *_driver.minor_start values 1, 64, 128, 192 are + * hardcoded at present.) + */ +#define NR_UNIX98_PTY_DEFAULT 4096 /* Default maximum for Unix98 ptys */ +#define NR_UNIX98_PTY_MAX (1 << MINORBITS) /* Absolute limit */ + /* * This character is the same as _POSIX_VDISABLE: it cannot be used as * a c_cc[] character, but indicates that a particular special character -- cgit v0.10.2 From 2807190b69f60ce4a04a9c7c523c9bce8cb62b2e Mon Sep 17 00:00:00 2001 From: Michael Reed Date: Tue, 31 May 2011 12:06:28 -0500 Subject: 8250_pci Add EEH support to the 8250 driver for IBM/Digi PCIe 2-port Adapter The purpose of the patch is to add EEH support to the 8250_PCI driver for the IBM/Digi PCIE 2port Async EIA-232 Adapter that uses a PLX chipset on the PPC platforrm. Basic support for this adapter was recently added https://lkml.org/lkml/2011/5/11/341 This patch was created against the linux-next kernel Cc: Greg Kroah-Hartman Cc: Breno Leitao Cc: Scott Kilau Signed-off-by: Michael Reed Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c index e1d4668..ae2188c 100644 --- a/drivers/tty/serial/8250_pci.c +++ b/drivers/tty/serial/8250_pci.c @@ -2708,6 +2708,7 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) board = &pci_boards[ent->driver_data]; rc = pci_enable_device(dev); + pci_save_state(dev); if (rc) return rc; @@ -4002,6 +4003,51 @@ static struct pci_device_id serial_pci_tbl[] = { { 0, } }; +static pci_ers_result_t serial8250_io_error_detected(struct pci_dev *dev, + pci_channel_state_t state) +{ + struct serial_private *priv = pci_get_drvdata(dev); + + if (state == pci_channel_io_perm_failure) + return PCI_ERS_RESULT_DISCONNECT; + + if (priv) + pciserial_suspend_ports(priv); + + pci_disable_device(dev); + + return PCI_ERS_RESULT_NEED_RESET; +} + +static pci_ers_result_t serial8250_io_slot_reset(struct pci_dev *dev) +{ + int rc; + + rc = pci_enable_device(dev); + + if (rc) + return PCI_ERS_RESULT_DISCONNECT; + + pci_restore_state(dev); + pci_save_state(dev); + + return PCI_ERS_RESULT_RECOVERED; +} + +static void serial8250_io_resume(struct pci_dev *dev) +{ + struct serial_private *priv = pci_get_drvdata(dev); + + if (priv) + pciserial_resume_ports(priv); +} + +static struct pci_error_handlers serial8250_err_handler = { + .error_detected = serial8250_io_error_detected, + .slot_reset = serial8250_io_slot_reset, + .resume = serial8250_io_resume, +}; + static struct pci_driver serial_pci_driver = { .name = "serial", .probe = pciserial_init_one, @@ -4011,6 +4057,7 @@ static struct pci_driver serial_pci_driver = { .resume = pciserial_resume_one, #endif .id_table = serial_pci_tbl, + .err_handler = &serial8250_err_handler, }; static int __init serial8250_pci_init(void) -- cgit v0.10.2 From e7328ae1848966181a7ac47e8ae6cddbd2cf55f3 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Sun, 5 Jun 2011 22:51:49 +0200 Subject: serial: 8250, increase PASS_LIMIT With virtual machines like qemu, it's pretty common to see "too much work for irq4" messages nowadays. This happens when a bunch of output is printed on the emulated serial console. This is caused by too low PASS_LIMIT. When ISR loops more than the limit, it spits the message. I've been using a kernel with doubled the limit and I couldn't see no problems. Maybe it's time to get rid of the message now? Signed-off-by: Jiri Slaby Cc: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c index b40f7b9..f11df87 100644 --- a/drivers/tty/serial/8250.c +++ b/drivers/tty/serial/8250.c @@ -81,7 +81,7 @@ static unsigned int skip_txen_test; /* force skip of txen test at init time */ #define DEBUG_INTR(fmt...) do { } while (0) #endif -#define PASS_LIMIT 256 +#define PASS_LIMIT 512 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) -- cgit v0.10.2 From e556b8131a787dd44aa614100fd8cc81794efe45 Mon Sep 17 00:00:00 2001 From: J Freyensee Date: Wed, 25 May 2011 14:50:26 -0700 Subject: pti: pti_tty_install documentation mispelling. This patch tidies up the documentation for pti_tty_install() function. Signed-off-by: J Freyensee Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/misc/pti.c b/drivers/misc/pti.c index bb6f925..7281438 100644 --- a/drivers/misc/pti.c +++ b/drivers/misc/pti.c @@ -444,9 +444,9 @@ static void pti_tty_driver_close(struct tty_struct *tty, struct file *filp) } /** - * pti_tty_intstall()- Used to set up specific master-channels - * to tty ports for organizational purposes when - * tracing viewed from debuging tools. + * pti_tty_install()- Used to set up specific master-channels + * to tty ports for organizational purposes when + * tracing viewed from debuging tools. * * @driver: tty driver information. * @tty: tty struct containing pti information. -- cgit v0.10.2 From 5464e9c72194d4db9665346b3973c1fb27ba87be Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Sat, 28 May 2011 09:31:39 -0400 Subject: DOCUMENTATION: Update overview.txt in Doc/driver-model. A few grammatical fixes, clarifications and corrections in just the overview file for the driver model documentation. Signed-off-by: Robert P. J. Day Signed-off-by: Greg Kroah-Hartman diff --git a/Documentation/driver-model/overview.txt b/Documentation/driver-model/overview.txt index 07236ed..6a8f9a8 100644 --- a/Documentation/driver-model/overview.txt +++ b/Documentation/driver-model/overview.txt @@ -30,7 +30,7 @@ management, and hot plug. In particular, the model dictated by Intel and Microsoft (namely ACPI) ensures that almost every device on almost any bus on an x86-compatible system can work within this paradigm. Of course, not every bus is able to support all such operations, although most -buses support a most of those operations. +buses support most of those operations. Downstream Access @@ -46,25 +46,29 @@ struct pci_dev now looks like this: struct pci_dev { ... - struct device dev; + struct device dev; /* Generic device interface */ + ... }; -Note first that it is statically allocated. This means only one allocation on -device discovery. Note also that it is at the _end_ of struct pci_dev. This is -to make people think about what they're doing when switching between the bus -driver and the global driver; and to prevent against mindless casts between -the two. +Note first that the struct device dev within the struct pci_dev is +statically allocated. This means only one allocation on device discovery. + +Note also that that struct device dev is not necessarily defined at the +front of the pci_dev structure. This is to make people think about what +they're doing when switching between the bus driver and the global driver, +and to discourage meaningless and incorrect casts between the two. The PCI bus layer freely accesses the fields of struct device. It knows about the structure of struct pci_dev, and it should know the structure of struct device. Individual PCI device drivers that have been converted to the current driver model generally do not and should not touch the fields of struct device, -unless there is a strong compelling reason to do so. +unless there is a compelling reason to do so. -This abstraction is prevention of unnecessary pain during transitional phases. -If the name of the field changes or is removed, then every downstream driver -will break. On the other hand, if only the bus layer (and not the device -layer) accesses struct device, it is only that layer that needs to change. +The above abstraction prevents unnecessary pain during transitional phases. +If it were not done this way, then when a field was renamed or removed, every +downstream driver would break. On the other hand, if only the bus layer +(and not the device layer) accesses the struct device, it is only the bus +layer that needs to change. User Interface @@ -73,15 +77,27 @@ User Interface By virtue of having a complete hierarchical view of all the devices in the system, exporting a complete hierarchical view to userspace becomes relatively easy. This has been accomplished by implementing a special purpose virtual -file system named sysfs. It is hence possible for the user to mount the -whole sysfs filesystem anywhere in userspace. +file system named sysfs. + +Almost all mainstream Linux distros mount this filesystem automatically; you +can see some variation of the following in the output of the "mount" command: + +$ mount +... +none on /sys type sysfs (rw,noexec,nosuid,nodev) +... +$ + +The auto-mounting of sysfs is typically accomplished by an entry similar to +the following in the /etc/fstab file: + +none /sys sysfs defaults 0 0 -This can be done permanently by providing the following entry into the -/etc/fstab (under the provision that the mount point does exist, of course): +or something similar in the /lib/init/fstab file on Debian-based systems: -none /sys sysfs defaults 0 0 +none /sys sysfs nodev,noexec,nosuid 0 0 -Or by hand on the command line: +If sysfs is not automatically mounted, you can always do it manually with: # mount -t sysfs sysfs /sys -- cgit v0.10.2 From b6badddcccf9d48a01e9a9b33c47922976291ab6 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Sat, 28 May 2011 19:11:39 -0400 Subject: DOCUMENTATION: Replace create_device() with device_create(). Fix a rather obvious typo. Signed-off-by: Robert P. J. Day Signed-off-by: Greg Kroah-Hartman diff --git a/Documentation/driver-model/device.txt b/Documentation/driver-model/device.txt index b2ff426..bdefe72 100644 --- a/Documentation/driver-model/device.txt +++ b/Documentation/driver-model/device.txt @@ -104,4 +104,4 @@ Then in the module init function is would do: And assuming 'dev' is the struct device passed into the probe hook, the driver probe function would do something like: - create_device(&mydriver_class, dev, chrdev, &private_data, "my_name"); + device_create(&mydriver_class, dev, chrdev, &private_data, "my_name"); -- cgit v0.10.2 From 7306e4e311954c98f0d44d63693839b0fb602707 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:46 +0200 Subject: staging: brcm80211: removed unused Broadcom specific ioctls codes Code cleanup. Removal of code that is not invoked. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index 6cba4df..f45628a 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -2350,27 +2350,6 @@ bool wlc_phy_test_ison(wlc_phy_t *ppi) return pi->phytest_on; } -bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval) -{ - phy_info_t *pi = (phy_info_t *) ppi; - bool ret = true; - - wlc_phyreg_enter(ppi); - - if (ISNPHY(pi)) { - - ret = false; - } else if (ISLCNPHY(pi)) { - u16 crsctrl = read_phy_reg(pi, 0x410); - u16 div = crsctrl & (0x1 << 1); - *pval = (div | ((crsctrl & (0x1 << 0)) ^ (div >> 1))); - } - - wlc_phyreg_exit(ppi); - - return ret; -} - void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) { phy_info_t *pi = (phy_info_t *) ppi; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h index 8939153..1ef96c7 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h @@ -226,7 +226,6 @@ extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); -extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval); extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 4b4a31e..2425fda 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -71,7 +71,6 @@ #define ALLPRIO -1 /* - * buffer length needed for wlc_format_ssid * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. */ #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) @@ -774,176 +773,6 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) wlc_ucode_mac_upd(wlc); } -#if defined(BCMDBG) -static int wlc_get_current_txpwr(struct wlc_info *wlc, void *pwr, uint len) -{ - txpwr_limits_t txpwr; - tx_power_t power; - tx_power_legacy_t *old_power = NULL; - int r, c; - uint qdbm; - bool override; - - if (len == sizeof(tx_power_legacy_t)) - old_power = (tx_power_legacy_t *) pwr; - else if (len < sizeof(tx_power_t)) - return -EOVERFLOW; - - memset(&power, 0, sizeof(tx_power_t)); - - power.chanspec = WLC_BAND_PI_RADIO_CHANSPEC; - if (wlc->pub->associated) - power.local_chanspec = wlc->home_chanspec; - - /* Return the user target tx power limits for the various rates. Note wlc_phy.c's - * public interface only implements getting and setting a single value for all of - * rates, so we need to fill the array ourselves. - */ - wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override); - for (r = 0; r < WL_TX_POWER_RATES; r++) { - power.user_limit[r] = (u8) qdbm; - } - - power.local_max = wlc->txpwr_local_max * WLC_TXPWR_DB_FACTOR; - power.local_constraint = - wlc->txpwr_local_constraint * WLC_TXPWR_DB_FACTOR; - - power.antgain[0] = wlc->bandstate[BAND_2G_INDEX]->antgain; - power.antgain[1] = wlc->bandstate[BAND_5G_INDEX]->antgain; - - wlc_channel_reg_limits(wlc->cmi, power.chanspec, &txpwr); - -#if WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK -#error "WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK" -#endif - - /* CCK tx power limits */ - for (c = 0, r = WL_TX_POWER_CCK_FIRST; c < WL_TX_POWER_CCK_NUM; - c++, r++) - power.reg_limit[r] = txpwr.cck[c]; - -#if WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM -#error "WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM" -#endif - - /* 20 MHz OFDM SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM_FIRST; c < WL_TX_POWER_OFDM_NUM; - c++, r++) - power.reg_limit[r] = txpwr.ofdm[c]; - - if (WLC_PHY_11N_CAP(wlc->band)) { - - /* 20 MHz OFDM CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM20_CDD_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_cdd[c]; - - /* 40 MHz OFDM SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM40_SISO_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_40_siso[c]; - - /* 40 MHz OFDM CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM40_CDD_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_40_cdd[c]; - -#if WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM -#error "WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM" -#endif - - /* 20MHz MCS0-7 SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_SISO_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_siso[c]; - - /* 20MHz MCS0-7 CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_CDD_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_cdd[c]; - - /* 20MHz MCS0-7 STBC tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_STBC_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_stbc[c]; - - /* 40MHz MCS0-7 SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_SISO_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_siso[c]; - - /* 40MHz MCS0-7 CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_CDD_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_cdd[c]; - - /* 40MHz MCS0-7 STBC tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_STBC_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_stbc[c]; - -#if WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM -#error "WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM" -#endif - - /* 20MHz MCS8-15 SDM tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_SDM_FIRST; - c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_mimo[c]; - - /* 40MHz MCS8-15 SDM tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_SDM_FIRST; - c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_mimo[c]; - - /* MCS 32 */ - power.reg_limit[WL_TX_POWER_MCS_32] = txpwr.mcs32; - } - - wlc_phy_txpower_get_current(wlc->band->pi, &power, - CHSPEC_CHANNEL(power.chanspec)); - - /* copy the tx_power_t struct to the return buffer, - * or convert to a tx_power_legacy_t struct - */ - if (!old_power) { - memcpy(pwr, &power, sizeof(tx_power_t)); - } else { - int band_idx = CHSPEC_IS2G(power.chanspec) ? 0 : 1; - - memset(old_power, 0, sizeof(tx_power_legacy_t)); - - old_power->txpwr_local_max = power.local_max; - old_power->txpwr_local_constraint = power.local_constraint; - if (CHSPEC_IS2G(power.chanspec)) { - old_power->txpwr_chan_reg_max = txpwr.cck[0]; - old_power->txpwr_est_Pout[band_idx] = - power.est_Pout_cck; - old_power->txpwr_est_Pout_gofdm = power.est_Pout[0]; - } else { - old_power->txpwr_chan_reg_max = txpwr.ofdm[0]; - old_power->txpwr_est_Pout[band_idx] = power.est_Pout[0]; - } - old_power->txpwr_antgain[0] = power.antgain[0]; - old_power->txpwr_antgain[1] = power.antgain[1]; - - for (r = 0; r < NUM_PWRCTRL_RATES; r++) { - old_power->txpwr_band_max[r] = power.user_limit[r]; - old_power->txpwr_limit[r] = power.reg_limit[r]; - old_power->txpwr_target[band_idx][r] = power.target[r]; - if (CHSPEC_IS2G(power.chanspec)) - old_power->txpwr_bphy_cck_max[r] = - power.board_limit[r]; - else - old_power->txpwr_aphy_max[r] = - power.board_limit[r]; - } - } - - return 0; -} -#endif /* defined(BCMDBG) */ - static u32 wlc_watchdog_backup_bi(struct wlc_info *wlc) { u32 bi; @@ -960,38 +789,6 @@ static u32 wlc_watchdog_backup_bi(struct wlc_info *wlc) return bi; } -/* Change to run the watchdog either from a periodic timer or from tbtt handler. - * Call watchdog from tbtt handler if tbtt is true, watchdog timer otherwise. - */ -void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt) -{ - /* make sure changing watchdog driver is allowed */ - if (!wlc->pub->up || !wlc->pub->align_wd_tbtt) - return; - if (!tbtt && wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - } - - /* stop watchdog timer and use tbtt interrupt to drive watchdog */ - if (tbtt && wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - wlc->WDlast = OSL_SYSUPTIME(); - } - /* arm watchdog timer and drive the watchdog there */ - else if (!tbtt && !wlc->WDarmed) { - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, - true); - wlc->WDarmed = true; - } - if (tbtt && !wlc->WDarmed) { - wl_add_timer(wlc->wl, wlc->wdtimer, wlc_watchdog_backup_bi(wlc), - true); - wlc->WDarmed = true; - } -} - ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) { ratespec_t lowest_basic_rspec; @@ -2781,7 +2578,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, bool bool_val; int bcmerror; d11regs_t *regs; - uint i; struct scb *nextscb; bool ta_ok; uint band; @@ -2821,61 +2617,15 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, bcmerror = 0; regs = wlc->regs; - /* A few commands don't need any arguments; all the others do. */ - switch (cmd) { - case WLC_UP: - case WLC_OUT: - case WLC_DOWN: - case WLC_DISASSOC: - case WLC_RESTART: - case WLC_REBOOT: - case WLC_START_CHANNEL_QA: - case WLC_INIT: - break; - - default: - if ((arg == NULL) || (len <= 0)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs " - "arguments\n", - wlc->pub->unit, __func__, cmd); - bcmerror = -EINVAL; - goto done; - } + if ((arg == NULL) || (len <= 0)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs arguments\n", + wlc->pub->unit, __func__, cmd); + bcmerror = -EINVAL; + goto done; } switch (cmd) { -#if defined(BCMDBG) - case WLC_GET_MSGLEVEL: - *pval = wl_msg_level; - break; - - case WLC_SET_MSGLEVEL: - wl_msg_level = val; - break; -#endif - - case WLC_GET_INSTANCE: - *pval = wlc->pub->unit; - break; - - case WLC_GET_CHANNEL:{ - channel_info_t *ci = (channel_info_t *) arg; - - if (len <= (int)sizeof(ci)) { - bcmerror = EOVERFLOW; - goto done; - } - - ci->hw_channel = - CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC); - ci->target_channel = - CHSPEC_CHANNEL(wlc->default_bss->chanspec); - ci->scan_channel = 0; - - break; - } - case WLC_SET_CHANNEL:{ chanspec_t chspec = CH20MHZ_CHSPEC(val); @@ -2909,273 +2659,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } -#if defined(BCMDBG) - case WLC_GET_UCFLAGS: - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val >= MHFMAX) { - bcmerror = -EINVAL; - break; - } - - *pval = wlc_bmac_mhf_get(wlc->hw, (u8) val, WLC_BAND_AUTO); - break; - - case WLC_SET_UCFLAGS: - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - i = (u16) val; - if (i >= MHFMAX) { - bcmerror = -EINVAL; - break; - } - - wlc_mhf(wlc, (u8) i, 0xffff, (u16) (val >> NBITS(u16)), - WLC_BAND_AUTO); - break; - - case WLC_GET_SHMEM: - ta_ok = true; - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val & 1) { - bcmerror = -EINVAL; - break; - } - - *pval = wlc_read_shm(wlc, (u16) val); - break; - - case WLC_SET_SHMEM: - ta_ok = true; - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val & 1) { - bcmerror = -EINVAL; - break; - } - - wlc_write_shm(wlc, (u16) val, - (u16) (val >> NBITS(u16))); - break; - - case WLC_R_REG: /* MAC registers */ - ta_ok = true; - r = (rw_reg_t *) arg; - band = WLC_BAND_AUTO; - - if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) { - bcmerror = -EOVERFLOW; - break; - } - - if (len >= (int)sizeof(rw_reg_t)) - band = r->band; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if ((r->byteoff + r->size) > sizeof(d11regs_t)) { - bcmerror = -EINVAL; - break; - } - if (r->size == sizeof(u32)) - r->val = - R_REG((u32 *)((unsigned char *)(unsigned long)regs + - r->byteoff)); - else if (r->size == sizeof(u16)) - r->val = - R_REG((u16 *)((unsigned char *)(unsigned long)regs + - r->byteoff)); - else - bcmerror = -EINVAL; - break; - - case WLC_W_REG: - ta_ok = true; - r = (rw_reg_t *) arg; - band = WLC_BAND_AUTO; - - if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) { - bcmerror = -EOVERFLOW; - break; - } - - if (len >= (int)sizeof(rw_reg_t)) - band = r->band; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (r->byteoff + r->size > sizeof(d11regs_t)) { - bcmerror = -EINVAL; - break; - } - if (r->size == sizeof(u32)) - W_REG((u32 *)((unsigned char *)(unsigned long) regs + - r->byteoff), r->val); - else if (r->size == sizeof(u16)) - W_REG((u16 *)((unsigned char *)(unsigned long) regs + - r->byteoff), r->val); - else - bcmerror = -EINVAL; - break; -#endif /* BCMDBG */ - - case WLC_GET_TXANT: - *pval = wlc->stf->txant; - break; - - case WLC_SET_TXANT: - bcmerror = wlc_stf_ant_txant_validate(wlc, (s8) val); - if (bcmerror < 0) - break; - - wlc->stf->txant = (s8) val; - - /* if down, we are done */ - if (!wlc->pub->up) - break; - - wlc_suspend_mac_and_wait(wlc); - - wlc_stf_phy_txant_upd(wlc); - wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); - - wlc_enable_mac(wlc); - - break; - - case WLC_GET_ANTDIV:{ - u8 phy_antdiv; - - /* return configured value if core is down */ - if (!wlc->pub->up) { - *pval = wlc->stf->ant_rx_ovr; - - } else { - if (wlc_phy_ant_rxdiv_get - (wlc->band->pi, &phy_antdiv)) - *pval = (int)phy_antdiv; - else - *pval = (int)wlc->stf->ant_rx_ovr; - } - - break; - } - case WLC_SET_ANTDIV: - /* values are -1=driver default, 0=force0, 1=force1, 2=start1, 3=start0 */ - if ((val < -1) || (val > 3)) { - bcmerror = -EINVAL; - break; - } - - if (val == -1) - val = ANT_RX_DIV_DEF; - - wlc->stf->ant_rx_ovr = (u8) val; - wlc_phy_ant_rxdiv_set(wlc->band->pi, (u8) val); - break; - - case WLC_GET_RX_ANT:{ /* get latest used rx antenna */ - u16 rxstatus; - - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - rxstatus = R_REG(&wlc->regs->phyrxstatus0); - if (rxstatus == 0xdead || rxstatus == (u16) -1) { - bcmerror = -EBADE; - break; - } - *pval = (rxstatus & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; - break; - } - -#if defined(BCMDBG) - case WLC_GET_UCANTDIV: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - *pval = - (wlc_bmac_mhf_get(wlc->hw, MHF1, WLC_BAND_AUTO) & - MHF1_ANTDIV); - break; - - case WLC_SET_UCANTDIV:{ - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* if multiband, band must be locked */ - if (IS_MBAND_UNLOCKED(wlc)) { - bcmerror = -ENOMEDIUM; - break; - } - - wlc_mhf(wlc, MHF1, MHF1_ANTDIV, - (val ? MHF1_ANTDIV : 0), WLC_BAND_AUTO); - break; - } -#endif /* defined(BCMDBG) */ - - case WLC_GET_SRL: - *pval = wlc->SRL; - break; - case WLC_SET_SRL: if (val >= 1 && val <= RETRY_SHORT_MAX) { int ac; @@ -3191,10 +2674,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, bcmerror = -EINVAL; break; - case WLC_GET_LRL: - *pval = wlc->LRL; - break; - case WLC_SET_LRL: if (val >= 1 && val <= 255) { int ac; @@ -3210,159 +2689,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, bcmerror = -EINVAL; break; - case WLC_GET_CWMIN: - *pval = wlc->band->CWmin; - break; - - case WLC_SET_CWMIN: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - if (val >= 1 && val <= 255) { - wlc_set_cwmin(wlc, (u16) val); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_CWMAX: - *pval = wlc->band->CWmax; - break; - - case WLC_SET_CWMAX: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - if (val >= 255 && val <= 2047) { - wlc_set_cwmax(wlc, (u16) val); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_RADIO: /* use mask if don't want to expose some internal bits */ - *pval = wlc->pub->radio_disabled; - break; - - case WLC_SET_RADIO:{ /* 32 bits input, higher 16 bits are mask, lower 16 bits are value to - * set - */ - u16 radiomask, radioval; - uint validbits = - WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE; - mbool new = 0; - - radiomask = (val & 0xffff0000) >> 16; - radioval = val & 0x0000ffff; - - if ((radiomask == 0) || (radiomask & ~validbits) - || (radioval & ~validbits) - || ((radioval & ~radiomask) != 0)) { - wiphy_err(wlc->wiphy, "SET_RADIO with wrong " - "bits 0x%x\n", val); - bcmerror = -EINVAL; - break; - } - - new = - (wlc->pub->radio_disabled & ~radiomask) | radioval; - wlc->pub->radio_disabled = new; - - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); - break; - } - - case WLC_GET_PHYTYPE: - *pval = WLC_PHYTYPE(wlc->band->phytype); - break; - -#if defined(BCMDBG) - case WLC_GET_KEY: - if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc))) { - wl_wsec_key_t key; - - wsec_key_t *src_key = wlc->wsec_keys[val]; - - if (len < (int)sizeof(key)) { - bcmerror = -EOVERFLOW; - break; - } - - memset((char *)&key, 0, sizeof(key)); - if (src_key) { - key.index = src_key->id; - key.len = src_key->len; - memcpy(key.data, src_key->data, key.len); - key.algo = src_key->algo; - if (WSEC_SOFTKEY(wlc, src_key, bsscfg)) - key.flags |= WL_SOFT_KEY; - if (src_key->flags & WSEC_PRIMARY_KEY) - key.flags |= WL_PRIMARY_KEY; - - memcpy(key.ea, src_key->ea, ETH_ALEN); - } - - memcpy(arg, &key, sizeof(key)); - } else - bcmerror = -EINVAL; - break; -#endif /* defined(BCMDBG) */ - - case WLC_SET_KEY: - bcmerror = - wlc_iovar_op(wlc, "wsec_key", NULL, 0, arg, len, IOV_SET, - wlcif); - break; - - case WLC_GET_KEY_SEQ:{ - wsec_key_t *key; - - if (len < DOT11_WPA_KEY_RSC_LEN) { - bcmerror = -EOVERFLOW; - break; - } - - /* Return the key's tx iv as an EAPOL sequence counter. - * This will be used to supply the RSC value to a supplicant. - * The format is 8 bytes, with least significant in seq[0]. - */ - - key = WSEC_KEY(wlc, val); - if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc)) && - (key != NULL)) { - u8 seq[DOT11_WPA_KEY_RSC_LEN]; - u16 lo; - u32 hi; - /* group keys in WPA-NONE (IBSS only, AES and TKIP) use a global TXIV */ - if ((bsscfg->WPA_auth & WPA_AUTH_NONE) && - is_zero_ether_addr(key->ea)) { - lo = bsscfg->wpa_none_txiv.lo; - hi = bsscfg->wpa_none_txiv.hi; - } else { - lo = key->txiv.lo; - hi = key->txiv.hi; - } - - /* format the buffer, low to high */ - seq[0] = lo & 0xff; - seq[1] = (lo >> 8) & 0xff; - seq[2] = hi & 0xff; - seq[3] = (hi >> 8) & 0xff; - seq[4] = (hi >> 16) & 0xff; - seq[5] = (hi >> 24) & 0xff; - seq[6] = 0; - seq[7] = 0; - - memcpy(arg, seq, sizeof(seq)); - } else { - bcmerror = -EINVAL; - } - break; - } - case WLC_GET_CURR_RATESET:{ wl_rateset_t *ret_rs = (wl_rateset_t *) arg; wlc_rateset_t *rs; @@ -3383,24 +2709,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - case WLC_GET_RATESET:{ - wlc_rateset_t rs; - wl_rateset_t *ret_rs = (wl_rateset_t *) arg; - - memset(&rs, 0, sizeof(wlc_rateset_t)); - wlc_default_rateset(wlc, (wlc_rateset_t *) &rs); - - if (len < (int)(rs.count + sizeof(rs.count))) { - bcmerror = -EOVERFLOW; - break; - } - - /* Copy only legacy rateset section */ - ret_rs->count = rs.count; - memcpy(&ret_rs->rates, &rs.rates, rs.count); - break; - } - case WLC_SET_RATESET:{ wlc_rateset_t rs; wl_rateset_t *in_rs = (wl_rateset_t *) arg; @@ -3441,13 +2749,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - case WLC_GET_BCNPRD: - if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated) - *pval = current_bss->beacon_period; - else - *pval = wlc->default_bss->beacon_period; - break; - case WLC_SET_BCNPRD: /* range [1, 0xffff] */ if (val >= DOT11_MIN_BEACON_PERIOD @@ -3457,124 +2758,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, bcmerror = -EINVAL; break; - case WLC_GET_DTIMPRD: - if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated) - *pval = current_bss->dtim_period; - else - *pval = wlc->default_bss->dtim_period; - break; - - case WLC_SET_DTIMPRD: - /* range [1, 0xff] */ - if (val >= DOT11_MIN_DTIM_PERIOD - && val <= DOT11_MAX_DTIM_PERIOD) { - wlc->default_bss->dtim_period = (u8) val; - } else - bcmerror = -EINVAL; - break; - -#ifdef SUPPORT_PS - case WLC_GET_PM: - *pval = wlc->PM; - break; - - case WLC_SET_PM: - if ((val >= PM_OFF) && (val <= PM_MAX)) { - wlc->PM = (u8) val; - if (wlc->pub->up) { - } - /* Change watchdog driver to align watchdog with tbtt if possible */ - wlc_watchdog_upd(wlc, PS_ALLOWED(wlc)); - } else - bcmerror = -EBADE; - break; -#endif /* SUPPORT_PS */ - -#ifdef SUPPORT_PS -#ifdef BCMDBG - case WLC_GET_WAKE: - if (AP_ENAB(wlc->pub)) { - bcmerror = -BCME_NOTSTA; - break; - } - *pval = wlc->wake; - break; - - case WLC_SET_WAKE: - if (AP_ENAB(wlc->pub)) { - bcmerror = -BCME_NOTSTA; - break; - } - - wlc->wake = val ? true : false; - - /* if down, we're done */ - if (!wlc->pub->up) - break; - - /* apply to the mac */ - wlc_set_ps_ctrl(wlc); - break; -#endif /* BCMDBG */ -#endif /* SUPPORT_PS */ - - case WLC_GET_REVINFO: - bcmerror = wlc_get_revision_info(wlc, arg, (uint) len); - break; - - case WLC_GET_AP: - *pval = (int)AP_ENAB(wlc->pub); - break; - - case WLC_GET_ATIM: - if (bsscfg->associated) - *pval = (int)current_bss->atim_window; - else - *pval = (int)wlc->default_bss->atim_window; - break; - - case WLC_SET_ATIM: - wlc->default_bss->atim_window = (u32) val; - break; - -#ifdef SUPPORT_HWKEY - case WLC_GET_WSEC: - bcmerror = - wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_GET, - wlcif); - break; - - case WLC_SET_WSEC: - bcmerror = - wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_SET, - wlcif); - break; - - case WLC_GET_WPA_AUTH: - *pval = (int)bsscfg->WPA_auth; - break; - - case WLC_SET_WPA_AUTH: - /* change of WPA_Auth modifies the PS_ALLOWED state */ - if (BSSCFG_STA(bsscfg)) { - bsscfg->WPA_auth = (u16) val; - } else - bsscfg->WPA_auth = (u16) val; - break; -#endif /* SUPPORT_HWKEY */ - - case WLC_GET_BANDLIST: - /* count of number of bands, followed by each band type */ - *pval++ = NBANDS(wlc); - *pval++ = wlc->band->bandtype; - if (NBANDS(wlc) > 1) - *pval++ = wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype; - break; - - case WLC_GET_BAND: - *pval = wlc->bandlocked ? wlc->band->bandtype : WLC_BAND_AUTO; - break; - case WLC_GET_PHYLIST: { unsigned char *cp = arg; @@ -3594,14 +2777,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - case WLC_GET_SHORTSLOT: - *pval = wlc->shortslot; - break; - - case WLC_GET_SHORTSLOT_OVERRIDE: - *pval = wlc->shortslot_override; - break; - case WLC_SET_SHORTSLOT_OVERRIDE: if ((val != WLC_SHORTSLOT_AUTO) && (val != WLC_SHORTSLOT_OFF) && (val != WLC_SHORTSLOT_ON)) { @@ -3635,256 +2810,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; - case WLC_GET_LEGACY_ERP: - *pval = wlc->include_legacy_erp; - break; - - case WLC_SET_LEGACY_ERP: - if (wlc->include_legacy_erp == bool_val) - break; - - wlc->include_legacy_erp = bool_val; - - if (AP_ENAB(wlc->pub) && wlc->clk) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } - break; - - case WLC_GET_GMODE: - if (wlc->band->bandtype == WLC_BAND_2G) - *pval = wlc->band->gmode; - else if (NBANDS(wlc) > 1) - *pval = wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode; - break; - - case WLC_SET_GMODE: - if (!wlc->pub->associated) - bcmerror = wlc_set_gmode(wlc, (u8) val, true); - else { - bcmerror = -EISCONN; - break; - } - break; - - case WLC_GET_GMODE_PROTECTION: - *pval = wlc->protection->_g; - break; - - case WLC_GET_PROTECTION_CONTROL: - *pval = wlc->protection->overlap; - break; - - case WLC_SET_PROTECTION_CONTROL: - if ((val != WLC_PROTECTION_CTL_OFF) && - (val != WLC_PROTECTION_CTL_LOCAL) && - (val != WLC_PROTECTION_CTL_OVERLAP)) { - bcmerror = -EINVAL; - break; - } - - wlc_protection_upd(wlc, WLC_PROT_OVERLAP, (s8) val); - - /* Current g_protection will sync up to the specified control alg in watchdog - * if the driver is up and associated. - * If the driver is down or not associated, the control setting has no effect. - */ - break; - - case WLC_GET_GMODE_PROTECTION_OVERRIDE: - *pval = wlc->protection->g_override; - break; - - case WLC_SET_GMODE_PROTECTION_OVERRIDE: - if ((val != WLC_PROTECTION_AUTO) && - (val != WLC_PROTECTION_OFF) && (val != WLC_PROTECTION_ON)) { - bcmerror = -EINVAL; - break; - } - - wlc_protection_upd(wlc, WLC_PROT_G_OVR, (s8) val); - - break; - - case WLC_SET_SUP_RATESET_OVERRIDE:{ - wlc_rateset_t rs, new; - - /* copyin */ - if (len < (int)sizeof(wlc_rateset_t)) { - bcmerror = -EOVERFLOW; - break; - } - memcpy(&rs, arg, sizeof(wlc_rateset_t)); - - /* check for bad count value */ - if (rs.count > WLC_NUMRATES) { - bcmerror = -EINVAL; - break; - } - - /* this command is only appropriate for gmode operation */ - if (!(wlc->band->gmode || - ((NBANDS(wlc) > 1) - && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) { - /* gmode only command when not in gmode */ - bcmerror = -EINVAL; - break; - } - - /* check for an empty rateset to clear the override */ - if (rs.count == 0) { - memset(&wlc->sup_rates_override, 0, - sizeof(wlc_rateset_t)); - break; - } - - /* - * validate rateset by comparing pre and - * post sorted against 11g hw rates - */ - wlc_rateset_filter(&rs, &new, false, - WLC_RATES_CCK_OFDM, WLC_RATE_MASK, - BSS_N_ENAB(wlc, bsscfg)); - wlc_rate_hwrs_filter_sort_validate(&new, - &cck_ofdm_rates, - false, - wlc->stf->txstreams); - if (rs.count != new.count) { - bcmerror = -EINVAL; - break; - } - - /* apply new rateset to the override */ - memcpy(&wlc->sup_rates_override, &new, - sizeof(wlc_rateset_t)); - - /* update bcn and probe resp if needed */ - if (wlc->pub->up && AP_ENAB(wlc->pub) - && wlc->pub->associated) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } - break; - } - - case WLC_GET_SUP_RATESET_OVERRIDE: - /* this command is only appropriate for gmode operation */ - if (!(wlc->band->gmode || - ((NBANDS(wlc) > 1) - && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) { - /* gmode only command when not in gmode */ - bcmerror = -EINVAL; - break; - } - if (len < (int)sizeof(wlc_rateset_t)) { - bcmerror = -EOVERFLOW; - break; - } - memcpy(arg, &wlc->sup_rates_override, sizeof(wlc_rateset_t)); - - break; - - case WLC_GET_PRB_RESP_TIMEOUT: - *pval = wlc->prb_resp_timeout; - break; - - case WLC_SET_PRB_RESP_TIMEOUT: - if (wlc->pub->up) { - bcmerror = -EISCONN; - break; - } - if (val < 0 || val >= 0xFFFF) { - bcmerror = -EINVAL; /* bad value */ - break; - } - wlc->prb_resp_timeout = (u16) val; - break; - - case WLC_GET_KEY_PRIMARY:{ - wsec_key_t *key; - - /* treat the 'val' parm as the key id */ - key = WSEC_BSS_DEFAULT_KEY(bsscfg); - if (key != NULL) { - *pval = key->id == val ? true : false; - } else { - bcmerror = -EINVAL; - } - break; - } - - case WLC_SET_KEY_PRIMARY:{ - wsec_key_t *key, *old_key; - - bcmerror = -EINVAL; - - /* treat the 'val' parm as the key id */ - for (i = 0; i < WSEC_MAX_DEFAULT_KEYS; i++) { - key = bsscfg->bss_def_keys[i]; - if (key != NULL && key->id == val) { - old_key = WSEC_BSS_DEFAULT_KEY(bsscfg); - if (old_key != NULL) - old_key->flags &= - ~WSEC_PRIMARY_KEY; - key->flags |= WSEC_PRIMARY_KEY; - bsscfg->wsec_index = i; - bcmerror = 0; - } - } - break; - } - -#ifdef BCMDBG - case WLC_INIT: - wl_init(wlc->wl); - break; -#endif - - case WLC_SET_VAR: - case WLC_GET_VAR:{ - char *name; - /* validate the name value */ - name = (char *)arg; - for (i = 0; i < (uint) len && *name != '\0'; - i++, name++) - ; - - if (i == (uint) len) { - bcmerror = -EOVERFLOW; - break; - } - i++; /* include the null in the string length */ - - if (cmd == WLC_GET_VAR) { - bcmerror = - wlc_iovar_op(wlc, arg, - (void *)((s8 *) arg + i), - len - i, arg, len, IOV_GET, - wlcif); - } else - bcmerror = - wlc_iovar_op(wlc, arg, NULL, 0, - (void *)((s8 *) arg + i), - len - i, IOV_SET, wlcif); - - break; - } - - case WLC_SET_WSEC_PMK: - bcmerror = -ENOTSUPP; - break; - -#if defined(BCMDBG) - case WLC_CURRENT_PWR: - if (!wlc->pub->up) - bcmerror = -ENOLINK; - else - bcmerror = wlc_get_current_txpwr(wlc, arg, len); - break; -#endif - - case WLC_LAST: - wiphy_err(wlc->wiphy, "%s: WLC_LAST\n", __func__); } done: @@ -3894,26 +2819,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, return bcmerror; } -#if defined(BCMDBG) -/* consolidated register access ioctl error checking */ -int wlc_iocregchk(struct wlc_info *wlc, uint band) -{ - /* if band is specified, it must be the current band */ - if ((band != WLC_BAND_AUTO) && (band != (uint) wlc->band->bandtype)) - return -EINVAL; - - /* if multiband and band is not specified, band must be locked */ - if ((band == WLC_BAND_AUTO) && IS_MBAND_UNLOCKED(wlc)) - return -ENOMEDIUM; - - /* must have core clocks */ - if (!wlc->clk) - return -EIO; - - return 0; -} -#endif /* defined(BCMDBG) */ - /* Look up the given var name in the given table */ static const bcm_iovar_t *wlc_iovar_lookup(const bcm_iovar_t *table, const char *name) @@ -3937,14 +2842,12 @@ static const bcm_iovar_t *wlc_iovar_lookup(const bcm_iovar_t *table, return NULL; /* var name not found */ } -/* simplified integer get interface for common WLC_GET_VAR ioctl handler */ int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg) { return wlc_iovar_op(wlc, name, NULL, 0, arg, sizeof(s32), IOV_GET, NULL); } -/* simplified integer set interface for common WLC_SET_VAR ioctl handler */ int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg) { return wlc_iovar_op(wlc, name, NULL, 0, (void *)&arg, sizeof(arg), @@ -4554,32 +3457,6 @@ void wlc_print_rxh(d11rxhdr_t *rxh) } #endif /* defined(BCMDBG) */ -#if defined(BCMDBG) -int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len) -{ - uint i, c; - char *p = buf; - char *endp = buf + SSID_FMT_BUF_LEN; - - if (ssid_len > IEEE80211_MAX_SSID_LEN) - ssid_len = IEEE80211_MAX_SSID_LEN; - - for (i = 0; i < ssid_len; i++) { - c = (uint) ssid[i]; - if (c == '\\') { - *p++ = '\\'; - *p++ = '\\'; - } else if (isprint((unsigned char) c)) { - *p++ = (char)c; - } else { - p += snprintf(p, (endp - p), "\\x%02X", c); - } - } - *p = '\0'; - return (int)(p - buf); -} -#endif /* defined(BCMDBG) */ - static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate) { return wlc_bmac_rate_shm_offset(wlc->hw, rate); @@ -6985,43 +5862,6 @@ void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg) memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec)); } -/* Retrieve a consolidated set of revision information, - * typically for the WLC_GET_REVINFO ioctl - */ -int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len) -{ - wlc_rev_info_t *rinfo = (wlc_rev_info_t *) buf; - - if (len < WL_REV_INFO_LEGACY_LENGTH) - return -EOVERFLOW; - - rinfo->vendorid = wlc->vendorid; - rinfo->deviceid = wlc->deviceid; - rinfo->radiorev = (wlc->band->radiorev << IDCODE_REV_SHIFT) | - (wlc->band->radioid << IDCODE_ID_SHIFT); - rinfo->chiprev = wlc->pub->sih->chiprev; - rinfo->corerev = wlc->pub->corerev; - rinfo->boardid = wlc->pub->sih->boardtype; - rinfo->boardvendor = wlc->pub->sih->boardvendor; - rinfo->boardrev = wlc->pub->boardrev; - rinfo->ucoderev = wlc->ucode_rev; - rinfo->driverrev = EPI_VERSION_NUM; - rinfo->bus = wlc->pub->sih->bustype; - rinfo->chipnum = wlc->pub->sih->chip; - - if (len >= (offsetof(wlc_rev_info_t, chippkg))) { - rinfo->phytype = wlc->band->phytype; - rinfo->phyrev = wlc->band->phyrev; - rinfo->anarev = 0; /* obsolete stuff, suppress */ - } - - if (len >= sizeof(*rinfo)) { - rinfo->chippkg = wlc->pub->sih->chippkg; - } - - return 0; -} - void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs) { wlc_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype, @@ -7273,20 +6113,6 @@ wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, memcpy(wlc->cfg->BSSID, addr, ETH_ALEN); } -void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin) -{ - wlc->band->CWmin = newmin; - wlc_bmac_set_cwmin(wlc->hw, newmin); -} - -void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax) -{ - wlc->band->CWmax = newmax; - wlc_bmac_set_cwmax(wlc->hw, newmax); -} - -/* Search mem rw utilities */ - void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit) { wlc_bmac_pllreq(wlc->hw, set, req_bit); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index fb48dfcb9..0bb3784 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -805,8 +805,6 @@ extern void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, void *buf); extern void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, bool both); -extern void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin); -extern void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax); extern void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit); extern void wlc_reset_bmac_done(struct wlc_info *wlc); @@ -928,10 +926,7 @@ extern ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs); extern void wlc_radio_disable(struct wlc_info *wlc); extern void wlc_bcn_li_upd(struct wlc_info *wlc); - -extern int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len); extern void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec); -extern void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt); extern bool wlc_ps_allowed(struct wlc_info *wlc); extern bool wlc_stay_awake(struct wlc_info *wlc); extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 9334dea..88b0967 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -134,7 +134,6 @@ struct rsn_parms { }; /* - * buffer length needed for wlc_format_ssid * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. */ #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) @@ -558,18 +557,10 @@ extern void wlc_scan_stop(struct wlc_info *wlc); extern int wlc_get_curband(struct wlc_info *wlc); extern void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop); -#if defined(BCMDBG) -extern int wlc_iocregchk(struct wlc_info *wlc, uint band); -#endif - /* helper functions */ extern bool wlc_check_radio_disabled(struct wlc_info *wlc); extern bool wlc_radio_monitor_stop(struct wlc_info *wlc); -#if defined(BCMDBG) -extern int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len); -#endif - #define MAXBANDS 2 /* Maximum #of bands */ /* bandstate array indices */ #define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index c4f5817..544d883 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -364,39 +364,6 @@ void wlc_stf_detach(struct wlc_info *wlc) { } -int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val) -{ - int bcmerror = 0; - - /* when there is only 1 tx_streams, don't allow to change the txant */ - if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) - return ((val == wlc->stf->txant) ? bcmerror : -EINVAL); - - switch (val) { - case -1: - val = ANT_TX_DEF; - break; - case 0: - val = ANT_TX_FORCE_0; - break; - case 1: - val = ANT_TX_FORCE_1; - break; - case 3: - val = ANT_TX_LAST_RX; - break; - default: - bcmerror = -EINVAL; - break; - } - - if (bcmerror == 0) - wlc->stf->txant = (s8) val; - - return bcmerror; - -} - /* * Centralized txant update function. call it whenever wlc->stf->txant and/or wlc->stf->txchain * change diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h index 2b1180b..eedd9da 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h @@ -28,8 +28,6 @@ extern int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band); extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); extern int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force); extern bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val); - -extern int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val); extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc); extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); -- cgit v0.10.2 From c5e7c035952e0a7e7bbbab2f73ee3f158a0f2a91 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:47 +0200 Subject: staging: brcm80211: removed iovar layer from softmac Code cleanup. Softmac contained a redundant level of indirection, named 'iovar functionality'. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 6c6236c..3deb903 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -270,14 +270,14 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) WL_LOCK(wl); if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { - if (wlc_iovar_setint - (wl->wlc, "bcn_li_bcn", conf->listen_interval)) { + if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) + < 0) { wiphy_err(wiphy, "%s: Error setting listen_interval\n", __func__); err = -EIO; goto config_out; } - wlc_iovar_getint(wl->wlc, "bcn_li_bcn", &new_int); + wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); } if (changed & IEEE80211_CONF_CHANGE_MONITOR) wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", @@ -289,14 +289,14 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) "true" : "false"); if (changed & IEEE80211_CONF_CHANGE_POWER) { - if (wlc_iovar_setint - (wl->wlc, "qtxpower", conf->power_level * 4)) { + if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4) + < 0) { wiphy_err(wiphy, "%s: Error setting power_level\n", __func__); err = -EIO; goto config_out; } - wlc_iovar_getint(wl->wlc, "qtxpower", &new_int); + wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int); if (new_int != (conf->power_level * 4)) wiphy_err(wiphy, "%s: Power level req != actual, %d %d" "\n", __func__, conf->power_level * 4, @@ -808,7 +808,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, wl->pub->ieee_hw = hw; - if (wlc_iovar_setint(wl->wlc, "mpc", 0)) { + if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) { wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", unit); } @@ -821,8 +821,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, wl->irq = irq; /* register module */ - wlc_module_register(wl->pub, NULL, "linux", wl, NULL, wl_linux_watchdog, - NULL); + wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); if (ieee_hw_init(hw)) { wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 2425fda..c078ea0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -138,28 +138,6 @@ uint wl_msg_level = static struct wlc_info *wlc_info_dbg = (struct wlc_info *) (NULL); #endif -/* IOVar table */ - -/* Parameter IDs, for use only internally to wlc -- in the wlc_iovars - * table and by the wlc_doiovar() function. No ordering is imposed: - * the table is keyed by name, and the function uses a switch. - */ -enum { - IOV_MPC = 1, - IOV_RTSTHRESH, - IOV_QTXPOWER, - IOV_BCN_LI_BCN, /* Beacon listen interval in # of beacons */ - IOV_LAST /* In case of a need to check max ID number */ -}; - -const bcm_iovar_t wlc_iovars[] = { - {"mpc", IOV_MPC, (0), IOVT_BOOL, 0}, - {"rtsthresh", IOV_RTSTHRESH, (IOVF_WHL), IOVT_UINT16, 0}, - {"qtxpower", IOV_QTXPOWER, (IOVF_WHL), IOVT_UINT32, 0}, - {"bcn_li_bcn", IOV_BCN_LI_BCN, (0), IOVT_UINT8, 0}, - {NULL, 0, 0, 0, 0} -}; - const u8 prio2fifo[NUMPRIO] = { TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ @@ -255,8 +233,6 @@ static void wlc_watchdog(void *arg); static void wlc_watchdog_by_timer(void *arg); static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg); -static int wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val, - const bcm_iovar_t *vi); static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc); /* send and receive */ @@ -1401,10 +1377,6 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, /* 11n_disable nvram */ n_disabled = getintvar(pub->vars, "11n_disable"); - /* register a module (to handle iovars) */ - wlc_module_register(wlc->pub, wlc_iovars, "wlc_iovars", wlc, - wlc_doiovar, NULL, NULL); - /* * low level attach steps(all hw accesses go * inside, no more in rest of the attach) @@ -1774,9 +1746,6 @@ uint wlc_detach(struct wlc_info *wlc) wlc->dumpcb_head = NULL; } - /* Detach from iovar manager */ - wlc_module_unregister(wlc->pub, "wlc_iovars", wlc); - while (wlc->tx_queues != NULL) wlc_txq_free(wlc, wlc->tx_queues); @@ -2819,48 +2788,11 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, return bcmerror; } -/* Look up the given var name in the given table */ -static const bcm_iovar_t *wlc_iovar_lookup(const bcm_iovar_t *table, - const char *name) -{ - const bcm_iovar_t *vi; - const char *lookup_name; - - /* skip any ':' delimited option prefixes */ - lookup_name = strrchr(name, ':'); - if (lookup_name != NULL) - lookup_name++; - else - lookup_name = name; - - for (vi = table; vi->name; vi++) { - if (!strcmp(vi->name, lookup_name)) - return vi; - } - /* ran to end of table */ - - return NULL; /* var name not found */ -} - -int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg) -{ - return wlc_iovar_op(wlc, name, NULL, 0, arg, sizeof(s32), IOV_GET, - NULL); -} - -int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg) -{ - return wlc_iovar_op(wlc, name, NULL, 0, (void *)&arg, sizeof(arg), - IOV_SET, NULL); -} - /* - * register iovar table, watchdog and down handlers. - * calling function must keep 'iovars' until wlc_module_unregister is called. - * 'iovar' must have the last entry's name field being NULL as terminator. + * register watchdog and down handlers. */ -int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, - const char *name, void *hdl, iovar_fn_t i_fn, +int wlc_module_register(struct wlc_pub *pub, + const char *name, void *hdl, watchdog_fn_t w_fn, down_fn_t d_fn) { struct wlc_info *wlc = (struct wlc_info *) pub->wlc; @@ -2871,9 +2803,7 @@ int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, if (wlc->modulecb[i].name[0] == '\0') { strncpy(wlc->modulecb[i].name, name, sizeof(wlc->modulecb[i].name) - 1); - wlc->modulecb[i].iovars = iovars; wlc->modulecb[i].hdl = hdl; - wlc->modulecb[i].iovar_fn = i_fn; wlc->modulecb[i].watchdog_fn = w_fn; wlc->modulecb[i].down_fn = d_fn; return 0; @@ -2918,295 +2848,6 @@ static void wlc_wme_retries_write(struct wlc_info *wlc) } } -/* Get or set an iovar. The params/p_len pair specifies any additional - * qualifying parameters (e.g. an "element index") for a get, while the - * arg/len pair is the buffer for the value to be set or retrieved. - * Operation (get/set) is specified by the last argument. - * interface context provided by wlcif - * - * All pointers may point into the same buffer. - */ -int -wlc_iovar_op(struct wlc_info *wlc, const char *name, - void *params, int p_len, void *arg, int len, - bool set, struct wlc_if *wlcif) -{ - int err = 0; - int val_size; - const bcm_iovar_t *vi = NULL; - u32 actionid; - int i; - - if (!set && (len == sizeof(int)) && - !(IS_ALIGNED((unsigned long)(arg), (uint) sizeof(int)))) { - wiphy_err(wlc->wiphy, "wl%d: %s unaligned get ptr for %s\n", - wlc->pub->unit, __func__, name); - return -ENOTSUPP; - } - - /* find the given iovar name */ - for (i = 0; i < WLC_MAXMODULES; i++) { - if (!wlc->modulecb[i].iovars) - continue; - vi = wlc_iovar_lookup(wlc->modulecb[i].iovars, name); - if (vi) - break; - } - /* iovar name not found */ - if (i >= WLC_MAXMODULES) { - return -ENOTSUPP; - } - - /* set up 'params' pointer in case this is a set command so that - * the convenience int and bool code can be common to set and get - */ - if (params == NULL) { - params = arg; - p_len = len; - } - - if (vi->type == IOVT_VOID) - val_size = 0; - else if (vi->type == IOVT_BUFFER) - val_size = len; - else - /* all other types are integer sized */ - val_size = sizeof(int); - - actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); - - /* Do the actual parameter implementation */ - err = wlc->modulecb[i].iovar_fn(wlc->modulecb[i].hdl, vi, actionid, - name, params, p_len, arg, len, val_size, - wlcif); - return err; -} - -int -wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi, void *arg, int len, - bool set) -{ - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; - int err = 0; - s32 int_val = 0; - - /* check generic condition flags */ - if (set) { - if (((vi->flags & IOVF_SET_DOWN) && wlc->pub->up) || - ((vi->flags & IOVF_SET_UP) && !wlc->pub->up)) { - err = (wlc->pub->up ? -EISCONN : -ENOLINK); - } else if ((vi->flags & IOVF_SET_BAND) - && IS_MBAND_UNLOCKED(wlc)) { - err = -ENOMEDIUM; - } else if ((vi->flags & IOVF_SET_CLK) && !wlc->clk) { - err = -EIO; - } - } else { - if (((vi->flags & IOVF_GET_DOWN) && wlc->pub->up) || - ((vi->flags & IOVF_GET_UP) && !wlc->pub->up)) { - err = (wlc->pub->up ? -EISCONN : -ENOLINK); - } else if ((vi->flags & IOVF_GET_BAND) - && IS_MBAND_UNLOCKED(wlc)) { - err = -ENOMEDIUM; - } else if ((vi->flags & IOVF_GET_CLK) && !wlc->clk) { - err = -EIO; - } - } - - if (err) - goto exit; - - /* length check on io buf */ - err = bcm_iovar_lencheck(vi, arg, len, set); - if (err) - goto exit; - - /* On set, check value ranges for integer types */ - if (set) { - switch (vi->type) { - case IOVT_BOOL: - case IOVT_INT8: - case IOVT_INT16: - case IOVT_INT32: - case IOVT_UINT8: - case IOVT_UINT16: - case IOVT_UINT32: - memcpy(&int_val, arg, sizeof(int)); - err = wlc_iovar_rangecheck(wlc, int_val, vi); - break; - } - } - exit: - return err; -} - -/* handler for iovar table wlc_iovars */ -/* - * IMPLEMENTATION NOTE: In order to avoid checking for get/set in each - * iovar case, the switch statement maps the iovar id into separate get - * and set values. If you add a new iovar to the switch you MUST use - * IOV_GVAL and/or IOV_SVAL in the case labels to avoid conflict with - * another case. - * Please use params for additional qualifying parameters. - */ -int -wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid, - const char *name, void *params, uint p_len, void *arg, int len, - int val_size, struct wlc_if *wlcif) -{ - struct wlc_info *wlc = hdl; - struct wlc_bsscfg *bsscfg; - int err = 0; - s32 int_val = 0; - s32 int_val2 = 0; - s32 *ret_int_ptr; - bool bool_val; - bool bool_val2; - wlc_bss_info_t *current_bss; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - bsscfg = NULL; - current_bss = NULL; - - err = wlc_iovar_check(wlc->pub, vi, arg, len, IOV_ISSET(actionid)); - if (err != 0) - return err; - - /* convenience int and bool vals for first 8 bytes of buffer */ - if (p_len >= (int)sizeof(int_val)) - memcpy(&int_val, params, sizeof(int_val)); - - if (p_len >= (int)sizeof(int_val) * 2) - memcpy(&int_val2, - (void *)((unsigned long)params + sizeof(int_val)), - sizeof(int_val)); - - /* convenience int ptr for 4-byte gets (requires int aligned arg) */ - ret_int_ptr = (s32 *) arg; - - bool_val = (int_val != 0) ? true : false; - bool_val2 = (int_val2 != 0) ? true : false; - - BCMMSG(wlc->wiphy, "wl%d: id %d\n", wlc->pub->unit, IOV_ID(actionid)); - /* Do the actual parameter implementation */ - switch (actionid) { - case IOV_SVAL(IOV_RTSTHRESH): - wlc->RTSThresh = int_val; - break; - - case IOV_GVAL(IOV_QTXPOWER):{ - uint qdbm; - bool override; - - err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, - &override); - if (err != 0) - return err; - - /* Return qdbm units */ - *ret_int_ptr = - qdbm | (override ? WL_TXPWR_OVERRIDE : 0); - break; - } - - /* As long as override is false, this only sets the *user* targets. - User can twiddle this all he wants with no harm. - wlc_phy_txpower_set() explicitly sets override to false if - not internal or test. - */ - case IOV_SVAL(IOV_QTXPOWER):{ - u8 qdbm; - bool override; - - /* Remove override bit and clip to max qdbm value */ - qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); - /* Extract override setting */ - override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; - err = - wlc_phy_txpower_set(wlc->band->pi, qdbm, override); - break; - } - - case IOV_GVAL(IOV_MPC): - *ret_int_ptr = (s32) wlc->mpc; - break; - - case IOV_SVAL(IOV_MPC): - wlc->mpc = bool_val; - wlc_radio_mpc_upd(wlc); - - break; - - case IOV_GVAL(IOV_BCN_LI_BCN): - *ret_int_ptr = wlc->bcn_li_bcn; - break; - - case IOV_SVAL(IOV_BCN_LI_BCN): - wlc->bcn_li_bcn = (u8) int_val; - if (wlc->pub->up) - wlc_bcn_li_upd(wlc); - break; - - default: - wiphy_err(wlc->wiphy, "wl%d: %s: unsupported\n", - wlc->pub->unit, __func__); - err = -ENOTSUPP; - break; - } - - goto exit; /* avoid unused label warning */ - - exit: - return err; -} - -static int -wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val, const bcm_iovar_t *vi) -{ - int err = 0; - u32 min_val = 0; - u32 max_val = 0; - - /* Only ranged integers are checked */ - switch (vi->type) { - case IOVT_INT32: - max_val |= 0x7fffffff; - /* fall through */ - case IOVT_INT16: - max_val |= 0x00007fff; - /* fall through */ - case IOVT_INT8: - max_val |= 0x0000007f; - min_val = ~max_val; - if (vi->flags & IOVF_NTRL) - min_val = 1; - else if (vi->flags & IOVF_WHL) - min_val = 0; - /* Signed values are checked against max_val and min_val */ - if ((s32) val < (s32) min_val - || (s32) val > (s32) max_val) - err = -EINVAL; - break; - - case IOVT_UINT32: - max_val |= 0xffffffff; - /* fall through */ - case IOVT_UINT16: - max_val |= 0x0000ffff; - /* fall through */ - case IOVT_UINT8: - max_val |= 0x000000ff; - if (vi->flags & IOVF_NTRL) - min_val = 1; - if ((val < min_val) || (val > max_val)) - err = -EINVAL; - break; - } - - return err; -} - #ifdef BCMDBG static const char *supr_reason[] = { "None", "PMQ Entry", "Flush request", @@ -6353,3 +5994,71 @@ void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) wl_msleep(wlc->wl, 1); } } + +int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int int_val) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + wlc->bcn_li_bcn = (u8) int_val; + if (wlc->pub->up) + wlc_bcn_li_upd(wlc); + break; + /* As long as override is false, this only sets the *user* + targets. User can twiddle this all he wants with no harm. + wlc_phy_txpower_set() explicitly sets override to false if + not internal or test. + */ + case IOV_QTXPOWER:{ + u8 qdbm; + bool override; + + /* Remove override bit and clip to max qdbm value */ + qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); + /* Extract override setting */ + override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; + err = + wlc_phy_txpower_set(wlc->band->pi, qdbm, override); + break; + } + case IOV_MPC: + wlc->mpc = (bool)int_val; + wlc_radio_mpc_upd(wlc); + break; + default: + err = -ENOTSUPP; + } + return err; +} + +int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + *ret_int_ptr = wlc->bcn_li_bcn; + break; + case IOV_QTXPOWER: { + uint qdbm; + bool override; + + err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, + &override); + if (err != 0) + return err; + + /* Return qdbm units */ + *ret_int_ptr = + qdbm | (override ? WL_TXPWR_OVERRIDE : 0); + break; + } + case IOV_MPC: + *ret_int_ptr = (s32) wlc->mpc; + break; + default: + err = -ENOTSUPP; + } + return err; +} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 0bb3784..193f73a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -898,12 +898,6 @@ extern void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec); extern bool wlc_timers_init(struct wlc_info *wlc, int unit); -extern const bcm_iovar_t wlc_iovars[]; - -extern int wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid, - const char *name, void *params, uint p_len, void *arg, - int len, int val_size, struct wlc_if *wlcif); - #if defined(BCMDBG) extern void wlc_print_ies(struct wlc_info *wlc, u8 *ies, uint ies_len); #endif diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 88b0967..b3a79ab 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -370,6 +370,13 @@ typedef struct wl_rxsts { #define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */ #define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */ +enum wlc_par_id { + IOV_MPC = 1, + IOV_RTSTHRESH, + IOV_QTXPOWER, + IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */ +}; + /* forward declare and use the struct notation so we don't have to * have it defined if not necessary. */ @@ -492,8 +499,6 @@ extern uint wlc_down(struct wlc_info *wlc); extern int wlc_set(struct wlc_info *wlc, int cmd, int arg); extern int wlc_get(struct wlc_info *wlc, int cmd, int *arg); -extern int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg); -extern int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg); extern bool wlc_chipmatch(u16 vendor, u16 device); extern void wlc_init(struct wlc_info *wlc); extern void wlc_reset(struct wlc_info *wlc); @@ -506,9 +511,6 @@ extern bool wlc_isr(struct wlc_info *wlc, bool *wantdpc); extern bool wlc_dpc(struct wlc_info *wlc, bool bounded); extern bool wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, struct ieee80211_hw *hw); -extern int wlc_iovar_op(struct wlc_info *wlc, const char *name, void *params, - int p_len, void *arg, int len, bool set, - struct wlc_if *wlcif); extern int wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, struct wlc_if *wlcif); extern bool wlc_aggregatable(struct wlc_info *wlc, u8 tid); @@ -534,18 +536,15 @@ extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs); struct ieee80211_sta; extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta, u16 tid); +int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val); +int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr); /* wlc_phy.c helper functions */ extern void wlc_set_ps_ctrl(struct wlc_info *wlc); extern void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val); -/* ioctl */ -extern int wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi, - void *arg, - int len, bool set); - -extern int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, - const char *name, void *hdl, iovar_fn_t iovar_fn, +extern int wlc_module_register(struct wlc_pub *pub, + const char *name, void *hdl, watchdog_fn_t watchdog_fn, down_fn_t down_fn); extern int wlc_module_unregister(struct wlc_pub *pub, const char *name, void *hdl); -- cgit v0.10.2 From 9fa341e5f57b8dda0d20e531b8767e767531ccea Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:44:48 +0200 Subject: staging: brcm80211: cleanup struct wl_info removed unused field piomode from struct wl_info definition. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 3deb903..f951f22 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -739,7 +739,6 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, { struct wl_info *wl = NULL; int unit, err; - unsigned long base_addr; struct ieee80211_hw *hw; u8 perm[ETH_ALEN]; @@ -768,9 +767,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, base_addr = regs; - if (bustype == PCI_BUS) { - wl->piomode = false; - } else if (bustype == RPC_BUS) { + if (bustype == PCI_BUS || bustype == RPC_BUS) { /* Do nothing */ } else { bustype = PCI_BUS; @@ -796,7 +793,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, } /* common load-time initialization */ - wl->wlc = wlc_attach((void *)wl, vendor, device, unit, wl->piomode, + wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, wl->regsva, wl->bcm_bustype, btparam, &err); wl_release_fw(wl); if (!wl->wlc) { diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h index e703d8b..c878690 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h @@ -57,11 +57,15 @@ struct wl_info { spinlock_t lock; /* per-device perimeter lock */ spinlock_t isr_lock; /* per-device ISR synchronization lock */ + + /* bus type and regsva for unmap in wl_free() */ uint bcm_bustype; /* bus type */ - bool piomode; /* set from insmod argument */ void *regsva; /* opaque chip registers virtual address */ + + /* timer related fields */ atomic_t callbacks; /* # outstanding callback functions */ struct wl_timer *timers; /* timer cleanup queue */ + struct tasklet_struct tasklet; /* dpc tasklet */ bool resched; /* dpc needs to be and is rescheduled */ #ifdef LINUXSTA_PS -- cgit v0.10.2 From 63d7c94c4bfbc28a9d860712cbdd33aa31db52b7 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:44:49 +0200 Subject: staging: brcm80211: removed unused timeout fields in wlc_protection The structure definition wlc_protection contained a numbers of timeout fields that were not used in the driver. These have been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 193f73a..4d45972 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -208,19 +208,6 @@ struct wlc_protection { s8 nongf_override; /* override for use of GF protection */ s8 n_pam_override; /* override for preamble: MM or GF */ bool n_obss; /* indicated OBSS Non-HT STA present */ - - uint longpre_detect_timeout; /* #sec until long preamble bcns gone */ - uint barker_detect_timeout; /* #sec until bcns signaling Barker long preamble */ - /* only is gone */ - uint ofdm_ibss_timeout; /* #sec until ofdm IBSS beacons gone */ - uint ofdm_ovlp_timeout; /* #sec until ofdm overlapping BSS bcns gone */ - uint nonerp_ibss_timeout; /* #sec until nonerp IBSS beacons gone */ - uint nonerp_ovlp_timeout; /* #sec until nonerp overlapping BSS bcns gone */ - uint g_ibss_timeout; /* #sec until bcns signaling Use_Protection gone */ - uint n_ibss_timeout; /* #sec until bcns signaling Use_OFDM_Protection gone */ - uint ht20in40_ovlp_timeout; /* #sec until 20MHz overlapping OPMODE gone */ - uint ht20in40_ibss_timeout; /* #sec until 20MHz-only HT station bcns gone */ - uint non_gf_ibss_timeout; /* #sec until non-GF bcns gone */ }; /* anything affects the single/dual streams/antenna operation */ -- cgit v0.10.2 From e63ee4da21befa768e21c0581670d8a044a79569 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:44:50 +0200 Subject: staging: brcm80211: remove WLC_WATCHDOG_TBTT macro The expanded macro expression will always be false so it has been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index c078ea0..56ea77f 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -100,10 +100,6 @@ * calibration and scb update */ -/* watchdog trigger mode: OSL timer or TBTT */ -#define WLC_WATCHDOG_TBTT(wlc) \ - (wlc->stas_associated > 0 && wlc->PM != PM_OFF && wlc->pub->align_wd_tbtt) - /* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */ #define BCMCFID(wlc, fid) wlc_bmac_write_shm((wlc)->hw, M_BCMC_FID, (fid)) @@ -1945,14 +1941,7 @@ bool wlc_radio_monitor_stop(struct wlc_info *wlc) static void wlc_watchdog_by_timer(void *arg) { - struct wlc_info *wlc = (struct wlc_info *) arg; wlc_watchdog(arg); - if (WLC_WATCHDOG_TBTT(wlc)) { - /* set to normal osl watchdog period */ - wl_del_timer(wlc->wl, wlc->wdtimer); - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, - true); - } } /* common watchdog code */ @@ -4281,29 +4270,6 @@ void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) { struct wlc_bsscfg *cfg = wlc->cfg; - if (BSSCFG_STA(cfg)) { - /* run watchdog here if the watchdog timer is not armed */ - if (WLC_WATCHDOG_TBTT(wlc)) { - u32 cur, delta; - if (wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - } - - cur = OSL_SYSUPTIME(); - delta = cur > wlc->WDlast ? cur - wlc->WDlast : - (u32) ~0 - wlc->WDlast + cur + 1; - if (delta >= TIMER_INTERVAL_WATCHDOG) { - wlc_watchdog((void *)wlc); - wlc->WDlast = cur; - } - - wl_add_timer(wlc->wl, wlc->wdtimer, - wlc_watchdog_backup_bi(wlc), true); - wlc->WDarmed = true; - } - } - if (!cfg->BSS) { /* DirFrmQ is now valid...defer setting until end of ATIM window */ wlc->qvalid |= MCMD_DIRFRMQVAL; -- cgit v0.10.2 From 5dc168747b4eed2795ac3b1555e4fd2d09f2a970 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:44:51 +0200 Subject: staging: brcm80211: cleanup struct wlc_info definition The structure definition for wlc_info contained a lot of fields that are only initialized or not used at all. These have been removed to cleanup the driver code. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 82c64cd..3c4b2c0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -152,8 +152,6 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) goto fail; } - wlc->hwrxoff = WL_HWRXOFF; - /* allocate struct wlc_pub state structure */ wlc->pub = wlc_pub_malloc(unit, err, devid); if (wlc->pub == NULL) { @@ -206,14 +204,6 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) } wlc_bsscfg_ID_assign(wlc, wlc->cfg); - wlc->pkt_callback = kzalloc(sizeof(struct pkt_cb) * - (wlc->pub->tunables->maxpktcb + 1), - GFP_ATOMIC); - if (wlc->pkt_callback == NULL) { - *err = 1013; - goto fail; - } - wlc->wsec_def_keys[0] = kzalloc(sizeof(wsec_key_t) * WLC_DEFAULT_KEYS, GFP_ATOMIC); if (wlc->wsec_def_keys[0] == NULL) { @@ -284,7 +274,6 @@ void wlc_detach_mfree(struct wlc_info *wlc) wlc_pub_mfree(wlc->pub); kfree(wlc->modulecb); kfree(wlc->default_bss); - kfree(wlc->pkt_callback); kfree(wlc->wsec_def_keys[0]); kfree(wlc->protection); kfree(wlc->stf); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 85ad700..75343ab 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -499,10 +499,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, wlc_ampdu_agg(ampdu, scb, p, tid); - if (wlc->block_datafifo) { - wiphy_err(wiphy, "%s: Fifo blocked\n", __func__); - return -EBUSY; - } rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; ampdu_len = 0; dma_len = 0; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 4534926..9ef7707 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -333,7 +333,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) /* BCN template is available */ /* ZZZ: Use AP_ACTIVE ? */ - if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub) || wlc->aps_associated) + if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) && (macintstatus & MI_BCNTPL)) { wlc_update_beacon(wlc); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 56ea77f..33045d5 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -294,14 +294,12 @@ bool wlc_ps_allowed(struct wlc_info *wlc) struct wlc_bsscfg *cfg; /* disallow PS when one of the following global conditions meets */ - if (!wlc->pub->associated || !wlc->PMenabled || wlc->PM_override) + if (!wlc->pub->associated) return false; /* disallow PS when one of these meets when not scanning */ - if (!wlc->PMblocked) { - if (AP_ACTIVE(wlc) || wlc->monitor) - return false; - } + if (AP_ACTIVE(wlc) || wlc->monitor) + return false; FOREACH_AS_STA(wlc, idx, cfg) { /* disallow PS when one of the following bsscfg specific conditions meets */ @@ -319,8 +317,6 @@ void wlc_reset(struct wlc_info *wlc) { BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - wlc->check_for_unaligned_tbtt = false; - /* slurp up hw mac counters before core reset */ wlc_statsupd(wlc); @@ -329,8 +325,6 @@ void wlc_reset(struct wlc_info *wlc) sizeof(macstat_t)); wlc_bmac_reset(wlc->hw); - wlc->txretried = 0; - } void wlc_fatal_error(struct wlc_info *wlc) @@ -386,15 +380,8 @@ void wlc_init(struct wlc_info *wlc) wlc_bmac_init(wlc->hw, chanspec, mute); - wlc->seckeys = wlc_bmac_read_shm(wlc->hw, M_SECRXKEYS_PTR) * 2; - if (wlc->machwcap & MCAP_TKIPMIC) - wlc->tkmickeys = - wlc_bmac_read_shm(wlc->hw, M_TKMICKEYS_PTR) * 2; - /* update beacon listen interval */ wlc_bcn_li_upd(wlc); - wlc->bcn_wait_prd = - (u8) (wlc_bmac_read_shm(wlc->hw, M_NOSLPZNATDTIM) >> 10); /* the world is new again, so is our reported rate */ wlc_reprate_init(wlc); @@ -521,7 +508,7 @@ void wlc_mac_promisc(struct wlc_info *wlc) * Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit * since all BSS data traffic is directed at the AP */ - if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub) && !wlc->wet) + if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub)) promisc_bits |= MCTL_PROMISC; /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL @@ -987,7 +974,6 @@ static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit) return; /* wait for at least one beacon before entering sleeping state */ - wlc->PMawakebcn = true; FOREACH_AS_STA(wlc, idx, cfg) cfg->PMawakebcn = true; wlc_set_ps_ctrl(wlc); @@ -1035,8 +1021,6 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, return; } - wlc->wme_admctl = 0; - do { memset((char *)&acp_shm, 0, sizeof(shm_acparams_t)); /* fill in shm ac params struct */ @@ -1108,10 +1092,6 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) { /* find out which ac this set of params applies to */ aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT; - /* set the admission control policy for this AC */ - if (edcf_acp->ACI & EDCF_ACM_MASK) { - wlc->wme_admctl |= 1 << aci; - } /* fill in shm ac params struct */ params->txop = edcf_acp->TXOP; @@ -1172,25 +1152,13 @@ void wlc_info_init(struct wlc_info *wlc, int unit) /* Assume the device is there until proven otherwise */ wlc->device_present = true; - /* set default power output percentage to 100 percent */ - wlc->txpwr_percent = 100; - /* Save our copy of the chanspec */ wlc->chanspec = CH20MHZ_CHSPEC(1); - /* initialize CCK preamble mode to unassociated state */ - wlc->shortpreamble = false; - - wlc->legacy_probe = true; - /* various 802.11g modes */ wlc->shortslot = false; wlc->shortslot_override = WLC_SHORTSLOT_AUTO; - wlc->barker_overlap_control = true; - wlc->barker_preamble = WLC_BARKER_SHORT_ALLOWED; - wlc->txburst_limit_override = AUTO; - wlc_protection_upd(wlc, WLC_PROT_G_OVR, WLC_PROTECTION_AUTO); wlc_protection_upd(wlc, WLC_PROT_G_SPEC, false); @@ -1223,30 +1191,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->SRL = RETRY_SHORT_DEF; wlc->LRL = RETRY_LONG_DEF; - /* init PM state */ - wlc->PM = PM_OFF; /* User's setting of PM mode through IOCTL */ - wlc->PM_override = false; /* Prevents from going to PM if our AP is 'ill' */ - wlc->PMenabled = false; /* Current PM state */ - wlc->PMpending = false; /* Tracks whether STA indicated PM in the last attempt */ - wlc->PMblocked = false; /* To allow blocking going into PM during RM and scans */ - - /* In WMM Auto mode, PM is allowed if association is a UAPSD association */ - wlc->WME_PM_blocked = false; - - /* Init wme queuing method */ - wlc->wme_prec_queuing = false; - - /* Overrides for the core to stay awake under zillion conditions Look for STAY_AWAKE */ - wlc->wake = false; - /* Are we waiting for a response to PS-Poll that we sent */ - wlc->PSpoll = false; - - /* APSD defaults */ - wlc->wme_apsd = true; - wlc->apsd_sta_usp = false; - wlc->apsd_trigger_timeout = 0; /* disable the trigger timer */ - wlc->apsd_trigger_ac = AC_BITMAP_ALL; - /* Set flag to indicate that hw keys should be used when available. */ wlc->wsec_swkeys = false; @@ -1256,8 +1200,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->wsec_keys[i]->idx = (u8) i; } - wlc->_regulatory_domain = false; /* 802.11d */ - /* WME QoS mode is Auto by default */ wlc->pub->_wme = AUTO; @@ -1267,14 +1209,10 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->pub->_ampdu = AMPDU_AGG_HOST; wlc->pub->bcmerror = 0; - wlc->ibss_allowed = true; - wlc->ibss_coalesce_allowed = true; wlc->pub->_coex = ON; /* initialize mpc delay */ wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; - - wlc->pr80838_war = true; } static bool wlc_state_bmac_sync(struct wlc_info *wlc) @@ -1358,11 +1296,8 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->core = wlc->corestate; wlc->wl = wl; pub->unit = unit; - wlc->btparam = btparam; pub->_piomode = piomode; wlc->bandinit_pending = false; - /* By default restrict TKIP associations from 11n STA's */ - wlc->ht_wsec_restriction = WLC_HT_TKIP_RESTRICT; /* populate struct wlc_info with default values */ wlc_info_init(wlc, unit); @@ -1527,9 +1462,6 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->cck_40txbw = AUTO; wlc_update_mimo_band_bwcap(wlc, WLC_N_BW_20IN2G_40IN5G); - /* Enable setting the RIFS Mode bit by default in HT Info IE */ - wlc->rifs_advert = AUTO; - /* Set default values of SGI */ if (WLC_SGI_CAP_PHY(wlc)) { wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); @@ -1722,25 +1654,6 @@ uint wlc_detach(struct wlc_info *wlc) wlc_detach_module(wlc); - /* free other state */ - - -#ifdef BCMDBG - kfree(wlc->country_ie_override); - wlc->country_ie_override = NULL; -#endif /* BCMDBG */ - - { - /* free dumpcb list */ - struct dumpcb_s *prev, *ptr; - prev = ptr = wlc->dumpcb_head; - while (ptr) { - ptr = prev->next; - kfree(prev); - prev = ptr; - } - wlc->dumpcb_head = NULL; - } while (wlc->tx_queues != NULL) wlc_txq_free(wlc, wlc->tx_queues); @@ -1757,9 +1670,6 @@ void wlc_ap_upd(struct wlc_info *wlc) else wlc->PLCPHdr_override = WLC_PLCP_SHORT; /* STA-BSS; short capable */ - /* disable vlan_mode on AP since some legacy STAs cannot rx tagged pkts */ - wlc->vlan_mode = AP_ENAB(wlc->pub) ? OFF : AUTO; - /* fixup mpc */ wlc->mpc = true; } @@ -1892,9 +1802,7 @@ static void wlc_radio_enable(struct wlc_info *wlc) if (DEVICEREMOVED(wlc)) return; - if (!wlc->down_override) { /* imposed by wl down/out ioctl */ - wl_up(wlc->wl); - } + wl_up(wlc->wl); } /* periodical query hw radio button while driver is "down" */ @@ -2230,7 +2138,6 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) s8 shortslot = WLC_SHORTSLOT_AUTO; /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ bool shortslot_restrict = false; /* Restrict association to stations that support shortslot */ - bool ignore_bcns = true; /* Ignore legacy beacons on the same channel */ bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ int preamble = WLC_PLCP_LONG; /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ bool preamble_restrict = false; /* Restrict association to stations that support short @@ -2326,8 +2233,6 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) band->gmode = gmode; - wlc->ignore_bcns = ignore_bcns; - wlc->shortslot_override = shortslot; if (AP_ENAB(wlc->pub)) { @@ -4418,7 +4323,6 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) if (lastframe) { p->next = NULL; p->prev = NULL; - wlc->txretried = 0; /* remove PLCP & Broadcom tx descriptor header */ skb_pull(p, D11_PHY_HDR_LEN); skb_pull(p, D11_TXH_LEN); @@ -4448,15 +4352,9 @@ wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend) /* There is more room; mark precedences related to this FIFO sendable */ WLC_TX_FIFO_ENAB(wlc, fifo); - if (!TXPKTPENDTOT(wlc)) { - if (wlc->block_datafifo & DATA_BLOCK_TX_SUPR) - wlc_bsscfg_tx_check(wlc); - } - /* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */ if (AP_ENAB(wlc->pub) && - wlc->bcmcfifo_drain && !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { - wlc->bcmcfifo_drain = false; + !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { wlc_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, WLC_BAND_AUTO); } @@ -4662,7 +4560,7 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) rxh = (d11rxhdr_t *) (p->data); /* strip off rxhdr */ - skb_pull(p, wlc->hwrxoff); + skb_pull(p, WL_HWRXOFF); /* fixup rx header endianness */ rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize); @@ -5174,8 +5072,6 @@ static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap) band->mimo_cap_40 = false; } } - - wlc->mimo_band_bwcap = bwcap; } void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) @@ -5848,12 +5744,15 @@ static void wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on, int prio) { +#ifdef NON_FUNCTIONAL + /* wlcif_list is never filled so this function is not functional */ struct wlc_if *wlcif; for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED) wl_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); } +#endif } static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 4d45972..edbf3d2 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -515,8 +515,6 @@ struct wlc_info { struct antsel_info *asi; /* antsel module handler */ wlc_cm_info_t *cmi; /* channel manager module handler */ - void *btparam; /* bus type specific cookie */ - uint vars_size; /* size of vars, free vars on detach */ u16 vendorid; /* PCI vendor id */ @@ -531,7 +529,6 @@ struct wlc_info { bool bandinit_pending; /* track band init in auto band */ bool radio_monitor; /* radio timer is running */ - bool down_override; /* true=down */ bool going_down; /* down path intermediate variable */ bool mpc; /* enable minimum power consumption */ @@ -542,14 +539,7 @@ struct wlc_info { /* timer */ struct wl_timer *wdtimer; /* timer for watchdog routine */ - uint fast_timer; /* Periodic timeout for 'fast' timer */ - uint slow_timer; /* Periodic timeout for 'slow' timer */ - uint glacial_timer; /* Periodic timeout for 'glacial' timer */ - uint phycal_mlo; /* last time measurelow calibration was done */ - uint phycal_txpower; /* last time txpower calibration was done */ - struct wl_timer *radio_timer; /* timer for hw radio button monitor routine */ - struct wl_timer *pspoll_timer; /* periodic pspoll timer */ /* promiscuous */ bool monitor; /* monitor (MPDU sniffing) mode */ @@ -557,30 +547,11 @@ struct wlc_info { bool bcnmisc_scan; /* bcns promisc mode override for scan */ bool bcnmisc_monitor; /* bcns promisc mode override for monitor */ - u8 bcn_wait_prd; /* max waiting period (for beacon) in 1024TU */ - /* driver feature */ bool _rifs; /* enable per-packet rifs */ - s32 rifs_advert; /* RIFS mode advertisement */ s8 sgi_tx; /* sgi tx */ - bool wet; /* true if wireless ethernet bridging mode */ /* AP-STA synchronization, power save */ - bool check_for_unaligned_tbtt; /* check unaligned tbtt flag */ - bool PM_override; /* no power-save flag, override PM(user input) */ - bool PMenabled; /* current power-management state (CAM or PS) */ - bool PMpending; /* waiting for tx status with PM indicated set */ - bool PMblocked; /* block any PSPolling in PS mode, used to buffer - * AP traffic, also used to indicate in progress - * of scan, rm, etc. off home channel activity. - */ - bool PSpoll; /* whether there is an outstanding PS-Poll frame */ - u8 PM; /* power-management mode (CAM, PS or FASTPS) */ - bool PMawakebcn; /* bcn recvd during current waking state */ - - bool WME_PM_blocked; /* Can STA go to PM when in WME Auto mode */ - bool wake; /* host-specified PS-mode sleep state */ - u8 pspoll_prd; /* pspoll interval in milliseconds */ u8 bcn_li_bcn; /* beacon listen interval in # beacons */ u8 bcn_li_dtim; /* beacon listen interval in # dtims */ @@ -589,18 +560,14 @@ struct wlc_info { /* WME */ ac_bitmap_t wme_dp; /* Discard (oldest first) policy per AC */ - bool wme_apsd; /* enable Advanced Power Save Delivery */ - ac_bitmap_t wme_admctl; /* bit i set if AC i under admission control */ u16 edcf_txop[AC_COUNT]; /* current txop for each ac */ wme_param_ie_t wme_param_ie; /* WME parameter info element, which on STA * contains parameters in use locally, and on * AP contains parameters advertised to STA * in beacons and assoc responses. */ - bool wme_prec_queuing; /* enable/disable non-wme STA prec queuing */ u16 wme_retries[AC_COUNT]; /* per-AC retry limits */ - int vlan_mode; /* OK to use 802.1Q Tags (ON, OFF, AUTO) */ u16 tx_prec_map; /* Precedence map based on HW FIFO space */ u16 fifo2prec_map[NFIFO]; /* pointer to fifo2_prec map based on WME */ @@ -610,10 +577,6 @@ struct wlc_info { */ struct wlc_bsscfg *bsscfg[WLC_MAXBSSCFG]; struct wlc_bsscfg *cfg; /* the primary bsscfg (can be AP or STA) */ - u8 stas_associated; /* count of ASSOCIATED STA bsscfgs */ - u8 aps_associated; /* count of UP AP bsscfgs */ - u8 block_datafifo; /* prohibit posting frames to data fifos */ - bool bcmcfifo_drain; /* TX_BCMC_FIFO is set to drain */ /* tx queue */ struct wlc_txq_info *tx_queues; /* common TX Queue list */ @@ -625,43 +588,24 @@ struct wlc_info { * treated as sw keys (used for debugging) */ struct modulecb *modulecb; - struct dumpcb_s *dumpcb_head; u8 mimoft; /* SIGN or 11N */ - u8 mimo_band_bwcap; /* bw cap per band type */ - s8 txburst_limit_override; /* tx burst limit override */ - u16 txburst_limit; /* tx burst limit value */ s8 cck_40txbw; /* 11N, cck tx b/w override when in 40MHZ mode */ s8 ofdm_40txbw; /* 11N, ofdm tx b/w override when in 40MHZ mode */ s8 mimo_40txbw; /* 11N, mimo tx b/w override when in 40MHZ mode */ /* HT CAP IE being advertised by this node: */ struct ieee80211_ht_cap ht_cap; - uint seckeys; /* 54 key table shm address */ - uint tkmickeys; /* 12 TKIP MIC key table shm address */ - wlc_bss_info_t *default_bss; /* configured BSS parameters */ - u16 AID; /* association ID */ - u16 counter; /* per-sdu monotonically increasing counter */ u16 mc_fid_counter; /* BC/MC FIFO frame ID counter */ - bool ibss_allowed; /* false, all IBSS will be ignored during a scan - * and the driver will not allow the creation of - * an IBSS network - */ - bool ibss_coalesce_allowed; - char country_default[WLC_CNTRY_BUF_SZ]; /* saved country for leaving 802.11d * auto-country mode */ char autocountry_default[WLC_CNTRY_BUF_SZ]; /* initial country for 802.11d * auto-country mode */ -#ifdef BCMDBG - bcm_tlv_t *country_ie_override; /* debug override of announced Country IE */ -#endif - u16 prb_resp_timeout; /* do not send prb resp if request older than this, * 0 = disable */ @@ -683,44 +627,17 @@ struct wlc_info { u16 LFBL; /* Long Frame Rate Fallback Limit */ /* network config */ - bool shortpreamble; /* currently operating with CCK ShortPreambles */ bool shortslot; /* currently using 11g ShortSlot timing */ - s8 barker_preamble; /* current Barker Preamble Mode */ s8 shortslot_override; /* 11g ShortSlot override */ bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */ - bool barker_overlap_control; /* true: be aware of overlapping BSSs for barker */ - bool ignore_bcns; /* override: ignore non shortslot bcns in a 11g network */ - bool legacy_probe; /* restricts probe requests to CCK rates */ struct wlc_protection *protection; s8 PLCPHdr_override; /* 802.11b Preamble Type override */ struct wlc_stf *stf; - struct pkt_cb *pkt_callback; /* tx completion callback handlers */ - - u32 txretried; /* tx retried number in one msdu */ - ratespec_t bcn_rspec; /* save bcn ratespec purpose */ - bool apsd_sta_usp; /* Unscheduled Service Period in progress on STA */ - struct wl_timer *apsd_trigger_timer; /* timer for wme apsd trigger frames */ - u32 apsd_trigger_timeout; /* timeout value for apsd_trigger_timer (in ms) - * 0 == disable - */ - ac_bitmap_t apsd_trigger_ac; /* Permissible Access Category in which APSD Null - * Trigger frames can be send - */ - u8 htphy_membership; /* HT PHY membership */ - - bool _regulatory_domain; /* 802.11d enabled? */ - - u8 mimops_PM; - - u8 txpwr_percent; /* power output percentage */ - - u8 ht_wsec_restriction; /* the restriction of HT with TKIP or WEP */ - uint tempsense_lasttime; u16 tx_duty_cycle_ofdm; /* maximum allowed duty cycle for OFDM */ @@ -728,7 +645,6 @@ struct wlc_info { u16 next_bsscfg_ID; - struct wlc_if *wlcif_list; /* linked list of wlc_if structs */ struct wlc_txq_info *pkt_queue; /* txq for transmit packets */ u32 mpc_dur; /* total time (ms) in mpc mode except for the * portion since radio is turned off last time @@ -736,8 +652,6 @@ struct wlc_info { u32 mpc_laston_ts; /* timestamp (ms) when radio is turned off last * time */ - bool pr80838_war; - uint hwrxoff; struct wiphy *wiphy; }; -- cgit v0.10.2 From 0a0ad7d255d6e84fb265f61ac090ff1c1e546444 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:44:52 +0200 Subject: staging: brcm80211: fix compiler warning introduced Patch "[0f06b6a] remove WLC_WATCHDOG_TBTT macro" resulted in compiler warning because static function wlc_watchdog_backup_bi() is no longer used. This has been fixed in this patch. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 33045d5..c1257d4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -732,22 +732,6 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) wlc_ucode_mac_upd(wlc); } -static u32 wlc_watchdog_backup_bi(struct wlc_info *wlc) -{ - u32 bi; - bi = 2 * wlc->cfg->current_bss->dtim_period * - wlc->cfg->current_bss->beacon_period; - if (wlc->bcn_li_dtim) - bi *= wlc->bcn_li_dtim; - else if (wlc->bcn_li_bcn) - /* recalculate bi based on bcn_li_bcn */ - bi = 2 * wlc->bcn_li_bcn * wlc->cfg->current_bss->beacon_period; - - if (bi < 2 * TIMER_INTERVAL_WATCHDOG) - bi = 2 * TIMER_INTERVAL_WATCHDOG; - return bi; -} - ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) { ratespec_t lowest_basic_rspec; -- cgit v0.10.2 From 6a9a25eec0b55ea45e22710a9bcaf9690cb42fe6 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:53 +0200 Subject: staging: brcm80211: replaced #ifdef __mips__ sections by W_REG_FLUSH Code cleanup. A read-after-write construct is present in the code to ensure write order for certain Broadcom chips. Those chips are: bcm4706, bcm4716, bcm4717, bcm4718. All these chips contain a MIPS processor. This patch gets rid of several #ifdef __mips__ sections by defining a new macro in a header file. This patch does not introduce behavioral changes and is purely meant for code cleanup. The __mips__ define will be made more specific in a future patch. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index f45628a..07a5bcb 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -247,16 +247,10 @@ u16 read_radio_reg(phy_info_t *pi, u16 addr) if ((D11REV_GE(pi->sh->corerev, 24)) || (D11REV_IS(pi->sh->corerev, 22) && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - W_REG(&pi->regs->radioregaddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, addr); data = R_REG(&pi->regs->radioregdata); } else { - W_REG(&pi->regs->phy4waddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, addr); #ifdef __ARM_ARCH_4T__ __asm__(" .align 4 "); @@ -281,16 +275,10 @@ void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) (D11REV_IS(pi->sh->corerev, 22) && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - W_REG(&pi->regs->radioregaddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, addr); W_REG(&pi->regs->radioregdata, val); } else { - W_REG(&pi->regs->phy4waddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, addr); W_REG(&pi->regs->phy4wdatalo, val); } @@ -312,29 +300,17 @@ static u32 read_radio_id(phy_info_t *pi) if (D11REV_GE(pi->sh->corerev, 24)) { u32 b0, b1, b2; - W_REG(&pi->regs->radioregaddr, 0); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 0); b0 = (u32) R_REG(&pi->regs->radioregdata); - W_REG(&pi->regs->radioregaddr, 1); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 1); b1 = (u32) R_REG(&pi->regs->radioregdata); - W_REG(&pi->regs->radioregaddr, 2); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 2); b2 = (u32) R_REG(&pi->regs->radioregdata); id = ((b0 & 0xf) << 28) | (((b2 << 8) | b1) << 12) | ((b0 >> 4) & 0xf); } else { - W_REG(&pi->regs->phy4waddr, RADIO_IDCODE); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, RADIO_IDCODE); id = (u32) R_REG(&pi->regs->phy4wdatalo); id |= (u32) R_REG(&pi->regs->phy4wdatahi) << 16; } @@ -397,10 +373,7 @@ u16 read_phy_reg(phy_info_t *pi, u16 addr) regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); pi->phy_wreg = 0; return R_REG(®s->phyregdata); @@ -413,8 +386,7 @@ void write_phy_reg(phy_info_t *pi, u16 addr, u16 val) regs = pi->regs; #ifdef __mips__ - W_REG(®s->phyregaddr, addr); - (void)R_REG(®s->phyregaddr); + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, val); if (addr == 0x72) (void)R_REG(®s->phyregdata); @@ -436,10 +408,7 @@ void and_phy_reg(phy_info_t *pi, u16 addr, u16 val) regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, (R_REG(®s->phyregdata) & val)); pi->phy_wreg = 0; @@ -451,10 +420,7 @@ void or_phy_reg(phy_info_t *pi, u16 addr, u16 val) regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, (R_REG(®s->phyregdata) | val)); pi->phy_wreg = 0; @@ -466,10 +432,7 @@ void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, ((R_REG(®s->phyregdata) & ~mask) | (val & mask))); diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h index 17683f2..d7f531e 100644 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ b/drivers/staging/brcm80211/include/bcmutils.h @@ -366,6 +366,17 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); } while (0) #endif /* __BIG_ENDIAN */ +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + #define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) #define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) -- cgit v0.10.2 From 434c14ef61516c6ab3adbf3a77aea817417113aa Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:54 +0200 Subject: staging: brcm80211: emptied wlioctl.h Code cleanup. Broadcom specific ioctl functionality is not necessary in the Linux world. Deleted unused defines and structs from wlioctl.h. Moved softmac specific items from wlioctl.h to softmac header files, same for fullmac items. Moved shared fullmac/softmac definitions to other header files. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index a726b49..6156062 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -34,15 +34,167 @@ #include #include #include +#include "bcmdefs.h" /* The kernel threading is sdio-specific */ - -#include +#include "bcmwifi.h" +#include "proto/802.11.h" +#include "proto/bcmeth.h" +#include "proto/bcmevent.h" /* Forward decls */ struct dhd_bus; struct dhd_prot; struct dhd_info; +#define WLC_UP 2 +#define WLC_SET_PROMISC 10 +#define WLC_GET_RATE 12 +#define WLC_GET_INFRA 19 +#define WLC_SET_INFRA 20 +#define WLC_GET_AUTH 21 +#define WLC_SET_AUTH 22 +#define WLC_GET_BSSID 23 +#define WLC_GET_SSID 25 +#define WLC_SET_SSID 26 +#define WLC_GET_CHANNEL 29 +#define WLC_GET_SRL 31 +#define WLC_GET_LRL 33 +#define WLC_GET_RADIO 37 +#define WLC_SET_RADIO 38 +#define WLC_GET_PHYTYPE 39 +#define WLC_SET_KEY 45 +#define WLC_SET_PASSIVE_SCAN 49 +#define WLC_SCAN 50 +#define WLC_SCAN_RESULTS 51 +#define WLC_DISASSOC 52 +#define WLC_REASSOC 53 +#define WLC_SET_ROAM_TRIGGER 55 +#define WLC_SET_ROAM_DELTA 57 +#define WLC_GET_DTIMPRD 77 +#define WLC_SET_COUNTRY 84 +#define WLC_GET_PM 85 +#define WLC_SET_PM 86 +#define WLC_GET_AP 117 +#define WLC_SET_AP 118 +#define WLC_GET_RSSI 127 +#define WLC_GET_WSEC 133 +#define WLC_SET_WSEC 134 +#define WLC_GET_PHY_NOISE 135 +#define WLC_GET_BSS_INFO 136 +#define WLC_SET_SCAN_CHANNEL_TIME 185 +#define WLC_SET_SCAN_UNASSOC_TIME 187 +#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201 +#define WLC_GET_VALID_CHANNELS 217 +#define WLC_GET_KEY_PRIMARY 235 +#define WLC_SET_KEY_PRIMARY 236 +#define WLC_SET_SCAN_PASSIVE_TIME 258 +#define WLC_GET_VAR 262 /* get value of named variable */ +#define WLC_SET_VAR 263 /* set named variable to value */ + +/* phy types (returned by WLC_GET_PHYTPE) */ +#define WLC_PHY_TYPE_A 0 +#define WLC_PHY_TYPE_B 1 +#define WLC_PHY_TYPE_G 2 +#define WLC_PHY_TYPE_N 4 +#define WLC_PHY_TYPE_LP 5 +#define WLC_PHY_TYPE_SSN 6 +#define WLC_PHY_TYPE_HT 7 +#define WLC_PHY_TYPE_LCN 8 +#define WLC_PHY_TYPE_NULL 0xf + +#define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u) +#define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern) + +#define WL_EVENTING_MASK_LEN 16 + +#define TOE_TX_CSUM_OL 0x00000001 +#define TOE_RX_CSUM_OL 0x00000002 + +/* maximum channels returned by the get valid channels iovar */ +#define WL_NUMCHANNELS 64 + +#define WL_BSS_INFO_VERSION 108 /* current ver of wl_bss_info struct */ + +/* size of wl_scan_params not including variable length array */ +#define WL_SCAN_PARAMS_FIXED_SIZE 64 + +/* masks for channel and ssid count */ +#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff +#define WL_SCAN_PARAMS_NSSID_SHIFT 16 + +#define WL_SCAN_ACTION_START 1 +#define WL_SCAN_ACTION_CONTINUE 2 +#define WL_SCAN_ACTION_ABORT 3 + +#define ISCAN_REQ_VERSION 1 + +/* wl_iscan_results status values */ +#define WL_SCAN_RESULTS_SUCCESS 0 +#define WL_SCAN_RESULTS_PARTIAL 1 +#define WL_SCAN_RESULTS_PENDING 2 +#define WL_SCAN_RESULTS_ABORTED 3 +#define WL_SCAN_RESULTS_NO_MEM 4 + +#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */ +#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */ + +#define IBSS_MED 15 /* Mediom in-bss congestion percentage */ +#define IBSS_HI 25 /* Hi in-bss congestion percentage */ +#define OBSS_MED 12 +#define OBSS_HI 25 +#define INTERFER_MED 5 +#define INTERFER_HI 10 + +#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */ +#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */ +#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */ +#define CCA_FLAGS_PREFER_1_6_11 0x10 +#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */ + +#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */ +#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */ +#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */ +#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */ +#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */ + +#define WL_NUM_RPI_BINS 8 +#define WL_RM_TYPE_BASIC 1 +#define WL_RM_TYPE_CCA 2 +#define WL_RM_TYPE_RPI 3 + +#define WL_RM_FLAG_PARALLEL (1<<0) + +#define WL_RM_FLAG_LATE (1<<1) +#define WL_RM_FLAG_INCAPABLE (1<<2) +#define WL_RM_FLAG_REFUSED (1<<3) + +#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ +#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ +#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ +#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ +#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ + +#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ +#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */ +#define WLC_IOCTL_MAXLEN 8192 + +#define DHD_IF_VIF 0x01 /* Virtual IF (Hidden from user) */ + +/* optionally set by a module_param_string() */ +#define MOD_PARAM_PATHLEN 2048 + +/* For supporting multiple interfaces */ +#define DHD_MAX_IFS 16 +#define DHD_DEL_IF -0xe +#define DHD_BAD_IF -0xf + +enum cust_gpio_modes { + WLAN_RESET_ON, + WLAN_RESET_OFF, + WLAN_POWER_ON, + WLAN_POWER_OFF +}; + /* The level of bus communication with the dongle */ enum dhd_bus_state { DHD_BUS_DOWN, /* Not ready for frame transfers */ @@ -50,6 +202,316 @@ enum dhd_bus_state { DHD_BUS_DATA /* Ready for frame transfers */ }; +/* Pattern matching filter. Specifies an offset within received packets to + * start matching, the pattern to match, the size of the pattern, and a bitmask + * that indicates which bits within the pattern should be matched. + */ +typedef struct wl_pkt_filter_pattern { + u32 offset; /* Offset within received packet to start pattern matching. + * Offset '0' is the first byte of the ethernet header. + */ + u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ + u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts + * at offset 0. Pattern immediately follows mask. + */ +} wl_pkt_filter_pattern_t; + +/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ +typedef struct wl_pkt_filter { + u32 id; /* Unique filter id, specified by app. */ + u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ + u32 negate_match; /* Negate the result of filter matches */ + union { /* Filter definitions */ + wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */ + } u; +} wl_pkt_filter_t; + +/* IOVAR "pkt_filter_enable" parameter. */ +typedef struct wl_pkt_filter_enable { + u32 id; /* Unique filter id */ + u32 enable; /* Enable/disable bool */ +} wl_pkt_filter_enable_t; + +/* BSS info structure + * Applications MUST CHECK ie_offset field and length field to access IEs and + * next bss_info structure in a vector (in wl_scan_results_t) + */ +typedef struct wl_bss_info { + u32 version; /* version field */ + u32 length; /* byte length of data in this record, + * starting at version and including IEs + */ + u8 BSSID[ETH_ALEN]; + u16 beacon_period; /* units are Kusec */ + u16 capability; /* Capability information */ + u8 SSID_len; + u8 SSID[32]; + struct { + uint count; /* # rates in this set */ + u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ + } rateset; /* supported rates */ + chanspec_t chanspec; /* chanspec for bss */ + u16 atim_window; /* units are Kusec */ + u8 dtim_period; /* DTIM period */ + s16 RSSI; /* receive signal strength (in dBm) */ + s8 phy_noise; /* noise (in dBm) */ + + u8 n_cap; /* BSS is 802.11N Capable */ + u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ + u8 ctl_ch; /* 802.11N BSS control channel number */ + u32 reserved32[1]; /* Reserved for expansion of BSS properties */ + u8 flags; /* flags */ + u8 reserved[3]; /* Reserved for expansion of BSS properties */ + u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ + + u16 ie_offset; /* offset at which IEs start, from beginning */ + u32 ie_length; /* byte length of Information Elements */ + s16 SNR; /* average SNR of during frame reception */ + /* Add new fields here */ + /* variable length Information Elements */ +} wl_bss_info_t; + +typedef struct wlc_ssid { + u32 SSID_len; + unsigned char SSID[32]; +} wlc_ssid_t; + +typedef struct wl_scan_params { + wlc_ssid_t ssid; /* default: {0, ""} */ + u8 bssid[ETH_ALEN]; /* default: bcast */ + s8 bss_type; /* default: any, + * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT + */ + u8 scan_type; /* flags, 0 use default */ + s32 nprobes; /* -1 use default, number of probes per channel */ + s32 active_time; /* -1 use default, dwell time per channel for + * active scanning + */ + s32 passive_time; /* -1 use default, dwell time per channel + * for passive scanning + */ + s32 home_time; /* -1 use default, dwell time for the home channel + * between channel scans + */ + s32 channel_num; /* count of channels and ssids that follow + * + * low half is count of channels in channel_list, 0 + * means default (use all available channels) + * + * high half is entries in wlc_ssid_t array that + * follows channel_list, aligned for s32 (4 bytes) + * meaning an odd channel count implies a 2-byte pad + * between end of channel_list and first ssid + * + * if ssid count is zero, single ssid in the fixed + * parameter portion is assumed, otherwise ssid in + * the fixed portion is ignored + */ + u16 channel_list[1]; /* list of chanspecs */ +} wl_scan_params_t; + +/* incremental scan struct */ +typedef struct wl_iscan_params { + u32 version; + u16 action; + u16 scan_duration; + wl_scan_params_t params; +} wl_iscan_params_t; + +/* 3 fields + size of wl_scan_params, not including variable length array */ +#define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) + +typedef struct wl_scan_results { + u32 buflen; + u32 version; + u32 count; + wl_bss_info_t bss_info[1]; +} wl_scan_results_t; + +typedef struct wl_rateset_args { + u32 count; /* # rates in this set */ + u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ + u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ +} wl_rateset_args_t; + +/* u32 list */ +typedef struct wl_u32_list { + /* in - # of elements, out - # of entries */ + u32 count; + /* variable length u32 list */ + u32 element[1]; +} wl_u32_list_t; + +/* used for association with a specific BSSID and chanspec list */ +typedef struct wl_assoc_params { + u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */ + s32 chanspec_num; /* 0: all available channels, + * otherwise count of chanspecs in chanspec_list + */ + chanspec_t chanspec_list[1]; /* list of chanspecs */ +} wl_assoc_params_t; +#define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(chanspec_t)) + +/* used for reassociation/roam to a specific BSSID and channel */ +typedef wl_assoc_params_t wl_reassoc_params_t; +#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE + +/* used for join with or without a specific bssid and channel list */ +typedef struct wl_join_params { + wlc_ssid_t ssid; + wl_assoc_params_t params; /* optional field, but it must include the fixed portion + * of the wl_assoc_params_t struct when it does present. + */ +} wl_join_params_t; +#define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(chanspec_t)) + +/* size of wl_scan_results not including variable length array */ +#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) + +/* incremental scan results struct */ +typedef struct wl_iscan_results { + u32 status; + wl_scan_results_t results; +} wl_iscan_results_t; + +/* size of wl_iscan_results not including variable length array */ +#define WL_ISCAN_RESULTS_FIXED_SIZE \ + (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results)) + +typedef struct { + u32 duration; /* millisecs spent sampling this channel */ + u32 congest_ibss; /* millisecs in our bss (presumably this traffic will */ + /* move if cur bss moves channels) */ + u32 congest_obss; /* traffic not in our bss */ + u32 interference; /* millisecs detecting a non 802.11 interferer. */ + u32 timestamp; /* second timestamp */ +} cca_congest_t; + +typedef struct { + chanspec_t chanspec; /* Which channel? */ + u8 num_secs; /* How many secs worth of data */ + cca_congest_t secs[1]; /* Data */ +} cca_congest_channel_req_t; + +typedef struct wl_country { + char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in + * the Country IE + */ + s32 rev; /* revision specifier for ccode + * on set, -1 indicates unspecified. + * on get, rev >= 0 + */ + char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code. + * variable length, but fixed size in + * struct allows simple allocation for + * expected country strings <= 3 chars. + */ +} wl_country_t; + +typedef struct wl_channels_in_country { + u32 buflen; + u32 band; + char country_abbrev[WLC_CNTRY_BUF_SZ]; + u32 count; + u32 channel[1]; +} wl_channels_in_country_t; + +typedef struct wl_country_list { + u32 buflen; + u32 band_set; + u32 band; + u32 count; + char country_abbrev[1]; +} wl_country_list_t; + +typedef struct wl_rm_req_elt { + s8 type; + s8 flags; + chanspec_t chanspec; + u32 token; /* token for this measurement */ + u32 tsf_h; /* TSF high 32-bits of Measurement start time */ + u32 tsf_l; /* TSF low 32-bits */ + u32 dur; /* TUs */ +} wl_rm_req_elt_t; + +typedef struct wl_rm_req { + u32 token; /* overall measurement set token */ + u32 count; /* number of measurement requests */ + void *cb; /* completion callback function: may be NULL */ + void *cb_arg; /* arg to completion callback function */ + wl_rm_req_elt_t req[1]; /* variable length block of requests */ +} wl_rm_req_t; +#define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req) + +typedef struct wl_rm_rep_elt { + s8 type; + s8 flags; + chanspec_t chanspec; + u32 token; /* token for this measurement */ + u32 tsf_h; /* TSF high 32-bits of Measurement start time */ + u32 tsf_l; /* TSF low 32-bits */ + u32 dur; /* TUs */ + u32 len; /* byte length of data block */ + u8 data[1]; /* variable length data block */ +} wl_rm_rep_elt_t; +#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */ + +#define WL_RPI_REP_BIN_NUM 8 +typedef struct wl_rm_rpi_rep { + u8 rpi[WL_RPI_REP_BIN_NUM]; + s8 rpi_max[WL_RPI_REP_BIN_NUM]; +} wl_rm_rpi_rep_t; + +typedef struct wl_rm_rep { + u32 token; /* overall measurement set token */ + u32 len; /* length of measurement report block */ + wl_rm_rep_elt_t rep[1]; /* variable length block of reports */ +} wl_rm_rep_t; +#define WL_RM_REP_FIXED_LEN 8 + +typedef struct wl_wsec_key { + u32 index; /* key index */ + u32 len; /* key length */ + u8 data[WLAN_MAX_KEY_LEN]; /* key data */ + u32 pad_1[18]; + u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + u32 flags; /* misc flags */ + u32 pad_2[2]; + int pad_3; + int iv_initialized; /* has IV been initialized already? */ + int pad_4; + /* Rx IV */ + struct { + u32 hi; /* upper 32 bits of IV */ + u16 lo; /* lower 16 bits of IV */ + } rxiv; + u32 pad_5[2]; + u8 ea[ETH_ALEN]; /* per station */ +} wl_wsec_key_t; + +/* Used to get specific STA parameters */ +typedef struct { + u32 val; + u8 ea[ETH_ALEN]; +} scb_val_t; + +/* channel encoding */ +typedef struct channel_info { + int hw_channel; + int target_channel; + int scan_channel; +} channel_info_t; + +/* Linux network driver ioctl encoding */ +typedef struct wl_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ + u8 set; /* get or set request (optional) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ +} wl_ioctl_t; + /* Common structure for module and instance linkage */ typedef struct dhd_pub { /* Linkage ponters */ @@ -122,6 +584,20 @@ typedef struct dhd_pub { } dhd_pub_t; +typedef struct dhd_if_event { + u8 ifidx; + u8 action; + u8 flags; + u8 bssidx; +} dhd_if_event_t; + +typedef struct { + u32 limit; /* Expiration time (usec) */ + u32 increment; /* Current expiration increment (usec) */ + u32 elapsed; /* Current elapsed time (usec) */ + u32 tick; /* O/S tick time (usec) */ +} dhd_timeout_t; + #if defined(CONFIG_PM_SLEEP) extern atomic_t dhd_mmc_suspend; #define DHD_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); @@ -167,7 +643,69 @@ extern atomic_t dhd_mmc_suspend; } while (0) #endif /* defined(CONFIG_PM_SLEEP) */ -#define DHD_IF_VIF 0x01 /* Virtual IF (Hidden from user) */ + +/* + * Insmod parameters for debug/test + */ + +/* Watchdog timer interval */ +extern uint dhd_watchdog_ms; + +#if defined(DHD_DEBUG) +/* Console output poll interval */ +extern uint dhd_console_ms; +#endif /* defined(DHD_DEBUG) */ + +/* Use interrupts */ +extern uint dhd_intr; + +/* Use polling */ +extern uint dhd_poll; + +/* ARP offload agent mode */ +extern uint dhd_arp_mode; + +/* ARP offload enable */ +extern uint dhd_arp_enable; + +/* Pkt filte enable control */ +extern uint dhd_pkt_filter_enable; + +/* Pkt filter init setup */ +extern uint dhd_pkt_filter_init; + +/* Pkt filter mode control */ +extern uint dhd_master_mode; + +/* Roaming mode control */ +extern uint dhd_roam; + +/* Roaming mode control */ +extern uint dhd_radio_up; + +/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */ +extern int dhd_idletime; +#define DHD_IDLETIME_TICKS 1 + +/* SDIO Drive Strength */ +extern uint dhd_sdiod_drive_strength; + +/* Override to force tx queueing all the time */ +extern uint dhd_force_tx_queueing; + +#ifdef SDTEST +/* Echo packet generator (SDIO), pkts/s */ +extern uint dhd_pktgen; + +/* Echo packet len (0 => sawtooth, max 1800) */ +extern uint dhd_pktgen_len; +#define MAX_PKTGEN_LEN 1800 +#endif + +extern char fw_path[MOD_PARAM_PATHLEN]; +extern char nv_path[MOD_PARAM_PATHLEN]; + +extern u32 g_assert_type; static inline void MUTEX_LOCK_INIT(dhd_pub_t *dhdp) { @@ -205,13 +743,6 @@ static inline void MUTEX_UNLOCK_WL_SCAN_SET(void) { } -typedef struct dhd_if_event { - u8 ifidx; - u8 action; - u8 flags; - u8 bssidx; -} dhd_if_event_t; - /* * Exported from dhd OS modules (dhd_linux/dhd_ndis) */ @@ -286,13 +817,6 @@ extern void dhd_os_sdtxunlock(dhd_pub_t *pub); int setScheduler(struct task_struct *p, int policy, struct sched_param *param); -typedef struct { - u32 limit; /* Expiration time (usec) */ - u32 increment; /* Current expiration increment (usec) */ - u32 elapsed; /* Current elapsed time (usec) */ - u32 tick; /* O/S tick time (usec) */ -} dhd_timeout_t; - extern void dhd_timeout_start(dhd_timeout_t *tmo, uint usec); extern int dhd_timeout_expired(dhd_timeout_t *tmo); @@ -324,85 +848,9 @@ extern int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag); extern uint dhd_bus_status(dhd_pub_t *dhdp); extern int dhd_bus_start(dhd_pub_t *dhdp); -enum cust_gpio_modes { - WLAN_RESET_ON, - WLAN_RESET_OFF, - WLAN_POWER_ON, - WLAN_POWER_OFF -}; -/* - * Insmod parameters for debug/test - */ - -/* Watchdog timer interval */ -extern uint dhd_watchdog_ms; - -#if defined(DHD_DEBUG) -/* Console output poll interval */ -extern uint dhd_console_ms; -#endif /* defined(DHD_DEBUG) */ - -/* Use interrupts */ -extern uint dhd_intr; - -/* Use polling */ -extern uint dhd_poll; - -/* ARP offload agent mode */ -extern uint dhd_arp_mode; - -/* ARP offload enable */ -extern uint dhd_arp_enable; - -/* Pkt filte enable control */ -extern uint dhd_pkt_filter_enable; - -/* Pkt filter init setup */ -extern uint dhd_pkt_filter_init; - -/* Pkt filter mode control */ -extern uint dhd_master_mode; - -/* Roaming mode control */ -extern uint dhd_roam; - -/* Roaming mode control */ -extern uint dhd_radio_up; - -/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */ -extern int dhd_idletime; -#define DHD_IDLETIME_TICKS 1 - -/* SDIO Drive Strength */ -extern uint dhd_sdiod_drive_strength; - -/* Override to force tx queueing all the time */ -extern uint dhd_force_tx_queueing; - -#ifdef SDTEST -/* Echo packet generator (SDIO), pkts/s */ -extern uint dhd_pktgen; - -/* Echo packet len (0 => sawtooth, max 1800) */ -extern uint dhd_pktgen_len; -#define MAX_PKTGEN_LEN 1800 -#endif - -/* optionally set by a module_param_string() */ -#define MOD_PARAM_PATHLEN 2048 -extern char fw_path[MOD_PARAM_PATHLEN]; -extern char nv_path[MOD_PARAM_PATHLEN]; - -/* For supporting multiple interfaces */ -#define DHD_MAX_IFS 16 -#define DHD_DEL_IF -0xe -#define DHD_BAD_IF -0xf - extern void dhd_wait_for_event(dhd_pub_t *dhd, bool * lockvar); extern void dhd_wait_event_wakeup(dhd_pub_t *dhd); -extern u32 g_assert_type; - #ifdef BCMDBG #define ASSERT(exp) \ do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0) @@ -411,4 +859,84 @@ extern void osl_assert(char *exp, char *file, int line); #define ASSERT(exp) do {} while (0) #endif /* defined(BCMDBG) */ +/* Linux network driver ioctl encoding */ +typedef struct dhd_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ + bool set; /* get or set request (optional) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ + uint driver; /* to identify target driver */ +} dhd_ioctl_t; + +/* per-driver magic numbers */ +#define DHD_IOCTL_MAGIC 0x00444944 + +/* bump this number if you change the ioctl interface */ +#define DHD_IOCTL_VERSION 1 + +#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ +#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ + +/* common ioctl definitions */ +#define DHD_GET_MAGIC 0 +#define DHD_GET_VERSION 1 +#define DHD_GET_VAR 2 +#define DHD_SET_VAR 3 + +/* message levels */ +#define DHD_ERROR_VAL 0x0001 +#define DHD_TRACE_VAL 0x0002 +#define DHD_INFO_VAL 0x0004 +#define DHD_DATA_VAL 0x0008 +#define DHD_CTL_VAL 0x0010 +#define DHD_TIMER_VAL 0x0020 +#define DHD_HDRS_VAL 0x0040 +#define DHD_BYTES_VAL 0x0080 +#define DHD_INTR_VAL 0x0100 +#define DHD_LOG_VAL 0x0200 +#define DHD_GLOM_VAL 0x0400 +#define DHD_EVENT_VAL 0x0800 +#define DHD_BTA_VAL 0x1000 +#define DHD_ISCAN_VAL 0x2000 + +#ifdef SDTEST +/* For pktgen iovar */ +typedef struct dhd_pktgen { + uint version; /* To allow structure change tracking */ + uint freq; /* Max ticks between tx/rx attempts */ + uint count; /* Test packets to send/rcv each attempt */ + uint print; /* Print counts every attempts */ + uint total; /* Total packets (or bursts) */ + uint minlen; /* Minimum length of packets to send */ + uint maxlen; /* Maximum length of packets to send */ + uint numsent; /* Count of test packets sent */ + uint numrcvd; /* Count of test packets received */ + uint numfail; /* Count of test send failures */ + uint mode; /* Test mode (type of test packets) */ + uint stop; /* Stop after this many tx failures */ +} dhd_pktgen_t; + +/* Version in case structure changes */ +#define DHD_PKTGEN_VERSION 2 + +/* Type of test packets to use */ +#define DHD_PKTGEN_ECHO 1 /* Send echo requests */ +#define DHD_PKTGEN_SEND 2 /* Send discard packets */ +#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ +#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous + tx dongle */ +#endif /* SDTEST */ + +/* Enter idle immediately (no timeout) */ +#define DHD_IDLE_IMMEDIATE (-1) + +/* Values for idleclock iovar: other values are the sd_divisor to use + when idle */ +#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change + when idle */ +#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped + (and use SD1 mode) */ + #endif /* _dhd_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 0bfb93c..5aa5ee4 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -24,7 +24,6 @@ #include #include #include -#include int dhd_msg_level; char fw_path[MOD_PARAM_PATHLEN]; diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c index 1cf6c5d..abd41e3 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c @@ -20,7 +20,6 @@ #include #include -#include #include #define WL_ERROR(fmt, args...) printk(fmt, ##args) diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h index 030d5ff..16b8942 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h @@ -18,7 +18,6 @@ #define _dhd_proto_h_ #include -#include #ifndef IOCTL_RESP_TIMEOUT #define IOCTL_RESP_TIMEOUT 2000 /* In milli second */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h index f0ba535..db0b9e8 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h +++ b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h @@ -17,84 +17,4 @@ #ifndef _dhdioctl_h_ #define _dhdioctl_h_ -/* Linux network driver ioctl encoding */ -typedef struct dhd_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - bool set; /* get or set request (optional) */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ - uint driver; /* to identify target driver */ -} dhd_ioctl_t; - -/* per-driver magic numbers */ -#define DHD_IOCTL_MAGIC 0x00444944 - -/* bump this number if you change the ioctl interface */ -#define DHD_IOCTL_VERSION 1 - -#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ -#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ - -/* common ioctl definitions */ -#define DHD_GET_MAGIC 0 -#define DHD_GET_VERSION 1 -#define DHD_GET_VAR 2 -#define DHD_SET_VAR 3 - -/* message levels */ -#define DHD_ERROR_VAL 0x0001 -#define DHD_TRACE_VAL 0x0002 -#define DHD_INFO_VAL 0x0004 -#define DHD_DATA_VAL 0x0008 -#define DHD_CTL_VAL 0x0010 -#define DHD_TIMER_VAL 0x0020 -#define DHD_HDRS_VAL 0x0040 -#define DHD_BYTES_VAL 0x0080 -#define DHD_INTR_VAL 0x0100 -#define DHD_LOG_VAL 0x0200 -#define DHD_GLOM_VAL 0x0400 -#define DHD_EVENT_VAL 0x0800 -#define DHD_BTA_VAL 0x1000 -#define DHD_ISCAN_VAL 0x2000 - -#ifdef SDTEST -/* For pktgen iovar */ -typedef struct dhd_pktgen { - uint version; /* To allow structure change tracking */ - uint freq; /* Max ticks between tx/rx attempts */ - uint count; /* Test packets to send/rcv each attempt */ - uint print; /* Print counts every attempts */ - uint total; /* Total packets (or bursts) */ - uint minlen; /* Minimum length of packets to send */ - uint maxlen; /* Maximum length of packets to send */ - uint numsent; /* Count of test packets sent */ - uint numrcvd; /* Count of test packets received */ - uint numfail; /* Count of test send failures */ - uint mode; /* Test mode (type of test packets) */ - uint stop; /* Stop after this many tx failures */ -} dhd_pktgen_t; - -/* Version in case structure changes */ -#define DHD_PKTGEN_VERSION 2 - -/* Type of test packets to use */ -#define DHD_PKTGEN_ECHO 1 /* Send echo requests */ -#define DHD_PKTGEN_SEND 2 /* Send discard packets */ -#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ -#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous - tx dongle */ -#endif /* SDTEST */ - -/* Enter idle immediately (no timeout) */ -#define DHD_IDLE_IMMEDIATE (-1) - -/* Values for idleclock iovar: other values are the sd_divisor to use - when idle */ -#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change - when idle */ -#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped - (and use SD1 mode) */ - #endif /* _dhdioctl_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 1827b0b..bf57e18 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h index 996033c..4bd0392 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h @@ -20,7 +20,6 @@ #include #include #include -#include struct wl_conf; struct wl_iface; diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 929ceaf..b284b12 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -18,7 +18,6 @@ #include #include #include -#include #include @@ -30,7 +29,6 @@ #include #include typedef const struct si_pub si_t; -#include #include #include @@ -115,6 +113,24 @@ typedef struct iscan_info { } iscan_info_t; iscan_info_t *g_iscan; +typedef enum sup_auth_status { + WLC_SUP_DISCONNECTED = 0, + WLC_SUP_CONNECTING, + WLC_SUP_IDREQUIRED, + WLC_SUP_AUTHENTICATING, + WLC_SUP_AUTHENTICATED, + WLC_SUP_KEYXCHANGE, + WLC_SUP_KEYED, + WLC_SUP_TIMEOUT, + WLC_SUP_LAST_BASIC_STATE, + WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, + WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, + WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, + WLC_SUP_KEYXCHANGE_PREP_M4, + WLC_SUP_KEYXCHANGE_WAIT_G1, + WLC_SUP_KEYXCHANGE_PREP_G2 +} sup_auth_status_t; + static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; /* Global ASSERT type flag */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.h b/drivers/staging/brcm80211/brcmfmac/wl_iw.h index fe06174..c92a8b5 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.h @@ -19,8 +19,6 @@ #include -#include - #define WL_SCAN_PARAMS_SSID_MAX 10 #define GET_SSID "SSID=" #define GET_CHANNEL "CH=" diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h b/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h index f4b3e61..a41e62c 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h @@ -17,8 +17,6 @@ #ifndef _bcmsrom_tbl_h_ #define _bcmsrom_tbl_h_ -#include "wlioctl.h" - typedef struct { const char *name; u32 revmask; diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index d91e418..cb434e5 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -17,14 +17,9 @@ #ifndef _D11_H #define _D11_H +#include #include -#ifndef WL_RSSI_ANT_MAX -#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ -#elif WL_RSSI_ANT_MAX != 4 -#error "WL_RSSI_ANT_MAX does not match" -#endif - /* cpp contortions to concatenate w/arg prescan */ #ifndef PAD #define _PADLINE(line) pad ## line @@ -56,6 +51,12 @@ #define TX_DATA_FIFO TX_AC_BE_FIFO #define TX_CTL_FIFO TX_AC_VO_FIFO +#ifndef WL_RSSI_ANT_MAX +#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ +#elif WL_RSSI_ANT_MAX != 4 +#error "WL_RSSI_ANT_MAX does not match" +#endif + typedef volatile struct { u32 intstatus; u32 intmask; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h index 1ef96c7..93e3db9 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h @@ -14,14 +14,18 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +/* + * wlc_phy_hal.h: functionality exported from the phy to higher layers + */ + #ifndef _wlc_phy_h_ #define _wlc_phy_h_ -#include #include #include #include #include /* struct wiphy */ +#include "bcmwifi.h" /* chanspec_t */ #define IDCODE_VER_MASK 0x0000000f #define IDCODE_VER_SHIFT 0 @@ -87,12 +91,20 @@ #define WLC_TXPWR_DB_FACTOR 4 +/* a large TX Power as an init value to factor out of min() calculations, + * keep low enough to fit in an s8, units are .25 dBm + */ +#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ + #define WLC_NUM_RATES_CCK 4 #define WLC_NUM_RATES_OFDM 8 #define WLC_NUM_RATES_MCS_1_STREAM 8 #define WLC_NUM_RATES_MCS_2_STREAM 8 #define WLC_NUM_RATES_MCS_3_STREAM 8 #define WLC_NUM_RATES_MCS_4_STREAM 8 + +#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ + typedef struct txpwr_limits { u8 cck[WLC_NUM_RATES_CCK]; u8 ofdm[WLC_NUM_RATES_OFDM]; @@ -115,6 +127,32 @@ typedef struct txpwr_limits { } txpwr_limits_t; typedef struct { + u32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + u8 local_max; /* local max according to the AP */ + u8 local_constraint; /* local constraint according to the AP */ + s8 antgain[2]; /* Ant gain for each band - from SROM */ + u8 rf_cores; /* count of RF Cores being reported */ + u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ + u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain + * without adjustment + */ + u8 est_Pout_cck; /* Latest CCK tx power out estimate */ + u8 tx_power_max[4]; /* Maximum target power among all rates */ + u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ + u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ + u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ + u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ + u8 target[WL_TX_POWER_RATES]; /* Latest target power */ +} tx_power_t; + +typedef struct tx_inst_power { + u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ + u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ +} tx_inst_power_t; + +typedef struct { u8 vec[MAXCHANNEL / NBBY]; } chanvec_t; diff --git a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h index 5582de3..8cc6b1a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h @@ -19,7 +19,7 @@ #include /* dev_err() */ -/* wl_msg_level is a bit vector with defs in wlioctl.h */ +/* wl_msg_level is a bit vector with defs in bcmdefs.h */ extern u32 wl_msg_level; #define BCMMSG(dev, fmt, args...) \ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index f951f22..105f426 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include "phy/wlc_phy_int.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h index c878690..fafde6a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h @@ -17,6 +17,10 @@ #ifndef _wl_mac80211_h_ #define _wl_mac80211_h_ +/* softmac ioctl definitions */ +#define WLC_SET_SHORTSLOT_OVERRIDE 146 + + /* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be * submitted to workqueue instead of being on kernel timer diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 3c4b2c0..3b04e02 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 75343ab..c83896b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index 111ef32..efdc62a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -26,7 +26,6 @@ #include #include #include -#include #include "d11.h" #include "wlc_rate.h" @@ -39,9 +38,15 @@ #include "wlc_channel.h" #include "wlc_main.h" #include "wl_export.h" -#include "wlc_phy_shim.h" #include "wlc_antsel.h" +#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ +#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ +#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ +#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ +#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ +#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ + /* useful macros */ #define WLC_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf) #define WLC_ANTSEL_11N_1(ant) (((ant) & ANT_SELCFG_MASK) & 0xf) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 9ef7707..adc06fc 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include @@ -45,7 +44,6 @@ #include "wlc_scb.h" #include "wlc_pub.h" #include "wlc_key.h" -#include "wlc_phy_shim.h" #include "phy/wlc_phy_hal.h" #include "wlc_channel.h" #include "wlc_main.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index a3a2bf9..9e29339 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -24,7 +24,6 @@ #include #include #include -#include #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_key.h b/drivers/staging/brcm80211/brcmsmac/wlc_key.h index cab10c7..f4bced5 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_key.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_key.h @@ -17,6 +17,8 @@ #ifndef _wlc_key_h_ #define _wlc_key_h_ +#include /* for ETH_ALEN */ + struct scb; struct wlc_info; struct wlc_bsscfg; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index c1257d4..0837e8d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include @@ -45,14 +44,12 @@ #include "wlc_main.h" #include "wlc_bmac.h" #include "wlc_phy_hal.h" -#include "wlc_phy_shim.h" #include "wlc_antsel.h" #include "wlc_stf.h" #include "wlc_ampdu.h" #include "wl_export.h" #include "wlc_alloc.h" #include "wl_dbg.h" - #include "wl_mac80211.h" /* @@ -93,6 +90,30 @@ #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */ +/* Software feature flag defines used by wlfeatureflag */ +#define WL_SWFL_NOHWRADIO 0x0004 +#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ +#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ + +/* n-mode support capability */ +/* 2x2 includes both 1x1 & 2x2 devices + * reserved #define 2 for future when we want to separate 1x1 & 2x2 and + * control it independently + */ +#define WL_11N_2x2 1 +#define WL_11N_3x3 3 +#define WL_11N_4x4 4 + +/* define 11n feature disable flags */ +#define WLFEATURE_DISABLE_11N 0x00000001 +#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 +#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 +#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 +#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 +#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 +#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 +#define WLFEATURE_DISABLE_11N_GF 0x00000080 + /* * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft * watchdog) it is not a wall clock and won't increment when driver is in "down" state @@ -2428,7 +2449,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, struct scb *nextscb; bool ta_ok; uint band; - rw_reg_t *r; struct wlc_bsscfg *bsscfg; wlc_bss_info_t *current_bss; @@ -2440,7 +2460,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, nextscb = NULL; ta_ok = false; band = 0; - r = NULL; /* If the device is turned off, then it's not "removed" */ if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) { diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index edbf3d2..3bbb774 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -290,7 +290,7 @@ struct wlcband { wlc_phy_t *pi; /* pointer to phy specific information */ bool abgphy_encore; - u8 gmode; /* currently active gmode (see wlioctl.h) */ + u8 gmode; /* currently active gmode */ struct scb *hwrs_scb; /* permanent scb for hw rateset */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index 16fea02..c33b61b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h index c151a5d..124d3fb 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h @@ -14,6 +14,10 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +/* + * wlc_phy_shim.h: stuff defined in wlc_phy_shim.c and included only by the phy + */ + #ifndef _wlc_phy_shim_h_ #define _wlc_phy_shim_h_ @@ -51,6 +55,57 @@ #define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ #define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ +#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ +#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ +#define WL_ANT_IDX_1 0 /* antenna index 1 */ +#define WL_ANT_IDX_2 1 /* antenna index 2 */ + +/* values for n_preamble_type */ +#define WLC_N_PREAMBLE_MIXEDMODE 0 +#define WLC_N_PREAMBLE_GF 1 +#define WLC_N_PREAMBLE_GF_BRCM 2 + +#define WL_TX_POWER_RATES_LEGACY 45 +#define WL_TX_POWER_MCS20_FIRST 12 +#define WL_TX_POWER_MCS20_NUM 16 +#define WL_TX_POWER_MCS40_FIRST 28 +#define WL_TX_POWER_MCS40_NUM 17 + + +#define WL_TX_POWER_RATES 101 +#define WL_TX_POWER_CCK_FIRST 0 +#define WL_TX_POWER_CCK_NUM 4 +#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM_NUM 8 +#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ +#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ +#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ +#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ +#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ +#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ +#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ +#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ +#define WL_TX_POWER_MCS_1_STREAM_NUM 8 +#define WL_TX_POWER_MCS_2_STREAM_NUM 8 +#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ +#define WL_TX_POWER_MCS_32_NUM 1 + +/* sslpnphy specifics */ +#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ + +/* tx_power_t.flags bits */ +#define WL_TX_POWER_F_ENABLED 1 +#define WL_TX_POWER_F_HW 2 +#define WL_TX_POWER_F_MIMO 4 +#define WL_TX_POWER_F_SISO 8 + +/* values to force tx/rx chain */ +#define WLC_N_TXRX_CHAIN0 0 +#define WLC_N_TXRX_CHAIN1 1 + /* Forward declarations */ struct wlc_hw_info; typedef struct wlc_phy_shim_info wlc_phy_shim_info_t; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index b3a79ab..2bbf995 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -17,6 +17,9 @@ #ifndef _wlc_pub_h_ #define _wlc_pub_h_ +#include "proto/802.11.h" /* for MCSSET_LEN */ +#include "bcmwifi.h" /* for chanspec_t */ + #define WLC_NUMRATES 16 /* max # of rates in a rateset */ #define MAXMULTILIST 32 /* max # multicast addresses */ #define D11_PHY_HDR_LEN 6 /* Phy header length - 6 bytes */ @@ -96,6 +99,12 @@ #define AIDMAPSZ (roundup(MAXSCB, NBBY)/NBBY) /* aid bitmap size in bytes */ #endif /* AIDMAPSZ */ +#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ + +#define WL_SPURAVOID_OFF 0 +#define WL_SPURAVOID_ON1 1 +#define WL_SPURAVOID_ON2 2 + struct ieee80211_tx_queue_params; typedef struct wlc_tunables { @@ -151,7 +160,7 @@ struct rsn_parms { IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD |\ IEEE80211_HT_CAP_MAX_AMSDU | IEEE80211_HT_CAP_DSSSCCK40) -/* wlc internal bss_info, wl external one is in wlioctl.h */ +/* wlc internal bss_info */ typedef struct wlc_bss_info { u8 BSSID[ETH_ALEN]; /* network BSSID */ u16 flags; /* flags for internal attributes */ @@ -489,6 +498,98 @@ extern const u8 wme_fifo2ac[]; #define WLC_PROT_N_PAM_OVR 15 /* n preamble override */ #define WLC_PROT_N_OBSS 16 /* non-HT OBSS present */ +/* + * 54g modes (basic bits may still be overridden) + * + * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 + * Preamble: Long + * Shortslot: Off + * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: Auto + * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 + * Extended Rateset: 6b, 9, 12b, 48 + * Preamble: Short required + * Shortslot: Auto + * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: On + * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 + * Preamble: Short required + * Shortslot: On and required + * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b + * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 + * Preamble: Long + * Shortslot: Auto + */ +#define GMODE_LEGACY_B 0 +#define GMODE_AUTO 1 +#define GMODE_ONLY 2 +#define GMODE_B_DEFERRED 3 +#define GMODE_PERFORMANCE 4 +#define GMODE_LRS 5 +#define GMODE_MAX 6 + +/* values for PLCPHdr_override */ +#define WLC_PLCP_AUTO -1 +#define WLC_PLCP_SHORT 0 +#define WLC_PLCP_LONG 1 + +/* values for g_protection_override and n_protection_override */ +#define WLC_PROTECTION_AUTO -1 +#define WLC_PROTECTION_OFF 0 +#define WLC_PROTECTION_ON 1 +#define WLC_PROTECTION_MMHDR_ONLY 2 +#define WLC_PROTECTION_CTS_ONLY 3 + +/* values for g_protection_control and n_protection_control */ +#define WLC_PROTECTION_CTL_OFF 0 +#define WLC_PROTECTION_CTL_LOCAL 1 +#define WLC_PROTECTION_CTL_OVERLAP 2 + +/* values for n_protection */ +#define WLC_N_PROTECTION_OFF 0 +#define WLC_N_PROTECTION_OPTIONAL 1 +#define WLC_N_PROTECTION_20IN40 2 +#define WLC_N_PROTECTION_MIXEDMODE 3 + +/* values for band specific 40MHz capabilities */ +#define WLC_N_BW_20ALL 0 +#define WLC_N_BW_40ALL 1 +#define WLC_N_BW_20IN2G_40IN5G 2 + +/* bitflags for SGI support (sgi_rx iovar) */ +#define WLC_N_SGI_20 0x01 +#define WLC_N_SGI_40 0x02 + +/* defines used by the nrate iovar */ +#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ +#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ +#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ +#define NRATE_STF_SHIFT 8 /* stf mode shift */ +#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ +#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ +#define NRATE_SGI_SHIFT 23 /* sgi mode */ +#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ +#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ + +#define NRATE_STF_SISO 0 /* stf mode SISO */ +#define NRATE_STF_CDD 1 /* stf mode CDD */ +#define NRATE_STF_STBC 2 /* stf mode STBC */ +#define NRATE_STF_SDM 3 /* stf mode SDM */ + +#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ + +#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ + +typedef struct { + u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ + u8 num_antcfg; /* number of available antenna configurations */ +} wlc_antselcfg_t; + /* common functions for every port */ extern void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, bool piomode, void *regsva, uint bustype, void *btparam, diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index 87b252d..6c9574a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h b/drivers/staging/brcm80211/brcmsmac/wlc_scb.h index f07a891..fd7767c 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_scb.h @@ -17,6 +17,8 @@ #ifndef _wlc_scb_h_ #define _wlc_scb_h_ +#include /* for ETH_ALEN */ + #define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ /* structure to store per-tid state for the ampdu initiator */ typedef struct scb_ampdu_tid_ini { diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index 544d883..ca1b8aa 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 55631f3..65005471 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -147,4 +147,56 @@ typedef struct { struct wl_info; struct wlc_bsscfg; +#define WL_NUMRATES 16 /* max # of rates in a rateset */ +typedef struct wl_rateset { + u32 count; /* # rates in this set */ + u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ +} wl_rateset_t; + +#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ + +#define WLC_SET_CHANNEL 30 +#define WLC_SET_SRL 32 +#define WLC_SET_LRL 34 + +#define WLC_SET_RATESET 72 +#define WLC_SET_BCNPRD 76 +#define WLC_GET_CURR_RATESET 114 /* current rateset */ +#define WLC_GET_PHYLIST 180 + +/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ +#define WL_RADIO_SW_DISABLE (1<<0) +#define WL_RADIO_HW_DISABLE (1<<1) +#define WL_RADIO_MPC_DISABLE (1<<2) +#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ + +/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ +#define WL_TXPWR_OVERRIDE (1U<<31) + +/* band types */ +#define WLC_BAND_AUTO 0 /* auto-select */ +#define WLC_BAND_5G 1 /* 5 Ghz */ +#define WLC_BAND_2G 2 /* 2.4 Ghz */ +#define WLC_BAND_ALL 3 /* all bands */ + +/* Values for PM */ +#define PM_OFF 0 +#define PM_MAX 1 + +/* Message levels */ +#define WL_ERROR_VAL 0x00000001 +#define WL_TRACE_VAL 0x00000002 + +#define NFIFO 6 /* # tx/rx fifopairs */ + +#define PM_OFF 0 +#define PM_MAX 1 +#define PM_FAST 2 + +/* band range returned by band_range iovar */ +#define WL_CHAN_FREQ_RANGE_2G 0 +#define WL_CHAN_FREQ_RANGE_5GL 1 +#define WL_CHAN_FREQ_RANGE_5GM 2 +#define WL_CHAN_FREQ_RANGE_5GH 3 + #endif /* _bcmdefs_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/bcmwifi.h index a573ebf..f0dc6f8 100644 --- a/drivers/staging/brcm80211/include/bcmwifi.h +++ b/drivers/staging/brcm80211/include/bcmwifi.h @@ -17,6 +17,9 @@ #ifndef _bcmwifi_h_ #define _bcmwifi_h_ +#include /* for ETH_ALEN */ +#include /* for WLAN_PMKID_LEN */ + /* A chanspec holds the channel number, band, bandwidth and control sideband */ typedef u16 chanspec_t; @@ -164,4 +167,59 @@ extern u8 bcm_chspec_ctlchan(chanspec_t chspec); */ extern int bcm_mhz2channel(uint freq, uint start_factor); +/* Enumerate crypto algorithms */ +#define CRYPTO_ALGO_OFF 0 +#define CRYPTO_ALGO_WEP1 1 +#define CRYPTO_ALGO_TKIP 2 +#define CRYPTO_ALGO_WEP128 3 +#define CRYPTO_ALGO_AES_CCM 4 +#define CRYPTO_ALGO_AES_RESERVED1 5 +#define CRYPTO_ALGO_AES_RESERVED2 6 +#define CRYPTO_ALGO_NALG 7 + +/* wireless security bitvec */ +#define WEP_ENABLED 0x0001 +#define TKIP_ENABLED 0x0002 +#define AES_ENABLED 0x0004 +#define WSEC_SWFLAG 0x0008 +#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ + +/* WPA authentication mode bitvec */ +#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ +#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ +#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ +#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ +#define WPA_AUTH_RESERVED1 0x0008 +#define WPA_AUTH_RESERVED2 0x0010 + /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ +#define WPA2_AUTH_RESERVED1 0x0020 +#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ +#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ +#define WPA2_AUTH_RESERVED3 0x0200 +#define WPA2_AUTH_RESERVED4 0x0400 +#define WPA2_AUTH_RESERVED5 0x0800 + +/* pmkid */ +#define MAXPMKID 16 + +typedef struct _pmkid { + u8 BSSID[ETH_ALEN]; + u8 PMKID[WLAN_PMKID_LEN]; +} pmkid_t; + +typedef struct _pmkid_list { + u32 npmkid; + pmkid_t pmkid[1]; +} pmkid_list_t; + +typedef struct _pmkid_cand { + u8 BSSID[ETH_ALEN]; + u8 preauth; +} pmkid_cand_t; + +typedef struct _pmkid_cand_list { + u32 npmkid_cand; + pmkid_cand_t pmkid_cand[1]; +} pmkid_cand_list_t; + #endif /* _bcmwifi_h_ */ diff --git a/drivers/staging/brcm80211/include/wlioctl.h b/drivers/staging/brcm80211/include/wlioctl.h index 2876bd9..281ca70 100644 --- a/drivers/staging/brcm80211/include/wlioctl.h +++ b/drivers/staging/brcm80211/include/wlioctl.h @@ -17,1349 +17,4 @@ #ifndef _wlioctl_h_ #define _wlioctl_h_ -#include -#ifdef BRCM_FULLMAC -#include -#endif -#include -#include -#include - -#ifndef INTF_NAME_SIZ -#define INTF_NAME_SIZ 16 -#endif - -#ifdef BRCM_FULLMAC - -#define WL_BSS_INFO_VERSION 108 /* current ver of wl_bss_info struct */ - -/* BSS info structure - * Applications MUST CHECK ie_offset field and length field to access IEs and - * next bss_info structure in a vector (in wl_scan_results_t) - */ -typedef struct wl_bss_info { - u32 version; /* version field */ - u32 length; /* byte length of data in this record, - * starting at version and including IEs - */ - u8 BSSID[ETH_ALEN]; - u16 beacon_period; /* units are Kusec */ - u16 capability; /* Capability information */ - u8 SSID_len; - u8 SSID[32]; - struct { - uint count; /* # rates in this set */ - u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ - } rateset; /* supported rates */ - chanspec_t chanspec; /* chanspec for bss */ - u16 atim_window; /* units are Kusec */ - u8 dtim_period; /* DTIM period */ - s16 RSSI; /* receive signal strength (in dBm) */ - s8 phy_noise; /* noise (in dBm) */ - - u8 n_cap; /* BSS is 802.11N Capable */ - u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ - u8 ctl_ch; /* 802.11N BSS control channel number */ - u32 reserved32[1]; /* Reserved for expansion of BSS properties */ - u8 flags; /* flags */ - u8 reserved[3]; /* Reserved for expansion of BSS properties */ - u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ - - u16 ie_offset; /* offset at which IEs start, from beginning */ - u32 ie_length; /* byte length of Information Elements */ - s16 SNR; /* average SNR of during frame reception */ - /* Add new fields here */ - /* variable length Information Elements */ -} wl_bss_info_t; -#endif /* BRCM_FULLMAC */ - -typedef struct wlc_ssid { - u32 SSID_len; - unsigned char SSID[32]; -} wlc_ssid_t; - -#ifdef BRCM_FULLMAC -typedef struct chan_scandata { - u8 txpower; - u8 pad; - chanspec_t channel; /* Channel num, bw, ctrl_sb and band */ - u32 channel_mintime; - u32 channel_maxtime; -} chan_scandata_t; - -typedef enum wl_scan_type { - EXTDSCAN_FOREGROUND_SCAN, - EXTDSCAN_BACKGROUND_SCAN, - EXTDSCAN_FORCEDBACKGROUND_SCAN -} wl_scan_type_t; - -#define WLC_EXTDSCAN_MAX_SSID 5 - -#define WL_BSS_FLAGS_FROM_BEACON 0x01 /* bss_info derived from beacon */ -#define WL_BSS_FLAGS_FROM_CACHE 0x02 /* bss_info collected from cache */ -#define WL_BSS_FLAGS_RSSI_ONCHANNEL 0x04 /* rssi info was received on channel (vs offchannel) */ - -typedef struct wl_extdscan_params { - s8 nprobes; /* 0, passive, otherwise active */ - s8 split_scan; /* split scan */ - s8 band; /* band */ - s8 pad; - wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /* ssid list */ - u32 tx_rate; /* in 500ksec units */ - wl_scan_type_t scan_type; /* enum */ - s32 channel_num; - chan_scandata_t channel_list[1]; /* list of chandata structs */ -} wl_extdscan_params_t; - -#define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) - -#define WL_BSSTYPE_INFRA 1 -#define WL_BSSTYPE_INDEP 0 -#define WL_BSSTYPE_ANY 2 - -/* Bitmask for scan_type */ -#define WL_SCANFLAGS_PASSIVE 0x01 /* force passive scan */ -#define WL_SCANFLAGS_RESERVED 0x02 /* Reserved */ -#define WL_SCANFLAGS_PROHIBITED 0x04 /* allow scanning prohibited channels */ - -typedef struct wl_scan_params { - wlc_ssid_t ssid; /* default: {0, ""} */ - u8 bssid[ETH_ALEN]; /* default: bcast */ - s8 bss_type; /* default: any, - * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT - */ - u8 scan_type; /* flags, 0 use default */ - s32 nprobes; /* -1 use default, number of probes per channel */ - s32 active_time; /* -1 use default, dwell time per channel for - * active scanning - */ - s32 passive_time; /* -1 use default, dwell time per channel - * for passive scanning - */ - s32 home_time; /* -1 use default, dwell time for the home channel - * between channel scans - */ - s32 channel_num; /* count of channels and ssids that follow - * - * low half is count of channels in channel_list, 0 - * means default (use all available channels) - * - * high half is entries in wlc_ssid_t array that - * follows channel_list, aligned for s32 (4 bytes) - * meaning an odd channel count implies a 2-byte pad - * between end of channel_list and first ssid - * - * if ssid count is zero, single ssid in the fixed - * parameter portion is assumed, otherwise ssid in - * the fixed portion is ignored - */ - u16 channel_list[1]; /* list of chanspecs */ -} wl_scan_params_t; - -/* size of wl_scan_params not including variable length array */ -#define WL_SCAN_PARAMS_FIXED_SIZE 64 - -/* masks for channel and ssid count */ -#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff -#define WL_SCAN_PARAMS_NSSID_SHIFT 16 - -#define WL_SCAN_ACTION_START 1 -#define WL_SCAN_ACTION_CONTINUE 2 -#define WL_SCAN_ACTION_ABORT 3 - -#define ISCAN_REQ_VERSION 1 - -/* incremental scan struct */ -typedef struct wl_iscan_params { - u32 version; - u16 action; - u16 scan_duration; - wl_scan_params_t params; -} wl_iscan_params_t; - -/* 3 fields + size of wl_scan_params, not including variable length array */ -#define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_scan_results { - u32 buflen; - u32 version; - u32 count; - wl_bss_info_t bss_info[1]; -} wl_scan_results_t; - -/* size of wl_scan_results not including variable length array */ -#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) - -/* wl_iscan_results status values */ -#define WL_SCAN_RESULTS_SUCCESS 0 -#define WL_SCAN_RESULTS_PARTIAL 1 -#define WL_SCAN_RESULTS_PENDING 2 -#define WL_SCAN_RESULTS_ABORTED 3 -#define WL_SCAN_RESULTS_NO_MEM 4 - -#define ESCAN_REQ_VERSION 1 - -typedef struct wl_escan_params { - u32 version; - u16 action; - u16 sync_id; - wl_scan_params_t params; -} wl_escan_params_t; - -#define WL_ESCAN_PARAMS_FIXED_SIZE (offsetof(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_escan_result { - u32 buflen; - u32 version; - u16 sync_id; - u16 bss_count; - wl_bss_info_t bss_info[1]; -} wl_escan_result_t; - -#define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) - -/* incremental scan results struct */ -typedef struct wl_iscan_results { - u32 status; - wl_scan_results_t results; -} wl_iscan_results_t; - -/* size of wl_iscan_results not including variable length array */ -#define WL_ISCAN_RESULTS_FIXED_SIZE \ - (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results)) - -typedef struct wl_probe_params { - wlc_ssid_t ssid; - u8 bssid[ETH_ALEN]; - u8 mac[ETH_ALEN]; -} wl_probe_params_t; -#endif /* BRCM_FULLMAC */ - -#define WL_NUMRATES 16 /* max # of rates in a rateset */ -typedef struct wl_rateset { - u32 count; /* # rates in this set */ - u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ -} wl_rateset_t; - -#ifdef BRCM_FULLMAC -typedef struct wl_rateset_args { - u32 count; /* # rates in this set */ - u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ - u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ -} wl_rateset_args_t; - -/* u32 list */ -typedef struct wl_u32_list { - /* in - # of elements, out - # of entries */ - u32 count; - /* variable length u32 list */ - u32 element[1]; -} wl_u32_list_t; - -/* used for association with a specific BSSID and chanspec list */ -typedef struct wl_assoc_params { - u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */ - u16 bssid_cnt; - s32 chanspec_num; /* 0: all available channels, - * otherwise count of chanspecs in chanspec_list - */ - chanspec_t chanspec_list[1]; /* list of chanspecs */ -} wl_assoc_params_t; -#define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(chanspec_t)) - -/* used for reassociation/roam to a specific BSSID and channel */ -typedef wl_assoc_params_t wl_reassoc_params_t; -#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE - -/* used for join with or without a specific bssid and channel list */ -typedef struct wl_join_params { - wlc_ssid_t ssid; - wl_assoc_params_t params; /* optional field, but it must include the fixed portion - * of the wl_assoc_params_t struct when it does present. - */ -} wl_join_params_t; -#define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(chanspec_t)) - -#endif /* BRCM_FULLMAC */ - -/* defines used by the nrate iovar */ -#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ -#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ -#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ -#define NRATE_STF_SHIFT 8 /* stf mode shift */ -#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ -#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ -#define NRATE_SGI_SHIFT 23 /* sgi mode */ -#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ -#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ - -#define NRATE_STF_SISO 0 /* stf mode SISO */ -#define NRATE_STF_CDD 1 /* stf mode CDD */ -#define NRATE_STF_STBC 2 /* stf mode STBC */ -#define NRATE_STF_SDM 3 /* stf mode SDM */ - -#define ANTENNA_NUM_1 1 /* total number of antennas to be used */ -#define ANTENNA_NUM_2 2 -#define ANTENNA_NUM_3 3 -#define ANTENNA_NUM_4 4 - -#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ -#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ -#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ -#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ -#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ -#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ -#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ - -#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ - -typedef struct { - u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ - u8 num_antcfg; /* number of available antenna configurations */ -} wlc_antselcfg_t; - -#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ - -#ifdef BRCM_FULLMAC -#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */ -#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */ - -#define IBSS_MED 15 /* Mediom in-bss congestion percentage */ -#define IBSS_HI 25 /* Hi in-bss congestion percentage */ -#define OBSS_MED 12 -#define OBSS_HI 25 -#define INTERFER_MED 5 -#define INTERFER_HI 10 - -#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */ -#define CCA_FLAGS_PREFER_1_6_11 0x10 -#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */ - -#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */ -#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */ -#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */ -#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */ -#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */ - -typedef struct { - u32 duration; /* millisecs spent sampling this channel */ - u32 congest_ibss; /* millisecs in our bss (presumably this traffic will */ - /* move if cur bss moves channels) */ - u32 congest_obss; /* traffic not in our bss */ - u32 interference; /* millisecs detecting a non 802.11 interferer. */ - u32 timestamp; /* second timestamp */ -} cca_congest_t; - -typedef struct { - chanspec_t chanspec; /* Which channel? */ - u8 num_secs; /* How many secs worth of data */ - cca_congest_t secs[1]; /* Data */ -} cca_congest_channel_req_t; - -#endif /* BRCM_FULLMAC */ - -#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ - -#ifdef BRCM_FULLMAC -typedef struct wl_country { - char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in - * the Country IE - */ - s32 rev; /* revision specifier for ccode - * on set, -1 indicates unspecified. - * on get, rev >= 0 - */ - char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code. - * variable length, but fixed size in - * struct allows simple allocation for - * expected country strings <= 3 chars. - */ -} wl_country_t; - -typedef struct wl_channels_in_country { - u32 buflen; - u32 band; - char country_abbrev[WLC_CNTRY_BUF_SZ]; - u32 count; - u32 channel[1]; -} wl_channels_in_country_t; - -typedef struct wl_country_list { - u32 buflen; - u32 band_set; - u32 band; - u32 count; - char country_abbrev[1]; -} wl_country_list_t; - -#define WL_NUM_RPI_BINS 8 -#define WL_RM_TYPE_BASIC 1 -#define WL_RM_TYPE_CCA 2 -#define WL_RM_TYPE_RPI 3 - -#define WL_RM_FLAG_PARALLEL (1<<0) - -#define WL_RM_FLAG_LATE (1<<1) -#define WL_RM_FLAG_INCAPABLE (1<<2) -#define WL_RM_FLAG_REFUSED (1<<3) - -typedef struct wl_rm_req_elt { - s8 type; - s8 flags; - chanspec_t chanspec; - u32 token; /* token for this measurement */ - u32 tsf_h; /* TSF high 32-bits of Measurement start time */ - u32 tsf_l; /* TSF low 32-bits */ - u32 dur; /* TUs */ -} wl_rm_req_elt_t; - -typedef struct wl_rm_req { - u32 token; /* overall measurement set token */ - u32 count; /* number of measurement requests */ - void *cb; /* completion callback function: may be NULL */ - void *cb_arg; /* arg to completion callback function */ - wl_rm_req_elt_t req[1]; /* variable length block of requests */ -} wl_rm_req_t; -#define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req) - -typedef struct wl_rm_rep_elt { - s8 type; - s8 flags; - chanspec_t chanspec; - u32 token; /* token for this measurement */ - u32 tsf_h; /* TSF high 32-bits of Measurement start time */ - u32 tsf_l; /* TSF low 32-bits */ - u32 dur; /* TUs */ - u32 len; /* byte length of data block */ - u8 data[1]; /* variable length data block */ -} wl_rm_rep_elt_t; -#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */ - -#define WL_RPI_REP_BIN_NUM 8 -typedef struct wl_rm_rpi_rep { - u8 rpi[WL_RPI_REP_BIN_NUM]; - s8 rpi_max[WL_RPI_REP_BIN_NUM]; -} wl_rm_rpi_rep_t; - -typedef struct wl_rm_rep { - u32 token; /* overall measurement set token */ - u32 len; /* length of measurement report block */ - wl_rm_rep_elt_t rep[1]; /* variable length block of reports */ -} wl_rm_rep_t; -#define WL_RM_REP_FIXED_LEN 8 -#endif /* BRCM_FULLMAC */ - -/* Enumerate crypto algorithms */ -#define CRYPTO_ALGO_OFF 0 -#define CRYPTO_ALGO_WEP1 1 -#define CRYPTO_ALGO_TKIP 2 -#define CRYPTO_ALGO_WEP128 3 -#define CRYPTO_ALGO_AES_CCM 4 -#define CRYPTO_ALGO_AES_RESERVED1 5 -#define CRYPTO_ALGO_AES_RESERVED2 6 -#define CRYPTO_ALGO_NALG 7 - -#define WSEC_GEN_MIC_ERROR 0x0001 -#define WSEC_GEN_REPLAY 0x0002 -#define WSEC_GEN_ICV_ERROR 0x0004 - -#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ -#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ -#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ -#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ - -typedef struct wl_wsec_key { - u32 index; /* key index */ - u32 len; /* key length */ - u8 data[WLAN_MAX_KEY_LEN]; /* key data */ - u32 pad_1[18]; - u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - u32 flags; /* misc flags */ - u32 pad_2[2]; - int pad_3; - int iv_initialized; /* has IV been initialized already? */ - int pad_4; - /* Rx IV */ - struct { - u32 hi; /* upper 32 bits of IV */ - u16 lo; /* lower 16 bits of IV */ - } rxiv; - u32 pad_5[2]; - u8 ea[ETH_ALEN]; /* per station */ -} wl_wsec_key_t; - -#define WSEC_MIN_PSK_LEN 8 -#define WSEC_MAX_PSK_LEN 64 - -/* Flag for key material needing passhash'ing */ -#define WSEC_PASSPHRASE (1<<0) - -/* receptacle for WLC_SET_WSEC_PMK parameter */ -typedef struct { - unsigned short key_len; /* octets in key material */ - unsigned short flags; /* key handling qualification */ - u8 key[WSEC_MAX_PSK_LEN]; /* PMK material */ -} wsec_pmk_t; - -/* wireless security bitvec */ -#define WEP_ENABLED 0x0001 -#define TKIP_ENABLED 0x0002 -#define AES_ENABLED 0x0004 -#define WSEC_SWFLAG 0x0008 -#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ - -/* WPA authentication mode bitvec */ -#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ -#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ -#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ -#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ -#define WPA_AUTH_RESERVED1 0x0008 -#define WPA_AUTH_RESERVED2 0x0010 - /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ -#define WPA2_AUTH_RESERVED1 0x0020 -#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ -#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ -#define WPA2_AUTH_RESERVED3 0x0200 -#define WPA2_AUTH_RESERVED4 0x0400 -#define WPA2_AUTH_RESERVED5 0x0800 - -/* pmkid */ -#define MAXPMKID 16 - -typedef struct _pmkid { - u8 BSSID[ETH_ALEN]; - u8 PMKID[WLAN_PMKID_LEN]; -} pmkid_t; - -typedef struct _pmkid_list { - u32 npmkid; - pmkid_t pmkid[1]; -} pmkid_list_t; - -typedef struct _pmkid_cand { - u8 BSSID[ETH_ALEN]; - u8 preauth; -} pmkid_cand_t; - -typedef struct _pmkid_cand_list { - u32 npmkid_cand; - pmkid_cand_t pmkid_cand[1]; -} pmkid_cand_list_t; - -typedef struct wl_led_info { - u32 index; /* led index */ - u32 behavior; - u8 activehi; -} wl_led_info_t; - -/* R_REG and W_REG struct passed through ioctl */ -typedef struct { - u32 byteoff; /* byte offset of the field in d11regs_t */ - u32 val; /* read/write value of the field */ - u32 size; /* sizeof the field */ - uint band; /* band (optional) */ -} rw_reg_t; - - -#ifdef BRCM_FULLMAC -/* Used to get specific STA parameters */ -typedef struct { - u32 val; - u8 ea[ETH_ALEN]; -} scb_val_t; -#endif /* BRCM_FULLMAC */ - -/* channel encoding */ -typedef struct channel_info { - int hw_channel; - int target_channel; - int scan_channel; -} channel_info_t; - -/* For ioctls that take a list of MAC addresses */ -struct maclist { - uint count; /* number of MAC addresses */ - u8 ea[1][ETH_ALEN]; /* variable length array of MAC addresses */ -}; - -#ifdef BRCM_FULLMAC -/* Linux network driver ioctl encoding */ -typedef struct wl_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - u8 set; /* get or set request (optional) */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ -} wl_ioctl_t; -#endif /* BRCM_FULLMAC */ - - -/* - * Structure for passing hardware and software - * revision info up from the driver. - */ -typedef struct wlc_rev_info { - uint vendorid; /* PCI vendor id */ - uint deviceid; /* device id of chip */ - uint radiorev; /* radio revision */ - uint chiprev; /* chip revision */ - uint corerev; /* core revision */ - uint boardid; /* board identifier (usu. PCI sub-device id) */ - uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */ - uint boardrev; /* board revision */ - uint driverrev; /* driver version */ - uint ucoderev; /* microcode version */ - uint bus; /* bus type */ - uint chipnum; /* chip number */ - uint phytype; /* phy type */ - uint phyrev; /* phy revision */ - uint anarev; /* anacore rev */ - uint chippkg; /* chip package info */ -} wlc_rev_info_t; - -#define WL_REV_INFO_LEGACY_LENGTH 48 - -#ifdef BRCM_FULLMAC -#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ -#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */ -#define WLC_IOCTL_MAXLEN 8192 -#endif - -/* common ioctl definitions */ -#define WLC_GET_MAGIC 0 -#define WLC_GET_VERSION 1 -#define WLC_UP 2 -#define WLC_DOWN 3 -#define WLC_GET_LOOP 4 -#define WLC_SET_LOOP 5 -#define WLC_DUMP 6 -#define WLC_GET_MSGLEVEL 7 -#define WLC_SET_MSGLEVEL 8 -#define WLC_GET_PROMISC 9 -#define WLC_SET_PROMISC 10 -#define WLC_OVERLAY_IOCTL 11 -#define WLC_GET_RATE 12 - /* #define WLC_SET_RATE 13 *//* no longer supported */ -#define WLC_GET_INSTANCE 14 - /* #define WLC_GET_FRAG 15 *//* no longer supported */ - /* #define WLC_SET_FRAG 16 *//* no longer supported */ - /* #define WLC_GET_RTS 17 *//* no longer supported */ - /* #define WLC_SET_RTS 18 *//* no longer supported */ -#define WLC_GET_INFRA 19 -#define WLC_SET_INFRA 20 -#define WLC_GET_AUTH 21 -#define WLC_SET_AUTH 22 -#define WLC_GET_BSSID 23 -#define WLC_SET_BSSID 24 -#define WLC_GET_SSID 25 -#define WLC_SET_SSID 26 -#define WLC_RESTART 27 - /* #define WLC_DUMP_SCB 28 *//* no longer supported */ -#define WLC_GET_CHANNEL 29 -#define WLC_SET_CHANNEL 30 -#define WLC_GET_SRL 31 -#define WLC_SET_SRL 32 -#define WLC_GET_LRL 33 -#define WLC_SET_LRL 34 -#define WLC_GET_PLCPHDR 35 -#define WLC_SET_PLCPHDR 36 -#define WLC_GET_RADIO 37 -#define WLC_SET_RADIO 38 -#define WLC_GET_PHYTYPE 39 -#define WLC_DUMP_RATE 40 -#define WLC_SET_RATE_PARAMS 41 -#define WLC_GET_FIXRATE 42 -#define WLC_SET_FIXRATE 43 - /* #define WLC_GET_WEP 42 *//* no longer supported */ - /* #define WLC_SET_WEP 43 *//* no longer supported */ -#define WLC_GET_KEY 44 -#define WLC_SET_KEY 45 -#define WLC_GET_REGULATORY 46 -#define WLC_SET_REGULATORY 47 -#define WLC_GET_PASSIVE_SCAN 48 -#define WLC_SET_PASSIVE_SCAN 49 -#define WLC_SCAN 50 -#define WLC_SCAN_RESULTS 51 -#define WLC_DISASSOC 52 -#define WLC_REASSOC 53 -#define WLC_GET_ROAM_TRIGGER 54 -#define WLC_SET_ROAM_TRIGGER 55 -#define WLC_GET_ROAM_DELTA 56 -#define WLC_SET_ROAM_DELTA 57 -#define WLC_GET_ROAM_SCAN_PERIOD 58 -#define WLC_SET_ROAM_SCAN_PERIOD 59 -#define WLC_EVM 60 /* diag */ -#define WLC_GET_TXANT 61 -#define WLC_SET_TXANT 62 -#define WLC_GET_ANTDIV 63 -#define WLC_SET_ANTDIV 64 - /* #define WLC_GET_TXPWR 65 *//* no longer supported */ - /* #define WLC_SET_TXPWR 66 *//* no longer supported */ -#define WLC_GET_CLOSED 67 -#define WLC_SET_CLOSED 68 -#define WLC_GET_MACLIST 69 -#define WLC_SET_MACLIST 70 -#define WLC_GET_RATESET 71 -#define WLC_SET_RATESET 72 - /* #define WLC_GET_LOCALE 73 *//* no longer supported */ -#define WLC_LONGTRAIN 74 -#define WLC_GET_BCNPRD 75 -#define WLC_SET_BCNPRD 76 -#define WLC_GET_DTIMPRD 77 -#define WLC_SET_DTIMPRD 78 -#define WLC_GET_SROM 79 -#define WLC_SET_SROM 80 -#define WLC_GET_WEP_RESTRICT 81 -#define WLC_SET_WEP_RESTRICT 82 -#define WLC_GET_COUNTRY 83 -#define WLC_SET_COUNTRY 84 -#define WLC_GET_PM 85 -#define WLC_SET_PM 86 -#define WLC_GET_WAKE 87 -#define WLC_SET_WAKE 88 - /* #define WLC_GET_D11CNTS 89 *//* -> "counters" iovar */ -#define WLC_GET_FORCELINK 90 /* ndis only */ -#define WLC_SET_FORCELINK 91 /* ndis only */ -#define WLC_FREQ_ACCURACY 92 /* diag */ -#define WLC_CARRIER_SUPPRESS 93 /* diag */ -#define WLC_GET_PHYREG 94 -#define WLC_SET_PHYREG 95 -#define WLC_GET_RADIOREG 96 -#define WLC_SET_RADIOREG 97 -#define WLC_GET_REVINFO 98 -#define WLC_GET_UCANTDIV 99 -#define WLC_SET_UCANTDIV 100 -#define WLC_R_REG 101 -#define WLC_W_REG 102 -/* #define WLC_DIAG_LOOPBACK 103 old tray diag */ - /* #define WLC_RESET_D11CNTS 104 *//* -> "reset_d11cnts" iovar */ -#define WLC_GET_MACMODE 105 -#define WLC_SET_MACMODE 106 -#define WLC_GET_MONITOR 107 -#define WLC_SET_MONITOR 108 -#define WLC_GET_GMODE 109 -#define WLC_SET_GMODE 110 -#define WLC_GET_LEGACY_ERP 111 -#define WLC_SET_LEGACY_ERP 112 -#define WLC_GET_RX_ANT 113 -#define WLC_GET_CURR_RATESET 114 /* current rateset */ -#define WLC_GET_SCANSUPPRESS 115 -#define WLC_SET_SCANSUPPRESS 116 -#define WLC_GET_AP 117 -#define WLC_SET_AP 118 -#define WLC_GET_EAP_RESTRICT 119 -#define WLC_SET_EAP_RESTRICT 120 -#define WLC_SCB_AUTHORIZE 121 -#define WLC_SCB_DEAUTHORIZE 122 -#define WLC_GET_WDSLIST 123 -#define WLC_SET_WDSLIST 124 -#define WLC_GET_ATIM 125 -#define WLC_SET_ATIM 126 -#define WLC_GET_RSSI 127 -#define WLC_GET_PHYANTDIV 128 -#define WLC_SET_PHYANTDIV 129 -#define WLC_AP_RX_ONLY 130 -#define WLC_GET_TX_PATH_PWR 131 -#define WLC_SET_TX_PATH_PWR 132 -#define WLC_GET_WSEC 133 -#define WLC_SET_WSEC 134 -#define WLC_GET_PHY_NOISE 135 -#define WLC_GET_BSS_INFO 136 -#define WLC_GET_PKTCNTS 137 -#define WLC_GET_LAZYWDS 138 -#define WLC_SET_LAZYWDS 139 -#define WLC_GET_BANDLIST 140 -#define WLC_GET_BAND 141 -#define WLC_SET_BAND 142 -#define WLC_SCB_DEAUTHENTICATE 143 -#define WLC_GET_SHORTSLOT 144 -#define WLC_GET_SHORTSLOT_OVERRIDE 145 -#define WLC_SET_SHORTSLOT_OVERRIDE 146 -#define WLC_GET_SHORTSLOT_RESTRICT 147 -#define WLC_SET_SHORTSLOT_RESTRICT 148 -#define WLC_GET_GMODE_PROTECTION 149 -#define WLC_GET_GMODE_PROTECTION_OVERRIDE 150 -#define WLC_SET_GMODE_PROTECTION_OVERRIDE 151 -#define WLC_UPGRADE 152 - /* #define WLC_GET_MRATE 153 *//* no longer supported */ - /* #define WLC_SET_MRATE 154 *//* no longer supported */ -#define WLC_GET_IGNORE_BCNS 155 -#define WLC_SET_IGNORE_BCNS 156 -#define WLC_GET_SCB_TIMEOUT 157 -#define WLC_SET_SCB_TIMEOUT 158 -#define WLC_GET_ASSOCLIST 159 -#define WLC_GET_CLK 160 -#define WLC_SET_CLK 161 -#define WLC_GET_UP 162 -#define WLC_OUT 163 -#define WLC_GET_WPA_AUTH 164 -#define WLC_SET_WPA_AUTH 165 -#define WLC_GET_UCFLAGS 166 -#define WLC_SET_UCFLAGS 167 -#define WLC_GET_PWRIDX 168 -#define WLC_SET_PWRIDX 169 -#define WLC_GET_TSSI 170 -#define WLC_GET_SUP_RATESET_OVERRIDE 171 -#define WLC_SET_SUP_RATESET_OVERRIDE 172 - /* #define WLC_SET_FAST_TIMER 173 *//* no longer supported */ - /* #define WLC_GET_FAST_TIMER 174 *//* no longer supported */ - /* #define WLC_SET_SLOW_TIMER 175 *//* no longer supported */ - /* #define WLC_GET_SLOW_TIMER 176 *//* no longer supported */ - /* #define WLC_DUMP_PHYREGS 177 *//* no longer supported */ -#define WLC_GET_PROTECTION_CONTROL 178 -#define WLC_SET_PROTECTION_CONTROL 179 -#define WLC_GET_PHYLIST 180 -#define WLC_ENCRYPT_STRENGTH 181 /* ndis only */ -#define WLC_DECRYPT_STATUS 182 /* ndis only */ -#define WLC_GET_KEY_SEQ 183 -#define WLC_GET_SCAN_CHANNEL_TIME 184 -#define WLC_SET_SCAN_CHANNEL_TIME 185 -#define WLC_GET_SCAN_UNASSOC_TIME 186 -#define WLC_SET_SCAN_UNASSOC_TIME 187 -#define WLC_GET_SCAN_HOME_TIME 188 -#define WLC_SET_SCAN_HOME_TIME 189 -#define WLC_GET_SCAN_NPROBES 190 -#define WLC_SET_SCAN_NPROBES 191 -#define WLC_GET_PRB_RESP_TIMEOUT 192 -#define WLC_SET_PRB_RESP_TIMEOUT 193 -#define WLC_GET_ATTEN 194 -#define WLC_SET_ATTEN 195 -#define WLC_GET_SHMEM 196 /* diag */ -#define WLC_SET_SHMEM 197 /* diag */ - /* #define WLC_GET_GMODE_PROTECTION_CTS 198 *//* no longer supported */ - /* #define WLC_SET_GMODE_PROTECTION_CTS 199 *//* no longer supported */ -#define WLC_SET_WSEC_TEST 200 -#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201 -#define WLC_TKIP_COUNTERMEASURES 202 -#define WLC_GET_PIOMODE 203 -#define WLC_SET_PIOMODE 204 -#define WLC_SET_ASSOC_PREFER 205 -#define WLC_GET_ASSOC_PREFER 206 -#define WLC_SET_ROAM_PREFER 207 -#define WLC_GET_ROAM_PREFER 208 -#define WLC_SET_LED 209 -#define WLC_GET_LED 210 -#define WLC_RESERVED6 211 -#define WLC_RESERVED7 212 -#define WLC_GET_CHANNEL_QA 213 -#define WLC_START_CHANNEL_QA 214 -#define WLC_GET_CHANNEL_SEL 215 -#define WLC_START_CHANNEL_SEL 216 -#define WLC_GET_VALID_CHANNELS 217 -#define WLC_GET_FAKEFRAG 218 -#define WLC_SET_FAKEFRAG 219 -#define WLC_GET_PWROUT_PERCENTAGE 220 -#define WLC_SET_PWROUT_PERCENTAGE 221 -#define WLC_SET_BAD_FRAME_PREEMPT 222 -#define WLC_GET_BAD_FRAME_PREEMPT 223 -#define WLC_SET_LEAP_LIST 224 -#define WLC_GET_LEAP_LIST 225 -#define WLC_GET_CWMIN 226 -#define WLC_SET_CWMIN 227 -#define WLC_GET_CWMAX 228 -#define WLC_SET_CWMAX 229 -#define WLC_GET_WET 230 -#define WLC_SET_WET 231 -#define WLC_GET_PUB 232 - /* #define WLC_SET_GLACIAL_TIMER 233 *//* no longer supported */ - /* #define WLC_GET_GLACIAL_TIMER 234 *//* no longer supported */ -#define WLC_GET_KEY_PRIMARY 235 -#define WLC_SET_KEY_PRIMARY 236 - /* #define WLC_DUMP_RADIOREGS 237 *//* no longer supported */ -#define WLC_RESERVED4 238 -#define WLC_RESERVED5 239 -#define WLC_UNSET_CALLBACK 240 -#define WLC_SET_CALLBACK 241 -#define WLC_GET_RADAR 242 -#define WLC_SET_RADAR 243 -#define WLC_SET_SPECT_MANAGMENT 244 -#define WLC_GET_SPECT_MANAGMENT 245 -#define WLC_WDS_GET_REMOTE_HWADDR 246 /* handled in wl_linux.c/wl_vx.c */ -#define WLC_WDS_GET_WPA_SUP 247 -#define WLC_SET_CS_SCAN_TIMER 248 -#define WLC_GET_CS_SCAN_TIMER 249 -#define WLC_MEASURE_REQUEST 250 -#define WLC_INIT 251 -#define WLC_SEND_QUIET 252 -#define WLC_KEEPALIVE 253 -#define WLC_SEND_PWR_CONSTRAINT 254 -#define WLC_UPGRADE_STATUS 255 -#define WLC_CURRENT_PWR 256 -#define WLC_GET_SCAN_PASSIVE_TIME 257 -#define WLC_SET_SCAN_PASSIVE_TIME 258 -#define WLC_LEGACY_LINK_BEHAVIOR 259 -#define WLC_GET_CHANNELS_IN_COUNTRY 260 -#define WLC_GET_COUNTRY_LIST 261 -#define WLC_GET_VAR 262 /* get value of named variable */ -#define WLC_SET_VAR 263 /* set named variable to value */ -#define WLC_NVRAM_GET 264 /* deprecated */ -#define WLC_NVRAM_SET 265 -#define WLC_NVRAM_DUMP 266 -#define WLC_REBOOT 267 -#define WLC_SET_WSEC_PMK 268 -#define WLC_GET_AUTH_MODE 269 -#define WLC_SET_AUTH_MODE 270 -#define WLC_GET_WAKEENTRY 271 -#define WLC_SET_WAKEENTRY 272 -#define WLC_NDCONFIG_ITEM 273 /* currently handled in wl_oid.c */ -#define WLC_NVOTPW 274 -#define WLC_OTPW 275 -#define WLC_IOV_BLOCK_GET 276 -#define WLC_IOV_MODULES_GET 277 -#define WLC_SOFT_RESET 278 -#define WLC_GET_ALLOW_MODE 279 -#define WLC_SET_ALLOW_MODE 280 -#define WLC_GET_DESIRED_BSSID 281 -#define WLC_SET_DESIRED_BSSID 282 -#define WLC_DISASSOC_MYAP 283 -#define WLC_GET_RESERVED10 284 -#define WLC_GET_RESERVED11 285 -#define WLC_GET_RESERVED12 286 -#define WLC_GET_RESERVED13 287 -#define WLC_GET_RESERVED14 288 -#define WLC_SET_RESERVED15 289 -#define WLC_SET_RESERVED16 290 -#define WLC_GET_RESERVED17 291 -#define WLC_GET_RESERVED18 292 -#define WLC_GET_RESERVED19 293 -#define WLC_SET_RESERVED1A 294 -#define WLC_GET_RESERVED1B 295 -#define WLC_GET_RESERVED1C 296 -#define WLC_GET_RESERVED1D 297 -#define WLC_SET_RESERVED1E 298 -#define WLC_GET_RESERVED1F 299 -#define WLC_GET_RESERVED20 300 -#define WLC_GET_RESERVED21 301 -#define WLC_GET_RESERVED22 302 -#define WLC_GET_RESERVED23 303 -#define WLC_GET_RESERVED24 304 -#define WLC_SET_RESERVED25 305 -#define WLC_GET_RESERVED26 306 -#define WLC_NPHY_SAMPLE_COLLECT 307 /* Nphy sample collect mode */ -#define WLC_UM_PRIV 308 /* for usermode driver private ioctl */ -#define WLC_GET_CMD 309 - /* #define WLC_LAST 310 *//* Never used - can be reused */ -#define WLC_RESERVED8 311 -#define WLC_RESERVED9 312 -#define WLC_RESERVED1 313 -#define WLC_RESERVED2 314 -#define WLC_RESERVED3 315 -#define WLC_LAST 316 - -#ifndef EPICTRL_COOKIE -#define EPICTRL_COOKIE 0xABADCEDE -#endif - -#define WL_DECRYPT_STATUS_SUCCESS 1 -#define WL_DECRYPT_STATUS_FAILURE 2 -#define WL_DECRYPT_STATUS_UNKNOWN 3 - -/* allows user-mode app to poll the status of USB image upgrade */ -#define WLC_UPGRADE_SUCCESS 0 -#define WLC_UPGRADE_PENDING 1 - -/* WLC_GET_AUTH, WLC_SET_AUTH values */ -#define WL_AUTH_OPEN_SYSTEM 0 /* d11 open authentication */ -#define WL_AUTH_SHARED_KEY 1 /* d11 shared authentication */ -#define WL_AUTH_OPEN_SHARED 2 /* try open, then shared if open failed w/rc 13 */ - -/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ -#define WL_RADIO_SW_DISABLE (1<<0) -#define WL_RADIO_HW_DISABLE (1<<1) -#define WL_RADIO_MPC_DISABLE (1<<2) -#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ - -#define WL_SPURAVOID_OFF 0 -#define WL_SPURAVOID_ON1 1 -#define WL_SPURAVOID_ON2 2 - -/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ -#define WL_TXPWR_OVERRIDE (1U<<31) - -#define WL_PHY_PAVARS_LEN 6 /* Phy type, Band range, chain, a1, b0, b1 */ - -typedef struct wl_po { - u16 phy_type; /* Phy type */ - u16 band; - u16 cckpo; - u32 ofdmpo; - u16 mcspo[8]; -} wl_po_t; - -/* a large TX Power as an init value to factor out of min() calculations, - * keep low enough to fit in an s8, units are .25 dBm - */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ - -/* "diag" iovar argument and error code */ -#define WL_DIAG_INTERRUPT 1 /* d11 loopback interrupt test */ -#define WL_DIAG_LOOPBACK 2 /* d11 loopback data test */ -#define WL_DIAG_MEMORY 3 /* d11 memory test */ -#define WL_DIAG_LED 4 /* LED test */ -#define WL_DIAG_REG 5 /* d11/phy register test */ -#define WL_DIAG_SROM 6 /* srom read/crc test */ -#define WL_DIAG_DMA 7 /* DMA test */ - -#define WL_DIAGERR_SUCCESS 0 -#define WL_DIAGERR_FAIL_TO_RUN 1 /* unable to run requested diag */ -#define WL_DIAGERR_NOT_SUPPORTED 2 /* diag requested is not supported */ -#define WL_DIAGERR_INTERRUPT_FAIL 3 /* loopback interrupt test failed */ -#define WL_DIAGERR_LOOPBACK_FAIL 4 /* loopback data test failed */ -#define WL_DIAGERR_SROM_FAIL 5 /* srom read failed */ -#define WL_DIAGERR_SROM_BADCRC 6 /* srom crc failed */ -#define WL_DIAGERR_REG_FAIL 7 /* d11/phy register test failed */ -#define WL_DIAGERR_MEMORY_FAIL 8 /* d11 memory test failed */ -#define WL_DIAGERR_NOMEM 9 /* diag test failed due to no memory */ -#define WL_DIAGERR_DMA_FAIL 10 /* DMA test failed */ - -#define WL_DIAGERR_MEMORY_TIMEOUT 11 /* d11 memory test didn't finish in time */ -#define WL_DIAGERR_MEMORY_BADPATTERN 12 /* d11 memory test result in bad pattern */ - -/* band types */ -#define WLC_BAND_AUTO 0 /* auto-select */ -#define WLC_BAND_5G 1 /* 5 Ghz */ -#define WLC_BAND_2G 2 /* 2.4 Ghz */ -#define WLC_BAND_ALL 3 /* all bands */ - -/* band range returned by band_range iovar */ -#define WL_CHAN_FREQ_RANGE_2G 0 -#define WL_CHAN_FREQ_RANGE_5GL 1 -#define WL_CHAN_FREQ_RANGE_5GM 2 -#define WL_CHAN_FREQ_RANGE_5GH 3 - -/* phy types (returned by WLC_GET_PHYTPE) */ -#define WLC_PHY_TYPE_A 0 -#define WLC_PHY_TYPE_B 1 -#define WLC_PHY_TYPE_G 2 -#define WLC_PHY_TYPE_N 4 -#define WLC_PHY_TYPE_LP 5 -#define WLC_PHY_TYPE_SSN 6 -#define WLC_PHY_TYPE_HT 7 -#define WLC_PHY_TYPE_LCN 8 -#define WLC_PHY_TYPE_NULL 0xf - -/* MAC list modes */ -#define WLC_MACMODE_DISABLED 0 /* MAC list disabled */ -#define WLC_MACMODE_DENY 1 /* Deny specified (i.e. allow unspecified) */ -#define WLC_MACMODE_ALLOW 2 /* Allow specified (i.e. deny unspecified) */ - -/* - * 54g modes (basic bits may still be overridden) - * - * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 - * Preamble: Long - * Shortslot: Off - * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: Auto - * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 - * Extended Rateset: 6b, 9, 12b, 48 - * Preamble: Short required - * Shortslot: Auto - * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: On - * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 - * Preamble: Short required - * Shortslot: On and required - * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b - * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 - * Preamble: Long - * Shortslot: Auto - */ -#define GMODE_LEGACY_B 0 -#define GMODE_AUTO 1 -#define GMODE_ONLY 2 -#define GMODE_B_DEFERRED 3 -#define GMODE_PERFORMANCE 4 -#define GMODE_LRS 5 -#define GMODE_MAX 6 - -/* values for PLCPHdr_override */ -#define WLC_PLCP_AUTO -1 -#define WLC_PLCP_SHORT 0 -#define WLC_PLCP_LONG 1 - -/* values for g_protection_override and n_protection_override */ -#define WLC_PROTECTION_AUTO -1 -#define WLC_PROTECTION_OFF 0 -#define WLC_PROTECTION_ON 1 -#define WLC_PROTECTION_MMHDR_ONLY 2 -#define WLC_PROTECTION_CTS_ONLY 3 - -/* values for g_protection_control and n_protection_control */ -#define WLC_PROTECTION_CTL_OFF 0 -#define WLC_PROTECTION_CTL_LOCAL 1 -#define WLC_PROTECTION_CTL_OVERLAP 2 - -/* values for n_protection */ -#define WLC_N_PROTECTION_OFF 0 -#define WLC_N_PROTECTION_OPTIONAL 1 -#define WLC_N_PROTECTION_20IN40 2 -#define WLC_N_PROTECTION_MIXEDMODE 3 - -/* values for n_preamble_type */ -#define WLC_N_PREAMBLE_MIXEDMODE 0 -#define WLC_N_PREAMBLE_GF 1 -#define WLC_N_PREAMBLE_GF_BRCM 2 - -/* values for band specific 40MHz capabilities */ -#define WLC_N_BW_20ALL 0 -#define WLC_N_BW_40ALL 1 -#define WLC_N_BW_20IN2G_40IN5G 2 - -/* values to force tx/rx chain */ -#define WLC_N_TXRX_CHAIN0 0 -#define WLC_N_TXRX_CHAIN1 1 - -/* bitflags for SGI support (sgi_rx iovar) */ -#define WLC_N_SGI_20 0x01 -#define WLC_N_SGI_40 0x02 - -/* Values for PM */ -#define PM_OFF 0 -#define PM_MAX 1 - -/* interference mitigation options */ -#define INTERFERE_OVRRIDE_OFF -1 /* interference override off */ -#define INTERFERE_NONE 0 /* off */ -#define NON_WLAN 1 /* foreign/non 802.11 interference, no auto detect */ -#define WLAN_MANUAL 2 /* ACI: no auto detection */ -#define WLAN_AUTO 3 /* ACI: auto detect */ -#define WLAN_AUTO_W_NOISE 4 /* ACI: auto - detect and non 802.11 interference */ -#define AUTO_ACTIVE (1 << 7) /* Auto is currently active */ - -#define WL_RSSI_ANT_VERSION 1 /* current version of wl_rssi_ant_t */ -#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ -#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ -#define WL_ANT_IDX_1 0 /* antenna index 1 */ -#define WL_ANT_IDX_2 1 /* antenna index 2 */ - -#ifndef WL_RSSI_ANT_MAX -#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ -#elif WL_RSSI_ANT_MAX != 4 -#error "WL_RSSI_ANT_MAX does not match" -#endif - -/* RSSI per antenna */ -typedef struct { - u32 version; /* version field */ - u32 count; /* number of valid antenna rssi */ - s8 rssi_ant[WL_RSSI_ANT_MAX]; /* rssi per antenna */ -} wl_rssi_ant_t; - -#define NUM_PWRCTRL_RATES 12 - -typedef struct { - u8 txpwr_band_max[NUM_PWRCTRL_RATES]; /* User set target */ - u8 txpwr_limit[NUM_PWRCTRL_RATES]; /* reg and local power limit */ - u8 txpwr_local_max; /* local max according to the AP */ - u8 txpwr_local_constraint; /* local constraint according to the AP */ - u8 txpwr_chan_reg_max; /* Regulatory max for this channel */ - u8 txpwr_target[2][NUM_PWRCTRL_RATES]; /* Latest target for 2.4 and 5 Ghz */ - u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - u8 txpwr_opo[NUM_PWRCTRL_RATES]; /* On G phy, OFDM power offset */ - u8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /* Max CCK power for this band (SROM) */ - u8 txpwr_bphy_ofdm_max; /* Max OFDM power for this band (SROM) */ - u8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /* Max power for A band (SROM) */ - s8 txpwr_antgain[2]; /* Ant gain for each band - from SROM */ - u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_power_legacy_t; - -#define WL_TX_POWER_RATES_LEGACY 45 -#define WL_TX_POWER_MCS20_FIRST 12 -#define WL_TX_POWER_MCS20_NUM 16 -#define WL_TX_POWER_MCS40_FIRST 28 -#define WL_TX_POWER_MCS40_NUM 17 - - -#define WL_TX_POWER_RATES 101 -#define WL_TX_POWER_CCK_FIRST 0 -#define WL_TX_POWER_CCK_NUM 4 -#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM_NUM 8 -#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ -#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ -#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ -#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ -#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ -#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ -#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ -#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ -#define WL_TX_POWER_MCS_1_STREAM_NUM 8 -#define WL_TX_POWER_MCS_2_STREAM_NUM 8 -#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ -#define WL_TX_POWER_MCS_32_NUM 1 - -/* sslpnphy specifics */ -#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ - -/* tx_power_t.flags bits */ -#define WL_TX_POWER_F_ENABLED 1 -#define WL_TX_POWER_F_HW 2 -#define WL_TX_POWER_F_MIMO 4 -#define WL_TX_POWER_F_SISO 8 - -typedef struct { - u32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - u8 local_max; /* local max according to the AP */ - u8 local_constraint; /* local constraint according to the AP */ - s8 antgain[2]; /* Ant gain for each band - from SROM */ - u8 rf_cores; /* count of RF Cores being reported */ - u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ - u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain - * without adjustment - */ - u8 est_Pout_cck; /* Latest CCK tx power out estimate */ - u8 tx_power_max[4]; /* Maximum target power among all rates */ - u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ - u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ - u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ - u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ - u8 target[WL_TX_POWER_RATES]; /* Latest target power */ -} tx_power_t; - -typedef struct tx_inst_power { - u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_inst_power_t; - -/* Message levels */ -#define WL_ERROR_VAL 0x00000001 -#define WL_TRACE_VAL 0x00000002 - -/* maximum channels returned by the get valid channels iovar */ -#define WL_NUMCHANNELS 64 -#define WL_NUMCHANSPECS 100 - -struct tsinfo_arg { - u8 octets[3]; -}; - -#define NFIFO 6 /* # tx/rx fifopairs */ - -struct wl_msglevel2 { - u32 low; - u32 high; -}; - -/* structure for per-tid ampdu control */ -struct ampdu_tid_control { - u8 tid; /* tid */ - u8 enable; /* enable/disable */ -}; - -/* structure for identifying ea/tid for sending addba/delba */ -struct ampdu_ea_tid { - u8 ea[ETH_ALEN]; /* Station address */ - u8 tid; /* tid */ -}; -/* structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ -struct ampdu_retry_tid { - u8 tid; /* tid */ - u8 retry; /* retry value */ -}; - - -/* Software feature flag defines used by wlfeatureflag */ -#define WL_SWFL_NOHWRADIO 0x0004 -#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ -#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ - -#define WL_LIFETIME_MAX 0xFFFF /* Max value in ms */ - - -/* Pattern matching filter. Specifies an offset within received packets to - * start matching, the pattern to match, the size of the pattern, and a bitmask - * that indicates which bits within the pattern should be matched. - */ -typedef struct wl_pkt_filter_pattern { - u32 offset; /* Offset within received packet to start pattern matching. - * Offset '0' is the first byte of the ethernet header. - */ - u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ - u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts - * at offset 0. Pattern immediately follows mask. - */ -} wl_pkt_filter_pattern_t; - -/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ -typedef struct wl_pkt_filter { - u32 id; /* Unique filter id, specified by app. */ - u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ - u32 negate_match; /* Negate the result of filter matches */ - union { /* Filter definitions */ - wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */ - } u; -} wl_pkt_filter_t; - -#define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u) -#define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern) - -/* IOVAR "pkt_filter_enable" parameter. */ -typedef struct wl_pkt_filter_enable { - u32 id; /* Unique filter id */ - u32 enable; /* Enable/disable bool */ -} wl_pkt_filter_enable_t; - - -#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ - -/* n-mode support capability */ -/* 2x2 includes both 1x1 & 2x2 devices - * reserved #define 2 for future when we want to separate 1x1 & 2x2 and - * control it independently - */ -#define WL_11N_2x2 1 -#define WL_11N_3x3 3 -#define WL_11N_4x4 4 - -/* define 11n feature disable flags */ -#define WLFEATURE_DISABLE_11N 0x00000001 -#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 -#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 -#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 -#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 -#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 -#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 -#define WLFEATURE_DISABLE_11N_GF 0x00000080 - -#define WL_EVENTING_MASK_LEN 16 - -#define TOE_TX_CSUM_OL 0x00000001 -#define TOE_RX_CSUM_OL 0x00000002 - -#define PM_OFF 0 -#define PM_MAX 1 -#define PM_FAST 2 - -typedef enum sup_auth_status { - WLC_SUP_DISCONNECTED = 0, - WLC_SUP_CONNECTING, - WLC_SUP_IDREQUIRED, - WLC_SUP_AUTHENTICATING, - WLC_SUP_AUTHENTICATED, - WLC_SUP_KEYXCHANGE, - WLC_SUP_KEYED, - WLC_SUP_TIMEOUT, - WLC_SUP_LAST_BASIC_STATE, - WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, - WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, - WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, - WLC_SUP_KEYXCHANGE_PREP_M4, - WLC_SUP_KEYXCHANGE_WAIT_G1, - WLC_SUP_KEYXCHANGE_PREP_G2 -} sup_auth_status_t; #endif /* _wlioctl_h_ */ -- cgit v0.10.2 From 5688aac73d2fdcce9ff7cd1e959bd29a6794ef62 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:55 +0200 Subject: staging: brcm80211: removed wlioctl.h and dhdioctl.h Code cleanup. These header files were emptied by the previous patch. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h index 0817f13..d0fa231 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h @@ -97,7 +97,4 @@ #define DHD_NONE(args) extern int dhd_msg_level; -/* Defines msg bits */ -#include - #endif /* _dhd_dbg_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h index 16b8942..d0c8321 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h @@ -17,8 +17,6 @@ #ifndef _dhd_proto_h_ #define _dhd_proto_h_ -#include - #ifndef IOCTL_RESP_TIMEOUT #define IOCTL_RESP_TIMEOUT 2000 /* In milli second */ #endif diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index a71c6f8..b613661 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -50,7 +50,6 @@ #include #include #include -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h deleted file mode 100644 index db0b9e8..0000000 --- a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _dhdioctl_h_ -#define _dhdioctl_h_ - -#endif /* _dhdioctl_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index bf57e18..88144d4 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -23,7 +23,6 @@ #include #include -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index b284b12..b5cb897 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -26,7 +26,6 @@ #include #include -#include #include typedef const struct si_pub si_t; diff --git a/drivers/staging/brcm80211/include/wlioctl.h b/drivers/staging/brcm80211/include/wlioctl.h deleted file mode 100644 index 281ca70..0000000 --- a/drivers/staging/brcm80211/include/wlioctl.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlioctl_h_ -#define _wlioctl_h_ - -#endif /* _wlioctl_h_ */ -- cgit v0.10.2 From 85d63686d89273f2879002310836b2bf41bc211c Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:44:56 +0200 Subject: staging: brcm80211: updated MAINTAINERS, README and TODO files README now only contains a link to the brcm80211 driver page. Two maintainers have been added, one deleted. TODO file has also been updated. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/MAINTAINERS b/MAINTAINERS index 29801f7..39c17dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1533,9 +1533,10 @@ F: drivers/net/tg3.* BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER M: Brett Rudley M: Henry Ptasinski -M: Dowan Kim M: Roland Vossen M: Arend van Spriel +M: Franky (Zhenhui) Lin +M: Kan Yan L: linux-wireless@vger.kernel.org S: Supported F: drivers/staging/brcm80211/ diff --git a/drivers/staging/brcm80211/README b/drivers/staging/brcm80211/README index 8ad5586..bb86b1b 100644 --- a/drivers/staging/brcm80211/README +++ b/drivers/staging/brcm80211/README @@ -1,64 +1 @@ -Broadcom brcmsmac (mac80211-based softmac PCIe) and brcmfmac (SDIO) drivers. - -Completely open source host drivers, no binary object files. - -Support for the following chips: -=============================== - - brcmsmac (PCIe) - Name Device ID - BCM4313 0x4727 - BCM43224 0x4353 - BCM43225 0x4357 - - brcmfmac (SDIO) - Name - BCM4329 - -Both brcmsmac and brcmfmac drivers require firmware files that need to be -separately downloaded. - -Firmware -====================== -Firmware is available from the Linux firmware repository at: - - git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git - http://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git - https://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git - - -=============================================================== -Broadcom brcmsmac driver -=============================================================== -- Support for both 32 and 64 bit Linux kernels - - -Firmware installation -====================== -Copy brcm/bcm43xx-0.fw and brcm/bcm43xx_hdr-0.fw to -/lib/firmware/brcm (or wherever firmware is normally installed -on your system). - - -=============================================================== -Broadcom brcmfmac driver -=============================================================== -- Support for 32 bit Linux kernel, 64 bit untested - - -Firmware installation -====================== -Copy brcm/bcm4329-fullmac-4.bin and brcm/bcm4329-fullmac-4.txt -to /lib/firmware/brcm (or wherever firmware is normally installed on your -system). - - -Contact Info: -============= -Brett Rudley brudley@broadcom.com -Henry Ptasinski henryp@broadcom.com -Dowan Kim dowan@broadcom.com -Roland Vossen rvossen@broadcom.com -Arend van Spriel arend@broadcom.com - -For more info, refer to: http://linuxwireless.org/en/users/Drivers/brcm80211 +refer to: http://linuxwireless.org/en/users/Drivers/brcm80211 diff --git a/drivers/staging/brcm80211/TODO b/drivers/staging/brcm80211/TODO index e9c1393..2d9948d 100644 --- a/drivers/staging/brcm80211/TODO +++ b/drivers/staging/brcm80211/TODO @@ -2,14 +2,22 @@ To Do List for Broadcom Mac80211 driver before getting in mainline Bugs ==== -- Oops on AMPDU traffic, to be solved by new ucode (currently under test) +- none known at this moment brcmfmac and brcmsmac ===================== -- ASSERTS not allowed in mainline, replace by warning + error handling -- Replace printk and WL_ERROR() with proper routines + +- Remove unnecessary includes, move #includes from .h files into .c files. +- Absorb and delete header files that are included in only one .c file brcmfmac ===================== + +- ASSERTS not allowed in mainline, replace by warning + error handling +- Replace printk and WL_ERROR() with proper routines - Replace driver's proprietary ssb interface with generic kernel ssb module - Build and test on 64 bit linux kernel + +brcm80211 info page +===================== +http://linuxwireless.org/en/users/Drivers/brcm80211 -- cgit v0.10.2 From 404b32869fadf46770c5cdffa06cc31f3f1e53ab Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:44:57 +0200 Subject: staging: brcm80211: remove iovars IOV_BLOCKMODE Remove unused sdio related iovars IOV_BLCOKMODE for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index c0ffbd3..4b13f42 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -138,7 +138,6 @@ sdioh_info_t *sdioh_attach(void *bar0, uint irq) } sd->num_funcs = 2; - sd->sd_blockmode = true; sd->use_client_ints = true; sd->client_block_size[0] = 64; @@ -352,7 +351,6 @@ uint sdioh_query_iofnum(sdioh_info_t *sd) /* IOVar table */ enum { IOV_MSGLEVEL = 1, - IOV_BLOCKMODE, IOV_BLOCKSIZE, IOV_DMA, IOV_USEINTS, @@ -371,7 +369,6 @@ enum { const bcm_iovar_t sdioh_iovars[] = { {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0}, - {"sd_blockmode", IOV_BLOCKMODE, 0, IOVT_BOOL, 0}, {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) | size) */ {"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0}, @@ -457,16 +454,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, sd_msglevel = int_val; break; - case IOV_GVAL(IOV_BLOCKMODE): - int_val = (s32) si->sd_blockmode; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_BLOCKMODE): - si->sd_blockmode = (bool) int_val; - /* Haven't figured out how to make non-block mode with DMA */ - break; - case IOV_GVAL(IOV_BLOCKSIZE): if ((u32) int_val > si->num_funcs) { bcmerror = -EINVAL; -- cgit v0.10.2 From c3299379d5c3464fd34038760ddaa2cfc531320e Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:44:58 +0200 Subject: staging: brcm80211: remove iovars IOV_DMA Remove unused sdio related iovars IOV_DMA for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 4b13f42..a0f2463 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -54,7 +54,6 @@ uint sd_power = 1; /* Default to SD Slot powered ON */ uint sd_clock = 1; /* Default to SD Clock turned ON */ uint sd_hiok = false; /* Don't use hi-speed mode by default */ uint sd_msglevel = 0x01; -uint sd_use_dma = true; DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait); @@ -352,7 +351,6 @@ uint sdioh_query_iofnum(sdioh_info_t *sd) enum { IOV_MSGLEVEL = 1, IOV_BLOCKSIZE, - IOV_DMA, IOV_USEINTS, IOV_NUMINTS, IOV_NUMLOCALINTS, @@ -371,7 +369,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0}, {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) | size) */ - {"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0}, {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0}, {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0}, @@ -505,15 +502,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_DMA): - int_val = (s32) si->sd_use_dma; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_DMA): - si->sd_use_dma = (bool) int_val; - break; - case IOV_GVAL(IOV_USEINTS): int_val = (s32) si->use_client_ints; memcpy(arg, &int_val, val_size); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h index 3ef42b3..86f88bf 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h @@ -85,7 +85,6 @@ struct sdioh_info { uint irq; /* Client irq */ int intrcount; /* Client interrupts */ - bool sd_use_dma; /* DMA on CMD53 */ bool sd_blockmode; /* sd_blockmode == false => 64 Byte Cmd 53s. */ /* Must be on for sd_multiblock to be effective */ bool use_client_ints; /* If this is false, make sure to restore */ -- cgit v0.10.2 From a1730b8ce1e9cfb3657fa4bd8d7e273ae9e25496 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:44:59 +0200 Subject: staging: brcm80211: remove iovars IOV_NUMLOCALINTS Remove unused sdio related iovars IOV_NUMLOCALINTS for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index a0f2463..44b1371 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -353,7 +353,6 @@ enum { IOV_BLOCKSIZE, IOV_USEINTS, IOV_NUMINTS, - IOV_NUMLOCALINTS, IOV_HOSTREG, IOV_DEVREG, IOV_DIVISOR, @@ -371,7 +370,6 @@ const bcm_iovar_t sdioh_iovars[] = { size) */ {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0}, {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, - {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0}, {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} @@ -566,11 +564,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_NUMLOCALINTS): - int_val = (s32) 0; - memcpy(arg, &int_val, val_size); - break; - case IOV_GVAL(IOV_HOSTREG): { sdreg_t *sd_ptr = (sdreg_t *) params; -- cgit v0.10.2 From 4c0951c7481b036dbd8dafdb6aa41b6d226669e6 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:00 +0200 Subject: staging: brcm80211: remove iovars IOV_HOSTREG Remove unused sdio related iovars IOV_HOSTREG for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 44b1371..f24de82 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -353,7 +353,6 @@ enum { IOV_BLOCKSIZE, IOV_USEINTS, IOV_NUMINTS, - IOV_HOSTREG, IOV_DEVREG, IOV_DIVISOR, IOV_SDMODE, @@ -370,8 +369,6 @@ const bcm_iovar_t sdioh_iovars[] = { size) */ {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0}, {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, - {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} - , {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0} @@ -564,56 +561,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_HOSTREG): - { - sdreg_t *sd_ptr = (sdreg_t *) params; - - if (sd_ptr->offset < SD_SysAddr - || sd_ptr->offset > SD_MaxCurCap) { - sd_err(("%s: bad offset 0x%x\n", __func__, - sd_ptr->offset)); - bcmerror = -EINVAL; - break; - } - - sd_trace(("%s: rreg%d at offset %d\n", __func__, - (sd_ptr->offset & 1) ? 8 - : ((sd_ptr->offset & 2) ? 16 : 32), - sd_ptr->offset)); - if (sd_ptr->offset & 1) - int_val = 8; /* sdioh_sdmmc_rreg8(si, - sd_ptr->offset); */ - else if (sd_ptr->offset & 2) - int_val = 16; /* sdioh_sdmmc_rreg16(si, - sd_ptr->offset); */ - else - int_val = 32; /* sdioh_sdmmc_rreg(si, - sd_ptr->offset); */ - - memcpy(arg, &int_val, sizeof(int_val)); - break; - } - - case IOV_SVAL(IOV_HOSTREG): - { - sdreg_t *sd_ptr = (sdreg_t *) params; - - if (sd_ptr->offset < SD_SysAddr - || sd_ptr->offset > SD_MaxCurCap) { - sd_err(("%s: bad offset 0x%x\n", __func__, - sd_ptr->offset)); - bcmerror = -EINVAL; - break; - } - - sd_trace(("%s: wreg%d value 0x%08x at offset %d\n", - __func__, sd_ptr->value, - (sd_ptr->offset & 1) ? 8 - : ((sd_ptr->offset & 2) ? 16 : 32), - sd_ptr->offset)); - break; - } - case IOV_GVAL(IOV_DEVREG): { sdreg_t *sd_ptr = (sdreg_t *) params; -- cgit v0.10.2 From 7e241f1349ff31772a1e8dd5fe8d806ac6ac55fb Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:01 +0200 Subject: staging: brcm80211: remove iovars IOV_DIVISOR Remove unused sdio related iovars IOV_DIVISOR for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 465f623..ab4d0cc 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -373,9 +373,6 @@ extern uint sd_clock; /* SD Clock Control, 0 = SD Clock OFF, 1 = SD Clock ON */ module_param(sd_clock, uint, 0); -extern uint sd_divisor; /* Divisor (-1 means external clock) */ -module_param(sd_divisor, uint, 0); - extern uint sd_sdmode; /* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */ module_param(sd_sdmode, uint, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index f24de82..02fa5b4 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -48,8 +48,6 @@ extern PBCMSDH_SDMMC_INSTANCE gInstance; uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */ uint sd_f2_blocksize = 512; /* Default blocksize */ -uint sd_divisor = 2; /* Default 48MHz/2 = 24MHz */ - uint sd_power = 1; /* Default to SD Slot powered ON */ uint sd_clock = 1; /* Default to SD Clock turned ON */ uint sd_hiok = false; /* Don't use hi-speed mode by default */ @@ -354,7 +352,6 @@ enum { IOV_USEINTS, IOV_NUMINTS, IOV_DEVREG, - IOV_DIVISOR, IOV_SDMODE, IOV_HISPEED, IOV_HCIREGS, @@ -371,8 +368,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , - {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0} - , {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0} , {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0} @@ -511,15 +506,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_DIVISOR): - int_val = (u32) sd_divisor; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_DIVISOR): - sd_divisor = int_val; - break; - case IOV_GVAL(IOV_POWER): int_val = (u32) sd_power; memcpy(arg, &int_val, val_size); diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index b613661..8270558 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -253,7 +253,6 @@ typedef struct dhd_bus { s32 idletime; /* Control for activity timeout */ s32 idlecount; /* Activity timeout counter */ s32 idleclock; /* How to set bus driver when idle */ - s32 sd_divisor; /* Speed control to bus driver */ s32 sd_mode; /* Mode control to bus driver */ s32 sd_rxchain; /* If bcmsdh api accepts PKT chains */ bool use_rxchain; /* If dhd should use PKT chains */ @@ -685,23 +684,13 @@ static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) __func__, err)); return -EBADE; } - } else if (bus->idleclock != DHD_IDLE_ACTIVE) { - /* Restore clock speed */ - iovalue = bus->sd_divisor; - err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error restoring sd_divisor: %d\n", - __func__, err)); - return -EBADE; - } } bus->clkstate = CLK_SDONLY; } else { /* Stop or slow the SD clock itself */ - if ((bus->sd_divisor == -1) || (bus->sd_mode == -1)) { - DHD_TRACE(("%s: can't idle clock, divisor %d mode %d\n", - __func__, bus->sd_divisor, bus->sd_mode)); + if (bus->sd_mode == -1) { + DHD_TRACE(("%s: can't idle clock, mode %d\n", + __func__, bus->sd_mode)); return -EBADE; } if (bus->idleclock == DHD_IDLE_STOP) { @@ -727,16 +716,6 @@ static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) __func__, err)); return -EBADE; } - } else if (bus->idleclock != DHD_IDLE_ACTIVE) { - /* Set divisor to idle value */ - iovalue = bus->idleclock; - err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_divisor: %d\n", - __func__, err)); - return -EBADE; - } } bus->clkstate = CLK_NONE; } @@ -2712,19 +2691,6 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, /* Check for bus configuration changes of interest */ - /* If it was divisor change, read the new one */ - if (set && strcmp(name, "sd_divisor") == 0) { - if (bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &bus->sd_divisor, sizeof(s32), - false) != 0) { - bus->sd_divisor = -1; - DHD_ERROR(("%s: fail on %s get\n", __func__, - name)); - } else { - DHD_INFO(("%s: noted %s update, value now %d\n", - __func__, name, bus->sd_divisor)); - } - } /* If it was a mode change, read the new one */ if (set && strcmp(name, "sd_mode") == 0) { if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, @@ -5368,17 +5334,6 @@ static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh) bus->idletime = (s32) dhd_idletime; bus->idleclock = DHD_IDLE_ACTIVE; - /* Query the SD clock speed */ - if (bcmsdh_iovar_op(sdh, "sd_divisor", NULL, 0, - &bus->sd_divisor, sizeof(s32), - false) != 0) { - DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_divisor")); - bus->sd_divisor = -1; - } else { - DHD_INFO(("%s: Initial value for %s is %d\n", - __func__, "sd_divisor", bus->sd_divisor)); - } - /* Query the SD bus mode */ if (bcmsdh_iovar_op(sdh, "sd_mode", NULL, 0, &bus->sd_mode, sizeof(s32), false) != 0) { -- cgit v0.10.2 From 23e5a7cd3e410bde0553844c36c72cb0909553d7 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:02 +0200 Subject: staging: brcm80211: remove iovars IOV_POWER Remove unused sdio related iovars IOV_POWER for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index ab4d0cc..5b8529c 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -365,10 +365,6 @@ void bcmsdh_unregister_oob_intr(void) extern uint sd_msglevel; /* Debug message level */ module_param(sd_msglevel, uint, 0); -extern uint sd_power; /* 0 = SD Power OFF, - 1 = SD Power ON. */ -module_param(sd_power, uint, 0); - extern uint sd_clock; /* SD Clock Control, 0 = SD Clock OFF, 1 = SD Clock ON */ module_param(sd_clock, uint, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 02fa5b4..a2d0ad8 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -48,7 +48,6 @@ extern PBCMSDH_SDMMC_INSTANCE gInstance; uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */ uint sd_f2_blocksize = 512; /* Default blocksize */ -uint sd_power = 1; /* Default to SD Slot powered ON */ uint sd_clock = 1; /* Default to SD Clock turned ON */ uint sd_hiok = false; /* Don't use hi-speed mode by default */ uint sd_msglevel = 0x01; @@ -355,7 +354,6 @@ enum { IOV_SDMODE, IOV_HISPEED, IOV_HCIREGS, - IOV_POWER, IOV_CLOCK, IOV_RXCHAIN }; @@ -368,8 +366,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , - {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0} - , {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0} , {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100} @@ -506,15 +502,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_POWER): - int_val = (u32) sd_power; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_POWER): - sd_power = int_val; - break; - case IOV_GVAL(IOV_CLOCK): int_val = (u32) sd_clock; memcpy(arg, &int_val, val_size); -- cgit v0.10.2 From 49e6a4ddf498129b361151640df09aa40fd37e88 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:03 +0200 Subject: staging: brcm80211: remove iovars IOV_CLOCK Remove unused sdio related iovars IOV_CLOCK for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 5b8529c..3755774 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -365,10 +365,6 @@ void bcmsdh_unregister_oob_intr(void) extern uint sd_msglevel; /* Debug message level */ module_param(sd_msglevel, uint, 0); -extern uint sd_clock; /* SD Clock Control, 0 = SD Clock OFF, - 1 = SD Clock ON */ -module_param(sd_clock, uint, 0); - extern uint sd_sdmode; /* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */ module_param(sd_sdmode, uint, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index a2d0ad8..c817e5e 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -48,7 +48,6 @@ extern PBCMSDH_SDMMC_INSTANCE gInstance; uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */ uint sd_f2_blocksize = 512; /* Default blocksize */ -uint sd_clock = 1; /* Default to SD Clock turned ON */ uint sd_hiok = false; /* Don't use hi-speed mode by default */ uint sd_msglevel = 0x01; DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); @@ -354,7 +353,6 @@ enum { IOV_SDMODE, IOV_HISPEED, IOV_HCIREGS, - IOV_CLOCK, IOV_RXCHAIN }; @@ -366,8 +364,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , - {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0} - , {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100} , {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0} @@ -502,15 +498,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_CLOCK): - int_val = (u32) sd_clock; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_CLOCK): - sd_clock = int_val; - break; - case IOV_GVAL(IOV_SDMODE): int_val = (u32) sd_sdmode; memcpy(arg, &int_val, val_size); diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 8270558..e6ea714 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -666,16 +666,6 @@ static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) if (on) { if (bus->idleclock == DHD_IDLE_STOP) { - /* Turn on clock and restore mode */ - iovalue = 1; - err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error enabling sd_clock: %d\n", - __func__, err)); - return -EBADE; - } - iovalue = bus->sd_mode; err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, &iovalue, sizeof(iovalue), true); @@ -707,15 +697,6 @@ static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) return -EBADE; } } - - iovalue = 0; - err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error disabling sd_clock: %d\n", - __func__, err)); - return -EBADE; - } } bus->clkstate = CLK_NONE; } -- cgit v0.10.2 From 602a8ab7172b34985fe531009da90c45fead3b96 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:04 +0200 Subject: staging: brcm80211: remove iovars IOV_SDMODE Remove unused sdio related iovars IOV_SDMODE for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 3755774..789922b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -365,9 +365,6 @@ void bcmsdh_unregister_oob_intr(void) extern uint sd_msglevel; /* Debug message level */ module_param(sd_msglevel, uint, 0); -extern uint sd_sdmode; /* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */ -module_param(sd_sdmode, uint, 0); - extern uint sd_hiok; /* Ok to use hi-speed mode */ module_param(sd_hiok, uint, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index c817e5e..2422890 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -45,7 +45,6 @@ extern int sdio_reset_comm(struct mmc_card *card); extern PBCMSDH_SDMMC_INSTANCE gInstance; -uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */ uint sd_f2_blocksize = 512; /* Default blocksize */ uint sd_hiok = false; /* Don't use hi-speed mode by default */ @@ -350,7 +349,6 @@ enum { IOV_USEINTS, IOV_NUMINTS, IOV_DEVREG, - IOV_SDMODE, IOV_HISPEED, IOV_HCIREGS, IOV_RXCHAIN @@ -364,8 +362,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , - {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100} - , {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0} , {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0} @@ -498,15 +494,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_SDMODE): - int_val = (u32) sd_sdmode; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_SDMODE): - sd_sdmode = int_val; - break; - case IOV_GVAL(IOV_HISPEED): int_val = (u32) sd_hiok; memcpy(arg, &int_val, val_size); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h index 86f88bf..42c71a8 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h @@ -88,7 +88,6 @@ struct sdioh_info { bool sd_blockmode; /* sd_blockmode == false => 64 Byte Cmd 53s. */ /* Must be on for sd_multiblock to be effective */ bool use_client_ints; /* If this is false, make sure to restore */ - int sd_mode; /* SD1/SD4/SPI */ int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ u8 num_funcs; /* Supported funcs on client */ u32 com_cis_ptr; diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index e6ea714..5d747b8 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -253,7 +253,6 @@ typedef struct dhd_bus { s32 idletime; /* Control for activity timeout */ s32 idlecount; /* Activity timeout counter */ s32 idleclock; /* How to set bus driver when idle */ - s32 sd_mode; /* Mode control to bus driver */ s32 sd_rxchain; /* If bcmsdh api accepts PKT chains */ bool use_rxchain; /* If dhd should use PKT chains */ bool sleeping; /* Is SDIO bus sleeping? */ @@ -659,47 +658,12 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok) /* Change idle/active SD state */ static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) { - int err; - s32 iovalue; - DHD_TRACE(("%s: Enter\n", __func__)); - if (on) { - if (bus->idleclock == DHD_IDLE_STOP) { - iovalue = bus->sd_mode; - err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_mode: %d\n", - __func__, err)); - return -EBADE; - } - } + if (on) bus->clkstate = CLK_SDONLY; - } else { - /* Stop or slow the SD clock itself */ - if (bus->sd_mode == -1) { - DHD_TRACE(("%s: can't idle clock, mode %d\n", - __func__, bus->sd_mode)); - return -EBADE; - } - if (bus->idleclock == DHD_IDLE_STOP) { - if (sd1idle) { - /* Change to SD1 mode and turn off clock */ - iovalue = 1; - err = - bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, - 0, &iovalue, - sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_clock: %d\n", - __func__, err)); - return -EBADE; - } - } - } + else bus->clkstate = CLK_NONE; - } return 0; } @@ -2670,21 +2634,6 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len, set); - /* Check for bus configuration changes of interest */ - - /* If it was a mode change, read the new one */ - if (set && strcmp(name, "sd_mode") == 0) { - if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, - &bus->sd_mode, sizeof(s32), - false) != 0) { - bus->sd_mode = -1; - DHD_ERROR(("%s: fail on %s get\n", __func__, - name)); - } else { - DHD_INFO(("%s: noted %s update, value now %d\n", - __func__, name, bus->sd_mode)); - } - } /* Similar check for blocksize change */ if (set && strcmp(name, "sd_blocksize") == 0) { s32 fnum = 2; @@ -5315,16 +5264,6 @@ static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh) bus->idletime = (s32) dhd_idletime; bus->idleclock = DHD_IDLE_ACTIVE; - /* Query the SD bus mode */ - if (bcmsdh_iovar_op(sdh, "sd_mode", NULL, 0, - &bus->sd_mode, sizeof(s32), false) != 0) { - DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_mode")); - bus->sd_mode = -1; - } else { - DHD_INFO(("%s: Initial value for %s is %d\n", - __func__, "sd_mode", bus->sd_mode)); - } - /* Query the F2 block size, set roundup accordingly */ fnum = 2; if (bcmsdh_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32), -- cgit v0.10.2 From f13c6f2fa21a60db34ec2187e0aa6e90195e08b9 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:05 +0200 Subject: staging: brcm80211: remove iovars IOV_HISPEED Remove unused sdio related iovars IOV_HISPEED for fullmac driver Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 789922b..e57dd00 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -365,8 +365,5 @@ void bcmsdh_unregister_oob_intr(void) extern uint sd_msglevel; /* Debug message level */ module_param(sd_msglevel, uint, 0); -extern uint sd_hiok; /* Ok to use hi-speed mode */ -module_param(sd_hiok, uint, 0); - extern uint sd_f2_blocksize; module_param(sd_f2_blocksize, int, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 2422890..cc4738a 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -47,7 +47,6 @@ extern PBCMSDH_SDMMC_INSTANCE gInstance; uint sd_f2_blocksize = 512; /* Default blocksize */ -uint sd_hiok = false; /* Don't use hi-speed mode by default */ uint sd_msglevel = 0x01; DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait); @@ -349,7 +348,6 @@ enum { IOV_USEINTS, IOV_NUMINTS, IOV_DEVREG, - IOV_HISPEED, IOV_HCIREGS, IOV_RXCHAIN }; @@ -362,8 +360,6 @@ const bcm_iovar_t sdioh_iovars[] = { {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} , - {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0} - , {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0} , {NULL, 0, 0, 0, 0} @@ -494,15 +490,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_HISPEED): - int_val = (u32) sd_hiok; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_HISPEED): - sd_hiok = int_val; - break; - case IOV_GVAL(IOV_NUMINTS): int_val = (s32) si->intrcount; memcpy(arg, &int_val, val_size); -- cgit v0.10.2 From 5d6e3aec346a0ce5e028609aa6acfdd1f2828bcf Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:06 +0200 Subject: staging: brcm80211: added support for more bcm43224 based boards Patch created by Gottfried Haider. Add support for BCM943224HMB devices as found in recent Lenovo ThinkPads. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 105f426..590d65b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -95,6 +95,8 @@ static struct pci_device_id wl_id_table[] = { {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ + /* 43224 Ven */ + {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, {0} }; @@ -1112,7 +1114,8 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) PCI_FUNC(pdev->devfn), pdev->irq); if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || - (((pdev->device & 0xff00) != 0x4300) && + ((pdev->device != 0x0576) && + ((pdev->device & 0xff00) != 0x4300) && ((pdev->device & 0xff00) != 0x4700) && ((pdev->device < 43000) || (pdev->device > 43999)))) return -ENODEV; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index adc06fc..f98f0fd 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -741,7 +741,8 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc->war16165 = true; /* check device id(srom, nvram etc.) to set bands */ - if (wlc_hw->deviceid == BCM43224_D11N_ID) { + if (wlc_hw->deviceid == BCM43224_D11N_ID || + wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { /* Dualband boards */ wlc_hw->_nbands = 2; } else diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 0837e8d..54b5b79 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -2857,9 +2857,10 @@ bool wlc_chipmatch(u16 vendor, u16 device) return false; } + if (device == BCM43224_D11N_ID_VEN1) + return true; if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID)) return true; - if (device == BCM4313_D11N2G_ID) return true; if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID)) diff --git a/drivers/staging/brcm80211/include/bcmdevs.h b/drivers/staging/brcm80211/include/bcmdevs.h index 26947ef..eba10b6 100644 --- a/drivers/staging/brcm80211/include/bcmdevs.h +++ b/drivers/staging/brcm80211/include/bcmdevs.h @@ -30,6 +30,7 @@ #define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ #define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ +#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db */ #define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ -- cgit v0.10.2 From 189aed097b1dc458d2290034fb3136147e64a1de Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:07 +0200 Subject: staging: brcm80211: removed 'hnd' from filenames Cleanup. 'hnd' is a company specific acronym. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index 3750fcf..e11c615 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include /* BRCM API for SDIO clients (such as wl, dhd) */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 5d747b8..fd4f341 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -30,13 +30,13 @@ #include #include -#include +#include #ifdef DHD_DEBUG -#include -#include +#include +#include #endif /* DHD_DEBUG */ #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h deleted file mode 100644 index 28f092c..0000000 --- a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _hndrte_armtrap_h -#define _hndrte_armtrap_h - -/* ARM trap handling */ - -/* Trap types defined by ARM (see arminc.h) */ - -/* Trap locations in lo memory */ -#define TRAP_STRIDE 4 -#define FIRST_TRAP TR_RST -#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) - -#if defined(__ARM_ARCH_4T__) -#define MAX_TRAP_TYPE (TR_FIQ + 1) -#elif defined(__ARM_ARCH_7M__) -#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) -#endif /* __ARM_ARCH_7M__ */ - -/* The trap structure is defined here as offsets for assembly */ -#define TR_TYPE 0x00 -#define TR_EPC 0x04 -#define TR_CPSR 0x08 -#define TR_SPSR 0x0c -#define TR_REGS 0x10 -#define TR_REG(n) (TR_REGS + (n) * 4) -#define TR_SP TR_REG(13) -#define TR_LR TR_REG(14) -#define TR_PC TR_REG(15) - -#define TRAP_T_SIZE 80 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef struct _trap_struct { - u32 type; - u32 epc; - u32 cpsr; - u32 spsr; - u32 r0; - u32 r1; - u32 r2; - u32 r3; - u32 r4; - u32 r5; - u32 r6; - u32 r7; - u32 r8; - u32 r9; - u32 r10; - u32 r11; - u32 r12; - u32 r13; - u32 r14; - u32 pc; -} trap_t; - -#endif /* !_LANGUAGE_ASSEMBLY */ - -#endif /* _hndrte_armtrap_h */ diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h b/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h deleted file mode 100644 index 4df3eec..0000000 --- a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _hndrte_cons_h -#define _hndrte_cons_h - -#define CBUF_LEN (128) - -#define LOG_BUF_LEN 1024 - -typedef struct { - u32 buf; /* Can't be pointer on (64-bit) hosts */ - uint buf_size; - uint idx; - char *_buf_compat; /* Redundant pointer for backward compat. */ -} hndrte_log_t; - -typedef struct { - /* Virtual UART - * When there is no UART (e.g. Quickturn), - * the host should write a complete - * input line directly into cbuf and then write - * the length into vcons_in. - * This may also be used when there is a real UART - * (at risk of conflicting with - * the real UART). vcons_out is currently unused. - */ - volatile uint vcons_in; - volatile uint vcons_out; - - /* Output (logging) buffer - * Console output is written to a ring buffer log_buf at index log_idx. - * The host may read the output when it sees log_idx advance. - * Output will be lost if the output wraps around faster than the host - * polls. - */ - hndrte_log_t log; - - /* Console input line buffer - * Characters are read one at a time into cbuf - * until is received, then - * the buffer is processed as a command line. - * Also used for virtual UART. - */ - uint cbuf_idx; - char cbuf[CBUF_LEN]; -} hndrte_cons_t; - -#endif /* _hndrte_cons_h */ - diff --git a/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h new file mode 100644 index 0000000..28f092c --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _hndrte_armtrap_h +#define _hndrte_armtrap_h + +/* ARM trap handling */ + +/* Trap types defined by ARM (see arminc.h) */ + +/* Trap locations in lo memory */ +#define TRAP_STRIDE 4 +#define FIRST_TRAP TR_RST +#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) + +#if defined(__ARM_ARCH_4T__) +#define MAX_TRAP_TYPE (TR_FIQ + 1) +#elif defined(__ARM_ARCH_7M__) +#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) +#endif /* __ARM_ARCH_7M__ */ + +/* The trap structure is defined here as offsets for assembly */ +#define TR_TYPE 0x00 +#define TR_EPC 0x04 +#define TR_CPSR 0x08 +#define TR_SPSR 0x0c +#define TR_REGS 0x10 +#define TR_REG(n) (TR_REGS + (n) * 4) +#define TR_SP TR_REG(13) +#define TR_LR TR_REG(14) +#define TR_PC TR_REG(15) + +#define TRAP_T_SIZE 80 + +#ifndef _LANGUAGE_ASSEMBLY + +typedef struct _trap_struct { + u32 type; + u32 epc; + u32 cpsr; + u32 spsr; + u32 r0; + u32 r1; + u32 r2; + u32 r3; + u32 r4; + u32 r5; + u32 r6; + u32 r7; + u32 r8; + u32 r9; + u32 r10; + u32 r11; + u32 r12; + u32 r13; + u32 r14; + u32 pc; +} trap_t; + +#endif /* !_LANGUAGE_ASSEMBLY */ + +#endif /* _hndrte_armtrap_h */ diff --git a/drivers/staging/brcm80211/brcmfmac/rte_cons.h b/drivers/staging/brcm80211/brcmfmac/rte_cons.h new file mode 100644 index 0000000..4df3eec --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/rte_cons.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#ifndef _hndrte_cons_h +#define _hndrte_cons_h + +#define CBUF_LEN (128) + +#define LOG_BUF_LEN 1024 + +typedef struct { + u32 buf; /* Can't be pointer on (64-bit) hosts */ + uint buf_size; + uint idx; + char *_buf_compat; /* Redundant pointer for backward compat. */ +} hndrte_log_t; + +typedef struct { + /* Virtual UART + * When there is no UART (e.g. Quickturn), + * the host should write a complete + * input line directly into cbuf and then write + * the length into vcons_in. + * This may also be used when there is a real UART + * (at risk of conflicting with + * the real UART). vcons_out is currently unused. + */ + volatile uint vcons_in; + volatile uint vcons_out; + + /* Output (logging) buffer + * Console output is written to a ring buffer log_buf at index log_idx. + * The host may read the output when it sees log_idx advance. + * Output will be lost if the output wraps around faster than the host + * polls. + */ + hndrte_log_t log; + + /* Console input line buffer + * Characters are read one at a time into cbuf + * until is received, then + * the buffer is processed as a command line. + * Also used for virtual UART. + */ + uint cbuf_idx; + char cbuf[CBUF_LEN]; +} hndrte_cons_t; + +#endif /* _hndrte_cons_h */ + diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index 8d75fe1..4356a29 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -49,7 +49,7 @@ BRCMSMAC_OFILES := \ phy/wlc_phy_qmath.o \ bcmotp.o \ bcmsrom.o \ - hnddma.o \ + dma.o \ nicpci.o \ nvram.o diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index a61185f..73587b3 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h new file mode 100644 index 0000000..fbbcb9b --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _hnddma_h_ +#define _hnddma_h_ + +#ifndef _hnddma_pub_ +#define _hnddma_pub_ +struct hnddma_pub; +#endif /* _hnddma_pub_ */ + +/* map/unmap direction */ +#define DMA_TX 1 /* TX direction for DMA */ +#define DMA_RX 2 /* RX direction for DMA */ +#define BUS_SWAP32(v) (v) + +/* range param for dma_getnexttxp() and dma_txreclaim */ +typedef enum txd_range { + HNDDMA_RANGE_ALL = 1, + HNDDMA_RANGE_TRANSMITTED, + HNDDMA_RANGE_TRANSFERED +} txd_range_t; + +/* dma function type */ +typedef void (*di_detach_t) (struct hnddma_pub *dmah); +typedef bool(*di_txreset_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxreset_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxidle_t) (struct hnddma_pub *dmah); +typedef void (*di_txinit_t) (struct hnddma_pub *dmah); +typedef bool(*di_txenabled_t) (struct hnddma_pub *dmah); +typedef void (*di_rxinit_t) (struct hnddma_pub *dmah); +typedef void (*di_txsuspend_t) (struct hnddma_pub *dmah); +typedef void (*di_txresume_t) (struct hnddma_pub *dmah); +typedef bool(*di_txsuspended_t) (struct hnddma_pub *dmah); +typedef bool(*di_txsuspendedidle_t) (struct hnddma_pub *dmah); +typedef int (*di_txfast_t) (struct hnddma_pub *dmah, struct sk_buff *p, + bool commit); +typedef int (*di_txunframed_t) (struct hnddma_pub *dmah, void *p, uint len, + bool commit); +typedef void *(*di_getpos_t) (struct hnddma_pub *di, bool direction); +typedef void (*di_fifoloopbackenable_t) (struct hnddma_pub *dmah); +typedef bool(*di_txstopped_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxstopped_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxenable_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxenabled_t) (struct hnddma_pub *dmah); +typedef void *(*di_rx_t) (struct hnddma_pub *dmah); +typedef bool(*di_rxfill_t) (struct hnddma_pub *dmah); +typedef void (*di_txreclaim_t) (struct hnddma_pub *dmah, txd_range_t range); +typedef void (*di_rxreclaim_t) (struct hnddma_pub *dmah); +typedef unsigned long (*di_getvar_t) (struct hnddma_pub *dmah, + const char *name); +typedef void *(*di_getnexttxp_t) (struct hnddma_pub *dmah, txd_range_t range); +typedef void *(*di_getnextrxp_t) (struct hnddma_pub *dmah, bool forceall); +typedef void *(*di_peeknexttxp_t) (struct hnddma_pub *dmah); +typedef void *(*di_peeknextrxp_t) (struct hnddma_pub *dmah); +typedef void (*di_rxparam_get_t) (struct hnddma_pub *dmah, u16 *rxoffset, + u16 *rxbufsize); +typedef void (*di_txblock_t) (struct hnddma_pub *dmah); +typedef void (*di_txunblock_t) (struct hnddma_pub *dmah); +typedef uint(*di_txactive_t) (struct hnddma_pub *dmah); +typedef void (*di_txrotate_t) (struct hnddma_pub *dmah); +typedef void (*di_counterreset_t) (struct hnddma_pub *dmah); +typedef uint(*di_ctrlflags_t) (struct hnddma_pub *dmah, uint mask, uint flags); +typedef char *(*di_dump_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, + bool dumpring); +typedef char *(*di_dumptx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, + bool dumpring); +typedef char *(*di_dumprx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, + bool dumpring); +typedef uint(*di_rxactive_t) (struct hnddma_pub *dmah); +typedef uint(*di_txpending_t) (struct hnddma_pub *dmah); +typedef uint(*di_txcommitted_t) (struct hnddma_pub *dmah); + +/* dma opsvec */ +typedef struct di_fcn_s { + di_detach_t detach; + di_txinit_t txinit; + di_txreset_t txreset; + di_txenabled_t txenabled; + di_txsuspend_t txsuspend; + di_txresume_t txresume; + di_txsuspended_t txsuspended; + di_txsuspendedidle_t txsuspendedidle; + di_txfast_t txfast; + di_txunframed_t txunframed; + di_getpos_t getpos; + di_txstopped_t txstopped; + di_txreclaim_t txreclaim; + di_getnexttxp_t getnexttxp; + di_peeknexttxp_t peeknexttxp; + di_txblock_t txblock; + di_txunblock_t txunblock; + di_txactive_t txactive; + di_txrotate_t txrotate; + + di_rxinit_t rxinit; + di_rxreset_t rxreset; + di_rxidle_t rxidle; + di_rxstopped_t rxstopped; + di_rxenable_t rxenable; + di_rxenabled_t rxenabled; + di_rx_t rx; + di_rxfill_t rxfill; + di_rxreclaim_t rxreclaim; + di_getnextrxp_t getnextrxp; + di_peeknextrxp_t peeknextrxp; + di_rxparam_get_t rxparam_get; + + di_fifoloopbackenable_t fifoloopbackenable; + di_getvar_t d_getvar; + di_counterreset_t counterreset; + di_ctrlflags_t ctrlflags; + di_dump_t dump; + di_dumptx_t dumptx; + di_dumprx_t dumprx; + di_rxactive_t rxactive; + di_txpending_t txpending; + di_txcommitted_t txcommitted; + uint endnum; +} di_fcn_t; + +/* + * Exported data structure (read-only) + */ +/* export structure */ +struct hnddma_pub { + const di_fcn_t *di_fn; /* DMA function pointers */ + uint txavail; /* # free tx descriptors */ + uint dmactrlflags; /* dma control flags */ + + /* rx error counters */ + uint rxgiants; /* rx giant frames */ + uint rxnobuf; /* rx out of dma descriptors */ + /* tx error counters */ + uint txnobuf; /* tx out of dma descriptors */ +}; + +extern struct hnddma_pub *dma_attach(char *name, si_t *sih, + void *dmaregstx, void *dmaregsrx, uint ntxd, + uint nrxd, uint rxbufsize, int rxextheadroom, + uint nrxpost, uint rxoffset, uint *msg_level); + +extern const di_fcn_t dma64proc; + +#define dma_detach(di) (dma64proc.detach(di)) +#define dma_txreset(di) (dma64proc.txreset(di)) +#define dma_rxreset(di) (dma64proc.rxreset(di)) +#define dma_rxidle(di) (dma64proc.rxidle(di)) +#define dma_txinit(di) (dma64proc.txinit(di)) +#define dma_txenabled(di) (dma64proc.txenabled(di)) +#define dma_rxinit(di) (dma64proc.rxinit(di)) +#define dma_txsuspend(di) (dma64proc.txsuspend(di)) +#define dma_txresume(di) (dma64proc.txresume(di)) +#define dma_txsuspended(di) (dma64proc.txsuspended(di)) +#define dma_txsuspendedidle(di) (dma64proc.txsuspendedidle(di)) +#define dma_txfast(di, p, commit) (dma64proc.txfast(di, p, commit)) +#define dma_txunframed(di, p, l, commit)(dma64proc.txunframed(di, p, l, commit)) +#define dma_getpos(di, dir) (dma64proc.getpos(di, dir)) +#define dma_fifoloopbackenable(di) (dma64proc.fifoloopbackenable(di)) +#define dma_txstopped(di) (dma64proc.txstopped(di)) +#define dma_rxstopped(di) (dma64proc.rxstopped(di)) +#define dma_rxenable(di) (dma64proc.rxenable(di)) +#define dma_rxenabled(di) (dma64proc.rxenabled(di)) +#define dma_rx(di) (dma64proc.rx(di)) +#define dma_rxfill(di) (dma64proc.rxfill(di)) +#define dma_txreclaim(di, range) (dma64proc.txreclaim(di, range)) +#define dma_rxreclaim(di) (dma64proc.rxreclaim(di)) +#define dma_getvar(di, name) (dma64proc.d_getvar(di, name)) +#define dma_getnexttxp(di, range) (dma64proc.getnexttxp(di, range)) +#define dma_getnextrxp(di, forceall) (dma64proc.getnextrxp(di, forceall)) +#define dma_peeknexttxp(di) (dma64proc.peeknexttxp(di)) +#define dma_peeknextrxp(di) (dma64proc.peeknextrxp(di)) +#define dma_rxparam_get(di, off, bufs) (dma64proc.rxparam_get(di, off, bufs)) + +#define dma_txblock(di) (dma64proc.txblock(di)) +#define dma_txunblock(di) (dma64proc.txunblock(di)) +#define dma_txactive(di) (dma64proc.txactive(di)) +#define dma_rxactive(di) (dma64proc.rxactive(di)) +#define dma_txrotate(di) (dma64proc.txrotate(di)) +#define dma_counterreset(di) (dma64proc.counterreset(di)) +#define dma_ctrlflags(di, mask, flags) (dma64proc.ctrlflags((di), (mask), (flags))) +#define dma_txpending(di) (dma64proc.txpending(di)) +#define dma_txcommitted(di) (dma64proc.txcommitted(di)) + + +/* return addresswidth allowed + * This needs to be done after SB attach but before dma attach. + * SB attach provides ability to probe backplane and dma core capabilities + * This info is needed by DMA_ALLOC_CONSISTENT in dma attach + */ +extern uint dma_addrwidth(si_t *sih, void *dmaregs); +void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) + (void *pkt, void *arg_a), void *arg_a); + +/* + * DMA(Bug) on some chips seems to declare that the packet is ready, but the + * packet length is not updated yet (by DMA) on the expected time. + * Workaround is to hold processor till DMA updates the length, and stay off + * the bus to allow DMA update the length in buffer + */ +static inline void dma_spin_for_len(uint len, struct sk_buff *head) +{ +#if defined(__mips__) + if (!len) { + while (!(len = *(u16 *) KSEG1ADDR(head->data))) + udelay(1); + + *(u16 *) (head->data) = cpu_to_le16((u16) len); + } +#endif /* defined(__mips__) */ +} + +#endif /* _hnddma_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index d09628b..f025641 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index bbfc642..9de10fe 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c new file mode 100644 index 0000000..6fde51f --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -0,0 +1,1756 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if defined(__mips__) +#include +#endif + +#ifdef BRCM_FULLMAC +#error "hnddma.c shouldn't be needed for FULLMAC" +#endif + +/* debug/trace */ +#ifdef BCMDBG +#define DMA_ERROR(args) \ + do { \ + if (!(*di->msg_level & 1)) \ + ; \ + else \ + printk args; \ + } while (0) +#define DMA_TRACE(args) \ + do { \ + if (!(*di->msg_level & 2)) \ + ; \ + else \ + printk args; \ + } while (0) +#else +#define DMA_ERROR(args) +#define DMA_TRACE(args) +#endif /* BCMDBG */ + +#define DMA_NONE(args) + +#define d64txregs dregs.d64_u.txregs_64 +#define d64rxregs dregs.d64_u.rxregs_64 +#define txd64 dregs.d64_u.txd_64 +#define rxd64 dregs.d64_u.rxd_64 + +/* default dma message level (if input msg_level pointer is null in dma_attach()) */ +static uint dma_msg_level; + +#define MAXNAMEL 8 /* 8 char names */ + +#define DI_INFO(dmah) ((dma_info_t *)dmah) + +#define R_SM(r) (*(r)) +#define W_SM(r, v) (*(r) = (v)) + +/* dma engine software state */ +typedef struct dma_info { + struct hnddma_pub hnddma; /* exported structure */ + uint *msg_level; /* message level pointer */ + char name[MAXNAMEL]; /* callers name for diag msgs */ + + void *pbus; /* bus handle */ + + bool dma64; /* this dma engine is operating in 64-bit mode */ + bool addrext; /* this dma engine supports DmaExtendedAddrChanges */ + + union { + struct { + dma64regs_t *txregs_64; /* 64-bit dma tx engine registers */ + dma64regs_t *rxregs_64; /* 64-bit dma rx engine registers */ + dma64dd_t *txd_64; /* pointer to dma64 tx descriptor ring */ + dma64dd_t *rxd_64; /* pointer to dma64 rx descriptor ring */ + } d64_u; + } dregs; + + u16 dmadesc_align; /* alignment requirement for dma descriptors */ + + u16 ntxd; /* # tx descriptors tunable */ + u16 txin; /* index of next descriptor to reclaim */ + u16 txout; /* index of next descriptor to post */ + void **txp; /* pointer to parallel array of pointers to packets */ + hnddma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */ + dmaaddr_t txdpa; /* Aligned physical address of descriptor ring */ + dmaaddr_t txdpaorig; /* Original physical address of descriptor ring */ + u16 txdalign; /* #bytes added to alloc'd mem to align txd */ + u32 txdalloc; /* #bytes allocated for the ring */ + u32 xmtptrbase; /* When using unaligned descriptors, the ptr register + * is not just an index, it needs all 13 bits to be + * an offset from the addr register. + */ + + u16 nrxd; /* # rx descriptors tunable */ + u16 rxin; /* index of next descriptor to reclaim */ + u16 rxout; /* index of next descriptor to post */ + void **rxp; /* pointer to parallel array of pointers to packets */ + hnddma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */ + dmaaddr_t rxdpa; /* Aligned physical address of descriptor ring */ + dmaaddr_t rxdpaorig; /* Original physical address of descriptor ring */ + u16 rxdalign; /* #bytes added to alloc'd mem to align rxd */ + u32 rxdalloc; /* #bytes allocated for the ring */ + u32 rcvptrbase; /* Base for ptr reg when using unaligned descriptors */ + + /* tunables */ + unsigned int rxbufsize; /* rx buffer size in bytes, + * not including the extra headroom + */ + uint rxextrahdrroom; /* extra rx headroom, reverseved to assist upper stack + * e.g. some rx pkt buffers will be bridged to tx side + * without byte copying. The extra headroom needs to be + * large enough to fit txheader needs. + * Some dongle driver may not need it. + */ + uint nrxpost; /* # rx buffers to keep posted */ + unsigned int rxoffset; /* rxcontrol offset */ + uint ddoffsetlow; /* add to get dma address of descriptor ring, low 32 bits */ + uint ddoffsethigh; /* high 32 bits */ + uint dataoffsetlow; /* add to get dma address of data buffer, low 32 bits */ + uint dataoffsethigh; /* high 32 bits */ + bool aligndesc_4k; /* descriptor base need to be aligned or not */ +} dma_info_t; + +/* DMA Scatter-gather list is supported. Note this is limited to TX direction only */ +#ifdef BCMDMASGLISTOSL +#define DMASGLIST_ENAB true +#else +#define DMASGLIST_ENAB false +#endif /* BCMDMASGLISTOSL */ + +/* descriptor bumping macros */ +#define XXD(x, n) ((x) & ((n) - 1)) /* faster than %, but n must be power of 2 */ +#define TXD(x) XXD((x), di->ntxd) +#define RXD(x) XXD((x), di->nrxd) +#define NEXTTXD(i) TXD((i) + 1) +#define PREVTXD(i) TXD((i) - 1) +#define NEXTRXD(i) RXD((i) + 1) +#define PREVRXD(i) RXD((i) - 1) + +#define NTXDACTIVE(h, t) TXD((t) - (h)) +#define NRXDACTIVE(h, t) RXD((t) - (h)) + +/* macros to convert between byte offsets and indexes */ +#define B2I(bytes, type) ((bytes) / sizeof(type)) +#define I2B(index, type) ((index) * sizeof(type)) + +#define PCI32ADDR_HIGH 0xc0000000 /* address[31:30] */ +#define PCI32ADDR_HIGH_SHIFT 30 /* address[31:30] */ + +#define PCI64ADDR_HIGH 0x80000000 /* address[63] */ +#define PCI64ADDR_HIGH_SHIFT 31 /* address[63] */ + +/* Common prototypes */ +static bool _dma_isaddrext(dma_info_t *di); +static bool _dma_descriptor_align(dma_info_t *di); +static bool _dma_alloc(dma_info_t *di, uint direction); +static void _dma_detach(dma_info_t *di); +static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa); +static void _dma_rxinit(dma_info_t *di); +static void *_dma_rx(dma_info_t *di); +static bool _dma_rxfill(dma_info_t *di); +static void _dma_rxreclaim(dma_info_t *di); +static void _dma_rxenable(dma_info_t *di); +static void *_dma_getnextrxp(dma_info_t *di, bool forceall); +static void _dma_rx_param_get(dma_info_t *di, u16 *rxoffset, + u16 *rxbufsize); + +static void _dma_txblock(dma_info_t *di); +static void _dma_txunblock(dma_info_t *di); +static uint _dma_txactive(dma_info_t *di); +static uint _dma_rxactive(dma_info_t *di); +static uint _dma_txpending(dma_info_t *di); +static uint _dma_txcommitted(dma_info_t *di); + +static void *_dma_peeknexttxp(dma_info_t *di); +static void *_dma_peeknextrxp(dma_info_t *di); +static unsigned long _dma_getvar(dma_info_t *di, const char *name); +static void _dma_counterreset(dma_info_t *di); +static void _dma_fifoloopbackenable(dma_info_t *di); +static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags); +static u8 dma_align_sizetobits(uint size); +static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, + u16 *alignbits, uint *alloced, + dmaaddr_t *descpa); + +/* Prototypes for 64-bit routines */ +static bool dma64_alloc(dma_info_t *di, uint direction); +static bool dma64_txreset(dma_info_t *di); +static bool dma64_rxreset(dma_info_t *di); +static bool dma64_txsuspendedidle(dma_info_t *di); +static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, bool commit); +static int dma64_txunframed(dma_info_t *di, void *p0, uint len, bool commit); +static void *dma64_getpos(dma_info_t *di, bool direction); +static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range); +static void *dma64_getnextrxp(dma_info_t *di, bool forceall); +static void dma64_txrotate(dma_info_t *di); + +static bool dma64_rxidle(dma_info_t *di); +static void dma64_txinit(dma_info_t *di); +static bool dma64_txenabled(dma_info_t *di); +static void dma64_txsuspend(dma_info_t *di); +static void dma64_txresume(dma_info_t *di); +static bool dma64_txsuspended(dma_info_t *di); +static void dma64_txreclaim(dma_info_t *di, txd_range_t range); +static bool dma64_txstopped(dma_info_t *di); +static bool dma64_rxstopped(dma_info_t *di); +static bool dma64_rxenabled(dma_info_t *di); +static bool _dma64_addrext(dma64regs_t *dma64regs); + +static inline u32 parity32(u32 data); + +const di_fcn_t dma64proc = { + (di_detach_t) _dma_detach, + (di_txinit_t) dma64_txinit, + (di_txreset_t) dma64_txreset, + (di_txenabled_t) dma64_txenabled, + (di_txsuspend_t) dma64_txsuspend, + (di_txresume_t) dma64_txresume, + (di_txsuspended_t) dma64_txsuspended, + (di_txsuspendedidle_t) dma64_txsuspendedidle, + (di_txfast_t) dma64_txfast, + (di_txunframed_t) dma64_txunframed, + (di_getpos_t) dma64_getpos, + (di_txstopped_t) dma64_txstopped, + (di_txreclaim_t) dma64_txreclaim, + (di_getnexttxp_t) dma64_getnexttxp, + (di_peeknexttxp_t) _dma_peeknexttxp, + (di_txblock_t) _dma_txblock, + (di_txunblock_t) _dma_txunblock, + (di_txactive_t) _dma_txactive, + (di_txrotate_t) dma64_txrotate, + + (di_rxinit_t) _dma_rxinit, + (di_rxreset_t) dma64_rxreset, + (di_rxidle_t) dma64_rxidle, + (di_rxstopped_t) dma64_rxstopped, + (di_rxenable_t) _dma_rxenable, + (di_rxenabled_t) dma64_rxenabled, + (di_rx_t) _dma_rx, + (di_rxfill_t) _dma_rxfill, + (di_rxreclaim_t) _dma_rxreclaim, + (di_getnextrxp_t) _dma_getnextrxp, + (di_peeknextrxp_t) _dma_peeknextrxp, + (di_rxparam_get_t) _dma_rx_param_get, + + (di_fifoloopbackenable_t) _dma_fifoloopbackenable, + (di_getvar_t) _dma_getvar, + (di_counterreset_t) _dma_counterreset, + (di_ctrlflags_t) _dma_ctrlflags, + NULL, + NULL, + NULL, + (di_rxactive_t) _dma_rxactive, + (di_txpending_t) _dma_txpending, + (di_txcommitted_t) _dma_txcommitted, + 39 +}; + +struct hnddma_pub *dma_attach(char *name, si_t *sih, + void *dmaregstx, void *dmaregsrx, uint ntxd, + uint nrxd, uint rxbufsize, int rxextheadroom, + uint nrxpost, uint rxoffset, uint *msg_level) +{ + dma_info_t *di; + uint size; + + /* allocate private info structure */ + di = kzalloc(sizeof(dma_info_t), GFP_ATOMIC); + if (di == NULL) { +#ifdef BCMDBG + printk(KERN_ERR "dma_attach: out of memory\n"); +#endif + return NULL; + } + + di->msg_level = msg_level ? msg_level : &dma_msg_level; + + + di->dma64 = ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64); + + /* init dma reg pointer */ + di->d64txregs = (dma64regs_t *) dmaregstx; + di->d64rxregs = (dma64regs_t *) dmaregsrx; + di->hnddma.di_fn = (const di_fcn_t *)&dma64proc; + + /* Default flags (which can be changed by the driver calling dma_ctrlflags + * before enable): For backwards compatibility both Rx Overflow Continue + * and Parity are DISABLED. + * supports it. + */ + di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN, + 0); + + DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d " + "rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d " + "dmaregstx %p dmaregsrx %p\n", name, "DMA64", + di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize, + rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx)); + + /* make a private copy of our callers name */ + strncpy(di->name, name, MAXNAMEL); + di->name[MAXNAMEL - 1] = '\0'; + + di->pbus = ((struct si_info *)sih)->pbus; + + /* save tunables */ + di->ntxd = (u16) ntxd; + di->nrxd = (u16) nrxd; + + /* the actual dma size doesn't include the extra headroom */ + di->rxextrahdrroom = + (rxextheadroom == -1) ? BCMEXTRAHDROOM : rxextheadroom; + if (rxbufsize > BCMEXTRAHDROOM) + di->rxbufsize = (u16) (rxbufsize - di->rxextrahdrroom); + else + di->rxbufsize = (u16) rxbufsize; + + di->nrxpost = (u16) nrxpost; + di->rxoffset = (u8) rxoffset; + + /* + * figure out the DMA physical address offset for dd and data + * PCI/PCIE: they map silicon backplace address to zero based memory, need offset + * Other bus: use zero + * SI_BUS BIGENDIAN kludge: use sdram swapped region for data buffer, not descriptor + */ + di->ddoffsetlow = 0; + di->dataoffsetlow = 0; + /* for pci bus, add offset */ + if (sih->bustype == PCI_BUS) { + /* pcie with DMA64 */ + di->ddoffsetlow = 0; + di->ddoffsethigh = SI_PCIE_DMA_H32; + di->dataoffsetlow = di->ddoffsetlow; + di->dataoffsethigh = di->ddoffsethigh; + } +#if defined(__mips__) && defined(IL_BIGENDIAN) + di->dataoffsetlow = di->dataoffsetlow + SI_SDRAM_SWAPPED; +#endif /* defined(__mips__) && defined(IL_BIGENDIAN) */ + /* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */ + if ((ai_coreid(sih) == SDIOD_CORE_ID) + && ((ai_corerev(sih) > 0) && (ai_corerev(sih) <= 2))) + di->addrext = 0; + else if ((ai_coreid(sih) == I2S_CORE_ID) && + ((ai_corerev(sih) == 0) || (ai_corerev(sih) == 1))) + di->addrext = 0; + else + di->addrext = _dma_isaddrext(di); + + /* does the descriptors need to be aligned and if yes, on 4K/8K or not */ + di->aligndesc_4k = _dma_descriptor_align(di); + if (di->aligndesc_4k) { + di->dmadesc_align = D64RINGALIGN_BITS; + if ((ntxd < D64MAXDD / 2) && (nrxd < D64MAXDD / 2)) { + /* for smaller dd table, HW relax alignment reqmnt */ + di->dmadesc_align = D64RINGALIGN_BITS - 1; + } + } else + di->dmadesc_align = 4; /* 16 byte alignment */ + + DMA_NONE(("DMA descriptor align_needed %d, align %d\n", + di->aligndesc_4k, di->dmadesc_align)); + + /* allocate tx packet pointer vector */ + if (ntxd) { + size = ntxd * sizeof(void *); + di->txp = kzalloc(size, GFP_ATOMIC); + if (di->txp == NULL) { + DMA_ERROR(("%s: dma_attach: out of tx memory\n", di->name)); + goto fail; + } + } + + /* allocate rx packet pointer vector */ + if (nrxd) { + size = nrxd * sizeof(void *); + di->rxp = kzalloc(size, GFP_ATOMIC); + if (di->rxp == NULL) { + DMA_ERROR(("%s: dma_attach: out of rx memory\n", di->name)); + goto fail; + } + } + + /* allocate transmit descriptor ring, only need ntxd descriptors but it must be aligned */ + if (ntxd) { + if (!_dma_alloc(di, DMA_TX)) + goto fail; + } + + /* allocate receive descriptor ring, only need nrxd descriptors but it must be aligned */ + if (nrxd) { + if (!_dma_alloc(di, DMA_RX)) + goto fail; + } + + if ((di->ddoffsetlow != 0) && !di->addrext) { + if (PHYSADDRLO(di->txdpa) > SI_PCI_DMA_SZ) { + DMA_ERROR(("%s: dma_attach: txdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->txdpa))); + goto fail; + } + if (PHYSADDRLO(di->rxdpa) > SI_PCI_DMA_SZ) { + DMA_ERROR(("%s: dma_attach: rxdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->rxdpa))); + goto fail; + } + } + + DMA_TRACE(("ddoffsetlow 0x%x ddoffsethigh 0x%x dataoffsetlow 0x%x dataoffsethigh " "0x%x addrext %d\n", di->ddoffsetlow, di->ddoffsethigh, di->dataoffsetlow, di->dataoffsethigh, di->addrext)); + + /* allocate DMA mapping vectors */ + if (DMASGLIST_ENAB) { + if (ntxd) { + size = ntxd * sizeof(hnddma_seg_map_t); + di->txp_dmah = kzalloc(size, GFP_ATOMIC); + if (di->txp_dmah == NULL) + goto fail; + } + + if (nrxd) { + size = nrxd * sizeof(hnddma_seg_map_t); + di->rxp_dmah = kzalloc(size, GFP_ATOMIC); + if (di->rxp_dmah == NULL) + goto fail; + } + } + + return (struct hnddma_pub *) di; + + fail: + _dma_detach(di); + return NULL; +} + +/* Check for odd number of 1's */ +static inline u32 parity32(u32 data) +{ + data ^= data >> 16; + data ^= data >> 8; + data ^= data >> 4; + data ^= data >> 2; + data ^= data >> 1; + + return data & 1; +} + +#define DMA64_DD_PARITY(dd) parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2) + +static inline void +dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, + u32 *flags, u32 bufcount) +{ + u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK; + + /* PCI bus with big(>1G) physical address, use address extension */ +#if defined(__mips__) && defined(IL_BIGENDIAN) + if ((di->dataoffsetlow == SI_SDRAM_SWAPPED) + || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { +#else + if ((di->dataoffsetlow == 0) || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { +#endif /* defined(__mips__) && defined(IL_BIGENDIAN) */ + + W_SM(&ddring[outidx].addrlow, + BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow)); + W_SM(&ddring[outidx].addrhigh, + BUS_SWAP32(PHYSADDRHI(pa) + di->dataoffsethigh)); + W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); + W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); + } else { + /* address extension for 32-bit PCI */ + u32 ae; + + ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; + PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH; + + ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; + W_SM(&ddring[outidx].addrlow, + BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow)); + W_SM(&ddring[outidx].addrhigh, + BUS_SWAP32(0 + di->dataoffsethigh)); + W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); + W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); + } + if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) { + if (DMA64_DD_PARITY(&ddring[outidx])) { + W_SM(&ddring[outidx].ctrl2, + BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY)); + } + } +} + +static bool _dma_alloc(dma_info_t *di, uint direction) +{ + return dma64_alloc(di, direction); +} + +void *dma_alloc_consistent(struct pci_dev *pdev, uint size, u16 align_bits, + uint *alloced, unsigned long *pap) +{ + if (align_bits) { + u16 align = (1 << align_bits); + if (!IS_ALIGNED(PAGE_SIZE, align)) + size += align; + *alloced = size; + } + return pci_alloc_consistent(pdev, size, (dma_addr_t *) pap); +} + +/* !! may be called with core in reset */ +static void _dma_detach(dma_info_t *di) +{ + + DMA_TRACE(("%s: dma_detach\n", di->name)); + + /* free dma descriptor rings */ + if (di->txd64) + pci_free_consistent(di->pbus, di->txdalloc, + ((s8 *)di->txd64 - di->txdalign), + (di->txdpaorig)); + if (di->rxd64) + pci_free_consistent(di->pbus, di->rxdalloc, + ((s8 *)di->rxd64 - di->rxdalign), + (di->rxdpaorig)); + + /* free packet pointer vectors */ + kfree(di->txp); + kfree(di->rxp); + + /* free tx packet DMA handles */ + kfree(di->txp_dmah); + + /* free rx packet DMA handles */ + kfree(di->rxp_dmah); + + /* free our private info structure */ + kfree(di); + +} + +static bool _dma_descriptor_align(dma_info_t *di) +{ + u32 addrl; + + /* Check to see if the descriptors need to be aligned on 4K/8K or not */ + if (di->d64txregs != NULL) { + W_REG(&di->d64txregs->addrlow, 0xff0); + addrl = R_REG(&di->d64txregs->addrlow); + if (addrl != 0) + return false; + } else if (di->d64rxregs != NULL) { + W_REG(&di->d64rxregs->addrlow, 0xff0); + addrl = R_REG(&di->d64rxregs->addrlow); + if (addrl != 0) + return false; + } + return true; +} + +/* return true if this dma engine supports DmaExtendedAddrChanges, otherwise false */ +static bool _dma_isaddrext(dma_info_t *di) +{ + /* DMA64 supports full 32- or 64-bit operation. AE is always valid */ + + /* not all tx or rx channel are available */ + if (di->d64txregs != NULL) { + if (!_dma64_addrext(di->d64txregs)) { + DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have " + "AE set\n", di->name)); + } + return true; + } else if (di->d64rxregs != NULL) { + if (!_dma64_addrext(di->d64rxregs)) { + DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have " + "AE set\n", di->name)); + } + return true; + } + return false; +} + +/* initialize descriptor table base address */ +static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa) +{ + if (!di->aligndesc_4k) { + if (direction == DMA_TX) + di->xmtptrbase = PHYSADDRLO(pa); + else + di->rcvptrbase = PHYSADDRLO(pa); + } + + if ((di->ddoffsetlow == 0) + || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { + if (direction == DMA_TX) { + W_REG(&di->d64txregs->addrlow, + (PHYSADDRLO(pa) + di->ddoffsetlow)); + W_REG(&di->d64txregs->addrhigh, + (PHYSADDRHI(pa) + di->ddoffsethigh)); + } else { + W_REG(&di->d64rxregs->addrlow, + (PHYSADDRLO(pa) + di->ddoffsetlow)); + W_REG(&di->d64rxregs->addrhigh, + (PHYSADDRHI(pa) + di->ddoffsethigh)); + } + } else { + /* DMA64 32bits address extension */ + u32 ae; + + /* shift the high bit(s) from pa to ae */ + ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> + PCI32ADDR_HIGH_SHIFT; + PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH; + + if (direction == DMA_TX) { + W_REG(&di->d64txregs->addrlow, + (PHYSADDRLO(pa) + di->ddoffsetlow)); + W_REG(&di->d64txregs->addrhigh, + di->ddoffsethigh); + SET_REG(&di->d64txregs->control, + D64_XC_AE, (ae << D64_XC_AE_SHIFT)); + } else { + W_REG(&di->d64rxregs->addrlow, + (PHYSADDRLO(pa) + di->ddoffsetlow)); + W_REG(&di->d64rxregs->addrhigh, + di->ddoffsethigh); + SET_REG(&di->d64rxregs->control, + D64_RC_AE, (ae << D64_RC_AE_SHIFT)); + } + } +} + +static void _dma_fifoloopbackenable(dma_info_t *di) +{ + DMA_TRACE(("%s: dma_fifoloopbackenable\n", di->name)); + + OR_REG(&di->d64txregs->control, D64_XC_LE); +} + +static void _dma_rxinit(dma_info_t *di) +{ + DMA_TRACE(("%s: dma_rxinit\n", di->name)); + + if (di->nrxd == 0) + return; + + di->rxin = di->rxout = 0; + + /* clear rx descriptor ring */ + memset((void *)di->rxd64, '\0', + (di->nrxd * sizeof(dma64dd_t))); + + /* DMA engine with out alignment requirement requires table to be inited + * before enabling the engine + */ + if (!di->aligndesc_4k) + _dma_ddtable_init(di, DMA_RX, di->rxdpa); + + _dma_rxenable(di); + + if (di->aligndesc_4k) + _dma_ddtable_init(di, DMA_RX, di->rxdpa); +} + +static void _dma_rxenable(dma_info_t *di) +{ + uint dmactrlflags = di->hnddma.dmactrlflags; + u32 control; + + DMA_TRACE(("%s: dma_rxenable\n", di->name)); + + control = + (R_REG(&di->d64rxregs->control) & D64_RC_AE) | + D64_RC_RE; + + if ((dmactrlflags & DMA_CTRL_PEN) == 0) + control |= D64_RC_PD; + + if (dmactrlflags & DMA_CTRL_ROC) + control |= D64_RC_OC; + + W_REG(&di->d64rxregs->control, + ((di->rxoffset << D64_RC_RO_SHIFT) | control)); +} + +static void +_dma_rx_param_get(dma_info_t *di, u16 *rxoffset, u16 *rxbufsize) +{ + /* the normal values fit into 16 bits */ + *rxoffset = (u16) di->rxoffset; + *rxbufsize = (u16) di->rxbufsize; +} + +/* !! rx entry routine + * returns a pointer to the next frame received, or NULL if there are no more + * if DMA_CTRL_RXMULTI is defined, DMA scattering(multiple buffers) is supported + * with pkts chain + * otherwise, it's treated as giant pkt and will be tossed. + * The DMA scattering starts with normal DMA header, followed by first buffer data. + * After it reaches the max size of buffer, the data continues in next DMA descriptor + * buffer WITHOUT DMA header + */ +static void *_dma_rx(dma_info_t *di) +{ + struct sk_buff *p, *head, *tail; + uint len; + uint pkt_len; + int resid = 0; + + next_frame: + head = _dma_getnextrxp(di, false); + if (head == NULL) + return NULL; + + len = le16_to_cpu(*(u16 *) (head->data)); + DMA_TRACE(("%s: dma_rx len %d\n", di->name, len)); + dma_spin_for_len(len, head); + + /* set actual length */ + pkt_len = min((di->rxoffset + len), di->rxbufsize); + __skb_trim(head, pkt_len); + resid = len - (di->rxbufsize - di->rxoffset); + + /* check for single or multi-buffer rx */ + if (resid > 0) { + tail = head; + while ((resid > 0) && (p = _dma_getnextrxp(di, false))) { + tail->next = p; + pkt_len = min(resid, (int)di->rxbufsize); + __skb_trim(p, pkt_len); + + tail = p; + resid -= di->rxbufsize; + } + +#ifdef BCMDBG + if (resid > 0) { + uint cur; + cur = + B2I(((R_REG(&di->d64rxregs->status0) & + D64_RS0_CD_MASK) - + di->rcvptrbase) & D64_RS0_CD_MASK, + dma64dd_t); + DMA_ERROR(("_dma_rx, rxin %d rxout %d, hw_curr %d\n", + di->rxin, di->rxout, cur)); + } +#endif /* BCMDBG */ + + if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { + DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n", + di->name, len)); + bcm_pkt_buf_free_skb(head); + di->hnddma.rxgiants++; + goto next_frame; + } + } + + return head; +} + +/* post receive buffers + * return false is refill failed completely and ring is empty + * this will stall the rx dma and user might want to call rxfill again asap + * This unlikely happens on memory-rich NIC, but often on memory-constrained dongle + */ +static bool _dma_rxfill(dma_info_t *di) +{ + struct sk_buff *p; + u16 rxin, rxout; + u32 flags = 0; + uint n; + uint i; + dmaaddr_t pa; + uint extra_offset = 0; + bool ring_empty; + + ring_empty = false; + + /* + * Determine how many receive buffers we're lacking + * from the full complement, allocate, initialize, + * and post them, then update the chip rx lastdscr. + */ + + rxin = di->rxin; + rxout = di->rxout; + + n = di->nrxpost - NRXDACTIVE(rxin, rxout); + + DMA_TRACE(("%s: dma_rxfill: post %d\n", di->name, n)); + + if (di->rxbufsize > BCMEXTRAHDROOM) + extra_offset = di->rxextrahdrroom; + + for (i = 0; i < n; i++) { + /* the di->rxbufsize doesn't include the extra headroom, we need to add it to the + size to be allocated + */ + + p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset); + + if (p == NULL) { + DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n", + di->name)); + if (i == 0 && dma64_rxidle(di)) { + DMA_ERROR(("%s: rxfill64: ring is empty !\n", + di->name)); + ring_empty = true; + } + di->hnddma.rxnobuf++; + break; + } + /* reserve an extra headroom, if applicable */ + if (extra_offset) + skb_pull(p, extra_offset); + + /* Do a cached write instead of uncached write since DMA_MAP + * will flush the cache. + */ + *(u32 *) (p->data) = 0; + + if (DMASGLIST_ENAB) + memset(&di->rxp_dmah[rxout], 0, + sizeof(hnddma_seg_map_t)); + + pa = pci_map_single(di->pbus, p->data, + di->rxbufsize, PCI_DMA_FROMDEVICE); + + /* save the free packet pointer */ + di->rxp[rxout] = p; + + /* reset flags for each descriptor */ + flags = 0; + if (rxout == (di->nrxd - 1)) + flags = D64_CTRL1_EOT; + + dma64_dd_upd(di, di->rxd64, pa, rxout, &flags, + di->rxbufsize); + rxout = NEXTRXD(rxout); + } + + di->rxout = rxout; + + /* update the chip lastdscr pointer */ + W_REG(&di->d64rxregs->ptr, + di->rcvptrbase + I2B(rxout, dma64dd_t)); + + return ring_empty; +} + +/* like getnexttxp but no reclaim */ +static void *_dma_peeknexttxp(dma_info_t *di) +{ + uint end, i; + + if (di->ntxd == 0) + return NULL; + + end = + B2I(((R_REG(&di->d64txregs->status0) & + D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, + dma64dd_t); + + for (i = di->txin; i != end; i = NEXTTXD(i)) + if (di->txp[i]) + return di->txp[i]; + + return NULL; +} + +/* like getnextrxp but not take off the ring */ +static void *_dma_peeknextrxp(dma_info_t *di) +{ + uint end, i; + + if (di->nrxd == 0) + return NULL; + + end = + B2I(((R_REG(&di->d64rxregs->status0) & + D64_RS0_CD_MASK) - di->rcvptrbase) & D64_RS0_CD_MASK, + dma64dd_t); + + for (i = di->rxin; i != end; i = NEXTRXD(i)) + if (di->rxp[i]) + return di->rxp[i]; + + return NULL; +} + +static void _dma_rxreclaim(dma_info_t *di) +{ + void *p; + + DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); + + while ((p = _dma_getnextrxp(di, true))) + bcm_pkt_buf_free_skb(p); +} + +static void *_dma_getnextrxp(dma_info_t *di, bool forceall) +{ + if (di->nrxd == 0) + return NULL; + + return dma64_getnextrxp(di, forceall); +} + +static void _dma_txblock(dma_info_t *di) +{ + di->hnddma.txavail = 0; +} + +static void _dma_txunblock(dma_info_t *di) +{ + di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; +} + +static uint _dma_txactive(dma_info_t *di) +{ + return NTXDACTIVE(di->txin, di->txout); +} + +static uint _dma_txpending(dma_info_t *di) +{ + uint curr; + + curr = + B2I(((R_REG(&di->d64txregs->status0) & + D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, + dma64dd_t); + + return NTXDACTIVE(curr, di->txout); +} + +static uint _dma_txcommitted(dma_info_t *di) +{ + uint ptr; + uint txin = di->txin; + + if (txin == di->txout) + return 0; + + ptr = B2I(R_REG(&di->d64txregs->ptr), dma64dd_t); + + return NTXDACTIVE(di->txin, ptr); +} + +static uint _dma_rxactive(dma_info_t *di) +{ + return NRXDACTIVE(di->rxin, di->rxout); +} + +static void _dma_counterreset(dma_info_t *di) +{ + /* reset all software counter */ + di->hnddma.rxgiants = 0; + di->hnddma.rxnobuf = 0; + di->hnddma.txnobuf = 0; +} + +static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) +{ + uint dmactrlflags = di->hnddma.dmactrlflags; + + if (di == NULL) { + DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name)); + return 0; + } + + dmactrlflags &= ~mask; + dmactrlflags |= flags; + + /* If trying to enable parity, check if parity is actually supported */ + if (dmactrlflags & DMA_CTRL_PEN) { + u32 control; + + control = R_REG(&di->d64txregs->control); + W_REG(&di->d64txregs->control, + control | D64_XC_PD); + if (R_REG(&di->d64txregs->control) & D64_XC_PD) { + /* We *can* disable it so it is supported, + * restore control register + */ + W_REG(&di->d64txregs->control, + control); + } else { + /* Not supported, don't allow it to be enabled */ + dmactrlflags &= ~DMA_CTRL_PEN; + } + } + + di->hnddma.dmactrlflags = dmactrlflags; + + return dmactrlflags; +} + +/* get the address of the var in order to change later */ +static unsigned long _dma_getvar(dma_info_t *di, const char *name) +{ + if (!strcmp(name, "&txavail")) + return (unsigned long)&(di->hnddma.txavail); + return 0; +} + +static +u8 dma_align_sizetobits(uint size) +{ + u8 bitpos = 0; + while (size >>= 1) { + bitpos++; + } + return bitpos; +} + +/* This function ensures that the DMA descriptor ring will not get allocated + * across Page boundary. If the allocation is done across the page boundary + * at the first time, then it is freed and the allocation is done at + * descriptor ring size aligned location. This will ensure that the ring will + * not cross page boundary + */ +static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, + u16 *alignbits, uint *alloced, + dmaaddr_t *descpa) +{ + void *va; + u32 desc_strtaddr; + u32 alignbytes = 1 << *alignbits; + + va = dma_alloc_consistent(di->pbus, size, *alignbits, alloced, descpa); + + if (NULL == va) + return NULL; + + desc_strtaddr = (u32) roundup((unsigned long)va, alignbytes); + if (((desc_strtaddr + size - 1) & boundary) != (desc_strtaddr + & boundary)) { + *alignbits = dma_align_sizetobits(size); + pci_free_consistent(di->pbus, size, va, *descpa); + va = dma_alloc_consistent(di->pbus, size, *alignbits, + alloced, descpa); + } + return va; +} + +/* 64-bit DMA functions */ + +static void dma64_txinit(dma_info_t *di) +{ + u32 control = D64_XC_XE; + + DMA_TRACE(("%s: dma_txinit\n", di->name)); + + if (di->ntxd == 0) + return; + + di->txin = di->txout = 0; + di->hnddma.txavail = di->ntxd - 1; + + /* clear tx descriptor ring */ + memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t))); + + /* DMA engine with out alignment requirement requires table to be inited + * before enabling the engine + */ + if (!di->aligndesc_4k) + _dma_ddtable_init(di, DMA_TX, di->txdpa); + + if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0) + control |= D64_XC_PD; + OR_REG(&di->d64txregs->control, control); + + /* DMA engine with alignment requirement requires table to be inited + * before enabling the engine + */ + if (di->aligndesc_4k) + _dma_ddtable_init(di, DMA_TX, di->txdpa); +} + +static bool dma64_txenabled(dma_info_t *di) +{ + u32 xc; + + /* If the chip is dead, it is not enabled :-) */ + xc = R_REG(&di->d64txregs->control); + return (xc != 0xffffffff) && (xc & D64_XC_XE); +} + +static void dma64_txsuspend(dma_info_t *di) +{ + DMA_TRACE(("%s: dma_txsuspend\n", di->name)); + + if (di->ntxd == 0) + return; + + OR_REG(&di->d64txregs->control, D64_XC_SE); +} + +static void dma64_txresume(dma_info_t *di) +{ + DMA_TRACE(("%s: dma_txresume\n", di->name)); + + if (di->ntxd == 0) + return; + + AND_REG(&di->d64txregs->control, ~D64_XC_SE); +} + +static bool dma64_txsuspended(dma_info_t *di) +{ + return (di->ntxd == 0) || + ((R_REG(&di->d64txregs->control) & D64_XC_SE) == + D64_XC_SE); +} + +static void dma64_txreclaim(dma_info_t *di, txd_range_t range) +{ + void *p; + + DMA_TRACE(("%s: dma_txreclaim %s\n", di->name, + (range == HNDDMA_RANGE_ALL) ? "all" : + ((range == + HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + "transferred"))); + + if (di->txin == di->txout) + return; + + while ((p = dma64_getnexttxp(di, range))) { + /* For unframed data, we don't have any packets to free */ + if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) + bcm_pkt_buf_free_skb(p); + } +} + +static bool dma64_txstopped(dma_info_t *di) +{ + return ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) == + D64_XS0_XS_STOPPED); +} + +static bool dma64_rxstopped(dma_info_t *di) +{ + return ((R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK) == + D64_RS0_RS_STOPPED); +} + +static bool dma64_alloc(dma_info_t *di, uint direction) +{ + u16 size; + uint ddlen; + void *va; + uint alloced = 0; + u16 align; + u16 align_bits; + + ddlen = sizeof(dma64dd_t); + + size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen); + align_bits = di->dmadesc_align; + align = (1 << align_bits); + + if (direction == DMA_TX) { + va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits, + &alloced, &di->txdpaorig); + if (va == NULL) { + DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(ntxd) failed\n", di->name)); + return false; + } + align = (1 << align_bits); + di->txd64 = (dma64dd_t *) roundup((unsigned long)va, align); + di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va); + PHYSADDRLOSET(di->txdpa, + PHYSADDRLO(di->txdpaorig) + di->txdalign); + PHYSADDRHISET(di->txdpa, PHYSADDRHI(di->txdpaorig)); + di->txdalloc = alloced; + } else { + va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits, + &alloced, &di->rxdpaorig); + if (va == NULL) { + DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(nrxd) failed\n", di->name)); + return false; + } + align = (1 << align_bits); + di->rxd64 = (dma64dd_t *) roundup((unsigned long)va, align); + di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va); + PHYSADDRLOSET(di->rxdpa, + PHYSADDRLO(di->rxdpaorig) + di->rxdalign); + PHYSADDRHISET(di->rxdpa, PHYSADDRHI(di->rxdpaorig)); + di->rxdalloc = alloced; + } + + return true; +} + +static bool dma64_txreset(dma_info_t *di) +{ + u32 status; + + if (di->ntxd == 0) + return true; + + /* suspend tx DMA first */ + W_REG(&di->d64txregs->control, D64_XC_SE); + SPINWAIT(((status = + (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK)) + != D64_XS0_XS_DISABLED) && (status != D64_XS0_XS_IDLE) + && (status != D64_XS0_XS_STOPPED), 10000); + + W_REG(&di->d64txregs->control, 0); + SPINWAIT(((status = + (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK)) + != D64_XS0_XS_DISABLED), 10000); + + /* wait for the last transaction to complete */ + udelay(300); + + return status == D64_XS0_XS_DISABLED; +} + +static bool dma64_rxidle(dma_info_t *di) +{ + DMA_TRACE(("%s: dma_rxidle\n", di->name)); + + if (di->nrxd == 0) + return true; + + return ((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) == + (R_REG(&di->d64rxregs->ptr) & D64_RS0_CD_MASK)); +} + +static bool dma64_rxreset(dma_info_t *di) +{ + u32 status; + + if (di->nrxd == 0) + return true; + + W_REG(&di->d64rxregs->control, 0); + SPINWAIT(((status = + (R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK)) + != D64_RS0_RS_DISABLED), 10000); + + return status == D64_RS0_RS_DISABLED; +} + +static bool dma64_rxenabled(dma_info_t *di) +{ + u32 rc; + + rc = R_REG(&di->d64rxregs->control); + return (rc != 0xffffffff) && (rc & D64_RC_RE); +} + +static bool dma64_txsuspendedidle(dma_info_t *di) +{ + + if (di->ntxd == 0) + return true; + + if (!(R_REG(&di->d64txregs->control) & D64_XC_SE)) + return 0; + + if ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) == + D64_XS0_XS_IDLE) + return 1; + + return 0; +} + +/* Useful when sending unframed data. This allows us to get a progress report from the DMA. + * We return a pointer to the beginning of the DATA buffer of the current descriptor. + * If DMA is idle, we return NULL. + */ +static void *dma64_getpos(dma_info_t *di, bool direction) +{ + void *va; + bool idle; + u32 cd_offset; + + if (direction == DMA_TX) { + cd_offset = + R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK; + idle = !NTXDACTIVE(di->txin, di->txout); + va = di->txp[B2I(cd_offset, dma64dd_t)]; + } else { + cd_offset = + R_REG(&di->d64rxregs->status0) & D64_XS0_CD_MASK; + idle = !NRXDACTIVE(di->rxin, di->rxout); + va = di->rxp[B2I(cd_offset, dma64dd_t)]; + } + + /* If DMA is IDLE, return NULL */ + if (idle) { + DMA_TRACE(("%s: DMA idle, return NULL\n", __func__)); + va = NULL; + } + + return va; +} + +/* TX of unframed data + * + * Adds a DMA ring descriptor for the data pointed to by "buf". + * This is for DMA of a buffer of data and is unlike other hnddma TX functions + * that take a pointer to a "packet" + * Each call to this is results in a single descriptor being added for "len" bytes of + * data starting at "buf", it doesn't handle chained buffers. + */ +static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) +{ + u16 txout; + u32 flags = 0; + dmaaddr_t pa; /* phys addr */ + + txout = di->txout; + + /* return nonzero if out of tx descriptors */ + if (NEXTTXD(txout) == di->txin) + goto outoftxd; + + if (len == 0) + return 0; + + pa = pci_map_single(di->pbus, buf, len, PCI_DMA_TODEVICE); + + flags = (D64_CTRL1_SOF | D64_CTRL1_IOC | D64_CTRL1_EOF); + + if (txout == (di->ntxd - 1)) + flags |= D64_CTRL1_EOT; + + dma64_dd_upd(di, di->txd64, pa, txout, &flags, len); + + /* save the buffer pointer - used by dma_getpos */ + di->txp[txout] = buf; + + txout = NEXTTXD(txout); + /* bump the tx descriptor index */ + di->txout = txout; + + /* kick the chip */ + if (commit) { + W_REG(&di->d64txregs->ptr, + di->xmtptrbase + I2B(txout, dma64dd_t)); + } + + /* tx flow control */ + di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + + return 0; + + outoftxd: + DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__)); + di->hnddma.txavail = 0; + di->hnddma.txnobuf++; + return -1; +} + +/* !! tx entry routine + * WARNING: call must check the return value for error. + * the error(toss frames) could be fatal and cause many subsequent hard to debug problems + */ +static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, + bool commit) +{ + struct sk_buff *p, *next; + unsigned char *data; + uint len; + u16 txout; + u32 flags = 0; + dmaaddr_t pa; + + DMA_TRACE(("%s: dma_txfast\n", di->name)); + + txout = di->txout; + + /* + * Walk the chain of packet buffers + * allocating and initializing transmit descriptor entries. + */ + for (p = p0; p; p = next) { + uint nsegs, j; + hnddma_seg_map_t *map; + + data = p->data; + len = p->len; + next = p->next; + + /* return nonzero if out of tx descriptors */ + if (NEXTTXD(txout) == di->txin) + goto outoftxd; + + if (len == 0) + continue; + + /* get physical address of buffer start */ + if (DMASGLIST_ENAB) + memset(&di->txp_dmah[txout], 0, + sizeof(hnddma_seg_map_t)); + + pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE); + + if (DMASGLIST_ENAB) { + map = &di->txp_dmah[txout]; + + /* See if all the segments can be accounted for */ + if (map->nsegs > + (uint) (di->ntxd - NTXDACTIVE(di->txin, di->txout) - + 1)) + goto outoftxd; + + nsegs = map->nsegs; + } else + nsegs = 1; + + for (j = 1; j <= nsegs; j++) { + flags = 0; + if (p == p0 && j == 1) + flags |= D64_CTRL1_SOF; + + /* With a DMA segment list, Descriptor table is filled + * using the segment list instead of looping over + * buffers in multi-chain DMA. Therefore, EOF for SGLIST is when + * end of segment list is reached. + */ + if ((!DMASGLIST_ENAB && next == NULL) || + (DMASGLIST_ENAB && j == nsegs)) + flags |= (D64_CTRL1_IOC | D64_CTRL1_EOF); + if (txout == (di->ntxd - 1)) + flags |= D64_CTRL1_EOT; + + if (DMASGLIST_ENAB) { + len = map->segs[j - 1].length; + pa = map->segs[j - 1].addr; + } + dma64_dd_upd(di, di->txd64, pa, txout, &flags, len); + + txout = NEXTTXD(txout); + } + + /* See above. No need to loop over individual buffers */ + if (DMASGLIST_ENAB) + break; + } + + /* if last txd eof not set, fix it */ + if (!(flags & D64_CTRL1_EOF)) + W_SM(&di->txd64[PREVTXD(txout)].ctrl1, + BUS_SWAP32(flags | D64_CTRL1_IOC | D64_CTRL1_EOF)); + + /* save the packet */ + di->txp[PREVTXD(txout)] = p0; + + /* bump the tx descriptor index */ + di->txout = txout; + + /* kick the chip */ + if (commit) + W_REG(&di->d64txregs->ptr, + di->xmtptrbase + I2B(txout, dma64dd_t)); + + /* tx flow control */ + di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + + return 0; + + outoftxd: + DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); + bcm_pkt_buf_free_skb(p0); + di->hnddma.txavail = 0; + di->hnddma.txnobuf++; + return -1; +} + +/* + * Reclaim next completed txd (txds if using chained buffers) in the range + * specified and return associated packet. + * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be + * transmitted as noted by the hardware "CurrDescr" pointer. + * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be + * transferred by the DMA as noted by the hardware "ActiveDescr" pointer. + * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and + * return associated packet regardless of the value of hardware pointers. + */ +static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) +{ + u16 start, end, i; + u16 active_desc; + void *txp; + + DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name, + (range == HNDDMA_RANGE_ALL) ? "all" : + ((range == + HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + "transferred"))); + + if (di->ntxd == 0) + return NULL; + + txp = NULL; + + start = di->txin; + if (range == HNDDMA_RANGE_ALL) + end = di->txout; + else { + dma64regs_t *dregs = di->d64txregs; + + end = + (u16) (B2I + (((R_REG(&dregs->status0) & + D64_XS0_CD_MASK) - + di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t)); + + if (range == HNDDMA_RANGE_TRANSFERED) { + active_desc = + (u16) (R_REG(&dregs->status1) & + D64_XS1_AD_MASK); + active_desc = + (active_desc - di->xmtptrbase) & D64_XS0_CD_MASK; + active_desc = B2I(active_desc, dma64dd_t); + if (end != active_desc) + end = PREVTXD(active_desc); + } + } + + if ((start == 0) && (end > di->txout)) + goto bogus; + + for (i = start; i != end && !txp; i = NEXTTXD(i)) { + dmaaddr_t pa; + hnddma_seg_map_t *map = NULL; + uint size, j, nsegs; + + PHYSADDRLOSET(pa, + (BUS_SWAP32(R_SM(&di->txd64[i].addrlow)) - + di->dataoffsetlow)); + PHYSADDRHISET(pa, + (BUS_SWAP32(R_SM(&di->txd64[i].addrhigh)) - + di->dataoffsethigh)); + + if (DMASGLIST_ENAB) { + map = &di->txp_dmah[i]; + size = map->origsize; + nsegs = map->nsegs; + } else { + size = + (BUS_SWAP32(R_SM(&di->txd64[i].ctrl2)) & + D64_CTRL2_BC_MASK); + nsegs = 1; + } + + for (j = nsegs; j > 0; j--) { + W_SM(&di->txd64[i].addrlow, 0xdeadbeef); + W_SM(&di->txd64[i].addrhigh, 0xdeadbeef); + + txp = di->txp[i]; + di->txp[i] = NULL; + if (j > 1) + i = NEXTTXD(i); + } + + pci_unmap_single(di->pbus, pa, size, PCI_DMA_TODEVICE); + } + + di->txin = i; + + /* tx flow control */ + di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + + return txp; + + bogus: + DMA_NONE(("dma_getnexttxp: bogus curr: start %d end %d txout %d force %d\n", start, end, di->txout, forceall)); + return NULL; +} + +static void *dma64_getnextrxp(dma_info_t *di, bool forceall) +{ + uint i, curr; + void *rxp; + dmaaddr_t pa; + + i = di->rxin; + + /* return if no packets posted */ + if (i == di->rxout) + return NULL; + + curr = + B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) - + di->rcvptrbase) & D64_RS0_CD_MASK, dma64dd_t); + + /* ignore curr if forceall */ + if (!forceall && (i == curr)) + return NULL; + + /* get the packet pointer that corresponds to the rx descriptor */ + rxp = di->rxp[i]; + di->rxp[i] = NULL; + + PHYSADDRLOSET(pa, + (BUS_SWAP32(R_SM(&di->rxd64[i].addrlow)) - + di->dataoffsetlow)); + PHYSADDRHISET(pa, + (BUS_SWAP32(R_SM(&di->rxd64[i].addrhigh)) - + di->dataoffsethigh)); + + /* clear this packet from the descriptor ring */ + pci_unmap_single(di->pbus, pa, di->rxbufsize, PCI_DMA_FROMDEVICE); + + W_SM(&di->rxd64[i].addrlow, 0xdeadbeef); + W_SM(&di->rxd64[i].addrhigh, 0xdeadbeef); + + di->rxin = NEXTRXD(i); + + return rxp; +} + +static bool _dma64_addrext(dma64regs_t *dma64regs) +{ + u32 w; + OR_REG(&dma64regs->control, D64_XC_AE); + w = R_REG(&dma64regs->control); + AND_REG(&dma64regs->control, ~D64_XC_AE); + return (w & D64_XC_AE) == D64_XC_AE; +} + +/* + * Rotate all active tx dma ring entries "forward" by (ActiveDescriptor - txin). + */ +static void dma64_txrotate(dma_info_t *di) +{ + u16 ad; + uint nactive; + uint rot; + u16 old, new; + u32 w; + u16 first, last; + + nactive = _dma_txactive(di); + ad = (u16) (B2I + ((((R_REG(&di->d64txregs->status1) & + D64_XS1_AD_MASK) + - di->xmtptrbase) & D64_XS1_AD_MASK), dma64dd_t)); + rot = TXD(ad - di->txin); + + /* full-ring case is a lot harder - don't worry about this */ + if (rot >= (di->ntxd - nactive)) { + DMA_ERROR(("%s: dma_txrotate: ring full - punt\n", di->name)); + return; + } + + first = di->txin; + last = PREVTXD(di->txout); + + /* move entries starting at last and moving backwards to first */ + for (old = last; old != PREVTXD(first); old = PREVTXD(old)) { + new = TXD(old + rot); + + /* + * Move the tx dma descriptor. + * EOT is set only in the last entry in the ring. + */ + w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl1)) & ~D64_CTRL1_EOT; + if (new == (di->ntxd - 1)) + w |= D64_CTRL1_EOT; + W_SM(&di->txd64[new].ctrl1, BUS_SWAP32(w)); + + w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl2)); + W_SM(&di->txd64[new].ctrl2, BUS_SWAP32(w)); + + W_SM(&di->txd64[new].addrlow, R_SM(&di->txd64[old].addrlow)); + W_SM(&di->txd64[new].addrhigh, R_SM(&di->txd64[old].addrhigh)); + + /* zap the old tx dma descriptor address field */ + W_SM(&di->txd64[old].addrlow, BUS_SWAP32(0xdeadbeef)); + W_SM(&di->txd64[old].addrhigh, BUS_SWAP32(0xdeadbeef)); + + /* move the corresponding txp[] entry */ + di->txp[new] = di->txp[old]; + + /* Move the map */ + if (DMASGLIST_ENAB) { + memcpy(&di->txp_dmah[new], &di->txp_dmah[old], + sizeof(hnddma_seg_map_t)); + memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t)); + } + + di->txp[old] = NULL; + } + + /* update txin and txout */ + di->txin = ad; + di->txout = TXD(di->txout + rot); + di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + + /* kick the chip */ + W_REG(&di->d64txregs->ptr, + di->xmtptrbase + I2B(di->txout, dma64dd_t)); +} + +uint dma_addrwidth(si_t *sih, void *dmaregs) +{ + /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */ + /* DMA engine is 64-bit capable */ + if ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) { + /* backplane are 64-bit capable */ + if (ai_backplane64(sih)) + /* If bus is System Backplane or PCIE then we can access 64-bits */ + if ((sih->bustype == SI_BUS) || + ((sih->bustype == PCI_BUS) && + (sih->buscoretype == PCIE_CORE_ID))) + return DMADDRWIDTH_64; + } + /* DMA hardware not supported by this driver*/ + return DMADDRWIDTH_64; +} + +/* + * Mac80211 initiated actions sometimes require packets in the DMA queue to be + * modified. The modified portion of the packet is not under control of the DMA + * engine. This function calls a caller-supplied function for each packet in + * the caller specified dma chain. + */ +void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) + (void *pkt, void *arg_a), void *arg_a) +{ + dma_info_t *di = (dma_info_t *) dmah; + uint i = di->txin; + uint end = di->txout; + struct sk_buff *skb; + struct ieee80211_tx_info *tx_info; + + while (i != end) { + skb = (struct sk_buff *)di->txp[i]; + if (skb != NULL) { + tx_info = (struct ieee80211_tx_info *)skb->cb; + (callback_fnc)(tx_info, arg_a); + } + i = NEXTTXD(i); + } +} diff --git a/drivers/staging/brcm80211/brcmsmac/hnddma.c b/drivers/staging/brcm80211/brcmsmac/hnddma.c deleted file mode 100644 index f607315..0000000 --- a/drivers/staging/brcm80211/brcmsmac/hnddma.c +++ /dev/null @@ -1,1756 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#if defined(__mips__) -#include -#endif - -#ifdef BRCM_FULLMAC -#error "hnddma.c shouldn't be needed for FULLMAC" -#endif - -/* debug/trace */ -#ifdef BCMDBG -#define DMA_ERROR(args) \ - do { \ - if (!(*di->msg_level & 1)) \ - ; \ - else \ - printk args; \ - } while (0) -#define DMA_TRACE(args) \ - do { \ - if (!(*di->msg_level & 2)) \ - ; \ - else \ - printk args; \ - } while (0) -#else -#define DMA_ERROR(args) -#define DMA_TRACE(args) -#endif /* BCMDBG */ - -#define DMA_NONE(args) - -#define d64txregs dregs.d64_u.txregs_64 -#define d64rxregs dregs.d64_u.rxregs_64 -#define txd64 dregs.d64_u.txd_64 -#define rxd64 dregs.d64_u.rxd_64 - -/* default dma message level (if input msg_level pointer is null in dma_attach()) */ -static uint dma_msg_level; - -#define MAXNAMEL 8 /* 8 char names */ - -#define DI_INFO(dmah) ((dma_info_t *)dmah) - -#define R_SM(r) (*(r)) -#define W_SM(r, v) (*(r) = (v)) - -/* dma engine software state */ -typedef struct dma_info { - struct hnddma_pub hnddma; /* exported structure */ - uint *msg_level; /* message level pointer */ - char name[MAXNAMEL]; /* callers name for diag msgs */ - - void *pbus; /* bus handle */ - - bool dma64; /* this dma engine is operating in 64-bit mode */ - bool addrext; /* this dma engine supports DmaExtendedAddrChanges */ - - union { - struct { - dma64regs_t *txregs_64; /* 64-bit dma tx engine registers */ - dma64regs_t *rxregs_64; /* 64-bit dma rx engine registers */ - dma64dd_t *txd_64; /* pointer to dma64 tx descriptor ring */ - dma64dd_t *rxd_64; /* pointer to dma64 rx descriptor ring */ - } d64_u; - } dregs; - - u16 dmadesc_align; /* alignment requirement for dma descriptors */ - - u16 ntxd; /* # tx descriptors tunable */ - u16 txin; /* index of next descriptor to reclaim */ - u16 txout; /* index of next descriptor to post */ - void **txp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */ - dmaaddr_t txdpa; /* Aligned physical address of descriptor ring */ - dmaaddr_t txdpaorig; /* Original physical address of descriptor ring */ - u16 txdalign; /* #bytes added to alloc'd mem to align txd */ - u32 txdalloc; /* #bytes allocated for the ring */ - u32 xmtptrbase; /* When using unaligned descriptors, the ptr register - * is not just an index, it needs all 13 bits to be - * an offset from the addr register. - */ - - u16 nrxd; /* # rx descriptors tunable */ - u16 rxin; /* index of next descriptor to reclaim */ - u16 rxout; /* index of next descriptor to post */ - void **rxp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */ - dmaaddr_t rxdpa; /* Aligned physical address of descriptor ring */ - dmaaddr_t rxdpaorig; /* Original physical address of descriptor ring */ - u16 rxdalign; /* #bytes added to alloc'd mem to align rxd */ - u32 rxdalloc; /* #bytes allocated for the ring */ - u32 rcvptrbase; /* Base for ptr reg when using unaligned descriptors */ - - /* tunables */ - unsigned int rxbufsize; /* rx buffer size in bytes, - * not including the extra headroom - */ - uint rxextrahdrroom; /* extra rx headroom, reverseved to assist upper stack - * e.g. some rx pkt buffers will be bridged to tx side - * without byte copying. The extra headroom needs to be - * large enough to fit txheader needs. - * Some dongle driver may not need it. - */ - uint nrxpost; /* # rx buffers to keep posted */ - unsigned int rxoffset; /* rxcontrol offset */ - uint ddoffsetlow; /* add to get dma address of descriptor ring, low 32 bits */ - uint ddoffsethigh; /* high 32 bits */ - uint dataoffsetlow; /* add to get dma address of data buffer, low 32 bits */ - uint dataoffsethigh; /* high 32 bits */ - bool aligndesc_4k; /* descriptor base need to be aligned or not */ -} dma_info_t; - -/* DMA Scatter-gather list is supported. Note this is limited to TX direction only */ -#ifdef BCMDMASGLISTOSL -#define DMASGLIST_ENAB true -#else -#define DMASGLIST_ENAB false -#endif /* BCMDMASGLISTOSL */ - -/* descriptor bumping macros */ -#define XXD(x, n) ((x) & ((n) - 1)) /* faster than %, but n must be power of 2 */ -#define TXD(x) XXD((x), di->ntxd) -#define RXD(x) XXD((x), di->nrxd) -#define NEXTTXD(i) TXD((i) + 1) -#define PREVTXD(i) TXD((i) - 1) -#define NEXTRXD(i) RXD((i) + 1) -#define PREVRXD(i) RXD((i) - 1) - -#define NTXDACTIVE(h, t) TXD((t) - (h)) -#define NRXDACTIVE(h, t) RXD((t) - (h)) - -/* macros to convert between byte offsets and indexes */ -#define B2I(bytes, type) ((bytes) / sizeof(type)) -#define I2B(index, type) ((index) * sizeof(type)) - -#define PCI32ADDR_HIGH 0xc0000000 /* address[31:30] */ -#define PCI32ADDR_HIGH_SHIFT 30 /* address[31:30] */ - -#define PCI64ADDR_HIGH 0x80000000 /* address[63] */ -#define PCI64ADDR_HIGH_SHIFT 31 /* address[63] */ - -/* Common prototypes */ -static bool _dma_isaddrext(dma_info_t *di); -static bool _dma_descriptor_align(dma_info_t *di); -static bool _dma_alloc(dma_info_t *di, uint direction); -static void _dma_detach(dma_info_t *di); -static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa); -static void _dma_rxinit(dma_info_t *di); -static void *_dma_rx(dma_info_t *di); -static bool _dma_rxfill(dma_info_t *di); -static void _dma_rxreclaim(dma_info_t *di); -static void _dma_rxenable(dma_info_t *di); -static void *_dma_getnextrxp(dma_info_t *di, bool forceall); -static void _dma_rx_param_get(dma_info_t *di, u16 *rxoffset, - u16 *rxbufsize); - -static void _dma_txblock(dma_info_t *di); -static void _dma_txunblock(dma_info_t *di); -static uint _dma_txactive(dma_info_t *di); -static uint _dma_rxactive(dma_info_t *di); -static uint _dma_txpending(dma_info_t *di); -static uint _dma_txcommitted(dma_info_t *di); - -static void *_dma_peeknexttxp(dma_info_t *di); -static void *_dma_peeknextrxp(dma_info_t *di); -static unsigned long _dma_getvar(dma_info_t *di, const char *name); -static void _dma_counterreset(dma_info_t *di); -static void _dma_fifoloopbackenable(dma_info_t *di); -static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags); -static u8 dma_align_sizetobits(uint size); -static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, - u16 *alignbits, uint *alloced, - dmaaddr_t *descpa); - -/* Prototypes for 64-bit routines */ -static bool dma64_alloc(dma_info_t *di, uint direction); -static bool dma64_txreset(dma_info_t *di); -static bool dma64_rxreset(dma_info_t *di); -static bool dma64_txsuspendedidle(dma_info_t *di); -static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, bool commit); -static int dma64_txunframed(dma_info_t *di, void *p0, uint len, bool commit); -static void *dma64_getpos(dma_info_t *di, bool direction); -static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range); -static void *dma64_getnextrxp(dma_info_t *di, bool forceall); -static void dma64_txrotate(dma_info_t *di); - -static bool dma64_rxidle(dma_info_t *di); -static void dma64_txinit(dma_info_t *di); -static bool dma64_txenabled(dma_info_t *di); -static void dma64_txsuspend(dma_info_t *di); -static void dma64_txresume(dma_info_t *di); -static bool dma64_txsuspended(dma_info_t *di); -static void dma64_txreclaim(dma_info_t *di, txd_range_t range); -static bool dma64_txstopped(dma_info_t *di); -static bool dma64_rxstopped(dma_info_t *di); -static bool dma64_rxenabled(dma_info_t *di); -static bool _dma64_addrext(dma64regs_t *dma64regs); - -static inline u32 parity32(u32 data); - -const di_fcn_t dma64proc = { - (di_detach_t) _dma_detach, - (di_txinit_t) dma64_txinit, - (di_txreset_t) dma64_txreset, - (di_txenabled_t) dma64_txenabled, - (di_txsuspend_t) dma64_txsuspend, - (di_txresume_t) dma64_txresume, - (di_txsuspended_t) dma64_txsuspended, - (di_txsuspendedidle_t) dma64_txsuspendedidle, - (di_txfast_t) dma64_txfast, - (di_txunframed_t) dma64_txunframed, - (di_getpos_t) dma64_getpos, - (di_txstopped_t) dma64_txstopped, - (di_txreclaim_t) dma64_txreclaim, - (di_getnexttxp_t) dma64_getnexttxp, - (di_peeknexttxp_t) _dma_peeknexttxp, - (di_txblock_t) _dma_txblock, - (di_txunblock_t) _dma_txunblock, - (di_txactive_t) _dma_txactive, - (di_txrotate_t) dma64_txrotate, - - (di_rxinit_t) _dma_rxinit, - (di_rxreset_t) dma64_rxreset, - (di_rxidle_t) dma64_rxidle, - (di_rxstopped_t) dma64_rxstopped, - (di_rxenable_t) _dma_rxenable, - (di_rxenabled_t) dma64_rxenabled, - (di_rx_t) _dma_rx, - (di_rxfill_t) _dma_rxfill, - (di_rxreclaim_t) _dma_rxreclaim, - (di_getnextrxp_t) _dma_getnextrxp, - (di_peeknextrxp_t) _dma_peeknextrxp, - (di_rxparam_get_t) _dma_rx_param_get, - - (di_fifoloopbackenable_t) _dma_fifoloopbackenable, - (di_getvar_t) _dma_getvar, - (di_counterreset_t) _dma_counterreset, - (di_ctrlflags_t) _dma_ctrlflags, - NULL, - NULL, - NULL, - (di_rxactive_t) _dma_rxactive, - (di_txpending_t) _dma_txpending, - (di_txcommitted_t) _dma_txcommitted, - 39 -}; - -struct hnddma_pub *dma_attach(char *name, si_t *sih, - void *dmaregstx, void *dmaregsrx, uint ntxd, - uint nrxd, uint rxbufsize, int rxextheadroom, - uint nrxpost, uint rxoffset, uint *msg_level) -{ - dma_info_t *di; - uint size; - - /* allocate private info structure */ - di = kzalloc(sizeof(dma_info_t), GFP_ATOMIC); - if (di == NULL) { -#ifdef BCMDBG - printk(KERN_ERR "dma_attach: out of memory\n"); -#endif - return NULL; - } - - di->msg_level = msg_level ? msg_level : &dma_msg_level; - - - di->dma64 = ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64); - - /* init dma reg pointer */ - di->d64txregs = (dma64regs_t *) dmaregstx; - di->d64rxregs = (dma64regs_t *) dmaregsrx; - di->hnddma.di_fn = (const di_fcn_t *)&dma64proc; - - /* Default flags (which can be changed by the driver calling dma_ctrlflags - * before enable): For backwards compatibility both Rx Overflow Continue - * and Parity are DISABLED. - * supports it. - */ - di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN, - 0); - - DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d " - "rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d " - "dmaregstx %p dmaregsrx %p\n", name, "DMA64", - di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize, - rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx)); - - /* make a private copy of our callers name */ - strncpy(di->name, name, MAXNAMEL); - di->name[MAXNAMEL - 1] = '\0'; - - di->pbus = ((struct si_info *)sih)->pbus; - - /* save tunables */ - di->ntxd = (u16) ntxd; - di->nrxd = (u16) nrxd; - - /* the actual dma size doesn't include the extra headroom */ - di->rxextrahdrroom = - (rxextheadroom == -1) ? BCMEXTRAHDROOM : rxextheadroom; - if (rxbufsize > BCMEXTRAHDROOM) - di->rxbufsize = (u16) (rxbufsize - di->rxextrahdrroom); - else - di->rxbufsize = (u16) rxbufsize; - - di->nrxpost = (u16) nrxpost; - di->rxoffset = (u8) rxoffset; - - /* - * figure out the DMA physical address offset for dd and data - * PCI/PCIE: they map silicon backplace address to zero based memory, need offset - * Other bus: use zero - * SI_BUS BIGENDIAN kludge: use sdram swapped region for data buffer, not descriptor - */ - di->ddoffsetlow = 0; - di->dataoffsetlow = 0; - /* for pci bus, add offset */ - if (sih->bustype == PCI_BUS) { - /* pcie with DMA64 */ - di->ddoffsetlow = 0; - di->ddoffsethigh = SI_PCIE_DMA_H32; - di->dataoffsetlow = di->ddoffsetlow; - di->dataoffsethigh = di->ddoffsethigh; - } -#if defined(__mips__) && defined(IL_BIGENDIAN) - di->dataoffsetlow = di->dataoffsetlow + SI_SDRAM_SWAPPED; -#endif /* defined(__mips__) && defined(IL_BIGENDIAN) */ - /* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */ - if ((ai_coreid(sih) == SDIOD_CORE_ID) - && ((ai_corerev(sih) > 0) && (ai_corerev(sih) <= 2))) - di->addrext = 0; - else if ((ai_coreid(sih) == I2S_CORE_ID) && - ((ai_corerev(sih) == 0) || (ai_corerev(sih) == 1))) - di->addrext = 0; - else - di->addrext = _dma_isaddrext(di); - - /* does the descriptors need to be aligned and if yes, on 4K/8K or not */ - di->aligndesc_4k = _dma_descriptor_align(di); - if (di->aligndesc_4k) { - di->dmadesc_align = D64RINGALIGN_BITS; - if ((ntxd < D64MAXDD / 2) && (nrxd < D64MAXDD / 2)) { - /* for smaller dd table, HW relax alignment reqmnt */ - di->dmadesc_align = D64RINGALIGN_BITS - 1; - } - } else - di->dmadesc_align = 4; /* 16 byte alignment */ - - DMA_NONE(("DMA descriptor align_needed %d, align %d\n", - di->aligndesc_4k, di->dmadesc_align)); - - /* allocate tx packet pointer vector */ - if (ntxd) { - size = ntxd * sizeof(void *); - di->txp = kzalloc(size, GFP_ATOMIC); - if (di->txp == NULL) { - DMA_ERROR(("%s: dma_attach: out of tx memory\n", di->name)); - goto fail; - } - } - - /* allocate rx packet pointer vector */ - if (nrxd) { - size = nrxd * sizeof(void *); - di->rxp = kzalloc(size, GFP_ATOMIC); - if (di->rxp == NULL) { - DMA_ERROR(("%s: dma_attach: out of rx memory\n", di->name)); - goto fail; - } - } - - /* allocate transmit descriptor ring, only need ntxd descriptors but it must be aligned */ - if (ntxd) { - if (!_dma_alloc(di, DMA_TX)) - goto fail; - } - - /* allocate receive descriptor ring, only need nrxd descriptors but it must be aligned */ - if (nrxd) { - if (!_dma_alloc(di, DMA_RX)) - goto fail; - } - - if ((di->ddoffsetlow != 0) && !di->addrext) { - if (PHYSADDRLO(di->txdpa) > SI_PCI_DMA_SZ) { - DMA_ERROR(("%s: dma_attach: txdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->txdpa))); - goto fail; - } - if (PHYSADDRLO(di->rxdpa) > SI_PCI_DMA_SZ) { - DMA_ERROR(("%s: dma_attach: rxdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->rxdpa))); - goto fail; - } - } - - DMA_TRACE(("ddoffsetlow 0x%x ddoffsethigh 0x%x dataoffsetlow 0x%x dataoffsethigh " "0x%x addrext %d\n", di->ddoffsetlow, di->ddoffsethigh, di->dataoffsetlow, di->dataoffsethigh, di->addrext)); - - /* allocate DMA mapping vectors */ - if (DMASGLIST_ENAB) { - if (ntxd) { - size = ntxd * sizeof(hnddma_seg_map_t); - di->txp_dmah = kzalloc(size, GFP_ATOMIC); - if (di->txp_dmah == NULL) - goto fail; - } - - if (nrxd) { - size = nrxd * sizeof(hnddma_seg_map_t); - di->rxp_dmah = kzalloc(size, GFP_ATOMIC); - if (di->rxp_dmah == NULL) - goto fail; - } - } - - return (struct hnddma_pub *) di; - - fail: - _dma_detach(di); - return NULL; -} - -/* Check for odd number of 1's */ -static inline u32 parity32(u32 data) -{ - data ^= data >> 16; - data ^= data >> 8; - data ^= data >> 4; - data ^= data >> 2; - data ^= data >> 1; - - return data & 1; -} - -#define DMA64_DD_PARITY(dd) parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2) - -static inline void -dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, - u32 *flags, u32 bufcount) -{ - u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK; - - /* PCI bus with big(>1G) physical address, use address extension */ -#if defined(__mips__) && defined(IL_BIGENDIAN) - if ((di->dataoffsetlow == SI_SDRAM_SWAPPED) - || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { -#else - if ((di->dataoffsetlow == 0) || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { -#endif /* defined(__mips__) && defined(IL_BIGENDIAN) */ - - W_SM(&ddring[outidx].addrlow, - BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow)); - W_SM(&ddring[outidx].addrhigh, - BUS_SWAP32(PHYSADDRHI(pa) + di->dataoffsethigh)); - W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); - W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); - } else { - /* address extension for 32-bit PCI */ - u32 ae; - - ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; - PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH; - - ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; - W_SM(&ddring[outidx].addrlow, - BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow)); - W_SM(&ddring[outidx].addrhigh, - BUS_SWAP32(0 + di->dataoffsethigh)); - W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); - W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); - } - if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) { - if (DMA64_DD_PARITY(&ddring[outidx])) { - W_SM(&ddring[outidx].ctrl2, - BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY)); - } - } -} - -static bool _dma_alloc(dma_info_t *di, uint direction) -{ - return dma64_alloc(di, direction); -} - -void *dma_alloc_consistent(struct pci_dev *pdev, uint size, u16 align_bits, - uint *alloced, unsigned long *pap) -{ - if (align_bits) { - u16 align = (1 << align_bits); - if (!IS_ALIGNED(PAGE_SIZE, align)) - size += align; - *alloced = size; - } - return pci_alloc_consistent(pdev, size, (dma_addr_t *) pap); -} - -/* !! may be called with core in reset */ -static void _dma_detach(dma_info_t *di) -{ - - DMA_TRACE(("%s: dma_detach\n", di->name)); - - /* free dma descriptor rings */ - if (di->txd64) - pci_free_consistent(di->pbus, di->txdalloc, - ((s8 *)di->txd64 - di->txdalign), - (di->txdpaorig)); - if (di->rxd64) - pci_free_consistent(di->pbus, di->rxdalloc, - ((s8 *)di->rxd64 - di->rxdalign), - (di->rxdpaorig)); - - /* free packet pointer vectors */ - kfree(di->txp); - kfree(di->rxp); - - /* free tx packet DMA handles */ - kfree(di->txp_dmah); - - /* free rx packet DMA handles */ - kfree(di->rxp_dmah); - - /* free our private info structure */ - kfree(di); - -} - -static bool _dma_descriptor_align(dma_info_t *di) -{ - u32 addrl; - - /* Check to see if the descriptors need to be aligned on 4K/8K or not */ - if (di->d64txregs != NULL) { - W_REG(&di->d64txregs->addrlow, 0xff0); - addrl = R_REG(&di->d64txregs->addrlow); - if (addrl != 0) - return false; - } else if (di->d64rxregs != NULL) { - W_REG(&di->d64rxregs->addrlow, 0xff0); - addrl = R_REG(&di->d64rxregs->addrlow); - if (addrl != 0) - return false; - } - return true; -} - -/* return true if this dma engine supports DmaExtendedAddrChanges, otherwise false */ -static bool _dma_isaddrext(dma_info_t *di) -{ - /* DMA64 supports full 32- or 64-bit operation. AE is always valid */ - - /* not all tx or rx channel are available */ - if (di->d64txregs != NULL) { - if (!_dma64_addrext(di->d64txregs)) { - DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have " - "AE set\n", di->name)); - } - return true; - } else if (di->d64rxregs != NULL) { - if (!_dma64_addrext(di->d64rxregs)) { - DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have " - "AE set\n", di->name)); - } - return true; - } - return false; -} - -/* initialize descriptor table base address */ -static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa) -{ - if (!di->aligndesc_4k) { - if (direction == DMA_TX) - di->xmtptrbase = PHYSADDRLO(pa); - else - di->rcvptrbase = PHYSADDRLO(pa); - } - - if ((di->ddoffsetlow == 0) - || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) { - if (direction == DMA_TX) { - W_REG(&di->d64txregs->addrlow, - (PHYSADDRLO(pa) + di->ddoffsetlow)); - W_REG(&di->d64txregs->addrhigh, - (PHYSADDRHI(pa) + di->ddoffsethigh)); - } else { - W_REG(&di->d64rxregs->addrlow, - (PHYSADDRLO(pa) + di->ddoffsetlow)); - W_REG(&di->d64rxregs->addrhigh, - (PHYSADDRHI(pa) + di->ddoffsethigh)); - } - } else { - /* DMA64 32bits address extension */ - u32 ae; - - /* shift the high bit(s) from pa to ae */ - ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> - PCI32ADDR_HIGH_SHIFT; - PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH; - - if (direction == DMA_TX) { - W_REG(&di->d64txregs->addrlow, - (PHYSADDRLO(pa) + di->ddoffsetlow)); - W_REG(&di->d64txregs->addrhigh, - di->ddoffsethigh); - SET_REG(&di->d64txregs->control, - D64_XC_AE, (ae << D64_XC_AE_SHIFT)); - } else { - W_REG(&di->d64rxregs->addrlow, - (PHYSADDRLO(pa) + di->ddoffsetlow)); - W_REG(&di->d64rxregs->addrhigh, - di->ddoffsethigh); - SET_REG(&di->d64rxregs->control, - D64_RC_AE, (ae << D64_RC_AE_SHIFT)); - } - } -} - -static void _dma_fifoloopbackenable(dma_info_t *di) -{ - DMA_TRACE(("%s: dma_fifoloopbackenable\n", di->name)); - - OR_REG(&di->d64txregs->control, D64_XC_LE); -} - -static void _dma_rxinit(dma_info_t *di) -{ - DMA_TRACE(("%s: dma_rxinit\n", di->name)); - - if (di->nrxd == 0) - return; - - di->rxin = di->rxout = 0; - - /* clear rx descriptor ring */ - memset((void *)di->rxd64, '\0', - (di->nrxd * sizeof(dma64dd_t))); - - /* DMA engine with out alignment requirement requires table to be inited - * before enabling the engine - */ - if (!di->aligndesc_4k) - _dma_ddtable_init(di, DMA_RX, di->rxdpa); - - _dma_rxenable(di); - - if (di->aligndesc_4k) - _dma_ddtable_init(di, DMA_RX, di->rxdpa); -} - -static void _dma_rxenable(dma_info_t *di) -{ - uint dmactrlflags = di->hnddma.dmactrlflags; - u32 control; - - DMA_TRACE(("%s: dma_rxenable\n", di->name)); - - control = - (R_REG(&di->d64rxregs->control) & D64_RC_AE) | - D64_RC_RE; - - if ((dmactrlflags & DMA_CTRL_PEN) == 0) - control |= D64_RC_PD; - - if (dmactrlflags & DMA_CTRL_ROC) - control |= D64_RC_OC; - - W_REG(&di->d64rxregs->control, - ((di->rxoffset << D64_RC_RO_SHIFT) | control)); -} - -static void -_dma_rx_param_get(dma_info_t *di, u16 *rxoffset, u16 *rxbufsize) -{ - /* the normal values fit into 16 bits */ - *rxoffset = (u16) di->rxoffset; - *rxbufsize = (u16) di->rxbufsize; -} - -/* !! rx entry routine - * returns a pointer to the next frame received, or NULL if there are no more - * if DMA_CTRL_RXMULTI is defined, DMA scattering(multiple buffers) is supported - * with pkts chain - * otherwise, it's treated as giant pkt and will be tossed. - * The DMA scattering starts with normal DMA header, followed by first buffer data. - * After it reaches the max size of buffer, the data continues in next DMA descriptor - * buffer WITHOUT DMA header - */ -static void *_dma_rx(dma_info_t *di) -{ - struct sk_buff *p, *head, *tail; - uint len; - uint pkt_len; - int resid = 0; - - next_frame: - head = _dma_getnextrxp(di, false); - if (head == NULL) - return NULL; - - len = le16_to_cpu(*(u16 *) (head->data)); - DMA_TRACE(("%s: dma_rx len %d\n", di->name, len)); - dma_spin_for_len(len, head); - - /* set actual length */ - pkt_len = min((di->rxoffset + len), di->rxbufsize); - __skb_trim(head, pkt_len); - resid = len - (di->rxbufsize - di->rxoffset); - - /* check for single or multi-buffer rx */ - if (resid > 0) { - tail = head; - while ((resid > 0) && (p = _dma_getnextrxp(di, false))) { - tail->next = p; - pkt_len = min(resid, (int)di->rxbufsize); - __skb_trim(p, pkt_len); - - tail = p; - resid -= di->rxbufsize; - } - -#ifdef BCMDBG - if (resid > 0) { - uint cur; - cur = - B2I(((R_REG(&di->d64rxregs->status0) & - D64_RS0_CD_MASK) - - di->rcvptrbase) & D64_RS0_CD_MASK, - dma64dd_t); - DMA_ERROR(("_dma_rx, rxin %d rxout %d, hw_curr %d\n", - di->rxin, di->rxout, cur)); - } -#endif /* BCMDBG */ - - if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { - DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n", - di->name, len)); - bcm_pkt_buf_free_skb(head); - di->hnddma.rxgiants++; - goto next_frame; - } - } - - return head; -} - -/* post receive buffers - * return false is refill failed completely and ring is empty - * this will stall the rx dma and user might want to call rxfill again asap - * This unlikely happens on memory-rich NIC, but often on memory-constrained dongle - */ -static bool _dma_rxfill(dma_info_t *di) -{ - struct sk_buff *p; - u16 rxin, rxout; - u32 flags = 0; - uint n; - uint i; - dmaaddr_t pa; - uint extra_offset = 0; - bool ring_empty; - - ring_empty = false; - - /* - * Determine how many receive buffers we're lacking - * from the full complement, allocate, initialize, - * and post them, then update the chip rx lastdscr. - */ - - rxin = di->rxin; - rxout = di->rxout; - - n = di->nrxpost - NRXDACTIVE(rxin, rxout); - - DMA_TRACE(("%s: dma_rxfill: post %d\n", di->name, n)); - - if (di->rxbufsize > BCMEXTRAHDROOM) - extra_offset = di->rxextrahdrroom; - - for (i = 0; i < n; i++) { - /* the di->rxbufsize doesn't include the extra headroom, we need to add it to the - size to be allocated - */ - - p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset); - - if (p == NULL) { - DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n", - di->name)); - if (i == 0 && dma64_rxidle(di)) { - DMA_ERROR(("%s: rxfill64: ring is empty !\n", - di->name)); - ring_empty = true; - } - di->hnddma.rxnobuf++; - break; - } - /* reserve an extra headroom, if applicable */ - if (extra_offset) - skb_pull(p, extra_offset); - - /* Do a cached write instead of uncached write since DMA_MAP - * will flush the cache. - */ - *(u32 *) (p->data) = 0; - - if (DMASGLIST_ENAB) - memset(&di->rxp_dmah[rxout], 0, - sizeof(hnddma_seg_map_t)); - - pa = pci_map_single(di->pbus, p->data, - di->rxbufsize, PCI_DMA_FROMDEVICE); - - /* save the free packet pointer */ - di->rxp[rxout] = p; - - /* reset flags for each descriptor */ - flags = 0; - if (rxout == (di->nrxd - 1)) - flags = D64_CTRL1_EOT; - - dma64_dd_upd(di, di->rxd64, pa, rxout, &flags, - di->rxbufsize); - rxout = NEXTRXD(rxout); - } - - di->rxout = rxout; - - /* update the chip lastdscr pointer */ - W_REG(&di->d64rxregs->ptr, - di->rcvptrbase + I2B(rxout, dma64dd_t)); - - return ring_empty; -} - -/* like getnexttxp but no reclaim */ -static void *_dma_peeknexttxp(dma_info_t *di) -{ - uint end, i; - - if (di->ntxd == 0) - return NULL; - - end = - B2I(((R_REG(&di->d64txregs->status0) & - D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, - dma64dd_t); - - for (i = di->txin; i != end; i = NEXTTXD(i)) - if (di->txp[i]) - return di->txp[i]; - - return NULL; -} - -/* like getnextrxp but not take off the ring */ -static void *_dma_peeknextrxp(dma_info_t *di) -{ - uint end, i; - - if (di->nrxd == 0) - return NULL; - - end = - B2I(((R_REG(&di->d64rxregs->status0) & - D64_RS0_CD_MASK) - di->rcvptrbase) & D64_RS0_CD_MASK, - dma64dd_t); - - for (i = di->rxin; i != end; i = NEXTRXD(i)) - if (di->rxp[i]) - return di->rxp[i]; - - return NULL; -} - -static void _dma_rxreclaim(dma_info_t *di) -{ - void *p; - - DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); - - while ((p = _dma_getnextrxp(di, true))) - bcm_pkt_buf_free_skb(p); -} - -static void *_dma_getnextrxp(dma_info_t *di, bool forceall) -{ - if (di->nrxd == 0) - return NULL; - - return dma64_getnextrxp(di, forceall); -} - -static void _dma_txblock(dma_info_t *di) -{ - di->hnddma.txavail = 0; -} - -static void _dma_txunblock(dma_info_t *di) -{ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; -} - -static uint _dma_txactive(dma_info_t *di) -{ - return NTXDACTIVE(di->txin, di->txout); -} - -static uint _dma_txpending(dma_info_t *di) -{ - uint curr; - - curr = - B2I(((R_REG(&di->d64txregs->status0) & - D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, - dma64dd_t); - - return NTXDACTIVE(curr, di->txout); -} - -static uint _dma_txcommitted(dma_info_t *di) -{ - uint ptr; - uint txin = di->txin; - - if (txin == di->txout) - return 0; - - ptr = B2I(R_REG(&di->d64txregs->ptr), dma64dd_t); - - return NTXDACTIVE(di->txin, ptr); -} - -static uint _dma_rxactive(dma_info_t *di) -{ - return NRXDACTIVE(di->rxin, di->rxout); -} - -static void _dma_counterreset(dma_info_t *di) -{ - /* reset all software counter */ - di->hnddma.rxgiants = 0; - di->hnddma.rxnobuf = 0; - di->hnddma.txnobuf = 0; -} - -static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) -{ - uint dmactrlflags = di->hnddma.dmactrlflags; - - if (di == NULL) { - DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name)); - return 0; - } - - dmactrlflags &= ~mask; - dmactrlflags |= flags; - - /* If trying to enable parity, check if parity is actually supported */ - if (dmactrlflags & DMA_CTRL_PEN) { - u32 control; - - control = R_REG(&di->d64txregs->control); - W_REG(&di->d64txregs->control, - control | D64_XC_PD); - if (R_REG(&di->d64txregs->control) & D64_XC_PD) { - /* We *can* disable it so it is supported, - * restore control register - */ - W_REG(&di->d64txregs->control, - control); - } else { - /* Not supported, don't allow it to be enabled */ - dmactrlflags &= ~DMA_CTRL_PEN; - } - } - - di->hnddma.dmactrlflags = dmactrlflags; - - return dmactrlflags; -} - -/* get the address of the var in order to change later */ -static unsigned long _dma_getvar(dma_info_t *di, const char *name) -{ - if (!strcmp(name, "&txavail")) - return (unsigned long)&(di->hnddma.txavail); - return 0; -} - -static -u8 dma_align_sizetobits(uint size) -{ - u8 bitpos = 0; - while (size >>= 1) { - bitpos++; - } - return bitpos; -} - -/* This function ensures that the DMA descriptor ring will not get allocated - * across Page boundary. If the allocation is done across the page boundary - * at the first time, then it is freed and the allocation is done at - * descriptor ring size aligned location. This will ensure that the ring will - * not cross page boundary - */ -static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, - u16 *alignbits, uint *alloced, - dmaaddr_t *descpa) -{ - void *va; - u32 desc_strtaddr; - u32 alignbytes = 1 << *alignbits; - - va = dma_alloc_consistent(di->pbus, size, *alignbits, alloced, descpa); - - if (NULL == va) - return NULL; - - desc_strtaddr = (u32) roundup((unsigned long)va, alignbytes); - if (((desc_strtaddr + size - 1) & boundary) != (desc_strtaddr - & boundary)) { - *alignbits = dma_align_sizetobits(size); - pci_free_consistent(di->pbus, size, va, *descpa); - va = dma_alloc_consistent(di->pbus, size, *alignbits, - alloced, descpa); - } - return va; -} - -/* 64-bit DMA functions */ - -static void dma64_txinit(dma_info_t *di) -{ - u32 control = D64_XC_XE; - - DMA_TRACE(("%s: dma_txinit\n", di->name)); - - if (di->ntxd == 0) - return; - - di->txin = di->txout = 0; - di->hnddma.txavail = di->ntxd - 1; - - /* clear tx descriptor ring */ - memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t))); - - /* DMA engine with out alignment requirement requires table to be inited - * before enabling the engine - */ - if (!di->aligndesc_4k) - _dma_ddtable_init(di, DMA_TX, di->txdpa); - - if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0) - control |= D64_XC_PD; - OR_REG(&di->d64txregs->control, control); - - /* DMA engine with alignment requirement requires table to be inited - * before enabling the engine - */ - if (di->aligndesc_4k) - _dma_ddtable_init(di, DMA_TX, di->txdpa); -} - -static bool dma64_txenabled(dma_info_t *di) -{ - u32 xc; - - /* If the chip is dead, it is not enabled :-) */ - xc = R_REG(&di->d64txregs->control); - return (xc != 0xffffffff) && (xc & D64_XC_XE); -} - -static void dma64_txsuspend(dma_info_t *di) -{ - DMA_TRACE(("%s: dma_txsuspend\n", di->name)); - - if (di->ntxd == 0) - return; - - OR_REG(&di->d64txregs->control, D64_XC_SE); -} - -static void dma64_txresume(dma_info_t *di) -{ - DMA_TRACE(("%s: dma_txresume\n", di->name)); - - if (di->ntxd == 0) - return; - - AND_REG(&di->d64txregs->control, ~D64_XC_SE); -} - -static bool dma64_txsuspended(dma_info_t *di) -{ - return (di->ntxd == 0) || - ((R_REG(&di->d64txregs->control) & D64_XC_SE) == - D64_XC_SE); -} - -static void dma64_txreclaim(dma_info_t *di, txd_range_t range) -{ - void *p; - - DMA_TRACE(("%s: dma_txreclaim %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : - ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : - "transferred"))); - - if (di->txin == di->txout) - return; - - while ((p = dma64_getnexttxp(di, range))) { - /* For unframed data, we don't have any packets to free */ - if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) - bcm_pkt_buf_free_skb(p); - } -} - -static bool dma64_txstopped(dma_info_t *di) -{ - return ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) == - D64_XS0_XS_STOPPED); -} - -static bool dma64_rxstopped(dma_info_t *di) -{ - return ((R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK) == - D64_RS0_RS_STOPPED); -} - -static bool dma64_alloc(dma_info_t *di, uint direction) -{ - u16 size; - uint ddlen; - void *va; - uint alloced = 0; - u16 align; - u16 align_bits; - - ddlen = sizeof(dma64dd_t); - - size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen); - align_bits = di->dmadesc_align; - align = (1 << align_bits); - - if (direction == DMA_TX) { - va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits, - &alloced, &di->txdpaorig); - if (va == NULL) { - DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(ntxd) failed\n", di->name)); - return false; - } - align = (1 << align_bits); - di->txd64 = (dma64dd_t *) roundup((unsigned long)va, align); - di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va); - PHYSADDRLOSET(di->txdpa, - PHYSADDRLO(di->txdpaorig) + di->txdalign); - PHYSADDRHISET(di->txdpa, PHYSADDRHI(di->txdpaorig)); - di->txdalloc = alloced; - } else { - va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits, - &alloced, &di->rxdpaorig); - if (va == NULL) { - DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(nrxd) failed\n", di->name)); - return false; - } - align = (1 << align_bits); - di->rxd64 = (dma64dd_t *) roundup((unsigned long)va, align); - di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va); - PHYSADDRLOSET(di->rxdpa, - PHYSADDRLO(di->rxdpaorig) + di->rxdalign); - PHYSADDRHISET(di->rxdpa, PHYSADDRHI(di->rxdpaorig)); - di->rxdalloc = alloced; - } - - return true; -} - -static bool dma64_txreset(dma_info_t *di) -{ - u32 status; - - if (di->ntxd == 0) - return true; - - /* suspend tx DMA first */ - W_REG(&di->d64txregs->control, D64_XC_SE); - SPINWAIT(((status = - (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK)) - != D64_XS0_XS_DISABLED) && (status != D64_XS0_XS_IDLE) - && (status != D64_XS0_XS_STOPPED), 10000); - - W_REG(&di->d64txregs->control, 0); - SPINWAIT(((status = - (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK)) - != D64_XS0_XS_DISABLED), 10000); - - /* wait for the last transaction to complete */ - udelay(300); - - return status == D64_XS0_XS_DISABLED; -} - -static bool dma64_rxidle(dma_info_t *di) -{ - DMA_TRACE(("%s: dma_rxidle\n", di->name)); - - if (di->nrxd == 0) - return true; - - return ((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) == - (R_REG(&di->d64rxregs->ptr) & D64_RS0_CD_MASK)); -} - -static bool dma64_rxreset(dma_info_t *di) -{ - u32 status; - - if (di->nrxd == 0) - return true; - - W_REG(&di->d64rxregs->control, 0); - SPINWAIT(((status = - (R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK)) - != D64_RS0_RS_DISABLED), 10000); - - return status == D64_RS0_RS_DISABLED; -} - -static bool dma64_rxenabled(dma_info_t *di) -{ - u32 rc; - - rc = R_REG(&di->d64rxregs->control); - return (rc != 0xffffffff) && (rc & D64_RC_RE); -} - -static bool dma64_txsuspendedidle(dma_info_t *di) -{ - - if (di->ntxd == 0) - return true; - - if (!(R_REG(&di->d64txregs->control) & D64_XC_SE)) - return 0; - - if ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) == - D64_XS0_XS_IDLE) - return 1; - - return 0; -} - -/* Useful when sending unframed data. This allows us to get a progress report from the DMA. - * We return a pointer to the beginning of the DATA buffer of the current descriptor. - * If DMA is idle, we return NULL. - */ -static void *dma64_getpos(dma_info_t *di, bool direction) -{ - void *va; - bool idle; - u32 cd_offset; - - if (direction == DMA_TX) { - cd_offset = - R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK; - idle = !NTXDACTIVE(di->txin, di->txout); - va = di->txp[B2I(cd_offset, dma64dd_t)]; - } else { - cd_offset = - R_REG(&di->d64rxregs->status0) & D64_XS0_CD_MASK; - idle = !NRXDACTIVE(di->rxin, di->rxout); - va = di->rxp[B2I(cd_offset, dma64dd_t)]; - } - - /* If DMA is IDLE, return NULL */ - if (idle) { - DMA_TRACE(("%s: DMA idle, return NULL\n", __func__)); - va = NULL; - } - - return va; -} - -/* TX of unframed data - * - * Adds a DMA ring descriptor for the data pointed to by "buf". - * This is for DMA of a buffer of data and is unlike other hnddma TX functions - * that take a pointer to a "packet" - * Each call to this is results in a single descriptor being added for "len" bytes of - * data starting at "buf", it doesn't handle chained buffers. - */ -static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) -{ - u16 txout; - u32 flags = 0; - dmaaddr_t pa; /* phys addr */ - - txout = di->txout; - - /* return nonzero if out of tx descriptors */ - if (NEXTTXD(txout) == di->txin) - goto outoftxd; - - if (len == 0) - return 0; - - pa = pci_map_single(di->pbus, buf, len, PCI_DMA_TODEVICE); - - flags = (D64_CTRL1_SOF | D64_CTRL1_IOC | D64_CTRL1_EOF); - - if (txout == (di->ntxd - 1)) - flags |= D64_CTRL1_EOT; - - dma64_dd_upd(di, di->txd64, pa, txout, &flags, len); - - /* save the buffer pointer - used by dma_getpos */ - di->txp[txout] = buf; - - txout = NEXTTXD(txout); - /* bump the tx descriptor index */ - di->txout = txout; - - /* kick the chip */ - if (commit) { - W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(txout, dma64dd_t)); - } - - /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; - - return 0; - - outoftxd: - DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__)); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; - return -1; -} - -/* !! tx entry routine - * WARNING: call must check the return value for error. - * the error(toss frames) could be fatal and cause many subsequent hard to debug problems - */ -static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, - bool commit) -{ - struct sk_buff *p, *next; - unsigned char *data; - uint len; - u16 txout; - u32 flags = 0; - dmaaddr_t pa; - - DMA_TRACE(("%s: dma_txfast\n", di->name)); - - txout = di->txout; - - /* - * Walk the chain of packet buffers - * allocating and initializing transmit descriptor entries. - */ - for (p = p0; p; p = next) { - uint nsegs, j; - hnddma_seg_map_t *map; - - data = p->data; - len = p->len; - next = p->next; - - /* return nonzero if out of tx descriptors */ - if (NEXTTXD(txout) == di->txin) - goto outoftxd; - - if (len == 0) - continue; - - /* get physical address of buffer start */ - if (DMASGLIST_ENAB) - memset(&di->txp_dmah[txout], 0, - sizeof(hnddma_seg_map_t)); - - pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE); - - if (DMASGLIST_ENAB) { - map = &di->txp_dmah[txout]; - - /* See if all the segments can be accounted for */ - if (map->nsegs > - (uint) (di->ntxd - NTXDACTIVE(di->txin, di->txout) - - 1)) - goto outoftxd; - - nsegs = map->nsegs; - } else - nsegs = 1; - - for (j = 1; j <= nsegs; j++) { - flags = 0; - if (p == p0 && j == 1) - flags |= D64_CTRL1_SOF; - - /* With a DMA segment list, Descriptor table is filled - * using the segment list instead of looping over - * buffers in multi-chain DMA. Therefore, EOF for SGLIST is when - * end of segment list is reached. - */ - if ((!DMASGLIST_ENAB && next == NULL) || - (DMASGLIST_ENAB && j == nsegs)) - flags |= (D64_CTRL1_IOC | D64_CTRL1_EOF); - if (txout == (di->ntxd - 1)) - flags |= D64_CTRL1_EOT; - - if (DMASGLIST_ENAB) { - len = map->segs[j - 1].length; - pa = map->segs[j - 1].addr; - } - dma64_dd_upd(di, di->txd64, pa, txout, &flags, len); - - txout = NEXTTXD(txout); - } - - /* See above. No need to loop over individual buffers */ - if (DMASGLIST_ENAB) - break; - } - - /* if last txd eof not set, fix it */ - if (!(flags & D64_CTRL1_EOF)) - W_SM(&di->txd64[PREVTXD(txout)].ctrl1, - BUS_SWAP32(flags | D64_CTRL1_IOC | D64_CTRL1_EOF)); - - /* save the packet */ - di->txp[PREVTXD(txout)] = p0; - - /* bump the tx descriptor index */ - di->txout = txout; - - /* kick the chip */ - if (commit) - W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(txout, dma64dd_t)); - - /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; - - return 0; - - outoftxd: - DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); - bcm_pkt_buf_free_skb(p0); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; - return -1; -} - -/* - * Reclaim next completed txd (txds if using chained buffers) in the range - * specified and return associated packet. - * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be - * transmitted as noted by the hardware "CurrDescr" pointer. - * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be - * transferred by the DMA as noted by the hardware "ActiveDescr" pointer. - * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and - * return associated packet regardless of the value of hardware pointers. - */ -static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) -{ - u16 start, end, i; - u16 active_desc; - void *txp; - - DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : - ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : - "transferred"))); - - if (di->ntxd == 0) - return NULL; - - txp = NULL; - - start = di->txin; - if (range == HNDDMA_RANGE_ALL) - end = di->txout; - else { - dma64regs_t *dregs = di->d64txregs; - - end = - (u16) (B2I - (((R_REG(&dregs->status0) & - D64_XS0_CD_MASK) - - di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t)); - - if (range == HNDDMA_RANGE_TRANSFERED) { - active_desc = - (u16) (R_REG(&dregs->status1) & - D64_XS1_AD_MASK); - active_desc = - (active_desc - di->xmtptrbase) & D64_XS0_CD_MASK; - active_desc = B2I(active_desc, dma64dd_t); - if (end != active_desc) - end = PREVTXD(active_desc); - } - } - - if ((start == 0) && (end > di->txout)) - goto bogus; - - for (i = start; i != end && !txp; i = NEXTTXD(i)) { - dmaaddr_t pa; - hnddma_seg_map_t *map = NULL; - uint size, j, nsegs; - - PHYSADDRLOSET(pa, - (BUS_SWAP32(R_SM(&di->txd64[i].addrlow)) - - di->dataoffsetlow)); - PHYSADDRHISET(pa, - (BUS_SWAP32(R_SM(&di->txd64[i].addrhigh)) - - di->dataoffsethigh)); - - if (DMASGLIST_ENAB) { - map = &di->txp_dmah[i]; - size = map->origsize; - nsegs = map->nsegs; - } else { - size = - (BUS_SWAP32(R_SM(&di->txd64[i].ctrl2)) & - D64_CTRL2_BC_MASK); - nsegs = 1; - } - - for (j = nsegs; j > 0; j--) { - W_SM(&di->txd64[i].addrlow, 0xdeadbeef); - W_SM(&di->txd64[i].addrhigh, 0xdeadbeef); - - txp = di->txp[i]; - di->txp[i] = NULL; - if (j > 1) - i = NEXTTXD(i); - } - - pci_unmap_single(di->pbus, pa, size, PCI_DMA_TODEVICE); - } - - di->txin = i; - - /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; - - return txp; - - bogus: - DMA_NONE(("dma_getnexttxp: bogus curr: start %d end %d txout %d force %d\n", start, end, di->txout, forceall)); - return NULL; -} - -static void *dma64_getnextrxp(dma_info_t *di, bool forceall) -{ - uint i, curr; - void *rxp; - dmaaddr_t pa; - - i = di->rxin; - - /* return if no packets posted */ - if (i == di->rxout) - return NULL; - - curr = - B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) - - di->rcvptrbase) & D64_RS0_CD_MASK, dma64dd_t); - - /* ignore curr if forceall */ - if (!forceall && (i == curr)) - return NULL; - - /* get the packet pointer that corresponds to the rx descriptor */ - rxp = di->rxp[i]; - di->rxp[i] = NULL; - - PHYSADDRLOSET(pa, - (BUS_SWAP32(R_SM(&di->rxd64[i].addrlow)) - - di->dataoffsetlow)); - PHYSADDRHISET(pa, - (BUS_SWAP32(R_SM(&di->rxd64[i].addrhigh)) - - di->dataoffsethigh)); - - /* clear this packet from the descriptor ring */ - pci_unmap_single(di->pbus, pa, di->rxbufsize, PCI_DMA_FROMDEVICE); - - W_SM(&di->rxd64[i].addrlow, 0xdeadbeef); - W_SM(&di->rxd64[i].addrhigh, 0xdeadbeef); - - di->rxin = NEXTRXD(i); - - return rxp; -} - -static bool _dma64_addrext(dma64regs_t *dma64regs) -{ - u32 w; - OR_REG(&dma64regs->control, D64_XC_AE); - w = R_REG(&dma64regs->control); - AND_REG(&dma64regs->control, ~D64_XC_AE); - return (w & D64_XC_AE) == D64_XC_AE; -} - -/* - * Rotate all active tx dma ring entries "forward" by (ActiveDescriptor - txin). - */ -static void dma64_txrotate(dma_info_t *di) -{ - u16 ad; - uint nactive; - uint rot; - u16 old, new; - u32 w; - u16 first, last; - - nactive = _dma_txactive(di); - ad = (u16) (B2I - ((((R_REG(&di->d64txregs->status1) & - D64_XS1_AD_MASK) - - di->xmtptrbase) & D64_XS1_AD_MASK), dma64dd_t)); - rot = TXD(ad - di->txin); - - /* full-ring case is a lot harder - don't worry about this */ - if (rot >= (di->ntxd - nactive)) { - DMA_ERROR(("%s: dma_txrotate: ring full - punt\n", di->name)); - return; - } - - first = di->txin; - last = PREVTXD(di->txout); - - /* move entries starting at last and moving backwards to first */ - for (old = last; old != PREVTXD(first); old = PREVTXD(old)) { - new = TXD(old + rot); - - /* - * Move the tx dma descriptor. - * EOT is set only in the last entry in the ring. - */ - w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl1)) & ~D64_CTRL1_EOT; - if (new == (di->ntxd - 1)) - w |= D64_CTRL1_EOT; - W_SM(&di->txd64[new].ctrl1, BUS_SWAP32(w)); - - w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl2)); - W_SM(&di->txd64[new].ctrl2, BUS_SWAP32(w)); - - W_SM(&di->txd64[new].addrlow, R_SM(&di->txd64[old].addrlow)); - W_SM(&di->txd64[new].addrhigh, R_SM(&di->txd64[old].addrhigh)); - - /* zap the old tx dma descriptor address field */ - W_SM(&di->txd64[old].addrlow, BUS_SWAP32(0xdeadbeef)); - W_SM(&di->txd64[old].addrhigh, BUS_SWAP32(0xdeadbeef)); - - /* move the corresponding txp[] entry */ - di->txp[new] = di->txp[old]; - - /* Move the map */ - if (DMASGLIST_ENAB) { - memcpy(&di->txp_dmah[new], &di->txp_dmah[old], - sizeof(hnddma_seg_map_t)); - memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t)); - } - - di->txp[old] = NULL; - } - - /* update txin and txout */ - di->txin = ad; - di->txout = TXD(di->txout + rot); - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; - - /* kick the chip */ - W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(di->txout, dma64dd_t)); -} - -uint dma_addrwidth(si_t *sih, void *dmaregs) -{ - /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */ - /* DMA engine is 64-bit capable */ - if ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) { - /* backplane are 64-bit capable */ - if (ai_backplane64(sih)) - /* If bus is System Backplane or PCIE then we can access 64-bits */ - if ((sih->bustype == SI_BUS) || - ((sih->bustype == PCI_BUS) && - (sih->buscoretype == PCIE_CORE_ID))) - return DMADDRWIDTH_64; - } - /* DMA hardware not supported by this driver*/ - return DMADDRWIDTH_64; -} - -/* - * Mac80211 initiated actions sometimes require packets in the DMA queue to be - * modified. The modified portion of the packet is not under control of the DMA - * engine. This function calls a caller-supplied function for each packet in - * the caller specified dma chain. - */ -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) - (void *pkt, void *arg_a), void *arg_a) -{ - dma_info_t *di = (dma_info_t *) dmah; - uint i = di->txin; - uint end = di->txout; - struct sk_buff *skb; - struct ieee80211_tx_info *tx_info; - - while (i != end) { - skb = (struct sk_buff *)di->txp[i]; - if (skb != NULL) { - tx_info = (struct ieee80211_tx_info *)skb->cb; - (callback_fnc)(tx_info, arg_a); - } - i = NEXTTXD(i); - } -} diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 18b844a..51d56b6 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c index 085ec0b..65fee2f 100644 --- a/drivers/staging/brcm80211/brcmsmac/nvram.c +++ b/drivers/staging/brcm80211/brcmsmac/nvram.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #define NVR_MSG(x) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index 07a5bcb..22ba415 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c index b8864c5..b5ec9ae 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include "wlc_phy_radio.h" #include "wlc_phy_int.h" diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c index 7127509..123bd6a 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c index 81c59b0..e9d8661 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c @@ -15,7 +15,7 @@ */ #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c index 742df99..e4a15c4 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c @@ -16,7 +16,7 @@ #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 590d65b..f58272a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -32,7 +32,7 @@ #include #include #include -#include +#include #include "phy/wlc_phy_int.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 3b04e02..8a4875d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include "d11.h" #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index c83896b..53ca0ff 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -19,8 +19,8 @@ #include #include #include -#include -#include +#include +#include #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index efdc62a..d26a520 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "d11.h" #include "wlc_rate.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index f98f0fd..492fb3e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -33,8 +33,8 @@ #include #include #include -#include -#include +#include +#include #include "wlc_types.h" #include "wlc_pmu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index 9e29339..0b980ac 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 54b5b79..c63920c 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -27,8 +27,8 @@ #include #include #include -#include -#include +#include +#include #include "wlc_pmu.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index c33b61b..3a80706 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -33,8 +33,8 @@ #include #include #include -#include -#include +#include +#include #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index 6c9574a..4b84cc1 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index ca1b8aa..cd051d9 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/include/bcmsoc.h b/drivers/staging/brcm80211/include/bcmsoc.h new file mode 100644 index 0000000..6435686 --- /dev/null +++ b/drivers/staging/brcm80211/include/bcmsoc.h @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _HNDSOC_H +#define _HNDSOC_H + +/* Include the soci specific files */ +#include +#include + +/* + * SOC Interconnect Address Map. + * All regions may not exist on all chips. + */ +#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ +#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ +#define SI_PCI_MEM_SZ (64 * 1024 * 1024) +#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ +#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ +#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ + +#ifdef SI_ENUM_BASE_VARIABLE +#define SI_ENUM_BASE (sii->pub.si_enum_base) +#else +#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ +#endif /* SI_ENUM_BASE_VARIABLE */ + +#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ +#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ +#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software + * convenience and could be changed if we + * make any larger chips + */ + +#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ +#define SI_FASTRAM_SWAPPED 0x19800000 + +#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ +#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ +#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ +#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ +#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ +#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ +#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ +#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ +#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ +#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ + +#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ +#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), low 32 bits + */ +#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), high 32 bits + */ + +/* core codes */ +#define NODEV_CORE_ID 0x700 /* Invalid coreid */ +#define CC_CORE_ID 0x800 /* chipcommon core */ +#define ILINE20_CORE_ID 0x801 /* iline20 core */ +#define SRAM_CORE_ID 0x802 /* sram core */ +#define SDRAM_CORE_ID 0x803 /* sdram core */ +#define PCI_CORE_ID 0x804 /* pci core */ +#define MIPS_CORE_ID 0x805 /* mips core */ +#define ENET_CORE_ID 0x806 /* enet mac core */ +#define CODEC_CORE_ID 0x807 /* v90 codec core */ +#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ +#define ADSL_CORE_ID 0x809 /* ADSL core */ +#define ILINE100_CORE_ID 0x80a /* iline100 core */ +#define IPSEC_CORE_ID 0x80b /* ipsec core */ +#define UTOPIA_CORE_ID 0x80c /* utopia core */ +#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ +#define SOCRAM_CORE_ID 0x80e /* internal memory core */ +#define MEMC_CORE_ID 0x80f /* memc sdram core */ +#define OFDM_CORE_ID 0x810 /* OFDM phy core */ +#define EXTIF_CORE_ID 0x811 /* external interface core */ +#define D11_CORE_ID 0x812 /* 802.11 MAC core */ +#define APHY_CORE_ID 0x813 /* 802.11a phy core */ +#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ +#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ +#define MIPS33_CORE_ID 0x816 /* mips3302 core */ +#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ +#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ +#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ +#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ +#define SDIOH_CORE_ID 0x81b /* sdio host core */ +#define ROBO_CORE_ID 0x81c /* roboswitch core */ +#define ATA100_CORE_ID 0x81d /* parallel ATA core */ +#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ +#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ +#define PCIE_CORE_ID 0x820 /* pci express core */ +#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ +#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ +#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ +#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ +#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ +#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ +#define PMU_CORE_ID 0x827 /* PMU core */ +#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ +#define SDIOD_CORE_ID 0x829 /* SDIO device core */ +#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ +#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ +#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ +#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ +#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ +#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ +#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ +#define SC_CORE_ID 0x831 /* shared common core */ +#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ +#define SPIH_CORE_ID 0x833 /* SPI host core */ +#define I2S_CORE_ID 0x834 /* I2S core */ +#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ +#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ +#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ +#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all + * unused address ranges + */ + +/* There are TWO constants on all HND chips: SI_ENUM_BASE above, + * and chipcommon being the first core: + */ +#define SI_CC_IDX 0 + +/* SOC Interconnect types (aka chip types) */ +#define SOCI_AI 1 + +/* Common core control flags */ +#define SICF_BIST_EN 0x8000 +#define SICF_PME_EN 0x4000 +#define SICF_CORE_BITS 0x3ffc +#define SICF_FGC 0x0002 +#define SICF_CLOCK_EN 0x0001 + +/* Common core status flags */ +#define SISF_BIST_DONE 0x8000 +#define SISF_BIST_ERROR 0x4000 +#define SISF_GATED_CLK 0x2000 +#define SISF_DMA64 0x1000 +#define SISF_CORE_BITS 0x0fff + +/* A register that is common to all cores to + * communicate w/PMU regarding clock control. + */ +#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ + +/* clk_ctl_st register */ +#define CCS_FORCEALP 0x00000001 /* force ALP request */ +#define CCS_FORCEHT 0x00000002 /* force HT request */ +#define CCS_FORCEILP 0x00000004 /* force ILP request */ +#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ +#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ +#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ +#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ +#define CCS_ERSRC_REQ_SHIFT 8 +#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ +#define CCS_HTAVAIL 0x00020000 /* HT is available */ +#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ +#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ +#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ +#define CCS_ERSRC_STS_SHIFT 24 + +#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ +#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ + +/* Not really related to SOC Interconnect, but a couple of software + * conventions for the use the flash space: + */ + +/* Minimum amount of flash we support */ +#define FLASH_MIN 0x00020000 /* Minimum flash size */ + +/* A boot/binary may have an embedded block that describes its size */ +#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ +#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ +#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ +#define BISZ_TXTST_IDX 1 /* 1: text start */ +#define BISZ_TXTEND_IDX 2 /* 2: text end */ +#define BISZ_DATAST_IDX 3 /* 3: data start */ +#define BISZ_DATAEND_IDX 4 /* 4: data end */ +#define BISZ_BSSST_IDX 5 /* 5: bss start */ +#define BISZ_BSSEND_IDX 6 /* 6: bss end */ +#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ + +#endif /* _HNDSOC_H */ diff --git a/drivers/staging/brcm80211/include/hnddma.h b/drivers/staging/brcm80211/include/hnddma.h deleted file mode 100644 index fbbcb9b..0000000 --- a/drivers/staging/brcm80211/include/hnddma.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _hnddma_h_ -#define _hnddma_h_ - -#ifndef _hnddma_pub_ -#define _hnddma_pub_ -struct hnddma_pub; -#endif /* _hnddma_pub_ */ - -/* map/unmap direction */ -#define DMA_TX 1 /* TX direction for DMA */ -#define DMA_RX 2 /* RX direction for DMA */ -#define BUS_SWAP32(v) (v) - -/* range param for dma_getnexttxp() and dma_txreclaim */ -typedef enum txd_range { - HNDDMA_RANGE_ALL = 1, - HNDDMA_RANGE_TRANSMITTED, - HNDDMA_RANGE_TRANSFERED -} txd_range_t; - -/* dma function type */ -typedef void (*di_detach_t) (struct hnddma_pub *dmah); -typedef bool(*di_txreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxidle_t) (struct hnddma_pub *dmah); -typedef void (*di_txinit_t) (struct hnddma_pub *dmah); -typedef bool(*di_txenabled_t) (struct hnddma_pub *dmah); -typedef void (*di_rxinit_t) (struct hnddma_pub *dmah); -typedef void (*di_txsuspend_t) (struct hnddma_pub *dmah); -typedef void (*di_txresume_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspended_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspendedidle_t) (struct hnddma_pub *dmah); -typedef int (*di_txfast_t) (struct hnddma_pub *dmah, struct sk_buff *p, - bool commit); -typedef int (*di_txunframed_t) (struct hnddma_pub *dmah, void *p, uint len, - bool commit); -typedef void *(*di_getpos_t) (struct hnddma_pub *di, bool direction); -typedef void (*di_fifoloopbackenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_txstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenabled_t) (struct hnddma_pub *dmah); -typedef void *(*di_rx_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxfill_t) (struct hnddma_pub *dmah); -typedef void (*di_txreclaim_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void (*di_rxreclaim_t) (struct hnddma_pub *dmah); -typedef unsigned long (*di_getvar_t) (struct hnddma_pub *dmah, - const char *name); -typedef void *(*di_getnexttxp_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void *(*di_getnextrxp_t) (struct hnddma_pub *dmah, bool forceall); -typedef void *(*di_peeknexttxp_t) (struct hnddma_pub *dmah); -typedef void *(*di_peeknextrxp_t) (struct hnddma_pub *dmah); -typedef void (*di_rxparam_get_t) (struct hnddma_pub *dmah, u16 *rxoffset, - u16 *rxbufsize); -typedef void (*di_txblock_t) (struct hnddma_pub *dmah); -typedef void (*di_txunblock_t) (struct hnddma_pub *dmah); -typedef uint(*di_txactive_t) (struct hnddma_pub *dmah); -typedef void (*di_txrotate_t) (struct hnddma_pub *dmah); -typedef void (*di_counterreset_t) (struct hnddma_pub *dmah); -typedef uint(*di_ctrlflags_t) (struct hnddma_pub *dmah, uint mask, uint flags); -typedef char *(*di_dump_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, - bool dumpring); -typedef char *(*di_dumptx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, - bool dumpring); -typedef char *(*di_dumprx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, - bool dumpring); -typedef uint(*di_rxactive_t) (struct hnddma_pub *dmah); -typedef uint(*di_txpending_t) (struct hnddma_pub *dmah); -typedef uint(*di_txcommitted_t) (struct hnddma_pub *dmah); - -/* dma opsvec */ -typedef struct di_fcn_s { - di_detach_t detach; - di_txinit_t txinit; - di_txreset_t txreset; - di_txenabled_t txenabled; - di_txsuspend_t txsuspend; - di_txresume_t txresume; - di_txsuspended_t txsuspended; - di_txsuspendedidle_t txsuspendedidle; - di_txfast_t txfast; - di_txunframed_t txunframed; - di_getpos_t getpos; - di_txstopped_t txstopped; - di_txreclaim_t txreclaim; - di_getnexttxp_t getnexttxp; - di_peeknexttxp_t peeknexttxp; - di_txblock_t txblock; - di_txunblock_t txunblock; - di_txactive_t txactive; - di_txrotate_t txrotate; - - di_rxinit_t rxinit; - di_rxreset_t rxreset; - di_rxidle_t rxidle; - di_rxstopped_t rxstopped; - di_rxenable_t rxenable; - di_rxenabled_t rxenabled; - di_rx_t rx; - di_rxfill_t rxfill; - di_rxreclaim_t rxreclaim; - di_getnextrxp_t getnextrxp; - di_peeknextrxp_t peeknextrxp; - di_rxparam_get_t rxparam_get; - - di_fifoloopbackenable_t fifoloopbackenable; - di_getvar_t d_getvar; - di_counterreset_t counterreset; - di_ctrlflags_t ctrlflags; - di_dump_t dump; - di_dumptx_t dumptx; - di_dumprx_t dumprx; - di_rxactive_t rxactive; - di_txpending_t txpending; - di_txcommitted_t txcommitted; - uint endnum; -} di_fcn_t; - -/* - * Exported data structure (read-only) - */ -/* export structure */ -struct hnddma_pub { - const di_fcn_t *di_fn; /* DMA function pointers */ - uint txavail; /* # free tx descriptors */ - uint dmactrlflags; /* dma control flags */ - - /* rx error counters */ - uint rxgiants; /* rx giant frames */ - uint rxnobuf; /* rx out of dma descriptors */ - /* tx error counters */ - uint txnobuf; /* tx out of dma descriptors */ -}; - -extern struct hnddma_pub *dma_attach(char *name, si_t *sih, - void *dmaregstx, void *dmaregsrx, uint ntxd, - uint nrxd, uint rxbufsize, int rxextheadroom, - uint nrxpost, uint rxoffset, uint *msg_level); - -extern const di_fcn_t dma64proc; - -#define dma_detach(di) (dma64proc.detach(di)) -#define dma_txreset(di) (dma64proc.txreset(di)) -#define dma_rxreset(di) (dma64proc.rxreset(di)) -#define dma_rxidle(di) (dma64proc.rxidle(di)) -#define dma_txinit(di) (dma64proc.txinit(di)) -#define dma_txenabled(di) (dma64proc.txenabled(di)) -#define dma_rxinit(di) (dma64proc.rxinit(di)) -#define dma_txsuspend(di) (dma64proc.txsuspend(di)) -#define dma_txresume(di) (dma64proc.txresume(di)) -#define dma_txsuspended(di) (dma64proc.txsuspended(di)) -#define dma_txsuspendedidle(di) (dma64proc.txsuspendedidle(di)) -#define dma_txfast(di, p, commit) (dma64proc.txfast(di, p, commit)) -#define dma_txunframed(di, p, l, commit)(dma64proc.txunframed(di, p, l, commit)) -#define dma_getpos(di, dir) (dma64proc.getpos(di, dir)) -#define dma_fifoloopbackenable(di) (dma64proc.fifoloopbackenable(di)) -#define dma_txstopped(di) (dma64proc.txstopped(di)) -#define dma_rxstopped(di) (dma64proc.rxstopped(di)) -#define dma_rxenable(di) (dma64proc.rxenable(di)) -#define dma_rxenabled(di) (dma64proc.rxenabled(di)) -#define dma_rx(di) (dma64proc.rx(di)) -#define dma_rxfill(di) (dma64proc.rxfill(di)) -#define dma_txreclaim(di, range) (dma64proc.txreclaim(di, range)) -#define dma_rxreclaim(di) (dma64proc.rxreclaim(di)) -#define dma_getvar(di, name) (dma64proc.d_getvar(di, name)) -#define dma_getnexttxp(di, range) (dma64proc.getnexttxp(di, range)) -#define dma_getnextrxp(di, forceall) (dma64proc.getnextrxp(di, forceall)) -#define dma_peeknexttxp(di) (dma64proc.peeknexttxp(di)) -#define dma_peeknextrxp(di) (dma64proc.peeknextrxp(di)) -#define dma_rxparam_get(di, off, bufs) (dma64proc.rxparam_get(di, off, bufs)) - -#define dma_txblock(di) (dma64proc.txblock(di)) -#define dma_txunblock(di) (dma64proc.txunblock(di)) -#define dma_txactive(di) (dma64proc.txactive(di)) -#define dma_rxactive(di) (dma64proc.rxactive(di)) -#define dma_txrotate(di) (dma64proc.txrotate(di)) -#define dma_counterreset(di) (dma64proc.counterreset(di)) -#define dma_ctrlflags(di, mask, flags) (dma64proc.ctrlflags((di), (mask), (flags))) -#define dma_txpending(di) (dma64proc.txpending(di)) -#define dma_txcommitted(di) (dma64proc.txcommitted(di)) - - -/* return addresswidth allowed - * This needs to be done after SB attach but before dma attach. - * SB attach provides ability to probe backplane and dma core capabilities - * This info is needed by DMA_ALLOC_CONSISTENT in dma attach - */ -extern uint dma_addrwidth(si_t *sih, void *dmaregs); -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) - (void *pkt, void *arg_a), void *arg_a); - -/* - * DMA(Bug) on some chips seems to declare that the packet is ready, but the - * packet length is not updated yet (by DMA) on the expected time. - * Workaround is to hold processor till DMA updates the length, and stay off - * the bus to allow DMA update the length in buffer - */ -static inline void dma_spin_for_len(uint len, struct sk_buff *head) -{ -#if defined(__mips__) - if (!len) { - while (!(len = *(u16 *) KSEG1ADDR(head->data))) - udelay(1); - - *(u16 *) (head->data) = cpu_to_le16((u16) len); - } -#endif /* defined(__mips__) */ -} - -#endif /* _hnddma_h_ */ diff --git a/drivers/staging/brcm80211/include/hndsoc.h b/drivers/staging/brcm80211/include/hndsoc.h deleted file mode 100644 index 6435686..0000000 --- a/drivers/staging/brcm80211/include/hndsoc.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _HNDSOC_H -#define _HNDSOC_H - -/* Include the soci specific files */ -#include -#include - -/* - * SOC Interconnect Address Map. - * All regions may not exist on all chips. - */ -#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI_MEM_SZ (64 * 1024 * 1024) -#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ - -#ifdef SI_ENUM_BASE_VARIABLE -#define SI_ENUM_BASE (sii->pub.si_enum_base) -#else -#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ -#endif /* SI_ENUM_BASE_VARIABLE */ - -#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ -#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software - * convenience and could be changed if we - * make any larger chips - */ - -#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ -#define SI_FASTRAM_SWAPPED 0x19800000 - -#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ -#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ -#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ -#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ -#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ -#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ -#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ -#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ -#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ -#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ - -#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ -#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), low 32 bits - */ -#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ - -/* core codes */ -#define NODEV_CORE_ID 0x700 /* Invalid coreid */ -#define CC_CORE_ID 0x800 /* chipcommon core */ -#define ILINE20_CORE_ID 0x801 /* iline20 core */ -#define SRAM_CORE_ID 0x802 /* sram core */ -#define SDRAM_CORE_ID 0x803 /* sdram core */ -#define PCI_CORE_ID 0x804 /* pci core */ -#define MIPS_CORE_ID 0x805 /* mips core */ -#define ENET_CORE_ID 0x806 /* enet mac core */ -#define CODEC_CORE_ID 0x807 /* v90 codec core */ -#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ -#define ADSL_CORE_ID 0x809 /* ADSL core */ -#define ILINE100_CORE_ID 0x80a /* iline100 core */ -#define IPSEC_CORE_ID 0x80b /* ipsec core */ -#define UTOPIA_CORE_ID 0x80c /* utopia core */ -#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ -#define SOCRAM_CORE_ID 0x80e /* internal memory core */ -#define MEMC_CORE_ID 0x80f /* memc sdram core */ -#define OFDM_CORE_ID 0x810 /* OFDM phy core */ -#define EXTIF_CORE_ID 0x811 /* external interface core */ -#define D11_CORE_ID 0x812 /* 802.11 MAC core */ -#define APHY_CORE_ID 0x813 /* 802.11a phy core */ -#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ -#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ -#define MIPS33_CORE_ID 0x816 /* mips3302 core */ -#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ -#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ -#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ -#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ -#define SDIOH_CORE_ID 0x81b /* sdio host core */ -#define ROBO_CORE_ID 0x81c /* roboswitch core */ -#define ATA100_CORE_ID 0x81d /* parallel ATA core */ -#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ -#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ -#define PCIE_CORE_ID 0x820 /* pci express core */ -#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ -#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ -#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ -#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ -#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ -#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ -#define PMU_CORE_ID 0x827 /* PMU core */ -#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ -#define SDIOD_CORE_ID 0x829 /* SDIO device core */ -#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ -#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ -#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ -#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ -#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ -#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ -#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ -#define SC_CORE_ID 0x831 /* shared common core */ -#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ -#define SPIH_CORE_ID 0x833 /* SPI host core */ -#define I2S_CORE_ID 0x834 /* I2S core */ -#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ -#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ -#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ -#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all - * unused address ranges - */ - -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ -#define SI_CC_IDX 0 - -/* SOC Interconnect types (aka chip types) */ -#define SOCI_AI 1 - -/* Common core control flags */ -#define SICF_BIST_EN 0x8000 -#define SICF_PME_EN 0x4000 -#define SICF_CORE_BITS 0x3ffc -#define SICF_FGC 0x0002 -#define SICF_CLOCK_EN 0x0001 - -/* Common core status flags */ -#define SISF_BIST_DONE 0x8000 -#define SISF_BIST_ERROR 0x4000 -#define SISF_GATED_CLK 0x2000 -#define SISF_DMA64 0x1000 -#define SISF_CORE_BITS 0x0fff - -/* A register that is common to all cores to - * communicate w/PMU regarding clock control. - */ -#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ - -/* clk_ctl_st register */ -#define CCS_FORCEALP 0x00000001 /* force ALP request */ -#define CCS_FORCEHT 0x00000002 /* force HT request */ -#define CCS_FORCEILP 0x00000004 /* force ILP request */ -#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ -#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ -#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ -#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ -#define CCS_ERSRC_REQ_SHIFT 8 -#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ -#define CCS_HTAVAIL 0x00020000 /* HT is available */ -#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ -#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ -#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ -#define CCS_ERSRC_STS_SHIFT 24 - -#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ -#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ - -/* Not really related to SOC Interconnect, but a couple of software - * conventions for the use the flash space: - */ - -/* Minimum amount of flash we support */ -#define FLASH_MIN 0x00020000 /* Minimum flash size */ - -/* A boot/binary may have an embedded block that describes its size */ -#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ -#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ -#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ -#define BISZ_TXTST_IDX 1 /* 1: text start */ -#define BISZ_TXTEND_IDX 2 /* 2: text end */ -#define BISZ_DATAST_IDX 3 /* 3: data start */ -#define BISZ_DATAEND_IDX 4 /* 4: data end */ -#define BISZ_BSSST_IDX 5 /* 5: bss start */ -#define BISZ_BSSEND_IDX 6 /* 6: bss end */ -#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ - -#endif /* _HNDSOC_H */ diff --git a/drivers/staging/brcm80211/include/sbdma.h b/drivers/staging/brcm80211/include/sbdma.h new file mode 100644 index 0000000..08cb7f6 --- /dev/null +++ b/drivers/staging/brcm80211/include/sbdma.h @@ -0,0 +1,315 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _sbhnddma_h_ +#define _sbhnddma_h_ + +/* DMA structure: + * support two DMA engines: 32 bits address or 64 bit addressing + * basic DMA register set is per channel(transmit or receive) + * a pair of channels is defined for convenience + */ + +/* 32 bits addressing */ + +/* dma registers per channel(xmt or rcv) */ +typedef volatile struct { + u32 control; /* enable, et al */ + u32 addr; /* descriptor ring base address (4K aligned) */ + u32 ptr; /* last descriptor posted to chip */ + u32 status; /* current active descriptor, et al */ +} dma32regs_t; + +typedef volatile struct { + dma32regs_t xmt; /* dma tx channel */ + dma32regs_t rcv; /* dma rx channel */ +} dma32regp_t; + +typedef volatile struct { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +} dma32diag_t; + +/* + * DMA Descriptor + * Descriptors are only read by the hardware, never written back. + */ +typedef volatile struct { + u32 ctrl; /* misc control bits & bufcount */ + u32 addr; /* data buffer address */ +} dma32dd_t; + +/* + * Each descriptor ring must be 4096byte aligned, and fit within a single 4096byte page. + */ +#define D32RINGALIGN_BITS 12 +#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) +#define D32RINGALIGN (1 << D32RINGALIGN_BITS) + +#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) + +/* transmit channel control */ +#define XC_XE ((u32)1 << 0) /* transmit enable */ +#define XC_SE ((u32)1 << 1) /* transmit suspend request */ +#define XC_LE ((u32)1 << 2) /* loopback enable */ +#define XC_FL ((u32)1 << 4) /* flush request */ +#define XC_PD ((u32)1 << 11) /* parity check disable */ +#define XC_AE ((u32)3 << 16) /* address extension bits */ +#define XC_AE_SHIFT 16 + +/* transmit descriptor table pointer */ +#define XP_LD_MASK 0xfff /* last valid descriptor */ + +/* transmit channel status */ +#define XS_CD_MASK 0x0fff /* current descriptor pointer */ +#define XS_XS_MASK 0xf000 /* transmit state */ +#define XS_XS_SHIFT 12 +#define XS_XS_DISABLED 0x0000 /* disabled */ +#define XS_XS_ACTIVE 0x1000 /* active */ +#define XS_XS_IDLE 0x2000 /* idle wait */ +#define XS_XS_STOPPED 0x3000 /* stopped */ +#define XS_XS_SUSP 0x4000 /* suspend pending */ +#define XS_XE_MASK 0xf0000 /* transmit errors */ +#define XS_XE_SHIFT 16 +#define XS_XE_NOERR 0x00000 /* no error */ +#define XS_XE_DPE 0x10000 /* descriptor protocol error */ +#define XS_XE_DFU 0x20000 /* data fifo underrun */ +#define XS_XE_BEBR 0x30000 /* bus error on buffer read */ +#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */ +#define XS_AD_MASK 0xfff00000 /* active descriptor */ +#define XS_AD_SHIFT 20 + +/* receive channel control */ +#define RC_RE ((u32)1 << 0) /* receive enable */ +#define RC_RO_MASK 0xfe /* receive frame offset */ +#define RC_RO_SHIFT 1 +#define RC_FM ((u32)1 << 8) /* direct fifo receive (pio) mode */ +#define RC_SH ((u32)1 << 9) /* separate rx header descriptor enable */ +#define RC_OC ((u32)1 << 10) /* overflow continue */ +#define RC_PD ((u32)1 << 11) /* parity check disable */ +#define RC_AE ((u32)3 << 16) /* address extension bits */ +#define RC_AE_SHIFT 16 + +/* receive descriptor table pointer */ +#define RP_LD_MASK 0xfff /* last valid descriptor */ + +/* receive channel status */ +#define RS_CD_MASK 0x0fff /* current descriptor pointer */ +#define RS_RS_MASK 0xf000 /* receive state */ +#define RS_RS_SHIFT 12 +#define RS_RS_DISABLED 0x0000 /* disabled */ +#define RS_RS_ACTIVE 0x1000 /* active */ +#define RS_RS_IDLE 0x2000 /* idle wait */ +#define RS_RS_STOPPED 0x3000 /* reserved */ +#define RS_RE_MASK 0xf0000 /* receive errors */ +#define RS_RE_SHIFT 16 +#define RS_RE_NOERR 0x00000 /* no error */ +#define RS_RE_DPE 0x10000 /* descriptor protocol error */ +#define RS_RE_DFO 0x20000 /* data fifo overflow */ +#define RS_RE_BEBW 0x30000 /* bus error on buffer write */ +#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */ +#define RS_AD_MASK 0xfff00000 /* active descriptor */ +#define RS_AD_SHIFT 20 + +/* fifoaddr */ +#define FA_OFF_MASK 0xffff /* offset */ +#define FA_SEL_MASK 0xf0000 /* select */ +#define FA_SEL_SHIFT 16 +#define FA_SEL_XDD 0x00000 /* transmit dma data */ +#define FA_SEL_XDP 0x10000 /* transmit dma pointers */ +#define FA_SEL_RDD 0x40000 /* receive dma data */ +#define FA_SEL_RDP 0x50000 /* receive dma pointers */ +#define FA_SEL_XFD 0x80000 /* transmit fifo data */ +#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */ +#define FA_SEL_RFD 0xc0000 /* receive fifo data */ +#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */ +#define FA_SEL_RSD 0xe0000 /* receive frame status data */ +#define FA_SEL_RSP 0xf0000 /* receive frame status pointers */ + +/* descriptor control flags */ +#define CTRL_BC_MASK 0x00001fff /* buffer byte count, real data len must <= 4KB */ +#define CTRL_AE ((u32)3 << 16) /* address extension bits */ +#define CTRL_AE_SHIFT 16 +#define CTRL_PARITY ((u32)3 << 18) /* parity bit */ +#define CTRL_EOT ((u32)1 << 28) /* end of descriptor table */ +#define CTRL_IOC ((u32)1 << 29) /* interrupt on completion */ +#define CTRL_EOF ((u32)1 << 30) /* end of frame */ +#define CTRL_SOF ((u32)1 << 31) /* start of frame */ + +/* control flags in the range [27:20] are core-specific and not defined here */ +#define CTRL_CORE_MASK 0x0ff00000 + +/* 64 bits addressing */ + +/* dma registers per channel(xmt or rcv) */ +typedef volatile struct { + u32 control; /* enable, et al */ + u32 ptr; /* last descriptor posted to chip */ + u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ + u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ + u32 status0; /* current descriptor, xmt state */ + u32 status1; /* active descriptor, xmt error */ +} dma64regs_t; + +typedef volatile struct { + dma64regs_t tx; /* dma64 tx channel */ + dma64regs_t rx; /* dma64 rx channel */ +} dma64regp_t; + +typedef volatile struct { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +} dma64diag_t; + +/* + * DMA Descriptor + * Descriptors are only read by the hardware, never written back. + */ +typedef volatile struct { + u32 ctrl1; /* misc control bits & bufcount */ + u32 ctrl2; /* buffer count and address extension */ + u32 addrlow; /* memory address of the date buffer, bits 31:0 */ + u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ +} dma64dd_t; + +/* + * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. + */ +#define D64RINGALIGN_BITS 13 +#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) +#define D64RINGALIGN (1 << D64RINGALIGN_BITS) + +#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) + +/* transmit channel control */ +#define D64_XC_XE 0x00000001 /* transmit enable */ +#define D64_XC_SE 0x00000002 /* transmit suspend request */ +#define D64_XC_LE 0x00000004 /* loopback enable */ +#define D64_XC_FL 0x00000010 /* flush request */ +#define D64_XC_PD 0x00000800 /* parity check disable */ +#define D64_XC_AE 0x00030000 /* address extension bits */ +#define D64_XC_AE_SHIFT 16 + +/* transmit descriptor table pointer */ +#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* transmit channel status */ +#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ +#define D64_XS0_XS_SHIFT 28 +#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ +#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ +#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ +#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ +#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ + +#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ +#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ +#define D64_XS1_XE_SHIFT 28 +#define D64_XS1_XE_NOERR 0x00000000 /* no error */ +#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ +#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ +#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ +#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ +#define D64_XS1_XE_COREE 0x50000000 /* core error */ + +/* receive channel control */ +#define D64_RC_RE 0x00000001 /* receive enable */ +#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ +#define D64_RC_RO_SHIFT 1 +#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ +#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ +#define D64_RC_OC 0x00000400 /* overflow continue */ +#define D64_RC_PD 0x00000800 /* parity check disable */ +#define D64_RC_AE 0x00030000 /* address extension bits */ +#define D64_RC_AE_SHIFT 16 + +/* flags for dma controller */ +#define DMA_CTRL_PEN (1 << 0) /* partity enable */ +#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ +#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ +#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ + +/* receive descriptor table pointer */ +#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* receive channel status */ +#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ +#define D64_RS0_RS_SHIFT 28 +#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ +#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ +#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ +#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ +#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ + +#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ +#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ +#define D64_RS1_RE_SHIFT 28 +#define D64_RS1_RE_NOERR 0x00000000 /* no error */ +#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ +#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ +#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ +#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ +#define D64_RS1_RE_COREE 0x50000000 /* core error */ + +/* fifoaddr */ +#define D64_FA_OFF_MASK 0xffff /* offset */ +#define D64_FA_SEL_MASK 0xf0000 /* select */ +#define D64_FA_SEL_SHIFT 16 +#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ +#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ +#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ +#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ +#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ +#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ +#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ +#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ +#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ +#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ + +/* descriptor control flags 1 */ +#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ +#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ +#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ +#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ +#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ + +/* descriptor control flags 2 */ +#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ +#define D64_CTRL2_AE 0x00030000 /* address extension bits */ +#define D64_CTRL2_AE_SHIFT 16 +#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ + +/* control flags in the range [27:20] are core-specific and not defined here */ +#define D64_CTRL_CORE_MASK 0x0ff00000 + +#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ +#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ +#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ +#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ + +/* receive frame status */ +typedef volatile struct { + u16 len; + u16 flags; +} dma_rxh_t; + +#endif /* _sbhnddma_h_ */ diff --git a/drivers/staging/brcm80211/include/sbhnddma.h b/drivers/staging/brcm80211/include/sbhnddma.h deleted file mode 100644 index 08cb7f6..0000000 --- a/drivers/staging/brcm80211/include/sbhnddma.h +++ /dev/null @@ -1,315 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbhnddma_h_ -#define _sbhnddma_h_ - -/* DMA structure: - * support two DMA engines: 32 bits address or 64 bit addressing - * basic DMA register set is per channel(transmit or receive) - * a pair of channels is defined for convenience - */ - -/* 32 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 addr; /* descriptor ring base address (4K aligned) */ - u32 ptr; /* last descriptor posted to chip */ - u32 status; /* current active descriptor, et al */ -} dma32regs_t; - -typedef volatile struct { - dma32regs_t xmt; /* dma tx channel */ - dma32regs_t rcv; /* dma rx channel */ -} dma32regp_t; - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma32diag_t; - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl; /* misc control bits & bufcount */ - u32 addr; /* data buffer address */ -} dma32dd_t; - -/* - * Each descriptor ring must be 4096byte aligned, and fit within a single 4096byte page. - */ -#define D32RINGALIGN_BITS 12 -#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) -#define D32RINGALIGN (1 << D32RINGALIGN_BITS) - -#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) - -/* transmit channel control */ -#define XC_XE ((u32)1 << 0) /* transmit enable */ -#define XC_SE ((u32)1 << 1) /* transmit suspend request */ -#define XC_LE ((u32)1 << 2) /* loopback enable */ -#define XC_FL ((u32)1 << 4) /* flush request */ -#define XC_PD ((u32)1 << 11) /* parity check disable */ -#define XC_AE ((u32)3 << 16) /* address extension bits */ -#define XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define XP_LD_MASK 0xfff /* last valid descriptor */ - -/* transmit channel status */ -#define XS_CD_MASK 0x0fff /* current descriptor pointer */ -#define XS_XS_MASK 0xf000 /* transmit state */ -#define XS_XS_SHIFT 12 -#define XS_XS_DISABLED 0x0000 /* disabled */ -#define XS_XS_ACTIVE 0x1000 /* active */ -#define XS_XS_IDLE 0x2000 /* idle wait */ -#define XS_XS_STOPPED 0x3000 /* stopped */ -#define XS_XS_SUSP 0x4000 /* suspend pending */ -#define XS_XE_MASK 0xf0000 /* transmit errors */ -#define XS_XE_SHIFT 16 -#define XS_XE_NOERR 0x00000 /* no error */ -#define XS_XE_DPE 0x10000 /* descriptor protocol error */ -#define XS_XE_DFU 0x20000 /* data fifo underrun */ -#define XS_XE_BEBR 0x30000 /* bus error on buffer read */ -#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */ -#define XS_AD_MASK 0xfff00000 /* active descriptor */ -#define XS_AD_SHIFT 20 - -/* receive channel control */ -#define RC_RE ((u32)1 << 0) /* receive enable */ -#define RC_RO_MASK 0xfe /* receive frame offset */ -#define RC_RO_SHIFT 1 -#define RC_FM ((u32)1 << 8) /* direct fifo receive (pio) mode */ -#define RC_SH ((u32)1 << 9) /* separate rx header descriptor enable */ -#define RC_OC ((u32)1 << 10) /* overflow continue */ -#define RC_PD ((u32)1 << 11) /* parity check disable */ -#define RC_AE ((u32)3 << 16) /* address extension bits */ -#define RC_AE_SHIFT 16 - -/* receive descriptor table pointer */ -#define RP_LD_MASK 0xfff /* last valid descriptor */ - -/* receive channel status */ -#define RS_CD_MASK 0x0fff /* current descriptor pointer */ -#define RS_RS_MASK 0xf000 /* receive state */ -#define RS_RS_SHIFT 12 -#define RS_RS_DISABLED 0x0000 /* disabled */ -#define RS_RS_ACTIVE 0x1000 /* active */ -#define RS_RS_IDLE 0x2000 /* idle wait */ -#define RS_RS_STOPPED 0x3000 /* reserved */ -#define RS_RE_MASK 0xf0000 /* receive errors */ -#define RS_RE_SHIFT 16 -#define RS_RE_NOERR 0x00000 /* no error */ -#define RS_RE_DPE 0x10000 /* descriptor protocol error */ -#define RS_RE_DFO 0x20000 /* data fifo overflow */ -#define RS_RE_BEBW 0x30000 /* bus error on buffer write */ -#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */ -#define RS_AD_MASK 0xfff00000 /* active descriptor */ -#define RS_AD_SHIFT 20 - -/* fifoaddr */ -#define FA_OFF_MASK 0xffff /* offset */ -#define FA_SEL_MASK 0xf0000 /* select */ -#define FA_SEL_SHIFT 16 -#define FA_SEL_XDD 0x00000 /* transmit dma data */ -#define FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define FA_SEL_RDD 0x40000 /* receive dma data */ -#define FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags */ -#define CTRL_BC_MASK 0x00001fff /* buffer byte count, real data len must <= 4KB */ -#define CTRL_AE ((u32)3 << 16) /* address extension bits */ -#define CTRL_AE_SHIFT 16 -#define CTRL_PARITY ((u32)3 << 18) /* parity bit */ -#define CTRL_EOT ((u32)1 << 28) /* end of descriptor table */ -#define CTRL_IOC ((u32)1 << 29) /* interrupt on completion */ -#define CTRL_EOF ((u32)1 << 30) /* end of frame */ -#define CTRL_SOF ((u32)1 << 31) /* start of frame */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define CTRL_CORE_MASK 0x0ff00000 - -/* 64 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 ptr; /* last descriptor posted to chip */ - u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ - u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ - u32 status0; /* current descriptor, xmt state */ - u32 status1; /* active descriptor, xmt error */ -} dma64regs_t; - -typedef volatile struct { - dma64regs_t tx; /* dma64 tx channel */ - dma64regs_t rx; /* dma64 rx channel */ -} dma64regp_t; - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma64diag_t; - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl1; /* misc control bits & bufcount */ - u32 ctrl2; /* buffer count and address extension */ - u32 addrlow; /* memory address of the date buffer, bits 31:0 */ - u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ -} dma64dd_t; - -/* - * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. - */ -#define D64RINGALIGN_BITS 13 -#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) -#define D64RINGALIGN (1 << D64RINGALIGN_BITS) - -#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) - -/* transmit channel control */ -#define D64_XC_XE 0x00000001 /* transmit enable */ -#define D64_XC_SE 0x00000002 /* transmit suspend request */ -#define D64_XC_LE 0x00000004 /* loopback enable */ -#define D64_XC_FL 0x00000010 /* flush request */ -#define D64_XC_PD 0x00000800 /* parity check disable */ -#define D64_XC_AE 0x00030000 /* address extension bits */ -#define D64_XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* transmit channel status */ -#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ -#define D64_XS0_XS_SHIFT 28 -#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ -#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ -#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ -#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ -#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ - -#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ -#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ -#define D64_XS1_XE_SHIFT 28 -#define D64_XS1_XE_NOERR 0x00000000 /* no error */ -#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ -#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ -#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ -#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ -#define D64_XS1_XE_COREE 0x50000000 /* core error */ - -/* receive channel control */ -#define D64_RC_RE 0x00000001 /* receive enable */ -#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ -#define D64_RC_RO_SHIFT 1 -#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ -#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ -#define D64_RC_OC 0x00000400 /* overflow continue */ -#define D64_RC_PD 0x00000800 /* parity check disable */ -#define D64_RC_AE 0x00030000 /* address extension bits */ -#define D64_RC_AE_SHIFT 16 - -/* flags for dma controller */ -#define DMA_CTRL_PEN (1 << 0) /* partity enable */ -#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ -#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ -#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ - -/* receive descriptor table pointer */ -#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* receive channel status */ -#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ -#define D64_RS0_RS_SHIFT 28 -#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ -#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ -#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ -#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ -#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ - -#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ -#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ -#define D64_RS1_RE_SHIFT 28 -#define D64_RS1_RE_NOERR 0x00000000 /* no error */ -#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ -#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ -#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ -#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ -#define D64_RS1_RE_COREE 0x50000000 /* core error */ - -/* fifoaddr */ -#define D64_FA_OFF_MASK 0xffff /* offset */ -#define D64_FA_SEL_MASK 0xf0000 /* select */ -#define D64_FA_SEL_SHIFT 16 -#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ -#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ -#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags 1 */ -#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ -#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ -#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ -#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ -#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ - -/* descriptor control flags 2 */ -#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ -#define D64_CTRL2_AE 0x00030000 /* address extension bits */ -#define D64_CTRL2_AE_SHIFT 16 -#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define D64_CTRL_CORE_MASK 0x0ff00000 - -#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ -#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ -#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ -#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ - -/* receive frame status */ -typedef volatile struct { - u16 len; - u16 flags; -} dma_rxh_t; - -#endif /* _sbhnddma_h_ */ -- cgit v0.10.2 From 70963f98ee7854f8acd541349089c72b5b70c77c Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:08 +0200 Subject: staging: brcm80211: removed 'hnd' from everything but function names Code cleanup. 'hnd' is a company specific acronym. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index fd4f341..4f13fc3 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -152,7 +152,7 @@ extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, typedef struct dhd_console { uint count; /* Poll interval msec counter */ uint log_addr; /* Log struct address (fixed) */ - hndrte_log_t log; /* Log struct (host copy) */ + rte_log_t log; /* Log struct (host copy) */ uint bufsize; /* Size of log buffer */ u8 *buf; /* Log buffer (host copy) */ uint last; /* Last buffer read index */ @@ -1734,7 +1734,7 @@ static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh) return -EBADE; } - /* Read hndrte_shared structure */ + /* Read rte_shared structure */ rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh, sizeof(sdpcm_shared_t)); if (rv < 0) @@ -1949,7 +1949,7 @@ static int dhdsdio_readconsole(dhd_bus_t *bus) return 0; /* Read console log struct */ - addr = bus->console_addr + offsetof(hndrte_cons_t, log); + addr = bus->console_addr + offsetof(rte_cons_t, log); rv = dhdsdio_membytes(bus, false, addr, (u8 *)&c->log, sizeof(c->log)); if (rv < 0) @@ -4826,20 +4826,20 @@ extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen) dhdsdio_clkctl(bus, CLK_AVAIL, false); /* Zero cbuf_index */ - addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf_idx); + addr = bus->console_addr + offsetof(rte_cons_t, cbuf_idx); val = cpu_to_le32(0); rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); if (rv < 0) goto done; /* Write message into cbuf */ - addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf); + addr = bus->console_addr + offsetof(rte_cons_t, cbuf); rv = dhdsdio_membytes(bus, true, addr, (u8 *)msg, msglen); if (rv < 0) goto done; /* Write length into vcons_in */ - addr = bus->console_addr + offsetof(hndrte_cons_t, vcons_in); + addr = bus->console_addr + offsetof(rte_cons_t, vcons_in); val = cpu_to_le32(msglen); rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); if (rv < 0) diff --git a/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h index 28f092c..ebb2237 100644 --- a/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h +++ b/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _hndrte_armtrap_h -#define _hndrte_armtrap_h +#ifndef _rte_armtrap_h +#define _rte_armtrap_h /* ARM trap handling */ @@ -72,4 +72,4 @@ typedef struct _trap_struct { #endif /* !_LANGUAGE_ASSEMBLY */ -#endif /* _hndrte_armtrap_h */ +#endif /* _rte_armtrap_h */ diff --git a/drivers/staging/brcm80211/brcmfmac/rte_cons.h b/drivers/staging/brcm80211/brcmfmac/rte_cons.h index 4df3eec..7977e08 100644 --- a/drivers/staging/brcm80211/brcmfmac/rte_cons.h +++ b/drivers/staging/brcm80211/brcmfmac/rte_cons.h @@ -13,8 +13,8 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _hndrte_cons_h -#define _hndrte_cons_h +#ifndef _rte_cons_h +#define _rte_cons_h #define CBUF_LEN (128) @@ -25,7 +25,7 @@ typedef struct { uint buf_size; uint idx; char *_buf_compat; /* Redundant pointer for backward compat. */ -} hndrte_log_t; +} rte_log_t; typedef struct { /* Virtual UART @@ -46,7 +46,7 @@ typedef struct { * Output will be lost if the output wraps around faster than the host * polls. */ - hndrte_log_t log; + rte_log_t log; /* Console input line buffer * Characters are read one at a time into cbuf @@ -56,7 +56,6 @@ typedef struct { */ uint cbuf_idx; char cbuf[CBUF_LEN]; -} hndrte_cons_t; - -#endif /* _hndrte_cons_h */ +} rte_cons_t; +#endif /* _rte_cons_h */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index fbbcb9b..fc68d49 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -14,13 +14,13 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _hnddma_h_ -#define _hnddma_h_ +#ifndef _bcmdma_h_ +#define _bcmdma_h_ -#ifndef _hnddma_pub_ -#define _hnddma_pub_ -struct hnddma_pub; -#endif /* _hnddma_pub_ */ +#ifndef _dma_pub_ +#define _dma_pub_ +struct dma_pub; +#endif /* _dma_pub_ */ /* map/unmap direction */ #define DMA_TX 1 /* TX direction for DMA */ @@ -35,54 +35,54 @@ typedef enum txd_range { } txd_range_t; /* dma function type */ -typedef void (*di_detach_t) (struct hnddma_pub *dmah); -typedef bool(*di_txreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxidle_t) (struct hnddma_pub *dmah); -typedef void (*di_txinit_t) (struct hnddma_pub *dmah); -typedef bool(*di_txenabled_t) (struct hnddma_pub *dmah); -typedef void (*di_rxinit_t) (struct hnddma_pub *dmah); -typedef void (*di_txsuspend_t) (struct hnddma_pub *dmah); -typedef void (*di_txresume_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspended_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspendedidle_t) (struct hnddma_pub *dmah); -typedef int (*di_txfast_t) (struct hnddma_pub *dmah, struct sk_buff *p, +typedef void (*di_detach_t) (struct dma_pub *dmah); +typedef bool(*di_txreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxidle_t) (struct dma_pub *dmah); +typedef void (*di_txinit_t) (struct dma_pub *dmah); +typedef bool(*di_txenabled_t) (struct dma_pub *dmah); +typedef void (*di_rxinit_t) (struct dma_pub *dmah); +typedef void (*di_txsuspend_t) (struct dma_pub *dmah); +typedef void (*di_txresume_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspended_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspendedidle_t) (struct dma_pub *dmah); +typedef int (*di_txfast_t) (struct dma_pub *dmah, struct sk_buff *p, bool commit); -typedef int (*di_txunframed_t) (struct hnddma_pub *dmah, void *p, uint len, +typedef int (*di_txunframed_t) (struct dma_pub *dmah, void *p, uint len, bool commit); -typedef void *(*di_getpos_t) (struct hnddma_pub *di, bool direction); -typedef void (*di_fifoloopbackenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_txstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenabled_t) (struct hnddma_pub *dmah); -typedef void *(*di_rx_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxfill_t) (struct hnddma_pub *dmah); -typedef void (*di_txreclaim_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void (*di_rxreclaim_t) (struct hnddma_pub *dmah); -typedef unsigned long (*di_getvar_t) (struct hnddma_pub *dmah, +typedef void *(*di_getpos_t) (struct dma_pub *di, bool direction); +typedef void (*di_fifoloopbackenable_t) (struct dma_pub *dmah); +typedef bool(*di_txstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxenable_t) (struct dma_pub *dmah); +typedef bool(*di_rxenabled_t) (struct dma_pub *dmah); +typedef void *(*di_rx_t) (struct dma_pub *dmah); +typedef bool(*di_rxfill_t) (struct dma_pub *dmah); +typedef void (*di_txreclaim_t) (struct dma_pub *dmah, txd_range_t range); +typedef void (*di_rxreclaim_t) (struct dma_pub *dmah); +typedef unsigned long (*di_getvar_t) (struct dma_pub *dmah, const char *name); -typedef void *(*di_getnexttxp_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void *(*di_getnextrxp_t) (struct hnddma_pub *dmah, bool forceall); -typedef void *(*di_peeknexttxp_t) (struct hnddma_pub *dmah); -typedef void *(*di_peeknextrxp_t) (struct hnddma_pub *dmah); -typedef void (*di_rxparam_get_t) (struct hnddma_pub *dmah, u16 *rxoffset, +typedef void *(*di_getnexttxp_t) (struct dma_pub *dmah, txd_range_t range); +typedef void *(*di_getnextrxp_t) (struct dma_pub *dmah, bool forceall); +typedef void *(*di_peeknexttxp_t) (struct dma_pub *dmah); +typedef void *(*di_peeknextrxp_t) (struct dma_pub *dmah); +typedef void (*di_rxparam_get_t) (struct dma_pub *dmah, u16 *rxoffset, u16 *rxbufsize); -typedef void (*di_txblock_t) (struct hnddma_pub *dmah); -typedef void (*di_txunblock_t) (struct hnddma_pub *dmah); -typedef uint(*di_txactive_t) (struct hnddma_pub *dmah); -typedef void (*di_txrotate_t) (struct hnddma_pub *dmah); -typedef void (*di_counterreset_t) (struct hnddma_pub *dmah); -typedef uint(*di_ctrlflags_t) (struct hnddma_pub *dmah, uint mask, uint flags); -typedef char *(*di_dump_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef void (*di_txblock_t) (struct dma_pub *dmah); +typedef void (*di_txunblock_t) (struct dma_pub *dmah); +typedef uint(*di_txactive_t) (struct dma_pub *dmah); +typedef void (*di_txrotate_t) (struct dma_pub *dmah); +typedef void (*di_counterreset_t) (struct dma_pub *dmah); +typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags); +typedef char *(*di_dump_t) (struct dma_pub *dmah, struct bcmstrbuf *b, bool dumpring); -typedef char *(*di_dumptx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct bcmstrbuf *b, bool dumpring); -typedef char *(*di_dumprx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct bcmstrbuf *b, bool dumpring); -typedef uint(*di_rxactive_t) (struct hnddma_pub *dmah); -typedef uint(*di_txpending_t) (struct hnddma_pub *dmah); -typedef uint(*di_txcommitted_t) (struct hnddma_pub *dmah); +typedef uint(*di_rxactive_t) (struct dma_pub *dmah); +typedef uint(*di_txpending_t) (struct dma_pub *dmah); +typedef uint(*di_txcommitted_t) (struct dma_pub *dmah); /* dma opsvec */ typedef struct di_fcn_s { @@ -136,7 +136,7 @@ typedef struct di_fcn_s { * Exported data structure (read-only) */ /* export structure */ -struct hnddma_pub { +struct dma_pub { const di_fcn_t *di_fn; /* DMA function pointers */ uint txavail; /* # free tx descriptors */ uint dmactrlflags; /* dma control flags */ @@ -148,7 +148,7 @@ struct hnddma_pub { uint txnobuf; /* tx out of dma descriptors */ }; -extern struct hnddma_pub *dma_attach(char *name, si_t *sih, +extern struct dma_pub *dma_attach(char *name, si_t *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level); @@ -202,7 +202,7 @@ extern const di_fcn_t dma64proc; * This info is needed by DMA_ALLOC_CONSISTENT in dma attach */ extern uint dma_addrwidth(si_t *sih, void *dmaregs); -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) +void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a); /* @@ -223,4 +223,4 @@ static inline void dma_spin_for_len(uint len, struct sk_buff *head) #endif /* defined(__mips__) */ } -#endif /* _hnddma_h_ */ +#endif /* _bcmdma_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index f025641..d01f60a 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -819,7 +819,7 @@ static int hndotp_nvread(void *oh, char *data, uint *len) return rc; } -static otp_fn_t hndotp_fn = { +static otp_fn_t otp_fn = { (otp_size_t) hndotp_size, (otp_read_bit_t) hndotp_read_bit, @@ -883,7 +883,7 @@ void *otp_init(si_t *sih) #ifdef BCMHNDOTP if (OTPTYPE_HND(oi->ccrev)) - oi->fn = &hndotp_fn; + oi->fn = &otp_fn; #endif if (oi->fn == NULL) { diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 6fde51f..2557255 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -31,10 +31,6 @@ #include #endif -#ifdef BRCM_FULLMAC -#error "hnddma.c shouldn't be needed for FULLMAC" -#endif - /* debug/trace */ #ifdef BCMDBG #define DMA_ERROR(args) \ @@ -75,7 +71,7 @@ static uint dma_msg_level; /* dma engine software state */ typedef struct dma_info { - struct hnddma_pub hnddma; /* exported structure */ + struct dma_pub dma; /* exported structure */ uint *msg_level; /* message level pointer */ char name[MAXNAMEL]; /* callers name for diag msgs */ @@ -99,7 +95,7 @@ typedef struct dma_info { u16 txin; /* index of next descriptor to reclaim */ u16 txout; /* index of next descriptor to post */ void **txp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */ + dma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */ dmaaddr_t txdpa; /* Aligned physical address of descriptor ring */ dmaaddr_t txdpaorig; /* Original physical address of descriptor ring */ u16 txdalign; /* #bytes added to alloc'd mem to align txd */ @@ -113,7 +109,7 @@ typedef struct dma_info { u16 rxin; /* index of next descriptor to reclaim */ u16 rxout; /* index of next descriptor to post */ void **rxp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */ + dma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */ dmaaddr_t rxdpa; /* Aligned physical address of descriptor ring */ dmaaddr_t rxdpaorig; /* Original physical address of descriptor ring */ u16 rxdalign; /* #bytes added to alloc'd mem to align rxd */ @@ -274,7 +270,7 @@ const di_fcn_t dma64proc = { 39 }; -struct hnddma_pub *dma_attach(char *name, si_t *sih, +struct dma_pub *dma_attach(char *name, si_t *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level) @@ -299,20 +295,20 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih, /* init dma reg pointer */ di->d64txregs = (dma64regs_t *) dmaregstx; di->d64rxregs = (dma64regs_t *) dmaregsrx; - di->hnddma.di_fn = (const di_fcn_t *)&dma64proc; + di->dma.di_fn = (const di_fcn_t *)&dma64proc; /* Default flags (which can be changed by the driver calling dma_ctrlflags * before enable): For backwards compatibility both Rx Overflow Continue * and Parity are DISABLED. * supports it. */ - di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN, - 0); + di->dma.di_fn->ctrlflags(&di->dma, DMA_CTRL_ROC | DMA_CTRL_PEN, + 0); DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d " "rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d " "dmaregstx %p dmaregsrx %p\n", name, "DMA64", - di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize, + di->dma.dmactrlflags, ntxd, nrxd, rxbufsize, rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx)); /* make a private copy of our callers name */ @@ -427,21 +423,21 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih, /* allocate DMA mapping vectors */ if (DMASGLIST_ENAB) { if (ntxd) { - size = ntxd * sizeof(hnddma_seg_map_t); + size = ntxd * sizeof(dma_seg_map_t); di->txp_dmah = kzalloc(size, GFP_ATOMIC); if (di->txp_dmah == NULL) goto fail; } if (nrxd) { - size = nrxd * sizeof(hnddma_seg_map_t); + size = nrxd * sizeof(dma_seg_map_t); di->rxp_dmah = kzalloc(size, GFP_ATOMIC); if (di->rxp_dmah == NULL) goto fail; } } - return (struct hnddma_pub *) di; + return (struct dma_pub *) di; fail: _dma_detach(di); @@ -497,7 +493,7 @@ dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); } - if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) { + if (di->dma.dmactrlflags & DMA_CTRL_PEN) { if (DMA64_DD_PARITY(&ddring[outidx])) { W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY)); @@ -678,7 +674,7 @@ static void _dma_rxinit(dma_info_t *di) static void _dma_rxenable(dma_info_t *di) { - uint dmactrlflags = di->hnddma.dmactrlflags; + uint dmactrlflags = di->dma.dmactrlflags; u32 control; DMA_TRACE(("%s: dma_rxenable\n", di->name)); @@ -760,11 +756,11 @@ static void *_dma_rx(dma_info_t *di) } #endif /* BCMDBG */ - if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { + if ((di->dma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n", di->name, len)); bcm_pkt_buf_free_skb(head); - di->hnddma.rxgiants++; + di->dma.rxgiants++; goto next_frame; } } @@ -821,7 +817,7 @@ static bool _dma_rxfill(dma_info_t *di) di->name)); ring_empty = true; } - di->hnddma.rxnobuf++; + di->dma.rxnobuf++; break; } /* reserve an extra headroom, if applicable */ @@ -835,7 +831,7 @@ static bool _dma_rxfill(dma_info_t *di) if (DMASGLIST_ENAB) memset(&di->rxp_dmah[rxout], 0, - sizeof(hnddma_seg_map_t)); + sizeof(dma_seg_map_t)); pa = pci_map_single(di->pbus, p->data, di->rxbufsize, PCI_DMA_FROMDEVICE); @@ -922,12 +918,12 @@ static void *_dma_getnextrxp(dma_info_t *di, bool forceall) static void _dma_txblock(dma_info_t *di) { - di->hnddma.txavail = 0; + di->dma.txavail = 0; } static void _dma_txunblock(dma_info_t *di) { - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; } static uint _dma_txactive(dma_info_t *di) @@ -968,14 +964,14 @@ static uint _dma_rxactive(dma_info_t *di) static void _dma_counterreset(dma_info_t *di) { /* reset all software counter */ - di->hnddma.rxgiants = 0; - di->hnddma.rxnobuf = 0; - di->hnddma.txnobuf = 0; + di->dma.rxgiants = 0; + di->dma.rxnobuf = 0; + di->dma.txnobuf = 0; } static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) { - uint dmactrlflags = di->hnddma.dmactrlflags; + uint dmactrlflags = di->dma.dmactrlflags; if (di == NULL) { DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name)); @@ -1004,7 +1000,7 @@ static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) } } - di->hnddma.dmactrlflags = dmactrlflags; + di->dma.dmactrlflags = dmactrlflags; return dmactrlflags; } @@ -1013,7 +1009,7 @@ static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) static unsigned long _dma_getvar(dma_info_t *di, const char *name) { if (!strcmp(name, "&txavail")) - return (unsigned long)&(di->hnddma.txavail); + return (unsigned long)&(di->dma.txavail); return 0; } @@ -1069,7 +1065,7 @@ static void dma64_txinit(dma_info_t *di) return; di->txin = di->txout = 0; - di->hnddma.txavail = di->ntxd - 1; + di->dma.txavail = di->ntxd - 1; /* clear tx descriptor ring */ memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t))); @@ -1080,7 +1076,7 @@ static void dma64_txinit(dma_info_t *di) if (!di->aligndesc_4k) _dma_ddtable_init(di, DMA_TX, di->txdpa); - if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0) + if ((di->dma.dmactrlflags & DMA_CTRL_PEN) == 0) control |= D64_XC_PD; OR_REG(&di->d64txregs->control, control); @@ -1142,7 +1138,7 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range) while ((p = dma64_getnexttxp(di, range))) { /* For unframed data, we don't have any packets to free */ - if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) + if (!(di->dma.dmactrlflags & DMA_CTRL_UNFRAMED)) bcm_pkt_buf_free_skb(p); } } @@ -1316,7 +1312,7 @@ static void *dma64_getpos(dma_info_t *di, bool direction) /* TX of unframed data * * Adds a DMA ring descriptor for the data pointed to by "buf". - * This is for DMA of a buffer of data and is unlike other hnddma TX functions + * This is for DMA of a buffer of data and is unlike other dma TX functions * that take a pointer to a "packet" * Each call to this is results in a single descriptor being added for "len" bytes of * data starting at "buf", it doesn't handle chained buffers. @@ -1359,14 +1355,14 @@ static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) } /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return 0; outoftxd: DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__)); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; + di->dma.txavail = 0; + di->dma.txnobuf++; return -1; } @@ -1394,7 +1390,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, */ for (p = p0; p; p = next) { uint nsegs, j; - hnddma_seg_map_t *map; + dma_seg_map_t *map; data = p->data; len = p->len; @@ -1410,7 +1406,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, /* get physical address of buffer start */ if (DMASGLIST_ENAB) memset(&di->txp_dmah[txout], 0, - sizeof(hnddma_seg_map_t)); + sizeof(dma_seg_map_t)); pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE); @@ -1474,15 +1470,15 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, di->xmtptrbase + I2B(txout, dma64dd_t)); /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return 0; outoftxd: DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); bcm_pkt_buf_free_skb(p0); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; + di->dma.txavail = 0; + di->dma.txnobuf++; return -1; } @@ -1542,7 +1538,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) for (i = start; i != end && !txp; i = NEXTTXD(i)) { dmaaddr_t pa; - hnddma_seg_map_t *map = NULL; + dma_seg_map_t *map = NULL; uint size, j, nsegs; PHYSADDRLOSET(pa, @@ -1579,7 +1575,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) di->txin = i; /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return txp; @@ -1696,8 +1692,8 @@ static void dma64_txrotate(dma_info_t *di) /* Move the map */ if (DMASGLIST_ENAB) { memcpy(&di->txp_dmah[new], &di->txp_dmah[old], - sizeof(hnddma_seg_map_t)); - memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t)); + sizeof(dma_seg_map_t)); + memset(&di->txp_dmah[old], 0, sizeof(dma_seg_map_t)); } di->txp[old] = NULL; @@ -1706,7 +1702,7 @@ static void dma64_txrotate(dma_info_t *di) /* update txin and txout */ di->txin = ad; di->txout = TXD(di->txout + rot); - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; /* kick the chip */ W_REG(&di->d64txregs->ptr, @@ -1736,7 +1732,7 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) * engine. This function calls a caller-supplied function for each packet in * the caller specified dma chain. */ -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) +void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a) { dma_info_t *di = (dma_info_t *) dmah; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 492fb3e..e2e5653 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -2064,7 +2064,7 @@ void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) { - struct hnddma_pub *di = wlc_hw->di[fifo]; + struct dma_pub *di = wlc_hw->di[fifo]; return dma_rxreset(di); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index c63920c..026d200 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -5837,7 +5837,7 @@ void wlc_inval_dma_pkts(struct wlc_hw_info *hw, struct ieee80211_sta *sta, void (*dma_callback_fn)) { - struct hnddma_pub *dmah; + struct dma_pub *dmah; int i; for (i = 0; i < NFIFO; i++) { dmah = hw->di[i]; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 3bbb774..d4ae29b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -384,7 +384,7 @@ struct wlc_hw_info { struct wlc_info *wlc; /* fifo */ - struct hnddma_pub *di[NFIFO]; /* hnddma handles, per fifo */ + struct dma_pub *di[NFIFO]; /* dma handles, per fifo */ uint unit; /* device instance number */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index df6e04c..b8cede1 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -18,7 +18,6 @@ #define _wlc_types_h_ /* forward declarations */ - struct wlc_info; struct wlc_hw_info; struct wlc_if; @@ -26,12 +25,7 @@ struct wl_if; struct ampdu_info; struct antsel_info; struct bmac_pmq; - struct d11init; - -#ifndef _hnddma_pub_ -#define _hnddma_pub_ -struct hnddma_pub; -#endif /* _hnddma_pub_ */ +struct dma_pub; #endif /* _wlc_types_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 65005471..7613845 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -89,7 +89,7 @@ typedef unsigned long dmaaddr_t; typedef struct { dmaaddr_t addr; u32 length; -} hnddma_seg_t; +} dma_seg_t; #define MAX_DMA_SEGS 4 @@ -97,13 +97,13 @@ typedef struct { void *oshdmah; /* Opaque handle for OSL to store its information */ uint origsize; /* Size of the virtual packet */ uint nsegs; - hnddma_seg_t segs[MAX_DMA_SEGS]; -} hnddma_seg_map_t; + dma_seg_t segs[MAX_DMA_SEGS]; +} dma_seg_map_t; /* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. * There is a compile time check in wlc.c which ensure that this value is at least as big - * as TXOFF. This value is used in dma_rxfill (hnddma.c). + * as TXOFF. This value is used in dma_rxfill (dma.c). */ #define BCMEXTRAHDROOM 172 diff --git a/drivers/staging/brcm80211/include/bcmsdpcm.h b/drivers/staging/brcm80211/include/bcmsdpcm.h index 5175e67..21d6a3a 100644 --- a/drivers/staging/brcm80211/include/bcmsdpcm.h +++ b/drivers/staging/brcm80211/include/bcmsdpcm.h @@ -198,7 +198,7 @@ typedef struct { u32 assert_exp_addr; u32 assert_file_addr; u32 assert_line; - u32 console_addr; /* Address of hndrte_cons_t */ + u32 console_addr; /* Address of rte_cons_t */ u32 msgtrace_addr; u8 tag[32]; } sdpcm_shared_t; diff --git a/drivers/staging/brcm80211/include/sbdma.h b/drivers/staging/brcm80211/include/sbdma.h index 08cb7f6..1da979a 100644 --- a/drivers/staging/brcm80211/include/sbdma.h +++ b/drivers/staging/brcm80211/include/sbdma.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _sbhnddma_h_ -#define _sbhnddma_h_ +#ifndef _sbdma_h_ +#define _sbdma_h_ /* DMA structure: * support two DMA engines: 32 bits address or 64 bit addressing @@ -312,4 +312,4 @@ typedef volatile struct { u16 flags; } dma_rxh_t; -#endif /* _sbhnddma_h_ */ +#endif /* _sbdma_h_ */ -- cgit v0.10.2 From f1c7a08a5f2aafb36e136fd2d2e4782cedb3c7a6 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:09 +0200 Subject: staging: brcm80211: merged two header files into dhd_sdio.c Code cleanup. Decreasing number of header files. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 4f13fc3..6b0dd87 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -32,8 +32,104 @@ #include #ifdef DHD_DEBUG -#include -#include + +/* ARM trap handling */ + +/* Trap types defined by ARM (see arminc.h) */ + +/* Trap locations in lo memory */ +#define TRAP_STRIDE 4 +#define FIRST_TRAP TR_RST +#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) + +#if defined(__ARM_ARCH_4T__) +#define MAX_TRAP_TYPE (TR_FIQ + 1) +#elif defined(__ARM_ARCH_7M__) +#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) +#endif /* __ARM_ARCH_7M__ */ + +/* The trap structure is defined here as offsets for assembly */ +#define TR_TYPE 0x00 +#define TR_EPC 0x04 +#define TR_CPSR 0x08 +#define TR_SPSR 0x0c +#define TR_REGS 0x10 +#define TR_REG(n) (TR_REGS + (n) * 4) +#define TR_SP TR_REG(13) +#define TR_LR TR_REG(14) +#define TR_PC TR_REG(15) + +#define TRAP_T_SIZE 80 + +#ifndef _LANGUAGE_ASSEMBLY + +typedef struct _trap_struct { + u32 type; + u32 epc; + u32 cpsr; + u32 spsr; + u32 r0; + u32 r1; + u32 r2; + u32 r3; + u32 r4; + u32 r5; + u32 r6; + u32 r7; + u32 r8; + u32 r9; + u32 r10; + u32 r11; + u32 r12; + u32 r13; + u32 r14; + u32 pc; +} trap_t; + +#endif /* !_LANGUAGE_ASSEMBLY */ + +#define CBUF_LEN (128) + +#define LOG_BUF_LEN 1024 + +typedef struct { + u32 buf; /* Can't be pointer on (64-bit) hosts */ + uint buf_size; + uint idx; + char *_buf_compat; /* Redundant pointer for backward compat. */ +} rte_log_t; + +typedef struct { + /* Virtual UART + * When there is no UART (e.g. Quickturn), + * the host should write a complete + * input line directly into cbuf and then write + * the length into vcons_in. + * This may also be used when there is a real UART + * (at risk of conflicting with + * the real UART). vcons_out is currently unused. + */ + volatile uint vcons_in; + volatile uint vcons_out; + + /* Output (logging) buffer + * Console output is written to a ring buffer log_buf at index log_idx. + * The host may read the output when it sees log_idx advance. + * Output will be lost if the output wraps around faster than the host + * polls. + */ + rte_log_t log; + + /* Console input line buffer + * Characters are read one at a time into cbuf + * until is received, then + * the buffer is processed as a command line. + * Also used for virtual UART. + */ + uint cbuf_idx; + char cbuf[CBUF_LEN]; +} rte_cons_t; + #endif /* DHD_DEBUG */ #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h deleted file mode 100644 index ebb2237..0000000 --- a/drivers/staging/brcm80211/brcmfmac/rte_armtrap.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _rte_armtrap_h -#define _rte_armtrap_h - -/* ARM trap handling */ - -/* Trap types defined by ARM (see arminc.h) */ - -/* Trap locations in lo memory */ -#define TRAP_STRIDE 4 -#define FIRST_TRAP TR_RST -#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) - -#if defined(__ARM_ARCH_4T__) -#define MAX_TRAP_TYPE (TR_FIQ + 1) -#elif defined(__ARM_ARCH_7M__) -#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) -#endif /* __ARM_ARCH_7M__ */ - -/* The trap structure is defined here as offsets for assembly */ -#define TR_TYPE 0x00 -#define TR_EPC 0x04 -#define TR_CPSR 0x08 -#define TR_SPSR 0x0c -#define TR_REGS 0x10 -#define TR_REG(n) (TR_REGS + (n) * 4) -#define TR_SP TR_REG(13) -#define TR_LR TR_REG(14) -#define TR_PC TR_REG(15) - -#define TRAP_T_SIZE 80 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef struct _trap_struct { - u32 type; - u32 epc; - u32 cpsr; - u32 spsr; - u32 r0; - u32 r1; - u32 r2; - u32 r3; - u32 r4; - u32 r5; - u32 r6; - u32 r7; - u32 r8; - u32 r9; - u32 r10; - u32 r11; - u32 r12; - u32 r13; - u32 r14; - u32 pc; -} trap_t; - -#endif /* !_LANGUAGE_ASSEMBLY */ - -#endif /* _rte_armtrap_h */ diff --git a/drivers/staging/brcm80211/brcmfmac/rte_cons.h b/drivers/staging/brcm80211/brcmfmac/rte_cons.h deleted file mode 100644 index 7977e08..0000000 --- a/drivers/staging/brcm80211/brcmfmac/rte_cons.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _rte_cons_h -#define _rte_cons_h - -#define CBUF_LEN (128) - -#define LOG_BUF_LEN 1024 - -typedef struct { - u32 buf; /* Can't be pointer on (64-bit) hosts */ - uint buf_size; - uint idx; - char *_buf_compat; /* Redundant pointer for backward compat. */ -} rte_log_t; - -typedef struct { - /* Virtual UART - * When there is no UART (e.g. Quickturn), - * the host should write a complete - * input line directly into cbuf and then write - * the length into vcons_in. - * This may also be used when there is a real UART - * (at risk of conflicting with - * the real UART). vcons_out is currently unused. - */ - volatile uint vcons_in; - volatile uint vcons_out; - - /* Output (logging) buffer - * Console output is written to a ring buffer log_buf at index log_idx. - * The host may read the output when it sees log_idx advance. - * Output will be lost if the output wraps around faster than the host - * polls. - */ - rte_log_t log; - - /* Console input line buffer - * Characters are read one at a time into cbuf - * until is received, then - * the buffer is processed as a command line. - * Also used for virtual UART. - */ - uint cbuf_idx; - char cbuf[CBUF_LEN]; -} rte_cons_t; - -#endif /* _rte_cons_h */ -- cgit v0.10.2 From 78539a2147c2cfbb6a0bb091c13c88c1ac4f8ef8 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:10 +0200 Subject: staging: brcm80211: removed unused stuff from proto/802.11.h Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 6b0dd87..383e66a 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -139,8 +139,6 @@ typedef struct { #include #include -#include - #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index cb434e5..e022224 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -1771,4 +1771,21 @@ typedef struct macstat { #define SHM_BYT_CNT 0x2 /* IHR location */ #define MAX_BYT_CNT 0x600 /* Maximum frame len */ +typedef struct d11cnt { + u32 txfrag; + u32 txmulti; + u32 txfail; + u32 txretry; + u32 txretrie; + u32 rxdup; + u32 txrts; + u32 txnocts; + u32 txnoack; + u32 rxfrag; + u32 rxmulti; + u32 rxcrc; + u32 txfrmsnt; + u32 rxundec; +} d11cnt_t; + #endif /* _D11_H */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index f58272a..3d9f791 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -25,8 +25,6 @@ #include #include #include - -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index e2e5653..128c27b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -21,7 +21,6 @@ #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index 3a80706..c6f9694 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -25,7 +25,6 @@ #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index 4b84cc1..53dcf24 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index cd051d9..a08db2e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -17,8 +17,6 @@ #include #include -#include - #include #include #include diff --git a/drivers/staging/brcm80211/include/proto/802.11.h b/drivers/staging/brcm80211/include/proto/802.11.h index 374125d..2f32b6c 100644 --- a/drivers/staging/brcm80211/include/proto/802.11.h +++ b/drivers/staging/brcm80211/include/proto/802.11.h @@ -17,53 +17,23 @@ #ifndef _802_11_H_ #define _802_11_H_ -#include - -#define DOT11_A3_HDR_LEN 24 -#define DOT11_A4_HDR_LEN 30 -#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN -#define DOT11_ICV_AES_LEN 8 -#define DOT11_QOS_LEN 2 - -#define DOT11_IV_MAX_LEN 8 - +#define MCSSET_LEN 16 +#define DOT11_BSSTYPE_ANY 2 +#define DOT11_MAX_DEFAULT_KEYS 4 +#define WPA_OUI "\x00\x50\xF2" +#define BRCM_OUI "\x00\x10\x18" +#define DOT11_MNG_RSN_ID 48 +#define DOT11_MNG_WPA_ID 221 #define DOT11_DEFAULT_RTS_LEN 2347 - -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_MAX_FRAG_LEN 2346 #define DOT11_DEFAULT_FRAG_LEN 2346 - -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF - -#define DOT11_MIN_DTIM_PERIOD 1 -#define DOT11_MAX_DTIM_PERIOD 0xFF - #define DOT11_OUI_LEN 3 -#define DOT11_RTS_LEN 16 -#define DOT11_CTS_LEN 10 -#define DOT11_ACK_LEN 10 - -#define DOT11_BA_BITMAP_LEN 128 -#define DOT11_BA_LEN 4 - -#define WME_OUI "\x00\x50\xf2" -#define WME_VER 1 -#define WME_TYPE 2 -#define WME_SUBTYPE_PARAM_IE 1 - -#define AC_BE 0 -#define AC_BK 1 -#define AC_VI 2 -#define AC_VO 3 #define AC_COUNT 4 -typedef u8 ac_bitmap_t; - -#define AC_BITMAP_ALL 0xf #define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) +typedef u8 ac_bitmap_t; + struct edcf_acparam { u8 ACI; u8 ECW; @@ -81,120 +51,90 @@ struct wme_param_ie { edcf_acparam_t acparam[AC_COUNT]; } __attribute__((packed)); typedef struct wme_param_ie wme_param_ie_t; -#define WME_PARAM_IE_LEN 24 - -#define EDCF_AIFSN_MIN 1 -#define EDCF_AIFSN_MAX 15 -#define EDCF_AIFSN_MASK 0x0f -#define EDCF_ACM_MASK 0x10 -#define EDCF_ACI_MASK 0x60 -#define EDCF_ACI_SHIFT 5 - -#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) -#define EDCF_ECWMIN_MASK 0x0f -#define EDCF_ECWMAX_MASK 0xf0 -#define EDCF_ECWMAX_SHIFT 4 - -#define EDCF_TXOP2USEC(txop) ((txop) << 5) - -#define EDCF_AC_BE_ACI_STA 0x03 -#define EDCF_AC_BE_ECW_STA 0xA4 -#define EDCF_AC_BE_TXOP_STA 0x0000 -#define EDCF_AC_BK_ACI_STA 0x27 -#define EDCF_AC_BK_ECW_STA 0xA4 -#define EDCF_AC_BK_TXOP_STA 0x0000 -#define EDCF_AC_VI_ACI_STA 0x42 -#define EDCF_AC_VI_ECW_STA 0x43 -#define EDCF_AC_VI_TXOP_STA 0x005e -#define EDCF_AC_VO_ACI_STA 0x62 -#define EDCF_AC_VO_ECW_STA 0x32 -#define EDCF_AC_VO_TXOP_STA 0x002f -#define EDCF_AC_VO_TXOP_AP 0x002f +#define DOT11_MAC_HDR_LEN 24 +#define DOT11_ACK_LEN 10 +#define DOT11_ICV_AES_LEN 8 +#define DOT11_A4_HDR_LEN 30 +#define DOT11_QOS_LEN 2 +#define DOT11_IV_MAX_LEN 8 +#define DOT11_BA_LEN 4 +#define DOT11_OFDM_SIGNAL_EXTENSION 6 +#define DOT11_MIN_FRAG_LEN 256 +#define DOT11_RTS_LEN 16 +#define DOT11_CTS_LEN 10 +#define DOT11_BA_BITMAP_LEN 128 +#define DOT11_MIN_BEACON_PERIOD 1 +#define DOT11_MAX_BEACON_PERIOD 0xFFFF +#define DOT11_MAXNUMFRAGS 16 +#define DOT11_MAX_FRAG_LEN 2346 #define SEQNUM_SHIFT 4 +#define AMPDU_DELIMITER_LEN 4 #define SEQNUM_MAX 0x1000 -#define FRAGNUM_MASK 0xF - -#define DOT11_MNG_RSN_ID 48 -#define DOT11_MNG_WPA_ID 221 -#define DOT11_MNG_VS_ID 221 - -#define DOT11_BSSTYPE_INFRASTRUCTURE 0 -#define DOT11_BSSTYPE_ANY 2 -#define DOT11_SCANTYPE_ACTIVE 0 -#define PREN_PREAMBLE 24 -#define PREN_MM_EXT 12 -#define PREN_PREAMBLE_EXT 4 +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 +#define APHY_CWMIN 15 +#define PHY_CWMAX 1023 -#define RIFS_11N_TIME 2 +#define EDCF_AIFSN_MIN 1 +#define BPHY_PLCP_TIME 192 -#define APHY_SLOT_TIME 9 -#define APHY_SIFS_TIME 16 +#define APHY_SYMBOL_TIME 4 #define APHY_PREAMBLE_TIME 16 #define APHY_SIGNAL_TIME 4 -#define APHY_SYMBOL_TIME 4 +#define APHY_SIFS_TIME 16 #define APHY_SERVICE_NBITS 16 #define APHY_TAIL_NBITS 6 -#define APHY_CWMIN 15 - -#define BPHY_SLOT_TIME 20 #define BPHY_SIFS_TIME 10 -#define BPHY_PLCP_TIME 192 #define BPHY_PLCP_SHORT_TIME 96 -#define DOT11_OFDM_SIGNAL_EXTENSION 6 - -#define PHY_CWMAX 1023 - -#define DOT11_MAXNUMFRAGS 16 - -typedef struct d11cnt { - u32 txfrag; - u32 txmulti; - u32 txfail; - u32 txretry; - u32 txretrie; - u32 rxdup; - u32 txrts; - u32 txnocts; - u32 txnoack; - u32 rxfrag; - u32 rxmulti; - u32 rxcrc; - u32 txfrmsnt; - u32 rxundec; -} d11cnt_t; +#define PREN_PREAMBLE 24 +#define PREN_MM_EXT 12 +#define PREN_PREAMBLE_EXT 4 -#define MCSSET_LEN 16 +#define FRAGNUM_MASK 0xF -#define HT_CAP_IE_LEN 26 +#define RIFS_11N_TIME 2 #define HT_CAP_RX_STBC_NO 0x0 -#define HT_CAP_RX_STBC_ONE_STREAM 0x1 - -#define AMPDU_MAX_MPDU_DENSITY IEEE80211_HT_MPDU_DENSITY_16 - -#define AMPDU_DELIMITER_LEN 4 -#define DOT11N_TXBURST 0x0008 - -#define WPA_VERSION 1 -#define WPA_OUI "\x00\x50\xF2" +#define EDCF_ACI_MASK 0x60 +#define EDCF_ACI_SHIFT 5 +#define EDCF_ECWMIN_MASK 0x0f +#define EDCF_ECWMAX_SHIFT 4 +#define EDCF_AIFSN_MASK 0x0f +#define EDCF_AIFSN_MAX 15 +#define EDCF_ECWMAX_MASK 0xf0 -#define WFA_OUI "\x00\x50\xF2" -#define WFA_OUI_LEN 3 +#define EDCF_AC_BE_TXOP_STA 0x0000 +#define EDCF_AC_BK_TXOP_STA 0x0000 +#define EDCF_AC_VO_ACI_STA 0x62 +#define EDCF_AC_VO_ECW_STA 0x32 +#define EDCF_AC_VI_ACI_STA 0x42 +#define EDCF_AC_VI_ECW_STA 0x43 +#define EDCF_AC_BK_ECW_STA 0xA4 +#define EDCF_AC_VI_TXOP_STA 0x005e +#define EDCF_AC_VO_TXOP_STA 0x002f +#define EDCF_AC_BE_ACI_STA 0x03 +#define EDCF_AC_BE_ECW_STA 0xA4 +#define EDCF_AC_BK_ACI_STA 0x27 +#define EDCF_AC_VO_TXOP_AP 0x002f -#define WFA_OUI_TYPE_WPA 1 +#define EDCF_TXOP2USEC(txop) ((txop) << 5) +#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) -#define RSN_AKM_NONE 0 -#define RSN_AKM_UNSPECIFIED 1 -#define RSN_AKM_PSK 2 +#define WME_VER 1 +#define WME_SUBTYPE_PARAM_IE 1 +#define WME_TYPE 2 +#define WME_OUI "\x00\x50\xf2" -#define DOT11_MAX_DEFAULT_KEYS 4 -#define DOT11_WPA_KEY_RSC_LEN 8 +#define AC_BE 0 +#define AC_BK 1 +#define AC_VI 2 +#define AC_VO 3 -#define BRCM_OUI "\x00\x10\x18" +#define HT_CAP_RX_STBC_ONE_STREAM 0x1 #endif /* _802_11_H_ */ diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c index 43e5bb3..b78ce54 100644 --- a/drivers/staging/brcm80211/util/bcmutils.c +++ b/drivers/staging/brcm80211/util/bcmutils.c @@ -27,7 +27,6 @@ #include #include #include -#include MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); -- cgit v0.10.2 From 9152bf26bc37b0865c2a0769276b9c07fc4e1f7f Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:11 +0200 Subject: staging: brcm80211: emptied include/802.11.h Code cleanup. Removed unused definitions. Moved other definitions to less generic locations. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index 6156062..9583f57 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -188,6 +188,9 @@ struct dhd_info; #define DHD_DEL_IF -0xe #define DHD_BAD_IF -0xf +#define DOT11_BSSTYPE_ANY 2 +#define DOT11_MAX_DEFAULT_KEYS 4 + enum cust_gpio_modes { WLAN_RESET_ON, WLAN_RESET_OFF, diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 5aa5ee4..b7f4e63 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -25,6 +25,9 @@ #include #include +#define BRCM_OUI "\x00\x10\x18" +#define DOT11_OUI_LEN 3 + int dhd_msg_level; char fw_path[MOD_PARAM_PATHLEN]; char nv_path[MOD_PARAM_PATHLEN]; diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index b5cb897..2cc9bc7 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -32,6 +32,10 @@ typedef const struct si_pub si_t; #include #include +#define WPA_OUI "\x00\x50\xF2" +#define DOT11_MNG_RSN_ID 48 +#define DOT11_MNG_WPA_ID 221 + #define WL_ERROR(fmt, args...) printk(fmt, ##args) #define WL_TRACE(fmt, args...) no_printk(fmt, ##args) #define WL_INFORM(fmt, args...) no_printk(fmt, ##args) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 128c27b..ab4ef6c 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -75,6 +75,9 @@ (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 + /* * The following table lists the buffer memory allocated to xmt fifos in HW. * the size is in units of 256bytes(one block), total size is HW dependent diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 026d200..c50f335 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -114,6 +114,70 @@ #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 #define WLFEATURE_DISABLE_11N_GF 0x00000080 +#define EDCF_ACI_MASK 0x60 +#define EDCF_ACI_SHIFT 5 +#define EDCF_ECWMIN_MASK 0x0f +#define EDCF_ECWMAX_SHIFT 4 +#define EDCF_AIFSN_MASK 0x0f +#define EDCF_AIFSN_MAX 15 +#define EDCF_ECWMAX_MASK 0xf0 + +#define EDCF_AC_BE_TXOP_STA 0x0000 +#define EDCF_AC_BK_TXOP_STA 0x0000 +#define EDCF_AC_VO_ACI_STA 0x62 +#define EDCF_AC_VO_ECW_STA 0x32 +#define EDCF_AC_VI_ACI_STA 0x42 +#define EDCF_AC_VI_ECW_STA 0x43 +#define EDCF_AC_BK_ECW_STA 0xA4 +#define EDCF_AC_VI_TXOP_STA 0x005e +#define EDCF_AC_VO_TXOP_STA 0x002f +#define EDCF_AC_BE_ACI_STA 0x03 +#define EDCF_AC_BE_ECW_STA 0xA4 +#define EDCF_AC_BK_ACI_STA 0x27 +#define EDCF_AC_VO_TXOP_AP 0x002f + +#define EDCF_TXOP2USEC(txop) ((txop) << 5) +#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) + +#define APHY_SYMBOL_TIME 4 +#define APHY_PREAMBLE_TIME 16 +#define APHY_SIGNAL_TIME 4 +#define APHY_SIFS_TIME 16 +#define APHY_SERVICE_NBITS 16 +#define APHY_TAIL_NBITS 6 +#define BPHY_SIFS_TIME 10 +#define BPHY_PLCP_SHORT_TIME 96 + +#define PREN_PREAMBLE 24 +#define PREN_MM_EXT 12 +#define PREN_PREAMBLE_EXT 4 + +#define DOT11_MAC_HDR_LEN 24 +#define DOT11_ACK_LEN 10 +#define DOT11_BA_LEN 4 +#define DOT11_OFDM_SIGNAL_EXTENSION 6 +#define DOT11_MIN_FRAG_LEN 256 +#define DOT11_RTS_LEN 16 +#define DOT11_CTS_LEN 10 +#define DOT11_BA_BITMAP_LEN 128 +#define DOT11_MIN_BEACON_PERIOD 1 +#define DOT11_MAX_BEACON_PERIOD 0xFFFF +#define DOT11_MAXNUMFRAGS 16 +#define DOT11_MAX_FRAG_LEN 2346 + +#define BPHY_PLCP_TIME 192 +#define RIFS_11N_TIME 2 + +#define WME_VER 1 +#define WME_SUBTYPE_PARAM_IE 1 +#define WME_TYPE 2 +#define WME_OUI "\x00\x50\xf2" + +#define AC_BE 0 +#define AC_BK 1 +#define AC_VI 2 +#define AC_VO 3 + /* * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft * watchdog) it is not a wall clock and won't increment when driver is in "down" state diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index d4ae29b..d066339 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -23,6 +23,16 @@ #define MAXCOREREV 28 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ #define WLC_MAXMODULES 22 /* max # wlc_module_register() calls */ +#define SEQNUM_SHIFT 4 +#define AMPDU_DELIMITER_LEN 4 +#define SEQNUM_MAX 0x1000 + +#define APHY_CWMIN 15 +#define PHY_CWMAX 1023 + +#define EDCF_AIFSN_MIN 1 +#define FRAGNUM_MASK 0xF + #define WLC_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) /* Maximum wait time for a MAC suspend */ @@ -35,6 +45,8 @@ /* transmit buffer max headroom for protocol headers */ #define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN) +#define AC_COUNT 4 + /* For managing scan result lists */ struct wlc_bss_list { uint count; @@ -342,6 +354,24 @@ struct dumpcb_s { struct dumpcb_s *next; }; +struct edcf_acparam { + u8 ACI; + u8 ECW; + u16 TXOP; +} __attribute__((packed)); +typedef struct edcf_acparam edcf_acparam_t; + +struct wme_param_ie { + u8 oui[3]; + u8 type; + u8 subtype; + u8 version; + u8 qosinfo; + u8 rsvd; + edcf_acparam_t acparam[AC_COUNT]; +} __attribute__((packed)); +typedef struct wme_param_ie wme_param_ie_t; + /* virtual interface */ struct wlc_if { struct wlc_if *next; diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/bcmwifi.h index f0dc6f8..60f404c 100644 --- a/drivers/staging/brcm80211/include/bcmwifi.h +++ b/drivers/staging/brcm80211/include/bcmwifi.h @@ -131,6 +131,10 @@ typedef u16 chanspec_t; #define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ +#define MCSSET_LEN 16 + +#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) + /* * Verify the chanspec is using a legal set of parameters, i.e. that the * chanspec specified a band, bw, ctl_sb and channel and that the @@ -202,6 +206,17 @@ extern int bcm_mhz2channel(uint freq, uint start_factor); /* pmkid */ #define MAXPMKID 16 +#define DOT11_DEFAULT_RTS_LEN 2347 +#define DOT11_DEFAULT_FRAG_LEN 2346 + +#define DOT11_ICV_AES_LEN 8 +#define DOT11_QOS_LEN 2 +#define DOT11_IV_MAX_LEN 8 +#define DOT11_A4_HDR_LEN 30 + +#define HT_CAP_RX_STBC_NO 0x0 +#define HT_CAP_RX_STBC_ONE_STREAM 0x1 + typedef struct _pmkid { u8 BSSID[ETH_ALEN]; u8 PMKID[WLAN_PMKID_LEN]; @@ -222,4 +237,6 @@ typedef struct _pmkid_cand_list { pmkid_cand_t pmkid_cand[1]; } pmkid_cand_list_t; +typedef u8 ac_bitmap_t; + #endif /* _bcmwifi_h_ */ diff --git a/drivers/staging/brcm80211/include/proto/802.11.h b/drivers/staging/brcm80211/include/proto/802.11.h index 2f32b6c..048dae5 100644 --- a/drivers/staging/brcm80211/include/proto/802.11.h +++ b/drivers/staging/brcm80211/include/proto/802.11.h @@ -17,124 +17,4 @@ #ifndef _802_11_H_ #define _802_11_H_ -#define MCSSET_LEN 16 -#define DOT11_BSSTYPE_ANY 2 -#define DOT11_MAX_DEFAULT_KEYS 4 -#define WPA_OUI "\x00\x50\xF2" -#define BRCM_OUI "\x00\x10\x18" -#define DOT11_MNG_RSN_ID 48 -#define DOT11_MNG_WPA_ID 221 -#define DOT11_DEFAULT_RTS_LEN 2347 -#define DOT11_DEFAULT_FRAG_LEN 2346 -#define DOT11_OUI_LEN 3 - -#define AC_COUNT 4 - -#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) - -typedef u8 ac_bitmap_t; - -struct edcf_acparam { - u8 ACI; - u8 ECW; - u16 TXOP; -} __attribute__((packed)); -typedef struct edcf_acparam edcf_acparam_t; - -struct wme_param_ie { - u8 oui[3]; - u8 type; - u8 subtype; - u8 version; - u8 qosinfo; - u8 rsvd; - edcf_acparam_t acparam[AC_COUNT]; -} __attribute__((packed)); -typedef struct wme_param_ie wme_param_ie_t; - -#define DOT11_MAC_HDR_LEN 24 -#define DOT11_ACK_LEN 10 -#define DOT11_ICV_AES_LEN 8 -#define DOT11_A4_HDR_LEN 30 -#define DOT11_QOS_LEN 2 -#define DOT11_IV_MAX_LEN 8 -#define DOT11_BA_LEN 4 -#define DOT11_OFDM_SIGNAL_EXTENSION 6 -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_RTS_LEN 16 -#define DOT11_CTS_LEN 10 -#define DOT11_BA_BITMAP_LEN 128 -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF -#define DOT11_MAXNUMFRAGS 16 -#define DOT11_MAX_FRAG_LEN 2346 - -#define SEQNUM_SHIFT 4 -#define AMPDU_DELIMITER_LEN 4 -#define SEQNUM_MAX 0x1000 - -#define APHY_SLOT_TIME 9 -#define BPHY_SLOT_TIME 20 -#define APHY_CWMIN 15 -#define PHY_CWMAX 1023 - -#define EDCF_AIFSN_MIN 1 -#define BPHY_PLCP_TIME 192 - -#define APHY_SYMBOL_TIME 4 -#define APHY_PREAMBLE_TIME 16 -#define APHY_SIGNAL_TIME 4 -#define APHY_SIFS_TIME 16 -#define APHY_SERVICE_NBITS 16 -#define APHY_TAIL_NBITS 6 -#define BPHY_SIFS_TIME 10 -#define BPHY_PLCP_SHORT_TIME 96 - -#define PREN_PREAMBLE 24 -#define PREN_MM_EXT 12 -#define PREN_PREAMBLE_EXT 4 - -#define FRAGNUM_MASK 0xF - -#define RIFS_11N_TIME 2 - -#define HT_CAP_RX_STBC_NO 0x0 - -#define EDCF_ACI_MASK 0x60 -#define EDCF_ACI_SHIFT 5 -#define EDCF_ECWMIN_MASK 0x0f -#define EDCF_ECWMAX_SHIFT 4 -#define EDCF_AIFSN_MASK 0x0f -#define EDCF_AIFSN_MAX 15 -#define EDCF_ECWMAX_MASK 0xf0 - -#define EDCF_AC_BE_TXOP_STA 0x0000 -#define EDCF_AC_BK_TXOP_STA 0x0000 -#define EDCF_AC_VO_ACI_STA 0x62 -#define EDCF_AC_VO_ECW_STA 0x32 -#define EDCF_AC_VI_ACI_STA 0x42 -#define EDCF_AC_VI_ECW_STA 0x43 -#define EDCF_AC_BK_ECW_STA 0xA4 -#define EDCF_AC_VI_TXOP_STA 0x005e -#define EDCF_AC_VO_TXOP_STA 0x002f -#define EDCF_AC_BE_ACI_STA 0x03 -#define EDCF_AC_BE_ECW_STA 0xA4 -#define EDCF_AC_BK_ACI_STA 0x27 -#define EDCF_AC_VO_TXOP_AP 0x002f - -#define EDCF_TXOP2USEC(txop) ((txop) << 5) -#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) - -#define WME_VER 1 -#define WME_SUBTYPE_PARAM_IE 1 -#define WME_TYPE 2 -#define WME_OUI "\x00\x50\xf2" - -#define AC_BE 0 -#define AC_BK 1 -#define AC_VI 2 -#define AC_VO 3 - -#define HT_CAP_RX_STBC_ONE_STREAM 0x1 - #endif /* _802_11_H_ */ -- cgit v0.10.2 From 5ca06e06321b7e3a521a334cdc41291a8f417c75 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:12 +0200 Subject: staging: brcm80211: removed 802.11.h Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index 9583f57..eca6732 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -37,7 +37,6 @@ #include "bcmdefs.h" /* The kernel threading is sdio-specific */ #include "bcmwifi.h" -#include "proto/802.11.h" #include "proto/bcmeth.h" #include "proto/bcmevent.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 2bbf995..bd0885e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -17,7 +17,6 @@ #ifndef _wlc_pub_h_ #define _wlc_pub_h_ -#include "proto/802.11.h" /* for MCSSET_LEN */ #include "bcmwifi.h" /* for chanspec_t */ #define WLC_NUMRATES 16 /* max # of rates in a rateset */ diff --git a/drivers/staging/brcm80211/include/proto/802.11.h b/drivers/staging/brcm80211/include/proto/802.11.h deleted file mode 100644 index 048dae5..0000000 --- a/drivers/staging/brcm80211/include/proto/802.11.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _802_11_H_ -#define _802_11_H_ - -#endif /* _802_11_H_ */ -- cgit v0.10.2 From a019382eec8e61584d97e11747e284aa2c2cb567 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:13 +0200 Subject: staging: brcm80211: cleaned bcmeth.h and bcmevent.h Code cleanup. Deleted unused definitions and moved others into less generic files. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index eca6732..081cda0 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -37,8 +37,6 @@ #include "bcmdefs.h" /* The kernel threading is sdio-specific */ #include "bcmwifi.h" -#include "proto/bcmeth.h" -#include "proto/bcmevent.h" /* Forward decls */ struct dhd_bus; @@ -190,6 +188,191 @@ struct dhd_info; #define DOT11_BSSTYPE_ANY 2 #define DOT11_MAX_DEFAULT_KEYS 4 +#define BCM_EVENT_MSG_VERSION 1 +#define BCM_MSG_IFNAME_MAX 16 + +#define WLC_EVENT_MSG_LINK 0x01 +#define WLC_EVENT_MSG_FLUSHTXQ 0x02 +#define WLC_EVENT_MSG_GROUP 0x04 + +typedef struct { + u16 version; + u16 flags; + u32 event_type; + u32 status; + u32 reason; + u32 auth_type; + u32 datalen; + u8 addr[ETH_ALEN]; + char ifname[BCM_MSG_IFNAME_MAX]; +} __attribute__((packed)) wl_event_msg_t; + +typedef struct bcmeth_hdr { + u16 subtype; + u16 length; + u8 version; + u8 oui[3]; + u16 usr_subtype; +} __attribute__((packed)) bcmeth_hdr_t; + +#ifdef BRCM_FULLMAC +typedef struct bcm_event { + struct ethhdr eth; + bcmeth_hdr_t bcm_hdr; + wl_event_msg_t event; +} __attribute__((packed)) bcm_event_t; +#endif +#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - \ + sizeof(struct ether_header)) + +#define WLC_E_SET_SSID 0 +#define WLC_E_JOIN 1 +#define WLC_E_START 2 +#define WLC_E_AUTH 3 +#define WLC_E_AUTH_IND 4 +#define WLC_E_DEAUTH 5 +#define WLC_E_DEAUTH_IND 6 +#define WLC_E_ASSOC 7 +#define WLC_E_ASSOC_IND 8 +#define WLC_E_REASSOC 9 +#define WLC_E_REASSOC_IND 10 +#define WLC_E_DISASSOC 11 +#define WLC_E_DISASSOC_IND 12 +#define WLC_E_QUIET_START 13 +#define WLC_E_QUIET_END 14 +#define WLC_E_BEACON_RX 15 +#define WLC_E_LINK 16 +#define WLC_E_MIC_ERROR 17 +#define WLC_E_NDIS_LINK 18 +#define WLC_E_ROAM 19 +#define WLC_E_TXFAIL 20 +#define WLC_E_PMKID_CACHE 21 +#define WLC_E_RETROGRADE_TSF 22 +#define WLC_E_PRUNE 23 +#define WLC_E_AUTOAUTH 24 +#define WLC_E_EAPOL_MSG 25 +#define WLC_E_SCAN_COMPLETE 26 +#define WLC_E_ADDTS_IND 27 +#define WLC_E_DELTS_IND 28 +#define WLC_E_BCNSENT_IND 29 +#define WLC_E_BCNRX_MSG 30 +#define WLC_E_BCNLOST_MSG 31 +#define WLC_E_ROAM_PREP 32 +#define WLC_E_PFN_NET_FOUND 33 +#define WLC_E_PFN_NET_LOST 34 +#define WLC_E_RESET_COMPLETE 35 +#define WLC_E_JOIN_START 36 +#define WLC_E_ROAM_START 37 +#define WLC_E_ASSOC_START 38 +#define WLC_E_IBSS_ASSOC 39 +#define WLC_E_RADIO 40 +#define WLC_E_PSM_WATCHDOG 41 +#define WLC_E_PROBREQ_MSG 44 +#define WLC_E_SCAN_CONFIRM_IND 45 +#define WLC_E_PSK_SUP 46 +#define WLC_E_COUNTRY_CODE_CHANGED 47 +#define WLC_E_EXCEEDED_MEDIUM_TIME 48 +#define WLC_E_ICV_ERROR 49 +#define WLC_E_UNICAST_DECODE_ERROR 50 +#define WLC_E_MULTICAST_DECODE_ERROR 51 +#define WLC_E_TRACE 52 +#define WLC_E_IF 54 +#define WLC_E_RSSI 56 +#define WLC_E_PFN_SCAN_COMPLETE 57 +#define WLC_E_EXTLOG_MSG 58 +#define WLC_E_ACTION_FRAME 59 +#define WLC_E_ACTION_FRAME_COMPLETE 60 +#define WLC_E_PRE_ASSOC_IND 61 +#define WLC_E_PRE_REASSOC_IND 62 +#define WLC_E_CHANNEL_ADOPTED 63 +#define WLC_E_AP_STARTED 64 +#define WLC_E_DFS_AP_STOP 65 +#define WLC_E_DFS_AP_RESUME 66 +#define WLC_E_RESERVED1 67 +#define WLC_E_RESERVED2 68 +#define WLC_E_ESCAN_RESULT 69 +#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 +#define WLC_E_DCS_REQUEST 73 + +#define WLC_E_FIFO_CREDIT_MAP 74 + +#define WLC_E_LAST 75 + +#define WLC_E_STATUS_SUCCESS 0 +#define WLC_E_STATUS_FAIL 1 +#define WLC_E_STATUS_TIMEOUT 2 +#define WLC_E_STATUS_NO_NETWORKS 3 +#define WLC_E_STATUS_ABORT 4 +#define WLC_E_STATUS_NO_ACK 5 +#define WLC_E_STATUS_UNSOLICITED 6 +#define WLC_E_STATUS_ATTEMPT 7 +#define WLC_E_STATUS_PARTIAL 8 +#define WLC_E_STATUS_NEWSCAN 9 +#define WLC_E_STATUS_NEWASSOC 10 +#define WLC_E_STATUS_11HQUIET 11 +#define WLC_E_STATUS_SUPPRESS 12 +#define WLC_E_STATUS_NOCHANS 13 +#define WLC_E_STATUS_CS_ABORT 15 +#define WLC_E_STATUS_ERROR 16 + +#define WLC_E_REASON_INITIAL_ASSOC 0 +#define WLC_E_REASON_LOW_RSSI 1 +#define WLC_E_REASON_DEAUTH 2 +#define WLC_E_REASON_DISASSOC 3 +#define WLC_E_REASON_BCNS_LOST 4 +#define WLC_E_REASON_MINTXRATE 9 +#define WLC_E_REASON_TXFAIL 10 + +#define WLC_E_REASON_FAST_ROAM_FAILED 5 +#define WLC_E_REASON_DIRECTED_ROAM 6 +#define WLC_E_REASON_TSPEC_REJECTED 7 +#define WLC_E_REASON_BETTER_AP 8 + +#define WLC_E_PRUNE_ENCR_MISMATCH 1 +#define WLC_E_PRUNE_BCAST_BSSID 2 +#define WLC_E_PRUNE_MAC_DENY 3 +#define WLC_E_PRUNE_MAC_NA 4 +#define WLC_E_PRUNE_REG_PASSV 5 +#define WLC_E_PRUNE_SPCT_MGMT 6 +#define WLC_E_PRUNE_RADAR 7 +#define WLC_E_RSN_MISMATCH 8 +#define WLC_E_PRUNE_NO_COMMON_RATES 9 +#define WLC_E_PRUNE_BASIC_RATES 10 +#define WLC_E_PRUNE_CIPHER_NA 12 +#define WLC_E_PRUNE_KNOWN_STA 13 +#define WLC_E_PRUNE_WDS_PEER 15 +#define WLC_E_PRUNE_QBSS_LOAD 16 +#define WLC_E_PRUNE_HOME_AP 17 + +#define WLC_E_SUP_OTHER 0 +#define WLC_E_SUP_DECRYPT_KEY_DATA 1 +#define WLC_E_SUP_BAD_UCAST_WEP128 2 +#define WLC_E_SUP_BAD_UCAST_WEP40 3 +#define WLC_E_SUP_UNSUP_KEY_LEN 4 +#define WLC_E_SUP_PW_KEY_CIPHER 5 +#define WLC_E_SUP_MSG3_TOO_MANY_IE 6 +#define WLC_E_SUP_MSG3_IE_MISMATCH 7 +#define WLC_E_SUP_NO_INSTALL_FLAG 8 +#define WLC_E_SUP_MSG3_NO_GTK 9 +#define WLC_E_SUP_GRP_KEY_CIPHER 10 +#define WLC_E_SUP_GRP_MSG1_NO_GTK 11 +#define WLC_E_SUP_GTK_DECRYPT_FAIL 12 +#define WLC_E_SUP_SEND_FAIL 13 +#define WLC_E_SUP_DEAUTH 14 + +#define WLC_E_IF_ADD 1 +#define WLC_E_IF_DEL 2 +#define WLC_E_IF_CHANGE 3 + +#define WLC_E_IF_ROLE_STA 0 +#define WLC_E_IF_ROLE_AP 1 +#define WLC_E_IF_ROLE_WDS 2 + +#define WLC_E_LINK_BCN_LOSS 1 +#define WLC_E_LINK_DISASSOC 2 +#define WLC_E_LINK_ASSOC_REC 3 +#define WLC_E_LINK_BSSCFG_DIS 4 + enum cust_gpio_modes { WLAN_RESET_ON, WLAN_RESET_OFF, @@ -600,6 +783,11 @@ typedef struct { u32 tick; /* O/S tick time (usec) */ } dhd_timeout_t; +typedef struct { + uint event; + const char *name; +} bcmevent_name_t; + #if defined(CONFIG_PM_SLEEP) extern atomic_t dhd_mmc_suspend; #define DHD_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); @@ -708,6 +896,9 @@ extern char fw_path[MOD_PARAM_PATHLEN]; extern char nv_path[MOD_PARAM_PATHLEN]; extern u32 g_assert_type; +extern const bcmevent_name_t bcmevent_names[]; +extern const int bcmevent_names_size; + static inline void MUTEX_LOCK_INIT(dhd_pub_t *dhdp) { diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index b7f4e63..85d87db 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -27,6 +27,7 @@ #define BRCM_OUI "\x00\x10\x18" #define DOT11_OUI_LEN 3 +#define BCMILCP_BCM_SUBTYPE_EVENT 1 int dhd_msg_level; char fw_path[MOD_PARAM_PATHLEN]; diff --git a/drivers/staging/brcm80211/include/proto/bcmeth.h b/drivers/staging/brcm80211/include/proto/bcmeth.h index e98ee65..0053984 100644 --- a/drivers/staging/brcm80211/include/proto/bcmeth.h +++ b/drivers/staging/brcm80211/include/proto/bcmeth.h @@ -17,28 +17,4 @@ #ifndef _BCMETH_H_ #define _BCMETH_H_ -#define BCMILCP_SUBTYPE_RATE 1 -#define BCMILCP_SUBTYPE_LINK 2 -#define BCMILCP_SUBTYPE_CSA 3 -#define BCMILCP_SUBTYPE_LARQ 4 -#define BCMILCP_SUBTYPE_VENDOR 5 -#define BCMILCP_SUBTYPE_FLH 17 -#define BCMILCP_SUBTYPE_VENDOR_LONG 32769 -#define BCMILCP_SUBTYPE_CERT 32770 -#define BCMILCP_SUBTYPE_SES 32771 -#define BCMILCP_BCM_SUBTYPE_RESERVED 0 -#define BCMILCP_BCM_SUBTYPE_EVENT 1 -#define BCMILCP_BCM_SUBTYPE_SES 2 -#define BCMILCP_BCM_SUBTYPE_DPT 4 -#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH 8 -#define BCMILCP_BCM_SUBTYPEHDR_VERSION 0 - -typedef struct bcmeth_hdr { - u16 subtype; - u16 length; - u8 version; - u8 oui[3]; - u16 usr_subtype; -} __attribute__((packed)) bcmeth_hdr_t; - #endif /* _BCMETH_H_ */ diff --git a/drivers/staging/brcm80211/include/proto/bcmevent.h b/drivers/staging/brcm80211/include/proto/bcmevent.h index 1b60789..1f4ab64 100644 --- a/drivers/staging/brcm80211/include/proto/bcmevent.h +++ b/drivers/staging/brcm80211/include/proto/bcmevent.h @@ -19,189 +19,4 @@ #include -#define BCM_EVENT_MSG_VERSION 1 -#define BCM_MSG_IFNAME_MAX 16 - -#define WLC_EVENT_MSG_LINK 0x01 -#define WLC_EVENT_MSG_FLUSHTXQ 0x02 -#define WLC_EVENT_MSG_GROUP 0x04 - -typedef struct { - u16 version; - u16 flags; - u32 event_type; - u32 status; - u32 reason; - u32 auth_type; - u32 datalen; - u8 addr[ETH_ALEN]; - char ifname[BCM_MSG_IFNAME_MAX]; -} __attribute__((packed)) wl_event_msg_t; - -#ifdef BRCM_FULLMAC -typedef struct bcm_event { - struct ethhdr eth; - bcmeth_hdr_t bcm_hdr; - wl_event_msg_t event; -} __attribute__((packed)) bcm_event_t; -#endif -#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - \ - sizeof(struct ether_header)) - -#define WLC_E_SET_SSID 0 -#define WLC_E_JOIN 1 -#define WLC_E_START 2 -#define WLC_E_AUTH 3 -#define WLC_E_AUTH_IND 4 -#define WLC_E_DEAUTH 5 -#define WLC_E_DEAUTH_IND 6 -#define WLC_E_ASSOC 7 -#define WLC_E_ASSOC_IND 8 -#define WLC_E_REASSOC 9 -#define WLC_E_REASSOC_IND 10 -#define WLC_E_DISASSOC 11 -#define WLC_E_DISASSOC_IND 12 -#define WLC_E_QUIET_START 13 -#define WLC_E_QUIET_END 14 -#define WLC_E_BEACON_RX 15 -#define WLC_E_LINK 16 -#define WLC_E_MIC_ERROR 17 -#define WLC_E_NDIS_LINK 18 -#define WLC_E_ROAM 19 -#define WLC_E_TXFAIL 20 -#define WLC_E_PMKID_CACHE 21 -#define WLC_E_RETROGRADE_TSF 22 -#define WLC_E_PRUNE 23 -#define WLC_E_AUTOAUTH 24 -#define WLC_E_EAPOL_MSG 25 -#define WLC_E_SCAN_COMPLETE 26 -#define WLC_E_ADDTS_IND 27 -#define WLC_E_DELTS_IND 28 -#define WLC_E_BCNSENT_IND 29 -#define WLC_E_BCNRX_MSG 30 -#define WLC_E_BCNLOST_MSG 31 -#define WLC_E_ROAM_PREP 32 -#define WLC_E_PFN_NET_FOUND 33 -#define WLC_E_PFN_NET_LOST 34 -#define WLC_E_RESET_COMPLETE 35 -#define WLC_E_JOIN_START 36 -#define WLC_E_ROAM_START 37 -#define WLC_E_ASSOC_START 38 -#define WLC_E_IBSS_ASSOC 39 -#define WLC_E_RADIO 40 -#define WLC_E_PSM_WATCHDOG 41 -#define WLC_E_PROBREQ_MSG 44 -#define WLC_E_SCAN_CONFIRM_IND 45 -#define WLC_E_PSK_SUP 46 -#define WLC_E_COUNTRY_CODE_CHANGED 47 -#define WLC_E_EXCEEDED_MEDIUM_TIME 48 -#define WLC_E_ICV_ERROR 49 -#define WLC_E_UNICAST_DECODE_ERROR 50 -#define WLC_E_MULTICAST_DECODE_ERROR 51 -#define WLC_E_TRACE 52 -#define WLC_E_IF 54 -#define WLC_E_RSSI 56 -#define WLC_E_PFN_SCAN_COMPLETE 57 -#define WLC_E_EXTLOG_MSG 58 -#define WLC_E_ACTION_FRAME 59 -#define WLC_E_ACTION_FRAME_COMPLETE 60 -#define WLC_E_PRE_ASSOC_IND 61 -#define WLC_E_PRE_REASSOC_IND 62 -#define WLC_E_CHANNEL_ADOPTED 63 -#define WLC_E_AP_STARTED 64 -#define WLC_E_DFS_AP_STOP 65 -#define WLC_E_DFS_AP_RESUME 66 -#define WLC_E_RESERVED1 67 -#define WLC_E_RESERVED2 68 -#define WLC_E_ESCAN_RESULT 69 -#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 -#define WLC_E_DCS_REQUEST 73 - -#define WLC_E_FIFO_CREDIT_MAP 74 - -#define WLC_E_LAST 75 - -typedef struct { - uint event; - const char *name; -} bcmevent_name_t; - -extern const bcmevent_name_t bcmevent_names[]; -extern const int bcmevent_names_size; - -#define WLC_E_STATUS_SUCCESS 0 -#define WLC_E_STATUS_FAIL 1 -#define WLC_E_STATUS_TIMEOUT 2 -#define WLC_E_STATUS_NO_NETWORKS 3 -#define WLC_E_STATUS_ABORT 4 -#define WLC_E_STATUS_NO_ACK 5 -#define WLC_E_STATUS_UNSOLICITED 6 -#define WLC_E_STATUS_ATTEMPT 7 -#define WLC_E_STATUS_PARTIAL 8 -#define WLC_E_STATUS_NEWSCAN 9 -#define WLC_E_STATUS_NEWASSOC 10 -#define WLC_E_STATUS_11HQUIET 11 -#define WLC_E_STATUS_SUPPRESS 12 -#define WLC_E_STATUS_NOCHANS 13 -#define WLC_E_STATUS_CS_ABORT 15 -#define WLC_E_STATUS_ERROR 16 - -#define WLC_E_REASON_INITIAL_ASSOC 0 -#define WLC_E_REASON_LOW_RSSI 1 -#define WLC_E_REASON_DEAUTH 2 -#define WLC_E_REASON_DISASSOC 3 -#define WLC_E_REASON_BCNS_LOST 4 -#define WLC_E_REASON_MINTXRATE 9 -#define WLC_E_REASON_TXFAIL 10 - -#define WLC_E_REASON_FAST_ROAM_FAILED 5 -#define WLC_E_REASON_DIRECTED_ROAM 6 -#define WLC_E_REASON_TSPEC_REJECTED 7 -#define WLC_E_REASON_BETTER_AP 8 - -#define WLC_E_PRUNE_ENCR_MISMATCH 1 -#define WLC_E_PRUNE_BCAST_BSSID 2 -#define WLC_E_PRUNE_MAC_DENY 3 -#define WLC_E_PRUNE_MAC_NA 4 -#define WLC_E_PRUNE_REG_PASSV 5 -#define WLC_E_PRUNE_SPCT_MGMT 6 -#define WLC_E_PRUNE_RADAR 7 -#define WLC_E_RSN_MISMATCH 8 -#define WLC_E_PRUNE_NO_COMMON_RATES 9 -#define WLC_E_PRUNE_BASIC_RATES 10 -#define WLC_E_PRUNE_CIPHER_NA 12 -#define WLC_E_PRUNE_KNOWN_STA 13 -#define WLC_E_PRUNE_WDS_PEER 15 -#define WLC_E_PRUNE_QBSS_LOAD 16 -#define WLC_E_PRUNE_HOME_AP 17 - -#define WLC_E_SUP_OTHER 0 -#define WLC_E_SUP_DECRYPT_KEY_DATA 1 -#define WLC_E_SUP_BAD_UCAST_WEP128 2 -#define WLC_E_SUP_BAD_UCAST_WEP40 3 -#define WLC_E_SUP_UNSUP_KEY_LEN 4 -#define WLC_E_SUP_PW_KEY_CIPHER 5 -#define WLC_E_SUP_MSG3_TOO_MANY_IE 6 -#define WLC_E_SUP_MSG3_IE_MISMATCH 7 -#define WLC_E_SUP_NO_INSTALL_FLAG 8 -#define WLC_E_SUP_MSG3_NO_GTK 9 -#define WLC_E_SUP_GRP_KEY_CIPHER 10 -#define WLC_E_SUP_GRP_MSG1_NO_GTK 11 -#define WLC_E_SUP_GTK_DECRYPT_FAIL 12 -#define WLC_E_SUP_SEND_FAIL 13 -#define WLC_E_SUP_DEAUTH 14 - -#define WLC_E_IF_ADD 1 -#define WLC_E_IF_DEL 2 -#define WLC_E_IF_CHANGE 3 - -#define WLC_E_IF_ROLE_STA 0 -#define WLC_E_IF_ROLE_AP 1 -#define WLC_E_IF_ROLE_WDS 2 - -#define WLC_E_LINK_BCN_LOSS 1 -#define WLC_E_LINK_DISASSOC 2 -#define WLC_E_LINK_ASSOC_REC 3 -#define WLC_E_LINK_BSSCFG_DIS 4 - #endif /* _BCMEVENT_H_ */ -- cgit v0.10.2 From d0a0941b0a578dad4b70774bd88a155997c01844 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:14 +0200 Subject: staging: brcm80211: removed include/proto dir Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/include/proto/bcmeth.h b/drivers/staging/brcm80211/include/proto/bcmeth.h deleted file mode 100644 index 0053984..0000000 --- a/drivers/staging/brcm80211/include/proto/bcmeth.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BCMETH_H_ -#define _BCMETH_H_ - -#endif /* _BCMETH_H_ */ diff --git a/drivers/staging/brcm80211/include/proto/bcmevent.h b/drivers/staging/brcm80211/include/proto/bcmevent.h deleted file mode 100644 index 1f4ab64..0000000 --- a/drivers/staging/brcm80211/include/proto/bcmevent.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BCMEVENT_H_ -#define _BCMEVENT_H_ - -#include - -#endif /* _BCMEVENT_H_ */ -- cgit v0.10.2 From 7885471758027255436073b69400ad67d1ee37b0 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:15 +0200 Subject: staging: brcm80211: remove SDIO related definitions from nicpci.h The header file nicpci.h is now only used by brcmsmac driver, which does not support SDIO. The conditional defintions have been removed from the header file. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/include/nicpci.h b/drivers/staging/brcm80211/include/nicpci.h index 30321eb..f901c60 100644 --- a/drivers/staging/brcm80211/include/nicpci.h +++ b/drivers/staging/brcm80211/include/nicpci.h @@ -17,32 +17,6 @@ #ifndef _NICPCI_H #define _NICPCI_H -#if defined(BCMSDIO) || (defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS)) -#define pcicore_find_pci_capability(a, b, c, d) (0) -#define pcie_readreg(a, b, c, d) (0) -#define pcie_writereg(a, b, c, d, e) (0) - -#define pcie_clkreq(a, b, c) (0) -#define pcie_lcreg(a, b, c) (0) - -#define pcicore_init(a, b, c) (0x0dadbeef) -#define pcicore_deinit(a) do { } while (0) -#define pcicore_attach(a, b, c) do { } while (0) -#define pcicore_hwup(a) do { } while (0) -#define pcicore_up(a, b) do { } while (0) -#define pcicore_sleep(a) do { } while (0) -#define pcicore_down(a, b) do { } while (0) - -#define pcie_war_ovr_aspm_update(a, b) do { } while (0) - -#define pcicore_pcieserdesreg(a, b, c, d, e) (0) -#define pcicore_pciereg(a, b, c, d, e) (0) - -#define pcicore_pmecap_fast(a) (false) -#define pcicore_pmeen(a) do { } while (0) -#define pcicore_pmeclr(a) do { } while (0) -#define pcicore_pmestat(a) (false) -#else struct sbpcieregs; extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, @@ -74,6 +48,5 @@ extern bool pcicore_pmecap_fast(void *pch); extern void pcicore_pmeen(void *pch); extern void pcicore_pmeclr(void *pch); extern bool pcicore_pmestat(void *pch); -#endif /* defined(BCMSDIO)||(defined(BCMBUSTYPE) && (BCMBUSTYPE==SI_BUS)) */ -#endif /* _NICPCI_H */ +#endif /* _NICPCI_H */ -- cgit v0.10.2 From a4f031d35ea3e08ec8384fa3df544b86824523fd Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:16 +0200 Subject: staging: brcm80211: remove usage of bcmsrom_tbl.h The include file bcmsrom_tbl.h was only included by bcmsrom.c. The required definitions have been move to bcmsrom.c and bcmsrom_tbl.h has subsequenly been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 9de10fe..487e731 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include @@ -42,6 +41,24 @@ #define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ #endif +/* SROM flags (see sromvar_t) */ +#define SRFL_MORE 1 /* value continues as described by the next entry */ +#define SRFL_NOFFS 2 /* value bits can't be all one's */ +#define SRFL_PRHEX 4 /* value is in hexdecimal format */ +#define SRFL_PRSIGN 8 /* value is in signed decimal format */ +#define SRFL_CCODE 0x10 /* value is in country code format */ +#define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ +#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ +#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ + +typedef struct { + const char *name; + u32 revmask; + u32 flags; + u16 off; + u16 mask; +} sromvar_t; + typedef struct varbuf { char *base; /* pointer to buffer base */ char *buf; /* pointer to current position */ @@ -50,6 +67,406 @@ typedef struct varbuf { extern char *_vars; extern uint _varsz; +/* Assumptions: + * - Ethernet address spans across 3 consective words + * + * Table rules: + * - Add multiple entries next to each other if a value spans across multiple words + * (even multiple fields in the same word) with each entry except the last having + * it's SRFL_MORE bit set. + * - Ethernet address entry does not follow above rule and must not have SRFL_MORE + * bit set. Its SRFL_ETHADDR bit implies it takes multiple words. + * - The last entry's name field must be NULL to indicate the end of the table. Other + * entries must have non-NULL name. + */ +static const sromvar_t pci_sromvars[] = { + {"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff}, + {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, + {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, + {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, + {"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff}, + {"boardflags", 0x00000004, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM_BFL2, 0xffff}, + {"boardflags", 0x00000008, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM3_BFL2, 0xffff}, + {"boardflags", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL0, 0xffff}, + {"", 0, 0, SROM4_BFL1, 0xffff}, + {"boardflags", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL0, 0xffff}, + {"", 0, 0, SROM5_BFL1, 0xffff}, + {"boardflags", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 0xffff}, + {"", 0, 0, SROM8_BFL1, 0xffff}, + {"boardflags2", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL2, 0xffff}, + {"", 0, 0, SROM4_BFL3, 0xffff}, + {"boardflags2", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL2, 0xffff}, + {"", 0, 0, SROM5_BFL3, 0xffff}, + {"boardflags2", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 0xffff}, + {"", 0, 0, SROM8_BFL3, 0xffff}, + {"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, + {"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff}, + {"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff}, + {"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff}, + {"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff}, + {"boardnum", 0xffffff00, 0, SROM8_MACLO, 0xffff}, + {"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK}, + {"regrev", 0x00000008, 0, SROM_OPO, 0xff00}, + {"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff}, + {"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff}, + {"regrev", 0xffffff00, 0, SROM8_REGREV, 0x00ff}, + {"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff}, + {"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00}, + {"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff}, + {"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00}, + {"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff}, + {"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00}, + {"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff}, + {"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00}, + {"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff}, + {"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00}, + {"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff}, + {"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00}, + {"ledbh0", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, + {"ledbh1", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, + {"ledbh2", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, + {"ledbh3", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, + {"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff}, + {"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff}, + {"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff}, + {"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff}, + {"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff}, + {"pa0b0", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, + {"pa0b1", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, + {"pa0b2", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, + {"pa0itssit", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00}, + {"pa0maxpwr", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff}, + {"opo", 0x0000000c, 0, SROM_OPO, 0x00ff}, + {"opo", 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff}, + {"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK}, + {"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff}, + {"aa2g", 0xffffff00, 0, SROM8_AA, 0x00ff}, + {"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK}, + {"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00}, + {"aa5g", 0xffffff00, 0, SROM8_AA, 0xff00}, + {"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff}, + {"ag1", 0x0000000e, 0, SROM_AG10, 0xff00}, + {"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff}, + {"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00}, + {"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff}, + {"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00}, + {"ag0", 0xffffff00, 0, SROM8_AG10, 0x00ff}, + {"ag1", 0xffffff00, 0, SROM8_AG10, 0xff00}, + {"ag2", 0xffffff00, 0, SROM8_AG32, 0x00ff}, + {"ag3", 0xffffff00, 0, SROM8_AG32, 0xff00}, + {"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff}, + {"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff}, + {"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff}, + {"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff}, + {"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff}, + {"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff}, + {"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff}, + {"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff}, + {"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff}, + {"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00}, + {"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00}, + {"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00}, + {"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff}, + {"pa1b0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, + {"pa1b1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, + {"pa1b2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, + {"pa1lob0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, + {"pa1lob1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, + {"pa1lob2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, + {"pa1hib0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, + {"pa1hib1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, + {"pa1hib2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, + {"pa1itssit", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00}, + {"pa1maxpwr", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff}, + {"pa1lomaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00}, + {"pa1himaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, + {"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800}, + {"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700}, + {"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f}, + {"bxa2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800}, + {"rssisav2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700}, + {"rssismc2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f}, + {"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800}, + {"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700}, + {"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f}, + {"bxa5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800}, + {"rssisav5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700}, + {"rssismc5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f}, + {"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff}, + {"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00}, + {"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff}, + {"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00}, + {"tri2g", 0xffffff00, 0, SROM8_TRI52G, 0x00ff}, + {"tri5g", 0xffffff00, 0, SROM8_TRI52G, 0xff00}, + {"tri5gl", 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff}, + {"tri5gh", 0xffffff00, 0, SROM8_TRI5GHL, 0xff00}, + {"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff}, + {"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00}, + {"rxpo2g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, + {"rxpo5g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, + {"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK}, + {"txchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK}, + {"tssipos2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK}, + {"tssipos5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK}, + {"tempthresh", 0xffffff00, 0, SROM8_THERMAL, 0xff00}, + {"tempoffset", 0xffffff00, 0, SROM8_THERMAL, 0x00ff}, + {"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff}, + {"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00}, + {"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff}, + {"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00}, + {"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff}, + {"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00}, + {"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff}, + {"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00}, + {"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff}, + {"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00}, + {"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff}, + {"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00}, + {"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff}, + {"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00}, + {"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff}, + {"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00}, + + {"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff}, + {"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff}, + {"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff}, + {"ccode", 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff}, + {"macaddr", 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, + {"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff}, + {"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff}, + {"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff}, + {"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff}, + {"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff}, + {"leddc", 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 0xffff}, + {"leddc", 0x000000e0, SRFL_NOFFS | SRFL_LEDDC, SROM5_LEDDC, 0xffff}, + {"leddc", 0x00000010, SRFL_NOFFS | SRFL_LEDDC, SROM4_LEDDC, 0xffff}, + {"leddc", 0x00000008, SRFL_NOFFS | SRFL_LEDDC, SROM3_LEDDC, 0xffff}, + {"rawtempsense", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff}, + {"measpower", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00}, + {"tempsense_slope", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, + 0x00ff}, + {"tempcorrx", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00}, + {"tempsense_option", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, + 0x0300}, + {"freqoffset_corr", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, + 0x000f}, + {"iqcal_swp_dis", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010}, + {"hw_iqcal_en", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020}, + {"phycal_tempdelta", 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff}, + + {"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff}, + {"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, + {"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff}, + {"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, + {"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff}, + {"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, + {"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff}, + {"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff}, + {"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff}, + {"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff}, + {"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff}, + {"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff}, + {"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff}, + {"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, + + /* power per rate from sromrev 9 */ + {"cckbw202gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff}, + {"cckbw20ul2gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, + {"legofdmbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, + {"mcsbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw402gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, + {"mcs32po", 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff}, + {"legofdm40duppo", 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff}, + + {NULL, 0, 0, 0, 0} +}; + +static const sromvar_t perpath_pci_sromvars[] = { + {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff}, + {"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff}, + {"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff}, + {"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff}, + {"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff}, + {"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff}, + {"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff}, + {"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff}, + {"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff}, + {"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff}, + {"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff}, + {"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff}, + {"maxp2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, + {"pa2gw1a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, + {"maxp5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, + {"pa5gw1a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, + {"pa5glw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, + {"pa5glw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff}, + {"pa5ghw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, + {"pa5ghw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff}, + {NULL, 0, 0, 0, 0} +}; + static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count); static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count); diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h b/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h deleted file mode 100644 index a41e62c..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h +++ /dev/null @@ -1,511 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsrom_tbl_h_ -#define _bcmsrom_tbl_h_ - -typedef struct { - const char *name; - u32 revmask; - u32 flags; - u16 off; - u16 mask; -} sromvar_t; - -#define SRFL_MORE 1 /* value continues as described by the next entry */ -#define SRFL_NOFFS 2 /* value bits can't be all one's */ -#define SRFL_PRHEX 4 /* value is in hexdecimal format */ -#define SRFL_PRSIGN 8 /* value is in signed decimal format */ -#define SRFL_CCODE 0x10 /* value is in country code format */ -#define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ -#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ -#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ - -/* Assumptions: - * - Ethernet address spans across 3 consective words - * - * Table rules: - * - Add multiple entries next to each other if a value spans across multiple words - * (even multiple fields in the same word) with each entry except the last having - * it's SRFL_MORE bit set. - * - Ethernet address entry does not follow above rule and must not have SRFL_MORE - * bit set. Its SRFL_ETHADDR bit implies it takes multiple words. - * - The last entry's name field must be NULL to indicate the end of the table. Other - * entries must have non-NULL name. - */ - -static const sromvar_t pci_sromvars[] = { - {"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff}, - {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, - {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, - {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, - {"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff}, - {"boardflags", 0x00000004, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, - {"", 0, 0, SROM_BFL2, 0xffff}, - {"boardflags", 0x00000008, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, - {"", 0, 0, SROM3_BFL2, 0xffff}, - {"boardflags", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL0, 0xffff}, - {"", 0, 0, SROM4_BFL1, 0xffff}, - {"boardflags", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL0, 0xffff}, - {"", 0, 0, SROM5_BFL1, 0xffff}, - {"boardflags", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 0xffff}, - {"", 0, 0, SROM8_BFL1, 0xffff}, - {"boardflags2", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL2, 0xffff}, - {"", 0, 0, SROM4_BFL3, 0xffff}, - {"boardflags2", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL2, 0xffff}, - {"", 0, 0, SROM5_BFL3, 0xffff}, - {"boardflags2", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 0xffff}, - {"", 0, 0, SROM8_BFL3, 0xffff}, - {"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, - {"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff}, - {"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff}, - {"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff}, - {"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff}, - {"boardnum", 0xffffff00, 0, SROM8_MACLO, 0xffff}, - {"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK}, - {"regrev", 0x00000008, 0, SROM_OPO, 0xff00}, - {"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff}, - {"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff}, - {"regrev", 0xffffff00, 0, SROM8_REGREV, 0x00ff}, - {"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff}, - {"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00}, - {"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff}, - {"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00}, - {"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff}, - {"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00}, - {"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff}, - {"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00}, - {"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff}, - {"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00}, - {"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff}, - {"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00}, - {"ledbh0", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, - {"ledbh1", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, - {"ledbh2", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, - {"ledbh3", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, - {"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff}, - {"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff}, - {"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff}, - {"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff}, - {"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff}, - {"pa0b0", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, - {"pa0b1", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, - {"pa0b2", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, - {"pa0itssit", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00}, - {"pa0maxpwr", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff}, - {"opo", 0x0000000c, 0, SROM_OPO, 0x00ff}, - {"opo", 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff}, - {"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK}, - {"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff}, - {"aa2g", 0xffffff00, 0, SROM8_AA, 0x00ff}, - {"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK}, - {"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00}, - {"aa5g", 0xffffff00, 0, SROM8_AA, 0xff00}, - {"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff}, - {"ag1", 0x0000000e, 0, SROM_AG10, 0xff00}, - {"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff}, - {"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00}, - {"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff}, - {"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00}, - {"ag0", 0xffffff00, 0, SROM8_AG10, 0x00ff}, - {"ag1", 0xffffff00, 0, SROM8_AG10, 0xff00}, - {"ag2", 0xffffff00, 0, SROM8_AG32, 0x00ff}, - {"ag3", 0xffffff00, 0, SROM8_AG32, 0xff00}, - {"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff}, - {"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff}, - {"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff}, - {"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff}, - {"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff}, - {"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff}, - {"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff}, - {"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff}, - {"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff}, - {"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00}, - {"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00}, - {"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00}, - {"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff}, - {"pa1b0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, - {"pa1b1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, - {"pa1b2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, - {"pa1lob0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, - {"pa1lob1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, - {"pa1lob2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, - {"pa1hib0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, - {"pa1hib1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, - {"pa1hib2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, - {"pa1itssit", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00}, - {"pa1maxpwr", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff}, - {"pa1lomaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00}, - {"pa1himaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, - {"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800}, - {"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700}, - {"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0}, - {"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f}, - {"bxa2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800}, - {"rssisav2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700}, - {"rssismc2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0}, - {"rssismf2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f}, - {"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800}, - {"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700}, - {"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0}, - {"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f}, - {"bxa5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800}, - {"rssisav5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700}, - {"rssismc5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0}, - {"rssismf5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f}, - {"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff}, - {"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00}, - {"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff}, - {"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00}, - {"tri2g", 0xffffff00, 0, SROM8_TRI52G, 0x00ff}, - {"tri5g", 0xffffff00, 0, SROM8_TRI52G, 0xff00}, - {"tri5gl", 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff}, - {"tri5gh", 0xffffff00, 0, SROM8_TRI5GHL, 0xff00}, - {"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff}, - {"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00}, - {"rxpo2g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, - {"rxpo5g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, - {"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK}, - {"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK}, - {"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK}, - {"txchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK}, - {"rxchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK}, - {"antswitch", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK}, - {"tssipos2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK}, - {"extpagain2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK}, - {"pdetrange2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK}, - {"triso2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, - {"antswctl2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK}, - {"tssipos5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK}, - {"extpagain5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK}, - {"pdetrange5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK}, - {"triso5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, - {"antswctl5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK}, - {"tempthresh", 0xffffff00, 0, SROM8_THERMAL, 0xff00}, - {"tempoffset", 0xffffff00, 0, SROM8_THERMAL, 0x00ff}, - {"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff}, - {"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00}, - {"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff}, - {"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00}, - {"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff}, - {"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00}, - {"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff}, - {"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00}, - {"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff}, - {"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00}, - {"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff}, - {"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00}, - {"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff}, - {"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00}, - {"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff}, - {"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00}, - - {"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff}, - {"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff}, - {"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff}, - {"ccode", 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff}, - {"macaddr", 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, - {"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff}, - {"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff}, - {"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff}, - {"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff}, - {"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff}, - {"leddc", 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 0xffff}, - {"leddc", 0x000000e0, SRFL_NOFFS | SRFL_LEDDC, SROM5_LEDDC, 0xffff}, - {"leddc", 0x00000010, SRFL_NOFFS | SRFL_LEDDC, SROM4_LEDDC, 0xffff}, - {"leddc", 0x00000008, SRFL_NOFFS | SRFL_LEDDC, SROM3_LEDDC, 0xffff}, - {"rawtempsense", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff}, - {"measpower", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00}, - {"tempsense_slope", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, - 0x00ff}, - {"tempcorrx", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00}, - {"tempsense_option", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, - 0x0300}, - {"freqoffset_corr", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, - 0x000f}, - {"iqcal_swp_dis", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010}, - {"hw_iqcal_en", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020}, - {"phycal_tempdelta", 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff}, - - {"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff}, - {"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, - {"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff}, - {"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff}, - {"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff}, - {"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff}, - {"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, - {"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, - {"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, - {"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, - {"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff}, - {"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff}, - {"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff}, - {"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff}, - {"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff}, - {"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff}, - {"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff}, - {"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff}, - {"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff}, - {"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff}, - {"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff}, - {"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff}, - {"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff}, - {"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff}, - {"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff}, - {"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff}, - {"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff}, - {"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff}, - {"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff}, - {"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff}, - {"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff}, - {"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff}, - {"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff}, - {"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff}, - {"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff}, - {"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff}, - {"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff}, - {"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff}, - {"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff}, - {"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff}, - {"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff}, - {"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff}, - {"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, - {"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, - {"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, - {"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, - {"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, - {"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, - {"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, - {"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, - {"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, - {"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, - {"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, - {"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, - {"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, - {"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, - {"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, - {"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, - {"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, - {"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, - {"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, - {"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, - {"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, - {"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, - {"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, - {"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, - {"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, - {"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, - {"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, - {"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, - {"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, - {"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, - {"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, - {"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, - {"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff}, - {"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff}, - {"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff}, - {"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff}, - {"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff}, - {"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff}, - {"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff}, - {"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, - - /* power per rate from sromrev 9 */ - {"cckbw202gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff}, - {"cckbw20ul2gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, - {"legofdmbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, - {"mcsbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw402gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, - {"mcs32po", 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff}, - {"legofdm40duppo", 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff}, - - {NULL, 0, 0, 0, 0} -}; - -static const sromvar_t perpath_pci_sromvars[] = { - {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, - {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, - {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, - {"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff}, - {"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff}, - {"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff}, - {"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff}, - {"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff}, - {"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff}, - {"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00}, - {"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff}, - {"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff}, - {"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff}, - {"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff}, - {"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff}, - {"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff}, - {"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff}, - {"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff}, - {"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff}, - {"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff}, - {"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff}, - {"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff}, - {"maxp2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff}, - {"itt2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00}, - {"itt5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00}, - {"pa2gw0a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, - {"pa2gw1a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, - {"pa2gw2a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, - {"maxp5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff}, - {"maxp5gha", 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff}, - {"maxp5gla", 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00}, - {"pa5gw0a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, - {"pa5gw1a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, - {"pa5gw2a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, - {"pa5glw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, - {"pa5glw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff}, - {"pa5glw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff}, - {"pa5ghw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, - {"pa5ghw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff}, - {"pa5ghw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff}, - {NULL, 0, 0, 0, 0} -}; - -#if !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) -#define PHY_TYPE_N 4 /* N-Phy value */ -#define PHY_TYPE_LP 5 /* LP-Phy value */ -#endif /* !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) */ -#if !defined(PHY_TYPE_NULL) -#define PHY_TYPE_NULL 0xf /* Invalid Phy value */ -#endif /* !defined(PHY_TYPE_NULL) */ - -typedef struct { - u16 phy_type; - u16 bandrange; - u16 chain; - const char *vars; -} pavars_t; - -static const pavars_t pavars[] = { - /* NPHY */ - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 0, - "pa5glw0a0 pa5glw1a0 pa5glw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 1, - "pa5glw0a1 pa5glw1a1 pa5glw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 0, - "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 1, - "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"}, - /* LPPHY */ - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_2G, 0, "pa0b0 pa0b1 pa0b2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GL, 0, "pa1lob0 pa1lob1 pa1lob2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GM, 0, "pa1b0 pa1b1 pa1b2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GH, 0, "pa1hib0 pa1hib1 pa1hib2"}, - {PHY_TYPE_NULL, 0, 0, ""} -}; - -typedef struct { - u16 phy_type; - u16 bandrange; - const char *vars; -} povars_t; - -static const povars_t povars[] = { - /* NPHY */ - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, - "mcs2gpo0 mcs2gpo1 mcs2gpo2 mcs2gpo3 " - "mcs2gpo4 mcs2gpo5 mcs2gpo6 mcs2gpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, - "mcs5glpo0 mcs5glpo1 mcs5glpo2 mcs5glpo3 " - "mcs5glpo4 mcs5glpo5 mcs5glpo6 mcs5glpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, - "mcs5gpo0 mcs5gpo1 mcs5gpo2 mcs5gpo3 " - "mcs5gpo4 mcs5gpo5 mcs5gpo6 mcs5gpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, - "mcs5ghpo0 mcs5ghpo1 mcs5ghpo2 mcs5ghpo3 " - "mcs5ghpo4 mcs5ghpo5 mcs5ghpo6 mcs5ghpo7"}, - {PHY_TYPE_NULL, 0, ""} -}; - -typedef struct { - u8 tag; /* Broadcom subtag name */ - u8 len; /* Length field of the tuple, note that it includes the - * subtag name (1 byte): 1 + tuple content length - */ - const char *params; -} cis_tuple_t; - -#define OTP_RAW (0xff - 1) /* Reserved tuple number for wrvar Raw input */ -#define OTP_VERS_1 (0xff - 2) /* CISTPL_VERS_1 */ -#define OTP_MANFID (0xff - 3) /* CISTPL_MANFID */ -#define OTP_RAW1 (0xff - 4) /* Like RAW, but comes first */ - -#endif /* _bcmsrom_tbl_h_ */ -- cgit v0.10.2 From d70462f5d6395f4419bcdca6c5ae6f5080884995 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:17 +0200 Subject: staging: brcm80211: remove extern variable definitions in bcmsrom.c The file bcmsrom.c defined two global externals. As these were also not used these have been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 487e731..a1a2fc5 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -64,8 +64,6 @@ typedef struct varbuf { char *buf; /* pointer to current position */ unsigned int size; /* current (residual) size in bytes */ } varbuf_t; -extern char *_vars; -extern uint _varsz; /* Assumptions: * - Ethernet address spans across 3 consective words -- cgit v0.10.2 From 23d77de3a199ca70889cfd422a1244bbd7511f9d Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:18 +0200 Subject: staging: brcm80211: remove inclusion of bcmsrom_fmt.h The header file bcmsrom_fmt.h contains a lot of macro definitions used by bcmsrom.c and one type definition used by wlc_phy_int.h. The defintions have been moved appropriately and the include file bcmsrom_fmt.h is removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index a1a2fc5..d374673 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -41,6 +41,317 @@ #define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ #endif +/* Maximum srom: 6 Kilobits == 768 bytes */ +#define SROM_MAX 768 + +/* PCI fields */ +#define PCI_F0DEVID 48 + +#define SROM_WORDS 64 + +#define SROM_SSID 2 + +#define SROM_WL1LHMAXP 29 + +#define SROM_WL1LPAB0 30 +#define SROM_WL1LPAB1 31 +#define SROM_WL1LPAB2 32 + +#define SROM_WL1HPAB0 33 +#define SROM_WL1HPAB1 34 +#define SROM_WL1HPAB2 35 + +#define SROM_MACHI_IL0 36 +#define SROM_MACMID_IL0 37 +#define SROM_MACLO_IL0 38 +#define SROM_MACHI_ET1 42 +#define SROM_MACMID_ET1 43 +#define SROM_MACLO_ET1 44 +#define SROM3_MACHI 37 +#define SROM3_MACMID 38 +#define SROM3_MACLO 39 + +#define SROM_BXARSSI2G 40 +#define SROM_BXARSSI5G 41 + +#define SROM_TRI52G 42 +#define SROM_TRI5GHL 43 + +#define SROM_RXPO52G 45 + +#define SROM_AABREV 46 +/* Fields in AABREV */ +#define SROM_BR_MASK 0x00ff +#define SROM_CC_MASK 0x0f00 +#define SROM_CC_SHIFT 8 +#define SROM_AA0_MASK 0x3000 +#define SROM_AA0_SHIFT 12 +#define SROM_AA1_MASK 0xc000 +#define SROM_AA1_SHIFT 14 + +#define SROM_WL0PAB0 47 +#define SROM_WL0PAB1 48 +#define SROM_WL0PAB2 49 + +#define SROM_LEDBH10 50 +#define SROM_LEDBH32 51 + +#define SROM_WL10MAXP 52 + +#define SROM_WL1PAB0 53 +#define SROM_WL1PAB1 54 +#define SROM_WL1PAB2 55 + +#define SROM_ITT 56 + +#define SROM_BFL 57 +#define SROM_BFL2 28 +#define SROM3_BFL2 61 + +#define SROM_AG10 58 + +#define SROM_CCODE 59 + +#define SROM_OPO 60 + +#define SROM3_LEDDC 62 + +#define SROM_CRCREV 63 + +/* SROM Rev 4: Reallocate the software part of the srom to accommodate + * MIMO features. It assumes up to two PCIE functions and 440 bytes + * of usable srom i.e. the usable storage in chips with OTP that + * implements hardware redundancy. + */ + +#define SROM4_WORDS 220 + +#define SROM4_SIGN 32 +#define SROM4_SIGNATURE 0x5372 + +#define SROM4_BREV 33 + +#define SROM4_BFL0 34 +#define SROM4_BFL1 35 +#define SROM4_BFL2 36 +#define SROM4_BFL3 37 +#define SROM5_BFL0 37 +#define SROM5_BFL1 38 +#define SROM5_BFL2 39 +#define SROM5_BFL3 40 + +#define SROM4_MACHI 38 +#define SROM4_MACMID 39 +#define SROM4_MACLO 40 +#define SROM5_MACHI 41 +#define SROM5_MACMID 42 +#define SROM5_MACLO 43 + +#define SROM4_CCODE 41 +#define SROM4_REGREV 42 +#define SROM5_CCODE 34 +#define SROM5_REGREV 35 + +#define SROM4_LEDBH10 43 +#define SROM4_LEDBH32 44 +#define SROM5_LEDBH10 59 +#define SROM5_LEDBH32 60 + +#define SROM4_LEDDC 45 +#define SROM5_LEDDC 45 + +#define SROM4_AA 46 + +#define SROM4_AG10 47 +#define SROM4_AG32 48 + +#define SROM4_TXPID2G 49 +#define SROM4_TXPID5G 51 +#define SROM4_TXPID5GL 53 +#define SROM4_TXPID5GH 55 + +#define SROM4_TXRXC 61 +#define SROM4_TXCHAIN_MASK 0x000f +#define SROM4_TXCHAIN_SHIFT 0 +#define SROM4_RXCHAIN_MASK 0x00f0 +#define SROM4_RXCHAIN_SHIFT 4 +#define SROM4_SWITCH_MASK 0xff00 +#define SROM4_SWITCH_SHIFT 8 + +/* Per-path fields */ +#define MAX_PATH_SROM 4 +#define SROM4_PATH0 64 +#define SROM4_PATH1 87 +#define SROM4_PATH2 110 +#define SROM4_PATH3 133 + +#define SROM4_2G_ITT_MAXP 0 +#define SROM4_2G_PA 1 +#define SROM4_5G_ITT_MAXP 5 +#define SROM4_5GLH_MAXP 6 +#define SROM4_5G_PA 7 +#define SROM4_5GL_PA 11 +#define SROM4_5GH_PA 15 + +/* All the miriad power offsets */ +#define SROM4_2G_CCKPO 156 +#define SROM4_2G_OFDMPO 157 +#define SROM4_5G_OFDMPO 159 +#define SROM4_5GL_OFDMPO 161 +#define SROM4_5GH_OFDMPO 163 +#define SROM4_2G_MCSPO 165 +#define SROM4_5G_MCSPO 173 +#define SROM4_5GL_MCSPO 181 +#define SROM4_5GH_MCSPO 189 +#define SROM4_CDDPO 197 +#define SROM4_STBCPO 198 +#define SROM4_BW40PO 199 +#define SROM4_BWDUPPO 200 + +#define SROM4_CRCREV 219 + +/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. + * This is acombined srom for both MIMO and SISO boards, usable in + * the .130 4Kilobit OTP with hardware redundancy. + */ +#define SROM8_BREV 65 + +#define SROM8_BFL0 66 +#define SROM8_BFL1 67 +#define SROM8_BFL2 68 +#define SROM8_BFL3 69 + +#define SROM8_MACHI 70 +#define SROM8_MACMID 71 +#define SROM8_MACLO 72 + +#define SROM8_CCODE 73 +#define SROM8_REGREV 74 + +#define SROM8_LEDBH10 75 +#define SROM8_LEDBH32 76 + +#define SROM8_LEDDC 77 + +#define SROM8_AA 78 + +#define SROM8_AG10 79 +#define SROM8_AG32 80 + +#define SROM8_TXRXC 81 + +#define SROM8_BXARSSI2G 82 +#define SROM8_BXARSSI5G 83 +#define SROM8_TRI52G 84 +#define SROM8_TRI5GHL 85 +#define SROM8_RXPO52G 86 + +#define SROM8_FEM2G 87 +#define SROM8_FEM5G 88 +#define SROM8_FEM_ANTSWLUT_MASK 0xf800 +#define SROM8_FEM_ANTSWLUT_SHIFT 11 +#define SROM8_FEM_TR_ISO_MASK 0x0700 +#define SROM8_FEM_TR_ISO_SHIFT 8 +#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 +#define SROM8_FEM_PDET_RANGE_SHIFT 3 +#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 +#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 +#define SROM8_FEM_TSSIPOS_MASK 0x0001 +#define SROM8_FEM_TSSIPOS_SHIFT 0 + +#define SROM8_THERMAL 89 + +/* Temp sense related entries */ +#define SROM8_MPWR_RAWTS 90 +#define SROM8_TS_SLP_OPT_CORRX 91 +/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ +#define SROM8_FOC_HWIQ_IQSWP 92 + +/* Temperature delta for PHY calibration */ +#define SROM8_PHYCAL_TEMPDELTA 93 + +/* Per-path offsets & fields */ +#define SROM8_PATH0 96 +#define SROM8_PATH1 112 +#define SROM8_PATH2 128 +#define SROM8_PATH3 144 + +#define SROM8_2G_ITT_MAXP 0 +#define SROM8_2G_PA 1 +#define SROM8_5G_ITT_MAXP 4 +#define SROM8_5GLH_MAXP 5 +#define SROM8_5G_PA 6 +#define SROM8_5GL_PA 9 +#define SROM8_5GH_PA 12 + +/* All the miriad power offsets */ +#define SROM8_2G_CCKPO 160 + +#define SROM8_2G_OFDMPO 161 +#define SROM8_5G_OFDMPO 163 +#define SROM8_5GL_OFDMPO 165 +#define SROM8_5GH_OFDMPO 167 + +#define SROM8_2G_MCSPO 169 +#define SROM8_5G_MCSPO 177 +#define SROM8_5GL_MCSPO 185 +#define SROM8_5GH_MCSPO 193 + +#define SROM8_CDDPO 201 +#define SROM8_STBCPO 202 +#define SROM8_BW40PO 203 +#define SROM8_BWDUPPO 204 + +/* SISO PA parameters are in the path0 spaces */ +#define SROM8_SISO 96 + +/* Legacy names for SISO PA paramters */ +#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) +#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) +#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) +#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) +#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) +#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) +#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) +#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) +#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) +#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) +#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) +#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) +#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) +#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) +#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) + +/* SROM REV 9 */ +#define SROM9_2GPO_CCKBW20 160 +#define SROM9_2GPO_CCKBW20UL 161 +#define SROM9_2GPO_LOFDMBW20 162 +#define SROM9_2GPO_LOFDMBW20UL 164 + +#define SROM9_5GLPO_LOFDMBW20 166 +#define SROM9_5GLPO_LOFDMBW20UL 168 +#define SROM9_5GMPO_LOFDMBW20 170 +#define SROM9_5GMPO_LOFDMBW20UL 172 +#define SROM9_5GHPO_LOFDMBW20 174 +#define SROM9_5GHPO_LOFDMBW20UL 176 + +#define SROM9_2GPO_MCSBW20 178 +#define SROM9_2GPO_MCSBW20UL 180 +#define SROM9_2GPO_MCSBW40 182 + +#define SROM9_5GLPO_MCSBW20 184 +#define SROM9_5GLPO_MCSBW20UL 186 +#define SROM9_5GLPO_MCSBW40 188 +#define SROM9_5GMPO_MCSBW20 190 +#define SROM9_5GMPO_MCSBW20UL 192 +#define SROM9_5GMPO_MCSBW40 194 +#define SROM9_5GHPO_MCSBW20 196 +#define SROM9_5GHPO_MCSBW20UL 198 +#define SROM9_5GHPO_MCSBW40 200 + +#define SROM9_PO_MCS32 202 +#define SROM9_PO_LOFDM40DUP 203 + /* SROM flags (see sromvar_t) */ #define SRFL_MORE 1 /* value continues as described by the next entry */ #define SRFL_NOFFS 2 /* value bits can't be all one's */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 10cbf52..8e7fb94 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -21,7 +21,6 @@ #include #include -#include #include #define PHYHAL_ERROR 0x0001 @@ -42,6 +41,14 @@ extern u32 phyhal_msg_level; #define LCNXN_BASEREV 16 +typedef struct { + u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ + u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ + u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ + u8 triso; /* TR switch isolation */ + u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ +} wlc_phy_srom_fem_t; + struct wlc_hw_info; typedef struct phy_info phy_info_t; typedef void (*initfn_t) (phy_info_t *); @@ -653,8 +660,8 @@ struct phy_info { s8 tx_power_offset[TXP_NUM_RATES]; u8 tx_power_target[TXP_NUM_RATES]; - srom_fem_t srom_fem2g; - srom_fem_t srom_fem5g; + wlc_phy_srom_fem_t srom_fem2g; + wlc_phy_srom_fem_t srom_fem5g; u8 tx_power_max; u8 tx_power_max_rate_ind; diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/include/bcmsrom.h index b2dc895..b9500ec 100644 --- a/drivers/staging/brcm80211/include/bcmsrom.h +++ b/drivers/staging/brcm80211/include/bcmsrom.h @@ -17,8 +17,6 @@ #ifndef _bcmsrom_h_ #define _bcmsrom_h_ -#include - /* Prototypes */ extern int srom_var_init(si_t *sih, uint bus, void *curmap, char **vars, uint *count); diff --git a/drivers/staging/brcm80211/include/bcmsrom_fmt.h b/drivers/staging/brcm80211/include/bcmsrom_fmt.h deleted file mode 100644 index 4666afd..0000000 --- a/drivers/staging/brcm80211/include/bcmsrom_fmt.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsrom_fmt_h_ -#define _bcmsrom_fmt_h_ - -/* Maximum srom: 6 Kilobits == 768 bytes */ -#define SROM_MAX 768 -#define SROM_MAXW 384 -#define VARS_MAX 4096 - -/* PCI fields */ -#define PCI_F0DEVID 48 - -#define SROM_WORDS 64 - -#define SROM3_SWRGN_OFF 28 /* s/w region offset in words */ - -#define SROM_SSID 2 - -#define SROM_WL1LHMAXP 29 - -#define SROM_WL1LPAB0 30 -#define SROM_WL1LPAB1 31 -#define SROM_WL1LPAB2 32 - -#define SROM_WL1HPAB0 33 -#define SROM_WL1HPAB1 34 -#define SROM_WL1HPAB2 35 - -#define SROM_MACHI_IL0 36 -#define SROM_MACMID_IL0 37 -#define SROM_MACLO_IL0 38 -#define SROM_MACHI_ET0 39 -#define SROM_MACMID_ET0 40 -#define SROM_MACLO_ET0 41 -#define SROM_MACHI_ET1 42 -#define SROM_MACMID_ET1 43 -#define SROM_MACLO_ET1 44 -#define SROM3_MACHI 37 -#define SROM3_MACMID 38 -#define SROM3_MACLO 39 - -#define SROM_BXARSSI2G 40 -#define SROM_BXARSSI5G 41 - -#define SROM_TRI52G 42 -#define SROM_TRI5GHL 43 - -#define SROM_RXPO52G 45 - -#define SROM2_ENETPHY 45 - -#define SROM_AABREV 46 -/* Fields in AABREV */ -#define SROM_BR_MASK 0x00ff -#define SROM_CC_MASK 0x0f00 -#define SROM_CC_SHIFT 8 -#define SROM_AA0_MASK 0x3000 -#define SROM_AA0_SHIFT 12 -#define SROM_AA1_MASK 0xc000 -#define SROM_AA1_SHIFT 14 - -#define SROM_WL0PAB0 47 -#define SROM_WL0PAB1 48 -#define SROM_WL0PAB2 49 - -#define SROM_LEDBH10 50 -#define SROM_LEDBH32 51 - -#define SROM_WL10MAXP 52 - -#define SROM_WL1PAB0 53 -#define SROM_WL1PAB1 54 -#define SROM_WL1PAB2 55 - -#define SROM_ITT 56 - -#define SROM_BFL 57 -#define SROM_BFL2 28 -#define SROM3_BFL2 61 - -#define SROM_AG10 58 - -#define SROM_CCODE 59 - -#define SROM_OPO 60 - -#define SROM3_LEDDC 62 - -#define SROM_CRCREV 63 - -/* SROM Rev 4: Reallocate the software part of the srom to accommodate - * MIMO features. It assumes up to two PCIE functions and 440 bytes - * of usable srom i.e. the usable storage in chips with OTP that - * implements hardware redundancy. - */ - -#define SROM4_WORDS 220 - -#define SROM4_SIGN 32 -#define SROM4_SIGNATURE 0x5372 - -#define SROM4_BREV 33 - -#define SROM4_BFL0 34 -#define SROM4_BFL1 35 -#define SROM4_BFL2 36 -#define SROM4_BFL3 37 -#define SROM5_BFL0 37 -#define SROM5_BFL1 38 -#define SROM5_BFL2 39 -#define SROM5_BFL3 40 - -#define SROM4_MACHI 38 -#define SROM4_MACMID 39 -#define SROM4_MACLO 40 -#define SROM5_MACHI 41 -#define SROM5_MACMID 42 -#define SROM5_MACLO 43 - -#define SROM4_CCODE 41 -#define SROM4_REGREV 42 -#define SROM5_CCODE 34 -#define SROM5_REGREV 35 - -#define SROM4_LEDBH10 43 -#define SROM4_LEDBH32 44 -#define SROM5_LEDBH10 59 -#define SROM5_LEDBH32 60 - -#define SROM4_LEDDC 45 -#define SROM5_LEDDC 45 - -#define SROM4_AA 46 -#define SROM4_AA2G_MASK 0x00ff -#define SROM4_AA2G_SHIFT 0 -#define SROM4_AA5G_MASK 0xff00 -#define SROM4_AA5G_SHIFT 8 - -#define SROM4_AG10 47 -#define SROM4_AG32 48 - -#define SROM4_TXPID2G 49 -#define SROM4_TXPID5G 51 -#define SROM4_TXPID5GL 53 -#define SROM4_TXPID5GH 55 - -#define SROM4_TXRXC 61 -#define SROM4_TXCHAIN_MASK 0x000f -#define SROM4_TXCHAIN_SHIFT 0 -#define SROM4_RXCHAIN_MASK 0x00f0 -#define SROM4_RXCHAIN_SHIFT 4 -#define SROM4_SWITCH_MASK 0xff00 -#define SROM4_SWITCH_SHIFT 8 - -/* Per-path fields */ -#define MAX_PATH_SROM 4 -#define SROM4_PATH0 64 -#define SROM4_PATH1 87 -#define SROM4_PATH2 110 -#define SROM4_PATH3 133 - -#define SROM4_2G_ITT_MAXP 0 -#define SROM4_2G_PA 1 -#define SROM4_5G_ITT_MAXP 5 -#define SROM4_5GLH_MAXP 6 -#define SROM4_5G_PA 7 -#define SROM4_5GL_PA 11 -#define SROM4_5GH_PA 15 - -/* Fields in the ITT_MAXP and 5GLH_MAXP words */ -#define B2G_MAXP_MASK 0xff -#define B2G_ITT_SHIFT 8 -#define B5G_MAXP_MASK 0xff -#define B5G_ITT_SHIFT 8 -#define B5GH_MAXP_MASK 0xff -#define B5GL_MAXP_SHIFT 8 - -/* All the miriad power offsets */ -#define SROM4_2G_CCKPO 156 -#define SROM4_2G_OFDMPO 157 -#define SROM4_5G_OFDMPO 159 -#define SROM4_5GL_OFDMPO 161 -#define SROM4_5GH_OFDMPO 163 -#define SROM4_2G_MCSPO 165 -#define SROM4_5G_MCSPO 173 -#define SROM4_5GL_MCSPO 181 -#define SROM4_5GH_MCSPO 189 -#define SROM4_CDDPO 197 -#define SROM4_STBCPO 198 -#define SROM4_BW40PO 199 -#define SROM4_BWDUPPO 200 - -#define SROM4_CRCREV 219 - -/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. - * This is acombined srom for both MIMO and SISO boards, usable in - * the .130 4Kilobit OTP with hardware redundancy. - */ - -#define SROM8_SIGN 64 - -#define SROM8_BREV 65 - -#define SROM8_BFL0 66 -#define SROM8_BFL1 67 -#define SROM8_BFL2 68 -#define SROM8_BFL3 69 - -#define SROM8_MACHI 70 -#define SROM8_MACMID 71 -#define SROM8_MACLO 72 - -#define SROM8_CCODE 73 -#define SROM8_REGREV 74 - -#define SROM8_LEDBH10 75 -#define SROM8_LEDBH32 76 - -#define SROM8_LEDDC 77 - -#define SROM8_AA 78 - -#define SROM8_AG10 79 -#define SROM8_AG32 80 - -#define SROM8_TXRXC 81 - -#define SROM8_BXARSSI2G 82 -#define SROM8_BXARSSI5G 83 -#define SROM8_TRI52G 84 -#define SROM8_TRI5GHL 85 -#define SROM8_RXPO52G 86 - -#define SROM8_FEM2G 87 -#define SROM8_FEM5G 88 -#define SROM8_FEM_ANTSWLUT_MASK 0xf800 -#define SROM8_FEM_ANTSWLUT_SHIFT 11 -#define SROM8_FEM_TR_ISO_MASK 0x0700 -#define SROM8_FEM_TR_ISO_SHIFT 8 -#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 -#define SROM8_FEM_PDET_RANGE_SHIFT 3 -#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 -#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 -#define SROM8_FEM_TSSIPOS_MASK 0x0001 -#define SROM8_FEM_TSSIPOS_SHIFT 0 - -#define SROM8_THERMAL 89 - -/* Temp sense related entries */ -#define SROM8_MPWR_RAWTS 90 -#define SROM8_TS_SLP_OPT_CORRX 91 -/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ -#define SROM8_FOC_HWIQ_IQSWP 92 - -/* Temperature delta for PHY calibration */ -#define SROM8_PHYCAL_TEMPDELTA 93 - -/* Per-path offsets & fields */ -#define SROM8_PATH0 96 -#define SROM8_PATH1 112 -#define SROM8_PATH2 128 -#define SROM8_PATH3 144 - -#define SROM8_2G_ITT_MAXP 0 -#define SROM8_2G_PA 1 -#define SROM8_5G_ITT_MAXP 4 -#define SROM8_5GLH_MAXP 5 -#define SROM8_5G_PA 6 -#define SROM8_5GL_PA 9 -#define SROM8_5GH_PA 12 - -/* All the miriad power offsets */ -#define SROM8_2G_CCKPO 160 - -#define SROM8_2G_OFDMPO 161 -#define SROM8_5G_OFDMPO 163 -#define SROM8_5GL_OFDMPO 165 -#define SROM8_5GH_OFDMPO 167 - -#define SROM8_2G_MCSPO 169 -#define SROM8_5G_MCSPO 177 -#define SROM8_5GL_MCSPO 185 -#define SROM8_5GH_MCSPO 193 - -#define SROM8_CDDPO 201 -#define SROM8_STBCPO 202 -#define SROM8_BW40PO 203 -#define SROM8_BWDUPPO 204 - -/* SISO PA parameters are in the path0 spaces */ -#define SROM8_SISO 96 - -/* Legacy names for SISO PA paramters */ -#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) -#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) -#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) -#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) -#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) -#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) -#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) -#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) -#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) -#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) -#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) -#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) -#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) -#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) -#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) - -#define SROM8_CRCREV 219 - -/* SROM REV 9 */ -#define SROM9_2GPO_CCKBW20 160 -#define SROM9_2GPO_CCKBW20UL 161 -#define SROM9_2GPO_LOFDMBW20 162 -#define SROM9_2GPO_LOFDMBW20UL 164 - -#define SROM9_5GLPO_LOFDMBW20 166 -#define SROM9_5GLPO_LOFDMBW20UL 168 -#define SROM9_5GMPO_LOFDMBW20 170 -#define SROM9_5GMPO_LOFDMBW20UL 172 -#define SROM9_5GHPO_LOFDMBW20 174 -#define SROM9_5GHPO_LOFDMBW20UL 176 - -#define SROM9_2GPO_MCSBW20 178 -#define SROM9_2GPO_MCSBW20UL 180 -#define SROM9_2GPO_MCSBW40 182 - -#define SROM9_5GLPO_MCSBW20 184 -#define SROM9_5GLPO_MCSBW20UL 186 -#define SROM9_5GLPO_MCSBW40 188 -#define SROM9_5GMPO_MCSBW20 190 -#define SROM9_5GMPO_MCSBW20UL 192 -#define SROM9_5GMPO_MCSBW40 194 -#define SROM9_5GHPO_MCSBW20 196 -#define SROM9_5GHPO_MCSBW20UL 198 -#define SROM9_5GHPO_MCSBW40 200 - -#define SROM9_PO_MCS32 202 -#define SROM9_PO_LOFDM40DUP 203 - -#define SROM9_REV_CRC 219 - -typedef struct { - u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ - u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ - u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ - u8 triso; /* TR switch isolation */ - u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ -} srom_fem_t; - -#endif /* _bcmsrom_fmt_h_ */ -- cgit v0.10.2 From b6fe70c3aa866db38b72d1cf84b41c4cae80c87b Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:19 +0200 Subject: staging: brcm80211: cleaned sb* header files Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmchip.h b/drivers/staging/brcm80211/brcmfmac/bcmchip.h index c0d4c3b..08729e1 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmchip.h +++ b/drivers/staging/brcm80211/brcmfmac/bcmchip.h @@ -17,12 +17,6 @@ #ifndef _bcmchip_h_ #define _bcmchip_h_ -/* Core reg address translation */ -#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) -#define CORE_BUS_REG(base, field) (base + offsetof(sdpcmd_regs_t, field)) -#define CORE_SB(base, field) \ - (base + SBCONFIGOFF + offsetof(sbconfig_t, field)) - /* bcm4329 */ /* SDIO device core, ID 0x829 */ #define BCM4329_CORE_BUS_BASE 0x18011000 diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 383e66a..0e327b3 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -230,6 +230,42 @@ typedef struct { /* Flags for SDH calls */ #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED) +/* sbimstate */ +#define SBIM_IBE 0x20000 /* inbanderror */ +#define SBIM_TO 0x40000 /* timeout */ +#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */ +#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */ + +/* sbtmstatelow */ +#define SBTML_RESET 0x0001 /* reset */ +#define SBTML_REJ_MASK 0x0006 /* reject field */ +#define SBTML_REJ 0x0002 /* reject */ +#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */ + +#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */ + +/* sbtmstatehigh */ +#define SBTMH_SERR 0x0001 /* serror */ +#define SBTMH_INT 0x0002 /* interrupt */ +#define SBTMH_BUSY 0x0004 /* busy */ +#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */ + +#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */ + +/* sbidlow */ +#define SBIDL_INIT 0x80 /* initiator */ + +/* sbidhigh */ +#define SBIDH_RC_MASK 0x000f /* revision code */ +#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */ +#define SBIDH_RCE_SHIFT 8 +#define SBCOREREV(sbidh) \ + ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) +#define SBIDH_CC_MASK 0x8ff0 /* core code */ +#define SBIDH_CC_SHIFT 4 +#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ +#define SBIDH_VC_SHIFT 16 + /* * Conversion of 802.1D priority to precedence level */ @@ -241,6 +277,12 @@ DHD_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep); extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len); +/* Core reg address translation */ +#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) +#define CORE_BUS_REG(base, field) (base + offsetof(sdpcmd_regs_t, field)) +#define CORE_SB(base, field) \ + (base + SBCONFIGOFF + offsetof(sbconfig_t, field)) + #ifdef DHD_DEBUG /* Device console log buffer state */ typedef struct dhd_console { @@ -407,6 +449,50 @@ typedef struct dhd_bus { bool ctrl_frame_stat; } dhd_bus_t; +#ifndef _LANGUAGE_ASSEMBLY + +typedef volatile struct _sbconfig { + u32 PAD[2]; + u32 sbipsflag; /* initiator port ocp slave flag */ + u32 PAD[3]; + u32 sbtpsflag; /* target port ocp slave flag */ + u32 PAD[11]; + u32 sbtmerrloga; /* (sonics >= 2.3) */ + u32 PAD; + u32 sbtmerrlog; /* (sonics >= 2.3) */ + u32 PAD[3]; + u32 sbadmatch3; /* address match3 */ + u32 PAD; + u32 sbadmatch2; /* address match2 */ + u32 PAD; + u32 sbadmatch1; /* address match1 */ + u32 PAD[7]; + u32 sbimstate; /* initiator agent state */ + u32 sbintvec; /* interrupt mask */ + u32 sbtmstatelow; /* target state */ + u32 sbtmstatehigh; /* target state */ + u32 sbbwa0; /* bandwidth allocation table0 */ + u32 PAD; + u32 sbimconfiglow; /* initiator configuration */ + u32 sbimconfighigh; /* initiator configuration */ + u32 sbadmatch0; /* address match0 */ + u32 PAD; + u32 sbtmconfiglow; /* target configuration */ + u32 sbtmconfighigh; /* target configuration */ + u32 sbbconfig; /* broadcast configuration */ + u32 PAD; + u32 sbbstate; /* broadcast state */ + u32 PAD[3]; + u32 sbactcnfg; /* activate configuration */ + u32 PAD[3]; + u32 sbflagst; /* current sbflags */ + u32 PAD[3]; + u32 sbidlow; /* identification */ + u32 sbidhigh; /* identification */ +} sbconfig_t; + +#endif /* _LANGUAGE_ASSEMBLY */ + /* clkstate */ #define CLK_NONE 0 #define CLK_SDONLY 1 diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdio.h b/drivers/staging/brcm80211/brcmfmac/sbsdio.h new file mode 100644 index 0000000..c7facd3 --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/sbsdio.h @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SBSDIO_H +#define _SBSDIO_H + +#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ + +/* function 1 miscellaneous registers */ +#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ +#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ +#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ +#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ +#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ +#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ +#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ +#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ +#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ +#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ + +/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ +#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ +#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ +#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ +#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ +#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ +#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ +#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ +#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ +#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ +#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ + +#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ +#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ + +/* SBSDIO_SPROM_CS */ +#define SBSDIO_SPROM_IDLE 0 +#define SBSDIO_SPROM_WRITE 1 +#define SBSDIO_SPROM_READ 2 +#define SBSDIO_SPROM_WEN 4 +#define SBSDIO_SPROM_WDS 7 +#define SBSDIO_SPROM_DONE 8 + +/* SBSDIO_SPROM_INFO */ +#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */ +#define SROM_BLANK 0x04 /* depreciated in corerev 6 */ +#define SROM_OTP 0x80 /* OTP present */ + +/* SBSDIO_CHIP_CTRL */ +#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu, + * 1: power on oscillator + * (for 4318 only) + */ +/* SBSDIO_WATERMARK */ +#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device + * to wait before sending data to host + */ + +/* SBSDIO_DEVICE_CTL */ +#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when + * receiving CMD53 + */ +#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is + * synchronous to the sdio clock + */ +#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host + * except the chipActive (rev 8) + */ +#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put + * external pads in tri-state; requires + * sdio bus power cycle to clear (rev 9) + */ +#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ +#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ +#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ +#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ + +/* SBSDIO_FUNC1_CHIPCLKCSR */ +#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ +#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ +#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ +#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ +#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ +#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ +#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ +#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ +/* In rev8, actual avail bits followed original docs */ +#define SBSDIO_Rev8_HT_AVAIL 0x40 +#define SBSDIO_Rev8_ALP_AVAIL 0x80 + +#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) +#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) +#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) +#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) +#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ + (alponly ? 1 : SBSDIO_HTAV(regval))) + +/* SBSDIO_FUNC1_SDIOPULLUP */ +#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */ +#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */ +#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */ +#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */ +#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */ + +/* function 1 OCP space */ +#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ +#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 +#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ + +/* some duplication with sbsdpcmdev.h here */ +/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ +#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ +#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ +#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ +#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ + +/* direct(mapped) cis space */ +#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ +#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ +#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */ + +#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ + +#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, + * link bytes + */ + +/* indirect cis access (in sprom) */ +#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from + * 8th byte + */ + +#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one + * data command + */ + +#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ + +#endif /* _SBSDIO_H */ diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h new file mode 100644 index 0000000..76266db --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h @@ -0,0 +1,302 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _sbsdpcmdev_h_ +#define _sbsdpcmdev_h_ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + +/* dma registers per channel(xmt or rcv) */ +typedef volatile struct { + u32 control; /* enable, et al */ + u32 addr; /* descriptor ring base address (4K aligned) */ + u32 ptr; /* last descriptor posted to chip */ + u32 status; /* current active descriptor, et al */ +} dma32regs_t; + +typedef volatile struct { + dma32regs_t xmt; /* dma tx channel */ + dma32regs_t rcv; /* dma rx channel */ +} dma32regp_t; + +typedef volatile struct { + dma64regs_t xmt; /* dma tx */ + u32 PAD[2]; + dma64regs_t rcv; /* dma rx */ + u32 PAD[2]; +} dma64p_t; + + +typedef volatile struct { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +} dma64diag_t; + +/* dma64 sdiod corerev >= 1 */ +typedef volatile struct { + dma64p_t dma64regs[2]; + dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ + u32 PAD[92]; +} sdiodma64_t; + +/* dma32 sdiod corerev == 0 */ +typedef volatile struct { + dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ + dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ + u32 PAD[108]; +} sdiodma32_t; + +/* dma32 regs for pcmcia core */ +typedef volatile struct { + dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ + dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ + u32 PAD[116]; +} pcmdma32_t; + +/* core registers */ +typedef volatile struct { + u32 corecontrol; /* CoreControl, 0x000, rev8 */ + u32 corestatus; /* CoreStatus, 0x004, rev8 */ + u32 PAD[1]; + u32 biststatus; /* BistStatus, 0x00c, rev8 */ + + /* PCMCIA access */ + u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ + u16 PAD[1]; + u16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ + u16 PAD[1]; + u16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ + u16 PAD[1]; + u16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ + u16 PAD[1]; + + /* interrupt */ + u32 intstatus; /* IntStatus, 0x020, rev8 */ + u32 hostintmask; /* IntHostMask, 0x024, rev8 */ + u32 intmask; /* IntSbMask, 0x028, rev8 */ + u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ + u32 sbintmask; /* SBIntMask, 0x030, rev8 */ + u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ + u32 PAD[2]; + u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ + u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ + u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ + u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ + + /* synchronized access to registers in SDIO clock domain */ + u32 sdioaccess; /* SdioAccess, 0x050, rev8 */ + u32 PAD[3]; + + /* PCMCIA frame control */ + u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ + u8 PAD[3]; + u8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ + u8 PAD[155]; + + /* interrupt batching control */ + u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ + u32 PAD[3]; + + /* counters */ + u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ + u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ + u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ + u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ + u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ + u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ + u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ + u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ + u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ + u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ + u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ + u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ + u32 PAD[40]; + u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ + u32 PAD[7]; + + /* DMA engines */ + volatile union { + pcmdma32_t pcm32; + sdiodma32_t sdiod32; + sdiodma64_t sdiod64; + } dma; + + /* SDIO/PCMCIA CIS region */ + char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ + + /* PCMCIA function control registers */ + char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ + u16 PAD[55]; + + /* PCMCIA backplane access */ + u16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ + u16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ + u16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ + u16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ + u16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ + u16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ + u16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ + u16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ + u16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ + u16 PAD[31]; + + /* sprom "size" & "blank" info */ + u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ + u32 PAD[464]; + + /* Sonics SiliconBackplane registers */ + u16 PAD[0x80]; /* SbConfig Regs, 0xf00-0xfff, rev8 */ +} sdpcmd_regs_t; + +/* corecontrol */ +#define CC_CISRDY (1 << 0) /* CIS Ready */ +#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ +#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ +#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ +#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ +#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ + +/* corestatus */ +#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ +#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ +#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ + +#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ +#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ +#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ +#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ + +/* intstatus */ +#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ +#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ +#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ +#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ +#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ +#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ +#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ +#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ +#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ +#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ +#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ +#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ +#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ +#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ +#define I_PC (1 << 10) /* descriptor error */ +#define I_PD (1 << 11) /* data error */ +#define I_DE (1 << 12) /* Descriptor protocol Error */ +#define I_RU (1 << 13) /* Receive descriptor Underflow */ +#define I_RO (1 << 14) /* Receive fifo Overflow */ +#define I_XU (1 << 15) /* Transmit fifo Underflow */ +#define I_RI (1 << 16) /* Receive Interrupt */ +#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ +#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ +#define I_XI (1 << 24) /* Transmit Interrupt */ +#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ +#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ +#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ +#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ +#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ +#define I_SRESET (1 << 30) /* CCCR RES interrupt */ +#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ +#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ +#define I_DMA (I_RI | I_XI | I_ERRORS) + +/* sbintstatus */ +#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ +#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ +#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ + +/* sdioaccess */ +#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ +#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ +#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ +#define SDA_WRITE 0x01000000 /* Write bit */ +#define SDA_READ 0x00000000 /* Write bit cleared for Read */ +#define SDA_BUSY 0x80000000 /* Busy bit */ + +/* sdioaccess-accessible register address spaces */ +#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ +#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ +#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ +#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ + +/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ +#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ +#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ +#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ +#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ +#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ +#define SDA_SBADDRMID 0x00b /* SbAddrMid */ +#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ +#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ +#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ +#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ +#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ +#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ +#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ +#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ + +/* SDA_F2WATERMARK */ +#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ + +/* SDA_SBADDRLOW */ +#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ + +/* SDA_SBADDRMID */ +#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ + +/* SDA_SBADDRHIGH */ +#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ + +/* SDA_FRAMECTRL */ +#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ +#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ +#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ + +/* pcmciaframectrl */ +#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ + +/* intrcvlazy */ +#define IRL_TO_MASK 0x00ffffff /* timeout */ +#define IRL_FC_MASK 0xff000000 /* frame count */ +#define IRL_FC_SHIFT 24 /* frame count */ + +/* rx header */ +typedef volatile struct { + u16 len; + u16 flags; +} sdpcmd_rxh_t; + +/* rx header flags */ +#define RXF_CRC 0x0001 /* CRC error detected */ +#define RXF_WOOS 0x0002 /* write frame out of sync */ +#define RXF_WF_TERM 0x0004 /* write frame terminated */ +#define RXF_ABORT 0x0008 /* write frame aborted */ +#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ + +/* HW frame tag */ +#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ + +#endif /* _sbsdpcmdev_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdio.h b/drivers/staging/brcm80211/brcmfmac/sdio.h new file mode 100644 index 0000000..670e379 --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/sdio.h @@ -0,0 +1,552 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SDIO_H +#define _SDIO_H + +#ifdef BCMSDIO + +/* CCCR structure for function 0 */ +typedef volatile struct { + u8 cccr_sdio_rev; /* RO, cccr and sdio revision */ + u8 sd_rev; /* RO, sd spec revision */ + u8 io_en; /* I/O enable */ + u8 io_rdy; /* I/O ready reg */ + u8 intr_ctl; /* Master and per function interrupt enable control */ + u8 intr_status; /* RO, interrupt pending status */ + u8 io_abort; /* read/write abort or reset all functions */ + u8 bus_inter; /* bus interface control */ + u8 capability; /* RO, card capability */ + + u8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ + u8 cis_base_mid; + u8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ + + /* suspend/resume registers */ + u8 bus_suspend; /* 0xC */ + u8 func_select; /* 0xD */ + u8 exec_flag; /* 0xE */ + u8 ready_flag; /* 0xF */ + + u8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ + + u8 power_control; /* 0x12 (SDIO version 1.10) */ + + u8 speed_control; /* 0x13 */ +} sdio_regs_t; + +/* SDIO Device CCCR offsets */ +#define SDIOD_CCCR_REV 0x00 +#define SDIOD_CCCR_SDREV 0x01 +#define SDIOD_CCCR_IOEN 0x02 +#define SDIOD_CCCR_IORDY 0x03 +#define SDIOD_CCCR_INTEN 0x04 +#define SDIOD_CCCR_INTPEND 0x05 +#define SDIOD_CCCR_IOABORT 0x06 +#define SDIOD_CCCR_BICTRL 0x07 +#define SDIOD_CCCR_CAPABLITIES 0x08 +#define SDIOD_CCCR_CISPTR_0 0x09 +#define SDIOD_CCCR_CISPTR_1 0x0A +#define SDIOD_CCCR_CISPTR_2 0x0B +#define SDIOD_CCCR_BUSSUSP 0x0C +#define SDIOD_CCCR_FUNCSEL 0x0D +#define SDIOD_CCCR_EXECFLAGS 0x0E +#define SDIOD_CCCR_RDYFLAGS 0x0F +#define SDIOD_CCCR_BLKSIZE_0 0x10 +#define SDIOD_CCCR_BLKSIZE_1 0x11 +#define SDIOD_CCCR_POWER_CONTROL 0x12 +#define SDIOD_CCCR_SPEED_CONTROL 0x13 + +/* Broadcom extensions (corerev >= 1) */ +#define SDIOD_CCCR_BRCM_SEPINT 0xf2 + +/* cccr_sdio_rev */ +#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ +#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ + +/* sd_rev */ +#define SD_REV_PHY_MASK 0x0f /* SD format version number */ + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ +#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ +#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ + +/* intr_ctl */ +#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ +#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ +#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ +#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ + +/* io_abort */ +#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ +#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ + +/* bus_inter */ +#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ +#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ +#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ +#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ +#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ +#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ + +/* capability */ +#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ +#define SDIO_CAP_LSC 0x40 /* low speed card */ +#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ +#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ +#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ +#define SDIO_CAP_SRW 0x04 /* support read wait */ +#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ +#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ + +/* power_control */ +#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ +#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ + +/* speed_control (control device entry into high-speed clocking mode) */ +#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ +#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ + +/* brcm sepint */ +#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ +#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ +#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ + +/* FBR structure for function 1-7, FBR addresses and register offsets */ +typedef volatile struct { + u8 devctr; /* device interface, CSA control */ + u8 ext_dev; /* extended standard I/O device type code */ + u8 pwr_sel; /* power selection support */ + u8 PAD[6]; /* reserved */ + + u8 cis_low; /* CIS LSB */ + u8 cis_mid; + u8 cis_high; /* CIS MSB */ + u8 csa_low; /* code storage area, LSB */ + u8 csa_mid; + u8 csa_high; /* code storage area, MSB */ + u8 csa_dat_win; /* data access window to function */ + + u8 fnx_blk_size[2]; /* block size, little endian */ +} sdio_fbr_t; + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_IOFUNCS 7 + +/* SDIO Device FBR Start Address */ +#define SDIOD_FBR_STARTADDR 0x100 + +/* SDIO Device FBR Size */ +#define SDIOD_FBR_SIZE 0x100 + +/* Macro to calculate FBR register base */ +#define SDIOD_FBR_BASE(n) ((n) * 0x100) + +/* Function register offsets */ +#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ +#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ +#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ + +/* SDIO Function CIS ptr offset */ +#define SDIOD_FBR_CISPTR_0 0x09 +#define SDIOD_FBR_CISPTR_1 0x0A +#define SDIOD_FBR_CISPTR_2 0x0B + +/* Code Storage Area pointer */ +#define SDIOD_FBR_CSA_ADDR_0 0x0C +#define SDIOD_FBR_CSA_ADDR_1 0x0D +#define SDIOD_FBR_CSA_ADDR_2 0x0E +#define SDIOD_FBR_CSA_DATA 0x0F + +/* SDIO Function I/O Block Size */ +#define SDIOD_FBR_BLKSIZE_0 0x10 +#define SDIOD_FBR_BLKSIZE_1 0x11 + +/* devctr */ +#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ +#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ +#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ +/* interface codes */ +#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ +#define SDIOD_DIC_UART 1 +#define SDIOD_DIC_BLUETOOTH_A 2 +#define SDIOD_DIC_BLUETOOTH_B 3 +#define SDIOD_DIC_GPS 4 +#define SDIOD_DIC_CAMERA 5 +#define SDIOD_DIC_PHS 6 +#define SDIOD_DIC_WLAN 7 +#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ + +/* pwr_sel */ +#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ +#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ + +/* misc defines */ +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 +#define SDIO_FUNC_3 3 +#define SDIO_FUNC_4 4 +#define SDIO_FUNC_5 5 +#define SDIO_FUNC_6 6 +#define SDIO_FUNC_7 7 + +#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ +#define SD_CARD_TYPE_IO 1 /* IO only card */ +#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ +#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ + +#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ +#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ + +/* Card registers: status bit position */ +#define CARDREG_STATUS_BIT_OUTOFRANGE 31 +#define CARDREG_STATUS_BIT_COMCRCERROR 23 +#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 +#define CARDREG_STATUS_BIT_ERROR 19 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 +#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 + +#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ +#define SD_CMD_SEND_OPCOND 1 +#define SD_CMD_MMC_SET_RCA 3 +#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ +#define SD_CMD_SELECT_DESELECT_CARD 7 +#define SD_CMD_SEND_CSD 9 +#define SD_CMD_SEND_CID 10 +#define SD_CMD_STOP_TRANSMISSION 12 +#define SD_CMD_SEND_STATUS 13 +#define SD_CMD_GO_INACTIVE_STATE 15 +#define SD_CMD_SET_BLOCKLEN 16 +#define SD_CMD_READ_SINGLE_BLOCK 17 +#define SD_CMD_READ_MULTIPLE_BLOCK 18 +#define SD_CMD_WRITE_BLOCK 24 +#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 +#define SD_CMD_PROGRAM_CSD 27 +#define SD_CMD_SET_WRITE_PROT 28 +#define SD_CMD_CLR_WRITE_PROT 29 +#define SD_CMD_SEND_WRITE_PROT 30 +#define SD_CMD_ERASE_WR_BLK_START 32 +#define SD_CMD_ERASE_WR_BLK_END 33 +#define SD_CMD_ERASE 38 +#define SD_CMD_LOCK_UNLOCK 42 +#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ +#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ +#define SD_CMD_APP_CMD 55 +#define SD_CMD_GEN_CMD 56 +#define SD_CMD_READ_OCR 58 +#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ +#define SD_ACMD_SD_STATUS 13 +#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 +#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 +#define SD_ACMD_SD_SEND_OP_COND 41 +#define SD_ACMD_SET_CLR_CARD_DETECT 42 +#define SD_ACMD_SEND_SCR 51 + +/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ +#define SD_IO_OP_READ 0 /* Read_Write: Read */ +#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ +#define SD_IO_RW_NORMAL 0 /* no RAW */ +#define SD_IO_RW_RAW 1 /* RAW */ +#define SD_IO_BYTE_MODE 0 /* Byte Mode */ +#define SD_IO_BLOCK_MODE 1 /* BlockMode */ +#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ +#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ + +/* build SD_CMD_IO_RW_DIRECT Argument */ +#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ + ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ + (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) + +/* build SD_CMD_IO_RW_EXTENDED Argument */ +#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ + ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ + (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) + +/* SDIO response parameters */ +#define SD_RSP_NO_NONE 0 +#define SD_RSP_NO_1 1 +#define SD_RSP_NO_2 2 +#define SD_RSP_NO_3 3 +#define SD_RSP_NO_4 4 +#define SD_RSP_NO_5 5 +#define SD_RSP_NO_6 6 + + /* Modified R6 response (to CMD3) */ +#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 +#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 +#define SD_RSP_MR6_ERROR 0x2000 + + /* Modified R1 in R4 Response (to CMD5) */ +#define SD_RSP_MR1_SBIT 0x80 +#define SD_RSP_MR1_PARAMETER_ERROR 0x40 +#define SD_RSP_MR1_RFU5 0x20 +#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 +#define SD_RSP_MR1_COM_CRC_ERROR 0x08 +#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 +#define SD_RSP_MR1_RFU1 0x02 +#define SD_RSP_MR1_IDLE_STATE 0x01 + + /* R5 response (to CMD52 and CMD53) */ +#define SD_RSP_R5_COM_CRC_ERROR 0x80 +#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 +#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 +#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 +#define SD_RSP_R5_ERROR 0x08 +#define SD_RSP_R5_RFU 0x04 +#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 +#define SD_RSP_R5_OUT_OF_RANGE 0x01 + +#define SD_RSP_R5_ERRBITS 0xCB + +/* ------------------------------------------------ + * SDIO Commands and responses + * + * I/O only commands are: + * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 + * ------------------------------------------------ + */ + +/* SDIO Commands */ +#define SDIOH_CMD_0 0 +#define SDIOH_CMD_3 3 +#define SDIOH_CMD_5 5 +#define SDIOH_CMD_7 7 +#define SDIOH_CMD_15 15 +#define SDIOH_CMD_52 52 +#define SDIOH_CMD_53 53 +#define SDIOH_CMD_59 59 + +/* SDIO Command Responses */ +#define SDIOH_RSP_NONE 0 +#define SDIOH_RSP_R1 1 +#define SDIOH_RSP_R2 2 +#define SDIOH_RSP_R3 3 +#define SDIOH_RSP_R4 4 +#define SDIOH_RSP_R5 5 +#define SDIOH_RSP_R6 6 + +/* + * SDIO Response Error flags + */ +#define SDIOH_RSP5_ERROR_FLAGS 0xCB + +/* ------------------------------------------------ + * SDIO Command structures. I/O only commands are: + * + * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 + * ------------------------------------------------ + */ + +#define CMD5_OCR_M BITFIELD_MASK(24) +#define CMD5_OCR_S 0 + +#define CMD7_RCA_M BITFIELD_MASK(16) +#define CMD7_RCA_S 16 + +#define CMD_15_RCA_M BITFIELD_MASK(16) +#define CMD_15_RCA_S 16 + +#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 + */ +#define CMD52_DATA_S 0 +#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ +#define CMD52_REG_ADDR_S 9 +#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ +#define CMD52_RAW_S 27 +#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ +#define CMD52_FUNCTION_S 28 +#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ +#define CMD52_RW_FLAG_S 31 + +#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ +#define CMD53_BYTE_BLK_CNT_S 0 +#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ +#define CMD53_REG_ADDR_S 9 +#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ +#define CMD53_OP_CODE_S 26 +#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ +#define CMD53_BLK_MODE_S 27 +#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ +#define CMD53_FUNCTION_S 28 +#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ +#define CMD53_RW_FLAG_S 31 + +/* ------------------------------------------------------ + * SDIO Command Response structures for SD1 and SD4 modes + * ----------------------------------------------------- + */ +#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ +#define RSP4_IO_OCR_S 0 +#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ +#define RSP4_STUFF_S 24 +#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ +#define RSP4_MEM_PRESENT_S 27 +#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ +#define RSP4_NUM_FUNCS_S 28 +#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ +#define RSP4_CARD_READY_S 31 + +#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] + */ +#define RSP6_STATUS_S 0 +#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ +#define RSP6_IO_RCA_S 16 + +#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ +#define RSP1_AKE_SEQ_ERROR_S 3 +#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ +#define RSP1_APP_CMD_S 5 +#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ +#define RSP1_READY_FOR_DATA_S 8 +#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card + * when Cmd was received + */ +#define RSP1_CURR_STATE_S 9 +#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ +#define RSP1_EARSE_RESET_S 13 +#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ +#define RSP1_CARD_ECC_DISABLE_S 14 +#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ +#define RSP1_WP_ERASE_SKIP_S 15 +#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits + * of CSD + */ +#define RSP1_CID_CSD_OVERW_S 16 +#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ +#define RSP1_ERROR_S 19 +#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ +#define RSP1_CC_ERROR_S 20 +#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed + * to correct data + */ +#define RSP1_CARD_ECC_FAILED_S 21 +#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ +#define RSP1_ILLEGAL_CMD_S 22 +#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed + */ +#define RSP1_COM_CRC_ERROR_S 23 +#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ +#define RSP1_LOCK_UNLOCK_FAIL_S 24 +#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ +#define RSP1_CARD_LOCKED_S 25 +#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program + * write-protected blocks + */ +#define RSP1_WP_VIOLATION_S 26 +#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ +#define RSP1_ERASE_PARAM_S 27 +#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ +#define RSP1_ERASE_SEQ_ERR_S 28 +#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ +#define RSP1_BLK_LEN_ERR_S 29 +#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ +#define RSP1_ADDR_ERR_S 30 +#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ +#define RSP1_OUT_OF_RANGE_S 31 + +#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ +#define RSP5_DATA_S 0 +#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ +#define RSP5_FLAGS_S 8 +#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ +#define RSP5_STUFF_S 16 + +/* ---------------------------------------------- + * SDIO Command Response structures for SPI mode + * ---------------------------------------------- + */ +#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ +#define SPIRSP4_IO_OCR_S 0 +#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ +#define SPIRSP4_STUFF_S 16 +#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ +#define SPIRSP4_MEM_PRESENT_S 19 +#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ +#define SPIRSP4_NUM_FUNCS_S 20 +#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ +#define SPIRSP4_CARD_READY_S 23 +#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ +#define SPIRSP4_IDLE_STATE_S 24 +#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ +#define SPIRSP4_ILLEGAL_CMD_S 26 +#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ +#define SPIRSP4_COM_CRC_ERROR_S 27 +#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error + */ +#define SPIRSP4_FUNC_NUM_ERROR_S 28 +#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ +#define SPIRSP4_PARAM_ERROR_S 30 +#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ +#define SPIRSP4_START_BIT_S 31 + +#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ +#define SPIRSP5_DATA_S 16 +#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ +#define SPIRSP5_IDLE_STATE_S 24 +#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ +#define SPIRSP5_ILLEGAL_CMD_S 26 +#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ +#define SPIRSP5_COM_CRC_ERROR_S 27 +#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error + */ +#define SPIRSP5_FUNC_NUM_ERROR_S 28 +#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ +#define SPIRSP5_PARAM_ERROR_S 30 +#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ +#define SPIRSP5_START_BIT_S 31 + +/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ +#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error + */ +#define RSP6STAT_AKE_SEQ_ERROR_S 3 +#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ +#define RSP6STAT_APP_CMD_S 5 +#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data + * (buff empty) + */ +#define RSP6STAT_READY_FOR_DATA_S 8 +#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at + * Cmd reception + */ +#define RSP6STAT_CURR_STATE_S 9 +#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 + */ +#define RSP6STAT_ERROR_S 13 +#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for + * card state Bit 22 + */ +#define RSP6STAT_ILLEGAL_CMD_S 14 +#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command + * failed Bit 23 + */ +#define RSP6STAT_COM_CRC_ERROR_S 15 + +#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ +#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE + +#endif /* def BCMSDIO */ +#endif /* _SDIO_H */ diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 73587b3..9aec084 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -35,6 +35,134 @@ #include #include +/* slow_clk_ctl */ +#define SCC_SS_MASK 0x00000007 /* slow clock source mask */ +#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */ +#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */ +#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */ +#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */ +#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled, + * 0: LPO is enabled + */ +#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, + * 0: power logic control + */ +#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors + * PLL clock disable requests from core + */ +#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't + * disable crystal when appropriate + */ +#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */ +#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */ +#define SCC_CD_SHIFT 16 + +/* system_clk_ctl */ +#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */ +#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */ +#define SYCC_FP 0x00000004 /* ForcePLLOn */ +#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */ +#define SYCC_HR 0x00000010 /* Force HT */ +#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */ +#define SYCC_CD_SHIFT 16 + +#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ +#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ +#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */ +#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ +#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 +#define CST4329_SPI_SDIO_MODE_SHIFT 2 + +/* 43224 chip-specific ChipControl register bits */ +#define CCTRL43224_GPIO_TOGGLE 0x8000 +#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */ +#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */ + +/* 43236 Chip specific ChipStatus register bits */ +#define CST43236_SFLASH_MASK 0x00000040 +#define CST43236_OTP_MASK 0x00000080 +#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */ +#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */ +#define CST43236_BOOT_MASK 0x00001800 +#define CST43236_BOOT_SHIFT 11 +#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ +#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */ +#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */ +#define CST43236_BOOT_FROM_INVALID 3 + +/* 4331 chip-specific ChipControl register bits */ +#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */ +#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ +#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */ +#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */ +#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */ +#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */ +#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */ +#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */ +#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */ +#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */ +#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */ +#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */ +#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */ +#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */ + +/* 4331 Chip specific ChipStatus register bits */ +#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */ +#define CST4331_SPROM_PRESENT 0x00000002 +#define CST4331_OTP_PRESENT 0x00000004 +#define CST4331_LDO_RF 0x00000008 +#define CST4331_LDO_PAR 0x00000010 + +/* 4319 chip-specific ChipStatus register bits */ +#define CST4319_SPI_CPULESSUSB 0x00000001 +#define CST4319_SPI_CLK_POL 0x00000002 +#define CST4319_SPI_CLK_PH 0x00000008 +#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */ +#define CST4319_SPROM_OTP_SEL_SHIFT 6 +#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ +#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */ +#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */ +#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */ +#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */ +#define CST4319_REMAP_SEL_MASK 0x00000600 +#define CST4319_ILPDIV_EN 0x00000800 +#define CST4319_XTAL_PD_POL 0x00001000 +#define CST4319_LPO_SEL 0x00002000 +#define CST4319_RES_INIT_MODE 0x0000c000 +#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */ +#define CST4319_CBUCK_MODE_MASK 0x00060000 +#define CST4319_CBUCK_MODE_BURST 0x00020000 +#define CST4319_CBUCK_MODE_LPBURST 0x00060000 +#define CST4319_RCAL_VALID 0x01000000 +#define CST4319_RCAL_VALUE_MASK 0x3e000000 +#define CST4319_RCAL_VALUE_SHIFT 25 + +/* 4336 chip-specific ChipStatus register bits */ +#define CST4336_SPI_MODE_MASK 0x00000001 +#define CST4336_SPROM_PRESENT 0x00000002 +#define CST4336_OTP_PRESENT 0x00000004 +#define CST4336_ARMREMAP_0 0x00000008 +#define CST4336_ILPDIV_EN_MASK 0x00000010 +#define CST4336_ILPDIV_EN_SHIFT 4 +#define CST4336_XTAL_PD_POL_MASK 0x00000020 +#define CST4336_XTAL_PD_POL_SHIFT 5 +#define CST4336_LPO_SEL_MASK 0x00000040 +#define CST4336_LPO_SEL_SHIFT 6 +#define CST4336_RES_INIT_MODE_MASK 0x00000180 +#define CST4336_RES_INIT_MODE_SHIFT 7 +#define CST4336_CBUCK_MODE_MASK 0x00000600 +#define CST4336_CBUCK_MODE_SHIFT 9 + +/* 4313 chip-specific ChipStatus register bits */ +#define CST4313_SPROM_PRESENT 1 +#define CST4313_OTP_PRESENT 2 +#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 +#define CST4313_SPROM_OTP_SEL_SHIFT 0 + +/* 4313 Chip specific ChipControl register bits */ +#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */ + #define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \ (sih->chiprev == 0) && \ (sii->coreid[sii->curidx] == MIPS74K_CORE_ID)) diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index b98099e..2941537 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -225,6 +225,52 @@ #define BISZ_BSSEND_IDX 6 /* 6: bss end */ #define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ +#define CC_SROM_OTP 0x800 /* SROM/OTP address space */ + +/* gpiotimerval */ +#define GPIO_ONTIME_SHIFT 16 + +/* Fields in clkdiv */ +#define CLKD_OTP 0x000f0000 +#define CLKD_OTP_SHIFT 16 + +/* When Srom support present, fields in sromcontrol */ +#define SRC_START 0x80000000 +#define SRC_BUSY 0x80000000 +#define SRC_OPCODE 0x60000000 +#define SRC_OP_READ 0x00000000 +#define SRC_OP_WRITE 0x20000000 +#define SRC_OP_WRDIS 0x40000000 +#define SRC_OP_WREN 0x60000000 +#define SRC_OTPSEL 0x00000010 +#define SRC_LOCK 0x00000008 +#define SRC_SIZE_MASK 0x00000006 +#define SRC_SIZE_1K 0x00000000 +#define SRC_SIZE_4K 0x00000002 +#define SRC_SIZE_16K 0x00000004 +#define SRC_SIZE_SHIFT 1 +#define SRC_PRESENT 0x00000001 + +/* 4330 chip-specific ChipStatus register bits */ +#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */ +#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */ +#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */ +#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */ +#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */ +#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */ +#define CST4330_OTP_PRESENT 0x00000010 +#define CST4330_LPO_AUTODET_EN 0x00000020 +#define CST4330_ARMREMAP_0 0x00000040 +#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */ +#define CST4330_ILPDIV_EN 0x00000100 +#define CST4330_LPO_SEL 0x00000200 +#define CST4330_RES_INIT_MODE_SHIFT 10 +#define CST4330_RES_INIT_MODE_MASK 0x00000c00 +#define CST4330_CBUCK_MODE_SHIFT 12 +#define CST4330_CBUCK_MODE_MASK 0x00003000 +#define CST4330_CBUCK_POWER_OK 0x00004000 +#define CST4330_BB_PLL_LOCKED 0x00008000 + #define SI_INFO(sih) (si_info_t *)sih #define GOODCOREADDR(x, b) \ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index d01f60a..aa147c3 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -29,6 +29,37 @@ #include #include +#define OTPS_GUP_MASK 0x00000f00 +#define OTPS_GUP_SHIFT 8 +#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ +#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ +#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ +#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ + +/* Fields in otpprog in rev >= 21 and HND OTP */ +#define OTPP_COL_MASK 0x000000ff +#define OTPP_COL_SHIFT 0 +#define OTPP_ROW_MASK 0x0000ff00 +#define OTPP_ROW_SHIFT 8 +#define OTPP_OC_MASK 0x0f000000 +#define OTPP_OC_SHIFT 24 +#define OTPP_READERR 0x10000000 +#define OTPP_VALUE_MASK 0x20000000 +#define OTPP_VALUE_SHIFT 29 +#define OTPP_START_BUSY 0x80000000 +#define OTPP_READ 0x40000000 /* HND OTP */ + +/* Opcodes for OTPP_OC field */ +#define OTPPOC_READ 0 +#define OTPPOC_BIT_PROG 1 +#define OTPPOC_VERIFY 3 +#define OTPPOC_INIT 4 +#define OTPPOC_SET 5 +#define OTPPOC_RESET 6 +#define OTPPOC_OCST 7 +#define OTPPOC_ROW_LOCK 8 +#define OTPPOC_PRESCN_TEST 9 + /* * There are two different OTP controllers so far: * 1. new IPX OTP controller: chipc 21, >=23 diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index e022224..d1babcd 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -18,7 +18,6 @@ #define _D11_H #include -#include /* cpp contortions to concatenate w/arg prescan */ #ifndef PAD @@ -440,9 +439,6 @@ typedef volatile struct _d11regs { /* SHM *//* 0x800 - 0xEFE */ u16 PAD[0x380]; /* 0x800 - 0xEFE */ - - /* SB configuration registers: 0xF00 */ - sbconfig_t sbconfig; /* sb config regs occupy top 256 bytes */ } d11regs_t; #define PIHR_BASE 0x0400 /* byte address of packed IHR region */ diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 2557255..77baef2 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -31,6 +31,123 @@ #include #endif +/* + * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. + */ +#define D64RINGALIGN_BITS 13 +#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) +#define D64RINGALIGN (1 << D64RINGALIGN_BITS) + +#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) + +/* transmit channel control */ +#define D64_XC_XE 0x00000001 /* transmit enable */ +#define D64_XC_SE 0x00000002 /* transmit suspend request */ +#define D64_XC_LE 0x00000004 /* loopback enable */ +#define D64_XC_FL 0x00000010 /* flush request */ +#define D64_XC_PD 0x00000800 /* parity check disable */ +#define D64_XC_AE 0x00030000 /* address extension bits */ +#define D64_XC_AE_SHIFT 16 + +/* transmit descriptor table pointer */ +#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* transmit channel status */ +#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ +#define D64_XS0_XS_SHIFT 28 +#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ +#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ +#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ +#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ +#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ + +#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ +#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ +#define D64_XS1_XE_SHIFT 28 +#define D64_XS1_XE_NOERR 0x00000000 /* no error */ +#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ +#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ +#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ +#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ +#define D64_XS1_XE_COREE 0x50000000 /* core error */ + +/* receive channel control */ +#define D64_RC_RE 0x00000001 /* receive enable */ +#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ +#define D64_RC_RO_SHIFT 1 +#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ +#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ +#define D64_RC_OC 0x00000400 /* overflow continue */ +#define D64_RC_PD 0x00000800 /* parity check disable */ +#define D64_RC_AE 0x00030000 /* address extension bits */ +#define D64_RC_AE_SHIFT 16 + +/* flags for dma controller */ +#define DMA_CTRL_PEN (1 << 0) /* partity enable */ +#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ +#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ +#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ + +/* receive descriptor table pointer */ +#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* receive channel status */ +#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ +#define D64_RS0_RS_SHIFT 28 +#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ +#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ +#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ +#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ +#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ + +#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ +#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ +#define D64_RS1_RE_SHIFT 28 +#define D64_RS1_RE_NOERR 0x00000000 /* no error */ +#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ +#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ +#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ +#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ +#define D64_RS1_RE_COREE 0x50000000 /* core error */ + +/* fifoaddr */ +#define D64_FA_OFF_MASK 0xffff /* offset */ +#define D64_FA_SEL_MASK 0xf0000 /* select */ +#define D64_FA_SEL_SHIFT 16 +#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ +#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ +#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ +#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ +#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ +#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ +#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ +#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ +#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ +#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ + +/* descriptor control flags 1 */ +#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ +#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ +#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ +#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ +#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ + +/* descriptor control flags 2 */ +#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ +#define D64_CTRL2_AE 0x00030000 /* address extension bits */ +#define D64_CTRL2_AE_SHIFT 16 +#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ + +/* control flags in the range [27:20] are core-specific and not defined here */ +#define D64_CTRL_CORE_MASK 0x0ff00000 + +#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ +#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ +#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ +#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ + /* debug/trace */ #ifdef BCMDBG #define DMA_ERROR(args) \ @@ -69,6 +186,17 @@ static uint dma_msg_level; #define R_SM(r) (*(r)) #define W_SM(r, v) (*(r) = (v)) +/* + * DMA Descriptor + * Descriptors are only read by the hardware, never written back. + */ +typedef volatile struct { + u32 ctrl1; /* misc control bits & bufcount */ + u32 ctrl2; /* buffer count and address extension */ + u32 addrlow; /* memory address of the date buffer, bits 31:0 */ + u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ +} dma64dd_t; + /* dma engine software state */ typedef struct dma_info { struct dma_pub dma; /* exported structure */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 51d56b6..806b2ca 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -29,6 +29,9 @@ #include #include +/* chipcontrol */ +#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ + typedef struct { union { sbpcieregs_t *pcieregs; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c index 123bd6a..620eb86 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c @@ -141,6 +141,10 @@ #define NPHY_ADJUSTED_MINCRSPOWER 0x1e +/* 5357 Chip specific ChipControl register bits */ +#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ +#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ + typedef struct _nphy_iqcal_params { u16 txlpf; u16 txgm; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index ab4ef6c..a7994e4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index c6f9694..7bb122b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index 82986bd..e9230a8 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -128,9 +128,474 @@ #define RES_DEPEND_ADD 1 #define RES_DEPEND_REMOVE -1 +/* Fields in pmucontrol */ +#define PCTL_ILP_DIV_MASK 0xffff0000 +#define PCTL_ILP_DIV_SHIFT 16 +#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ +#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ +#define PCTL_HT_REQ_EN 0x00000100 +#define PCTL_ALP_REQ_EN 0x00000080 +#define PCTL_XTALFREQ_MASK 0x0000007c +#define PCTL_XTALFREQ_SHIFT 2 +#define PCTL_ILP_DIV_EN 0x00000002 +#define PCTL_LPO_SEL 0x00000001 + +/* Fields in clkstretch */ +#define CSTRETCH_HT 0xffff0000 +#define CSTRETCH_ALP 0x0000ffff + /* d11 slow to fast clock transition time in slow clock cycles */ #define D11SCC_SLOW2FAST_TRANSITION 2 +/* ILP clock */ +#define ILP_CLOCK 32000 + +/* ALP clock on pre-PMU chips */ +#define ALP_CLOCK 20000000 + +/* HT clock */ +#define HT_CLOCK 80000000 + +#define OTPS_READY 0x00001000 + +/* pmustatus */ +#define PST_EXTLPOAVAIL 0x0100 +#define PST_WDRESET 0x0080 +#define PST_INTPEND 0x0040 +#define PST_SBCLKST 0x0030 +#define PST_SBCLKST_ILP 0x0010 +#define PST_SBCLKST_ALP 0x0020 +#define PST_SBCLKST_HT 0x0030 +#define PST_ALPAVAIL 0x0008 +#define PST_HTAVAIL 0x0004 +#define PST_RESINIT 0x0003 + +/* PMU Resource Request Timer registers */ +/* This is based on PmuRev0 */ +#define PRRT_TIME_MASK 0x03ff +#define PRRT_INTEN 0x0400 +#define PRRT_REQ_ACTIVE 0x0800 +#define PRRT_ALP_REQ 0x1000 +#define PRRT_HT_REQ 0x2000 + +/* PMU resource bit position */ +#define PMURES_BIT(bit) (1 << (bit)) + +/* PMU resource number limit */ +#define PMURES_MAX_RESNUM 30 + +/* PMU chip control0 register */ +#define PMU_CHIPCTL0 0 + +/* PMU chip control1 register */ +#define PMU_CHIPCTL1 1 +#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 + +#define PMU_CC1_IF_TYPE_MASK 0x00000030 +#define PMU_CC1_IF_TYPE_RMII 0x00000000 +#define PMU_CC1_IF_TYPE_MII 0x00000010 +#define PMU_CC1_IF_TYPE_RGMII 0x00000020 + +#define PMU_CC1_SW_TYPE_MASK 0x000000c0 +#define PMU_CC1_SW_TYPE_EPHY 0x00000000 +#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 +#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 +#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 + +/* PMU corerev and chip specific PLL controls. + * PMU_PLL_XX where is PMU corerev and is an arbitrary number + * to differentiate different PLLs controlled by the same PMU rev. + */ +/* pllcontrol registers */ +/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */ +#define PMU0_PLL0_PLLCTL0 0 +#define PMU0_PLL0_PC0_PDIV_MASK 1 +#define PMU0_PLL0_PC0_PDIV_FREQ 25000 +#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 +#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 +#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 + +/* PC0_DIV_ARM for PLLOUT_ARM */ +#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 +#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 +#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 +#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */ +#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 +#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 +#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 +#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 + +/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */ +#define PMU0_PLL0_PLLCTL1 1 +#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 +#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 +#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 +#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 +#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 + +/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */ +#define PMU0_PLL0_PLLCTL2 2 +#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf +#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 + +/* pllcontrol registers */ +/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ +#define PMU1_PLL0_PLLCTL0 0 +#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 +#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 +#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 +#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 + +/* mdiv */ +#define PMU1_PLL0_PLLCTL1 1 +#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff +#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 +#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 +#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 +#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 +#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 +#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 + +#define PMU1_PLL0_CHIPCTL0 0 +#define PMU1_PLL0_CHIPCTL1 1 +#define PMU1_PLL0_CHIPCTL2 2 + +#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 +#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) +#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) + +/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ +#define PMU1_PLL0_PLLCTL2 2 +#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff +#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 +#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 +#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 +#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 +#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */ +#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 + +/* ndiv_frac */ +#define PMU1_PLL0_PLLCTL3 3 +#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 + +/* pll_ctrl */ +#define PMU1_PLL0_PLLCTL4 4 + +/* pll_ctrl, vco_rng, clkdrive_ch */ +#define PMU1_PLL0_PLLCTL5 5 +#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 +#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 + +/* PMU rev 2 control words */ +#define PMU2_PHY_PLL_PLLCTL 4 +#define PMU2_SI_PLL_PLLCTL 10 + +/* PMU rev 2 */ +/* pllcontrol registers */ +/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ +#define PMU2_PLL_PLLCTL0 0 +#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 +#define PMU2_PLL_PC0_P1DIV_SHIFT 20 +#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 +#define PMU2_PLL_PC0_P2DIV_SHIFT 24 + +/* mdiv */ +#define PMU2_PLL_PLLCTL1 1 +#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff +#define PMU2_PLL_PC1_M1DIV_SHIFT 0 +#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC1_M2DIV_SHIFT 8 +#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 +#define PMU2_PLL_PC1_M3DIV_SHIFT 16 +#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 +#define PMU2_PLL_PC1_M4DIV_SHIFT 24 + +/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ +#define PMU2_PLL_PLLCTL2 2 +#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff +#define PMU2_PLL_PC2_M5DIV_SHIFT 0 +#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC2_M6DIV_SHIFT 8 +#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 +#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 + +/* ndiv_frac */ +#define PMU2_PLL_PLLCTL3 3 +#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 + +/* pll_ctrl */ +#define PMU2_PLL_PLLCTL4 4 + +/* pll_ctrl, vco_rng, clkdrive_ch */ +#define PMU2_PLL_PLLCTL5 5 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 + +/* PMU rev 5 (& 6) */ +#define PMU5_PLL_P1P2_OFF 0 +#define PMU5_PLL_P1_MASK 0x0f000000 +#define PMU5_PLL_P1_SHIFT 24 +#define PMU5_PLL_P2_MASK 0x00f00000 +#define PMU5_PLL_P2_SHIFT 20 +#define PMU5_PLL_M14_OFF 1 +#define PMU5_PLL_MDIV_MASK 0x000000ff +#define PMU5_PLL_MDIV_WIDTH 8 +#define PMU5_PLL_NM5_OFF 2 +#define PMU5_PLL_NDIV_MASK 0xfff00000 +#define PMU5_PLL_NDIV_SHIFT 20 +#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 +#define PMU5_PLL_NDIV_MODE_SHIFT 17 +#define PMU5_PLL_FMAB_OFF 3 +#define PMU5_PLL_MRAT_MASK 0xf0000000 +#define PMU5_PLL_MRAT_SHIFT 28 +#define PMU5_PLL_ABRAT_MASK 0x08000000 +#define PMU5_PLL_ABRAT_SHIFT 27 +#define PMU5_PLL_FDIV_MASK 0x07ffffff +#define PMU5_PLL_PLLCTL_OFF 4 +#define PMU5_PLL_PCHI_OFF 5 +#define PMU5_PLL_PCHI_MASK 0x0000003f + +/* pmu XtalFreqRatio */ +#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF +#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 +#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 + +/* Divider allocation in 4716/47162/5356/5357 */ +#define PMU5_MAINPLL_CPU 1 +#define PMU5_MAINPLL_MEM 2 +#define PMU5_MAINPLL_SI 3 + +#define PMU7_PLL_PLLCTL7 7 +#define PMU7_PLL_PLLCTL8 8 +#define PMU7_PLL_PLLCTL11 11 + +/* PLL usage in 4716/47162 */ +#define PMU4716_MAINPLL_PLL0 12 + +/* PLL usage in 5356/5357 */ +#define PMU5356_MAINPLL_PLL0 0 +#define PMU5357_MAINPLL_PLL0 0 + +/* 4328 resources */ +#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */ +#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */ +#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */ +#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ +#define RES4328_ILP_REQUEST 4 /* 0x00010 */ +#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */ +#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */ +#define RES4328_ROM_SWITCH 7 /* 0x00080 */ +#define RES4328_PA_REF_LDO 8 /* 0x00100 */ +#define RES4328_RADIO_LDO 9 /* 0x00200 */ +#define RES4328_AFE_LDO 10 /* 0x00400 */ +#define RES4328_PLL_LDO 11 /* 0x00800 */ +#define RES4328_BG_FILTBYP 12 /* 0x01000 */ +#define RES4328_TX_FILTBYP 13 /* 0x02000 */ +#define RES4328_RX_FILTBYP 14 /* 0x04000 */ +#define RES4328_XTAL_PU 15 /* 0x08000 */ +#define RES4328_XTAL_EN 16 /* 0x10000 */ +#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */ +#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */ +#define RES4328_BB_PLL_PU 19 /* 0x80000 */ + +/* 4325 A0/A1 resources */ +#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */ +#define RES4325_CBUCK_BURST 1 /* 0x00000002 */ +#define RES4325_CBUCK_PWM 2 /* 0x00000004 */ +#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */ +#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */ +#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */ +#define RES4325_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4325_ABUCK_BURST 7 /* 0x00000080 */ +#define RES4325_ABUCK_PWM 8 /* 0x00000100 */ +#define RES4325_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4325_OTP_PU 10 /* 0x00000400 */ +#define RES4325_LNLDO3_PU 11 /* 0x00000800 */ +#define RES4325_LNLDO4_PU 12 /* 0x00001000 */ +#define RES4325_XTAL_PU 13 /* 0x00002000 */ +#define RES4325_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4325_HT_AVAIL 21 /* 0x00200000 */ + +/* 4325 B0/C0 resources */ +#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4325B0_CLDO_PU 4 /* 0x00000010 */ + +/* 4325 C1 resources */ +#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */ + +#define RES4329_RESERVED0 0 /* 0x00000001 */ +#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4329_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4329_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4329_CLDO_PU 4 /* 0x00000010 */ +#define RES4329_PALDO_PU 5 /* 0x00000020 */ +#define RES4329_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4329_RESERVED7 7 /* 0x00000080 */ +#define RES4329_RESERVED8 8 /* 0x00000100 */ +#define RES4329_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4329_OTP_PU 10 /* 0x00000400 */ +#define RES4329_RESERVED11 11 /* 0x00000800 */ +#define RES4329_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4329_XTAL_PU 13 /* 0x00002000 */ +#define RES4329_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4329_HT_AVAIL 21 /* 0x00200000 */ + +/* 4315 resources */ +#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4315_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4315_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4315_CLDO_PU 4 /* 0x00000010 */ +#define RES4315_PALDO_PU 5 /* 0x00000020 */ +#define RES4315_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4315_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4315_OTP_PU 10 /* 0x00000400 */ +#define RES4315_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4315_XTAL_PU 13 /* 0x00002000 */ +#define RES4315_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4315_HT_AVAIL 21 /* 0x00200000 */ + +/* 4319 resources */ +#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4319_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4319_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4319_CLDO_PU 4 /* 0x00000010 */ +#define RES4319_PALDO_PU 5 /* 0x00000020 */ +#define RES4319_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4319_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4319_OTP_PU 10 /* 0x00000400 */ +#define RES4319_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4319_XTAL_PU 13 /* 0x00002000 */ +#define RES4319_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4319_HT_AVAIL 21 /* 0x00200000 */ + +#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 +#define CCTL_4319USB_XTAL_SEL_SHIFT 19 +#define CCTL_4319USB_48MHZ_PLL_SEL 1 +#define CCTL_4319USB_24MHZ_PLL_SEL 2 + +/* PMU resources for 4336 */ +#define RES4336_CBUCK_LPOM 0 +#define RES4336_CBUCK_BURST 1 +#define RES4336_CBUCK_LP_PWM 2 +#define RES4336_CBUCK_PWM 3 +#define RES4336_CLDO_PU 4 +#define RES4336_DIS_INT_RESET_PD 5 +#define RES4336_ILP_REQUEST 6 +#define RES4336_LNLDO_PU 7 +#define RES4336_LDO3P3_PU 8 +#define RES4336_OTP_PU 9 +#define RES4336_XTAL_PU 10 +#define RES4336_ALP_AVAIL 11 +#define RES4336_RADIO_PU 12 +#define RES4336_BG_PU 13 +#define RES4336_VREG1p4_PU_PU 14 +#define RES4336_AFE_PWRSW_PU 15 +#define RES4336_RX_PWRSW_PU 16 +#define RES4336_TX_PWRSW_PU 17 +#define RES4336_BB_PWRSW_PU 18 +#define RES4336_SYNTH_PWRSW_PU 19 +#define RES4336_MISC_PWRSW_PU 20 +#define RES4336_LOGEN_PWRSW_PU 21 +#define RES4336_BBPLL_PWRSW_PU 22 +#define RES4336_MACPHY_CLKAVAIL 23 +#define RES4336_HT_AVAIL 24 +#define RES4336_RSVD 25 + +/* 4330 resources */ +#define RES4330_CBUCK_LPOM 0 +#define RES4330_CBUCK_BURST 1 +#define RES4330_CBUCK_LP_PWM 2 +#define RES4330_CBUCK_PWM 3 +#define RES4330_CLDO_PU 4 +#define RES4330_DIS_INT_RESET_PD 5 +#define RES4330_ILP_REQUEST 6 +#define RES4330_LNLDO_PU 7 +#define RES4330_LDO3P3_PU 8 +#define RES4330_OTP_PU 9 +#define RES4330_XTAL_PU 10 +#define RES4330_ALP_AVAIL 11 +#define RES4330_RADIO_PU 12 +#define RES4330_BG_PU 13 +#define RES4330_VREG1p4_PU_PU 14 +#define RES4330_AFE_PWRSW_PU 15 +#define RES4330_RX_PWRSW_PU 16 +#define RES4330_TX_PWRSW_PU 17 +#define RES4330_BB_PWRSW_PU 18 +#define RES4330_SYNTH_PWRSW_PU 19 +#define RES4330_MISC_PWRSW_PU 20 +#define RES4330_LOGEN_PWRSW_PU 21 +#define RES4330_BBPLL_PWRSW_PU 22 +#define RES4330_MACPHY_CLKAVAIL 23 +#define RES4330_HT_AVAIL 24 +#define RES4330_5gRX_PWRSW_PU 25 +#define RES4330_5gTX_PWRSW_PU 26 +#define RES4330_5g_LOGEN_PWRSW_PU 27 + +/* 4313 resources */ +#define RES4313_BB_PU_RSRC 0 +#define RES4313_ILP_REQ_RSRC 1 +#define RES4313_XTAL_PU_RSRC 2 +#define RES4313_ALP_AVAIL_RSRC 3 +#define RES4313_RADIO_PU_RSRC 4 +#define RES4313_BG_PU_RSRC 5 +#define RES4313_VREG1P4_PU_RSRC 6 +#define RES4313_AFE_PWRSW_RSRC 7 +#define RES4313_RX_PWRSW_RSRC 8 +#define RES4313_TX_PWRSW_RSRC 9 +#define RES4313_BB_PWRSW_RSRC 10 +#define RES4313_SYNTH_PWRSW_RSRC 11 +#define RES4313_MISC_PWRSW_RSRC 12 +#define RES4313_BB_PLL_PWRSW_RSRC 13 +#define RES4313_HT_AVAIL_RSRC 14 +#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 + +/* PMU resource up transition time in ILP cycles */ +#define PMURES_UP_TRANSITION 2 + /* Setup resource up/down timers */ typedef struct { u8 resnum; diff --git a/drivers/staging/brcm80211/include/sbchipc.h b/drivers/staging/brcm80211/include/sbchipc.h index 8c01c63..9ca2e69 100644 --- a/drivers/staging/brcm80211/include/sbchipc.h +++ b/drivers/staging/brcm80211/include/sbchipc.h @@ -17,8 +17,6 @@ #ifndef _SBCHIPC_H #define _SBCHIPC_H -#ifndef _LANGUAGE_ASSEMBLY - /* cpp contortions to concatenate w/arg prescan */ #ifndef PAD #define _PADLINE(line) pad ## line @@ -223,63 +221,6 @@ typedef volatile struct { u16 sromotp[768]; } chipcregs_t; -#endif /* _LANGUAGE_ASSEMBLY */ - -#if defined(__BIG_ENDIAN) && defined(BCMHND74K) -/* Selective swapped defines for those registers we need in - * big-endian code. - */ -#define CC_CHIPID 4 -#define CC_CAPABILITIES 0 -#define CC_CHIPST 0x28 -#define CC_EROMPTR 0xf8 - -#else /* !__BIG_ENDIAN || !BCMHND74K */ - -#define CC_CHIPID 0 -#define CC_CAPABILITIES 4 -#define CC_CHIPST 0x2c -#define CC_EROMPTR 0xfc - -#endif /* __BIG_ENDIAN && BCMHND74K */ - -#define CC_OTPST 0x10 -#define CC_JTAGCMD 0x30 -#define CC_JTAGIR 0x34 -#define CC_JTAGDR 0x38 -#define CC_JTAGCTRL 0x3c -#define CC_GPIOPU 0x58 -#define CC_GPIOPD 0x5c -#define CC_GPIOIN 0x60 -#define CC_GPIOOUT 0x64 -#define CC_GPIOOUTEN 0x68 -#define CC_GPIOCTRL 0x6c -#define CC_GPIOPOL 0x70 -#define CC_GPIOINTM 0x74 -#define CC_WATCHDOG 0x80 -#define CC_CLKC_N 0x90 -#define CC_CLKC_M0 0x94 -#define CC_CLKC_M1 0x98 -#define CC_CLKC_M2 0x9c -#define CC_CLKC_M3 0xa0 -#define CC_CLKDIV 0xa4 -#define CC_SYS_CLK_CTL 0xc0 -#define CC_CLK_CTL_ST SI_CLK_CTL_ST -#define PMU_CTL 0x600 -#define PMU_CAP 0x604 -#define PMU_ST 0x608 -#define PMU_RES_STATE 0x60c -#define PMU_TIMER 0x614 -#define PMU_MIN_RES_MASK 0x618 -#define PMU_MAX_RES_MASK 0x61c -#define CC_CHIPCTL_ADDR 0x650 -#define CC_CHIPCTL_DATA 0x654 -#define PMU_REG_CONTROL_ADDR 0x658 -#define PMU_REG_CONTROL_DATA 0x65C -#define PMU_PLL_CONTROL_ADDR 0x660 -#define PMU_PLL_CONTROL_DATA 0x664 -#define CC_SROM_OTP 0x800 /* SROM/OTP address space */ - /* chipid */ #define CID_ID_MASK 0x0000ffff /* Chip Id mask */ #define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ @@ -317,504 +258,6 @@ typedef volatile struct { #define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */ #define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */ -/* PLL type */ -#define PLL_NONE 0x00000000 -#define PLL_TYPE1 0x00010000 /* 48MHz base, 3 dividers */ -#define PLL_TYPE2 0x00020000 /* 48MHz, 4 dividers */ -#define PLL_TYPE3 0x00030000 /* 25MHz, 2 dividers */ -#define PLL_TYPE4 0x00008000 /* 48MHz, 4 dividers */ -#define PLL_TYPE5 0x00018000 /* 25MHz, 4 dividers */ -#define PLL_TYPE6 0x00028000 /* 100/200 or 120/240 only */ -#define PLL_TYPE7 0x00038000 /* 25MHz, 4 dividers */ - -/* ILP clock */ -#define ILP_CLOCK 32000 - -/* ALP clock on pre-PMU chips */ -#define ALP_CLOCK 20000000 - -/* HT clock */ -#define HT_CLOCK 80000000 - -/* corecontrol */ -#define CC_UARTCLKO 0x00000001 /* Drive UART with internal clock */ -#define CC_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ -#define CC_UARTCLKEN 0x00000008 /* enable UART Clock (corerev > = 21 */ - -/* chipcontrol */ -#define CHIPCTRL_4321A0_DEFAULT 0x3a4 -#define CHIPCTRL_4321A1_DEFAULT 0x0a4 -#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ - -/* Fields in the otpstatus register in rev >= 21 */ -#define OTPS_OL_MASK 0x000000ff -#define OTPS_OL_MFG 0x00000001 /* manuf row is locked */ -#define OTPS_OL_OR1 0x00000002 /* otp redundancy row 1 is locked */ -#define OTPS_OL_OR2 0x00000004 /* otp redundancy row 2 is locked */ -#define OTPS_OL_GU 0x00000008 /* general use region is locked */ -#define OTPS_GUP_MASK 0x00000f00 -#define OTPS_GUP_SHIFT 8 -#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ -#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ -#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ -#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ -#define OTPS_READY 0x00001000 -#define OTPS_RV(x) (1 << (16 + (x))) /* redundancy entry valid */ -#define OTPS_RV_MASK 0x0fff0000 - -/* Fields in the otpcontrol register in rev >= 21 */ -#define OTPC_PROGSEL 0x00000001 -#define OTPC_PCOUNT_MASK 0x0000000e -#define OTPC_PCOUNT_SHIFT 1 -#define OTPC_VSEL_MASK 0x000000f0 -#define OTPC_VSEL_SHIFT 4 -#define OTPC_TMM_MASK 0x00000700 -#define OTPC_TMM_SHIFT 8 -#define OTPC_ODM 0x00000800 -#define OTPC_PROGEN 0x80000000 - -/* Fields in otpprog in rev >= 21 and HND OTP */ -#define OTPP_COL_MASK 0x000000ff -#define OTPP_COL_SHIFT 0 -#define OTPP_ROW_MASK 0x0000ff00 -#define OTPP_ROW_SHIFT 8 -#define OTPP_OC_MASK 0x0f000000 -#define OTPP_OC_SHIFT 24 -#define OTPP_READERR 0x10000000 -#define OTPP_VALUE_MASK 0x20000000 -#define OTPP_VALUE_SHIFT 29 -#define OTPP_START_BUSY 0x80000000 -#define OTPP_READ 0x40000000 /* HND OTP */ - -/* otplayout reg corerev >= 36 */ -#define OTP_CISFORMAT_NEW 0x80000000 - -/* Opcodes for OTPP_OC field */ -#define OTPPOC_READ 0 -#define OTPPOC_BIT_PROG 1 -#define OTPPOC_VERIFY 3 -#define OTPPOC_INIT 4 -#define OTPPOC_SET 5 -#define OTPPOC_RESET 6 -#define OTPPOC_OCST 7 -#define OTPPOC_ROW_LOCK 8 -#define OTPPOC_PRESCN_TEST 9 - -/* Jtagm characteristics that appeared at a given corerev */ -#define JTAGM_CREV_OLD 10 /* Old command set, 16bit max IR */ -#define JTAGM_CREV_IRP 22 /* Able to do pause-ir */ -#define JTAGM_CREV_RTI 28 /* Able to do return-to-idle */ - -/* jtagcmd */ -#define JCMD_START 0x80000000 -#define JCMD_BUSY 0x80000000 -#define JCMD_STATE_MASK 0x60000000 -#define JCMD_STATE_TLR 0x00000000 /* Test-logic-reset */ -#define JCMD_STATE_PIR 0x20000000 /* Pause IR */ -#define JCMD_STATE_PDR 0x40000000 /* Pause DR */ -#define JCMD_STATE_RTI 0x60000000 /* Run-test-idle */ -#define JCMD0_ACC_MASK 0x0000f000 -#define JCMD0_ACC_IRDR 0x00000000 -#define JCMD0_ACC_DR 0x00001000 -#define JCMD0_ACC_IR 0x00002000 -#define JCMD0_ACC_RESET 0x00003000 -#define JCMD0_ACC_IRPDR 0x00004000 -#define JCMD0_ACC_PDR 0x00005000 -#define JCMD0_IRW_MASK 0x00000f00 -#define JCMD_ACC_MASK 0x000f0000 /* Changes for corerev 11 */ -#define JCMD_ACC_IRDR 0x00000000 -#define JCMD_ACC_DR 0x00010000 -#define JCMD_ACC_IR 0x00020000 -#define JCMD_ACC_RESET 0x00030000 -#define JCMD_ACC_IRPDR 0x00040000 -#define JCMD_ACC_PDR 0x00050000 -#define JCMD_ACC_PIR 0x00060000 -#define JCMD_ACC_IRDR_I 0x00070000 /* rev 28: return to run-test-idle */ -#define JCMD_ACC_DR_I 0x00080000 /* rev 28: return to run-test-idle */ -#define JCMD_IRW_MASK 0x00001f00 -#define JCMD_IRW_SHIFT 8 -#define JCMD_DRW_MASK 0x0000003f - -/* jtagctrl */ -#define JCTRL_FORCE_CLK 4 /* Force clock */ -#define JCTRL_EXT_EN 2 /* Enable external targets */ -#define JCTRL_EN 1 /* Enable Jtag master */ - -/* Fields in clkdiv */ -#define CLKD_SFLASH 0x0f000000 -#define CLKD_SFLASH_SHIFT 24 -#define CLKD_OTP 0x000f0000 -#define CLKD_OTP_SHIFT 16 -#define CLKD_JTAG 0x00000f00 -#define CLKD_JTAG_SHIFT 8 -#define CLKD_UART 0x000000ff - -#define CLKD2_SROM 0x00000003 - -/* intstatus/intmask */ -#define CI_GPIO 0x00000001 /* gpio intr */ -#define CI_EI 0x00000002 /* extif intr (corerev >= 3) */ -#define CI_TEMP 0x00000004 /* temp. ctrl intr (corerev >= 15) */ -#define CI_SIRQ 0x00000008 /* serial IRQ intr (corerev >= 15) */ -#define CI_PMU 0x00000020 /* pmu intr (corerev >= 21) */ -#define CI_UART 0x00000040 /* uart intr (corerev >= 21) */ -#define CI_WDRESET 0x80000000 /* watchdog reset occurred */ - -/* slow_clk_ctl */ -#define SCC_SS_MASK 0x00000007 /* slow clock source mask */ -#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */ -#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */ -#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */ -#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */ -#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled, - * 0: LPO is enabled - */ -#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, - * 0: power logic control - */ -#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors - * PLL clock disable requests from core - */ -#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't - * disable crystal when appropriate - */ -#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */ -#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */ -#define SCC_CD_SHIFT 16 - -/* system_clk_ctl */ -#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */ -#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */ -#define SYCC_FP 0x00000004 /* ForcePLLOn */ -#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */ -#define SYCC_HR 0x00000010 /* Force HT */ -#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */ -#define SYCC_CD_SHIFT 16 - -/* Indirect backplane access */ -#define BPIA_BYTEEN 0x0000000f -#define BPIA_SZ1 0x00000001 -#define BPIA_SZ2 0x00000003 -#define BPIA_SZ4 0x00000007 -#define BPIA_SZ8 0x0000000f -#define BPIA_WRITE 0x00000100 -#define BPIA_START 0x00000200 -#define BPIA_BUSY 0x00000200 -#define BPIA_ERROR 0x00000400 - -/* pcmcia/prog/flash_config */ -#define CF_EN 0x00000001 /* enable */ -#define CF_EM_MASK 0x0000000e /* mode */ -#define CF_EM_SHIFT 1 -#define CF_EM_FLASH 0 /* flash/asynchronous mode */ -#define CF_EM_SYNC 2 /* synchronous mode */ -#define CF_EM_PCMCIA 4 /* pcmcia mode */ -#define CF_DS 0x00000010 /* destsize: 0=8bit, 1=16bit */ -#define CF_BS 0x00000020 /* byteswap */ -#define CF_CD_MASK 0x000000c0 /* clock divider */ -#define CF_CD_SHIFT 6 -#define CF_CD_DIV2 0x00000000 /* backplane/2 */ -#define CF_CD_DIV3 0x00000040 /* backplane/3 */ -#define CF_CD_DIV4 0x00000080 /* backplane/4 */ -#define CF_CE 0x00000100 /* clock enable */ -#define CF_SB 0x00000200 /* size/bytestrobe (synch only) */ - -/* pcmcia_memwait */ -#define PM_W0_MASK 0x0000003f /* waitcount0 */ -#define PM_W1_MASK 0x00001f00 /* waitcount1 */ -#define PM_W1_SHIFT 8 -#define PM_W2_MASK 0x001f0000 /* waitcount2 */ -#define PM_W2_SHIFT 16 -#define PM_W3_MASK 0x1f000000 /* waitcount3 */ -#define PM_W3_SHIFT 24 - -/* pcmcia_attrwait */ -#define PA_W0_MASK 0x0000003f /* waitcount0 */ -#define PA_W1_MASK 0x00001f00 /* waitcount1 */ -#define PA_W1_SHIFT 8 -#define PA_W2_MASK 0x001f0000 /* waitcount2 */ -#define PA_W2_SHIFT 16 -#define PA_W3_MASK 0x1f000000 /* waitcount3 */ -#define PA_W3_SHIFT 24 - -/* pcmcia_iowait */ -#define PI_W0_MASK 0x0000003f /* waitcount0 */ -#define PI_W1_MASK 0x00001f00 /* waitcount1 */ -#define PI_W1_SHIFT 8 -#define PI_W2_MASK 0x001f0000 /* waitcount2 */ -#define PI_W2_SHIFT 16 -#define PI_W3_MASK 0x1f000000 /* waitcount3 */ -#define PI_W3_SHIFT 24 - -/* prog_waitcount */ -#define PW_W0_MASK 0x0000001f /* waitcount0 */ -#define PW_W1_MASK 0x00001f00 /* waitcount1 */ -#define PW_W1_SHIFT 8 -#define PW_W2_MASK 0x001f0000 /* waitcount2 */ -#define PW_W2_SHIFT 16 -#define PW_W3_MASK 0x1f000000 /* waitcount3 */ -#define PW_W3_SHIFT 24 - -#define PW_W0 0x0000000c -#define PW_W1 0x00000a00 -#define PW_W2 0x00020000 -#define PW_W3 0x01000000 - -/* flash_waitcount */ -#define FW_W0_MASK 0x0000003f /* waitcount0 */ -#define FW_W1_MASK 0x00001f00 /* waitcount1 */ -#define FW_W1_SHIFT 8 -#define FW_W2_MASK 0x001f0000 /* waitcount2 */ -#define FW_W2_SHIFT 16 -#define FW_W3_MASK 0x1f000000 /* waitcount3 */ -#define FW_W3_SHIFT 24 - -/* When Srom support present, fields in sromcontrol */ -#define SRC_START 0x80000000 -#define SRC_BUSY 0x80000000 -#define SRC_OPCODE 0x60000000 -#define SRC_OP_READ 0x00000000 -#define SRC_OP_WRITE 0x20000000 -#define SRC_OP_WRDIS 0x40000000 -#define SRC_OP_WREN 0x60000000 -#define SRC_OTPSEL 0x00000010 -#define SRC_LOCK 0x00000008 -#define SRC_SIZE_MASK 0x00000006 -#define SRC_SIZE_1K 0x00000000 -#define SRC_SIZE_4K 0x00000002 -#define SRC_SIZE_16K 0x00000004 -#define SRC_SIZE_SHIFT 1 -#define SRC_PRESENT 0x00000001 - -/* Fields in pmucontrol */ -#define PCTL_ILP_DIV_MASK 0xffff0000 -#define PCTL_ILP_DIV_SHIFT 16 -#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ -#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ -#define PCTL_HT_REQ_EN 0x00000100 -#define PCTL_ALP_REQ_EN 0x00000080 -#define PCTL_XTALFREQ_MASK 0x0000007c -#define PCTL_XTALFREQ_SHIFT 2 -#define PCTL_ILP_DIV_EN 0x00000002 -#define PCTL_LPO_SEL 0x00000001 - -/* Fields in clkstretch */ -#define CSTRETCH_HT 0xffff0000 -#define CSTRETCH_ALP 0x0000ffff - -/* gpiotimerval */ -#define GPIO_ONTIME_SHIFT 16 - -/* clockcontrol_n */ -#define CN_N1_MASK 0x3f /* n1 control */ -#define CN_N2_MASK 0x3f00 /* n2 control */ -#define CN_N2_SHIFT 8 -#define CN_PLLC_MASK 0xf0000 /* pll control */ -#define CN_PLLC_SHIFT 16 - -/* clockcontrol_sb/pci/uart */ -#define CC_M1_MASK 0x3f /* m1 control */ -#define CC_M2_MASK 0x3f00 /* m2 control */ -#define CC_M2_SHIFT 8 -#define CC_M3_MASK 0x3f0000 /* m3 control */ -#define CC_M3_SHIFT 16 -#define CC_MC_MASK 0x1f000000 /* mux control */ -#define CC_MC_SHIFT 24 - -/* N3M Clock control magic field values */ -#define CC_F6_2 0x02 /* A factor of 2 in */ -#define CC_F6_3 0x03 /* 6-bit fields like */ -#define CC_F6_4 0x05 /* N1, M1 or M3 */ -#define CC_F6_5 0x09 -#define CC_F6_6 0x11 -#define CC_F6_7 0x21 - -#define CC_F5_BIAS 5 /* 5-bit fields get this added */ - -#define CC_MC_BYPASS 0x08 -#define CC_MC_M1 0x04 -#define CC_MC_M1M2 0x02 -#define CC_MC_M1M2M3 0x01 -#define CC_MC_M1M3 0x11 - -/* Type 2 Clock control magic field values */ -#define CC_T2_BIAS 2 /* n1, n2, m1 & m3 bias */ -#define CC_T2M2_BIAS 3 /* m2 bias */ - -#define CC_T2MC_M1BYP 1 -#define CC_T2MC_M2BYP 2 -#define CC_T2MC_M3BYP 4 - -/* Type 6 Clock control magic field values */ -#define CC_T6_MMASK 1 /* bits of interest in m */ -#define CC_T6_M0 120000000 /* sb clock for m = 0 */ -#define CC_T6_M1 100000000 /* sb clock for m = 1 */ -#define SB2MIPS_T6(sb) (2 * (sb)) - -/* Common clock base */ -#define CC_CLOCK_BASE1 24000000 /* Half the clock freq */ -#define CC_CLOCK_BASE2 12500000 /* Alternate crystal on some PLLs */ - -/* Clock control values for 200MHz in 5350 */ -#define CLKC_5350_N 0x0311 -#define CLKC_5350_M 0x04020009 - -/* Flash types in the chipcommon capabilities register */ -#define FLASH_NONE 0x000 /* No flash */ -#define SFLASH_ST 0x100 /* ST serial flash */ -#define SFLASH_AT 0x200 /* Atmel serial flash */ -#define PFLASH 0x700 /* Parallel flash */ - -/* Bits in the ExtBus config registers */ -#define CC_CFG_EN 0x0001 /* Enable */ -#define CC_CFG_EM_MASK 0x000e /* Extif Mode */ -#define CC_CFG_EM_ASYNC 0x0000 /* Async/Parallel flash */ -#define CC_CFG_EM_SYNC 0x0002 /* Synchronous */ -#define CC_CFG_EM_PCMCIA 0x0004 /* PCMCIA */ -#define CC_CFG_EM_IDE 0x0006 /* IDE */ -#define CC_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */ -#define CC_CFG_CD_MASK 0x00e0 /* Sync: Clock divisor, rev >= 20 */ -#define CC_CFG_CE 0x0100 /* Sync: Clock enable, rev >= 20 */ -#define CC_CFG_SB 0x0200 /* Sync: Size/Bytestrobe, rev >= 20 */ -#define CC_CFG_IS 0x0400 /* Extif Sync Clk Select, rev >= 20 */ - -/* ExtBus address space */ -#define CC_EB_BASE 0x1a000000 /* Chipc ExtBus base address */ -#define CC_EB_PCMCIA_MEM 0x1a000000 /* PCMCIA 0 memory base address */ -#define CC_EB_PCMCIA_IO 0x1a200000 /* PCMCIA 0 I/O base address */ -#define CC_EB_PCMCIA_CFG 0x1a400000 /* PCMCIA 0 config base address */ -#define CC_EB_IDE 0x1a800000 /* IDE memory base */ -#define CC_EB_PCMCIA1_MEM 0x1a800000 /* PCMCIA 1 memory base address */ -#define CC_EB_PCMCIA1_IO 0x1aa00000 /* PCMCIA 1 I/O base address */ -#define CC_EB_PCMCIA1_CFG 0x1ac00000 /* PCMCIA 1 config base address */ -#define CC_EB_PROGIF 0x1b000000 /* ProgIF Async/Sync base address */ - -/* Start/busy bit in flashcontrol */ -#define SFLASH_OPCODE 0x000000ff -#define SFLASH_ACTION 0x00000700 -#define SFLASH_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */ -#define SFLASH_START 0x80000000 -#define SFLASH_BUSY SFLASH_START - -/* flashcontrol action codes */ -#define SFLASH_ACT_OPONLY 0x0000 /* Issue opcode only */ -#define SFLASH_ACT_OP1D 0x0100 /* opcode + 1 data byte */ -#define SFLASH_ACT_OP3A 0x0200 /* opcode + 3 addr bytes */ -#define SFLASH_ACT_OP3A1D 0x0300 /* opcode + 3 addr & 1 data bytes */ -#define SFLASH_ACT_OP3A4D 0x0400 /* opcode + 3 addr & 4 data bytes */ -#define SFLASH_ACT_OP3A4X4D 0x0500 /* opcode + 3 addr, 4 don't care & 4 data bytes */ -#define SFLASH_ACT_OP3A1X4D 0x0700 /* opcode + 3 addr, 1 don't care & 4 data bytes */ - -/* flashcontrol action+opcodes for ST flashes */ -#define SFLASH_ST_WREN 0x0006 /* Write Enable */ -#define SFLASH_ST_WRDIS 0x0004 /* Write Disable */ -#define SFLASH_ST_RDSR 0x0105 /* Read Status Register */ -#define SFLASH_ST_WRSR 0x0101 /* Write Status Register */ -#define SFLASH_ST_READ 0x0303 /* Read Data Bytes */ -#define SFLASH_ST_PP 0x0302 /* Page Program */ -#define SFLASH_ST_SE 0x02d8 /* Sector Erase */ -#define SFLASH_ST_BE 0x00c7 /* Bulk Erase */ -#define SFLASH_ST_DP 0x00b9 /* Deep Power-down */ -#define SFLASH_ST_RES 0x03ab /* Read Electronic Signature */ -#define SFLASH_ST_CSA 0x1000 /* Keep chip select asserted */ -#define SFLASH_ST_SSE 0x0220 /* Sub-sector Erase */ - -/* Status register bits for ST flashes */ -#define SFLASH_ST_WIP 0x01 /* Write In Progress */ -#define SFLASH_ST_WEL 0x02 /* Write Enable Latch */ -#define SFLASH_ST_BP_MASK 0x1c /* Block Protect */ -#define SFLASH_ST_BP_SHIFT 2 -#define SFLASH_ST_SRWD 0x80 /* Status Register Write Disable */ - -/* flashcontrol action+opcodes for Atmel flashes */ -#define SFLASH_AT_READ 0x07e8 -#define SFLASH_AT_PAGE_READ 0x07d2 -#define SFLASH_AT_BUF1_READ -#define SFLASH_AT_BUF2_READ -#define SFLASH_AT_STATUS 0x01d7 -#define SFLASH_AT_BUF1_WRITE 0x0384 -#define SFLASH_AT_BUF2_WRITE 0x0387 -#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283 -#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286 -#define SFLASH_AT_BUF1_PROGRAM 0x0288 -#define SFLASH_AT_BUF2_PROGRAM 0x0289 -#define SFLASH_AT_PAGE_ERASE 0x0281 -#define SFLASH_AT_BLOCK_ERASE 0x0250 -#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 -#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 -#define SFLASH_AT_BUF1_LOAD 0x0253 -#define SFLASH_AT_BUF2_LOAD 0x0255 -#define SFLASH_AT_BUF1_COMPARE 0x0260 -#define SFLASH_AT_BUF2_COMPARE 0x0261 -#define SFLASH_AT_BUF1_REPROGRAM 0x0258 -#define SFLASH_AT_BUF2_REPROGRAM 0x0259 - -/* Status register bits for Atmel flashes */ -#define SFLASH_AT_READY 0x80 -#define SFLASH_AT_MISMATCH 0x40 -#define SFLASH_AT_ID_MASK 0x38 -#define SFLASH_AT_ID_SHIFT 3 - -/* - * These are the UART port assignments, expressed as offsets from the base - * register. These assignments should hold for any serial port based on - * a 8250, 16450, or 16550(A). - */ - -#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ -#define UART_IER 1 /* In/Out: Interrupt Enable Register (DLAB=0) */ -#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IIR 2 /* In: Interrupt Identity Register */ -#define UART_FCR 2 /* Out: FIFO Control Register */ -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_WLEN8 0x03 /* Word length: 8 bits */ -#define UART_MCR_OUT2 0x08 /* MCR GPIO out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ -#define UART_LSR_RX_FIFO 0x80 /* Receive FIFO error */ -#define UART_LSR_TDHR 0x40 /* Data-hold-register empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BREAK 0x10 /* Break interrupt */ -#define UART_LSR_FRAMING 0x08 /* Framing error */ -#define UART_LSR_PARITY 0x04 /* Parity error */ -#define UART_LSR_OVERRUN 0x02 /* Overrun error */ -#define UART_LSR_RXRDY 0x01 /* Receiver ready */ -#define UART_FCR_FIFO_ENABLE 1 /* FIFO control register bit controlling FIFO enable/disable */ - -/* Interrupt Identity Register (IIR) bits */ -#define UART_IIR_FIFO_MASK 0xc0 /* IIR FIFO disable/enabled mask */ -#define UART_IIR_INT_MASK 0xf /* IIR interrupt ID source */ -#define UART_IIR_MDM_CHG 0x0 /* Modem status changed */ -#define UART_IIR_NOINT 0x1 /* No interrupt pending */ -#define UART_IIR_THRE 0x2 /* THR empty */ -#define UART_IIR_RCVD_DATA 0x4 /* Received data available */ -#define UART_IIR_RCVR_STATUS 0x6 /* Receiver status */ -#define UART_IIR_CHAR_TIME 0xc /* Character time */ - -/* Interrupt Enable Register (IER) bits */ -#define UART_IER_EDSSI 8 /* enable modem status interrupt */ -#define UART_IER_ELSI 4 /* enable receiver line status interrupt */ -#define UART_IER_ETBEI 2 /* enable transmitter holding register empty interrupt */ -#define UART_IER_ERBFI 1 /* enable data available interrupt */ - -/* pmustatus */ -#define PST_EXTLPOAVAIL 0x0100 -#define PST_WDRESET 0x0080 -#define PST_INTPEND 0x0040 -#define PST_SBCLKST 0x0030 -#define PST_SBCLKST_ILP 0x0010 -#define PST_SBCLKST_ALP 0x0020 -#define PST_SBCLKST_HT 0x0030 -#define PST_ALPAVAIL 0x0008 -#define PST_HTAVAIL 0x0004 -#define PST_RESINIT 0x0003 - /* pmucapabilities */ #define PCAP_REV_MASK 0x000000ff #define PCAP_RC_MASK 0x00001f00 @@ -834,755 +277,10 @@ typedef volatile struct { #define PCAP5_CC_MASK 0xf8000000 #define PCAP5_CC_SHIFT 27 -/* PMU Resource Request Timer registers */ -/* This is based on PmuRev0 */ -#define PRRT_TIME_MASK 0x03ff -#define PRRT_INTEN 0x0400 -#define PRRT_REQ_ACTIVE 0x0800 -#define PRRT_ALP_REQ 0x1000 -#define PRRT_HT_REQ 0x2000 - -/* PMU resource bit position */ -#define PMURES_BIT(bit) (1 << (bit)) - -/* PMU resource number limit */ -#define PMURES_MAX_RESNUM 30 - -/* PMU chip control0 register */ -#define PMU_CHIPCTL0 0 - -/* PMU chip control1 register */ -#define PMU_CHIPCTL1 1 -#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 - -#define PMU_CC1_IF_TYPE_MASK 0x00000030 -#define PMU_CC1_IF_TYPE_RMII 0x00000000 -#define PMU_CC1_IF_TYPE_MII 0x00000010 -#define PMU_CC1_IF_TYPE_RGMII 0x00000020 - -#define PMU_CC1_SW_TYPE_MASK 0x000000c0 -#define PMU_CC1_SW_TYPE_EPHY 0x00000000 -#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 -#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 -#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 - -/* PMU corerev and chip specific PLL controls. - * PMU_PLL_XX where is PMU corerev and is an arbitrary number - * to differentiate different PLLs controlled by the same PMU rev. - */ -/* pllcontrol registers */ -/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */ -#define PMU0_PLL0_PLLCTL0 0 -#define PMU0_PLL0_PC0_PDIV_MASK 1 -#define PMU0_PLL0_PC0_PDIV_FREQ 25000 -#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 -#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 -#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 - -/* PC0_DIV_ARM for PLLOUT_ARM */ -#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 -#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 -#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 -#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */ -#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 -#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 -#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 -#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 - -/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */ -#define PMU0_PLL0_PLLCTL1 1 -#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 -#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 -#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 -#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 -#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 - -/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */ -#define PMU0_PLL0_PLLCTL2 2 -#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf -#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 - -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ -#define PMU1_PLL0_PLLCTL0 0 -#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 -#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 -#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 -#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 - -/* mdiv */ -#define PMU1_PLL0_PLLCTL1 1 -#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff -#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 -#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 -#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 -#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 -#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 -#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 - -#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 -#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) -#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) - -/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU1_PLL0_PLLCTL2 2 -#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff -#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 -#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 -#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 -#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 -#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */ -#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU1_PLL0_PLLCTL3 3 -#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU1_PLL0_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch */ -#define PMU1_PLL0_PLLCTL5 5 -#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 -#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 - -/* PMU rev 2 control words */ -#define PMU2_PHY_PLL_PLLCTL 4 -#define PMU2_SI_PLL_PLLCTL 10 - -/* PMU rev 2 */ -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ -#define PMU2_PLL_PLLCTL0 0 -#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 -#define PMU2_PLL_PC0_P1DIV_SHIFT 20 -#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 -#define PMU2_PLL_PC0_P2DIV_SHIFT 24 - -/* mdiv */ -#define PMU2_PLL_PLLCTL1 1 -#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff -#define PMU2_PLL_PC1_M1DIV_SHIFT 0 -#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC1_M2DIV_SHIFT 8 -#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 -#define PMU2_PLL_PC1_M3DIV_SHIFT 16 -#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 -#define PMU2_PLL_PC1_M4DIV_SHIFT 24 - -/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU2_PLL_PLLCTL2 2 -#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff -#define PMU2_PLL_PC2_M5DIV_SHIFT 0 -#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC2_M6DIV_SHIFT 8 -#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 -#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU2_PLL_PLLCTL3 3 -#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU2_PLL_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch */ -#define PMU2_PLL_PLLCTL5 5 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 - -/* PMU rev 5 (& 6) */ -#define PMU5_PLL_P1P2_OFF 0 -#define PMU5_PLL_P1_MASK 0x0f000000 -#define PMU5_PLL_P1_SHIFT 24 -#define PMU5_PLL_P2_MASK 0x00f00000 -#define PMU5_PLL_P2_SHIFT 20 -#define PMU5_PLL_M14_OFF 1 -#define PMU5_PLL_MDIV_MASK 0x000000ff -#define PMU5_PLL_MDIV_WIDTH 8 -#define PMU5_PLL_NM5_OFF 2 -#define PMU5_PLL_NDIV_MASK 0xfff00000 -#define PMU5_PLL_NDIV_SHIFT 20 -#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 -#define PMU5_PLL_NDIV_MODE_SHIFT 17 -#define PMU5_PLL_FMAB_OFF 3 -#define PMU5_PLL_MRAT_MASK 0xf0000000 -#define PMU5_PLL_MRAT_SHIFT 28 -#define PMU5_PLL_ABRAT_MASK 0x08000000 -#define PMU5_PLL_ABRAT_SHIFT 27 -#define PMU5_PLL_FDIV_MASK 0x07ffffff -#define PMU5_PLL_PLLCTL_OFF 4 -#define PMU5_PLL_PCHI_OFF 5 -#define PMU5_PLL_PCHI_MASK 0x0000003f - -/* pmu XtalFreqRatio */ -#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF -#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 -#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 - -/* Divider allocation in 4716/47162/5356/5357 */ -#define PMU5_MAINPLL_CPU 1 -#define PMU5_MAINPLL_MEM 2 -#define PMU5_MAINPLL_SI 3 - -#define PMU7_PLL_PLLCTL7 7 -#define PMU7_PLL_PLLCTL8 8 -#define PMU7_PLL_PLLCTL11 11 - -/* PLL usage in 4716/47162 */ -#define PMU4716_MAINPLL_PLL0 12 - -/* PLL usage in 5356/5357 */ -#define PMU5356_MAINPLL_PLL0 0 -#define PMU5357_MAINPLL_PLL0 0 - -/* 4716/47162 resources */ -#define RES4716_PROC_PLL_ON 0x00000040 -#define RES4716_PROC_HT_AVAIL 0x00000080 - -/* 4716/4717/4718 Chip specific ChipControl register bits */ -#define CCTRL471X_I2S_PINS_ENABLE 0x0080 /* I2S pins off by default, shared with pflash */ - -/* 5354 resources */ -#define RES5354_EXT_SWITCHER_PWM 0 /* 0x00001 */ -#define RES5354_BB_SWITCHER_PWM 1 /* 0x00002 */ -#define RES5354_BB_SWITCHER_BURST 2 /* 0x00004 */ -#define RES5354_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ -#define RES5354_ILP_REQUEST 4 /* 0x00010 */ -#define RES5354_RADIO_SWITCHER_PWM 5 /* 0x00020 */ -#define RES5354_RADIO_SWITCHER_BURST 6 /* 0x00040 */ -#define RES5354_ROM_SWITCH 7 /* 0x00080 */ -#define RES5354_PA_REF_LDO 8 /* 0x00100 */ -#define RES5354_RADIO_LDO 9 /* 0x00200 */ -#define RES5354_AFE_LDO 10 /* 0x00400 */ -#define RES5354_PLL_LDO 11 /* 0x00800 */ -#define RES5354_BG_FILTBYP 12 /* 0x01000 */ -#define RES5354_TX_FILTBYP 13 /* 0x02000 */ -#define RES5354_RX_FILTBYP 14 /* 0x04000 */ -#define RES5354_XTAL_PU 15 /* 0x08000 */ -#define RES5354_XTAL_EN 16 /* 0x10000 */ -#define RES5354_BB_PLL_FILTBYP 17 /* 0x20000 */ -#define RES5354_RF_PLL_FILTBYP 18 /* 0x40000 */ -#define RES5354_BB_PLL_PU 19 /* 0x80000 */ - -/* 5357 Chip specific ChipControl register bits */ -#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ -#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ - -/* 4328 resources */ -#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */ -#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */ -#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */ -#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ -#define RES4328_ILP_REQUEST 4 /* 0x00010 */ -#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */ -#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */ -#define RES4328_ROM_SWITCH 7 /* 0x00080 */ -#define RES4328_PA_REF_LDO 8 /* 0x00100 */ -#define RES4328_RADIO_LDO 9 /* 0x00200 */ -#define RES4328_AFE_LDO 10 /* 0x00400 */ -#define RES4328_PLL_LDO 11 /* 0x00800 */ -#define RES4328_BG_FILTBYP 12 /* 0x01000 */ -#define RES4328_TX_FILTBYP 13 /* 0x02000 */ -#define RES4328_RX_FILTBYP 14 /* 0x04000 */ -#define RES4328_XTAL_PU 15 /* 0x08000 */ -#define RES4328_XTAL_EN 16 /* 0x10000 */ -#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */ -#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */ -#define RES4328_BB_PLL_PU 19 /* 0x80000 */ - -/* 4325 A0/A1 resources */ -#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */ -#define RES4325_CBUCK_BURST 1 /* 0x00000002 */ -#define RES4325_CBUCK_PWM 2 /* 0x00000004 */ -#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */ -#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */ -#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */ -#define RES4325_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4325_ABUCK_BURST 7 /* 0x00000080 */ -#define RES4325_ABUCK_PWM 8 /* 0x00000100 */ -#define RES4325_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4325_OTP_PU 10 /* 0x00000400 */ -#define RES4325_LNLDO3_PU 11 /* 0x00000800 */ -#define RES4325_LNLDO4_PU 12 /* 0x00001000 */ -#define RES4325_XTAL_PU 13 /* 0x00002000 */ -#define RES4325_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4325_HT_AVAIL 21 /* 0x00200000 */ - -/* 4325 B0/C0 resources */ -#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4325B0_CLDO_PU 4 /* 0x00000010 */ - -/* 4325 C1 resources */ -#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */ - -/* 4325 chip-specific ChipStatus register bits */ -#define CST4325_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4325_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ -#define CST4325_SDIO_USB_MODE_MASK 0x00000004 -#define CST4325_SDIO_USB_MODE_SHIFT 2 -#define CST4325_RCAL_VALID_MASK 0x00000008 -#define CST4325_RCAL_VALID_SHIFT 3 -#define CST4325_RCAL_VALUE_MASK 0x000001f0 -#define CST4325_RCAL_VALUE_SHIFT 4 -#define CST4325_PMUTOP_2B_MASK 0x00000200 /* 1 for 2b, 0 for to 2a */ -#define CST4325_PMUTOP_2B_SHIFT 9 - -#define RES4329_RESERVED0 0 /* 0x00000001 */ -#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4329_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4329_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4329_CLDO_PU 4 /* 0x00000010 */ -#define RES4329_PALDO_PU 5 /* 0x00000020 */ -#define RES4329_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4329_RESERVED7 7 /* 0x00000080 */ -#define RES4329_RESERVED8 8 /* 0x00000100 */ -#define RES4329_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4329_OTP_PU 10 /* 0x00000400 */ -#define RES4329_RESERVED11 11 /* 0x00000800 */ -#define RES4329_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4329_XTAL_PU 13 /* 0x00002000 */ -#define RES4329_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4329_HT_AVAIL 21 /* 0x00200000 */ - -#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ -#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 -#define CST4329_SPI_SDIO_MODE_SHIFT 2 - -/* 4312 chip-specific ChipStatus register bits */ -#define CST4312_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4312_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4312_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4312_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4312_OTP_BAD 3 /* OTP is broken, SPROM is present */ - -/* 4312 resources (all PMU chips with little memory constraint) */ -#define RES4312_SWITCHER_BURST 0 /* 0x00000001 */ -#define RES4312_SWITCHER_PWM 1 /* 0x00000002 */ -#define RES4312_PA_REF_LDO 2 /* 0x00000004 */ -#define RES4312_CORE_LDO_BURST 3 /* 0x00000008 */ -#define RES4312_CORE_LDO_PWM 4 /* 0x00000010 */ -#define RES4312_RADIO_LDO 5 /* 0x00000020 */ -#define RES4312_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4312_BG_FILTBYP 7 /* 0x00000080 */ -#define RES4312_TX_FILTBYP 8 /* 0x00000100 */ -#define RES4312_RX_FILTBYP 9 /* 0x00000200 */ -#define RES4312_XTAL_PU 10 /* 0x00000400 */ -#define RES4312_ALP_AVAIL 11 /* 0x00000800 */ -#define RES4312_BB_PLL_FILTBYP 12 /* 0x00001000 */ -#define RES4312_RF_PLL_FILTBYP 13 /* 0x00002000 */ -#define RES4312_HT_AVAIL 14 /* 0x00004000 */ - -/* 4322 resources */ -#define RES4322_RF_LDO 0 -#define RES4322_ILP_REQUEST 1 -#define RES4322_XTAL_PU 2 -#define RES4322_ALP_AVAIL 3 -#define RES4322_SI_PLL_ON 4 -#define RES4322_HT_SI_AVAIL 5 -#define RES4322_PHY_PLL_ON 6 -#define RES4322_HT_PHY_AVAIL 7 -#define RES4322_OTP_PU 8 - -/* 4322 chip-specific ChipStatus register bits */ -#define CST4322_XTAL_FREQ_20_40MHZ 0x00000020 -#define CST4322_SPROM_OTP_SEL_MASK 0x000000c0 -#define CST4322_SPROM_OTP_SEL_SHIFT 6 -#define CST4322_NO_SPROM_OTP 0 /* no OTP, no SPROM */ -#define CST4322_SPROM_PRESENT 1 /* SPROM is present */ -#define CST4322_OTP_PRESENT 2 /* OTP is present */ -#define CST4322_PCI_OR_USB 0x00000100 -#define CST4322_BOOT_MASK 0x00000600 -#define CST4322_BOOT_SHIFT 9 -#define CST4322_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ -#define CST4322_BOOT_FROM_ROM 1 /* boot from ROM */ -#define CST4322_BOOT_FROM_FLASH 2 /* boot from FLASH */ -#define CST4322_BOOT_FROM_INVALID 3 -#define CST4322_ILP_DIV_EN 0x00000800 -#define CST4322_FLASH_TYPE_MASK 0x00001000 -#define CST4322_FLASH_TYPE_SHIFT 12 -#define CST4322_FLASH_TYPE_SHIFT_ST 0 /* ST serial FLASH */ -#define CST4322_FLASH_TYPE_SHIFT_ATMEL 1 /* ATMEL flash */ -#define CST4322_ARM_TAP_SEL 0x00002000 -#define CST4322_RES_INIT_MODE_MASK 0x0000c000 -#define CST4322_RES_INIT_MODE_SHIFT 14 -#define CST4322_RES_INIT_MODE_ILPAVAIL 0 /* resinitmode: ILP available */ -#define CST4322_RES_INIT_MODE_ILPREQ 1 /* resinitmode: ILP request */ -#define CST4322_RES_INIT_MODE_ALPAVAIL 2 /* resinitmode: ALP available */ -#define CST4322_RES_INIT_MODE_HTAVAIL 3 /* resinitmode: HT available */ -#define CST4322_PCIPLLCLK_GATING 0x00010000 -#define CST4322_CLK_SWITCH_PCI_TO_ALP 0x00020000 -#define CST4322_PCI_CARDBUS_MODE 0x00040000 - -/* 43224 chip-specific ChipControl register bits */ -#define CCTRL43224_GPIO_TOGGLE 0x8000 -#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */ -#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */ - -/* 43236 resources */ -#define RES43236_REGULATOR 0 -#define RES43236_ILP_REQUEST 1 -#define RES43236_XTAL_PU 2 -#define RES43236_ALP_AVAIL 3 -#define RES43236_SI_PLL_ON 4 -#define RES43236_HT_SI_AVAIL 5 - -/* 43236 chip-specific ChipControl register bits */ -#define CCTRL43236_BT_COEXIST (1<<0) /* 0 disable */ -#define CCTRL43236_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ -#define CCTRL43236_EXT_LNA (1<<2) /* 0 disable */ -#define CCTRL43236_ANT_MUX_2o3 (1<<3) /* 2o3 mux, chipcontrol bit 3 */ -#define CCTRL43236_GSIO (1<<4) /* 0 disable */ - -/* 43236 Chip specific ChipStatus register bits */ -#define CST43236_SFLASH_MASK 0x00000040 -#define CST43236_OTP_MASK 0x00000080 -#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */ -#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */ -#define CST43236_BOOT_MASK 0x00001800 -#define CST43236_BOOT_SHIFT 11 -#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ -#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */ -#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */ -#define CST43236_BOOT_FROM_INVALID 3 - -/* 4331 resources */ -#define RES4331_REGULATOR 0 -#define RES4331_ILP_REQUEST 1 -#define RES4331_XTAL_PU 2 -#define RES4331_ALP_AVAIL 3 -#define RES4331_SI_PLL_ON 4 -#define RES4331_HT_SI_AVAIL 5 - -/* 4331 chip-specific ChipControl register bits */ -#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */ -#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ -#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */ -#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */ -#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */ -#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */ -#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */ -#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */ -#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */ -#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */ -#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */ -#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */ -#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */ -#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */ - -/* 4331 Chip specific ChipStatus register bits */ -#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */ -#define CST4331_SPROM_PRESENT 0x00000002 -#define CST4331_OTP_PRESENT 0x00000004 -#define CST4331_LDO_RF 0x00000008 -#define CST4331_LDO_PAR 0x00000010 - -/* 4315 resources */ -#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4315_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4315_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4315_CLDO_PU 4 /* 0x00000010 */ -#define RES4315_PALDO_PU 5 /* 0x00000020 */ -#define RES4315_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4315_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4315_OTP_PU 10 /* 0x00000400 */ -#define RES4315_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4315_XTAL_PU 13 /* 0x00002000 */ -#define RES4315_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4315_HT_AVAIL 21 /* 0x00200000 */ - -/* 4315 chip-specific ChipStatus register bits */ -#define CST4315_SPROM_OTP_SEL_MASK 0x00000003 /* gpio [7:6], SDIO CIS selection */ -#define CST4315_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ -#define CST4315_SPROM_SEL 0x00000001 /* use SPROM, OTP is powered up */ -#define CST4315_OTP_SEL 0x00000002 /* use OTP, OTP is powered up */ -#define CST4315_OTP_PWRDN 0x00000003 /* use SPROM, OTP is powered down */ -#define CST4315_SDIO_MODE 0x00000004 /* gpio [8], sdio/usb mode */ -#define CST4315_RCAL_VALID 0x00000008 -#define CST4315_RCAL_VALUE_MASK 0x000001f0 -#define CST4315_RCAL_VALUE_SHIFT 4 -#define CST4315_PALDO_EXTPNP 0x00000200 /* PALDO is configured with external PNP */ -#define CST4315_CBUCK_MODE_MASK 0x00000c00 -#define CST4315_CBUCK_MODE_BURST 0x00000400 -#define CST4315_CBUCK_MODE_LPBURST 0x00000c00 - -/* 4319 resources */ -#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4319_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4319_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4319_CLDO_PU 4 /* 0x00000010 */ -#define RES4319_PALDO_PU 5 /* 0x00000020 */ -#define RES4319_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4319_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4319_OTP_PU 10 /* 0x00000400 */ -#define RES4319_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4319_XTAL_PU 13 /* 0x00002000 */ -#define RES4319_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4319_HT_AVAIL 21 /* 0x00200000 */ - -/* 4319 chip-specific ChipStatus register bits */ -#define CST4319_SPI_CPULESSUSB 0x00000001 -#define CST4319_SPI_CLK_POL 0x00000002 -#define CST4319_SPI_CLK_PH 0x00000008 -#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */ -#define CST4319_SPROM_OTP_SEL_SHIFT 6 -#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ -#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */ -#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */ -#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */ -#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */ -#define CST4319_REMAP_SEL_MASK 0x00000600 -#define CST4319_ILPDIV_EN 0x00000800 -#define CST4319_XTAL_PD_POL 0x00001000 -#define CST4319_LPO_SEL 0x00002000 -#define CST4319_RES_INIT_MODE 0x0000c000 -#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */ -#define CST4319_CBUCK_MODE_MASK 0x00060000 -#define CST4319_CBUCK_MODE_BURST 0x00020000 -#define CST4319_CBUCK_MODE_LPBURST 0x00060000 -#define CST4319_RCAL_VALID 0x01000000 -#define CST4319_RCAL_VALUE_MASK 0x3e000000 -#define CST4319_RCAL_VALUE_SHIFT 25 - -#define PMU1_PLL0_CHIPCTL0 0 -#define PMU1_PLL0_CHIPCTL1 1 -#define PMU1_PLL0_CHIPCTL2 2 -#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 -#define CCTL_4319USB_XTAL_SEL_SHIFT 19 -#define CCTL_4319USB_48MHZ_PLL_SEL 1 -#define CCTL_4319USB_24MHZ_PLL_SEL 2 - -/* PMU resources for 4336 */ -#define RES4336_CBUCK_LPOM 0 -#define RES4336_CBUCK_BURST 1 -#define RES4336_CBUCK_LP_PWM 2 -#define RES4336_CBUCK_PWM 3 -#define RES4336_CLDO_PU 4 -#define RES4336_DIS_INT_RESET_PD 5 -#define RES4336_ILP_REQUEST 6 -#define RES4336_LNLDO_PU 7 -#define RES4336_LDO3P3_PU 8 -#define RES4336_OTP_PU 9 -#define RES4336_XTAL_PU 10 -#define RES4336_ALP_AVAIL 11 -#define RES4336_RADIO_PU 12 -#define RES4336_BG_PU 13 -#define RES4336_VREG1p4_PU_PU 14 -#define RES4336_AFE_PWRSW_PU 15 -#define RES4336_RX_PWRSW_PU 16 -#define RES4336_TX_PWRSW_PU 17 -#define RES4336_BB_PWRSW_PU 18 -#define RES4336_SYNTH_PWRSW_PU 19 -#define RES4336_MISC_PWRSW_PU 20 -#define RES4336_LOGEN_PWRSW_PU 21 -#define RES4336_BBPLL_PWRSW_PU 22 -#define RES4336_MACPHY_CLKAVAIL 23 -#define RES4336_HT_AVAIL 24 -#define RES4336_RSVD 25 - -/* 4336 chip-specific ChipStatus register bits */ -#define CST4336_SPI_MODE_MASK 0x00000001 -#define CST4336_SPROM_PRESENT 0x00000002 -#define CST4336_OTP_PRESENT 0x00000004 -#define CST4336_ARMREMAP_0 0x00000008 -#define CST4336_ILPDIV_EN_MASK 0x00000010 -#define CST4336_ILPDIV_EN_SHIFT 4 -#define CST4336_XTAL_PD_POL_MASK 0x00000020 -#define CST4336_XTAL_PD_POL_SHIFT 5 -#define CST4336_LPO_SEL_MASK 0x00000040 -#define CST4336_LPO_SEL_SHIFT 6 -#define CST4336_RES_INIT_MODE_MASK 0x00000180 -#define CST4336_RES_INIT_MODE_SHIFT 7 -#define CST4336_CBUCK_MODE_MASK 0x00000600 -#define CST4336_CBUCK_MODE_SHIFT 9 - -/* 4330 resources */ -#define RES4330_CBUCK_LPOM 0 -#define RES4330_CBUCK_BURST 1 -#define RES4330_CBUCK_LP_PWM 2 -#define RES4330_CBUCK_PWM 3 -#define RES4330_CLDO_PU 4 -#define RES4330_DIS_INT_RESET_PD 5 -#define RES4330_ILP_REQUEST 6 -#define RES4330_LNLDO_PU 7 -#define RES4330_LDO3P3_PU 8 -#define RES4330_OTP_PU 9 -#define RES4330_XTAL_PU 10 -#define RES4330_ALP_AVAIL 11 -#define RES4330_RADIO_PU 12 -#define RES4330_BG_PU 13 -#define RES4330_VREG1p4_PU_PU 14 -#define RES4330_AFE_PWRSW_PU 15 -#define RES4330_RX_PWRSW_PU 16 -#define RES4330_TX_PWRSW_PU 17 -#define RES4330_BB_PWRSW_PU 18 -#define RES4330_SYNTH_PWRSW_PU 19 -#define RES4330_MISC_PWRSW_PU 20 -#define RES4330_LOGEN_PWRSW_PU 21 -#define RES4330_BBPLL_PWRSW_PU 22 -#define RES4330_MACPHY_CLKAVAIL 23 -#define RES4330_HT_AVAIL 24 -#define RES4330_5gRX_PWRSW_PU 25 -#define RES4330_5gTX_PWRSW_PU 26 -#define RES4330_5g_LOGEN_PWRSW_PU 27 - -/* 4330 chip-specific ChipStatus register bits */ -#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */ -#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */ -#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */ -#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */ -#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */ -#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */ -#define CST4330_OTP_PRESENT 0x00000010 -#define CST4330_LPO_AUTODET_EN 0x00000020 -#define CST4330_ARMREMAP_0 0x00000040 -#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */ -#define CST4330_ILPDIV_EN 0x00000100 -#define CST4330_LPO_SEL 0x00000200 -#define CST4330_RES_INIT_MODE_SHIFT 10 -#define CST4330_RES_INIT_MODE_MASK 0x00000c00 -#define CST4330_CBUCK_MODE_SHIFT 12 -#define CST4330_CBUCK_MODE_MASK 0x00003000 -#define CST4330_CBUCK_POWER_OK 0x00004000 -#define CST4330_BB_PLL_LOCKED 0x00008000 -#define SOCDEVRAM_4330_BP_ADDR 0x1E000000 -#define SOCDEVRAM_4330_ARM_ADDR 0x00800000 - -/* 4313 resources */ -#define RES4313_BB_PU_RSRC 0 -#define RES4313_ILP_REQ_RSRC 1 -#define RES4313_XTAL_PU_RSRC 2 -#define RES4313_ALP_AVAIL_RSRC 3 -#define RES4313_RADIO_PU_RSRC 4 -#define RES4313_BG_PU_RSRC 5 -#define RES4313_VREG1P4_PU_RSRC 6 -#define RES4313_AFE_PWRSW_RSRC 7 -#define RES4313_RX_PWRSW_RSRC 8 -#define RES4313_TX_PWRSW_RSRC 9 -#define RES4313_BB_PWRSW_RSRC 10 -#define RES4313_SYNTH_PWRSW_RSRC 11 -#define RES4313_MISC_PWRSW_RSRC 12 -#define RES4313_BB_PLL_PWRSW_RSRC 13 -#define RES4313_HT_AVAIL_RSRC 14 -#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 - -/* 4313 chip-specific ChipStatus register bits */ -#define CST4313_SPROM_PRESENT 1 -#define CST4313_OTP_PRESENT 2 -#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 -#define CST4313_SPROM_OTP_SEL_SHIFT 0 - -/* 4313 Chip specific ChipControl register bits */ -#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */ - -/* 43228 resources */ -#define RES43228_NOT_USED 0 -#define RES43228_ILP_REQUEST 1 -#define RES43228_XTAL_PU 2 -#define RES43228_ALP_AVAIL 3 -#define RES43228_PLL_EN 4 -#define RES43228_HT_PHY_AVAIL 5 - -/* 43228 chipstatus reg bits */ -#define CST43228_ILP_DIV_EN 0x1 -#define CST43228_OTP_PRESENT 0x2 -#define CST43228_SERDES_REFCLK_PADSEL 0x4 -#define CST43228_SDIO_MODE 0x8 - -#define CST43228_SDIO_OTP_PRESENT 0x10 -#define CST43228_SDIO_RESET 0x20 - /* * Maximum delay for the PMU state transition in us. * This is an upper bound intended for spinwaits etc. */ #define PMU_MAX_TRANSITION_DLY 15000 -/* PMU resource up transition time in ILP cycles */ -#define PMURES_UP_TRANSITION 2 - -/* -* Register eci_inputlo bitfield values. -* - BT packet type information bits [7:0] -*/ -/* [3:0] - Task (link) type */ -#define BT_ACL 0x00 -#define BT_SCO 0x01 -#define BT_eSCO 0x02 -#define BT_A2DP 0x03 -#define BT_SNIFF 0x04 -#define BT_PAGE_SCAN 0x05 -#define BT_INQUIRY_SCAN 0x06 -#define BT_PAGE 0x07 -#define BT_INQUIRY 0x08 -#define BT_MSS 0x09 -#define BT_PARK 0x0a -#define BT_RSSISCAN 0x0b -#define BT_MD_ACL 0x0c -#define BT_MD_eSCO 0x0d -#define BT_SCAN_WITH_SCO_LINK 0x0e -#define BT_SCAN_WITHOUT_SCO_LINK 0x0f -/* [7:4] = packet duration code */ -/* [8] - Master / Slave */ -#define BT_MASTER 0 -#define BT_SLAVE 1 -/* [11:9] - multi-level priority */ -#define BT_LOWEST_PRIO 0x0 -#define BT_HIGHEST_PRIO 0x3 - -/* WLAN - number of antenna */ -#define WLAN_NUM_ANT1 TXANT_0 -#define WLAN_NUM_ANT2 TXANT_1 - #endif /* _SBCHIPC_H */ diff --git a/drivers/staging/brcm80211/include/sbconfig.h b/drivers/staging/brcm80211/include/sbconfig.h index 5247f01..68e4b54 100644 --- a/drivers/staging/brcm80211/include/sbconfig.h +++ b/drivers/staging/brcm80211/include/sbconfig.h @@ -24,249 +24,9 @@ #define PAD _XSTR(__LINE__) #endif -/* enumeration in SB is based on the premise that cores are contiguos in the - * enumeration space. - */ -#define SB_BUS_SIZE 0x10000 /* Each bus gets 64Kbytes for cores */ -#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE) -#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) /* Max cores per bus */ - /* * Sonics Configuration Space Registers. */ #define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ -#define SBCONFIGSIZE 256 /* sizeof (sbconfig_t) */ - -#define SBIPSFLAG 0x08 -#define SBTPSFLAG 0x18 -#define SBTMERRLOGA 0x48 /* sonics >= 2.3 */ -#define SBTMERRLOG 0x50 /* sonics >= 2.3 */ -#define SBADMATCH3 0x60 -#define SBADMATCH2 0x68 -#define SBADMATCH1 0x70 -#define SBIMSTATE 0x90 -#define SBINTVEC 0x94 -#define SBTMSTATELOW 0x98 -#define SBTMSTATEHIGH 0x9c -#define SBBWA0 0xa0 -#define SBIMCONFIGLOW 0xa8 -#define SBIMCONFIGHIGH 0xac -#define SBADMATCH0 0xb0 -#define SBTMCONFIGLOW 0xb8 -#define SBTMCONFIGHIGH 0xbc -#define SBBCONFIG 0xc0 -#define SBBSTATE 0xc8 -#define SBACTCNFG 0xd8 -#define SBFLAGST 0xe8 -#define SBIDLOW 0xf8 -#define SBIDHIGH 0xfc - -/* All the previous registers are above SBCONFIGOFF, but with Sonics 2.3, we have - * a few registers *below* that line. I think it would be very confusing to try - * and change the value of SBCONFIGOFF, so I'm definig them as absolute offsets here, - */ - -#define SBIMERRLOGA 0xea8 -#define SBIMERRLOG 0xeb0 -#define SBTMPORTCONNID0 0xed8 -#define SBTMPORTLOCK0 0xef8 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _sbconfig { - u32 PAD[2]; - u32 sbipsflag; /* initiator port ocp slave flag */ - u32 PAD[3]; - u32 sbtpsflag; /* target port ocp slave flag */ - u32 PAD[11]; - u32 sbtmerrloga; /* (sonics >= 2.3) */ - u32 PAD; - u32 sbtmerrlog; /* (sonics >= 2.3) */ - u32 PAD[3]; - u32 sbadmatch3; /* address match3 */ - u32 PAD; - u32 sbadmatch2; /* address match2 */ - u32 PAD; - u32 sbadmatch1; /* address match1 */ - u32 PAD[7]; - u32 sbimstate; /* initiator agent state */ - u32 sbintvec; /* interrupt mask */ - u32 sbtmstatelow; /* target state */ - u32 sbtmstatehigh; /* target state */ - u32 sbbwa0; /* bandwidth allocation table0 */ - u32 PAD; - u32 sbimconfiglow; /* initiator configuration */ - u32 sbimconfighigh; /* initiator configuration */ - u32 sbadmatch0; /* address match0 */ - u32 PAD; - u32 sbtmconfiglow; /* target configuration */ - u32 sbtmconfighigh; /* target configuration */ - u32 sbbconfig; /* broadcast configuration */ - u32 PAD; - u32 sbbstate; /* broadcast state */ - u32 PAD[3]; - u32 sbactcnfg; /* activate configuration */ - u32 PAD[3]; - u32 sbflagst; /* current sbflags */ - u32 PAD[3]; - u32 sbidlow; /* identification */ - u32 sbidhigh; /* identification */ -} sbconfig_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* sbipsflag */ -#define SBIPS_INT1_MASK 0x3f /* which sbflags get routed to mips interrupt 1 */ -#define SBIPS_INT1_SHIFT 0 -#define SBIPS_INT2_MASK 0x3f00 /* which sbflags get routed to mips interrupt 2 */ -#define SBIPS_INT2_SHIFT 8 -#define SBIPS_INT3_MASK 0x3f0000 /* which sbflags get routed to mips interrupt 3 */ -#define SBIPS_INT3_SHIFT 16 -#define SBIPS_INT4_MASK 0x3f000000 /* which sbflags get routed to mips interrupt 4 */ -#define SBIPS_INT4_SHIFT 24 - -/* sbtpsflag */ -#define SBTPS_NUM0_MASK 0x3f /* interrupt sbFlag # generated by this core */ -#define SBTPS_F0EN0 0x40 /* interrupt is always sent on the backplane */ - -/* sbtmerrlog */ -#define SBTMEL_CM 0x00000007 /* command */ -#define SBTMEL_CI 0x0000ff00 /* connection id */ -#define SBTMEL_EC 0x0f000000 /* error code */ -#define SBTMEL_ME 0x80000000 /* multiple error */ - -/* sbimstate */ -#define SBIM_PC 0xf /* pipecount */ -#define SBIM_AP_MASK 0x30 /* arbitration policy */ -#define SBIM_AP_BOTH 0x00 /* use both timeslaces and token */ -#define SBIM_AP_TS 0x10 /* use timesliaces only */ -#define SBIM_AP_TK 0x20 /* use token only */ -#define SBIM_AP_RSV 0x30 /* reserved */ -#define SBIM_IBE 0x20000 /* inbanderror */ -#define SBIM_TO 0x40000 /* timeout */ -#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */ -#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */ - -/* sbtmstatelow */ -#define SBTML_RESET 0x0001 /* reset */ -#define SBTML_REJ_MASK 0x0006 /* reject field */ -#define SBTML_REJ 0x0002 /* reject */ -#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */ - -#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */ - -/* sbtmstatehigh */ -#define SBTMH_SERR 0x0001 /* serror */ -#define SBTMH_INT 0x0002 /* interrupt */ -#define SBTMH_BUSY 0x0004 /* busy */ -#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */ - -#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */ - -/* sbbwa0 */ -#define SBBWA_TAB0_MASK 0xffff /* lookup table 0 */ -#define SBBWA_TAB1_MASK 0xffff /* lookup table 1 */ -#define SBBWA_TAB1_SHIFT 16 - -/* sbimconfiglow */ -#define SBIMCL_STO_MASK 0x7 /* service timeout */ -#define SBIMCL_RTO_MASK 0x70 /* request timeout */ -#define SBIMCL_RTO_SHIFT 4 -#define SBIMCL_CID_MASK 0xff0000 /* connection id */ -#define SBIMCL_CID_SHIFT 16 - -/* sbimconfighigh */ -#define SBIMCH_IEM_MASK 0xc /* inband error mode */ -#define SBIMCH_TEM_MASK 0x30 /* timeout error mode */ -#define SBIMCH_TEM_SHIFT 4 -#define SBIMCH_BEM_MASK 0xc0 /* bus error mode */ -#define SBIMCH_BEM_SHIFT 6 - -/* sbadmatch0 */ -#define SBAM_TYPE_MASK 0x3 /* address type */ -#define SBAM_AD64 0x4 /* reserved */ -#define SBAM_ADINT0_MASK 0xf8 /* type0 size */ -#define SBAM_ADINT0_SHIFT 3 -#define SBAM_ADINT1_MASK 0x1f8 /* type1 size */ -#define SBAM_ADINT1_SHIFT 3 -#define SBAM_ADINT2_MASK 0x1f8 /* type2 size */ -#define SBAM_ADINT2_SHIFT 3 -#define SBAM_ADEN 0x400 /* enable */ -#define SBAM_ADNEG 0x800 /* negative decode */ -#define SBAM_BASE0_MASK 0xffffff00 /* type0 base address */ -#define SBAM_BASE0_SHIFT 8 -#define SBAM_BASE1_MASK 0xfffff000 /* type1 base address for the core */ -#define SBAM_BASE1_SHIFT 12 -#define SBAM_BASE2_MASK 0xffff0000 /* type2 base address for the core */ -#define SBAM_BASE2_SHIFT 16 - -/* sbtmconfiglow */ -#define SBTMCL_CD_MASK 0xff /* clock divide */ -#define SBTMCL_CO_MASK 0xf800 /* clock offset */ -#define SBTMCL_CO_SHIFT 11 -#define SBTMCL_IF_MASK 0xfc0000 /* interrupt flags */ -#define SBTMCL_IF_SHIFT 18 -#define SBTMCL_IM_MASK 0x3000000 /* interrupt mode */ -#define SBTMCL_IM_SHIFT 24 - -/* sbtmconfighigh */ -#define SBTMCH_BM_MASK 0x3 /* busy mode */ -#define SBTMCH_RM_MASK 0x3 /* retry mode */ -#define SBTMCH_RM_SHIFT 2 -#define SBTMCH_SM_MASK 0x30 /* stop mode */ -#define SBTMCH_SM_SHIFT 4 -#define SBTMCH_EM_MASK 0x300 /* sb error mode */ -#define SBTMCH_EM_SHIFT 8 -#define SBTMCH_IM_MASK 0xc00 /* int mode */ -#define SBTMCH_IM_SHIFT 10 - -/* sbbconfig */ -#define SBBC_LAT_MASK 0x3 /* sb latency */ -#define SBBC_MAX0_MASK 0xf0000 /* maxccntr0 */ -#define SBBC_MAX0_SHIFT 16 -#define SBBC_MAX1_MASK 0xf00000 /* maxccntr1 */ -#define SBBC_MAX1_SHIFT 20 - -/* sbbstate */ -#define SBBS_SRD 0x1 /* st reg disable */ -#define SBBS_HRD 0x2 /* hold reg disable */ - -/* sbidlow */ -#define SBIDL_CS_MASK 0x3 /* config space */ -#define SBIDL_AR_MASK 0x38 /* # address ranges supported */ -#define SBIDL_AR_SHIFT 3 -#define SBIDL_SYNCH 0x40 /* sync */ -#define SBIDL_INIT 0x80 /* initiator */ -#define SBIDL_MINLAT_MASK 0xf00 /* minimum backplane latency */ -#define SBIDL_MINLAT_SHIFT 8 -#define SBIDL_MAXLAT 0xf000 /* maximum backplane latency */ -#define SBIDL_MAXLAT_SHIFT 12 -#define SBIDL_FIRST 0x10000 /* this initiator is first */ -#define SBIDL_CW_MASK 0xc0000 /* cycle counter width */ -#define SBIDL_CW_SHIFT 18 -#define SBIDL_TP_MASK 0xf00000 /* target ports */ -#define SBIDL_TP_SHIFT 20 -#define SBIDL_IP_MASK 0xf000000 /* initiator ports */ -#define SBIDL_IP_SHIFT 24 -#define SBIDL_RV_MASK 0xf0000000 /* sonics backplane revision code */ -#define SBIDL_RV_SHIFT 28 -#define SBIDL_RV_2_2 0x00000000 /* version 2.2 or earlier */ -#define SBIDL_RV_2_3 0x10000000 /* version 2.3 */ - -/* sbidhigh */ -#define SBIDH_RC_MASK 0x000f /* revision code */ -#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */ -#define SBIDH_RCE_SHIFT 8 -#define SBCOREREV(sbidh) \ - ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) -#define SBIDH_CC_MASK 0x8ff0 /* core code */ -#define SBIDH_CC_SHIFT 4 -#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ -#define SBIDH_VC_SHIFT 16 - -#define SB_COMMIT 0xfd8 /* update buffered registers value */ - -/* vendor codes */ -#define SB_VEND_BCM 0x4243 /* Broadcom's SB vendor code */ #endif /* _SBCONFIG_H */ diff --git a/drivers/staging/brcm80211/include/sbdma.h b/drivers/staging/brcm80211/include/sbdma.h index 1da979a..9814a0c 100644 --- a/drivers/staging/brcm80211/include/sbdma.h +++ b/drivers/staging/brcm80211/include/sbdma.h @@ -25,19 +25,6 @@ /* 32 bits addressing */ -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 addr; /* descriptor ring base address (4K aligned) */ - u32 ptr; /* last descriptor posted to chip */ - u32 status; /* current active descriptor, et al */ -} dma32regs_t; - -typedef volatile struct { - dma32regs_t xmt; /* dma tx channel */ - dma32regs_t rcv; /* dma rx channel */ -} dma32regp_t; - typedef volatile struct { /* diag access */ u32 fifoaddr; /* diag address */ u32 fifodatalow; /* low 32bits of data */ @@ -45,115 +32,6 @@ typedef volatile struct { /* diag access */ u32 pad; /* reserved */ } dma32diag_t; -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl; /* misc control bits & bufcount */ - u32 addr; /* data buffer address */ -} dma32dd_t; - -/* - * Each descriptor ring must be 4096byte aligned, and fit within a single 4096byte page. - */ -#define D32RINGALIGN_BITS 12 -#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) -#define D32RINGALIGN (1 << D32RINGALIGN_BITS) - -#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) - -/* transmit channel control */ -#define XC_XE ((u32)1 << 0) /* transmit enable */ -#define XC_SE ((u32)1 << 1) /* transmit suspend request */ -#define XC_LE ((u32)1 << 2) /* loopback enable */ -#define XC_FL ((u32)1 << 4) /* flush request */ -#define XC_PD ((u32)1 << 11) /* parity check disable */ -#define XC_AE ((u32)3 << 16) /* address extension bits */ -#define XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define XP_LD_MASK 0xfff /* last valid descriptor */ - -/* transmit channel status */ -#define XS_CD_MASK 0x0fff /* current descriptor pointer */ -#define XS_XS_MASK 0xf000 /* transmit state */ -#define XS_XS_SHIFT 12 -#define XS_XS_DISABLED 0x0000 /* disabled */ -#define XS_XS_ACTIVE 0x1000 /* active */ -#define XS_XS_IDLE 0x2000 /* idle wait */ -#define XS_XS_STOPPED 0x3000 /* stopped */ -#define XS_XS_SUSP 0x4000 /* suspend pending */ -#define XS_XE_MASK 0xf0000 /* transmit errors */ -#define XS_XE_SHIFT 16 -#define XS_XE_NOERR 0x00000 /* no error */ -#define XS_XE_DPE 0x10000 /* descriptor protocol error */ -#define XS_XE_DFU 0x20000 /* data fifo underrun */ -#define XS_XE_BEBR 0x30000 /* bus error on buffer read */ -#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */ -#define XS_AD_MASK 0xfff00000 /* active descriptor */ -#define XS_AD_SHIFT 20 - -/* receive channel control */ -#define RC_RE ((u32)1 << 0) /* receive enable */ -#define RC_RO_MASK 0xfe /* receive frame offset */ -#define RC_RO_SHIFT 1 -#define RC_FM ((u32)1 << 8) /* direct fifo receive (pio) mode */ -#define RC_SH ((u32)1 << 9) /* separate rx header descriptor enable */ -#define RC_OC ((u32)1 << 10) /* overflow continue */ -#define RC_PD ((u32)1 << 11) /* parity check disable */ -#define RC_AE ((u32)3 << 16) /* address extension bits */ -#define RC_AE_SHIFT 16 - -/* receive descriptor table pointer */ -#define RP_LD_MASK 0xfff /* last valid descriptor */ - -/* receive channel status */ -#define RS_CD_MASK 0x0fff /* current descriptor pointer */ -#define RS_RS_MASK 0xf000 /* receive state */ -#define RS_RS_SHIFT 12 -#define RS_RS_DISABLED 0x0000 /* disabled */ -#define RS_RS_ACTIVE 0x1000 /* active */ -#define RS_RS_IDLE 0x2000 /* idle wait */ -#define RS_RS_STOPPED 0x3000 /* reserved */ -#define RS_RE_MASK 0xf0000 /* receive errors */ -#define RS_RE_SHIFT 16 -#define RS_RE_NOERR 0x00000 /* no error */ -#define RS_RE_DPE 0x10000 /* descriptor protocol error */ -#define RS_RE_DFO 0x20000 /* data fifo overflow */ -#define RS_RE_BEBW 0x30000 /* bus error on buffer write */ -#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */ -#define RS_AD_MASK 0xfff00000 /* active descriptor */ -#define RS_AD_SHIFT 20 - -/* fifoaddr */ -#define FA_OFF_MASK 0xffff /* offset */ -#define FA_SEL_MASK 0xf0000 /* select */ -#define FA_SEL_SHIFT 16 -#define FA_SEL_XDD 0x00000 /* transmit dma data */ -#define FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define FA_SEL_RDD 0x40000 /* receive dma data */ -#define FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags */ -#define CTRL_BC_MASK 0x00001fff /* buffer byte count, real data len must <= 4KB */ -#define CTRL_AE ((u32)3 << 16) /* address extension bits */ -#define CTRL_AE_SHIFT 16 -#define CTRL_PARITY ((u32)3 << 18) /* parity bit */ -#define CTRL_EOT ((u32)1 << 28) /* end of descriptor table */ -#define CTRL_IOC ((u32)1 << 29) /* interrupt on completion */ -#define CTRL_EOF ((u32)1 << 30) /* end of frame */ -#define CTRL_SOF ((u32)1 << 31) /* start of frame */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define CTRL_CORE_MASK 0x0ff00000 - /* 64 bits addressing */ /* dma registers per channel(xmt or rcv) */ @@ -166,150 +44,4 @@ typedef volatile struct { u32 status1; /* active descriptor, xmt error */ } dma64regs_t; -typedef volatile struct { - dma64regs_t tx; /* dma64 tx channel */ - dma64regs_t rx; /* dma64 rx channel */ -} dma64regp_t; - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma64diag_t; - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl1; /* misc control bits & bufcount */ - u32 ctrl2; /* buffer count and address extension */ - u32 addrlow; /* memory address of the date buffer, bits 31:0 */ - u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ -} dma64dd_t; - -/* - * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. - */ -#define D64RINGALIGN_BITS 13 -#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) -#define D64RINGALIGN (1 << D64RINGALIGN_BITS) - -#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) - -/* transmit channel control */ -#define D64_XC_XE 0x00000001 /* transmit enable */ -#define D64_XC_SE 0x00000002 /* transmit suspend request */ -#define D64_XC_LE 0x00000004 /* loopback enable */ -#define D64_XC_FL 0x00000010 /* flush request */ -#define D64_XC_PD 0x00000800 /* parity check disable */ -#define D64_XC_AE 0x00030000 /* address extension bits */ -#define D64_XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* transmit channel status */ -#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ -#define D64_XS0_XS_SHIFT 28 -#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ -#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ -#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ -#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ -#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ - -#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ -#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ -#define D64_XS1_XE_SHIFT 28 -#define D64_XS1_XE_NOERR 0x00000000 /* no error */ -#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ -#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ -#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ -#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ -#define D64_XS1_XE_COREE 0x50000000 /* core error */ - -/* receive channel control */ -#define D64_RC_RE 0x00000001 /* receive enable */ -#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ -#define D64_RC_RO_SHIFT 1 -#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ -#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ -#define D64_RC_OC 0x00000400 /* overflow continue */ -#define D64_RC_PD 0x00000800 /* parity check disable */ -#define D64_RC_AE 0x00030000 /* address extension bits */ -#define D64_RC_AE_SHIFT 16 - -/* flags for dma controller */ -#define DMA_CTRL_PEN (1 << 0) /* partity enable */ -#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ -#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ -#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ - -/* receive descriptor table pointer */ -#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* receive channel status */ -#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ -#define D64_RS0_RS_SHIFT 28 -#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ -#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ -#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ -#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ -#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ - -#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ -#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ -#define D64_RS1_RE_SHIFT 28 -#define D64_RS1_RE_NOERR 0x00000000 /* no error */ -#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ -#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ -#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ -#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ -#define D64_RS1_RE_COREE 0x50000000 /* core error */ - -/* fifoaddr */ -#define D64_FA_OFF_MASK 0xffff /* offset */ -#define D64_FA_SEL_MASK 0xf0000 /* select */ -#define D64_FA_SEL_SHIFT 16 -#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ -#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ -#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags 1 */ -#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ -#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ -#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ -#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ -#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ - -/* descriptor control flags 2 */ -#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ -#define D64_CTRL2_AE 0x00030000 /* address extension bits */ -#define D64_CTRL2_AE_SHIFT 16 -#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define D64_CTRL_CORE_MASK 0x0ff00000 - -#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ -#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ -#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ -#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ - -/* receive frame status */ -typedef volatile struct { - u16 len; - u16 flags; -} dma_rxh_t; - #endif /* _sbdma_h_ */ diff --git a/drivers/staging/brcm80211/include/sbsdio.h b/drivers/staging/brcm80211/include/sbsdio.h deleted file mode 100644 index c7facd3..0000000 --- a/drivers/staging/brcm80211/include/sbsdio.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBSDIO_H -#define _SBSDIO_H - -#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ - -/* function 1 miscellaneous registers */ -#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ -#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ -#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ -#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ -#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ -#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ -#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ -#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ -#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ -#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ - -/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ -#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ -#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ -#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ -#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ -#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ -#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ -#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ -#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ -#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ -#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ - -#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ -#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ - -/* SBSDIO_SPROM_CS */ -#define SBSDIO_SPROM_IDLE 0 -#define SBSDIO_SPROM_WRITE 1 -#define SBSDIO_SPROM_READ 2 -#define SBSDIO_SPROM_WEN 4 -#define SBSDIO_SPROM_WDS 7 -#define SBSDIO_SPROM_DONE 8 - -/* SBSDIO_SPROM_INFO */ -#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */ -#define SROM_BLANK 0x04 /* depreciated in corerev 6 */ -#define SROM_OTP 0x80 /* OTP present */ - -/* SBSDIO_CHIP_CTRL */ -#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu, - * 1: power on oscillator - * (for 4318 only) - */ -/* SBSDIO_WATERMARK */ -#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device - * to wait before sending data to host - */ - -/* SBSDIO_DEVICE_CTL */ -#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when - * receiving CMD53 - */ -#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is - * synchronous to the sdio clock - */ -#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host - * except the chipActive (rev 8) - */ -#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put - * external pads in tri-state; requires - * sdio bus power cycle to clear (rev 9) - */ -#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ -#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ -#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ -#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ - -/* SBSDIO_FUNC1_CHIPCLKCSR */ -#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ -#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ -#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ -#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ -#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ -#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ -#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ -#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ -/* In rev8, actual avail bits followed original docs */ -#define SBSDIO_Rev8_HT_AVAIL 0x40 -#define SBSDIO_Rev8_ALP_AVAIL 0x80 - -#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) -#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) -#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) -#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) -#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ - (alponly ? 1 : SBSDIO_HTAV(regval))) - -/* SBSDIO_FUNC1_SDIOPULLUP */ -#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */ -#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */ -#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */ -#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */ -#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */ - -/* function 1 OCP space */ -#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ -#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 -#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ - -/* some duplication with sbsdpcmdev.h here */ -/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ -#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ -#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ -#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ -#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ - -/* direct(mapped) cis space */ -#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ -#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ -#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */ - -#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ - -#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, - * link bytes - */ - -/* indirect cis access (in sprom) */ -#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from - * 8th byte - */ - -#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one - * data command - */ - -#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ - -#endif /* _SBSDIO_H */ diff --git a/drivers/staging/brcm80211/include/sbsdpcmdev.h b/drivers/staging/brcm80211/include/sbsdpcmdev.h deleted file mode 100644 index afd3581..0000000 --- a/drivers/staging/brcm80211/include/sbsdpcmdev.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbsdpcmdev_h_ -#define _sbsdpcmdev_h_ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - dma64regs_t xmt; /* dma tx */ - u32 PAD[2]; - dma64regs_t rcv; /* dma rx */ - u32 PAD[2]; -} dma64p_t; - -/* dma64 sdiod corerev >= 1 */ -typedef volatile struct { - dma64p_t dma64regs[2]; - dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ - u32 PAD[92]; -} sdiodma64_t; - -/* dma32 sdiod corerev == 0 */ -typedef volatile struct { - dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ - u32 PAD[108]; -} sdiodma32_t; - -/* dma32 regs for pcmcia core */ -typedef volatile struct { - dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ - u32 PAD[116]; -} pcmdma32_t; - -/* core registers */ -typedef volatile struct { - u32 corecontrol; /* CoreControl, 0x000, rev8 */ - u32 corestatus; /* CoreStatus, 0x004, rev8 */ - u32 PAD[1]; - u32 biststatus; /* BistStatus, 0x00c, rev8 */ - - /* PCMCIA access */ - u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ - u16 PAD[1]; - u16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ - u16 PAD[1]; - u16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ - u16 PAD[1]; - u16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ - u16 PAD[1]; - - /* interrupt */ - u32 intstatus; /* IntStatus, 0x020, rev8 */ - u32 hostintmask; /* IntHostMask, 0x024, rev8 */ - u32 intmask; /* IntSbMask, 0x028, rev8 */ - u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ - u32 sbintmask; /* SBIntMask, 0x030, rev8 */ - u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ - u32 PAD[2]; - u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ - u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ - u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ - u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ - - /* synchronized access to registers in SDIO clock domain */ - u32 sdioaccess; /* SdioAccess, 0x050, rev8 */ - u32 PAD[3]; - - /* PCMCIA frame control */ - u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ - u8 PAD[3]; - u8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ - u8 PAD[155]; - - /* interrupt batching control */ - u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ - u32 PAD[3]; - - /* counters */ - u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ - u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ - u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ - u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ - u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ - u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ - u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ - u32 PAD[40]; - u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ - u32 PAD[7]; - - /* DMA engines */ - volatile union { - pcmdma32_t pcm32; - sdiodma32_t sdiod32; - sdiodma64_t sdiod64; - } dma; - - /* SDIO/PCMCIA CIS region */ - char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ - - /* PCMCIA function control registers */ - char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ - u16 PAD[55]; - - /* PCMCIA backplane access */ - u16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ - u16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ - u16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ - u16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ - u16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ - u16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ - u16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ - u16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ - u16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ - u16 PAD[31]; - - /* sprom "size" & "blank" info */ - u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ - u32 PAD[464]; - - /* Sonics SiliconBackplane registers */ - sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */ -} sdpcmd_regs_t; - -/* corecontrol */ -#define CC_CISRDY (1 << 0) /* CIS Ready */ -#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ -#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ -#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ -#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ -#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ - -/* corestatus */ -#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ -#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ -#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ - -#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ -#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ -#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ -#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ - -/* intstatus */ -#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ -#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ -#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ -#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ -#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ -#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ -#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ -#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ -#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ -#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ -#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ -#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ -#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ -#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ -#define I_PC (1 << 10) /* descriptor error */ -#define I_PD (1 << 11) /* data error */ -#define I_DE (1 << 12) /* Descriptor protocol Error */ -#define I_RU (1 << 13) /* Receive descriptor Underflow */ -#define I_RO (1 << 14) /* Receive fifo Overflow */ -#define I_XU (1 << 15) /* Transmit fifo Underflow */ -#define I_RI (1 << 16) /* Receive Interrupt */ -#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ -#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ -#define I_XI (1 << 24) /* Transmit Interrupt */ -#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ -#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ -#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ -#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ -#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ -#define I_SRESET (1 << 30) /* CCCR RES interrupt */ -#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ -#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ -#define I_DMA (I_RI | I_XI | I_ERRORS) - -/* sbintstatus */ -#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ -#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ -#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ - -/* sdioaccess */ -#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ -#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ -#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ -#define SDA_WRITE 0x01000000 /* Write bit */ -#define SDA_READ 0x00000000 /* Write bit cleared for Read */ -#define SDA_BUSY 0x80000000 /* Busy bit */ - -/* sdioaccess-accessible register address spaces */ -#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ -#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ -#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ -#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ - -/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ -#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ -#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ -#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ -#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ -#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ -#define SDA_SBADDRMID 0x00b /* SbAddrMid */ -#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ -#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ -#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ -#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ -#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ -#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ -#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ -#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ - -/* SDA_F2WATERMARK */ -#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ - -/* SDA_SBADDRLOW */ -#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ - -/* SDA_SBADDRMID */ -#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ - -/* SDA_SBADDRHIGH */ -#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ - -/* SDA_FRAMECTRL */ -#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ -#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ -#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ - -/* pcmciaframectrl */ -#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ - -/* intrcvlazy */ -#define IRL_TO_MASK 0x00ffffff /* timeout */ -#define IRL_FC_MASK 0xff000000 /* frame count */ -#define IRL_FC_SHIFT 24 /* frame count */ - -/* rx header */ -typedef volatile struct { - u16 len; - u16 flags; -} sdpcmd_rxh_t; - -/* rx header flags */ -#define RXF_CRC 0x0001 /* CRC error detected */ -#define RXF_WOOS 0x0002 /* write frame out of sync */ -#define RXF_WF_TERM 0x0004 /* write frame terminated */ -#define RXF_ABORT 0x0008 /* write frame aborted */ -#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ - -/* HW frame tag */ -#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ - -#endif /* _sbsdpcmdev_h_ */ diff --git a/drivers/staging/brcm80211/include/sdio.h b/drivers/staging/brcm80211/include/sdio.h deleted file mode 100644 index 670e379..0000000 --- a/drivers/staging/brcm80211/include/sdio.h +++ /dev/null @@ -1,552 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SDIO_H -#define _SDIO_H - -#ifdef BCMSDIO - -/* CCCR structure for function 0 */ -typedef volatile struct { - u8 cccr_sdio_rev; /* RO, cccr and sdio revision */ - u8 sd_rev; /* RO, sd spec revision */ - u8 io_en; /* I/O enable */ - u8 io_rdy; /* I/O ready reg */ - u8 intr_ctl; /* Master and per function interrupt enable control */ - u8 intr_status; /* RO, interrupt pending status */ - u8 io_abort; /* read/write abort or reset all functions */ - u8 bus_inter; /* bus interface control */ - u8 capability; /* RO, card capability */ - - u8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ - u8 cis_base_mid; - u8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ - - /* suspend/resume registers */ - u8 bus_suspend; /* 0xC */ - u8 func_select; /* 0xD */ - u8 exec_flag; /* 0xE */ - u8 ready_flag; /* 0xF */ - - u8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ - - u8 power_control; /* 0x12 (SDIO version 1.10) */ - - u8 speed_control; /* 0x13 */ -} sdio_regs_t; - -/* SDIO Device CCCR offsets */ -#define SDIOD_CCCR_REV 0x00 -#define SDIOD_CCCR_SDREV 0x01 -#define SDIOD_CCCR_IOEN 0x02 -#define SDIOD_CCCR_IORDY 0x03 -#define SDIOD_CCCR_INTEN 0x04 -#define SDIOD_CCCR_INTPEND 0x05 -#define SDIOD_CCCR_IOABORT 0x06 -#define SDIOD_CCCR_BICTRL 0x07 -#define SDIOD_CCCR_CAPABLITIES 0x08 -#define SDIOD_CCCR_CISPTR_0 0x09 -#define SDIOD_CCCR_CISPTR_1 0x0A -#define SDIOD_CCCR_CISPTR_2 0x0B -#define SDIOD_CCCR_BUSSUSP 0x0C -#define SDIOD_CCCR_FUNCSEL 0x0D -#define SDIOD_CCCR_EXECFLAGS 0x0E -#define SDIOD_CCCR_RDYFLAGS 0x0F -#define SDIOD_CCCR_BLKSIZE_0 0x10 -#define SDIOD_CCCR_BLKSIZE_1 0x11 -#define SDIOD_CCCR_POWER_CONTROL 0x12 -#define SDIOD_CCCR_SPEED_CONTROL 0x13 - -/* Broadcom extensions (corerev >= 1) */ -#define SDIOD_CCCR_BRCM_SEPINT 0xf2 - -/* cccr_sdio_rev */ -#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ -#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ - -/* sd_rev */ -#define SD_REV_PHY_MASK 0x0f /* SD format version number */ - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ -#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ -#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ - -/* intr_ctl */ -#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ -#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ -#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ -#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ - -/* io_abort */ -#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ -#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ - -/* bus_inter */ -#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ -#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ -#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ -#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ -#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ -#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ - -/* capability */ -#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ -#define SDIO_CAP_LSC 0x40 /* low speed card */ -#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ -#define SDIO_CAP_SRW 0x04 /* support read wait */ -#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ -#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ - -/* power_control */ -#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ -#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ - -/* speed_control (control device entry into high-speed clocking mode) */ -#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ -#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ - -/* brcm sepint */ -#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ -#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ -#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ - -/* FBR structure for function 1-7, FBR addresses and register offsets */ -typedef volatile struct { - u8 devctr; /* device interface, CSA control */ - u8 ext_dev; /* extended standard I/O device type code */ - u8 pwr_sel; /* power selection support */ - u8 PAD[6]; /* reserved */ - - u8 cis_low; /* CIS LSB */ - u8 cis_mid; - u8 cis_high; /* CIS MSB */ - u8 csa_low; /* code storage area, LSB */ - u8 csa_mid; - u8 csa_high; /* code storage area, MSB */ - u8 csa_dat_win; /* data access window to function */ - - u8 fnx_blk_size[2]; /* block size, little endian */ -} sdio_fbr_t; - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_IOFUNCS 7 - -/* SDIO Device FBR Start Address */ -#define SDIOD_FBR_STARTADDR 0x100 - -/* SDIO Device FBR Size */ -#define SDIOD_FBR_SIZE 0x100 - -/* Macro to calculate FBR register base */ -#define SDIOD_FBR_BASE(n) ((n) * 0x100) - -/* Function register offsets */ -#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ -#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ -#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ - -/* SDIO Function CIS ptr offset */ -#define SDIOD_FBR_CISPTR_0 0x09 -#define SDIOD_FBR_CISPTR_1 0x0A -#define SDIOD_FBR_CISPTR_2 0x0B - -/* Code Storage Area pointer */ -#define SDIOD_FBR_CSA_ADDR_0 0x0C -#define SDIOD_FBR_CSA_ADDR_1 0x0D -#define SDIOD_FBR_CSA_ADDR_2 0x0E -#define SDIOD_FBR_CSA_DATA 0x0F - -/* SDIO Function I/O Block Size */ -#define SDIOD_FBR_BLKSIZE_0 0x10 -#define SDIOD_FBR_BLKSIZE_1 0x11 - -/* devctr */ -#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ -#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ -#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ -/* interface codes */ -#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ -#define SDIOD_DIC_UART 1 -#define SDIOD_DIC_BLUETOOTH_A 2 -#define SDIOD_DIC_BLUETOOTH_B 3 -#define SDIOD_DIC_GPS 4 -#define SDIOD_DIC_CAMERA 5 -#define SDIOD_DIC_PHS 6 -#define SDIOD_DIC_WLAN 7 -#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ - -/* pwr_sel */ -#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ -#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ - -/* misc defines */ -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 -#define SDIO_FUNC_3 3 -#define SDIO_FUNC_4 4 -#define SDIO_FUNC_5 5 -#define SDIO_FUNC_6 6 -#define SDIO_FUNC_7 7 - -#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ -#define SD_CARD_TYPE_IO 1 /* IO only card */ -#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ -#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ - -#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ -#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ - -/* Card registers: status bit position */ -#define CARDREG_STATUS_BIT_OUTOFRANGE 31 -#define CARDREG_STATUS_BIT_COMCRCERROR 23 -#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 -#define CARDREG_STATUS_BIT_ERROR 19 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 -#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 - -#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ -#define SD_CMD_SEND_OPCOND 1 -#define SD_CMD_MMC_SET_RCA 3 -#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ -#define SD_CMD_SELECT_DESELECT_CARD 7 -#define SD_CMD_SEND_CSD 9 -#define SD_CMD_SEND_CID 10 -#define SD_CMD_STOP_TRANSMISSION 12 -#define SD_CMD_SEND_STATUS 13 -#define SD_CMD_GO_INACTIVE_STATE 15 -#define SD_CMD_SET_BLOCKLEN 16 -#define SD_CMD_READ_SINGLE_BLOCK 17 -#define SD_CMD_READ_MULTIPLE_BLOCK 18 -#define SD_CMD_WRITE_BLOCK 24 -#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 -#define SD_CMD_PROGRAM_CSD 27 -#define SD_CMD_SET_WRITE_PROT 28 -#define SD_CMD_CLR_WRITE_PROT 29 -#define SD_CMD_SEND_WRITE_PROT 30 -#define SD_CMD_ERASE_WR_BLK_START 32 -#define SD_CMD_ERASE_WR_BLK_END 33 -#define SD_CMD_ERASE 38 -#define SD_CMD_LOCK_UNLOCK 42 -#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ -#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ -#define SD_CMD_APP_CMD 55 -#define SD_CMD_GEN_CMD 56 -#define SD_CMD_READ_OCR 58 -#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ -#define SD_ACMD_SD_STATUS 13 -#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 -#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 -#define SD_ACMD_SD_SEND_OP_COND 41 -#define SD_ACMD_SET_CLR_CARD_DETECT 42 -#define SD_ACMD_SEND_SCR 51 - -/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ -#define SD_IO_OP_READ 0 /* Read_Write: Read */ -#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ -#define SD_IO_RW_NORMAL 0 /* no RAW */ -#define SD_IO_RW_RAW 1 /* RAW */ -#define SD_IO_BYTE_MODE 0 /* Byte Mode */ -#define SD_IO_BLOCK_MODE 1 /* BlockMode */ -#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ -#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ - -/* build SD_CMD_IO_RW_DIRECT Argument */ -#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ - (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) - -/* build SD_CMD_IO_RW_EXTENDED Argument */ -#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ - (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) - -/* SDIO response parameters */ -#define SD_RSP_NO_NONE 0 -#define SD_RSP_NO_1 1 -#define SD_RSP_NO_2 2 -#define SD_RSP_NO_3 3 -#define SD_RSP_NO_4 4 -#define SD_RSP_NO_5 5 -#define SD_RSP_NO_6 6 - - /* Modified R6 response (to CMD3) */ -#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 -#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 -#define SD_RSP_MR6_ERROR 0x2000 - - /* Modified R1 in R4 Response (to CMD5) */ -#define SD_RSP_MR1_SBIT 0x80 -#define SD_RSP_MR1_PARAMETER_ERROR 0x40 -#define SD_RSP_MR1_RFU5 0x20 -#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 -#define SD_RSP_MR1_COM_CRC_ERROR 0x08 -#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 -#define SD_RSP_MR1_RFU1 0x02 -#define SD_RSP_MR1_IDLE_STATE 0x01 - - /* R5 response (to CMD52 and CMD53) */ -#define SD_RSP_R5_COM_CRC_ERROR 0x80 -#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 -#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 -#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 -#define SD_RSP_R5_ERROR 0x08 -#define SD_RSP_R5_RFU 0x04 -#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 -#define SD_RSP_R5_OUT_OF_RANGE 0x01 - -#define SD_RSP_R5_ERRBITS 0xCB - -/* ------------------------------------------------ - * SDIO Commands and responses - * - * I/O only commands are: - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -/* SDIO Commands */ -#define SDIOH_CMD_0 0 -#define SDIOH_CMD_3 3 -#define SDIOH_CMD_5 5 -#define SDIOH_CMD_7 7 -#define SDIOH_CMD_15 15 -#define SDIOH_CMD_52 52 -#define SDIOH_CMD_53 53 -#define SDIOH_CMD_59 59 - -/* SDIO Command Responses */ -#define SDIOH_RSP_NONE 0 -#define SDIOH_RSP_R1 1 -#define SDIOH_RSP_R2 2 -#define SDIOH_RSP_R3 3 -#define SDIOH_RSP_R4 4 -#define SDIOH_RSP_R5 5 -#define SDIOH_RSP_R6 6 - -/* - * SDIO Response Error flags - */ -#define SDIOH_RSP5_ERROR_FLAGS 0xCB - -/* ------------------------------------------------ - * SDIO Command structures. I/O only commands are: - * - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -#define CMD5_OCR_M BITFIELD_MASK(24) -#define CMD5_OCR_S 0 - -#define CMD7_RCA_M BITFIELD_MASK(16) -#define CMD7_RCA_S 16 - -#define CMD_15_RCA_M BITFIELD_MASK(16) -#define CMD_15_RCA_S 16 - -#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 - */ -#define CMD52_DATA_S 0 -#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD52_REG_ADDR_S 9 -#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ -#define CMD52_RAW_S 27 -#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD52_FUNCTION_S 28 -#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD52_RW_FLAG_S 31 - -#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ -#define CMD53_BYTE_BLK_CNT_S 0 -#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD53_REG_ADDR_S 9 -#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ -#define CMD53_OP_CODE_S 26 -#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ -#define CMD53_BLK_MODE_S 27 -#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD53_FUNCTION_S 28 -#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD53_RW_FLAG_S 31 - -/* ------------------------------------------------------ - * SDIO Command Response structures for SD1 and SD4 modes - * ----------------------------------------------------- - */ -#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ -#define RSP4_IO_OCR_S 0 -#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ -#define RSP4_STUFF_S 24 -#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ -#define RSP4_MEM_PRESENT_S 27 -#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ -#define RSP4_NUM_FUNCS_S 28 -#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ -#define RSP4_CARD_READY_S 31 - -#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] - */ -#define RSP6_STATUS_S 0 -#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ -#define RSP6_IO_RCA_S 16 - -#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ -#define RSP1_AKE_SEQ_ERROR_S 3 -#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP1_APP_CMD_S 5 -#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ -#define RSP1_READY_FOR_DATA_S 8 -#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card - * when Cmd was received - */ -#define RSP1_CURR_STATE_S 9 -#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ -#define RSP1_EARSE_RESET_S 13 -#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ -#define RSP1_CARD_ECC_DISABLE_S 14 -#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ -#define RSP1_WP_ERASE_SKIP_S 15 -#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits - * of CSD - */ -#define RSP1_CID_CSD_OVERW_S 16 -#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ -#define RSP1_ERROR_S 19 -#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ -#define RSP1_CC_ERROR_S 20 -#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed - * to correct data - */ -#define RSP1_CARD_ECC_FAILED_S 21 -#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ -#define RSP1_ILLEGAL_CMD_S 22 -#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed - */ -#define RSP1_COM_CRC_ERROR_S 23 -#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ -#define RSP1_LOCK_UNLOCK_FAIL_S 24 -#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ -#define RSP1_CARD_LOCKED_S 25 -#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program - * write-protected blocks - */ -#define RSP1_WP_VIOLATION_S 26 -#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ -#define RSP1_ERASE_PARAM_S 27 -#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ -#define RSP1_ERASE_SEQ_ERR_S 28 -#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ -#define RSP1_BLK_LEN_ERR_S 29 -#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ -#define RSP1_ADDR_ERR_S 30 -#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ -#define RSP1_OUT_OF_RANGE_S 31 - -#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ -#define RSP5_DATA_S 0 -#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ -#define RSP5_FLAGS_S 8 -#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ -#define RSP5_STUFF_S 16 - -/* ---------------------------------------------- - * SDIO Command Response structures for SPI mode - * ---------------------------------------------- - */ -#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ -#define SPIRSP4_IO_OCR_S 0 -#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ -#define SPIRSP4_STUFF_S 16 -#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ -#define SPIRSP4_MEM_PRESENT_S 19 -#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ -#define SPIRSP4_NUM_FUNCS_S 20 -#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ -#define SPIRSP4_CARD_READY_S 23 -#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ -#define SPIRSP4_IDLE_STATE_S 24 -#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP4_ILLEGAL_CMD_S 26 -#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP4_COM_CRC_ERROR_S 27 -#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP4_FUNC_NUM_ERROR_S 28 -#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP4_PARAM_ERROR_S 30 -#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP4_START_BIT_S 31 - -#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ -#define SPIRSP5_DATA_S 16 -#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ -#define SPIRSP5_IDLE_STATE_S 24 -#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP5_ILLEGAL_CMD_S 26 -#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP5_COM_CRC_ERROR_S 27 -#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP5_FUNC_NUM_ERROR_S 28 -#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP5_PARAM_ERROR_S 30 -#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP5_START_BIT_S 31 - -/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ -#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error - */ -#define RSP6STAT_AKE_SEQ_ERROR_S 3 -#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP6STAT_APP_CMD_S 5 -#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data - * (buff empty) - */ -#define RSP6STAT_READY_FOR_DATA_S 8 -#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at - * Cmd reception - */ -#define RSP6STAT_CURR_STATE_S 9 -#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 - */ -#define RSP6STAT_ERROR_S 13 -#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for - * card state Bit 22 - */ -#define RSP6STAT_ILLEGAL_CMD_S 14 -#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command - * failed Bit 23 - */ -#define RSP6STAT_COM_CRC_ERROR_S 15 - -#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ -#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE - -#endif /* def BCMSDIO */ -#endif /* _SDIO_H */ -- cgit v0.10.2 From 31c9f6d970f3b7bc5d58267c6f6aba94cce23872 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:20 +0200 Subject: staging: brcm80211: moved header files to more specific directory Code cleanup. Header files only used by the softmac were moved to the brcmsmac dir, same approach for fullmac header files. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index e57dd00..d441500 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -24,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h b/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h new file mode 100644 index 0000000..21d6a3a --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _bcmsdpcm_h_ +#define _bcmsdpcm_h_ + +/* + * Software allocation of To SB Mailbox resources + */ + +/* intstatus bits */ +#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ +#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ +#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ +#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ + +#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) + +/* tosbmailbox bits corresponding to intstatus bits */ +#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ +#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ +#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ +#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ +#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ + +/* tosbmailboxdata */ +#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ +#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ + +/* + * Software allocation of To Host Mailbox resources + */ + +/* intstatus bits */ +#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ +#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ +#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ +#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ + +#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) + +/* tohostmailbox bits corresponding to intstatus bits */ +#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ +#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ +#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ +#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ +#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ + +/* tohostmailboxdata */ +#define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */ +#define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */ +#define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */ +#define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */ + +#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ +#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ + +#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ +#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ + +/* + * Software-defined protocol header + */ + +/* Current protocol version */ +#define SDPCM_PROT_VERSION 4 + +/* SW frame header */ +#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ +#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */ + +#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ +#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ +#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */ + +#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ +#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ +#define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ + +/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ +#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ +#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ +#define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ +#define SDPCM_NEXTLEN_OFFSET 2 + +/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ +#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ +#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) +#define SDPCM_DOFFSET_MASK 0xff000000 +#define SDPCM_DOFFSET_SHIFT 24 + +#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ +#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) +#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ +#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) +#define SDPCM_VERSION_OFFSET 6 /* Version # */ +#define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) +#define SDPCM_UNUSED_OFFSET 7 /* Spare */ +#define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) + +#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ + +/* logical channel numbers */ +#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ +#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ +#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ +#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ +#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ +#define SDPCM_MAX_CHANNEL 15 + +#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ + +#define SDPCM_FLAG_RESVD0 0x01 +#define SDPCM_FLAG_RESVD1 0x02 +#define SDPCM_FLAG_GSPI_TXENAB 0x04 +#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ + +/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ +#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) + +#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) + +/* For TEST_CHANNEL packets, define another 4-byte header */ +#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); + * Semantics of Ext byte depend on command. + * Len is current or requested frame length, not + * including test header; sent little-endian. + */ +#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ +#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ +#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ +#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ +#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ + +/* Handy macro for filling in datagen packets with a pattern */ +#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) + +/* + * Software counters (first part matches hardware counters) + */ + +typedef volatile struct { + u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ + u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ + u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ + u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ + u32 abort; /* AbortCount, SDIO: aborts */ + u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ + u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ + u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ + u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ + u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ + u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ + u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ + u32 rxdescuflo; /* receive descriptor underflows */ + u32 rxfifooflo; /* receive fifo overflows */ + u32 txfifouflo; /* transmit fifo underflows */ + u32 runt; /* runt (too short) frames recv'd from bus */ + u32 badlen; /* frame's rxh len does not match its hw tag len */ + u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ + u32 seqbreak; /* break in sequence # space from one rx frame to the next */ + u32 rxfcrc; /* frame rx header indicates crc error */ + u32 rxfwoos; /* frame rx header indicates write out of sync */ + u32 rxfwft; /* frame rx header indicates write frame termination */ + u32 rxfabort; /* frame rx header indicates frame aborted */ + u32 woosint; /* write out of sync interrupt */ + u32 roosint; /* read out of sync interrupt */ + u32 rftermint; /* read frame terminate interrupt */ + u32 wftermint; /* write frame terminate interrupt */ +} sdpcmd_cnt_t; + +/* + * Shared structure between dongle and the host. + * The structure contains pointers to trap or assert information. + */ +#define SDPCM_SHARED_VERSION 0x0002 +#define SDPCM_SHARED_VERSION_MASK 0x00FF +#define SDPCM_SHARED_ASSERT_BUILT 0x0100 +#define SDPCM_SHARED_ASSERT 0x0200 +#define SDPCM_SHARED_TRAP 0x0400 + +typedef struct { + u32 flags; + u32 trap_addr; + u32 assert_exp_addr; + u32 assert_file_addr; + u32 assert_line; + u32 console_addr; /* Address of rte_cons_t */ + u32 msgtrace_addr; + u8 tag[32]; +} sdpcm_shared_t; + +extern sdpcm_shared_t sdpcm_shared; + +#endif /* _bcmsdpcm_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmnvram.h b/drivers/staging/brcm80211/brcmsmac/bcmnvram.h new file mode 100644 index 0000000..12645dd --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bcmnvram.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _bcmnvram_h_ +#define _bcmnvram_h_ + +#ifndef _LANGUAGE_ASSEMBLY + +#include + +struct nvram_header { + u32 magic; + u32 len; + u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */ + u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */ + u32 config_ncdl; /* ncdl values for memc */ +}; + +/* + * Initialize NVRAM access. May be unnecessary or undefined on certain + * platforms. + */ +extern int nvram_init(void); + +/* + * Append a chunk of nvram variables to the global list + */ +extern int nvram_append(char *vars, uint varsz); + +/* + * Check for reset button press for restoring factory defaults. + */ +extern int nvram_reset(void); + +/* + * Disable NVRAM access. May be unnecessary or undefined on certain + * platforms. + */ +extern void nvram_exit(void); + +/* + * Get the value of an NVRAM variable. The pointer returned may be + * invalid after a set. + * @param name name of variable to get + * @return value of variable or NULL if undefined + */ +extern char *nvram_get(const char *name); + +/* + * Get the value of an NVRAM variable. + * @param name name of variable to get + * @return value of variable or NUL if undefined + */ +#define nvram_safe_get(name) (nvram_get(name) ? : "") + +/* + * Match an NVRAM variable. + * @param name name of variable to match + * @param match value to compare against value of variable + * @return true if variable is defined and its value is string equal + * to match or false otherwise + */ +static inline int nvram_match(char *name, char *match) +{ + const char *value = nvram_get(name); + return value && !strcmp(value, match); +} + +/* + * Inversely match an NVRAM variable. + * @param name name of variable to match + * @param match value to compare against value of variable + * @return true if variable is defined and its value is not string + * equal to invmatch or false otherwise + */ +static inline int nvram_invmatch(char *name, char *invmatch) +{ + const char *value = nvram_get(name); + return value && strcmp(value, invmatch); +} + +/* + * Set the value of an NVRAM variable. The name and value strings are + * copied into private storage. Pointers to previously set values + * may become invalid. The new value may be immediately + * retrieved but will not be permanently stored until a commit. + * @param name name of variable to set + * @param value value of variable + * @return 0 on success and errno on failure + */ +extern int nvram_set(const char *name, const char *value); + +/* + * Unset an NVRAM variable. Pointers to previously set values + * remain valid until a set. + * @param name name of variable to unset + * @return 0 on success and errno on failure + * NOTE: use nvram_commit to commit this change to flash. + */ +extern int nvram_unset(const char *name); + +/* + * Commit NVRAM variables to permanent storage. All pointers to values + * may be invalid after a commit. + * NVRAM values are undefined after a commit. + * @return 0 on success and errno on failure + */ +extern int nvram_commit(void); + +/* + * Get all NVRAM variables (format name=value\0 ... \0\0). + * @param buf buffer to store variables + * @param count size of buffer in bytes + * @return 0 on success and errno on failure + */ +extern int nvram_getall(char *nvram_buf, int count); + +#endif /* _LANGUAGE_ASSEMBLY */ + +/* variable access */ +extern char *getvar(char *vars, const char *name); +extern int getintvar(char *vars, const char *name); + +/* The NVRAM version number stored as an NVRAM variable */ +#define NVRAM_SOFTWARE_VERSION "1" + +#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ +#define NVRAM_CLEAR_MAGIC 0x0 +#define NVRAM_INVALID_MAGIC 0xFFFFFFFF +#define NVRAM_VERSION 1 +#define NVRAM_HEADER_SIZE 20 +#define NVRAM_SPACE 0x8000 + +#define NVRAM_MAX_VALUE_LEN 255 +#define NVRAM_MAX_PARAM_LEN 64 + +#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */ +#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */ + +#endif /* _bcmnvram_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/bcmotp.h new file mode 100644 index 0000000..5803acc --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _bcmotp_h_ +#define _bcmotp_h_ + +/* OTP regions */ +#define OTP_HW_RGN 1 +#define OTP_SW_RGN 2 +#define OTP_CI_RGN 4 +#define OTP_FUSE_RGN 8 +#define OTP_ALL_RGN 0xf /* From h/w region to end of OTP including checksum */ + +/* OTP Size */ +#define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ + +/* Fixed size subregions sizes in words */ +#define OTPGU_CI_SZ 2 + +/* OTP usage */ +#define OTP4325_FM_DISABLED_OFFSET 188 + +/* Exported functions */ +extern int otp_status(void *oh); +extern int otp_size(void *oh); +extern u16 otp_read_bit(void *oh, uint offset); +extern void *otp_init(si_t *sih); +extern int otp_read_region(si_t *sih, int region, u16 *data, uint *wlen); +extern int otp_nvread(void *oh, char *data, uint *len); + +#endif /* _bcmotp_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index d374673..311bc0c 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -362,6 +362,9 @@ #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ +/* Max. nvram variable table size */ +#define MAXSZ_NVRAM_VARS 4096 + typedef struct { const char *name; u32 revmask; diff --git a/drivers/staging/brcm80211/include/bcmnvram.h b/drivers/staging/brcm80211/include/bcmnvram.h deleted file mode 100644 index 12645dd..0000000 --- a/drivers/staging/brcm80211/include/bcmnvram.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmnvram_h_ -#define _bcmnvram_h_ - -#ifndef _LANGUAGE_ASSEMBLY - -#include - -struct nvram_header { - u32 magic; - u32 len; - u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */ - u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */ - u32 config_ncdl; /* ncdl values for memc */ -}; - -/* - * Initialize NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern int nvram_init(void); - -/* - * Append a chunk of nvram variables to the global list - */ -extern int nvram_append(char *vars, uint varsz); - -/* - * Check for reset button press for restoring factory defaults. - */ -extern int nvram_reset(void); - -/* - * Disable NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern void nvram_exit(void); - -/* - * Get the value of an NVRAM variable. The pointer returned may be - * invalid after a set. - * @param name name of variable to get - * @return value of variable or NULL if undefined - */ -extern char *nvram_get(const char *name); - -/* - * Get the value of an NVRAM variable. - * @param name name of variable to get - * @return value of variable or NUL if undefined - */ -#define nvram_safe_get(name) (nvram_get(name) ? : "") - -/* - * Match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is string equal - * to match or false otherwise - */ -static inline int nvram_match(char *name, char *match) -{ - const char *value = nvram_get(name); - return value && !strcmp(value, match); -} - -/* - * Inversely match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is not string - * equal to invmatch or false otherwise - */ -static inline int nvram_invmatch(char *name, char *invmatch) -{ - const char *value = nvram_get(name); - return value && strcmp(value, invmatch); -} - -/* - * Set the value of an NVRAM variable. The name and value strings are - * copied into private storage. Pointers to previously set values - * may become invalid. The new value may be immediately - * retrieved but will not be permanently stored until a commit. - * @param name name of variable to set - * @param value value of variable - * @return 0 on success and errno on failure - */ -extern int nvram_set(const char *name, const char *value); - -/* - * Unset an NVRAM variable. Pointers to previously set values - * remain valid until a set. - * @param name name of variable to unset - * @return 0 on success and errno on failure - * NOTE: use nvram_commit to commit this change to flash. - */ -extern int nvram_unset(const char *name); - -/* - * Commit NVRAM variables to permanent storage. All pointers to values - * may be invalid after a commit. - * NVRAM values are undefined after a commit. - * @return 0 on success and errno on failure - */ -extern int nvram_commit(void); - -/* - * Get all NVRAM variables (format name=value\0 ... \0\0). - * @param buf buffer to store variables - * @param count size of buffer in bytes - * @return 0 on success and errno on failure - */ -extern int nvram_getall(char *nvram_buf, int count); - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* variable access */ -extern char *getvar(char *vars, const char *name); -extern int getintvar(char *vars, const char *name); - -/* The NVRAM version number stored as an NVRAM variable */ -#define NVRAM_SOFTWARE_VERSION "1" - -#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ -#define NVRAM_CLEAR_MAGIC 0x0 -#define NVRAM_INVALID_MAGIC 0xFFFFFFFF -#define NVRAM_VERSION 1 -#define NVRAM_HEADER_SIZE 20 -#define NVRAM_SPACE 0x8000 - -#define NVRAM_MAX_VALUE_LEN 255 -#define NVRAM_MAX_PARAM_LEN 64 - -#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */ -#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */ - -#endif /* _bcmnvram_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmotp.h b/drivers/staging/brcm80211/include/bcmotp.h deleted file mode 100644 index 5803acc..0000000 --- a/drivers/staging/brcm80211/include/bcmotp.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmotp_h_ -#define _bcmotp_h_ - -/* OTP regions */ -#define OTP_HW_RGN 1 -#define OTP_SW_RGN 2 -#define OTP_CI_RGN 4 -#define OTP_FUSE_RGN 8 -#define OTP_ALL_RGN 0xf /* From h/w region to end of OTP including checksum */ - -/* OTP Size */ -#define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ - -/* Fixed size subregions sizes in words */ -#define OTPGU_CI_SZ 2 - -/* OTP usage */ -#define OTP4325_FM_DISABLED_OFFSET 188 - -/* Exported functions */ -extern int otp_status(void *oh); -extern int otp_size(void *oh); -extern u16 otp_read_bit(void *oh, uint offset); -extern void *otp_init(si_t *sih); -extern int otp_read_region(si_t *sih, int region, u16 *data, uint *wlen); -extern int otp_nvread(void *oh, char *data, uint *len); - -#endif /* _bcmotp_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmsdpcm.h b/drivers/staging/brcm80211/include/bcmsdpcm.h deleted file mode 100644 index 21d6a3a..0000000 --- a/drivers/staging/brcm80211/include/bcmsdpcm.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsdpcm_h_ -#define _bcmsdpcm_h_ - -/* - * Software allocation of To SB Mailbox resources - */ - -/* intstatus bits */ -#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ -#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ -#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ -#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ - -#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) - -/* tosbmailbox bits corresponding to intstatus bits */ -#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ -#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ -#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ -#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ -#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ - -/* tosbmailboxdata */ -#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ -#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ - -/* - * Software allocation of To Host Mailbox resources - */ - -/* intstatus bits */ -#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ -#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ -#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ -#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ - -#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) - -/* tohostmailbox bits corresponding to intstatus bits */ -#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ -#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ -#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ -#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ -#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ - -/* tohostmailboxdata */ -#define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */ -#define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */ -#define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */ -#define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */ - -#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ -#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ - -#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ -#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ - -/* - * Software-defined protocol header - */ - -/* Current protocol version */ -#define SDPCM_PROT_VERSION 4 - -/* SW frame header */ -#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ -#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */ - -#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ -#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ -#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */ - -#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ -#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ -#define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ - -/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ -#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ -#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ -#define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ -#define SDPCM_NEXTLEN_OFFSET 2 - -/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ -#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ -#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) -#define SDPCM_DOFFSET_MASK 0xff000000 -#define SDPCM_DOFFSET_SHIFT 24 - -#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ -#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) -#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ -#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) -#define SDPCM_VERSION_OFFSET 6 /* Version # */ -#define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) -#define SDPCM_UNUSED_OFFSET 7 /* Spare */ -#define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) - -#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ - -/* logical channel numbers */ -#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ -#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ -#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ -#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ -#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ -#define SDPCM_MAX_CHANNEL 15 - -#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ - -#define SDPCM_FLAG_RESVD0 0x01 -#define SDPCM_FLAG_RESVD1 0x02 -#define SDPCM_FLAG_GSPI_TXENAB 0x04 -#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ - -/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ -#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) - -#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) - -/* For TEST_CHANNEL packets, define another 4-byte header */ -#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); - * Semantics of Ext byte depend on command. - * Len is current or requested frame length, not - * including test header; sent little-endian. - */ -#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ -#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ -#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ -#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ -#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ - -/* Handy macro for filling in datagen packets with a pattern */ -#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) - -/* - * Software counters (first part matches hardware counters) - */ - -typedef volatile struct { - u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ - u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ - u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ - u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ - u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ - u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ - u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ - u32 rxdescuflo; /* receive descriptor underflows */ - u32 rxfifooflo; /* receive fifo overflows */ - u32 txfifouflo; /* transmit fifo underflows */ - u32 runt; /* runt (too short) frames recv'd from bus */ - u32 badlen; /* frame's rxh len does not match its hw tag len */ - u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ - u32 seqbreak; /* break in sequence # space from one rx frame to the next */ - u32 rxfcrc; /* frame rx header indicates crc error */ - u32 rxfwoos; /* frame rx header indicates write out of sync */ - u32 rxfwft; /* frame rx header indicates write frame termination */ - u32 rxfabort; /* frame rx header indicates frame aborted */ - u32 woosint; /* write out of sync interrupt */ - u32 roosint; /* read out of sync interrupt */ - u32 rftermint; /* read frame terminate interrupt */ - u32 wftermint; /* write frame terminate interrupt */ -} sdpcmd_cnt_t; - -/* - * Shared structure between dongle and the host. - * The structure contains pointers to trap or assert information. - */ -#define SDPCM_SHARED_VERSION 0x0002 -#define SDPCM_SHARED_VERSION_MASK 0x00FF -#define SDPCM_SHARED_ASSERT_BUILT 0x0100 -#define SDPCM_SHARED_ASSERT 0x0200 -#define SDPCM_SHARED_TRAP 0x0400 - -typedef struct { - u32 flags; - u32 trap_addr; - u32 assert_exp_addr; - u32 assert_file_addr; - u32 assert_line; - u32 console_addr; /* Address of rte_cons_t */ - u32 msgtrace_addr; - u8 tag[32]; -} sdpcm_shared_t; - -extern sdpcm_shared_t sdpcm_shared; - -#endif /* _bcmsdpcm_h_ */ diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c index b78ce54..2724d7c 100644 --- a/drivers/staging/brcm80211/util/bcmutils.c +++ b/drivers/staging/brcm80211/util/bcmutils.c @@ -25,7 +25,6 @@ #include #include #include -#include #include MODULE_AUTHOR("Broadcom Corporation"); -- cgit v0.10.2 From e40514c2001334da200ba1e019cfecb0650335d8 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:21 +0200 Subject: staging: brcm80211: cleaned bcmdefs.h Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 311bc0c..952bc40 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -20,6 +20,7 @@ #include #include #include +#include "wlc_types.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 77baef2..611a7e2 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -24,6 +24,7 @@ #include #include +#include "wlc_types.h" #include #include @@ -148,6 +149,19 @@ #define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ #define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ +#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ +#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ +#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ +#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ + +/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). + * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. + * There is a compile time check in wlc.c which ensure that this value is at least as big + * as TXOFF. This value is used in dma_rxfill (dma.c). + */ + +#define BCMEXTRAHDROOM 172 + /* debug/trace */ #ifdef BCMDBG #define DMA_ERROR(args) \ @@ -171,6 +185,15 @@ #define DMA_NONE(args) +typedef unsigned long dmaaddr_t; +#define PHYSADDRHI(_pa) (0) +#define PHYSADDRHISET(_pa, _val) +#define PHYSADDRLO(_pa) ((_pa)) +#define PHYSADDRLOSET(_pa, _val) \ + do { \ + (_pa) = (_val); \ + } while (0) + #define d64txregs dregs.d64_u.txregs_64 #define d64rxregs dregs.d64_u.rxregs_64 #define txd64 dregs.d64_u.txd_64 @@ -186,6 +209,19 @@ static uint dma_msg_level; #define R_SM(r) (*(r)) #define W_SM(r, v) (*(r) = (v)) +/* One physical DMA segment */ +typedef struct { + dmaaddr_t addr; + u32 length; +} dma_seg_t; + +typedef struct { + void *oshdmah; /* Opaque handle for OSL to store its information */ + uint origsize; /* Size of the virtual packet */ + uint nsegs; + dma_seg_t segs[MAX_DMA_SEGS]; +} dma_seg_map_t; + /* * DMA Descriptor * Descriptors are only read by the hardware, never written back. diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index 22ba415..1e9865f 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -29,6 +29,7 @@ #include #include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c index 620eb86..78d8cbe 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h b/drivers/staging/brcm80211/brcmsmac/wl_ucode.h index 6933fda..28838d8 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_ucode.h @@ -14,6 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#include "wlc_types.h" /* forward structure declarations */ + #define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */ #define MAX_FW_SIZE 150000 diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index d066339..4e62b11 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -47,6 +47,24 @@ #define AC_COUNT 4 +/* Macros for doing definition and get/set of bitfields + * Usage example, e.g. a three-bit field (bits 4-6): + * #define _M BITFIELD_MASK(3) + * #define _S 4 + * ... + * regval = R_REG(osh, ®s->regfoo); + * field = GFIELD(regval, ); + * regval = SFIELD(regval, , 1); + * W_REG(osh, ®s->regfoo, regval); + */ +#define BITFIELD_MASK(width) \ + (((unsigned)1 << (width)) - 1) +#define GFIELD(val, field) \ + (((val) >> field ## _S) & field ## _M) +#define SFIELD(val, field, bits) \ + (((val) & (~(field ## _M << field ## _S))) | \ + ((unsigned)(bits) << field ## _S)) + /* For managing scan result lists */ struct wlc_bss_list { uint count; @@ -158,6 +176,8 @@ extern const u8 prio2fifo[]; #define EDCF_LONG_M BITFIELD_MASK(4) #define EDCF_LFB_M BITFIELD_MASK(4) +#define NFIFO 6 /* # tx/rx fifopairs */ + #define WLC_WME_RETRY_SHORT_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SHORT) #define WLC_WME_RETRY_SFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SFB) #define WLC_WME_RETRY_LONG_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LONG) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index bd0885e..0ab16c4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -17,6 +17,7 @@ #ifndef _wlc_pub_h_ #define _wlc_pub_h_ +#include "wlc_types.h" /* forward structure declarations */ #include "bcmwifi.h" /* for chanspec_t */ #define WLC_NUMRATES 16 /* max # of rates in a rateset */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index b8cede1..76a1348 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -17,7 +17,24 @@ #ifndef _wlc_types_h_ #define _wlc_types_h_ +/* Bus types */ +#define SI_BUS 0 /* SOC Interconnect */ +#define PCI_BUS 1 /* PCI target */ +#define SDIO_BUS 3 /* SDIO target */ +#define JTAG_BUS 4 /* JTAG */ +#define USB_BUS 5 /* USB (does not support R/W REG) */ +#define SPI_BUS 6 /* gSPI target */ +#define RPC_BUS 7 /* RPC target */ + +#define WL_CHAN_FREQ_RANGE_2G 0 +#define WL_CHAN_FREQ_RANGE_5GL 1 +#define WL_CHAN_FREQ_RANGE_5GM 2 +#define WL_CHAN_FREQ_RANGE_5GH 3 + +#define MAX_DMA_SEGS 4 + /* forward declarations */ +struct wl_info; struct wlc_info; struct wlc_hw_info; struct wlc_if; @@ -27,5 +44,6 @@ struct antsel_info; struct bmac_pmq; struct d11init; struct dma_pub; +struct wlc_bsscfg; #endif /* _wlc_types_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 7613845..cf9dc0e 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -25,7 +25,6 @@ #define USB_BUS 5 #define SPI_BUS 6 - #ifndef OFF #define OFF 0 #endif @@ -36,96 +35,6 @@ #define AUTO (-1) /* Auto = -1 */ -/* Bus types */ -#define SI_BUS 0 /* SOC Interconnect */ -#define PCI_BUS 1 /* PCI target */ -#define SDIO_BUS 3 /* SDIO target */ -#define JTAG_BUS 4 /* JTAG */ -#define USB_BUS 5 /* USB (does not support R/W REG) */ -#define SPI_BUS 6 /* gSPI target */ -#define RPC_BUS 7 /* RPC target */ - - -/* Defines for DMA Address Width - Shared between OSL and HNDDMA */ -#define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */ -#define DMADDR_MASK_30 0xc0000000 /* Address mask for 30-bits */ -#define DMADDR_MASK_0 0xffffffff /* Address mask for 0-bits (hi-part) */ - -#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ -#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ -#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ -#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ - -#ifdef BCMDMA64OSL -typedef struct { - u32 loaddr; - u32 hiaddr; -} dma64addr_t; - -typedef dma64addr_t dmaaddr_t; -#define PHYSADDRHI(_pa) ((_pa).hiaddr) -#define PHYSADDRHISET(_pa, _val) \ - do { \ - (_pa).hiaddr = (_val); \ - } while (0) -#define PHYSADDRLO(_pa) ((_pa).loaddr) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa).loaddr = (_val); \ - } while (0) - -#else -typedef unsigned long dmaaddr_t; -#define PHYSADDRHI(_pa) (0) -#define PHYSADDRHISET(_pa, _val) -#define PHYSADDRLO(_pa) ((_pa)) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa) = (_val); \ - } while (0) -#endif /* BCMDMA64OSL */ - -/* One physical DMA segment */ -typedef struct { - dmaaddr_t addr; - u32 length; -} dma_seg_t; - -#define MAX_DMA_SEGS 4 - -typedef struct { - void *oshdmah; /* Opaque handle for OSL to store its information */ - uint origsize; /* Size of the virtual packet */ - uint nsegs; - dma_seg_t segs[MAX_DMA_SEGS]; -} dma_seg_map_t; - -/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). - * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. - * There is a compile time check in wlc.c which ensure that this value is at least as big - * as TXOFF. This value is used in dma_rxfill (dma.c). - */ - -#define BCMEXTRAHDROOM 172 - -/* Macros for doing definition and get/set of bitfields - * Usage example, e.g. a three-bit field (bits 4-6): - * #define _M BITFIELD_MASK(3) - * #define _S 4 - * ... - * regval = R_REG(osh, ®s->regfoo); - * field = GFIELD(regval, ); - * regval = SFIELD(regval, , 1); - * W_REG(osh, ®s->regfoo, regval); - */ -#define BITFIELD_MASK(width) \ - (((unsigned)1 << (width)) - 1) -#define GFIELD(val, field) \ - (((val) >> field ## _S) & field ## _M) -#define SFIELD(val, field, bits) \ - (((val) & (~(field ## _M << field ## _S))) | \ - ((unsigned)(bits) << field ## _S)) - /* * Priority definitions according 802.1D */ @@ -137,17 +46,12 @@ typedef struct { #define PRIO_8021D_VI 5 #define PRIO_8021D_VO 6 #define PRIO_8021D_NC 7 + #define MAXPRIO 7 #define NUMPRIO (MAXPRIO + 1) -/* Max. nvram variable table size */ -#define MAXSZ_NVRAM_VARS 4096 - -/* handle forward declaration */ -struct wl_info; -struct wlc_bsscfg; - #define WL_NUMRATES 16 /* max # of rates in a rateset */ + typedef struct wl_rateset { u32 count; /* # rates in this set */ u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ @@ -187,16 +91,8 @@ typedef struct wl_rateset { #define WL_ERROR_VAL 0x00000001 #define WL_TRACE_VAL 0x00000002 -#define NFIFO 6 /* # tx/rx fifopairs */ - #define PM_OFF 0 #define PM_MAX 1 #define PM_FAST 2 -/* band range returned by band_range iovar */ -#define WL_CHAN_FREQ_RANGE_2G 0 -#define WL_CHAN_FREQ_RANGE_5GL 1 -#define WL_CHAN_FREQ_RANGE_5GM 2 -#define WL_CHAN_FREQ_RANGE_5GH 3 - #endif /* _bcmdefs_h_ */ -- cgit v0.10.2 From 4b1681163cbe5a07d322332b1ec238ffdf43a084 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:22 +0200 Subject: staging: brcm80211: remove usage of pcicfg.h from brcmsmac driver All PCI related definitions needed by the brcmsmac driver are going to be consolidated in single header file nicpci.h. This commit removes need to include pcicfg.h in brcmsmac driver sources. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 9aec084..bae40fe2 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -24,7 +24,6 @@ #include #include #include -#include #include /* ********** from siutils.c *********** */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 952bc40..e0899c8 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 806b2ca..a96173d 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -27,7 +27,6 @@ #include #include #include -#include /* chipcontrol */ #define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ @@ -83,7 +82,7 @@ static bool pcicore_pmecap(pcicore_info_t *pi); /* Initialize the PCI core. It's caller's responsibility to make sure that this is done * only once */ -void *pcicore_init(si_t *sih, void *pdev, void *regs) +void *pcicore_init(struct si_pub *sih, void *pdev, void *regs) { pcicore_info_t *pi; diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 3d9f791..ee026d3 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include "phy/wlc_phy_int.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index a7994e4..2ee0785 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index c50f335..18a5463 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index 7bb122b..c94b459 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -23,14 +23,12 @@ #include #include -#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/include/nicpci.h b/drivers/staging/brcm80211/include/nicpci.h index f901c60..e9058c6 100644 --- a/drivers/staging/brcm80211/include/nicpci.h +++ b/drivers/staging/brcm80211/include/nicpci.h @@ -17,7 +17,47 @@ #ifndef _NICPCI_H #define _NICPCI_H +/* PCI configuration address space size */ +#define PCI_SZPCR 256 + +/* Brcm PCI configuration registers */ +/* backplane address space accessed by BAR0 */ +#define PCI_BAR0_WIN 0x80 +/* sprom property control */ +#define PCI_SPROM_CONTROL 0x88 +/* mask of PCI and other cores interrupts */ +#define PCI_INT_MASK 0x94 +/* backplane core interrupt mask bits offset */ +#define PCI_SBIM_SHIFT 8 +/* backplane address space accessed by second 4KB of BAR0 */ +#define PCI_BAR0_WIN2 0xac +/* pci config space gpio input (>=rev3) */ +#define PCI_GPIO_IN 0xb0 +/* pci config space gpio output (>=rev3) */ +#define PCI_GPIO_OUT 0xb4 +/* pci config space gpio output enable (>=rev3) */ +#define PCI_GPIO_OUTEN 0xb8 + +/* bar0 + 4K accesses external sprom */ +#define PCI_BAR0_SPROM_OFFSET (4 * 1024) +/* bar0 + 6K accesses pci core registers */ +#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) +/* + * pci core SB registers are at the end of the + * 8KB window, so their address is the "regular" + * address plus 4K + */ +#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) +/* bar0 window size Match with corerev 13 */ +#define PCI_BAR0_WINSZ (16 * 1024) +/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ +/* bar0 + 8K accesses pci/pcie core registers */ +#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) +/* bar0 + 12K accesses chipc core registers */ +#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) + struct sbpcieregs; +struct si_pub; extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, unsigned char *buf, u32 *buflen); @@ -29,7 +69,7 @@ extern uint pcie_writereg(struct sbpcieregs *pcieregs, extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); -extern void *pcicore_init(si_t *sih, void *pdev, void *regs); +extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); extern void pcicore_deinit(void *pch); extern void pcicore_attach(void *pch, char *pvars, int state); extern void pcicore_hwup(void *pch); -- cgit v0.10.2 From 60204bef36d17504aeef37a8a209aa53562969e7 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:23 +0200 Subject: staging: brcm80211: move PCI related header files to appropriate driver folder The include file pcicfg.h is now only required by brcmfmac driver. Similarly, nicpci.h is only required by brcmsmac driver. These header files have been moved to the appropriate driver specific folder. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/pcicfg.h b/drivers/staging/brcm80211/brcmfmac/pcicfg.h new file mode 100644 index 0000000..d0c617a --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/pcicfg.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _h_pcicfg_ +#define _h_pcicfg_ + +#include + +/* PCI configuration address space size */ +#define PCI_SZPCR 256 + +/* Everything below is BRCM HND proprietary */ + +/* Brcm PCI configuration registers */ +#define PCI_BAR0_WIN 0x80 /* backplane address space accessed by BAR0 */ +#define PCI_SPROM_CONTROL 0x88 /* sprom property control */ +#define PCI_INT_MASK 0x94 /* mask of PCI and other cores interrupts */ +#define PCI_SBIM_SHIFT 8 /* backplane core interrupt mask bits offset */ +#define PCI_BAR0_WIN2 0xac /* backplane address space accessed by second 4KB of BAR0 */ +#define PCI_GPIO_IN 0xb0 /* pci config space gpio input (>=rev3) */ +#define PCI_GPIO_OUT 0xb4 /* pci config space gpio output (>=rev3) */ +#define PCI_GPIO_OUTEN 0xb8 /* pci config space gpio output enable (>=rev3) */ + +#define PCI_BAR0_SPROM_OFFSET (4 * 1024) /* bar0 + 4K accesses external sprom */ +#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) /* bar0 + 6K accesses pci core registers */ +#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) /* pci core SB registers are at the end of the + * 8KB window, so their address is the "regular" + * address plus 4K + */ +#define PCI_BAR0_WINSZ (16 * 1024) /* bar0 window size Match with corerev 13 */ +/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ +#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) /* bar0 + 8K accesses pci/pcie core registers */ +#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) /* bar0 + 12K accesses chipc core registers */ + +#define PCI_SBIM_STATUS_SERR 0x4 /* backplane SBErr interrupt status */ + +#endif /* _h_pcicfg_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h new file mode 100644 index 0000000..e9058c6 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _NICPCI_H +#define _NICPCI_H + +/* PCI configuration address space size */ +#define PCI_SZPCR 256 + +/* Brcm PCI configuration registers */ +/* backplane address space accessed by BAR0 */ +#define PCI_BAR0_WIN 0x80 +/* sprom property control */ +#define PCI_SPROM_CONTROL 0x88 +/* mask of PCI and other cores interrupts */ +#define PCI_INT_MASK 0x94 +/* backplane core interrupt mask bits offset */ +#define PCI_SBIM_SHIFT 8 +/* backplane address space accessed by second 4KB of BAR0 */ +#define PCI_BAR0_WIN2 0xac +/* pci config space gpio input (>=rev3) */ +#define PCI_GPIO_IN 0xb0 +/* pci config space gpio output (>=rev3) */ +#define PCI_GPIO_OUT 0xb4 +/* pci config space gpio output enable (>=rev3) */ +#define PCI_GPIO_OUTEN 0xb8 + +/* bar0 + 4K accesses external sprom */ +#define PCI_BAR0_SPROM_OFFSET (4 * 1024) +/* bar0 + 6K accesses pci core registers */ +#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) +/* + * pci core SB registers are at the end of the + * 8KB window, so their address is the "regular" + * address plus 4K + */ +#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) +/* bar0 window size Match with corerev 13 */ +#define PCI_BAR0_WINSZ (16 * 1024) +/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ +/* bar0 + 8K accesses pci/pcie core registers */ +#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) +/* bar0 + 12K accesses chipc core registers */ +#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) + +struct sbpcieregs; +struct si_pub; + +extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, + unsigned char *buf, u32 *buflen); +extern uint pcie_readreg(struct sbpcieregs *pcieregs, + uint addrtype, uint offset); +extern uint pcie_writereg(struct sbpcieregs *pcieregs, + uint addrtype, uint offset, uint val); + +extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); +extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); + +extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); +extern void pcicore_deinit(void *pch); +extern void pcicore_attach(void *pch, char *pvars, int state); +extern void pcicore_hwup(void *pch); +extern void pcicore_up(void *pch, int state); +extern void pcicore_sleep(void *pch); +extern void pcicore_down(void *pch, int state); + +extern void pcie_war_ovr_aspm_update(void *pch, u8 aspm); +extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, + u32 mask, u32 val); + +extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask, + u32 val, uint type); + +extern bool pcicore_pmecap_fast(void *pch); +extern void pcicore_pmeen(void *pch); +extern void pcicore_pmeclr(void *pch); +extern bool pcicore_pmestat(void *pch); + +#endif /* _NICPCI_H */ diff --git a/drivers/staging/brcm80211/include/nicpci.h b/drivers/staging/brcm80211/include/nicpci.h deleted file mode 100644 index e9058c6..0000000 --- a/drivers/staging/brcm80211/include/nicpci.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _NICPCI_H -#define _NICPCI_H - -/* PCI configuration address space size */ -#define PCI_SZPCR 256 - -/* Brcm PCI configuration registers */ -/* backplane address space accessed by BAR0 */ -#define PCI_BAR0_WIN 0x80 -/* sprom property control */ -#define PCI_SPROM_CONTROL 0x88 -/* mask of PCI and other cores interrupts */ -#define PCI_INT_MASK 0x94 -/* backplane core interrupt mask bits offset */ -#define PCI_SBIM_SHIFT 8 -/* backplane address space accessed by second 4KB of BAR0 */ -#define PCI_BAR0_WIN2 0xac -/* pci config space gpio input (>=rev3) */ -#define PCI_GPIO_IN 0xb0 -/* pci config space gpio output (>=rev3) */ -#define PCI_GPIO_OUT 0xb4 -/* pci config space gpio output enable (>=rev3) */ -#define PCI_GPIO_OUTEN 0xb8 - -/* bar0 + 4K accesses external sprom */ -#define PCI_BAR0_SPROM_OFFSET (4 * 1024) -/* bar0 + 6K accesses pci core registers */ -#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) -/* - * pci core SB registers are at the end of the - * 8KB window, so their address is the "regular" - * address plus 4K - */ -#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) -/* bar0 window size Match with corerev 13 */ -#define PCI_BAR0_WINSZ (16 * 1024) -/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ -/* bar0 + 8K accesses pci/pcie core registers */ -#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) -/* bar0 + 12K accesses chipc core registers */ -#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) - -struct sbpcieregs; -struct si_pub; - -extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, - unsigned char *buf, u32 *buflen); -extern uint pcie_readreg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset); -extern uint pcie_writereg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset, uint val); - -extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); -extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); - -extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); -extern void pcicore_deinit(void *pch); -extern void pcicore_attach(void *pch, char *pvars, int state); -extern void pcicore_hwup(void *pch); -extern void pcicore_up(void *pch, int state); -extern void pcicore_sleep(void *pch); -extern void pcicore_down(void *pch, int state); - -extern void pcie_war_ovr_aspm_update(void *pch, u8 aspm); -extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, - u32 mask, u32 val); - -extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask, - u32 val, uint type); - -extern bool pcicore_pmecap_fast(void *pch); -extern void pcicore_pmeen(void *pch); -extern void pcicore_pmeclr(void *pch); -extern bool pcicore_pmestat(void *pch); - -#endif /* _NICPCI_H */ diff --git a/drivers/staging/brcm80211/include/pcicfg.h b/drivers/staging/brcm80211/include/pcicfg.h deleted file mode 100644 index d0c617a..0000000 --- a/drivers/staging/brcm80211/include/pcicfg.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _h_pcicfg_ -#define _h_pcicfg_ - -#include - -/* PCI configuration address space size */ -#define PCI_SZPCR 256 - -/* Everything below is BRCM HND proprietary */ - -/* Brcm PCI configuration registers */ -#define PCI_BAR0_WIN 0x80 /* backplane address space accessed by BAR0 */ -#define PCI_SPROM_CONTROL 0x88 /* sprom property control */ -#define PCI_INT_MASK 0x94 /* mask of PCI and other cores interrupts */ -#define PCI_SBIM_SHIFT 8 /* backplane core interrupt mask bits offset */ -#define PCI_BAR0_WIN2 0xac /* backplane address space accessed by second 4KB of BAR0 */ -#define PCI_GPIO_IN 0xb0 /* pci config space gpio input (>=rev3) */ -#define PCI_GPIO_OUT 0xb4 /* pci config space gpio output (>=rev3) */ -#define PCI_GPIO_OUTEN 0xb8 /* pci config space gpio output enable (>=rev3) */ - -#define PCI_BAR0_SPROM_OFFSET (4 * 1024) /* bar0 + 4K accesses external sprom */ -#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) /* bar0 + 6K accesses pci core registers */ -#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) /* pci core SB registers are at the end of the - * 8KB window, so their address is the "regular" - * address plus 4K - */ -#define PCI_BAR0_WINSZ (16 * 1024) /* bar0 window size Match with corerev 13 */ -/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ -#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) /* bar0 + 8K accesses pci/pcie core registers */ -#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) /* bar0 + 12K accesses chipc core registers */ - -#define PCI_SBIM_STATUS_SERR 0x4 /* backplane SBErr interrupt status */ - -#endif /* _h_pcicfg_ */ -- cgit v0.10.2 From e4eb68645202fed4966f080cd68a9fc61b117f0c Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:24 +0200 Subject: staging: brcm80211: remove functions from nicpci.h Couple of functions in the header file are actually only used by nicpci.c itself and as such made static and removed from the header file. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index a96173d..4da155a 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -180,7 +180,7 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, } /* ***** Register Access API */ -uint +static uint pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype, uint offset) { @@ -204,7 +204,7 @@ pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype, return retval; } -uint +static uint pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype, uint offset, uint val) { @@ -329,7 +329,7 @@ pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val) } /* ***** Support functions ***** */ -u8 pcie_clkreq(void *pch, u32 mask, u32 val) +static u8 pcie_clkreq(void *pch, u32 mask, u32 val) { pcicore_info_t *pi = (pcicore_info_t *) pch; u32 reg_val; diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h index e9058c6..a6baf7f 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.h +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -56,17 +56,11 @@ /* bar0 + 12K accesses chipc core registers */ #define PCI_16KB0_CCREGS_OFFSET (12 * 1024) -struct sbpcieregs; struct si_pub; extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, unsigned char *buf, u32 *buflen); -extern uint pcie_readreg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset); -extern uint pcie_writereg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset, uint val); -extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); -- cgit v0.10.2 From 63182f61193deb1b3b23f7d65c3e0477eb4a0770 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:25 +0200 Subject: staging: brcm80211: remove unused functions from nicpci.c Several functions are defined but not used. These have been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 4da155a..196cdf1 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -71,8 +71,6 @@ static void pcie_war_noplldown(pcicore_info_t *pi); static void pcie_war_polarity(pcicore_info_t *pi); static void pcie_war_pci_setup(pcicore_info_t *pi); -static bool pcicore_pmecap(pcicore_info_t *pi); - #define PCIE_ASPM(sih) ((PCIE_PUB(sih)) && (((sih)->buscorerev >= 3) && ((sih)->buscorerev <= 5))) @@ -579,23 +577,6 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) pcie_misc_config_fixup(pi); } -void pcie_war_ovr_aspm_update(void *pch, u8 aspm) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - - if (!PCIE_ASPM(pi->sih)) - return; - - /* Validate */ - if (aspm > PCIE_ASPM_ENAB) - return; - - pi->pcie_war_aspm_ovr = aspm; - - /* Update the current state */ - pcie_war_aspm_clkreq(pi); -} - /* ***** Functions called during driver state changes ***** */ void pcicore_attach(void *pch, char *pvars, int state) { @@ -673,166 +654,3 @@ void pcicore_down(void *pch, int state) /* Reduce L1 timer for better power savings */ pcie_extendL1timer(pi, false); } - -/* ***** Wake-on-wireless-LAN (WOWL) support functions ***** */ -/* Just uses PCI config accesses to find out, when needed before sb_attach is done */ -bool pcicore_pmecap_fast(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u8 cap_ptr; - u32 pmecap; - - cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_PM, NULL, - NULL); - - if (!cap_ptr) - return false; - - pci_read_config_dword(pi->dev, cap_ptr, &pmecap); - - return (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0; -} - -/* return true if PM capability exists in the pci config space - * Uses and caches the information using core handle - */ -static bool pcicore_pmecap(pcicore_info_t *pi) -{ - u8 cap_ptr; - u32 pmecap; - - if (!pi->pmecap_offset) { - cap_ptr = pcicore_find_pci_capability(pi->dev, - PCI_CAP_ID_PM, - NULL, NULL); - if (!cap_ptr) - return false; - - pi->pmecap_offset = cap_ptr; - - pci_read_config_dword(pi->dev, pi->pmecap_offset, - &pmecap); - - /* At least one state can generate PME */ - pi->pmecap = (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0; - } - - return pi->pmecap; -} - -/* Enable PME generation */ -void pcicore_pmeen(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u32 w; - - /* if not pmecapable return */ - if (!pcicore_pmecap(pi)) - return; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - w |= (PCI_PM_CTRL_PME_ENABLE); - pci_write_config_dword(pi->dev, - pi->pmecap_offset + PCI_PM_CTRL, w); -} - -/* - * Return true if PME status set - */ -bool pcicore_pmestat(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u32 w; - - if (!pcicore_pmecap(pi)) - return false; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - - return (w & PCI_PM_CTRL_PME_STATUS) == PCI_PM_CTRL_PME_STATUS; -} - -/* Disable PME generation, clear the PME status bit if set - */ -void pcicore_pmeclr(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u32 w; - - if (!pcicore_pmecap(pi)) - return; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - - PCI_ERROR(("pcicore_pci_pmeclr PMECSR : 0x%x\n", w)); - - /* PMESTAT is cleared by writing 1 to it */ - w &= ~(PCI_PM_CTRL_PME_ENABLE); - - pci_write_config_dword(pi->dev, - pi->pmecap_offset + PCI_PM_CTRL, w); -} - -u32 pcie_lcreg(void *pch, u32 mask, u32 val) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u8 offset; - u32 tmpval; - - offset = pi->pciecap_lcreg_offset; - if (!offset) - return 0; - - /* set operation */ - if (mask) - pci_write_config_dword(pi->dev, offset, val); - - pci_read_config_dword(pi->dev, offset, &tmpval); - return tmpval; -} - -u32 -pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type) -{ - u32 reg_val = 0; - pcicore_info_t *pi = (pcicore_info_t *) pch; - sbpcieregs_t *pcieregs = pi->regs.pcieregs; - - if (mask) { - PCI_ERROR(("PCIEREG: 0x%x writeval 0x%x\n", offset, val)); - pcie_writereg(pcieregs, type, offset, val); - } - - /* Should not read register 0x154 */ - if (pi->sih->buscorerev <= 5 && offset == PCIE_DLLP_PCIE11 - && type == PCIE_PCIEREGS) - return reg_val; - - reg_val = pcie_readreg(pcieregs, type, offset); - PCI_ERROR(("PCIEREG: 0x%x readval is 0x%x\n", offset, reg_val)); - - return reg_val; -} - -u32 -pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, u32 mask, - u32 val) -{ - u32 reg_val = 0; - pcicore_info_t *pi = (pcicore_info_t *) pch; - - if (mask) { - PCI_ERROR(("PCIEMDIOREG: 0x%x writeval 0x%x\n", offset, val)); - pcie_mdiowrite(pi, mdioslave, offset, val); - } - - if (pcie_mdioread(pi, mdioslave, offset, ®_val)) - reg_val = 0xFFFFFFFF; - PCI_ERROR(("PCIEMDIOREG: dev 0x%x offset 0x%x read 0x%x\n", mdioslave, - offset, reg_val)); - - return reg_val; -} diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h index a6baf7f..b32f1af 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.h +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -58,11 +58,6 @@ struct si_pub; -extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, - unsigned char *buf, u32 *buflen); - -extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); - extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); extern void pcicore_deinit(void *pch); extern void pcicore_attach(void *pch, char *pvars, int state); @@ -70,17 +65,7 @@ extern void pcicore_hwup(void *pch); extern void pcicore_up(void *pch, int state); extern void pcicore_sleep(void *pch); extern void pcicore_down(void *pch, int state); - -extern void pcie_war_ovr_aspm_update(void *pch, u8 aspm); -extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, - u32 mask, u32 val); - -extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask, - u32 val, uint type); - -extern bool pcicore_pmecap_fast(void *pch); -extern void pcicore_pmeen(void *pch); -extern void pcicore_pmeclr(void *pch); -extern bool pcicore_pmestat(void *pch); +extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, + unsigned char *buf, u32 *buflen); #endif /* _NICPCI_H */ -- cgit v0.10.2 From a607d3c2bc9839fbc3ee8a8c99beeb7b3a3844c2 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:26 +0200 Subject: staging: brcm80211: add braces to SI_INFO macro definition The additional braces allow the casted parameter to be indirected immediately. Here is an example to clarify: x = SI_INFO(y); => z = SI_INFO(y)->field_a; z = x->field_a; Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index 2941537..a0fec83 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -271,7 +271,7 @@ #define CST4330_CBUCK_POWER_OK 0x00004000 #define CST4330_BB_PLL_LOCKED 0x00008000 -#define SI_INFO(sih) (si_info_t *)sih +#define SI_INFO(sih) ((si_info_t *)sih) #define GOODCOREADDR(x, b) \ (((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \ -- cgit v0.10.2 From 8543df3a1f5d3dafd69882787627b075e62bb3eb Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:27 +0200 Subject: staging: brcm80211: remove dependency on pci core difinitions from aiutils.c The file aiutils.c included the register definition includes for the PCI and PCIe core. This was for two functions which have been partly moved to nicpci.c. This means that nicpci.h is the only include file to provide interface to aiutils.c for PCI core related functions. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index bae40fe2..43320b4 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -27,8 +27,6 @@ #include /* ********** from siutils.c *********** */ -#include -#include #include #include #include @@ -1915,7 +1913,7 @@ void ai_pci_down(si_t *sih) void ai_pci_setup(si_t *sih, uint coremask) { si_info_t *sii; - struct sbpciregs *pciregs = NULL; + void *regs = NULL; u32 siflag = 0, w; uint idx = 0; @@ -1932,7 +1930,7 @@ void ai_pci_setup(si_t *sih, uint coremask) siflag = ai_flag(sih); /* switch over to pci core */ - pciregs = ai_setcoreidx(sih, sii->pub.buscoreidx); + regs = ai_setcoreidx(sih, sii->pub.buscoreidx); } /* @@ -1950,16 +1948,7 @@ void ai_pci_setup(si_t *sih, uint coremask) } if (PCI(sii)) { - OR_REG(&pciregs->sbtopci2, - (SBTOPCI_PREF | SBTOPCI_BURST)); - if (sii->pub.buscorerev >= 11) { - OR_REG(&pciregs->sbtopci2, - SBTOPCI_RC_READMULTI); - w = R_REG(&pciregs->clkrun); - W_REG(&pciregs->clkrun, - (w | PCI_CLKRUN_DSBL)); - w = R_REG(&pciregs->clkrun); - } + pcicore_pci_setup(sii->pch, regs); /* switch back to previous core */ ai_setcoreidx(sih, idx); @@ -1972,11 +1961,8 @@ void ai_pci_setup(si_t *sih, uint coremask) */ int ai_pci_fixcfg(si_t *sih) { - uint origidx, pciidx; - struct sbpciregs *pciregs = NULL; - sbpcieregs_t *pcieregs = NULL; + uint origidx; void *regs = NULL; - u16 val16, *reg16 = NULL; si_info_t *sii = SI_INFO(sih); @@ -1985,23 +1971,8 @@ int ai_pci_fixcfg(si_t *sih) origidx = ai_coreidx(&sii->pub); /* check 'pi' is correct and fix it if not */ - if (sii->pub.buscoretype == PCIE_CORE_ID) { - pcieregs = ai_setcore(&sii->pub, PCIE_CORE_ID, 0); - regs = pcieregs; - reg16 = &pcieregs->sprom[SRSH_PI_OFFSET]; - } else if (sii->pub.buscoretype == PCI_CORE_ID) { - pciregs = ai_setcore(&sii->pub, PCI_CORE_ID, 0); - regs = pciregs; - reg16 = &pciregs->sprom[SRSH_PI_OFFSET]; - } - pciidx = ai_coreidx(&sii->pub); - val16 = R_REG(reg16); - if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) { - val16 = - (u16) (pciidx << SRSH_PI_SHIFT) | (val16 & - ~SRSH_PI_MASK); - W_REG(reg16, val16); - } + regs = ai_setcore(&sii->pub, sii->pub.buscoretype, 0); + pcicore_fixcfg(sii->pch, regs); /* restore the original index */ ai_setcoreidx(&sii->pub, origidx); diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 196cdf1..c509c9a 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -654,3 +654,53 @@ void pcicore_down(void *pch, int state) /* Reduce L1 timer for better power savings */ pcie_extendL1timer(pi, false); } + +/* + * precondition: current core is sii->buscoretype + */ +void pcicore_fixcfg(void *pch, void *regs) +{ + pcicore_info_t *pi = (pcicore_info_t *) pch; + struct si_info *sii = SI_INFO(pi->sih); + struct sbpciregs *pciregs = regs; + sbpcieregs_t *pcieregs = regs; + u16 val16, *reg16 = NULL; + uint pciidx; + + /* check 'pi' is correct and fix it if not */ + if (sii->pub.buscoretype == PCIE_CORE_ID) { + reg16 = &pcieregs->sprom[SRSH_PI_OFFSET]; + } else if (sii->pub.buscoretype == PCI_CORE_ID) { + reg16 = &pciregs->sprom[SRSH_PI_OFFSET]; + } + pciidx = ai_coreidx(&sii->pub); + val16 = R_REG(reg16); + if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) { + val16 = + (u16) (pciidx << SRSH_PI_SHIFT) | (val16 & + ~SRSH_PI_MASK); + W_REG(reg16, val16); + } +} + +/* + * precondition: current core is pci core + */ +void pcicore_pci_setup(void *pch, void *regs) +{ + pcicore_info_t *pi = (pcicore_info_t *) pch; + struct sbpciregs *pciregs = regs; + u32 w; + + OR_REG(&pciregs->sbtopci2, + (SBTOPCI_PREF | SBTOPCI_BURST)); + + if (SI_INFO(pi->sih)->pub.buscorerev >= 11) { + OR_REG(&pciregs->sbtopci2, + SBTOPCI_RC_READMULTI); + w = R_REG(&pciregs->clkrun); + W_REG(&pciregs->clkrun, + (w | PCI_CLKRUN_DSBL)); + w = R_REG(&pciregs->clkrun); + } +} diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h index b32f1af..f1441c5 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.h +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -67,5 +67,7 @@ extern void pcicore_sleep(void *pch); extern void pcicore_down(void *pch, int state); extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, unsigned char *buf, u32 *buflen); +extern void pcicore_fixcfg(void *pch, void *regs); +extern void pcicore_pci_setup(void *pch, void *regs); #endif /* _NICPCI_H */ -- cgit v0.10.2 From fd24b0fdaed2545f18af57b1553d078b43b16ed1 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:28 +0200 Subject: staging: brcm80211: remove pci core defintion files The source file nicpci.c is the only file left which needs the pci core register definitions. These definitions have been added to the source file so the include files can be removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index c509c9a..e1612ec 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -24,13 +24,169 @@ #include #include #include -#include -#include #include +/* SPROM offsets */ +#define SRSH_ASPM_OFFSET 4 /* word 4 */ +#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */ +#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */ +#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */ + +#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */ +#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ +#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ +#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */ +#define SRSH_BD_OFFSET 6 /* word 6 */ + /* chipcontrol */ #define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ +/* MDIO control */ +#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ +#define MDIOCTL_DIVISOR_VAL 0x2 +#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ +#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */ + +/* MDIO Data */ +#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ +#define MDIODATA_TA 0x00020000 /* Turnaround */ +#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */ +#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */ +#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */ +#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */ +#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ +#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ +#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ +#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */ +#define MDIODATA_WRITE 0x10000000 /* write Transaction */ +#define MDIODATA_READ 0x20000000 /* Read Transaction */ +#define MDIODATA_START 0x40000000 /* start of Transaction */ + +#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ +#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ + +/* serdes regs (rev < 10) */ +#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */ +#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ +#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ + + /* SERDES RX registers */ +#define SERDES_RX_CTRL 1 /* Rx cntrl */ +#define SERDES_RX_TIMER1 2 /* Rx Timer1 */ +#define SERDES_RX_CDR 6 /* CDR */ +#define SERDES_RX_CDRBW 7 /* CDR BW */ + /* SERDES RX control register */ +#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ +#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ + + /* SERDES PLL registers */ +#define SERDES_PLL_CTRL 1 /* PLL control reg */ +#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ + +/* Linkcontrol reg offset in PCIE Cap */ +#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */ +#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ +#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ +#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ + +#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */ + +/* Power management threshold */ +#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ +#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ +#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ +#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */ + +/* different register spaces to access thr'u pcie indirect access */ +#define PCIE_CONFIGREGS 1 /* Access to config space */ +#define PCIE_PCIEREGS 2 /* Access to pcie registers */ + +/* PCIE protocol PHY diagnostic registers */ +#define PCIE_PLP_STATUSREG 0x204 /* Status */ + +/* Status reg PCIE_PLP_STATUSREG */ +#define PCIE_PLP_POLARITYINV_STAT 0x10 + +/* PCIE protocol DLLP diagnostic registers */ +#define PCIE_DLLP_LCREG 0x100 /* Link Control */ +#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ + +/* PCIE protocol TLP diagnostic registers */ +#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + +/* Sonics side: PCI core and host control registers */ +struct sbpciregs { + u32 control; /* PCI control */ + u32 PAD[3]; + u32 arbcontrol; /* PCI arbiter control */ + u32 clkrun; /* Clkrun Control (>=rev11) */ + u32 PAD[2]; + u32 intstatus; /* Interrupt status */ + u32 intmask; /* Interrupt mask */ + u32 sbtopcimailbox; /* Sonics to PCI mailbox */ + u32 PAD[9]; + u32 bcastaddr; /* Sonics broadcast address */ + u32 bcastdata; /* Sonics broadcast data */ + u32 PAD[2]; + u32 gpioin; /* ro: gpio input (>=rev2) */ + u32 gpioout; /* rw: gpio output (>=rev2) */ + u32 gpioouten; /* rw: gpio output enable (>= rev2) */ + u32 gpiocontrol; /* rw: gpio control (>= rev2) */ + u32 PAD[36]; + u32 sbtopci0; /* Sonics to PCI translation 0 */ + u32 sbtopci1; /* Sonics to PCI translation 1 */ + u32 sbtopci2; /* Sonics to PCI translation 2 */ + u32 PAD[189]; + u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ + u16 sprom[36]; /* SPROM shadow Area */ + u32 PAD[46]; +}; + +/* SB side: PCIE core and host control registers */ +typedef struct sbpcieregs { + u32 control; /* host mode only */ + u32 PAD[2]; + u32 biststatus; /* bist Status: 0x00C */ + u32 gpiosel; /* PCIE gpio sel: 0x010 */ + u32 gpioouten; /* PCIE gpio outen: 0x14 */ + u32 PAD[2]; + u32 intstatus; /* Interrupt status: 0x20 */ + u32 intmask; /* Interrupt mask: 0x24 */ + u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ + u32 PAD[53]; + u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ + u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ + u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ + u32 PAD[5]; + + /* pcie core supports in direct access to config space */ + u32 configaddr; /* pcie config space access: Address field: 0x120 */ + u32 configdata; /* pcie config space access: Data field: 0x124 */ + + /* mdio access to serdes */ + u32 mdiocontrol; /* controls the mdio access: 0x128 */ + u32 mdiodata; /* Data to the mdio access: 0x12c */ + + /* pcie protocol phy/dllp/tlp register indirect access mechanism */ + u32 pcieindaddr; /* indirect access to the internal register: 0x130 */ + u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ + + u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ + u32 PAD[177]; + u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ + u16 sprom[64]; /* SPROM shadow Area */ +} sbpcieregs_t; + typedef struct { union { sbpcieregs_t *pcieregs; diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h index f1441c5..0e65b11 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.h +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -56,6 +56,18 @@ /* bar0 + 12K accesses chipc core registers */ #define PCI_16KB0_CCREGS_OFFSET (12 * 1024) +#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */ + +/* Sonics to PCI translation types */ +#define SBTOPCI_PREF 0x4 /* prefetch enable */ +#define SBTOPCI_BURST 0x8 /* burst enable */ +#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ + +/* PCI core index in SROM shadow area */ +#define SRSH_PI_OFFSET 0 /* first word */ +#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ +#define SRSH_PI_SHIFT 12 /* bit 15:12 */ + struct si_pub; extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 2ee0785..d069ebe 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -48,7 +48,6 @@ #include "wl_export.h" #include "wl_ucode.h" #include "wlc_antsel.h" -#include "pcie_core.h" #include "wlc_alloc.h" #include "wl_dbg.h" #include "wlc_bmac.h" diff --git a/drivers/staging/brcm80211/include/pci_core.h b/drivers/staging/brcm80211/include/pci_core.h deleted file mode 100644 index 9153dcb..0000000 --- a/drivers/staging/brcm80211/include/pci_core.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _PCI_CORE_H_ -#define _PCI_CORE_H_ - -#ifndef _LANGUAGE_ASSEMBLY - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* Sonics side: PCI core and host control registers */ -struct sbpciregs { - u32 control; /* PCI control */ - u32 PAD[3]; - u32 arbcontrol; /* PCI arbiter control */ - u32 clkrun; /* Clkrun Control (>=rev11) */ - u32 PAD[2]; - u32 intstatus; /* Interrupt status */ - u32 intmask; /* Interrupt mask */ - u32 sbtopcimailbox; /* Sonics to PCI mailbox */ - u32 PAD[9]; - u32 bcastaddr; /* Sonics broadcast address */ - u32 bcastdata; /* Sonics broadcast data */ - u32 PAD[2]; - u32 gpioin; /* ro: gpio input (>=rev2) */ - u32 gpioout; /* rw: gpio output (>=rev2) */ - u32 gpioouten; /* rw: gpio output enable (>= rev2) */ - u32 gpiocontrol; /* rw: gpio control (>= rev2) */ - u32 PAD[36]; - u32 sbtopci0; /* Sonics to PCI translation 0 */ - u32 sbtopci1; /* Sonics to PCI translation 1 */ - u32 sbtopci2; /* Sonics to PCI translation 2 */ - u32 PAD[189]; - u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ - u16 sprom[36]; /* SPROM shadow Area */ - u32 PAD[46]; -}; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* PCI control */ -#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -#define PCI_RST 0x02 /* Value driven out to pin */ -#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */ -#define PCI_CLK 0x08 /* Gate for clock driven out to pin */ - -/* PCI arbiter control */ -#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */ -#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */ -/* ParkID - for PCI corerev >= 8 */ -#define PCI_PARKID_MASK 0x1c /* Selects which agent is parked on an idle bus */ -#define PCI_PARKID_SHIFT 2 -#define PCI_PARKID_EXT0 0 /* External master 0 */ -#define PCI_PARKID_EXT1 1 /* External master 1 */ -#define PCI_PARKID_EXT2 2 /* External master 2 */ -#define PCI_PARKID_EXT3 3 /* External master 3 (rev >= 11) */ -#define PCI_PARKID_INT 3 /* Internal master (rev < 11) */ -#define PCI11_PARKID_INT 4 /* Internal master (rev >= 11) */ -#define PCI_PARKID_LAST 4 /* Last active master (rev < 11) */ -#define PCI11_PARKID_LAST 5 /* Last active master (rev >= 11) */ - -#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */ - -/* Interrupt status/mask */ -#define PCI_INTA 0x01 /* PCI INTA# is asserted */ -#define PCI_INTB 0x02 /* PCI INTB# is asserted */ -#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */ -#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */ -#define PCI_PME 0x10 /* PCI PME# is asserted */ - -/* (General) PCI/SB mailbox interrupts, two bits per pci function */ -#define MAILBOX_F0_0 0x100 /* function 0, int 0 */ -#define MAILBOX_F0_1 0x200 /* function 0, int 1 */ -#define MAILBOX_F1_0 0x400 /* function 1, int 0 */ -#define MAILBOX_F1_1 0x800 /* function 1, int 1 */ -#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */ -#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */ -#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */ -#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */ - -/* Sonics broadcast address */ -#define BCAST_ADDR_MASK 0xff /* Broadcast register address */ - -/* Sonics to PCI translation types */ -#define SBTOPCI0_MASK 0xfc000000 -#define SBTOPCI1_MASK 0xfc000000 -#define SBTOPCI2_MASK 0xc0000000 -#define SBTOPCI_MEM 0 -#define SBTOPCI_IO 1 -#define SBTOPCI_CFG0 2 -#define SBTOPCI_CFG1 3 -#define SBTOPCI_PREF 0x4 /* prefetch enable */ -#define SBTOPCI_BURST 0x8 /* burst enable */ -#define SBTOPCI_RC_MASK 0x30 /* read command (>= rev11) */ -#define SBTOPCI_RC_READ 0x00 /* memory read */ -#define SBTOPCI_RC_READLINE 0x10 /* memory read line */ -#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ - -/* PCI core index in SROM shadow area */ -#define SRSH_PI_OFFSET 0 /* first word */ -#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ -#define SRSH_PI_SHIFT 12 /* bit 15:12 */ - -#endif /* _PCI_CORE_H_ */ diff --git a/drivers/staging/brcm80211/include/pcie_core.h b/drivers/staging/brcm80211/include/pcie_core.h deleted file mode 100644 index cd54ddc..0000000 --- a/drivers/staging/brcm80211/include/pcie_core.h +++ /dev/null @@ -1,299 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _PCIE_CORE_H -#define _PCIE_CORE_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* PCIE Enumeration space offsets */ -#define PCIE_CORE_CONFIG_OFFSET 0x0 -#define PCIE_FUNC0_CONFIG_OFFSET 0x400 -#define PCIE_FUNC1_CONFIG_OFFSET 0x500 -#define PCIE_FUNC2_CONFIG_OFFSET 0x600 -#define PCIE_FUNC3_CONFIG_OFFSET 0x700 -#define PCIE_SPROM_SHADOW_OFFSET 0x800 -#define PCIE_SBCONFIG_OFFSET 0xE00 - -/* PCIE Bar0 Address Mapping. Each function maps 16KB config space */ -#define PCIE_DEV_BAR0_SIZE 0x4000 -#define PCIE_BAR0_WINMAPCORE_OFFSET 0x0 -#define PCIE_BAR0_EXTSPROM_OFFSET 0x1000 -#define PCIE_BAR0_PCIECORE_OFFSET 0x2000 -#define PCIE_BAR0_CCCOREREG_OFFSET 0x3000 - -/* different register spaces to access thr'u pcie indirect access */ -#define PCIE_CONFIGREGS 1 /* Access to config space */ -#define PCIE_PCIEREGS 2 /* Access to pcie registers */ - -/* SB side: PCIE core and host control registers */ -typedef struct sbpcieregs { - u32 control; /* host mode only */ - u32 PAD[2]; - u32 biststatus; /* bist Status: 0x00C */ - u32 gpiosel; /* PCIE gpio sel: 0x010 */ - u32 gpioouten; /* PCIE gpio outen: 0x14 */ - u32 PAD[2]; - u32 intstatus; /* Interrupt status: 0x20 */ - u32 intmask; /* Interrupt mask: 0x24 */ - u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ - u32 PAD[53]; - u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ - u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ - u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ - u32 PAD[5]; - - /* pcie core supports in direct access to config space */ - u32 configaddr; /* pcie config space access: Address field: 0x120 */ - u32 configdata; /* pcie config space access: Data field: 0x124 */ - - /* mdio access to serdes */ - u32 mdiocontrol; /* controls the mdio access: 0x128 */ - u32 mdiodata; /* Data to the mdio access: 0x12c */ - - /* pcie protocol phy/dllp/tlp register indirect access mechanism */ - u32 pcieindaddr; /* indirect access to the internal register: 0x130 */ - u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ - - u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ - u32 PAD[177]; - u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ - u16 sprom[64]; /* SPROM shadow Area */ -} sbpcieregs_t; - -/* PCI control */ -#define PCIE_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -#define PCIE_RST 0x02 /* Value driven out to pin */ - -#define PCIE_CFGADDR 0x120 /* offsetof(configaddr) */ -#define PCIE_CFGDATA 0x124 /* offsetof(configdata) */ - -/* Interrupt status/mask */ -#define PCIE_INTA 0x01 /* PCIE INTA message is received */ -#define PCIE_INTB 0x02 /* PCIE INTB message is received */ -#define PCIE_INTFATAL 0x04 /* PCIE INTFATAL message is received */ -#define PCIE_INTNFATAL 0x08 /* PCIE INTNONFATAL message is received */ -#define PCIE_INTCORR 0x10 /* PCIE INTCORR message is received */ -#define PCIE_INTPME 0x20 /* PCIE INTPME message is received */ - -/* SB to PCIE translation masks */ -#define SBTOPCIE0_MASK 0xfc000000 -#define SBTOPCIE1_MASK 0xfc000000 -#define SBTOPCIE2_MASK 0xc0000000 - -/* Access type bits (0:1) */ -#define SBTOPCIE_MEM 0 -#define SBTOPCIE_IO 1 -#define SBTOPCIE_CFG0 2 -#define SBTOPCIE_CFG1 3 - -/* Prefetch enable bit 2 */ -#define SBTOPCIE_PF 4 - -/* Write Burst enable for memory write bit 3 */ -#define SBTOPCIE_WR_BURST 8 - -/* config access */ -#define CONFIGADDR_FUNC_MASK 0x7000 -#define CONFIGADDR_FUNC_SHF 12 -#define CONFIGADDR_REG_MASK 0x0FFF -#define CONFIGADDR_REG_SHF 0 - -#define PCIE_CONFIG_INDADDR(f, r) \ - ((((f) & CONFIGADDR_FUNC_MASK) << CONFIGADDR_FUNC_SHF) | \ - (((r) & CONFIGADDR_REG_MASK) << CONFIGADDR_REG_SHF)) - -/* PCIE protocol regs Indirect Address */ -#define PCIEADDR_PROT_MASK 0x300 -#define PCIEADDR_PROT_SHF 8 -#define PCIEADDR_PL_TLP 0 -#define PCIEADDR_PL_DLLP 1 -#define PCIEADDR_PL_PLP 2 - -/* PCIE protocol PHY diagnostic registers */ -#define PCIE_PLP_MODEREG 0x200 /* Mode */ -#define PCIE_PLP_STATUSREG 0x204 /* Status */ -#define PCIE_PLP_LTSSMCTRLREG 0x208 /* LTSSM control */ -#define PCIE_PLP_LTLINKNUMREG 0x20c /* Link Training Link number */ -#define PCIE_PLP_LTLANENUMREG 0x210 /* Link Training Lane number */ -#define PCIE_PLP_LTNFTSREG 0x214 /* Link Training N_FTS */ -#define PCIE_PLP_ATTNREG 0x218 /* Attention */ -#define PCIE_PLP_ATTNMASKREG 0x21C /* Attention Mask */ -#define PCIE_PLP_RXERRCTR 0x220 /* Rx Error */ -#define PCIE_PLP_RXFRMERRCTR 0x224 /* Rx Framing Error */ -#define PCIE_PLP_RXERRTHRESHREG 0x228 /* Rx Error threshold */ -#define PCIE_PLP_TESTCTRLREG 0x22C /* Test Control reg */ -#define PCIE_PLP_SERDESCTRLOVRDREG 0x230 /* SERDES Control Override */ -#define PCIE_PLP_TIMINGOVRDREG 0x234 /* Timing param override */ -#define PCIE_PLP_RXTXSMDIAGREG 0x238 /* RXTX State Machine Diag */ -#define PCIE_PLP_LTSSMDIAGREG 0x23C /* LTSSM State Machine Diag */ - -/* PCIE protocol DLLP diagnostic registers */ -#define PCIE_DLLP_LCREG 0x100 /* Link Control */ -#define PCIE_DLLP_LSREG 0x104 /* Link Status */ -#define PCIE_DLLP_LAREG 0x108 /* Link Attention */ -#define PCIE_DLLP_LAMASKREG 0x10C /* Link Attention Mask */ -#define PCIE_DLLP_NEXTTXSEQNUMREG 0x110 /* Next Tx Seq Num */ -#define PCIE_DLLP_ACKEDTXSEQNUMREG 0x114 /* Acked Tx Seq Num */ -#define PCIE_DLLP_PURGEDTXSEQNUMREG 0x118 /* Purged Tx Seq Num */ -#define PCIE_DLLP_RXSEQNUMREG 0x11C /* Rx Sequence Number */ -#define PCIE_DLLP_LRREG 0x120 /* Link Replay */ -#define PCIE_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */ -#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ -#define PCIE_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */ -#define PCIE_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */ -#define PCIE_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */ -#define PCIE_DLLP_RTRRWREG 0x138 /* Retry buffer Read/Write */ -#define PCIE_DLLP_ECTHRESHREG 0x13C /* Error Count Threshold */ -#define PCIE_DLLP_TLPERRCTRREG 0x140 /* TLP Error Counter */ -#define PCIE_DLLP_ERRCTRREG 0x144 /* Error Counter */ -#define PCIE_DLLP_NAKRXCTRREG 0x148 /* NAK Received Counter */ -#define PCIE_DLLP_TESTREG 0x14C /* Test */ -#define PCIE_DLLP_PKTBIST 0x150 /* Packet BIST */ -#define PCIE_DLLP_PCIE11 0x154 /* DLLP PCIE 1.1 reg */ - -#define PCIE_DLLP_LSREG_LINKUP (1 << 16) - -/* PCIE protocol TLP diagnostic registers */ -#define PCIE_TLP_CONFIGREG 0x000 /* Configuration */ -#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ -#define PCIE_TLP_WRDMAUPPER 0x010 /* Write DMA Upper Address */ -#define PCIE_TLP_WRDMALOWER 0x014 /* Write DMA Lower Address */ -#define PCIE_TLP_WRDMAREQ_LBEREG 0x018 /* Write DMA Len/ByteEn Req */ -#define PCIE_TLP_RDDMAUPPER 0x01C /* Read DMA Upper Address */ -#define PCIE_TLP_RDDMALOWER 0x020 /* Read DMA Lower Address */ -#define PCIE_TLP_RDDMALENREG 0x024 /* Read DMA Len Req */ -#define PCIE_TLP_MSIDMAUPPER 0x028 /* MSI DMA Upper Address */ -#define PCIE_TLP_MSIDMALOWER 0x02C /* MSI DMA Lower Address */ -#define PCIE_TLP_MSIDMALENREG 0x030 /* MSI DMA Len Req */ -#define PCIE_TLP_SLVREQLENREG 0x034 /* Slave Request Len */ -#define PCIE_TLP_FCINPUTSREQ 0x038 /* Flow Control Inputs */ -#define PCIE_TLP_TXSMGRSREQ 0x03C /* Tx StateMachine and Gated Req */ -#define PCIE_TLP_ADRACKCNTARBLEN 0x040 /* Address Ack XferCnt and ARB Len */ -#define PCIE_TLP_DMACPLHDR0 0x044 /* DMA Completion Hdr 0 */ -#define PCIE_TLP_DMACPLHDR1 0x048 /* DMA Completion Hdr 1 */ -#define PCIE_TLP_DMACPLHDR2 0x04C /* DMA Completion Hdr 2 */ -#define PCIE_TLP_DMACPLMISC0 0x050 /* DMA Completion Misc0 */ -#define PCIE_TLP_DMACPLMISC1 0x054 /* DMA Completion Misc1 */ -#define PCIE_TLP_DMACPLMISC2 0x058 /* DMA Completion Misc2 */ -#define PCIE_TLP_SPTCTRLLEN 0x05C /* Split Controller Req len */ -#define PCIE_TLP_SPTCTRLMSIC0 0x060 /* Split Controller Misc 0 */ -#define PCIE_TLP_SPTCTRLMSIC1 0x064 /* Split Controller Misc 1 */ -#define PCIE_TLP_BUSDEVFUNC 0x068 /* Bus/Device/Func */ -#define PCIE_TLP_RESETCTR 0x06C /* Reset Counter */ -#define PCIE_TLP_RTRYBUF 0x070 /* Retry Buffer value */ -#define PCIE_TLP_TGTDEBUG1 0x074 /* Target Debug Reg1 */ -#define PCIE_TLP_TGTDEBUG2 0x078 /* Target Debug Reg2 */ -#define PCIE_TLP_TGTDEBUG3 0x07C /* Target Debug Reg3 */ -#define PCIE_TLP_TGTDEBUG4 0x080 /* Target Debug Reg4 */ - -/* MDIO control */ -#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ -#define MDIOCTL_DIVISOR_VAL 0x2 -#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ -#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */ - -/* MDIO Data */ -#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ -#define MDIODATA_TA 0x00020000 /* Turnaround */ -#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */ -#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */ -#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */ -#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */ -#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ -#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ -#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ -#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */ -#define MDIODATA_WRITE 0x10000000 /* write Transaction */ -#define MDIODATA_READ 0x20000000 /* Read Transaction */ -#define MDIODATA_START 0x40000000 /* start of Transaction */ - -#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ -#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ - -/* MDIO devices (SERDES modules) - * unlike old pcie cores (rev < 10), rev10 pcie serde organizes registers into a few blocks. - * two layers mapping (blockidx, register offset) is required - */ -#define MDIO_DEV_IEEE0 0x000 -#define MDIO_DEV_IEEE1 0x001 -#define MDIO_DEV_BLK0 0x800 -#define MDIO_DEV_BLK1 0x801 -#define MDIO_DEV_BLK2 0x802 -#define MDIO_DEV_BLK3 0x803 -#define MDIO_DEV_BLK4 0x804 -#define MDIO_DEV_TXPLL 0x808 /* TXPLL register block idx */ -#define MDIO_DEV_TXCTRL0 0x820 -#define MDIO_DEV_SERDESID 0x831 -#define MDIO_DEV_RXCTRL0 0x840 - -/* serdes regs (rev < 10) */ -#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */ -#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ -#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ - /* SERDES RX registers */ -#define SERDES_RX_CTRL 1 /* Rx cntrl */ -#define SERDES_RX_TIMER1 2 /* Rx Timer1 */ -#define SERDES_RX_CDR 6 /* CDR */ -#define SERDES_RX_CDRBW 7 /* CDR BW */ - - /* SERDES RX control register */ -#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ -#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ - - /* SERDES PLL registers */ -#define SERDES_PLL_CTRL 1 /* PLL control reg */ -#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ - -/* Power management threshold */ -#define PCIE_L0THRESHOLDTIME_MASK 0xFF00 /* bits 0 - 7 */ -#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ -#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ -#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ -#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */ - -/* SPROM offsets */ -#define SRSH_ASPM_OFFSET 4 /* word 4 */ -#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */ -#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */ -#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */ -#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */ -#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ -#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ -#define SRSH_CLKREQ_OFFSET_REV8 52 /* word 52 for srom rev 8 */ -#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */ -#define SRSH_BD_OFFSET 6 /* word 6 */ -#define SRSH_AUTOINIT_OFFSET 18 /* auto initialization enable */ - -/* Linkcontrol reg offset in PCIE Cap */ -#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */ -#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ -#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ -#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ - -#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */ - -/* Status reg PCIE_PLP_STATUSREG */ -#define PCIE_PLP_POLARITYINV_STAT 0x10 -#endif /* _PCIE_CORE_H */ -- cgit v0.10.2 From d5f27a8f894ed069a5e7336139a9a13391c6b13e Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:29 +0200 Subject: staging: brcm80211: replaced typedef si_t with struct si_pub Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 2cc9bc7..9819a35 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -27,7 +27,8 @@ #include #include #include -typedef const struct si_pub si_t; + +struct si_pub; #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 43320b4..e065895 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -167,7 +167,7 @@ /* EROM parsing */ static u32 -get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) +get_erom_ent(struct si_pub *sih, u32 **eromptr, u32 mask, u32 match) { u32 ent; uint inv = 0, nom = 0; @@ -202,7 +202,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) } static u32 -get_asd(si_t *sih, u32 **eromptr, uint sp, uint ad, uint st, +get_asd(struct si_pub *sih, u32 **eromptr, uint sp, uint ad, uint st, u32 *addrl, u32 *addrh, u32 *sizel, u32 *sizeh) { u32 asd, sz, szd; @@ -241,7 +241,7 @@ static void ai_hwfixup(si_info_t *sii) } /* parse the enumeration rom to identify all cores */ -void ai_scan(si_t *sih, void *regs, uint devid) +void ai_scan(struct si_pub *sih, void *regs, uint devid) { si_info_t *sii = SI_INFO(sih); chipcregs_t *cc = (chipcregs_t *) regs; @@ -444,7 +444,7 @@ void ai_scan(si_t *sih, void *regs, uint devid) /* This function changes the logical "focus" to the indicated core. * Return the current core's virtual address. */ -void *ai_setcoreidx(si_t *sih, uint coreidx) +void *ai_setcoreidx(struct si_pub *sih, uint coreidx) { si_info_t *sii = SI_INFO(sih); u32 addr = sii->coresba[coreidx]; @@ -493,13 +493,13 @@ void *ai_setcoreidx(si_t *sih, uint coreidx) } /* Return the number of address spaces in current core */ -int ai_numaddrspaces(si_t *sih) +int ai_numaddrspaces(struct si_pub *sih) { return 2; } /* Return the address of the nth address space in the current core */ -u32 ai_addrspace(si_t *sih, uint asidx) +u32 ai_addrspace(struct si_pub *sih, uint asidx) { si_info_t *sii; uint cidx; @@ -518,7 +518,7 @@ u32 ai_addrspace(si_t *sih, uint asidx) } /* Return the size of the nth address space in the current core */ -u32 ai_addrspacesize(si_t *sih, uint asidx) +u32 ai_addrspacesize(struct si_pub *sih, uint asidx) { si_info_t *sii; uint cidx; @@ -536,7 +536,7 @@ u32 ai_addrspacesize(si_t *sih, uint asidx) } } -uint ai_flag(si_t *sih) +uint ai_flag(struct si_pub *sih) { si_info_t *sii; aidmp_t *ai; @@ -551,11 +551,11 @@ uint ai_flag(si_t *sih) return R_REG(&ai->oobselouta30) & 0x1f; } -void ai_setint(si_t *sih, int siflag) +void ai_setint(struct si_pub *sih, int siflag) { } -uint ai_corevendor(si_t *sih) +uint ai_corevendor(struct si_pub *sih) { si_info_t *sii; u32 cia; @@ -565,7 +565,7 @@ uint ai_corevendor(si_t *sih) return (cia & CIA_MFG_MASK) >> CIA_MFG_SHIFT; } -uint ai_corerev(si_t *sih) +uint ai_corerev(struct si_pub *sih) { si_info_t *sii; u32 cib; @@ -575,7 +575,7 @@ uint ai_corerev(si_t *sih) return (cib & CIB_REV_MASK) >> CIB_REV_SHIFT; } -bool ai_iscoreup(si_t *sih) +bool ai_iscoreup(struct si_pub *sih) { si_info_t *sii; aidmp_t *ai; @@ -588,7 +588,7 @@ bool ai_iscoreup(si_t *sih) && ((R_REG(&ai->resetctrl) & AIRC_RESET) == 0)); } -void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val) +void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val) { si_info_t *sii; aidmp_t *ai; @@ -610,7 +610,7 @@ void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val) } } -u32 ai_core_cflags(si_t *sih, u32 mask, u32 val) +u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val) { si_info_t *sii; aidmp_t *ai; @@ -633,7 +633,7 @@ u32 ai_core_cflags(si_t *sih, u32 mask, u32 val) return R_REG(&ai->ioctrl); } -u32 ai_core_sflags(si_t *sih, u32 mask, u32 val) +u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val) { si_info_t *sii; aidmp_t *ai; @@ -667,7 +667,8 @@ static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, static void ai_nvram_process(si_info_t *sii, char *pvars); /* dev path concatenation util */ -static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name); +static char *ai_devpathvar(struct si_pub *sih, char *var, int len, + const char *name); static bool _ai_clkctl_cc(si_info_t *sii, uint mode); static bool ai_ispcie(si_info_t *sii); @@ -683,7 +684,7 @@ static u32 ai_gpioreservation; * vars - pointer to a pointer area for "environment" variables * varsz - pointer to int to return the size of the vars */ -si_t *ai_attach(uint devid, void *regs, uint bustype, +struct si_pub *ai_attach(uint devid, void *regs, uint bustype, void *sdh, char **vars, uint *varsz) { si_info_t *sii; @@ -703,7 +704,7 @@ si_t *ai_attach(uint devid, void *regs, uint bustype, sii->vars = vars ? *vars : NULL; sii->varsz = varsz ? *varsz : 0; - return (si_t *) sii; + return (struct si_pub *) sii; } /* global kernel resource */ @@ -1075,13 +1076,13 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, } /* may be called with core in reset */ -void ai_detach(si_t *sih) +void ai_detach(struct si_pub *sih) { si_info_t *sii; uint idx; struct si_pub *si_local = NULL; - bcopy(&sih, &si_local, sizeof(si_t **)); + bcopy(&sih, &si_local, sizeof(struct si_pub **)); sii = SI_INFO(sih); @@ -1109,7 +1110,8 @@ void ai_detach(si_t *sih) /* register driver interrupt disabling and restoring callback functions */ void -ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, +ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn, + void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg) { si_info_t *sii; @@ -1125,7 +1127,7 @@ ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, sii->dev_coreid = sii->coreid[sii->curidx]; } -void ai_deregister_intr_callback(si_t *sih) +void ai_deregister_intr_callback(struct si_pub *sih) { si_info_t *sii; @@ -1133,7 +1135,7 @@ void ai_deregister_intr_callback(si_t *sih) sii->intrsoff_fn = NULL; } -uint ai_coreid(si_t *sih) +uint ai_coreid(struct si_pub *sih) { si_info_t *sii; @@ -1141,7 +1143,7 @@ uint ai_coreid(si_t *sih) return sii->coreid[sii->curidx]; } -uint ai_coreidx(si_t *sih) +uint ai_coreidx(struct si_pub *sih) { si_info_t *sii; @@ -1149,13 +1151,13 @@ uint ai_coreidx(si_t *sih) return sii->curidx; } -bool ai_backplane64(si_t *sih) +bool ai_backplane64(struct si_pub *sih) { return (sih->cccaps & CC_CAP_BKPLN64) != 0; } /* return index of coreid or BADIDX if not found */ -uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit) +uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit) { si_info_t *sii; uint found; @@ -1181,7 +1183,7 @@ uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit) * Moreover, callers should keep interrupts off during switching * out of and back to d11 core. */ -void *ai_setcore(si_t *sih, uint coreid, uint coreunit) +void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit) { uint idx; @@ -1193,7 +1195,8 @@ void *ai_setcore(si_t *sih, uint coreid, uint coreunit) } /* Turn off interrupt as required by ai_setcore, before switch core */ -void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val) +void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx, + uint *intr_val) { void *cc; si_info_t *sii; @@ -1218,7 +1221,7 @@ void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val) } /* restore coreidx and restore interrupt */ -void ai_restore_core(si_t *sih, uint coreid, uint intr_val) +void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val) { si_info_t *sii; @@ -1231,7 +1234,7 @@ void ai_restore_core(si_t *sih, uint coreid, uint intr_val) INTR_RESTORE(sii, intr_val); } -void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val) +void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val) { si_info_t *sii = SI_INFO(sih); u32 *w = (u32 *) sii->curwrap; @@ -1249,7 +1252,8 @@ void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val) * Also, when using pci/pcie, we can optimize away the core switching for pci * registers and (on newer pci cores) chipcommon registers. */ -uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) +uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, + uint val) { uint origidx = 0; u32 *r = NULL; @@ -1333,7 +1337,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) return w; } -void ai_core_disable(si_t *sih, u32 bits) +void ai_core_disable(struct si_pub *sih, u32 bits) { si_info_t *sii; u32 dummy; @@ -1360,7 +1364,7 @@ void ai_core_disable(si_t *sih, u32 bits) * bits - core specific bits that are set during and after reset sequence * resetbits - core specific bits that are set only during reset sequence */ -void ai_core_reset(si_t *sih, u32 bits, u32 resetbits) +void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits) { si_info_t *sii; aidmp_t *ai; @@ -1477,7 +1481,7 @@ static void ai_clkctl_setdelay(si_info_t *sii, void *chipcregs) } /* initialize power control delay registers */ -void ai_clkctl_init(si_t *sih) +void ai_clkctl_init(struct si_pub *sih) { si_info_t *sii; uint origidx = 0; @@ -1515,7 +1519,7 @@ void ai_clkctl_init(si_t *sih) * return the value suitable for writing to the * dot11 core FAST_PWRUP_DELAY register */ -u16 ai_clkctl_fast_pwrup_delay(si_t *sih) +u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih) { si_info_t *sii; uint origidx = 0; @@ -1563,7 +1567,7 @@ u16 ai_clkctl_fast_pwrup_delay(si_t *sih) } /* turn primary xtal and/or pll off/on */ -int ai_clkctl_xtal(si_t *sih, uint what, bool on) +int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on) { si_info_t *sii; u32 in, out, outen; @@ -1640,7 +1644,7 @@ int ai_clkctl_xtal(si_t *sih, uint what, bool on) * this is a wrapper over the next internal function * to allow flexible policy settings for outside caller */ -bool ai_clkctl_cc(si_t *sih, uint mode) +bool ai_clkctl_cc(struct si_pub *sih, uint mode) { si_info_t *sii; @@ -1749,7 +1753,7 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode) } /* Build device path. Support SI, PCI, and JTAG for now. */ -int ai_devpath(si_t *sih, char *path, int size) +int ai_devpath(struct si_pub *sih, char *path, int size) { int slen; @@ -1782,7 +1786,7 @@ int ai_devpath(si_t *sih, char *path, int size) } /* Get a variable, but only if it has a devpath prefix */ -char *ai_getdevpathvar(si_t *sih, const char *name) +char *ai_getdevpathvar(struct si_pub *sih, const char *name) { char varname[SI_DEVPATH_BUFSZ + 32]; @@ -1792,7 +1796,7 @@ char *ai_getdevpathvar(si_t *sih, const char *name) } /* Get a variable, but only if it has a devpath prefix */ -int ai_getdevpathintvar(si_t *sih, const char *name) +int ai_getdevpathintvar(struct si_pub *sih, const char *name) { #if defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS) return getintvar(NULL, name); @@ -1805,7 +1809,7 @@ int ai_getdevpathintvar(si_t *sih, const char *name) #endif } -char *ai_getnvramflvar(si_t *sih, const char *name) +char *ai_getnvramflvar(struct si_pub *sih, const char *name) { return getvar(NULL, name); } @@ -1815,7 +1819,8 @@ char *ai_getnvramflvar(si_t *sih, const char *name) * len == 0 or var is NULL, var is still returned. On overflow, the * first char will be set to '\0'. */ -static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name) +static char *ai_devpathvar(struct si_pub *sih, char *var, int len, + const char *name) { uint path_len; @@ -1851,7 +1856,7 @@ static __used bool ai_ispcie(si_info_t *sii) return true; } -bool ai_pci_war16165(si_t *sih) +bool ai_pci_war16165(struct si_pub *sih) { si_info_t *sii; @@ -1860,7 +1865,7 @@ bool ai_pci_war16165(si_t *sih) return PCI(sii) && (sih->buscorerev <= 10); } -void ai_pci_up(si_t *sih) +void ai_pci_up(struct si_pub *sih) { si_info_t *sii; @@ -1879,7 +1884,7 @@ void ai_pci_up(si_t *sih) } /* Unconfigure and/or apply various WARs when system is going to sleep mode */ -void ai_pci_sleep(si_t *sih) +void ai_pci_sleep(struct si_pub *sih) { si_info_t *sii; @@ -1889,7 +1894,7 @@ void ai_pci_sleep(si_t *sih) } /* Unconfigure and/or apply various WARs when going down */ -void ai_pci_down(si_t *sih) +void ai_pci_down(struct si_pub *sih) { si_info_t *sii; @@ -1910,7 +1915,7 @@ void ai_pci_down(si_t *sih) * Configure the pci core for pci client (NIC) action * coremask is the bitvec of cores by index to be enabled. */ -void ai_pci_setup(si_t *sih, uint coremask) +void ai_pci_setup(struct si_pub *sih, uint coremask) { si_info_t *sii; void *regs = NULL; @@ -1959,7 +1964,7 @@ void ai_pci_setup(si_t *sih, uint coremask) * Fixup SROMless PCI device's configuration. * The current core may be changed upon return. */ -int ai_pci_fixcfg(si_t *sih) +int ai_pci_fixcfg(struct si_pub *sih) { uint origidx; void *regs = NULL; @@ -1982,7 +1987,7 @@ int ai_pci_fixcfg(si_t *sih) } /* mask&set gpiocontrol bits */ -u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority) +u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority) { uint regoff; @@ -2002,7 +2007,7 @@ u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority) return ai_corereg(sih, SI_CC_IDX, regoff, mask, val); } -void ai_chipcontrl_epa4331(si_t *sih, bool on) +void ai_chipcontrl_epa4331(struct si_pub *sih, bool on) { si_info_t *sii; chipcregs_t *cc; @@ -2036,7 +2041,7 @@ void ai_chipcontrl_epa4331(si_t *sih, bool on) } /* Enable BT-COEX & Ex-PA for 4313 */ -void ai_epa_4313war(si_t *sih) +void ai_epa_4313war(struct si_pub *sih) { si_info_t *sii; chipcregs_t *cc; @@ -2055,7 +2060,7 @@ void ai_epa_4313war(si_t *sih) } /* check if the device is removed */ -bool ai_deviceremoved(si_t *sih) +bool ai_deviceremoved(struct si_pub *sih) { u32 w; si_info_t *sii; @@ -2072,7 +2077,7 @@ bool ai_deviceremoved(si_t *sih) return false; } -bool ai_is_sprom_available(si_t *sih) +bool ai_is_sprom_available(struct si_pub *sih) { if (sih->ccrev >= 31) { si_info_t *sii; @@ -2109,7 +2114,7 @@ bool ai_is_sprom_available(si_t *sih) } } -bool ai_is_otp_disabled(si_t *sih) +bool ai_is_otp_disabled(struct si_pub *sih) { switch (sih->chip) { case BCM4329_CHIP_ID: @@ -2137,14 +2142,14 @@ bool ai_is_otp_disabled(si_t *sih) } } -bool ai_is_otp_powered(si_t *sih) +bool ai_is_otp_powered(struct si_pub *sih) { if (PMUCTL_ENAB(sih)) return si_pmu_is_otp_powered(sih); return true; } -void ai_otp_power(si_t *sih, bool on) +void ai_otp_power(struct si_pub *sih, bool on) { if (PMUCTL_ENAB(sih)) si_pmu_otp_power(sih, on); diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index a0fec83..53d2e02 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -361,13 +361,6 @@ struct si_pub { }; /* - * for HIGH_ONLY driver, the si_t must be writable to allow states sync from - * BMAC to HIGH driver for monolithic driver, it is readonly to prevent accident - * change - */ -typedef const struct si_pub si_t; - -/* * Many of the routines below take an 'sih' handle as their first arg. * Allocate this by calling si_attach(). Free it by calling si_detach(). * At any one time, the sih is logically focused on one particular si core @@ -499,94 +492,94 @@ typedef struct si_info { } si_info_t; /* AMBA Interconnect exported externs */ -extern void ai_scan(si_t *sih, void *regs, uint devid); - -extern uint ai_flag(si_t *sih); -extern void ai_setint(si_t *sih, int siflag); -extern uint ai_coreidx(si_t *sih); -extern uint ai_corevendor(si_t *sih); -extern uint ai_corerev(si_t *sih); -extern bool ai_iscoreup(si_t *sih); -extern void *ai_setcoreidx(si_t *sih, uint coreidx); -extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val); -extern void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val); -extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val); -extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, +extern void ai_scan(struct si_pub *sih, void *regs, uint devid); + +extern uint ai_flag(struct si_pub *sih); +extern void ai_setint(struct si_pub *sih, int siflag); +extern uint ai_coreidx(struct si_pub *sih); +extern uint ai_corevendor(struct si_pub *sih); +extern uint ai_corerev(struct si_pub *sih); +extern bool ai_iscoreup(struct si_pub *sih); +extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx); +extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val); +extern void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val); +extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val); +extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, uint val); -extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits); -extern void ai_core_disable(si_t *sih, u32 bits); -extern int ai_numaddrspaces(si_t *sih); -extern u32 ai_addrspace(si_t *sih, uint asidx); -extern u32 ai_addrspacesize(si_t *sih, uint asidx); -extern void ai_write_wrap_reg(si_t *sih, u32 offset, u32 val); +extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits); +extern void ai_core_disable(struct si_pub *sih, u32 bits); +extern int ai_numaddrspaces(struct si_pub *sih); +extern u32 ai_addrspace(struct si_pub *sih, uint asidx); +extern u32 ai_addrspacesize(struct si_pub *sih, uint asidx); +extern void ai_write_wrap_reg(struct si_pub *sih, u32 offset, u32 val); /* === exported functions === */ -extern si_t *ai_attach(uint pcidev, void *regs, uint bustype, +extern struct si_pub *ai_attach(uint pcidev, void *regs, uint bustype, void *sdh, char **vars, uint *varsz); -extern void ai_detach(si_t *sih); -extern bool ai_pci_war16165(si_t *sih); +extern void ai_detach(struct si_pub *sih); +extern bool ai_pci_war16165(struct si_pub *sih); -extern uint ai_coreid(si_t *sih); -extern uint ai_corerev(si_t *sih); -extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, +extern uint ai_coreid(struct si_pub *sih); +extern uint ai_corerev(struct si_pub *sih); +extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, uint val); -extern void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val); -extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val); -extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val); -extern bool ai_iscoreup(si_t *sih); -extern uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit); -extern void *ai_setcoreidx(si_t *sih, uint coreidx); -extern void *ai_setcore(si_t *sih, uint coreid, uint coreunit); -extern void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, +extern void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val); +extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val); +extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val); +extern bool ai_iscoreup(struct si_pub *sih); +extern uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit); +extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx); +extern void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit); +extern void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx, uint *intr_val); -extern void ai_restore_core(si_t *sih, uint coreid, uint intr_val); -extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits); -extern void ai_core_disable(si_t *sih, u32 bits); -extern u32 ai_alp_clock(si_t *sih); -extern u32 ai_ilp_clock(si_t *sih); -extern void ai_pci_setup(si_t *sih, uint coremask); -extern void ai_setint(si_t *sih, int siflag); -extern bool ai_backplane64(si_t *sih); -extern void ai_register_intr_callback(si_t *sih, void *intrsoff_fn, +extern void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val); +extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits); +extern void ai_core_disable(struct si_pub *sih, u32 bits); +extern u32 ai_alp_clock(struct si_pub *sih); +extern u32 ai_ilp_clock(struct si_pub *sih); +extern void ai_pci_setup(struct si_pub *sih, uint coremask); +extern void ai_setint(struct si_pub *sih, int siflag); +extern bool ai_backplane64(struct si_pub *sih); +extern void ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn, void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg); -extern void ai_deregister_intr_callback(si_t *sih); -extern void ai_clkctl_init(si_t *sih); -extern u16 ai_clkctl_fast_pwrup_delay(si_t *sih); -extern bool ai_clkctl_cc(si_t *sih, uint mode); -extern int ai_clkctl_xtal(si_t *sih, uint what, bool on); -extern bool ai_deviceremoved(si_t *sih); -extern u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, +extern void ai_deregister_intr_callback(struct si_pub *sih); +extern void ai_clkctl_init(struct si_pub *sih); +extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih); +extern bool ai_clkctl_cc(struct si_pub *sih, uint mode); +extern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on); +extern bool ai_deviceremoved(struct si_pub *sih); +extern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority); /* OTP status */ -extern bool ai_is_otp_disabled(si_t *sih); -extern bool ai_is_otp_powered(si_t *sih); -extern void ai_otp_power(si_t *sih, bool on); +extern bool ai_is_otp_disabled(struct si_pub *sih); +extern bool ai_is_otp_powered(struct si_pub *sih); +extern void ai_otp_power(struct si_pub *sih, bool on); /* SPROM availability */ -extern bool ai_is_sprom_available(si_t *sih); +extern bool ai_is_sprom_available(struct si_pub *sih); /* * Build device path. Path size must be >= SI_DEVPATH_BUFSZ. * The returned path is NULL terminated and has trailing '/'. * Return 0 on success, nonzero otherwise. */ -extern int ai_devpath(si_t *sih, char *path, int size); +extern int ai_devpath(struct si_pub *sih, char *path, int size); /* Read variable with prepending the devpath to the name */ -extern char *ai_getdevpathvar(si_t *sih, const char *name); -extern int ai_getdevpathintvar(si_t *sih, const char *name); +extern char *ai_getdevpathvar(struct si_pub *sih, const char *name); +extern int ai_getdevpathintvar(struct si_pub *sih, const char *name); -extern void ai_pci_sleep(si_t *sih); -extern void ai_pci_down(si_t *sih); -extern void ai_pci_up(si_t *sih); -extern int ai_pci_fixcfg(si_t *sih); +extern void ai_pci_sleep(struct si_pub *sih); +extern void ai_pci_down(struct si_pub *sih); +extern void ai_pci_up(struct si_pub *sih); +extern int ai_pci_fixcfg(struct si_pub *sih); -extern void ai_chipcontrl_epa4331(si_t *sih, bool on); +extern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on); /* Enable Ex-PA for 4313 */ -extern void ai_epa_4313war(si_t *sih); +extern void ai_epa_4313war(struct si_pub *sih); -char *ai_getnvramflvar(si_t *sih, const char *name); +char *ai_getnvramflvar(struct si_pub *sih, const char *name); #endif /* _aiutils_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index fc68d49..005410d 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -148,7 +148,7 @@ struct dma_pub { uint txnobuf; /* tx out of dma descriptors */ }; -extern struct dma_pub *dma_attach(char *name, si_t *sih, +extern struct dma_pub *dma_attach(char *name, struct si_pub *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level); @@ -201,7 +201,7 @@ extern const di_fcn_t dma64proc; * SB attach provides ability to probe backplane and dma core capabilities * This info is needed by DMA_ALLOC_CONSISTENT in dma attach */ -extern uint dma_addrwidth(si_t *sih, void *dmaregs); +extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs); void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a); diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index aa147c3..dab71fb 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -89,9 +89,9 @@ /* OTP common function type */ typedef int (*otp_status_t) (void *oh); typedef int (*otp_size_t) (void *oh); -typedef void *(*otp_init_t) (si_t *sih); +typedef void *(*otp_init_t) (struct si_pub *sih); typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off); -typedef int (*otp_read_region_t) (si_t *sih, int region, u16 *data, +typedef int (*otp_read_region_t) (struct si_pub *sih, int region, u16 *data, uint *wlen); typedef int (*otp_nvread_t) (void *oh, char *data, uint *len); @@ -108,7 +108,7 @@ typedef struct otp_fn_s { typedef struct { uint ccrev; /* chipc revision */ otp_fn_t *fn; /* OTP functions */ - si_t *sih; /* Saved sb handle */ + struct si_pub *sih; /* Saved sb handle */ #ifdef BCMIPXOTP /* IPX OTP section */ @@ -245,7 +245,7 @@ static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off) /* Calculate max HW/SW region byte size by subtracting fuse region and checksum size, * osizew is oi->wsize (OTP size - GU size) in words */ -static int ipxotp_max_rgnsz(si_t *sih, int osizew) +static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew) { int ret = 0; @@ -335,7 +335,7 @@ static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc) oi->flim = oi->wsize; } -static void *ipxotp_init(si_t *sih) +static void *ipxotp_init(struct si_pub *sih) { uint idx; chipcregs_t *cc; @@ -635,7 +635,7 @@ static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx) return (u16) st; } -static void *hndotp_init(si_t *sih) +static void *hndotp_init(struct si_pub *sih) { uint idx; chipcregs_t *cc; @@ -897,7 +897,7 @@ u16 otp_read_bit(void *oh, uint offset) return readBit; } -void *otp_init(si_t *sih) +void *otp_init(struct si_pub *sih) { otpinfo_t *oi; void *ret = NULL; @@ -929,7 +929,7 @@ void *otp_init(si_t *sih) } int -otp_read_region(si_t *sih, int region, u16 *data, +otp_read_region(struct si_pub *sih, int region, u16 *data, uint *wlen) { bool wasup = false; void *oh; diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/bcmotp.h index 5803acc..ccfb9ff 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.h @@ -37,8 +37,9 @@ extern int otp_status(void *oh); extern int otp_size(void *oh); extern u16 otp_read_bit(void *oh, uint offset); -extern void *otp_init(si_t *sih); -extern int otp_read_region(si_t *sih, int region, u16 *data, uint *wlen); +extern void *otp_init(struct si_pub *sih); +extern int otp_read_region(struct si_pub *sih, int region, u16 *data, + uint *wlen); extern int otp_nvread(void *oh, char *data, uint *len); #endif /* _bcmotp_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index e0899c8..c776a76 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -780,21 +780,23 @@ static const sromvar_t perpath_pci_sromvars[] = { {NULL, 0, 0, 0, 0} }; -static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count); +static int initvars_srom_si(struct si_pub *sih, void *curmap, char **vars, + uint *count); static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); -static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count); -static int initvars_flash_si(si_t *sih, char **vars, uint *count); -static int sprom_read_pci(si_t *sih, u16 *sprom, +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count); +static int initvars_flash_si(struct si_pub *sih, char **vars, uint *count); +static int sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, u16 *buf, uint nwords, bool check_crc); #if defined(BCMNVRAMR) -static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz); +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz); #endif -static u16 srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd, +static u16 srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, uint wordoff, u16 data); static int initvars_table(char *start, char *end, char **vars, uint *count); -static int initvars_flash(si_t *sih, char **vp, +static int initvars_flash(struct si_pub *sih, char **vp, uint len); /* Initialization of varbuf structure */ @@ -862,7 +864,7 @@ static int varbuf_append(varbuf_t *b, const char *fmt, ...) * Initialize local vars from the right source for this platform. * Return 0 on success, nonzero on error. */ -int srom_var_init(si_t *sih, uint bustype, void *curmap, +int srom_var_init(struct si_pub *sih, uint bustype, void *curmap, char **vars, uint *count) { uint len; @@ -896,7 +898,7 @@ int srom_var_init(si_t *sih, uint bustype, void *curmap, * not in the bus cores. */ static u16 -srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd, +srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, uint wordoff, u16 data) { chipcregs_t *cc = (chipcregs_t *) ccregs; @@ -941,7 +943,7 @@ static inline void htol16_buf(u16 *buf, unsigned int size) * Return 0 on success, nonzero on error. */ static int -sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff, +sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, u16 *buf, uint nwords, bool check_crc) { int err = 0; @@ -998,7 +1000,7 @@ sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff, } #if defined(BCMNVRAMR) -static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz) +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz) { u8 *otp; uint sz = OTP_SZ_MAX / 2; /* size in words */ @@ -1066,7 +1068,7 @@ static int initvars_table(char *start, char *end, * of the table upon enter and to the end of the table upon exit when success. * Return 0 on success, nonzero on error. */ -static int initvars_flash(si_t *sih, char **base, uint len) +static int initvars_flash(struct si_pub *sih, char **base, uint len) { char *vp = *base; char *flash; @@ -1124,7 +1126,7 @@ static int initvars_flash(si_t *sih, char **base, uint len) * Initialize nonvolatile variable table from flash. * Return 0 on success, nonzero on error. */ -static int initvars_flash_si(si_t *sih, char **vars, uint *count) +static int initvars_flash_si(struct si_pub *sih, char **vars, uint *count) { char *vp, *base; int err; @@ -1304,7 +1306,8 @@ static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b) * Initialize nonvolatile variable table from sprom. * Return 0 on success, nonzero on error. */ -static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count) { u16 *srom, *sromwindow; u8 sromrev = 0; @@ -1437,7 +1440,8 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) } -static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *varsz) +static int initvars_srom_si(struct si_pub *sih, void *curmap, char **vars, + uint *varsz) { /* Search flash nvram section for srom variables */ return initvars_flash_si(sih, vars, varsz); diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 611a7e2..7d666c6 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -434,7 +434,7 @@ const di_fcn_t dma64proc = { 39 }; -struct dma_pub *dma_attach(char *name, si_t *sih, +struct dma_pub *dma_attach(char *name, struct si_pub *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level) @@ -1873,7 +1873,7 @@ static void dma64_txrotate(dma_info_t *di) di->xmtptrbase + I2B(di->txout, dma64dd_t)); } -uint dma_addrwidth(si_t *sih, void *dmaregs) +uint dma_addrwidth(struct si_pub *sih, void *dmaregs) { /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */ /* DMA engine is 64-bit capable */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index e1612ec..8bc65e0 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -193,7 +193,7 @@ typedef struct { struct sbpciregs *pciregs; } regs; /* Memory mapped register to the core */ - si_t *sih; /* System interconnect handle */ + struct si_pub *sih; /* System interconnect handle */ struct pci_dev *dev; u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */ bool pcie_pr42767; @@ -512,7 +512,7 @@ static u8 pcie_clkreq(void *pch, u32 mask, u32 val) static void pcie_extendL1timer(pcicore_info_t *pi, bool extend) { u32 w; - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; sbpcieregs_t *pcieregs = pi->regs.pcieregs; if (!PCIE_PUB(sih) || sih->buscorerev < 7) @@ -530,7 +530,7 @@ static void pcie_extendL1timer(pcicore_info_t *pi, bool extend) /* centralized clkreq control policy */ static void pcie_clkreq_upd(pcicore_info_t *pi, uint state) { - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; switch (state) { case SI_DOATTACH: @@ -596,7 +596,7 @@ static void pcie_war_polarity(pcicore_info_t *pi) static void pcie_war_aspm_clkreq(pcicore_info_t *pi) { sbpcieregs_t *pcieregs = pi->regs.pcieregs; - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; u16 val16, *reg16; u32 w; @@ -691,7 +691,7 @@ static void pcie_war_noplldown(pcicore_info_t *pi) /* Needs to happen when coming out of 'standby'/'hibernate' */ static void pcie_war_pci_setup(pcicore_info_t *pi) { - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; sbpcieregs_t *pcieregs = pi->regs.pcieregs; u32 w; @@ -737,7 +737,7 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) void pcicore_attach(void *pch, char *pvars, int state) { pcicore_info_t *pi = (pcicore_info_t *) pch; - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; /* Determine if this board needs override */ if (PCIE_ASPM(sih)) { diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h index 93e3db9..6d4473c 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h @@ -164,7 +164,7 @@ struct phy_pub; typedef struct phy_pub wlc_phy_t; typedef struct shared_phy_params { - si_t *sih; + struct si_pub *sih; void *physhim; uint unit; uint corerev; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 8e7fb94..51e37aa 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -534,7 +534,7 @@ typedef struct { struct shared_phy { struct phy_info *phy_head; uint unit; - si_t *sih; + struct si_pub *sih; void *physhim; uint corerev; u32 machwcap; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 4e62b11..0dcb73f 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -450,7 +450,7 @@ struct wlc_hw_info { u32 machwcap_backup; /* backup of machwcap */ u16 ucode_dbgsel; /* dbgsel for ucode debug(config gpio) */ - si_t *sih; /* SB handle (cookie for siutils calls) */ + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ char *vars; /* "environment" name=value */ uint vars_size; /* size of vars, free vars on detach */ d11regs_t *regs; /* pointer to device registers */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index e9230a8..ab2c0b7 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -607,7 +607,8 @@ typedef struct { u32 res_mask; /* resources (chip specific) */ s8 action; /* action */ u32 depend_mask; /* changes to the dependancies mask */ - bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return true */ + /* action is taken when filter is NULL or return true: */ + bool(*filter) (struct si_pub *sih); } pmu_res_depend_t; /* setup pll and query clock speed */ @@ -623,10 +624,10 @@ typedef struct { /* * prototypes used in resource tables */ -static bool si_pmu_res_depfltr_bb(si_t *sih); -static bool si_pmu_res_depfltr_ncb(si_t *sih); -static bool si_pmu_res_depfltr_paldo(si_t *sih); -static bool si_pmu_res_depfltr_npaldo(si_t *sih); +static bool si_pmu_res_depfltr_bb(struct si_pub *sih); +static bool si_pmu_res_depfltr_ncb(struct si_pub *sih); +static bool si_pmu_res_depfltr_paldo(struct si_pub *sih); +static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih); static const pmu_res_updown_t bcm4328a0_res_updown[] = { { @@ -970,33 +971,33 @@ static const pmu1_xtaltab0_t pmu1_xtaltab0_880[] = { }; /* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ -static bool si_pmu_res_depfltr_bb(si_t *sih) +static bool si_pmu_res_depfltr_bb(struct si_pub *sih) { return (sih->boardflags & BFL_BUCKBOOST) != 0; } /* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ -static bool si_pmu_res_depfltr_ncb(si_t *sih) +static bool si_pmu_res_depfltr_ncb(struct si_pub *sih) { return (sih->boardflags & BFL_NOCBUCK) != 0; } /* true if the power topology uses the PALDO */ -static bool si_pmu_res_depfltr_paldo(si_t *sih) +static bool si_pmu_res_depfltr_paldo(struct si_pub *sih) { return (sih->boardflags & BFL_PALDO) != 0; } /* true if the power topology doesn't use the PALDO */ -static bool si_pmu_res_depfltr_npaldo(si_t *sih) +static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih) { return (sih->boardflags & BFL_PALDO) == 0; } /* Return dependancies (direct or all/indirect) for the given resources */ static u32 -si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs, +si_pmu_res_deps(struct si_pub *sih, chipcregs_t *cc, u32 rsrcs, bool all) { u32 deps = 0; @@ -1016,7 +1017,7 @@ si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs, } /* Determine min/max rsrc masks. Value 0 leaves hardware at default. */ -static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax) +static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax) { u32 min_mask = 0, max_mask = 0; uint rsrcs; @@ -1103,7 +1104,7 @@ static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax) /* Return up time in ILP cycles for the given resource. */ static uint -si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) { +si_pmu_res_uptime(struct si_pub *sih, chipcregs_t *cc, u8 rsrc) { u32 deps; uint up, i, dup, dmax; u32 min_mask = 0, max_mask = 0; @@ -1136,7 +1137,7 @@ si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) { } static void -si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid) +si_pmu_spuravoid_pllupdate(struct si_pub *sih, chipcregs_t *cc, u8 spuravoid) { u32 tmp = 0; u8 phypll_offset = 0; @@ -1336,7 +1337,7 @@ si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid) } /* select default xtal frequency for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih) +static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(struct si_pub *sih) { switch (sih->chip) { case BCM4329_CHIP_ID: @@ -1361,7 +1362,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih) } /* select xtal table for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih) +static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(struct si_pub *sih) { switch (sih->chip) { case BCM4329_CHIP_ID: @@ -1383,7 +1384,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih) /* query alp/xtal clock frequency */ static u32 -si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc) +si_pmu1_alpclk0(struct si_pub *sih, chipcregs_t *cc) { const pmu1_xtaltab0_t *xt; u32 xf; @@ -1401,7 +1402,7 @@ si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc) } /* select default pll fvco for each chip */ -static u32 si_pmu1_pllfvco0(si_t *sih) +static u32 si_pmu1_pllfvco0(struct si_pub *sih) { switch (sih->chip) { case BCM4329_CHIP_ID: @@ -1421,7 +1422,7 @@ static u32 si_pmu1_pllfvco0(si_t *sih) return 0; } -static void si_pmu_set_4330_plldivs(si_t *sih) +static void si_pmu_set_4330_plldivs(struct si_pub *sih) { u32 FVCO = si_pmu1_pllfvco0(sih) / 1000; u32 m1div, m2div, m3div, m4div, m5div, m6div; @@ -1455,7 +1456,7 @@ static void si_pmu_set_4330_plldivs(si_t *sih) * case the xtal frequency is unknown to the s/w so we need to call * si_pmu1_xtaldef0() wherever it is needed to return a default value. */ -static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal) +static void si_pmu1_pllinit0(struct si_pub *sih, chipcregs_t *cc, u32 xtal) { const pmu1_xtaltab0_t *xt; u32 tmp; @@ -1675,7 +1676,7 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal) W_REG(&cc->pmucontrol, tmp); } -u32 si_pmu_ilp_clock(si_t *sih) +u32 si_pmu_ilp_clock(struct si_pub *sih) { static u32 ilpcycles_per_sec; @@ -1697,7 +1698,7 @@ u32 si_pmu_ilp_clock(si_t *sih) return ilpcycles_per_sec; } -void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage) +void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage) { u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0; u8 addr = 0; @@ -1747,7 +1748,7 @@ void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage) mask << shift, (voltage & mask) << shift); } -u16 si_pmu_fast_pwrup_delay(si_t *sih) +u16 si_pmu_fast_pwrup_delay(struct si_pub *sih) { uint delay = PMU_MAX_TRANSITION_DLY; chipcregs_t *cc; @@ -1821,7 +1822,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih) return (u16) delay; } -void si_pmu_sprom_enable(si_t *sih, bool enable) +void si_pmu_sprom_enable(struct si_pub *sih, bool enable) { chipcregs_t *cc; uint origidx; @@ -1835,7 +1836,7 @@ void si_pmu_sprom_enable(si_t *sih, bool enable) } /* Read/write a chipcontrol reg */ -u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val) +u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) { ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0, reg); @@ -1844,7 +1845,7 @@ u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val) } /* Read/write a regcontrol reg */ -u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val) +u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) { ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0, reg); @@ -1853,7 +1854,7 @@ u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val) } /* Read/write a pllcontrol reg */ -u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val) +u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) { ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0, reg); @@ -1862,14 +1863,14 @@ u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val) } /* PMU PLL update */ -void si_pmu_pllupd(si_t *sih) +void si_pmu_pllupd(struct si_pub *sih) { ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol), PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); } /* query alp/xtal clock frequency */ -u32 si_pmu_alp_clock(si_t *sih) +u32 si_pmu_alp_clock(struct si_pub *sih) { chipcregs_t *cc; uint origidx; @@ -1920,7 +1921,7 @@ u32 si_pmu_alp_clock(si_t *sih) return clock; } -void si_pmu_spuravoid(si_t *sih, u8 spuravoid) +void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid) { chipcregs_t *cc; uint origidx, intr_val; @@ -1955,7 +1956,7 @@ void si_pmu_spuravoid(si_t *sih, u8 spuravoid) } /* initialize PMU */ -void si_pmu_init(si_t *sih) +void si_pmu_init(struct si_pub *sih) { chipcregs_t *cc; uint origidx; @@ -1983,7 +1984,7 @@ void si_pmu_init(si_t *sih) } /* initialize PMU chip controls and other chip level stuff */ -void si_pmu_chip_init(si_t *sih) +void si_pmu_chip_init(struct si_pub *sih) { uint origidx; @@ -1998,7 +1999,7 @@ void si_pmu_chip_init(si_t *sih) } /* initialize PMU switch/regulators */ -void si_pmu_swreg_init(si_t *sih) +void si_pmu_swreg_init(struct si_pub *sih) { switch (sih->chip) { case BCM4336_CHIP_ID: @@ -2023,7 +2024,7 @@ void si_pmu_swreg_init(si_t *sih) } /* initialize PLL */ -void si_pmu_pll_init(si_t *sih, uint xtalfreq) +void si_pmu_pll_init(struct si_pub *sih, uint xtalfreq) { chipcregs_t *cc; uint origidx; @@ -2063,7 +2064,7 @@ void si_pmu_pll_init(si_t *sih, uint xtalfreq) } /* initialize PMU resources */ -void si_pmu_res_init(si_t *sih) +void si_pmu_res_init(struct si_pub *sih) { chipcregs_t *cc; uint origidx; @@ -2234,7 +2235,7 @@ void si_pmu_res_init(si_t *sih) ai_setcoreidx(sih, origidx); } -u32 si_pmu_measure_alpclk(si_t *sih) +u32 si_pmu_measure_alpclk(struct si_pub *sih) { chipcregs_t *cc; uint origidx; @@ -2287,7 +2288,7 @@ u32 si_pmu_measure_alpclk(si_t *sih) return alp_khz; } -bool si_pmu_is_otp_powered(si_t *sih) +bool si_pmu_is_otp_powered(struct si_pub *sih) { uint idx; chipcregs_t *cc; @@ -2337,7 +2338,7 @@ bool si_pmu_is_otp_powered(si_t *sih) } /* power up/down OTP through PMU resources */ -void si_pmu_otp_power(si_t *sih, bool on) +void si_pmu_otp_power(struct si_pub *sih, bool on) { chipcregs_t *cc; uint origidx; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h index bd5b809b..6b005b0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h @@ -36,23 +36,23 @@ #define SET_LDO_VOLTAGE_LNLDO1 9 #define SET_LDO_VOLTAGE_LNLDO2_SEL 10 -extern void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage); -extern u16 si_pmu_fast_pwrup_delay(si_t *sih); -extern void si_pmu_sprom_enable(si_t *sih, bool enable); -extern u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_ilp_clock(si_t *sih); -extern u32 si_pmu_alp_clock(si_t *sih); -extern void si_pmu_pllupd(si_t *sih); -extern void si_pmu_spuravoid(si_t *sih, u8 spuravoid); -extern u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern void si_pmu_init(si_t *sih); -extern void si_pmu_chip_init(si_t *sih); -extern void si_pmu_pll_init(si_t *sih, u32 xtalfreq); -extern void si_pmu_res_init(si_t *sih); -extern void si_pmu_swreg_init(si_t *sih); -extern u32 si_pmu_measure_alpclk(si_t *sih); -extern bool si_pmu_is_otp_powered(si_t *sih); -extern void si_pmu_otp_power(si_t *sih, bool on); +extern void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage); +extern u16 si_pmu_fast_pwrup_delay(struct si_pub *sih); +extern void si_pmu_sprom_enable(struct si_pub *sih, bool enable); +extern u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_ilp_clock(struct si_pub *sih); +extern u32 si_pmu_alp_clock(struct si_pub *sih); +extern void si_pmu_pllupd(struct si_pub *sih); +extern void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid); +extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern void si_pmu_init(struct si_pub *sih); +extern void si_pmu_chip_init(struct si_pub *sih); +extern void si_pmu_pll_init(struct si_pub *sih, u32 xtalfreq); +extern void si_pmu_res_init(struct si_pub *sih); +extern void si_pmu_swreg_init(struct si_pub *sih); +extern u32 si_pmu_measure_alpclk(struct si_pub *sih); +extern bool si_pmu_is_otp_powered(struct si_pub *sih); +extern void si_pmu_otp_power(struct si_pub *sih, bool on); #endif /* WLC_PMU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 0ab16c4..77b07388 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -255,7 +255,7 @@ struct wlc_pub { uint mac80211_state; uint unit; /* device instance number */ uint corerev; /* core revision */ - si_t *sih; /* SB handle (cookie for siutils calls) */ + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ char *vars; /* "environment" name=value */ bool up; /* interface up and running */ bool hw_off; /* HW is off */ diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/include/bcmsrom.h index b9500ec..dc9ccee 100644 --- a/drivers/staging/brcm80211/include/bcmsrom.h +++ b/drivers/staging/brcm80211/include/bcmsrom.h @@ -18,10 +18,10 @@ #define _bcmsrom_h_ /* Prototypes */ -extern int srom_var_init(si_t *sih, uint bus, void *curmap, +extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, char **vars, uint *count); -extern int srom_read(si_t *sih, uint bus, void *curmap, +extern int srom_read(struct si_pub *sih, uint bus, void *curmap, uint byteoff, uint nbytes, u16 *buf, bool check_crc); /* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP -- cgit v0.10.2 From 745c9e6ebc001b540ecbf5401d70797236caa1df Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:30 +0200 Subject: staging: brcm80211: deleted sbconfig.h, renamed sbcc.h Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 0e327b3..5b1b4c2 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -131,7 +131,7 @@ typedef struct { } rte_cons_t; #endif /* DHD_DEBUG */ -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index e065895..2de6cfb 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include /* ********** from siutils.c *********** */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index dab71fb..2b7f061 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #define OTPS_GUP_MASK 0x00000f00 diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index c776a76..2946d06 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -23,7 +23,7 @@ #include "wlc_types.h" #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 8bc65e0..6b9cb6b 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include /* SPROM offsets */ diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c index 65fee2f..5cef837 100644 --- a/drivers/staging/brcm80211/brcmsmac/nvram.c +++ b/drivers/staging/brcm80211/brcmsmac/nvram.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index 1e9865f..d54e264 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c index 78d8cbe..bc362f3 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index d069ebe..0f876a7 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index c94b459..b97fa3e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index ab2c0b7..047cd1a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -19,7 +19,7 @@ #include #include -#include +#include #include #include #include "wlc_pmu.h" diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index cf9dc0e..304d8ed 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -95,4 +95,16 @@ typedef struct wl_rateset { #define PM_MAX 1 #define PM_FAST 2 +/* + * Sonics Configuration Space Registers. + */ +#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + #endif /* _bcmdefs_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmsoc.h b/drivers/staging/brcm80211/include/bcmsoc.h index 6435686..012e465 100644 --- a/drivers/staging/brcm80211/include/bcmsoc.h +++ b/drivers/staging/brcm80211/include/bcmsoc.h @@ -18,7 +18,6 @@ #define _HNDSOC_H /* Include the soci specific files */ -#include #include /* diff --git a/drivers/staging/brcm80211/include/chipcommon.h b/drivers/staging/brcm80211/include/chipcommon.h new file mode 100644 index 0000000..9ca2e69 --- /dev/null +++ b/drivers/staging/brcm80211/include/chipcommon.h @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SBCHIPC_H +#define _SBCHIPC_H + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + +typedef volatile struct { + u32 chipid; /* 0x0 */ + u32 capabilities; + u32 corecontrol; /* corerev >= 1 */ + u32 bist; + + /* OTP */ + u32 otpstatus; /* 0x10, corerev >= 10 */ + u32 otpcontrol; + u32 otpprog; + u32 otplayout; /* corerev >= 23 */ + + /* Interrupt control */ + u32 intstatus; /* 0x20 */ + u32 intmask; + + /* Chip specific regs */ + u32 chipcontrol; /* 0x28, rev >= 11 */ + u32 chipstatus; /* 0x2c, rev >= 11 */ + + /* Jtag Master */ + u32 jtagcmd; /* 0x30, rev >= 10 */ + u32 jtagir; + u32 jtagdr; + u32 jtagctrl; + + /* serial flash interface registers */ + u32 flashcontrol; /* 0x40 */ + u32 flashaddress; + u32 flashdata; + u32 PAD[1]; + + /* Silicon backplane configuration broadcast control */ + u32 broadcastaddress; /* 0x50 */ + u32 broadcastdata; + + /* gpio - cleared only by power-on-reset */ + u32 gpiopullup; /* 0x58, corerev >= 20 */ + u32 gpiopulldown; /* 0x5c, corerev >= 20 */ + u32 gpioin; /* 0x60 */ + u32 gpioout; /* 0x64 */ + u32 gpioouten; /* 0x68 */ + u32 gpiocontrol; /* 0x6C */ + u32 gpiointpolarity; /* 0x70 */ + u32 gpiointmask; /* 0x74 */ + + /* GPIO events corerev >= 11 */ + u32 gpioevent; + u32 gpioeventintmask; + + /* Watchdog timer */ + u32 watchdog; /* 0x80 */ + + /* GPIO events corerev >= 11 */ + u32 gpioeventintpolarity; + + /* GPIO based LED powersave registers corerev >= 16 */ + u32 gpiotimerval; /* 0x88 */ + u32 gpiotimeroutmask; + + /* clock control */ + u32 clockcontrol_n; /* 0x90 */ + u32 clockcontrol_sb; /* aka m0 */ + u32 clockcontrol_pci; /* aka m1 */ + u32 clockcontrol_m2; /* mii/uart/mipsref */ + u32 clockcontrol_m3; /* cpu */ + u32 clkdiv; /* corerev >= 3 */ + u32 gpiodebugsel; /* corerev >= 28 */ + u32 capabilities_ext; /* 0xac */ + + /* pll delay registers (corerev >= 4) */ + u32 pll_on_delay; /* 0xb0 */ + u32 fref_sel_delay; + u32 slow_clk_ctl; /* 5 < corerev < 10 */ + u32 PAD; + + /* Instaclock registers (corerev >= 10) */ + u32 system_clk_ctl; /* 0xc0 */ + u32 clkstatestretch; + u32 PAD[2]; + + /* Indirect backplane access (corerev >= 22) */ + u32 bp_addrlow; /* 0xd0 */ + u32 bp_addrhigh; + u32 bp_data; + u32 PAD; + u32 bp_indaccess; + u32 PAD[3]; + + /* More clock dividers (corerev >= 32) */ + u32 clkdiv2; + u32 PAD[2]; + + /* In AI chips, pointer to erom */ + u32 eromptr; /* 0xfc */ + + /* ExtBus control registers (corerev >= 3) */ + u32 pcmcia_config; /* 0x100 */ + u32 pcmcia_memwait; + u32 pcmcia_attrwait; + u32 pcmcia_iowait; + u32 ide_config; + u32 ide_memwait; + u32 ide_attrwait; + u32 ide_iowait; + u32 prog_config; + u32 prog_waitcount; + u32 flash_config; + u32 flash_waitcount; + u32 SECI_config; /* 0x130 SECI configuration */ + u32 PAD[3]; + + /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */ + u32 eci_output; /* 0x140 */ + u32 eci_control; + u32 eci_inputlo; + u32 eci_inputmi; + u32 eci_inputhi; + u32 eci_inputintpolaritylo; + u32 eci_inputintpolaritymi; + u32 eci_inputintpolarityhi; + u32 eci_intmasklo; + u32 eci_intmaskmi; + u32 eci_intmaskhi; + u32 eci_eventlo; + u32 eci_eventmi; + u32 eci_eventhi; + u32 eci_eventmasklo; + u32 eci_eventmaskmi; + u32 eci_eventmaskhi; + u32 PAD[3]; + + /* SROM interface (corerev >= 32) */ + u32 sromcontrol; /* 0x190 */ + u32 sromaddress; + u32 sromdata; + u32 PAD[17]; + + /* Clock control and hardware workarounds (corerev >= 20) */ + u32 clk_ctl_st; /* 0x1e0 */ + u32 hw_war; + u32 PAD[70]; + + /* UARTs */ + u8 uart0data; /* 0x300 */ + u8 uart0imr; + u8 uart0fcr; + u8 uart0lcr; + u8 uart0mcr; + u8 uart0lsr; + u8 uart0msr; + u8 uart0scratch; + u8 PAD[248]; /* corerev >= 1 */ + + u8 uart1data; /* 0x400 */ + u8 uart1imr; + u8 uart1fcr; + u8 uart1lcr; + u8 uart1mcr; + u8 uart1lsr; + u8 uart1msr; + u8 uart1scratch; + u32 PAD[126]; + + /* PMU registers (corerev >= 20) */ + u32 pmucontrol; /* 0x600 */ + u32 pmucapabilities; + u32 pmustatus; + u32 res_state; + u32 res_pending; + u32 pmutimer; + u32 min_res_mask; + u32 max_res_mask; + u32 res_table_sel; + u32 res_dep_mask; + u32 res_updn_timer; + u32 res_timer; + u32 clkstretch; + u32 pmuwatchdog; + u32 gpiosel; /* 0x638, rev >= 1 */ + u32 gpioenable; /* 0x63c, rev >= 1 */ + u32 res_req_timer_sel; + u32 res_req_timer; + u32 res_req_mask; + u32 PAD; + u32 chipcontrol_addr; /* 0x650 */ + u32 chipcontrol_data; /* 0x654 */ + u32 regcontrol_addr; + u32 regcontrol_data; + u32 pllcontrol_addr; + u32 pllcontrol_data; + u32 pmustrapopt; /* 0x668, corerev >= 28 */ + u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */ + u32 PAD[100]; + u16 sromotp[768]; +} chipcregs_t; + +/* chipid */ +#define CID_ID_MASK 0x0000ffff /* Chip Id mask */ +#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ +#define CID_REV_SHIFT 16 /* Chip Revision shift */ +#define CID_PKG_MASK 0x00f00000 /* Package Option mask */ +#define CID_PKG_SHIFT 20 /* Package Option shift */ +#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */ +#define CID_CC_SHIFT 24 +#define CID_TYPE_MASK 0xf0000000 /* Chip Type */ +#define CID_TYPE_SHIFT 28 + +/* capabilities */ +#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */ +#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */ +#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */ +#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */ +#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */ +#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */ +#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */ +#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */ +#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */ +#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */ +#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */ +#define CC_CAP_PWR_CTL 0x00040000 /* Power control */ +#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */ +#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */ +#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */ +#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */ +#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */ +#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */ +#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */ +#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */ +#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */ + +#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */ +#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */ + +/* pmucapabilities */ +#define PCAP_REV_MASK 0x000000ff +#define PCAP_RC_MASK 0x00001f00 +#define PCAP_RC_SHIFT 8 +#define PCAP_TC_MASK 0x0001e000 +#define PCAP_TC_SHIFT 13 +#define PCAP_PC_MASK 0x001e0000 +#define PCAP_PC_SHIFT 17 +#define PCAP_VC_MASK 0x01e00000 +#define PCAP_VC_SHIFT 21 +#define PCAP_CC_MASK 0x1e000000 +#define PCAP_CC_SHIFT 25 +#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */ +#define PCAP5_PC_SHIFT 17 +#define PCAP5_VC_MASK 0x07c00000 +#define PCAP5_VC_SHIFT 22 +#define PCAP5_CC_MASK 0xf8000000 +#define PCAP5_CC_SHIFT 27 + +/* +* Maximum delay for the PMU state transition in us. +* This is an upper bound intended for spinwaits etc. +*/ +#define PMU_MAX_TRANSITION_DLY 15000 + +#endif /* _SBCHIPC_H */ diff --git a/drivers/staging/brcm80211/include/sbchipc.h b/drivers/staging/brcm80211/include/sbchipc.h deleted file mode 100644 index 9ca2e69..0000000 --- a/drivers/staging/brcm80211/include/sbchipc.h +++ /dev/null @@ -1,286 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBCHIPC_H -#define _SBCHIPC_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - u32 chipid; /* 0x0 */ - u32 capabilities; - u32 corecontrol; /* corerev >= 1 */ - u32 bist; - - /* OTP */ - u32 otpstatus; /* 0x10, corerev >= 10 */ - u32 otpcontrol; - u32 otpprog; - u32 otplayout; /* corerev >= 23 */ - - /* Interrupt control */ - u32 intstatus; /* 0x20 */ - u32 intmask; - - /* Chip specific regs */ - u32 chipcontrol; /* 0x28, rev >= 11 */ - u32 chipstatus; /* 0x2c, rev >= 11 */ - - /* Jtag Master */ - u32 jtagcmd; /* 0x30, rev >= 10 */ - u32 jtagir; - u32 jtagdr; - u32 jtagctrl; - - /* serial flash interface registers */ - u32 flashcontrol; /* 0x40 */ - u32 flashaddress; - u32 flashdata; - u32 PAD[1]; - - /* Silicon backplane configuration broadcast control */ - u32 broadcastaddress; /* 0x50 */ - u32 broadcastdata; - - /* gpio - cleared only by power-on-reset */ - u32 gpiopullup; /* 0x58, corerev >= 20 */ - u32 gpiopulldown; /* 0x5c, corerev >= 20 */ - u32 gpioin; /* 0x60 */ - u32 gpioout; /* 0x64 */ - u32 gpioouten; /* 0x68 */ - u32 gpiocontrol; /* 0x6C */ - u32 gpiointpolarity; /* 0x70 */ - u32 gpiointmask; /* 0x74 */ - - /* GPIO events corerev >= 11 */ - u32 gpioevent; - u32 gpioeventintmask; - - /* Watchdog timer */ - u32 watchdog; /* 0x80 */ - - /* GPIO events corerev >= 11 */ - u32 gpioeventintpolarity; - - /* GPIO based LED powersave registers corerev >= 16 */ - u32 gpiotimerval; /* 0x88 */ - u32 gpiotimeroutmask; - - /* clock control */ - u32 clockcontrol_n; /* 0x90 */ - u32 clockcontrol_sb; /* aka m0 */ - u32 clockcontrol_pci; /* aka m1 */ - u32 clockcontrol_m2; /* mii/uart/mipsref */ - u32 clockcontrol_m3; /* cpu */ - u32 clkdiv; /* corerev >= 3 */ - u32 gpiodebugsel; /* corerev >= 28 */ - u32 capabilities_ext; /* 0xac */ - - /* pll delay registers (corerev >= 4) */ - u32 pll_on_delay; /* 0xb0 */ - u32 fref_sel_delay; - u32 slow_clk_ctl; /* 5 < corerev < 10 */ - u32 PAD; - - /* Instaclock registers (corerev >= 10) */ - u32 system_clk_ctl; /* 0xc0 */ - u32 clkstatestretch; - u32 PAD[2]; - - /* Indirect backplane access (corerev >= 22) */ - u32 bp_addrlow; /* 0xd0 */ - u32 bp_addrhigh; - u32 bp_data; - u32 PAD; - u32 bp_indaccess; - u32 PAD[3]; - - /* More clock dividers (corerev >= 32) */ - u32 clkdiv2; - u32 PAD[2]; - - /* In AI chips, pointer to erom */ - u32 eromptr; /* 0xfc */ - - /* ExtBus control registers (corerev >= 3) */ - u32 pcmcia_config; /* 0x100 */ - u32 pcmcia_memwait; - u32 pcmcia_attrwait; - u32 pcmcia_iowait; - u32 ide_config; - u32 ide_memwait; - u32 ide_attrwait; - u32 ide_iowait; - u32 prog_config; - u32 prog_waitcount; - u32 flash_config; - u32 flash_waitcount; - u32 SECI_config; /* 0x130 SECI configuration */ - u32 PAD[3]; - - /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */ - u32 eci_output; /* 0x140 */ - u32 eci_control; - u32 eci_inputlo; - u32 eci_inputmi; - u32 eci_inputhi; - u32 eci_inputintpolaritylo; - u32 eci_inputintpolaritymi; - u32 eci_inputintpolarityhi; - u32 eci_intmasklo; - u32 eci_intmaskmi; - u32 eci_intmaskhi; - u32 eci_eventlo; - u32 eci_eventmi; - u32 eci_eventhi; - u32 eci_eventmasklo; - u32 eci_eventmaskmi; - u32 eci_eventmaskhi; - u32 PAD[3]; - - /* SROM interface (corerev >= 32) */ - u32 sromcontrol; /* 0x190 */ - u32 sromaddress; - u32 sromdata; - u32 PAD[17]; - - /* Clock control and hardware workarounds (corerev >= 20) */ - u32 clk_ctl_st; /* 0x1e0 */ - u32 hw_war; - u32 PAD[70]; - - /* UARTs */ - u8 uart0data; /* 0x300 */ - u8 uart0imr; - u8 uart0fcr; - u8 uart0lcr; - u8 uart0mcr; - u8 uart0lsr; - u8 uart0msr; - u8 uart0scratch; - u8 PAD[248]; /* corerev >= 1 */ - - u8 uart1data; /* 0x400 */ - u8 uart1imr; - u8 uart1fcr; - u8 uart1lcr; - u8 uart1mcr; - u8 uart1lsr; - u8 uart1msr; - u8 uart1scratch; - u32 PAD[126]; - - /* PMU registers (corerev >= 20) */ - u32 pmucontrol; /* 0x600 */ - u32 pmucapabilities; - u32 pmustatus; - u32 res_state; - u32 res_pending; - u32 pmutimer; - u32 min_res_mask; - u32 max_res_mask; - u32 res_table_sel; - u32 res_dep_mask; - u32 res_updn_timer; - u32 res_timer; - u32 clkstretch; - u32 pmuwatchdog; - u32 gpiosel; /* 0x638, rev >= 1 */ - u32 gpioenable; /* 0x63c, rev >= 1 */ - u32 res_req_timer_sel; - u32 res_req_timer; - u32 res_req_mask; - u32 PAD; - u32 chipcontrol_addr; /* 0x650 */ - u32 chipcontrol_data; /* 0x654 */ - u32 regcontrol_addr; - u32 regcontrol_data; - u32 pllcontrol_addr; - u32 pllcontrol_data; - u32 pmustrapopt; /* 0x668, corerev >= 28 */ - u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */ - u32 PAD[100]; - u16 sromotp[768]; -} chipcregs_t; - -/* chipid */ -#define CID_ID_MASK 0x0000ffff /* Chip Id mask */ -#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ -#define CID_REV_SHIFT 16 /* Chip Revision shift */ -#define CID_PKG_MASK 0x00f00000 /* Package Option mask */ -#define CID_PKG_SHIFT 20 /* Package Option shift */ -#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */ -#define CID_CC_SHIFT 24 -#define CID_TYPE_MASK 0xf0000000 /* Chip Type */ -#define CID_TYPE_SHIFT 28 - -/* capabilities */ -#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */ -#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */ -#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */ -#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */ -#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */ -#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */ -#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */ -#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */ -#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */ -#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */ -#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */ -#define CC_CAP_PWR_CTL 0x00040000 /* Power control */ -#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */ -#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */ -#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */ -#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */ -#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */ -#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */ -#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */ -#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */ -#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */ - -#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */ -#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */ - -/* pmucapabilities */ -#define PCAP_REV_MASK 0x000000ff -#define PCAP_RC_MASK 0x00001f00 -#define PCAP_RC_SHIFT 8 -#define PCAP_TC_MASK 0x0001e000 -#define PCAP_TC_SHIFT 13 -#define PCAP_PC_MASK 0x001e0000 -#define PCAP_PC_SHIFT 17 -#define PCAP_VC_MASK 0x01e00000 -#define PCAP_VC_SHIFT 21 -#define PCAP_CC_MASK 0x1e000000 -#define PCAP_CC_SHIFT 25 -#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */ -#define PCAP5_PC_SHIFT 17 -#define PCAP5_VC_MASK 0x07c00000 -#define PCAP5_VC_SHIFT 22 -#define PCAP5_CC_MASK 0xf8000000 -#define PCAP5_CC_SHIFT 27 - -/* -* Maximum delay for the PMU state transition in us. -* This is an upper bound intended for spinwaits etc. -*/ -#define PMU_MAX_TRANSITION_DLY 15000 - -#endif /* _SBCHIPC_H */ diff --git a/drivers/staging/brcm80211/include/sbconfig.h b/drivers/staging/brcm80211/include/sbconfig.h deleted file mode 100644 index 68e4b54..0000000 --- a/drivers/staging/brcm80211/include/sbconfig.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBCONFIG_H -#define _SBCONFIG_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* - * Sonics Configuration Space Registers. - */ -#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ - -#endif /* _SBCONFIG_H */ -- cgit v0.10.2 From d33fcc301da63433593ca55228ad327ac0114b79 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:31 +0200 Subject: staging: brcm80211: moved sbdma.h into brcmsmac/bcmdma.h Code cleanup. Removed fullmac dependencies on this file. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 5b1b4c2..fca15e8 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -132,7 +132,6 @@ typedef struct { #endif /* DHD_DEBUG */ #include -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h index 76266db..cc64b2f 100644 --- a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h +++ b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h @@ -24,55 +24,6 @@ #define PAD _XSTR(__LINE__) #endif /* PAD */ -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 addr; /* descriptor ring base address (4K aligned) */ - u32 ptr; /* last descriptor posted to chip */ - u32 status; /* current active descriptor, et al */ -} dma32regs_t; - -typedef volatile struct { - dma32regs_t xmt; /* dma tx channel */ - dma32regs_t rcv; /* dma rx channel */ -} dma32regp_t; - -typedef volatile struct { - dma64regs_t xmt; /* dma tx */ - u32 PAD[2]; - dma64regs_t rcv; /* dma rx */ - u32 PAD[2]; -} dma64p_t; - - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma64diag_t; - -/* dma64 sdiod corerev >= 1 */ -typedef volatile struct { - dma64p_t dma64regs[2]; - dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ - u32 PAD[92]; -} sdiodma64_t; - -/* dma32 sdiod corerev == 0 */ -typedef volatile struct { - dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ - u32 PAD[108]; -} sdiodma32_t; - -/* dma32 regs for pcmcia core */ -typedef volatile struct { - dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ - u32 PAD[116]; -} pcmdma32_t; - /* core registers */ typedef volatile struct { u32 corecontrol; /* CoreControl, 0x000, rev8 */ @@ -133,13 +84,7 @@ typedef volatile struct { u32 PAD[40]; u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ u32 PAD[7]; - - /* DMA engines */ - volatile union { - pcmdma32_t pcm32; - sdiodma32_t sdiod32; - sdiodma64_t sdiod64; - } dma; + u32 PAD[128]; /* DMA engines */ /* SDIO/PCMCIA CIS region */ char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index 005410d..1a1ca03 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -17,11 +17,40 @@ #ifndef _bcmdma_h_ #define _bcmdma_h_ +#include "wlc_types.h" /* forward structure declarations */ + #ifndef _dma_pub_ #define _dma_pub_ struct dma_pub; #endif /* _dma_pub_ */ +/* DMA structure: + * support two DMA engines: 32 bits address or 64 bit addressing + * basic DMA register set is per channel(transmit or receive) + * a pair of channels is defined for convenience + */ + +/* 32 bits addressing */ + +typedef volatile struct { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +} dma32diag_t; + +/* 64 bits addressing */ + +/* dma registers per channel(xmt or rcv) */ +typedef volatile struct { + u32 control; /* enable, et al */ + u32 ptr; /* last descriptor posted to chip */ + u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ + u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ + u32 status0; /* current descriptor, xmt state */ + u32 status1; /* active descriptor, xmt error */ +} dma64regs_t; + /* map/unmap direction */ #define DMA_TX 1 /* TX direction for DMA */ #define DMA_RX 2 /* RX direction for DMA */ diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 7d666c6..d50395d 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -25,7 +25,7 @@ #include #include "wlc_types.h" -#include +#include "bcmdma.h" #include #if defined(__mips__) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index d54e264..8045c39 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include "bcmdma.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c index b5ec9ae..1011ca5 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c @@ -25,7 +25,7 @@ #include #include -#include +#include "bcmdma.h" #include "wlc_phy_radio.h" #include "wlc_phy_int.h" diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c index bc362f3..da2afbb 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c @@ -25,7 +25,7 @@ #include #include -#include +#include "bcmdma.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c index e9d8661..679002e 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c @@ -15,7 +15,7 @@ */ #include -#include +#include "bcmdma.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c index e4a15c4..ad41a19 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c @@ -16,7 +16,7 @@ #include -#include +#include "bcmdma.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index ee026d3..0f4a1cc 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "phy/wlc_phy_int.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 8a4875d..218210a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "d11.h" #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 53ca0ff..0c325c7 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include "bcmdma.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index d26a520..fba9eaf 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "d11.h" #include "wlc_rate.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 0f876a7..6bc547a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index 0b980ac..cd37971 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 18a5463..3e34b31 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include "bcmdma.h" #include #include "wlc_pmu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index b97fa3e..6689691 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -29,8 +29,7 @@ #include #include #include -#include -#include +#include "bcmdma.h" #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index 53dcf24..d6eae1f 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index a08db2e..8fb90d4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include "bcmdma.h" #include "wlc_types.h" #include "d11.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 76a1348..5cca063 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -34,6 +34,7 @@ #define MAX_DMA_SEGS 4 /* forward declarations */ +struct sk_buff; struct wl_info; struct wlc_info; struct wlc_hw_info; @@ -45,5 +46,7 @@ struct bmac_pmq; struct d11init; struct dma_pub; struct wlc_bsscfg; +struct bcmstrbuf; +struct si_pub; #endif /* _wlc_types_h_ */ diff --git a/drivers/staging/brcm80211/include/sbdma.h b/drivers/staging/brcm80211/include/sbdma.h deleted file mode 100644 index 9814a0c..0000000 --- a/drivers/staging/brcm80211/include/sbdma.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbdma_h_ -#define _sbdma_h_ - -/* DMA structure: - * support two DMA engines: 32 bits address or 64 bit addressing - * basic DMA register set is per channel(transmit or receive) - * a pair of channels is defined for convenience - */ - -/* 32 bits addressing */ - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma32diag_t; - -/* 64 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 ptr; /* last descriptor posted to chip */ - u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ - u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ - u32 status0; /* current descriptor, xmt state */ - u32 status1; /* active descriptor, xmt error */ -} dma64regs_t; - -#endif /* _sbdma_h_ */ -- cgit v0.10.2 From 1f7a0c7c00936db0740f368034815e52248e1864 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:32 +0200 Subject: staging: brcm80211: macro cleanup Code cleanup. Replaced bcopy() by memcpy(). Removed redundant PAD macro definitions. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index fca15e8..739745b 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -61,8 +61,6 @@ #define TRAP_T_SIZE 80 -#ifndef _LANGUAGE_ASSEMBLY - typedef struct _trap_struct { u32 type; u32 epc; @@ -86,8 +84,6 @@ typedef struct _trap_struct { u32 pc; } trap_t; -#endif /* !_LANGUAGE_ASSEMBLY */ - #define CBUF_LEN (128) #define LOG_BUF_LEN 1024 @@ -448,8 +444,6 @@ typedef struct dhd_bus { bool ctrl_frame_stat; } dhd_bus_t; -#ifndef _LANGUAGE_ASSEMBLY - typedef volatile struct _sbconfig { u32 PAD[2]; u32 sbipsflag; /* initiator port ocp slave flag */ @@ -490,8 +484,6 @@ typedef volatile struct _sbconfig { u32 sbidhigh; /* identification */ } sbconfig_t; -#endif /* _LANGUAGE_ASSEMBLY */ - /* clkstate */ #define CLK_NONE 0 #define CLK_SDONLY 1 diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h index cc64b2f..3799d50 100644 --- a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h +++ b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h @@ -17,13 +17,6 @@ #ifndef _sbsdpcmdev_h_ #define _sbsdpcmdev_h_ -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - /* core registers */ typedef volatile struct { u32 corecontrol; /* CoreControl, 0x000, rev8 */ diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 2de6cfb..d57908b 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -1082,7 +1082,7 @@ void ai_detach(struct si_pub *sih) uint idx; struct si_pub *si_local = NULL; - bcopy(&sih, &si_local, sizeof(struct si_pub **)); + memcpy(&si_local, &sih, sizeof(struct si_pub **)); sii = SI_INFO(sih); diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index 53d2e02..ec7acd1 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -17,13 +17,6 @@ #ifndef _aiutils_h_ #define _aiutils_h_ -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - /* Include the soci specific files */ #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmnvram.h b/drivers/staging/brcm80211/brcmsmac/bcmnvram.h index 12645dd..bc62695 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmnvram.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmnvram.h @@ -17,8 +17,6 @@ #ifndef _bcmnvram_h_ #define _bcmnvram_h_ -#ifndef _LANGUAGE_ASSEMBLY - #include struct nvram_header { @@ -128,8 +126,6 @@ extern int nvram_commit(void); */ extern int nvram_getall(char *nvram_buf, int count); -#endif /* _LANGUAGE_ASSEMBLY */ - /* variable access */ extern char *getvar(char *vars, const char *name); extern int getintvar(char *vars, const char *name); diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index d1babcd..12a0ead 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -19,13 +19,6 @@ #include -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - #define BCN_TMPL_LEN 512 /* length of the BCN template area */ /* RX FIFO numbers */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 6b9cb6b..8a956f5 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -117,13 +117,6 @@ /* PCIE protocol TLP diagnostic registers */ #define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - /* Sonics side: PCI core and host control registers */ struct sbpciregs { u32 control; /* PCI control */ diff --git a/drivers/staging/brcm80211/include/aidmp.h b/drivers/staging/brcm80211/include/aidmp.h index 7e0ce8f..2c10177 100644 --- a/drivers/staging/brcm80211/include/aidmp.h +++ b/drivers/staging/brcm80211/include/aidmp.h @@ -17,6 +17,8 @@ #ifndef _AIDMP_H #define _AIDMP_H +#include "bcmdefs.h" /* for PAD macro */ + /* Manufacturer Ids */ #define MFGID_ARM 0x43b #define MFGID_BRCM 0x4bf @@ -100,8 +102,6 @@ #define SD_SG32 0x00000008 #define SD_SZ_ALIGN 0x00000fff -#ifndef _LANGUAGE_ASSEMBLY - typedef volatile struct _aidmp { u32 oobselina30; /* 0x000 */ u32 oobselina74; /* 0x004 */ @@ -220,8 +220,6 @@ typedef volatile struct _aidmp { u32 componentid3; /* 0xffc */ } aidmp_t; -#endif /* _LANGUAGE_ASSEMBLY */ - /* Out-of-band Router registers */ #define OOB_BUSCONFIG 0x020 #define OOB_STATUSA 0x100 diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h index d7f531e..1a1c8ad 100644 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ b/drivers/staging/brcm80211/include/bcmutils.h @@ -272,8 +272,6 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); #include /* for vsn/printf's */ #include /* for mem*, str* */ #endif -/* bcopy's: Linux kernel doesn't provide these (anymore) */ -#define bcopy(src, dst, len) memcpy((dst), (src), (len)) /* register access macros */ #ifndef __BIG_ENDIAN diff --git a/drivers/staging/brcm80211/include/chipcommon.h b/drivers/staging/brcm80211/include/chipcommon.h index 9ca2e69..ee1130f 100644 --- a/drivers/staging/brcm80211/include/chipcommon.h +++ b/drivers/staging/brcm80211/include/chipcommon.h @@ -17,12 +17,7 @@ #ifndef _SBCHIPC_H #define _SBCHIPC_H -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ +#include "bcmdefs.h" /* for PAD macro */ typedef volatile struct { u32 chipid; /* 0x0 */ -- cgit v0.10.2 From ac9e1c0e695fc3273b3381debcdc35792eb379f0 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:33 +0200 Subject: staging: brcm80211: remove phy_version.h Removed the file phy_version.h from the driver sources. It was not used. For keeping track of the phy version, which is a separately developed component, one definition has been kept and placed in wlc_phy_int.h. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h deleted file mode 100644 index 51a2238..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef phy_version_h_ -#define phy_version_h_ - -#define PHY_MAJOR_VERSION 1 - -#define PHY_MINOR_VERSION 82 - -#define PHY_RC_NUMBER 8 - -#define PHY_INCREMENTAL_NUMBER 0 - -#define PHY_BUILD_NUMBER 0 - -#define PHY_VERSION { 1, 82, 8, 0 } - -#define PHY_VERSION_NUM 0x01520800 - -#define PHY_VERSION_STR "1.82.8.0" - -#endif /* phy_version_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 51e37aa..92064ba 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -23,6 +23,8 @@ #include +#define PHY_VERSION { 1, 82, 8, 0 } + #define PHYHAL_ERROR 0x0001 #define PHYHAL_TRACE 0x0002 #define PHYHAL_INFORM 0x0004 diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 0f4a1cc..6856a60 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -36,7 +36,6 @@ #include "d11.h" #include "wlc_types.h" #include "wlc_cfg.h" -#include "phy/phy_version.h" #include "wlc_key.h" #include "wlc_channel.h" #include "wlc_scb.h" -- cgit v0.10.2 From a4181fb7ef6f735b43044616c4efdc98ab779951 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:34 +0200 Subject: staging: brcm80211: remove BCMEMBEDIMAGE related codes from fullmac Remove BCMEMBEDIMAGE related codes in fullmac driver as we don't need this in firmware download routine. Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 739745b..70a1fc3 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -22,10 +22,6 @@ #include #include -#ifdef BCMEMBEDIMAGE -#include BCMEMBEDIMAGE -#endif /* BCMEMBEDIMAGE */ - #include #include #include @@ -634,9 +630,6 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus); static int dhdsdio_download_code_file(struct dhd_bus *bus, char *image_path); static int dhdsdio_download_nvram(struct dhd_bus *bus); -#ifdef BCMEMBEDIMAGE -static int dhdsdio_download_code_array(struct dhd_bus *bus); -#endif static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase); static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs); static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase); @@ -5588,97 +5581,6 @@ void dhd_bus_unregister(void) bcmsdh_unregister(); } -#ifdef BCMEMBEDIMAGE -static int dhdsdio_download_code_array(struct dhd_bus *bus) -{ - int bcmerror = -1; - int offset = 0; - - DHD_INFO(("%s: download embedded firmware...\n", __func__)); - - /* Download image */ - while ((offset + MEMBLOCK) < sizeof(dlarray)) { - bcmerror = - dhdsdio_membytes(bus, true, offset, dlarray + offset, - MEMBLOCK); - if (bcmerror) { - DHD_ERROR(("%s: error %d on writing %d membytes at " - "0x%08x\n", - __func__, bcmerror, MEMBLOCK, offset)); - goto err; - } - - offset += MEMBLOCK; - } - - if (offset < sizeof(dlarray)) { - bcmerror = dhdsdio_membytes(bus, true, offset, - dlarray + offset, - sizeof(dlarray) - offset); - if (bcmerror) { - DHD_ERROR(("%s: error %d on writing %d membytes at " - "0x%08x\n", __func__, bcmerror, - sizeof(dlarray) - offset, offset)); - goto err; - } - } -#ifdef DHD_DEBUG - /* Upload and compare the downloaded code */ - { - unsigned char *ularray; - - ularray = kmalloc(bus->ramsize, GFP_ATOMIC); - if (!ularray) { - bcmerror = -ENOMEM; - goto err; - } - /* Upload image to verify downloaded contents. */ - offset = 0; - memset(ularray, 0xaa, bus->ramsize); - while ((offset + MEMBLOCK) < sizeof(dlarray)) { - bcmerror = - dhdsdio_membytes(bus, false, offset, - ularray + offset, MEMBLOCK); - if (bcmerror) { - DHD_ERROR(("%s: error %d on reading %d membytes" - " at 0x%08x\n", - __func__, bcmerror, MEMBLOCK, offset)); - goto free; - } - - offset += MEMBLOCK; - } - - if (offset < sizeof(dlarray)) { - bcmerror = dhdsdio_membytes(bus, false, offset, - ularray + offset, - sizeof(dlarray) - offset); - if (bcmerror) { - DHD_ERROR(("%s: error %d on reading %d membytes at 0x%08x\n", - __func__, bcmerror, - sizeof(dlarray) - offset, offset)); - goto free; - } - } - - if (memcmp(dlarray, ularray, sizeof(dlarray))) { - DHD_ERROR(("%s: Downloaded image is corrupted.\n", - __func__)); - ASSERT(0); - goto free; - } else - DHD_ERROR(("%s: Download/Upload/Compare succeeded.\n", - __func__)); -free: - kfree(ularray); - } -#endif /* DHD_DEBUG */ - -err: - return bcmerror; -} -#endif /* BCMEMBEDIMAGE */ - static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path) { int bcmerror = -1; @@ -5872,13 +5774,8 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus) bool dlok = false; /* download firmware succeeded */ /* Out immediately if no image to download */ - if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) { -#ifdef BCMEMBEDIMAGE - embed = true; -#else + if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) return bcmerror; -#endif - } /* Keep arm in reset */ if (dhdsdio_download_state(bus, true)) { @@ -5891,27 +5788,12 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus) if (dhdsdio_download_code_file(bus, bus->fw_path)) { DHD_ERROR(("%s: dongle image file download failed\n", __func__)); -#ifdef BCMEMBEDIMAGE - embed = true; -#else goto err; -#endif } else { embed = false; dlok = true; } } -#ifdef BCMEMBEDIMAGE - if (embed) { - if (dhdsdio_download_code_array(bus)) { - DHD_ERROR(("%s: dongle image array download failed\n", - __func__)); - goto err; - } else { - dlok = true; - } - } -#endif if (!dlok) { DHD_ERROR(("%s: dongle image download failed\n", __func__)); goto err; -- cgit v0.10.2 From 4bccf92c5a815137cbd7ec2ca7d02833f153d640 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:35 +0200 Subject: staging: brcm80211: absorb bcmcdc.h into dhd_cdc.c Merge bcmcdc.h into dhd_cdc.c in fullmac as it's only used by dhd_cdc.c Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h b/drivers/staging/brcm80211/brcmfmac/bcmcdc.h deleted file mode 100644 index ed4c4a5..0000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include - -typedef struct cdc_ioctl { - u32 cmd; /* ioctl command value */ - u32 len; /* lower 16: output buflen; upper 16: - input buflen (excludes header) */ - u32 flags; /* flag defns given below */ - u32 status; /* status code returned from the device */ -} cdc_ioctl_t; - -/* Max valid buffer size that can be sent to the dongle */ -#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN) - -/* len field is divided into input and output buffer lengths */ -#define CDCL_IOC_OUTLEN_MASK 0x0000FFFF /* maximum or expected - response length, */ - /* excluding IOCTL header */ -#define CDCL_IOC_OUTLEN_SHIFT 0 -#define CDCL_IOC_INLEN_MASK 0xFFFF0000 /* input buffer length, - excluding IOCTL header */ -#define CDCL_IOC_INLEN_SHIFT 16 - -/* CDC flag definitions */ -#define CDCF_IOC_ERROR 0x01 /* 0=success, 1=ioctl cmd failed */ -#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */ -#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */ -#define CDCF_IOC_IF_SHIFT 12 -#define CDCF_IOC_ID_MASK 0xFFFF0000 /* used to uniquely id an ioctl - req/resp pairing */ -#define CDCF_IOC_ID_SHIFT 16 /* # of bits of shift for ID Mask */ - -#define CDC_IOC_IF_IDX(flags) \ - (((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT) -#define CDC_IOC_ID(flags) \ - (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) - -#define CDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)) -#define CDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \ - ((idx) << CDCF_IOC_IF_SHIFT))) - -/* - * BDC header - * - * The BDC header is used on data packets to convey priority across USB. - */ - -#define BDC_HEADER_LEN 4 - -#define BDC_PROTO_VER 1 /* Protocol version */ - -#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */ -#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */ - -#define BDC_FLAG__UNUSED 0x03 /* Unassigned */ -#define BDC_FLAG_SUM_GOOD 0x04 /* Dongle has verified good - RX checksums */ -#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */ - -#define BDC_PRIORITY_MASK 0x7 - -#define BDC_FLAG2_FC_FLAG 0x10 /* flag to indicate if pkt contains */ - /* FLOW CONTROL info only */ -#define BDC_PRIORITY_FC_SHIFT 4 /* flow control info shift */ - -#define BDC_FLAG2_IF_MASK 0x0f /* APSTA: interface on which the - packet was received */ -#define BDC_FLAG2_IF_SHIFT 0 - -#define BDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) -#define BDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \ - ((idx) << BDC_FLAG2_IF_SHIFT))) - -struct bdc_header { - u8 flags; /* Flags */ - u8 priority; /* 802.1d Priority 0:2 bits, 4:7 flow - control info for usb */ - u8 flags2; - u8 rssi; -}; diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index ba5a5cb..424eacb 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -19,13 +19,65 @@ #include #include -#include #include #include #include #include #include + +struct cdc_ioctl { + u32 cmd; /* ioctl command value */ + u32 len; /* lower 16: output buflen; + * upper 16: input buflen (excludes header) */ + u32 flags; /* flag defns given below */ + u32 status; /* status code returned from the device */ +}; + +/* Max valid buffer size that can be sent to the dongle */ +#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN) + +/* CDC flag definitions */ +#define CDCF_IOC_ERROR 0x01 /* 1=ioctl cmd failed */ +#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */ +#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */ +#define CDCF_IOC_IF_SHIFT 12 +#define CDCF_IOC_ID_MASK 0xFFFF0000 /* id an ioctl pairing */ +#define CDCF_IOC_ID_SHIFT 16 /* ID Mask shift bits */ +#define CDC_IOC_ID(flags) \ + (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) +#define CDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \ + ((idx) << CDCF_IOC_IF_SHIFT))) + +/* + * BDC header + * Used on data packets to convey priority across USB. + */ +#define BDC_HEADER_LEN 4 +#define BDC_PROTO_VER 1 /* Protocol version */ +#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */ +#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */ +#define BDC_FLAG_SUM_GOOD 0x04 /* Good RX checksums */ +#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */ +#define BDC_PRIORITY_MASK 0x7 +#define BDC_FLAG2_IF_MASK 0x0f /* packet rx interface in APSTA */ +#define BDC_FLAG2_IF_SHIFT 0 + +#define BDC_GET_IF_IDX(hdr) \ + ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) +#define BDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \ + ((idx) << BDC_FLAG2_IF_SHIFT))) + +struct bdc_header { + u8 flags; + u8 priority; /* 802.1d Priority, 4:7 flow control info for usb */ + u8 flags2; + u8 rssi; +}; + + #ifdef CUSTOMER_HW2 int wifi_get_mac_addr(unsigned char *buf); #endif @@ -56,14 +108,14 @@ typedef struct dhd_prot { u8 pending; u32 lastcmd; u8 bus_header[BUS_HEADER_LEN]; - cdc_ioctl_t msg; + struct cdc_ioctl msg; unsigned char buf[WLC_IOCTL_MAXLEN + ROUND_UP_MARGIN]; } dhd_prot_t; static int dhdcdc_msg(dhd_pub_t *dhd) { dhd_prot_t *prot = dhd->prot; - int len = le32_to_cpu(prot->msg.len) + sizeof(cdc_ioctl_t); + int len = le32_to_cpu(prot->msg.len) + sizeof(struct cdc_ioctl); DHD_TRACE(("%s: Enter\n", __func__)); @@ -88,7 +140,7 @@ static int dhdcdc_cmplt(dhd_pub_t *dhd, u32 id, u32 len) do { ret = dhd_bus_rxctl(dhd->bus, (unsigned char *)&prot->msg, - len + sizeof(cdc_ioctl_t)); + len + sizeof(struct cdc_ioctl)); if (ret < 0) break; } while (CDC_IOC_ID(le32_to_cpu(prot->msg.flags)) != id); @@ -100,7 +152,7 @@ int dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) { dhd_prot_t *prot = dhd->prot; - cdc_ioctl_t *msg = &prot->msg; + struct cdc_ioctl *msg = &prot->msg; void *info; int ret = 0, retries = 0; u32 id, flags = 0; @@ -120,7 +172,7 @@ dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) } } - memset(msg, 0, sizeof(cdc_ioctl_t)); + memset(msg, 0, sizeof(struct cdc_ioctl)); msg->cmd = cpu_to_le32(cmd); msg->len = cpu_to_le32(len); @@ -180,14 +232,14 @@ done: int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) { dhd_prot_t *prot = dhd->prot; - cdc_ioctl_t *msg = &prot->msg; + struct cdc_ioctl *msg = &prot->msg; int ret = 0; u32 flags, id; DHD_TRACE(("%s: Enter\n", __func__)); DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len)); - memset(msg, 0, sizeof(cdc_ioctl_t)); + memset(msg, 0, sizeof(struct cdc_ioctl)); msg->cmd = cpu_to_le32(cmd); msg->len = cpu_to_le32(len); @@ -266,14 +318,14 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len) else { ret = dhdcdc_query_ioctl(dhd, ifidx, ioc->cmd, buf, len); if (ret > 0) - ioc->used = ret - sizeof(cdc_ioctl_t); + ioc->used = ret - sizeof(struct cdc_ioctl); } /* Too many programs assume ioctl() returns 0 on success */ if (ret >= 0) ret = 0; else { - cdc_ioctl_t *msg = &prot->msg; + struct cdc_ioctl *msg = &prot->msg; /* len == needed when set/query fails from dongle */ ioc->needed = le32_to_cpu(msg->len); } @@ -411,7 +463,8 @@ int dhd_prot_attach(dhd_pub_t *dhd) #ifdef BDC dhd->hdrlen += BDC_HEADER_LEN; #endif - dhd->maxctl = WLC_IOCTL_MAXLEN + sizeof(cdc_ioctl_t) + ROUND_UP_MARGIN; + dhd->maxctl = + WLC_IOCTL_MAXLEN + sizeof(struct cdc_ioctl) + ROUND_UP_MARGIN; return 0; fail: -- cgit v0.10.2 From 7c6100ee08c1583e771a7ce19408273eafb31583 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:36 +0200 Subject: staging: brcm80211: clean up dhd.h in fullmac Remove #include lines in dhd.h Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index e11c615..b8af4ed 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -18,9 +18,11 @@ #include #include #include +#include #include #include #include +#include #include #include /* BRCM API for SDIO diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index d441500..c0b9330 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -23,16 +23,16 @@ #include #include #include +#include #include #include #include +#include #if defined(OOB_INTR_ONLY) #include extern void dhdsdio_isr(void *args); -#include -#include #endif /* defined(OOB_INTR_ONLY) */ #if defined(CONFIG_MACH_SANDGATE2G) || defined(CONFIG_MACH_LOGICPD_PXA270) #if !defined(BCMPLATFORM_BUS) diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index cc4738a..067404b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include /* SDIO Device and Protocol Specs */ #include /* SDIO Host Controller Specification */ #include /* bcmsdh to/from specific controller APIs */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index 2792a4d..196b15e 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -18,6 +18,7 @@ #include #include #include +#include #include /* SDIO Specs */ #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index 081cda0..1fc5202 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -21,23 +21,6 @@ #ifndef _dhd_h_ #define _dhd_h_ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "bcmdefs.h" -/* The kernel threading is sdio-specific */ -#include "bcmwifi.h" - /* Forward decls */ struct dhd_bus; struct dhd_prot; diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index 424eacb..f655322 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -16,9 +16,11 @@ #include #include +#include #include #include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 85d87db..79df125 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -15,8 +15,11 @@ */ #include #include +#include #include +#include #include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c index abd41e3..a3ea415 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c @@ -15,7 +15,10 @@ */ #include +#include #include +#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index f356c56..b023fc8 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 70a1fc3..38a3e17 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -19,10 +19,13 @@ #include #include #include +#include +#include #include #include #include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 88144d4..763ccde 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -16,8 +16,11 @@ #include #include +#include #include +#include +#include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 9819a35..da052e7e 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -18,8 +18,10 @@ #include #include #include +#include #include +#include #include #include -- cgit v0.10.2 From b49b14d2e37deb99064bef7f010d02566cf8adec Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:37 +0200 Subject: staging: brcm80211: absorb bcmsdpcm.h in fullmac Absorb bcmsdpcm.h into dhd_sdio.c Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h b/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h deleted file mode 100644 index 21d6a3a..0000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdpcm.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsdpcm_h_ -#define _bcmsdpcm_h_ - -/* - * Software allocation of To SB Mailbox resources - */ - -/* intstatus bits */ -#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ -#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ -#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ -#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ - -#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) - -/* tosbmailbox bits corresponding to intstatus bits */ -#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ -#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ -#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ -#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ -#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ - -/* tosbmailboxdata */ -#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ -#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ - -/* - * Software allocation of To Host Mailbox resources - */ - -/* intstatus bits */ -#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ -#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ -#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ -#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ - -#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) - -/* tohostmailbox bits corresponding to intstatus bits */ -#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ -#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ -#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ -#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ -#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ - -/* tohostmailboxdata */ -#define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */ -#define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */ -#define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */ -#define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */ - -#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ -#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ - -#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ -#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ - -/* - * Software-defined protocol header - */ - -/* Current protocol version */ -#define SDPCM_PROT_VERSION 4 - -/* SW frame header */ -#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ -#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */ - -#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ -#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ -#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */ - -#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ -#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ -#define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ - -/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ -#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ -#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ -#define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ -#define SDPCM_NEXTLEN_OFFSET 2 - -/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ -#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ -#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) -#define SDPCM_DOFFSET_MASK 0xff000000 -#define SDPCM_DOFFSET_SHIFT 24 - -#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ -#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) -#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ -#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) -#define SDPCM_VERSION_OFFSET 6 /* Version # */ -#define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) -#define SDPCM_UNUSED_OFFSET 7 /* Spare */ -#define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) - -#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ - -/* logical channel numbers */ -#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ -#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ -#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ -#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ -#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ -#define SDPCM_MAX_CHANNEL 15 - -#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ - -#define SDPCM_FLAG_RESVD0 0x01 -#define SDPCM_FLAG_RESVD1 0x02 -#define SDPCM_FLAG_GSPI_TXENAB 0x04 -#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ - -/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ -#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) - -#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) - -/* For TEST_CHANNEL packets, define another 4-byte header */ -#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); - * Semantics of Ext byte depend on command. - * Len is current or requested frame length, not - * including test header; sent little-endian. - */ -#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ -#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ -#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ -#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ -#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ - -/* Handy macro for filling in datagen packets with a pattern */ -#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) - -/* - * Software counters (first part matches hardware counters) - */ - -typedef volatile struct { - u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ - u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ - u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ - u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ - u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ - u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ - u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ - u32 rxdescuflo; /* receive descriptor underflows */ - u32 rxfifooflo; /* receive fifo overflows */ - u32 txfifouflo; /* transmit fifo underflows */ - u32 runt; /* runt (too short) frames recv'd from bus */ - u32 badlen; /* frame's rxh len does not match its hw tag len */ - u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ - u32 seqbreak; /* break in sequence # space from one rx frame to the next */ - u32 rxfcrc; /* frame rx header indicates crc error */ - u32 rxfwoos; /* frame rx header indicates write out of sync */ - u32 rxfwft; /* frame rx header indicates write frame termination */ - u32 rxfabort; /* frame rx header indicates frame aborted */ - u32 woosint; /* write out of sync interrupt */ - u32 roosint; /* read out of sync interrupt */ - u32 rftermint; /* read frame terminate interrupt */ - u32 wftermint; /* write frame terminate interrupt */ -} sdpcmd_cnt_t; - -/* - * Shared structure between dongle and the host. - * The structure contains pointers to trap or assert information. - */ -#define SDPCM_SHARED_VERSION 0x0002 -#define SDPCM_SHARED_VERSION_MASK 0x00FF -#define SDPCM_SHARED_ASSERT_BUILT 0x0100 -#define SDPCM_SHARED_ASSERT 0x0200 -#define SDPCM_SHARED_TRAP 0x0400 - -typedef struct { - u32 flags; - u32 trap_addr; - u32 assert_exp_addr; - u32 assert_file_addr; - u32 assert_line; - u32 console_addr; /* Address of rte_cons_t */ - u32 msgtrace_addr; - u8 tag[32]; -} sdpcm_shared_t; - -extern sdpcm_shared_t sdpcm_shared; - -#endif /* _bcmsdpcm_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 38a3e17..094cf58 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -131,7 +131,6 @@ typedef struct { #include #include #include -#include #include #include @@ -193,6 +192,114 @@ typedef struct { #define SDPCM_RESERVE (SDPCM_HDRLEN + DHD_SDALIGN) #endif +/* + * Software allocation of To SB Mailbox resources + */ + +/* tosbmailbox bits corresponding to intstatus bits */ +#define SMB_NAK (1 << 0) /* Frame NAK */ +#define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */ +#define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */ +#define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */ + +/* tosbmailboxdata */ +#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */ + +/* + * Software allocation of To Host Mailbox resources + */ + +/* intstatus bits */ +#define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */ +#define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */ +#define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */ +#define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */ + +/* tohostmailboxdata */ +#define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */ +#define HMB_DATA_DEVREADY 2 /* talk to host after enable */ +#define HMB_DATA_FC 4 /* per prio flowcontrol update flag */ +#define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */ + +#define HMB_DATA_FCDATA_MASK 0xff000000 +#define HMB_DATA_FCDATA_SHIFT 24 + +#define HMB_DATA_VERSION_MASK 0x00ff0000 +#define HMB_DATA_VERSION_SHIFT 16 + +/* + * Software-defined protocol header + */ + +/* Current protocol version */ +#define SDPCM_PROT_VERSION 4 + +/* SW frame header */ +#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) + +#define SDPCM_CHANNEL_MASK 0x00000f00 +#define SDPCM_CHANNEL_SHIFT 8 +#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) + +#define SDPCM_NEXTLEN_OFFSET 2 + +/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ +#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ +#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) +#define SDPCM_DOFFSET_MASK 0xff000000 +#define SDPCM_DOFFSET_SHIFT 24 +#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ +#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) +#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ +#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) + +#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ + +/* logical channel numbers */ +#define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */ +#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ +#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ +#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */ +#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ + +#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */ + +#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) + +/* For TEST_CHANNEL packets, define another 4-byte header */ +#define SDPCM_TEST_HDRLEN 4 /* + * Generally: Cmd(1), Ext(1), Len(2); + * Semantics of Ext byte depend on + * command. Len is current or requested + * frame length, not including test + * header; sent little-endian. + */ +#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */ +#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */ +#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */ +#define SDPCM_TEST_BURST 0x04 /* + * Receiver to send a burst. + * Ext is a frame count + */ +#define SDPCM_TEST_SEND 0x05 /* + * Receiver sets send mode. + * Ext is boolean on/off + */ + +/* Handy macro for filling in datagen packets with a pattern */ +#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) + +/* + * Shared structure between dongle and the host. + * The structure contains pointers to trap or assert information. + */ +#define SDPCM_SHARED_VERSION 0x0002 +#define SDPCM_SHARED_VERSION_MASK 0x00FF +#define SDPCM_SHARED_ASSERT_BUILT 0x0100 +#define SDPCM_SHARED_ASSERT 0x0200 +#define SDPCM_SHARED_TRAP 0x0400 + + /* Space for header read, limit for data packets */ #ifndef MAX_HDR_READ #define MAX_HDR_READ 32 @@ -289,6 +396,18 @@ typedef struct dhd_console { } dhd_console_t; #endif /* DHD_DEBUG */ +struct sdpcm_shared { + u32 flags; + u32 trap_addr; + u32 assert_exp_addr; + u32 assert_file_addr; + u32 assert_line; + u32 console_addr; /* Address of rte_cons_t */ + u32 msgtrace_addr; + u8 tag[32]; +}; + + /* misc chip info needed by some of the routines */ struct chip_info { u32 chip; @@ -1876,7 +1995,7 @@ xfer_done: } #ifdef DHD_DEBUG -static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh) +static int dhdsdio_readshared(dhd_bus_t *bus, struct sdpcm_shared *sh) { u32 addr; int rv; @@ -1903,7 +2022,7 @@ static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh) /* Read rte_shared structure */ rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh, - sizeof(sdpcm_shared_t)); + sizeof(struct sdpcm_shared)); if (rv < 0) return rv; @@ -1935,7 +2054,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) uint maxstrlen = 256; char *str = NULL; trap_t tr; - sdpcm_shared_t sdpcm_shared; + struct sdpcm_shared sdpcm_shared; struct bcmstrbuf strbuf; DHD_TRACE(("%s: Enter\n", __func__)); -- cgit v0.10.2 From 86c01843876d81caba252f09c2f3977417b91ced Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:38 +0200 Subject: staging: brcm80211: absorb msgtrace.h in fullmac Absorb msgtrace.h into dhd_common.c Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 79df125..22e5efd 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -26,7 +26,6 @@ #include #include #include -#include #define BRCM_OUI "\x00\x10\x18" #define DOT11_OUI_LEN 3 @@ -57,6 +56,8 @@ void dhd_iscan_unlock(void); #endif #define EPI_VERSION_STR "4.218.248.5" +#define MSGTRACE_VERSION 1 + #ifdef DHD_DEBUG const char dhd_version[] = "Dongle Host Driver, version " EPI_VERSION_STR "\nCompiled on " __DATE__ @@ -118,6 +119,22 @@ const bcm_iovar_t dhd_iovars[] = { {NULL, 0, 0, 0, 0} }; +/* Message trace header */ +struct msgtrace_hdr { + u8 version; + u8 spare; + u16 len; /* Len of the trace */ + u32 seqnum; /* Sequence number of message. Useful + * if the messsage has been lost + * because of DMA error or a bus reset + * (ex: SDIO Func2) + */ + u32 discarded_bytes; /* Number of discarded bytes because of + trace overflow */ + u32 discarded_printf; /* Number of discarded printf + because of trace overflow */ +} __packed; + void dhd_common_init(void) { /* Init global variables at run-time, not as part of the declaration. @@ -732,12 +749,12 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) case WLC_E_TRACE: { static u32 seqnum_prev; - msgtrace_hdr_t hdr; + struct msgtrace_hdr hdr; u32 nblost; char *s, *p; buf = (unsigned char *) event_data; - memcpy(&hdr, buf, MSGTRACE_HDRLEN); + memcpy(&hdr, buf, sizeof(struct msgtrace_hdr)); if (hdr.version != MSGTRACE_VERSION) { DHD_ERROR( @@ -751,7 +768,8 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) } /* There are 2 bytes available at the end of data */ - buf[MSGTRACE_HDRLEN + be16_to_cpu(hdr.len)] = '\0'; + *(buf + sizeof(struct msgtrace_hdr) + + be16_to_cpu(hdr.len)) = '\0'; if (be32_to_cpu(hdr.discarded_bytes) || be32_to_cpu(hdr.discarded_printf)) { @@ -774,7 +792,7 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) * avoid display big * printf (issue with Linux printk ) */ - p = (char *)&buf[MSGTRACE_HDRLEN]; + p = (char *)&buf[sizeof(struct msgtrace_hdr)]; while ((s = strstr(p, "\n")) != NULL) { *s = '\0'; printk(KERN_DEBUG"%s\n", p); diff --git a/drivers/staging/brcm80211/brcmfmac/msgtrace.h b/drivers/staging/brcm80211/brcmfmac/msgtrace.h deleted file mode 100644 index d654671..0000000 --- a/drivers/staging/brcm80211/brcmfmac/msgtrace.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _MSGTRACE_H -#define _MSGTRACE_H - -#define MSGTRACE_VERSION 1 - -/* Message trace header */ -typedef struct msgtrace_hdr { - u8 version; - u8 spare; - u16 len; /* Len of the trace */ - u32 seqnum; /* Sequence number of message. Useful - * if the messsage has been lost - * because of DMA error or a bus reset - * (ex: SDIO Func2) - */ - u32 discarded_bytes; /* Number of discarded bytes because of - trace overflow */ - u32 discarded_printf; /* Number of discarded printf - because of trace overflow */ -} __attribute__((packed)) msgtrace_hdr_t; - -#define MSGTRACE_HDRLEN sizeof(msgtrace_hdr_t) - -/* The hbus driver generates traces when sending a trace message. - * This causes endless traces. - * This flag must be set to true in any hbus traces. - * The flag is reset in the function msgtrace_put. - * This prevents endless traces but generates hasardous - * lost of traces only in bus device code. - * It is recommendat to set this flag in macro SD_TRACE - * but not in SD_ERROR for avoiding missing - * hbus error traces. hbus error trace should not generates endless traces. - */ -extern bool msgtrace_hbus_trace; - -typedef void (*msgtrace_func_send_t) (void *hdl1, void *hdl2, u8 *hdr, - u16 hdrlen, u8 *buf, - u16 buflen); - -extern void msgtrace_sent(void); -extern void msgtrace_put(char *buf, int count); -extern void msgtrace_init(void *hdl1, void *hdl2, - msgtrace_func_send_t func_send); - -#endif /* _MSGTRACE_H */ -- cgit v0.10.2 From 597600ad927dd2dce89b7dfa2118bfe212183a15 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:39 +0200 Subject: staging: brcm80211: combine sbsdpcmdev.h and sbsdio.h Combine two head files both for sdio sb configuration in fullmac Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 094cf58..e005ea6 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -130,7 +130,6 @@ typedef struct { #include #include -#include #include #include @@ -380,7 +379,8 @@ extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, /* Core reg address translation */ #define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) -#define CORE_BUS_REG(base, field) (base + offsetof(sdpcmd_regs_t, field)) +#define CORE_BUS_REG(base, field) \ + (base + offsetof(struct sdpcmd_regs, field)) #define CORE_SB(base, field) \ (base + SBCONFIGOFF + offsetof(sbconfig_t, field)) @@ -434,7 +434,7 @@ typedef struct dhd_bus { uint varsz; /* Size of variables buffer */ u32 sbaddr; /* Current SB window pointer (-1, invalid) */ - sdpcmd_regs_t *regs; /* Registers for SDIO core */ + struct sdpcmd_regs *regs; /* SDIO core */ uint sdpcmrev; /* SDIO core revision */ uint armrev; /* CPU core revision */ uint ramrev; /* SOCRAM core revision */ @@ -1014,7 +1014,7 @@ static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok) int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep) { bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct sdpcmd_regs *regs = bus->regs; uint retries = 0; DHD_INFO(("dhdsdio_bussleep: request %s (currently %s)\n", @@ -1408,7 +1408,7 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes) u8 tx_prec_map; dhd_pub_t *dhd = bus->dhd; - sdpcmd_regs_t *regs = bus->regs; + struct sdpcmd_regs *regs = bus->regs; DHD_TRACE(("%s: Enter\n", __func__)); @@ -3158,7 +3158,7 @@ exit: static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx) { bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct sdpcmd_regs *regs = bus->regs; uint retries = 0; u16 lastrbc; u8 hi, lo; @@ -4343,7 +4343,7 @@ deliver: static u32 dhdsdio_hostmail(dhd_bus_t *bus) { - sdpcmd_regs_t *regs = bus->regs; + struct sdpcmd_regs *regs = bus->regs; u32 intstatus = 0; u32 hmb_data; u8 fcbits; @@ -4418,7 +4418,7 @@ static u32 dhdsdio_hostmail(dhd_bus_t *bus) bool dhdsdio_dpc(dhd_bus_t *bus) { bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct sdpcmd_regs *regs = bus->regs; u32 intstatus, newstatus = 0; uint retries = 0; uint rxlimit = dhd_rxbound; /* Rx frames to read before resched */ diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdio.h b/drivers/staging/brcm80211/brcmfmac/sbsdio.h index c7facd3..86b62b8 100644 --- a/drivers/staging/brcm80211/brcmfmac/sbsdio.h +++ b/drivers/staging/brcm80211/brcmfmac/sbsdio.h @@ -149,4 +149,225 @@ #define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ +/* corecontrol */ +#define CC_CISRDY (1 << 0) /* CIS Ready */ +#define CC_BPRESEN (1 << 1) /* CCCR RES signal */ +#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ +#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */ +#define CC_XMTDATAAVAIL_MODE (1 << 4) +#define CC_XMTDATAAVAIL_CTRL (1 << 5) + +/* corestatus */ +#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ +#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ +#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ + +#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ +#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ +#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ +#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ + +/* intstatus */ +#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ +#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ +#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ +#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ +#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ +#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ +#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ +#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ +#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ +#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ +#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ +#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ +#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ +#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ +#define I_PC (1 << 10) /* descriptor error */ +#define I_PD (1 << 11) /* data error */ +#define I_DE (1 << 12) /* Descriptor protocol Error */ +#define I_RU (1 << 13) /* Receive descriptor Underflow */ +#define I_RO (1 << 14) /* Receive fifo Overflow */ +#define I_XU (1 << 15) /* Transmit fifo Underflow */ +#define I_RI (1 << 16) /* Receive Interrupt */ +#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ +#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ +#define I_XI (1 << 24) /* Transmit Interrupt */ +#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ +#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ +#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ +#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ +#define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */ +#define I_SRESET (1 << 30) /* CCCR RES interrupt */ +#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ +#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) +#define I_DMA (I_RI | I_XI | I_ERRORS) + +/* sbintstatus */ +#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ +#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ +#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ + +/* sdioaccess */ +#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ +#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ +#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ +#define SDA_WRITE 0x01000000 /* Write bit */ +#define SDA_READ 0x00000000 /* Write bit cleared for Read */ +#define SDA_BUSY 0x80000000 /* Busy bit */ + +/* sdioaccess-accessible register address spaces */ +#define SDA_CCCR_SPACE 0x000 /* CCCR register space */ +#define SDA_F1_FBR_SPACE 0x100 /* F1 FBR register space */ +#define SDA_F2_FBR_SPACE 0x200 /* F2 FBR register space */ +#define SDA_F1_REG_SPACE 0x300 /* F1 core-specific register space */ + +/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ +#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ +#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ +#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ +#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ +#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ +#define SDA_SBADDRMID 0x00b /* SbAddrMid */ +#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ +#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ +#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ +#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ +#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ +#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ +#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ +#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ + +/* SDA_F2WATERMARK */ +#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ + +/* SDA_SBADDRLOW */ +#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ + +/* SDA_SBADDRMID */ +#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ + +/* SDA_SBADDRHIGH */ +#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ + +/* SDA_FRAMECTRL */ +#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ +#define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */ +#define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */ + +/* pcmciaframectrl */ +#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ + +/* intrcvlazy */ +#define IRL_TO_MASK 0x00ffffff /* timeout */ +#define IRL_FC_MASK 0xff000000 /* frame count */ +#define IRL_FC_SHIFT 24 /* frame count */ + +/* rx header flags */ +#define RXF_CRC 0x0001 /* CRC error detected */ +#define RXF_WOOS 0x0002 /* write frame out of sync */ +#define RXF_WF_TERM 0x0004 /* write frame terminated */ +#define RXF_ABORT 0x0008 /* write frame aborted */ +#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) + +/* HW frame tag */ +#define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + +/* core registers */ +struct sdpcmd_regs { + u32 corecontrol; /* 0x00, rev8 */ + u32 corestatus; /* rev8 */ + u32 PAD[1]; + u32 biststatus; /* rev8 */ + + /* PCMCIA access */ + u16 pcmciamesportaladdr; /* 0x010, rev8 */ + u16 PAD[1]; + u16 pcmciamesportalmask; /* rev8 */ + u16 PAD[1]; + u16 pcmciawrframebc; /* rev8 */ + u16 PAD[1]; + u16 pcmciaunderflowtimer; /* rev8 */ + u16 PAD[1]; + + /* interrupt */ + u32 intstatus; /* 0x020, rev8 */ + u32 hostintmask; /* rev8 */ + u32 intmask; /* rev8 */ + u32 sbintstatus; /* rev8 */ + u32 sbintmask; /* rev8 */ + u32 funcintmask; /* rev4 */ + u32 PAD[2]; + u32 tosbmailbox; /* 0x040, rev8 */ + u32 tohostmailbox; /* rev8 */ + u32 tosbmailboxdata; /* rev8 */ + u32 tohostmailboxdata; /* rev8 */ + + /* synchronized access to registers in SDIO clock domain */ + u32 sdioaccess; /* 0x050, rev8 */ + u32 PAD[3]; + + /* PCMCIA frame control */ + u8 pcmciaframectrl; /* 0x060, rev8 */ + u8 PAD[3]; + u8 pcmciawatermark; /* rev8 */ + u8 PAD[155]; + + /* interrupt batching control */ + u32 intrcvlazy; /* 0x100, rev8 */ + u32 PAD[3]; + + /* counters */ + u32 cmd52rd; /* 0x110, rev8 */ + u32 cmd52wr; /* rev8 */ + u32 cmd53rd; /* rev8 */ + u32 cmd53wr; /* rev8 */ + u32 abort; /* rev8 */ + u32 datacrcerror; /* rev8 */ + u32 rdoutofsync; /* rev8 */ + u32 wroutofsync; /* rev8 */ + u32 writebusy; /* rev8 */ + u32 readwait; /* rev8 */ + u32 readterm; /* rev8 */ + u32 writeterm; /* rev8 */ + u32 PAD[40]; + u32 clockctlstatus; /* rev8 */ + u32 PAD[7]; + + u32 PAD[128]; /* DMA engines */ + + /* SDIO/PCMCIA CIS region */ + char cis[512]; /* 0x400-0x5ff, rev6 */ + + /* PCMCIA function control registers */ + char pcmciafcr[256]; /* 0x600-6ff, rev6 */ + u16 PAD[55]; + + /* PCMCIA backplane access */ + u16 backplanecsr; /* 0x76E, rev6 */ + u16 backplaneaddr0; /* rev6 */ + u16 backplaneaddr1; /* rev6 */ + u16 backplaneaddr2; /* rev6 */ + u16 backplaneaddr3; /* rev6 */ + u16 backplanedata0; /* rev6 */ + u16 backplanedata1; /* rev6 */ + u16 backplanedata2; /* rev6 */ + u16 backplanedata3; /* rev6 */ + u16 PAD[31]; + + /* sprom "size" & "blank" info */ + u16 spromstatus; /* 0x7BE, rev2 */ + u32 PAD[464]; + + u16 PAD[0x80]; +}; + #endif /* _SBSDIO_H */ diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h b/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h deleted file mode 100644 index 3799d50..0000000 --- a/drivers/staging/brcm80211/brcmfmac/sbsdpcmdev.h +++ /dev/null @@ -1,240 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbsdpcmdev_h_ -#define _sbsdpcmdev_h_ - -/* core registers */ -typedef volatile struct { - u32 corecontrol; /* CoreControl, 0x000, rev8 */ - u32 corestatus; /* CoreStatus, 0x004, rev8 */ - u32 PAD[1]; - u32 biststatus; /* BistStatus, 0x00c, rev8 */ - - /* PCMCIA access */ - u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ - u16 PAD[1]; - u16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ - u16 PAD[1]; - u16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ - u16 PAD[1]; - u16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ - u16 PAD[1]; - - /* interrupt */ - u32 intstatus; /* IntStatus, 0x020, rev8 */ - u32 hostintmask; /* IntHostMask, 0x024, rev8 */ - u32 intmask; /* IntSbMask, 0x028, rev8 */ - u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ - u32 sbintmask; /* SBIntMask, 0x030, rev8 */ - u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ - u32 PAD[2]; - u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ - u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ - u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ - u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ - - /* synchronized access to registers in SDIO clock domain */ - u32 sdioaccess; /* SdioAccess, 0x050, rev8 */ - u32 PAD[3]; - - /* PCMCIA frame control */ - u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ - u8 PAD[3]; - u8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ - u8 PAD[155]; - - /* interrupt batching control */ - u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ - u32 PAD[3]; - - /* counters */ - u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ - u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ - u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ - u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ - u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ - u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ - u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ - u32 PAD[40]; - u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ - u32 PAD[7]; - u32 PAD[128]; /* DMA engines */ - - /* SDIO/PCMCIA CIS region */ - char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ - - /* PCMCIA function control registers */ - char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ - u16 PAD[55]; - - /* PCMCIA backplane access */ - u16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ - u16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ - u16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ - u16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ - u16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ - u16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ - u16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ - u16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ - u16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ - u16 PAD[31]; - - /* sprom "size" & "blank" info */ - u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ - u32 PAD[464]; - - /* Sonics SiliconBackplane registers */ - u16 PAD[0x80]; /* SbConfig Regs, 0xf00-0xfff, rev8 */ -} sdpcmd_regs_t; - -/* corecontrol */ -#define CC_CISRDY (1 << 0) /* CIS Ready */ -#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ -#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ -#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ -#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ -#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ - -/* corestatus */ -#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ -#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ -#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ - -#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ -#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ -#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ -#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ - -/* intstatus */ -#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ -#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ -#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ -#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ -#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ -#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ -#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ -#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ -#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ -#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ -#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ -#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ -#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ -#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ -#define I_PC (1 << 10) /* descriptor error */ -#define I_PD (1 << 11) /* data error */ -#define I_DE (1 << 12) /* Descriptor protocol Error */ -#define I_RU (1 << 13) /* Receive descriptor Underflow */ -#define I_RO (1 << 14) /* Receive fifo Overflow */ -#define I_XU (1 << 15) /* Transmit fifo Underflow */ -#define I_RI (1 << 16) /* Receive Interrupt */ -#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ -#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ -#define I_XI (1 << 24) /* Transmit Interrupt */ -#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ -#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ -#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ -#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ -#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ -#define I_SRESET (1 << 30) /* CCCR RES interrupt */ -#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ -#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ -#define I_DMA (I_RI | I_XI | I_ERRORS) - -/* sbintstatus */ -#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ -#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ -#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ - -/* sdioaccess */ -#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ -#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ -#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ -#define SDA_WRITE 0x01000000 /* Write bit */ -#define SDA_READ 0x00000000 /* Write bit cleared for Read */ -#define SDA_BUSY 0x80000000 /* Busy bit */ - -/* sdioaccess-accessible register address spaces */ -#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ -#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ -#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ -#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ - -/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ -#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ -#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ -#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ -#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ -#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ -#define SDA_SBADDRMID 0x00b /* SbAddrMid */ -#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ -#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ -#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ -#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ -#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ -#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ -#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ -#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ - -/* SDA_F2WATERMARK */ -#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ - -/* SDA_SBADDRLOW */ -#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ - -/* SDA_SBADDRMID */ -#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ - -/* SDA_SBADDRHIGH */ -#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ - -/* SDA_FRAMECTRL */ -#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ -#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ -#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ - -/* pcmciaframectrl */ -#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ - -/* intrcvlazy */ -#define IRL_TO_MASK 0x00ffffff /* timeout */ -#define IRL_FC_MASK 0xff000000 /* frame count */ -#define IRL_FC_SHIFT 24 /* frame count */ - -/* rx header */ -typedef volatile struct { - u16 len; - u16 flags; -} sdpcmd_rxh_t; - -/* rx header flags */ -#define RXF_CRC 0x0001 /* CRC error detected */ -#define RXF_WOOS 0x0002 /* write frame out of sync */ -#define RXF_WF_TERM 0x0004 /* write frame terminated */ -#define RXF_ABORT 0x0008 /* write frame aborted */ -#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ - -/* HW frame tag */ -#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ - -#endif /* _sbsdpcmdev_h_ */ -- cgit v0.10.2 From 0df4604ed09873c46ddb3232a3efc5a2798854cb Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:40 +0200 Subject: staging: brmc80211: remove sdio.h from fullmac Use standard sdio.h from mmc core instead of private one Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index b8af4ed..14c07e6 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -30,7 +30,6 @@ #include /* common SDIO/controller interface */ #include /* BRCM sdio device core */ -#include /* sdio spec */ #include "dngl_stats.h" #include "dhd.h" diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 067404b..6b2a450 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -15,11 +15,11 @@ */ #include #include +#include #include #include #include #include -#include /* SDIO Device and Protocol Specs */ #include /* SDIO Host Controller Specification */ #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ @@ -75,16 +75,16 @@ static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd) sd_trace(("%s\n", __func__)); /* Get the Card's common CIS address */ - sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0); + sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIO_CCCR_CIS); sd->func_cis_ptr[0] = sd->com_cis_ptr; sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__, sd->com_cis_ptr)); /* Get the Card's function CIS (for each function) */ - for (fbraddr = SDIOD_FBR_STARTADDR, func = 1; + for (fbraddr = SDIO_FBR_BASE(1), func = 1; func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) { sd->func_cis_ptr[func] = - sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr); + sdioh_sdmmc_get_cisaddr(sd, SDIO_FBR_CIS + fbraddr); sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func, sd->func_cis_ptr[func])); } @@ -642,7 +642,7 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, * Handle F2 enable * as a special case. */ - if (regaddr == SDIOD_CCCR_IOEN) { + if (regaddr == SDIO_CCCR_IOEx) { if (gInstance->func[2]) { sdio_claim_host(gInstance->func[2]); if (*byte & SDIO_FUNC_ENABLE_2) { @@ -667,7 +667,7 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, } #if defined(MMC_SDIO_ABORT) /* to allow abort command through F1 */ - else if (regaddr == SDIOD_CCCR_IOABORT) { + else if (regaddr == SDIO_CCCR_ABORT) { sdio_claim_host(gInstance->func[func]); /* * this sdio_f0_writeb() can be replaced @@ -955,8 +955,8 @@ extern int sdioh_abort(sdioh_info_t *sd, uint func) sd_trace(("%s: Enter\n", __func__)); #if defined(MMC_SDIO_ABORT) - /* issue abort cmd52 command through F1 */ - sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT, + /* issue abort cmd52 command through F0 */ + sdioh_request_byte(sd, SDIOH_WRITE, SDIO_FUNC_0, SDIO_CCCR_ABORT, &t_func); #endif /* defined(MMC_SDIO_ABORT) */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index 196b15e..f495d4b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -19,7 +19,6 @@ #include #include #include -#include /* SDIO Specs */ #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index e005ea6..1799974 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -128,7 +129,6 @@ typedef struct { #endif /* DHD_DEBUG */ #include -#include #include #include @@ -3016,7 +3016,7 @@ void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex) /* Turn off the bus (F2), free any pending packets */ DHD_INTR(("%s: disable SDIO interrupts\n", __func__)); bcmsdh_intr_disable(bus->sdh); - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, + bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, NULL); /* Clear any pending interrupts now that F2 is disabled */ @@ -3091,7 +3091,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex) &bus->regs->tosbmailboxdata, retries); enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2); - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL); + bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable, NULL); /* Give the dongle some time to do its thing and set IOR2 */ dhd_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000); @@ -3099,7 +3099,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex) ready = 0; while (ready != enable && !dhd_timeout_expired(&tmo)) ready = - bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IORDY, + bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IORx, NULL); DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n", @@ -3136,7 +3136,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex) else { /* Disable F2 again */ enable = SDIO_FUNC_ENABLE_1; - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, + bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable, NULL); } @@ -5018,7 +5018,7 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) if (!bus->dpc_sched) { u8 devpend; devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, - SDIOD_CCCR_INTPEND, + SDIO_CCCR_INTx, NULL); intstatus = devpend & (INTR_STATUS_FUNC1 | @@ -5150,35 +5150,6 @@ done: } #endif /* DHD_DEBUG */ -#ifdef DHD_DEBUG -static void dhd_dump_cis(uint fn, u8 *cis) -{ - uint byte, tag, tdata; - DHD_INFO(("Function %d CIS:\n", fn)); - - for (tdata = byte = 0; byte < SBSDIO_CIS_SIZE_LIMIT; byte++) { - if ((byte % 16) == 0) - DHD_INFO((" ")); - DHD_INFO(("%02x ", cis[byte])); - if ((byte % 16) == 15) - DHD_INFO(("\n")); - if (!tdata--) { - tag = cis[byte]; - if (tag == 0xff) - break; - else if (!tag) - tdata = 0; - else if ((byte + 1) < SBSDIO_CIS_SIZE_LIMIT) - tdata = cis[byte + 1] + 1; - else - DHD_INFO(("]")); - } - } - if ((byte % 16) != 15) - DHD_INFO(("\n")); -} -#endif /* DHD_DEBUG */ - static bool dhdsdio_chipmatch(u16 chipid) { if (chipid == BCM4325_CHIP_ID) @@ -5376,56 +5347,6 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid) err, DHD_INIT_CLKCTL1, clkctl)); goto fail; } -#ifdef DHD_DEBUG - if (DHD_INFO_ON()) { - uint fn, numfn; - u8 *cis[SDIOD_MAX_IOFUNCS]; - int err = 0; - - numfn = bcmsdh_query_iofnum(sdh); - ASSERT(numfn <= SDIOD_MAX_IOFUNCS); - - /* Make sure ALP is available before trying to read CIS */ - SPINWAIT(((clkctl = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, - SBSDIO_FUNC1_CHIPCLKCSR, - NULL)), - !SBSDIO_ALPAV(clkctl)), PMU_MAX_TRANSITION_DLY); - - /* Now request ALP be put on the bus */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - DHD_INIT_CLKCTL2, &err); - udelay(65); - - for (fn = 0; fn <= numfn; fn++) { - cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC); - if (!cis[fn]) { - DHD_INFO(("dhdsdio_probe: fn %d cis malloc " - "failed\n", fn)); - break; - } - - err = bcmsdh_cis_read(sdh, fn, cis[fn], - SBSDIO_CIS_SIZE_LIMIT); - if (err) { - DHD_INFO(("dhdsdio_probe: fn %d cis read " - "err %d\n", fn, err)); - kfree(cis[fn]); - break; - } - dhd_dump_cis(fn, cis[fn]); - } - - while (fn-- > 0) { - ASSERT(cis[fn]); - kfree(cis[fn]); - } - - if (err) { - DHD_ERROR(("dhdsdio_probe: error read/parsing CIS\n")); - goto fail; - } - } -#endif /* DHD_DEBUG */ if (dhdsdio_chip_attach(bus, regsva)) { DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__)); @@ -5534,7 +5455,7 @@ static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh) #endif /* SDTEST */ /* Disable F2 to clear any intermediate frame state on the dongle */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, SDIO_FUNC_ENABLE_1, + bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, NULL); bus->dhd->busstate = DHD_BUS_DOWN; @@ -6262,7 +6183,7 @@ dhdsdio_chip_attach(struct dhd_bus *bus, void *regs) CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0); /* Disable F2 to clear any intermediate frame state on the dongle */ - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, + bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, NULL); /* WAR: cmd52 backplane read so core HW will drop ALPReq */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdio.h b/drivers/staging/brcm80211/brcmfmac/sdio.h deleted file mode 100644 index 670e379..0000000 --- a/drivers/staging/brcm80211/brcmfmac/sdio.h +++ /dev/null @@ -1,552 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SDIO_H -#define _SDIO_H - -#ifdef BCMSDIO - -/* CCCR structure for function 0 */ -typedef volatile struct { - u8 cccr_sdio_rev; /* RO, cccr and sdio revision */ - u8 sd_rev; /* RO, sd spec revision */ - u8 io_en; /* I/O enable */ - u8 io_rdy; /* I/O ready reg */ - u8 intr_ctl; /* Master and per function interrupt enable control */ - u8 intr_status; /* RO, interrupt pending status */ - u8 io_abort; /* read/write abort or reset all functions */ - u8 bus_inter; /* bus interface control */ - u8 capability; /* RO, card capability */ - - u8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ - u8 cis_base_mid; - u8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ - - /* suspend/resume registers */ - u8 bus_suspend; /* 0xC */ - u8 func_select; /* 0xD */ - u8 exec_flag; /* 0xE */ - u8 ready_flag; /* 0xF */ - - u8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ - - u8 power_control; /* 0x12 (SDIO version 1.10) */ - - u8 speed_control; /* 0x13 */ -} sdio_regs_t; - -/* SDIO Device CCCR offsets */ -#define SDIOD_CCCR_REV 0x00 -#define SDIOD_CCCR_SDREV 0x01 -#define SDIOD_CCCR_IOEN 0x02 -#define SDIOD_CCCR_IORDY 0x03 -#define SDIOD_CCCR_INTEN 0x04 -#define SDIOD_CCCR_INTPEND 0x05 -#define SDIOD_CCCR_IOABORT 0x06 -#define SDIOD_CCCR_BICTRL 0x07 -#define SDIOD_CCCR_CAPABLITIES 0x08 -#define SDIOD_CCCR_CISPTR_0 0x09 -#define SDIOD_CCCR_CISPTR_1 0x0A -#define SDIOD_CCCR_CISPTR_2 0x0B -#define SDIOD_CCCR_BUSSUSP 0x0C -#define SDIOD_CCCR_FUNCSEL 0x0D -#define SDIOD_CCCR_EXECFLAGS 0x0E -#define SDIOD_CCCR_RDYFLAGS 0x0F -#define SDIOD_CCCR_BLKSIZE_0 0x10 -#define SDIOD_CCCR_BLKSIZE_1 0x11 -#define SDIOD_CCCR_POWER_CONTROL 0x12 -#define SDIOD_CCCR_SPEED_CONTROL 0x13 - -/* Broadcom extensions (corerev >= 1) */ -#define SDIOD_CCCR_BRCM_SEPINT 0xf2 - -/* cccr_sdio_rev */ -#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ -#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ - -/* sd_rev */ -#define SD_REV_PHY_MASK 0x0f /* SD format version number */ - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ -#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ -#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ - -/* intr_ctl */ -#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ -#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ -#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ -#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ - -/* io_abort */ -#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ -#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ - -/* bus_inter */ -#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ -#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ -#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ -#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ -#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ -#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ - -/* capability */ -#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ -#define SDIO_CAP_LSC 0x40 /* low speed card */ -#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ -#define SDIO_CAP_SRW 0x04 /* support read wait */ -#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ -#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ - -/* power_control */ -#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ -#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ - -/* speed_control (control device entry into high-speed clocking mode) */ -#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ -#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ - -/* brcm sepint */ -#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ -#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ -#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ - -/* FBR structure for function 1-7, FBR addresses and register offsets */ -typedef volatile struct { - u8 devctr; /* device interface, CSA control */ - u8 ext_dev; /* extended standard I/O device type code */ - u8 pwr_sel; /* power selection support */ - u8 PAD[6]; /* reserved */ - - u8 cis_low; /* CIS LSB */ - u8 cis_mid; - u8 cis_high; /* CIS MSB */ - u8 csa_low; /* code storage area, LSB */ - u8 csa_mid; - u8 csa_high; /* code storage area, MSB */ - u8 csa_dat_win; /* data access window to function */ - - u8 fnx_blk_size[2]; /* block size, little endian */ -} sdio_fbr_t; - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_IOFUNCS 7 - -/* SDIO Device FBR Start Address */ -#define SDIOD_FBR_STARTADDR 0x100 - -/* SDIO Device FBR Size */ -#define SDIOD_FBR_SIZE 0x100 - -/* Macro to calculate FBR register base */ -#define SDIOD_FBR_BASE(n) ((n) * 0x100) - -/* Function register offsets */ -#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ -#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ -#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ - -/* SDIO Function CIS ptr offset */ -#define SDIOD_FBR_CISPTR_0 0x09 -#define SDIOD_FBR_CISPTR_1 0x0A -#define SDIOD_FBR_CISPTR_2 0x0B - -/* Code Storage Area pointer */ -#define SDIOD_FBR_CSA_ADDR_0 0x0C -#define SDIOD_FBR_CSA_ADDR_1 0x0D -#define SDIOD_FBR_CSA_ADDR_2 0x0E -#define SDIOD_FBR_CSA_DATA 0x0F - -/* SDIO Function I/O Block Size */ -#define SDIOD_FBR_BLKSIZE_0 0x10 -#define SDIOD_FBR_BLKSIZE_1 0x11 - -/* devctr */ -#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ -#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ -#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ -/* interface codes */ -#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ -#define SDIOD_DIC_UART 1 -#define SDIOD_DIC_BLUETOOTH_A 2 -#define SDIOD_DIC_BLUETOOTH_B 3 -#define SDIOD_DIC_GPS 4 -#define SDIOD_DIC_CAMERA 5 -#define SDIOD_DIC_PHS 6 -#define SDIOD_DIC_WLAN 7 -#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ - -/* pwr_sel */ -#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ -#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ - -/* misc defines */ -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 -#define SDIO_FUNC_3 3 -#define SDIO_FUNC_4 4 -#define SDIO_FUNC_5 5 -#define SDIO_FUNC_6 6 -#define SDIO_FUNC_7 7 - -#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ -#define SD_CARD_TYPE_IO 1 /* IO only card */ -#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ -#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ - -#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ -#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ - -/* Card registers: status bit position */ -#define CARDREG_STATUS_BIT_OUTOFRANGE 31 -#define CARDREG_STATUS_BIT_COMCRCERROR 23 -#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 -#define CARDREG_STATUS_BIT_ERROR 19 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 -#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 - -#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ -#define SD_CMD_SEND_OPCOND 1 -#define SD_CMD_MMC_SET_RCA 3 -#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ -#define SD_CMD_SELECT_DESELECT_CARD 7 -#define SD_CMD_SEND_CSD 9 -#define SD_CMD_SEND_CID 10 -#define SD_CMD_STOP_TRANSMISSION 12 -#define SD_CMD_SEND_STATUS 13 -#define SD_CMD_GO_INACTIVE_STATE 15 -#define SD_CMD_SET_BLOCKLEN 16 -#define SD_CMD_READ_SINGLE_BLOCK 17 -#define SD_CMD_READ_MULTIPLE_BLOCK 18 -#define SD_CMD_WRITE_BLOCK 24 -#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 -#define SD_CMD_PROGRAM_CSD 27 -#define SD_CMD_SET_WRITE_PROT 28 -#define SD_CMD_CLR_WRITE_PROT 29 -#define SD_CMD_SEND_WRITE_PROT 30 -#define SD_CMD_ERASE_WR_BLK_START 32 -#define SD_CMD_ERASE_WR_BLK_END 33 -#define SD_CMD_ERASE 38 -#define SD_CMD_LOCK_UNLOCK 42 -#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ -#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ -#define SD_CMD_APP_CMD 55 -#define SD_CMD_GEN_CMD 56 -#define SD_CMD_READ_OCR 58 -#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ -#define SD_ACMD_SD_STATUS 13 -#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 -#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 -#define SD_ACMD_SD_SEND_OP_COND 41 -#define SD_ACMD_SET_CLR_CARD_DETECT 42 -#define SD_ACMD_SEND_SCR 51 - -/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ -#define SD_IO_OP_READ 0 /* Read_Write: Read */ -#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ -#define SD_IO_RW_NORMAL 0 /* no RAW */ -#define SD_IO_RW_RAW 1 /* RAW */ -#define SD_IO_BYTE_MODE 0 /* Byte Mode */ -#define SD_IO_BLOCK_MODE 1 /* BlockMode */ -#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ -#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ - -/* build SD_CMD_IO_RW_DIRECT Argument */ -#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ - (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) - -/* build SD_CMD_IO_RW_EXTENDED Argument */ -#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ - (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) - -/* SDIO response parameters */ -#define SD_RSP_NO_NONE 0 -#define SD_RSP_NO_1 1 -#define SD_RSP_NO_2 2 -#define SD_RSP_NO_3 3 -#define SD_RSP_NO_4 4 -#define SD_RSP_NO_5 5 -#define SD_RSP_NO_6 6 - - /* Modified R6 response (to CMD3) */ -#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 -#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 -#define SD_RSP_MR6_ERROR 0x2000 - - /* Modified R1 in R4 Response (to CMD5) */ -#define SD_RSP_MR1_SBIT 0x80 -#define SD_RSP_MR1_PARAMETER_ERROR 0x40 -#define SD_RSP_MR1_RFU5 0x20 -#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 -#define SD_RSP_MR1_COM_CRC_ERROR 0x08 -#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 -#define SD_RSP_MR1_RFU1 0x02 -#define SD_RSP_MR1_IDLE_STATE 0x01 - - /* R5 response (to CMD52 and CMD53) */ -#define SD_RSP_R5_COM_CRC_ERROR 0x80 -#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 -#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 -#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 -#define SD_RSP_R5_ERROR 0x08 -#define SD_RSP_R5_RFU 0x04 -#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 -#define SD_RSP_R5_OUT_OF_RANGE 0x01 - -#define SD_RSP_R5_ERRBITS 0xCB - -/* ------------------------------------------------ - * SDIO Commands and responses - * - * I/O only commands are: - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -/* SDIO Commands */ -#define SDIOH_CMD_0 0 -#define SDIOH_CMD_3 3 -#define SDIOH_CMD_5 5 -#define SDIOH_CMD_7 7 -#define SDIOH_CMD_15 15 -#define SDIOH_CMD_52 52 -#define SDIOH_CMD_53 53 -#define SDIOH_CMD_59 59 - -/* SDIO Command Responses */ -#define SDIOH_RSP_NONE 0 -#define SDIOH_RSP_R1 1 -#define SDIOH_RSP_R2 2 -#define SDIOH_RSP_R3 3 -#define SDIOH_RSP_R4 4 -#define SDIOH_RSP_R5 5 -#define SDIOH_RSP_R6 6 - -/* - * SDIO Response Error flags - */ -#define SDIOH_RSP5_ERROR_FLAGS 0xCB - -/* ------------------------------------------------ - * SDIO Command structures. I/O only commands are: - * - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -#define CMD5_OCR_M BITFIELD_MASK(24) -#define CMD5_OCR_S 0 - -#define CMD7_RCA_M BITFIELD_MASK(16) -#define CMD7_RCA_S 16 - -#define CMD_15_RCA_M BITFIELD_MASK(16) -#define CMD_15_RCA_S 16 - -#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 - */ -#define CMD52_DATA_S 0 -#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD52_REG_ADDR_S 9 -#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ -#define CMD52_RAW_S 27 -#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD52_FUNCTION_S 28 -#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD52_RW_FLAG_S 31 - -#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ -#define CMD53_BYTE_BLK_CNT_S 0 -#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD53_REG_ADDR_S 9 -#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ -#define CMD53_OP_CODE_S 26 -#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ -#define CMD53_BLK_MODE_S 27 -#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD53_FUNCTION_S 28 -#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD53_RW_FLAG_S 31 - -/* ------------------------------------------------------ - * SDIO Command Response structures for SD1 and SD4 modes - * ----------------------------------------------------- - */ -#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ -#define RSP4_IO_OCR_S 0 -#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ -#define RSP4_STUFF_S 24 -#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ -#define RSP4_MEM_PRESENT_S 27 -#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ -#define RSP4_NUM_FUNCS_S 28 -#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ -#define RSP4_CARD_READY_S 31 - -#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] - */ -#define RSP6_STATUS_S 0 -#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ -#define RSP6_IO_RCA_S 16 - -#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ -#define RSP1_AKE_SEQ_ERROR_S 3 -#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP1_APP_CMD_S 5 -#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ -#define RSP1_READY_FOR_DATA_S 8 -#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card - * when Cmd was received - */ -#define RSP1_CURR_STATE_S 9 -#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ -#define RSP1_EARSE_RESET_S 13 -#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ -#define RSP1_CARD_ECC_DISABLE_S 14 -#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ -#define RSP1_WP_ERASE_SKIP_S 15 -#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits - * of CSD - */ -#define RSP1_CID_CSD_OVERW_S 16 -#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ -#define RSP1_ERROR_S 19 -#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ -#define RSP1_CC_ERROR_S 20 -#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed - * to correct data - */ -#define RSP1_CARD_ECC_FAILED_S 21 -#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ -#define RSP1_ILLEGAL_CMD_S 22 -#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed - */ -#define RSP1_COM_CRC_ERROR_S 23 -#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ -#define RSP1_LOCK_UNLOCK_FAIL_S 24 -#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ -#define RSP1_CARD_LOCKED_S 25 -#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program - * write-protected blocks - */ -#define RSP1_WP_VIOLATION_S 26 -#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ -#define RSP1_ERASE_PARAM_S 27 -#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ -#define RSP1_ERASE_SEQ_ERR_S 28 -#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ -#define RSP1_BLK_LEN_ERR_S 29 -#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ -#define RSP1_ADDR_ERR_S 30 -#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ -#define RSP1_OUT_OF_RANGE_S 31 - -#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ -#define RSP5_DATA_S 0 -#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ -#define RSP5_FLAGS_S 8 -#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ -#define RSP5_STUFF_S 16 - -/* ---------------------------------------------- - * SDIO Command Response structures for SPI mode - * ---------------------------------------------- - */ -#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ -#define SPIRSP4_IO_OCR_S 0 -#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ -#define SPIRSP4_STUFF_S 16 -#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ -#define SPIRSP4_MEM_PRESENT_S 19 -#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ -#define SPIRSP4_NUM_FUNCS_S 20 -#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ -#define SPIRSP4_CARD_READY_S 23 -#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ -#define SPIRSP4_IDLE_STATE_S 24 -#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP4_ILLEGAL_CMD_S 26 -#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP4_COM_CRC_ERROR_S 27 -#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP4_FUNC_NUM_ERROR_S 28 -#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP4_PARAM_ERROR_S 30 -#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP4_START_BIT_S 31 - -#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ -#define SPIRSP5_DATA_S 16 -#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ -#define SPIRSP5_IDLE_STATE_S 24 -#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP5_ILLEGAL_CMD_S 26 -#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP5_COM_CRC_ERROR_S 27 -#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP5_FUNC_NUM_ERROR_S 28 -#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP5_PARAM_ERROR_S 30 -#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP5_START_BIT_S 31 - -/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ -#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error - */ -#define RSP6STAT_AKE_SEQ_ERROR_S 3 -#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP6STAT_APP_CMD_S 5 -#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data - * (buff empty) - */ -#define RSP6STAT_READY_FOR_DATA_S 8 -#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at - * Cmd reception - */ -#define RSP6STAT_CURR_STATE_S 9 -#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 - */ -#define RSP6STAT_ERROR_S 13 -#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for - * card state Bit 22 - */ -#define RSP6STAT_ILLEGAL_CMD_S 14 -#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command - * failed Bit 23 - */ -#define RSP6STAT_COM_CRC_ERROR_S 15 - -#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ -#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE - -#endif /* def BCMSDIO */ -#endif /* _SDIO_H */ diff --git a/drivers/staging/brcm80211/include/bcmsdh.h b/drivers/staging/brcm80211/include/bcmsdh.h index 3b57dc1..ba3fd62 100644 --- a/drivers/staging/brcm80211/include/bcmsdh.h +++ b/drivers/staging/brcm80211/include/bcmsdh.h @@ -38,6 +38,27 @@ extern const uint bcmsdh_msglevel; #define BCMSDH_INFO(x) #endif /* BCMDBG */ +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 + +#define SDIOD_FBR_SIZE 0x100 + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 +#define SDIO_FUNC_ENABLE_2 0x04 + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 +#define SDIO_FUNC_READY_2 0x04 + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 +#define INTR_STATUS_FUNC2 0x4 + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_IOFUNCS 7 + /* forward declarations */ typedef struct bcmsdh_info bcmsdh_info_t; typedef void (*bcmsdh_cb_fn_t) (void *); -- cgit v0.10.2 From 96a0ec20d7b1beabec70c11220471118a5ec1acd Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:41 +0200 Subject: staging: brcm80211: remove sdioh.h from fullmac Remove unused head file Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 6b2a450..3cea01f 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -20,7 +20,6 @@ #include #include #include -#include /* SDIO Host Controller Specification */ #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdioh.h b/drivers/staging/brcm80211/brcmfmac/sdioh.h deleted file mode 100644 index f96aaf9..0000000 --- a/drivers/staging/brcm80211/brcmfmac/sdioh.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SDIOH_H -#define _SDIOH_H - -#define SD_SysAddr 0x000 -#define SD_BlockSize 0x004 -#define SD_BlockCount 0x006 -#define SD_Arg0 0x008 -#define SD_Arg1 0x00A -#define SD_TransferMode 0x00C -#define SD_Command 0x00E -#define SD_Response0 0x010 -#define SD_Response1 0x012 -#define SD_Response2 0x014 -#define SD_Response3 0x016 -#define SD_Response4 0x018 -#define SD_Response5 0x01A -#define SD_Response6 0x01C -#define SD_Response7 0x01E -#define SD_BufferDataPort0 0x020 -#define SD_BufferDataPort1 0x022 -#define SD_PresentState 0x024 -#define SD_HostCntrl 0x028 -#define SD_PwrCntrl 0x029 -#define SD_BlockGapCntrl 0x02A -#define SD_WakeupCntrl 0x02B -#define SD_ClockCntrl 0x02C -#define SD_TimeoutCntrl 0x02E -#define SD_SoftwareReset 0x02F -#define SD_IntrStatus 0x030 -#define SD_ErrorIntrStatus 0x032 -#define SD_IntrStatusEnable 0x034 -#define SD_ErrorIntrStatusEnable 0x036 -#define SD_IntrSignalEnable 0x038 -#define SD_ErrorIntrSignalEnable 0x03A -#define SD_CMD12ErrorStatus 0x03C -#define SD_Capabilities 0x040 -#define SD_Capabilities_Reserved 0x044 -#define SD_MaxCurCap 0x048 -#define SD_MaxCurCap_Reserved 0x04C -#define SD_ADMA_SysAddr 0x58 -#define SD_SlotInterruptStatus 0x0FC -#define SD_HostControllerVersion 0x0FE - -/* SD specific registers in PCI config space */ -#define SD_SlotInfo 0x40 - -#endif /* _SDIOH_H */ -- cgit v0.10.2 From 583c3827f1b3d67d1443d8198d50c38d7bbb485c Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:42 +0200 Subject: staging: brcm80211: clean up wl_cfg80211.h in fullmac Remove #include lines in wl_cfg80211.h Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index f495d4b..fbc9abd 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -16,6 +16,7 @@ #include #include /* request_irq() */ #include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index b023fc8..6ba50bb 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h index 4bd0392..33fb03a 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h @@ -17,10 +17,6 @@ #ifndef _wl_cfg80211_h_ #define _wl_cfg80211_h_ -#include -#include -#include - struct wl_conf; struct wl_iface; struct wl_priv; -- cgit v0.10.2 From b64f7a667569f8773278b72e285272c93b504c15 Mon Sep 17 00:00:00 2001 From: Franky Lin Date: Wed, 1 Jun 2011 13:45:43 +0200 Subject: staging: brcm80211: clean up wl_iw.h in fullmac Remove #include lines in wl_iw.h Signed-off-by: Franky Lin Reviewed-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c index a3ea415..a942333 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c @@ -23,8 +23,6 @@ #include #include -#include - #define WL_ERROR(fmt, args...) printk(fmt, ##args) #define WL_TRACE(fmt, args...) no_printk(fmt, ##args) diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index da052e7e..47960de 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.h b/drivers/staging/brcm80211/brcmfmac/wl_iw.h index c92a8b5..aa8902c 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.h @@ -17,8 +17,6 @@ #ifndef _wl_iw_h_ #define _wl_iw_h_ -#include - #define WL_SCAN_PARAMS_SSID_MAX 10 #define GET_SSID "SSID=" #define GET_CHANNEL "CH=" -- cgit v0.10.2 From 8817f75429a18e8ceb4aa24bb7ae6c6019f36d70 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:44 +0200 Subject: staging: brcm80211: removed wl_ (vendor specific acronym) Replaced by brcms_, which is short hand for 'Broadcom softmac'. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 763ccde..edc2d55 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -46,7 +46,7 @@ static struct sdio_func *cfg80211_sdio_func; static struct wl_dev *wl_cfg80211_dev; static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; -u32 wl_dbg_level = WL_DBG_ERR; +u32 brcmf_dbg_level = WL_DBG_ERR; #define WL_4329_FW_FILE "brcm/bcm4329-fullmac-4.bin" #define WL_4329_NVRAM_FILE "brcm/bcm4329-fullmac-4.txt" diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h index 33fb03a..2469b90 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h @@ -34,7 +34,7 @@ struct wl_ibss; #define WL_ERR(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_ERR) { \ + if (brcmf_dbg_level & WL_DBG_ERR) { \ if (net_ratelimit()) { \ printk(KERN_ERR "ERROR @%s : " fmt, \ __func__, ##args); \ @@ -45,7 +45,7 @@ do { \ #if (defined BCMDBG) #define WL_INFO(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_INFO) { \ + if (brcmf_dbg_level & WL_DBG_INFO) { \ if (net_ratelimit()) { \ printk(KERN_ERR "INFO @%s : " fmt, \ __func__, ##args); \ @@ -55,7 +55,7 @@ do { \ #define WL_TRACE(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_TRACE) { \ + if (brcmf_dbg_level & WL_DBG_TRACE) { \ if (net_ratelimit()) { \ printk(KERN_ERR "TRACE @%s : " fmt, \ __func__, ##args); \ @@ -65,7 +65,7 @@ do { \ #define WL_SCAN(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_SCAN) { \ + if (brcmf_dbg_level & WL_DBG_SCAN) { \ if (net_ratelimit()) { \ printk(KERN_ERR "SCAN @%s : " fmt, \ __func__, ##args); \ @@ -75,7 +75,7 @@ do { \ #define WL_CONN(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_CONN) { \ + if (brcmf_dbg_level & WL_DBG_CONN) { \ if (net_ratelimit()) { \ printk(KERN_ERR "CONN @%s : " fmt, \ __func__, ##args); \ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 47960de..974a6e0 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -69,7 +69,7 @@ wl_iw_extra_params_t g_wl_iw_params; extern bool wl_iw_conn_status_str(u32 event_type, u32 status, u32 reason, char *stringBuf, uint buflen); -uint wl_msg_level = WL_ERROR_VAL; +uint brcm_msg_level = LOG_ERROR_VAL; #define MAX_WLIW_IOCTL_LEN 1024 diff --git a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h index 8cc6b1a..253c464 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h @@ -19,74 +19,15 @@ #include /* dev_err() */ -/* wl_msg_level is a bit vector with defs in bcmdefs.h */ -extern u32 wl_msg_level; +/* brcm_msg_level is a bit vector with defs in bcmdefs.h */ +extern u32 brcm_msg_level; #define BCMMSG(dev, fmt, args...) \ do { \ - if (wl_msg_level & WL_TRACE_VAL) \ + if (brcm_msg_level & LOG_TRACE_VAL) \ wiphy_err(dev, "%s: " fmt, __func__, ##args); \ } while (0) -#ifdef BCMDBG - - -/* Extra message control for AMPDU debugging */ -#define WL_AMPDU_UPDN_VAL 0x00000001 /* Config up/down related */ -#define WL_AMPDU_ERR_VAL 0x00000002 /* Calls to beaocn update */ -#define WL_AMPDU_TX_VAL 0x00000004 /* Transmit data path */ -#define WL_AMPDU_RX_VAL 0x00000008 /* Receive data path */ -#define WL_AMPDU_CTL_VAL 0x00000010 /* TSF-related items */ -#define WL_AMPDU_HW_VAL 0x00000020 /* AMPDU_HW */ -#define WL_AMPDU_HWTXS_VAL 0x00000040 /* AMPDU_HWTXS */ -#define WL_AMPDU_HWDBG_VAL 0x00000080 /* AMPDU_DBG */ - -extern u32 wl_ampdu_dbg; - -#define WL_AMPDU_PRINT(level, fmt, args...) \ -do { \ - if (wl_ampdu_dbg & level) { \ - WL_AMPDU(fmt, ##args); \ - } \ -} while (0) - -#define WL_AMPDU_UPDN(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_UPDN_VAL, fmt, ##args) -#define WL_AMPDU_RX(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_RX_VAL, fmt, ##args) -#define WL_AMPDU_ERR(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_ERR_VAL, fmt, ##args) -#define WL_AMPDU_TX(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_TX_VAL, fmt, ##args) -#define WL_AMPDU_CTL(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_CTL_VAL, fmt, ##args) -#define WL_AMPDU_HW(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HW_VAL, fmt, ##args) -#define WL_AMPDU_HWTXS(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HWTXS_VAL, fmt, ##args) -#define WL_AMPDU_HWDBG(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HWDBG_VAL, fmt, ##args) -#define WL_AMPDU_ERR_ON() (wl_ampdu_dbg & WL_AMPDU_ERR_VAL) -#define WL_AMPDU_HW_ON() (wl_ampdu_dbg & WL_AMPDU_HW_VAL) -#define WL_AMPDU_HWTXS_ON() (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL) - -#else /* BCMDBG */ - - -#define WL_AMPDU_UPDN(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_RX(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_ERR(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_TX(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_CTL(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HW(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HWTXS(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HWDBG(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_ERR_ON() 0 -#define WL_AMPDU_HW_ON() 0 -#define WL_AMPDU_HWTXS_ON() 0 - -#endif /* BCMDBG */ - -#define WL_ERROR_ON() (wl_msg_level & WL_ERROR_VAL) +#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) #endif /* _wl_dbg_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_export.h b/drivers/staging/brcm80211/brcmsmac/wl_export.h index 0fe0b24..01d3696 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_export.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_export.h @@ -18,30 +18,30 @@ #define _wl_export_h_ /* misc callbacks */ -struct wl_info; -struct wl_if; +struct brcms_info; +struct brcms_if; struct wlc_if; -extern void wl_init(struct wl_info *wl); -extern uint wl_reset(struct wl_info *wl); -extern void wl_intrson(struct wl_info *wl); -extern u32 wl_intrsoff(struct wl_info *wl); -extern void wl_intrsrestore(struct wl_info *wl, u32 macintmask); -extern int wl_up(struct wl_info *wl); -extern void wl_down(struct wl_info *wl); -extern void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, - int prio); -extern bool wl_alloc_dma_resources(struct wl_info *wl, uint dmaddrwidth); -extern bool wl_rfkill_set_hw_state(struct wl_info *wl); +extern void brcms_init(struct brcms_info *wl); +extern uint brcms_reset(struct brcms_info *wl); +extern void brcms_intrson(struct brcms_info *wl); +extern u32 brcms_intrsoff(struct brcms_info *wl); +extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); +extern int brcms_up(struct brcms_info *wl); +extern void brcms_down(struct brcms_info *wl); +extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio); +extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); +extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); /* timer functions */ -struct wl_timer; -extern struct wl_timer *wl_init_timer(struct wl_info *wl, +struct brcms_timer; +extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, void (*fn) (void *arg), void *arg, const char *name); -extern void wl_free_timer(struct wl_info *wl, struct wl_timer *timer); -extern void wl_add_timer(struct wl_info *wl, struct wl_timer *timer, uint ms, - int periodic); -extern bool wl_del_timer(struct wl_info *wl, struct wl_timer *timer); -extern void wl_msleep(struct wl_info *wl, uint ms); +extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, + uint ms, int periodic); +extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_msleep(struct brcms_info *wl, uint ms); #endif /* _wl_export_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c index 6856a60..cc2ed78 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c @@ -47,8 +47,28 @@ #define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ -static void wl_timer(unsigned long data); -static void _wl_timer(struct wl_timer *t); +#define LOCK(wl) spin_lock_bh(&(wl)->lock) +#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) + +/* locking from inside brcms_isr */ +#define ISR_LOCK(wl, flags)\ + do {\ + spin_lock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +#define ISR_UNLOCK(wl, flags)\ + do {\ + spin_unlock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +/* locking under LOCK() to synchronize with brcms_isr */ +#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) +#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) + +static void brcms_timer(unsigned long data); +static void _brcms_timer(struct brcms_timer *t); static int ieee_hw_init(struct ieee80211_hw *hw); @@ -65,22 +85,20 @@ static int wl_linux_watchdog(void *ctx); FIF_OTHER_BSS | \ FIF_BCN_PRBRESP_PROMISC) -static int wl_found; +static int n_adapters_found; -#define WL_DEV_IF(dev) ((struct wl_if *)netdev_priv(dev)) -#define WL_INFO(dev) ((struct wl_info *)(WL_DEV_IF(dev)->wl)) -static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev); -static void wl_release_fw(struct wl_info *wl); +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); +static void brcms_release_fw(struct brcms_info *wl); /* local prototypes */ -static void wl_dpc(unsigned long data); -static irqreturn_t wl_isr(int irq, void *dev_id); +static void brcms_dpc(unsigned long data); +static irqreturn_t brcms_isr(int irq, void *dev_id); -static int __devinit wl_pci_probe(struct pci_dev *pdev, +static int __devinit brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); -static void wl_remove(struct pci_dev *pdev); -static void wl_free(struct wl_info *wl); -static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); +static void brcms_remove(struct pci_dev *pdev); +static void brcms_free(struct brcms_info *wl); +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); @@ -88,7 +106,7 @@ MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); MODULE_LICENSE("Dual BSD/GPL"); /* recognized PCI IDs */ -static struct pci_device_id wl_id_table[] = { +static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ @@ -97,7 +115,7 @@ static struct pci_device_id wl_id_table[] = { {0} }; -MODULE_DEVICE_TABLE(pci, wl_id_table); +MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); #ifdef BCMDBG static int msglevel = 0xdeadbeef; @@ -110,51 +128,52 @@ module_param(phymsglevel, int, 0); #define WL_TO_HW(wl) (wl->pub->ieee_hw) /* MAC80211 callback functions */ -static int wl_ops_start(struct ieee80211_hw *hw); -static void wl_ops_stop(struct ieee80211_hw *hw); -static int wl_ops_add_interface(struct ieee80211_hw *hw, +static int brcms_ops_start(struct ieee80211_hw *hw); +static void brcms_ops_stop(struct ieee80211_hw *hw); +static int brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif); -static void wl_ops_remove_interface(struct ieee80211_hw *hw, +static void brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif); -static int wl_ops_config(struct ieee80211_hw *hw, u32 changed); -static void wl_ops_bss_info_changed(struct ieee80211_hw *hw, +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); +static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed); -static void wl_ops_configure_filter(struct ieee80211_hw *hw, +static void brcms_ops_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *total_flags, u64 multicast); -static int wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, +static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); -static void wl_ops_sw_scan_start(struct ieee80211_hw *hw); -static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw); -static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); -static int wl_ops_get_stats(struct ieee80211_hw *hw, +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); +static int brcms_ops_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats); -static void wl_ops_sta_notify(struct ieee80211_hw *hw, +static void brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta); -static int wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, +static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *params); -static u64 wl_ops_get_tsf(struct ieee80211_hw *hw); -static int wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); +static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta); -static int wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int wl_ops_ampdu_action(struct ieee80211_hw *hw, +static int brcms_ops_sta_remove(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn, u8 buf_size); -static void wl_ops_rfkill_poll(struct ieee80211_hw *hw); -static void wl_ops_flush(struct ieee80211_hw *hw, bool drop); +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); -static void wl_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) +static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; - WL_LOCK(wl); + LOCK(wl); if (!wl->pub->up) { wiphy_err(wl->wiphy, "ops->tx called while down\n"); kfree_skb(skb); @@ -162,36 +181,36 @@ static void wl_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) } wlc_sendpkt_mac80211(wl->wlc, skb, hw); done: - WL_UNLOCK(wl); + UNLOCK(wl); } -static int wl_ops_start(struct ieee80211_hw *hw) +static int brcms_ops_start(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; bool blocked; /* struct ieee80211_channel *curchan = hw->conf.channel; */ ieee80211_wake_queues(hw); - WL_LOCK(wl); - blocked = wl_rfkill_set_hw_state(wl); - WL_UNLOCK(wl); + LOCK(wl); + blocked = brcms_rfkill_set_hw_state(wl); + UNLOCK(wl); if (!blocked) wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); return 0; } -static void wl_ops_stop(struct ieee80211_hw *hw) +static void brcms_ops_stop(struct ieee80211_hw *hw) { ieee80211_stop_queues(hw); } static int -wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { - struct wl_info *wl; + struct brcms_info *wl; int err; /* Just STA for now */ @@ -206,28 +225,28 @@ wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) } wl = HW_TO_WL(hw); - WL_LOCK(wl); - err = wl_up(wl); - WL_UNLOCK(wl); + LOCK(wl); + err = brcms_up(wl); + UNLOCK(wl); if (err != 0) { - wiphy_err(hw->wiphy, "%s: wl_up() returned %d\n", __func__, + wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, err); } return err; } static void -wl_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { - struct wl_info *wl; + struct brcms_info *wl; wl = HW_TO_WL(hw); /* put driver in down state */ - WL_LOCK(wl); - wl_down(wl); - WL_UNLOCK(wl); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); } /* @@ -237,7 +256,7 @@ static int ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, enum nl80211_channel_type type) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int err = 0; switch (type) { @@ -258,15 +277,15 @@ ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, return err; } -static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) { struct ieee80211_conf *conf = &hw->conf; - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int err = 0; int new_int; struct wiphy *wiphy = hw->wiphy; - WL_LOCK(wl); + LOCK(wl); if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) < 0) { @@ -320,16 +339,16 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) } config_out: - WL_UNLOCK(wl); + UNLOCK(wl); return err; } static void -wl_ops_bss_info_changed(struct ieee80211_hw *hw, +brcms_ops_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); struct wiphy *wiphy = hw->wiphy; int val; @@ -339,9 +358,9 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, */ wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, __func__, info->assoc ? "" : "dis"); - WL_LOCK(wl); + LOCK(wl); wlc_associate_upd(wl->wlc, info->assoc); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_ERP_SLOT) { /* slot timing changed */ @@ -349,23 +368,23 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, val = 1; else val = 0; - WL_LOCK(wl); + LOCK(wl); wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_HT) { /* 802.11n parameters changed */ u16 mode = info->ht_operation_mode; - WL_LOCK(wl); + LOCK(wl); wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, mode & IEEE80211_HT_OP_MODE_PROTECTION); wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BASIC_RATES) { struct ieee80211_supported_band *bi; @@ -375,10 +394,10 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, int error; /* retrieve the current rates */ - WL_LOCK(wl); + LOCK(wl); error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, &rs, sizeof(rs), NULL); - WL_UNLOCK(wl); + UNLOCK(wl); if (error) { wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", __func__, error); @@ -391,27 +410,27 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, rate = (bi->bitrates[i].bitrate << 1) / 10; /* set/clear basic rate flag */ - wl_set_basic_rate(&rs, rate, br_mask & 1); + brcms_set_basic_rate(&rs, rate, br_mask & 1); br_mask >>= 1; } /* update the rate set */ - WL_LOCK(wl); + LOCK(wl); wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BEACON_INT) { /* Beacon interval changed */ - WL_LOCK(wl); + LOCK(wl); wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BSSID) { /* BSSID changed, for whatever reason (IBSS and managed mode) */ - WL_LOCK(wl); + LOCK(wl); wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, info->bssid); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BEACON) { /* Beacon data changed, retrieve new beacon (beaconing modes) */ @@ -456,11 +475,11 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, } static void -wl_ops_configure_filter(struct ieee80211_hw *hw, +brcms_ops_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *total_flags, u64 multicast) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; struct wiphy *wiphy = hw->wiphy; changed_flags &= MAC_FILTERS; @@ -478,7 +497,7 @@ wl_ops_configure_filter(struct ieee80211_hw *hw, if (changed_flags & FIF_OTHER_BSS) wiphy_err(wiphy, "FIF_OTHER_BSS\n"); if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { - WL_LOCK(wl); + LOCK(wl); if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; wlc_mac_bcn_promisc_change(wl->wlc, 1); @@ -486,60 +505,60 @@ wl_ops_configure_filter(struct ieee80211_hw *hw, wlc_mac_bcn_promisc_change(wl->wlc, 0); wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; } - WL_UNLOCK(wl); + UNLOCK(wl); } return; } static int -wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) +brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) { return 0; } -static void wl_ops_sw_scan_start(struct ieee80211_hw *hw) +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; - WL_LOCK(wl); + struct brcms_info *wl = hw->priv; + LOCK(wl); wlc_scan_start(wl->wlc); - WL_UNLOCK(wl); + UNLOCK(wl); return; } -static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw) +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; - WL_LOCK(wl); + struct brcms_info *wl = hw->priv; + LOCK(wl); wlc_scan_stop(wl->wlc); - WL_UNLOCK(wl); + UNLOCK(wl); return; } -static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) { wiphy_err(hw->wiphy, "%s: Enter\n", __func__); return; } static int -wl_ops_get_stats(struct ieee80211_hw *hw, +brcms_ops_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; struct wl_cnt *cnt; - WL_LOCK(wl); + LOCK(wl); cnt = wl->pub->_cnt; stats->dot11ACKFailureCount = 0; stats->dot11RTSFailureCount = 0; stats->dot11FCSErrorCount = 0; stats->dot11RTSSuccessCount = 0; - WL_UNLOCK(wl); + UNLOCK(wl); return 0; } static void -wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta) { switch (cmd) { @@ -552,32 +571,32 @@ wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, } static int -wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, +brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *params) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; - WL_LOCK(wl); + LOCK(wl); wlc_wme_setparams(wl->wlc, queue, params, true); - WL_UNLOCK(wl); + UNLOCK(wl); return 0; } -static u64 wl_ops_get_tsf(struct ieee80211_hw *hw) +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) { wiphy_err(hw->wiphy, "%s: Enter\n", __func__); return 0; } static int -wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct scb *scb; int i; - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; /* Init the scb */ scb = (struct scb *)sta->drv_priv; @@ -606,21 +625,21 @@ wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, } static int -wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { return 0; } static int -wl_ops_ampdu_action(struct ieee80211_hw *hw, +brcms_ops_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn, u8 buf_size) { struct scb *scb = (struct scb *)sta->drv_priv; - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; int status; if (WARN_ON(scb->magic != SCB_MAGIC)) @@ -631,9 +650,9 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw, case IEEE80211_AMPDU_RX_STOP: break; case IEEE80211_AMPDU_TX_START: - WL_LOCK(wl); + LOCK(wl); status = wlc_aggregatable(wl->wlc, tid); - WL_UNLOCK(wl); + UNLOCK(wl); if (!status) { wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", tid); @@ -645,9 +664,9 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw, break; case IEEE80211_AMPDU_TX_STOP: - WL_LOCK(wl); + LOCK(wl); wlc_ampdu_flush(wl->wlc, sta, tid); - WL_UNLOCK(wl); + UNLOCK(wl); ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); break; case IEEE80211_AMPDU_TX_OPERATIONAL: @@ -662,58 +681,58 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw, return 0; } -static void wl_ops_rfkill_poll(struct ieee80211_hw *hw) +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); bool blocked; - WL_LOCK(wl); + LOCK(wl); blocked = wlc_check_radio_disabled(wl->wlc); - WL_UNLOCK(wl); + UNLOCK(wl); wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); } -static void wl_ops_flush(struct ieee80211_hw *hw, bool drop) +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); /* wait for packet queue and dma fifos to run empty */ - WL_LOCK(wl); + LOCK(wl); wlc_wait_for_tx_completion(wl->wlc, drop); - WL_UNLOCK(wl); + UNLOCK(wl); } -static const struct ieee80211_ops wl_ops = { - .tx = wl_ops_tx, - .start = wl_ops_start, - .stop = wl_ops_stop, - .add_interface = wl_ops_add_interface, - .remove_interface = wl_ops_remove_interface, - .config = wl_ops_config, - .bss_info_changed = wl_ops_bss_info_changed, - .configure_filter = wl_ops_configure_filter, - .set_tim = wl_ops_set_tim, - .sw_scan_start = wl_ops_sw_scan_start, - .sw_scan_complete = wl_ops_sw_scan_complete, - .set_tsf = wl_ops_set_tsf, - .get_stats = wl_ops_get_stats, - .sta_notify = wl_ops_sta_notify, - .conf_tx = wl_ops_conf_tx, - .get_tsf = wl_ops_get_tsf, - .sta_add = wl_ops_sta_add, - .sta_remove = wl_ops_sta_remove, - .ampdu_action = wl_ops_ampdu_action, - .rfkill_poll = wl_ops_rfkill_poll, - .flush = wl_ops_flush, +static const struct ieee80211_ops brcms_ops = { + .tx = brcms_ops_tx, + .start = brcms_ops_start, + .stop = brcms_ops_stop, + .add_interface = brcms_ops_add_interface, + .remove_interface = brcms_ops_remove_interface, + .config = brcms_ops_config, + .bss_info_changed = brcms_ops_bss_info_changed, + .configure_filter = brcms_ops_configure_filter, + .set_tim = brcms_ops_set_tim, + .sw_scan_start = brcms_ops_sw_scan_start, + .sw_scan_complete = brcms_ops_sw_scan_complete, + .set_tsf = brcms_ops_set_tsf, + .get_stats = brcms_ops_get_stats, + .sta_notify = brcms_ops_sta_notify, + .conf_tx = brcms_ops_conf_tx, + .get_tsf = brcms_ops_get_tsf, + .sta_add = brcms_ops_sta_add, + .sta_remove = brcms_ops_sta_remove, + .ampdu_action = brcms_ops_ampdu_action, + .rfkill_poll = brcms_ops_rfkill_poll, + .flush = brcms_ops_flush, }; /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ -static int wl_set_hint(struct wl_info *wl, char *abbrev) +static int brcms_set_hint(struct brcms_info *wl, char *abbrev) { return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); } @@ -724,24 +743,25 @@ static int wl_set_hint(struct wl_info *wl, char *abbrev) * Attach to the WL device identified by vendor and device parameters. * regs is a host accessible memory address pointing to WL device registers. * - * wl_attach is not defined as static because in the case where no bus + * brcms_attach is not defined as static because in the case where no bus * is defined, wl_attach will never be called, and thus, gcc will issue * a warning that this function is defined but not used if we declare * it as static. * * - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ -static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, +static struct brcms_info *brcms_attach(u16 vendor, u16 device, + unsigned long regs, uint bustype, void *btparam, uint irq) { - struct wl_info *wl = NULL; + struct brcms_info *wl = NULL; int unit, err; unsigned long base_addr; struct ieee80211_hw *hw; u8 perm[ETH_ALEN]; - unit = wl_found; + unit = n_adapters_found; err = 0; if (unit < 0) { @@ -759,7 +779,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, atomic_set(&wl->callbacks, 0); /* setup the bottom half handler */ - tasklet_init(&wl->tasklet, wl_dpc, (unsigned long) wl); + tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); @@ -782,18 +802,18 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, spin_lock_init(&wl->isr_lock); /* prepare ucode */ - if (wl_request_fw(wl, (struct pci_dev *)btparam) < 0) { + if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); - wl_release_fw(wl); - wl_remove((struct pci_dev *)btparam); + brcms_release_fw(wl); + brcms_remove((struct pci_dev *)btparam); return NULL; } /* common load-time initialization */ wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, wl->regsva, wl->bcm_bustype, btparam, &err); - wl_release_fw(wl); + brcms_release_fw(wl); if (!wl->wlc) { wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", KBUILD_MODNAME, err); @@ -809,7 +829,7 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, } /* register our interrupt handler */ - if (request_irq(irq, wl_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { + if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); goto fail; } @@ -836,19 +856,19 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, } if (wl->pub->srom_ccode[0]) - err = wl_set_hint(wl, wl->pub->srom_ccode); + err = brcms_set_hint(wl, wl->pub->srom_ccode); else - err = wl_set_hint(wl, "US"); + err = brcms_set_hint(wl, "US"); if (err) { wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", __func__, err); } - wl_found++; + n_adapters_found++; return wl; fail: - wl_free(wl); + brcms_free(wl); return NULL; } @@ -863,7 +883,7 @@ fail: .max_power = 19, \ } -static struct ieee80211_channel wl_2ghz_chantable[] = { +static struct ieee80211_channel brcms_2ghz_chantable[] = { CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), @@ -895,7 +915,7 @@ static struct ieee80211_channel wl_2ghz_chantable[] = { .max_power = 21, \ } -static struct ieee80211_channel wl_5ghz_nphy_chantable[] = { +static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { /* UNII-1 */ CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), @@ -963,7 +983,7 @@ static struct ieee80211_channel wl_5ghz_nphy_chantable[] = { .hw_value = (rate100m / 5), \ } -static struct ieee80211_rate wl_legacy_ratetable[] = { +static struct ieee80211_rate legacy_ratetable[] = { RATE(10, 0), RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), @@ -978,12 +998,12 @@ static struct ieee80211_rate wl_legacy_ratetable[] = { RATE(540, 0), }; -static struct ieee80211_supported_band wl_band_2GHz_nphy = { +static struct ieee80211_supported_band brcms_band_2GHz_nphy = { .band = IEEE80211_BAND_2GHZ, - .channels = wl_2ghz_chantable, - .n_channels = ARRAY_SIZE(wl_2ghz_chantable), - .bitrates = wl_legacy_ratetable, - .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable), + .channels = brcms_2ghz_chantable, + .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), + .bitrates = legacy_ratetable, + .n_bitrates = ARRAY_SIZE(legacy_ratetable), .ht_cap = { /* from include/linux/ieee80211.h */ .cap = IEEE80211_HT_CAP_GRN_FLD | @@ -1000,12 +1020,12 @@ static struct ieee80211_supported_band wl_band_2GHz_nphy = { } }; -static struct ieee80211_supported_band wl_band_5GHz_nphy = { +static struct ieee80211_supported_band brcms_band_5GHz_nphy = { .band = IEEE80211_BAND_5GHZ, - .channels = wl_5ghz_nphy_chantable, - .n_channels = ARRAY_SIZE(wl_5ghz_nphy_chantable), - .bitrates = wl_legacy_ratetable + 4, - .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable) - 4, + .channels = brcms_5ghz_nphy_chantable, + .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), + .bitrates = legacy_ratetable + 4, + .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, .ht_cap = { /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ @@ -1021,11 +1041,11 @@ static struct ieee80211_supported_band wl_band_5GHz_nphy = { }; /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ static int ieee_hw_rate_init(struct ieee80211_hw *hw) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int has_5g; char phy_list[4]; @@ -1041,10 +1061,10 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) if (phy_list[0] == 'n' || phy_list[0] == 'c') { if (phy_list[0] == 'c') { /* Single stream */ - wl_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; - wl_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; } - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl_band_2GHz_nphy; + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; } else { return -EPERM; } @@ -1054,7 +1074,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) has_5g++; if (phy_list[0] == 'n' || phy_list[0] == 'c') { hw->wiphy->bands[IEEE80211_BAND_5GHZ] = - &wl_band_5GHz_nphy; + &brcms_band_5GHz_nphy; } else { return -EPERM; } @@ -1063,7 +1083,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) } /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ static int ieee_hw_init(struct ieee80211_hw *hw) { @@ -1094,15 +1114,15 @@ static int ieee_hw_init(struct ieee80211_hw *hw) * determines if a device is a WL device, and if so, attaches it. * * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a wl_attach() on it. + * and if so, performs a brcms_attach() on it. * * Perimeter lock is initialized in the course of this function. */ static int __devinit -wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { int rc; - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; u32 val; @@ -1130,7 +1150,7 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if ((val & 0x0000ff00) != 0) pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - hw = ieee80211_alloc_hw(sizeof(struct wl_info), &wl_ops); + hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); if (!hw) { pr_err("%s: ieee80211_alloc_hw failed\n", __func__); return -ENOMEM; @@ -1142,43 +1162,44 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) memset(hw->priv, 0, sizeof(*wl)); - wl = wl_attach(pdev->vendor, pdev->device, pci_resource_start(pdev, 0), - PCI_BUS, pdev, pdev->irq); + wl = brcms_attach(pdev->vendor, pdev->device, + pci_resource_start(pdev, 0), PCI_BUS, pdev, + pdev->irq); if (!wl) { - pr_err("%s: %s: wl_attach failed!\n", KBUILD_MODNAME, + pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, __func__); return -ENODEV; } return 0; } -static int wl_suspend(struct pci_dev *pdev, pm_message_t state) +static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; hw = pci_get_drvdata(pdev); wl = HW_TO_WL(hw); if (!wl) { wiphy_err(wl->wiphy, - "wl_suspend: pci_get_drvdata failed\n"); + "brcms_suspend: pci_get_drvdata failed\n"); return -ENODEV; } /* only need to flag hw is down for proper resume */ - WL_LOCK(wl); + LOCK(wl); wl->pub->hw_up = false; - WL_UNLOCK(wl); + UNLOCK(wl); pci_save_state(pdev); pci_disable_device(pdev); return pci_set_power_state(pdev, PCI_D3hot); } -static int wl_resume(struct pci_dev *pdev) +static int brcms_resume(struct pci_dev *pdev) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; int err = 0; u32 val; @@ -1187,7 +1208,7 @@ static int wl_resume(struct pci_dev *pdev) wl = HW_TO_WL(hw); if (!wl) { wiphy_err(wl->wiphy, - "wl: wl_resume: pci_get_drvdata failed\n"); + "wl: brcms_resume: pci_get_drvdata failed\n"); return -ENODEV; } @@ -1209,81 +1230,82 @@ static int wl_resume(struct pci_dev *pdev) /* * done. driver will be put in up state - * in wl_ops_add_interface() call. + * in brcms_ops_add_interface() call. */ return err; } /* -* called from both kernel as from wl_*() +* called from both kernel as from this kernel module. * precondition: perimeter lock is not acquired. */ -static void wl_remove(struct pci_dev *pdev) +static void brcms_remove(struct pci_dev *pdev) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; int status; hw = pci_get_drvdata(pdev); wl = HW_TO_WL(hw); if (!wl) { - pr_err("wl: wl_remove: pci_get_drvdata failed\n"); + pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); return; } - WL_LOCK(wl); + LOCK(wl); status = wlc_chipmatch(pdev->vendor, pdev->device); - WL_UNLOCK(wl); + UNLOCK(wl); if (!status) { - wiphy_err(wl->wiphy, "wl: wl_remove: wlc_chipmatch failed\n"); + wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch " + "failed\n"); return; } if (wl->wlc) { wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); ieee80211_unregister_hw(hw); - WL_LOCK(wl); - wl_down(wl); - WL_UNLOCK(wl); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); } pci_disable_device(pdev); - wl_free(wl); + brcms_free(wl); pci_set_drvdata(pdev, NULL); ieee80211_free_hw(hw); } -static struct pci_driver wl_pci_driver = { +static struct pci_driver brcms_pci_driver = { .name = KBUILD_MODNAME, - .probe = wl_pci_probe, - .suspend = wl_suspend, - .resume = wl_resume, - .remove = __devexit_p(wl_remove), - .id_table = wl_id_table, + .probe = brcms_pci_probe, + .suspend = brcms_suspend, + .resume = brcms_resume, + .remove = __devexit_p(brcms_remove), + .id_table = brcms_pci_id_table, }; /** * This is the main entry point for the WL driver. * * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a wl_attach() on it. + * and if so, performs a brcms_attach() on it. * */ -static int __init wl_module_init(void) +static int __init brcms_module_init(void) { int error = -ENODEV; #ifdef BCMDBG if (msglevel != 0xdeadbeef) - wl_msg_level = msglevel; + brcm_msg_level = msglevel; else { char *var = getvar(NULL, "wl_msglevel"); if (var) { unsigned long value; (void)strict_strtoul(var, 0, &value); - wl_msg_level = value; + brcm_msg_level = value; } } if (phymsglevel != 0xdeadbeef) @@ -1299,7 +1321,7 @@ static int __init wl_module_init(void) } #endif /* BCMDBG */ - error = pci_register_driver(&wl_pci_driver); + error = pci_register_driver(&brcms_pci_driver); if (!error) return 0; @@ -1315,14 +1337,14 @@ static int __init wl_module_init(void) * system. * */ -static void __exit wl_module_exit(void) +static void __exit brcms_module_exit(void) { - pci_unregister_driver(&wl_pci_driver); + pci_unregister_driver(&brcms_pci_driver); } -module_init(wl_module_init); -module_exit(wl_module_exit); +module_init(brcms_module_init); +module_exit(brcms_module_exit); /** * This function frees the WL per-device resources. @@ -1333,13 +1355,13 @@ module_exit(wl_module_exit); * precondition: can both be called locked and unlocked * */ -static void wl_free(struct wl_info *wl) +static void brcms_free(struct brcms_info *wl) { - struct wl_timer *t, *next; + struct brcms_timer *t, *next; /* free ucode data */ if (wl->fw.fw_cnt) - wl_ucode_data_free(); + brcms_ucode_data_free(); if (wl->irq) free_irq(wl->irq, wl); @@ -1384,7 +1406,7 @@ static void wl_free(struct wl_info *wl) } /* flags the given rate in rateset as requested */ -static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) { u32 i; @@ -1403,8 +1425,8 @@ static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) /* * precondition: perimeter lock has been acquired */ -void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, - int prio) +void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio) { wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); } @@ -1412,10 +1434,10 @@ void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, /* * precondition: perimeter lock has been acquired */ -void wl_init(struct wl_info *wl) +void brcms_init(struct brcms_info *wl) { BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - wl_reset(wl); + brcms_reset(wl); wlc_init(wl->wlc); } @@ -1423,7 +1445,7 @@ void wl_init(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -uint wl_reset(struct wl_info *wl) +uint brcms_reset(struct brcms_info *wl) { BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); wlc_reset(wl->wlc); @@ -1438,7 +1460,7 @@ uint wl_reset(struct wl_info *wl) * These are interrupt on/off entry points. Disable interrupts * during interrupt state transition. */ -void wl_intrson(struct wl_info *wl) +void brcms_intrson(struct brcms_info *wl) { unsigned long flags; @@ -1450,12 +1472,12 @@ void wl_intrson(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -bool wl_alloc_dma_resources(struct wl_info *wl, uint addrwidth) +bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) { return true; } -u32 wl_intrsoff(struct wl_info *wl) +u32 brcms_intrsoff(struct brcms_info *wl) { unsigned long flags; u32 status; @@ -1466,7 +1488,7 @@ u32 wl_intrsoff(struct wl_info *wl) return status; } -void wl_intrsrestore(struct wl_info *wl, u32 macintmask) +void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) { unsigned long flags; @@ -1478,7 +1500,7 @@ void wl_intrsrestore(struct wl_info *wl, u32 macintmask) /* * precondition: perimeter lock has been acquired */ -int wl_up(struct wl_info *wl) +int brcms_up(struct brcms_info *wl) { int error = 0; @@ -1493,7 +1515,7 @@ int wl_up(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -void wl_down(struct wl_info *wl) +void brcms_down(struct brcms_info *wl) { uint callbacks, ret_val = 0; @@ -1502,25 +1524,25 @@ void wl_down(struct wl_info *wl) callbacks = atomic_read(&wl->callbacks) - ret_val; /* wait for down callbacks to complete */ - WL_UNLOCK(wl); + UNLOCK(wl); /* For HIGH_only driver, it's important to actually schedule other work, * not just spin wait since everything runs at schedule level */ SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); - WL_LOCK(wl); + LOCK(wl); } -static irqreturn_t wl_isr(int irq, void *dev_id) +static irqreturn_t brcms_isr(int irq, void *dev_id) { - struct wl_info *wl; + struct brcms_info *wl; bool ours, wantdpc; unsigned long flags; - wl = (struct wl_info *) dev_id; + wl = (struct brcms_info *) dev_id; - WL_ISRLOCK(wl, flags); + ISR_LOCK(wl, flags); /* call common first level interrupt handler */ ours = wlc_isr(wl->wlc, &wantdpc); @@ -1534,18 +1556,18 @@ static irqreturn_t wl_isr(int irq, void *dev_id) } } - WL_ISRUNLOCK(wl, flags); + ISR_UNLOCK(wl, flags); return IRQ_RETVAL(ours); } -static void wl_dpc(unsigned long data) +static void brcms_dpc(unsigned long data) { - struct wl_info *wl; + struct brcms_info *wl; - wl = (struct wl_info *) data; + wl = (struct brcms_info *) data; - WL_LOCK(wl); + LOCK(wl); /* call the common second level interrupt handler */ if (wl->pub->up) { @@ -1569,27 +1591,27 @@ static void wl_dpc(unsigned long data) tasklet_schedule(&wl->tasklet); else { /* re-enable interrupts */ - wl_intrson(wl); + brcms_intrson(wl); } done: - WL_UNLOCK(wl); + UNLOCK(wl); } /* * is called by the kernel from software irq context */ -static void wl_timer(unsigned long data) +static void brcms_timer(unsigned long data) { - _wl_timer((struct wl_timer *) data); + _brcms_timer((struct brcms_timer *) data); } /* * precondition: perimeter lock is not acquired */ -static void _wl_timer(struct wl_timer *t) +static void _brcms_timer(struct brcms_timer *t) { - WL_LOCK(t->wl); + LOCK(t->wl); if (t->set) { if (t->periodic) { @@ -1605,7 +1627,7 @@ static void _wl_timer(struct wl_timer *t) atomic_dec(&t->wl->callbacks); - WL_UNLOCK(t->wl); + UNLOCK(t->wl); } /* @@ -1614,21 +1636,22 @@ static void _wl_timer(struct wl_timer *t) * * precondition: perimeter lock has been acquired */ -struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg), - void *arg, const char *name) +struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), + void *arg, const char *name) { - struct wl_timer *t; + struct brcms_timer *t; - t = kzalloc(sizeof(struct wl_timer), GFP_ATOMIC); + t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); if (!t) { - wiphy_err(wl->wiphy, "wl%d: wl_init_timer: out of memory\n", + wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", wl->pub->unit); return 0; } init_timer(&t->timer); t->timer.data = (unsigned long) t; - t->timer.function = wl_timer; + t->timer.function = brcms_timer; t->wl = wl; t->fn = fn; t->arg = arg; @@ -1649,7 +1672,8 @@ struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg), * * precondition: perimeter lock has been acquired */ -void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic) +void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, + int periodic) { #ifdef BCMDBG if (t->set) { @@ -1671,7 +1695,7 @@ void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic) * * precondition: perimeter lock has been acquired */ -bool wl_del_timer(struct wl_info *wl, struct wl_timer *t) +bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) { if (t->set) { t->set = false; @@ -1687,12 +1711,12 @@ bool wl_del_timer(struct wl_info *wl, struct wl_timer *t) /* * precondition: perimeter lock has been acquired */ -void wl_free_timer(struct wl_info *wl, struct wl_timer *t) +void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) { - struct wl_timer *tmp; + struct brcms_timer *tmp; /* delete the timer in case it is active */ - wl_del_timer(wl, t); + brcms_del_timer(wl, t); if (wl->timers == t) { wl->timers = wl->timers->next; @@ -1729,13 +1753,13 @@ static int wl_linux_watchdog(void *ctx) return 0; } -struct wl_fw_hdr { +struct firmware_hdr { u32 offset; u32 len; u32 idx; }; -char *wl_firmwares[WL_MAX_FW] = { +char *brcms_firmwares[MAX_FW_IMAGES] = { "brcm/bcm43xx", NULL }; @@ -1743,13 +1767,13 @@ char *wl_firmwares[WL_MAX_FW] = { /* * precondition: perimeter lock has been acquired */ -int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, u32 idx) +int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) { int i, entry; const u8 *pdata; - struct wl_fw_hdr *hdr; + struct firmware_hdr *hdr; for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data; + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i]; entry++, hdr++) { if (hdr->idx == idx) { @@ -1773,16 +1797,16 @@ fail: } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx) +int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) { int i, entry; const u8 *pdata; - struct wl_fw_hdr *hdr; + struct firmware_hdr *hdr; for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data; + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i]; entry++, hdr++) { if (hdr->idx == idx) { @@ -1802,21 +1826,21 @@ int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx) } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) { int status; struct device *device = &pdev->dev; char fw_name[100]; int i; - memset((void *)&wl->fw, 0, sizeof(struct wl_firmware)); - for (i = 0; i < WL_MAX_FW; i++) { - if (wl_firmwares[i] == NULL) + memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); + for (i = 0; i < MAX_FW_IMAGES; i++) { + if (brcms_firmwares[i] == NULL) break; - sprintf(fw_name, "%s-%d.fw", wl_firmwares[i], + sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], UCODE_LOADER_API_VER); status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); if (status) { @@ -1824,7 +1848,7 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) KBUILD_MODNAME, fw_name); return status; } - sprintf(fw_name, "%s_hdr-%d.fw", wl_firmwares[i], + sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], UCODE_LOADER_API_VER); status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); if (status) { @@ -1833,28 +1857,28 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) return status; } wl->fw.hdr_num_entries[i] = - wl->fw.fw_hdr[i]->size / (sizeof(struct wl_fw_hdr)); + wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); } wl->fw.fw_cnt = i; - return wl_ucode_data_init(wl); + return brcms_ucode_data_init(wl); } /* * precondition: can both be called locked and unlocked */ -void wl_ucode_free_buf(void *p) +void brcms_ucode_free_buf(void *p) { kfree(p); } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -static void wl_release_fw(struct wl_info *wl) +static void brcms_release_fw(struct brcms_info *wl) { int i; - for (i = 0; i < WL_MAX_FW; i++) { + for (i = 0; i < MAX_FW_IMAGES; i++) { release_firmware(wl->fw.fw_bin[i]); release_firmware(wl->fw.fw_hdr[i]); } @@ -1864,18 +1888,18 @@ static void wl_release_fw(struct wl_info *wl) /* * checks validity of all firmware images loaded from user space * - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -int wl_check_firmwares(struct wl_info *wl) +int brcms_check_firmwares(struct brcms_info *wl) { int i; int entry; int rc = 0; const struct firmware *fw; const struct firmware *fw_hdr; - struct wl_fw_hdr *ucode_hdr; - for (i = 0; i < WL_MAX_FW && rc == 0; i++) { + struct firmware_hdr *ucode_hdr; + for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { fw = wl->fw.fw_bin[i]; fw_hdr = wl->fw.fw_hdr[i]; if (fw == NULL && fw_hdr == NULL) { @@ -1884,10 +1908,10 @@ int wl_check_firmwares(struct wl_info *wl) wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", __func__); rc = -EBADF; - } else if (fw_hdr->size % sizeof(struct wl_fw_hdr)) { + } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { wiphy_err(wl->wiphy, "%s: non integral fw hdr file " "size %zu/%zu\n", __func__, fw_hdr->size, - sizeof(struct wl_fw_hdr)); + sizeof(struct firmware_hdr)); rc = -EBADF; } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { wiphy_err(wl->wiphy, "%s: out of bounds fw file size " @@ -1895,7 +1919,7 @@ int wl_check_firmwares(struct wl_info *wl) rc = -EBADF; } else { /* check if ucode section overruns firmware image */ - ucode_hdr = (struct wl_fw_hdr *)fw_hdr->data; + ucode_hdr = (struct firmware_hdr *)fw_hdr->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i] && !rc; entry++, ucode_hdr++) { if (ucode_hdr->offset + ucode_hdr->len > @@ -1919,24 +1943,24 @@ int wl_check_firmwares(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -bool wl_rfkill_set_hw_state(struct wl_info *wl) +bool brcms_rfkill_set_hw_state(struct brcms_info *wl) { bool blocked = wlc_check_radio_disabled(wl->wlc); - WL_UNLOCK(wl); + UNLOCK(wl); wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); if (blocked) wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); - WL_LOCK(wl); + LOCK(wl); return blocked; } /* * precondition: perimeter lock has been acquired */ -void wl_msleep(struct wl_info *wl, uint ms) +void brcms_msleep(struct brcms_info *wl, uint ms) { - WL_UNLOCK(wl); + UNLOCK(wl); msleep(ms); - WL_LOCK(wl); + LOCK(wl); } diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h index fafde6a..48ec6b0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h @@ -25,34 +25,34 @@ * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be * submitted to workqueue instead of being on kernel timer */ -struct wl_timer { +struct brcms_timer { struct timer_list timer; - struct wl_info *wl; + struct brcms_info *wl; void (*fn) (void *); void *arg; /* argument to fn */ uint ms; bool periodic; bool set; - struct wl_timer *next; + struct brcms_timer *next; #ifdef BCMDBG char *name; /* Description of the timer */ #endif }; -struct wl_if { +struct brcms_if { uint subunit; /* WDS/BSS unit */ struct pci_dev *pci_dev; }; -#define WL_MAX_FW 4 -struct wl_firmware { +#define MAX_FW_IMAGES 4 +struct brcms_firmware { u32 fw_cnt; - const struct firmware *fw_bin[WL_MAX_FW]; - const struct firmware *fw_hdr[WL_MAX_FW]; - u32 hdr_num_entries[WL_MAX_FW]; + const struct firmware *fw_bin[MAX_FW_IMAGES]; + const struct firmware *fw_hdr[MAX_FW_IMAGES]; + u32 hdr_num_entries[MAX_FW_IMAGES]; }; -struct wl_info { +struct brcms_info { struct wlc_pub *pub; /* pointer to public wlc state */ void *wlc; /* pointer to private common os-independent data */ u32 magic; @@ -62,32 +62,20 @@ struct wl_info { spinlock_t lock; /* per-device perimeter lock */ spinlock_t isr_lock; /* per-device ISR synchronization lock */ - /* bus type and regsva for unmap in wl_free() */ + /* bus type and regsva for unmap in brcms_free() */ uint bcm_bustype; /* bus type */ void *regsva; /* opaque chip registers virtual address */ /* timer related fields */ atomic_t callbacks; /* # outstanding callback functions */ - struct wl_timer *timers; /* timer cleanup queue */ + struct brcms_timer *timers; /* timer cleanup queue */ struct tasklet_struct tasklet; /* dpc tasklet */ bool resched; /* dpc needs to be and is rescheduled */ #ifdef LINUXSTA_PS u32 pci_psstate[16]; /* pci ps-state save/restore */ #endif - struct wl_firmware fw; + struct brcms_firmware fw; struct wiphy *wiphy; }; - -#define WL_LOCK(wl) spin_lock_bh(&(wl)->lock) -#define WL_UNLOCK(wl) spin_unlock_bh(&(wl)->lock) - -/* locking from inside wl_isr */ -#define WL_ISRLOCK(wl, flags) do {spin_lock(&(wl)->isr_lock); (void)(flags); } while (0) -#define WL_ISRUNLOCK(wl, flags) do {spin_unlock(&(wl)->isr_lock); (void)(flags); } while (0) - -/* locking under WL_LOCK() to synchronize with wl_isr */ -#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) -#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) - #endif /* _wl_mac80211_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h b/drivers/staging/brcm80211/brcmsmac/wl_ucode.h index 28838d8..4b90121 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h +++ b/drivers/staging/brcm80211/brcmsmac/wl_ucode.h @@ -41,11 +41,12 @@ extern u32 bcm43xx_16_mimosz; extern u32 *bcm43xx_24_lcn; extern u32 bcm43xx_24_lcnsz; -extern int wl_ucode_data_init(struct wl_info *wl); -extern void wl_ucode_data_free(void); +extern int brcms_ucode_data_init(struct brcms_info *wl); +extern void brcms_ucode_data_free(void); -extern int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, unsigned int idx); -extern int wl_ucode_init_uint(struct wl_info *wl, unsigned *data, +extern int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, + unsigned int idx); +extern int brcms_ucode_init_uint(struct brcms_info *wl, unsigned *data, unsigned int idx); -extern void wl_ucode_free_buf(void *); -extern int wl_check_firmwares(struct wl_info *wl); +extern void brcms_ucode_free_buf(void *); +extern int brcms_check_firmwares(struct brcms_info *wl); diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c index cc00dd1..cf0be6b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c +++ b/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c @@ -53,59 +53,63 @@ u32 bcm43xx_24_lcnsz; u32 *bcm43xx_bommajor; u32 *bcm43xx_bomminor; -int wl_ucode_data_init(struct wl_info *wl) +int brcms_ucode_data_init(struct brcms_info *wl) { int rc; - rc = wl_check_firmwares(wl); + rc = brcms_check_firmwares(wl); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, - D11LCN0BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, + D11LCN0BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn0initvals24, D11LCN0INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, - D11LCN1BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, + D11LCN1BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn1initvals24, D11LCN1INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, - D11LCN2BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, + D11LCN2BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn2initvals24, D11LCN2INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0absinitvals16, - D11N0ABSINITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11n0absinitvals16, + D11N0ABSINITVALS16); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, D11N0BSINITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0initvals16, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0initvals16, D11N0INITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, D11UCODE_OVERSIGHT16_MIMO); - rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_16_mimosz, + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_16_mimosz, D11UCODE_OVERSIGHT16_MIMOSZ); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, D11UCODE_OVERSIGHT24_LCN); - rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_24_lcnsz, + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_24_lcnsz, D11UCODE_OVERSIGHT24_LCNSZ); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, D11UCODE_OVERSIGHT_BOMMAJOR); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, D11UCODE_OVERSIGHT_BOMMINOR); return rc; } -void wl_ucode_data_free(void) +void brcms_ucode_data_free(void) { - wl_ucode_free_buf((void *)d11lcn0bsinitvals24); - wl_ucode_free_buf((void *)d11lcn0initvals24); - wl_ucode_free_buf((void *)d11lcn1bsinitvals24); - wl_ucode_free_buf((void *)d11lcn1initvals24); - wl_ucode_free_buf((void *)d11lcn2bsinitvals24); - wl_ucode_free_buf((void *)d11lcn2initvals24); - wl_ucode_free_buf((void *)d11n0absinitvals16); - wl_ucode_free_buf((void *)d11n0bsinitvals16); - wl_ucode_free_buf((void *)d11n0initvals16); - wl_ucode_free_buf((void *)bcm43xx_16_mimo); - wl_ucode_free_buf((void *)bcm43xx_24_lcn); - wl_ucode_free_buf((void *)bcm43xx_bommajor); - wl_ucode_free_buf((void *)bcm43xx_bomminor); + brcms_ucode_free_buf((void *)d11lcn0bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn0initvals24); + brcms_ucode_free_buf((void *)d11lcn1bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn1initvals24); + brcms_ucode_free_buf((void *)d11lcn2bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn2initvals24); + brcms_ucode_free_buf((void *)d11n0absinitvals16); + brcms_ucode_free_buf((void *)d11n0bsinitvals16); + brcms_ucode_free_buf((void *)d11n0initvals16); + brcms_ucode_free_buf((void *)bcm43xx_16_mimo); + brcms_ucode_free_buf((void *)bcm43xx_24_lcn); + brcms_ucode_free_buf((void *)bcm43xx_bommajor); + brcms_ucode_free_buf((void *)bcm43xx_bomminor); return; } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 6bc547a..fe031f2 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -238,7 +238,7 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); /* disable interrupts */ - macintmask = wl_intrsoff(wlc->wl); + macintmask = brcms_intrsoff(wlc->wl); /* radio off */ wlc_phy_switch_radio(wlc_hw->band->pi, OFF); @@ -315,7 +315,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) if (DEVICEREMOVED(wlc)) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return false; } @@ -386,7 +386,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) __func__, wlc_hw->sih->chip, wlc_hw->sih->chiprev); /* big hammer */ - wl_init(wlc->wl); + brcms_init(wlc->wl); } /* gptimer timeout */ @@ -397,7 +397,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) if (macintstatus & MI_RFDISABLE) { BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" " RF Disable Input\n", wlc_hw->unit); - wl_rfkill_set_hw_state(wlc->wl); + brcms_rfkill_set_hw_state(wlc->wl); } /* send any enq'd tx packets. Just makes sure to jump start tx */ @@ -408,7 +408,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) return wlc->macintstatus != 0; fatal: - wl_init(wlc->wl); + brcms_init(wlc->wl); return wlc->macintstatus != 0; } @@ -526,7 +526,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) NULL), DMAREG(wlc_hw, DMA_RX, 0), (wme ? tune->ntxd : 0), tune->nrxd, tune->rxbufsz, -1, tune->nrxbufpost, - WL_HWRXOFF, &wl_msg_level); + WL_HWRXOFF, &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[0]); /* @@ -538,7 +538,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 1), NULL, tune->ntxd, 0, 0, -1, 0, 0, - &wl_msg_level); + &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[1]); /* @@ -549,7 +549,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 2), NULL, tune->ntxd, 0, 0, -1, 0, 0, - &wl_msg_level); + &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[2]); /* * FIFO 3 @@ -559,7 +559,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 3), NULL, tune->ntxd, 0, 0, -1, - 0, 0, &wl_msg_level); + 0, 0, &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[3]); /* Cleaner to leave this as if with AP defined */ @@ -1050,7 +1050,7 @@ wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, wlc_clkctl_clk(wlc_hw, CLK_FAST); /* disable interrupts */ - macintmask = wl_intrsoff(wlc->wl); + macintmask = brcms_intrsoff(wlc->wl); /* set up the specified band and chanspec */ wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); @@ -1070,7 +1070,7 @@ wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, wlc_bmac_bsinit(wlc, chanspec); /* restore macintmask */ - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended * and wlc_enable_mac() will clear this override bit. @@ -1140,7 +1140,7 @@ int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) /* FULLY enable dynamic power control and d11 core interrupt */ wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); - wl_intrson(wlc_hw->wlc->wl); + brcms_intrson(wlc_hw->wlc->wl); return 0; } @@ -1161,7 +1161,7 @@ int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) wlc_hw->wlc->macintmask = 0; else { /* now disable interrupts */ - wl_intrsoff(wlc_hw->wlc->wl); + brcms_intrsoff(wlc_hw->wlc->wl); /* ensure we're running on the pll clock again */ wlc_clkctl_clk(wlc_hw, CLK_FAST); @@ -1201,7 +1201,7 @@ int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) if (R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) wlc_suspend_mac_and_wait(wlc_hw->wlc); - callbacks += wl_reset(wlc_hw->wlc->wl); + callbacks += brcms_reset(wlc_hw->wlc->wl); wlc_coredisable(wlc_hw); } @@ -1885,7 +1885,7 @@ WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, wlc->macintstatus = MI_DMAINT; /* restore macintmask */ - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); /* ucode should still be suspended.. */ WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); @@ -2683,7 +2683,7 @@ static u32 wlc_wlintrsoff(struct wlc_info *wlc) if (!wlc->hw->up) return 0; - return wl_intrsoff(wlc->wl); + return brcms_intrsoff(wlc->wl); } static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) @@ -2691,7 +2691,7 @@ static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) if (!wlc->hw->up) return; - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); } u32 wlc_intrsoff(struct wlc_info *wlc) @@ -3065,7 +3065,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) if (mc == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mc & MCTL_PSM_JMP_0); @@ -3076,7 +3076,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) if (mi == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mi & MI_MACSSPNDD); @@ -3101,7 +3101,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) if (mc == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mc & MCTL_PSM_JMP_0); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 3e34b31..1a2108c 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -191,11 +191,11 @@ (!AP_ENAB(wlc->pub)) && (wlc->war16165)) /* debug/trace */ -uint wl_msg_level = +uint brcm_msg_level = #if defined(BCMDBG) - WL_ERROR_VAL; + LOG_ERROR_VAL; #else - 0; + 0; #endif /* BCMDBG */ /* Find basic rate for a given rate */ @@ -415,7 +415,7 @@ void wlc_fatal_error(struct wlc_info *wlc) { wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n", wlc->pub->unit); - wl_init(wlc->wl); + brcms_init(wlc->wl); } /* Return the channel the driver should initialize during wlc_init. @@ -1188,7 +1188,7 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) bool wlc_timers_init(struct wlc_info *wlc, int unit) { - wlc->wdtimer = wl_init_timer(wlc->wl, wlc_watchdog_by_timer, + wlc->wdtimer = brcms_init_timer(wlc->wl, wlc_watchdog_by_timer, wlc, "watchdog"); if (!wlc->wdtimer) { wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer " @@ -1196,7 +1196,7 @@ bool wlc_timers_init(struct wlc_info *wlc, int unit) goto fail; } - wlc->radio_timer = wl_init_timer(wlc->wl, wlc_radio_timer, + wlc->radio_timer = brcms_init_timer(wlc->wl, wlc_radio_timer, wlc, "radio"); if (!wlc->radio_timer) { wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer " @@ -1339,7 +1339,7 @@ struct wlc_pub *wlc_pub(void *wlc) /* * The common driver entry routine. Error codes should be unique */ -void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, +void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, bool piomode, void *regsva, uint bustype, void *btparam, uint *perr) { @@ -1669,11 +1669,11 @@ static void wlc_timers_deinit(struct wlc_info *wlc) { /* free timer state */ if (wlc->wdtimer) { - wl_free_timer(wlc->wl, wlc->wdtimer); + brcms_free_timer(wlc->wl, wlc->wdtimer); wlc->wdtimer = NULL; } if (wlc->radio_timer) { - wl_free_timer(wlc->wl, wlc->radio_timer); + brcms_free_timer(wlc->wl, wlc->radio_timer); wlc->radio_timer = NULL; } } @@ -1859,7 +1859,7 @@ void wlc_radio_disable(struct wlc_info *wlc) } wlc_radio_monitor_start(wlc); - wl_down(wlc->wl); + brcms_down(wlc->wl); } static void wlc_radio_enable(struct wlc_info *wlc) @@ -1870,7 +1870,7 @@ static void wlc_radio_enable(struct wlc_info *wlc) if (DEVICEREMOVED(wlc)) return; - wl_up(wlc->wl); + brcms_up(wlc->wl); } /* periodical query hw radio button while driver is "down" */ @@ -1881,7 +1881,7 @@ static void wlc_radio_timer(void *arg) if (DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } @@ -1901,7 +1901,8 @@ static bool wlc_radio_monitor_start(struct wlc_info *wlc) wlc->radio_monitor = true; wlc_pllreq(wlc, true, WLC_PLLREQ_RADIO_MON); - wl_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true); + brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, + true); return true; } @@ -1912,7 +1913,7 @@ bool wlc_radio_monitor_stop(struct wlc_info *wlc) wlc->radio_monitor = false; wlc_pllreq(wlc, false, WLC_PLLREQ_RADIO_MON); - return wl_del_timer(wlc->wl, wlc->radio_timer); + return brcms_del_timer(wlc->wl, wlc->radio_timer); } static void wlc_watchdog_by_timer(void *arg) @@ -1935,7 +1936,7 @@ static void wlc_watchdog(void *arg) if (DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } @@ -2070,7 +2071,7 @@ int wlc_up(struct wlc_info *wlc) wlc_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, WLC_BAND_ALL); - wl_init(wlc->wl); + brcms_init(wlc->wl); wlc->pub->up = true; if (wlc->bandinit_pending) { @@ -2090,7 +2091,7 @@ int wlc_up(struct wlc_info *wlc) wlc_wme_retries_write(wlc); /* start one second watchdog timer */ - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); + brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); wlc->WDarmed = true; /* ensure antenna config is up to date */ @@ -2168,7 +2169,7 @@ uint wlc_down(struct wlc_info *wlc) /* cancel the watchdog timer */ if (wlc->WDarmed) { - if (!wl_del_timer(wlc->wl, wlc->wdtimer)) + if (!brcms_del_timer(wlc->wl, wlc->wdtimer)) callbacks++; wlc->WDarmed = false; } @@ -2528,7 +2529,7 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return -EBADE; } @@ -5817,7 +5818,7 @@ wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on, for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED) - wl_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); + brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); } #endif } @@ -5923,7 +5924,7 @@ void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) /* wait for queue and DMA fifos to run dry */ while (!pktq_empty(&wlc->pkt_queue->q) || TXPKTPENDTOT(wlc) > 0) { - wl_msleep(wlc->wl, 1); + brcms_msleep(wlc->wl, 1); } } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 0dcb73f..916b2a0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -401,7 +401,7 @@ struct wlc_if { * AID2PVBMAP(scb). */ u8 flags; /* flags for the interface */ - struct wl_if *wlif; /* pointer to wlif */ + struct brcms_if *wlif; /* pointer to wlif */ struct wlc_txq_info *qi; /* pointer to associated tx queue */ union { struct scb *scb; /* pointer to scb if WLC_IFTYPE_WDS */ @@ -409,8 +409,8 @@ struct wlc_if { } u; }; -/* flags for the interface */ -#define WLC_IF_LINKED 0x02 /* this interface is linked to a wl_if */ +/* flags for the interface, this interface is linked to a brcms_if */ +#define WLC_IF_LINKED 0x02 struct wlc_hwband { int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ @@ -521,7 +521,7 @@ struct wlc_txq_info { */ struct wlc_info { struct wlc_pub *pub; /* pointer to wlc public state */ - struct wl_info *wl; /* pointer to os-specific private state */ + struct brcms_info *wl; /* pointer to os-specific private state */ d11regs_t *regs; /* pointer to device registers */ struct wlc_hw_info *hw; /* HW related state used primarily by BMAC */ @@ -587,9 +587,10 @@ struct wlc_info { u8 mpc_delay_off; /* delay radio disable by # of watchdog cnt */ u8 prev_non_delay_mpc; /* prev state wlc_is_non_delay_mpc */ - /* timer */ - struct wl_timer *wdtimer; /* timer for watchdog routine */ - struct wl_timer *radio_timer; /* timer for hw radio button monitor routine */ + /* timer for watchdog routine */ + struct brcms_timer *wdtimer; + /* timer for hw radio button monitor routine */ + struct brcms_timer *radio_timer; /* promiscuous */ bool monitor; /* monitor (MPDU sniffing) mode */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index 6689691..ba5d67e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -83,39 +83,40 @@ struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, void (*fn) (void *arg), void *arg, const char *name) { - return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name); + return (struct wlapi_timer *) + brcms_init_timer(physhim->wl, fn, arg, name); } void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) { - wl_free_timer(physhim->wl, (struct wl_timer *)t); + brcms_free_timer(physhim->wl, (struct brcms_timer *)t); } void wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms, int periodic) { - wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic); + brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic); } bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) { - return wl_del_timer(physhim->wl, (struct wl_timer *)t); + return brcms_del_timer(physhim->wl, (struct brcms_timer *)t); } void wlapi_intrson(wlc_phy_shim_info_t *physhim) { - wl_intrson(physhim->wl); + brcms_intrson(physhim->wl); } u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim) { - return wl_intrsoff(physhim->wl); + return brcms_intrsoff(physhim->wl); } void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask) { - wl_intrsrestore(physhim->wl, macintmask); + brcms_intrsrestore(physhim->wl, macintmask); } void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 77b07388..4f0fa20 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -343,7 +343,7 @@ typedef struct wl_rxsts { uint preamble; /* Unknown, short, long */ uint encoding; /* Unknown, CCK, PBCC, OFDM */ uint nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */ - struct wl_if *wlif; /* wl interface */ + struct brcms_if *wlif; /* wl interface */ } wl_rxsts_t; /* status per error RX pkt */ @@ -591,9 +591,9 @@ typedef struct { } wlc_antselcfg_t; /* common functions for every port */ -extern void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam, - uint *perr); +extern void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam, uint *perr); extern uint wlc_detach(struct wlc_info *wlc); extern int wlc_up(struct wlc_info *wlc); extern uint wlc_down(struct wlc_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 5cca063..775d013 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -35,11 +35,11 @@ /* forward declarations */ struct sk_buff; -struct wl_info; +struct brcms_info; struct wlc_info; struct wlc_hw_info; struct wlc_if; -struct wl_if; +struct brcms_if; struct ampdu_info; struct antsel_info; struct bmac_pmq; diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 304d8ed..8cb66c2 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -88,8 +88,8 @@ typedef struct wl_rateset { #define PM_MAX 1 /* Message levels */ -#define WL_ERROR_VAL 0x00000001 -#define WL_TRACE_VAL 0x00000002 +#define LOG_ERROR_VAL 0x00000001 +#define LOG_TRACE_VAL 0x00000002 #define PM_OFF 0 #define PM_MAX 1 -- cgit v0.10.2 From 5706e3de2773d267d3608ada1e4ea6cfdc2a38e4 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:45 +0200 Subject: staging: brcm80211: renamed files to get rid of wl_ file name prefix Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index 4356a29..c6b5128 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -28,8 +28,8 @@ ccflags-y := \ -Idrivers/staging/brcm80211/include BRCMSMAC_OFILES := \ - wl_mac80211.o \ - wl_ucode_loader.o \ + brcms_mac80211.o \ + ucode_loader.o \ wlc_alloc.o \ wlc_ampdu.o \ wlc_antsel.o \ diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c new file mode 100644 index 0000000..8eadb43 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -0,0 +1,1966 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define __UNDEF_NO_VERSION__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "bcmdma.h" + +#include "phy/wlc_phy_int.h" +#include "d11.h" +#include "wlc_types.h" +#include "wlc_cfg.h" +#include "wlc_key.h" +#include "wlc_channel.h" +#include "wlc_scb.h" +#include "wlc_pub.h" +#include "wl_dbg.h" +#include "wl_export.h" +#include "ucode_loader.h" +#include "brcms_mac80211.h" + +#define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ + +#define LOCK(wl) spin_lock_bh(&(wl)->lock) +#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) + +/* locking from inside brcms_isr */ +#define ISR_LOCK(wl, flags)\ + do {\ + spin_lock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +#define ISR_UNLOCK(wl, flags)\ + do {\ + spin_unlock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +/* locking under LOCK() to synchronize with brcms_isr */ +#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) +#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) + +static void brcms_timer(unsigned long data); +static void _brcms_timer(struct brcms_timer *t); + + +static int ieee_hw_init(struct ieee80211_hw *hw); +static int ieee_hw_rate_init(struct ieee80211_hw *hw); + +static int wl_linux_watchdog(void *ctx); + +/* Flags we support */ +#define MAC_FILTERS (FIF_PROMISC_IN_BSS | \ + FIF_ALLMULTI | \ + FIF_FCSFAIL | \ + FIF_PLCPFAIL | \ + FIF_CONTROL | \ + FIF_OTHER_BSS | \ + FIF_BCN_PRBRESP_PROMISC) + +static int n_adapters_found; + +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); +static void brcms_release_fw(struct brcms_info *wl); + +/* local prototypes */ +static void brcms_dpc(unsigned long data); +static irqreturn_t brcms_isr(int irq, void *dev_id); + +static int __devinit brcms_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent); +static void brcms_remove(struct pci_dev *pdev); +static void brcms_free(struct brcms_info *wl); +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); +MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); +MODULE_LICENSE("Dual BSD/GPL"); + +/* recognized PCI IDs */ +static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { + {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ + {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ + {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ + /* 43224 Ven */ + {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + {0} +}; + +MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); + +#ifdef BCMDBG +static int msglevel = 0xdeadbeef; +module_param(msglevel, int, 0); +static int phymsglevel = 0xdeadbeef; +module_param(phymsglevel, int, 0); +#endif /* BCMDBG */ + +#define HW_TO_WL(hw) (hw->priv) +#define WL_TO_HW(wl) (wl->pub->ieee_hw) + +/* MAC80211 callback functions */ +static int brcms_ops_start(struct ieee80211_hw *hw); +static void brcms_ops_stop(struct ieee80211_hw *hw); +static int brcms_ops_add_interface(struct ieee80211_hw *hw, + struct ieee80211_vif *vif); +static void brcms_ops_remove_interface(struct ieee80211_hw *hw, + struct ieee80211_vif *vif); +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); +static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *info, + u32 changed); +static void brcms_ops_configure_filter(struct ieee80211_hw *hw, + unsigned int changed_flags, + unsigned int *total_flags, u64 multicast); +static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, + bool set); +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); +static int brcms_ops_get_stats(struct ieee80211_hw *hw, + struct ieee80211_low_level_stats *stats); +static void brcms_ops_sta_notify(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum sta_notify_cmd cmd, + struct ieee80211_sta *sta); +static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, + const struct ieee80211_tx_queue_params *params); +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); +static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_sta_remove(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum ieee80211_ampdu_mlme_action action, + struct ieee80211_sta *sta, u16 tid, u16 *ssn, + u8 buf_size); +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); + +static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) +{ + struct brcms_info *wl = hw->priv; + + LOCK(wl); + if (!wl->pub->up) { + wiphy_err(wl->wiphy, "ops->tx called while down\n"); + kfree_skb(skb); + goto done; + } + wlc_sendpkt_mac80211(wl->wlc, skb, hw); + done: + UNLOCK(wl); +} + +static int brcms_ops_start(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + bool blocked; + /* + struct ieee80211_channel *curchan = hw->conf.channel; + */ + + ieee80211_wake_queues(hw); + LOCK(wl); + blocked = brcms_rfkill_set_hw_state(wl); + UNLOCK(wl); + if (!blocked) + wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); + + return 0; +} + +static void brcms_ops_stop(struct ieee80211_hw *hw) +{ + ieee80211_stop_queues(hw); +} + +static int +brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct brcms_info *wl; + int err; + + /* Just STA for now */ + if (vif->type != NL80211_IFTYPE_AP && + vif->type != NL80211_IFTYPE_MESH_POINT && + vif->type != NL80211_IFTYPE_STATION && + vif->type != NL80211_IFTYPE_WDS && + vif->type != NL80211_IFTYPE_ADHOC) { + wiphy_err(hw->wiphy, "%s: Attempt to add type %d, only" + " STA for now\n", __func__, vif->type); + return -EOPNOTSUPP; + } + + wl = HW_TO_WL(hw); + LOCK(wl); + err = brcms_up(wl); + UNLOCK(wl); + + if (err != 0) { + wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, + err); + } + return err; +} + +static void +brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct brcms_info *wl; + + wl = HW_TO_WL(hw); + + /* put driver in down state */ + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); +} + +/* + * precondition: perimeter lock has been acquired + */ +static int +ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, + enum nl80211_channel_type type) +{ + struct brcms_info *wl = HW_TO_WL(hw); + int err = 0; + + switch (type) { + case NL80211_CHAN_HT20: + case NL80211_CHAN_NO_HT: + err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); + break; + case NL80211_CHAN_HT40MINUS: + case NL80211_CHAN_HT40PLUS: + wiphy_err(hw->wiphy, + "%s: Need to implement 40 Mhz Channels!\n", __func__); + err = 1; + break; + } + + if (err) + return -EIO; + return err; +} + +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) +{ + struct ieee80211_conf *conf = &hw->conf; + struct brcms_info *wl = HW_TO_WL(hw); + int err = 0; + int new_int; + struct wiphy *wiphy = hw->wiphy; + + LOCK(wl); + if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { + if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) + < 0) { + wiphy_err(wiphy, "%s: Error setting listen_interval\n", + __func__); + err = -EIO; + goto config_out; + } + wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); + } + if (changed & IEEE80211_CONF_CHANGE_MONITOR) + wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", + __func__, conf->flags & IEEE80211_CONF_MONITOR ? + "true" : "false"); + if (changed & IEEE80211_CONF_CHANGE_PS) + wiphy_err(wiphy, "%s: change power-save mode: %s (implement)\n", + __func__, conf->flags & IEEE80211_CONF_PS ? + "true" : "false"); + + if (changed & IEEE80211_CONF_CHANGE_POWER) { + if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4) + < 0) { + wiphy_err(wiphy, "%s: Error setting power_level\n", + __func__); + err = -EIO; + goto config_out; + } + wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int); + if (new_int != (conf->power_level * 4)) + wiphy_err(wiphy, "%s: Power level req != actual, %d %d" + "\n", __func__, conf->power_level * 4, + new_int); + } + if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { + err = ieee_set_channel(hw, conf->channel, conf->channel_type); + } + if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { + if (wlc_set + (wl->wlc, WLC_SET_SRL, + conf->short_frame_max_tx_count) < 0) { + wiphy_err(wiphy, "%s: Error setting srl\n", __func__); + err = -EIO; + goto config_out; + } + if (wlc_set(wl->wlc, WLC_SET_LRL, conf->long_frame_max_tx_count) + < 0) { + wiphy_err(wiphy, "%s: Error setting lrl\n", __func__); + err = -EIO; + goto config_out; + } + } + + config_out: + UNLOCK(wl); + return err; +} + +static void +brcms_ops_bss_info_changed(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *info, u32 changed) +{ + struct brcms_info *wl = HW_TO_WL(hw); + struct wiphy *wiphy = hw->wiphy; + int val; + + if (changed & BSS_CHANGED_ASSOC) { + /* association status changed (associated/disassociated) + * also implies a change in the AID. + */ + wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, + __func__, info->assoc ? "" : "dis"); + LOCK(wl); + wlc_associate_upd(wl->wlc, info->assoc); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_ERP_SLOT) { + /* slot timing changed */ + if (info->use_short_slot) + val = 1; + else + val = 0; + LOCK(wl); + wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); + UNLOCK(wl); + } + + if (changed & BSS_CHANGED_HT) { + /* 802.11n parameters changed */ + u16 mode = info->ht_operation_mode; + + LOCK(wl); + wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, + mode & IEEE80211_HT_OP_MODE_PROTECTION); + wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, + mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); + wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, + mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BASIC_RATES) { + struct ieee80211_supported_band *bi; + u32 br_mask, i; + u16 rate; + struct wl_rateset rs; + int error; + + /* retrieve the current rates */ + LOCK(wl); + error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, + &rs, sizeof(rs), NULL); + UNLOCK(wl); + if (error) { + wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", + __func__, error); + return; + } + br_mask = info->basic_rates; + bi = hw->wiphy->bands[wlc_get_curband(wl->wlc)]; + for (i = 0; i < bi->n_bitrates; i++) { + /* convert to internal rate value */ + rate = (bi->bitrates[i].bitrate << 1) / 10; + + /* set/clear basic rate flag */ + brcms_set_basic_rate(&rs, rate, br_mask & 1); + br_mask >>= 1; + } + + /* update the rate set */ + LOCK(wl); + wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BEACON_INT) { + /* Beacon interval changed */ + LOCK(wl); + wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BSSID) { + /* BSSID changed, for whatever reason (IBSS and managed mode) */ + LOCK(wl); + wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, + info->bssid); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BEACON) { + /* Beacon data changed, retrieve new beacon (beaconing modes) */ + wiphy_err(wiphy, "%s: beacon changed\n", __func__); + } + if (changed & BSS_CHANGED_BEACON_ENABLED) { + /* Beaconing should be enabled/disabled (beaconing modes) */ + wiphy_err(wiphy, "%s: Beacon enabled: %s\n", __func__, + info->enable_beacon ? "true" : "false"); + } + if (changed & BSS_CHANGED_CQM) { + /* Connection quality monitor config changed */ + wiphy_err(wiphy, "%s: cqm change: threshold %d, hys %d " + " (implement)\n", __func__, info->cqm_rssi_thold, + info->cqm_rssi_hyst); + } + if (changed & BSS_CHANGED_IBSS) { + /* IBSS join status changed */ + wiphy_err(wiphy, "%s: IBSS joined: %s (implement)\n", __func__, + info->ibss_joined ? "true" : "false"); + } + if (changed & BSS_CHANGED_ARP_FILTER) { + /* Hardware ARP filter address list or state changed */ + wiphy_err(wiphy, "%s: arp filtering: enabled %s, count %d" + " (implement)\n", __func__, info->arp_filter_enabled ? + "true" : "false", info->arp_addr_cnt); + } + if (changed & BSS_CHANGED_QOS) { + /* + * QoS for this association was enabled/disabled. + * Note that it is only ever disabled for station mode. + */ + wiphy_err(wiphy, "%s: qos enabled: %s (implement)\n", __func__, + info->qos ? "true" : "false"); + } + if (changed & BSS_CHANGED_IDLE) { + /* Idle changed for this BSS/interface */ + wiphy_err(wiphy, "%s: BSS idle: %s (implement)\n", __func__, + info->idle ? "true" : "false"); + } + return; +} + +static void +brcms_ops_configure_filter(struct ieee80211_hw *hw, + unsigned int changed_flags, + unsigned int *total_flags, u64 multicast) +{ + struct brcms_info *wl = hw->priv; + struct wiphy *wiphy = hw->wiphy; + + changed_flags &= MAC_FILTERS; + *total_flags &= MAC_FILTERS; + if (changed_flags & FIF_PROMISC_IN_BSS) + wiphy_err(wiphy, "FIF_PROMISC_IN_BSS\n"); + if (changed_flags & FIF_ALLMULTI) + wiphy_err(wiphy, "FIF_ALLMULTI\n"); + if (changed_flags & FIF_FCSFAIL) + wiphy_err(wiphy, "FIF_FCSFAIL\n"); + if (changed_flags & FIF_PLCPFAIL) + wiphy_err(wiphy, "FIF_PLCPFAIL\n"); + if (changed_flags & FIF_CONTROL) + wiphy_err(wiphy, "FIF_CONTROL\n"); + if (changed_flags & FIF_OTHER_BSS) + wiphy_err(wiphy, "FIF_OTHER_BSS\n"); + if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { + LOCK(wl); + if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { + wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; + wlc_mac_bcn_promisc_change(wl->wlc, 1); + } else { + wlc_mac_bcn_promisc_change(wl->wlc, 0); + wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; + } + UNLOCK(wl); + } + return; +} + +static int +brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) +{ + return 0; +} + +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + LOCK(wl); + wlc_scan_start(wl->wlc); + UNLOCK(wl); + return; +} + +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + LOCK(wl); + wlc_scan_stop(wl->wlc); + UNLOCK(wl); + return; +} + +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) +{ + wiphy_err(hw->wiphy, "%s: Enter\n", __func__); + return; +} + +static int +brcms_ops_get_stats(struct ieee80211_hw *hw, + struct ieee80211_low_level_stats *stats) +{ + struct brcms_info *wl = hw->priv; + struct wl_cnt *cnt; + + LOCK(wl); + cnt = wl->pub->_cnt; + stats->dot11ACKFailureCount = 0; + stats->dot11RTSFailureCount = 0; + stats->dot11FCSErrorCount = 0; + stats->dot11RTSSuccessCount = 0; + UNLOCK(wl); + return 0; +} + +static void +brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + enum sta_notify_cmd cmd, struct ieee80211_sta *sta) +{ + switch (cmd) { + default: + wiphy_err(hw->wiphy, "%s: Unknown cmd = %d\n", __func__, + cmd); + break; + } + return; +} + +static int +brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, + const struct ieee80211_tx_queue_params *params) +{ + struct brcms_info *wl = hw->priv; + + LOCK(wl); + wlc_wme_setparams(wl->wlc, queue, params, true); + UNLOCK(wl); + + return 0; +} + +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) +{ + wiphy_err(hw->wiphy, "%s: Enter\n", __func__); + return 0; +} + +static int +brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta) +{ + struct scb *scb; + + int i; + struct brcms_info *wl = hw->priv; + + /* Init the scb */ + scb = (struct scb *)sta->drv_priv; + memset(scb, 0, sizeof(struct scb)); + for (i = 0; i < NUMPRIO; i++) + scb->seqctl[i] = 0xFFFF; + scb->seqctl_nonqos = 0xFFFF; + scb->magic = SCB_MAGIC; + + wl->pub->global_scb = scb; + wl->pub->global_ampdu = &(scb->scb_ampdu); + wl->pub->global_ampdu->scb = scb; + wl->pub->global_ampdu->max_pdu = 16; + bcm_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, + AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); + + sta->ht_cap.ht_supported = true; + sta->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; + sta->ht_cap.ampdu_density = AMPDU_DEF_MPDU_DENSITY; + sta->ht_cap.cap = IEEE80211_HT_CAP_GRN_FLD | + IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT; + + /* minstrel_ht initiates addBA on our behalf by calling ieee80211_start_tx_ba_session() */ + return 0; +} + +static int +brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta) +{ + return 0; +} + +static int +brcms_ops_ampdu_action(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum ieee80211_ampdu_mlme_action action, + struct ieee80211_sta *sta, u16 tid, u16 *ssn, + u8 buf_size) +{ + struct scb *scb = (struct scb *)sta->drv_priv; + struct brcms_info *wl = hw->priv; + int status; + + if (WARN_ON(scb->magic != SCB_MAGIC)) + return -EIDRM; + switch (action) { + case IEEE80211_AMPDU_RX_START: + break; + case IEEE80211_AMPDU_RX_STOP: + break; + case IEEE80211_AMPDU_TX_START: + LOCK(wl); + status = wlc_aggregatable(wl->wlc, tid); + UNLOCK(wl); + if (!status) { + wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", + tid); + return -EINVAL; + } + /* XXX: Use the starting sequence number provided ... */ + *ssn = 0; + ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); + break; + + case IEEE80211_AMPDU_TX_STOP: + LOCK(wl); + wlc_ampdu_flush(wl->wlc, sta, tid); + UNLOCK(wl); + ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); + break; + case IEEE80211_AMPDU_TX_OPERATIONAL: + /* Not sure what to do here */ + /* Power save wakeup */ + break; + default: + wiphy_err(wl->wiphy, "%s: Invalid command, ignoring\n", + __func__); + } + + return 0; +} + +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = HW_TO_WL(hw); + bool blocked; + + LOCK(wl); + blocked = wlc_check_radio_disabled(wl->wlc); + UNLOCK(wl); + + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); +} + +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) +{ + struct brcms_info *wl = HW_TO_WL(hw); + + no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); + + /* wait for packet queue and dma fifos to run empty */ + LOCK(wl); + wlc_wait_for_tx_completion(wl->wlc, drop); + UNLOCK(wl); +} + +static const struct ieee80211_ops brcms_ops = { + .tx = brcms_ops_tx, + .start = brcms_ops_start, + .stop = brcms_ops_stop, + .add_interface = brcms_ops_add_interface, + .remove_interface = brcms_ops_remove_interface, + .config = brcms_ops_config, + .bss_info_changed = brcms_ops_bss_info_changed, + .configure_filter = brcms_ops_configure_filter, + .set_tim = brcms_ops_set_tim, + .sw_scan_start = brcms_ops_sw_scan_start, + .sw_scan_complete = brcms_ops_sw_scan_complete, + .set_tsf = brcms_ops_set_tsf, + .get_stats = brcms_ops_get_stats, + .sta_notify = brcms_ops_sta_notify, + .conf_tx = brcms_ops_conf_tx, + .get_tsf = brcms_ops_get_tsf, + .sta_add = brcms_ops_sta_add, + .sta_remove = brcms_ops_sta_remove, + .ampdu_action = brcms_ops_ampdu_action, + .rfkill_poll = brcms_ops_rfkill_poll, + .flush = brcms_ops_flush, +}; + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int brcms_set_hint(struct brcms_info *wl, char *abbrev) +{ + return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); +} + +/** + * attach to the WL device. + * + * Attach to the WL device identified by vendor and device parameters. + * regs is a host accessible memory address pointing to WL device registers. + * + * brcms_attach is not defined as static because in the case where no bus + * is defined, wl_attach will never be called, and thus, gcc will issue + * a warning that this function is defined but not used if we declare + * it as static. + * + * + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static struct brcms_info *brcms_attach(u16 vendor, u16 device, + unsigned long regs, + uint bustype, void *btparam, uint irq) +{ + struct brcms_info *wl = NULL; + int unit, err; + unsigned long base_addr; + struct ieee80211_hw *hw; + u8 perm[ETH_ALEN]; + + unit = n_adapters_found; + err = 0; + + if (unit < 0) { + return NULL; + } + + /* allocate private info */ + hw = pci_get_drvdata(btparam); /* btparam == pdev */ + if (hw != NULL) + wl = hw->priv; + if (WARN_ON(hw == NULL) || WARN_ON(wl == NULL)) + return NULL; + wl->wiphy = hw->wiphy; + + atomic_set(&wl->callbacks, 0); + + /* setup the bottom half handler */ + tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); + + + + base_addr = regs; + + if (bustype == PCI_BUS || bustype == RPC_BUS) { + /* Do nothing */ + } else { + bustype = PCI_BUS; + BCMMSG(wl->wiphy, "force to PCI\n"); + } + wl->bcm_bustype = bustype; + + wl->regsva = ioremap_nocache(base_addr, PCI_BAR0_WINSZ); + if (wl->regsva == NULL) { + wiphy_err(wl->wiphy, "wl%d: ioremap() failed\n", unit); + goto fail; + } + spin_lock_init(&wl->lock); + spin_lock_init(&wl->isr_lock); + + /* prepare ucode */ + if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { + wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " + "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); + brcms_release_fw(wl); + brcms_remove((struct pci_dev *)btparam); + return NULL; + } + + /* common load-time initialization */ + wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, + wl->regsva, wl->bcm_bustype, btparam, &err); + brcms_release_fw(wl); + if (!wl->wlc) { + wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", + KBUILD_MODNAME, err); + goto fail; + } + wl->pub = wlc_pub(wl->wlc); + + wl->pub->ieee_hw = hw; + + if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) { + wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", + unit); + } + + /* register our interrupt handler */ + if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { + wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); + goto fail; + } + wl->irq = irq; + + /* register module */ + wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); + + if (ieee_hw_init(hw)) { + wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, + __func__); + goto fail; + } + + memcpy(perm, &wl->pub->cur_etheraddr, ETH_ALEN); + if (WARN_ON(!is_valid_ether_addr(perm))) + goto fail; + SET_IEEE80211_PERM_ADDR(hw, perm); + + err = ieee80211_register_hw(hw); + if (err) { + wiphy_err(wl->wiphy, "%s: ieee80211_register_hw failed, status" + "%d\n", __func__, err); + } + + if (wl->pub->srom_ccode[0]) + err = brcms_set_hint(wl, wl->pub->srom_ccode); + else + err = brcms_set_hint(wl, "US"); + if (err) { + wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", + __func__, err); + } + + n_adapters_found++; + return wl; + +fail: + brcms_free(wl); + return NULL; +} + + + +#define CHAN2GHZ(channel, freqency, chflags) { \ + .band = IEEE80211_BAND_2GHZ, \ + .center_freq = (freqency), \ + .hw_value = (channel), \ + .flags = chflags, \ + .max_antenna_gain = 0, \ + .max_power = 19, \ +} + +static struct ieee80211_channel brcms_2ghz_chantable[] = { + CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(4, 2427, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(5, 2432, 0), + CHAN2GHZ(6, 2437, 0), + CHAN2GHZ(7, 2442, 0), + CHAN2GHZ(8, 2447, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(9, 2452, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(12, 2467, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(13, 2472, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(14, 2484, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) +}; + +#define CHAN5GHZ(channel, chflags) { \ + .band = IEEE80211_BAND_5GHZ, \ + .center_freq = 5000 + 5*(channel), \ + .hw_value = (channel), \ + .flags = chflags, \ + .max_antenna_gain = 0, \ + .max_power = 21, \ +} + +static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { + /* UNII-1 */ + CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(44, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS), + /* UNII-2 */ + CHAN5GHZ(52, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(56, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(60, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(64, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + /* MID */ + CHAN5GHZ(100, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(104, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(108, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(112, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(116, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(120, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(124, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(128, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(132, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(136, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(140, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS | + IEEE80211_CHAN_NO_HT40MINUS), + /* UNII-3 */ + CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(153, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(157, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(161, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(165, IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) +}; + +#define RATE(rate100m, _flags) { \ + .bitrate = (rate100m), \ + .flags = (_flags), \ + .hw_value = (rate100m / 5), \ +} + +static struct ieee80211_rate legacy_ratetable[] = { + RATE(10, 0), + RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(110, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(60, 0), + RATE(90, 0), + RATE(120, 0), + RATE(180, 0), + RATE(240, 0), + RATE(360, 0), + RATE(480, 0), + RATE(540, 0), +}; + +static struct ieee80211_supported_band brcms_band_2GHz_nphy = { + .band = IEEE80211_BAND_2GHZ, + .channels = brcms_2ghz_chantable, + .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), + .bitrates = legacy_ratetable, + .n_bitrates = ARRAY_SIZE(legacy_ratetable), + .ht_cap = { + /* from include/linux/ieee80211.h */ + .cap = IEEE80211_HT_CAP_GRN_FLD | + IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, + .ht_supported = true, + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, + .ampdu_density = AMPDU_DEF_MPDU_DENSITY, + .mcs = { + /* placeholders for now */ + .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, + .rx_highest = 500, + .tx_params = IEEE80211_HT_MCS_TX_DEFINED} + } +}; + +static struct ieee80211_supported_band brcms_band_5GHz_nphy = { + .band = IEEE80211_BAND_5GHZ, + .channels = brcms_5ghz_nphy_chantable, + .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), + .bitrates = legacy_ratetable + 4, + .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, + .ht_cap = { + /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ + .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ + .ht_supported = true, + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, + .ampdu_density = AMPDU_DEF_MPDU_DENSITY, + .mcs = { + /* placeholders for now */ + .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, + .rx_highest = 500, + .tx_params = IEEE80211_HT_MCS_TX_DEFINED} + } +}; + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int ieee_hw_rate_init(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = HW_TO_WL(hw); + int has_5g; + char phy_list[4]; + + has_5g = 0; + + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; + hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; + + if (wlc_get(wl->wlc, WLC_GET_PHYLIST, (int *)&phy_list) < 0) { + wiphy_err(hw->wiphy, "Phy list failed\n"); + } + + if (phy_list[0] == 'n' || phy_list[0] == 'c') { + if (phy_list[0] == 'c') { + /* Single stream */ + brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; + } + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; + } else { + return -EPERM; + } + + /* Assume all bands use the same phy. True for 11n devices. */ + if (NBANDS_PUB(wl->pub) > 1) { + has_5g++; + if (phy_list[0] == 'n' || phy_list[0] == 'c') { + hw->wiphy->bands[IEEE80211_BAND_5GHZ] = + &brcms_band_5GHz_nphy; + } else { + return -EPERM; + } + } + return 0; +} + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int ieee_hw_init(struct ieee80211_hw *hw) +{ + hw->flags = IEEE80211_HW_SIGNAL_DBM + /* | IEEE80211_HW_CONNECTION_MONITOR What is this? */ + | IEEE80211_HW_REPORTS_TX_ACK_STATUS + | IEEE80211_HW_AMPDU_AGGREGATION; + + hw->extra_tx_headroom = wlc_get_header_len(); + hw->queues = N_TX_QUEUES; + /* FIXME: this doesn't seem to be used properly in minstrel_ht. + * mac80211/status.c:ieee80211_tx_status() checks this value, + * but mac80211/rc80211_minstrel_ht.c:minstrel_ht_get_rate() + * appears to always set 3 rates + */ + hw->max_rates = 2; /* Primary rate and 1 fallback rate */ + + hw->channel_change_time = 7 * 1000; /* channel change time is dependent on chip and band */ + hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); + + hw->rate_control_algorithm = "minstrel_ht"; + + hw->sta_data_size = sizeof(struct scb); + return ieee_hw_rate_init(hw); +} + +/** + * determines if a device is a WL device, and if so, attaches it. + * + * This function determines if a device pointed to by pdev is a WL device, + * and if so, performs a brcms_attach() on it. + * + * Perimeter lock is initialized in the course of this function. + */ +static int __devinit +brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + int rc; + struct brcms_info *wl; + struct ieee80211_hw *hw; + u32 val; + + dev_info(&pdev->dev, "bus %d slot %d func %d irq %d\n", + pdev->bus->number, PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn), pdev->irq); + + if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || + ((pdev->device != 0x0576) && + ((pdev->device & 0xff00) != 0x4300) && + ((pdev->device & 0xff00) != 0x4700) && + ((pdev->device < 43000) || (pdev->device > 43999)))) + return -ENODEV; + + rc = pci_enable_device(pdev); + if (rc) { + pr_err("%s: Cannot enable device %d-%d_%d\n", + __func__, pdev->bus->number, PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn)); + return -ENODEV; + } + pci_set_master(pdev); + + pci_read_config_dword(pdev, 0x40, &val); + if ((val & 0x0000ff00) != 0) + pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); + + hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); + if (!hw) { + pr_err("%s: ieee80211_alloc_hw failed\n", __func__); + return -ENOMEM; + } + + SET_IEEE80211_DEV(hw, &pdev->dev); + + pci_set_drvdata(pdev, hw); + + memset(hw->priv, 0, sizeof(*wl)); + + wl = brcms_attach(pdev->vendor, pdev->device, + pci_resource_start(pdev, 0), PCI_BUS, pdev, + pdev->irq); + + if (!wl) { + pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, + __func__); + return -ENODEV; + } + return 0; +} + +static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + wiphy_err(wl->wiphy, + "brcms_suspend: pci_get_drvdata failed\n"); + return -ENODEV; + } + + /* only need to flag hw is down for proper resume */ + LOCK(wl); + wl->pub->hw_up = false; + UNLOCK(wl); + + pci_save_state(pdev); + pci_disable_device(pdev); + return pci_set_power_state(pdev, PCI_D3hot); +} + +static int brcms_resume(struct pci_dev *pdev) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + int err = 0; + u32 val; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + wiphy_err(wl->wiphy, + "wl: brcms_resume: pci_get_drvdata failed\n"); + return -ENODEV; + } + + err = pci_set_power_state(pdev, PCI_D0); + if (err) + return err; + + pci_restore_state(pdev); + + err = pci_enable_device(pdev); + if (err) + return err; + + pci_set_master(pdev); + + pci_read_config_dword(pdev, 0x40, &val); + if ((val & 0x0000ff00) != 0) + pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); + + /* + * done. driver will be put in up state + * in brcms_ops_add_interface() call. + */ + return err; +} + +/* +* called from both kernel as from this kernel module. +* precondition: perimeter lock is not acquired. +*/ +static void brcms_remove(struct pci_dev *pdev) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + int status; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); + return; + } + + LOCK(wl); + status = wlc_chipmatch(pdev->vendor, pdev->device); + UNLOCK(wl); + if (!status) { + wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch " + "failed\n"); + return; + } + if (wl->wlc) { + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); + wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); + ieee80211_unregister_hw(hw); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); + } + pci_disable_device(pdev); + + brcms_free(wl); + + pci_set_drvdata(pdev, NULL); + ieee80211_free_hw(hw); +} + +static struct pci_driver brcms_pci_driver = { + .name = KBUILD_MODNAME, + .probe = brcms_pci_probe, + .suspend = brcms_suspend, + .resume = brcms_resume, + .remove = __devexit_p(brcms_remove), + .id_table = brcms_pci_id_table, +}; + +/** + * This is the main entry point for the WL driver. + * + * This function determines if a device pointed to by pdev is a WL device, + * and if so, performs a brcms_attach() on it. + * + */ +static int __init brcms_module_init(void) +{ + int error = -ENODEV; + +#ifdef BCMDBG + if (msglevel != 0xdeadbeef) + brcm_msg_level = msglevel; + else { + char *var = getvar(NULL, "wl_msglevel"); + if (var) { + unsigned long value; + + (void)strict_strtoul(var, 0, &value); + brcm_msg_level = value; + } + } + if (phymsglevel != 0xdeadbeef) + phyhal_msg_level = phymsglevel; + else { + char *var = getvar(NULL, "phy_msglevel"); + if (var) { + unsigned long value; + + (void)strict_strtoul(var, 0, &value); + phyhal_msg_level = value; + } + } +#endif /* BCMDBG */ + + error = pci_register_driver(&brcms_pci_driver); + if (!error) + return 0; + + + + return error; +} + +/** + * This function unloads the WL driver from the system. + * + * This function unconditionally unloads the WL driver module from the + * system. + * + */ +static void __exit brcms_module_exit(void) +{ + pci_unregister_driver(&brcms_pci_driver); + +} + +module_init(brcms_module_init); +module_exit(brcms_module_exit); + +/** + * This function frees the WL per-device resources. + * + * This function frees resources owned by the WL device pointed to + * by the wl parameter. + * + * precondition: can both be called locked and unlocked + * + */ +static void brcms_free(struct brcms_info *wl) +{ + struct brcms_timer *t, *next; + + /* free ucode data */ + if (wl->fw.fw_cnt) + brcms_ucode_data_free(); + if (wl->irq) + free_irq(wl->irq, wl); + + /* kill dpc */ + tasklet_kill(&wl->tasklet); + + if (wl->pub) { + wlc_module_unregister(wl->pub, "linux", wl); + } + + /* free common resources */ + if (wl->wlc) { + wlc_detach(wl->wlc); + wl->wlc = NULL; + wl->pub = NULL; + } + + /* virtual interface deletion is deferred so we cannot spinwait */ + + /* wait for all pending callbacks to complete */ + while (atomic_read(&wl->callbacks) > 0) + schedule(); + + /* free timers */ + for (t = wl->timers; t; t = next) { + next = t->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + } + + /* + * unregister_netdev() calls get_stats() which may read chip registers + * so we cannot unmap the chip registers until after calling unregister_netdev() . + */ + if (wl->regsva && wl->bcm_bustype != SDIO_BUS && + wl->bcm_bustype != JTAG_BUS) { + iounmap((void *)wl->regsva); + } + wl->regsva = NULL; +} + +/* flags the given rate in rateset as requested */ +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) +{ + u32 i; + + for (i = 0; i < rs->count; i++) { + if (rate != (rs->rates[i] & 0x7f)) + continue; + + if (is_br) + rs->rates[i] |= WLC_RATE_FLAG; + else + rs->rates[i] &= WLC_RATE_MASK; + return; + } +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio) +{ + wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_init(struct brcms_info *wl) +{ + BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); + brcms_reset(wl); + + wlc_init(wl->wlc); +} + +/* + * precondition: perimeter lock has been acquired + */ +uint brcms_reset(struct brcms_info *wl) +{ + BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); + wlc_reset(wl->wlc); + + /* dpc will not be rescheduled */ + wl->resched = 0; + + return 0; +} + +/* + * These are interrupt on/off entry points. Disable interrupts + * during interrupt state transition. + */ +void brcms_intrson(struct brcms_info *wl) +{ + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrson(wl->wlc); + INT_UNLOCK(wl, flags); +} + +/* + * precondition: perimeter lock has been acquired + */ +bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) +{ + return true; +} + +u32 brcms_intrsoff(struct brcms_info *wl) +{ + unsigned long flags; + u32 status; + + INT_LOCK(wl, flags); + status = wlc_intrsoff(wl->wlc); + INT_UNLOCK(wl, flags); + return status; +} + +void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) +{ + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrsrestore(wl->wlc, macintmask); + INT_UNLOCK(wl, flags); +} + +/* + * precondition: perimeter lock has been acquired + */ +int brcms_up(struct brcms_info *wl) +{ + int error = 0; + + if (wl->pub->up) + return 0; + + error = wlc_up(wl->wlc); + + return error; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_down(struct brcms_info *wl) +{ + uint callbacks, ret_val = 0; + + /* call common down function */ + ret_val = wlc_down(wl->wlc); + callbacks = atomic_read(&wl->callbacks) - ret_val; + + /* wait for down callbacks to complete */ + UNLOCK(wl); + + /* For HIGH_only driver, it's important to actually schedule other work, + * not just spin wait since everything runs at schedule level + */ + SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); + + LOCK(wl); +} + +static irqreturn_t brcms_isr(int irq, void *dev_id) +{ + struct brcms_info *wl; + bool ours, wantdpc; + unsigned long flags; + + wl = (struct brcms_info *) dev_id; + + ISR_LOCK(wl, flags); + + /* call common first level interrupt handler */ + ours = wlc_isr(wl->wlc, &wantdpc); + if (ours) { + /* if more to do... */ + if (wantdpc) { + + /* ...and call the second level interrupt handler */ + /* schedule dpc */ + tasklet_schedule(&wl->tasklet); + } + } + + ISR_UNLOCK(wl, flags); + + return IRQ_RETVAL(ours); +} + +static void brcms_dpc(unsigned long data) +{ + struct brcms_info *wl; + + wl = (struct brcms_info *) data; + + LOCK(wl); + + /* call the common second level interrupt handler */ + if (wl->pub->up) { + if (wl->resched) { + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrsupd(wl->wlc); + INT_UNLOCK(wl, flags); + } + + wl->resched = wlc_dpc(wl->wlc, true); + } + + /* wlc_dpc() may bring the driver down */ + if (!wl->pub->up) + goto done; + + /* re-schedule dpc */ + if (wl->resched) + tasklet_schedule(&wl->tasklet); + else { + /* re-enable interrupts */ + brcms_intrson(wl); + } + + done: + UNLOCK(wl); +} + +/* + * is called by the kernel from software irq context + */ +static void brcms_timer(unsigned long data) +{ + _brcms_timer((struct brcms_timer *) data); +} + +/* +* precondition: perimeter lock is not acquired + */ +static void _brcms_timer(struct brcms_timer *t) +{ + LOCK(t->wl); + + if (t->set) { + if (t->periodic) { + t->timer.expires = jiffies + t->ms * HZ / 1000; + atomic_inc(&t->wl->callbacks); + add_timer(&t->timer); + t->set = true; + } else + t->set = false; + + t->fn(t->arg); + } + + atomic_dec(&t->wl->callbacks); + + UNLOCK(t->wl); +} + +/* + * Adds a timer to the list. Caller supplies a timer function. + * Is called from wlc. + * + * precondition: perimeter lock has been acquired + */ +struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), + void *arg, const char *name) +{ + struct brcms_timer *t; + + t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); + if (!t) { + wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", + wl->pub->unit); + return 0; + } + + init_timer(&t->timer); + t->timer.data = (unsigned long) t; + t->timer.function = brcms_timer; + t->wl = wl; + t->fn = fn; + t->arg = arg; + t->next = wl->timers; + wl->timers = t; + +#ifdef BCMDBG + t->name = kmalloc(strlen(name) + 1, GFP_ATOMIC); + if (t->name) + strcpy(t->name, name); +#endif + + return t; +} + +/* BMAC_NOTE: Add timer adds only the kernel timer since it's going to be more accurate + * as well as it's easier to make it periodic + * + * precondition: perimeter lock has been acquired + */ +void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, + int periodic) +{ +#ifdef BCMDBG + if (t->set) { + wiphy_err(wl->wiphy, "%s: Already set. Name: %s, per %d\n", + __func__, t->name, periodic); + } +#endif + t->ms = ms; + t->periodic = (bool) periodic; + t->set = true; + t->timer.expires = jiffies + ms * HZ / 1000; + + atomic_inc(&wl->callbacks); + add_timer(&t->timer); +} + +/* + * return true if timer successfully deleted, false if still pending + * + * precondition: perimeter lock has been acquired + */ +bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) +{ + if (t->set) { + t->set = false; + if (!del_timer(&t->timer)) { + return false; + } + atomic_dec(&wl->callbacks); + } + + return true; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) +{ + struct brcms_timer *tmp; + + /* delete the timer in case it is active */ + brcms_del_timer(wl, t); + + if (wl->timers == t) { + wl->timers = wl->timers->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + return; + + } + + tmp = wl->timers; + while (tmp) { + if (tmp->next == t) { + tmp->next = t->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + return; + } + tmp = tmp->next; + } + +} + +/* + * runs in software irq context + * + * precondition: perimeter lock is not acquired + */ +static int wl_linux_watchdog(void *ctx) +{ + return 0; +} + +struct firmware_hdr { + u32 offset; + u32 len; + u32 idx; +}; + +char *brcms_firmwares[MAX_FW_IMAGES] = { + "brcm/bcm43xx", + NULL +}; + +/* + * precondition: perimeter lock has been acquired + */ +int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) +{ + int i, entry; + const u8 *pdata; + struct firmware_hdr *hdr; + for (i = 0; i < wl->fw.fw_cnt; i++) { + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i]; + entry++, hdr++) { + if (hdr->idx == idx) { + pdata = wl->fw.fw_bin[i]->data + hdr->offset; + *pbuf = kmalloc(hdr->len, GFP_ATOMIC); + if (*pbuf == NULL) { + wiphy_err(wl->wiphy, "fail to alloc %d" + " bytes\n", hdr->len); + goto fail; + } + memcpy(*pbuf, pdata, hdr->len); + return 0; + } + } + } + wiphy_err(wl->wiphy, "ERROR: ucode buf tag:%d can not be found!\n", + idx); + *pbuf = NULL; +fail: + return -ENODATA; +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) +{ + int i, entry; + const u8 *pdata; + struct firmware_hdr *hdr; + for (i = 0; i < wl->fw.fw_cnt; i++) { + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i]; + entry++, hdr++) { + if (hdr->idx == idx) { + pdata = wl->fw.fw_bin[i]->data + hdr->offset; + if (hdr->len != 4) { + wiphy_err(wl->wiphy, + "ERROR: fw hdr len\n"); + return -ENOMSG; + } + *data = *((u32 *) pdata); + return 0; + } + } + } + wiphy_err(wl->wiphy, "ERROR: ucode tag:%d can not be found!\n", idx); + return -ENOMSG; +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) +{ + int status; + struct device *device = &pdev->dev; + char fw_name[100]; + int i; + + memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); + for (i = 0; i < MAX_FW_IMAGES; i++) { + if (brcms_firmwares[i] == NULL) + break; + sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], + UCODE_LOADER_API_VER); + status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); + if (status) { + wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", + KBUILD_MODNAME, fw_name); + return status; + } + sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], + UCODE_LOADER_API_VER); + status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); + if (status) { + wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", + KBUILD_MODNAME, fw_name); + return status; + } + wl->fw.hdr_num_entries[i] = + wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); + } + wl->fw.fw_cnt = i; + return brcms_ucode_data_init(wl); +} + +/* + * precondition: can both be called locked and unlocked + */ +void brcms_ucode_free_buf(void *p) +{ + kfree(p); +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +static void brcms_release_fw(struct brcms_info *wl) +{ + int i; + for (i = 0; i < MAX_FW_IMAGES; i++) { + release_firmware(wl->fw.fw_bin[i]); + release_firmware(wl->fw.fw_hdr[i]); + } +} + + +/* + * checks validity of all firmware images loaded from user space + * + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +int brcms_check_firmwares(struct brcms_info *wl) +{ + int i; + int entry; + int rc = 0; + const struct firmware *fw; + const struct firmware *fw_hdr; + struct firmware_hdr *ucode_hdr; + for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { + fw = wl->fw.fw_bin[i]; + fw_hdr = wl->fw.fw_hdr[i]; + if (fw == NULL && fw_hdr == NULL) { + break; + } else if (fw == NULL || fw_hdr == NULL) { + wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", + __func__); + rc = -EBADF; + } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { + wiphy_err(wl->wiphy, "%s: non integral fw hdr file " + "size %zu/%zu\n", __func__, fw_hdr->size, + sizeof(struct firmware_hdr)); + rc = -EBADF; + } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { + wiphy_err(wl->wiphy, "%s: out of bounds fw file size " + "%zu\n", __func__, fw->size); + rc = -EBADF; + } else { + /* check if ucode section overruns firmware image */ + ucode_hdr = (struct firmware_hdr *)fw_hdr->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i] && + !rc; entry++, ucode_hdr++) { + if (ucode_hdr->offset + ucode_hdr->len > + fw->size) { + wiphy_err(wl->wiphy, + "%s: conflicting bin/hdr\n", + __func__); + rc = -EBADF; + } + } + } + } + if (rc == 0 && wl->fw.fw_cnt != i) { + wiphy_err(wl->wiphy, "%s: invalid fw_cnt=%d\n", __func__, + wl->fw.fw_cnt); + rc = -EBADF; + } + return rc; +} + +/* + * precondition: perimeter lock has been acquired + */ +bool brcms_rfkill_set_hw_state(struct brcms_info *wl) +{ + bool blocked = wlc_check_radio_disabled(wl->wlc); + + UNLOCK(wl); + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); + if (blocked) + wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); + LOCK(wl); + return blocked; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_msleep(struct brcms_info *wl, uint ms) +{ + UNLOCK(wl); + msleep(ms); + LOCK(wl); +} diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h new file mode 100644 index 0000000..48ec6b0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _wl_mac80211_h_ +#define _wl_mac80211_h_ + +/* softmac ioctl definitions */ +#define WLC_SET_SHORTSLOT_OVERRIDE 146 + + +/* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and + * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be + * submitted to workqueue instead of being on kernel timer + */ +struct brcms_timer { + struct timer_list timer; + struct brcms_info *wl; + void (*fn) (void *); + void *arg; /* argument to fn */ + uint ms; + bool periodic; + bool set; + struct brcms_timer *next; +#ifdef BCMDBG + char *name; /* Description of the timer */ +#endif +}; + +struct brcms_if { + uint subunit; /* WDS/BSS unit */ + struct pci_dev *pci_dev; +}; + +#define MAX_FW_IMAGES 4 +struct brcms_firmware { + u32 fw_cnt; + const struct firmware *fw_bin[MAX_FW_IMAGES]; + const struct firmware *fw_hdr[MAX_FW_IMAGES]; + u32 hdr_num_entries[MAX_FW_IMAGES]; +}; + +struct brcms_info { + struct wlc_pub *pub; /* pointer to public wlc state */ + void *wlc; /* pointer to private common os-independent data */ + u32 magic; + + int irq; + + spinlock_t lock; /* per-device perimeter lock */ + spinlock_t isr_lock; /* per-device ISR synchronization lock */ + + /* bus type and regsva for unmap in brcms_free() */ + uint bcm_bustype; /* bus type */ + void *regsva; /* opaque chip registers virtual address */ + + /* timer related fields */ + atomic_t callbacks; /* # outstanding callback functions */ + struct brcms_timer *timers; /* timer cleanup queue */ + + struct tasklet_struct tasklet; /* dpc tasklet */ + bool resched; /* dpc needs to be and is rescheduled */ +#ifdef LINUXSTA_PS + u32 pci_psstate[16]; /* pci ps-state save/restore */ +#endif + struct brcms_firmware fw; + struct wiphy *wiphy; +}; +#endif /* _wl_mac80211_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c new file mode 100644 index 0000000..d38f124 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include + +enum { + D11UCODE_NAMETAG_START = 0, + D11LCN0BSINITVALS24, + D11LCN0INITVALS24, + D11LCN1BSINITVALS24, + D11LCN1INITVALS24, + D11LCN2BSINITVALS24, + D11LCN2INITVALS24, + D11N0ABSINITVALS16, + D11N0BSINITVALS16, + D11N0INITVALS16, + D11UCODE_OVERSIGHT16_MIMO, + D11UCODE_OVERSIGHT16_MIMOSZ, + D11UCODE_OVERSIGHT24_LCN, + D11UCODE_OVERSIGHT24_LCNSZ, + D11UCODE_OVERSIGHT_BOMMAJOR, + D11UCODE_OVERSIGHT_BOMMINOR +}; + +struct d11init *d11lcn0bsinitvals24; +struct d11init *d11lcn0initvals24; +struct d11init *d11lcn1bsinitvals24; +struct d11init *d11lcn1initvals24; +struct d11init *d11lcn2bsinitvals24; +struct d11init *d11lcn2initvals24; +struct d11init *d11n0absinitvals16; +struct d11init *d11n0bsinitvals16; +struct d11init *d11n0initvals16; +u32 *bcm43xx_16_mimo; +u32 bcm43xx_16_mimosz; +u32 *bcm43xx_24_lcn; +u32 bcm43xx_24_lcnsz; +u32 *bcm43xx_bommajor; +u32 *bcm43xx_bomminor; + +int brcms_ucode_data_init(struct brcms_info *wl) +{ + int rc; + rc = brcms_check_firmwares(wl); + + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, + D11LCN0BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn0initvals24, + D11LCN0INITVALS24); + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, + D11LCN1BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn1initvals24, + D11LCN1INITVALS24); + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, + D11LCN2BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn2initvals24, + D11LCN2INITVALS24); + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11n0absinitvals16, + D11N0ABSINITVALS16); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, + D11N0BSINITVALS16); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0initvals16, + D11N0INITVALS16); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, + D11UCODE_OVERSIGHT16_MIMO); + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_16_mimosz, + D11UCODE_OVERSIGHT16_MIMOSZ); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, + D11UCODE_OVERSIGHT24_LCN); + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_24_lcnsz, + D11UCODE_OVERSIGHT24_LCNSZ); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, + D11UCODE_OVERSIGHT_BOMMAJOR); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, + D11UCODE_OVERSIGHT_BOMMINOR); + return rc; +} + +void brcms_ucode_data_free(void) +{ + brcms_ucode_free_buf((void *)d11lcn0bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn0initvals24); + brcms_ucode_free_buf((void *)d11lcn1bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn1initvals24); + brcms_ucode_free_buf((void *)d11lcn2bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn2initvals24); + brcms_ucode_free_buf((void *)d11n0absinitvals16); + brcms_ucode_free_buf((void *)d11n0bsinitvals16); + brcms_ucode_free_buf((void *)d11n0initvals16); + brcms_ucode_free_buf((void *)bcm43xx_16_mimo); + brcms_ucode_free_buf((void *)bcm43xx_24_lcn); + brcms_ucode_free_buf((void *)bcm43xx_bommajor); + brcms_ucode_free_buf((void *)bcm43xx_bomminor); + + return; +} diff --git a/drivers/staging/brcm80211/brcmsmac/ucode_loader.h b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h new file mode 100644 index 0000000..4b90121 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include "wlc_types.h" /* forward structure declarations */ + +#define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */ +#define MAX_FW_SIZE 150000 + +#define UCODE_LOADER_API_VER 0 + +struct d11init { + u16 addr; + u16 size; + u32 value; +}; + +extern struct d11init *d11lcn0bsinitvals24; +extern struct d11init *d11lcn0initvals24; +extern struct d11init *d11lcn1bsinitvals24; +extern struct d11init *d11lcn1initvals24; +extern struct d11init *d11lcn2bsinitvals24; +extern struct d11init *d11lcn2initvals24; +extern struct d11init *d11n0absinitvals16; +extern struct d11init *d11n0bsinitvals16; +extern struct d11init *d11n0initvals16; +extern u32 *bcm43xx_16_mimo; +extern u32 bcm43xx_16_mimosz; +extern u32 *bcm43xx_24_lcn; +extern u32 bcm43xx_24_lcnsz; + +extern int brcms_ucode_data_init(struct brcms_info *wl); +extern void brcms_ucode_data_free(void); + +extern int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, + unsigned int idx); +extern int brcms_ucode_init_uint(struct brcms_info *wl, unsigned *data, + unsigned int idx); +extern void brcms_ucode_free_buf(void *); +extern int brcms_check_firmwares(struct brcms_info *wl); diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c deleted file mode 100644 index cc2ed78..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ /dev/null @@ -1,1966 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#define __UNDEF_NO_VERSION__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "bcmdma.h" - -#include "phy/wlc_phy_int.h" -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_key.h" -#include "wlc_channel.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wl_dbg.h" -#include "wl_export.h" -#include "wl_ucode.h" -#include "wl_mac80211.h" - -#define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ - -#define LOCK(wl) spin_lock_bh(&(wl)->lock) -#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) - -/* locking from inside brcms_isr */ -#define ISR_LOCK(wl, flags)\ - do {\ - spin_lock(&(wl)->isr_lock);\ - (void)(flags); } \ - while (0) - -#define ISR_UNLOCK(wl, flags)\ - do {\ - spin_unlock(&(wl)->isr_lock);\ - (void)(flags); } \ - while (0) - -/* locking under LOCK() to synchronize with brcms_isr */ -#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) -#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) - -static void brcms_timer(unsigned long data); -static void _brcms_timer(struct brcms_timer *t); - - -static int ieee_hw_init(struct ieee80211_hw *hw); -static int ieee_hw_rate_init(struct ieee80211_hw *hw); - -static int wl_linux_watchdog(void *ctx); - -/* Flags we support */ -#define MAC_FILTERS (FIF_PROMISC_IN_BSS | \ - FIF_ALLMULTI | \ - FIF_FCSFAIL | \ - FIF_PLCPFAIL | \ - FIF_CONTROL | \ - FIF_OTHER_BSS | \ - FIF_BCN_PRBRESP_PROMISC) - -static int n_adapters_found; - -static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); -static void brcms_release_fw(struct brcms_info *wl); - -/* local prototypes */ -static void brcms_dpc(unsigned long data); -static irqreturn_t brcms_isr(int irq, void *dev_id); - -static int __devinit brcms_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent); -static void brcms_remove(struct pci_dev *pdev); -static void brcms_free(struct brcms_info *wl); -static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); - -MODULE_AUTHOR("Broadcom Corporation"); -MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); -MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); -MODULE_LICENSE("Dual BSD/GPL"); - -/* recognized PCI IDs */ -static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { - {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ - {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ - {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ - /* 43224 Ven */ - {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - {0} -}; - -MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); - -#ifdef BCMDBG -static int msglevel = 0xdeadbeef; -module_param(msglevel, int, 0); -static int phymsglevel = 0xdeadbeef; -module_param(phymsglevel, int, 0); -#endif /* BCMDBG */ - -#define HW_TO_WL(hw) (hw->priv) -#define WL_TO_HW(wl) (wl->pub->ieee_hw) - -/* MAC80211 callback functions */ -static int brcms_ops_start(struct ieee80211_hw *hw); -static void brcms_ops_stop(struct ieee80211_hw *hw); -static int brcms_ops_add_interface(struct ieee80211_hw *hw, - struct ieee80211_vif *vif); -static void brcms_ops_remove_interface(struct ieee80211_hw *hw, - struct ieee80211_vif *vif); -static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); -static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_bss_conf *info, - u32 changed); -static void brcms_ops_configure_filter(struct ieee80211_hw *hw, - unsigned int changed_flags, - unsigned int *total_flags, u64 multicast); -static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, - bool set); -static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); -static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); -static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); -static int brcms_ops_get_stats(struct ieee80211_hw *hw, - struct ieee80211_low_level_stats *stats); -static void brcms_ops_sta_notify(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum sta_notify_cmd cmd, - struct ieee80211_sta *sta); -static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, - const struct ieee80211_tx_queue_params *params); -static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); -static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int brcms_ops_sta_remove(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum ieee80211_ampdu_mlme_action action, - struct ieee80211_sta *sta, u16 tid, u16 *ssn, - u8 buf_size); -static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); -static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); - -static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) -{ - struct brcms_info *wl = hw->priv; - - LOCK(wl); - if (!wl->pub->up) { - wiphy_err(wl->wiphy, "ops->tx called while down\n"); - kfree_skb(skb); - goto done; - } - wlc_sendpkt_mac80211(wl->wlc, skb, hw); - done: - UNLOCK(wl); -} - -static int brcms_ops_start(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - bool blocked; - /* - struct ieee80211_channel *curchan = hw->conf.channel; - */ - - ieee80211_wake_queues(hw); - LOCK(wl); - blocked = brcms_rfkill_set_hw_state(wl); - UNLOCK(wl); - if (!blocked) - wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); - - return 0; -} - -static void brcms_ops_stop(struct ieee80211_hw *hw) -{ - ieee80211_stop_queues(hw); -} - -static int -brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) -{ - struct brcms_info *wl; - int err; - - /* Just STA for now */ - if (vif->type != NL80211_IFTYPE_AP && - vif->type != NL80211_IFTYPE_MESH_POINT && - vif->type != NL80211_IFTYPE_STATION && - vif->type != NL80211_IFTYPE_WDS && - vif->type != NL80211_IFTYPE_ADHOC) { - wiphy_err(hw->wiphy, "%s: Attempt to add type %d, only" - " STA for now\n", __func__, vif->type); - return -EOPNOTSUPP; - } - - wl = HW_TO_WL(hw); - LOCK(wl); - err = brcms_up(wl); - UNLOCK(wl); - - if (err != 0) { - wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, - err); - } - return err; -} - -static void -brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) -{ - struct brcms_info *wl; - - wl = HW_TO_WL(hw); - - /* put driver in down state */ - LOCK(wl); - brcms_down(wl); - UNLOCK(wl); -} - -/* - * precondition: perimeter lock has been acquired - */ -static int -ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, - enum nl80211_channel_type type) -{ - struct brcms_info *wl = HW_TO_WL(hw); - int err = 0; - - switch (type) { - case NL80211_CHAN_HT20: - case NL80211_CHAN_NO_HT: - err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); - break; - case NL80211_CHAN_HT40MINUS: - case NL80211_CHAN_HT40PLUS: - wiphy_err(hw->wiphy, - "%s: Need to implement 40 Mhz Channels!\n", __func__); - err = 1; - break; - } - - if (err) - return -EIO; - return err; -} - -static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) -{ - struct ieee80211_conf *conf = &hw->conf; - struct brcms_info *wl = HW_TO_WL(hw); - int err = 0; - int new_int; - struct wiphy *wiphy = hw->wiphy; - - LOCK(wl); - if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { - if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) - < 0) { - wiphy_err(wiphy, "%s: Error setting listen_interval\n", - __func__); - err = -EIO; - goto config_out; - } - wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); - } - if (changed & IEEE80211_CONF_CHANGE_MONITOR) - wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", - __func__, conf->flags & IEEE80211_CONF_MONITOR ? - "true" : "false"); - if (changed & IEEE80211_CONF_CHANGE_PS) - wiphy_err(wiphy, "%s: change power-save mode: %s (implement)\n", - __func__, conf->flags & IEEE80211_CONF_PS ? - "true" : "false"); - - if (changed & IEEE80211_CONF_CHANGE_POWER) { - if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4) - < 0) { - wiphy_err(wiphy, "%s: Error setting power_level\n", - __func__); - err = -EIO; - goto config_out; - } - wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int); - if (new_int != (conf->power_level * 4)) - wiphy_err(wiphy, "%s: Power level req != actual, %d %d" - "\n", __func__, conf->power_level * 4, - new_int); - } - if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { - err = ieee_set_channel(hw, conf->channel, conf->channel_type); - } - if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { - if (wlc_set - (wl->wlc, WLC_SET_SRL, - conf->short_frame_max_tx_count) < 0) { - wiphy_err(wiphy, "%s: Error setting srl\n", __func__); - err = -EIO; - goto config_out; - } - if (wlc_set(wl->wlc, WLC_SET_LRL, conf->long_frame_max_tx_count) - < 0) { - wiphy_err(wiphy, "%s: Error setting lrl\n", __func__); - err = -EIO; - goto config_out; - } - } - - config_out: - UNLOCK(wl); - return err; -} - -static void -brcms_ops_bss_info_changed(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_bss_conf *info, u32 changed) -{ - struct brcms_info *wl = HW_TO_WL(hw); - struct wiphy *wiphy = hw->wiphy; - int val; - - if (changed & BSS_CHANGED_ASSOC) { - /* association status changed (associated/disassociated) - * also implies a change in the AID. - */ - wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, - __func__, info->assoc ? "" : "dis"); - LOCK(wl); - wlc_associate_upd(wl->wlc, info->assoc); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_ERP_SLOT) { - /* slot timing changed */ - if (info->use_short_slot) - val = 1; - else - val = 0; - LOCK(wl); - wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); - UNLOCK(wl); - } - - if (changed & BSS_CHANGED_HT) { - /* 802.11n parameters changed */ - u16 mode = info->ht_operation_mode; - - LOCK(wl); - wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, - mode & IEEE80211_HT_OP_MODE_PROTECTION); - wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, - mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); - wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, - mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BASIC_RATES) { - struct ieee80211_supported_band *bi; - u32 br_mask, i; - u16 rate; - struct wl_rateset rs; - int error; - - /* retrieve the current rates */ - LOCK(wl); - error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, - &rs, sizeof(rs), NULL); - UNLOCK(wl); - if (error) { - wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", - __func__, error); - return; - } - br_mask = info->basic_rates; - bi = hw->wiphy->bands[wlc_get_curband(wl->wlc)]; - for (i = 0; i < bi->n_bitrates; i++) { - /* convert to internal rate value */ - rate = (bi->bitrates[i].bitrate << 1) / 10; - - /* set/clear basic rate flag */ - brcms_set_basic_rate(&rs, rate, br_mask & 1); - br_mask >>= 1; - } - - /* update the rate set */ - LOCK(wl); - wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BEACON_INT) { - /* Beacon interval changed */ - LOCK(wl); - wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BSSID) { - /* BSSID changed, for whatever reason (IBSS and managed mode) */ - LOCK(wl); - wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, - info->bssid); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BEACON) { - /* Beacon data changed, retrieve new beacon (beaconing modes) */ - wiphy_err(wiphy, "%s: beacon changed\n", __func__); - } - if (changed & BSS_CHANGED_BEACON_ENABLED) { - /* Beaconing should be enabled/disabled (beaconing modes) */ - wiphy_err(wiphy, "%s: Beacon enabled: %s\n", __func__, - info->enable_beacon ? "true" : "false"); - } - if (changed & BSS_CHANGED_CQM) { - /* Connection quality monitor config changed */ - wiphy_err(wiphy, "%s: cqm change: threshold %d, hys %d " - " (implement)\n", __func__, info->cqm_rssi_thold, - info->cqm_rssi_hyst); - } - if (changed & BSS_CHANGED_IBSS) { - /* IBSS join status changed */ - wiphy_err(wiphy, "%s: IBSS joined: %s (implement)\n", __func__, - info->ibss_joined ? "true" : "false"); - } - if (changed & BSS_CHANGED_ARP_FILTER) { - /* Hardware ARP filter address list or state changed */ - wiphy_err(wiphy, "%s: arp filtering: enabled %s, count %d" - " (implement)\n", __func__, info->arp_filter_enabled ? - "true" : "false", info->arp_addr_cnt); - } - if (changed & BSS_CHANGED_QOS) { - /* - * QoS for this association was enabled/disabled. - * Note that it is only ever disabled for station mode. - */ - wiphy_err(wiphy, "%s: qos enabled: %s (implement)\n", __func__, - info->qos ? "true" : "false"); - } - if (changed & BSS_CHANGED_IDLE) { - /* Idle changed for this BSS/interface */ - wiphy_err(wiphy, "%s: BSS idle: %s (implement)\n", __func__, - info->idle ? "true" : "false"); - } - return; -} - -static void -brcms_ops_configure_filter(struct ieee80211_hw *hw, - unsigned int changed_flags, - unsigned int *total_flags, u64 multicast) -{ - struct brcms_info *wl = hw->priv; - struct wiphy *wiphy = hw->wiphy; - - changed_flags &= MAC_FILTERS; - *total_flags &= MAC_FILTERS; - if (changed_flags & FIF_PROMISC_IN_BSS) - wiphy_err(wiphy, "FIF_PROMISC_IN_BSS\n"); - if (changed_flags & FIF_ALLMULTI) - wiphy_err(wiphy, "FIF_ALLMULTI\n"); - if (changed_flags & FIF_FCSFAIL) - wiphy_err(wiphy, "FIF_FCSFAIL\n"); - if (changed_flags & FIF_PLCPFAIL) - wiphy_err(wiphy, "FIF_PLCPFAIL\n"); - if (changed_flags & FIF_CONTROL) - wiphy_err(wiphy, "FIF_CONTROL\n"); - if (changed_flags & FIF_OTHER_BSS) - wiphy_err(wiphy, "FIF_OTHER_BSS\n"); - if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { - LOCK(wl); - if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { - wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; - wlc_mac_bcn_promisc_change(wl->wlc, 1); - } else { - wlc_mac_bcn_promisc_change(wl->wlc, 0); - wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; - } - UNLOCK(wl); - } - return; -} - -static int -brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) -{ - return 0; -} - -static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - LOCK(wl); - wlc_scan_start(wl->wlc); - UNLOCK(wl); - return; -} - -static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - LOCK(wl); - wlc_scan_stop(wl->wlc); - UNLOCK(wl); - return; -} - -static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) -{ - wiphy_err(hw->wiphy, "%s: Enter\n", __func__); - return; -} - -static int -brcms_ops_get_stats(struct ieee80211_hw *hw, - struct ieee80211_low_level_stats *stats) -{ - struct brcms_info *wl = hw->priv; - struct wl_cnt *cnt; - - LOCK(wl); - cnt = wl->pub->_cnt; - stats->dot11ACKFailureCount = 0; - stats->dot11RTSFailureCount = 0; - stats->dot11FCSErrorCount = 0; - stats->dot11RTSSuccessCount = 0; - UNLOCK(wl); - return 0; -} - -static void -brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - enum sta_notify_cmd cmd, struct ieee80211_sta *sta) -{ - switch (cmd) { - default: - wiphy_err(hw->wiphy, "%s: Unknown cmd = %d\n", __func__, - cmd); - break; - } - return; -} - -static int -brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, - const struct ieee80211_tx_queue_params *params) -{ - struct brcms_info *wl = hw->priv; - - LOCK(wl); - wlc_wme_setparams(wl->wlc, queue, params, true); - UNLOCK(wl); - - return 0; -} - -static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) -{ - wiphy_err(hw->wiphy, "%s: Enter\n", __func__); - return 0; -} - -static int -brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) -{ - struct scb *scb; - - int i; - struct brcms_info *wl = hw->priv; - - /* Init the scb */ - scb = (struct scb *)sta->drv_priv; - memset(scb, 0, sizeof(struct scb)); - for (i = 0; i < NUMPRIO; i++) - scb->seqctl[i] = 0xFFFF; - scb->seqctl_nonqos = 0xFFFF; - scb->magic = SCB_MAGIC; - - wl->pub->global_scb = scb; - wl->pub->global_ampdu = &(scb->scb_ampdu); - wl->pub->global_ampdu->scb = scb; - wl->pub->global_ampdu->max_pdu = 16; - bcm_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, - AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); - - sta->ht_cap.ht_supported = true; - sta->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; - sta->ht_cap.ampdu_density = AMPDU_DEF_MPDU_DENSITY; - sta->ht_cap.cap = IEEE80211_HT_CAP_GRN_FLD | - IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT; - - /* minstrel_ht initiates addBA on our behalf by calling ieee80211_start_tx_ba_session() */ - return 0; -} - -static int -brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) -{ - return 0; -} - -static int -brcms_ops_ampdu_action(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum ieee80211_ampdu_mlme_action action, - struct ieee80211_sta *sta, u16 tid, u16 *ssn, - u8 buf_size) -{ - struct scb *scb = (struct scb *)sta->drv_priv; - struct brcms_info *wl = hw->priv; - int status; - - if (WARN_ON(scb->magic != SCB_MAGIC)) - return -EIDRM; - switch (action) { - case IEEE80211_AMPDU_RX_START: - break; - case IEEE80211_AMPDU_RX_STOP: - break; - case IEEE80211_AMPDU_TX_START: - LOCK(wl); - status = wlc_aggregatable(wl->wlc, tid); - UNLOCK(wl); - if (!status) { - wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", - tid); - return -EINVAL; - } - /* XXX: Use the starting sequence number provided ... */ - *ssn = 0; - ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); - break; - - case IEEE80211_AMPDU_TX_STOP: - LOCK(wl); - wlc_ampdu_flush(wl->wlc, sta, tid); - UNLOCK(wl); - ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); - break; - case IEEE80211_AMPDU_TX_OPERATIONAL: - /* Not sure what to do here */ - /* Power save wakeup */ - break; - default: - wiphy_err(wl->wiphy, "%s: Invalid command, ignoring\n", - __func__); - } - - return 0; -} - -static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = HW_TO_WL(hw); - bool blocked; - - LOCK(wl); - blocked = wlc_check_radio_disabled(wl->wlc); - UNLOCK(wl); - - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); -} - -static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) -{ - struct brcms_info *wl = HW_TO_WL(hw); - - no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); - - /* wait for packet queue and dma fifos to run empty */ - LOCK(wl); - wlc_wait_for_tx_completion(wl->wlc, drop); - UNLOCK(wl); -} - -static const struct ieee80211_ops brcms_ops = { - .tx = brcms_ops_tx, - .start = brcms_ops_start, - .stop = brcms_ops_stop, - .add_interface = brcms_ops_add_interface, - .remove_interface = brcms_ops_remove_interface, - .config = brcms_ops_config, - .bss_info_changed = brcms_ops_bss_info_changed, - .configure_filter = brcms_ops_configure_filter, - .set_tim = brcms_ops_set_tim, - .sw_scan_start = brcms_ops_sw_scan_start, - .sw_scan_complete = brcms_ops_sw_scan_complete, - .set_tsf = brcms_ops_set_tsf, - .get_stats = brcms_ops_get_stats, - .sta_notify = brcms_ops_sta_notify, - .conf_tx = brcms_ops_conf_tx, - .get_tsf = brcms_ops_get_tsf, - .sta_add = brcms_ops_sta_add, - .sta_remove = brcms_ops_sta_remove, - .ampdu_action = brcms_ops_ampdu_action, - .rfkill_poll = brcms_ops_rfkill_poll, - .flush = brcms_ops_flush, -}; - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int brcms_set_hint(struct brcms_info *wl, char *abbrev) -{ - return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); -} - -/** - * attach to the WL device. - * - * Attach to the WL device identified by vendor and device parameters. - * regs is a host accessible memory address pointing to WL device registers. - * - * brcms_attach is not defined as static because in the case where no bus - * is defined, wl_attach will never be called, and thus, gcc will issue - * a warning that this function is defined but not used if we declare - * it as static. - * - * - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static struct brcms_info *brcms_attach(u16 vendor, u16 device, - unsigned long regs, - uint bustype, void *btparam, uint irq) -{ - struct brcms_info *wl = NULL; - int unit, err; - unsigned long base_addr; - struct ieee80211_hw *hw; - u8 perm[ETH_ALEN]; - - unit = n_adapters_found; - err = 0; - - if (unit < 0) { - return NULL; - } - - /* allocate private info */ - hw = pci_get_drvdata(btparam); /* btparam == pdev */ - if (hw != NULL) - wl = hw->priv; - if (WARN_ON(hw == NULL) || WARN_ON(wl == NULL)) - return NULL; - wl->wiphy = hw->wiphy; - - atomic_set(&wl->callbacks, 0); - - /* setup the bottom half handler */ - tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); - - - - base_addr = regs; - - if (bustype == PCI_BUS || bustype == RPC_BUS) { - /* Do nothing */ - } else { - bustype = PCI_BUS; - BCMMSG(wl->wiphy, "force to PCI\n"); - } - wl->bcm_bustype = bustype; - - wl->regsva = ioremap_nocache(base_addr, PCI_BAR0_WINSZ); - if (wl->regsva == NULL) { - wiphy_err(wl->wiphy, "wl%d: ioremap() failed\n", unit); - goto fail; - } - spin_lock_init(&wl->lock); - spin_lock_init(&wl->isr_lock); - - /* prepare ucode */ - if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { - wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " - "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); - brcms_release_fw(wl); - brcms_remove((struct pci_dev *)btparam); - return NULL; - } - - /* common load-time initialization */ - wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, - wl->regsva, wl->bcm_bustype, btparam, &err); - brcms_release_fw(wl); - if (!wl->wlc) { - wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", - KBUILD_MODNAME, err); - goto fail; - } - wl->pub = wlc_pub(wl->wlc); - - wl->pub->ieee_hw = hw; - - if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) { - wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", - unit); - } - - /* register our interrupt handler */ - if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { - wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); - goto fail; - } - wl->irq = irq; - - /* register module */ - wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); - - if (ieee_hw_init(hw)) { - wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, - __func__); - goto fail; - } - - memcpy(perm, &wl->pub->cur_etheraddr, ETH_ALEN); - if (WARN_ON(!is_valid_ether_addr(perm))) - goto fail; - SET_IEEE80211_PERM_ADDR(hw, perm); - - err = ieee80211_register_hw(hw); - if (err) { - wiphy_err(wl->wiphy, "%s: ieee80211_register_hw failed, status" - "%d\n", __func__, err); - } - - if (wl->pub->srom_ccode[0]) - err = brcms_set_hint(wl, wl->pub->srom_ccode); - else - err = brcms_set_hint(wl, "US"); - if (err) { - wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", - __func__, err); - } - - n_adapters_found++; - return wl; - -fail: - brcms_free(wl); - return NULL; -} - - - -#define CHAN2GHZ(channel, freqency, chflags) { \ - .band = IEEE80211_BAND_2GHZ, \ - .center_freq = (freqency), \ - .hw_value = (channel), \ - .flags = chflags, \ - .max_antenna_gain = 0, \ - .max_power = 19, \ -} - -static struct ieee80211_channel brcms_2ghz_chantable[] = { - CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(4, 2427, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(5, 2432, 0), - CHAN2GHZ(6, 2437, 0), - CHAN2GHZ(7, 2442, 0), - CHAN2GHZ(8, 2447, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(9, 2452, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(12, 2467, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(13, 2472, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(14, 2484, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) -}; - -#define CHAN5GHZ(channel, chflags) { \ - .band = IEEE80211_BAND_5GHZ, \ - .center_freq = 5000 + 5*(channel), \ - .hw_value = (channel), \ - .flags = chflags, \ - .max_antenna_gain = 0, \ - .max_power = 21, \ -} - -static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { - /* UNII-1 */ - CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(44, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS), - /* UNII-2 */ - CHAN5GHZ(52, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(56, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(60, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(64, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - /* MID */ - CHAN5GHZ(100, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(104, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(108, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(112, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(116, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(120, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(124, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(128, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(132, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(136, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(140, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS | - IEEE80211_CHAN_NO_HT40MINUS), - /* UNII-3 */ - CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(153, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(157, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(161, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(165, IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) -}; - -#define RATE(rate100m, _flags) { \ - .bitrate = (rate100m), \ - .flags = (_flags), \ - .hw_value = (rate100m / 5), \ -} - -static struct ieee80211_rate legacy_ratetable[] = { - RATE(10, 0), - RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(110, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(60, 0), - RATE(90, 0), - RATE(120, 0), - RATE(180, 0), - RATE(240, 0), - RATE(360, 0), - RATE(480, 0), - RATE(540, 0), -}; - -static struct ieee80211_supported_band brcms_band_2GHz_nphy = { - .band = IEEE80211_BAND_2GHZ, - .channels = brcms_2ghz_chantable, - .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), - .bitrates = legacy_ratetable, - .n_bitrates = ARRAY_SIZE(legacy_ratetable), - .ht_cap = { - /* from include/linux/ieee80211.h */ - .cap = IEEE80211_HT_CAP_GRN_FLD | - IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, - .ht_supported = true, - .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, - .ampdu_density = AMPDU_DEF_MPDU_DENSITY, - .mcs = { - /* placeholders for now */ - .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, - .rx_highest = 500, - .tx_params = IEEE80211_HT_MCS_TX_DEFINED} - } -}; - -static struct ieee80211_supported_band brcms_band_5GHz_nphy = { - .band = IEEE80211_BAND_5GHZ, - .channels = brcms_5ghz_nphy_chantable, - .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), - .bitrates = legacy_ratetable + 4, - .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, - .ht_cap = { - /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ - .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ - .ht_supported = true, - .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, - .ampdu_density = AMPDU_DEF_MPDU_DENSITY, - .mcs = { - /* placeholders for now */ - .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, - .rx_highest = 500, - .tx_params = IEEE80211_HT_MCS_TX_DEFINED} - } -}; - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int ieee_hw_rate_init(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = HW_TO_WL(hw); - int has_5g; - char phy_list[4]; - - has_5g = 0; - - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; - hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; - - if (wlc_get(wl->wlc, WLC_GET_PHYLIST, (int *)&phy_list) < 0) { - wiphy_err(hw->wiphy, "Phy list failed\n"); - } - - if (phy_list[0] == 'n' || phy_list[0] == 'c') { - if (phy_list[0] == 'c') { - /* Single stream */ - brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; - brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; - } - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; - } else { - return -EPERM; - } - - /* Assume all bands use the same phy. True for 11n devices. */ - if (NBANDS_PUB(wl->pub) > 1) { - has_5g++; - if (phy_list[0] == 'n' || phy_list[0] == 'c') { - hw->wiphy->bands[IEEE80211_BAND_5GHZ] = - &brcms_band_5GHz_nphy; - } else { - return -EPERM; - } - } - return 0; -} - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int ieee_hw_init(struct ieee80211_hw *hw) -{ - hw->flags = IEEE80211_HW_SIGNAL_DBM - /* | IEEE80211_HW_CONNECTION_MONITOR What is this? */ - | IEEE80211_HW_REPORTS_TX_ACK_STATUS - | IEEE80211_HW_AMPDU_AGGREGATION; - - hw->extra_tx_headroom = wlc_get_header_len(); - hw->queues = N_TX_QUEUES; - /* FIXME: this doesn't seem to be used properly in minstrel_ht. - * mac80211/status.c:ieee80211_tx_status() checks this value, - * but mac80211/rc80211_minstrel_ht.c:minstrel_ht_get_rate() - * appears to always set 3 rates - */ - hw->max_rates = 2; /* Primary rate and 1 fallback rate */ - - hw->channel_change_time = 7 * 1000; /* channel change time is dependent on chip and band */ - hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); - - hw->rate_control_algorithm = "minstrel_ht"; - - hw->sta_data_size = sizeof(struct scb); - return ieee_hw_rate_init(hw); -} - -/** - * determines if a device is a WL device, and if so, attaches it. - * - * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a brcms_attach() on it. - * - * Perimeter lock is initialized in the course of this function. - */ -static int __devinit -brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - int rc; - struct brcms_info *wl; - struct ieee80211_hw *hw; - u32 val; - - dev_info(&pdev->dev, "bus %d slot %d func %d irq %d\n", - pdev->bus->number, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), pdev->irq); - - if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || - ((pdev->device != 0x0576) && - ((pdev->device & 0xff00) != 0x4300) && - ((pdev->device & 0xff00) != 0x4700) && - ((pdev->device < 43000) || (pdev->device > 43999)))) - return -ENODEV; - - rc = pci_enable_device(pdev); - if (rc) { - pr_err("%s: Cannot enable device %d-%d_%d\n", - __func__, pdev->bus->number, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); - return -ENODEV; - } - pci_set_master(pdev); - - pci_read_config_dword(pdev, 0x40, &val); - if ((val & 0x0000ff00) != 0) - pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - - hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); - if (!hw) { - pr_err("%s: ieee80211_alloc_hw failed\n", __func__); - return -ENOMEM; - } - - SET_IEEE80211_DEV(hw, &pdev->dev); - - pci_set_drvdata(pdev, hw); - - memset(hw->priv, 0, sizeof(*wl)); - - wl = brcms_attach(pdev->vendor, pdev->device, - pci_resource_start(pdev, 0), PCI_BUS, pdev, - pdev->irq); - - if (!wl) { - pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, - __func__); - return -ENODEV; - } - return 0; -} - -static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - wiphy_err(wl->wiphy, - "brcms_suspend: pci_get_drvdata failed\n"); - return -ENODEV; - } - - /* only need to flag hw is down for proper resume */ - LOCK(wl); - wl->pub->hw_up = false; - UNLOCK(wl); - - pci_save_state(pdev); - pci_disable_device(pdev); - return pci_set_power_state(pdev, PCI_D3hot); -} - -static int brcms_resume(struct pci_dev *pdev) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - int err = 0; - u32 val; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - wiphy_err(wl->wiphy, - "wl: brcms_resume: pci_get_drvdata failed\n"); - return -ENODEV; - } - - err = pci_set_power_state(pdev, PCI_D0); - if (err) - return err; - - pci_restore_state(pdev); - - err = pci_enable_device(pdev); - if (err) - return err; - - pci_set_master(pdev); - - pci_read_config_dword(pdev, 0x40, &val); - if ((val & 0x0000ff00) != 0) - pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - - /* - * done. driver will be put in up state - * in brcms_ops_add_interface() call. - */ - return err; -} - -/* -* called from both kernel as from this kernel module. -* precondition: perimeter lock is not acquired. -*/ -static void brcms_remove(struct pci_dev *pdev) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - int status; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); - return; - } - - LOCK(wl); - status = wlc_chipmatch(pdev->vendor, pdev->device); - UNLOCK(wl); - if (!status) { - wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch " - "failed\n"); - return; - } - if (wl->wlc) { - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); - wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); - ieee80211_unregister_hw(hw); - LOCK(wl); - brcms_down(wl); - UNLOCK(wl); - } - pci_disable_device(pdev); - - brcms_free(wl); - - pci_set_drvdata(pdev, NULL); - ieee80211_free_hw(hw); -} - -static struct pci_driver brcms_pci_driver = { - .name = KBUILD_MODNAME, - .probe = brcms_pci_probe, - .suspend = brcms_suspend, - .resume = brcms_resume, - .remove = __devexit_p(brcms_remove), - .id_table = brcms_pci_id_table, -}; - -/** - * This is the main entry point for the WL driver. - * - * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a brcms_attach() on it. - * - */ -static int __init brcms_module_init(void) -{ - int error = -ENODEV; - -#ifdef BCMDBG - if (msglevel != 0xdeadbeef) - brcm_msg_level = msglevel; - else { - char *var = getvar(NULL, "wl_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - brcm_msg_level = value; - } - } - if (phymsglevel != 0xdeadbeef) - phyhal_msg_level = phymsglevel; - else { - char *var = getvar(NULL, "phy_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - phyhal_msg_level = value; - } - } -#endif /* BCMDBG */ - - error = pci_register_driver(&brcms_pci_driver); - if (!error) - return 0; - - - - return error; -} - -/** - * This function unloads the WL driver from the system. - * - * This function unconditionally unloads the WL driver module from the - * system. - * - */ -static void __exit brcms_module_exit(void) -{ - pci_unregister_driver(&brcms_pci_driver); - -} - -module_init(brcms_module_init); -module_exit(brcms_module_exit); - -/** - * This function frees the WL per-device resources. - * - * This function frees resources owned by the WL device pointed to - * by the wl parameter. - * - * precondition: can both be called locked and unlocked - * - */ -static void brcms_free(struct brcms_info *wl) -{ - struct brcms_timer *t, *next; - - /* free ucode data */ - if (wl->fw.fw_cnt) - brcms_ucode_data_free(); - if (wl->irq) - free_irq(wl->irq, wl); - - /* kill dpc */ - tasklet_kill(&wl->tasklet); - - if (wl->pub) { - wlc_module_unregister(wl->pub, "linux", wl); - } - - /* free common resources */ - if (wl->wlc) { - wlc_detach(wl->wlc); - wl->wlc = NULL; - wl->pub = NULL; - } - - /* virtual interface deletion is deferred so we cannot spinwait */ - - /* wait for all pending callbacks to complete */ - while (atomic_read(&wl->callbacks) > 0) - schedule(); - - /* free timers */ - for (t = wl->timers; t; t = next) { - next = t->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - } - - /* - * unregister_netdev() calls get_stats() which may read chip registers - * so we cannot unmap the chip registers until after calling unregister_netdev() . - */ - if (wl->regsva && wl->bcm_bustype != SDIO_BUS && - wl->bcm_bustype != JTAG_BUS) { - iounmap((void *)wl->regsva); - } - wl->regsva = NULL; -} - -/* flags the given rate in rateset as requested */ -static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) -{ - u32 i; - - for (i = 0; i < rs->count; i++) { - if (rate != (rs->rates[i] & 0x7f)) - continue; - - if (is_br) - rs->rates[i] |= WLC_RATE_FLAG; - else - rs->rates[i] &= WLC_RATE_MASK; - return; - } -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, - bool state, int prio) -{ - wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_init(struct brcms_info *wl) -{ - BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - brcms_reset(wl); - - wlc_init(wl->wlc); -} - -/* - * precondition: perimeter lock has been acquired - */ -uint brcms_reset(struct brcms_info *wl) -{ - BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - wlc_reset(wl->wlc); - - /* dpc will not be rescheduled */ - wl->resched = 0; - - return 0; -} - -/* - * These are interrupt on/off entry points. Disable interrupts - * during interrupt state transition. - */ -void brcms_intrson(struct brcms_info *wl) -{ - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrson(wl->wlc); - INT_UNLOCK(wl, flags); -} - -/* - * precondition: perimeter lock has been acquired - */ -bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) -{ - return true; -} - -u32 brcms_intrsoff(struct brcms_info *wl) -{ - unsigned long flags; - u32 status; - - INT_LOCK(wl, flags); - status = wlc_intrsoff(wl->wlc); - INT_UNLOCK(wl, flags); - return status; -} - -void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) -{ - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrsrestore(wl->wlc, macintmask); - INT_UNLOCK(wl, flags); -} - -/* - * precondition: perimeter lock has been acquired - */ -int brcms_up(struct brcms_info *wl) -{ - int error = 0; - - if (wl->pub->up) - return 0; - - error = wlc_up(wl->wlc); - - return error; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_down(struct brcms_info *wl) -{ - uint callbacks, ret_val = 0; - - /* call common down function */ - ret_val = wlc_down(wl->wlc); - callbacks = atomic_read(&wl->callbacks) - ret_val; - - /* wait for down callbacks to complete */ - UNLOCK(wl); - - /* For HIGH_only driver, it's important to actually schedule other work, - * not just spin wait since everything runs at schedule level - */ - SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); - - LOCK(wl); -} - -static irqreturn_t brcms_isr(int irq, void *dev_id) -{ - struct brcms_info *wl; - bool ours, wantdpc; - unsigned long flags; - - wl = (struct brcms_info *) dev_id; - - ISR_LOCK(wl, flags); - - /* call common first level interrupt handler */ - ours = wlc_isr(wl->wlc, &wantdpc); - if (ours) { - /* if more to do... */ - if (wantdpc) { - - /* ...and call the second level interrupt handler */ - /* schedule dpc */ - tasklet_schedule(&wl->tasklet); - } - } - - ISR_UNLOCK(wl, flags); - - return IRQ_RETVAL(ours); -} - -static void brcms_dpc(unsigned long data) -{ - struct brcms_info *wl; - - wl = (struct brcms_info *) data; - - LOCK(wl); - - /* call the common second level interrupt handler */ - if (wl->pub->up) { - if (wl->resched) { - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrsupd(wl->wlc); - INT_UNLOCK(wl, flags); - } - - wl->resched = wlc_dpc(wl->wlc, true); - } - - /* wlc_dpc() may bring the driver down */ - if (!wl->pub->up) - goto done; - - /* re-schedule dpc */ - if (wl->resched) - tasklet_schedule(&wl->tasklet); - else { - /* re-enable interrupts */ - brcms_intrson(wl); - } - - done: - UNLOCK(wl); -} - -/* - * is called by the kernel from software irq context - */ -static void brcms_timer(unsigned long data) -{ - _brcms_timer((struct brcms_timer *) data); -} - -/* -* precondition: perimeter lock is not acquired - */ -static void _brcms_timer(struct brcms_timer *t) -{ - LOCK(t->wl); - - if (t->set) { - if (t->periodic) { - t->timer.expires = jiffies + t->ms * HZ / 1000; - atomic_inc(&t->wl->callbacks); - add_timer(&t->timer); - t->set = true; - } else - t->set = false; - - t->fn(t->arg); - } - - atomic_dec(&t->wl->callbacks); - - UNLOCK(t->wl); -} - -/* - * Adds a timer to the list. Caller supplies a timer function. - * Is called from wlc. - * - * precondition: perimeter lock has been acquired - */ -struct brcms_timer *brcms_init_timer(struct brcms_info *wl, - void (*fn) (void *arg), - void *arg, const char *name) -{ - struct brcms_timer *t; - - t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); - if (!t) { - wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", - wl->pub->unit); - return 0; - } - - init_timer(&t->timer); - t->timer.data = (unsigned long) t; - t->timer.function = brcms_timer; - t->wl = wl; - t->fn = fn; - t->arg = arg; - t->next = wl->timers; - wl->timers = t; - -#ifdef BCMDBG - t->name = kmalloc(strlen(name) + 1, GFP_ATOMIC); - if (t->name) - strcpy(t->name, name); -#endif - - return t; -} - -/* BMAC_NOTE: Add timer adds only the kernel timer since it's going to be more accurate - * as well as it's easier to make it periodic - * - * precondition: perimeter lock has been acquired - */ -void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, - int periodic) -{ -#ifdef BCMDBG - if (t->set) { - wiphy_err(wl->wiphy, "%s: Already set. Name: %s, per %d\n", - __func__, t->name, periodic); - } -#endif - t->ms = ms; - t->periodic = (bool) periodic; - t->set = true; - t->timer.expires = jiffies + ms * HZ / 1000; - - atomic_inc(&wl->callbacks); - add_timer(&t->timer); -} - -/* - * return true if timer successfully deleted, false if still pending - * - * precondition: perimeter lock has been acquired - */ -bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) -{ - if (t->set) { - t->set = false; - if (!del_timer(&t->timer)) { - return false; - } - atomic_dec(&wl->callbacks); - } - - return true; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) -{ - struct brcms_timer *tmp; - - /* delete the timer in case it is active */ - brcms_del_timer(wl, t); - - if (wl->timers == t) { - wl->timers = wl->timers->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - return; - - } - - tmp = wl->timers; - while (tmp) { - if (tmp->next == t) { - tmp->next = t->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - return; - } - tmp = tmp->next; - } - -} - -/* - * runs in software irq context - * - * precondition: perimeter lock is not acquired - */ -static int wl_linux_watchdog(void *ctx) -{ - return 0; -} - -struct firmware_hdr { - u32 offset; - u32 len; - u32 idx; -}; - -char *brcms_firmwares[MAX_FW_IMAGES] = { - "brcm/bcm43xx", - NULL -}; - -/* - * precondition: perimeter lock has been acquired - */ -int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) -{ - int i, entry; - const u8 *pdata; - struct firmware_hdr *hdr; - for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i]; - entry++, hdr++) { - if (hdr->idx == idx) { - pdata = wl->fw.fw_bin[i]->data + hdr->offset; - *pbuf = kmalloc(hdr->len, GFP_ATOMIC); - if (*pbuf == NULL) { - wiphy_err(wl->wiphy, "fail to alloc %d" - " bytes\n", hdr->len); - goto fail; - } - memcpy(*pbuf, pdata, hdr->len); - return 0; - } - } - } - wiphy_err(wl->wiphy, "ERROR: ucode buf tag:%d can not be found!\n", - idx); - *pbuf = NULL; -fail: - return -ENODATA; -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) -{ - int i, entry; - const u8 *pdata; - struct firmware_hdr *hdr; - for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i]; - entry++, hdr++) { - if (hdr->idx == idx) { - pdata = wl->fw.fw_bin[i]->data + hdr->offset; - if (hdr->len != 4) { - wiphy_err(wl->wiphy, - "ERROR: fw hdr len\n"); - return -ENOMSG; - } - *data = *((u32 *) pdata); - return 0; - } - } - } - wiphy_err(wl->wiphy, "ERROR: ucode tag:%d can not be found!\n", idx); - return -ENOMSG; -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) -{ - int status; - struct device *device = &pdev->dev; - char fw_name[100]; - int i; - - memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); - for (i = 0; i < MAX_FW_IMAGES; i++) { - if (brcms_firmwares[i] == NULL) - break; - sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], - UCODE_LOADER_API_VER); - status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); - if (status) { - wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", - KBUILD_MODNAME, fw_name); - return status; - } - sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], - UCODE_LOADER_API_VER); - status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); - if (status) { - wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", - KBUILD_MODNAME, fw_name); - return status; - } - wl->fw.hdr_num_entries[i] = - wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); - } - wl->fw.fw_cnt = i; - return brcms_ucode_data_init(wl); -} - -/* - * precondition: can both be called locked and unlocked - */ -void brcms_ucode_free_buf(void *p) -{ - kfree(p); -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -static void brcms_release_fw(struct brcms_info *wl) -{ - int i; - for (i = 0; i < MAX_FW_IMAGES; i++) { - release_firmware(wl->fw.fw_bin[i]); - release_firmware(wl->fw.fw_hdr[i]); - } -} - - -/* - * checks validity of all firmware images loaded from user space - * - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -int brcms_check_firmwares(struct brcms_info *wl) -{ - int i; - int entry; - int rc = 0; - const struct firmware *fw; - const struct firmware *fw_hdr; - struct firmware_hdr *ucode_hdr; - for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { - fw = wl->fw.fw_bin[i]; - fw_hdr = wl->fw.fw_hdr[i]; - if (fw == NULL && fw_hdr == NULL) { - break; - } else if (fw == NULL || fw_hdr == NULL) { - wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", - __func__); - rc = -EBADF; - } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { - wiphy_err(wl->wiphy, "%s: non integral fw hdr file " - "size %zu/%zu\n", __func__, fw_hdr->size, - sizeof(struct firmware_hdr)); - rc = -EBADF; - } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { - wiphy_err(wl->wiphy, "%s: out of bounds fw file size " - "%zu\n", __func__, fw->size); - rc = -EBADF; - } else { - /* check if ucode section overruns firmware image */ - ucode_hdr = (struct firmware_hdr *)fw_hdr->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i] && - !rc; entry++, ucode_hdr++) { - if (ucode_hdr->offset + ucode_hdr->len > - fw->size) { - wiphy_err(wl->wiphy, - "%s: conflicting bin/hdr\n", - __func__); - rc = -EBADF; - } - } - } - } - if (rc == 0 && wl->fw.fw_cnt != i) { - wiphy_err(wl->wiphy, "%s: invalid fw_cnt=%d\n", __func__, - wl->fw.fw_cnt); - rc = -EBADF; - } - return rc; -} - -/* - * precondition: perimeter lock has been acquired - */ -bool brcms_rfkill_set_hw_state(struct brcms_info *wl) -{ - bool blocked = wlc_check_radio_disabled(wl->wlc); - - UNLOCK(wl); - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); - if (blocked) - wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); - LOCK(wl); - return blocked; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_msleep(struct brcms_info *wl, uint ms) -{ - UNLOCK(wl); - msleep(ms); - LOCK(wl); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h deleted file mode 100644 index 48ec6b0..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_mac80211_h_ -#define _wl_mac80211_h_ - -/* softmac ioctl definitions */ -#define WLC_SET_SHORTSLOT_OVERRIDE 146 - - -/* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and - * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be - * submitted to workqueue instead of being on kernel timer - */ -struct brcms_timer { - struct timer_list timer; - struct brcms_info *wl; - void (*fn) (void *); - void *arg; /* argument to fn */ - uint ms; - bool periodic; - bool set; - struct brcms_timer *next; -#ifdef BCMDBG - char *name; /* Description of the timer */ -#endif -}; - -struct brcms_if { - uint subunit; /* WDS/BSS unit */ - struct pci_dev *pci_dev; -}; - -#define MAX_FW_IMAGES 4 -struct brcms_firmware { - u32 fw_cnt; - const struct firmware *fw_bin[MAX_FW_IMAGES]; - const struct firmware *fw_hdr[MAX_FW_IMAGES]; - u32 hdr_num_entries[MAX_FW_IMAGES]; -}; - -struct brcms_info { - struct wlc_pub *pub; /* pointer to public wlc state */ - void *wlc; /* pointer to private common os-independent data */ - u32 magic; - - int irq; - - spinlock_t lock; /* per-device perimeter lock */ - spinlock_t isr_lock; /* per-device ISR synchronization lock */ - - /* bus type and regsva for unmap in brcms_free() */ - uint bcm_bustype; /* bus type */ - void *regsva; /* opaque chip registers virtual address */ - - /* timer related fields */ - atomic_t callbacks; /* # outstanding callback functions */ - struct brcms_timer *timers; /* timer cleanup queue */ - - struct tasklet_struct tasklet; /* dpc tasklet */ - bool resched; /* dpc needs to be and is rescheduled */ -#ifdef LINUXSTA_PS - u32 pci_psstate[16]; /* pci ps-state save/restore */ -#endif - struct brcms_firmware fw; - struct wiphy *wiphy; -}; -#endif /* _wl_mac80211_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h b/drivers/staging/brcm80211/brcmsmac/wl_ucode.h deleted file mode 100644 index 4b90121..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include "wlc_types.h" /* forward structure declarations */ - -#define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */ -#define MAX_FW_SIZE 150000 - -#define UCODE_LOADER_API_VER 0 - -struct d11init { - u16 addr; - u16 size; - u32 value; -}; - -extern struct d11init *d11lcn0bsinitvals24; -extern struct d11init *d11lcn0initvals24; -extern struct d11init *d11lcn1bsinitvals24; -extern struct d11init *d11lcn1initvals24; -extern struct d11init *d11lcn2bsinitvals24; -extern struct d11init *d11lcn2initvals24; -extern struct d11init *d11n0absinitvals16; -extern struct d11init *d11n0bsinitvals16; -extern struct d11init *d11n0initvals16; -extern u32 *bcm43xx_16_mimo; -extern u32 bcm43xx_16_mimosz; -extern u32 *bcm43xx_24_lcn; -extern u32 bcm43xx_24_lcnsz; - -extern int brcms_ucode_data_init(struct brcms_info *wl); -extern void brcms_ucode_data_free(void); - -extern int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, - unsigned int idx); -extern int brcms_ucode_init_uint(struct brcms_info *wl, unsigned *data, - unsigned int idx); -extern void brcms_ucode_free_buf(void *); -extern int brcms_check_firmwares(struct brcms_info *wl); diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c deleted file mode 100644 index cf0be6b..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include - -enum { - D11UCODE_NAMETAG_START = 0, - D11LCN0BSINITVALS24, - D11LCN0INITVALS24, - D11LCN1BSINITVALS24, - D11LCN1INITVALS24, - D11LCN2BSINITVALS24, - D11LCN2INITVALS24, - D11N0ABSINITVALS16, - D11N0BSINITVALS16, - D11N0INITVALS16, - D11UCODE_OVERSIGHT16_MIMO, - D11UCODE_OVERSIGHT16_MIMOSZ, - D11UCODE_OVERSIGHT24_LCN, - D11UCODE_OVERSIGHT24_LCNSZ, - D11UCODE_OVERSIGHT_BOMMAJOR, - D11UCODE_OVERSIGHT_BOMMINOR -}; - -struct d11init *d11lcn0bsinitvals24; -struct d11init *d11lcn0initvals24; -struct d11init *d11lcn1bsinitvals24; -struct d11init *d11lcn1initvals24; -struct d11init *d11lcn2bsinitvals24; -struct d11init *d11lcn2initvals24; -struct d11init *d11n0absinitvals16; -struct d11init *d11n0bsinitvals16; -struct d11init *d11n0initvals16; -u32 *bcm43xx_16_mimo; -u32 bcm43xx_16_mimosz; -u32 *bcm43xx_24_lcn; -u32 bcm43xx_24_lcnsz; -u32 *bcm43xx_bommajor; -u32 *bcm43xx_bomminor; - -int brcms_ucode_data_init(struct brcms_info *wl) -{ - int rc; - rc = brcms_check_firmwares(wl); - - rc = rc < 0 ? rc : - brcms_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, - D11LCN0BSINITVALS24); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn0initvals24, - D11LCN0INITVALS24); - rc = rc < 0 ? rc : - brcms_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, - D11LCN1BSINITVALS24); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn1initvals24, - D11LCN1INITVALS24); - rc = rc < 0 ? rc : - brcms_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, - D11LCN2BSINITVALS24); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn2initvals24, - D11LCN2INITVALS24); - rc = rc < 0 ? rc : - brcms_ucode_init_buf(wl, (void **)&d11n0absinitvals16, - D11N0ABSINITVALS16); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, - D11N0BSINITVALS16); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0initvals16, - D11N0INITVALS16); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, - D11UCODE_OVERSIGHT16_MIMO); - rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_16_mimosz, - D11UCODE_OVERSIGHT16_MIMOSZ); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, - D11UCODE_OVERSIGHT24_LCN); - rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_24_lcnsz, - D11UCODE_OVERSIGHT24_LCNSZ); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, - D11UCODE_OVERSIGHT_BOMMAJOR); - rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, - D11UCODE_OVERSIGHT_BOMMINOR); - return rc; -} - -void brcms_ucode_data_free(void) -{ - brcms_ucode_free_buf((void *)d11lcn0bsinitvals24); - brcms_ucode_free_buf((void *)d11lcn0initvals24); - brcms_ucode_free_buf((void *)d11lcn1bsinitvals24); - brcms_ucode_free_buf((void *)d11lcn1initvals24); - brcms_ucode_free_buf((void *)d11lcn2bsinitvals24); - brcms_ucode_free_buf((void *)d11lcn2initvals24); - brcms_ucode_free_buf((void *)d11n0absinitvals16); - brcms_ucode_free_buf((void *)d11n0bsinitvals16); - brcms_ucode_free_buf((void *)d11n0initvals16); - brcms_ucode_free_buf((void *)bcm43xx_16_mimo); - brcms_ucode_free_buf((void *)bcm43xx_24_lcn); - brcms_ucode_free_buf((void *)bcm43xx_bommajor); - brcms_ucode_free_buf((void *)bcm43xx_bomminor); - - return; -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index fe031f2..57c6e8a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -45,7 +45,7 @@ #include "wlc_channel.h" #include "wlc_main.h" #include "wl_export.h" -#include "wl_ucode.h" +#include "ucode_loader.h" #include "wlc_antsel.h" #include "wlc_alloc.h" #include "wl_dbg.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 1a2108c..d5ba632 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -49,7 +49,7 @@ #include "wl_export.h" #include "wlc_alloc.h" #include "wl_dbg.h" -#include "wl_mac80211.h" +#include "brcms_mac80211.h" /* * WPA(2) definitions -- cgit v0.10.2 From da4ef2aea547323c6f3fd0e49681d1cbce9544e6 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:46 +0200 Subject: staging: brcm80211: removed wl_dbg.h Code cleanup. Reducing number of header files. Merged into wlc_types.h. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c index 8eadb43..2c239cf 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -40,7 +40,6 @@ #include "wlc_channel.h" #include "wlc_scb.h" #include "wlc_pub.h" -#include "wl_dbg.h" #include "wl_export.h" #include "ucode_loader.h" #include "brcms_mac80211.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h deleted file mode 100644 index 253c464..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_dbg_h_ -#define _wl_dbg_h_ - -#include /* dev_err() */ - -/* brcm_msg_level is a bit vector with defs in bcmdefs.h */ -extern u32 brcm_msg_level; - -#define BCMMSG(dev, fmt, args...) \ -do { \ - if (brcm_msg_level & LOG_TRACE_VAL) \ - wiphy_err(dev, "%s: " fmt, __func__, ##args); \ -} while (0) - -#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) - -#endif /* _wl_dbg_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 218210a..619247a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -28,7 +28,6 @@ #include "wlc_pub.h" #include "wlc_key.h" #include "wlc_alloc.h" -#include "wl_dbg.h" #include "wlc_rate.h" #include "wlc_bsscfg.h" #include "phy/wlc_phy_hal.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 0c325c7..61d4722 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -32,7 +32,6 @@ #include "phy/wlc_phy_hal.h" #include "wlc_antsel.h" #include "wl_export.h" -#include "wl_dbg.h" #include "wlc_channel.h" #include "wlc_main.h" #include "wlc_ampdu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index fba9eaf..dcedcc2 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -32,7 +32,6 @@ #include "wlc_key.h" #include "wlc_scb.h" #include "wlc_pub.h" -#include "wl_dbg.h" #include "phy/wlc_phy_hal.h" #include "wlc_bmac.h" #include "wlc_channel.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 57c6e8a..228b02d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -48,7 +48,6 @@ #include "ucode_loader.h" #include "wlc_antsel.h" #include "wlc_alloc.h" -#include "wl_dbg.h" #include "wlc_bmac.h" #define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index cd37971..d1e764a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -37,7 +37,6 @@ #include "wlc_channel.h" #include "wlc_main.h" #include "wlc_stf.h" -#include "wl_dbg.h" #define VALID_CHANNEL20_DB(wlc, val) wlc_valid_channel20_db((wlc)->cmi, val) #define VALID_CHANNEL20_IN_BAND(wlc, bandunit, val) \ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index d5ba632..f95a6d0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -48,7 +48,6 @@ #include "wlc_ampdu.h" #include "wl_export.h" #include "wlc_alloc.h" -#include "wl_dbg.h" #include "brcms_mac80211.h" /* diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index ba5d67e..a090ee2 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -33,7 +33,6 @@ #include #include "wlc_types.h" -#include "wl_dbg.h" #include "wlc_cfg.h" #include "d11.h" #include "wlc_rate.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index d6eae1f..88aa134 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -23,7 +23,6 @@ #include "wlc_types.h" #include "d11.h" -#include "wl_dbg.h" #include "wlc_cfg.h" #include "wlc_scb.h" #include "wlc_pub.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index 8fb90d4..d4fb6e4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -26,7 +26,6 @@ #include "wlc_types.h" #include "d11.h" -#include "wl_dbg.h" #include "wlc_cfg.h" #include "wlc_rate.h" #include "wlc_scb.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 775d013..383a747 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -33,6 +33,14 @@ #define MAX_DMA_SEGS 4 +#define BCMMSG(dev, fmt, args...) \ +do { \ + if (brcm_msg_level & LOG_TRACE_VAL) \ + wiphy_err(dev, "%s: " fmt, __func__, ##args); \ +} while (0) + +#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) + /* forward declarations */ struct sk_buff; struct brcms_info; @@ -49,4 +57,7 @@ struct wlc_bsscfg; struct bcmstrbuf; struct si_pub; +/* brcm_msg_level is a bit vector with defs in bcmdefs.h */ +extern u32 brcm_msg_level; + #endif /* _wlc_types_h_ */ -- cgit v0.10.2 From 72a27fb8429dd5fb534f138c7663626254ac6fcc Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:47 +0200 Subject: staging: brcm80211: removed wl_export.h Code cleanup, reducing number of header files. Merged into brcmsmac_80211.h. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c index 2c239cf..e80e12c 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -40,7 +40,6 @@ #include "wlc_channel.h" #include "wlc_scb.h" #include "wlc_pub.h" -#include "wl_export.h" #include "ucode_loader.h" #include "brcms_mac80211.h" diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h index 48ec6b0..8ef89ad 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h @@ -78,4 +78,32 @@ struct brcms_info { struct brcms_firmware fw; struct wiphy *wiphy; }; + +/* misc callbacks */ +struct brcms_info; +struct brcms_if; +struct wlc_if; +extern void brcms_init(struct brcms_info *wl); +extern uint brcms_reset(struct brcms_info *wl); +extern void brcms_intrson(struct brcms_info *wl); +extern u32 brcms_intrsoff(struct brcms_info *wl); +extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); +extern int brcms_up(struct brcms_info *wl); +extern void brcms_down(struct brcms_info *wl); +extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio); +extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); +extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); + +/* timer functions */ +struct brcms_timer; +extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), void *arg, + const char *name); +extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, + uint ms, int periodic); +extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_msleep(struct brcms_info *wl, uint ms); + #endif /* _wl_mac80211_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_export.h b/drivers/staging/brcm80211/brcmsmac/wl_export.h deleted file mode 100644 index 01d3696..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_export.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_export_h_ -#define _wl_export_h_ - -/* misc callbacks */ -struct brcms_info; -struct brcms_if; -struct wlc_if; -extern void brcms_init(struct brcms_info *wl); -extern uint brcms_reset(struct brcms_info *wl); -extern void brcms_intrson(struct brcms_info *wl); -extern u32 brcms_intrsoff(struct brcms_info *wl); -extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); -extern int brcms_up(struct brcms_info *wl); -extern void brcms_down(struct brcms_info *wl); -extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, - bool state, int prio); -extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); -extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); - -/* timer functions */ -struct brcms_timer; -extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, - void (*fn) (void *arg), void *arg, - const char *name); -extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); -extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, - uint ms, int periodic); -extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); -extern void brcms_msleep(struct brcms_info *wl, uint ms); - -#endif /* _wl_export_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 61d4722..7a00cac 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -31,7 +31,6 @@ #include "wlc_key.h" #include "phy/wlc_phy_hal.h" #include "wlc_antsel.h" -#include "wl_export.h" #include "wlc_channel.h" #include "wlc_main.h" #include "wlc_ampdu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index dcedcc2..ea27b66 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -36,7 +36,6 @@ #include "wlc_bmac.h" #include "wlc_channel.h" #include "wlc_main.h" -#include "wl_export.h" #include "wlc_antsel.h" #define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 228b02d..6b02ebe 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -44,11 +44,11 @@ #include "phy/wlc_phy_hal.h" #include "wlc_channel.h" #include "wlc_main.h" -#include "wl_export.h" #include "ucode_loader.h" #include "wlc_antsel.h" #include "wlc_alloc.h" #include "wlc_bmac.h" +#include "brcms_mac80211.h" #define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index f95a6d0..1a3af67 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -46,7 +46,6 @@ #include "wlc_antsel.h" #include "wlc_stf.h" #include "wlc_ampdu.h" -#include "wl_export.h" #include "wlc_alloc.h" #include "brcms_mac80211.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index a090ee2..d33f720 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -44,9 +44,9 @@ #include "wlc_key.h" #include "wlc_bmac.h" #include "wlc_phy_hal.h" -#include "wl_export.h" #include "wlc_main.h" #include "wlc_phy_shim.h" +#include "brcms_mac80211.h" /* PHY SHIM module specific state */ struct wlc_phy_shim_info { diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index d4fb6e4..b7191af 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -34,7 +34,6 @@ #include "phy/wlc_phy_hal.h" #include "wlc_channel.h" #include "wlc_main.h" -#include "wl_export.h" #include "wlc_bmac.h" #include "wlc_stf.h" -- cgit v0.10.2 From aefacecc108435bde491b6ba512e38805cfd888b Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:48 +0200 Subject: staging: brcm80211: removed unused code from bcmotp.c Code cleanup. The supported chips all contain an 'IPX' controller, the older 'hnd' OTP controller is not used. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index 2b7f061..cca64e4 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -36,7 +36,7 @@ #define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ #define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ -/* Fields in otpprog in rev >= 21 and HND OTP */ +/* Fields in otpprog in rev >= 21 */ #define OTPP_COL_MASK 0x000000ff #define OTPP_COL_SHIFT 0 #define OTPP_ROW_MASK 0x0000ff00 @@ -47,7 +47,7 @@ #define OTPP_VALUE_MASK 0x20000000 #define OTPP_VALUE_SHIFT 29 #define OTPP_START_BUSY 0x80000000 -#define OTPP_READ 0x40000000 /* HND OTP */ +#define OTPP_READ 0x40000000 /* Opcodes for OTPP_OC field */ #define OTPPOC_READ 0 @@ -60,31 +60,11 @@ #define OTPPOC_ROW_LOCK 8 #define OTPPOC_PRESCN_TEST 9 -/* - * There are two different OTP controllers so far: - * 1. new IPX OTP controller: chipc 21, >=23 - * 2. older HND OTP controller: chipc 12, 17, 22 - * - * Define BCMHNDOTP to include support for the HND OTP controller. - * Define BCMIPXOTP to include support for the IPX OTP controller. - * - * NOTE 1: More than one may be defined - * NOTE 2: If none are defined, the default is to include them all. - */ - -#if !defined(BCMHNDOTP) && !defined(BCMIPXOTP) -#define BCMHNDOTP 1 -#define BCMIPXOTP 1 -#endif - -#define OTPTYPE_HND(ccrev) ((ccrev) < 21 || (ccrev) == 22) #define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) #define OTPP_TRIES 10000000 /* # of tries for OTPP */ -#ifdef BCMIPXOTP #define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ -#endif /* OTP common function type */ typedef int (*otp_status_t) (void *oh); @@ -110,7 +90,6 @@ typedef struct { otp_fn_t *fn; /* OTP functions */ struct si_pub *sih; /* Saved sb handle */ -#ifdef BCMIPXOTP /* IPX OTP section */ u16 wsize; /* Size of otp in words */ u16 rows; /* Geometry */ @@ -125,15 +104,6 @@ typedef struct { u16 fbase; /* fuse subregion offset */ u16 flim; /* fuse subregion boundary */ int otpgu_base; /* offset to General Use Region */ -#endif /* BCMIPXOTP */ - -#ifdef BCMHNDOTP - /* HND OTP section */ - uint size; /* Size of otp in bytes */ - uint hwprot; /* Hardware protection bits */ - uint signvalid; /* Signature valid bits */ - int boundary; /* hw/sw boundary */ -#endif /* BCMHNDOTP */ } otpinfo_t; static otpinfo_t otpinfo; @@ -151,8 +121,6 @@ static otpinfo_t otpinfo; * */ -#ifdef BCMIPXOTP - #define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w") /* OTP layout */ @@ -497,374 +465,7 @@ static otp_fn_t ipxotp_fn = { (otp_status_t) ipxotp_status }; -#endif /* BCMIPXOTP */ - -/* - * HND OTP Code - * - * Exported functions: - * hndotp_status() - * hndotp_size() - * hndotp_init() - * hndotp_read_bit() - * hndotp_read_region() - * hndotp_nvread() - * - */ - -#ifdef BCMHNDOTP - -/* Fields in otpstatus */ -#define OTPS_PROGFAIL 0x80000000 -#define OTPS_PROTECT 0x00000007 -#define OTPS_HW_PROTECT 0x00000001 -#define OTPS_SW_PROTECT 0x00000002 -#define OTPS_CID_PROTECT 0x00000004 -#define OTPS_RCEV_MSK 0x00003f00 -#define OTPS_RCEV_SHIFT 8 - -/* Fields in the otpcontrol register */ -#define OTPC_RECWAIT 0xff000000 -#define OTPC_PROGWAIT 0x00ffff00 -#define OTPC_PRW_SHIFT 8 -#define OTPC_MAXFAIL 0x00000038 -#define OTPC_VSEL 0x00000006 -#define OTPC_SELVL 0x00000001 - -/* OTP regions (Word offsets from otp size) */ -#define OTP_SWLIM_OFF (-4) -#define OTP_CIDBASE_OFF 0 -#define OTP_CIDLIM_OFF 4 - -/* Predefined OTP words (Word offset from otp size) */ -#define OTP_BOUNDARY_OFF (-4) -#define OTP_HWSIGN_OFF (-3) -#define OTP_SWSIGN_OFF (-2) -#define OTP_CIDSIGN_OFF (-1) -#define OTP_CID_OFF 0 -#define OTP_PKG_OFF 1 -#define OTP_FID_OFF 2 -#define OTP_RSV_OFF 3 -#define OTP_LIM_OFF 4 -#define OTP_RD_OFF 4 /* Redundancy row starts here */ -#define OTP_RC0_OFF 28 /* Redundancy control word 1 */ -#define OTP_RC1_OFF 32 /* Redundancy control word 2 */ -#define OTP_RC_LIM_OFF 36 /* Redundancy control word end */ - -#define OTP_HW_REGION OTPS_HW_PROTECT -#define OTP_SW_REGION OTPS_SW_PROTECT -#define OTP_CID_REGION OTPS_CID_PROTECT - -#if OTP_HW_REGION != OTP_HW_RGN -#error "incompatible OTP_HW_RGN" -#endif -#if OTP_SW_REGION != OTP_SW_RGN -#error "incompatible OTP_SW_RGN" -#endif -#if OTP_CID_REGION != OTP_CI_RGN -#error "incompatible OTP_CI_RGN" -#endif - -/* Redundancy entry definitions */ -#define OTP_RCE_ROW_SZ 6 -#define OTP_RCE_SIGN_MASK 0x7fff -#define OTP_RCE_ROW_MASK 0x3f -#define OTP_RCE_BITS 21 -#define OTP_RCE_SIGN_SZ 15 -#define OTP_RCE_BIT0 1 - -#define OTP_WPR 4 -#define OTP_SIGNATURE 0x578a -#define OTP_MAGIC 0x4e56 - -static int hndotp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->hwprot | oi->signvalid); -} - -static int hndotp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->size); -} - -static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn) -{ - volatile u16 *ptr; - - ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); - return R_REG(&ptr[wn]); -} - -static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - volatile u16 *ptr; - - ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); - - return R_REG(&ptr[(oi->size / 2) + woff]); -} - -static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx) -{ - uint k, row, col; - u32 otpp, st; - - row = idx / 65; - col = idx % 65; - - otpp = OTPP_START_BUSY | OTPP_READ | - ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | (col & OTPP_COL_MASK); - - W_REG(&cc->otpprog, otpp); - st = R_REG(&cc->otpprog); - for (k = 0; - ((st & OTPP_START_BUSY) == OTPP_START_BUSY) && (k < OTPP_TRIES); - k++) - st = R_REG(&cc->otpprog); - - if (k >= OTPP_TRIES) { - return 0xffff; - } - if (st & OTPP_READERR) { - return 0xffff; - } - st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; - return (u16) st; -} - -static void *hndotp_init(struct si_pub *sih) -{ - uint idx; - chipcregs_t *cc; - otpinfo_t *oi; - u32 cap = 0, clkdiv, otpdiv = 0; - void *ret = NULL; - - oi = &otpinfo; - - idx = ai_coreidx(sih); - - /* Check for otp */ - cc = ai_setcoreidx(sih, SI_CC_IDX); - if (cc != NULL) { - cap = R_REG(&cc->capabilities); - if ((cap & CC_CAP_OTPSIZE) == 0) { - /* Nothing there */ - goto out; - } - - if (!((oi->ccrev == 12) || (oi->ccrev == 17) - || (oi->ccrev == 22))) - return NULL; - - /* Read the OTP byte size. chipcommon rev >= 18 has RCE so the size is - * 8 row (64 bytes) smaller - */ - oi->size = - 1 << (((cap & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) - + CC_CAP_OTPSIZE_BASE); - if (oi->ccrev >= 18) - oi->size -= ((OTP_RC0_OFF - OTP_BOUNDARY_OFF) * 2); - - oi->hwprot = (int)(R_REG(&cc->otpstatus) & OTPS_PROTECT); - oi->boundary = -1; - - /* Check the region signature */ - if (hndotp_otproff(oi, cc, OTP_HWSIGN_OFF) == OTP_SIGNATURE) { - oi->signvalid |= OTP_HW_REGION; - oi->boundary = hndotp_otproff(oi, cc, OTP_BOUNDARY_OFF); - } - - if (hndotp_otproff(oi, cc, OTP_SWSIGN_OFF) == OTP_SIGNATURE) - oi->signvalid |= OTP_SW_REGION; - - if (hndotp_otproff(oi, cc, OTP_CIDSIGN_OFF) == OTP_SIGNATURE) - oi->signvalid |= OTP_CID_REGION; - - /* Set OTP clkdiv for stability */ - if (oi->ccrev == 22) - otpdiv = 12; - - if (otpdiv) { - clkdiv = R_REG(&cc->clkdiv); - clkdiv = - (clkdiv & ~CLKD_OTP) | (otpdiv << CLKD_OTP_SHIFT); - W_REG(&cc->clkdiv, clkdiv); - } - udelay(10); - - ret = (void *)oi; - } - - out: /* All done */ - ai_setcoreidx(sih, idx); - - return ret; -} - -static int hndotp_read_region(void *oh, int region, u16 *data, uint *wlen) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - u32 idx, st; - chipcregs_t *cc; - int i; - - - if (region != OTP_HW_REGION) { - /* - * Only support HW region - * (no active chips use HND OTP SW region) - * */ - return -ENOTSUPP; - } - - /* Region empty? */ - st = oi->hwprot | oi->signvalid; - if ((st & region) == 0) - return -ENODATA; - - *wlen = - ((int)*wlen < oi->boundary / 2) ? *wlen : (uint) oi->boundary / 2; - - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - for (i = 0; i < (int)*wlen; i++) - data[i] = hndotp_otpr(oh, cc, i); - - ai_setcoreidx(oi->sih, idx); - - return 0; -} - -static int hndotp_nvread(void *oh, char *data, uint *len) -{ - int rc = 0; - otpinfo_t *oi = (otpinfo_t *) oh; - u32 base, bound, lim = 0, st; - int i, chunk, gchunks, tsz = 0; - u32 idx; - chipcregs_t *cc; - uint offset; - u16 *rawotp = NULL; - - /* save the orig core */ - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - st = hndotp_status(oh); - if (!(st & (OTP_HW_REGION | OTP_SW_REGION))) { - rc = -1; - goto out; - } - - /* Read the whole otp so we can easily manipulate it */ - lim = hndotp_size(oh); - rawotp = kmalloc(lim, GFP_ATOMIC); - if (rawotp == NULL) { - rc = -2; - goto out; - } - for (i = 0; i < (int)(lim / 2); i++) - rawotp[i] = hndotp_otpr(oh, cc, i); - - if ((st & OTP_HW_REGION) == 0) { - /* This could be a programming failure in the first - * chunk followed by one or more good chunks - */ - for (i = 0; i < (int)(lim / 2); i++) - if (rawotp[i] == OTP_MAGIC) - break; - - if (i < (int)(lim / 2)) { - base = i; - bound = (i * 2) + rawotp[i + 1]; - } else { - rc = -3; - goto out; - } - } else { - bound = rawotp[(lim / 2) + OTP_BOUNDARY_OFF]; - - /* There are two cases: 1) The whole otp is used as nvram - * and 2) There is a hardware header followed by nvram. - */ - if (rawotp[0] == OTP_MAGIC) { - base = 0; - } else - base = bound; - } - - /* Find and copy the data */ - - chunk = 0; - gchunks = 0; - i = base / 2; - offset = 0; - while ((i < (int)(lim / 2)) && (rawotp[i] == OTP_MAGIC)) { - int dsz, rsz = rawotp[i + 1]; - - if (((i * 2) + rsz) >= (int)lim) { - /* Bad length, try to find another chunk anyway */ - rsz = 6; - } - if (crc_ccitt(CRC16_INIT_VALUE, (u8 *) &rawotp[i], rsz) == - CRC16_GOOD_VALUE) { - /* Good crc, copy the vars */ - gchunks++; - dsz = rsz - 6; - tsz += dsz; - if (offset + dsz >= *len) { - goto out; - } - memcpy(&data[offset], &rawotp[i + 2], dsz); - offset += dsz; - /* Remove extra null characters at the end */ - while (offset > 1 && - data[offset - 1] == 0 && data[offset - 2] == 0) - offset--; - i += rsz / 2; - } else { - /* bad length or crc didn't check, try to find the next set */ - if (rawotp[i + (rsz / 2)] == OTP_MAGIC) { - /* Assume length is good */ - i += rsz / 2; - } else { - while (++i < (int)(lim / 2)) - if (rawotp[i] == OTP_MAGIC) - break; - } - } - chunk++; - } - - *len = offset; - - out: - kfree(rawotp); - ai_setcoreidx(oi->sih, idx); - - return rc; -} - -static otp_fn_t otp_fn = { - (otp_size_t) hndotp_size, - (otp_read_bit_t) hndotp_read_bit, - - (otp_init_t) hndotp_init, - (otp_read_region_t) hndotp_read_region, - (otp_nvread_t) hndotp_nvread, - - (otp_status_t) hndotp_status -}; - -#endif /* BCMHNDOTP */ - /* - * Common Code: Compiled for IPX / HND / AUTO * otp_status() * otp_size() * otp_read_bit() @@ -907,15 +508,8 @@ void *otp_init(struct si_pub *sih) oi->ccrev = sih->ccrev; -#ifdef BCMIPXOTP if (OTPTYPE_IPX(oi->ccrev)) oi->fn = &ipxotp_fn; -#endif - -#ifdef BCMHNDOTP - if (OTPTYPE_HND(oi->ccrev)) - oi->fn = &otp_fn; -#endif if (oi->fn == NULL) { return NULL; -- cgit v0.10.2 From 6cd8d7bffbfb9a78df322b1963a13389c737bc0f Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:49 +0200 Subject: staging: brcm80211: removed Broadcom specific acronym 'hnd'. Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/pcicfg.h b/drivers/staging/brcm80211/brcmfmac/pcicfg.h index d0c617a..3258449 100644 --- a/drivers/staging/brcm80211/brcmfmac/pcicfg.h +++ b/drivers/staging/brcm80211/brcmfmac/pcicfg.h @@ -22,7 +22,7 @@ /* PCI configuration address space size */ #define PCI_SZPCR 256 -/* Everything below is BRCM HND proprietary */ +/* Everything below is Broadcom specific */ /* Brcm PCI configuration registers */ #define PCI_BAR0_WIN 0x80 /* backplane address space accessed by BAR0 */ diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index ec7acd1..211a27a 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -151,9 +151,7 @@ * maps all unused address ranges */ -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ +/* chipcommon being the first core: */ #define SI_CC_IDX 0 /* SOC Interconnect types (aka chip types) */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index 1a1ca03..dd55e29 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -58,9 +58,9 @@ typedef volatile struct { /* range param for dma_getnexttxp() and dma_txreclaim */ typedef enum txd_range { - HNDDMA_RANGE_ALL = 1, - HNDDMA_RANGE_TRANSMITTED, - HNDDMA_RANGE_TRANSFERED + DMA_RANGE_ALL = 1, + DMA_RANGE_TRANSMITTED, + DMA_RANGE_TRANSFERED } txd_range_t; /* dma function type */ diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index 12a0ead..e9fa4ca 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -105,8 +105,6 @@ typedef volatile struct { /* * Host Interface Registers - * - primed from hnd_cores/dot11mac/systemC/registers/ihr.h - * - but definitely not complete */ typedef volatile struct _d11regs { /* Device Control ("semi-standard host registers") */ diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index d50395d..a754cdd6 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -1292,9 +1292,9 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range) void *p; DMA_TRACE(("%s: dma_txreclaim %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : + (range == DMA_RANGE_ALL) ? "all" : ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + DMA_RANGE_TRANSMITTED) ? "transmitted" : "transferred"))); if (di->txin == di->txout) @@ -1649,11 +1649,11 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, /* * Reclaim next completed txd (txds if using chained buffers) in the range * specified and return associated packet. - * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be + * If range is DMA_RANGE_TRANSMITTED, reclaim descriptors that have be * transmitted as noted by the hardware "CurrDescr" pointer. - * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be + * If range is DMA_RANGE_TRANSFERED, reclaim descriptors that have be * transferred by the DMA as noted by the hardware "ActiveDescr" pointer. - * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and + * If range is DMA_RANGE_ALL, reclaim all txd(s) posted to the ring and * return associated packet regardless of the value of hardware pointers. */ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) @@ -1663,9 +1663,9 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) void *txp; DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : + (range == DMA_RANGE_ALL) ? "all" : ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + DMA_RANGE_TRANSMITTED) ? "transmitted" : "transferred"))); if (di->ntxd == 0) @@ -1674,7 +1674,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) txp = NULL; start = di->txin; - if (range == HNDDMA_RANGE_ALL) + if (range == DMA_RANGE_ALL) end = di->txout; else { dma64regs_t *dregs = di->d64txregs; @@ -1685,7 +1685,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t)); - if (range == HNDDMA_RANGE_TRANSFERED) { + if (range == DMA_RANGE_TRANSFERED) { active_desc = (u16) (R_REG(&dregs->status1) & D64_XS1_AD_MASK); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index 6b02ebe..caee8d9 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -3415,7 +3415,7 @@ static void wlc_flushqueues(struct wlc_info *wlc) /* free any posted tx packets */ for (i = 0; i < NFIFO; i++) if (wlc_hw->di[i]) { - dma_txreclaim(wlc_hw->di[i], HNDDMA_RANGE_ALL); + dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); TXPKTPENDCLR(wlc, i); BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 916b2a0..1dfa04b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -736,7 +736,7 @@ struct antsel_info { #define TXPKTPENDCLR(wlc, fifo) ((wlc)->core->txpktpend[(fifo)] = 0) #define TXAVAIL(wlc, fifo) (*(wlc)->core->txavail[(fifo)]) #define GETNEXTTXP(wlc, _queue) \ - dma_getnexttxp((wlc)->hw->di[(_queue)], HNDDMA_RANGE_TRANSMITTED) + dma_getnexttxp((wlc)->hw->di[(_queue)], DMA_RANGE_TRANSMITTED) #define WLC_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \ ((len1 == len2) && !memcmp(ssid1, ssid2, len1)) diff --git a/drivers/staging/brcm80211/include/bcmsoc.h b/drivers/staging/brcm80211/include/bcmsoc.h index 012e465..4df0c64 100644 --- a/drivers/staging/brcm80211/include/bcmsoc.h +++ b/drivers/staging/brcm80211/include/bcmsoc.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _HNDSOC_H -#define _HNDSOC_H +#ifndef _BCMSOC_H +#define _BCMSOC_H /* Include the soci specific files */ #include @@ -130,7 +130,7 @@ * unused address ranges */ -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, +/* There are TWO constants on all Broadcom chips: SI_ENUM_BASE above, * and chipcommon being the first core: */ #define SI_CC_IDX 0 @@ -195,4 +195,4 @@ #define BISZ_BSSEND_IDX 6 /* 6: bss end */ #define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ -#endif /* _HNDSOC_H */ +#endif /* _BCMSOC_H */ -- cgit v0.10.2 From 3918ec2bed87444d924482bd3b185393a4622183 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:50 +0200 Subject: staging: brcm80211: removed lmac remnants Code cleanup. LMAC (a Broadcom specific acronym) was not used. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 4f0fa20..a0c170b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -319,9 +319,6 @@ struct wlc_pub { u32 boardflags; /* Board specific flags from srom */ u32 boardflags2; /* More board flags if sromrev >= 4 */ bool tempsense_disable; /* disable periodic tempsense check */ - - bool _lmac; /* lmac module included and enabled */ - bool _lmacproto; /* lmac protocol module included and enabled */ bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */ bool _ampdumac; /* mac assist ampdu enabled or not */ -- cgit v0.10.2 From 67ad48bcf22f4a54d5921769d4403d94cb152f51 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:51 +0200 Subject: staging: brcm80211: cleaned up prefix for utility functions Code cleanup. 'bcm' replaced by 'brcmu_', which is shorthand for 'Broadcom Utilities' (the 'brcmutil.ko' library module). Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 3cea01f..1b15704 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -352,7 +352,7 @@ enum { IOV_RXCHAIN }; -const bcm_iovar_t sdioh_iovars[] = { +const struct brcmu_iovar sdioh_iovars[] = { {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0}, {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) | size) */ @@ -369,7 +369,7 @@ int sdioh_iovar_op(sdioh_info_t *si, const char *name, void *params, int plen, void *arg, int len, bool set) { - const bcm_iovar_t *vi = NULL; + const struct brcmu_iovar *vi = NULL; int bcmerror = 0; int val_size; s32 int_val = 0; @@ -386,13 +386,13 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"), name)); - vi = bcm_iovar_lookup(sdioh_iovars, name); + vi = brcmu_iovar_lookup(sdioh_iovars, name); if (vi == NULL) { bcmerror = -ENOTSUPP; goto exit; } - bcmerror = bcm_iovar_lencheck(vi, arg, len, set); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, set); if (bcmerror != 0) goto exit; @@ -888,9 +888,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, if (pkt == NULL) { sd_data(("%s: Creating new %s Packet, len=%d\n", __func__, write ? "TX" : "RX", buflen_u)); - mypkt = bcm_pkt_buf_get_skb(buflen_u); + mypkt = brcmu_pkt_buf_get_skb(buflen_u); if (!mypkt) { - sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n", + sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n", __func__, buflen_u)); return SDIOH_API_RC_FAIL; } @@ -906,7 +906,7 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, if (!write) memcpy(buffer, mypkt->data, buflen_u); - bcm_pkt_buf_free_skb(mypkt); + brcmu_pkt_buf_free_skb(mypkt); } else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) { /* Case 2: We have a packet, but it is unaligned. */ @@ -915,9 +915,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, sd_data(("%s: Creating aligned %s Packet, len=%d\n", __func__, write ? "TX" : "RX", pkt->len)); - mypkt = bcm_pkt_buf_get_skb(pkt->len); + mypkt = brcmu_pkt_buf_get_skb(pkt->len); if (!mypkt) { - sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n", + sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n", __func__, pkt->len)); return SDIOH_API_RC_FAIL; } @@ -933,7 +933,7 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, if (!write) memcpy(pkt->data, mypkt->data, mypkt->len); - bcm_pkt_buf_free_skb(mypkt); + brcmu_pkt_buf_free_skb(mypkt); } else { /* case 3: We have a packet and it is aligned. */ sd_data(("%s: Aligned %s Packet, direct DMA\n", diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h index 065f1ae..b1bb04f 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h @@ -63,7 +63,7 @@ extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, bool set); /* Add bus dump output to a buffer */ -extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf); +extern void dhd_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf); /* Clear any bus counters */ extern void dhd_bus_clearcounts(dhd_pub_t *dhdp); diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index f655322..759e899 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -366,9 +366,9 @@ dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name, return -ENOTSUPP; } -void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) +void dhd_prot_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf) { - bcm_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid); + brcmu_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid); } void dhd_prot_hdrpush(dhd_pub_t *dhd, int ifidx, struct sk_buff *pktbuf) diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 22e5efd..5b0554d 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -89,7 +89,7 @@ enum { IOV_LAST }; -const bcm_iovar_t dhd_iovars[] = { +const struct brcmu_iovar dhd_iovars[] = { {"version", IOV_VERSION, 0, IOVT_BUFFER, sizeof(dhd_version)} , #ifdef DHD_DEBUG @@ -160,54 +160,54 @@ void dhd_common_init(void) static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen) { - struct bcmstrbuf b; - struct bcmstrbuf *strbuf = &b; + struct brcmu_strbuf b; + struct brcmu_strbuf *strbuf = &b; - bcm_binit(strbuf, buf, buflen); + brcmu_binit(strbuf, buf, buflen); /* Base DHD info */ - bcm_bprintf(strbuf, "%s\n", dhd_version); - bcm_bprintf(strbuf, "\n"); - bcm_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n", + brcmu_bprintf(strbuf, "%s\n", dhd_version); + brcmu_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n", dhdp->up, dhdp->txoff, dhdp->busstate); - bcm_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n", + brcmu_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n", dhdp->hdrlen, dhdp->maxctl, dhdp->rxsz); - bcm_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n", + brcmu_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n", dhdp->iswl, dhdp->drv_version, &dhdp->mac); - bcm_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror, + brcmu_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror, dhdp->tickcnt); - bcm_bprintf(strbuf, "dongle stats:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "dongle stats:\n"); + brcmu_bprintf(strbuf, "tx_packets %ld tx_bytes %ld tx_errors %ld tx_dropped %ld\n", dhdp->dstats.tx_packets, dhdp->dstats.tx_bytes, dhdp->dstats.tx_errors, dhdp->dstats.tx_dropped); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "rx_packets %ld rx_bytes %ld rx_errors %ld rx_dropped %ld\n", dhdp->dstats.rx_packets, dhdp->dstats.rx_bytes, dhdp->dstats.rx_errors, dhdp->dstats.rx_dropped); - bcm_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast); + brcmu_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast); - bcm_bprintf(strbuf, "bus stats:\n"); - bcm_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n", + brcmu_bprintf(strbuf, "bus stats:\n"); + brcmu_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n", dhdp->tx_packets, dhdp->tx_multicast, dhdp->tx_errors); - bcm_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n", + brcmu_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n", dhdp->tx_ctlpkts, dhdp->tx_ctlerrs); - bcm_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n", + brcmu_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n", dhdp->rx_packets, dhdp->rx_multicast, dhdp->rx_errors); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "rx_ctlpkts %ld rx_ctlerrs %ld rx_dropped %ld rx_flushed %ld\n", dhdp->rx_ctlpkts, dhdp->rx_ctlerrs, dhdp->rx_dropped, dhdp->rx_flushed); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "rx_readahead_cnt %ld tx_realloc %ld fc_packets %ld\n", dhdp->rx_readahead_cnt, dhdp->tx_realloc, dhdp->fc_packets); - bcm_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched); + brcmu_bprintf(strbuf, "\n"); /* Add any prot info */ dhd_prot_dump(dhdp, strbuf); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); /* Add any bus info */ dhd_bus_dump(dhdp, strbuf); @@ -216,7 +216,7 @@ static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen) } static int -dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, +dhd_doiovar(dhd_pub_t *dhd_pub, const struct brcmu_iovar *vi, u32 actionid, const char *name, void *params, int plen, void *arg, int len, int val_size) { @@ -225,7 +225,7 @@ dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, DHD_TRACE(("%s: Enter\n", __func__)); - bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); if (bcmerror != 0) goto exit; @@ -339,7 +339,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, * exceeding total queue length */ if (!pktq_pfull(q, prec) && !pktq_full(q)) { - bcm_pktq_penq(q, prec, pkt); + brcmu_pktq_penq(q, prec, pkt); return true; } @@ -347,7 +347,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, if (pktq_pfull(q, prec)) eprec = prec; else if (pktq_full(q)) { - p = bcm_pktq_peek_tail(q, &eprec); + p = brcmu_pktq_peek_tail(q, &eprec); ASSERT(p); if (eprec > prec) return false; @@ -361,21 +361,21 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, if (eprec == prec && !discard_oldest) return false; /* refuse newer (incoming) packet */ /* Evict packet according to discard policy */ - p = discard_oldest ? bcm_pktq_pdeq(q, eprec) : - bcm_pktq_pdeq_tail(q, eprec); + p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : + brcmu_pktq_pdeq_tail(q, eprec); if (p == NULL) { - DHD_ERROR(("%s: bcm_pktq_penq() failed, oldest %d.", + DHD_ERROR(("%s: brcmu_pktq_penq() failed, oldest %d.", __func__, discard_oldest)); ASSERT(p); } - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } /* Enqueue */ - p = bcm_pktq_penq(q, prec, pkt); + p = brcmu_pktq_penq(q, prec, pkt); if (p == NULL) { - DHD_ERROR(("%s: bcm_pktq_penq() failed.", __func__)); + DHD_ERROR(("%s: brcmu_pktq_penq() failed.", __func__)); ASSERT(p); } @@ -388,7 +388,7 @@ dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name, { int bcmerror = 0; int val_size; - const bcm_iovar_t *vi = NULL; + const struct brcmu_iovar *vi = NULL; u32 actionid; DHD_TRACE(("%s: Enter\n", __func__)); @@ -402,7 +402,7 @@ dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name, /* Set does NOT take qualifiers */ ASSERT(!set || (!params && !plen)); - vi = bcm_iovar_lookup(dhd_iovars, name); + vi = brcmu_iovar_lookup(dhd_iovars, name); if (vi == NULL) { bcmerror = -ENOTSUPP; goto exit; @@ -1013,7 +1013,7 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, __func__, arg)); /* Contorl the master mode */ - bcm_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf, + brcmu_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf, sizeof(buf)); rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf)); rc = rc >= 0 ? 0 : rc; @@ -1167,7 +1167,7 @@ void dhd_arp_offload_set(dhd_pub_t *dhd, int arp_mode) char iovbuf[32]; int retcode; - bcm_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf)); retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); retcode = retcode >= 0 ? 0 : retcode; if (retcode) @@ -1183,7 +1183,7 @@ void dhd_arp_offload_enable(dhd_pub_t *dhd, int arp_enable) char iovbuf[32]; int retcode; - bcm_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf)); retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); retcode = retcode >= 0 ? 0 : retcode; if (retcode) @@ -1222,7 +1222,7 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd) */ ret = dhd_custom_get_mac_address(ea_addr); if (!ret) { - bcm_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN, + brcmu_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN, buf, sizeof(buf)); ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf)); if (ret < 0) { @@ -1247,7 +1247,7 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd) /* query for 'ver' to get version info from firmware */ memset(buf, 0, sizeof(buf)); ptr = buf; - bcm_mkiovar("ver", 0, 0, buf, sizeof(buf)); + brcmu_mkiovar("ver", 0, 0, buf, sizeof(buf)); dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf)); strsep(&ptr, "\n"); /* Print fw version info */ @@ -1258,23 +1258,23 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd) sizeof(power_mode)); /* Match Host and Dongle rx alignment */ - bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, + brcmu_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); /* disable glom option per default */ - bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); /* Setup timeout if Beacons are lost and roam is off to report link down */ - bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf, + brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); /* Enable/Disable build-in roaming to allowed ext supplicant to take of romaing */ - bcm_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); /* Force STA UP */ @@ -1282,8 +1282,8 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd) dhdcdc_set_ioctl(dhd, 0, WLC_UP, (char *)&up, sizeof(up)); /* Setup event_msgs */ - bcm_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN, iovbuf, - sizeof(iovbuf)); + brcmu_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN, + iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_CHANNEL_TIME, @@ -1647,7 +1647,7 @@ int dhd_iscan_request(void *dhdp, u16 action) params.action = action; params.scan_duration = 0; - bcm_mkiovar("iscan", (char *)¶ms, sizeof(wl_iscan_params_t), buf, + brcmu_mkiovar("iscan", (char *)¶ms, sizeof(wl_iscan_params_t), buf, WLC_IOCTL_SMLEN); rc = dhd_wl_ioctl(dhdp, WLC_SET_VAR, buf, WLC_IOCTL_SMLEN); @@ -1683,8 +1683,9 @@ static int dhd_iscan_get_partial_result(void *dhdp, uint *scan_count) memset(&list, 0, sizeof(list)); list.results.buflen = WLC_IW_ISCAN_MAXLEN; - bcm_mkiovar("iscanresults", (char *)&list, WL_ISCAN_RESULTS_FIXED_SIZE, - iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN); + brcmu_mkiovar("iscanresults", (char *)&list, + WL_ISCAN_RESULTS_FIXED_SIZE, + iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN); rc = dhd_wl_ioctl(dhdp, WLC_GET_VAR, iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN); @@ -1714,12 +1715,13 @@ int dhd_pno_clean(dhd_pub_t *dhd) int ret; /* Disable pfn */ - iov_len = - bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, sizeof(iovbuf)); + iov_len = brcmu_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, + sizeof(iovbuf)); ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (ret >= 0) { /* clear pfn */ - iov_len = bcm_mkiovar("pfnclear", 0, 0, iovbuf, sizeof(iovbuf)); + iov_len = brcmu_mkiovar("pfnclear", 0, 0, iovbuf, + sizeof(iovbuf)); if (iov_len) { ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, iov_len); @@ -1748,7 +1750,7 @@ int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled) } /* Enable/disable PNO */ - ret = bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, + ret = brcmu_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, sizeof(iovbuf)); if (ret > 0) { ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, @@ -1821,7 +1823,7 @@ dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char sc if (scan_fr != 0) pfn_param.scan_freq = scan_fr; - bcm_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf, + brcmu_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); @@ -1838,7 +1840,7 @@ dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char sc ssids_local[i].SSID_len); pfn_element.ssid.SSID_len = ssids_local[i].SSID_len; - err = bcm_mkiovar("pfn_add", (char *)&pfn_element, + err = brcmu_mkiovar("pfn_add", (char *)&pfn_element, sizeof(pfn_element), iovbuf, sizeof(iovbuf)); if (err > 0) { err = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index 6ba50bb..7f1cf8b 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -485,7 +485,7 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd) bcn_li_dtim = 3; else bcn_li_dtim = dhd->dtim_skip; - bcm_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim, + brcmu_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); @@ -493,7 +493,7 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd) /* Disable build-in roaming to allowed \ * supplicant to take of romaing */ - bcm_mkiovar("roam_off", (char *)&roamvar, 4, + brcmu_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); @@ -513,14 +513,14 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd) dhd_set_packet_filter(0, dhd); /* restore pre-suspend setting for dtim_skip */ - bcm_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip, + brcmu_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); #ifdef CUSTOMER_HW2 roamvar = 0; - bcm_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf, + brcmu_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf, sizeof(iovbuf)); dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); @@ -750,7 +750,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) } allmulti = cpu_to_le32(allmulti); - if (!bcm_mkiovar + if (!brcmu_mkiovar ("allmulti", (void *)&allmulti, sizeof(allmulti), buf, buflen)) { DHD_ERROR(("%s: mkiovar failed for allmulti, datalen %d " "buflen %u\n", dhd_ifname(&dhd->pub, ifidx), @@ -802,7 +802,7 @@ _dhd_set_mac_address(dhd_info_t *dhd, int ifidx, u8 *addr) int ret; DHD_TRACE(("%s enter\n", __func__)); - if (!bcm_mkiovar + if (!brcmu_mkiovar ("cur_etheraddr", (char *)addr, ETH_ALEN, buf, 32)) { DHD_ERROR(("%s: mkiovar failed for cur_etheraddr\n", dhd_ifname(&dhd->pub, ifidx))); @@ -2091,8 +2091,8 @@ int dhd_bus_start(dhd_pub_t *dhdp) return -ENODEV; } #ifdef EMBEDDED_PLATFORM - bcm_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN, iovbuf, - sizeof(iovbuf)); + brcmu_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN, + iovbuf, sizeof(iovbuf)); dhdcdc_query_ioctl(dhdp, 0, WLC_GET_VAR, iovbuf, sizeof(iovbuf)); memcpy(dhdp->eventmask, iovbuf, WL_EVENTING_MASK_LEN); @@ -2142,7 +2142,7 @@ dhd_iovar(dhd_pub_t *pub, int ifidx, char *name, char *cmd_buf, uint cmd_len, wl_ioctl_t ioc; int ret; - len = bcm_mkiovar(name, cmd_buf, cmd_len, buf, len); + len = brcmu_mkiovar(name, cmd_buf, cmd_len, buf, len); memset(&ioc, 0, sizeof(ioc)); diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h index d0c8321..188b588 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h @@ -61,7 +61,7 @@ extern int dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name, bool set); /* Add prot dump output to a buffer */ -extern void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf); +extern void dhd_prot_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf); /* Update local copy of dongle statistics */ extern void dhd_prot_dstats(dhd_pub_t *dhdp); diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 1799974..cc3e47d 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -766,7 +766,7 @@ static void dhdsdio_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt) { dhd_os_sdlock_rxq(bus->dhd); if ((bus->bus != SPI_BUS) || bus->usebufpool) - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); dhd_os_sdunlock_rxq(bus->dhd); } @@ -1166,7 +1166,7 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, DHD_INFO(("%s: insufficient headroom %d for %d pad\n", __func__, skb_headroom(pkt), pad)); bus->dhd->tx_realloc++; - new = bcm_pkt_buf_get_skb(pkt->len + DHD_SDALIGN); + new = brcmu_pkt_buf_get_skb(pkt->len + DHD_SDALIGN); if (!new) { DHD_ERROR(("%s: couldn't allocate new %d-byte " "packet\n", @@ -1178,7 +1178,7 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, PKTALIGN(new, pkt->len, DHD_SDALIGN); memcpy(new->data, pkt->data, pkt->len); if (free_pkt) - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); /* free the pkt if canned one is not used */ free_pkt = true; pkt = new; @@ -1295,7 +1295,7 @@ done: dhd_os_sdlock(bus->dhd); if (free_pkt) - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); return ret; } @@ -1344,7 +1344,7 @@ int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt) if (dhd_prec_enq(bus->dhd, &bus->txq, pkt, prec) == false) { skb_pull(pkt, SDPCM_HDRLEN); dhd_txcomplete(bus->dhd, pkt, false); - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); DHD_ERROR(("%s: out of bus->txq !!!\n", __func__)); ret = -ENOSR; } else { @@ -1417,7 +1417,7 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes) /* Send frames until the limit or some other event */ for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) { dhd_os_sdlock_txq(bus->dhd); - pkt = bcm_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); + pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); if (pkt == NULL) { dhd_os_sdunlock_txq(bus->dhd); break; @@ -1703,7 +1703,7 @@ enum { IOV_VARS }; -const bcm_iovar_t dhdsdio_iovars[] = { +const struct brcmu_iovar dhdsdio_iovars[] = { {"intr", IOV_INTR, 0, IOVT_BOOL, 0}, {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0}, {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0}, @@ -1753,50 +1753,51 @@ const bcm_iovar_t dhdsdio_iovars[] = { }; static void -dhd_dump_pct(struct bcmstrbuf *strbuf, char *desc, uint num, uint div) +dhd_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div) { uint q1, q2; if (!div) { - bcm_bprintf(strbuf, "%s N/A", desc); + brcmu_bprintf(strbuf, "%s N/A", desc); } else { q1 = num / div; q2 = (100 * (num - (q1 * div))) / div; - bcm_bprintf(strbuf, "%s %d.%02d", desc, q1, q2); + brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2); } } -void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) +void dhd_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf) { dhd_bus_t *bus = dhdp->bus; - bcm_bprintf(strbuf, "Bus SDIO structure:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "Bus SDIO structure:\n"); + brcmu_bprintf(strbuf, "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n", bus->hostintmask, bus->intstatus, bus->sdpcm_ver); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n", bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max, bus->rxskip, bus->rxlen, bus->rx_seq); - bcm_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n", + brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n", bus->intr, bus->intrcount, bus->lastintrs, bus->spurious); - bcm_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n", + brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n", bus->pollrate, bus->pollcnt, bus->regfails); - bcm_bprintf(strbuf, "\nAdditional counters:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "\nAdditional counters:\n"); + brcmu_bprintf(strbuf, "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n", bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong, bus->rxc_errors); - bcm_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n", + brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n", bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq); - bcm_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", bus->fc_rcvd, - bus->fc_xoff, bus->fc_xon); - bcm_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n", + brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", + bus->fc_rcvd, bus->fc_xoff, bus->fc_xon); + brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n", bus->rxglomfail, bus->rxglomframes, bus->rxglompkts); - bcm_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs %d\n", - (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs, - bus->f2rxdata, bus->f2txdata, bus->f1regdata); + brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs" + " %d\n", + (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs, + bus->f2rxdata, bus->f2txdata, bus->f1regdata); { dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets, (bus->f2rxhdrs + bus->f2rxdata)); @@ -1806,13 +1807,13 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata)); dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets, bus->intrcount); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts), bus->dhd->rx_packets); dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts, bus->rxglomframes); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets, bus->f2txdata); @@ -1822,7 +1823,7 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) (bus->f2txdata + bus->f1regdata)); dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets, bus->intrcount); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); dhd_dump_pct(strbuf, "Total: pkts/f2rw", (bus->dhd->tx_packets + bus->dhd->rx_packets), @@ -1837,30 +1838,30 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) dhd_dump_pct(strbuf, ", pkts/int", (bus->dhd->tx_packets + bus->dhd->rx_packets), bus->intrcount); - bcm_bprintf(strbuf, "\n\n"); + brcmu_bprintf(strbuf, "\n\n"); } #ifdef SDTEST if (bus->pktgen_count) { - bcm_bprintf(strbuf, "pktgen config and count:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "pktgen config and count:\n"); + brcmu_bprintf(strbuf, "freq %d count %d print %d total %d min %d len %d\n", bus->pktgen_freq, bus->pktgen_count, bus->pktgen_print, bus->pktgen_total, bus->pktgen_minlen, bus->pktgen_maxlen); - bcm_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n", + brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n", bus->pktgen_sent, bus->pktgen_rcvd, bus->pktgen_fail); } #endif /* SDTEST */ #ifdef DHD_DEBUG - bcm_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n", + brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n", bus->dpc_sched, (bcmsdh_intr_pending(bus->sdh) ? " " : " not ")); - bcm_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize, + brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize, bus->roundup); #endif /* DHD_DEBUG */ - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n", bus->clkstate, bus->activity, bus->idletime, bus->idlecount, bus->sleeping); @@ -2055,7 +2056,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) char *str = NULL; trap_t tr; struct sdpcm_shared sdpcm_shared; - struct bcmstrbuf strbuf; + struct brcmu_strbuf strbuf; DHD_TRACE(("%s: Enter\n", __func__)); @@ -2085,9 +2086,9 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) if (bcmerror < 0) goto done; - bcm_binit(&strbuf, data, size); + brcmu_binit(&strbuf, data, size); - bcm_bprintf(&strbuf, + brcmu_bprintf(&strbuf, "msgtrace address : 0x%08X\nconsole address : 0x%08X\n", sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr); @@ -2096,7 +2097,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) * (Avoids conflict with real asserts for programmatic * parsing of output.) */ - bcm_bprintf(&strbuf, "Assrt not built in dongle\n"); + brcmu_bprintf(&strbuf, "Assrt not built in dongle\n"); } if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) == @@ -2105,13 +2106,13 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) * (Avoids conflict with real asserts for programmatic * parsing of output.) */ - bcm_bprintf(&strbuf, "No trap%s in dongle", + brcmu_bprintf(&strbuf, "No trap%s in dongle", (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) ? "/assrt" : ""); } else { if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) { /* Download assert */ - bcm_bprintf(&strbuf, "Dongle assert"); + brcmu_bprintf(&strbuf, "Dongle assert"); if (sdpcm_shared.assert_exp_addr != 0) { str[0] = '\0'; bcmerror = dhdsdio_membytes(bus, false, @@ -2121,7 +2122,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) goto done; str[maxstrlen - 1] = '\0'; - bcm_bprintf(&strbuf, " expr \"%s\"", str); + brcmu_bprintf(&strbuf, " expr \"%s\"", str); } if (sdpcm_shared.assert_file_addr != 0) { @@ -2133,10 +2134,10 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) goto done; str[maxstrlen - 1] = '\0'; - bcm_bprintf(&strbuf, " file \"%s\"", str); + brcmu_bprintf(&strbuf, " file \"%s\"", str); } - bcm_bprintf(&strbuf, " line %d ", + brcmu_bprintf(&strbuf, " line %d ", sdpcm_shared.assert_line); } @@ -2147,7 +2148,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) if (bcmerror < 0) goto done; - bcm_bprintf(&strbuf, + brcmu_bprintf(&strbuf, "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x," "lp 0x%x, rpc 0x%x Trap offset 0x%x, " "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n", @@ -2334,7 +2335,7 @@ err: } static int -dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, +dhdsdio_doiovar(dhd_bus_t *bus, const struct brcmu_iovar *vi, u32 actionid, const char *name, void *params, int plen, void *arg, int len, int val_size) { @@ -2346,7 +2347,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, "len %d val_size %d\n", __func__, actionid, name, params, plen, arg, len, val_size)); - bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); if (bcmerror != 0) goto exit; @@ -2890,7 +2891,7 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, void *params, int plen, void *arg, int len, bool set) { dhd_bus_t *bus = dhdp->bus; - const bcm_iovar_t *vi = NULL; + const struct brcmu_iovar *vi = NULL; int bcmerror = 0; int val_size; u32 actionid; @@ -2907,7 +2908,7 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, ASSERT(!set || (!params && !plen)); /* Look up var locally; if not found pass to host driver */ - vi = bcm_iovar_lookup(dhdsdio_iovars, name); + vi = brcmu_iovar_lookup(dhdsdio_iovars, name); if (vi == NULL) { dhd_os_sdlock(bus->dhd); @@ -3026,14 +3027,14 @@ void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex) dhdsdio_clkctl(bus, CLK_SDONLY, false); /* Clear the data packet queues */ - bcm_pktq_flush(&bus->txq, true, NULL, NULL); + brcmu_pktq_flush(&bus->txq, true, NULL, NULL); /* Clear any held glomming stuff */ if (bus->glomd) - bcm_pkt_buf_free_skb(bus->glomd); + brcmu_pkt_buf_free_skb(bus->glomd); if (bus->glom) - bcm_pkt_buf_free_skb(bus->glom); + brcmu_pkt_buf_free_skb(bus->glom); bus->glom = bus->glomd = NULL; @@ -3385,7 +3386,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) } /* Allocate/chain packet for next subframe */ - pnext = bcm_pkt_buf_get_skb(sublen + DHD_SDALIGN); + pnext = brcmu_pkt_buf_get_skb(sublen + DHD_SDALIGN); if (pnext == NULL) { DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, " "num %d len %d\n", __func__, @@ -3422,13 +3423,13 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) pfirst = pnext = NULL; } else { if (pfirst) - bcm_pkt_buf_free_skb(pfirst); + brcmu_pkt_buf_free_skb(pfirst); bus->glom = NULL; num = 0; } /* Done with descriptor packet */ - bcm_pkt_buf_free_skb(bus->glomd); + brcmu_pkt_buf_free_skb(bus->glomd); bus->glomd = NULL; bus->nextlen = 0; @@ -3449,7 +3450,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) } pfirst = bus->glom; - dlen = (u16) bcm_pkttotlen(pfirst); + dlen = (u16) brcmu_pkttotlen(pfirst); /* Do an SDIO read for the superframe. Configurable iovar to * read directly into the chained packet, or allocate a large @@ -3465,7 +3466,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2, F2SYNC, bus->dataptr, dlen, NULL, NULL, NULL); - sublen = (u16) bcm_pktfrombuf(pfirst, 0, dlen, + sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen, bus->dataptr); if (sublen != dlen) { DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n", @@ -3493,7 +3494,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) bus->glomerr = 0; dhdsdio_rxfail(bus, true, false); dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(bus->glom); + brcmu_pkt_buf_free_skb(bus->glom); dhd_os_sdunlock_rxq(bus->dhd); bus->rxglomfail++; bus->glom = NULL; @@ -3626,7 +3627,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) bus->glomerr = 0; dhdsdio_rxfail(bus, true, false); dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(bus->glom); + brcmu_pkt_buf_free_skb(bus->glom); dhd_os_sdunlock_rxq(bus->dhd); bus->rxglomfail++; bus->glom = NULL; @@ -3677,7 +3678,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) skb_pull(pfirst, doff); if (pfirst->len == 0) { - bcm_pkt_buf_free_skb(pfirst); + brcmu_pkt_buf_free_skb(pfirst); if (plast) { plast->next = pnext; } else { @@ -3690,7 +3691,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) DHD_ERROR(("%s: rx protocol error\n", __func__)); bus->dhd->rx_errors++; - bcm_pkt_buf_free_skb(pfirst); + brcmu_pkt_buf_free_skb(pfirst); if (plast) { plast->next = pnext; } else { @@ -3828,7 +3829,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) */ /* Allocate a packet buffer */ dhd_os_sdlock_rxq(bus->dhd); - pkt = bcm_pkt_buf_get_skb(rdlen + DHD_SDALIGN); + pkt = brcmu_pkt_buf_get_skb(rdlen + DHD_SDALIGN); if (!pkt) { if (bus->bus == SPI_BUS) { bus->usebufpool = false; @@ -3872,7 +3873,8 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* Give up on data, request rtx of events */ DHD_ERROR(("%s (nextlen): " - "bcm_pkt_buf_get_skb failed:" + "brcmu_pkt_buf_get_skb " + "failed:" " len %d rdlen %d expected" " rxseq %d\n", __func__, len, rdlen, rxseq)); @@ -3900,7 +3902,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) if (sdret < 0) { DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n", __func__, rdlen, sdret)); - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); bus->dhd->rx_errors++; dhd_os_sdunlock_rxq(bus->dhd); /* Force retry w/normal header read. @@ -4213,11 +4215,11 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) } dhd_os_sdlock_rxq(bus->dhd); - pkt = bcm_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN); + pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN); if (!pkt) { /* Give up on data, request rtx of events */ - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed: rdlen %d " - "chan %d\n", __func__, rdlen, chan)); + DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed: rdlen %d" + " chan %d\n", __func__, rdlen, chan)); bus->dhd->rx_dropped++; dhd_os_sdunlock_rxq(bus->dhd); dhdsdio_rxfail(bus, false, RETRYCHAN(chan)); @@ -4248,7 +4250,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) ? "data" : "test")), sdret)); dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); dhd_os_sdunlock_rxq(bus->dhd); bus->dhd->rx_errors++; dhdsdio_rxfail(bus, true, RETRYCHAN(chan)); @@ -4307,13 +4309,13 @@ deliver: if (pkt->len == 0) { dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); dhd_os_sdunlock_rxq(bus->dhd); continue; } else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pkt) != 0) { DHD_ERROR(("%s: rx protocol error\n", __func__)); dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); dhd_os_sdunlock_rxq(bus->dhd); bus->dhd->rx_errors++; continue; @@ -4634,7 +4636,7 @@ clkwait: } /* Send queued frames (limit 1 if rx may still be pending) */ else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate && - bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit + brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit && DATAOK(bus)) { framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax); framecnt = dhdsdio_sendfromq(bus, framecnt); @@ -4655,8 +4657,8 @@ clkwait: "I_CHIPACTIVE interrupt\n", __func__)); resched = true; } else if (bus->intstatus || bus->ipend || - (!bus->fcstate && bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && - DATAOK(bus)) || PKT_AVAILABLE()) { + (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) + && DATAOK(bus)) || PKT_AVAILABLE()) { resched = true; } @@ -4789,12 +4791,12 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) /* Allocate an appropriate-sized packet */ len = bus->pktgen_len; - pkt = bcm_pkt_buf_get_skb( + pkt = brcmu_pkt_buf_get_skb( (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN), true); if (!pkt) { - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", - __func__)); + DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", + __func__)); break; } PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), @@ -4821,7 +4823,7 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) default: DHD_ERROR(("Unrecognized pktgen mode %d\n", bus->pktgen_mode)); - bcm_pkt_buf_free_skb(pkt, true); + brcmu_pkt_buf_free_skb(pkt, true); bus->pktgen_count = 0; return; } @@ -4870,10 +4872,10 @@ static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start) u8 *data; /* Allocate the packet */ - pkt = bcm_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + + pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN, true); if (!pkt) { - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", __func__)); + DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__)); return; } PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), DHD_SDALIGN); @@ -4905,7 +4907,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) if (pktlen < SDPCM_TEST_HDRLEN) { DHD_ERROR(("dhdsdio_restrcv: toss runt frame, pktlen %d\n", pktlen)); - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); return; } @@ -4923,7 +4925,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) DHD_ERROR(("dhdsdio_testrcv: frame length mismatch, " "pktlen %d seq %d" " cmd %d extra %d len %d\n", pktlen, seq, cmd, extra, len)); - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); return; } } @@ -4938,14 +4940,14 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) bus->pktgen_sent++; } else { bus->pktgen_fail++; - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); } bus->pktgen_rcvd++; break; case SDPCM_TEST_ECHORSP: if (bus->ext_loop) { - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; } @@ -4958,12 +4960,12 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) break; } } - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; case SDPCM_TEST_DISCARD: - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; @@ -4973,7 +4975,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) DHD_INFO(("dhdsdio_testrcv: unsupported or unknown command, " "pktlen %d seq %d" " cmd %d extra %d len %d\n", pktlen, seq, cmd, extra, len)); - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); break; } @@ -5134,7 +5136,7 @@ extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen) /* Bump dongle by sending an empty event pkt. * sdpcm_sendup (RX) checks for virtual console input. */ - pkt = bcm_pkt_buf_get_skb(4 + SDPCM_RESERVE); + pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE); if ((pkt != NULL) && bus->clkstate == CLK_AVAIL) dhdsdio_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true); @@ -5386,7 +5388,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid) /* Set core control so an SDIO reset does a backplane reset */ OR_REG(&bus->regs->corecontrol, CC_BPRESEN); - bcm_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); + brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); /* Locate an appropriately-aligned portion of hdrbuf */ bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], DHD_SDALIGN); @@ -6316,7 +6318,7 @@ dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) { default: DHD_ERROR(("No SDIO Drive strength init" "done for chip %s rev %d pmurev %d\n", - bcm_chipname(bus->ci->chip, chn, 8), + brcmu_chipname(bus->ci->chip, chn, 8), bus->ci->chiprev, bus->ci->pmurev)); break; } diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index edc2d55..13a6434 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -644,7 +644,7 @@ wl_dev_iovar_setbuf(struct net_device *dev, s8 * iovar, void *param, { s32 iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); BUG_ON(!iolen); return wl_dev_ioctl(dev, WLC_SET_VAR, bufptr, iolen); @@ -656,7 +656,7 @@ wl_dev_iovar_getbuf(struct net_device *dev, s8 * iovar, void *param, { s32 iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); BUG_ON(!iolen); return wl_dev_ioctl(dev, WLC_GET_VAR, bufptr, buflen); @@ -844,7 +844,8 @@ static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val) s32 err = 0; val = cpu_to_le32(val); - len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf)); + len = brcmu_mkiovar(name, (char *)(&val), sizeof(val), buf, + sizeof(buf)); BUG_ON(!len); err = wl_dev_ioctl(dev, WLC_SET_VAR, buf, len); @@ -866,7 +867,7 @@ wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval) s32 err = 0; len = - bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), + brcmu_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), sizeof(var.buf)); BUG_ON(!len); err = wl_dev_ioctl(dev, WLC_GET_VAR, &var, len); @@ -1519,7 +1520,7 @@ wl_cfg80211_set_tx_power(struct wiphy *wiphy, else txpwrmw = (u16) dbm; err = wl_dev_intvar_set(ndev, "qtxpower", - (s32) (bcm_mw_to_qdbm(txpwrmw))); + (s32) (brcmu_mw_to_qdbm(txpwrmw))); if (unlikely(err)) WL_ERR("qtxpower error (%d)\n", err); wl->conf->tx_power = dbm; @@ -1547,7 +1548,7 @@ static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm) } result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE); - *dbm = (s32) bcm_qdbm_to_mw(result); + *dbm = (s32) brcmu_qdbm_to_mw(result); done: WL_TRACE("Exit\n"); @@ -2669,7 +2670,7 @@ wl_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len) struct wl_priv *wl = ndev_to_wl(dev); u32 buflen; - buflen = bcm_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX); + buflen = brcmu_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX); BUG_ON(!buflen); return wl_dev_ioctl(dev, WLC_SET_VAR, wl->ioctl_buf, buflen); @@ -2683,7 +2684,7 @@ wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf, u32 len; s32 err = 0; - len = bcm_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX); + len = brcmu_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX); BUG_ON(!len); err = wl_dev_ioctl(dev, WLC_GET_VAR, (void *)wl->ioctl_buf, WL_IOCTL_LEN_MAX); @@ -2801,7 +2802,7 @@ static s32 wl_update_bss_info(struct wl_priv *wl) { struct wl_bss_info *bi; struct wlc_ssid *ssid; - struct bcm_tlv *tim; + struct brcmu_tlv *tim; u16 beacon_interval; u8 dtim_period; size_t ie_len; @@ -2831,7 +2832,7 @@ static s32 wl_update_bss_info(struct wl_priv *wl) ie_len = bi->ie_length; beacon_interval = cpu_to_le16(bi->beacon_period); - tim = bcm_parse_tlvs(ie, ie_len, WLAN_EID_TIM); + tim = brcmu_parse_tlvs(ie, ie_len, WLAN_EID_TIM); if (tim) dtim_period = tim->data[1]; else { @@ -3682,7 +3683,7 @@ wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align) s32 err = 0; /* Match Host and Dongle rx alignment */ - bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, + brcmu_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { @@ -3690,7 +3691,7 @@ wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align) goto dongle_glom_out; } /* disable glom option per default */ - bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { WL_ERR("txglom error (%d)\n", err); @@ -3708,7 +3709,7 @@ wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol) s32 err = 0; /* Set ARP offload */ - bcm_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (err) { if (err == -EOPNOTSUPP) @@ -3718,7 +3719,7 @@ wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol) goto dongle_offload_out; } - bcm_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (err) { if (err == -EOPNOTSUPP) @@ -3831,7 +3832,7 @@ static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode) } /* set mode to allow pattern */ - bcm_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf, + brcmu_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (err) { @@ -3858,7 +3859,7 @@ static s32 wl_dongle_eventmsg(struct net_device *ndev) WL_TRACE("Enter\n"); /* Setup event_msgs */ - bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, + brcmu_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_GET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { @@ -3887,7 +3888,7 @@ static s32 wl_dongle_eventmsg(struct net_device *ndev) setbit(eventmask, WLC_E_JOIN_START); setbit(eventmask, WLC_E_SCAN_COMPLETE); - bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, + brcmu_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { @@ -3913,7 +3914,7 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) * off to report link down */ if (roamvar) { - bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, + brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout, sizeof(bcn_timeout), iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { @@ -3927,7 +3928,7 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) * to take care of roaming */ WL_INFO("Internal Roaming = %s\n", roamvar ? "Off" : "On"); - bcm_mkiovar("roam_off", (char *)&roamvar, + brcmu_mkiovar("roam_off", (char *)&roamvar, sizeof(roamvar), iovbuf, sizeof(iovbuf)); err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 974a6e0..99a49f9 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -230,7 +230,8 @@ static int dev_wlc_intvar_set(struct net_device *dev, char *name, int val) uint len; val = cpu_to_le32(val); - len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf)); + len = brcmu_mkiovar(name, (char *)(&val), sizeof(val), buf, + sizeof(buf)); ASSERT(len); return dev_wlc_ioctl(dev, WLC_SET_VAR, buf, len); @@ -244,7 +245,7 @@ dev_iw_iovar_setbuf(struct net_device *dev, { int iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); ASSERT(iolen); if (iolen == 0) @@ -260,7 +261,7 @@ dev_iw_iovar_getbuf(struct net_device *dev, { int iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); ASSERT(iolen); return dev_wlc_ioctl(dev, WLC_GET_VAR, bufptr, buflen); @@ -274,7 +275,7 @@ dev_wlc_bufvar_set(struct net_device *dev, char *name, char *buf, int len) static char ioctlbuf[MAX_WLIW_IOCTL_LEN]; uint buflen; - buflen = bcm_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf)); + buflen = brcmu_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf)); ASSERT(buflen); return dev_wlc_ioctl(dev, WLC_SET_VAR, ioctlbuf, buflen); @@ -288,7 +289,7 @@ dev_wlc_bufvar_get(struct net_device *dev, char *name, char *buf, int buflen) int error; uint len; - len = bcm_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf)); + len = brcmu_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf)); ASSERT(len); error = dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)ioctlbuf, @@ -311,7 +312,7 @@ static int dev_wlc_intvar_get(struct net_device *dev, char *name, int *retval) uint data_null; len = - bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), + brcmu_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), sizeof(var.buf)); ASSERT(len); error = dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)&var, len); @@ -396,7 +397,7 @@ wl_iw_set_freq(struct net_device *dev, if (fwrq->m > 4000 && fwrq->m < 5000) sf = WF_CHAN_FACTOR_4_G; - chan = bcm_mhz2channel(fwrq->m, sf); + chan = brcmu_mhz2channel(fwrq->m, sf); } chan = cpu_to_le32(chan); @@ -1447,11 +1448,11 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end, event = *event_p; if (bi->ie_length) { - bcm_tlv_t *ie; + struct brcmu_tlv *ie; u8 *ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); int ptr_len = bi->ie_length; - ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID); + ie = brcmu_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID); if (ie) { iwe.cmd = IWEVGENIE; iwe.u.data.length = ie->len + 2; @@ -1461,7 +1462,8 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end, } ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); - while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) { + while ((ie = brcmu_parse_tlvs( + ptr, ptr_len, DOT11_MNG_WPA_ID))) { if (ie_is_wps_ie(((u8 **)&ie), &ptr, &ptr_len)) { iwe.cmd = IWEVGENIE; iwe.u.data.length = ie->len + 2; @@ -1474,7 +1476,8 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end, ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); ptr_len = bi->ie_length; - while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) { + while ((ie = brcmu_parse_tlvs( + ptr, ptr_len, DOT11_MNG_WPA_ID))) { if (ie_is_wpa_ie(((u8 **)&ie), &ptr, &ptr_len)) { iwe.cmd = IWEVGENIE; iwe.u.data.length = ie->len + 2; @@ -2199,8 +2202,8 @@ wl_iw_set_txpow(struct net_device *dev, else txpwrmw = (u16) vwrq->value; - error = - dev_wlc_intvar_set(dev, "qtxpower", (int)(bcm_mw_to_qdbm(txpwrmw))); + error = dev_wlc_intvar_set(dev, "qtxpower", + (int)(brcmu_mw_to_qdbm(txpwrmw))); return error; } @@ -2224,7 +2227,7 @@ wl_iw_get_txpow(struct net_device *dev, disable = le32_to_cpu(disable); result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE); - vwrq->value = (s32) bcm_qdbm_to_mw(result); + vwrq->value = (s32) brcmu_qdbm_to_mw(result); vwrq->fixed = 0; vwrq->disabled = (disable & (WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE)) ? 1 : 0; diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index dd55e29..0965801 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -103,11 +103,11 @@ typedef uint(*di_txactive_t) (struct dma_pub *dmah); typedef void (*di_txrotate_t) (struct dma_pub *dmah); typedef void (*di_counterreset_t) (struct dma_pub *dmah); typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags); -typedef char *(*di_dump_t) (struct dma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dump_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); -typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); -typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); typedef uint(*di_rxactive_t) (struct dma_pub *dmah); typedef uint(*di_txpending_t) (struct dma_pub *dmah); diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 2946d06..59098b0 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -988,7 +988,7 @@ sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, /* fixup the endianness so crc8 will pass */ htol16_buf(buf, nwords * 2); - if (bcm_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != + if (brcmu_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != CRC8_GOOD_VALUE) { /* DBG only pci always read srom4 first, then srom8/9 */ err = 1; @@ -1028,7 +1028,7 @@ static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz) /* fixup the endianness so crc8 will pass */ htol16_buf(buf, bufsz); - if (bcm_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != + if (brcmu_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != CRC8_GOOD_VALUE) { err = 1; } diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c index e80e12c..71acc4e 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -608,7 +608,7 @@ brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, wl->pub->global_ampdu = &(scb->scb_ampdu); wl->pub->global_ampdu->scb = scb; wl->pub->global_ampdu->max_pdu = 16; - bcm_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, + brcmu_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); sta->ht_cap.ht_supported = true; diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index a754cdd6..ad389bc 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -923,7 +923,7 @@ static void *_dma_rx(dma_info_t *di) if ((di->dma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n", di->name, len)); - bcm_pkt_buf_free_skb(head); + brcmu_pkt_buf_free_skb(head); di->dma.rxgiants++; goto next_frame; } @@ -971,7 +971,7 @@ static bool _dma_rxfill(dma_info_t *di) size to be allocated */ - p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset); + p = brcmu_pkt_buf_get_skb(di->rxbufsize + extra_offset); if (p == NULL) { DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n", @@ -1069,7 +1069,7 @@ static void _dma_rxreclaim(dma_info_t *di) DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); while ((p = _dma_getnextrxp(di, true))) - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } static void *_dma_getnextrxp(dma_info_t *di, bool forceall) @@ -1303,7 +1303,7 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range) while ((p = dma64_getnexttxp(di, range))) { /* For unframed data, we don't have any packets to free */ if (!(di->dma.dmactrlflags & DMA_CTRL_UNFRAMED)) - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } } @@ -1640,7 +1640,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, outoftxd: DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); - bcm_pkt_buf_free_skb(p0); + brcmu_pkt_buf_free_skb(p0); di->dma.txavail = 0; di->dma.txnobuf++; return -1; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 92064ba..43d0fe1 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -257,7 +257,7 @@ typedef enum { #define PHY_CHAIN_TX_DISABLE_TEMP 115 #define PHY_HYSTERESIS_DELTATEMP 5 -#define PHY_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) +#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) #define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \ mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index 7a00cac..e1920ae 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -591,7 +591,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, len = roundup(len, 4); ampdu_len += (len + (ndelim + 1) * AMPDU_DELIMITER_LEN); - dma_len += (u16) bcm_pkttotlen(p); + dma_len += (u16) brcmu_pkttotlen(p); BCMMSG(wlc->wiphy, "wl%d: ampdu_len %d" " seg_cnt %d null delim %d\n", @@ -686,8 +686,8 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && ((u8) (p->priority) == tid)) { - plen = - bcm_pkttotlen(p) + AMPDU_MAX_MPDU_OVERHEAD; + plen = brcmu_pkttotlen(p) + + AMPDU_MAX_MPDU_OVERHEAD; plen = max(scb_ampdu->min_len, plen); if ((plen + ampdu_len) > maxlen) { @@ -704,7 +704,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, p = NULL; continue; } - p = bcm_pktq_pdeq(&qi->q, prec); + p = brcmu_pktq_pdeq(&qi->q, prec); } else { p = NULL; } @@ -864,7 +864,7 @@ wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, tx_info = IEEE80211_SKB_CB(p); txh = (d11txh_t *) p->data; mcl = le16_to_cpu(txh->MacTxControlLow); - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); /* break out if last packet of ampdu */ if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == TXC_AMPDU_LAST) @@ -993,7 +993,7 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, txs->phyerr); if (WL_ERROR_ON()) { - bcm_prpkt("txpkt (AMPDU)", p); + brcmu_prpkt("txpkt (AMPDU)", p); wlc_print_txdesc((d11txh_t *) p->data); } wlc_print_txstatus(txs); @@ -1239,7 +1239,7 @@ void wlc_ampdu_flush(struct wlc_info *wlc, ampdu_pars.sta = sta; ampdu_pars.tid = tid; for (prec = 0; prec < pq->num_prec; prec++) { - bcm_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, + brcmu_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, (void *)&du_pars); } wlc_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index caee8d9..fdd10ef 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -922,7 +922,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, err = 21; goto fail; } - bcm_ether_atoe(macaddr, wlc_hw->etheraddr); + brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); if (is_broadcast_ether_addr(wlc_hw->etheraddr) || is_zero_ether_addr(wlc_hw->etheraddr)) { wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index d1e764a..ac84ddc 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -1494,7 +1494,7 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) u8 channel = CHSPEC_CHANNEL(chspec); /* check the chanspec */ - if (bcm_chspec_malformed(chspec)) { + if (brcmu_chspec_malformed(chspec)) { wiphy_err(wlc->wiphy, "wl%d: malformed chanspec 0x%x\n", wlc->pub->unit, chspec); return false; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 1a3af67..1e79031 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -704,8 +704,8 @@ static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc) local = WLC_TXPWR_MAX; if (wlc->pub->associated && - (bcm_chspec_ctlchan(wlc->chanspec) == - bcm_chspec_ctlchan(wlc->home_chanspec))) { + (brcmu_chspec_ctlchan(wlc->chanspec) == + brcmu_chspec_ctlchan(wlc->home_chanspec))) { /* get the local power constraint if we are on the AP's * channel [802.11h, 7.3.2.13] @@ -2183,7 +2183,7 @@ uint wlc_down(struct wlc_info *wlc) /* flush tx queues */ for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { - bcm_pktq_flush(&qi->q, true, NULL, NULL); + brcmu_pktq_flush(&qi->q, true, NULL, NULL); } callbacks += wlc_bmac_down_finish(wlc->hw); @@ -2985,16 +2985,16 @@ void wlc_print_txdesc(d11txh_t *txh) printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft); printk(KERN_DEBUG "\n"); - bcm_format_hex(hexbuf, iv, sizeof(txh->IV)); + brcmu_format_hex(hexbuf, iv, sizeof(txh->IV)); printk(KERN_DEBUG "SecIV: %s\n", hexbuf); - bcm_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); + brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); printk(KERN_DEBUG "RA: %s\n", hexbuf); printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb); - bcm_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); + brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb); - bcm_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); + brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); printk(KERN_DEBUG "PLCP: %s ", hexbuf); printk(KERN_DEBUG "DUR: %04x", fragdfb); printk(KERN_DEBUG "\n"); @@ -3010,9 +3010,9 @@ void wlc_print_txdesc(d11txh_t *txh) printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f); printk(KERN_DEBUG "MinByte: %04x\n", mmbyte); - bcm_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); + brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); - bcm_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); + brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); printk(KERN_DEBUG "RTS Frame: %s", hexbuf); printk(KERN_DEBUG "\n"); } @@ -3030,7 +3030,7 @@ void wlc_print_rxh(d11rxhdr_t *rxh) u16 macstatus2 = rxh->RxStatus2; char flagstr[64]; char lenbuf[20]; - static const bcm_bit_desc_t macstat_flags[] = { + static const struct brcmu_bit_desc macstat_flags[] = { {RXS_FCSERR, "FCSErr"}, {RXS_RESPFRAMETX, "Reply"}, {RXS_PBPRES, "PADDING"}, @@ -3043,7 +3043,7 @@ void wlc_print_rxh(d11rxhdr_t *rxh) printk(KERN_DEBUG "Raw RxDesc:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, sizeof(d11rxhdr_t)); - bcm_format_flags(macstat_flags, macstatus1, flagstr, 64); + brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64); snprintf(lenbuf, sizeof(lenbuf), "0x%x", len); @@ -3091,7 +3091,7 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, if (pktq_pfull(q, prec)) eprec = prec; else if (pktq_full(q)) { - p = bcm_pktq_peek_tail(q, &eprec); + p = brcmu_pktq_peek_tail(q, &eprec); if (eprec > prec) { wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d" "\n", __func__, eprec, prec); @@ -3113,16 +3113,16 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, } /* Evict packet according to discard policy */ - p = discard_oldest ? bcm_pktq_pdeq(q, eprec) : - bcm_pktq_pdeq_tail(q, eprec); - bcm_pkt_buf_free_skb(p); + p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : + brcmu_pktq_pdeq_tail(q, eprec); + brcmu_pkt_buf_free_skb(p); } /* Enqueue */ if (head) - p = bcm_pktq_penq_head(q, prec, pkt); + p = brcmu_pktq_penq_head(q, prec, pkt); else - p = bcm_pktq_penq(q, prec, pkt); + p = brcmu_pktq_penq(q, prec, pkt); return true; } @@ -3147,7 +3147,7 @@ void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, * XXX we might hit this condtion in case * packet flooding from mac80211 stack */ - bcm_pkt_buf_free_skb(sdu); + brcmu_pkt_buf_free_skb(sdu); } /* Check if flow control needs to be turned on after enqueuing the packet @@ -3211,7 +3211,7 @@ void wlc_send_q(struct wlc_info *wlc) /* Send all the enq'd pkts that we can. * Dequeue packets with precedence with empty HW fifo only */ - while (prec_map && (pkt[0] = bcm_pktq_mdeq(q, prec_map, &prec))) { + while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) { tx_info = IEEE80211_SKB_CB(pkt[0]); if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { err = wlc_sendampdu(wlc->ampdu, qi, pkt, prec); @@ -3226,7 +3226,7 @@ void wlc_send_q(struct wlc_info *wlc) } if (err == -EBUSY) { - bcm_pktq_penq_head(q, prec, pkt[0]); + brcmu_pktq_penq_head(q, prec, pkt[0]); /* If send failed due to any other reason than a change in * HW FIFO condition, quit. Otherwise, read the new prec_map! */ @@ -3649,7 +3649,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, qos = ieee80211_is_data_qos(h->frame_control); /* compute length of frame in bytes for use in PLCP computations */ - len = bcm_pkttotlen(p); + len = brcmu_pkttotlen(p); phylen = len + FCS_LEN; /* If WEP enabled, add room in phylen for the additional bytes of @@ -4381,7 +4381,7 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) tx_info->flags |= IEEE80211_TX_STAT_ACK; } - totlen = bcm_pkttotlen(p); + totlen = brcmu_pkttotlen(p); free_pdu = true; wlc_txfifo_complete(wlc, queue, 1); @@ -4402,7 +4402,7 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) fatal: if (p) - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); return true; @@ -4700,7 +4700,7 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) return; toss: - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } /* calculate frame duration for Mixed-mode L-SIG spoofing, return @@ -5833,7 +5833,7 @@ static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) * leave PS mode. The watermark for flowcontrol to OS packets * will remain the same */ - bcm_pktq_init(&qi->q, WLC_PREC_COUNT, + brcmu_pktq_init(&qi->q, WLC_PREC_COUNT, (2 * wlc->pub->tunables->datahiwat) + PKTQ_LEN_DEFAULT + wlc->pub->psq_pkts_total); @@ -5917,7 +5917,7 @@ void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) { /* flush packet queue when requested */ if (drop) - bcm_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); + brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); /* wait for queue and DMA fifos to run dry */ while (!pktq_empty(&wlc->pkt_queue->q) || diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 1dfa04b..88fab77 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -33,7 +33,7 @@ #define EDCF_AIFSN_MIN 1 #define FRAGNUM_MASK 0xF -#define WLC_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) +#define WLC_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) /* Maximum wait time for a MAC suspend */ #define WLC_MAX_MAC_SUSPEND 83000 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ @@ -355,7 +355,7 @@ struct pkt_cb { /* module control blocks */ struct modulecb { char name[32]; /* module name : NULL indicates empty array member */ - const bcm_iovar_t *iovars; /* iovar table */ + const struct brcmu_iovar *iovars; /* iovar table */ void *hdl; /* handle passed when handler 'doiovar' is called */ watchdog_fn_t watchdog_fn; /* watchdog handler */ iovar_fn_t iovar_fn; /* iovar handler */ @@ -812,8 +812,8 @@ extern void wlc_inval_dma_pkts(struct wlc_hw_info *hw, void (*dma_callback_fn)); #if defined(BCMDBG) -extern void wlc_dump_ie(struct wlc_info *wlc, bcm_tlv_t *ie, - struct bcmstrbuf *b); +extern void wlc_dump_ie(struct wlc_info *wlc, struct brcmu_tlv *ie, + struct brcmu_strbuf *b); #endif extern void wlc_reprate_init(struct wlc_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index a0c170b..de32440 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -219,7 +219,7 @@ struct wlc_if; /* watchdog down and dump callback function proto's */ typedef int (*watchdog_fn_t) (void *handle); typedef int (*down_fn_t) (void *handle); -typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b); +typedef int (*dump_fn_t) (void *handle, struct brcmu_strbuf *b); /* IOVar handler * @@ -234,7 +234,7 @@ typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b); * * All pointers may point into the same buffer. */ -typedef int (*iovar_fn_t) (void *handle, const bcm_iovar_t *vi, +typedef int (*iovar_fn_t) (void *handle, const struct brcmu_iovar *vi, u32 actionid, const char *name, void *params, uint plen, void *arg, int alen, int vsize, struct wlc_if *wlcif); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 383a747..3442d32 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -54,7 +54,7 @@ struct bmac_pmq; struct d11init; struct dma_pub; struct wlc_bsscfg; -struct bcmstrbuf; +struct brcmu_strbuf; struct si_pub; /* brcm_msg_level is a bit vector with defs in bcmdefs.h */ diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h index 1a1c8ad..73854a4 100644 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ b/drivers/staging/brcm80211/include/bcmutils.h @@ -14,15 +14,15 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmutils_h_ -#define _bcmutils_h_ +#ifndef _brcmutils_h_ +#define _brcmutils_h_ /* Buffer structure for collecting string-formatted data -* using bcm_bprintf() API. -* Use bcm_binit() to initialize before use +* using brcmu_bprintf() API. +* Use brcmu_binit() to initialize before use */ - struct bcmstrbuf { + struct brcmu_strbuf { char *buf; /* pointer to current position in origbuf */ unsigned int size; /* current (residual) size in bytes */ char *origbuf; /* unmodified pointer to orignal buffer */ @@ -87,25 +87,25 @@ typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *); #define pktq_ppeek(pq, prec) ((pq)->q[prec].head) #define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) -extern struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, +extern struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, struct sk_buff *p); -extern struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, +extern struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, struct sk_buff *p); -extern struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec); -extern struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec); +extern struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec); +extern struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec); /* packet primitives */ -extern struct sk_buff *bcm_pkt_buf_get_skb(uint len); -extern void bcm_pkt_buf_free_skb(struct sk_buff *skb); +extern struct sk_buff *brcmu_pkt_buf_get_skb(uint len); +extern void brcmu_pkt_buf_free_skb(struct sk_buff *skb); /* Empty the queue at particular precedence level */ -extern void bcm_pktq_pflush(struct pktq *pq, int prec, +extern void brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir, ifpkt_cb_t fn, void *arg); /* operations on a set of precedences in packet queue */ -extern int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp); -extern struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, +extern int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp); +extern struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out); /* operations on packet queue as a whole */ @@ -117,46 +117,37 @@ extern struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, #define pktq_empty(pq) ((pq)->len == 0) /* operations for single precedence queues */ -#define pktenq(pq, p) bcm_pktq_penq(((struct pktq *)pq), 0, (p)) -#define pktenq_head(pq, p) bcm_pktq_penq_head(((struct pktq *)pq), 0, (p)) -#define pktdeq(pq) bcm_pktq_pdeq(((struct pktq *)pq), 0) -#define pktdeq_tail(pq) bcm_pktq_pdeq_tail(((struct pktq *)pq), 0) -#define pktqinit(pq, len) bcm_pktq_init(((struct pktq *)pq), 1, len) - -extern void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len); +#define pktenq(pq, p) brcmu_pktq_penq(((struct pktq *)pq), 0, (p)) +#define pktenq_head(pq, p)\ + brcmu_pktq_penq_head(((struct pktq *)pq), 0, (p)) +#define pktdeq(pq) brcmu_pktq_pdeq(((struct pktq *)pq), 0) +#define pktdeq_tail(pq) brcmu_pktq_pdeq_tail(((struct pktq *)pq), 0) +#define pktqinit(pq, len) brcmu_pktq_init(((struct pktq *)pq), 1, len) + +extern void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len); /* prec_out may be NULL if caller is not interested in return value */ -extern struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out); -extern void bcm_pktq_flush(struct pktq *pq, bool dir, +extern struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out); +extern void brcmu_pktq_flush(struct pktq *pq, bool dir, ifpkt_cb_t fn, void *arg); /* externs */ /* packet */ -extern uint bcm_pktfrombuf(struct sk_buff *p, +extern uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len, unsigned char *buf); -extern uint bcm_pkttotlen(struct sk_buff *p); +extern uint brcmu_pkttotlen(struct sk_buff *p); /* ethernet address */ -extern int bcm_ether_atoe(char *p, u8 *ea); +extern int brcmu_ether_atoe(char *p, u8 *ea); /* ip address */ struct ipv4_addr; - extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf); #ifdef BCMDBG -extern void bcm_prpkt(const char *msg, struct sk_buff *p0); +extern void brcmu_prpkt(const char *msg, struct sk_buff *p0); #else -#define bcm_prpkt(a, b) +#define brcmu_prpkt(a, b) #endif /* BCMDBG */ -#define bcm_perf_enable() -#define bcmlog(fmt, a1, a2) -#define bcmdumplog(buf, size) (*buf = '\0') -#define bcmdumplogent(buf, idx) -1 - -#define bcmtslog(tstamp, fmt, a1, a2) -#define bcmprinttslogs() -#define bcmprinttstamp(us) - /* Support for sharing code across in-driver iovar implementations. * The intent is that a driver use this structure to map iovar names * to its (private) iovar identifiers, and the lookup function to @@ -165,13 +156,13 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); */ /* iovar structure */ - typedef struct bcm_iovar { - const char *name; /* name for lookup and display */ - u16 varid; /* id for switch */ - u16 flags; /* driver-specific flag bits */ - u16 type; /* base type of argument */ - u16 minlen; /* min length for buffer vars */ - } bcm_iovar_t; +struct brcmu_iovar { + const char *name; /* name for lookup and display */ + u16 varid; /* id for switch */ + u16 flags; /* driver-specific flag bits */ + u16 type; /* base type of argument */ + u16 minlen; /* min length for buffer vars */ +}; /* varid definitions are per-driver, may use these get/set bits */ @@ -185,12 +176,11 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); #define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) #define IOV_ID(actionid) (actionid >> 1) -/* flags are per-driver based on driver attributes */ - - extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, - const char *name); - extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg, - int len, bool set); +extern const struct +brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name); +extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, + int len, bool set); /* Base type definitions */ #define IOVT_VOID 0 /* no value (implictly set only) */ @@ -424,21 +414,18 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); #define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ #define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ -/* bcm_format_flags() bit description structure */ - typedef struct bcm_bit_desc { - u32 bit; - const char *name; - } bcm_bit_desc_t; +/* brcmu_format_flags() bit description structure */ +struct brcmu_bit_desc { + u32 bit; + const char *name; +}; /* tag_ID/length/value_buffer tuple */ - typedef struct bcm_tlv { - u8 id; - u8 len; - u8 data[1]; - } bcm_tlv_t; - -/* Check that bcm_tlv_t fits into the given buflen */ -#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len)) +struct brcmu_tlv { + u8 id; + u8 len; + u8 data[1]; +}; #define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ @@ -476,17 +463,19 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); /* externs */ /* crc */ -extern u8 bcm_crc8(u8 *p, uint nbytes, u8 crc); +extern u8 brcmu_crc8(u8 *p, uint nbytes, u8 crc); + /* format/print */ #if defined(BCMDBG) - extern int bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, - char *buf, int len); - extern int bcm_format_hex(char *str, const void *bytes, int len); +extern int brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, + char *buf, int len); +extern int brcmu_format_hex(char *str, const void *bytes, int len); #endif - extern char *bcm_chipname(uint chipid, char *buf, uint len); - extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, - uint key); +extern char *brcmu_chipname(uint chipid, char *buf, uint len); + +extern struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, + uint key); /* multi-bool data type: set of bools, mbool is true if any is set */ typedef u32 mbool; @@ -496,14 +485,14 @@ extern u8 bcm_crc8(u8 *p, uint nbytes, u8 crc); #define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) /* power conversion */ - extern u16 bcm_qdbm_to_mw(u8 qdbm); - extern u8 bcm_mw_to_qdbm(u16 mw); +extern u16 brcmu_qdbm_to_mw(u8 qdbm); +extern u8 brcmu_mw_to_qdbm(u16 mw); - extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size); - extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...); +extern void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size); +extern int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...); - extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, - uint len); - extern uint bcm_bitcount(u8 *bitmap, uint bytelength); +extern uint brcmu_mkiovar(char *name, char *data, uint datalen, + char *buf, uint len); +extern uint brcmu_bitcount(u8 *bitmap, uint bytelength); -#endif /* _bcmutils_h_ */ +#endif /* _brcmutils_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/bcmwifi.h index 60f404c..6b12c13 100644 --- a/drivers/staging/brcm80211/include/bcmwifi.h +++ b/drivers/staging/brcm80211/include/bcmwifi.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmwifi_h_ -#define _bcmwifi_h_ +#ifndef _brcmu_wifi_h_ +#define _brcmu_wifi_h_ #include /* for ETH_ALEN */ #include /* for WLAN_PMKID_LEN */ @@ -141,14 +141,14 @@ typedef u16 chanspec_t; * combination could be legal given any set of circumstances. * RETURNS: true is the chanspec is malformed, false if it looks good. */ -extern bool bcm_chspec_malformed(chanspec_t chanspec); +extern bool brcmu_chspec_malformed(chanspec_t chanspec); /* * This function returns the channel number that control traffic is being sent on, for legacy * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ * sideband depending on the chanspec selected */ -extern u8 bcm_chspec_ctlchan(chanspec_t chspec); +extern u8 brcmu_chspec_ctlchan(chanspec_t chspec); /* * Return the channel number for a given frequency and base frequency. @@ -169,7 +169,7 @@ extern u8 bcm_chspec_ctlchan(chanspec_t chspec); * * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 */ -extern int bcm_mhz2channel(uint freq, uint start_factor); +extern int brcmu_mhz2channel(uint freq, uint start_factor); /* Enumerate crypto algorithms */ #define CRYPTO_ALGO_OFF 0 @@ -239,4 +239,4 @@ typedef struct _pmkid_cand_list { typedef u8 ac_bitmap_t; -#endif /* _bcmwifi_h_ */ +#endif /* _brcmu_wifi_h_ */ diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c index 2724d7c..eb55ce4 100644 --- a/drivers/staging/brcm80211/util/bcmutils.c +++ b/drivers/staging/brcm80211/util/bcmutils.c @@ -32,7 +32,7 @@ MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); MODULE_LICENSE("Dual BSD/GPL"); -struct sk_buff *bcm_pkt_buf_get_skb(uint len) +struct sk_buff *brcmu_pkt_buf_get_skb(uint len) { struct sk_buff *skb; @@ -44,10 +44,10 @@ struct sk_buff *bcm_pkt_buf_get_skb(uint len) return skb; } -EXPORT_SYMBOL(bcm_pkt_buf_get_skb); +EXPORT_SYMBOL(brcmu_pkt_buf_get_skb); /* Free the driver packet. Free the tag if present */ -void bcm_pkt_buf_free_skb(struct sk_buff *skb) +void brcmu_pkt_buf_free_skb(struct sk_buff *skb) { struct sk_buff *nskb; int nest = 0; @@ -72,11 +72,11 @@ void bcm_pkt_buf_free_skb(struct sk_buff *skb) skb = nskb; } } -EXPORT_SYMBOL(bcm_pkt_buf_free_skb); +EXPORT_SYMBOL(brcmu_pkt_buf_free_skb); /* copy a buffer into a pkt buffer chain */ -uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len, +uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len, unsigned char *buf) { uint n, ret = 0; @@ -103,10 +103,10 @@ uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len, return ret; } -EXPORT_SYMBOL(bcm_pktfrombuf); +EXPORT_SYMBOL(brcmu_pktfrombuf); /* return total length of buffer chain */ -uint bcm_pkttotlen(struct sk_buff *p) +uint brcmu_pkttotlen(struct sk_buff *p) { uint total; @@ -115,13 +115,13 @@ uint bcm_pkttotlen(struct sk_buff *p) total += p->len; return total; } -EXPORT_SYMBOL(bcm_pkttotlen); +EXPORT_SYMBOL(brcmu_pkttotlen); /* * osl multiple-precedence packet queue * hi_prec is always >= the number of the highest non-empty precedence */ -struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, +struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, struct sk_buff *p) { struct pktq_prec *q; @@ -146,9 +146,9 @@ struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, return p; } -EXPORT_SYMBOL(bcm_pktq_penq); +EXPORT_SYMBOL(brcmu_pktq_penq); -struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, +struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, struct sk_buff *p) { struct pktq_prec *q; @@ -172,9 +172,9 @@ struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, return p; } -EXPORT_SYMBOL(bcm_pktq_penq_head); +EXPORT_SYMBOL(brcmu_pktq_penq_head); -struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec) +struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec) { struct pktq_prec *q; struct sk_buff *p; @@ -197,9 +197,9 @@ struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec) return p; } -EXPORT_SYMBOL(bcm_pktq_pdeq); +EXPORT_SYMBOL(brcmu_pktq_pdeq); -struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec) +struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec) { struct pktq_prec *q; struct sk_buff *p, *prev; @@ -225,10 +225,10 @@ struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec) return p; } -EXPORT_SYMBOL(bcm_pktq_pdeq_tail); +EXPORT_SYMBOL(brcmu_pktq_pdeq_tail); void -bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, +brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir, ifpkt_cb_t fn, void *arg) { struct pktq_prec *q; @@ -244,7 +244,7 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, else prev->prev = p->prev; p->prev = NULL; - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); q->len--; pq->len--; p = (head ? q->head : prev->prev); @@ -258,18 +258,18 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, q->tail = NULL; } } -EXPORT_SYMBOL(bcm_pktq_pflush); +EXPORT_SYMBOL(brcmu_pktq_pflush); -void bcm_pktq_flush(struct pktq *pq, bool dir, +void brcmu_pktq_flush(struct pktq *pq, bool dir, ifpkt_cb_t fn, void *arg) { int prec; for (prec = 0; prec < pq->num_prec; prec++) - bcm_pktq_pflush(pq, prec, dir, fn, arg); + brcmu_pktq_pflush(pq, prec, dir, fn, arg); } -EXPORT_SYMBOL(bcm_pktq_flush); +EXPORT_SYMBOL(brcmu_pktq_flush); -void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len) +void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len) { int prec; @@ -284,9 +284,9 @@ void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len) for (prec = 0; prec < num_prec; prec++) pq->q[prec].max = pq->max; } -EXPORT_SYMBOL(bcm_pktq_init); +EXPORT_SYMBOL(brcmu_pktq_init); -struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out) +struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out) { int prec; @@ -302,10 +302,10 @@ struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out) return pq->q[prec].tail; } -EXPORT_SYMBOL(bcm_pktq_peek_tail); +EXPORT_SYMBOL(brcmu_pktq_peek_tail); /* Return sum of lengths of a specific set of precedences */ -int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp) +int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp) { int prec, len; @@ -317,10 +317,10 @@ int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp) return len; } -EXPORT_SYMBOL(bcm_pktq_mlen); +EXPORT_SYMBOL(brcmu_pktq_mlen); /* Priority dequeue from a specific set of precedences */ -struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, +struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out) { struct pktq_prec *q; @@ -358,10 +358,10 @@ struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, return p; } -EXPORT_SYMBOL(bcm_pktq_mdeq); +EXPORT_SYMBOL(brcmu_pktq_mdeq); /* parse a xx:xx:xx:xx:xx:xx format ethernet address */ -int bcm_ether_atoe(char *p, u8 *ea) +int brcmu_ether_atoe(char *p, u8 *ea) { int i = 0; @@ -373,11 +373,11 @@ int bcm_ether_atoe(char *p, u8 *ea) return i == 6; } -EXPORT_SYMBOL(bcm_ether_atoe); +EXPORT_SYMBOL(brcmu_ether_atoe); #if defined(BCMDBG) /* pretty hex print a pkt buffer chain */ -void bcm_prpkt(const char *msg, struct sk_buff *p0) +void brcmu_prpkt(const char *msg, struct sk_buff *p0) { struct sk_buff *p; @@ -387,13 +387,14 @@ void bcm_prpkt(const char *msg, struct sk_buff *p0) for (p = p0; p; p = p->next) print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, p->data, p->len); } -EXPORT_SYMBOL(bcm_prpkt); +EXPORT_SYMBOL(brcmu_prpkt); #endif /* defined(BCMDBG) */ /* iovar table lookup */ -const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name) +const struct brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name) { - const bcm_iovar_t *vi; + const struct brcmu_iovar *vi; const char *lookup_name; /* skip any ':' delimited option prefixes */ @@ -411,9 +412,10 @@ const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name) return NULL; /* var name not found */ } -EXPORT_SYMBOL(bcm_iovar_lookup); +EXPORT_SYMBOL(brcmu_iovar_lookup); -int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set) +int brcmu_iovar_lencheck(const struct brcmu_iovar *vi, void *arg, int len, + bool set) { int bcmerror = 0; @@ -456,7 +458,7 @@ int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set) return bcmerror; } -EXPORT_SYMBOL(bcm_iovar_lencheck); +EXPORT_SYMBOL(brcmu_iovar_lencheck); /******************************************************************************* * crc8 @@ -515,7 +517,7 @@ static const u8 crc8_table[256] = { 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F }; -u8 bcm_crc8(u8 *pdata, /* pointer to array of data to process */ +u8 brcmu_crc8(u8 *pdata, /* pointer to array of data to process */ uint nbytes, /* number of input data bytes to process */ u8 crc /* either CRC8_INIT_VALUE or previous return value */ ) { @@ -525,19 +527,19 @@ u8 bcm_crc8(u8 *pdata, /* pointer to array of data to process */ return crc; } -EXPORT_SYMBOL(bcm_crc8); +EXPORT_SYMBOL(brcmu_crc8); /* * Traverse a string of 1-byte tag/1-byte length/variable-length value * triples, returning a pointer to the substring whose first element * matches tag */ -bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key) +struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, uint key) { - bcm_tlv_t *elt; + struct brcmu_tlv *elt; int totlen; - elt = (bcm_tlv_t *) buf; + elt = (struct brcmu_tlv *) buf; totlen = buflen; /* find tagged parameter */ @@ -548,18 +550,19 @@ bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key) if ((elt->id == key) && (totlen >= (len + 2))) return elt; - elt = (bcm_tlv_t *) ((u8 *) elt + (len + 2)); + elt = (struct brcmu_tlv *) ((u8 *) elt + (len + 2)); totlen -= (len + 2); } return NULL; } -EXPORT_SYMBOL(bcm_parse_tlvs); +EXPORT_SYMBOL(brcmu_parse_tlvs); #if defined(BCMDBG) int -bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len) +brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, char *buf, + int len) { int i; char *p = buf; @@ -610,10 +613,10 @@ bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len) return (int)(p - buf); } -EXPORT_SYMBOL(bcm_format_flags); +EXPORT_SYMBOL(brcmu_format_flags); /* print bytes formatted as hex to a string. return the resulting string length */ -int bcm_format_hex(char *str, const void *bytes, int len) +int brcmu_format_hex(char *str, const void *bytes, int len) { int i; char *p = str; @@ -625,10 +628,10 @@ int bcm_format_hex(char *str, const void *bytes, int len) } return (int)(p - str); } -EXPORT_SYMBOL(bcm_format_hex); +EXPORT_SYMBOL(brcmu_format_hex); #endif /* defined(BCMDBG) */ -char *bcm_chipname(uint chipid, char *buf, uint len) +char *brcmu_chipname(uint chipid, char *buf, uint len) { const char *fmt; @@ -636,9 +639,9 @@ char *bcm_chipname(uint chipid, char *buf, uint len) snprintf(buf, len, fmt, chipid); return buf; } -EXPORT_SYMBOL(bcm_chipname); +EXPORT_SYMBOL(brcmu_chipname); -uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) +uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) { uint len; @@ -655,7 +658,7 @@ uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) return len; } -EXPORT_SYMBOL(bcm_mkiovar); +EXPORT_SYMBOL(brcmu_mkiovar); /* Quarter dBm units to mW * Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153 @@ -687,7 +690,7 @@ static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { /* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096 }; -u16 bcm_qdbm_to_mw(u8 qdbm) +u16 brcmu_qdbm_to_mw(u8 qdbm) { uint factor = 1; int idx = qdbm - QDBM_OFFSET; @@ -710,9 +713,9 @@ u16 bcm_qdbm_to_mw(u8 qdbm) */ return (nqdBm_to_mW_map[idx] + factor / 2) / factor; } -EXPORT_SYMBOL(bcm_qdbm_to_mw); +EXPORT_SYMBOL(brcmu_qdbm_to_mw); -u8 bcm_mw_to_qdbm(u16 mw) +u8 brcmu_mw_to_qdbm(u16 mw) { u8 qdbm; int offset; @@ -742,9 +745,9 @@ u8 bcm_mw_to_qdbm(u16 mw) return qdbm; } -EXPORT_SYMBOL(bcm_mw_to_qdbm); +EXPORT_SYMBOL(brcmu_mw_to_qdbm); -uint bcm_bitcount(u8 *bitmap, uint length) +uint brcmu_bitcount(u8 *bitmap, uint length) { uint bitcount = 0, i; u8 tmp; @@ -757,18 +760,18 @@ uint bcm_bitcount(u8 *bitmap, uint length) } return bitcount; } -EXPORT_SYMBOL(bcm_bitcount); +EXPORT_SYMBOL(brcmu_bitcount); -/* Initialization of bcmstrbuf structure */ -void bcm_binit(struct bcmstrbuf *b, char *buf, uint size) +/* Initialization of brcmu_strbuf structure */ +void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size) { b->origsize = b->size = size; b->origbuf = b->buf = buf; } -EXPORT_SYMBOL(bcm_binit); +EXPORT_SYMBOL(brcmu_binit); /* Buffer sprintf wrapper to guard against buffer overflow */ -int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) +int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...) { va_list ap; int r; @@ -778,7 +781,7 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) /* Non Ansi C99 compliant returns -1, * Ansi compliant return r >= b->size, - * bcmstdlib returns 0, handle all + * stdlib returns 0, handle all */ if ((r == -1) || (r >= (int)b->size) || (r == 0)) { b->size = 0; @@ -791,4 +794,4 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) return r; } -EXPORT_SYMBOL(bcm_bprintf); +EXPORT_SYMBOL(brcmu_bprintf); diff --git a/drivers/staging/brcm80211/util/bcmwifi.c b/drivers/staging/brcm80211/util/bcmwifi.c index 955a3ab..207cb8b 100644 --- a/drivers/staging/brcm80211/util/bcmwifi.c +++ b/drivers/staging/brcm80211/util/bcmwifi.c @@ -26,7 +26,7 @@ * combination could be legal given any set of circumstances. * RETURNS: true is the chanspec is malformed, false if it looks good. */ -bool bcm_chspec_malformed(chanspec_t chanspec) +bool brcmu_chspec_malformed(chanspec_t chanspec) { /* must be 2G or 5G band */ if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) @@ -46,14 +46,14 @@ bool bcm_chspec_malformed(chanspec_t chanspec) return false; } -EXPORT_SYMBOL(bcm_chspec_malformed); +EXPORT_SYMBOL(brcmu_chspec_malformed); /* * This function returns the channel number that control traffic is being sent on, for legacy * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ * sideband depending on the chanspec selected */ -u8 bcm_chspec_ctlchan(chanspec_t chspec) +u8 brcmu_chspec_ctlchan(chanspec_t chspec) { u8 ctl_chan; @@ -76,7 +76,7 @@ u8 bcm_chspec_ctlchan(chanspec_t chspec) return ctl_chan; } -EXPORT_SYMBOL(bcm_chspec_ctlchan); +EXPORT_SYMBOL(brcmu_chspec_ctlchan); /* * Return the channel number for a given frequency and base frequency. @@ -97,7 +97,7 @@ EXPORT_SYMBOL(bcm_chspec_ctlchan); * * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 */ -int bcm_mhz2channel(uint freq, uint start_factor) +int brcmu_mhz2channel(uint freq, uint start_factor) { int ch = -1; uint base; @@ -133,5 +133,5 @@ int bcm_mhz2channel(uint freq, uint start_factor) return ch; } -EXPORT_SYMBOL(bcm_mhz2channel); +EXPORT_SYMBOL(brcmu_mhz2channel); -- cgit v0.10.2 From f97e956afc30cf69c73e75035dc69aafa9a04215 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:52 +0200 Subject: staging: brcm80211: renamed utility module related files Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/Makefile b/drivers/staging/brcm80211/Makefile index e7b3f27..db9a57e 100644 --- a/drivers/staging/brcm80211/Makefile +++ b/drivers/staging/brcm80211/Makefile @@ -19,6 +19,6 @@ subdir-ccflags-y := -DBCMDMA32 subdir-ccflags-$(CONFIG_BRCMDBG) += -DBCMDBG -DBCMDBG_ASSERT -obj-$(CONFIG_BRCMUTIL) += util/ +obj-$(CONFIG_BRCMUTIL) += brcmutil/ obj-$(CONFIG_BRCMFMAC) += brcmfmac/ obj-$(CONFIG_BRCMSMAC) += brcmsmac/ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index 14c07e6..352ba4b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -21,8 +21,8 @@ #include #include #include -#include -#include +#include +#include #include #include /* BRCM API for SDIO diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index c0b9330..e7638f4 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -27,8 +27,8 @@ #include #include -#include -#include +#include +#include #if defined(OOB_INTR_ONLY) #include diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 1b15704..8dadfb6 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -18,8 +18,8 @@ #include #include #include -#include -#include +#include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index fbc9abd..e1b2592 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -18,8 +18,8 @@ #include #include #include -#include -#include +#include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index 759e899..dd872f4 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -19,8 +19,8 @@ #include #include -#include -#include +#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 5b0554d..a8504bb 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -17,10 +17,10 @@ #include #include #include -#include +#include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c index a942333..831f324 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c @@ -16,9 +16,9 @@ #include #include -#include +#include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index 7f1cf8b..adcf82d 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -33,8 +33,8 @@ #include #include #include -#include -#include +#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index cc3e47d..75393e7 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -26,8 +26,8 @@ #include #include -#include -#include +#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 13a6434..38453cf 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -18,9 +18,9 @@ #include #include -#include +#include #include -#include +#include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 99a49f9..f5725ec 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -21,8 +21,8 @@ #include #include -#include -#include +#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index d57908b..b00cda9 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index cca64e4..4a0deec 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 59098b0..70b7ab7 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -21,7 +21,7 @@ #include #include #include "wlc_types.h" -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c index 71acc4e..509cf2b 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -26,8 +26,8 @@ #include #include #include -#include -#include +#include +#include #include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index ad389bc..183baf8 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include "wlc_types.h" diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 8a956f5..868fba2 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c index 5cef837..3509469 100644 --- a/drivers/staging/brcm80211/brcmsmac/nvram.c +++ b/drivers/staging/brcm80211/brcmsmac/nvram.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h index 6d4473c..6488cdf 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h @@ -25,7 +25,7 @@ #include #include #include /* struct wiphy */ -#include "bcmwifi.h" /* chanspec_t */ +#include "brcmu_wifi.h" /* chanspec_t */ #define IDCODE_VER_MASK 0x0000000f #define IDCODE_VER_SHIFT 0 diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 43d0fe1..3ee29f0 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -19,7 +19,7 @@ #include #include -#include +#include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c index 619247a..77caf06 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c @@ -17,7 +17,7 @@ #include #include -#include +#include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c index e1920ae..3668451 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c @@ -17,7 +17,7 @@ #include #include -#include +#include #include #include "bcmdma.h" #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index ea27b66..10b9b79 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index fdd10ef..d23dd11 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -23,11 +23,11 @@ #include #include -#include +#include #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index ac84ddc..c4fcb44 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 1e79031..752f0d1 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -21,8 +21,8 @@ #include #include -#include -#include +#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c index d33f720..2745743 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c @@ -25,8 +25,8 @@ #include #include -#include -#include +#include +#include #include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index 047cd1a..9a99186 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include #include "wlc_pmu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index de32440..8536efe 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -18,7 +18,7 @@ #define _wlc_pub_h_ #include "wlc_types.h" /* forward structure declarations */ -#include "bcmwifi.h" /* for chanspec_t */ +#include "brcmu_wifi.h" /* for chanspec_t */ #define WLC_NUMRATES 16 /* max # of rates in a rateset */ #define MAXMULTILIST 32 /* max # multicast addresses */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c index 88aa134..3625c72 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c @@ -17,7 +17,7 @@ #include #include -#include +#include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index b7191af..41c1f96 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -18,9 +18,9 @@ #include #include -#include +#include #include -#include +#include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmutil/Makefile b/drivers/staging/brcm80211/brcmutil/Makefile new file mode 100644 index 0000000..6403423 --- /dev/null +++ b/drivers/staging/brcm80211/brcmutil/Makefile @@ -0,0 +1,29 @@ +# +# Makefile fragment for Broadcom 802.11n Networking Device Driver Utilities +# +# Copyright (c) 2011 Broadcom Corporation +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY +# SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION +# OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN +# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +ccflags-y := \ + -Idrivers/staging/brcm80211/brcmutil \ + -Idrivers/staging/brcm80211/include + +BRCMUTIL_OFILES := \ + utils.o \ + wifi.o + +MODULEPFX := brcmutil + +obj-$(CONFIG_BRCMUTIL) += $(MODULEPFX).o +$(MODULEPFX)-objs = $(BRCMUTIL_OFILES) diff --git a/drivers/staging/brcm80211/brcmutil/utils.c b/drivers/staging/brcm80211/brcmutil/utils.c new file mode 100644 index 0000000..d259e26 --- /dev/null +++ b/drivers/staging/brcm80211/brcmutil/utils.c @@ -0,0 +1,797 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); +MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); +MODULE_LICENSE("Dual BSD/GPL"); + +struct sk_buff *brcmu_pkt_buf_get_skb(uint len) +{ + struct sk_buff *skb; + + skb = dev_alloc_skb(len); + if (skb) { + skb_put(skb, len); + skb->priority = 0; + } + + return skb; +} +EXPORT_SYMBOL(brcmu_pkt_buf_get_skb); + +/* Free the driver packet. Free the tag if present */ +void brcmu_pkt_buf_free_skb(struct sk_buff *skb) +{ + struct sk_buff *nskb; + int nest = 0; + + /* perversion: we use skb->next to chain multi-skb packets */ + while (skb) { + nskb = skb->next; + skb->next = NULL; + + if (skb->destructor) + /* cannot kfree_skb() on hard IRQ (net/core/skbuff.c) if + * destructor exists + */ + dev_kfree_skb_any(skb); + else + /* can free immediately (even in_irq()) if destructor + * does not exist + */ + dev_kfree_skb(skb); + + nest++; + skb = nskb; + } +} +EXPORT_SYMBOL(brcmu_pkt_buf_free_skb); + + +/* copy a buffer into a pkt buffer chain */ +uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len, + unsigned char *buf) +{ + uint n, ret = 0; + + /* skip 'offset' bytes */ + for (; p && offset; p = p->next) { + if (offset < (uint) (p->len)) + break; + offset -= p->len; + } + + if (!p) + return 0; + + /* copy the data */ + for (; p && len; p = p->next) { + n = min((uint) (p->len) - offset, (uint) len); + memcpy(p->data + offset, buf, n); + buf += n; + len -= n; + ret += n; + offset = 0; + } + + return ret; +} +EXPORT_SYMBOL(brcmu_pktfrombuf); + +/* return total length of buffer chain */ +uint brcmu_pkttotlen(struct sk_buff *p) +{ + uint total; + + total = 0; + for (; p; p = p->next) + total += p->len; + return total; +} +EXPORT_SYMBOL(brcmu_pkttotlen); + +/* + * osl multiple-precedence packet queue + * hi_prec is always >= the number of the highest non-empty precedence + */ +struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, + struct sk_buff *p) +{ + struct pktq_prec *q; + + if (pktq_full(pq) || pktq_pfull(pq, prec)) + return NULL; + + q = &pq->q[prec]; + + if (q->head) + q->tail->prev = p; + else + q->head = p; + + q->tail = p; + q->len++; + + pq->len++; + + if (pq->hi_prec < prec) + pq->hi_prec = (u8) prec; + + return p; +} +EXPORT_SYMBOL(brcmu_pktq_penq); + +struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, + struct sk_buff *p) +{ + struct pktq_prec *q; + + if (pktq_full(pq) || pktq_pfull(pq, prec)) + return NULL; + + q = &pq->q[prec]; + + if (q->head == NULL) + q->tail = p; + + p->prev = q->head; + q->head = p; + q->len++; + + pq->len++; + + if (pq->hi_prec < prec) + pq->hi_prec = (u8) prec; + + return p; +} +EXPORT_SYMBOL(brcmu_pktq_penq_head); + +struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec) +{ + struct pktq_prec *q; + struct sk_buff *p; + + q = &pq->q[prec]; + + p = q->head; + if (p == NULL) + return NULL; + + q->head = p->prev; + if (q->head == NULL) + q->tail = NULL; + + q->len--; + + pq->len--; + + p->prev = NULL; + + return p; +} +EXPORT_SYMBOL(brcmu_pktq_pdeq); + +struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec) +{ + struct pktq_prec *q; + struct sk_buff *p, *prev; + + q = &pq->q[prec]; + + p = q->head; + if (p == NULL) + return NULL; + + for (prev = NULL; p != q->tail; p = p->prev) + prev = p; + + if (prev) + prev->prev = NULL; + else + q->head = NULL; + + q->tail = prev; + q->len--; + + pq->len--; + + return p; +} +EXPORT_SYMBOL(brcmu_pktq_pdeq_tail); + +void +brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir, + ifpkt_cb_t fn, void *arg) +{ + struct pktq_prec *q; + struct sk_buff *p, *prev = NULL; + + q = &pq->q[prec]; + p = q->head; + while (p) { + if (fn == NULL || (*fn) (p, arg)) { + bool head = (p == q->head); + if (head) + q->head = p->prev; + else + prev->prev = p->prev; + p->prev = NULL; + brcmu_pkt_buf_free_skb(p); + q->len--; + pq->len--; + p = (head ? q->head : prev->prev); + } else { + prev = p; + p = p->prev; + } + } + + if (q->head == NULL) { + q->tail = NULL; + } +} +EXPORT_SYMBOL(brcmu_pktq_pflush); + +void brcmu_pktq_flush(struct pktq *pq, bool dir, + ifpkt_cb_t fn, void *arg) +{ + int prec; + for (prec = 0; prec < pq->num_prec; prec++) + brcmu_pktq_pflush(pq, prec, dir, fn, arg); +} +EXPORT_SYMBOL(brcmu_pktq_flush); + +void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len) +{ + int prec; + + /* pq is variable size; only zero out what's requested */ + memset(pq, 0, + offsetof(struct pktq, q) + (sizeof(struct pktq_prec) * num_prec)); + + pq->num_prec = (u16) num_prec; + + pq->max = (u16) max_len; + + for (prec = 0; prec < num_prec; prec++) + pq->q[prec].max = pq->max; +} +EXPORT_SYMBOL(brcmu_pktq_init); + +struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out) +{ + int prec; + + if (pq->len == 0) + return NULL; + + for (prec = 0; prec < pq->hi_prec; prec++) + if (pq->q[prec].head) + break; + + if (prec_out) + *prec_out = prec; + + return pq->q[prec].tail; +} +EXPORT_SYMBOL(brcmu_pktq_peek_tail); + +/* Return sum of lengths of a specific set of precedences */ +int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp) +{ + int prec, len; + + len = 0; + + for (prec = 0; prec <= pq->hi_prec; prec++) + if (prec_bmp & (1 << prec)) + len += pq->q[prec].len; + + return len; +} +EXPORT_SYMBOL(brcmu_pktq_mlen); + +/* Priority dequeue from a specific set of precedences */ +struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, + int *prec_out) +{ + struct pktq_prec *q; + struct sk_buff *p; + int prec; + + if (pq->len == 0) + return NULL; + + while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) + pq->hi_prec--; + + while ((prec_bmp & (1 << prec)) == 0 || pq->q[prec].head == NULL) + if (prec-- == 0) + return NULL; + + q = &pq->q[prec]; + + p = q->head; + if (p == NULL) + return NULL; + + q->head = p->prev; + if (q->head == NULL) + q->tail = NULL; + + q->len--; + + if (prec_out) + *prec_out = prec; + + pq->len--; + + p->prev = NULL; + + return p; +} +EXPORT_SYMBOL(brcmu_pktq_mdeq); + +/* parse a xx:xx:xx:xx:xx:xx format ethernet address */ +int brcmu_ether_atoe(char *p, u8 *ea) +{ + int i = 0; + + for (;;) { + ea[i++] = (char)simple_strtoul(p, &p, 16); + if (!*p++ || i == 6) + break; + } + + return i == 6; +} +EXPORT_SYMBOL(brcmu_ether_atoe); + +#if defined(BCMDBG) +/* pretty hex print a pkt buffer chain */ +void brcmu_prpkt(const char *msg, struct sk_buff *p0) +{ + struct sk_buff *p; + + if (msg && (msg[0] != '\0')) + printk(KERN_DEBUG "%s:\n", msg); + + for (p = p0; p; p = p->next) + print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, p->data, p->len); +} +EXPORT_SYMBOL(brcmu_prpkt); +#endif /* defined(BCMDBG) */ + +/* iovar table lookup */ +const struct brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name) +{ + const struct brcmu_iovar *vi; + const char *lookup_name; + + /* skip any ':' delimited option prefixes */ + lookup_name = strrchr(name, ':'); + if (lookup_name != NULL) + lookup_name++; + else + lookup_name = name; + + for (vi = table; vi->name; vi++) { + if (!strcmp(vi->name, lookup_name)) + return vi; + } + /* ran to end of table */ + + return NULL; /* var name not found */ +} +EXPORT_SYMBOL(brcmu_iovar_lookup); + +int brcmu_iovar_lencheck(const struct brcmu_iovar *vi, void *arg, int len, + bool set) +{ + int bcmerror = 0; + + /* length check on io buf */ + switch (vi->type) { + case IOVT_BOOL: + case IOVT_INT8: + case IOVT_INT16: + case IOVT_INT32: + case IOVT_UINT8: + case IOVT_UINT16: + case IOVT_UINT32: + /* all integers are s32 sized args at the ioctl interface */ + if (len < (int)sizeof(int)) { + bcmerror = -EOVERFLOW; + } + break; + + case IOVT_BUFFER: + /* buffer must meet minimum length requirement */ + if (len < vi->minlen) { + bcmerror = -EOVERFLOW; + } + break; + + case IOVT_VOID: + if (!set) { + /* Cannot return nil... */ + bcmerror = -ENOTSUPP; + } else if (len) { + /* Set is an action w/o parameters */ + bcmerror = -ENOBUFS; + } + break; + + default: + /* unknown type for length check in iovar info */ + bcmerror = -ENOTSUPP; + } + + return bcmerror; +} +EXPORT_SYMBOL(brcmu_iovar_lencheck); + +/******************************************************************************* + * crc8 + * + * Computes a crc8 over the input data using the polynomial: + * + * x^8 + x^7 +x^6 + x^4 + x^2 + 1 + * + * The caller provides the initial value (either CRC8_INIT_VALUE + * or the previous returned value) to allow for processing of + * discontiguous blocks of data. When generating the CRC the + * caller is responsible for complementing the final return value + * and inserting it into the byte stream. When checking, a final + * return value of CRC8_GOOD_VALUE indicates a valid CRC. + * + * Reference: Dallas Semiconductor Application Note 27 + * Williams, Ross N., "A Painless Guide to CRC Error Detection Algorithms", + * ver 3, Aug 1993, ross@guest.adelaide.edu.au, Rocksoft Pty Ltd., + * ftp://ftp.rocksoft.com/clients/rocksoft/papers/crc_v3.txt + * + * **************************************************************************** + */ + +static const u8 crc8_table[256] = { + 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, + 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, + 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, + 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, + 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, + 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, + 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, + 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, + 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, + 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, + 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, + 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, + 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, + 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, + 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, + 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, + 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, + 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, + 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, + 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, + 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, + 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, + 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, + 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, + 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, + 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, + 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, + 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, + 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, + 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, + 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, + 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F +}; + +u8 brcmu_crc8(u8 *pdata, /* pointer to array of data to process */ + uint nbytes, /* number of input data bytes to process */ + u8 crc /* either CRC8_INIT_VALUE or previous return value */ + ) { + /* loop over the buffer data */ + while (nbytes-- > 0) + crc = crc8_table[(crc ^ *pdata++) & 0xff]; + + return crc; +} +EXPORT_SYMBOL(brcmu_crc8); + +/* + * Traverse a string of 1-byte tag/1-byte length/variable-length value + * triples, returning a pointer to the substring whose first element + * matches tag + */ +struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, uint key) +{ + struct brcmu_tlv *elt; + int totlen; + + elt = (struct brcmu_tlv *) buf; + totlen = buflen; + + /* find tagged parameter */ + while (totlen >= 2) { + int len = elt->len; + + /* validate remaining totlen */ + if ((elt->id == key) && (totlen >= (len + 2))) + return elt; + + elt = (struct brcmu_tlv *) ((u8 *) elt + (len + 2)); + totlen -= (len + 2); + } + + return NULL; +} +EXPORT_SYMBOL(brcmu_parse_tlvs); + + +#if defined(BCMDBG) +int +brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, char *buf, + int len) +{ + int i; + char *p = buf; + char hexstr[16]; + int slen = 0, nlen = 0; + u32 bit; + const char *name; + + if (len < 2 || !buf) + return 0; + + buf[0] = '\0'; + + for (i = 0; flags != 0; i++) { + bit = bd[i].bit; + name = bd[i].name; + if (bit == 0 && flags != 0) { + /* print any unnamed bits */ + snprintf(hexstr, 16, "0x%X", flags); + name = hexstr; + flags = 0; /* exit loop */ + } else if ((flags & bit) == 0) + continue; + flags &= ~bit; + nlen = strlen(name); + slen += nlen; + /* count btwn flag space */ + if (flags != 0) + slen += 1; + /* need NULL char as well */ + if (len <= slen) + break; + /* copy NULL char but don't count it */ + strncpy(p, name, nlen + 1); + p += nlen; + /* copy btwn flag space and NULL char */ + if (flags != 0) + p += snprintf(p, 2, " "); + len -= slen; + } + + /* indicate the str was too short */ + if (flags != 0) { + if (len < 2) + p -= 2 - len; /* overwrite last char */ + p += snprintf(p, 2, ">"); + } + + return (int)(p - buf); +} +EXPORT_SYMBOL(brcmu_format_flags); + +/* print bytes formatted as hex to a string. return the resulting string length */ +int brcmu_format_hex(char *str, const void *bytes, int len) +{ + int i; + char *p = str; + const u8 *src = (const u8 *)bytes; + + for (i = 0; i < len; i++) { + p += snprintf(p, 3, "%02X", *src); + src++; + } + return (int)(p - str); +} +EXPORT_SYMBOL(brcmu_format_hex); +#endif /* defined(BCMDBG) */ + +char *brcmu_chipname(uint chipid, char *buf, uint len) +{ + const char *fmt; + + fmt = ((chipid > 0xa000) || (chipid < 0x4000)) ? "%d" : "%x"; + snprintf(buf, len, fmt, chipid); + return buf; +} +EXPORT_SYMBOL(brcmu_chipname); + +uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) +{ + uint len; + + len = strlen(name) + 1; + + if ((len + datalen) > buflen) + return 0; + + strncpy(buf, name, buflen); + + /* append data onto the end of the name string */ + memcpy(&buf[len], data, datalen); + len += datalen; + + return len; +} +EXPORT_SYMBOL(brcmu_mkiovar); + +/* Quarter dBm units to mW + * Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153 + * Table is offset so the last entry is largest mW value that fits in + * a u16. + */ + +#define QDBM_OFFSET 153 /* Offset for first entry */ +#define QDBM_TABLE_LEN 40 /* Table size */ + +/* Smallest mW value that will round up to the first table entry, QDBM_OFFSET. + * Value is ( mW(QDBM_OFFSET - 1) + mW(QDBM_OFFSET) ) / 2 + */ +#define QDBM_TABLE_LOW_BOUND 6493 /* Low bound */ + +/* Largest mW value that will round down to the last table entry, + * QDBM_OFFSET + QDBM_TABLE_LEN-1. + * Value is ( mW(QDBM_OFFSET + QDBM_TABLE_LEN - 1) + + * mW(QDBM_OFFSET + QDBM_TABLE_LEN) ) / 2. + */ +#define QDBM_TABLE_HIGH_BOUND 64938 /* High bound */ + +static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { +/* qdBm: +0 +1 +2 +3 +4 +5 +6 +7 */ +/* 153: */ 6683, 7079, 7499, 7943, 8414, 8913, 9441, 10000, +/* 161: */ 10593, 11220, 11885, 12589, 13335, 14125, 14962, 15849, +/* 169: */ 16788, 17783, 18836, 19953, 21135, 22387, 23714, 25119, +/* 177: */ 26607, 28184, 29854, 31623, 33497, 35481, 37584, 39811, +/* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096 +}; + +u16 brcmu_qdbm_to_mw(u8 qdbm) +{ + uint factor = 1; + int idx = qdbm - QDBM_OFFSET; + + if (idx >= QDBM_TABLE_LEN) { + /* clamp to max u16 mW value */ + return 0xFFFF; + } + + /* scale the qdBm index up to the range of the table 0-40 + * where an offset of 40 qdBm equals a factor of 10 mW. + */ + while (idx < 0) { + idx += 40; + factor *= 10; + } + + /* return the mW value scaled down to the correct factor of 10, + * adding in factor/2 to get proper rounding. + */ + return (nqdBm_to_mW_map[idx] + factor / 2) / factor; +} +EXPORT_SYMBOL(brcmu_qdbm_to_mw); + +u8 brcmu_mw_to_qdbm(u16 mw) +{ + u8 qdbm; + int offset; + uint mw_uint = mw; + uint boundary; + + /* handle boundary case */ + if (mw_uint <= 1) + return 0; + + offset = QDBM_OFFSET; + + /* move mw into the range of the table */ + while (mw_uint < QDBM_TABLE_LOW_BOUND) { + mw_uint *= 10; + offset -= 40; + } + + for (qdbm = 0; qdbm < QDBM_TABLE_LEN - 1; qdbm++) { + boundary = nqdBm_to_mW_map[qdbm] + (nqdBm_to_mW_map[qdbm + 1] - + nqdBm_to_mW_map[qdbm]) / 2; + if (mw_uint < boundary) + break; + } + + qdbm += (u8) offset; + + return qdbm; +} +EXPORT_SYMBOL(brcmu_mw_to_qdbm); + +uint brcmu_bitcount(u8 *bitmap, uint length) +{ + uint bitcount = 0, i; + u8 tmp; + for (i = 0; i < length; i++) { + tmp = bitmap[i]; + while (tmp) { + bitcount++; + tmp &= (tmp - 1); + } + } + return bitcount; +} +EXPORT_SYMBOL(brcmu_bitcount); + +/* Initialization of brcmu_strbuf structure */ +void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size) +{ + b->origsize = b->size = size; + b->origbuf = b->buf = buf; +} +EXPORT_SYMBOL(brcmu_binit); + +/* Buffer sprintf wrapper to guard against buffer overflow */ +int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...) +{ + va_list ap; + int r; + + va_start(ap, fmt); + r = vsnprintf(b->buf, b->size, fmt, ap); + + /* Non Ansi C99 compliant returns -1, + * Ansi compliant return r >= b->size, + * stdlib returns 0, handle all + */ + if ((r == -1) || (r >= (int)b->size) || (r == 0)) { + b->size = 0; + } else { + b->size -= r; + b->buf += r; + } + + va_end(ap); + + return r; +} +EXPORT_SYMBOL(brcmu_bprintf); diff --git a/drivers/staging/brcm80211/brcmutil/wifi.c b/drivers/staging/brcm80211/brcmutil/wifi.c new file mode 100644 index 0000000..2a3db0a --- /dev/null +++ b/drivers/staging/brcm80211/brcmutil/wifi.c @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include +#include +#include +#include +#include + +/* + * Verify the chanspec is using a legal set of parameters, i.e. that the + * chanspec specified a band, bw, ctl_sb and channel and that the + * combination could be legal given any set of circumstances. + * RETURNS: true is the chanspec is malformed, false if it looks good. + */ +bool brcmu_chspec_malformed(chanspec_t chanspec) +{ + /* must be 2G or 5G band */ + if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) + return true; + /* must be 20 or 40 bandwidth */ + if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) + return true; + + /* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */ + if (CHSPEC_IS20(chanspec)) { + if (!CHSPEC_SB_NONE(chanspec)) + return true; + } else { + if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) + return true; + } + + return false; +} +EXPORT_SYMBOL(brcmu_chspec_malformed); + +/* + * This function returns the channel number that control traffic is being sent on, for legacy + * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ + * sideband depending on the chanspec selected + */ +u8 brcmu_chspec_ctlchan(chanspec_t chspec) +{ + u8 ctl_chan; + + /* Is there a sideband ? */ + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { + return CHSPEC_CHANNEL(chspec); + } else { + /* we only support 40MHZ with sidebands */ + /* chanspec channel holds the centre frequency, use that and the + * side band information to reconstruct the control channel number + */ + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { + /* control chan is the upper 20 MHZ SB of the 40MHZ channel */ + ctl_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + } else { + /* control chan is the lower 20 MHZ SB of the 40MHZ channel */ + ctl_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + } + } + + return ctl_chan; +} +EXPORT_SYMBOL(brcmu_chspec_ctlchan); + +/* + * Return the channel number for a given frequency and base frequency. + * The returned channel number is relative to the given base frequency. + * If the given base frequency is zero, a base frequency of 5 GHz is assumed for + * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. + * + * Frequency is specified in MHz. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for + * 2.4 GHz and 5 GHz bands. + * + * The returned channel will be in the range [1, 14] in the 2.4 GHz band + * and [0, 200] otherwise. + * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the + * frequency is not a 2.4 GHz channel, or if the frequency is not and even + * multiple of 5 MHz from the base frequency to the base plus 1 GHz. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + */ +int brcmu_mhz2channel(uint freq, uint start_factor) +{ + int ch = -1; + uint base; + int offset; + + /* take the default channel start frequency */ + if (start_factor == 0) { + if (freq >= 2400 && freq <= 2500) + start_factor = WF_CHAN_FACTOR_2_4_G; + else if (freq >= 5000 && freq <= 6000) + start_factor = WF_CHAN_FACTOR_5_G; + } + + if (freq == 2484 && start_factor == WF_CHAN_FACTOR_2_4_G) + return 14; + + base = start_factor / 2; + + /* check that the frequency is in 1GHz range of the base */ + if ((freq < base) || (freq > base + 1000)) + return -1; + + offset = freq - base; + ch = offset / 5; + + /* check that frequency is a 5MHz multiple from the base */ + if (offset != (ch * 5)) + return -1; + + /* restricted channel range check for 2.4G */ + if (start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 13)) + return -1; + + return ch; +} +EXPORT_SYMBOL(brcmu_mhz2channel); + diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h deleted file mode 100644 index 73854a4..0000000 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ /dev/null @@ -1,498 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _brcmutils_h_ -#define _brcmutils_h_ - -/* Buffer structure for collecting string-formatted data -* using brcmu_bprintf() API. -* Use brcmu_binit() to initialize before use -*/ - - struct brcmu_strbuf { - char *buf; /* pointer to current position in origbuf */ - unsigned int size; /* current (residual) size in bytes */ - char *origbuf; /* unmodified pointer to orignal buffer */ - unsigned int origsize; /* unmodified orignal buffer size in bytes */ - }; - -/* ** driver-only section ** */ - -#define GPIO_PIN_NOTDEFINED 0x20 /* Pin not defined */ - -/* - * Spin at most 'us' microseconds while 'exp' is true. - * Caller should explicitly test 'exp' when this completes - * and take appropriate error action if 'exp' is still true. - */ -#define SPINWAIT(exp, us) { \ - uint countdown = (us) + 9; \ - while ((exp) && (countdown >= 10)) {\ - udelay(10); \ - countdown -= 10; \ - } \ -} - -/* osl multi-precedence packet queue */ -#ifndef PKTQ_LEN_DEFAULT -#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */ -#endif -#ifndef PKTQ_MAX_PREC -#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */ -#endif - - struct pktq_prec { - struct sk_buff *head; /* first packet to dequeue */ - struct sk_buff *tail; /* last packet to dequeue */ - u16 len; /* number of queued packets */ - u16 max; /* maximum number of queued packets */ - }; - -/* multi-priority pkt queue */ - struct pktq { - u16 num_prec; /* number of precedences in use */ - u16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */ - u16 max; /* total max packets */ - u16 len; /* total number of packets */ - /* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */ - struct pktq_prec q[PKTQ_MAX_PREC]; - }; - -#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--) - -/* fn(pkt, arg). return true if pkt belongs to if */ -typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *); - -/* operations on a specific precedence in packet queue */ - -#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) -#define pktq_plen(pq, prec) ((pq)->q[prec].len) -#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) -#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) -#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) - -#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) -#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) - -extern struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, - struct sk_buff *p); -extern struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, - struct sk_buff *p); -extern struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec); -extern struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec); - -/* packet primitives */ -extern struct sk_buff *brcmu_pkt_buf_get_skb(uint len); -extern void brcmu_pkt_buf_free_skb(struct sk_buff *skb); - -/* Empty the queue at particular precedence level */ -extern void brcmu_pktq_pflush(struct pktq *pq, int prec, - bool dir, ifpkt_cb_t fn, void *arg); - -/* operations on a set of precedences in packet queue */ - -extern int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp); -extern struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, - int *prec_out); - -/* operations on packet queue as a whole */ - -#define pktq_len(pq) ((int)(pq)->len) -#define pktq_max(pq) ((int)(pq)->max) -#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) -#define pktq_full(pq) ((pq)->len >= (pq)->max) -#define pktq_empty(pq) ((pq)->len == 0) - -/* operations for single precedence queues */ -#define pktenq(pq, p) brcmu_pktq_penq(((struct pktq *)pq), 0, (p)) -#define pktenq_head(pq, p)\ - brcmu_pktq_penq_head(((struct pktq *)pq), 0, (p)) -#define pktdeq(pq) brcmu_pktq_pdeq(((struct pktq *)pq), 0) -#define pktdeq_tail(pq) brcmu_pktq_pdeq_tail(((struct pktq *)pq), 0) -#define pktqinit(pq, len) brcmu_pktq_init(((struct pktq *)pq), 1, len) - -extern void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len); -/* prec_out may be NULL if caller is not interested in return value */ -extern struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out); -extern void brcmu_pktq_flush(struct pktq *pq, bool dir, - ifpkt_cb_t fn, void *arg); - -/* externs */ -/* packet */ -extern uint brcmu_pktfrombuf(struct sk_buff *p, - uint offset, int len, unsigned char *buf); -extern uint brcmu_pkttotlen(struct sk_buff *p); - -/* ethernet address */ -extern int brcmu_ether_atoe(char *p, u8 *ea); - -/* ip address */ - struct ipv4_addr; - -#ifdef BCMDBG -extern void brcmu_prpkt(const char *msg, struct sk_buff *p0); -#else -#define brcmu_prpkt(a, b) -#endif /* BCMDBG */ - -/* Support for sharing code across in-driver iovar implementations. - * The intent is that a driver use this structure to map iovar names - * to its (private) iovar identifiers, and the lookup function to - * find the entry. Macros are provided to map ids and get/set actions - * into a single number space for a switch statement. - */ - -/* iovar structure */ -struct brcmu_iovar { - const char *name; /* name for lookup and display */ - u16 varid; /* id for switch */ - u16 flags; /* driver-specific flag bits */ - u16 type; /* base type of argument */ - u16 minlen; /* min length for buffer vars */ -}; - -/* varid definitions are per-driver, may use these get/set bits */ - -/* IOVar action bits for id mapping */ -#define IOV_GET 0 /* Get an iovar */ -#define IOV_SET 1 /* Set an iovar */ - -/* Varid to actionid mapping */ -#define IOV_GVAL(id) ((id)*2) -#define IOV_SVAL(id) (((id)*2)+IOV_SET) -#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) -#define IOV_ID(actionid) (actionid >> 1) - -extern const struct -brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, - const char *name); -extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, - int len, bool set); - -/* Base type definitions */ -#define IOVT_VOID 0 /* no value (implictly set only) */ -#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */ -#define IOVT_INT8 2 /* integer values are range-checked */ -#define IOVT_UINT8 3 /* unsigned int 8 bits */ -#define IOVT_INT16 4 /* int 16 bits */ -#define IOVT_UINT16 5 /* unsigned int 16 bits */ -#define IOVT_INT32 6 /* int 32 bits */ -#define IOVT_UINT32 7 /* unsigned int 32 bits */ -#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */ -#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) - -/* Initializer for IOV type strings */ -#define BCM_IOV_TYPE_INIT { \ - "void", \ - "bool", \ - "s8", \ - "u8", \ - "s16", \ - "u16", \ - "s32", \ - "u32", \ - "buffer", \ - "" } - -#define BCM_IOVT_IS_INT(type) (\ - (type == IOVT_BOOL) || \ - (type == IOVT_INT8) || \ - (type == IOVT_UINT8) || \ - (type == IOVT_INT16) || \ - (type == IOVT_UINT16) || \ - (type == IOVT_INT32) || \ - (type == IOVT_UINT32)) - -/* ** driver/apps-shared section ** */ - -#define BCME_STRLEN 64 /* Max string length for BCM errors */ - -#ifndef ABS -#define ABS(a) (((a) < 0) ? -(a) : (a)) -#endif /* ABS */ - -#define CEIL(x, y) (((x) + ((y)-1)) / (y)) -#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0) - -/* map physical to virtual I/O */ -#if !defined(CONFIG_MMC_MSM7X00A) -#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), \ - (unsigned long)(size)) -#else -#define REG_MAP(pa, size) (void *)(0) -#endif - -/* register access macros */ -#if defined(BCMSDIO) -#ifdef BRCM_FULLMAC -#include -#endif -#define OSL_WRITE_REG(r, v) \ - (bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v))) -#define OSL_READ_REG(r) \ - (bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))) -#endif - -#if defined(BCMSDIO) -#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op -#define SELECT_BUS_READ(mmap_op, bus_op) bus_op -#else -#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op -#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op -#endif - -/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */ -#define PKTBUFSZ 2048 - -#define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ)) -#ifdef BRCM_FULLMAC -#include /* for vsn/printf's */ -#include /* for mem*, str* */ -#endif - -/* register access macros */ -#ifndef __BIG_ENDIAN -#ifndef __mips__ -#define R_REG(r) (\ - SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), OSL_READ_REG(r)) \ -) -#else /* __mips__ */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }), \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - __osl_v = OSL_READ_REG(r); \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - })) \ -) -#endif /* __mips__ */ - -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), (volatile u8*)(r)); break; \ - case sizeof(u16): \ - writew((u16)(v), (volatile u16*)(r)); break; \ - case sizeof(u32): \ - writel((u32)(v), (volatile u32*)(r)); break; \ - }, \ - (OSL_WRITE_REG(r, v))); \ - } while (0) -#else /* __BIG_ENDIAN */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }), \ - OSL_READ_REG(r)) \ -) -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), \ - (volatile u8*)((r)^3)); break; \ - case sizeof(u16): \ - writew((u16)(v), \ - (volatile u16*)((r)^2)); break; \ - case sizeof(u32): \ - writel((u32)(v), \ - (volatile u32*)(r)); break; \ - }, \ - (OSL_WRITE_REG(r, v))); \ - } while (0) -#endif /* __BIG_ENDIAN */ - -#ifdef __mips__ -/* - * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder - * transactions. As a fix, a read after write is performed on certain places - * in the code. Older chips and the newer 5357 family don't require this fix. - */ -#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) -#else -#define W_REG_FLUSH(r, v) W_REG((r), (v)) -#endif /* __mips__ */ - -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) - -#define SET_REG(r, mask, val) \ - W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - -#ifndef setbit -#ifndef NBBY /* the BSD family defines NBBY */ -#define NBBY 8 /* 8 bits per byte */ -#endif /* #ifndef NBBY */ -#define setbit(a, i) (((u8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY)) -#define clrbit(a, i) (((u8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY))) -#define isset(a, i) (((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) -#define isclr(a, i) ((((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0) -#endif /* setbit */ - -#define NBITS(type) (sizeof(type) * 8) -#define NBITVAL(nbits) (1 << (nbits)) -#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) -#define NBITMASK(nbits) MAXBITVAL(nbits) -#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) - -/* basic mux operation - can be optimized on several architectures */ -#define MUX(pred, true, false) ((pred) ? (true) : (false)) - -/* modulo inc/dec - assumes x E [0, bound - 1] */ -#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) -#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) - -/* modulo inc/dec, bound = 2^k */ -#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) -#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) - -/* modulo add/sub - assumes x, y E [0, bound - 1] */ -#define MODADD(x, y, bound) \ - MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) -#define MODSUB(x, y, bound) \ - MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) - -/* module add/sub, bound = 2^k */ -#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) -#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) - -/* crc defines */ -#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ -#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ -#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ -#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ - -/* brcmu_format_flags() bit description structure */ -struct brcmu_bit_desc { - u32 bit; - const char *name; -}; - -/* tag_ID/length/value_buffer tuple */ -struct brcmu_tlv { - u8 id; - u8 len; - u8 data[1]; -}; - -#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ - -/* crypto utility function */ -/* 128-bit xor: *dst = *src1 xor *src2. dst1, src1 and src2 may have any alignment */ - static inline void - xor_128bit_block(const u8 *src1, const u8 *src2, u8 *dst) { - if ( -#ifdef __i386__ - 1 || -#endif - (((unsigned long) src1 | (unsigned long) src2 | (unsigned long) dst) & - 3) == 0) { - /* ARM CM3 rel time: 1229 (727 if alignment check could be omitted) */ - /* x86 supports unaligned. This version runs 6x-9x faster on x86. */ - ((u32 *) dst)[0] = - ((const u32 *)src1)[0] ^ ((const u32 *) - src2)[0]; - ((u32 *) dst)[1] = - ((const u32 *)src1)[1] ^ ((const u32 *) - src2)[1]; - ((u32 *) dst)[2] = - ((const u32 *)src1)[2] ^ ((const u32 *) - src2)[2]; - ((u32 *) dst)[3] = - ((const u32 *)src1)[3] ^ ((const u32 *) - src2)[3]; - } else { - /* ARM CM3 rel time: 4668 (4191 if alignment check could be omitted) */ - int k; - for (k = 0; k < 16; k++) - dst[k] = src1[k] ^ src2[k]; - } - } - -/* externs */ -/* crc */ -extern u8 brcmu_crc8(u8 *p, uint nbytes, u8 crc); - -/* format/print */ -#if defined(BCMDBG) -extern int brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, - char *buf, int len); -extern int brcmu_format_hex(char *str, const void *bytes, int len); -#endif - -extern char *brcmu_chipname(uint chipid, char *buf, uint len); - -extern struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, - uint key); - -/* multi-bool data type: set of bools, mbool is true if any is set */ - typedef u32 mbool; -#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ -#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ -#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* true if one bool is set */ -#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) - -/* power conversion */ -extern u16 brcmu_qdbm_to_mw(u8 qdbm); -extern u8 brcmu_mw_to_qdbm(u16 mw); - -extern void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size); -extern int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...); - -extern uint brcmu_mkiovar(char *name, char *data, uint datalen, - char *buf, uint len); -extern uint brcmu_bitcount(u8 *bitmap, uint bytelength); - -#endif /* _brcmutils_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/bcmwifi.h deleted file mode 100644 index 6b12c13..0000000 --- a/drivers/staging/brcm80211/include/bcmwifi.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _brcmu_wifi_h_ -#define _brcmu_wifi_h_ - -#include /* for ETH_ALEN */ -#include /* for WLAN_PMKID_LEN */ - -/* A chanspec holds the channel number, band, bandwidth and control sideband */ -typedef u16 chanspec_t; - -/* channel defines */ -#define CH_UPPER_SB 0x01 -#define CH_LOWER_SB 0x02 -#define CH_EWA_VALID 0x04 -#define CH_20MHZ_APART 4 -#define CH_10MHZ_APART 2 -#define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */ -#define CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ -#define WLC_MAX_2G_CHANNEL CH_MAX_2G_CHANNEL /* legacy define */ -#define MAXCHANNEL 224 /* max # supported channels. The max channel no is 216, - * this is that + 1 rounded up to a multiple of NBBY (8). - * DO NOT MAKE it > 255: channels are u8's all over - */ - -#define WL_CHANSPEC_CHAN_MASK 0x00ff -#define WL_CHANSPEC_CHAN_SHIFT 0 - -#define WL_CHANSPEC_CTL_SB_MASK 0x0300 -#define WL_CHANSPEC_CTL_SB_SHIFT 8 -#define WL_CHANSPEC_CTL_SB_LOWER 0x0100 -#define WL_CHANSPEC_CTL_SB_UPPER 0x0200 -#define WL_CHANSPEC_CTL_SB_NONE 0x0300 - -#define WL_CHANSPEC_BW_MASK 0x0C00 -#define WL_CHANSPEC_BW_SHIFT 10 -#define WL_CHANSPEC_BW_10 0x0400 -#define WL_CHANSPEC_BW_20 0x0800 -#define WL_CHANSPEC_BW_40 0x0C00 - -#define WL_CHANSPEC_BAND_MASK 0xf000 -#define WL_CHANSPEC_BAND_SHIFT 12 -#define WL_CHANSPEC_BAND_5G 0x1000 -#define WL_CHANSPEC_BAND_2G 0x2000 -#define INVCHANSPEC 255 - -/* used to calculate the chan_freq = chan_factor * 500Mhz + 5 * chan_number */ -#define WF_CHAN_FACTOR_2_4_G 4814 /* 2.4 GHz band, 2407 MHz */ -#define WF_CHAN_FACTOR_5_G 10000 /* 5 GHz band, 5000 MHz */ -#define WF_CHAN_FACTOR_4_G 8000 /* 4.9 GHz band for Japan */ - -/* channel defines */ -#define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? ((channel) - CH_10MHZ_APART) : 0) -#define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ - ((channel) + CH_10MHZ_APART) : 0) -#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) -#define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ - WL_CHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \ - WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) -#define NEXT_20MHZ_CHAN(channel) (((channel) < (MAXCHANNEL - CH_20MHZ_APART)) ? \ - ((channel) + CH_20MHZ_APART) : 0) -#define CH40MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ - ((channel) | (ctlsb) | WL_CHANSPEC_BW_40 | \ - ((channel) <= CH_MAX_2G_CHANNEL ? WL_CHANSPEC_BAND_2G : \ - WL_CHANSPEC_BAND_5G)) -#define CHSPEC_CHANNEL(chspec) ((u8)((chspec) & WL_CHANSPEC_CHAN_MASK)) -#define CHSPEC_BAND(chspec) ((chspec) & WL_CHANSPEC_BAND_MASK) - -#ifdef WL11N_20MHZONLY - -#define CHSPEC_CTL_SB(chspec) WL_CHANSPEC_CTL_SB_NONE -#define CHSPEC_BW(chspec) WL_CHANSPEC_BW_20 -#define CHSPEC_IS10(chspec) 0 -#define CHSPEC_IS20(chspec) 1 -#ifndef CHSPEC_IS40 -#define CHSPEC_IS40(chspec) 0 -#endif - -#else /* !WL11N_20MHZONLY */ - -#define CHSPEC_CTL_SB(chspec) ((chspec) & WL_CHANSPEC_CTL_SB_MASK) -#define CHSPEC_BW(chspec) ((chspec) & WL_CHANSPEC_BW_MASK) -#define CHSPEC_IS10(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_10) -#define CHSPEC_IS20(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_20) -#ifndef CHSPEC_IS40 -#define CHSPEC_IS40(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40) -#endif - -#endif /* !WL11N_20MHZONLY */ - -#define CHSPEC_IS5G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_5G) -#define CHSPEC_IS2G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_2G) -#define CHSPEC_SB_NONE(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_NONE) -#define CHSPEC_SB_UPPER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_UPPER) -#define CHSPEC_SB_LOWER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_LOWER) -#define CHSPEC_CTL_CHAN(chspec) ((CHSPEC_SB_LOWER(chspec)) ? \ - (LOWER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK))) : \ - (UPPER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK)))) -#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) - -#define CHANSPEC_STR_LEN 8 - -/* defined rate in 500kbps */ -#define WLC_MAXRATE 108 /* in 500kbps units */ -#define WLC_RATE_1M 2 /* in 500kbps units */ -#define WLC_RATE_2M 4 /* in 500kbps units */ -#define WLC_RATE_5M5 11 /* in 500kbps units */ -#define WLC_RATE_11M 22 /* in 500kbps units */ -#define WLC_RATE_6M 12 /* in 500kbps units */ -#define WLC_RATE_9M 18 /* in 500kbps units */ -#define WLC_RATE_12M 24 /* in 500kbps units */ -#define WLC_RATE_18M 36 /* in 500kbps units */ -#define WLC_RATE_24M 48 /* in 500kbps units */ -#define WLC_RATE_36M 72 /* in 500kbps units */ -#define WLC_RATE_48M 96 /* in 500kbps units */ -#define WLC_RATE_54M 108 /* in 500kbps units */ - -#define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ - -#define MCSSET_LEN 16 - -#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) - -/* - * Verify the chanspec is using a legal set of parameters, i.e. that the - * chanspec specified a band, bw, ctl_sb and channel and that the - * combination could be legal given any set of circumstances. - * RETURNS: true is the chanspec is malformed, false if it looks good. - */ -extern bool brcmu_chspec_malformed(chanspec_t chanspec); - -/* - * This function returns the channel number that control traffic is being sent on, for legacy - * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ - * sideband depending on the chanspec selected - */ -extern u8 brcmu_chspec_ctlchan(chanspec_t chspec); - -/* - * Return the channel number for a given frequency and base frequency. - * The returned channel number is relative to the given base frequency. - * If the given base frequency is zero, a base frequency of 5 GHz is assumed for - * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. - * - * Frequency is specified in MHz. - * The base frequency is specified as (start_factor * 500 kHz). - * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for - * 2.4 GHz and 5 GHz bands. - * - * The returned channel will be in the range [1, 14] in the 2.4 GHz band - * and [0, 200] otherwise. - * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the - * frequency is not a 2.4 GHz channel, or if the frequency is not and even - * multiple of 5 MHz from the base frequency to the base plus 1 GHz. - * - * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 - */ -extern int brcmu_mhz2channel(uint freq, uint start_factor); - -/* Enumerate crypto algorithms */ -#define CRYPTO_ALGO_OFF 0 -#define CRYPTO_ALGO_WEP1 1 -#define CRYPTO_ALGO_TKIP 2 -#define CRYPTO_ALGO_WEP128 3 -#define CRYPTO_ALGO_AES_CCM 4 -#define CRYPTO_ALGO_AES_RESERVED1 5 -#define CRYPTO_ALGO_AES_RESERVED2 6 -#define CRYPTO_ALGO_NALG 7 - -/* wireless security bitvec */ -#define WEP_ENABLED 0x0001 -#define TKIP_ENABLED 0x0002 -#define AES_ENABLED 0x0004 -#define WSEC_SWFLAG 0x0008 -#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ - -/* WPA authentication mode bitvec */ -#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ -#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ -#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ -#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ -#define WPA_AUTH_RESERVED1 0x0008 -#define WPA_AUTH_RESERVED2 0x0010 - /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ -#define WPA2_AUTH_RESERVED1 0x0020 -#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ -#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ -#define WPA2_AUTH_RESERVED3 0x0200 -#define WPA2_AUTH_RESERVED4 0x0400 -#define WPA2_AUTH_RESERVED5 0x0800 - -/* pmkid */ -#define MAXPMKID 16 - -#define DOT11_DEFAULT_RTS_LEN 2347 -#define DOT11_DEFAULT_FRAG_LEN 2346 - -#define DOT11_ICV_AES_LEN 8 -#define DOT11_QOS_LEN 2 -#define DOT11_IV_MAX_LEN 8 -#define DOT11_A4_HDR_LEN 30 - -#define HT_CAP_RX_STBC_NO 0x0 -#define HT_CAP_RX_STBC_ONE_STREAM 0x1 - -typedef struct _pmkid { - u8 BSSID[ETH_ALEN]; - u8 PMKID[WLAN_PMKID_LEN]; -} pmkid_t; - -typedef struct _pmkid_list { - u32 npmkid; - pmkid_t pmkid[1]; -} pmkid_list_t; - -typedef struct _pmkid_cand { - u8 BSSID[ETH_ALEN]; - u8 preauth; -} pmkid_cand_t; - -typedef struct _pmkid_cand_list { - u32 npmkid_cand; - pmkid_cand_t pmkid_cand[1]; -} pmkid_cand_list_t; - -typedef u8 ac_bitmap_t; - -#endif /* _brcmu_wifi_h_ */ diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h new file mode 100644 index 0000000..73854a4 --- /dev/null +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -0,0 +1,498 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _brcmutils_h_ +#define _brcmutils_h_ + +/* Buffer structure for collecting string-formatted data +* using brcmu_bprintf() API. +* Use brcmu_binit() to initialize before use +*/ + + struct brcmu_strbuf { + char *buf; /* pointer to current position in origbuf */ + unsigned int size; /* current (residual) size in bytes */ + char *origbuf; /* unmodified pointer to orignal buffer */ + unsigned int origsize; /* unmodified orignal buffer size in bytes */ + }; + +/* ** driver-only section ** */ + +#define GPIO_PIN_NOTDEFINED 0x20 /* Pin not defined */ + +/* + * Spin at most 'us' microseconds while 'exp' is true. + * Caller should explicitly test 'exp' when this completes + * and take appropriate error action if 'exp' is still true. + */ +#define SPINWAIT(exp, us) { \ + uint countdown = (us) + 9; \ + while ((exp) && (countdown >= 10)) {\ + udelay(10); \ + countdown -= 10; \ + } \ +} + +/* osl multi-precedence packet queue */ +#ifndef PKTQ_LEN_DEFAULT +#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */ +#endif +#ifndef PKTQ_MAX_PREC +#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */ +#endif + + struct pktq_prec { + struct sk_buff *head; /* first packet to dequeue */ + struct sk_buff *tail; /* last packet to dequeue */ + u16 len; /* number of queued packets */ + u16 max; /* maximum number of queued packets */ + }; + +/* multi-priority pkt queue */ + struct pktq { + u16 num_prec; /* number of precedences in use */ + u16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */ + u16 max; /* total max packets */ + u16 len; /* total number of packets */ + /* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */ + struct pktq_prec q[PKTQ_MAX_PREC]; + }; + +#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--) + +/* fn(pkt, arg). return true if pkt belongs to if */ +typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *); + +/* operations on a specific precedence in packet queue */ + +#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) +#define pktq_plen(pq, prec) ((pq)->q[prec].len) +#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) +#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) +#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) + +#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) +#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) + +extern struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, + struct sk_buff *p); +extern struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, + struct sk_buff *p); +extern struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec); +extern struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec); + +/* packet primitives */ +extern struct sk_buff *brcmu_pkt_buf_get_skb(uint len); +extern void brcmu_pkt_buf_free_skb(struct sk_buff *skb); + +/* Empty the queue at particular precedence level */ +extern void brcmu_pktq_pflush(struct pktq *pq, int prec, + bool dir, ifpkt_cb_t fn, void *arg); + +/* operations on a set of precedences in packet queue */ + +extern int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp); +extern struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, + int *prec_out); + +/* operations on packet queue as a whole */ + +#define pktq_len(pq) ((int)(pq)->len) +#define pktq_max(pq) ((int)(pq)->max) +#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) +#define pktq_full(pq) ((pq)->len >= (pq)->max) +#define pktq_empty(pq) ((pq)->len == 0) + +/* operations for single precedence queues */ +#define pktenq(pq, p) brcmu_pktq_penq(((struct pktq *)pq), 0, (p)) +#define pktenq_head(pq, p)\ + brcmu_pktq_penq_head(((struct pktq *)pq), 0, (p)) +#define pktdeq(pq) brcmu_pktq_pdeq(((struct pktq *)pq), 0) +#define pktdeq_tail(pq) brcmu_pktq_pdeq_tail(((struct pktq *)pq), 0) +#define pktqinit(pq, len) brcmu_pktq_init(((struct pktq *)pq), 1, len) + +extern void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len); +/* prec_out may be NULL if caller is not interested in return value */ +extern struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out); +extern void brcmu_pktq_flush(struct pktq *pq, bool dir, + ifpkt_cb_t fn, void *arg); + +/* externs */ +/* packet */ +extern uint brcmu_pktfrombuf(struct sk_buff *p, + uint offset, int len, unsigned char *buf); +extern uint brcmu_pkttotlen(struct sk_buff *p); + +/* ethernet address */ +extern int brcmu_ether_atoe(char *p, u8 *ea); + +/* ip address */ + struct ipv4_addr; + +#ifdef BCMDBG +extern void brcmu_prpkt(const char *msg, struct sk_buff *p0); +#else +#define brcmu_prpkt(a, b) +#endif /* BCMDBG */ + +/* Support for sharing code across in-driver iovar implementations. + * The intent is that a driver use this structure to map iovar names + * to its (private) iovar identifiers, and the lookup function to + * find the entry. Macros are provided to map ids and get/set actions + * into a single number space for a switch statement. + */ + +/* iovar structure */ +struct brcmu_iovar { + const char *name; /* name for lookup and display */ + u16 varid; /* id for switch */ + u16 flags; /* driver-specific flag bits */ + u16 type; /* base type of argument */ + u16 minlen; /* min length for buffer vars */ +}; + +/* varid definitions are per-driver, may use these get/set bits */ + +/* IOVar action bits for id mapping */ +#define IOV_GET 0 /* Get an iovar */ +#define IOV_SET 1 /* Set an iovar */ + +/* Varid to actionid mapping */ +#define IOV_GVAL(id) ((id)*2) +#define IOV_SVAL(id) (((id)*2)+IOV_SET) +#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) +#define IOV_ID(actionid) (actionid >> 1) + +extern const struct +brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name); +extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, + int len, bool set); + +/* Base type definitions */ +#define IOVT_VOID 0 /* no value (implictly set only) */ +#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */ +#define IOVT_INT8 2 /* integer values are range-checked */ +#define IOVT_UINT8 3 /* unsigned int 8 bits */ +#define IOVT_INT16 4 /* int 16 bits */ +#define IOVT_UINT16 5 /* unsigned int 16 bits */ +#define IOVT_INT32 6 /* int 32 bits */ +#define IOVT_UINT32 7 /* unsigned int 32 bits */ +#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */ +#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) + +/* Initializer for IOV type strings */ +#define BCM_IOV_TYPE_INIT { \ + "void", \ + "bool", \ + "s8", \ + "u8", \ + "s16", \ + "u16", \ + "s32", \ + "u32", \ + "buffer", \ + "" } + +#define BCM_IOVT_IS_INT(type) (\ + (type == IOVT_BOOL) || \ + (type == IOVT_INT8) || \ + (type == IOVT_UINT8) || \ + (type == IOVT_INT16) || \ + (type == IOVT_UINT16) || \ + (type == IOVT_INT32) || \ + (type == IOVT_UINT32)) + +/* ** driver/apps-shared section ** */ + +#define BCME_STRLEN 64 /* Max string length for BCM errors */ + +#ifndef ABS +#define ABS(a) (((a) < 0) ? -(a) : (a)) +#endif /* ABS */ + +#define CEIL(x, y) (((x) + ((y)-1)) / (y)) +#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0) + +/* map physical to virtual I/O */ +#if !defined(CONFIG_MMC_MSM7X00A) +#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), \ + (unsigned long)(size)) +#else +#define REG_MAP(pa, size) (void *)(0) +#endif + +/* register access macros */ +#if defined(BCMSDIO) +#ifdef BRCM_FULLMAC +#include +#endif +#define OSL_WRITE_REG(r, v) \ + (bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v))) +#define OSL_READ_REG(r) \ + (bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))) +#endif + +#if defined(BCMSDIO) +#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op +#define SELECT_BUS_READ(mmap_op, bus_op) bus_op +#else +#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op +#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op +#endif + +/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */ +#define PKTBUFSZ 2048 + +#define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ)) +#ifdef BRCM_FULLMAC +#include /* for vsn/printf's */ +#include /* for mem*, str* */ +#endif + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r) (\ + SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ + readb((volatile u8*)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ + readl((volatile u32*)(r)), OSL_READ_REG(r)) \ +) +#else /* __mips__ */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((volatile u8*)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((volatile u16*)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((volatile u32*)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }), \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + __osl_v = OSL_READ_REG(r); \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + })) \ +) +#endif /* __mips__ */ + +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), (volatile u8*)(r)); break; \ + case sizeof(u16): \ + writew((u16)(v), (volatile u16*)(r)); break; \ + case sizeof(u32): \ + writel((u32)(v), (volatile u32*)(r)); break; \ + }, \ + (OSL_WRITE_REG(r, v))); \ + } while (0) +#else /* __BIG_ENDIAN */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((volatile u8*)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((volatile u16*)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((volatile u32*)(r)); \ + break; \ + } \ + __osl_v; \ + }), \ + OSL_READ_REG(r)) \ +) +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), \ + (volatile u8*)((r)^3)); break; \ + case sizeof(u16): \ + writew((u16)(v), \ + (volatile u16*)((r)^2)); break; \ + case sizeof(u32): \ + writel((u32)(v), \ + (volatile u32*)(r)); break; \ + }, \ + (OSL_WRITE_REG(r, v))); \ + } while (0) +#endif /* __BIG_ENDIAN */ + +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) + +#define SET_REG(r, mask, val) \ + W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + +#ifndef setbit +#ifndef NBBY /* the BSD family defines NBBY */ +#define NBBY 8 /* 8 bits per byte */ +#endif /* #ifndef NBBY */ +#define setbit(a, i) (((u8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY)) +#define clrbit(a, i) (((u8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY))) +#define isset(a, i) (((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) +#define isclr(a, i) ((((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0) +#endif /* setbit */ + +#define NBITS(type) (sizeof(type) * 8) +#define NBITVAL(nbits) (1 << (nbits)) +#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) +#define NBITMASK(nbits) MAXBITVAL(nbits) +#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) + +/* basic mux operation - can be optimized on several architectures */ +#define MUX(pred, true, false) ((pred) ? (true) : (false)) + +/* modulo inc/dec - assumes x E [0, bound - 1] */ +#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) +#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) + +/* modulo inc/dec, bound = 2^k */ +#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) +#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) + +/* modulo add/sub - assumes x, y E [0, bound - 1] */ +#define MODADD(x, y, bound) \ + MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) +#define MODSUB(x, y, bound) \ + MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) + +/* module add/sub, bound = 2^k */ +#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) +#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) + +/* crc defines */ +#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ +#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ +#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ +#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ + +/* brcmu_format_flags() bit description structure */ +struct brcmu_bit_desc { + u32 bit; + const char *name; +}; + +/* tag_ID/length/value_buffer tuple */ +struct brcmu_tlv { + u8 id; + u8 len; + u8 data[1]; +}; + +#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ + +/* crypto utility function */ +/* 128-bit xor: *dst = *src1 xor *src2. dst1, src1 and src2 may have any alignment */ + static inline void + xor_128bit_block(const u8 *src1, const u8 *src2, u8 *dst) { + if ( +#ifdef __i386__ + 1 || +#endif + (((unsigned long) src1 | (unsigned long) src2 | (unsigned long) dst) & + 3) == 0) { + /* ARM CM3 rel time: 1229 (727 if alignment check could be omitted) */ + /* x86 supports unaligned. This version runs 6x-9x faster on x86. */ + ((u32 *) dst)[0] = + ((const u32 *)src1)[0] ^ ((const u32 *) + src2)[0]; + ((u32 *) dst)[1] = + ((const u32 *)src1)[1] ^ ((const u32 *) + src2)[1]; + ((u32 *) dst)[2] = + ((const u32 *)src1)[2] ^ ((const u32 *) + src2)[2]; + ((u32 *) dst)[3] = + ((const u32 *)src1)[3] ^ ((const u32 *) + src2)[3]; + } else { + /* ARM CM3 rel time: 4668 (4191 if alignment check could be omitted) */ + int k; + for (k = 0; k < 16; k++) + dst[k] = src1[k] ^ src2[k]; + } + } + +/* externs */ +/* crc */ +extern u8 brcmu_crc8(u8 *p, uint nbytes, u8 crc); + +/* format/print */ +#if defined(BCMDBG) +extern int brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, + char *buf, int len); +extern int brcmu_format_hex(char *str, const void *bytes, int len); +#endif + +extern char *brcmu_chipname(uint chipid, char *buf, uint len); + +extern struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, + uint key); + +/* multi-bool data type: set of bools, mbool is true if any is set */ + typedef u32 mbool; +#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ +#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ +#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* true if one bool is set */ +#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) + +/* power conversion */ +extern u16 brcmu_qdbm_to_mw(u8 qdbm); +extern u8 brcmu_mw_to_qdbm(u16 mw); + +extern void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size); +extern int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...); + +extern uint brcmu_mkiovar(char *name, char *data, uint datalen, + char *buf, uint len); +extern uint brcmu_bitcount(u8 *bitmap, uint bytelength); + +#endif /* _brcmutils_h_ */ diff --git a/drivers/staging/brcm80211/include/brcmu_wifi.h b/drivers/staging/brcm80211/include/brcmu_wifi.h new file mode 100644 index 0000000..6b12c13 --- /dev/null +++ b/drivers/staging/brcm80211/include/brcmu_wifi.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _brcmu_wifi_h_ +#define _brcmu_wifi_h_ + +#include /* for ETH_ALEN */ +#include /* for WLAN_PMKID_LEN */ + +/* A chanspec holds the channel number, band, bandwidth and control sideband */ +typedef u16 chanspec_t; + +/* channel defines */ +#define CH_UPPER_SB 0x01 +#define CH_LOWER_SB 0x02 +#define CH_EWA_VALID 0x04 +#define CH_20MHZ_APART 4 +#define CH_10MHZ_APART 2 +#define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */ +#define CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ +#define WLC_MAX_2G_CHANNEL CH_MAX_2G_CHANNEL /* legacy define */ +#define MAXCHANNEL 224 /* max # supported channels. The max channel no is 216, + * this is that + 1 rounded up to a multiple of NBBY (8). + * DO NOT MAKE it > 255: channels are u8's all over + */ + +#define WL_CHANSPEC_CHAN_MASK 0x00ff +#define WL_CHANSPEC_CHAN_SHIFT 0 + +#define WL_CHANSPEC_CTL_SB_MASK 0x0300 +#define WL_CHANSPEC_CTL_SB_SHIFT 8 +#define WL_CHANSPEC_CTL_SB_LOWER 0x0100 +#define WL_CHANSPEC_CTL_SB_UPPER 0x0200 +#define WL_CHANSPEC_CTL_SB_NONE 0x0300 + +#define WL_CHANSPEC_BW_MASK 0x0C00 +#define WL_CHANSPEC_BW_SHIFT 10 +#define WL_CHANSPEC_BW_10 0x0400 +#define WL_CHANSPEC_BW_20 0x0800 +#define WL_CHANSPEC_BW_40 0x0C00 + +#define WL_CHANSPEC_BAND_MASK 0xf000 +#define WL_CHANSPEC_BAND_SHIFT 12 +#define WL_CHANSPEC_BAND_5G 0x1000 +#define WL_CHANSPEC_BAND_2G 0x2000 +#define INVCHANSPEC 255 + +/* used to calculate the chan_freq = chan_factor * 500Mhz + 5 * chan_number */ +#define WF_CHAN_FACTOR_2_4_G 4814 /* 2.4 GHz band, 2407 MHz */ +#define WF_CHAN_FACTOR_5_G 10000 /* 5 GHz band, 5000 MHz */ +#define WF_CHAN_FACTOR_4_G 8000 /* 4.9 GHz band for Japan */ + +/* channel defines */ +#define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? ((channel) - CH_10MHZ_APART) : 0) +#define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ + ((channel) + CH_10MHZ_APART) : 0) +#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) +#define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ + WL_CHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \ + WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) +#define NEXT_20MHZ_CHAN(channel) (((channel) < (MAXCHANNEL - CH_20MHZ_APART)) ? \ + ((channel) + CH_20MHZ_APART) : 0) +#define CH40MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | WL_CHANSPEC_BW_40 | \ + ((channel) <= CH_MAX_2G_CHANNEL ? WL_CHANSPEC_BAND_2G : \ + WL_CHANSPEC_BAND_5G)) +#define CHSPEC_CHANNEL(chspec) ((u8)((chspec) & WL_CHANSPEC_CHAN_MASK)) +#define CHSPEC_BAND(chspec) ((chspec) & WL_CHANSPEC_BAND_MASK) + +#ifdef WL11N_20MHZONLY + +#define CHSPEC_CTL_SB(chspec) WL_CHANSPEC_CTL_SB_NONE +#define CHSPEC_BW(chspec) WL_CHANSPEC_BW_20 +#define CHSPEC_IS10(chspec) 0 +#define CHSPEC_IS20(chspec) 1 +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) 0 +#endif + +#else /* !WL11N_20MHZONLY */ + +#define CHSPEC_CTL_SB(chspec) ((chspec) & WL_CHANSPEC_CTL_SB_MASK) +#define CHSPEC_BW(chspec) ((chspec) & WL_CHANSPEC_BW_MASK) +#define CHSPEC_IS10(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_10) +#define CHSPEC_IS20(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_20) +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40) +#endif + +#endif /* !WL11N_20MHZONLY */ + +#define CHSPEC_IS5G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_5G) +#define CHSPEC_IS2G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_2G) +#define CHSPEC_SB_NONE(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_NONE) +#define CHSPEC_SB_UPPER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_UPPER) +#define CHSPEC_SB_LOWER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_LOWER) +#define CHSPEC_CTL_CHAN(chspec) ((CHSPEC_SB_LOWER(chspec)) ? \ + (LOWER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK))) : \ + (UPPER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK)))) +#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) + +#define CHANSPEC_STR_LEN 8 + +/* defined rate in 500kbps */ +#define WLC_MAXRATE 108 /* in 500kbps units */ +#define WLC_RATE_1M 2 /* in 500kbps units */ +#define WLC_RATE_2M 4 /* in 500kbps units */ +#define WLC_RATE_5M5 11 /* in 500kbps units */ +#define WLC_RATE_11M 22 /* in 500kbps units */ +#define WLC_RATE_6M 12 /* in 500kbps units */ +#define WLC_RATE_9M 18 /* in 500kbps units */ +#define WLC_RATE_12M 24 /* in 500kbps units */ +#define WLC_RATE_18M 36 /* in 500kbps units */ +#define WLC_RATE_24M 48 /* in 500kbps units */ +#define WLC_RATE_36M 72 /* in 500kbps units */ +#define WLC_RATE_48M 96 /* in 500kbps units */ +#define WLC_RATE_54M 108 /* in 500kbps units */ + +#define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ + +#define MCSSET_LEN 16 + +#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) + +/* + * Verify the chanspec is using a legal set of parameters, i.e. that the + * chanspec specified a band, bw, ctl_sb and channel and that the + * combination could be legal given any set of circumstances. + * RETURNS: true is the chanspec is malformed, false if it looks good. + */ +extern bool brcmu_chspec_malformed(chanspec_t chanspec); + +/* + * This function returns the channel number that control traffic is being sent on, for legacy + * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ + * sideband depending on the chanspec selected + */ +extern u8 brcmu_chspec_ctlchan(chanspec_t chspec); + +/* + * Return the channel number for a given frequency and base frequency. + * The returned channel number is relative to the given base frequency. + * If the given base frequency is zero, a base frequency of 5 GHz is assumed for + * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. + * + * Frequency is specified in MHz. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for + * 2.4 GHz and 5 GHz bands. + * + * The returned channel will be in the range [1, 14] in the 2.4 GHz band + * and [0, 200] otherwise. + * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the + * frequency is not a 2.4 GHz channel, or if the frequency is not and even + * multiple of 5 MHz from the base frequency to the base plus 1 GHz. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + */ +extern int brcmu_mhz2channel(uint freq, uint start_factor); + +/* Enumerate crypto algorithms */ +#define CRYPTO_ALGO_OFF 0 +#define CRYPTO_ALGO_WEP1 1 +#define CRYPTO_ALGO_TKIP 2 +#define CRYPTO_ALGO_WEP128 3 +#define CRYPTO_ALGO_AES_CCM 4 +#define CRYPTO_ALGO_AES_RESERVED1 5 +#define CRYPTO_ALGO_AES_RESERVED2 6 +#define CRYPTO_ALGO_NALG 7 + +/* wireless security bitvec */ +#define WEP_ENABLED 0x0001 +#define TKIP_ENABLED 0x0002 +#define AES_ENABLED 0x0004 +#define WSEC_SWFLAG 0x0008 +#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ + +/* WPA authentication mode bitvec */ +#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ +#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ +#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ +#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ +#define WPA_AUTH_RESERVED1 0x0008 +#define WPA_AUTH_RESERVED2 0x0010 + /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ +#define WPA2_AUTH_RESERVED1 0x0020 +#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ +#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ +#define WPA2_AUTH_RESERVED3 0x0200 +#define WPA2_AUTH_RESERVED4 0x0400 +#define WPA2_AUTH_RESERVED5 0x0800 + +/* pmkid */ +#define MAXPMKID 16 + +#define DOT11_DEFAULT_RTS_LEN 2347 +#define DOT11_DEFAULT_FRAG_LEN 2346 + +#define DOT11_ICV_AES_LEN 8 +#define DOT11_QOS_LEN 2 +#define DOT11_IV_MAX_LEN 8 +#define DOT11_A4_HDR_LEN 30 + +#define HT_CAP_RX_STBC_NO 0x0 +#define HT_CAP_RX_STBC_ONE_STREAM 0x1 + +typedef struct _pmkid { + u8 BSSID[ETH_ALEN]; + u8 PMKID[WLAN_PMKID_LEN]; +} pmkid_t; + +typedef struct _pmkid_list { + u32 npmkid; + pmkid_t pmkid[1]; +} pmkid_list_t; + +typedef struct _pmkid_cand { + u8 BSSID[ETH_ALEN]; + u8 preauth; +} pmkid_cand_t; + +typedef struct _pmkid_cand_list { + u32 npmkid_cand; + pmkid_cand_t pmkid_cand[1]; +} pmkid_cand_list_t; + +typedef u8 ac_bitmap_t; + +#endif /* _brcmu_wifi_h_ */ diff --git a/drivers/staging/brcm80211/util/Makefile b/drivers/staging/brcm80211/util/Makefile deleted file mode 100644 index f9b36ca..0000000 --- a/drivers/staging/brcm80211/util/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -# -# Makefile fragment for Broadcom 802.11n Networking Device Driver Utilities -# -# Copyright (c) 2011 Broadcom Corporation -# -# Permission to use, copy, modify, and/or distribute this software for any -# purpose with or without fee is hereby granted, provided that the above -# copyright notice and this permission notice appear in all copies. -# -# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY -# SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION -# OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN -# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - -ccflags-y := \ - -Idrivers/staging/brcm80211/util \ - -Idrivers/staging/brcm80211/include - -BRCMUTIL_OFILES := \ - bcmutils.o \ - bcmwifi.o - -MODULEPFX := brcmutil - -obj-$(CONFIG_BRCMUTIL) += $(MODULEPFX).o -$(MODULEPFX)-objs = $(BRCMUTIL_OFILES) diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/util/bcmutils.c deleted file mode 100644 index eb55ce4..0000000 --- a/drivers/staging/brcm80211/util/bcmutils.c +++ /dev/null @@ -1,797 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -MODULE_AUTHOR("Broadcom Corporation"); -MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); -MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); -MODULE_LICENSE("Dual BSD/GPL"); - -struct sk_buff *brcmu_pkt_buf_get_skb(uint len) -{ - struct sk_buff *skb; - - skb = dev_alloc_skb(len); - if (skb) { - skb_put(skb, len); - skb->priority = 0; - } - - return skb; -} -EXPORT_SYMBOL(brcmu_pkt_buf_get_skb); - -/* Free the driver packet. Free the tag if present */ -void brcmu_pkt_buf_free_skb(struct sk_buff *skb) -{ - struct sk_buff *nskb; - int nest = 0; - - /* perversion: we use skb->next to chain multi-skb packets */ - while (skb) { - nskb = skb->next; - skb->next = NULL; - - if (skb->destructor) - /* cannot kfree_skb() on hard IRQ (net/core/skbuff.c) if - * destructor exists - */ - dev_kfree_skb_any(skb); - else - /* can free immediately (even in_irq()) if destructor - * does not exist - */ - dev_kfree_skb(skb); - - nest++; - skb = nskb; - } -} -EXPORT_SYMBOL(brcmu_pkt_buf_free_skb); - - -/* copy a buffer into a pkt buffer chain */ -uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len, - unsigned char *buf) -{ - uint n, ret = 0; - - /* skip 'offset' bytes */ - for (; p && offset; p = p->next) { - if (offset < (uint) (p->len)) - break; - offset -= p->len; - } - - if (!p) - return 0; - - /* copy the data */ - for (; p && len; p = p->next) { - n = min((uint) (p->len) - offset, (uint) len); - memcpy(p->data + offset, buf, n); - buf += n; - len -= n; - ret += n; - offset = 0; - } - - return ret; -} -EXPORT_SYMBOL(brcmu_pktfrombuf); - -/* return total length of buffer chain */ -uint brcmu_pkttotlen(struct sk_buff *p) -{ - uint total; - - total = 0; - for (; p; p = p->next) - total += p->len; - return total; -} -EXPORT_SYMBOL(brcmu_pkttotlen); - -/* - * osl multiple-precedence packet queue - * hi_prec is always >= the number of the highest non-empty precedence - */ -struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, - struct sk_buff *p) -{ - struct pktq_prec *q; - - if (pktq_full(pq) || pktq_pfull(pq, prec)) - return NULL; - - q = &pq->q[prec]; - - if (q->head) - q->tail->prev = p; - else - q->head = p; - - q->tail = p; - q->len++; - - pq->len++; - - if (pq->hi_prec < prec) - pq->hi_prec = (u8) prec; - - return p; -} -EXPORT_SYMBOL(brcmu_pktq_penq); - -struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, - struct sk_buff *p) -{ - struct pktq_prec *q; - - if (pktq_full(pq) || pktq_pfull(pq, prec)) - return NULL; - - q = &pq->q[prec]; - - if (q->head == NULL) - q->tail = p; - - p->prev = q->head; - q->head = p; - q->len++; - - pq->len++; - - if (pq->hi_prec < prec) - pq->hi_prec = (u8) prec; - - return p; -} -EXPORT_SYMBOL(brcmu_pktq_penq_head); - -struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec) -{ - struct pktq_prec *q; - struct sk_buff *p; - - q = &pq->q[prec]; - - p = q->head; - if (p == NULL) - return NULL; - - q->head = p->prev; - if (q->head == NULL) - q->tail = NULL; - - q->len--; - - pq->len--; - - p->prev = NULL; - - return p; -} -EXPORT_SYMBOL(brcmu_pktq_pdeq); - -struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec) -{ - struct pktq_prec *q; - struct sk_buff *p, *prev; - - q = &pq->q[prec]; - - p = q->head; - if (p == NULL) - return NULL; - - for (prev = NULL; p != q->tail; p = p->prev) - prev = p; - - if (prev) - prev->prev = NULL; - else - q->head = NULL; - - q->tail = prev; - q->len--; - - pq->len--; - - return p; -} -EXPORT_SYMBOL(brcmu_pktq_pdeq_tail); - -void -brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir, - ifpkt_cb_t fn, void *arg) -{ - struct pktq_prec *q; - struct sk_buff *p, *prev = NULL; - - q = &pq->q[prec]; - p = q->head; - while (p) { - if (fn == NULL || (*fn) (p, arg)) { - bool head = (p == q->head); - if (head) - q->head = p->prev; - else - prev->prev = p->prev; - p->prev = NULL; - brcmu_pkt_buf_free_skb(p); - q->len--; - pq->len--; - p = (head ? q->head : prev->prev); - } else { - prev = p; - p = p->prev; - } - } - - if (q->head == NULL) { - q->tail = NULL; - } -} -EXPORT_SYMBOL(brcmu_pktq_pflush); - -void brcmu_pktq_flush(struct pktq *pq, bool dir, - ifpkt_cb_t fn, void *arg) -{ - int prec; - for (prec = 0; prec < pq->num_prec; prec++) - brcmu_pktq_pflush(pq, prec, dir, fn, arg); -} -EXPORT_SYMBOL(brcmu_pktq_flush); - -void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len) -{ - int prec; - - /* pq is variable size; only zero out what's requested */ - memset(pq, 0, - offsetof(struct pktq, q) + (sizeof(struct pktq_prec) * num_prec)); - - pq->num_prec = (u16) num_prec; - - pq->max = (u16) max_len; - - for (prec = 0; prec < num_prec; prec++) - pq->q[prec].max = pq->max; -} -EXPORT_SYMBOL(brcmu_pktq_init); - -struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out) -{ - int prec; - - if (pq->len == 0) - return NULL; - - for (prec = 0; prec < pq->hi_prec; prec++) - if (pq->q[prec].head) - break; - - if (prec_out) - *prec_out = prec; - - return pq->q[prec].tail; -} -EXPORT_SYMBOL(brcmu_pktq_peek_tail); - -/* Return sum of lengths of a specific set of precedences */ -int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp) -{ - int prec, len; - - len = 0; - - for (prec = 0; prec <= pq->hi_prec; prec++) - if (prec_bmp & (1 << prec)) - len += pq->q[prec].len; - - return len; -} -EXPORT_SYMBOL(brcmu_pktq_mlen); - -/* Priority dequeue from a specific set of precedences */ -struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, - int *prec_out) -{ - struct pktq_prec *q; - struct sk_buff *p; - int prec; - - if (pq->len == 0) - return NULL; - - while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) - pq->hi_prec--; - - while ((prec_bmp & (1 << prec)) == 0 || pq->q[prec].head == NULL) - if (prec-- == 0) - return NULL; - - q = &pq->q[prec]; - - p = q->head; - if (p == NULL) - return NULL; - - q->head = p->prev; - if (q->head == NULL) - q->tail = NULL; - - q->len--; - - if (prec_out) - *prec_out = prec; - - pq->len--; - - p->prev = NULL; - - return p; -} -EXPORT_SYMBOL(brcmu_pktq_mdeq); - -/* parse a xx:xx:xx:xx:xx:xx format ethernet address */ -int brcmu_ether_atoe(char *p, u8 *ea) -{ - int i = 0; - - for (;;) { - ea[i++] = (char)simple_strtoul(p, &p, 16); - if (!*p++ || i == 6) - break; - } - - return i == 6; -} -EXPORT_SYMBOL(brcmu_ether_atoe); - -#if defined(BCMDBG) -/* pretty hex print a pkt buffer chain */ -void brcmu_prpkt(const char *msg, struct sk_buff *p0) -{ - struct sk_buff *p; - - if (msg && (msg[0] != '\0')) - printk(KERN_DEBUG "%s:\n", msg); - - for (p = p0; p; p = p->next) - print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, p->data, p->len); -} -EXPORT_SYMBOL(brcmu_prpkt); -#endif /* defined(BCMDBG) */ - -/* iovar table lookup */ -const struct brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, - const char *name) -{ - const struct brcmu_iovar *vi; - const char *lookup_name; - - /* skip any ':' delimited option prefixes */ - lookup_name = strrchr(name, ':'); - if (lookup_name != NULL) - lookup_name++; - else - lookup_name = name; - - for (vi = table; vi->name; vi++) { - if (!strcmp(vi->name, lookup_name)) - return vi; - } - /* ran to end of table */ - - return NULL; /* var name not found */ -} -EXPORT_SYMBOL(brcmu_iovar_lookup); - -int brcmu_iovar_lencheck(const struct brcmu_iovar *vi, void *arg, int len, - bool set) -{ - int bcmerror = 0; - - /* length check on io buf */ - switch (vi->type) { - case IOVT_BOOL: - case IOVT_INT8: - case IOVT_INT16: - case IOVT_INT32: - case IOVT_UINT8: - case IOVT_UINT16: - case IOVT_UINT32: - /* all integers are s32 sized args at the ioctl interface */ - if (len < (int)sizeof(int)) { - bcmerror = -EOVERFLOW; - } - break; - - case IOVT_BUFFER: - /* buffer must meet minimum length requirement */ - if (len < vi->minlen) { - bcmerror = -EOVERFLOW; - } - break; - - case IOVT_VOID: - if (!set) { - /* Cannot return nil... */ - bcmerror = -ENOTSUPP; - } else if (len) { - /* Set is an action w/o parameters */ - bcmerror = -ENOBUFS; - } - break; - - default: - /* unknown type for length check in iovar info */ - bcmerror = -ENOTSUPP; - } - - return bcmerror; -} -EXPORT_SYMBOL(brcmu_iovar_lencheck); - -/******************************************************************************* - * crc8 - * - * Computes a crc8 over the input data using the polynomial: - * - * x^8 + x^7 +x^6 + x^4 + x^2 + 1 - * - * The caller provides the initial value (either CRC8_INIT_VALUE - * or the previous returned value) to allow for processing of - * discontiguous blocks of data. When generating the CRC the - * caller is responsible for complementing the final return value - * and inserting it into the byte stream. When checking, a final - * return value of CRC8_GOOD_VALUE indicates a valid CRC. - * - * Reference: Dallas Semiconductor Application Note 27 - * Williams, Ross N., "A Painless Guide to CRC Error Detection Algorithms", - * ver 3, Aug 1993, ross@guest.adelaide.edu.au, Rocksoft Pty Ltd., - * ftp://ftp.rocksoft.com/clients/rocksoft/papers/crc_v3.txt - * - * **************************************************************************** - */ - -static const u8 crc8_table[256] = { - 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, - 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, - 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, - 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, - 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, - 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, - 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, - 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, - 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, - 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, - 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, - 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, - 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, - 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, - 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, - 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, - 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, - 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, - 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, - 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, - 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, - 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, - 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, - 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, - 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, - 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, - 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, - 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, - 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, - 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, - 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, - 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F -}; - -u8 brcmu_crc8(u8 *pdata, /* pointer to array of data to process */ - uint nbytes, /* number of input data bytes to process */ - u8 crc /* either CRC8_INIT_VALUE or previous return value */ - ) { - /* loop over the buffer data */ - while (nbytes-- > 0) - crc = crc8_table[(crc ^ *pdata++) & 0xff]; - - return crc; -} -EXPORT_SYMBOL(brcmu_crc8); - -/* - * Traverse a string of 1-byte tag/1-byte length/variable-length value - * triples, returning a pointer to the substring whose first element - * matches tag - */ -struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, uint key) -{ - struct brcmu_tlv *elt; - int totlen; - - elt = (struct brcmu_tlv *) buf; - totlen = buflen; - - /* find tagged parameter */ - while (totlen >= 2) { - int len = elt->len; - - /* validate remaining totlen */ - if ((elt->id == key) && (totlen >= (len + 2))) - return elt; - - elt = (struct brcmu_tlv *) ((u8 *) elt + (len + 2)); - totlen -= (len + 2); - } - - return NULL; -} -EXPORT_SYMBOL(brcmu_parse_tlvs); - - -#if defined(BCMDBG) -int -brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, char *buf, - int len) -{ - int i; - char *p = buf; - char hexstr[16]; - int slen = 0, nlen = 0; - u32 bit; - const char *name; - - if (len < 2 || !buf) - return 0; - - buf[0] = '\0'; - - for (i = 0; flags != 0; i++) { - bit = bd[i].bit; - name = bd[i].name; - if (bit == 0 && flags != 0) { - /* print any unnamed bits */ - snprintf(hexstr, 16, "0x%X", flags); - name = hexstr; - flags = 0; /* exit loop */ - } else if ((flags & bit) == 0) - continue; - flags &= ~bit; - nlen = strlen(name); - slen += nlen; - /* count btwn flag space */ - if (flags != 0) - slen += 1; - /* need NULL char as well */ - if (len <= slen) - break; - /* copy NULL char but don't count it */ - strncpy(p, name, nlen + 1); - p += nlen; - /* copy btwn flag space and NULL char */ - if (flags != 0) - p += snprintf(p, 2, " "); - len -= slen; - } - - /* indicate the str was too short */ - if (flags != 0) { - if (len < 2) - p -= 2 - len; /* overwrite last char */ - p += snprintf(p, 2, ">"); - } - - return (int)(p - buf); -} -EXPORT_SYMBOL(brcmu_format_flags); - -/* print bytes formatted as hex to a string. return the resulting string length */ -int brcmu_format_hex(char *str, const void *bytes, int len) -{ - int i; - char *p = str; - const u8 *src = (const u8 *)bytes; - - for (i = 0; i < len; i++) { - p += snprintf(p, 3, "%02X", *src); - src++; - } - return (int)(p - str); -} -EXPORT_SYMBOL(brcmu_format_hex); -#endif /* defined(BCMDBG) */ - -char *brcmu_chipname(uint chipid, char *buf, uint len) -{ - const char *fmt; - - fmt = ((chipid > 0xa000) || (chipid < 0x4000)) ? "%d" : "%x"; - snprintf(buf, len, fmt, chipid); - return buf; -} -EXPORT_SYMBOL(brcmu_chipname); - -uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) -{ - uint len; - - len = strlen(name) + 1; - - if ((len + datalen) > buflen) - return 0; - - strncpy(buf, name, buflen); - - /* append data onto the end of the name string */ - memcpy(&buf[len], data, datalen); - len += datalen; - - return len; -} -EXPORT_SYMBOL(brcmu_mkiovar); - -/* Quarter dBm units to mW - * Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153 - * Table is offset so the last entry is largest mW value that fits in - * a u16. - */ - -#define QDBM_OFFSET 153 /* Offset for first entry */ -#define QDBM_TABLE_LEN 40 /* Table size */ - -/* Smallest mW value that will round up to the first table entry, QDBM_OFFSET. - * Value is ( mW(QDBM_OFFSET - 1) + mW(QDBM_OFFSET) ) / 2 - */ -#define QDBM_TABLE_LOW_BOUND 6493 /* Low bound */ - -/* Largest mW value that will round down to the last table entry, - * QDBM_OFFSET + QDBM_TABLE_LEN-1. - * Value is ( mW(QDBM_OFFSET + QDBM_TABLE_LEN - 1) + - * mW(QDBM_OFFSET + QDBM_TABLE_LEN) ) / 2. - */ -#define QDBM_TABLE_HIGH_BOUND 64938 /* High bound */ - -static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { -/* qdBm: +0 +1 +2 +3 +4 +5 +6 +7 */ -/* 153: */ 6683, 7079, 7499, 7943, 8414, 8913, 9441, 10000, -/* 161: */ 10593, 11220, 11885, 12589, 13335, 14125, 14962, 15849, -/* 169: */ 16788, 17783, 18836, 19953, 21135, 22387, 23714, 25119, -/* 177: */ 26607, 28184, 29854, 31623, 33497, 35481, 37584, 39811, -/* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096 -}; - -u16 brcmu_qdbm_to_mw(u8 qdbm) -{ - uint factor = 1; - int idx = qdbm - QDBM_OFFSET; - - if (idx >= QDBM_TABLE_LEN) { - /* clamp to max u16 mW value */ - return 0xFFFF; - } - - /* scale the qdBm index up to the range of the table 0-40 - * where an offset of 40 qdBm equals a factor of 10 mW. - */ - while (idx < 0) { - idx += 40; - factor *= 10; - } - - /* return the mW value scaled down to the correct factor of 10, - * adding in factor/2 to get proper rounding. - */ - return (nqdBm_to_mW_map[idx] + factor / 2) / factor; -} -EXPORT_SYMBOL(brcmu_qdbm_to_mw); - -u8 brcmu_mw_to_qdbm(u16 mw) -{ - u8 qdbm; - int offset; - uint mw_uint = mw; - uint boundary; - - /* handle boundary case */ - if (mw_uint <= 1) - return 0; - - offset = QDBM_OFFSET; - - /* move mw into the range of the table */ - while (mw_uint < QDBM_TABLE_LOW_BOUND) { - mw_uint *= 10; - offset -= 40; - } - - for (qdbm = 0; qdbm < QDBM_TABLE_LEN - 1; qdbm++) { - boundary = nqdBm_to_mW_map[qdbm] + (nqdBm_to_mW_map[qdbm + 1] - - nqdBm_to_mW_map[qdbm]) / 2; - if (mw_uint < boundary) - break; - } - - qdbm += (u8) offset; - - return qdbm; -} -EXPORT_SYMBOL(brcmu_mw_to_qdbm); - -uint brcmu_bitcount(u8 *bitmap, uint length) -{ - uint bitcount = 0, i; - u8 tmp; - for (i = 0; i < length; i++) { - tmp = bitmap[i]; - while (tmp) { - bitcount++; - tmp &= (tmp - 1); - } - } - return bitcount; -} -EXPORT_SYMBOL(brcmu_bitcount); - -/* Initialization of brcmu_strbuf structure */ -void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size) -{ - b->origsize = b->size = size; - b->origbuf = b->buf = buf; -} -EXPORT_SYMBOL(brcmu_binit); - -/* Buffer sprintf wrapper to guard against buffer overflow */ -int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...) -{ - va_list ap; - int r; - - va_start(ap, fmt); - r = vsnprintf(b->buf, b->size, fmt, ap); - - /* Non Ansi C99 compliant returns -1, - * Ansi compliant return r >= b->size, - * stdlib returns 0, handle all - */ - if ((r == -1) || (r >= (int)b->size) || (r == 0)) { - b->size = 0; - } else { - b->size -= r; - b->buf += r; - } - - va_end(ap); - - return r; -} -EXPORT_SYMBOL(brcmu_bprintf); diff --git a/drivers/staging/brcm80211/util/bcmwifi.c b/drivers/staging/brcm80211/util/bcmwifi.c deleted file mode 100644 index 207cb8b..0000000 --- a/drivers/staging/brcm80211/util/bcmwifi.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include -#include -#include -#include -#include - -/* - * Verify the chanspec is using a legal set of parameters, i.e. that the - * chanspec specified a band, bw, ctl_sb and channel and that the - * combination could be legal given any set of circumstances. - * RETURNS: true is the chanspec is malformed, false if it looks good. - */ -bool brcmu_chspec_malformed(chanspec_t chanspec) -{ - /* must be 2G or 5G band */ - if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) - return true; - /* must be 20 or 40 bandwidth */ - if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) - return true; - - /* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */ - if (CHSPEC_IS20(chanspec)) { - if (!CHSPEC_SB_NONE(chanspec)) - return true; - } else { - if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) - return true; - } - - return false; -} -EXPORT_SYMBOL(brcmu_chspec_malformed); - -/* - * This function returns the channel number that control traffic is being sent on, for legacy - * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ - * sideband depending on the chanspec selected - */ -u8 brcmu_chspec_ctlchan(chanspec_t chspec) -{ - u8 ctl_chan; - - /* Is there a sideband ? */ - if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { - return CHSPEC_CHANNEL(chspec); - } else { - /* we only support 40MHZ with sidebands */ - /* chanspec channel holds the centre frequency, use that and the - * side band information to reconstruct the control channel number - */ - if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { - /* control chan is the upper 20 MHZ SB of the 40MHZ channel */ - ctl_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); - } else { - /* control chan is the lower 20 MHZ SB of the 40MHZ channel */ - ctl_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); - } - } - - return ctl_chan; -} -EXPORT_SYMBOL(brcmu_chspec_ctlchan); - -/* - * Return the channel number for a given frequency and base frequency. - * The returned channel number is relative to the given base frequency. - * If the given base frequency is zero, a base frequency of 5 GHz is assumed for - * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. - * - * Frequency is specified in MHz. - * The base frequency is specified as (start_factor * 500 kHz). - * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for - * 2.4 GHz and 5 GHz bands. - * - * The returned channel will be in the range [1, 14] in the 2.4 GHz band - * and [0, 200] otherwise. - * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the - * frequency is not a 2.4 GHz channel, or if the frequency is not and even - * multiple of 5 MHz from the base frequency to the base plus 1 GHz. - * - * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 - */ -int brcmu_mhz2channel(uint freq, uint start_factor) -{ - int ch = -1; - uint base; - int offset; - - /* take the default channel start frequency */ - if (start_factor == 0) { - if (freq >= 2400 && freq <= 2500) - start_factor = WF_CHAN_FACTOR_2_4_G; - else if (freq >= 5000 && freq <= 6000) - start_factor = WF_CHAN_FACTOR_5_G; - } - - if (freq == 2484 && start_factor == WF_CHAN_FACTOR_2_4_G) - return 14; - - base = start_factor / 2; - - /* check that the frequency is in 1GHz range of the base */ - if ((freq < base) || (freq > base + 1000)) - return -1; - - offset = freq - base; - ch = offset / 5; - - /* check that frequency is a 5MHz multiple from the base */ - if (offset != (ch * 5)) - return -1; - - /* restricted channel range check for 2.4G */ - if (start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 13)) - return -1; - - return ch; -} -EXPORT_SYMBOL(brcmu_mhz2channel); - -- cgit v0.10.2 From d794fec0a9546f705980750f96df4bead15a15a0 Mon Sep 17 00:00:00 2001 From: Arend van Spriel Date: Wed, 1 Jun 2011 13:45:53 +0200 Subject: staging: brcm80211: remove nvram related source files nvram.c is intended for devices with configuration stored in flash. This is not required for the softmac driver nor the fullmac driver so it has been removed. Signed-off-by: Arend van Spriel Reviewed-by: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index c6b5128..1b2afa9 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -50,8 +50,7 @@ BRCMSMAC_OFILES := \ bcmotp.o \ bcmsrom.o \ dma.o \ - nicpci.o \ - nvram.o + nicpci.o MODULEPFX := brcmsmac diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index b00cda9..bc1c52d 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -28,9 +28,10 @@ /* ********** from siutils.c *********** */ #include -#include #include #include +#include +#include /* slow_clk_ctl */ #define SCC_SS_MASK 0x00000007 /* slow clock source mask */ @@ -985,9 +986,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, udelay(10); } - /* Init nvram from flash if it exists */ - nvram_init(); - /* Init nvram from sprom/otp if they exist */ if (srom_var_init (&sii->pub, bustype, regs, vars, varsz)) { @@ -1096,8 +1094,6 @@ void ai_detach(struct si_pub *sih) sii->regs[idx] = NULL; } - nvram_exit(); /* free up nvram buffers */ - if (sih->bustype == PCI_BUS) { if (sii->pch) pcicore_deinit(sii->pch); diff --git a/drivers/staging/brcm80211/brcmsmac/bcmnvram.h b/drivers/staging/brcm80211/brcmsmac/bcmnvram.h deleted file mode 100644 index bc62695..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmnvram.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmnvram_h_ -#define _bcmnvram_h_ - -#include - -struct nvram_header { - u32 magic; - u32 len; - u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */ - u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */ - u32 config_ncdl; /* ncdl values for memc */ -}; - -/* - * Initialize NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern int nvram_init(void); - -/* - * Append a chunk of nvram variables to the global list - */ -extern int nvram_append(char *vars, uint varsz); - -/* - * Check for reset button press for restoring factory defaults. - */ -extern int nvram_reset(void); - -/* - * Disable NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern void nvram_exit(void); - -/* - * Get the value of an NVRAM variable. The pointer returned may be - * invalid after a set. - * @param name name of variable to get - * @return value of variable or NULL if undefined - */ -extern char *nvram_get(const char *name); - -/* - * Get the value of an NVRAM variable. - * @param name name of variable to get - * @return value of variable or NUL if undefined - */ -#define nvram_safe_get(name) (nvram_get(name) ? : "") - -/* - * Match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is string equal - * to match or false otherwise - */ -static inline int nvram_match(char *name, char *match) -{ - const char *value = nvram_get(name); - return value && !strcmp(value, match); -} - -/* - * Inversely match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is not string - * equal to invmatch or false otherwise - */ -static inline int nvram_invmatch(char *name, char *invmatch) -{ - const char *value = nvram_get(name); - return value && strcmp(value, invmatch); -} - -/* - * Set the value of an NVRAM variable. The name and value strings are - * copied into private storage. Pointers to previously set values - * may become invalid. The new value may be immediately - * retrieved but will not be permanently stored until a commit. - * @param name name of variable to set - * @param value value of variable - * @return 0 on success and errno on failure - */ -extern int nvram_set(const char *name, const char *value); - -/* - * Unset an NVRAM variable. Pointers to previously set values - * remain valid until a set. - * @param name name of variable to unset - * @return 0 on success and errno on failure - * NOTE: use nvram_commit to commit this change to flash. - */ -extern int nvram_unset(const char *name); - -/* - * Commit NVRAM variables to permanent storage. All pointers to values - * may be invalid after a commit. - * NVRAM values are undefined after a commit. - * @return 0 on success and errno on failure - */ -extern int nvram_commit(void); - -/* - * Get all NVRAM variables (format name=value\0 ... \0\0). - * @param buf buffer to store variables - * @param count size of buffer in bytes - * @return 0 on success and errno on failure - */ -extern int nvram_getall(char *nvram_buf, int count); - -/* variable access */ -extern char *getvar(char *vars, const char *name); -extern int getintvar(char *vars, const char *name); - -/* The NVRAM version number stored as an NVRAM variable */ -#define NVRAM_SOFTWARE_VERSION "1" - -#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ -#define NVRAM_CLEAR_MAGIC 0x0 -#define NVRAM_INVALID_MAGIC 0xFFFFFFFF -#define NVRAM_VERSION 1 -#define NVRAM_HEADER_SIZE 20 -#define NVRAM_SPACE 0x8000 - -#define NVRAM_MAX_VALUE_LEN 255 -#define NVRAM_MAX_PARAM_LEN 64 - -#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */ -#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */ - -#endif /* _bcmnvram_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c index 70b7ab7..8b22add 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c @@ -28,8 +28,6 @@ #include #include #include - -#include #include #define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ @@ -780,12 +778,9 @@ static const sromvar_t perpath_pci_sromvars[] = { {NULL, 0, 0, 0, 0} }; -static int initvars_srom_si(struct si_pub *sih, void *curmap, char **vars, - uint *count); static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, uint *count); -static int initvars_flash_si(struct si_pub *sih, char **vars, uint *count); static int sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, u16 *buf, uint nwords, bool check_crc); #if defined(BCMNVRAMR) @@ -796,8 +791,6 @@ static u16 srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, static int initvars_table(char *start, char *end, char **vars, uint *count); -static int initvars_flash(struct si_pub *sih, char **vp, - uint len); /* Initialization of varbuf structure */ static void varbuf_init(varbuf_t *b, char *buf, uint size) @@ -877,20 +870,9 @@ int srom_var_init(struct si_pub *sih, uint bustype, void *curmap, *vars = NULL; *count = 0; - switch (bustype) { - case SI_BUS: - case JTAG_BUS: - return initvars_srom_si(sih, curmap, vars, count); - - case PCI_BUS: - if (curmap == NULL) - return -1; - + if (curmap != NULL && bustype == PCI_BUS) return initvars_srom_pci(sih, curmap, vars, count); - default: - break; - } return -1; } @@ -1063,87 +1045,6 @@ static int initvars_table(char *start, char *end, return 0; } -/* - * Find variables with from flash. 'base' points to the beginning - * of the table upon enter and to the end of the table upon exit when success. - * Return 0 on success, nonzero on error. - */ -static int initvars_flash(struct si_pub *sih, char **base, uint len) -{ - char *vp = *base; - char *flash; - int err; - char *s; - uint l, dl, copy_len; - char devpath[SI_DEVPATH_BUFSZ]; - - /* allocate memory and read in flash */ - flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC); - if (!flash) - return -ENOMEM; - err = nvram_getall(flash, NVRAM_SPACE); - if (err) - goto exit; - - ai_devpath(sih, devpath, sizeof(devpath)); - - /* grab vars with the prefix in name */ - dl = strlen(devpath); - for (s = flash; s && *s; s += l + 1) { - l = strlen(s); - - /* skip non-matching variable */ - if (strncmp(s, devpath, dl)) - continue; - - /* is there enough room to copy? */ - copy_len = l - dl + 1; - if (len < copy_len) { - err = -EOVERFLOW; - goto exit; - } - - /* no prefix, just the name=value */ - strncpy(vp, &s[dl], copy_len); - vp += copy_len; - len -= copy_len; - } - - /* add null string as terminator */ - if (len < 1) { - err = -EOVERFLOW; - goto exit; - } - *vp++ = '\0'; - - *base = vp; - - exit: kfree(flash); - return err; -} - -/* - * Initialize nonvolatile variable table from flash. - * Return 0 on success, nonzero on error. - */ -static int initvars_flash_si(struct si_pub *sih, char **vars, uint *count) -{ - char *vp, *base; - int err; - - base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); - if (!vp) - return -ENOMEM; - - err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS); - if (err == 0) - err = initvars_table(base, vp, vars, count); - - kfree(base); - - return err; -} - /* Parse SROM and create name=value pairs. 'srom' points to * the SROM word array. 'off' specifies the offset of the * first word 'srom' points to, which should be either 0 or @@ -1405,20 +1306,12 @@ static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, goto errout; } - base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); - if (!vp) { + base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); + if (!base) { err = -2; goto errout; } - /* read variables from flash */ - if (flash) { - err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS); - if (err) - goto errout; - goto varsdone; - } - varbuf_init(&b, base, MAXSZ_NVRAM_VARS); /* parse SROM into name=value pairs. */ @@ -1428,8 +1321,7 @@ static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, vp = b.buf; *vp++ = '\0'; - varsdone: - err = initvars_table(base, vp, vars, count); + err = initvars_table(base, vp, vars, count); errout: if (base) @@ -1438,11 +1330,3 @@ static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, kfree(srom); return err; } - - -static int initvars_srom_si(struct si_pub *sih, void *curmap, char **vars, - uint *varsz) -{ - /* Search flash nvram section for srom variables */ - return initvars_flash_si(sih, vars, varsz); -} diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c index 509cf2b..6449743 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include "bcmdma.h" @@ -1297,26 +1296,8 @@ static int __init brcms_module_init(void) #ifdef BCMDBG if (msglevel != 0xdeadbeef) brcm_msg_level = msglevel; - else { - char *var = getvar(NULL, "wl_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - brcm_msg_level = value; - } - } if (phymsglevel != 0xdeadbeef) phyhal_msg_level = phymsglevel; - else { - char *var = getvar(NULL, "phy_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - phyhal_msg_level = value; - } - } #endif /* BCMDBG */ error = pci_register_driver(&brcms_pci_driver); diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 868fba2..6e61ca1 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -19,11 +19,12 @@ #include #include #include -#include #include #include #include #include +#include +#include #include /* SPROM offsets */ diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c deleted file mode 100644 index 3509469..0000000 --- a/drivers/staging/brcm80211/brcmsmac/nvram.c +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define NVR_MSG(x) - -typedef struct _vars { - struct _vars *next; - int bufsz; /* allocated size */ - int size; /* actual vars size */ - char *vars; -} vars_t; - -#define VARS_T_OH sizeof(vars_t) - -static vars_t *vars; - -#define NVRAM_FILE 1 - -static char *findvar(char *vars, char *lim, const char *name); - -int nvram_init(void) -{ - - /* Make sure we read nvram in flash just once before freeing the memory */ - if (vars != NULL) { - NVR_MSG(("nvram_init: called again without calling nvram_exit()\n")); - return 0; - } - return 0; -} - -int nvram_append(char *varlst, uint varsz) -{ - uint bufsz = VARS_T_OH; - vars_t *new; - - new = kmalloc(bufsz, GFP_ATOMIC); - if (new == NULL) - return -ENOMEM; - - new->vars = varlst; - new->bufsz = bufsz; - new->size = varsz; - new->next = vars; - vars = new; - - return 0; -} - -void nvram_exit(void) -{ - vars_t *this, *next; - - this = vars; - if (this) - kfree(this->vars); - - while (this) { - next = this->next; - kfree(this); - this = next; - } - vars = NULL; -} - -static char *findvar(char *vars, char *lim, const char *name) -{ - char *s; - int len; - - len = strlen(name); - - for (s = vars; (s < lim) && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - - return NULL; -} - -/* - * Search the name=value vars for a specific one and return its value. - * Returns NULL if not found. - */ -char *getvar(char *vars, const char *name) -{ - char *s; - int len; - - if (!name) - return NULL; - - len = strlen(name); - if (len == 0) - return NULL; - - /* first look in vars[] */ - for (s = vars; s && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - /* then query nvram */ - return nvram_get(name); -} - -/* - * Search the vars for a specific one and return its value as - * an integer. Returns 0 if not found. - */ -int getintvar(char *vars, const char *name) -{ - char *val; - - val = getvar(vars, name); - if (val == NULL) - return 0; - - return simple_strtoul(val, NULL, 0); -} - -char *nvram_get(const char *name) -{ - char *v = NULL; - vars_t *cur; - - for (cur = vars; cur; cur = cur->next) { - v = findvar(cur->vars, cur->vars + cur->size, name); - if (v) - break; - } - - return v; -} - -int nvram_set(const char *name, const char *value) -{ - return 0; -} - -int nvram_unset(const char *name) -{ - return 0; -} - -int nvram_reset(void) -{ - return 0; -} - -int nvram_commit(void) -{ - return 0; -} - -int nvram_getall(char *buf, int count) -{ - int len, resid = count; - vars_t *this; - - this = vars; - while (this) { - char *from, *lim, *to; - int acc; - - from = this->vars; - lim = (char *)(this->vars + this->size); - to = buf; - acc = 0; - while ((from < lim) && (*from)) { - len = strlen(from) + 1; - if (resid < (acc + len)) - return -EOVERFLOW; - memcpy(to, from, len); - acc += len; - from += len; - to += len; - } - - resid -= acc; - buf += acc; - this = this->next; - } - if (resid < 1) - return -EOVERFLOW; - *buf = '\0'; - return 0; -} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c index 8045c39..b2866de 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c @@ -24,7 +24,6 @@ #include #include -#include #include #include #include "bcmdma.h" @@ -173,7 +172,7 @@ char *phy_getvar(phy_info_t *pi, const char *name) ; } - return nvram_get(name); + return NULL; } int phy_getintvar(phy_info_t *pi, const char *name) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c index 1011ca5..a3655ca 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c @@ -20,9 +20,11 @@ #include #include #include +#include #include #include -#include +#include +#include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c index 10b9b79..275369a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c @@ -22,7 +22,6 @@ #include #include -#include #include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c index d23dd11..06d03b6 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c index c4fcb44..9897123 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c @@ -21,7 +21,6 @@ #include #include -#include #include #include "bcmdma.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c index 752f0d1..7c86abc 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include "bcmdma.h" @@ -5993,3 +5992,46 @@ int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr) } return err; } + +/* + * Search the name=value vars for a specific one and return its value. + * Returns NULL if not found. + */ +char *getvar(char *vars, const char *name) +{ + char *s; + int len; + + if (!name) + return NULL; + + len = strlen(name); + if (len == 0) + return NULL; + + /* first look in vars[] */ + for (s = vars; s && *s;) { + if ((memcmp(s, name, len) == 0) && (s[len] == '=')) + return &s[len + 1]; + + while (*s++) + ; + } + /* nothing found */ + return NULL; +} + +/* + * Search the vars for a specific one and return its value as + * an integer. Returns 0 if not found. + */ +int getintvar(char *vars, const char *name) +{ + char *val; + + val = getvar(vars, name); + if (val == NULL) + return 0; + + return simple_strtoul(val, NULL, 0); +} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index 9a99186..f10a137 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -21,7 +21,8 @@ #include #include #include -#include +#include "wlc_scb.h" +#include "wlc_pub.h" #include "wlc_pmu.h" /* diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index 8536efe..a4b2bb9 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -634,8 +634,10 @@ extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs); struct ieee80211_sta; extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta, u16 tid); -int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val); -int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr); +extern int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val); +extern int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr); +extern char *getvar(char *vars, const char *name); +extern int getintvar(char *vars, const char *name); /* wlc_phy.c helper functions */ extern void wlc_set_ps_ctrl(struct wlc_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c index 41c1f96..697da28 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c @@ -21,7 +21,6 @@ #include #include #include -#include #include "bcmdma.h" #include "wlc_types.h" -- cgit v0.10.2 From 62dfdb38ef294533fd1c0859fae28163f1bd27cc Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:54 +0200 Subject: staging: brcm80211: removed OSL_WRITE_REG and OSL_READ_REG macros Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h index 73854a4..260d0b6 100644 --- a/drivers/staging/brcm80211/include/brcmu_utils.h +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -240,10 +240,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, #ifdef BRCM_FULLMAC #include #endif -#define OSL_WRITE_REG(r, v) \ - (bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v))) -#define OSL_READ_REG(r) \ - (bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))) #endif #if defined(BCMSDIO) @@ -270,7 +266,7 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ readb((volatile u8*)(r)) : \ sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), OSL_READ_REG(r)) \ + readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ ) #else /* __mips__ */ #define R_REG(r) (\ @@ -296,7 +292,7 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, ({ \ __typeof(*(r)) __osl_v; \ __asm__ __volatile__("sync"); \ - __osl_v = OSL_READ_REG(r); \ + __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ __asm__ __volatile__("sync"); \ __osl_v; \ })) \ @@ -313,7 +309,7 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, case sizeof(u32): \ writel((u32)(v), (volatile u32*)(r)); break; \ }, \ - (OSL_WRITE_REG(r, v))); \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ } while (0) #else /* __BIG_ENDIAN */ #define R_REG(r) (\ @@ -335,7 +331,7 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, } \ __osl_v; \ }), \ - OSL_READ_REG(r)) \ + bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ ) #define W_REG(r, v) do { \ SELECT_BUS_WRITE( \ @@ -350,7 +346,7 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, writel((u32)(v), \ (volatile u32*)(r)); break; \ }, \ - (OSL_WRITE_REG(r, v))); \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ } while (0) #endif /* __BIG_ENDIAN */ -- cgit v0.10.2 From 4489518533a1342fc685b58ada2c9a8a422d5686 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:55 +0200 Subject: staging: brcm80211: moved register read/write macro's Code cleanup. R_REG()/W_REG() macro's are overly complex. Copied the macro's to both fullmac and softmac. Next patches will simplify both copies of the macro's. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index e7638f4..5812b5b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #if defined(OOB_INTR_ONLY) diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 8dadfb6..9abd620 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -20,6 +20,7 @@ #include #include #include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index e1b2592..2da07e2 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -20,6 +20,7 @@ #include #include #include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 75393e7..8eeefb4 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -31,6 +31,132 @@ #include #include + +/* register access macros */ +#if defined(BCMSDIO) +#ifdef BRCM_FULLMAC +#include +#endif +#endif + +#if defined(BCMSDIO) +#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op +#define SELECT_BUS_READ(mmap_op, bus_op) bus_op +#else +#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op +#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op +#endif + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r) (\ + SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ + readb((volatile u8*)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ + readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ +) +#else /* __mips__ */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((volatile u8*)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((volatile u16*)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((volatile u32*)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }), \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + })) \ +) +#endif /* __mips__ */ + +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), (volatile u8*)(r)); break; \ + case sizeof(u16): \ + writew((u16)(v), (volatile u16*)(r)); break; \ + case sizeof(u32): \ + writel((u32)(v), (volatile u32*)(r)); break; \ + }, \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ + } while (0) +#else /* __BIG_ENDIAN */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((volatile u8*)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((volatile u16*)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((volatile u32*)(r)); \ + break; \ + } \ + __osl_v; \ + }), \ + bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ +) +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), \ + (volatile u8*)((r)^3)); break; \ + case sizeof(u16): \ + writew((u16)(v), \ + (volatile u16*)((r)^2)); break; \ + case sizeof(u32): \ + writel((u32)(v), \ + (volatile u32*)(r)); break; \ + }, \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ + } while (0) +#endif /* __BIG_ENDIAN */ + +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) + +#define SET_REG(r, mask, val) \ + W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + + + #ifdef DHD_DEBUG /* ARM trap handling */ diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index bc1c52d..7a8bab7 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -18,6 +18,7 @@ #include #include #include +#include "wlc_types.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c index 4a0deec..baed204 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.c @@ -23,6 +23,7 @@ #include #include +#include "wlc_types.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 6e61ca1..3ffad2e 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -18,6 +18,7 @@ #include #include #include +#include "wlc_types.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c index f10a137..720839b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c @@ -19,6 +19,7 @@ #include #include +#include "wlc_types.h" #include #include #include "wlc_scb.h" diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 3442d32..12c35bd 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -41,6 +41,129 @@ do { \ #define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) +/* register access macros */ +#if defined(BCMSDIO) +#ifdef BRCM_FULLMAC +#include +#endif +#endif + +#if defined(BCMSDIO) +#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op +#define SELECT_BUS_READ(mmap_op, bus_op) bus_op +#else +#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op +#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op +#endif + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r) (\ + SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ + readb((volatile u8*)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ + readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ +) +#else /* __mips__ */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((volatile u8*)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((volatile u16*)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((volatile u32*)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }), \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + })) \ +) +#endif /* __mips__ */ + +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), (volatile u8*)(r)); break; \ + case sizeof(u16): \ + writew((u16)(v), (volatile u16*)(r)); break; \ + case sizeof(u32): \ + writel((u32)(v), (volatile u32*)(r)); break; \ + }, \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ + } while (0) +#else /* __BIG_ENDIAN */ +#define R_REG(r) (\ + SELECT_BUS_READ( \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((volatile u8*)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((volatile u16*)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((volatile u32*)(r)); \ + break; \ + } \ + __osl_v; \ + }), \ + bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ +) +#define W_REG(r, v) do { \ + SELECT_BUS_WRITE( \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), \ + (volatile u8*)((r)^3)); break; \ + case sizeof(u16): \ + writew((u16)(v), \ + (volatile u16*)((r)^2)); break; \ + case sizeof(u32): \ + writel((u32)(v), \ + (volatile u32*)(r)); break; \ + }, \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ + } while (0) +#endif /* __BIG_ENDIAN */ + +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) + +#define SET_REG(r, mask, val) \ + W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + /* forward declarations */ struct sk_buff; struct brcms_info; diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h index 260d0b6..94ae604 100644 --- a/drivers/staging/brcm80211/include/brcmu_utils.h +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -235,21 +235,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, #define REG_MAP(pa, size) (void *)(0) #endif -/* register access macros */ -#if defined(BCMSDIO) -#ifdef BRCM_FULLMAC -#include -#endif -#endif - -#if defined(BCMSDIO) -#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op -#define SELECT_BUS_READ(mmap_op, bus_op) bus_op -#else -#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op -#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op -#endif - /* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */ #define PKTBUFSZ 2048 @@ -259,114 +244,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, #include /* for mem*, str* */ #endif -/* register access macros */ -#ifndef __BIG_ENDIAN -#ifndef __mips__ -#define R_REG(r) (\ - SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) -#else /* __mips__ */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }), \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - })) \ -) -#endif /* __mips__ */ - -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), (volatile u8*)(r)); break; \ - case sizeof(u16): \ - writew((u16)(v), (volatile u16*)(r)); break; \ - case sizeof(u32): \ - writel((u32)(v), (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ - } while (0) -#else /* __BIG_ENDIAN */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }), \ - bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), \ - (volatile u8*)((r)^3)); break; \ - case sizeof(u16): \ - writew((u16)(v), \ - (volatile u16*)((r)^2)); break; \ - case sizeof(u32): \ - writel((u32)(v), \ - (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ - } while (0) -#endif /* __BIG_ENDIAN */ - -#ifdef __mips__ -/* - * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder - * transactions. As a fix, a read after write is performed on certain places - * in the code. Older chips and the newer 5357 family don't require this fix. - */ -#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) -#else -#define W_REG_FLUSH(r, v) W_REG((r), (v)) -#endif /* __mips__ */ - -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) - -#define SET_REG(r, mask, val) \ - W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - #ifndef setbit #ifndef NBBY /* the BSD family defines NBBY */ #define NBBY 8 /* 8 bits per byte */ -- cgit v0.10.2 From b61a4be59b7df9c2cee72156fa2958b6ab0fe666 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:56 +0200 Subject: staging: brcm80211: further simplified register access macro's The SELECT_BUS_READ and SELECT_BUS_WRITE macro's always select a (sdio) bus operation for fullmac, and a memory operation for softmac. Thus they can be removed by expanding them in place. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 8eeefb4..acf2a55 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -39,102 +39,30 @@ #endif #endif -#if defined(BCMSDIO) -#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op -#define SELECT_BUS_READ(mmap_op, bus_op) bus_op -#else -#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op -#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op -#endif - /* register access macros */ #ifndef __BIG_ENDIAN #ifndef __mips__ -#define R_REG(r) (\ - SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) +#define R_REG(r) \ + bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)) #else /* __mips__ */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }), \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - })) \ -) +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }) #endif /* __mips__ */ #define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), (volatile u8*)(r)); break; \ - case sizeof(u16): \ - writew((u16)(v), (volatile u16*)(r)); break; \ - case sizeof(u32): \ - writel((u32)(v), (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v)); \ } while (0) #else /* __BIG_ENDIAN */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }), \ - bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) +#define R_REG(r) \ + bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)) #define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), \ - (volatile u8*)((r)^3)); break; \ - case sizeof(u16): \ - writew((u16)(v), \ - (volatile u16*)((r)^2)); break; \ - case sizeof(u32): \ - writel((u32)(v), \ - (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ + bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v); \ } while (0) #endif /* __BIG_ENDIAN */ @@ -155,8 +83,6 @@ #define SET_REG(r, mask, val) \ W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - - #ifdef DHD_DEBUG /* ARM trap handling */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 12c35bd..059dc17 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -48,56 +48,39 @@ do { \ #endif #endif -#if defined(BCMSDIO) -#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op -#define SELECT_BUS_READ(mmap_op, bus_op) bus_op -#else -#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op -#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op -#endif - /* register access macros */ #ifndef __BIG_ENDIAN #ifndef __mips__ -#define R_REG(r) (\ - SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) +#define R_REG(r) \ + ({\ + sizeof(*(r)) == sizeof(u8) ? \ + readb((volatile u8*)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ + readl((volatile u32*)(r)); \ + }) #else /* __mips__ */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }), \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - })) \ -) +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((volatile u8*)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((volatile u16*)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((volatile u32*)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }) #endif /* __mips__ */ #define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ switch (sizeof(*(r))) { \ case sizeof(u8): \ writeb((u8)(v), (volatile u8*)(r)); break; \ @@ -105,33 +88,29 @@ do { \ writew((u16)(v), (volatile u16*)(r)); break; \ case sizeof(u32): \ writel((u32)(v), (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v))); \ + }; \ } while (0) #else /* __BIG_ENDIAN */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }), \ - bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r))) \ -) +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((volatile u8*)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((volatile u16*)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((volatile u32*)(r)); \ + break; \ + } \ + __osl_v; \ + }) + #define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ switch (sizeof(*(r))) { \ case sizeof(u8): \ writeb((u8)(v), \ @@ -142,8 +121,7 @@ do { \ case sizeof(u32): \ writel((u32)(v), \ (volatile u32*)(r)); break; \ - }, \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v)); \ + } \ } while (0) #endif /* __BIG_ENDIAN */ -- cgit v0.10.2 From 25036341c3f471c0329fba4e5bba51d261c95931 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:57 +0200 Subject: staging: brcm80211: cleanup after R_REG/W_REG patches Code cleanup. Removed unused sections. Added () to make macro safe. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index acf2a55..75bf17b 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -33,50 +33,33 @@ #include /* register access macros */ -#if defined(BCMSDIO) -#ifdef BRCM_FULLMAC -#include -#endif -#endif - -/* register access macros */ #ifndef __BIG_ENDIAN #ifndef __mips__ #define R_REG(r) \ - bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)) + bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r))) #else /* __mips__ */ #define R_REG(r) \ ({ \ __typeof(*(r)) __osl_v; \ __asm__ __volatile__("sync"); \ - __osl_v = bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)); \ + __osl_v = bcmsdh_reg_read(NULL, (unsigned long)(r),\ + sizeof(*(r))); \ __asm__ __volatile__("sync"); \ __osl_v; \ }) #endif /* __mips__ */ #define W_REG(r, v) do { \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), (v)); \ + bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \ } while (0) #else /* __BIG_ENDIAN */ #define R_REG(r) \ - bcmsdh_reg_read(NULL, (unsigned long)r, sizeof(*r)) + bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r))) #define W_REG(r, v) do { \ - bcmsdh_reg_write(NULL, (unsigned long)r, sizeof(*r), v); \ + bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \ } while (0) #endif /* __BIG_ENDIAN */ -#ifdef __mips__ -/* - * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder - * transactions. As a fix, a read after write is performed on certain places - * in the code. Older chips and the newer 5357 family don't require this fix. - */ -#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) -#else -#define W_REG_FLUSH(r, v) W_REG((r), (v)) -#endif /* __mips__ */ - #define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) #define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index 059dc17..db296d4 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -42,13 +42,6 @@ do { \ #define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) /* register access macros */ -#if defined(BCMSDIO) -#ifdef BRCM_FULLMAC -#include -#endif -#endif - -/* register access macros */ #ifndef __BIG_ENDIAN #ifndef __mips__ #define R_REG(r) \ diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h index 94ae604..e4007d4 100644 --- a/drivers/staging/brcm80211/include/brcmu_utils.h +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -239,10 +239,6 @@ extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, #define PKTBUFSZ 2048 #define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ)) -#ifdef BRCM_FULLMAC -#include /* for vsn/printf's */ -#include /* for mem*, str* */ -#endif #ifndef setbit #ifndef NBBY /* the BSD family defines NBBY */ -- cgit v0.10.2 From f855796549c0a0531c9c7521baec97793d7a6fc4 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:58 +0200 Subject: staging: brcm80211: prepared header files for file rename Code cleanup. Removing 'bcm' and 'wlc_' file name prefixes. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index 211a27a..ad18b38 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _aiutils_h_ -#define _aiutils_h_ +#ifndef _BRCM_AIUTILS_H_ +#define _BRCM_AIUTILS_H_ /* Include the soci specific files */ #include @@ -573,4 +573,4 @@ extern void ai_epa_4313war(struct si_pub *sih); char *ai_getnvramflvar(struct si_pub *sih, const char *name); -#endif /* _aiutils_h_ */ +#endif /* _BRCM_AIUTILS_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h index 0965801..04908033 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmdma.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmdma_h_ -#define _bcmdma_h_ +#ifndef _BRCM_DMA_H_ +#define _BRCM_DMA_H_ #include "wlc_types.h" /* forward structure declarations */ @@ -252,4 +252,4 @@ static inline void dma_spin_for_len(uint len, struct sk_buff *head) #endif /* defined(__mips__) */ } -#endif /* _bcmdma_h_ */ +#endif /* _BRCM_DMA_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/bcmotp.h index ccfb9ff..c1eb347 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.h +++ b/drivers/staging/brcm80211/brcmsmac/bcmotp.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmotp_h_ -#define _bcmotp_h_ +#ifndef _BRCM_OTP_H_ +#define _BRCM_OTP_H_ /* OTP regions */ #define OTP_HW_RGN 1 @@ -42,4 +42,4 @@ extern int otp_read_region(struct si_pub *sih, int region, u16 *data, uint *wlen); extern int otp_nvread(void *oh, char *data, uint *len); -#endif /* _bcmotp_h_ */ +#endif /* _BRCM_OTP_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h index 8ef89ad..c56707a 100644 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wl_mac80211_h_ -#define _wl_mac80211_h_ +#ifndef _BRCM_MAC80211_IF_H_ +#define _BRCM_MAC80211_IF_H_ /* softmac ioctl definitions */ #define WLC_SET_SHORTSLOT_OVERRIDE 146 @@ -106,4 +106,4 @@ extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); extern void brcms_msleep(struct brcms_info *wl, uint ms); -#endif /* _wl_mac80211_h_ */ +#endif /* _BRCM_MAC80211_IF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index e9fa4ca..855f1d3 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _D11_H -#define _D11_H +#ifndef _BRCM_D11_H_ +#define _BRCM_D11_H_ #include @@ -1775,4 +1775,4 @@ typedef struct d11cnt { u32 rxundec; } d11cnt_t; -#endif /* _D11_H */ +#endif /* _BRCM_D11_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h index 0e65b11..c44b705 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.h +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _NICPCI_H -#define _NICPCI_H +#ifndef _BRCM_NICPCI_H_ +#define _BRCM_NICPCI_H_ /* PCI configuration address space size */ #define PCI_SZPCR 256 @@ -82,4 +82,4 @@ extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, extern void pcicore_fixcfg(void *pch, void *regs); extern void pcicore_pci_setup(void *pch, void *regs); -#endif /* _NICPCI_H */ +#endif /* _BRCM_NICPCI_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h index 6488cdf..4d03933 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h @@ -15,11 +15,11 @@ */ /* - * wlc_phy_hal.h: functionality exported from the phy to higher layers + * phy_hal.h: functionality exported from the phy to higher layers */ -#ifndef _wlc_phy_h_ -#define _wlc_phy_h_ +#ifndef _BRCM_PHY_HAL_H_ +#define _BRCM_PHY_HAL_H_ #include #include @@ -290,4 +290,4 @@ extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, u8 mcs_offset); extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); -#endif /* _wlc_phy_h_ */ +#endif /* _BRCM_PHY_HAL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h index 3ee29f0..ce417e6 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_phy_int_h_ -#define _wlc_phy_int_h_ +#ifndef _BRCM_PHY_INT_H_ +#define _BRCM_PHY_INT_H_ #include #include @@ -1232,4 +1232,4 @@ extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, chanspec_t chanspec); extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih); -#endif /* _wlc_phy_int_h_ */ +#endif /* _BRCM_PHY_INT_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h index b7bfc72..efa8c90 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_phy_lcn_h_ -#define _wlc_phy_lcn_h_ +#ifndef _BRCM_PHY_LCN_H_ +#define _BRCM_PHY_LCN_H_ struct phy_info_lcnphy { int lcnphy_txrf_sp_9_override; @@ -116,4 +116,4 @@ struct phy_info_lcnphy { uint lcnphy_aci_start_time; s8 lcnphy_tx_power_offset[TXP_NUM_RATES]; }; -#endif /* _wlc_phy_lcn_h_ */ +#endif /* _BRCM_PHY_LCN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h index 3dcee1c..49f57f4 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef __QMATH_H__ -#define __QMATH_H__ +#ifndef _BRCM_QMATH_H_ +#define _BRCM_QMATH_H_ u16 qm_mulu16(u16 op1, u16 op2); @@ -37,4 +37,4 @@ s16 qm_norm32(s32 op); void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N); -#endif /* #ifndef __QMATH_H__ */ +#endif /* #ifndef _BRCM_QMATH_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h index 72176ae..c3a6754 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _BCM20XX_H -#define _BCM20XX_H +#ifndef _BRCM_PHY_RADIO_H_ +#define _BRCM_PHY_RADIO_H_ #define RADIO_IDCODE 0x01 @@ -1530,4 +1530,4 @@ #define RADIO_2057_VCM_MASK 0x7 -#endif /* _BCM20XX_H */ +#endif /* _BRCM_PHY_RADIO_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h index 63d403b..df7d7d9 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_ampdu_h_ -#define _wlc_ampdu_h_ +#ifndef _BRCM_AMPDU_H_ +#define _BRCM_AMPDU_H_ extern struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc); extern void wlc_ampdu_detach(struct ampdu_info *ampdu); @@ -26,4 +26,4 @@ extern void wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, extern void wlc_ampdu_macaddr_upd(struct wlc_info *wlc); extern void wlc_ampdu_shm_upd(struct ampdu_info *ampdu); -#endif /* _wlc_ampdu_h_ */ +#endif /* _BRCM_AMPDU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h index 2470c73..c1b9cef 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_antsel_h_ -#define _wlc_antsel_h_ +#ifndef _BRCM_ANTSEL_H_ +#define _BRCM_ANTSEL_H_ extern struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc); extern void wlc_antsel_detach(struct antsel_info *asi); @@ -26,4 +26,4 @@ extern void wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, u8 *fbantcfg); extern u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel); -#endif /* _wlc_antsel_h_ */ +#endif /* _BRCM_ANTSEL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h index a5dccc2..8a582d1 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h @@ -13,8 +13,8 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_bmac_h_ -#define _wlc_bmac_h_ +#ifndef _BRCM_BOTTOM_MAC_H_ +#define _BRCM_BOTTOM_MAC_H_ /* XXXXX this interface is under wlc.c by design * http://hwnbu-twiki.broadcom.com/bin/view/Mwgroup/WlBmacDesign @@ -175,4 +175,4 @@ extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); -#endif /* _wlc_bmac_h_ */ +#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h index 2572541..49c30cd 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _WLC_BSSCFG_H_ -#define _WLC_BSSCFG_H_ +#ifndef _BRCM_BSSCFG_H_ +#define _BRCM_BSSCFG_H_ /* Check if a particular BSS config is AP or STA */ #define BSSCFG_AP(cfg) (0) @@ -132,4 +132,4 @@ struct wlc_bsscfg { #define SOFTPRB_ENAB(pub) (0) #define wlc_bsscfg_tx_check(a) do { } while (0); -#endif /* _WLC_BSSCFG_H_ */ +#endif /* _BRCM_BSSCFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h index 85fbd06..534c536 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_cfg_h_ -#define _wlc_cfg_h_ +#ifndef _BRCM_CFG_H_ +#define _BRCM_CFG_H_ #define NBANDS(wlc) ((wlc)->pub->_nbands) #define NBANDS_PUB(pub) ((pub)->_nbands) @@ -277,4 +277,4 @@ #define WLBANDINITDATA(_data) _data #define WLBANDINITFN(_fn) _fn -#endif /* _wlc_cfg_h_ */ +#endif /* _BRCM_CFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h b/drivers/staging/brcm80211/brcmsmac/wlc_channel.h index b8dec5b..f50a66e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_channel.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _WLC_CHANNEL_H_ -#define _WLC_CHANNEL_H_ +#ifndef _BRCM_CHANNEL_H_ +#define _BRCM_CHANNEL_H_ #define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_key.h b/drivers/staging/brcm80211/brcmsmac/wlc_key.h index f4bced5..ecfe969 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_key.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_key.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_key_h_ -#define _wlc_key_h_ +#ifndef _BRCM_KEY_H_ +#define _BRCM_KEY_H_ #include /* for ETH_ALEN */ @@ -139,4 +139,4 @@ typedef struct wsec_key { #define wlc_rcmta_del_bssid(a, b) do {} while (0) #define wlc_key_scb_delete(a, b) do {} while (0) -#endif /* _wlc_key_h_ */ +#endif /* _BRCM_KEY_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h index 88fab77..acba50b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_main.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_h_ -#define _wlc_h_ +#ifndef _BRCM_MAIN_H_ +#define _BRCM_MAIN_H_ #define MA_WINDOW_SZ 8 /* moving average window size */ #define WL_HWRXOFF 38 /* chip rx buffer offset */ @@ -877,4 +877,4 @@ extern bool wlc_ps_allowed(struct wlc_info *wlc); extern bool wlc_stay_awake(struct wlc_info *wlc); extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe); -#endif /* _wlc_h_ */ +#endif /* _BRCM_MAIN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h index 124d3fb..1677df2 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h @@ -15,11 +15,11 @@ */ /* - * wlc_phy_shim.h: stuff defined in wlc_phy_shim.c and included only by the phy + * phy_shim.h: stuff defined in phy_shim.c and included only by the phy */ -#ifndef _wlc_phy_shim_h_ -#define _wlc_phy_shim_h_ +#ifndef _BRCM_PHY_SHIM_H_ +#define _BRCM_PHY_SHIM_H_ #define RADAR_TYPE_NONE 0 /* Radar type None */ #define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */ @@ -164,4 +164,4 @@ extern void wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint, extern void wlapi_high_update_phy_mode(wlc_phy_shim_info_t *physhim, u32 phy_mode); extern u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim); -#endif /* _wlc_phy_shim_h_ */ +#endif /* _BRCM_PHY_SHIM_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h index 6b005b0..eff8d5b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h @@ -15,8 +15,8 @@ */ -#ifndef WLC_PMU_H_ -#define WLC_PMU_H_ +#ifndef _BRCM_PMU_H_ +#define _BRCM_PMU_H_ #include @@ -55,4 +55,4 @@ extern u32 si_pmu_measure_alpclk(struct si_pub *sih); extern bool si_pmu_is_otp_powered(struct si_pub *sih); extern void si_pmu_otp_power(struct si_pub *sih, bool on); -#endif /* WLC_PMU_H_ */ +#endif /* _BRCM_PMU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h index a4b2bb9..20df964 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_pub_h_ -#define _wlc_pub_h_ +#ifndef _BRCM_PUB_H_ +#define _BRCM_PUB_H_ #include "wlc_types.h" /* forward structure declarations */ #include "brcmu_wifi.h" /* for chanspec_t */ @@ -671,4 +671,4 @@ extern bool wlc_radio_monitor_stop(struct wlc_info *wlc); /* BMAC RPC: 7 u32 params: pkttotlen, fifo, commit, fid, txpktpend, pktflag, rpc_id */ #define WLC_RPCTX_PARAMS 32 -#endif /* _wlc_pub_h_ */ +#endif /* _BRCM_PUB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h b/drivers/staging/brcm80211/brcmsmac/wlc_scb.h index fd7767c..dcad9d0 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_scb.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_scb_h_ -#define _wlc_scb_h_ +#ifndef _BRCM_SCB_H_ +#define _BRCM_SCB_H_ #include /* for ETH_ALEN */ @@ -79,4 +79,4 @@ struct scb { #define SCB_PS(a) NULL #define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP) #define SCB_AMPDU(a) true -#endif /* _wlc_scb_h_ */ +#endif /* _BRCM_SCB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h index eedd9da..75e8205 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_stf_h_ -#define _wlc_stf_h_ +#ifndef _BRCM_STF_H_ +#define _BRCM_STF_H_ extern int wlc_stf_attach(struct wlc_info *wlc); extern void wlc_stf_detach(struct wlc_info *wlc); @@ -33,4 +33,4 @@ extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc); extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); extern u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec); -#endif /* _wlc_stf_h_ */ +#endif /* _BRCM_STF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h index db296d4..fa8d129 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/wlc_types.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_types_h_ -#define _wlc_types_h_ +#ifndef _BRCM_TYPES_H_ +#define _BRCM_TYPES_H_ /* Bus types */ #define SI_BUS 0 /* SOC Interconnect */ @@ -154,4 +154,4 @@ struct si_pub; /* brcm_msg_level is a bit vector with defs in bcmdefs.h */ extern u32 brcm_msg_level; -#endif /* _wlc_types_h_ */ +#endif /* _BRCM_TYPES_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 8cb66c2..768df8d 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmdefs_h_ -#define _bcmdefs_h_ +#ifndef _BRCM_DEFS_H_ +#define _BRCM_DEFS_H_ #define SI_BUS 0 #define PCI_BUS 1 @@ -107,4 +107,4 @@ typedef struct wl_rateset { #define PAD _XSTR(__LINE__) #endif -#endif /* _bcmdefs_h_ */ +#endif /* _BRCM_DEFS_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmdevs.h b/drivers/staging/brcm80211/include/bcmdevs.h index eba10b6..b7aedac 100644 --- a/drivers/staging/brcm80211/include/bcmdevs.h +++ b/drivers/staging/brcm80211/include/bcmdevs.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _BCMDEVS_H -#define _BCMDEVS_H +#ifndef _BRCM_HW_IDS_H_ +#define _BRCM_HW_IDS_H_ #define BCM4325_D11DUAL_ID 0x431b #define BCM4325_D11G_ID 0x431c @@ -122,4 +122,4 @@ /* Reference board types */ #define SPI_BOARD 0x0402 -#endif /* _BCMDEVS_H */ +#endif /* _BRCM_HW_IDS_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmsdh.h b/drivers/staging/brcm80211/include/bcmsdh.h index ba3fd62..db19533 100644 --- a/drivers/staging/brcm80211/include/bcmsdh.h +++ b/drivers/staging/brcm80211/include/bcmsdh.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmsdh_h_ -#define _bcmsdh_h_ +#ifndef _BRCM_SDH_H_ +#define _BRCM_SDH_H_ #include #define BCMSDH_ERROR_VAL 0x0001 /* Error */ @@ -223,4 +223,4 @@ extern u32 bcmsdh_cur_sbwad(void *sdh); /* Function to pass chipid and rev to lower layers for controlling pr's */ extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); -#endif /* _bcmsdh_h_ */ +#endif /* _BRCM_SDH_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmsoc.h b/drivers/staging/brcm80211/include/bcmsoc.h index 4df0c64..89e6719 100644 --- a/drivers/staging/brcm80211/include/bcmsoc.h +++ b/drivers/staging/brcm80211/include/bcmsoc.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _BCMSOC_H -#define _BCMSOC_H +#ifndef _BRCM_SOC_H +#define _BRCM_SOC_H /* Include the soci specific files */ #include @@ -195,4 +195,4 @@ #define BISZ_BSSEND_IDX 6 /* 6: bss end */ #define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ -#endif /* _BCMSOC_H */ +#endif /* _BRCM_SOC_H */ diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/include/bcmsrom.h index dc9ccee..ee4f880 100644 --- a/drivers/staging/brcm80211/include/bcmsrom.h +++ b/drivers/staging/brcm80211/include/bcmsrom.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmsrom_h_ -#define _bcmsrom_h_ +#ifndef _BRCM_SROM_H_ +#define _BRCM_SROM_H_ /* Prototypes */ extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, @@ -29,4 +29,4 @@ extern int srom_read(struct si_pub *sih, uint bus, void *curmap, */ extern int srom_parsecis(u8 **pcis, uint ciscnt, char **vars, uint *count); -#endif /* _bcmsrom_h_ */ +#endif /* _BRCM_SROM_H_ */ diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h index e4007d4..a4b52cf 100644 --- a/drivers/staging/brcm80211/include/brcmu_utils.h +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _brcmutils_h_ -#define _brcmutils_h_ +#ifndef _BRCMU_UTILS_H_ +#define _BRCMU_UTILS_H_ /* Buffer structure for collecting string-formatted data * using brcmu_bprintf() API. @@ -364,4 +364,4 @@ extern uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint len); extern uint brcmu_bitcount(u8 *bitmap, uint bytelength); -#endif /* _brcmutils_h_ */ +#endif /* _BRCMU_UTILS_H_ */ diff --git a/drivers/staging/brcm80211/include/brcmu_wifi.h b/drivers/staging/brcm80211/include/brcmu_wifi.h index 6b12c13..72013a4 100644 --- a/drivers/staging/brcm80211/include/brcmu_wifi.h +++ b/drivers/staging/brcm80211/include/brcmu_wifi.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _brcmu_wifi_h_ -#define _brcmu_wifi_h_ +#ifndef _BRCMU_WIFI_H_ +#define _BRCMU_WIFI_H_ #include /* for ETH_ALEN */ #include /* for WLAN_PMKID_LEN */ @@ -239,4 +239,4 @@ typedef struct _pmkid_cand_list { typedef u8 ac_bitmap_t; -#endif /* _brcmu_wifi_h_ */ +#endif /* _BRCMU_WIFI_H_ */ -- cgit v0.10.2 From cc3cea5ae091532bf8ed0976499129fe53a589ac Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:45:59 +0200 Subject: staging: brcm80211: renamed files in brcmsmac and include directories Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index 352ba4b..d6e90d7 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -19,13 +19,13 @@ #include #include #include -#include -#include +#include +#include #include #include -#include +#include -#include /* BRCM API for SDIO +#include /* BRCM API for SDIO clients (such as wl, dhd) */ #include /* common SDIO/controller interface */ #include /* BRCM sdio device core */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 5812b5b..37cf61a 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -25,10 +25,10 @@ #include #include -#include -#include +#include +#include #include -#include +#include #include #if defined(OOB_INTR_ONLY) diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 9abd620..03a5966 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -16,11 +16,11 @@ #include #include #include -#include -#include +#include +#include #include #include -#include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index 2da07e2..85ed095 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -17,10 +17,10 @@ #include /* request_irq() */ #include #include -#include +#include #include #include -#include +#include #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index dd872f4..2220941 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index a8504bb..73d8b02 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c index 831f324..6008888 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index adcf82d..b48447c 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -32,7 +32,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 75bf17b..4f5ab69 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -22,15 +22,15 @@ #include #include #include -#include -#include +#include +#include -#include +#include #include #include -#include +#include -#include +#include /* register access macros */ #ifndef __BIG_ENDIAN diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 38453cf..0a7a9b2 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -19,7 +19,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index f5725ec..c65affc 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index 1b2afa9..ee5c3f0 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -28,27 +28,27 @@ ccflags-y := \ -Idrivers/staging/brcm80211/include BRCMSMAC_OFILES := \ - brcms_mac80211.o \ + mac80211_if.o \ ucode_loader.o \ - wlc_alloc.o \ - wlc_ampdu.o \ - wlc_antsel.o \ - wlc_bmac.o \ - wlc_channel.o \ - wlc_main.o \ - wlc_phy_shim.o \ - wlc_pmu.o \ - wlc_rate.o \ - wlc_stf.o \ + alloc.o \ + ampdu.o \ + antsel.o \ + bottom_mac.o \ + channel.o \ + main.o \ + phy_shim.o \ + pmu.o \ + rate.o \ + stf.o \ aiutils.o \ - phy/wlc_phy_cmn.o \ - phy/wlc_phy_lcn.o \ - phy/wlc_phy_n.o \ - phy/wlc_phytbl_lcn.o \ - phy/wlc_phytbl_n.o \ - phy/wlc_phy_qmath.o \ - bcmotp.o \ - bcmsrom.o \ + phy/phy_cmn.o \ + phy/phy_lcn.o \ + phy/phy_n.o \ + phy/phytbl_lcn.o \ + phy/phytbl_n.o \ + phy/phy_qmath.o \ + otp.o \ + srom.o \ dma.o \ nicpci.o diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 7a8bab7..1f87b32 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -17,22 +17,22 @@ #include #include #include -#include -#include "wlc_types.h" +#include +#include "types.h" #include #include #include #include -#include +#include #include -#include +#include /* ********** from siutils.c *********** */ #include -#include -#include -#include -#include +#include +#include +#include +#include /* slow_clk_ctl */ #define SCC_SS_MASK 0x00000007 /* slow clock source mask */ diff --git a/drivers/staging/brcm80211/brcmsmac/alloc.c b/drivers/staging/brcm80211/brcmsmac/alloc.c new file mode 100644 index 0000000..1758640 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/alloc.c @@ -0,0 +1,287 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include + +#include +#include +#include +#include "dma.h" + +#include "d11.h" +#include "types.h" +#include "cfg.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "alloc.h" +#include "rate.h" +#include "bsscfg.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" + +static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit); +static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg); +static struct wlc_pub *wlc_pub_malloc(uint unit, + uint *err, uint devid); +static void wlc_pub_mfree(struct wlc_pub *pub); +static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid); + +static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid) +{ + tunables->ntxd = NTXD; + tunables->nrxd = NRXD; + tunables->rxbufsz = RXBUFSZ; + tunables->nrxbufpost = NRXBUFPOST; + tunables->maxscb = MAXSCB; + tunables->ampdunummpdu = AMPDU_NUM_MPDU; + tunables->maxpktcb = MAXPKTCB; + tunables->maxucodebss = WLC_MAX_UCODE_BSS; + tunables->maxucodebss4 = WLC_MAX_UCODE_BSS4; + tunables->maxbss = MAXBSS; + tunables->datahiwat = WLC_DATAHIWAT; + tunables->ampdudatahiwat = WLC_AMPDUDATAHIWAT; + tunables->rxbnd = RXBND; + tunables->txsbnd = TXSBND; +} + +static struct wlc_pub *wlc_pub_malloc(uint unit, uint *err, uint devid) +{ + struct wlc_pub *pub; + + pub = kzalloc(sizeof(struct wlc_pub), GFP_ATOMIC); + if (pub == NULL) { + *err = 1001; + goto fail; + } + + pub->tunables = kzalloc(sizeof(wlc_tunables_t), GFP_ATOMIC); + if (pub->tunables == NULL) { + *err = 1028; + goto fail; + } + + /* need to init the tunables now */ + wlc_tunables_init(pub->tunables, devid); + + pub->multicast = kzalloc(ETH_ALEN * MAXMULTILIST, GFP_ATOMIC); + if (pub->multicast == NULL) { + *err = 1003; + goto fail; + } + + return pub; + + fail: + wlc_pub_mfree(pub); + return NULL; +} + +static void wlc_pub_mfree(struct wlc_pub *pub) +{ + if (pub == NULL) + return; + + kfree(pub->multicast); + kfree(pub->tunables); + kfree(pub); +} + +static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit) +{ + struct wlc_bsscfg *cfg; + + cfg = kzalloc(sizeof(struct wlc_bsscfg), GFP_ATOMIC); + if (cfg == NULL) + goto fail; + + cfg->current_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); + if (cfg->current_bss == NULL) + goto fail; + + return cfg; + + fail: + wlc_bsscfg_mfree(cfg); + return NULL; +} + +static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg) +{ + if (cfg == NULL) + return; + + kfree(cfg->maclist); + kfree(cfg->current_bss); + kfree(cfg); +} + +static void wlc_bsscfg_ID_assign(struct wlc_info *wlc, + struct wlc_bsscfg *bsscfg) +{ + bsscfg->ID = wlc->next_bsscfg_ID; + wlc->next_bsscfg_ID++; +} + +/* + * The common driver entry routine. Error codes should be unique + */ +struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) +{ + struct wlc_info *wlc; + + wlc = kzalloc(sizeof(struct wlc_info), GFP_ATOMIC); + if (wlc == NULL) { + *err = 1002; + goto fail; + } + + /* allocate struct wlc_pub state structure */ + wlc->pub = wlc_pub_malloc(unit, err, devid); + if (wlc->pub == NULL) { + *err = 1003; + goto fail; + } + wlc->pub->wlc = wlc; + + /* allocate struct wlc_hw_info state structure */ + + wlc->hw = kzalloc(sizeof(struct wlc_hw_info), GFP_ATOMIC); + if (wlc->hw == NULL) { + *err = 1005; + goto fail; + } + wlc->hw->wlc = wlc; + + wlc->hw->bandstate[0] = + kzalloc(sizeof(struct wlc_hwband) * MAXBANDS, GFP_ATOMIC); + if (wlc->hw->bandstate[0] == NULL) { + *err = 1006; + goto fail; + } else { + int i; + + for (i = 1; i < MAXBANDS; i++) { + wlc->hw->bandstate[i] = (struct wlc_hwband *) + ((unsigned long)wlc->hw->bandstate[0] + + (sizeof(struct wlc_hwband) * i)); + } + } + + wlc->modulecb = + kzalloc(sizeof(struct modulecb) * WLC_MAXMODULES, GFP_ATOMIC); + if (wlc->modulecb == NULL) { + *err = 1009; + goto fail; + } + + wlc->default_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); + if (wlc->default_bss == NULL) { + *err = 1010; + goto fail; + } + + wlc->cfg = wlc_bsscfg_malloc(unit); + if (wlc->cfg == NULL) { + *err = 1011; + goto fail; + } + wlc_bsscfg_ID_assign(wlc, wlc->cfg); + + wlc->wsec_def_keys[0] = + kzalloc(sizeof(wsec_key_t) * WLC_DEFAULT_KEYS, GFP_ATOMIC); + if (wlc->wsec_def_keys[0] == NULL) { + *err = 1015; + goto fail; + } else { + int i; + for (i = 1; i < WLC_DEFAULT_KEYS; i++) { + wlc->wsec_def_keys[i] = (wsec_key_t *) + ((unsigned long)wlc->wsec_def_keys[0] + + (sizeof(wsec_key_t) * i)); + } + } + + wlc->protection = kzalloc(sizeof(struct wlc_protection), GFP_ATOMIC); + if (wlc->protection == NULL) { + *err = 1016; + goto fail; + } + + wlc->stf = kzalloc(sizeof(struct wlc_stf), GFP_ATOMIC); + if (wlc->stf == NULL) { + *err = 1017; + goto fail; + } + + wlc->bandstate[0] = + kzalloc(sizeof(struct wlcband)*MAXBANDS, GFP_ATOMIC); + if (wlc->bandstate[0] == NULL) { + *err = 1025; + goto fail; + } else { + int i; + + for (i = 1; i < MAXBANDS; i++) { + wlc->bandstate[i] = + (struct wlcband *) ((unsigned long)wlc->bandstate[0] + + (sizeof(struct wlcband)*i)); + } + } + + wlc->corestate = kzalloc(sizeof(struct wlccore), GFP_ATOMIC); + if (wlc->corestate == NULL) { + *err = 1026; + goto fail; + } + + wlc->corestate->macstat_snapshot = + kzalloc(sizeof(macstat_t), GFP_ATOMIC); + if (wlc->corestate->macstat_snapshot == NULL) { + *err = 1027; + goto fail; + } + + return wlc; + + fail: + wlc_detach_mfree(wlc); + return NULL; +} + +void wlc_detach_mfree(struct wlc_info *wlc) +{ + if (wlc == NULL) + return; + + wlc_bsscfg_mfree(wlc->cfg); + wlc_pub_mfree(wlc->pub); + kfree(wlc->modulecb); + kfree(wlc->default_bss); + kfree(wlc->wsec_def_keys[0]); + kfree(wlc->protection); + kfree(wlc->stf); + kfree(wlc->bandstate[0]); + kfree(wlc->corestate->macstat_snapshot); + kfree(wlc->corestate); + kfree(wlc->hw->bandstate[0]); + kfree(wlc->hw); + + /* free the wlc */ + kfree(wlc); + wlc = NULL; +} diff --git a/drivers/staging/brcm80211/brcmsmac/alloc.h b/drivers/staging/brcm80211/brcmsmac/alloc.h new file mode 100644 index 0000000..95f951e --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/alloc.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +extern struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid); +extern void wlc_detach_mfree(struct wlc_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/ampdu.c b/drivers/staging/brcm80211/brcmsmac/ampdu.c new file mode 100644 index 0000000..ab6c496 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.c @@ -0,0 +1,1245 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include + +#include +#include +#include +#include "dma.h" +#include + +#include "types.h" +#include "cfg.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "phy/phy_hal.h" +#include "antsel.h" +#include "channel.h" +#include "main.h" +#include "ampdu.h" + +#define AMPDU_MAX_MPDU 32 /* max number of mpdus in an ampdu */ +#define AMPDU_NUM_MPDU_LEGACY 16 /* max number of mpdus in an ampdu to a legacy */ +#define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ +#define AMPDU_TX_BA_DEF_WSIZE 64 /* default Tx ba window size (in pdu) */ +#define AMPDU_RX_BA_DEF_WSIZE 64 /* max Rx ba window size (in pdu) */ +#define AMPDU_RX_BA_MAX_WSIZE 64 /* default Rx ba window size (in pdu) */ +#define AMPDU_MAX_DUR 5 /* max dur of tx ampdu (in msec) */ +#define AMPDU_DEF_RETRY_LIMIT 5 /* default tx retry limit */ +#define AMPDU_DEF_RR_RETRY_LIMIT 2 /* default tx retry limit at reg rate */ +#define AMPDU_DEF_TXPKT_WEIGHT 2 /* default weight of ampdu in txfifo */ +#define AMPDU_DEF_FFPLD_RSVD 2048 /* default ffpld reserved bytes */ +#define AMPDU_INI_FREE 10 /* # of inis to be freed on detach */ +#define AMPDU_SCB_MAX_RELEASE 20 /* max # of mpdus released at a time */ + +#define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */ +#define FFPLD_TX_MAX_UNFL 200 /* default value of the average number of ampdu + * without underflows + */ +#define FFPLD_MPDU_SIZE 1800 /* estimate of maximum mpdu size */ +#define FFPLD_MAX_MCS 23 /* we don't deal with mcs 32 */ +#define FFPLD_PLD_INCR 1000 /* increments in bytes */ +#define FFPLD_MAX_AMPDU_CNT 5000 /* maximum number of ampdu we + * accumulate between resets. + */ + +#define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE) + +/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */ +#define AMPDU_MAX_MPDU_OVERHEAD (FCS_LEN + DOT11_ICV_AES_LEN +\ + AMPDU_DELIMITER_LEN + 3\ + + DOT11_A4_HDR_LEN + DOT11_QOS_LEN + DOT11_IV_MAX_LEN) + +/* structure to hold tx fifo information and pre-loading state + * counters specific to tx underflows of ampdus + * some counters might be redundant with the ones in wlc or ampdu structures. + * This allows to maintain a specific state independently of + * how often and/or when the wlc counters are updated. + */ +typedef struct wlc_fifo_info { + u16 ampdu_pld_size; /* number of bytes to be pre-loaded */ + u8 mcs2ampdu_table[FFPLD_MAX_MCS + 1]; /* per-mcs max # of mpdus in an ampdu */ + u16 prev_txfunfl; /* num of underflows last read from the HW macstats counter */ + u32 accum_txfunfl; /* num of underflows since we modified pld params */ + u32 accum_txampdu; /* num of tx ampdu since we modified pld params */ + u32 prev_txampdu; /* previous reading of tx ampdu */ + u32 dmaxferrate; /* estimated dma avg xfer rate in kbits/sec */ +} wlc_fifo_info_t; + +/* AMPDU module specific state */ +struct ampdu_info { + struct wlc_info *wlc; /* pointer to main wlc structure */ + int scb_handle; /* scb cubby handle to retrieve data from scb */ + u8 ini_enable[AMPDU_MAX_SCB_TID]; /* per-tid initiator enable/disable of ampdu */ + u8 ba_tx_wsize; /* Tx ba window size (in pdu) */ + u8 ba_rx_wsize; /* Rx ba window size (in pdu) */ + u8 retry_limit; /* mpdu transmit retry limit */ + u8 rr_retry_limit; /* mpdu transmit retry limit at regular rate */ + u8 retry_limit_tid[AMPDU_MAX_SCB_TID]; /* per-tid mpdu transmit retry limit */ + /* per-tid mpdu transmit retry limit at regular rate */ + u8 rr_retry_limit_tid[AMPDU_MAX_SCB_TID]; + u8 mpdu_density; /* min mpdu spacing (0-7) ==> 2^(x-1)/8 usec */ + s8 max_pdu; /* max pdus allowed in ampdu */ + u8 dur; /* max duration of an ampdu (in msec) */ + u8 txpkt_weight; /* weight of ampdu in txfifo; reduces rate lag */ + u8 rx_factor; /* maximum rx ampdu factor (0-3) ==> 2^(13+x) bytes */ + u32 ffpld_rsvd; /* number of bytes to reserve for preload */ + u32 max_txlen[MCS_TABLE_SIZE][2][2]; /* max size of ampdu per mcs, bw and sgi */ + void *ini_free[AMPDU_INI_FREE]; /* array of ini's to be freed on detach */ + bool mfbr; /* enable multiple fallback rate */ + u32 tx_max_funl; /* underflows should be kept such that + * (tx_max_funfl*underflows) < tx frames + */ + wlc_fifo_info_t fifo_tb[NUM_FFPLD_FIFO]; /* table of fifo infos */ + +}; + +/* used for flushing ampdu packets */ +struct cb_del_ampdu_pars { + struct ieee80211_sta *sta; + u16 tid; +}; + +#define AMPDU_CLEANUPFLAG_RX (0x1) +#define AMPDU_CLEANUPFLAG_TX (0x2) + +#define SCB_AMPDU_CUBBY(ampdu, scb) (&(scb->scb_ampdu)) +#define SCB_AMPDU_INI(scb_ampdu, tid) (&(scb_ampdu->ini[tid])) + +static void wlc_ffpld_init(struct ampdu_info *ampdu); +static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int f); +static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f); + +static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, + scb_ampdu_t *scb_ampdu, + u8 tid, bool override); +static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur); +static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb); +static void scb_ampdu_update_config_all(struct ampdu_info *ampdu); + +#define wlc_ampdu_txflowcontrol(a, b, c) do {} while (0) + +static void wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, + struct scb *scb, + struct sk_buff *p, tx_status_t *txs, + u32 frmtxstatus, u32 frmtxstatus2); +static bool wlc_ampdu_cap(struct ampdu_info *ampdu); +static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on); + +struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc) +{ + struct ampdu_info *ampdu; + int i; + + ampdu = kzalloc(sizeof(struct ampdu_info), GFP_ATOMIC); + if (!ampdu) { + wiphy_err(wlc->wiphy, "wl%d: wlc_ampdu_attach: out of mem\n", + wlc->pub->unit); + return NULL; + } + ampdu->wlc = wlc; + + for (i = 0; i < AMPDU_MAX_SCB_TID; i++) + ampdu->ini_enable[i] = true; + /* Disable ampdu for VO by default */ + ampdu->ini_enable[PRIO_8021D_VO] = false; + ampdu->ini_enable[PRIO_8021D_NC] = false; + + /* Disable ampdu for BK by default since not enough fifo space */ + ampdu->ini_enable[PRIO_8021D_NONE] = false; + ampdu->ini_enable[PRIO_8021D_BK] = false; + + ampdu->ba_tx_wsize = AMPDU_TX_BA_DEF_WSIZE; + ampdu->ba_rx_wsize = AMPDU_RX_BA_DEF_WSIZE; + ampdu->mpdu_density = AMPDU_DEF_MPDU_DENSITY; + ampdu->max_pdu = AUTO; + ampdu->dur = AMPDU_MAX_DUR; + ampdu->txpkt_weight = AMPDU_DEF_TXPKT_WEIGHT; + + ampdu->ffpld_rsvd = AMPDU_DEF_FFPLD_RSVD; + /* bump max ampdu rcv size to 64k for all 11n devices except 4321A0 and 4321A1 */ + if (WLCISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2)) + ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_32K; + else + ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_64K; + ampdu->retry_limit = AMPDU_DEF_RETRY_LIMIT; + ampdu->rr_retry_limit = AMPDU_DEF_RR_RETRY_LIMIT; + + for (i = 0; i < AMPDU_MAX_SCB_TID; i++) { + ampdu->retry_limit_tid[i] = ampdu->retry_limit; + ampdu->rr_retry_limit_tid[i] = ampdu->rr_retry_limit; + } + + ampdu_update_max_txlen(ampdu, ampdu->dur); + ampdu->mfbr = false; + /* try to set ampdu to the default value */ + wlc_ampdu_set(ampdu, wlc->pub->_ampdu); + + ampdu->tx_max_funl = FFPLD_TX_MAX_UNFL; + wlc_ffpld_init(ampdu); + + return ampdu; +} + +void wlc_ampdu_detach(struct ampdu_info *ampdu) +{ + int i; + + if (!ampdu) + return; + + /* free all ini's which were to be freed on callbacks which were never called */ + for (i = 0; i < AMPDU_INI_FREE; i++) { + kfree(ampdu->ini_free[i]); + } + + wlc_module_unregister(ampdu->wlc->pub, "ampdu", ampdu); + kfree(ampdu); +} + +static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb) +{ + scb_ampdu_t *scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + int i; + + scb_ampdu->max_pdu = (u8) ampdu->wlc->pub->tunables->ampdunummpdu; + + /* go back to legacy size if some preloading is occurring */ + for (i = 0; i < NUM_FFPLD_FIFO; i++) { + if (ampdu->fifo_tb[i].ampdu_pld_size > FFPLD_PLD_INCR) + scb_ampdu->max_pdu = AMPDU_NUM_MPDU_LEGACY; + } + + /* apply user override */ + if (ampdu->max_pdu != AUTO) + scb_ampdu->max_pdu = (u8) ampdu->max_pdu; + + scb_ampdu->release = min_t(u8, scb_ampdu->max_pdu, AMPDU_SCB_MAX_RELEASE); + + if (scb_ampdu->max_rxlen) + scb_ampdu->release = + min_t(u8, scb_ampdu->release, scb_ampdu->max_rxlen / 1600); + + scb_ampdu->release = min(scb_ampdu->release, + ampdu->fifo_tb[TX_AC_BE_FIFO]. + mcs2ampdu_table[FFPLD_MAX_MCS]); +} + +static void scb_ampdu_update_config_all(struct ampdu_info *ampdu) +{ + scb_ampdu_update_config(ampdu, ampdu->wlc->pub->global_scb); +} + +static void wlc_ffpld_init(struct ampdu_info *ampdu) +{ + int i, j; + wlc_fifo_info_t *fifo; + + for (j = 0; j < NUM_FFPLD_FIFO; j++) { + fifo = (ampdu->fifo_tb + j); + fifo->ampdu_pld_size = 0; + for (i = 0; i <= FFPLD_MAX_MCS; i++) + fifo->mcs2ampdu_table[i] = 255; + fifo->dmaxferrate = 0; + fifo->accum_txampdu = 0; + fifo->prev_txfunfl = 0; + fifo->accum_txfunfl = 0; + + } +} + +/* evaluate the dma transfer rate using the tx underflows as feedback. + * If necessary, increase tx fifo preloading. If not enough, + * decrease maximum ampdu size for each mcs till underflows stop + * Return 1 if pre-loading not active, -1 if not an underflow event, + * 0 if pre-loading module took care of the event. + */ +static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) +{ + struct ampdu_info *ampdu = wlc->ampdu; + u32 phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, false); + u32 txunfl_ratio; + u8 max_mpdu; + u32 current_ampdu_cnt = 0; + u16 max_pld_size; + u32 new_txunfl; + wlc_fifo_info_t *fifo = (ampdu->fifo_tb + fid); + uint xmtfifo_sz; + u16 cur_txunfl; + + /* return if we got here for a different reason than underflows */ + cur_txunfl = + wlc_read_shm(wlc, + M_UCODE_MACSTAT + offsetof(macstat_t, txfunfl[fid])); + new_txunfl = (u16) (cur_txunfl - fifo->prev_txfunfl); + if (new_txunfl == 0) { + BCMMSG(wlc->wiphy, "TX status FRAG set but no tx underflows\n"); + return -1; + } + fifo->prev_txfunfl = cur_txunfl; + + if (!ampdu->tx_max_funl) + return 1; + + /* check if fifo is big enough */ + if (wlc_xmtfifo_sz_get(wlc, fid, &xmtfifo_sz)) { + return -1; + } + + if ((TXFIFO_SIZE_UNIT * (u32) xmtfifo_sz) <= ampdu->ffpld_rsvd) + return 1; + + max_pld_size = TXFIFO_SIZE_UNIT * xmtfifo_sz - ampdu->ffpld_rsvd; + fifo->accum_txfunfl += new_txunfl; + + /* we need to wait for at least 10 underflows */ + if (fifo->accum_txfunfl < 10) + return 0; + + BCMMSG(wlc->wiphy, "ampdu_count %d tx_underflows %d\n", + current_ampdu_cnt, fifo->accum_txfunfl); + + /* + compute the current ratio of tx unfl per ampdu. + When the current ampdu count becomes too + big while the ratio remains small, we reset + the current count in order to not + introduce too big of a latency in detecting a + large amount of tx underflows later. + */ + + txunfl_ratio = current_ampdu_cnt / fifo->accum_txfunfl; + + if (txunfl_ratio > ampdu->tx_max_funl) { + if (current_ampdu_cnt >= FFPLD_MAX_AMPDU_CNT) { + fifo->accum_txfunfl = 0; + } + return 0; + } + max_mpdu = + min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY); + + /* In case max value max_pdu is already lower than + the fifo depth, there is nothing more we can do. + */ + + if (fifo->ampdu_pld_size >= max_mpdu * FFPLD_MPDU_SIZE) { + fifo->accum_txfunfl = 0; + return 0; + } + + if (fifo->ampdu_pld_size < max_pld_size) { + + /* increment by TX_FIFO_PLD_INC bytes */ + fifo->ampdu_pld_size += FFPLD_PLD_INCR; + if (fifo->ampdu_pld_size > max_pld_size) + fifo->ampdu_pld_size = max_pld_size; + + /* update scb release size */ + scb_ampdu_update_config_all(ampdu); + + /* + compute a new dma xfer rate for max_mpdu @ max mcs. + This is the minimum dma rate that + can achieve no underflow condition for the current mpdu size. + */ + /* note : we divide/multiply by 100 to avoid integer overflows */ + fifo->dmaxferrate = + (((phy_rate / 100) * + (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size)) + / (max_mpdu * FFPLD_MPDU_SIZE)) * 100; + + BCMMSG(wlc->wiphy, "DMA estimated transfer rate %d; " + "pre-load size %d\n", + fifo->dmaxferrate, fifo->ampdu_pld_size); + } else { + + /* decrease ampdu size */ + if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] > 1) { + if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] == 255) + fifo->mcs2ampdu_table[FFPLD_MAX_MCS] = + AMPDU_NUM_MPDU_LEGACY - 1; + else + fifo->mcs2ampdu_table[FFPLD_MAX_MCS] -= 1; + + /* recompute the table */ + wlc_ffpld_calc_mcs2ampdu_table(ampdu, fid); + + /* update scb release size */ + scb_ampdu_update_config_all(ampdu); + } + } + fifo->accum_txfunfl = 0; + return 0; +} + +static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f) +{ + int i; + u32 phy_rate, dma_rate, tmp; + u8 max_mpdu; + wlc_fifo_info_t *fifo = (ampdu->fifo_tb + f); + + /* recompute the dma rate */ + /* note : we divide/multiply by 100 to avoid integer overflows */ + max_mpdu = + min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY); + phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, false); + dma_rate = + (((phy_rate / 100) * + (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size)) + / (max_mpdu * FFPLD_MPDU_SIZE)) * 100; + fifo->dmaxferrate = dma_rate; + + /* fill up the mcs2ampdu table; do not recalc the last mcs */ + dma_rate = dma_rate >> 7; + for (i = 0; i < FFPLD_MAX_MCS; i++) { + /* shifting to keep it within integer range */ + phy_rate = MCS_RATE(i, true, false) >> 7; + if (phy_rate > dma_rate) { + tmp = ((fifo->ampdu_pld_size * phy_rate) / + ((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1; + tmp = min_t(u32, tmp, 255); + fifo->mcs2ampdu_table[i] = (u8) tmp; + } + } +} + +static void +wlc_ampdu_agg(struct ampdu_info *ampdu, struct scb *scb, struct sk_buff *p, + uint prec) +{ + scb_ampdu_t *scb_ampdu; + scb_ampdu_tid_ini_t *ini; + u8 tid = (u8) (p->priority); + + scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + + /* initialize initiator on first packet; sends addba req */ + ini = SCB_AMPDU_INI(scb_ampdu, tid); + if (ini->magic != INI_MAGIC) { + ini = wlc_ampdu_init_tid_ini(ampdu, scb_ampdu, tid, false); + } + return; +} + +int +wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, + struct sk_buff **pdu, int prec) +{ + struct wlc_info *wlc; + struct sk_buff *p, *pkt[AMPDU_MAX_MPDU]; + u8 tid, ndelim; + int err = 0; + u8 preamble_type = WLC_GF_PREAMBLE; + u8 fbr_preamble_type = WLC_GF_PREAMBLE; + u8 rts_preamble_type = WLC_LONG_PREAMBLE; + u8 rts_fbr_preamble_type = WLC_LONG_PREAMBLE; + + bool rr = true, fbr = false; + uint i, count = 0, fifo, seg_cnt = 0; + u16 plen, len, seq = 0, mcl, mch, index, frameid, dma_len = 0; + u32 ampdu_len, maxlen = 0; + d11txh_t *txh = NULL; + u8 *plcp; + struct ieee80211_hdr *h; + struct scb *scb; + scb_ampdu_t *scb_ampdu; + scb_ampdu_tid_ini_t *ini; + u8 mcs = 0; + bool use_rts = false, use_cts = false; + ratespec_t rspec = 0, rspec_fallback = 0; + ratespec_t rts_rspec = 0, rts_rspec_fallback = 0; + u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; + struct ieee80211_rts *rts; + u8 rr_retry_limit; + wlc_fifo_info_t *f; + bool fbr_iscck; + struct ieee80211_tx_info *tx_info; + u16 qlen; + struct wiphy *wiphy; + + wlc = ampdu->wlc; + wiphy = wlc->wiphy; + p = *pdu; + + tid = (u8) (p->priority); + + f = ampdu->fifo_tb + prio2fifo[tid]; + + scb = wlc->pub->global_scb; + scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + ini = &scb_ampdu->ini[tid]; + + /* Let pressure continue to build ... */ + qlen = pktq_plen(&qi->q, prec); + if (ini->tx_in_transit > 0 && qlen < scb_ampdu->max_pdu) { + return -EBUSY; + } + + wlc_ampdu_agg(ampdu, scb, p, tid); + + rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; + ampdu_len = 0; + dma_len = 0; + while (p) { + struct ieee80211_tx_rate *txrate; + + tx_info = IEEE80211_SKB_CB(p); + txrate = tx_info->status.rates; + + if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { + err = wlc_prep_pdu(wlc, p, &fifo); + } else { + wiphy_err(wiphy, "%s: AMPDU flag is off!\n", __func__); + *pdu = NULL; + err = 0; + break; + } + + if (err) { + if (err == -EBUSY) { + wiphy_err(wiphy, "wl%d: wlc_sendampdu: " + "prep_xdu retry; seq 0x%x\n", + wlc->pub->unit, seq); + *pdu = p; + break; + } + + /* error in the packet; reject it */ + wiphy_err(wiphy, "wl%d: wlc_sendampdu: prep_xdu " + "rejected; seq 0x%x\n", wlc->pub->unit, seq); + *pdu = NULL; + break; + } + + /* pkt is good to be aggregated */ + txh = (d11txh_t *) p->data; + plcp = (u8 *) (txh + 1); + h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); + seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT; + index = TX_SEQ_TO_INDEX(seq); + + /* check mcl fields and test whether it can be agg'd */ + mcl = le16_to_cpu(txh->MacTxControlLow); + mcl &= ~TXC_AMPDU_MASK; + fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x3); + txh->PreloadSize = 0; /* always default to 0 */ + + /* Handle retry limits */ + if (txrate[0].count <= rr_retry_limit) { + txrate[0].count++; + rr = true; + fbr = false; + } else { + fbr = true; + rr = false; + txrate[1].count++; + } + + /* extract the length info */ + len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) + : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); + + /* retrieve null delimiter count */ + ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM]; + seg_cnt += 1; + + BCMMSG(wlc->wiphy, "wl%d: mpdu %d plcp_len %d\n", + wlc->pub->unit, count, len); + + /* + * aggregateable mpdu. For ucode/hw agg, + * test whether need to break or change the epoch + */ + if (count == 0) { + mcl |= (TXC_AMPDU_FIRST << TXC_AMPDU_SHIFT); + /* refill the bits since might be a retx mpdu */ + mcl |= TXC_STARTMSDU; + rts = (struct ieee80211_rts *)&txh->rts_frame; + + if (ieee80211_is_rts(rts->frame_control)) { + mcl |= TXC_SENDRTS; + use_rts = true; + } + if (ieee80211_is_cts(rts->frame_control)) { + mcl |= TXC_SENDCTS; + use_cts = true; + } + } else { + mcl |= (TXC_AMPDU_MIDDLE << TXC_AMPDU_SHIFT); + mcl &= ~(TXC_STARTMSDU | TXC_SENDRTS | TXC_SENDCTS); + } + + len = roundup(len, 4); + ampdu_len += (len + (ndelim + 1) * AMPDU_DELIMITER_LEN); + + dma_len += (u16) brcmu_pkttotlen(p); + + BCMMSG(wlc->wiphy, "wl%d: ampdu_len %d" + " seg_cnt %d null delim %d\n", + wlc->pub->unit, ampdu_len, seg_cnt, ndelim); + + txh->MacTxControlLow = cpu_to_le16(mcl); + + /* this packet is added */ + pkt[count++] = p; + + /* patch the first MPDU */ + if (count == 1) { + u8 plcp0, plcp3, is40, sgi; + struct ieee80211_sta *sta; + + sta = tx_info->control.sta; + + if (rr) { + plcp0 = plcp[0]; + plcp3 = plcp[3]; + } else { + plcp0 = txh->FragPLCPFallback[0]; + plcp3 = txh->FragPLCPFallback[3]; + + } + is40 = (plcp0 & MIMO_PLCP_40MHZ) ? 1 : 0; + sgi = PLCP3_ISSGI(plcp3) ? 1 : 0; + mcs = plcp0 & ~MIMO_PLCP_40MHZ; + maxlen = + min(scb_ampdu->max_rxlen, + ampdu->max_txlen[mcs][is40][sgi]); + + /* XXX Fix me to honor real max_rxlen */ + /* can fix this as soon as ampdu_action() in mac80211.h + * gets extra u8buf_size par */ + maxlen = 64 * 1024; + + if (is40) + mimo_ctlchbw = + CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) + ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; + + /* rebuild the rspec and rspec_fallback */ + rspec = RSPEC_MIMORATE; + rspec |= plcp[0] & ~MIMO_PLCP_40MHZ; + if (plcp[0] & MIMO_PLCP_40MHZ) + rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT); + + if (fbr_iscck) /* CCK */ + rspec_fallback = + CCK_RSPEC(CCK_PHY2MAC_RATE + (txh->FragPLCPFallback[0])); + else { /* MIMO */ + rspec_fallback = RSPEC_MIMORATE; + rspec_fallback |= + txh->FragPLCPFallback[0] & ~MIMO_PLCP_40MHZ; + if (txh->FragPLCPFallback[0] & MIMO_PLCP_40MHZ) + rspec_fallback |= + (PHY_TXC1_BW_40MHZ << + RSPEC_BW_SHIFT); + } + + if (use_rts || use_cts) { + rts_rspec = + wlc_rspec_to_rts_rspec(wlc, rspec, false, + mimo_ctlchbw); + rts_rspec_fallback = + wlc_rspec_to_rts_rspec(wlc, rspec_fallback, + false, mimo_ctlchbw); + } + } + + /* if (first mpdu for host agg) */ + /* test whether to add more */ + if ((MCS_RATE(mcs, true, false) >= f->dmaxferrate) && + (count == f->mcs2ampdu_table[mcs])) { + BCMMSG(wlc->wiphy, "wl%d: PR 37644: stopping" + " ampdu at %d for mcs %d\n", + wlc->pub->unit, count, mcs); + break; + } + + if (count == scb_ampdu->max_pdu) { + break; + } + + /* check to see if the next pkt is a candidate for aggregation */ + p = pktq_ppeek(&qi->q, prec); + tx_info = IEEE80211_SKB_CB(p); /* tx_info must be checked with current p */ + + if (p) { + if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && + ((u8) (p->priority) == tid)) { + + plen = brcmu_pkttotlen(p) + + AMPDU_MAX_MPDU_OVERHEAD; + plen = max(scb_ampdu->min_len, plen); + + if ((plen + ampdu_len) > maxlen) { + p = NULL; + wiphy_err(wiphy, "%s: Bogus plen #1\n", + __func__); + continue; + } + + /* check if there are enough descriptors available */ + if (TXAVAIL(wlc, fifo) <= (seg_cnt + 1)) { + wiphy_err(wiphy, "%s: No fifo space " + "!!\n", __func__); + p = NULL; + continue; + } + p = brcmu_pktq_pdeq(&qi->q, prec); + } else { + p = NULL; + } + } + } /* end while(p) */ + + ini->tx_in_transit += count; + + if (count) { + /* patch up the last txh */ + txh = (d11txh_t *) pkt[count - 1]->data; + mcl = le16_to_cpu(txh->MacTxControlLow); + mcl &= ~TXC_AMPDU_MASK; + mcl |= (TXC_AMPDU_LAST << TXC_AMPDU_SHIFT); + txh->MacTxControlLow = cpu_to_le16(mcl); + + /* remove the null delimiter after last mpdu */ + ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM]; + txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = 0; + ampdu_len -= ndelim * AMPDU_DELIMITER_LEN; + + /* remove the pad len from last mpdu */ + fbr_iscck = ((le16_to_cpu(txh->XtraFrameTypes) & 0x3) == 0); + len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) + : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); + ampdu_len -= roundup(len, 4) - len; + + /* patch up the first txh & plcp */ + txh = (d11txh_t *) pkt[0]->data; + plcp = (u8 *) (txh + 1); + + WLC_SET_MIMO_PLCP_LEN(plcp, ampdu_len); + /* mark plcp to indicate ampdu */ + WLC_SET_MIMO_PLCP_AMPDU(plcp); + + /* reset the mixed mode header durations */ + if (txh->MModeLen) { + u16 mmodelen = + wlc_calc_lsig_len(wlc, rspec, ampdu_len); + txh->MModeLen = cpu_to_le16(mmodelen); + preamble_type = WLC_MM_PREAMBLE; + } + if (txh->MModeFbrLen) { + u16 mmfbrlen = + wlc_calc_lsig_len(wlc, rspec_fallback, ampdu_len); + txh->MModeFbrLen = cpu_to_le16(mmfbrlen); + fbr_preamble_type = WLC_MM_PREAMBLE; + } + + /* set the preload length */ + if (MCS_RATE(mcs, true, false) >= f->dmaxferrate) { + dma_len = min(dma_len, f->ampdu_pld_size); + txh->PreloadSize = cpu_to_le16(dma_len); + } else + txh->PreloadSize = 0; + + mch = le16_to_cpu(txh->MacTxControlHigh); + + /* update RTS dur fields */ + if (use_rts || use_cts) { + u16 durid; + rts = (struct ieee80211_rts *)&txh->rts_frame; + if ((mch & TXC_PREAMBLE_RTS_MAIN_SHORT) == + TXC_PREAMBLE_RTS_MAIN_SHORT) + rts_preamble_type = WLC_SHORT_PREAMBLE; + + if ((mch & TXC_PREAMBLE_RTS_FB_SHORT) == + TXC_PREAMBLE_RTS_FB_SHORT) + rts_fbr_preamble_type = WLC_SHORT_PREAMBLE; + + durid = + wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec, + rspec, rts_preamble_type, + preamble_type, ampdu_len, + true); + rts->duration = cpu_to_le16(durid); + durid = wlc_compute_rtscts_dur(wlc, use_cts, + rts_rspec_fallback, + rspec_fallback, + rts_fbr_preamble_type, + fbr_preamble_type, + ampdu_len, true); + txh->RTSDurFallback = cpu_to_le16(durid); + /* set TxFesTimeNormal */ + txh->TxFesTimeNormal = rts->duration; + /* set fallback rate version of TxFesTimeNormal */ + txh->TxFesTimeFallback = txh->RTSDurFallback; + } + + /* set flag and plcp for fallback rate */ + if (fbr) { + mch |= TXC_AMPDU_FBR; + txh->MacTxControlHigh = cpu_to_le16(mch); + WLC_SET_MIMO_PLCP_AMPDU(plcp); + WLC_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback); + } + + BCMMSG(wlc->wiphy, "wl%d: count %d ampdu_len %d\n", + wlc->pub->unit, count, ampdu_len); + + /* inform rate_sel if it this is a rate probe pkt */ + frameid = le16_to_cpu(txh->TxFrameID); + if (frameid & TXFID_RATE_PROBE_MASK) { + wiphy_err(wiphy, "%s: XXX what to do with " + "TXFID_RATE_PROBE_MASK!?\n", __func__); + } + for (i = 0; i < count; i++) + wlc_txfifo(wlc, fifo, pkt[i], i == (count - 1), + ampdu->txpkt_weight); + + } + /* endif (count) */ + return err; +} + +void +wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, tx_status_t *txs) +{ + scb_ampdu_t *scb_ampdu; + struct wlc_info *wlc = ampdu->wlc; + scb_ampdu_tid_ini_t *ini; + u32 s1 = 0, s2 = 0; + struct ieee80211_tx_info *tx_info; + + tx_info = IEEE80211_SKB_CB(p); + + /* BMAC_NOTE: For the split driver, second level txstatus comes later + * So if the ACK was received then wait for the second level else just + * call the first one + */ + if (txs->status & TX_STATUS_ACK_RCV) { + u8 status_delay = 0; + + /* wait till the next 8 bytes of txstatus is available */ + while (((s1 = R_REG(&wlc->regs->frmtxstatus)) & TXS_V) == 0) { + udelay(1); + status_delay++; + if (status_delay > 10) { + return; /* error condition */ + } + } + + s2 = R_REG(&wlc->regs->frmtxstatus2); + } + + if (likely(scb)) { + scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + ini = SCB_AMPDU_INI(scb_ampdu, p->priority); + wlc_ampdu_dotxstatus_complete(ampdu, scb, p, txs, s1, s2); + } else { + /* loop through all pkts and free */ + u8 queue = txs->frameid & TXFID_QUEUE_MASK; + d11txh_t *txh; + u16 mcl; + while (p) { + tx_info = IEEE80211_SKB_CB(p); + txh = (d11txh_t *) p->data; + mcl = le16_to_cpu(txh->MacTxControlLow); + brcmu_pkt_buf_free_skb(p); + /* break out if last packet of ampdu */ + if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == + TXC_AMPDU_LAST) + break; + p = GETNEXTTXP(wlc, queue); + } + wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); + } + wlc_ampdu_txflowcontrol(wlc, scb_ampdu, ini); +} + +static void +rate_status(struct wlc_info *wlc, struct ieee80211_tx_info *tx_info, + tx_status_t *txs, u8 mcs) +{ + struct ieee80211_tx_rate *txrate = tx_info->status.rates; + int i; + + /* clear the rest of the rates */ + for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) { + txrate[i].idx = -1; + txrate[i].count = 0; + } +} + +#define SHORTNAME "AMPDU status" + +static void +wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, tx_status_t *txs, + u32 s1, u32 s2) +{ + scb_ampdu_t *scb_ampdu; + struct wlc_info *wlc = ampdu->wlc; + scb_ampdu_tid_ini_t *ini; + u8 bitmap[8], queue, tid; + d11txh_t *txh; + u8 *plcp; + struct ieee80211_hdr *h; + u16 seq, start_seq = 0, bindex, index, mcl; + u8 mcs = 0; + bool ba_recd = false, ack_recd = false; + u8 suc_mpdu = 0, tot_mpdu = 0; + uint supr_status; + bool update_rate = true, retry = true, tx_error = false; + u16 mimoantsel = 0; + u8 antselid = 0; + u8 retry_limit, rr_retry_limit; + struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(p); + struct wiphy *wiphy = wlc->wiphy; + +#ifdef BCMDBG + u8 hole[AMPDU_MAX_MPDU]; + memset(hole, 0, sizeof(hole)); +#endif + + scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + tid = (u8) (p->priority); + + ini = SCB_AMPDU_INI(scb_ampdu, tid); + retry_limit = ampdu->retry_limit_tid[tid]; + rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; + memset(bitmap, 0, sizeof(bitmap)); + queue = txs->frameid & TXFID_QUEUE_MASK; + supr_status = txs->status & TX_STATUS_SUPR_MASK; + + if (txs->status & TX_STATUS_ACK_RCV) { + if (TX_STATUS_SUPR_UF == supr_status) { + update_rate = false; + } + + WARN_ON(!(txs->status & TX_STATUS_INTERMEDIATE)); + start_seq = txs->sequence >> SEQNUM_SHIFT; + bitmap[0] = (txs->status & TX_STATUS_BA_BMAP03_MASK) >> + TX_STATUS_BA_BMAP03_SHIFT; + + WARN_ON(s1 & TX_STATUS_INTERMEDIATE); + WARN_ON(!(s1 & TX_STATUS_AMPDU)); + + bitmap[0] |= + (s1 & TX_STATUS_BA_BMAP47_MASK) << + TX_STATUS_BA_BMAP47_SHIFT; + bitmap[1] = (s1 >> 8) & 0xff; + bitmap[2] = (s1 >> 16) & 0xff; + bitmap[3] = (s1 >> 24) & 0xff; + + bitmap[4] = s2 & 0xff; + bitmap[5] = (s2 >> 8) & 0xff; + bitmap[6] = (s2 >> 16) & 0xff; + bitmap[7] = (s2 >> 24) & 0xff; + + ba_recd = true; + } else { + if (supr_status) { + update_rate = false; + if (supr_status == TX_STATUS_SUPR_BADCH) { + wiphy_err(wiphy, "%s: Pkt tx suppressed, " + "illegal channel possibly %d\n", + __func__, CHSPEC_CHANNEL( + wlc->default_bss->chanspec)); + } else { + if (supr_status != TX_STATUS_SUPR_FRAG) + wiphy_err(wiphy, "%s: wlc_ampdu_dotx" + "status:supr_status 0x%x\n", + __func__, supr_status); + } + /* no need to retry for badch; will fail again */ + if (supr_status == TX_STATUS_SUPR_BADCH || + supr_status == TX_STATUS_SUPR_EXPTIME) { + retry = false; + } else if (supr_status == TX_STATUS_SUPR_EXPTIME) { + /* TX underflow : try tuning pre-loading or ampdu size */ + } else if (supr_status == TX_STATUS_SUPR_FRAG) { + /* if there were underflows, but pre-loading is not active, + notify rate adaptation. + */ + if (wlc_ffpld_check_txfunfl(wlc, prio2fifo[tid]) + > 0) { + tx_error = true; + } + } + } else if (txs->phyerr) { + update_rate = false; + wiphy_err(wiphy, "wl%d: wlc_ampdu_dotxstatus: tx phy " + "error (0x%x)\n", wlc->pub->unit, + txs->phyerr); + + if (WL_ERROR_ON()) { + brcmu_prpkt("txpkt (AMPDU)", p); + wlc_print_txdesc((d11txh_t *) p->data); + } + wlc_print_txstatus(txs); + } + } + + /* loop through all pkts and retry if not acked */ + while (p) { + tx_info = IEEE80211_SKB_CB(p); + txh = (d11txh_t *) p->data; + mcl = le16_to_cpu(txh->MacTxControlLow); + plcp = (u8 *) (txh + 1); + h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); + seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT; + + if (tot_mpdu == 0) { + mcs = plcp[0] & MIMO_PLCP_MCS_MASK; + mimoantsel = le16_to_cpu(txh->ABI_MimoAntSel); + } + + index = TX_SEQ_TO_INDEX(seq); + ack_recd = false; + if (ba_recd) { + bindex = MODSUB_POW2(seq, start_seq, SEQNUM_MAX); + BCMMSG(wlc->wiphy, "tid %d seq %d," + " start_seq %d, bindex %d set %d, index %d\n", + tid, seq, start_seq, bindex, + isset(bitmap, bindex), index); + /* if acked then clear bit and free packet */ + if ((bindex < AMPDU_TX_BA_MAX_WSIZE) + && isset(bitmap, bindex)) { + ini->tx_in_transit--; + ini->txretry[index] = 0; + + /* ampdu_ack_len: number of acked aggregated frames */ + /* ampdu_len: number of aggregated frames */ + rate_status(wlc, tx_info, txs, mcs); + tx_info->flags |= IEEE80211_TX_STAT_ACK; + tx_info->flags |= IEEE80211_TX_STAT_AMPDU; + tx_info->status.ampdu_ack_len = + tx_info->status.ampdu_len = 1; + + skb_pull(p, D11_PHY_HDR_LEN); + skb_pull(p, D11_TXH_LEN); + + ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, + p); + ack_recd = true; + suc_mpdu++; + } + } + /* either retransmit or send bar if ack not recd */ + if (!ack_recd) { + struct ieee80211_tx_rate *txrate = + tx_info->status.rates; + if (retry && (txrate[0].count < (int)retry_limit)) { + ini->txretry[index]++; + ini->tx_in_transit--; + /* Use high prededence for retransmit to give some punch */ + /* wlc_txq_enq(wlc, scb, p, WLC_PRIO_TO_PREC(tid)); */ + wlc_txq_enq(wlc, scb, p, + WLC_PRIO_TO_HI_PREC(tid)); + } else { + /* Retry timeout */ + ini->tx_in_transit--; + ieee80211_tx_info_clear_status(tx_info); + tx_info->status.ampdu_ack_len = 0; + tx_info->status.ampdu_len = 1; + tx_info->flags |= + IEEE80211_TX_STAT_AMPDU_NO_BACK; + skb_pull(p, D11_PHY_HDR_LEN); + skb_pull(p, D11_TXH_LEN); + wiphy_err(wiphy, "%s: BA Timeout, seq %d, in_" + "transit %d\n", SHORTNAME, seq, + ini->tx_in_transit); + ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, + p); + } + } + tot_mpdu++; + + /* break out if last packet of ampdu */ + if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == + TXC_AMPDU_LAST) + break; + + p = GETNEXTTXP(wlc, queue); + } + wlc_send_q(wlc); + + /* update rate state */ + antselid = wlc_antsel_antsel2id(wlc->asi, mimoantsel); + + wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); +} + +/* initialize the initiator code for tid */ +static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, + scb_ampdu_t *scb_ampdu, + u8 tid, bool override) +{ + scb_ampdu_tid_ini_t *ini; + + /* check for per-tid control of ampdu */ + if (!ampdu->ini_enable[tid]) { + wiphy_err(ampdu->wlc->wiphy, "%s: Rejecting tid %d\n", + __func__, tid); + return NULL; + } + + ini = SCB_AMPDU_INI(scb_ampdu, tid); + ini->tid = tid; + ini->scb = scb_ampdu->scb; + ini->magic = INI_MAGIC; + return ini; +} + +static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on) +{ + struct wlc_info *wlc = ampdu->wlc; + + wlc->pub->_ampdu = false; + + if (on) { + if (!N_ENAB(wlc->pub)) { + wiphy_err(ampdu->wlc->wiphy, "wl%d: driver not " + "nmode enabled\n", wlc->pub->unit); + return -ENOTSUPP; + } + if (!wlc_ampdu_cap(ampdu)) { + wiphy_err(ampdu->wlc->wiphy, "wl%d: device not " + "ampdu capable\n", wlc->pub->unit); + return -ENOTSUPP; + } + wlc->pub->_ampdu = on; + } + + return 0; +} + +static bool wlc_ampdu_cap(struct ampdu_info *ampdu) +{ + if (WLC_PHY_11N_CAP(ampdu->wlc->band)) + return true; + else + return false; +} + +static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur) +{ + u32 rate, mcs; + + for (mcs = 0; mcs < MCS_TABLE_SIZE; mcs++) { + /* rate is in Kbps; dur is in msec ==> len = (rate * dur) / 8 */ + /* 20MHz, No SGI */ + rate = MCS_RATE(mcs, false, false); + ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3; + /* 40 MHz, No SGI */ + rate = MCS_RATE(mcs, true, false); + ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3; + /* 20MHz, SGI */ + rate = MCS_RATE(mcs, false, true); + ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3; + /* 40 MHz, SGI */ + rate = MCS_RATE(mcs, true, true); + ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3; + } +} + +void wlc_ampdu_macaddr_upd(struct wlc_info *wlc) +{ + char template[T_RAM_ACCESS_SZ * 2]; + + /* driver needs to write the ta in the template; ta is at offset 16 */ + memset(template, 0, sizeof(template)); + memcpy(template, wlc->pub->cur_etheraddr, ETH_ALEN); + wlc_write_template_ram(wlc, (T_BA_TPL_BASE + 16), (T_RAM_ACCESS_SZ * 2), + template); +} + +bool wlc_aggregatable(struct wlc_info *wlc, u8 tid) +{ + return wlc->ampdu->ini_enable[tid]; +} + +void wlc_ampdu_shm_upd(struct ampdu_info *ampdu) +{ + struct wlc_info *wlc = ampdu->wlc; + + /* Extend ucode internal watchdog timer to match larger received frames */ + if ((ampdu->rx_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) == + IEEE80211_HT_MAX_AMPDU_64K) { + wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX); + wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX); + } else { + wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF); + wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF); + } +} + +/* + * callback function that helps flushing ampdu packets from a priority queue + */ +static bool cb_del_ampdu_pkt(struct sk_buff *mpdu, void *arg_a) +{ + struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(mpdu); + struct cb_del_ampdu_pars *ampdu_pars = + (struct cb_del_ampdu_pars *)arg_a; + bool rc; + + rc = tx_info->flags & IEEE80211_TX_CTL_AMPDU ? true : false; + rc = rc && (tx_info->control.sta == NULL || ampdu_pars->sta == NULL || + tx_info->control.sta == ampdu_pars->sta); + rc = rc && ((u8)(mpdu->priority) == ampdu_pars->tid); + return rc; +} + +/* + * callback function that helps invalidating ampdu packets in a DMA queue + */ +static void dma_cb_fn_ampdu(void *txi, void *arg_a) +{ + struct ieee80211_sta *sta = arg_a; + struct ieee80211_tx_info *tx_info = (struct ieee80211_tx_info *)txi; + + if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && + (tx_info->control.sta == sta || sta == NULL)) + tx_info->control.sta = NULL; +} + +/* + * When a remote party is no longer available for ampdu communication, any + * pending tx ampdu packets in the driver have to be flushed. + */ +void wlc_ampdu_flush(struct wlc_info *wlc, + struct ieee80211_sta *sta, u16 tid) +{ + struct wlc_txq_info *qi = wlc->pkt_queue; + struct pktq *pq = &qi->q; + int prec; + struct cb_del_ampdu_pars ampdu_pars; + + ampdu_pars.sta = sta; + ampdu_pars.tid = tid; + for (prec = 0; prec < pq->num_prec; prec++) { + brcmu_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, + (void *)&du_pars); + } + wlc_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu); +} diff --git a/drivers/staging/brcm80211/brcmsmac/ampdu.h b/drivers/staging/brcm80211/brcmsmac/ampdu.h new file mode 100644 index 0000000..df7d7d9 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_AMPDU_H_ +#define _BRCM_AMPDU_H_ + +extern struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc); +extern void wlc_ampdu_detach(struct ampdu_info *ampdu); +extern int wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, + struct sk_buff **aggp, int prec); +extern void wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, tx_status_t *txs); +extern void wlc_ampdu_macaddr_upd(struct wlc_info *wlc); +extern void wlc_ampdu_shm_upd(struct ampdu_info *ampdu); + +#endif /* _BRCM_AMPDU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c new file mode 100644 index 0000000..31bc7c4 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/antsel.c @@ -0,0 +1,322 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include "dma.h" + +#include "d11.h" +#include "rate.h" +#include "key.h" +#include "scb.h" +#include "pub.h" +#include "phy/phy_hal.h" +#include "bottom_mac.h" +#include "channel.h" +#include "main.h" +#include "antsel.h" + +#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ +#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ +#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ +#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ +#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ +#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ + +/* useful macros */ +#define WLC_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf) +#define WLC_ANTSEL_11N_1(ant) (((ant) & ANT_SELCFG_MASK) & 0xf) +#define WLC_ANTIDX_11N(ant) (((WLC_ANTSEL_11N_0(ant)) << 2) + (WLC_ANTSEL_11N_1(ant))) +#define WLC_ANT_ISAUTO_11N(ant) (((ant) & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) +#define WLC_ANTSEL_11N(ant) ((ant) & ANT_SELCFG_MASK) + +/* antenna switch */ +/* defines for no boardlevel antenna diversity */ +#define ANT_SELCFG_DEF_2x2 0x01 /* default antenna configuration */ + +/* 2x3 antdiv defines and tables for GPIO communication */ +#define ANT_SELCFG_NUM_2x3 3 +#define ANT_SELCFG_DEF_2x3 0x01 /* default antenna configuration */ + +/* 2x4 antdiv rev4 defines and tables for GPIO communication */ +#define ANT_SELCFG_NUM_2x4 4 +#define ANT_SELCFG_DEF_2x4 0x02 /* default antenna configuration */ + +/* static functions */ +static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel); +static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id); +static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg); +static void wlc_antsel_init_cfg(struct antsel_info *asi, + wlc_antselcfg_t *antsel, + bool auto_sel); + +const u16 mimo_2x4_div_antselpat_tbl[] = { + 0, 0, 0x9, 0xa, /* ant0: 0 ant1: 2,3 */ + 0, 0, 0x5, 0x6, /* ant0: 1 ant1: 2,3 */ + 0, 0, 0, 0, /* n.a. */ + 0, 0, 0, 0 /* n.a. */ +}; + +const u8 mimo_2x4_div_antselid_tbl[16] = { + 0, 0, 0, 0, 0, 2, 3, 0, + 0, 0, 1, 0, 0, 0, 0, 0 /* pat to antselid */ +}; + +const u16 mimo_2x3_div_antselpat_tbl[] = { + 16, 0, 1, 16, /* ant0: 0 ant1: 1,2 */ + 16, 16, 16, 16, /* n.a. */ + 16, 2, 16, 16, /* ant0: 2 ant1: 1 */ + 16, 16, 16, 16 /* n.a. */ +}; + +const u8 mimo_2x3_div_antselid_tbl[16] = { + 0, 1, 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 /* pat to antselid */ +}; + +struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc) +{ + struct antsel_info *asi; + + asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC); + if (!asi) { + wiphy_err(wlc->wiphy, "wl%d: wlc_antsel_attach: out of mem\n", + wlc->pub->unit); + return NULL; + } + + asi->wlc = wlc; + asi->pub = wlc->pub; + asi->antsel_type = ANTSEL_NA; + asi->antsel_avail = false; + asi->antsel_antswitch = (u8) getintvar(asi->pub->vars, "antswitch"); + + if ((asi->pub->sromrev >= 4) && (asi->antsel_antswitch != 0)) { + switch (asi->antsel_antswitch) { + case ANTSWITCH_TYPE_1: + case ANTSWITCH_TYPE_2: + case ANTSWITCH_TYPE_3: + /* 4321/2 board with 2x3 switch logic */ + asi->antsel_type = ANTSEL_2x3; + /* Antenna selection availability */ + if (((u16) getintvar(asi->pub->vars, "aa2g") == 7) || + ((u16) getintvar(asi->pub->vars, "aa5g") == 7)) { + asi->antsel_avail = true; + } else + if (((u16) getintvar(asi->pub->vars, "aa2g") == + 3) + || ((u16) getintvar(asi->pub->vars, "aa5g") + == 3)) { + asi->antsel_avail = false; + } else { + asi->antsel_avail = false; + wiphy_err(wlc->wiphy, "wlc_antsel_attach: 2o3 " + "board cfg invalid\n"); + } + break; + default: + break; + } + } else if ((asi->pub->sromrev == 4) && + ((u16) getintvar(asi->pub->vars, "aa2g") == 7) && + ((u16) getintvar(asi->pub->vars, "aa5g") == 0)) { + /* hack to match old 4321CB2 cards with 2of3 antenna switch */ + asi->antsel_type = ANTSEL_2x3; + asi->antsel_avail = true; + } else if (asi->pub->boardflags2 & BFL2_2X4_DIV) { + asi->antsel_type = ANTSEL_2x4; + asi->antsel_avail = true; + } + + /* Set the antenna selection type for the low driver */ + wlc_bmac_antsel_type_set(wlc->hw, asi->antsel_type); + + /* Init (auto/manual) antenna selection */ + wlc_antsel_init_cfg(asi, &asi->antcfg_11n, true); + wlc_antsel_init_cfg(asi, &asi->antcfg_cur, true); + + return asi; +} + +void wlc_antsel_detach(struct antsel_info *asi) +{ + kfree(asi); +} + +void wlc_antsel_init(struct antsel_info *asi) +{ + if ((asi->antsel_type == ANTSEL_2x3) || + (asi->antsel_type == ANTSEL_2x4)) + wlc_antsel_cfgupd(asi, &asi->antcfg_11n); +} + +/* boardlevel antenna selection: init antenna selection structure */ +static void +wlc_antsel_init_cfg(struct antsel_info *asi, wlc_antselcfg_t *antsel, + bool auto_sel) +{ + if (asi->antsel_type == ANTSEL_2x3) { + u8 antcfg_def = ANT_SELCFG_DEF_2x3 | + ((asi->antsel_avail && auto_sel) ? ANT_SELCFG_AUTO : 0); + antsel->ant_config[ANT_SELCFG_TX_DEF] = antcfg_def; + antsel->ant_config[ANT_SELCFG_TX_UNICAST] = antcfg_def; + antsel->ant_config[ANT_SELCFG_RX_DEF] = antcfg_def; + antsel->ant_config[ANT_SELCFG_RX_UNICAST] = antcfg_def; + antsel->num_antcfg = ANT_SELCFG_NUM_2x3; + + } else if (asi->antsel_type == ANTSEL_2x4) { + + antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x4; + antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x4; + antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x4; + antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x4; + antsel->num_antcfg = ANT_SELCFG_NUM_2x4; + + } else { /* no antenna selection available */ + + antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x2; + antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x2; + antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x2; + antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x2; + antsel->num_antcfg = 0; + } +} + +void +wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, + u8 antselid, u8 fbantselid, u8 *antcfg, + u8 *fbantcfg) +{ + u8 ant; + + /* if use default, assign it and return */ + if (usedef) { + *antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_DEF]; + *fbantcfg = *antcfg; + return; + } + + if (!sel) { + *antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; + *fbantcfg = *antcfg; + + } else { + ant = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; + if ((ant & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) { + *antcfg = wlc_antsel_id2antcfg(asi, antselid); + *fbantcfg = wlc_antsel_id2antcfg(asi, fbantselid); + } else { + *antcfg = + asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; + *fbantcfg = *antcfg; + } + } + return; +} + +/* boardlevel antenna selection: convert mimo_antsel (ucode interface) to id */ +u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel) +{ + u8 antselid = 0; + + if (asi->antsel_type == ANTSEL_2x4) { + /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ + antselid = mimo_2x4_div_antselid_tbl[(antsel & 0xf)]; + return antselid; + + } else if (asi->antsel_type == ANTSEL_2x3) { + /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ + antselid = mimo_2x3_div_antselid_tbl[(antsel & 0xf)]; + return antselid; + } + + return antselid; +} + +/* boardlevel antenna selection: convert id to ant_cfg */ +static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id) +{ + u8 antcfg = ANT_SELCFG_DEF_2x2; + + if (asi->antsel_type == ANTSEL_2x4) { + /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ + antcfg = (((id & 0x2) << 3) | ((id & 0x1) + 2)); + return antcfg; + + } else if (asi->antsel_type == ANTSEL_2x3) { + /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ + antcfg = (((id & 0x02) << 4) | ((id & 0x1) + 1)); + return antcfg; + } + + return antcfg; +} + +/* boardlevel antenna selection: convert ant_cfg to mimo_antsel (ucode interface) */ +static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg) +{ + u8 idx = WLC_ANTIDX_11N(WLC_ANTSEL_11N(ant_cfg)); + u16 mimo_antsel = 0; + + if (asi->antsel_type == ANTSEL_2x4) { + /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ + mimo_antsel = (mimo_2x4_div_antselpat_tbl[idx] & 0xf); + return mimo_antsel; + + } else if (asi->antsel_type == ANTSEL_2x3) { + /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ + mimo_antsel = (mimo_2x3_div_antselpat_tbl[idx] & 0xf); + return mimo_antsel; + } + + return mimo_antsel; +} + +/* boardlevel antenna selection: ucode interface control */ +static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel) +{ + struct wlc_info *wlc = asi->wlc; + u8 ant_cfg; + u16 mimo_antsel; + + /* 1) Update TX antconfig for all frames that are not unicast data + * (aka default TX) + */ + ant_cfg = antsel->ant_config[ANT_SELCFG_TX_DEF]; + mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); + wlc_write_shm(wlc, M_MIMO_ANTSEL_TXDFLT, mimo_antsel); + /* Update driver stats for currently selected default tx/rx antenna config */ + asi->antcfg_cur.ant_config[ANT_SELCFG_TX_DEF] = ant_cfg; + + /* 2) Update RX antconfig for all frames that are not unicast data + * (aka default RX) + */ + ant_cfg = antsel->ant_config[ANT_SELCFG_RX_DEF]; + mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); + wlc_write_shm(wlc, M_MIMO_ANTSEL_RXDFLT, mimo_antsel); + /* Update driver stats for currently selected default tx/rx antenna config */ + asi->antcfg_cur.ant_config[ANT_SELCFG_RX_DEF] = ant_cfg; + + return 0; +} diff --git a/drivers/staging/brcm80211/brcmsmac/antsel.h b/drivers/staging/brcm80211/brcmsmac/antsel.h new file mode 100644 index 0000000..c1b9cef --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/antsel.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_ANTSEL_H_ +#define _BRCM_ANTSEL_H_ + +extern struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc); +extern void wlc_antsel_detach(struct antsel_info *asi); +extern void wlc_antsel_init(struct antsel_info *asi); +extern void wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, + bool sel, + u8 id, u8 fbid, u8 *antcfg, + u8 *fbantcfg); +extern u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel); + +#endif /* _BRCM_ANTSEL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmdma.h b/drivers/staging/brcm80211/brcmsmac/bcmdma.h deleted file mode 100644 index 04908033..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmdma.h +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_DMA_H_ -#define _BRCM_DMA_H_ - -#include "wlc_types.h" /* forward structure declarations */ - -#ifndef _dma_pub_ -#define _dma_pub_ -struct dma_pub; -#endif /* _dma_pub_ */ - -/* DMA structure: - * support two DMA engines: 32 bits address or 64 bit addressing - * basic DMA register set is per channel(transmit or receive) - * a pair of channels is defined for convenience - */ - -/* 32 bits addressing */ - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma32diag_t; - -/* 64 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 ptr; /* last descriptor posted to chip */ - u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ - u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ - u32 status0; /* current descriptor, xmt state */ - u32 status1; /* active descriptor, xmt error */ -} dma64regs_t; - -/* map/unmap direction */ -#define DMA_TX 1 /* TX direction for DMA */ -#define DMA_RX 2 /* RX direction for DMA */ -#define BUS_SWAP32(v) (v) - -/* range param for dma_getnexttxp() and dma_txreclaim */ -typedef enum txd_range { - DMA_RANGE_ALL = 1, - DMA_RANGE_TRANSMITTED, - DMA_RANGE_TRANSFERED -} txd_range_t; - -/* dma function type */ -typedef void (*di_detach_t) (struct dma_pub *dmah); -typedef bool(*di_txreset_t) (struct dma_pub *dmah); -typedef bool(*di_rxreset_t) (struct dma_pub *dmah); -typedef bool(*di_rxidle_t) (struct dma_pub *dmah); -typedef void (*di_txinit_t) (struct dma_pub *dmah); -typedef bool(*di_txenabled_t) (struct dma_pub *dmah); -typedef void (*di_rxinit_t) (struct dma_pub *dmah); -typedef void (*di_txsuspend_t) (struct dma_pub *dmah); -typedef void (*di_txresume_t) (struct dma_pub *dmah); -typedef bool(*di_txsuspended_t) (struct dma_pub *dmah); -typedef bool(*di_txsuspendedidle_t) (struct dma_pub *dmah); -typedef int (*di_txfast_t) (struct dma_pub *dmah, struct sk_buff *p, - bool commit); -typedef int (*di_txunframed_t) (struct dma_pub *dmah, void *p, uint len, - bool commit); -typedef void *(*di_getpos_t) (struct dma_pub *di, bool direction); -typedef void (*di_fifoloopbackenable_t) (struct dma_pub *dmah); -typedef bool(*di_txstopped_t) (struct dma_pub *dmah); -typedef bool(*di_rxstopped_t) (struct dma_pub *dmah); -typedef bool(*di_rxenable_t) (struct dma_pub *dmah); -typedef bool(*di_rxenabled_t) (struct dma_pub *dmah); -typedef void *(*di_rx_t) (struct dma_pub *dmah); -typedef bool(*di_rxfill_t) (struct dma_pub *dmah); -typedef void (*di_txreclaim_t) (struct dma_pub *dmah, txd_range_t range); -typedef void (*di_rxreclaim_t) (struct dma_pub *dmah); -typedef unsigned long (*di_getvar_t) (struct dma_pub *dmah, - const char *name); -typedef void *(*di_getnexttxp_t) (struct dma_pub *dmah, txd_range_t range); -typedef void *(*di_getnextrxp_t) (struct dma_pub *dmah, bool forceall); -typedef void *(*di_peeknexttxp_t) (struct dma_pub *dmah); -typedef void *(*di_peeknextrxp_t) (struct dma_pub *dmah); -typedef void (*di_rxparam_get_t) (struct dma_pub *dmah, u16 *rxoffset, - u16 *rxbufsize); -typedef void (*di_txblock_t) (struct dma_pub *dmah); -typedef void (*di_txunblock_t) (struct dma_pub *dmah); -typedef uint(*di_txactive_t) (struct dma_pub *dmah); -typedef void (*di_txrotate_t) (struct dma_pub *dmah); -typedef void (*di_counterreset_t) (struct dma_pub *dmah); -typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags); -typedef char *(*di_dump_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, - bool dumpring); -typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, - bool dumpring); -typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, - bool dumpring); -typedef uint(*di_rxactive_t) (struct dma_pub *dmah); -typedef uint(*di_txpending_t) (struct dma_pub *dmah); -typedef uint(*di_txcommitted_t) (struct dma_pub *dmah); - -/* dma opsvec */ -typedef struct di_fcn_s { - di_detach_t detach; - di_txinit_t txinit; - di_txreset_t txreset; - di_txenabled_t txenabled; - di_txsuspend_t txsuspend; - di_txresume_t txresume; - di_txsuspended_t txsuspended; - di_txsuspendedidle_t txsuspendedidle; - di_txfast_t txfast; - di_txunframed_t txunframed; - di_getpos_t getpos; - di_txstopped_t txstopped; - di_txreclaim_t txreclaim; - di_getnexttxp_t getnexttxp; - di_peeknexttxp_t peeknexttxp; - di_txblock_t txblock; - di_txunblock_t txunblock; - di_txactive_t txactive; - di_txrotate_t txrotate; - - di_rxinit_t rxinit; - di_rxreset_t rxreset; - di_rxidle_t rxidle; - di_rxstopped_t rxstopped; - di_rxenable_t rxenable; - di_rxenabled_t rxenabled; - di_rx_t rx; - di_rxfill_t rxfill; - di_rxreclaim_t rxreclaim; - di_getnextrxp_t getnextrxp; - di_peeknextrxp_t peeknextrxp; - di_rxparam_get_t rxparam_get; - - di_fifoloopbackenable_t fifoloopbackenable; - di_getvar_t d_getvar; - di_counterreset_t counterreset; - di_ctrlflags_t ctrlflags; - di_dump_t dump; - di_dumptx_t dumptx; - di_dumprx_t dumprx; - di_rxactive_t rxactive; - di_txpending_t txpending; - di_txcommitted_t txcommitted; - uint endnum; -} di_fcn_t; - -/* - * Exported data structure (read-only) - */ -/* export structure */ -struct dma_pub { - const di_fcn_t *di_fn; /* DMA function pointers */ - uint txavail; /* # free tx descriptors */ - uint dmactrlflags; /* dma control flags */ - - /* rx error counters */ - uint rxgiants; /* rx giant frames */ - uint rxnobuf; /* rx out of dma descriptors */ - /* tx error counters */ - uint txnobuf; /* tx out of dma descriptors */ -}; - -extern struct dma_pub *dma_attach(char *name, struct si_pub *sih, - void *dmaregstx, void *dmaregsrx, uint ntxd, - uint nrxd, uint rxbufsize, int rxextheadroom, - uint nrxpost, uint rxoffset, uint *msg_level); - -extern const di_fcn_t dma64proc; - -#define dma_detach(di) (dma64proc.detach(di)) -#define dma_txreset(di) (dma64proc.txreset(di)) -#define dma_rxreset(di) (dma64proc.rxreset(di)) -#define dma_rxidle(di) (dma64proc.rxidle(di)) -#define dma_txinit(di) (dma64proc.txinit(di)) -#define dma_txenabled(di) (dma64proc.txenabled(di)) -#define dma_rxinit(di) (dma64proc.rxinit(di)) -#define dma_txsuspend(di) (dma64proc.txsuspend(di)) -#define dma_txresume(di) (dma64proc.txresume(di)) -#define dma_txsuspended(di) (dma64proc.txsuspended(di)) -#define dma_txsuspendedidle(di) (dma64proc.txsuspendedidle(di)) -#define dma_txfast(di, p, commit) (dma64proc.txfast(di, p, commit)) -#define dma_txunframed(di, p, l, commit)(dma64proc.txunframed(di, p, l, commit)) -#define dma_getpos(di, dir) (dma64proc.getpos(di, dir)) -#define dma_fifoloopbackenable(di) (dma64proc.fifoloopbackenable(di)) -#define dma_txstopped(di) (dma64proc.txstopped(di)) -#define dma_rxstopped(di) (dma64proc.rxstopped(di)) -#define dma_rxenable(di) (dma64proc.rxenable(di)) -#define dma_rxenabled(di) (dma64proc.rxenabled(di)) -#define dma_rx(di) (dma64proc.rx(di)) -#define dma_rxfill(di) (dma64proc.rxfill(di)) -#define dma_txreclaim(di, range) (dma64proc.txreclaim(di, range)) -#define dma_rxreclaim(di) (dma64proc.rxreclaim(di)) -#define dma_getvar(di, name) (dma64proc.d_getvar(di, name)) -#define dma_getnexttxp(di, range) (dma64proc.getnexttxp(di, range)) -#define dma_getnextrxp(di, forceall) (dma64proc.getnextrxp(di, forceall)) -#define dma_peeknexttxp(di) (dma64proc.peeknexttxp(di)) -#define dma_peeknextrxp(di) (dma64proc.peeknextrxp(di)) -#define dma_rxparam_get(di, off, bufs) (dma64proc.rxparam_get(di, off, bufs)) - -#define dma_txblock(di) (dma64proc.txblock(di)) -#define dma_txunblock(di) (dma64proc.txunblock(di)) -#define dma_txactive(di) (dma64proc.txactive(di)) -#define dma_rxactive(di) (dma64proc.rxactive(di)) -#define dma_txrotate(di) (dma64proc.txrotate(di)) -#define dma_counterreset(di) (dma64proc.counterreset(di)) -#define dma_ctrlflags(di, mask, flags) (dma64proc.ctrlflags((di), (mask), (flags))) -#define dma_txpending(di) (dma64proc.txpending(di)) -#define dma_txcommitted(di) (dma64proc.txcommitted(di)) - - -/* return addresswidth allowed - * This needs to be done after SB attach but before dma attach. - * SB attach provides ability to probe backplane and dma core capabilities - * This info is needed by DMA_ALLOC_CONSISTENT in dma attach - */ -extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs); -void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) - (void *pkt, void *arg_a), void *arg_a); - -/* - * DMA(Bug) on some chips seems to declare that the packet is ready, but the - * packet length is not updated yet (by DMA) on the expected time. - * Workaround is to hold processor till DMA updates the length, and stay off - * the bus to allow DMA update the length in buffer - */ -static inline void dma_spin_for_len(uint len, struct sk_buff *head) -{ -#if defined(__mips__) - if (!len) { - while (!(len = *(u16 *) KSEG1ADDR(head->data))) - udelay(1); - - *(u16 *) (head->data) = cpu_to_le16((u16) len); - } -#endif /* defined(__mips__) */ -} - -#endif /* _BRCM_DMA_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c deleted file mode 100644 index baed204..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ /dev/null @@ -1,562 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include "wlc_types.h" -#include -#include -#include -#include -#include - -#define OTPS_GUP_MASK 0x00000f00 -#define OTPS_GUP_SHIFT 8 -#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ -#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ -#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ -#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ - -/* Fields in otpprog in rev >= 21 */ -#define OTPP_COL_MASK 0x000000ff -#define OTPP_COL_SHIFT 0 -#define OTPP_ROW_MASK 0x0000ff00 -#define OTPP_ROW_SHIFT 8 -#define OTPP_OC_MASK 0x0f000000 -#define OTPP_OC_SHIFT 24 -#define OTPP_READERR 0x10000000 -#define OTPP_VALUE_MASK 0x20000000 -#define OTPP_VALUE_SHIFT 29 -#define OTPP_START_BUSY 0x80000000 -#define OTPP_READ 0x40000000 - -/* Opcodes for OTPP_OC field */ -#define OTPPOC_READ 0 -#define OTPPOC_BIT_PROG 1 -#define OTPPOC_VERIFY 3 -#define OTPPOC_INIT 4 -#define OTPPOC_SET 5 -#define OTPPOC_RESET 6 -#define OTPPOC_OCST 7 -#define OTPPOC_ROW_LOCK 8 -#define OTPPOC_PRESCN_TEST 9 - -#define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) - -#define OTPP_TRIES 10000000 /* # of tries for OTPP */ - -#define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ - -/* OTP common function type */ -typedef int (*otp_status_t) (void *oh); -typedef int (*otp_size_t) (void *oh); -typedef void *(*otp_init_t) (struct si_pub *sih); -typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off); -typedef int (*otp_read_region_t) (struct si_pub *sih, int region, u16 *data, - uint *wlen); -typedef int (*otp_nvread_t) (void *oh, char *data, uint *len); - -/* OTP function struct */ -typedef struct otp_fn_s { - otp_size_t size; - otp_read_bit_t read_bit; - otp_init_t init; - otp_read_region_t read_region; - otp_nvread_t nvread; - otp_status_t status; -} otp_fn_t; - -typedef struct { - uint ccrev; /* chipc revision */ - otp_fn_t *fn; /* OTP functions */ - struct si_pub *sih; /* Saved sb handle */ - - /* IPX OTP section */ - u16 wsize; /* Size of otp in words */ - u16 rows; /* Geometry */ - u16 cols; /* Geometry */ - u32 status; /* Flag bits (lock/prog/rv). - * (Reflected only when OTP is power cycled) - */ - u16 hwbase; /* hardware subregion offset */ - u16 hwlim; /* hardware subregion boundary */ - u16 swbase; /* software subregion offset */ - u16 swlim; /* software subregion boundary */ - u16 fbase; /* fuse subregion offset */ - u16 flim; /* fuse subregion boundary */ - int otpgu_base; /* offset to General Use Region */ -} otpinfo_t; - -static otpinfo_t otpinfo; - -/* - * IPX OTP Code - * - * Exported functions: - * ipxotp_status() - * ipxotp_size() - * ipxotp_init() - * ipxotp_read_bit() - * ipxotp_read_region() - * ipxotp_nvread() - * - */ - -#define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w") - -/* OTP layout */ -/* CC revs 21, 24 and 27 OTP General Use Region word offset */ -#define REVA4_OTPGU_BASE 12 - -/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */ -#define REVB8_OTPGU_BASE 20 - -/* CC rev 36 OTP General Use Region word offset */ -#define REV36_OTPGU_BASE 12 - -/* Subregion word offsets in General Use region */ -#define OTPGU_HSB_OFF 0 -#define OTPGU_SFB_OFF 1 -#define OTPGU_CI_OFF 2 -#define OTPGU_P_OFF 3 -#define OTPGU_SROM_OFF 4 - -/* Flag bit offsets in General Use region */ -#define OTPGU_HWP_OFF 60 -#define OTPGU_SWP_OFF 61 -#define OTPGU_CIP_OFF 62 -#define OTPGU_FUSEP_OFF 63 -#define OTPGU_CIP_MSK 0x4000 -#define OTPGU_P_MSK 0xf000 -#define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16) - -/* OTP Size */ -#define OTP_SZ_FU_324 ((roundup(324, 8))/8) /* 324 bits */ -#define OTP_SZ_FU_288 (288/8) /* 288 bits */ -#define OTP_SZ_FU_216 (216/8) /* 216 bits */ -#define OTP_SZ_FU_72 (72/8) /* 72 bits */ -#define OTP_SZ_CHECKSUM (16/8) /* 16 bits */ -#define OTP4315_SWREG_SZ 178 /* 178 bytes */ -#define OTP_SZ_FU_144 (144/8) /* 144 bits */ - -static int ipxotp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->status); -} - -/* Return size in bytes */ -static int ipxotp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)oi->wsize * 2; -} - -static u16 ipxotp_otpr(void *oh, chipcregs_t *cc, uint wn) -{ - otpinfo_t *oi; - - oi = (otpinfo_t *) oh; - - return R_REG(&cc->sromotp[wn]); -} - -static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint k, row, col; - u32 otpp, st; - - row = off / oi->cols; - col = off % oi->cols; - - otpp = OTPP_START_BUSY | - ((OTPPOC_READ << OTPP_OC_SHIFT) & OTPP_OC_MASK) | - ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | - ((col << OTPP_COL_SHIFT) & OTPP_COL_MASK); - W_REG(&cc->otpprog, otpp); - - for (k = 0; - ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) - && (k < OTPP_TRIES); k++) - ; - if (k >= OTPP_TRIES) { - return 0xffff; - } - if (st & OTPP_READERR) { - return 0xffff; - } - st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; - - return (int)st; -} - -/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size, - * osizew is oi->wsize (OTP size - GU size) in words - */ -static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew) -{ - int ret = 0; - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; - break; - case BCM4313_CHIP_ID: - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; - break; - default: - break; /* Don't know about this chip */ - } - - return ret; -} - -static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc) -{ - uint k; - u32 otpp, st; - - /* record word offset of General Use Region for various chipcommon revs */ - if (oi->sih->ccrev == 21 || oi->sih->ccrev == 24 - || oi->sih->ccrev == 27) { - oi->otpgu_base = REVA4_OTPGU_BASE; - } else if (oi->sih->ccrev == 36) { - /* OTP size greater than equal to 2KB (128 words), otpgu_base is similar to rev23 */ - if (oi->wsize >= 128) - oi->otpgu_base = REVB8_OTPGU_BASE; - else - oi->otpgu_base = REV36_OTPGU_BASE; - } else if (oi->sih->ccrev == 23 || oi->sih->ccrev >= 25) { - oi->otpgu_base = REVB8_OTPGU_BASE; - } - - /* First issue an init command so the status is up to date */ - otpp = - OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK); - - W_REG(&cc->otpprog, otpp); - for (k = 0; - ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) - && (k < OTPP_TRIES); k++) - ; - if (k >= OTPP_TRIES) { - return; - } - - /* Read OTP lock bits and subregion programmed indication bits */ - oi->status = R_REG(&cc->otpstatus); - - if ((oi->sih->chip == BCM43224_CHIP_ID) - || (oi->sih->chip == BCM43225_CHIP_ID)) { - u32 p_bits; - p_bits = - (ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) & - OTPGU_P_MSK) - >> OTPGU_P_SHIFT; - oi->status |= (p_bits << OTPS_GUP_SHIFT); - } - - /* - * h/w region base and fuse region limit are fixed to the top and - * the bottom of the general use region. Everything else can be flexible. - */ - oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF; - oi->hwlim = oi->wsize; - if (oi->status & OTPS_GUP_HW) { - oi->hwlim = - ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_HSB_OFF) / 16; - oi->swbase = oi->hwlim; - } else - oi->swbase = oi->hwbase; - - /* subtract fuse and checksum from beginning */ - oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2; - - if (oi->status & OTPS_GUP_SW) { - oi->swlim = - ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_SFB_OFF) / 16; - oi->fbase = oi->swlim; - } else - oi->fbase = oi->swbase; - - oi->flim = oi->wsize; -} - -static void *ipxotp_init(struct si_pub *sih) -{ - uint idx; - chipcregs_t *cc; - otpinfo_t *oi; - - /* Make sure we're running IPX OTP */ - if (!OTPTYPE_IPX(sih->ccrev)) - return NULL; - - /* Make sure OTP is not disabled */ - if (ai_is_otp_disabled(sih)) - return NULL; - - /* Make sure OTP is powered up */ - if (!ai_is_otp_powered(sih)) - return NULL; - - oi = &otpinfo; - - /* Check for otp size */ - switch ((sih->cccaps & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) { - case 0: - /* Nothing there */ - return NULL; - case 1: /* 32x64 */ - oi->rows = 32; - oi->cols = 64; - oi->wsize = 128; - break; - case 2: /* 64x64 */ - oi->rows = 64; - oi->cols = 64; - oi->wsize = 256; - break; - case 5: /* 96x64 */ - oi->rows = 96; - oi->cols = 64; - oi->wsize = 384; - break; - case 7: /* 16x64 *//* 1024 bits */ - oi->rows = 16; - oi->cols = 64; - oi->wsize = 64; - break; - default: - /* Don't know the geometry */ - return NULL; - } - - /* Retrieve OTP region info */ - idx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - _ipxotp_init(oi, cc); - - ai_setcoreidx(sih, idx); - - return (void *)oi; -} - -static int ipxotp_read_region(void *oh, int region, u16 *data, uint *wlen) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint idx; - chipcregs_t *cc; - uint base, i, sz; - - /* Validate region selection */ - switch (region) { - case OTP_HW_RGN: - sz = (uint) oi->hwlim - oi->hwbase; - if (!(oi->status & OTPS_GUP_HW)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->hwbase; - break; - case OTP_SW_RGN: - sz = ((uint) oi->swlim - oi->swbase); - if (!(oi->status & OTPS_GUP_SW)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->swbase; - break; - case OTP_CI_RGN: - sz = OTPGU_CI_SZ; - if (!(oi->status & OTPS_GUP_CI)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->otpgu_base + OTPGU_CI_OFF; - break; - case OTP_FUSE_RGN: - sz = (uint) oi->flim - oi->fbase; - if (!(oi->status & OTPS_GUP_FUSE)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->fbase; - break; - case OTP_ALL_RGN: - sz = ((uint) oi->flim - oi->hwbase); - if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->hwbase; - break; - default: - return -EINVAL; - } - - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - /* Read the data */ - for (i = 0; i < sz; i++) - data[i] = ipxotp_otpr(oh, cc, base + i); - - ai_setcoreidx(oi->sih, idx); - *wlen = sz; - return 0; -} - -static int ipxotp_nvread(void *oh, char *data, uint *len) -{ - return -ENOTSUPP; -} - -static otp_fn_t ipxotp_fn = { - (otp_size_t) ipxotp_size, - (otp_read_bit_t) ipxotp_read_bit, - - (otp_init_t) ipxotp_init, - (otp_read_region_t) ipxotp_read_region, - (otp_nvread_t) ipxotp_nvread, - - (otp_status_t) ipxotp_status -}; - -/* - * otp_status() - * otp_size() - * otp_read_bit() - * otp_init() - * otp_read_region() - * otp_nvread() - */ - -int otp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->status(oh); -} - -int otp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->size(oh); -} - -u16 otp_read_bit(void *oh, uint offset) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint idx = ai_coreidx(oi->sih); - chipcregs_t *cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - u16 readBit = (u16) oi->fn->read_bit(oh, cc, offset); - ai_setcoreidx(oi->sih, idx); - return readBit; -} - -void *otp_init(struct si_pub *sih) -{ - otpinfo_t *oi; - void *ret = NULL; - - oi = &otpinfo; - memset(oi, 0, sizeof(otpinfo_t)); - - oi->ccrev = sih->ccrev; - - if (OTPTYPE_IPX(oi->ccrev)) - oi->fn = &ipxotp_fn; - - if (oi->fn == NULL) { - return NULL; - } - - oi->sih = sih; - - ret = (oi->fn->init) (sih); - - return ret; -} - -int -otp_read_region(struct si_pub *sih, int region, u16 *data, - uint *wlen) { - bool wasup = false; - void *oh; - int err = 0; - - wasup = ai_is_otp_powered(sih); - if (!wasup) - ai_otp_power(sih, true); - - if (!ai_is_otp_powered(sih) || ai_is_otp_disabled(sih)) { - err = -EPERM; - goto out; - } - - oh = otp_init(sih); - if (oh == NULL) { - err = -EBADE; - goto out; - } - - err = (((otpinfo_t *) oh)->fn->read_region) (oh, region, data, wlen); - - out: - if (!wasup) - ai_otp_power(sih, false); - - return err; -} - -int otp_nvread(void *oh, char *data, uint *len) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->nvread(oh, data, len); -} diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/bcmotp.h deleted file mode 100644 index c1eb347..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_OTP_H_ -#define _BRCM_OTP_H_ - -/* OTP regions */ -#define OTP_HW_RGN 1 -#define OTP_SW_RGN 2 -#define OTP_CI_RGN 4 -#define OTP_FUSE_RGN 8 -#define OTP_ALL_RGN 0xf /* From h/w region to end of OTP including checksum */ - -/* OTP Size */ -#define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ - -/* Fixed size subregions sizes in words */ -#define OTPGU_CI_SZ 2 - -/* OTP usage */ -#define OTP4325_FM_DISABLED_OFFSET 188 - -/* Exported functions */ -extern int otp_status(void *oh); -extern int otp_size(void *oh); -extern u16 otp_read_bit(void *oh, uint offset); -extern void *otp_init(struct si_pub *sih); -extern int otp_read_region(struct si_pub *sih, int region, u16 *data, - uint *wlen); -extern int otp_nvread(void *oh, char *data, uint *len); - -#endif /* _BRCM_OTP_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c deleted file mode 100644 index 8b22add..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ /dev/null @@ -1,1332 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include -#include -#include -#include -#include -#include -#include "wlc_types.h" -#include -#include -#include -#include -#include -#include -#include -#include - -#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ - (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \ - ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \ - ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET)) - -#if defined(BCMDBG) -#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */ -#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ -#endif - -/* Maximum srom: 6 Kilobits == 768 bytes */ -#define SROM_MAX 768 - -/* PCI fields */ -#define PCI_F0DEVID 48 - -#define SROM_WORDS 64 - -#define SROM_SSID 2 - -#define SROM_WL1LHMAXP 29 - -#define SROM_WL1LPAB0 30 -#define SROM_WL1LPAB1 31 -#define SROM_WL1LPAB2 32 - -#define SROM_WL1HPAB0 33 -#define SROM_WL1HPAB1 34 -#define SROM_WL1HPAB2 35 - -#define SROM_MACHI_IL0 36 -#define SROM_MACMID_IL0 37 -#define SROM_MACLO_IL0 38 -#define SROM_MACHI_ET1 42 -#define SROM_MACMID_ET1 43 -#define SROM_MACLO_ET1 44 -#define SROM3_MACHI 37 -#define SROM3_MACMID 38 -#define SROM3_MACLO 39 - -#define SROM_BXARSSI2G 40 -#define SROM_BXARSSI5G 41 - -#define SROM_TRI52G 42 -#define SROM_TRI5GHL 43 - -#define SROM_RXPO52G 45 - -#define SROM_AABREV 46 -/* Fields in AABREV */ -#define SROM_BR_MASK 0x00ff -#define SROM_CC_MASK 0x0f00 -#define SROM_CC_SHIFT 8 -#define SROM_AA0_MASK 0x3000 -#define SROM_AA0_SHIFT 12 -#define SROM_AA1_MASK 0xc000 -#define SROM_AA1_SHIFT 14 - -#define SROM_WL0PAB0 47 -#define SROM_WL0PAB1 48 -#define SROM_WL0PAB2 49 - -#define SROM_LEDBH10 50 -#define SROM_LEDBH32 51 - -#define SROM_WL10MAXP 52 - -#define SROM_WL1PAB0 53 -#define SROM_WL1PAB1 54 -#define SROM_WL1PAB2 55 - -#define SROM_ITT 56 - -#define SROM_BFL 57 -#define SROM_BFL2 28 -#define SROM3_BFL2 61 - -#define SROM_AG10 58 - -#define SROM_CCODE 59 - -#define SROM_OPO 60 - -#define SROM3_LEDDC 62 - -#define SROM_CRCREV 63 - -/* SROM Rev 4: Reallocate the software part of the srom to accommodate - * MIMO features. It assumes up to two PCIE functions and 440 bytes - * of usable srom i.e. the usable storage in chips with OTP that - * implements hardware redundancy. - */ - -#define SROM4_WORDS 220 - -#define SROM4_SIGN 32 -#define SROM4_SIGNATURE 0x5372 - -#define SROM4_BREV 33 - -#define SROM4_BFL0 34 -#define SROM4_BFL1 35 -#define SROM4_BFL2 36 -#define SROM4_BFL3 37 -#define SROM5_BFL0 37 -#define SROM5_BFL1 38 -#define SROM5_BFL2 39 -#define SROM5_BFL3 40 - -#define SROM4_MACHI 38 -#define SROM4_MACMID 39 -#define SROM4_MACLO 40 -#define SROM5_MACHI 41 -#define SROM5_MACMID 42 -#define SROM5_MACLO 43 - -#define SROM4_CCODE 41 -#define SROM4_REGREV 42 -#define SROM5_CCODE 34 -#define SROM5_REGREV 35 - -#define SROM4_LEDBH10 43 -#define SROM4_LEDBH32 44 -#define SROM5_LEDBH10 59 -#define SROM5_LEDBH32 60 - -#define SROM4_LEDDC 45 -#define SROM5_LEDDC 45 - -#define SROM4_AA 46 - -#define SROM4_AG10 47 -#define SROM4_AG32 48 - -#define SROM4_TXPID2G 49 -#define SROM4_TXPID5G 51 -#define SROM4_TXPID5GL 53 -#define SROM4_TXPID5GH 55 - -#define SROM4_TXRXC 61 -#define SROM4_TXCHAIN_MASK 0x000f -#define SROM4_TXCHAIN_SHIFT 0 -#define SROM4_RXCHAIN_MASK 0x00f0 -#define SROM4_RXCHAIN_SHIFT 4 -#define SROM4_SWITCH_MASK 0xff00 -#define SROM4_SWITCH_SHIFT 8 - -/* Per-path fields */ -#define MAX_PATH_SROM 4 -#define SROM4_PATH0 64 -#define SROM4_PATH1 87 -#define SROM4_PATH2 110 -#define SROM4_PATH3 133 - -#define SROM4_2G_ITT_MAXP 0 -#define SROM4_2G_PA 1 -#define SROM4_5G_ITT_MAXP 5 -#define SROM4_5GLH_MAXP 6 -#define SROM4_5G_PA 7 -#define SROM4_5GL_PA 11 -#define SROM4_5GH_PA 15 - -/* All the miriad power offsets */ -#define SROM4_2G_CCKPO 156 -#define SROM4_2G_OFDMPO 157 -#define SROM4_5G_OFDMPO 159 -#define SROM4_5GL_OFDMPO 161 -#define SROM4_5GH_OFDMPO 163 -#define SROM4_2G_MCSPO 165 -#define SROM4_5G_MCSPO 173 -#define SROM4_5GL_MCSPO 181 -#define SROM4_5GH_MCSPO 189 -#define SROM4_CDDPO 197 -#define SROM4_STBCPO 198 -#define SROM4_BW40PO 199 -#define SROM4_BWDUPPO 200 - -#define SROM4_CRCREV 219 - -/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. - * This is acombined srom for both MIMO and SISO boards, usable in - * the .130 4Kilobit OTP with hardware redundancy. - */ -#define SROM8_BREV 65 - -#define SROM8_BFL0 66 -#define SROM8_BFL1 67 -#define SROM8_BFL2 68 -#define SROM8_BFL3 69 - -#define SROM8_MACHI 70 -#define SROM8_MACMID 71 -#define SROM8_MACLO 72 - -#define SROM8_CCODE 73 -#define SROM8_REGREV 74 - -#define SROM8_LEDBH10 75 -#define SROM8_LEDBH32 76 - -#define SROM8_LEDDC 77 - -#define SROM8_AA 78 - -#define SROM8_AG10 79 -#define SROM8_AG32 80 - -#define SROM8_TXRXC 81 - -#define SROM8_BXARSSI2G 82 -#define SROM8_BXARSSI5G 83 -#define SROM8_TRI52G 84 -#define SROM8_TRI5GHL 85 -#define SROM8_RXPO52G 86 - -#define SROM8_FEM2G 87 -#define SROM8_FEM5G 88 -#define SROM8_FEM_ANTSWLUT_MASK 0xf800 -#define SROM8_FEM_ANTSWLUT_SHIFT 11 -#define SROM8_FEM_TR_ISO_MASK 0x0700 -#define SROM8_FEM_TR_ISO_SHIFT 8 -#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 -#define SROM8_FEM_PDET_RANGE_SHIFT 3 -#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 -#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 -#define SROM8_FEM_TSSIPOS_MASK 0x0001 -#define SROM8_FEM_TSSIPOS_SHIFT 0 - -#define SROM8_THERMAL 89 - -/* Temp sense related entries */ -#define SROM8_MPWR_RAWTS 90 -#define SROM8_TS_SLP_OPT_CORRX 91 -/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ -#define SROM8_FOC_HWIQ_IQSWP 92 - -/* Temperature delta for PHY calibration */ -#define SROM8_PHYCAL_TEMPDELTA 93 - -/* Per-path offsets & fields */ -#define SROM8_PATH0 96 -#define SROM8_PATH1 112 -#define SROM8_PATH2 128 -#define SROM8_PATH3 144 - -#define SROM8_2G_ITT_MAXP 0 -#define SROM8_2G_PA 1 -#define SROM8_5G_ITT_MAXP 4 -#define SROM8_5GLH_MAXP 5 -#define SROM8_5G_PA 6 -#define SROM8_5GL_PA 9 -#define SROM8_5GH_PA 12 - -/* All the miriad power offsets */ -#define SROM8_2G_CCKPO 160 - -#define SROM8_2G_OFDMPO 161 -#define SROM8_5G_OFDMPO 163 -#define SROM8_5GL_OFDMPO 165 -#define SROM8_5GH_OFDMPO 167 - -#define SROM8_2G_MCSPO 169 -#define SROM8_5G_MCSPO 177 -#define SROM8_5GL_MCSPO 185 -#define SROM8_5GH_MCSPO 193 - -#define SROM8_CDDPO 201 -#define SROM8_STBCPO 202 -#define SROM8_BW40PO 203 -#define SROM8_BWDUPPO 204 - -/* SISO PA parameters are in the path0 spaces */ -#define SROM8_SISO 96 - -/* Legacy names for SISO PA paramters */ -#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) -#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) -#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) -#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) -#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) -#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) -#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) -#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) -#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) -#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) -#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) -#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) -#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) -#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) -#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) - -/* SROM REV 9 */ -#define SROM9_2GPO_CCKBW20 160 -#define SROM9_2GPO_CCKBW20UL 161 -#define SROM9_2GPO_LOFDMBW20 162 -#define SROM9_2GPO_LOFDMBW20UL 164 - -#define SROM9_5GLPO_LOFDMBW20 166 -#define SROM9_5GLPO_LOFDMBW20UL 168 -#define SROM9_5GMPO_LOFDMBW20 170 -#define SROM9_5GMPO_LOFDMBW20UL 172 -#define SROM9_5GHPO_LOFDMBW20 174 -#define SROM9_5GHPO_LOFDMBW20UL 176 - -#define SROM9_2GPO_MCSBW20 178 -#define SROM9_2GPO_MCSBW20UL 180 -#define SROM9_2GPO_MCSBW40 182 - -#define SROM9_5GLPO_MCSBW20 184 -#define SROM9_5GLPO_MCSBW20UL 186 -#define SROM9_5GLPO_MCSBW40 188 -#define SROM9_5GMPO_MCSBW20 190 -#define SROM9_5GMPO_MCSBW20UL 192 -#define SROM9_5GMPO_MCSBW40 194 -#define SROM9_5GHPO_MCSBW20 196 -#define SROM9_5GHPO_MCSBW20UL 198 -#define SROM9_5GHPO_MCSBW40 200 - -#define SROM9_PO_MCS32 202 -#define SROM9_PO_LOFDM40DUP 203 - -/* SROM flags (see sromvar_t) */ -#define SRFL_MORE 1 /* value continues as described by the next entry */ -#define SRFL_NOFFS 2 /* value bits can't be all one's */ -#define SRFL_PRHEX 4 /* value is in hexdecimal format */ -#define SRFL_PRSIGN 8 /* value is in signed decimal format */ -#define SRFL_CCODE 0x10 /* value is in country code format */ -#define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ -#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ -#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ - -/* Max. nvram variable table size */ -#define MAXSZ_NVRAM_VARS 4096 - -typedef struct { - const char *name; - u32 revmask; - u32 flags; - u16 off; - u16 mask; -} sromvar_t; - -typedef struct varbuf { - char *base; /* pointer to buffer base */ - char *buf; /* pointer to current position */ - unsigned int size; /* current (residual) size in bytes */ -} varbuf_t; - -/* Assumptions: - * - Ethernet address spans across 3 consective words - * - * Table rules: - * - Add multiple entries next to each other if a value spans across multiple words - * (even multiple fields in the same word) with each entry except the last having - * it's SRFL_MORE bit set. - * - Ethernet address entry does not follow above rule and must not have SRFL_MORE - * bit set. Its SRFL_ETHADDR bit implies it takes multiple words. - * - The last entry's name field must be NULL to indicate the end of the table. Other - * entries must have non-NULL name. - */ -static const sromvar_t pci_sromvars[] = { - {"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff}, - {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, - {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, - {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, - {"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff}, - {"boardflags", 0x00000004, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, - {"", 0, 0, SROM_BFL2, 0xffff}, - {"boardflags", 0x00000008, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, - {"", 0, 0, SROM3_BFL2, 0xffff}, - {"boardflags", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL0, 0xffff}, - {"", 0, 0, SROM4_BFL1, 0xffff}, - {"boardflags", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL0, 0xffff}, - {"", 0, 0, SROM5_BFL1, 0xffff}, - {"boardflags", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 0xffff}, - {"", 0, 0, SROM8_BFL1, 0xffff}, - {"boardflags2", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL2, 0xffff}, - {"", 0, 0, SROM4_BFL3, 0xffff}, - {"boardflags2", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL2, 0xffff}, - {"", 0, 0, SROM5_BFL3, 0xffff}, - {"boardflags2", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 0xffff}, - {"", 0, 0, SROM8_BFL3, 0xffff}, - {"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, - {"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff}, - {"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff}, - {"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff}, - {"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff}, - {"boardnum", 0xffffff00, 0, SROM8_MACLO, 0xffff}, - {"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK}, - {"regrev", 0x00000008, 0, SROM_OPO, 0xff00}, - {"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff}, - {"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff}, - {"regrev", 0xffffff00, 0, SROM8_REGREV, 0x00ff}, - {"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff}, - {"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00}, - {"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff}, - {"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00}, - {"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff}, - {"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00}, - {"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff}, - {"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00}, - {"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff}, - {"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00}, - {"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff}, - {"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00}, - {"ledbh0", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, - {"ledbh1", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, - {"ledbh2", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, - {"ledbh3", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, - {"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff}, - {"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff}, - {"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff}, - {"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff}, - {"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff}, - {"pa0b0", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, - {"pa0b1", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, - {"pa0b2", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, - {"pa0itssit", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00}, - {"pa0maxpwr", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff}, - {"opo", 0x0000000c, 0, SROM_OPO, 0x00ff}, - {"opo", 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff}, - {"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK}, - {"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff}, - {"aa2g", 0xffffff00, 0, SROM8_AA, 0x00ff}, - {"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK}, - {"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00}, - {"aa5g", 0xffffff00, 0, SROM8_AA, 0xff00}, - {"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff}, - {"ag1", 0x0000000e, 0, SROM_AG10, 0xff00}, - {"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff}, - {"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00}, - {"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff}, - {"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00}, - {"ag0", 0xffffff00, 0, SROM8_AG10, 0x00ff}, - {"ag1", 0xffffff00, 0, SROM8_AG10, 0xff00}, - {"ag2", 0xffffff00, 0, SROM8_AG32, 0x00ff}, - {"ag3", 0xffffff00, 0, SROM8_AG32, 0xff00}, - {"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff}, - {"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff}, - {"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff}, - {"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff}, - {"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff}, - {"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff}, - {"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff}, - {"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff}, - {"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff}, - {"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00}, - {"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00}, - {"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00}, - {"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff}, - {"pa1b0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, - {"pa1b1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, - {"pa1b2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, - {"pa1lob0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, - {"pa1lob1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, - {"pa1lob2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, - {"pa1hib0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, - {"pa1hib1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, - {"pa1hib2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, - {"pa1itssit", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00}, - {"pa1maxpwr", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff}, - {"pa1lomaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00}, - {"pa1himaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, - {"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800}, - {"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700}, - {"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0}, - {"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f}, - {"bxa2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800}, - {"rssisav2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700}, - {"rssismc2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0}, - {"rssismf2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f}, - {"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800}, - {"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700}, - {"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0}, - {"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f}, - {"bxa5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800}, - {"rssisav5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700}, - {"rssismc5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0}, - {"rssismf5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f}, - {"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff}, - {"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00}, - {"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff}, - {"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00}, - {"tri2g", 0xffffff00, 0, SROM8_TRI52G, 0x00ff}, - {"tri5g", 0xffffff00, 0, SROM8_TRI52G, 0xff00}, - {"tri5gl", 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff}, - {"tri5gh", 0xffffff00, 0, SROM8_TRI5GHL, 0xff00}, - {"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff}, - {"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00}, - {"rxpo2g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, - {"rxpo5g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, - {"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK}, - {"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK}, - {"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK}, - {"txchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK}, - {"rxchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK}, - {"antswitch", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK}, - {"tssipos2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK}, - {"extpagain2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK}, - {"pdetrange2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK}, - {"triso2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, - {"antswctl2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK}, - {"tssipos5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK}, - {"extpagain5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK}, - {"pdetrange5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK}, - {"triso5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, - {"antswctl5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK}, - {"tempthresh", 0xffffff00, 0, SROM8_THERMAL, 0xff00}, - {"tempoffset", 0xffffff00, 0, SROM8_THERMAL, 0x00ff}, - {"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff}, - {"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00}, - {"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff}, - {"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00}, - {"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff}, - {"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00}, - {"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff}, - {"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00}, - {"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff}, - {"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00}, - {"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff}, - {"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00}, - {"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff}, - {"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00}, - {"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff}, - {"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00}, - - {"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff}, - {"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff}, - {"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff}, - {"ccode", 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff}, - {"macaddr", 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, - {"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff}, - {"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff}, - {"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff}, - {"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff}, - {"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff}, - {"leddc", 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 0xffff}, - {"leddc", 0x000000e0, SRFL_NOFFS | SRFL_LEDDC, SROM5_LEDDC, 0xffff}, - {"leddc", 0x00000010, SRFL_NOFFS | SRFL_LEDDC, SROM4_LEDDC, 0xffff}, - {"leddc", 0x00000008, SRFL_NOFFS | SRFL_LEDDC, SROM3_LEDDC, 0xffff}, - {"rawtempsense", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff}, - {"measpower", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00}, - {"tempsense_slope", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, - 0x00ff}, - {"tempcorrx", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00}, - {"tempsense_option", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, - 0x0300}, - {"freqoffset_corr", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, - 0x000f}, - {"iqcal_swp_dis", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010}, - {"hw_iqcal_en", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020}, - {"phycal_tempdelta", 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff}, - - {"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff}, - {"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, - {"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff}, - {"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff}, - {"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff}, - {"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff}, - {"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff}, - {"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, - {"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, - {"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, - {"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, - {"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, - {"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff}, - {"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff}, - {"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff}, - {"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff}, - {"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff}, - {"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff}, - {"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff}, - {"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff}, - {"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff}, - {"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff}, - {"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff}, - {"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff}, - {"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff}, - {"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff}, - {"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff}, - {"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff}, - {"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff}, - {"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff}, - {"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff}, - {"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff}, - {"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff}, - {"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff}, - {"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff}, - {"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff}, - {"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff}, - {"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff}, - {"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff}, - {"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff}, - {"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff}, - {"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff}, - {"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff}, - {"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff}, - {"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, - {"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, - {"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, - {"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, - {"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, - {"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, - {"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, - {"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, - {"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, - {"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, - {"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, - {"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, - {"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, - {"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, - {"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, - {"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, - {"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, - {"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, - {"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, - {"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, - {"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, - {"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, - {"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, - {"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, - {"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, - {"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, - {"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, - {"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, - {"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, - {"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, - {"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, - {"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, - {"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff}, - {"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff}, - {"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff}, - {"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff}, - {"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff}, - {"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff}, - {"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff}, - {"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, - - /* power per rate from sromrev 9 */ - {"cckbw202gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff}, - {"cckbw20ul2gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, - {"legofdmbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, - {"legofdmbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, - {"legofdmbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, - {"mcsbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw402gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, - {"mcsbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, - {"mcsbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20UL, - 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, - {"mcsbw405ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff}, - {"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, - {"mcs32po", 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff}, - {"legofdm40duppo", 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff}, - - {NULL, 0, 0, 0, 0} -}; - -static const sromvar_t perpath_pci_sromvars[] = { - {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, - {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, - {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, - {"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff}, - {"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff}, - {"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff}, - {"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff}, - {"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff}, - {"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff}, - {"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00}, - {"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff}, - {"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff}, - {"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff}, - {"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff}, - {"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff}, - {"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff}, - {"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff}, - {"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff}, - {"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff}, - {"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff}, - {"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff}, - {"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff}, - {"maxp2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff}, - {"itt2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00}, - {"itt5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00}, - {"pa2gw0a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, - {"pa2gw1a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, - {"pa2gw2a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, - {"maxp5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff}, - {"maxp5gha", 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff}, - {"maxp5gla", 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00}, - {"pa5gw0a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, - {"pa5gw1a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, - {"pa5gw2a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, - {"pa5glw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, - {"pa5glw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff}, - {"pa5glw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff}, - {"pa5ghw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, - {"pa5ghw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff}, - {"pa5ghw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff}, - {NULL, 0, 0, 0, 0} -}; - -static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); -static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, - uint *count); -static int sprom_read_pci(struct si_pub *sih, u16 *sprom, - uint wordoff, u16 *buf, uint nwords, bool check_crc); -#if defined(BCMNVRAMR) -static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz); -#endif -static u16 srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, - uint wordoff, u16 data); - -static int initvars_table(char *start, char *end, - char **vars, uint *count); - -/* Initialization of varbuf structure */ -static void varbuf_init(varbuf_t *b, char *buf, uint size) -{ - b->size = size; - b->base = b->buf = buf; -} - -/* append a null terminated var=value string */ -static int varbuf_append(varbuf_t *b, const char *fmt, ...) -{ - va_list ap; - int r; - size_t len; - char *s; - - if (b->size < 2) - return 0; - - va_start(ap, fmt); - r = vsnprintf(b->buf, b->size, fmt, ap); - va_end(ap); - - /* C99 snprintf behavior returns r >= size on overflow, - * others return -1 on overflow. - * All return -1 on format error. - * We need to leave room for 2 null terminations, one for the current var - * string, and one for final null of the var table. So check that the - * strlen written, r, leaves room for 2 chars. - */ - if ((r == -1) || (r > (int)(b->size - 2))) { - b->size = 0; - return 0; - } - - /* Remove any earlier occurrence of the same variable */ - s = strchr(b->buf, '='); - if (s != NULL) { - len = (size_t) (s - b->buf); - for (s = b->base; s < b->buf;) { - if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') { - len = strlen(s) + 1; - memmove(s, (s + len), - ((b->buf + r + 1) - (s + len))); - b->buf -= len; - b->size += (unsigned int)len; - break; - } - - while (*s++) - ; - } - } - - /* skip over this string's null termination */ - r++; - b->size -= r; - b->buf += r; - - return r; -} - -/* - * Initialize local vars from the right source for this platform. - * Return 0 on success, nonzero on error. - */ -int srom_var_init(struct si_pub *sih, uint bustype, void *curmap, - char **vars, uint *count) -{ - uint len; - - len = 0; - - if (vars == NULL || count == NULL) - return 0; - - *vars = NULL; - *count = 0; - - if (curmap != NULL && bustype == PCI_BUS) - return initvars_srom_pci(sih, curmap, vars, count); - - return -1; -} - -/* In chips with chipcommon rev 32 and later, the srom is in chipcommon, - * not in the bus cores. - */ -static u16 -srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, - uint wordoff, u16 data) -{ - chipcregs_t *cc = (chipcregs_t *) ccregs; - uint wait_cnt = 1000; - - if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) { - W_REG(&cc->sromaddress, wordoff * 2); - if (cmd == SRC_OP_WRITE) - W_REG(&cc->sromdata, data); - } - - W_REG(&cc->sromcontrol, SRC_START | cmd); - - while (wait_cnt--) { - if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0) - break; - } - - if (!wait_cnt) { - return 0xffff; - } - if (cmd == SRC_OP_READ) - return (u16) R_REG(&cc->sromdata); - else - return 0xffff; -} - -static inline void ltoh16_buf(u16 *buf, unsigned int size) -{ - for (size /= 2; size; size--) - *(buf + size) = le16_to_cpu(*(buf + size)); -} - -static inline void htol16_buf(u16 *buf, unsigned int size) -{ - for (size /= 2; size; size--) - *(buf + size) = cpu_to_le16(*(buf + size)); -} - -/* - * Read in and validate sprom. - * Return 0 on success, nonzero on error. - */ -static int -sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, - u16 *buf, uint nwords, bool check_crc) -{ - int err = 0; - uint i; - void *ccregs = NULL; - - /* read the sprom */ - for (i = 0; i < nwords; i++) { - - if (sih->ccrev > 31 && ISSIM_ENAB(sih)) { - /* use indirect since direct is too slow on QT */ - if ((sih->cccaps & CC_CAP_SROM) == 0) - return 1; - - ccregs = (void *)((u8 *) sprom - CC_SROM_OTP); - buf[i] = - srom_cc_cmd(sih, ccregs, SRC_OP_READ, - wordoff + i, 0); - - } else { - if (ISSIM_ENAB(sih)) - buf[i] = R_REG(&sprom[wordoff + i]); - - buf[i] = R_REG(&sprom[wordoff + i]); - } - - } - - /* bypass crc checking for simulation to allow srom hack */ - if (ISSIM_ENAB(sih)) - return err; - - if (check_crc) { - - if (buf[0] == 0xffff) { - /* The hardware thinks that an srom that starts with 0xffff - * is blank, regardless of the rest of the content, so declare - * it bad. - */ - return 1; - } - - /* fixup the endianness so crc8 will pass */ - htol16_buf(buf, nwords * 2); - if (brcmu_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != - CRC8_GOOD_VALUE) { - /* DBG only pci always read srom4 first, then srom8/9 */ - err = 1; - } - /* now correct the endianness of the byte array */ - ltoh16_buf(buf, nwords * 2); - } - return err; -} - -#if defined(BCMNVRAMR) -static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz) -{ - u8 *otp; - uint sz = OTP_SZ_MAX / 2; /* size in words */ - int err = 0; - - otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC); - if (otp == NULL) { - return -EBADE; - } - - err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz); - - memcpy(buf, otp, bufsz); - - kfree(otp); - - /* Check CRC */ - if (buf[0] == 0xffff) { - /* The hardware thinks that an srom that starts with 0xffff - * is blank, regardless of the rest of the content, so declare - * it bad. - */ - return 1; - } - - /* fixup the endianness so crc8 will pass */ - htol16_buf(buf, bufsz); - if (brcmu_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != - CRC8_GOOD_VALUE) { - err = 1; - } - /* now correct the endianness of the byte array */ - ltoh16_buf(buf, bufsz); - - return err; -} -#endif /* defined(BCMNVRAMR) */ -/* -* Create variable table from memory. -* Return 0 on success, nonzero on error. -*/ -static int initvars_table(char *start, char *end, - char **vars, uint *count) -{ - int c = (int)(end - start); - - /* do it only when there is more than just the null string */ - if (c > 1) { - char *vp = kmalloc(c, GFP_ATOMIC); - if (!vp) - return -ENOMEM; - memcpy(vp, start, c); - *vars = vp; - *count = c; - } else { - *vars = NULL; - *count = 0; - } - - return 0; -} - -/* Parse SROM and create name=value pairs. 'srom' points to - * the SROM word array. 'off' specifies the offset of the - * first word 'srom' points to, which should be either 0 or - * SROM3_SWRG_OFF (full SROM or software region). - */ - -static uint mask_shift(u16 mask) -{ - uint i; - for (i = 0; i < (sizeof(mask) << 3); i++) { - if (mask & (1 << i)) - return i; - } - return 0; -} - -static uint mask_width(u16 mask) -{ - int i; - for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) { - if (mask & (1 << i)) - return (uint) (i - mask_shift(mask) + 1); - } - return 0; -} - -static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b) -{ - u16 w; - u32 val; - const sromvar_t *srv; - uint width; - uint flags; - u32 sr = (1 << sromrev); - - varbuf_append(b, "sromrev=%d", sromrev); - - for (srv = pci_sromvars; srv->name != NULL; srv++) { - const char *name; - - if ((srv->revmask & sr) == 0) - continue; - - if (srv->off < off) - continue; - - flags = srv->flags; - name = srv->name; - - /* This entry is for mfgc only. Don't generate param for it, */ - if (flags & SRFL_NOVAR) - continue; - - if (flags & SRFL_ETHADDR) { - u8 ea[ETH_ALEN]; - - ea[0] = (srom[srv->off - off] >> 8) & 0xff; - ea[1] = srom[srv->off - off] & 0xff; - ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff; - ea[3] = srom[srv->off + 1 - off] & 0xff; - ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff; - ea[5] = srom[srv->off + 2 - off] & 0xff; - - varbuf_append(b, "%s=%pM", name, ea); - } else { - w = srom[srv->off - off]; - val = (w & srv->mask) >> mask_shift(srv->mask); - width = mask_width(srv->mask); - - while (srv->flags & SRFL_MORE) { - srv++; - if (srv->off == 0 || srv->off < off) - continue; - - w = srom[srv->off - off]; - val += - ((w & srv->mask) >> mask_shift(srv-> - mask)) << - width; - width += mask_width(srv->mask); - } - - if ((flags & SRFL_NOFFS) - && ((int)val == (1 << width) - 1)) - continue; - - if (flags & SRFL_CCODE) { - if (val == 0) - varbuf_append(b, "ccode="); - else - varbuf_append(b, "ccode=%c%c", - (val >> 8), (val & 0xff)); - } - /* LED Powersave duty cycle has to be scaled: - *(oncount >> 24) (offcount >> 8) - */ - else if (flags & SRFL_LEDDC) { - u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */ - (((val & 0xff)) << 8); /* offcount */ - varbuf_append(b, "leddc=%d", w32); - } else if (flags & SRFL_PRHEX) - varbuf_append(b, "%s=0x%x", name, val); - else if ((flags & SRFL_PRSIGN) - && (val & (1 << (width - 1)))) - varbuf_append(b, "%s=%d", name, - (int)(val | (~0 << width))); - else - varbuf_append(b, "%s=%u", name, val); - } - } - - if (sromrev >= 4) { - /* Do per-path variables */ - uint p, pb, psz; - - if (sromrev >= 8) { - pb = SROM8_PATH0; - psz = SROM8_PATH1 - SROM8_PATH0; - } else { - pb = SROM4_PATH0; - psz = SROM4_PATH1 - SROM4_PATH0; - } - - for (p = 0; p < MAX_PATH_SROM; p++) { - for (srv = perpath_pci_sromvars; srv->name != NULL; - srv++) { - if ((srv->revmask & sr) == 0) - continue; - - if (pb + srv->off < off) - continue; - - /* This entry is for mfgc only. Don't generate param for it, */ - if (srv->flags & SRFL_NOVAR) - continue; - - w = srom[pb + srv->off - off]; - val = (w & srv->mask) >> mask_shift(srv->mask); - width = mask_width(srv->mask); - - /* Cheating: no per-path var is more than 1 word */ - - if ((srv->flags & SRFL_NOFFS) - && ((int)val == (1 << width) - 1)) - continue; - - if (srv->flags & SRFL_PRHEX) - varbuf_append(b, "%s%d=0x%x", srv->name, - p, val); - else - varbuf_append(b, "%s%d=%d", srv->name, - p, val); - } - pb += psz; - } - } -} - -/* - * Initialize nonvolatile variable table from sprom. - * Return 0 on success, nonzero on error. - */ -static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, - uint *count) -{ - u16 *srom, *sromwindow; - u8 sromrev = 0; - u32 sr; - varbuf_t b; - char *vp, *base = NULL; - bool flash = false; - int err = 0; - - /* - * Apply CRC over SROM content regardless SROM is present or not, - * and use variable sromrev's existence in flash to decide - * if we should return an error when CRC fails or read SROM variables - * from flash. - */ - srom = kmalloc(SROM_MAX, GFP_ATOMIC); - if (!srom) - return -2; - - sromwindow = (u16 *) SROM_OFFSET(sih); - if (ai_is_sprom_available(sih)) { - err = - sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS, - true); - - if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || - (((sih->buscoretype == PCIE_CORE_ID) - && (sih->buscorerev >= 6)) - || ((sih->buscoretype == PCI_CORE_ID) - && (sih->buscorerev >= 0xe)))) { - /* sromrev >= 4, read more */ - err = - sprom_read_pci(sih, sromwindow, 0, srom, - SROM4_WORDS, true); - sromrev = srom[SROM4_CRCREV] & 0xff; - } else if (err == 0) { - /* srom is good and is rev < 4 */ - /* top word of sprom contains version and crc8 */ - sromrev = srom[SROM_CRCREV] & 0xff; - /* bcm4401 sroms misprogrammed */ - if (sromrev == 0x10) - sromrev = 1; - } - } -#if defined(BCMNVRAMR) - /* Use OTP if SPROM not available */ - else { - err = otp_read_pci(sih, srom, SROM_MAX); - if (err == 0) - /* OTP only contain SROM rev8/rev9 for now */ - sromrev = srom[SROM4_CRCREV] & 0xff; - else - err = 1; - } -#else - else - err = 1; -#endif - - /* - * We want internal/wltest driver to come up with default - * sromvars so we can program a blank SPROM/OTP. - */ - if (err) { - char *value; - u32 val; - val = 0; - - value = ai_getdevpathvar(sih, "sromrev"); - if (value) { - sromrev = (u8) simple_strtoul(value, NULL, 0); - flash = true; - goto varscont; - } - - value = ai_getnvramflvar(sih, "sromrev"); - if (value) { - err = 0; - goto errout; - } - - { - err = -1; - goto errout; - } - } - - varscont: - /* Bitmask for the sromrev */ - sr = 1 << sromrev; - - /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */ - if ((sr & 0x33e) == 0) { - err = -2; - goto errout; - } - - base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); - if (!base) { - err = -2; - goto errout; - } - - varbuf_init(&b, base, MAXSZ_NVRAM_VARS); - - /* parse SROM into name=value pairs. */ - _initvars_srom_pci(sromrev, srom, 0, &b); - - /* final nullbyte terminator */ - vp = b.buf; - *vp++ = '\0'; - - err = initvars_table(base, vp, vars, count); - - errout: - if (base) - kfree(base); - - kfree(srom); - return err; -} diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c new file mode 100644 index 0000000..365cae0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c @@ -0,0 +1,3599 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "otp.h" +#include +#include +#include +#include "dma.h" + +#include "types.h" +#include "pmu.h" +#include "d11.h" +#include "cfg.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "ucode_loader.h" +#include "antsel.h" +#include "alloc.h" +#include "bottom_mac.h" +#include "mac80211_if.h" + +#define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ + +#define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */ +#define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us, default */ +#define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us, default */ +#define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */ + +#define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ + +#ifndef BMAC_DUP_TO_REMOVE +#define WLC_RM_WAIT_TX_SUSPEND 4 /* Wait Tx Suspend */ + +#define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ + +#endif /* BMAC_DUP_TO_REMOVE */ + +#define DMAREG(wlc_hw, direction, fifonum) \ + ((direction == DMA_TX) ? \ + (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ + (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) + +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 + +/* + * The following table lists the buffer memory allocated to xmt fifos in HW. + * the size is in units of 256bytes(one block), total size is HW dependent + * ucode has default fifo partition, sw can overwrite if necessary + * + * This is documented in twiki under the topic UcodeTxFifo. Please ensure + * the twiki is updated before making changes. + */ + +#define XMTFIFOTBL_STARTREV 20 /* Starting corerev for the fifo size table */ + +static u16 xmtfifo_sz[][NFIFO] = { + {20, 192, 192, 21, 17, 5}, /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ + {9, 58, 22, 14, 14, 5}, /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ + {20, 192, 192, 21, 17, 5}, /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ + {20, 192, 192, 21, 17, 5}, /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ + {9, 58, 22, 14, 14, 5}, /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ +}; + +static void wlc_clkctl_clk(struct wlc_hw_info *wlc, uint mode); +static void wlc_coreinit(struct wlc_info *wlc); + +/* used by wlc_wakeucode_init() */ +static void wlc_write_inits(struct wlc_hw_info *wlc_hw, + const struct d11init *inits); +static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], + const uint nbytes); +static void wlc_ucode_download(struct wlc_hw_info *wlc); +static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); + +/* used by wlc_dpc() */ +static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, + u32 s2); +static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); +static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); + +/* used by wlc_down() */ +static void wlc_flushqueues(struct wlc_info *wlc); + +static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs); +static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw); +static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw); +static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, + uint tx_fifo); +static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo); +static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo); + +/* Low Level Prototypes */ +static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want); +static u16 wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, + u32 sel); +static void wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, + u16 v, u32 sel); +static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk); +static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme); +static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw); +static void wlc_ucode_bsinit(struct wlc_hw_info *wlc_hw); +static bool wlc_validboardtype(struct wlc_hw_info *wlc); +static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw); +static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw); +static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw); +static void wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init); +static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool want, mbool flags); +static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw); +static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw); +static u32 wlc_wlintrsoff(struct wlc_info *wlc); +static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask); +static void wlc_gpio_init(struct wlc_info *wlc); +static void wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, + int len); +static void wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, + int len); +static void wlc_bmac_bsinit(struct wlc_info *wlc, chanspec_t chanspec); +static u32 wlc_setband_inact(struct wlc_info *wlc, uint bandunit); +static void wlc_bmac_setband(struct wlc_hw_info *wlc_hw, uint bandunit, + chanspec_t chanspec); +static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, + bool shortslot); +static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw); +static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, + u8 rate); + +/* === Low Level functions === */ + +void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) +{ + wlc_hw->shortslot = shortslot; + + if (BAND_2G(wlc_bmac_bandtype(wlc_hw)) && wlc_hw->up) { + wlc_suspend_mac_and_wait(wlc_hw->wlc); + wlc_bmac_update_slot_timing(wlc_hw, shortslot); + wlc_enable_mac(wlc_hw->wlc); + } +} + +/* + * Update the slot timing for standard 11b/g (20us slots) + * or shortslot 11g (9us slots) + * The PSM needs to be suspended for this call. + */ +static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, + bool shortslot) +{ + d11regs_t *regs; + + regs = wlc_hw->regs; + + if (shortslot) { + /* 11g short slot: 11a timing */ + W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ + wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); + } else { + /* 11g long slot: 11b timing */ + W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ + wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); + } +} + +static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) +{ + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + /* init microcode host flags */ + wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs); + + /* do band-specific ucode IHR, SHM, and SCR inits */ + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11n0bsinitvals16); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } + } else { + if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11lcn0bsinitvals24); + } else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in" + " core rev %d\n", __func__, + wlc_hw->unit, wlc_hw->corerev); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +/* switch to new band but leave it inactive */ +static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintmask; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + wlc_bmac_core_phy_clk(wlc_hw, OFF); + + wlc_setxband(wlc_hw, bandunit); + + return macintmask; +} + +/* Process received frames */ +/* + * Return true if more frames need to be processed. false otherwise. + * Param 'bound' indicates max. # frames to process before break out. + */ +static bool +wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) +{ + struct sk_buff *p; + struct sk_buff *head = NULL; + struct sk_buff *tail = NULL; + uint n = 0; + uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; + wlc_d11rxhdr_t *wlc_rxhdr = NULL; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + /* gather received frames */ + while ((p = dma_rx(wlc_hw->di[fifo]))) { + + if (!tail) + head = tail = p; + else { + tail->prev = p; + tail = p; + } + + /* !give others some time to run! */ + if (++n >= bound_limit) + break; + } + + /* post more rbufs */ + dma_rxfill(wlc_hw->di[fifo]); + + /* process each frame */ + while ((p = head) != NULL) { + head = head->prev; + p->prev = NULL; + + wlc_rxhdr = (wlc_d11rxhdr_t *) p->data; + + /* compute the RSSI from d11rxhdr and record it in wlc_rxd11hr */ + wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); + + wlc_recv(wlc_hw->wlc, p); + } + + return n >= bound_limit; +} + +/* second-level interrupt processing + * Return true if another dpc needs to be re-scheduled. false otherwise. + * Param 'bounded' indicates if applicable loops should be bounded. + */ +bool wlc_dpc(struct wlc_info *wlc, bool bounded) +{ + u32 macintstatus; + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + bool fatal = false; + struct wiphy *wiphy = wlc->wiphy; + + if (DEVICEREMOVED(wlc)) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return false; + } + + /* grab and clear the saved software intstatus bits */ + macintstatus = wlc->macintstatus; + wlc->macintstatus = 0; + + BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", + wlc_hw->unit, macintstatus); + + WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ + + /* BCN template is available */ + /* ZZZ: Use AP_ACTIVE ? */ + if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) + && (macintstatus & MI_BCNTPL)) { + wlc_update_beacon(wlc); + } + + /* PMQ entry addition */ + if (macintstatus & MI_PMQ) { + } + + /* tx status */ + if (macintstatus & MI_TFS) { + if (wlc_bmac_txstatus(wlc->hw, bounded, &fatal)) + wlc->macintstatus |= MI_TFS; + if (fatal) { + wiphy_err(wiphy, "MI_TFS: fatal\n"); + goto fatal; + } + } + + if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) + wlc_tbtt(wlc, regs); + + /* ATIM window end */ + if (macintstatus & MI_ATIMWINEND) { + BCMMSG(wlc->wiphy, "end of ATIM window\n"); + OR_REG(®s->maccommand, wlc->qvalid); + wlc->qvalid = 0; + } + + /* received data or control frame, MI_DMAINT is indication of RX_FIFO interrupt */ + if (macintstatus & MI_DMAINT) { + if (wlc_bmac_recv(wlc_hw, RX_FIFO, bounded)) { + wlc->macintstatus |= MI_DMAINT; + } + } + + /* TX FIFO suspend/flush completion */ + if (macintstatus & MI_TXSTOP) { + if (wlc_bmac_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO)) { + /* wiphy_err(wiphy, "dpc: fifo_suspend_comlete\n"); */ + } + } + + /* noise sample collected */ + if (macintstatus & MI_BG_NOISE) { + wlc_phy_noise_sample_intr(wlc_hw->band->pi); + } + + if (macintstatus & MI_GP0) { + wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " + "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); + + printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", + __func__, wlc_hw->sih->chip, + wlc_hw->sih->chiprev); + /* big hammer */ + brcms_init(wlc->wl); + } + + /* gptimer timeout */ + if (macintstatus & MI_TO) { + W_REG(®s->gptimer, 0); + } + + if (macintstatus & MI_RFDISABLE) { + BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" + " RF Disable Input\n", wlc_hw->unit); + brcms_rfkill_set_hw_state(wlc->wl); + } + + /* send any enq'd tx packets. Just makes sure to jump start tx */ + if (!pktq_empty(&wlc->pkt_queue->q)) + wlc_send_q(wlc); + + /* it isn't done and needs to be resched if macintstatus is non-zero */ + return wlc->macintstatus != 0; + + fatal: + brcms_init(wlc->wl); + return wlc->macintstatus != 0; +} + +/* common low-level watchdog code */ +void wlc_bmac_watchdog(void *arg) +{ + struct wlc_info *wlc = (struct wlc_info *) arg; + struct wlc_hw_info *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return; + + /* increment second count */ + wlc_hw->now++; + + /* Check for FIFO error interrupts */ + wlc_bmac_fifoerrors(wlc_hw); + + /* make sure RX dma has buffers */ + dma_rxfill(wlc->hw->di[RX_FIFO]); + + wlc_phy_watchdog(wlc_hw->band->pi); +} + +void +wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute, struct txpwr_limits *txpwr) +{ + uint bandunit; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); + + wlc_hw->chanspec = chanspec; + + /* Switch bands if necessary */ + if (NBANDS_HW(wlc_hw) > 1) { + bandunit = CHSPEC_WLCBANDUNIT(chanspec); + if (wlc_hw->band->bandunit != bandunit) { + /* wlc_bmac_setband disables other bandunit, + * use light band switch if not up yet + */ + if (wlc_hw->up) { + wlc_phy_chanspec_radio_set(wlc_hw-> + bandstate[bandunit]-> + pi, chanspec); + wlc_bmac_setband(wlc_hw, bandunit, chanspec); + } else { + wlc_setxband(wlc_hw, bandunit); + } + } + } + + wlc_phy_initcal_enable(wlc_hw->band->pi, !mute); + + if (!wlc_hw->up) { + if (wlc_hw->clk) + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, + chanspec); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + } else { + wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); + + /* Update muting of the channel */ + wlc_bmac_mute(wlc_hw, mute, 0); + } +} + +int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, wlc_bmac_state_t *state) +{ + state->machwcap = wlc_hw->machwcap; + + return 0; +} + +static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) +{ + uint i; + char name[8]; + /* ucode host flag 2 needed for pio mode, independent of band and fifo */ + u16 pio_mhf2 = 0; + struct wlc_hw_info *wlc_hw = wlc->hw; + uint unit = wlc_hw->unit; + wlc_tunables_t *tune = wlc->pub->tunables; + struct wiphy *wiphy = wlc->wiphy; + + /* name and offsets for dma_attach */ + snprintf(name, sizeof(name), "wl%d", unit); + + if (wlc_hw->di[0] == 0) { /* Init FIFOs */ + uint addrwidth; + int dma_attach_err = 0; + /* Find out the DMA addressing capability and let OS know + * All the channels within one DMA core have 'common-minimum' same + * capability + */ + addrwidth = + dma_addrwidth(wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 0)); + + if (!wl_alloc_dma_resources(wlc_hw->wlc->wl, addrwidth)) { + wiphy_err(wiphy, "wl%d: wlc_attach: alloc_dma_" + "resources failed\n", unit); + return false; + } + + /* + * FIFO 0 + * TX: TX_AC_BK_FIFO (TX AC Background data packets) + * RX: RX_FIFO (RX data packets) + */ + wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, + (wme ? DMAREG(wlc_hw, DMA_TX, 0) : + NULL), DMAREG(wlc_hw, DMA_RX, 0), + (wme ? tune->ntxd : 0), tune->nrxd, + tune->rxbufsz, -1, tune->nrxbufpost, + WL_HWRXOFF, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[0]); + + /* + * FIFO 1 + * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) + * (legacy) TX_DATA_FIFO (TX data packets) + * RX: UNUSED + */ + wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 1), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[1]); + + /* + * FIFO 2 + * TX: TX_AC_VI_FIFO (TX AC Video data packets) + * RX: UNUSED + */ + wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 2), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[2]); + /* + * FIFO 3 + * TX: TX_AC_VO_FIFO (TX AC Voice data packets) + * (legacy) TX_CTL_FIFO (TX control & mgmt packets) + */ + wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 3), + NULL, tune->ntxd, 0, 0, -1, + 0, 0, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[3]); +/* Cleaner to leave this as if with AP defined */ + + if (dma_attach_err) { + wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" + "\n", unit); + return false; + } + + /* get pointer to dma engine tx flow control variable */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) + wlc_hw->txavail[i] = + (uint *) dma_getvar(wlc_hw->di[i], + "&txavail"); + } + + /* initial ucode host flags */ + wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); + + return true; +} + +static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) +{ + uint j; + + for (j = 0; j < NFIFO; j++) { + if (wlc_hw->di[j]) { + dma_detach(wlc_hw->di[j]); + wlc_hw->di[j] = NULL; + } + } +} + +/* low level attach + * run backplane attach, init nvram + * run phy attach + * initialize software state for each core and band + * put the whole chip in reset(driver down state), no clock + */ +int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, + bool piomode, void *regsva, uint bustype, void *btparam) +{ + struct wlc_hw_info *wlc_hw; + d11regs_t *regs; + char *macaddr = NULL; + char *vars; + uint err = 0; + uint j; + bool wme = false; + shared_phy_params_t sha_params; + struct wiphy *wiphy = wlc->wiphy; + + BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, + device); + + wme = true; + + wlc_hw = wlc->hw; + wlc_hw->wlc = wlc; + wlc_hw->unit = unit; + wlc_hw->band = wlc_hw->bandstate[0]; + wlc_hw->_piomode = piomode; + + /* populate struct wlc_hw_info with default values */ + wlc_bmac_info_init(wlc_hw); + + /* + * Do the hardware portion of the attach. + * Also initialize software state that depends on the particular hardware + * we are running. + */ + wlc_hw->sih = ai_attach((uint) device, regsva, bustype, btparam, + &wlc_hw->vars, &wlc_hw->vars_size); + if (wlc_hw->sih == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: si_attach failed\n", + unit); + err = 11; + goto fail; + } + vars = wlc_hw->vars; + + /* + * Get vendid/devid nvram overwrites, which could be different + * than those the BIOS recognizes for devices on PCMCIA_BUS, + * SDIO_BUS, and SROMless devices on PCI_BUS. + */ +#ifdef BCMBUSTYPE + bustype = BCMBUSTYPE; +#endif + if (bustype != SI_BUS) { + char *var; + + var = getvar(vars, "vendid"); + if (var) { + vendor = (u16) simple_strtoul(var, NULL, 0); + wiphy_err(wiphy, "Overriding vendor id = 0x%x\n", + vendor); + } + var = getvar(vars, "devid"); + if (var) { + u16 devid = (u16) simple_strtoul(var, NULL, 0); + if (devid != 0xffff) { + device = devid; + wiphy_err(wiphy, "Overriding device id = 0x%x" + "\n", device); + } + } + + /* verify again the device is supported */ + if (!wlc_chipmatch(vendor, device)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported " + "vendor/device (0x%x/0x%x)\n", + unit, vendor, device); + err = 12; + goto fail; + } + } + + wlc_hw->vendorid = vendor; + wlc_hw->deviceid = device; + + /* set bar0 window to point at D11 core */ + wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); + wlc_hw->corerev = ai_corerev(wlc_hw->sih); + + regs = wlc_hw->regs; + + wlc->regs = wlc_hw->regs; + + /* validate chip, chiprev and corerev */ + if (!wlc_isgoodchip(wlc_hw)) { + err = 13; + goto fail; + } + + /* initialize power control registers */ + ai_clkctl_init(wlc_hw->sih); + + /* request fastclock and force fastclock for the rest of attach + * bring the d11 core out of reset. + * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk is still false; + * But it will be called again inside wlc_corereset, after d11 is out of reset. + */ + wlc_clkctl_clk(wlc_hw, CLK_FAST); + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + if (!wlc_bmac_validate_chip_access(wlc_hw)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: validate_chip_access " + "failed\n", unit); + err = 14; + goto fail; + } + + /* get the board rev, used just below */ + j = getintvar(vars, "boardrev"); + /* promote srom boardrev of 0xFF to 1 */ + if (j == BOARDREV_PROMOTABLE) + j = BOARDREV_PROMOTED; + wlc_hw->boardrev = (u16) j; + if (!wlc_validboardtype(wlc_hw)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported Broadcom " + "board type (0x%x)" " or revision level (0x%x)\n", + unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); + err = 15; + goto fail; + } + wlc_hw->sromrev = (u8) getintvar(vars, "sromrev"); + wlc_hw->boardflags = (u32) getintvar(vars, "boardflags"); + wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); + + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED); + + if ((wlc_hw->sih->bustype == PCI_BUS) + && (ai_pci_war16165(wlc_hw->sih))) + wlc->war16165 = true; + + /* check device id(srom, nvram etc.) to set bands */ + if (wlc_hw->deviceid == BCM43224_D11N_ID || + wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { + /* Dualband boards */ + wlc_hw->_nbands = 2; + } else + wlc_hw->_nbands = 1; + + if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) + wlc_hw->_nbands = 1; + + /* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the + * init of these values + */ + wlc->vendorid = wlc_hw->vendorid; + wlc->deviceid = wlc_hw->deviceid; + wlc->pub->sih = wlc_hw->sih; + wlc->pub->corerev = wlc_hw->corerev; + wlc->pub->sromrev = wlc_hw->sromrev; + wlc->pub->boardrev = wlc_hw->boardrev; + wlc->pub->boardflags = wlc_hw->boardflags; + wlc->pub->boardflags2 = wlc_hw->boardflags2; + wlc->pub->_nbands = wlc_hw->_nbands; + + wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); + + if (wlc_hw->physhim == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_shim_attach " + "failed\n", unit); + err = 25; + goto fail; + } + + /* pass all the parameters to wlc_phy_shared_attach in one struct */ + sha_params.sih = wlc_hw->sih; + sha_params.physhim = wlc_hw->physhim; + sha_params.unit = unit; + sha_params.corerev = wlc_hw->corerev; + sha_params.vars = vars; + sha_params.vid = wlc_hw->vendorid; + sha_params.did = wlc_hw->deviceid; + sha_params.chip = wlc_hw->sih->chip; + sha_params.chiprev = wlc_hw->sih->chiprev; + sha_params.chippkg = wlc_hw->sih->chippkg; + sha_params.sromrev = wlc_hw->sromrev; + sha_params.boardtype = wlc_hw->sih->boardtype; + sha_params.boardrev = wlc_hw->boardrev; + sha_params.boardvendor = wlc_hw->sih->boardvendor; + sha_params.boardflags = wlc_hw->boardflags; + sha_params.boardflags2 = wlc_hw->boardflags2; + sha_params.bustype = wlc_hw->sih->bustype; + sha_params.buscorerev = wlc_hw->sih->buscorerev; + + /* alloc and save pointer to shared phy state area */ + wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); + if (!wlc_hw->phy_sh) { + err = 16; + goto fail; + } + + /* initialize software state for each core and band */ + for (j = 0; j < NBANDS_HW(wlc_hw); j++) { + /* + * band0 is always 2.4Ghz + * band1, if present, is 5Ghz + */ + + /* So if this is a single band 11a card, use band 1 */ + if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) + j = BAND_5G_INDEX; + + wlc_setxband(wlc_hw, j); + + wlc_hw->band->bandunit = j; + wlc_hw->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc->band->bandunit = j; + wlc->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc->core->coreidx = ai_coreidx(wlc_hw->sih); + + wlc_hw->machwcap = R_REG(®s->machwcap); + wlc_hw->machwcap_backup = wlc_hw->machwcap; + + /* init tx fifo size */ + wlc_hw->xmtfifo_sz = + xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; + + /* Get a phy for this band */ + wlc_hw->band->pi = wlc_phy_attach(wlc_hw->phy_sh, + (void *)regs, wlc_bmac_bandtype(wlc_hw), vars, + wlc->wiphy); + if (wlc_hw->band->pi == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_" + "attach failed\n", unit); + err = 17; + goto fail; + } + + wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); + + wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, + &wlc_hw->band->phyrev, + &wlc_hw->band->radioid, + &wlc_hw->band->radiorev); + wlc_hw->band->abgphy_encore = + wlc_phy_get_encore(wlc_hw->band->pi); + wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); + wlc_hw->band->core_flags = + wlc_phy_get_coreflags(wlc_hw->band->pi); + + /* verify good phy_type & supported phy revision */ + if (WLCISNPHY(wlc_hw->band)) { + if (NCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else if (WLCISLCNPHY(wlc_hw->band)) { + if (LCNCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else { + bad_phy: + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: unsupported " + "phy type/rev (%d/%d)\n", unit, + wlc_hw->band->phytype, wlc_hw->band->phyrev); + err = 18; + goto fail; + } + + good_phy: + /* BMAC_NOTE: wlc->band->pi should not be set below and should be done in the + * high level attach. However we can not make that change until all low level access + * is changed to wlc_hw->band->pi. Instead do the wlc->band->pi init below, keeping + * wlc_hw->band->pi as well for incremental update of low level fns, and cut over + * low only init when all fns updated. + */ + wlc->band->pi = wlc_hw->band->pi; + wlc->band->phytype = wlc_hw->band->phytype; + wlc->band->phyrev = wlc_hw->band->phyrev; + wlc->band->radioid = wlc_hw->band->radioid; + wlc->band->radiorev = wlc_hw->band->radiorev; + + /* default contention windows size limits */ + wlc_hw->band->CWmin = APHY_CWMIN; + wlc_hw->band->CWmax = PHY_CWMAX; + + if (!wlc_bmac_attach_dmapio(wlc, j, wme)) { + err = 19; + goto fail; + } + } + + /* disable core to match driver "down" state */ + wlc_coredisable(wlc_hw); + + /* Match driver "down" state */ + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + + /* register sb interrupt callback functions */ + ai_register_intr_callback(wlc_hw->sih, (void *)wlc_wlintrsoff, + (void *)wlc_wlintrsrestore, NULL, wlc); + + /* turn off pll and xtal to match driver "down" state */ + wlc_bmac_xtal(wlc_hw, OFF); + + /* ********************************************************************* + * The hardware is in the DOWN state at this point. D11 core + * or cores are in reset with clocks off, and the board PLLs + * are off if possible. + * + * Beyond this point, wlc->sbclk == false and chip registers + * should not be touched. + ********************************************************************* + */ + + /* init etheraddr state variables */ + macaddr = wlc_get_macaddr(wlc_hw); + if (macaddr == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: macaddr not found\n", + unit); + err = 21; + goto fail; + } + brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); + if (is_broadcast_ether_addr(wlc_hw->etheraddr) || + is_zero_ether_addr(wlc_hw->etheraddr)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", + unit, macaddr); + err = 22; + goto fail; + } + + BCMMSG(wlc->wiphy, + "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", + wlc_hw->deviceid, wlc_hw->_nbands, + wlc_hw->sih->boardtype, macaddr); + + return err; + + fail: + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: failed with err %d\n", unit, + err); + return err; +} + +/* + * Initialize wlc_info default values ... + * may get overrides later in this function + * BMAC_NOTES, move low out and resolve the dangling ones + */ +static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) +{ + struct wlc_info *wlc = wlc_hw->wlc; + + /* set default sw macintmask value */ + wlc->defmacintmask = DEF_MACINTMASK; + + /* various 802.11g modes */ + wlc_hw->shortslot = false; + + wlc_hw->SFBL = RETRY_SHORT_FB; + wlc_hw->LFBL = RETRY_LONG_FB; + + /* default mac retry limits */ + wlc_hw->SRL = RETRY_SHORT_DEF; + wlc_hw->LRL = RETRY_LONG_DEF; + wlc_hw->chanspec = CH20MHZ_CHSPEC(1); +} + +/* + * low level detach + */ +int wlc_bmac_detach(struct wlc_info *wlc) +{ + uint i; + struct wlc_hwband *band; + struct wlc_hw_info *wlc_hw = wlc->hw; + int callbacks; + + callbacks = 0; + + if (wlc_hw->sih) { + /* detach interrupt sync mechanism since interrupt is disabled and per-port + * interrupt object may has been freed. this must be done before sb core switch + */ + ai_deregister_intr_callback(wlc_hw->sih); + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_sleep(wlc_hw->sih); + } + + wlc_bmac_detach_dmapio(wlc_hw); + + band = wlc_hw->band; + for (i = 0; i < NBANDS_HW(wlc_hw); i++) { + if (band->pi) { + /* Detach this band's phy */ + wlc_phy_detach(band->pi); + band->pi = NULL; + } + band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; + } + + /* Free shared phy state */ + wlc_phy_shared_detach(wlc_hw->phy_sh); + + wlc_phy_shim_detach(wlc_hw->physhim); + + /* free vars */ + kfree(wlc_hw->vars); + wlc_hw->vars = NULL; + + if (wlc_hw->sih) { + ai_detach(wlc_hw->sih); + wlc_hw->sih = NULL; + } + + return callbacks; + +} + +void wlc_bmac_reset(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset the core */ + if (!DEVICEREMOVED(wlc_hw->wlc)) + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + /* purge the dma rings */ + wlc_flushqueues(wlc_hw->wlc); + + wlc_reset_bmac_done(wlc_hw->wlc); +} + +void +wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute) { + u32 macintmask; + bool fastclk; + struct wlc_info *wlc = wlc_hw->wlc; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* set up the specified band and chanspec */ + wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + + /* do one-time phy inits and calibration */ + wlc_phy_cal_init(wlc_hw->band->pi); + + /* core-specific initialization */ + wlc_coreinit(wlc); + + /* suspend the tx fifos and mute the phy for preism cac time */ + if (mute) + wlc_bmac_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); + + /* band-specific inits */ + wlc_bmac_bsinit(wlc, chanspec); + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended + * and wlc_enable_mac() will clear this override bit. + */ + mboolset(wlc_hw->wake_override, WLC_WAKE_OVERRIDE_MACSUSPEND); + + /* + * initialize mac_suspend_depth to 1 to match ucode initial suspended state + */ + wlc_hw->mac_suspend_depth = 1; + + /* restore the clk */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) +{ + uint coremask; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of wlc_up(). + */ + wlc_bmac_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* + * Configure pci/pcmcia here instead of in wlc_attach() + * to allow mfg hotswap: down, hotswap (chip power cycle), up. + */ + coremask = (1 << wlc_hw->wlc->core->coreidx); + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_setup(wlc_hw->sih, coremask); + + /* + * Need to read the hwradio status here to cover the case where the system + * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. + */ + if (wlc_bmac_radio_read_hwdisabled(wlc_hw)) { + /* put SB PCI in down state again */ + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + wlc_bmac_xtal(wlc_hw, OFF); + return -ENOMEDIUM; + } + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_up(wlc_hw->sih); + + /* reset the d11 core */ + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + return 0; +} + +int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + wlc_hw->up = true; + wlc_phy_hw_state_upd(wlc_hw->band->pi, true); + + /* FULLY enable dynamic power control and d11 core interrupt */ + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_intrson(wlc_hw->wlc->wl); + return 0; +} + +int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) +{ + bool dev_gone; + uint callbacks = 0; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + /* disable interrupts */ + if (dev_gone) + wlc_hw->wlc->macintmask = 0; + else { + /* now disable interrupts */ + brcms_intrsoff(wlc_hw->wlc->wl); + + /* ensure we're running on the pll clock again */ + wlc_clkctl_clk(wlc_hw, CLK_FAST); + } + /* down phy at the last of this stage */ + callbacks += wlc_phy_down(wlc_hw->band->pi); + + return callbacks; +} + +int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) +{ + uint callbacks = 0; + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + wlc_hw->up = false; + wlc_phy_hw_state_upd(wlc_hw->band->pi, false); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) { + wlc_hw->sbclk = false; + wlc_hw->clk = false; + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + + /* reclaim any posted packets */ + wlc_flushqueues(wlc_hw->wlc); + } else { + + /* Reset and disable the core */ + if (ai_iscoreup(wlc_hw->sih)) { + if (R_REG(&wlc_hw->regs->maccontrol) & + MCTL_EN_MAC) + wlc_suspend_mac_and_wait(wlc_hw->wlc); + callbacks += brcms_reset(wlc_hw->wlc->wl); + wlc_coredisable(wlc_hw); + } + + /* turn off primary xtal and pll */ + if (!wlc_hw->noreset) { + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + wlc_bmac_xtal(wlc_hw, OFF); + } + } + + return callbacks; +} + +void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw) +{ + /* delay before first read of ucode state */ + udelay(40); + + /* wait until ucode is no longer asleep */ + SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) == + DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); +} + +void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea) +{ + memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); +} + +static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw) +{ + return wlc_hw->band->bandtype; +} + +/* control chip clock to save power, enable dynamic clock or force fast clock */ +static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) +{ + if (PMUCTL_ENAB(wlc_hw->sih)) { + /* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane, + * but mac core will still run on ALP(not HT) when it enters powersave mode, + * which means the FCA bit may not be set. + * should wakeup mac if driver wants it to run on HT. + */ + + if (wlc_hw->clk) { + if (mode == CLK_FAST) { + OR_REG(&wlc_hw->regs->clk_ctl_st, + CCS_FORCEHT); + + udelay(64); + + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) == 0), + PMU_MAX_TRANSITION_DLY); + WARN_ON(!(R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL)); + } else { + if ((wlc_hw->sih->pmurev == 0) && + (R_REG + (&wlc_hw->regs-> + clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) + == 0), + PMU_MAX_TRANSITION_DLY); + AND_REG(&wlc_hw->regs->clk_ctl_st, + ~CCS_FORCEHT); + } + } + wlc_hw->forcefastclk = (mode == CLK_FAST); + } else { + + /* old chips w/o PMU, force HT through cc, + * then use FCA to verify mac is running fast clock + */ + + wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); + + /* check fast clock is available (if core is not in reset) */ + if (wlc_hw->forcefastclk && wlc_hw->clk) + WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & + SISF_FCLKA)); + + /* keep the ucode wake bit on if forcefastclk is on + * since we do not want ucode to put us back to slow clock + * when it dozes for PM mode. + * Code below matches the wake override bit with current forcefastclk state + * Only setting bit in wake_override instead of waking ucode immediately + * since old code (wlc.c 1.4499) had this behavior. Older code set + * wlc->forcefastclk but only had the wake happen if the wakup_ucode work + * (protected by an up check) was executed just below. + */ + if (wlc_hw->forcefastclk) + mboolset(wlc_hw->wake_override, + WLC_WAKE_OVERRIDE_FORCEFAST); + else + mboolclr(wlc_hw->wake_override, + WLC_WAKE_OVERRIDE_FORCEFAST); + } +} + +/* set initial host flags value */ +static void +wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + + memset(mhfs, 0, MHFMAX * sizeof(u16)); + + mhfs[MHF2] |= mhf2_init; + + /* prohibit use of slowclock on multifunction boards */ + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + mhfs[MHF1] |= MHF1_FORCEFASTCLK; + + if (WLCISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { + mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; + mhfs[MHF1] |= MHF1_IQSWAP_WAR; + } +} + +/* set or clear ucode host flag bits + * it has an optimization for no-change write + * it only writes through shared memory when the core has clock; + * pre-CLK changes should use wlc_write_mhf to get around the optimization + * + * + * bands values are: WLC_BAND_AUTO <--- Current band only + * WLC_BAND_5G <--- 5G band only + * WLC_BAND_2G <--- 2G band only + * WLC_BAND_ALL <--- All bands + */ +void +wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, + int bands) +{ + u16 save; + u16 addr[MHFMAX] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + struct wlc_hwband *band; + + if ((val & ~mask) || idx >= MHFMAX) + return; /* error condition */ + + switch (bands) { + /* Current band only or all bands, + * then set the band to current band + */ + case WLC_BAND_AUTO: + case WLC_BAND_ALL: + band = wlc_hw->band; + break; + case WLC_BAND_5G: + band = wlc_hw->bandstate[BAND_5G_INDEX]; + break; + case WLC_BAND_2G: + band = wlc_hw->bandstate[BAND_2G_INDEX]; + break; + default: + band = NULL; /* error condition */ + } + + if (band) { + save = band->mhfs[idx]; + band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; + + /* optimization: only write through if changed, and + * changed band is the current band + */ + if (wlc_hw->clk && (band->mhfs[idx] != save) + && (band == wlc_hw->band)) + wlc_bmac_write_shm(wlc_hw, addr[idx], + (u16) band->mhfs[idx]); + } + + if (bands == WLC_BAND_ALL) { + wlc_hw->bandstate[0]->mhfs[idx] = + (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; + wlc_hw->bandstate[1]->mhfs[idx] = + (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; + } +} + +u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) +{ + struct wlc_hwband *band; + + if (idx >= MHFMAX) + return 0; /* error condition */ + switch (bands) { + case WLC_BAND_AUTO: + band = wlc_hw->band; + break; + case WLC_BAND_5G: + band = wlc_hw->bandstate[BAND_5G_INDEX]; + break; + case WLC_BAND_2G: + band = wlc_hw->bandstate[BAND_2G_INDEX]; + break; + default: + band = NULL; /* error condition */ + } + + if (!band) + return 0; + + return band->mhfs[idx]; +} + +static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) +{ + u8 idx; + u16 addr[] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + + for (idx = 0; idx < MHFMAX; idx++) { + wlc_bmac_write_shm(wlc_hw, addr[idx], mhfs[idx]); + } +} + +/* set the maccontrol register to desired reset state and + * initialize the sw cache of the register + */ +static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw) +{ + /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ + wlc_hw->maccontrol = 0; + wlc_hw->suspended_fifos = 0; + wlc_hw->wake_override = 0; + wlc_hw->mute_override = 0; + wlc_bmac_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); +} + +/* set or clear maccontrol bits */ +void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) +{ + u32 maccontrol; + u32 new_maccontrol; + + if (val & ~mask) + return; /* error condition */ + maccontrol = wlc_hw->maccontrol; + new_maccontrol = (maccontrol & ~mask) | val; + + /* if the new maccontrol value is the same as the old, nothing to do */ + if (new_maccontrol == maccontrol) + return; + + /* something changed, cache the new value */ + wlc_hw->maccontrol = new_maccontrol; + + /* write the new values with overrides applied */ + wlc_mctrl_write(wlc_hw); +} + +/* write the software state of maccontrol and overrides to the maccontrol register */ +static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) +{ + u32 maccontrol = wlc_hw->maccontrol; + + /* OR in the wake bit if overridden */ + if (wlc_hw->wake_override) + maccontrol |= MCTL_WAKE; + + /* set AP and INFRA bits for mute if needed */ + if (wlc_hw->mute_override) { + maccontrol &= ~(MCTL_AP); + maccontrol |= MCTL_INFRA; + } + + W_REG(&wlc_hw->regs->maccontrol, maccontrol); +} + +void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) +{ + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { + mboolset(wlc_hw->wake_override, override_bit); + return; + } + + mboolset(wlc_hw->wake_override, override_bit); + + wlc_mctrl_write(wlc_hw); + wlc_bmac_wait_for_wake(wlc_hw); + + return; +} + +void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) +{ + mboolclr(wlc_hw->wake_override, override_bit); + + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) + return; + + wlc_mctrl_write(wlc_hw); + + return; +} + +/* When driver needs ucode to stop beaconing, it has to make sure that + * MCTL_AP is clear and MCTL_INFRA is set + * Mode MCTL_AP MCTL_INFRA + * AP 1 1 + * STA 0 1 <--- This will ensure no beacons + * IBSS 0 0 + */ +static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) +{ + wlc_hw->mute_override = 1; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + wlc_mctrl_write(wlc_hw); + + return; +} + +/* Clear the override on AP and INFRA bits */ +static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) +{ + if (wlc_hw->mute_override == 0) + return; + + wlc_hw->mute_override = 0; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + wlc_mctrl_write(wlc_hw); +} + +/* + * Write a MAC address to the given match reg offset in the RXE match engine. + */ +void +wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, + const u8 *addr) +{ + d11regs_t *regs; + u16 mac_l; + u16 mac_m; + u16 mac_h; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: wlc_bmac_set_addrmatch\n", + wlc_hw->unit); + + regs = wlc_hw->regs; + mac_l = addr[0] | (addr[1] << 8); + mac_m = addr[2] | (addr[3] << 8); + mac_h = addr[4] | (addr[5] << 8); + + /* enter the MAC addr into the RXE match registers */ + W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); + W_REG(®s->rcm_mat_data, mac_l); + W_REG(®s->rcm_mat_data, mac_m); + W_REG(®s->rcm_mat_data, mac_h); + +} + +void +wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, + void *buf) +{ + d11regs_t *regs; + u32 word; + bool be_bit; + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + W_REG(®s->tplatewrptr, offset); + + /* if MCTL_BIGEND bit set in mac control register, + * the chip swaps data in fifo, as well as data in + * template ram + */ + be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; + + while (len > 0) { + memcpy(&word, buf, sizeof(u32)); + + if (be_bit) + word = cpu_to_be32(word); + else + word = cpu_to_le32(word); + + W_REG(®s->tplatewrdata, word); + + buf = (u8 *) buf + sizeof(u32); + len -= sizeof(u32); + } +} + +void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) +{ + wlc_hw->band->CWmin = newmin; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmin); +} + +void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) +{ + wlc_hw->band->CWmax = newmax; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmax); +} + +void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) +{ + bool fastclk; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + wlc_phy_bw_state_set(wlc_hw->band->pi, bw); + + wlc_bmac_phy_reset(wlc_hw); + wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); + + /* restore the clk */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +static void +wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, int len) +{ + d11regs_t *regs = wlc_hw->regs; + + wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); + /* mark beacon0 valid */ + OR_REG(®s->maccommand, MCMD_BCN0VLD); +} + +static void +wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, int len) +{ + d11regs_t *regs = wlc_hw->regs; + + wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); + /* mark beacon1 valid */ + OR_REG(®s->maccommand, MCMD_BCN1VLD); +} + +/* mac is assumed to be suspended at this point */ +void +wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, void *bcn, int len, + bool both) +{ + d11regs_t *regs = wlc_hw->regs; + + if (both) { + wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); + wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + } else { + /* bcn 0 */ + if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) + wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); + /* bcn 1 */ + else if (! + (R_REG(®s->maccommand) & MCMD_BCN1VLD)) + wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + } +} + +static void WLBANDINITFN(wlc_bmac_upd_synthpu) (struct wlc_hw_info *wlc_hw) +{ + u16 v; + struct wlc_info *wlc = wlc_hw->wlc; + /* update SYNTHPU_DLY */ + + if (WLCISLCNPHY(wlc->band)) { + v = SYNTHPU_DLY_LPPHY_US; + } else if (WLCISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { + v = SYNTHPU_DLY_NPHY_US; + } else { + v = SYNTHPU_DLY_BPHY_US; + } + + wlc_bmac_write_shm(wlc_hw, M_SYNTHPU_DLY, v); +} + +/* band-specific init */ +static void +WLBANDINITFN(wlc_bmac_bsinit) (struct wlc_info *wlc, chanspec_t chanspec) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + wlc_ucode_bsinit(wlc_hw); + + wlc_phy_init(wlc_hw->band->pi, chanspec); + + wlc_ucode_txant_set(wlc_hw); + + /* cwmin is band-specific, update hardware with value for current band */ + wlc_bmac_set_cwmin(wlc_hw, wlc_hw->band->CWmin); + wlc_bmac_set_cwmax(wlc_hw, wlc_hw->band->CWmax); + + wlc_bmac_update_slot_timing(wlc_hw, + BAND_5G(wlc_hw->band-> + bandtype) ? true : wlc_hw-> + shortslot); + + /* write phytype and phyvers */ + wlc_bmac_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); + wlc_bmac_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); + + /* initialize the txphyctl1 rate table since shmem is shared between bands */ + wlc_upd_ofdm_pctl1_table(wlc_hw); + + wlc_bmac_upd_synthpu(wlc_hw); +} + +static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); + + wlc_hw->phyclk = clk; + + if (OFF == clk) { /* clear gmode bit, put phy into reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), + (SICF_PRST | SICF_FGC)); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); + udelay(1); + + } else { /* take phy out of reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); + udelay(1); + + } +} + +/* Perform a soft reset of the PHY PLL */ +void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_addr), ~0, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 4); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); + udelay(1); +} + +/* light way to turn on phy clock without reset for NPHY only + * refer to wlc_bmac_core_phy_clk for full version + */ +void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) +{ + /* support(necessary for NPHY and HYPHY) only */ + if (!WLCISNPHY(wlc_hw->band)) + return; + + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); + else + ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); + +} + +void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) +{ + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); + else + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); +} + +void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) +{ + wlc_phy_t *pih = wlc_hw->band->pi; + u32 phy_bw_clkbits; + bool phy_in_reset = false; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (pih == NULL) + return; + + phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); + + /* Specific reset sequence required for NPHY rev 3 and 4 */ + if (WLCISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && + NREV_LE(wlc_hw->band->phyrev, 4)) { + /* Set the PHY bandwidth */ + ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); + + udelay(1); + + /* Perform a soft reset of the PHY PLL */ + wlc_bmac_core_phypll_reset(wlc_hw); + + /* reset the PHY */ + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), + (SICF_PRST | SICF_PCLKE)); + phy_in_reset = true; + } else { + + ai_core_cflags(wlc_hw->sih, + (SICF_PRST | SICF_PCLKE | SICF_BWMASK), + (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); + } + + udelay(2); + wlc_bmac_core_phy_clk(wlc_hw, ON); + + if (pih) + wlc_phy_anacore(pih, ON); +} + +/* switch to and initialize new band */ +static void +WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, + chanspec_t chanspec) { + struct wlc_info *wlc = wlc_hw->wlc; + u32 macintmask; + + /* Enable the d11 core before accessing it */ + if (!ai_iscoreup(wlc_hw->sih)) { + ai_core_reset(wlc_hw->sih, 0, 0); + wlc_mctrl_reset(wlc_hw); + } + + macintmask = wlc_setband_inact(wlc, bandunit); + + if (!wlc_hw->up) + return; + + wlc_bmac_core_phy_clk(wlc_hw, ON); + + /* band-specific initializations */ + wlc_bmac_bsinit(wlc, chanspec); + + /* + * If there are any pending software interrupt bits, + * then replace these with a harmless nonzero value + * so wlc_dpc() will re-enable interrupts when done. + */ + if (wlc->macintstatus) + wlc->macintstatus = MI_DMAINT; + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* ucode should still be suspended.. */ + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); +} + +/* low-level band switch utility routine */ +void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + bandunit); + + wlc_hw->band = wlc_hw->bandstate[bandunit]; + + /* BMAC_NOTE: until we eliminate need for wlc->band refs in low level code */ + wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; + + /* set gmode core flag */ + if (wlc_hw->sbclk && !wlc_hw->noreset) { + ai_core_cflags(wlc_hw->sih, SICF_GMODE, + ((bandunit == 0) ? SICF_GMODE : 0)); + } +} + +static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) +{ + + /* reject unsupported corerev */ + if (!VALID_COREREV(wlc_hw->corerev)) { + wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", + wlc_hw->corerev); + return false; + } + + return true; +} + +static bool wlc_validboardtype(struct wlc_hw_info *wlc_hw) +{ + bool goodboard = true; + uint boardrev = wlc_hw->boardrev; + + if (boardrev == 0) + goodboard = false; + else if (boardrev > 0xff) { + uint brt = (boardrev & 0xf000) >> 12; + uint b0 = (boardrev & 0xf00) >> 8; + uint b1 = (boardrev & 0xf0) >> 4; + uint b2 = boardrev & 0xf; + + if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) + || (b2 > 9)) + goodboard = false; + } + + if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) + return goodboard; + + return goodboard; +} + +static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) +{ + const char *varname = "macaddr"; + char *macaddr; + + /* If macaddr exists, use it (Sromrev4, CIS, ...). */ + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr != NULL) + return macaddr; + + if (NBANDS_HW(wlc_hw) > 1) + varname = "et1macaddr"; + else + varname = "il0macaddr"; + + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr == NULL) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " + "getvar(%s) not found\n", wlc_hw->unit, varname); + } + + return macaddr; +} + +/* + * Return true if radio is disabled, otherwise false. + * hw radio disable signal is an external pin, users activate it asynchronously + * this function could be called when driver is down and w/o clock + * it operates on different registers depending on corerev and boardflag. + */ +bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) +{ + bool v, clk, xtal; + u32 resetbits = 0, flags = 0; + + xtal = wlc_hw->sbclk; + if (!xtal) + wlc_bmac_xtal(wlc_hw, ON); + + /* may need to take core out of reset first */ + clk = wlc_hw->clk; + if (!clk) { + /* + * mac no longer enables phyclk automatically when driver + * accesses phyreg throughput mac. This can be skipped since + * only mac reg is accessed below + */ + flags |= SICF_PCLKE; + + /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID) || + (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + wlc_hw->regs = + (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, + 0); + ai_core_reset(wlc_hw->sih, flags, resetbits); + wlc_mctrl_reset(wlc_hw); + } + + v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); + + /* put core back into reset */ + if (!clk) + ai_core_disable(wlc_hw->sih, 0); + + if (!xtal) + wlc_bmac_xtal(wlc_hw, OFF); + + return v; +} + +/* Initialize just the hardware when coming out of POR or S3/S5 system states */ +void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) +{ + if (wlc_hw->wlc->pub->hw_up) + return; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of wlc_up(). + */ + wlc_bmac_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + if (wlc_hw->sih->bustype == PCI_BUS) { + ai_pci_fixcfg(wlc_hw->sih); + + /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID) || + (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + wlc_hw->regs = + (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, + 0); + } + + /* Inform phy that a POR reset has occurred so it does a complete phy init */ + wlc_phy_por_inform(wlc_hw->band->pi); + + wlc_hw->ucode_loaded = false; + wlc_hw->wlc->pub->hw_up = true; + + if ((wlc_hw->boardflags & BFL_FEM) + && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + if (! + (wlc_hw->boardrev >= 0x1250 + && (wlc_hw->boardflags & BFL_FEM_BT))) + ai_epa_4313war(wlc_hw->sih); + } +} + +static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) +{ + struct dma_pub *di = wlc_hw->di[fifo]; + return dma_rxreset(di); +} + +/* d11 core reset + * ensure fask clock during reset + * reset dma + * reset d11(out of reset) + * reset phy(out of reset) + * clear software macintstatus for fresh new start + * one testing hack wlc_hw->noreset will bypass the d11/phy reset + */ +void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) +{ + d11regs_t *regs; + uint i; + bool fastclk; + u32 resetbits = 0; + + if (flags == WLC_USE_COREFLAGS) + flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* reset the dma engines except first time thru */ + if (ai_iscoreup(wlc_hw->sih)) { + for (i = 0; i < NFIFO; i++) + if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " + "dma_txreset[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, i); + } + + if ((wlc_hw->di[RX_FIFO]) + && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" + "[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, RX_FIFO); + } + } + /* if noreset, just stop the psm and return */ + if (wlc_hw->noreset) { + wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ + wlc_bmac_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); + return; + } + + /* + * mac no longer enables phyclk automatically when driver accesses + * phyreg throughput mac, AND phy_reset is skipped at early stage when + * band->pi is invalid. need to enable PHY CLK + */ + flags |= SICF_PCLKE; + + /* reset the core + * In chips with PMU, the fastclk request goes through d11 core reg 0x1e0, which + * is cleared by the core_reset. have to re-request it. + * This adds some delay and we can optimize it by also requesting fastclk through + * chipcommon during this period if necessary. But that has to work coordinate + * with other driver like mips/arm since they may touch chipcommon as well. + */ + wlc_hw->clk = false; + ai_core_reset(wlc_hw->sih, flags, resetbits); + wlc_hw->clk = true; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); + + wlc_mctrl_reset(wlc_hw); + + if (PMUCTL_ENAB(wlc_hw->sih)) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + wlc_bmac_phy_reset(wlc_hw); + + /* turn on PHY_PLL */ + wlc_bmac_core_phypll_ctl(wlc_hw, true); + + /* clear sw intstatus */ + wlc_hw->wlc->macintstatus = 0; + + /* restore the clk setting */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +/* txfifo sizes needs to be modified(increased) since the newer cores + * have more memory. + */ +static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) +{ + d11regs_t *regs = wlc_hw->regs; + u16 fifo_nu; + u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; + u16 txfifo_def, txfifo_def1; + u16 txfifo_cmd; + + /* tx fifos start at TXFIFO_START_BLK from the Base address */ + txfifo_startblk = TXFIFO_START_BLK; + + /* sequence of operations: reset fifo, set fifo size, reset fifo */ + for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { + + txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; + txfifo_def = (txfifo_startblk & 0xff) | + (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); + txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | + ((((txfifo_endblk - + 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); + txfifo_cmd = + TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + W_REG(®s->xmtfifodef, txfifo_def); + W_REG(®s->xmtfifodef1, txfifo_def1); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + + txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; + } + /* + * need to propagate to shm location to be in sync since ucode/hw won't + * do this + */ + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE0, + wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE1, + wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE2, + ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_AC_BK_FIFO])); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE3, + ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_BCMC_FIFO])); +} + +/* d11 core init + * reset PSM + * download ucode/PCM + * let ucode run to suspended + * download ucode inits + * config other core registers + * init dma + */ +static void wlc_coreinit(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs; + u32 sflags; + uint bcnint_us; + uint i = 0; + bool fifosz_fixup = false; + int err = 0; + u16 buf[NFIFO]; + struct wiphy *wiphy = wlc->wiphy; + + regs = wlc_hw->regs; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset PSM */ + wlc_bmac_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); + + wlc_ucode_download(wlc_hw); + /* + * FIFOSZ fixup. driver wants to controls the fifo allocation. + */ + fifosz_fixup = true; + + /* let the PSM run to the suspended state, set mode to BSS STA */ + W_REG(®s->macintstatus, -1); + wlc_bmac_mctrl(wlc_hw, ~0, + (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); + + /* wait for ucode to self-suspend after auto-init */ + SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), + 1000 * 1000); + if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) + wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" + "suspend!\n", wlc_hw->unit); + + wlc_gpio_init(wlc); + + sflags = ai_core_sflags(wlc_hw->sih, 0, 0); + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) + wlc_write_inits(wlc_hw, d11n0initvals16); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11lcn0initvals24); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + + /* For old ucode, txfifo sizes needs to be modified(increased) */ + if (fifosz_fixup == true) { + wlc_corerev_fifofixup(wlc_hw); + } + + /* check txfifo allocations match between ucode and driver */ + buf[TX_AC_BE_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE0); + if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { + i = TX_AC_BE_FIFO; + err = -1; + } + buf[TX_AC_VI_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE1); + if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { + i = TX_AC_VI_FIFO; + err = -1; + } + buf[TX_AC_BK_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE2); + buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; + buf[TX_AC_BK_FIFO] &= 0xff; + if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { + i = TX_AC_BK_FIFO; + err = -1; + } + if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { + i = TX_AC_VO_FIFO; + err = -1; + } + buf[TX_BCMC_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE3); + buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; + buf[TX_BCMC_FIFO] &= 0xff; + if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { + i = TX_BCMC_FIFO; + err = -1; + } + if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { + i = TX_ATIM_FIFO; + err = -1; + } + if (err != 0) { + wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" + " driver size %d index %d\n", buf[i], + wlc_hw->xmtfifo_sz[i], i); + } + + /* make sure we can still talk to the mac */ + WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); + + /* band-specific inits done by wlc_bsinit() */ + + /* Set up frame burst size and antenna swap threshold init values */ + wlc_bmac_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); + wlc_bmac_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); + + /* enable one rx interrupt per received frame */ + W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); + + /* set the station mode (BSS STA) */ + wlc_bmac_mctrl(wlc_hw, + (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), + (MCTL_INFRA | MCTL_DISCARD_PMQ)); + + /* set up Beacon interval */ + bcnint_us = 0x8000 << 10; + W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); + W_REG(®s->tsf_cfpstart, bcnint_us); + W_REG(®s->macintstatus, MI_GP1); + + /* write interrupt mask */ + W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); + + /* allow the MAC to control the PHY clock (dynamic on/off) */ + wlc_bmac_macphyclk_set(wlc_hw, ON); + + /* program dynamic clock control fast powerup delay register */ + wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); + W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); + + /* tell the ucode the corerev */ + wlc_bmac_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); + + /* tell the ucode MAC capabilities */ + wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_L, + (u16) (wlc_hw->machwcap & 0xffff)); + wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_H, + (u16) ((wlc_hw-> + machwcap >> 16) & 0xffff)); + + /* write retry limits to SCR, this done after PSM init */ + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->SRL); + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->LRL); + + /* write rate fallback retry limits */ + wlc_bmac_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); + wlc_bmac_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); + + AND_REG(®s->ifs_ctl, 0x0FFF); + W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); + + /* dma initializations */ + wlc->txpend16165war = 0; + + /* init the tx dma engines */ + for (i = 0; i < NFIFO; i++) { + if (wlc_hw->di[i]) + dma_txinit(wlc_hw->di[i]); + } + + /* init the rx dma engine(s) and post receive buffers */ + dma_rxinit(wlc_hw->di[RX_FIFO]); + dma_rxfill(wlc_hw->di[RX_FIFO]); +} + +/* This function is used for changing the tsf frac register + * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz + * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz + * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz + * HTPHY Formula is 2^26/freq(MHz) e.g. + * For spuron2 - 126MHz -> 2^26/126 = 532610.0 + * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 + * For spuron: 123MHz -> 2^26/123 = 545600.5 + * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 + * For spur off: 120MHz -> 2^26/120 = 559240.5 + * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 + */ + +void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) +{ + d11regs_t *regs; + regs = wlc_hw->regs; + + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { + if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x2082); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x5341); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else { /* 120Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x8889); + W_REG(®s->tsf_clk_frac_h, 0x8); + } + } else if (WLCISLCNPHY(wlc_hw->band)) { + if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x7CE0); + W_REG(®s->tsf_clk_frac_h, 0xC); + } else { /* 80Mhz */ + W_REG(®s->tsf_clk_frac_l, 0xCCCD); + W_REG(®s->tsf_clk_frac_h, 0xC); + } + } +} + +/* Initialize GPIOs that are controlled by D11 core */ +static void wlc_gpio_init(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs; + u32 gc, gm; + + regs = wlc_hw->regs; + + /* use GPIO select 0 to get all gpio signals from the gpio out reg */ + wlc_bmac_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); + + /* + * Common GPIO setup: + * G0 = LED 0 = WLAN Activity + * G1 = LED 1 = WLAN 2.4 GHz Radio State + * G2 = LED 2 = WLAN 5 GHz Radio State + * G4 = radio disable input (HI enabled, LO disabled) + */ + + gc = gm = 0; + + /* Allocate GPIOs for mimo antenna diversity feature */ + if (wlc_hw->antsel_type == ANTSEL_2x3) { + /* Enable antenna diversity, use 2x3 mode */ + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, WLC_BAND_ALL); + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, + MHF3_ANTSEL_MODE, WLC_BAND_ALL); + + /* init superswitch control */ + wlc_phy_antsel_init(wlc_hw->band->pi, false); + + } else if (wlc_hw->antsel_type == ANTSEL_2x4) { + gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); + /* + * The board itself is powered by these GPIOs + * (when not sending pattern) so set them high + */ + OR_REG(®s->psm_gpio_oe, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + OR_REG(®s->psm_gpio_out, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + + /* Enable antenna diversity, use 2x4 mode */ + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, WLC_BAND_ALL); + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, + WLC_BAND_ALL); + + /* Configure the desired clock to be 4Mhz */ + wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV, + ANTSEL_CLKDIV_4MHZ); + } + + /* gpio 9 controls the PA. ucode is responsible for wiggling out and oe */ + if (wlc_hw->boardflags & BFL_PACTRL) + gm |= gc |= BOARD_GPIO_PACTRL; + + /* apply to gpiocontrol register */ + ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); +} + +static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) +{ + struct wlc_info *wlc; + wlc = wlc_hw->wlc; + + if (wlc_hw->ucode_loaded) + return; + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) { + wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, + bcm43xx_16_mimosz); + wlc_hw->ucode_loaded = true; + } else + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, + bcm43xx_24_lcnsz); + wlc_hw->ucode_loaded = true; + } else { + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], + const uint nbytes) { + d11regs_t *regs = wlc_hw->regs; + uint i; + uint count; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + count = (nbytes / sizeof(u32)); + + W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); + (void)R_REG(®s->objaddr); + for (i = 0; i < count; i++) + W_REG(®s->objdata, ucode[i]); +} + +static void wlc_write_inits(struct wlc_hw_info *wlc_hw, + const struct d11init *inits) +{ + int i; + volatile u8 *base; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + base = (volatile u8 *)wlc_hw->regs; + + for (i = 0; inits[i].addr != 0xffff; i++) { + if (inits[i].size == 2) + W_REG((u16 *)(base + inits[i].addr), + inits[i].value); + else if (inits[i].size == 4) + W_REG((u32 *)(base + inits[i].addr), + inits[i].value); + } +} + +static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw) +{ + u16 phyctl; + u16 phytxant = wlc_hw->bmac_phytxant; + u16 mask = PHY_TXC_ANT_MASK; + + /* set the Probe Response frame phy control word */ + phyctl = wlc_bmac_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); + phyctl = (phyctl & ~mask) | phytxant; + wlc_bmac_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); + + /* set the Response (ACK/CTS) frame phy control word */ + phyctl = wlc_bmac_read_shm(wlc_hw, M_RSP_PCTLWD); + phyctl = (phyctl & ~mask) | phytxant; + wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); +} + +void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) +{ + /* update sw state */ + wlc_hw->bmac_phytxant = phytxant; + + /* push to ucode if up */ + if (!wlc_hw->up) + return; + wlc_ucode_txant_set(wlc_hw); + +} + +u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw) +{ + return (u16) wlc_hw->wlc->stf->txant; +} + +void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) +{ + wlc_hw->antsel_type = antsel_type; + + /* Update the antsel type for phy module to use */ + wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); +} + +void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) +{ + bool fatal = false; + uint unit; + uint intstatus, idx; + d11regs_t *regs = wlc_hw->regs; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + unit = wlc_hw->unit; + + for (idx = 0; idx < NFIFO; idx++) { + /* read intstatus register and ignore any non-error bits */ + intstatus = + R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; + if (!intstatus) + continue; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", + unit, idx, intstatus); + + if (intstatus & I_RO) { + wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " + "overflow\n", unit, idx); + fatal = true; + } + + if (intstatus & I_PC) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", + unit, idx); + fatal = true; + } + + if (intstatus & I_PD) { + wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, + idx); + fatal = true; + } + + if (intstatus & I_DE) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " + "error\n", unit, idx); + fatal = true; + } + + if (intstatus & I_RU) { + wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " + "underflow\n", idx, unit); + } + + if (intstatus & I_XU) { + wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " + "underflow\n", idx, unit); + fatal = true; + } + + if (fatal) { + wlc_fatal_error(wlc_hw->wlc); /* big hammer */ + break; + } else + W_REG(®s->intctrlregs[idx].intstatus, + intstatus); + } +} + +void wlc_intrson(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + wlc->macintmask = wlc->defmacintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +/* callback for siutils.c, which has only wlc handler, no wl + * they both check up, not only because there is no need to off/restore d11 interrupt + * but also because per-port code may require sync with valid interrupt. + */ + +static u32 wlc_wlintrsoff(struct wlc_info *wlc) +{ + if (!wlc->hw->up) + return 0; + + return brcms_intrsoff(wlc->wl); +} + +static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) +{ + if (!wlc->hw->up) + return; + + brcms_intrsrestore(wlc->wl, macintmask); +} + +u32 wlc_intrsoff(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintmask; + + if (!wlc_hw->clk) + return 0; + + macintmask = wlc->macintmask; /* isr can still happen */ + + W_REG(&wlc_hw->regs->macintmask, 0); + (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ + udelay(1); /* ensure int line is no longer driven */ + wlc->macintmask = 0; + + /* return previous macintmask; resolve race between us and our isr */ + return wlc->macintstatus ? 0 : macintmask; +} + +void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + if (!wlc_hw->clk) + return; + + wlc->macintmask = macintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool on, mbool flags) +{ + u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; + + if (on) { + /* suspend tx fifos */ + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); + + /* zero the address match register so we do not send ACKs */ + wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + null_ether_addr); + } else { + /* resume tx fifos */ + if (!wlc_hw->wlc->tx_suspended) { + wlc_bmac_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); + } + wlc_bmac_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); + wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); + wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); + + /* Restore address */ + wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + wlc_hw->etheraddr); + } + + wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); + + if (on) + wlc_ucode_mute_override_set(wlc_hw); + else + wlc_ucode_mute_override_clear(wlc_hw); +} + +int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) +{ + if (fifo >= NFIFO) + return -EINVAL; + + *blocks = wlc_hw->xmtfifo_sz[fifo]; + + return 0; +} + +/* wlc_bmac_tx_fifo_suspended: + * Check the MAC's tx suspend status for a tx fifo. + * + * When the MAC acknowledges a tx suspend, it indicates that no more + * packets will be transmitted out the radio. This is independent of + * DMA channel suspension---the DMA may have finished suspending, or may still + * be pulling data into a tx fifo, by the time the MAC acks the suspend + * request. + */ +static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + /* check that a suspend has been requested and is no longer pending */ + + /* + * for DMA mode, the suspend request is set in xmtcontrol of the DMA engine, + * and the tx fifo suspend at the lower end of the MAC is acknowledged in the + * chnstatus register. + * The tx fifo suspend completion is independent of the DMA suspend completion and + * may be acked before or after the DMA is suspended. + */ + if (dma_txsuspended(wlc_hw->di[tx_fifo]) && + (R_REG(&wlc_hw->regs->chnstatus) & + (1 << tx_fifo)) == 0) + return true; + + return false; +} + +static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + u8 fifo = 1 << tx_fifo; + + /* Two clients of this code, 11h Quiet period and scanning. */ + + /* only suspend if not already suspended */ + if ((wlc_hw->suspended_fifos & fifo) == fifo) + return; + + /* force the core awake only if not already */ + if (wlc_hw->suspended_fifos == 0) + wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_TXFIFO); + + wlc_hw->suspended_fifos |= fifo; + + if (wlc_hw->di[tx_fifo]) { + /* Suspending AMPDU transmissions in the middle can cause underflow + * which may result in mismatch between ucode and driver + * so suspend the mac before suspending the FIFO + */ + if (WLC_PHY_11N_CAP(wlc_hw->band)) + wlc_suspend_mac_and_wait(wlc_hw->wlc); + + dma_txsuspend(wlc_hw->di[tx_fifo]); + + if (WLC_PHY_11N_CAP(wlc_hw->band)) + wlc_enable_mac(wlc_hw->wlc); + } +} + +static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + /* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done + * here for PIO otherwise the watchdog will catch the inconsistency and fire + */ + /* Two clients of this code, 11h Quiet period and scanning. */ + if (wlc_hw->di[tx_fifo]) + dma_txresume(wlc_hw->di[tx_fifo]); + + /* allow core to sleep again */ + if (wlc_hw->suspended_fifos == 0) + return; + else { + wlc_hw->suspended_fifos &= ~(1 << tx_fifo); + if (wlc_hw->suspended_fifos == 0) + wlc_ucode_wake_override_clear(wlc_hw, + WLC_WAKE_OVERRIDE_TXFIFO); + } +} + +/* + * Read and clear macintmask and macintstatus and intstatus registers. + * This routine should be called with interrupts off + * Return: + * -1 if DEVICEREMOVED(wlc) evaluates to true; + * 0 if the interrupt is not for us, or we are in some special cases; + * device interrupt status bits otherwise. + */ +static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 macintstatus; + + /* macintstatus includes a DMA interrupt summary bit */ + macintstatus = R_REG(®s->macintstatus); + + BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, + macintstatus); + + /* detect cardbus removed, in power down(suspend) and in reset */ + if (DEVICEREMOVED(wlc)) + return -1; + + /* DEVICEREMOVED succeeds even when the core is still resetting, + * handle that case here. + */ + if (macintstatus == 0xffffffff) + return 0; + + /* defer unsolicited interrupts */ + macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); + + /* if not for us */ + if (macintstatus == 0) + return 0; + + /* interrupts are already turned off for CFE build + * Caution: For CFE Turning off the interrupts again has some undesired + * consequences + */ + /* turn off the interrupts */ + W_REG(®s->macintmask, 0); + (void)R_REG(®s->macintmask); /* sync readback */ + wlc->macintmask = 0; + + /* clear device interrupts */ + W_REG(®s->macintstatus, macintstatus); + + /* MI_DMAINT is indication of non-zero intstatus */ + if (macintstatus & MI_DMAINT) { + /* + * only fifo interrupt enabled is I_RI in + * RX_FIFO. If MI_DMAINT is set, assume it + * is set and clear the interrupt. + */ + W_REG(®s->intctrlregs[RX_FIFO].intstatus, + DEF_RXINTMASK); + } + + return macintstatus; +} + +/* Update wlc->macintstatus and wlc->intstatus[]. */ +/* Return true if they are updated successfully. false otherwise */ +bool wlc_intrsupd(struct wlc_info *wlc) +{ + u32 macintstatus; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, false); + + /* device is removed */ + if (macintstatus == 0xffffffff) + return false; + + /* update interrupt status in software */ + wlc->macintstatus |= macintstatus; + + return true; +} + +/* + * First-level interrupt processing. + * Return true if this was our interrupt, false otherwise. + * *wantdpc will be set to true if further wlc_dpc() processing is required, + * false otherwise. + */ +bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintstatus; + + *wantdpc = false; + + if (!wlc_hw->up || !wlc->macintmask) + return false; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, true); + + if (macintstatus == 0xffffffff) + wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" + " path\n"); + + /* it is not for us */ + if (macintstatus == 0) + return false; + + *wantdpc = true; + + /* save interrupt status bits */ + wlc->macintstatus = macintstatus; + + return true; + +} + +static bool +wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) +{ + /* discard intermediate indications for ucode with one legitimate case: + * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent + * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts + * transmission count) + */ + if (!(txs->status & TX_STATUS_AMPDU) + && (txs->status & TX_STATUS_INTERMEDIATE)) { + return false; + } + + return wlc_dotxstatus(wlc_hw->wlc, txs, s2); +} + +/* process tx completion events in BMAC + * Return true if more tx status need to be processed. false otherwise. + */ +static bool +wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) +{ + bool morepending = false; + struct wlc_info *wlc = wlc_hw->wlc; + d11regs_t *regs; + tx_status_t txstatus, *txs; + u32 s1, s2; + uint n = 0; + /* + * Param 'max_tx_num' indicates max. # tx status to process before + * break out. + */ + uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + txs = &txstatus; + regs = wlc_hw->regs; + while (!(*fatal) + && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { + + if (s1 == 0xffffffff) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", + wlc_hw->unit, __func__); + return morepending; + } + + s2 = R_REG(®s->frmtxstatus2); + + txs->status = s1 & TXS_STATUS_MASK; + txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; + txs->sequence = s2 & TXS_SEQ_MASK; + txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; + txs->lasttxtime = 0; + + *fatal = wlc_bmac_dotxstatus(wlc_hw, txs, s2); + + /* !give others some time to run! */ + if (++n >= max_tx_num) + break; + } + + if (*fatal) + return 0; + + if (n >= max_tx_num) + morepending = true; + + if (!pktq_empty(&wlc->pkt_queue->q)) + wlc_send_q(wlc); + + return morepending; +} + +void wlc_suspend_mac_and_wait(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 mc, mi; + struct wiphy *wiphy = wlc->wiphy; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth++; + if (wlc_hw->mac_suspend_depth > 1) + return; + + /* force the core awake */ + wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); + + mc = R_REG(®s->maccontrol); + + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(!(mc & MCTL_EN_MAC)); + + mi = R_REG(®s->macintstatus); + if (mi == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mi & MI_MACSSPNDD); + + wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0); + + SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), + WLC_MAX_MAC_SUSPEND); + + if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { + wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" + " and MI_MACSSPNDD is still not on.\n", + wlc_hw->unit, WLC_MAX_MAC_SUSPEND); + wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " + "psm_brc 0x%04x\n", wlc_hw->unit, + R_REG(®s->psmdebug), + R_REG(®s->phydebug), + R_REG(®s->psm_brc)); + } + + mc = R_REG(®s->maccontrol); + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(mc & MCTL_EN_MAC); +} + +void wlc_enable_mac(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 mc, mi; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth--; + if (wlc_hw->mac_suspend_depth > 0) + return; + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(mc & MCTL_EN_MAC); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); + W_REG(®s->macintstatus, MI_MACSSPNDD); + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_EN_MAC)); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + mi = R_REG(®s->macintstatus); + WARN_ON(mi & MI_MACSSPNDD); + + wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); +} + +static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw) +{ + u8 rate; + u8 rates[8] = { + WLC_RATE_6M, WLC_RATE_9M, WLC_RATE_12M, WLC_RATE_18M, + WLC_RATE_24M, WLC_RATE_36M, WLC_RATE_48M, WLC_RATE_54M + }; + u16 entry_ptr; + u16 pctl1; + uint i; + + if (!WLC_PHY_11N_CAP(wlc_hw->band)) + return; + + /* walk the phy rate table and update the entries */ + for (i = 0; i < ARRAY_SIZE(rates); i++) { + rate = rates[i]; + + entry_ptr = wlc_bmac_ofdm_ratetable_offset(wlc_hw, rate); + + /* read the SHM Rate Table entry OFDM PCTL1 values */ + pctl1 = + wlc_bmac_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); + + /* modify the value */ + pctl1 &= ~PHY_TXC1_MODE_MASK; + pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); + + /* Update the SHM Rate Table entry OFDM PCTL1 values */ + wlc_bmac_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, + pctl1); + } +} + +static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) +{ + uint i; + u8 plcp_rate = 0; + struct plcp_signal_rate_lookup { + u8 rate; + u8 signal_rate; + }; + /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ + const struct plcp_signal_rate_lookup rate_lookup[] = { + {WLC_RATE_6M, 0xB}, + {WLC_RATE_9M, 0xF}, + {WLC_RATE_12M, 0xA}, + {WLC_RATE_18M, 0xE}, + {WLC_RATE_24M, 0x9}, + {WLC_RATE_36M, 0xD}, + {WLC_RATE_48M, 0x8}, + {WLC_RATE_54M, 0xC} + }; + + for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { + if (rate == rate_lookup[i].rate) { + plcp_rate = rate_lookup[i].signal_rate; + break; + } + } + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); +} + +void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode) +{ + wlc_hw->hw_stf_ss_opmode = stf_mode; + + if (wlc_hw->clk) + wlc_upd_ofdm_pctl1_table(wlc_hw); +} + +void +wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr) +{ + d11regs_t *regs = wlc_hw->regs; + + /* read the tsf timer low, then high to get an atomic read */ + *tsf_l_ptr = R_REG(®s->tsf_timerlow); + *tsf_h_ptr = R_REG(®s->tsf_timerhigh); + + return; +} + +static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) +{ + d11regs_t *regs; + u32 w, val; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* Validate dchip register access */ + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + w = R_REG(®s->objdata); + + /* Can we write and read back a 32bit register? */ + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0xaa5555aa); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0xaa5555aa) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0xaa5555aa\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0x55aaaa55); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0x55aaaa55) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0x55aaaa55\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, w); + + /* clear CFPStart */ + W_REG(®s->tsf_cfpstart, 0); + + w = R_REG(®s->maccontrol); + if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && + (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { + wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " + "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, + (MCTL_IHR_EN | MCTL_WAKE), + (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); + return false; + } + + return true; +} + +#define PHYPLL_WAIT_US 100000 + +void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) +{ + d11regs_t *regs; + u32 tmp; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + tmp = 0; + regs = wlc_hw->regs; + + if (on) { + if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | + CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), + PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & (CCS_ERSRC_AVAIL_HT)) != + (CCS_ERSRC_AVAIL_HT)) { + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" + " PLL failed\n", __func__); + } + } else { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL)) != + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) + != + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) { + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " + "PHY PLL failed\n", __func__); + } + } + } else { + /* Since the PLL may be shared, other cores can still be requesting it; + * so we'll deassert the request but not wait for status to comply. + */ + AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); + tmp = R_REG(®s->clk_ctl_st); + } +} + +void wlc_coredisable(struct wlc_hw_info *wlc_hw) +{ + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) + return; + + if (wlc_hw->noreset) + return; + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + /* turn off analog core */ + wlc_phy_anacore(wlc_hw->band->pi, OFF); + + /* turn off PHYPLL to save power */ + wlc_bmac_core_phypll_ctl(wlc_hw, false); + + /* No need to set wlc->pub->radio_active = OFF + * because this function needs down capability and + * radio_active is designed for BCMNODOWN. + */ + + /* remove gpio controls */ + if (wlc_hw->ucode_dbgsel) + ai_gpiocontrol(wlc_hw->sih, ~0, 0, GPIO_DRV_PRIORITY); + + wlc_hw->clk = false; + ai_core_disable(wlc_hw->sih, 0); + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); +} + +/* power both the pll and external oscillator on/off */ +static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); + + /* dont power down if plldown is false or we must poll hw radio disable */ + if (!want && wlc_hw->pllreq) + return; + + if (wlc_hw->sih) + ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); + + wlc_hw->sbclk = want; + if (!wlc_hw->sbclk) { + wlc_hw->clk = false; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + } +} + +static void wlc_flushqueues(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + uint i; + + wlc->txpend16165war = 0; + + /* free any posted tx packets */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) { + dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); + TXPKTPENDCLR(wlc, i); + BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); + } + + /* free any posted rx packets */ + dma_rxreclaim(wlc_hw->di[RX_FIFO]); +} + +u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset) +{ + return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); +} + +void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v) +{ + wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); +} + +static u16 +wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) +{ + d11regs_t *regs = wlc_hw->regs; + volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; + volatile u16 *objdata_hi = objdata_lo + 1; + u16 v; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) { + v = R_REG(objdata_hi); + } else { + v = R_REG(objdata_lo); + } + + return v; +} + +static void +wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) +{ + d11regs_t *regs = wlc_hw->regs; + volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; + volatile u16 *objdata_hi = objdata_lo + 1; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) { + W_REG(objdata_hi, v); + } else { + W_REG(objdata_lo, v); + } +} + +/* Copy a buffer to shared memory of specified type . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, + int len, u32 sel) +{ + u16 v; + const u8 *p = (const u8 *)buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = p[i] | (p[i + 1] << 8); + wlc_bmac_write_objmem(wlc_hw, offset + i, v, sel); + } +} + +/* Copy a piece of shared memory of specified type to a buffer . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, + int len, u32 sel) +{ + u16 v; + u8 *p = (u8 *) buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = wlc_bmac_read_objmem(wlc_hw, offset + i, sel); + p[i] = v & 0xFF; + p[i + 1] = (v >> 8) & 0xFF; + } +} + +void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) +{ + BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", + wlc_hw->vars_size); + + *buf = wlc_hw->vars; + *len = wlc_hw->vars_size; +} + +void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) +{ + wlc_hw->SRL = SRL; + wlc_hw->LRL = LRL; + + /* write retry limit to SCR, shouldn't need to suspend */ + if (wlc_hw->up) { + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); + } +} + +void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) +{ + if (set) { + if (mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolset(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (!wlc_hw->sbclk) { + wlc_bmac_xtal(wlc_hw, ON); + } + } + } else { + if (!mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolclr(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (wlc_hw->sbclk) { + wlc_bmac_xtal(wlc_hw, OFF); + } + } + } + + return; +} + +u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) +{ + u16 table_ptr; + u8 phy_rate, index; + + /* get the phy specific rate encoding for the PLCP SIGNAL field */ + /* XXX4321 fixup needed ? */ + if (IS_OFDM(rate)) + table_ptr = M_RT_DIRMAP_A; + else + table_ptr = M_RT_DIRMAP_B; + + /* for a given rate, the LS-nibble of the PLCP SIGNAL field is + * the index into the rate table. + */ + phy_rate = rate_info[rate] & WLC_RATE_MASK; + index = phy_rate & 0xf; + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)); +} + +void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail) +{ + wlc_hw->antsel_avail = antsel_avail; +} diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.h b/drivers/staging/brcm80211/brcmsmac/bottom_mac.h new file mode 100644 index 0000000..af8af69 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bottom_mac.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#ifndef _BRCM_BOTTOM_MAC_H_ +#define _BRCM_BOTTOM_MAC_H_ + +/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info) + driver */ +typedef struct wlc_bmac_state { + u32 machwcap; /* mac hw capibility */ + u32 preamble_ovr; /* preamble override */ +} wlc_bmac_state_t; + +enum { + IOV_BMAC_DIAG, + IOV_BMAC_SBGPIOTIMERVAL, + IOV_BMAC_SBGPIOOUT, + IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ + IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ + IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ + IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ + IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ + IOV_BMAC_OTPDUMP, + IOV_BMAC_OTPSTAT, + IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ + IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ + IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ + IOV_BMAC_PCIELCREG, /* PCIE LCREG */ + IOV_BMAC_SBGPIOTIMERMASK, + IOV_BMAC_RFDISABLEDLY, + IOV_BMAC_PCIEREG, /* PCIE REG */ + IOV_BMAC_PCICFGREG, /* PCI Config register */ + IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ + IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ + IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ + IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ + IOV_BMAC_DMALPBK, + IOV_BMAC_CCREG, + IOV_BMAC_COREREG, + IOV_BMAC_SDCIS, + IOV_BMAC_SDIO_DRIVE, + IOV_BMAC_OTPW, + IOV_BMAC_NVOTPW, + IOV_BMAC_SROM, + IOV_BMAC_SRCRC, + IOV_BMAC_CIS_SOURCE, + IOV_BMAC_CISVAR, + IOV_BMAC_OTPLOCK, + IOV_BMAC_OTP_CHIPID, + IOV_BMAC_CUSTOMVAR1, + IOV_BMAC_BOARDFLAGS, + IOV_BMAC_BOARDFLAGS2, + IOV_BMAC_WPSLED, + IOV_BMAC_NVRAM_SOURCE, + IOV_BMAC_OTP_RAW_READ, + IOV_BMAC_LAST +}; + +extern int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam); +extern int wlc_bmac_detach(struct wlc_info *wlc); +extern void wlc_bmac_watchdog(void *arg); + +/* up/down, reset, clk */ +extern void wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, + uint offset, const void *buf, int len, + u32 sel); +extern void wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, + void *buf, int len, u32 sel); +#define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len) \ + wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) +#define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len) \ + wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) + +extern void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on); +extern void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk); +extern void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk); +extern void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags); +extern void wlc_bmac_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute); +extern int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode); + +/* chanspec, ucode interface */ +extern void wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, + chanspec_t chanspec, + bool mute, struct txpwr_limits *txpwr); + +extern int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, + uint *blocks); +extern void wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, + u16 val, int bands); +extern void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val); +extern u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands); +extern void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant); +extern u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, + u8 antsel_type); +extern int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, + wlc_bmac_state_t *state); +extern void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v); +extern u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset); +extern void wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, + int len, void *buf); +extern void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, + uint *len); + +extern void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, + u8 *ea); + +extern bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot); +extern void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode); + +extern void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw); + +extern void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, + u32 override_bit); +extern void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, + u32 override_bit); + +extern void wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, + int match_reg_offset, + const u8 *addr); +extern void wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, + void *bcn, int len, bool both); + +extern void wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr); +extern void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin); +extern void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax); + +extern void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, + u16 LRL); + +extern void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw); + + +/* API for BMAC driver (e.g. wlc_phy.c etc) */ + +extern void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw); +extern void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, + mbool req_bit); +extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); +extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); +extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); + +#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c deleted file mode 100644 index 6449743..0000000 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.c +++ /dev/null @@ -1,1945 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#define __UNDEF_NO_VERSION__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "bcmdma.h" - -#include "phy/wlc_phy_int.h" -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_key.h" -#include "wlc_channel.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "ucode_loader.h" -#include "brcms_mac80211.h" - -#define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ - -#define LOCK(wl) spin_lock_bh(&(wl)->lock) -#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) - -/* locking from inside brcms_isr */ -#define ISR_LOCK(wl, flags)\ - do {\ - spin_lock(&(wl)->isr_lock);\ - (void)(flags); } \ - while (0) - -#define ISR_UNLOCK(wl, flags)\ - do {\ - spin_unlock(&(wl)->isr_lock);\ - (void)(flags); } \ - while (0) - -/* locking under LOCK() to synchronize with brcms_isr */ -#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) -#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) - -static void brcms_timer(unsigned long data); -static void _brcms_timer(struct brcms_timer *t); - - -static int ieee_hw_init(struct ieee80211_hw *hw); -static int ieee_hw_rate_init(struct ieee80211_hw *hw); - -static int wl_linux_watchdog(void *ctx); - -/* Flags we support */ -#define MAC_FILTERS (FIF_PROMISC_IN_BSS | \ - FIF_ALLMULTI | \ - FIF_FCSFAIL | \ - FIF_PLCPFAIL | \ - FIF_CONTROL | \ - FIF_OTHER_BSS | \ - FIF_BCN_PRBRESP_PROMISC) - -static int n_adapters_found; - -static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); -static void brcms_release_fw(struct brcms_info *wl); - -/* local prototypes */ -static void brcms_dpc(unsigned long data); -static irqreturn_t brcms_isr(int irq, void *dev_id); - -static int __devinit brcms_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent); -static void brcms_remove(struct pci_dev *pdev); -static void brcms_free(struct brcms_info *wl); -static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); - -MODULE_AUTHOR("Broadcom Corporation"); -MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); -MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); -MODULE_LICENSE("Dual BSD/GPL"); - -/* recognized PCI IDs */ -static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { - {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ - {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ - {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ - /* 43224 Ven */ - {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - {0} -}; - -MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); - -#ifdef BCMDBG -static int msglevel = 0xdeadbeef; -module_param(msglevel, int, 0); -static int phymsglevel = 0xdeadbeef; -module_param(phymsglevel, int, 0); -#endif /* BCMDBG */ - -#define HW_TO_WL(hw) (hw->priv) -#define WL_TO_HW(wl) (wl->pub->ieee_hw) - -/* MAC80211 callback functions */ -static int brcms_ops_start(struct ieee80211_hw *hw); -static void brcms_ops_stop(struct ieee80211_hw *hw); -static int brcms_ops_add_interface(struct ieee80211_hw *hw, - struct ieee80211_vif *vif); -static void brcms_ops_remove_interface(struct ieee80211_hw *hw, - struct ieee80211_vif *vif); -static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); -static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_bss_conf *info, - u32 changed); -static void brcms_ops_configure_filter(struct ieee80211_hw *hw, - unsigned int changed_flags, - unsigned int *total_flags, u64 multicast); -static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, - bool set); -static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); -static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); -static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); -static int brcms_ops_get_stats(struct ieee80211_hw *hw, - struct ieee80211_low_level_stats *stats); -static void brcms_ops_sta_notify(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum sta_notify_cmd cmd, - struct ieee80211_sta *sta); -static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, - const struct ieee80211_tx_queue_params *params); -static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); -static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int brcms_ops_sta_remove(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum ieee80211_ampdu_mlme_action action, - struct ieee80211_sta *sta, u16 tid, u16 *ssn, - u8 buf_size); -static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); -static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); - -static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) -{ - struct brcms_info *wl = hw->priv; - - LOCK(wl); - if (!wl->pub->up) { - wiphy_err(wl->wiphy, "ops->tx called while down\n"); - kfree_skb(skb); - goto done; - } - wlc_sendpkt_mac80211(wl->wlc, skb, hw); - done: - UNLOCK(wl); -} - -static int brcms_ops_start(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - bool blocked; - /* - struct ieee80211_channel *curchan = hw->conf.channel; - */ - - ieee80211_wake_queues(hw); - LOCK(wl); - blocked = brcms_rfkill_set_hw_state(wl); - UNLOCK(wl); - if (!blocked) - wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); - - return 0; -} - -static void brcms_ops_stop(struct ieee80211_hw *hw) -{ - ieee80211_stop_queues(hw); -} - -static int -brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) -{ - struct brcms_info *wl; - int err; - - /* Just STA for now */ - if (vif->type != NL80211_IFTYPE_AP && - vif->type != NL80211_IFTYPE_MESH_POINT && - vif->type != NL80211_IFTYPE_STATION && - vif->type != NL80211_IFTYPE_WDS && - vif->type != NL80211_IFTYPE_ADHOC) { - wiphy_err(hw->wiphy, "%s: Attempt to add type %d, only" - " STA for now\n", __func__, vif->type); - return -EOPNOTSUPP; - } - - wl = HW_TO_WL(hw); - LOCK(wl); - err = brcms_up(wl); - UNLOCK(wl); - - if (err != 0) { - wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, - err); - } - return err; -} - -static void -brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) -{ - struct brcms_info *wl; - - wl = HW_TO_WL(hw); - - /* put driver in down state */ - LOCK(wl); - brcms_down(wl); - UNLOCK(wl); -} - -/* - * precondition: perimeter lock has been acquired - */ -static int -ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, - enum nl80211_channel_type type) -{ - struct brcms_info *wl = HW_TO_WL(hw); - int err = 0; - - switch (type) { - case NL80211_CHAN_HT20: - case NL80211_CHAN_NO_HT: - err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); - break; - case NL80211_CHAN_HT40MINUS: - case NL80211_CHAN_HT40PLUS: - wiphy_err(hw->wiphy, - "%s: Need to implement 40 Mhz Channels!\n", __func__); - err = 1; - break; - } - - if (err) - return -EIO; - return err; -} - -static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) -{ - struct ieee80211_conf *conf = &hw->conf; - struct brcms_info *wl = HW_TO_WL(hw); - int err = 0; - int new_int; - struct wiphy *wiphy = hw->wiphy; - - LOCK(wl); - if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { - if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) - < 0) { - wiphy_err(wiphy, "%s: Error setting listen_interval\n", - __func__); - err = -EIO; - goto config_out; - } - wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); - } - if (changed & IEEE80211_CONF_CHANGE_MONITOR) - wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", - __func__, conf->flags & IEEE80211_CONF_MONITOR ? - "true" : "false"); - if (changed & IEEE80211_CONF_CHANGE_PS) - wiphy_err(wiphy, "%s: change power-save mode: %s (implement)\n", - __func__, conf->flags & IEEE80211_CONF_PS ? - "true" : "false"); - - if (changed & IEEE80211_CONF_CHANGE_POWER) { - if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4) - < 0) { - wiphy_err(wiphy, "%s: Error setting power_level\n", - __func__); - err = -EIO; - goto config_out; - } - wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int); - if (new_int != (conf->power_level * 4)) - wiphy_err(wiphy, "%s: Power level req != actual, %d %d" - "\n", __func__, conf->power_level * 4, - new_int); - } - if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { - err = ieee_set_channel(hw, conf->channel, conf->channel_type); - } - if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { - if (wlc_set - (wl->wlc, WLC_SET_SRL, - conf->short_frame_max_tx_count) < 0) { - wiphy_err(wiphy, "%s: Error setting srl\n", __func__); - err = -EIO; - goto config_out; - } - if (wlc_set(wl->wlc, WLC_SET_LRL, conf->long_frame_max_tx_count) - < 0) { - wiphy_err(wiphy, "%s: Error setting lrl\n", __func__); - err = -EIO; - goto config_out; - } - } - - config_out: - UNLOCK(wl); - return err; -} - -static void -brcms_ops_bss_info_changed(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - struct ieee80211_bss_conf *info, u32 changed) -{ - struct brcms_info *wl = HW_TO_WL(hw); - struct wiphy *wiphy = hw->wiphy; - int val; - - if (changed & BSS_CHANGED_ASSOC) { - /* association status changed (associated/disassociated) - * also implies a change in the AID. - */ - wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, - __func__, info->assoc ? "" : "dis"); - LOCK(wl); - wlc_associate_upd(wl->wlc, info->assoc); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_ERP_SLOT) { - /* slot timing changed */ - if (info->use_short_slot) - val = 1; - else - val = 0; - LOCK(wl); - wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); - UNLOCK(wl); - } - - if (changed & BSS_CHANGED_HT) { - /* 802.11n parameters changed */ - u16 mode = info->ht_operation_mode; - - LOCK(wl); - wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, - mode & IEEE80211_HT_OP_MODE_PROTECTION); - wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, - mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); - wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, - mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BASIC_RATES) { - struct ieee80211_supported_band *bi; - u32 br_mask, i; - u16 rate; - struct wl_rateset rs; - int error; - - /* retrieve the current rates */ - LOCK(wl); - error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, - &rs, sizeof(rs), NULL); - UNLOCK(wl); - if (error) { - wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", - __func__, error); - return; - } - br_mask = info->basic_rates; - bi = hw->wiphy->bands[wlc_get_curband(wl->wlc)]; - for (i = 0; i < bi->n_bitrates; i++) { - /* convert to internal rate value */ - rate = (bi->bitrates[i].bitrate << 1) / 10; - - /* set/clear basic rate flag */ - brcms_set_basic_rate(&rs, rate, br_mask & 1); - br_mask >>= 1; - } - - /* update the rate set */ - LOCK(wl); - wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BEACON_INT) { - /* Beacon interval changed */ - LOCK(wl); - wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BSSID) { - /* BSSID changed, for whatever reason (IBSS and managed mode) */ - LOCK(wl); - wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, - info->bssid); - UNLOCK(wl); - } - if (changed & BSS_CHANGED_BEACON) { - /* Beacon data changed, retrieve new beacon (beaconing modes) */ - wiphy_err(wiphy, "%s: beacon changed\n", __func__); - } - if (changed & BSS_CHANGED_BEACON_ENABLED) { - /* Beaconing should be enabled/disabled (beaconing modes) */ - wiphy_err(wiphy, "%s: Beacon enabled: %s\n", __func__, - info->enable_beacon ? "true" : "false"); - } - if (changed & BSS_CHANGED_CQM) { - /* Connection quality monitor config changed */ - wiphy_err(wiphy, "%s: cqm change: threshold %d, hys %d " - " (implement)\n", __func__, info->cqm_rssi_thold, - info->cqm_rssi_hyst); - } - if (changed & BSS_CHANGED_IBSS) { - /* IBSS join status changed */ - wiphy_err(wiphy, "%s: IBSS joined: %s (implement)\n", __func__, - info->ibss_joined ? "true" : "false"); - } - if (changed & BSS_CHANGED_ARP_FILTER) { - /* Hardware ARP filter address list or state changed */ - wiphy_err(wiphy, "%s: arp filtering: enabled %s, count %d" - " (implement)\n", __func__, info->arp_filter_enabled ? - "true" : "false", info->arp_addr_cnt); - } - if (changed & BSS_CHANGED_QOS) { - /* - * QoS for this association was enabled/disabled. - * Note that it is only ever disabled for station mode. - */ - wiphy_err(wiphy, "%s: qos enabled: %s (implement)\n", __func__, - info->qos ? "true" : "false"); - } - if (changed & BSS_CHANGED_IDLE) { - /* Idle changed for this BSS/interface */ - wiphy_err(wiphy, "%s: BSS idle: %s (implement)\n", __func__, - info->idle ? "true" : "false"); - } - return; -} - -static void -brcms_ops_configure_filter(struct ieee80211_hw *hw, - unsigned int changed_flags, - unsigned int *total_flags, u64 multicast) -{ - struct brcms_info *wl = hw->priv; - struct wiphy *wiphy = hw->wiphy; - - changed_flags &= MAC_FILTERS; - *total_flags &= MAC_FILTERS; - if (changed_flags & FIF_PROMISC_IN_BSS) - wiphy_err(wiphy, "FIF_PROMISC_IN_BSS\n"); - if (changed_flags & FIF_ALLMULTI) - wiphy_err(wiphy, "FIF_ALLMULTI\n"); - if (changed_flags & FIF_FCSFAIL) - wiphy_err(wiphy, "FIF_FCSFAIL\n"); - if (changed_flags & FIF_PLCPFAIL) - wiphy_err(wiphy, "FIF_PLCPFAIL\n"); - if (changed_flags & FIF_CONTROL) - wiphy_err(wiphy, "FIF_CONTROL\n"); - if (changed_flags & FIF_OTHER_BSS) - wiphy_err(wiphy, "FIF_OTHER_BSS\n"); - if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { - LOCK(wl); - if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { - wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; - wlc_mac_bcn_promisc_change(wl->wlc, 1); - } else { - wlc_mac_bcn_promisc_change(wl->wlc, 0); - wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; - } - UNLOCK(wl); - } - return; -} - -static int -brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) -{ - return 0; -} - -static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - LOCK(wl); - wlc_scan_start(wl->wlc); - UNLOCK(wl); - return; -} - -static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = hw->priv; - LOCK(wl); - wlc_scan_stop(wl->wlc); - UNLOCK(wl); - return; -} - -static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) -{ - wiphy_err(hw->wiphy, "%s: Enter\n", __func__); - return; -} - -static int -brcms_ops_get_stats(struct ieee80211_hw *hw, - struct ieee80211_low_level_stats *stats) -{ - struct brcms_info *wl = hw->priv; - struct wl_cnt *cnt; - - LOCK(wl); - cnt = wl->pub->_cnt; - stats->dot11ACKFailureCount = 0; - stats->dot11RTSFailureCount = 0; - stats->dot11FCSErrorCount = 0; - stats->dot11RTSSuccessCount = 0; - UNLOCK(wl); - return 0; -} - -static void -brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - enum sta_notify_cmd cmd, struct ieee80211_sta *sta) -{ - switch (cmd) { - default: - wiphy_err(hw->wiphy, "%s: Unknown cmd = %d\n", __func__, - cmd); - break; - } - return; -} - -static int -brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, - const struct ieee80211_tx_queue_params *params) -{ - struct brcms_info *wl = hw->priv; - - LOCK(wl); - wlc_wme_setparams(wl->wlc, queue, params, true); - UNLOCK(wl); - - return 0; -} - -static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) -{ - wiphy_err(hw->wiphy, "%s: Enter\n", __func__); - return 0; -} - -static int -brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) -{ - struct scb *scb; - - int i; - struct brcms_info *wl = hw->priv; - - /* Init the scb */ - scb = (struct scb *)sta->drv_priv; - memset(scb, 0, sizeof(struct scb)); - for (i = 0; i < NUMPRIO; i++) - scb->seqctl[i] = 0xFFFF; - scb->seqctl_nonqos = 0xFFFF; - scb->magic = SCB_MAGIC; - - wl->pub->global_scb = scb; - wl->pub->global_ampdu = &(scb->scb_ampdu); - wl->pub->global_ampdu->scb = scb; - wl->pub->global_ampdu->max_pdu = 16; - brcmu_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, - AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); - - sta->ht_cap.ht_supported = true; - sta->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; - sta->ht_cap.ampdu_density = AMPDU_DEF_MPDU_DENSITY; - sta->ht_cap.cap = IEEE80211_HT_CAP_GRN_FLD | - IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT; - - /* minstrel_ht initiates addBA on our behalf by calling ieee80211_start_tx_ba_session() */ - return 0; -} - -static int -brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) -{ - return 0; -} - -static int -brcms_ops_ampdu_action(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - enum ieee80211_ampdu_mlme_action action, - struct ieee80211_sta *sta, u16 tid, u16 *ssn, - u8 buf_size) -{ - struct scb *scb = (struct scb *)sta->drv_priv; - struct brcms_info *wl = hw->priv; - int status; - - if (WARN_ON(scb->magic != SCB_MAGIC)) - return -EIDRM; - switch (action) { - case IEEE80211_AMPDU_RX_START: - break; - case IEEE80211_AMPDU_RX_STOP: - break; - case IEEE80211_AMPDU_TX_START: - LOCK(wl); - status = wlc_aggregatable(wl->wlc, tid); - UNLOCK(wl); - if (!status) { - wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", - tid); - return -EINVAL; - } - /* XXX: Use the starting sequence number provided ... */ - *ssn = 0; - ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); - break; - - case IEEE80211_AMPDU_TX_STOP: - LOCK(wl); - wlc_ampdu_flush(wl->wlc, sta, tid); - UNLOCK(wl); - ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); - break; - case IEEE80211_AMPDU_TX_OPERATIONAL: - /* Not sure what to do here */ - /* Power save wakeup */ - break; - default: - wiphy_err(wl->wiphy, "%s: Invalid command, ignoring\n", - __func__); - } - - return 0; -} - -static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = HW_TO_WL(hw); - bool blocked; - - LOCK(wl); - blocked = wlc_check_radio_disabled(wl->wlc); - UNLOCK(wl); - - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); -} - -static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) -{ - struct brcms_info *wl = HW_TO_WL(hw); - - no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); - - /* wait for packet queue and dma fifos to run empty */ - LOCK(wl); - wlc_wait_for_tx_completion(wl->wlc, drop); - UNLOCK(wl); -} - -static const struct ieee80211_ops brcms_ops = { - .tx = brcms_ops_tx, - .start = brcms_ops_start, - .stop = brcms_ops_stop, - .add_interface = brcms_ops_add_interface, - .remove_interface = brcms_ops_remove_interface, - .config = brcms_ops_config, - .bss_info_changed = brcms_ops_bss_info_changed, - .configure_filter = brcms_ops_configure_filter, - .set_tim = brcms_ops_set_tim, - .sw_scan_start = brcms_ops_sw_scan_start, - .sw_scan_complete = brcms_ops_sw_scan_complete, - .set_tsf = brcms_ops_set_tsf, - .get_stats = brcms_ops_get_stats, - .sta_notify = brcms_ops_sta_notify, - .conf_tx = brcms_ops_conf_tx, - .get_tsf = brcms_ops_get_tsf, - .sta_add = brcms_ops_sta_add, - .sta_remove = brcms_ops_sta_remove, - .ampdu_action = brcms_ops_ampdu_action, - .rfkill_poll = brcms_ops_rfkill_poll, - .flush = brcms_ops_flush, -}; - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int brcms_set_hint(struct brcms_info *wl, char *abbrev) -{ - return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); -} - -/** - * attach to the WL device. - * - * Attach to the WL device identified by vendor and device parameters. - * regs is a host accessible memory address pointing to WL device registers. - * - * brcms_attach is not defined as static because in the case where no bus - * is defined, wl_attach will never be called, and thus, gcc will issue - * a warning that this function is defined but not used if we declare - * it as static. - * - * - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static struct brcms_info *brcms_attach(u16 vendor, u16 device, - unsigned long regs, - uint bustype, void *btparam, uint irq) -{ - struct brcms_info *wl = NULL; - int unit, err; - unsigned long base_addr; - struct ieee80211_hw *hw; - u8 perm[ETH_ALEN]; - - unit = n_adapters_found; - err = 0; - - if (unit < 0) { - return NULL; - } - - /* allocate private info */ - hw = pci_get_drvdata(btparam); /* btparam == pdev */ - if (hw != NULL) - wl = hw->priv; - if (WARN_ON(hw == NULL) || WARN_ON(wl == NULL)) - return NULL; - wl->wiphy = hw->wiphy; - - atomic_set(&wl->callbacks, 0); - - /* setup the bottom half handler */ - tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); - - - - base_addr = regs; - - if (bustype == PCI_BUS || bustype == RPC_BUS) { - /* Do nothing */ - } else { - bustype = PCI_BUS; - BCMMSG(wl->wiphy, "force to PCI\n"); - } - wl->bcm_bustype = bustype; - - wl->regsva = ioremap_nocache(base_addr, PCI_BAR0_WINSZ); - if (wl->regsva == NULL) { - wiphy_err(wl->wiphy, "wl%d: ioremap() failed\n", unit); - goto fail; - } - spin_lock_init(&wl->lock); - spin_lock_init(&wl->isr_lock); - - /* prepare ucode */ - if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { - wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " - "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); - brcms_release_fw(wl); - brcms_remove((struct pci_dev *)btparam); - return NULL; - } - - /* common load-time initialization */ - wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, - wl->regsva, wl->bcm_bustype, btparam, &err); - brcms_release_fw(wl); - if (!wl->wlc) { - wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", - KBUILD_MODNAME, err); - goto fail; - } - wl->pub = wlc_pub(wl->wlc); - - wl->pub->ieee_hw = hw; - - if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) { - wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", - unit); - } - - /* register our interrupt handler */ - if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { - wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); - goto fail; - } - wl->irq = irq; - - /* register module */ - wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); - - if (ieee_hw_init(hw)) { - wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, - __func__); - goto fail; - } - - memcpy(perm, &wl->pub->cur_etheraddr, ETH_ALEN); - if (WARN_ON(!is_valid_ether_addr(perm))) - goto fail; - SET_IEEE80211_PERM_ADDR(hw, perm); - - err = ieee80211_register_hw(hw); - if (err) { - wiphy_err(wl->wiphy, "%s: ieee80211_register_hw failed, status" - "%d\n", __func__, err); - } - - if (wl->pub->srom_ccode[0]) - err = brcms_set_hint(wl, wl->pub->srom_ccode); - else - err = brcms_set_hint(wl, "US"); - if (err) { - wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", - __func__, err); - } - - n_adapters_found++; - return wl; - -fail: - brcms_free(wl); - return NULL; -} - - - -#define CHAN2GHZ(channel, freqency, chflags) { \ - .band = IEEE80211_BAND_2GHZ, \ - .center_freq = (freqency), \ - .hw_value = (channel), \ - .flags = chflags, \ - .max_antenna_gain = 0, \ - .max_power = 19, \ -} - -static struct ieee80211_channel brcms_2ghz_chantable[] = { - CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(4, 2427, IEEE80211_CHAN_NO_HT40MINUS), - CHAN2GHZ(5, 2432, 0), - CHAN2GHZ(6, 2437, 0), - CHAN2GHZ(7, 2442, 0), - CHAN2GHZ(8, 2447, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(9, 2452, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(12, 2467, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(13, 2472, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS), - CHAN2GHZ(14, 2484, - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) -}; - -#define CHAN5GHZ(channel, chflags) { \ - .band = IEEE80211_BAND_5GHZ, \ - .center_freq = 5000 + 5*(channel), \ - .hw_value = (channel), \ - .flags = chflags, \ - .max_antenna_gain = 0, \ - .max_power = 21, \ -} - -static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { - /* UNII-1 */ - CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(44, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS), - /* UNII-2 */ - CHAN5GHZ(52, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(56, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(60, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(64, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - /* MID */ - CHAN5GHZ(100, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(104, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(108, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(112, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(116, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(120, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(124, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(128, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(132, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(136, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(140, - IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | - IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS | - IEEE80211_CHAN_NO_HT40MINUS), - /* UNII-3 */ - CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(153, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(157, IEEE80211_CHAN_NO_HT40MINUS), - CHAN5GHZ(161, IEEE80211_CHAN_NO_HT40PLUS), - CHAN5GHZ(165, IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) -}; - -#define RATE(rate100m, _flags) { \ - .bitrate = (rate100m), \ - .flags = (_flags), \ - .hw_value = (rate100m / 5), \ -} - -static struct ieee80211_rate legacy_ratetable[] = { - RATE(10, 0), - RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(110, IEEE80211_RATE_SHORT_PREAMBLE), - RATE(60, 0), - RATE(90, 0), - RATE(120, 0), - RATE(180, 0), - RATE(240, 0), - RATE(360, 0), - RATE(480, 0), - RATE(540, 0), -}; - -static struct ieee80211_supported_band brcms_band_2GHz_nphy = { - .band = IEEE80211_BAND_2GHZ, - .channels = brcms_2ghz_chantable, - .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), - .bitrates = legacy_ratetable, - .n_bitrates = ARRAY_SIZE(legacy_ratetable), - .ht_cap = { - /* from include/linux/ieee80211.h */ - .cap = IEEE80211_HT_CAP_GRN_FLD | - IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, - .ht_supported = true, - .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, - .ampdu_density = AMPDU_DEF_MPDU_DENSITY, - .mcs = { - /* placeholders for now */ - .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, - .rx_highest = 500, - .tx_params = IEEE80211_HT_MCS_TX_DEFINED} - } -}; - -static struct ieee80211_supported_band brcms_band_5GHz_nphy = { - .band = IEEE80211_BAND_5GHZ, - .channels = brcms_5ghz_nphy_chantable, - .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), - .bitrates = legacy_ratetable + 4, - .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, - .ht_cap = { - /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ - .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ - .ht_supported = true, - .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, - .ampdu_density = AMPDU_DEF_MPDU_DENSITY, - .mcs = { - /* placeholders for now */ - .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, - .rx_highest = 500, - .tx_params = IEEE80211_HT_MCS_TX_DEFINED} - } -}; - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int ieee_hw_rate_init(struct ieee80211_hw *hw) -{ - struct brcms_info *wl = HW_TO_WL(hw); - int has_5g; - char phy_list[4]; - - has_5g = 0; - - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; - hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; - - if (wlc_get(wl->wlc, WLC_GET_PHYLIST, (int *)&phy_list) < 0) { - wiphy_err(hw->wiphy, "Phy list failed\n"); - } - - if (phy_list[0] == 'n' || phy_list[0] == 'c') { - if (phy_list[0] == 'c') { - /* Single stream */ - brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; - brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; - } - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; - } else { - return -EPERM; - } - - /* Assume all bands use the same phy. True for 11n devices. */ - if (NBANDS_PUB(wl->pub) > 1) { - has_5g++; - if (phy_list[0] == 'n' || phy_list[0] == 'c') { - hw->wiphy->bands[IEEE80211_BAND_5GHZ] = - &brcms_band_5GHz_nphy; - } else { - return -EPERM; - } - } - return 0; -} - -/* - * is called in brcms_pci_probe() context, therefore no locking required. - */ -static int ieee_hw_init(struct ieee80211_hw *hw) -{ - hw->flags = IEEE80211_HW_SIGNAL_DBM - /* | IEEE80211_HW_CONNECTION_MONITOR What is this? */ - | IEEE80211_HW_REPORTS_TX_ACK_STATUS - | IEEE80211_HW_AMPDU_AGGREGATION; - - hw->extra_tx_headroom = wlc_get_header_len(); - hw->queues = N_TX_QUEUES; - /* FIXME: this doesn't seem to be used properly in minstrel_ht. - * mac80211/status.c:ieee80211_tx_status() checks this value, - * but mac80211/rc80211_minstrel_ht.c:minstrel_ht_get_rate() - * appears to always set 3 rates - */ - hw->max_rates = 2; /* Primary rate and 1 fallback rate */ - - hw->channel_change_time = 7 * 1000; /* channel change time is dependent on chip and band */ - hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); - - hw->rate_control_algorithm = "minstrel_ht"; - - hw->sta_data_size = sizeof(struct scb); - return ieee_hw_rate_init(hw); -} - -/** - * determines if a device is a WL device, and if so, attaches it. - * - * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a brcms_attach() on it. - * - * Perimeter lock is initialized in the course of this function. - */ -static int __devinit -brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - int rc; - struct brcms_info *wl; - struct ieee80211_hw *hw; - u32 val; - - dev_info(&pdev->dev, "bus %d slot %d func %d irq %d\n", - pdev->bus->number, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), pdev->irq); - - if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || - ((pdev->device != 0x0576) && - ((pdev->device & 0xff00) != 0x4300) && - ((pdev->device & 0xff00) != 0x4700) && - ((pdev->device < 43000) || (pdev->device > 43999)))) - return -ENODEV; - - rc = pci_enable_device(pdev); - if (rc) { - pr_err("%s: Cannot enable device %d-%d_%d\n", - __func__, pdev->bus->number, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); - return -ENODEV; - } - pci_set_master(pdev); - - pci_read_config_dword(pdev, 0x40, &val); - if ((val & 0x0000ff00) != 0) - pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - - hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); - if (!hw) { - pr_err("%s: ieee80211_alloc_hw failed\n", __func__); - return -ENOMEM; - } - - SET_IEEE80211_DEV(hw, &pdev->dev); - - pci_set_drvdata(pdev, hw); - - memset(hw->priv, 0, sizeof(*wl)); - - wl = brcms_attach(pdev->vendor, pdev->device, - pci_resource_start(pdev, 0), PCI_BUS, pdev, - pdev->irq); - - if (!wl) { - pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, - __func__); - return -ENODEV; - } - return 0; -} - -static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - wiphy_err(wl->wiphy, - "brcms_suspend: pci_get_drvdata failed\n"); - return -ENODEV; - } - - /* only need to flag hw is down for proper resume */ - LOCK(wl); - wl->pub->hw_up = false; - UNLOCK(wl); - - pci_save_state(pdev); - pci_disable_device(pdev); - return pci_set_power_state(pdev, PCI_D3hot); -} - -static int brcms_resume(struct pci_dev *pdev) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - int err = 0; - u32 val; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - wiphy_err(wl->wiphy, - "wl: brcms_resume: pci_get_drvdata failed\n"); - return -ENODEV; - } - - err = pci_set_power_state(pdev, PCI_D0); - if (err) - return err; - - pci_restore_state(pdev); - - err = pci_enable_device(pdev); - if (err) - return err; - - pci_set_master(pdev); - - pci_read_config_dword(pdev, 0x40, &val); - if ((val & 0x0000ff00) != 0) - pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - - /* - * done. driver will be put in up state - * in brcms_ops_add_interface() call. - */ - return err; -} - -/* -* called from both kernel as from this kernel module. -* precondition: perimeter lock is not acquired. -*/ -static void brcms_remove(struct pci_dev *pdev) -{ - struct brcms_info *wl; - struct ieee80211_hw *hw; - int status; - - hw = pci_get_drvdata(pdev); - wl = HW_TO_WL(hw); - if (!wl) { - pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); - return; - } - - LOCK(wl); - status = wlc_chipmatch(pdev->vendor, pdev->device); - UNLOCK(wl); - if (!status) { - wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch " - "failed\n"); - return; - } - if (wl->wlc) { - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); - wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); - ieee80211_unregister_hw(hw); - LOCK(wl); - brcms_down(wl); - UNLOCK(wl); - } - pci_disable_device(pdev); - - brcms_free(wl); - - pci_set_drvdata(pdev, NULL); - ieee80211_free_hw(hw); -} - -static struct pci_driver brcms_pci_driver = { - .name = KBUILD_MODNAME, - .probe = brcms_pci_probe, - .suspend = brcms_suspend, - .resume = brcms_resume, - .remove = __devexit_p(brcms_remove), - .id_table = brcms_pci_id_table, -}; - -/** - * This is the main entry point for the WL driver. - * - * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a brcms_attach() on it. - * - */ -static int __init brcms_module_init(void) -{ - int error = -ENODEV; - -#ifdef BCMDBG - if (msglevel != 0xdeadbeef) - brcm_msg_level = msglevel; - if (phymsglevel != 0xdeadbeef) - phyhal_msg_level = phymsglevel; -#endif /* BCMDBG */ - - error = pci_register_driver(&brcms_pci_driver); - if (!error) - return 0; - - - - return error; -} - -/** - * This function unloads the WL driver from the system. - * - * This function unconditionally unloads the WL driver module from the - * system. - * - */ -static void __exit brcms_module_exit(void) -{ - pci_unregister_driver(&brcms_pci_driver); - -} - -module_init(brcms_module_init); -module_exit(brcms_module_exit); - -/** - * This function frees the WL per-device resources. - * - * This function frees resources owned by the WL device pointed to - * by the wl parameter. - * - * precondition: can both be called locked and unlocked - * - */ -static void brcms_free(struct brcms_info *wl) -{ - struct brcms_timer *t, *next; - - /* free ucode data */ - if (wl->fw.fw_cnt) - brcms_ucode_data_free(); - if (wl->irq) - free_irq(wl->irq, wl); - - /* kill dpc */ - tasklet_kill(&wl->tasklet); - - if (wl->pub) { - wlc_module_unregister(wl->pub, "linux", wl); - } - - /* free common resources */ - if (wl->wlc) { - wlc_detach(wl->wlc); - wl->wlc = NULL; - wl->pub = NULL; - } - - /* virtual interface deletion is deferred so we cannot spinwait */ - - /* wait for all pending callbacks to complete */ - while (atomic_read(&wl->callbacks) > 0) - schedule(); - - /* free timers */ - for (t = wl->timers; t; t = next) { - next = t->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - } - - /* - * unregister_netdev() calls get_stats() which may read chip registers - * so we cannot unmap the chip registers until after calling unregister_netdev() . - */ - if (wl->regsva && wl->bcm_bustype != SDIO_BUS && - wl->bcm_bustype != JTAG_BUS) { - iounmap((void *)wl->regsva); - } - wl->regsva = NULL; -} - -/* flags the given rate in rateset as requested */ -static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) -{ - u32 i; - - for (i = 0; i < rs->count; i++) { - if (rate != (rs->rates[i] & 0x7f)) - continue; - - if (is_br) - rs->rates[i] |= WLC_RATE_FLAG; - else - rs->rates[i] &= WLC_RATE_MASK; - return; - } -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, - bool state, int prio) -{ - wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_init(struct brcms_info *wl) -{ - BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - brcms_reset(wl); - - wlc_init(wl->wlc); -} - -/* - * precondition: perimeter lock has been acquired - */ -uint brcms_reset(struct brcms_info *wl) -{ - BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - wlc_reset(wl->wlc); - - /* dpc will not be rescheduled */ - wl->resched = 0; - - return 0; -} - -/* - * These are interrupt on/off entry points. Disable interrupts - * during interrupt state transition. - */ -void brcms_intrson(struct brcms_info *wl) -{ - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrson(wl->wlc); - INT_UNLOCK(wl, flags); -} - -/* - * precondition: perimeter lock has been acquired - */ -bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) -{ - return true; -} - -u32 brcms_intrsoff(struct brcms_info *wl) -{ - unsigned long flags; - u32 status; - - INT_LOCK(wl, flags); - status = wlc_intrsoff(wl->wlc); - INT_UNLOCK(wl, flags); - return status; -} - -void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) -{ - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrsrestore(wl->wlc, macintmask); - INT_UNLOCK(wl, flags); -} - -/* - * precondition: perimeter lock has been acquired - */ -int brcms_up(struct brcms_info *wl) -{ - int error = 0; - - if (wl->pub->up) - return 0; - - error = wlc_up(wl->wlc); - - return error; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_down(struct brcms_info *wl) -{ - uint callbacks, ret_val = 0; - - /* call common down function */ - ret_val = wlc_down(wl->wlc); - callbacks = atomic_read(&wl->callbacks) - ret_val; - - /* wait for down callbacks to complete */ - UNLOCK(wl); - - /* For HIGH_only driver, it's important to actually schedule other work, - * not just spin wait since everything runs at schedule level - */ - SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); - - LOCK(wl); -} - -static irqreturn_t brcms_isr(int irq, void *dev_id) -{ - struct brcms_info *wl; - bool ours, wantdpc; - unsigned long flags; - - wl = (struct brcms_info *) dev_id; - - ISR_LOCK(wl, flags); - - /* call common first level interrupt handler */ - ours = wlc_isr(wl->wlc, &wantdpc); - if (ours) { - /* if more to do... */ - if (wantdpc) { - - /* ...and call the second level interrupt handler */ - /* schedule dpc */ - tasklet_schedule(&wl->tasklet); - } - } - - ISR_UNLOCK(wl, flags); - - return IRQ_RETVAL(ours); -} - -static void brcms_dpc(unsigned long data) -{ - struct brcms_info *wl; - - wl = (struct brcms_info *) data; - - LOCK(wl); - - /* call the common second level interrupt handler */ - if (wl->pub->up) { - if (wl->resched) { - unsigned long flags; - - INT_LOCK(wl, flags); - wlc_intrsupd(wl->wlc); - INT_UNLOCK(wl, flags); - } - - wl->resched = wlc_dpc(wl->wlc, true); - } - - /* wlc_dpc() may bring the driver down */ - if (!wl->pub->up) - goto done; - - /* re-schedule dpc */ - if (wl->resched) - tasklet_schedule(&wl->tasklet); - else { - /* re-enable interrupts */ - brcms_intrson(wl); - } - - done: - UNLOCK(wl); -} - -/* - * is called by the kernel from software irq context - */ -static void brcms_timer(unsigned long data) -{ - _brcms_timer((struct brcms_timer *) data); -} - -/* -* precondition: perimeter lock is not acquired - */ -static void _brcms_timer(struct brcms_timer *t) -{ - LOCK(t->wl); - - if (t->set) { - if (t->periodic) { - t->timer.expires = jiffies + t->ms * HZ / 1000; - atomic_inc(&t->wl->callbacks); - add_timer(&t->timer); - t->set = true; - } else - t->set = false; - - t->fn(t->arg); - } - - atomic_dec(&t->wl->callbacks); - - UNLOCK(t->wl); -} - -/* - * Adds a timer to the list. Caller supplies a timer function. - * Is called from wlc. - * - * precondition: perimeter lock has been acquired - */ -struct brcms_timer *brcms_init_timer(struct brcms_info *wl, - void (*fn) (void *arg), - void *arg, const char *name) -{ - struct brcms_timer *t; - - t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); - if (!t) { - wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", - wl->pub->unit); - return 0; - } - - init_timer(&t->timer); - t->timer.data = (unsigned long) t; - t->timer.function = brcms_timer; - t->wl = wl; - t->fn = fn; - t->arg = arg; - t->next = wl->timers; - wl->timers = t; - -#ifdef BCMDBG - t->name = kmalloc(strlen(name) + 1, GFP_ATOMIC); - if (t->name) - strcpy(t->name, name); -#endif - - return t; -} - -/* BMAC_NOTE: Add timer adds only the kernel timer since it's going to be more accurate - * as well as it's easier to make it periodic - * - * precondition: perimeter lock has been acquired - */ -void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, - int periodic) -{ -#ifdef BCMDBG - if (t->set) { - wiphy_err(wl->wiphy, "%s: Already set. Name: %s, per %d\n", - __func__, t->name, periodic); - } -#endif - t->ms = ms; - t->periodic = (bool) periodic; - t->set = true; - t->timer.expires = jiffies + ms * HZ / 1000; - - atomic_inc(&wl->callbacks); - add_timer(&t->timer); -} - -/* - * return true if timer successfully deleted, false if still pending - * - * precondition: perimeter lock has been acquired - */ -bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) -{ - if (t->set) { - t->set = false; - if (!del_timer(&t->timer)) { - return false; - } - atomic_dec(&wl->callbacks); - } - - return true; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) -{ - struct brcms_timer *tmp; - - /* delete the timer in case it is active */ - brcms_del_timer(wl, t); - - if (wl->timers == t) { - wl->timers = wl->timers->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - return; - - } - - tmp = wl->timers; - while (tmp) { - if (tmp->next == t) { - tmp->next = t->next; -#ifdef BCMDBG - kfree(t->name); -#endif - kfree(t); - return; - } - tmp = tmp->next; - } - -} - -/* - * runs in software irq context - * - * precondition: perimeter lock is not acquired - */ -static int wl_linux_watchdog(void *ctx) -{ - return 0; -} - -struct firmware_hdr { - u32 offset; - u32 len; - u32 idx; -}; - -char *brcms_firmwares[MAX_FW_IMAGES] = { - "brcm/bcm43xx", - NULL -}; - -/* - * precondition: perimeter lock has been acquired - */ -int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) -{ - int i, entry; - const u8 *pdata; - struct firmware_hdr *hdr; - for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i]; - entry++, hdr++) { - if (hdr->idx == idx) { - pdata = wl->fw.fw_bin[i]->data + hdr->offset; - *pbuf = kmalloc(hdr->len, GFP_ATOMIC); - if (*pbuf == NULL) { - wiphy_err(wl->wiphy, "fail to alloc %d" - " bytes\n", hdr->len); - goto fail; - } - memcpy(*pbuf, pdata, hdr->len); - return 0; - } - } - } - wiphy_err(wl->wiphy, "ERROR: ucode buf tag:%d can not be found!\n", - idx); - *pbuf = NULL; -fail: - return -ENODATA; -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) -{ - int i, entry; - const u8 *pdata; - struct firmware_hdr *hdr; - for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i]; - entry++, hdr++) { - if (hdr->idx == idx) { - pdata = wl->fw.fw_bin[i]->data + hdr->offset; - if (hdr->len != 4) { - wiphy_err(wl->wiphy, - "ERROR: fw hdr len\n"); - return -ENOMSG; - } - *data = *((u32 *) pdata); - return 0; - } - } - } - wiphy_err(wl->wiphy, "ERROR: ucode tag:%d can not be found!\n", idx); - return -ENOMSG; -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) -{ - int status; - struct device *device = &pdev->dev; - char fw_name[100]; - int i; - - memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); - for (i = 0; i < MAX_FW_IMAGES; i++) { - if (brcms_firmwares[i] == NULL) - break; - sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], - UCODE_LOADER_API_VER); - status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); - if (status) { - wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", - KBUILD_MODNAME, fw_name); - return status; - } - sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], - UCODE_LOADER_API_VER); - status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); - if (status) { - wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", - KBUILD_MODNAME, fw_name); - return status; - } - wl->fw.hdr_num_entries[i] = - wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); - } - wl->fw.fw_cnt = i; - return brcms_ucode_data_init(wl); -} - -/* - * precondition: can both be called locked and unlocked - */ -void brcms_ucode_free_buf(void *p) -{ - kfree(p); -} - -/* - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -static void brcms_release_fw(struct brcms_info *wl) -{ - int i; - for (i = 0; i < MAX_FW_IMAGES; i++) { - release_firmware(wl->fw.fw_bin[i]); - release_firmware(wl->fw.fw_hdr[i]); - } -} - - -/* - * checks validity of all firmware images loaded from user space - * - * Precondition: Since this function is called in brcms_pci_probe() context, - * no locking is required. - */ -int brcms_check_firmwares(struct brcms_info *wl) -{ - int i; - int entry; - int rc = 0; - const struct firmware *fw; - const struct firmware *fw_hdr; - struct firmware_hdr *ucode_hdr; - for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { - fw = wl->fw.fw_bin[i]; - fw_hdr = wl->fw.fw_hdr[i]; - if (fw == NULL && fw_hdr == NULL) { - break; - } else if (fw == NULL || fw_hdr == NULL) { - wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", - __func__); - rc = -EBADF; - } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { - wiphy_err(wl->wiphy, "%s: non integral fw hdr file " - "size %zu/%zu\n", __func__, fw_hdr->size, - sizeof(struct firmware_hdr)); - rc = -EBADF; - } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { - wiphy_err(wl->wiphy, "%s: out of bounds fw file size " - "%zu\n", __func__, fw->size); - rc = -EBADF; - } else { - /* check if ucode section overruns firmware image */ - ucode_hdr = (struct firmware_hdr *)fw_hdr->data; - for (entry = 0; entry < wl->fw.hdr_num_entries[i] && - !rc; entry++, ucode_hdr++) { - if (ucode_hdr->offset + ucode_hdr->len > - fw->size) { - wiphy_err(wl->wiphy, - "%s: conflicting bin/hdr\n", - __func__); - rc = -EBADF; - } - } - } - } - if (rc == 0 && wl->fw.fw_cnt != i) { - wiphy_err(wl->wiphy, "%s: invalid fw_cnt=%d\n", __func__, - wl->fw.fw_cnt); - rc = -EBADF; - } - return rc; -} - -/* - * precondition: perimeter lock has been acquired - */ -bool brcms_rfkill_set_hw_state(struct brcms_info *wl) -{ - bool blocked = wlc_check_radio_disabled(wl->wlc); - - UNLOCK(wl); - wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); - if (blocked) - wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); - LOCK(wl); - return blocked; -} - -/* - * precondition: perimeter lock has been acquired - */ -void brcms_msleep(struct brcms_info *wl, uint ms) -{ - UNLOCK(wl); - msleep(ms); - LOCK(wl); -} diff --git a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h b/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h deleted file mode 100644 index c56707a..0000000 --- a/drivers/staging/brcm80211/brcmsmac/brcms_mac80211.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_MAC80211_IF_H_ -#define _BRCM_MAC80211_IF_H_ - -/* softmac ioctl definitions */ -#define WLC_SET_SHORTSLOT_OVERRIDE 146 - - -/* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and - * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be - * submitted to workqueue instead of being on kernel timer - */ -struct brcms_timer { - struct timer_list timer; - struct brcms_info *wl; - void (*fn) (void *); - void *arg; /* argument to fn */ - uint ms; - bool periodic; - bool set; - struct brcms_timer *next; -#ifdef BCMDBG - char *name; /* Description of the timer */ -#endif -}; - -struct brcms_if { - uint subunit; /* WDS/BSS unit */ - struct pci_dev *pci_dev; -}; - -#define MAX_FW_IMAGES 4 -struct brcms_firmware { - u32 fw_cnt; - const struct firmware *fw_bin[MAX_FW_IMAGES]; - const struct firmware *fw_hdr[MAX_FW_IMAGES]; - u32 hdr_num_entries[MAX_FW_IMAGES]; -}; - -struct brcms_info { - struct wlc_pub *pub; /* pointer to public wlc state */ - void *wlc; /* pointer to private common os-independent data */ - u32 magic; - - int irq; - - spinlock_t lock; /* per-device perimeter lock */ - spinlock_t isr_lock; /* per-device ISR synchronization lock */ - - /* bus type and regsva for unmap in brcms_free() */ - uint bcm_bustype; /* bus type */ - void *regsva; /* opaque chip registers virtual address */ - - /* timer related fields */ - atomic_t callbacks; /* # outstanding callback functions */ - struct brcms_timer *timers; /* timer cleanup queue */ - - struct tasklet_struct tasklet; /* dpc tasklet */ - bool resched; /* dpc needs to be and is rescheduled */ -#ifdef LINUXSTA_PS - u32 pci_psstate[16]; /* pci ps-state save/restore */ -#endif - struct brcms_firmware fw; - struct wiphy *wiphy; -}; - -/* misc callbacks */ -struct brcms_info; -struct brcms_if; -struct wlc_if; -extern void brcms_init(struct brcms_info *wl); -extern uint brcms_reset(struct brcms_info *wl); -extern void brcms_intrson(struct brcms_info *wl); -extern u32 brcms_intrsoff(struct brcms_info *wl); -extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); -extern int brcms_up(struct brcms_info *wl); -extern void brcms_down(struct brcms_info *wl); -extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, - bool state, int prio); -extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); -extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); - -/* timer functions */ -struct brcms_timer; -extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, - void (*fn) (void *arg), void *arg, - const char *name); -extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); -extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, - uint ms, int periodic); -extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); -extern void brcms_msleep(struct brcms_info *wl, uint ms); - -#endif /* _BRCM_MAC80211_IF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bsscfg.h b/drivers/staging/brcm80211/brcmsmac/bsscfg.h new file mode 100644 index 0000000..49c30cd --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bsscfg.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_BSSCFG_H_ +#define _BRCM_BSSCFG_H_ + +/* Check if a particular BSS config is AP or STA */ +#define BSSCFG_AP(cfg) (0) +#define BSSCFG_STA(cfg) (1) + +#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) + +#define NTXRATE 64 /* # tx MPDUs rate is reported for */ +#define MAXMACLIST 64 /* max # source MAC matches */ +#define BCN_TEMPLATE_COUNT 2 + +/* Iterator for "associated" STA bss configs: + (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */ +#define FOREACH_AS_STA(wlc, idx, cfg) \ + for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ + if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated) + +/* As above for all non-NULL BSS configs */ +#define FOREACH_BSS(wlc, idx, cfg) \ + for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ + if ((cfg = (wlc)->bsscfg[idx])) + +/* BSS configuration state */ +struct wlc_bsscfg { + struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */ + bool up; /* is this configuration up operational */ + bool enable; /* is this configuration enabled */ + bool associated; /* is BSS in ASSOCIATED state */ + bool BSS; /* infraustructure or adhac */ + bool dtim_programmed; + + u8 SSID_len; /* the length of SSID */ + u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ + struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ + s8 _idx; /* the index of this bsscfg, + * assigned at wlc_bsscfg_alloc() + */ + /* MAC filter */ + uint nmac; /* # of entries on maclist array */ + int macmode; /* allow/deny stations on maclist array */ + struct ether_addr *maclist; /* list of source MAC addrs to match */ + + /* security */ + u32 wsec; /* wireless security bitvec */ + s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ + s16 openshared; /* try Open auth first, then Shared Key */ + bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ + bool eap_restrict; /* restrict data until 802.1X auth succeeds */ + u16 WPA_auth; /* WPA: authenticated key management */ + bool wpa2_preauth; /* default is true, wpa_cap sets value */ + bool wsec_portopen; /* indicates keys are plumbed */ + wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ + int wsec_index; /* 0-3: default tx key, -1: not set */ + wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ + + /* TKIP countermeasures */ + bool tkip_countermeasures; /* flags TKIP no-assoc period */ + u32 tk_cm_dt; /* detect timer */ + u32 tk_cm_bt; /* blocking timer */ + u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ + bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ + + u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ + u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ + u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ + u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ + + u32 flags; /* WLC_BSSCFG flags; see below */ + + u8 *bcn; /* AP beacon */ + uint bcn_len; /* AP beacon length */ + bool ar_disassoc; /* disassociated in associated recreation */ + + int auth_atmptd; /* auth type (open/shared) attempted */ + + pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ + uint npmkid_cand; /* num PMKID candidates */ + pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ + uint npmkid; /* num cached PMKIDs */ + + wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */ + + /* PM states */ + bool PMawakebcn; /* bcn recvd during current waking state */ + bool PMpending; /* waiting for tx status with PM indicated set */ + bool priorPMstate; /* Detecting PM state transitions */ + bool PSpoll; /* whether there is an outstanding PS-Poll frame */ + + /* BSSID entry in RCMTA, use the wsec key management infrastructure to + * manage the RCMTA entries. + */ + wsec_key_t *rcmta; + + /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ + u16 ID; + + uint txrspecidx; /* index into tx rate circular buffer */ + ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ +}; + +#define WLC_BSSCFG_11N_DISABLE 0x1000 /* Do not advertise .11n IEs for this BSS */ +#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */ + +#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0) +#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0) + +/* Extend N_ENAB to per-BSS */ +#define BSS_N_ENAB(wlc, cfg) \ + (N_ENAB((wlc)->pub) && !((cfg)->flags & WLC_BSSCFG_11N_DISABLE)) + +#define MBSS_BCN_ENAB(cfg) 0 +#define MBSS_PRB_ENAB(cfg) 0 +#define SOFTBCN_ENAB(pub) (0) +#define SOFTPRB_ENAB(pub) (0) +#define wlc_bsscfg_tx_check(a) do { } while (0); + +#endif /* _BRCM_BSSCFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/cfg.h b/drivers/staging/brcm80211/brcmsmac/cfg.h new file mode 100644 index 0000000..534c536 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/cfg.h @@ -0,0 +1,280 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_CFG_H_ +#define _BRCM_CFG_H_ + +#define NBANDS(wlc) ((wlc)->pub->_nbands) +#define NBANDS_PUB(pub) ((pub)->_nbands) +#define NBANDS_HW(hw) ((hw)->_nbands) + +#define IS_SINGLEBAND_5G(device) 0 + +/* **** Core type/rev defaults **** */ +#define D11_DEFAULT 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 + * also need to update wlc.h MAXCOREREV + */ + +#define NPHY_DEFAULT 0x000001ff /* Supported nphy revs: + * 0 4321a0 + * 1 4321a1 + * 2 4321b0/b1/c0/c1 + * 3 4322a0 + * 4 4322a1 + * 5 4716a0 + * 6 43222a0, 43224a0 + * 7 43226a0 + * 8 5357a0, 43236a0 + */ + +#define LCNPHY_DEFAULT 0x00000007 /* Supported lcnphy revs: + * 0 4313a0, 4336a0, 4330a0 + * 1 + * 2 4330a0 + */ + +#define SSLPNPHY_DEFAULT 0x0000000f /* Supported sslpnphy revs: + * 0 4329a0/k0 + * 1 4329b0/4329C0 + * 2 4319a0 + * 3 5356a0 + */ + + +/* For undefined values, use defaults */ +#ifndef D11CONF +#define D11CONF D11_DEFAULT +#endif +#ifndef NCONF +#define NCONF NPHY_DEFAULT +#endif +#ifndef LCNCONF +#define LCNCONF LCNPHY_DEFAULT +#endif + +#ifndef SSLPNCONF +#define SSLPNCONF SSLPNPHY_DEFAULT +#endif + +/******************************************************************** + * Phy/Core Configuration. Defines macros to to check core phy/rev * + * compile-time configuration. Defines default core support. * + * ****************************************************************** + */ + +/* Basic macros to check a configuration bitmask */ + +#define CONF_HAS(config, val) ((config) & (1 << (val))) +#define CONF_MSK(config, mask) ((config) & (mask)) +#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) +#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) + +#define CONF_IS(config, val) ((config) == (1 << (val))) +#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) +#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) +#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) +#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) + +/* Wrappers for some of the above, specific to config constants */ + +#define NCONF_HAS(val) CONF_HAS(NCONF, val) +#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) +#define NCONF_IS(val) CONF_IS(NCONF, val) +#define NCONF_GE(val) CONF_GE(NCONF, val) +#define NCONF_GT(val) CONF_GT(NCONF, val) +#define NCONF_LT(val) CONF_LT(NCONF, val) +#define NCONF_LE(val) CONF_LE(NCONF, val) + +#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) +#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) +#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) +#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) +#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) +#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) +#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) + +#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) +#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) +#define D11CONF_IS(val) CONF_IS(D11CONF, val) +#define D11CONF_GE(val) CONF_GE(D11CONF, val) +#define D11CONF_GT(val) CONF_GT(D11CONF, val) +#define D11CONF_LT(val) CONF_LT(D11CONF, val) +#define D11CONF_LE(val) CONF_LE(D11CONF, val) + +#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) +#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) + +#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) +#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) +#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) +#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) +#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) + +#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) +#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) +#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) +#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) +#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) + +#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) +#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) +#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) +#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) +#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) + +#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) + +/* Finally, early-exit from switch case if anyone wants it... */ + +#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break +#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break + +#if (D11CONF ^ (D11CONF & D11_DEFAULT)) +#error "Unsupported MAC revision configured" +#endif +#if (NCONF ^ (NCONF & NPHY_DEFAULT)) +#error "Unsupported NPHY revision configured" +#endif +#if (LCNCONF ^ (LCNCONF & LCNPHY_DEFAULT)) +#error "Unsupported LPPHY revision configured" +#endif + +/* *** Consistency checks *** */ +#if !D11CONF +#error "No MAC revisions configured!" +#endif + +#if !NCONF && !LCNCONF && !SSLPNCONF +#error "No PHY configured!" +#endif + +/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ + +#define _PHYCONF_N (1 << PHY_TYPE_N) + +#if LCNCONF +#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) +#else +#define _PHYCONF_LCN 0 +#endif /* LCNCONF */ + +#if SSLPNCONF +#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) +#else +#define _PHYCONF_SSLPN 0 +#endif /* SSLPNCONF */ + +#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) + +/* Utility macro to identify 802.11n (HT) capable PHYs */ +#define PHYTYPE_11N_CAP(phytype) \ + (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ + PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ + PHYTYPE_IS(phytype, PHY_TYPE_SSN)) + +/* Last but not least: shorter wlc-specific var checks */ +#define WLCISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) +#define WLCISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) +#define WLCISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) + +#define WLC_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) + +/********************************************************************** + * ------------- End of Core phy/rev configuration. ----------------- * + * ******************************************************************** + */ + +/************************************************* + * Defaults for tunables (e.g. sizing constants) + * + * For each new tunable, add a member to the end + * of wlc_tunables_t in wlc_pub.h to enable + * runtime checks of tunable values. (Directly + * using the macros in code invalidates ROM code) + * + * *********************************************** + */ +#ifndef NTXD +#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ +#endif /* NTXD */ +#ifndef NRXD +#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ +#endif /* NRXD */ + +#ifndef NRXBUFPOST +#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ +#endif /* NRXBUFPOST */ + +#ifndef MAXSCB /* station control blocks in cache */ +#define MAXSCB 32 /* Maximum SCBs in cache for STA */ +#endif /* MAXSCB */ + +#ifndef AMPDU_NUM_MPDU +#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ +#endif /* AMPDU_NUM_MPDU */ + +#ifndef AMPDU_NUM_MPDU_3STREAMS +#define AMPDU_NUM_MPDU_3STREAMS 32 /* max allowed number of mpdus in an ampdu for 3+ streams */ +#endif /* AMPDU_NUM_MPDU_3STREAMS */ + +/* Count of packet callback structures. either of following + * 1. Set to the number of SCBs since a STA + * can queue up a rate callback for each IBSS STA it knows about, and an AP can + * queue up an "are you there?" Null Data callback for each associated STA + * 2. controlled by tunable config file + */ +#ifndef MAXPKTCB +#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ +#endif /* MAXPKTCB */ + +#ifndef CTFPOOLSZ +#define CTFPOOLSZ 128 +#endif /* CTFPOOLSZ */ + +/* NetBSD also needs to keep track of this */ +#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */ +#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */ +#ifndef WLC_MAXBSSCFG +#define WLC_MAXBSSCFG (1) /* max # BSS configs */ +#endif /* WLC_MAXBSSCFG */ + +#ifndef MAXBSS +#define MAXBSS 64 /* max # available networks */ +#endif /* MAXBSS */ + +#ifndef WLC_DATAHIWAT +#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */ +#endif /* WLC_DATAHIWAT */ + +#ifndef WLC_AMPDUDATAHIWAT +#define WLC_AMPDUDATAHIWAT 255 +#endif /* WLC_AMPDUDATAHIWAT */ + +/* bounded rx loops */ +#ifndef RXBND +#define RXBND 8 /* max # frames to process in wlc_recv() */ +#endif /* RXBND */ +#ifndef TXSBND +#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ +#endif /* TXSBND */ + +#define BAND_5G(bt) ((bt) == WLC_BAND_5G) +#define BAND_2G(bt) ((bt) == WLC_BAND_2G) + +#define WLBANDINITDATA(_data) _data +#define WLBANDINITFN(_fn) _fn + +#endif /* _BRCM_CFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c new file mode 100644 index 0000000..5dce267 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/channel.c @@ -0,0 +1,1554 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include "dma.h" + +#include "types.h" +#include "d11.h" +#include "cfg.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "phy/phy_hal.h" +#include "bottom_mac.h" +#include "rate.h" +#include "channel.h" +#include "main.h" +#include "stf.h" + +#define VALID_CHANNEL20_DB(wlc, val) wlc_valid_channel20_db((wlc)->cmi, val) +#define VALID_CHANNEL20_IN_BAND(wlc, bandunit, val) \ + wlc_valid_channel20_in_band((wlc)->cmi, bandunit, val) +#define VALID_CHANNEL20(wlc, val) wlc_valid_channel20((wlc)->cmi, val) + +typedef struct wlc_cm_band { + u8 locale_flags; /* locale_info_t flags */ + chanvec_t valid_channels; /* List of valid channels in the country */ + const chanvec_t *restricted_channels; /* List of restricted use channels */ + const chanvec_t *radar_channels; /* List of radar sensitive channels */ + u8 PAD[8]; +} wlc_cm_band_t; + +struct wlc_cm_info { + struct wlc_pub *pub; + struct wlc_info *wlc; + char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ + uint srom_regrev; /* Regulatory Rev for the SROM ccode */ + const country_info_t *country; /* current country def */ + char ccode[WLC_CNTRY_BUF_SZ]; /* current internal Country Code */ + uint regrev; /* current Regulatory Revision */ + char country_abbrev[WLC_CNTRY_BUF_SZ]; /* current advertised ccode */ + wlc_cm_band_t bandstate[MAXBANDS]; /* per-band state (one per phy/radio) */ + /* quiet channels currently for radar sensitivity or 11h support */ + chanvec_t quiet_channels; /* channels on which we cannot transmit */ +}; + +static int wlc_channels_init(wlc_cm_info_t *wlc_cm, + const country_info_t *country); +static void wlc_set_country_common(wlc_cm_info_t *wlc_cm, + const char *country_abbrev, + const char *ccode, uint regrev, + const country_info_t *country); +static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode); +static int wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, + const char *country_abbrev, + const char *ccode, int regrev); +static int wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, + char *mapped_ccode, uint *mapped_regrev); +static const country_info_t *wlc_country_lookup_direct(const char *ccode, + uint regrev); +static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, + const char *ccode, + char *mapped_ccode, + uint *mapped_regrev); +static void wlc_channels_commit(wlc_cm_info_t *wlc_cm); +static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm); +static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec); +static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val); +static bool wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, + uint val); +static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val); +static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, + const char *ccode); +static void wlc_locale_get_channels(const locale_info_t *locale, + chanvec_t *valid_channels); +static const locale_info_t *wlc_get_locale_2g(u8 locale_idx); +static const locale_info_t *wlc_get_locale_5g(u8 locale_idx); +static bool wlc_japan(struct wlc_info *wlc); +static bool wlc_japan_ccode(const char *ccode); +static void wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t * + wlc_cm, + struct + txpwr_limits + *txpwr, + u8 + local_constraint_qdbm); +static void wlc_locale_add_channels(chanvec_t *target, + const chanvec_t *channels); +static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx); +static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx); + +/* QDB() macro takes a dB value and converts to a quarter dB value */ +#ifdef QDB +#undef QDB +#endif +#define QDB(n) ((n) * WLC_TXPWR_DB_FACTOR) + +/* Regulatory Matrix Spreadsheet (CLM) MIMO v3.7.9 */ + +/* + * Some common channel sets + */ + +/* No channels */ +static const chanvec_t chanvec_none = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* All 2.4 GHz HW channels */ +const chanvec_t chanvec_all_2G = { + {0xfe, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* All 5 GHz HW channels */ +const chanvec_t chanvec_all_5G = { + {0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x11, 0x11, + 0x01, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x20, 0x22, 0x22, 0x00, 0x00, 0x11, + 0x11, 0x11, 0x11, 0x01} +}; + +/* + * Radar channel sets + */ + +/* No radar */ +#define radar_set_none chanvec_none + +static const chanvec_t radar_set1 = { /* Channels 52 - 64, 100 - 140 */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, /* 52 - 60 */ + 0x01, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, /* 64, 100 - 124 */ + 0x11, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 128 - 140 */ + 0x00, 0x00, 0x00, 0x00} +}; + +/* + * Restricted channel sets + */ + +#define restricted_set_none chanvec_none + +/* Channels 34, 38, 42, 46 */ +static const chanvec_t restricted_set_japan_legacy = { + {0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* Channels 12, 13 */ +static const chanvec_t restricted_set_2g_short = { + {0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* Channel 165 */ +static const chanvec_t restricted_chan_165 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* Channels 36 - 48 & 149 - 165 */ +static const chanvec_t restricted_low_hi = { + {0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x20, 0x22, 0x22, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* Channels 12 - 14 */ +static const chanvec_t restricted_set_12_13_14 = { + {0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +#define LOCALE_CHAN_01_11 (1<<0) +#define LOCALE_CHAN_12_13 (1<<1) +#define LOCALE_CHAN_14 (1<<2) +#define LOCALE_SET_5G_LOW_JP1 (1<<3) /* 34-48, step 2 */ +#define LOCALE_SET_5G_LOW_JP2 (1<<4) /* 34-46, step 4 */ +#define LOCALE_SET_5G_LOW1 (1<<5) /* 36-48, step 4 */ +#define LOCALE_SET_5G_LOW2 (1<<6) /* 52 */ +#define LOCALE_SET_5G_LOW3 (1<<7) /* 56-64, step 4 */ +#define LOCALE_SET_5G_MID1 (1<<8) /* 100-116, step 4 */ +#define LOCALE_SET_5G_MID2 (1<<9) /* 120-124, step 4 */ +#define LOCALE_SET_5G_MID3 (1<<10) /* 128 */ +#define LOCALE_SET_5G_HIGH1 (1<<11) /* 132-140, step 4 */ +#define LOCALE_SET_5G_HIGH2 (1<<12) /* 149-161, step 4 */ +#define LOCALE_SET_5G_HIGH3 (1<<13) /* 165 */ +#define LOCALE_CHAN_52_140_ALL (1<<14) +#define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */ + +#define LOCALE_CHAN_36_64 (LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3) +#define LOCALE_CHAN_52_64 (LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3) +#define LOCALE_CHAN_100_124 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2) +#define LOCALE_CHAN_100_140 \ + (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1) +#define LOCALE_CHAN_149_165 (LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3) +#define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4 + +#define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14) + +#define LOCALE_RADAR_SET_NONE 0 +#define LOCALE_RADAR_SET_1 1 + +#define LOCALE_RESTRICTED_NONE 0 +#define LOCALE_RESTRICTED_SET_2G_SHORT 1 +#define LOCALE_RESTRICTED_CHAN_165 2 +#define LOCALE_CHAN_ALL_5G 3 +#define LOCALE_RESTRICTED_JAPAN_LEGACY 4 +#define LOCALE_RESTRICTED_11D_2G 5 +#define LOCALE_RESTRICTED_11D_5G 6 +#define LOCALE_RESTRICTED_LOW_HI 7 +#define LOCALE_RESTRICTED_12_13_14 8 + +/* global memory to provide working buffer for expanded locale */ + +static const chanvec_t *g_table_radar_set[] = { + &chanvec_none, + &radar_set1 +}; + +static const chanvec_t *g_table_restricted_chan[] = { + &chanvec_none, /* restricted_set_none */ + &restricted_set_2g_short, + &restricted_chan_165, + &chanvec_all_5G, + &restricted_set_japan_legacy, + &chanvec_all_2G, /* restricted_set_11d_2G */ + &chanvec_all_5G, /* restricted_set_11d_5G */ + &restricted_low_hi, + &restricted_set_12_13_14 +}; + +static const chanvec_t locale_2g_01_11 = { + {0xfe, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_2g_12_13 = { + {0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_2g_14 = { + {0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_LOW_JP1 = { + {0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_LOW_JP2 = { + {0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_LOW1 = { + {0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_LOW2 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_LOW3 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_MID1 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_MID2 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_MID3 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_HIGH1 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_HIGH2 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x20, 0x22, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_HIGH3 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_52_140_ALL = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, + 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static const chanvec_t locale_5g_HIGH4 = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, + 0x11, 0x11, 0x11, 0x11} +}; + +static const chanvec_t *g_table_locale_base[] = { + &locale_2g_01_11, + &locale_2g_12_13, + &locale_2g_14, + &locale_5g_LOW_JP1, + &locale_5g_LOW_JP2, + &locale_5g_LOW1, + &locale_5g_LOW2, + &locale_5g_LOW3, + &locale_5g_MID1, + &locale_5g_MID2, + &locale_5g_MID3, + &locale_5g_HIGH1, + &locale_5g_HIGH2, + &locale_5g_HIGH3, + &locale_5g_52_140_ALL, + &locale_5g_HIGH4 +}; + +static void wlc_locale_add_channels(chanvec_t *target, + const chanvec_t *channels) +{ + u8 i; + for (i = 0; i < sizeof(chanvec_t); i++) { + target->vec[i] |= channels->vec[i]; + } +} + +static void wlc_locale_get_channels(const locale_info_t *locale, + chanvec_t *channels) +{ + u8 i; + + memset(channels, 0, sizeof(chanvec_t)); + + for (i = 0; i < ARRAY_SIZE(g_table_locale_base); i++) { + if (locale->valid_channels & (1 << i)) { + wlc_locale_add_channels(channels, + g_table_locale_base[i]); + } + } +} + +/* + * Locale Definitions - 2.4 GHz + */ +static const locale_info_t locale_i = { /* locale i. channel 1 - 13 */ + LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13, + LOCALE_RADAR_SET_NONE, + LOCALE_RESTRICTED_SET_2G_SHORT, + {QDB(19), QDB(19), QDB(19), + QDB(19), QDB(19), QDB(19)}, + {20, 20, 20, 0}, + WLC_EIRP +}; + +/* + * Locale Definitions - 5 GHz + */ +static const locale_info_t locale_11 = { + /* locale 11. channel 36 - 48, 52 - 64, 100 - 140, 149 - 165 */ + LOCALE_CHAN_36_64 | LOCALE_CHAN_100_140 | LOCALE_CHAN_149_165, + LOCALE_RADAR_SET_1, + LOCALE_RESTRICTED_NONE, + {QDB(21), QDB(21), QDB(21), QDB(21), QDB(21)}, + {23, 23, 23, 30, 30}, + WLC_EIRP | WLC_DFS_EU +}; + +#define LOCALE_2G_IDX_i 0 +static const locale_info_t *g_locale_2g_table[] = { + &locale_i +}; + +#define LOCALE_5G_IDX_11 0 +static const locale_info_t *g_locale_5g_table[] = { + &locale_11 +}; + +/* + * MIMO Locale Definitions - 2.4 GHz + */ +static const locale_mimo_info_t locale_bn = { + {QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), + QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), + QDB(13), QDB(13), QDB(13)}, + {0, 0, QDB(13), QDB(13), QDB(13), + QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), + QDB(13), 0, 0}, + 0 +}; + +/* locale mimo 2g indexes */ +#define LOCALE_MIMO_IDX_bn 0 + +static const locale_mimo_info_t *g_mimo_2g_table[] = { + &locale_bn +}; + +/* + * MIMO Locale Definitions - 5 GHz + */ +static const locale_mimo_info_t locale_11n = { + { /* 12.5 dBm */ 50, 50, 50, QDB(15), QDB(15)}, + {QDB(14), QDB(15), QDB(15), QDB(15), QDB(15)}, + 0 +}; + +#define LOCALE_MIMO_IDX_11n 0 +static const locale_mimo_info_t *g_mimo_5g_table[] = { + &locale_11n +}; + +#ifdef LC +#undef LC +#endif +#define LC(id) LOCALE_MIMO_IDX_ ## id + +#ifdef LC_2G +#undef LC_2G +#endif +#define LC_2G(id) LOCALE_2G_IDX_ ## id + +#ifdef LC_5G +#undef LC_5G +#endif +#define LC_5G(id) LOCALE_5G_IDX_ ## id + +#define LOCALES(band2, band5, mimo2, mimo5) {LC_2G(band2), LC_5G(band5), LC(mimo2), LC(mimo5)} + +static const struct { + char abbrev[WLC_CNTRY_BUF_SZ]; /* country abbreviation */ + country_info_t country; +} cntry_locales[] = { + { + "X2", LOCALES(i, 11, bn, 11n)}, /* Worldwide RoW 2 */ +}; + +#ifdef SUPPORT_40MHZ +/* 20MHz channel info for 40MHz pairing support */ +struct chan20_info { + u8 sb; + u8 adj_sbs; +}; + +/* indicates adjacent channels that are allowed for a 40 Mhz channel and + * those that permitted by the HT + */ +struct chan20_info chan20_info[] = { + /* 11b/11g */ +/* 0 */ {1, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 1 */ {2, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 2 */ {3, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 3 */ {4, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 4 */ {5, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, +/* 5 */ {6, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, +/* 6 */ {7, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, +/* 7 */ {8, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, +/* 8 */ {9, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, +/* 9 */ {10, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 10 */ {11, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 11 */ {12, (CH_LOWER_SB)}, +/* 12 */ {13, (CH_LOWER_SB)}, +/* 13 */ {14, (CH_LOWER_SB)}, + +/* 11a japan high */ +/* 14 */ {34, (CH_UPPER_SB)}, +/* 15 */ {38, (CH_LOWER_SB)}, +/* 16 */ {42, (CH_LOWER_SB)}, +/* 17 */ {46, (CH_LOWER_SB)}, + +/* 11a usa low */ +/* 18 */ {36, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 19 */ {40, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 20 */ {44, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 21 */ {48, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 22 */ {52, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 23 */ {56, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 24 */ {60, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 25 */ {64, (CH_LOWER_SB | CH_EWA_VALID)}, + +/* 11a Europe */ +/* 26 */ {100, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 27 */ {104, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 28 */ {108, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 29 */ {112, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 30 */ {116, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 31 */ {120, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 32 */ {124, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 33 */ {128, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 34 */ {132, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 35 */ {136, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 36 */ {140, (CH_LOWER_SB)}, + +/* 11a usa high, ref5 only */ +/* The 0x80 bit in pdiv means these are REF5, other entries are REF20 */ +/* 37 */ {149, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 38 */ {153, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 39 */ {157, (CH_UPPER_SB | CH_EWA_VALID)}, +/* 40 */ {161, (CH_LOWER_SB | CH_EWA_VALID)}, +/* 41 */ {165, (CH_LOWER_SB)}, + +/* 11a japan */ +/* 42 */ {184, (CH_UPPER_SB)}, +/* 43 */ {188, (CH_LOWER_SB)}, +/* 44 */ {192, (CH_UPPER_SB)}, +/* 45 */ {196, (CH_LOWER_SB)}, +/* 46 */ {200, (CH_UPPER_SB)}, +/* 47 */ {204, (CH_LOWER_SB)}, +/* 48 */ {208, (CH_UPPER_SB)}, +/* 49 */ {212, (CH_LOWER_SB)}, +/* 50 */ {216, (CH_LOWER_SB)} +}; +#endif /* SUPPORT_40MHZ */ + +static const locale_info_t *wlc_get_locale_2g(u8 locale_idx) +{ + if (locale_idx >= ARRAY_SIZE(g_locale_2g_table)) { + return NULL; /* error condition */ + } + return g_locale_2g_table[locale_idx]; +} + +static const locale_info_t *wlc_get_locale_5g(u8 locale_idx) +{ + if (locale_idx >= ARRAY_SIZE(g_locale_5g_table)) { + return NULL; /* error condition */ + } + return g_locale_5g_table[locale_idx]; +} + +static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx) +{ + if (locale_idx >= ARRAY_SIZE(g_mimo_2g_table)) { + return NULL; + } + return g_mimo_2g_table[locale_idx]; +} + +static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx) +{ + if (locale_idx >= ARRAY_SIZE(g_mimo_5g_table)) { + return NULL; + } + return g_mimo_5g_table[locale_idx]; +} + +wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc) +{ + wlc_cm_info_t *wlc_cm; + char country_abbrev[WLC_CNTRY_BUF_SZ]; + const country_info_t *country; + struct wlc_pub *pub = wlc->pub; + char *ccode; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + wlc_cm = kzalloc(sizeof(wlc_cm_info_t), GFP_ATOMIC); + if (wlc_cm == NULL) { + wiphy_err(wlc->wiphy, "wl%d: %s: out of memory", pub->unit, + __func__); + return NULL; + } + wlc_cm->pub = pub; + wlc_cm->wlc = wlc; + wlc->cmi = wlc_cm; + + /* store the country code for passing up as a regulatory hint */ + ccode = getvar(wlc->pub->vars, "ccode"); + if (ccode) { + strncpy(wlc->pub->srom_ccode, ccode, WLC_CNTRY_BUF_SZ - 1); + } + + /* internal country information which must match regulatory constraints in firmware */ + memset(country_abbrev, 0, WLC_CNTRY_BUF_SZ); + strncpy(country_abbrev, "X2", sizeof(country_abbrev) - 1); + country = wlc_country_lookup(wlc, country_abbrev); + + /* save default country for exiting 11d regulatory mode */ + strncpy(wlc->country_default, country_abbrev, WLC_CNTRY_BUF_SZ - 1); + + /* initialize autocountry_default to driver default */ + strncpy(wlc->autocountry_default, "X2", WLC_CNTRY_BUF_SZ - 1); + + wlc_set_countrycode(wlc_cm, country_abbrev); + + return wlc_cm; +} + +void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm) +{ + kfree(wlc_cm); +} + +u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, uint bandunit) +{ + return wlc_cm->bandstate[bandunit].locale_flags; +} + +/* set the driver's current country and regulatory information using a country code + * as the source. Lookup built in country information found with the country code. + */ +static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode) +{ + char country_abbrev[WLC_CNTRY_BUF_SZ]; + strncpy(country_abbrev, ccode, WLC_CNTRY_BUF_SZ); + return wlc_set_countrycode_rev(wlc_cm, country_abbrev, ccode, -1); +} + +static int +wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, + const char *country_abbrev, + const char *ccode, int regrev) +{ + const country_info_t *country; + char mapped_ccode[WLC_CNTRY_BUF_SZ]; + uint mapped_regrev; + + /* if regrev is -1, lookup the mapped country code, + * otherwise use the ccode and regrev directly + */ + if (regrev == -1) { + /* map the country code to a built-in country code, regrev, and country_info */ + country = + wlc_countrycode_map(wlc_cm, ccode, mapped_ccode, + &mapped_regrev); + } else { + /* find the matching built-in country definition */ + country = wlc_country_lookup_direct(ccode, regrev); + strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); + mapped_regrev = regrev; + } + + if (country == NULL) + return -EINVAL; + + /* set the driver state for the country */ + wlc_set_country_common(wlc_cm, country_abbrev, mapped_ccode, + mapped_regrev, country); + + return 0; +} + +/* set the driver's current country and regulatory information using a country code + * as the source. Look up built in country information found with the country code. + */ +static void +wlc_set_country_common(wlc_cm_info_t *wlc_cm, + const char *country_abbrev, + const char *ccode, uint regrev, + const country_info_t *country) +{ + const locale_mimo_info_t *li_mimo; + const locale_info_t *locale; + struct wlc_info *wlc = wlc_cm->wlc; + char prev_country_abbrev[WLC_CNTRY_BUF_SZ]; + + /* save current country state */ + wlc_cm->country = country; + + memset(&prev_country_abbrev, 0, WLC_CNTRY_BUF_SZ); + strncpy(prev_country_abbrev, wlc_cm->country_abbrev, + WLC_CNTRY_BUF_SZ - 1); + + strncpy(wlc_cm->country_abbrev, country_abbrev, WLC_CNTRY_BUF_SZ - 1); + strncpy(wlc_cm->ccode, ccode, WLC_CNTRY_BUF_SZ - 1); + wlc_cm->regrev = regrev; + + /* disable/restore nmode based on country regulations */ + li_mimo = wlc_get_mimo_2g(country->locale_mimo_2G); + if (li_mimo && (li_mimo->flags & WLC_NO_MIMO)) { + wlc_set_nmode(wlc, OFF); + wlc->stf->no_cddstbc = true; + } else { + wlc->stf->no_cddstbc = false; + if (N_ENAB(wlc->pub) != wlc->protection->nmode_user) + wlc_set_nmode(wlc, wlc->protection->nmode_user); + } + + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + /* set or restore gmode as required by regulatory */ + locale = wlc_get_locale_2g(country->locale_2G); + if (locale && (locale->flags & WLC_NO_OFDM)) { + wlc_set_gmode(wlc, GMODE_LEGACY_B, false); + } else { + wlc_set_gmode(wlc, wlc->protection->gmode_user, false); + } + + wlc_channels_init(wlc_cm, country); + + return; +} + +/* Lookup a country info structure from a null terminated country code + * The lookup is case sensitive. + */ +static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, + const char *ccode) +{ + const country_info_t *country; + char mapped_ccode[WLC_CNTRY_BUF_SZ]; + uint mapped_regrev; + + /* map the country code to a built-in country code, regrev, and country_info struct */ + country = + wlc_countrycode_map(wlc->cmi, ccode, mapped_ccode, &mapped_regrev); + + return country; +} + +static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, + const char *ccode, + char *mapped_ccode, + uint *mapped_regrev) +{ + struct wlc_info *wlc = wlc_cm->wlc; + const country_info_t *country; + uint srom_regrev = wlc_cm->srom_regrev; + const char *srom_ccode = wlc_cm->srom_ccode; + int mapped; + + /* check for currently supported ccode size */ + if (strlen(ccode) > (WLC_CNTRY_BUF_SZ - 1)) { + wiphy_err(wlc->wiphy, "wl%d: %s: ccode \"%s\" too long for " + "match\n", wlc->pub->unit, __func__, ccode); + return NULL; + } + + /* default mapping is the given ccode and regrev 0 */ + strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); + *mapped_regrev = 0; + + /* If the desired country code matches the srom country code, + * then the mapped country is the srom regulatory rev. + * Otherwise look for an aggregate mapping. + */ + if (!strcmp(srom_ccode, ccode)) { + *mapped_regrev = srom_regrev; + mapped = 0; + wiphy_err(wlc->wiphy, "srom_code == ccode %s\n", __func__); + } else { + mapped = + wlc_country_aggregate_map(wlc_cm, ccode, mapped_ccode, + mapped_regrev); + } + + /* find the matching built-in country definition */ + country = wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); + + /* if there is not an exact rev match, default to rev zero */ + if (country == NULL && *mapped_regrev != 0) { + *mapped_regrev = 0; + country = + wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); + } + + return country; +} + +static int +wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, + char *mapped_ccode, uint *mapped_regrev) +{ + return false; +} + +/* Lookup a country info structure from a null terminated country + * abbreviation and regrev directly with no translation. + */ +static const country_info_t *wlc_country_lookup_direct(const char *ccode, + uint regrev) +{ + uint size, i; + + /* Should just return 0 for single locale driver. */ + /* Keep it this way in case we add more locales. (for now anyway) */ + + /* all other country def arrays are for regrev == 0, so if regrev is non-zero, fail */ + if (regrev > 0) + return NULL; + + /* find matched table entry from country code */ + size = ARRAY_SIZE(cntry_locales); + for (i = 0; i < size; i++) { + if (strcmp(ccode, cntry_locales[i].abbrev) == 0) { + return &cntry_locales[i].country; + } + } + return NULL; +} + +static int +wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) +{ + struct wlc_info *wlc = wlc_cm->wlc; + uint i, j; + struct wlcband *band; + const locale_info_t *li; + chanvec_t sup_chan; + const locale_mimo_info_t *li_mimo; + + band = wlc->band; + for (i = 0; i < NBANDS(wlc); + i++, band = wlc->bandstate[OTHERBANDUNIT(wlc)]) { + + li = BAND_5G(band->bandtype) ? + wlc_get_locale_5g(country->locale_5G) : + wlc_get_locale_2g(country->locale_2G); + wlc_cm->bandstate[band->bandunit].locale_flags = li->flags; + li_mimo = BAND_5G(band->bandtype) ? + wlc_get_mimo_5g(country->locale_mimo_5G) : + wlc_get_mimo_2g(country->locale_mimo_2G); + + /* merge the mimo non-mimo locale flags */ + wlc_cm->bandstate[band->bandunit].locale_flags |= + li_mimo->flags; + + wlc_cm->bandstate[band->bandunit].restricted_channels = + g_table_restricted_chan[li->restricted_channels]; + wlc_cm->bandstate[band->bandunit].radar_channels = + g_table_radar_set[li->radar_channels]; + + /* set the channel availability, + * masking out the channels that may not be supported on this phy + */ + wlc_phy_chanspec_band_validch(band->pi, band->bandtype, + &sup_chan); + wlc_locale_get_channels(li, + &wlc_cm->bandstate[band->bandunit]. + valid_channels); + for (j = 0; j < sizeof(chanvec_t); j++) + wlc_cm->bandstate[band->bandunit].valid_channels. + vec[j] &= sup_chan.vec[j]; + } + + wlc_quiet_channels_reset(wlc_cm); + wlc_channels_commit(wlc_cm); + + return 0; +} + +/* Update the radio state (enable/disable) and tx power targets + * based on a new set of channel/regulatory information + */ +static void wlc_channels_commit(wlc_cm_info_t *wlc_cm) +{ + struct wlc_info *wlc = wlc_cm->wlc; + uint chan; + struct txpwr_limits txpwr; + + /* search for the existence of any valid channel */ + for (chan = 0; chan < MAXCHANNEL; chan++) { + if (VALID_CHANNEL20_DB(wlc, chan)) { + break; + } + } + if (chan == MAXCHANNEL) + chan = INVCHANNEL; + + /* based on the channel search above, set or clear WL_RADIO_COUNTRY_DISABLE */ + if (chan == INVCHANNEL) { + /* country/locale with no valid channels, set the radio disable bit */ + mboolset(wlc->pub->radio_disabled, WL_RADIO_COUNTRY_DISABLE); + wiphy_err(wlc->wiphy, "wl%d: %s: no valid channel for \"%s\" " + "nbands %d bandlocked %d\n", wlc->pub->unit, + __func__, wlc_cm->country_abbrev, NBANDS(wlc), + wlc->bandlocked); + } else + if (mboolisset(wlc->pub->radio_disabled, + WL_RADIO_COUNTRY_DISABLE)) { + /* country/locale with valid channel, clear the radio disable bit */ + mboolclr(wlc->pub->radio_disabled, WL_RADIO_COUNTRY_DISABLE); + } + + /* Now that the country abbreviation is set, if the radio supports 2G, then + * set channel 14 restrictions based on the new locale. + */ + if (NBANDS(wlc) > 1 || BAND_2G(wlc->band->bandtype)) { + wlc_phy_chanspec_ch14_widefilter_set(wlc->band->pi, + wlc_japan(wlc) ? true : + false); + } + + if (wlc->pub->up && chan != INVCHANNEL) { + wlc_channel_reg_limits(wlc_cm, wlc->chanspec, &txpwr); + wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, + &txpwr, + WLC_TXPWR_MAX); + wlc_phy_txpower_limit_set(wlc->band->pi, &txpwr, wlc->chanspec); + } +} + +/* reset the quiet channels vector to the union of the restricted and radar channel sets */ +static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm) +{ + struct wlc_info *wlc = wlc_cm->wlc; + uint i, j; + struct wlcband *band; + const chanvec_t *chanvec; + + memset(&wlc_cm->quiet_channels, 0, sizeof(chanvec_t)); + + band = wlc->band; + for (i = 0; i < NBANDS(wlc); + i++, band = wlc->bandstate[OTHERBANDUNIT(wlc)]) { + + /* initialize quiet channels for restricted channels */ + chanvec = wlc_cm->bandstate[band->bandunit].restricted_channels; + for (j = 0; j < sizeof(chanvec_t); j++) + wlc_cm->quiet_channels.vec[j] |= chanvec->vec[j]; + + } +} + +static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec) +{ + return N_ENAB(wlc_cm->wlc->pub) && CHSPEC_IS40(chspec) ? + (isset + (wlc_cm->quiet_channels.vec, + LOWER_20_SB(CHSPEC_CHANNEL(chspec))) + || isset(wlc_cm->quiet_channels.vec, + UPPER_20_SB(CHSPEC_CHANNEL(chspec)))) : isset(wlc_cm-> + quiet_channels. + vec, + CHSPEC_CHANNEL + (chspec)); +} + +/* Is the channel valid for the current locale? (but don't consider channels not + * available due to bandlocking) + */ +static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val) +{ + struct wlc_info *wlc = wlc_cm->wlc; + + return VALID_CHANNEL20(wlc, val) || + (!wlc->bandlocked + && VALID_CHANNEL20_IN_BAND(wlc, OTHERBANDUNIT(wlc), val)); +} + +/* Is the channel valid for the current locale and specified band? */ +static bool +wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, uint val) +{ + return ((val < MAXCHANNEL) + && isset(wlc_cm->bandstate[bandunit].valid_channels.vec, val)); +} + +/* Is the channel valid for the current locale and current band? */ +static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val) +{ + struct wlc_info *wlc = wlc_cm->wlc; + + return ((val < MAXCHANNEL) && + isset(wlc_cm->bandstate[wlc->band->bandunit].valid_channels.vec, + val)); +} + +static void +wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t *wlc_cm, + struct txpwr_limits *txpwr, + u8 + local_constraint_qdbm) +{ + int j; + + /* CCK Rates */ + for (j = 0; j < WL_TX_POWER_CCK_NUM; j++) { + txpwr->cck[j] = min(txpwr->cck[j], local_constraint_qdbm); + } + + /* 20 MHz Legacy OFDM SISO */ + for (j = 0; j < WL_TX_POWER_OFDM_NUM; j++) { + txpwr->ofdm[j] = min(txpwr->ofdm[j], local_constraint_qdbm); + } + + /* 20 MHz Legacy OFDM CDD */ + for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + txpwr->ofdm_cdd[j] = + min(txpwr->ofdm_cdd[j], local_constraint_qdbm); + } + + /* 40 MHz Legacy OFDM SISO */ + for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + txpwr->ofdm_40_siso[j] = + min(txpwr->ofdm_40_siso[j], local_constraint_qdbm); + } + + /* 40 MHz Legacy OFDM CDD */ + for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + txpwr->ofdm_40_cdd[j] = + min(txpwr->ofdm_40_cdd[j], local_constraint_qdbm); + } + + /* 20MHz MCS 0-7 SISO */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_20_siso[j] = + min(txpwr->mcs_20_siso[j], local_constraint_qdbm); + } + + /* 20MHz MCS 0-7 CDD */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_20_cdd[j] = + min(txpwr->mcs_20_cdd[j], local_constraint_qdbm); + } + + /* 20MHz MCS 0-7 STBC */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_20_stbc[j] = + min(txpwr->mcs_20_stbc[j], local_constraint_qdbm); + } + + /* 20MHz MCS 8-15 MIMO */ + for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) + txpwr->mcs_20_mimo[j] = + min(txpwr->mcs_20_mimo[j], local_constraint_qdbm); + + /* 40MHz MCS 0-7 SISO */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_40_siso[j] = + min(txpwr->mcs_40_siso[j], local_constraint_qdbm); + } + + /* 40MHz MCS 0-7 CDD */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_40_cdd[j] = + min(txpwr->mcs_40_cdd[j], local_constraint_qdbm); + } + + /* 40MHz MCS 0-7 STBC */ + for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + txpwr->mcs_40_stbc[j] = + min(txpwr->mcs_40_stbc[j], local_constraint_qdbm); + } + + /* 40MHz MCS 8-15 MIMO */ + for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) + txpwr->mcs_40_mimo[j] = + min(txpwr->mcs_40_mimo[j], local_constraint_qdbm); + + /* 40MHz MCS 32 */ + txpwr->mcs32 = min(txpwr->mcs32, local_constraint_qdbm); + +} + +void +wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, + u8 local_constraint_qdbm) +{ + struct wlc_info *wlc = wlc_cm->wlc; + struct txpwr_limits txpwr; + + wlc_channel_reg_limits(wlc_cm, chanspec, &txpwr); + + wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, &txpwr, + local_constraint_qdbm); + + wlc_bmac_set_chanspec(wlc->hw, chanspec, + (wlc_quiet_chanspec(wlc_cm, chanspec) != 0), + &txpwr); +} + +#ifdef POWER_DBG +static void wlc_phy_txpower_limits_dump(txpwr_limits_t *txpwr) +{ + int i; + char buf[80]; + char fraction[4][4] = { " ", ".25", ".5 ", ".75" }; + + sprintf(buf, "CCK "); + for (i = 0; i < WLC_NUM_RATES_CCK; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->cck[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->cck[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz OFDM SISO "); + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->ofdm[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz OFDM CDD "); + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->ofdm_cdd[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_cdd[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz OFDM SISO "); + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->ofdm_40_siso[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_40_siso[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz OFDM CDD "); + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->ofdm_40_cdd[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz MCS0-7 SISO "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_20_siso[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_siso[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz MCS0-7 CDD "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_20_cdd[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_cdd[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz MCS0-7 STBC "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_20_stbc[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_stbc[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "20 MHz MCS8-15 SDM "); + for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_20_mimo[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_mimo[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz MCS0-7 SISO "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_40_siso[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_siso[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz MCS0-7 CDD "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_40_cdd[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz MCS0-7 STBC "); + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_40_stbc[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_stbc[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + sprintf(buf, "40 MHz MCS8-15 SDM "); + for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + sprintf(buf[strlen(buf)], " %2d%s", + txpwr->mcs_40_mimo[i] / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_mimo[i] % WLC_TXPWR_DB_FACTOR]); + } + printk(KERN_DEBUG "%s\n", buf); + + printk(KERN_DEBUG "MCS32 %2d%s\n", + txpwr->mcs32 / WLC_TXPWR_DB_FACTOR, + fraction[txpwr->mcs32 % WLC_TXPWR_DB_FACTOR]); +} +#endif /* POWER_DBG */ + +void +wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, + txpwr_limits_t *txpwr) +{ + struct wlc_info *wlc = wlc_cm->wlc; + uint i; + uint chan; + int maxpwr; + int delta; + const country_info_t *country; + struct wlcband *band; + const locale_info_t *li; + int conducted_max; + int conducted_ofdm_max; + const locale_mimo_info_t *li_mimo; + int maxpwr20, maxpwr40; + int maxpwr_idx; + uint j; + + memset(txpwr, 0, sizeof(txpwr_limits_t)); + + if (!wlc_valid_chanspec_db(wlc_cm, chanspec)) { + country = wlc_country_lookup(wlc, wlc->autocountry_default); + if (country == NULL) + return; + } else { + country = wlc_cm->country; + } + + chan = CHSPEC_CHANNEL(chanspec); + band = wlc->bandstate[CHSPEC_WLCBANDUNIT(chanspec)]; + li = BAND_5G(band->bandtype) ? + wlc_get_locale_5g(country->locale_5G) : + wlc_get_locale_2g(country->locale_2G); + + li_mimo = BAND_5G(band->bandtype) ? + wlc_get_mimo_5g(country->locale_mimo_5G) : + wlc_get_mimo_2g(country->locale_mimo_2G); + + if (li->flags & WLC_EIRP) { + delta = band->antgain; + } else { + delta = 0; + if (band->antgain > QDB(6)) + delta = band->antgain - QDB(6); /* Excess over 6 dB */ + } + + if (li == &locale_i) { + conducted_max = QDB(22); + conducted_ofdm_max = QDB(22); + } + + /* CCK txpwr limits for 2.4G band */ + if (BAND_2G(band->bandtype)) { + maxpwr = li->maxpwr[CHANNEL_POWER_IDX_2G_CCK(chan)]; + + maxpwr = maxpwr - delta; + maxpwr = max(maxpwr, 0); + maxpwr = min(maxpwr, conducted_max); + + for (i = 0; i < WLC_NUM_RATES_CCK; i++) + txpwr->cck[i] = (u8) maxpwr; + } + + /* OFDM txpwr limits for 2.4G or 5G bands */ + if (BAND_2G(band->bandtype)) { + maxpwr = li->maxpwr[CHANNEL_POWER_IDX_2G_OFDM(chan)]; + + } else { + maxpwr = li->maxpwr[CHANNEL_POWER_IDX_5G(chan)]; + } + + maxpwr = maxpwr - delta; + maxpwr = max(maxpwr, 0); + maxpwr = min(maxpwr, conducted_ofdm_max); + + /* Keep OFDM lmit below CCK limit */ + if (BAND_2G(band->bandtype)) + maxpwr = min_t(int, maxpwr, txpwr->cck[0]); + + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + txpwr->ofdm[i] = (u8) maxpwr; + } + + for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + /* OFDM 40 MHz SISO has the same power as the corresponding MCS0-7 rate unless + * overriden by the locale specific code. We set this value to 0 as a + * flag (presumably 0 dBm isn't a possibility) and then copy the MCS0-7 value + * to the 40 MHz value if it wasn't explicitly set. + */ + txpwr->ofdm_40_siso[i] = 0; + + txpwr->ofdm_cdd[i] = (u8) maxpwr; + + txpwr->ofdm_40_cdd[i] = 0; + } + + /* MIMO/HT specific limits */ + if (li_mimo->flags & WLC_EIRP) { + delta = band->antgain; + } else { + delta = 0; + if (band->antgain > QDB(6)) + delta = band->antgain - QDB(6); /* Excess over 6 dB */ + } + + if (BAND_2G(band->bandtype)) + maxpwr_idx = (chan - 1); + else + maxpwr_idx = CHANNEL_POWER_IDX_5G(chan); + + maxpwr20 = li_mimo->maxpwr20[maxpwr_idx]; + maxpwr40 = li_mimo->maxpwr40[maxpwr_idx]; + + maxpwr20 = maxpwr20 - delta; + maxpwr20 = max(maxpwr20, 0); + maxpwr40 = maxpwr40 - delta; + maxpwr40 = max(maxpwr40, 0); + + /* Fill in the MCS 0-7 (SISO) rates */ + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + + /* 20 MHz has the same power as the corresponding OFDM rate unless + * overriden by the locale specific code. + */ + txpwr->mcs_20_siso[i] = txpwr->ofdm[i]; + txpwr->mcs_40_siso[i] = 0; + } + + /* Fill in the MCS 0-7 CDD rates */ + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + txpwr->mcs_20_cdd[i] = (u8) maxpwr20; + txpwr->mcs_40_cdd[i] = (u8) maxpwr40; + } + + /* These locales have SISO expressed in the table and override CDD later */ + if (li_mimo == &locale_bn) { + if (li_mimo == &locale_bn) { + maxpwr20 = QDB(16); + maxpwr40 = 0; + + if (chan >= 3 && chan <= 11) { + maxpwr40 = QDB(16); + } + } + + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + txpwr->mcs_20_siso[i] = (u8) maxpwr20; + txpwr->mcs_40_siso[i] = (u8) maxpwr40; + } + } + + /* Fill in the MCS 0-7 STBC rates */ + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + txpwr->mcs_20_stbc[i] = 0; + txpwr->mcs_40_stbc[i] = 0; + } + + /* Fill in the MCS 8-15 SDM rates */ + for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + txpwr->mcs_20_mimo[i] = (u8) maxpwr20; + txpwr->mcs_40_mimo[i] = (u8) maxpwr40; + } + + /* Fill in MCS32 */ + txpwr->mcs32 = (u8) maxpwr40; + + for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { + if (txpwr->ofdm_40_cdd[i] == 0) + txpwr->ofdm_40_cdd[i] = txpwr->mcs_40_cdd[j]; + if (i == 0) { + i = i + 1; + if (txpwr->ofdm_40_cdd[i] == 0) + txpwr->ofdm_40_cdd[i] = txpwr->mcs_40_cdd[j]; + } + } + + /* Copy the 40 MHZ MCS 0-7 CDD value to the 40 MHZ MCS 0-7 SISO value if it wasn't + * provided explicitly. + */ + + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + if (txpwr->mcs_40_siso[i] == 0) + txpwr->mcs_40_siso[i] = txpwr->mcs_40_cdd[i]; + } + + for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { + if (txpwr->ofdm_40_siso[i] == 0) + txpwr->ofdm_40_siso[i] = txpwr->mcs_40_siso[j]; + if (i == 0) { + i = i + 1; + if (txpwr->ofdm_40_siso[i] == 0) + txpwr->ofdm_40_siso[i] = txpwr->mcs_40_siso[j]; + } + } + + /* Copy the 20 and 40 MHz MCS0-7 CDD values to the corresponding STBC values if they weren't + * provided explicitly. + */ + for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + if (txpwr->mcs_20_stbc[i] == 0) + txpwr->mcs_20_stbc[i] = txpwr->mcs_20_cdd[i]; + + if (txpwr->mcs_40_stbc[i] == 0) + txpwr->mcs_40_stbc[i] = txpwr->mcs_40_cdd[i]; + } + +#ifdef POWER_DBG + wlc_phy_txpower_limits_dump(txpwr); +#endif + return; +} + +/* Returns true if currently set country is Japan or variant */ +static bool wlc_japan(struct wlc_info *wlc) +{ + return wlc_japan_ccode(wlc->cmi->country_abbrev); +} + +/* JP, J1 - J10 are Japan ccodes */ +static bool wlc_japan_ccode(const char *ccode) +{ + return (ccode[0] == 'J' && + (ccode[1] == 'P' || (ccode[1] >= '1' && ccode[1] <= '9'))); +} + +/* + * Validate the chanspec for this locale, for 40MHZ we need to also check that the sidebands + * are valid 20MZH channels in this locale and they are also a legal HT combination + */ +static bool +wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) +{ + struct wlc_info *wlc = wlc_cm->wlc; + u8 channel = CHSPEC_CHANNEL(chspec); + + /* check the chanspec */ + if (brcmu_chspec_malformed(chspec)) { + wiphy_err(wlc->wiphy, "wl%d: malformed chanspec 0x%x\n", + wlc->pub->unit, chspec); + return false; + } + + if (CHANNEL_BANDUNIT(wlc_cm->wlc, channel) != + CHSPEC_WLCBANDUNIT(chspec)) + return false; + + /* Check a 20Mhz channel */ + if (CHSPEC_IS20(chspec)) { + if (dualband) + return VALID_CHANNEL20_DB(wlc_cm->wlc, channel); + else + return VALID_CHANNEL20(wlc_cm->wlc, channel); + } +#ifdef SUPPORT_40MHZ + /* We know we are now checking a 40MHZ channel, so we should only be here + * for NPHYS + */ + if (WLCISNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) { + u8 upper_sideband = 0, idx; + u8 num_ch20_entries = + sizeof(chan20_info) / sizeof(struct chan20_info); + + if (!VALID_40CHANSPEC_IN_BAND(wlc, CHSPEC_WLCBANDUNIT(chspec))) + return false; + + if (dualband) { + if (!VALID_CHANNEL20_DB(wlc, LOWER_20_SB(channel)) || + !VALID_CHANNEL20_DB(wlc, UPPER_20_SB(channel))) + return false; + } else { + if (!VALID_CHANNEL20(wlc, LOWER_20_SB(channel)) || + !VALID_CHANNEL20(wlc, UPPER_20_SB(channel))) + return false; + } + + /* find the lower sideband info in the sideband array */ + for (idx = 0; idx < num_ch20_entries; idx++) { + if (chan20_info[idx].sb == LOWER_20_SB(channel)) + upper_sideband = chan20_info[idx].adj_sbs; + } + /* check that the lower sideband allows an upper sideband */ + if ((upper_sideband & (CH_UPPER_SB | CH_EWA_VALID)) == + (CH_UPPER_SB | CH_EWA_VALID)) + return true; + return false; + } +#endif /* 40 MHZ */ + + return false; +} + +bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec) +{ + return wlc_valid_chanspec_ext(wlc_cm, chspec, true); +} diff --git a/drivers/staging/brcm80211/brcmsmac/channel.h b/drivers/staging/brcm80211/brcmsmac/channel.h new file mode 100644 index 0000000..f50a66e --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/channel.h @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_CHANNEL_H_ +#define _BRCM_CHANNEL_H_ + +#define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ + +struct wlc_info; + +/* maxpwr mapping to 5GHz band channels: + * maxpwr[0] - channels [34-48] + * maxpwr[1] - channels [52-60] + * maxpwr[2] - channels [62-64] + * maxpwr[3] - channels [100-140] + * maxpwr[4] - channels [149-165] + */ +#define BAND_5G_PWR_LVLS 5 /* 5 power levels for 5G */ + +/* power level in group of 2.4GHz band channels: + * maxpwr[0] - CCK channels [1] + * maxpwr[1] - CCK channels [2-10] + * maxpwr[2] - CCK channels [11-14] + * maxpwr[3] - OFDM channels [1] + * maxpwr[4] - OFDM channels [2-10] + * maxpwr[5] - OFDM channels [11-14] + */ + +/* macro to get 2.4 GHz channel group index for tx power */ +#define CHANNEL_POWER_IDX_2G_CCK(c) (((c) < 2) ? 0 : (((c) < 11) ? 1 : 2)) /* cck index */ +#define CHANNEL_POWER_IDX_2G_OFDM(c) (((c) < 2) ? 3 : (((c) < 11) ? 4 : 5)) /* ofdm index */ + +/* macro to get 5 GHz channel group index for tx power */ +#define CHANNEL_POWER_IDX_5G(c) \ + (((c) < 52) ? 0 : (((c) < 62) ? 1 : (((c) < 100) ? 2 : (((c) < 149) ? 3 : 4)))) + +#define WLC_MAXPWR_TBL_SIZE 6 /* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */ +#define WLC_MAXPWR_MIMO_TBL_SIZE 14 /* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */ + +/* locale channel and power info. */ +typedef struct { + u32 valid_channels; + u8 radar_channels; /* List of radar sensitive channels */ + u8 restricted_channels; /* List of channels used only if APs are detected */ + s8 maxpwr[WLC_MAXPWR_TBL_SIZE]; /* Max tx pwr in qdBm for each sub-band */ + s8 pub_maxpwr[BAND_5G_PWR_LVLS]; /* Country IE advertised max tx pwr in dBm + * per sub-band + */ + u8 flags; +} locale_info_t; + +/* bits for locale_info flags */ +#define WLC_PEAK_CONDUCTED 0x00 /* Peak for locals */ +#define WLC_EIRP 0x01 /* Flag for EIRP */ +#define WLC_DFS_TPC 0x02 /* Flag for DFS TPC */ +#define WLC_NO_OFDM 0x04 /* Flag for No OFDM */ +#define WLC_NO_40MHZ 0x08 /* Flag for No MIMO 40MHz */ +#define WLC_NO_MIMO 0x10 /* Flag for No MIMO, 20 or 40 MHz */ +#define WLC_RADAR_TYPE_EU 0x20 /* Flag for EU */ +#define WLC_DFS_FCC WLC_DFS_TPC /* Flag for DFS FCC */ +#define WLC_DFS_EU (WLC_DFS_TPC | WLC_RADAR_TYPE_EU) /* Flag for DFS EU */ + +#define ISDFS_EU(fl) (((fl) & WLC_DFS_EU) == WLC_DFS_EU) + +/* locale per-channel tx power limits for MIMO frames + * maxpwr arrays are index by channel for 2.4 GHz limits, and + * by sub-band for 5 GHz limits using CHANNEL_POWER_IDX_5G(channel) + */ +typedef struct { + s8 maxpwr20[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 20 MHz power limits, qdBm units */ + s8 maxpwr40[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 40 MHz power limits, qdBm units */ + u8 flags; +} locale_mimo_info_t; + +extern const chanvec_t chanvec_all_2G; +extern const chanvec_t chanvec_all_5G; + +/* + * Country names and abbreviations with locale defined from ISO 3166 + */ +struct country_info { + const u8 locale_2G; /* 2.4G band locale */ + const u8 locale_5G; /* 5G band locale */ + const u8 locale_mimo_2G; /* 2.4G mimo info */ + const u8 locale_mimo_5G; /* 5G mimo info */ +}; + +typedef struct country_info country_info_t; + +typedef struct wlc_cm_info wlc_cm_info_t; + +extern wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc); +extern void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm); + +extern u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, + uint bandunit); + +extern bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec); + +extern void wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, + chanspec_t chanspec, + struct txpwr_limits *txpwr); +extern void wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, + chanspec_t chanspec, + u8 local_constraint_qdbm); + +#endif /* _WLC_CHANNEL_H */ diff --git a/drivers/staging/brcm80211/brcmsmac/dma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index 183baf8..ce02324 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -18,15 +18,14 @@ #include #include #include -#include -#include -#include +#include +#include +#include #include #include -#include "wlc_types.h" -#include "bcmdma.h" -#include +#include "types.h" +#include "dma.h" #if defined(__mips__) #include diff --git a/drivers/staging/brcm80211/brcmsmac/dma.h b/drivers/staging/brcm80211/brcmsmac/dma.h new file mode 100644 index 0000000..70c9ad6 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/dma.h @@ -0,0 +1,255 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_DMA_H_ +#define _BRCM_DMA_H_ + +#include "types.h" /* forward structure declarations */ + +#ifndef _dma_pub_ +#define _dma_pub_ +struct dma_pub; +#endif /* _dma_pub_ */ + +/* DMA structure: + * support two DMA engines: 32 bits address or 64 bit addressing + * basic DMA register set is per channel(transmit or receive) + * a pair of channels is defined for convenience + */ + +/* 32 bits addressing */ + +typedef volatile struct { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +} dma32diag_t; + +/* 64 bits addressing */ + +/* dma registers per channel(xmt or rcv) */ +typedef volatile struct { + u32 control; /* enable, et al */ + u32 ptr; /* last descriptor posted to chip */ + u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ + u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ + u32 status0; /* current descriptor, xmt state */ + u32 status1; /* active descriptor, xmt error */ +} dma64regs_t; + +/* map/unmap direction */ +#define DMA_TX 1 /* TX direction for DMA */ +#define DMA_RX 2 /* RX direction for DMA */ +#define BUS_SWAP32(v) (v) + +/* range param for dma_getnexttxp() and dma_txreclaim */ +typedef enum txd_range { + DMA_RANGE_ALL = 1, + DMA_RANGE_TRANSMITTED, + DMA_RANGE_TRANSFERED +} txd_range_t; + +/* dma function type */ +typedef void (*di_detach_t) (struct dma_pub *dmah); +typedef bool(*di_txreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxidle_t) (struct dma_pub *dmah); +typedef void (*di_txinit_t) (struct dma_pub *dmah); +typedef bool(*di_txenabled_t) (struct dma_pub *dmah); +typedef void (*di_rxinit_t) (struct dma_pub *dmah); +typedef void (*di_txsuspend_t) (struct dma_pub *dmah); +typedef void (*di_txresume_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspended_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspendedidle_t) (struct dma_pub *dmah); +typedef int (*di_txfast_t) (struct dma_pub *dmah, struct sk_buff *p, + bool commit); +typedef int (*di_txunframed_t) (struct dma_pub *dmah, void *p, uint len, + bool commit); +typedef void *(*di_getpos_t) (struct dma_pub *di, bool direction); +typedef void (*di_fifoloopbackenable_t) (struct dma_pub *dmah); +typedef bool(*di_txstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxenable_t) (struct dma_pub *dmah); +typedef bool(*di_rxenabled_t) (struct dma_pub *dmah); +typedef void *(*di_rx_t) (struct dma_pub *dmah); +typedef bool(*di_rxfill_t) (struct dma_pub *dmah); +typedef void (*di_txreclaim_t) (struct dma_pub *dmah, txd_range_t range); +typedef void (*di_rxreclaim_t) (struct dma_pub *dmah); +typedef unsigned long (*di_getvar_t) (struct dma_pub *dmah, + const char *name); +typedef void *(*di_getnexttxp_t) (struct dma_pub *dmah, txd_range_t range); +typedef void *(*di_getnextrxp_t) (struct dma_pub *dmah, bool forceall); +typedef void *(*di_peeknexttxp_t) (struct dma_pub *dmah); +typedef void *(*di_peeknextrxp_t) (struct dma_pub *dmah); +typedef void (*di_rxparam_get_t) (struct dma_pub *dmah, u16 *rxoffset, + u16 *rxbufsize); +typedef void (*di_txblock_t) (struct dma_pub *dmah); +typedef void (*di_txunblock_t) (struct dma_pub *dmah); +typedef uint(*di_txactive_t) (struct dma_pub *dmah); +typedef void (*di_txrotate_t) (struct dma_pub *dmah); +typedef void (*di_counterreset_t) (struct dma_pub *dmah); +typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags); +typedef char *(*di_dump_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, + bool dumpring); +typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, + bool dumpring); +typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, + bool dumpring); +typedef uint(*di_rxactive_t) (struct dma_pub *dmah); +typedef uint(*di_txpending_t) (struct dma_pub *dmah); +typedef uint(*di_txcommitted_t) (struct dma_pub *dmah); + +/* dma opsvec */ +typedef struct di_fcn_s { + di_detach_t detach; + di_txinit_t txinit; + di_txreset_t txreset; + di_txenabled_t txenabled; + di_txsuspend_t txsuspend; + di_txresume_t txresume; + di_txsuspended_t txsuspended; + di_txsuspendedidle_t txsuspendedidle; + di_txfast_t txfast; + di_txunframed_t txunframed; + di_getpos_t getpos; + di_txstopped_t txstopped; + di_txreclaim_t txreclaim; + di_getnexttxp_t getnexttxp; + di_peeknexttxp_t peeknexttxp; + di_txblock_t txblock; + di_txunblock_t txunblock; + di_txactive_t txactive; + di_txrotate_t txrotate; + + di_rxinit_t rxinit; + di_rxreset_t rxreset; + di_rxidle_t rxidle; + di_rxstopped_t rxstopped; + di_rxenable_t rxenable; + di_rxenabled_t rxenabled; + di_rx_t rx; + di_rxfill_t rxfill; + di_rxreclaim_t rxreclaim; + di_getnextrxp_t getnextrxp; + di_peeknextrxp_t peeknextrxp; + di_rxparam_get_t rxparam_get; + + di_fifoloopbackenable_t fifoloopbackenable; + di_getvar_t d_getvar; + di_counterreset_t counterreset; + di_ctrlflags_t ctrlflags; + di_dump_t dump; + di_dumptx_t dumptx; + di_dumprx_t dumprx; + di_rxactive_t rxactive; + di_txpending_t txpending; + di_txcommitted_t txcommitted; + uint endnum; +} di_fcn_t; + +/* + * Exported data structure (read-only) + */ +/* export structure */ +struct dma_pub { + const di_fcn_t *di_fn; /* DMA function pointers */ + uint txavail; /* # free tx descriptors */ + uint dmactrlflags; /* dma control flags */ + + /* rx error counters */ + uint rxgiants; /* rx giant frames */ + uint rxnobuf; /* rx out of dma descriptors */ + /* tx error counters */ + uint txnobuf; /* tx out of dma descriptors */ +}; + +extern struct dma_pub *dma_attach(char *name, struct si_pub *sih, + void *dmaregstx, void *dmaregsrx, uint ntxd, + uint nrxd, uint rxbufsize, int rxextheadroom, + uint nrxpost, uint rxoffset, uint *msg_level); + +extern const di_fcn_t dma64proc; + +#define dma_detach(di) (dma64proc.detach(di)) +#define dma_txreset(di) (dma64proc.txreset(di)) +#define dma_rxreset(di) (dma64proc.rxreset(di)) +#define dma_rxidle(di) (dma64proc.rxidle(di)) +#define dma_txinit(di) (dma64proc.txinit(di)) +#define dma_txenabled(di) (dma64proc.txenabled(di)) +#define dma_rxinit(di) (dma64proc.rxinit(di)) +#define dma_txsuspend(di) (dma64proc.txsuspend(di)) +#define dma_txresume(di) (dma64proc.txresume(di)) +#define dma_txsuspended(di) (dma64proc.txsuspended(di)) +#define dma_txsuspendedidle(di) (dma64proc.txsuspendedidle(di)) +#define dma_txfast(di, p, commit) (dma64proc.txfast(di, p, commit)) +#define dma_txunframed(di, p, l, commit)(dma64proc.txunframed(di, p, l, commit)) +#define dma_getpos(di, dir) (dma64proc.getpos(di, dir)) +#define dma_fifoloopbackenable(di) (dma64proc.fifoloopbackenable(di)) +#define dma_txstopped(di) (dma64proc.txstopped(di)) +#define dma_rxstopped(di) (dma64proc.rxstopped(di)) +#define dma_rxenable(di) (dma64proc.rxenable(di)) +#define dma_rxenabled(di) (dma64proc.rxenabled(di)) +#define dma_rx(di) (dma64proc.rx(di)) +#define dma_rxfill(di) (dma64proc.rxfill(di)) +#define dma_txreclaim(di, range) (dma64proc.txreclaim(di, range)) +#define dma_rxreclaim(di) (dma64proc.rxreclaim(di)) +#define dma_getvar(di, name) (dma64proc.d_getvar(di, name)) +#define dma_getnexttxp(di, range) (dma64proc.getnexttxp(di, range)) +#define dma_getnextrxp(di, forceall) (dma64proc.getnextrxp(di, forceall)) +#define dma_peeknexttxp(di) (dma64proc.peeknexttxp(di)) +#define dma_peeknextrxp(di) (dma64proc.peeknextrxp(di)) +#define dma_rxparam_get(di, off, bufs) (dma64proc.rxparam_get(di, off, bufs)) + +#define dma_txblock(di) (dma64proc.txblock(di)) +#define dma_txunblock(di) (dma64proc.txunblock(di)) +#define dma_txactive(di) (dma64proc.txactive(di)) +#define dma_rxactive(di) (dma64proc.rxactive(di)) +#define dma_txrotate(di) (dma64proc.txrotate(di)) +#define dma_counterreset(di) (dma64proc.counterreset(di)) +#define dma_ctrlflags(di, mask, flags) (dma64proc.ctrlflags((di), (mask), (flags))) +#define dma_txpending(di) (dma64proc.txpending(di)) +#define dma_txcommitted(di) (dma64proc.txcommitted(di)) + + +/* return addresswidth allowed + * This needs to be done after SB attach but before dma attach. + * SB attach provides ability to probe backplane and dma core capabilities + * This info is needed by DMA_ALLOC_CONSISTENT in dma attach + */ +extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs); +void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) + (void *pkt, void *arg_a), void *arg_a); + +/* + * DMA(Bug) on some chips seems to declare that the packet is ready, but the + * packet length is not updated yet (by DMA) on the expected time. + * Workaround is to hold processor till DMA updates the length, and stay off + * the bus to allow DMA update the length in buffer + */ +static inline void dma_spin_for_len(uint len, struct sk_buff *head) +{ +#if defined(__mips__) + if (!len) { + while (!(len = *(u16 *) KSEG1ADDR(head->data))) + udelay(1); + + *(u16 *) (head->data) = cpu_to_le16((u16) len); + } +#endif /* defined(__mips__) */ +} + +#endif /* _BRCM_DMA_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/key.h b/drivers/staging/brcm80211/brcmsmac/key.h new file mode 100644 index 0000000..ecfe969 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/key.h @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_KEY_H_ +#define _BRCM_KEY_H_ + +#include /* for ETH_ALEN */ + +struct scb; +struct wlc_info; +struct wlc_bsscfg; +/* Maximum # of keys that wl driver supports in S/W. + * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. + */ +#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ +#define WLC_DEFAULT_KEYS 4 /* Default # of keys */ + +#define WSEC_MAX_WOWL_KEYS 5 /* Max keys in WOWL mode (1 + 4 default keys) */ + +#define WPA2_GTK_MAX 3 + +/* +* Max # of keys currently supported: +* +* s/w keys if WSEC_SW(wlc->wsec). +* h/w keys otherwise. +*/ +#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS + +/* number of 802.11 default (non-paired, group keys) */ +#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ + +/* Max # of hardware keys supported */ +#define WLC_MAX_WSEC_HW_KEYS(wlc) WSEC_MAX_RCMTA_KEYS + +/* Max # of hardware TKIP MIC keys supported */ +#define WLC_MAX_TKMIC_HW_KEYS(wlc) (WSEC_MAX_TKMIC_ENGINE_KEYS) + +#define WSEC_HW_TKMIC_KEY(wlc, key, bsscfg) \ + ((((wlc)->machwcap & MCAP_TKIPMIC)) && \ + (key) && ((key)->algo == CRYPTO_ALGO_TKIP) && \ + !WSEC_SOFTKEY(wlc, key, bsscfg) && \ + WSEC_KEY_INDEX(wlc, key) >= WLC_DEFAULT_KEYS && \ + (WSEC_KEY_INDEX(wlc, key) < WSEC_MAX_TKMIC_ENGINE_KEYS)) + +/* index of key in key table */ +#define WSEC_KEY_INDEX(wlc, key) ((key)->idx) + +#define WSEC_SOFTKEY(wlc, key, bsscfg) (WLC_SW_KEYS(wlc, bsscfg) || \ + WSEC_KEY_INDEX(wlc, key) >= WLC_MAX_WSEC_HW_KEYS(wlc)) + +/* get a key, non-NULL only if key allocated and not clear */ +#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \ + (wlc)->wsec_keys[i] : NULL) + +#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : false) + +/* default key */ +#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \ + (struct wsec_key *)NULL:(bsscfg)->bss_def_keys[(bsscfg)->wsec_index]) + +/* Macros for key management in IBSS mode */ +#define WSEC_IBSS_MAX_PEERS 16 /* Max # of IBSS Peers */ +#define WSEC_IBSS_RCMTA_INDEX(idx) \ + (((idx - WSEC_MAX_DEFAULT_KEYS) % WSEC_IBSS_MAX_PEERS) + WSEC_MAX_DEFAULT_KEYS) + +/* contiguous # key slots for infrastructure mode STA */ +#define WSEC_BSS_STA_KEY_GROUP_SIZE 5 + +typedef struct wsec_iv { + u32 hi; /* upper 32 bits of IV */ + u16 lo; /* lower 16 bits of IV */ +} wsec_iv_t; + +#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ + +typedef struct wsec_key { + u8 ea[ETH_ALEN]; /* per station */ + u8 idx; /* key index in wsec_keys array */ + u8 id; /* key ID [0-3] */ + u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + u8 rcmta; /* rcmta entry index, same as idx by default */ + u16 flags; /* misc flags */ + u8 algo_hw; /* cache for hw register */ + u8 aes_mode; /* cache for hw register */ + s8 iv_len; /* IV length */ + s8 icv_len; /* ICV length */ + u32 len; /* key length..don't move this var */ + /* data is 4byte aligned */ + u8 data[WLAN_MAX_KEY_LEN]; /* key data */ + wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */ + wsec_iv_t txiv; /* Tx IV */ + +} wsec_key_t; + +#define broken_roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) + +/* For use with wsec_key_t.flags */ + +#define WSEC_BS_UPDATE (1 << 0) /* Indicates hw needs key update on BS switch */ +#define WSEC_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ +#define WSEC_TKIP_ERROR (1 << 2) /* Provoke deliberate MIC error */ +#define WSEC_REPLAY_ERROR (1 << 3) /* Provoke deliberate replay */ +#define WSEC_IBSS_PEER_GROUP_KEY (1 << 7) /* Flag: group key for a IBSS PEER */ +#define WSEC_ICV_ERROR (1 << 8) /* Provoke deliberate ICV error */ + +#define wlc_key_insert(a, b, c, d, e, f, g, h, i, j) (-EBADE) +#define wlc_key_update(a, b, c) do {} while (0) +#define wlc_key_remove(a, b, c) do {} while (0) +#define wlc_key_remove_all(a, b) do {} while (0) +#define wlc_key_delete(a, b, c) do {} while (0) +#define wlc_scb_key_delete(a, b) do {} while (0) +#define wlc_key_lookup(a, b, c, d, e) (NULL) +#define wlc_key_hw_init_all(a) do {} while (0) +#define wlc_key_hw_init(a, b, c) do {} while (0) +#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0) +#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0) +#define wlc_key_sw_wowl_create(a, b, c) (-EBADE) +#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0) +#define wlc_key_iv_init(a, b, c) do {} while (0) +#define wlc_key_set_error(a, b, c) (-EBADE) +#define wlc_key_dump_hw(a, b) (-EBADE) +#define wlc_key_dump_sw(a, b) (-EBADE) +#define wlc_key_defkeyflag(a) (0) +#define wlc_rcmta_add_bssid(a, b) do {} while (0) +#define wlc_rcmta_del_bssid(a, b) do {} while (0) +#define wlc_key_scb_delete(a, b) do {} while (0) + +#endif /* _BRCM_KEY_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/mac80211_if.c b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c new file mode 100644 index 0000000..1029392 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c @@ -0,0 +1,1945 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define __UNDEF_NO_VERSION__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "dma.h" + +#include "phy/phy_int.h" +#include "d11.h" +#include "types.h" +#include "cfg.h" +#include "key.h" +#include "channel.h" +#include "scb.h" +#include "pub.h" +#include "ucode_loader.h" +#include "mac80211_if.h" + +#define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ + +#define LOCK(wl) spin_lock_bh(&(wl)->lock) +#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) + +/* locking from inside brcms_isr */ +#define ISR_LOCK(wl, flags)\ + do {\ + spin_lock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +#define ISR_UNLOCK(wl, flags)\ + do {\ + spin_unlock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +/* locking under LOCK() to synchronize with brcms_isr */ +#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) +#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) + +static void brcms_timer(unsigned long data); +static void _brcms_timer(struct brcms_timer *t); + + +static int ieee_hw_init(struct ieee80211_hw *hw); +static int ieee_hw_rate_init(struct ieee80211_hw *hw); + +static int wl_linux_watchdog(void *ctx); + +/* Flags we support */ +#define MAC_FILTERS (FIF_PROMISC_IN_BSS | \ + FIF_ALLMULTI | \ + FIF_FCSFAIL | \ + FIF_PLCPFAIL | \ + FIF_CONTROL | \ + FIF_OTHER_BSS | \ + FIF_BCN_PRBRESP_PROMISC) + +static int n_adapters_found; + +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); +static void brcms_release_fw(struct brcms_info *wl); + +/* local prototypes */ +static void brcms_dpc(unsigned long data); +static irqreturn_t brcms_isr(int irq, void *dev_id); + +static int __devinit brcms_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent); +static void brcms_remove(struct pci_dev *pdev); +static void brcms_free(struct brcms_info *wl); +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); +MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); +MODULE_LICENSE("Dual BSD/GPL"); + +/* recognized PCI IDs */ +static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { + {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ + {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ + {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ + /* 43224 Ven */ + {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + {0} +}; + +MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); + +#ifdef BCMDBG +static int msglevel = 0xdeadbeef; +module_param(msglevel, int, 0); +static int phymsglevel = 0xdeadbeef; +module_param(phymsglevel, int, 0); +#endif /* BCMDBG */ + +#define HW_TO_WL(hw) (hw->priv) +#define WL_TO_HW(wl) (wl->pub->ieee_hw) + +/* MAC80211 callback functions */ +static int brcms_ops_start(struct ieee80211_hw *hw); +static void brcms_ops_stop(struct ieee80211_hw *hw); +static int brcms_ops_add_interface(struct ieee80211_hw *hw, + struct ieee80211_vif *vif); +static void brcms_ops_remove_interface(struct ieee80211_hw *hw, + struct ieee80211_vif *vif); +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); +static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *info, + u32 changed); +static void brcms_ops_configure_filter(struct ieee80211_hw *hw, + unsigned int changed_flags, + unsigned int *total_flags, u64 multicast); +static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, + bool set); +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); +static int brcms_ops_get_stats(struct ieee80211_hw *hw, + struct ieee80211_low_level_stats *stats); +static void brcms_ops_sta_notify(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum sta_notify_cmd cmd, + struct ieee80211_sta *sta); +static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, + const struct ieee80211_tx_queue_params *params); +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); +static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_sta_remove(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum ieee80211_ampdu_mlme_action action, + struct ieee80211_sta *sta, u16 tid, u16 *ssn, + u8 buf_size); +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); + +static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) +{ + struct brcms_info *wl = hw->priv; + + LOCK(wl); + if (!wl->pub->up) { + wiphy_err(wl->wiphy, "ops->tx called while down\n"); + kfree_skb(skb); + goto done; + } + wlc_sendpkt_mac80211(wl->wlc, skb, hw); + done: + UNLOCK(wl); +} + +static int brcms_ops_start(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + bool blocked; + /* + struct ieee80211_channel *curchan = hw->conf.channel; + */ + + ieee80211_wake_queues(hw); + LOCK(wl); + blocked = brcms_rfkill_set_hw_state(wl); + UNLOCK(wl); + if (!blocked) + wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); + + return 0; +} + +static void brcms_ops_stop(struct ieee80211_hw *hw) +{ + ieee80211_stop_queues(hw); +} + +static int +brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct brcms_info *wl; + int err; + + /* Just STA for now */ + if (vif->type != NL80211_IFTYPE_AP && + vif->type != NL80211_IFTYPE_MESH_POINT && + vif->type != NL80211_IFTYPE_STATION && + vif->type != NL80211_IFTYPE_WDS && + vif->type != NL80211_IFTYPE_ADHOC) { + wiphy_err(hw->wiphy, "%s: Attempt to add type %d, only" + " STA for now\n", __func__, vif->type); + return -EOPNOTSUPP; + } + + wl = HW_TO_WL(hw); + LOCK(wl); + err = brcms_up(wl); + UNLOCK(wl); + + if (err != 0) { + wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, + err); + } + return err; +} + +static void +brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct brcms_info *wl; + + wl = HW_TO_WL(hw); + + /* put driver in down state */ + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); +} + +/* + * precondition: perimeter lock has been acquired + */ +static int +ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, + enum nl80211_channel_type type) +{ + struct brcms_info *wl = HW_TO_WL(hw); + int err = 0; + + switch (type) { + case NL80211_CHAN_HT20: + case NL80211_CHAN_NO_HT: + err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); + break; + case NL80211_CHAN_HT40MINUS: + case NL80211_CHAN_HT40PLUS: + wiphy_err(hw->wiphy, + "%s: Need to implement 40 Mhz Channels!\n", __func__); + err = 1; + break; + } + + if (err) + return -EIO; + return err; +} + +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) +{ + struct ieee80211_conf *conf = &hw->conf; + struct brcms_info *wl = HW_TO_WL(hw); + int err = 0; + int new_int; + struct wiphy *wiphy = hw->wiphy; + + LOCK(wl); + if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { + if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval) + < 0) { + wiphy_err(wiphy, "%s: Error setting listen_interval\n", + __func__); + err = -EIO; + goto config_out; + } + wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); + } + if (changed & IEEE80211_CONF_CHANGE_MONITOR) + wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", + __func__, conf->flags & IEEE80211_CONF_MONITOR ? + "true" : "false"); + if (changed & IEEE80211_CONF_CHANGE_PS) + wiphy_err(wiphy, "%s: change power-save mode: %s (implement)\n", + __func__, conf->flags & IEEE80211_CONF_PS ? + "true" : "false"); + + if (changed & IEEE80211_CONF_CHANGE_POWER) { + if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4) + < 0) { + wiphy_err(wiphy, "%s: Error setting power_level\n", + __func__); + err = -EIO; + goto config_out; + } + wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int); + if (new_int != (conf->power_level * 4)) + wiphy_err(wiphy, "%s: Power level req != actual, %d %d" + "\n", __func__, conf->power_level * 4, + new_int); + } + if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { + err = ieee_set_channel(hw, conf->channel, conf->channel_type); + } + if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { + if (wlc_set + (wl->wlc, WLC_SET_SRL, + conf->short_frame_max_tx_count) < 0) { + wiphy_err(wiphy, "%s: Error setting srl\n", __func__); + err = -EIO; + goto config_out; + } + if (wlc_set(wl->wlc, WLC_SET_LRL, conf->long_frame_max_tx_count) + < 0) { + wiphy_err(wiphy, "%s: Error setting lrl\n", __func__); + err = -EIO; + goto config_out; + } + } + + config_out: + UNLOCK(wl); + return err; +} + +static void +brcms_ops_bss_info_changed(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *info, u32 changed) +{ + struct brcms_info *wl = HW_TO_WL(hw); + struct wiphy *wiphy = hw->wiphy; + int val; + + if (changed & BSS_CHANGED_ASSOC) { + /* association status changed (associated/disassociated) + * also implies a change in the AID. + */ + wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, + __func__, info->assoc ? "" : "dis"); + LOCK(wl); + wlc_associate_upd(wl->wlc, info->assoc); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_ERP_SLOT) { + /* slot timing changed */ + if (info->use_short_slot) + val = 1; + else + val = 0; + LOCK(wl); + wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); + UNLOCK(wl); + } + + if (changed & BSS_CHANGED_HT) { + /* 802.11n parameters changed */ + u16 mode = info->ht_operation_mode; + + LOCK(wl); + wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, + mode & IEEE80211_HT_OP_MODE_PROTECTION); + wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, + mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); + wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, + mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BASIC_RATES) { + struct ieee80211_supported_band *bi; + u32 br_mask, i; + u16 rate; + struct wl_rateset rs; + int error; + + /* retrieve the current rates */ + LOCK(wl); + error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, + &rs, sizeof(rs), NULL); + UNLOCK(wl); + if (error) { + wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", + __func__, error); + return; + } + br_mask = info->basic_rates; + bi = hw->wiphy->bands[wlc_get_curband(wl->wlc)]; + for (i = 0; i < bi->n_bitrates; i++) { + /* convert to internal rate value */ + rate = (bi->bitrates[i].bitrate << 1) / 10; + + /* set/clear basic rate flag */ + brcms_set_basic_rate(&rs, rate, br_mask & 1); + br_mask >>= 1; + } + + /* update the rate set */ + LOCK(wl); + wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BEACON_INT) { + /* Beacon interval changed */ + LOCK(wl); + wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BSSID) { + /* BSSID changed, for whatever reason (IBSS and managed mode) */ + LOCK(wl); + wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, + info->bssid); + UNLOCK(wl); + } + if (changed & BSS_CHANGED_BEACON) { + /* Beacon data changed, retrieve new beacon (beaconing modes) */ + wiphy_err(wiphy, "%s: beacon changed\n", __func__); + } + if (changed & BSS_CHANGED_BEACON_ENABLED) { + /* Beaconing should be enabled/disabled (beaconing modes) */ + wiphy_err(wiphy, "%s: Beacon enabled: %s\n", __func__, + info->enable_beacon ? "true" : "false"); + } + if (changed & BSS_CHANGED_CQM) { + /* Connection quality monitor config changed */ + wiphy_err(wiphy, "%s: cqm change: threshold %d, hys %d " + " (implement)\n", __func__, info->cqm_rssi_thold, + info->cqm_rssi_hyst); + } + if (changed & BSS_CHANGED_IBSS) { + /* IBSS join status changed */ + wiphy_err(wiphy, "%s: IBSS joined: %s (implement)\n", __func__, + info->ibss_joined ? "true" : "false"); + } + if (changed & BSS_CHANGED_ARP_FILTER) { + /* Hardware ARP filter address list or state changed */ + wiphy_err(wiphy, "%s: arp filtering: enabled %s, count %d" + " (implement)\n", __func__, info->arp_filter_enabled ? + "true" : "false", info->arp_addr_cnt); + } + if (changed & BSS_CHANGED_QOS) { + /* + * QoS for this association was enabled/disabled. + * Note that it is only ever disabled for station mode. + */ + wiphy_err(wiphy, "%s: qos enabled: %s (implement)\n", __func__, + info->qos ? "true" : "false"); + } + if (changed & BSS_CHANGED_IDLE) { + /* Idle changed for this BSS/interface */ + wiphy_err(wiphy, "%s: BSS idle: %s (implement)\n", __func__, + info->idle ? "true" : "false"); + } + return; +} + +static void +brcms_ops_configure_filter(struct ieee80211_hw *hw, + unsigned int changed_flags, + unsigned int *total_flags, u64 multicast) +{ + struct brcms_info *wl = hw->priv; + struct wiphy *wiphy = hw->wiphy; + + changed_flags &= MAC_FILTERS; + *total_flags &= MAC_FILTERS; + if (changed_flags & FIF_PROMISC_IN_BSS) + wiphy_err(wiphy, "FIF_PROMISC_IN_BSS\n"); + if (changed_flags & FIF_ALLMULTI) + wiphy_err(wiphy, "FIF_ALLMULTI\n"); + if (changed_flags & FIF_FCSFAIL) + wiphy_err(wiphy, "FIF_FCSFAIL\n"); + if (changed_flags & FIF_PLCPFAIL) + wiphy_err(wiphy, "FIF_PLCPFAIL\n"); + if (changed_flags & FIF_CONTROL) + wiphy_err(wiphy, "FIF_CONTROL\n"); + if (changed_flags & FIF_OTHER_BSS) + wiphy_err(wiphy, "FIF_OTHER_BSS\n"); + if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { + LOCK(wl); + if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { + wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; + wlc_mac_bcn_promisc_change(wl->wlc, 1); + } else { + wlc_mac_bcn_promisc_change(wl->wlc, 0); + wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; + } + UNLOCK(wl); + } + return; +} + +static int +brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) +{ + return 0; +} + +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + LOCK(wl); + wlc_scan_start(wl->wlc); + UNLOCK(wl); + return; +} + +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = hw->priv; + LOCK(wl); + wlc_scan_stop(wl->wlc); + UNLOCK(wl); + return; +} + +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) +{ + wiphy_err(hw->wiphy, "%s: Enter\n", __func__); + return; +} + +static int +brcms_ops_get_stats(struct ieee80211_hw *hw, + struct ieee80211_low_level_stats *stats) +{ + struct brcms_info *wl = hw->priv; + struct wl_cnt *cnt; + + LOCK(wl); + cnt = wl->pub->_cnt; + stats->dot11ACKFailureCount = 0; + stats->dot11RTSFailureCount = 0; + stats->dot11FCSErrorCount = 0; + stats->dot11RTSSuccessCount = 0; + UNLOCK(wl); + return 0; +} + +static void +brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + enum sta_notify_cmd cmd, struct ieee80211_sta *sta) +{ + switch (cmd) { + default: + wiphy_err(hw->wiphy, "%s: Unknown cmd = %d\n", __func__, + cmd); + break; + } + return; +} + +static int +brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, + const struct ieee80211_tx_queue_params *params) +{ + struct brcms_info *wl = hw->priv; + + LOCK(wl); + wlc_wme_setparams(wl->wlc, queue, params, true); + UNLOCK(wl); + + return 0; +} + +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) +{ + wiphy_err(hw->wiphy, "%s: Enter\n", __func__); + return 0; +} + +static int +brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta) +{ + struct scb *scb; + + int i; + struct brcms_info *wl = hw->priv; + + /* Init the scb */ + scb = (struct scb *)sta->drv_priv; + memset(scb, 0, sizeof(struct scb)); + for (i = 0; i < NUMPRIO; i++) + scb->seqctl[i] = 0xFFFF; + scb->seqctl_nonqos = 0xFFFF; + scb->magic = SCB_MAGIC; + + wl->pub->global_scb = scb; + wl->pub->global_ampdu = &(scb->scb_ampdu); + wl->pub->global_ampdu->scb = scb; + wl->pub->global_ampdu->max_pdu = 16; + brcmu_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, + AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); + + sta->ht_cap.ht_supported = true; + sta->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; + sta->ht_cap.ampdu_density = AMPDU_DEF_MPDU_DENSITY; + sta->ht_cap.cap = IEEE80211_HT_CAP_GRN_FLD | + IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT; + + /* minstrel_ht initiates addBA on our behalf by calling ieee80211_start_tx_ba_session() */ + return 0; +} + +static int +brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_sta *sta) +{ + return 0; +} + +static int +brcms_ops_ampdu_action(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum ieee80211_ampdu_mlme_action action, + struct ieee80211_sta *sta, u16 tid, u16 *ssn, + u8 buf_size) +{ + struct scb *scb = (struct scb *)sta->drv_priv; + struct brcms_info *wl = hw->priv; + int status; + + if (WARN_ON(scb->magic != SCB_MAGIC)) + return -EIDRM; + switch (action) { + case IEEE80211_AMPDU_RX_START: + break; + case IEEE80211_AMPDU_RX_STOP: + break; + case IEEE80211_AMPDU_TX_START: + LOCK(wl); + status = wlc_aggregatable(wl->wlc, tid); + UNLOCK(wl); + if (!status) { + wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", + tid); + return -EINVAL; + } + /* XXX: Use the starting sequence number provided ... */ + *ssn = 0; + ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); + break; + + case IEEE80211_AMPDU_TX_STOP: + LOCK(wl); + wlc_ampdu_flush(wl->wlc, sta, tid); + UNLOCK(wl); + ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); + break; + case IEEE80211_AMPDU_TX_OPERATIONAL: + /* Not sure what to do here */ + /* Power save wakeup */ + break; + default: + wiphy_err(wl->wiphy, "%s: Invalid command, ignoring\n", + __func__); + } + + return 0; +} + +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = HW_TO_WL(hw); + bool blocked; + + LOCK(wl); + blocked = wlc_check_radio_disabled(wl->wlc); + UNLOCK(wl); + + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); +} + +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) +{ + struct brcms_info *wl = HW_TO_WL(hw); + + no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); + + /* wait for packet queue and dma fifos to run empty */ + LOCK(wl); + wlc_wait_for_tx_completion(wl->wlc, drop); + UNLOCK(wl); +} + +static const struct ieee80211_ops brcms_ops = { + .tx = brcms_ops_tx, + .start = brcms_ops_start, + .stop = brcms_ops_stop, + .add_interface = brcms_ops_add_interface, + .remove_interface = brcms_ops_remove_interface, + .config = brcms_ops_config, + .bss_info_changed = brcms_ops_bss_info_changed, + .configure_filter = brcms_ops_configure_filter, + .set_tim = brcms_ops_set_tim, + .sw_scan_start = brcms_ops_sw_scan_start, + .sw_scan_complete = brcms_ops_sw_scan_complete, + .set_tsf = brcms_ops_set_tsf, + .get_stats = brcms_ops_get_stats, + .sta_notify = brcms_ops_sta_notify, + .conf_tx = brcms_ops_conf_tx, + .get_tsf = brcms_ops_get_tsf, + .sta_add = brcms_ops_sta_add, + .sta_remove = brcms_ops_sta_remove, + .ampdu_action = brcms_ops_ampdu_action, + .rfkill_poll = brcms_ops_rfkill_poll, + .flush = brcms_ops_flush, +}; + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int brcms_set_hint(struct brcms_info *wl, char *abbrev) +{ + return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); +} + +/** + * attach to the WL device. + * + * Attach to the WL device identified by vendor and device parameters. + * regs is a host accessible memory address pointing to WL device registers. + * + * brcms_attach is not defined as static because in the case where no bus + * is defined, wl_attach will never be called, and thus, gcc will issue + * a warning that this function is defined but not used if we declare + * it as static. + * + * + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static struct brcms_info *brcms_attach(u16 vendor, u16 device, + unsigned long regs, + uint bustype, void *btparam, uint irq) +{ + struct brcms_info *wl = NULL; + int unit, err; + unsigned long base_addr; + struct ieee80211_hw *hw; + u8 perm[ETH_ALEN]; + + unit = n_adapters_found; + err = 0; + + if (unit < 0) { + return NULL; + } + + /* allocate private info */ + hw = pci_get_drvdata(btparam); /* btparam == pdev */ + if (hw != NULL) + wl = hw->priv; + if (WARN_ON(hw == NULL) || WARN_ON(wl == NULL)) + return NULL; + wl->wiphy = hw->wiphy; + + atomic_set(&wl->callbacks, 0); + + /* setup the bottom half handler */ + tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); + + + + base_addr = regs; + + if (bustype == PCI_BUS || bustype == RPC_BUS) { + /* Do nothing */ + } else { + bustype = PCI_BUS; + BCMMSG(wl->wiphy, "force to PCI\n"); + } + wl->bcm_bustype = bustype; + + wl->regsva = ioremap_nocache(base_addr, PCI_BAR0_WINSZ); + if (wl->regsva == NULL) { + wiphy_err(wl->wiphy, "wl%d: ioremap() failed\n", unit); + goto fail; + } + spin_lock_init(&wl->lock); + spin_lock_init(&wl->isr_lock); + + /* prepare ucode */ + if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { + wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " + "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); + brcms_release_fw(wl); + brcms_remove((struct pci_dev *)btparam); + return NULL; + } + + /* common load-time initialization */ + wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false, + wl->regsva, wl->bcm_bustype, btparam, &err); + brcms_release_fw(wl); + if (!wl->wlc) { + wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", + KBUILD_MODNAME, err); + goto fail; + } + wl->pub = wlc_pub(wl->wlc); + + wl->pub->ieee_hw = hw; + + if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) { + wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", + unit); + } + + /* register our interrupt handler */ + if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { + wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); + goto fail; + } + wl->irq = irq; + + /* register module */ + wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); + + if (ieee_hw_init(hw)) { + wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, + __func__); + goto fail; + } + + memcpy(perm, &wl->pub->cur_etheraddr, ETH_ALEN); + if (WARN_ON(!is_valid_ether_addr(perm))) + goto fail; + SET_IEEE80211_PERM_ADDR(hw, perm); + + err = ieee80211_register_hw(hw); + if (err) { + wiphy_err(wl->wiphy, "%s: ieee80211_register_hw failed, status" + "%d\n", __func__, err); + } + + if (wl->pub->srom_ccode[0]) + err = brcms_set_hint(wl, wl->pub->srom_ccode); + else + err = brcms_set_hint(wl, "US"); + if (err) { + wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", + __func__, err); + } + + n_adapters_found++; + return wl; + +fail: + brcms_free(wl); + return NULL; +} + + + +#define CHAN2GHZ(channel, freqency, chflags) { \ + .band = IEEE80211_BAND_2GHZ, \ + .center_freq = (freqency), \ + .hw_value = (channel), \ + .flags = chflags, \ + .max_antenna_gain = 0, \ + .max_power = 19, \ +} + +static struct ieee80211_channel brcms_2ghz_chantable[] = { + CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(4, 2427, IEEE80211_CHAN_NO_HT40MINUS), + CHAN2GHZ(5, 2432, 0), + CHAN2GHZ(6, 2437, 0), + CHAN2GHZ(7, 2442, 0), + CHAN2GHZ(8, 2447, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(9, 2452, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(12, 2467, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(13, 2472, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS), + CHAN2GHZ(14, 2484, + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) +}; + +#define CHAN5GHZ(channel, chflags) { \ + .band = IEEE80211_BAND_5GHZ, \ + .center_freq = 5000 + 5*(channel), \ + .hw_value = (channel), \ + .flags = chflags, \ + .max_antenna_gain = 0, \ + .max_power = 21, \ +} + +static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { + /* UNII-1 */ + CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(44, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS), + /* UNII-2 */ + CHAN5GHZ(52, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(56, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(60, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(64, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + /* MID */ + CHAN5GHZ(100, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(104, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(108, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(112, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(116, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(120, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(124, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(128, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(132, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(136, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(140, + IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS | + IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS | + IEEE80211_CHAN_NO_HT40MINUS), + /* UNII-3 */ + CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(153, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(157, IEEE80211_CHAN_NO_HT40MINUS), + CHAN5GHZ(161, IEEE80211_CHAN_NO_HT40PLUS), + CHAN5GHZ(165, IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) +}; + +#define RATE(rate100m, _flags) { \ + .bitrate = (rate100m), \ + .flags = (_flags), \ + .hw_value = (rate100m / 5), \ +} + +static struct ieee80211_rate legacy_ratetable[] = { + RATE(10, 0), + RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(110, IEEE80211_RATE_SHORT_PREAMBLE), + RATE(60, 0), + RATE(90, 0), + RATE(120, 0), + RATE(180, 0), + RATE(240, 0), + RATE(360, 0), + RATE(480, 0), + RATE(540, 0), +}; + +static struct ieee80211_supported_band brcms_band_2GHz_nphy = { + .band = IEEE80211_BAND_2GHZ, + .channels = brcms_2ghz_chantable, + .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), + .bitrates = legacy_ratetable, + .n_bitrates = ARRAY_SIZE(legacy_ratetable), + .ht_cap = { + /* from include/linux/ieee80211.h */ + .cap = IEEE80211_HT_CAP_GRN_FLD | + IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, + .ht_supported = true, + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, + .ampdu_density = AMPDU_DEF_MPDU_DENSITY, + .mcs = { + /* placeholders for now */ + .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, + .rx_highest = 500, + .tx_params = IEEE80211_HT_MCS_TX_DEFINED} + } +}; + +static struct ieee80211_supported_band brcms_band_5GHz_nphy = { + .band = IEEE80211_BAND_5GHZ, + .channels = brcms_5ghz_nphy_chantable, + .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), + .bitrates = legacy_ratetable + 4, + .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, + .ht_cap = { + /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ + .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ + .ht_supported = true, + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K, + .ampdu_density = AMPDU_DEF_MPDU_DENSITY, + .mcs = { + /* placeholders for now */ + .rx_mask = {0xff, 0xff, 0, 0, 0, 0, 0, 0, 0, 0}, + .rx_highest = 500, + .tx_params = IEEE80211_HT_MCS_TX_DEFINED} + } +}; + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int ieee_hw_rate_init(struct ieee80211_hw *hw) +{ + struct brcms_info *wl = HW_TO_WL(hw); + int has_5g; + char phy_list[4]; + + has_5g = 0; + + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; + hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; + + if (wlc_get(wl->wlc, WLC_GET_PHYLIST, (int *)&phy_list) < 0) { + wiphy_err(hw->wiphy, "Phy list failed\n"); + } + + if (phy_list[0] == 'n' || phy_list[0] == 'c') { + if (phy_list[0] == 'c') { + /* Single stream */ + brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; + } + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; + } else { + return -EPERM; + } + + /* Assume all bands use the same phy. True for 11n devices. */ + if (NBANDS_PUB(wl->pub) > 1) { + has_5g++; + if (phy_list[0] == 'n' || phy_list[0] == 'c') { + hw->wiphy->bands[IEEE80211_BAND_5GHZ] = + &brcms_band_5GHz_nphy; + } else { + return -EPERM; + } + } + return 0; +} + +/* + * is called in brcms_pci_probe() context, therefore no locking required. + */ +static int ieee_hw_init(struct ieee80211_hw *hw) +{ + hw->flags = IEEE80211_HW_SIGNAL_DBM + /* | IEEE80211_HW_CONNECTION_MONITOR What is this? */ + | IEEE80211_HW_REPORTS_TX_ACK_STATUS + | IEEE80211_HW_AMPDU_AGGREGATION; + + hw->extra_tx_headroom = wlc_get_header_len(); + hw->queues = N_TX_QUEUES; + /* FIXME: this doesn't seem to be used properly in minstrel_ht. + * mac80211/status.c:ieee80211_tx_status() checks this value, + * but mac80211/rc80211_minstrel_ht.c:minstrel_ht_get_rate() + * appears to always set 3 rates + */ + hw->max_rates = 2; /* Primary rate and 1 fallback rate */ + + hw->channel_change_time = 7 * 1000; /* channel change time is dependent on chip and band */ + hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); + + hw->rate_control_algorithm = "minstrel_ht"; + + hw->sta_data_size = sizeof(struct scb); + return ieee_hw_rate_init(hw); +} + +/** + * determines if a device is a WL device, and if so, attaches it. + * + * This function determines if a device pointed to by pdev is a WL device, + * and if so, performs a brcms_attach() on it. + * + * Perimeter lock is initialized in the course of this function. + */ +static int __devinit +brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + int rc; + struct brcms_info *wl; + struct ieee80211_hw *hw; + u32 val; + + dev_info(&pdev->dev, "bus %d slot %d func %d irq %d\n", + pdev->bus->number, PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn), pdev->irq); + + if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || + ((pdev->device != 0x0576) && + ((pdev->device & 0xff00) != 0x4300) && + ((pdev->device & 0xff00) != 0x4700) && + ((pdev->device < 43000) || (pdev->device > 43999)))) + return -ENODEV; + + rc = pci_enable_device(pdev); + if (rc) { + pr_err("%s: Cannot enable device %d-%d_%d\n", + __func__, pdev->bus->number, PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn)); + return -ENODEV; + } + pci_set_master(pdev); + + pci_read_config_dword(pdev, 0x40, &val); + if ((val & 0x0000ff00) != 0) + pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); + + hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); + if (!hw) { + pr_err("%s: ieee80211_alloc_hw failed\n", __func__); + return -ENOMEM; + } + + SET_IEEE80211_DEV(hw, &pdev->dev); + + pci_set_drvdata(pdev, hw); + + memset(hw->priv, 0, sizeof(*wl)); + + wl = brcms_attach(pdev->vendor, pdev->device, + pci_resource_start(pdev, 0), PCI_BUS, pdev, + pdev->irq); + + if (!wl) { + pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, + __func__); + return -ENODEV; + } + return 0; +} + +static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + wiphy_err(wl->wiphy, + "brcms_suspend: pci_get_drvdata failed\n"); + return -ENODEV; + } + + /* only need to flag hw is down for proper resume */ + LOCK(wl); + wl->pub->hw_up = false; + UNLOCK(wl); + + pci_save_state(pdev); + pci_disable_device(pdev); + return pci_set_power_state(pdev, PCI_D3hot); +} + +static int brcms_resume(struct pci_dev *pdev) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + int err = 0; + u32 val; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + wiphy_err(wl->wiphy, + "wl: brcms_resume: pci_get_drvdata failed\n"); + return -ENODEV; + } + + err = pci_set_power_state(pdev, PCI_D0); + if (err) + return err; + + pci_restore_state(pdev); + + err = pci_enable_device(pdev); + if (err) + return err; + + pci_set_master(pdev); + + pci_read_config_dword(pdev, 0x40, &val); + if ((val & 0x0000ff00) != 0) + pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); + + /* + * done. driver will be put in up state + * in brcms_ops_add_interface() call. + */ + return err; +} + +/* +* called from both kernel as from this kernel module. +* precondition: perimeter lock is not acquired. +*/ +static void brcms_remove(struct pci_dev *pdev) +{ + struct brcms_info *wl; + struct ieee80211_hw *hw; + int status; + + hw = pci_get_drvdata(pdev); + wl = HW_TO_WL(hw); + if (!wl) { + pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); + return; + } + + LOCK(wl); + status = wlc_chipmatch(pdev->vendor, pdev->device); + UNLOCK(wl); + if (!status) { + wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch " + "failed\n"); + return; + } + if (wl->wlc) { + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); + wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); + ieee80211_unregister_hw(hw); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); + } + pci_disable_device(pdev); + + brcms_free(wl); + + pci_set_drvdata(pdev, NULL); + ieee80211_free_hw(hw); +} + +static struct pci_driver brcms_pci_driver = { + .name = KBUILD_MODNAME, + .probe = brcms_pci_probe, + .suspend = brcms_suspend, + .resume = brcms_resume, + .remove = __devexit_p(brcms_remove), + .id_table = brcms_pci_id_table, +}; + +/** + * This is the main entry point for the WL driver. + * + * This function determines if a device pointed to by pdev is a WL device, + * and if so, performs a brcms_attach() on it. + * + */ +static int __init brcms_module_init(void) +{ + int error = -ENODEV; + +#ifdef BCMDBG + if (msglevel != 0xdeadbeef) + brcm_msg_level = msglevel; + if (phymsglevel != 0xdeadbeef) + phyhal_msg_level = phymsglevel; +#endif /* BCMDBG */ + + error = pci_register_driver(&brcms_pci_driver); + if (!error) + return 0; + + + + return error; +} + +/** + * This function unloads the WL driver from the system. + * + * This function unconditionally unloads the WL driver module from the + * system. + * + */ +static void __exit brcms_module_exit(void) +{ + pci_unregister_driver(&brcms_pci_driver); + +} + +module_init(brcms_module_init); +module_exit(brcms_module_exit); + +/** + * This function frees the WL per-device resources. + * + * This function frees resources owned by the WL device pointed to + * by the wl parameter. + * + * precondition: can both be called locked and unlocked + * + */ +static void brcms_free(struct brcms_info *wl) +{ + struct brcms_timer *t, *next; + + /* free ucode data */ + if (wl->fw.fw_cnt) + brcms_ucode_data_free(); + if (wl->irq) + free_irq(wl->irq, wl); + + /* kill dpc */ + tasklet_kill(&wl->tasklet); + + if (wl->pub) { + wlc_module_unregister(wl->pub, "linux", wl); + } + + /* free common resources */ + if (wl->wlc) { + wlc_detach(wl->wlc); + wl->wlc = NULL; + wl->pub = NULL; + } + + /* virtual interface deletion is deferred so we cannot spinwait */ + + /* wait for all pending callbacks to complete */ + while (atomic_read(&wl->callbacks) > 0) + schedule(); + + /* free timers */ + for (t = wl->timers; t; t = next) { + next = t->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + } + + /* + * unregister_netdev() calls get_stats() which may read chip registers + * so we cannot unmap the chip registers until after calling unregister_netdev() . + */ + if (wl->regsva && wl->bcm_bustype != SDIO_BUS && + wl->bcm_bustype != JTAG_BUS) { + iounmap((void *)wl->regsva); + } + wl->regsva = NULL; +} + +/* flags the given rate in rateset as requested */ +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) +{ + u32 i; + + for (i = 0; i < rs->count; i++) { + if (rate != (rs->rates[i] & 0x7f)) + continue; + + if (is_br) + rs->rates[i] |= WLC_RATE_FLAG; + else + rs->rates[i] &= WLC_RATE_MASK; + return; + } +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio) +{ + wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_init(struct brcms_info *wl) +{ + BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); + brcms_reset(wl); + + wlc_init(wl->wlc); +} + +/* + * precondition: perimeter lock has been acquired + */ +uint brcms_reset(struct brcms_info *wl) +{ + BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); + wlc_reset(wl->wlc); + + /* dpc will not be rescheduled */ + wl->resched = 0; + + return 0; +} + +/* + * These are interrupt on/off entry points. Disable interrupts + * during interrupt state transition. + */ +void brcms_intrson(struct brcms_info *wl) +{ + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrson(wl->wlc); + INT_UNLOCK(wl, flags); +} + +/* + * precondition: perimeter lock has been acquired + */ +bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) +{ + return true; +} + +u32 brcms_intrsoff(struct brcms_info *wl) +{ + unsigned long flags; + u32 status; + + INT_LOCK(wl, flags); + status = wlc_intrsoff(wl->wlc); + INT_UNLOCK(wl, flags); + return status; +} + +void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) +{ + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrsrestore(wl->wlc, macintmask); + INT_UNLOCK(wl, flags); +} + +/* + * precondition: perimeter lock has been acquired + */ +int brcms_up(struct brcms_info *wl) +{ + int error = 0; + + if (wl->pub->up) + return 0; + + error = wlc_up(wl->wlc); + + return error; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_down(struct brcms_info *wl) +{ + uint callbacks, ret_val = 0; + + /* call common down function */ + ret_val = wlc_down(wl->wlc); + callbacks = atomic_read(&wl->callbacks) - ret_val; + + /* wait for down callbacks to complete */ + UNLOCK(wl); + + /* For HIGH_only driver, it's important to actually schedule other work, + * not just spin wait since everything runs at schedule level + */ + SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); + + LOCK(wl); +} + +static irqreturn_t brcms_isr(int irq, void *dev_id) +{ + struct brcms_info *wl; + bool ours, wantdpc; + unsigned long flags; + + wl = (struct brcms_info *) dev_id; + + ISR_LOCK(wl, flags); + + /* call common first level interrupt handler */ + ours = wlc_isr(wl->wlc, &wantdpc); + if (ours) { + /* if more to do... */ + if (wantdpc) { + + /* ...and call the second level interrupt handler */ + /* schedule dpc */ + tasklet_schedule(&wl->tasklet); + } + } + + ISR_UNLOCK(wl, flags); + + return IRQ_RETVAL(ours); +} + +static void brcms_dpc(unsigned long data) +{ + struct brcms_info *wl; + + wl = (struct brcms_info *) data; + + LOCK(wl); + + /* call the common second level interrupt handler */ + if (wl->pub->up) { + if (wl->resched) { + unsigned long flags; + + INT_LOCK(wl, flags); + wlc_intrsupd(wl->wlc); + INT_UNLOCK(wl, flags); + } + + wl->resched = wlc_dpc(wl->wlc, true); + } + + /* wlc_dpc() may bring the driver down */ + if (!wl->pub->up) + goto done; + + /* re-schedule dpc */ + if (wl->resched) + tasklet_schedule(&wl->tasklet); + else { + /* re-enable interrupts */ + brcms_intrson(wl); + } + + done: + UNLOCK(wl); +} + +/* + * is called by the kernel from software irq context + */ +static void brcms_timer(unsigned long data) +{ + _brcms_timer((struct brcms_timer *) data); +} + +/* +* precondition: perimeter lock is not acquired + */ +static void _brcms_timer(struct brcms_timer *t) +{ + LOCK(t->wl); + + if (t->set) { + if (t->periodic) { + t->timer.expires = jiffies + t->ms * HZ / 1000; + atomic_inc(&t->wl->callbacks); + add_timer(&t->timer); + t->set = true; + } else + t->set = false; + + t->fn(t->arg); + } + + atomic_dec(&t->wl->callbacks); + + UNLOCK(t->wl); +} + +/* + * Adds a timer to the list. Caller supplies a timer function. + * Is called from wlc. + * + * precondition: perimeter lock has been acquired + */ +struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), + void *arg, const char *name) +{ + struct brcms_timer *t; + + t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); + if (!t) { + wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", + wl->pub->unit); + return 0; + } + + init_timer(&t->timer); + t->timer.data = (unsigned long) t; + t->timer.function = brcms_timer; + t->wl = wl; + t->fn = fn; + t->arg = arg; + t->next = wl->timers; + wl->timers = t; + +#ifdef BCMDBG + t->name = kmalloc(strlen(name) + 1, GFP_ATOMIC); + if (t->name) + strcpy(t->name, name); +#endif + + return t; +} + +/* BMAC_NOTE: Add timer adds only the kernel timer since it's going to be more accurate + * as well as it's easier to make it periodic + * + * precondition: perimeter lock has been acquired + */ +void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, + int periodic) +{ +#ifdef BCMDBG + if (t->set) { + wiphy_err(wl->wiphy, "%s: Already set. Name: %s, per %d\n", + __func__, t->name, periodic); + } +#endif + t->ms = ms; + t->periodic = (bool) periodic; + t->set = true; + t->timer.expires = jiffies + ms * HZ / 1000; + + atomic_inc(&wl->callbacks); + add_timer(&t->timer); +} + +/* + * return true if timer successfully deleted, false if still pending + * + * precondition: perimeter lock has been acquired + */ +bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) +{ + if (t->set) { + t->set = false; + if (!del_timer(&t->timer)) { + return false; + } + atomic_dec(&wl->callbacks); + } + + return true; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) +{ + struct brcms_timer *tmp; + + /* delete the timer in case it is active */ + brcms_del_timer(wl, t); + + if (wl->timers == t) { + wl->timers = wl->timers->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + return; + + } + + tmp = wl->timers; + while (tmp) { + if (tmp->next == t) { + tmp->next = t->next; +#ifdef BCMDBG + kfree(t->name); +#endif + kfree(t); + return; + } + tmp = tmp->next; + } + +} + +/* + * runs in software irq context + * + * precondition: perimeter lock is not acquired + */ +static int wl_linux_watchdog(void *ctx) +{ + return 0; +} + +struct firmware_hdr { + u32 offset; + u32 len; + u32 idx; +}; + +char *brcms_firmwares[MAX_FW_IMAGES] = { + "brcm/bcm43xx", + NULL +}; + +/* + * precondition: perimeter lock has been acquired + */ +int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) +{ + int i, entry; + const u8 *pdata; + struct firmware_hdr *hdr; + for (i = 0; i < wl->fw.fw_cnt; i++) { + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i]; + entry++, hdr++) { + if (hdr->idx == idx) { + pdata = wl->fw.fw_bin[i]->data + hdr->offset; + *pbuf = kmalloc(hdr->len, GFP_ATOMIC); + if (*pbuf == NULL) { + wiphy_err(wl->wiphy, "fail to alloc %d" + " bytes\n", hdr->len); + goto fail; + } + memcpy(*pbuf, pdata, hdr->len); + return 0; + } + } + } + wiphy_err(wl->wiphy, "ERROR: ucode buf tag:%d can not be found!\n", + idx); + *pbuf = NULL; +fail: + return -ENODATA; +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) +{ + int i, entry; + const u8 *pdata; + struct firmware_hdr *hdr; + for (i = 0; i < wl->fw.fw_cnt; i++) { + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i]; + entry++, hdr++) { + if (hdr->idx == idx) { + pdata = wl->fw.fw_bin[i]->data + hdr->offset; + if (hdr->len != 4) { + wiphy_err(wl->wiphy, + "ERROR: fw hdr len\n"); + return -ENOMSG; + } + *data = *((u32 *) pdata); + return 0; + } + } + } + wiphy_err(wl->wiphy, "ERROR: ucode tag:%d can not be found!\n", idx); + return -ENOMSG; +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) +{ + int status; + struct device *device = &pdev->dev; + char fw_name[100]; + int i; + + memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); + for (i = 0; i < MAX_FW_IMAGES; i++) { + if (brcms_firmwares[i] == NULL) + break; + sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], + UCODE_LOADER_API_VER); + status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); + if (status) { + wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", + KBUILD_MODNAME, fw_name); + return status; + } + sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], + UCODE_LOADER_API_VER); + status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); + if (status) { + wiphy_err(wl->wiphy, "%s: fail to load firmware %s\n", + KBUILD_MODNAME, fw_name); + return status; + } + wl->fw.hdr_num_entries[i] = + wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); + } + wl->fw.fw_cnt = i; + return brcms_ucode_data_init(wl); +} + +/* + * precondition: can both be called locked and unlocked + */ +void brcms_ucode_free_buf(void *p) +{ + kfree(p); +} + +/* + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +static void brcms_release_fw(struct brcms_info *wl) +{ + int i; + for (i = 0; i < MAX_FW_IMAGES; i++) { + release_firmware(wl->fw.fw_bin[i]); + release_firmware(wl->fw.fw_hdr[i]); + } +} + + +/* + * checks validity of all firmware images loaded from user space + * + * Precondition: Since this function is called in brcms_pci_probe() context, + * no locking is required. + */ +int brcms_check_firmwares(struct brcms_info *wl) +{ + int i; + int entry; + int rc = 0; + const struct firmware *fw; + const struct firmware *fw_hdr; + struct firmware_hdr *ucode_hdr; + for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { + fw = wl->fw.fw_bin[i]; + fw_hdr = wl->fw.fw_hdr[i]; + if (fw == NULL && fw_hdr == NULL) { + break; + } else if (fw == NULL || fw_hdr == NULL) { + wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", + __func__); + rc = -EBADF; + } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { + wiphy_err(wl->wiphy, "%s: non integral fw hdr file " + "size %zu/%zu\n", __func__, fw_hdr->size, + sizeof(struct firmware_hdr)); + rc = -EBADF; + } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { + wiphy_err(wl->wiphy, "%s: out of bounds fw file size " + "%zu\n", __func__, fw->size); + rc = -EBADF; + } else { + /* check if ucode section overruns firmware image */ + ucode_hdr = (struct firmware_hdr *)fw_hdr->data; + for (entry = 0; entry < wl->fw.hdr_num_entries[i] && + !rc; entry++, ucode_hdr++) { + if (ucode_hdr->offset + ucode_hdr->len > + fw->size) { + wiphy_err(wl->wiphy, + "%s: conflicting bin/hdr\n", + __func__); + rc = -EBADF; + } + } + } + } + if (rc == 0 && wl->fw.fw_cnt != i) { + wiphy_err(wl->wiphy, "%s: invalid fw_cnt=%d\n", __func__, + wl->fw.fw_cnt); + rc = -EBADF; + } + return rc; +} + +/* + * precondition: perimeter lock has been acquired + */ +bool brcms_rfkill_set_hw_state(struct brcms_info *wl) +{ + bool blocked = wlc_check_radio_disabled(wl->wlc); + + UNLOCK(wl); + wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); + if (blocked) + wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); + LOCK(wl); + return blocked; +} + +/* + * precondition: perimeter lock has been acquired + */ +void brcms_msleep(struct brcms_info *wl, uint ms) +{ + UNLOCK(wl); + msleep(ms); + LOCK(wl); +} diff --git a/drivers/staging/brcm80211/brcmsmac/mac80211_if.h b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h new file mode 100644 index 0000000..c56707a --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_MAC80211_IF_H_ +#define _BRCM_MAC80211_IF_H_ + +/* softmac ioctl definitions */ +#define WLC_SET_SHORTSLOT_OVERRIDE 146 + + +/* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and + * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be + * submitted to workqueue instead of being on kernel timer + */ +struct brcms_timer { + struct timer_list timer; + struct brcms_info *wl; + void (*fn) (void *); + void *arg; /* argument to fn */ + uint ms; + bool periodic; + bool set; + struct brcms_timer *next; +#ifdef BCMDBG + char *name; /* Description of the timer */ +#endif +}; + +struct brcms_if { + uint subunit; /* WDS/BSS unit */ + struct pci_dev *pci_dev; +}; + +#define MAX_FW_IMAGES 4 +struct brcms_firmware { + u32 fw_cnt; + const struct firmware *fw_bin[MAX_FW_IMAGES]; + const struct firmware *fw_hdr[MAX_FW_IMAGES]; + u32 hdr_num_entries[MAX_FW_IMAGES]; +}; + +struct brcms_info { + struct wlc_pub *pub; /* pointer to public wlc state */ + void *wlc; /* pointer to private common os-independent data */ + u32 magic; + + int irq; + + spinlock_t lock; /* per-device perimeter lock */ + spinlock_t isr_lock; /* per-device ISR synchronization lock */ + + /* bus type and regsva for unmap in brcms_free() */ + uint bcm_bustype; /* bus type */ + void *regsva; /* opaque chip registers virtual address */ + + /* timer related fields */ + atomic_t callbacks; /* # outstanding callback functions */ + struct brcms_timer *timers; /* timer cleanup queue */ + + struct tasklet_struct tasklet; /* dpc tasklet */ + bool resched; /* dpc needs to be and is rescheduled */ +#ifdef LINUXSTA_PS + u32 pci_psstate[16]; /* pci ps-state save/restore */ +#endif + struct brcms_firmware fw; + struct wiphy *wiphy; +}; + +/* misc callbacks */ +struct brcms_info; +struct brcms_if; +struct wlc_if; +extern void brcms_init(struct brcms_info *wl); +extern uint brcms_reset(struct brcms_info *wl); +extern void brcms_intrson(struct brcms_info *wl); +extern u32 brcms_intrsoff(struct brcms_info *wl); +extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); +extern int brcms_up(struct brcms_info *wl); +extern void brcms_down(struct brcms_info *wl); +extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio); +extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); +extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); + +/* timer functions */ +struct brcms_timer; +extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), void *arg, + const char *name); +extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, + uint ms, int periodic); +extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_msleep(struct brcms_info *wl, uint ms); + +#endif /* _BRCM_MAC80211_IF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c new file mode 100644 index 0000000..759e68f --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -0,0 +1,6036 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include "dma.h" + +#include "pmu.h" +#include "d11.h" +#include "types.h" +#include "cfg.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "bsscfg.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "bottom_mac.h" +#include "phy_hal.h" +#include "antsel.h" +#include "stf.h" +#include "ampdu.h" +#include "alloc.h" +#include "mac80211_if.h" + +/* + * WPA(2) definitions + */ +#define RSN_CAP_4_REPLAY_CNTRS 2 +#define RSN_CAP_16_REPLAY_CNTRS 3 + +#define WPA_CAP_4_REPLAY_CNTRS RSN_CAP_4_REPLAY_CNTRS +#define WPA_CAP_16_REPLAY_CNTRS RSN_CAP_16_REPLAY_CNTRS + +/* + * Indication for txflowcontrol that all priority bits in + * TXQ_STOP_FOR_PRIOFC_MASK are to be considered. + */ +#define ALLPRIO -1 + +/* + * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. + */ +#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) + +#define TIMER_INTERVAL_WATCHDOG 1000 /* watchdog timer, in unit of ms */ +#define TIMER_INTERVAL_RADIOCHK 800 /* radio monitor timer, in unit of ms */ + +#ifndef WLC_MPC_MAX_DELAYCNT +#define WLC_MPC_MAX_DELAYCNT 10 /* Max MPC timeout, in unit of watchdog */ +#endif +#define WLC_MPC_MIN_DELAYCNT 1 /* Min MPC timeout, in unit of watchdog */ +#define WLC_MPC_THRESHOLD 3 /* MPC count threshold level */ + +#define BEACON_INTERVAL_DEFAULT 100 /* beacon interval, in unit of 1024TU */ +#define DTIM_INTERVAL_DEFAULT 3 /* DTIM interval, in unit of beacon interval */ + +/* Scale down delays to accommodate QT slow speed */ +#define BEACON_INTERVAL_DEF_QT 20 /* beacon interval, in unit of 1024TU */ +#define DTIM_INTERVAL_DEF_QT 1 /* DTIM interval, in unit of beacon interval */ + +#define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */ + +/* Software feature flag defines used by wlfeatureflag */ +#define WL_SWFL_NOHWRADIO 0x0004 +#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ +#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ + +/* n-mode support capability */ +/* 2x2 includes both 1x1 & 2x2 devices + * reserved #define 2 for future when we want to separate 1x1 & 2x2 and + * control it independently + */ +#define WL_11N_2x2 1 +#define WL_11N_3x3 3 +#define WL_11N_4x4 4 + +/* define 11n feature disable flags */ +#define WLFEATURE_DISABLE_11N 0x00000001 +#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 +#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 +#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 +#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 +#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 +#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 +#define WLFEATURE_DISABLE_11N_GF 0x00000080 + +#define EDCF_ACI_MASK 0x60 +#define EDCF_ACI_SHIFT 5 +#define EDCF_ECWMIN_MASK 0x0f +#define EDCF_ECWMAX_SHIFT 4 +#define EDCF_AIFSN_MASK 0x0f +#define EDCF_AIFSN_MAX 15 +#define EDCF_ECWMAX_MASK 0xf0 + +#define EDCF_AC_BE_TXOP_STA 0x0000 +#define EDCF_AC_BK_TXOP_STA 0x0000 +#define EDCF_AC_VO_ACI_STA 0x62 +#define EDCF_AC_VO_ECW_STA 0x32 +#define EDCF_AC_VI_ACI_STA 0x42 +#define EDCF_AC_VI_ECW_STA 0x43 +#define EDCF_AC_BK_ECW_STA 0xA4 +#define EDCF_AC_VI_TXOP_STA 0x005e +#define EDCF_AC_VO_TXOP_STA 0x002f +#define EDCF_AC_BE_ACI_STA 0x03 +#define EDCF_AC_BE_ECW_STA 0xA4 +#define EDCF_AC_BK_ACI_STA 0x27 +#define EDCF_AC_VO_TXOP_AP 0x002f + +#define EDCF_TXOP2USEC(txop) ((txop) << 5) +#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) + +#define APHY_SYMBOL_TIME 4 +#define APHY_PREAMBLE_TIME 16 +#define APHY_SIGNAL_TIME 4 +#define APHY_SIFS_TIME 16 +#define APHY_SERVICE_NBITS 16 +#define APHY_TAIL_NBITS 6 +#define BPHY_SIFS_TIME 10 +#define BPHY_PLCP_SHORT_TIME 96 + +#define PREN_PREAMBLE 24 +#define PREN_MM_EXT 12 +#define PREN_PREAMBLE_EXT 4 + +#define DOT11_MAC_HDR_LEN 24 +#define DOT11_ACK_LEN 10 +#define DOT11_BA_LEN 4 +#define DOT11_OFDM_SIGNAL_EXTENSION 6 +#define DOT11_MIN_FRAG_LEN 256 +#define DOT11_RTS_LEN 16 +#define DOT11_CTS_LEN 10 +#define DOT11_BA_BITMAP_LEN 128 +#define DOT11_MIN_BEACON_PERIOD 1 +#define DOT11_MAX_BEACON_PERIOD 0xFFFF +#define DOT11_MAXNUMFRAGS 16 +#define DOT11_MAX_FRAG_LEN 2346 + +#define BPHY_PLCP_TIME 192 +#define RIFS_11N_TIME 2 + +#define WME_VER 1 +#define WME_SUBTYPE_PARAM_IE 1 +#define WME_TYPE 2 +#define WME_OUI "\x00\x50\xf2" + +#define AC_BE 0 +#define AC_BK 1 +#define AC_VI 2 +#define AC_VO 3 + +/* + * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft + * watchdog) it is not a wall clock and won't increment when driver is in "down" state + * this low resolution driver tick can be used for maintenance tasks such as phy + * calibration and scb update + */ + +/* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */ +#define BCMCFID(wlc, fid) wlc_bmac_write_shm((wlc)->hw, M_BCMC_FID, (fid)) + +#define WLC_WAR16165(wlc) (wlc->pub->sih->bustype == PCI_BUS && \ + (!AP_ENAB(wlc->pub)) && (wlc->war16165)) + +/* debug/trace */ +uint brcm_msg_level = +#if defined(BCMDBG) + LOG_ERROR_VAL; +#else + 0; +#endif /* BCMDBG */ + +/* Find basic rate for a given rate */ +#define WLC_BASIC_RATE(wlc, rspec) (IS_MCS(rspec) ? \ + (wlc)->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK].leg_ofdm] : \ + (wlc)->band->basic_rate[rspec & RSPEC_RATE_MASK]) + +#define FRAMETYPE(r, mimoframe) (IS_MCS(r) ? mimoframe : (IS_CCK(r) ? FT_CCK : FT_OFDM)) + +#define RFDISABLE_DEFAULT 10000000 /* rfdisable delay timer 500 ms, runs of ALP clock */ + +#define WLC_TEMPSENSE_PERIOD 10 /* 10 second timeout */ + +#define SCAN_IN_PROGRESS(x) 0 + +#define EPI_VERSION_NUM 0x054b0b00 + +#ifdef BCMDBG +/* pointer to most recently allocated wl/wlc */ +static struct wlc_info *wlc_info_dbg = (struct wlc_info *) (NULL); +#endif + +const u8 prio2fifo[NUMPRIO] = { + TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ + TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ + TX_AC_BK_FIFO, /* 2 -- AC_BK Background */ + TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */ + TX_AC_VI_FIFO, /* 4 CL AC_VI Video */ + TX_AC_VI_FIFO, /* 5 VI AC_VI Video */ + TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */ + TX_AC_VO_FIFO /* 7 NC AC_VO Voice */ +}; + +/* precedences numbers for wlc queues. These are twice as may levels as + * 802.1D priorities. + * Odd numbers are used for HI priority traffic at same precedence levels + * These constants are used ONLY by wlc_prio2prec_map. Do not use them elsewhere. + */ +#define _WLC_PREC_NONE 0 /* None = - */ +#define _WLC_PREC_BK 2 /* BK - Background */ +#define _WLC_PREC_BE 4 /* BE - Best-effort */ +#define _WLC_PREC_EE 6 /* EE - Excellent-effort */ +#define _WLC_PREC_CL 8 /* CL - Controlled Load */ +#define _WLC_PREC_VI 10 /* Vi - Video */ +#define _WLC_PREC_VO 12 /* Vo - Voice */ +#define _WLC_PREC_NC 14 /* NC - Network Control */ + +/* 802.1D Priority to precedence queue mapping */ +const u8 wlc_prio2prec_map[] = { + _WLC_PREC_BE, /* 0 BE - Best-effort */ + _WLC_PREC_BK, /* 1 BK - Background */ + _WLC_PREC_NONE, /* 2 None = - */ + _WLC_PREC_EE, /* 3 EE - Excellent-effort */ + _WLC_PREC_CL, /* 4 CL - Controlled Load */ + _WLC_PREC_VI, /* 5 Vi - Video */ + _WLC_PREC_VO, /* 6 Vo - Voice */ + _WLC_PREC_NC, /* 7 NC - Network Control */ +}; + +/* Sanity check for tx_prec_map and fifo synchup + * Either there are some packets pending for the fifo, else if fifo is empty then + * all the corresponding precmap bits should be set + */ +#define WLC_TX_FIFO_CHECK(wlc, fifo) (TXPKTPENDGET((wlc), (fifo)) || \ + (TXPKTPENDGET((wlc), (fifo)) == 0 && \ + ((wlc)->tx_prec_map & (wlc)->fifo2prec_map[(fifo)]) == \ + (wlc)->fifo2prec_map[(fifo)])) + +/* TX FIFO number to WME/802.1E Access Category */ +const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; + +/* WME/802.1E Access Category to TX FIFO number */ +static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; + +static bool in_send_q = false; + +/* Shared memory location index for various AC params */ +#define wme_shmemacindex(ac) wme_ac2fifo[ac] + +#ifdef BCMDBG +static const char *fifo_names[] = { + "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; +#else +static const char fifo_names[6][0]; +#endif + +static const u8 acbitmap2maxprio[] = { + PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK, + PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, + PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, + PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO +}; + +/* currently the best mechanism for determining SIFS is the band in use */ +#define SIFS(band) ((band)->bandtype == WLC_BAND_5G ? APHY_SIFS_TIME : BPHY_SIFS_TIME); + +/* value for # replay counters currently supported */ +#define WLC_REPLAY_CNTRS_VALUE WPA_CAP_16_REPLAY_CNTRS + +/* local prototypes */ +static u16 wlc_d11hdrs_mac80211(struct wlc_info *wlc, + struct ieee80211_hw *hw, + struct sk_buff *p, + struct scb *scb, uint frag, + uint nfrags, uint queue, + uint next_frag_len, + wsec_key_t *key, + ratespec_t rspec_override); +static void wlc_bss_default_init(struct wlc_info *wlc); +static void wlc_ucode_mac_upd(struct wlc_info *wlc); +static ratespec_t mac80211_wlc_set_nrate(struct wlc_info *wlc, + struct wlcband *cur_band, u32 int_val); +static void wlc_tx_prec_map_init(struct wlc_info *wlc); +static void wlc_watchdog(void *arg); +static void wlc_watchdog_by_timer(void *arg); +static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); +static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg); +static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc); + +/* send and receive */ +static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc); +static void wlc_txq_free(struct wlc_info *wlc, + struct wlc_txq_info *qi); +static void wlc_txflowcontrol_signal(struct wlc_info *wlc, + struct wlc_txq_info *qi, + bool on, int prio); +static void wlc_txflowcontrol_reset(struct wlc_info *wlc); +static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rate, + uint length, u8 *plcp); +static void wlc_compute_ofdm_plcp(ratespec_t rate, uint length, u8 *plcp); +static void wlc_compute_mimo_plcp(ratespec_t rate, uint length, u8 *plcp); +static u16 wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, + u8 preamble_type, uint next_frag_len); +static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh); +static void wlc_recvctl(struct wlc_info *wlc, + d11rxhdr_t *rxh, struct sk_buff *p); +static uint wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t rate, + u8 preamble_type, uint dur); +static uint wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rate, + u8 preamble_type); +static uint wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rate, + u8 preamble_type); +/* interrupt, up/down, band */ +static void wlc_setband(struct wlc_info *wlc, uint bandunit); +static chanspec_t wlc_init_chanspec(struct wlc_info *wlc); +static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec); +static void wlc_bsinit(struct wlc_info *wlc); +static int wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, + bool writeToShm); +static void wlc_radio_hwdisable_upd(struct wlc_info *wlc); +static bool wlc_radio_monitor_start(struct wlc_info *wlc); +static void wlc_radio_timer(void *arg); +static void wlc_radio_enable(struct wlc_info *wlc); +static void wlc_radio_upd(struct wlc_info *wlc); + +/* scan, association, BSS */ +static uint wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rate, + u8 preamble_type); +static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap); +static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val); +static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val); +static void wlc_war16165(struct wlc_info *wlc, bool tx); + +static void wlc_wme_retries_write(struct wlc_info *wlc); +static bool wlc_attach_stf_ant_init(struct wlc_info *wlc); +static uint wlc_attach_module(struct wlc_info *wlc); +static void wlc_detach_module(struct wlc_info *wlc); +static void wlc_timers_deinit(struct wlc_info *wlc); +static void wlc_down_led_upd(struct wlc_info *wlc); +static uint wlc_down_del_timer(struct wlc_info *wlc); +static void wlc_ofdm_rateset_war(struct wlc_info *wlc); +static int _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, + struct wlc_if *wlcif); + +/* conditions under which the PM bit should be set in outgoing frames and STAY_AWAKE is meaningful + */ +bool wlc_ps_allowed(struct wlc_info *wlc) +{ + int idx; + struct wlc_bsscfg *cfg; + + /* disallow PS when one of the following global conditions meets */ + if (!wlc->pub->associated) + return false; + + /* disallow PS when one of these meets when not scanning */ + if (AP_ACTIVE(wlc) || wlc->monitor) + return false; + + FOREACH_AS_STA(wlc, idx, cfg) { + /* disallow PS when one of the following bsscfg specific conditions meets */ + if (!cfg->BSS || !WLC_PORTOPEN(cfg)) + return false; + + if (!cfg->dtim_programmed) + return false; + } + + return true; +} + +void wlc_reset(struct wlc_info *wlc) +{ + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + /* slurp up hw mac counters before core reset */ + wlc_statsupd(wlc); + + /* reset our snapshot of macstat counters */ + memset((char *)wlc->core->macstat_snapshot, 0, + sizeof(macstat_t)); + + wlc_bmac_reset(wlc->hw); +} + +void wlc_fatal_error(struct wlc_info *wlc) +{ + wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n", + wlc->pub->unit); + brcms_init(wlc->wl); +} + +/* Return the channel the driver should initialize during wlc_init. + * the channel may have to be changed from the currently configured channel + * if other configurations are in conflict (bandlocked, 11n mode disabled, + * invalid channel for current country, etc.) + */ +static chanspec_t wlc_init_chanspec(struct wlc_info *wlc) +{ + chanspec_t chanspec = + 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE | + WL_CHANSPEC_BAND_2G; + + return chanspec; +} + +struct scb global_scb; + +static void wlc_init_scb(struct wlc_info *wlc, struct scb *scb) +{ + int i; + scb->flags = SCB_WMECAP | SCB_HTCAP; + for (i = 0; i < NUMPRIO; i++) + scb->seqnum[i] = 0; +} + +void wlc_init(struct wlc_info *wlc) +{ + d11regs_t *regs; + chanspec_t chanspec; + int i; + struct wlc_bsscfg *bsscfg; + bool mute = false; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + regs = wlc->regs; + + /* This will happen if a big-hammer was executed. In that case, we want to go back + * to the channel that we were on and not new channel + */ + if (wlc->pub->associated) + chanspec = wlc->home_chanspec; + else + chanspec = wlc_init_chanspec(wlc); + + wlc_bmac_init(wlc->hw, chanspec, mute); + + /* update beacon listen interval */ + wlc_bcn_li_upd(wlc); + + /* the world is new again, so is our reported rate */ + wlc_reprate_init(wlc); + + /* write ethernet address to core */ + FOREACH_BSS(wlc, i, bsscfg) { + wlc_set_mac(bsscfg); + wlc_set_bssid(bsscfg); + } + + /* Update tsf_cfprep if associated and up */ + if (wlc->pub->associated) { + FOREACH_BSS(wlc, i, bsscfg) { + if (bsscfg->up) { + u32 bi; + + /* get beacon period and convert to uS */ + bi = bsscfg->current_bss->beacon_period << 10; + /* + * update since init path would reset + * to default value + */ + W_REG(®s->tsf_cfprep, + (bi << CFPREP_CBI_SHIFT)); + + /* Update maccontrol PM related bits */ + wlc_set_ps_ctrl(wlc); + + break; + } + } + } + + wlc_key_hw_init_all(wlc); + + wlc_bandinit_ordered(wlc, chanspec); + + wlc_init_scb(wlc, &global_scb); + + /* init probe response timeout */ + wlc_write_shm(wlc, M_PRS_MAXTIME, wlc->prb_resp_timeout); + + /* init max burst txop (framebursting) */ + wlc_write_shm(wlc, M_MBURST_TXOP, + (wlc-> + _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP)); + + /* initialize maximum allowed duty cycle */ + wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); + wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); + + /* Update some shared memory locations related to max AMPDU size allowed to received */ + wlc_ampdu_shm_upd(wlc->ampdu); + + /* band-specific inits */ + wlc_bsinit(wlc); + + /* Enable EDCF mode (while the MAC is suspended) */ + if (EDCF_ENAB(wlc->pub)) { + OR_REG(®s->ifs_ctl, IFS_USEEDCF); + wlc_edcf_setparams(wlc, false); + } + + /* Init precedence maps for empty FIFOs */ + wlc_tx_prec_map_init(wlc); + + /* read the ucode version if we have not yet done so */ + if (wlc->ucode_rev == 0) { + wlc->ucode_rev = + wlc_read_shm(wlc, M_BOM_REV_MAJOR) << NBITS(u16); + wlc->ucode_rev |= wlc_read_shm(wlc, M_BOM_REV_MINOR); + } + + /* ..now really unleash hell (allow the MAC out of suspend) */ + wlc_enable_mac(wlc); + + /* clear tx flow control */ + wlc_txflowcontrol_reset(wlc); + + /* clear tx data fifo suspends */ + wlc->tx_suspended = false; + + /* enable the RF Disable Delay timer */ + W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT); + + /* initialize mpc delay */ + wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; + + /* + * Initialize WME parameters; if they haven't been set by some other + * mechanism (IOVar, etc) then read them from the hardware. + */ + if (WLC_WME_RETRY_SHORT_GET(wlc, 0) == 0) { /* Uninitialized; read from HW */ + int ac; + + for (ac = 0; ac < AC_COUNT; ac++) { + wlc->wme_retries[ac] = + wlc_read_shm(wlc, M_AC_TXLMT_ADDR(ac)); + } + } +} + +void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc) +{ + wlc->bcnmisc_monitor = promisc; + wlc_mac_bcn_promisc(wlc); +} + +void wlc_mac_bcn_promisc(struct wlc_info *wlc) +{ + if ((AP_ENAB(wlc->pub) && (N_ENAB(wlc->pub) || wlc->band->gmode)) || + wlc->bcnmisc_ibss || wlc->bcnmisc_scan || wlc->bcnmisc_monitor) + wlc_mctrl(wlc, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC); + else + wlc_mctrl(wlc, MCTL_BCNS_PROMISC, 0); +} + +/* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */ +void wlc_mac_promisc(struct wlc_info *wlc) +{ + u32 promisc_bits = 0; + + /* promiscuous mode just sets MCTL_PROMISC + * Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit + * since all BSS data traffic is directed at the AP + */ + if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub)) + promisc_bits |= MCTL_PROMISC; + + /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL + * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is + * handled in wlc_mac_bcn_promisc() + */ + if (MONITOR_ENAB(wlc)) + promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL; + + wlc_mctrl(wlc, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits); +} + +/* push sw hps and wake state through hardware */ +void wlc_set_ps_ctrl(struct wlc_info *wlc) +{ + u32 v1, v2; + bool hps; + bool awake_before; + + hps = PS_ALLOWED(wlc); + + BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps); + + v1 = R_REG(&wlc->regs->maccontrol); + v2 = MCTL_WAKE; + if (hps) + v2 |= MCTL_HPS; + + wlc_mctrl(wlc, MCTL_WAKE | MCTL_HPS, v2); + + awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0)); + + if (!awake_before) + wlc_bmac_wait_for_wake(wlc->hw); + +} + +/* + * Write this BSS config's MAC address to core. + * Updates RXE match engine. + */ +int wlc_set_mac(struct wlc_bsscfg *cfg) +{ + int err = 0; + struct wlc_info *wlc = cfg->wlc; + + if (cfg == wlc->cfg) { + /* enter the MAC addr into the RXE match registers */ + wlc_set_addrmatch(wlc, RCM_MAC_OFFSET, cfg->cur_etheraddr); + } + + wlc_ampdu_macaddr_upd(wlc); + + return err; +} + +/* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl). + * Updates RXE match engine. + */ +void wlc_set_bssid(struct wlc_bsscfg *cfg) +{ + struct wlc_info *wlc = cfg->wlc; + + /* if primary config, we need to update BSSID in RXE match registers */ + if (cfg == wlc->cfg) { + wlc_set_addrmatch(wlc, RCM_BSSID_OFFSET, cfg->BSSID); + } +#ifdef SUPPORT_HWKEYS + else if (BSSCFG_STA(cfg) && cfg->BSS) { + wlc_rcmta_add_bssid(wlc, cfg); + } +#endif +} + +/* + * Suspend the the MAC and update the slot timing + * for standard 11b/g (20us slots) or shortslot 11g (9us slots). + */ +void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot) +{ + int idx; + struct wlc_bsscfg *cfg; + + /* use the override if it is set */ + if (wlc->shortslot_override != WLC_SHORTSLOT_AUTO) + shortslot = (wlc->shortslot_override == WLC_SHORTSLOT_ON); + + if (wlc->shortslot == shortslot) + return; + + wlc->shortslot = shortslot; + + /* update the capability based on current shortslot mode */ + FOREACH_BSS(wlc, idx, cfg) { + if (!cfg->associated) + continue; + cfg->current_bss->capability &= + ~WLAN_CAPABILITY_SHORT_SLOT_TIME; + if (wlc->shortslot) + cfg->current_bss->capability |= + WLAN_CAPABILITY_SHORT_SLOT_TIME; + } + + wlc_bmac_set_shortslot(wlc->hw, shortslot); +} + +static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc) +{ + u8 local; + s16 local_max; + + local = WLC_TXPWR_MAX; + if (wlc->pub->associated && + (brcmu_chspec_ctlchan(wlc->chanspec) == + brcmu_chspec_ctlchan(wlc->home_chanspec))) { + + /* get the local power constraint if we are on the AP's + * channel [802.11h, 7.3.2.13] + */ + /* Clamp the value between 0 and WLC_TXPWR_MAX w/o overflowing the target */ + local_max = + (wlc->txpwr_local_max - + wlc->txpwr_local_constraint) * WLC_TXPWR_DB_FACTOR; + if (local_max > 0 && local_max < WLC_TXPWR_MAX) + return (u8) local_max; + if (local_max < 0) + return 0; + } + + return local; +} + +/* propagate home chanspec to all bsscfgs in case bsscfg->current_bss->chanspec is referenced */ +void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +{ + if (wlc->home_chanspec != chanspec) { + int idx; + struct wlc_bsscfg *cfg; + + wlc->home_chanspec = chanspec; + + FOREACH_BSS(wlc, idx, cfg) { + if (!cfg->associated) + continue; + + cfg->current_bss->chanspec = chanspec; + } + + } +} + +static void wlc_set_phy_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +{ + /* Save our copy of the chanspec */ + wlc->chanspec = chanspec; + + /* Set the chanspec and power limits for this locale after computing + * any 11h local tx power constraints. + */ + wlc_channel_set_chanspec(wlc->cmi, chanspec, + wlc_local_constraint_qdbm(wlc)); + + if (wlc->stf->ss_algosel_auto) + wlc_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel, + chanspec); + + wlc_stf_ss_update(wlc, wlc->band); + +} + +void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +{ + uint bandunit; + bool switchband = false; + chanspec_t old_chanspec = wlc->chanspec; + + if (!wlc_valid_chanspec_db(wlc->cmi, chanspec)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n", + wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec)); + return; + } + + /* Switch bands if necessary */ + if (NBANDS(wlc) > 1) { + bandunit = CHSPEC_WLCBANDUNIT(chanspec); + if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) { + switchband = true; + if (wlc->bandlocked) { + wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d " + "band is locked!\n", + wlc->pub->unit, __func__, + CHSPEC_CHANNEL(chanspec)); + return; + } + /* BMAC_NOTE: should the setband call come after the wlc_bmac_chanspec() ? + * if the setband updates (wlc_bsinit) use low level calls to inspect and + * set state, the state inspected may be from the wrong band, or the + * following wlc_bmac_set_chanspec() may undo the work. + */ + wlc_setband(wlc, bandunit); + } + } + + /* sync up phy/radio chanspec */ + wlc_set_phy_chanspec(wlc, chanspec); + + /* init antenna selection */ + if (CHSPEC_WLC_BW(old_chanspec) != CHSPEC_WLC_BW(chanspec)) { + wlc_antsel_init(wlc->asi); + + /* Fix the hardware rateset based on bw. + * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz + */ + wlc_rateset_bw_mcs_filter(&wlc->band->hw_rateset, + wlc->band-> + mimo_cap_40 ? CHSPEC_WLC_BW(chanspec) + : 0); + } + + /* update some mac configuration since chanspec changed */ + wlc_ucode_mac_upd(wlc); +} + +ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) +{ + ratespec_t lowest_basic_rspec; + uint i; + + /* Use the lowest basic rate */ + lowest_basic_rspec = rs->rates[0] & WLC_RATE_MASK; + for (i = 0; i < rs->count; i++) { + if (rs->rates[i] & WLC_RATE_FLAG) { + lowest_basic_rspec = rs->rates[i] & WLC_RATE_MASK; + break; + } + } +#if NCONF + /* pick siso/cdd as default for OFDM (note no basic rate MCSs are supported yet) */ + if (IS_OFDM(lowest_basic_rspec)) { + lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); + } +#endif + + return lowest_basic_rspec; +} + +/* This function changes the phytxctl for beacon based on current beacon ratespec AND txant + * setting as per this table: + * ratespec CCK ant = wlc->stf->txant + * OFDM ant = 3 + */ +void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, ratespec_t bcn_rspec) +{ + u16 phyctl; + u16 phytxant = wlc->stf->phytxant; + u16 mask = PHY_TXC_ANT_MASK; + + /* for non-siso rates or default setting, use the available chains */ + if (WLC_PHY_11N_CAP(wlc->band)) { + phytxant = wlc_stf_phytxchain_sel(wlc, bcn_rspec); + } + + phyctl = wlc_read_shm(wlc, M_BCN_PCTLWD); + phyctl = (phyctl & ~mask) | phytxant; + wlc_write_shm(wlc, M_BCN_PCTLWD, phyctl); +} + +/* centralized protection config change function to simplify debugging, no consistency checking + * this should be called only on changes to avoid overhead in periodic function +*/ +void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val) +{ + BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val); + + switch (idx) { + case WLC_PROT_G_SPEC: + wlc->protection->_g = (bool) val; + break; + case WLC_PROT_G_OVR: + wlc->protection->g_override = (s8) val; + break; + case WLC_PROT_G_USER: + wlc->protection->gmode_user = (u8) val; + break; + case WLC_PROT_OVERLAP: + wlc->protection->overlap = (s8) val; + break; + case WLC_PROT_N_USER: + wlc->protection->nmode_user = (s8) val; + break; + case WLC_PROT_N_CFG: + wlc->protection->n_cfg = (s8) val; + break; + case WLC_PROT_N_CFG_OVR: + wlc->protection->n_cfg_override = (s8) val; + break; + case WLC_PROT_N_NONGF: + wlc->protection->nongf = (bool) val; + break; + case WLC_PROT_N_NONGF_OVR: + wlc->protection->nongf_override = (s8) val; + break; + case WLC_PROT_N_PAM_OVR: + wlc->protection->n_pam_override = (s8) val; + break; + case WLC_PROT_N_OBSS: + wlc->protection->n_obss = (bool) val; + break; + + default: + break; + } + +} + +static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val) +{ + wlc->ht_cap.cap_info &= ~(IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_SGI_40); + wlc->ht_cap.cap_info |= (val & WLC_N_SGI_20) ? + IEEE80211_HT_CAP_SGI_20 : 0; + wlc->ht_cap.cap_info |= (val & WLC_N_SGI_40) ? + IEEE80211_HT_CAP_SGI_40 : 0; + + if (wlc->pub->up) { + wlc_update_beacon(wlc); + wlc_update_probe_resp(wlc, true); + } +} + +static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val) +{ + wlc->stf->ldpc = val; + + wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_LDPC_CODING; + if (wlc->stf->ldpc != OFF) + wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_LDPC_CODING; + + if (wlc->pub->up) { + wlc_update_beacon(wlc); + wlc_update_probe_resp(wlc, true); + wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false)); + } +} + +/* + * ucode, hwmac update + * Channel dependent updates for ucode and hw + */ +static void wlc_ucode_mac_upd(struct wlc_info *wlc) +{ + /* enable or disable any active IBSSs depending on whether or not + * we are on the home channel + */ + if (wlc->home_chanspec == WLC_BAND_PI_RADIO_CHANSPEC) { + if (wlc->pub->associated) { + /* BMAC_NOTE: This is something that should be fixed in ucode inits. + * I think that the ucode inits set up the bcn templates and shm values + * with a bogus beacon. This should not be done in the inits. If ucode needs + * to set up a beacon for testing, the test routines should write it down, + * not expect the inits to populate a bogus beacon. + */ + if (WLC_PHY_11N_CAP(wlc->band)) { + wlc_write_shm(wlc, M_BCN_TXTSF_OFFSET, + wlc->band->bcntsfoff); + } + } + } else { + /* disable an active IBSS if we are not on the home channel */ + } + + /* update the various promisc bits */ + wlc_mac_bcn_promisc(wlc); + wlc_mac_promisc(wlc); +} + +static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec) +{ + wlc_rateset_t default_rateset; + uint parkband; + uint i, band_order[2]; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + /* + * We might have been bandlocked during down and the chip power-cycled (hibernate). + * figure out the right band to park on + */ + if (wlc->bandlocked || NBANDS(wlc) == 1) { + parkband = wlc->band->bandunit; /* updated in wlc_bandlock() */ + band_order[0] = band_order[1] = parkband; + } else { + /* park on the band of the specified chanspec */ + parkband = CHSPEC_WLCBANDUNIT(chanspec); + + /* order so that parkband initialize last */ + band_order[0] = parkband ^ 1; + band_order[1] = parkband; + } + + /* make each band operational, software state init */ + for (i = 0; i < NBANDS(wlc); i++) { + uint j = band_order[i]; + + wlc->band = wlc->bandstate[j]; + + wlc_default_rateset(wlc, &default_rateset); + + /* fill in hw_rate */ + wlc_rateset_filter(&default_rateset, &wlc->band->hw_rateset, + false, WLC_RATES_CCK_OFDM, WLC_RATE_MASK, + (bool) N_ENAB(wlc->pub)); + + /* init basic rate lookup */ + wlc_rate_lookup_init(wlc, &default_rateset); + } + + /* sync up phy/radio chanspec */ + wlc_set_phy_chanspec(wlc, chanspec); +} + +/* band-specific init */ +static void WLBANDINITFN(wlc_bsinit) (struct wlc_info *wlc) +{ + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", + wlc->pub->unit, wlc->band->bandunit); + + /* write ucode ACK/CTS rate table */ + wlc_set_ratetable(wlc); + + /* update some band specific mac configuration */ + wlc_ucode_mac_upd(wlc); + + /* init antenna selection */ + wlc_antsel_init(wlc->asi); + +} + +/* switch to and initialize new band */ +static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit) +{ + int idx; + struct wlc_bsscfg *cfg; + + wlc->band = wlc->bandstate[bandunit]; + + if (!wlc->pub->up) + return; + + /* wait for at least one beacon before entering sleeping state */ + FOREACH_AS_STA(wlc, idx, cfg) + cfg->PMawakebcn = true; + wlc_set_ps_ctrl(wlc); + + /* band-specific initializations */ + wlc_bsinit(wlc); +} + +/* Initialize a WME Parameter Info Element with default STA parameters from WMM Spec, Table 12 */ +void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe) +{ + static const wme_param_ie_t stadef = { + WME_OUI, + WME_TYPE, + WME_SUBTYPE_PARAM_IE, + WME_VER, + 0, + 0, + { + {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, + cpu_to_le16(EDCF_AC_BE_TXOP_STA)}, + {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, + cpu_to_le16(EDCF_AC_BK_TXOP_STA)}, + {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, + cpu_to_le16(EDCF_AC_VI_TXOP_STA)}, + {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, + cpu_to_le16(EDCF_AC_VO_TXOP_STA)} + } + }; + memcpy(pe, &stadef, sizeof(*pe)); +} + +void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, + const struct ieee80211_tx_queue_params *params, + bool suspend) +{ + int i; + shm_acparams_t acp_shm; + u16 *shm_entry; + + /* Only apply params if the core is out of reset and has clocks */ + if (!wlc->clk) { + wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit, + __func__); + return; + } + + do { + memset((char *)&acp_shm, 0, sizeof(shm_acparams_t)); + /* fill in shm ac params struct */ + acp_shm.txop = le16_to_cpu(params->txop); + /* convert from units of 32us to us for ucode */ + wlc->edcf_txop[aci & 0x3] = acp_shm.txop = + EDCF_TXOP2USEC(acp_shm.txop); + acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK); + + if (aci == AC_VI && acp_shm.txop == 0 + && acp_shm.aifs < EDCF_AIFSN_MAX) + acp_shm.aifs++; + + if (acp_shm.aifs < EDCF_AIFSN_MIN + || acp_shm.aifs > EDCF_AIFSN_MAX) { + wiphy_err(wlc->wiphy, "wl%d: wlc_edcf_setparams: bad " + "aifs %d\n", wlc->pub->unit, acp_shm.aifs); + continue; + } + + acp_shm.cwmin = params->cw_min; + acp_shm.cwmax = params->cw_max; + acp_shm.cwcur = acp_shm.cwmin; + acp_shm.bslots = + R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur; + acp_shm.reggap = acp_shm.bslots + acp_shm.aifs; + /* Indicate the new params to the ucode */ + acp_shm.status = wlc_read_shm(wlc, (M_EDCF_QINFO + + wme_shmemacindex(aci) * + M_EDCF_QLEN + + M_EDCF_STATUS_OFF)); + acp_shm.status |= WME_STATUS_NEWAC; + + /* Fill in shm acparam table */ + shm_entry = (u16 *) &acp_shm; + for (i = 0; i < (int)sizeof(shm_acparams_t); i += 2) + wlc_write_shm(wlc, + M_EDCF_QINFO + + wme_shmemacindex(aci) * M_EDCF_QLEN + i, + *shm_entry++); + + } while (0); + + if (suspend) + wlc_suspend_mac_and_wait(wlc); + + if (suspend) + wlc_enable_mac(wlc); + +} + +void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) +{ + u16 aci; + int i_ac; + edcf_acparam_t *edcf_acp; + + struct ieee80211_tx_queue_params txq_pars; + struct ieee80211_tx_queue_params *params = &txq_pars; + + /* + * AP uses AC params from wme_param_ie_ap. + * AP advertises AC params from wme_param_ie. + * STA uses AC params from wme_param_ie. + */ + + edcf_acp = (edcf_acparam_t *) &wlc->wme_param_ie.acparam[0]; + + for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) { + /* find out which ac this set of params applies to */ + aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT; + + /* fill in shm ac params struct */ + params->txop = edcf_acp->TXOP; + params->aifs = edcf_acp->ACI; + + /* CWmin = 2^(ECWmin) - 1 */ + params->cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK); + /* CWmax = 2^(ECWmax) - 1 */ + params->cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK) + >> EDCF_ECWMAX_SHIFT); + wlc_wme_setparams(wlc, aci, params, suspend); + } + + if (suspend) + wlc_suspend_mac_and_wait(wlc); + + if (AP_ENAB(wlc->pub) && WME_ENAB(wlc->pub)) { + wlc_update_beacon(wlc); + wlc_update_probe_resp(wlc, false); + } + + if (suspend) + wlc_enable_mac(wlc); + +} + +bool wlc_timers_init(struct wlc_info *wlc, int unit) +{ + wlc->wdtimer = brcms_init_timer(wlc->wl, wlc_watchdog_by_timer, + wlc, "watchdog"); + if (!wlc->wdtimer) { + wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer " + "failed\n", unit); + goto fail; + } + + wlc->radio_timer = brcms_init_timer(wlc->wl, wlc_radio_timer, + wlc, "radio"); + if (!wlc->radio_timer) { + wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer " + "failed\n", unit); + goto fail; + } + + return true; + + fail: + return false; +} + +/* + * Initialize wlc_info default values ... + * may get overrides later in this function + */ +void wlc_info_init(struct wlc_info *wlc, int unit) +{ + int i; + /* Assume the device is there until proven otherwise */ + wlc->device_present = true; + + /* Save our copy of the chanspec */ + wlc->chanspec = CH20MHZ_CHSPEC(1); + + /* various 802.11g modes */ + wlc->shortslot = false; + wlc->shortslot_override = WLC_SHORTSLOT_AUTO; + + wlc_protection_upd(wlc, WLC_PROT_G_OVR, WLC_PROTECTION_AUTO); + wlc_protection_upd(wlc, WLC_PROT_G_SPEC, false); + + wlc_protection_upd(wlc, WLC_PROT_N_CFG_OVR, WLC_PROTECTION_AUTO); + wlc_protection_upd(wlc, WLC_PROT_N_CFG, WLC_N_PROTECTION_OFF); + wlc_protection_upd(wlc, WLC_PROT_N_NONGF_OVR, WLC_PROTECTION_AUTO); + wlc_protection_upd(wlc, WLC_PROT_N_NONGF, false); + wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, AUTO); + + wlc_protection_upd(wlc, WLC_PROT_OVERLAP, WLC_PROTECTION_CTL_OVERLAP); + + /* 802.11g draft 4.0 NonERP elt advertisement */ + wlc->include_legacy_erp = true; + + wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF; + wlc->stf->txant = ANT_TX_DEF; + + wlc->prb_resp_timeout = WLC_PRB_RESP_TIMEOUT; + + wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN; + for (i = 0; i < NFIFO; i++) + wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN; + wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN; + + /* default rate fallback retry limits */ + wlc->SFBL = RETRY_SHORT_FB; + wlc->LFBL = RETRY_LONG_FB; + + /* default mac retry limits */ + wlc->SRL = RETRY_SHORT_DEF; + wlc->LRL = RETRY_LONG_DEF; + + /* Set flag to indicate that hw keys should be used when available. */ + wlc->wsec_swkeys = false; + + /* init the 4 static WEP default keys */ + for (i = 0; i < WSEC_MAX_DEFAULT_KEYS; i++) { + wlc->wsec_keys[i] = wlc->wsec_def_keys[i]; + wlc->wsec_keys[i]->idx = (u8) i; + } + + /* WME QoS mode is Auto by default */ + wlc->pub->_wme = AUTO; + +#ifdef BCMSDIODEV_ENABLED + wlc->pub->_priofc = true; /* enable priority flow control for sdio dongle */ +#endif + + wlc->pub->_ampdu = AMPDU_AGG_HOST; + wlc->pub->bcmerror = 0; + wlc->pub->_coex = ON; + + /* initialize mpc delay */ + wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; +} + +static bool wlc_state_bmac_sync(struct wlc_info *wlc) +{ + wlc_bmac_state_t state_bmac; + + if (wlc_bmac_state_get(wlc->hw, &state_bmac) != 0) + return false; + + wlc->machwcap = state_bmac.machwcap; + wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, + (s8) state_bmac.preamble_ovr); + + return true; +} + +static uint wlc_attach_module(struct wlc_info *wlc) +{ + uint err = 0; + uint unit; + unit = wlc->pub->unit; + + wlc->asi = wlc_antsel_attach(wlc); + if (wlc->asi == NULL) { + wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_antsel_attach " + "failed\n", unit); + err = 44; + goto fail; + } + + wlc->ampdu = wlc_ampdu_attach(wlc); + if (wlc->ampdu == NULL) { + wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_ampdu_attach " + "failed\n", unit); + err = 50; + goto fail; + } + + if ((wlc_stf_attach(wlc) != 0)) { + wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_stf_attach " + "failed\n", unit); + err = 68; + goto fail; + } + fail: + return err; +} + +struct wlc_pub *wlc_pub(void *wlc) +{ + return ((struct wlc_info *) wlc)->pub; +} + +#define CHIP_SUPPORTS_11N(wlc) 1 + +/* + * The common driver entry routine. Error codes should be unique + */ +void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, + bool piomode, void *regsva, uint bustype, void *btparam, + uint *perr) +{ + struct wlc_info *wlc; + uint err = 0; + uint j; + struct wlc_pub *pub; + uint n_disabled; + + /* allocate struct wlc_info state and its substructures */ + wlc = (struct wlc_info *) wlc_attach_malloc(unit, &err, device); + if (wlc == NULL) + goto fail; + wlc->wiphy = wl->wiphy; + pub = wlc->pub; + +#if defined(BCMDBG) + wlc_info_dbg = wlc; +#endif + + wlc->band = wlc->bandstate[0]; + wlc->core = wlc->corestate; + wlc->wl = wl; + pub->unit = unit; + pub->_piomode = piomode; + wlc->bandinit_pending = false; + + /* populate struct wlc_info with default values */ + wlc_info_init(wlc, unit); + + /* update sta/ap related parameters */ + wlc_ap_upd(wlc); + + /* 11n_disable nvram */ + n_disabled = getintvar(pub->vars, "11n_disable"); + + /* + * low level attach steps(all hw accesses go + * inside, no more in rest of the attach) + */ + err = wlc_bmac_attach(wlc, vendor, device, unit, piomode, regsva, + bustype, btparam); + if (err) + goto fail; + + /* for some states, due to different info pointer(e,g, wlc, wlc_hw) or master/slave split, + * HIGH driver(both monolithic and HIGH_ONLY) needs to sync states FROM BMAC portion driver + */ + if (!wlc_state_bmac_sync(wlc)) { + err = 20; + goto fail; + } + + pub->phy_11ncapable = WLC_PHY_11N_CAP(wlc->band); + + /* propagate *vars* from BMAC driver to high driver */ + wlc_bmac_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size); + + + /* set maximum allowed duty cycle */ + wlc->tx_duty_cycle_ofdm = + (u16) getintvar(pub->vars, "tx_duty_cycle_ofdm"); + wlc->tx_duty_cycle_cck = + (u16) getintvar(pub->vars, "tx_duty_cycle_cck"); + + wlc_stf_phy_chain_calc(wlc); + + /* txchain 1: txant 0, txchain 2: txant 1 */ + if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) + wlc->stf->txant = wlc->stf->hw_txchain - 1; + + /* push to BMAC driver */ + wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain, + wlc->stf->hw_rxchain); + + /* pull up some info resulting from the low attach */ + { + int i; + for (i = 0; i < NFIFO; i++) + wlc->core->txavail[i] = wlc->hw->txavail[i]; + } + + wlc_bmac_hw_etheraddr(wlc->hw, wlc->perm_etheraddr); + + memcpy(&pub->cur_etheraddr, &wlc->perm_etheraddr, ETH_ALEN); + + for (j = 0; j < NBANDS(wlc); j++) { + /* Use band 1 for single band 11a */ + if (IS_SINGLEBAND_5G(wlc->deviceid)) + j = BAND_5G_INDEX; + + wlc->band = wlc->bandstate[j]; + + if (!wlc_attach_stf_ant_init(wlc)) { + err = 24; + goto fail; + } + + /* default contention windows size limits */ + wlc->band->CWmin = APHY_CWMIN; + wlc->band->CWmax = PHY_CWMAX; + + /* init gmode value */ + if (BAND_2G(wlc->band->bandtype)) { + wlc->band->gmode = GMODE_AUTO; + wlc_protection_upd(wlc, WLC_PROT_G_USER, + wlc->band->gmode); + } + + /* init _n_enab supported mode */ + if (WLC_PHY_11N_CAP(wlc->band) && CHIP_SUPPORTS_11N(wlc)) { + if (n_disabled & WLFEATURE_DISABLE_11N) { + pub->_n_enab = OFF; + wlc_protection_upd(wlc, WLC_PROT_N_USER, OFF); + } else { + pub->_n_enab = SUPPORT_11N; + wlc_protection_upd(wlc, WLC_PROT_N_USER, + ((pub->_n_enab == + SUPPORT_11N) ? WL_11N_2x2 : + WL_11N_3x3)); + } + } + + /* init per-band default rateset, depend on band->gmode */ + wlc_default_rateset(wlc, &wlc->band->defrateset); + + /* fill in hw_rateset (used early by WLC_SET_RATESET) */ + wlc_rateset_filter(&wlc->band->defrateset, + &wlc->band->hw_rateset, false, + WLC_RATES_CCK_OFDM, WLC_RATE_MASK, + (bool) N_ENAB(wlc->pub)); + } + + /* update antenna config due to wlc->stf->txant/txchain/ant_rx_ovr change */ + wlc_stf_phy_txant_upd(wlc); + + /* attach each modules */ + err = wlc_attach_module(wlc); + if (err != 0) + goto fail; + + if (!wlc_timers_init(wlc, unit)) { + wiphy_err(wl->wiphy, "wl%d: %s: wlc_init_timer failed\n", unit, + __func__); + err = 32; + goto fail; + } + + /* depend on rateset, gmode */ + wlc->cmi = wlc_channel_mgr_attach(wlc); + if (!wlc->cmi) { + wiphy_err(wl->wiphy, "wl%d: %s: wlc_channel_mgr_attach failed" + "\n", unit, __func__); + err = 33; + goto fail; + } + + /* init default when all parameters are ready, i.e. ->rateset */ + wlc_bss_default_init(wlc); + + /* + * Complete the wlc default state initializations.. + */ + + /* allocate our initial queue */ + wlc->pkt_queue = wlc_txq_alloc(wlc); + if (wlc->pkt_queue == NULL) { + wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n", + unit, __func__); + err = 100; + goto fail; + } + + wlc->bsscfg[0] = wlc->cfg; + wlc->cfg->_idx = 0; + wlc->cfg->wlc = wlc; + pub->txmaxpkts = MAXTXPKTS; + + wlc_wme_initparams_sta(wlc, &wlc->wme_param_ie); + + wlc->mimoft = FT_HT; + wlc->ht_cap.cap_info = HT_CAP; + if (HT_ENAB(wlc->pub)) + wlc->stf->ldpc = AUTO; + + wlc->mimo_40txbw = AUTO; + wlc->ofdm_40txbw = AUTO; + wlc->cck_40txbw = AUTO; + wlc_update_mimo_band_bwcap(wlc, WLC_N_BW_20IN2G_40IN5G); + + /* Set default values of SGI */ + if (WLC_SGI_CAP_PHY(wlc)) { + wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); + wlc->sgi_tx = AUTO; + } else if (WLCISSSLPNPHY(wlc->band)) { + wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); + wlc->sgi_tx = AUTO; + } else { + wlc_ht_update_sgi_rx(wlc, 0); + wlc->sgi_tx = OFF; + } + + /* *******nvram 11n config overrides Start ********* */ + + /* apply the sgi override from nvram conf */ + if (n_disabled & WLFEATURE_DISABLE_11N_SGI_TX) + wlc->sgi_tx = OFF; + + if (n_disabled & WLFEATURE_DISABLE_11N_SGI_RX) + wlc_ht_update_sgi_rx(wlc, 0); + + /* apply the stbc override from nvram conf */ + if (n_disabled & WLFEATURE_DISABLE_11N_STBC_TX) { + wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF; + wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; + wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; + } + if (n_disabled & WLFEATURE_DISABLE_11N_STBC_RX) + wlc_stf_stbc_rx_set(wlc, HT_CAP_RX_STBC_NO); + + /* apply the GF override from nvram conf */ + if (n_disabled & WLFEATURE_DISABLE_11N_GF) + wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_GRN_FLD; + + /* initialize radio_mpc_disable according to wlc->mpc */ + wlc_radio_mpc_upd(wlc); + + if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) { + if ((getintvar(wlc->pub->vars, "aa2g") == 7) || + (getintvar(wlc->pub->vars, "aa5g") == 7)) { + wlc_bmac_antsel_set(wlc->hw, 1); + } + } else { + wlc_bmac_antsel_set(wlc->hw, wlc->asi->antsel_avail); + } + + if (perr) + *perr = 0; + + return (void *)wlc; + + fail: + wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n", + unit, __func__, err); + if (wlc) + wlc_detach(wlc); + + if (perr) + *perr = err; + return NULL; +} + +static void wlc_attach_antgain_init(struct wlc_info *wlc) +{ + uint unit; + unit = wlc->pub->unit; + + if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) { + /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */ + wlc->band->antgain = 8; + } else if (wlc->band->antgain == -1) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" + " srom, using 2dB\n", unit, __func__); + wlc->band->antgain = 8; + } else { + s8 gain, fract; + /* Older sroms specified gain in whole dbm only. In order + * be able to specify qdbm granularity and remain backward compatible + * the whole dbms are now encoded in only low 6 bits and remaining qdbms + * are encoded in the hi 2 bits. 6 bit signed number ranges from + * -32 - 31. Examples: 0x1 = 1 db, + * 0xc1 = 1.75 db (1 + 3 quarters), + * 0x3f = -1 (-1 + 0 quarters), + * 0x7f = -.75 (-1 in low 6 bits + 1 quarters in hi 2 bits) = -3 qdbm. + * 0xbf = -.50 (-1 in low 6 bits + 2 quarters in hi 2 bits) = -2 qdbm. + */ + gain = wlc->band->antgain & 0x3f; + gain <<= 2; /* Sign extend */ + gain >>= 2; + fract = (wlc->band->antgain & 0xc0) >> 6; + wlc->band->antgain = 4 * gain + fract; + } +} + +static bool wlc_attach_stf_ant_init(struct wlc_info *wlc) +{ + int aa; + uint unit; + char *vars; + int bandtype; + + unit = wlc->pub->unit; + vars = wlc->pub->vars; + bandtype = wlc->band->bandtype; + + /* get antennas available */ + aa = (s8) getintvar(vars, (BAND_5G(bandtype) ? "aa5g" : "aa2g")); + if (aa == 0) + aa = (s8) getintvar(vars, + (BAND_5G(bandtype) ? "aa1" : "aa0")); + if ((aa < 1) || (aa > 15)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" + " srom (0x%x), using 3\n", unit, __func__, aa); + aa = 3; + } + + /* reset the defaults if we have a single antenna */ + if (aa == 1) { + wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0; + wlc->stf->txant = ANT_TX_FORCE_0; + } else if (aa == 2) { + wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1; + wlc->stf->txant = ANT_TX_FORCE_1; + } else { + } + + /* Compute Antenna Gain */ + wlc->band->antgain = + (s8) getintvar(vars, (BAND_5G(bandtype) ? "ag1" : "ag0")); + wlc_attach_antgain_init(wlc); + + return true; +} + + +static void wlc_timers_deinit(struct wlc_info *wlc) +{ + /* free timer state */ + if (wlc->wdtimer) { + brcms_free_timer(wlc->wl, wlc->wdtimer); + wlc->wdtimer = NULL; + } + if (wlc->radio_timer) { + brcms_free_timer(wlc->wl, wlc->radio_timer); + wlc->radio_timer = NULL; + } +} + +static void wlc_detach_module(struct wlc_info *wlc) +{ + if (wlc->asi) { + wlc_antsel_detach(wlc->asi); + wlc->asi = NULL; + } + + if (wlc->ampdu) { + wlc_ampdu_detach(wlc->ampdu); + wlc->ampdu = NULL; + } + + wlc_stf_detach(wlc); +} + +/* + * Return a count of the number of driver callbacks still pending. + * + * General policy is that wlc_detach can only dealloc/free software states. It can NOT + * touch hardware registers since the d11core may be in reset and clock may not be available. + * One exception is sb register access, which is possible if crystal is turned on + * After "down" state, driver should avoid software timer with the exception of radio_monitor. + */ +uint wlc_detach(struct wlc_info *wlc) +{ + uint callbacks = 0; + + if (wlc == NULL) + return 0; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + callbacks += wlc_bmac_detach(wlc); + + /* delete software timers */ + if (!wlc_radio_monitor_stop(wlc)) + callbacks++; + + wlc_channel_mgr_detach(wlc->cmi); + + wlc_timers_deinit(wlc); + + wlc_detach_module(wlc); + + + while (wlc->tx_queues != NULL) + wlc_txq_free(wlc, wlc->tx_queues); + + wlc_detach_mfree(wlc); + return callbacks; +} + +/* update state that depends on the current value of "ap" */ +void wlc_ap_upd(struct wlc_info *wlc) +{ + if (AP_ENAB(wlc->pub)) + wlc->PLCPHdr_override = WLC_PLCP_AUTO; /* AP: short not allowed, but not enforced */ + else + wlc->PLCPHdr_override = WLC_PLCP_SHORT; /* STA-BSS; short capable */ + + /* fixup mpc */ + wlc->mpc = true; +} + +/* read hwdisable state and propagate to wlc flag */ +static void wlc_radio_hwdisable_upd(struct wlc_info *wlc) +{ + if (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO || wlc->pub->hw_off) + return; + + if (wlc_bmac_radio_read_hwdisabled(wlc->hw)) { + mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); + } else { + mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); + } +} + +/* return true if Minimum Power Consumption should be entered, false otherwise */ +bool wlc_is_non_delay_mpc(struct wlc_info *wlc) +{ + return false; +} + +bool wlc_ismpc(struct wlc_info *wlc) +{ + return (wlc->mpc_delay_off == 0) && (wlc_is_non_delay_mpc(wlc)); +} + +void wlc_radio_mpc_upd(struct wlc_info *wlc) +{ + bool mpc_radio, radio_state; + + /* + * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled + * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio + * monitor also when WL_RADIO_MPC_DISABLE is the only reason that + * the radio is going down. + */ + if (!wlc->mpc) { + if (!wlc->pub->radio_disabled) + return; + mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); + wlc_radio_upd(wlc); + if (!wlc->pub->radio_disabled) + wlc_radio_monitor_stop(wlc); + return; + } + + /* + * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in wlc->pub->radio_disabled + * to go ON, always call radio_upd synchronously + * to go OFF, postpone radio_upd to later when context is safe(e.g. watchdog) + */ + radio_state = + (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF : + ON); + mpc_radio = (wlc_ismpc(wlc) == true) ? OFF : ON; + + if (radio_state == ON && mpc_radio == OFF) + wlc->mpc_delay_off = wlc->mpc_dlycnt; + else if (radio_state == OFF && mpc_radio == ON) { + mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); + wlc_radio_upd(wlc); + if (wlc->mpc_offcnt < WLC_MPC_THRESHOLD) { + wlc->mpc_dlycnt = WLC_MPC_MAX_DELAYCNT; + } else + wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; + wlc->mpc_dur += OSL_SYSUPTIME() - wlc->mpc_laston_ts; + } + /* Below logic is meant to capture the transition from mpc off to mpc on for reasons + * other than wlc->mpc_delay_off keeping the mpc off. In that case reset + * wlc->mpc_delay_off to wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off + */ + if ((wlc->prev_non_delay_mpc == false) && + (wlc_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) { + wlc->mpc_delay_off = wlc->mpc_dlycnt; + } + wlc->prev_non_delay_mpc = wlc_is_non_delay_mpc(wlc); +} + +/* + * centralized radio disable/enable function, + * invoke radio enable/disable after updating hwradio status + */ +static void wlc_radio_upd(struct wlc_info *wlc) +{ + if (wlc->pub->radio_disabled) { + wlc_radio_disable(wlc); + } else { + wlc_radio_enable(wlc); + } +} + +/* maintain LED behavior in down state */ +static void wlc_down_led_upd(struct wlc_info *wlc) +{ + /* maintain LEDs while in down state, turn on sbclk if not available yet */ + /* turn on sbclk if necessary */ + if (!AP_ENAB(wlc->pub)) { + wlc_pllreq(wlc, true, WLC_PLLREQ_FLIP); + + wlc_pllreq(wlc, false, WLC_PLLREQ_FLIP); + } +} + +/* update hwradio status and return it */ +bool wlc_check_radio_disabled(struct wlc_info *wlc) +{ + wlc_radio_hwdisable_upd(wlc); + + return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? true : false; +} + +void wlc_radio_disable(struct wlc_info *wlc) +{ + if (!wlc->pub->up) { + wlc_down_led_upd(wlc); + return; + } + + wlc_radio_monitor_start(wlc); + brcms_down(wlc->wl); +} + +static void wlc_radio_enable(struct wlc_info *wlc) +{ + if (wlc->pub->up) + return; + + if (DEVICEREMOVED(wlc)) + return; + + brcms_up(wlc->wl); +} + +/* periodical query hw radio button while driver is "down" */ +static void wlc_radio_timer(void *arg) +{ + struct wlc_info *wlc = (struct wlc_info *) arg; + + if (DEVICEREMOVED(wlc)) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, + __func__); + brcms_down(wlc->wl); + return; + } + + /* cap mpc off count */ + if (wlc->mpc_offcnt < WLC_MPC_MAX_DELAYCNT) + wlc->mpc_offcnt++; + + wlc_radio_hwdisable_upd(wlc); + wlc_radio_upd(wlc); +} + +static bool wlc_radio_monitor_start(struct wlc_info *wlc) +{ + /* Don't start the timer if HWRADIO feature is disabled */ + if (wlc->radio_monitor || (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO)) + return true; + + wlc->radio_monitor = true; + wlc_pllreq(wlc, true, WLC_PLLREQ_RADIO_MON); + brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, + true); + return true; +} + +bool wlc_radio_monitor_stop(struct wlc_info *wlc) +{ + if (!wlc->radio_monitor) + return true; + + wlc->radio_monitor = false; + wlc_pllreq(wlc, false, WLC_PLLREQ_RADIO_MON); + return brcms_del_timer(wlc->wl, wlc->radio_timer); +} + +static void wlc_watchdog_by_timer(void *arg) +{ + wlc_watchdog(arg); +} + +/* common watchdog code */ +static void wlc_watchdog(void *arg) +{ + struct wlc_info *wlc = (struct wlc_info *) arg; + int i; + struct wlc_bsscfg *cfg; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + if (!wlc->pub->up) + return; + + if (DEVICEREMOVED(wlc)) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, + __func__); + brcms_down(wlc->wl); + return; + } + + /* increment second count */ + wlc->pub->now++; + + /* delay radio disable */ + if (wlc->mpc_delay_off) { + if (--wlc->mpc_delay_off == 0) { + mboolset(wlc->pub->radio_disabled, + WL_RADIO_MPC_DISABLE); + if (wlc->mpc && wlc_ismpc(wlc)) + wlc->mpc_offcnt = 0; + wlc->mpc_laston_ts = OSL_SYSUPTIME(); + } + } + + /* mpc sync */ + wlc_radio_mpc_upd(wlc); + /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */ + wlc_radio_hwdisable_upd(wlc); + wlc_radio_upd(wlc); + /* if radio is disable, driver may be down, quit here */ + if (wlc->pub->radio_disabled) + return; + + wlc_bmac_watchdog(wlc); + + /* occasionally sample mac stat counters to detect 16-bit counter wrap */ + if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0) + wlc_statsupd(wlc); + + /* Manage TKIP countermeasures timers */ + FOREACH_BSS(wlc, i, cfg) { + if (cfg->tk_cm_dt) { + cfg->tk_cm_dt--; + } + if (cfg->tk_cm_bt) { + cfg->tk_cm_bt--; + } + } + + /* Call any registered watchdog handlers */ + for (i = 0; i < WLC_MAXMODULES; i++) { + if (wlc->modulecb[i].watchdog_fn) + wlc->modulecb[i].watchdog_fn(wlc->modulecb[i].hdl); + } + + if (WLCISNPHY(wlc->band) && !wlc->pub->tempsense_disable && + ((wlc->pub->now - wlc->tempsense_lasttime) >= + WLC_TEMPSENSE_PERIOD)) { + wlc->tempsense_lasttime = wlc->pub->now; + wlc_tempsense_upd(wlc); + } +} + +/* make interface operational */ +int wlc_up(struct wlc_info *wlc) +{ + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + /* HW is turned off so don't try to access it */ + if (wlc->pub->hw_off || DEVICEREMOVED(wlc)) + return -ENOMEDIUM; + + if (!wlc->pub->hw_up) { + wlc_bmac_hw_up(wlc->hw); + wlc->pub->hw_up = true; + } + + if ((wlc->pub->boardflags & BFL_FEM) + && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) { + if (wlc->pub->boardrev >= 0x1250 + && (wlc->pub->boardflags & BFL_FEM_BT)) { + wlc_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL, + MHF5_4313_GPIOCTRL, WLC_BAND_ALL); + } else { + wlc_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE, MHF4_EXTPA_ENABLE, + WLC_BAND_ALL); + } + } + + /* + * Need to read the hwradio status here to cover the case where the system + * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. + * if radio is disabled, abort up, lower power, start radio timer and return 0(for NDIS) + * don't call radio_update to avoid looping wlc_up. + * + * wlc_bmac_up_prep() returns either 0 or -BCME_RADIOOFF only + */ + if (!wlc->pub->radio_disabled) { + int status = wlc_bmac_up_prep(wlc->hw); + if (status == -ENOMEDIUM) { + if (!mboolisset + (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) { + int idx; + struct wlc_bsscfg *bsscfg; + mboolset(wlc->pub->radio_disabled, + WL_RADIO_HW_DISABLE); + + FOREACH_BSS(wlc, idx, bsscfg) { + if (!BSSCFG_STA(bsscfg) + || !bsscfg->enable || !bsscfg->BSS) + continue; + wiphy_err(wlc->wiphy, "wl%d.%d: wlc_up" + ": rfdisable -> " + "wlc_bsscfg_disable()\n", + wlc->pub->unit, idx); + } + } + } + } + + if (wlc->pub->radio_disabled) { + wlc_radio_monitor_start(wlc); + return 0; + } + + /* wlc_bmac_up_prep has done wlc_corereset(). so clk is on, set it */ + wlc->clk = true; + + wlc_radio_monitor_stop(wlc); + + /* Set EDCF hostflags */ + if (EDCF_ENAB(wlc->pub)) { + wlc_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, WLC_BAND_ALL); + } else { + wlc_mhf(wlc, MHF1, MHF1_EDCF, 0, WLC_BAND_ALL); + } + + if (WLC_WAR16165(wlc)) + wlc_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, + WLC_BAND_ALL); + + brcms_init(wlc->wl); + wlc->pub->up = true; + + if (wlc->bandinit_pending) { + wlc_suspend_mac_and_wait(wlc); + wlc_set_chanspec(wlc, wlc->default_bss->chanspec); + wlc->bandinit_pending = false; + wlc_enable_mac(wlc); + } + + wlc_bmac_up_finish(wlc->hw); + + /* other software states up after ISR is running */ + /* start APs that were to be brought up but are not up yet */ + /* if (AP_ENAB(wlc->pub)) wlc_restart_ap(wlc->ap); */ + + /* Program the TX wme params with the current settings */ + wlc_wme_retries_write(wlc); + + /* start one second watchdog timer */ + brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); + wlc->WDarmed = true; + + /* ensure antenna config is up to date */ + wlc_stf_phy_txant_upd(wlc); + /* ensure LDPC config is in sync */ + wlc_ht_update_ldpc(wlc, wlc->stf->ldpc); + + return 0; +} + +/* Initialize the base precedence map for dequeueing from txq based on WME settings */ +static void wlc_tx_prec_map_init(struct wlc_info *wlc) +{ + wlc->tx_prec_map = WLC_PREC_BMP_ALL; + memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16)); + + /* For non-WME, both fifos have overlapping MAXPRIO. So just disable all precedences + * if either is full. + */ + if (!EDCF_ENAB(wlc->pub)) { + wlc->fifo2prec_map[TX_DATA_FIFO] = WLC_PREC_BMP_ALL; + wlc->fifo2prec_map[TX_CTL_FIFO] = WLC_PREC_BMP_ALL; + } else { + wlc->fifo2prec_map[TX_AC_BK_FIFO] = WLC_PREC_BMP_AC_BK; + wlc->fifo2prec_map[TX_AC_BE_FIFO] = WLC_PREC_BMP_AC_BE; + wlc->fifo2prec_map[TX_AC_VI_FIFO] = WLC_PREC_BMP_AC_VI; + wlc->fifo2prec_map[TX_AC_VO_FIFO] = WLC_PREC_BMP_AC_VO; + } +} + +static uint wlc_down_del_timer(struct wlc_info *wlc) +{ + uint callbacks = 0; + + return callbacks; +} + +/* + * Mark the interface nonoperational, stop the software mechanisms, + * disable the hardware, free any transient buffer state. + * Return a count of the number of driver callbacks still pending. + */ +uint wlc_down(struct wlc_info *wlc) +{ + + uint callbacks = 0; + int i; + bool dev_gone = false; + struct wlc_txq_info *qi; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + /* check if we are already in the going down path */ + if (wlc->going_down) { + wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return" + "\n", wlc->pub->unit, __func__); + return 0; + } + if (!wlc->pub->up) + return callbacks; + + /* in between, mpc could try to bring down again.. */ + wlc->going_down = true; + + callbacks += wlc_bmac_down_prep(wlc->hw); + + dev_gone = DEVICEREMOVED(wlc); + + /* Call any registered down handlers */ + for (i = 0; i < WLC_MAXMODULES; i++) { + if (wlc->modulecb[i].down_fn) + callbacks += + wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl); + } + + /* cancel the watchdog timer */ + if (wlc->WDarmed) { + if (!brcms_del_timer(wlc->wl, wlc->wdtimer)) + callbacks++; + wlc->WDarmed = false; + } + /* cancel all other timers */ + callbacks += wlc_down_del_timer(wlc); + + wlc->pub->up = false; + + wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL); + + /* clear txq flow control */ + wlc_txflowcontrol_reset(wlc); + + /* flush tx queues */ + for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { + brcmu_pktq_flush(&qi->q, true, NULL, NULL); + } + + callbacks += wlc_bmac_down_finish(wlc->hw); + + /* wlc_bmac_down_finish has done wlc_coredisable(). so clk is off */ + wlc->clk = false; + + wlc->going_down = false; + return callbacks; +} + +/* Set the current gmode configuration */ +int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) +{ + int ret = 0; + uint i; + wlc_rateset_t rs; + /* Default to 54g Auto */ + s8 shortslot = WLC_SHORTSLOT_AUTO; /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ + bool shortslot_restrict = false; /* Restrict association to stations that support shortslot + */ + bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ + int preamble = WLC_PLCP_LONG; /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ + bool preamble_restrict = false; /* Restrict association to stations that support short + * preambles + */ + struct wlcband *band; + + /* if N-support is enabled, allow Gmode set as long as requested + * Gmode is not GMODE_LEGACY_B + */ + if (N_ENAB(wlc->pub) && gmode == GMODE_LEGACY_B) + return -ENOTSUPP; + + /* verify that we are dealing with 2G band and grab the band pointer */ + if (wlc->band->bandtype == WLC_BAND_2G) + band = wlc->band; + else if ((NBANDS(wlc) > 1) && + (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == WLC_BAND_2G)) + band = wlc->bandstate[OTHERBANDUNIT(wlc)]; + else + return -EINVAL; + + /* Legacy or bust when no OFDM is supported by regulatory */ + if ((wlc_channel_locale_flags_in_band(wlc->cmi, band->bandunit) & + WLC_NO_OFDM) && (gmode != GMODE_LEGACY_B)) + return -EINVAL; + + /* update configuration value */ + if (config == true) + wlc_protection_upd(wlc, WLC_PROT_G_USER, gmode); + + /* Clear supported rates filter */ + memset(&wlc->sup_rates_override, 0, sizeof(wlc_rateset_t)); + + /* Clear rateset override */ + memset(&rs, 0, sizeof(wlc_rateset_t)); + + switch (gmode) { + case GMODE_LEGACY_B: + shortslot = WLC_SHORTSLOT_OFF; + wlc_rateset_copy(&gphy_legacy_rates, &rs); + + break; + + case GMODE_LRS: + if (AP_ENAB(wlc->pub)) + wlc_rateset_copy(&cck_rates, &wlc->sup_rates_override); + break; + + case GMODE_AUTO: + /* Accept defaults */ + break; + + case GMODE_ONLY: + ofdm_basic = true; + preamble = WLC_PLCP_SHORT; + preamble_restrict = true; + break; + + case GMODE_PERFORMANCE: + if (AP_ENAB(wlc->pub)) /* Put all rates into the Supported Rates element */ + wlc_rateset_copy(&cck_ofdm_rates, + &wlc->sup_rates_override); + + shortslot = WLC_SHORTSLOT_ON; + shortslot_restrict = true; + ofdm_basic = true; + preamble = WLC_PLCP_SHORT; + preamble_restrict = true; + break; + + default: + /* Error */ + wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n", + wlc->pub->unit, __func__, gmode); + return -ENOTSUPP; + } + + /* + * If we are switching to gmode == GMODE_LEGACY_B, + * clean up rate info that may refer to OFDM rates. + */ + if ((gmode == GMODE_LEGACY_B) && (band->gmode != GMODE_LEGACY_B)) { + band->gmode = gmode; + if (band->rspec_override && !IS_CCK(band->rspec_override)) { + band->rspec_override = 0; + wlc_reprate_init(wlc); + } + if (band->mrspec_override && !IS_CCK(band->mrspec_override)) { + band->mrspec_override = 0; + } + } + + band->gmode = gmode; + + wlc->shortslot_override = shortslot; + + if (AP_ENAB(wlc->pub)) { + /* wlc->ap->shortslot_restrict = shortslot_restrict; */ + wlc->PLCPHdr_override = + (preamble != + WLC_PLCP_LONG) ? WLC_PLCP_SHORT : WLC_PLCP_AUTO; + } + + if ((AP_ENAB(wlc->pub) && preamble != WLC_PLCP_LONG) + || preamble == WLC_PLCP_SHORT) + wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_PREAMBLE; + else + wlc->default_bss->capability &= ~WLAN_CAPABILITY_SHORT_PREAMBLE; + + /* Update shortslot capability bit for AP and IBSS */ + if ((AP_ENAB(wlc->pub) && shortslot == WLC_SHORTSLOT_AUTO) || + shortslot == WLC_SHORTSLOT_ON) + wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME; + else + wlc->default_bss->capability &= + ~WLAN_CAPABILITY_SHORT_SLOT_TIME; + + /* Use the default 11g rateset */ + if (!rs.count) + wlc_rateset_copy(&cck_ofdm_rates, &rs); + + if (ofdm_basic) { + for (i = 0; i < rs.count; i++) { + if (rs.rates[i] == WLC_RATE_6M + || rs.rates[i] == WLC_RATE_12M + || rs.rates[i] == WLC_RATE_24M) + rs.rates[i] |= WLC_RATE_FLAG; + } + } + + /* Set default bss rateset */ + wlc->default_bss->rateset.count = rs.count; + memcpy(wlc->default_bss->rateset.rates, rs.rates, + sizeof(wlc->default_bss->rateset.rates)); + + return ret; +} + +static int wlc_nmode_validate(struct wlc_info *wlc, s32 nmode) +{ + int err = 0; + + switch (nmode) { + + case OFF: + break; + + case AUTO: + case WL_11N_2x2: + case WL_11N_3x3: + if (!(WLC_PHY_11N_CAP(wlc->band))) + err = -EINVAL; + break; + + default: + err = -EINVAL; + break; + } + + return err; +} + +int wlc_set_nmode(struct wlc_info *wlc, s32 nmode) +{ + uint i; + int err; + + err = wlc_nmode_validate(wlc, nmode); + if (err) + return err; + + switch (nmode) { + case OFF: + wlc->pub->_n_enab = OFF; + wlc->default_bss->flags &= ~WLC_BSS_HT; + /* delete the mcs rates from the default and hw ratesets */ + wlc_rateset_mcs_clear(&wlc->default_bss->rateset); + for (i = 0; i < NBANDS(wlc); i++) { + memset(wlc->bandstate[i]->hw_rateset.mcs, 0, + MCSSET_LEN); + if (IS_MCS(wlc->band->rspec_override)) { + wlc->bandstate[i]->rspec_override = 0; + wlc_reprate_init(wlc); + } + if (IS_MCS(wlc->band->mrspec_override)) + wlc->bandstate[i]->mrspec_override = 0; + } + break; + + case AUTO: + if (wlc->stf->txstreams == WL_11N_3x3) + nmode = WL_11N_3x3; + else + nmode = WL_11N_2x2; + case WL_11N_2x2: + case WL_11N_3x3: + /* force GMODE_AUTO if NMODE is ON */ + wlc_set_gmode(wlc, GMODE_AUTO, true); + if (nmode == WL_11N_3x3) + wlc->pub->_n_enab = SUPPORT_HT; + else + wlc->pub->_n_enab = SUPPORT_11N; + wlc->default_bss->flags |= WLC_BSS_HT; + /* add the mcs rates to the default and hw ratesets */ + wlc_rateset_mcs_build(&wlc->default_bss->rateset, + wlc->stf->txstreams); + for (i = 0; i < NBANDS(wlc); i++) + memcpy(wlc->bandstate[i]->hw_rateset.mcs, + wlc->default_bss->rateset.mcs, MCSSET_LEN); + break; + + default: + break; + } + + return err; +} + +static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) +{ + wlc_rateset_t rs, new; + uint bandunit; + + memcpy(&rs, rs_arg, sizeof(wlc_rateset_t)); + + /* check for bad count value */ + if ((rs.count == 0) || (rs.count > WLC_NUMRATES)) + return -EINVAL; + + /* try the current band */ + bandunit = wlc->band->bandunit; + memcpy(&new, &rs, sizeof(wlc_rateset_t)); + if (wlc_rate_hwrs_filter_sort_validate + (&new, &wlc->bandstate[bandunit]->hw_rateset, true, + wlc->stf->txstreams)) + goto good; + + /* try the other band */ + if (IS_MBAND_UNLOCKED(wlc)) { + bandunit = OTHERBANDUNIT(wlc); + memcpy(&new, &rs, sizeof(wlc_rateset_t)); + if (wlc_rate_hwrs_filter_sort_validate(&new, + &wlc-> + bandstate[bandunit]-> + hw_rateset, true, + wlc->stf->txstreams)) + goto good; + } + + return -EBADE; + + good: + /* apply new rateset */ + memcpy(&wlc->default_bss->rateset, &new, sizeof(wlc_rateset_t)); + memcpy(&wlc->bandstate[bandunit]->defrateset, &new, + sizeof(wlc_rateset_t)); + return 0; +} + +/* simplified integer set interface for common ioctl handler */ +int wlc_set(struct wlc_info *wlc, int cmd, int arg) +{ + return wlc_ioctl(wlc, cmd, (void *)&arg, sizeof(arg), NULL); +} + +/* simplified integer get interface for common ioctl handler */ +int wlc_get(struct wlc_info *wlc, int cmd, int *arg) +{ + return wlc_ioctl(wlc, cmd, arg, sizeof(int), NULL); +} + +static void wlc_ofdm_rateset_war(struct wlc_info *wlc) +{ + u8 r; + bool war = false; + + if (wlc->cfg->associated) + r = wlc->cfg->current_bss->rateset.rates[0]; + else + r = wlc->default_bss->rateset.rates[0]; + + wlc_phy_ofdm_rateset_war(wlc->band->pi, war); + + return; +} + +int +wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, + struct wlc_if *wlcif) +{ + return _wlc_ioctl(wlc, cmd, arg, len, wlcif); +} + +/* common ioctl handler. return: 0=ok, -1=error, positive=particular error */ +static int +_wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, + struct wlc_if *wlcif) +{ + int val, *pval; + bool bool_val; + int bcmerror; + d11regs_t *regs; + struct scb *nextscb; + bool ta_ok; + uint band; + struct wlc_bsscfg *bsscfg; + wlc_bss_info_t *current_bss; + + /* update bsscfg pointer */ + bsscfg = wlc->cfg; + current_bss = bsscfg->current_bss; + + /* initialize the following to get rid of compiler warning */ + nextscb = NULL; + ta_ok = false; + band = 0; + + /* If the device is turned off, then it's not "removed" */ + if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, + __func__); + brcms_down(wlc->wl); + return -EBADE; + } + + /* default argument is generic integer */ + pval = arg ? (int *)arg:NULL; + + /* This will prevent the misaligned access */ + if (pval && (u32) len >= sizeof(val)) + memcpy(&val, pval, sizeof(val)); + else + val = 0; + + /* bool conversion to avoid duplication below */ + bool_val = val != 0; + bcmerror = 0; + regs = wlc->regs; + + if ((arg == NULL) || (len <= 0)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs arguments\n", + wlc->pub->unit, __func__, cmd); + bcmerror = -EINVAL; + goto done; + } + + switch (cmd) { + + case WLC_SET_CHANNEL:{ + chanspec_t chspec = CH20MHZ_CHSPEC(val); + + if (val < 0 || val > MAXCHANNEL) { + bcmerror = -EINVAL; + break; + } + + if (!wlc_valid_chanspec_db(wlc->cmi, chspec)) { + bcmerror = -EINVAL; + break; + } + + if (!wlc->pub->up && IS_MBAND_UNLOCKED(wlc)) { + if (wlc->band->bandunit != + CHSPEC_WLCBANDUNIT(chspec)) + wlc->bandinit_pending = true; + else + wlc->bandinit_pending = false; + } + + wlc->default_bss->chanspec = chspec; + /* wlc_BSSinit() will sanitize the rateset before using it.. */ + if (wlc->pub->up && + (WLC_BAND_PI_RADIO_CHANSPEC != chspec)) { + wlc_set_home_chanspec(wlc, chspec); + wlc_suspend_mac_and_wait(wlc); + wlc_set_chanspec(wlc, chspec); + wlc_enable_mac(wlc); + } + break; + } + + case WLC_SET_SRL: + if (val >= 1 && val <= RETRY_SHORT_MAX) { + int ac; + wlc->SRL = (u16) val; + + wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); + + for (ac = 0; ac < AC_COUNT; ac++) { + WLC_WME_RETRY_SHORT_SET(wlc, ac, wlc->SRL); + } + wlc_wme_retries_write(wlc); + } else + bcmerror = -EINVAL; + break; + + case WLC_SET_LRL: + if (val >= 1 && val <= 255) { + int ac; + wlc->LRL = (u16) val; + + wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); + + for (ac = 0; ac < AC_COUNT; ac++) { + WLC_WME_RETRY_LONG_SET(wlc, ac, wlc->LRL); + } + wlc_wme_retries_write(wlc); + } else + bcmerror = -EINVAL; + break; + + case WLC_GET_CURR_RATESET:{ + wl_rateset_t *ret_rs = (wl_rateset_t *) arg; + wlc_rateset_t *rs; + + if (wlc->pub->associated) + rs = ¤t_bss->rateset; + else + rs = &wlc->default_bss->rateset; + + if (len < (int)(rs->count + sizeof(rs->count))) { + bcmerror = -EOVERFLOW; + break; + } + + /* Copy only legacy rateset section */ + ret_rs->count = rs->count; + memcpy(&ret_rs->rates, &rs->rates, rs->count); + break; + } + + case WLC_SET_RATESET:{ + wlc_rateset_t rs; + wl_rateset_t *in_rs = (wl_rateset_t *) arg; + + if (len < (int)(in_rs->count + sizeof(in_rs->count))) { + bcmerror = -EOVERFLOW; + break; + } + + if (in_rs->count > WLC_NUMRATES) { + bcmerror = -ENOBUFS; + break; + } + + memset(&rs, 0, sizeof(wlc_rateset_t)); + + /* Copy only legacy rateset section */ + rs.count = in_rs->count; + memcpy(&rs.rates, &in_rs->rates, rs.count); + + /* merge rateset coming in with the current mcsset */ + if (N_ENAB(wlc->pub)) { + if (bsscfg->associated) + memcpy(rs.mcs, + ¤t_bss->rateset.mcs[0], + MCSSET_LEN); + else + memcpy(rs.mcs, + &wlc->default_bss->rateset.mcs[0], + MCSSET_LEN); + } + + bcmerror = wlc_set_rateset(wlc, &rs); + + if (!bcmerror) + wlc_ofdm_rateset_war(wlc); + + break; + } + + case WLC_SET_BCNPRD: + /* range [1, 0xffff] */ + if (val >= DOT11_MIN_BEACON_PERIOD + && val <= DOT11_MAX_BEACON_PERIOD) { + wlc->default_bss->beacon_period = (u16) val; + } else + bcmerror = -EINVAL; + break; + + case WLC_GET_PHYLIST: + { + unsigned char *cp = arg; + if (len < 3) { + bcmerror = -EOVERFLOW; + break; + } + + if (WLCISNPHY(wlc->band)) { + *cp++ = 'n'; + } else if (WLCISLCNPHY(wlc->band)) { + *cp++ = 'c'; + } else if (WLCISSSLPNPHY(wlc->band)) { + *cp++ = 's'; + } + *cp = '\0'; + break; + } + + case WLC_SET_SHORTSLOT_OVERRIDE: + if ((val != WLC_SHORTSLOT_AUTO) && + (val != WLC_SHORTSLOT_OFF) && (val != WLC_SHORTSLOT_ON)) { + bcmerror = -EINVAL; + break; + } + + wlc->shortslot_override = (s8) val; + + /* shortslot is an 11g feature, so no more work if we are + * currently on the 5G band + */ + if (BAND_5G(wlc->band->bandtype)) + break; + + if (wlc->pub->up && wlc->pub->associated) { + /* let watchdog or beacon processing update shortslot */ + } else if (wlc->pub->up) { + /* unassociated shortslot is off */ + wlc_switch_shortslot(wlc, false); + } else { + /* driver is down, so just update the wlc_info value */ + if (wlc->shortslot_override == WLC_SHORTSLOT_AUTO) { + wlc->shortslot = false; + } else { + wlc->shortslot = + (wlc->shortslot_override == + WLC_SHORTSLOT_ON); + } + } + + break; + + } + done: + + if (bcmerror) + wlc->pub->bcmerror = bcmerror; + + return bcmerror; +} + +/* + * register watchdog and down handlers. + */ +int wlc_module_register(struct wlc_pub *pub, + const char *name, void *hdl, + watchdog_fn_t w_fn, down_fn_t d_fn) +{ + struct wlc_info *wlc = (struct wlc_info *) pub->wlc; + int i; + + /* find an empty entry and just add, no duplication check! */ + for (i = 0; i < WLC_MAXMODULES; i++) { + if (wlc->modulecb[i].name[0] == '\0') { + strncpy(wlc->modulecb[i].name, name, + sizeof(wlc->modulecb[i].name) - 1); + wlc->modulecb[i].hdl = hdl; + wlc->modulecb[i].watchdog_fn = w_fn; + wlc->modulecb[i].down_fn = d_fn; + return 0; + } + } + + return -ENOSR; +} + +/* unregister module callbacks */ +int wlc_module_unregister(struct wlc_pub *pub, const char *name, void *hdl) +{ + struct wlc_info *wlc = (struct wlc_info *) pub->wlc; + int i; + + if (wlc == NULL) + return -ENODATA; + + for (i = 0; i < WLC_MAXMODULES; i++) { + if (!strcmp(wlc->modulecb[i].name, name) && + (wlc->modulecb[i].hdl == hdl)) { + memset(&wlc->modulecb[i], 0, sizeof(struct modulecb)); + return 0; + } + } + + /* table not found! */ + return -ENODATA; +} + +/* Write WME tunable parameters for retransmit/max rate from wlc struct to ucode */ +static void wlc_wme_retries_write(struct wlc_info *wlc) +{ + int ac; + + /* Need clock to do this */ + if (!wlc->clk) + return; + + for (ac = 0; ac < AC_COUNT; ac++) { + wlc_write_shm(wlc, M_AC_TXLMT_ADDR(ac), wlc->wme_retries[ac]); + } +} + +#ifdef BCMDBG +static const char *supr_reason[] = { + "None", "PMQ Entry", "Flush request", + "Previous frag failure", "Channel mismatch", + "Lifetime Expiry", "Underflow" +}; + +static void wlc_print_txs_status(u16 s) +{ + printk(KERN_DEBUG "[15:12] %d frame attempts\n", + (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT); + printk(KERN_DEBUG " [11:8] %d rts attempts\n", + (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT); + printk(KERN_DEBUG " [7] %d PM mode indicated\n", + ((s & TX_STATUS_PMINDCTD) ? 1 : 0)); + printk(KERN_DEBUG " [6] %d intermediate status\n", + ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0)); + printk(KERN_DEBUG " [5] %d AMPDU\n", + (s & TX_STATUS_AMPDU) ? 1 : 0); + printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n", + ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT), + supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]); + printk(KERN_DEBUG " [1] %d acked\n", + ((s & TX_STATUS_ACK_RCV) ? 1 : 0)); +} +#endif /* BCMDBG */ + +void wlc_print_txstatus(tx_status_t *txs) +{ +#if defined(BCMDBG) + u16 s = txs->status; + u16 ackphyrxsh = txs->ackphyrxsh; + + printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n"); + + printk(KERN_DEBUG "FrameID: %04x ", txs->frameid); + printk(KERN_DEBUG "TxStatus: %04x", s); + printk(KERN_DEBUG "\n"); + + wlc_print_txs_status(s); + + printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime); + printk(KERN_DEBUG "Seq: %04x ", txs->sequence); + printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr); + printk(KERN_DEBUG "RxAckRSSI: %04x ", + (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT); + printk(KERN_DEBUG "RxAckSQ: %04x", + (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT); + printk(KERN_DEBUG "\n"); +#endif /* defined(BCMDBG) */ +} + +void wlc_statsupd(struct wlc_info *wlc) +{ + int i; + macstat_t macstats; +#ifdef BCMDBG + u16 delta; + u16 rxf0ovfl; + u16 txfunfl[NFIFO]; +#endif /* BCMDBG */ + + /* if driver down, make no sense to update stats */ + if (!wlc->pub->up) + return; + +#ifdef BCMDBG + /* save last rx fifo 0 overflow count */ + rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl; + + /* save last tx fifo underflow count */ + for (i = 0; i < NFIFO; i++) + txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i]; +#endif /* BCMDBG */ + + /* Read mac stats from contiguous shared memory */ + wlc_bmac_copyfrom_shm(wlc->hw, M_UCODE_MACSTAT, + &macstats, sizeof(macstat_t)); + +#ifdef BCMDBG + /* check for rx fifo 0 overflow */ + delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl); + if (delta) + wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n", + wlc->pub->unit, delta); + + /* check for tx fifo underflows */ + for (i = 0; i < NFIFO; i++) { + delta = + (u16) (wlc->core->macstat_snapshot->txfunfl[i] - + txfunfl[i]); + if (delta) + wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!" + "\n", wlc->pub->unit, delta, i); + } +#endif /* BCMDBG */ + + /* merge counters from dma module */ + for (i = 0; i < NFIFO; i++) { + if (wlc->hw->di[i]) { + dma_counterreset(wlc->hw->di[i]); + } + } +} + +bool wlc_chipmatch(u16 vendor, u16 device) +{ + if (vendor != PCI_VENDOR_ID_BROADCOM) { + pr_err("wlc_chipmatch: unknown vendor id %04x\n", vendor); + return false; + } + + if (device == BCM43224_D11N_ID_VEN1) + return true; + if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID)) + return true; + if (device == BCM4313_D11N2G_ID) + return true; + if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID)) + return true; + + pr_err("wlc_chipmatch: unknown device id %04x\n", device); + return false; +} + +#if defined(BCMDBG) +void wlc_print_txdesc(d11txh_t *txh) +{ + u16 mtcl = le16_to_cpu(txh->MacTxControlLow); + u16 mtch = le16_to_cpu(txh->MacTxControlHigh); + u16 mfc = le16_to_cpu(txh->MacFrameControl); + u16 tfest = le16_to_cpu(txh->TxFesTimeNormal); + u16 ptcw = le16_to_cpu(txh->PhyTxControlWord); + u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1); + u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr); + u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts); + u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts); + u16 mainrates = le16_to_cpu(txh->MainRates); + u16 xtraft = le16_to_cpu(txh->XtraFrameTypes); + u8 *iv = txh->IV; + u8 *ra = txh->TxFrameRA; + u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback); + u8 *rtspfb = txh->RTSPLCPFallback; + u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback); + u8 *fragpfb = txh->FragPLCPFallback; + u16 fragdfb = le16_to_cpu(txh->FragDurFallback); + u16 mmodelen = le16_to_cpu(txh->MModeLen); + u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen); + u16 tfid = le16_to_cpu(txh->TxFrameID); + u16 txs = le16_to_cpu(txh->TxStatus); + u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus); + u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT); + u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR); + u16 mmbyte = le16_to_cpu(txh->MinMBytes); + + u8 *rtsph = txh->RTSPhyHeader; + struct ieee80211_rts rts = txh->rts_frame; + char hexbuf[256]; + + /* add plcp header along with txh descriptor */ + printk(KERN_DEBUG "Raw TxDesc + plcp header:\n"); + print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, + txh, sizeof(d11txh_t) + 48); + + printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl); + printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch); + printk(KERN_DEBUG "FC: %04x ", mfc); + printk(KERN_DEBUG "FES Time: %04x\n", tfest); + printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw, + (ptcw & PHY_TXC_SHORT_HDR) ? " short" : ""); + printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1); + printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr); + printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts); + printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts); + printk(KERN_DEBUG "MainRates: %04x ", mainrates); + printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft); + printk(KERN_DEBUG "\n"); + + brcmu_format_hex(hexbuf, iv, sizeof(txh->IV)); + printk(KERN_DEBUG "SecIV: %s\n", hexbuf); + brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); + printk(KERN_DEBUG "RA: %s\n", hexbuf); + + printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb); + brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); + printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); + printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb); + brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); + printk(KERN_DEBUG "PLCP: %s ", hexbuf); + printk(KERN_DEBUG "DUR: %04x", fragdfb); + printk(KERN_DEBUG "\n"); + + printk(KERN_DEBUG "MModeLen: %04x ", mmodelen); + printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen); + + printk(KERN_DEBUG "FrameID: %04x\n", tfid); + printk(KERN_DEBUG "TxStatus: %04x\n", txs); + + printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu); + printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte); + printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f); + printk(KERN_DEBUG "MinByte: %04x\n", mmbyte); + + brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); + printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); + brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); + printk(KERN_DEBUG "RTS Frame: %s", hexbuf); + printk(KERN_DEBUG "\n"); +} +#endif /* defined(BCMDBG) */ + +#if defined(BCMDBG) +void wlc_print_rxh(d11rxhdr_t *rxh) +{ + u16 len = rxh->RxFrameSize; + u16 phystatus_0 = rxh->PhyRxStatus_0; + u16 phystatus_1 = rxh->PhyRxStatus_1; + u16 phystatus_2 = rxh->PhyRxStatus_2; + u16 phystatus_3 = rxh->PhyRxStatus_3; + u16 macstatus1 = rxh->RxStatus1; + u16 macstatus2 = rxh->RxStatus2; + char flagstr[64]; + char lenbuf[20]; + static const struct brcmu_bit_desc macstat_flags[] = { + {RXS_FCSERR, "FCSErr"}, + {RXS_RESPFRAMETX, "Reply"}, + {RXS_PBPRES, "PADDING"}, + {RXS_DECATMPT, "DeCr"}, + {RXS_DECERR, "DeCrErr"}, + {RXS_BCNSENT, "Bcn"}, + {0, NULL} + }; + + printk(KERN_DEBUG "Raw RxDesc:\n"); + print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, sizeof(d11rxhdr_t)); + + brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64); + + snprintf(lenbuf, sizeof(lenbuf), "0x%x", len); + + printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len, + (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : ""); + printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n", + phystatus_0, phystatus_1, phystatus_2, phystatus_3); + printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr); + printk(KERN_DEBUG "RXMACaggtype: %x\n", + (macstatus2 & RXS_AGGTYPE_MASK)); + printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime); +} +#endif /* defined(BCMDBG) */ + +static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate) +{ + return wlc_bmac_rate_shm_offset(wlc->hw, rate); +} + +/* Callback for device removed */ + +/* + * Attempts to queue a packet onto a multiple-precedence queue, + * if necessary evicting a lower precedence packet from the queue. + * + * 'prec' is the precedence number that has already been mapped + * from the packet priority. + * + * Returns true if packet consumed (queued), false if not. + */ +bool +wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, int prec) +{ + return wlc_prec_enq_head(wlc, q, pkt, prec, false); +} + +bool +wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, + int prec, bool head) +{ + struct sk_buff *p; + int eprec = -1; /* precedence to evict from */ + + /* Determine precedence from which to evict packet, if any */ + if (pktq_pfull(q, prec)) + eprec = prec; + else if (pktq_full(q)) { + p = brcmu_pktq_peek_tail(q, &eprec); + if (eprec > prec) { + wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d" + "\n", __func__, eprec, prec); + return false; + } + } + + /* Evict if needed */ + if (eprec >= 0) { + bool discard_oldest; + + discard_oldest = AC_BITMAP_TST(wlc->wme_dp, eprec); + + /* Refuse newer packet unless configured to discard oldest */ + if (eprec == prec && !discard_oldest) { + wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d" + "\n", __func__, prec); + return false; + } + + /* Evict packet according to discard policy */ + p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : + brcmu_pktq_pdeq_tail(q, eprec); + brcmu_pkt_buf_free_skb(p); + } + + /* Enqueue */ + if (head) + p = brcmu_pktq_penq_head(q, prec, pkt); + else + p = brcmu_pktq_penq(q, prec, pkt); + + return true; +} + +void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, + uint prec) +{ + struct wlc_info *wlc = (struct wlc_info *) ctx; + struct wlc_txq_info *qi = wlc->pkt_queue; /* Check me */ + struct pktq *q = &qi->q; + int prio; + + prio = sdu->priority; + + if (!wlc_prec_enq(wlc, q, sdu, prec)) { + if (!EDCF_ENAB(wlc->pub) + || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) + wiphy_err(wlc->wiphy, "wl%d: wlc_txq_enq: txq overflow" + "\n", wlc->pub->unit); + + /* + * XXX we might hit this condtion in case + * packet flooding from mac80211 stack + */ + brcmu_pkt_buf_free_skb(sdu); + } + + /* Check if flow control needs to be turned on after enqueuing the packet + * Don't turn on flow control if EDCF is enabled. Driver would make the decision on what + * to drop instead of relying on stack to make the right decision + */ + if (!EDCF_ENAB(wlc->pub) + || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { + if (pktq_len(q) >= wlc->pub->tunables->datahiwat) { + wlc_txflowcontrol(wlc, qi, ON, ALLPRIO); + } + } else if (wlc->pub->_priofc) { + if (pktq_plen(q, wlc_prio2prec_map[prio]) >= + wlc->pub->tunables->datahiwat) { + wlc_txflowcontrol(wlc, qi, ON, prio); + } + } +} + +bool +wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, + struct ieee80211_hw *hw) +{ + u8 prio; + uint fifo; + void *pkt; + struct scb *scb = &global_scb; + struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data); + + /* 802.11 standard requires management traffic to go at highest priority */ + prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority : + MAXPRIO; + fifo = prio2fifo[prio]; + pkt = sdu; + if (unlikely + (wlc_d11hdrs_mac80211(wlc, hw, pkt, scb, 0, 1, fifo, 0, NULL, 0))) + return -EINVAL; + wlc_txq_enq(wlc, scb, pkt, WLC_PRIO_TO_PREC(prio)); + wlc_send_q(wlc); + return 0; +} + +void wlc_send_q(struct wlc_info *wlc) +{ + struct sk_buff *pkt[DOT11_MAXNUMFRAGS]; + int prec; + u16 prec_map; + int err = 0, i, count; + uint fifo; + struct wlc_txq_info *qi = wlc->pkt_queue; + struct pktq *q = &qi->q; + struct ieee80211_tx_info *tx_info; + + if (in_send_q) + return; + else + in_send_q = true; + + prec_map = wlc->tx_prec_map; + + /* Send all the enq'd pkts that we can. + * Dequeue packets with precedence with empty HW fifo only + */ + while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) { + tx_info = IEEE80211_SKB_CB(pkt[0]); + if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { + err = wlc_sendampdu(wlc->ampdu, qi, pkt, prec); + } else { + count = 1; + err = wlc_prep_pdu(wlc, pkt[0], &fifo); + if (!err) { + for (i = 0; i < count; i++) { + wlc_txfifo(wlc, fifo, pkt[i], true, 1); + } + } + } + + if (err == -EBUSY) { + brcmu_pktq_penq_head(q, prec, pkt[0]); + /* If send failed due to any other reason than a change in + * HW FIFO condition, quit. Otherwise, read the new prec_map! + */ + if (prec_map == wlc->tx_prec_map) + break; + prec_map = wlc->tx_prec_map; + } + } + + /* Check if flow control needs to be turned off after sending the packet */ + if (!EDCF_ENAB(wlc->pub) + || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { + if (wlc_txflowcontrol_prio_isset(wlc, qi, ALLPRIO) + && (pktq_len(q) < wlc->pub->tunables->datahiwat / 2)) { + wlc_txflowcontrol(wlc, qi, OFF, ALLPRIO); + } + } else if (wlc->pub->_priofc) { + int prio; + for (prio = MAXPRIO; prio >= 0; prio--) { + if (wlc_txflowcontrol_prio_isset(wlc, qi, prio) && + (pktq_plen(q, wlc_prio2prec_map[prio]) < + wlc->pub->tunables->datahiwat / 2)) { + wlc_txflowcontrol(wlc, qi, OFF, prio); + } + } + } + in_send_q = false; +} + +/* + * bcmc_fid_generate: + * Generate frame ID for a BCMC packet. The frag field is not used + * for MC frames so is used as part of the sequence number. + */ +static inline u16 +bcmc_fid_generate(struct wlc_info *wlc, struct wlc_bsscfg *bsscfg, + d11txh_t *txh) +{ + u16 frameid; + + frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK | + TXFID_QUEUE_MASK); + frameid |= + (((wlc-> + mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | + TX_BCMC_FIFO; + + return frameid; +} + +void +wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, bool commit, + s8 txpktpend) +{ + u16 frameid = INVALIDFID; + d11txh_t *txh; + + txh = (d11txh_t *) (p->data); + + /* When a BC/MC frame is being committed to the BCMC fifo via DMA (NOT PIO), update + * ucode or BSS info as appropriate. + */ + if (fifo == TX_BCMC_FIFO) { + frameid = le16_to_cpu(txh->TxFrameID); + + } + + if (WLC_WAR16165(wlc)) + wlc_war16165(wlc, true); + + + /* Bump up pending count for if not using rpc. If rpc is used, this will be handled + * in wlc_bmac_txfifo() + */ + if (commit) { + TXPKTPENDINC(wlc, fifo, txpktpend); + BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n", + txpktpend, TXPKTPENDGET(wlc, fifo)); + } + + /* Commit BCMC sequence number in the SHM frame ID location */ + if (frameid != INVALIDFID) + BCMCFID(wlc, frameid); + + if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) { + wiphy_err(wlc->wiphy, "wlc_txfifo: fatal, toss frames !!!\n"); + } +} + +void +wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rspec, uint length, u8 *plcp) +{ + if (IS_MCS(rspec)) { + wlc_compute_mimo_plcp(rspec, length, plcp); + } else if (IS_OFDM(rspec)) { + wlc_compute_ofdm_plcp(rspec, length, plcp); + } else { + wlc_compute_cck_plcp(wlc, rspec, length, plcp); + } + return; +} + +/* Rate: 802.11 rate code, length: PSDU length in octets */ +static void wlc_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) +{ + u8 mcs = (u8) (rspec & RSPEC_RATE_MASK); + plcp[0] = mcs; + if (RSPEC_IS40MHZ(rspec) || (mcs == 32)) + plcp[0] |= MIMO_PLCP_40MHZ; + WLC_SET_MIMO_PLCP_LEN(plcp, length); + plcp[3] = RSPEC_MIMOPLCP3(rspec); /* rspec already holds this byte */ + plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ + plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ + plcp[5] = 0; +} + +/* Rate: 802.11 rate code, length: PSDU length in octets */ +static void +wlc_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) +{ + u8 rate_signal; + u32 tmp = 0; + int rate = RSPEC2RATE(rspec); + + /* encode rate per 802.11a-1999 sec 17.3.4.1, with lsb transmitted first */ + rate_signal = rate_info[rate] & WLC_RATE_MASK; + memset(plcp, 0, D11_PHY_HDR_LEN); + D11A_PHY_HDR_SRATE((ofdm_phy_hdr_t *) plcp, rate_signal); + + tmp = (length & 0xfff) << 5; + plcp[2] |= (tmp >> 16) & 0xff; + plcp[1] |= (tmp >> 8) & 0xff; + plcp[0] |= tmp & 0xff; + + return; +} + +/* + * Compute PLCP, but only requires actual rate and length of pkt. + * Rate is given in the driver standard multiple of 500 kbps. + * le is set for 11 Mbps rate if necessary. + * Broken out for PRQ. + */ + +static void wlc_cck_plcp_set(struct wlc_info *wlc, int rate_500, uint length, + u8 *plcp) +{ + u16 usec = 0; + u8 le = 0; + + switch (rate_500) { + case WLC_RATE_1M: + usec = length << 3; + break; + case WLC_RATE_2M: + usec = length << 2; + break; + case WLC_RATE_5M5: + usec = (length << 4) / 11; + if ((length << 4) - (usec * 11) > 0) + usec++; + break; + case WLC_RATE_11M: + usec = (length << 3) / 11; + if ((length << 3) - (usec * 11) > 0) { + usec++; + if ((usec * 11) - (length << 3) >= 8) + le = D11B_PLCP_SIGNAL_LE; + } + break; + + default: + wiphy_err(wlc->wiphy, "wlc_cck_plcp_set: unsupported rate %d" + "\n", rate_500); + rate_500 = WLC_RATE_1M; + usec = length << 3; + break; + } + /* PLCP signal byte */ + plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */ + /* PLCP service byte */ + plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED); + /* PLCP length u16, little endian */ + plcp[2] = usec & 0xff; + plcp[3] = (usec >> 8) & 0xff; + /* PLCP CRC16 */ + plcp[4] = 0; + plcp[5] = 0; +} + +/* Rate: 802.11 rate code, length: PSDU length in octets */ +static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rspec, + uint length, u8 *plcp) +{ + int rate = RSPEC2RATE(rspec); + + wlc_cck_plcp_set(wlc, rate, length, plcp); +} + +/* wlc_compute_frame_dur() + * + * Calculate the 802.11 MAC header DUR field for MPDU + * DUR for a single frame = 1 SIFS + 1 ACK + * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time + * + * rate MPDU rate in unit of 500kbps + * next_frag_len next MPDU length in bytes + * preamble_type use short/GF or long/MM PLCP header + */ +static u16 +wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, u8 preamble_type, + uint next_frag_len) +{ + u16 dur, sifs; + + sifs = SIFS(wlc->band); + + dur = sifs; + dur += (u16) wlc_calc_ack_time(wlc, rate, preamble_type); + + if (next_frag_len) { + /* Double the current DUR to get 2 SIFS + 2 ACKs */ + dur *= 2; + /* add another SIFS and the frag time */ + dur += sifs; + dur += + (u16) wlc_calc_frame_time(wlc, rate, preamble_type, + next_frag_len); + } + return dur; +} + +/* wlc_compute_rtscts_dur() + * + * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame + * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK + * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK + * + * cts cts-to-self or rts/cts + * rts_rate rts or cts rate in unit of 500kbps + * rate next MPDU rate in unit of 500kbps + * frame_len next MPDU frame length in bytes + */ +u16 +wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, ratespec_t rts_rate, + ratespec_t frame_rate, u8 rts_preamble_type, + u8 frame_preamble_type, uint frame_len, bool ba) +{ + u16 dur, sifs; + + sifs = SIFS(wlc->band); + + if (!cts_only) { /* RTS/CTS */ + dur = 3 * sifs; + dur += + (u16) wlc_calc_cts_time(wlc, rts_rate, + rts_preamble_type); + } else { /* CTS-TO-SELF */ + dur = 2 * sifs; + } + + dur += + (u16) wlc_calc_frame_time(wlc, frame_rate, frame_preamble_type, + frame_len); + if (ba) + dur += + (u16) wlc_calc_ba_time(wlc, frame_rate, + WLC_SHORT_PREAMBLE); + else + dur += + (u16) wlc_calc_ack_time(wlc, frame_rate, + frame_preamble_type); + return dur; +} + +u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) +{ + u16 phyctl1 = 0; + u16 bw; + + if (WLCISLCNPHY(wlc->band)) { + bw = PHY_TXC1_BW_20MHZ; + } else { + bw = RSPEC_GET_BW(rspec); + /* 10Mhz is not supported yet */ + if (bw < PHY_TXC1_BW_20MHZ) { + wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: bw %d is " + "not supported yet, set to 20L\n", bw); + bw = PHY_TXC1_BW_20MHZ; + } + } + + if (IS_MCS(rspec)) { + uint mcs = rspec & RSPEC_RATE_MASK; + + /* bw, stf, coding-type is part of RSPEC_PHYTXBYTE2 returns */ + phyctl1 = RSPEC_PHYTXBYTE2(rspec); + /* set the upper byte of phyctl1 */ + phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8); + } else if (IS_CCK(rspec) && !WLCISLCNPHY(wlc->band) + && !WLCISSSLPNPHY(wlc->band)) { + /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ + /* Eventually MIMOPHY would also be converted to this format */ + /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ + phyctl1 = (bw | (RSPEC_STF(rspec) << PHY_TXC1_MODE_SHIFT)); + } else { /* legacy OFDM/CCK */ + s16 phycfg; + /* get the phyctl byte from rate phycfg table */ + phycfg = wlc_rate_legacy_phyctl(RSPEC2RATE(rspec)); + if (phycfg == -1) { + wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: wrong " + "legacy OFDM/CCK rate\n"); + phycfg = 0; + } + /* set the upper byte of phyctl1 */ + phyctl1 = + (bw | (phycfg << 8) | + (RSPEC_STF(rspec) << PHY_TXC1_MODE_SHIFT)); + } + return phyctl1; +} + +ratespec_t +wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, + u16 mimo_ctlchbw) +{ + ratespec_t rts_rspec = 0; + + if (use_rspec) { + /* use frame rate as rts rate */ + rts_rspec = rspec; + + } else if (wlc->band->gmode && wlc->protection->_g && !IS_CCK(rspec)) { + /* Use 11Mbps as the g protection RTS target rate and fallback. + * Use the WLC_BASIC_RATE() lookup to find the best basic rate under the + * target in case 11 Mbps is not Basic. + * 6 and 9 Mbps are not usually selected by rate selection, but even + * if the OFDM rate we are protecting is 6 or 9 Mbps, 11 is more robust. + */ + rts_rspec = WLC_BASIC_RATE(wlc, WLC_RATE_11M); + } else { + /* calculate RTS rate and fallback rate based on the frame rate + * RTS must be sent at a basic rate since it is a + * control frame, sec 9.6 of 802.11 spec + */ + rts_rspec = WLC_BASIC_RATE(wlc, rspec); + } + + if (WLC_PHY_11N_CAP(wlc->band)) { + /* set rts txbw to correct side band */ + rts_rspec &= ~RSPEC_BW_MASK; + + /* if rspec/rspec_fallback is 40MHz, then send RTS on both 20MHz channel + * (DUP), otherwise send RTS on control channel + */ + if (RSPEC_IS40MHZ(rspec) && !IS_CCK(rts_rspec)) + rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT); + else + rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT); + + /* pick siso/cdd as default for ofdm */ + if (IS_OFDM(rts_rspec)) { + rts_rspec &= ~RSPEC_STF_MASK; + rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); + } + } + return rts_rspec; +} + +/* + * Add d11txh_t, cck_phy_hdr_t. + * + * 'p' data must start with 802.11 MAC header + * 'p' must allow enough bytes of local headers to be "pushed" onto the packet + * + * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes) + * + */ +static u16 +wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, + struct sk_buff *p, struct scb *scb, uint frag, + uint nfrags, uint queue, uint next_frag_len, + wsec_key_t *key, ratespec_t rspec_override) +{ + struct ieee80211_hdr *h; + d11txh_t *txh; + u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN]; + int len, phylen, rts_phylen; + u16 mch, phyctl, xfts, mainrates; + u16 seq = 0, mcl = 0, status = 0, frameid = 0; + ratespec_t rspec[2] = { WLC_RATE_1M, WLC_RATE_1M }, rts_rspec[2] = { + WLC_RATE_1M, WLC_RATE_1M}; + bool use_rts = false; + bool use_cts = false; + bool use_rifs = false; + bool short_preamble[2] = { false, false }; + u8 preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; + u8 rts_preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; + u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN]; + struct ieee80211_rts *rts = NULL; + bool qos; + uint ac; + u32 rate_val[2]; + bool hwtkmic = false; + u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; +#define ANTCFG_NONE 0xFF + u8 antcfg = ANTCFG_NONE; + u8 fbantcfg = ANTCFG_NONE; + uint phyctl1_stf = 0; + u16 durid = 0; + struct ieee80211_tx_rate *txrate[2]; + int k; + struct ieee80211_tx_info *tx_info; + bool is_mcs[2]; + u16 mimo_txbw; + u8 mimo_preamble_type; + + /* locate 802.11 MAC header */ + h = (struct ieee80211_hdr *)(p->data); + qos = ieee80211_is_data_qos(h->frame_control); + + /* compute length of frame in bytes for use in PLCP computations */ + len = brcmu_pkttotlen(p); + phylen = len + FCS_LEN; + + /* If WEP enabled, add room in phylen for the additional bytes of + * ICV which MAC generates. We do NOT add the additional bytes to + * the packet itself, thus phylen = packet length + ICV_LEN + FCS_LEN + * in this case + */ + if (key) { + phylen += key->icv_len; + } + + /* Get tx_info */ + tx_info = IEEE80211_SKB_CB(p); + + /* add PLCP */ + plcp = skb_push(p, D11_PHY_HDR_LEN); + + /* add Broadcom tx descriptor header */ + txh = (d11txh_t *) skb_push(p, D11_TXH_LEN); + memset(txh, 0, D11_TXH_LEN); + + /* setup frameid */ + if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { + /* non-AP STA should never use BCMC queue */ + if (queue == TX_BCMC_FIFO) { + wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == " + "TX_BCMC!\n", WLCWLUNIT(wlc), __func__); + frameid = bcmc_fid_generate(wlc, NULL, txh); + } else { + /* Increment the counter for first fragment */ + if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) { + SCB_SEQNUM(scb, p->priority)++; + } + + /* extract fragment number from frame first */ + seq = le16_to_cpu(seq) & FRAGNUM_MASK; + seq |= (SCB_SEQNUM(scb, p->priority) << SEQNUM_SHIFT); + h->seq_ctrl = cpu_to_le16(seq); + + frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | + (queue & TXFID_QUEUE_MASK); + } + } + frameid |= queue & TXFID_QUEUE_MASK; + + /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */ + if (SCB_PS(scb) || ieee80211_is_beacon(h->frame_control)) + mcl |= TXC_IGNOREPMQ; + + txrate[0] = tx_info->control.rates; + txrate[1] = txrate[0] + 1; + + /* if rate control algorithm didn't give us a fallback rate, use the primary rate */ + if (txrate[1]->idx < 0) { + txrate[1] = txrate[0]; + } + + for (k = 0; k < hw->max_rates; k++) { + is_mcs[k] = + txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false; + if (!is_mcs[k]) { + if ((txrate[k]->idx >= 0) + && (txrate[k]->idx < + hw->wiphy->bands[tx_info->band]->n_bitrates)) { + rate_val[k] = + hw->wiphy->bands[tx_info->band]-> + bitrates[txrate[k]->idx].hw_value; + short_preamble[k] = + txrate[k]-> + flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ? + true : false; + } else { + rate_val[k] = WLC_RATE_1M; + } + } else { + rate_val[k] = txrate[k]->idx; + } + /* Currently only support same setting for primay and fallback rates. + * Unify flags for each rate into a single value for the frame + */ + use_rts |= + txrate[k]-> + flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false; + use_cts |= + txrate[k]-> + flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false; + + if (is_mcs[k]) + rate_val[k] |= NRATE_MCS_INUSE; + + rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band, rate_val[k]); + + /* (1) RATE: determine and validate primary rate and fallback rates */ + if (!RSPEC_ACTIVE(rspec[k])) { + rspec[k] = WLC_RATE_1M; + } else { + if (!is_multicast_ether_addr(h->addr1)) { + /* set tx antenna config */ + wlc_antsel_antcfg_get(wlc->asi, false, false, 0, + 0, &antcfg, &fbantcfg); + } + } + } + + phyctl1_stf = wlc->stf->ss_opmode; + + if (N_ENAB(wlc->pub)) { + for (k = 0; k < hw->max_rates; k++) { + /* apply siso/cdd to single stream mcs's or ofdm if rspec is auto selected */ + if (((IS_MCS(rspec[k]) && + IS_SINGLE_STREAM(rspec[k] & RSPEC_RATE_MASK)) || + IS_OFDM(rspec[k])) + && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY) + || !(rspec[k] & RSPEC_OVERRIDE))) { + rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK); + + /* For SISO MCS use STBC if possible */ + if (IS_MCS(rspec[k]) + && WLC_STF_SS_STBC_TX(wlc, scb)) { + u8 stc; + + stc = 1; /* Nss for single stream is always 1 */ + rspec[k] |= + (PHY_TXC1_MODE_STBC << + RSPEC_STF_SHIFT) | (stc << + RSPEC_STC_SHIFT); + } else + rspec[k] |= + (phyctl1_stf << RSPEC_STF_SHIFT); + } + + /* Is the phy configured to use 40MHZ frames? If so then pick the desired txbw */ + if (CHSPEC_WLC_BW(wlc->chanspec) == WLC_40_MHZ) { + /* default txbw is 20in40 SB */ + mimo_ctlchbw = mimo_txbw = + CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) + ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; + + if (IS_MCS(rspec[k])) { + /* mcs 32 must be 40b/w DUP */ + if ((rspec[k] & RSPEC_RATE_MASK) == 32) { + mimo_txbw = + PHY_TXC1_BW_40MHZ_DUP; + /* use override */ + } else if (wlc->mimo_40txbw != AUTO) + mimo_txbw = wlc->mimo_40txbw; + /* else check if dst is using 40 Mhz */ + else if (scb->flags & SCB_IS40) + mimo_txbw = PHY_TXC1_BW_40MHZ; + } else if (IS_OFDM(rspec[k])) { + if (wlc->ofdm_40txbw != AUTO) + mimo_txbw = wlc->ofdm_40txbw; + } else { + if (wlc->cck_40txbw != AUTO) + mimo_txbw = wlc->cck_40txbw; + } + } else { + /* mcs32 is 40 b/w only. + * This is possible for probe packets on a STA during SCAN + */ + if ((rspec[k] & RSPEC_RATE_MASK) == 32) { + /* mcs 0 */ + rspec[k] = RSPEC_MIMORATE; + } + mimo_txbw = PHY_TXC1_BW_20MHZ; + } + + /* Set channel width */ + rspec[k] &= ~RSPEC_BW_MASK; + if ((k == 0) || ((k > 0) && IS_MCS(rspec[k]))) + rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT); + else + rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT); + + /* Set Short GI */ +#ifdef NOSGIYET + if (IS_MCS(rspec[k]) + && (txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) + rspec[k] |= RSPEC_SHORT_GI; + else if (!(txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) + rspec[k] &= ~RSPEC_SHORT_GI; +#else + rspec[k] &= ~RSPEC_SHORT_GI; +#endif + + mimo_preamble_type = WLC_MM_PREAMBLE; + if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD) + mimo_preamble_type = WLC_GF_PREAMBLE; + + if ((txrate[k]->flags & IEEE80211_TX_RC_MCS) + && (!IS_MCS(rspec[k]))) { + wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_" + "RC_MCS != IS_MCS(rspec)\n", + WLCWLUNIT(wlc), __func__); + } + + if (IS_MCS(rspec[k])) { + preamble_type[k] = mimo_preamble_type; + + /* if SGI is selected, then forced mm for single stream */ + if ((rspec[k] & RSPEC_SHORT_GI) + && IS_SINGLE_STREAM(rspec[k] & + RSPEC_RATE_MASK)) { + preamble_type[k] = WLC_MM_PREAMBLE; + } + } + + /* should be better conditionalized */ + if (!IS_MCS(rspec[0]) + && (tx_info->control.rates[0]. + flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)) + preamble_type[k] = WLC_SHORT_PREAMBLE; + } + } else { + for (k = 0; k < hw->max_rates; k++) { + /* Set ctrlchbw as 20Mhz */ + rspec[k] &= ~RSPEC_BW_MASK; + rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT); + + /* for nphy, stf of ofdm frames must follow policies */ + if (WLCISNPHY(wlc->band) && IS_OFDM(rspec[k])) { + rspec[k] &= ~RSPEC_STF_MASK; + rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT; + } + } + } + + /* Reset these for use with AMPDU's */ + txrate[0]->count = 0; + txrate[1]->count = 0; + + /* (2) PROTECTION, may change rspec */ + if ((ieee80211_is_data(h->frame_control) || + ieee80211_is_mgmt(h->frame_control)) && + (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1)) + use_rts = true; + + /* (3) PLCP: determine PLCP header and MAC duration, fill d11txh_t */ + wlc_compute_plcp(wlc, rspec[0], phylen, plcp); + wlc_compute_plcp(wlc, rspec[1], phylen, plcp_fallback); + memcpy(&txh->FragPLCPFallback, + plcp_fallback, sizeof(txh->FragPLCPFallback)); + + /* Length field now put in CCK FBR CRC field */ + if (IS_CCK(rspec[1])) { + txh->FragPLCPFallback[4] = phylen & 0xff; + txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8; + } + + /* MIMO-RATE: need validation ?? */ + mainrates = + IS_OFDM(rspec[0]) ? D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) plcp) : + plcp[0]; + + /* DUR field for main rate */ + if (!ieee80211_is_pspoll(h->frame_control) && + !is_multicast_ether_addr(h->addr1) && !use_rifs) { + durid = + wlc_compute_frame_dur(wlc, rspec[0], preamble_type[0], + next_frag_len); + h->duration_id = cpu_to_le16(durid); + } else if (use_rifs) { + /* NAV protect to end of next max packet size */ + durid = + (u16) wlc_calc_frame_time(wlc, rspec[0], + preamble_type[0], + DOT11_MAX_FRAG_LEN); + durid += RIFS_11N_TIME; + h->duration_id = cpu_to_le16(durid); + } + + /* DUR field for fallback rate */ + if (ieee80211_is_pspoll(h->frame_control)) + txh->FragDurFallback = h->duration_id; + else if (is_multicast_ether_addr(h->addr1) || use_rifs) + txh->FragDurFallback = 0; + else { + durid = wlc_compute_frame_dur(wlc, rspec[1], + preamble_type[1], next_frag_len); + txh->FragDurFallback = cpu_to_le16(durid); + } + + /* (4) MAC-HDR: MacTxControlLow */ + if (frag == 0) + mcl |= TXC_STARTMSDU; + + if (!is_multicast_ether_addr(h->addr1)) + mcl |= TXC_IMMEDACK; + + if (BAND_5G(wlc->band->bandtype)) + mcl |= TXC_FREQBAND_5G; + + if (CHSPEC_IS40(WLC_BAND_PI_RADIO_CHANSPEC)) + mcl |= TXC_BW_40; + + /* set AMIC bit if using hardware TKIP MIC */ + if (hwtkmic) + mcl |= TXC_AMIC; + + txh->MacTxControlLow = cpu_to_le16(mcl); + + /* MacTxControlHigh */ + mch = 0; + + /* Set fallback rate preamble type */ + if ((preamble_type[1] == WLC_SHORT_PREAMBLE) || + (preamble_type[1] == WLC_GF_PREAMBLE)) { + if (RSPEC2RATE(rspec[1]) != WLC_RATE_1M) + mch |= TXC_PREAMBLE_DATA_FB_SHORT; + } + + /* MacFrameControl */ + memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16)); + txh->TxFesTimeNormal = cpu_to_le16(0); + + txh->TxFesTimeFallback = cpu_to_le16(0); + + /* TxFrameRA */ + memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN); + + /* TxFrameID */ + txh->TxFrameID = cpu_to_le16(frameid); + + /* TxStatus, Note the case of recreating the first frag of a suppressed frame + * then we may need to reset the retry cnt's via the status reg + */ + txh->TxStatus = cpu_to_le16(status); + + /* extra fields for ucode AMPDU aggregation, the new fields are added to + * the END of previous structure so that it's compatible in driver. + */ + txh->MaxNMpdus = cpu_to_le16(0); + txh->MaxABytes_MRT = cpu_to_le16(0); + txh->MaxABytes_FBR = cpu_to_le16(0); + txh->MinMBytes = cpu_to_le16(0); + + /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration, furnish d11txh_t */ + /* RTS PLCP header and RTS frame */ + if (use_rts || use_cts) { + if (use_rts && use_cts) + use_cts = false; + + for (k = 0; k < 2; k++) { + rts_rspec[k] = wlc_rspec_to_rts_rspec(wlc, rspec[k], + false, + mimo_ctlchbw); + } + + if (!IS_OFDM(rts_rspec[0]) && + !((RSPEC2RATE(rts_rspec[0]) == WLC_RATE_1M) || + (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { + rts_preamble_type[0] = WLC_SHORT_PREAMBLE; + mch |= TXC_PREAMBLE_RTS_MAIN_SHORT; + } + + if (!IS_OFDM(rts_rspec[1]) && + !((RSPEC2RATE(rts_rspec[1]) == WLC_RATE_1M) || + (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { + rts_preamble_type[1] = WLC_SHORT_PREAMBLE; + mch |= TXC_PREAMBLE_RTS_FB_SHORT; + } + + /* RTS/CTS additions to MacTxControlLow */ + if (use_cts) { + txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS); + } else { + txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS); + txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME); + } + + /* RTS PLCP header */ + rts_plcp = txh->RTSPhyHeader; + if (use_cts) + rts_phylen = DOT11_CTS_LEN + FCS_LEN; + else + rts_phylen = DOT11_RTS_LEN + FCS_LEN; + + wlc_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp); + + /* fallback rate version of RTS PLCP header */ + wlc_compute_plcp(wlc, rts_rspec[1], rts_phylen, + rts_plcp_fallback); + memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback, + sizeof(txh->RTSPLCPFallback)); + + /* RTS frame fields... */ + rts = (struct ieee80211_rts *)&txh->rts_frame; + + durid = wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec[0], + rspec[0], rts_preamble_type[0], + preamble_type[0], phylen, false); + rts->duration = cpu_to_le16(durid); + /* fallback rate version of RTS DUR field */ + durid = wlc_compute_rtscts_dur(wlc, use_cts, + rts_rspec[1], rspec[1], + rts_preamble_type[1], + preamble_type[1], phylen, false); + txh->RTSDurFallback = cpu_to_le16(durid); + + if (use_cts) { + rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | + IEEE80211_STYPE_CTS); + + memcpy(&rts->ra, &h->addr2, ETH_ALEN); + } else { + rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | + IEEE80211_STYPE_RTS); + + memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN); + } + + /* mainrate + * low 8 bits: main frag rate/mcs, + * high 8 bits: rts/cts rate/mcs + */ + mainrates |= (IS_OFDM(rts_rspec[0]) ? + D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) rts_plcp) : + rts_plcp[0]) << 8; + } else { + memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN); + memset((char *)&txh->rts_frame, 0, + sizeof(struct ieee80211_rts)); + memset((char *)txh->RTSPLCPFallback, 0, + sizeof(txh->RTSPLCPFallback)); + txh->RTSDurFallback = 0; + } + +#ifdef SUPPORT_40MHZ + /* add null delimiter count */ + if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && IS_MCS(rspec)) { + txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = + wlc_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); + } +#endif + + /* Now that RTS/RTS FB preamble types are updated, write the final value */ + txh->MacTxControlHigh = cpu_to_le16(mch); + + /* MainRates (both the rts and frag plcp rates have been calculated now) */ + txh->MainRates = cpu_to_le16(mainrates); + + /* XtraFrameTypes */ + xfts = FRAMETYPE(rspec[1], wlc->mimoft); + xfts |= (FRAMETYPE(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT); + xfts |= (FRAMETYPE(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT); + xfts |= + CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC) << XFTS_CHANNEL_SHIFT; + txh->XtraFrameTypes = cpu_to_le16(xfts); + + /* PhyTxControlWord */ + phyctl = FRAMETYPE(rspec[0], wlc->mimoft); + if ((preamble_type[0] == WLC_SHORT_PREAMBLE) || + (preamble_type[0] == WLC_GF_PREAMBLE)) { + if (RSPEC2RATE(rspec[0]) != WLC_RATE_1M) + phyctl |= PHY_TXC_SHORT_HDR; + } + + /* phytxant is properly bit shifted */ + phyctl |= wlc_stf_d11hdrs_phyctl_txant(wlc, rspec[0]); + txh->PhyTxControlWord = cpu_to_le16(phyctl); + + /* PhyTxControlWord_1 */ + if (WLC_PHY_11N_CAP(wlc->band)) { + u16 phyctl1 = 0; + + phyctl1 = wlc_phytxctl1_calc(wlc, rspec[0]); + txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1); + phyctl1 = wlc_phytxctl1_calc(wlc, rspec[1]); + txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1); + + if (use_rts || use_cts) { + phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[0]); + txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1); + phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[1]); + txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1); + } + + /* + * For mcs frames, if mixedmode(overloaded with long preamble) is going to be set, + * fill in non-zero MModeLen and/or MModeFbrLen + * it will be unnecessary if they are separated + */ + if (IS_MCS(rspec[0]) && (preamble_type[0] == WLC_MM_PREAMBLE)) { + u16 mmodelen = + wlc_calc_lsig_len(wlc, rspec[0], phylen); + txh->MModeLen = cpu_to_le16(mmodelen); + } + + if (IS_MCS(rspec[1]) && (preamble_type[1] == WLC_MM_PREAMBLE)) { + u16 mmodefbrlen = + wlc_calc_lsig_len(wlc, rspec[1], phylen); + txh->MModeFbrLen = cpu_to_le16(mmodefbrlen); + } + } + + ac = skb_get_queue_mapping(p); + if (SCB_WME(scb) && qos && wlc->edcf_txop[ac]) { + uint frag_dur, dur, dur_fallback; + + /* WME: Update TXOP threshold */ + if ((!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) && (frag == 0)) { + frag_dur = + wlc_calc_frame_time(wlc, rspec[0], preamble_type[0], + phylen); + + if (rts) { + /* 1 RTS or CTS-to-self frame */ + dur = + wlc_calc_cts_time(wlc, rts_rspec[0], + rts_preamble_type[0]); + dur_fallback = + wlc_calc_cts_time(wlc, rts_rspec[1], + rts_preamble_type[1]); + /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */ + dur += le16_to_cpu(rts->duration); + dur_fallback += + le16_to_cpu(txh->RTSDurFallback); + } else if (use_rifs) { + dur = frag_dur; + dur_fallback = 0; + } else { + /* frame + SIFS + ACK */ + dur = frag_dur; + dur += + wlc_compute_frame_dur(wlc, rspec[0], + preamble_type[0], 0); + + dur_fallback = + wlc_calc_frame_time(wlc, rspec[1], + preamble_type[1], + phylen); + dur_fallback += + wlc_compute_frame_dur(wlc, rspec[1], + preamble_type[1], 0); + } + /* NEED to set TxFesTimeNormal (hard) */ + txh->TxFesTimeNormal = cpu_to_le16((u16) dur); + /* NEED to set fallback rate version of TxFesTimeNormal (hard) */ + txh->TxFesTimeFallback = + cpu_to_le16((u16) dur_fallback); + + /* update txop byte threshold (txop minus intraframe overhead) */ + if (wlc->edcf_txop[ac] >= (dur - frag_dur)) { + { + uint newfragthresh; + + newfragthresh = + wlc_calc_frame_len(wlc, rspec[0], + preamble_type[0], + (wlc-> + edcf_txop[ac] - + (dur - + frag_dur))); + /* range bound the fragthreshold */ + if (newfragthresh < DOT11_MIN_FRAG_LEN) + newfragthresh = + DOT11_MIN_FRAG_LEN; + else if (newfragthresh > + wlc->usr_fragthresh) + newfragthresh = + wlc->usr_fragthresh; + /* update the fragthresh and do txc update */ + if (wlc->fragthresh[queue] != + (u16) newfragthresh) { + wlc->fragthresh[queue] = + (u16) newfragthresh; + } + } + } else + wiphy_err(wlc->wiphy, "wl%d: %s txop invalid " + "for rate %d\n", + wlc->pub->unit, fifo_names[queue], + RSPEC2RATE(rspec[0])); + + if (dur > wlc->edcf_txop[ac]) + wiphy_err(wlc->wiphy, "wl%d: %s: %s txop " + "exceeded phylen %d/%d dur %d/%d\n", + wlc->pub->unit, __func__, + fifo_names[queue], + phylen, wlc->fragthresh[queue], + dur, wlc->edcf_txop[ac]); + } + } + + return 0; +} + +void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) +{ + struct wlc_bsscfg *cfg = wlc->cfg; + + if (!cfg->BSS) { + /* DirFrmQ is now valid...defer setting until end of ATIM window */ + wlc->qvalid |= MCMD_DIRFRMQVAL; + } +} + +static void wlc_war16165(struct wlc_info *wlc, bool tx) +{ + if (tx) { + /* the post-increment is used in STAY_AWAKE macro */ + if (wlc->txpend16165war++ == 0) + wlc_set_ps_ctrl(wlc); + } else { + wlc->txpend16165war--; + if (wlc->txpend16165war == 0) + wlc_set_ps_ctrl(wlc); + } +} + +/* process an individual tx_status_t */ +/* WLC_HIGH_API */ +bool +wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) +{ + struct sk_buff *p; + uint queue; + d11txh_t *txh; + struct scb *scb = NULL; + bool free_pdu; + int tx_rts, tx_frame_count, tx_rts_count; + uint totlen, supr_status; + bool lastframe; + struct ieee80211_hdr *h; + u16 mcl; + struct ieee80211_tx_info *tx_info; + struct ieee80211_tx_rate *txrate; + int i; + + (void)(frm_tx2); /* Compiler reference to avoid unused variable warning */ + + /* discard intermediate indications for ucode with one legitimate case: + * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent + * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts + * transmission count) + */ + if (!(txs->status & TX_STATUS_AMPDU) + && (txs->status & TX_STATUS_INTERMEDIATE)) { + wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n", + __func__); + return false; + } + + queue = txs->frameid & TXFID_QUEUE_MASK; + if (queue >= NFIFO) { + p = NULL; + goto fatal; + } + + p = GETNEXTTXP(wlc, queue); + if (WLC_WAR16165(wlc)) + wlc_war16165(wlc, false); + if (p == NULL) + goto fatal; + + txh = (d11txh_t *) (p->data); + mcl = le16_to_cpu(txh->MacTxControlLow); + + if (txs->phyerr) { + if (WL_ERROR_ON()) { + wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n", + txs->phyerr, txh->MainRates); + wlc_print_txdesc(txh); + } + wlc_print_txstatus(txs); + } + + if (txs->frameid != cpu_to_le16(txh->TxFrameID)) + goto fatal; + tx_info = IEEE80211_SKB_CB(p); + h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); + + if (tx_info->control.sta) + scb = (struct scb *)tx_info->control.sta->drv_priv; + + if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { + wlc_ampdu_dotxstatus(wlc->ampdu, scb, p, txs); + return false; + } + + supr_status = txs->status & TX_STATUS_SUPR_MASK; + if (supr_status == TX_STATUS_SUPR_BADCH) + BCMMSG(wlc->wiphy, + "%s: Pkt tx suppressed, possibly channel %d\n", + __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec)); + + tx_rts = cpu_to_le16(txh->MacTxControlLow) & TXC_SENDRTS; + tx_frame_count = + (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT; + tx_rts_count = + (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT; + + lastframe = !ieee80211_has_morefrags(h->frame_control); + + if (!lastframe) { + wiphy_err(wlc->wiphy, "Not last frame!\n"); + } else { + u16 sfbl, lfbl; + ieee80211_tx_info_clear_status(tx_info); + if (queue < AC_COUNT) { + sfbl = WLC_WME_RETRY_SFB_GET(wlc, wme_fifo2ac[queue]); + lfbl = WLC_WME_RETRY_LFB_GET(wlc, wme_fifo2ac[queue]); + } else { + sfbl = wlc->SFBL; + lfbl = wlc->LFBL; + } + + txrate = tx_info->status.rates; + /* FIXME: this should use a combination of sfbl, lfbl depending on frame length and RTS setting */ + if ((tx_frame_count > sfbl) && (txrate[1].idx >= 0)) { + /* rate selection requested a fallback rate and we used it */ + txrate->count = lfbl; + txrate[1].count = tx_frame_count - lfbl; + } else { + /* rate selection did not request fallback rate, or we didn't need it */ + txrate->count = tx_frame_count; + /* rc80211_minstrel.c:minstrel_tx_status() expects unused rates to be marked with idx = -1 */ + txrate[1].idx = -1; + txrate[1].count = 0; + } + + /* clear the rest of the rates */ + for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) { + txrate[i].idx = -1; + txrate[i].count = 0; + } + + if (txs->status & TX_STATUS_ACK_RCV) + tx_info->flags |= IEEE80211_TX_STAT_ACK; + } + + totlen = brcmu_pkttotlen(p); + free_pdu = true; + + wlc_txfifo_complete(wlc, queue, 1); + + if (lastframe) { + p->next = NULL; + p->prev = NULL; + /* remove PLCP & Broadcom tx descriptor header */ + skb_pull(p, D11_PHY_HDR_LEN); + skb_pull(p, D11_TXH_LEN); + ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p); + } else { + wiphy_err(wlc->wiphy, "%s: Not last frame => not calling " + "tx_status\n", __func__); + } + + return false; + + fatal: + if (p) + brcmu_pkt_buf_free_skb(p); + + return true; + +} + +void +wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend) +{ + TXPKTPENDDEC(wlc, fifo, txpktpend); + BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend, + TXPKTPENDGET(wlc, fifo)); + + /* There is more room; mark precedences related to this FIFO sendable */ + WLC_TX_FIFO_ENAB(wlc, fifo); + + /* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */ + if (AP_ENAB(wlc->pub) && + !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { + wlc_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, WLC_BAND_AUTO); + } + + /* figure out which bsscfg is being worked on... */ +} + +/* Update beacon listen interval in shared memory */ +void wlc_bcn_li_upd(struct wlc_info *wlc) +{ + if (AP_ENAB(wlc->pub)) + return; + + /* wake up every DTIM is the default */ + if (wlc->bcn_li_dtim == 1) + wlc_write_shm(wlc, M_BCN_LI, 0); + else + wlc_write_shm(wlc, M_BCN_LI, + (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn); +} + +/* + * recover 64bit TSF value from the 16bit TSF value in the rx header + * given the assumption that the TSF passed in header is within 65ms + * of the current tsf. + * + * 6 5 4 4 3 2 1 + * 3.......6.......8.......0.......2.......4.......6.......8......0 + * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->| + * + * The RxTSFTime are the lowest 16 bits and provided by the ucode. The + * tsf_l is filled in by wlc_bmac_recv, which is done earlier in the + * receive call sequence after rx interrupt. Only the higher 16 bits + * are used. Finally, the tsf_h is read from the tsf register. + */ +static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh) +{ + u32 tsf_h, tsf_l; + u16 rx_tsf_0_15, rx_tsf_16_31; + + wlc_bmac_read_tsf(wlc->hw, &tsf_l, &tsf_h); + + rx_tsf_16_31 = (u16)(tsf_l >> 16); + rx_tsf_0_15 = rxh->rxhdr.RxTSFTime; + + /* + * a greater tsf time indicates the low 16 bits of + * tsf_l wrapped, so decrement the high 16 bits. + */ + if ((u16)tsf_l < rx_tsf_0_15) { + rx_tsf_16_31 -= 1; + if (rx_tsf_16_31 == 0xffff) + tsf_h -= 1; + } + + return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15); +} + +static void +prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, + struct ieee80211_rx_status *rx_status) +{ + wlc_d11rxhdr_t *wlc_rxh = (wlc_d11rxhdr_t *) rxh; + int preamble; + int channel; + ratespec_t rspec; + unsigned char *plcp; + + /* fill in TSF and flag its presence */ + rx_status->mactime = wlc_recover_tsf64(wlc, wlc_rxh); + rx_status->flag |= RX_FLAG_MACTIME_MPDU; + + channel = WLC_CHAN_CHANNEL(rxh->RxChan); + + if (channel > 14) { + rx_status->band = IEEE80211_BAND_5GHZ; + rx_status->freq = ieee80211_ofdm_chan_to_freq( + WF_CHAN_FACTOR_5_G/2, channel); + + } else { + rx_status->band = IEEE80211_BAND_2GHZ; + rx_status->freq = ieee80211_dsss_chan_to_freq(channel); + } + + rx_status->signal = wlc_rxh->rssi; /* signal */ + + /* noise */ + /* qual */ + rx_status->antenna = (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; /* ant */ + + plcp = p->data; + + rspec = wlc_compute_rspec(rxh, plcp); + if (IS_MCS(rspec)) { + rx_status->rate_idx = rspec & RSPEC_RATE_MASK; + rx_status->flag |= RX_FLAG_HT; + if (RSPEC_IS40MHZ(rspec)) + rx_status->flag |= RX_FLAG_40MHZ; + } else { + switch (RSPEC2RATE(rspec)) { + case WLC_RATE_1M: + rx_status->rate_idx = 0; + break; + case WLC_RATE_2M: + rx_status->rate_idx = 1; + break; + case WLC_RATE_5M5: + rx_status->rate_idx = 2; + break; + case WLC_RATE_11M: + rx_status->rate_idx = 3; + break; + case WLC_RATE_6M: + rx_status->rate_idx = 4; + break; + case WLC_RATE_9M: + rx_status->rate_idx = 5; + break; + case WLC_RATE_12M: + rx_status->rate_idx = 6; + break; + case WLC_RATE_18M: + rx_status->rate_idx = 7; + break; + case WLC_RATE_24M: + rx_status->rate_idx = 8; + break; + case WLC_RATE_36M: + rx_status->rate_idx = 9; + break; + case WLC_RATE_48M: + rx_status->rate_idx = 10; + break; + case WLC_RATE_54M: + rx_status->rate_idx = 11; + break; + default: + wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__); + } + + /* Determine short preamble and rate_idx */ + preamble = 0; + if (IS_CCK(rspec)) { + if (rxh->PhyRxStatus_0 & PRXS0_SHORTH) + rx_status->flag |= RX_FLAG_SHORTPRE; + } else if (IS_OFDM(rspec)) { + rx_status->flag |= RX_FLAG_SHORTPRE; + } else { + wiphy_err(wlc->wiphy, "%s: Unknown modulation\n", + __func__); + } + } + + if (PLCP3_ISSGI(plcp[3])) + rx_status->flag |= RX_FLAG_SHORT_GI; + + if (rxh->RxStatus1 & RXS_DECERR) { + rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC; + wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n", + __func__); + } + if (rxh->RxStatus1 & RXS_FCSERR) { + rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; + wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n", + __func__); + } +} + +static void +wlc_recvctl(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p) +{ + int len_mpdu; + struct ieee80211_rx_status rx_status; + + memset(&rx_status, 0, sizeof(rx_status)); + prep_mac80211_status(wlc, rxh, p, &rx_status); + + /* mac header+body length, exclude CRC and plcp header */ + len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN; + skb_pull(p, D11_PHY_HDR_LEN); + __skb_trim(p, len_mpdu); + + memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status)); + ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p); + return; +} + +/* Process received frames */ +/* + * Return true if more frames need to be processed. false otherwise. + * Param 'bound' indicates max. # frames to process before break out. + */ +/* WLC_HIGH_API */ +void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) +{ + d11rxhdr_t *rxh; + struct ieee80211_hdr *h; + uint len; + bool is_amsdu; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); + + /* frame starts with rxhdr */ + rxh = (d11rxhdr_t *) (p->data); + + /* strip off rxhdr */ + skb_pull(p, WL_HWRXOFF); + + /* fixup rx header endianness */ + rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize); + rxh->PhyRxStatus_0 = le16_to_cpu(rxh->PhyRxStatus_0); + rxh->PhyRxStatus_1 = le16_to_cpu(rxh->PhyRxStatus_1); + rxh->PhyRxStatus_2 = le16_to_cpu(rxh->PhyRxStatus_2); + rxh->PhyRxStatus_3 = le16_to_cpu(rxh->PhyRxStatus_3); + rxh->PhyRxStatus_4 = le16_to_cpu(rxh->PhyRxStatus_4); + rxh->PhyRxStatus_5 = le16_to_cpu(rxh->PhyRxStatus_5); + rxh->RxStatus1 = le16_to_cpu(rxh->RxStatus1); + rxh->RxStatus2 = le16_to_cpu(rxh->RxStatus2); + rxh->RxTSFTime = le16_to_cpu(rxh->RxTSFTime); + rxh->RxChan = le16_to_cpu(rxh->RxChan); + + /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */ + if (rxh->RxStatus1 & RXS_PBPRES) { + if (p->len < 2) { + wiphy_err(wlc->wiphy, "wl%d: wlc_recv: rcvd runt of " + "len %d\n", wlc->pub->unit, p->len); + goto toss; + } + skb_pull(p, 2); + } + + h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN); + len = p->len; + + if (rxh->RxStatus1 & RXS_FCSERR) { + if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) { + wiphy_err(wlc->wiphy, "FCSERR while scanning******* -" + " tossing\n"); + goto toss; + } else { + wiphy_err(wlc->wiphy, "RCSERR!!!\n"); + goto toss; + } + } + + /* check received pkt has at least frame control field */ + if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control)) { + goto toss; + } + + is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK; + + /* explicitly test bad src address to avoid sending bad deauth */ + if (!is_amsdu) { + /* CTS and ACK CTL frames are w/o a2 */ + + if (ieee80211_is_data(h->frame_control) || + ieee80211_is_mgmt(h->frame_control)) { + if ((is_zero_ether_addr(h->addr2) || + is_multicast_ether_addr(h->addr2))) { + wiphy_err(wlc->wiphy, "wl%d: %s: dropping a " + "frame with invalid src mac address," + " a2: %pM\n", + wlc->pub->unit, __func__, h->addr2); + goto toss; + } + } + } + + /* due to sheer numbers, toss out probe reqs for now */ + if (ieee80211_is_probe_req(h->frame_control)) + goto toss; + + if (is_amsdu) + goto toss; + + wlc_recvctl(wlc, rxh, p); + return; + + toss: + brcmu_pkt_buf_free_skb(p); +} + +/* calculate frame duration for Mixed-mode L-SIG spoofing, return + * number of bytes goes in the length field + * + * Formula given by HT PHY Spec v 1.13 + * len = 3(nsyms + nstream + 3) - 3 + */ +u16 +wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, uint mac_len) +{ + uint nsyms, len = 0, kNdps; + + BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n", + wlc->pub->unit, RSPEC2RATE(ratespec), mac_len); + + if (IS_MCS(ratespec)) { + uint mcs = ratespec & RSPEC_RATE_MASK; + /* MCS_TXS(mcs) returns num tx streams - 1 */ + int tot_streams = (MCS_TXS(mcs) + 1) + RSPEC_STC(ratespec); + + /* the payload duration calculation matches that of regular ofdm */ + /* 1000Ndbps = kbps * 4 */ + kNdps = + MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), + RSPEC_ISSGI(ratespec)) * 4; + + if (RSPEC_STC(ratespec) == 0) + /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ + nsyms = + CEIL((APHY_SERVICE_NBITS + 8 * mac_len + + APHY_TAIL_NBITS) * 1000, kNdps); + else + /* STBC needs to have even number of symbols */ + nsyms = + 2 * + CEIL((APHY_SERVICE_NBITS + 8 * mac_len + + APHY_TAIL_NBITS) * 1000, 2 * kNdps); + + nsyms += (tot_streams + 3); /* (+3) account for HT-SIG(2) and HT-STF(1) */ + /* 3 bytes/symbol @ legacy 6Mbps rate */ + len = (3 * nsyms) - 3; /* (-3) excluding service bits and tail bits */ + } + + return (u16) len; +} + +/* calculate frame duration of a given rate and length, return time in usec unit */ +uint +wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, + uint mac_len) +{ + uint nsyms, dur = 0, Ndps, kNdps; + uint rate = RSPEC2RATE(ratespec); + + if (rate == 0) { + wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n", + wlc->pub->unit); + rate = WLC_RATE_1M; + } + + BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n", + wlc->pub->unit, ratespec, preamble_type, mac_len); + + if (IS_MCS(ratespec)) { + uint mcs = ratespec & RSPEC_RATE_MASK; + int tot_streams = MCS_TXS(mcs) + RSPEC_STC(ratespec); + + dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); + if (preamble_type == WLC_MM_PREAMBLE) + dur += PREN_MM_EXT; + /* 1000Ndbps = kbps * 4 */ + kNdps = + MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), + RSPEC_ISSGI(ratespec)) * 4; + + if (RSPEC_STC(ratespec) == 0) + /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ + nsyms = + CEIL((APHY_SERVICE_NBITS + 8 * mac_len + + APHY_TAIL_NBITS) * 1000, kNdps); + else + /* STBC needs to have even number of symbols */ + nsyms = + 2 * + CEIL((APHY_SERVICE_NBITS + 8 * mac_len + + APHY_TAIL_NBITS) * 1000, 2 * kNdps); + + dur += APHY_SYMBOL_TIME * nsyms; + if (BAND_2G(wlc->band->bandtype)) + dur += DOT11_OFDM_SIGNAL_EXTENSION; + } else if (IS_OFDM(rate)) { + dur = APHY_PREAMBLE_TIME; + dur += APHY_SIGNAL_TIME; + /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ + Ndps = rate * 2; + /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ + nsyms = + CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS), + Ndps); + dur += APHY_SYMBOL_TIME * nsyms; + if (BAND_2G(wlc->band->bandtype)) + dur += DOT11_OFDM_SIGNAL_EXTENSION; + } else { + /* calc # bits * 2 so factor of 2 in rate (1/2 mbps) will divide out */ + mac_len = mac_len * 8 * 2; + /* calc ceiling of bits/rate = microseconds of air time */ + dur = (mac_len + rate - 1) / rate; + if (preamble_type & WLC_SHORT_PREAMBLE) + dur += BPHY_PLCP_SHORT_TIME; + else + dur += BPHY_PLCP_TIME; + } + return dur; +} + +/* The opposite of wlc_calc_frame_time */ +static uint +wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, + uint dur) +{ + uint nsyms, mac_len, Ndps, kNdps; + uint rate = RSPEC2RATE(ratespec); + + BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n", + wlc->pub->unit, ratespec, preamble_type, dur); + + if (IS_MCS(ratespec)) { + uint mcs = ratespec & RSPEC_RATE_MASK; + int tot_streams = MCS_TXS(mcs) + RSPEC_STC(ratespec); + dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); + /* payload calculation matches that of regular ofdm */ + if (BAND_2G(wlc->band->bandtype)) + dur -= DOT11_OFDM_SIGNAL_EXTENSION; + /* kNdbps = kbps * 4 */ + kNdps = + MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), + RSPEC_ISSGI(ratespec)) * 4; + nsyms = dur / APHY_SYMBOL_TIME; + mac_len = + ((nsyms * kNdps) - + ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000; + } else if (IS_OFDM(ratespec)) { + dur -= APHY_PREAMBLE_TIME; + dur -= APHY_SIGNAL_TIME; + /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ + Ndps = rate * 2; + nsyms = dur / APHY_SYMBOL_TIME; + mac_len = + ((nsyms * Ndps) - + (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8; + } else { + if (preamble_type & WLC_SHORT_PREAMBLE) + dur -= BPHY_PLCP_SHORT_TIME; + else + dur -= BPHY_PLCP_TIME; + mac_len = dur * rate; + /* divide out factor of 2 in rate (1/2 mbps) */ + mac_len = mac_len / 8 / 2; + } + return mac_len; +} + +static uint +wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +{ + BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, " + "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); + /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than + * or equal to the rate of the immediately previous frame in the FES + */ + rspec = WLC_BASIC_RATE(wlc, rspec); + /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */ + return wlc_calc_frame_time(wlc, rspec, preamble_type, + (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN + + FCS_LEN)); +} + +static uint +wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +{ + uint dur = 0; + + BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n", + wlc->pub->unit, rspec, preamble_type); + /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than + * or equal to the rate of the immediately previous frame in the FES + */ + rspec = WLC_BASIC_RATE(wlc, rspec); + /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */ + dur = + wlc_calc_frame_time(wlc, rspec, preamble_type, + (DOT11_ACK_LEN + FCS_LEN)); + return dur; +} + +static uint +wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +{ + BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n", + wlc->pub->unit, rspec, preamble_type); + return wlc_calc_ack_time(wlc, rspec, preamble_type); +} + +/* derive wlc->band->basic_rate[] table from 'rateset' */ +void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) +{ + u8 rate; + u8 mandatory; + u8 cck_basic = 0; + u8 ofdm_basic = 0; + u8 *br = wlc->band->basic_rate; + uint i; + + /* incoming rates are in 500kbps units as in 802.11 Supported Rates */ + memset(br, 0, WLC_MAXRATE + 1); + + /* For each basic rate in the rates list, make an entry in the + * best basic lookup. + */ + for (i = 0; i < rateset->count; i++) { + /* only make an entry for a basic rate */ + if (!(rateset->rates[i] & WLC_RATE_FLAG)) + continue; + + /* mask off basic bit */ + rate = (rateset->rates[i] & WLC_RATE_MASK); + + if (rate > WLC_MAXRATE) { + wiphy_err(wlc->wiphy, "wlc_rate_lookup_init: invalid " + "rate 0x%X in rate set\n", + rateset->rates[i]); + continue; + } + + br[rate] = rate; + } + + /* The rate lookup table now has non-zero entries for each + * basic rate, equal to the basic rate: br[basicN] = basicN + * + * To look up the best basic rate corresponding to any + * particular rate, code can use the basic_rate table + * like this + * + * basic_rate = wlc->band->basic_rate[tx_rate] + * + * Make sure there is a best basic rate entry for + * every rate by walking up the table from low rates + * to high, filling in holes in the lookup table + */ + + for (i = 0; i < wlc->band->hw_rateset.count; i++) { + rate = wlc->band->hw_rateset.rates[i]; + + if (br[rate] != 0) { + /* This rate is a basic rate. + * Keep track of the best basic rate so far by + * modulation type. + */ + if (IS_OFDM(rate)) + ofdm_basic = rate; + else + cck_basic = rate; + + continue; + } + + /* This rate is not a basic rate so figure out the + * best basic rate less than this rate and fill in + * the hole in the table + */ + + br[rate] = IS_OFDM(rate) ? ofdm_basic : cck_basic; + + if (br[rate] != 0) + continue; + + if (IS_OFDM(rate)) { + /* In 11g and 11a, the OFDM mandatory rates are 6, 12, and 24 Mbps */ + if (rate >= WLC_RATE_24M) + mandatory = WLC_RATE_24M; + else if (rate >= WLC_RATE_12M) + mandatory = WLC_RATE_12M; + else + mandatory = WLC_RATE_6M; + } else { + /* In 11b, all the CCK rates are mandatory 1 - 11 Mbps */ + mandatory = rate; + } + + br[rate] = mandatory; + } +} + +static void wlc_write_rate_shm(struct wlc_info *wlc, u8 rate, u8 basic_rate) +{ + u8 phy_rate, index; + u8 basic_phy_rate, basic_index; + u16 dir_table, basic_table; + u16 basic_ptr; + + /* Shared memory address for the table we are reading */ + dir_table = IS_OFDM(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B; + + /* Shared memory address for the table we are writing */ + basic_table = IS_OFDM(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B; + + /* + * for a given rate, the LS-nibble of the PLCP SIGNAL field is + * the index into the rate table. + */ + phy_rate = rate_info[rate] & WLC_RATE_MASK; + basic_phy_rate = rate_info[basic_rate] & WLC_RATE_MASK; + index = phy_rate & 0xf; + basic_index = basic_phy_rate & 0xf; + + /* Find the SHM pointer to the ACK rate entry by looking in the + * Direct-map Table + */ + basic_ptr = wlc_read_shm(wlc, (dir_table + basic_index * 2)); + + /* Update the SHM BSS-basic-rate-set mapping table with the pointer + * to the correct basic rate for the given incoming rate + */ + wlc_write_shm(wlc, (basic_table + index * 2), basic_ptr); +} + +static const wlc_rateset_t *wlc_rateset_get_hwrs(struct wlc_info *wlc) +{ + const wlc_rateset_t *rs_dflt; + + if (WLC_PHY_11N_CAP(wlc->band)) { + if (BAND_5G(wlc->band->bandtype)) + rs_dflt = &ofdm_mimo_rates; + else + rs_dflt = &cck_ofdm_mimo_rates; + } else if (wlc->band->gmode) + rs_dflt = &cck_ofdm_rates; + else + rs_dflt = &cck_rates; + + return rs_dflt; +} + +void wlc_set_ratetable(struct wlc_info *wlc) +{ + const wlc_rateset_t *rs_dflt; + wlc_rateset_t rs; + u8 rate, basic_rate; + uint i; + + rs_dflt = wlc_rateset_get_hwrs(wlc); + + wlc_rateset_copy(rs_dflt, &rs); + wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); + + /* walk the phy rate table and update SHM basic rate lookup table */ + for (i = 0; i < rs.count; i++) { + rate = rs.rates[i] & WLC_RATE_MASK; + + /* for a given rate WLC_BASIC_RATE returns the rate at + * which a response ACK/CTS should be sent. + */ + basic_rate = WLC_BASIC_RATE(wlc, rate); + if (basic_rate == 0) { + /* This should only happen if we are using a + * restricted rateset. + */ + basic_rate = rs.rates[0] & WLC_RATE_MASK; + } + + wlc_write_rate_shm(wlc, rate, basic_rate); + } +} + +/* + * Return true if the specified rate is supported by the specified band. + * WLC_BAND_AUTO indicates the current band. + */ +bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rspec, int band, + bool verbose) +{ + wlc_rateset_t *hw_rateset; + uint i; + + if ((band == WLC_BAND_AUTO) || (band == wlc->band->bandtype)) { + hw_rateset = &wlc->band->hw_rateset; + } else if (NBANDS(wlc) > 1) { + hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset; + } else { + /* other band specified and we are a single band device */ + return false; + } + + /* check if this is a mimo rate */ + if (IS_MCS(rspec)) { + if (!VALID_MCS((rspec & RSPEC_RATE_MASK))) + goto error; + + return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK)); + } + + for (i = 0; i < hw_rateset->count; i++) + if (hw_rateset->rates[i] == RSPEC2RATE(rspec)) + return true; + error: + if (verbose) { + wiphy_err(wlc->wiphy, "wl%d: wlc_valid_rate: rate spec 0x%x " + "not in hw_rateset\n", wlc->pub->unit, rspec); + } + + return false; +} + +static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap) +{ + uint i; + struct wlcband *band; + + for (i = 0; i < NBANDS(wlc); i++) { + if (IS_SINGLEBAND_5G(wlc->deviceid)) + i = BAND_5G_INDEX; + band = wlc->bandstate[i]; + if (band->bandtype == WLC_BAND_5G) { + if ((bwcap == WLC_N_BW_40ALL) + || (bwcap == WLC_N_BW_20IN2G_40IN5G)) + band->mimo_cap_40 = true; + else + band->mimo_cap_40 = false; + } else { + if (bwcap == WLC_N_BW_40ALL) + band->mimo_cap_40 = true; + else + band->mimo_cap_40 = false; + } + } +} + +void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) +{ + const wlc_rateset_t *rs_dflt; + wlc_rateset_t rs; + u8 rate; + u16 entry_ptr; + u8 plcp[D11_PHY_HDR_LEN]; + u16 dur, sifs; + uint i; + + sifs = SIFS(wlc->band); + + rs_dflt = wlc_rateset_get_hwrs(wlc); + + wlc_rateset_copy(rs_dflt, &rs); + wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); + + /* walk the phy rate table and update MAC core SHM basic rate table entries */ + for (i = 0; i < rs.count; i++) { + rate = rs.rates[i] & WLC_RATE_MASK; + + entry_ptr = wlc_rate_shm_offset(wlc, rate); + + /* Calculate the Probe Response PLCP for the given rate */ + wlc_compute_plcp(wlc, rate, frame_len, plcp); + + /* Calculate the duration of the Probe Response frame plus SIFS for the MAC */ + dur = + (u16) wlc_calc_frame_time(wlc, rate, WLC_LONG_PREAMBLE, + frame_len); + dur += sifs; + + /* Update the SHM Rate Table entry Probe Response values */ + wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS, + (u16) (plcp[0] + (plcp[1] << 8))); + wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS + 2, + (u16) (plcp[2] + (plcp[3] << 8))); + wlc_write_shm(wlc, entry_ptr + M_RT_PRS_DUR_POS, dur); + } +} + +/* Max buffering needed for beacon template/prb resp template is 142 bytes. + * + * PLCP header is 6 bytes. + * 802.11 A3 header is 24 bytes. + * Max beacon frame body template length is 112 bytes. + * Max probe resp frame body template length is 110 bytes. + * + * *len on input contains the max length of the packet available. + * + * The *len value is set to the number of bytes in buf used, and starts with the PLCP + * and included up to, but not including, the 4 byte FCS. + */ +static void +wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, + struct wlc_bsscfg *cfg, u16 *buf, int *len) +{ + static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; + cck_phy_hdr_t *plcp; + struct ieee80211_mgmt *h; + int hdr_len, body_len; + + if (MBSS_BCN_ENAB(cfg) && type == IEEE80211_STYPE_BEACON) + hdr_len = DOT11_MAC_HDR_LEN; + else + hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN; + body_len = *len - hdr_len; /* calc buffer size provided for frame body */ + + *len = hdr_len + body_len; /* return actual size */ + + /* format PHY and MAC headers */ + memset((char *)buf, 0, hdr_len); + + plcp = (cck_phy_hdr_t *) buf; + + /* PLCP for Probe Response frames are filled in from core's rate table */ + if (type == IEEE80211_STYPE_BEACON && !MBSS_BCN_ENAB(cfg)) { + /* fill in PLCP */ + wlc_compute_plcp(wlc, bcn_rspec, + (DOT11_MAC_HDR_LEN + body_len + FCS_LEN), + (u8 *) plcp); + + } + /* "Regular" and 16 MBSS but not for 4 MBSS */ + /* Update the phytxctl for the beacon based on the rspec */ + if (!SOFTBCN_ENAB(cfg)) + wlc_beacon_phytxctl_txant_upd(wlc, bcn_rspec); + + if (MBSS_BCN_ENAB(cfg) && type == IEEE80211_STYPE_BEACON) + h = (struct ieee80211_mgmt *)&plcp[0]; + else + h = (struct ieee80211_mgmt *)&plcp[1]; + + /* fill in 802.11 header */ + h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type); + + /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */ + /* A1 filled in by MAC for prb resp, broadcast for bcn */ + if (type == IEEE80211_STYPE_BEACON) + memcpy(&h->da, ðer_bcast, ETH_ALEN); + memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN); + memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN); + + /* SEQ filled in by MAC */ + + return; +} + +int wlc_get_header_len() +{ + return TXOFF; +} + +/* Update a beacon for a particular BSS + * For MBSS, this updates the software template and sets "latest" to the index of the + * template updated. + * Otherwise, it updates the hardware template. + */ +void wlc_bss_update_beacon(struct wlc_info *wlc, struct wlc_bsscfg *cfg) +{ + int len = BCN_TMPL_LEN; + + /* Clear the soft intmask */ + wlc->defmacintmask &= ~MI_BCNTPL; + + if (!cfg->up) { /* Only allow updates on an UP bss */ + return; + } + + /* Optimize: Some of if/else could be combined */ + if (!MBSS_BCN_ENAB(cfg) && HWBCN_ENAB(cfg)) { + /* Hardware beaconing for this config */ + u16 bcn[BCN_TMPL_LEN / 2]; + u32 both_valid = MCMD_BCN0VLD | MCMD_BCN1VLD; + d11regs_t *regs = wlc->regs; + + /* Check if both templates are in use, if so sched. an interrupt + * that will call back into this routine + */ + if ((R_REG(®s->maccommand) & both_valid) == both_valid) { + /* clear any previous status */ + W_REG(®s->macintstatus, MI_BCNTPL); + } + /* Check that after scheduling the interrupt both of the + * templates are still busy. if not clear the int. & remask + */ + if ((R_REG(®s->maccommand) & both_valid) == both_valid) { + wlc->defmacintmask |= MI_BCNTPL; + return; + } + + wlc->bcn_rspec = + wlc_lowest_basic_rspec(wlc, &cfg->current_bss->rateset); + /* update the template and ucode shm */ + wlc_bcn_prb_template(wlc, IEEE80211_STYPE_BEACON, + wlc->bcn_rspec, cfg, bcn, &len); + wlc_write_hw_bcntemplates(wlc, bcn, len, false); + } +} + +/* + * Update all beacons for the system. + */ +void wlc_update_beacon(struct wlc_info *wlc) +{ + int idx; + struct wlc_bsscfg *bsscfg; + + /* update AP or IBSS beacons */ + FOREACH_BSS(wlc, idx, bsscfg) { + if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) + wlc_bss_update_beacon(wlc, bsscfg); + } +} + +/* Write ssid into shared memory */ +void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg) +{ + u8 *ssidptr = cfg->SSID; + u16 base = M_SSID; + u8 ssidbuf[IEEE80211_MAX_SSID_LEN]; + + /* padding the ssid with zero and copy it into shm */ + memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN); + memcpy(ssidbuf, ssidptr, cfg->SSID_len); + + wlc_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN); + + if (!MBSS_BCN_ENAB(cfg)) + wlc_write_shm(wlc, M_SSIDLEN, (u16) cfg->SSID_len); +} + +void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend) +{ + int idx; + struct wlc_bsscfg *bsscfg; + + /* update AP or IBSS probe responses */ + FOREACH_BSS(wlc, idx, bsscfg) { + if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) + wlc_bss_update_probe_resp(wlc, bsscfg, suspend); + } +} + +void +wlc_bss_update_probe_resp(struct wlc_info *wlc, struct wlc_bsscfg *cfg, + bool suspend) +{ + u16 prb_resp[BCN_TMPL_LEN / 2]; + int len = BCN_TMPL_LEN; + + /* write the probe response to hardware, or save in the config structure */ + if (!MBSS_PRB_ENAB(cfg)) { + + /* create the probe response template */ + wlc_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0, cfg, + prb_resp, &len); + + if (suspend) + wlc_suspend_mac_and_wait(wlc); + + /* write the probe response into the template region */ + wlc_bmac_write_template_ram(wlc->hw, T_PRS_TPL_BASE, + (len + 3) & ~3, prb_resp); + + /* write the length of the probe response frame (+PLCP/-FCS) */ + wlc_write_shm(wlc, M_PRB_RESP_FRM_LEN, (u16) len); + + /* write the SSID and SSID length */ + wlc_shm_ssid_upd(wlc, cfg); + + /* + * Write PLCP headers and durations for probe response frames at all rates. + * Use the actual frame length covered by the PLCP header for the call to + * wlc_mod_prb_rsp_rate_table() by subtracting the PLCP len and adding the FCS. + */ + len += (-D11_PHY_HDR_LEN + FCS_LEN); + wlc_mod_prb_rsp_rate_table(wlc, (u16) len); + + if (suspend) + wlc_enable_mac(wlc); + } else { /* Generating probe resp in sw; update local template */ + /* error: No software probe response support without MBSS */ + } +} + +/* prepares pdu for transmission. returns BCM error codes */ +int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifop) +{ + uint fifo; + d11txh_t *txh; + struct ieee80211_hdr *h; + struct scb *scb; + + txh = (d11txh_t *) (pdu->data); + h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); + + /* get the pkt queue info. This was put at wlc_sendctl or wlc_send for PDU */ + fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK; + + scb = NULL; + + *fifop = fifo; + + /* return if insufficient dma resources */ + if (TXAVAIL(wlc, fifo) < MAX_DMA_SEGS) { + /* Mark precedences related to this FIFO, unsendable */ + WLC_TX_FIFO_CLEAR(wlc, fifo); + return -EBUSY; + } + return 0; +} + +/* init tx reported rate mechanism */ +void wlc_reprate_init(struct wlc_info *wlc) +{ + int i; + struct wlc_bsscfg *bsscfg; + + FOREACH_BSS(wlc, i, bsscfg) { + wlc_bsscfg_reprate_init(bsscfg); + } +} + +/* per bsscfg init tx reported rate mechanism */ +void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg) +{ + bsscfg->txrspecidx = 0; + memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec)); +} + +void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs) +{ + wlc_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype, + false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), + CHSPEC_WLC_BW(wlc->default_bss->chanspec), + wlc->stf->txstreams); +} + +static void wlc_bss_default_init(struct wlc_info *wlc) +{ + chanspec_t chanspec; + struct wlcband *band; + wlc_bss_info_t *bi = wlc->default_bss; + + /* init default and target BSS with some sane initial values */ + memset((char *)(bi), 0, sizeof(wlc_bss_info_t)); + bi->beacon_period = ISSIM_ENAB(wlc->pub->sih) ? BEACON_INTERVAL_DEF_QT : + BEACON_INTERVAL_DEFAULT; + bi->dtim_period = ISSIM_ENAB(wlc->pub->sih) ? DTIM_INTERVAL_DEF_QT : + DTIM_INTERVAL_DEFAULT; + + /* fill the default channel as the first valid channel + * starting from the 2G channels + */ + chanspec = CH20MHZ_CHSPEC(1); + wlc->home_chanspec = bi->chanspec = chanspec; + + /* find the band of our default channel */ + band = wlc->band; + if (NBANDS(wlc) > 1 && band->bandunit != CHSPEC_WLCBANDUNIT(chanspec)) + band = wlc->bandstate[OTHERBANDUNIT(wlc)]; + + /* init bss rates to the band specific default rate set */ + wlc_rateset_default(&bi->rateset, NULL, band->phytype, band->bandtype, + false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), + CHSPEC_WLC_BW(chanspec), wlc->stf->txstreams); + + if (N_ENAB(wlc->pub)) + bi->flags |= WLC_BSS_HT; +} + +static ratespec_t +mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, + u32 int_val) +{ + u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT; + u8 rate = int_val & NRATE_RATE_MASK; + ratespec_t rspec; + bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE); + bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT); + bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY) + == NRATE_OVERRIDE_MCS_ONLY); + int bcmerror = 0; + + if (!ismcs) { + return (ratespec_t) rate; + } + + /* validate the combination of rate/mcs/stf is allowed */ + if (N_ENAB(wlc->pub) && ismcs) { + /* mcs only allowed when nmode */ + if (stf > PHY_TXC1_MODE_SDM) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n", + WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + + /* mcs 32 is a special case, DUP mode 40 only */ + if (rate == 32) { + if (!CHSPEC_IS40(wlc->home_chanspec) || + ((stf != PHY_TXC1_MODE_SISO) + && (stf != PHY_TXC1_MODE_CDD))) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs " + "32\n", WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + /* mcs > 7 must use stf SDM */ + } else if (rate > HIGHEST_SINGLE_STREAM_MCS) { + /* mcs > 7 must use stf SDM */ + if (stf != PHY_TXC1_MODE_SDM) { + BCMMSG(wlc->wiphy, "wl%d: enabling " + "SDM mode for mcs %d\n", + WLCWLUNIT(wlc), rate); + stf = PHY_TXC1_MODE_SDM; + } + } else { + /* MCS 0-7 may use SISO, CDD, and for phy_rev >= 3 STBC */ + if ((stf > PHY_TXC1_MODE_STBC) || + (!WLC_STBC_CAP_PHY(wlc) + && (stf == PHY_TXC1_MODE_STBC))) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC" + "\n", WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + } + } else if (IS_OFDM(rate)) { + if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n", + WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + } else if (IS_CCK(rate)) { + if ((cur_band->bandtype != WLC_BAND_2G) + || (stf != PHY_TXC1_MODE_SISO)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n", + WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + } else { + wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n", + WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + /* make sure multiple antennae are available for non-siso rates */ + if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) { + wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO " + "request\n", WLCWLUNIT(wlc), __func__); + bcmerror = -EINVAL; + goto done; + } + + rspec = rate; + if (ismcs) { + rspec |= RSPEC_MIMORATE; + /* For STBC populate the STC field of the ratespec */ + if (stf == PHY_TXC1_MODE_STBC) { + u8 stc; + stc = 1; /* Nss for single stream is always 1 */ + rspec |= (stc << RSPEC_STC_SHIFT); + } + } + + rspec |= (stf << RSPEC_STF_SHIFT); + + if (override_mcs_only) + rspec |= RSPEC_OVERRIDE_MCS_ONLY; + + if (issgi) + rspec |= RSPEC_SHORT_GI; + + if ((rate != 0) + && !wlc_valid_rate(wlc, rspec, cur_band->bandtype, true)) { + return rate; + } + + return rspec; +done: + return rate; +} + +/* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */ +static int +wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, + bool writeToShm) +{ + int idle_busy_ratio_x_16 = 0; + uint offset = + isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM : + M_TX_IDLE_BUSY_RATIO_X_16_CCK; + if (duty_cycle > 100 || duty_cycle < 0) { + wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n", + wlc->pub->unit); + return -EINVAL; + } + if (duty_cycle) + idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle; + /* Only write to shared memory when wl is up */ + if (writeToShm) + wlc_write_shm(wlc, offset, (u16) idle_busy_ratio_x_16); + + if (isOFDM) + wlc->tx_duty_cycle_ofdm = (u16) duty_cycle; + else + wlc->tx_duty_cycle_cck = (u16) duty_cycle; + + return 0; +} + +/* Read a single u16 from shared memory. + * SHM 'offset' needs to be an even address + */ +u16 wlc_read_shm(struct wlc_info *wlc, uint offset) +{ + return wlc_bmac_read_shm(wlc->hw, offset); +} + +/* Write a single u16 to shared memory. + * SHM 'offset' needs to be an even address + */ +void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v) +{ + wlc_bmac_write_shm(wlc->hw, offset, v); +} + +/* Copy a buffer to shared memory. + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + */ +void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, int len) +{ + /* offset and len need to be even */ + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + wlc_bmac_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL); + +} + +/* wrapper BMAC functions to for HIGH driver access */ +void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val) +{ + wlc_bmac_mctrl(wlc->hw, mask, val); +} + +void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, int bands) +{ + wlc_bmac_mhf(wlc->hw, idx, mask, val, bands); +} + +int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks) +{ + return wlc_bmac_xmtfifo_sz_get(wlc->hw, fifo, blocks); +} + +void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, + void *buf) +{ + wlc_bmac_write_template_ram(wlc->hw, offset, len, buf); +} + +void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, + bool both) +{ + wlc_bmac_write_hw_bcntemplates(wlc->hw, bcn, len, both); +} + +void +wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, + const u8 *addr) +{ + wlc_bmac_set_addrmatch(wlc->hw, match_reg_offset, addr); + if (match_reg_offset == RCM_BSSID_OFFSET) + memcpy(wlc->cfg->BSSID, addr, ETH_ALEN); +} + +void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit) +{ + wlc_bmac_pllreq(wlc->hw, set, req_bit); +} + +void wlc_reset_bmac_done(struct wlc_info *wlc) +{ +} + +/* check for the particular priority flow control bit being set */ +bool +wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, struct wlc_txq_info *q, + int prio) +{ + uint prio_mask; + + if (prio == ALLPRIO) { + prio_mask = TXQ_STOP_FOR_PRIOFC_MASK; + } else { + prio_mask = NBITVAL(prio); + } + + return (q->stopped & prio_mask) == prio_mask; +} + +/* propagate the flow control to all interfaces using the given tx queue */ +void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, + bool on, int prio) +{ + uint prio_bits; + uint cur_bits; + + BCMMSG(wlc->wiphy, "flow control kicks in\n"); + + if (prio == ALLPRIO) { + prio_bits = TXQ_STOP_FOR_PRIOFC_MASK; + } else { + prio_bits = NBITVAL(prio); + } + + cur_bits = qi->stopped & prio_bits; + + /* Check for the case of no change and return early + * Otherwise update the bit and continue + */ + if (on) { + if (cur_bits == prio_bits) { + return; + } + mboolset(qi->stopped, prio_bits); + } else { + if (cur_bits == 0) { + return; + } + mboolclr(qi->stopped, prio_bits); + } + + /* If there is a flow control override we will not change the external + * flow control state. + */ + if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK) { + return; + } + + wlc_txflowcontrol_signal(wlc, qi, on, prio); +} + +void +wlc_txflowcontrol_override(struct wlc_info *wlc, struct wlc_txq_info *qi, + bool on, uint override) +{ + uint prev_override; + + prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK); + + /* Update the flow control bits and do an early return if there is + * no change in the external flow control state. + */ + if (on) { + mboolset(qi->stopped, override); + /* if there was a previous override bit on, then setting this + * makes no difference. + */ + if (prev_override) { + return; + } + + wlc_txflowcontrol_signal(wlc, qi, ON, ALLPRIO); + } else { + mboolclr(qi->stopped, override); + /* clearing an override bit will only make a difference for + * flow control if it was the only bit set. For any other + * override setting, just return + */ + if (prev_override != override) { + return; + } + + if (qi->stopped == 0) { + wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); + } else { + int prio; + + for (prio = MAXPRIO; prio >= 0; prio--) { + if (!mboolisset(qi->stopped, NBITVAL(prio))) + wlc_txflowcontrol_signal(wlc, qi, OFF, + prio); + } + } + } +} + +static void wlc_txflowcontrol_reset(struct wlc_info *wlc) +{ + struct wlc_txq_info *qi; + + for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { + if (qi->stopped) { + wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); + qi->stopped = 0; + } + } +} + +static void +wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on, + int prio) +{ +#ifdef NON_FUNCTIONAL + /* wlcif_list is never filled so this function is not functional */ + struct wlc_if *wlcif; + + for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { + if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED) + brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); + } +#endif +} + +static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) +{ + struct wlc_txq_info *qi, *p; + + qi = kzalloc(sizeof(struct wlc_txq_info), GFP_ATOMIC); + if (qi != NULL) { + /* + * Have enough room for control packets along with HI watermark + * Also, add room to txq for total psq packets if all the SCBs + * leave PS mode. The watermark for flowcontrol to OS packets + * will remain the same + */ + brcmu_pktq_init(&qi->q, WLC_PREC_COUNT, + (2 * wlc->pub->tunables->datahiwat) + PKTQ_LEN_DEFAULT + + wlc->pub->psq_pkts_total); + + /* add this queue to the the global list */ + p = wlc->tx_queues; + if (p == NULL) { + wlc->tx_queues = qi; + } else { + while (p->next != NULL) + p = p->next; + p->next = qi; + } + } + return qi; +} + +static void wlc_txq_free(struct wlc_info *wlc, struct wlc_txq_info *qi) +{ + struct wlc_txq_info *p; + + if (qi == NULL) + return; + + /* remove the queue from the linked list */ + p = wlc->tx_queues; + if (p == qi) + wlc->tx_queues = p->next; + else { + while (p != NULL && p->next != qi) + p = p->next; + if (p != NULL) + p->next = p->next->next; + } + + kfree(qi); +} + +/* + * Flag 'scan in progress' to withhold dynamic phy calibration + */ +void wlc_scan_start(struct wlc_info *wlc) +{ + wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true); +} + +void wlc_scan_stop(struct wlc_info *wlc) +{ + wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false); +} + +void wlc_associate_upd(struct wlc_info *wlc, bool state) +{ + wlc->pub->associated = state; + wlc->cfg->associated = state; +} + +/* + * When a remote STA/AP is removed by Mac80211, or when it can no longer accept + * AMPDU traffic, packets pending in hardware have to be invalidated so that + * when later on hardware releases them, they can be handled appropriately. + */ +void wlc_inval_dma_pkts(struct wlc_hw_info *hw, + struct ieee80211_sta *sta, + void (*dma_callback_fn)) +{ + struct dma_pub *dmah; + int i; + for (i = 0; i < NFIFO; i++) { + dmah = hw->di[i]; + if (dmah != NULL) + dma_walk_packets(dmah, dma_callback_fn, sta); + } +} + +int wlc_get_curband(struct wlc_info *wlc) +{ + return wlc->band->bandunit; +} + +void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) +{ + /* flush packet queue when requested */ + if (drop) + brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); + + /* wait for queue and DMA fifos to run dry */ + while (!pktq_empty(&wlc->pkt_queue->q) || + TXPKTPENDTOT(wlc) > 0) { + brcms_msleep(wlc->wl, 1); + } +} + +int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int int_val) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + wlc->bcn_li_bcn = (u8) int_val; + if (wlc->pub->up) + wlc_bcn_li_upd(wlc); + break; + /* As long as override is false, this only sets the *user* + targets. User can twiddle this all he wants with no harm. + wlc_phy_txpower_set() explicitly sets override to false if + not internal or test. + */ + case IOV_QTXPOWER:{ + u8 qdbm; + bool override; + + /* Remove override bit and clip to max qdbm value */ + qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); + /* Extract override setting */ + override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; + err = + wlc_phy_txpower_set(wlc->band->pi, qdbm, override); + break; + } + case IOV_MPC: + wlc->mpc = (bool)int_val; + wlc_radio_mpc_upd(wlc); + break; + default: + err = -ENOTSUPP; + } + return err; +} + +int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + *ret_int_ptr = wlc->bcn_li_bcn; + break; + case IOV_QTXPOWER: { + uint qdbm; + bool override; + + err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, + &override); + if (err != 0) + return err; + + /* Return qdbm units */ + *ret_int_ptr = + qdbm | (override ? WL_TXPWR_OVERRIDE : 0); + break; + } + case IOV_MPC: + *ret_int_ptr = (s32) wlc->mpc; + break; + default: + err = -ENOTSUPP; + } + return err; +} + +/* + * Search the name=value vars for a specific one and return its value. + * Returns NULL if not found. + */ +char *getvar(char *vars, const char *name) +{ + char *s; + int len; + + if (!name) + return NULL; + + len = strlen(name); + if (len == 0) + return NULL; + + /* first look in vars[] */ + for (s = vars; s && *s;) { + if ((memcmp(s, name, len) == 0) && (s[len] == '=')) + return &s[len + 1]; + + while (*s++) + ; + } + /* nothing found */ + return NULL; +} + +/* + * Search the vars for a specific one and return its value as + * an integer. Returns 0 if not found. + */ +int getintvar(char *vars, const char *name) +{ + char *val; + + val = getvar(vars, name); + if (val == NULL) + return 0; + + return simple_strtoul(val, NULL, 0); +} diff --git a/drivers/staging/brcm80211/brcmsmac/main.h b/drivers/staging/brcm80211/brcmsmac/main.h new file mode 100644 index 0000000..f556faf --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/main.h @@ -0,0 +1,880 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_MAIN_H_ +#define _BRCM_MAIN_H_ + +#define MA_WINDOW_SZ 8 /* moving average window size */ +#define WL_HWRXOFF 38 /* chip rx buffer offset */ +#define INVCHANNEL 255 /* invalid channel */ +#define MAXCOREREV 28 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ +#define WLC_MAXMODULES 22 /* max # wlc_module_register() calls */ + +#define SEQNUM_SHIFT 4 +#define AMPDU_DELIMITER_LEN 4 +#define SEQNUM_MAX 0x1000 + +#define APHY_CWMIN 15 +#define PHY_CWMAX 1023 + +#define EDCF_AIFSN_MIN 1 +#define FRAGNUM_MASK 0xF + +#define WLC_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) + +/* Maximum wait time for a MAC suspend */ +#define WLC_MAX_MAC_SUSPEND 83000 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ + +/* Probe Response timeout - responses for probe requests older that this are tossed, zero to disable + */ +#define WLC_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */ + +/* transmit buffer max headroom for protocol headers */ +#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN) + +#define AC_COUNT 4 + +/* Macros for doing definition and get/set of bitfields + * Usage example, e.g. a three-bit field (bits 4-6): + * #define _M BITFIELD_MASK(3) + * #define _S 4 + * ... + * regval = R_REG(osh, ®s->regfoo); + * field = GFIELD(regval, ); + * regval = SFIELD(regval, , 1); + * W_REG(osh, ®s->regfoo, regval); + */ +#define BITFIELD_MASK(width) \ + (((unsigned)1 << (width)) - 1) +#define GFIELD(val, field) \ + (((val) >> field ## _S) & field ## _M) +#define SFIELD(val, field, bits) \ + (((val) & (~(field ## _M << field ## _S))) | \ + ((unsigned)(bits) << field ## _S)) + +/* For managing scan result lists */ +struct wlc_bss_list { + uint count; + bool beacon; /* set for beacon, cleared for probe response */ + wlc_bss_info_t *ptrs[MAXBSS]; +}; + +#define SW_TIMER_MAC_STAT_UPD 30 /* periodic MAC stats update */ + +/* Double check that unsupported cores are not enabled */ +#if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV) +#error "Configuration for D11CONF includes unsupported versions." +#endif /* Bad versions */ + +#define VALID_COREREV(corerev) CONF_HAS(D11CONF, corerev) + +/* values for shortslot_override */ +#define WLC_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ +#define WLC_SHORTSLOT_OFF 0 /* Turn off short slot */ +#define WLC_SHORTSLOT_ON 1 /* Turn on short slot */ + +/* value for short/long and mixmode/greenfield preamble */ + +#define WLC_LONG_PREAMBLE (0) +#define WLC_SHORT_PREAMBLE (1 << 0) +#define WLC_GF_PREAMBLE (1 << 1) +#define WLC_MM_PREAMBLE (1 << 2) +#define WLC_IS_MIMO_PREAMBLE(_pre) (((_pre) == WLC_GF_PREAMBLE) || ((_pre) == WLC_MM_PREAMBLE)) + +/* values for barker_preamble */ +#define WLC_BARKER_SHORT_ALLOWED 0 /* Short pre-amble allowed */ + +/* A fifo is full. Clear precedences related to that FIFO */ +#define WLC_TX_FIFO_CLEAR(wlc, fifo) ((wlc)->tx_prec_map &= ~(wlc)->fifo2prec_map[fifo]) + +/* Fifo is NOT full. Enable precedences for that FIFO */ +#define WLC_TX_FIFO_ENAB(wlc, fifo) ((wlc)->tx_prec_map |= (wlc)->fifo2prec_map[fifo]) + +/* TxFrameID */ +/* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */ +/* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */ +#define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */ +#define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */ +#define TXFID_SEQ_SHIFT 5 /* Number of bit shifts */ +#define TXFID_RATE_PROBE_MASK 0x8000 /* Bit 15 for rate probe */ +#define TXFID_RATE_MASK 0x0018 /* Mask for bits 3 and 4 */ +#define TXFID_RATE_SHIFT 3 /* Shift 3 bits for rate mask */ + +/* promote boardrev */ +#define BOARDREV_PROMOTABLE 0xFF /* from */ +#define BOARDREV_PROMOTED 1 /* to */ + +/* if wpa is in use then portopen is true when the group key is plumbed otherwise it is always true + */ +#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)) +#define WLC_SW_KEYS(wlc, bsscfg) ((((wlc)->wsec_swkeys) || \ + ((bsscfg)->wsec & WSEC_SWFLAG))) + +#define WLC_PORTOPEN(cfg) \ + (((cfg)->WPA_auth != WPA_AUTH_DISABLED && WSEC_ENABLED((cfg)->wsec)) ? \ + (cfg)->wsec_portopen : true) + +#define PS_ALLOWED(wlc) wlc_ps_allowed(wlc) + +#define DATA_BLOCK_TX_SUPR (1 << 4) + +/* 802.1D Priority to TX FIFO number for wme */ +extern const u8 prio2fifo[]; + +/* Ucode MCTL_WAKE override bits */ +#define WLC_WAKE_OVERRIDE_CLKCTL 0x01 +#define WLC_WAKE_OVERRIDE_PHYREG 0x02 +#define WLC_WAKE_OVERRIDE_MACSUSPEND 0x04 +#define WLC_WAKE_OVERRIDE_TXFIFO 0x08 +#define WLC_WAKE_OVERRIDE_FORCEFAST 0x10 + +/* stuff pulled in from wlc.c */ + +/* Interrupt bit error summary. Don't include I_RU: we refill DMA at other + * times; and if we run out, constant I_RU interrupts may cause lockup. We + * will still get error counts from rx0ovfl. + */ +#define I_ERRORS (I_PC | I_PD | I_DE | I_RO | I_XU) +/* default software intmasks */ +#define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */ +#define DEF_MACINTMASK (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \ + MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \ + MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP) + +#define RETRY_SHORT_DEF 7 /* Default Short retry Limit */ +#define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */ +#define RETRY_LONG_DEF 4 /* Default Long retry count */ +#define RETRY_SHORT_FB 3 /* Short retry count for fallback rate */ +#define RETRY_LONG_FB 2 /* Long retry count for fallback rate */ + +#define MAXTXPKTS 6 /* max # pkts pending */ + +/* frameburst */ +#define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */ +#define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */ + +/* Per-AC retry limit register definitions; uses defs.h bitfield macros */ +#define EDCF_SHORT_S 0 +#define EDCF_SFB_S 4 +#define EDCF_LONG_S 8 +#define EDCF_LFB_S 12 +#define EDCF_SHORT_M BITFIELD_MASK(4) +#define EDCF_SFB_M BITFIELD_MASK(4) +#define EDCF_LONG_M BITFIELD_MASK(4) +#define EDCF_LFB_M BITFIELD_MASK(4) + +#define NFIFO 6 /* # tx/rx fifopairs */ + +#define WLC_WME_RETRY_SHORT_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SHORT) +#define WLC_WME_RETRY_SFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SFB) +#define WLC_WME_RETRY_LONG_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LONG) +#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB) + +#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \ + (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val)) +#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \ + (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val)) +#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \ + (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val)) +#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \ + (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val)) + +/* PLL requests */ +#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */ +#define WLC_PLLREQ_RADIO_MON 0x2 /* hold pll for radio monitor register checking */ +#define WLC_PLLREQ_FLIP 0x4 /* hold/release pll for some short operation */ + +/* + * Macros to check if AP or STA is active. + * AP Active means more than just configured: driver and BSS are "up"; + * that is, we are beaconing/responding as an AP (aps_associated). + * STA Active similarly means the driver is up and a configured STA BSS + * is up: either associated (stas_associated) or trying. + * + * Macro definitions vary as per AP/STA ifdefs, allowing references to + * ifdef'd structure fields and constant values (0) for optimization. + * Make sure to enclose blocks of code such that any routines they + * reference can also be unused and optimized out by the linker. + */ +/* NOTE: References structure fields defined in wlc.h */ +#define AP_ACTIVE(wlc) (0) + +/* + * Detect Card removed. + * Even checking an sbconfig register read will not false trigger when the core is in reset. + * it breaks CF address mechanism. Accessing gphy phyversion will cause SB error if aphy + * is in reset on 4306B0-DB. Need a simple accessible reg with fixed 0/1 pattern + * (some platforms return all 0). + * If clocks are present, call the sb routine which will figure out if the device is removed. + */ +#define DEVICEREMOVED(wlc) \ + ((wlc->hw->clk) ? \ + ((R_REG(&wlc->hw->regs->maccontrol) & \ + (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN) : \ + (ai_deviceremoved(wlc->hw->sih))) + +#define WLCWLUNIT(wlc) ((wlc)->pub->unit) + +struct wlc_protection { + bool _g; /* use g spec protection, driver internal */ + s8 g_override; /* override for use of g spec protection */ + u8 gmode_user; /* user config gmode, operating band->gmode is different */ + s8 overlap; /* Overlap BSS/IBSS protection for both 11g and 11n */ + s8 nmode_user; /* user config nmode, operating pub->nmode is different */ + s8 n_cfg; /* use OFDM protection on MIMO frames */ + s8 n_cfg_override; /* override for use of N protection */ + bool nongf; /* non-GF present protection */ + s8 nongf_override; /* override for use of GF protection */ + s8 n_pam_override; /* override for preamble: MM or GF */ + bool n_obss; /* indicated OBSS Non-HT STA present */ +}; + +/* anything affects the single/dual streams/antenna operation */ +struct wlc_stf { + u8 hw_txchain; /* HW txchain bitmap cfg */ + u8 txchain; /* txchain bitmap being used */ + u8 txstreams; /* number of txchains being used */ + + u8 hw_rxchain; /* HW rxchain bitmap cfg */ + u8 rxchain; /* rxchain bitmap being used */ + u8 rxstreams; /* number of rxchains being used */ + + u8 ant_rx_ovr; /* rx antenna override */ + s8 txant; /* userTx antenna setting */ + u16 phytxant; /* phyTx antenna setting in txheader */ + + u8 ss_opmode; /* singlestream Operational mode, 0:siso; 1:cdd */ + bool ss_algosel_auto; /* if true, use wlc->stf->ss_algo_channel; */ + /* else use wlc->band->stf->ss_mode_band; */ + u16 ss_algo_channel; /* ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC */ + u8 no_cddstbc; /* stf override, 1: no CDD (or STBC) allowed */ + + u8 rxchain_restore_delay; /* delay time to restore default rxchain */ + + s8 ldpc; /* AUTO/ON/OFF ldpc cap supported */ + u8 txcore[MAX_STREAMS_SUPPORTED + 1]; /* bitmap of selected core for each Nsts */ + s8 spatial_policy; +}; + +#define WLC_STF_SS_STBC_TX(wlc, scb) \ + (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) || \ + (SCB_STBC_CAP((scb)) && \ + (wlc)->band->band_stf_stbc_tx == AUTO && \ + isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC)))) + +#define WLC_STBC_CAP_PHY(wlc) (WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) + +#define WLC_SGI_CAP_PHY(wlc) ((WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) || \ + WLCISLCNPHY(wlc->band)) + +#define WLC_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT) +#define WLC_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) >> RXS_CHAN_ID_SHIFT) +#define WLC_RX_CHANNEL(rxh) (WLC_CHAN_CHANNEL((rxh)->RxChan)) + +/* wlc_bss_info flag bit values */ +#define WLC_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */ + +/* Flags used in wlc_txq_info.stopped */ +#define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF /* per prio flow control bits */ +#define TXQ_STOP_FOR_PKT_DRAIN 0x00000100 /* stop txq enqueue for packet drain */ +#define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200 /* stop txq enqueue for ampdu flow control */ + +#define WLC_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */ +#define WLC_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */ + +/* + * core state (mac) + */ +struct wlccore { + uint coreidx; /* # sb enumerated core */ + + /* fifo */ + uint *txavail[NFIFO]; /* # tx descriptors available */ + s16 txpktpend[NFIFO]; /* tx admission control */ + + macstat_t *macstat_snapshot; /* mac hw prev read values */ +}; + +/* + * band state (phy+ana+radio) + */ +struct wlcband { + int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ + uint bandunit; /* bandstate[] index */ + + u16 phytype; /* phytype */ + u16 phyrev; + u16 radioid; + u16 radiorev; + wlc_phy_t *pi; /* pointer to phy specific information */ + bool abgphy_encore; + + u8 gmode; /* currently active gmode */ + + struct scb *hwrs_scb; /* permanent scb for hw rateset */ + + wlc_rateset_t defrateset; /* band-specific copy of default_bss.rateset */ + + ratespec_t rspec_override; /* 802.11 rate override */ + ratespec_t mrspec_override; /* multicast rate override */ + u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */ + s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */ + wlc_rateset_t hw_rateset; /* rates supported by chip (phy-specific) */ + u8 basic_rate[WLC_MAXRATE + 1]; /* basic rates indexed by rate */ + bool mimo_cap_40; /* 40 MHz cap enabled on this band */ + s8 antgain; /* antenna gain from srom */ + + u16 CWmin; /* The minimum size of contention window, in unit of aSlotTime */ + u16 CWmax; /* The maximum size of contention window, in unit of aSlotTime */ + u16 bcntsfoff; /* beacon tsf offset */ +}; + +/* tx completion callback takes 3 args */ +typedef void (*pkcb_fn_t) (struct wlc_info *wlc, uint txstatus, void *arg); + +struct pkt_cb { + pkcb_fn_t fn; /* function to call when tx frame completes */ + void *arg; /* void arg for fn */ + u8 nextidx; /* index of next call back if threading */ + bool entered; /* recursion check */ +}; + +/* module control blocks */ +struct modulecb { + char name[32]; /* module name : NULL indicates empty array member */ + const struct brcmu_iovar *iovars; /* iovar table */ + void *hdl; /* handle passed when handler 'doiovar' is called */ + watchdog_fn_t watchdog_fn; /* watchdog handler */ + iovar_fn_t iovar_fn; /* iovar handler */ + down_fn_t down_fn; /* down handler. Note: the int returned + * by the down function is a count of the + * number of timers that could not be + * freed. + */ +}; + +/* dump control blocks */ +struct dumpcb_s { + const char *name; /* dump name */ + dump_fn_t dump_fn; /* 'wl dump' handler */ + void *dump_fn_arg; + struct dumpcb_s *next; +}; + +struct edcf_acparam { + u8 ACI; + u8 ECW; + u16 TXOP; +} __attribute__((packed)); +typedef struct edcf_acparam edcf_acparam_t; + +struct wme_param_ie { + u8 oui[3]; + u8 type; + u8 subtype; + u8 version; + u8 qosinfo; + u8 rsvd; + edcf_acparam_t acparam[AC_COUNT]; +} __attribute__((packed)); +typedef struct wme_param_ie wme_param_ie_t; + +/* virtual interface */ +struct wlc_if { + struct wlc_if *next; + u8 type; /* WLC_IFTYPE_BSS or WLC_IFTYPE_WDS */ + u8 index; /* assigned in wl_add_if(), index of the wlif if any, + * not necessarily corresponding to bsscfg._idx or + * AID2PVBMAP(scb). + */ + u8 flags; /* flags for the interface */ + struct brcms_if *wlif; /* pointer to wlif */ + struct wlc_txq_info *qi; /* pointer to associated tx queue */ + union { + struct scb *scb; /* pointer to scb if WLC_IFTYPE_WDS */ + struct wlc_bsscfg *bsscfg; /* pointer to bsscfg if WLC_IFTYPE_BSS */ + } u; +}; + +/* flags for the interface, this interface is linked to a brcms_if */ +#define WLC_IF_LINKED 0x02 + +struct wlc_hwband { + int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ + uint bandunit; /* bandstate[] index */ + u16 mhfs[MHFMAX]; /* MHF array shadow */ + u8 bandhw_stf_ss_mode; /* HW configured STF type, 0:siso; 1:cdd */ + u16 CWmin; + u16 CWmax; + u32 core_flags; + + u16 phytype; /* phytype */ + u16 phyrev; + u16 radioid; + u16 radiorev; + wlc_phy_t *pi; /* pointer to phy specific information */ + bool abgphy_encore; +}; + +struct wlc_hw_info { + bool _piomode; /* true if pio mode */ + struct wlc_info *wlc; + + /* fifo */ + struct dma_pub *di[NFIFO]; /* dma handles, per fifo */ + + uint unit; /* device instance number */ + + /* version info */ + u16 vendorid; /* PCI vendor id */ + u16 deviceid; /* PCI device id */ + uint corerev; /* core revision */ + u8 sromrev; /* version # of the srom */ + u16 boardrev; /* version # of particular board */ + u32 boardflags; /* Board specific flags from srom */ + u32 boardflags2; /* More board flags if sromrev >= 4 */ + u32 machwcap; /* MAC capabilities */ + u32 machwcap_backup; /* backup of machwcap */ + u16 ucode_dbgsel; /* dbgsel for ucode debug(config gpio) */ + + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ + char *vars; /* "environment" name=value */ + uint vars_size; /* size of vars, free vars on detach */ + d11regs_t *regs; /* pointer to device registers */ + void *physhim; /* phy shim layer handler */ + void *phy_sh; /* pointer to shared phy state */ + struct wlc_hwband *band;/* pointer to active per-band state */ + struct wlc_hwband *bandstate[MAXBANDS];/* band state per phy/radio */ + u16 bmac_phytxant; /* cache of high phytxant state */ + bool shortslot; /* currently using 11g ShortSlot timing */ + u16 SRL; /* 802.11 dot11ShortRetryLimit */ + u16 LRL; /* 802.11 dot11LongRetryLimit */ + u16 SFBL; /* Short Frame Rate Fallback Limit */ + u16 LFBL; /* Long Frame Rate Fallback Limit */ + + bool up; /* d11 hardware up and running */ + uint now; /* # elapsed seconds */ + uint _nbands; /* # bands supported */ + chanspec_t chanspec; /* bmac chanspec shadow */ + + uint *txavail[NFIFO]; /* # tx descriptors available */ + u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */ + + mbool pllreq; /* pll requests to keep PLL on */ + + u8 suspended_fifos; /* Which TX fifo to remain awake for */ + u32 maccontrol; /* Cached value of maccontrol */ + uint mac_suspend_depth; /* current depth of mac_suspend levels */ + u32 wake_override; /* Various conditions to force MAC to WAKE mode */ + u32 mute_override; /* Prevent ucode from sending beacons */ + u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */ + u32 led_gpio_mask; /* LED GPIO Mask */ + bool noreset; /* true= do not reset hw, used by WLC_OUT */ + bool forcefastclk; /* true if the h/w is forcing the use of fast clk */ + bool clk; /* core is out of reset and has clock */ + bool sbclk; /* sb has clock */ + struct bmac_pmq *bmac_pmq; /* bmac PM states derived from ucode PMQ */ + bool phyclk; /* phy is out of reset and has clock */ + bool dma_lpbk; /* core is in DMA loopback */ + + bool ucode_loaded; /* true after ucode downloaded */ + + + u8 hw_stf_ss_opmode; /* STF single stream operation mode */ + u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic + * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board + */ + u32 antsel_avail; /* + * put struct antsel_info here if more info is + * needed + */ +}; + +/* TX Queue information + * + * Each flow of traffic out of the device has a TX Queue with independent + * flow control. Several interfaces may be associated with a single TX Queue + * if they belong to the same flow of traffic from the device. For multi-channel + * operation there are independent TX Queues for each channel. + */ +struct wlc_txq_info { + struct wlc_txq_info *next; + struct pktq q; + uint stopped; /* tx flow control bits */ +}; + +/* + * Principal common (os-independent) software data structure. + */ +struct wlc_info { + struct wlc_pub *pub; /* pointer to wlc public state */ + struct brcms_info *wl; /* pointer to os-specific private state */ + d11regs_t *regs; /* pointer to device registers */ + + struct wlc_hw_info *hw; /* HW related state used primarily by BMAC */ + + /* clock */ + int clkreq_override; /* setting for clkreq for PCIE : Auto, 0, 1 */ + u16 fastpwrup_dly; /* time in us needed to bring up d11 fast clock */ + + /* interrupt */ + u32 macintstatus; /* bit channel between isr and dpc */ + u32 macintmask; /* sw runtime master macintmask value */ + u32 defmacintmask; /* default "on" macintmask value */ + + /* up and down */ + bool device_present; /* (removable) device is present */ + + bool clk; /* core is out of reset and has clock */ + + /* multiband */ + struct wlccore *core; /* pointer to active io core */ + struct wlcband *band; /* pointer to active per-band state */ + struct wlccore *corestate; /* per-core state (one per hw core) */ + /* per-band state (one per phy/radio): */ + struct wlcband *bandstate[MAXBANDS]; + + bool war16165; /* PCI slow clock 16165 war flag */ + + bool tx_suspended; /* data fifos need to remain suspended */ + + uint txpend16165war; + + /* packet queue */ + uint qvalid; /* DirFrmQValid and BcMcFrmQValid */ + + /* Regulatory power limits */ + s8 txpwr_local_max; /* regulatory local txpwr max */ + u8 txpwr_local_constraint; /* local power contraint in dB */ + + + struct ampdu_info *ampdu; /* ampdu module handler */ + struct antsel_info *asi; /* antsel module handler */ + wlc_cm_info_t *cmi; /* channel manager module handler */ + + uint vars_size; /* size of vars, free vars on detach */ + + u16 vendorid; /* PCI vendor id */ + u16 deviceid; /* PCI device id */ + uint ucode_rev; /* microcode revision */ + + u32 machwcap; /* MAC capabilities, BMAC shadow */ + + u8 perm_etheraddr[ETH_ALEN]; /* original sprom local ethernet address */ + + bool bandlocked; /* disable auto multi-band switching */ + bool bandinit_pending; /* track band init in auto band */ + + bool radio_monitor; /* radio timer is running */ + bool going_down; /* down path intermediate variable */ + + bool mpc; /* enable minimum power consumption */ + u8 mpc_dlycnt; /* # of watchdog cnt before turn disable radio */ + u8 mpc_offcnt; /* # of watchdog cnt that radio is disabled */ + u8 mpc_delay_off; /* delay radio disable by # of watchdog cnt */ + u8 prev_non_delay_mpc; /* prev state wlc_is_non_delay_mpc */ + + /* timer for watchdog routine */ + struct brcms_timer *wdtimer; + /* timer for hw radio button monitor routine */ + struct brcms_timer *radio_timer; + + /* promiscuous */ + bool monitor; /* monitor (MPDU sniffing) mode */ + bool bcnmisc_ibss; /* bcns promisc mode override for IBSS */ + bool bcnmisc_scan; /* bcns promisc mode override for scan */ + bool bcnmisc_monitor; /* bcns promisc mode override for monitor */ + + /* driver feature */ + bool _rifs; /* enable per-packet rifs */ + s8 sgi_tx; /* sgi tx */ + + /* AP-STA synchronization, power save */ + u8 bcn_li_bcn; /* beacon listen interval in # beacons */ + u8 bcn_li_dtim; /* beacon listen interval in # dtims */ + + bool WDarmed; /* watchdog timer is armed */ + u32 WDlast; /* last time wlc_watchdog() was called */ + + /* WME */ + ac_bitmap_t wme_dp; /* Discard (oldest first) policy per AC */ + u16 edcf_txop[AC_COUNT]; /* current txop for each ac */ + wme_param_ie_t wme_param_ie; /* WME parameter info element, which on STA + * contains parameters in use locally, and on + * AP contains parameters advertised to STA + * in beacons and assoc responses. + */ + u16 wme_retries[AC_COUNT]; /* per-AC retry limits */ + + u16 tx_prec_map; /* Precedence map based on HW FIFO space */ + u16 fifo2prec_map[NFIFO]; /* pointer to fifo2_prec map based on WME */ + + /* + * BSS Configurations set of BSS configurations, idx 0 is default and + * always valid + */ + struct wlc_bsscfg *bsscfg[WLC_MAXBSSCFG]; + struct wlc_bsscfg *cfg; /* the primary bsscfg (can be AP or STA) */ + + /* tx queue */ + struct wlc_txq_info *tx_queues; /* common TX Queue list */ + + /* security */ + wsec_key_t *wsec_keys[WSEC_MAX_KEYS]; /* dynamic key storage */ + wsec_key_t *wsec_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ + bool wsec_swkeys; /* indicates that all keys should be + * treated as sw keys (used for debugging) + */ + struct modulecb *modulecb; + + u8 mimoft; /* SIGN or 11N */ + s8 cck_40txbw; /* 11N, cck tx b/w override when in 40MHZ mode */ + s8 ofdm_40txbw; /* 11N, ofdm tx b/w override when in 40MHZ mode */ + s8 mimo_40txbw; /* 11N, mimo tx b/w override when in 40MHZ mode */ + /* HT CAP IE being advertised by this node: */ + struct ieee80211_ht_cap ht_cap; + + wlc_bss_info_t *default_bss; /* configured BSS parameters */ + + u16 mc_fid_counter; /* BC/MC FIFO frame ID counter */ + + char country_default[WLC_CNTRY_BUF_SZ]; /* saved country for leaving 802.11d + * auto-country mode + */ + char autocountry_default[WLC_CNTRY_BUF_SZ]; /* initial country for 802.11d + * auto-country mode + */ + u16 prb_resp_timeout; /* do not send prb resp if request older than this, + * 0 = disable + */ + + wlc_rateset_t sup_rates_override; /* use only these rates in 11g supported rates if + * specifed + */ + + chanspec_t home_chanspec; /* shared home chanspec */ + + /* PHY parameters */ + chanspec_t chanspec; /* target operational channel */ + u16 usr_fragthresh; /* user configured fragmentation threshold */ + u16 fragthresh[NFIFO]; /* per-fifo fragmentation thresholds */ + u16 RTSThresh; /* 802.11 dot11RTSThreshold */ + u16 SRL; /* 802.11 dot11ShortRetryLimit */ + u16 LRL; /* 802.11 dot11LongRetryLimit */ + u16 SFBL; /* Short Frame Rate Fallback Limit */ + u16 LFBL; /* Long Frame Rate Fallback Limit */ + + /* network config */ + bool shortslot; /* currently using 11g ShortSlot timing */ + s8 shortslot_override; /* 11g ShortSlot override */ + bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */ + + struct wlc_protection *protection; + s8 PLCPHdr_override; /* 802.11b Preamble Type override */ + + struct wlc_stf *stf; + + ratespec_t bcn_rspec; /* save bcn ratespec purpose */ + + uint tempsense_lasttime; + + u16 tx_duty_cycle_ofdm; /* maximum allowed duty cycle for OFDM */ + u16 tx_duty_cycle_cck; /* maximum allowed duty cycle for CCK */ + + u16 next_bsscfg_ID; + + struct wlc_txq_info *pkt_queue; /* txq for transmit packets */ + u32 mpc_dur; /* total time (ms) in mpc mode except for the + * portion since radio is turned off last time + */ + u32 mpc_laston_ts; /* timestamp (ms) when radio is turned off last + * time + */ + struct wiphy *wiphy; +}; + +/* antsel module specific state */ +struct antsel_info { + struct wlc_info *wlc; /* pointer to main wlc structure */ + struct wlc_pub *pub; /* pointer to public fn */ + u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic + * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board + */ + u8 antsel_antswitch; /* board level antenna switch type */ + bool antsel_avail; /* Ant selection availability (SROM based) */ + wlc_antselcfg_t antcfg_11n; /* antenna configuration */ + wlc_antselcfg_t antcfg_cur; /* current antenna config (auto) */ +}; + +#define CHANNEL_BANDUNIT(wlc, ch) (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX) +#define OTHERBANDUNIT(wlc) ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX)) + +#define IS_MBAND_UNLOCKED(wlc) \ + ((NBANDS(wlc) > 1) && !(wlc)->bandlocked) + +#define WLC_BAND_PI_RADIO_CHANSPEC wlc_phy_chanspec_get(wlc->band->pi) + +/* sum the individual fifo tx pending packet counts */ +#define TXPKTPENDTOT(wlc) ((wlc)->core->txpktpend[0] + (wlc)->core->txpktpend[1] + \ + (wlc)->core->txpktpend[2] + (wlc)->core->txpktpend[3]) +#define TXPKTPENDGET(wlc, fifo) ((wlc)->core->txpktpend[(fifo)]) +#define TXPKTPENDINC(wlc, fifo, val) ((wlc)->core->txpktpend[(fifo)] += (val)) +#define TXPKTPENDDEC(wlc, fifo, val) ((wlc)->core->txpktpend[(fifo)] -= (val)) +#define TXPKTPENDCLR(wlc, fifo) ((wlc)->core->txpktpend[(fifo)] = 0) +#define TXAVAIL(wlc, fifo) (*(wlc)->core->txavail[(fifo)]) +#define GETNEXTTXP(wlc, _queue) \ + dma_getnexttxp((wlc)->hw->di[(_queue)], DMA_RANGE_TRANSMITTED) + +#define WLC_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \ + ((len1 == len2) && !memcmp(ssid1, ssid2, len1)) + +extern void wlc_fatal_error(struct wlc_info *wlc); +extern void wlc_bmac_rpc_watchdog(struct wlc_info *wlc); +extern void wlc_recv(struct wlc_info *wlc, struct sk_buff *p); +extern bool wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2); +extern void wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, + bool commit, s8 txpktpend); +extern void wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend); +extern void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, + uint prec); +extern void wlc_info_init(struct wlc_info *wlc, int unit); +extern void wlc_print_txstatus(tx_status_t *txs); +extern int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks); +extern void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, + void *buf); +extern void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, + bool both); +extern void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit); +extern void wlc_reset_bmac_done(struct wlc_info *wlc); + +#if defined(BCMDBG) +extern void wlc_print_rxh(d11rxhdr_t *rxh); +extern void wlc_print_hdrs(struct wlc_info *wlc, const char *prefix, u8 *frame, + d11txh_t *txh, d11rxhdr_t *rxh, uint len); +extern void wlc_print_txdesc(d11txh_t *txh); +#else +#define wlc_print_txdesc(a) +#endif +#if defined(BCMDBG) +extern void wlc_print_dot11_mac_hdr(u8 *buf, int len); +#endif + +extern void wlc_setxband(struct wlc_hw_info *wlc_hw, uint bandunit); +extern void wlc_coredisable(struct wlc_hw_info *wlc_hw); + +extern bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rate, int band, + bool verbose); +extern void wlc_ap_upd(struct wlc_info *wlc); + +/* helper functions */ +extern void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg); +extern int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config); + +extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); +extern void wlc_mac_bcn_promisc(struct wlc_info *wlc); +extern void wlc_mac_promisc(struct wlc_info *wlc); +extern void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, + bool on, int prio); +extern void wlc_txflowcontrol_override(struct wlc_info *wlc, + struct wlc_txq_info *qi, + bool on, uint override); +extern bool wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, + struct wlc_txq_info *qi, int prio); +extern void wlc_send_q(struct wlc_info *wlc); +extern int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifo); + +extern u16 wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, + uint mac_len); +extern ratespec_t wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, + bool use_rspec, u16 mimo_ctlchbw); +extern u16 wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, + ratespec_t rts_rate, ratespec_t frame_rate, + u8 rts_preamble_type, + u8 frame_preamble_type, uint frame_len, + bool ba); + +extern void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs); +extern void wlc_inval_dma_pkts(struct wlc_hw_info *hw, + struct ieee80211_sta *sta, + void (*dma_callback_fn)); + +#if defined(BCMDBG) +extern void wlc_dump_ie(struct wlc_info *wlc, struct brcmu_tlv *ie, + struct brcmu_strbuf *b); +#endif + +extern void wlc_reprate_init(struct wlc_info *wlc); +extern void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg); + +/* Shared memory access */ +extern void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v); +extern u16 wlc_read_shm(struct wlc_info *wlc, uint offset); +extern void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, + int len); + +extern void wlc_update_beacon(struct wlc_info *wlc); +extern void wlc_bss_update_beacon(struct wlc_info *wlc, + struct wlc_bsscfg *bsscfg); + +extern void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend); +extern void wlc_bss_update_probe_resp(struct wlc_info *wlc, + struct wlc_bsscfg *cfg, bool suspend); + +extern bool wlc_ismpc(struct wlc_info *wlc); +extern bool wlc_is_non_delay_mpc(struct wlc_info *wlc); +extern void wlc_radio_mpc_upd(struct wlc_info *wlc); +extern bool wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, + int prec); +extern bool wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, + struct sk_buff *pkt, int prec, bool head); +extern u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec); +extern void wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rate, uint length, + u8 *plcp); +extern uint wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, + u8 preamble_type, uint mac_len); + +extern void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec); + +extern bool wlc_timers_init(struct wlc_info *wlc, int unit); + +#if defined(BCMDBG) +extern void wlc_print_ies(struct wlc_info *wlc, u8 *ies, uint ies_len); +#endif + +extern int wlc_set_nmode(struct wlc_info *wlc, s32 nmode); +extern void wlc_mimops_action_ht_send(struct wlc_info *wlc, + struct wlc_bsscfg *bsscfg, + u8 mimops_mode); + +extern void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot); +extern void wlc_set_bssid(struct wlc_bsscfg *cfg); +extern void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend); + +extern void wlc_set_ratetable(struct wlc_info *wlc); +extern int wlc_set_mac(struct wlc_bsscfg *cfg); +extern void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, + ratespec_t bcn_rate); +extern void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len); +extern ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, + wlc_rateset_t *rs); +extern void wlc_radio_disable(struct wlc_info *wlc); +extern void wlc_bcn_li_upd(struct wlc_info *wlc); +extern void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec); +extern bool wlc_ps_allowed(struct wlc_info *wlc); +extern bool wlc_stay_awake(struct wlc_info *wlc); +extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe); + +#endif /* _BRCM_MAIN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 3ffad2e..ca781c4 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -17,15 +17,15 @@ #include #include #include -#include -#include "wlc_types.h" +#include +#include "types.h" #include #include -#include -#include +#include +#include #include -#include -#include +#include +#include #include /* SPROM offsets */ diff --git a/drivers/staging/brcm80211/brcmsmac/otp.c b/drivers/staging/brcm80211/brcmsmac/otp.c new file mode 100644 index 0000000..d21d6ca --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/otp.c @@ -0,0 +1,562 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include "types.h" +#include +#include +#include +#include +#include "otp.h" + +#define OTPS_GUP_MASK 0x00000f00 +#define OTPS_GUP_SHIFT 8 +#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ +#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ +#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ +#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ + +/* Fields in otpprog in rev >= 21 */ +#define OTPP_COL_MASK 0x000000ff +#define OTPP_COL_SHIFT 0 +#define OTPP_ROW_MASK 0x0000ff00 +#define OTPP_ROW_SHIFT 8 +#define OTPP_OC_MASK 0x0f000000 +#define OTPP_OC_SHIFT 24 +#define OTPP_READERR 0x10000000 +#define OTPP_VALUE_MASK 0x20000000 +#define OTPP_VALUE_SHIFT 29 +#define OTPP_START_BUSY 0x80000000 +#define OTPP_READ 0x40000000 + +/* Opcodes for OTPP_OC field */ +#define OTPPOC_READ 0 +#define OTPPOC_BIT_PROG 1 +#define OTPPOC_VERIFY 3 +#define OTPPOC_INIT 4 +#define OTPPOC_SET 5 +#define OTPPOC_RESET 6 +#define OTPPOC_OCST 7 +#define OTPPOC_ROW_LOCK 8 +#define OTPPOC_PRESCN_TEST 9 + +#define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) + +#define OTPP_TRIES 10000000 /* # of tries for OTPP */ + +#define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ + +/* OTP common function type */ +typedef int (*otp_status_t) (void *oh); +typedef int (*otp_size_t) (void *oh); +typedef void *(*otp_init_t) (struct si_pub *sih); +typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off); +typedef int (*otp_read_region_t) (struct si_pub *sih, int region, u16 *data, + uint *wlen); +typedef int (*otp_nvread_t) (void *oh, char *data, uint *len); + +/* OTP function struct */ +typedef struct otp_fn_s { + otp_size_t size; + otp_read_bit_t read_bit; + otp_init_t init; + otp_read_region_t read_region; + otp_nvread_t nvread; + otp_status_t status; +} otp_fn_t; + +typedef struct { + uint ccrev; /* chipc revision */ + otp_fn_t *fn; /* OTP functions */ + struct si_pub *sih; /* Saved sb handle */ + + /* IPX OTP section */ + u16 wsize; /* Size of otp in words */ + u16 rows; /* Geometry */ + u16 cols; /* Geometry */ + u32 status; /* Flag bits (lock/prog/rv). + * (Reflected only when OTP is power cycled) + */ + u16 hwbase; /* hardware subregion offset */ + u16 hwlim; /* hardware subregion boundary */ + u16 swbase; /* software subregion offset */ + u16 swlim; /* software subregion boundary */ + u16 fbase; /* fuse subregion offset */ + u16 flim; /* fuse subregion boundary */ + int otpgu_base; /* offset to General Use Region */ +} otpinfo_t; + +static otpinfo_t otpinfo; + +/* + * IPX OTP Code + * + * Exported functions: + * ipxotp_status() + * ipxotp_size() + * ipxotp_init() + * ipxotp_read_bit() + * ipxotp_read_region() + * ipxotp_nvread() + * + */ + +#define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w") + +/* OTP layout */ +/* CC revs 21, 24 and 27 OTP General Use Region word offset */ +#define REVA4_OTPGU_BASE 12 + +/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */ +#define REVB8_OTPGU_BASE 20 + +/* CC rev 36 OTP General Use Region word offset */ +#define REV36_OTPGU_BASE 12 + +/* Subregion word offsets in General Use region */ +#define OTPGU_HSB_OFF 0 +#define OTPGU_SFB_OFF 1 +#define OTPGU_CI_OFF 2 +#define OTPGU_P_OFF 3 +#define OTPGU_SROM_OFF 4 + +/* Flag bit offsets in General Use region */ +#define OTPGU_HWP_OFF 60 +#define OTPGU_SWP_OFF 61 +#define OTPGU_CIP_OFF 62 +#define OTPGU_FUSEP_OFF 63 +#define OTPGU_CIP_MSK 0x4000 +#define OTPGU_P_MSK 0xf000 +#define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16) + +/* OTP Size */ +#define OTP_SZ_FU_324 ((roundup(324, 8))/8) /* 324 bits */ +#define OTP_SZ_FU_288 (288/8) /* 288 bits */ +#define OTP_SZ_FU_216 (216/8) /* 216 bits */ +#define OTP_SZ_FU_72 (72/8) /* 72 bits */ +#define OTP_SZ_CHECKSUM (16/8) /* 16 bits */ +#define OTP4315_SWREG_SZ 178 /* 178 bytes */ +#define OTP_SZ_FU_144 (144/8) /* 144 bits */ + +static int ipxotp_status(void *oh) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + return (int)(oi->status); +} + +/* Return size in bytes */ +static int ipxotp_size(void *oh) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + return (int)oi->wsize * 2; +} + +static u16 ipxotp_otpr(void *oh, chipcregs_t *cc, uint wn) +{ + otpinfo_t *oi; + + oi = (otpinfo_t *) oh; + + return R_REG(&cc->sromotp[wn]); +} + +static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + uint k, row, col; + u32 otpp, st; + + row = off / oi->cols; + col = off % oi->cols; + + otpp = OTPP_START_BUSY | + ((OTPPOC_READ << OTPP_OC_SHIFT) & OTPP_OC_MASK) | + ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | + ((col << OTPP_COL_SHIFT) & OTPP_COL_MASK); + W_REG(&cc->otpprog, otpp); + + for (k = 0; + ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) + && (k < OTPP_TRIES); k++) + ; + if (k >= OTPP_TRIES) { + return 0xffff; + } + if (st & OTPP_READERR) { + return 0xffff; + } + st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; + + return (int)st; +} + +/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size, + * osizew is oi->wsize (OTP size - GU size) in words + */ +static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew) +{ + int ret = 0; + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; + break; + case BCM4313_CHIP_ID: + ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; + break; + default: + break; /* Don't know about this chip */ + } + + return ret; +} + +static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc) +{ + uint k; + u32 otpp, st; + + /* record word offset of General Use Region for various chipcommon revs */ + if (oi->sih->ccrev == 21 || oi->sih->ccrev == 24 + || oi->sih->ccrev == 27) { + oi->otpgu_base = REVA4_OTPGU_BASE; + } else if (oi->sih->ccrev == 36) { + /* OTP size greater than equal to 2KB (128 words), otpgu_base is similar to rev23 */ + if (oi->wsize >= 128) + oi->otpgu_base = REVB8_OTPGU_BASE; + else + oi->otpgu_base = REV36_OTPGU_BASE; + } else if (oi->sih->ccrev == 23 || oi->sih->ccrev >= 25) { + oi->otpgu_base = REVB8_OTPGU_BASE; + } + + /* First issue an init command so the status is up to date */ + otpp = + OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK); + + W_REG(&cc->otpprog, otpp); + for (k = 0; + ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) + && (k < OTPP_TRIES); k++) + ; + if (k >= OTPP_TRIES) { + return; + } + + /* Read OTP lock bits and subregion programmed indication bits */ + oi->status = R_REG(&cc->otpstatus); + + if ((oi->sih->chip == BCM43224_CHIP_ID) + || (oi->sih->chip == BCM43225_CHIP_ID)) { + u32 p_bits; + p_bits = + (ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) & + OTPGU_P_MSK) + >> OTPGU_P_SHIFT; + oi->status |= (p_bits << OTPS_GUP_SHIFT); + } + + /* + * h/w region base and fuse region limit are fixed to the top and + * the bottom of the general use region. Everything else can be flexible. + */ + oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF; + oi->hwlim = oi->wsize; + if (oi->status & OTPS_GUP_HW) { + oi->hwlim = + ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_HSB_OFF) / 16; + oi->swbase = oi->hwlim; + } else + oi->swbase = oi->hwbase; + + /* subtract fuse and checksum from beginning */ + oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2; + + if (oi->status & OTPS_GUP_SW) { + oi->swlim = + ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_SFB_OFF) / 16; + oi->fbase = oi->swlim; + } else + oi->fbase = oi->swbase; + + oi->flim = oi->wsize; +} + +static void *ipxotp_init(struct si_pub *sih) +{ + uint idx; + chipcregs_t *cc; + otpinfo_t *oi; + + /* Make sure we're running IPX OTP */ + if (!OTPTYPE_IPX(sih->ccrev)) + return NULL; + + /* Make sure OTP is not disabled */ + if (ai_is_otp_disabled(sih)) + return NULL; + + /* Make sure OTP is powered up */ + if (!ai_is_otp_powered(sih)) + return NULL; + + oi = &otpinfo; + + /* Check for otp size */ + switch ((sih->cccaps & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) { + case 0: + /* Nothing there */ + return NULL; + case 1: /* 32x64 */ + oi->rows = 32; + oi->cols = 64; + oi->wsize = 128; + break; + case 2: /* 64x64 */ + oi->rows = 64; + oi->cols = 64; + oi->wsize = 256; + break; + case 5: /* 96x64 */ + oi->rows = 96; + oi->cols = 64; + oi->wsize = 384; + break; + case 7: /* 16x64 *//* 1024 bits */ + oi->rows = 16; + oi->cols = 64; + oi->wsize = 64; + break; + default: + /* Don't know the geometry */ + return NULL; + } + + /* Retrieve OTP region info */ + idx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + _ipxotp_init(oi, cc); + + ai_setcoreidx(sih, idx); + + return (void *)oi; +} + +static int ipxotp_read_region(void *oh, int region, u16 *data, uint *wlen) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + uint idx; + chipcregs_t *cc; + uint base, i, sz; + + /* Validate region selection */ + switch (region) { + case OTP_HW_RGN: + sz = (uint) oi->hwlim - oi->hwbase; + if (!(oi->status & OTPS_GUP_HW)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->hwbase; + break; + case OTP_SW_RGN: + sz = ((uint) oi->swlim - oi->swbase); + if (!(oi->status & OTPS_GUP_SW)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->swbase; + break; + case OTP_CI_RGN: + sz = OTPGU_CI_SZ; + if (!(oi->status & OTPS_GUP_CI)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->otpgu_base + OTPGU_CI_OFF; + break; + case OTP_FUSE_RGN: + sz = (uint) oi->flim - oi->fbase; + if (!(oi->status & OTPS_GUP_FUSE)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->fbase; + break; + case OTP_ALL_RGN: + sz = ((uint) oi->flim - oi->hwbase); + if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->hwbase; + break; + default: + return -EINVAL; + } + + idx = ai_coreidx(oi->sih); + cc = ai_setcoreidx(oi->sih, SI_CC_IDX); + + /* Read the data */ + for (i = 0; i < sz; i++) + data[i] = ipxotp_otpr(oh, cc, base + i); + + ai_setcoreidx(oi->sih, idx); + *wlen = sz; + return 0; +} + +static int ipxotp_nvread(void *oh, char *data, uint *len) +{ + return -ENOTSUPP; +} + +static otp_fn_t ipxotp_fn = { + (otp_size_t) ipxotp_size, + (otp_read_bit_t) ipxotp_read_bit, + + (otp_init_t) ipxotp_init, + (otp_read_region_t) ipxotp_read_region, + (otp_nvread_t) ipxotp_nvread, + + (otp_status_t) ipxotp_status +}; + +/* + * otp_status() + * otp_size() + * otp_read_bit() + * otp_init() + * otp_read_region() + * otp_nvread() + */ + +int otp_status(void *oh) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + + return oi->fn->status(oh); +} + +int otp_size(void *oh) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + + return oi->fn->size(oh); +} + +u16 otp_read_bit(void *oh, uint offset) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + uint idx = ai_coreidx(oi->sih); + chipcregs_t *cc = ai_setcoreidx(oi->sih, SI_CC_IDX); + u16 readBit = (u16) oi->fn->read_bit(oh, cc, offset); + ai_setcoreidx(oi->sih, idx); + return readBit; +} + +void *otp_init(struct si_pub *sih) +{ + otpinfo_t *oi; + void *ret = NULL; + + oi = &otpinfo; + memset(oi, 0, sizeof(otpinfo_t)); + + oi->ccrev = sih->ccrev; + + if (OTPTYPE_IPX(oi->ccrev)) + oi->fn = &ipxotp_fn; + + if (oi->fn == NULL) { + return NULL; + } + + oi->sih = sih; + + ret = (oi->fn->init) (sih); + + return ret; +} + +int +otp_read_region(struct si_pub *sih, int region, u16 *data, + uint *wlen) { + bool wasup = false; + void *oh; + int err = 0; + + wasup = ai_is_otp_powered(sih); + if (!wasup) + ai_otp_power(sih, true); + + if (!ai_is_otp_powered(sih) || ai_is_otp_disabled(sih)) { + err = -EPERM; + goto out; + } + + oh = otp_init(sih); + if (oh == NULL) { + err = -EBADE; + goto out; + } + + err = (((otpinfo_t *) oh)->fn->read_region) (oh, region, data, wlen); + + out: + if (!wasup) + ai_otp_power(sih, false); + + return err; +} + +int otp_nvread(void *oh, char *data, uint *len) +{ + otpinfo_t *oi = (otpinfo_t *) oh; + + return oi->fn->nvread(oh, data, len); +} diff --git a/drivers/staging/brcm80211/brcmsmac/otp.h b/drivers/staging/brcm80211/brcmsmac/otp.h new file mode 100644 index 0000000..c1eb347 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/otp.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_OTP_H_ +#define _BRCM_OTP_H_ + +/* OTP regions */ +#define OTP_HW_RGN 1 +#define OTP_SW_RGN 2 +#define OTP_CI_RGN 4 +#define OTP_FUSE_RGN 8 +#define OTP_ALL_RGN 0xf /* From h/w region to end of OTP including checksum */ + +/* OTP Size */ +#define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ + +/* Fixed size subregions sizes in words */ +#define OTPGU_CI_SZ 2 + +/* OTP usage */ +#define OTP4325_FM_DISABLED_OFFSET 188 + +/* Exported functions */ +extern int otp_status(void *oh); +extern int otp_size(void *oh); +extern u16 otp_read_bit(void *oh, uint offset); +extern void *otp_init(struct si_pub *sih); +extern int otp_read_region(struct si_pub *sih, int region, u16 *data, + uint *wlen); +extern int otp_nvread(void *oh, char *data, uint *len); + +#endif /* _BRCM_OTP_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c new file mode 100644 index 0000000..c67bf8b --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c @@ -0,0 +1,3249 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +u32 phyhal_msg_level = PHYHAL_ERROR; + +typedef struct _chan_info_basic { + u16 chan; + u16 freq; +} chan_info_basic_t; + +static chan_info_basic_t chan_info_all[] = { + + {1, 2412}, + {2, 2417}, + {3, 2422}, + {4, 2427}, + {5, 2432}, + {6, 2437}, + {7, 2442}, + {8, 2447}, + {9, 2452}, + {10, 2457}, + {11, 2462}, + {12, 2467}, + {13, 2472}, + {14, 2484}, + + {34, 5170}, + {38, 5190}, + {42, 5210}, + {46, 5230}, + + {36, 5180}, + {40, 5200}, + {44, 5220}, + {48, 5240}, + {52, 5260}, + {56, 5280}, + {60, 5300}, + {64, 5320}, + + {100, 5500}, + {104, 5520}, + {108, 5540}, + {112, 5560}, + {116, 5580}, + {120, 5600}, + {124, 5620}, + {128, 5640}, + {132, 5660}, + {136, 5680}, + {140, 5700}, + + {149, 5745}, + {153, 5765}, + {157, 5785}, + {161, 5805}, + {165, 5825}, + + {184, 4920}, + {188, 4940}, + {192, 4960}, + {196, 4980}, + {200, 5000}, + {204, 5020}, + {208, 5040}, + {212, 5060}, + {216, 50800} +}; + +u16 ltrn_list[PHY_LTRN_LIST_LEN] = { + 0x18f9, 0x0d01, 0x00e4, 0xdef4, 0x06f1, 0x0ffc, + 0xfa27, 0x1dff, 0x10f0, 0x0918, 0xf20a, 0xe010, + 0x1417, 0x1104, 0xf114, 0xf2fa, 0xf7db, 0xe2fc, + 0xe1fb, 0x13ee, 0xff0d, 0xe91c, 0x171a, 0x0318, + 0xda00, 0x03e8, 0x17e6, 0xe9e4, 0xfff3, 0x1312, + 0xe105, 0xe204, 0xf725, 0xf206, 0xf1ec, 0x11fc, + 0x14e9, 0xe0f0, 0xf2f6, 0x09e8, 0x1010, 0x1d01, + 0xfad9, 0x0f04, 0x060f, 0xde0c, 0x001c, 0x0dff, + 0x1807, 0xf61a, 0xe40e, 0x0f16, 0x05f9, 0x18ec, + 0x0a1b, 0xff1e, 0x2600, 0xffe2, 0x0ae5, 0x1814, + 0x0507, 0x0fea, 0xe4f2, 0xf6e6 +}; + +const u8 ofdm_rate_lookup[] = { + + WLC_RATE_48M, + WLC_RATE_24M, + WLC_RATE_12M, + WLC_RATE_6M, + WLC_RATE_54M, + WLC_RATE_36M, + WLC_RATE_18M, + WLC_RATE_9M +}; + +#define PHY_WREG_LIMIT 24 + +static void wlc_set_phy_uninitted(phy_info_t *pi); +static u32 wlc_phy_get_radio_ver(phy_info_t *pi); +static void wlc_phy_timercb_phycal(void *arg); + +static bool wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, + s8 *pwr_ant); + +static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay); +static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm); +static void wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, + u8 ch); + +static void wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, + struct txpwr_limits *tp, chanspec_t); +static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi); + +static s8 wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, + u32 band, u8 rate); +static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band); +static s8 wlc_phy_env_measure_vbat(phy_info_t *pi); +static s8 wlc_phy_env_measure_temperature(phy_info_t *pi); + +char *phy_getvar(phy_info_t *pi, const char *name) +{ + char *vars = pi->vars; + char *s; + int len; + + if (!name) + return NULL; + + len = strlen(name); + if (len == 0) + return NULL; + + for (s = vars; s && *s;) { + if ((memcmp(s, name, len) == 0) && (s[len] == '=')) + return &s[len + 1]; + + while (*s++) + ; + } + + return NULL; +} + +int phy_getintvar(phy_info_t *pi, const char *name) +{ + char *val; + + val = PHY_GETVAR(pi, name); + if (val == NULL) + return 0; + + return simple_strtoul(val, NULL, 0); +} + +void wlc_phyreg_enter(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + wlapi_bmac_ucode_wake_override_phyreg_set(pi->sh->physhim); +} + +void wlc_phyreg_exit(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + wlapi_bmac_ucode_wake_override_phyreg_clear(pi->sh->physhim); +} + +void wlc_radioreg_enter(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, MCTL_LOCK_RADIO); + + udelay(10); +} + +void wlc_radioreg_exit(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + volatile u16 dummy; + + dummy = R_REG(&pi->regs->phyversion); + pi->phy_wreg = 0; + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, 0); +} + +u16 read_radio_reg(phy_info_t *pi, u16 addr) +{ + u16 data; + + if ((addr == RADIO_IDCODE)) + return 0xffff; + + if (NORADIO_ENAB(pi->pubpi)) + return NORADIO_IDCODE & 0xffff; + + switch (pi->pubpi.phy_type) { + case PHY_TYPE_N: + CASECHECK(PHYTYPE, PHY_TYPE_N); + if (NREV_GE(pi->pubpi.phy_rev, 7)) + addr |= RADIO_2057_READ_OFF; + else + addr |= RADIO_2055_READ_OFF; + break; + + case PHY_TYPE_LCN: + CASECHECK(PHYTYPE, PHY_TYPE_LCN); + addr |= RADIO_2064_READ_OFF; + break; + + default: + break; + } + + if ((D11REV_GE(pi->sh->corerev, 24)) || + (D11REV_IS(pi->sh->corerev, 22) + && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { + W_REG_FLUSH(&pi->regs->radioregaddr, addr); + data = R_REG(&pi->regs->radioregdata); + } else { + W_REG_FLUSH(&pi->regs->phy4waddr, addr); + +#ifdef __ARM_ARCH_4T__ + __asm__(" .align 4 "); + __asm__(" nop "); + data = R_REG(&pi->regs->phy4wdatalo); +#else + data = R_REG(&pi->regs->phy4wdatalo); +#endif + + } + pi->phy_wreg = 0; + + return data; +} + +void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) +{ + if (NORADIO_ENAB(pi->pubpi)) + return; + + if ((D11REV_GE(pi->sh->corerev, 24)) || + (D11REV_IS(pi->sh->corerev, 22) + && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { + + W_REG_FLUSH(&pi->regs->radioregaddr, addr); + W_REG(&pi->regs->radioregdata, val); + } else { + W_REG_FLUSH(&pi->regs->phy4waddr, addr); + W_REG(&pi->regs->phy4wdatalo, val); + } + + if (pi->sh->bustype == PCI_BUS) { + if (++pi->phy_wreg >= pi->phy_wreg_limit) { + (void)R_REG(&pi->regs->maccontrol); + pi->phy_wreg = 0; + } + } +} + +static u32 read_radio_id(phy_info_t *pi) +{ + u32 id; + + if (NORADIO_ENAB(pi->pubpi)) + return NORADIO_IDCODE; + + if (D11REV_GE(pi->sh->corerev, 24)) { + u32 b0, b1, b2; + + W_REG_FLUSH(&pi->regs->radioregaddr, 0); + b0 = (u32) R_REG(&pi->regs->radioregdata); + W_REG_FLUSH(&pi->regs->radioregaddr, 1); + b1 = (u32) R_REG(&pi->regs->radioregdata); + W_REG_FLUSH(&pi->regs->radioregaddr, 2); + b2 = (u32) R_REG(&pi->regs->radioregdata); + + id = ((b0 & 0xf) << 28) | (((b2 << 8) | b1) << 12) | ((b0 >> 4) + & 0xf); + } else { + W_REG_FLUSH(&pi->regs->phy4waddr, RADIO_IDCODE); + id = (u32) R_REG(&pi->regs->phy4wdatalo); + id |= (u32) R_REG(&pi->regs->phy4wdatahi) << 16; + } + pi->phy_wreg = 0; + return id; +} + +void and_radio_reg(phy_info_t *pi, u16 addr, u16 val) +{ + u16 rval; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + rval = read_radio_reg(pi, addr); + write_radio_reg(pi, addr, (rval & val)); +} + +void or_radio_reg(phy_info_t *pi, u16 addr, u16 val) +{ + u16 rval; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + rval = read_radio_reg(pi, addr); + write_radio_reg(pi, addr, (rval | val)); +} + +void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask) +{ + u16 rval; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + rval = read_radio_reg(pi, addr); + write_radio_reg(pi, addr, (rval ^ mask)); +} + +void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) +{ + u16 rval; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + rval = read_radio_reg(pi, addr); + write_radio_reg(pi, addr, (rval & ~mask) | (val & mask)); +} + +void write_phy_channel_reg(phy_info_t *pi, uint val) +{ + W_REG(&pi->regs->phychannel, val); +} + +u16 read_phy_reg(phy_info_t *pi, u16 addr) +{ + d11regs_t *regs; + + regs = pi->regs; + + W_REG_FLUSH(®s->phyregaddr, addr); + + pi->phy_wreg = 0; + return R_REG(®s->phyregdata); +} + +void write_phy_reg(phy_info_t *pi, u16 addr, u16 val) +{ + d11regs_t *regs; + + regs = pi->regs; + +#ifdef __mips__ + W_REG_FLUSH(®s->phyregaddr, addr); + W_REG(®s->phyregdata, val); + if (addr == 0x72) + (void)R_REG(®s->phyregdata); +#else + W_REG((u32 *)(®s->phyregaddr), + addr | (val << 16)); + if (pi->sh->bustype == PCI_BUS) { + if (++pi->phy_wreg >= pi->phy_wreg_limit) { + pi->phy_wreg = 0; + (void)R_REG(®s->phyversion); + } + } +#endif +} + +void and_phy_reg(phy_info_t *pi, u16 addr, u16 val) +{ + d11regs_t *regs; + + regs = pi->regs; + + W_REG_FLUSH(®s->phyregaddr, addr); + + W_REG(®s->phyregdata, (R_REG(®s->phyregdata) & val)); + pi->phy_wreg = 0; +} + +void or_phy_reg(phy_info_t *pi, u16 addr, u16 val) +{ + d11regs_t *regs; + + regs = pi->regs; + + W_REG_FLUSH(®s->phyregaddr, addr); + + W_REG(®s->phyregdata, (R_REG(®s->phyregdata) | val)); + pi->phy_wreg = 0; +} + +void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) +{ + d11regs_t *regs; + + regs = pi->regs; + + W_REG_FLUSH(®s->phyregaddr, addr); + + W_REG(®s->phyregdata, + ((R_REG(®s->phyregdata) & ~mask) | (val & mask))); + pi->phy_wreg = 0; +} + +static void WLBANDINITFN(wlc_set_phy_uninitted) (phy_info_t *pi) +{ + int i, j; + + pi->initialized = false; + + pi->tx_vos = 0xffff; + pi->nrssi_table_delta = 0x7fffffff; + pi->rc_cal = 0xffff; + pi->mintxbias = 0xffff; + pi->txpwridx = -1; + if (ISNPHY(pi)) { + pi->phy_spuravoid = SPURAVOID_DISABLE; + + if (NREV_GE(pi->pubpi.phy_rev, 3) + && NREV_LT(pi->pubpi.phy_rev, 7)) + pi->phy_spuravoid = SPURAVOID_AUTO; + + pi->nphy_papd_skip = 0; + pi->nphy_papd_epsilon_offset[0] = 0xf588; + pi->nphy_papd_epsilon_offset[1] = 0xf588; + pi->nphy_txpwr_idx[0] = 128; + pi->nphy_txpwr_idx[1] = 128; + pi->nphy_txpwrindex[0].index_internal = 40; + pi->nphy_txpwrindex[1].index_internal = 40; + pi->phy_pabias = 0; + } else { + pi->phy_spuravoid = SPURAVOID_AUTO; + } + pi->radiopwr = 0xffff; + for (i = 0; i < STATIC_NUM_RF; i++) { + for (j = 0; j < STATIC_NUM_BB; j++) { + pi->stats_11b_txpower[i][j] = -1; + } + } +} + +shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp) +{ + shared_phy_t *sh; + + sh = kzalloc(sizeof(shared_phy_t), GFP_ATOMIC); + if (sh == NULL) { + return NULL; + } + + sh->sih = shp->sih; + sh->physhim = shp->physhim; + sh->unit = shp->unit; + sh->corerev = shp->corerev; + + sh->vid = shp->vid; + sh->did = shp->did; + sh->chip = shp->chip; + sh->chiprev = shp->chiprev; + sh->chippkg = shp->chippkg; + sh->sromrev = shp->sromrev; + sh->boardtype = shp->boardtype; + sh->boardrev = shp->boardrev; + sh->boardvendor = shp->boardvendor; + sh->boardflags = shp->boardflags; + sh->boardflags2 = shp->boardflags2; + sh->bustype = shp->bustype; + sh->buscorerev = shp->buscorerev; + + sh->fast_timer = PHY_SW_TIMER_FAST; + sh->slow_timer = PHY_SW_TIMER_SLOW; + sh->glacial_timer = PHY_SW_TIMER_GLACIAL; + + sh->rssi_mode = RSSI_ANT_MERGE_MAX; + + return sh; +} + +void wlc_phy_shared_detach(shared_phy_t *phy_sh) +{ + if (phy_sh) { + kfree(phy_sh); + } +} + +wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, + char *vars, struct wiphy *wiphy) +{ + phy_info_t *pi; + u32 sflags = 0; + uint phyversion; + int i; + + if (D11REV_IS(sh->corerev, 4)) + sflags = SISF_2G_PHY | SISF_5G_PHY; + else + sflags = ai_core_sflags(sh->sih, 0, 0); + + if (BAND_5G(bandtype)) { + if ((sflags & (SISF_5G_PHY | SISF_DB_PHY)) == 0) { + return NULL; + } + } + + pi = sh->phy_head; + if ((sflags & SISF_DB_PHY) && pi) { + + wlapi_bmac_corereset(pi->sh->physhim, pi->pubpi.coreflags); + pi->refcnt++; + return &pi->pubpi_ro; + } + + pi = kzalloc(sizeof(phy_info_t), GFP_ATOMIC); + if (pi == NULL) { + return NULL; + } + pi->wiphy = wiphy; + pi->regs = (d11regs_t *) regs; + pi->sh = sh; + pi->phy_init_por = true; + pi->phy_wreg_limit = PHY_WREG_LIMIT; + + pi->vars = vars; + + pi->txpwr_percent = 100; + + pi->do_initcal = true; + + pi->phycal_tempdelta = 0; + + if (BAND_2G(bandtype) && (sflags & SISF_2G_PHY)) { + + pi->pubpi.coreflags = SICF_GMODE; + } + + wlapi_bmac_corereset(pi->sh->physhim, pi->pubpi.coreflags); + phyversion = R_REG(&pi->regs->phyversion); + + pi->pubpi.phy_type = PHY_TYPE(phyversion); + pi->pubpi.phy_rev = phyversion & PV_PV_MASK; + + if (pi->pubpi.phy_type == PHY_TYPE_LCNXN) { + pi->pubpi.phy_type = PHY_TYPE_N; + pi->pubpi.phy_rev += LCNXN_BASEREV; + } + pi->pubpi.phy_corenum = PHY_CORE_NUM_2; + pi->pubpi.ana_rev = (phyversion & PV_AV_MASK) >> PV_AV_SHIFT; + + if (!VALID_PHYTYPE(pi->pubpi.phy_type)) { + goto err; + } + if (BAND_5G(bandtype)) { + if (!ISNPHY(pi)) { + goto err; + } + } else { + if (!ISNPHY(pi) && !ISLCNPHY(pi)) { + goto err; + } + } + + if (ISSIM_ENAB(pi->sh->sih)) { + pi->pubpi.radioid = NORADIO_ID; + pi->pubpi.radiorev = 5; + } else { + u32 idcode; + + wlc_phy_anacore((wlc_phy_t *) pi, ON); + + idcode = wlc_phy_get_radio_ver(pi); + pi->pubpi.radioid = + (idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT; + pi->pubpi.radiorev = + (idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT; + pi->pubpi.radiover = + (idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT; + if (!VALID_RADIO(pi, pi->pubpi.radioid)) { + goto err; + } + + wlc_phy_switch_radio((wlc_phy_t *) pi, OFF); + } + + wlc_set_phy_uninitted(pi); + + pi->bw = WL_CHANSPEC_BW_20; + pi->radio_chanspec = + BAND_2G(bandtype) ? CH20MHZ_CHSPEC(1) : CH20MHZ_CHSPEC(36); + + pi->rxiq_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; + pi->rxiq_antsel = ANT_RX_DIV_DEF; + + pi->watchdog_override = true; + + pi->cal_type_override = PHY_PERICAL_AUTO; + + pi->nphy_saved_noisevars.bufcount = 0; + + if (ISNPHY(pi)) + pi->min_txpower = PHY_TXPWR_MIN_NPHY; + else + pi->min_txpower = PHY_TXPWR_MIN; + + pi->sh->phyrxchain = 0x3; + + pi->rx2tx_biasentry = -1; + + pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; + pi->phy_txcore_enable_temp = + PHY_CHAIN_TX_DISABLE_TEMP - PHY_HYSTERESIS_DELTATEMP; + pi->phy_tempsense_offset = 0; + pi->phy_txcore_heatedup = false; + + pi->nphy_lastcal_temp = -50; + + pi->phynoise_polling = true; + if (ISNPHY(pi) || ISLCNPHY(pi)) + pi->phynoise_polling = false; + + for (i = 0; i < TXP_NUM_RATES; i++) { + pi->txpwr_limit[i] = WLC_TXPWR_MAX; + pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; + pi->tx_user_target[i] = WLC_TXPWR_MAX; + } + + pi->radiopwr_override = RADIOPWR_OVERRIDE_DEF; + + pi->user_txpwr_at_rfport = false; + + if (ISNPHY(pi)) { + + pi->phycal_timer = wlapi_init_timer(pi->sh->physhim, + wlc_phy_timercb_phycal, + pi, "phycal"); + if (!pi->phycal_timer) { + goto err; + } + + if (!wlc_phy_attach_nphy(pi)) + goto err; + + } else if (ISLCNPHY(pi)) { + if (!wlc_phy_attach_lcnphy(pi)) + goto err; + + } else { + + } + + pi->refcnt++; + pi->next = pi->sh->phy_head; + sh->phy_head = pi; + + pi->vars = (char *)&pi->vars; + + memcpy(&pi->pubpi_ro, &pi->pubpi, sizeof(wlc_phy_t)); + + return &pi->pubpi_ro; + + err: + kfree(pi); + return NULL; +} + +void wlc_phy_detach(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (pih) { + if (--pi->refcnt) { + return; + } + + if (pi->phycal_timer) { + wlapi_free_timer(pi->sh->physhim, pi->phycal_timer); + pi->phycal_timer = NULL; + } + + if (pi->sh->phy_head == pi) + pi->sh->phy_head = pi->next; + else if (pi->sh->phy_head->next == pi) + pi->sh->phy_head->next = NULL; + + if (pi->pi_fptr.detach) + (pi->pi_fptr.detach) (pi); + + kfree(pi); + } +} + +bool +wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev, + u16 *radioid, u16 *radiover) +{ + phy_info_t *pi = (phy_info_t *) pih; + *phytype = (u16) pi->pubpi.phy_type; + *phyrev = (u16) pi->pubpi.phy_rev; + *radioid = pi->pubpi.radioid; + *radiover = pi->pubpi.radiorev; + + return true; +} + +bool wlc_phy_get_encore(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + return pi->pubpi.abgphy_encore; +} + +u32 wlc_phy_get_coreflags(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + return pi->pubpi.coreflags; +} + +static void wlc_phy_timercb_phycal(void *arg) +{ + phy_info_t *pi = (phy_info_t *) arg; + uint delay = 5; + + if (PHY_PERICAL_MPHASE_PENDING(pi)) { + if (!pi->sh->up) { + wlc_phy_cal_perical_mphase_reset(pi); + return; + } + + if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi)) { + + delay = 1000; + wlc_phy_cal_perical_mphase_restart(pi); + } else + wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_AUTO); + wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); + return; + } + +} + +void wlc_phy_anacore(wlc_phy_t *pih, bool on) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (ISNPHY(pi)) { + if (on) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0xa6, 0x0d); + write_phy_reg(pi, 0x8f, 0x0); + write_phy_reg(pi, 0xa7, 0x0d); + write_phy_reg(pi, 0xa5, 0x0); + } else { + write_phy_reg(pi, 0xa5, 0x0); + } + } else { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0x8f, 0x07ff); + write_phy_reg(pi, 0xa6, 0x0fd); + write_phy_reg(pi, 0xa5, 0x07ff); + write_phy_reg(pi, 0xa7, 0x0fd); + } else { + write_phy_reg(pi, 0xa5, 0x7fff); + } + } + } else if (ISLCNPHY(pi)) { + if (on) { + and_phy_reg(pi, 0x43b, + ~((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); + } else { + or_phy_reg(pi, 0x43c, + (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); + or_phy_reg(pi, 0x43b, + (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); + } + } +} + +u32 wlc_phy_clk_bwbits(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + + u32 phy_bw_clkbits = 0; + + if (pi && (ISNPHY(pi) || ISLCNPHY(pi))) { + switch (pi->bw) { + case WL_CHANSPEC_BW_10: + phy_bw_clkbits = SICF_BW10; + break; + case WL_CHANSPEC_BW_20: + phy_bw_clkbits = SICF_BW20; + break; + case WL_CHANSPEC_BW_40: + phy_bw_clkbits = SICF_BW40; + break; + default: + break; + } + } + + return phy_bw_clkbits; +} + +void WLBANDINITFN(wlc_phy_por_inform) (wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->phy_init_por = true; +} + +void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->edcrs_threshold_lock = lock; + + write_phy_reg(pi, 0x22c, 0x46b); + write_phy_reg(pi, 0x22d, 0x46b); + write_phy_reg(pi, 0x22e, 0x3c0); + write_phy_reg(pi, 0x22f, 0x3c0); +} + +void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->do_initcal = initcal; +} + +void wlc_phy_hw_clk_state_upd(wlc_phy_t *pih, bool newstate) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (!pi || !pi->sh) + return; + + pi->sh->clk = newstate; +} + +void wlc_phy_hw_state_upd(wlc_phy_t *pih, bool newstate) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (!pi || !pi->sh) + return; + + pi->sh->up = newstate; +} + +void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) +{ + u32 mc; + initfn_t phy_init = NULL; + phy_info_t *pi = (phy_info_t *) pih; + + if (pi->init_in_progress) + return; + + pi->init_in_progress = true; + + pi->radio_chanspec = chanspec; + + mc = R_REG(&pi->regs->maccontrol); + if (WARN(mc & MCTL_EN_MAC, "HW error MAC running on init")) + return; + + if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) { + pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; + } + + if (WARN(!(ai_core_sflags(pi->sh->sih, 0, 0) & SISF_FCLKA), + "HW error SISF_FCLKA\n")) + return; + + phy_init = pi->pi_fptr.init; + + if (phy_init == NULL) { + return; + } + + wlc_phy_anacore(pih, ON); + + if (CHSPEC_BW(pi->radio_chanspec) != pi->bw) + wlapi_bmac_bw_set(pi->sh->physhim, + CHSPEC_BW(pi->radio_chanspec)); + + pi->nphy_gain_boost = true; + + wlc_phy_switch_radio((wlc_phy_t *) pi, ON); + + (*phy_init) (pi); + + pi->phy_init_por = false; + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) + wlc_phy_do_dummy_tx(pi, true, OFF); + + if (!(ISNPHY(pi))) + wlc_phy_txpower_update_shm(pi); + + wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, pi->sh->rx_antdiv); + + pi->init_in_progress = false; +} + +void wlc_phy_cal_init(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + initfn_t cal_init = NULL; + + if (WARN((R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) != 0, + "HW error: MAC enabled during phy cal\n")) + return; + + if (!pi->initialized) { + cal_init = pi->pi_fptr.calinit; + if (cal_init) + (*cal_init) (pi); + + pi->initialized = true; + } +} + +int wlc_phy_down(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + int callbacks = 0; + + if (pi->phycal_timer + && !wlapi_del_timer(pi->sh->physhim, pi->phycal_timer)) + callbacks++; + + pi->nphy_iqcal_chanspec_2G = 0; + pi->nphy_iqcal_chanspec_5G = 0; + + return callbacks; +} + +static u32 wlc_phy_get_radio_ver(phy_info_t *pi) +{ + u32 ver; + + ver = read_radio_id(pi); + + return ver; +} + +void +wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, + u16 tblAddr, u16 tblDataHi, u16 tblDataLo) +{ + write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); + + pi->tbl_data_hi = tblDataHi; + pi->tbl_data_lo = tblDataLo; + + if ((pi->sh->chip == BCM43224_CHIP_ID || + pi->sh->chip == BCM43421_CHIP_ID) && + (pi->sh->chiprev == 1)) { + pi->tbl_addr = tblAddr; + pi->tbl_save_id = tbl_id; + pi->tbl_save_offset = tbl_offset; + } +} + +void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val) +{ + if ((pi->sh->chip == BCM43224_CHIP_ID || + pi->sh->chip == BCM43421_CHIP_ID) && + (pi->sh->chiprev == 1) && + (pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { + read_phy_reg(pi, pi->tbl_data_lo); + + write_phy_reg(pi, pi->tbl_addr, + (pi->tbl_save_id << 10) | pi->tbl_save_offset); + pi->tbl_save_offset++; + } + + if (width == 32) { + + write_phy_reg(pi, pi->tbl_data_hi, (u16) (val >> 16)); + write_phy_reg(pi, pi->tbl_data_lo, (u16) val); + } else { + + write_phy_reg(pi, pi->tbl_data_lo, (u16) val); + } +} + +void +wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, + u16 tblAddr, u16 tblDataHi, u16 tblDataLo) +{ + uint idx; + uint tbl_id = ptbl_info->tbl_id; + uint tbl_offset = ptbl_info->tbl_offset; + uint tbl_width = ptbl_info->tbl_width; + const u8 *ptbl_8b = (const u8 *)ptbl_info->tbl_ptr; + const u16 *ptbl_16b = (const u16 *)ptbl_info->tbl_ptr; + const u32 *ptbl_32b = (const u32 *)ptbl_info->tbl_ptr; + + write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); + + for (idx = 0; idx < ptbl_info->tbl_len; idx++) { + + if ((pi->sh->chip == BCM43224_CHIP_ID || + pi->sh->chip == BCM43421_CHIP_ID) && + (pi->sh->chiprev == 1) && + (tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { + read_phy_reg(pi, tblDataLo); + + write_phy_reg(pi, tblAddr, + (tbl_id << 10) | (tbl_offset + idx)); + } + + if (tbl_width == 32) { + + write_phy_reg(pi, tblDataHi, + (u16) (ptbl_32b[idx] >> 16)); + write_phy_reg(pi, tblDataLo, (u16) ptbl_32b[idx]); + } else if (tbl_width == 16) { + + write_phy_reg(pi, tblDataLo, ptbl_16b[idx]); + } else { + + write_phy_reg(pi, tblDataLo, ptbl_8b[idx]); + } + } +} + +void +wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, + u16 tblAddr, u16 tblDataHi, u16 tblDataLo) +{ + uint idx; + uint tbl_id = ptbl_info->tbl_id; + uint tbl_offset = ptbl_info->tbl_offset; + uint tbl_width = ptbl_info->tbl_width; + u8 *ptbl_8b = (u8 *)ptbl_info->tbl_ptr; + u16 *ptbl_16b = (u16 *)ptbl_info->tbl_ptr; + u32 *ptbl_32b = (u32 *)ptbl_info->tbl_ptr; + + write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); + + for (idx = 0; idx < ptbl_info->tbl_len; idx++) { + + if ((pi->sh->chip == BCM43224_CHIP_ID || + pi->sh->chip == BCM43421_CHIP_ID) && + (pi->sh->chiprev == 1)) { + (void)read_phy_reg(pi, tblDataLo); + + write_phy_reg(pi, tblAddr, + (tbl_id << 10) | (tbl_offset + idx)); + } + + if (tbl_width == 32) { + + ptbl_32b[idx] = read_phy_reg(pi, tblDataLo); + ptbl_32b[idx] |= (read_phy_reg(pi, tblDataHi) << 16); + } else if (tbl_width == 16) { + + ptbl_16b[idx] = read_phy_reg(pi, tblDataLo); + } else { + + ptbl_8b[idx] = (u8) read_phy_reg(pi, tblDataLo); + } + } +} + +uint +wlc_phy_init_radio_regs_allbands(phy_info_t *pi, radio_20xx_regs_t *radioregs) +{ + uint i = 0; + + do { + if (radioregs[i].do_init) { + write_radio_reg(pi, radioregs[i].address, + (u16) radioregs[i].init); + } + + i++; + } while (radioregs[i].address != 0xffff); + + return i; +} + +uint +wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, + u16 core_offset) +{ + uint i = 0; + uint count = 0; + + do { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (radioregs[i].do_init_a) { + write_radio_reg(pi, + radioregs[i]. + address | core_offset, + (u16) radioregs[i].init_a); + if (ISNPHY(pi) && (++count % 4 == 0)) + WLC_PHY_WAR_PR51571(pi); + } + } else { + if (radioregs[i].do_init_g) { + write_radio_reg(pi, + radioregs[i]. + address | core_offset, + (u16) radioregs[i].init_g); + if (ISNPHY(pi) && (++count % 4 == 0)) + WLC_PHY_WAR_PR51571(pi); + } + } + + i++; + } while (radioregs[i].address != 0xffff); + + return i; +} + +void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) +{ +#define DUMMY_PKT_LEN 20 + d11regs_t *regs = pi->regs; + int i, count; + u8 ofdmpkt[DUMMY_PKT_LEN] = { + 0xcc, 0x01, 0x02, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 + }; + u8 cckpkt[DUMMY_PKT_LEN] = { + 0x6e, 0x84, 0x0b, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 + }; + u32 *dummypkt; + + dummypkt = (u32 *) (ofdm ? ofdmpkt : cckpkt); + wlapi_bmac_write_template_ram(pi->sh->physhim, 0, DUMMY_PKT_LEN, + dummypkt); + + W_REG(®s->xmtsel, 0); + + if (D11REV_GE(pi->sh->corerev, 11)) + W_REG(®s->wepctl, 0x100); + else + W_REG(®s->wepctl, 0); + + W_REG(®s->txe_phyctl, (ofdm ? 1 : 0) | PHY_TXC_ANT_0); + if (ISNPHY(pi) || ISLCNPHY(pi)) { + W_REG(®s->txe_phyctl1, 0x1A02); + } + + W_REG(®s->txe_wm_0, 0); + W_REG(®s->txe_wm_1, 0); + + W_REG(®s->xmttplatetxptr, 0); + W_REG(®s->xmttxcnt, DUMMY_PKT_LEN); + + W_REG(®s->xmtsel, ((8 << 8) | (1 << 5) | (1 << 2) | 2)); + + W_REG(®s->txe_ctl, 0); + + if (!pa_on) { + if (ISNPHY(pi)) + wlc_phy_pa_override_nphy(pi, OFF); + } + + if (ISNPHY(pi) || ISLCNPHY(pi)) + W_REG(®s->txe_aux, 0xD0); + else + W_REG(®s->txe_aux, ((1 << 5) | (1 << 4))); + + (void)R_REG(®s->txe_aux); + + i = 0; + count = ofdm ? 30 : 250; + + if (ISSIM_ENAB(pi->sh->sih)) { + count *= 100; + } + + while ((i++ < count) + && (R_REG(®s->txe_status) & (1 << 7))) { + udelay(10); + } + + i = 0; + + while ((i++ < 10) + && ((R_REG(®s->txe_status) & (1 << 10)) == 0)) { + udelay(10); + } + + i = 0; + + while ((i++ < 10) && ((R_REG(®s->ifsstat) & (1 << 8)))) + udelay(10); + + if (!pa_on) { + if (ISNPHY(pi)) + wlc_phy_pa_override_nphy(pi, ON); + } +} + +void wlc_phy_hold_upd(wlc_phy_t *pih, mbool id, bool set) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (set) { + mboolset(pi->measure_hold, id); + } else { + mboolclr(pi->measure_hold, id); + } + + return; +} + +void wlc_phy_mute_upd(wlc_phy_t *pih, bool mute, mbool flags) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (mute) { + mboolset(pi->measure_hold, PHY_HOLD_FOR_MUTE); + } else { + mboolclr(pi->measure_hold, PHY_HOLD_FOR_MUTE); + } + + if (!mute && (flags & PHY_MUTE_FOR_PREISM)) + pi->nphy_perical_last = pi->sh->now - pi->sh->glacial_timer; + return; +} + +void wlc_phy_clear_tssi(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (ISNPHY(pi)) { + return; + } else { + wlapi_bmac_write_shm(pi->sh->physhim, M_B_TSSI_0, NULL_TSSI_W); + wlapi_bmac_write_shm(pi->sh->physhim, M_B_TSSI_1, NULL_TSSI_W); + wlapi_bmac_write_shm(pi->sh->physhim, M_G_TSSI_0, NULL_TSSI_W); + wlapi_bmac_write_shm(pi->sh->physhim, M_G_TSSI_1, NULL_TSSI_W); + } +} + +static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi) +{ + return false; +} + +void wlc_phy_switch_radio(wlc_phy_t *pih, bool on) +{ + phy_info_t *pi = (phy_info_t *) pih; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + { + uint mc; + + mc = R_REG(&pi->regs->maccontrol); + } + + if (ISNPHY(pi)) { + wlc_phy_switch_radio_nphy(pi, on); + + } else if (ISLCNPHY(pi)) { + if (on) { + and_phy_reg(pi, 0x44c, + ~((0x1 << 8) | + (0x1 << 9) | + (0x1 << 10) | (0x1 << 11) | (0x1 << 12))); + and_phy_reg(pi, 0x4b0, ~((0x1 << 3) | (0x1 << 11))); + and_phy_reg(pi, 0x4f9, ~(0x1 << 3)); + } else { + and_phy_reg(pi, 0x44d, + ~((0x1 << 10) | + (0x1 << 11) | + (0x1 << 12) | (0x1 << 13) | (0x1 << 14))); + or_phy_reg(pi, 0x44c, + (0x1 << 8) | + (0x1 << 9) | + (0x1 << 10) | (0x1 << 11) | (0x1 << 12)); + + and_phy_reg(pi, 0x4b7, ~((0x7f << 8))); + and_phy_reg(pi, 0x4b1, ~((0x1 << 13))); + or_phy_reg(pi, 0x4b0, (0x1 << 3) | (0x1 << 11)); + and_phy_reg(pi, 0x4fa, ~((0x1 << 3))); + or_phy_reg(pi, 0x4f9, (0x1 << 3)); + } + } +} + +u16 wlc_phy_bw_state_get(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + return pi->bw; +} + +void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->bw = bw; +} + +void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch) +{ + phy_info_t *pi = (phy_info_t *) ppi; + pi->radio_chanspec = newch; + +} + +chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + return pi->radio_chanspec; +} + +void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec) +{ + phy_info_t *pi = (phy_info_t *) ppi; + u16 m_cur_channel; + chansetfn_t chanspec_set = NULL; + + m_cur_channel = CHSPEC_CHANNEL(chanspec); + if (CHSPEC_IS5G(chanspec)) + m_cur_channel |= D11_CURCHANNEL_5G; + if (CHSPEC_IS40(chanspec)) + m_cur_channel |= D11_CURCHANNEL_40; + wlapi_bmac_write_shm(pi->sh->physhim, M_CURCHANNEL, m_cur_channel); + + chanspec_set = pi->pi_fptr.chanset; + if (chanspec_set) + (*chanspec_set) (pi, chanspec); + +} + +int wlc_phy_chanspec_freq2bandrange_lpssn(uint freq) +{ + int range = -1; + + if (freq < 2500) + range = WL_CHAN_FREQ_RANGE_2G; + else if (freq <= 5320) + range = WL_CHAN_FREQ_RANGE_5GL; + else if (freq <= 5700) + range = WL_CHAN_FREQ_RANGE_5GM; + else + range = WL_CHAN_FREQ_RANGE_5GH; + + return range; +} + +int wlc_phy_chanspec_bandrange_get(phy_info_t *pi, chanspec_t chanspec) +{ + int range = -1; + uint channel = CHSPEC_CHANNEL(chanspec); + uint freq = wlc_phy_channel2freq(channel); + + if (ISNPHY(pi)) { + range = wlc_phy_get_chan_freq_range_nphy(pi, channel); + } else if (ISLCNPHY(pi)) { + range = wlc_phy_chanspec_freq2bandrange_lpssn(freq); + } + + return range; +} + +void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, bool wide_filter) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->channel_14_wide_filter = wide_filter; + +} + +int wlc_phy_channel2freq(uint channel) +{ + uint i; + + for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) + if (chan_info_all[i].chan == channel) + return chan_info_all[i].freq; + return 0; +} + +void +wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, chanvec_t *channels) +{ + phy_info_t *pi = (phy_info_t *) ppi; + uint i; + uint channel; + + memset(channels, 0, sizeof(chanvec_t)); + + for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { + channel = chan_info_all[i].chan; + + if ((pi->a_band_high_disable) && (channel >= FIRST_REF5_CHANNUM) + && (channel <= LAST_REF5_CHANNUM)) + continue; + + if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || + ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) + setbit(channels->vec, channel); + } +} + +chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band) +{ + phy_info_t *pi = (phy_info_t *) ppi; + uint i; + uint channel; + chanspec_t chspec; + + for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { + channel = chan_info_all[i].chan; + + if (ISNPHY(pi) && IS40MHZ(pi)) { + uint j; + + for (j = 0; j < ARRAY_SIZE(chan_info_all); j++) { + if (chan_info_all[j].chan == + channel + CH_10MHZ_APART) + break; + } + + if (j == ARRAY_SIZE(chan_info_all)) + continue; + + channel = UPPER_20_SB(channel); + chspec = + channel | WL_CHANSPEC_BW_40 | + WL_CHANSPEC_CTL_SB_LOWER; + if (band == WLC_BAND_2G) + chspec |= WL_CHANSPEC_BAND_2G; + else + chspec |= WL_CHANSPEC_BAND_5G; + } else + chspec = CH20MHZ_CHSPEC(channel); + + if ((pi->a_band_high_disable) && (channel >= FIRST_REF5_CHANNUM) + && (channel <= LAST_REF5_CHANNUM)) + continue; + + if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || + ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) + return chspec; + } + + return (chanspec_t) INVCHANSPEC; +} + +int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + *qdbm = pi->tx_user_target[0]; + if (override != NULL) + *override = pi->txpwroverride; + return 0; +} + +void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr) +{ + bool mac_enabled = false; + phy_info_t *pi = (phy_info_t *) ppi; + + memcpy(&pi->tx_user_target[TXP_FIRST_CCK], + &txpwr->cck[0], WLC_NUM_RATES_CCK); + + memcpy(&pi->tx_user_target[TXP_FIRST_OFDM], + &txpwr->ofdm[0], WLC_NUM_RATES_OFDM); + memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_20_CDD], + &txpwr->ofdm_cdd[0], WLC_NUM_RATES_OFDM); + + memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_SISO], + &txpwr->ofdm_40_siso[0], WLC_NUM_RATES_OFDM); + memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_CDD], + &txpwr->ofdm_40_cdd[0], WLC_NUM_RATES_OFDM); + + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SISO], + &txpwr->mcs_20_siso[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_CDD], + &txpwr->mcs_20_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_STBC], + &txpwr->mcs_20_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SDM], + &txpwr->mcs_20_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); + + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SISO], + &txpwr->mcs_40_siso[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_CDD], + &txpwr->mcs_40_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_STBC], + &txpwr->mcs_40_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); + memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SDM], + &txpwr->mcs_40_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); + + if (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) + mac_enabled = true; + + if (mac_enabled) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + wlc_phy_txpower_recalc_target(pi); + wlc_phy_cal_txpower_recalc_sw(pi); + + if (mac_enabled) + wlapi_enable_mac(pi->sh->physhim); +} + +int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) +{ + phy_info_t *pi = (phy_info_t *) ppi; + int i; + + if (qdbm > 127) + return 5; + + for (i = 0; i < TXP_NUM_RATES; i++) + pi->tx_user_target[i] = (u8) qdbm; + + pi->txpwroverride = false; + + if (pi->sh->up) { + if (!SCAN_INPROG_PHY(pi)) { + bool suspend; + + suspend = + (0 == + (R_REG(&pi->regs->maccontrol) & + MCTL_EN_MAC)); + + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + wlc_phy_txpower_recalc_target(pi); + wlc_phy_cal_txpower_recalc_sw(pi); + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + } + } + return 0; +} + +void +wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, + u8 *max_pwr, int txp_rate_idx) +{ + phy_info_t *pi = (phy_info_t *) ppi; + uint i; + + *min_pwr = pi->min_txpower * WLC_TXPWR_DB_FACTOR; + + if (ISNPHY(pi)) { + if (txp_rate_idx < 0) + txp_rate_idx = TXP_FIRST_CCK; + wlc_phy_txpower_sromlimit_get_nphy(pi, channel, max_pwr, + (u8) txp_rate_idx); + + } else if ((channel <= CH_MAX_2G_CHANNEL)) { + if (txp_rate_idx < 0) + txp_rate_idx = TXP_FIRST_CCK; + *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; + } else { + + *max_pwr = WLC_TXPWR_MAX; + + if (txp_rate_idx < 0) + txp_rate_idx = TXP_FIRST_OFDM; + + for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { + if (channel == chan_info_all[i].chan) { + break; + } + } + + if (pi->hwtxpwr) { + *max_pwr = pi->hwtxpwr[i]; + } else { + + if ((i >= FIRST_MID_5G_CHAN) && (i <= LAST_MID_5G_CHAN)) + *max_pwr = + pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; + if ((i >= FIRST_HIGH_5G_CHAN) + && (i <= LAST_HIGH_5G_CHAN)) + *max_pwr = + pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; + if ((i >= FIRST_LOW_5G_CHAN) && (i <= LAST_LOW_5G_CHAN)) + *max_pwr = + pi->tx_srom_max_rate_5g_low[txp_rate_idx]; + } + } +} + +void +wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, u8 *max_txpwr, + u8 *min_txpwr) +{ + phy_info_t *pi = (phy_info_t *) ppi; + u8 tx_pwr_max = 0; + u8 tx_pwr_min = 255; + u8 max_num_rate; + u8 maxtxpwr, mintxpwr, rate, pactrl; + + pactrl = 0; + + max_num_rate = ISNPHY(pi) ? TXP_NUM_RATES : + ISLCNPHY(pi) ? (TXP_LAST_SISO_MCS_20 + 1) : (TXP_LAST_OFDM + 1); + + for (rate = 0; rate < max_num_rate; rate++) { + + wlc_phy_txpower_sromlimit(ppi, chan, &mintxpwr, &maxtxpwr, + rate); + + maxtxpwr = (maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0; + + maxtxpwr = (maxtxpwr > 6) ? (maxtxpwr - 6) : 0; + + tx_pwr_max = max(tx_pwr_max, maxtxpwr); + tx_pwr_min = min(tx_pwr_min, maxtxpwr); + } + *max_txpwr = tx_pwr_max; + *min_txpwr = tx_pwr_min; +} + +void +wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint bandunit, s32 *max_pwr, + s32 *min_pwr, u32 *step_pwr) +{ + return; +} + +u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + return pi->tx_power_min; +} + +u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + return pi->tx_power_max; +} + +void wlc_phy_txpower_recalc_target(phy_info_t *pi) +{ + u8 maxtxpwr, mintxpwr, rate, pactrl; + uint target_chan; + u8 tx_pwr_target[TXP_NUM_RATES]; + u8 tx_pwr_max = 0; + u8 tx_pwr_min = 255; + u8 tx_pwr_max_rate_ind = 0; + u8 max_num_rate; + u8 start_rate = 0; + chanspec_t chspec; + u32 band = CHSPEC2WLC_BAND(pi->radio_chanspec); + initfn_t txpwr_recalc_fn = NULL; + + chspec = pi->radio_chanspec; + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) + target_chan = CHSPEC_CHANNEL(chspec); + else if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) + target_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + else + target_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + + pactrl = 0; + if (ISLCNPHY(pi)) { + u32 offset_mcs, i; + + if (CHSPEC_IS40(pi->radio_chanspec)) { + offset_mcs = pi->mcs40_po; + for (i = TXP_FIRST_SISO_MCS_20; + i <= TXP_LAST_SISO_MCS_20; i++) { + pi->tx_srom_max_rate_2g[i - 8] = + pi->tx_srom_max_2g - + ((offset_mcs & 0xf) * 2); + offset_mcs >>= 4; + } + } else { + offset_mcs = pi->mcs20_po; + for (i = TXP_FIRST_SISO_MCS_20; + i <= TXP_LAST_SISO_MCS_20; i++) { + pi->tx_srom_max_rate_2g[i - 8] = + pi->tx_srom_max_2g - + ((offset_mcs & 0xf) * 2); + offset_mcs >>= 4; + } + } + } +#if WL11N + max_num_rate = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : + ((ISLCNPHY(pi)) ? + (TXP_LAST_SISO_MCS_20 + 1) : (TXP_LAST_OFDM + 1))); +#else + max_num_rate = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : (TXP_LAST_OFDM + 1)); +#endif + + wlc_phy_upd_env_txpwr_rate_limits(pi, band); + + for (rate = start_rate; rate < max_num_rate; rate++) { + + tx_pwr_target[rate] = pi->tx_user_target[rate]; + + if (pi->user_txpwr_at_rfport) { + tx_pwr_target[rate] += + wlc_user_txpwr_antport_to_rfport(pi, target_chan, + band, rate); + } + + { + + wlc_phy_txpower_sromlimit((wlc_phy_t *) pi, target_chan, + &mintxpwr, &maxtxpwr, rate); + + maxtxpwr = min(maxtxpwr, pi->txpwr_limit[rate]); + + maxtxpwr = + (maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0; + + maxtxpwr = (maxtxpwr > 6) ? (maxtxpwr - 6) : 0; + + maxtxpwr = min(maxtxpwr, tx_pwr_target[rate]); + + if (pi->txpwr_percent <= 100) + maxtxpwr = (maxtxpwr * pi->txpwr_percent) / 100; + + tx_pwr_target[rate] = max(maxtxpwr, mintxpwr); + } + + tx_pwr_target[rate] = + min(tx_pwr_target[rate], pi->txpwr_env_limit[rate]); + + if (tx_pwr_target[rate] > tx_pwr_max) + tx_pwr_max_rate_ind = rate; + + tx_pwr_max = max(tx_pwr_max, tx_pwr_target[rate]); + tx_pwr_min = min(tx_pwr_min, tx_pwr_target[rate]); + } + + memset(pi->tx_power_offset, 0, sizeof(pi->tx_power_offset)); + pi->tx_power_max = tx_pwr_max; + pi->tx_power_min = tx_pwr_min; + pi->tx_power_max_rate_ind = tx_pwr_max_rate_ind; + for (rate = 0; rate < max_num_rate; rate++) { + + pi->tx_power_target[rate] = tx_pwr_target[rate]; + + if (!pi->hwpwrctrl || ISNPHY(pi)) { + pi->tx_power_offset[rate] = + pi->tx_power_max - pi->tx_power_target[rate]; + } else { + pi->tx_power_offset[rate] = + pi->tx_power_target[rate] - pi->tx_power_min; + } + } + + txpwr_recalc_fn = pi->pi_fptr.txpwrrecalc; + if (txpwr_recalc_fn) + (*txpwr_recalc_fn) (pi); +} + +void +wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, + chanspec_t chanspec) +{ + u8 tmp_txpwr_limit[2 * WLC_NUM_RATES_OFDM]; + u8 *txpwr_ptr1 = NULL, *txpwr_ptr2 = NULL; + int rate_start_index = 0, rate1, rate2, k; + + for (rate1 = WL_TX_POWER_CCK_FIRST, rate2 = 0; + rate2 < WL_TX_POWER_CCK_NUM; rate1++, rate2++) + pi->txpwr_limit[rate1] = txpwr->cck[rate2]; + + for (rate1 = WL_TX_POWER_OFDM_FIRST, rate2 = 0; + rate2 < WL_TX_POWER_OFDM_NUM; rate1++, rate2++) + pi->txpwr_limit[rate1] = txpwr->ofdm[rate2]; + + if (ISNPHY(pi)) { + + for (k = 0; k < 4; k++) { + switch (k) { + case 0: + + txpwr_ptr1 = txpwr->mcs_20_siso; + txpwr_ptr2 = txpwr->ofdm; + rate_start_index = WL_TX_POWER_OFDM_FIRST; + break; + case 1: + + txpwr_ptr1 = txpwr->mcs_20_cdd; + txpwr_ptr2 = txpwr->ofdm_cdd; + rate_start_index = WL_TX_POWER_OFDM20_CDD_FIRST; + break; + case 2: + + txpwr_ptr1 = txpwr->mcs_40_siso; + txpwr_ptr2 = txpwr->ofdm_40_siso; + rate_start_index = + WL_TX_POWER_OFDM40_SISO_FIRST; + break; + case 3: + + txpwr_ptr1 = txpwr->mcs_40_cdd; + txpwr_ptr2 = txpwr->ofdm_40_cdd; + rate_start_index = WL_TX_POWER_OFDM40_CDD_FIRST; + break; + } + + for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { + tmp_txpwr_limit[rate2] = 0; + tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = + txpwr_ptr1[rate2]; + } + wlc_phy_mcs_to_ofdm_powers_nphy(tmp_txpwr_limit, 0, + WLC_NUM_RATES_OFDM - 1, + WLC_NUM_RATES_OFDM); + for (rate1 = rate_start_index, rate2 = 0; + rate2 < WLC_NUM_RATES_OFDM; rate1++, rate2++) + pi->txpwr_limit[rate1] = + min(txpwr_ptr2[rate2], + tmp_txpwr_limit[rate2]); + } + + for (k = 0; k < 4; k++) { + switch (k) { + case 0: + + txpwr_ptr1 = txpwr->ofdm; + txpwr_ptr2 = txpwr->mcs_20_siso; + rate_start_index = WL_TX_POWER_MCS20_SISO_FIRST; + break; + case 1: + + txpwr_ptr1 = txpwr->ofdm_cdd; + txpwr_ptr2 = txpwr->mcs_20_cdd; + rate_start_index = WL_TX_POWER_MCS20_CDD_FIRST; + break; + case 2: + + txpwr_ptr1 = txpwr->ofdm_40_siso; + txpwr_ptr2 = txpwr->mcs_40_siso; + rate_start_index = WL_TX_POWER_MCS40_SISO_FIRST; + break; + case 3: + + txpwr_ptr1 = txpwr->ofdm_40_cdd; + txpwr_ptr2 = txpwr->mcs_40_cdd; + rate_start_index = WL_TX_POWER_MCS40_CDD_FIRST; + break; + } + for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { + tmp_txpwr_limit[rate2] = 0; + tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = + txpwr_ptr1[rate2]; + } + wlc_phy_ofdm_to_mcs_powers_nphy(tmp_txpwr_limit, 0, + WLC_NUM_RATES_OFDM - 1, + WLC_NUM_RATES_OFDM); + for (rate1 = rate_start_index, rate2 = 0; + rate2 < WLC_NUM_RATES_MCS_1_STREAM; + rate1++, rate2++) + pi->txpwr_limit[rate1] = + min(txpwr_ptr2[rate2], + tmp_txpwr_limit[rate2]); + } + + for (k = 0; k < 2; k++) { + switch (k) { + case 0: + + rate_start_index = WL_TX_POWER_MCS20_STBC_FIRST; + txpwr_ptr1 = txpwr->mcs_20_stbc; + break; + case 1: + + rate_start_index = WL_TX_POWER_MCS40_STBC_FIRST; + txpwr_ptr1 = txpwr->mcs_40_stbc; + break; + } + for (rate1 = rate_start_index, rate2 = 0; + rate2 < WLC_NUM_RATES_MCS_1_STREAM; + rate1++, rate2++) + pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; + } + + for (k = 0; k < 2; k++) { + switch (k) { + case 0: + + rate_start_index = WL_TX_POWER_MCS20_SDM_FIRST; + txpwr_ptr1 = txpwr->mcs_20_mimo; + break; + case 1: + + rate_start_index = WL_TX_POWER_MCS40_SDM_FIRST; + txpwr_ptr1 = txpwr->mcs_40_mimo; + break; + } + for (rate1 = rate_start_index, rate2 = 0; + rate2 < WLC_NUM_RATES_MCS_2_STREAM; + rate1++, rate2++) + pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; + } + + pi->txpwr_limit[WL_TX_POWER_MCS_32] = txpwr->mcs32; + + pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST] = + min(pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST], + pi->txpwr_limit[WL_TX_POWER_MCS_32]); + pi->txpwr_limit[WL_TX_POWER_MCS_32] = + pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST]; + } +} + +void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->txpwr_percent = txpwr_percent; +} + +void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->sh->machwcap = machwcap; +} + +void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end) +{ + phy_info_t *pi = (phy_info_t *) ppi; + u16 rxc; + rxc = 0; + + if (start_end == ON) { + if (!ISNPHY(pi)) + return; + + if (NREV_IS(pi->pubpi.phy_rev, 3) + || NREV_IS(pi->pubpi.phy_rev, 4)) { + W_REG(&pi->regs->phyregaddr, 0xa0); + (void)R_REG(&pi->regs->phyregaddr); + rxc = R_REG(&pi->regs->phyregdata); + W_REG(&pi->regs->phyregdata, + (0x1 << 15) | rxc); + } + } else { + if (NREV_IS(pi->pubpi.phy_rev, 3) + || NREV_IS(pi->pubpi.phy_rev, 4)) { + W_REG(&pi->regs->phyregaddr, 0xa0); + (void)R_REG(&pi->regs->phyregaddr); + W_REG(&pi->regs->phyregdata, rxc); + } + + wlc_phy_por_inform(ppi); + } +} + +void +wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr, + chanspec_t chanspec) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + wlc_phy_txpower_reg_limit_calc(pi, txpwr, chanspec); + + if (ISLCNPHY(pi)) { + int i, j; + for (i = TXP_FIRST_OFDM_20_CDD, j = 0; + j < WLC_NUM_RATES_MCS_1_STREAM; i++, j++) { + if (txpwr->mcs_20_siso[j]) + pi->txpwr_limit[i] = txpwr->mcs_20_siso[j]; + else + pi->txpwr_limit[i] = txpwr->ofdm[j]; + } + } + + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + wlc_phy_txpower_recalc_target(pi); + wlc_phy_cal_txpower_recalc_sw(pi); + wlapi_enable_mac(pi->sh->physhim); +} + +void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->ofdm_rateset_war = war; +} + +void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->bf_preempt_4306 = bf_preempt; +} + +void wlc_phy_txpower_update_shm(phy_info_t *pi) +{ + int j; + if (ISNPHY(pi)) { + return; + } + + if (!pi->sh->clk) + return; + + if (pi->hwpwrctrl) { + u16 offset; + + wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_MAX, 63); + wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_N, + 1 << NUM_TSSI_FRAMES); + + wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_TARGET, + pi->tx_power_min << NUM_TSSI_FRAMES); + + wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_CUR, + pi->hwpwr_txcur); + + for (j = TXP_FIRST_OFDM; j <= TXP_LAST_OFDM; j++) { + const u8 ucode_ofdm_rates[] = { + 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c + }; + offset = wlapi_bmac_rate_shm_offset(pi->sh->physhim, + ucode_ofdm_rates[j - + TXP_FIRST_OFDM]); + wlapi_bmac_write_shm(pi->sh->physhim, offset + 6, + pi->tx_power_offset[j]); + wlapi_bmac_write_shm(pi->sh->physhim, offset + 14, + -(pi->tx_power_offset[j] / 2)); + } + + wlapi_bmac_mhf(pi->sh->physhim, MHF2, MHF2_HWPWRCTL, + MHF2_HWPWRCTL, WLC_BAND_ALL); + } else { + int i; + + for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) + pi->tx_power_offset[i] = + (u8) roundup(pi->tx_power_offset[i], 8); + wlapi_bmac_write_shm(pi->sh->physhim, M_OFDM_OFFSET, + (u16) ((pi-> + tx_power_offset[TXP_FIRST_OFDM] + + 7) >> 3)); + } +} + +bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + if (ISNPHY(pi)) { + return pi->nphy_txpwrctrl; + } else { + return pi->hwpwrctrl; + } +} + +void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl) +{ + phy_info_t *pi = (phy_info_t *) ppi; + bool cur_hwpwrctrl = pi->hwpwrctrl; + bool suspend; + + if (!pi->hwpwrctrl_capable) { + return; + } + + pi->hwpwrctrl = hwpwrctrl; + pi->nphy_txpwrctrl = hwpwrctrl; + pi->txpwrctrl = hwpwrctrl; + + if (ISNPHY(pi)) { + suspend = + (0 == + (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); + if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { + wlc_phy_txpwr_fixpower_nphy(pi); + } else { + + mod_phy_reg(pi, 0x1e7, (0x7f << 0), + pi->saved_txpwr_idx); + } + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + } else if (hwpwrctrl != cur_hwpwrctrl) { + + return; + } +} + +void wlc_phy_txpower_ipa_upd(phy_info_t *pi) +{ + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + pi->ipa2g_on = (pi->srom_fem2g.extpagain == 2); + pi->ipa5g_on = (pi->srom_fem5g.extpagain == 2); + } else { + pi->ipa2g_on = false; + pi->ipa5g_on = false; + } +} + +static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi); + +static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) +{ + s16 tx0_status, tx1_status; + u16 estPower1, estPower2; + u8 pwr0, pwr1, adj_pwr0, adj_pwr1; + u32 est_pwr; + + estPower1 = read_phy_reg(pi, 0x118); + estPower2 = read_phy_reg(pi, 0x119); + + if ((estPower1 & (0x1 << 8)) + == (0x1 << 8)) { + pwr0 = (u8) (estPower1 & (0xff << 0)) + >> 0; + } else { + pwr0 = 0x80; + } + + if ((estPower2 & (0x1 << 8)) + == (0x1 << 8)) { + pwr1 = (u8) (estPower2 & (0xff << 0)) + >> 0; + } else { + pwr1 = 0x80; + } + + tx0_status = read_phy_reg(pi, 0x1ed); + tx1_status = read_phy_reg(pi, 0x1ee); + + if ((tx0_status & (0x1 << 15)) + == (0x1 << 15)) { + adj_pwr0 = (u8) (tx0_status & (0xff << 0)) + >> 0; + } else { + adj_pwr0 = 0x80; + } + if ((tx1_status & (0x1 << 15)) + == (0x1 << 15)) { + adj_pwr1 = (u8) (tx1_status & (0xff << 0)) + >> 0; + } else { + adj_pwr1 = 0x80; + } + + est_pwr = + (u32) ((pwr0 << 24) | (pwr1 << 16) | (adj_pwr0 << 8) | adj_pwr1); + return est_pwr; +} + +void +wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) +{ + phy_info_t *pi = (phy_info_t *) ppi; + uint rate, num_rates; + u8 min_pwr, max_pwr; + +#if WL_TX_POWER_RATES != TXP_NUM_RATES +#error "tx_power_t struct out of sync with this fn" +#endif + + if (ISNPHY(pi)) { + power->rf_cores = 2; + power->flags |= (WL_TX_POWER_F_MIMO); + if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) + power->flags |= + (WL_TX_POWER_F_ENABLED | WL_TX_POWER_F_HW); + } else if (ISLCNPHY(pi)) { + power->rf_cores = 1; + power->flags |= (WL_TX_POWER_F_SISO); + if (pi->radiopwr_override == RADIOPWR_OVERRIDE_DEF) + power->flags |= WL_TX_POWER_F_ENABLED; + if (pi->hwpwrctrl) + power->flags |= WL_TX_POWER_F_HW; + } + + num_rates = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : + ((ISLCNPHY(pi)) ? + (TXP_LAST_OFDM_20_CDD + 1) : (TXP_LAST_OFDM + 1))); + + for (rate = 0; rate < num_rates; rate++) { + power->user_limit[rate] = pi->tx_user_target[rate]; + wlc_phy_txpower_sromlimit(ppi, channel, &min_pwr, &max_pwr, + rate); + power->board_limit[rate] = (u8) max_pwr; + power->target[rate] = pi->tx_power_target[rate]; + } + + if (ISNPHY(pi)) { + u32 est_pout; + + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_phyreg_enter((wlc_phy_t *) pi); + est_pout = wlc_phy_txpower_est_power_nphy(pi); + wlc_phyreg_exit((wlc_phy_t *) pi); + wlapi_enable_mac(pi->sh->physhim); + + power->est_Pout[0] = (est_pout >> 8) & 0xff; + power->est_Pout[1] = est_pout & 0xff; + + power->est_Pout_act[0] = est_pout >> 24; + power->est_Pout_act[1] = (est_pout >> 16) & 0xff; + + if (power->est_Pout[0] == 0x80) + power->est_Pout[0] = 0; + if (power->est_Pout[1] == 0x80) + power->est_Pout[1] = 0; + + if (power->est_Pout_act[0] == 0x80) + power->est_Pout_act[0] = 0; + if (power->est_Pout_act[1] == 0x80) + power->est_Pout_act[1] = 0; + + power->est_Pout_cck = 0; + + power->tx_power_max[0] = pi->tx_power_max; + power->tx_power_max[1] = pi->tx_power_max; + + power->tx_power_max_rate_ind[0] = pi->tx_power_max_rate_ind; + power->tx_power_max_rate_ind[1] = pi->tx_power_max_rate_ind; + } else if (!pi->hwpwrctrl) { + } else if (pi->sh->up) { + + wlc_phyreg_enter(ppi); + if (ISLCNPHY(pi)) { + + power->tx_power_max[0] = pi->tx_power_max; + power->tx_power_max[1] = pi->tx_power_max; + + power->tx_power_max_rate_ind[0] = + pi->tx_power_max_rate_ind; + power->tx_power_max_rate_ind[1] = + pi->tx_power_max_rate_ind; + + if (wlc_phy_tpc_isenabled_lcnphy(pi)) + power->flags |= + (WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED); + else + power->flags &= + ~(WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED); + + wlc_lcnphy_get_tssi(pi, (s8 *) &power->est_Pout[0], + (s8 *) &power->est_Pout_cck); + } + wlc_phyreg_exit(ppi); + } +} + +void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + pi->antsel_type = antsel_type; +} + +bool wlc_phy_test_ison(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + return pi->phytest_on; +} + +void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) +{ + phy_info_t *pi = (phy_info_t *) ppi; + bool suspend; + + pi->sh->rx_antdiv = val; + + if (!(ISNPHY(pi) && D11REV_IS(pi->sh->corerev, 16))) { + if (val > ANT_RX_DIV_FORCE_1) + wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, + MHF1_ANTDIV, WLC_BAND_ALL); + else + wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, 0, + WLC_BAND_ALL); + } + + if (ISNPHY(pi)) { + + return; + } + + if (!pi->sh->clk) + return; + + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + if (ISLCNPHY(pi)) { + if (val > ANT_RX_DIV_FORCE_1) { + mod_phy_reg(pi, 0x410, (0x1 << 1), 0x01 << 1); + mod_phy_reg(pi, 0x410, + (0x1 << 0), + ((ANT_RX_DIV_START_1 == val) ? 1 : 0) << 0); + } else { + mod_phy_reg(pi, 0x410, (0x1 << 1), 0x00 << 1); + mod_phy_reg(pi, 0x410, (0x1 << 0), (u16) val << 0); + } + } + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + + return; +} + +static bool +wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant) +{ + s8 cmplx_pwr_dbm[PHY_CORE_MAX]; + u8 i; + + memset((u8 *) cmplx_pwr_dbm, 0, sizeof(cmplx_pwr_dbm)); + wlc_phy_compute_dB(cmplx_pwr, cmplx_pwr_dbm, pi->pubpi.phy_corenum); + + for (i = 0; i < pi->pubpi.phy_corenum; i++) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) + cmplx_pwr_dbm[i] += (s8) PHY_NOISE_OFFSETFACT_4322; + else + + cmplx_pwr_dbm[i] += (s8) (16 - (15) * 3 - 70); + } + + for (i = 0; i < pi->pubpi.phy_corenum; i++) { + pi->nphy_noise_win[i][pi->nphy_noise_index] = cmplx_pwr_dbm[i]; + pwr_ant[i] = cmplx_pwr_dbm[i]; + } + pi->nphy_noise_index = + MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ); + return true; +} + +static void +wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) +{ + phy_info_t *pi = (phy_info_t *) pih; + s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; + bool sampling_in_progress = (pi->phynoise_state != 0); + bool wait_for_intr = true; + + if (NORADIO_ENAB(pi->pubpi)) { + return; + } + + switch (reason) { + case PHY_NOISE_SAMPLE_MON: + + pi->phynoise_chan_watchdog = ch; + pi->phynoise_state |= PHY_NOISE_STATE_MON; + + break; + + case PHY_NOISE_SAMPLE_EXTERNAL: + + pi->phynoise_state |= PHY_NOISE_STATE_EXTERNAL; + break; + + default: + break; + } + + if (sampling_in_progress) + return; + + pi->phynoise_now = pi->sh->now; + + if (pi->phy_fixed_noise) { + if (ISNPHY(pi)) { + pi->nphy_noise_win[WL_ANT_IDX_1][pi->nphy_noise_index] = + PHY_NOISE_FIXED_VAL_NPHY; + pi->nphy_noise_win[WL_ANT_IDX_2][pi->nphy_noise_index] = + PHY_NOISE_FIXED_VAL_NPHY; + pi->nphy_noise_index = MODINC_POW2(pi->nphy_noise_index, + PHY_NOISE_WINDOW_SZ); + + noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; + } else { + + noise_dbm = PHY_NOISE_FIXED_VAL; + } + + wait_for_intr = false; + goto done; + } + + if (ISLCNPHY(pi)) { + if (!pi->phynoise_polling + || (reason == PHY_NOISE_SAMPLE_EXTERNAL)) { + wlapi_bmac_write_shm(pi->sh->physhim, M_JSSI_0, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP0, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP1, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP2, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP3, 0); + + OR_REG(&pi->regs->maccommand, + MCMD_BG_NOISE); + } else { + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_deaf_mode(pi, (bool) 0); + noise_dbm = (s8) wlc_lcnphy_rx_signal_power(pi, 20); + wlc_lcnphy_deaf_mode(pi, (bool) 1); + wlapi_enable_mac(pi->sh->physhim); + wait_for_intr = false; + } + } else if (ISNPHY(pi)) { + if (!pi->phynoise_polling + || (reason == PHY_NOISE_SAMPLE_EXTERNAL)) { + + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP0, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP1, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP2, 0); + wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP3, 0); + + OR_REG(&pi->regs->maccommand, + MCMD_BG_NOISE); + } else { + phy_iq_est_t est[PHY_CORE_MAX]; + u32 cmplx_pwr[PHY_CORE_MAX]; + s8 noise_dbm_ant[PHY_CORE_MAX]; + u16 log_num_samps, num_samps, classif_state = 0; + u8 wait_time = 32; + u8 wait_crs = 0; + u8 i; + + memset((u8 *) est, 0, sizeof(est)); + memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr)); + memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant)); + + log_num_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; + num_samps = 1 << log_num_samps; + + wlapi_suspend_mac_and_wait(pi->sh->physhim); + classif_state = wlc_phy_classifier_nphy(pi, 0, 0); + wlc_phy_classifier_nphy(pi, 3, 0); + wlc_phy_rx_iq_est_nphy(pi, est, num_samps, wait_time, + wait_crs); + wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); + wlapi_enable_mac(pi->sh->physhim); + + for (i = 0; i < pi->pubpi.phy_corenum; i++) + cmplx_pwr[i] = + (est[i].i_pwr + + est[i].q_pwr) >> log_num_samps; + + wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant); + + for (i = 0; i < pi->pubpi.phy_corenum; i++) { + pi->nphy_noise_win[i][pi->nphy_noise_index] = + noise_dbm_ant[i]; + + if (noise_dbm_ant[i] > noise_dbm) + noise_dbm = noise_dbm_ant[i]; + } + pi->nphy_noise_index = MODINC_POW2(pi->nphy_noise_index, + PHY_NOISE_WINDOW_SZ); + + wait_for_intr = false; + } + } + + done: + + if (!wait_for_intr) + wlc_phy_noise_cb(pi, ch, noise_dbm); + +} + +void wlc_phy_noise_sample_request_external(wlc_phy_t *pih) +{ + u8 channel; + + channel = CHSPEC_CHANNEL(wlc_phy_chanspec_get(pih)); + + wlc_phy_noise_sample_request(pih, PHY_NOISE_SAMPLE_EXTERNAL, channel); +} + +static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm) +{ + if (!pi->phynoise_state) + return; + + if (pi->phynoise_state & PHY_NOISE_STATE_MON) { + if (pi->phynoise_chan_watchdog == channel) { + pi->sh->phy_noise_window[pi->sh->phy_noise_index] = + noise_dbm; + pi->sh->phy_noise_index = + MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ); + } + pi->phynoise_state &= ~PHY_NOISE_STATE_MON; + } + + if (pi->phynoise_state & PHY_NOISE_STATE_EXTERNAL) { + pi->phynoise_state &= ~PHY_NOISE_STATE_EXTERNAL; + } + +} + +static s8 wlc_phy_noise_read_shmem(phy_info_t *pi) +{ + u32 cmplx_pwr[PHY_CORE_MAX]; + s8 noise_dbm_ant[PHY_CORE_MAX]; + u16 lo, hi; + u32 cmplx_pwr_tot = 0; + s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; + u8 idx, core; + + memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr)); + memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant)); + + for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2, core++) { + lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx)); + hi = wlapi_bmac_read_shm(pi->sh->physhim, + M_PWRIND_MAP(idx + 1)); + cmplx_pwr[core] = (hi << 16) + lo; + cmplx_pwr_tot += cmplx_pwr[core]; + if (cmplx_pwr[core] == 0) { + noise_dbm_ant[core] = PHY_NOISE_FIXED_VAL_NPHY; + } else + cmplx_pwr[core] >>= PHY_NOISE_SAMPLE_LOG_NUM_UCODE; + } + + if (cmplx_pwr_tot != 0) + wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant); + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + pi->nphy_noise_win[core][pi->nphy_noise_index] = + noise_dbm_ant[core]; + + if (noise_dbm_ant[core] > noise_dbm) + noise_dbm = noise_dbm_ant[core]; + } + pi->nphy_noise_index = + MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ); + + return noise_dbm; + +} + +void wlc_phy_noise_sample_intr(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + u16 jssi_aux; + u8 channel = 0; + s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; + + if (ISLCNPHY(pi)) { + u32 cmplx_pwr, cmplx_pwr0, cmplx_pwr1; + u16 lo, hi; + s32 pwr_offset_dB, gain_dB; + u16 status_0, status_1; + + jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX); + channel = jssi_aux & D11_CURCHANNEL_MAX; + + lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP0); + hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP1); + cmplx_pwr0 = (hi << 16) + lo; + + lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP2); + hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP3); + cmplx_pwr1 = (hi << 16) + lo; + cmplx_pwr = (cmplx_pwr0 + cmplx_pwr1) >> 6; + + status_0 = 0x44; + status_1 = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_0); + if ((cmplx_pwr > 0 && cmplx_pwr < 500) + && ((status_1 & 0xc000) == 0x4000)) { + + wlc_phy_compute_dB(&cmplx_pwr, &noise_dbm, + pi->pubpi.phy_corenum); + pwr_offset_dB = (read_phy_reg(pi, 0x434) & 0xFF); + if (pwr_offset_dB > 127) + pwr_offset_dB -= 256; + + noise_dbm += (s8) (pwr_offset_dB - 30); + + gain_dB = (status_0 & 0x1ff); + noise_dbm -= (s8) (gain_dB); + } else { + noise_dbm = PHY_NOISE_FIXED_VAL_LCNPHY; + } + } else if (ISNPHY(pi)) { + + jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX); + channel = jssi_aux & D11_CURCHANNEL_MAX; + + noise_dbm = wlc_phy_noise_read_shmem(pi); + } + + wlc_phy_noise_cb(pi, channel, noise_dbm); + +} + +s8 lcnphy_gain_index_offset_for_pkt_rssi[] = { + 8, + 8, + 8, + 8, + 8, + 8, + 8, + 9, + 10, + 8, + 8, + 7, + 7, + 1, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 1, + 1, + 0, + 0, + 0, + 0 +}; + +void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_cmplx_pwr_dB, u8 core) +{ + u8 msb, secondmsb, i; + u32 tmp; + + for (i = 0; i < core; i++) { + secondmsb = 0; + tmp = cmplx_pwr[i]; + msb = fls(tmp); + if (msb) + secondmsb = (u8) ((tmp >> (--msb - 1)) & 1); + p_cmplx_pwr_dB[i] = (s8) (3 * msb + 2 * secondmsb); + } +} + +void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx) +{ + wlc_d11rxhdr_t *wlc_rxhdr = (wlc_d11rxhdr_t *) ctx; + d11rxhdr_t *rxh = &wlc_rxhdr->rxhdr; + int rssi = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_JSSI_MASK; + uint radioid = pih->radioid; + phy_info_t *pi = (phy_info_t *) pih; + + if (NORADIO_ENAB(pi->pubpi)) { + rssi = WLC_RSSI_INVALID; + goto end; + } + + if ((pi->sh->corerev >= 11) + && !(le16_to_cpu(rxh->RxStatus2) & RXS_PHYRXST_VALID)) { + rssi = WLC_RSSI_INVALID; + goto end; + } + + if (ISLCNPHY(pi)) { + u8 gidx = (le16_to_cpu(rxh->PhyRxStatus_2) & 0xFC00) >> 10; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (rssi > 127) + rssi -= 256; + + rssi = rssi + lcnphy_gain_index_offset_for_pkt_rssi[gidx]; + if ((rssi > -46) && (gidx > 18)) + rssi = rssi + 7; + + rssi = rssi + pi_lcn->lcnphy_pkteng_rssi_slope; + + rssi = rssi + 2; + + } + + if (ISLCNPHY(pi)) { + + if (rssi > 127) + rssi -= 256; + } else if (radioid == BCM2055_ID || radioid == BCM2056_ID + || radioid == BCM2057_ID) { + rssi = wlc_phy_rssi_compute_nphy(pi, wlc_rxhdr); + } + + end: + wlc_rxhdr->rssi = (s8) rssi; +} + +void wlc_phy_freqtrack_start(wlc_phy_t *pih) +{ + return; +} + +void wlc_phy_freqtrack_end(wlc_phy_t *pih) +{ + return; +} + +void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag) +{ + phy_info_t *pi; + pi = (phy_info_t *) ppi; + + if (ISLCNPHY(pi)) + wlc_lcnphy_deaf_mode(pi, true); + else if (ISNPHY(pi)) + wlc_nphy_deaf_mode(pi, true); +} + +void wlc_phy_watchdog(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + bool delay_phy_cal = false; + pi->sh->now++; + + if (!pi->watchdog_override) + return; + + if (!(SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi))) { + wlc_phy_noise_sample_request((wlc_phy_t *) pi, + PHY_NOISE_SAMPLE_MON, + CHSPEC_CHANNEL(pi-> + radio_chanspec)); + } + + if (pi->phynoise_state && (pi->sh->now - pi->phynoise_now) > 5) { + pi->phynoise_state = 0; + } + + if ((!pi->phycal_txpower) || + ((pi->sh->now - pi->phycal_txpower) >= pi->sh->fast_timer)) { + + if (!SCAN_INPROG_PHY(pi) && wlc_phy_cal_txpower_recalc_sw(pi)) { + pi->phycal_txpower = pi->sh->now; + } + } + + if (NORADIO_ENAB(pi->pubpi)) + return; + + if ((SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) + || ASSOC_INPROG_PHY(pi))) + return; + + if (ISNPHY(pi) && !pi->disable_percal && !delay_phy_cal) { + + if ((pi->nphy_perical != PHY_PERICAL_DISABLE) && + (pi->nphy_perical != PHY_PERICAL_MANUAL) && + ((pi->sh->now - pi->nphy_perical_last) >= + pi->sh->glacial_timer)) + wlc_phy_cal_perical((wlc_phy_t *) pi, + PHY_PERICAL_WATCHDOG); + + wlc_phy_txpwr_papd_cal_nphy(pi); + } + + if (ISLCNPHY(pi)) { + if (pi->phy_forcecal || + ((pi->sh->now - pi->phy_lastcal) >= + pi->sh->glacial_timer)) { + if (!(SCAN_RM_IN_PROGRESS(pi) || ASSOC_INPROG_PHY(pi))) + wlc_lcnphy_calib_modes(pi, + LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL); + if (! + (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) + || ASSOC_INPROG_PHY(pi) + || pi->carrier_suppr_disable + || pi->disable_percal)) + wlc_lcnphy_calib_modes(pi, + PHY_PERICAL_WATCHDOG); + } + } +} + +void wlc_phy_BSSinit(wlc_phy_t *pih, bool bonlyap, int rssi) +{ + phy_info_t *pi = (phy_info_t *) pih; + uint i; + uint k; + + for (i = 0; i < MA_WINDOW_SZ; i++) { + pi->sh->phy_noise_window[i] = (s8) (rssi & 0xff); + } + if (ISLCNPHY(pi)) { + for (i = 0; i < MA_WINDOW_SZ; i++) + pi->sh->phy_noise_window[i] = + PHY_NOISE_FIXED_VAL_LCNPHY; + } + pi->sh->phy_noise_index = 0; + + for (i = 0; i < PHY_NOISE_WINDOW_SZ; i++) { + for (k = WL_ANT_IDX_1; k < WL_ANT_RX_MAX; k++) + pi->nphy_noise_win[k][i] = PHY_NOISE_FIXED_VAL_NPHY; + } + pi->nphy_noise_index = 0; +} + +void +wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real, s32 *eps_imag) +{ + *eps_imag = (epsilon >> 13); + if (*eps_imag > 0xfff) + *eps_imag -= 0x2000; + + *eps_real = (epsilon & 0x1fff); + if (*eps_real > 0xfff) + *eps_real -= 0x2000; +} + +static const fixed AtanTbl[] = { + 2949120, + 1740967, + 919879, + 466945, + 234379, + 117304, + 58666, + 29335, + 14668, + 7334, + 3667, + 1833, + 917, + 458, + 229, + 115, + 57, + 29 +}; + +void wlc_phy_cordic(fixed theta, cs32 *val) +{ + fixed angle, valtmp; + unsigned iter; + int signx = 1; + int signtheta; + + val[0].i = CORDIC_AG; + val[0].q = 0; + angle = 0; + + signtheta = (theta < 0) ? -1 : 1; + theta = + ((theta + FIXED(180) * signtheta) % FIXED(360)) - + FIXED(180) * signtheta; + + if (FLOAT(theta) > 90) { + theta -= FIXED(180); + signx = -1; + } else if (FLOAT(theta) < -90) { + theta += FIXED(180); + signx = -1; + } + + for (iter = 0; iter < CORDIC_NI; iter++) { + if (theta > angle) { + valtmp = val[0].i - (val[0].q >> iter); + val[0].q = (val[0].i >> iter) + val[0].q; + val[0].i = valtmp; + angle += AtanTbl[iter]; + } else { + valtmp = val[0].i + (val[0].q >> iter); + val[0].q = -(val[0].i >> iter) + val[0].q; + val[0].i = valtmp; + angle -= AtanTbl[iter]; + } + } + + val[0].i = val[0].i * signx; + val[0].q = val[0].q * signx; +} + +void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi) +{ + wlapi_del_timer(pi->sh->physhim, pi->phycal_timer); + + pi->cal_type_override = PHY_PERICAL_AUTO; + pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; + pi->mphase_txcal_cmdidx = 0; +} + +static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay) +{ + + if ((pi->nphy_perical != PHY_PERICAL_MPHASE) && + (pi->nphy_perical != PHY_PERICAL_MANUAL)) + return; + + wlapi_del_timer(pi->sh->physhim, pi->phycal_timer); + + pi->mphase_cal_phase_id = MPHASE_CAL_STATE_INIT; + wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); +} + +void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) +{ + s16 nphy_currtemp = 0; + s16 delta_temp = 0; + bool do_periodic_cal = true; + phy_info_t *pi = (phy_info_t *) pih; + + if (!ISNPHY(pi)) + return; + + if ((pi->nphy_perical == PHY_PERICAL_DISABLE) || + (pi->nphy_perical == PHY_PERICAL_MANUAL)) + return; + + switch (reason) { + case PHY_PERICAL_DRIVERUP: + break; + + case PHY_PERICAL_PHYINIT: + if (pi->nphy_perical == PHY_PERICAL_MPHASE) { + if (PHY_PERICAL_MPHASE_PENDING(pi)) { + wlc_phy_cal_perical_mphase_reset(pi); + } + wlc_phy_cal_perical_mphase_schedule(pi, + PHY_PERICAL_INIT_DELAY); + } + break; + + case PHY_PERICAL_JOIN_BSS: + case PHY_PERICAL_START_IBSS: + case PHY_PERICAL_UP_BSS: + if ((pi->nphy_perical == PHY_PERICAL_MPHASE) && + PHY_PERICAL_MPHASE_PENDING(pi)) { + wlc_phy_cal_perical_mphase_reset(pi); + } + + pi->first_cal_after_assoc = true; + + pi->cal_type_override = PHY_PERICAL_FULL; + + if (pi->phycal_tempdelta) { + pi->nphy_lastcal_temp = wlc_phy_tempsense_nphy(pi); + } + wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_FULL); + break; + + case PHY_PERICAL_WATCHDOG: + if (pi->phycal_tempdelta) { + nphy_currtemp = wlc_phy_tempsense_nphy(pi); + delta_temp = + (nphy_currtemp > pi->nphy_lastcal_temp) ? + nphy_currtemp - pi->nphy_lastcal_temp : + pi->nphy_lastcal_temp - nphy_currtemp; + + if ((delta_temp < (s16) pi->phycal_tempdelta) && + (pi->nphy_txiqlocal_chanspec == + pi->radio_chanspec)) { + do_periodic_cal = false; + } else { + pi->nphy_lastcal_temp = nphy_currtemp; + } + } + + if (do_periodic_cal) { + + if (pi->nphy_perical == PHY_PERICAL_MPHASE) { + + if (!PHY_PERICAL_MPHASE_PENDING(pi)) + wlc_phy_cal_perical_mphase_schedule(pi, + PHY_PERICAL_WDOG_DELAY); + } else if (pi->nphy_perical == PHY_PERICAL_SPHASE) + wlc_phy_cal_perical_nphy_run(pi, + PHY_PERICAL_AUTO); + } + break; + default: + break; + } +} + +void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi) +{ + pi->mphase_cal_phase_id = MPHASE_CAL_STATE_INIT; + pi->mphase_txcal_cmdidx = 0; +} + +u8 wlc_phy_nbits(s32 value) +{ + s32 abs_val; + u8 nbits = 0; + + abs_val = ABS(value); + while ((abs_val >> nbits) > 0) + nbits++; + + return nbits; +} + +void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, u8 rxchain) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->sh->hw_phytxchain = txchain; + pi->sh->hw_phyrxchain = rxchain; + pi->sh->phytxchain = txchain; + pi->sh->phyrxchain = rxchain; + pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); +} + +void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, u8 rxchain) +{ + phy_info_t *pi = (phy_info_t *) pih; + + pi->sh->phytxchain = txchain; + + if (ISNPHY(pi)) { + wlc_phy_rxcore_setstate_nphy(pih, rxchain); + } + pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); +} + +void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, u8 *rxchain) +{ + phy_info_t *pi = (phy_info_t *) pih; + + *txchain = pi->sh->phytxchain; + *rxchain = pi->sh->phyrxchain; +} + +u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) +{ + s16 nphy_currtemp; + u8 active_bitmap; + phy_info_t *pi = (phy_info_t *) pih; + + active_bitmap = (pi->phy_txcore_heatedup) ? 0x31 : 0x33; + + if (!pi->watchdog_override) + return active_bitmap; + + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + wlapi_suspend_mac_and_wait(pi->sh->physhim); + nphy_currtemp = wlc_phy_tempsense_nphy(pi); + wlapi_enable_mac(pi->sh->physhim); + + if (!pi->phy_txcore_heatedup) { + if (nphy_currtemp >= pi->phy_txcore_disable_temp) { + active_bitmap &= 0xFD; + pi->phy_txcore_heatedup = true; + } + } else { + if (nphy_currtemp <= pi->phy_txcore_enable_temp) { + active_bitmap |= 0x2; + pi->phy_txcore_heatedup = false; + } + } + } + + return active_bitmap; +} + +s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec) +{ + phy_info_t *pi = (phy_info_t *) pih; + u8 siso_mcs_id, cdd_mcs_id; + + siso_mcs_id = + (CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_SISO : + TXP_FIRST_MCS_20_SISO; + cdd_mcs_id = + (CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_CDD : + TXP_FIRST_MCS_20_CDD; + + if (pi->tx_power_target[siso_mcs_id] > + (pi->tx_power_target[cdd_mcs_id] + 12)) + return PHY_TXC1_MODE_SISO; + else + return PHY_TXC1_MODE_CDD; +} + +const u8 *wlc_phy_get_ofdm_rate_lookup(void) +{ + return ofdm_rate_lookup; +} + +void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode) +{ + if ((pi->sh->chip == BCM4313_CHIP_ID) && + (pi->sh->boardflags & BFL_FEM)) { + if (mode) { + u16 txant = 0; + txant = wlapi_bmac_get_txant(pi->sh->physhim); + if (txant == 1) { + mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x44c, (0x1 << 2), (1) << 2); + + } + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpiocontrol), ~0x0, + 0x0); + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpioout), 0x40, 0x40); + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpioouten), 0x40, + 0x40); + } else { + mod_phy_reg(pi, 0x44c, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, 0x44d, (0x1 << 2), (0) << 2); + + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpioout), 0x40, 0x00); + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpioouten), 0x40, 0x0); + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, gpiocontrol), ~0x0, + 0x40); + } + } +} + +static s8 +wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, u32 band, + u8 rate) +{ + s8 offset = 0; + + if (!pi->user_txpwr_at_rfport) + return offset; + return offset; +} + +static s8 wlc_phy_env_measure_vbat(phy_info_t *pi) +{ + if (ISLCNPHY(pi)) + return wlc_lcnphy_vbatsense(pi, 0); + else + return 0; +} + +static s8 wlc_phy_env_measure_temperature(phy_info_t *pi) +{ + if (ISLCNPHY(pi)) + return wlc_lcnphy_tempsense_degree(pi, 0); + else + return 0; +} + +static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band) +{ + u8 i; + s8 temp, vbat; + + for (i = 0; i < TXP_NUM_RATES; i++) + pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; + + vbat = wlc_phy_env_measure_vbat(pi); + temp = wlc_phy_env_measure_temperature(pi); + +} + +void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool ldpc) +{ + return; +} + +void +wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, s8 *ofdmoffset) +{ + *cckoffset = 0; + *ofdmoffset = 0; +} + +s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, chanspec_t chanspec) +{ + + return rssi; +} + +bool wlc_phy_txpower_ipa_ison(wlc_phy_t *ppi) +{ + phy_info_t *pi = (phy_info_t *) ppi; + + if (ISNPHY(pi)) + return wlc_phy_n_txpower_ipa_ison(pi); + else + return 0; +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h new file mode 100644 index 0000000..8bd0d13 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h @@ -0,0 +1,293 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * phy_hal.h: functionality exported from the phy to higher layers + */ + +#ifndef _BRCM_PHY_HAL_H_ +#define _BRCM_PHY_HAL_H_ + +#include +#include +#include +#include /* struct wiphy */ +#include "brcmu_wifi.h" /* chanspec_t */ + +#define IDCODE_VER_MASK 0x0000000f +#define IDCODE_VER_SHIFT 0 +#define IDCODE_MFG_MASK 0x00000fff +#define IDCODE_MFG_SHIFT 0 +#define IDCODE_ID_MASK 0x0ffff000 +#define IDCODE_ID_SHIFT 12 +#define IDCODE_REV_MASK 0xf0000000 +#define IDCODE_REV_SHIFT 28 + +#define NORADIO_ID 0xe4f5 +#define NORADIO_IDCODE 0x4e4f5246 + +#define BCM2055_ID 0x2055 +#define BCM2055_IDCODE 0x02055000 +#define BCM2055A0_IDCODE 0x1205517f + +#define BCM2056_ID 0x2056 +#define BCM2056_IDCODE 0x02056000 +#define BCM2056A0_IDCODE 0x1205617f + +#define BCM2057_ID 0x2057 +#define BCM2057_IDCODE 0x02057000 +#define BCM2057A0_IDCODE 0x1205717f + +#define BCM2064_ID 0x2064 +#define BCM2064_IDCODE 0x02064000 +#define BCM2064A0_IDCODE 0x0206417f + +#define PHY_TPC_HW_OFF false +#define PHY_TPC_HW_ON true + +#define PHY_PERICAL_DRIVERUP 1 +#define PHY_PERICAL_WATCHDOG 2 +#define PHY_PERICAL_PHYINIT 3 +#define PHY_PERICAL_JOIN_BSS 4 +#define PHY_PERICAL_START_IBSS 5 +#define PHY_PERICAL_UP_BSS 6 +#define PHY_PERICAL_CHAN 7 +#define PHY_FULLCAL 8 + +#define PHY_PERICAL_DISABLE 0 +#define PHY_PERICAL_SPHASE 1 +#define PHY_PERICAL_MPHASE 2 +#define PHY_PERICAL_MANUAL 3 + +#define PHY_HOLD_FOR_ASSOC 1 +#define PHY_HOLD_FOR_SCAN 2 +#define PHY_HOLD_FOR_RM 4 +#define PHY_HOLD_FOR_PLT 8 +#define PHY_HOLD_FOR_MUTE 16 +#define PHY_HOLD_FOR_NOT_ASSOC 0x20 + +#define PHY_MUTE_FOR_PREISM 1 +#define PHY_MUTE_ALL 0xffffffff + +#define PHY_NOISE_FIXED_VAL (-95) +#define PHY_NOISE_FIXED_VAL_NPHY (-92) +#define PHY_NOISE_FIXED_VAL_LCNPHY (-92) + +#define PHY_MODE_CAL 0x0002 +#define PHY_MODE_NOISEM 0x0004 + +#define WLC_TXPWR_DB_FACTOR 4 + +/* a large TX Power as an init value to factor out of min() calculations, + * keep low enough to fit in an s8, units are .25 dBm + */ +#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ + +#define WLC_NUM_RATES_CCK 4 +#define WLC_NUM_RATES_OFDM 8 +#define WLC_NUM_RATES_MCS_1_STREAM 8 +#define WLC_NUM_RATES_MCS_2_STREAM 8 +#define WLC_NUM_RATES_MCS_3_STREAM 8 +#define WLC_NUM_RATES_MCS_4_STREAM 8 + +#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ + +typedef struct txpwr_limits { + u8 cck[WLC_NUM_RATES_CCK]; + u8 ofdm[WLC_NUM_RATES_OFDM]; + + u8 ofdm_cdd[WLC_NUM_RATES_OFDM]; + + u8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; + u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; + + u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; + + u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; + u8 mcs32; +} txpwr_limits_t; + +typedef struct { + u32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + u8 local_max; /* local max according to the AP */ + u8 local_constraint; /* local constraint according to the AP */ + s8 antgain[2]; /* Ant gain for each band - from SROM */ + u8 rf_cores; /* count of RF Cores being reported */ + u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ + u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain + * without adjustment + */ + u8 est_Pout_cck; /* Latest CCK tx power out estimate */ + u8 tx_power_max[4]; /* Maximum target power among all rates */ + u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ + u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ + u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ + u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ + u8 target[WL_TX_POWER_RATES]; /* Latest target power */ +} tx_power_t; + +typedef struct tx_inst_power { + u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ + u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ +} tx_inst_power_t; + +typedef struct { + u8 vec[MAXCHANNEL / NBBY]; +} chanvec_t; + +struct rpc_info; +typedef struct shared_phy shared_phy_t; + +struct phy_pub; + +typedef struct phy_pub wlc_phy_t; + +typedef struct shared_phy_params { + struct si_pub *sih; + void *physhim; + uint unit; + uint corerev; + uint bustype; + uint buscorerev; + char *vars; + u16 vid; + u16 did; + uint chip; + uint chiprev; + uint chippkg; + uint sromrev; + uint boardtype; + uint boardrev; + uint boardvendor; + u32 boardflags; + u32 boardflags2; +} shared_phy_params_t; + + +extern shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp); +extern void wlc_phy_shared_detach(shared_phy_t *phy_sh); +extern wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, + char *vars, struct wiphy *wiphy); +extern void wlc_phy_detach(wlc_phy_t *ppi); + +extern bool wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, + u16 *phyrev, u16 *radioid, + u16 *radiover); +extern bool wlc_phy_get_encore(wlc_phy_t *pih); +extern u32 wlc_phy_get_coreflags(wlc_phy_t *pih); + +extern void wlc_phy_hw_clk_state_upd(wlc_phy_t *ppi, bool newstate); +extern void wlc_phy_hw_state_upd(wlc_phy_t *ppi, bool newstate); +extern void wlc_phy_init(wlc_phy_t *ppi, chanspec_t chanspec); +extern void wlc_phy_watchdog(wlc_phy_t *ppi); +extern int wlc_phy_down(wlc_phy_t *ppi); +extern u32 wlc_phy_clk_bwbits(wlc_phy_t *pih); +extern void wlc_phy_cal_init(wlc_phy_t *ppi); +extern void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init); + +extern void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec); +extern chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi); +extern void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch); +extern u16 wlc_phy_bw_state_get(wlc_phy_t *ppi); +extern void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw); + +extern void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx); +extern void wlc_phy_por_inform(wlc_phy_t *ppi); +extern void wlc_phy_noise_sample_intr(wlc_phy_t *ppi); +extern bool wlc_phy_bist_check_phy(wlc_phy_t *ppi); + +extern void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag); + +extern void wlc_phy_switch_radio(wlc_phy_t *ppi, bool on); +extern void wlc_phy_anacore(wlc_phy_t *ppi, bool on); + + +extern void wlc_phy_BSSinit(wlc_phy_t *ppi, bool bonlyap, int rssi); + +extern void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, + bool wide_filter); +extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, + chanvec_t *channels); +extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band); + +extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan, + u8 *_min_, u8 *_max_, int rate); +extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, + u8 *_max_, u8 *_min_); +extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, s32 *, + s32 *, u32 *); +extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *, + chanspec_t chanspec); +extern int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override); +extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override); +extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *); +extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi); +extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl); +extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); +extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); +extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih); + +extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, + u8 *rxchain); +extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); +extern s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec); +extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val); + +extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason); +extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi); +extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); +extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); + +extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); +extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); +extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); +extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); + +extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type); + +extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, + uint channel); + +extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal); +extern bool wlc_phy_test_ison(wlc_phy_t *ppi); +extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent); +extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war); +extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt); +extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap); + +extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end); + +extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi); +extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi); + +extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); + +extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, + u8 mcs_offset); +extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); +#endif /* _BRCM_PHY_HAL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h new file mode 100644 index 0000000..f3fddfc --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h @@ -0,0 +1,1235 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_PHY_INT_H_ +#define _BRCM_PHY_INT_H_ + +#include +#include +#include + +#include + +#define PHY_VERSION { 1, 82, 8, 0 } + +#define PHYHAL_ERROR 0x0001 +#define PHYHAL_TRACE 0x0002 +#define PHYHAL_INFORM 0x0004 + +extern u32 phyhal_msg_level; + +#define PHY_INFORM_ON() (phyhal_msg_level & PHYHAL_INFORM) +#define PHY_THERMAL_ON() (phyhal_msg_level & PHYHAL_THERMAL) +#define PHY_CAL_ON() (phyhal_msg_level & PHYHAL_CAL) + +#ifdef BOARD_TYPE +#define BOARDTYPE(_type) BOARD_TYPE +#else +#define BOARDTYPE(_type) _type +#endif + +#define LCNXN_BASEREV 16 + +typedef struct { + u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ + u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ + u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ + u8 triso; /* TR switch isolation */ + u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ +} wlc_phy_srom_fem_t; + +struct wlc_hw_info; +typedef struct phy_info phy_info_t; +typedef void (*initfn_t) (phy_info_t *); +typedef void (*chansetfn_t) (phy_info_t *, chanspec_t); +typedef int (*longtrnfn_t) (phy_info_t *, int); +typedef void (*txiqccgetfn_t) (phy_info_t *, u16 *, u16 *); +typedef void (*txiqccsetfn_t) (phy_info_t *, u16, u16); +typedef u16(*txloccgetfn_t) (phy_info_t *); +typedef void (*radioloftgetfn_t) (phy_info_t *, u8 *, u8 *, u8 *, + u8 *); +typedef s32(*rxsigpwrfn_t) (phy_info_t *, s32); +typedef void (*detachfn_t) (phy_info_t *); + +#undef ISNPHY +#undef ISLCNPHY +#define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N) +#define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN) + +#define ISPHY_11N_CAP(pi) (ISNPHY(pi) || ISLCNPHY(pi)) + +#define IS20MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_20) +#define IS40MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_40) + +#define PHY_GET_RFATTN(rfgain) ((rfgain) & 0x0f) +#define PHY_GET_PADMIX(rfgain) (((rfgain) & 0x10) >> 4) +#define PHY_GET_RFGAINID(rfattn, padmix, width) ((rfattn) + ((padmix)*(width))) +#define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \ + ((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x))) +#define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n)) +#define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0))) + +#define CH_5G_GROUP 3 +#define A_LOW_CHANS 0 +#define A_MID_CHANS 1 +#define A_HIGH_CHANS 2 +#define CH_2G_GROUP 1 +#define G_ALL_CHANS 0 + +#define FIRST_REF5_CHANNUM 149 +#define LAST_REF5_CHANNUM 165 +#define FIRST_5G_CHAN 14 +#define LAST_5G_CHAN 50 +#define FIRST_MID_5G_CHAN 14 +#define LAST_MID_5G_CHAN 35 +#define FIRST_HIGH_5G_CHAN 36 +#define LAST_HIGH_5G_CHAN 41 +#define FIRST_LOW_5G_CHAN 42 +#define LAST_LOW_5G_CHAN 50 + +#define BASE_LOW_5G_CHAN 4900 +#define BASE_MID_5G_CHAN 5100 +#define BASE_HIGH_5G_CHAN 5500 + +#define CHAN5G_FREQ(chan) (5000 + chan*5) +#define CHAN2G_FREQ(chan) (2407 + chan*5) + +#define TXP_FIRST_CCK 0 +#define TXP_LAST_CCK 3 +#define TXP_FIRST_OFDM 4 +#define TXP_LAST_OFDM 11 +#define TXP_FIRST_OFDM_20_CDD 12 +#define TXP_LAST_OFDM_20_CDD 19 +#define TXP_FIRST_MCS_20_SISO 20 +#define TXP_LAST_MCS_20_SISO 27 +#define TXP_FIRST_MCS_20_CDD 28 +#define TXP_LAST_MCS_20_CDD 35 +#define TXP_FIRST_MCS_20_STBC 36 +#define TXP_LAST_MCS_20_STBC 43 +#define TXP_FIRST_MCS_20_SDM 44 +#define TXP_LAST_MCS_20_SDM 51 +#define TXP_FIRST_OFDM_40_SISO 52 +#define TXP_LAST_OFDM_40_SISO 59 +#define TXP_FIRST_OFDM_40_CDD 60 +#define TXP_LAST_OFDM_40_CDD 67 +#define TXP_FIRST_MCS_40_SISO 68 +#define TXP_LAST_MCS_40_SISO 75 +#define TXP_FIRST_MCS_40_CDD 76 +#define TXP_LAST_MCS_40_CDD 83 +#define TXP_FIRST_MCS_40_STBC 84 +#define TXP_LAST_MCS_40_STBC 91 +#define TXP_FIRST_MCS_40_SDM 92 +#define TXP_LAST_MCS_40_SDM 99 +#define TXP_MCS_32 100 +#define TXP_NUM_RATES 101 +#define ADJ_PWR_TBL_LEN 84 + +#define TXP_FIRST_SISO_MCS_20 20 +#define TXP_LAST_SISO_MCS_20 27 + +#define PHY_CORE_NUM_1 1 +#define PHY_CORE_NUM_2 2 +#define PHY_CORE_NUM_3 3 +#define PHY_CORE_NUM_4 4 +#define PHY_CORE_MAX PHY_CORE_NUM_4 +#define PHY_CORE_0 0 +#define PHY_CORE_1 1 +#define PHY_CORE_2 2 +#define PHY_CORE_3 3 + +#define MA_WINDOW_SZ 8 + +#define PHY_NOISE_SAMPLE_MON 1 +#define PHY_NOISE_SAMPLE_EXTERNAL 2 +#define PHY_NOISE_WINDOW_SZ 16 +#define PHY_NOISE_GLITCH_INIT_MA 10 +#define PHY_NOISE_GLITCH_INIT_MA_BADPlCP 10 +#define PHY_NOISE_STATE_MON 0x1 +#define PHY_NOISE_STATE_EXTERNAL 0x2 +#define PHY_NOISE_SAMPLE_LOG_NUM_NPHY 10 +#define PHY_NOISE_SAMPLE_LOG_NUM_UCODE 9 + +#define PHY_NOISE_OFFSETFACT_4322 (-103) +#define PHY_NOISE_MA_WINDOW_SZ 2 + +#define PHY_RSSI_TABLE_SIZE 64 +#define RSSI_ANT_MERGE_MAX 0 +#define RSSI_ANT_MERGE_MIN 1 +#define RSSI_ANT_MERGE_AVG 2 + +#define PHY_TSSI_TABLE_SIZE 64 +#define APHY_TSSI_TABLE_SIZE 256 +#define TX_GAIN_TABLE_LENGTH 64 +#define DEFAULT_11A_TXP_IDX 24 +#define NUM_TSSI_FRAMES 4 +#define NULL_TSSI 0x7f +#define NULL_TSSI_W 0x7f7f + +#define PHY_PAPD_EPS_TBL_SIZE_LCNPHY 64 + +#define LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL 9 + +#define PHY_TXPWR_MIN 10 +#define PHY_TXPWR_MIN_NPHY 8 +#define RADIOPWR_OVERRIDE_DEF (-1) + +#define PWRTBL_NUM_COEFF 3 + +#define SPURAVOID_DISABLE 0 +#define SPURAVOID_AUTO 1 +#define SPURAVOID_FORCEON 2 +#define SPURAVOID_FORCEON2 3 + +#define PHY_SW_TIMER_FAST 15 +#define PHY_SW_TIMER_SLOW 60 +#define PHY_SW_TIMER_GLACIAL 120 + +#define PHY_PERICAL_AUTO 0 +#define PHY_PERICAL_FULL 1 +#define PHY_PERICAL_PARTIAL 2 + +#define PHY_PERICAL_NODELAY 0 +#define PHY_PERICAL_INIT_DELAY 5 +#define PHY_PERICAL_ASSOC_DELAY 5 +#define PHY_PERICAL_WDOG_DELAY 5 + +#define MPHASE_TXCAL_NUMCMDS 2 +#define PHY_PERICAL_MPHASE_PENDING(pi) (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE) + +enum { + MPHASE_CAL_STATE_IDLE = 0, + MPHASE_CAL_STATE_INIT = 1, + MPHASE_CAL_STATE_TXPHASE0, + MPHASE_CAL_STATE_TXPHASE1, + MPHASE_CAL_STATE_TXPHASE2, + MPHASE_CAL_STATE_TXPHASE3, + MPHASE_CAL_STATE_TXPHASE4, + MPHASE_CAL_STATE_TXPHASE5, + MPHASE_CAL_STATE_PAPDCAL, + MPHASE_CAL_STATE_RXCAL, + MPHASE_CAL_STATE_RSSICAL, + MPHASE_CAL_STATE_IDLETSSI +}; + +typedef enum { + CAL_FULL, + CAL_RECAL, + CAL_CURRECAL, + CAL_DIGCAL, + CAL_GCTRL, + CAL_SOFT, + CAL_DIGLO +} phy_cal_mode_t; + +#define RDR_NTIERS 1 +#define RDR_TIER_SIZE 64 +#define RDR_LIST_SIZE (512/3) +#define RDR_EPOCH_SIZE 40 +#define RDR_NANTENNAS 2 +#define RDR_NTIER_SIZE RDR_LIST_SIZE +#define RDR_LP_BUFFER_SIZE 64 +#define LP_LEN_HIS_SIZE 10 + +#define STATIC_NUM_RF 32 +#define STATIC_NUM_BB 9 + +#define BB_MULT_MASK 0x0000ffff +#define BB_MULT_VALID_MASK 0x80000000 + +#define CORDIC_AG 39797 +#define CORDIC_NI 18 +#define FIXED(X) ((s32)((X) << 16)) +#define FLOAT(X) (((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1)) + +#define PHY_CHAIN_TX_DISABLE_TEMP 115 +#define PHY_HYSTERESIS_DELTATEMP 5 + +#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) + +#define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \ + mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \ + (value) << phy_type##_##reg_name##_##field##_##SHIFT); +#define READ_PHY_REG(pi, phy_type, reg_name, field) \ + ((read_phy_reg(pi, phy_type##_##reg_name) & phy_type##_##reg_name##_##field##_##MASK)\ + >> phy_type##_##reg_name##_##field##_##SHIFT) + +#define VALID_PHYTYPE(phytype) (((uint)phytype == PHY_TYPE_N) || \ + ((uint)phytype == PHY_TYPE_LCN)) + +#define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || (radioid == BCM2056_ID) || \ + (radioid == BCM2057_ID)) +#define VALID_LCN_RADIO(radioid) (radioid == BCM2064_ID) + +#define VALID_RADIO(pi, radioid) (\ + (ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \ + (ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false)) + +#define SCAN_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN)) +#define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM)) +#define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT)) +#define ASSOC_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC)) +#define SCAN_RM_IN_PROGRESS(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM)) +#define PHY_MUTED(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE)) +#define PUB_NOT_ASSOC(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC)) + +#if defined(EXT_CBALL) +#define NORADIO_ENAB(pub) ((pub).radioid == NORADIO_ID) +#else +#define NORADIO_ENAB(pub) 0 +#endif + +#define PHY_LTRN_LIST_LEN 64 +extern u16 ltrn_list[PHY_LTRN_LIST_LEN]; + +typedef struct _phy_table_info { + uint table; + int q; + uint max; +} phy_table_info_t; + +typedef struct phytbl_info { + const void *tbl_ptr; + u32 tbl_len; + u32 tbl_id; + u32 tbl_offset; + u32 tbl_width; +} phytbl_info_t; + +typedef struct { + u8 curr_home_channel; + u16 crsminpwrthld_40_stored; + u16 crsminpwrthld_20L_stored; + u16 crsminpwrthld_20U_stored; + u16 init_gain_code_core1_stored; + u16 init_gain_code_core2_stored; + u16 init_gain_codeb_core1_stored; + u16 init_gain_codeb_core2_stored; + u16 init_gain_table_stored[4]; + + u16 clip1_hi_gain_code_core1_stored; + u16 clip1_hi_gain_code_core2_stored; + u16 clip1_hi_gain_codeb_core1_stored; + u16 clip1_hi_gain_codeb_core2_stored; + u16 nb_clip_thresh_core1_stored; + u16 nb_clip_thresh_core2_stored; + u16 init_ofdmlna2gainchange_stored[4]; + u16 init_ccklna2gainchange_stored[4]; + u16 clip1_lo_gain_code_core1_stored; + u16 clip1_lo_gain_code_core2_stored; + u16 clip1_lo_gain_codeb_core1_stored; + u16 clip1_lo_gain_codeb_core2_stored; + u16 w1_clip_thresh_core1_stored; + u16 w1_clip_thresh_core2_stored; + u16 radio_2056_core1_rssi_gain_stored; + u16 radio_2056_core2_rssi_gain_stored; + u16 energy_drop_timeout_len_stored; + + u16 ed_crs40_assertthld0_stored; + u16 ed_crs40_assertthld1_stored; + u16 ed_crs40_deassertthld0_stored; + u16 ed_crs40_deassertthld1_stored; + u16 ed_crs20L_assertthld0_stored; + u16 ed_crs20L_assertthld1_stored; + u16 ed_crs20L_deassertthld0_stored; + u16 ed_crs20L_deassertthld1_stored; + u16 ed_crs20U_assertthld0_stored; + u16 ed_crs20U_assertthld1_stored; + u16 ed_crs20U_deassertthld0_stored; + u16 ed_crs20U_deassertthld1_stored; + + u16 badplcp_ma; + u16 badplcp_ma_previous; + u16 badplcp_ma_total; + u16 badplcp_ma_list[MA_WINDOW_SZ]; + int badplcp_ma_index; + s16 pre_badplcp_cnt; + s16 bphy_pre_badplcp_cnt; + + u16 init_gain_core1; + u16 init_gain_core2; + u16 init_gainb_core1; + u16 init_gainb_core2; + u16 init_gain_rfseq[4]; + + u16 crsminpwr0; + u16 crsminpwrl0; + u16 crsminpwru0; + + s16 crsminpwr_index; + + u16 radio_2057_core1_rssi_wb1a_gc_stored; + u16 radio_2057_core2_rssi_wb1a_gc_stored; + u16 radio_2057_core1_rssi_wb1g_gc_stored; + u16 radio_2057_core2_rssi_wb1g_gc_stored; + u16 radio_2057_core1_rssi_wb2_gc_stored; + u16 radio_2057_core2_rssi_wb2_gc_stored; + u16 radio_2057_core1_rssi_nb_gc_stored; + u16 radio_2057_core2_rssi_nb_gc_stored; + +} interference_info_t; + +typedef struct { + u16 rc_cal_ovr; + u16 phycrsth1; + u16 phycrsth2; + u16 init_n1p1_gain; + u16 p1_p2_gain; + u16 n1_n2_gain; + u16 n1_p1_gain; + u16 div_search_gain; + u16 div_p1_p2_gain; + u16 div_search_gn_change; + u16 table_7_2; + u16 table_7_3; + u16 cckshbits_gnref; + u16 clip_thresh; + u16 clip2_thresh; + u16 clip3_thresh; + u16 clip_p2_thresh; + u16 clip_pwdn_thresh; + u16 clip_n1p1_thresh; + u16 clip_n1_pwdn_thresh; + u16 bbconfig; + u16 cthr_sthr_shdin; + u16 energy; + u16 clip_p1_p2_thresh; + u16 threshold; + u16 reg15; + u16 reg16; + u16 reg17; + u16 div_srch_idx; + u16 div_srch_p1_p2; + u16 div_srch_gn_back; + u16 ant_dwell; + u16 ant_wr_settle; +} aci_save_gphy_t; + +typedef struct _lo_complex_t { + s8 i; + s8 q; +} lo_complex_abgphy_info_t; + +typedef struct _nphy_iq_comp { + s16 a0; + s16 b0; + s16 a1; + s16 b1; +} nphy_iq_comp_t; + +typedef struct _nphy_txpwrindex { + s8 index; + s8 index_internal; + s8 index_internal_save; + u16 AfectrlOverride; + u16 AfeCtrlDacGain; + u16 rad_gain; + u8 bbmult; + u16 iqcomp_a; + u16 iqcomp_b; + u16 locomp; +} phy_txpwrindex_t; + +typedef struct { + + u16 txcal_coeffs_2G[8]; + u16 txcal_radio_regs_2G[8]; + nphy_iq_comp_t rxcal_coeffs_2G; + + u16 txcal_coeffs_5G[8]; + u16 txcal_radio_regs_5G[8]; + nphy_iq_comp_t rxcal_coeffs_5G; +} txiqcal_cache_t; + +typedef struct _nphy_pwrctrl { + s8 max_pwr_2g; + s8 idle_targ_2g; + s16 pwrdet_2g_a1; + s16 pwrdet_2g_b0; + s16 pwrdet_2g_b1; + s8 max_pwr_5gm; + s8 idle_targ_5gm; + s8 max_pwr_5gh; + s8 max_pwr_5gl; + s16 pwrdet_5gm_a1; + s16 pwrdet_5gm_b0; + s16 pwrdet_5gm_b1; + s16 pwrdet_5gl_a1; + s16 pwrdet_5gl_b0; + s16 pwrdet_5gl_b1; + s16 pwrdet_5gh_a1; + s16 pwrdet_5gh_b0; + s16 pwrdet_5gh_b1; + s8 idle_targ_5gl; + s8 idle_targ_5gh; + s8 idle_tssi_2g; + s8 idle_tssi_5g; + s8 idle_tssi; + s16 a1; + s16 b0; + s16 b1; +} phy_pwrctrl_t; + +typedef struct _nphy_txgains { + u16 txlpf[2]; + u16 txgm[2]; + u16 pga[2]; + u16 pad[2]; + u16 ipa[2]; +} nphy_txgains_t; + +#define PHY_NOISEVAR_BUFSIZE 10 + +typedef struct _nphy_noisevar_buf { + int bufcount; + int tone_id[PHY_NOISEVAR_BUFSIZE]; + u32 noise_vars[PHY_NOISEVAR_BUFSIZE]; + u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE]; +} phy_noisevar_buf_t; + +typedef struct { + u16 rssical_radio_regs_2G[2]; + u16 rssical_phyregs_2G[12]; + + u16 rssical_radio_regs_5G[2]; + u16 rssical_phyregs_5G[12]; +} rssical_cache_t; + +typedef struct { + + u16 txiqlocal_a; + u16 txiqlocal_b; + u16 txiqlocal_didq; + u8 txiqlocal_ei0; + u8 txiqlocal_eq0; + u8 txiqlocal_fi0; + u8 txiqlocal_fq0; + + u16 txiqlocal_bestcoeffs[11]; + u16 txiqlocal_bestcoeffs_valid; + + u32 papd_eps_tbl[PHY_PAPD_EPS_TBL_SIZE_LCNPHY]; + u16 analog_gain_ref; + u16 lut_begin; + u16 lut_end; + u16 lut_step; + u16 rxcompdbm; + u16 papdctrl; + u16 sslpnCalibClkEnCtrl; + + u16 rxiqcal_coeff_a0; + u16 rxiqcal_coeff_b0; +} lcnphy_cal_results_t; + +struct shared_phy { + struct phy_info *phy_head; + uint unit; + struct si_pub *sih; + void *physhim; + uint corerev; + u32 machwcap; + bool up; + bool clk; + uint now; + u16 vid; + u16 did; + uint chip; + uint chiprev; + uint chippkg; + uint sromrev; + uint boardtype; + uint boardrev; + uint boardvendor; + u32 boardflags; + u32 boardflags2; + uint bustype; + uint buscorerev; + uint fast_timer; + uint slow_timer; + uint glacial_timer; + u8 rx_antdiv; + s8 phy_noise_window[MA_WINDOW_SZ]; + uint phy_noise_index; + u8 hw_phytxchain; + u8 hw_phyrxchain; + u8 phytxchain; + u8 phyrxchain; + u8 rssi_mode; + bool _rifs_phy; +}; + +struct phy_pub { + uint phy_type; + uint phy_rev; + u8 phy_corenum; + u16 radioid; + u8 radiorev; + u8 radiover; + + uint coreflags; + uint ana_rev; + bool abgphy_encore; +}; + +struct phy_info_nphy; +typedef struct phy_info_nphy phy_info_nphy_t; + +struct phy_info_lcnphy; +typedef struct phy_info_lcnphy phy_info_lcnphy_t; + +struct phy_func_ptr { + initfn_t init; + initfn_t calinit; + chansetfn_t chanset; + initfn_t txpwrrecalc; + longtrnfn_t longtrn; + txiqccgetfn_t txiqccget; + txiqccsetfn_t txiqccset; + txloccgetfn_t txloccget; + radioloftgetfn_t radioloftget; + initfn_t carrsuppr; + rxsigpwrfn_t rxsigpwr; + detachfn_t detach; +}; +typedef struct phy_func_ptr phy_func_ptr_t; + +struct phy_info { + wlc_phy_t pubpi_ro; + shared_phy_t *sh; + phy_func_ptr_t pi_fptr; + void *pi_ptr; + + union { + phy_info_lcnphy_t *pi_lcnphy; + } u; + bool user_txpwr_at_rfport; + + d11regs_t *regs; + struct phy_info *next; + char *vars; + wlc_phy_t pubpi; + + bool do_initcal; + bool phytest_on; + bool ofdm_rateset_war; + bool bf_preempt_4306; + chanspec_t radio_chanspec; + u8 antsel_type; + u16 bw; + u8 txpwr_percent; + bool phy_init_por; + + bool init_in_progress; + bool initialized; + bool sbtml_gm; + uint refcnt; + bool watchdog_override; + u8 phynoise_state; + uint phynoise_now; + int phynoise_chan_watchdog; + bool phynoise_polling; + bool disable_percal; + mbool measure_hold; + + s16 txpa_2g[PWRTBL_NUM_COEFF]; + s16 txpa_2g_low_temp[PWRTBL_NUM_COEFF]; + s16 txpa_2g_high_temp[PWRTBL_NUM_COEFF]; + s16 txpa_5g_low[PWRTBL_NUM_COEFF]; + s16 txpa_5g_mid[PWRTBL_NUM_COEFF]; + s16 txpa_5g_hi[PWRTBL_NUM_COEFF]; + + u8 tx_srom_max_2g; + u8 tx_srom_max_5g_low; + u8 tx_srom_max_5g_mid; + u8 tx_srom_max_5g_hi; + u8 tx_srom_max_rate_2g[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES]; + u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES]; + u8 tx_user_target[TXP_NUM_RATES]; + s8 tx_power_offset[TXP_NUM_RATES]; + u8 tx_power_target[TXP_NUM_RATES]; + + wlc_phy_srom_fem_t srom_fem2g; + wlc_phy_srom_fem_t srom_fem5g; + + u8 tx_power_max; + u8 tx_power_max_rate_ind; + bool hwpwrctrl; + u8 nphy_txpwrctrl; + s8 nphy_txrx_chain; + bool phy_5g_pwrgain; + + u16 phy_wreg; + u16 phy_wreg_limit; + + s8 n_preamble_override; + u8 antswitch; + u8 aa2g, aa5g; + + s8 idle_tssi[CH_5G_GROUP]; + s8 target_idle_tssi; + s8 txpwr_est_Pout; + u8 tx_power_min; + u8 txpwr_limit[TXP_NUM_RATES]; + u8 txpwr_env_limit[TXP_NUM_RATES]; + u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN]; + + bool channel_14_wide_filter; + + bool txpwroverride; + bool txpwridx_override_aphy; + s16 radiopwr_override; + u16 hwpwr_txcur; + u8 saved_txpwr_idx; + + bool edcrs_threshold_lock; + + u32 tr_R_gain_val; + u32 tr_T_gain_val; + + s16 ofdm_analog_filt_bw_override; + s16 cck_analog_filt_bw_override; + s16 ofdm_rccal_override; + s16 cck_rccal_override; + u16 extlna_type; + + uint interference_mode_crs_time; + u16 crsglitch_prev; + bool interference_mode_crs; + + u32 phy_tx_tone_freq; + uint phy_lastcal; + bool phy_forcecal; + bool phy_fixed_noise; + u32 xtalfreq; + u8 pdiv; + s8 carrier_suppr_disable; + + bool phy_bphy_evm; + bool phy_bphy_rfcs; + s8 phy_scraminit; + u8 phy_gpiosel; + + s16 phy_txcore_disable_temp; + s16 phy_txcore_enable_temp; + s8 phy_tempsense_offset; + bool phy_txcore_heatedup; + + u16 radiopwr; + u16 bb_atten; + u16 txctl1; + + u16 mintxbias; + u16 mintxmag; + lo_complex_abgphy_info_t gphy_locomp_iq[STATIC_NUM_RF][STATIC_NUM_BB]; + s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB]; + u16 gain_table[TX_GAIN_TABLE_LENGTH]; + bool loopback_gain; + s16 max_lpback_gain_hdB; + s16 trsw_rx_gain_hdB; + u8 power_vec[8]; + + u16 rc_cal; + int nrssi_table_delta; + int nrssi_slope_scale; + int nrssi_slope_offset; + int min_rssi; + int max_rssi; + + s8 txpwridx; + u8 min_txpower; + + u8 a_band_high_disable; + + u16 tx_vos; + u16 global_tx_bb_dc_bias_loft; + + int rf_max; + int bb_max; + int rf_list_size; + int bb_list_size; + u16 *rf_attn_list; + u16 *bb_attn_list; + u16 padmix_mask; + u16 padmix_reg; + u16 *txmag_list; + uint txmag_len; + bool txmag_enable; + + s8 *a_tssi_to_dbm; + s8 *m_tssi_to_dbm; + s8 *l_tssi_to_dbm; + s8 *h_tssi_to_dbm; + u8 *hwtxpwr; + + u16 freqtrack_saved_regs[2]; + int cur_interference_mode; + bool hwpwrctrl_capable; + bool temppwrctrl_capable; + + uint phycal_nslope; + uint phycal_noffset; + uint phycal_mlo; + uint phycal_txpower; + + u8 phy_aa2g; + + bool nphy_tableloaded; + s8 nphy_rssisel; + u32 nphy_bb_mult_save; + u16 nphy_txiqlocal_bestc[11]; + bool nphy_txiqlocal_coeffsvalid; + phy_txpwrindex_t nphy_txpwrindex[PHY_CORE_NUM_2]; + phy_pwrctrl_t nphy_pwrctrl_info[PHY_CORE_NUM_2]; + u16 cck2gpo; + u32 ofdm2gpo; + u32 ofdm5gpo; + u32 ofdm5glpo; + u32 ofdm5ghpo; + u8 bw402gpo; + u8 bw405gpo; + u8 bw405glpo; + u8 bw405ghpo; + u8 cdd2gpo; + u8 cdd5gpo; + u8 cdd5glpo; + u8 cdd5ghpo; + u8 stbc2gpo; + u8 stbc5gpo; + u8 stbc5glpo; + u8 stbc5ghpo; + u8 bwdup2gpo; + u8 bwdup5gpo; + u8 bwdup5glpo; + u8 bwdup5ghpo; + u16 mcs2gpo[8]; + u16 mcs5gpo[8]; + u16 mcs5glpo[8]; + u16 mcs5ghpo[8]; + u32 nphy_rxcalparams; + + u8 phy_spuravoid; + bool phy_isspuravoid; + + u8 phy_pabias; + u8 nphy_papd_skip; + u8 nphy_tssi_slope; + + s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ]; + u8 nphy_noise_index; + + u8 nphy_txpid2g[PHY_CORE_NUM_2]; + u8 nphy_txpid5g[PHY_CORE_NUM_2]; + u8 nphy_txpid5gl[PHY_CORE_NUM_2]; + u8 nphy_txpid5gh[PHY_CORE_NUM_2]; + + bool nphy_gain_boost; + bool nphy_elna_gain_config; + u16 old_bphy_test; + u16 old_bphy_testcontrol; + + bool phyhang_avoid; + + bool rssical_nphy; + u8 nphy_perical; + uint nphy_perical_last; + u8 cal_type_override; + u8 mphase_cal_phase_id; + u8 mphase_txcal_cmdidx; + u8 mphase_txcal_numcmds; + u16 mphase_txcal_bestcoeffs[11]; + chanspec_t nphy_txiqlocal_chanspec; + chanspec_t nphy_iqcal_chanspec_2G; + chanspec_t nphy_iqcal_chanspec_5G; + chanspec_t nphy_rssical_chanspec_2G; + chanspec_t nphy_rssical_chanspec_5G; + struct wlapi_timer *phycal_timer; + bool use_int_tx_iqlo_cal_nphy; + bool internal_tx_iqlo_cal_tapoff_intpa_nphy; + s16 nphy_lastcal_temp; + + txiqcal_cache_t calibration_cache; + rssical_cache_t rssical_cache; + + u8 nphy_txpwr_idx[2]; + u8 nphy_papd_cal_type; + uint nphy_papd_last_cal; + u16 nphy_papd_tx_gain_at_last_cal[2]; + u8 nphy_papd_cal_gain_index[2]; + s16 nphy_papd_epsilon_offset[2]; + bool nphy_papd_recal_enable; + u32 nphy_papd_recal_counter; + bool nphy_force_papd_cal; + bool nphy_papdcomp; + bool ipa2g_on; + bool ipa5g_on; + + u16 classifier_state; + u16 clip_state[2]; + uint nphy_deaf_count; + u8 rxiq_samps; + u8 rxiq_antsel; + + u16 rfctrlIntc1_save; + u16 rfctrlIntc2_save; + bool first_cal_after_assoc; + u16 tx_rx_cal_radio_saveregs[22]; + u16 tx_rx_cal_phy_saveregs[15]; + + u8 nphy_cal_orig_pwr_idx[2]; + u8 nphy_txcal_pwr_idx[2]; + u8 nphy_rxcal_pwr_idx[2]; + u16 nphy_cal_orig_tx_gain[2]; + nphy_txgains_t nphy_cal_target_gain; + u16 nphy_txcal_bbmult; + u16 nphy_gmval; + + u16 nphy_saved_bbconf; + + bool nphy_gband_spurwar_en; + bool nphy_gband_spurwar2_en; + bool nphy_aband_spurwar_en; + u16 nphy_rccal_value; + u16 nphy_crsminpwr[3]; + phy_noisevar_buf_t nphy_saved_noisevars; + bool nphy_anarxlpf_adjusted; + bool nphy_crsminpwr_adjusted; + bool nphy_noisevars_adjusted; + + bool nphy_rxcal_active; + u16 radar_percal_mask; + bool dfs_lp_buffer_nphy; + + u16 nphy_fineclockgatecontrol; + + s8 rx2tx_biasentry; + + u16 crsminpwr0; + u16 crsminpwrl0; + u16 crsminpwru0; + s16 noise_crsminpwr_index; + u16 init_gain_core1; + u16 init_gain_core2; + u16 init_gainb_core1; + u16 init_gainb_core2; + u8 aci_noise_curr_channel; + u16 init_gain_rfseq[4]; + + bool radio_is_on; + + bool nphy_sample_play_lpf_bw_ctl_ovr; + + u16 tbl_data_hi; + u16 tbl_data_lo; + u16 tbl_addr; + + uint tbl_save_id; + uint tbl_save_offset; + + u8 txpwrctrl; + s8 txpwrindex[PHY_CORE_MAX]; + + u8 phycal_tempdelta; + u32 mcs20_po; + u32 mcs40_po; + struct wiphy *wiphy; +}; + +typedef s32 fixed; + +typedef struct _cs32 { + fixed q; + fixed i; +} cs32; + +typedef struct radio_regs { + u16 address; + u32 init_a; + u32 init_g; + u8 do_init_a; + u8 do_init_g; +} radio_regs_t; + +typedef struct radio_20xx_regs { + u16 address; + u8 init; + u8 do_init; +} radio_20xx_regs_t; + +typedef struct lcnphy_radio_regs { + u16 address; + u8 init_a; + u8 init_g; + u8 do_init_a; + u8 do_init_g; +} lcnphy_radio_regs_t; + +extern lcnphy_radio_regs_t lcnphy_radio_regs_2064[]; +extern lcnphy_radio_regs_t lcnphy_radio_regs_2066[]; +extern radio_regs_t regs_2055[], regs_SYN_2056[], regs_TX_2056[], + regs_RX_2056[]; +extern radio_regs_t regs_SYN_2056_A1[], regs_TX_2056_A1[], regs_RX_2056_A1[]; +extern radio_regs_t regs_SYN_2056_rev5[], regs_TX_2056_rev5[], + regs_RX_2056_rev5[]; +extern radio_regs_t regs_SYN_2056_rev6[], regs_TX_2056_rev6[], + regs_RX_2056_rev6[]; +extern radio_regs_t regs_SYN_2056_rev7[], regs_TX_2056_rev7[], + regs_RX_2056_rev7[]; +extern radio_regs_t regs_SYN_2056_rev8[], regs_TX_2056_rev8[], + regs_RX_2056_rev8[]; +extern radio_20xx_regs_t regs_2057_rev4[], regs_2057_rev5[], regs_2057_rev5v1[]; +extern radio_20xx_regs_t regs_2057_rev7[], regs_2057_rev8[]; + +extern char *phy_getvar(phy_info_t *pi, const char *name); +extern int phy_getintvar(phy_info_t *pi, const char *name); +#define PHY_GETVAR(pi, name) phy_getvar(pi, name) +#define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name) + +extern u16 read_phy_reg(phy_info_t *pi, u16 addr); +extern void write_phy_reg(phy_info_t *pi, u16 addr, u16 val); +extern void and_phy_reg(phy_info_t *pi, u16 addr, u16 val); +extern void or_phy_reg(phy_info_t *pi, u16 addr, u16 val); +extern void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val); + +extern u16 read_radio_reg(phy_info_t *pi, u16 addr); +extern void or_radio_reg(phy_info_t *pi, u16 addr, u16 val); +extern void and_radio_reg(phy_info_t *pi, u16 addr, u16 val); +extern void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, + u16 val); +extern void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask); + +extern void write_radio_reg(phy_info_t *pi, u16 addr, u16 val); + +extern void wlc_phyreg_enter(wlc_phy_t *pih); +extern void wlc_phyreg_exit(wlc_phy_t *pih); +extern void wlc_radioreg_enter(wlc_phy_t *pih); +extern void wlc_radioreg_exit(wlc_phy_t *pih); + +extern void wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, + u16 tblAddr, u16 tblDataHi, + u16 tblDatalo); +extern void wlc_phy_write_table(phy_info_t *pi, + const phytbl_info_t *ptbl_info, u16 tblAddr, + u16 tblDataHi, u16 tblDatalo); +extern void wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, + u16 tblAddr, u16 tblDataHi, + u16 tblDataLo); +extern void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val); + +extern void write_phy_channel_reg(phy_info_t *pi, uint val); +extern void wlc_phy_txpower_update_shm(phy_info_t *pi); + +extern void wlc_phy_cordic(fixed theta, cs32 *val); +extern u8 wlc_phy_nbits(s32 value); +extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core); + +extern uint wlc_phy_init_radio_regs_allbands(phy_info_t *pi, + radio_20xx_regs_t *radioregs); +extern uint wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, + u16 core_offset); + +extern void wlc_phy_txpower_ipa_upd(phy_info_t *pi); + +extern void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on); +extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real, + s32 *eps_imag); + +extern void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi); +extern void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi); + +extern bool wlc_phy_attach_nphy(phy_info_t *pi); +extern bool wlc_phy_attach_lcnphy(phy_info_t *pi); + +extern void wlc_phy_detach_lcnphy(phy_info_t *pi); + +extern void wlc_phy_init_nphy(phy_info_t *pi); +extern void wlc_phy_init_lcnphy(phy_info_t *pi); + +extern void wlc_phy_cal_init_nphy(phy_info_t *pi); +extern void wlc_phy_cal_init_lcnphy(phy_info_t *pi); + +extern void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec); +extern void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec); +extern void wlc_phy_chanspec_set_fixup_lcnphy(phy_info_t *pi, + chanspec_t chanspec); +extern int wlc_phy_channel2freq(uint channel); +extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint); +extern int wlc_phy_chanspec_bandrange_get(phy_info_t *, chanspec_t); + +extern void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode); +extern s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi); + +extern void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi); +extern void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi); +extern void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi); + +extern void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index); +extern void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable); +extern void wlc_lcnphy_stop_tx_tone(phy_info_t *pi); +extern void wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, + u16 max_val, bool iqcalmode); + +extern void wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, + u8 *max_pwr, u8 rate_id); +extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, + u8 rate_mcs_end, + u8 rate_ofdm_start); +extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, + u8 rate_ofdm_start, + u8 rate_ofdm_end, + u8 rate_mcs_start); + +extern u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode); +extern s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode); +extern s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode); +extern s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode); +extern void wlc_phy_carrier_suppress_lcnphy(phy_info_t *pi); +extern void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel); +extern void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode); +extern void wlc_2064_vco_cal(phy_info_t *pi); + +extern void wlc_phy_txpower_recalc_target(phy_info_t *pi); + +#define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18 +#define LCNPHY_TX_POWER_TABLE_SIZE 128 +#define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1) +#define LCNPHY_TBL_ID_TXPWRCTL 0x07 +#define LCNPHY_TX_PWR_CTRL_OFF 0 +#define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15) +#define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \ + (0x1 << 14) | \ + (0x1 << 13)) + +#define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001 + +extern void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti); +extern void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti); +extern void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b); +extern void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq); +extern void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b); +extern u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi); +extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, u8 *ei0, + u8 *eq0, u8 *fi0, u8 *fq0); +extern void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode); +extern void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode); +extern bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi); +extern void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi); +extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1); +extern void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, + s8 *cck_pwr); +extern void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi); + +extern s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index); + +#define NPHY_MAX_HPVGA1_INDEX 10 +#define NPHY_DEF_HPVGA1_INDEXLIMIT 7 + +typedef struct _phy_iq_est { + s32 iq_prod; + u32 i_pwr; + u32 q_pwr; +} phy_iq_est_t; + +extern void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable); +extern void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode); + +#define wlc_phy_write_table_nphy(pi, pti) wlc_phy_write_table(pi, pti, 0x72, \ + 0x74, 0x73) +#define wlc_phy_read_table_nphy(pi, pti) wlc_phy_read_table(pi, pti, 0x72, \ + 0x74, 0x73) +#define wlc_nphy_table_addr(pi, id, off) wlc_phy_table_addr((pi), (id), (off), \ + 0x72, 0x74, 0x73) +#define wlc_nphy_table_data_write(pi, w, v) wlc_phy_table_data_write((pi), (w), (v)) + +extern void wlc_phy_table_read_nphy(phy_info_t *pi, u32, u32 l, u32 o, + u32 w, void *d); +extern void wlc_phy_table_write_nphy(phy_info_t *pi, u32, u32, u32, + u32, const void *); + +#define PHY_IPA(pi) \ + ((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \ + (pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec))) + +#define WLC_PHY_WAR_PR51571(pi) \ + if (((pi)->sh->bustype == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \ + (void)R_REG(&(pi)->regs->maccontrol) + +extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype); +extern void wlc_phy_aci_reset_nphy(phy_info_t *pi); +extern void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en); + +extern u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan); +extern void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on); + +extern void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi); + +extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd); +extern s16 wlc_phy_tempsense_nphy(phy_info_t *pi); + +extern u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val); + +extern void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, + u16 num_samps, u8 wait_time, + u8 wait_for_crs); + +extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, + nphy_iq_comp_t *comp); +extern void wlc_phy_aci_and_noise_reduction_nphy(phy_info_t *pi); + +extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask); +extern u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih); + +extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type); +extern void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi); +extern void wlc_phy_txpwr_apply_nphy(phy_info_t *pi); +extern void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi); +extern u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi); + +extern nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi); +extern int wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, + bool full, bool m); +extern int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, + u8 type, bool d); +extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, + s8 txpwrindex, bool res); +extern void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core, u8 rssi_type); +extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, + s32 *rssi_buf, u8 nsamps); +extern void wlc_phy_rssi_cal_nphy(phy_info_t *pi); +extern int wlc_phy_aci_scan_nphy(phy_info_t *pi); +extern void wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, + bool debug); +extern int wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, + u8 mode, u8, bool); +extern void wlc_phy_stopplayback_nphy(phy_info_t *pi); +extern void wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, + u8 num_samps); +extern void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi); + +extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh); + +#define NPHY_TESTPATTERN_BPHY_EVM 0 +#define NPHY_TESTPATTERN_BPHY_RFCS 1 + +extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs); + +void wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, + s8 *ofdmoffset); +extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, + chanspec_t chanspec); + +extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih); +#endif /* _BRCM_PHY_INT_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c new file mode 100644 index 0000000..de301aad --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c @@ -0,0 +1,5304 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "phy_radio.h" +#include "phy_int.h" +#include "phy_qmath.h" +#include "phy_lcn.h" +#include "phytbl_lcn.h" + +#define PLL_2064_NDIV 90 +#define PLL_2064_LOW_END_VCO 3000 +#define PLL_2064_LOW_END_KVCO 27 +#define PLL_2064_HIGH_END_VCO 4200 +#define PLL_2064_HIGH_END_KVCO 68 +#define PLL_2064_LOOP_BW_DOUBLER 200 +#define PLL_2064_D30_DOUBLER 10500 +#define PLL_2064_LOOP_BW 260 +#define PLL_2064_D30 8000 +#define PLL_2064_CAL_REF_TO 8 +#define PLL_2064_MHZ 1000000 +#define PLL_2064_OPEN_LOOP_DELAY 5 + +#define TEMPSENSE 1 +#define VBATSENSE 2 + +#define NOISE_IF_UPD_CHK_INTERVAL 1 +#define NOISE_IF_UPD_RST_INTERVAL 60 +#define NOISE_IF_UPD_THRESHOLD_CNT 1 +#define NOISE_IF_UPD_TRHRESHOLD 50 +#define NOISE_IF_UPD_TIMEOUT 1000 +#define NOISE_IF_OFF 0 +#define NOISE_IF_CHK 1 +#define NOISE_IF_ON 2 + +#define PAPD_BLANKING_PROFILE 3 +#define PAPD2LUT 0 +#define PAPD_CORR_NORM 0 +#define PAPD_BLANKING_THRESHOLD 0 +#define PAPD_STOP_AFTER_LAST_UPDATE 0 + +#define LCN_TARGET_PWR 60 + +#define LCN_VBAT_OFFSET_433X 34649679 +#define LCN_VBAT_SLOPE_433X 8258032 + +#define LCN_VBAT_SCALE_NOM 53 +#define LCN_VBAT_SCALE_DEN 432 + +#define LCN_TEMPSENSE_OFFSET 80812 +#define LCN_TEMPSENSE_DEN 2647 + +#define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT \ + (0 + 8) +#define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK \ + (0x7f << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT) + +#define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT \ + (0 + 8) +#define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK \ + (0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT) + +#define wlc_lcnphy_enable_tx_gain_override(pi) \ + wlc_lcnphy_set_tx_gain_override(pi, true) +#define wlc_lcnphy_disable_tx_gain_override(pi) \ + wlc_lcnphy_set_tx_gain_override(pi, false) + +#define wlc_lcnphy_iqcal_active(pi) \ + (read_phy_reg((pi), 0x451) & \ + ((0x1 << 15) | (0x1 << 14))) + +#define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13)) +#define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \ + (pi->temppwrctrl_capable) +#define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \ + (pi->hwpwrctrl_capable) + +#define SWCTRL_BT_TX 0x18 +#define SWCTRL_OVR_DISABLE 0x40 + +#define AFE_CLK_INIT_MODE_TXRX2X 1 +#define AFE_CLK_INIT_MODE_PAPD 0 + +#define LCNPHY_TBL_ID_IQLOCAL 0x00 + +#define LCNPHY_TBL_ID_RFSEQ 0x08 +#define LCNPHY_TBL_ID_GAIN_IDX 0x0d +#define LCNPHY_TBL_ID_SW_CTRL 0x0f +#define LCNPHY_TBL_ID_GAIN_TBL 0x12 +#define LCNPHY_TBL_ID_SPUR 0x14 +#define LCNPHY_TBL_ID_SAMPLEPLAY 0x15 +#define LCNPHY_TBL_ID_SAMPLEPLAY1 0x16 + +#define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832 +#define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128 +#define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192 +#define LCNPHY_TX_PWR_CTRL_IQ_OFFSET 320 +#define LCNPHY_TX_PWR_CTRL_LO_OFFSET 448 +#define LCNPHY_TX_PWR_CTRL_PWR_OFFSET 576 + +#define LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313 140 + +#define LCNPHY_TX_PWR_CTRL_START_NPT 1 +#define LCNPHY_TX_PWR_CTRL_MAX_NPT 7 + +#define LCNPHY_NOISE_SAMPLES_DEFAULT 5000 + +#define LCNPHY_ACI_DETECT_START 1 +#define LCNPHY_ACI_DETECT_PROGRESS 2 +#define LCNPHY_ACI_DETECT_STOP 3 + +#define LCNPHY_ACI_CRSHIFRMLO_TRSH 100 +#define LCNPHY_ACI_GLITCH_TRSH 2000 +#define LCNPHY_ACI_TMOUT 250 +#define LCNPHY_ACI_DETECT_TIMEOUT 2 +#define LCNPHY_ACI_START_DELAY 0 + +#define wlc_lcnphy_tx_gain_override_enabled(pi) \ + (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6))) + +#define wlc_lcnphy_total_tx_frames(pi) \ + wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + offsetof(macstat_t, txallfrm)) + +typedef struct { + u16 gm_gain; + u16 pga_gain; + u16 pad_gain; + u16 dac_gain; +} lcnphy_txgains_t; + +typedef enum { + LCNPHY_CAL_FULL, + LCNPHY_CAL_RECAL, + LCNPHY_CAL_CURRECAL, + LCNPHY_CAL_DIGCAL, + LCNPHY_CAL_GCTRL +} lcnphy_cal_mode_t; + +typedef struct { + lcnphy_txgains_t gains; + bool useindex; + u8 index; +} lcnphy_txcalgains_t; + +typedef struct { + u8 chan; + s16 a; + s16 b; +} lcnphy_rx_iqcomp_t; + +typedef struct { + s16 re; + s16 im; +} lcnphy_spb_tone_t; + +typedef struct { + u16 re; + u16 im; +} lcnphy_unsign16_struct; + +typedef struct { + u32 iq_prod; + u32 i_pwr; + u32 q_pwr; +} lcnphy_iq_est_t; + +typedef struct { + u16 ptcentreTs20; + u16 ptcentreFactor; +} lcnphy_sfo_cfg_t; + +typedef enum { + LCNPHY_PAPD_CAL_CW, + LCNPHY_PAPD_CAL_OFDM +} lcnphy_papd_cal_type_t; + +typedef u16 iqcal_gain_params_lcnphy[9]; + +static const iqcal_gain_params_lcnphy tbl_iqcal_gainparams_lcnphy_2G[] = { + {0, 0, 0, 0, 0, 0, 0, 0, 0}, +}; + +static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = { + tbl_iqcal_gainparams_lcnphy_2G, +}; + +static const u16 iqcal_gainparams_numgains_lcnphy[1] = { + sizeof(tbl_iqcal_gainparams_lcnphy_2G) / + sizeof(*tbl_iqcal_gainparams_lcnphy_2G), +}; + +static const lcnphy_sfo_cfg_t lcnphy_sfo_cfg[] = { + {965, 1087}, + {967, 1085}, + {969, 1082}, + {971, 1080}, + {973, 1078}, + {975, 1076}, + {977, 1073}, + {979, 1071}, + {981, 1069}, + {983, 1067}, + {985, 1065}, + {987, 1063}, + {989, 1060}, + {994, 1055} +}; + +static const +u16 lcnphy_iqcal_loft_gainladder[] = { + ((2 << 8) | 0), + ((3 << 8) | 0), + ((4 << 8) | 0), + ((6 << 8) | 0), + ((8 << 8) | 0), + ((11 << 8) | 0), + ((16 << 8) | 0), + ((16 << 8) | 1), + ((16 << 8) | 2), + ((16 << 8) | 3), + ((16 << 8) | 4), + ((16 << 8) | 5), + ((16 << 8) | 6), + ((16 << 8) | 7), + ((23 << 8) | 7), + ((32 << 8) | 7), + ((45 << 8) | 7), + ((64 << 8) | 7), + ((91 << 8) | 7), + ((128 << 8) | 7) +}; + +static const +u16 lcnphy_iqcal_ir_gainladder[] = { + ((1 << 8) | 0), + ((2 << 8) | 0), + ((4 << 8) | 0), + ((6 << 8) | 0), + ((8 << 8) | 0), + ((11 << 8) | 0), + ((16 << 8) | 0), + ((23 << 8) | 0), + ((32 << 8) | 0), + ((45 << 8) | 0), + ((64 << 8) | 0), + ((64 << 8) | 1), + ((64 << 8) | 2), + ((64 << 8) | 3), + ((64 << 8) | 4), + ((64 << 8) | 5), + ((64 << 8) | 6), + ((64 << 8) | 7), + ((91 << 8) | 7), + ((128 << 8) | 7) +}; + +static const +lcnphy_spb_tone_t lcnphy_spb_tone_3750[] = { + {88, 0}, + {73, 49}, + {34, 81}, + {-17, 86}, + {-62, 62}, + {-86, 17}, + {-81, -34}, + {-49, -73}, + {0, -88}, + {49, -73}, + {81, -34}, + {86, 17}, + {62, 62}, + {17, 86}, + {-34, 81}, + {-73, 49}, + {-88, 0}, + {-73, -49}, + {-34, -81}, + {17, -86}, + {62, -62}, + {86, -17}, + {81, 34}, + {49, 73}, + {0, 88}, + {-49, 73}, + {-81, 34}, + {-86, -17}, + {-62, -62}, + {-17, -86}, + {34, -81}, + {73, -49}, +}; + +static const +u16 iqlo_loopback_rf_regs[20] = { + RADIO_2064_REG036, + RADIO_2064_REG11A, + RADIO_2064_REG03A, + RADIO_2064_REG025, + RADIO_2064_REG028, + RADIO_2064_REG005, + RADIO_2064_REG112, + RADIO_2064_REG0FF, + RADIO_2064_REG11F, + RADIO_2064_REG00B, + RADIO_2064_REG113, + RADIO_2064_REG007, + RADIO_2064_REG0FC, + RADIO_2064_REG0FD, + RADIO_2064_REG012, + RADIO_2064_REG057, + RADIO_2064_REG059, + RADIO_2064_REG05C, + RADIO_2064_REG078, + RADIO_2064_REG092, +}; + +static const +u16 tempsense_phy_regs[14] = { + 0x503, + 0x4a4, + 0x4d0, + 0x4d9, + 0x4da, + 0x4a6, + 0x938, + 0x939, + 0x4d8, + 0x4d0, + 0x4d7, + 0x4a5, + 0x40d, + 0x4a2, +}; + +static const +u16 rxiq_cal_rf_reg[11] = { + RADIO_2064_REG098, + RADIO_2064_REG116, + RADIO_2064_REG12C, + RADIO_2064_REG06A, + RADIO_2064_REG00B, + RADIO_2064_REG01B, + RADIO_2064_REG113, + RADIO_2064_REG01D, + RADIO_2064_REG114, + RADIO_2064_REG02E, + RADIO_2064_REG12A, +}; + +static const +lcnphy_rx_iqcomp_t lcnphy_rx_iqcomp_table_rev0[] = { + {1, 0, 0}, + {2, 0, 0}, + {3, 0, 0}, + {4, 0, 0}, + {5, 0, 0}, + {6, 0, 0}, + {7, 0, 0}, + {8, 0, 0}, + {9, 0, 0}, + {10, 0, 0}, + {11, 0, 0}, + {12, 0, 0}, + {13, 0, 0}, + {14, 0, 0}, + {34, 0, 0}, + {38, 0, 0}, + {42, 0, 0}, + {46, 0, 0}, + {36, 0, 0}, + {40, 0, 0}, + {44, 0, 0}, + {48, 0, 0}, + {52, 0, 0}, + {56, 0, 0}, + {60, 0, 0}, + {64, 0, 0}, + {100, 0, 0}, + {104, 0, 0}, + {108, 0, 0}, + {112, 0, 0}, + {116, 0, 0}, + {120, 0, 0}, + {124, 0, 0}, + {128, 0, 0}, + {132, 0, 0}, + {136, 0, 0}, + {140, 0, 0}, + {149, 0, 0}, + {153, 0, 0}, + {157, 0, 0}, + {161, 0, 0}, + {165, 0, 0}, + {184, 0, 0}, + {188, 0, 0}, + {192, 0, 0}, + {196, 0, 0}, + {200, 0, 0}, + {204, 0, 0}, + {208, 0, 0}, + {212, 0, 0}, + {216, 0, 0}, +}; + +static const u32 lcnphy_23bitgaincode_table[] = { + 0x200100, + 0x200200, + 0x200004, + 0x200014, + 0x200024, + 0x200034, + 0x200134, + 0x200234, + 0x200334, + 0x200434, + 0x200037, + 0x200137, + 0x200237, + 0x200337, + 0x200437, + 0x000035, + 0x000135, + 0x000235, + 0x000037, + 0x000137, + 0x000237, + 0x000337, + 0x00013f, + 0x00023f, + 0x00033f, + 0x00034f, + 0x00044f, + 0x00144f, + 0x00244f, + 0x00254f, + 0x00354f, + 0x00454f, + 0x00464f, + 0x01464f, + 0x02464f, + 0x03464f, + 0x04464f, +}; + +static const s8 lcnphy_gain_table[] = { + -16, + -13, + 10, + 7, + 4, + 0, + 3, + 6, + 9, + 12, + 15, + 18, + 21, + 24, + 27, + 30, + 33, + 36, + 39, + 42, + 45, + 48, + 50, + 53, + 56, + 59, + 62, + 65, + 68, + 71, + 74, + 77, + 80, + 83, + 86, + 89, + 92, +}; + +static const s8 lcnphy_gain_index_offset_for_rssi[] = { + 7, + 7, + 7, + 7, + 7, + 7, + 7, + 8, + 7, + 7, + 6, + 7, + 7, + 4, + 4, + 4, + 4, + 4, + 4, + 4, + 4, + 3, + 3, + 3, + 3, + 3, + 3, + 4, + 2, + 2, + 2, + 2, + 2, + 2, + -1, + -2, + -2, + -2 +}; + +extern const u8 spur_tbl_rev0[]; +extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev1; +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[]; +extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa; +extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250; + +typedef struct _chan_info_2064_lcnphy { + uint chan; + uint freq; + u8 logen_buftune; + u8 logen_rccr_tx; + u8 txrf_mix_tune_ctrl; + u8 pa_input_tune_g; + u8 logen_rccr_rx; + u8 pa_rxrf_lna1_freq_tune; + u8 pa_rxrf_lna2_freq_tune; + u8 rxrf_rxrf_spare1; +} chan_info_2064_lcnphy_t; + +static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = { + {1, 2412, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {2, 2417, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {3, 2422, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {4, 2427, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {5, 2432, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {6, 2437, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {7, 2442, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {8, 2447, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {9, 2452, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {10, 2457, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {11, 2462, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {12, 2467, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {13, 2472, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, + {14, 2484, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, +}; + +lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = { + {0x00, 0, 0, 0, 0}, + {0x01, 0x64, 0x64, 0, 0}, + {0x02, 0x20, 0x20, 0, 0}, + {0x03, 0x66, 0x66, 0, 0}, + {0x04, 0xf8, 0xf8, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0x10, 0x10, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0x37, 0x37, 0, 0}, + {0x0B, 0x6, 0x6, 0, 0}, + {0x0C, 0x55, 0x55, 0, 0}, + {0x0D, 0x8b, 0x8b, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0x5, 0x5, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0xe, 0xe, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0xb, 0xb, 0, 0}, + {0x14, 0x2, 0x2, 0, 0}, + {0x15, 0x12, 0x12, 0, 0}, + {0x16, 0x12, 0x12, 0, 0}, + {0x17, 0xc, 0xc, 0, 0}, + {0x18, 0xc, 0xc, 0, 0}, + {0x19, 0xc, 0xc, 0, 0}, + {0x1A, 0x8, 0x8, 0, 0}, + {0x1B, 0x2, 0x2, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0x1, 0x1, 0, 0}, + {0x1E, 0x12, 0x12, 0, 0}, + {0x1F, 0x6e, 0x6e, 0, 0}, + {0x20, 0x2, 0x2, 0, 0}, + {0x21, 0x23, 0x23, 0, 0}, + {0x22, 0x8, 0x8, 0, 0}, + {0x23, 0, 0, 0, 0}, + {0x24, 0, 0, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0x33, 0x33, 0, 0}, + {0x27, 0x55, 0x55, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x30, 0x30, 0, 0}, + {0x2A, 0xb, 0xb, 0, 0}, + {0x2B, 0x1b, 0x1b, 0, 0}, + {0x2C, 0x3, 0x3, 0, 0}, + {0x2D, 0x1b, 0x1b, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x20, 0x20, 0, 0}, + {0x30, 0xa, 0xa, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0x62, 0x62, 0, 0}, + {0x33, 0x19, 0x19, 0, 0}, + {0x34, 0x33, 0x33, 0, 0}, + {0x35, 0x77, 0x77, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x70, 0x70, 0, 0}, + {0x38, 0x3, 0x3, 0, 0}, + {0x39, 0xf, 0xf, 0, 0}, + {0x3A, 0x6, 0x6, 0, 0}, + {0x3B, 0xcf, 0xcf, 0, 0}, + {0x3C, 0x1a, 0x1a, 0, 0}, + {0x3D, 0x6, 0x6, 0, 0}, + {0x3E, 0x42, 0x42, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0xfb, 0xfb, 0, 0}, + {0x41, 0x9a, 0x9a, 0, 0}, + {0x42, 0x7a, 0x7a, 0, 0}, + {0x43, 0x29, 0x29, 0, 0}, + {0x44, 0, 0, 0, 0}, + {0x45, 0x8, 0x8, 0, 0}, + {0x46, 0xce, 0xce, 0, 0}, + {0x47, 0x27, 0x27, 0, 0}, + {0x48, 0x62, 0x62, 0, 0}, + {0x49, 0x6, 0x6, 0, 0}, + {0x4A, 0x58, 0x58, 0, 0}, + {0x4B, 0xf7, 0xf7, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0xb3, 0xb3, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0, 0, 0, 0}, + {0x51, 0x9, 0x9, 0, 0}, + {0x52, 0x5, 0x5, 0, 0}, + {0x53, 0x17, 0x17, 0, 0}, + {0x54, 0x38, 0x38, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0xb, 0xb, 0, 0}, + {0x58, 0, 0, 0, 0}, + {0x59, 0, 0, 0, 0}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0, 0, 0, 0}, + {0x5C, 0, 0, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x88, 0x88, 0, 0}, + {0x5F, 0xcc, 0xcc, 0, 0}, + {0x60, 0x74, 0x74, 0, 0}, + {0x61, 0x74, 0x74, 0, 0}, + {0x62, 0x74, 0x74, 0, 0}, + {0x63, 0x44, 0x44, 0, 0}, + {0x64, 0x77, 0x77, 0, 0}, + {0x65, 0x44, 0x44, 0, 0}, + {0x66, 0x77, 0x77, 0, 0}, + {0x67, 0x55, 0x55, 0, 0}, + {0x68, 0x77, 0x77, 0, 0}, + {0x69, 0x77, 0x77, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0x7f, 0x7f, 0, 0}, + {0x6C, 0x8, 0x8, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0x88, 0x88, 0, 0}, + {0x6F, 0x66, 0x66, 0, 0}, + {0x70, 0x66, 0x66, 0, 0}, + {0x71, 0x28, 0x28, 0, 0}, + {0x72, 0x55, 0x55, 0, 0}, + {0x73, 0x4, 0x4, 0, 0}, + {0x74, 0, 0, 0, 0}, + {0x75, 0, 0, 0, 0}, + {0x76, 0, 0, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0xd6, 0xd6, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0xb4, 0xb4, 0, 0}, + {0x84, 0x1, 0x1, 0, 0}, + {0x85, 0x20, 0x20, 0, 0}, + {0x86, 0x5, 0x5, 0, 0}, + {0x87, 0xff, 0xff, 0, 0}, + {0x88, 0x7, 0x7, 0, 0}, + {0x89, 0x77, 0x77, 0, 0}, + {0x8A, 0x77, 0x77, 0, 0}, + {0x8B, 0x77, 0x77, 0, 0}, + {0x8C, 0x77, 0x77, 0, 0}, + {0x8D, 0x8, 0x8, 0, 0}, + {0x8E, 0xa, 0xa, 0, 0}, + {0x8F, 0x8, 0x8, 0, 0}, + {0x90, 0x18, 0x18, 0, 0}, + {0x91, 0x5, 0x5, 0, 0}, + {0x92, 0x1f, 0x1f, 0, 0}, + {0x93, 0x10, 0x10, 0, 0}, + {0x94, 0x3, 0x3, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0xaa, 0xaa, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0x23, 0x23, 0, 0}, + {0x9A, 0x7, 0x7, 0, 0}, + {0x9B, 0xf, 0xf, 0, 0}, + {0x9C, 0x10, 0x10, 0, 0}, + {0x9D, 0x3, 0x3, 0, 0}, + {0x9E, 0x4, 0x4, 0, 0}, + {0x9F, 0x20, 0x20, 0, 0}, + {0xA0, 0, 0, 0, 0}, + {0xA1, 0, 0, 0, 0}, + {0xA2, 0, 0, 0, 0}, + {0xA3, 0, 0, 0, 0}, + {0xA4, 0x1, 0x1, 0, 0}, + {0xA5, 0x77, 0x77, 0, 0}, + {0xA6, 0x77, 0x77, 0, 0}, + {0xA7, 0x77, 0x77, 0, 0}, + {0xA8, 0x77, 0x77, 0, 0}, + {0xA9, 0x8c, 0x8c, 0, 0}, + {0xAA, 0x88, 0x88, 0, 0}, + {0xAB, 0x78, 0x78, 0, 0}, + {0xAC, 0x57, 0x57, 0, 0}, + {0xAD, 0x88, 0x88, 0, 0}, + {0xAE, 0, 0, 0, 0}, + {0xAF, 0x8, 0x8, 0, 0}, + {0xB0, 0x88, 0x88, 0, 0}, + {0xB1, 0, 0, 0, 0}, + {0xB2, 0x1b, 0x1b, 0, 0}, + {0xB3, 0x3, 0x3, 0, 0}, + {0xB4, 0x24, 0x24, 0, 0}, + {0xB5, 0x3, 0x3, 0, 0}, + {0xB6, 0x1b, 0x1b, 0, 0}, + {0xB7, 0x24, 0x24, 0, 0}, + {0xB8, 0x3, 0x3, 0, 0}, + {0xB9, 0, 0, 0, 0}, + {0xBA, 0xaa, 0xaa, 0, 0}, + {0xBB, 0, 0, 0, 0}, + {0xBC, 0x4, 0x4, 0, 0}, + {0xBD, 0, 0, 0, 0}, + {0xBE, 0x8, 0x8, 0, 0}, + {0xBF, 0x11, 0x11, 0, 0}, + {0xC0, 0, 0, 0, 0}, + {0xC1, 0, 0, 0, 0}, + {0xC2, 0x62, 0x62, 0, 0}, + {0xC3, 0x1e, 0x1e, 0, 0}, + {0xC4, 0x33, 0x33, 0, 0}, + {0xC5, 0x37, 0x37, 0, 0}, + {0xC6, 0, 0, 0, 0}, + {0xC7, 0x70, 0x70, 0, 0}, + {0xC8, 0x1e, 0x1e, 0, 0}, + {0xC9, 0x6, 0x6, 0, 0}, + {0xCA, 0x4, 0x4, 0, 0}, + {0xCB, 0x2f, 0x2f, 0, 0}, + {0xCC, 0xf, 0xf, 0, 0}, + {0xCD, 0, 0, 0, 0}, + {0xCE, 0xff, 0xff, 0, 0}, + {0xCF, 0x8, 0x8, 0, 0}, + {0xD0, 0x3f, 0x3f, 0, 0}, + {0xD1, 0x3f, 0x3f, 0, 0}, + {0xD2, 0x3f, 0x3f, 0, 0}, + {0xD3, 0, 0, 0, 0}, + {0xD4, 0, 0, 0, 0}, + {0xD5, 0, 0, 0, 0}, + {0xD6, 0xcc, 0xcc, 0, 0}, + {0xD7, 0, 0, 0, 0}, + {0xD8, 0x8, 0x8, 0, 0}, + {0xD9, 0x8, 0x8, 0, 0}, + {0xDA, 0x8, 0x8, 0, 0}, + {0xDB, 0x11, 0x11, 0, 0}, + {0xDC, 0, 0, 0, 0}, + {0xDD, 0x87, 0x87, 0, 0}, + {0xDE, 0x88, 0x88, 0, 0}, + {0xDF, 0x8, 0x8, 0, 0}, + {0xE0, 0x8, 0x8, 0, 0}, + {0xE1, 0x8, 0x8, 0, 0}, + {0xE2, 0, 0, 0, 0}, + {0xE3, 0, 0, 0, 0}, + {0xE4, 0, 0, 0, 0}, + {0xE5, 0xf5, 0xf5, 0, 0}, + {0xE6, 0x30, 0x30, 0, 0}, + {0xE7, 0x1, 0x1, 0, 0}, + {0xE8, 0, 0, 0, 0}, + {0xE9, 0xff, 0xff, 0, 0}, + {0xEA, 0, 0, 0, 0}, + {0xEB, 0, 0, 0, 0}, + {0xEC, 0x22, 0x22, 0, 0}, + {0xED, 0, 0, 0, 0}, + {0xEE, 0, 0, 0, 0}, + {0xEF, 0, 0, 0, 0}, + {0xF0, 0x3, 0x3, 0, 0}, + {0xF1, 0x1, 0x1, 0, 0}, + {0xF2, 0, 0, 0, 0}, + {0xF3, 0, 0, 0, 0}, + {0xF4, 0, 0, 0, 0}, + {0xF5, 0, 0, 0, 0}, + {0xF6, 0, 0, 0, 0}, + {0xF7, 0x6, 0x6, 0, 0}, + {0xF8, 0, 0, 0, 0}, + {0xF9, 0, 0, 0, 0}, + {0xFA, 0x40, 0x40, 0, 0}, + {0xFB, 0, 0, 0, 0}, + {0xFC, 0x1, 0x1, 0, 0}, + {0xFD, 0x80, 0x80, 0, 0}, + {0xFE, 0x2, 0x2, 0, 0}, + {0xFF, 0x10, 0x10, 0, 0}, + {0x100, 0x2, 0x2, 0, 0}, + {0x101, 0x1e, 0x1e, 0, 0}, + {0x102, 0x1e, 0x1e, 0, 0}, + {0x103, 0, 0, 0, 0}, + {0x104, 0x1f, 0x1f, 0, 0}, + {0x105, 0, 0x8, 0, 1}, + {0x106, 0x2a, 0x2a, 0, 0}, + {0x107, 0xf, 0xf, 0, 0}, + {0x108, 0, 0, 0, 0}, + {0x109, 0, 0, 0, 0}, + {0x10A, 0, 0, 0, 0}, + {0x10B, 0, 0, 0, 0}, + {0x10C, 0, 0, 0, 0}, + {0x10D, 0, 0, 0, 0}, + {0x10E, 0, 0, 0, 0}, + {0x10F, 0, 0, 0, 0}, + {0x110, 0, 0, 0, 0}, + {0x111, 0, 0, 0, 0}, + {0x112, 0, 0, 0, 0}, + {0x113, 0, 0, 0, 0}, + {0x114, 0, 0, 0, 0}, + {0x115, 0, 0, 0, 0}, + {0x116, 0, 0, 0, 0}, + {0x117, 0, 0, 0, 0}, + {0x118, 0, 0, 0, 0}, + {0x119, 0, 0, 0, 0}, + {0x11A, 0, 0, 0, 0}, + {0x11B, 0, 0, 0, 0}, + {0x11C, 0x1, 0x1, 0, 0}, + {0x11D, 0, 0, 0, 0}, + {0x11E, 0, 0, 0, 0}, + {0x11F, 0, 0, 0, 0}, + {0x120, 0, 0, 0, 0}, + {0x121, 0, 0, 0, 0}, + {0x122, 0x80, 0x80, 0, 0}, + {0x123, 0, 0, 0, 0}, + {0x124, 0xf8, 0xf8, 0, 0}, + {0x125, 0, 0, 0, 0}, + {0x126, 0, 0, 0, 0}, + {0x127, 0, 0, 0, 0}, + {0x128, 0, 0, 0, 0}, + {0x129, 0, 0, 0, 0}, + {0x12A, 0, 0, 0, 0}, + {0x12B, 0, 0, 0, 0}, + {0x12C, 0, 0, 0, 0}, + {0x12D, 0, 0, 0, 0}, + {0x12E, 0, 0, 0, 0}, + {0x12F, 0, 0, 0, 0}, + {0x130, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +#define LCNPHY_NUM_DIG_FILT_COEFFS 16 +#define LCNPHY_NUM_TX_DIG_FILTERS_CCK 13 + +u16 + LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK] + [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { + {0, 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778, 1582, 64, + 128, 64,}, + {1, 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608, 1863, 93, + 167, 93,}, + {2, 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192, 778, 1582, 64, + 128, 64,}, + {3, 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205, 754, 1760, + 170, 340, 170,}, + {20, 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205, 767, 1760, + 256, 185, 256,}, + {21, 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205, 767, 1760, + 256, 273, 256,}, + {22, 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205, 767, 1760, + 256, 352, 256,}, + {23, 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205, 767, 1760, + 128, 233, 128,}, + {24, 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766, 1760, 256, + 1881, 256,}, + {25, 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765, 1760, 256, + 1881, 256,}, + {26, 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614, 1864, 128, + 384, 288,}, + {27, 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576, 613, 1864, + 128, 384, 288,}, + {30, 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205, 754, 1760, + 170, 340, 170,}, +}; + +#define LCNPHY_NUM_TX_DIG_FILTERS_OFDM 3 +u16 + LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM] + [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { + {0, 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0, 0x0, + 0x278, 0xfea0, 0x80, 0x100, 0x80,}, + {1, 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50, + 750, 0xFE2B, 212, 0xFFCE, 212,}, + {2, 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748, + 0xFEF2, 128, 0xFFE2, 128} +}; + +#define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \ + mod_phy_reg(pi, 0x4a4, \ + (0x1ff << 0), \ + (u16)(idx) << 0) + +#define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \ + mod_phy_reg(pi, 0x4a5, \ + (0x7 << 8), \ + (u16)(npt) << 8) + +#define wlc_lcnphy_get_tx_pwr_ctrl(pi) \ + (read_phy_reg((pi), 0x4a4) & \ + ((0x1 << 15) | \ + (0x1 << 14) | \ + (0x1 << 13))) + +#define wlc_lcnphy_get_tx_pwr_npt(pi) \ + ((read_phy_reg(pi, 0x4a5) & \ + (0x7 << 8)) >> \ + 8) + +#define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \ + (read_phy_reg(pi, 0x473) & 0x1ff) + +#define wlc_lcnphy_get_target_tx_pwr(pi) \ + ((read_phy_reg(pi, 0x4a7) & \ + (0xff << 0)) >> \ + 0) + +#define wlc_lcnphy_set_target_tx_pwr(pi, target) \ + mod_phy_reg(pi, 0x4a7, \ + (0xff << 0), \ + (u16)(target) << 0) + +#define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20)) +#define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000)) + +#define LCNPHY_IQLOCC_READ(val) ((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f))) +#define FIXED_TXPWR 78 +#define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val)) + +static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor, + u8 precision); +static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, + u16 ext_lna, u16 trsw, + u16 biq2, u16 biq1, + u16 tia, u16 lna2, + u16 lna1); +static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi); +static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain); +static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx); +static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0); +static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi); +static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains); +static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable); +static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi); +static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable); +static void wlc_lcnphy_set_tx_gain(phy_info_t *pi, + lcnphy_txgains_t *target_gains); +static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, u16 num_samps, + u8 wait_time, lcnphy_iq_est_t *iq_est); +static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps); +static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi); +static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode); +extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi); +static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, + u8 channel); + +static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi, + const lcnphy_tx_gain_tbl_entry *g); + +static void wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, + u16 thresh, s16 *ptr, int mode); +static int wlc_lcnphy_calc_floor(s16 coeff, int type); +static void wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, + u16 *values_to_save); +static void wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, + u16 *values_to_save); +static void wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, + s16 coeff_y); +static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type); +static void wlc_lcnphy_a1(phy_info_t *pi, int cal_type, + int num_levels, int step_size_lg2); +static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi); + +static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, + chanspec_t chanspec); +static void wlc_lcnphy_agc_temp_init(phy_info_t *pi); +static void wlc_lcnphy_temp_adj(phy_info_t *pi); +static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi); +static void wlc_lcnphy_baseband_init(phy_info_t *pi); +static void wlc_lcnphy_radio_init(phy_info_t *pi); +static void wlc_lcnphy_rc_cal(phy_info_t *pi); +static void wlc_lcnphy_rcal(phy_info_t *pi); +static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable); +static int wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, + s16 filt_type); +static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b); + +void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti) +{ + wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456); +} + +void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti) +{ + wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456); +} + +static void +wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id, + const void *tbl_ptr, u32 tbl_len, + u32 tbl_width, u32 tbl_offset) +{ + phytbl_info_t tab; + tab.tbl_id = tbl_id; + tab.tbl_ptr = tbl_ptr; + tab.tbl_len = tbl_len; + tab.tbl_width = tbl_width; + tab.tbl_offset = tbl_offset; + wlc_lcnphy_read_table(pi, &tab); +} + +static void +wlc_lcnphy_common_write_table(phy_info_t *pi, u32 tbl_id, + const void *tbl_ptr, u32 tbl_len, + u32 tbl_width, u32 tbl_offset) +{ + + phytbl_info_t tab; + tab.tbl_id = tbl_id; + tab.tbl_ptr = tbl_ptr; + tab.tbl_len = tbl_len; + tab.tbl_width = tbl_width; + tab.tbl_offset = tbl_offset; + wlc_lcnphy_write_table(pi, &tab); +} + +static u32 +wlc_lcnphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision) +{ + u32 quotient, remainder, roundup, rbit; + + quotient = dividend / divisor; + remainder = dividend % divisor; + rbit = divisor & 1; + roundup = (divisor >> 1) + rbit; + + while (precision--) { + quotient <<= 1; + if (remainder >= roundup) { + quotient++; + remainder = ((remainder - roundup) << 1) + rbit; + } else { + remainder <<= 1; + } + } + + if (remainder >= roundup) + quotient++; + + return quotient; +} + +static int wlc_lcnphy_calc_floor(s16 coeff_x, int type) +{ + int k; + k = 0; + if (type == 0) { + if (coeff_x < 0) { + k = (coeff_x - 1) / 2; + } else { + k = coeff_x / 2; + } + } + if (type == 1) { + if ((coeff_x + 1) < 0) + k = (coeff_x) / 2; + else + k = (coeff_x + 1) / 2; + } + return k; +} + +s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi) +{ + s8 index; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (txpwrctrl_off(pi)) + index = pi_lcn->lcnphy_current_index; + else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) + index = + (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) + / 2); + else + index = pi_lcn->lcnphy_current_index; + return index; +} + +static u32 wlc_lcnphy_measure_digital_power(phy_info_t *pi, u16 nsamples) +{ + lcnphy_iq_est_t iq_est = { 0, 0, 0 }; + + if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est)) + return 0; + return (iq_est.i_pwr + iq_est.q_pwr) / nsamples; +} + +void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel) +{ + u16 afectrlovr, afectrlovrval; + afectrlovr = read_phy_reg(pi, 0x43b); + afectrlovrval = read_phy_reg(pi, 0x43c); + if (channel != 0) { + mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1); + + mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1); + + mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4); + + mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6); + + write_phy_reg(pi, 0x44b, 0xffff); + wlc_lcnphy_tx_pu(pi, 1); + + mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8); + + or_phy_reg(pi, 0x6da, 0x0080); + + or_phy_reg(pi, 0x00a, 0x228); + } else { + and_phy_reg(pi, 0x00a, ~(0x228)); + + and_phy_reg(pi, 0x6da, 0xFF7F); + write_phy_reg(pi, 0x43b, afectrlovr); + write_phy_reg(pi, 0x43c, afectrlovrval); + } +} + +static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi) +{ + u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr; + + save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c); + save_AfeCtrlOvr = read_phy_reg(pi, 0x43b); + + write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1); + write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1); + + write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe); + write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe); + + write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal); + write_phy_reg(pi, 0x43b, save_AfeCtrlOvr); +} + +static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable) +{ + if (enable) { + write_phy_reg(pi, 0x942, 0x7); + write_phy_reg(pi, 0x93b, ((1 << 13) + 23)); + write_phy_reg(pi, 0x93c, ((1 << 13) + 1989)); + + write_phy_reg(pi, 0x44a, 0x084); + write_phy_reg(pi, 0x44a, 0x080); + write_phy_reg(pi, 0x6d3, 0x2222); + write_phy_reg(pi, 0x6d3, 0x2220); + } else { + write_phy_reg(pi, 0x942, 0x0); + write_phy_reg(pi, 0x93b, ((0 << 13) + 23)); + write_phy_reg(pi, 0x93c, ((0 << 13) + 1989)); + } + wlapi_switch_macfreq(pi->sh->physhim, enable); +} + +void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) +{ + u8 channel = CHSPEC_CHANNEL(chanspec); + + wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); + + wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec); + + or_phy_reg(pi, 0x44a, 0x44); + write_phy_reg(pi, 0x44a, 0x80); + + if (!NORADIO_ENAB(pi->pubpi)) { + wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel); + udelay(1000); + } + + wlc_lcnphy_toggle_afe_pwdn(pi); + + write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20); + write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor); + + if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { + mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); + + wlc_lcnphy_load_tx_iir_filter(pi, false, 3); + } else { + mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); + + wlc_lcnphy_load_tx_iir_filter(pi, false, 2); + } + + wlc_lcnphy_load_tx_iir_filter(pi, true, 0); + + mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3); + +} + +static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain) +{ + u16 dac_ctrl; + + dac_ctrl = (read_phy_reg(pi, 0x439) >> 0); + dac_ctrl = dac_ctrl & 0xc7f; + dac_ctrl = dac_ctrl | (dac_gain << 7); + mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0); + +} + +static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable) +{ + u16 bit = bEnable ? 1 : 0; + + mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7); + + mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14); + + mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6); +} + +static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi) +{ + u16 pa_gain; + + pa_gain = (read_phy_reg(pi, 0x4fb) & + LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >> + LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT; + + return pa_gain; +} + +static void +wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains) +{ + u16 pa_gain = wlc_lcnphy_get_pa_gain(pi); + + mod_phy_reg(pi, 0x4b5, + (0xffff << 0), + ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) << + 0); + mod_phy_reg(pi, 0x4fb, + (0x7fff << 0), + ((target_gains->pad_gain) | (pa_gain << 8)) << 0); + + mod_phy_reg(pi, 0x4fc, + (0xffff << 0), + ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) << + 0); + mod_phy_reg(pi, 0x4fd, + (0x7fff << 0), + ((target_gains->pad_gain) | (pa_gain << 8)) << 0); + + wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain); + + wlc_lcnphy_enable_tx_gain_override(pi); +} + +static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0) +{ + u16 m0m1 = (u16) m0 << 8; + phytbl_info_t tab; + + tab.tbl_ptr = &m0m1; + tab.tbl_len = 1; + tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; + tab.tbl_offset = 87; + tab.tbl_width = 16; + wlc_lcnphy_write_table(pi, &tab); +} + +static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi) +{ + u32 data_buf[64]; + phytbl_info_t tab; + + memset(data_buf, 0, sizeof(data_buf)); + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_ptr = data_buf; + + if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { + + tab.tbl_len = 30; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; + wlc_lcnphy_write_table(pi, &tab); + } + + tab.tbl_len = 64; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET; + wlc_lcnphy_write_table(pi, &tab); +} + +typedef enum { + LCNPHY_TSSI_PRE_PA, + LCNPHY_TSSI_POST_PA, + LCNPHY_TSSI_EXT +} lcnphy_tssi_mode_t; + +static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos) +{ + mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0); + + mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6); + + if (LCNPHY_TSSI_POST_PA == pos) { + mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); + } else { + mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1); + mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); + } + } else { + mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2); + + mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); + } else { + mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); + mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); + } + } + mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14); + + if (LCNPHY_TSSI_EXT == pos) { + write_radio_reg(pi, RADIO_2064_REG07F, 1); + mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2); + mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7); + mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3); + } +} + +static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi) +{ + u16 N1, N2, N3, N4, N5, N6, N; + N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0)) + >> 0); + N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12)) + >> 12); + N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0)) + >> 0); + N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8)) + >> 8); + N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0)) + >> 0); + N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8)) + >> 8); + N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80; + if (N < 1600) + N = 1600; + return N; +} + +static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi) +{ + u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + auxpga_vmid = + (2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf; + auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4; + auxpga_gain_temp = 2; + + mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1); + + mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3); + + mod_phy_reg(pi, 0x4db, + (0x3ff << 0) | + (0x7 << 12), + (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); + + mod_phy_reg(pi, 0x4dc, + (0x3ff << 0) | + (0x7 << 12), + (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); + + mod_phy_reg(pi, 0x40a, + (0x3ff << 0) | + (0x7 << 12), + (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); + + mod_phy_reg(pi, 0x40b, + (0x3ff << 0) | + (0x7 << 12), + (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12)); + + mod_phy_reg(pi, 0x40c, + (0x3ff << 0) | + (0x7 << 12), + (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12)); + + mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5)); +} + +static void wlc_lcnphy_tssi_setup(phy_info_t *pi) +{ + phytbl_info_t tab; + u32 rfseq, ind; + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_ptr = &ind; + tab.tbl_len = 1; + tab.tbl_offset = 0; + for (ind = 0; ind < 128; ind++) { + wlc_lcnphy_write_table(pi, &tab); + tab.tbl_offset++; + } + tab.tbl_offset = 704; + for (ind = 0; ind < 128; ind++) { + wlc_lcnphy_write_table(pi, &tab); + tab.tbl_offset++; + } + mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4); + + wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT); + mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); + + mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15); + + mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); + + mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0); + + mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); + + mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); + + mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); + + mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); + + mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8); + + mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); + + mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8); + + mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6); + + mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0); + + wlc_lcnphy_clear_tx_power_offsets(pi); + + mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); + + mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0); + + mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe); + mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); + } else { + mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); + mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3); + } + + write_radio_reg(pi, RADIO_2064_REG025, 0xc); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); + } else { + if (CHSPEC_IS2G(pi->radio_chanspec)) + mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); + else + mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1); + } + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) + mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); + else + mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2); + + mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0); + + mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3); + + if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { + mod_phy_reg(pi, 0x4d7, + (0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12); + } + + rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); + tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; + tab.tbl_width = 16; + tab.tbl_ptr = &rfseq; + tab.tbl_len = 1; + tab.tbl_offset = 6; + wlc_lcnphy_write_table(pi, &tab); + + mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); + + mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8); + + wlc_lcnphy_pwrctrl_rssiparams(pi); +} + +void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi) +{ + u16 tx_cnt, tx_total, npt; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + tx_total = wlc_lcnphy_total_tx_frames(pi); + tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt; + npt = wlc_lcnphy_get_tx_pwr_npt(pi); + + if (tx_cnt > (1 << npt)) { + + pi_lcn->lcnphy_tssi_tx_cnt = tx_total; + + pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi); + pi_lcn->lcnphy_tssi_npt = npt; + + } +} + +s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1) +{ + s32 a, b, p; + + a = 32768 + (a1 * tssi); + b = (1024 * b0) + (64 * b1 * tssi); + p = ((2 * b) + a) / (2 * a); + + return p; +} + +static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi) +{ + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) + return; + + pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313; + pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT; +} + +void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi) +{ + phytbl_info_t tab; + u32 rate_table[WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM + + WLC_NUM_RATES_MCS_1_STREAM]; + uint i, j; + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) + return; + + for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) { + + if (i == WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM) + j = TXP_FIRST_MCS_20_SISO; + + rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); + } + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_len = ARRAY_SIZE(rate_table); + tab.tbl_ptr = rate_table; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; + wlc_lcnphy_write_table(pi, &tab); + + if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) { + wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min); + + wlc_lcnphy_txpower_reset_npt(pi); + } +} + +static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index) +{ + u32 cck_offset[4] = { 22, 22, 22, 22 }; + u32 ofdm_offset, reg_offset_cck; + int i; + u16 index2; + phytbl_info_t tab; + + if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) + return; + + mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); + + mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14); + + or_phy_reg(pi, 0x6da, 0x0040); + + reg_offset_cck = 0; + for (i = 0; i < 4; i++) + cck_offset[i] -= reg_offset_cck; + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_len = 4; + tab.tbl_ptr = cck_offset; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; + wlc_lcnphy_write_table(pi, &tab); + ofdm_offset = 0; + tab.tbl_len = 1; + tab.tbl_ptr = &ofdm_offset; + for (i = 836; i < 862; i++) { + tab.tbl_offset = i; + wlc_lcnphy_write_table(pi, &tab); + } + + mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15); + + mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); + + mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13); + + mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7); + + mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6); + + mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15); + + index2 = (u16) (index * 2); + mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); + + mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4); + +} + +static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi) +{ + s8 index, delta_brd, delta_temp, new_index, tempcorrx; + s16 manp, meas_temp, temp_diff; + bool neg = 0; + u16 temp; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) + return pi_lcn->lcnphy_current_index; + + index = FIXED_TXPWR; + + if (NORADIO_ENAB(pi->pubpi)) + return index; + + if (pi_lcn->lcnphy_tempsense_slope == 0) { + return index; + } + temp = (u16) wlc_lcnphy_tempsense(pi, 0); + meas_temp = LCNPHY_TEMPSENSE(temp); + + if (pi->tx_power_min != 0) { + delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min); + } else { + delta_brd = 0; + } + + manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense); + temp_diff = manp - meas_temp; + if (temp_diff < 0) { + + neg = 1; + + temp_diff = -temp_diff; + } + + delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192), + (u32) (pi_lcn-> + lcnphy_tempsense_slope + * 10), 0); + if (neg) + delta_temp = -delta_temp; + + if (pi_lcn->lcnphy_tempsense_option == 3 + && LCNREV_IS(pi->pubpi.phy_rev, 0)) + delta_temp = 0; + if (pi_lcn->lcnphy_tempcorrx > 31) + tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64); + else + tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx; + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) + tempcorrx = 4; + new_index = + index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr; + new_index += tempcorrx; + + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) + index = 127; + if (new_index < 0 || new_index > 126) { + return index; + } + return new_index; +} + +static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode) +{ + + u16 current_mode = mode; + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && + mode == LCNPHY_TX_PWR_CTRL_HW) + current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED; + if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && + mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) + current_mode = LCNPHY_TX_PWR_CTRL_HW; + return current_mode; +} + +void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode) +{ + u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi); + s8 index; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode); + old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode); + + mod_phy_reg(pi, 0x6da, (0x1 << 6), + ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6); + + mod_phy_reg(pi, 0x6a3, (0x1 << 4), + ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4); + + if (old_mode != mode) { + if (LCNPHY_TX_PWR_CTRL_HW == old_mode) { + + wlc_lcnphy_tx_pwr_update_npt(pi); + + wlc_lcnphy_clear_tx_power_offsets(pi); + } + if (LCNPHY_TX_PWR_CTRL_HW == mode) { + + wlc_lcnphy_txpower_recalc_target(pi); + + wlc_lcnphy_set_start_tx_pwr_idx(pi, + pi_lcn-> + lcnphy_tssi_idx); + wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt); + mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0); + + pi_lcn->lcnphy_tssi_tx_cnt = + wlc_lcnphy_total_tx_frames(pi); + + wlc_lcnphy_disable_tx_gain_override(pi); + pi_lcn->lcnphy_tx_power_idx_override = -1; + } else + wlc_lcnphy_enable_tx_gain_override(pi); + + mod_phy_reg(pi, 0x4a4, + ((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode); + if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) { + index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); + wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index); + pi_lcn->lcnphy_current_index = (s8) + ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2); + } + } +} + +static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi) +{ + uint delay_count = 0; + + while (wlc_lcnphy_iqcal_active(pi)) { + udelay(100); + delay_count++; + + if (delay_count > (10 * 500)) + break; + } + + return (0 == wlc_lcnphy_iqcal_active(pi)); +} + +static void +wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, + lcnphy_txgains_t *target_gains, + lcnphy_cal_mode_t cal_mode, bool keep_tone) +{ + + lcnphy_txgains_t cal_gains, temp_gains; + u16 hash; + u8 band_idx; + int j; + u16 ncorr_override[5]; + u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 + }; + + u16 commands_fullcal[] = { + 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 }; + + u16 commands_recal[] = { + 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 }; + + u16 command_nums_fullcal[] = { + 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 }; + + u16 command_nums_recal[] = { + 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 }; + u16 *command_nums = command_nums_fullcal; + + u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start; + u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2; + u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl; + bool tx_gain_override_old; + lcnphy_txgains_t old_gains; + uint i, n_cal_cmds = 0, n_cal_start = 0; + u16 *values_to_save; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + values_to_save = kmalloc(sizeof(u16) * 20, GFP_ATOMIC); + if (NULL == values_to_save) { + return; + } + + save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); + save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); + + or_phy_reg(pi, 0x6da, 0x40); + or_phy_reg(pi, 0x6db, 0x3); + + switch (cal_mode) { + case LCNPHY_CAL_FULL: + start_coeffs = syst_coeffs; + cal_cmds = commands_fullcal; + n_cal_cmds = ARRAY_SIZE(commands_fullcal); + break; + + case LCNPHY_CAL_RECAL: + start_coeffs = syst_coeffs; + cal_cmds = commands_recal; + n_cal_cmds = ARRAY_SIZE(commands_recal); + command_nums = command_nums_recal; + break; + + default: + break; + } + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + start_coeffs, 11, 16, 64); + + write_phy_reg(pi, 0x6da, 0xffff); + mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3); + + tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi); + + mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + + save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db); + + mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0); + + mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12); + + wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save); + + tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); + if (tx_gain_override_old) + wlc_lcnphy_get_tx_gain(pi, &old_gains); + + if (!target_gains) { + if (!tx_gain_override_old) + wlc_lcnphy_set_tx_pwr_by_index(pi, + pi_lcn->lcnphy_tssi_idx); + wlc_lcnphy_get_tx_gain(pi, &temp_gains); + target_gains = &temp_gains; + } + + hash = (target_gains->gm_gain << 8) | + (target_gains->pga_gain << 4) | (target_gains->pad_gain); + + band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); + + cal_gains = *target_gains; + memset(ncorr_override, 0, sizeof(ncorr_override)); + for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) { + if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) { + cal_gains.gm_gain = + tbl_iqcal_gainparams_lcnphy[band_idx][j][1]; + cal_gains.pga_gain = + tbl_iqcal_gainparams_lcnphy[band_idx][j][2]; + cal_gains.pad_gain = + tbl_iqcal_gainparams_lcnphy[band_idx][j][3]; + memcpy(ncorr_override, + &tbl_iqcal_gainparams_lcnphy[band_idx][j][3], + sizeof(ncorr_override)); + break; + } + } + + wlc_lcnphy_set_tx_gain(pi, &cal_gains); + + write_phy_reg(pi, 0x453, 0xaa9); + write_phy_reg(pi, 0x93d, 0xc0); + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + (const void *) + lcnphy_iqcal_loft_gainladder, + ARRAY_SIZE(lcnphy_iqcal_loft_gainladder), + 16, 0); + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + (const void *)lcnphy_iqcal_ir_gainladder, + ARRAY_SIZE(lcnphy_iqcal_ir_gainladder), 16, + 32); + + if (pi->phy_tx_tone_freq) { + + wlc_lcnphy_stop_tx_tone(pi); + udelay(5); + wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); + } else { + wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); + } + + write_phy_reg(pi, 0x6da, 0xffff); + + for (i = n_cal_start; i < n_cal_cmds; i++) { + u16 zero_diq = 0; + u16 best_coeffs[11]; + u16 command_num; + + cal_type = (cal_cmds[i] & 0x0f00) >> 8; + + command_num = command_nums[i]; + if (ncorr_override[cal_type]) + command_num = + ncorr_override[cal_type] << 8 | (command_num & + 0xff); + + write_phy_reg(pi, 0x452, command_num); + + if ((cal_type == 3) || (cal_type == 4)) { + + wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, + &diq_start, 1, 16, 69); + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + &zero_diq, 1, 16, 69); + } + + write_phy_reg(pi, 0x451, cal_cmds[i]); + + if (!wlc_lcnphy_iqcal_wait(pi)) { + + goto cleanup; + } + + wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, + best_coeffs, + ARRAY_SIZE(best_coeffs), 16, 96); + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + best_coeffs, + ARRAY_SIZE(best_coeffs), 16, 64); + + if ((cal_type == 3) || (cal_type == 4)) { + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + &diq_start, 1, 16, 69); + } + wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, + pi_lcn->lcnphy_cal_results. + txiqlocal_bestcoeffs, + ARRAY_SIZE(pi_lcn-> + lcnphy_cal_results. + txiqlocal_bestcoeffs), + 16, 96); + } + + wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, + pi_lcn->lcnphy_cal_results. + txiqlocal_bestcoeffs, + ARRAY_SIZE(pi_lcn->lcnphy_cal_results. + txiqlocal_bestcoeffs), 16, 96); + pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true; + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + &pi_lcn->lcnphy_cal_results. + txiqlocal_bestcoeffs[0], 4, 16, 80); + + wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, + &pi_lcn->lcnphy_cal_results. + txiqlocal_bestcoeffs[5], 2, 16, 85); + + cleanup: + wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save); + kfree(values_to_save); + + if (!keep_tone) + wlc_lcnphy_stop_tx_tone(pi); + + write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2); + + write_phy_reg(pi, 0x453, 0); + + if (tx_gain_override_old) + wlc_lcnphy_set_tx_gain(pi, &old_gains); + wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old); + + write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl); + write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl); + +} + +static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) +{ + bool suspend, tx_gain_override_old; + lcnphy_txgains_t old_gains; + phy_info_t *pi = (phy_info_t *) ppi; + u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB, + idleTssi0_regvalue_2C; + u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112); + u16 SAVE_jtag_bb_afe_switch = + read_radio_reg(pi, RADIO_2064_REG007) & 1; + u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10; + u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4; + idleTssi = read_phy_reg(pi, 0x4ab); + suspend = + (0 == + (R_REG(&((phy_info_t *) pi)->regs->maccontrol) & + MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + + tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); + wlc_lcnphy_get_tx_gain(pi, &old_gains); + + wlc_lcnphy_enable_tx_gain_override(pi); + wlc_lcnphy_set_tx_pwr_by_index(pi, 127); + write_radio_reg(pi, RADIO_2064_REG112, 0x6); + mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1); + mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4); + mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2); + wlc_lcnphy_tssi_setup(pi); + wlc_phy_do_dummy_tx(pi, true, OFF); + idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) + >> 0); + + idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0)) + >> 0); + + if (idleTssi0_2C >= 256) + idleTssi0_OB = idleTssi0_2C - 256; + else + idleTssi0_OB = idleTssi0_2C + 256; + + idleTssi0_regvalue_OB = idleTssi0_OB; + if (idleTssi0_regvalue_OB >= 256) + idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256; + else + idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256; + mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0); + + mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12); + + wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old); + wlc_lcnphy_set_tx_gain(pi, &old_gains); + wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); + + write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain); + mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch); + mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga); + mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en); + mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7); + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); +} + +static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) +{ + bool suspend; + u16 save_txpwrCtrlEn; + u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain; + u16 auxpga_vmid; + phytbl_info_t tab; + u32 val; + u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025, + save_reg112; + u16 values_to_save[14]; + s8 index; + int i; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + udelay(999); + + save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007); + save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF); + save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F); + save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005); + save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025); + save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112); + + for (i = 0; i < 14; i++) + values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]); + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + index = pi_lcn->lcnphy_current_index; + wlc_lcnphy_set_tx_pwr_by_index(pi, 127); + mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1); + mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4); + mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2); + mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); + + mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15); + + mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); + + mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); + + mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); + + mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); + + mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); + + mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8); + + mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); + + mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8); + + mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4); + + mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8); + + mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12); + + mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12); + + mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13); + + mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); + + write_radio_reg(pi, RADIO_2064_REG025, 0xC); + + mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3); + + mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); + + mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); + + val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); + tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; + tab.tbl_width = 16; + tab.tbl_len = 1; + tab.tbl_ptr = &val; + tab.tbl_offset = 6; + wlc_lcnphy_write_table(pi, &tab); + if (mode == TEMPSENSE) { + mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); + + mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12); + + auxpga_vmidcourse = 8; + auxpga_vmidfine = 0x4; + auxpga_gain = 2; + mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5); + } else { + mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); + + mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12); + + auxpga_vmidcourse = 7; + auxpga_vmidfine = 0xa; + auxpga_gain = 2; + } + auxpga_vmid = + (u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine); + mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2); + + mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1); + + mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12); + + mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5); + + write_radio_reg(pi, RADIO_2064_REG112, 0x6); + + wlc_phy_do_dummy_tx(pi, true, OFF); + if (!tempsense_done(pi)) + udelay(10); + + write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007); + write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF); + write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F); + write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005); + write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025); + write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112); + for (i = 0; i < 14; i++) + write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]); + wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index); + + write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn); + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + udelay(999); +} + +void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) +{ + lcnphy_txgains_t tx_gains; + u8 bbmult; + phytbl_info_t tab; + s32 a1, b0, b1; + s32 tssi, pwr, maxtargetpwr, mintargetpwr; + bool suspend; + phy_info_t *pi = (phy_info_t *) ppi; + + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + if (NORADIO_ENAB(pi->pubpi)) { + wlc_lcnphy_set_bbmult(pi, 0x30); + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + return; + } + + if (!pi->hwpwrctrl_capable) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + tx_gains.gm_gain = 4; + tx_gains.pga_gain = 12; + tx_gains.pad_gain = 12; + tx_gains.dac_gain = 0; + + bbmult = 150; + } else { + tx_gains.gm_gain = 7; + tx_gains.pga_gain = 15; + tx_gains.pad_gain = 14; + tx_gains.dac_gain = 0; + + bbmult = 150; + } + wlc_lcnphy_set_tx_gain(pi, &tx_gains); + wlc_lcnphy_set_bbmult(pi, bbmult); + wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); + } else { + + wlc_lcnphy_idle_tssi_est(ppi); + + wlc_lcnphy_clear_tx_power_offsets(pi); + + b0 = pi->txpa_2g[0]; + b1 = pi->txpa_2g[1]; + a1 = pi->txpa_2g[2]; + maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1); + mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1); + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_ptr = &pwr; + tab.tbl_len = 1; + tab.tbl_offset = 0; + for (tssi = 0; tssi < 128; tssi++) { + pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1); + + pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr; + wlc_lcnphy_write_table(pi, &tab); + tab.tbl_offset++; + } + + mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7); + + write_phy_reg(pi, 0x4a8, 10); + + wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); + } + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); +} + +static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi) +{ + u16 m0m1; + phytbl_info_t tab; + + tab.tbl_ptr = &m0m1; + tab.tbl_len = 1; + tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; + tab.tbl_offset = 87; + tab.tbl_width = 16; + wlc_lcnphy_read_table(pi, &tab); + + return (u8) ((m0m1 & 0xff00) >> 8); +} + +static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain) +{ + mod_phy_reg(pi, 0x4fb, + LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK, + gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT); + mod_phy_reg(pi, 0x4fd, + LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK, + gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT); +} + +void +wlc_lcnphy_get_radio_loft(phy_info_t *pi, + u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0) +{ + *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089)); + *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A)); + *fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B)); + *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C)); +} + +static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains) +{ + u16 dac_gain; + + dac_gain = read_phy_reg(pi, 0x439) >> 0; + gains->dac_gain = (dac_gain & 0x380) >> 7; + + { + u16 rfgain0, rfgain1; + + rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0; + rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0; + + gains->gm_gain = rfgain0 & 0xff; + gains->pga_gain = (rfgain0 >> 8) & 0xff; + gains->pad_gain = rfgain1 & 0xff; + } +} + +void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b) +{ + phytbl_info_t tab; + u16 iqcc[2]; + + iqcc[0] = a; + iqcc[1] = b; + + tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; + tab.tbl_width = 16; + tab.tbl_ptr = iqcc; + tab.tbl_len = 2; + tab.tbl_offset = 80; + wlc_lcnphy_write_table(pi, &tab); +} + +void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq) +{ + phytbl_info_t tab; + + tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; + tab.tbl_width = 16; + tab.tbl_ptr = &didq; + tab.tbl_len = 1; + tab.tbl_offset = 85; + wlc_lcnphy_write_table(pi, &tab); +} + +void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) +{ + phytbl_info_t tab; + u16 a, b; + u8 bb_mult; + u32 bbmultiqcomp, txgain, locoeffs, rfpower; + lcnphy_txgains_t gains; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + pi_lcn->lcnphy_tx_power_idx_override = (s8) index; + pi_lcn->lcnphy_current_index = (u8) index; + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_len = 1; + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index; + tab.tbl_ptr = &bbmultiqcomp; + wlc_lcnphy_read_table(pi, &tab); + + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index; + tab.tbl_width = 32; + tab.tbl_ptr = &txgain; + wlc_lcnphy_read_table(pi, &tab); + + gains.gm_gain = (u16) (txgain & 0xff); + gains.pga_gain = (u16) (txgain >> 8) & 0xff; + gains.pad_gain = (u16) (txgain >> 16) & 0xff; + gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07; + wlc_lcnphy_set_tx_gain(pi, &gains); + wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f); + + bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff); + wlc_lcnphy_set_bbmult(pi, bb_mult); + + wlc_lcnphy_enable_tx_gain_override(pi); + + if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { + + a = (u16) ((bbmultiqcomp >> 10) & 0x3ff); + b = (u16) (bbmultiqcomp & 0x3ff); + wlc_lcnphy_set_tx_iqcc(pi, a, b); + + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index; + tab.tbl_ptr = &locoeffs; + wlc_lcnphy_read_table(pi, &tab); + + wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs); + + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index; + tab.tbl_ptr = &rfpower; + wlc_lcnphy_read_table(pi, &tab); + mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0); + + } +} + +static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx) +{ + + mod_phy_reg(pi, 0x44d, + (0x1 << 1) | + (0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0)); + + or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0)); +} + +static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi) +{ + u32 j; + phytbl_info_t tab; + u32 temp_offset[128]; + tab.tbl_ptr = temp_offset; + tab.tbl_len = 128; + tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL; + tab.tbl_width = 32; + tab.tbl_offset = 0; + + memset(temp_offset, 0, sizeof(temp_offset)); + for (j = 1; j < 128; j += 2) + temp_offset[j] = 0x80000; + + wlc_lcnphy_write_table(pi, &tab); + return; +} + +static void +wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, + u16 trsw, + u16 ext_lna, + u16 biq2, + u16 biq1, + u16 tia, u16 lna2, u16 lna1) +{ + u16 gain0_15, gain16_19; + + gain16_19 = biq2 & 0xf; + gain0_15 = ((biq1 & 0xf) << 12) | + ((tia & 0xf) << 8) | + ((lna2 & 0x3) << 6) | + ((lna2 & 0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0); + + mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); + mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); + mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); + + if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { + mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); + mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); + } else { + mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10); + + mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15); + + mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); + } + + mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0); + +} + +static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable) +{ + u16 ebit = enable ? 1 : 0; + + mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8); + + mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0); + + if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { + mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4); + mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6); + mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); + mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6); + } else { + mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12); + mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13); + mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10); + mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3); + } +} + +void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable) +{ + if (!bEnable) { + + and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4))); + + mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1); + + and_phy_reg(pi, 0x44c, + ~(u16) ((0x1 << 3) | + (0x1 << 5) | + (0x1 << 12) | + (0x1 << 0) | (0x1 << 1) | (0x1 << 2))); + + and_phy_reg(pi, 0x44d, + ~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14))); + mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2); + + mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0)); + + and_phy_reg(pi, 0x4f9, + ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); + + and_phy_reg(pi, 0x4fa, + ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); + } else { + + mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); + + mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4); + mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6); + + mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); + mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); + + wlc_lcnphy_set_trsw_override(pi, true, false); + + mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2); + mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + + mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); + mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3); + + mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); + mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5); + + mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1); + + mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); + mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2); + + mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0); + } else { + + mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); + mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3); + + mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); + mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5); + + mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1); + + mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); + mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2); + + mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); + } + } +} + +static void +wlc_lcnphy_run_samples(phy_info_t *pi, + u16 num_samps, + u16 num_loops, u16 wait, bool iqcalmode) +{ + + or_phy_reg(pi, 0x6da, 0x8080); + + mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0); + if (num_loops != 0xffff) + num_loops--; + mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0); + + mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0); + + if (iqcalmode) { + + and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15)); + or_phy_reg(pi, 0x453, (0x1 << 15)); + } else { + write_phy_reg(pi, 0x63f, 1); + wlc_lcnphy_tx_pu(pi, 1); + } + + or_radio_reg(pi, RADIO_2064_REG112, 0x6); +} + +void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode) +{ + + u8 phybw40; + phybw40 = CHSPEC_IS40(pi->radio_chanspec); + + if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { + mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5); + mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9); + } else { + mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5); + mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9); + } + + if (phybw40 == 0) { + mod_phy_reg((pi), 0x410, + (0x1 << 6) | + (0x1 << 5), + ((CHSPEC_IS2G(pi->radio_chanspec)) ? (!mode) : 0) << + 6 | (!mode) << 5); + mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7); + } +} + +void +wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, + bool iqcalmode) +{ + u8 phy_bw; + u16 num_samps, t, k; + u32 bw; + fixed theta = 0, rot = 0; + cs32 tone_samp; + u32 data_buf[64]; + u16 i_samp, q_samp; + phytbl_info_t tab; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + pi->phy_tx_tone_freq = f_kHz; + + wlc_lcnphy_deaf_mode(pi, true); + + phy_bw = 40; + if (pi_lcn->lcnphy_spurmod) { + write_phy_reg(pi, 0x942, 0x2); + write_phy_reg(pi, 0x93b, 0x0); + write_phy_reg(pi, 0x93c, 0x0); + wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); + } + + if (f_kHz) { + k = 1; + do { + bw = phy_bw * 1000 * k; + num_samps = bw / ABS(f_kHz); + k++; + } while ((num_samps * (u32) (ABS(f_kHz))) != bw); + } else + num_samps = 2; + + rot = FIXED((f_kHz * 36) / phy_bw) / 100; + theta = 0; + + for (t = 0; t < num_samps; t++) { + + wlc_phy_cordic(theta, &tone_samp); + + theta += rot; + + i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff); + q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff); + data_buf[t] = (i_samp << 10) | q_samp; + } + + mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0); + + mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3); + + tab.tbl_ptr = data_buf; + tab.tbl_len = num_samps; + tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY; + tab.tbl_offset = 0; + tab.tbl_width = 32; + wlc_lcnphy_write_table(pi, &tab); + + wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode); +} + +void wlc_lcnphy_stop_tx_tone(phy_info_t *pi) +{ + s16 playback_status; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + pi->phy_tx_tone_freq = 0; + if (pi_lcn->lcnphy_spurmod) { + write_phy_reg(pi, 0x942, 0x7); + write_phy_reg(pi, 0x93b, 0x2017); + write_phy_reg(pi, 0x93c, 0x27c5); + wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); + } + + playback_status = read_phy_reg(pi, 0x644); + if (playback_status & (0x1 << 0)) { + wlc_lcnphy_tx_pu(pi, 0); + mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1); + } else if (playback_status & (0x1 << 1)) + mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15); + + mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0); + + mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3); + + mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7); + + and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9); + + wlc_lcnphy_deaf_mode(pi, false); +} + +static void wlc_lcnphy_clear_trsw_override(phy_info_t *pi) +{ + + and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0))); +} + +void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b) +{ + u16 iqcc[2]; + phytbl_info_t tab; + + tab.tbl_ptr = iqcc; + tab.tbl_len = 2; + tab.tbl_id = 0; + tab.tbl_offset = 80; + tab.tbl_width = 16; + wlc_lcnphy_read_table(pi, &tab); + + *a = iqcc[0]; + *b = iqcc[1]; +} + +u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi) +{ + phytbl_info_t tab; + u16 didq; + + tab.tbl_id = 0; + tab.tbl_width = 16; + tab.tbl_ptr = &didq; + tab.tbl_len = 1; + tab.tbl_offset = 85; + wlc_lcnphy_read_table(pi, &tab); + + return didq; +} + +static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi) +{ + + lcnphy_txgains_t target_gains, old_gains; + u8 save_bb_mult; + u16 a, b, didq, save_pa_gain = 0; + uint idx, SAVE_txpwrindex = 0xFF; + u32 val; + u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + phytbl_info_t tab; + u8 ei0, eq0, fi0, fq0; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + wlc_lcnphy_get_tx_gain(pi, &old_gains); + save_pa_gain = wlc_lcnphy_get_pa_gain(pi); + + save_bb_mult = wlc_lcnphy_get_bbmult(pi); + + if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF) + SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + + target_gains.gm_gain = 7; + target_gains.pga_gain = 0; + target_gains.pad_gain = 21; + target_gains.dac_gain = 0; + wlc_lcnphy_set_tx_gain(pi, &target_gains); + wlc_lcnphy_set_tx_pwr_by_index(pi, 16); + + if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) { + + wlc_lcnphy_set_tx_pwr_by_index(pi, 30); + + wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, + (pi_lcn-> + lcnphy_recal ? LCNPHY_CAL_RECAL : + LCNPHY_CAL_FULL), false); + } else { + + wlc_lcnphy_tx_iqlo_soft_cal_full(pi); + } + + wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0); + if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + target_gains.gm_gain = 255; + target_gains.pga_gain = 255; + target_gains.pad_gain = 0xf0; + target_gains.dac_gain = 0; + } else { + target_gains.gm_gain = 7; + target_gains.pga_gain = 45; + target_gains.pad_gain = 186; + target_gains.dac_gain = 0; + } + + if (LCNREV_IS(pi->pubpi.phy_rev, 1) + || pi_lcn->lcnphy_hw_iqcal_en) { + + target_gains.pga_gain = 0; + target_gains.pad_gain = 30; + wlc_lcnphy_set_tx_pwr_by_index(pi, 16); + wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, + LCNPHY_CAL_FULL, false); + } else { + + wlc_lcnphy_tx_iqlo_soft_cal_full(pi); + } + + } + + wlc_lcnphy_get_tx_iqcc(pi, &a, &b); + + didq = wlc_lcnphy_get_tx_locc(pi); + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_ptr = &val; + + tab.tbl_len = 1; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; + + for (idx = 0; idx < 128; idx++) { + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx; + + wlc_lcnphy_read_table(pi, &tab); + val = (val & 0xfff00000) | + ((u32) (a & 0x3FF) << 10) | (b & 0x3ff); + wlc_lcnphy_write_table(pi, &tab); + + val = didq; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx; + wlc_lcnphy_write_table(pi, &tab); + } + + pi_lcn->lcnphy_cal_results.txiqlocal_a = a; + pi_lcn->lcnphy_cal_results.txiqlocal_b = b; + pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq; + pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0; + pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0; + pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0; + pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0; + + wlc_lcnphy_set_bbmult(pi, save_bb_mult); + wlc_lcnphy_set_pa_gain(pi, save_pa_gain); + wlc_lcnphy_set_tx_gain(pi, &old_gains); + + if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF) + wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); + else + wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex); +} + +s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode) +{ + u16 tempsenseval1, tempsenseval2; + s16 avg = 0; + bool suspend = 0; + + if (NORADIO_ENAB(pi->pubpi)) + return -1; + + if (mode == 1) { + suspend = + (0 == + (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); + } + tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; + tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; + + if (tempsenseval1 > 255) + avg = (s16) (tempsenseval1 - 512); + else + avg = (s16) tempsenseval1; + + if (tempsenseval2 > 255) + avg += (s16) (tempsenseval2 - 512); + else + avg += (s16) tempsenseval2; + + avg /= 2; + + if (mode == 1) { + + mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); + + udelay(100); + mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + } + return avg; +} + +u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode) +{ + u16 tempsenseval1, tempsenseval2; + s32 avg = 0; + bool suspend = 0; + u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (NORADIO_ENAB(pi->pubpi)) + return -1; + + if (mode == 1) { + suspend = + (0 == + (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); + } + tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; + tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; + + if (tempsenseval1 > 255) + avg = (int)(tempsenseval1 - 512); + else + avg = (int)tempsenseval1; + + if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) { + if (tempsenseval2 > 255) + avg = (int)(avg - tempsenseval2 + 512); + else + avg = (int)(avg - tempsenseval2); + } else { + if (tempsenseval2 > 255) + avg = (int)(avg + tempsenseval2 - 512); + else + avg = (int)(avg + tempsenseval2); + avg = avg / 2; + } + if (avg < 0) + avg = avg + 512; + + if (pi_lcn->lcnphy_tempsense_option == 2) + avg = tempsenseval1; + + if (mode) + wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); + + if (mode == 1) { + + mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); + + udelay(100); + mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + } + return (u16) avg; +} + +s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode) +{ + s32 degree = wlc_lcnphy_tempsense_new(pi, mode); + degree = + ((degree << 10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1)) + / LCN_TEMPSENSE_DEN; + return (s8) degree; +} + +s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode) +{ + u16 vbatsenseval; + s32 avg = 0; + bool suspend = 0; + + if (NORADIO_ENAB(pi->pubpi)) + return -1; + + if (mode == 1) { + suspend = + (0 == + (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE); + } + + vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF; + + if (vbatsenseval > 255) + avg = (s32) (vbatsenseval - 512); + else + avg = (s32) vbatsenseval; + + avg = + (avg * LCN_VBAT_SCALE_NOM + + (LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN; + + if (mode == 1) { + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + } + return (s8) avg; +} + +static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode) +{ + u8 phybw40; + phybw40 = CHSPEC_IS40(pi->radio_chanspec); + + mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7); + + if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) || + (mode == AFE_CLK_INIT_MODE_TXRX2X)) + write_phy_reg(pi, 0x6d0, 0x7); + + wlc_lcnphy_toggle_afe_pwdn(pi); +} + +static bool +wlc_lcnphy_rx_iq_est(phy_info_t *pi, + u16 num_samps, + u8 wait_time, lcnphy_iq_est_t *iq_est) +{ + int wait_count = 0; + bool result = true; + u8 phybw40; + phybw40 = CHSPEC_IS40(pi->radio_chanspec); + + mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5); + + mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3); + + mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0); + + mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0); + + mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8); + + mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9); + + while (read_phy_reg(pi, 0x481) & (0x1 << 9)) { + + if (wait_count > (10 * 500)) { + result = false; + goto cleanup; + } + udelay(100); + wait_count++; + } + + iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) | + (u32) read_phy_reg(pi, 0x484); + iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) | + (u32) read_phy_reg(pi, 0x486); + iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) | + (u32) read_phy_reg(pi, 0x488); + + cleanup: + mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3); + + mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5); + + return result; +} + +static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps) +{ +#define LCNPHY_MIN_RXIQ_PWR 2 + bool result; + u16 a0_new, b0_new; + lcnphy_iq_est_t iq_est = { 0, 0, 0 }; + s32 a, b, temp; + s16 iq_nbits, qq_nbits, arsh, brsh; + s32 iq; + u32 ii, qq; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0); + b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0); + mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6); + + wlc_lcnphy_set_rx_iq_comp(pi, 0, 0); + + result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est); + if (!result) + goto cleanup; + + iq = (s32) iq_est.iq_prod; + ii = iq_est.i_pwr; + qq = iq_est.q_pwr; + + if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) { + result = false; + goto cleanup; + } + + iq_nbits = wlc_phy_nbits(iq); + qq_nbits = wlc_phy_nbits(qq); + + arsh = 10 - (30 - iq_nbits); + if (arsh >= 0) { + a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); + temp = (s32) (ii >> arsh); + if (temp == 0) { + return false; + } + } else { + a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); + temp = (s32) (ii << -arsh); + if (temp == 0) { + return false; + } + } + a /= temp; + brsh = qq_nbits - 31 + 20; + if (brsh >= 0) { + b = (qq << (31 - qq_nbits)); + temp = (s32) (ii >> brsh); + if (temp == 0) { + return false; + } + } else { + b = (qq << (31 - qq_nbits)); + temp = (s32) (ii << -brsh); + if (temp == 0) { + return false; + } + } + b /= temp; + b -= a * a; + b = (s32) int_sqrt((unsigned long) b); + b -= (1 << 10); + a0_new = (u16) (a & 0x3ff); + b0_new = (u16) (b & 0x3ff); + cleanup: + + wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new); + + mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3); + + pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new; + pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new; + + return result; +} + +static bool +wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, + int iqcomp_sz, bool tx_switch, bool rx_switch, int module, + int tx_gain_idx) +{ + lcnphy_txgains_t old_gains; + u16 tx_pwr_ctrl; + u8 tx_gain_index_old = 0; + bool result = false, tx_gain_override_old = false; + u16 i, Core1TxControl_old, RFOverride0_old, + RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old, + rfoverride3_old, rfoverride3val_old, rfoverride4_old, + rfoverride4val_old, afectrlovr_old, afectrlovrval_old; + int tia_gain; + u32 received_power, rx_pwr_threshold; + u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl; + u16 values_to_save[11]; + s16 *ptr; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC); + if (NULL == ptr) { + return false; + } + if (module == 2) { + while (iqcomp_sz--) { + if (iqcomp[iqcomp_sz].chan == + CHSPEC_CHANNEL(pi->radio_chanspec)) { + + wlc_lcnphy_set_rx_iq_comp(pi, + (u16) + iqcomp[iqcomp_sz].a, + (u16) + iqcomp[iqcomp_sz].b); + result = true; + break; + } + } + goto cal_done; + } + + if (module == 1) { + + tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + + for (i = 0; i < 11; i++) { + values_to_save[i] = + read_radio_reg(pi, rxiq_cal_rf_reg[i]); + } + Core1TxControl_old = read_phy_reg(pi, 0x631); + + or_phy_reg(pi, 0x631, 0x0015); + + RFOverride0_old = read_phy_reg(pi, 0x44c); + RFOverrideVal0_old = read_phy_reg(pi, 0x44d); + rfoverride2_old = read_phy_reg(pi, 0x4b0); + rfoverride2val_old = read_phy_reg(pi, 0x4b1); + rfoverride3_old = read_phy_reg(pi, 0x4f9); + rfoverride3val_old = read_phy_reg(pi, 0x4fa); + rfoverride4_old = read_phy_reg(pi, 0x938); + rfoverride4val_old = read_phy_reg(pi, 0x939); + afectrlovr_old = read_phy_reg(pi, 0x43b); + afectrlovrval_old = read_phy_reg(pi, 0x43c); + old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); + old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); + + tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); + if (tx_gain_override_old) { + wlc_lcnphy_get_tx_gain(pi, &old_gains); + tx_gain_index_old = pi_lcn->lcnphy_current_index; + } + + wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx); + + mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); + + mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); + + write_radio_reg(pi, RADIO_2064_REG116, 0x06); + write_radio_reg(pi, RADIO_2064_REG12C, 0x07); + write_radio_reg(pi, RADIO_2064_REG06A, 0xd3); + write_radio_reg(pi, RADIO_2064_REG098, 0x03); + write_radio_reg(pi, RADIO_2064_REG00B, 0x7); + mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4); + write_radio_reg(pi, RADIO_2064_REG01D, 0x01); + write_radio_reg(pi, RADIO_2064_REG114, 0x01); + write_radio_reg(pi, RADIO_2064_REG02E, 0x10); + write_radio_reg(pi, RADIO_2064_REG12A, 0x08); + + mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0); + mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2); + mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2); + mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3); + mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3); + mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5); + mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5); + + mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); + + wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0); + write_phy_reg(pi, 0x6da, 0xffff); + or_phy_reg(pi, 0x6db, 0x3); + wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch); + wlc_lcnphy_rx_gain_override_enable(pi, true); + + tia_gain = 8; + rx_pwr_threshold = 950; + while (tia_gain > 0) { + tia_gain -= 1; + wlc_lcnphy_set_rx_gain_by_distribution(pi, + 0, 0, 2, 2, + (u16) + tia_gain, 1, 0); + udelay(500); + + received_power = + wlc_lcnphy_measure_digital_power(pi, 2000); + if (received_power < rx_pwr_threshold) + break; + } + result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff); + + wlc_lcnphy_stop_tx_tone(pi); + + write_phy_reg(pi, 0x631, Core1TxControl_old); + + write_phy_reg(pi, 0x44c, RFOverrideVal0_old); + write_phy_reg(pi, 0x44d, RFOverrideVal0_old); + write_phy_reg(pi, 0x4b0, rfoverride2_old); + write_phy_reg(pi, 0x4b1, rfoverride2val_old); + write_phy_reg(pi, 0x4f9, rfoverride3_old); + write_phy_reg(pi, 0x4fa, rfoverride3val_old); + write_phy_reg(pi, 0x938, rfoverride4_old); + write_phy_reg(pi, 0x939, rfoverride4val_old); + write_phy_reg(pi, 0x43b, afectrlovr_old); + write_phy_reg(pi, 0x43c, afectrlovrval_old); + write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); + write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl); + + wlc_lcnphy_clear_trsw_override(pi); + + mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2); + + for (i = 0; i < 11; i++) { + write_radio_reg(pi, rxiq_cal_rf_reg[i], + values_to_save[i]); + } + + if (tx_gain_override_old) { + wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old); + } else + wlc_lcnphy_disable_tx_gain_override(pi); + wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl); + + wlc_lcnphy_rx_gain_override_enable(pi, false); + } + + cal_done: + kfree(ptr); + return result; +} + +static void wlc_lcnphy_temp_adj(phy_info_t *pi) +{ + if (NORADIO_ENAB(pi->pubpi)) + return; +} + +static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi) +{ + bool suspend; + s8 index; + u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_lcnphy_deaf_mode(pi, true); + pi->phy_lastcal = pi->sh->now; + pi->phy_forcecal = false; + index = pi_lcn->lcnphy_current_index; + + wlc_lcnphy_txpwrtbl_iqlo_cal(pi); + + wlc_lcnphy_set_tx_pwr_by_index(pi, index); + wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); + wlc_lcnphy_deaf_mode(pi, false); + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); + +} + +static void wlc_lcnphy_periodic_cal(phy_info_t *pi) +{ + bool suspend, full_cal; + const lcnphy_rx_iqcomp_t *rx_iqcomp; + int rx_iqcomp_sz; + u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + s8 index; + phytbl_info_t tab; + s32 a1, b0, b1; + s32 tssi, pwr, maxtargetpwr, mintargetpwr; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + pi->phy_lastcal = pi->sh->now; + pi->phy_forcecal = false; + full_cal = + (pi_lcn->lcnphy_full_cal_channel != + CHSPEC_CHANNEL(pi->radio_chanspec)); + pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec); + index = pi_lcn->lcnphy_current_index; + + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) { + + wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); + wlapi_suspend_mac_and_wait(pi->sh->physhim); + } + wlc_lcnphy_deaf_mode(pi, true); + + wlc_lcnphy_txpwrtbl_iqlo_cal(pi); + + rx_iqcomp = lcnphy_rx_iqcomp_table_rev0; + rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0); + + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) + wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40); + else + wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127); + + if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { + + wlc_lcnphy_idle_tssi_est((wlc_phy_t *) pi); + + b0 = pi->txpa_2g[0]; + b1 = pi->txpa_2g[1]; + a1 = pi->txpa_2g[2]; + maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1); + mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1); + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_ptr = &pwr; + tab.tbl_len = 1; + tab.tbl_offset = 0; + for (tssi = 0; tssi < 128; tssi++) { + pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1); + pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr; + wlc_lcnphy_write_table(pi, &tab); + tab.tbl_offset++; + } + } + + wlc_lcnphy_set_tx_pwr_by_index(pi, index); + wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); + wlc_lcnphy_deaf_mode(pi, false); + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); +} + +void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode) +{ + u16 temp_new; + int temp1, temp2, temp_diff; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + switch (mode) { + case PHY_PERICAL_CHAN: + + break; + case PHY_FULLCAL: + wlc_lcnphy_periodic_cal(pi); + break; + case PHY_PERICAL_PHYINIT: + wlc_lcnphy_periodic_cal(pi); + break; + case PHY_PERICAL_WATCHDOG: + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { + temp_new = wlc_lcnphy_tempsense(pi, 0); + temp1 = LCNPHY_TEMPSENSE(temp_new); + temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper); + temp_diff = temp1 - temp2; + if ((pi_lcn->lcnphy_cal_counter > 90) || + (temp_diff > 60) || (temp_diff < -60)) { + wlc_lcnphy_glacial_timer_based_cal(pi); + wlc_2064_vco_cal(pi); + pi_lcn->lcnphy_cal_temper = temp_new; + pi_lcn->lcnphy_cal_counter = 0; + } else + pi_lcn->lcnphy_cal_counter++; + } + break; + case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL: + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) + wlc_lcnphy_tx_power_adjustment((wlc_phy_t *) pi); + break; + } +} + +void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr) +{ + s8 cck_offset; + u16 status; + status = (read_phy_reg(pi, 0x4ab)); + if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && + (status & (0x1 << 15))) { + *ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) + >> 0) >> 1); + + if (wlc_phy_tpc_isenabled_lcnphy(pi)) + cck_offset = pi->tx_power_offset[TXP_FIRST_CCK]; + else + cck_offset = 0; + + *cck_pwr = *ofdm_pwr + cck_offset; + } else { + *cck_pwr = 0; + *ofdm_pwr = 0; + } +} + +void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi) +{ + return; + +} + +static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) +{ + u8 channel = CHSPEC_CHANNEL(chanspec); + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + if (channel == 14) { + mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); + + } else { + mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); + + } + pi_lcn->lcnphy_bandedge_corr = 2; + if (channel == 1) + pi_lcn->lcnphy_bandedge_corr = 4; + + if (channel == 1 || channel == 2 || channel == 3 || + channel == 4 || channel == 9 || + channel == 10 || channel == 11 || channel == 12) { + si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04); + si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0); + si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0); + + si_pmu_pllupd(pi->sh->sih); + write_phy_reg(pi, 0x942, 0); + wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); + pi_lcn->lcnphy_spurmod = 0; + mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8); + + write_phy_reg(pi, 0x425, 0x5907); + } else { + si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04); + si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333); + si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820); + + si_pmu_pllupd(pi->sh->sih); + write_phy_reg(pi, 0x942, 0); + wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); + + pi_lcn->lcnphy_spurmod = 0; + mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8); + + write_phy_reg(pi, 0x425, 0x590a); + } + + or_phy_reg(pi, 0x44a, 0x44); + write_phy_reg(pi, 0x44a, 0x80); +} + +void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi) +{ + s8 index; + u16 index2; + phy_info_t *pi = (phy_info_t *) ppi; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) { + index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); + index2 = (u16) (index * 2); + mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); + + pi_lcn->lcnphy_current_index = (s8) + ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2); + } +} + +static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b) +{ + mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0); + + mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0); + + mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0); + + mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0); + + mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0); + + mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0); + +} + +void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) +{ + u8 phybw40; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + phybw40 = CHSPEC_IS40(pi->radio_chanspec); + + pi_lcn->lcnphy_cal_counter = 0; + pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense; + + or_phy_reg(pi, 0x44a, 0x80); + and_phy_reg(pi, 0x44a, 0x7f); + + wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X); + + write_phy_reg(pi, 0x60a, 160); + + write_phy_reg(pi, 0x46a, 25); + + wlc_lcnphy_baseband_init(pi); + + wlc_lcnphy_radio_init(pi); + + if (CHSPEC_IS2G(pi->radio_chanspec)) + wlc_lcnphy_tx_pwr_ctrl_init((wlc_phy_t *) pi); + + wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); + + si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9); + + si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD); + + if ((pi->sh->boardflags & BFL_FEM) + && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) + wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR); + + wlc_lcnphy_agc_temp_init(pi); + + wlc_lcnphy_temp_adj(pi); + + mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); + + udelay(100); + mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); + pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT; + wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT); +} + +static void +wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save) +{ + u16 vmid; + int i; + for (i = 0; i < 20; i++) { + values_to_save[i] = + read_radio_reg(pi, iqlo_loopback_rf_regs[i]); + } + + mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); + mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); + + mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11); + mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13); + + mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); + + mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) + and_radio_reg(pi, RADIO_2064_REG03A, 0xFD); + else + and_radio_reg(pi, RADIO_2064_REG03A, 0xF9); + or_radio_reg(pi, RADIO_2064_REG11A, 0x1); + + or_radio_reg(pi, RADIO_2064_REG036, 0x01); + or_radio_reg(pi, RADIO_2064_REG11A, 0x18); + udelay(20); + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) + mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); + else + or_radio_reg(pi, RADIO_2064_REG03A, 1); + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) + mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1); + else + or_radio_reg(pi, RADIO_2064_REG03A, 0x3); + } + + udelay(20); + + write_radio_reg(pi, RADIO_2064_REG025, 0xF); + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) + mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4); + else + mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6); + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) + mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1); + else + mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1); + } + + udelay(20); + + write_radio_reg(pi, RADIO_2064_REG005, 0x8); + or_radio_reg(pi, RADIO_2064_REG112, 0x80); + udelay(20); + + or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); + or_radio_reg(pi, RADIO_2064_REG11F, 0x44); + udelay(20); + + or_radio_reg(pi, RADIO_2064_REG00B, 0x7); + or_radio_reg(pi, RADIO_2064_REG113, 0x10); + udelay(20); + + write_radio_reg(pi, RADIO_2064_REG007, 0x1); + udelay(20); + + vmid = 0x2A6; + mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3); + write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff)); + or_radio_reg(pi, RADIO_2064_REG11F, 0x44); + udelay(20); + + or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); + udelay(20); + write_radio_reg(pi, RADIO_2064_REG012, 0x02); + or_radio_reg(pi, RADIO_2064_REG112, 0x06); + write_radio_reg(pi, RADIO_2064_REG036, 0x11); + write_radio_reg(pi, RADIO_2064_REG059, 0xcc); + write_radio_reg(pi, RADIO_2064_REG05C, 0x2e); + write_radio_reg(pi, RADIO_2064_REG078, 0xd7); + write_radio_reg(pi, RADIO_2064_REG092, 0x15); +} + +static void +wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh, + s16 *ptr, int mode) +{ + u32 curval1, curval2, stpptr, curptr, strptr, val; + u16 sslpnCalibClkEnCtrl, timer; + u16 old_sslpnCalibClkEnCtrl; + s16 imag, real; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + timer = 0; + old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); + + curval1 = R_REG(&pi->regs->psm_corectlsts); + ptr[130] = 0; + W_REG(&pi->regs->psm_corectlsts, ((1 << 6) | curval1)); + + W_REG(&pi->regs->smpl_clct_strptr, 0x7E00); + W_REG(&pi->regs->smpl_clct_stpptr, 0x8000); + udelay(20); + curval2 = R_REG(&pi->regs->psm_phy_hdr_param); + W_REG(&pi->regs->psm_phy_hdr_param, curval2 | 0x30); + + write_phy_reg(pi, 0x555, 0x0); + write_phy_reg(pi, 0x5a6, 0x5); + + write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6)); + write_phy_reg(pi, 0x5cf, 3); + write_phy_reg(pi, 0x5a5, 0x3); + write_phy_reg(pi, 0x583, 0x0); + write_phy_reg(pi, 0x584, 0x0); + write_phy_reg(pi, 0x585, 0x0fff); + write_phy_reg(pi, 0x586, 0x0000); + + write_phy_reg(pi, 0x580, 0x4501); + + sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); + write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008)); + stpptr = R_REG(&pi->regs->smpl_clct_stpptr); + curptr = R_REG(&pi->regs->smpl_clct_curptr); + do { + udelay(10); + curptr = R_REG(&pi->regs->smpl_clct_curptr); + timer++; + } while ((curptr != stpptr) && (timer < 500)); + + W_REG(&pi->regs->psm_phy_hdr_param, 0x2); + strptr = 0x7E00; + W_REG(&pi->regs->tplatewrptr, strptr); + while (strptr < 0x8000) { + val = R_REG(&pi->regs->tplatewrdata); + imag = ((val >> 16) & 0x3ff); + real = ((val) & 0x3ff); + if (imag > 511) { + imag -= 1024; + } + if (real > 511) { + real -= 1024; + } + if (pi_lcn->lcnphy_iqcal_swp_dis) + ptr[(strptr - 0x7E00) / 4] = real; + else + ptr[(strptr - 0x7E00) / 4] = imag; + if (clip_detect_algo) { + if (imag > thresh || imag < -thresh) { + strptr = 0x8000; + ptr[130] = 1; + } + } + strptr += 4; + } + + write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); + W_REG(&pi->regs->psm_phy_hdr_param, curval2); + W_REG(&pi->regs->psm_corectlsts, curval1); +} + +static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi) +{ + lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4; + + wlc_lcnphy_set_cc(pi, 0, 0, 0); + wlc_lcnphy_set_cc(pi, 2, 0, 0); + wlc_lcnphy_set_cc(pi, 3, 0, 0); + wlc_lcnphy_set_cc(pi, 4, 0, 0); + + wlc_lcnphy_a1(pi, 4, 0, 0); + wlc_lcnphy_a1(pi, 3, 0, 0); + wlc_lcnphy_a1(pi, 2, 3, 2); + wlc_lcnphy_a1(pi, 0, 5, 8); + wlc_lcnphy_a1(pi, 2, 2, 1); + wlc_lcnphy_a1(pi, 0, 4, 3); + + iqcc0 = wlc_lcnphy_get_cc(pi, 0); + locc2 = wlc_lcnphy_get_cc(pi, 2); + locc3 = wlc_lcnphy_get_cc(pi, 3); + locc4 = wlc_lcnphy_get_cc(pi, 4); +} + +static void +wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y) +{ + u16 di0dq0; + u16 x, y, data_rf; + int k; + switch (cal_type) { + case 0: + wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y); + break; + case 2: + di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff); + wlc_lcnphy_set_tx_locc(pi, di0dq0); + break; + case 3: + k = wlc_lcnphy_calc_floor(coeff_x, 0); + y = 8 + k; + k = wlc_lcnphy_calc_floor(coeff_x, 1); + x = 8 - k; + data_rf = (x * 16 + y); + write_radio_reg(pi, RADIO_2064_REG089, data_rf); + k = wlc_lcnphy_calc_floor(coeff_y, 0); + y = 8 + k; + k = wlc_lcnphy_calc_floor(coeff_y, 1); + x = 8 - k; + data_rf = (x * 16 + y); + write_radio_reg(pi, RADIO_2064_REG08A, data_rf); + break; + case 4: + k = wlc_lcnphy_calc_floor(coeff_x, 0); + y = 8 + k; + k = wlc_lcnphy_calc_floor(coeff_x, 1); + x = 8 - k; + data_rf = (x * 16 + y); + write_radio_reg(pi, RADIO_2064_REG08B, data_rf); + k = wlc_lcnphy_calc_floor(coeff_y, 0); + y = 8 + k; + k = wlc_lcnphy_calc_floor(coeff_y, 1); + x = 8 - k; + data_rf = (x * 16 + y); + write_radio_reg(pi, RADIO_2064_REG08C, data_rf); + break; + } +} + +static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type) +{ + u16 a, b, didq; + u8 di0, dq0, ei, eq, fi, fq; + lcnphy_unsign16_struct cc; + cc.re = 0; + cc.im = 0; + switch (cal_type) { + case 0: + wlc_lcnphy_get_tx_iqcc(pi, &a, &b); + cc.re = a; + cc.im = b; + break; + case 2: + didq = wlc_lcnphy_get_tx_locc(pi); + di0 = (((didq & 0xff00) << 16) >> 24); + dq0 = (((didq & 0x00ff) << 24) >> 24); + cc.re = (u16) di0; + cc.im = (u16) dq0; + break; + case 3: + wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); + cc.re = (u16) ei; + cc.im = (u16) eq; + break; + case 4: + wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); + cc.re = (u16) fi; + cc.im = (u16) fq; + break; + } + return cc; +} + +static void +wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2) +{ + const lcnphy_spb_tone_t *phy_c1; + lcnphy_spb_tone_t phy_c2; + lcnphy_unsign16_struct phy_c3; + int phy_c4, phy_c5, k, l, j, phy_c6; + u16 phy_c7, phy_c8, phy_c9; + s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16; + s16 *ptr, phy_c17; + s32 phy_c18, phy_c19; + u32 phy_c20, phy_c21; + bool phy_c22, phy_c23, phy_c24, phy_c25; + u16 phy_c26, phy_c27; + u16 phy_c28, phy_c29, phy_c30; + u16 phy_c31; + u16 *phy_c32; + phy_c21 = 0; + phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0; + ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC); + if (NULL == ptr) { + return; + } + + phy_c32 = kmalloc(sizeof(u16) * 20, GFP_ATOMIC); + if (NULL == phy_c32) { + kfree(ptr); + return; + } + phy_c26 = read_phy_reg(pi, 0x6da); + phy_c27 = read_phy_reg(pi, 0x6db); + phy_c31 = read_radio_reg(pi, RADIO_2064_REG026); + write_phy_reg(pi, 0x93d, 0xC0); + + wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0); + write_phy_reg(pi, 0x6da, 0xffff); + or_phy_reg(pi, 0x6db, 0x3); + + wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32); + udelay(500); + phy_c28 = read_phy_reg(pi, 0x938); + phy_c29 = read_phy_reg(pi, 0x4d7); + phy_c30 = read_phy_reg(pi, 0x4d8); + or_phy_reg(pi, 0x938, 0x1 << 2); + or_phy_reg(pi, 0x4d7, 0x1 << 2); + or_phy_reg(pi, 0x4d7, 0x1 << 3); + mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12); + or_phy_reg(pi, 0x4d8, 1 << 0); + or_phy_reg(pi, 0x4d8, 1 << 1); + mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2); + mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12); + phy_c1 = &lcnphy_spb_tone_3750[0]; + phy_c4 = 32; + + if (num_levels == 0) { + if (cal_type != 0) { + num_levels = 4; + } else { + num_levels = 9; + } + } + if (step_size_lg2 == 0) { + if (cal_type != 0) { + step_size_lg2 = 3; + } else { + step_size_lg2 = 8; + } + } + + phy_c7 = (1 << step_size_lg2); + phy_c3 = wlc_lcnphy_get_cc(pi, cal_type); + phy_c15 = (s16) phy_c3.re; + phy_c16 = (s16) phy_c3.im; + if (cal_type == 2) { + if (phy_c3.re > 127) + phy_c15 = phy_c3.re - 256; + if (phy_c3.im > 127) + phy_c16 = phy_c3.im - 256; + } + wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); + udelay(20); + for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) { + phy_c23 = 1; + phy_c22 = 0; + switch (cal_type) { + case 0: + phy_c10 = 511; + break; + case 2: + phy_c10 = 127; + break; + case 3: + phy_c10 = 15; + break; + case 4: + phy_c10 = 15; + break; + } + + phy_c9 = read_phy_reg(pi, 0x93d); + phy_c9 = 2 * phy_c9; + phy_c24 = 0; + phy_c5 = 7; + phy_c25 = 1; + while (1) { + write_radio_reg(pi, RADIO_2064_REG026, + (phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4)); + udelay(50); + phy_c22 = 0; + ptr[130] = 0; + wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2); + if (ptr[130] == 1) + phy_c22 = 1; + if (phy_c22) + phy_c5 -= 1; + if ((phy_c22 != phy_c24) && (!phy_c25)) + break; + if (!phy_c22) + phy_c5 += 1; + if (phy_c5 <= 0 || phy_c5 >= 7) + break; + phy_c24 = phy_c22; + phy_c25 = 0; + } + + if (phy_c5 < 0) + phy_c5 = 0; + else if (phy_c5 > 7) + phy_c5 = 7; + + for (k = -phy_c7; k <= phy_c7; k += phy_c7) { + for (l = -phy_c7; l <= phy_c7; l += phy_c7) { + phy_c11 = phy_c15 + k; + phy_c12 = phy_c16 + l; + + if (phy_c11 < -phy_c10) + phy_c11 = -phy_c10; + else if (phy_c11 > phy_c10) + phy_c11 = phy_c10; + if (phy_c12 < -phy_c10) + phy_c12 = -phy_c10; + else if (phy_c12 > phy_c10) + phy_c12 = phy_c10; + wlc_lcnphy_set_cc(pi, cal_type, phy_c11, + phy_c12); + udelay(20); + wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2); + + phy_c18 = 0; + phy_c19 = 0; + for (j = 0; j < 128; j++) { + if (cal_type != 0) { + phy_c6 = j % phy_c4; + } else { + phy_c6 = (2 * j) % phy_c4; + } + phy_c2.re = phy_c1[phy_c6].re; + phy_c2.im = phy_c1[phy_c6].im; + phy_c17 = ptr[j]; + phy_c18 = phy_c18 + phy_c17 * phy_c2.re; + phy_c19 = phy_c19 + phy_c17 * phy_c2.im; + } + + phy_c18 = phy_c18 >> 10; + phy_c19 = phy_c19 >> 10; + phy_c20 = + ((phy_c18 * phy_c18) + (phy_c19 * phy_c19)); + + if (phy_c23 || phy_c20 < phy_c21) { + phy_c21 = phy_c20; + phy_c13 = phy_c11; + phy_c14 = phy_c12; + } + phy_c23 = 0; + } + } + phy_c23 = 1; + phy_c15 = phy_c13; + phy_c16 = phy_c14; + phy_c7 = phy_c7 >> 1; + wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); + udelay(20); + } + goto cleanup; + cleanup: + wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32); + wlc_lcnphy_stop_tx_tone(pi); + write_phy_reg(pi, 0x6da, phy_c26); + write_phy_reg(pi, 0x6db, phy_c27); + write_phy_reg(pi, 0x938, phy_c28); + write_phy_reg(pi, 0x4d7, phy_c29); + write_phy_reg(pi, 0x4d8, phy_c30); + write_radio_reg(pi, RADIO_2064_REG026, phy_c31); + + kfree(phy_c32); + kfree(ptr); +} + +static void +wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save) +{ + int i; + + and_phy_reg(pi, 0x44c, 0x0 >> 11); + + and_phy_reg(pi, 0x43b, 0xC); + + for (i = 0; i < 20; i++) { + write_radio_reg(pi, iqlo_loopback_rf_regs[i], + values_to_save[i]); + } +} + +static void +WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi, + const lcnphy_tx_gain_tbl_entry * + gain_table) { + u32 j; + phytbl_info_t tab; + u32 val; + u16 pa_gain; + u16 gm_gain; + + if (CHSPEC_IS5G(pi->radio_chanspec)) + pa_gain = 0x70; + else + pa_gain = 0x70; + + if (pi->sh->boardflags & BFL_FEM) + pa_gain = 0x10; + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_len = 1; + tab.tbl_ptr = &val; + + for (j = 0; j < 128; j++) { + gm_gain = gain_table[j].gm; + val = (((u32) pa_gain << 24) | + (gain_table[j].pad << 16) | + (gain_table[j].pga << 8) | gm_gain); + + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j; + wlc_lcnphy_write_table(pi, &tab); + + val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20); + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j; + wlc_lcnphy_write_table(pi, &tab); + } +} + +static void wlc_lcnphy_load_rfpower(phy_info_t *pi) +{ + phytbl_info_t tab; + u32 val, bbmult, rfgain; + u8 index; + u8 scale_factor = 1; + s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift; + + tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; + tab.tbl_width = 32; + tab.tbl_len = 1; + + for (index = 0; index < 128; index++) { + tab.tbl_ptr = &bbmult; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index; + wlc_lcnphy_read_table(pi, &tab); + bbmult = bbmult >> 20; + + tab.tbl_ptr = &rfgain; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index; + wlc_lcnphy_read_table(pi, &tab); + + qm_log10((s32) (bbmult), 0, &temp1, &qQ1); + qm_log10((s32) (1 << 6), 0, &temp2, &qQ2); + + if (qQ1 < qQ2) { + temp2 = qm_shr16(temp2, qQ2 - qQ1); + qQ = qQ1; + } else { + temp1 = qm_shr16(temp1, qQ1 - qQ2); + qQ = qQ2; + } + temp = qm_sub16(temp1, temp2); + + if (qQ >= 4) + shift = qQ - 4; + else + shift = 4 - qQ; + + val = (((index << shift) + (5 * temp) + + (1 << (scale_factor + shift - 3))) >> (scale_factor + + shift - 2)); + + tab.tbl_ptr = &val; + tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index; + wlc_lcnphy_write_table(pi, &tab); + } +} + +static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi) +{ + uint idx; + u8 phybw40; + phytbl_info_t tab; + u32 val; + + phybw40 = CHSPEC_IS40(pi->radio_chanspec); + + for (idx = 0; idx < dot11lcnphytbl_info_sz_rev0; idx++) { + wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]); + } + + if (pi->sh->boardflags & BFL_FEM_BT) { + tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; + tab.tbl_width = 16; + tab.tbl_ptr = &val; + tab.tbl_len = 1; + val = 100; + tab.tbl_offset = 4; + wlc_lcnphy_write_table(pi, &tab); + } + + tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; + tab.tbl_width = 16; + tab.tbl_ptr = &val; + tab.tbl_len = 1; + + val = 114; + tab.tbl_offset = 0; + wlc_lcnphy_write_table(pi, &tab); + + val = 130; + tab.tbl_offset = 1; + wlc_lcnphy_write_table(pi, &tab); + + val = 6; + tab.tbl_offset = 8; + wlc_lcnphy_write_table(pi, &tab); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->sh->boardflags & BFL_FEM) + wlc_lcnphy_load_tx_gain_table(pi, + dot11lcnphy_2GHz_extPA_gaintable_rev0); + else + wlc_lcnphy_load_tx_gain_table(pi, + dot11lcnphy_2GHz_gaintable_rev0); + } + + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + for (idx = 0; + idx < dot11lcnphytbl_rx_gain_info_2G_rev2_sz; + idx++) + if (pi->sh->boardflags & BFL_EXTLNA) + wlc_lcnphy_write_table(pi, + &dot11lcnphytbl_rx_gain_info_extlna_2G_rev2 + [idx]); + else + wlc_lcnphy_write_table(pi, + &dot11lcnphytbl_rx_gain_info_2G_rev2 + [idx]); + } else { + for (idx = 0; + idx < dot11lcnphytbl_rx_gain_info_5G_rev2_sz; + idx++) + if (pi->sh->boardflags & BFL_EXTLNA_5GHz) + wlc_lcnphy_write_table(pi, + &dot11lcnphytbl_rx_gain_info_extlna_5G_rev2 + [idx]); + else + wlc_lcnphy_write_table(pi, + &dot11lcnphytbl_rx_gain_info_5G_rev2 + [idx]); + } + } + + if ((pi->sh->boardflags & BFL_FEM) + && !(pi->sh->boardflags & BFL_FEM_BT)) + wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313_epa); + else if (pi->sh->boardflags & BFL_FEM_BT) { + if (pi->sh->boardrev < 0x1250) + wlc_lcnphy_write_table(pi, + &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa); + else + wlc_lcnphy_write_table(pi, + &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250); + } else + wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313); + + wlc_lcnphy_load_rfpower(pi); + + wlc_lcnphy_clear_papd_comptable(pi); +} + +static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi) +{ + u16 afectrl1; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + write_radio_reg(pi, RADIO_2064_REG11C, 0x0); + + write_phy_reg(pi, 0x43b, 0x0); + write_phy_reg(pi, 0x43c, 0x0); + write_phy_reg(pi, 0x44c, 0x0); + write_phy_reg(pi, 0x4e6, 0x0); + write_phy_reg(pi, 0x4f9, 0x0); + write_phy_reg(pi, 0x4b0, 0x0); + write_phy_reg(pi, 0x938, 0x0); + write_phy_reg(pi, 0x4b0, 0x0); + write_phy_reg(pi, 0x44e, 0); + + or_phy_reg(pi, 0x567, 0x03); + + or_phy_reg(pi, 0x44a, 0x44); + write_phy_reg(pi, 0x44a, 0x80); + + if (!(pi->sh->boardflags & BFL_FEM)) + wlc_lcnphy_set_tx_pwr_by_index(pi, 52); + + if (0) { + afectrl1 = 0; + afectrl1 = (u16) ((pi_lcn->lcnphy_rssi_vf) | + (pi_lcn->lcnphy_rssi_vc << 4) | (pi_lcn-> + lcnphy_rssi_gs + << 10)); + write_phy_reg(pi, 0x43e, afectrl1); + } + + mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0); + if (pi->sh->boardflags & BFL_FEM) { + mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0); + + write_phy_reg(pi, 0x910, 0x1); + } + + mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8); + mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0); + mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0); + +} + +static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi) +{ + if (CHSPEC_IS5G(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0); + + mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8); + } +} + +static void wlc_lcnphy_agc_temp_init(phy_info_t *pi) +{ + s16 temp; + phytbl_info_t tab; + u32 tableBuffer[2]; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + temp = (s16) read_phy_reg(pi, 0x4df); + pi_lcn->lcnphy_ofdmgainidxtableoffset = (temp & (0xff << 0)) >> 0; + + if (pi_lcn->lcnphy_ofdmgainidxtableoffset > 127) + pi_lcn->lcnphy_ofdmgainidxtableoffset -= 256; + + pi_lcn->lcnphy_dsssgainidxtableoffset = (temp & (0xff << 8)) >> 8; + + if (pi_lcn->lcnphy_dsssgainidxtableoffset > 127) + pi_lcn->lcnphy_dsssgainidxtableoffset -= 256; + + tab.tbl_ptr = tableBuffer; + tab.tbl_len = 2; + tab.tbl_id = 17; + tab.tbl_offset = 59; + tab.tbl_width = 32; + wlc_lcnphy_read_table(pi, &tab); + + if (tableBuffer[0] > 63) + tableBuffer[0] -= 128; + pi_lcn->lcnphy_tr_R_gain_val = tableBuffer[0]; + + if (tableBuffer[1] > 63) + tableBuffer[1] -= 128; + pi_lcn->lcnphy_tr_T_gain_val = tableBuffer[1]; + + temp = (s16) (read_phy_reg(pi, 0x434) + & (0xff << 0)); + if (temp > 127) + temp -= 256; + pi_lcn->lcnphy_input_pwr_offset_db = (s8) temp; + + pi_lcn->lcnphy_Med_Low_Gain_db = (read_phy_reg(pi, 0x424) + & (0xff << 8)) + >> 8; + pi_lcn->lcnphy_Very_Low_Gain_db = (read_phy_reg(pi, 0x425) + & (0xff << 0)) + >> 0; + + tab.tbl_ptr = tableBuffer; + tab.tbl_len = 2; + tab.tbl_id = LCNPHY_TBL_ID_GAIN_IDX; + tab.tbl_offset = 28; + tab.tbl_width = 32; + wlc_lcnphy_read_table(pi, &tab); + + pi_lcn->lcnphy_gain_idx_14_lowword = tableBuffer[0]; + pi_lcn->lcnphy_gain_idx_14_hiword = tableBuffer[1]; + +} + +static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi) +{ + if (NORADIO_ENAB(pi->pubpi)) + return; + + or_phy_reg(pi, 0x805, 0x1); + + mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0); + + mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0); + + write_phy_reg(pi, 0x414, 0x1e10); + write_phy_reg(pi, 0x415, 0x0640); + + mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8); + + or_phy_reg(pi, 0x44a, 0x44); + write_phy_reg(pi, 0x44a, 0x80); + mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0); + + mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0); + + if (!(pi->sh->boardrev < 0x1204)) + mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0); + + write_phy_reg(pi, 0x7d6, 0x0902); + mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0); + + mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4); + + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { + mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0); + + mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0); + + mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0); + + mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0); + + mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2); + + mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4); + mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0); + mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90); + mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2); + mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0); + + mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2); + + wlc_lcnphy_clear_tx_power_offsets(pi); + mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6); + + } +} + +static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi) +{ + + wlc_lcnphy_tbl_init(pi); + wlc_lcnphy_rev0_baseband_init(pi); + if (LCNREV_IS(pi->pubpi.phy_rev, 2)) + wlc_lcnphy_rev2_baseband_init(pi); + wlc_lcnphy_bu_tweaks(pi); +} + +static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi) +{ + u32 i; + lcnphy_radio_regs_t *lcnphyregs = NULL; + + lcnphyregs = lcnphy_radio_regs_2064; + + for (i = 0; lcnphyregs[i].address != 0xffff; i++) + if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a) + write_radio_reg(pi, + ((lcnphyregs[i].address & 0x3fff) | + RADIO_DEFAULT_CORE), + (u16) lcnphyregs[i].init_a); + else if (lcnphyregs[i].do_init_g) + write_radio_reg(pi, + ((lcnphyregs[i].address & 0x3fff) | + RADIO_DEFAULT_CORE), + (u16) lcnphyregs[i].init_g); + + write_radio_reg(pi, RADIO_2064_REG032, 0x62); + write_radio_reg(pi, RADIO_2064_REG033, 0x19); + + write_radio_reg(pi, RADIO_2064_REG090, 0x10); + + write_radio_reg(pi, RADIO_2064_REG010, 0x00); + + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { + + write_radio_reg(pi, RADIO_2064_REG060, 0x7f); + write_radio_reg(pi, RADIO_2064_REG061, 0x72); + write_radio_reg(pi, RADIO_2064_REG062, 0x7f); + } + + write_radio_reg(pi, RADIO_2064_REG01D, 0x02); + write_radio_reg(pi, RADIO_2064_REG01E, 0x06); + + mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0); + + mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3); + + mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6); + + mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9); + + mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12); + + write_phy_reg(pi, 0x4ea, 0x4688); + + mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0); + + mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6); + + mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0); + + wlc_lcnphy_set_tx_locc(pi, 0); + + wlc_lcnphy_rcal(pi); + + wlc_lcnphy_rc_cal(pi); +} + +static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi) +{ + if (NORADIO_ENAB(pi->pubpi)) + return; + + wlc_radio_2064_init(pi); +} + +static void wlc_lcnphy_rcal(phy_info_t *pi) +{ + u8 rcal_value; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); + + or_radio_reg(pi, RADIO_2064_REG004, 0x40); + or_radio_reg(pi, RADIO_2064_REG120, 0x10); + + or_radio_reg(pi, RADIO_2064_REG078, 0x80); + or_radio_reg(pi, RADIO_2064_REG129, 0x02); + + or_radio_reg(pi, RADIO_2064_REG057, 0x01); + + or_radio_reg(pi, RADIO_2064_REG05B, 0x02); + mdelay(5); + SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000); + + if (wlc_radio_2064_rcal_done(pi)) { + rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C); + rcal_value = rcal_value & 0x1f; + } + + and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); + + and_radio_reg(pi, RADIO_2064_REG057, 0xFE); +} + +static void wlc_lcnphy_rc_cal(phy_info_t *pi) +{ + u8 dflt_rc_cal_val; + u16 flt_val; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + dflt_rc_cal_val = 7; + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) + dflt_rc_cal_val = 11; + flt_val = + (dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) | + (dflt_rc_cal_val); + write_phy_reg(pi, 0x933, flt_val); + write_phy_reg(pi, 0x934, flt_val); + write_phy_reg(pi, 0x935, flt_val); + write_phy_reg(pi, 0x936, flt_val); + write_phy_reg(pi, 0x937, (flt_val & 0x1FF)); + + return; +} + +static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) +{ + s8 txpwr = 0; + int i; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + u16 cckpo = 0; + u32 offset_ofdm, offset_mcs; + + pi_lcn->lcnphy_tr_isolation_mid = + (u8) PHY_GETINTVAR(pi, "triso2g"); + + pi_lcn->lcnphy_rx_power_offset = + (u8) PHY_GETINTVAR(pi, "rxpo2g"); + + pi->txpa_2g[0] = (s16) PHY_GETINTVAR(pi, "pa0b0"); + pi->txpa_2g[1] = (s16) PHY_GETINTVAR(pi, "pa0b1"); + pi->txpa_2g[2] = (s16) PHY_GETINTVAR(pi, "pa0b2"); + + pi_lcn->lcnphy_rssi_vf = (u8) PHY_GETINTVAR(pi, "rssismf2g"); + pi_lcn->lcnphy_rssi_vc = (u8) PHY_GETINTVAR(pi, "rssismc2g"); + pi_lcn->lcnphy_rssi_gs = (u8) PHY_GETINTVAR(pi, "rssisav2g"); + + { + pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf; + pi_lcn->lcnphy_rssi_vc_lowtemp = pi_lcn->lcnphy_rssi_vc; + pi_lcn->lcnphy_rssi_gs_lowtemp = pi_lcn->lcnphy_rssi_gs; + + pi_lcn->lcnphy_rssi_vf_hightemp = + pi_lcn->lcnphy_rssi_vf; + pi_lcn->lcnphy_rssi_vc_hightemp = + pi_lcn->lcnphy_rssi_vc; + pi_lcn->lcnphy_rssi_gs_hightemp = + pi_lcn->lcnphy_rssi_gs; + } + + txpwr = (s8) PHY_GETINTVAR(pi, "maxp2ga0"); + pi->tx_srom_max_2g = txpwr; + + for (i = 0; i < PWRTBL_NUM_COEFF; i++) { + pi->txpa_2g_low_temp[i] = pi->txpa_2g[i]; + pi->txpa_2g_high_temp[i] = pi->txpa_2g[i]; + } + + cckpo = (u16) PHY_GETINTVAR(pi, "cck2gpo"); + if (cckpo) { + uint max_pwr_chan = txpwr; + + for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) { + pi->tx_srom_max_rate_2g[i] = max_pwr_chan - + ((cckpo & 0xf) * 2); + cckpo >>= 4; + } + + offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); + for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) { + pi->tx_srom_max_rate_2g[i] = max_pwr_chan - + ((offset_ofdm & 0xf) * 2); + offset_ofdm >>= 4; + } + } else { + u8 opo = 0; + + opo = (u8) PHY_GETINTVAR(pi, "opo"); + + for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) { + pi->tx_srom_max_rate_2g[i] = txpwr; + } + + offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); + + for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) { + pi->tx_srom_max_rate_2g[i] = txpwr - + ((offset_ofdm & 0xf) * 2); + offset_ofdm >>= 4; + } + offset_mcs = + ((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) | + (u16) PHY_GETINTVAR(pi, "mcs2gpo0"); + pi_lcn->lcnphy_mcs20_po = offset_mcs; + for (i = TXP_FIRST_SISO_MCS_20; + i <= TXP_LAST_SISO_MCS_20; i++) { + pi->tx_srom_max_rate_2g[i] = + txpwr - ((offset_mcs & 0xf) * 2); + offset_mcs >>= 4; + } + } + + pi_lcn->lcnphy_rawtempsense = + (u16) PHY_GETINTVAR(pi, "rawtempsense"); + pi_lcn->lcnphy_measPower = + (u8) PHY_GETINTVAR(pi, "measpower"); + pi_lcn->lcnphy_tempsense_slope = + (u8) PHY_GETINTVAR(pi, "tempsense_slope"); + pi_lcn->lcnphy_hw_iqcal_en = + (bool) PHY_GETINTVAR(pi, "hw_iqcal_en"); + pi_lcn->lcnphy_iqcal_swp_dis = + (bool) PHY_GETINTVAR(pi, "iqcal_swp_dis"); + pi_lcn->lcnphy_tempcorrx = + (u8) PHY_GETINTVAR(pi, "tempcorrx"); + pi_lcn->lcnphy_tempsense_option = + (u8) PHY_GETINTVAR(pi, "tempsense_option"); + pi_lcn->lcnphy_freqoffset_corr = + (u8) PHY_GETINTVAR(pi, "freqoffset_corr"); + if ((u8) getintvar(pi->vars, "aa2g") > 1) + wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, + (u8) getintvar(pi->vars, + "aa2g")); + } + pi_lcn->lcnphy_cck_dig_filt_type = -1; + if (PHY_GETVAR(pi, "cckdigfilttype")) { + s16 temp; + temp = (s16) PHY_GETINTVAR(pi, "cckdigfilttype"); + if (temp >= 0) { + pi_lcn->lcnphy_cck_dig_filt_type = temp; + } + } + + return true; +} + +void wlc_2064_vco_cal(phy_info_t *pi) +{ + u8 calnrst; + + mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3); + calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8; + write_radio_reg(pi, RADIO_2064_REG056, calnrst); + udelay(1); + write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03); + udelay(1); + write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07); + udelay(300); + mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0); +} + +static void +wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel) +{ + uint i; + const chan_info_2064_lcnphy_t *ci; + u8 rfpll_doubler = 0; + u8 pll_pwrup, pll_pwrup_ovr; + fixed qFxtal, qFref, qFvco, qFcal; + u8 d15, d16, f16, e44, e45; + u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div; + u16 loop_bw, d30, setCount; + if (NORADIO_ENAB(pi->pubpi)) + return; + ci = &chan_info_2064_lcnphy[0]; + rfpll_doubler = 1; + + mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2); + + write_radio_reg(pi, RADIO_2064_REG09E, 0xf); + if (!rfpll_doubler) { + loop_bw = PLL_2064_LOOP_BW; + d30 = PLL_2064_D30; + } else { + loop_bw = PLL_2064_LOOP_BW_DOUBLER; + d30 = PLL_2064_D30_DOUBLER; + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++) + if (chan_info_2064_lcnphy[i].chan == channel) + break; + + if (i >= ARRAY_SIZE(chan_info_2064_lcnphy)) { + return; + } + + ci = &chan_info_2064_lcnphy[i]; + } + + write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune); + + mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx); + + mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl); + + mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g); + + mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2, + (ci->logen_rccr_rx) << 2); + + mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune); + + mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4, + (ci->pa_rxrf_lna2_freq_tune) << 4); + + write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1); + + pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044); + pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B); + + or_radio_reg(pi, RADIO_2064_REG044, 0x07); + + or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1); + e44 = 0; + e45 = 0; + + fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq); + if (pi->xtalfreq > 26000000) + e44 = 1; + if (pi->xtalfreq > 52000000) + e45 = 1; + if (e44 == 0) + fcal_div = 1; + else if (e45 == 0) + fcal_div = 2; + else + fcal_div = 4; + fvco3 = (ci->freq * 3); + fref3 = 2 * fpfd; + + qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16); + qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16); + qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ; + qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16); + + write_radio_reg(pi, RADIO_2064_REG04F, 0x02); + + d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1; + write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2))); + write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5); + + d16 = (qFcal * 8 / (d15 + 1)) - 1; + write_radio_reg(pi, RADIO_2064_REG051, d16); + + f16 = ((d16 + 1) * (d15 + 1)) / qFcal; + setCount = f16 * 3 * (ci->freq) / 32 - 1; + mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0), + (u8) (setCount >> 8)); + + or_radio_reg(pi, RADIO_2064_REG053, 0x10); + write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff)); + + div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4; + + div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4; + while (div_frac >= fref3) { + div_int++; + div_frac -= fref3; + } + div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20); + + mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0), + (u8) (div_int >> 4)); + mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4), + (u8) (div_int << 4)); + mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0), + (u8) (div_frac >> 16)); + write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff); + write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff); + + write_radio_reg(pi, RADIO_2064_REG040, 0xfb); + + write_radio_reg(pi, RADIO_2064_REG041, 0x9A); + write_radio_reg(pi, RADIO_2064_REG042, 0xA3); + write_radio_reg(pi, RADIO_2064_REG043, 0x0C); + + { + u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current; + u16 c29, c38, c30, g30, d28; + c29 = loop_bw; + d29 = 200; + c38 = 1250; + h29 = d29 / c29; + h23 = 1; + c28 = 30; + d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) * + (fvco3 / 2 - PLL_2064_LOW_END_VCO)) / + (PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO)) + + PLL_2064_LOW_END_KVCO; + h28_ten = (d28 * 10) / c28; + c30 = 2640; + e30 = (d30 - 680) / 490; + g30 = 680 + (e30 * 490); + h30_ten = (g30 * 10) / c30; + cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten; + mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current); + } + if (channel >= 1 && channel <= 5) + write_radio_reg(pi, RADIO_2064_REG03C, 0x8); + else + write_radio_reg(pi, RADIO_2064_REG03C, 0x7); + write_radio_reg(pi, RADIO_2064_REG03D, 0x3); + + mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c); + udelay(1); + + wlc_2064_vco_cal(pi); + + write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup); + write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr); + if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { + write_radio_reg(pi, RADIO_2064_REG038, 3); + write_radio_reg(pi, RADIO_2064_REG091, 7); + } +} + +bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi) +{ + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) + return 0; + else + return (LCNPHY_TX_PWR_CTRL_HW == + wlc_lcnphy_get_tx_pwr_ctrl((pi))); +} + +void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi) +{ + u16 pwr_ctrl; + if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { + wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL); + } else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { + + pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); + wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); + wlc_lcnphy_txpower_recalc_target(pi); + + wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl); + } else + return; +} + +void wlc_phy_detach_lcnphy(phy_info_t *pi) +{ + kfree(pi->u.pi_lcnphy); +} + +bool wlc_phy_attach_lcnphy(phy_info_t *pi) +{ + phy_info_lcnphy_t *pi_lcn; + + pi->u.pi_lcnphy = kzalloc(sizeof(phy_info_lcnphy_t), GFP_ATOMIC); + if (pi->u.pi_lcnphy == NULL) { + return false; + } + + pi_lcn = pi->u.pi_lcnphy; + + if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) { + pi->hwpwrctrl = true; + pi->hwpwrctrl_capable = true; + } + + pi->xtalfreq = si_pmu_alp_clock(pi->sh->sih); + pi_lcn->lcnphy_papd_rxGnCtrl_init = 0; + + pi->pi_fptr.init = wlc_phy_init_lcnphy; + pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy; + pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy; + pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy; + pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc; + pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc; + pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc; + pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft; + pi->pi_fptr.detach = wlc_phy_detach_lcnphy; + + if (!wlc_phy_txpwr_srom_read_lcnphy(pi)) + return false; + + if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) { + if (pi_lcn->lcnphy_tempsense_option == 3) { + pi->hwpwrctrl = true; + pi->hwpwrctrl_capable = true; + pi->temppwrctrl_capable = false; + } else { + pi->hwpwrctrl = false; + pi->hwpwrctrl_capable = false; + pi->temppwrctrl_capable = true; + } + } + + return true; +} + +static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) +{ + u16 trsw, ext_lna, lna1, lna2, tia, biq0, biq1, gain0_15, gain16_19; + + trsw = (gain & ((u32) 1 << 28)) ? 0 : 1; + ext_lna = (u16) (gain >> 29) & 0x01; + lna1 = (u16) (gain >> 0) & 0x0f; + lna2 = (u16) (gain >> 4) & 0x0f; + tia = (u16) (gain >> 8) & 0xf; + biq0 = (u16) (gain >> 12) & 0xf; + biq1 = (u16) (gain >> 16) & 0xf; + + gain0_15 = (u16) ((lna1 & 0x3) | ((lna1 & 0x3) << 2) | + ((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) | + ((tia & 0xf) << 8) | ((biq0 & 0xf) << 12)); + gain16_19 = biq1; + + mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0); + mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); + mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); + mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); + mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); + mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3); + } + wlc_lcnphy_rx_gain_override_enable(pi, true); +} + +static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index) +{ + u32 received_power = 0; + s32 max_index = 0; + u32 gain_code = 0; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + max_index = 36; + if (*gain_index >= 0) + gain_code = lcnphy_23bitgaincode_table[*gain_index]; + + if (-1 == *gain_index) { + *gain_index = 0; + while ((*gain_index <= (s32) max_index) + && (received_power < 700)) { + wlc_lcnphy_set_rx_gain(pi, + lcnphy_23bitgaincode_table + [*gain_index]); + received_power = + wlc_lcnphy_measure_digital_power(pi, + pi_lcn-> + lcnphy_noise_samples); + (*gain_index)++; + } + (*gain_index)--; + } else { + wlc_lcnphy_set_rx_gain(pi, gain_code); + received_power = + wlc_lcnphy_measure_digital_power(pi, + pi_lcn-> + lcnphy_noise_samples); + } + + return received_power; +} + +s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index) +{ + s32 gain = 0; + s32 nominal_power_db; + s32 log_val, gain_mismatch, desired_gain, input_power_offset_db, + input_power_db; + s32 received_power, temperature; + uint freq; + phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + + received_power = wlc_lcnphy_get_receive_power(pi, &gain_index); + + gain = lcnphy_gain_table[gain_index]; + + nominal_power_db = read_phy_reg(pi, 0x425) >> 8; + + { + u32 power = (received_power * 16); + u32 msb1, msb2, val1, val2, diff1, diff2; + msb1 = ffs(power) - 1; + msb2 = msb1 + 1; + val1 = 1 << msb1; + val2 = 1 << msb2; + diff1 = (power - val1); + diff2 = (val2 - power); + if (diff1 < diff2) + log_val = msb1; + else + log_val = msb2; + } + + log_val = log_val * 3; + + gain_mismatch = (nominal_power_db / 2) - (log_val); + + desired_gain = gain + gain_mismatch; + + input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF; + + if (input_power_offset_db > 127) + input_power_offset_db -= 256; + + input_power_db = input_power_offset_db - desired_gain; + + input_power_db = + input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index]; + + freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec)); + if ((freq > 2427) && (freq <= 2467)) + input_power_db = input_power_db - 1; + + temperature = pi_lcn->lcnphy_lastsensed_temperature; + + if ((temperature - 15) < -30) { + input_power_db = + input_power_db + (((temperature - 10 - 25) * 286) >> 12) - + 7; + } else if ((temperature - 15) < 4) { + input_power_db = + input_power_db + (((temperature - 10 - 25) * 286) >> 12) - + 3; + } else { + input_power_db = + input_power_db + (((temperature - 10 - 25) * 286) >> 12); + } + + wlc_lcnphy_rx_gain_override_enable(pi, 0); + + return input_power_db; +} + +static int +wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, s16 filt_type) +{ + s16 filt_index = -1; + int j; + + u16 addr[] = { + 0x910, + 0x91e, + 0x91f, + 0x924, + 0x925, + 0x926, + 0x920, + 0x921, + 0x927, + 0x928, + 0x929, + 0x922, + 0x923, + 0x930, + 0x931, + 0x932 + }; + + u16 addr_ofdm[] = { + 0x90f, + 0x900, + 0x901, + 0x906, + 0x907, + 0x908, + 0x902, + 0x903, + 0x909, + 0x90a, + 0x90b, + 0x904, + 0x905, + 0x90c, + 0x90d, + 0x90e + }; + + if (!is_ofdm) { + for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) { + if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) { + filt_index = (s16) j; + break; + } + } + + if (filt_index != -1) { + for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, addr[j], + LCNPHY_txdigfiltcoeffs_cck + [filt_index][j + 1]); + } + } + } else { + for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) { + if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) { + filt_index = (s16) j; + break; + } + } + + if (filt_index != -1) { + for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, addr_ofdm[j], + LCNPHY_txdigfiltcoeffs_ofdm + [filt_index][j + 1]); + } + } + } + + return (filt_index != -1) ? 0 : -1; +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h new file mode 100644 index 0000000..efa8c90 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_PHY_LCN_H_ +#define _BRCM_PHY_LCN_H_ + +struct phy_info_lcnphy { + int lcnphy_txrf_sp_9_override; + u8 lcnphy_full_cal_channel; + u8 lcnphy_cal_counter; + u16 lcnphy_cal_temper; + bool lcnphy_recal; + + u8 lcnphy_rc_cap; + u32 lcnphy_mcs20_po; + + u8 lcnphy_tr_isolation_mid; + u8 lcnphy_tr_isolation_low; + u8 lcnphy_tr_isolation_hi; + + u8 lcnphy_bx_arch; + u8 lcnphy_rx_power_offset; + u8 lcnphy_rssi_vf; + u8 lcnphy_rssi_vc; + u8 lcnphy_rssi_gs; + u8 lcnphy_tssi_val; + u8 lcnphy_rssi_vf_lowtemp; + u8 lcnphy_rssi_vc_lowtemp; + u8 lcnphy_rssi_gs_lowtemp; + + u8 lcnphy_rssi_vf_hightemp; + u8 lcnphy_rssi_vc_hightemp; + u8 lcnphy_rssi_gs_hightemp; + + s16 lcnphy_pa0b0; + s16 lcnphy_pa0b1; + s16 lcnphy_pa0b2; + + u16 lcnphy_rawtempsense; + u8 lcnphy_measPower; + u8 lcnphy_tempsense_slope; + u8 lcnphy_freqoffset_corr; + u8 lcnphy_tempsense_option; + u8 lcnphy_tempcorrx; + bool lcnphy_iqcal_swp_dis; + bool lcnphy_hw_iqcal_en; + uint lcnphy_bandedge_corr; + bool lcnphy_spurmod; + u16 lcnphy_tssi_tx_cnt; + u16 lcnphy_tssi_idx; + u16 lcnphy_tssi_npt; + + u16 lcnphy_target_tx_freq; + s8 lcnphy_tx_power_idx_override; + u16 lcnphy_noise_samples; + + u32 lcnphy_papdRxGnIdx; + u32 lcnphy_papd_rxGnCtrl_init; + + u32 lcnphy_gain_idx_14_lowword; + u32 lcnphy_gain_idx_14_hiword; + u32 lcnphy_gain_idx_27_lowword; + u32 lcnphy_gain_idx_27_hiword; + s16 lcnphy_ofdmgainidxtableoffset; + s16 lcnphy_dsssgainidxtableoffset; + u32 lcnphy_tr_R_gain_val; + u32 lcnphy_tr_T_gain_val; + s8 lcnphy_input_pwr_offset_db; + u16 lcnphy_Med_Low_Gain_db; + u16 lcnphy_Very_Low_Gain_db; + s8 lcnphy_lastsensed_temperature; + s8 lcnphy_pkteng_rssi_slope; + u8 lcnphy_saved_tx_user_target[TXP_NUM_RATES]; + u8 lcnphy_volt_winner; + u8 lcnphy_volt_low; + u8 lcnphy_54_48_36_24mbps_backoff; + u8 lcnphy_11n_backoff; + u8 lcnphy_lowerofdm; + u8 lcnphy_cck; + u8 lcnphy_psat_2pt3_detected; + s32 lcnphy_lowest_Re_div_Im; + s8 lcnphy_final_papd_cal_idx; + u16 lcnphy_extstxctrl4; + u16 lcnphy_extstxctrl0; + u16 lcnphy_extstxctrl1; + s16 lcnphy_cck_dig_filt_type; + s16 lcnphy_ofdm_dig_filt_type; + lcnphy_cal_results_t lcnphy_cal_results; + + u8 lcnphy_psat_pwr; + u8 lcnphy_psat_indx; + s32 lcnphy_min_phase; + u8 lcnphy_final_idx; + u8 lcnphy_start_idx; + u8 lcnphy_current_index; + u16 lcnphy_logen_buf_1; + u16 lcnphy_local_ovr_2; + u16 lcnphy_local_oval_6; + u16 lcnphy_local_oval_5; + u16 lcnphy_logen_mixer_1; + + u8 lcnphy_aci_stat; + uint lcnphy_aci_start_time; + s8 lcnphy_tx_power_offset[TXP_NUM_RATES]; +}; +#endif /* _BRCM_PHY_LCN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c new file mode 100644 index 0000000..0dc614a --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c @@ -0,0 +1,29174 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include + +#define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ + read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ + ((core == PHY_CORE_0) ? radio_type##_##jspace##0 : radio_type##_##jspace##1)) +#define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ + write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ + ((core == PHY_CORE_0) ? radio_type##_##jspace##0 : radio_type##_##jspace##1), value); +#define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ + write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value); + +#define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ + read_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##jspace##0##_##reg_name : \ + radio_type##_##jspace##1##_##reg_name)); +#define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ + write_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##jspace##0##_##reg_name : \ + radio_type##_##jspace##1##_##reg_name), value); +#define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ + read_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##reg_name##_##jspace##0 : \ + radio_type##_##reg_name##_##jspace##1)); +#define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ + write_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##reg_name##_##jspace##0 : \ + radio_type##_##reg_name##_##jspace##1), value); + +#define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 +#define NPHY_ACI_CHANNEL_DELTA 5 +#define NPHY_ACI_CHANNEL_SKIP 4 +#define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 +#define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 +#define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 +#define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 +#define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 +#define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 + +#define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 + +#define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 + +#define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 + +#define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 + +#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 + +#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 + +#define NPHY_NOISE_NOASSOC_ENTER_TH 400 + +#define NPHY_NOISE_ASSOC_ENTER_TH 400 + +#define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 + +#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 +#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 + +#define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 + +#define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 + +#define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) + +#define NPHY_RSSICAL_MAXREAD 31 + +#define NPHY_RSSICAL_NPOLL 8 +#define NPHY_RSSICAL_MAXD (1<<20) +#define NPHY_MIN_RXIQ_PWR 2 + +#define NPHY_RSSICAL_W1_TARGET 25 +#define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET +#define NPHY_RSSICAL_NB_TARGET 0 + +#define NPHY_RSSICAL_W1_TARGET_REV3 29 +#define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 + +#define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 +#define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 +#define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 +#define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - NPHY_RSSICAL_MAXREAD) +#define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS +#define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - NPHY_RSSICAL_MAXREAD) +#define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) +#define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ + ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) +#define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ + ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) +#define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ + ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) + +#define NPHY_IQCAL_NUMGAINS 9 +#define NPHY_N_GCTL 0x66 + +#define NPHY_PAPD_EPS_TBL_SIZE 64 +#define NPHY_PAPD_SCL_TBL_SIZE 64 +#define NPHY_NUM_DIG_FILT_COEFFS 15 + +#define NPHY_PAPD_COMP_OFF 0 +#define NPHY_PAPD_COMP_ON 1 + +#define NPHY_SROM_TEMPSHIFT 32 +#define NPHY_SROM_MAXTEMPOFFSET 16 +#define NPHY_SROM_MINTEMPOFFSET -16 + +#define NPHY_CAL_MAXTEMPDELTA 64 + +#define NPHY_NOISEVAR_TBLLEN40 256 +#define NPHY_NOISEVAR_TBLLEN20 128 + +#define NPHY_ANARXLPFBW_REDUCTIONFACT 7 + +#define NPHY_ADJUSTED_MINCRSPOWER 0x1e + +/* 5357 Chip specific ChipControl register bits */ +#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ +#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ + +typedef struct _nphy_iqcal_params { + u16 txlpf; + u16 txgm; + u16 pga; + u16 pad; + u16 ipa; + u16 cal_gain; + u16 ncorr[5]; +} nphy_iqcal_params_t; + +typedef struct _nphy_txiqcal_ladder { + u8 percent; + u8 g_env; +} nphy_txiqcal_ladder_t; + +typedef struct { + nphy_txgains_t gains; + bool useindex; + u8 index; +} nphy_ipa_txcalgains_t; + +typedef struct nphy_papd_restore_state_t { + u16 fbmix[2]; + u16 vga_master[2]; + u16 intpa_master[2]; + u16 afectrl[2]; + u16 afeoverride[2]; + u16 pwrup[2]; + u16 atten[2]; + u16 mm; +} nphy_papd_restore_state; + +typedef struct _nphy_ipa_txrxgain { + u16 hpvga; + u16 lpf_biq1; + u16 lpf_biq0; + u16 lna2; + u16 lna1; + s8 txpwrindex; +} nphy_ipa_txrxgain_t; + +#define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) + +nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz[] = { {0, 0, 0, 0, 0, 100}, +{0, 0, 0, 0, 0, 50}, +{0, 0, 0, 0, 0, -1}, +{0, 0, 0, 3, 0, -1}, +{0, 0, 3, 3, 0, -1}, +{0, 2, 3, 3, 0, -1} +}; + +nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz[] = { {0, 0, 0, 0, 0, 128}, +{0, 0, 0, 0, 0, 70}, +{0, 0, 0, 0, 0, 20}, +{0, 0, 0, 3, 0, 20}, +{0, 0, 3, 3, 0, 20}, +{0, 2, 3, 3, 0, 20} +}; + +nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { {0, 0, 0, 0, 0, 100}, +{0, 0, 0, 0, 0, 50}, +{0, 0, 0, 0, 0, -1}, +{0, 0, 0, 3, 0, -1}, +{0, 0, 3, 3, 0, -1}, +{0, 0, 5, 3, 0, -1} +}; + +nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { {0, 0, 0, 0, 0, 10}, +{0, 0, 0, 1, 0, 10}, +{0, 0, 1, 2, 0, 10}, +{0, 0, 1, 3, 0, 10}, +{0, 0, 4, 3, 0, 10}, +{0, 0, 6, 3, 0, 10} +}; + +#define NPHY_RXCAL_TONEAMP 181 +#define NPHY_RXCAL_TONEFREQ_40MHz 4000 +#define NPHY_RXCAL_TONEFREQ_20MHz 2000 + +enum { + NPHY_RXCAL_GAIN_INIT = 0, + NPHY_RXCAL_GAIN_UP, + NPHY_RXCAL_GAIN_DOWN +}; + +#define wlc_phy_get_papd_nphy(pi) \ + (read_phy_reg((pi), 0x1e7) & \ + ((0x1 << 15) | \ + (0x1 << 14) | \ + (0x1 << 13))) + +#define TXFILT_SHAPING_OFDM20 0 +#define TXFILT_SHAPING_OFDM40 1 +#define TXFILT_SHAPING_CCK 2 +#define TXFILT_DEFAULT_OFDM20 3 +#define TXFILT_DEFAULT_OFDM40 4 + +u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { + {-377, 137, -407, 208, -1527, 956, 93, 186, 93, + 230, -44, 230, 201, -191, 201}, + {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, + 26, 34, -32, 34}, + {-360, 164, -376, 164, -1533, 576, 308, -314, 308, + 121, -73, 121, 91, 124, 91}, + {-295, 200, -363, 142, -1391, 826, 151, 301, 151, + 151, 301, 151, 602, -752, 602}, + {-92, 58, -96, 49, -104, 44, 17, 35, 17, + 12, 25, 12, 13, 27, 13}, + {-375, 136, -399, 209, -1479, 949, 130, 260, 130, + 230, -44, 230, 201, -191, 201}, + {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, + 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} +}; + +typedef struct _chan_info_nphy_2055 { + u16 chan; + u16 freq; + uint unknown; + u8 RF_pll_ref; + u8 RF_rf_pll_mod1; + u8 RF_rf_pll_mod0; + u8 RF_vco_cap_tail; + u8 RF_vco_cal1; + u8 RF_vco_cal2; + u8 RF_pll_lf_c1; + u8 RF_pll_lf_r1; + u8 RF_pll_lf_c2; + u8 RF_lgbuf_cen_buf; + u8 RF_lgen_tune1; + u8 RF_lgen_tune2; + u8 RF_core1_lgbuf_a_tune; + u8 RF_core1_lgbuf_g_tune; + u8 RF_core1_rxrf_reg1; + u8 RF_core1_tx_pga_pad_tn; + u8 RF_core1_tx_mx_bgtrim; + u8 RF_core2_lgbuf_a_tune; + u8 RF_core2_lgbuf_g_tune; + u8 RF_core2_rxrf_reg1; + u8 RF_core2_tx_pga_pad_tn; + u8 RF_core2_tx_mx_bgtrim; + u16 PHY_BW1a; + u16 PHY_BW2; + u16 PHY_BW3; + u16 PHY_BW4; + u16 PHY_BW5; + u16 PHY_BW6; +} chan_info_nphy_2055_t; + +typedef struct _chan_info_nphy_radio205x { + u16 chan; + u16 freq; + u8 RF_SYN_pll_vcocal1; + u8 RF_SYN_pll_vcocal2; + u8 RF_SYN_pll_refdiv; + u8 RF_SYN_pll_mmd2; + u8 RF_SYN_pll_mmd1; + u8 RF_SYN_pll_loopfilter1; + u8 RF_SYN_pll_loopfilter2; + u8 RF_SYN_pll_loopfilter3; + u8 RF_SYN_pll_loopfilter4; + u8 RF_SYN_pll_loopfilter5; + u8 RF_SYN_reserved_addr27; + u8 RF_SYN_reserved_addr28; + u8 RF_SYN_reserved_addr29; + u8 RF_SYN_logen_VCOBUF1; + u8 RF_SYN_logen_MIXER2; + u8 RF_SYN_logen_BUF3; + u8 RF_SYN_logen_BUF4; + u8 RF_RX0_lnaa_tune; + u8 RF_RX0_lnag_tune; + u8 RF_TX0_intpaa_boost_tune; + u8 RF_TX0_intpag_boost_tune; + u8 RF_TX0_pada_boost_tune; + u8 RF_TX0_padg_boost_tune; + u8 RF_TX0_pgaa_boost_tune; + u8 RF_TX0_pgag_boost_tune; + u8 RF_TX0_mixa_boost_tune; + u8 RF_TX0_mixg_boost_tune; + u8 RF_RX1_lnaa_tune; + u8 RF_RX1_lnag_tune; + u8 RF_TX1_intpaa_boost_tune; + u8 RF_TX1_intpag_boost_tune; + u8 RF_TX1_pada_boost_tune; + u8 RF_TX1_padg_boost_tune; + u8 RF_TX1_pgaa_boost_tune; + u8 RF_TX1_pgag_boost_tune; + u8 RF_TX1_mixa_boost_tune; + u8 RF_TX1_mixg_boost_tune; + u16 PHY_BW1a; + u16 PHY_BW2; + u16 PHY_BW3; + u16 PHY_BW4; + u16 PHY_BW5; + u16 PHY_BW6; +} chan_info_nphy_radio205x_t; + +typedef struct _chan_info_nphy_radio2057 { + u16 chan; + u16 freq; + u8 RF_vcocal_countval0; + u8 RF_vcocal_countval1; + u8 RF_rfpll_refmaster_sparextalsize; + u8 RF_rfpll_loopfilter_r1; + u8 RF_rfpll_loopfilter_c2; + u8 RF_rfpll_loopfilter_c1; + u8 RF_cp_kpd_idac; + u8 RF_rfpll_mmd0; + u8 RF_rfpll_mmd1; + u8 RF_vcobuf_tune; + u8 RF_logen_mx2g_tune; + u8 RF_logen_mx5g_tune; + u8 RF_logen_indbuf2g_tune; + u8 RF_logen_indbuf5g_tune; + u8 RF_txmix2g_tune_boost_pu_core0; + u8 RF_pad2g_tune_pus_core0; + u8 RF_pga_boost_tune_core0; + u8 RF_txmix5g_boost_tune_core0; + u8 RF_pad5g_tune_misc_pus_core0; + u8 RF_lna2g_tune_core0; + u8 RF_lna5g_tune_core0; + u8 RF_txmix2g_tune_boost_pu_core1; + u8 RF_pad2g_tune_pus_core1; + u8 RF_pga_boost_tune_core1; + u8 RF_txmix5g_boost_tune_core1; + u8 RF_pad5g_tune_misc_pus_core1; + u8 RF_lna2g_tune_core1; + u8 RF_lna5g_tune_core1; + u16 PHY_BW1a; + u16 PHY_BW2; + u16 PHY_BW3; + u16 PHY_BW4; + u16 PHY_BW5; + u16 PHY_BW6; +} chan_info_nphy_radio2057_t; + +typedef struct _chan_info_nphy_radio2057_rev5 { + u16 chan; + u16 freq; + u8 RF_vcocal_countval0; + u8 RF_vcocal_countval1; + u8 RF_rfpll_refmaster_sparextalsize; + u8 RF_rfpll_loopfilter_r1; + u8 RF_rfpll_loopfilter_c2; + u8 RF_rfpll_loopfilter_c1; + u8 RF_cp_kpd_idac; + u8 RF_rfpll_mmd0; + u8 RF_rfpll_mmd1; + u8 RF_vcobuf_tune; + u8 RF_logen_mx2g_tune; + u8 RF_logen_indbuf2g_tune; + u8 RF_txmix2g_tune_boost_pu_core0; + u8 RF_pad2g_tune_pus_core0; + u8 RF_lna2g_tune_core0; + u8 RF_txmix2g_tune_boost_pu_core1; + u8 RF_pad2g_tune_pus_core1; + u8 RF_lna2g_tune_core1; + u16 PHY_BW1a; + u16 PHY_BW2; + u16 PHY_BW3; + u16 PHY_BW4; + u16 PHY_BW5; + u16 PHY_BW6; +} chan_info_nphy_radio2057_rev5_t; + +typedef struct nphy_sfo_cfg { + u16 PHY_BW1a; + u16 PHY_BW2; + u16 PHY_BW3; + u16 PHY_BW4; + u16 PHY_BW5; + u16 PHY_BW6; +} nphy_sfo_cfg_t; + +static chan_info_nphy_2055_t chan_info_nphy_2055[] = { + { + 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, + { + 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, + { + 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, + { + 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, + { + 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, + { + 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, + { + 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, + { + 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, + { + 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, + { + 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, + { + 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, + { + 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, + { + 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, + { + 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, + 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, + { + 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, + 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, + { + 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, + 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, + 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, + { + 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, + 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, + 0x0F, 0x8D, 0x7F4, 0x7F0, 0x7EC, 0x203, 0x204, 0x205}, + { + 218, 5090, 3393, 0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, + 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, + 0x0F, 0x8D, 0x7F8, 0x7F4, 0x7F0, 0x202, 0x203, 0x204}, + { + 220, 5100, 3400, 0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A, + 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x8D, 0xEE, 0x00, 0x0D, + 0x0F, 0x8D, 0x7FC, 0x7F8, 0x7F4, 0x201, 0x202, 0x203}, + { + 222, 5110, 3407, 0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A, + 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x8D, 0xEE, 0x00, 0x0D, + 0x0F, 0x8D, 0x800, 0x7FC, 0x7F8, 0x200, 0x201, 0x202}, + { + 224, 5120, 3413, 0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A, + 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x8C, 0xDD, 0x00, 0x0D, + 0x0F, 0x8C, 0x804, 0x800, 0x7FC, 0x1FF, 0x200, 0x201}, + { + 226, 5130, 3420, 0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A, + 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x8C, 0xDD, 0x00, 0x0D, + 0x0F, 0x8C, 0x808, 0x804, 0x800, 0x1FE, 0x1FF, 0x200}, + { + 228, 5140, 3427, 0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A, + 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E, 0x8B, 0xDD, 0x00, 0x0C, + 0x0E, 0x8B, 0x80C, 0x808, 0x804, 0x1FD, 0x1FE, 0x1FF}, + { + 32, 5160, 3440, 0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A, + 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x8A, 0xCC, 0x00, 0x0B, + 0x0D, 0x8A, 0x814, 0x810, 0x80C, 0x1FB, 0x1FC, 0x1FD}, + { + 34, 5170, 3447, 0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A, + 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x8A, 0xCC, 0x00, 0x0B, + 0x0D, 0x8A, 0x818, 0x814, 0x810, 0x1FA, 0x1FB, 0x1FC}, + { + 36, 5180, 3453, 0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A, + 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x89, 0xCC, 0x00, 0x0B, + 0x0C, 0x89, 0x81C, 0x818, 0x814, 0x1F9, 0x1FA, 0x1FB}, + { + 38, 5190, 3460, 0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A, + 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x89, 0xCC, 0x00, 0x0B, + 0x0C, 0x89, 0x820, 0x81C, 0x818, 0x1F8, 0x1F9, 0x1FA}, + { + 40, 5200, 3467, 0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A, + 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x89, 0xBB, 0x00, 0x0A, + 0x0B, 0x89, 0x824, 0x820, 0x81C, 0x1F7, 0x1F8, 0x1F9}, + { + 42, 5210, 3473, 0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A, + 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x89, 0xBB, 0x00, 0x0A, + 0x0B, 0x89, 0x828, 0x824, 0x820, 0x1F6, 0x1F7, 0x1F8}, + { + 44, 5220, 3480, 0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A, + 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x88, 0xBB, 0x00, 0x09, + 0x0A, 0x88, 0x82C, 0x828, 0x824, 0x1F5, 0x1F6, 0x1F7}, + { + 46, 5230, 3487, 0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A, + 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x88, 0xBB, 0x00, 0x09, + 0x0A, 0x88, 0x830, 0x82C, 0x828, 0x1F4, 0x1F5, 0x1F6}, + { + 48, 5240, 3493, 0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A, + 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x87, 0xAA, 0x00, 0x09, + 0x0A, 0x87, 0x834, 0x830, 0x82C, 0x1F3, 0x1F4, 0x1F5}, + { + 50, 5250, 3500, 0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A, + 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x87, 0xAA, 0x00, 0x09, + 0x0A, 0x87, 0x838, 0x834, 0x830, 0x1F2, 0x1F3, 0x1F4}, + { + 52, 5260, 3507, 0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A, + 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x87, 0xAA, 0x00, 0x08, + 0x09, 0x87, 0x83C, 0x838, 0x834, 0x1F1, 0x1F2, 0x1F3}, + { + 54, 5270, 3513, 0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A, + 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x87, 0xAA, 0x00, 0x08, + 0x09, 0x87, 0x840, 0x83C, 0x838, 0x1F0, 0x1F1, 0x1F2}, + { + 56, 5280, 3520, 0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A, + 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, 0x86, 0x99, 0x00, 0x08, + 0x08, 0x86, 0x844, 0x840, 0x83C, 0x1F0, 0x1F0, 0x1F1}, + { + 58, 5290, 3527, 0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A, + 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, 0x86, 0x99, 0x00, 0x08, + 0x08, 0x86, 0x848, 0x844, 0x840, 0x1EF, 0x1F0, 0x1F0}, + { + 60, 5300, 3533, 0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A, + 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, 0x85, 0x99, 0x00, 0x08, + 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0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x918, 0x914, 0x910, 0x1C2, 0x1C3, 0x1C4}, + { + 163, 5815, 3877, 0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x91A, 0x916, 0x912, 0x1C2, 0x1C3, 0x1C4}, + { + 164, 5820, 3880, 0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x91C, 0x918, 0x914, 0x1C2, 0x1C2, 0x1C3}, + { + 165, 5825, 3883, 0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x91E, 0x91A, 0x916, 0x1C1, 0x1C2, 0x1C3}, + { + 166, 5830, 3887, 0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x920, 0x91C, 0x918, 0x1C1, 0x1C2, 0x1C2}, + { + 168, 5840, 3893, 0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x924, 0x920, 0x91C, 0x1C0, 0x1C1, 0x1C2}, + { + 170, 5850, 3900, 0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x928, 0x924, 0x920, 0x1BF, 0x1C0, 0x1C1}, + { + 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, + { + 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, + { + 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, + { + 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, + { + 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, + { + 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, + 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, + { + 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, + 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, + { + 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, + 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, + { + 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, + 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, + { + 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, + 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, + { + 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, + 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, + { + 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, + 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, + { + 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, + 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, + { + 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, + 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, + { + 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, + 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, + { + 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, + 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, + { + 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, + 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, + { + 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, + 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, + { + 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, + 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, + { + 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, + 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, + 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev3_2056[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, + { + 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, + { + 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, + { + 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, + { + 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, + { + 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, + { + 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, + 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, + 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, + { + 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, + 0x00, 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0x8f, 0x30, 0x00, 0x00, 0x00, 0xf7, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0f, 0x00, 0xf7, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0f, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, + { + 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf6, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0f, 0x00, 0xf6, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0f, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, + { + 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf5, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0d, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, + { + 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf4, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0d, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, + { + 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf3, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0d, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, + { + 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0d, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev4_2056_A1[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, + { + 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, + { + 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, + { + 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, + { + 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, + { + 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, + { + 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, + { + 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, + { + 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, + { + 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, + { + 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, + { + 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, + { + 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, + { + 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, + { + 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, + { + 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, + { + 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, + { + 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xfe, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, + { + 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, + 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, + 0x00, 0xfe, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, + { + 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 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0x0429, 0x042d, 0x0431}, + { + 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0e, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, + { + 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0e, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, + { + 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0e, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, + { + 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0e, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, + 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, + 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev5_2056v5[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, + 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, + 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, + 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, + { + 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, + 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, + 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, + { + 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, + 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, + 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, + { + 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, + 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, + { + 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, + { + 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, + { + 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, + { + 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, + { + 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, + { + 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, + { + 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, + 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, + { + 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, + 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, + { + 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, + 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, + { + 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, + 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, + { + 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, + { + 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, + { + 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, + { + 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 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0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, + { + 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, + 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, + 0x00, 0x6f, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, + { + 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, + 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, + 0x00, 0x6e, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, + { + 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, + 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, + 0x00, 0x6e, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, + { + 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, + 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0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v6[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, + { + 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, + { + 190, 4950, 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0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, + 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, + 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, + 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, + 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev5n6_2056v7[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, + 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 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0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, + 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, + { + 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, + { + 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, + { + 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, + { + 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, + { + 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, + { + 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, + 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, + 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, + { + 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 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0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, + { + 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, + { + 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, + { + 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, + 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, + 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, + { + 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 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0x02, 0x00, 0x70, 0x00, + 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v8[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, + { + 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, + { + 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, + { + 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, + { + 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, + 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, + { + 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 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0x03d7, 0x0422, 0x0427, 0x042b}, + { + 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, + 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, + 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, + 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, + 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, + 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v11[] = { + { + 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, + 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, + 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, + 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, + { + 186, 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0x042b, + 0x042f, + 0x0434, + }, + { + 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, + 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, + 0x042d, + 0x0431, + }, + { + 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, + 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, + 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, + 0x042b, + 0x042f, + }, + { + 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, + 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, + 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, + 0x0429, + 0x042d, + }, + { + 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, + 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, + 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, + 0x0427, + 0x042b, + }, + { + 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, + 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, + 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, + 0x0424, + 0x0429, + }, + { + 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, + 0x04, 0x00, 0x04, 0x00, 0x11, 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x11, + 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, + 0x041f, + 0x0424} +}; + +static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev8_2057_rev5[] = { + { + 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, + 0x043a, 0x043f, 0x0443}, + { + 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, + 0x0438, 0x043d, 0x0441}, + { + 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, + 0x0436, 0x043a, 0x043f}, + { + 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, + 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, + 0x0434, 0x0438, 0x043d}, + { + 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, + 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, + 0x0431, 0x0436, 0x043a}, + { + 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, + 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, + 0x042f, 0x0434, 0x0438}, + { + 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, + 0x042d, 0x0431, 0x0436}, + { + 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, + 0x042b, 0x042f, 0x0434}, + { + 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, + 0x0429, 0x042d, 0x0431}, + { + 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, + 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, + 0x0427, 0x042b, 0x042f}, + { + 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, + 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, + 0x0424, 0x0429, 0x042d}, + { + 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, + 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, + 0x0422, 0x0427, 0x042b}, + { + 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, + 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, + 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, + 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, + 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev9_2057_rev5v1[] = { + { + 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, + 0x043a, 0x043f, 0x0443}, + { + 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, + 0x0438, 0x043d, 0x0441}, + { + 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, + 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, + 0x0436, 0x043a, 0x043f}, + { + 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, + 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, + 0x0434, 0x0438, 0x043d}, + { + 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, + 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, + 0x0431, 0x0436, 0x043a}, + { + 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, + 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, + 0x042f, 0x0434, 0x0438}, + { + 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, + 0x042d, 0x0431, 0x0436}, + { + 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, + 0x042b, 0x042f, 0x0434}, + { + 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, + 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, + 0x0429, 0x042d, 0x0431}, + { + 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, + 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, + 0x0427, 0x042b, 0x042f}, + { + 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, + 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, + 0x0424, 0x0429, 0x042d}, + { + 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, + 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, + 0x0422, 0x0427, 0x042b}, + { + 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, + 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, + 0x0420, 0x0424, 0x0429}, + { + 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, + 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, + 0x041b, 0x041f, 0x0424} +}; + +static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev7[] = { + { + 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b4, 0x07b0, 0x07ac, 0x0214, + 0x0215, + 0x0216}, + { + 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, + 0x0214, + 0x0215}, + { + 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, + 0x0213, + 0x0214}, + { + 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, + 0x0212, + 0x0213}, + { + 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, + 0x0211, + 0x0212}, + { + 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 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0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, + 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, + 0x0424, + 0x0429}, + { + 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, + 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, + 0x041f, + 0x0424} +}; + +static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev8[] = { + { + 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, + 0x0214, + 0x0215}, + { + 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, + 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, + 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, + 0x0213, + 0x0214}, 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5815, 0x92, 0x17, 0x20, 0x14, 0x08, 0x08, 0x30, 0x8b, 0x04, 0x05, + 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x091a, 0x0916, 0x0912, 0x01c2, + 0x01c3, + 0x01c4}, + { + 164, 5820, 0x94, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x46, 0x02, 0x05, + 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, + 0x01c2, + 0x01c3}, + { + 165, 5825, 0x95, 0x17, 0x20, 0x14, 0x08, 0x08, 0x30, 0x8d, 0x04, 0x05, + 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, + 0x01c2, + 0x01c3}, + { + 166, 5830, 0x97, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x47, 0x02, 0x05, + 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, + 0x01c2, + 0x01c2}, + { + 168, 5840, 0x9a, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x48, 0x02, 0x05, + 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, + 0x01c1, + 0x01c2}, + { + 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, + 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, + 0x01c0, + 0x01c1}, + { + 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, + 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, + 0x01bf, + 0x01c0}, + { + 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, + 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, + 0x01bf, + 0x01bf}, + { + 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, + 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, + 0x01be, + 0x01bf}, + { + 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, + 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, + 0x01bd, + 0x01be}, + { + 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, + 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, + 0x01bc, + 0x01bd}, + { + 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, + 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, + 0x043f, + 0x0443}, + { + 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, + 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, + 0x043d, + 0x0441}, + { + 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, + 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, + 0x043a, + 0x043f}, + { + 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, + 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, + 0x0438, + 0x043d}, + { + 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, + 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, + 0x0436, + 0x043a}, + { + 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, + 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, + 0x0434, + 0x0438}, + { + 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, + 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, + 0x0431, + 0x0436}, + { + 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, + 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, + 0x042f, + 0x0434}, + { + 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, + 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, + 0x042d, + 0x0431}, + { + 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, + 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, + 0x042b, + 0x042f}, + { + 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, + 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, + 0x0429, + 0x042d}, + { + 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, + 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, + 0x0427, + 0x042b}, + { + 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, + 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, + 0x0424, + 0x0429}, + { + 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, + 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, + 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, + 0x041f, + 0x0424} +}; + +radio_regs_t regs_2055[] = { + {0x02, 0x80, 0x80, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0x27, 0x27, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0x27, 0x27, 0, 0}, + {0x07, 0x7f, 0x7f, 1, 1}, + {0x08, 0x7, 0x7, 1, 1}, + {0x09, 0x7f, 0x7f, 1, 1}, + {0x0A, 0x7, 0x7, 1, 1}, + {0x0B, 0x15, 0x15, 0, 0}, + {0x0C, 0x15, 0x15, 0, 0}, + {0x0D, 0x4f, 0x4f, 1, 1}, + {0x0E, 0x5, 0x5, 1, 1}, + {0x0F, 0x4f, 0x4f, 1, 1}, + {0x10, 0x5, 0x5, 1, 1}, + {0x11, 0xd0, 0xd0, 0, 0}, + {0x12, 0x2, 0x2, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0x40, 0x40, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0xc0, 0xc0, 0, 0}, + {0x1E, 0xff, 0xff, 0, 0}, + {0x1F, 0xc0, 0xc0, 0, 0}, + {0x20, 0xff, 0xff, 0, 0}, + {0x21, 0xc0, 0xc0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x2c, 0x2c, 0, 0}, + {0x24, 0, 0, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0xa4, 0xa4, 0, 0}, + {0x2E, 0x38, 0x38, 0, 0}, + {0x2F, 0, 0, 0, 0}, + {0x30, 0x4, 0x4, 1, 1}, + {0x31, 0, 0, 0, 0}, + {0x32, 0xa, 0xa, 0, 0}, + {0x33, 0x87, 0x87, 0, 0}, + {0x34, 0x9, 0x9, 0, 0}, + {0x35, 0x70, 0x70, 0, 0}, + {0x36, 0x11, 0x11, 0, 0}, + {0x37, 0x18, 0x18, 1, 1}, + {0x38, 0x6, 0x6, 0, 0}, + {0x39, 0x4, 0x4, 1, 1}, + {0x3A, 0x6, 0x6, 0, 0}, + {0x3B, 0x9e, 0x9e, 0, 0}, + {0x3C, 0x9, 0x9, 0, 0}, + {0x3D, 0xc8, 0xc8, 1, 1}, + {0x3E, 0x88, 0x88, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0, 0, 0, 0}, + {0x42, 0x1, 0x1, 0, 0}, + {0x43, 0x2, 0x2, 0, 0}, + {0x44, 0x96, 0x96, 0, 0}, + {0x45, 0x3e, 0x3e, 0, 0}, + {0x46, 0x3e, 0x3e, 0, 0}, + {0x47, 0x13, 0x13, 0, 0}, + {0x48, 0x2, 0x2, 0, 0}, + {0x49, 0x15, 0x15, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0, 0, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0, 0, 0, 0}, + {0x50, 0x8, 0x8, 0, 0}, + {0x51, 0x8, 0x8, 0, 0}, + {0x52, 0x6, 0x6, 0, 0}, + {0x53, 0x84, 0x84, 1, 1}, + {0x54, 0xc3, 0xc3, 0, 0}, + {0x55, 0x8f, 0x8f, 0, 0}, + {0x56, 0xff, 0xff, 0, 0}, + {0x57, 0xff, 0xff, 0, 0}, + {0x58, 0x88, 0x88, 0, 0}, + {0x59, 0x88, 0x88, 0, 0}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0xcc, 0xcc, 0, 0}, + {0x5C, 0x6, 0x6, 0, 0}, + {0x5D, 0x80, 0x80, 0, 0}, + {0x5E, 0x80, 0x80, 0, 0}, + {0x5F, 0xf8, 0xf8, 0, 0}, + {0x60, 0x88, 0x88, 0, 0}, + {0x61, 0x88, 0x88, 0, 0}, + {0x62, 0x88, 0x8, 1, 1}, + {0x63, 0x88, 0x88, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0x1, 0x1, 1, 1}, + {0x66, 0x8a, 0x8a, 0, 0}, + {0x67, 0x8, 0x8, 0, 0}, + {0x68, 0x83, 0x83, 0, 0}, + {0x69, 0x6, 0x6, 0, 0}, + {0x6A, 0xa0, 0xa0, 0, 0}, + {0x6B, 0xa, 0xa, 0, 0}, + {0x6C, 0x87, 0x87, 1, 1}, + {0x6D, 0x2a, 0x2a, 0, 0}, + {0x6E, 0x2a, 0x2a, 0, 0}, + {0x6F, 0x2a, 0x2a, 0, 0}, + {0x70, 0x2a, 0x2a, 0, 0}, + {0x71, 0x18, 0x18, 0, 0}, + {0x72, 0x6a, 0x6a, 1, 1}, + {0x73, 0xab, 0xab, 1, 1}, + {0x74, 0x13, 0x13, 1, 1}, + {0x75, 0xc1, 0xc1, 1, 1}, + {0x76, 0xaa, 0xaa, 1, 1}, + {0x77, 0x87, 0x87, 1, 1}, + {0x78, 0, 0, 0, 0}, + {0x79, 0x6, 0x6, 0, 0}, + {0x7A, 0x7, 0x7, 0, 0}, + {0x7B, 0x7, 0x7, 0, 0}, + {0x7C, 0x15, 0x15, 0, 0}, + {0x7D, 0x55, 0x55, 0, 0}, + {0x7E, 0x97, 0x97, 1, 1}, + {0x7F, 0x8, 0x8, 0, 0}, + {0x80, 0x14, 0x14, 1, 1}, + {0x81, 0x33, 0x33, 0, 0}, + {0x82, 0x88, 0x88, 0, 0}, + {0x83, 0x6, 0x6, 0, 0}, + {0x84, 0x3, 0x3, 1, 1}, + {0x85, 0xa, 0xa, 0, 0}, + {0x86, 0x3, 0x3, 1, 1}, + {0x87, 0x2a, 0x2a, 0, 0}, + {0x88, 0xa4, 0xa4, 0, 0}, + {0x89, 0x18, 0x18, 0, 0}, + {0x8A, 0x28, 0x28, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0x4a, 0x4a, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0xf8, 0xf8, 0, 0}, + {0x8F, 0x88, 0x88, 0, 0}, + {0x90, 0x88, 0x88, 0, 0}, + {0x91, 0x88, 0x8, 1, 1}, + {0x92, 0x88, 0x88, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0x1, 0x1, 1, 1}, + {0x95, 0x8a, 0x8a, 0, 0}, + {0x96, 0x8, 0x8, 0, 0}, + {0x97, 0x83, 0x83, 0, 0}, + {0x98, 0x6, 0x6, 0, 0}, + {0x99, 0xa0, 0xa0, 0, 0}, + {0x9A, 0xa, 0xa, 0, 0}, + {0x9B, 0x87, 0x87, 1, 1}, + {0x9C, 0x2a, 0x2a, 0, 0}, + {0x9D, 0x2a, 0x2a, 0, 0}, + {0x9E, 0x2a, 0x2a, 0, 0}, + {0x9F, 0x2a, 0x2a, 0, 0}, + {0xA0, 0x18, 0x18, 0, 0}, + {0xA1, 0x6a, 0x6a, 1, 1}, + {0xA2, 0xab, 0xab, 1, 1}, + {0xA3, 0x13, 0x13, 1, 1}, + {0xA4, 0xc1, 0xc1, 1, 1}, + {0xA5, 0xaa, 0xaa, 1, 1}, + {0xA6, 0x87, 0x87, 1, 1}, + {0xA7, 0, 0, 0, 0}, + {0xA8, 0x6, 0x6, 0, 0}, + {0xA9, 0x7, 0x7, 0, 0}, + {0xAA, 0x7, 0x7, 0, 0}, + {0xAB, 0x15, 0x15, 0, 0}, + {0xAC, 0x55, 0x55, 0, 0}, + {0xAD, 0x97, 0x97, 1, 1}, + {0xAE, 0x8, 0x8, 0, 0}, + {0xAF, 0x14, 0x14, 1, 1}, + {0xB0, 0x33, 0x33, 0, 0}, + {0xB1, 0x88, 0x88, 0, 0}, + {0xB2, 0x6, 0x6, 0, 0}, + {0xB3, 0x3, 0x3, 1, 1}, + {0xB4, 0xa, 0xa, 0, 0}, + {0xB5, 0x3, 0x3, 1, 1}, + {0xB6, 0x2a, 0x2a, 0, 0}, + {0xB7, 0xa4, 0xa4, 0, 0}, + {0xB8, 0x18, 0x18, 0, 0}, + {0xB9, 0x28, 0x28, 0, 0}, + {0xBA, 0, 0, 0, 0}, + {0xBB, 0x4a, 0x4a, 0, 0}, + {0xBC, 0, 0, 0, 0}, + {0xBD, 0x71, 0x71, 0, 0}, + {0xBE, 0x72, 0x72, 0, 0}, + {0xBF, 0x73, 0x73, 0, 0}, + {0xC0, 0x74, 0x74, 0, 0}, + {0xC1, 0x75, 0x75, 0, 0}, + {0xC2, 0x76, 0x76, 0, 0}, + {0xC3, 0x77, 0x77, 0, 0}, + {0xC4, 0x78, 0x78, 0, 0}, + {0xC5, 0x79, 0x79, 0, 0}, + {0xC6, 0x7a, 0x7a, 0, 0}, + {0xC7, 0, 0, 0, 0}, + {0xC8, 0, 0, 0, 0}, + {0xC9, 0, 0, 0, 0}, + {0xCA, 0, 0, 0, 0}, + {0xCB, 0, 0, 0, 0}, + {0xCC, 0, 0, 0, 0}, + {0xCD, 0, 0, 0, 0}, + {0xCE, 0x6, 0x6, 0, 0}, + {0xCF, 0, 0, 0, 0}, + {0xD0, 0, 0, 0, 0}, + {0xD1, 0x18, 0x18, 0, 0}, + {0xD2, 0x88, 0x88, 0, 0}, + {0xD3, 0, 0, 0, 0}, + {0xD4, 0, 0, 0, 0}, + {0xD5, 0, 0, 0, 0}, + {0xD6, 0, 0, 0, 0}, + {0xD7, 0, 0, 0, 0}, + {0xD8, 0, 0, 0, 0}, + {0xD9, 0, 0, 0, 0}, + {0xDA, 0x6, 0x6, 0, 0}, + {0xDB, 0, 0, 0, 0}, + {0xDC, 0, 0, 0, 0}, + {0xDD, 0x18, 0x18, 0, 0}, + {0xDE, 0x88, 0x88, 0, 0}, + {0xDF, 0, 0, 0, 0}, + {0xE0, 0, 0, 0, 0}, + {0xE1, 0, 0, 0, 0}, + {0xE2, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_SYN_2056[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0xd, 0xd, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_TX_2056[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0x11, 0x11, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0xf, 0xf, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x2d, 0x2d, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0x74, 0x74, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_RX_2056[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x99, 0x99, 0, 0}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x44, 0x44, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0x44, 0x44, 0, 0}, + {0x40, 0xf, 0xf, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0x50, 0x50, 1, 1}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x99, 0x99, 0, 0}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x44, 0x44, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x66, 0x66, 0, 0}, + {0x50, 0x66, 0x66, 0, 0}, + {0x51, 0x57, 0x57, 0, 0}, + {0x52, 0x57, 0x57, 0, 0}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x23, 0x23, 0, 0}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0x2, 0x2, 0, 0}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_SYN_2056_A1[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0xd, 0xd, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_TX_2056_A1[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0x11, 0x11, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0xf, 0xf, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x2d, 0x2d, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0x72, 0x72, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_RX_2056_A1[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x44, 0x44, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0x44, 0x44, 0, 0}, + {0x40, 0xf, 0xf, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0x50, 0x50, 1, 1}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x44, 0x44, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x2f, 0x2f, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_SYN_2056_rev5[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_TX_2056_rev5[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0x11, 0x11, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0xf, 0xf, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x2d, 0x2d, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0x70, 0x70, 0, 0}, + {0x94, 0x70, 0x70, 0, 0}, + {0x95, 0x71, 0x71, 1, 1}, + {0x96, 0x71, 0x71, 1, 1}, + {0x97, 0x72, 0x72, 1, 1}, + {0x98, 0x73, 0x73, 1, 1}, + {0x99, 0x74, 0x74, 1, 1}, + {0x9A, 0x75, 0x75, 1, 1}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_RX_2056_rev5[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x88, 0x88, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 1, 1}, + {0x40, 0x7, 0x7, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0, 0, 1, 1}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x4, 0x4, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_SYN_2056_rev6[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_TX_2056_rev6[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0xee, 0xee, 1, 1}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0x50, 0x50, 1, 1}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x50, 0x50, 1, 1}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0x30, 0x30, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0x70, 0x70, 0, 0}, + {0x94, 0x70, 0x70, 0, 0}, + {0x95, 0x70, 0x70, 0, 0}, + {0x96, 0x70, 0x70, 0, 0}, + {0x97, 0x70, 0x70, 0, 0}, + {0x98, 0x70, 0x70, 0, 0}, + {0x99, 0x70, 0x70, 0, 0}, + {0x9A, 0x70, 0x70, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_RX_2056_rev6[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x88, 0x88, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0x44, 0x44, 0, 0}, + {0x40, 0x7, 0x7, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x44, 0x44, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x4, 0x4, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0x5, 0x5, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0} +}; + +radio_regs_t regs_SYN_2056_rev7[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_TX_2056_rev7[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0xee, 0xee, 1, 1}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0x50, 0x50, 1, 1}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x50, 0x50, 1, 1}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0x30, 0x30, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0x70, 0x70, 0, 0}, + {0x94, 0x70, 0x70, 0, 0}, + {0x95, 0x71, 0x71, 1, 1}, + {0x96, 0x71, 0x71, 1, 1}, + {0x97, 0x72, 0x72, 1, 1}, + {0x98, 0x73, 0x73, 1, 1}, + {0x99, 0x74, 0x74, 1, 1}, + {0x9A, 0x75, 0x75, 1, 1}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_RX_2056_rev7[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x88, 0x88, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 1, 1}, + {0x40, 0x7, 0x7, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0, 0, 1, 1}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x4, 0x4, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_SYN_2056_rev8[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x4, 0x4, 0, 0}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x30, 0x30, 0, 0}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0xd, 0xd, 0, 0}, + {0x4C, 0xd, 0xd, 0, 0}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x6, 0x6, 0, 0}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_TX_2056_rev8[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0xee, 0xee, 1, 1}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0x50, 0x50, 1, 1}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x50, 0x50, 1, 1}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0x30, 0x30, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0x70, 0x70, 0, 0}, + {0x94, 0x70, 0x70, 0, 0}, + {0x95, 0x70, 0x70, 0, 0}, + {0x96, 0x70, 0x70, 0, 0}, + {0x97, 0x70, 0x70, 0, 0}, + {0x98, 0x70, 0x70, 0, 0}, + {0x99, 0x70, 0x70, 0, 0}, + {0x9A, 0x70, 0x70, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_RX_2056_rev8[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x88, 0x88, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0x44, 0x44, 0, 0}, + {0x40, 0x7, 0x7, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x44, 0x44, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x4, 0x4, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0x5, 0x5, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_SYN_2056_rev11[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0x1, 0x1, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0x60, 0x60, 0, 0}, + {0x23, 0x6, 0x6, 0, 0}, + {0x24, 0xc, 0xc, 0, 0}, + {0x25, 0, 0, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0, 0, 0, 0}, + {0x28, 0x1, 0x1, 0, 0}, + {0x29, 0, 0, 0, 0}, + {0x2A, 0, 0, 0, 0}, + {0x2B, 0, 0, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0, 0, 0, 0}, + {0x2F, 0x1f, 0x1f, 0, 0}, + {0x30, 0x15, 0x15, 0, 0}, + {0x31, 0xf, 0xf, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0, 0, 0, 0}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0, 0, 0, 0}, + {0x38, 0, 0, 0, 0}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0, 0, 0, 0}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x13, 0x13, 0, 0}, + {0x3D, 0xf, 0xf, 0, 0}, + {0x3E, 0x18, 0x18, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x20, 0x20, 0, 0}, + {0x42, 0x20, 0x20, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x77, 0x77, 0, 0}, + {0x45, 0x7, 0x7, 0, 0}, + {0x46, 0x1, 0x1, 0, 0}, + {0x47, 0x6, 0x6, 1, 1}, + {0x48, 0xf, 0xf, 0, 0}, + {0x49, 0x3f, 0x3f, 1, 1}, + {0x4A, 0x32, 0x32, 0, 0}, + {0x4B, 0x6, 0x6, 1, 1}, + {0x4C, 0x6, 0x6, 1, 1}, + {0x4D, 0x4, 0x4, 0, 0}, + {0x4E, 0x2b, 0x2b, 1, 1}, + {0x4F, 0x1, 0x1, 0, 0}, + {0x50, 0x1c, 0x1c, 0, 0}, + {0x51, 0x2, 0x2, 0, 0}, + {0x52, 0x2, 0x2, 0, 0}, + {0x53, 0xf7, 0xf7, 1, 1}, + {0x54, 0xb4, 0xb4, 0, 0}, + {0x55, 0xd2, 0xd2, 0, 0}, + {0x56, 0, 0, 0, 0}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x4, 0x4, 0, 0}, + {0x59, 0x96, 0x96, 0, 0}, + {0x5A, 0x3e, 0x3e, 0, 0}, + {0x5B, 0x3e, 0x3e, 0, 0}, + {0x5C, 0x13, 0x13, 0, 0}, + {0x5D, 0x2, 0x2, 0, 0}, + {0x5E, 0, 0, 0, 0}, + {0x5F, 0x7, 0x7, 0, 0}, + {0x60, 0x7, 0x7, 1, 1}, + {0x61, 0x8, 0x8, 0, 0}, + {0x62, 0x3, 0x3, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0x40, 0x40, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0x1, 0x1, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0x60, 0x60, 0, 0}, + {0x71, 0x66, 0x66, 0, 0}, + {0x72, 0xc, 0xc, 0, 0}, + {0x73, 0x66, 0x66, 0, 0}, + {0x74, 0x8f, 0x8f, 1, 1}, + {0x75, 0, 0, 0, 0}, + {0x76, 0xcc, 0xcc, 0, 0}, + {0x77, 0x1, 0x1, 0, 0}, + {0x78, 0x66, 0x66, 0, 0}, + {0x79, 0x66, 0x66, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0, 0, 0, 0}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0xff, 0xff, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0x95, 0, 0, 0, 0}, + {0x96, 0, 0, 0, 0}, + {0x97, 0, 0, 0, 0}, + {0x98, 0, 0, 0, 0}, + {0x99, 0, 0, 0, 0}, + {0x9A, 0, 0, 0, 0}, + {0x9B, 0, 0, 0, 0}, + {0x9C, 0, 0, 0, 0}, + {0x9D, 0, 0, 0, 0}, + {0x9E, 0, 0, 0, 0}, + {0x9F, 0x6, 0x6, 0, 0}, + {0xA0, 0x66, 0x66, 0, 0}, + {0xA1, 0x66, 0x66, 0, 0}, + {0xA2, 0x66, 0x66, 0, 0}, + {0xA3, 0x66, 0x66, 0, 0}, + {0xA4, 0x66, 0x66, 0, 0}, + {0xA5, 0x66, 0x66, 0, 0}, + {0xA6, 0x66, 0x66, 0, 0}, + {0xA7, 0x66, 0x66, 0, 0}, + {0xA8, 0x66, 0x66, 0, 0}, + {0xA9, 0x66, 0x66, 0, 0}, + {0xAA, 0x66, 0x66, 0, 0}, + {0xAB, 0x66, 0x66, 0, 0}, + {0xAC, 0x66, 0x66, 0, 0}, + {0xAD, 0x66, 0x66, 0, 0}, + {0xAE, 0x66, 0x66, 0, 0}, + {0xAF, 0x66, 0x66, 0, 0}, + {0xB0, 0x66, 0x66, 0, 0}, + {0xB1, 0x66, 0x66, 0, 0}, + {0xB2, 0x66, 0x66, 0, 0}, + {0xB3, 0xa, 0xa, 0, 0}, + {0xB4, 0, 0, 0, 0}, + {0xB5, 0, 0, 0, 0}, + {0xB6, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_TX_2056_rev11[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0, 0, 0, 0}, + {0x21, 0x88, 0x88, 0, 0}, + {0x22, 0x88, 0x88, 0, 0}, + {0x23, 0x88, 0x88, 0, 0}, + {0x24, 0x88, 0x88, 0, 0}, + {0x25, 0xc, 0xc, 0, 0}, + {0x26, 0, 0, 0, 0}, + {0x27, 0x3, 0x3, 0, 0}, + {0x28, 0, 0, 0, 0}, + {0x29, 0x3, 0x3, 0, 0}, + {0x2A, 0x37, 0x37, 0, 0}, + {0x2B, 0x3, 0x3, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0, 0, 0, 0}, + {0x2E, 0x1, 0x1, 0, 0}, + {0x2F, 0x1, 0x1, 0, 0}, + {0x30, 0, 0, 0, 0}, + {0x31, 0, 0, 0, 0}, + {0x32, 0, 0, 0, 0}, + {0x33, 0x11, 0x11, 0, 0}, + {0x34, 0xee, 0xee, 1, 1}, + {0x35, 0, 0, 0, 0}, + {0x36, 0, 0, 0, 0}, + {0x37, 0x3, 0x3, 0, 0}, + {0x38, 0x50, 0x50, 1, 1}, + {0x39, 0, 0, 0, 0}, + {0x3A, 0x50, 0x50, 1, 1}, + {0x3B, 0, 0, 0, 0}, + {0x3C, 0x6e, 0x6e, 0, 0}, + {0x3D, 0xf0, 0xf0, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0, 0, 0, 0}, + {0x40, 0, 0, 0, 0}, + {0x41, 0x3, 0x3, 0, 0}, + {0x42, 0x3, 0x3, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x1e, 0x1e, 0, 0}, + {0x45, 0, 0, 0, 0}, + {0x46, 0x6e, 0x6e, 0, 0}, + {0x47, 0xf0, 0xf0, 1, 1}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x2, 0x2, 0, 0}, + {0x4A, 0xff, 0xff, 1, 1}, + {0x4B, 0xc, 0xc, 0, 0}, + {0x4C, 0, 0, 0, 0}, + {0x4D, 0x38, 0x38, 0, 0}, + {0x4E, 0x70, 0x70, 1, 1}, + {0x4F, 0x2, 0x2, 0, 0}, + {0x50, 0x88, 0x88, 0, 0}, + {0x51, 0xc, 0xc, 0, 0}, + {0x52, 0, 0, 0, 0}, + {0x53, 0x8, 0x8, 0, 0}, + {0x54, 0x70, 0x70, 1, 1}, + {0x55, 0x2, 0x2, 0, 0}, + {0x56, 0xff, 0xff, 1, 1}, + {0x57, 0, 0, 0, 0}, + {0x58, 0x83, 0x83, 0, 0}, + {0x59, 0x77, 0x77, 1, 1}, + {0x5A, 0, 0, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x88, 0x88, 0, 0}, + {0x5D, 0, 0, 0, 0}, + {0x5E, 0x8, 0x8, 0, 0}, + {0x5F, 0x77, 0x77, 1, 1}, + {0x60, 0x1, 0x1, 0, 0}, + {0x61, 0, 0, 0, 0}, + {0x62, 0x7, 0x7, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0x7, 0x7, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 1, 1}, + {0x68, 0, 0, 0, 0}, + {0x69, 0xa, 0xa, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0, 0, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0x2, 0x2, 0, 0}, + {0x72, 0, 0, 0, 0}, + {0x73, 0, 0, 0, 0}, + {0x74, 0xe, 0xe, 0, 0}, + {0x75, 0xe, 0xe, 0, 0}, + {0x76, 0xe, 0xe, 0, 0}, + {0x77, 0x13, 0x13, 0, 0}, + {0x78, 0x13, 0x13, 0, 0}, + {0x79, 0x1b, 0x1b, 0, 0}, + {0x7A, 0x1b, 0x1b, 0, 0}, + {0x7B, 0x55, 0x55, 0, 0}, + {0x7C, 0x5b, 0x5b, 0, 0}, + {0x7D, 0x30, 0x30, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0x70, 0x70, 0, 0}, + {0x94, 0x70, 0x70, 0, 0}, + {0x95, 0x70, 0x70, 0, 0}, + {0x96, 0x70, 0x70, 0, 0}, + {0x97, 0x70, 0x70, 0, 0}, + {0x98, 0x70, 0x70, 0, 0}, + {0x99, 0x70, 0x70, 0, 0}, + {0x9A, 0x70, 0x70, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_regs_t regs_RX_2056_rev11[] = { + {0x02, 0, 0, 0, 0}, + {0x03, 0, 0, 0, 0}, + {0x04, 0, 0, 0, 0}, + {0x05, 0, 0, 0, 0}, + {0x06, 0, 0, 0, 0}, + {0x07, 0, 0, 0, 0}, + {0x08, 0, 0, 0, 0}, + {0x09, 0, 0, 0, 0}, + {0x0A, 0, 0, 0, 0}, + {0x0B, 0, 0, 0, 0}, + {0x0C, 0, 0, 0, 0}, + {0x0D, 0, 0, 0, 0}, + {0x0E, 0, 0, 0, 0}, + {0x0F, 0, 0, 0, 0}, + {0x10, 0, 0, 0, 0}, + {0x11, 0, 0, 0, 0}, + {0x12, 0, 0, 0, 0}, + {0x13, 0, 0, 0, 0}, + {0x14, 0, 0, 0, 0}, + {0x15, 0, 0, 0, 0}, + {0x16, 0, 0, 0, 0}, + {0x17, 0, 0, 0, 0}, + {0x18, 0, 0, 0, 0}, + {0x19, 0, 0, 0, 0}, + {0x1A, 0, 0, 0, 0}, + {0x1B, 0, 0, 0, 0}, + {0x1C, 0, 0, 0, 0}, + {0x1D, 0, 0, 0, 0}, + {0x1E, 0, 0, 0, 0}, + {0x1F, 0, 0, 0, 0}, + {0x20, 0x3, 0x3, 0, 0}, + {0x21, 0, 0, 0, 0}, + {0x22, 0, 0, 0, 0}, + {0x23, 0x90, 0x90, 0, 0}, + {0x24, 0x55, 0x55, 0, 0}, + {0x25, 0x15, 0x15, 0, 0}, + {0x26, 0x5, 0x5, 0, 0}, + {0x27, 0x15, 0x15, 0, 0}, + {0x28, 0x5, 0x5, 0, 0}, + {0x29, 0x20, 0x20, 0, 0}, + {0x2A, 0x11, 0x11, 0, 0}, + {0x2B, 0x90, 0x90, 0, 0}, + {0x2C, 0, 0, 0, 0}, + {0x2D, 0x88, 0x88, 0, 0}, + {0x2E, 0x32, 0x32, 0, 0}, + {0x2F, 0x77, 0x77, 0, 0}, + {0x30, 0x17, 0x17, 1, 1}, + {0x31, 0xff, 0xff, 1, 1}, + {0x32, 0x20, 0x20, 0, 0}, + {0x33, 0, 0, 0, 0}, + {0x34, 0x88, 0x88, 0, 0}, + {0x35, 0x32, 0x32, 0, 0}, + {0x36, 0x77, 0x77, 0, 0}, + {0x37, 0x17, 0x17, 1, 1}, + {0x38, 0xf0, 0xf0, 1, 1}, + {0x39, 0x20, 0x20, 0, 0}, + {0x3A, 0x8, 0x8, 0, 0}, + {0x3B, 0x55, 0x55, 1, 1}, + {0x3C, 0, 0, 0, 0}, + {0x3D, 0x88, 0x88, 1, 1}, + {0x3E, 0, 0, 0, 0}, + {0x3F, 0x44, 0x44, 0, 0}, + {0x40, 0x7, 0x7, 1, 1}, + {0x41, 0x6, 0x6, 0, 0}, + {0x42, 0x4, 0x4, 0, 0}, + {0x43, 0, 0, 0, 0}, + {0x44, 0x8, 0x8, 0, 0}, + {0x45, 0x55, 0x55, 1, 1}, + {0x46, 0, 0, 0, 0}, + {0x47, 0x11, 0x11, 0, 0}, + {0x48, 0, 0, 0, 0}, + {0x49, 0x44, 0x44, 0, 0}, + {0x4A, 0x7, 0x7, 0, 0}, + {0x4B, 0x6, 0x6, 0, 0}, + {0x4C, 0x4, 0x4, 0, 0}, + {0x4D, 0, 0, 0, 0}, + {0x4E, 0, 0, 0, 0}, + {0x4F, 0x26, 0x26, 1, 1}, + {0x50, 0x26, 0x26, 1, 1}, + {0x51, 0xf, 0xf, 1, 1}, + {0x52, 0xf, 0xf, 1, 1}, + {0x53, 0x44, 0x44, 0, 0}, + {0x54, 0, 0, 0, 0}, + {0x55, 0, 0, 0, 0}, + {0x56, 0x8, 0x8, 0, 0}, + {0x57, 0x8, 0x8, 0, 0}, + {0x58, 0x7, 0x7, 0, 0}, + {0x59, 0x22, 0x22, 0, 0}, + {0x5A, 0x22, 0x22, 0, 0}, + {0x5B, 0x2, 0x2, 0, 0}, + {0x5C, 0x4, 0x4, 1, 1}, + {0x5D, 0x7, 0x7, 0, 0}, + {0x5E, 0x55, 0x55, 0, 0}, + {0x5F, 0x23, 0x23, 0, 0}, + {0x60, 0x41, 0x41, 0, 0}, + {0x61, 0x1, 0x1, 0, 0}, + {0x62, 0xa, 0xa, 0, 0}, + {0x63, 0, 0, 0, 0}, + {0x64, 0, 0, 0, 0}, + {0x65, 0, 0, 0, 0}, + {0x66, 0, 0, 0, 0}, + {0x67, 0, 0, 0, 0}, + {0x68, 0, 0, 0, 0}, + {0x69, 0, 0, 0, 0}, + {0x6A, 0, 0, 0, 0}, + {0x6B, 0xc, 0xc, 0, 0}, + {0x6C, 0, 0, 0, 0}, + {0x6D, 0, 0, 0, 0}, + {0x6E, 0, 0, 0, 0}, + {0x6F, 0, 0, 0, 0}, + {0x70, 0, 0, 0, 0}, + {0x71, 0, 0, 0, 0}, + {0x72, 0x22, 0x22, 0, 0}, + {0x73, 0x22, 0x22, 0, 0}, + {0x74, 0, 0, 1, 1}, + {0x75, 0xa, 0xa, 0, 0}, + {0x76, 0x1, 0x1, 0, 0}, + {0x77, 0x22, 0x22, 0, 0}, + {0x78, 0x30, 0x30, 0, 0}, + {0x79, 0, 0, 0, 0}, + {0x7A, 0, 0, 0, 0}, + {0x7B, 0, 0, 0, 0}, + {0x7C, 0, 0, 0, 0}, + {0x7D, 0x5, 0x5, 1, 1}, + {0x7E, 0, 0, 0, 0}, + {0x7F, 0, 0, 0, 0}, + {0x80, 0, 0, 0, 0}, + {0x81, 0, 0, 0, 0}, + {0x82, 0, 0, 0, 0}, + {0x83, 0, 0, 0, 0}, + {0x84, 0, 0, 0, 0}, + {0x85, 0, 0, 0, 0}, + {0x86, 0, 0, 0, 0}, + {0x87, 0, 0, 0, 0}, + {0x88, 0, 0, 0, 0}, + {0x89, 0, 0, 0, 0}, + {0x8A, 0, 0, 0, 0}, + {0x8B, 0, 0, 0, 0}, + {0x8C, 0, 0, 0, 0}, + {0x8D, 0, 0, 0, 0}, + {0x8E, 0, 0, 0, 0}, + {0x8F, 0, 0, 0, 0}, + {0x90, 0, 0, 0, 0}, + {0x91, 0, 0, 0, 0}, + {0x92, 0, 0, 0, 0}, + {0x93, 0, 0, 0, 0}, + {0x94, 0, 0, 0, 0}, + {0xFFFF, 0, 0, 0, 0}, +}; + +radio_20xx_regs_t regs_2057_rev4[] = { + {0x00, 0x84, 0}, + {0x01, 0, 0}, + {0x02, 0x60, 0}, + {0x03, 0x1f, 0}, + {0x04, 0x4, 0}, + {0x05, 0x2, 0}, + {0x06, 0x1, 0}, + {0x07, 0x1, 0}, + {0x08, 0x1, 0}, + {0x09, 0x69, 0}, + {0x0A, 0x66, 0}, + {0x0B, 0x6, 0}, + {0x0C, 0x18, 0}, + {0x0D, 0x3, 0}, + {0x0E, 0x20, 1}, + {0x0F, 0x20, 0}, + {0x10, 0, 0}, + {0x11, 0x7c, 0}, + {0x12, 0x42, 0}, + {0x13, 0xbd, 0}, + {0x14, 0x7, 0}, + {0x15, 0xf7, 0}, + {0x16, 0x8, 0}, + {0x17, 0x17, 0}, + {0x18, 0x7, 0}, + {0x19, 0, 0}, + {0x1A, 0x2, 0}, + {0x1B, 0x13, 0}, + {0x1C, 0x3e, 0}, + {0x1D, 0x3e, 0}, + {0x1E, 0x96, 0}, + {0x1F, 0x4, 0}, + {0x20, 0, 0}, + {0x21, 0, 0}, + {0x22, 0x17, 0}, + {0x23, 0x4, 0}, + {0x24, 0x1, 0}, + {0x25, 0x6, 0}, + {0x26, 0x4, 0}, + {0x27, 0xd, 0}, + {0x28, 0xd, 0}, + {0x29, 0x30, 0}, + {0x2A, 0x32, 0}, + {0x2B, 0x8, 0}, + {0x2C, 0x1c, 0}, + {0x2D, 0x2, 0}, + {0x2E, 0x4, 0}, + {0x2F, 0x7f, 0}, + {0x30, 0x27, 0}, + {0x31, 0, 1}, + {0x32, 0, 1}, + {0x33, 0, 1}, + {0x34, 0, 0}, + {0x35, 0x26, 1}, + {0x36, 0x18, 0}, + {0x37, 0x7, 0}, + {0x38, 0x66, 0}, + {0x39, 0x66, 0}, + {0x3A, 0x66, 0}, + {0x3B, 0x66, 0}, + {0x3C, 0xff, 1}, + {0x3D, 0xff, 1}, + {0x3E, 0xff, 1}, + {0x3F, 0xff, 1}, + {0x40, 0x16, 0}, + {0x41, 0x7, 0}, + {0x42, 0x19, 0}, + {0x43, 0x7, 0}, + {0x44, 0x6, 0}, + {0x45, 0x3, 0}, + {0x46, 0x1, 0}, + {0x47, 0x7, 0}, + {0x48, 0x33, 0}, + {0x49, 0x5, 0}, + {0x4A, 0x77, 0}, + {0x4B, 0x66, 0}, + {0x4C, 0x66, 0}, + {0x4D, 0, 0}, + {0x4E, 0x4, 0}, + {0x4F, 0xc, 0}, + {0x50, 0, 0}, + {0x51, 0x75, 0}, + {0x56, 0x7, 0}, + {0x57, 0, 0}, + {0x58, 0, 0}, + {0x59, 0xa8, 0}, + {0x5A, 0, 0}, + {0x5B, 0x1f, 0}, + {0x5C, 0x30, 0}, + {0x5D, 0x1, 0}, + {0x5E, 0x30, 0}, + {0x5F, 0x70, 0}, + {0x60, 0, 0}, + {0x61, 0, 0}, + {0x62, 0x33, 1}, + {0x63, 0x19, 0}, + {0x64, 0x62, 0}, + {0x65, 0, 0}, + {0x66, 0x11, 0}, + {0x69, 0, 0}, + {0x6A, 0x7e, 0}, + {0x6B, 0x3f, 0}, + {0x6C, 0x7f, 0}, + {0x6D, 0x78, 0}, + {0x6E, 0xc8, 0}, + {0x6F, 0x88, 0}, + {0x70, 0x8, 0}, + {0x71, 0xf, 0}, + {0x72, 0xbc, 0}, + {0x73, 0x8, 0}, + {0x74, 0x60, 0}, + {0x75, 0x1e, 0}, + {0x76, 0x70, 0}, + {0x77, 0, 0}, + {0x78, 0, 0}, + {0x79, 0, 0}, + {0x7A, 0x33, 0}, + {0x7B, 0x1e, 0}, + {0x7C, 0x62, 0}, + {0x7D, 0x11, 0}, + {0x80, 0x3c, 0}, + {0x81, 0x9c, 0}, + {0x82, 0xa, 0}, + {0x83, 0x9d, 0}, + {0x84, 0xa, 0}, + {0x85, 0, 0}, + {0x86, 0x40, 0}, + {0x87, 0x40, 0}, + {0x88, 0x88, 0}, + {0x89, 0x10, 0}, + {0x8A, 0xf0, 1}, + {0x8B, 0x10, 1}, + {0x8C, 0xf0, 1}, + {0x8D, 0, 0}, + {0x8E, 0, 0}, + {0x8F, 0x10, 0}, + {0x90, 0x55, 0}, + {0x91, 0x3f, 1}, + {0x92, 0x36, 1}, + {0x93, 0, 0}, + {0x94, 0, 0}, + {0x95, 0, 0}, + {0x96, 0x87, 0}, + {0x97, 0x11, 0}, + {0x98, 0, 0}, + {0x99, 0x33, 0}, + {0x9A, 0x88, 0}, + {0x9B, 0, 0}, + {0x9C, 0x87, 0}, + {0x9D, 0x11, 0}, + {0x9E, 0, 0}, + {0x9F, 0x33, 0}, + {0xA0, 0x88, 0}, + {0xA1, 0xe1, 0}, + {0xA2, 0x3f, 0}, + {0xA3, 0x44, 0}, + {0xA4, 0x8c, 1}, + {0xA5, 0x6d, 0}, + {0xA6, 0x22, 0}, + {0xA7, 0xbe, 0}, + {0xA8, 0x55, 1}, + {0xA9, 0xc, 0}, + {0xAA, 0xc, 0}, + {0xAB, 0xaa, 0}, + {0xAC, 0x2, 0}, + {0xAD, 0, 0}, + {0xAE, 0x10, 0}, + {0xAF, 0x1, 1}, + {0xB0, 0, 0}, + {0xB1, 0, 0}, + {0xB2, 0x80, 0}, + {0xB3, 0x60, 0}, + {0xB4, 0x44, 0}, + {0xB5, 0x55, 0}, + {0xB6, 0x1, 0}, + {0xB7, 0x55, 0}, + {0xB8, 0x1, 0}, + {0xB9, 0x5, 0}, + {0xBA, 0x55, 0}, + {0xBB, 0x55, 0}, + {0xC1, 0, 0}, + {0xC2, 0, 0}, + {0xC3, 0, 0}, + {0xC4, 0, 0}, + {0xC5, 0, 0}, + {0xC6, 0, 0}, + {0xC7, 0, 0}, + {0xC8, 0, 0}, + {0xC9, 0, 0}, + {0xCA, 0, 0}, + {0xCB, 0, 0}, + {0xCC, 0, 0}, + {0xCD, 0, 0}, + {0xCE, 0x5e, 0}, + {0xCF, 0xc, 0}, + {0xD0, 0xc, 0}, + {0xD1, 0xc, 0}, + {0xD2, 0, 0}, + {0xD3, 0x2b, 0}, + {0xD4, 0xc, 0}, + {0xD5, 0, 0}, + {0xD6, 0x75, 0}, + {0xDB, 0x7, 0}, + {0xDC, 0, 0}, + {0xDD, 0, 0}, + {0xDE, 0xa8, 0}, + {0xDF, 0, 0}, + {0xE0, 0x1f, 0}, + {0xE1, 0x30, 0}, + {0xE2, 0x1, 0}, + {0xE3, 0x30, 0}, + {0xE4, 0x70, 0}, + {0xE5, 0, 0}, + {0xE6, 0, 0}, + {0xE7, 0x33, 0}, + {0xE8, 0x19, 0}, + {0xE9, 0x62, 0}, + {0xEA, 0, 0}, + {0xEB, 0x11, 0}, + {0xEE, 0, 0}, + {0xEF, 0x7e, 0}, + {0xF0, 0x3f, 0}, + {0xF1, 0x7f, 0}, + {0xF2, 0x78, 0}, + {0xF3, 0xc8, 0}, + {0xF4, 0x88, 0}, + {0xF5, 0x8, 0}, + {0xF6, 0xf, 0}, + {0xF7, 0xbc, 0}, + {0xF8, 0x8, 0}, + {0xF9, 0x60, 0}, + {0xFA, 0x1e, 0}, + {0xFB, 0x70, 0}, + {0xFC, 0, 0}, + {0xFD, 0, 0}, + {0xFE, 0, 0}, + {0xFF, 0x33, 0}, + {0x100, 0x1e, 0}, + {0x101, 0x62, 0}, + {0x102, 0x11, 0}, + {0x105, 0x3c, 0}, + {0x106, 0x9c, 0}, + {0x107, 0xa, 0}, + {0x108, 0x9d, 0}, + {0x109, 0xa, 0}, + {0x10A, 0, 0}, + {0x10B, 0x40, 0}, + {0x10C, 0x40, 0}, + {0x10D, 0x88, 0}, + {0x10E, 0x10, 0}, + {0x10F, 0xf0, 1}, + {0x110, 0x10, 1}, + {0x111, 0xf0, 1}, + {0x112, 0, 0}, + {0x113, 0, 0}, + {0x114, 0x10, 0}, + {0x115, 0x55, 0}, + {0x116, 0x3f, 1}, + {0x117, 0x36, 1}, + {0x118, 0, 0}, + {0x119, 0, 0}, + {0x11A, 0, 0}, + {0x11B, 0x87, 0}, + {0x11C, 0x11, 0}, + {0x11D, 0, 0}, + {0x11E, 0x33, 0}, + {0x11F, 0x88, 0}, + {0x120, 0, 0}, + {0x121, 0x87, 0}, + {0x122, 0x11, 0}, + {0x123, 0, 0}, + {0x124, 0x33, 0}, + {0x125, 0x88, 0}, + {0x126, 0xe1, 0}, + {0x127, 0x3f, 0}, + {0x128, 0x44, 0}, + {0x129, 0x8c, 1}, + {0x12A, 0x6d, 0}, + {0x12B, 0x22, 0}, + {0x12C, 0xbe, 0}, + {0x12D, 0x55, 1}, + {0x12E, 0xc, 0}, + {0x12F, 0xc, 0}, + {0x130, 0xaa, 0}, + {0x131, 0x2, 0}, + {0x132, 0, 0}, + {0x133, 0x10, 0}, + {0x134, 0x1, 1}, + {0x135, 0, 0}, + {0x136, 0, 0}, + {0x137, 0x80, 0}, + {0x138, 0x60, 0}, + {0x139, 0x44, 0}, + {0x13A, 0x55, 0}, + {0x13B, 0x1, 0}, + {0x13C, 0x55, 0}, + {0x13D, 0x1, 0}, + {0x13E, 0x5, 0}, + {0x13F, 0x55, 0}, + {0x140, 0x55, 0}, + {0x146, 0, 0}, + {0x147, 0, 0}, + {0x148, 0, 0}, + {0x149, 0, 0}, + {0x14A, 0, 0}, + {0x14B, 0, 0}, + {0x14C, 0, 0}, + {0x14D, 0, 0}, + {0x14E, 0, 0}, + {0x14F, 0, 0}, + {0x150, 0, 0}, + {0x151, 0, 0}, + {0x152, 0, 0}, + {0x153, 0, 0}, + {0x154, 0xc, 0}, + {0x155, 0xc, 0}, + {0x156, 0xc, 0}, + {0x157, 0, 0}, + {0x158, 0x2b, 0}, + {0x159, 0x84, 0}, + {0x15A, 0x15, 0}, + {0x15B, 0xf, 0}, + {0x15C, 0, 0}, + {0x15D, 0, 0}, + {0x15E, 0, 1}, + {0x15F, 0, 1}, + {0x160, 0, 1}, + {0x161, 0, 1}, + {0x162, 0, 1}, + {0x163, 0, 1}, + {0x164, 0, 0}, + {0x165, 0, 0}, + {0x166, 0, 0}, + {0x167, 0, 0}, + {0x168, 0, 0}, + {0x169, 0x2, 1}, + {0x16A, 0, 1}, + {0x16B, 0, 1}, + {0x16C, 0, 1}, + {0x16D, 0, 0}, + {0x170, 0, 0}, + {0x171, 0x77, 0}, + {0x172, 0x77, 0}, + {0x173, 0x77, 0}, + {0x174, 0x77, 0}, + {0x175, 0, 0}, + {0x176, 0x3, 0}, + {0x177, 0x37, 0}, + {0x178, 0x3, 0}, + {0x179, 0, 0}, + {0x17A, 0x21, 0}, + {0x17B, 0x21, 0}, + {0x17C, 0, 0}, + {0x17D, 0xaa, 0}, + {0x17E, 0, 0}, + {0x17F, 0xaa, 0}, + {0x180, 0, 0}, + {0x190, 0, 0}, + {0x191, 0x77, 0}, + {0x192, 0x77, 0}, + {0x193, 0x77, 0}, + {0x194, 0x77, 0}, + {0x195, 0, 0}, + {0x196, 0x3, 0}, + {0x197, 0x37, 0}, + {0x198, 0x3, 0}, + {0x199, 0, 0}, + {0x19A, 0x21, 0}, + {0x19B, 0x21, 0}, + {0x19C, 0, 0}, + {0x19D, 0xaa, 0}, + {0x19E, 0, 0}, + {0x19F, 0xaa, 0}, + {0x1A0, 0, 0}, + {0x1A1, 0x2, 0}, + {0x1A2, 0xf, 0}, + {0x1A3, 0xf, 0}, + {0x1A4, 0, 1}, + {0x1A5, 0, 1}, + {0x1A6, 0, 1}, + {0x1A7, 0x2, 0}, + {0x1A8, 0xf, 0}, + {0x1A9, 0xf, 0}, + {0x1AA, 0, 1}, + {0x1AB, 0, 1}, + {0x1AC, 0, 1}, + {0xFFFF, 0, 0}, +}; + +radio_20xx_regs_t regs_2057_rev5[] = { + {0x00, 0, 1}, + {0x01, 0x57, 1}, + {0x02, 0x20, 1}, + {0x03, 0x1f, 0}, + {0x04, 0x4, 0}, + {0x05, 0x2, 0}, + {0x06, 0x1, 0}, + {0x07, 0x1, 0}, + {0x08, 0x1, 0}, + {0x09, 0x69, 0}, + {0x0A, 0x66, 0}, + {0x0B, 0x6, 0}, + {0x0C, 0x18, 0}, + {0x0D, 0x3, 0}, + {0x0E, 0x20, 0}, + {0x0F, 0x20, 0}, + {0x10, 0, 0}, + {0x11, 0x7c, 0}, + {0x12, 0x42, 0}, + {0x13, 0xbd, 0}, + {0x14, 0x7, 0}, + {0x15, 0x87, 0}, + {0x16, 0x8, 0}, + {0x17, 0x17, 0}, + {0x18, 0x7, 0}, + {0x19, 0, 0}, + {0x1A, 0x2, 0}, + {0x1B, 0x13, 0}, + {0x1C, 0x3e, 0}, + {0x1D, 0x3e, 0}, + {0x1E, 0x96, 0}, + {0x1F, 0x4, 0}, + {0x20, 0, 0}, + {0x21, 0, 0}, + {0x22, 0x17, 0}, + {0x23, 0x6, 1}, + {0x24, 0x1, 0}, + {0x25, 0x6, 0}, + {0x26, 0x4, 0}, + {0x27, 0xd, 0}, + {0x28, 0xd, 0}, + {0x29, 0x30, 0}, + {0x2A, 0x32, 0}, + {0x2B, 0x8, 0}, + {0x2C, 0x1c, 0}, + {0x2D, 0x2, 0}, + {0x2E, 0x4, 0}, + {0x2F, 0x7f, 0}, + {0x30, 0x27, 0}, + {0x31, 0, 1}, + {0x32, 0, 1}, + {0x33, 0, 1}, + {0x34, 0, 0}, + {0x35, 0x20, 0}, + {0x36, 0x18, 0}, + {0x37, 0x7, 0}, + {0x38, 0x66, 0}, + {0x39, 0x66, 0}, + {0x3C, 0xff, 0}, + {0x3D, 0xff, 0}, + {0x40, 0x16, 0}, + {0x41, 0x7, 0}, + {0x45, 0x3, 0}, + {0x46, 0x1, 0}, + {0x47, 0x7, 0}, + {0x4B, 0x66, 0}, + {0x4C, 0x66, 0}, + {0x4D, 0, 0}, + {0x4E, 0x4, 0}, + {0x4F, 0xc, 0}, + {0x50, 0, 0}, + {0x51, 0x70, 1}, + {0x56, 0x7, 0}, + {0x57, 0, 0}, + {0x58, 0, 0}, + {0x59, 0x88, 1}, + {0x5A, 0, 0}, + {0x5B, 0x1f, 0}, + {0x5C, 0x20, 1}, + {0x5D, 0x1, 0}, + {0x5E, 0x30, 0}, + {0x5F, 0x70, 0}, + {0x60, 0, 0}, + {0x61, 0, 0}, + {0x62, 0x33, 1}, + {0x63, 0xf, 1}, + {0x64, 0xf, 1}, + {0x65, 0, 0}, + {0x66, 0x11, 0}, + {0x80, 0x3c, 0}, + {0x81, 0x1, 1}, + {0x82, 0xa, 0}, + {0x85, 0, 0}, + {0x86, 0x40, 0}, + {0x87, 0x40, 0}, + {0x88, 0x88, 0}, + {0x89, 0x10, 0}, + {0x8A, 0xf0, 0}, + {0x8B, 0x10, 0}, + {0x8C, 0xf0, 0}, + {0x8F, 0x10, 0}, + {0x90, 0x55, 0}, + {0x91, 0x3f, 1}, + {0x92, 0x36, 1}, + {0x93, 0, 0}, + {0x94, 0, 0}, + {0x95, 0, 0}, + {0x96, 0x87, 0}, + {0x97, 0x11, 0}, + {0x98, 0, 0}, + {0x99, 0x33, 0}, + {0x9A, 0x88, 0}, + {0xA1, 0x20, 1}, + {0xA2, 0x3f, 0}, + {0xA3, 0x44, 0}, + {0xA4, 0x8c, 0}, + {0xA5, 0x6c, 0}, + {0xA6, 0x22, 0}, + {0xA7, 0xbe, 0}, + {0xA8, 0x55, 0}, + {0xAA, 0xc, 0}, + {0xAB, 0xaa, 0}, + {0xAC, 0x2, 0}, + {0xAD, 0, 0}, + {0xAE, 0x10, 0}, + {0xAF, 0x1, 0}, + {0xB0, 0, 0}, + {0xB1, 0, 0}, + {0xB2, 0x80, 0}, + {0xB3, 0x60, 0}, + {0xB4, 0x44, 0}, + {0xB5, 0x55, 0}, + {0xB6, 0x1, 0}, + {0xB7, 0x55, 0}, + {0xB8, 0x1, 0}, + {0xB9, 0x5, 0}, + {0xBA, 0x55, 0}, + {0xBB, 0x55, 0}, + {0xC3, 0, 0}, + {0xC4, 0, 0}, + {0xC5, 0, 0}, + {0xC6, 0, 0}, + {0xC7, 0, 0}, + {0xC8, 0, 0}, + {0xC9, 0, 0}, + {0xCA, 0, 0}, + {0xCB, 0, 0}, + {0xCD, 0, 0}, + {0xCE, 0x5e, 0}, + {0xCF, 0xc, 0}, + {0xD0, 0xc, 0}, + {0xD1, 0xc, 0}, + {0xD2, 0, 0}, + {0xD3, 0x2b, 0}, + {0xD4, 0xc, 0}, + {0xD5, 0, 0}, + {0xD6, 0x70, 1}, + {0xDB, 0x7, 0}, + {0xDC, 0, 0}, + {0xDD, 0, 0}, + {0xDE, 0x88, 1}, + {0xDF, 0, 0}, + {0xE0, 0x1f, 0}, + {0xE1, 0x20, 1}, + {0xE2, 0x1, 0}, + {0xE3, 0x30, 0}, + {0xE4, 0x70, 0}, + {0xE5, 0, 0}, + {0xE6, 0, 0}, + {0xE7, 0x33, 0}, + {0xE8, 0xf, 1}, + {0xE9, 0xf, 1}, + {0xEA, 0, 0}, + {0xEB, 0x11, 0}, + {0x105, 0x3c, 0}, + {0x106, 0x1, 1}, + {0x107, 0xa, 0}, + {0x10A, 0, 0}, + {0x10B, 0x40, 0}, + {0x10C, 0x40, 0}, + {0x10D, 0x88, 0}, + {0x10E, 0x10, 0}, + {0x10F, 0xf0, 0}, + {0x110, 0x10, 0}, + {0x111, 0xf0, 0}, + {0x114, 0x10, 0}, + {0x115, 0x55, 0}, + {0x116, 0x3f, 1}, + {0x117, 0x36, 1}, + {0x118, 0, 0}, + {0x119, 0, 0}, + {0x11A, 0, 0}, + {0x11B, 0x87, 0}, + {0x11C, 0x11, 0}, + {0x11D, 0, 0}, + {0x11E, 0x33, 0}, + {0x11F, 0x88, 0}, + {0x126, 0x20, 1}, + {0x127, 0x3f, 0}, + {0x128, 0x44, 0}, + {0x129, 0x8c, 0}, + {0x12A, 0x6c, 0}, + {0x12B, 0x22, 0}, + {0x12C, 0xbe, 0}, + {0x12D, 0x55, 0}, + {0x12F, 0xc, 0}, + {0x130, 0xaa, 0}, + {0x131, 0x2, 0}, + {0x132, 0, 0}, + {0x133, 0x10, 0}, + {0x134, 0x1, 0}, + {0x135, 0, 0}, + {0x136, 0, 0}, + {0x137, 0x80, 0}, + {0x138, 0x60, 0}, + {0x139, 0x44, 0}, + {0x13A, 0x55, 0}, + {0x13B, 0x1, 0}, + {0x13C, 0x55, 0}, + {0x13D, 0x1, 0}, + {0x13E, 0x5, 0}, + {0x13F, 0x55, 0}, + {0x140, 0x55, 0}, + {0x148, 0, 0}, + {0x149, 0, 0}, + {0x14A, 0, 0}, + {0x14B, 0, 0}, + {0x14C, 0, 0}, + {0x14D, 0, 0}, + {0x14E, 0, 0}, + {0x14F, 0, 0}, + {0x150, 0, 0}, + {0x154, 0xc, 0}, + {0x155, 0xc, 0}, + {0x156, 0xc, 0}, + {0x157, 0, 0}, + {0x158, 0x2b, 0}, + {0x159, 0x84, 0}, + {0x15A, 0x15, 0}, + {0x15B, 0xf, 0}, + {0x15C, 0, 0}, + {0x15D, 0, 0}, + {0x15E, 0, 1}, + {0x15F, 0, 1}, + {0x160, 0, 1}, + {0x161, 0, 1}, + {0x162, 0, 1}, + {0x163, 0, 1}, + {0x164, 0, 0}, + {0x165, 0, 0}, + {0x166, 0, 0}, + {0x167, 0, 0}, + {0x168, 0, 0}, + {0x169, 0, 0}, + {0x16A, 0, 1}, + {0x16B, 0, 1}, + {0x16C, 0, 1}, + {0x16D, 0, 0}, + {0x170, 0, 0}, + {0x171, 0x77, 0}, + {0x172, 0x77, 0}, + {0x173, 0x77, 0}, + {0x174, 0x77, 0}, + {0x175, 0, 0}, + {0x176, 0x3, 0}, + {0x177, 0x37, 0}, + {0x178, 0x3, 0}, + {0x179, 0, 0}, + {0x17B, 0x21, 0}, + {0x17C, 0, 0}, + {0x17D, 0xaa, 0}, + {0x17E, 0, 0}, + {0x190, 0, 0}, + {0x191, 0x77, 0}, + {0x192, 0x77, 0}, + {0x193, 0x77, 0}, + {0x194, 0x77, 0}, + {0x195, 0, 0}, + {0x196, 0x3, 0}, + {0x197, 0x37, 0}, + {0x198, 0x3, 0}, + {0x199, 0, 0}, + {0x19B, 0x21, 0}, + {0x19C, 0, 0}, + {0x19D, 0xaa, 0}, + {0x19E, 0, 0}, + {0x1A1, 0x2, 0}, + {0x1A2, 0xf, 0}, + {0x1A3, 0xf, 0}, + {0x1A4, 0, 1}, + {0x1A5, 0, 1}, + {0x1A6, 0, 1}, + {0x1A7, 0x2, 0}, + {0x1A8, 0xf, 0}, + {0x1A9, 0xf, 0}, + {0x1AA, 0, 1}, + {0x1AB, 0, 1}, + {0x1AC, 0, 1}, + {0x1AD, 0x84, 0}, + {0x1AE, 0x60, 0}, + {0x1AF, 0x47, 0}, + {0x1B0, 0x47, 0}, + {0x1B1, 0, 0}, + {0x1B2, 0, 0}, + {0x1B3, 0, 0}, + {0x1B4, 0, 0}, + {0x1B5, 0, 0}, + {0x1B6, 0, 0}, + {0x1B7, 0xc, 1}, + {0x1B8, 0, 0}, + {0x1B9, 0, 0}, + {0x1BA, 0, 0}, + {0x1BB, 0, 0}, + {0x1BC, 0, 0}, + {0x1BD, 0, 0}, + {0x1BE, 0, 0}, + {0x1BF, 0, 0}, + {0x1C0, 0, 0}, + {0x1C1, 0x1, 1}, + {0x1C2, 0x80, 1}, + {0x1C3, 0, 0}, + {0x1C4, 0, 0}, + {0x1C5, 0, 0}, + {0x1C6, 0, 0}, + {0x1C7, 0, 0}, + {0x1C8, 0, 0}, + {0x1C9, 0, 0}, + {0x1CA, 0, 0}, + {0xFFFF, 0, 0} +}; + +radio_20xx_regs_t regs_2057_rev5v1[] = { + {0x00, 0x15, 1}, + {0x01, 0x57, 1}, + {0x02, 0x20, 1}, + {0x03, 0x1f, 0}, + {0x04, 0x4, 0}, + {0x05, 0x2, 0}, + {0x06, 0x1, 0}, + {0x07, 0x1, 0}, + {0x08, 0x1, 0}, + {0x09, 0x69, 0}, + {0x0A, 0x66, 0}, + {0x0B, 0x6, 0}, + {0x0C, 0x18, 0}, + {0x0D, 0x3, 0}, + {0x0E, 0x20, 0}, + {0x0F, 0x20, 0}, + {0x10, 0, 0}, + {0x11, 0x7c, 0}, + {0x12, 0x42, 0}, + {0x13, 0xbd, 0}, + {0x14, 0x7, 0}, + {0x15, 0x87, 0}, + {0x16, 0x8, 0}, + {0x17, 0x17, 0}, + {0x18, 0x7, 0}, + {0x19, 0, 0}, + {0x1A, 0x2, 0}, + {0x1B, 0x13, 0}, + {0x1C, 0x3e, 0}, + {0x1D, 0x3e, 0}, + {0x1E, 0x96, 0}, + {0x1F, 0x4, 0}, + {0x20, 0, 0}, + {0x21, 0, 0}, + {0x22, 0x17, 0}, + {0x23, 0x6, 1}, + {0x24, 0x1, 0}, + {0x25, 0x6, 0}, + {0x26, 0x4, 0}, + {0x27, 0xd, 0}, + {0x28, 0xd, 0}, + {0x29, 0x30, 0}, + {0x2A, 0x32, 0}, + {0x2B, 0x8, 0}, + {0x2C, 0x1c, 0}, + {0x2D, 0x2, 0}, + {0x2E, 0x4, 0}, + {0x2F, 0x7f, 0}, + {0x30, 0x27, 0}, + {0x31, 0, 1}, + {0x32, 0, 1}, + {0x33, 0, 1}, + {0x34, 0, 0}, + {0x35, 0x20, 0}, + {0x36, 0x18, 0}, + {0x37, 0x7, 0}, + {0x38, 0x66, 0}, + {0x39, 0x66, 0}, + {0x3C, 0xff, 0}, + {0x3D, 0xff, 0}, + {0x40, 0x16, 0}, + {0x41, 0x7, 0}, + {0x45, 0x3, 0}, + {0x46, 0x1, 0}, + {0x47, 0x7, 0}, + {0x4B, 0x66, 0}, + {0x4C, 0x66, 0}, + {0x4D, 0, 0}, + {0x4E, 0x4, 0}, + {0x4F, 0xc, 0}, + {0x50, 0, 0}, + {0x51, 0x70, 1}, + {0x56, 0x7, 0}, + {0x57, 0, 0}, + {0x58, 0, 0}, + {0x59, 0x88, 1}, + {0x5A, 0, 0}, + {0x5B, 0x1f, 0}, + {0x5C, 0x20, 1}, + {0x5D, 0x1, 0}, + {0x5E, 0x30, 0}, + {0x5F, 0x70, 0}, + {0x60, 0, 0}, + {0x61, 0, 0}, + {0x62, 0x33, 1}, + {0x63, 0xf, 1}, + {0x64, 0xf, 1}, + {0x65, 0, 0}, + {0x66, 0x11, 0}, + {0x80, 0x3c, 0}, + {0x81, 0x1, 1}, + {0x82, 0xa, 0}, + {0x85, 0, 0}, + {0x86, 0x40, 0}, + {0x87, 0x40, 0}, + {0x88, 0x88, 0}, + {0x89, 0x10, 0}, + {0x8A, 0xf0, 0}, + {0x8B, 0x10, 0}, + {0x8C, 0xf0, 0}, + {0x8F, 0x10, 0}, + {0x90, 0x55, 0}, + {0x91, 0x3f, 1}, + {0x92, 0x36, 1}, + {0x93, 0, 0}, + {0x94, 0, 0}, + {0x95, 0, 0}, + {0x96, 0x87, 0}, + {0x97, 0x11, 0}, + {0x98, 0, 0}, + {0x99, 0x33, 0}, + {0x9A, 0x88, 0}, + {0xA1, 0x20, 1}, + {0xA2, 0x3f, 0}, + {0xA3, 0x44, 0}, + {0xA4, 0x8c, 0}, + {0xA5, 0x6c, 0}, + {0xA6, 0x22, 0}, + {0xA7, 0xbe, 0}, + {0xA8, 0x55, 0}, + {0xAA, 0xc, 0}, + {0xAB, 0xaa, 0}, + {0xAC, 0x2, 0}, + {0xAD, 0, 0}, + {0xAE, 0x10, 0}, + {0xAF, 0x1, 0}, + {0xB0, 0, 0}, + {0xB1, 0, 0}, + {0xB2, 0x80, 0}, + {0xB3, 0x60, 0}, + {0xB4, 0x44, 0}, + {0xB5, 0x55, 0}, + {0xB6, 0x1, 0}, + {0xB7, 0x55, 0}, + {0xB8, 0x1, 0}, + {0xB9, 0x5, 0}, + {0xBA, 0x55, 0}, + {0xBB, 0x55, 0}, + {0xC3, 0, 0}, + {0xC4, 0, 0}, + {0xC5, 0, 0}, + {0xC6, 0, 0}, + {0xC7, 0, 0}, + {0xC8, 0, 0}, + {0xC9, 0x1, 1}, + {0xCA, 0, 0}, + {0xCB, 0, 0}, + {0xCD, 0, 0}, + {0xCE, 0x5e, 0}, + {0xCF, 0xc, 0}, + {0xD0, 0xc, 0}, + {0xD1, 0xc, 0}, + {0xD2, 0, 0}, + {0xD3, 0x2b, 0}, + {0xD4, 0xc, 0}, + {0xD5, 0, 0}, + {0xD6, 0x70, 1}, + {0xDB, 0x7, 0}, + {0xDC, 0, 0}, + {0xDD, 0, 0}, + {0xDE, 0x88, 1}, + {0xDF, 0, 0}, + {0xE0, 0x1f, 0}, + {0xE1, 0x20, 1}, + {0xE2, 0x1, 0}, + {0xE3, 0x30, 0}, + {0xE4, 0x70, 0}, + {0xE5, 0, 0}, + {0xE6, 0, 0}, + {0xE7, 0x33, 0}, + {0xE8, 0xf, 1}, + {0xE9, 0xf, 1}, + {0xEA, 0, 0}, + {0xEB, 0x11, 0}, + {0x105, 0x3c, 0}, + {0x106, 0x1, 1}, + {0x107, 0xa, 0}, + {0x10A, 0, 0}, + {0x10B, 0x40, 0}, + {0x10C, 0x40, 0}, + {0x10D, 0x88, 0}, + {0x10E, 0x10, 0}, + {0x10F, 0xf0, 0}, + {0x110, 0x10, 0}, + {0x111, 0xf0, 0}, + {0x114, 0x10, 0}, + {0x115, 0x55, 0}, + {0x116, 0x3f, 1}, + {0x117, 0x36, 1}, + {0x118, 0, 0}, + {0x119, 0, 0}, + {0x11A, 0, 0}, + {0x11B, 0x87, 0}, + {0x11C, 0x11, 0}, + {0x11D, 0, 0}, + {0x11E, 0x33, 0}, + {0x11F, 0x88, 0}, + {0x126, 0x20, 1}, + {0x127, 0x3f, 0}, + {0x128, 0x44, 0}, + {0x129, 0x8c, 0}, + {0x12A, 0x6c, 0}, + {0x12B, 0x22, 0}, + {0x12C, 0xbe, 0}, + {0x12D, 0x55, 0}, + {0x12F, 0xc, 0}, + {0x130, 0xaa, 0}, + {0x131, 0x2, 0}, + {0x132, 0, 0}, + {0x133, 0x10, 0}, + {0x134, 0x1, 0}, + {0x135, 0, 0}, + {0x136, 0, 0}, + {0x137, 0x80, 0}, + {0x138, 0x60, 0}, + {0x139, 0x44, 0}, + {0x13A, 0x55, 0}, + {0x13B, 0x1, 0}, + {0x13C, 0x55, 0}, + {0x13D, 0x1, 0}, + {0x13E, 0x5, 0}, + {0x13F, 0x55, 0}, + {0x140, 0x55, 0}, + {0x148, 0, 0}, + {0x149, 0, 0}, + {0x14A, 0, 0}, + {0x14B, 0, 0}, + {0x14C, 0, 0}, + {0x14D, 0, 0}, + {0x14E, 0x1, 1}, + {0x14F, 0, 0}, + {0x150, 0, 0}, + {0x154, 0xc, 0}, + {0x155, 0xc, 0}, + {0x156, 0xc, 0}, + {0x157, 0, 0}, + {0x158, 0x2b, 0}, + {0x159, 0x84, 0}, + {0x15A, 0x15, 0}, + {0x15B, 0xf, 0}, + {0x15C, 0, 0}, + {0x15D, 0, 0}, + {0x15E, 0, 1}, + {0x15F, 0, 1}, + {0x160, 0, 1}, + {0x161, 0, 1}, + {0x162, 0, 1}, + {0x163, 0, 1}, + {0x164, 0, 0}, + {0x165, 0, 0}, + {0x166, 0, 0}, + {0x167, 0, 0}, + {0x168, 0, 0}, + {0x169, 0, 0}, + {0x16A, 0, 1}, + {0x16B, 0, 1}, + {0x16C, 0, 1}, + {0x16D, 0, 0}, + {0x170, 0, 0}, + {0x171, 0x77, 0}, + {0x172, 0x77, 0}, + {0x173, 0x77, 0}, + {0x174, 0x77, 0}, + {0x175, 0, 0}, + {0x176, 0x3, 0}, + {0x177, 0x37, 0}, + {0x178, 0x3, 0}, + {0x179, 0, 0}, + {0x17B, 0x21, 0}, + {0x17C, 0, 0}, + {0x17D, 0xaa, 0}, + {0x17E, 0, 0}, + {0x190, 0, 0}, + {0x191, 0x77, 0}, + {0x192, 0x77, 0}, + {0x193, 0x77, 0}, + {0x194, 0x77, 0}, + {0x195, 0, 0}, + {0x196, 0x3, 0}, + {0x197, 0x37, 0}, + {0x198, 0x3, 0}, + {0x199, 0, 0}, + {0x19B, 0x21, 0}, + {0x19C, 0, 0}, + {0x19D, 0xaa, 0}, + {0x19E, 0, 0}, + {0x1A1, 0x2, 0}, + {0x1A2, 0xf, 0}, + {0x1A3, 0xf, 0}, + {0x1A4, 0, 1}, + {0x1A5, 0, 1}, + {0x1A6, 0, 1}, + {0x1A7, 0x2, 0}, + {0x1A8, 0xf, 0}, + {0x1A9, 0xf, 0}, + {0x1AA, 0, 1}, + {0x1AB, 0, 1}, + {0x1AC, 0, 1}, + {0x1AD, 0x84, 0}, + {0x1AE, 0x60, 0}, + {0x1AF, 0x47, 0}, + {0x1B0, 0x47, 0}, + {0x1B1, 0, 0}, + {0x1B2, 0, 0}, + {0x1B3, 0, 0}, + {0x1B4, 0, 0}, + {0x1B5, 0, 0}, + {0x1B6, 0, 0}, + {0x1B7, 0xc, 1}, + {0x1B8, 0, 0}, + {0x1B9, 0, 0}, + {0x1BA, 0, 0}, + {0x1BB, 0, 0}, + {0x1BC, 0, 0}, + {0x1BD, 0, 0}, + {0x1BE, 0, 0}, + {0x1BF, 0, 0}, + {0x1C0, 0, 0}, + {0x1C1, 0x1, 1}, + {0x1C2, 0x80, 1}, + {0x1C3, 0, 0}, + {0x1C4, 0, 0}, + {0x1C5, 0, 0}, + {0x1C6, 0, 0}, + {0x1C7, 0, 0}, + {0x1C8, 0, 0}, + {0x1C9, 0, 0}, + {0x1CA, 0, 0}, + {0xFFFF, 0, 0} +}; + +radio_20xx_regs_t regs_2057_rev7[] = { + {0x00, 0, 1}, + {0x01, 0x57, 1}, + {0x02, 0x20, 1}, + {0x03, 0x1f, 0}, + {0x04, 0x4, 0}, + {0x05, 0x2, 0}, + {0x06, 0x1, 0}, + {0x07, 0x1, 0}, + {0x08, 0x1, 0}, + {0x09, 0x69, 0}, + {0x0A, 0x66, 0}, + {0x0B, 0x6, 0}, + {0x0C, 0x18, 0}, + {0x0D, 0x3, 0}, + {0x0E, 0x20, 0}, + {0x0F, 0x20, 0}, + {0x10, 0, 0}, + {0x11, 0x7c, 0}, + {0x12, 0x42, 0}, + {0x13, 0xbd, 0}, + {0x14, 0x7, 0}, + {0x15, 0x87, 0}, + {0x16, 0x8, 0}, + {0x17, 0x17, 0}, + {0x18, 0x7, 0}, + {0x19, 0, 0}, + {0x1A, 0x2, 0}, + {0x1B, 0x13, 0}, + {0x1C, 0x3e, 0}, + {0x1D, 0x3e, 0}, + {0x1E, 0x96, 0}, + {0x1F, 0x4, 0}, + {0x20, 0, 0}, + {0x21, 0, 0}, + {0x22, 0x17, 0}, + {0x23, 0x6, 0}, + {0x24, 0x1, 0}, + {0x25, 0x6, 0}, + {0x26, 0x4, 0}, + {0x27, 0xd, 0}, + {0x28, 0xd, 0}, + {0x29, 0x30, 0}, + {0x2A, 0x32, 0}, + {0x2B, 0x8, 0}, + {0x2C, 0x1c, 0}, + {0x2D, 0x2, 0}, + {0x2E, 0x4, 0}, + {0x2F, 0x7f, 0}, + {0x30, 0x27, 0}, + {0x31, 0, 1}, + {0x32, 0, 1}, + {0x33, 0, 1}, + {0x34, 0, 0}, + {0x35, 0x20, 0}, + {0x36, 0x18, 0}, + {0x37, 0x7, 0}, + {0x38, 0x66, 0}, + {0x39, 0x66, 0}, + {0x3A, 0x66, 0}, + {0x3B, 0x66, 0}, + {0x3C, 0xff, 0}, + {0x3D, 0xff, 0}, + {0x3E, 0xff, 0}, + {0x3F, 0xff, 0}, + {0x40, 0x16, 0}, + {0x41, 0x7, 0}, + {0x42, 0x19, 0}, + {0x43, 0x7, 0}, + {0x44, 0x6, 0}, + {0x45, 0x3, 0}, + {0x46, 0x1, 0}, + {0x47, 0x7, 0}, + {0x48, 0x33, 0}, + {0x49, 0x5, 0}, + {0x4A, 0x77, 0}, + {0x4B, 0x66, 0}, + {0x4C, 0x66, 0}, + {0x4D, 0, 0}, + {0x4E, 0x4, 0}, + {0x4F, 0xc, 0}, + {0x50, 0, 0}, + {0x51, 0x70, 1}, + {0x56, 0x7, 0}, + {0x57, 0, 0}, + {0x58, 0, 0}, + {0x59, 0x88, 1}, + {0x5A, 0, 0}, + {0x5B, 0x1f, 0}, + {0x5C, 0x20, 1}, + {0x5D, 0x1, 0}, + {0x5E, 0x30, 0}, + {0x5F, 0x70, 0}, + {0x60, 0, 0}, + {0x61, 0, 0}, + {0x62, 0x33, 1}, + {0x63, 0xf, 1}, + {0x64, 0x13, 1}, + {0x65, 0, 0}, + {0x66, 0xee, 1}, + {0x69, 0, 0}, + {0x6A, 0x7e, 0}, + {0x6B, 0x3f, 0}, + {0x6C, 0x7f, 0}, + {0x6D, 0x78, 0}, + {0x6E, 0x58, 1}, + {0x6F, 0x88, 0}, + {0x70, 0x8, 0}, + {0x71, 0xf, 0}, + {0x72, 0xbc, 0}, + {0x73, 0x8, 0}, + {0x74, 0x60, 0}, + {0x75, 0x13, 1}, + {0x76, 0x70, 0}, + {0x77, 0, 0}, + {0x78, 0, 0}, + {0x79, 0, 0}, + {0x7A, 0x33, 0}, + {0x7B, 0x13, 1}, + {0x7C, 0x14, 1}, + {0x7D, 0xee, 1}, + {0x80, 0x3c, 0}, + {0x81, 0x1, 1}, + {0x82, 0xa, 0}, + {0x83, 0x9d, 0}, + {0x84, 0xa, 0}, + {0x85, 0, 0}, + {0x86, 0x40, 0}, + {0x87, 0x40, 0}, + {0x88, 0x88, 0}, + {0x89, 0x10, 0}, + {0x8A, 0xf0, 0}, + {0x8B, 0x10, 0}, + {0x8C, 0xf0, 0}, + {0x8D, 0, 0}, + {0x8E, 0, 0}, + {0x8F, 0x10, 0}, + {0x90, 0x55, 0}, + {0x91, 0x3f, 1}, + {0x92, 0x36, 1}, + {0x93, 0, 0}, + {0x94, 0, 0}, + {0x95, 0, 0}, + {0x96, 0x87, 0}, + {0x97, 0x11, 0}, + {0x98, 0, 0}, + {0x99, 0x33, 0}, + {0x9A, 0x88, 0}, + {0x9B, 0, 0}, + {0x9C, 0x87, 0}, + {0x9D, 0x11, 0}, + {0x9E, 0, 0}, + {0x9F, 0x33, 0}, + {0xA0, 0x88, 0}, + {0xA1, 0x20, 1}, + {0xA2, 0x3f, 0}, + {0xA3, 0x44, 0}, + {0xA4, 0x8c, 0}, + {0xA5, 0x6c, 0}, + {0xA6, 0x22, 0}, + {0xA7, 0xbe, 0}, + {0xA8, 0x55, 0}, + {0xAA, 0xc, 0}, + {0xAB, 0xaa, 0}, + {0xAC, 0x2, 0}, + {0xAD, 0, 0}, + {0xAE, 0x10, 0}, + {0xAF, 0x1, 0}, + {0xB0, 0, 0}, + {0xB1, 0, 0}, + {0xB2, 0x80, 0}, + {0xB3, 0x60, 0}, + {0xB4, 0x44, 0}, + {0xB5, 0x55, 0}, + {0xB6, 0x1, 0}, + {0xB7, 0x55, 0}, + {0xB8, 0x1, 0}, + {0xB9, 0x5, 0}, + {0xBA, 0x55, 0}, + {0xBB, 0x55, 0}, + {0xC1, 0, 0}, + {0xC2, 0, 0}, + {0xC3, 0, 0}, + {0xC4, 0, 0}, + {0xC5, 0, 0}, + {0xC6, 0, 0}, + {0xC7, 0, 0}, + {0xC8, 0, 0}, + {0xC9, 0, 0}, + {0xCA, 0, 0}, + {0xCB, 0, 0}, + {0xCC, 0, 0}, + {0xCD, 0, 0}, + {0xCE, 0x5e, 0}, + {0xCF, 0xc, 0}, + {0xD0, 0xc, 0}, + {0xD1, 0xc, 0}, + {0xD2, 0, 0}, + {0xD3, 0x2b, 0}, + {0xD4, 0xc, 0}, + {0xD5, 0, 0}, + {0xD6, 0x70, 1}, + {0xDB, 0x7, 0}, + {0xDC, 0, 0}, + {0xDD, 0, 0}, + {0xDE, 0x88, 1}, + {0xDF, 0, 0}, + {0xE0, 0x1f, 0}, + {0xE1, 0x20, 1}, + {0xE2, 0x1, 0}, + {0xE3, 0x30, 0}, + {0xE4, 0x70, 0}, + {0xE5, 0, 0}, + {0xE6, 0, 0}, + {0xE7, 0x33, 0}, + {0xE8, 0xf, 1}, + {0xE9, 0x13, 1}, + {0xEA, 0, 0}, + {0xEB, 0xee, 1}, + {0xEE, 0, 0}, + {0xEF, 0x7e, 0}, + {0xF0, 0x3f, 0}, + {0xF1, 0x7f, 0}, + {0xF2, 0x78, 0}, + {0xF3, 0x58, 1}, + {0xF4, 0x88, 0}, + {0xF5, 0x8, 0}, + {0xF6, 0xf, 0}, + {0xF7, 0xbc, 0}, + {0xF8, 0x8, 0}, + {0xF9, 0x60, 0}, + {0xFA, 0x13, 1}, + {0xFB, 0x70, 0}, + {0xFC, 0, 0}, + {0xFD, 0, 0}, + {0xFE, 0, 0}, + {0xFF, 0x33, 0}, + {0x100, 0x13, 1}, + {0x101, 0x14, 1}, + {0x102, 0xee, 1}, + {0x105, 0x3c, 0}, + {0x106, 0x1, 1}, + {0x107, 0xa, 0}, + {0x108, 0x9d, 0}, + {0x109, 0xa, 0}, + {0x10A, 0, 0}, + {0x10B, 0x40, 0}, + {0x10C, 0x40, 0}, + {0x10D, 0x88, 0}, + {0x10E, 0x10, 0}, + {0x10F, 0xf0, 0}, + {0x110, 0x10, 0}, + {0x111, 0xf0, 0}, + {0x112, 0, 0}, + {0x113, 0, 0}, + {0x114, 0x10, 0}, + {0x115, 0x55, 0}, + {0x116, 0x3f, 1}, + {0x117, 0x36, 1}, + {0x118, 0, 0}, + {0x119, 0, 0}, + {0x11A, 0, 0}, + {0x11B, 0x87, 0}, + {0x11C, 0x11, 0}, + {0x11D, 0, 0}, + {0x11E, 0x33, 0}, + {0x11F, 0x88, 0}, + {0x120, 0, 0}, + {0x121, 0x87, 0}, + {0x122, 0x11, 0}, + {0x123, 0, 0}, + {0x124, 0x33, 0}, + {0x125, 0x88, 0}, + {0x126, 0x20, 1}, + {0x127, 0x3f, 0}, + {0x128, 0x44, 0}, + {0x129, 0x8c, 0}, + {0x12A, 0x6c, 0}, + {0x12B, 0x22, 0}, + {0x12C, 0xbe, 0}, + {0x12D, 0x55, 0}, + {0x12F, 0xc, 0}, + {0x130, 0xaa, 0}, + {0x131, 0x2, 0}, + {0x132, 0, 0}, + {0x133, 0x10, 0}, + {0x134, 0x1, 0}, + {0x135, 0, 0}, + {0x136, 0, 0}, + {0x137, 0x80, 0}, + {0x138, 0x60, 0}, + {0x139, 0x44, 0}, + {0x13A, 0x55, 0}, + {0x13B, 0x1, 0}, + {0x13C, 0x55, 0}, + {0x13D, 0x1, 0}, + {0x13E, 0x5, 0}, + {0x13F, 0x55, 0}, + {0x140, 0x55, 0}, + {0x146, 0, 0}, + {0x147, 0, 0}, + {0x148, 0, 0}, + {0x149, 0, 0}, + {0x14A, 0, 0}, + {0x14B, 0, 0}, + {0x14C, 0, 0}, + {0x14D, 0, 0}, + {0x14E, 0, 0}, + {0x14F, 0, 0}, + {0x150, 0, 0}, + {0x151, 0, 0}, + {0x154, 0xc, 0}, + {0x155, 0xc, 0}, + {0x156, 0xc, 0}, + {0x157, 0, 0}, + {0x158, 0x2b, 0}, + {0x159, 0x84, 0}, + {0x15A, 0x15, 0}, + {0x15B, 0xf, 0}, + {0x15C, 0, 0}, + {0x15D, 0, 0}, + {0x15E, 0, 1}, + {0x15F, 0, 1}, + {0x160, 0, 1}, + {0x161, 0, 1}, + {0x162, 0, 1}, + {0x163, 0, 1}, + {0x164, 0, 0}, + {0x165, 0, 0}, + {0x166, 0, 0}, + {0x167, 0, 0}, + {0x168, 0, 0}, + {0x169, 0, 0}, + {0x16A, 0, 1}, + {0x16B, 0, 1}, + {0x16C, 0, 1}, + {0x16D, 0, 0}, + {0x170, 0, 0}, + {0x171, 0x77, 0}, + {0x172, 0x77, 0}, + {0x173, 0x77, 0}, + {0x174, 0x77, 0}, + {0x175, 0, 0}, + {0x176, 0x3, 0}, + {0x177, 0x37, 0}, + {0x178, 0x3, 0}, + {0x179, 0, 0}, + {0x17A, 0x21, 0}, + {0x17B, 0x21, 0}, + {0x17C, 0, 0}, + {0x17D, 0xaa, 0}, + {0x17E, 0, 0}, + {0x17F, 0xaa, 0}, + {0x180, 0, 0}, + {0x190, 0, 0}, + {0x191, 0x77, 0}, + {0x192, 0x77, 0}, + {0x193, 0x77, 0}, + {0x194, 0x77, 0}, + {0x195, 0, 0}, + {0x196, 0x3, 0}, + {0x197, 0x37, 0}, + {0x198, 0x3, 0}, + {0x199, 0, 0}, + {0x19A, 0x21, 0}, + {0x19B, 0x21, 0}, + {0x19C, 0, 0}, + {0x19D, 0xaa, 0}, + {0x19E, 0, 0}, + {0x19F, 0xaa, 0}, + {0x1A0, 0, 0}, + {0x1A1, 0x2, 0}, + {0x1A2, 0xf, 0}, + {0x1A3, 0xf, 0}, + {0x1A4, 0, 1}, + {0x1A5, 0, 1}, + {0x1A6, 0, 1}, + {0x1A7, 0x2, 0}, + {0x1A8, 0xf, 0}, + {0x1A9, 0xf, 0}, + {0x1AA, 0, 1}, + {0x1AB, 0, 1}, + {0x1AC, 0, 1}, + {0x1AD, 0x84, 0}, + {0x1AE, 0x60, 0}, + {0x1AF, 0x47, 0}, + {0x1B0, 0x47, 0}, + {0x1B1, 0, 0}, + {0x1B2, 0, 0}, + {0x1B3, 0, 0}, + {0x1B4, 0, 0}, + {0x1B5, 0, 0}, + {0x1B6, 0, 0}, + {0x1B7, 0x5, 1}, + {0x1B8, 0, 0}, + {0x1B9, 0, 0}, + {0x1BA, 0, 0}, + {0x1BB, 0, 0}, + {0x1BC, 0, 0}, + {0x1BD, 0, 0}, + {0x1BE, 0, 0}, + {0x1BF, 0, 0}, + {0x1C0, 0, 0}, + {0x1C1, 0, 0}, + {0x1C2, 0xa0, 1}, + {0x1C3, 0, 0}, + {0x1C4, 0, 0}, + {0x1C5, 0, 0}, + {0x1C6, 0, 0}, + {0x1C7, 0, 0}, + {0x1C8, 0, 0}, + {0x1C9, 0, 0}, + {0x1CA, 0, 0}, + {0xFFFF, 0, 0} +}; + +radio_20xx_regs_t regs_2057_rev8[] = { + {0x00, 0x8, 1}, + {0x01, 0x57, 1}, + {0x02, 0x20, 1}, + {0x03, 0x1f, 0}, + {0x04, 0x4, 0}, + {0x05, 0x2, 0}, + {0x06, 0x1, 0}, + {0x07, 0x1, 0}, + {0x08, 0x1, 0}, + {0x09, 0x69, 0}, + {0x0A, 0x66, 0}, + {0x0B, 0x6, 0}, + {0x0C, 0x18, 0}, + {0x0D, 0x3, 0}, + {0x0E, 0x20, 0}, + {0x0F, 0x20, 0}, + {0x10, 0, 0}, + {0x11, 0x7c, 0}, + {0x12, 0x42, 0}, + {0x13, 0xbd, 0}, + {0x14, 0x7, 0}, + {0x15, 0x87, 0}, + {0x16, 0x8, 0}, + {0x17, 0x17, 0}, + {0x18, 0x7, 0}, + {0x19, 0, 0}, + {0x1A, 0x2, 0}, + {0x1B, 0x13, 0}, + {0x1C, 0x3e, 0}, + {0x1D, 0x3e, 0}, + {0x1E, 0x96, 0}, + {0x1F, 0x4, 0}, + {0x20, 0, 0}, + {0x21, 0, 0}, + {0x22, 0x17, 0}, + {0x23, 0x6, 0}, + {0x24, 0x1, 0}, + {0x25, 0x6, 0}, + {0x26, 0x4, 0}, + {0x27, 0xd, 0}, + {0x28, 0xd, 0}, + {0x29, 0x30, 0}, + {0x2A, 0x32, 0}, + {0x2B, 0x8, 0}, + {0x2C, 0x1c, 0}, + {0x2D, 0x2, 0}, + {0x2E, 0x4, 0}, + {0x2F, 0x7f, 0}, + {0x30, 0x27, 0}, + {0x31, 0, 1}, + {0x32, 0, 1}, + {0x33, 0, 1}, + {0x34, 0, 0}, + {0x35, 0x20, 0}, + {0x36, 0x18, 0}, + {0x37, 0x7, 0}, + {0x38, 0x66, 0}, + {0x39, 0x66, 0}, + {0x3A, 0x66, 0}, + {0x3B, 0x66, 0}, + {0x3C, 0xff, 0}, + {0x3D, 0xff, 0}, + {0x3E, 0xff, 0}, + {0x3F, 0xff, 0}, + {0x40, 0x16, 0}, + {0x41, 0x7, 0}, + {0x42, 0x19, 0}, + {0x43, 0x7, 0}, + {0x44, 0x6, 0}, + {0x45, 0x3, 0}, + {0x46, 0x1, 0}, + {0x47, 0x7, 0}, + {0x48, 0x33, 0}, + {0x49, 0x5, 0}, + {0x4A, 0x77, 0}, + {0x4B, 0x66, 0}, + {0x4C, 0x66, 0}, + {0x4D, 0, 0}, + {0x4E, 0x4, 0}, + {0x4F, 0xc, 0}, + {0x50, 0, 0}, + {0x51, 0x70, 1}, + {0x56, 0x7, 0}, + {0x57, 0, 0}, + {0x58, 0, 0}, + {0x59, 0x88, 1}, + {0x5A, 0, 0}, + {0x5B, 0x1f, 0}, + {0x5C, 0x20, 1}, + {0x5D, 0x1, 0}, + {0x5E, 0x30, 0}, + {0x5F, 0x70, 0}, + {0x60, 0, 0}, + {0x61, 0, 0}, + {0x62, 0x33, 1}, + {0x63, 0xf, 1}, + {0x64, 0xf, 1}, + {0x65, 0, 0}, + {0x66, 0x11, 0}, + {0x69, 0, 0}, + {0x6A, 0x7e, 0}, + {0x6B, 0x3f, 0}, + {0x6C, 0x7f, 0}, + {0x6D, 0x78, 0}, + {0x6E, 0x58, 1}, + {0x6F, 0x88, 0}, + {0x70, 0x8, 0}, + {0x71, 0xf, 0}, + {0x72, 0xbc, 0}, + {0x73, 0x8, 0}, + {0x74, 0x60, 0}, + {0x75, 0x13, 1}, + {0x76, 0x70, 0}, + {0x77, 0, 0}, + {0x78, 0, 0}, + {0x79, 0, 0}, + {0x7A, 0x33, 0}, + {0x7B, 0x13, 1}, + {0x7C, 0xf, 1}, + {0x7D, 0xee, 1}, + {0x80, 0x3c, 0}, + {0x81, 0x1, 1}, + {0x82, 0xa, 0}, + {0x83, 0x9d, 0}, + {0x84, 0xa, 0}, + {0x85, 0, 0}, + {0x86, 0x40, 0}, + {0x87, 0x40, 0}, + {0x88, 0x88, 0}, + {0x89, 0x10, 0}, + {0x8A, 0xf0, 0}, + {0x8B, 0x10, 0}, + {0x8C, 0xf0, 0}, + {0x8D, 0, 0}, + {0x8E, 0, 0}, + {0x8F, 0x10, 0}, + {0x90, 0x55, 0}, + {0x91, 0x3f, 1}, + {0x92, 0x36, 1}, + {0x93, 0, 0}, + {0x94, 0, 0}, + {0x95, 0, 0}, + {0x96, 0x87, 0}, + {0x97, 0x11, 0}, + {0x98, 0, 0}, + {0x99, 0x33, 0}, + {0x9A, 0x88, 0}, + {0x9B, 0, 0}, + {0x9C, 0x87, 0}, + {0x9D, 0x11, 0}, + {0x9E, 0, 0}, + {0x9F, 0x33, 0}, + {0xA0, 0x88, 0}, + {0xA1, 0x20, 1}, + {0xA2, 0x3f, 0}, + {0xA3, 0x44, 0}, + {0xA4, 0x8c, 0}, + {0xA5, 0x6c, 0}, + {0xA6, 0x22, 0}, + {0xA7, 0xbe, 0}, + {0xA8, 0x55, 0}, + {0xAA, 0xc, 0}, + {0xAB, 0xaa, 0}, + {0xAC, 0x2, 0}, + {0xAD, 0, 0}, + {0xAE, 0x10, 0}, + {0xAF, 0x1, 0}, + {0xB0, 0, 0}, + {0xB1, 0, 0}, + {0xB2, 0x80, 0}, + {0xB3, 0x60, 0}, + {0xB4, 0x44, 0}, + {0xB5, 0x55, 0}, + {0xB6, 0x1, 0}, + {0xB7, 0x55, 0}, + {0xB8, 0x1, 0}, + {0xB9, 0x5, 0}, + {0xBA, 0x55, 0}, + {0xBB, 0x55, 0}, + {0xC1, 0, 0}, + {0xC2, 0, 0}, + {0xC3, 0, 0}, + {0xC4, 0, 0}, + {0xC5, 0, 0}, + {0xC6, 0, 0}, + {0xC7, 0, 0}, + {0xC8, 0, 0}, + {0xC9, 0x1, 1}, + {0xCA, 0, 0}, + {0xCB, 0, 0}, + {0xCC, 0, 0}, + {0xCD, 0, 0}, + {0xCE, 0x5e, 0}, + {0xCF, 0xc, 0}, + {0xD0, 0xc, 0}, + {0xD1, 0xc, 0}, + {0xD2, 0, 0}, + {0xD3, 0x2b, 0}, + {0xD4, 0xc, 0}, + {0xD5, 0, 0}, + {0xD6, 0x70, 1}, + {0xDB, 0x7, 0}, + {0xDC, 0, 0}, + {0xDD, 0, 0}, + {0xDE, 0x88, 1}, + {0xDF, 0, 0}, + {0xE0, 0x1f, 0}, + {0xE1, 0x20, 1}, + {0xE2, 0x1, 0}, + {0xE3, 0x30, 0}, + {0xE4, 0x70, 0}, + {0xE5, 0, 0}, + {0xE6, 0, 0}, + {0xE7, 0x33, 0}, + {0xE8, 0xf, 1}, + {0xE9, 0xf, 1}, + {0xEA, 0, 0}, + {0xEB, 0x11, 0}, + {0xEE, 0, 0}, + {0xEF, 0x7e, 0}, + {0xF0, 0x3f, 0}, + {0xF1, 0x7f, 0}, + {0xF2, 0x78, 0}, + {0xF3, 0x58, 1}, + {0xF4, 0x88, 0}, + {0xF5, 0x8, 0}, + {0xF6, 0xf, 0}, + {0xF7, 0xbc, 0}, + {0xF8, 0x8, 0}, + {0xF9, 0x60, 0}, + {0xFA, 0x13, 1}, + {0xFB, 0x70, 0}, + {0xFC, 0, 0}, + {0xFD, 0, 0}, + {0xFE, 0, 0}, + {0xFF, 0x33, 0}, + {0x100, 0x13, 1}, + {0x101, 0xf, 1}, + {0x102, 0xee, 1}, + {0x105, 0x3c, 0}, + {0x106, 0x1, 1}, + {0x107, 0xa, 0}, + {0x108, 0x9d, 0}, + {0x109, 0xa, 0}, + {0x10A, 0, 0}, + {0x10B, 0x40, 0}, + {0x10C, 0x40, 0}, + {0x10D, 0x88, 0}, + {0x10E, 0x10, 0}, + {0x10F, 0xf0, 0}, + {0x110, 0x10, 0}, + {0x111, 0xf0, 0}, + {0x112, 0, 0}, + {0x113, 0, 0}, + {0x114, 0x10, 0}, + {0x115, 0x55, 0}, + {0x116, 0x3f, 1}, + {0x117, 0x36, 1}, + {0x118, 0, 0}, + {0x119, 0, 0}, + {0x11A, 0, 0}, + {0x11B, 0x87, 0}, + {0x11C, 0x11, 0}, + {0x11D, 0, 0}, + {0x11E, 0x33, 0}, + {0x11F, 0x88, 0}, + {0x120, 0, 0}, + {0x121, 0x87, 0}, + {0x122, 0x11, 0}, + {0x123, 0, 0}, + {0x124, 0x33, 0}, + {0x125, 0x88, 0}, + {0x126, 0x20, 1}, + {0x127, 0x3f, 0}, + {0x128, 0x44, 0}, + {0x129, 0x8c, 0}, + {0x12A, 0x6c, 0}, + {0x12B, 0x22, 0}, + {0x12C, 0xbe, 0}, + {0x12D, 0x55, 0}, + {0x12F, 0xc, 0}, + {0x130, 0xaa, 0}, + {0x131, 0x2, 0}, + {0x132, 0, 0}, + {0x133, 0x10, 0}, + {0x134, 0x1, 0}, + {0x135, 0, 0}, + {0x136, 0, 0}, + {0x137, 0x80, 0}, + {0x138, 0x60, 0}, + {0x139, 0x44, 0}, + {0x13A, 0x55, 0}, + {0x13B, 0x1, 0}, + {0x13C, 0x55, 0}, + {0x13D, 0x1, 0}, + {0x13E, 0x5, 0}, + {0x13F, 0x55, 0}, + {0x140, 0x55, 0}, + {0x146, 0, 0}, + {0x147, 0, 0}, + {0x148, 0, 0}, + {0x149, 0, 0}, + {0x14A, 0, 0}, + {0x14B, 0, 0}, + {0x14C, 0, 0}, + {0x14D, 0, 0}, + {0x14E, 0x1, 1}, + {0x14F, 0, 0}, + {0x150, 0, 0}, + {0x151, 0, 0}, + {0x154, 0xc, 0}, + {0x155, 0xc, 0}, + {0x156, 0xc, 0}, + {0x157, 0, 0}, + {0x158, 0x2b, 0}, + {0x159, 0x84, 0}, + {0x15A, 0x15, 0}, + {0x15B, 0xf, 0}, + {0x15C, 0, 0}, + {0x15D, 0, 0}, + {0x15E, 0, 1}, + {0x15F, 0, 1}, + {0x160, 0, 1}, + {0x161, 0, 1}, + {0x162, 0, 1}, + {0x163, 0, 1}, + {0x164, 0, 0}, + {0x165, 0, 0}, + {0x166, 0, 0}, + {0x167, 0, 0}, + {0x168, 0, 0}, + {0x169, 0, 0}, + {0x16A, 0, 1}, + {0x16B, 0, 1}, + {0x16C, 0, 1}, + {0x16D, 0, 0}, + {0x170, 0, 0}, + {0x171, 0x77, 0}, + {0x172, 0x77, 0}, + {0x173, 0x77, 0}, + {0x174, 0x77, 0}, + {0x175, 0, 0}, + {0x176, 0x3, 0}, + {0x177, 0x37, 0}, + {0x178, 0x3, 0}, + {0x179, 0, 0}, + {0x17A, 0x21, 0}, + {0x17B, 0x21, 0}, + {0x17C, 0, 0}, + {0x17D, 0xaa, 0}, + {0x17E, 0, 0}, + {0x17F, 0xaa, 0}, + {0x180, 0, 0}, + {0x190, 0, 0}, + {0x191, 0x77, 0}, + {0x192, 0x77, 0}, + {0x193, 0x77, 0}, + {0x194, 0x77, 0}, + {0x195, 0, 0}, + {0x196, 0x3, 0}, + {0x197, 0x37, 0}, + {0x198, 0x3, 0}, + {0x199, 0, 0}, + {0x19A, 0x21, 0}, + {0x19B, 0x21, 0}, + {0x19C, 0, 0}, + {0x19D, 0xaa, 0}, + {0x19E, 0, 0}, + {0x19F, 0xaa, 0}, + {0x1A0, 0, 0}, + {0x1A1, 0x2, 0}, + {0x1A2, 0xf, 0}, + {0x1A3, 0xf, 0}, + {0x1A4, 0, 1}, + {0x1A5, 0, 1}, + {0x1A6, 0, 1}, + {0x1A7, 0x2, 0}, + {0x1A8, 0xf, 0}, + {0x1A9, 0xf, 0}, + {0x1AA, 0, 1}, + {0x1AB, 0, 1}, + {0x1AC, 0, 1}, + {0x1AD, 0x84, 0}, + {0x1AE, 0x60, 0}, + {0x1AF, 0x47, 0}, + {0x1B0, 0x47, 0}, + {0x1B1, 0, 0}, + {0x1B2, 0, 0}, + {0x1B3, 0, 0}, + {0x1B4, 0, 0}, + {0x1B5, 0, 0}, + {0x1B6, 0, 0}, + {0x1B7, 0x5, 1}, + {0x1B8, 0, 0}, + {0x1B9, 0, 0}, + {0x1BA, 0, 0}, + {0x1BB, 0, 0}, + {0x1BC, 0, 0}, + {0x1BD, 0, 0}, + {0x1BE, 0, 0}, + {0x1BF, 0, 0}, + {0x1C0, 0, 0}, + {0x1C1, 0, 0}, + {0x1C2, 0xa0, 1}, + {0x1C3, 0, 0}, + {0x1C4, 0, 0}, + {0x1C5, 0, 0}, + {0x1C6, 0, 0}, + {0x1C7, 0, 0}, + {0x1C8, 0, 0}, + {0x1C9, 0, 0}, + {0x1CA, 0, 0}, + {0xFFFF, 0, 0} +}; + +static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; + +static s32 nphy_lnagain_est0[] = { -315, 40370 }; +static s32 nphy_lnagain_est1[] = { -224, 23242 }; + +static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { + { + {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, + {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, + {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, + {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, + {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, + {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, + {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, + {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, + {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} + }, + { + {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, + {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, + {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, + {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, + {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, + {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, + {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, + {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, + {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} + } +}; + +static const u32 nphy_tpc_txgain[] = { + 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, + 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, + 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, + 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, + 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, + 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, + 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, + 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, + 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, + 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, + 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, + 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, + 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, + 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, + 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, + 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, + 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, + 0x03902942, 0x03902844, 0x03902842, 0x03902744, + 0x03902742, 0x03902644, 0x03902642, 0x03902544, + 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, + 0x03802a42, 0x03802944, 0x03802942, 0x03802844, + 0x03802842, 0x03802744, 0x03802742, 0x03802644, + 0x03802642, 0x03802544, 0x03802542, 0x03802444, + 0x03802442, 0x03802344, 0x03802342, 0x03802244, + 0x03802242, 0x03802144, 0x03802142, 0x03802044, + 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, + 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, + 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, + 0x03801a42, 0x03801944, 0x03801942, 0x03801844, + 0x03801842, 0x03801744, 0x03801742, 0x03801644, + 0x03801642, 0x03801544, 0x03801542, 0x03801444, + 0x03801442, 0x03801344, 0x03801342, 0x00002b00 +}; + +static const u16 nphy_tpc_loscale[] = { + 256, 256, 271, 271, 287, 256, 256, 271, + 271, 287, 287, 304, 304, 256, 256, 271, + 271, 287, 287, 304, 304, 322, 322, 341, + 341, 362, 362, 383, 383, 256, 256, 271, + 271, 287, 287, 304, 304, 322, 322, 256, + 256, 271, 271, 287, 287, 304, 304, 322, + 322, 341, 341, 362, 362, 256, 256, 271, + 271, 287, 287, 304, 304, 322, 322, 256, + 256, 271, 271, 287, 287, 304, 304, 322, + 322, 341, 341, 362, 362, 256, 256, 271, + 271, 287, 287, 304, 304, 322, 322, 341, + 341, 362, 362, 383, 383, 406, 406, 430, + 430, 455, 455, 482, 482, 511, 511, 541, + 541, 573, 573, 607, 607, 643, 643, 681, + 681, 722, 722, 764, 764, 810, 810, 858, + 858, 908, 908, 962, 962, 1019, 1019, 256 +}; + +static u32 nphy_tpc_txgain_ipa[] = { + 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, + 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, + 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, + 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, + 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, + 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, + 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, + 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, + 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, + 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, + 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, + 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, + 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, + 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, + 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, + 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, + 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, + 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, + 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, + 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, + 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, + 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, + 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, + 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, + 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, + 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, + 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, + 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, + 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, + 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, + 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, + 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 +}; + +static u32 nphy_tpc_txgain_ipa_rev5[] = { + 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, + 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, + 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, + 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, + 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, + 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, + 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, + 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, + 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, + 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, + 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, + 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, + 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, + 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, + 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, + 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, + 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, + 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, + 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, + 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, + 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, + 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, + 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, + 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, + 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, + 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, + 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, + 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, + 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, + 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, + 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, + 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 +}; + +static u32 nphy_tpc_txgain_ipa_rev6[] = { + 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, + 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, + 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, + 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, + 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, + 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, + 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, + 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, + 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, + 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, + 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, + 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, + 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, + 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, + 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, + 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, + 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, + 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, + 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, + 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, + 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, + 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, + 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, + 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, + 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, + 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, + 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, + 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, + 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, + 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, + 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, + 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 +}; + +static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { + 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, + 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, + 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, + 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, + 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, + 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, + 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, + 0x70470028, 0x70470026, 0x70470024, 0x70470022, + 0x7047001f, 0x70370027, 0x70370024, 0x70370022, + 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, + 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, + 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, + 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, + 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, + 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, + 0x70170019, 0x70170018, 0x70170016, 0x70170015, + 0x70170014, 0x70170013, 0x70170012, 0x70170010, + 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, + 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, + 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, + 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, + 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, + 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, + 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, + 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, + 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, + 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, + 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, + 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, + 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, + 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, + 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 +}; + +static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { + 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, + 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, + 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, + 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, + 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, + 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, + 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, + 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, + 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, + 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, + 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, + 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, + 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, + 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, + 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, + 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, + 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, + 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, + 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, + 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, + 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, + 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, + 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, + 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, + 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, + 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, + 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, + 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, + 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, + 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, + 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, + 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 +}; + +static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { + 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, + 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, + 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, + 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, + 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, + 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, + 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, + 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, + 0x30270027, 0x30270025, 0x30270023, 0x301f002c, + 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, + 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, + 0x30170028, 0x30170026, 0x30170024, 0x30170022, + 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, + 0x3017001a, 0x30170018, 0x30170017, 0x30170015, + 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, + 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, + 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, + 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, + 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 +}; + +static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { + 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, + 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, + 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, + 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, + 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, + 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, + 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, + 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, + 0x30270027, 0x30270025, 0x30270023, 0x301f002c, + 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, + 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, + 0x30170028, 0x30170026, 0x30170024, 0x30170022, + 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, + 0x3017001a, 0x30170018, 0x30170017, 0x30170015, + 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, + 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, + 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, + 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, + 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, + 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 +}; + +static u32 nphy_tpc_txgain_ipa_5g[] = { + 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, + 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, + 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, + 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, + 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, + 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, + 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, + 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, + 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, + 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, + 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, + 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, + 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, + 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, + 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, + 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, + 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, + 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, + 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, + 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, + 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, + 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, + 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, + 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, + 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, + 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, + 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, + 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, + 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, + 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, + 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, + 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f +}; + +static u32 nphy_tpc_txgain_ipa_5g_2057[] = { + 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, + 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, + 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, + 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, + 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, + 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, + 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, + 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, + 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, + 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, + 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, + 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, + 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, + 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, + 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, + 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, + 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, + 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, + 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, + 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, + 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, + 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, + 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, + 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, + 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, + 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, + 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, + 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, + 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, + 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, + 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, + 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 +}; + +static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { + 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, + 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, + 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, + 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, + 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, + 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, + 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, + 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, + 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, + 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, + 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, + 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, + 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, + 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, + 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, + 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, + 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, + 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, + 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, + 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, + 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, + 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, + 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, + 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, + 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, + 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, + 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, + 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, + 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, + 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, + 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, + 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 +}; + +static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { + -114, -108, -98, -91, -84, -78, -70, -62, + -54, -46, -39, -31, -23, -15, -8, 0 +}; + +static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { + -100, -95, -89, -83, -77, -70, -63, -56, + -48, -41, -33, -25, -19, -12, -6, 0 +}; + +static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { + -159, -113, -86, -72, -62, -54, -48, -43, + -39, -35, -31, -28, -25, -23, -20, -18, + -17, -15, -13, -11, -10, -8, -7, -6, + -5, -4, -3, -3, -2, -1, -1, 0 +}; + +static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { + -109, -109, -82, -68, -58, -50, -44, -39, + -35, -31, -28, -26, -23, -21, -19, -17, + -16, -14, -13, -11, -10, -9, -8, -7, + -5, -5, -4, -3, -2, -1, -1, 0 +}; + +static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { + -122, -122, -95, -80, -69, -61, -54, -49, + -43, -39, -35, -32, -28, -26, -23, -21, + -18, -16, -15, -13, -11, -10, -8, -7, + -6, -5, -4, -3, -2, -1, -1, 0 +}; + +static s8 nphy_papd_pgagain_dlt_5g_2057[] = { + -107, -101, -92, -85, -78, -71, -62, -55, + -47, -39, -32, -24, -19, -12, -6, 0 +}; + +static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { + -110, -104, -95, -88, -81, -74, -66, -58, + -50, -44, -36, -28, -23, -15, -8, 0 +}; + +static u8 pad_gain_codes_used_2057rev5[] = { + 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, + 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 +}; + +static u8 pad_gain_codes_used_2057rev7[] = { + 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1 +}; + +static u8 pad_all_gain_codes_2057[] = { + 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, + 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, + 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, + 1, 0 +}; + +static u8 pga_all_gain_codes_2057[] = { + 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 +}; + +static u32 nphy_papd_scaltbl[] = { + 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, + 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, + 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, + 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, + 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, + 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, + 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, + 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, + 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, + 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, + 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, + 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, + 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, + 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, + 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, + 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 +}; + +static u32 nphy_tpc_txgain_rev3[] = { + 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, + 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, + 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, + 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, + 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, + 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, + 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, + 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, + 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, + 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, + 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, + 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, + 0x19410044, 0x19410042, 0x19410040, 0x1941003e, + 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, + 0x18410044, 0x18410042, 0x18410040, 0x1841003e, + 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, + 0x17410044, 0x17410042, 0x17410040, 0x1741003e, + 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, + 0x16410044, 0x16410042, 0x16410040, 0x1641003e, + 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, + 0x15410044, 0x15410042, 0x15410040, 0x1541003e, + 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, + 0x14410044, 0x14410042, 0x14410040, 0x1441003e, + 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, + 0x13410044, 0x13410042, 0x13410040, 0x1341003e, + 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, + 0x12410044, 0x12410042, 0x12410040, 0x1241003e, + 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, + 0x11410044, 0x11410042, 0x11410040, 0x1141003e, + 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, + 0x10410044, 0x10410042, 0x10410040, 0x1041003e, + 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 +}; + +static u32 nphy_tpc_txgain_HiPwrEPA[] = { + 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, + 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, + 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, + 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, + 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, + 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, + 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, + 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, + 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, + 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, + 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, + 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, + 0x09410044, 0x09410042, 0x09410040, 0x0941003e, + 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, + 0x08410044, 0x08410042, 0x08410040, 0x0841003e, + 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, + 0x07410044, 0x07410042, 0x07410040, 0x0741003e, + 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, + 0x06410044, 0x06410042, 0x06410040, 0x0641003e, + 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, + 0x05410044, 0x05410042, 0x05410040, 0x0541003e, + 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, + 0x04410044, 0x04410042, 0x04410040, 0x0441003e, + 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, + 0x03410044, 0x03410042, 0x03410040, 0x0341003e, + 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, + 0x02410044, 0x02410042, 0x02410040, 0x0241003e, + 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, + 0x01410044, 0x01410042, 0x01410040, 0x0141003e, + 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, + 0x00410044, 0x00410042, 0x00410040, 0x0041003e, + 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 +}; + +static u32 nphy_tpc_txgain_epa_2057rev3[] = { + 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, + 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, + 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, + 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, + 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, + 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, + 0x80390038, 0x80390035, 0x8031003a, 0x80310036, + 0x80310033, 0x8029003a, 0x80290037, 0x80290034, + 0x80290031, 0x80210039, 0x80210036, 0x80210033, + 0x80210030, 0x8019003c, 0x80190039, 0x80190036, + 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, + 0x80190028, 0x8011003a, 0x80110036, 0x80110033, + 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, + 0x80110027, 0x80110024, 0x80110022, 0x80110020, + 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, + 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, + 0x80090029, 0x80090027, 0x80090025, 0x80090023, + 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, + 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, + 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, + 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d +}; + +static u32 nphy_tpc_txgain_epa_2057rev5[] = { + 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, + 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, + 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, + 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, + 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, + 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, + 0x10390038, 0x10390035, 0x1031003a, 0x10310036, + 0x10310033, 0x1029003a, 0x10290037, 0x10290034, + 0x10290031, 0x10210039, 0x10210036, 0x10210033, + 0x10210030, 0x1019003c, 0x10190039, 0x10190036, + 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, + 0x10190028, 0x1011003a, 0x10110036, 0x10110033, + 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, + 0x10110027, 0x10110024, 0x10110022, 0x10110020, + 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, + 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, + 0x10090029, 0x10090027, 0x10090025, 0x10090023, + 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, + 0x1009001a, 0x10090018, 0x10090017, 0x10090016, + 0x10090015, 0x10090013, 0x10090012, 0x10090011, + 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, + 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, + 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, + 0x10090008, 0x10090008, 0x10090007, 0x10090007, + 0x10090007, 0x10090006, 0x10090006, 0x10090005, + 0x10090005, 0x10090005, 0x10090005, 0x10090004, + 0x10090004, 0x10090004, 0x10090004, 0x10090003, + 0x10090003, 0x10090003, 0x10090003, 0x10090003, + 0x10090003, 0x10090002, 0x10090002, 0x10090002, + 0x10090002, 0x10090002, 0x10090002, 0x10090002, + 0x10090002, 0x10090002, 0x10090001, 0x10090001, + 0x10090001, 0x10090001, 0x10090001, 0x10090001 +}; + +static u32 nphy_tpc_5GHz_txgain_rev3[] = { + 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, + 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, + 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, + 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, + 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, + 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, + 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, + 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, + 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, + 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, + 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, + 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, + 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, + 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, + 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, + 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, + 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, + 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, + 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, + 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, + 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, + 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, + 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, + 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, + 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, + 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, + 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, + 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, + 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, + 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, + 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, + 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 +}; + +static u32 nphy_tpc_5GHz_txgain_rev4[] = { + 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, + 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, + 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, + 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, + 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, + 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, + 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, + 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, + 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, + 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, + 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, + 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, + 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, + 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, + 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, + 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, + 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, + 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, + 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, + 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, + 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, + 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, + 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, + 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, + 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, + 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, + 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, + 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, + 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, + 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, + 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, + 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 +}; + +static u32 nphy_tpc_5GHz_txgain_rev5[] = { + 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, + 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, + 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, + 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, + 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, + 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, + 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, + 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, + 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, + 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, + 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, + 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, + 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, + 0x09620039, 0x09620037, 0x09620035, 0x09620033, + 0x08620044, 0x08620042, 0x08620040, 0x0862003e, + 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, + 0x07620043, 0x07620042, 0x07620040, 0x0762003f, + 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, + 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, + 0x06620039, 0x06620037, 0x06620035, 0x06620033, + 0x05620046, 0x05620044, 0x05620042, 0x05620040, + 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, + 0x04620044, 0x04620042, 0x04620040, 0x0462003e, + 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, + 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, + 0x03620038, 0x03620037, 0x03620035, 0x03620033, + 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, + 0x02620046, 0x02620044, 0x02620043, 0x02620042, + 0x0162004a, 0x01620048, 0x01620046, 0x01620044, + 0x01620043, 0x01620042, 0x01620041, 0x01620040, + 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, + 0x0062003b, 0x00620039, 0x00620037, 0x00620035 +}; + +static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { + 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, + 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, + 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, + 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, + 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, + 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, + 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, + 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, + 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, + 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, + 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, + 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, + 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, + 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, + 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, + 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, + 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, + 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, + 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, + 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, + 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, + 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, + 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, + 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, + 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, + 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, + 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, + 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, + 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, + 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, + 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, + 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 +}; + +static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; +static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; +static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { + 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a }; +static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { + 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 }; + +static bool wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, + chan_info_nphy_radio2057_t **t0, + chan_info_nphy_radio205x_t **t1, + chan_info_nphy_radio2057_rev5_t **t2, + chan_info_nphy_2055_t **t3); +static void wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chans, + const nphy_sfo_cfg_t *c); + +static void wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, + u16 reduction_factr); +static void wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *, + u32 *buf); +static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr); +static void wlc_phy_txlpfbw_nphy(phy_info_t *pi); +static void wlc_phy_spurwar_nphy(phy_info_t *pi); + +static void wlc_phy_radio_preinit_2055(phy_info_t *pi); +static void wlc_phy_radio_init_2055(phy_info_t *pi); +static void wlc_phy_radio_postinit_2055(phy_info_t *pi); +static void wlc_phy_radio_preinit_205x(phy_info_t *pi); +static void wlc_phy_radio_init_2056(phy_info_t *pi); +static void wlc_phy_radio_postinit_2056(phy_info_t *pi); +static void wlc_phy_radio_init_2057(phy_info_t *pi); +static void wlc_phy_radio_postinit_2057(phy_info_t *pi); +static void wlc_phy_workarounds_nphy(phy_info_t *pi); +static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi); +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi); +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi); +static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi); + +static void wlc_phy_restore_rssical_nphy(phy_info_t *pi); +static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi); +static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi); +static int wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t tg, + u8 type, bool d); +static void wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rxcore, + u16 *rg, u8 type); +static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble); +static void wlc_phy_savecal_nphy(phy_info_t *pi); +static void wlc_phy_restorecal_nphy(phy_info_t *pi); +static void wlc_phy_resetcca_nphy(phy_info_t *pi); + +static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi); +static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi); +static void wlc_phy_precal_txgain_nphy(phy_info_t *pi); +static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core); + +static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi); +static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi); +static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi); +static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi); +static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1); +static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi); + +static void wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32, + u32 e); +static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core); +static void wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *, + phy_cal_mode_t, u8); +static void wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, + nphy_papd_restore_state *state); +static void wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, + nphy_papd_restore_state *state, u8); + +static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals); + +static void wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *evts, + u8 *dlys, u8 len); + +static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset); + +static void +wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, + u8 core_mask, u8 off, + u8 override_id); + +static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type); +static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi); + +static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi); +static void wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, + u16 *pwr_offset, + u8 tmp_max_pwr, u8 rate_start, + u8 rate_end); + +static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi); +static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi); +static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi); +static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi); + +static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi); +static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core); +static void wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, + u8 idx1); +static void wlc_phy_a4(phy_info_t *pi, bool full_cal); + +static u16 wlc_phy_radio205x_rcal(phy_info_t *pi); + +static u16 wlc_phy_radio2057_rccal(phy_info_t *pi); + +static u16 wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, + u16 max_val, + u8 dac_test_mode); +static void wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, + u16 num_samps); +static void wlc_phy_runsamples_nphy(phy_info_t *pi, u16 n, u16 lps, + u16 wait, u8 iq, u8 dac_test_mode, + bool modify_bbmult); + +bool wlc_phy_bist_check_phy(wlc_phy_t *pih) +{ + phy_info_t *pi = (phy_info_t *) pih; + u32 phybist0, phybist1, phybist2, phybist3, phybist4; + + if (NREV_GE(pi->pubpi.phy_rev, 16)) + return true; + + phybist0 = read_phy_reg(pi, 0x0e); + phybist1 = read_phy_reg(pi, 0x0f); + phybist2 = read_phy_reg(pi, 0xea); + phybist3 = read_phy_reg(pi, 0xeb); + phybist4 = read_phy_reg(pi, 0x156); + + if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && + (phybist3 == 0) && (phybist4 == 0)) { + return true; + } + + return false; +} + +static void WLBANDINITFN(wlc_phy_bphy_init_nphy) (phy_info_t *pi) +{ + u16 addr, val; + + val = 0x1e1f; + for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); + addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { + write_phy_reg(pi, addr, val); + if (addr == (NPHY_TO_BPHY_OFF + 0x97)) + val = 0x3e3f; + else + val -= 0x0202; + } + + if (NORADIO_ENAB(pi->pubpi)) { + + write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_PHYCRSTH, 0x3206); + + write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_RSSI_TRESH, 0x281e); + + or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_LNA_GAIN_RANGE, 0x1a); + + } else { + + write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); + } +} + +void +wlc_phy_table_write_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, + u32 width, const void *data) +{ + mimophytbl_info_t tbl; + + tbl.tbl_id = id; + tbl.tbl_len = len; + tbl.tbl_offset = offset; + tbl.tbl_width = width; + tbl.tbl_ptr = data; + wlc_phy_write_table_nphy(pi, &tbl); +} + +void +wlc_phy_table_read_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, + u32 width, void *data) +{ + mimophytbl_info_t tbl; + + tbl.tbl_id = id; + tbl.tbl_len = len; + tbl.tbl_offset = offset; + tbl.tbl_width = width; + tbl.tbl_ptr = data; + wlc_phy_read_table_nphy(pi, &tbl); +} + +static void WLBANDINITFN(wlc_phy_static_table_download_nphy) (phy_info_t *pi) +{ + uint idx; + + if (NREV_GE(pi->pubpi.phy_rev, 16)) { + for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev16[idx]); + } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev7[idx]); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3[idx]); + } else { + for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev0[idx]); + } +} + +static void WLBANDINITFN(wlc_phy_tbl_init_nphy) (phy_info_t *pi) +{ + uint idx = 0; + u8 antswctrllut; + + if (pi->phy_init_por) + wlc_phy_static_table_download_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? + pi->srom_fem2g.antswctrllut : pi->srom_fem5g.antswctrllut; + + switch (antswctrllut) { + case 0: + + break; + + case 1: + + if (pi->aa2g == 7) { + + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x21, 8, + &ant_sw_ctrl_tbl_rev8_2o3 + [0]); + } else { + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x21, 8, + &ant_sw_ctrl_tbl_rev8 + [0]); + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x25, 8, + &ant_sw_ctrl_tbl_rev8[2]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x29, 8, + &ant_sw_ctrl_tbl_rev8[4]); + break; + + case 2: + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x1, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core0 + [0]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x5, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core0 + [2]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x9, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core0 + [4]); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x21, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core1 + [0]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x25, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core1 + [2]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 2, 0x29, 8, + &ant_sw_ctrl_tbl_rev8_2057v7_core1 + [4]); + break; + + default: + break; + } + + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { + + if (idx == ANT_SWCTRL_TBL_REV3_IDX) { + antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? + pi->srom_fem2g.antswctrllut : pi-> + srom_fem5g.antswctrllut; + switch (antswctrllut) { + case 0: + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3_volatile + [idx]); + break; + case 1: + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3_volatile1 + [idx]); + break; + case 2: + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3_volatile2 + [idx]); + break; + case 3: + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3_volatile3 + [idx]); + break; + default: + break; + } + } else { + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev3_volatile + [idx]); + } + } + } else { + for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) { + wlc_phy_write_table_nphy(pi, + &mimophytbl_info_rev0_volatile + [idx]); + } + } +} + +static void +wlc_phy_write_txmacreg_nphy(phy_info_t *pi, u16 holdoff, u16 delay) +{ + write_phy_reg(pi, 0x77, holdoff); + write_phy_reg(pi, 0xb4, delay); +} + +void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs) +{ + u16 holdoff, delay; + + if (rifs) { + + holdoff = 0x10; + delay = 0x258; + } else { + + holdoff = 0x15; + delay = 0x320; + } + + wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); + + if (pi && pi->sh && (pi->sh->_rifs_phy != rifs)) { + pi->sh->_rifs_phy = rifs; + } +} + +bool wlc_phy_attach_nphy(phy_info_t *pi) +{ + uint i; + + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) { + pi->phyhang_avoid = true; + } + + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { + + pi->nphy_gband_spurwar_en = true; + + if (pi->sh->boardflags2 & BFL2_SPUR_WAR) { + pi->nphy_aband_spurwar_en = true; + } + } + if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { + + if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) { + pi->nphy_gband_spurwar2_en = true; + } + } + + pi->n_preamble_override = AUTO; + if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) + pi->n_preamble_override = WLC_N_PREAMBLE_MIXEDMODE; + + pi->nphy_txrx_chain = AUTO; + pi->phy_scraminit = AUTO; + + pi->nphy_rxcalparams = 0x010100B5; + + pi->nphy_perical = PHY_PERICAL_MPHASE; + pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; + pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; + + pi->nphy_gain_boost = true; + pi->nphy_elna_gain_config = false; + pi->radio_is_on = false; + + for (i = 0; i < pi->pubpi.phy_corenum; i++) { + pi->nphy_txpwrindex[i].index = AUTO; + } + + wlc_phy_txpwrctrl_config_nphy(pi); + if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) + pi->hwpwrctrl_capable = true; + + pi->pi_fptr.init = wlc_phy_init_nphy; + pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; + pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; + pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; + + if (!wlc_phy_txpwr_srom_read_nphy(pi)) + return false; + + return true; +} + +static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi) +{ + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + pi->nphy_txpwrctrl = PHY_TPC_HW_ON; + pi->phy_5g_pwrgain = true; + return; + } + + pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; + pi->phy_5g_pwrgain = false; + + if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && + NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) + pi->nphy_txpwrctrl = PHY_TPC_HW_ON; + else if ((pi->sh->sromrev >= 4) + && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) + pi->phy_5g_pwrgain = true; +} + +void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) +{ + u16 val; + u16 clip1_ths[2]; + nphy_txgains_t target_gain; + u8 tx_pwr_ctrl_state; + bool do_nphy_cal = false; + uint core; + uint origidx, intr_val; + d11regs_t *regs; + u32 d11_clk_ctl_st; + + core = 0; + + if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) { + pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; + } + + if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && + ((pi->sh->chippkg == BCM4717_PKG_ID) || + (pi->sh->chippkg == BCM4718_PKG_ID))) { + if ((pi->sh->boardflags & BFL_EXTLNA) && + (CHSPEC_IS2G(pi->radio_chanspec))) { + ai_corereg(pi->sh->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol), 0x40, + 0x40); + } + } + + if ((!PHY_IPA(pi)) && (pi->sh->chip == BCM5357_CHIP_ID)) { + si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA, + CCTRL5357_EXTPA); + } + + if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && + CHSPEC_IS40(pi->radio_chanspec)) { + + regs = (d11regs_t *) ai_switch_core(pi->sh->sih, D11_CORE_ID, + &origidx, &intr_val); + d11_clk_ctl_st = R_REG(®s->clk_ctl_st); + AND_REG(®s->clk_ctl_st, + ~(CCS_FORCEHT | CCS_HTAREQ)); + + W_REG(®s->clk_ctl_st, d11_clk_ctl_st); + + ai_restore_core(pi->sh->sih, origidx, intr_val); + } + + pi->use_int_tx_iqlo_cal_nphy = + (PHY_IPA(pi) || + (NREV_GE(pi->pubpi.phy_rev, 7) || + (NREV_GE(pi->pubpi.phy_rev, 5) + && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); + + pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; + + pi->nphy_deaf_count = 0; + + wlc_phy_tbl_init_nphy(pi); + + pi->nphy_crsminpwr_adjusted = false; + pi->nphy_noisevars_adjusted = false; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0xe7, 0); + write_phy_reg(pi, 0xec, 0); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_phy_reg(pi, 0x342, 0); + write_phy_reg(pi, 0x343, 0); + write_phy_reg(pi, 0x346, 0); + write_phy_reg(pi, 0x347, 0); + } + write_phy_reg(pi, 0xe5, 0); + write_phy_reg(pi, 0xe6, 0); + } else { + write_phy_reg(pi, 0xec, 0); + } + + write_phy_reg(pi, 0x91, 0); + write_phy_reg(pi, 0x92, 0); + if (NREV_LT(pi->pubpi.phy_rev, 6)) { + write_phy_reg(pi, 0x93, 0); + write_phy_reg(pi, 0x94, 0); + } + + and_phy_reg(pi, 0xa1, ~3); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0x8f, 0); + write_phy_reg(pi, 0xa5, 0); + } else { + write_phy_reg(pi, 0xa5, 0); + } + + if (NREV_IS(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); + else if (NREV_LT(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); + + write_phy_reg(pi, 0x203, 32); + write_phy_reg(pi, 0x201, 32); + + if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) + write_phy_reg(pi, 0x20d, 160); + else + write_phy_reg(pi, 0x20d, 184); + + write_phy_reg(pi, 0x13a, 200); + + write_phy_reg(pi, 0x70, 80); + + write_phy_reg(pi, 0x1ff, 48); + + if (NREV_LT(pi->pubpi.phy_rev, 8)) { + wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); + } + + wlc_phy_stf_chain_upd_nphy(pi); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + write_phy_reg(pi, 0x180, 0xaa8); + write_phy_reg(pi, 0x181, 0x9a4); + } + + if (PHY_IPA(pi)) { + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : + 0x29c, (0x1ff << 7), + (pi->nphy_papd_epsilon_offset[core]) << 7); + + } + + wlc_phy_ipa_set_tx_digi_filts_nphy(pi); + } else { + + if (NREV_GE(pi->pubpi.phy_rev, 5)) { + wlc_phy_extpa_set_tx_digi_filts_nphy(pi); + } + } + + wlc_phy_workarounds_nphy(pi); + + wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); + + val = read_phy_reg(pi, 0x01); + write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); + write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); + wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); + + wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); + + wlc_phy_pa_override_nphy(pi, OFF); + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + wlc_phy_pa_override_nphy(pi, ON); + + wlc_phy_classifier_nphy(pi, 0, 0); + wlc_phy_clip_det_nphy(pi, 0, clip1_ths); + + if (CHSPEC_IS2G(pi->radio_chanspec)) + wlc_phy_bphy_init_nphy(pi); + + tx_pwr_ctrl_state = pi->nphy_txpwrctrl; + wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); + + wlc_phy_txpwr_fixpower_nphy(pi); + + wlc_phy_txpwrctrl_idle_tssi_nphy(pi); + + wlc_phy_txpwrctrl_pwr_setup_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + u32 *tx_pwrctrl_tbl = NULL; + u16 idx; + s16 pga_gn = 0; + s16 pad_gn = 0; + s32 rfpwr_offset = 0; + + if (PHY_IPA(pi)) { + tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if NREV_IS + (pi->pubpi.phy_rev, 3) { + tx_pwrctrl_tbl = + nphy_tpc_5GHz_txgain_rev3; + } else if NREV_IS + (pi->pubpi.phy_rev, 4) { + tx_pwrctrl_tbl = + (pi->srom_fem5g.extpagain == 3) ? + nphy_tpc_5GHz_txgain_HiPwrEPA : + nphy_tpc_5GHz_txgain_rev4; + } else { + tx_pwrctrl_tbl = + nphy_tpc_5GHz_txgain_rev5; + } + + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (pi->pubpi.radiorev == 5) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_epa_2057rev5; + } else if (pi->pubpi.radiorev == 3) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_epa_2057rev3; + } + + } else { + if (NREV_GE(pi->pubpi.phy_rev, 5) && + (pi->srom_fem2g.extpagain == 3)) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_HiPwrEPA; + } else { + tx_pwrctrl_tbl = + nphy_tpc_txgain_rev3; + } + } + } + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, + 192, 32, tx_pwrctrl_tbl); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, + 192, 32, tx_pwrctrl_tbl); + + pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + for (idx = 0; idx < 128; idx++) { + pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; + pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + rfpwr_offset = (s16) + nphy_papd_padgain_dlt_2g_2057rev3n4 + [pad_gn]; + } else if (pi->pubpi.radiorev == 5) { + rfpwr_offset = (s16) + nphy_papd_padgain_dlt_2g_2057rev5 + [pad_gn]; + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == + 8)) { + rfpwr_offset = (s16) + nphy_papd_padgain_dlt_2g_2057rev7 + [pad_gn]; + } + } else { + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + rfpwr_offset = (s16) + nphy_papd_pgagain_dlt_5g_2057 + [pga_gn]; + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == + 8)) { + rfpwr_offset = (s16) + nphy_papd_pgagain_dlt_5g_2057rev7 + [pga_gn]; + } + } + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_CORE1TXPWRCTL, + 1, 576 + idx, 32, + &rfpwr_offset); + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_CORE2TXPWRCTL, + 1, 576 + idx, 32, + &rfpwr_offset); + } + } else { + + for (idx = 0; idx < 128; idx++) { + pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; + if (CHSPEC_IS2G(pi->radio_chanspec)) { + rfpwr_offset = (s16) + nphy_papd_pga_gain_delta_ipa_2g + [pga_gn]; + } else { + rfpwr_offset = (s16) + nphy_papd_pga_gain_delta_ipa_5g + [pga_gn]; + } + + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_CORE1TXPWRCTL, + 1, 576 + idx, 32, + &rfpwr_offset); + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_CORE2TXPWRCTL, + 1, 576 + idx, 32, + &rfpwr_offset); + } + + } + } else { + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, + 192, 32, nphy_tpc_txgain); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, + 192, 32, nphy_tpc_txgain); + } + + if (pi->sh->phyrxchain != 0x3) { + wlc_phy_rxcore_setstate_nphy((wlc_phy_t *) pi, + pi->sh->phyrxchain); + } + + if (PHY_PERICAL_MPHASE_PENDING(pi)) { + wlc_phy_cal_perical_mphase_restart(pi); + } + + if (!NORADIO_ENAB(pi->pubpi)) { + bool do_rssi_cal = false; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? + (pi->nphy_rssical_chanspec_2G == 0) : + (pi->nphy_rssical_chanspec_5G == 0); + + if (do_rssi_cal) { + wlc_phy_rssi_cal_nphy(pi); + } else { + wlc_phy_restore_rssical_nphy(pi); + } + } else { + wlc_phy_rssi_cal_nphy(pi); + } + + if (!SCAN_RM_IN_PROGRESS(pi)) { + do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? + (pi->nphy_iqcal_chanspec_2G == 0) : + (pi->nphy_iqcal_chanspec_5G == 0); + } + + if (!pi->do_initcal) + do_nphy_cal = false; + + if (do_nphy_cal) { + + target_gain = wlc_phy_get_tx_gain_nphy(pi); + + if (pi->antsel_type == ANTSEL_2x3) + wlc_phy_antsel_init((wlc_phy_t *) pi, true); + + if (pi->nphy_perical != PHY_PERICAL_MPHASE) { + wlc_phy_rssi_cal_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + pi->nphy_cal_orig_pwr_idx[0] = + pi->nphy_txpwrindex[PHY_CORE_0]. + index_internal; + pi->nphy_cal_orig_pwr_idx[1] = + pi->nphy_txpwrindex[PHY_CORE_1]. + index_internal; + + wlc_phy_precal_txgain_nphy(pi); + target_gain = + wlc_phy_get_tx_gain_nphy(pi); + } + + if (wlc_phy_cal_txiqlo_nphy + (pi, target_gain, true, false) == 0) { + if (wlc_phy_cal_rxiq_nphy + (pi, target_gain, 2, + false) == 0) { + wlc_phy_savecal_nphy(pi); + + } + } + } else if (pi->mphase_cal_phase_id == + MPHASE_CAL_STATE_IDLE) { + + wlc_phy_cal_perical((wlc_phy_t *) pi, + PHY_PERICAL_PHYINIT); + } + } else { + wlc_phy_restorecal_nphy(pi); + } + } + + wlc_phy_txpwrctrl_coeff_setup_nphy(pi); + + wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); + + wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); + + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) + + write_phy_reg(pi, 0x70, 50); + + wlc_phy_txlpfbw_nphy(pi); + + wlc_phy_spurwar_nphy(pi); + +} + +static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble) +{ + bool gf_preamble = false; + u16 val; + + if (preamble == WLC_N_PREAMBLE_GF) { + gf_preamble = true; + } + + val = read_phy_reg(pi, 0xed); + + val |= RX_GF_MM_AUTO; + val &= ~RX_GF_OR_MM; + if (gf_preamble) + val |= RX_GF_OR_MM; + + write_phy_reg(pi, 0xed, val); +} + +static void wlc_phy_resetcca_nphy(phy_info_t *pi) +{ + u16 val; + + wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); + + val = read_phy_reg(pi, 0x01); + write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); + udelay(1); + write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); + + wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); + + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); +} + +void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en) +{ + u16 rfctrlintc_override_val; + + if (!en) { + + pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); + pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + rfctrlintc_override_val = 0x1480; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + rfctrlintc_override_val = + CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; + } else { + rfctrlintc_override_val = + CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; + } + + write_phy_reg(pi, 0x91, rfctrlintc_override_val); + write_phy_reg(pi, 0x92, rfctrlintc_override_val); + } else { + + write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); + write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); + } + +} + +void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi) +{ + + u16 txrx_chain = + (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); + bool CoreActv_override = false; + + if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN0) { + txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; + CoreActv_override = true; + + if (NREV_LE(pi->pubpi.phy_rev, 2)) { + and_phy_reg(pi, 0xa0, ~0x20); + } + } else if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN1) { + txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; + CoreActv_override = true; + + if (NREV_LE(pi->pubpi.phy_rev, 2)) { + or_phy_reg(pi, 0xa0, 0x20); + } + } + + mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); + + if (CoreActv_override) { + + pi->nphy_perical = PHY_PERICAL_DISABLE; + or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); + } else { + pi->nphy_perical = PHY_PERICAL_MPHASE; + and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); + } +} + +void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask) +{ + u16 regval; + u16 tbl_buf[16]; + uint i; + phy_info_t *pi = (phy_info_t *) pih; + u16 tbl_opcode; + bool suspend; + + pi->sh->phyrxchain = rxcore_bitmask; + + if (!pi->sh->clk) + return; + + suspend = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!suspend) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + regval = read_phy_reg(pi, 0xa2); + regval &= ~(0xf << 4); + regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; + write_phy_reg(pi, 0xa2, regval); + + if ((rxcore_bitmask & 0x3) != 0x3) { + + write_phy_reg(pi, 0x20e, 1); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (pi->rx2tx_biasentry == -1) { + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, + ARRAY_SIZE(tbl_buf), 80, + 16, tbl_buf); + + for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { + if (tbl_buf[i] == + NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { + + pi->rx2tx_biasentry = (u8) i; + tbl_opcode = + NPHY_REV3_RFSEQ_CMD_NOP; + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_RFSEQ, + 1, i, + 16, + &tbl_opcode); + break; + } else if (tbl_buf[i] == + NPHY_REV3_RFSEQ_CMD_END) { + break; + } + } + } + } + } else { + + write_phy_reg(pi, 0x20e, 30); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (pi->rx2tx_biasentry != -1) { + tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, pi->rx2tx_biasentry, + 16, &tbl_opcode); + pi->rx2tx_biasentry = -1; + } + } + } + + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + if (!suspend) + wlapi_enable_mac(pi->sh->physhim); +} + +u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) +{ + u16 regval, rxen_bits; + phy_info_t *pi = (phy_info_t *) pih; + + regval = read_phy_reg(pi, 0xa2); + rxen_bits = (regval >> 4) & 0xf; + + return (u8) rxen_bits; +} + +bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pi) +{ + return PHY_IPA(pi); +} + +static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi) +{ + u8 idx, idx2, i, delta_ind; + + for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) { + pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; + } + + for (i = 0; i < 4; i++) { + idx2 = 0; + + delta_ind = 0; + + switch (i) { + case 0: + + if (CHSPEC_IS40(pi->radio_chanspec) + && NPHY_IS_SROM_REINTERPRET) { + idx = TXP_FIRST_MCS_40_SISO; + } else { + idx = (CHSPEC_IS40(pi->radio_chanspec)) ? + TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; + delta_ind = 1; + } + break; + + case 1: + + idx = (CHSPEC_IS40(pi->radio_chanspec)) ? + TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; + break; + + case 2: + + idx = (CHSPEC_IS40(pi->radio_chanspec)) ? + TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; + break; + + case 3: + + idx = (CHSPEC_IS40(pi->radio_chanspec)) ? + TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; + break; + } + + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + idx = idx + delta_ind; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx++]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + idx = idx + 1 - delta_ind; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = + pi->tx_power_offset[idx]; + } +} + +void wlc_phy_cal_init_nphy(phy_info_t *pi) +{ +} + +static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, u8 core) +{ + if (core == PHY_CORE_0) { + write_phy_reg(pi, 0x38, 0x4); + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_phy_reg(pi, 0x37, 0x0060); + } else { + write_phy_reg(pi, 0x37, 0x1080); + } + } else if (core == PHY_CORE_1) { + write_phy_reg(pi, 0x2ae, 0x4); + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_phy_reg(pi, 0x2ad, 0x0060); + } else { + write_phy_reg(pi, 0x2ad, 0x1080); + } + } +} + +static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, u8 txchain) +{ + u8 txchain0, txchain1; + + txchain0 = txchain & 0x1; + txchain1 = (txchain & 0x2) >> 1; + if (!txchain0) { + wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); + } + + if (!txchain1) { + wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); + } +} + +static void wlc_phy_workarounds_nphy(phy_info_t *pi) +{ + u8 rfseq_rx2tx_events[] = { + NPHY_RFSEQ_CMD_NOP, + NPHY_RFSEQ_CMD_RXG_FBW, + NPHY_RFSEQ_CMD_TR_SWITCH, + NPHY_RFSEQ_CMD_CLR_HIQ_DIS, + NPHY_RFSEQ_CMD_RXPD_TXPD, + NPHY_RFSEQ_CMD_TX_GAIN, + NPHY_RFSEQ_CMD_EXT_PA + }; + u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; + u8 rfseq_tx2rx_events[] = { + NPHY_RFSEQ_CMD_NOP, + NPHY_RFSEQ_CMD_EXT_PA, + NPHY_RFSEQ_CMD_TX_GAIN, + NPHY_RFSEQ_CMD_RXPD_TXPD, + NPHY_RFSEQ_CMD_TR_SWITCH, + NPHY_RFSEQ_CMD_RXG_FBW, + NPHY_RFSEQ_CMD_CLR_HIQ_DIS + }; + u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; + u8 rfseq_tx2rx_events_rev3[] = { + NPHY_REV3_RFSEQ_CMD_EXT_PA, + NPHY_REV3_RFSEQ_CMD_INT_PA_PU, + NPHY_REV3_RFSEQ_CMD_TX_GAIN, + NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, + NPHY_REV3_RFSEQ_CMD_TR_SWITCH, + NPHY_REV3_RFSEQ_CMD_RXG_FBW, + NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, + NPHY_REV3_RFSEQ_CMD_END + }; + u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; + u8 rfseq_rx2tx_events_rev3[] = { + NPHY_REV3_RFSEQ_CMD_NOP, + NPHY_REV3_RFSEQ_CMD_RXG_FBW, + NPHY_REV3_RFSEQ_CMD_TR_SWITCH, + NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, + NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, + NPHY_REV3_RFSEQ_CMD_TX_GAIN, + NPHY_REV3_RFSEQ_CMD_INT_PA_PU, + NPHY_REV3_RFSEQ_CMD_EXT_PA, + NPHY_REV3_RFSEQ_CMD_END + }; + u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; + + u8 rfseq_rx2tx_events_rev3_ipa[] = { + NPHY_REV3_RFSEQ_CMD_NOP, + NPHY_REV3_RFSEQ_CMD_RXG_FBW, + NPHY_REV3_RFSEQ_CMD_TR_SWITCH, + NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, + NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, + NPHY_REV3_RFSEQ_CMD_TX_GAIN, + NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, + NPHY_REV3_RFSEQ_CMD_INT_PA_PU, + NPHY_REV3_RFSEQ_CMD_END + }; + u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; + u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; + + s16 alpha0, alpha1, alpha2; + s16 beta0, beta1, beta2; + u32 leg_data_weights, ht_data_weights, nss1_data_weights, + stbc_data_weights; + u8 chan_freq_range = 0; + u16 dac_control = 0x0002; + u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; + u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; + u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; + u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; + u16 *aux_adc_vmid; + u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; + u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; + u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; + u16 *aux_adc_gain; + u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; + u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; + s32 min_nvar_val = 0x18d; + s32 min_nvar_offset_6mbps = 20; + u8 pdetrange; + u8 triso; + u16 regval; + u16 afectrl_adc_ctrl1_rev7 = 0x20; + u16 afectrl_adc_ctrl2_rev7 = 0x0; + u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; + u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; + u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; + u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; + u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; + u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; + u16 ipalvlshift_3p3_war_en = 0; + u16 rccal_bcap_val, rccal_scap_val; + u16 rccal_tx20_11b_bcap = 0; + u16 rccal_tx20_11b_scap = 0; + u16 rccal_tx20_11n_bcap = 0; + u16 rccal_tx20_11n_scap = 0; + u16 rccal_tx40_11n_bcap = 0; + u16 rccal_tx40_11n_scap = 0; + u16 rx2tx_lpf_rc_lut_tx20_11b = 0; + u16 rx2tx_lpf_rc_lut_tx20_11n = 0; + u16 rx2tx_lpf_rc_lut_tx40_11n = 0; + u16 tx_lpf_bw_ofdm_20mhz = 0; + u16 tx_lpf_bw_ofdm_40mhz = 0; + u16 tx_lpf_bw_11b = 0; + u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; + u16 txgm_idac_bleed = 0; + bool rccal_ovrd = false; + u16 freq; + int coreNum; + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); + } else { + wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (!ISSIM_ENAB(pi->sh->sih)) { + or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if (NREV_IS(pi->pubpi.phy_rev, 7)) { + mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); + + mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); + mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); + mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); + mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); + mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); + mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); + mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); + mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); + mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); + mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); + mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); + mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); + mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); + mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); + mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); + mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); + } + + if (NREV_LE(pi->pubpi.phy_rev, 8)) { + write_phy_reg(pi, 0x23f, 0x1b0); + write_phy_reg(pi, 0x240, 0x1b0); + } + + if (NREV_GE(pi->pubpi.phy_rev, 8)) { + mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, + &dac_control); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, + &dac_control); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 0, 32, &leg_data_weights); + leg_data_weights = leg_data_weights & 0xffffff; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 0, 32, &leg_data_weights); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 2, 0x15e, 16, + rfseq_rx2tx_dacbufpu_rev7); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, + rfseq_rx2tx_dacbufpu_rev7); + + if (PHY_IPA(pi)) { + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, + rfseq_rx2tx_events_rev3_ipa, + rfseq_rx2tx_dlys_rev3_ipa, + sizeof + (rfseq_rx2tx_events_rev3_ipa) / + sizeof + (rfseq_rx2tx_events_rev3_ipa + [0])); + } + + mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); + mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); + + tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); + tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); + tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); + + if (PHY_IPA(pi)) { + + if (((pi->pubpi.radiorev == 5) + && (CHSPEC_IS40(pi->radio_chanspec) == 1)) + || (pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + rccal_bcap_val = + read_radio_reg(pi, + RADIO_2057_RCCAL_BCAP_VAL); + rccal_scap_val = + read_radio_reg(pi, + RADIO_2057_RCCAL_SCAP_VAL); + + rccal_tx20_11b_bcap = rccal_bcap_val; + rccal_tx20_11b_scap = rccal_scap_val; + + if ((pi->pubpi.radiorev == 5) && + (CHSPEC_IS40(pi->radio_chanspec) == 1)) { + + rccal_tx20_11n_bcap = rccal_bcap_val; + rccal_tx20_11n_scap = rccal_scap_val; + rccal_tx40_11n_bcap = 0xc; + rccal_tx40_11n_scap = 0xc; + + rccal_ovrd = true; + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + tx_lpf_bw_ofdm_20mhz = 4; + tx_lpf_bw_11b = 1; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + rccal_tx20_11n_bcap = 0xc; + rccal_tx20_11n_scap = 0xc; + rccal_tx40_11n_bcap = 0xa; + rccal_tx40_11n_scap = 0xa; + } else { + rccal_tx20_11n_bcap = 0x14; + rccal_tx20_11n_scap = 0x14; + rccal_tx40_11n_bcap = 0xf; + rccal_tx40_11n_scap = 0xf; + } + + rccal_ovrd = true; + } + } + + } else { + + if (pi->pubpi.radiorev == 5) { + + tx_lpf_bw_ofdm_20mhz = 1; + tx_lpf_bw_ofdm_40mhz = 3; + + rccal_bcap_val = + read_radio_reg(pi, + RADIO_2057_RCCAL_BCAP_VAL); + rccal_scap_val = + read_radio_reg(pi, + RADIO_2057_RCCAL_SCAP_VAL); + + rccal_tx20_11b_bcap = rccal_bcap_val; + rccal_tx20_11b_scap = rccal_scap_val; + + rccal_tx20_11n_bcap = 0x13; + rccal_tx20_11n_scap = 0x11; + rccal_tx40_11n_bcap = 0x13; + rccal_tx40_11n_scap = 0x11; + + rccal_ovrd = true; + } + } + + if (rccal_ovrd) { + + rx2tx_lpf_rc_lut_tx20_11b = (rccal_tx20_11b_bcap << 8) | + (rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b; + rx2tx_lpf_rc_lut_tx20_11n = (rccal_tx20_11n_bcap << 8) | + (rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz; + rx2tx_lpf_rc_lut_tx40_11n = (rccal_tx40_11n_bcap << 8) | + (rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz; + + for (coreNum = 0; coreNum <= 1; coreNum++) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x152 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx20_11b); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x153 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx20_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x154 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx20_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x155 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx40_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x156 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx40_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x157 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx40_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x158 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx40_11n); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 1, + 0x159 + coreNum * 0x10, + 16, + &rx2tx_lpf_rc_lut_tx40_11n); + } + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), + 1, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + } + + if (!NORADIO_ENAB(pi->pubpi)) { + write_phy_reg(pi, 0x32f, 0x3); + } + + if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), + 1, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } + + if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + if ((pi->sh->sromrev >= 8) + && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) + ipalvlshift_3p3_war_en = 1; + + if (ipalvlshift_3p3_war_en) { + write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, + 0x5); + write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, + 0x30); + write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); + or_radio_reg(pi, + RADIO_2057_RXTXBIAS_CONFIG_CORE0, + 0x1); + or_radio_reg(pi, + RADIO_2057_RXTXBIAS_CONFIG_CORE1, + 0x1); + + ipa2g_mainbias = 0x1f; + + ipa2g_casconv = 0x6f; + + ipa2g_biasfilt = 0xaa; + } else { + + ipa2g_mainbias = 0x2b; + + ipa2g_casconv = 0x7f; + + ipa2g_biasfilt = 0xee; + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + for (coreNum = 0; coreNum <= 1; coreNum++) { + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + coreNum, IPA2G_IMAIN, + ipa2g_mainbias); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + coreNum, IPA2G_CASCONV, + ipa2g_casconv); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + coreNum, + IPA2G_BIAS_FILTER, + ipa2g_biasfilt); + } + } + } + + if (PHY_IPA(pi)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if ((pi->pubpi.radiorev == 3) + || (pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)) { + + txgm_idac_bleed = 0x7f; + } + + for (coreNum = 0; coreNum <= 1; coreNum++) { + if (txgm_idac_bleed != 0) + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + TXGM_IDAC_BLEED, + txgm_idac_bleed); + } + + if (pi->pubpi.radiorev == 5) { + + for (coreNum = 0; coreNum <= 1; + coreNum++) { + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + IPA2G_CASCONV, + 0x13); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + IPA2G_IMAIN, + 0x1f); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + IPA2G_BIAS_FILTER, + 0xee); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + PAD2G_IDACS, + 0x8a); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, coreNum, + PAD_BIAS_FILTER_BWS, + 0x3e); + } + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + if (CHSPEC_IS40(pi->radio_chanspec) == + 0) { + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, 0, + IPA2G_IMAIN, + 0x14); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, 1, + IPA2G_IMAIN, + 0x12); + } else { + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, 0, + IPA2G_IMAIN, + 0x16); + WRITE_RADIO_REG4(pi, RADIO_2057, + CORE, 1, + IPA2G_IMAIN, + 0x16); + } + } + + } else { + freq = + CHAN5G_FREQ(CHSPEC_CHANNEL + (pi->radio_chanspec)); + if (((freq >= 5180) && (freq <= 5230)) + || ((freq >= 5745) && (freq <= 5805))) { + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + 0, IPA5G_BIAS_FILTER, + 0xff); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + 1, IPA5G_BIAS_FILTER, + 0xff); + } + } + } else { + + if (pi->pubpi.radiorev != 5) { + for (coreNum = 0; coreNum <= 1; coreNum++) { + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + coreNum, + TXMIX2G_TUNE_BOOST_PU, + 0x61); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, + coreNum, + TXGM_IDAC_BLEED, 0x70); + } + } + } + + if (pi->pubpi.radiorev == 4) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, + 0x05, 16, + &afectrl_adc_ctrl1_rev7); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, + 0x15, 16, + &afectrl_adc_ctrl1_rev7); + + for (coreNum = 0; coreNum <= 1; coreNum++) { + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, + AFE_VCM_CAL_MASTER, 0x0); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, + AFE_SET_VCM_I, 0x3f); + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, + AFE_SET_VCM_Q, 0x3f); + } + } else { + mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); + + mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); + mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); + mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); + mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, + 0x05, 16, + &afectrl_adc_ctrl2_rev7); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, + 0x15, 16, + &afectrl_adc_ctrl2_rev7); + + mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); + mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); + mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); + mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); + } + + write_phy_reg(pi, 0x6a, 0x2); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, + &min_nvar_offset_6mbps); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, + &rfseq_pktgn_lpf_hpc_rev7); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, + &rfseq_pktgn_lpf_h_hpc_rev7); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, + &rfseq_htpktgn_lpf_hpc_rev7); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, + &rfseq_cckpktgn_lpf_hpc_rev7); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, + &rfseq_tx2rx_lpf_h_hpc_rev7); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, + &rfseq_rx2tx_lpf_h_hpc_rev7); + + if (CHSPEC_IS40(pi->radio_chanspec) == 0) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, + 32, &min_nvar_val); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + 127, 32, &min_nvar_val); + } else { + min_nvar_val = noise_var_tbl_rev7[3]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, + 32, &min_nvar_val); + + min_nvar_val = noise_var_tbl_rev7[127]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + 127, 32, &min_nvar_val); + } + + wlc_phy_workarounds_nphy_gainctrl(pi); + + pdetrange = + (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. + pdetrange : pi->srom_fem2g.pdetrange; + + if (pdetrange == 0) { + chan_freq_range = + wlc_phy_get_chan_freq_range_nphy(pi, 0); + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + aux_adc_vmid_rev7_core0[3] = 0x70; + aux_adc_vmid_rev7_core1[3] = 0x70; + aux_adc_gain_rev7[3] = 2; + } else { + aux_adc_vmid_rev7_core0[3] = 0x80; + aux_adc_vmid_rev7_core1[3] = 0x80; + aux_adc_gain_rev7[3] = 3; + } + } else if (pdetrange == 1) { + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + aux_adc_vmid_rev7_core0[3] = 0x7c; + aux_adc_vmid_rev7_core1[3] = 0x7c; + aux_adc_gain_rev7[3] = 2; + } else { + aux_adc_vmid_rev7_core0[3] = 0x8c; + aux_adc_vmid_rev7_core1[3] = 0x8c; + aux_adc_gain_rev7[3] = 1; + } + } else if (pdetrange == 2) { + if (pi->pubpi.radioid == BCM2057_ID) { + if ((pi->pubpi.radiorev == 5) + || (pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + if (chan_freq_range == + WL_CHAN_FREQ_RANGE_2G) { + aux_adc_vmid_rev7_core0[3] = + 0x8c; + aux_adc_vmid_rev7_core1[3] = + 0x8c; + aux_adc_gain_rev7[3] = 0; + } else { + aux_adc_vmid_rev7_core0[3] = + 0x96; + aux_adc_vmid_rev7_core1[3] = + 0x96; + aux_adc_gain_rev7[3] = 0; + } + } + } + + } else if (pdetrange == 3) { + if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { + aux_adc_vmid_rev7_core0[3] = 0x89; + aux_adc_vmid_rev7_core1[3] = 0x89; + aux_adc_gain_rev7[3] = 0; + } + + } else if (pdetrange == 5) { + + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + aux_adc_vmid_rev7_core0[3] = 0x80; + aux_adc_vmid_rev7_core1[3] = 0x80; + aux_adc_gain_rev7[3] = 3; + } else { + aux_adc_vmid_rev7_core0[3] = 0x70; + aux_adc_vmid_rev7_core1[3] = 0x70; + aux_adc_gain_rev7[3] = 2; + } + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, + &aux_adc_vmid_rev7_core0); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, + &aux_adc_vmid_rev7_core1); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, + &aux_adc_gain_rev7); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, + &aux_adc_gain_rev7); + + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + write_phy_reg(pi, 0x23f, 0x1f8); + write_phy_reg(pi, 0x240, 0x1f8); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 0, 32, &leg_data_weights); + leg_data_weights = leg_data_weights & 0xffffff; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 0, 32, &leg_data_weights); + + alpha0 = 293; + alpha1 = 435; + alpha2 = 261; + beta0 = 366; + beta1 = 205; + beta2 = 32; + write_phy_reg(pi, 0x145, alpha0); + write_phy_reg(pi, 0x146, alpha1); + write_phy_reg(pi, 0x147, alpha2); + write_phy_reg(pi, 0x148, beta0); + write_phy_reg(pi, 0x149, beta1); + write_phy_reg(pi, 0x14a, beta2); + + write_phy_reg(pi, 0x38, 0xC); + write_phy_reg(pi, 0x2ae, 0xC); + + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, + rfseq_tx2rx_events_rev3, + rfseq_tx2rx_dlys_rev3, + sizeof(rfseq_tx2rx_events_rev3) / + sizeof(rfseq_tx2rx_events_rev3[0])); + + if (PHY_IPA(pi)) { + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, + rfseq_rx2tx_events_rev3_ipa, + rfseq_rx2tx_dlys_rev3_ipa, + sizeof + (rfseq_rx2tx_events_rev3_ipa) / + sizeof + (rfseq_rx2tx_events_rev3_ipa + [0])); + } + + if ((pi->sh->hw_phyrxchain != 0x3) && + (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { + + if (PHY_IPA(pi)) { + rfseq_rx2tx_dlys_rev3[5] = 59; + rfseq_rx2tx_dlys_rev3[6] = 1; + rfseq_rx2tx_events_rev3[7] = + NPHY_REV3_RFSEQ_CMD_END; + } + + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, + rfseq_rx2tx_events_rev3, + rfseq_rx2tx_dlys_rev3, + sizeof(rfseq_rx2tx_events_rev3) / + sizeof(rfseq_rx2tx_events_rev3 + [0])); + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_phy_reg(pi, 0x6a, 0x2); + } else { + write_phy_reg(pi, 0x6a, 0x9c40); + } + + mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); + + if (CHSPEC_IS40(pi->radio_chanspec) == 0) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, + 32, &min_nvar_val); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + 127, 32, &min_nvar_val); + } else { + min_nvar_val = noise_var_tbl_rev3[3]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, + 32, &min_nvar_val); + + min_nvar_val = noise_var_tbl_rev3[127]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + 127, 32, &min_nvar_val); + } + + wlc_phy_workarounds_nphy_gainctrl(pi); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, + &dac_control); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, + &dac_control); + + pdetrange = + (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. + pdetrange : pi->srom_fem2g.pdetrange; + + if (pdetrange == 0) { + if (NREV_GE(pi->pubpi.phy_rev, 4)) { + aux_adc_vmid = aux_adc_vmid_rev4; + aux_adc_gain = aux_adc_gain_rev4; + } else { + aux_adc_vmid = aux_adc_vmid_rev3; + aux_adc_gain = aux_adc_gain_rev3; + } + chan_freq_range = + wlc_phy_get_chan_freq_range_nphy(pi, 0); + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + switch (chan_freq_range) { + case WL_CHAN_FREQ_RANGE_5GL: + aux_adc_vmid[3] = 0x89; + aux_adc_gain[3] = 0; + break; + case WL_CHAN_FREQ_RANGE_5GM: + aux_adc_vmid[3] = 0x89; + aux_adc_gain[3] = 0; + break; + case WL_CHAN_FREQ_RANGE_5GH: + aux_adc_vmid[3] = 0x89; + aux_adc_gain[3] = 0; + break; + default: + break; + } + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x08, 16, aux_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x18, 16, aux_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x0c, 16, aux_adc_gain); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x1c, 16, aux_adc_gain); + } else if (pdetrange == 1) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x08, 16, sk_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x18, 16, sk_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x0c, 16, sk_adc_gain); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x1c, 16, sk_adc_gain); + } else if (pdetrange == 2) { + + u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; + u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; + + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + chan_freq_range = + wlc_phy_get_chan_freq_range_nphy(pi, 0); + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + bcm_adc_vmid[3] = 0x8e; + bcm_adc_gain[3] = 0x03; + } else { + bcm_adc_vmid[3] = 0x94; + bcm_adc_gain[3] = 0x03; + } + } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { + bcm_adc_vmid[3] = 0x84; + bcm_adc_gain[3] = 0x02; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x08, 16, bcm_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x18, 16, bcm_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x0c, 16, bcm_adc_gain); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x1c, 16, bcm_adc_gain); + } else if (pdetrange == 3) { + chan_freq_range = + wlc_phy_get_chan_freq_range_nphy(pi, 0); + if ((NREV_GE(pi->pubpi.phy_rev, 4)) + && (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { + + u16 auxadc_vmid[] = { + 0xa2, 0xb4, 0xb4, 0x270 }; + u16 auxadc_gain[] = { + 0x02, 0x02, 0x02, 0x00 }; + + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_AFECTRL, 4, + 0x08, 16, auxadc_vmid); + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_AFECTRL, 4, + 0x18, 16, auxadc_vmid); + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_AFECTRL, 4, + 0x0c, 16, auxadc_gain); + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_AFECTRL, 4, + 0x1c, 16, auxadc_gain); + } + } else if ((pdetrange == 4) || (pdetrange == 5)) { + u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; + u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; + u16 Vmid[2], Av[2]; + + chan_freq_range = + wlc_phy_get_chan_freq_range_nphy(pi, 0); + if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { + Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; + Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; + Av[0] = (pdetrange == 4) ? 2 : 0; + Av[1] = (pdetrange == 4) ? 2 : 0; + } else { + Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; + Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; + Av[0] = (pdetrange == 4) ? 2 : 0; + Av[1] = (pdetrange == 4) ? 2 : 0; + } + + bcm_adc_vmid[3] = Vmid[0]; + bcm_adc_gain[3] = Av[0]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x08, 16, bcm_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x0c, 16, bcm_adc_gain); + + bcm_adc_vmid[3] = Vmid[1]; + bcm_adc_gain[3] = Av[1]; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x18, 16, bcm_adc_vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, + 0x1c, 16, bcm_adc_gain); + } + + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), + 0x0); + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), + 0x0); + + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), + 0x6); + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), + 0x6); + + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), + 0x7); + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), + 0x7); + + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), + 0x88); + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), + 0x88); + + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), + 0x0); + write_radio_reg(pi, + (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), + 0x0); + + write_radio_reg(pi, + (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), + 0x0); + write_radio_reg(pi, + (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), + 0x0); + + triso = + (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. + triso : pi->srom_fem2g.triso; + if (triso == 7) { + wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); + wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); + } + + wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); + + if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && + (CHSPEC_IS5G(pi->radio_chanspec))) || + (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || + (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && + (CHSPEC_IS2G(pi->radio_chanspec)))) { + nss1_data_weights = 0x00088888; + ht_data_weights = 0x00088888; + stbc_data_weights = 0x00088888; + } else { + nss1_data_weights = 0x88888888; + ht_data_weights = 0x88888888; + stbc_data_weights = 0x88888888; + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 1, 32, &nss1_data_weights); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 2, 32, &ht_data_weights); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, + 1, 3, 32, &stbc_data_weights); + + if (NREV_IS(pi->pubpi.phy_rev, 4)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + write_radio_reg(pi, + RADIO_2056_TX_GMBB_IDAC | + RADIO_2056_TX0, 0x70); + write_radio_reg(pi, + RADIO_2056_TX_GMBB_IDAC | + RADIO_2056_TX1, 0x70); + } + } + + if (!pi->edcrs_threshold_lock) { + write_phy_reg(pi, 0x224, 0x3eb); + write_phy_reg(pi, 0x225, 0x3eb); + write_phy_reg(pi, 0x226, 0x341); + write_phy_reg(pi, 0x227, 0x341); + write_phy_reg(pi, 0x228, 0x42b); + write_phy_reg(pi, 0x229, 0x42b); + write_phy_reg(pi, 0x22a, 0x381); + write_phy_reg(pi, 0x22b, 0x381); + write_phy_reg(pi, 0x22c, 0x42b); + write_phy_reg(pi, 0x22d, 0x42b); + write_phy_reg(pi, 0x22e, 0x381); + write_phy_reg(pi, 0x22f, 0x381); + } + + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + + if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) { + wlapi_bmac_mhf(pi->sh->physhim, MHF4, + MHF4_BPHY_TXCORE0, + MHF4_BPHY_TXCORE0, WLC_BAND_ALL); + } + } + } else { + + if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || + (pi->sh->boardtype == 0x8b)) { + uint i; + u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; + for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) + rfseq_rx2tx_dlys[i] = war_dlys[i]; + } + + if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { + and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); + and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); + } else { + or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); + or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); + } + + regval = 0x000a; + wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); + wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); + + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + regval = 0xcdaa; + wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); + wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); + } + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + regval = 0x0000; + wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); + wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); + + regval = 0x7aab; + wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); + wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); + + regval = 0x0800; + wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); + wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); + } + + write_phy_reg(pi, 0xf8, 0x02d8); + write_phy_reg(pi, 0xf9, 0x0301); + write_phy_reg(pi, 0xfa, 0x02d8); + write_phy_reg(pi, 0xfb, 0x0301); + + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, + rfseq_rx2tx_dlys, + sizeof(rfseq_rx2tx_events) / + sizeof(rfseq_rx2tx_events[0])); + + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, + rfseq_tx2rx_dlys, + sizeof(rfseq_tx2rx_events) / + sizeof(rfseq_tx2rx_events[0])); + + wlc_phy_workarounds_nphy_gainctrl(pi); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + + if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) + wlapi_bmac_mhf(pi->sh->physhim, MHF3, + MHF3_NPHY_MLADV_WAR, + MHF3_NPHY_MLADV_WAR, + WLC_BAND_ALL); + + } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { + write_phy_reg(pi, 0x1e3, 0x0); + write_phy_reg(pi, 0x1e4, 0x0); + } + + if (NREV_LT(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0x90, (0x1 << 7), 0); + + alpha0 = 293; + alpha1 = 435; + alpha2 = 261; + beta0 = 366; + beta1 = 205; + beta2 = 32; + write_phy_reg(pi, 0x145, alpha0); + write_phy_reg(pi, 0x146, alpha1); + write_phy_reg(pi, 0x147, alpha2); + write_phy_reg(pi, 0x148, beta0); + write_phy_reg(pi, 0x149, beta1); + write_phy_reg(pi, 0x14a, beta2); + + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + mod_phy_reg(pi, 0x142, (0xf << 12), 0); + + write_phy_reg(pi, 0x192, 0xb5); + write_phy_reg(pi, 0x193, 0xa4); + write_phy_reg(pi, 0x194, 0x0); + } + + if (NREV_IS(pi->pubpi.phy_rev, 2)) { + mod_phy_reg(pi, 0x221, + NPHY_FORCESIG_DECODEGATEDCLKS, + NPHY_FORCESIG_DECODEGATEDCLKS); + } + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) +{ + u16 w1th, hpf_code, currband; + int ctr; + u8 rfseq_updategainu_events[] = { + NPHY_RFSEQ_CMD_RX_GAIN, + NPHY_RFSEQ_CMD_CLR_HIQ_DIS, + NPHY_RFSEQ_CMD_SET_HPF_BW + }; + u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; + s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; + s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; + s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; + s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; + s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; + s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; + s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; + s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; + s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; + s8 *lna1_gain_db = NULL; + s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; + s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; + s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; + s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; + s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; + s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; + s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; + s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; + s8 *lna2_gain_db = NULL; + s8 tiaG_gain_db[] = { + 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; + s8 tiaA_gain_db[] = { + 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; + s8 tiaA_gain_db_rev4[] = { + 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; + s8 tiaA_gain_db_rev5[] = { + 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; + s8 tiaA_gain_db_rev6[] = { + 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; + s8 *tia_gain_db; + s8 tiaG_gainbits[] = { + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; + s8 tiaA_gainbits[] = { + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; + s8 tiaA_gainbits_rev4[] = { + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; + s8 tiaA_gainbits_rev5[] = { + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; + s8 tiaA_gainbits_rev6[] = { + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; + s8 *tia_gainbits; + s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; + s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; + u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; + u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; + u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; + u16 rfseqG_init_gain_rev5_elna[] = { + 0x013f, 0x013f, 0x013f, 0x013f }; + u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; + u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; + u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; + u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; + u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; + u16 rfseqA_init_gain_rev4_elna[] = { + 0x314f, 0x314f, 0x314f, 0x314f }; + u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; + u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; + u16 *rfseq_init_gain; + u16 initG_gaincode = 0x627e; + u16 initG_gaincode_rev4 = 0x527e; + u16 initG_gaincode_rev5 = 0x427e; + u16 initG_gaincode_rev5_elna = 0x027e; + u16 initG_gaincode_rev6 = 0x527e; + u16 initG_gaincode_rev6_224B0 = 0x427e; + u16 initG_gaincode_rev6_elna = 0x127e; + u16 initA_gaincode = 0x52de; + u16 initA_gaincode_rev4 = 0x629e; + u16 initA_gaincode_rev4_elna = 0x329e; + u16 initA_gaincode_rev5 = 0x729e; + u16 initA_gaincode_rev6 = 0x729e; + u16 init_gaincode; + u16 clip1hiG_gaincode = 0x107e; + u16 clip1hiG_gaincode_rev4 = 0x007e; + u16 clip1hiG_gaincode_rev5 = 0x1076; + u16 clip1hiG_gaincode_rev6 = 0x007e; + u16 clip1hiA_gaincode = 0x00de; + u16 clip1hiA_gaincode_rev4 = 0x029e; + u16 clip1hiA_gaincode_rev5 = 0x029e; + u16 clip1hiA_gaincode_rev6 = 0x029e; + u16 clip1hi_gaincode; + u16 clip1mdG_gaincode = 0x0066; + u16 clip1mdA_gaincode = 0x00ca; + u16 clip1mdA_gaincode_rev4 = 0x1084; + u16 clip1mdA_gaincode_rev5 = 0x2084; + u16 clip1mdA_gaincode_rev6 = 0x2084; + u16 clip1md_gaincode = 0; + u16 clip1loG_gaincode = 0x0074; + u16 clip1loG_gaincode_rev5[] = { + 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c + }; + u16 clip1loG_gaincode_rev6[] = { + 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e + }; + u16 clip1loG_gaincode_rev6_224B0 = 0x1074; + u16 clip1loA_gaincode = 0x00cc; + u16 clip1loA_gaincode_rev4 = 0x0086; + u16 clip1loA_gaincode_rev5 = 0x2086; + u16 clip1loA_gaincode_rev6 = 0x2086; + u16 clip1lo_gaincode; + u8 crsminG_th = 0x18; + u8 crsminG_th_rev5 = 0x18; + u8 crsminG_th_rev6 = 0x18; + u8 crsminA_th = 0x1e; + u8 crsminA_th_rev4 = 0x24; + u8 crsminA_th_rev5 = 0x24; + u8 crsminA_th_rev6 = 0x24; + u8 crsmin_th; + u8 crsminlG_th = 0x18; + u8 crsminlG_th_rev5 = 0x18; + u8 crsminlG_th_rev6 = 0x18; + u8 crsminlA_th = 0x1e; + u8 crsminlA_th_rev4 = 0x24; + u8 crsminlA_th_rev5 = 0x24; + u8 crsminlA_th_rev6 = 0x24; + u8 crsminl_th = 0; + u8 crsminuG_th = 0x18; + u8 crsminuG_th_rev5 = 0x18; + u8 crsminuG_th_rev6 = 0x18; + u8 crsminuA_th = 0x1e; + u8 crsminuA_th_rev4 = 0x24; + u8 crsminuA_th_rev5 = 0x24; + u8 crsminuA_th_rev6 = 0x24; + u8 crsminuA_th_rev6_224B0 = 0x2d; + u8 crsminu_th; + u16 nbclipG_th = 0x20d; + u16 nbclipG_th_rev4 = 0x1a1; + u16 nbclipG_th_rev5 = 0x1d0; + u16 nbclipG_th_rev6 = 0x1d0; + u16 nbclipA_th = 0x1a1; + u16 nbclipA_th_rev4 = 0x107; + u16 nbclipA_th_rev5 = 0x0a9; + u16 nbclipA_th_rev6 = 0x0f0; + u16 nbclip_th = 0; + u8 w1clipG_th = 5; + u8 w1clipG_th_rev5 = 9; + u8 w1clipG_th_rev6 = 5; + u8 w1clipA_th = 25, w1clip_th; + u8 rssi_gain_default = 0x50; + u8 rssiG_gain_rev6_224B0 = 0x50; + u8 rssiA_gain_rev5 = 0x90; + u8 rssiA_gain_rev6 = 0x90; + u8 rssi_gain; + u16 regval[21]; + u8 triso; + + triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : + pi->srom_fem2g.triso; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (pi->pubpi.radiorev == 5) { + + wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); + } else if (pi->pubpi.radiorev == 7) { + wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); + + mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); + mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); + + } else if ((pi->pubpi.radiorev == 3) + || (pi->pubpi.radiorev == 8)) { + wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); + + if (pi->pubpi.radiorev == 8) { + mod_phy_reg(pi, 0x283, + (0xff << 0), (0x44 << 0)); + mod_phy_reg(pi, 0x280, + (0xff << 0), (0x44 << 0)); + } + } else { + wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); + } + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); + + mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); + mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); + + currband = + read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; + if (currband == 0) { + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + if (pi->pubpi.radiorev == 11) { + lna1_gain_db = lna1G_gain_db_rev6_224B0; + lna2_gain_db = lna2G_gain_db_rev6_224B0; + rfseq_init_gain = + rfseqG_init_gain_rev6_224B0; + init_gaincode = + initG_gaincode_rev6_224B0; + clip1hi_gaincode = + clip1hiG_gaincode_rev6; + clip1lo_gaincode = + clip1loG_gaincode_rev6_224B0; + nbclip_th = nbclipG_th_rev6; + w1clip_th = w1clipG_th_rev6; + crsmin_th = crsminG_th_rev6; + crsminl_th = crsminlG_th_rev6; + crsminu_th = crsminuG_th_rev6; + rssi_gain = rssiG_gain_rev6_224B0; + } else { + lna1_gain_db = lna1G_gain_db_rev6; + lna2_gain_db = lna2G_gain_db_rev6; + if (pi->sh->boardflags & BFL_EXTLNA) { + + rfseq_init_gain = + rfseqG_init_gain_rev6_elna; + init_gaincode = + initG_gaincode_rev6_elna; + } else { + rfseq_init_gain = + rfseqG_init_gain_rev6; + init_gaincode = + initG_gaincode_rev6; + } + clip1hi_gaincode = + clip1hiG_gaincode_rev6; + switch (triso) { + case 0: + clip1lo_gaincode = + clip1loG_gaincode_rev6[0]; + break; + case 1: + clip1lo_gaincode = + clip1loG_gaincode_rev6[1]; + break; + case 2: + clip1lo_gaincode = + clip1loG_gaincode_rev6[2]; + break; + case 3: + default: + + clip1lo_gaincode = + clip1loG_gaincode_rev6[3]; + break; + case 4: + clip1lo_gaincode = + clip1loG_gaincode_rev6[4]; + break; + case 5: + clip1lo_gaincode = + clip1loG_gaincode_rev6[5]; + break; + case 6: + clip1lo_gaincode = + clip1loG_gaincode_rev6[6]; + break; + case 7: + clip1lo_gaincode = + clip1loG_gaincode_rev6[7]; + break; + } + nbclip_th = nbclipG_th_rev6; + w1clip_th = w1clipG_th_rev6; + crsmin_th = crsminG_th_rev6; + crsminl_th = crsminlG_th_rev6; + crsminu_th = crsminuG_th_rev6; + rssi_gain = rssi_gain_default; + } + } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { + lna1_gain_db = lna1G_gain_db_rev5; + lna2_gain_db = lna2G_gain_db_rev5; + if (pi->sh->boardflags & BFL_EXTLNA) { + + rfseq_init_gain = + rfseqG_init_gain_rev5_elna; + init_gaincode = + initG_gaincode_rev5_elna; + } else { + rfseq_init_gain = rfseqG_init_gain_rev5; + init_gaincode = initG_gaincode_rev5; + } + clip1hi_gaincode = clip1hiG_gaincode_rev5; + switch (triso) { + case 0: + clip1lo_gaincode = + clip1loG_gaincode_rev5[0]; + break; + case 1: + clip1lo_gaincode = + clip1loG_gaincode_rev5[1]; + break; + case 2: + clip1lo_gaincode = + clip1loG_gaincode_rev5[2]; + break; + case 3: + + clip1lo_gaincode = + clip1loG_gaincode_rev5[3]; + break; + case 4: + clip1lo_gaincode = + clip1loG_gaincode_rev5[4]; + break; + case 5: + clip1lo_gaincode = + clip1loG_gaincode_rev5[5]; + break; + case 6: + clip1lo_gaincode = + clip1loG_gaincode_rev5[6]; + break; + case 7: + clip1lo_gaincode = + clip1loG_gaincode_rev5[7]; + break; + default: + clip1lo_gaincode = + clip1loG_gaincode_rev5[3]; + break; + } + nbclip_th = nbclipG_th_rev5; + w1clip_th = w1clipG_th_rev5; + crsmin_th = crsminG_th_rev5; + crsminl_th = crsminlG_th_rev5; + crsminu_th = crsminuG_th_rev5; + rssi_gain = rssi_gain_default; + } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { + lna1_gain_db = lna1G_gain_db_rev4; + lna2_gain_db = lna2G_gain_db; + rfseq_init_gain = rfseqG_init_gain_rev4; + init_gaincode = initG_gaincode_rev4; + clip1hi_gaincode = clip1hiG_gaincode_rev4; + clip1lo_gaincode = clip1loG_gaincode; + nbclip_th = nbclipG_th_rev4; + w1clip_th = w1clipG_th; + crsmin_th = crsminG_th; + crsminl_th = crsminlG_th; + crsminu_th = crsminuG_th; + rssi_gain = rssi_gain_default; + } else { + lna1_gain_db = lna1G_gain_db; + lna2_gain_db = lna2G_gain_db; + rfseq_init_gain = rfseqG_init_gain; + init_gaincode = initG_gaincode; + clip1hi_gaincode = clip1hiG_gaincode; + clip1lo_gaincode = clip1loG_gaincode; + nbclip_th = nbclipG_th; + w1clip_th = w1clipG_th; + crsmin_th = crsminG_th; + crsminl_th = crsminlG_th; + crsminu_th = crsminuG_th; + rssi_gain = rssi_gain_default; + } + tia_gain_db = tiaG_gain_db; + tia_gainbits = tiaG_gainbits; + clip1md_gaincode = clip1mdG_gaincode; + } else { + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + lna1_gain_db = lna1A_gain_db_rev6; + lna2_gain_db = lna2A_gain_db_rev6; + tia_gain_db = tiaA_gain_db_rev6; + tia_gainbits = tiaA_gainbits_rev6; + rfseq_init_gain = rfseqA_init_gain_rev6; + init_gaincode = initA_gaincode_rev6; + clip1hi_gaincode = clip1hiA_gaincode_rev6; + clip1md_gaincode = clip1mdA_gaincode_rev6; + clip1lo_gaincode = clip1loA_gaincode_rev6; + crsmin_th = crsminA_th_rev6; + crsminl_th = crsminlA_th_rev6; + if ((pi->pubpi.radiorev == 11) && + (CHSPEC_IS40(pi->radio_chanspec) == 0)) { + crsminu_th = crsminuA_th_rev6_224B0; + } else { + crsminu_th = crsminuA_th_rev6; + } + nbclip_th = nbclipA_th_rev6; + rssi_gain = rssiA_gain_rev6; + } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { + lna1_gain_db = lna1A_gain_db_rev5; + lna2_gain_db = lna2A_gain_db_rev5; + tia_gain_db = tiaA_gain_db_rev5; + tia_gainbits = tiaA_gainbits_rev5; + rfseq_init_gain = rfseqA_init_gain_rev5; + init_gaincode = initA_gaincode_rev5; + clip1hi_gaincode = clip1hiA_gaincode_rev5; + clip1md_gaincode = clip1mdA_gaincode_rev5; + clip1lo_gaincode = clip1loA_gaincode_rev5; + crsmin_th = crsminA_th_rev5; + crsminl_th = crsminlA_th_rev5; + crsminu_th = crsminuA_th_rev5; + nbclip_th = nbclipA_th_rev5; + rssi_gain = rssiA_gain_rev5; + } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { + lna1_gain_db = lna1A_gain_db_rev4; + lna2_gain_db = lna2A_gain_db_rev4; + tia_gain_db = tiaA_gain_db_rev4; + tia_gainbits = tiaA_gainbits_rev4; + if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { + + rfseq_init_gain = + rfseqA_init_gain_rev4_elna; + init_gaincode = + initA_gaincode_rev4_elna; + } else { + rfseq_init_gain = rfseqA_init_gain_rev4; + init_gaincode = initA_gaincode_rev4; + } + clip1hi_gaincode = clip1hiA_gaincode_rev4; + clip1md_gaincode = clip1mdA_gaincode_rev4; + clip1lo_gaincode = clip1loA_gaincode_rev4; + crsmin_th = crsminA_th_rev4; + crsminl_th = crsminlA_th_rev4; + crsminu_th = crsminuA_th_rev4; + nbclip_th = nbclipA_th_rev4; + rssi_gain = rssi_gain_default; + } else { + lna1_gain_db = lna1A_gain_db; + lna2_gain_db = lna2A_gain_db; + tia_gain_db = tiaA_gain_db; + tia_gainbits = tiaA_gainbits; + rfseq_init_gain = rfseqA_init_gain; + init_gaincode = initA_gaincode; + clip1hi_gaincode = clip1hiA_gaincode; + clip1md_gaincode = clip1mdA_gaincode; + clip1lo_gaincode = clip1loA_gaincode; + crsmin_th = crsminA_th; + crsminl_th = crsminlA_th; + crsminu_th = crsminuA_th; + nbclip_th = nbclipA_th; + rssi_gain = rssi_gain_default; + } + w1clip_th = w1clipA_th; + } + + write_radio_reg(pi, + (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | + RADIO_2056_RX0), 0x17); + write_radio_reg(pi, + (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | + RADIO_2056_RX1), 0x17); + + write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), + 0xf0); + write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), + 0xf0); + + write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), + 0x0); + write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), + 0x0); + + write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), + rssi_gain); + write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), + rssi_gain); + + write_radio_reg(pi, + (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | + RADIO_2056_RX0), 0x17); + write_radio_reg(pi, + (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | + RADIO_2056_RX1), 0x17); + + write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), + 0xFF); + write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), + 0xFF); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, + 8, lna1_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, + 8, lna1_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, + 8, lna2_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, + 8, lna2_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, + 8, tia_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, + 8, tia_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, + 8, tia_gainbits); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, + 8, tia_gainbits); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, + 8, &lpf_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, + 8, &lpf_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, + 8, &lpf_gainbits); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, + 8, &lpf_gainbits); + + write_phy_reg(pi, 0x20, init_gaincode); + write_phy_reg(pi, 0x2a7, init_gaincode); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + pi->pubpi.phy_corenum, 0x106, 16, + rfseq_init_gain); + + write_phy_reg(pi, 0x22, clip1hi_gaincode); + write_phy_reg(pi, 0x2a9, clip1hi_gaincode); + + write_phy_reg(pi, 0x24, clip1md_gaincode); + write_phy_reg(pi, 0x2ab, clip1md_gaincode); + + write_phy_reg(pi, 0x37, clip1lo_gaincode); + write_phy_reg(pi, 0x2ad, clip1lo_gaincode); + + mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); + mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); + mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); + + write_phy_reg(pi, 0x2b, nbclip_th); + write_phy_reg(pi, 0x41, nbclip_th); + + mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); + mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); + + write_phy_reg(pi, 0x150, 0x809c); + + } else { + + mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); + mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); + + write_phy_reg(pi, 0x2b, 0x84); + write_phy_reg(pi, 0x41, 0x84); + + if (CHSPEC_IS20(pi->radio_chanspec)) { + write_phy_reg(pi, 0x6b, 0x2b); + write_phy_reg(pi, 0x6c, 0x2b); + write_phy_reg(pi, 0x6d, 0x9); + write_phy_reg(pi, 0x6e, 0x9); + } + + w1th = NPHY_RSSICAL_W1_TARGET - 4; + mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); + mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); + + if (CHSPEC_IS20(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); + mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); + + mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); + mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); + } + + write_phy_reg(pi, 0x150, 0x809c); + + if (pi->nphy_gain_boost) + if ((CHSPEC_IS2G(pi->radio_chanspec)) && + (CHSPEC_IS40(pi->radio_chanspec))) + hpf_code = 4; + else + hpf_code = 5; + else if (CHSPEC_IS40(pi->radio_chanspec)) + hpf_code = 6; + else + hpf_code = 7; + + mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); + mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); + + for (ctr = 0; ctr < 4; ctr++) { + regval[ctr] = (hpf_code << 8) | 0x7c; + } + wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); + + wlc_phy_adjust_lnagaintbl_nphy(pi); + + if (pi->nphy_elna_gain_config) { + regval[0] = 0; + regval[1] = 1; + regval[2] = 1; + regval[3] = 1; + wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); + wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); + + for (ctr = 0; ctr < 4; ctr++) { + regval[ctr] = (hpf_code << 8) | 0x74; + } + wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); + } + + if (NREV_IS(pi->pubpi.phy_rev, 2)) { + for (ctr = 0; ctr < 21; ctr++) { + regval[ctr] = 3 * ctr; + } + wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); + wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); + + for (ctr = 0; ctr < 21; ctr++) { + regval[ctr] = (u16) ctr; + } + wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); + wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); + } + + wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, + rfseq_updategainu_events, + rfseq_updategainu_dlys, + sizeof(rfseq_updategainu_events) / + sizeof(rfseq_updategainu_events[0])); + + mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); + + if (CHSPEC_IS2G(pi->radio_chanspec)) + mod_phy_reg(pi, + (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), + 0x7f, 0x4); + } +} + +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi) +{ + s8 lna1_gain_db[] = { 8, 13, 17, 22 }; + s8 lna2_gain_db[] = { -2, 7, 11, 15 }; + s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; + s8 tia_gainbits[] = { + 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; + + mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); + mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); + + mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); + + mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); + mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, + lna1_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, + lna1_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, + lna2_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, + lna2_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, + tia_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, + tia_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, + tia_gainbits); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, + tia_gainbits); + + write_phy_reg(pi, 0x37, 0x74); + write_phy_reg(pi, 0x2ad, 0x74); + write_phy_reg(pi, 0x38, 0x18); + write_phy_reg(pi, 0x2ae, 0x18); + + write_phy_reg(pi, 0x2b, 0xe8); + write_phy_reg(pi, 0x41, 0xe8); + + if (CHSPEC_IS20(pi->radio_chanspec)) { + + mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); + mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); + } else { + + mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); + mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); + } +} + +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi) +{ + u16 currband; + s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; + s8 *lna1_gain_db = NULL; + s8 *lna1_gain_db_2 = NULL; + s8 *lna2_gain_db = NULL; + s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; + s8 *tia_gain_db; + s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; + s8 *tia_gainbits; + u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; + u16 *rfseq_init_gain; + u16 init_gaincode; + u16 clip1hi_gaincode; + u16 clip1md_gaincode = 0; + u16 clip1md_gaincode_B; + u16 clip1lo_gaincode; + u16 clip1lo_gaincode_B; + u8 crsminl_th = 0; + u8 crsminu_th; + u16 nbclip_th = 0; + u8 w1clip_th; + u16 freq; + s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; + u8 chg_nbclip_th = 0; + + mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); + mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); + + currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; + if (currband == 0) { + + lna1_gain_db = lna1G_gain_db_rev7; + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, + lna1_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, + lna1_gain_db); + + mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); + + if (CHSPEC_IS40(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); + mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); + } + + mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); + + if (CHSPEC_IS20(pi->radio_chanspec)) { + mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); + mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); + } + } else { + + init_gaincode = 0x9e; + clip1hi_gaincode = 0x9e; + clip1md_gaincode_B = 0x24; + clip1lo_gaincode = 0x8a; + clip1lo_gaincode_B = 8; + rfseq_init_gain = rfseqA_init_gain_rev7; + + tia_gain_db = tiaA_gain_db_rev7; + tia_gainbits = tiaA_gainbits_rev7; + + freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); + if (CHSPEC_IS20(pi->radio_chanspec)) { + + w1clip_th = 25; + clip1md_gaincode = 0x82; + + if ((freq <= 5080) || (freq == 5825)) { + + s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; + s8 lna1A_gain_db_2_rev7[] = { + 11, 17, 22, 25 }; + s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; + + crsminu_th = 0x3e; + lna1_gain_db = lna1A_gain_db_rev7; + lna1_gain_db_2 = lna1A_gain_db_2_rev7; + lna2_gain_db = lna2A_gain_db_rev7; + } else if ((freq >= 5500) && (freq <= 5700)) { + + s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; + s8 lna1A_gain_db_2_rev7[] = { + 12, 18, 22, 26 }; + s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; + + crsminu_th = 0x45; + clip1md_gaincode_B = 0x14; + nbclip_th = 0xff; + chg_nbclip_th = 1; + lna1_gain_db = lna1A_gain_db_rev7; + lna1_gain_db_2 = lna1A_gain_db_2_rev7; + lna2_gain_db = lna2A_gain_db_rev7; + } else { + + s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; + s8 lna1A_gain_db_2_rev7[] = { + 12, 18, 22, 26 }; + s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; + + crsminu_th = 0x41; + lna1_gain_db = lna1A_gain_db_rev7; + lna1_gain_db_2 = lna1A_gain_db_2_rev7; + lna2_gain_db = lna2A_gain_db_rev7; + } + + if (freq <= 4920) { + nvar_baseline_offset0 = 5; + nvar_baseline_offset1 = 5; + } else if ((freq > 4920) && (freq <= 5320)) { + nvar_baseline_offset0 = 3; + nvar_baseline_offset1 = 5; + } else if ((freq > 5320) && (freq <= 5700)) { + nvar_baseline_offset0 = 3; + nvar_baseline_offset1 = 2; + } else { + nvar_baseline_offset0 = 4; + nvar_baseline_offset1 = 0; + } + } else { + + crsminu_th = 0x3a; + crsminl_th = 0x3a; + w1clip_th = 20; + + if ((freq >= 4920) && (freq <= 5320)) { + nvar_baseline_offset0 = 4; + nvar_baseline_offset1 = 5; + } else if ((freq > 5320) && (freq <= 5550)) { + nvar_baseline_offset0 = 4; + nvar_baseline_offset1 = 2; + } else { + nvar_baseline_offset0 = 5; + nvar_baseline_offset1 = 3; + } + } + + write_phy_reg(pi, 0x20, init_gaincode); + write_phy_reg(pi, 0x2a7, init_gaincode); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + pi->pubpi.phy_corenum, 0x106, 16, + rfseq_init_gain); + + write_phy_reg(pi, 0x22, clip1hi_gaincode); + write_phy_reg(pi, 0x2a9, clip1hi_gaincode); + + write_phy_reg(pi, 0x36, clip1md_gaincode_B); + write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); + + write_phy_reg(pi, 0x37, clip1lo_gaincode); + write_phy_reg(pi, 0x2ad, clip1lo_gaincode); + write_phy_reg(pi, 0x38, clip1lo_gaincode_B); + write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, + tia_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, + tia_gain_db); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, + tia_gainbits); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, + tia_gainbits); + + mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); + + if (chg_nbclip_th == 1) { + write_phy_reg(pi, 0x2b, nbclip_th); + write_phy_reg(pi, 0x41, nbclip_th); + } + + mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); + mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); + + mod_phy_reg(pi, 0x2e4, + (0x3f << 0), (nvar_baseline_offset0 << 0)); + + mod_phy_reg(pi, 0x2e4, + (0x3f << 6), (nvar_baseline_offset1 << 6)); + + if (CHSPEC_IS20(pi->radio_chanspec)) { + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, + lna1_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, + lna1_gain_db_2); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, + 8, lna2_gain_db); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, + 8, lna2_gain_db); + + write_phy_reg(pi, 0x24, clip1md_gaincode); + write_phy_reg(pi, 0x2ab, clip1md_gaincode); + } else { + mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); + } + + } + +} + +static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi) +{ + uint core; + int ctr; + s16 gain_delta[2]; + u8 curr_channel; + u16 minmax_gain[2]; + u16 regval[4]; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (pi->nphy_gain_boost) { + if ((CHSPEC_IS2G(pi->radio_chanspec))) { + + gain_delta[0] = 6; + gain_delta[1] = 6; + } else { + + curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); + gain_delta[0] = + (s16) + PHY_HW_ROUND(((nphy_lnagain_est0[0] * + curr_channel) + + nphy_lnagain_est0[1]), 13); + gain_delta[1] = + (s16) + PHY_HW_ROUND(((nphy_lnagain_est1[0] * + curr_channel) + + nphy_lnagain_est1[1]), 13); + } + } else { + + gain_delta[0] = 0; + gain_delta[1] = 0; + } + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (pi->nphy_elna_gain_config) { + + regval[0] = nphy_def_lnagains[2] + gain_delta[core]; + regval[1] = nphy_def_lnagains[3] + gain_delta[core]; + regval[2] = nphy_def_lnagains[3] + gain_delta[core]; + regval[3] = nphy_def_lnagains[3] + gain_delta[core]; + } else { + for (ctr = 0; ctr < 4; ctr++) { + regval[ctr] = + nphy_def_lnagains[ctr] + gain_delta[core]; + } + } + wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); + + minmax_gain[core] = + (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); + } + + mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); + mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on) +{ + if (on) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (!pi->radio_is_on) { + wlc_phy_radio_preinit_205x(pi); + wlc_phy_radio_init_2057(pi); + wlc_phy_radio_postinit_2057(pi); + } + + wlc_phy_chanspec_set((wlc_phy_t *) pi, + pi->radio_chanspec); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_radio_preinit_205x(pi); + wlc_phy_radio_init_2056(pi); + wlc_phy_radio_postinit_2056(pi); + + wlc_phy_chanspec_set((wlc_phy_t *) pi, + pi->radio_chanspec); + } else { + wlc_phy_radio_preinit_2055(pi); + wlc_phy_radio_init_2055(pi); + wlc_phy_radio_postinit_2055(pi); + } + + pi->radio_is_on = true; + + } else { + + if (NREV_GE(pi->pubpi.phy_rev, 3) + && NREV_LT(pi->pubpi.phy_rev, 7)) { + and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); + mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); + + write_radio_reg(pi, + RADIO_2056_TX_PADA_BOOST_TUNE | + RADIO_2056_TX0, 0); + write_radio_reg(pi, + RADIO_2056_TX_PADG_BOOST_TUNE | + RADIO_2056_TX0, 0); + write_radio_reg(pi, + RADIO_2056_TX_PGAA_BOOST_TUNE | + RADIO_2056_TX0, 0); + write_radio_reg(pi, + RADIO_2056_TX_PGAG_BOOST_TUNE | + RADIO_2056_TX0, 0); + mod_radio_reg(pi, + RADIO_2056_TX_MIXA_BOOST_TUNE | + RADIO_2056_TX0, 0xf0, 0); + write_radio_reg(pi, + RADIO_2056_TX_MIXG_BOOST_TUNE | + RADIO_2056_TX0, 0); + + write_radio_reg(pi, + RADIO_2056_TX_PADA_BOOST_TUNE | + RADIO_2056_TX1, 0); + write_radio_reg(pi, + RADIO_2056_TX_PADG_BOOST_TUNE | + RADIO_2056_TX1, 0); + write_radio_reg(pi, + RADIO_2056_TX_PGAA_BOOST_TUNE | + RADIO_2056_TX1, 0); + write_radio_reg(pi, + RADIO_2056_TX_PGAG_BOOST_TUNE | + RADIO_2056_TX1, 0); + mod_radio_reg(pi, + RADIO_2056_TX_MIXA_BOOST_TUNE | + RADIO_2056_TX1, 0xf0, 0); + write_radio_reg(pi, + RADIO_2056_TX_MIXG_BOOST_TUNE | + RADIO_2056_TX1, 0); + + pi->radio_is_on = false; + } + + if (NREV_GE(pi->pubpi.phy_rev, 8)) { + and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); + pi->radio_is_on = false; + } + + } +} + +static void wlc_phy_radio_preinit_2055(phy_info_t *pi) +{ + + and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); + or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); + + or_phy_reg(pi, 0x78, RFCC_POR_FORCE); +} + +static void wlc_phy_radio_init_2055(phy_info_t *pi) +{ + wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); +} + +static void wlc_phy_radio_postinit_2055(phy_info_t *pi) +{ + + and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, + ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); + + if (((pi->sh->sromrev >= 4) + && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) + || ((pi->sh->sromrev < 4))) { + and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); + and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); + } + + mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); + write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); + + and_radio_reg(pi, RADIO_2055_CAL_MISC, + ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); + + or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); + + or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); + + udelay(1000); + + or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); + + SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & + RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); + + if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & + RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, + "HW error: radio calibration1\n")) + return; + + and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, + ~(RADIO_2055_CAL_LPO_ENABLE)); + + wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); + + write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); + write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); + + write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); + write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); + + mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, + RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); + mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, + RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); + if (pi->nphy_gain_boost) { + and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, + ~(RADIO_2055_GAINBST_DISABLE)); + and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, + ~(RADIO_2055_GAINBST_DISABLE)); + } else { + or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, + RADIO_2055_GAINBST_DISABLE); + or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, + RADIO_2055_GAINBST_DISABLE); + } + + udelay(2); +} + +static void wlc_phy_radio_preinit_205x(phy_info_t *pi) +{ + + and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); + and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); + + or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); + or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); + +} + +static void wlc_phy_radio_init_2056(phy_info_t *pi) +{ + radio_regs_t *regs_SYN_2056_ptr = NULL; + radio_regs_t *regs_TX_2056_ptr = NULL; + radio_regs_t *regs_RX_2056_ptr = NULL; + + if (NREV_IS(pi->pubpi.phy_rev, 3)) { + regs_SYN_2056_ptr = regs_SYN_2056; + regs_TX_2056_ptr = regs_TX_2056; + regs_RX_2056_ptr = regs_RX_2056; + } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { + regs_SYN_2056_ptr = regs_SYN_2056_A1; + regs_TX_2056_ptr = regs_TX_2056_A1; + regs_RX_2056_ptr = regs_RX_2056_A1; + } else { + switch (pi->pubpi.radiorev) { + case 5: + regs_SYN_2056_ptr = regs_SYN_2056_rev5; + regs_TX_2056_ptr = regs_TX_2056_rev5; + regs_RX_2056_ptr = regs_RX_2056_rev5; + break; + + case 6: + regs_SYN_2056_ptr = regs_SYN_2056_rev6; + regs_TX_2056_ptr = regs_TX_2056_rev6; + regs_RX_2056_ptr = regs_RX_2056_rev6; + break; + + case 7: + case 9: + regs_SYN_2056_ptr = regs_SYN_2056_rev7; + regs_TX_2056_ptr = regs_TX_2056_rev7; + regs_RX_2056_ptr = regs_RX_2056_rev7; + break; + + case 8: + regs_SYN_2056_ptr = regs_SYN_2056_rev8; + regs_TX_2056_ptr = regs_TX_2056_rev8; + regs_RX_2056_ptr = regs_RX_2056_rev8; + break; + + case 11: + regs_SYN_2056_ptr = regs_SYN_2056_rev11; + regs_TX_2056_ptr = regs_TX_2056_rev11; + regs_RX_2056_ptr = regs_RX_2056_rev11; + break; + + default: + break; + } + } + + wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); + + wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); + + wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); + + wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); + + wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); +} + +static void wlc_phy_radio_postinit_2056(phy_info_t *pi) +{ + mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); + + mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); + mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); + udelay(1000); + mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); + + if ((pi->sh->boardflags2 & BFL2_LEGACY) + || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) { + + mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); + } else { + + mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); + } + + mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); + + if (pi->phy_init_por) { + wlc_phy_radio205x_rcal(pi); + } +} + +static void wlc_phy_radio_init_2057(phy_info_t *pi) +{ + radio_20xx_regs_t *regs_2057_ptr = NULL; + + if (NREV_IS(pi->pubpi.phy_rev, 7)) { + + regs_2057_ptr = regs_2057_rev4; + } else if (NREV_IS(pi->pubpi.phy_rev, 8) + || NREV_IS(pi->pubpi.phy_rev, 9)) { + switch (pi->pubpi.radiorev) { + case 5: + + if (pi->pubpi.radiover == 0x0) { + + regs_2057_ptr = regs_2057_rev5; + + } else if (pi->pubpi.radiover == 0x1) { + + regs_2057_ptr = regs_2057_rev5v1; + } else { + break; + } + + case 7: + + regs_2057_ptr = regs_2057_rev7; + break; + + case 8: + + regs_2057_ptr = regs_2057_rev8; + break; + + default: + break; + } + } + + wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); +} + +static void wlc_phy_radio_postinit_2057(phy_info_t *pi) +{ + + mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); + + if (pi->sh->chip == !BCM6362_CHIP_ID) { + + mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x2, 0x2); + } + + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); + mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); + mdelay(2); + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); + mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); + + if (pi->phy_init_por) { + wlc_phy_radio205x_rcal(pi); + wlc_phy_radio2057_rccal(pi); + } + + mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); +} + +static bool +wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, + chan_info_nphy_radio2057_t **t0, + chan_info_nphy_radio205x_t **t1, + chan_info_nphy_radio2057_rev5_t **t2, + chan_info_nphy_2055_t **t3) +{ + uint i; + chan_info_nphy_radio2057_t *chan_info_tbl_p_0 = NULL; + chan_info_nphy_radio205x_t *chan_info_tbl_p_1 = NULL; + chan_info_nphy_radio2057_rev5_t *chan_info_tbl_p_2 = NULL; + u32 tbl_len = 0; + + int freq = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if (NREV_IS(pi->pubpi.phy_rev, 7)) { + + chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; + tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); + + } else if (NREV_IS(pi->pubpi.phy_rev, 8) + || NREV_IS(pi->pubpi.phy_rev, 9)) { + switch (pi->pubpi.radiorev) { + + case 5: + + if (pi->pubpi.radiover == 0x0) { + + chan_info_tbl_p_2 = + chan_info_nphyrev8_2057_rev5; + tbl_len = + ARRAY_SIZE + (chan_info_nphyrev8_2057_rev5); + + } else if (pi->pubpi.radiover == 0x1) { + + chan_info_tbl_p_2 = + chan_info_nphyrev9_2057_rev5v1; + tbl_len = + ARRAY_SIZE + (chan_info_nphyrev9_2057_rev5v1); + + } + break; + + case 7: + chan_info_tbl_p_0 = + chan_info_nphyrev8_2057_rev7; + tbl_len = + ARRAY_SIZE(chan_info_nphyrev8_2057_rev7); + break; + + case 8: + chan_info_tbl_p_0 = + chan_info_nphyrev8_2057_rev8; + tbl_len = + ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); + break; + + default: + if (NORADIO_ENAB(pi->pubpi)) { + goto fail; + } + break; + } + } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { + + chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; + tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); + } else { + goto fail; + } + + for (i = 0; i < tbl_len; i++) { + if (pi->pubpi.radiorev == 5) { + + if (chan_info_tbl_p_2[i].chan == channel) + break; + } else { + + if (chan_info_tbl_p_0[i].chan == channel) + break; + } + } + + if (i >= tbl_len) { + goto fail; + } + if (pi->pubpi.radiorev == 5) { + *t2 = &chan_info_tbl_p_2[i]; + freq = chan_info_tbl_p_2[i].freq; + } else { + *t0 = &chan_info_tbl_p_0[i]; + freq = chan_info_tbl_p_0[i].freq; + } + + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_IS(pi->pubpi.phy_rev, 3)) { + chan_info_tbl_p_1 = chan_info_nphyrev3_2056; + tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); + } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { + chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; + tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); + } else if (NREV_IS(pi->pubpi.phy_rev, 5) + || NREV_IS(pi->pubpi.phy_rev, 6)) { + switch (pi->pubpi.radiorev) { + case 5: + chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; + tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); + break; + case 6: + chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; + tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); + break; + case 7: + case 9: + chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; + tbl_len = + ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); + break; + case 8: + chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; + tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); + break; + case 11: + chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; + tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v11); + break; + default: + if (NORADIO_ENAB(pi->pubpi)) { + goto fail; + } + break; + } + } + + for (i = 0; i < tbl_len; i++) { + if (chan_info_tbl_p_1[i].chan == channel) + break; + } + + if (i >= tbl_len) { + goto fail; + } + *t1 = &chan_info_tbl_p_1[i]; + freq = chan_info_tbl_p_1[i].freq; + + } else { + for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) + if (chan_info_nphy_2055[i].chan == channel) + break; + + if (i >= ARRAY_SIZE(chan_info_nphy_2055)) { + goto fail; + } + *t3 = &chan_info_nphy_2055[i]; + freq = chan_info_nphy_2055[i].freq; + } + + *f = freq; + return true; + + fail: + *f = WL_CHAN_FREQ_RANGE_2G; + return false; +} + +u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) +{ + int freq; + chan_info_nphy_radio2057_t *t0 = NULL; + chan_info_nphy_radio205x_t *t1 = NULL; + chan_info_nphy_radio2057_rev5_t *t2 = NULL; + chan_info_nphy_2055_t *t3 = NULL; + + if (NORADIO_ENAB(pi->pubpi)) + return WL_CHAN_FREQ_RANGE_2G; + + if (channel == 0) + channel = CHSPEC_CHANNEL(pi->radio_chanspec); + + wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); + + if (CHSPEC_IS2G(pi->radio_chanspec)) + return WL_CHAN_FREQ_RANGE_2G; + + if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) { + return WL_CHAN_FREQ_RANGE_5GL; + } else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) { + return WL_CHAN_FREQ_RANGE_5GM; + } else { + return WL_CHAN_FREQ_RANGE_5GH; + } +} + +static void +wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) +{ + + write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); + write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); + write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); + write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); + write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); + write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); + write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); + write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); + write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); + write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, + ci->RF_core1_lgbuf_a_tune); + write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, + ci->RF_core1_lgbuf_g_tune); + write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); + write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, + ci->RF_core1_tx_pga_pad_tn); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, + ci->RF_core1_tx_mx_bgtrim); + write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, + ci->RF_core2_lgbuf_a_tune); + write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, + ci->RF_core2_lgbuf_g_tune); + write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, + ci->RF_core2_tx_pga_pad_tn); + write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, + ci->RF_core2_tx_mx_bgtrim); + + udelay(50); + + write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); + write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); + + WLC_PHY_WAR_PR51571(pi); + + write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); + + udelay(300); +} + +static void +wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, + const chan_info_nphy_radio205x_t *ci) +{ + radio_regs_t *regs_SYN_2056_ptr = NULL; + + write_radio_reg(pi, + RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, + ci->RF_SYN_pll_vcocal1); + write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, + ci->RF_SYN_pll_vcocal2); + write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, + ci->RF_SYN_pll_refdiv); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, + ci->RF_SYN_pll_mmd2); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, + ci->RF_SYN_pll_mmd1); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, + ci->RF_SYN_pll_loopfilter1); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, + ci->RF_SYN_pll_loopfilter2); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, + ci->RF_SYN_pll_loopfilter3); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, + ci->RF_SYN_pll_loopfilter4); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, + ci->RF_SYN_pll_loopfilter5); + write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, + ci->RF_SYN_reserved_addr27); + write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, + ci->RF_SYN_reserved_addr28); + write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, + ci->RF_SYN_reserved_addr29); + write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, + ci->RF_SYN_logen_VCOBUF1); + write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, + ci->RF_SYN_logen_MIXER2); + write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, + ci->RF_SYN_logen_BUF3); + write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, + ci->RF_SYN_logen_BUF4); + + write_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, + ci->RF_RX0_lnaa_tune); + write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, + ci->RF_RX0_lnag_tune); + write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_intpaa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_intpag_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_pada_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_padg_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_pgaa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_pgag_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_mixa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, + ci->RF_TX0_mixg_boost_tune); + + write_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, + ci->RF_RX1_lnaa_tune); + write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, + ci->RF_RX1_lnag_tune); + write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_intpaa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_intpag_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_pada_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_padg_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_pgaa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_pgag_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_mixa_boost_tune); + write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, + ci->RF_TX1_mixg_boost_tune); + + if (NREV_IS(pi->pubpi.phy_rev, 3)) + regs_SYN_2056_ptr = regs_SYN_2056; + else if (NREV_IS(pi->pubpi.phy_rev, 4)) + regs_SYN_2056_ptr = regs_SYN_2056_A1; + else { + switch (pi->pubpi.radiorev) { + case 5: + regs_SYN_2056_ptr = regs_SYN_2056_rev5; + break; + case 6: + regs_SYN_2056_ptr = regs_SYN_2056_rev6; + break; + case 7: + case 9: + regs_SYN_2056_ptr = regs_SYN_2056_rev7; + break; + case 8: + regs_SYN_2056_ptr = regs_SYN_2056_rev8; + break; + case 11: + regs_SYN_2056_ptr = regs_SYN_2056_rev11; + break; + } + } + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, + (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); + } else { + write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, + (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); + } + + if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | + RADIO_2056_SYN, 0x1f); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | + RADIO_2056_SYN, 0x1f); + + if ((pi->sh->chip == BCM4716_CHIP_ID) || + (pi->sh->chip == BCM47162_CHIP_ID)) { + + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER4 | + RADIO_2056_SYN, 0x14); + write_radio_reg(pi, + RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, 0x00); + } else { + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER4 | + RADIO_2056_SYN, 0xb); + write_radio_reg(pi, + RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, 0x14); + } + } + } + + if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && + (CHSPEC_IS2G(pi->radio_chanspec))) { + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, + 0x1f); + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, + 0x1f); + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, + 0xb); + write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, + 0x20); + } + + if (pi->sh->boardflags2 & BFL2_APLL_WAR) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | + RADIO_2056_SYN, 0x1f); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | + RADIO_2056_SYN, 0x1f); + write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | + RADIO_2056_SYN, 0x5); + write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, 0xc); + } + } + + if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { + u16 pag_boost_tune; + u16 padg_boost_tune; + u16 pgag_boost_tune; + u16 mixg_boost_tune; + u16 bias, cascbias; + uint core; + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + if (NREV_GE(pi->pubpi.phy_rev, 5)) { + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PADG_IDAC, 0xcc); + + if ((pi->sh->chip == BCM4716_CHIP_ID) || + (pi->sh->chip == + BCM47162_CHIP_ID)) { + bias = 0x40; + cascbias = 0x45; + pag_boost_tune = 0x5; + pgag_boost_tune = 0x33; + padg_boost_tune = 0x77; + mixg_boost_tune = 0x55; + } else { + bias = 0x25; + cascbias = 0x20; + + if ((pi->sh->chip == + BCM43224_CHIP_ID) + || (pi->sh->chip == + BCM43225_CHIP_ID) + || (pi->sh->chip == + BCM43421_CHIP_ID)) { + if (pi->sh->chippkg == + BCM43224_FAB_SMIC) { + bias = 0x2a; + cascbias = 0x38; + } + } + + pag_boost_tune = 0x4; + pgag_boost_tune = 0x03; + padg_boost_tune = 0x77; + mixg_boost_tune = 0x65; + } + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_IMAIN_STAT, bias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_IAUX_STAT, bias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_CASCBIAS, cascbias); + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_BOOST_TUNE, + pag_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PGAG_BOOST_TUNE, + pgag_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PADG_BOOST_TUNE, + padg_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + MIXG_BOOST_TUNE, + mixg_boost_tune); + } else { + + bias = IS40MHZ(pi) ? 0x40 : 0x20; + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_IMAIN_STAT, bias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_IAUX_STAT, bias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_CASCBIAS, 0x30); + } + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, + 0xee); + } + } + + if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) + && CHSPEC_IS5G(pi->radio_chanspec)) { + u16 paa_boost_tune; + u16 pada_boost_tune; + u16 pgaa_boost_tune; + u16 mixa_boost_tune; + u16 freq, pabias, cascbias; + uint core; + + freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); + + if (freq < 5150) { + + paa_boost_tune = 0xa; + pada_boost_tune = 0x77; + pgaa_boost_tune = 0xf; + mixa_boost_tune = 0xf; + } else if (freq < 5340) { + + paa_boost_tune = 0x8; + pada_boost_tune = 0x77; + pgaa_boost_tune = 0xfb; + mixa_boost_tune = 0xf; + } else if (freq < 5650) { + + paa_boost_tune = 0x0; + pada_boost_tune = 0x77; + pgaa_boost_tune = 0xb; + mixa_boost_tune = 0xf; + } else { + + paa_boost_tune = 0x0; + pada_boost_tune = 0x77; + if (freq != 5825) { + pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; + } else { + pgaa_boost_tune = 6; + } + mixa_boost_tune = 0xf; + } + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_BOOST_TUNE, paa_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PADA_BOOST_TUNE, pada_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PGAA_BOOST_TUNE, pgaa_boost_tune); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + MIXA_BOOST_TUNE, mixa_boost_tune); + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TXSPARE1, 0x30); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PA_SPARE2, 0xee); + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + PADA_CASCBIAS, 0x3); + + cascbias = 0x30; + + if ((pi->sh->chip == BCM43224_CHIP_ID) || + (pi->sh->chip == BCM43225_CHIP_ID) || + (pi->sh->chip == BCM43421_CHIP_ID)) { + if (pi->sh->chippkg == BCM43224_FAB_SMIC) { + cascbias = 0x35; + } + } + + pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_IAUX_STAT, pabias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_IMAIN_STAT, pabias); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_CASCBIAS, cascbias); + } + } + + udelay(50); + + wlc_phy_radio205x_vcocal_nphy(pi); +} + +void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi) +{ + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, + (1 << 2)); + mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); + } + + udelay(300); +} + +#define MAX_205x_RCAL_WAITLOOPS 10000 + +static u16 wlc_phy_radio205x_rcal(phy_info_t *pi) +{ + u16 rcal_reg = 0; + int i; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if (pi->pubpi.radiorev == 5) { + + and_phy_reg(pi, 0x342, ~(0x1 << 1)); + + udelay(10); + + mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); + mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, + 0x1); + } + mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); + + udelay(10); + + mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); + + for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { + rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); + if (rcal_reg & 0x1) { + break; + } + udelay(100); + } + + if (WARN(i == MAX_205x_RCAL_WAITLOOPS, + "HW error: radio calib2")) + return 0; + + mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); + + rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; + + mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); + if (pi->pubpi.radiorev == 5) { + + mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); + mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, + 0x0); + } + + if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { + + mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, + rcal_reg); + mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, + rcal_reg << 2); + } + + } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { + u16 savereg; + + savereg = + read_radio_reg(pi, + RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN); + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, + savereg | 0x7); + udelay(10); + + write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, + 0x1); + udelay(10); + + write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, + 0x9); + + for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { + rcal_reg = read_radio_reg(pi, + RADIO_2056_SYN_RCAL_CODE_OUT | + RADIO_2056_SYN); + if (rcal_reg & 0x80) { + break; + } + udelay(100); + } + + if (WARN(i == MAX_205x_RCAL_WAITLOOPS, + "HW error: radio calib3")) + return 0; + + write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, + 0x1); + + rcal_reg = + read_radio_reg(pi, + RADIO_2056_SYN_RCAL_CODE_OUT | + RADIO_2056_SYN); + + write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, + 0x0); + + write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, + savereg); + + return rcal_reg & 0x1f; + } + return rcal_reg & 0x3e; +} + +static void +wlc_phy_chanspec_radio2057_setup(phy_info_t *pi, + const chan_info_nphy_radio2057_t *ci, + const chan_info_nphy_radio2057_rev5_t *ci2) +{ + int coreNum; + u16 txmix2g_tune_boost_pu = 0; + u16 pad2g_tune_pus = 0; + + if (pi->pubpi.radiorev == 5) { + + write_radio_reg(pi, + RADIO_2057_VCOCAL_COUNTVAL0, + ci2->RF_vcocal_countval0); + write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, + ci2->RF_vcocal_countval1); + write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, + ci2->RF_rfpll_refmaster_sparextalsize); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + ci2->RF_rfpll_loopfilter_r1); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + ci2->RF_rfpll_loopfilter_c2); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + ci2->RF_rfpll_loopfilter_c1); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, + ci2->RF_cp_kpd_idac); + write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); + write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); + write_radio_reg(pi, + RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); + write_radio_reg(pi, + RADIO_2057_LOGEN_MX2G_TUNE, + ci2->RF_logen_mx2g_tune); + write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, + ci2->RF_logen_indbuf2g_tune); + + write_radio_reg(pi, + RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, + ci2->RF_txmix2g_tune_boost_pu_core0); + write_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE0, + ci2->RF_pad2g_tune_pus_core0); + write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, + ci2->RF_lna2g_tune_core0); + + write_radio_reg(pi, + RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, + ci2->RF_txmix2g_tune_boost_pu_core1); + write_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE1, + ci2->RF_pad2g_tune_pus_core1); + write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, + ci2->RF_lna2g_tune_core1); + + } else { + + write_radio_reg(pi, + RADIO_2057_VCOCAL_COUNTVAL0, + ci->RF_vcocal_countval0); + write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, + ci->RF_vcocal_countval1); + write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, + ci->RF_rfpll_refmaster_sparextalsize); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + ci->RF_rfpll_loopfilter_r1); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + ci->RF_rfpll_loopfilter_c2); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + ci->RF_rfpll_loopfilter_c1); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); + write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); + write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); + write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); + write_radio_reg(pi, + RADIO_2057_LOGEN_MX2G_TUNE, + ci->RF_logen_mx2g_tune); + write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, + ci->RF_logen_mx5g_tune); + write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, + ci->RF_logen_indbuf2g_tune); + write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, + ci->RF_logen_indbuf5g_tune); + + write_radio_reg(pi, + RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, + ci->RF_txmix2g_tune_boost_pu_core0); + write_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE0, + ci->RF_pad2g_tune_pus_core0); + write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, + ci->RF_pga_boost_tune_core0); + write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, + ci->RF_txmix5g_boost_tune_core0); + write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, + ci->RF_pad5g_tune_misc_pus_core0); + write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, + ci->RF_lna2g_tune_core0); + write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, + ci->RF_lna5g_tune_core0); + + write_radio_reg(pi, + RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, + ci->RF_txmix2g_tune_boost_pu_core1); + write_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE1, + ci->RF_pad2g_tune_pus_core1); + write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, + ci->RF_pga_boost_tune_core1); + write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, + ci->RF_txmix5g_boost_tune_core1); + write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, + ci->RF_pad5g_tune_misc_pus_core1); + write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, + ci->RF_lna2g_tune_core1); + write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, + ci->RF_lna5g_tune_core1); + } + + if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + 0x3f); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + 0x8); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + 0x8); + } else { + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + 0x1f); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + 0x8); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + 0x8); + } + } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || + (pi->pubpi.radiorev == 8)) { + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + 0x1b); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + 0xa); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + 0xa); + } else { + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, + 0x1f); + write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, + 0x8); + write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, + 0x8); + } + + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (PHY_IPA(pi)) { + if (pi->pubpi.radiorev == 3) { + txmix2g_tune_boost_pu = 0x6b; + } + + if (pi->pubpi.radiorev == 5) + pad2g_tune_pus = 0x73; + + } else { + if (pi->pubpi.radiorev != 5) { + pad2g_tune_pus = 0x3; + + txmix2g_tune_boost_pu = 0x61; + } + } + + for (coreNum = 0; coreNum <= 1; coreNum++) { + + if (txmix2g_tune_boost_pu != 0) + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, + TXMIX2G_TUNE_BOOST_PU, + txmix2g_tune_boost_pu); + + if (pad2g_tune_pus != 0) + WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, + PAD2G_TUNE_PUS, + pad2g_tune_pus); + } + } + + udelay(50); + + wlc_phy_radio205x_vcocal_nphy(pi); +} + +static u16 wlc_phy_radio2057_rccal(phy_info_t *pi) +{ + u16 rccal_valid; + int i; + bool chip43226_6362A0; + + chip43226_6362A0 = ((pi->pubpi.radiorev == 3) + || (pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)); + + rccal_valid = 0; + if (chip43226_6362A0) { + write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); + } else { + write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); + + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); + } + write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); + + for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { + rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); + if (rccal_valid & 0x2) { + break; + } + udelay(500); + } + + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); + + rccal_valid = 0; + if (chip43226_6362A0) { + write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); + } else { + write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); + + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); + } + write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); + + for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { + rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); + if (rccal_valid & 0x2) { + break; + } + udelay(500); + } + + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); + + rccal_valid = 0; + if (chip43226_6362A0) { + write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); + + write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); + } else { + write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); + write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); + write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); + } + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); + + for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { + rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); + if (rccal_valid & 0x2) { + break; + } + udelay(500); + } + + if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) + return 0; + + write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); + + return rccal_valid; +} + +static void +wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, u16 reduction_factr) +{ + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { + if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && + CHSPEC_IS40(pi->radio_chanspec)) { + if (!pi->nphy_anarxlpf_adjusted) { + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_LPC | + RADIO_2056_RX0), + ((pi->nphy_rccal_value + + reduction_factr) | 0x80)); + + pi->nphy_anarxlpf_adjusted = true; + } + } else { + if (pi->nphy_anarxlpf_adjusted) { + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_LPC | + RADIO_2056_RX0), + (pi->nphy_rccal_value | 0x80)); + + pi->nphy_anarxlpf_adjusted = false; + } + } + } +} + +static void +wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *tone_id_buf, + u32 *noise_var_buf) +{ + int i; + u32 offset; + int tone_id; + int tbllen = + CHSPEC_IS40(pi-> + radio_chanspec) ? NPHY_NOISEVAR_TBLLEN40 : + NPHY_NOISEVAR_TBLLEN20; + + if (pi->nphy_noisevars_adjusted) { + for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { + tone_id = pi->nphy_saved_noisevars.tone_id[i]; + offset = (tone_id >= 0) ? + ((tone_id * 2) + 1) : (tbllen + (tone_id * 2) + 1); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + offset, 32, + (void *)&pi-> + nphy_saved_noisevars. + min_noise_vars[i]); + } + + pi->nphy_saved_noisevars.bufcount = 0; + pi->nphy_noisevars_adjusted = false; + } + + if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { + pi->nphy_saved_noisevars.bufcount = 0; + + for (i = 0; i < ntones; i++) { + tone_id = tone_id_buf[i]; + offset = (tone_id >= 0) ? + ((tone_id * 2) + 1) : (tbllen + (tone_id * 2) + 1); + pi->nphy_saved_noisevars.tone_id[i] = tone_id; + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + offset, 32, + &pi->nphy_saved_noisevars. + min_noise_vars[i]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, + offset, 32, + (void *)&noise_var_buf[i]); + pi->nphy_saved_noisevars.bufcount++; + } + + pi->nphy_noisevars_adjusted = true; + } +} + +static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr) +{ + u16 regval; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && + CHSPEC_IS40(pi->radio_chanspec)) { + if (!pi->nphy_crsminpwr_adjusted) { + regval = read_phy_reg(pi, 0x27d); + pi->nphy_crsminpwr[0] = regval & 0xff; + regval &= 0xff00; + regval |= (u16) minpwr; + write_phy_reg(pi, 0x27d, regval); + + regval = read_phy_reg(pi, 0x280); + pi->nphy_crsminpwr[1] = regval & 0xff; + regval &= 0xff00; + regval |= (u16) minpwr; + write_phy_reg(pi, 0x280, regval); + + regval = read_phy_reg(pi, 0x283); + pi->nphy_crsminpwr[2] = regval & 0xff; + regval &= 0xff00; + regval |= (u16) minpwr; + write_phy_reg(pi, 0x283, regval); + + pi->nphy_crsminpwr_adjusted = true; + } + } else { + if (pi->nphy_crsminpwr_adjusted) { + regval = read_phy_reg(pi, 0x27d); + regval &= 0xff00; + regval |= pi->nphy_crsminpwr[0]; + write_phy_reg(pi, 0x27d, regval); + + regval = read_phy_reg(pi, 0x280); + regval &= 0xff00; + regval |= pi->nphy_crsminpwr[1]; + write_phy_reg(pi, 0x280, regval); + + regval = read_phy_reg(pi, 0x283); + regval &= 0xff00; + regval |= pi->nphy_crsminpwr[2]; + write_phy_reg(pi, 0x283, regval); + + pi->nphy_crsminpwr_adjusted = false; + } + } + } +} + +static void wlc_phy_txlpfbw_nphy(phy_info_t *pi) +{ + u8 tx_lpf_bw = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS40(pi->radio_chanspec)) { + tx_lpf_bw = 3; + } else { + tx_lpf_bw = 1; + } + + if (PHY_IPA(pi)) { + if (CHSPEC_IS40(pi->radio_chanspec)) { + tx_lpf_bw = 5; + } else { + tx_lpf_bw = 4; + } + } + write_phy_reg(pi, 0xe8, + (tx_lpf_bw << 0) | + (tx_lpf_bw << 3) | + (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); + + if (PHY_IPA(pi)) { + + if (CHSPEC_IS40(pi->radio_chanspec)) { + tx_lpf_bw = 4; + } else { + tx_lpf_bw = 1; + } + + write_phy_reg(pi, 0xe9, + (tx_lpf_bw << 0) | + (tx_lpf_bw << 3) | + (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); + } + } +} + +static void wlc_phy_spurwar_nphy(phy_info_t *pi) +{ + u16 cur_channel = 0; + int nphy_adj_tone_id_buf[] = { 57, 58 }; + u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; + bool isAdjustNoiseVar = false; + uint numTonesAdjust = 0; + u32 tempval = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); + + if (pi->nphy_gband_spurwar_en) { + + wlc_phy_adjust_rx_analpfbw_nphy(pi, + NPHY_ANARXLPFBW_REDUCTIONFACT); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if ((cur_channel == 11) + && CHSPEC_IS40(pi->radio_chanspec)) { + + wlc_phy_adjust_min_noisevar_nphy(pi, 2, + nphy_adj_tone_id_buf, + nphy_adj_noise_var_buf); + } else { + + wlc_phy_adjust_min_noisevar_nphy(pi, 0, + NULL, + NULL); + } + } + wlc_phy_adjust_crsminpwr_nphy(pi, + NPHY_ADJUSTED_MINCRSPOWER); + } + + if ((pi->nphy_gband_spurwar2_en) + && CHSPEC_IS2G(pi->radio_chanspec)) { + + if (CHSPEC_IS40(pi->radio_chanspec)) { + switch (cur_channel) { + case 3: + nphy_adj_tone_id_buf[0] = 57; + nphy_adj_tone_id_buf[1] = 58; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x25f; + isAdjustNoiseVar = true; + break; + case 4: + nphy_adj_tone_id_buf[0] = 41; + nphy_adj_tone_id_buf[1] = 42; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x25f; + isAdjustNoiseVar = true; + break; + case 5: + nphy_adj_tone_id_buf[0] = 25; + nphy_adj_tone_id_buf[1] = 26; + nphy_adj_noise_var_buf[0] = 0x24f; + nphy_adj_noise_var_buf[1] = 0x25f; + isAdjustNoiseVar = true; + break; + case 6: + nphy_adj_tone_id_buf[0] = 9; + nphy_adj_tone_id_buf[1] = 10; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x24f; + isAdjustNoiseVar = true; + break; + case 7: + nphy_adj_tone_id_buf[0] = 121; + nphy_adj_tone_id_buf[1] = 122; + nphy_adj_noise_var_buf[0] = 0x18f; + nphy_adj_noise_var_buf[1] = 0x24f; + isAdjustNoiseVar = true; + break; + case 8: + nphy_adj_tone_id_buf[0] = 105; + nphy_adj_tone_id_buf[1] = 106; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x25f; + isAdjustNoiseVar = true; + break; + case 9: + nphy_adj_tone_id_buf[0] = 89; + nphy_adj_tone_id_buf[1] = 90; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x24f; + isAdjustNoiseVar = true; + break; + case 10: + nphy_adj_tone_id_buf[0] = 73; + nphy_adj_tone_id_buf[1] = 74; + nphy_adj_noise_var_buf[0] = 0x22f; + nphy_adj_noise_var_buf[1] = 0x24f; + isAdjustNoiseVar = true; + break; + default: + isAdjustNoiseVar = false; + break; + } + } + + if (isAdjustNoiseVar) { + numTonesAdjust = sizeof(nphy_adj_tone_id_buf) / + sizeof(nphy_adj_tone_id_buf[0]); + + wlc_phy_adjust_min_noisevar_nphy(pi, + numTonesAdjust, + nphy_adj_tone_id_buf, + nphy_adj_noise_var_buf); + + tempval = 0; + + } else { + + wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, + NULL); + } + } + + if ((pi->nphy_aband_spurwar_en) && + (CHSPEC_IS5G(pi->radio_chanspec))) { + switch (cur_channel) { + case 54: + nphy_adj_tone_id_buf[0] = 32; + nphy_adj_noise_var_buf[0] = 0x25f; + break; + case 38: + case 102: + case 118: + if ((pi->sh->chip == BCM4716_CHIP_ID) && + (pi->sh->chippkg == BCM4717_PKG_ID)) { + nphy_adj_tone_id_buf[0] = 32; + nphy_adj_noise_var_buf[0] = 0x21f; + } else { + nphy_adj_tone_id_buf[0] = 0; + nphy_adj_noise_var_buf[0] = 0x0; + } + break; + case 134: + nphy_adj_tone_id_buf[0] = 32; + nphy_adj_noise_var_buf[0] = 0x21f; + break; + case 151: + nphy_adj_tone_id_buf[0] = 16; + nphy_adj_noise_var_buf[0] = 0x23f; + break; + case 153: + case 161: + nphy_adj_tone_id_buf[0] = 48; + nphy_adj_noise_var_buf[0] = 0x23f; + break; + default: + nphy_adj_tone_id_buf[0] = 0; + nphy_adj_noise_var_buf[0] = 0x0; + break; + } + + if (nphy_adj_tone_id_buf[0] + && nphy_adj_noise_var_buf[0]) { + wlc_phy_adjust_min_noisevar_nphy(pi, 1, + nphy_adj_tone_id_buf, + nphy_adj_noise_var_buf); + } else { + wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, + NULL); + } + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); + } +} + +static void +wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, + const nphy_sfo_cfg_t *ci) +{ + u16 val; + + val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; + if (CHSPEC_IS5G(chanspec) && !val) { + + val = R_REG(&pi->regs->psm_phy_hdr_param); + W_REG(&pi->regs->psm_phy_hdr_param, + (val | MAC_PHY_FORCE_CLK)); + + or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), + (BBCFG_RESETCCA | BBCFG_RESETRX)); + + W_REG(&pi->regs->psm_phy_hdr_param, val); + + or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); + } else if (!CHSPEC_IS5G(chanspec) && val) { + + and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); + + val = R_REG(&pi->regs->psm_phy_hdr_param); + W_REG(&pi->regs->psm_phy_hdr_param, + (val | MAC_PHY_FORCE_CLK)); + + and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), + (u16) (~(BBCFG_RESETCCA | BBCFG_RESETRX))); + + W_REG(&pi->regs->psm_phy_hdr_param, val); + } + + write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); + write_phy_reg(pi, 0x1cf, ci->PHY_BW2); + write_phy_reg(pi, 0x1d0, ci->PHY_BW3); + + write_phy_reg(pi, 0x1d1, ci->PHY_BW4); + write_phy_reg(pi, 0x1d2, ci->PHY_BW5); + write_phy_reg(pi, 0x1d3, ci->PHY_BW6); + + if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { + wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); + + or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); + } else { + wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, + NPHY_ClassifierCtrl_ofdm_en); + + if (CHSPEC_IS2G(chanspec)) + and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); + } + + if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { + wlc_phy_txpwr_fixpower_nphy(pi); + } + + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + + wlc_phy_adjust_lnagaintbl_nphy(pi); + } + + wlc_phy_txlpfbw_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 3) + && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { + u8 spuravoid = 0; + + val = CHSPEC_CHANNEL(chanspec); + if (!CHSPEC_IS40(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if ((val == 13) || (val == 14) || (val == 153)) { + spuravoid = 1; + } + } else { + + if (((val >= 5) && (val <= 8)) || (val == 13) + || (val == 14)) { + spuravoid = 1; + } + } + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (val == 54) { + spuravoid = 1; + } + } else { + + if (pi->nphy_aband_spurwar_en && + ((val == 38) || (val == 102) + || (val == 118))) { + if ((pi->sh->chip == + BCM4716_CHIP_ID) + && (pi->sh->chippkg == + BCM4717_PKG_ID)) { + spuravoid = 0; + } else { + spuravoid = 1; + } + } + } + } + + if (pi->phy_spuravoid == SPURAVOID_FORCEON) + spuravoid = 1; + + if ((pi->sh->chip == BCM4716_CHIP_ID) || + (pi->sh->chip == BCM47162_CHIP_ID)) { + si_pmu_spuravoid(pi->sh->sih, spuravoid); + } else { + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); + si_pmu_spuravoid(pi->sh->sih, spuravoid); + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); + } + + if ((pi->sh->chip == BCM43224_CHIP_ID) || + (pi->sh->chip == BCM43225_CHIP_ID) || + (pi->sh->chip == BCM43421_CHIP_ID)) { + + if (spuravoid == 1) { + + W_REG(&pi->regs->tsf_clk_frac_l, + 0x5341); + W_REG(&pi->regs->tsf_clk_frac_h, + 0x8); + } else { + + W_REG(&pi->regs->tsf_clk_frac_l, + 0x8889); + W_REG(&pi->regs->tsf_clk_frac_h, + 0x8); + } + } + + if (!((pi->sh->chip == BCM4716_CHIP_ID) || + (pi->sh->chip == BCM47162_CHIP_ID))) { + wlapi_bmac_core_phypll_reset(pi->sh->physhim); + } + + mod_phy_reg(pi, 0x01, (0x1 << 15), + ((spuravoid > 0) ? (0x1 << 15) : 0)); + + wlc_phy_resetcca_nphy(pi); + + pi->phy_isspuravoid = (spuravoid > 0); + } + + if (NREV_LT(pi->pubpi.phy_rev, 7)) + write_phy_reg(pi, 0x17e, 0x3830); + + wlc_phy_spurwar_nphy(pi); +} + +void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) +{ + int freq; + chan_info_nphy_radio2057_t *t0 = NULL; + chan_info_nphy_radio205x_t *t1 = NULL; + chan_info_nphy_radio2057_rev5_t *t2 = NULL; + chan_info_nphy_2055_t *t3 = NULL; + + if (NORADIO_ENAB(pi->pubpi)) { + return; + } + + if (!wlc_phy_chan2freq_nphy + (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) + return; + + wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); + + if (CHSPEC_BW(chanspec) != pi->bw) + wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); + + if (CHSPEC_IS40(chanspec)) { + if (CHSPEC_SB_UPPER(chanspec)) { + or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + or_phy_reg(pi, 0x310, PRIM_SEL_UP20); + } + } else { + and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + and_phy_reg(pi, 0x310, + (~PRIM_SEL_UP20 & 0xffff)); + } + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if ((pi->pubpi.radiorev <= 4) + || (pi->pubpi.radiorev == 6)) { + mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, + 0x2, + (CHSPEC_IS5G(chanspec) ? (1 << 1) + : 0)); + mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, + 0x2, + (CHSPEC_IS5G(chanspec) ? (1 << 1) + : 0)); + } + + wlc_phy_chanspec_radio2057_setup(pi, t0, t2); + wlc_phy_chanspec_nphy_setup(pi, chanspec, + (pi->pubpi.radiorev == + 5) ? (const nphy_sfo_cfg_t + *)&(t2-> + PHY_BW1a) + : (const nphy_sfo_cfg_t *) + &(t0->PHY_BW1a)); + + } else { + + mod_radio_reg(pi, + RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, + 0x4, + (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); + wlc_phy_chanspec_radio2056_setup(pi, t1); + + wlc_phy_chanspec_nphy_setup(pi, chanspec, + (const nphy_sfo_cfg_t *) + &(t1->PHY_BW1a)); + } + + } else { + + mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, + (CHSPEC_IS5G(chanspec) ? (0x02 << 4) + : (0x05 << 4))); + + wlc_phy_chanspec_radio2055_setup(pi, t3); + wlc_phy_chanspec_nphy_setup(pi, chanspec, + (const nphy_sfo_cfg_t *)&(t3-> + PHY_BW1a)); + } + +} + +static void wlc_phy_savecal_nphy(phy_info_t *pi) +{ + void *tbl_ptr; + int coreNum; + u16 *txcal_radio_regs = NULL; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + + wlc_phy_rx_iq_coeffs_nphy(pi, 0, + &pi->calibration_cache. + rxcal_coeffs_2G); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + txcal_radio_regs = + pi->calibration_cache.txcal_radio_regs_2G; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + pi->calibration_cache.txcal_radio_regs_2G[0] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_2G[1] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_2G[2] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX1); + pi->calibration_cache.txcal_radio_regs_2G[3] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX1); + + pi->calibration_cache.txcal_radio_regs_2G[4] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_2G[5] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_2G[6] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX1); + pi->calibration_cache.txcal_radio_regs_2G[7] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX1); + } else { + pi->calibration_cache.txcal_radio_regs_2G[0] = + read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); + pi->calibration_cache.txcal_radio_regs_2G[1] = + read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); + pi->calibration_cache.txcal_radio_regs_2G[2] = + read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); + pi->calibration_cache.txcal_radio_regs_2G[3] = + read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); + } + + pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; + tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; + } else { + + wlc_phy_rx_iq_coeffs_nphy(pi, 0, + &pi->calibration_cache. + rxcal_coeffs_5G); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + txcal_radio_regs = + pi->calibration_cache.txcal_radio_regs_5G; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + pi->calibration_cache.txcal_radio_regs_5G[0] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_5G[1] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_5G[2] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX1); + pi->calibration_cache.txcal_radio_regs_5G[3] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX1); + + pi->calibration_cache.txcal_radio_regs_5G[4] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_5G[5] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX0); + pi->calibration_cache.txcal_radio_regs_5G[6] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX1); + pi->calibration_cache.txcal_radio_regs_5G[7] = + read_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX1); + } else { + pi->calibration_cache.txcal_radio_regs_5G[0] = + read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); + pi->calibration_cache.txcal_radio_regs_5G[1] = + read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); + pi->calibration_cache.txcal_radio_regs_5G[2] = + read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); + pi->calibration_cache.txcal_radio_regs_5G[3] = + read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); + } + + pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; + tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; + } + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (coreNum = 0; coreNum <= 1; coreNum++) { + + txcal_radio_regs[2 * coreNum] = + READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_FINE_I); + txcal_radio_regs[2 * coreNum + 1] = + READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_FINE_Q); + + txcal_radio_regs[2 * coreNum + 4] = + READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_COARSE_I); + txcal_radio_regs[2 * coreNum + 5] = + READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_COARSE_Q); + } + } + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void wlc_phy_restorecal_nphy(phy_info_t *pi) +{ + u16 *loft_comp; + u16 txcal_coeffs_bphy[4]; + u16 *tbl_ptr; + int coreNum; + u16 *txcal_radio_regs = NULL; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->nphy_iqcal_chanspec_2G == 0) + return; + + tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; + loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; + } else { + if (pi->nphy_iqcal_chanspec_5G == 0) + return; + + tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; + loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, + (void *)tbl_ptr); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + txcal_coeffs_bphy[0] = tbl_ptr[0]; + txcal_coeffs_bphy[1] = tbl_ptr[1]; + txcal_coeffs_bphy[2] = tbl_ptr[2]; + txcal_coeffs_bphy[3] = tbl_ptr[3]; + } else { + txcal_coeffs_bphy[0] = 0; + txcal_coeffs_bphy[1] = 0; + txcal_coeffs_bphy[2] = 0; + txcal_coeffs_bphy[3] = 0; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, + txcal_coeffs_bphy); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) + wlc_phy_tx_iq_war_nphy(pi); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + txcal_radio_regs = + pi->calibration_cache.txcal_radio_regs_2G; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_2G[0]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_2G[1]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_2G[2]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_2G[3]); + + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_2G[4]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_2G[5]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_2G[6]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_2G[7]); + } else { + write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, + pi->calibration_cache. + txcal_radio_regs_2G[0]); + write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, + pi->calibration_cache. + txcal_radio_regs_2G[1]); + write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, + pi->calibration_cache. + txcal_radio_regs_2G[2]); + write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, + pi->calibration_cache. + txcal_radio_regs_2G[3]); + } + + wlc_phy_rx_iq_coeffs_nphy(pi, 1, + &pi->calibration_cache. + rxcal_coeffs_2G); + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + txcal_radio_regs = + pi->calibration_cache.txcal_radio_regs_5G; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_5G[0]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_5G[1]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_I | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_5G[2]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_FINE_Q | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_5G[3]); + + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_5G[4]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX0, + pi->calibration_cache. + txcal_radio_regs_5G[5]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_I | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_5G[6]); + write_radio_reg(pi, + RADIO_2056_TX_LOFT_COARSE_Q | + RADIO_2056_TX1, + pi->calibration_cache. + txcal_radio_regs_5G[7]); + } else { + write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, + pi->calibration_cache. + txcal_radio_regs_5G[0]); + write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, + pi->calibration_cache. + txcal_radio_regs_5G[1]); + write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, + pi->calibration_cache. + txcal_radio_regs_5G[2]); + write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, + pi->calibration_cache. + txcal_radio_regs_5G[3]); + } + + wlc_phy_rx_iq_coeffs_nphy(pi, 1, + &pi->calibration_cache. + rxcal_coeffs_5G); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (coreNum = 0; coreNum <= 1; coreNum++) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_FINE_I, + txcal_radio_regs[2 * coreNum]); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_FINE_Q, + txcal_radio_regs[2 * coreNum + 1]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_COARSE_I, + txcal_radio_regs[2 * coreNum + 4]); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, + LOFT_COARSE_Q, + txcal_radio_regs[2 * coreNum + 5]); + } + } +} + +void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init) +{ + phy_info_t *pi = (phy_info_t *) ppi; + u16 mask = 0xfc00; + u32 mc = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) + return; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; + + if (lut_init == false) + return; + + if (pi->srom_fem2g.antswctrllut == 0) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x02, 16, &v0); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x03, 16, &v1); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x08, 16, &v2); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x0C, 16, &v3); + } + + if (pi->srom_fem5g.antswctrllut == 0) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x12, 16, &v0); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x13, 16, &v1); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x18, 16, &v2); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, + 1, 0x1C, 16, &v3); + } + } else { + + write_phy_reg(pi, 0xc8, 0x0); + write_phy_reg(pi, 0xc9, 0x0); + + ai_gpiocontrol(pi->sh->sih, mask, mask, GPIO_DRV_PRIORITY); + + mc = R_REG(&pi->regs->maccontrol); + mc &= ~MCTL_GPOUT_SEL_MASK; + W_REG(&pi->regs->maccontrol, mc); + + OR_REG(&pi->regs->psm_gpio_oe, mask); + + AND_REG(&pi->regs->psm_gpio_out, ~mask); + + if (lut_init) { + write_phy_reg(pi, 0xf8, 0x02d8); + write_phy_reg(pi, 0xf9, 0x0301); + write_phy_reg(pi, 0xfa, 0x02d8); + write_phy_reg(pi, 0xfb, 0x0301); + } + } +} + +u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val) +{ + u16 curr_ctl, new_ctl; + bool suspended = false; + + if (D11REV_IS(pi->sh->corerev, 16)) { + suspended = + (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) ? + false : true; + if (!suspended) + wlapi_suspend_mac_and_wait(pi->sh->physhim); + } + + curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); + + new_ctl = (curr_ctl & (~mask)) | (val & mask); + + mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); + + if (D11REV_IS(pi->sh->corerev, 16) && !suspended) + wlapi_enable_mac(pi->sh->physhim); + + return new_ctl; +} + +static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals) +{ + + if (write == 0) { + vals[0] = read_phy_reg(pi, 0x2c); + vals[1] = read_phy_reg(pi, 0x42); + } else { + write_phy_reg(pi, 0x2c, vals[0]); + write_phy_reg(pi, 0x42, vals[1]); + } +} + +void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd) +{ + u16 trigger_mask, status_mask; + u16 orig_RfseqCoreActv; + + switch (cmd) { + case NPHY_RFSEQ_RX2TX: + trigger_mask = NPHY_RfseqTrigger_rx2tx; + status_mask = NPHY_RfseqStatus_rx2tx; + break; + case NPHY_RFSEQ_TX2RX: + trigger_mask = NPHY_RfseqTrigger_tx2rx; + status_mask = NPHY_RfseqStatus_tx2rx; + break; + case NPHY_RFSEQ_RESET2RX: + trigger_mask = NPHY_RfseqTrigger_reset2rx; + status_mask = NPHY_RfseqStatus_reset2rx; + break; + case NPHY_RFSEQ_UPDATEGAINH: + trigger_mask = NPHY_RfseqTrigger_updategainh; + status_mask = NPHY_RfseqStatus_updategainh; + break; + case NPHY_RFSEQ_UPDATEGAINL: + trigger_mask = NPHY_RfseqTrigger_updategainl; + status_mask = NPHY_RfseqStatus_updategainl; + break; + case NPHY_RFSEQ_UPDATEGAINU: + trigger_mask = NPHY_RfseqTrigger_updategainu; + status_mask = NPHY_RfseqStatus_updategainu; + break; + default: + return; + } + + orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); + or_phy_reg(pi, 0xa1, + (NPHY_RfseqMode_CoreActv_override | + NPHY_RfseqMode_Trigger_override)); + or_phy_reg(pi, 0xa3, trigger_mask); + SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); + write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); + WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); +} + +static void +wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *events, u8 *dlys, + u8 len) +{ + u32 t1_offset, t2_offset; + u8 ctr; + u8 end_event = + NREV_GE(pi->pubpi.phy_rev, + 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; + u8 end_dly = 1; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + t1_offset = cmd << 4; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, + events); + t2_offset = t1_offset + 0x080; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, + dlys); + + for (ctr = len; ctr < 16; ctr++) { + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, + t1_offset + ctr, 8, &end_event); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, + t2_offset + ctr, 8, &end_dly); + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset) +{ + u16 lpf_bw_ctl_val = 0; + u16 rx2tx_lpf_rc_lut_offset = 0; + + if (offset == 0) { + if (CHSPEC_IS40(pi->radio_chanspec)) { + rx2tx_lpf_rc_lut_offset = 0x159; + } else { + rx2tx_lpf_rc_lut_offset = 0x154; + } + } else { + rx2tx_lpf_rc_lut_offset = offset; + } + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, + (u32) rx2tx_lpf_rc_lut_offset, 16, + &lpf_bw_ctl_val); + + lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; + + return lpf_bw_ctl_val; +} + +static void +wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, + u8 core_mask, u8 off, u8 override_id) +{ + u8 core_num; + u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; + u8 val_shift = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + en_mask = field; + for (core_num = 0; core_num < 2; core_num++) { + if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { + + switch (field) { + case (0x1 << 2): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 1); + val_shift = 1; + break; + case (0x1 << 3): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 2); + val_shift = 2; + break; + case (0x1 << 4): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 4); + val_shift = 4; + break; + case (0x1 << 5): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 5); + val_shift = 5; + break; + case (0x1 << 6): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 6); + val_shift = 6; + break; + case (0x1 << 7): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : + 0x7d; + val_mask = (0x1 << 7); + val_shift = 7; + break; + case (0x1 << 10): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0xf8 : + 0xfa; + val_mask = (0x7 << 4); + val_shift = 4; + break; + case (0x1 << 11): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7b : + 0x7e; + val_mask = (0xffff << 0); + val_shift = 0; + break; + case (0x1 << 12): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7c : + 0x7f; + val_mask = (0xffff << 0); + val_shift = 0; + break; + case (0x3 << 13): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x348 : + 0x349; + val_mask = (0xff << 0); + val_shift = 0; + break; + case (0x1 << 13): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x348 : + 0x349; + val_mask = (0xf << 0); + val_shift = 0; + break; + default: + addr = 0xffff; + break; + } + } else if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID1) { + + switch (field) { + case (0x1 << 1): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 1); + val_shift = 1; + break; + case (0x1 << 3): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 3); + val_shift = 3; + break; + case (0x1 << 5): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 5); + val_shift = 5; + break; + case (0x1 << 4): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 4); + val_shift = 4; + break; + case (0x1 << 2): + + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 2); + val_shift = 2; + break; + case (0x1 << 7): + + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x7 << 8); + val_shift = 8; + break; + case (0x1 << 11): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 14); + val_shift = 14; + break; + case (0x1 << 10): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 13); + val_shift = 13; + break; + case (0x1 << 9): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 12); + val_shift = 12; + break; + case (0x1 << 8): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 11); + val_shift = 11; + break; + case (0x1 << 6): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 6); + val_shift = 6; + break; + case (0x1 << 0): + en_addr = (core_num == 0) ? 0x342 : + 0x343; + val_addr = (core_num == 0) ? 0x340 : + 0x341; + val_mask = (0x1 << 0); + val_shift = 0; + break; + default: + addr = 0xffff; + break; + } + } else if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID2) { + + switch (field) { + case (0x1 << 3): + en_addr = (core_num == 0) ? 0x346 : + 0x347; + val_addr = (core_num == 0) ? 0x344 : + 0x345; + val_mask = (0x1 << 3); + val_shift = 3; + break; + case (0x1 << 1): + en_addr = (core_num == 0) ? 0x346 : + 0x347; + val_addr = (core_num == 0) ? 0x344 : + 0x345; + val_mask = (0x1 << 1); + val_shift = 1; + break; + case (0x1 << 0): + en_addr = (core_num == 0) ? 0x346 : + 0x347; + val_addr = (core_num == 0) ? 0x344 : + 0x345; + val_mask = (0x1 << 0); + val_shift = 0; + break; + case (0x1 << 2): + en_addr = (core_num == 0) ? 0x346 : + 0x347; + val_addr = (core_num == 0) ? 0x344 : + 0x345; + val_mask = (0x1 << 2); + val_shift = 2; + break; + case (0x1 << 4): + en_addr = (core_num == 0) ? 0x346 : + 0x347; + val_addr = (core_num == 0) ? 0x344 : + 0x345; + val_mask = (0x1 << 4); + val_shift = 4; + break; + default: + addr = 0xffff; + break; + } + } + + if (off) { + and_phy_reg(pi, en_addr, ~en_mask); + and_phy_reg(pi, val_addr, ~val_mask); + } else { + + if ((core_mask == 0) + || (core_mask & (1 << core_num))) { + or_phy_reg(pi, en_addr, en_mask); + + if (addr != 0xffff) { + mod_phy_reg(pi, val_addr, + val_mask, + (value << + val_shift)); + } + } + } + } + } +} + +static void +wlc_phy_rfctrl_override_nphy(phy_info_t *pi, u16 field, u16 value, + u8 core_mask, u8 off) +{ + u8 core_num; + u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = + 0, val_mask = 0; + u8 shift = 0, val_shift = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { + + en_mask = field; + for (core_num = 0; core_num < 2; core_num++) { + + switch (field) { + case (0x1 << 1): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 0); + val_shift = 0; + break; + case (0x1 << 2): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 1); + val_shift = 1; + break; + case (0x1 << 3): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 2); + val_shift = 2; + break; + case (0x1 << 4): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 4); + val_shift = 4; + break; + case (0x1 << 5): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 5); + val_shift = 5; + break; + case (0x1 << 6): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 6); + val_shift = 6; + break; + case (0x1 << 7): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x1 << 7); + val_shift = 7; + break; + case (0x1 << 8): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x7 << 8); + val_shift = 8; + break; + case (0x1 << 11): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7a : 0x7d; + val_mask = (0x7 << 13); + val_shift = 13; + break; + + case (0x1 << 9): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0xf8 : 0xfa; + val_mask = (0x7 << 0); + val_shift = 0; + break; + + case (0x1 << 10): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0xf8 : 0xfa; + val_mask = (0x7 << 4); + val_shift = 4; + break; + + case (0x1 << 12): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7b : 0x7e; + val_mask = (0xffff << 0); + val_shift = 0; + break; + case (0x1 << 13): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0x7c : 0x7f; + val_mask = (0xffff << 0); + val_shift = 0; + break; + case (0x1 << 14): + en_addr = (core_num == 0) ? 0xe7 : 0xec; + val_addr = (core_num == 0) ? 0xf9 : 0xfb; + val_mask = (0x3 << 6); + val_shift = 6; + break; + case (0x1 << 0): + en_addr = (core_num == 0) ? 0xe5 : 0xe6; + val_addr = (core_num == 0) ? 0xf9 : 0xfb; + val_mask = (0x1 << 15); + val_shift = 15; + break; + default: + addr = 0xffff; + break; + } + + if (off) { + and_phy_reg(pi, en_addr, ~en_mask); + and_phy_reg(pi, val_addr, ~val_mask); + } else { + + if ((core_mask == 0) + || (core_mask & (1 << core_num))) { + or_phy_reg(pi, en_addr, en_mask); + + if (addr != 0xffff) { + mod_phy_reg(pi, val_addr, + val_mask, + (value << + val_shift)); + } + } + } + } + } else { + + if (off) { + and_phy_reg(pi, 0xec, ~field); + value = 0x0; + } else { + or_phy_reg(pi, 0xec, field); + } + + for (core_num = 0; core_num < 2; core_num++) { + + switch (field) { + case (0x1 << 1): + case (0x1 << 9): + case (0x1 << 12): + case (0x1 << 13): + case (0x1 << 14): + addr = 0x78; + + core_mask = 0x1; + break; + case (0x1 << 2): + case (0x1 << 3): + case (0x1 << 4): + case (0x1 << 5): + case (0x1 << 6): + case (0x1 << 7): + case (0x1 << 8): + addr = (core_num == 0) ? 0x7a : 0x7d; + break; + case (0x1 << 10): + addr = (core_num == 0) ? 0x7b : 0x7e; + break; + case (0x1 << 11): + addr = (core_num == 0) ? 0x7c : 0x7f; + break; + default: + addr = 0xffff; + } + + switch (field) { + case (0x1 << 1): + mask = (0x7 << 3); + shift = 3; + break; + case (0x1 << 9): + mask = (0x1 << 2); + shift = 2; + break; + case (0x1 << 12): + mask = (0x1 << 8); + shift = 8; + break; + case (0x1 << 13): + mask = (0x1 << 9); + shift = 9; + break; + case (0x1 << 14): + mask = (0xf << 12); + shift = 12; + break; + case (0x1 << 2): + mask = (0x1 << 0); + shift = 0; + break; + case (0x1 << 3): + mask = (0x1 << 1); + shift = 1; + break; + case (0x1 << 4): + mask = (0x1 << 2); + shift = 2; + break; + case (0x1 << 5): + mask = (0x3 << 4); + shift = 4; + break; + case (0x1 << 6): + mask = (0x3 << 6); + shift = 6; + break; + case (0x1 << 7): + mask = (0x1 << 8); + shift = 8; + break; + case (0x1 << 8): + mask = (0x1 << 9); + shift = 9; + break; + case (0x1 << 10): + mask = 0x1fff; + shift = 0x0; + break; + case (0x1 << 11): + mask = 0x1fff; + shift = 0x0; + break; + default: + mask = 0x0; + shift = 0x0; + break; + } + + if ((addr != 0xffff) && (core_mask & (1 << core_num))) { + mod_phy_reg(pi, addr, mask, (value << shift)); + } + } + + or_phy_reg(pi, 0xec, (0x1 << 0)); + or_phy_reg(pi, 0x78, (0x1 << 0)); + udelay(1); + and_phy_reg(pi, 0xec, ~(0x1 << 0)); + } +} + +static void +wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, u16 cmd, u16 value, + u8 core_mask, u8 off) +{ + u16 rfmxgain = 0, lpfgain = 0; + u16 tgain = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + switch (cmd) { + case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), + value, core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + break; + case NPHY_REV7_RfctrlOverride_cmd_rx_pu: + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), + value, core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + break; + case NPHY_REV7_RfctrlOverride_cmd_tx_pu: + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), + value, core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), value, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, + core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + break; + case NPHY_REV7_RfctrlOverride_cmd_rxgain: + rfmxgain = value & 0x000ff; + lpfgain = value & 0x0ff00; + lpfgain = lpfgain >> 8; + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), + rfmxgain, core_mask, + off, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x3 << 13), + lpfgain, core_mask, + off, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + break; + case NPHY_REV7_RfctrlOverride_cmd_txgain: + tgain = value & 0x7fff; + lpfgain = value & 0x8000; + lpfgain = lpfgain >> 14; + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), + tgain, core_mask, off, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 13), + lpfgain, core_mask, + off, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + break; + } + } +} + +static void +wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, u16 scale, s8 offset, + u8 coresel, u8 rail, u8 rssi_type) +{ + u16 valuetostuff; + + offset = (offset > NPHY_RSSICAL_MAXREAD) ? + NPHY_RSSICAL_MAXREAD : offset; + offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? + -NPHY_RSSICAL_MAXREAD - 1 : offset; + + valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) { + write_phy_reg(pi, 0x1a6, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) { + write_phy_reg(pi, 0x1ac, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) { + write_phy_reg(pi, 0x1b2, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) { + write_phy_reg(pi, 0x1b8, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) { + write_phy_reg(pi, 0x1a4, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) { + write_phy_reg(pi, 0x1aa, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) { + write_phy_reg(pi, 0x1b0, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) { + write_phy_reg(pi, 0x1b6, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) { + write_phy_reg(pi, 0x1a5, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) { + write_phy_reg(pi, 0x1ab, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) { + write_phy_reg(pi, 0x1b1, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) { + write_phy_reg(pi, 0x1b7, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) { + write_phy_reg(pi, 0x1a7, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) { + write_phy_reg(pi, 0x1ad, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) { + write_phy_reg(pi, 0x1b3, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) { + write_phy_reg(pi, 0x1b9, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) { + write_phy_reg(pi, 0x1a8, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) { + write_phy_reg(pi, 0x1ae, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) { + write_phy_reg(pi, 0x1b4, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) { + write_phy_reg(pi, 0x1ba, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) { + write_phy_reg(pi, 0x1a9, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) { + write_phy_reg(pi, 0x1b5, valuetostuff); + } + + if (((coresel == RADIO_MIMO_CORESEL_CORE1) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) { + write_phy_reg(pi, 0x1af, valuetostuff); + } + if (((coresel == RADIO_MIMO_CORESEL_CORE2) || + (coresel == RADIO_MIMO_CORESEL_ALLRX)) && + (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) { + write_phy_reg(pi, 0x1bb, valuetostuff); + } +} + +void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core_code, u8 rssi_type) +{ + u16 mask, val; + u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, + startseq; + u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, + rfctrlovr_trigger_val; + u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; + u16 rfctrlcmd_val, rfctrlovr_val; + u8 core; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (core_code == RADIO_MIMO_CORESEL_OFF) { + mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); + mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); + + mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); + mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); + + mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); + mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); + + mask = (0x1 << 2) | + (0x1 << 3) | (0x1 << 4) | (0x1 << 5); + mod_phy_reg(pi, 0xf9, mask, 0); + mod_phy_reg(pi, 0xfb, mask, 0); + + } else { + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (core_code == RADIO_MIMO_CORESEL_CORE1 + && core == PHY_CORE_1) + continue; + else if (core_code == RADIO_MIMO_CORESEL_CORE2 + && core == PHY_CORE_0) + continue; + + mod_phy_reg(pi, (core == PHY_CORE_0) ? + 0x8f : 0xa5, (0x1 << 9), 1 << 9); + + if (rssi_type == NPHY_RSSI_SEL_W1 || + rssi_type == NPHY_RSSI_SEL_W2 || + rssi_type == NPHY_RSSI_SEL_NB) { + + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 : 0xa7, + (0x3 << 8), 0); + + mask = (0x1 << 2) | + (0x1 << 3) | + (0x1 << 4) | (0x1 << 5); + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xf9 : 0xfb, + mask, 0); + + if (rssi_type == NPHY_RSSI_SEL_W1) { + if (CHSPEC_IS5G + (pi->radio_chanspec)) { + mask = (0x1 << 2); + val = 1 << 2; + } else { + mask = (0x1 << 3); + val = 1 << 3; + } + } else if (rssi_type == + NPHY_RSSI_SEL_W2) { + mask = (0x1 << 4); + val = 1 << 4; + } else { + mask = (0x1 << 5); + val = 1 << 5; + } + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xf9 : 0xfb, + mask, val); + + mask = (0x1 << 5); + val = 1 << 5; + mod_phy_reg(pi, (core == PHY_CORE_0) ? + 0xe5 : 0xe6, mask, val); + } else { + if (rssi_type == NPHY_RSSI_SEL_TBD) { + + mask = (0x3 << 8); + val = 1 << 8; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + mask = (0x3 << 10); + val = 1 << 10; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + } else if (rssi_type == + NPHY_RSSI_SEL_IQ) { + + mask = (0x3 << 8); + val = 2 << 8; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + mask = (0x3 << 10); + val = 2 << 10; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + } else { + + mask = (0x3 << 8); + val = 3 << 8; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + mask = (0x3 << 10); + val = 3 << 10; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xa6 + : 0xa7, mask, val); + + if (PHY_IPA(pi)) { + if (NREV_GE + (pi->pubpi.phy_rev, + 7)) { + + write_radio_reg + (pi, + ((core == + PHY_CORE_0) + ? + RADIO_2057_TX0_TX_SSI_MUX + : + RADIO_2057_TX1_TX_SSI_MUX), + (CHSPEC_IS5G + (pi-> + radio_chanspec) + ? 0xc : + 0xe)); + } else { + write_radio_reg + (pi, + RADIO_2056_TX_TX_SSI_MUX + | + ((core == + PHY_CORE_0) + ? + RADIO_2056_TX0 + : + RADIO_2056_TX1), + (CHSPEC_IS5G + (pi-> + radio_chanspec) + ? 0xc : + 0xe)); + } + } else { + + if (NREV_GE + (pi->pubpi.phy_rev, + 7)) { + write_radio_reg + (pi, + ((core == + PHY_CORE_0) + ? + RADIO_2057_TX0_TX_SSI_MUX + : + RADIO_2057_TX1_TX_SSI_MUX), + 0x11); + + if (pi->pubpi. + radioid == + BCM2057_ID) + write_radio_reg + (pi, + RADIO_2057_IQTEST_SEL_PU, + 0x1); + + } else { + write_radio_reg + (pi, + RADIO_2056_TX_TX_SSI_MUX + | + ((core == + PHY_CORE_0) + ? + RADIO_2056_TX0 + : + RADIO_2056_TX1), + 0x11); + } + } + + afectrlovr_rssi_val = 1 << 9; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x8f + : 0xa5, (0x1 << 9), + afectrlovr_rssi_val); + } + } + } + } + } else { + + if ((rssi_type == NPHY_RSSI_SEL_W1) || + (rssi_type == NPHY_RSSI_SEL_W2) || + (rssi_type == NPHY_RSSI_SEL_NB)) { + + val = 0x0; + } else if (rssi_type == NPHY_RSSI_SEL_TBD) { + + val = 0x1; + } else if (rssi_type == NPHY_RSSI_SEL_IQ) { + + val = 0x2; + } else { + + val = 0x3; + } + mask = ((0x3 << 12) | (0x3 << 14)); + val = (val << 12) | (val << 14); + mod_phy_reg(pi, 0xa6, mask, val); + mod_phy_reg(pi, 0xa7, mask, val); + + if ((rssi_type == NPHY_RSSI_SEL_W1) || + (rssi_type == NPHY_RSSI_SEL_W2) || + (rssi_type == NPHY_RSSI_SEL_NB)) { + if (rssi_type == NPHY_RSSI_SEL_W1) { + val = 0x1; + } + if (rssi_type == NPHY_RSSI_SEL_W2) { + val = 0x2; + } + if (rssi_type == NPHY_RSSI_SEL_NB) { + val = 0x3; + } + mask = (0x3 << 4); + val = (val << 4); + mod_phy_reg(pi, 0x7a, mask, val); + mod_phy_reg(pi, 0x7d, mask, val); + } + + if (core_code == RADIO_MIMO_CORESEL_OFF) { + afectrlovr_rssi_val = 0; + rfctrlcmd_rxen_val = 0; + rfctrlcmd_coresel_val = 0; + rfctrlovr_rssi_val = 0; + rfctrlovr_rxen_val = 0; + rfctrlovr_coresel_val = 0; + rfctrlovr_trigger_val = 0; + startseq = 0; + } else { + afectrlovr_rssi_val = 1; + rfctrlcmd_rxen_val = 1; + rfctrlcmd_coresel_val = core_code; + rfctrlovr_rssi_val = 1; + rfctrlovr_rxen_val = 1; + rfctrlovr_coresel_val = 1; + rfctrlovr_trigger_val = 1; + startseq = 1; + } + + afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); + afectrlovr_rssi_val = (afectrlovr_rssi_val << + 12) | (afectrlovr_rssi_val << 13); + mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, + afectrlovr_rssi_val); + + if ((rssi_type == NPHY_RSSI_SEL_W1) || + (rssi_type == NPHY_RSSI_SEL_W2) || + (rssi_type == NPHY_RSSI_SEL_NB)) { + rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); + rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | + (rfctrlcmd_coresel_val << 3); + + rfctrlovr_mask = ((0x1 << 5) | + (0x1 << 12) | + (0x1 << 1) | (0x1 << 0)); + rfctrlovr_val = (rfctrlovr_rssi_val << + 5) | + (rfctrlovr_rxen_val << 12) | + (rfctrlovr_coresel_val << 1) | + (rfctrlovr_trigger_val << 0); + + mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); + mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); + + mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); + udelay(20); + + mod_phy_reg(pi, 0xec, (0x1 << 0), 0); + } + } +} + +int +wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, s32 *rssi_buf, + u8 nsamps) +{ + s16 rssi0, rssi1; + u16 afectrlCore1_save = 0; + u16 afectrlCore2_save = 0; + u16 afectrlOverride1_save = 0; + u16 afectrlOverride2_save = 0; + u16 rfctrlOverrideAux0_save = 0; + u16 rfctrlOverrideAux1_save = 0; + u16 rfctrlMiscReg1_save = 0; + u16 rfctrlMiscReg2_save = 0; + u16 rfctrlcmd_save = 0; + u16 rfctrloverride_save = 0; + u16 rfctrlrssiothers1_save = 0; + u16 rfctrlrssiothers2_save = 0; + s8 tmp_buf[4]; + u8 ctr = 0, samp = 0; + s32 rssi_out_val; + u16 gpiosel_orig; + + afectrlCore1_save = read_phy_reg(pi, 0xa6); + afectrlCore2_save = read_phy_reg(pi, 0xa7); + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); + rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); + afectrlOverride1_save = read_phy_reg(pi, 0x8f); + afectrlOverride2_save = read_phy_reg(pi, 0xa5); + rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); + rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); + } else { + afectrlOverride1_save = read_phy_reg(pi, 0xa5); + rfctrlcmd_save = read_phy_reg(pi, 0x78); + rfctrloverride_save = read_phy_reg(pi, 0xec); + rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); + rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); + } + + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); + + gpiosel_orig = read_phy_reg(pi, 0xca); + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + write_phy_reg(pi, 0xca, 5); + } + + for (ctr = 0; ctr < 4; ctr++) { + rssi_buf[ctr] = 0; + } + + for (samp = 0; samp < nsamps; samp++) { + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + rssi0 = read_phy_reg(pi, 0x1c9); + rssi1 = read_phy_reg(pi, 0x1ca); + } else { + rssi0 = read_phy_reg(pi, 0x219); + rssi1 = read_phy_reg(pi, 0x21a); + } + + ctr = 0; + tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; + tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; + tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; + tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; + + for (ctr = 0; ctr < 4; ctr++) { + rssi_buf[ctr] += tmp_buf[ctr]; + } + + } + + rssi_out_val = rssi_buf[3] & 0xff; + rssi_out_val |= (rssi_buf[2] & 0xff) << 8; + rssi_out_val |= (rssi_buf[1] & 0xff) << 16; + rssi_out_val |= (rssi_buf[0] & 0xff) << 24; + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + write_phy_reg(pi, 0xca, gpiosel_orig); + } + + write_phy_reg(pi, 0xa6, afectrlCore1_save); + write_phy_reg(pi, 0xa7, afectrlCore2_save); + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); + write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); + write_phy_reg(pi, 0x8f, afectrlOverride1_save); + write_phy_reg(pi, 0xa5, afectrlOverride2_save); + write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); + write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); + } else { + write_phy_reg(pi, 0xa5, afectrlOverride1_save); + write_phy_reg(pi, 0x78, rfctrlcmd_save); + write_phy_reg(pi, 0xec, rfctrloverride_save); + write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); + write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); + } + + return rssi_out_val; +} + +s16 wlc_phy_tempsense_nphy(phy_info_t *pi) +{ + u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; + u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; + u16 pwrdet_rxtx_core1_save; + u16 pwrdet_rxtx_core2_save; + u16 afectrlCore1_save; + u16 afectrlCore2_save; + u16 afectrlOverride_save; + u16 afectrlOverride2_save; + u16 pd_pll_ts_save; + u16 gpioSel_save; + s32 radio_temp[4]; + s32 radio_temp2[4]; + u16 syn_tempprocsense_save; + s16 offset = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; + u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; + u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; + s32 auxADC_Vl; + u16 RfctrlOverride5_save, RfctrlOverride6_save; + u16 RfctrlMiscReg5_save, RfctrlMiscReg6_save; + u16 RSSIMultCoef0QPowerDet_save; + u16 tempsense_Rcal; + + syn_tempprocsense_save = + read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); + + afectrlCore1_save = read_phy_reg(pi, 0xa6); + afectrlCore2_save = read_phy_reg(pi, 0xa7); + afectrlOverride_save = read_phy_reg(pi, 0x8f); + afectrlOverride2_save = read_phy_reg(pi, 0xa5); + RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); + RfctrlOverride5_save = read_phy_reg(pi, 0x346); + RfctrlOverride6_save = read_phy_reg(pi, 0x347); + RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); + RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, + &auxADC_Vmid_save); + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, + &auxADC_Av_save); + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, + &auxADC_rssi_ctrlL_save); + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, + &auxADC_rssi_ctrlH_save); + + write_phy_reg(pi, 0x1ae, 0x0); + + auxADC_rssi_ctrlL = 0x0; + auxADC_rssi_ctrlH = 0x20; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, + &auxADC_rssi_ctrlL); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, + &auxADC_rssi_ctrlH); + + tempsense_Rcal = syn_tempprocsense_save & 0x1c; + + write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, + tempsense_Rcal | 0x01); + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), + 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); + mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); + mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); + mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); + + mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); + udelay(5); + mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); + mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); + mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); + mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); + mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); + mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); + mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); + mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); + mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); + mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); + + auxADC_Vmid = 0xA3; + auxADC_Av = 0x0; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, + &auxADC_Vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, + &auxADC_Av); + + udelay(3); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); + write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, + tempsense_Rcal | 0x03); + + udelay(5); + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); + + auxADC_Av = 0x7; + if (radio_temp[1] + radio_temp2[1] < -30) { + auxADC_Vmid = 0x45; + auxADC_Vl = 263; + } else if (radio_temp[1] + radio_temp2[1] < -9) { + auxADC_Vmid = 0x200; + auxADC_Vl = 467; + } else if (radio_temp[1] + radio_temp2[1] < 11) { + auxADC_Vmid = 0x266; + auxADC_Vl = 634; + } else { + auxADC_Vmid = 0x2D5; + auxADC_Vl = 816; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, + &auxADC_Vmid); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, + &auxADC_Av); + + udelay(3); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); + write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, + tempsense_Rcal | 0x01); + + udelay(5); + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); + + write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, + syn_tempprocsense_save); + + write_phy_reg(pi, 0xa6, afectrlCore1_save); + write_phy_reg(pi, 0xa7, afectrlCore2_save); + write_phy_reg(pi, 0x8f, afectrlOverride_save); + write_phy_reg(pi, 0xa5, afectrlOverride2_save); + write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); + write_phy_reg(pi, 0x346, RfctrlOverride5_save); + write_phy_reg(pi, 0x347, RfctrlOverride6_save); + write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); + write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, + &auxADC_Vmid_save); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, + &auxADC_Av_save); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, + &auxADC_rssi_ctrlL_save); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, + &auxADC_rssi_ctrlH_save); + + if (pi->sh->chip == BCM5357_CHIP_ID) { + radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) + + 88 * (auxADC_Vl) - 27111 + + 128) / 256; + } else if (pi->sh->chip == BCM43236_CHIP_ID) { + radio_temp[0] = (198 * (radio_temp[1] + radio_temp2[1]) + + 91 * (auxADC_Vl) - 27243 + + 128) / 256; + } else { + radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) + + 82 * (auxADC_Vl) - 28861 + + 128) / 256; + } + + offset = (s16) pi->phy_tempsense_offset; + + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + syn_tempprocsense_save = + read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); + + afectrlCore1_save = read_phy_reg(pi, 0xa6); + afectrlCore2_save = read_phy_reg(pi, 0xa7); + afectrlOverride_save = read_phy_reg(pi, 0x8f); + afectrlOverride2_save = read_phy_reg(pi, 0xa5); + gpioSel_save = read_phy_reg(pi, 0xca); + + write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + } else { + write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); + } + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); + } else { + write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); + } + + radio_temp[0] = + (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; + + write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, + syn_tempprocsense_save); + + write_phy_reg(pi, 0xca, gpioSel_save); + write_phy_reg(pi, 0xa6, afectrlCore1_save); + write_phy_reg(pi, 0xa7, afectrlCore2_save); + write_phy_reg(pi, 0x8f, afectrlOverride_save); + write_phy_reg(pi, 0xa5, afectrlOverride2_save); + + offset = (s16) pi->phy_tempsense_offset; + } else { + + pwrdet_rxtx_core1_save = + read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); + pwrdet_rxtx_core2_save = + read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); + core1_txrf_iqcal1_save = + read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); + core1_txrf_iqcal2_save = + read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); + core2_txrf_iqcal1_save = + read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); + core2_txrf_iqcal2_save = + read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); + pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); + + afectrlCore1_save = read_phy_reg(pi, 0xa6); + afectrlCore2_save = read_phy_reg(pi, 0xa7); + afectrlOverride_save = read_phy_reg(pi, 0xa5); + gpioSel_save = read_phy_reg(pi, 0xca); + + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); + write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); + xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); + xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); + xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); + + radio_temp[0] = (radio_temp[0] + radio_temp2[0]); + radio_temp[1] = (radio_temp[1] + radio_temp2[1]); + radio_temp[2] = (radio_temp[2] + radio_temp2[2]); + radio_temp[3] = (radio_temp[3] + radio_temp2[3]); + + radio_temp[0] = + (radio_temp[0] + radio_temp[1] + radio_temp[2] + + radio_temp[3]); + + radio_temp[0] = + (radio_temp[0] + (8 * 32)) * (950 - 350) / 63 + (350 * 8); + + radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; + + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, + pwrdet_rxtx_core1_save); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, + pwrdet_rxtx_core2_save); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, + core1_txrf_iqcal1_save); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, + core2_txrf_iqcal1_save); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, + core1_txrf_iqcal2_save); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, + core2_txrf_iqcal2_save); + write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); + + write_phy_reg(pi, 0xca, gpioSel_save); + write_phy_reg(pi, 0xa6, afectrlCore1_save); + write_phy_reg(pi, 0xa7, afectrlCore2_save); + write_phy_reg(pi, 0xa5, afectrlOverride_save); + } + + return (s16) radio_temp[0] + offset; +} + +static void +wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, u8 rssi_type, u8 *vcm_buf) +{ + u8 core; + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (rssi_type == NPHY_RSSI_SEL_NB) { + if (core == PHY_CORE_0) { + mod_radio_reg(pi, + RADIO_2055_CORE1_B0_NBRSSI_VCM, + RADIO_2055_NBRSSI_VCM_I_MASK, + vcm_buf[2 * + core] << + RADIO_2055_NBRSSI_VCM_I_SHIFT); + mod_radio_reg(pi, + RADIO_2055_CORE1_RXBB_RSSI_CTRL5, + RADIO_2055_NBRSSI_VCM_Q_MASK, + vcm_buf[2 * core + + 1] << + RADIO_2055_NBRSSI_VCM_Q_SHIFT); + } else { + mod_radio_reg(pi, + RADIO_2055_CORE2_B0_NBRSSI_VCM, + RADIO_2055_NBRSSI_VCM_I_MASK, + vcm_buf[2 * + core] << + RADIO_2055_NBRSSI_VCM_I_SHIFT); + mod_radio_reg(pi, + RADIO_2055_CORE2_RXBB_RSSI_CTRL5, + RADIO_2055_NBRSSI_VCM_Q_MASK, + vcm_buf[2 * core + + 1] << + RADIO_2055_NBRSSI_VCM_Q_SHIFT); + } + } else { + + if (core == PHY_CORE_0) { + mod_radio_reg(pi, + RADIO_2055_CORE1_RXBB_RSSI_CTRL5, + RADIO_2055_WBRSSI_VCM_IQ_MASK, + vcm_buf[2 * + core] << + RADIO_2055_WBRSSI_VCM_IQ_SHIFT); + } else { + mod_radio_reg(pi, + RADIO_2055_CORE2_RXBB_RSSI_CTRL5, + RADIO_2055_WBRSSI_VCM_IQ_MASK, + vcm_buf[2 * + core] << + RADIO_2055_WBRSSI_VCM_IQ_SHIFT); + } + } + } +} + +void wlc_phy_rssi_cal_nphy(phy_info_t *pi) +{ + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + wlc_phy_rssi_cal_nphy_rev3(pi); + } else { + wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); + wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); + wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); + } +} + +static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type) +{ + s32 target_code; + u16 classif_state; + u16 clip_state[2]; + u16 rssi_ctrl_state[2], pd_state[2]; + u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; + u16 rfctrlintc_override_val; + u16 clip_off[] = { 0xffff, 0xffff }; + u16 rf_pd_val, pd_mask, rssi_ctrl_mask; + u8 vcm, min_vcm, vcm_tmp[4]; + u8 vcm_final[4] = { 0, 0, 0, 0 }; + u8 result_idx, ctr; + s32 poll_results[4][4] = { + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0} + }; + s32 poll_miniq[4][2] = { + {0, 0}, + {0, 0}, + {0, 0}, + {0, 0} + }; + s32 min_d, curr_d; + s32 fine_digital_offset[4]; + s32 poll_results_min[4] = { 0, 0, 0, 0 }; + s32 min_poll; + + switch (rssi_type) { + case NPHY_RSSI_SEL_NB: + target_code = NPHY_RSSICAL_NB_TARGET; + break; + case NPHY_RSSI_SEL_W1: + target_code = NPHY_RSSICAL_W1_TARGET; + break; + case NPHY_RSSI_SEL_W2: + target_code = NPHY_RSSICAL_W2_TARGET; + break; + default: + return; + break; + } + + classif_state = wlc_phy_classifier_nphy(pi, 0, 0); + wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); + wlc_phy_clip_det_nphy(pi, 0, clip_state); + wlc_phy_clip_det_nphy(pi, 1, clip_off); + + rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; + rfctrlintc_override_val = + CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; + + rfctrlintc_state[0] = read_phy_reg(pi, 0x91); + rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); + write_phy_reg(pi, 0x91, rfctrlintc_override_val); + write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); + + rfctrlintc_state[1] = read_phy_reg(pi, 0x92); + rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); + write_phy_reg(pi, 0x92, rfctrlintc_override_val); + write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); + + pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | + RADIO_2055_WBRSSI_G2_PD; + pd_state[0] = + read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; + pd_state[1] = + read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; + mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); + mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); + rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | + RADIO_2055_WBRSSI_G2_SEL; + rssi_ctrl_state[0] = + read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; + rssi_ctrl_state[1] = + read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, + NPHY_RAIL_I, rssi_type); + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, + NPHY_RAIL_Q, rssi_type); + + for (vcm = 0; vcm < 4; vcm++) { + + vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; + if (rssi_type != NPHY_RSSI_SEL_W2) { + wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); + } + + wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], + NPHY_RSSICAL_NPOLL); + + if ((rssi_type == NPHY_RSSI_SEL_W1) + || (rssi_type == NPHY_RSSI_SEL_W2)) { + for (ctr = 0; ctr < 2; ctr++) { + poll_miniq[vcm][ctr] = + min(poll_results[vcm][ctr * 2 + 0], + poll_results[vcm][ctr * 2 + 1]); + } + } + } + + for (result_idx = 0; result_idx < 4; result_idx++) { + min_d = NPHY_RSSICAL_MAXD; + min_vcm = 0; + min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; + for (vcm = 0; vcm < 4; vcm++) { + curr_d = ABS(((rssi_type == NPHY_RSSI_SEL_NB) ? + poll_results[vcm][result_idx] : + poll_miniq[vcm][result_idx / 2]) - + (target_code * NPHY_RSSICAL_NPOLL)); + if (curr_d < min_d) { + min_d = curr_d; + min_vcm = vcm; + } + if (poll_results[vcm][result_idx] < min_poll) { + min_poll = poll_results[vcm][result_idx]; + } + } + vcm_final[result_idx] = min_vcm; + poll_results_min[result_idx] = min_poll; + } + + if (rssi_type != NPHY_RSSI_SEL_W2) { + wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); + } + + for (result_idx = 0; result_idx < 4; result_idx++) { + fine_digital_offset[result_idx] = + (target_code * NPHY_RSSICAL_NPOLL) - + poll_results[vcm_final[result_idx]][result_idx]; + if (fine_digital_offset[result_idx] < 0) { + fine_digital_offset[result_idx] = + ABS(fine_digital_offset[result_idx]); + fine_digital_offset[result_idx] += + (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; + fine_digital_offset[result_idx] = + -fine_digital_offset[result_idx]; + } else { + fine_digital_offset[result_idx] += + (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; + } + + if (poll_results_min[result_idx] == + NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) { + fine_digital_offset[result_idx] = + (target_code - NPHY_RSSICAL_MAXREAD - 1); + } + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, + (s8) + fine_digital_offset[result_idx], + (result_idx / 2 == + 0) ? RADIO_MIMO_CORESEL_CORE1 : + RADIO_MIMO_CORESEL_CORE2, + (result_idx % 2 == + 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, + rssi_type); + } + + mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); + mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); + if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, + NPHY_RSSI_SEL_NB); + } else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, + NPHY_RSSI_SEL_W1); + } else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G2_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, + NPHY_RSSI_SEL_W2); + } else { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, + NPHY_RSSI_SEL_W2); + } + if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, + NPHY_RSSI_SEL_NB); + } else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, + NPHY_RSSI_SEL_W1); + } else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G2_SEL) { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, + NPHY_RSSI_SEL_W2); + } else { + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, + NPHY_RSSI_SEL_W2); + } + + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); + + write_phy_reg(pi, 0x91, rfctrlintc_state[0]); + write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); + write_phy_reg(pi, 0x92, rfctrlintc_state[1]); + write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); + + wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); + wlc_phy_clip_det_nphy(pi, 1, clip_state); + + wlc_phy_resetcca_nphy(pi); +} + +int +wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh) +{ + d11rxhdr_t *rxh = &wlc_rxh->rxhdr; + s16 rxpwr, rxpwr0, rxpwr1; + s16 phyRx0_l, phyRx2_l; + + rxpwr = 0; + rxpwr0 = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR0_MASK; + rxpwr1 = (le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR1_MASK) >> 8; + + if (rxpwr0 > 127) + rxpwr0 -= 256; + if (rxpwr1 > 127) + rxpwr1 -= 256; + + phyRx0_l = le16_to_cpu(rxh->PhyRxStatus_0) & 0x00ff; + phyRx2_l = le16_to_cpu(rxh->PhyRxStatus_2) & 0x00ff; + if (phyRx2_l > 127) + phyRx2_l -= 256; + + if (((rxpwr0 == 16) || (rxpwr0 == 32))) { + rxpwr0 = rxpwr1; + rxpwr1 = phyRx2_l; + } + + wlc_rxh->rxpwr[0] = (s8) rxpwr0; + wlc_rxh->rxpwr[1] = (s8) rxpwr1; + wlc_rxh->do_rssi_ma = 0; + + if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) + rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; + else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) + rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; + else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) + rxpwr = (rxpwr0 + rxpwr1) >> 1; + + return rxpwr; +} + +static void +wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, u8 field, u16 value, + u8 core_code) +{ + u16 mask; + u16 val; + u8 core; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (core_code == RADIO_MIMO_CORESEL_CORE1 + && core == PHY_CORE_1) + continue; + else if (core_code == RADIO_MIMO_CORESEL_CORE2 + && core == PHY_CORE_0) + continue; + + if (NREV_LT(pi->pubpi.phy_rev, 7)) { + + mask = (0x1 << 10); + val = 1 << 10; + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : + 0x92, mask, val); + } + + if (field == NPHY_RfctrlIntc_override_OFF) { + + write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : + 0x92, 0); + + wlc_phy_force_rfseq_nphy(pi, + NPHY_RFSEQ_RESET2RX); + } else if (field == NPHY_RfctrlIntc_override_TRSW) { + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + mask = (0x1 << 6) | (0x1 << 7); + + val = value << 6; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + + or_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + (0x1 << 10)); + + and_phy_reg(pi, 0x2ff, (u16) + ~(0x3 << 14)); + or_phy_reg(pi, 0x2ff, (0x1 << 13)); + or_phy_reg(pi, 0x2ff, (0x1 << 0)); + } else { + + mask = (0x1 << 6) | + (0x1 << 7) | + (0x1 << 8) | (0x1 << 9); + val = value << 6; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + + mask = (0x1 << 0); + val = 1 << 0; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xe7 : 0xec, + mask, val); + + mask = (core == PHY_CORE_0) ? (0x1 << 0) + : (0x1 << 1); + val = 1 << ((core == PHY_CORE_0) ? + 0 : 1); + mod_phy_reg(pi, 0x78, mask, val); + + SPINWAIT(((read_phy_reg(pi, 0x78) & val) + != 0), 10000); + if (WARN(read_phy_reg(pi, 0x78) & val, + "HW error: override failed")) + return; + + mask = (0x1 << 0); + val = 0 << 0; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xe7 : 0xec, + mask, val); + } + } else if (field == NPHY_RfctrlIntc_override_PA) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + mask = (0x1 << 4) | (0x1 << 5); + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + val = value << 5; + } else { + val = value << 4; + } + + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + + or_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + (0x1 << 12)); + } else { + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + mask = (0x1 << 5); + val = value << 5; + } else { + mask = (0x1 << 4); + val = value << 4; + } + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + } + } else if (field == NPHY_RfctrlIntc_override_EXT_LNA_PU) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + + mask = (0x1 << 0); + val = value << 0; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, val); + + mask = (0x1 << 2); + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, 0); + } else { + + mask = (0x1 << 2); + val = value << 2; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, val); + + mask = (0x1 << 0); + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, 0); + } + + mask = (0x1 << 11); + val = 1 << 11; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + } else { + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + mask = (0x1 << 0); + val = value << 0; + } else { + mask = (0x1 << 2); + val = value << 2; + } + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + } + } else if (field == + NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + + mask = (0x1 << 1); + val = value << 1; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, val); + + mask = (0x1 << 3); + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, 0); + } else { + + mask = (0x1 << 3); + val = value << 3; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, val); + + mask = (0x1 << 1); + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 + : 0x92, mask, 0); + } + + mask = (0x1 << 11); + val = 1 << 11; + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + } else { + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + mask = (0x1 << 1); + val = value << 1; + } else { + mask = (0x1 << 3); + val = value << 3; + } + mod_phy_reg(pi, + (core == + PHY_CORE_0) ? 0x91 : 0x92, + mask, val); + } + } + } + } else { + return; + } +} + +static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) +{ + u16 classif_state; + u16 clip_state[2]; + u16 clip_off[] = { 0xffff, 0xffff }; + s32 target_code; + u8 vcm, min_vcm; + u8 vcm_final = 0; + u8 result_idx; + s32 poll_results[8][4] = { + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0} + }; + s32 poll_result_core[4] = { 0, 0, 0, 0 }; + s32 min_d = NPHY_RSSICAL_MAXD, curr_d; + s32 fine_digital_offset[4]; + s32 poll_results_min[4] = { 0, 0, 0, 0 }; + s32 min_poll; + u8 vcm_level_max; + u8 core; + u8 wb_cnt; + u8 rssi_type; + u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; + u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; + u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; + u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; + u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; + u16 NPHY_RfctrlCmd_save; + u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; + u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; + u8 rxcore_state; + u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; + u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; + u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; + u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; + + NPHY_REV7_RfctrlOverride3_save = NPHY_REV7_RfctrlOverride4_save = + NPHY_REV7_RfctrlOverride5_save = NPHY_REV7_RfctrlOverride6_save = + NPHY_REV7_RfctrlMiscReg3_save = NPHY_REV7_RfctrlMiscReg4_save = + NPHY_REV7_RfctrlMiscReg5_save = NPHY_REV7_RfctrlMiscReg6_save = 0; + + classif_state = wlc_phy_classifier_nphy(pi, 0, 0); + wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); + wlc_phy_clip_det_nphy(pi, 0, clip_state); + wlc_phy_clip_det_nphy(pi, 1, clip_off); + + NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); + NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); + NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); + NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); + NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); + NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); + NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); + NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); + NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); + NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); + NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); + } + NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); + NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); + NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); + NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); + NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); + NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); + NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); + NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); + } + NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); + NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); + + wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, + RADIO_MIMO_CORESEL_ALLRXTX); + wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, + RADIO_MIMO_CORESEL_ALLRXTX); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, + 0, 0, 0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_rx_pu, + 1, 0, 0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), + 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), + 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0, + 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); + } + + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), + 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 1, 0, + 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); + } + } + + rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); + + vcm_level_max = 8; + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + if ((rxcore_state & (1 << core)) == 0) + continue; + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, + core == + PHY_CORE_0 ? + RADIO_MIMO_CORESEL_CORE1 : + RADIO_MIMO_CORESEL_CORE2, + NPHY_RAIL_I, NPHY_RSSI_SEL_NB); + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, + core == + PHY_CORE_0 ? + RADIO_MIMO_CORESEL_CORE1 : + RADIO_MIMO_CORESEL_CORE2, + NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); + + for (vcm = 0; vcm < vcm_level_max; vcm++) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + mod_radio_reg(pi, (core == PHY_CORE_0) ? + RADIO_2057_NB_MASTER_CORE0 : + RADIO_2057_NB_MASTER_CORE1, + RADIO_2057_VCM_MASK, vcm); + } else { + + mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | + ((core == + PHY_CORE_0) ? RADIO_2056_RX0 : + RADIO_2056_RX1), + RADIO_2056_VCM_MASK, + vcm << RADIO_2056_RSSI_VCM_SHIFT); + } + + wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, + &poll_results[vcm][0], + NPHY_RSSICAL_NPOLL); + } + + for (result_idx = 0; result_idx < 4; result_idx++) { + if ((core == result_idx / 2) && (result_idx % 2 == 0)) { + + min_d = NPHY_RSSICAL_MAXD; + min_vcm = 0; + min_poll = + NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + + 1; + for (vcm = 0; vcm < vcm_level_max; vcm++) { + curr_d = poll_results[vcm][result_idx] * + poll_results[vcm][result_idx] + + poll_results[vcm][result_idx + 1] * + poll_results[vcm][result_idx + 1]; + if (curr_d < min_d) { + min_d = curr_d; + min_vcm = vcm; + } + if (poll_results[vcm][result_idx] < + min_poll) { + min_poll = + poll_results[vcm] + [result_idx]; + } + } + vcm_final = min_vcm; + poll_results_min[result_idx] = min_poll; + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_radio_reg(pi, (core == PHY_CORE_0) ? + RADIO_2057_NB_MASTER_CORE0 : + RADIO_2057_NB_MASTER_CORE1, + RADIO_2057_VCM_MASK, vcm_final); + } else { + mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | + ((core == + PHY_CORE_0) ? RADIO_2056_RX0 : + RADIO_2056_RX1), RADIO_2056_VCM_MASK, + vcm_final << RADIO_2056_RSSI_VCM_SHIFT); + } + + for (result_idx = 0; result_idx < 4; result_idx++) { + if (core == result_idx / 2) { + fine_digital_offset[result_idx] = + (NPHY_RSSICAL_NB_TARGET * + NPHY_RSSICAL_NPOLL) - + poll_results[vcm_final][result_idx]; + if (fine_digital_offset[result_idx] < 0) { + fine_digital_offset[result_idx] = + ABS(fine_digital_offset + [result_idx]); + fine_digital_offset[result_idx] += + (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] /= + NPHY_RSSICAL_NPOLL; + fine_digital_offset[result_idx] = + -fine_digital_offset[result_idx]; + } else { + fine_digital_offset[result_idx] += + (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] /= + NPHY_RSSICAL_NPOLL; + } + + if (poll_results_min[result_idx] == + NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) { + fine_digital_offset[result_idx] = + (NPHY_RSSICAL_NB_TARGET - + NPHY_RSSICAL_MAXREAD - 1); + } + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, + (s8) + fine_digital_offset + [result_idx], + (result_idx / + 2 == + 0) ? + RADIO_MIMO_CORESEL_CORE1 + : + RADIO_MIMO_CORESEL_CORE2, + (result_idx % + 2 == + 0) ? NPHY_RAIL_I + : NPHY_RAIL_Q, + NPHY_RSSI_SEL_NB); + } + } + + } + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + if ((rxcore_state & (1 << core)) == 0) + continue; + + for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { + if (wb_cnt == 0) { + rssi_type = NPHY_RSSI_SEL_W1; + target_code = NPHY_RSSICAL_W1_TARGET_REV3; + } else { + rssi_type = NPHY_RSSI_SEL_W2; + target_code = NPHY_RSSICAL_W2_TARGET_REV3; + } + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, + core == + PHY_CORE_0 ? + RADIO_MIMO_CORESEL_CORE1 + : + RADIO_MIMO_CORESEL_CORE2, + NPHY_RAIL_I, rssi_type); + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, + core == + PHY_CORE_0 ? + RADIO_MIMO_CORESEL_CORE1 + : + RADIO_MIMO_CORESEL_CORE2, + NPHY_RAIL_Q, rssi_type); + + wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, + NPHY_RSSICAL_NPOLL); + + for (result_idx = 0; result_idx < 4; result_idx++) { + if (core == result_idx / 2) { + fine_digital_offset[result_idx] = + (target_code * NPHY_RSSICAL_NPOLL) - + poll_result_core[result_idx]; + if (fine_digital_offset[result_idx] < 0) { + fine_digital_offset[result_idx] + = + ABS(fine_digital_offset + [result_idx]); + fine_digital_offset[result_idx] + += (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] + /= NPHY_RSSICAL_NPOLL; + fine_digital_offset[result_idx] + = + -fine_digital_offset + [result_idx]; + } else { + fine_digital_offset[result_idx] + += (NPHY_RSSICAL_NPOLL / 2); + fine_digital_offset[result_idx] + /= NPHY_RSSICAL_NPOLL; + } + + wlc_phy_scale_offset_rssi_nphy(pi, 0x0, + (s8) + fine_digital_offset + [core * + 2], + (core == + PHY_CORE_0) + ? + RADIO_MIMO_CORESEL_CORE1 + : + RADIO_MIMO_CORESEL_CORE2, + (result_idx + % 2 == + 0) ? + NPHY_RAIL_I + : + NPHY_RAIL_Q, + rssi_type); + } + } + + } + } + + write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); + write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); + + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + + mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); + + mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); + mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); + mod_phy_reg(pi, 0xec, (0x1 << 0), 0); + + write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); + write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); + write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); + write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); + write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); + write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); + write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); + write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); + write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); + } + write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); + write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); + write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); + write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); + write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); + write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); + write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); + write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); + } + write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); + write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + pi->rssical_cache.rssical_radio_regs_2G[0] = + read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); + pi->rssical_cache.rssical_radio_regs_2G[1] = + read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); + } else { + pi->rssical_cache.rssical_radio_regs_2G[0] = + read_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | + RADIO_2056_RX0); + pi->rssical_cache.rssical_radio_regs_2G[1] = + read_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | + RADIO_2056_RX1); + } + + pi->rssical_cache.rssical_phyregs_2G[0] = + read_phy_reg(pi, 0x1a6); + pi->rssical_cache.rssical_phyregs_2G[1] = + read_phy_reg(pi, 0x1ac); + pi->rssical_cache.rssical_phyregs_2G[2] = + read_phy_reg(pi, 0x1b2); + pi->rssical_cache.rssical_phyregs_2G[3] = + read_phy_reg(pi, 0x1b8); + pi->rssical_cache.rssical_phyregs_2G[4] = + read_phy_reg(pi, 0x1a4); + pi->rssical_cache.rssical_phyregs_2G[5] = + read_phy_reg(pi, 0x1aa); + pi->rssical_cache.rssical_phyregs_2G[6] = + read_phy_reg(pi, 0x1b0); + pi->rssical_cache.rssical_phyregs_2G[7] = + read_phy_reg(pi, 0x1b6); + pi->rssical_cache.rssical_phyregs_2G[8] = + read_phy_reg(pi, 0x1a5); + pi->rssical_cache.rssical_phyregs_2G[9] = + read_phy_reg(pi, 0x1ab); + pi->rssical_cache.rssical_phyregs_2G[10] = + read_phy_reg(pi, 0x1b1); + pi->rssical_cache.rssical_phyregs_2G[11] = + read_phy_reg(pi, 0x1b7); + + pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + pi->rssical_cache.rssical_radio_regs_5G[0] = + read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); + pi->rssical_cache.rssical_radio_regs_5G[1] = + read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); + } else { + pi->rssical_cache.rssical_radio_regs_5G[0] = + read_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | + RADIO_2056_RX0); + pi->rssical_cache.rssical_radio_regs_5G[1] = + read_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | + RADIO_2056_RX1); + } + + pi->rssical_cache.rssical_phyregs_5G[0] = + read_phy_reg(pi, 0x1a6); + pi->rssical_cache.rssical_phyregs_5G[1] = + read_phy_reg(pi, 0x1ac); + pi->rssical_cache.rssical_phyregs_5G[2] = + read_phy_reg(pi, 0x1b2); + pi->rssical_cache.rssical_phyregs_5G[3] = + read_phy_reg(pi, 0x1b8); + pi->rssical_cache.rssical_phyregs_5G[4] = + read_phy_reg(pi, 0x1a4); + pi->rssical_cache.rssical_phyregs_5G[5] = + read_phy_reg(pi, 0x1aa); + pi->rssical_cache.rssical_phyregs_5G[6] = + read_phy_reg(pi, 0x1b0); + pi->rssical_cache.rssical_phyregs_5G[7] = + read_phy_reg(pi, 0x1b6); + pi->rssical_cache.rssical_phyregs_5G[8] = + read_phy_reg(pi, 0x1a5); + pi->rssical_cache.rssical_phyregs_5G[9] = + read_phy_reg(pi, 0x1ab); + pi->rssical_cache.rssical_phyregs_5G[10] = + read_phy_reg(pi, 0x1b1); + pi->rssical_cache.rssical_phyregs_5G[11] = + read_phy_reg(pi, 0x1b7); + + pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; + } + + wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); + wlc_phy_clip_det_nphy(pi, 1, clip_state); +} + +static void wlc_phy_restore_rssical_nphy(phy_info_t *pi) +{ + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->nphy_rssical_chanspec_2G == 0) + return; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, + RADIO_2057_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_2G[0]); + mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, + RADIO_2057_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_2G[1]); + } else { + mod_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, + RADIO_2056_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_2G[0]); + mod_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, + RADIO_2056_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_2G[1]); + } + + write_phy_reg(pi, 0x1a6, + pi->rssical_cache.rssical_phyregs_2G[0]); + write_phy_reg(pi, 0x1ac, + pi->rssical_cache.rssical_phyregs_2G[1]); + write_phy_reg(pi, 0x1b2, + pi->rssical_cache.rssical_phyregs_2G[2]); + write_phy_reg(pi, 0x1b8, + pi->rssical_cache.rssical_phyregs_2G[3]); + write_phy_reg(pi, 0x1a4, + pi->rssical_cache.rssical_phyregs_2G[4]); + write_phy_reg(pi, 0x1aa, + pi->rssical_cache.rssical_phyregs_2G[5]); + write_phy_reg(pi, 0x1b0, + pi->rssical_cache.rssical_phyregs_2G[6]); + write_phy_reg(pi, 0x1b6, + pi->rssical_cache.rssical_phyregs_2G[7]); + write_phy_reg(pi, 0x1a5, + pi->rssical_cache.rssical_phyregs_2G[8]); + write_phy_reg(pi, 0x1ab, + pi->rssical_cache.rssical_phyregs_2G[9]); + write_phy_reg(pi, 0x1b1, + pi->rssical_cache.rssical_phyregs_2G[10]); + write_phy_reg(pi, 0x1b7, + pi->rssical_cache.rssical_phyregs_2G[11]); + + } else { + if (pi->nphy_rssical_chanspec_5G == 0) + return; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, + RADIO_2057_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_5G[0]); + mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, + RADIO_2057_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_5G[1]); + } else { + mod_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, + RADIO_2056_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_5G[0]); + mod_radio_reg(pi, + RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, + RADIO_2056_VCM_MASK, + pi->rssical_cache. + rssical_radio_regs_5G[1]); + } + + write_phy_reg(pi, 0x1a6, + pi->rssical_cache.rssical_phyregs_5G[0]); + write_phy_reg(pi, 0x1ac, + pi->rssical_cache.rssical_phyregs_5G[1]); + write_phy_reg(pi, 0x1b2, + pi->rssical_cache.rssical_phyregs_5G[2]); + write_phy_reg(pi, 0x1b8, + pi->rssical_cache.rssical_phyregs_5G[3]); + write_phy_reg(pi, 0x1a4, + pi->rssical_cache.rssical_phyregs_5G[4]); + write_phy_reg(pi, 0x1aa, + pi->rssical_cache.rssical_phyregs_5G[5]); + write_phy_reg(pi, 0x1b0, + pi->rssical_cache.rssical_phyregs_5G[6]); + write_phy_reg(pi, 0x1b6, + pi->rssical_cache.rssical_phyregs_5G[7]); + write_phy_reg(pi, 0x1a5, + pi->rssical_cache.rssical_phyregs_5G[8]); + write_phy_reg(pi, 0x1ab, + pi->rssical_cache.rssical_phyregs_5G[9]); + write_phy_reg(pi, 0x1b1, + pi->rssical_cache.rssical_phyregs_5G[10]); + write_phy_reg(pi, 0x1b7, + pi->rssical_cache.rssical_phyregs_5G[11]); + } +} + +static u16 +wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, + u8 dac_test_mode) +{ + u8 phy_bw, is_phybw40; + u16 num_samps, t, spur; + fixed theta = 0, rot = 0; + u32 tbl_len; + cs32 *tone_buf = NULL; + + is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); + phy_bw = (is_phybw40 == 1) ? 40 : 20; + tbl_len = (phy_bw << 3); + + if (dac_test_mode == 1) { + spur = read_phy_reg(pi, 0x01); + spur = (spur >> 15) & 1; + phy_bw = (spur == 1) ? 82 : 80; + phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; + + tbl_len = (phy_bw << 1); + } + + tone_buf = kmalloc(sizeof(cs32) * tbl_len, GFP_ATOMIC); + if (tone_buf == NULL) { + return 0; + } + + num_samps = (u16) tbl_len; + rot = FIXED((f_kHz * 36) / phy_bw) / 100; + theta = 0; + + for (t = 0; t < num_samps; t++) { + + wlc_phy_cordic(theta, &tone_buf[t]); + + theta += rot; + + tone_buf[t].q = (s32) FLOAT(tone_buf[t].q * max_val); + tone_buf[t].i = (s32) FLOAT(tone_buf[t].i * max_val); + } + + wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); + + kfree(tone_buf); + + return num_samps; +} + +int +wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, + u8 iqmode, u8 dac_test_mode, bool modify_bbmult) +{ + u16 num_samps; + u16 loops = 0xffff; + u16 wait = 0; + + num_samps = + wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, dac_test_mode); + if (num_samps == 0) { + return -EBADE; + } + + wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, + dac_test_mode, modify_bbmult); + + return 0; +} + +static void +wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, + u16 num_samps) +{ + u16 t; + u32 *data_buf = NULL; + + data_buf = kmalloc(sizeof(u32) * num_samps, GFP_ATOMIC); + if (data_buf == NULL) { + return; + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + for (t = 0; t < num_samps; t++) { + data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | + (((unsigned int)tone_buf[t].q) & 0x3ff); + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, + data_buf); + + kfree(data_buf); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void +wlc_phy_runsamples_nphy(phy_info_t *pi, u16 num_samps, u16 loops, + u16 wait, u8 iqmode, u8 dac_test_mode, + bool modify_bbmult) +{ + u16 bb_mult; + u8 phy_bw, sample_cmd; + u16 orig_RfseqCoreActv; + u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4, lpf_bw_ctl_miscreg3, + lpf_bw_ctl_miscreg4; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + phy_bw = 20; + if (CHSPEC_IS40(pi->radio_chanspec)) + phy_bw = 40; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); + lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); + if (lpf_bw_ctl_override3 | lpf_bw_ctl_override4) { + lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & + (0x7 << 8); + lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & + (0x7 << 8); + } else { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 7), + wlc_phy_read_lpf_bw_ctl_nphy + (pi, 0), 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + + pi->nphy_sample_play_lpf_bw_ctl_ovr = true; + + lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & + (0x7 << 8); + lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & + (0x7 << 8); + } + } + + if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, + &bb_mult); + pi->nphy_bb_mult_save = + BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); + } + + if (modify_bbmult) { + bb_mult = (phy_bw == 20) ? 100 : 71; + bb_mult = (bb_mult << 8) + bb_mult; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, + &bb_mult); + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + write_phy_reg(pi, 0xc6, num_samps - 1); + + if (loops != 0xffff) { + write_phy_reg(pi, 0xc4, loops - 1); + } else { + write_phy_reg(pi, 0xc4, loops); + } + write_phy_reg(pi, 0xc5, wait); + + orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); + or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); + if (iqmode) { + + and_phy_reg(pi, 0xc2, 0x7FFF); + + or_phy_reg(pi, 0xc2, 0x8000); + } else { + + sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; + write_phy_reg(pi, 0xc3, sample_cmd); + } + + SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); + + write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); +} + +void wlc_phy_stopplayback_nphy(phy_info_t *pi) +{ + u16 playback_status; + u16 bb_mult; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + playback_status = read_phy_reg(pi, 0xc7); + if (playback_status & 0x1) { + or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); + } else if (playback_status & 0x2) { + + and_phy_reg(pi, 0xc2, + (u16) ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); + } + + and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); + + if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { + + bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, + &bb_mult); + + pi->nphy_bb_mult_save = 0; + } + + if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { + if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 7), + 0, 0, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + pi->nphy_sample_play_lpf_bw_ctl_ovr = false; + } + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) +{ + u16 base_idx[2], curr_gain[2]; + u8 core_no; + nphy_txgains_t target_gain; + u32 *tx_pwrctrl_tbl = NULL; + + if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + curr_gain); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + for (core_no = 0; core_no < 2; core_no++) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + target_gain.ipa[core_no] = + curr_gain[core_no] & 0x0007; + target_gain.pad[core_no] = + ((curr_gain[core_no] & 0x00F8) >> 3); + target_gain.pga[core_no] = + ((curr_gain[core_no] & 0x0F00) >> 8); + target_gain.txgm[core_no] = + ((curr_gain[core_no] & 0x7000) >> 12); + target_gain.txlpf[core_no] = + ((curr_gain[core_no] & 0x8000) >> 15); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + target_gain.ipa[core_no] = + curr_gain[core_no] & 0x000F; + target_gain.pad[core_no] = + ((curr_gain[core_no] & 0x00F0) >> 4); + target_gain.pga[core_no] = + ((curr_gain[core_no] & 0x0F00) >> 8); + target_gain.txgm[core_no] = + ((curr_gain[core_no] & 0x7000) >> 12); + } else { + target_gain.ipa[core_no] = + curr_gain[core_no] & 0x0003; + target_gain.pad[core_no] = + ((curr_gain[core_no] & 0x000C) >> 2); + target_gain.pga[core_no] = + ((curr_gain[core_no] & 0x0070) >> 4); + target_gain.txgm[core_no] = + ((curr_gain[core_no] & 0x0380) >> 7); + } + } + } else { + base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; + base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; + for (core_no = 0; core_no < 2; core_no++) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (PHY_IPA(pi)) { + tx_pwrctrl_tbl = + wlc_phy_get_ipa_gaintbl_nphy(pi); + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if NREV_IS + (pi->pubpi.phy_rev, 3) { + tx_pwrctrl_tbl = + nphy_tpc_5GHz_txgain_rev3; + } else if NREV_IS + (pi->pubpi.phy_rev, 4) { + tx_pwrctrl_tbl = + (pi->srom_fem5g. + extpagain == + 3) ? + nphy_tpc_5GHz_txgain_HiPwrEPA + : + nphy_tpc_5GHz_txgain_rev4; + } else { + tx_pwrctrl_tbl = + nphy_tpc_5GHz_txgain_rev5; + } + } else { + if (NREV_GE + (pi->pubpi.phy_rev, 7)) { + if (pi->pubpi. + radiorev == 3) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_epa_2057rev3; + } else if (pi->pubpi. + radiorev == + 5) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_epa_2057rev5; + } + + } else { + if (NREV_GE + (pi->pubpi.phy_rev, + 5) + && (pi->srom_fem2g. + extpagain == + 3)) { + tx_pwrctrl_tbl = + nphy_tpc_txgain_HiPwrEPA; + } else { + tx_pwrctrl_tbl = + nphy_tpc_txgain_rev3; + } + } + } + } + if NREV_GE + (pi->pubpi.phy_rev, 7) { + target_gain.ipa[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 16) & 0x7; + target_gain.pad[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 19) & 0x1f; + target_gain.pga[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 24) & 0xf; + target_gain.txgm[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 28) & 0x7; + target_gain.txlpf[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 31) & 0x1; + } else { + target_gain.ipa[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 16) & 0xf; + target_gain.pad[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 20) & 0xf; + target_gain.pga[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 24) & 0xf; + target_gain.txgm[core_no] = + (tx_pwrctrl_tbl[base_idx[core_no]] + >> 28) & 0x7; + } + } else { + target_gain.ipa[core_no] = + (nphy_tpc_txgain[base_idx[core_no]] >> 16) & + 0x3; + target_gain.pad[core_no] = + (nphy_tpc_txgain[base_idx[core_no]] >> 18) & + 0x3; + target_gain.pga[core_no] = + (nphy_tpc_txgain[base_idx[core_no]] >> 20) & + 0x7; + target_gain.txgm[core_no] = + (nphy_tpc_txgain[base_idx[core_no]] >> 23) & + 0x7; + } + } + } + + return target_gain; +} + +static void +wlc_phy_iqcal_gainparams_nphy(phy_info_t *pi, u16 core_no, + nphy_txgains_t target_gain, + nphy_iqcal_params_t *params) +{ + u8 k; + int idx; + u16 gain_index; + u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + params->txlpf = target_gain.txlpf[core_no]; + } + params->txgm = target_gain.txgm[core_no]; + params->pga = target_gain.pga[core_no]; + params->pad = target_gain.pad[core_no]; + params->ipa = target_gain.ipa[core_no]; + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + params->cal_gain = + ((params->txlpf << 15) | (params-> + txgm << 12) | (params-> + pga << 8) | + (params->pad << 3) | (params->ipa)); + } else { + params->cal_gain = + ((params->txgm << 12) | (params-> + pga << 8) | (params-> + pad << 4) | + (params->ipa)); + } + params->ncorr[0] = 0x79; + params->ncorr[1] = 0x79; + params->ncorr[2] = 0x79; + params->ncorr[3] = 0x79; + params->ncorr[4] = 0x79; + } else { + + gain_index = ((target_gain.pad[core_no] << 0) | + (target_gain.pga[core_no] << 4) | (target_gain. + txgm[core_no] + << 8)); + + idx = -1; + for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { + if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == + gain_index) { + idx = k; + break; + } + } + + params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; + params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; + params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; + params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | + (params->pad << 2)); + params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; + params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; + params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; + params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; + } +} + +static void wlc_phy_txcal_radio_setup_nphy(phy_info_t *pi) +{ + u16 jtag_core, core; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + for (core = 0; core <= 1; core++) { + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_VCM_HG); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_IDAC); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MUX); + + if (pi->pubpi.radiorev != 5) + pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSIA); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSI_MISC1); + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER, 0x0a); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_VCM_HG, 0x43); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_IDAC, 0x55); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSI_VCM, 0x00); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSIG, 0x00); + if (pi->use_int_tx_iqlo_cal_nphy) { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TX_SSI_MUX, 0x4); + if (! + (pi-> + internal_tx_iqlo_cal_tapoff_intpa_nphy)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIA, 0x31); + } else { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIA, 0x21); + } + } + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSI_MISC1, 0x00); + } else { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER, 0x06); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_VCM_HG, 0x43); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + IQCAL_IDAC, 0x55); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSI_VCM, 0x00); + + if (pi->pubpi.radiorev != 5) + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TSSIA, 0x00); + if (pi->use_int_tx_iqlo_cal_nphy) { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TX_SSI_MUX, + 0x06); + if (! + (pi-> + internal_tx_iqlo_cal_tapoff_intpa_nphy)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIG, 0x31); + } else { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIG, 0x21); + } + } + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSI_MISC1, 0x00); + } + } + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + for (core = 0; core <= 1; core++) { + jtag_core = + (core == + PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = + read_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MASTER | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = + read_radio_reg(pi, + RADIO_2056_TX_IQCAL_VCM_HG | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = + read_radio_reg(pi, + RADIO_2056_TX_IQCAL_IDAC | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = + read_radio_reg(pi, + RADIO_2056_TX_TSSI_VCM | jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = + read_radio_reg(pi, + RADIO_2056_TX_TX_AMP_DET | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = + read_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = + read_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = + read_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = + read_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC1 | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = + read_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC2 | + jtag_core); + + pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = + read_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC3 | + jtag_core); + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MASTER | + jtag_core, 0x0a); + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_VCM_HG | + jtag_core, 0x40); + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_IDAC | + jtag_core, 0x55); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_VCM | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TX_AMP_DET | + jtag_core, 0x00); + + if (PHY_IPA(pi)) { + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX + | jtag_core, 0x4); + write_radio_reg(pi, + RADIO_2056_TX_TSSIA | + jtag_core, 0x1); + } else { + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX + | jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSIA | + jtag_core, 0x2f); + } + write_radio_reg(pi, + RADIO_2056_TX_TSSIG | jtag_core, + 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC1 | + jtag_core, 0x00); + + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC2 | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC3 | + jtag_core, 0x00); + } else { + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MASTER | + jtag_core, 0x06); + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_VCM_HG | + jtag_core, 0x40); + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_IDAC | + jtag_core, 0x55); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_VCM | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TX_AMP_DET | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSIA | jtag_core, + 0x00); + + if (PHY_IPA(pi)) { + + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX + | jtag_core, 0x06); + if (NREV_LT(pi->pubpi.phy_rev, 5)) { + + write_radio_reg(pi, + RADIO_2056_TX_TSSIG + | jtag_core, + 0x11); + } else { + + write_radio_reg(pi, + RADIO_2056_TX_TSSIG + | jtag_core, + 0x1); + } + } else { + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX + | jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSIG | + jtag_core, 0x20); + } + + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC1 | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC2 | + jtag_core, 0x00); + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC3 | + jtag_core, 0x00); + } + } + } else { + + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); + + pi->tx_rx_cal_radio_saveregs[2] = + read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); + pi->tx_rx_cal_radio_saveregs[3] = + read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); + + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); + pi->tx_rx_cal_radio_saveregs[5] = + read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); + + if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == + 0) { + + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); + } else { + + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); + } + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + + or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); + or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); + } else { + + and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); + and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); + } + } +} + +static void wlc_phy_txcal_radio_cleanup_nphy(phy_info_t *pi) +{ + u16 jtag_core, core; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (core = 0; core <= 1; core++) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 0]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 1]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 2]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 3]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 5]); + + if (pi->pubpi.radiorev != 5) + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSIA, + pi-> + tx_rx_cal_radio_saveregs[(core + * + 11) + + 6]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 7]); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 8]); + } + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + for (core = 0; core <= 1; core++) { + jtag_core = + (core == + PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; + + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MASTER | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 0]); + + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 1]); + + write_radio_reg(pi, + RADIO_2056_TX_IQCAL_IDAC | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 2]); + + write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 3]); + + write_radio_reg(pi, + RADIO_2056_TX_TX_AMP_DET | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 4]); + + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 5]); + + write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 6]); + + write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 7]); + + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC1 | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 8]); + + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC2 | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 9]); + + write_radio_reg(pi, + RADIO_2056_TX_TSSI_MISC3 | jtag_core, + pi-> + tx_rx_cal_radio_saveregs[(core * 11) + + 10]); + } + } else { + + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, + pi->tx_rx_cal_radio_saveregs[0]); + write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, + pi->tx_rx_cal_radio_saveregs[1]); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, + pi->tx_rx_cal_radio_saveregs[2]); + write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, + pi->tx_rx_cal_radio_saveregs[3]); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, + pi->tx_rx_cal_radio_saveregs[4]); + write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, + pi->tx_rx_cal_radio_saveregs[5]); + } +} + +static void wlc_phy_txcal_physetup_nphy(phy_info_t *pi) +{ + u16 val, mask; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); + pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); + + mask = ((0x3 << 8) | (0x3 << 10)); + val = (0x2 << 8); + val |= (0x2 << 10); + mod_phy_reg(pi, 0xa6, mask, val); + mod_phy_reg(pi, 0xa7, mask, val); + + val = read_phy_reg(pi, 0x8f); + pi->tx_rx_cal_phy_saveregs[2] = val; + val |= ((0x1 << 9) | (0x1 << 10)); + write_phy_reg(pi, 0x8f, val); + + val = read_phy_reg(pi, 0xa5); + pi->tx_rx_cal_phy_saveregs[3] = val; + val |= ((0x1 << 9) | (0x1 << 10)); + write_phy_reg(pi, 0xa5, val); + + pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); + mod_phy_reg(pi, 0x01, (0x1 << 15), 0); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, + &val); + pi->tx_rx_cal_phy_saveregs[5] = val; + val = 0; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, + &val); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, + &val); + pi->tx_rx_cal_phy_saveregs[6] = val; + val = 0; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, + &val); + + pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); + pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); + + if (!(pi->use_int_tx_iqlo_cal_nphy)) { + + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_PA, + 1, + RADIO_MIMO_CORESEL_CORE1 + | + RADIO_MIMO_CORESEL_CORE2); + } else { + + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_PA, + 0, + RADIO_MIMO_CORESEL_CORE1 + | + RADIO_MIMO_CORESEL_CORE2); + } + + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x2, RADIO_MIMO_CORESEL_CORE1); + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x8, RADIO_MIMO_CORESEL_CORE2); + + pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); + pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + if (NREV_IS(pi->pubpi.phy_rev, 7) + || NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), + wlc_phy_read_lpf_bw_ctl_nphy + (pi, 0), 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } + + if (pi->use_int_tx_iqlo_cal_nphy + && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { + + if (NREV_IS(pi->pubpi.phy_rev, 7)) { + + mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, + 1 << 4); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + mod_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE0, + 1, 0); + mod_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE1, + 1, 0); + } else { + mod_radio_reg(pi, + RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, + 1, 0); + mod_radio_reg(pi, + RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, + 1, 0); + } + } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 3), 0, + 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } + } + } else { + pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); + pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); + + mask = ((0x3 << 12) | (0x3 << 14)); + val = (0x2 << 12); + val |= (0x2 << 14); + mod_phy_reg(pi, 0xa6, mask, val); + mod_phy_reg(pi, 0xa7, mask, val); + + val = read_phy_reg(pi, 0xa5); + pi->tx_rx_cal_phy_saveregs[2] = val; + val |= ((0x1 << 12) | (0x1 << 13)); + write_phy_reg(pi, 0xa5, val); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, + &val); + pi->tx_rx_cal_phy_saveregs[3] = val; + val |= 0x2000; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, + &val); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, + &val); + pi->tx_rx_cal_phy_saveregs[4] = val; + val |= 0x2000; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, + &val); + + pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); + pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); + val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; + write_phy_reg(pi, 0x91, val); + write_phy_reg(pi, 0x92, val); + } +} + +static void wlc_phy_txcal_phycleanup_nphy(phy_info_t *pi) +{ + u16 mask; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); + write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); + write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); + write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); + write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, + &pi->tx_rx_cal_phy_saveregs[5]); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, + &pi->tx_rx_cal_phy_saveregs[6]); + + write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); + write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); + + write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); + write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); + + if (NREV_IS(pi->pubpi.phy_rev, 7) + || NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 0, 0, + 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } + + wlc_phy_resetcca_nphy(pi); + + if (pi->use_int_tx_iqlo_cal_nphy + && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { + + if (NREV_IS(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + mod_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE0, + 1, 1); + mod_radio_reg(pi, + RADIO_2057_PAD2G_TUNE_PUS_CORE1, + 1, 1); + } else { + mod_radio_reg(pi, + RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, + 1, 1); + mod_radio_reg(pi, + RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, + 1, 1); + } + + mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, + 0); + } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 3), 0, + 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } + } + } else { + mask = ((0x3 << 12) | (0x3 << 14)); + mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); + mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); + write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, + &pi->tx_rx_cal_phy_saveregs[3]); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, + &pi->tx_rx_cal_phy_saveregs[4]); + + write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); + write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); + } +} + +#define NPHY_CAL_TSSISAMPS 64 +#define NPHY_TEST_TONE_FREQ_40MHz 4000 +#define NPHY_TEST_TONE_FREQ_20MHz 2500 + +void +wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, u8 num_samps) +{ + u16 tssi_reg; + s32 temp, pwrindex[2]; + s32 idle_tssi[2]; + s32 rssi_buf[4]; + s32 tssival[2]; + u8 tssi_type; + + tssi_reg = read_phy_reg(pi, 0x1e9); + + temp = (s32) (tssi_reg & 0x3f); + idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); + + temp = (s32) ((tssi_reg >> 8) & 0x3f); + idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); + + tssi_type = + CHSPEC_IS5G(pi->radio_chanspec) ? + (u8)NPHY_RSSI_SEL_TSSI_5G:(u8)NPHY_RSSI_SEL_TSSI_2G; + + wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); + + tssival[0] = rssi_buf[0] / ((s32) num_samps); + tssival[1] = rssi_buf[2] / ((s32) num_samps); + + pwrindex[0] = idle_tssi[0] - tssival[0] + 64; + pwrindex[1] = idle_tssi[1] - tssival[1] + 64; + + if (pwrindex[0] < 0) { + pwrindex[0] = 0; + } else if (pwrindex[0] > 63) { + pwrindex[0] = 63; + } + + if (pwrindex[1] < 0) { + pwrindex[1] = 0; + } else if (pwrindex[1] > 63) { + pwrindex[1] = 63; + } + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, + (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, + (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); +} + +static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi) +{ + u16 txcal_gain[2]; + + pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; + pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; + wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); + wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + txcal_gain); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; + txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; + } else { + txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; + txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + txcal_gain); +} + +static void wlc_phy_precal_txgain_nphy(phy_info_t *pi) +{ + bool save_bbmult = false; + u8 txcal_index_2057_rev5n7 = 0; + u8 txcal_index_2057_rev3n4n6 = 10; + + if (pi->use_int_tx_iqlo_cal_nphy) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + + pi->nphy_txcal_pwr_idx[0] = + txcal_index_2057_rev3n4n6; + pi->nphy_txcal_pwr_idx[1] = + txcal_index_2057_rev3n4n6; + wlc_phy_txpwr_index_nphy(pi, 3, + txcal_index_2057_rev3n4n6, + false); + } else { + + pi->nphy_txcal_pwr_idx[0] = + txcal_index_2057_rev5n7; + pi->nphy_txcal_pwr_idx[1] = + txcal_index_2057_rev5n7; + wlc_phy_txpwr_index_nphy(pi, 3, + txcal_index_2057_rev5n7, + false); + } + save_bbmult = true; + + } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { + wlc_phy_cal_txgainctrl_nphy(pi, 11, false); + if (pi->sh->hw_phytxchain != 3) { + pi->nphy_txcal_pwr_idx[1] = + pi->nphy_txcal_pwr_idx[0]; + wlc_phy_txpwr_index_nphy(pi, 3, + pi-> + nphy_txcal_pwr_idx[0], + true); + save_bbmult = true; + } + + } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { + if (PHY_IPA(pi)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + wlc_phy_cal_txgainctrl_nphy(pi, 12, + false); + } else { + pi->nphy_txcal_pwr_idx[0] = 80; + pi->nphy_txcal_pwr_idx[1] = 80; + wlc_phy_txpwr_index_nphy(pi, 3, 80, + false); + save_bbmult = true; + } + } else { + + wlc_phy_internal_cal_txgain_nphy(pi); + save_bbmult = true; + } + + } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { + if (PHY_IPA(pi)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + wlc_phy_cal_txgainctrl_nphy(pi, 12, + false); + } else { + wlc_phy_cal_txgainctrl_nphy(pi, 14, + false); + } + } else { + + wlc_phy_internal_cal_txgain_nphy(pi); + save_bbmult = true; + } + } + + } else { + wlc_phy_cal_txgainctrl_nphy(pi, 10, false); + } + + if (save_bbmult) { + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, + &pi->nphy_txcal_bbmult); + } +} + +void +wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, bool debug) +{ + int gainctrl_loopidx; + uint core; + u16 m0m1, curr_m0m1; + s32 delta_power; + s32 txpwrindex; + s32 qdBm_power[2]; + u16 orig_BBConfig; + u16 phy_saveregs[4]; + u32 freq_test; + u16 ampl_test = 250; + uint stepsize; + bool phyhang_avoid_state = false; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + stepsize = 2; + } else { + + stepsize = 1; + } + + if (CHSPEC_IS40(pi->radio_chanspec)) { + freq_test = 5000; + } else { + freq_test = 2500; + } + + wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); + wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + phyhang_avoid_state = pi->phyhang_avoid; + pi->phyhang_avoid = false; + + phy_saveregs[0] = read_phy_reg(pi, 0x91); + phy_saveregs[1] = read_phy_reg(pi, 0x92); + phy_saveregs[2] = read_phy_reg(pi, 0xe7); + phy_saveregs[3] = read_phy_reg(pi, 0xec); + wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, + RADIO_MIMO_CORESEL_CORE1 | + RADIO_MIMO_CORESEL_CORE2); + + if (!debug) { + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x2, RADIO_MIMO_CORESEL_CORE1); + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x8, RADIO_MIMO_CORESEL_CORE2); + } else { + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x1, RADIO_MIMO_CORESEL_CORE1); + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x7, RADIO_MIMO_CORESEL_CORE2); + } + + orig_BBConfig = read_phy_reg(pi, 0x01); + mod_phy_reg(pi, 0x01, (0x1 << 15), 0); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; + + for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; + gainctrl_loopidx++) { + wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, + false); + + if (core == PHY_CORE_0) { + curr_m0m1 = m0m1 & 0xff00; + } else { + curr_m0m1 = m0m1 & 0x00ff; + } + + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); + wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); + + udelay(50); + + wlc_phy_est_tonepwr_nphy(pi, qdBm_power, + NPHY_CAL_TSSISAMPS); + + pi->nphy_bb_mult_save = 0; + wlc_phy_stopplayback_nphy(pi); + + delta_power = (dBm_targetpower * 4) - qdBm_power[core]; + + txpwrindex -= stepsize * delta_power; + if (txpwrindex < 0) { + txpwrindex = 0; + } else if (txpwrindex > 127) { + txpwrindex = 127; + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (NREV_IS(pi->pubpi.phy_rev, 4) && + (pi->srom_fem5g.extpagain == 3)) { + if (txpwrindex < 30) { + txpwrindex = 30; + } + } + } else { + if (NREV_GE(pi->pubpi.phy_rev, 5) && + (pi->srom_fem2g.extpagain == 3)) { + if (txpwrindex < 50) { + txpwrindex = 50; + } + } + } + + wlc_phy_txpwr_index_nphy(pi, (1 << core), + (u8) txpwrindex, true); + } + + pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; + + if (debug) { + u16 radio_gain; + u16 dbg_m0m1; + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); + + wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, + false); + + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); + wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); + + udelay(100); + + wlc_phy_est_tonepwr_nphy(pi, qdBm_power, + NPHY_CAL_TSSISAMPS); + + wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, + &radio_gain); + + mdelay(4000); + pi->nphy_bb_mult_save = 0; + wlc_phy_stopplayback_nphy(pi); + } + } + + wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); + wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); + + write_phy_reg(pi, 0x01, orig_BBConfig); + + write_phy_reg(pi, 0x91, phy_saveregs[0]); + write_phy_reg(pi, 0x92, phy_saveregs[1]); + write_phy_reg(pi, 0xe7, phy_saveregs[2]); + write_phy_reg(pi, 0xec, phy_saveregs[3]); + + pi->phyhang_avoid = phyhang_avoid_state; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core) +{ + int index; + u32 bbmult_scale; + u16 bbmult; + u16 tblentry; + + nphy_txiqcal_ladder_t ladder_lo[] = { + {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, + {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, + {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} + }; + + nphy_txiqcal_ladder_t ladder_iq[] = { + {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, + {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, + {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} + }; + + bbmult = (core == PHY_CORE_0) ? + ((pi->nphy_txcal_bbmult >> 8) & 0xff) : (pi-> + nphy_txcal_bbmult & 0xff); + + for (index = 0; index < 18; index++) { + bbmult_scale = ladder_lo[index].percent * bbmult; + bbmult_scale /= 100; + + tblentry = + ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, + &tblentry); + + bbmult_scale = ladder_iq[index].percent * bbmult; + bbmult_scale /= 100; + + tblentry = + ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, + 16, &tblentry); + } +} + +void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) +{ + nphy_txgains_t target_gain; + u8 tx_pwr_ctrl_state; + bool fullcal = true; + bool restore_tx_gain = false; + bool mphase; + + if (NORADIO_ENAB(pi->pubpi)) { + wlc_phy_cal_perical_mphase_reset(pi); + return; + } + + if (PHY_MUTED(pi)) + return; + + if (caltype == PHY_PERICAL_AUTO) + fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); + else if (caltype == PHY_PERICAL_PARTIAL) + fullcal = false; + + if (pi->cal_type_override != PHY_PERICAL_AUTO) { + fullcal = + (pi->cal_type_override == PHY_PERICAL_FULL) ? true : false; + } + + if ((pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT)) { + if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) + wlc_phy_cal_perical_mphase_restart(pi); + } + + if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL)) { + wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); + } + + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + wlc_phyreg_enter((wlc_phy_t *) pi); + + if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || + (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { + pi->nphy_cal_orig_pwr_idx[0] = + (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); + pi->nphy_cal_orig_pwr_idx[1] = + (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); + + if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, + 0x110, 16, + pi->nphy_cal_orig_tx_gain); + } else { + pi->nphy_cal_orig_tx_gain[0] = 0; + pi->nphy_cal_orig_tx_gain[1] = 0; + } + } + target_gain = wlc_phy_get_tx_gain_nphy(pi); + tx_pwr_ctrl_state = pi->nphy_txpwrctrl; + wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); + + if (pi->antsel_type == ANTSEL_2x3) + wlc_phy_antsel_init((wlc_phy_t *) pi, true); + + mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); + if (!mphase) { + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_precal_txgain_nphy(pi); + pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); + restore_tx_gain = true; + + target_gain = pi->nphy_cal_target_gain; + } + if (0 == + wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, mphase)) { + if (PHY_IPA(pi)) + wlc_phy_a4(pi, true); + + wlc_phyreg_exit((wlc_phy_t *) pi); + wlapi_enable_mac(pi->sh->physhim); + wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, + 10000); + wlapi_suspend_mac_and_wait(pi->sh->physhim); + wlc_phyreg_enter((wlc_phy_t *) pi); + + if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, + (pi-> + first_cal_after_assoc + || (pi-> + cal_type_override + == + PHY_PERICAL_FULL)) + ? 2 : 0, false)) { + wlc_phy_savecal_nphy(pi); + + wlc_phy_txpwrctrl_coeff_setup_nphy(pi); + + pi->nphy_perical_last = pi->sh->now; + } + } + if (caltype != PHY_PERICAL_AUTO) { + wlc_phy_rssi_cal_nphy(pi); + } + + if (pi->first_cal_after_assoc + || (pi->cal_type_override == PHY_PERICAL_FULL)) { + pi->first_cal_after_assoc = false; + wlc_phy_txpwrctrl_idle_tssi_nphy(pi); + wlc_phy_txpwrctrl_pwr_setup_nphy(pi); + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_radio205x_vcocal_nphy(pi); + } + } else { + switch (pi->mphase_cal_phase_id) { + case MPHASE_CAL_STATE_INIT: + pi->nphy_perical_last = pi->sh->now; + pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_precal_txgain_nphy(pi); + } + pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); + pi->mphase_cal_phase_id++; + break; + + case MPHASE_CAL_STATE_TXPHASE0: + case MPHASE_CAL_STATE_TXPHASE1: + case MPHASE_CAL_STATE_TXPHASE2: + case MPHASE_CAL_STATE_TXPHASE3: + case MPHASE_CAL_STATE_TXPHASE4: + case MPHASE_CAL_STATE_TXPHASE5: + if ((pi->radar_percal_mask & 0x10) != 0) + pi->nphy_rxcal_active = true; + + if (wlc_phy_cal_txiqlo_nphy + (pi, pi->nphy_cal_target_gain, fullcal, + true) != 0) { + + wlc_phy_cal_perical_mphase_reset(pi); + break; + } + + if (NREV_LE(pi->pubpi.phy_rev, 2) && + (pi->mphase_cal_phase_id == + MPHASE_CAL_STATE_TXPHASE4)) { + pi->mphase_cal_phase_id += 2; + } else { + pi->mphase_cal_phase_id++; + } + break; + + case MPHASE_CAL_STATE_PAPDCAL: + if ((pi->radar_percal_mask & 0x2) != 0) + pi->nphy_rxcal_active = true; + + if (PHY_IPA(pi)) { + wlc_phy_a4(pi, true); + } + pi->mphase_cal_phase_id++; + break; + + case MPHASE_CAL_STATE_RXCAL: + if ((pi->radar_percal_mask & 0x1) != 0) + pi->nphy_rxcal_active = true; + if (wlc_phy_cal_rxiq_nphy(pi, target_gain, + (pi->first_cal_after_assoc || + (pi->cal_type_override == + PHY_PERICAL_FULL)) ? 2 : 0, + false) == 0) { + wlc_phy_savecal_nphy(pi); + } + + pi->mphase_cal_phase_id++; + break; + + case MPHASE_CAL_STATE_RSSICAL: + if ((pi->radar_percal_mask & 0x4) != 0) + pi->nphy_rxcal_active = true; + wlc_phy_txpwrctrl_coeff_setup_nphy(pi); + wlc_phy_rssi_cal_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_radio205x_vcocal_nphy(pi); + } + restore_tx_gain = true; + + if (pi->first_cal_after_assoc) { + pi->mphase_cal_phase_id++; + } else { + wlc_phy_cal_perical_mphase_reset(pi); + } + + break; + + case MPHASE_CAL_STATE_IDLETSSI: + if ((pi->radar_percal_mask & 0x8) != 0) + pi->nphy_rxcal_active = true; + + if (pi->first_cal_after_assoc) { + pi->first_cal_after_assoc = false; + wlc_phy_txpwrctrl_idle_tssi_nphy(pi); + wlc_phy_txpwrctrl_pwr_setup_nphy(pi); + } + + wlc_phy_cal_perical_mphase_reset(pi); + break; + + default: + wlc_phy_cal_perical_mphase_reset(pi); + break; + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (restore_tx_gain) { + if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { + + wlc_phy_txpwr_index_nphy(pi, 1, + pi-> + nphy_cal_orig_pwr_idx + [0], false); + wlc_phy_txpwr_index_nphy(pi, 2, + pi-> + nphy_cal_orig_pwr_idx + [1], false); + + pi->nphy_txpwrindex[0].index = -1; + pi->nphy_txpwrindex[1].index = -1; + } else { + wlc_phy_txpwr_index_nphy(pi, (1 << 0), + (s8) (pi-> + nphy_txpwrindex + [0]. + index_internal), + false); + wlc_phy_txpwr_index_nphy(pi, (1 << 1), + (s8) (pi-> + nphy_txpwrindex + [1]. + index_internal), + false); + } + } + } + + wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); + wlc_phyreg_exit((wlc_phy_t *) pi); + wlapi_enable_mac(pi->sh->physhim); +} + +int +wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, + bool fullcal, bool mphase) +{ + u16 val; + u16 tbl_buf[11]; + u8 cal_cnt; + u16 cal_cmd; + u8 num_cals, max_cal_cmds; + u16 core_no, cal_type; + u16 diq_start = 0; + u8 phy_bw; + u16 max_val; + u16 tone_freq; + u16 gain_save[2]; + u16 cal_gain[2]; + nphy_iqcal_params_t cal_params[2]; + u32 tbl_len; + void *tbl_ptr; + bool ladder_updated[2]; + u8 mphase_cal_lastphase = 0; + int bcmerror = 0; + bool phyhang_avoid_state = false; + + u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { + 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, + 0x1902, + 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, + 0x6407 + }; + + u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { + 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, + 0x3200, + 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, + 0x6407 + }; + + u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { + 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, + 0x1202, + 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, + 0x4707 + }; + + u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { + 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, + 0x2300, + 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, + 0x4707 + }; + + u16 tbl_tx_iqlo_cal_startcoefs[] = { + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000 + }; + + u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { + 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, + 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 + }; + + u16 tbl_tx_iqlo_cal_cmds_recal[] = { + 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, + 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 + }; + + u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000 + }; + + u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { + 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, + 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 + }; + + u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { + 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, + 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 + }; + + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (NREV_GE(pi->pubpi.phy_rev, 4)) { + phyhang_avoid_state = pi->phyhang_avoid; + pi->phyhang_avoid = false; + } + + if (CHSPEC_IS40(pi->radio_chanspec)) { + phy_bw = 40; + } else { + phy_bw = 20; + } + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); + + for (core_no = 0; core_no <= 1; core_no++) { + wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, + &cal_params[core_no]); + cal_gain[core_no] = cal_params[core_no].cal_gain; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); + + wlc_phy_txcal_radio_setup_nphy(pi); + + wlc_phy_txcal_physetup_nphy(pi); + + ladder_updated[0] = ladder_updated[1] = false; + if (!(NREV_GE(pi->pubpi.phy_rev, 6) || + (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) + && (CHSPEC_IS2G(pi->radio_chanspec))))) { + + if (phy_bw == 40) { + tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; + tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); + } else { + tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; + tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, + 16, tbl_ptr); + + if (phy_bw == 40) { + tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; + tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); + } else { + tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; + tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, + 16, tbl_ptr); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_phy_reg(pi, 0xc2, 0x8ad9); + } else { + write_phy_reg(pi, 0xc2, 0x8aa9); + } + + max_val = 250; + tone_freq = (phy_bw == 20) ? 2500 : 5000; + + if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { + wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); + bcmerror = 0; + } else { + bcmerror = + wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, false); + } + + if (bcmerror == 0) { + + if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { + tbl_ptr = pi->mphase_txcal_bestcoeffs; + tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + + tbl_len -= 2; + } + } else { + if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { + + tbl_ptr = pi->nphy_txiqlocal_bestc; + tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + + tbl_len -= 2; + } + } else { + + fullcal = true; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + tbl_ptr = + tbl_tx_iqlo_cal_startcoefs_nphyrev3; + tbl_len = + ARRAY_SIZE + (tbl_tx_iqlo_cal_startcoefs_nphyrev3); + } else { + tbl_ptr = tbl_tx_iqlo_cal_startcoefs; + tbl_len = + ARRAY_SIZE + (tbl_tx_iqlo_cal_startcoefs); + } + } + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, + 16, tbl_ptr); + + if (fullcal) { + max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? + ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : + ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); + } else { + max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? + ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : + ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); + } + + if (mphase) { + cal_cnt = pi->mphase_txcal_cmdidx; + if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) { + num_cals = cal_cnt + pi->mphase_txcal_numcmds; + } else { + num_cals = max_cal_cmds; + } + } else { + cal_cnt = 0; + num_cals = max_cal_cmds; + } + + for (; cal_cnt < num_cals; cal_cnt++) { + + if (fullcal) { + cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? + tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 + [cal_cnt] : + tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; + } else { + cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? + tbl_tx_iqlo_cal_cmds_recal_nphyrev3[cal_cnt] + : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; + } + + core_no = ((cal_cmd & 0x3000) >> 12); + cal_type = ((cal_cmd & 0x0F00) >> 8); + + if (NREV_GE(pi->pubpi.phy_rev, 6) || + (NREV_IS(pi->pubpi.phy_rev, 5) && + PHY_IPA(pi) + && (CHSPEC_IS2G(pi->radio_chanspec)))) { + if (!ladder_updated[core_no]) { + wlc_phy_update_txcal_ladder_nphy(pi, + core_no); + ladder_updated[core_no] = true; + } + } + + val = + (cal_params[core_no]. + ncorr[cal_type] << 8) | NPHY_N_GCTL; + write_phy_reg(pi, 0xc1, val); + + if ((cal_type == 1) || (cal_type == 3) + || (cal_type == 4)) { + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, + 1, 69 + core_no, 16, + tbl_buf); + + diq_start = tbl_buf[0]; + + tbl_buf[0] = 0; + wlc_phy_table_write_nphy(pi, + NPHY_TBL_ID_IQLOCAL, 1, + 69 + core_no, 16, + tbl_buf); + } + + write_phy_reg(pi, 0xc0, cal_cmd); + + SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), + 20000); + if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, + "HW error: txiq calib")) + return -EIO; + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, + tbl_len, 96, 16, tbl_buf); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, + tbl_len, 64, 16, tbl_buf); + + if ((cal_type == 1) || (cal_type == 3) + || (cal_type == 4)) { + + tbl_buf[0] = diq_start; + + } + + } + + if (mphase) { + pi->mphase_txcal_cmdidx = num_cals; + if (pi->mphase_txcal_cmdidx >= max_cal_cmds) + pi->mphase_txcal_cmdidx = 0; + } + + mphase_cal_lastphase = + (NREV_LE(pi->pubpi.phy_rev, 2)) ? + MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; + + if (!mphase + || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, + 16, tbl_buf); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, + 16, tbl_buf); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + + tbl_buf[0] = 0; + tbl_buf[1] = 0; + tbl_buf[2] = 0; + tbl_buf[3] = 0; + + } + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, + 16, tbl_buf); + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, + 16, tbl_buf); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, + 16, tbl_buf); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, + 16, tbl_buf); + + tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + + tbl_len -= 2; + } + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, + tbl_len, 96, 16, + pi->nphy_txiqlocal_bestc); + + pi->nphy_txiqlocal_coeffsvalid = true; + pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; + } else { + tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + + tbl_len -= 2; + } + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, + tbl_len, 96, 16, + pi->mphase_txcal_bestcoeffs); + } + + wlc_phy_stopplayback_nphy(pi); + + write_phy_reg(pi, 0xc2, 0x0000); + + } + + wlc_phy_txcal_phycleanup_nphy(pi); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + gain_save); + + wlc_phy_txcal_radio_cleanup_nphy(pi); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + if (!mphase + || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) + wlc_phy_tx_iq_war_nphy(pi); + } + + if (NREV_GE(pi->pubpi.phy_rev, 4)) { + pi->phyhang_avoid = phyhang_avoid_state; + } + + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + return bcmerror; +} + +static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi) +{ + u16 tbl_buf[7]; + + if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && + (pi->nphy_txiqlocal_coeffsvalid)) { + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, + ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); + + if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || + (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || + (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || + (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, + 16, pi->nphy_txiqlocal_bestc); + + tbl_buf[0] = 0; + tbl_buf[1] = 0; + tbl_buf[2] = 0; + tbl_buf[3] = 0; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, + 16, tbl_buf); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, + 16, + &pi->nphy_txiqlocal_bestc[5]); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, + 16, + &pi->nphy_txiqlocal_bestc[5]); + } + } +} + +static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi) +{ + nphy_iq_comp_t tx_comp; + + wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, (void *)&tx_comp); + + wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); + wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); + wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); + wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); +} + +void +wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *pcomp) +{ + if (write) { + write_phy_reg(pi, 0x9a, pcomp->a0); + write_phy_reg(pi, 0x9b, pcomp->b0); + write_phy_reg(pi, 0x9c, pcomp->a1); + write_phy_reg(pi, 0x9d, pcomp->b1); + } else { + pcomp->a0 = read_phy_reg(pi, 0x9a); + pcomp->b0 = read_phy_reg(pi, 0x9b); + pcomp->a1 = read_phy_reg(pi, 0x9c); + pcomp->b1 = read_phy_reg(pi, 0x9d); + } +} + +void +wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, u16 num_samps, + u8 wait_time, u8 wait_for_crs) +{ + u8 core; + + write_phy_reg(pi, 0x12b, num_samps); + mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); + mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, + (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); + + mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); + + SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), + 10000); + if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, + "HW error: rxiq est")) + return; + + if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + est[core].i_pwr = + (read_phy_reg(pi, NPHY_IqestipwrAccHi(core)) << 16) + | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); + est[core].q_pwr = + (read_phy_reg(pi, NPHY_IqestqpwrAccHi(core)) << 16) + | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); + est[core].iq_prod = + (read_phy_reg(pi, NPHY_IqestIqAccHi(core)) << 16) | + read_phy_reg(pi, NPHY_IqestIqAccLo(core)); + } + } +} + +#define CAL_RETRY_CNT 2 +static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) +{ + u8 curr_core; + phy_iq_est_t est[PHY_CORE_MAX]; + nphy_iq_comp_t old_comp, new_comp; + s32 iq = 0; + u32 ii = 0, qq = 0; + s16 iq_nbits, qq_nbits, brsh, arsh; + s32 a, b, temp; + int bcmerror = 0; + uint cal_retry = 0; + + if (core_mask == 0x0) + return; + + wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); + new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; + wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); + + cal_try: + wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); + + new_comp = old_comp; + + for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { + + if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { + iq = est[curr_core].iq_prod; + ii = est[curr_core].i_pwr; + qq = est[curr_core].q_pwr; + } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { + iq = est[curr_core].iq_prod; + ii = est[curr_core].i_pwr; + qq = est[curr_core].q_pwr; + } else { + continue; + } + + if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { + bcmerror = -EBADE; + break; + } + + iq_nbits = wlc_phy_nbits(iq); + qq_nbits = wlc_phy_nbits(qq); + + arsh = 10 - (30 - iq_nbits); + if (arsh >= 0) { + a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); + temp = (s32) (ii >> arsh); + if (temp == 0) { + bcmerror = -EBADE; + break; + } + } else { + a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); + temp = (s32) (ii << -arsh); + if (temp == 0) { + bcmerror = -EBADE; + break; + } + } + + a /= temp; + + brsh = qq_nbits - 31 + 20; + if (brsh >= 0) { + b = (qq << (31 - qq_nbits)); + temp = (s32) (ii >> brsh); + if (temp == 0) { + bcmerror = -EBADE; + break; + } + } else { + b = (qq << (31 - qq_nbits)); + temp = (s32) (ii << -brsh); + if (temp == 0) { + bcmerror = -EBADE; + break; + } + } + b /= temp; + b -= a * a; + b = (s32) int_sqrt((unsigned long) b); + b -= (1 << 10); + + if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + new_comp.a0 = (s16) a & 0x3ff; + new_comp.b0 = (s16) b & 0x3ff; + } else { + + new_comp.a0 = (s16) b & 0x3ff; + new_comp.b0 = (s16) a & 0x3ff; + } + } + if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + new_comp.a1 = (s16) a & 0x3ff; + new_comp.b1 = (s16) b & 0x3ff; + } else { + + new_comp.a1 = (s16) b & 0x3ff; + new_comp.b1 = (s16) a & 0x3ff; + } + } + } + + if (bcmerror != 0) { + printk("%s: Failed, cnt = %d\n", __func__, cal_retry); + + if (cal_retry < CAL_RETRY_CNT) { + cal_retry++; + goto cal_try; + } + + new_comp = old_comp; + } else if (cal_retry > 0) { + } + + wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); +} + +static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, u8 rx_core) +{ + u16 offtune_val; + u16 bias_g = 0; + u16 bias_a = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (rx_core == PHY_CORE_0) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); + + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, + 0x3); + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, + 0xaf); + + } else { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); + + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, + 0x3); + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, + 0x7f); + } + + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); + + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, + 0x3); + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, + 0xaf); + + } else { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); + + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, + 0x3); + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, + 0x7f); + } + } + + } else { + if (rx_core == PHY_CORE_0) { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX1); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX0); + + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[2] = + read_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX0); + pi->tx_rx_cal_radio_saveregs[3] = + read_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX1); + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX0); + + write_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX0, 0x40); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX1, bias_a); + + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX0, bias_a); + } else { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE + | RADIO_2056_RX0); + + offtune_val = + (pi-> + tx_rx_cal_radio_saveregs[2] & 0xF0) + >> 8; + offtune_val = + (offtune_val <= 0x7) ? 0xF : 0; + + mod_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE | + RADIO_2056_RX0, 0xF0, + (offtune_val << 8)); + } + + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX1, 0x9); + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX0, 0x9); + } else { + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX0); + + write_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX0, 0x40); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX1, bias_g); + + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX0, bias_g); + + } else { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE + | RADIO_2056_RX0); + + offtune_val = + (pi-> + tx_rx_cal_radio_saveregs[2] & 0xF0) + >> 8; + offtune_val = + (offtune_val <= 0x7) ? 0xF : 0; + + mod_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE | + RADIO_2056_RX0, 0xF0, + (offtune_val << 8)); + } + + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX1, 0x6); + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX0, 0x6); + } + + } else { + pi->tx_rx_cal_radio_saveregs[0] = + read_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX0); + pi->tx_rx_cal_radio_saveregs[1] = + read_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX1); + + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[2] = + read_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX1); + pi->tx_rx_cal_radio_saveregs[3] = + read_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX0); + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX1); + + write_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX1, 0x40); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX0, bias_a); + + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX1, bias_a); + } else { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE + | RADIO_2056_RX1); + + offtune_val = + (pi-> + tx_rx_cal_radio_saveregs[2] & 0xF0) + >> 8; + offtune_val = + (offtune_val <= 0x7) ? 0xF : 0; + + mod_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE | + RADIO_2056_RX1, 0xF0, + (offtune_val << 8)); + } + + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX0, 0x9); + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX1, 0x9); + } else { + if (pi->pubpi.radiorev >= 5) { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX1); + + write_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX1, 0x40); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX0, bias_g); + + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX1, bias_g); + } else { + pi->tx_rx_cal_radio_saveregs[4] = + read_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE + | RADIO_2056_RX1); + + offtune_val = + (pi-> + tx_rx_cal_radio_saveregs[2] & 0xF0) + >> 8; + offtune_val = + (offtune_val <= 0x7) ? 0xF : 0; + + mod_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE | + RADIO_2056_RX1, 0xF0, + (offtune_val << 8)); + } + + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX0, 0x6); + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX1, 0x6); + } + } + } +} + +static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, u8 rx_core) +{ + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (rx_core == PHY_CORE_0) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, + pi-> + tx_rx_cal_radio_saveregs[0]); + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, + pi-> + tx_rx_cal_radio_saveregs[1]); + + } else { + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, + pi-> + tx_rx_cal_radio_saveregs[0]); + write_radio_reg(pi, + RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, + pi-> + tx_rx_cal_radio_saveregs[1]); + } + + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, + pi-> + tx_rx_cal_radio_saveregs[0]); + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, + pi-> + tx_rx_cal_radio_saveregs[1]); + + } else { + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, + pi-> + tx_rx_cal_radio_saveregs[0]); + write_radio_reg(pi, + RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, + pi-> + tx_rx_cal_radio_saveregs[1]); + } + } + + } else { + if (rx_core == PHY_CORE_0) { + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX1, + pi->tx_rx_cal_radio_saveregs[0]); + + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX0, + pi->tx_rx_cal_radio_saveregs[1]); + + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX0, + pi-> + tx_rx_cal_radio_saveregs[2]); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX1, + pi-> + tx_rx_cal_radio_saveregs[3]); + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX0, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } else { + write_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE + | RADIO_2056_RX0, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } + } else { + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX0, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } else { + write_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE + | RADIO_2056_RX0, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } + } + + } else { + write_radio_reg(pi, + RADIO_2056_TX_RXIQCAL_TXMUX | + RADIO_2056_TX0, + pi->tx_rx_cal_radio_saveregs[0]); + + write_radio_reg(pi, + RADIO_2056_RX_RXIQCAL_RXMUX | + RADIO_2056_RX1, + pi->tx_rx_cal_radio_saveregs[1]); + + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_RXSPARE2 | + RADIO_2056_RX1, + pi-> + tx_rx_cal_radio_saveregs[2]); + + write_radio_reg(pi, + RADIO_2056_TX_TXSPARE2 | + RADIO_2056_TX0, + pi-> + tx_rx_cal_radio_saveregs[3]); + } + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_LNAA_MASTER + | RADIO_2056_RX1, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } else { + write_radio_reg(pi, + RADIO_2056_RX_LNAA_TUNE + | RADIO_2056_RX1, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } + } else { + if (pi->pubpi.radiorev >= 5) { + write_radio_reg(pi, + RADIO_2056_RX_LNAG_MASTER + | RADIO_2056_RX1, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } else { + write_radio_reg(pi, + RADIO_2056_RX_LNAG_TUNE + | RADIO_2056_RX1, + pi-> + tx_rx_cal_radio_saveregs + [4]); + } + } + } + } +} + +static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, u8 rx_core) +{ + u8 tx_core; + u16 rx_antval, tx_antval; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + tx_core = rx_core; + } else { + tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; + } + + pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); + pi->tx_rx_cal_phy_saveregs[1] = + read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); + pi->tx_rx_cal_phy_saveregs[2] = + read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); + pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); + pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); + pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); + pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); + pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); + pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); + pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); + pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); + pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); + } + + pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); + pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); + + mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); + + } else { + + mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); + mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); + mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); + mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); + } + + mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); + mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, + (0x1 << 2), (0x1 << 2)); + if (NREV_LT(pi->pubpi.phy_rev, 7)) { + mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), + (0x1 << 0) | (0x1 << 1), 0); + mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? + 0x8f : 0xa5, + (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); + } + + wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, + RADIO_MIMO_CORESEL_CORE1 | + RADIO_MIMO_CORESEL_CORE2); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), + 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + if (CHSPEC_IS40(pi->radio_chanspec)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 7), + 2, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } else { + wlc_phy_rfctrl_override_nphy_rev7(pi, + (0x1 << 7), + 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), + 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); + } + + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + 0x1, rx_core + 1); + } else { + + if (rx_core == PHY_CORE_0) { + rx_antval = 0x1; + tx_antval = 0x8; + } else { + rx_antval = 0x4; + tx_antval = 0x2; + } + + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + rx_antval, rx_core + 1); + wlc_phy_rfctrlintc_override_nphy(pi, + NPHY_RfctrlIntc_override_TRSW, + tx_antval, tx_core + 1); + } +} + +static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, u8 rx_core) +{ + + write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); + write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, + pi->tx_rx_cal_phy_saveregs[1]); + write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, + pi->tx_rx_cal_phy_saveregs[2]); + write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); + write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); + + write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); + write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); + write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); + write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); + write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); + write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); + write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); + } + + write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); + write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); +} + +static void +wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, + u16 *rxgain, u8 cal_type) +{ + + u16 num_samps; + phy_iq_est_t est[PHY_CORE_MAX]; + u8 tx_core; + nphy_iq_comp_t save_comp, zero_comp; + u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, thresh_pwr = + 10000; + s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; + bool gainctrl_done = false; + u8 mix_tia_gain = 3; + s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; + s8 curr_gaintbl_index = 3; + u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; + nphy_ipa_txrxgain_t *nphy_rxcal_gaintbl; + u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; + int fine_gain_idx; + s8 txpwrindex; + u16 nphy_rxcal_txgain[2]; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + tx_core = rx_core; + } else { + tx_core = 1 - rx_core; + } + + num_samps = 1024; + desired_log2_pwr = (cal_type == 0) ? 13 : 13; + + wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); + zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; + wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mix_tia_gain = 3; + } else if (NREV_GE(pi->pubpi.phy_rev, 4)) { + mix_tia_gain = 4; + } else { + mix_tia_gain = 6; + } + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; + } else { + nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; + } + } else { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; + } else { + nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; + } + } + + do { + + hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? + 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; + lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; + lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; + lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; + lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; + txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_rxgain, + ((lpf_biq1 << 12) | + (lpf_biq0 << 8) | + (mix_tia_gain << + 4) | (lna2 << 2) + | lna1), 0x3, 0); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), + ((hpvga << 12) | + (lpf_biq1 << 10) | + (lpf_biq0 << 8) | + (mix_tia_gain << 4) | + (lna2 << 2) | lna1), 0x3, + 0); + } + + pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; + + if (txpwrindex == -1) { + nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; + nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, + 2, 0x110, 16, + nphy_rxcal_txgain); + } else { + wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, + false); + } + + wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? + NPHY_RXCAL_TONEFREQ_40MHz : + NPHY_RXCAL_TONEFREQ_20MHz, + NPHY_RXCAL_TONEAMP, 0, cal_type, false); + + wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); + i_pwr = (est[rx_core].i_pwr + num_samps / 2) / num_samps; + q_pwr = (est[rx_core].q_pwr + num_samps / 2) / num_samps; + curr_pwr = i_pwr + q_pwr; + + switch (gainctrl_dirn) { + case NPHY_RXCAL_GAIN_INIT: + if (curr_pwr > thresh_pwr) { + gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; + prev_gaintbl_index = curr_gaintbl_index; + curr_gaintbl_index--; + } else { + gainctrl_dirn = NPHY_RXCAL_GAIN_UP; + prev_gaintbl_index = curr_gaintbl_index; + curr_gaintbl_index++; + } + break; + + case NPHY_RXCAL_GAIN_UP: + if (curr_pwr > thresh_pwr) { + gainctrl_done = true; + optim_pwr = prev_pwr; + optim_gaintbl_index = prev_gaintbl_index; + } else { + prev_gaintbl_index = curr_gaintbl_index; + curr_gaintbl_index++; + } + break; + + case NPHY_RXCAL_GAIN_DOWN: + if (curr_pwr > thresh_pwr) { + prev_gaintbl_index = curr_gaintbl_index; + curr_gaintbl_index--; + } else { + gainctrl_done = true; + optim_pwr = curr_pwr; + optim_gaintbl_index = curr_gaintbl_index; + } + break; + + default: + break; + } + + if ((curr_gaintbl_index < 0) || + (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { + gainctrl_done = true; + optim_pwr = curr_pwr; + optim_gaintbl_index = prev_gaintbl_index; + } else { + prev_pwr = curr_pwr; + } + + wlc_phy_stopplayback_nphy(pi); + } while (!gainctrl_done); + + hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; + lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; + lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; + lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; + lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; + txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; + + actual_log2_pwr = wlc_phy_nbits(optim_pwr); + delta_pwr = desired_log2_pwr - actual_log2_pwr; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + fine_gain_idx = (int)lpf_biq1 + delta_pwr; + + if (fine_gain_idx + (int)lpf_biq0 > 10) { + lpf_biq1 = 10 - lpf_biq0; + } else { + lpf_biq1 = (u16) max(fine_gain_idx, 0); + } + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_rxgain, + ((lpf_biq1 << 12) | + (lpf_biq0 << 8) | + (mix_tia_gain << 4) | + (lna2 << 2) | lna1), 0x3, + 0); + } else { + hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), + ((hpvga << 12) | (lpf_biq1 << 10) | + (lpf_biq0 << 8) | (mix_tia_gain << + 4) | (lna2 << + 2) | + lna1), 0x3, 0); + + } + + if (rxgain != NULL) { + *rxgain++ = lna1; + *rxgain++ = lna2; + *rxgain++ = mix_tia_gain; + *rxgain++ = lpf_biq0; + *rxgain++ = lpf_biq1; + *rxgain = hpvga; + } + + wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); +} + +static void +wlc_phy_rxcal_gainctrl_nphy(phy_info_t *pi, u8 rx_core, u16 *rxgain, + u8 cal_type) +{ + wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); +} + +static u8 +wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) +{ + u32 target_bws[2] = { 9500, 21000 }; + u32 ref_tones[2] = { 3000, 6000 }; + u32 target_bw, ref_tone; + + u32 target_pwr_ratios[2] = { 28606, 18468 }; + u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; + + u16 start_rccal_ovr_val = 128; + u16 txlpf_rccal_lpc_ovr_val = 128; + u16 rxlpf_rccal_hpc_ovr_val = 159; + + u16 orig_txlpf_rccal_lpc_ovr_val; + u16 orig_rxlpf_rccal_hpc_ovr_val; + u16 radio_addr_offset_rx; + u16 radio_addr_offset_tx; + u16 orig_dcBypass; + u16 orig_RxStrnFilt40Num[6]; + u16 orig_RxStrnFilt40Den[4]; + u16 orig_rfctrloverride[2]; + u16 orig_rfctrlauxreg[2]; + u16 orig_rfctrlrssiothers; + u16 tx_lpf_bw = 4; + + u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; + u16 lpf_hpc = 7, hpvga_hpc = 7; + + s8 rccal_stepsize; + u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; + u32 ref_iq_vals = 0, target_iq_vals = 0; + u16 num_samps, log_num_samps = 10; + phy_iq_est_t est[PHY_CORE_MAX]; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + return 0; + } + + num_samps = (1 << log_num_samps); + + if (CHSPEC_IS40(pi->radio_chanspec)) { + target_bw = target_bws[1]; + target_pwr_ratio = target_pwr_ratios[1]; + ref_tone = ref_tones[1]; + rx_lpf_bw = rx_lpf_bws[1]; + } else { + target_bw = target_bws[0]; + target_pwr_ratio = target_pwr_ratios[0]; + ref_tone = ref_tones[0]; + rx_lpf_bw = rx_lpf_bws[0]; + } + + if (core_idx == 0) { + radio_addr_offset_rx = RADIO_2056_RX0; + radio_addr_offset_tx = + (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; + } else { + radio_addr_offset_rx = RADIO_2056_RX1; + radio_addr_offset_tx = + (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; + } + + orig_txlpf_rccal_lpc_ovr_val = + read_radio_reg(pi, + (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx)); + orig_rxlpf_rccal_hpc_ovr_val = + read_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_HPC | + radio_addr_offset_rx)); + + orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); + + orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); + orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); + orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); + orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); + orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); + orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); + orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); + orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); + orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); + orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); + + orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); + orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); + orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); + orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); + orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); + + write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), + txlpf_rccal_lpc_ovr_val); + + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), + rxlpf_rccal_hpc_ovr_val); + + mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); + + write_phy_reg(pi, 0x267, 0x02d4); + write_phy_reg(pi, 0x268, 0x0000); + write_phy_reg(pi, 0x269, 0x0000); + write_phy_reg(pi, 0x26a, 0x0000); + write_phy_reg(pi, 0x26b, 0x0000); + write_phy_reg(pi, 0x26c, 0x02d4); + write_phy_reg(pi, 0x26d, 0x0000); + write_phy_reg(pi, 0x26e, 0x0000); + write_phy_reg(pi, 0x26f, 0x0000); + write_phy_reg(pi, 0x270, 0x0000); + + or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); + or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); + or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); + or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); + + mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, + (0x7 << 10), (tx_lpf_bw << 10)); + mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, + (0x7 << 0), (hpvga_hpc << 0)); + mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, + (0x7 << 4), (lpf_hpc << 4)); + mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, + (0x7 << 8), (rx_lpf_bw << 8)); + + rccal_stepsize = 16; + rccal_val = start_rccal_ovr_val + rccal_stepsize; + + while (rccal_stepsize >= 0) { + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_LPC | + radio_addr_offset_rx), rccal_val); + + if (rccal_stepsize == 16) { + + wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, + 0, 1, false); + udelay(2); + + wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); + + if (core_idx == 0) { + ref_iq_vals = + max_t(u32, (est[0].i_pwr + + est[0].q_pwr) >> (log_num_samps + 1), + 1); + } else { + ref_iq_vals = + max_t(u32, (est[1].i_pwr + + est[1].q_pwr) >> (log_num_samps + 1), + 1); + } + + wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, + 0, 1, false); + udelay(2); + } + + wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); + + if (core_idx == 0) { + target_iq_vals = + (est[0].i_pwr + est[0].q_pwr) >> (log_num_samps + + 1); + } else { + target_iq_vals = + (est[1].i_pwr + est[1].q_pwr) >> (log_num_samps + + 1); + } + pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); + + if (rccal_stepsize == 0) { + rccal_stepsize--; + } else if (rccal_stepsize == 1) { + last_rccal_val = rccal_val; + rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; + last_pwr_ratio = pwr_ratio; + rccal_stepsize--; + } else { + rccal_stepsize = (rccal_stepsize >> 1); + rccal_val += ((pwr_ratio > target_pwr_ratio) ? + rccal_stepsize : (-rccal_stepsize)); + } + + if (rccal_stepsize == -1) { + best_rccal_val = + (ABS((int)last_pwr_ratio - (int)target_pwr_ratio) < + ABS((int)pwr_ratio - + (int)target_pwr_ratio)) ? last_rccal_val : + rccal_val; + + if (CHSPEC_IS40(pi->radio_chanspec)) { + if ((best_rccal_val > 140) + || (best_rccal_val < 135)) { + best_rccal_val = 138; + } + } else { + if ((best_rccal_val > 142) + || (best_rccal_val < 137)) { + best_rccal_val = 140; + } + } + + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_LPC | + radio_addr_offset_rx), best_rccal_val); + } + } + + wlc_phy_stopplayback_nphy(pi); + + write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), + orig_txlpf_rccal_lpc_ovr_val); + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), + orig_rxlpf_rccal_hpc_ovr_val); + + mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); + + write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); + write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); + write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); + write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); + write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); + write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); + write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); + write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); + write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); + write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); + + write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); + write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); + write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); + write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); + write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); + + pi->nphy_anarxlpf_adjusted = false; + + return best_rccal_val - 0x80; +} + +#define WAIT_FOR_SCOPE 4000 +static int +wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, + u8 cal_type, bool debug) +{ + u16 orig_BBConfig; + u8 core_no, rx_core; + u8 best_rccal[2]; + u16 gain_save[2]; + u16 cal_gain[2]; + nphy_iqcal_params_t cal_params[2]; + u8 rxcore_state; + s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; + s8 txlpf_idac; + bool phyhang_avoid_state = false; + bool skip_rxiqcal = false; + + orig_BBConfig = read_phy_reg(pi, 0x01); + mod_phy_reg(pi, 0x01, (0x1 << 15), 0); + + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (NREV_GE(pi->pubpi.phy_rev, 4)) { + phyhang_avoid_state = pi->phyhang_avoid; + pi->phyhang_avoid = false; + } + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); + + for (core_no = 0; core_no <= 1; core_no++) { + wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, + &cal_params[core_no]); + cal_gain[core_no] = cal_params[core_no].cal_gain; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); + + rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); + + for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { + + skip_rxiqcal = + ((rxcore_state & (1 << rx_core)) == 0) ? true : false; + + wlc_phy_rxcal_physetup_nphy(pi, rx_core); + + wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); + + if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { + + wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); + + wlc_phy_tx_tone_nphy(pi, + (CHSPEC_IS40(pi->radio_chanspec)) ? + NPHY_RXCAL_TONEFREQ_40MHz : + NPHY_RXCAL_TONEFREQ_20MHz, + NPHY_RXCAL_TONEAMP, 0, cal_type, + false); + + if (debug) + mdelay(WAIT_FOR_SCOPE); + + wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); + wlc_phy_stopplayback_nphy(pi); + } + + if (((cal_type == 1) || (cal_type == 2)) + && NREV_LT(pi->pubpi.phy_rev, 7)) { + + if (rx_core == PHY_CORE_1) { + + if (rxcore_state == 1) { + wlc_phy_rxcore_setstate_nphy((wlc_phy_t + *) pi, 3); + } + + wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, + 1); + + best_rccal[rx_core] = + wlc_phy_rc_sweep_nphy(pi, rx_core, 1); + pi->nphy_rccal_value = best_rccal[rx_core]; + + if (rxcore_state == 1) { + wlc_phy_rxcore_setstate_nphy((wlc_phy_t + *) pi, + rxcore_state); + } + } + } + + wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); + + wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + } + + if ((cal_type == 1) || (cal_type == 2)) { + + best_rccal[0] = best_rccal[1]; + write_radio_reg(pi, + (RADIO_2056_RX_RXLPF_RCCAL_LPC | + RADIO_2056_RX0), (best_rccal[0] | 0x80)); + + for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { + rxlpf_rccal_hpc = + (((int)best_rccal[rx_core] - 12) >> 1) + 10; + txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; + + if (PHY_IPA(pi)) { + txlpf_rccal_lpc += IS40MHZ(pi) ? 24 : 12; + txlpf_idac = IS40MHZ(pi) ? 0x0e : 0x13; + WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, + TXLPF_IDAC_4, txlpf_idac); + } + + rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 0); + txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 0); + + write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | + ((rx_core == + PHY_CORE_0) ? RADIO_2056_RX0 : + RADIO_2056_RX1)), + (rxlpf_rccal_hpc | 0x80)); + + write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | + ((rx_core == + PHY_CORE_0) ? RADIO_2056_TX0 : + RADIO_2056_TX1)), + (txlpf_rccal_lpc | 0x80)); + } + } + + write_phy_reg(pi, 0x01, orig_BBConfig); + + wlc_phy_resetcca_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_rxgain, + 0, 0x3, 1); + } else { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); + } + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + gain_save); + + if (NREV_GE(pi->pubpi.phy_rev, 4)) { + pi->phyhang_avoid = phyhang_avoid_state; + } + + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + return 0; +} + +static int +wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, + bool debug) +{ + phy_iq_est_t est[PHY_CORE_MAX]; + u8 core_num, rx_core, tx_core; + u16 lna_vals[] = { 0x3, 0x3, 0x1 }; + u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; + u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; + s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; + s16 desired_log2_pwr, actual_log2_pwr, hpf_change; + u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; + u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; + u16 num_samps; + u32 i_pwr, q_pwr, tot_pwr[3]; + u8 gain_pass, use_hpf_num; + u16 mask, val1, val2; + u16 core_no; + u16 gain_save[2]; + u16 cal_gain[2]; + nphy_iqcal_params_t cal_params[2]; + u8 phy_bw; + int bcmerror = 0; + bool first_playtone = true; + + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + + wlc_phy_reapply_txcal_coeffs_nphy(pi); + } + + wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); + + for (core_no = 0; core_no <= 1; core_no++) { + wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, + &cal_params[core_no]); + cal_gain[core_no] = cal_params[core_no].cal_gain; + } + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); + + num_samps = 1024; + desired_log2_pwr = 13; + + for (core_num = 0; core_num < 2; core_num++) { + + rx_core = core_num; + tx_core = 1 - core_num; + + orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); + orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? + 0xa6 : 0xa7); + orig_AfectrlOverride = read_phy_reg(pi, 0xa5); + orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? + 0x91 : 0x92); + orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? + 0x91 : 0x92); + + mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); + mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); + + or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), + ((0x1 << 1) | (0x1 << 2))); + or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); + + if (((pi->nphy_rxcalparams) & 0xff000000)) { + + write_phy_reg(pi, + (rx_core == PHY_CORE_0) ? 0x91 : 0x92, + (CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : + 0x110)); + } else { + + write_phy_reg(pi, + (rx_core == PHY_CORE_0) ? 0x91 : 0x92, + (CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : + 0x120)); + } + + write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, + (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : + 0x114)); + + mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; + if (rx_core == PHY_CORE_0) { + val1 = RADIO_2055_COUPLE_RX_MASK; + val2 = RADIO_2055_COUPLE_TX_MASK; + } else { + val1 = RADIO_2055_COUPLE_TX_MASK; + val2 = RADIO_2055_COUPLE_RX_MASK; + } + + if ((pi->nphy_rxcalparams & 0x10000)) { + mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, + val1); + mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, + val2); + } + + for (gain_pass = 0; gain_pass < 4; gain_pass++) { + + if (debug) + mdelay(WAIT_FOR_SCOPE); + + if (gain_pass < 3) { + curr_lna = lna_vals[gain_pass]; + curr_hpf1 = hpf1_vals[gain_pass]; + curr_hpf2 = hpf2_vals[gain_pass]; + } else { + + if (tot_pwr[1] > 10000) { + curr_lna = lna_vals[2]; + curr_hpf1 = hpf1_vals[2]; + curr_hpf2 = hpf2_vals[2]; + use_hpf_num = 1; + curr_hpf = curr_hpf1; + actual_log2_pwr = + wlc_phy_nbits(tot_pwr[2]); + } else { + if (tot_pwr[0] > 10000) { + curr_lna = lna_vals[1]; + curr_hpf1 = hpf1_vals[1]; + curr_hpf2 = hpf2_vals[1]; + use_hpf_num = 1; + curr_hpf = curr_hpf1; + actual_log2_pwr = + wlc_phy_nbits(tot_pwr[1]); + } else { + curr_lna = lna_vals[0]; + curr_hpf1 = hpf1_vals[0]; + curr_hpf2 = hpf2_vals[0]; + use_hpf_num = 2; + curr_hpf = curr_hpf2; + actual_log2_pwr = + wlc_phy_nbits(tot_pwr[0]); + } + } + + hpf_change = desired_log2_pwr - actual_log2_pwr; + curr_hpf += hpf_change; + curr_hpf = max(min_t(u16, curr_hpf, 10), 0); + if (use_hpf_num == 1) { + curr_hpf1 = curr_hpf; + } else { + curr_hpf2 = curr_hpf; + } + } + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), + ((curr_hpf2 << 8) | + (curr_hpf1 << 4) | + (curr_lna << 2)), 0x3, 0); + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + + wlc_phy_stopplayback_nphy(pi); + + if (first_playtone) { + bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, + (u16) (pi-> + nphy_rxcalparams + & + 0xffff), + 0, 0, true); + first_playtone = false; + } else { + phy_bw = + (CHSPEC_IS40(pi->radio_chanspec)) ? 40 : 20; + wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, + 0, 0, 0, true); + } + + if (bcmerror == 0) { + if (gain_pass < 3) { + + wlc_phy_rx_iq_est_nphy(pi, est, + num_samps, 32, + 0); + i_pwr = + (est[rx_core].i_pwr + + num_samps / 2) / num_samps; + q_pwr = + (est[rx_core].q_pwr + + num_samps / 2) / num_samps; + tot_pwr[gain_pass] = i_pwr + q_pwr; + } else { + + wlc_phy_calc_rx_iq_comp_nphy(pi, + (1 << + rx_core)); + } + + wlc_phy_stopplayback_nphy(pi); + } + + if (bcmerror != 0) + break; + } + + and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); + and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); + + write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : + 0x92, orig_RfctrlIntcTx); + write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : + 0x92, orig_RfctrlIntcRx); + write_phy_reg(pi, 0xa5, orig_AfectrlOverride); + write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : + 0xa7, orig_AfectrlCore); + write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); + + if (bcmerror != 0) + break; + } + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); + wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, + gain_save); + + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + return bcmerror; +} + +int +wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, + u8 cal_type, bool debug) +{ + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + cal_type = 0; + } + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, + debug); + } else { + return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); + } +} + +static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi) +{ + int j, type = 2; + u16 addr_offset = 0x2c5; + + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, addr_offset + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); + } +} + +static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi) +{ + int j, type; + u16 addr_offset[] = { 0x186, 0x195, + 0x2c5 + }; + + for (type = 0; type < 3; type++) { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, addr_offset[type] + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); + } + } + + if (IS40MHZ(pi)) { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, 0x186 + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); + } + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, 0x186 + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[5] + [j]); + } + } + + if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, 0x2c5 + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[6] + [j]); + } + } + } +} + +static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi) +{ + int j; + + if (IS40MHZ(pi)) { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, 0x195 + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); + } + } else { + for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { + write_phy_reg(pi, 0x186 + j, + NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); + } + } +} + +static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi) +{ + u16 m0m1; + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); + + return m0m1; +} + +static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1) +{ + u16 m0m1 = (u16) ((m0 << 8) | m1); + + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); + wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); +} + +static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) +{ + u32 *tx_pwrctrl_tbl = NULL; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if ((pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)) { + + tx_pwrctrl_tbl = + nphy_tpc_txgain_ipa_2g_2057rev4n6; + } else if (pi->pubpi.radiorev == 3) { + + tx_pwrctrl_tbl = + nphy_tpc_txgain_ipa_2g_2057rev3; + } else if (pi->pubpi.radiorev == 5) { + + tx_pwrctrl_tbl = + nphy_tpc_txgain_ipa_2g_2057rev5; + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + tx_pwrctrl_tbl = + nphy_tpc_txgain_ipa_2g_2057rev7; + } + + } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { + + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; + if (pi->sh->chip == BCM47162_CHIP_ID) { + + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; + } + + } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { + + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; + } else { + + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; + } + + } else { + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + tx_pwrctrl_tbl = + nphy_tpc_txgain_ipa_5g_2057rev7; + } + + } else { + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; + } + } + + return tx_pwrctrl_tbl; +} + +static void +wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, + u8 core) +{ + s32 tone_freq; + u8 off_core; + u16 mixgain = 0; + + off_core = core ^ 0x1; + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + if (NREV_IS(pi->pubpi.phy_rev, 7) + || NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), + wlc_phy_read_lpf_bw_ctl_nphy + (pi, 0), 0, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->pubpi.radiorev == 5) { + mixgain = (core == 0) ? 0x20 : 0x00; + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + mixgain = 0x00; + + } else if ((pi->pubpi.radiorev <= 4) + || (pi->pubpi.radiorev == 6)) { + + mixgain = 0x00; + } + + } else { + if ((pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + + mixgain = 0x50; + } else if ((pi->pubpi.radiorev == 3) + || (pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + mixgain = 0x0; + } + } + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), + mixgain, (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_tx_pu, + 1, (1 << core), 0); + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_tx_pu, + 0, (1 << off_core), 0); + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), + 0, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), + 0, (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, + (1 << core), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + + state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? + 0xa6 : 0xa7); + state->afeoverride[core] = + read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); + state->afectrl[off_core] = + read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); + state->afeoverride[off_core] = + read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); + + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), + (0x1 << 2), 0); + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : + 0xa5), (0x1 << 2), (0x1 << 2)); + + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), + (0x1 << 2), (0x1 << 2)); + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : + 0x8f), (0x1 << 2), (0x1 << 2)); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + state->pwrup[core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_PWRUP); + state->atten[core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_ATTEN); + state->pwrup[off_core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_2G_PWRUP); + state->atten[off_core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_2G_ATTEN); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_PWRUP, 0xc); + + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_ATTEN, 0xf0); + + } else if (pi->pubpi.radiorev == 5) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_ATTEN, + (core == 0) ? 0xf7 : 0xf2); + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_ATTEN, 0xf0); + + } + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_2G_PWRUP, 0x0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_2G_ATTEN, 0xff); + + } else { + state->pwrup[core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_PWRUP); + state->atten[core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_ATTEN); + state->pwrup[off_core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_5G_PWRUP); + state->atten[off_core] = + READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_5G_ATTEN); + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_PWRUP, 0xc); + + if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_ATTEN, 0xf4); + + } else { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_ATTEN, 0xf0); + } + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_5G_PWRUP, 0x0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, + TXRXCOUPLE_5G_ATTEN, 0xff); + } + + tone_freq = 4000; + + wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (1) << 13); + + mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); + + mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (0) << 13); + + } else { + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); + + state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? + 0xa6 : 0xa7); + state->afeoverride[core] = + read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); + + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), + (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : + 0xa5), + (0x1 << 0) | + (0x1 << 1) | + (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); + + state->vga_master[core] = + READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); + if (CHSPEC_IS2G(pi->radio_chanspec)) { + state->fbmix[core] = + READ_RADIO_REG2(pi, RADIO_2056, RX, core, + TXFBMIX_G); + state->intpa_master[core] = + READ_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_MASTER); + + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, + 0x03); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_MASTER, 0x04); + } else { + state->fbmix[core] = + READ_RADIO_REG2(pi, RADIO_2056, RX, core, + TXFBMIX_A); + state->intpa_master[core] = + READ_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_MASTER); + + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, + 0x03); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_MASTER, 0x04); + + } + + tone_freq = 4000; + + wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); + } +} + +static void +wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) +{ + u8 core; + + wlc_phy_stopplayback_nphy(pi); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_PWRUP, 0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_2G_ATTEN, + state->atten[core]); + } else { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_PWRUP, 0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TXRXCOUPLE_5G_ATTEN, + state->atten[core]); + } + } + + if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), + 1, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), + 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), + 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID2); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + write_phy_reg(pi, (core == PHY_CORE_0) ? + 0xa6 : 0xa7, state->afectrl[core]); + write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : + 0xa5, state->afeoverride[core]); + } + + wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, + (state->mm & 0xff)); + + if (NREV_IS(pi->pubpi.phy_rev, 7) + || NREV_GE(pi->pubpi.phy_rev, 8)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 0, 0, + 1, + NPHY_REV7_RFCTRLOVERRIDE_ID1); + } + } else { + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, + state->vga_master[core]); + if (CHSPEC_IS2G(pi->radio_chanspec)) { + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, + TXFBMIX_G, state->fbmix[core]); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAG_MASTER, + state->intpa_master[core]); + } else { + WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, + TXFBMIX_A, state->fbmix[core]); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + INTPAA_MASTER, + state->intpa_master[core]); + } + + write_phy_reg(pi, (core == PHY_CORE_0) ? + 0xa6 : 0xa7, state->afectrl[core]); + write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : + 0xa5, state->afeoverride[core]); + } + + wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, + (state->mm & 0xff)); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); + } +} + +static void +wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32 start, + u32 end) +{ + u32 *buf, *src, *dst, sz; + + sz = end - start + 1; + + buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); + if (NULL == buf) { + return; + } + + src = buf; + dst = buf + NPHY_PAPD_EPS_TBL_SIZE; + + wlc_phy_table_read_nphy(pi, + (core == + PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : + NPHY_TBL_ID_EPSILONTBL1), + NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); + + do { + u32 phy_a1, phy_a2; + s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; + + phy_a1 = end - min(end, (winsz >> 1)); + phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, end + (winsz >> 1)); + phy_a3 = phy_a2 - phy_a1 + 1; + phy_a6 = 0; + phy_a7 = 0; + + do { + wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, + &phy_a5); + phy_a6 += phy_a4; + phy_a7 += phy_a5; + } while (phy_a2-- != phy_a1); + + phy_a6 /= phy_a3; + phy_a7 /= phy_a3; + dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); + } while (end-- != start); + + wlc_phy_table_write_nphy(pi, + (core == + PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : + NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); + + kfree(buf); +} + +static void +wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, + phy_cal_mode_t cal_mode, u8 core) +{ + u16 phy_a1, phy_a2, phy_a3; + u16 phy_a4, phy_a5; + bool phy_a6; + u8 phy_a7, m[2]; + u32 phy_a8 = 0; + nphy_txgains_t phy_a9; + + if (NREV_LT(pi->pubpi.phy_rev, 3)) + return; + + phy_a7 = (core == PHY_CORE_0) ? 1 : 0; + + phy_a6 = ((cal_mode == CAL_GCTRL) + || (cal_mode == CAL_SOFT)) ? true : false; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + phy_a9 = wlc_phy_get_tx_gain_nphy(pi); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + phy_a5 = ((phy_a9.txlpf[core] << 15) | + (phy_a9.txgm[core] << 12) | + (phy_a9.pga[core] << 8) | + (txgains->gains.pad[core] << 3) | + (phy_a9.ipa[core])); + } else { + phy_a5 = ((phy_a9.txlpf[core] << 15) | + (phy_a9.txgm[core] << 12) | + (txgains->gains.pga[core] << 8) | + (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); + } + + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_txgain, + phy_a5, (1 << core), 0); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if ((pi->pubpi.radiorev <= 4) + || (pi->pubpi.radiorev == 6)) { + + m[core] = IS40MHZ(pi) ? 60 : 79; + } else { + + m[core] = IS40MHZ(pi) ? 45 : 64; + } + + } else { + m[core] = IS40MHZ(pi) ? 75 : 107; + } + + m[phy_a7] = 0; + wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); + + phy_a2 = 63; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->sh->chip == BCM6362_CHIP_ID) { + phy_a1 = 35; + phy_a3 = 35; + } else if ((pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)) { + phy_a1 = 30; + phy_a3 = 30; + } else { + phy_a1 = 25; + phy_a3 = 25; + } + } else { + if ((pi->pubpi.radiorev == 5) + || (pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + phy_a1 = 25; + phy_a3 = 25; + } else { + phy_a1 = 35; + phy_a3 = 35; + } + } + + if (cal_mode == CAL_GCTRL) { + if ((pi->pubpi.radiorev == 5) + && (CHSPEC_IS2G(pi->radio_chanspec))) { + phy_a1 = 55; + } else if (((pi->pubpi.radiorev == 7) && + (CHSPEC_IS2G(pi->radio_chanspec))) || + ((pi->pubpi.radiorev == 8) && + (CHSPEC_IS2G(pi->radio_chanspec)))) { + phy_a1 = 60; + } else { + phy_a1 = 63; + } + + } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { + + phy_a1 = 35; + phy_a3 = 35; + } + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (1) << 13); + + mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (0) << 13); + + write_phy_reg(pi, 0x2a1, 0x80); + write_phy_reg(pi, 0x2a2, 0x100); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 4), (11) << 4); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 8), (11) << 8); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 0), (0x3) << 0); + + write_phy_reg(pi, 0x2e5, 0x20); + + mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); + + mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); + + mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), + 1, ((core == 0) ? 1 : 2), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), + 0, ((core == 0) ? 2 : 1), 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + + write_phy_reg(pi, 0x2be, 1); + SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); + + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), + 0, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + + wlc_phy_table_write_nphy(pi, + (core == + PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 + : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, + 32, &phy_a8); + + if (cal_mode != CAL_GCTRL) { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + wlc_phy_a1_nphy(pi, core, 5, 0, 35); + } + } + + wlc_phy_rfctrl_override_1tomany_nphy(pi, + NPHY_REV7_RfctrlOverride_cmd_txgain, + phy_a5, (1 << core), 1); + + } else { + + if (txgains) { + if (txgains->useindex) { + phy_a4 = 15 - ((txgains->index) >> 3); + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + phy_a5 = 0x00f7 | (phy_a4 << 8); + + if (pi->sh->chip == + BCM47162_CHIP_ID) { + phy_a5 = + 0x10f7 | (phy_a4 << + 8); + } + } else + if (NREV_IS(pi->pubpi.phy_rev, 5)) + phy_a5 = 0x10f7 | (phy_a4 << 8); + else + phy_a5 = 0x50f7 | (phy_a4 << 8); + } else { + phy_a5 = 0x70f7 | (phy_a4 << 8); + } + wlc_phy_rfctrl_override_nphy(pi, + (0x1 << 13), + phy_a5, + (1 << core), 0); + } else { + wlc_phy_rfctrl_override_nphy(pi, + (0x1 << 13), + 0x5bf7, + (1 << core), 0); + } + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + m[core] = IS40MHZ(pi) ? 45 : 64; + } else { + m[core] = IS40MHZ(pi) ? 75 : 107; + } + + m[phy_a7] = 0; + wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); + + phy_a2 = 63; + + if (cal_mode == CAL_FULL) { + phy_a1 = 25; + phy_a3 = 25; + } else if (cal_mode == CAL_SOFT) { + phy_a1 = 25; + phy_a3 = 25; + } else if (cal_mode == CAL_GCTRL) { + phy_a1 = 63; + phy_a3 = 25; + } else { + + phy_a1 = 25; + phy_a3 = 25; + } + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (1) << 0); + + mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (0) << 0); + + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (1) << 13); + + mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (0) << 13); + + write_phy_reg(pi, 0x2a1, 0x20); + write_phy_reg(pi, 0x2a2, 0x60); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0xf << 4), (9) << 4); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0xf << 8), (9) << 8); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0xf << 0), (0x2) << 0); + + write_phy_reg(pi, 0x2e5, 0x20); + } else { + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 11), (1) << 11); + + mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 11), (0) << 11); + + write_phy_reg(pi, 0x2a1, 0x80); + write_phy_reg(pi, 0x2a2, 0x600); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 4), (0) << 4); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 8), (0) << 8); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x7 << 0), (0x3) << 0); + + mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); + + } + + mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); + + mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); + + mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); + + write_phy_reg(pi, 0x2be, 1); + SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); + + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); + + wlc_phy_table_write_nphy(pi, + (core == + PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 + : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, + 32, &phy_a8); + + if (cal_mode != CAL_GCTRL) { + wlc_phy_a1_nphy(pi, core, 5, 0, 40); + } + } +} + +static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core) +{ + int phy_a1; + int phy_a2; + bool phy_a3; + nphy_ipa_txcalgains_t phy_a4; + bool phy_a5 = false; + bool phy_a6 = true; + s32 phy_a7, phy_a8; + u32 phy_a9; + int phy_a10; + bool phy_a11 = false; + int phy_a12; + u8 phy_a13 = 0; + u8 phy_a14; + u8 *phy_a15 = NULL; + + phy_a4.useindex = true; + phy_a12 = start_gain; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + + phy_a2 = 20; + phy_a1 = 1; + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->pubpi.radiorev == 5) { + + phy_a15 = pad_gain_codes_used_2057rev5; + phy_a13 = sizeof(pad_gain_codes_used_2057rev5) / + sizeof(pad_gain_codes_used_2057rev5[0]) - 1; + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + phy_a15 = pad_gain_codes_used_2057rev7; + phy_a13 = sizeof(pad_gain_codes_used_2057rev7) / + sizeof(pad_gain_codes_used_2057rev7[0]) - 1; + + } else { + + phy_a15 = pad_all_gain_codes_2057; + phy_a13 = sizeof(pad_all_gain_codes_2057) / + sizeof(pad_all_gain_codes_2057[0]) - 1; + } + + } else { + + phy_a15 = pga_all_gain_codes_2057; + phy_a13 = sizeof(pga_all_gain_codes_2057) / + sizeof(pga_all_gain_codes_2057[0]) - 1; + } + + phy_a14 = 0; + + for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + phy_a4.gains.pad[core] = + (u16) phy_a15[phy_a12]; + } else { + phy_a4.gains.pga[core] = + (u16) phy_a15[phy_a12]; + } + + wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); + + wlc_phy_table_read_nphy(pi, + (core == + PHY_CORE_0 ? + NPHY_TBL_ID_EPSILONTBL0 : + NPHY_TBL_ID_EPSILONTBL1), 1, + 63, 32, &phy_a9); + + wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); + + phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || + (phy_a8 == 4095) || (phy_a8 == -4096)); + + if (!phy_a6 && (phy_a3 != phy_a5)) { + if (!phy_a3) { + phy_a12 -= (u8) phy_a1; + } + phy_a11 = true; + break; + } + + if (phy_a3) + phy_a12 += (u8) phy_a1; + else + phy_a12 -= (u8) phy_a1; + + if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { + if (phy_a12 < phy_a14) { + phy_a12 = phy_a14; + } else { + phy_a12 = phy_a13; + } + phy_a11 = true; + break; + } + + phy_a6 = false; + phy_a5 = phy_a3; + } + + } else { + phy_a2 = 10; + phy_a1 = 8; + for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { + phy_a4.index = (u8) phy_a12; + wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); + + wlc_phy_table_read_nphy(pi, + (core == + PHY_CORE_0 ? + NPHY_TBL_ID_EPSILONTBL0 : + NPHY_TBL_ID_EPSILONTBL1), 1, + 63, 32, &phy_a9); + + wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); + + phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || + (phy_a8 == 4095) || (phy_a8 == -4096)); + + if (!phy_a6 && (phy_a3 != phy_a5)) { + if (!phy_a3) { + phy_a12 -= (u8) phy_a1; + } + phy_a11 = true; + break; + } + + if (phy_a3) + phy_a12 += (u8) phy_a1; + else + phy_a12 -= (u8) phy_a1; + + if ((phy_a12 < 0) || (phy_a12 > 127)) { + if (phy_a12 < 0) { + phy_a12 = 0; + } else { + phy_a12 = 127; + } + phy_a11 = true; + break; + } + + phy_a6 = false; + phy_a5 = phy_a3; + } + + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + return (u8) phy_a15[phy_a12]; + } else { + return (u8) phy_a12; + } + +} + +static void wlc_phy_a4(phy_info_t *pi, bool full_cal) +{ + nphy_ipa_txcalgains_t phy_b1[2]; + nphy_papd_restore_state phy_b2; + bool phy_b3; + u8 phy_b4; + u8 phy_b5; + s16 phy_b6, phy_b7, phy_b8; + u16 phy_b9; + s16 phy_b10, phy_b11, phy_b12; + + phy_b11 = 0; + phy_b12 = 0; + phy_b7 = 0; + phy_b8 = 0; + phy_b6 = 0; + + if (pi->nphy_papd_skip == 1) + return; + + phy_b3 = + (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); + if (!phy_b3) { + wlapi_suspend_mac_and_wait(pi->sh->physhim); + } + + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + pi->nphy_force_papd_cal = false; + + for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) + pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = + wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); + + pi->nphy_papd_last_cal = pi->sh->now; + pi->nphy_papd_recal_counter++; + + if (NORADIO_ENAB(pi->pubpi)) + return; + + phy_b4 = pi->nphy_txpwrctrl; + wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, + nphy_papd_scaltbl); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, + nphy_papd_scaltbl); + + phy_b9 = read_phy_reg(pi, 0x01); + mod_phy_reg(pi, 0x01, (0x1 << 15), 0); + + for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { + s32 i, val = 0; + for (i = 0; i < 64; i++) { + wlc_phy_table_write_nphy(pi, + ((phy_b5 == + PHY_CORE_0) ? + NPHY_TBL_ID_EPSILONTBL0 : + NPHY_TBL_ID_EPSILONTBL1), 1, + i, 32, &val); + } + } + + wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); + + phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); + for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { + wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + + if ((pi->pubpi.radiorev == 3) + || (pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)) { + + pi->nphy_papd_cal_gain_index[phy_b5] = + 23; + + } else if (pi->pubpi.radiorev == 5) { + + pi->nphy_papd_cal_gain_index[phy_b5] = + 0; + pi->nphy_papd_cal_gain_index[phy_b5] = + wlc_phy_a3_nphy(pi, + pi-> + nphy_papd_cal_gain_index + [phy_b5], phy_b5); + + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + + pi->nphy_papd_cal_gain_index[phy_b5] = + 0; + pi->nphy_papd_cal_gain_index[phy_b5] = + wlc_phy_a3_nphy(pi, + pi-> + nphy_papd_cal_gain_index + [phy_b5], phy_b5); + + } + + phy_b1[phy_b5].gains.pad[phy_b5] = + pi->nphy_papd_cal_gain_index[phy_b5]; + + } else { + pi->nphy_papd_cal_gain_index[phy_b5] = 0; + pi->nphy_papd_cal_gain_index[phy_b5] = + wlc_phy_a3_nphy(pi, + pi-> + nphy_papd_cal_gain_index + [phy_b5], phy_b5); + phy_b1[phy_b5].gains.pga[phy_b5] = + pi->nphy_papd_cal_gain_index[phy_b5]; + } + } else { + phy_b1[phy_b5].useindex = true; + phy_b1[phy_b5].index = 16; + phy_b1[phy_b5].index = + wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, phy_b5); + + pi->nphy_papd_cal_gain_index[phy_b5] = + 15 - ((phy_b1[phy_b5].index) >> 3); + } + + switch (pi->nphy_papd_cal_type) { + case 0: + wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); + break; + case 1: + wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); + break; + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); + } + } + + if (NREV_LT(pi->pubpi.phy_rev, 7)) { + wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); + } + + for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { + int eps_offset = 0; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + if (pi->pubpi.radiorev == 3) { + eps_offset = -2; + } else if (pi->pubpi.radiorev == 5) { + eps_offset = 3; + } else { + eps_offset = -1; + } + } else { + eps_offset = 2; + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; + phy_b10 = 0; + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + phy_b12 = + - + (nphy_papd_padgain_dlt_2g_2057rev3n4 + [phy_b8] + + 1) / 2; + phy_b10 = -1; + } else if (pi->pubpi.radiorev == 5) { + phy_b12 = + -(nphy_papd_padgain_dlt_2g_2057rev5 + [phy_b8] + + 1) / 2; + } else if ((pi->pubpi.radiorev == 7) || + (pi->pubpi.radiorev == 8)) { + phy_b12 = + -(nphy_papd_padgain_dlt_2g_2057rev7 + [phy_b8] + + 1) / 2; + } + } else { + phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; + if ((pi->pubpi.radiorev == 3) || + (pi->pubpi.radiorev == 4) || + (pi->pubpi.radiorev == 6)) { + phy_b11 = + -(nphy_papd_pgagain_dlt_5g_2057 + [phy_b7] + + 1) / 2; + } else if ((pi->pubpi.radiorev == 7) + || (pi->pubpi.radiorev == 8)) { + phy_b11 = + -(nphy_papd_pgagain_dlt_5g_2057rev7 + [phy_b7] + + 1) / 2; + } + + phy_b10 = -9; + } + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + phy_b6 = + -60 + 27 + eps_offset + phy_b12 + phy_b10; + } else { + phy_b6 = + -60 + 27 + eps_offset + phy_b11 + phy_b10; + } + + mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : + 0x29c, (0x1ff << 7), (phy_b6) << 7); + + pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; + } else { + if (NREV_LT(pi->pubpi.phy_rev, 5)) { + eps_offset = 4; + } else { + eps_offset = 2; + } + + phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + phy_b11 = + -(nphy_papd_pga_gain_delta_ipa_2g[phy_b7] + + 1) / 2; + phy_b10 = 0; + } else { + phy_b11 = + -(nphy_papd_pga_gain_delta_ipa_5g[phy_b7] + + 1) / 2; + phy_b10 = -9; + } + + phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; + + mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : + 0x29c, (0x1ff << 7), (phy_b6) << 7); + + pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; + } + } + + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); + + if (NREV_GE(pi->pubpi.phy_rev, 6)) { + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (0) << 13); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 13), (0) << 13); + + } else { + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 11), (0) << 11); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : + 0x2a4, (0x1 << 11), (0) << 11); + + } + pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; + + write_phy_reg(pi, 0x01, phy_b9); + + wlc_phy_ipa_set_tx_digi_filts_nphy(pi); + + wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); + if (phy_b4 == PHY_TPC_HW_OFF) { + wlc_phy_txpwr_index_nphy(pi, (1 << 0), + (s8) (pi->nphy_txpwrindex[0]. + index_internal), false); + wlc_phy_txpwr_index_nphy(pi, (1 << 1), + (s8) (pi->nphy_txpwrindex[1]. + index_internal), false); + } + + wlc_phy_stay_in_carriersearch_nphy(pi, false); + + if (!phy_b3) { + wlapi_enable_mac(pi->sh->physhim); + } +} + +void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) +{ + uint core; + u32 txgain; + u16 rad_gain, dac_gain, bbmult, m1m2; + u8 txpi[2], chan_freq_range; + s32 rfpwr_offset; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + if (pi->sh->sromrev < 4) { + txpi[0] = txpi[1] = 72; + } else { + + chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); + switch (chan_freq_range) { + case WL_CHAN_FREQ_RANGE_2G: + txpi[0] = pi->nphy_txpid2g[0]; + txpi[1] = pi->nphy_txpid2g[1]; + break; + case WL_CHAN_FREQ_RANGE_5GL: + txpi[0] = pi->nphy_txpid5gl[0]; + txpi[1] = pi->nphy_txpid5gl[1]; + break; + case WL_CHAN_FREQ_RANGE_5GM: + txpi[0] = pi->nphy_txpid5g[0]; + txpi[1] = pi->nphy_txpid5g[1]; + break; + case WL_CHAN_FREQ_RANGE_5GH: + txpi[0] = pi->nphy_txpid5gh[0]; + txpi[1] = pi->nphy_txpid5gh[1]; + break; + default: + txpi[0] = txpi[1] = 91; + break; + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + txpi[0] = txpi[1] = 30; + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + txpi[0] = txpi[1] = 40; + } + + if (NREV_LT(pi->pubpi.phy_rev, 7)) { + + if ((txpi[0] < 40) || (txpi[0] > 100) || + (txpi[1] < 40) || (txpi[1] > 100)) + txpi[0] = txpi[1] = 91; + } + + pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; + pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; + pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; + pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (PHY_IPA(pi)) { + u32 *tx_gaintbl = + wlc_phy_get_ipa_gaintbl_nphy(pi); + txgain = tx_gaintbl[txpi[core]]; + } else { + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if NREV_IS + (pi->pubpi.phy_rev, 3) { + txgain = + nphy_tpc_5GHz_txgain_rev3 + [txpi[core]]; + } else if NREV_IS + (pi->pubpi.phy_rev, 4) { + txgain = + (pi->srom_fem5g.extpagain == + 3) ? + nphy_tpc_5GHz_txgain_HiPwrEPA + [txpi[core]] : + nphy_tpc_5GHz_txgain_rev4 + [txpi[core]]; + } else { + txgain = + nphy_tpc_5GHz_txgain_rev5 + [txpi[core]]; + } + } else { + if (NREV_GE(pi->pubpi.phy_rev, 5) && + (pi->srom_fem2g.extpagain == 3)) { + txgain = + nphy_tpc_txgain_HiPwrEPA + [txpi[core]]; + } else { + txgain = + nphy_tpc_txgain_rev3[txpi + [core]]; + } + } + } + } else { + txgain = nphy_tpc_txgain[txpi[core]]; + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); + } else { + rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); + } else { + dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); + } + bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : + 0xa5), (0x1 << 8), (0x1 << 8)); + } else { + mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); + } + write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); + + wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, + &rad_gain); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); + m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); + m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); + + if (PHY_IPA(pi)) { + wlc_phy_table_read_nphy(pi, + (core == + PHY_CORE_0 ? + NPHY_TBL_ID_CORE1TXPWRCTL : + NPHY_TBL_ID_CORE2TXPWRCTL), 1, + 576 + txpi[core], 32, + &rfpwr_offset); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1ff << 4), + ((s16) rfpwr_offset) << 4); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 2), (1) << 2); + + } + } + + and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void +wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, + u8 tmp_max_pwr, u8 rate_start, + u8 rate_end) +{ + u8 rate; + u8 word_num, nibble_num; + u8 tmp_nibble; + + for (rate = rate_start; rate <= rate_end; rate++) { + word_num = (rate - rate_start) >> 2; + nibble_num = (rate - rate_start) & 0x3; + tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; + + srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; + } +} + +static void +wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, + u8 rate_start, u8 rate_end) +{ + u8 rate; + + for (rate = rate_start; rate <= rate_end; rate++) { + srom_max[rate] -= 2 * pwr_offset; + } +} + +void +wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, + u8 rate_mcs_end, u8 rate_ofdm_start) +{ + u8 rate1, rate2; + + rate2 = rate_ofdm_start; + for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { + power[rate1] = power[rate2]; + rate2 += (rate1 == rate_mcs_start) ? 2 : 1; + } + power[rate_mcs_end] = power[rate_mcs_end - 1]; +} + +void +wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, + u8 rate_ofdm_end, u8 rate_mcs_start) +{ + u8 rate1, rate2; + + for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; + rate1 <= rate_ofdm_end; rate1++, rate2++) { + power[rate1] = power[rate2]; + if (rate1 == rate_ofdm_start) + power[++rate1] = power[rate2]; + } +} + +void wlc_phy_txpwr_apply_nphy(phy_info_t *pi) +{ + uint rate1, rate2, band_num; + u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; + u8 tmp_max_pwr = 0; + u16 pwr_offsets1[2], *pwr_offsets2 = NULL; + u8 *tx_srom_max_rate = NULL; + + for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); band_num++) { + switch (band_num) { + case 0: + + tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, + pi->nphy_pwrctrl_info[1].max_pwr_2g); + + pwr_offsets1[0] = pi->cck2gpo; + wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, + pwr_offsets1, + tmp_max_pwr, + TXP_FIRST_CCK, + TXP_LAST_CCK); + + pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); + pwr_offsets1[1] = + (u16) (pi->ofdm2gpo >> 16) & 0xffff; + + pwr_offsets2 = pi->mcs2gpo; + + tmp_cddpo = pi->cdd2gpo; + tmp_stbcpo = pi->stbc2gpo; + tmp_bw40po = pi->bw402gpo; + + tx_srom_max_rate = pi->tx_srom_max_rate_2g; + break; + case 1: + + tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, + pi->nphy_pwrctrl_info[1].max_pwr_5gm); + + pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); + pwr_offsets1[1] = + (u16) (pi->ofdm5gpo >> 16) & 0xffff; + + pwr_offsets2 = pi->mcs5gpo; + + tmp_cddpo = pi->cdd5gpo; + tmp_stbcpo = pi->stbc5gpo; + tmp_bw40po = pi->bw405gpo; + + tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; + break; + case 2: + + tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, + pi->nphy_pwrctrl_info[1].max_pwr_5gl); + + pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); + pwr_offsets1[1] = + (u16) (pi->ofdm5glpo >> 16) & 0xffff; + + pwr_offsets2 = pi->mcs5glpo; + + tmp_cddpo = pi->cdd5glpo; + tmp_stbcpo = pi->stbc5glpo; + tmp_bw40po = pi->bw405glpo; + + tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; + break; + case 3: + + tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, + pi->nphy_pwrctrl_info[1].max_pwr_5gh); + + pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); + pwr_offsets1[1] = + (u16) (pi->ofdm5ghpo >> 16) & 0xffff; + + pwr_offsets2 = pi->mcs5ghpo; + + tmp_cddpo = pi->cdd5ghpo; + tmp_stbcpo = pi->stbc5ghpo; + tmp_bw40po = pi->bw405ghpo; + + tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; + break; + } + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, + tmp_max_pwr, TXP_FIRST_OFDM, + TXP_LAST_OFDM); + + wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, + TXP_FIRST_MCS_20_SISO, + TXP_LAST_MCS_20_SISO, + TXP_FIRST_OFDM); + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, + tmp_max_pwr, + TXP_FIRST_MCS_20_CDD, + TXP_LAST_MCS_20_CDD); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, + TXP_FIRST_MCS_20_CDD, + TXP_LAST_MCS_20_CDD); + } + + wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, + TXP_FIRST_OFDM_20_CDD, + TXP_LAST_OFDM_20_CDD, + TXP_FIRST_MCS_20_CDD); + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, + tmp_max_pwr, + TXP_FIRST_MCS_20_STBC, + TXP_LAST_MCS_20_STBC); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, + tmp_stbcpo, + TXP_FIRST_MCS_20_STBC, + TXP_LAST_MCS_20_STBC); + } + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, + &pwr_offsets2[2], tmp_max_pwr, + TXP_FIRST_MCS_20_SDM, + TXP_LAST_MCS_20_SDM); + + if (NPHY_IS_SROM_REINTERPRET) { + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, + &pwr_offsets2[4], + tmp_max_pwr, + TXP_FIRST_MCS_40_SISO, + TXP_LAST_MCS_40_SISO); + + wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, + TXP_FIRST_OFDM_40_SISO, + TXP_LAST_OFDM_40_SISO, + TXP_FIRST_MCS_40_SISO); + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, + &pwr_offsets2[4], + tmp_max_pwr, + TXP_FIRST_MCS_40_CDD, + TXP_LAST_MCS_40_CDD); + + wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, + TXP_FIRST_MCS_40_CDD, + TXP_LAST_MCS_40_CDD); + + wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, + TXP_FIRST_OFDM_40_CDD, + TXP_LAST_OFDM_40_CDD, + TXP_FIRST_MCS_40_CDD); + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, + &pwr_offsets2[4], + tmp_max_pwr, + TXP_FIRST_MCS_40_STBC, + TXP_LAST_MCS_40_STBC); + + wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, + tmp_stbcpo, + TXP_FIRST_MCS_40_STBC, + TXP_LAST_MCS_40_STBC); + + wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, + &pwr_offsets2[6], + tmp_max_pwr, + TXP_FIRST_MCS_40_SDM, + TXP_LAST_MCS_40_SDM); + } else { + + for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = + TXP_FIRST_OFDM; rate1 <= TXP_LAST_MCS_40_SDM; + rate1++, rate2++) + tx_srom_max_rate[rate1] = + tx_srom_max_rate[rate2]; + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, + tmp_bw40po, + TXP_FIRST_OFDM_40_SISO, + TXP_LAST_MCS_40_SDM); + } + + tx_srom_max_rate[TXP_MCS_32] = + tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; + } + + return; +} + +static void wlc_phy_txpwr_srom_read_ppr_nphy(phy_info_t *pi) +{ + u16 bw40po, cddpo, stbcpo, bwduppo; + uint band_num; + + if (pi->sh->sromrev >= 9) { + + return; + } + + bw40po = (u16) PHY_GETINTVAR(pi, "bw40po"); + pi->bw402gpo = bw40po & 0xf; + pi->bw405gpo = (bw40po & 0xf0) >> 4; + pi->bw405glpo = (bw40po & 0xf00) >> 8; + pi->bw405ghpo = (bw40po & 0xf000) >> 12; + + cddpo = (u16) PHY_GETINTVAR(pi, "cddpo"); + pi->cdd2gpo = cddpo & 0xf; + pi->cdd5gpo = (cddpo & 0xf0) >> 4; + pi->cdd5glpo = (cddpo & 0xf00) >> 8; + pi->cdd5ghpo = (cddpo & 0xf000) >> 12; + + stbcpo = (u16) PHY_GETINTVAR(pi, "stbcpo"); + pi->stbc2gpo = stbcpo & 0xf; + pi->stbc5gpo = (stbcpo & 0xf0) >> 4; + pi->stbc5glpo = (stbcpo & 0xf00) >> 8; + pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; + + bwduppo = (u16) PHY_GETINTVAR(pi, "bwduppo"); + pi->bwdup2gpo = bwduppo & 0xf; + pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; + pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; + pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; + + for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); band_num++) { + switch (band_num) { + case 0: + + pi->nphy_txpid2g[PHY_CORE_0] = + (u8) PHY_GETINTVAR(pi, "txpid2ga0"); + pi->nphy_txpid2g[PHY_CORE_1] = + (u8) PHY_GETINTVAR(pi, "txpid2ga1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = + (s8) PHY_GETINTVAR(pi, "maxp2ga0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = + (s8) PHY_GETINTVAR(pi, "maxp2ga1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = + (s16) PHY_GETINTVAR(pi, "pa2gw0a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = + (s16) PHY_GETINTVAR(pi, "pa2gw0a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = + (s16) PHY_GETINTVAR(pi, "pa2gw1a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = + (s16) PHY_GETINTVAR(pi, "pa2gw1a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = + (s16) PHY_GETINTVAR(pi, "pa2gw2a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = + (s16) PHY_GETINTVAR(pi, "pa2gw2a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = + (s8) PHY_GETINTVAR(pi, "itt2ga0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = + (s8) PHY_GETINTVAR(pi, "itt2ga1"); + + pi->cck2gpo = (u16) PHY_GETINTVAR(pi, "cck2gpo"); + + pi->ofdm2gpo = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); + + pi->mcs2gpo[0] = (u16) PHY_GETINTVAR(pi, "mcs2gpo0"); + pi->mcs2gpo[1] = (u16) PHY_GETINTVAR(pi, "mcs2gpo1"); + pi->mcs2gpo[2] = (u16) PHY_GETINTVAR(pi, "mcs2gpo2"); + pi->mcs2gpo[3] = (u16) PHY_GETINTVAR(pi, "mcs2gpo3"); + pi->mcs2gpo[4] = (u16) PHY_GETINTVAR(pi, "mcs2gpo4"); + pi->mcs2gpo[5] = (u16) PHY_GETINTVAR(pi, "mcs2gpo5"); + pi->mcs2gpo[6] = (u16) PHY_GETINTVAR(pi, "mcs2gpo6"); + pi->mcs2gpo[7] = (u16) PHY_GETINTVAR(pi, "mcs2gpo7"); + break; + case 1: + + pi->nphy_txpid5g[PHY_CORE_0] = + (u8) PHY_GETINTVAR(pi, "txpid5ga0"); + pi->nphy_txpid5g[PHY_CORE_1] = + (u8) PHY_GETINTVAR(pi, "txpid5ga1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = + (s8) PHY_GETINTVAR(pi, "maxp5ga0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = + (s8) PHY_GETINTVAR(pi, "maxp5ga1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = + (s16) PHY_GETINTVAR(pi, "pa5gw0a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = + (s16) PHY_GETINTVAR(pi, "pa5gw0a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = + (s16) PHY_GETINTVAR(pi, "pa5gw1a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = + (s16) PHY_GETINTVAR(pi, "pa5gw1a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = + (s16) PHY_GETINTVAR(pi, "pa5gw2a0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = + (s16) PHY_GETINTVAR(pi, "pa5gw2a1"); + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = + (s8) PHY_GETINTVAR(pi, "itt5ga0"); + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = + (s8) PHY_GETINTVAR(pi, "itt5ga1"); + + pi->ofdm5gpo = (u32) PHY_GETINTVAR(pi, "ofdm5gpo"); + + pi->mcs5gpo[0] = (u16) PHY_GETINTVAR(pi, "mcs5gpo0"); + pi->mcs5gpo[1] = (u16) PHY_GETINTVAR(pi, "mcs5gpo1"); + pi->mcs5gpo[2] = (u16) PHY_GETINTVAR(pi, "mcs5gpo2"); + pi->mcs5gpo[3] = (u16) PHY_GETINTVAR(pi, "mcs5gpo3"); + pi->mcs5gpo[4] = (u16) PHY_GETINTVAR(pi, "mcs5gpo4"); + pi->mcs5gpo[5] = (u16) PHY_GETINTVAR(pi, "mcs5gpo5"); + pi->mcs5gpo[6] = (u16) PHY_GETINTVAR(pi, "mcs5gpo6"); + pi->mcs5gpo[7] = (u16) PHY_GETINTVAR(pi, "mcs5gpo7"); + break; + case 2: + + pi->nphy_txpid5gl[0] = + (u8) PHY_GETINTVAR(pi, "txpid5gla0"); + pi->nphy_txpid5gl[1] = + (u8) PHY_GETINTVAR(pi, "txpid5gla1"); + pi->nphy_pwrctrl_info[0].max_pwr_5gl = + (s8) PHY_GETINTVAR(pi, "maxp5gla0"); + pi->nphy_pwrctrl_info[1].max_pwr_5gl = + (s8) PHY_GETINTVAR(pi, "maxp5gla1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = + (s16) PHY_GETINTVAR(pi, "pa5glw0a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = + (s16) PHY_GETINTVAR(pi, "pa5glw0a1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = + (s16) PHY_GETINTVAR(pi, "pa5glw1a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = + (s16) PHY_GETINTVAR(pi, "pa5glw1a1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = + (s16) PHY_GETINTVAR(pi, "pa5glw2a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = + (s16) PHY_GETINTVAR(pi, "pa5glw2a1"); + pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; + pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; + + pi->ofdm5glpo = (u32) PHY_GETINTVAR(pi, "ofdm5glpo"); + + pi->mcs5glpo[0] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo0"); + pi->mcs5glpo[1] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo1"); + pi->mcs5glpo[2] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo2"); + pi->mcs5glpo[3] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo3"); + pi->mcs5glpo[4] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo4"); + pi->mcs5glpo[5] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo5"); + pi->mcs5glpo[6] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo6"); + pi->mcs5glpo[7] = + (u16) PHY_GETINTVAR(pi, "mcs5glpo7"); + break; + case 3: + + pi->nphy_txpid5gh[0] = + (u8) PHY_GETINTVAR(pi, "txpid5gha0"); + pi->nphy_txpid5gh[1] = + (u8) PHY_GETINTVAR(pi, "txpid5gha1"); + pi->nphy_pwrctrl_info[0].max_pwr_5gh = + (s8) PHY_GETINTVAR(pi, "maxp5gha0"); + pi->nphy_pwrctrl_info[1].max_pwr_5gh = + (s8) PHY_GETINTVAR(pi, "maxp5gha1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = + (s16) PHY_GETINTVAR(pi, "pa5ghw0a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = + (s16) PHY_GETINTVAR(pi, "pa5ghw0a1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = + (s16) PHY_GETINTVAR(pi, "pa5ghw1a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = + (s16) PHY_GETINTVAR(pi, "pa5ghw1a1"); + pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = + (s16) PHY_GETINTVAR(pi, "pa5ghw2a0"); + pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = + (s16) PHY_GETINTVAR(pi, "pa5ghw2a1"); + pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; + pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; + + pi->ofdm5ghpo = (u32) PHY_GETINTVAR(pi, "ofdm5ghpo"); + + pi->mcs5ghpo[0] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo0"); + pi->mcs5ghpo[1] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo1"); + pi->mcs5ghpo[2] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo2"); + pi->mcs5ghpo[3] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo3"); + pi->mcs5ghpo[4] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo4"); + pi->mcs5ghpo[5] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo5"); + pi->mcs5ghpo[6] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo6"); + pi->mcs5ghpo[7] = + (u16) PHY_GETINTVAR(pi, "mcs5ghpo7"); + break; + } + } + + wlc_phy_txpwr_apply_nphy(pi); +} + +static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi) +{ + + pi->antswitch = (u8) PHY_GETINTVAR(pi, "antswitch"); + pi->aa2g = (u8) PHY_GETINTVAR(pi, "aa2g"); + pi->aa5g = (u8) PHY_GETINTVAR(pi, "aa5g"); + + pi->srom_fem2g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos2g"); + pi->srom_fem2g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain2g"); + pi->srom_fem2g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange2g"); + pi->srom_fem2g.triso = (u8) PHY_GETINTVAR(pi, "triso2g"); + pi->srom_fem2g.antswctrllut = (u8) PHY_GETINTVAR(pi, "antswctl2g"); + + pi->srom_fem5g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos5g"); + pi->srom_fem5g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain5g"); + pi->srom_fem5g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange5g"); + pi->srom_fem5g.triso = (u8) PHY_GETINTVAR(pi, "triso5g"); + if (PHY_GETVAR(pi, "antswctl5g")) { + + pi->srom_fem5g.antswctrllut = + (u8) PHY_GETINTVAR(pi, "antswctl5g"); + } else { + + pi->srom_fem5g.antswctrllut = + (u8) PHY_GETINTVAR(pi, "antswctl2g"); + } + + wlc_phy_txpower_ipa_upd(pi); + + pi->phy_txcore_disable_temp = (s16) PHY_GETINTVAR(pi, "tempthresh"); + if (pi->phy_txcore_disable_temp == 0) { + pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; + } + + pi->phy_tempsense_offset = (s8) PHY_GETINTVAR(pi, "tempoffset"); + if (pi->phy_tempsense_offset != 0) { + if (pi->phy_tempsense_offset > + (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) { + pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; + } else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + + NPHY_SROM_MINTEMPOFFSET)) { + pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; + } else { + pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; + } + } + + pi->phy_txcore_enable_temp = + pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; + + pi->phycal_tempdelta = (u8) PHY_GETINTVAR(pi, "phycal_tempdelta"); + if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) { + pi->phycal_tempdelta = 0; + } + + wlc_phy_txpwr_srom_read_ppr_nphy(pi); + + return true; +} + +void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi) +{ + u8 tx_pwr_ctrl_state; + wlc_phy_txpwr_limit_to_tbl_nphy(pi); + wlc_phy_txpwrctrl_pwr_setup_nphy(pi); + + tx_pwr_ctrl_state = pi->nphy_txpwrctrl; + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); + (void)R_REG(&pi->regs->maccontrol); + udelay(1); + } + + wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); +} + +static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi) +{ + u32 idx; + u16 iqloCalbuf[7]; + u32 iqcomp, locomp, curr_locomp; + s8 locomp_i, locomp_q; + s8 curr_locomp_i, curr_locomp_q; + u32 tbl_id, tbl_len, tbl_offset; + u32 regval[128]; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); + + tbl_len = 128; + tbl_offset = 320; + for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; + tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { + iqcomp = + (tbl_id == + 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | + (iqloCalbuf[1] & 0x3ff) + : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | + (iqloCalbuf[3] & 0x3ff); + + for (idx = 0; idx < tbl_len; idx++) { + regval[idx] = iqcomp; + } + wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, + regval); + } + + tbl_offset = 448; + for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; + tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { + + locomp = + (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); + locomp_i = (s8) ((locomp >> 8) & 0xff); + locomp_q = (s8) ((locomp) & 0xff); + for (idx = 0; idx < tbl_len; idx++) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + curr_locomp_i = locomp_i; + curr_locomp_q = locomp_q; + } else { + curr_locomp_i = (s8) ((locomp_i * + nphy_tpc_loscale[idx] + + 128) >> 8); + curr_locomp_q = + (s8) ((locomp_q * nphy_tpc_loscale[idx] + + 128) >> 8); + } + curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); + curr_locomp |= (u32) (curr_locomp_q & 0xff); + regval[idx] = curr_locomp; + } + wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, + regval); + } + + if (NREV_LT(pi->pubpi.phy_rev, 2)) { + + wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); + wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static void wlc_phy_ipa_internal_tssi_setup_nphy(phy_info_t *pi) +{ + u8 core; + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + if (CHSPEC_IS2G(pi->radio_chanspec)) { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER, 0x5); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MUX, 0xe); + + if (pi->pubpi.radiorev != 5) + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TSSIA, 0); + + if (!NREV_IS(pi->pubpi.phy_rev, 7)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TSSIG, 0x1); + } else { + + WRITE_RADIO_REG3(pi, RADIO_2057, TX, + core, TSSIG, 0x31); + } + } else { + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MASTER, 0x9); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TX_SSI_MUX, 0xc); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, + TSSIG, 0); + + if (pi->pubpi.radiorev != 5) { + if (!NREV_IS(pi->pubpi.phy_rev, 7)) { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIA, 0x1); + } else { + + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TSSIA, 0x31); + } + } + } + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, + 0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, + 0); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, + 0x3); + WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, + 0x0); + } + } else { + WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, + (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : + 0x80); + WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); + WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, + 0x0); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, + 0x0); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, + 0x3); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, + 0x0); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, + 0x8); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, + 0x0); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, + 0x0); + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TX_SSI_MASTER, 0x5); + + if (pi->pubpi.radiorev != 5) + WRITE_RADIO_REG2(pi, RADIO_2056, TX, + core, TSSIA, 0x0); + if (NREV_GE(pi->pubpi.phy_rev, 5)) { + + WRITE_RADIO_REG2(pi, RADIO_2056, TX, + core, TSSIG, 0x31); + } else { + WRITE_RADIO_REG2(pi, RADIO_2056, TX, + core, TSSIG, 0x11); + } + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TX_SSI_MUX, 0xe); + } else { + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TX_SSI_MASTER, 0x9); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TSSIA, 0x31); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TSSIG, 0x0); + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, + TX_SSI_MUX, 0xc); + } + } + } +} + +static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) +{ + s32 rssi_buf[4]; + s32 int_val; + + if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) + + return; + + if (PHY_IPA(pi)) { + wlc_phy_ipa_internal_tssi_setup_nphy(pi); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), + 0, 0x3, 0, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); + } + + wlc_phy_stopplayback_nphy(pi); + + wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); + + udelay(20); + int_val = + wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, + 1); + wlc_phy_stopplayback_nphy(pi); + wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), + 0, 0x3, 1, + NPHY_REV7_RFCTRLOVERRIDE_ID0); + } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { + wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = + (u8) ((int_val >> 24) & 0xff); + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = + (u8) ((int_val >> 24) & 0xff); + + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = + (u8) ((int_val >> 8) & 0xff); + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = + (u8) ((int_val >> 8) & 0xff); + } else { + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = + (u8) ((int_val >> 24) & 0xff); + + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = + (u8) ((int_val >> 8) & 0xff); + + pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = + (u8) ((int_val >> 16) & 0xff); + pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = + (u8) ((int_val) & 0xff); + } + +} + +static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi) +{ + u32 idx; + s16 a1[2], b0[2], b1[2]; + s8 target_pwr_qtrdbm[2]; + s32 num, den, pwr_est; + u8 chan_freq_range; + u8 idle_tssi[2]; + u32 tbl_id, tbl_len, tbl_offset; + u32 regval[64]; + u8 core; + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); + (void)R_REG(&pi->regs->maccontrol); + udelay(1); + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + or_phy_reg(pi, 0x122, (0x1 << 0)); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + and_phy_reg(pi, 0x1e7, (u16) (~(0x1 << 15))); + } else { + + or_phy_reg(pi, 0x1e7, (0x1 << 15)); + } + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); + + if (pi->sh->sromrev < 4) { + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; + target_pwr_qtrdbm[0] = 13 * 4; + target_pwr_qtrdbm[1] = 13 * 4; + a1[0] = -424; + a1[1] = -424; + b0[0] = 5612; + b0[1] = 5612; + b1[1] = -1393; + b1[0] = -1393; + } else { + + chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); + switch (chan_freq_range) { + case WL_CHAN_FREQ_RANGE_2G: + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; + target_pwr_qtrdbm[0] = + pi->nphy_pwrctrl_info[0].max_pwr_2g; + target_pwr_qtrdbm[1] = + pi->nphy_pwrctrl_info[1].max_pwr_2g; + a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; + a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; + b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; + b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; + b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; + b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; + break; + case WL_CHAN_FREQ_RANGE_5GL: + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; + target_pwr_qtrdbm[0] = + pi->nphy_pwrctrl_info[0].max_pwr_5gl; + target_pwr_qtrdbm[1] = + pi->nphy_pwrctrl_info[1].max_pwr_5gl; + a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; + a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; + b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; + b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; + b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; + b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; + break; + case WL_CHAN_FREQ_RANGE_5GM: + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; + target_pwr_qtrdbm[0] = + pi->nphy_pwrctrl_info[0].max_pwr_5gm; + target_pwr_qtrdbm[1] = + pi->nphy_pwrctrl_info[1].max_pwr_5gm; + a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; + a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; + b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; + b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; + b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; + b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; + break; + case WL_CHAN_FREQ_RANGE_5GH: + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; + target_pwr_qtrdbm[0] = + pi->nphy_pwrctrl_info[0].max_pwr_5gh; + target_pwr_qtrdbm[1] = + pi->nphy_pwrctrl_info[1].max_pwr_5gh; + a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; + a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; + b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; + b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; + b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; + b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; + break; + default: + idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; + idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; + target_pwr_qtrdbm[0] = 13 * 4; + target_pwr_qtrdbm[1] = 13 * 4; + a1[0] = -424; + a1[1] = -424; + b0[0] = 5612; + b0[1] = 5612; + b1[1] = -1393; + b1[0] = -1393; + break; + } + } + + target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; + target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (pi->srom_fem2g.tssipos) { + or_phy_reg(pi, 0x1e9, (0x1 << 14)); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + for (core = 0; core <= 1; core++) { + if (PHY_IPA(pi)) { + + if (CHSPEC_IS2G(pi->radio_chanspec)) { + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TX_SSI_MUX, + 0xe); + } else { + WRITE_RADIO_REG3(pi, RADIO_2057, + TX, core, + TX_SSI_MUX, + 0xc); + } + } else { + } + } + } else { + if (PHY_IPA(pi)) { + + write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | + RADIO_2056_TX0, + (CHSPEC_IS5G + (pi-> + radio_chanspec)) ? 0xc : 0xe); + write_radio_reg(pi, + RADIO_2056_TX_TX_SSI_MUX | + RADIO_2056_TX1, + (CHSPEC_IS5G + (pi-> + radio_chanspec)) ? 0xc : 0xe); + } else { + + write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | + RADIO_2056_TX0, 0x11); + write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | + RADIO_2056_TX1, 0x11); + } + } + } + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); + (void)R_REG(&pi->regs->maccontrol); + udelay(1); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_phy_reg(pi, 0x1e7, (0x7f << 0), + (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); + } else { + mod_phy_reg(pi, 0x1e7, (0x7f << 0), + (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); + } + + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_phy_reg(pi, 0x222, (0xff << 0), + (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); + } else if (NREV_GT(pi->pubpi.phy_rev, 1)) { + mod_phy_reg(pi, 0x222, (0xff << 0), + (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); + } + + if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) + wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); + + write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); + + write_phy_reg(pi, 0x1e9, + (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); + + write_phy_reg(pi, 0x1ea, + (target_pwr_qtrdbm[0] << 0) | + (target_pwr_qtrdbm[1] << 8)); + + tbl_len = 64; + tbl_offset = 0; + for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; + tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { + + for (idx = 0; idx < tbl_len; idx++) { + num = + 8 * (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); + den = 32768 + a1[tbl_id - 26] * idx; + pwr_est = max(((4 * num + den / 2) / den), -8); + if (NREV_LT(pi->pubpi.phy_rev, 3)) { + if (idx <= + (uint) (31 - idle_tssi[tbl_id - 26] + 1)) + pwr_est = + max(pwr_est, + target_pwr_qtrdbm[tbl_id - 26] + + 1); + } + regval[idx] = (u32) pwr_est; + } + wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, + regval); + } + + wlc_phy_txpwr_limit_to_tbl_nphy(pi); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, + pi->adj_pwr_tbl_nphy); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, + pi->adj_pwr_tbl_nphy); + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi) +{ + return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | + (0x1 << 14) | (0x1 << 13)); +} + +static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core) +{ + u16 tmp; + tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); + + tmp = (tmp & (0x7f << 8)) >> 8; + return (u8) tmp; +} + +static void +wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, u8 idx1) +{ + mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); + + if (NREV_GT(pi->pubpi.phy_rev, 1)) + mod_phy_reg(pi, 0x222, (0xff << 0), idx1); +} + +u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi) +{ + u16 tmp; + u16 pwr_idx[2]; + + if (wlc_phy_txpwr_ison_nphy(pi)) { + pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); + pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); + + tmp = (pwr_idx[0] << 8) | pwr_idx[1]; + } else { + tmp = + ((pi->nphy_txpwrindex[PHY_CORE_0]. + index_internal & 0xff) << 8) | (pi-> + nphy_txpwrindex + [PHY_CORE_1]. + index_internal & 0xff); + } + + return tmp; +} + +void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi) +{ + if (PHY_IPA(pi) + && (pi->nphy_force_papd_cal + || (wlc_phy_txpwr_ison_nphy(pi) + && + (((u32) + ABS(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - + pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) + || ((u32) + ABS(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - + pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) { + wlc_phy_a4(pi, true); + } +} + +void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) +{ + u16 mask = 0, val = 0, ishw = 0; + u8 ctr; + uint core; + u32 tbl_offset; + u32 tbl_len; + u16 regval[84]; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + switch (ctrl_type) { + case PHY_TPC_HW_OFF: + case PHY_TPC_HW_ON: + pi->nphy_txpwrctrl = ctrl_type; + break; + default: + break; + } + + if (ctrl_type == PHY_TPC_HW_OFF) { + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + if (wlc_phy_txpwr_ison_nphy(pi)) { + for (core = 0; core < pi->pubpi.phy_corenum; + core++) + pi->nphy_txpwr_idx[core] = + wlc_phy_txpwr_idx_cur_get_nphy(pi, + (u8) + core); + } + + } + + tbl_len = 84; + tbl_offset = 64; + for (ctr = 0; ctr < tbl_len; ctr++) { + regval[ctr] = 0; + } + wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, + regval); + wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, + regval); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + + and_phy_reg(pi, 0x1e7, + (u16) (~((0x1 << 15) | + (0x1 << 14) | (0x1 << 13)))); + } else { + and_phy_reg(pi, 0x1e7, + (u16) (~((0x1 << 14) | (0x1 << 13)))); + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + or_phy_reg(pi, 0x8f, (0x1 << 8)); + or_phy_reg(pi, 0xa5, (0x1 << 8)); + } else { + or_phy_reg(pi, 0xa5, (0x1 << 14)); + } + + if (NREV_IS(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); + else if (NREV_LT(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); + + if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) + wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, + MHF1_IQSWAP_WAR, WLC_BAND_ALL); + + } else { + + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, + 8, pi->adj_pwr_tbl_nphy); + wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, + 8, pi->adj_pwr_tbl_nphy); + + ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; + mask = (0x1 << 14) | (0x1 << 13); + val = (ishw << 14) | (ishw << 13); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + mask |= (0x1 << 15); + val |= (ishw << 15); + } + + mod_phy_reg(pi, 0x1e7, mask, val); + + if (CHSPEC_IS5G(pi->radio_chanspec)) { + if (NREV_GE(pi->pubpi.phy_rev, 7)) { + mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); + mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); + } else { + mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); + if (NREV_GT(pi->pubpi.phy_rev, 1)) + mod_phy_reg(pi, 0x222, + (0xff << 0), 0x64); + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if ((pi->nphy_txpwr_idx[0] != 128) + && (pi->nphy_txpwr_idx[1] != 128)) { + wlc_phy_txpwr_idx_cur_set_nphy(pi, + pi-> + nphy_txpwr_idx + [0], + pi-> + nphy_txpwr_idx + [1]); + } + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + and_phy_reg(pi, 0x8f, ~(0x1 << 8)); + and_phy_reg(pi, 0xa5, ~(0x1 << 8)); + } else { + and_phy_reg(pi, 0xa5, ~(0x1 << 14)); + } + + if (NREV_IS(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); + else if (NREV_LT(pi->pubpi.phy_rev, 2)) + mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); + + if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) + wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, + 0x0, WLC_BAND_ALL); + + if (PHY_IPA(pi)) { + mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 2), (0) << 2); + + mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 2), (0) << 2); + + } + + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +void +wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, s8 txpwrindex, + bool restore_cals) +{ + u8 core, txpwrctl_tbl; + u16 tx_ind0, iq_ind0, lo_ind0; + u16 m1m2; + u32 txgain; + u16 rad_gain, dac_gain; + u8 bbmult; + u32 iqcomp; + u16 iqcomp_a, iqcomp_b; + u32 locomp; + u16 tmpval; + u8 tx_pwr_ctrl_state; + s32 rfpwr_offset; + u16 regval[2]; + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + + tx_ind0 = 192; + iq_ind0 = 320; + lo_ind0 = 448; + + for (core = 0; core < pi->pubpi.phy_corenum; core++) { + + if ((core_mask & (1 << core)) == 0) { + continue; + } + + txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; + + if (txpwrindex < 0) { + if (pi->nphy_txpwrindex[core].index < 0) { + + continue; + } + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + mod_phy_reg(pi, 0x8f, + (0x1 << 8), + pi->nphy_txpwrindex[core]. + AfectrlOverride); + mod_phy_reg(pi, 0xa5, (0x1 << 8), + pi->nphy_txpwrindex[core]. + AfectrlOverride); + } else { + mod_phy_reg(pi, 0xa5, + (0x1 << 14), + pi->nphy_txpwrindex[core]. + AfectrlOverride); + } + + write_phy_reg(pi, (core == PHY_CORE_0) ? + 0xaa : 0xab, + pi->nphy_txpwrindex[core].AfeCtrlDacGain); + + wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, + &pi->nphy_txpwrindex[core]. + rad_gain); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); + m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); + m1m2 |= ((core == PHY_CORE_0) ? + (pi->nphy_txpwrindex[core].bbmult << 8) : + (pi->nphy_txpwrindex[core].bbmult << 0)); + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); + + if (restore_cals) { + + wlc_phy_table_write_nphy(pi, 15, 2, + (80 + 2 * core), 16, + (void *)&pi-> + nphy_txpwrindex[core]. + iqcomp_a); + + wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), + 16, + &pi-> + nphy_txpwrindex[core]. + locomp); + wlc_phy_table_write_nphy(pi, 15, 1, (93 + core), + 16, + (void *)&pi-> + nphy_txpwrindex[core]. + locomp); + } + + wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); + + pi->nphy_txpwrindex[core].index_internal = + pi->nphy_txpwrindex[core].index_internal_save; + } else { + + if (pi->nphy_txpwrindex[core].index < 0) { + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + mod_phy_reg(pi, 0x8f, + (0x1 << 8), + pi->nphy_txpwrindex[core]. + AfectrlOverride); + mod_phy_reg(pi, 0xa5, (0x1 << 8), + pi->nphy_txpwrindex[core]. + AfectrlOverride); + } else { + pi->nphy_txpwrindex[core]. + AfectrlOverride = + read_phy_reg(pi, 0xa5); + } + + pi->nphy_txpwrindex[core].AfeCtrlDacGain = + read_phy_reg(pi, + (core == + PHY_CORE_0) ? 0xaa : 0xab); + + wlc_phy_table_read_nphy(pi, 7, 1, + (0x110 + core), 16, + &pi-> + nphy_txpwrindex[core]. + rad_gain); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, + &tmpval); + tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); + tmpval &= 0xff; + pi->nphy_txpwrindex[core].bbmult = + (u8) tmpval; + + wlc_phy_table_read_nphy(pi, 15, 2, + (80 + 2 * core), 16, + (void *)&pi-> + nphy_txpwrindex[core]. + iqcomp_a); + + wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), + 16, + (void *)&pi-> + nphy_txpwrindex[core]. + locomp); + + pi->nphy_txpwrindex[core].index_internal_save = + pi->nphy_txpwrindex[core].index_internal; + } + + tx_pwr_ctrl_state = pi->nphy_txpwrctrl; + wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); + + if (NREV_IS(pi->pubpi.phy_rev, 1)) + wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); + + wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, + (tx_ind0 + txpwrindex), 32, + &txgain); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + rad_gain = + (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); + } else { + rad_gain = + (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); + } + dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); + bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); + + if (NREV_GE(pi->pubpi.phy_rev, 3)) { + mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : + 0xa5), (0x1 << 8), (0x1 << 8)); + } else { + mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); + } + write_phy_reg(pi, (core == PHY_CORE_0) ? + 0xaa : 0xab, dac_gain); + + wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, + &rad_gain); + + wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); + m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); + m1m2 |= + ((core == + PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); + + wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); + + wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, + (iq_ind0 + txpwrindex), 32, + &iqcomp); + iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); + iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); + + if (restore_cals) { + regval[0] = (u16) iqcomp_a; + regval[1] = (u16) iqcomp_b; + wlc_phy_table_write_nphy(pi, 15, 2, + (80 + 2 * core), 16, + regval); + } + + wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, + (lo_ind0 + txpwrindex), 32, + &locomp); + if (restore_cals) { + wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), + 16, &locomp); + } + + if (NREV_IS(pi->pubpi.phy_rev, 1)) + wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); + + if (PHY_IPA(pi)) { + wlc_phy_table_read_nphy(pi, + (core == + PHY_CORE_0 ? + NPHY_TBL_ID_CORE1TXPWRCTL + : + NPHY_TBL_ID_CORE2TXPWRCTL), + 1, 576 + txpwrindex, 32, + &rfpwr_offset); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1ff << 4), + ((s16) rfpwr_offset) << 4); + + mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : + 0x29b, (0x1 << 2), (1) << 2); + + } + + wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); + } + + pi->nphy_txpwrindex[core].index = txpwrindex; + } + + if (pi->phyhang_avoid) + wlc_phy_stay_in_carriersearch_nphy(pi, false); +} + +void +wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, u8 *max_pwr, + u8 txp_rate_idx) +{ + u8 chan_freq_range; + + chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); + switch (chan_freq_range) { + case WL_CHAN_FREQ_RANGE_2G: + *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; + break; + case WL_CHAN_FREQ_RANGE_5GM: + *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; + break; + case WL_CHAN_FREQ_RANGE_5GL: + *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; + break; + case WL_CHAN_FREQ_RANGE_5GH: + *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; + break; + default: + *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; + break; + } + + return; +} + +void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable) +{ + u16 clip_off[] = { 0xffff, 0xffff }; + + if (enable) { + if (pi->nphy_deaf_count == 0) { + pi->classifier_state = + wlc_phy_classifier_nphy(pi, 0, 0); + wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); + wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); + wlc_phy_clip_det_nphy(pi, 1, clip_off); + } + + pi->nphy_deaf_count++; + + wlc_phy_resetcca_nphy(pi); + + } else { + pi->nphy_deaf_count--; + + if (pi->nphy_deaf_count == 0) { + wlc_phy_classifier_nphy(pi, (0x7 << 0), + pi->classifier_state); + wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); + } + } +} + +void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode) +{ + wlapi_suspend_mac_and_wait(pi->sh->physhim); + + if (mode) { + if (pi->nphy_deaf_count == 0) + wlc_phy_stay_in_carriersearch_nphy(pi, true); + } else { + if (pi->nphy_deaf_count > 0) + wlc_phy_stay_in_carriersearch_nphy(pi, false); + } + wlapi_enable_mac(pi->sh->physhim); +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c new file mode 100644 index 0000000..801c7c0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c @@ -0,0 +1,296 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include + +#include "phy_qmath.h" + +/* +Description: This function make 16 bit unsigned multiplication. To fit the output into +16 bits the 32 bit multiplication result is right shifted by 16 bits. +*/ +u16 qm_mulu16(u16 op1, u16 op2) +{ + return (u16) (((u32) op1 * (u32) op2) >> 16); +} + +/* +Description: This function make 16 bit multiplication and return the result in 16 bits. +To fit the multiplication result into 16 bits the multiplication result is right shifted by +15 bits. Right shifting 15 bits instead of 16 bits is done to remove the extra sign bit formed +due to the multiplication. +When both the 16bit inputs are 0x8000 then the output is saturated to 0x7fffffff. +*/ +s16 qm_muls16(s16 op1, s16 op2) +{ + s32 result; + if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000) { + result = 0x7fffffff; + } else { + result = ((s32) (op1) * (s32) (op2)); + } + return (s16) (result >> 15); +} + +/* +Description: This function add two 32 bit numbers and return the 32bit result. +If the result overflow 32 bits, the output will be saturated to 32bits. +*/ +s32 qm_add32(s32 op1, s32 op2) +{ + s32 result; + result = op1 + op2; + if (op1 < 0 && op2 < 0 && result > 0) { + result = 0x80000000; + } else if (op1 > 0 && op2 > 0 && result < 0) { + result = 0x7fffffff; + } + return result; +} + +/* +Description: This function add two 16 bit numbers and return the 16bit result. +If the result overflow 16 bits, the output will be saturated to 16bits. +*/ +s16 qm_add16(s16 op1, s16 op2) +{ + s16 result; + s32 temp = (s32) op1 + (s32) op2; + if (temp > (s32) 0x7fff) { + result = (s16) 0x7fff; + } else if (temp < (s32) 0xffff8000) { + result = (s16) 0xffff8000; + } else { + result = (s16) temp; + } + return result; +} + +/* +Description: This function make 16 bit subtraction and return the 16bit result. +If the result overflow 16 bits, the output will be saturated to 16bits. +*/ +s16 qm_sub16(s16 op1, s16 op2) +{ + s16 result; + s32 temp = (s32) op1 - (s32) op2; + if (temp > (s32) 0x7fff) { + result = (s16) 0x7fff; + } else if (temp < (s32) 0xffff8000) { + result = (s16) 0xffff8000; + } else { + result = (s16) temp; + } + return result; +} + +/* +Description: This function make a 32 bit saturated left shift when the specified shift +is +ve. This function will make a 32 bit right shift when the specified shift is -ve. +This function return the result after shifting operation. +*/ +s32 qm_shl32(s32 op, int shift) +{ + int i; + s32 result; + result = op; + if (shift > 31) + shift = 31; + else if (shift < -31) + shift = -31; + if (shift >= 0) { + for (i = 0; i < shift; i++) { + result = qm_add32(result, result); + } + } else { + result = result >> (-shift); + } + return result; +} + +/* +Description: This function make a 16 bit saturated left shift when the specified shift +is +ve. This function will make a 16 bit right shift when the specified shift is -ve. +This function return the result after shifting operation. +*/ +s16 qm_shl16(s16 op, int shift) +{ + int i; + s16 result; + result = op; + if (shift > 15) + shift = 15; + else if (shift < -15) + shift = -15; + if (shift > 0) { + for (i = 0; i < shift; i++) { + result = qm_add16(result, result); + } + } else { + result = result >> (-shift); + } + return result; +} + +/* +Description: This function make a 16 bit right shift when shift is +ve. +This function make a 16 bit saturated left shift when shift is -ve. This function +return the result of the shift operation. +*/ +s16 qm_shr16(s16 op, int shift) +{ + return qm_shl16(op, -shift); +} + +/* +Description: This function return the number of redundant sign bits in a 32 bit number. +Example: qm_norm32(0x00000080) = 23 +*/ +s16 qm_norm32(s32 op) +{ + u16 u16extraSignBits; + if (op == 0) { + return 31; + } else { + u16extraSignBits = 0; + while ((op >> 31) == (op >> 30)) { + u16extraSignBits++; + op = op << 1; + } + } + return u16extraSignBits; +} + +/* This table is log2(1+(i/32)) where i=[0:1:31], in q.15 format */ +static const s16 log_table[] = { + 0, + 1455, + 2866, + 4236, + 5568, + 6863, + 8124, + 9352, + 10549, + 11716, + 12855, + 13968, + 15055, + 16117, + 17156, + 18173, + 19168, + 20143, + 21098, + 22034, + 22952, + 23852, + 24736, + 25604, + 26455, + 27292, + 28114, + 28922, + 29717, + 30498, + 31267, + 32024 +}; + +#define LOG_TABLE_SIZE 32 /* log_table size */ +#define LOG2_LOG_TABLE_SIZE 5 /* log2(log_table size) */ +#define Q_LOG_TABLE 15 /* qformat of log_table */ +#define LOG10_2 19728 /* log10(2) in q.16 */ + +/* +Description: +This routine takes the input number N and its q format qN and compute +the log10(N). This routine first normalizes the input no N. Then N is in mag*(2^x) format. +mag is any number in the range 2^30-(2^31 - 1). Then log2(mag * 2^x) = log2(mag) + x is computed. +From that log10(mag * 2^x) = log2(mag * 2^x) * log10(2) is computed. +This routine looks the log2 value in the table considering LOG2_LOG_TABLE_SIZE+1 MSBs. +As the MSB is always 1, only next LOG2_OF_LOG_TABLE_SIZE MSBs are used for table lookup. +Next 16 MSBs are used for interpolation. +Inputs: +N - number to which log10 has to be found. +qN - q format of N +log10N - address where log10(N) will be written. +qLog10N - address where log10N qformat will be written. +Note/Problem: +For accurate results input should be in normalized or near normalized form. +*/ +void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N) +{ + s16 s16norm, s16tableIndex, s16errorApproximation; + u16 u16offset; + s32 s32log; + + /* normalize the N. */ + s16norm = qm_norm32(N); + N = N << s16norm; + + /* The qformat of N after normalization. + * -30 is added to treat the no as between 1.0 to 2.0 + * i.e. after adding the -30 to the qformat the decimal point will be + * just rigtht of the MSB. (i.e. after sign bit and 1st MSB). i.e. + * at the right side of 30th bit. + */ + qN = qN + s16norm - 30; + + /* take the table index as the LOG2_OF_LOG_TABLE_SIZE bits right of the MSB */ + s16tableIndex = (s16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE))); + + /* remove the MSB. the MSB is always 1 after normalization. */ + s16tableIndex = + s16tableIndex & (s16) ((1 << LOG2_LOG_TABLE_SIZE) - 1); + + /* remove the (1+LOG2_OF_LOG_TABLE_SIZE) MSBs in the N. */ + N = N & ((1 << (32 - (2 + LOG2_LOG_TABLE_SIZE))) - 1); + + /* take the offset as the 16 MSBS after table index. + */ + u16offset = (u16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE + 16))); + + /* look the log value in the table. */ + s32log = log_table[s16tableIndex]; /* q.15 format */ + + /* interpolate using the offset. */ + s16errorApproximation = (s16) qm_mulu16(u16offset, (u16) (log_table[s16tableIndex + 1] - log_table[s16tableIndex])); /* q.15 */ + + s32log = qm_add16((s16) s32log, s16errorApproximation); /* q.15 format */ + + /* adjust for the qformat of the N as + * log2(mag * 2^x) = log2(mag) + x + */ + s32log = qm_add32(s32log, ((s32) -qN) << 15); /* q.15 format */ + + /* normalize the result. */ + s16norm = qm_norm32(s32log); + + /* bring all the important bits into lower 16 bits */ + s32log = qm_shl32(s32log, s16norm - 16); /* q.15+s16norm-16 format */ + + /* compute the log10(N) by multiplying log2(N) with log10(2). + * as log10(mag * 2^x) = log2(mag * 2^x) * log10(2) + * log10N in q.15+s16norm-16+1 (LOG10_2 is in q.16) + */ + *log10N = qm_muls16((s16) s32log, (s16) LOG10_2); + + /* write the q format of the result. */ + *qLog10N = 15 + s16norm - 16 + 1; + + return; +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h new file mode 100644 index 0000000..49f57f4 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_QMATH_H_ +#define _BRCM_QMATH_H_ + +u16 qm_mulu16(u16 op1, u16 op2); + +s16 qm_muls16(s16 op1, s16 op2); + +s32 qm_add32(s32 op1, s32 op2); + +s16 qm_add16(s16 op1, s16 op2); + +s16 qm_sub16(s16 op1, s16 op2); + +s32 qm_shl32(s32 op, int shift); + +s16 qm_shl16(s16 op, int shift); + +s16 qm_shr16(s16 op, int shift); + +s16 qm_norm32(s32 op); + +void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N); + +#endif /* #ifndef _BRCM_QMATH_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h new file mode 100644 index 0000000..c3a6754 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h @@ -0,0 +1,1533 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_PHY_RADIO_H_ +#define _BRCM_PHY_RADIO_H_ + +#define RADIO_IDCODE 0x01 + +#define RADIO_DEFAULT_CORE 0 + +#define RXC0_RSSI_RST 0x80 +#define RXC0_MODE_RSSI 0x40 +#define RXC0_MODE_OFF 0x20 +#define RXC0_MODE_CM 0x10 +#define RXC0_LAN_LOAD 0x08 +#define RXC0_OFF_ADJ_MASK 0x07 + +#define TXC0_MODE_TXLPF 0x04 +#define TXC0_PA_TSSI_EN 0x02 +#define TXC0_TSSI_EN 0x01 + +#define TXC1_PA_GAIN_MASK 0x60 +#define TXC1_PA_GAIN_3DB 0x40 +#define TXC1_PA_GAIN_2DB 0x20 +#define TXC1_TX_MIX_GAIN 0x10 +#define TXC1_OFF_I_MASK 0x0c +#define TXC1_OFF_Q_MASK 0x03 + +#define RADIO_2055_READ_OFF 0x100 +#define RADIO_2057_READ_OFF 0x200 + +#define RADIO_2055_GEN_SPARE 0x00 +#define RADIO_2055_SP_PIN_PD 0x02 +#define RADIO_2055_SP_RSSI_CORE1 0x03 +#define RADIO_2055_SP_PD_MISC_CORE1 0x04 +#define RADIO_2055_SP_RSSI_CORE2 0x05 +#define RADIO_2055_SP_PD_MISC_CORE2 0x06 +#define RADIO_2055_SP_RX_GC1_CORE1 0x07 +#define RADIO_2055_SP_RX_GC2_CORE1 0x08 +#define RADIO_2055_SP_RX_GC1_CORE2 0x09 +#define RADIO_2055_SP_RX_GC2_CORE2 0x0a +#define RADIO_2055_SP_LPF_BW_SELECT_CORE1 0x0b +#define RADIO_2055_SP_LPF_BW_SELECT_CORE2 0x0c +#define RADIO_2055_SP_TX_GC1_CORE1 0x0d +#define RADIO_2055_SP_TX_GC2_CORE1 0x0e +#define RADIO_2055_SP_TX_GC1_CORE2 0x0f +#define RADIO_2055_SP_TX_GC2_CORE2 0x10 +#define RADIO_2055_MASTER_CNTRL1 0x11 +#define RADIO_2055_MASTER_CNTRL2 0x12 +#define RADIO_2055_PD_LGEN 0x13 +#define RADIO_2055_PD_PLL_TS 0x14 +#define RADIO_2055_PD_CORE1_LGBUF 0x15 +#define RADIO_2055_PD_CORE1_TX 0x16 +#define RADIO_2055_PD_CORE1_RXTX 0x17 +#define RADIO_2055_PD_CORE1_RSSI_MISC 0x18 +#define RADIO_2055_PD_CORE2_LGBUF 0x19 +#define RADIO_2055_PD_CORE2_TX 0x1a +#define RADIO_2055_PD_CORE2_RXTX 0x1b +#define RADIO_2055_PD_CORE2_RSSI_MISC 0x1c +#define RADIO_2055_PWRDET_LGEN 0x1d +#define RADIO_2055_PWRDET_LGBUF_CORE1 0x1e +#define RADIO_2055_PWRDET_RXTX_CORE1 0x1f +#define RADIO_2055_PWRDET_LGBUF_CORE2 0x20 +#define RADIO_2055_PWRDET_RXTX_CORE2 0x21 +#define RADIO_2055_RRCCAL_CNTRL_SPARE 0x22 +#define RADIO_2055_RRCCAL_N_OPT_SEL 0x23 +#define RADIO_2055_CAL_MISC 0x24 +#define RADIO_2055_CAL_COUNTER_OUT 0x25 +#define RADIO_2055_CAL_COUNTER_OUT2 0x26 +#define RADIO_2055_CAL_CVAR_CNTRL 0x27 +#define RADIO_2055_CAL_RVAR_CNTRL 0x28 +#define RADIO_2055_CAL_LPO_CNTRL 0x29 +#define RADIO_2055_CAL_TS 0x2a +#define RADIO_2055_CAL_RCCAL_READ_TS 0x2b +#define RADIO_2055_CAL_RCAL_READ_TS 0x2c +#define RADIO_2055_PAD_DRIVER 0x2d +#define RADIO_2055_XO_CNTRL1 0x2e +#define RADIO_2055_XO_CNTRL2 0x2f +#define RADIO_2055_XO_REGULATOR 0x30 +#define RADIO_2055_XO_MISC 0x31 +#define RADIO_2055_PLL_LF_C1 0x32 +#define RADIO_2055_PLL_CAL_VTH 0x33 +#define RADIO_2055_PLL_LF_C2 0x34 +#define RADIO_2055_PLL_REF 0x35 +#define RADIO_2055_PLL_LF_R1 0x36 +#define RADIO_2055_PLL_PFD_CP 0x37 +#define RADIO_2055_PLL_IDAC_CPOPAMP 0x38 +#define RADIO_2055_PLL_CP_REGULATOR 0x39 +#define RADIO_2055_PLL_RCAL 0x3a +#define RADIO_2055_RF_PLL_MOD0 0x3b +#define RADIO_2055_RF_PLL_MOD1 0x3c +#define RADIO_2055_RF_MMD_IDAC1 0x3d +#define RADIO_2055_RF_MMD_IDAC0 0x3e +#define RADIO_2055_RF_MMD_SPARE 0x3f +#define RADIO_2055_VCO_CAL1 0x40 +#define RADIO_2055_VCO_CAL2 0x41 +#define RADIO_2055_VCO_CAL3 0x42 +#define RADIO_2055_VCO_CAL4 0x43 +#define RADIO_2055_VCO_CAL5 0x44 +#define RADIO_2055_VCO_CAL6 0x45 +#define RADIO_2055_VCO_CAL7 0x46 +#define RADIO_2055_VCO_CAL8 0x47 +#define RADIO_2055_VCO_CAL9 0x48 +#define RADIO_2055_VCO_CAL10 0x49 +#define RADIO_2055_VCO_CAL11 0x4a +#define RADIO_2055_VCO_CAL12 0x4b +#define RADIO_2055_VCO_CAL13 0x4c +#define RADIO_2055_VCO_CAL14 0x4d +#define RADIO_2055_VCO_CAL15 0x4e +#define RADIO_2055_VCO_CAL16 0x4f +#define RADIO_2055_VCO_KVCO 0x50 +#define RADIO_2055_VCO_CAP_TAIL 0x51 +#define RADIO_2055_VCO_IDAC_VCO 0x52 +#define RADIO_2055_VCO_REGULATOR 0x53 +#define RADIO_2055_PLL_RF_VTH 0x54 +#define RADIO_2055_LGBUF_CEN_BUF 0x55 +#define RADIO_2055_LGEN_TUNE1 0x56 +#define RADIO_2055_LGEN_TUNE2 0x57 +#define RADIO_2055_LGEN_IDAC1 0x58 +#define RADIO_2055_LGEN_IDAC2 0x59 +#define RADIO_2055_LGEN_BIAS_CNT 0x5a +#define RADIO_2055_LGEN_BIAS_IDAC 0x5b +#define RADIO_2055_LGEN_RCAL 0x5c +#define RADIO_2055_LGEN_DIV 0x5d +#define RADIO_2055_LGEN_SPARE2 0x5e +#define RADIO_2055_CORE1_LGBUF_A_TUNE 0x5f +#define RADIO_2055_CORE1_LGBUF_G_TUNE 0x60 +#define RADIO_2055_CORE1_LGBUF_DIV 0x61 +#define RADIO_2055_CORE1_LGBUF_A_IDAC 0x62 +#define RADIO_2055_CORE1_LGBUF_G_IDAC 0x63 +#define RADIO_2055_CORE1_LGBUF_IDACFIL_OVR 0x64 +#define RADIO_2055_CORE1_LGBUF_SPARE 0x65 +#define RADIO_2055_CORE1_RXRF_SPC1 0x66 +#define RADIO_2055_CORE1_RXRF_REG1 0x67 +#define RADIO_2055_CORE1_RXRF_REG2 0x68 +#define RADIO_2055_CORE1_RXRF_RCAL 0x69 +#define RADIO_2055_CORE1_RXBB_BUFI_LPFCMP 0x6a +#define RADIO_2055_CORE1_RXBB_LPF 0x6b +#define RADIO_2055_CORE1_RXBB_MIDAC_HIPAS 0x6c +#define RADIO_2055_CORE1_RXBB_VGA1_IDAC 0x6d +#define RADIO_2055_CORE1_RXBB_VGA2_IDAC 0x6e +#define RADIO_2055_CORE1_RXBB_VGA3_IDAC 0x6f +#define RADIO_2055_CORE1_RXBB_BUFO_CTRL 0x70 +#define RADIO_2055_CORE1_RXBB_RCCAL_CTRL 0x71 +#define RADIO_2055_CORE1_RXBB_RSSI_CTRL1 0x72 +#define RADIO_2055_CORE1_RXBB_RSSI_CTRL2 0x73 +#define RADIO_2055_CORE1_RXBB_RSSI_CTRL3 0x74 +#define RADIO_2055_CORE1_RXBB_RSSI_CTRL4 0x75 +#define RADIO_2055_CORE1_RXBB_RSSI_CTRL5 0x76 +#define RADIO_2055_CORE1_RXBB_REGULATOR 0x77 +#define RADIO_2055_CORE1_RXBB_SPARE1 0x78 +#define RADIO_2055_CORE1_RXTXBB_RCAL 0x79 +#define RADIO_2055_CORE1_TXRF_SGM_PGA 0x7a +#define RADIO_2055_CORE1_TXRF_SGM_PAD 0x7b +#define RADIO_2055_CORE1_TXRF_CNTR_PGA1 0x7c +#define RADIO_2055_CORE1_TXRF_CNTR_PAD1 0x7d +#define RADIO_2055_CORE1_TX_RFPGA_IDAC 0x7e +#define RADIO_2055_CORE1_TX_PGA_PAD_TN 0x7f +#define RADIO_2055_CORE1_TX_PAD_IDAC1 0x80 +#define RADIO_2055_CORE1_TX_PAD_IDAC2 0x81 +#define RADIO_2055_CORE1_TX_MX_BGTRIM 0x82 +#define RADIO_2055_CORE1_TXRF_RCAL 0x83 +#define RADIO_2055_CORE1_TXRF_PAD_TSSI1 0x84 +#define RADIO_2055_CORE1_TXRF_PAD_TSSI2 0x85 +#define RADIO_2055_CORE1_TX_RF_SPARE 0x86 +#define RADIO_2055_CORE1_TXRF_IQCAL1 0x87 +#define RADIO_2055_CORE1_TXRF_IQCAL2 0x88 +#define RADIO_2055_CORE1_TXBB_RCCAL_CTRL 0x89 +#define RADIO_2055_CORE1_TXBB_LPF1 0x8a +#define RADIO_2055_CORE1_TX_VOS_CNCL 0x8b +#define RADIO_2055_CORE1_TX_LPF_MXGM_IDAC 0x8c +#define RADIO_2055_CORE1_TX_BB_MXGM 0x8d +#define RADIO_2055_CORE2_LGBUF_A_TUNE 0x8e +#define RADIO_2055_CORE2_LGBUF_G_TUNE 0x8f +#define RADIO_2055_CORE2_LGBUF_DIV 0x90 +#define RADIO_2055_CORE2_LGBUF_A_IDAC 0x91 +#define RADIO_2055_CORE2_LGBUF_G_IDAC 0x92 +#define RADIO_2055_CORE2_LGBUF_IDACFIL_OVR 0x93 +#define RADIO_2055_CORE2_LGBUF_SPARE 0x94 +#define RADIO_2055_CORE2_RXRF_SPC1 0x95 +#define RADIO_2055_CORE2_RXRF_REG1 0x96 +#define RADIO_2055_CORE2_RXRF_REG2 0x97 +#define RADIO_2055_CORE2_RXRF_RCAL 0x98 +#define RADIO_2055_CORE2_RXBB_BUFI_LPFCMP 0x99 +#define RADIO_2055_CORE2_RXBB_LPF 0x9a +#define RADIO_2055_CORE2_RXBB_MIDAC_HIPAS 0x9b +#define RADIO_2055_CORE2_RXBB_VGA1_IDAC 0x9c +#define RADIO_2055_CORE2_RXBB_VGA2_IDAC 0x9d +#define RADIO_2055_CORE2_RXBB_VGA3_IDAC 0x9e +#define RADIO_2055_CORE2_RXBB_BUFO_CTRL 0x9f +#define RADIO_2055_CORE2_RXBB_RCCAL_CTRL 0xa0 +#define RADIO_2055_CORE2_RXBB_RSSI_CTRL1 0xa1 +#define RADIO_2055_CORE2_RXBB_RSSI_CTRL2 0xa2 +#define RADIO_2055_CORE2_RXBB_RSSI_CTRL3 0xa3 +#define RADIO_2055_CORE2_RXBB_RSSI_CTRL4 0xa4 +#define RADIO_2055_CORE2_RXBB_RSSI_CTRL5 0xa5 +#define RADIO_2055_CORE2_RXBB_REGULATOR 0xa6 +#define RADIO_2055_CORE2_RXBB_SPARE1 0xa7 +#define RADIO_2055_CORE2_RXTXBB_RCAL 0xa8 +#define RADIO_2055_CORE2_TXRF_SGM_PGA 0xa9 +#define RADIO_2055_CORE2_TXRF_SGM_PAD 0xaa +#define RADIO_2055_CORE2_TXRF_CNTR_PGA1 0xab +#define RADIO_2055_CORE2_TXRF_CNTR_PAD1 0xac +#define RADIO_2055_CORE2_TX_RFPGA_IDAC 0xad +#define RADIO_2055_CORE2_TX_PGA_PAD_TN 0xae +#define RADIO_2055_CORE2_TX_PAD_IDAC1 0xaf +#define RADIO_2055_CORE2_TX_PAD_IDAC2 0xb0 +#define RADIO_2055_CORE2_TX_MX_BGTRIM 0xb1 +#define RADIO_2055_CORE2_TXRF_RCAL 0xb2 +#define RADIO_2055_CORE2_TXRF_PAD_TSSI1 0xb3 +#define RADIO_2055_CORE2_TXRF_PAD_TSSI2 0xb4 +#define RADIO_2055_CORE2_TX_RF_SPARE 0xb5 +#define RADIO_2055_CORE2_TXRF_IQCAL1 0xb6 +#define RADIO_2055_CORE2_TXRF_IQCAL2 0xb7 +#define RADIO_2055_CORE2_TXBB_RCCAL_CTRL 0xb8 +#define RADIO_2055_CORE2_TXBB_LPF1 0xb9 +#define RADIO_2055_CORE2_TX_VOS_CNCL 0xba +#define RADIO_2055_CORE2_TX_LPF_MXGM_IDAC 0xbb +#define RADIO_2055_CORE2_TX_BB_MXGM 0xbc +#define RADIO_2055_PRG_GC_HPVGA23_21 0xbd +#define RADIO_2055_PRG_GC_HPVGA23_22 0xbe +#define RADIO_2055_PRG_GC_HPVGA23_23 0xbf +#define RADIO_2055_PRG_GC_HPVGA23_24 0xc0 +#define RADIO_2055_PRG_GC_HPVGA23_25 0xc1 +#define RADIO_2055_PRG_GC_HPVGA23_26 0xc2 +#define RADIO_2055_PRG_GC_HPVGA23_27 0xc3 +#define RADIO_2055_PRG_GC_HPVGA23_28 0xc4 +#define RADIO_2055_PRG_GC_HPVGA23_29 0xc5 +#define RADIO_2055_PRG_GC_HPVGA23_30 0xc6 +#define RADIO_2055_CORE1_LNA_GAINBST 0xcd +#define RADIO_2055_CORE1_B0_NBRSSI_VCM 0xd2 +#define RADIO_2055_CORE1_GEN_SPARE2 0xd6 +#define RADIO_2055_CORE2_LNA_GAINBST 0xd9 +#define RADIO_2055_CORE2_B0_NBRSSI_VCM 0xde +#define RADIO_2055_CORE2_GEN_SPARE2 0xe2 + +#define RADIO_2055_GAINBST_GAIN_DB 6 +#define RADIO_2055_GAINBST_CODE 0x6 + +#define RADIO_2055_JTAGCTRL_MASK 0x04 +#define RADIO_2055_JTAGSYNC_MASK 0x08 +#define RADIO_2055_RRCAL_START 0x40 +#define RADIO_2055_RRCAL_RST_N 0x01 +#define RADIO_2055_CAL_LPO_ENABLE 0x80 +#define RADIO_2055_RCAL_DONE 0x80 +#define RADIO_2055_NBRSSI_VCM_I_MASK 0x03 +#define RADIO_2055_NBRSSI_VCM_I_SHIFT 0x00 +#define RADIO_2055_NBRSSI_VCM_Q_MASK 0x03 +#define RADIO_2055_NBRSSI_VCM_Q_SHIFT 0x00 +#define RADIO_2055_WBRSSI_VCM_IQ_MASK 0x0c +#define RADIO_2055_WBRSSI_VCM_IQ_SHIFT 0x02 +#define RADIO_2055_NBRSSI_PD 0x01 +#define RADIO_2055_WBRSSI_G1_PD 0x04 +#define RADIO_2055_WBRSSI_G2_PD 0x02 +#define RADIO_2055_NBRSSI_SEL 0x01 +#define RADIO_2055_WBRSSI_G1_SEL 0x04 +#define RADIO_2055_WBRSSI_G2_SEL 0x02 +#define RADIO_2055_COUPLE_RX_MASK 0x01 +#define RADIO_2055_COUPLE_TX_MASK 0x02 +#define RADIO_2055_GAINBST_DISABLE 0x02 +#define RADIO_2055_GAINBST_VAL_MASK 0x07 +#define RADIO_2055_RXMX_GC_MASK 0x0c + +#define RADIO_MIMO_CORESEL_OFF 0x0 +#define RADIO_MIMO_CORESEL_CORE1 0x1 +#define RADIO_MIMO_CORESEL_CORE2 0x2 +#define RADIO_MIMO_CORESEL_CORE3 0x3 +#define RADIO_MIMO_CORESEL_CORE4 0x4 +#define RADIO_MIMO_CORESEL_ALLRX 0x5 +#define RADIO_MIMO_CORESEL_ALLTX 0x6 +#define RADIO_MIMO_CORESEL_ALLRXTX 0x7 + +#define RADIO_2064_READ_OFF 0x200 + +#define RADIO_2064_REG000 0x0 +#define RADIO_2064_REG001 0x1 +#define RADIO_2064_REG002 0x2 +#define RADIO_2064_REG003 0x3 +#define RADIO_2064_REG004 0x4 +#define RADIO_2064_REG005 0x5 +#define RADIO_2064_REG006 0x6 +#define RADIO_2064_REG007 0x7 +#define RADIO_2064_REG008 0x8 +#define RADIO_2064_REG009 0x9 +#define RADIO_2064_REG00A 0xa +#define RADIO_2064_REG00B 0xb +#define RADIO_2064_REG00C 0xc +#define RADIO_2064_REG00D 0xd +#define RADIO_2064_REG00E 0xe +#define RADIO_2064_REG00F 0xf +#define RADIO_2064_REG010 0x10 +#define RADIO_2064_REG011 0x11 +#define RADIO_2064_REG012 0x12 +#define RADIO_2064_REG013 0x13 +#define RADIO_2064_REG014 0x14 +#define RADIO_2064_REG015 0x15 +#define RADIO_2064_REG016 0x16 +#define RADIO_2064_REG017 0x17 +#define RADIO_2064_REG018 0x18 +#define RADIO_2064_REG019 0x19 +#define RADIO_2064_REG01A 0x1a +#define RADIO_2064_REG01B 0x1b +#define RADIO_2064_REG01C 0x1c +#define RADIO_2064_REG01D 0x1d +#define RADIO_2064_REG01E 0x1e +#define RADIO_2064_REG01F 0x1f +#define RADIO_2064_REG020 0x20 +#define RADIO_2064_REG021 0x21 +#define RADIO_2064_REG022 0x22 +#define RADIO_2064_REG023 0x23 +#define RADIO_2064_REG024 0x24 +#define RADIO_2064_REG025 0x25 +#define RADIO_2064_REG026 0x26 +#define RADIO_2064_REG027 0x27 +#define RADIO_2064_REG028 0x28 +#define RADIO_2064_REG029 0x29 +#define RADIO_2064_REG02A 0x2a +#define RADIO_2064_REG02B 0x2b +#define RADIO_2064_REG02C 0x2c +#define RADIO_2064_REG02D 0x2d +#define RADIO_2064_REG02E 0x2e +#define RADIO_2064_REG02F 0x2f +#define RADIO_2064_REG030 0x30 +#define RADIO_2064_REG031 0x31 +#define RADIO_2064_REG032 0x32 +#define RADIO_2064_REG033 0x33 +#define RADIO_2064_REG034 0x34 +#define RADIO_2064_REG035 0x35 +#define RADIO_2064_REG036 0x36 +#define RADIO_2064_REG037 0x37 +#define RADIO_2064_REG038 0x38 +#define RADIO_2064_REG039 0x39 +#define RADIO_2064_REG03A 0x3a +#define RADIO_2064_REG03B 0x3b +#define RADIO_2064_REG03C 0x3c +#define RADIO_2064_REG03D 0x3d +#define RADIO_2064_REG03E 0x3e +#define RADIO_2064_REG03F 0x3f +#define RADIO_2064_REG040 0x40 +#define RADIO_2064_REG041 0x41 +#define RADIO_2064_REG042 0x42 +#define RADIO_2064_REG043 0x43 +#define RADIO_2064_REG044 0x44 +#define RADIO_2064_REG045 0x45 +#define RADIO_2064_REG046 0x46 +#define RADIO_2064_REG047 0x47 +#define RADIO_2064_REG048 0x48 +#define RADIO_2064_REG049 0x49 +#define RADIO_2064_REG04A 0x4a +#define RADIO_2064_REG04B 0x4b +#define RADIO_2064_REG04C 0x4c +#define RADIO_2064_REG04D 0x4d +#define RADIO_2064_REG04E 0x4e +#define RADIO_2064_REG04F 0x4f +#define RADIO_2064_REG050 0x50 +#define RADIO_2064_REG051 0x51 +#define RADIO_2064_REG052 0x52 +#define RADIO_2064_REG053 0x53 +#define RADIO_2064_REG054 0x54 +#define RADIO_2064_REG055 0x55 +#define RADIO_2064_REG056 0x56 +#define RADIO_2064_REG057 0x57 +#define RADIO_2064_REG058 0x58 +#define RADIO_2064_REG059 0x59 +#define RADIO_2064_REG05A 0x5a +#define RADIO_2064_REG05B 0x5b +#define RADIO_2064_REG05C 0x5c +#define RADIO_2064_REG05D 0x5d +#define RADIO_2064_REG05E 0x5e +#define RADIO_2064_REG05F 0x5f +#define RADIO_2064_REG060 0x60 +#define RADIO_2064_REG061 0x61 +#define RADIO_2064_REG062 0x62 +#define RADIO_2064_REG063 0x63 +#define RADIO_2064_REG064 0x64 +#define RADIO_2064_REG065 0x65 +#define RADIO_2064_REG066 0x66 +#define RADIO_2064_REG067 0x67 +#define RADIO_2064_REG068 0x68 +#define RADIO_2064_REG069 0x69 +#define RADIO_2064_REG06A 0x6a +#define RADIO_2064_REG06B 0x6b +#define RADIO_2064_REG06C 0x6c +#define RADIO_2064_REG06D 0x6d +#define RADIO_2064_REG06E 0x6e +#define RADIO_2064_REG06F 0x6f +#define RADIO_2064_REG070 0x70 +#define RADIO_2064_REG071 0x71 +#define RADIO_2064_REG072 0x72 +#define RADIO_2064_REG073 0x73 +#define RADIO_2064_REG074 0x74 +#define RADIO_2064_REG075 0x75 +#define RADIO_2064_REG076 0x76 +#define RADIO_2064_REG077 0x77 +#define RADIO_2064_REG078 0x78 +#define RADIO_2064_REG079 0x79 +#define RADIO_2064_REG07A 0x7a +#define RADIO_2064_REG07B 0x7b +#define RADIO_2064_REG07C 0x7c +#define RADIO_2064_REG07D 0x7d +#define RADIO_2064_REG07E 0x7e +#define RADIO_2064_REG07F 0x7f +#define RADIO_2064_REG080 0x80 +#define RADIO_2064_REG081 0x81 +#define RADIO_2064_REG082 0x82 +#define RADIO_2064_REG083 0x83 +#define RADIO_2064_REG084 0x84 +#define RADIO_2064_REG085 0x85 +#define RADIO_2064_REG086 0x86 +#define RADIO_2064_REG087 0x87 +#define RADIO_2064_REG088 0x88 +#define RADIO_2064_REG089 0x89 +#define RADIO_2064_REG08A 0x8a +#define RADIO_2064_REG08B 0x8b +#define RADIO_2064_REG08C 0x8c +#define RADIO_2064_REG08D 0x8d +#define RADIO_2064_REG08E 0x8e +#define RADIO_2064_REG08F 0x8f +#define RADIO_2064_REG090 0x90 +#define RADIO_2064_REG091 0x91 +#define RADIO_2064_REG092 0x92 +#define RADIO_2064_REG093 0x93 +#define RADIO_2064_REG094 0x94 +#define RADIO_2064_REG095 0x95 +#define RADIO_2064_REG096 0x96 +#define RADIO_2064_REG097 0x97 +#define RADIO_2064_REG098 0x98 +#define RADIO_2064_REG099 0x99 +#define RADIO_2064_REG09A 0x9a +#define RADIO_2064_REG09B 0x9b +#define RADIO_2064_REG09C 0x9c +#define RADIO_2064_REG09D 0x9d +#define RADIO_2064_REG09E 0x9e +#define RADIO_2064_REG09F 0x9f +#define RADIO_2064_REG0A0 0xa0 +#define RADIO_2064_REG0A1 0xa1 +#define RADIO_2064_REG0A2 0xa2 +#define RADIO_2064_REG0A3 0xa3 +#define RADIO_2064_REG0A4 0xa4 +#define RADIO_2064_REG0A5 0xa5 +#define RADIO_2064_REG0A6 0xa6 +#define RADIO_2064_REG0A7 0xa7 +#define RADIO_2064_REG0A8 0xa8 +#define RADIO_2064_REG0A9 0xa9 +#define RADIO_2064_REG0AA 0xaa +#define RADIO_2064_REG0AB 0xab +#define RADIO_2064_REG0AC 0xac +#define RADIO_2064_REG0AD 0xad +#define RADIO_2064_REG0AE 0xae +#define RADIO_2064_REG0AF 0xaf +#define RADIO_2064_REG0B0 0xb0 +#define RADIO_2064_REG0B1 0xb1 +#define RADIO_2064_REG0B2 0xb2 +#define RADIO_2064_REG0B3 0xb3 +#define RADIO_2064_REG0B4 0xb4 +#define RADIO_2064_REG0B5 0xb5 +#define RADIO_2064_REG0B6 0xb6 +#define RADIO_2064_REG0B7 0xb7 +#define RADIO_2064_REG0B8 0xb8 +#define RADIO_2064_REG0B9 0xb9 +#define RADIO_2064_REG0BA 0xba +#define RADIO_2064_REG0BB 0xbb +#define RADIO_2064_REG0BC 0xbc +#define RADIO_2064_REG0BD 0xbd +#define RADIO_2064_REG0BE 0xbe +#define RADIO_2064_REG0BF 0xbf +#define RADIO_2064_REG0C0 0xc0 +#define RADIO_2064_REG0C1 0xc1 +#define RADIO_2064_REG0C2 0xc2 +#define RADIO_2064_REG0C3 0xc3 +#define RADIO_2064_REG0C4 0xc4 +#define RADIO_2064_REG0C5 0xc5 +#define RADIO_2064_REG0C6 0xc6 +#define RADIO_2064_REG0C7 0xc7 +#define RADIO_2064_REG0C8 0xc8 +#define RADIO_2064_REG0C9 0xc9 +#define RADIO_2064_REG0CA 0xca +#define RADIO_2064_REG0CB 0xcb +#define RADIO_2064_REG0CC 0xcc +#define RADIO_2064_REG0CD 0xcd +#define RADIO_2064_REG0CE 0xce +#define RADIO_2064_REG0CF 0xcf +#define RADIO_2064_REG0D0 0xd0 +#define RADIO_2064_REG0D1 0xd1 +#define RADIO_2064_REG0D2 0xd2 +#define RADIO_2064_REG0D3 0xd3 +#define RADIO_2064_REG0D4 0xd4 +#define RADIO_2064_REG0D5 0xd5 +#define RADIO_2064_REG0D6 0xd6 +#define RADIO_2064_REG0D7 0xd7 +#define RADIO_2064_REG0D8 0xd8 +#define RADIO_2064_REG0D9 0xd9 +#define RADIO_2064_REG0DA 0xda +#define RADIO_2064_REG0DB 0xdb +#define RADIO_2064_REG0DC 0xdc +#define RADIO_2064_REG0DD 0xdd +#define RADIO_2064_REG0DE 0xde +#define RADIO_2064_REG0DF 0xdf +#define RADIO_2064_REG0E0 0xe0 +#define RADIO_2064_REG0E1 0xe1 +#define RADIO_2064_REG0E2 0xe2 +#define RADIO_2064_REG0E3 0xe3 +#define RADIO_2064_REG0E4 0xe4 +#define RADIO_2064_REG0E5 0xe5 +#define RADIO_2064_REG0E6 0xe6 +#define RADIO_2064_REG0E7 0xe7 +#define RADIO_2064_REG0E8 0xe8 +#define RADIO_2064_REG0E9 0xe9 +#define RADIO_2064_REG0EA 0xea +#define RADIO_2064_REG0EB 0xeb +#define RADIO_2064_REG0EC 0xec +#define RADIO_2064_REG0ED 0xed +#define RADIO_2064_REG0EE 0xee +#define RADIO_2064_REG0EF 0xef +#define RADIO_2064_REG0F0 0xf0 +#define RADIO_2064_REG0F1 0xf1 +#define RADIO_2064_REG0F2 0xf2 +#define RADIO_2064_REG0F3 0xf3 +#define RADIO_2064_REG0F4 0xf4 +#define RADIO_2064_REG0F5 0xf5 +#define RADIO_2064_REG0F6 0xf6 +#define RADIO_2064_REG0F7 0xf7 +#define RADIO_2064_REG0F8 0xf8 +#define RADIO_2064_REG0F9 0xf9 +#define RADIO_2064_REG0FA 0xfa +#define RADIO_2064_REG0FB 0xfb +#define RADIO_2064_REG0FC 0xfc +#define RADIO_2064_REG0FD 0xfd +#define RADIO_2064_REG0FE 0xfe +#define RADIO_2064_REG0FF 0xff +#define RADIO_2064_REG100 0x100 +#define RADIO_2064_REG101 0x101 +#define RADIO_2064_REG102 0x102 +#define RADIO_2064_REG103 0x103 +#define RADIO_2064_REG104 0x104 +#define RADIO_2064_REG105 0x105 +#define RADIO_2064_REG106 0x106 +#define RADIO_2064_REG107 0x107 +#define RADIO_2064_REG108 0x108 +#define RADIO_2064_REG109 0x109 +#define RADIO_2064_REG10A 0x10a +#define RADIO_2064_REG10B 0x10b +#define RADIO_2064_REG10C 0x10c +#define RADIO_2064_REG10D 0x10d +#define RADIO_2064_REG10E 0x10e +#define RADIO_2064_REG10F 0x10f +#define RADIO_2064_REG110 0x110 +#define RADIO_2064_REG111 0x111 +#define RADIO_2064_REG112 0x112 +#define RADIO_2064_REG113 0x113 +#define RADIO_2064_REG114 0x114 +#define RADIO_2064_REG115 0x115 +#define RADIO_2064_REG116 0x116 +#define RADIO_2064_REG117 0x117 +#define RADIO_2064_REG118 0x118 +#define RADIO_2064_REG119 0x119 +#define RADIO_2064_REG11A 0x11a +#define RADIO_2064_REG11B 0x11b +#define RADIO_2064_REG11C 0x11c +#define RADIO_2064_REG11D 0x11d +#define RADIO_2064_REG11E 0x11e +#define RADIO_2064_REG11F 0x11f +#define RADIO_2064_REG120 0x120 +#define RADIO_2064_REG121 0x121 +#define RADIO_2064_REG122 0x122 +#define RADIO_2064_REG123 0x123 +#define RADIO_2064_REG124 0x124 +#define RADIO_2064_REG125 0x125 +#define RADIO_2064_REG126 0x126 +#define RADIO_2064_REG127 0x127 +#define RADIO_2064_REG128 0x128 +#define RADIO_2064_REG129 0x129 +#define RADIO_2064_REG12A 0x12a +#define RADIO_2064_REG12B 0x12b +#define RADIO_2064_REG12C 0x12c +#define RADIO_2064_REG12D 0x12d +#define RADIO_2064_REG12E 0x12e +#define RADIO_2064_REG12F 0x12f +#define RADIO_2064_REG130 0x130 + +#define RADIO_2056_SYN (0x0 << 12) +#define RADIO_2056_TX0 (0x2 << 12) +#define RADIO_2056_TX1 (0x3 << 12) +#define RADIO_2056_RX0 (0x6 << 12) +#define RADIO_2056_RX1 (0x7 << 12) +#define RADIO_2056_ALLTX (0xe << 12) +#define RADIO_2056_ALLRX (0xf << 12) + +#define RADIO_2056_SYN_RESERVED_ADDR0 0x0 +#define RADIO_2056_SYN_IDCODE 0x1 +#define RADIO_2056_SYN_RESERVED_ADDR2 0x2 +#define RADIO_2056_SYN_RESERVED_ADDR3 0x3 +#define RADIO_2056_SYN_RESERVED_ADDR4 0x4 +#define RADIO_2056_SYN_RESERVED_ADDR5 0x5 +#define RADIO_2056_SYN_RESERVED_ADDR6 0x6 +#define RADIO_2056_SYN_RESERVED_ADDR7 0x7 +#define RADIO_2056_SYN_COM_CTRL 0x8 +#define RADIO_2056_SYN_COM_PU 0x9 +#define RADIO_2056_SYN_COM_OVR 0xa +#define RADIO_2056_SYN_COM_RESET 0xb +#define RADIO_2056_SYN_COM_RCAL 0xc +#define RADIO_2056_SYN_COM_RC_RXLPF 0xd +#define RADIO_2056_SYN_COM_RC_TXLPF 0xe +#define RADIO_2056_SYN_COM_RC_RXHPF 0xf +#define RADIO_2056_SYN_RESERVED_ADDR16 0x10 +#define RADIO_2056_SYN_RESERVED_ADDR17 0x11 +#define RADIO_2056_SYN_RESERVED_ADDR18 0x12 +#define RADIO_2056_SYN_RESERVED_ADDR19 0x13 +#define RADIO_2056_SYN_RESERVED_ADDR20 0x14 +#define RADIO_2056_SYN_RESERVED_ADDR21 0x15 +#define RADIO_2056_SYN_RESERVED_ADDR22 0x16 +#define RADIO_2056_SYN_RESERVED_ADDR23 0x17 +#define RADIO_2056_SYN_RESERVED_ADDR24 0x18 +#define RADIO_2056_SYN_RESERVED_ADDR25 0x19 +#define RADIO_2056_SYN_RESERVED_ADDR26 0x1a +#define RADIO_2056_SYN_RESERVED_ADDR27 0x1b +#define RADIO_2056_SYN_RESERVED_ADDR28 0x1c +#define RADIO_2056_SYN_RESERVED_ADDR29 0x1d +#define RADIO_2056_SYN_RESERVED_ADDR30 0x1e +#define RADIO_2056_SYN_RESERVED_ADDR31 0x1f +#define RADIO_2056_SYN_GPIO_MASTER1 0x20 +#define RADIO_2056_SYN_GPIO_MASTER2 0x21 +#define RADIO_2056_SYN_TOPBIAS_MASTER 0x22 +#define RADIO_2056_SYN_TOPBIAS_RCAL 0x23 +#define RADIO_2056_SYN_AFEREG 0x24 +#define RADIO_2056_SYN_TEMPPROCSENSE 0x25 +#define RADIO_2056_SYN_TEMPPROCSENSEIDAC 0x26 +#define RADIO_2056_SYN_TEMPPROCSENSERCAL 0x27 +#define RADIO_2056_SYN_LPO 0x28 +#define RADIO_2056_SYN_VDDCAL_MASTER 0x29 +#define RADIO_2056_SYN_VDDCAL_IDAC 0x2a +#define RADIO_2056_SYN_VDDCAL_STATUS 0x2b +#define RADIO_2056_SYN_RCAL_MASTER 0x2c +#define RADIO_2056_SYN_RCAL_CODE_OUT 0x2d +#define RADIO_2056_SYN_RCCAL_CTRL0 0x2e +#define RADIO_2056_SYN_RCCAL_CTRL1 0x2f +#define RADIO_2056_SYN_RCCAL_CTRL2 0x30 +#define RADIO_2056_SYN_RCCAL_CTRL3 0x31 +#define RADIO_2056_SYN_RCCAL_CTRL4 0x32 +#define RADIO_2056_SYN_RCCAL_CTRL5 0x33 +#define RADIO_2056_SYN_RCCAL_CTRL6 0x34 +#define RADIO_2056_SYN_RCCAL_CTRL7 0x35 +#define RADIO_2056_SYN_RCCAL_CTRL8 0x36 +#define RADIO_2056_SYN_RCCAL_CTRL9 0x37 +#define RADIO_2056_SYN_RCCAL_CTRL10 0x38 +#define RADIO_2056_SYN_RCCAL_CTRL11 0x39 +#define RADIO_2056_SYN_ZCAL_SPARE1 0x3a +#define RADIO_2056_SYN_ZCAL_SPARE2 0x3b +#define RADIO_2056_SYN_PLL_MAST1 0x3c +#define RADIO_2056_SYN_PLL_MAST2 0x3d +#define RADIO_2056_SYN_PLL_MAST3 0x3e +#define RADIO_2056_SYN_PLL_BIAS_RESET 0x3f +#define RADIO_2056_SYN_PLL_XTAL0 0x40 +#define RADIO_2056_SYN_PLL_XTAL1 0x41 +#define RADIO_2056_SYN_PLL_XTAL3 0x42 +#define RADIO_2056_SYN_PLL_XTAL4 0x43 +#define RADIO_2056_SYN_PLL_XTAL5 0x44 +#define RADIO_2056_SYN_PLL_XTAL6 0x45 +#define RADIO_2056_SYN_PLL_REFDIV 0x46 +#define RADIO_2056_SYN_PLL_PFD 0x47 +#define RADIO_2056_SYN_PLL_CP1 0x48 +#define RADIO_2056_SYN_PLL_CP2 0x49 +#define RADIO_2056_SYN_PLL_CP3 0x4a +#define RADIO_2056_SYN_PLL_LOOPFILTER1 0x4b +#define RADIO_2056_SYN_PLL_LOOPFILTER2 0x4c +#define RADIO_2056_SYN_PLL_LOOPFILTER3 0x4d +#define RADIO_2056_SYN_PLL_LOOPFILTER4 0x4e +#define RADIO_2056_SYN_PLL_LOOPFILTER5 0x4f +#define RADIO_2056_SYN_PLL_MMD1 0x50 +#define RADIO_2056_SYN_PLL_MMD2 0x51 +#define RADIO_2056_SYN_PLL_VCO1 0x52 +#define RADIO_2056_SYN_PLL_VCO2 0x53 +#define RADIO_2056_SYN_PLL_MONITOR1 0x54 +#define RADIO_2056_SYN_PLL_MONITOR2 0x55 +#define RADIO_2056_SYN_PLL_VCOCAL1 0x56 +#define RADIO_2056_SYN_PLL_VCOCAL2 0x57 +#define RADIO_2056_SYN_PLL_VCOCAL4 0x58 +#define RADIO_2056_SYN_PLL_VCOCAL5 0x59 +#define RADIO_2056_SYN_PLL_VCOCAL6 0x5a +#define RADIO_2056_SYN_PLL_VCOCAL7 0x5b +#define RADIO_2056_SYN_PLL_VCOCAL8 0x5c +#define RADIO_2056_SYN_PLL_VCOCAL9 0x5d +#define RADIO_2056_SYN_PLL_VCOCAL10 0x5e +#define RADIO_2056_SYN_PLL_VCOCAL11 0x5f +#define RADIO_2056_SYN_PLL_VCOCAL12 0x60 +#define RADIO_2056_SYN_PLL_VCOCAL13 0x61 +#define RADIO_2056_SYN_PLL_VREG 0x62 +#define RADIO_2056_SYN_PLL_STATUS1 0x63 +#define RADIO_2056_SYN_PLL_STATUS2 0x64 +#define RADIO_2056_SYN_PLL_STATUS3 0x65 +#define RADIO_2056_SYN_LOGEN_PU0 0x66 +#define RADIO_2056_SYN_LOGEN_PU1 0x67 +#define RADIO_2056_SYN_LOGEN_PU2 0x68 +#define RADIO_2056_SYN_LOGEN_PU3 0x69 +#define RADIO_2056_SYN_LOGEN_PU5 0x6a +#define RADIO_2056_SYN_LOGEN_PU6 0x6b +#define RADIO_2056_SYN_LOGEN_PU7 0x6c +#define RADIO_2056_SYN_LOGEN_PU8 0x6d +#define RADIO_2056_SYN_LOGEN_BIAS_RESET 0x6e +#define RADIO_2056_SYN_LOGEN_RCCR1 0x6f +#define RADIO_2056_SYN_LOGEN_VCOBUF1 0x70 +#define RADIO_2056_SYN_LOGEN_MIXER1 0x71 +#define RADIO_2056_SYN_LOGEN_MIXER2 0x72 +#define RADIO_2056_SYN_LOGEN_BUF1 0x73 +#define RADIO_2056_SYN_LOGENBUF2 0x74 +#define RADIO_2056_SYN_LOGEN_BUF3 0x75 +#define RADIO_2056_SYN_LOGEN_BUF4 0x76 +#define RADIO_2056_SYN_LOGEN_DIV1 0x77 +#define RADIO_2056_SYN_LOGEN_DIV2 0x78 +#define RADIO_2056_SYN_LOGEN_DIV3 0x79 +#define RADIO_2056_SYN_LOGEN_ACL1 0x7a +#define RADIO_2056_SYN_LOGEN_ACL2 0x7b +#define RADIO_2056_SYN_LOGEN_ACL3 0x7c +#define RADIO_2056_SYN_LOGEN_ACL4 0x7d +#define RADIO_2056_SYN_LOGEN_ACL5 0x7e +#define RADIO_2056_SYN_LOGEN_ACL6 0x7f +#define RADIO_2056_SYN_LOGEN_ACLOUT 0x80 +#define RADIO_2056_SYN_LOGEN_ACLCAL1 0x81 +#define RADIO_2056_SYN_LOGEN_ACLCAL2 0x82 +#define RADIO_2056_SYN_LOGEN_ACLCAL3 0x83 +#define RADIO_2056_SYN_CALEN 0x84 +#define RADIO_2056_SYN_LOGEN_PEAKDET1 0x85 +#define RADIO_2056_SYN_LOGEN_CORE_ACL_OVR 0x86 +#define RADIO_2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 +#define RADIO_2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 +#define RADIO_2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 +#define RADIO_2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8a +#define RADIO_2056_SYN_LOGEN_VCOBUF2 0x8b +#define RADIO_2056_SYN_LOGEN_MIXER3 0x8c +#define RADIO_2056_SYN_LOGEN_BUF5 0x8d +#define RADIO_2056_SYN_LOGEN_BUF6 0x8e +#define RADIO_2056_SYN_LOGEN_CBUFRX1 0x8f +#define RADIO_2056_SYN_LOGEN_CBUFRX2 0x90 +#define RADIO_2056_SYN_LOGEN_CBUFRX3 0x91 +#define RADIO_2056_SYN_LOGEN_CBUFRX4 0x92 +#define RADIO_2056_SYN_LOGEN_CBUFTX1 0x93 +#define RADIO_2056_SYN_LOGEN_CBUFTX2 0x94 +#define RADIO_2056_SYN_LOGEN_CBUFTX3 0x95 +#define RADIO_2056_SYN_LOGEN_CBUFTX4 0x96 +#define RADIO_2056_SYN_LOGEN_CMOSRX1 0x97 +#define RADIO_2056_SYN_LOGEN_CMOSRX2 0x98 +#define RADIO_2056_SYN_LOGEN_CMOSRX3 0x99 +#define RADIO_2056_SYN_LOGEN_CMOSRX4 0x9a +#define RADIO_2056_SYN_LOGEN_CMOSTX1 0x9b +#define RADIO_2056_SYN_LOGEN_CMOSTX2 0x9c +#define RADIO_2056_SYN_LOGEN_CMOSTX3 0x9d +#define RADIO_2056_SYN_LOGEN_CMOSTX4 0x9e +#define RADIO_2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9f +#define RADIO_2056_SYN_LOGEN_MIXER3_OVRVAL 0xa0 +#define RADIO_2056_SYN_LOGEN_BUF5_OVRVAL 0xa1 +#define RADIO_2056_SYN_LOGEN_BUF6_OVRVAL 0xa2 +#define RADIO_2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xa3 +#define RADIO_2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xa4 +#define RADIO_2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xa5 +#define RADIO_2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xa6 +#define RADIO_2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xa7 +#define RADIO_2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xa8 +#define RADIO_2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xa9 +#define RADIO_2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xaa +#define RADIO_2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xab +#define RADIO_2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xac +#define RADIO_2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xad +#define RADIO_2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xae +#define RADIO_2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xaf +#define RADIO_2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xb0 +#define RADIO_2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xb1 +#define RADIO_2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xb2 +#define RADIO_2056_SYN_LOGEN_ACL_WAITCNT 0xb3 +#define RADIO_2056_SYN_LOGEN_CORE_CALVALID 0xb4 +#define RADIO_2056_SYN_LOGEN_RX_CMOS_CALVALID 0xb5 +#define RADIO_2056_SYN_LOGEN_TX_CMOS_VALID 0xb6 + +#define RADIO_2056_TX_RESERVED_ADDR0 0x0 +#define RADIO_2056_TX_IDCODE 0x1 +#define RADIO_2056_TX_RESERVED_ADDR2 0x2 +#define RADIO_2056_TX_RESERVED_ADDR3 0x3 +#define RADIO_2056_TX_RESERVED_ADDR4 0x4 +#define RADIO_2056_TX_RESERVED_ADDR5 0x5 +#define RADIO_2056_TX_RESERVED_ADDR6 0x6 +#define RADIO_2056_TX_RESERVED_ADDR7 0x7 +#define RADIO_2056_TX_COM_CTRL 0x8 +#define RADIO_2056_TX_COM_PU 0x9 +#define RADIO_2056_TX_COM_OVR 0xa +#define RADIO_2056_TX_COM_RESET 0xb +#define RADIO_2056_TX_COM_RCAL 0xc +#define RADIO_2056_TX_COM_RC_RXLPF 0xd +#define RADIO_2056_TX_COM_RC_TXLPF 0xe +#define RADIO_2056_TX_COM_RC_RXHPF 0xf +#define RADIO_2056_TX_RESERVED_ADDR16 0x10 +#define RADIO_2056_TX_RESERVED_ADDR17 0x11 +#define RADIO_2056_TX_RESERVED_ADDR18 0x12 +#define RADIO_2056_TX_RESERVED_ADDR19 0x13 +#define RADIO_2056_TX_RESERVED_ADDR20 0x14 +#define RADIO_2056_TX_RESERVED_ADDR21 0x15 +#define RADIO_2056_TX_RESERVED_ADDR22 0x16 +#define RADIO_2056_TX_RESERVED_ADDR23 0x17 +#define RADIO_2056_TX_RESERVED_ADDR24 0x18 +#define RADIO_2056_TX_RESERVED_ADDR25 0x19 +#define RADIO_2056_TX_RESERVED_ADDR26 0x1a +#define RADIO_2056_TX_RESERVED_ADDR27 0x1b +#define RADIO_2056_TX_RESERVED_ADDR28 0x1c +#define RADIO_2056_TX_RESERVED_ADDR29 0x1d +#define RADIO_2056_TX_RESERVED_ADDR30 0x1e +#define RADIO_2056_TX_RESERVED_ADDR31 0x1f +#define RADIO_2056_TX_IQCAL_GAIN_BW 0x20 +#define RADIO_2056_TX_LOFT_FINE_I 0x21 +#define RADIO_2056_TX_LOFT_FINE_Q 0x22 +#define RADIO_2056_TX_LOFT_COARSE_I 0x23 +#define RADIO_2056_TX_LOFT_COARSE_Q 0x24 +#define RADIO_2056_TX_TX_COM_MASTER1 0x25 +#define RADIO_2056_TX_TX_COM_MASTER2 0x26 +#define RADIO_2056_TX_RXIQCAL_TXMUX 0x27 +#define RADIO_2056_TX_TX_SSI_MASTER 0x28 +#define RADIO_2056_TX_IQCAL_VCM_HG 0x29 +#define RADIO_2056_TX_IQCAL_IDAC 0x2a +#define RADIO_2056_TX_TSSI_VCM 0x2b +#define RADIO_2056_TX_TX_AMP_DET 0x2c +#define RADIO_2056_TX_TX_SSI_MUX 0x2d +#define RADIO_2056_TX_TSSIA 0x2e +#define RADIO_2056_TX_TSSIG 0x2f +#define RADIO_2056_TX_TSSI_MISC1 0x30 +#define RADIO_2056_TX_TSSI_MISC2 0x31 +#define RADIO_2056_TX_TSSI_MISC3 0x32 +#define RADIO_2056_TX_PA_SPARE1 0x33 +#define RADIO_2056_TX_PA_SPARE2 0x34 +#define RADIO_2056_TX_INTPAA_MASTER 0x35 +#define RADIO_2056_TX_INTPAA_GAIN 0x36 +#define RADIO_2056_TX_INTPAA_BOOST_TUNE 0x37 +#define RADIO_2056_TX_INTPAA_IAUX_STAT 0x38 +#define RADIO_2056_TX_INTPAA_IAUX_DYN 0x39 +#define RADIO_2056_TX_INTPAA_IMAIN_STAT 0x3a +#define RADIO_2056_TX_INTPAA_IMAIN_DYN 0x3b +#define RADIO_2056_TX_INTPAA_CASCBIAS 0x3c +#define RADIO_2056_TX_INTPAA_PASLOPE 0x3d +#define RADIO_2056_TX_INTPAA_PA_MISC 0x3e +#define RADIO_2056_TX_INTPAG_MASTER 0x3f +#define RADIO_2056_TX_INTPAG_GAIN 0x40 +#define RADIO_2056_TX_INTPAG_BOOST_TUNE 0x41 +#define RADIO_2056_TX_INTPAG_IAUX_STAT 0x42 +#define RADIO_2056_TX_INTPAG_IAUX_DYN 0x43 +#define RADIO_2056_TX_INTPAG_IMAIN_STAT 0x44 +#define RADIO_2056_TX_INTPAG_IMAIN_DYN 0x45 +#define RADIO_2056_TX_INTPAG_CASCBIAS 0x46 +#define RADIO_2056_TX_INTPAG_PASLOPE 0x47 +#define RADIO_2056_TX_INTPAG_PA_MISC 0x48 +#define RADIO_2056_TX_PADA_MASTER 0x49 +#define RADIO_2056_TX_PADA_IDAC 0x4a +#define RADIO_2056_TX_PADA_CASCBIAS 0x4b +#define RADIO_2056_TX_PADA_GAIN 0x4c +#define RADIO_2056_TX_PADA_BOOST_TUNE 0x4d +#define RADIO_2056_TX_PADA_SLOPE 0x4e +#define RADIO_2056_TX_PADG_MASTER 0x4f +#define RADIO_2056_TX_PADG_IDAC 0x50 +#define RADIO_2056_TX_PADG_CASCBIAS 0x51 +#define RADIO_2056_TX_PADG_GAIN 0x52 +#define RADIO_2056_TX_PADG_BOOST_TUNE 0x53 +#define RADIO_2056_TX_PADG_SLOPE 0x54 +#define RADIO_2056_TX_PGAA_MASTER 0x55 +#define RADIO_2056_TX_PGAA_IDAC 0x56 +#define RADIO_2056_TX_PGAA_GAIN 0x57 +#define RADIO_2056_TX_PGAA_BOOST_TUNE 0x58 +#define RADIO_2056_TX_PGAA_SLOPE 0x59 +#define RADIO_2056_TX_PGAA_MISC 0x5a +#define RADIO_2056_TX_PGAG_MASTER 0x5b +#define RADIO_2056_TX_PGAG_IDAC 0x5c +#define RADIO_2056_TX_PGAG_GAIN 0x5d +#define RADIO_2056_TX_PGAG_BOOST_TUNE 0x5e +#define RADIO_2056_TX_PGAG_SLOPE 0x5f +#define RADIO_2056_TX_PGAG_MISC 0x60 +#define RADIO_2056_TX_MIXA_MASTER 0x61 +#define RADIO_2056_TX_MIXA_BOOST_TUNE 0x62 +#define RADIO_2056_TX_MIXG 0x63 +#define RADIO_2056_TX_MIXG_BOOST_TUNE 0x64 +#define RADIO_2056_TX_BB_GM_MASTER 0x65 +#define RADIO_2056_TX_GMBB_GM 0x66 +#define RADIO_2056_TX_GMBB_IDAC 0x67 +#define RADIO_2056_TX_TXLPF_MASTER 0x68 +#define RADIO_2056_TX_TXLPF_RCCAL 0x69 +#define RADIO_2056_TX_TXLPF_RCCAL_OFF0 0x6a +#define RADIO_2056_TX_TXLPF_RCCAL_OFF1 0x6b +#define RADIO_2056_TX_TXLPF_RCCAL_OFF2 0x6c +#define RADIO_2056_TX_TXLPF_RCCAL_OFF3 0x6d +#define RADIO_2056_TX_TXLPF_RCCAL_OFF4 0x6e +#define RADIO_2056_TX_TXLPF_RCCAL_OFF5 0x6f +#define RADIO_2056_TX_TXLPF_RCCAL_OFF6 0x70 +#define RADIO_2056_TX_TXLPF_BW 0x71 +#define RADIO_2056_TX_TXLPF_GAIN 0x72 +#define RADIO_2056_TX_TXLPF_IDAC 0x73 +#define RADIO_2056_TX_TXLPF_IDAC_0 0x74 +#define RADIO_2056_TX_TXLPF_IDAC_1 0x75 +#define RADIO_2056_TX_TXLPF_IDAC_2 0x76 +#define RADIO_2056_TX_TXLPF_IDAC_3 0x77 +#define RADIO_2056_TX_TXLPF_IDAC_4 0x78 +#define RADIO_2056_TX_TXLPF_IDAC_5 0x79 +#define RADIO_2056_TX_TXLPF_IDAC_6 0x7a +#define RADIO_2056_TX_TXLPF_OPAMP_IDAC 0x7b +#define RADIO_2056_TX_TXLPF_MISC 0x7c +#define RADIO_2056_TX_TXSPARE1 0x7d +#define RADIO_2056_TX_TXSPARE2 0x7e +#define RADIO_2056_TX_TXSPARE3 0x7f +#define RADIO_2056_TX_TXSPARE4 0x80 +#define RADIO_2056_TX_TXSPARE5 0x81 +#define RADIO_2056_TX_TXSPARE6 0x82 +#define RADIO_2056_TX_TXSPARE7 0x83 +#define RADIO_2056_TX_TXSPARE8 0x84 +#define RADIO_2056_TX_TXSPARE9 0x85 +#define RADIO_2056_TX_TXSPARE10 0x86 +#define RADIO_2056_TX_TXSPARE11 0x87 +#define RADIO_2056_TX_TXSPARE12 0x88 +#define RADIO_2056_TX_TXSPARE13 0x89 +#define RADIO_2056_TX_TXSPARE14 0x8a +#define RADIO_2056_TX_TXSPARE15 0x8b +#define RADIO_2056_TX_TXSPARE16 0x8c +#define RADIO_2056_TX_STATUS_INTPA_GAIN 0x8d +#define RADIO_2056_TX_STATUS_PAD_GAIN 0x8e +#define RADIO_2056_TX_STATUS_PGA_GAIN 0x8f +#define RADIO_2056_TX_STATUS_GM_TXLPF_GAIN 0x90 +#define RADIO_2056_TX_STATUS_TXLPF_BW 0x91 +#define RADIO_2056_TX_STATUS_TXLPF_RC 0x92 +#define RADIO_2056_TX_GMBB_IDAC0 0x93 +#define RADIO_2056_TX_GMBB_IDAC1 0x94 +#define RADIO_2056_TX_GMBB_IDAC2 0x95 +#define RADIO_2056_TX_GMBB_IDAC3 0x96 +#define RADIO_2056_TX_GMBB_IDAC4 0x97 +#define RADIO_2056_TX_GMBB_IDAC5 0x98 +#define RADIO_2056_TX_GMBB_IDAC6 0x99 +#define RADIO_2056_TX_GMBB_IDAC7 0x9a + +#define RADIO_2056_RX_RESERVED_ADDR0 0x0 +#define RADIO_2056_RX_IDCODE 0x1 +#define RADIO_2056_RX_RESERVED_ADDR2 0x2 +#define RADIO_2056_RX_RESERVED_ADDR3 0x3 +#define RADIO_2056_RX_RESERVED_ADDR4 0x4 +#define RADIO_2056_RX_RESERVED_ADDR5 0x5 +#define RADIO_2056_RX_RESERVED_ADDR6 0x6 +#define RADIO_2056_RX_RESERVED_ADDR7 0x7 +#define RADIO_2056_RX_COM_CTRL 0x8 +#define RADIO_2056_RX_COM_PU 0x9 +#define RADIO_2056_RX_COM_OVR 0xa +#define RADIO_2056_RX_COM_RESET 0xb +#define RADIO_2056_RX_COM_RCAL 0xc +#define RADIO_2056_RX_COM_RC_RXLPF 0xd +#define RADIO_2056_RX_COM_RC_TXLPF 0xe +#define RADIO_2056_RX_COM_RC_RXHPF 0xf +#define RADIO_2056_RX_RESERVED_ADDR16 0x10 +#define RADIO_2056_RX_RESERVED_ADDR17 0x11 +#define RADIO_2056_RX_RESERVED_ADDR18 0x12 +#define RADIO_2056_RX_RESERVED_ADDR19 0x13 +#define RADIO_2056_RX_RESERVED_ADDR20 0x14 +#define RADIO_2056_RX_RESERVED_ADDR21 0x15 +#define RADIO_2056_RX_RESERVED_ADDR22 0x16 +#define RADIO_2056_RX_RESERVED_ADDR23 0x17 +#define RADIO_2056_RX_RESERVED_ADDR24 0x18 +#define RADIO_2056_RX_RESERVED_ADDR25 0x19 +#define RADIO_2056_RX_RESERVED_ADDR26 0x1a +#define RADIO_2056_RX_RESERVED_ADDR27 0x1b +#define RADIO_2056_RX_RESERVED_ADDR28 0x1c +#define RADIO_2056_RX_RESERVED_ADDR29 0x1d +#define RADIO_2056_RX_RESERVED_ADDR30 0x1e +#define RADIO_2056_RX_RESERVED_ADDR31 0x1f +#define RADIO_2056_RX_RXIQCAL_RXMUX 0x20 +#define RADIO_2056_RX_RSSI_PU 0x21 +#define RADIO_2056_RX_RSSI_SEL 0x22 +#define RADIO_2056_RX_RSSI_GAIN 0x23 +#define RADIO_2056_RX_RSSI_NB_IDAC 0x24 +#define RADIO_2056_RX_RSSI_WB2I_IDAC_1 0x25 +#define RADIO_2056_RX_RSSI_WB2I_IDAC_2 0x26 +#define RADIO_2056_RX_RSSI_WB2Q_IDAC_1 0x27 +#define RADIO_2056_RX_RSSI_WB2Q_IDAC_2 0x28 +#define RADIO_2056_RX_RSSI_POLE 0x29 +#define RADIO_2056_RX_RSSI_WB1_IDAC 0x2a +#define RADIO_2056_RX_RSSI_MISC 0x2b +#define RADIO_2056_RX_LNAA_MASTER 0x2c +#define RADIO_2056_RX_LNAA_TUNE 0x2d +#define RADIO_2056_RX_LNAA_GAIN 0x2e +#define RADIO_2056_RX_LNA_A_SLOPE 0x2f +#define RADIO_2056_RX_BIASPOLE_LNAA1_IDAC 0x30 +#define RADIO_2056_RX_LNAA2_IDAC 0x31 +#define RADIO_2056_RX_LNA1A_MISC 0x32 +#define RADIO_2056_RX_LNAG_MASTER 0x33 +#define RADIO_2056_RX_LNAG_TUNE 0x34 +#define RADIO_2056_RX_LNAG_GAIN 0x35 +#define RADIO_2056_RX_LNA_G_SLOPE 0x36 +#define RADIO_2056_RX_BIASPOLE_LNAG1_IDAC 0x37 +#define RADIO_2056_RX_LNAG2_IDAC 0x38 +#define RADIO_2056_RX_LNA1G_MISC 0x39 +#define RADIO_2056_RX_MIXA_MASTER 0x3a +#define RADIO_2056_RX_MIXA_VCM 0x3b +#define RADIO_2056_RX_MIXA_CTRLPTAT 0x3c +#define RADIO_2056_RX_MIXA_LOB_BIAS 0x3d +#define RADIO_2056_RX_MIXA_CORE_IDAC 0x3e +#define RADIO_2056_RX_MIXA_CMFB_IDAC 0x3f +#define RADIO_2056_RX_MIXA_BIAS_AUX 0x40 +#define RADIO_2056_RX_MIXA_BIAS_MAIN 0x41 +#define RADIO_2056_RX_MIXA_BIAS_MISC 0x42 +#define RADIO_2056_RX_MIXA_MAST_BIAS 0x43 +#define RADIO_2056_RX_MIXG_MASTER 0x44 +#define RADIO_2056_RX_MIXG_VCM 0x45 +#define RADIO_2056_RX_MIXG_CTRLPTAT 0x46 +#define RADIO_2056_RX_MIXG_LOB_BIAS 0x47 +#define RADIO_2056_RX_MIXG_CORE_IDAC 0x48 +#define RADIO_2056_RX_MIXG_CMFB_IDAC 0x49 +#define RADIO_2056_RX_MIXG_BIAS_AUX 0x4a +#define RADIO_2056_RX_MIXG_BIAS_MAIN 0x4b +#define RADIO_2056_RX_MIXG_BIAS_MISC 0x4c +#define RADIO_2056_RX_MIXG_MAST_BIAS 0x4d +#define RADIO_2056_RX_TIA_MASTER 0x4e +#define RADIO_2056_RX_TIA_IOPAMP 0x4f +#define RADIO_2056_RX_TIA_QOPAMP 0x50 +#define RADIO_2056_RX_TIA_IMISC 0x51 +#define RADIO_2056_RX_TIA_QMISC 0x52 +#define RADIO_2056_RX_TIA_GAIN 0x53 +#define RADIO_2056_RX_TIA_SPARE1 0x54 +#define RADIO_2056_RX_TIA_SPARE2 0x55 +#define RADIO_2056_RX_BB_LPF_MASTER 0x56 +#define RADIO_2056_RX_AACI_MASTER 0x57 +#define RADIO_2056_RX_RXLPF_IDAC 0x58 +#define RADIO_2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 +#define RADIO_2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5a +#define RADIO_2056_RX_RXLPF_BIAS_DCCANCEL 0x5b +#define RADIO_2056_RX_RXLPF_OUTVCM 0x5c +#define RADIO_2056_RX_RXLPF_INVCM_BODY 0x5d +#define RADIO_2056_RX_RXLPF_CC_OP 0x5e +#define RADIO_2056_RX_RXLPF_GAIN 0x5f +#define RADIO_2056_RX_RXLPF_Q_BW 0x60 +#define RADIO_2056_RX_RXLPF_HP_CORNER_BW 0x61 +#define RADIO_2056_RX_RXLPF_RCCAL_HPC 0x62 +#define RADIO_2056_RX_RXHPF_OFF0 0x63 +#define RADIO_2056_RX_RXHPF_OFF1 0x64 +#define RADIO_2056_RX_RXHPF_OFF2 0x65 +#define RADIO_2056_RX_RXHPF_OFF3 0x66 +#define RADIO_2056_RX_RXHPF_OFF4 0x67 +#define RADIO_2056_RX_RXHPF_OFF5 0x68 +#define RADIO_2056_RX_RXHPF_OFF6 0x69 +#define RADIO_2056_RX_RXHPF_OFF7 0x6a +#define RADIO_2056_RX_RXLPF_RCCAL_LPC 0x6b +#define RADIO_2056_RX_RXLPF_OFF_0 0x6c +#define RADIO_2056_RX_RXLPF_OFF_1 0x6d +#define RADIO_2056_RX_RXLPF_OFF_2 0x6e +#define RADIO_2056_RX_RXLPF_OFF_3 0x6f +#define RADIO_2056_RX_RXLPF_OFF_4 0x70 +#define RADIO_2056_RX_UNUSED 0x71 +#define RADIO_2056_RX_VGA_MASTER 0x72 +#define RADIO_2056_RX_VGA_BIAS 0x73 +#define RADIO_2056_RX_VGA_BIAS_DCCANCEL 0x74 +#define RADIO_2056_RX_VGA_GAIN 0x75 +#define RADIO_2056_RX_VGA_HP_CORNER_BW 0x76 +#define RADIO_2056_RX_VGABUF_BIAS 0x77 +#define RADIO_2056_RX_VGABUF_GAIN_BW 0x78 +#define RADIO_2056_RX_TXFBMIX_A 0x79 +#define RADIO_2056_RX_TXFBMIX_G 0x7a +#define RADIO_2056_RX_RXSPARE1 0x7b +#define RADIO_2056_RX_RXSPARE2 0x7c +#define RADIO_2056_RX_RXSPARE3 0x7d +#define RADIO_2056_RX_RXSPARE4 0x7e +#define RADIO_2056_RX_RXSPARE5 0x7f +#define RADIO_2056_RX_RXSPARE6 0x80 +#define RADIO_2056_RX_RXSPARE7 0x81 +#define RADIO_2056_RX_RXSPARE8 0x82 +#define RADIO_2056_RX_RXSPARE9 0x83 +#define RADIO_2056_RX_RXSPARE10 0x84 +#define RADIO_2056_RX_RXSPARE11 0x85 +#define RADIO_2056_RX_RXSPARE12 0x86 +#define RADIO_2056_RX_RXSPARE13 0x87 +#define RADIO_2056_RX_RXSPARE14 0x88 +#define RADIO_2056_RX_RXSPARE15 0x89 +#define RADIO_2056_RX_RXSPARE16 0x8a +#define RADIO_2056_RX_STATUS_LNAA_GAIN 0x8b +#define RADIO_2056_RX_STATUS_LNAG_GAIN 0x8c +#define RADIO_2056_RX_STATUS_MIXTIA_GAIN 0x8d +#define RADIO_2056_RX_STATUS_RXLPF_GAIN 0x8e +#define RADIO_2056_RX_STATUS_VGA_BUF_GAIN 0x8f +#define RADIO_2056_RX_STATUS_RXLPF_Q 0x90 +#define RADIO_2056_RX_STATUS_RXLPF_BUF_BW 0x91 +#define RADIO_2056_RX_STATUS_RXLPF_VGA_HPC 0x92 +#define RADIO_2056_RX_STATUS_RXLPF_RC 0x93 +#define RADIO_2056_RX_STATUS_HPC_RC 0x94 + +#define RADIO_2056_LNA1_A_PU 0x01 +#define RADIO_2056_LNA2_A_PU 0x02 +#define RADIO_2056_LNA1_G_PU 0x01 +#define RADIO_2056_LNA2_G_PU 0x02 +#define RADIO_2056_MIXA_PU_I 0x01 +#define RADIO_2056_MIXA_PU_Q 0x02 +#define RADIO_2056_MIXA_PU_GM 0x10 +#define RADIO_2056_MIXG_PU_I 0x01 +#define RADIO_2056_MIXG_PU_Q 0x02 +#define RADIO_2056_MIXG_PU_GM 0x10 +#define RADIO_2056_TIA_PU 0x01 +#define RADIO_2056_BB_LPF_PU 0x20 +#define RADIO_2056_W1_PU 0x02 +#define RADIO_2056_W2_PU 0x04 +#define RADIO_2056_NB_PU 0x08 +#define RADIO_2056_RSSI_W1_SEL 0x02 +#define RADIO_2056_RSSI_W2_SEL 0x04 +#define RADIO_2056_RSSI_NB_SEL 0x08 +#define RADIO_2056_VCM_MASK 0x1c +#define RADIO_2056_RSSI_VCM_SHIFT 0x02 + +#define RADIO_2057_DACBUF_VINCM_CORE0 0x0 +#define RADIO_2057_IDCODE 0x1 +#define RADIO_2057_RCCAL_MASTER 0x2 +#define RADIO_2057_RCCAL_CAP_SIZE 0x3 +#define RADIO_2057_RCAL_CONFIG 0x4 +#define RADIO_2057_GPAIO_CONFIG 0x5 +#define RADIO_2057_GPAIO_SEL1 0x6 +#define RADIO_2057_GPAIO_SEL0 0x7 +#define RADIO_2057_CLPO_CONFIG 0x8 +#define RADIO_2057_BANDGAP_CONFIG 0x9 +#define RADIO_2057_BANDGAP_RCAL_TRIM 0xa +#define RADIO_2057_AFEREG_CONFIG 0xb +#define RADIO_2057_TEMPSENSE_CONFIG 0xc +#define RADIO_2057_XTAL_CONFIG1 0xd +#define RADIO_2057_XTAL_ICORE_SIZE 0xe +#define RADIO_2057_XTAL_BUF_SIZE 0xf +#define RADIO_2057_XTAL_PULLCAP_SIZE 0x10 +#define RADIO_2057_RFPLL_MASTER 0x11 +#define RADIO_2057_VCOMONITOR_VTH_L 0x12 +#define RADIO_2057_VCOMONITOR_VTH_H 0x13 +#define RADIO_2057_VCOCAL_BIASRESET_RFPLLREG_VOUT 0x14 +#define RADIO_2057_VCO_VARCSIZE_IDAC 0x15 +#define RADIO_2057_VCOCAL_COUNTVAL0 0x16 +#define RADIO_2057_VCOCAL_COUNTVAL1 0x17 +#define RADIO_2057_VCOCAL_INTCLK_COUNT 0x18 +#define RADIO_2057_VCOCAL_MASTER 0x19 +#define RADIO_2057_VCOCAL_NUMCAPCHANGE 0x1a +#define RADIO_2057_VCOCAL_WINSIZE 0x1b +#define RADIO_2057_VCOCAL_DELAY_AFTER_REFRESH 0x1c +#define RADIO_2057_VCOCAL_DELAY_AFTER_CLOSELOOP 0x1d +#define RADIO_2057_VCOCAL_DELAY_AFTER_OPENLOOP 0x1e +#define RADIO_2057_VCOCAL_DELAY_BEFORE_OPENLOOP 0x1f +#define RADIO_2057_VCO_FORCECAPEN_FORCECAP1 0x20 +#define RADIO_2057_VCO_FORCECAP0 0x21 +#define RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE 0x22 +#define RADIO_2057_RFPLL_PFD_RESET_PW 0x23 +#define RADIO_2057_RFPLL_LOOPFILTER_R2 0x24 +#define RADIO_2057_RFPLL_LOOPFILTER_R1 0x25 +#define RADIO_2057_RFPLL_LOOPFILTER_C3 0x26 +#define RADIO_2057_RFPLL_LOOPFILTER_C2 0x27 +#define RADIO_2057_RFPLL_LOOPFILTER_C1 0x28 +#define RADIO_2057_CP_KPD_IDAC 0x29 +#define RADIO_2057_RFPLL_IDACS 0x2a +#define RADIO_2057_RFPLL_MISC_EN 0x2b +#define RADIO_2057_RFPLL_MMD0 0x2c +#define RADIO_2057_RFPLL_MMD1 0x2d +#define RADIO_2057_RFPLL_MISC_CAL_RESETN 0x2e +#define RADIO_2057_JTAGXTAL_SIZE_CPBIAS_FILTRES 0x2f +#define RADIO_2057_VCO_ALCREF_BBPLLXTAL_SIZE 0x30 +#define RADIO_2057_VCOCAL_READCAP0 0x31 +#define RADIO_2057_VCOCAL_READCAP1 0x32 +#define RADIO_2057_VCOCAL_STATUS 0x33 +#define RADIO_2057_LOGEN_PUS 0x34 +#define RADIO_2057_LOGEN_PTAT_RESETS 0x35 +#define RADIO_2057_VCOBUF_IDACS 0x36 +#define RADIO_2057_VCOBUF_TUNE 0x37 +#define RADIO_2057_CMOSBUF_TX2GQ_IDACS 0x38 +#define RADIO_2057_CMOSBUF_TX2GI_IDACS 0x39 +#define RADIO_2057_CMOSBUF_TX5GQ_IDACS 0x3a +#define RADIO_2057_CMOSBUF_TX5GI_IDACS 0x3b +#define RADIO_2057_CMOSBUF_RX2GQ_IDACS 0x3c +#define RADIO_2057_CMOSBUF_RX2GI_IDACS 0x3d +#define RADIO_2057_CMOSBUF_RX5GQ_IDACS 0x3e +#define RADIO_2057_CMOSBUF_RX5GI_IDACS 0x3f +#define RADIO_2057_LOGEN_MX2G_IDACS 0x40 +#define RADIO_2057_LOGEN_MX2G_TUNE 0x41 +#define RADIO_2057_LOGEN_MX5G_IDACS 0x42 +#define RADIO_2057_LOGEN_MX5G_TUNE 0x43 +#define RADIO_2057_LOGEN_MX5G_RCCR 0x44 +#define RADIO_2057_LOGEN_INDBUF2G_IDAC 0x45 +#define RADIO_2057_LOGEN_INDBUF2G_IBOOST 0x46 +#define RADIO_2057_LOGEN_INDBUF2G_TUNE 0x47 +#define RADIO_2057_LOGEN_INDBUF5G_IDAC 0x48 +#define RADIO_2057_LOGEN_INDBUF5G_IBOOST 0x49 +#define RADIO_2057_LOGEN_INDBUF5G_TUNE 0x4a +#define RADIO_2057_CMOSBUF_TX_RCCR 0x4b +#define RADIO_2057_CMOSBUF_RX_RCCR 0x4c +#define RADIO_2057_LOGEN_SEL_PKDET 0x4d +#define RADIO_2057_CMOSBUF_SHAREIQ_PTAT 0x4e +#define RADIO_2057_RXTXBIAS_CONFIG_CORE0 0x4f +#define RADIO_2057_TXGM_TXRF_PUS_CORE0 0x50 +#define RADIO_2057_TXGM_IDAC_BLEED_CORE0 0x51 +#define RADIO_2057_TXGM_GAIN_CORE0 0x56 +#define RADIO_2057_TXGM2G_PKDET_PUS_CORE0 0x57 +#define RADIO_2057_PAD2G_PTATS_CORE0 0x58 +#define RADIO_2057_PAD2G_IDACS_CORE0 0x59 +#define RADIO_2057_PAD2G_BOOST_PU_CORE0 0x5a +#define RADIO_2057_PAD2G_CASCV_GAIN_CORE0 0x5b +#define RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0 0x5c +#define RADIO_2057_TXMIX2G_LODC_CORE0 0x5d +#define RADIO_2057_PAD2G_TUNE_PUS_CORE0 0x5e +#define RADIO_2057_IPA2G_GAIN_CORE0 0x5f +#define RADIO_2057_TSSI2G_SPARE1_CORE0 0x60 +#define RADIO_2057_TSSI2G_SPARE2_CORE0 0x61 +#define RADIO_2057_IPA2G_TUNEV_CASCV_PTAT_CORE0 0x62 +#define RADIO_2057_IPA2G_IMAIN_CORE0 0x63 +#define RADIO_2057_IPA2G_CASCONV_CORE0 0x64 +#define RADIO_2057_IPA2G_CASCOFFV_CORE0 0x65 +#define RADIO_2057_IPA2G_BIAS_FILTER_CORE0 0x66 +#define RADIO_2057_TX5G_PKDET_CORE0 0x69 +#define RADIO_2057_PGA_PTAT_TXGM5G_PU_CORE0 0x6a +#define RADIO_2057_PAD5G_PTATS1_CORE0 0x6b +#define RADIO_2057_PAD5G_CLASS_PTATS2_CORE0 0x6c +#define RADIO_2057_PGA_BOOSTPTAT_IMAIN_CORE0 0x6d +#define RADIO_2057_PAD5G_CASCV_IMAIN_CORE0 0x6e +#define RADIO_2057_TXMIX5G_IBOOST_PAD_IAUX_CORE0 0x6f +#define RADIO_2057_PGA_BOOST_TUNE_CORE0 0x70 +#define RADIO_2057_PGA_GAIN_CORE0 0x71 +#define RADIO_2057_PAD5G_CASCOFFV_GAIN_PUS_CORE0 0x72 +#define RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0 0x73 +#define RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0 0x74 +#define RADIO_2057_IPA5G_IAUX_CORE0 0x75 +#define RADIO_2057_IPA5G_GAIN_CORE0 0x76 +#define RADIO_2057_TSSI5G_SPARE1_CORE0 0x77 +#define RADIO_2057_TSSI5G_SPARE2_CORE0 0x78 +#define RADIO_2057_IPA5G_CASCOFFV_PU_CORE0 0x79 +#define RADIO_2057_IPA5G_PTAT_CORE0 0x7a +#define RADIO_2057_IPA5G_IMAIN_CORE0 0x7b +#define RADIO_2057_IPA5G_CASCONV_CORE0 0x7c +#define RADIO_2057_IPA5G_BIAS_FILTER_CORE0 0x7d +#define RADIO_2057_PAD_BIAS_FILTER_BWS_CORE0 0x80 +#define RADIO_2057_TR2G_CONFIG1_CORE0_NU 0x81 +#define RADIO_2057_TR2G_CONFIG2_CORE0_NU 0x82 +#define RADIO_2057_LNA5G_RFEN_CORE0 0x83 +#define RADIO_2057_TR5G_CONFIG2_CORE0_NU 0x84 +#define RADIO_2057_RXRFBIAS_IBOOST_PU_CORE0 0x85 +#define RADIO_2057_RXRF_IABAND_RXGM_IMAIN_PTAT_CORE0 0x86 +#define RADIO_2057_RXGM_CMFBITAIL_AUXPTAT_CORE0 0x87 +#define RADIO_2057_RXMIX_ICORE_RXGM_IAUX_CORE0 0x88 +#define RADIO_2057_RXMIX_CMFBITAIL_PU_CORE0 0x89 +#define RADIO_2057_LNA2_IMAIN_PTAT_PU_CORE0 0x8a +#define RADIO_2057_LNA2_IAUX_PTAT_CORE0 0x8b +#define RADIO_2057_LNA1_IMAIN_PTAT_PU_CORE0 0x8c +#define RADIO_2057_LNA15G_INPUT_MATCH_TUNE_CORE0 0x8d +#define RADIO_2057_RXRFBIAS_BANDSEL_CORE0 0x8e +#define RADIO_2057_TIA_CONFIG_CORE0 0x8f +#define RADIO_2057_TIA_IQGAIN_CORE0 0x90 +#define RADIO_2057_TIA_IBIAS2_CORE0 0x91 +#define RADIO_2057_TIA_IBIAS1_CORE0 0x92 +#define RADIO_2057_TIA_SPARE_Q_CORE0 0x93 +#define RADIO_2057_TIA_SPARE_I_CORE0 0x94 +#define RADIO_2057_RXMIX2G_PUS_CORE0 0x95 +#define RADIO_2057_RXMIX2G_VCMREFS_CORE0 0x96 +#define RADIO_2057_RXMIX2G_LODC_QI_CORE0 0x97 +#define RADIO_2057_W12G_BW_LNA2G_PUS_CORE0 0x98 +#define RADIO_2057_LNA2G_GAIN_CORE0 0x99 +#define RADIO_2057_LNA2G_TUNE_CORE0 0x9a +#define RADIO_2057_RXMIX5G_PUS_CORE0 0x9b +#define RADIO_2057_RXMIX5G_VCMREFS_CORE0 0x9c +#define RADIO_2057_RXMIX5G_LODC_QI_CORE0 0x9d +#define RADIO_2057_W15G_BW_LNA5G_PUS_CORE0 0x9e +#define RADIO_2057_LNA5G_GAIN_CORE0 0x9f +#define RADIO_2057_LNA5G_TUNE_CORE0 0xa0 +#define RADIO_2057_LPFSEL_TXRX_RXBB_PUS_CORE0 0xa1 +#define RADIO_2057_RXBB_BIAS_MASTER_CORE0 0xa2 +#define RADIO_2057_RXBB_VGABUF_IDACS_CORE0 0xa3 +#define RADIO_2057_LPF_VCMREF_TXBUF_VCMREF_CORE0 0xa4 +#define RADIO_2057_TXBUF_VINCM_CORE0 0xa5 +#define RADIO_2057_TXBUF_IDACS_CORE0 0xa6 +#define RADIO_2057_LPF_RESP_RXBUF_BW_CORE0 0xa7 +#define RADIO_2057_RXBB_CC_CORE0 0xa8 +#define RADIO_2057_RXBB_SPARE3_CORE0 0xa9 +#define RADIO_2057_RXBB_RCCAL_HPC_CORE0 0xaa +#define RADIO_2057_LPF_IDACS_CORE0 0xab +#define RADIO_2057_LPFBYP_DCLOOP_BYP_IDAC_CORE0 0xac +#define RADIO_2057_TXBUF_GAIN_CORE0 0xad +#define RADIO_2057_AFELOOPBACK_AACI_RESP_CORE0 0xae +#define RADIO_2057_RXBUF_DEGEN_CORE0 0xaf +#define RADIO_2057_RXBB_SPARE2_CORE0 0xb0 +#define RADIO_2057_RXBB_SPARE1_CORE0 0xb1 +#define RADIO_2057_RSSI_MASTER_CORE0 0xb2 +#define RADIO_2057_W2_MASTER_CORE0 0xb3 +#define RADIO_2057_NB_MASTER_CORE0 0xb4 +#define RADIO_2057_W2_IDACS0_Q_CORE0 0xb5 +#define RADIO_2057_W2_IDACS1_Q_CORE0 0xb6 +#define RADIO_2057_W2_IDACS0_I_CORE0 0xb7 +#define RADIO_2057_W2_IDACS1_I_CORE0 0xb8 +#define RADIO_2057_RSSI_GPAIOSEL_W1_IDACS_CORE0 0xb9 +#define RADIO_2057_NB_IDACS_Q_CORE0 0xba +#define RADIO_2057_NB_IDACS_I_CORE0 0xbb +#define RADIO_2057_BACKUP4_CORE0 0xc1 +#define RADIO_2057_BACKUP3_CORE0 0xc2 +#define RADIO_2057_BACKUP2_CORE0 0xc3 +#define RADIO_2057_BACKUP1_CORE0 0xc4 +#define RADIO_2057_SPARE16_CORE0 0xc5 +#define RADIO_2057_SPARE15_CORE0 0xc6 +#define RADIO_2057_SPARE14_CORE0 0xc7 +#define RADIO_2057_SPARE13_CORE0 0xc8 +#define RADIO_2057_SPARE12_CORE0 0xc9 +#define RADIO_2057_SPARE11_CORE0 0xca +#define RADIO_2057_TX2G_BIAS_RESETS_CORE0 0xcb +#define RADIO_2057_TX5G_BIAS_RESETS_CORE0 0xcc +#define RADIO_2057_IQTEST_SEL_PU 0xcd +#define RADIO_2057_XTAL_CONFIG2 0xce +#define RADIO_2057_BUFS_MISC_LPFBW_CORE0 0xcf +#define RADIO_2057_TXLPF_RCCAL_CORE0 0xd0 +#define RADIO_2057_RXBB_GPAIOSEL_RXLPF_RCCAL_CORE0 0xd1 +#define RADIO_2057_LPF_GAIN_CORE0 0xd2 +#define RADIO_2057_DACBUF_IDACS_BW_CORE0 0xd3 +#define RADIO_2057_RXTXBIAS_CONFIG_CORE1 0xd4 +#define RADIO_2057_TXGM_TXRF_PUS_CORE1 0xd5 +#define RADIO_2057_TXGM_IDAC_BLEED_CORE1 0xd6 +#define RADIO_2057_TXGM_GAIN_CORE1 0xdb +#define RADIO_2057_TXGM2G_PKDET_PUS_CORE1 0xdc +#define RADIO_2057_PAD2G_PTATS_CORE1 0xdd +#define RADIO_2057_PAD2G_IDACS_CORE1 0xde +#define RADIO_2057_PAD2G_BOOST_PU_CORE1 0xdf +#define RADIO_2057_PAD2G_CASCV_GAIN_CORE1 0xe0 +#define RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1 0xe1 +#define RADIO_2057_TXMIX2G_LODC_CORE1 0xe2 +#define RADIO_2057_PAD2G_TUNE_PUS_CORE1 0xe3 +#define RADIO_2057_IPA2G_GAIN_CORE1 0xe4 +#define RADIO_2057_TSSI2G_SPARE1_CORE1 0xe5 +#define RADIO_2057_TSSI2G_SPARE2_CORE1 0xe6 +#define RADIO_2057_IPA2G_TUNEV_CASCV_PTAT_CORE1 0xe7 +#define RADIO_2057_IPA2G_IMAIN_CORE1 0xe8 +#define RADIO_2057_IPA2G_CASCONV_CORE1 0xe9 +#define RADIO_2057_IPA2G_CASCOFFV_CORE1 0xea +#define RADIO_2057_IPA2G_BIAS_FILTER_CORE1 0xeb +#define RADIO_2057_TX5G_PKDET_CORE1 0xee +#define RADIO_2057_PGA_PTAT_TXGM5G_PU_CORE1 0xef +#define RADIO_2057_PAD5G_PTATS1_CORE1 0xf0 +#define RADIO_2057_PAD5G_CLASS_PTATS2_CORE1 0xf1 +#define RADIO_2057_PGA_BOOSTPTAT_IMAIN_CORE1 0xf2 +#define RADIO_2057_PAD5G_CASCV_IMAIN_CORE1 0xf3 +#define RADIO_2057_TXMIX5G_IBOOST_PAD_IAUX_CORE1 0xf4 +#define RADIO_2057_PGA_BOOST_TUNE_CORE1 0xf5 +#define RADIO_2057_PGA_GAIN_CORE1 0xf6 +#define RADIO_2057_PAD5G_CASCOFFV_GAIN_PUS_CORE1 0xf7 +#define RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1 0xf8 +#define RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1 0xf9 +#define RADIO_2057_IPA5G_IAUX_CORE1 0xfa +#define RADIO_2057_IPA5G_GAIN_CORE1 0xfb +#define RADIO_2057_TSSI5G_SPARE1_CORE1 0xfc +#define RADIO_2057_TSSI5G_SPARE2_CORE1 0xfd +#define RADIO_2057_IPA5G_CASCOFFV_PU_CORE1 0xfe +#define RADIO_2057_IPA5G_PTAT_CORE1 0xff +#define RADIO_2057_IPA5G_IMAIN_CORE1 0x100 +#define RADIO_2057_IPA5G_CASCONV_CORE1 0x101 +#define RADIO_2057_IPA5G_BIAS_FILTER_CORE1 0x102 +#define RADIO_2057_PAD_BIAS_FILTER_BWS_CORE1 0x105 +#define RADIO_2057_TR2G_CONFIG1_CORE1_NU 0x106 +#define RADIO_2057_TR2G_CONFIG2_CORE1_NU 0x107 +#define RADIO_2057_LNA5G_RFEN_CORE1 0x108 +#define RADIO_2057_TR5G_CONFIG2_CORE1_NU 0x109 +#define RADIO_2057_RXRFBIAS_IBOOST_PU_CORE1 0x10a +#define RADIO_2057_RXRF_IABAND_RXGM_IMAIN_PTAT_CORE1 0x10b +#define RADIO_2057_RXGM_CMFBITAIL_AUXPTAT_CORE1 0x10c +#define RADIO_2057_RXMIX_ICORE_RXGM_IAUX_CORE1 0x10d +#define RADIO_2057_RXMIX_CMFBITAIL_PU_CORE1 0x10e +#define RADIO_2057_LNA2_IMAIN_PTAT_PU_CORE1 0x10f +#define RADIO_2057_LNA2_IAUX_PTAT_CORE1 0x110 +#define RADIO_2057_LNA1_IMAIN_PTAT_PU_CORE1 0x111 +#define RADIO_2057_LNA15G_INPUT_MATCH_TUNE_CORE1 0x112 +#define RADIO_2057_RXRFBIAS_BANDSEL_CORE1 0x113 +#define RADIO_2057_TIA_CONFIG_CORE1 0x114 +#define RADIO_2057_TIA_IQGAIN_CORE1 0x115 +#define RADIO_2057_TIA_IBIAS2_CORE1 0x116 +#define RADIO_2057_TIA_IBIAS1_CORE1 0x117 +#define RADIO_2057_TIA_SPARE_Q_CORE1 0x118 +#define RADIO_2057_TIA_SPARE_I_CORE1 0x119 +#define RADIO_2057_RXMIX2G_PUS_CORE1 0x11a +#define RADIO_2057_RXMIX2G_VCMREFS_CORE1 0x11b +#define RADIO_2057_RXMIX2G_LODC_QI_CORE1 0x11c +#define RADIO_2057_W12G_BW_LNA2G_PUS_CORE1 0x11d +#define RADIO_2057_LNA2G_GAIN_CORE1 0x11e +#define RADIO_2057_LNA2G_TUNE_CORE1 0x11f +#define RADIO_2057_RXMIX5G_PUS_CORE1 0x120 +#define RADIO_2057_RXMIX5G_VCMREFS_CORE1 0x121 +#define RADIO_2057_RXMIX5G_LODC_QI_CORE1 0x122 +#define RADIO_2057_W15G_BW_LNA5G_PUS_CORE1 0x123 +#define RADIO_2057_LNA5G_GAIN_CORE1 0x124 +#define RADIO_2057_LNA5G_TUNE_CORE1 0x125 +#define RADIO_2057_LPFSEL_TXRX_RXBB_PUS_CORE1 0x126 +#define RADIO_2057_RXBB_BIAS_MASTER_CORE1 0x127 +#define RADIO_2057_RXBB_VGABUF_IDACS_CORE1 0x128 +#define RADIO_2057_LPF_VCMREF_TXBUF_VCMREF_CORE1 0x129 +#define RADIO_2057_TXBUF_VINCM_CORE1 0x12a +#define RADIO_2057_TXBUF_IDACS_CORE1 0x12b +#define RADIO_2057_LPF_RESP_RXBUF_BW_CORE1 0x12c +#define RADIO_2057_RXBB_CC_CORE1 0x12d +#define RADIO_2057_RXBB_SPARE3_CORE1 0x12e +#define RADIO_2057_RXBB_RCCAL_HPC_CORE1 0x12f +#define RADIO_2057_LPF_IDACS_CORE1 0x130 +#define RADIO_2057_LPFBYP_DCLOOP_BYP_IDAC_CORE1 0x131 +#define RADIO_2057_TXBUF_GAIN_CORE1 0x132 +#define RADIO_2057_AFELOOPBACK_AACI_RESP_CORE1 0x133 +#define RADIO_2057_RXBUF_DEGEN_CORE1 0x134 +#define RADIO_2057_RXBB_SPARE2_CORE1 0x135 +#define RADIO_2057_RXBB_SPARE1_CORE1 0x136 +#define RADIO_2057_RSSI_MASTER_CORE1 0x137 +#define RADIO_2057_W2_MASTER_CORE1 0x138 +#define RADIO_2057_NB_MASTER_CORE1 0x139 +#define RADIO_2057_W2_IDACS0_Q_CORE1 0x13a +#define RADIO_2057_W2_IDACS1_Q_CORE1 0x13b +#define RADIO_2057_W2_IDACS0_I_CORE1 0x13c +#define RADIO_2057_W2_IDACS1_I_CORE1 0x13d +#define RADIO_2057_RSSI_GPAIOSEL_W1_IDACS_CORE1 0x13e +#define RADIO_2057_NB_IDACS_Q_CORE1 0x13f +#define RADIO_2057_NB_IDACS_I_CORE1 0x140 +#define RADIO_2057_BACKUP4_CORE1 0x146 +#define RADIO_2057_BACKUP3_CORE1 0x147 +#define RADIO_2057_BACKUP2_CORE1 0x148 +#define RADIO_2057_BACKUP1_CORE1 0x149 +#define RADIO_2057_SPARE16_CORE1 0x14a +#define RADIO_2057_SPARE15_CORE1 0x14b +#define RADIO_2057_SPARE14_CORE1 0x14c +#define RADIO_2057_SPARE13_CORE1 0x14d +#define RADIO_2057_SPARE12_CORE1 0x14e +#define RADIO_2057_SPARE11_CORE1 0x14f +#define RADIO_2057_TX2G_BIAS_RESETS_CORE1 0x150 +#define RADIO_2057_TX5G_BIAS_RESETS_CORE1 0x151 +#define RADIO_2057_SPARE8_CORE1 0x152 +#define RADIO_2057_SPARE7_CORE1 0x153 +#define RADIO_2057_BUFS_MISC_LPFBW_CORE1 0x154 +#define RADIO_2057_TXLPF_RCCAL_CORE1 0x155 +#define RADIO_2057_RXBB_GPAIOSEL_RXLPF_RCCAL_CORE1 0x156 +#define RADIO_2057_LPF_GAIN_CORE1 0x157 +#define RADIO_2057_DACBUF_IDACS_BW_CORE1 0x158 +#define RADIO_2057_DACBUF_VINCM_CORE1 0x159 +#define RADIO_2057_RCCAL_START_R1_Q1_P1 0x15a +#define RADIO_2057_RCCAL_X1 0x15b +#define RADIO_2057_RCCAL_TRC0 0x15c +#define RADIO_2057_RCCAL_TRC1 0x15d +#define RADIO_2057_RCCAL_DONE_OSCCAP 0x15e +#define RADIO_2057_RCCAL_N0_0 0x15f +#define RADIO_2057_RCCAL_N0_1 0x160 +#define RADIO_2057_RCCAL_N1_0 0x161 +#define RADIO_2057_RCCAL_N1_1 0x162 +#define RADIO_2057_RCAL_STATUS 0x163 +#define RADIO_2057_XTALPUOVR_PINCTRL 0x164 +#define RADIO_2057_OVR_REG0 0x165 +#define RADIO_2057_OVR_REG1 0x166 +#define RADIO_2057_OVR_REG2 0x167 +#define RADIO_2057_OVR_REG3 0x168 +#define RADIO_2057_OVR_REG4 0x169 +#define RADIO_2057_RCCAL_SCAP_VAL 0x16a +#define RADIO_2057_RCCAL_BCAP_VAL 0x16b +#define RADIO_2057_RCCAL_HPC_VAL 0x16c +#define RADIO_2057_RCCAL_OVERRIDES 0x16d +#define RADIO_2057_TX0_IQCAL_GAIN_BW 0x170 +#define RADIO_2057_TX0_LOFT_FINE_I 0x171 +#define RADIO_2057_TX0_LOFT_FINE_Q 0x172 +#define RADIO_2057_TX0_LOFT_COARSE_I 0x173 +#define RADIO_2057_TX0_LOFT_COARSE_Q 0x174 +#define RADIO_2057_TX0_TX_SSI_MASTER 0x175 +#define RADIO_2057_TX0_IQCAL_VCM_HG 0x176 +#define RADIO_2057_TX0_IQCAL_IDAC 0x177 +#define RADIO_2057_TX0_TSSI_VCM 0x178 +#define RADIO_2057_TX0_TX_SSI_MUX 0x179 +#define RADIO_2057_TX0_TSSIA 0x17a +#define RADIO_2057_TX0_TSSIG 0x17b +#define RADIO_2057_TX0_TSSI_MISC1 0x17c +#define RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN 0x17d +#define RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP 0x17e +#define RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN 0x17f +#define RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP 0x180 +#define RADIO_2057_TX1_IQCAL_GAIN_BW 0x190 +#define RADIO_2057_TX1_LOFT_FINE_I 0x191 +#define RADIO_2057_TX1_LOFT_FINE_Q 0x192 +#define RADIO_2057_TX1_LOFT_COARSE_I 0x193 +#define RADIO_2057_TX1_LOFT_COARSE_Q 0x194 +#define RADIO_2057_TX1_TX_SSI_MASTER 0x195 +#define RADIO_2057_TX1_IQCAL_VCM_HG 0x196 +#define RADIO_2057_TX1_IQCAL_IDAC 0x197 +#define RADIO_2057_TX1_TSSI_VCM 0x198 +#define RADIO_2057_TX1_TX_SSI_MUX 0x199 +#define RADIO_2057_TX1_TSSIA 0x19a +#define RADIO_2057_TX1_TSSIG 0x19b +#define RADIO_2057_TX1_TSSI_MISC1 0x19c +#define RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN 0x19d +#define RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP 0x19e +#define RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN 0x19f +#define RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP 0x1a0 +#define RADIO_2057_AFE_VCM_CAL_MASTER_CORE0 0x1a1 +#define RADIO_2057_AFE_SET_VCM_I_CORE0 0x1a2 +#define RADIO_2057_AFE_SET_VCM_Q_CORE0 0x1a3 +#define RADIO_2057_AFE_STATUS_VCM_IQADC_CORE0 0x1a4 +#define RADIO_2057_AFE_STATUS_VCM_I_CORE0 0x1a5 +#define RADIO_2057_AFE_STATUS_VCM_Q_CORE0 0x1a6 +#define RADIO_2057_AFE_VCM_CAL_MASTER_CORE1 0x1a7 +#define RADIO_2057_AFE_SET_VCM_I_CORE1 0x1a8 +#define RADIO_2057_AFE_SET_VCM_Q_CORE1 0x1a9 +#define RADIO_2057_AFE_STATUS_VCM_IQADC_CORE1 0x1aa +#define RADIO_2057_AFE_STATUS_VCM_I_CORE1 0x1ab +#define RADIO_2057_AFE_STATUS_VCM_Q_CORE1 0x1ac + +#define RADIO_2057v7_DACBUF_VINCM_CORE0 0x1ad +#define RADIO_2057v7_RCCAL_MASTER 0x1ae +#define RADIO_2057v7_TR2G_CONFIG3_CORE0_NU 0x1af +#define RADIO_2057v7_TR2G_CONFIG3_CORE1_NU 0x1b0 +#define RADIO_2057v7_LOGEN_PUS1 0x1b1 +#define RADIO_2057v7_OVR_REG5 0x1b2 +#define RADIO_2057v7_OVR_REG6 0x1b3 +#define RADIO_2057v7_OVR_REG7 0x1b4 +#define RADIO_2057v7_OVR_REG8 0x1b5 +#define RADIO_2057v7_OVR_REG9 0x1b6 +#define RADIO_2057v7_OVR_REG10 0x1b7 +#define RADIO_2057v7_OVR_REG11 0x1b8 +#define RADIO_2057v7_OVR_REG12 0x1b9 +#define RADIO_2057v7_OVR_REG13 0x1ba +#define RADIO_2057v7_OVR_REG14 0x1bb +#define RADIO_2057v7_OVR_REG15 0x1bc +#define RADIO_2057v7_OVR_REG16 0x1bd +#define RADIO_2057v7_OVR_REG1 0x1be +#define RADIO_2057v7_OVR_REG18 0x1bf +#define RADIO_2057v7_OVR_REG19 0x1c0 +#define RADIO_2057v7_OVR_REG20 0x1c1 +#define RADIO_2057v7_OVR_REG21 0x1c2 +#define RADIO_2057v7_OVR_REG2 0x1c3 +#define RADIO_2057v7_OVR_REG23 0x1c4 +#define RADIO_2057v7_OVR_REG24 0x1c5 +#define RADIO_2057v7_OVR_REG25 0x1c6 +#define RADIO_2057v7_OVR_REG26 0x1c7 +#define RADIO_2057v7_OVR_REG27 0x1c8 +#define RADIO_2057v7_OVR_REG28 0x1c9 +#define RADIO_2057v7_IQTEST_SEL_PU2 0x1ca + +#define RADIO_2057_VCM_MASK 0x7 + +#endif /* _BRCM_PHY_RADIO_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h new file mode 100644 index 0000000..211bc3a --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define NPHY_TBL_ID_GAIN1 0 +#define NPHY_TBL_ID_GAIN2 1 +#define NPHY_TBL_ID_GAINBITS1 2 +#define NPHY_TBL_ID_GAINBITS2 3 +#define NPHY_TBL_ID_GAINLIMIT 4 +#define NPHY_TBL_ID_WRSSIGainLimit 5 +#define NPHY_TBL_ID_RFSEQ 7 +#define NPHY_TBL_ID_AFECTRL 8 +#define NPHY_TBL_ID_ANTSWCTRLLUT 9 +#define NPHY_TBL_ID_IQLOCAL 15 +#define NPHY_TBL_ID_NOISEVAR 16 +#define NPHY_TBL_ID_SAMPLEPLAY 17 +#define NPHY_TBL_ID_CORE1TXPWRCTL 26 +#define NPHY_TBL_ID_CORE2TXPWRCTL 27 +#define NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL 30 + +#define NPHY_TBL_ID_EPSILONTBL0 31 +#define NPHY_TBL_ID_SCALARTBL0 32 +#define NPHY_TBL_ID_EPSILONTBL1 33 +#define NPHY_TBL_ID_SCALARTBL1 34 + +#define NPHY_TO_BPHY_OFF 0xc00 + +#define NPHY_BandControl_currentBand 0x0001 +#define RFCC_CHIP0_PU 0x0400 +#define RFCC_POR_FORCE 0x0040 +#define RFCC_OE_POR_FORCE 0x0080 +#define NPHY_RfctrlIntc_override_OFF 0 +#define NPHY_RfctrlIntc_override_TRSW 1 +#define NPHY_RfctrlIntc_override_PA 2 +#define NPHY_RfctrlIntc_override_EXT_LNA_PU 3 +#define NPHY_RfctrlIntc_override_EXT_LNA_GAIN 4 +#define RIFS_ENABLE 0x80 +#define BPHY_BAND_SEL_UP20 0x10 +#define NPHY_MLenable 0x02 + +#define NPHY_RfseqMode_CoreActv_override 0x0001 +#define NPHY_RfseqMode_Trigger_override 0x0002 +#define NPHY_RfseqCoreActv_TxRxChain0 (0x11) +#define NPHY_RfseqCoreActv_TxRxChain1 (0x22) + +#define NPHY_RfseqTrigger_rx2tx 0x0001 +#define NPHY_RfseqTrigger_tx2rx 0x0002 +#define NPHY_RfseqTrigger_updategainh 0x0004 +#define NPHY_RfseqTrigger_updategainl 0x0008 +#define NPHY_RfseqTrigger_updategainu 0x0010 +#define NPHY_RfseqTrigger_reset2rx 0x0020 +#define NPHY_RfseqStatus_rx2tx 0x0001 +#define NPHY_RfseqStatus_tx2rx 0x0002 +#define NPHY_RfseqStatus_updategainh 0x0004 +#define NPHY_RfseqStatus_updategainl 0x0008 +#define NPHY_RfseqStatus_updategainu 0x0010 +#define NPHY_RfseqStatus_reset2rx 0x0020 +#define NPHY_ClassifierCtrl_cck_en 0x1 +#define NPHY_ClassifierCtrl_ofdm_en 0x2 +#define NPHY_ClassifierCtrl_waited_en 0x4 +#define NPHY_IQFlip_ADC1 0x0001 +#define NPHY_IQFlip_ADC2 0x0010 +#define NPHY_sampleCmd_STOP 0x0002 + +#define RX_GF_OR_MM 0x0004 +#define RX_GF_MM_AUTO 0x0100 + +#define NPHY_iqloCalCmdGctl_IQLO_CAL_EN 0x8000 + +#define NPHY_IqestCmd_iqstart 0x1 +#define NPHY_IqestCmd_iqMode 0x2 + +#define NPHY_TxPwrCtrlCmd_pwrIndex_init 0x40 +#define NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 0x19 + +#define PRIM_SEL_UP20 0x8000 + +#define NPHY_RFSEQ_RX2TX 0x0 +#define NPHY_RFSEQ_TX2RX 0x1 +#define NPHY_RFSEQ_RESET2RX 0x2 +#define NPHY_RFSEQ_UPDATEGAINH 0x3 +#define NPHY_RFSEQ_UPDATEGAINL 0x4 +#define NPHY_RFSEQ_UPDATEGAINU 0x5 + +#define NPHY_RFSEQ_CMD_NOP 0x0 +#define NPHY_RFSEQ_CMD_RXG_FBW 0x1 +#define NPHY_RFSEQ_CMD_TR_SWITCH 0x2 +#define NPHY_RFSEQ_CMD_EXT_PA 0x3 +#define NPHY_RFSEQ_CMD_RXPD_TXPD 0x4 +#define NPHY_RFSEQ_CMD_TX_GAIN 0x5 +#define NPHY_RFSEQ_CMD_RX_GAIN 0x6 +#define NPHY_RFSEQ_CMD_SET_HPF_BW 0x7 +#define NPHY_RFSEQ_CMD_CLR_HIQ_DIS 0x8 +#define NPHY_RFSEQ_CMD_END 0xf + +#define NPHY_REV3_RFSEQ_CMD_NOP 0x0 +#define NPHY_REV3_RFSEQ_CMD_RXG_FBW 0x1 +#define NPHY_REV3_RFSEQ_CMD_TR_SWITCH 0x2 +#define NPHY_REV3_RFSEQ_CMD_INT_PA_PU 0x3 +#define NPHY_REV3_RFSEQ_CMD_EXT_PA 0x4 +#define NPHY_REV3_RFSEQ_CMD_RXPD_TXPD 0x5 +#define NPHY_REV3_RFSEQ_CMD_TX_GAIN 0x6 +#define NPHY_REV3_RFSEQ_CMD_RX_GAIN 0x7 +#define NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS 0x8 +#define NPHY_REV3_RFSEQ_CMD_SET_HPF_H_HPC 0x9 +#define NPHY_REV3_RFSEQ_CMD_SET_LPF_H_HPC 0xa +#define NPHY_REV3_RFSEQ_CMD_SET_HPF_M_HPC 0xb +#define NPHY_REV3_RFSEQ_CMD_SET_LPF_M_HPC 0xc +#define NPHY_REV3_RFSEQ_CMD_SET_HPF_L_HPC 0xd +#define NPHY_REV3_RFSEQ_CMD_SET_LPF_L_HPC 0xe +#define NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS 0xf +#define NPHY_REV3_RFSEQ_CMD_END 0x1f + +#define NPHY_RSSI_SEL_W1 0x0 +#define NPHY_RSSI_SEL_W2 0x1 +#define NPHY_RSSI_SEL_NB 0x2 +#define NPHY_RSSI_SEL_IQ 0x3 +#define NPHY_RSSI_SEL_TSSI_2G 0x4 +#define NPHY_RSSI_SEL_TSSI_5G 0x5 +#define NPHY_RSSI_SEL_TBD 0x6 + +#define NPHY_RAIL_I 0x0 +#define NPHY_RAIL_Q 0x1 + +#define NPHY_FORCESIG_DECODEGATEDCLKS 0x8 + +#define NPHY_REV7_RfctrlOverride_cmd_rxrf_pu 0x0 +#define NPHY_REV7_RfctrlOverride_cmd_rx_pu 0x1 +#define NPHY_REV7_RfctrlOverride_cmd_tx_pu 0x2 +#define NPHY_REV7_RfctrlOverride_cmd_rxgain 0x3 +#define NPHY_REV7_RfctrlOverride_cmd_txgain 0x4 + +#define NPHY_REV7_RXGAINCODE_RFMXGAIN_MASK 0x000ff +#define NPHY_REV7_RXGAINCODE_LPFGAIN_MASK 0x0ff00 +#define NPHY_REV7_RXGAINCODE_DVGAGAIN_MASK 0xf0000 + +#define NPHY_REV7_TXGAINCODE_TGAIN_MASK 0x7fff +#define NPHY_REV7_TXGAINCODE_LPFGAIN_MASK 0x8000 +#define NPHY_REV7_TXGAINCODE_BIQ0GAIN_SHIFT 14 + +#define NPHY_REV7_RFCTRLOVERRIDE_ID0 0x0 +#define NPHY_REV7_RFCTRLOVERRIDE_ID1 0x1 +#define NPHY_REV7_RFCTRLOVERRIDE_ID2 0x2 + +#define NPHY_IqestIqAccLo(core) ((core == 0) ? 0x12c : 0x134) + +#define NPHY_IqestIqAccHi(core) ((core == 0) ? 0x12d : 0x135) + +#define NPHY_IqestipwrAccLo(core) ((core == 0) ? 0x12e : 0x136) + +#define NPHY_IqestipwrAccHi(core) ((core == 0) ? 0x12f : 0x137) + +#define NPHY_IqestqpwrAccLo(core) ((core == 0) ? 0x130 : 0x138) + +#define NPHY_IqestqpwrAccHi(core) ((core == 0) ? 0x131 : 0x139) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c new file mode 100644 index 0000000..4dcc691 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c @@ -0,0 +1,3639 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include + +const u32 dot11lcn_gain_tbl_rev0[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000004, + 0x00000000, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000d, + 0x0000004d, + 0x0000008d, + 0x0000000d, + 0x0000004d, + 0x0000008d, + 0x000000cd, + 0x0000004f, + 0x0000008f, + 0x000000cf, + 0x000000d3, + 0x00000113, + 0x00000513, + 0x00000913, + 0x00000953, + 0x00000d53, + 0x00001153, + 0x00001193, + 0x00005193, + 0x00009193, + 0x0000d193, + 0x00011193, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000004, + 0x00000000, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000d, + 0x0000004d, + 0x0000008d, + 0x0000000d, + 0x0000004d, + 0x0000008d, + 0x000000cd, + 0x0000004f, + 0x0000008f, + 0x000000cf, + 0x000000d3, + 0x00000113, + 0x00000513, + 0x00000913, + 0x00000953, + 0x00000d53, + 0x00001153, + 0x00005153, + 0x00009153, + 0x0000d153, + 0x00011153, + 0x00015153, + 0x00019153, + 0x0001d153, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 dot11lcn_gain_tbl_rev1[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000008, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000D, + 0x00000011, + 0x00000051, + 0x00000091, + 0x00000011, + 0x00000051, + 0x00000091, + 0x000000d1, + 0x00000053, + 0x00000093, + 0x000000d3, + 0x000000d7, + 0x00000117, + 0x00000517, + 0x00000917, + 0x00000957, + 0x00000d57, + 0x00001157, + 0x00001197, + 0x00005197, + 0x00009197, + 0x0000d197, + 0x00011197, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000008, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000D, + 0x00000011, + 0x00000051, + 0x00000091, + 0x00000011, + 0x00000051, + 0x00000091, + 0x000000d1, + 0x00000053, + 0x00000093, + 0x000000d3, + 0x000000d7, + 0x00000117, + 0x00000517, + 0x00000917, + 0x00000957, + 0x00000d57, + 0x00001157, + 0x00005157, + 0x00009157, + 0x0000d157, + 0x00011157, + 0x00015157, + 0x00019157, + 0x0001d157, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u16 dot11lcn_aux_gain_idx_tbl_rev0[] = { + 0x0401, + 0x0402, + 0x0403, + 0x0404, + 0x0405, + 0x0406, + 0x0407, + 0x0408, + 0x0409, + 0x040a, + 0x058b, + 0x058c, + 0x058d, + 0x058e, + 0x058f, + 0x0090, + 0x0091, + 0x0092, + 0x0193, + 0x0194, + 0x0195, + 0x0196, + 0x0197, + 0x0198, + 0x0199, + 0x019a, + 0x019b, + 0x019c, + 0x019d, + 0x019e, + 0x019f, + 0x01a0, + 0x01a1, + 0x01a2, + 0x01a3, + 0x01a4, + 0x01a5, + 0x0000, +}; + +const u32 dot11lcn_gain_idx_tbl_rev0[] = { + 0x00000000, + 0x00000000, + 0x10000000, + 0x00000000, + 0x20000000, + 0x00000000, + 0x30000000, + 0x00000000, + 0x40000000, + 0x00000000, + 0x50000000, + 0x00000000, + 0x60000000, + 0x00000000, + 0x70000000, + 0x00000000, + 0x80000000, + 0x00000000, + 0x90000000, + 0x00000008, + 0xa0000000, + 0x00000008, + 0xb0000000, + 0x00000008, + 0xc0000000, + 0x00000008, + 0xd0000000, + 0x00000008, + 0xe0000000, + 0x00000008, + 0xf0000000, + 0x00000008, + 0x00000000, + 0x00000009, + 0x10000000, + 0x00000009, + 0x20000000, + 0x00000019, + 0x30000000, + 0x00000019, + 0x40000000, + 0x00000019, + 0x50000000, + 0x00000019, + 0x60000000, + 0x00000019, + 0x70000000, + 0x00000019, + 0x80000000, + 0x00000019, + 0x90000000, + 0x00000019, + 0xa0000000, + 0x00000019, + 0xb0000000, + 0x00000019, + 0xc0000000, + 0x00000019, + 0xd0000000, + 0x00000019, + 0xe0000000, + 0x00000019, + 0xf0000000, + 0x00000019, + 0x00000000, + 0x0000001a, + 0x10000000, + 0x0000001a, + 0x20000000, + 0x0000001a, + 0x30000000, + 0x0000001a, + 0x40000000, + 0x0000001a, + 0x50000000, + 0x00000002, + 0x60000000, + 0x00000002, + 0x70000000, + 0x00000002, + 0x80000000, + 0x00000002, + 0x90000000, + 0x00000002, + 0xa0000000, + 0x00000002, + 0xb0000000, + 0x00000002, + 0xc0000000, + 0x0000000a, + 0xd0000000, + 0x0000000a, + 0xe0000000, + 0x0000000a, + 0xf0000000, + 0x0000000a, + 0x00000000, + 0x0000000b, + 0x10000000, + 0x0000000b, + 0x20000000, + 0x0000000b, + 0x30000000, + 0x0000000b, + 0x40000000, + 0x0000000b, + 0x50000000, + 0x0000001b, + 0x60000000, + 0x0000001b, + 0x70000000, + 0x0000001b, + 0x80000000, + 0x0000001b, + 0x90000000, + 0x0000001b, + 0xa0000000, + 0x0000001b, + 0xb0000000, + 0x0000001b, + 0xc0000000, + 0x0000001b, + 0xd0000000, + 0x0000001b, + 0xe0000000, + 0x0000001b, + 0xf0000000, + 0x0000001b, + 0x00000000, + 0x0000001c, + 0x10000000, + 0x0000001c, + 0x20000000, + 0x0000001c, + 0x30000000, + 0x0000001c, + 0x40000000, + 0x0000001c, + 0x50000000, + 0x0000001c, + 0x60000000, + 0x0000001c, + 0x70000000, + 0x0000001c, + 0x80000000, + 0x0000001c, + 0x90000000, + 0x0000001c, +}; + +const u16 dot11lcn_aux_gain_idx_tbl_2G[] = { + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0001, + 0x0080, + 0x0081, + 0x0100, + 0x0101, + 0x0180, + 0x0181, + 0x0182, + 0x0183, + 0x0184, + 0x0185, + 0x0186, + 0x0187, + 0x0188, + 0x0285, + 0x0289, + 0x028a, + 0x028b, + 0x028c, + 0x028d, + 0x028e, + 0x028f, + 0x0290, + 0x0291, + 0x0292, + 0x0293, + 0x0294, + 0x0295, + 0x0296, + 0x0297, + 0x0298, + 0x0299, + 0x029a, + 0x0000 +}; + +const u8 dot11lcn_gain_val_tbl_2G[] = { + 0xfc, + 0x02, + 0x08, + 0x0e, + 0x13, + 0x1b, + 0xfc, + 0x02, + 0x08, + 0x0e, + 0x13, + 0x1b, + 0xfc, + 0x00, + 0x0c, + 0x03, + 0xeb, + 0xfe, + 0x07, + 0x0b, + 0x0f, + 0xfb, + 0xfe, + 0x01, + 0x05, + 0x08, + 0x0b, + 0x0e, + 0x11, + 0x14, + 0x17, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x15, + 0x18, + 0x1b, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 +}; + +const u32 dot11lcn_gain_idx_tbl_2G[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x10000000, + 0x00000000, + 0x00000000, + 0x00000008, + 0x10000000, + 0x00000008, + 0x00000000, + 0x00000010, + 0x10000000, + 0x00000010, + 0x00000000, + 0x00000018, + 0x10000000, + 0x00000018, + 0x20000000, + 0x00000018, + 0x30000000, + 0x00000018, + 0x40000000, + 0x00000018, + 0x50000000, + 0x00000018, + 0x60000000, + 0x00000018, + 0x70000000, + 0x00000018, + 0x80000000, + 0x00000018, + 0x50000000, + 0x00000028, + 0x90000000, + 0x00000028, + 0xa0000000, + 0x00000028, + 0xb0000000, + 0x00000028, + 0xc0000000, + 0x00000028, + 0xd0000000, + 0x00000028, + 0xe0000000, + 0x00000028, + 0xf0000000, + 0x00000028, + 0x00000000, + 0x00000029, + 0x10000000, + 0x00000029, + 0x20000000, + 0x00000029, + 0x30000000, + 0x00000029, + 0x40000000, + 0x00000029, + 0x50000000, + 0x00000029, + 0x60000000, + 0x00000029, + 0x70000000, + 0x00000029, + 0x80000000, + 0x00000029, + 0x90000000, + 0x00000029, + 0xa0000000, + 0x00000029, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x10000000, + 0x00000000, + 0x00000000, + 0x00000008, + 0x10000000, + 0x00000008, + 0x00000000, + 0x00000010, + 0x10000000, + 0x00000010, + 0x00000000, + 0x00000018, + 0x10000000, + 0x00000018, + 0x20000000, + 0x00000018, + 0x30000000, + 0x00000018, + 0x40000000, + 0x00000018, + 0x50000000, + 0x00000018, + 0x60000000, + 0x00000018, + 0x70000000, + 0x00000018, + 0x80000000, + 0x00000018, + 0x50000000, + 0x00000028, + 0x90000000, + 0x00000028, + 0xa0000000, + 0x00000028, + 0xb0000000, + 0x00000028, + 0xc0000000, + 0x00000028, + 0xd0000000, + 0x00000028, + 0xe0000000, + 0x00000028, + 0xf0000000, + 0x00000028, + 0x00000000, + 0x00000029, + 0x10000000, + 0x00000029, + 0x20000000, + 0x00000029, + 0x30000000, + 0x00000029, + 0x40000000, + 0x00000029, + 0x50000000, + 0x00000029, + 0x60000000, + 0x00000029, + 0x70000000, + 0x00000029, + 0x80000000, + 0x00000029, + 0x90000000, + 0x00000029, + 0xa0000000, + 0x00000029, + 0xb0000000, + 0x00000029, + 0xc0000000, + 0x00000029, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const u32 dot11lcn_gain_tbl_2G[] = { + 0x00000000, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000d, + 0x0000004d, + 0x0000008d, + 0x00000049, + 0x00000089, + 0x000000c9, + 0x0000004b, + 0x0000008b, + 0x000000cb, + 0x000000cf, + 0x0000010f, + 0x0000050f, + 0x0000090f, + 0x0000094f, + 0x00000d4f, + 0x0000114f, + 0x0000118f, + 0x0000518f, + 0x0000918f, + 0x0000d18f, + 0x0001118f, + 0x0001518f, + 0x0001918f, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const u32 dot11lcn_gain_tbl_extlna_2G[] = { + 0x00000000, + 0x00000004, + 0x00000008, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000d, + 0x00000003, + 0x00000007, + 0x0000000b, + 0x0000000f, + 0x0000004f, + 0x0000008f, + 0x000000cf, + 0x0000010f, + 0x0000014f, + 0x0000018f, + 0x0000058f, + 0x0000098f, + 0x00000d8f, + 0x00008000, + 0x00008004, + 0x00008008, + 0x00008001, + 0x00008005, + 0x00008009, + 0x0000800d, + 0x00008003, + 0x00008007, + 0x0000800b, + 0x0000800f, + 0x0000804f, + 0x0000808f, + 0x000080cf, + 0x0000810f, + 0x0000814f, + 0x0000818f, + 0x0000858f, + 0x0000898f, + 0x00008d8f, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const u16 dot11lcn_aux_gain_idx_tbl_extlna_2G[] = { + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0400, + 0x0401, + 0x0402, + 0x0403, + 0x0404, + 0x0483, + 0x0484, + 0x0485, + 0x0486, + 0x0583, + 0x0584, + 0x0585, + 0x0587, + 0x0588, + 0x0589, + 0x058a, + 0x0687, + 0x0688, + 0x0689, + 0x068a, + 0x068b, + 0x068c, + 0x068d, + 0x068e, + 0x068f, + 0x0690, + 0x0691, + 0x0692, + 0x0693, + 0x0000 +}; + +const u8 dot11lcn_gain_val_tbl_extlna_2G[] = { + 0xfc, + 0x02, + 0x08, + 0x0e, + 0x13, + 0x1b, + 0xfc, + 0x02, + 0x08, + 0x0e, + 0x13, + 0x1b, + 0xfc, + 0x00, + 0x0f, + 0x03, + 0xeb, + 0xfe, + 0x07, + 0x0b, + 0x0f, + 0xfb, + 0xfe, + 0x01, + 0x05, + 0x08, + 0x0b, + 0x0e, + 0x11, + 0x14, + 0x17, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x15, + 0x18, + 0x1b, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 +}; + +const u32 dot11lcn_gain_idx_tbl_extlna_2G[] = { + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x00000000, + 0x00000040, + 0x10000000, + 0x00000040, + 0x20000000, + 0x00000040, + 0x30000000, + 0x00000040, + 0x40000000, + 0x00000040, + 0x30000000, + 0x00000048, + 0x40000000, + 0x00000048, + 0x50000000, + 0x00000048, + 0x60000000, + 0x00000048, + 0x30000000, + 0x00000058, + 0x40000000, + 0x00000058, + 0x50000000, + 0x00000058, + 0x70000000, + 0x00000058, + 0x80000000, + 0x00000058, + 0x90000000, + 0x00000058, + 0xa0000000, + 0x00000058, + 0x70000000, + 0x00000068, + 0x80000000, + 0x00000068, + 0x90000000, + 0x00000068, + 0xa0000000, + 0x00000068, + 0xb0000000, + 0x00000068, + 0xc0000000, + 0x00000068, + 0xd0000000, + 0x00000068, + 0xe0000000, + 0x00000068, + 0xf0000000, + 0x00000068, + 0x00000000, + 0x00000069, + 0x10000000, + 0x00000069, + 0x20000000, + 0x00000069, + 0x30000000, + 0x00000069, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x40000000, + 0x00000041, + 0x50000000, + 0x00000041, + 0x60000000, + 0x00000041, + 0x70000000, + 0x00000041, + 0x80000000, + 0x00000041, + 0x70000000, + 0x00000049, + 0x80000000, + 0x00000049, + 0x90000000, + 0x00000049, + 0xa0000000, + 0x00000049, + 0x70000000, + 0x00000059, + 0x80000000, + 0x00000059, + 0x90000000, + 0x00000059, + 0xb0000000, + 0x00000059, + 0xc0000000, + 0x00000059, + 0xd0000000, + 0x00000059, + 0xe0000000, + 0x00000059, + 0xb0000000, + 0x00000069, + 0xc0000000, + 0x00000069, + 0xd0000000, + 0x00000069, + 0xe0000000, + 0x00000069, + 0xf0000000, + 0x00000069, + 0x00000000, + 0x0000006a, + 0x10000000, + 0x0000006a, + 0x20000000, + 0x0000006a, + 0x30000000, + 0x0000006a, + 0x40000000, + 0x0000006a, + 0x50000000, + 0x0000006a, + 0x60000000, + 0x0000006a, + 0x70000000, + 0x0000006a, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const u32 dot11lcn_aux_gain_idx_tbl_5G[] = { + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0001, + 0x0002, + 0x0003, + 0x0004, + 0x0083, + 0x0084, + 0x0085, + 0x0086, + 0x0087, + 0x0186, + 0x0187, + 0x0188, + 0x0189, + 0x018a, + 0x018b, + 0x018c, + 0x018d, + 0x018e, + 0x018f, + 0x0190, + 0x0191, + 0x0192, + 0x0193, + 0x0194, + 0x0195, + 0x0196, + 0x0197, + 0x0198, + 0x0199, + 0x019a, + 0x019b, + 0x019c, + 0x019d, + 0x0000 +}; + +const u32 dot11lcn_gain_val_tbl_5G[] = { + 0xf7, + 0xfd, + 0x00, + 0x04, + 0x04, + 0x04, + 0xf7, + 0xfd, + 0x00, + 0x04, + 0x04, + 0x04, + 0xf6, + 0x00, + 0x0c, + 0x03, + 0xeb, + 0xfe, + 0x06, + 0x0a, + 0x10, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x15, + 0x18, + 0x1b, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x15, + 0x18, + 0x1b, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 +}; + +const u32 dot11lcn_gain_idx_tbl_5G[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x10000000, + 0x00000000, + 0x20000000, + 0x00000000, + 0x30000000, + 0x00000000, + 0x40000000, + 0x00000000, + 0x30000000, + 0x00000008, + 0x40000000, + 0x00000008, + 0x50000000, + 0x00000008, + 0x60000000, + 0x00000008, + 0x70000000, + 0x00000008, + 0x60000000, + 0x00000018, + 0x70000000, + 0x00000018, + 0x80000000, + 0x00000018, + 0x90000000, + 0x00000018, + 0xa0000000, + 0x00000018, + 0xb0000000, + 0x00000018, + 0xc0000000, + 0x00000018, + 0xd0000000, + 0x00000018, + 0xe0000000, + 0x00000018, + 0xf0000000, + 0x00000018, + 0x00000000, + 0x00000019, + 0x10000000, + 0x00000019, + 0x20000000, + 0x00000019, + 0x30000000, + 0x00000019, + 0x40000000, + 0x00000019, + 0x50000000, + 0x00000019, + 0x60000000, + 0x00000019, + 0x70000000, + 0x00000019, + 0x80000000, + 0x00000019, + 0x90000000, + 0x00000019, + 0xa0000000, + 0x00000019, + 0xb0000000, + 0x00000019, + 0xc0000000, + 0x00000019, + 0xd0000000, + 0x00000019, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const u32 dot11lcn_gain_tbl_5G[] = { + 0x00000000, + 0x00000040, + 0x00000080, + 0x00000001, + 0x00000005, + 0x00000009, + 0x0000000d, + 0x00000011, + 0x00000015, + 0x00000055, + 0x00000095, + 0x00000017, + 0x0000001b, + 0x0000005b, + 0x0000009b, + 0x000000db, + 0x0000011b, + 0x0000015b, + 0x0000019b, + 0x0000059b, + 0x0000099b, + 0x00000d9b, + 0x0000119b, + 0x0000519b, + 0x0000919b, + 0x0000d19b, + 0x0001119b, + 0x0001519b, + 0x0001919b, + 0x0001d19b, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[] = { + {&dot11lcn_gain_tbl_rev0, + sizeof(dot11lcn_gain_tbl_rev0) / sizeof(dot11lcn_gain_tbl_rev0[0]), 18, + 0, 32} + , + {&dot11lcn_aux_gain_idx_tbl_rev0, + sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / + sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_rev0, + sizeof(dot11lcn_gain_idx_tbl_rev0) / + sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} + , +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[] = { + {&dot11lcn_gain_tbl_rev1, + sizeof(dot11lcn_gain_tbl_rev1) / sizeof(dot11lcn_gain_tbl_rev1[0]), 18, + 0, 32} + , + {&dot11lcn_aux_gain_idx_tbl_rev0, + sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / + sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_rev0, + sizeof(dot11lcn_gain_idx_tbl_rev0) / + sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} + , +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[] = { + {&dot11lcn_gain_tbl_2G, + sizeof(dot11lcn_gain_tbl_2G) / sizeof(dot11lcn_gain_tbl_2G[0]), 18, 0, + 32} + , + {&dot11lcn_aux_gain_idx_tbl_2G, + sizeof(dot11lcn_aux_gain_idx_tbl_2G) / + sizeof(dot11lcn_aux_gain_idx_tbl_2G[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_2G, + sizeof(dot11lcn_gain_idx_tbl_2G) / sizeof(dot11lcn_gain_idx_tbl_2G[0]), + 13, 0, 32} + , + {&dot11lcn_gain_val_tbl_2G, + sizeof(dot11lcn_gain_val_tbl_2G) / sizeof(dot11lcn_gain_val_tbl_2G[0]), + 17, 0, 8} +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[] = { + {&dot11lcn_gain_tbl_5G, + sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, + 32} + , + {&dot11lcn_aux_gain_idx_tbl_5G, + sizeof(dot11lcn_aux_gain_idx_tbl_5G) / + sizeof(dot11lcn_aux_gain_idx_tbl_5G[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_5G, + sizeof(dot11lcn_gain_idx_tbl_5G) / sizeof(dot11lcn_gain_idx_tbl_5G[0]), + 13, 0, 32} + , + {&dot11lcn_gain_val_tbl_5G, + sizeof(dot11lcn_gain_val_tbl_5G) / sizeof(dot11lcn_gain_val_tbl_5G[0]), + 17, 0, 8} +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[] = { + {&dot11lcn_gain_tbl_extlna_2G, + sizeof(dot11lcn_gain_tbl_extlna_2G) / + sizeof(dot11lcn_gain_tbl_extlna_2G[0]), 18, 0, 32} + , + {&dot11lcn_aux_gain_idx_tbl_extlna_2G, + sizeof(dot11lcn_aux_gain_idx_tbl_extlna_2G) / + sizeof(dot11lcn_aux_gain_idx_tbl_extlna_2G[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_extlna_2G, + sizeof(dot11lcn_gain_idx_tbl_extlna_2G) / + sizeof(dot11lcn_gain_idx_tbl_extlna_2G[0]), 13, 0, 32} + , + {&dot11lcn_gain_val_tbl_extlna_2G, + sizeof(dot11lcn_gain_val_tbl_extlna_2G) / + sizeof(dot11lcn_gain_val_tbl_extlna_2G[0]), 17, 0, 8} +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[] = { + {&dot11lcn_gain_tbl_5G, + sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, + 32} + , + {&dot11lcn_aux_gain_idx_tbl_5G, + sizeof(dot11lcn_aux_gain_idx_tbl_5G) / + sizeof(dot11lcn_aux_gain_idx_tbl_5G[0]), 14, 0, 16} + , + {&dot11lcn_gain_idx_tbl_5G, + sizeof(dot11lcn_gain_idx_tbl_5G) / sizeof(dot11lcn_gain_idx_tbl_5G[0]), + 13, 0, 32} + , + {&dot11lcn_gain_val_tbl_5G, + sizeof(dot11lcn_gain_val_tbl_5G) / sizeof(dot11lcn_gain_val_tbl_5G[0]), + 17, 0, 8} +}; + +const u32 dot11lcnphytbl_rx_gain_info_sz_rev0 = + sizeof(dot11lcnphytbl_rx_gain_info_rev0) / + sizeof(dot11lcnphytbl_rx_gain_info_rev0[0]); + +const u32 dot11lcnphytbl_rx_gain_info_sz_rev1 = + sizeof(dot11lcnphytbl_rx_gain_info_rev1) / + sizeof(dot11lcnphytbl_rx_gain_info_rev1[0]); + +const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz = + sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2) / + sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2[0]); + +const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz = + sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2) / + sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2[0]); + +const u16 dot11lcn_min_sig_sq_tbl_rev0[] = { + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, + 0x014d, +}; + +const u16 dot11lcn_noise_scale_tbl_rev0[] = { + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, +}; + +const u32 dot11lcn_fltr_ctrl_tbl_rev0[] = { + 0x000141f8, + 0x000021f8, + 0x000021fb, + 0x000041fb, + 0x0001fe4b, + 0x0000217b, + 0x00002133, + 0x000040eb, + 0x0001fea3, + 0x0000024b, +}; + +const u32 dot11lcn_ps_ctrl_tbl_rev0[] = { + 0x00100001, + 0x00200010, + 0x00300001, + 0x00400010, + 0x00500022, + 0x00600122, + 0x00700222, + 0x00800322, + 0x00900422, + 0x00a00522, + 0x00b00622, + 0x00c00722, + 0x00d00822, + 0x00f00922, + 0x00100a22, + 0x00200b22, + 0x00300c22, + 0x00400d22, + 0x00500e22, + 0x00600f22, +}; + +const u16 dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[] = { + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x0007, + 0x0005, + 0x0006, + 0x0004, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + 0x000b, + 0x000b, + 0x000a, + 0x000a, + +}; + +const u16 dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[] = { + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0005, + 0x0002, + 0x0000, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, + 0x0007, + 0x0007, + 0x0002, + 0x0002, +}; + +const u16 dot11lcn_sw_ctrl_tbl_4313_epa_rev0[] = { + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, + 0x0002, + 0x0008, + 0x0004, + 0x0001, +}; + +const u16 dot11lcn_sw_ctrl_tbl_4313_rev0[] = { + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, + 0x000a, + 0x0009, + 0x0006, + 0x0005, +}; + +const u16 dot11lcn_sw_ctrl_tbl_rev0[] = { + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, + 0x0004, + 0x0004, + 0x0002, + 0x0002, +}; + +const u8 dot11lcn_nf_table_rev0[] = { + 0x5f, + 0x36, + 0x29, + 0x1f, + 0x5f, + 0x36, + 0x29, + 0x1f, + 0x5f, + 0x36, + 0x29, + 0x1f, + 0x5f, + 0x36, + 0x29, + 0x1f, +}; + +const u8 dot11lcn_gain_val_tbl_rev0[] = { + 0x09, + 0x0f, + 0x14, + 0x18, + 0xfe, + 0x07, + 0x0b, + 0x0f, + 0xfb, + 0xfe, + 0x01, + 0x05, + 0x08, + 0x0b, + 0x0e, + 0x11, + 0x14, + 0x17, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0x06, + 0x09, + 0x0c, + 0x0f, + 0x12, + 0x15, + 0x18, + 0x1b, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x03, + 0xeb, + 0x00, + 0x00, +}; + +const u8 dot11lcn_spur_tbl_rev0[] = { + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x02, + 0x03, + 0x01, + 0x03, + 0x02, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x02, + 0x03, + 0x01, + 0x03, + 0x02, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, + 0x01, +}; + +const u16 dot11lcn_unsup_mcs_tbl_rev0[] = { + 0x001a, + 0x0034, + 0x004e, + 0x0068, + 0x009c, + 0x00d0, + 0x00ea, + 0x0104, + 0x0034, + 0x0068, + 0x009c, + 0x00d0, + 0x0138, + 0x01a0, + 0x01d4, + 0x0208, + 0x004e, + 0x009c, + 0x00ea, + 0x0138, + 0x01d4, + 0x0270, + 0x02be, + 0x030c, + 0x0068, + 0x00d0, + 0x0138, + 0x01a0, + 0x0270, + 0x0340, + 0x03a8, + 0x0410, + 0x0018, + 0x009c, + 0x00d0, + 0x0104, + 0x00ea, + 0x0138, + 0x0186, + 0x00d0, + 0x0104, + 0x0104, + 0x0138, + 0x016c, + 0x016c, + 0x01a0, + 0x0138, + 0x0186, + 0x0186, + 0x01d4, + 0x0222, + 0x0222, + 0x0270, + 0x0104, + 0x0138, + 0x016c, + 0x0138, + 0x016c, + 0x01a0, + 0x01d4, + 0x01a0, + 0x01d4, + 0x0208, + 0x0208, + 0x023c, + 0x0186, + 0x01d4, + 0x0222, + 0x01d4, + 0x0222, + 0x0270, + 0x02be, + 0x0270, + 0x02be, + 0x030c, + 0x030c, + 0x035a, + 0x0036, + 0x006c, + 0x00a2, + 0x00d8, + 0x0144, + 0x01b0, + 0x01e6, + 0x021c, + 0x006c, + 0x00d8, + 0x0144, + 0x01b0, + 0x0288, + 0x0360, + 0x03cc, + 0x0438, + 0x00a2, + 0x0144, + 0x01e6, + 0x0288, + 0x03cc, + 0x0510, + 0x05b2, + 0x0654, + 0x00d8, + 0x01b0, + 0x0288, + 0x0360, + 0x0510, + 0x06c0, + 0x0798, + 0x0870, + 0x0018, + 0x0144, + 0x01b0, + 0x021c, + 0x01e6, + 0x0288, + 0x032a, + 0x01b0, + 0x021c, + 0x021c, + 0x0288, + 0x02f4, + 0x02f4, + 0x0360, + 0x0288, + 0x032a, + 0x032a, + 0x03cc, + 0x046e, + 0x046e, + 0x0510, + 0x021c, + 0x0288, + 0x02f4, + 0x0288, + 0x02f4, + 0x0360, + 0x03cc, + 0x0360, + 0x03cc, + 0x0438, + 0x0438, + 0x04a4, + 0x032a, + 0x03cc, + 0x046e, + 0x03cc, + 0x046e, + 0x0510, + 0x05b2, + 0x0510, + 0x05b2, + 0x0654, + 0x0654, + 0x06f6, +}; + +const u16 dot11lcn_iq_local_tbl_rev0[] = { + 0x0200, + 0x0300, + 0x0400, + 0x0600, + 0x0800, + 0x0b00, + 0x1000, + 0x1001, + 0x1002, + 0x1003, + 0x1004, + 0x1005, + 0x1006, + 0x1007, + 0x1707, + 0x2007, + 0x2d07, + 0x4007, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0200, + 0x0300, + 0x0400, + 0x0600, + 0x0800, + 0x0b00, + 0x1000, + 0x1001, + 0x1002, + 0x1003, + 0x1004, + 0x1005, + 0x1006, + 0x1007, + 0x1707, + 0x2007, + 0x2d07, + 0x4007, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x4000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, +}; + +const u32 dot11lcn_papd_compdelta_tbl_rev0[] = { + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, + 0x00080000, +}; + +const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[] = { + {&dot11lcn_min_sig_sq_tbl_rev0, + sizeof(dot11lcn_min_sig_sq_tbl_rev0) / + sizeof(dot11lcn_min_sig_sq_tbl_rev0[0]), 2, 0, 16} + , + {&dot11lcn_noise_scale_tbl_rev0, + sizeof(dot11lcn_noise_scale_tbl_rev0) / + sizeof(dot11lcn_noise_scale_tbl_rev0[0]), 1, 0, 16} + , + {&dot11lcn_fltr_ctrl_tbl_rev0, + sizeof(dot11lcn_fltr_ctrl_tbl_rev0) / + sizeof(dot11lcn_fltr_ctrl_tbl_rev0[0]), 11, 0, 32} + , + {&dot11lcn_ps_ctrl_tbl_rev0, + sizeof(dot11lcn_ps_ctrl_tbl_rev0) / + sizeof(dot11lcn_ps_ctrl_tbl_rev0[0]), 12, 0, 32} + , + {&dot11lcn_gain_idx_tbl_rev0, + sizeof(dot11lcn_gain_idx_tbl_rev0) / + sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} + , + {&dot11lcn_aux_gain_idx_tbl_rev0, + sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / + sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} + , + {&dot11lcn_sw_ctrl_tbl_rev0, + sizeof(dot11lcn_sw_ctrl_tbl_rev0) / + sizeof(dot11lcn_sw_ctrl_tbl_rev0[0]), 15, 0, 16} + , + {&dot11lcn_nf_table_rev0, + sizeof(dot11lcn_nf_table_rev0) / sizeof(dot11lcn_nf_table_rev0[0]), 16, + 0, 8} + , + {&dot11lcn_gain_val_tbl_rev0, + sizeof(dot11lcn_gain_val_tbl_rev0) / + sizeof(dot11lcn_gain_val_tbl_rev0[0]), 17, 0, 8} + , + {&dot11lcn_gain_tbl_rev0, + sizeof(dot11lcn_gain_tbl_rev0) / sizeof(dot11lcn_gain_tbl_rev0[0]), 18, + 0, 32} + , + {&dot11lcn_spur_tbl_rev0, + sizeof(dot11lcn_spur_tbl_rev0) / sizeof(dot11lcn_spur_tbl_rev0[0]), 20, + 0, 8} + , + {&dot11lcn_unsup_mcs_tbl_rev0, + sizeof(dot11lcn_unsup_mcs_tbl_rev0) / + sizeof(dot11lcn_unsup_mcs_tbl_rev0[0]), 23, 0, 16} + , + {&dot11lcn_iq_local_tbl_rev0, + sizeof(dot11lcn_iq_local_tbl_rev0) / + sizeof(dot11lcn_iq_local_tbl_rev0[0]), 0, 0, 16} + , + {&dot11lcn_papd_compdelta_tbl_rev0, + sizeof(dot11lcn_papd_compdelta_tbl_rev0) / + sizeof(dot11lcn_papd_compdelta_tbl_rev0[0]), 24, 0, 32} + , +}; + +const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313 = { + &dot11lcn_sw_ctrl_tbl_4313_rev0, + sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0) / + sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0[0]), 15, 0, 16 +}; + +const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa = { + &dot11lcn_sw_ctrl_tbl_4313_epa_rev0, + sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0) / + sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0[0]), 15, 0, 16 +}; + +const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa = { + &dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo, + sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo) / + sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[0]), 15, 0, 16 +}; + +const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250 = { + &dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0, + sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0) / + sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[0]), 15, 0, 16 +}; + +const u32 dot11lcnphytbl_info_sz_rev0 = + sizeof(dot11lcnphytbl_info_rev0) / sizeof(dot11lcnphytbl_info_rev0[0]); + +const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = { + {3, 0, 31, 0, 72,} + , + {3, 0, 31, 0, 70,} + , + {3, 0, 31, 0, 68,} + , + {3, 0, 30, 0, 67,} + , + {3, 0, 29, 0, 68,} + , + {3, 0, 28, 0, 68,} + , + {3, 0, 27, 0, 69,} + , + {3, 0, 26, 0, 70,} + , + {3, 0, 25, 0, 70,} + , + {3, 0, 24, 0, 71,} + , + {3, 0, 23, 0, 72,} + , + {3, 0, 23, 0, 70,} + , + {3, 0, 22, 0, 71,} + , + {3, 0, 21, 0, 72,} + , + {3, 0, 21, 0, 70,} + , + {3, 0, 21, 0, 68,} + , + {3, 0, 21, 0, 66,} + , + {3, 0, 21, 0, 64,} + , + {3, 0, 21, 0, 63,} + , + {3, 0, 20, 0, 64,} + , + {3, 0, 19, 0, 65,} + , + {3, 0, 19, 0, 64,} + , + {3, 0, 18, 0, 65,} + , + {3, 0, 18, 0, 64,} + , + {3, 0, 17, 0, 65,} + , + {3, 0, 17, 0, 64,} + , + {3, 0, 16, 0, 65,} + , + {3, 0, 16, 0, 64,} + , + {3, 0, 16, 0, 62,} + , + {3, 0, 16, 0, 60,} + , + {3, 0, 16, 0, 58,} + , + {3, 0, 15, 0, 61,} + , + {3, 0, 15, 0, 59,} + , + {3, 0, 14, 0, 61,} + , + {3, 0, 14, 0, 60,} + , + {3, 0, 14, 0, 58,} + , + {3, 0, 13, 0, 60,} + , + {3, 0, 13, 0, 59,} + , + {3, 0, 12, 0, 62,} + , + {3, 0, 12, 0, 60,} + , + {3, 0, 12, 0, 58,} + , + {3, 0, 11, 0, 62,} + , + {3, 0, 11, 0, 60,} + , + {3, 0, 11, 0, 59,} + , + {3, 0, 11, 0, 57,} + , + {3, 0, 10, 0, 61,} + , + {3, 0, 10, 0, 59,} + , + {3, 0, 10, 0, 57,} + , + {3, 0, 9, 0, 62,} + , + {3, 0, 9, 0, 60,} + , + {3, 0, 9, 0, 58,} + , + {3, 0, 9, 0, 57,} + , + {3, 0, 8, 0, 62,} + , + {3, 0, 8, 0, 60,} + , + {3, 0, 8, 0, 58,} + , + {3, 0, 8, 0, 57,} + , + {3, 0, 8, 0, 55,} + , + {3, 0, 7, 0, 61,} + , + {3, 0, 7, 0, 60,} + , + {3, 0, 7, 0, 58,} + , + {3, 0, 7, 0, 56,} + , + {3, 0, 7, 0, 55,} + , + {3, 0, 6, 0, 62,} + , + {3, 0, 6, 0, 60,} + , + {3, 0, 6, 0, 58,} + , + {3, 0, 6, 0, 57,} + , + {3, 0, 6, 0, 55,} + , + {3, 0, 6, 0, 54,} + , + {3, 0, 6, 0, 52,} + , + {3, 0, 5, 0, 61,} + , + {3, 0, 5, 0, 59,} + , + {3, 0, 5, 0, 57,} + , + {3, 0, 5, 0, 56,} + , + {3, 0, 5, 0, 54,} + , + {3, 0, 5, 0, 53,} + , + {3, 0, 5, 0, 51,} + , + {3, 0, 4, 0, 62,} + , + {3, 0, 4, 0, 60,} + , + {3, 0, 4, 0, 58,} + , + {3, 0, 4, 0, 57,} + , + {3, 0, 4, 0, 55,} + , + {3, 0, 4, 0, 54,} + , + {3, 0, 4, 0, 52,} + , + {3, 0, 4, 0, 51,} + , + {3, 0, 4, 0, 49,} + , + {3, 0, 4, 0, 48,} + , + {3, 0, 4, 0, 46,} + , + {3, 0, 3, 0, 60,} + , + {3, 0, 3, 0, 58,} + , + {3, 0, 3, 0, 57,} + , + {3, 0, 3, 0, 55,} + , + {3, 0, 3, 0, 54,} + , + {3, 0, 3, 0, 52,} + , + {3, 0, 3, 0, 51,} + , + {3, 0, 3, 0, 49,} + , + {3, 0, 3, 0, 48,} + , + {3, 0, 3, 0, 46,} + , + {3, 0, 3, 0, 45,} + , + {3, 0, 3, 0, 44,} + , + {3, 0, 3, 0, 43,} + , + {3, 0, 3, 0, 41,} + , + {3, 0, 2, 0, 61,} + , + {3, 0, 2, 0, 59,} + , + {3, 0, 2, 0, 57,} + , + {3, 0, 2, 0, 56,} + , + {3, 0, 2, 0, 54,} + , + {3, 0, 2, 0, 53,} + , + {3, 0, 2, 0, 51,} + , + {3, 0, 2, 0, 50,} + , + {3, 0, 2, 0, 48,} + , + {3, 0, 2, 0, 47,} + , + {3, 0, 2, 0, 46,} + , + {3, 0, 2, 0, 44,} + , + {3, 0, 2, 0, 43,} + , + {3, 0, 2, 0, 42,} + , + {3, 0, 2, 0, 41,} + , + {3, 0, 2, 0, 39,} + , + {3, 0, 2, 0, 38,} + , + {3, 0, 2, 0, 37,} + , + {3, 0, 2, 0, 36,} + , + {3, 0, 2, 0, 35,} + , + {3, 0, 2, 0, 34,} + , + {3, 0, 2, 0, 33,} + , + {3, 0, 2, 0, 32,} + , + {3, 0, 1, 0, 63,} + , + {3, 0, 1, 0, 61,} + , + {3, 0, 1, 0, 59,} + , + {3, 0, 1, 0, 57,} + , +}; + +const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = { + {7, 0, 31, 0, 72,} + , + {7, 0, 31, 0, 70,} + , + {7, 0, 31, 0, 68,} + , + {7, 0, 30, 0, 67,} + , + {7, 0, 29, 0, 68,} + , + {7, 0, 28, 0, 68,} + , + {7, 0, 27, 0, 69,} + , + {7, 0, 26, 0, 70,} + , + {7, 0, 25, 0, 70,} + , + {7, 0, 24, 0, 71,} + , + {7, 0, 23, 0, 72,} + , + {7, 0, 23, 0, 70,} + , + {7, 0, 22, 0, 71,} + , + {7, 0, 21, 0, 72,} + , + {7, 0, 21, 0, 70,} + , + {7, 0, 21, 0, 68,} + , + {7, 0, 21, 0, 66,} + , + {7, 0, 21, 0, 64,} + , + {7, 0, 21, 0, 63,} + , + {7, 0, 20, 0, 64,} + , + {7, 0, 19, 0, 65,} + , + {7, 0, 19, 0, 64,} + , + {7, 0, 18, 0, 65,} + , + {7, 0, 18, 0, 64,} + , + {7, 0, 17, 0, 65,} + , + {7, 0, 17, 0, 64,} + , + {7, 0, 16, 0, 65,} + , + {7, 0, 16, 0, 64,} + , + {7, 0, 16, 0, 62,} + , + {7, 0, 16, 0, 60,} + , + {7, 0, 16, 0, 58,} + , + {7, 0, 15, 0, 61,} + , + {7, 0, 15, 0, 59,} + , + {7, 0, 14, 0, 61,} + , + {7, 0, 14, 0, 60,} + , + {7, 0, 14, 0, 58,} + , + {7, 0, 13, 0, 60,} + , + {7, 0, 13, 0, 59,} + , + {7, 0, 12, 0, 62,} + , + {7, 0, 12, 0, 60,} + , + {7, 0, 12, 0, 58,} + , + {7, 0, 11, 0, 62,} + , + {7, 0, 11, 0, 60,} + , + {7, 0, 11, 0, 59,} + , + {7, 0, 11, 0, 57,} + , + {7, 0, 10, 0, 61,} + , + {7, 0, 10, 0, 59,} + , + {7, 0, 10, 0, 57,} + , + {7, 0, 9, 0, 62,} + , + {7, 0, 9, 0, 60,} + , + {7, 0, 9, 0, 58,} + , + {7, 0, 9, 0, 57,} + , + {7, 0, 8, 0, 62,} + , + {7, 0, 8, 0, 60,} + , + {7, 0, 8, 0, 58,} + , + {7, 0, 8, 0, 57,} + , + {7, 0, 8, 0, 55,} + , + {7, 0, 7, 0, 61,} + , + {7, 0, 7, 0, 60,} + , + {7, 0, 7, 0, 58,} + , + {7, 0, 7, 0, 56,} + , + {7, 0, 7, 0, 55,} + , + {7, 0, 6, 0, 62,} + , + {7, 0, 6, 0, 60,} + , + {7, 0, 6, 0, 58,} + , + {7, 0, 6, 0, 57,} + , + {7, 0, 6, 0, 55,} + , + {7, 0, 6, 0, 54,} + , + {7, 0, 6, 0, 52,} + , + {7, 0, 5, 0, 61,} + , + {7, 0, 5, 0, 59,} + , + {7, 0, 5, 0, 57,} + , + {7, 0, 5, 0, 56,} + , + {7, 0, 5, 0, 54,} + , + {7, 0, 5, 0, 53,} + , + {7, 0, 5, 0, 51,} + , + {7, 0, 4, 0, 62,} + , + {7, 0, 4, 0, 60,} + , + {7, 0, 4, 0, 58,} + , + {7, 0, 4, 0, 57,} + , + {7, 0, 4, 0, 55,} + , + {7, 0, 4, 0, 54,} + , + {7, 0, 4, 0, 52,} + , + {7, 0, 4, 0, 51,} + , + {7, 0, 4, 0, 49,} + , + {7, 0, 4, 0, 48,} + , + {7, 0, 4, 0, 46,} + , + {7, 0, 3, 0, 60,} + , + {7, 0, 3, 0, 58,} + , + {7, 0, 3, 0, 57,} + , + {7, 0, 3, 0, 55,} + , + {7, 0, 3, 0, 54,} + , + {7, 0, 3, 0, 52,} + , + {7, 0, 3, 0, 51,} + , + {7, 0, 3, 0, 49,} + , + {7, 0, 3, 0, 48,} + , + {7, 0, 3, 0, 46,} + , + {7, 0, 3, 0, 45,} + , + {7, 0, 3, 0, 44,} + , + {7, 0, 3, 0, 43,} + , + {7, 0, 3, 0, 41,} + , + {7, 0, 2, 0, 61,} + , + {7, 0, 2, 0, 59,} + , + {7, 0, 2, 0, 57,} + , + {7, 0, 2, 0, 56,} + , + {7, 0, 2, 0, 54,} + , + {7, 0, 2, 0, 53,} + , + {7, 0, 2, 0, 51,} + , + {7, 0, 2, 0, 50,} + , + {7, 0, 2, 0, 48,} + , + {7, 0, 2, 0, 47,} + , + {7, 0, 2, 0, 46,} + , + {7, 0, 2, 0, 44,} + , + {7, 0, 2, 0, 43,} + , + {7, 0, 2, 0, 42,} + , + {7, 0, 2, 0, 41,} + , + {7, 0, 2, 0, 39,} + , + {7, 0, 2, 0, 38,} + , + {7, 0, 2, 0, 37,} + , + {7, 0, 2, 0, 36,} + , + {7, 0, 2, 0, 35,} + , + {7, 0, 2, 0, 34,} + , + {7, 0, 2, 0, 33,} + , + {7, 0, 2, 0, 32,} + , + {7, 0, 1, 0, 63,} + , + {7, 0, 1, 0, 61,} + , + {7, 0, 1, 0, 59,} + , + {7, 0, 1, 0, 57,} + , +}; + +const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[128] = { + {255, 255, 0xf0, 0, 152,} + , + {255, 255, 0xf0, 0, 147,} + , + {255, 255, 0xf0, 0, 143,} + , + {255, 255, 0xf0, 0, 139,} + , + {255, 255, 0xf0, 0, 135,} + , + {255, 255, 0xf0, 0, 131,} + , + {255, 255, 0xf0, 0, 128,} + , + {255, 255, 0xf0, 0, 124,} + , + {255, 255, 0xf0, 0, 121,} + , + {255, 255, 0xf0, 0, 117,} + , + {255, 255, 0xf0, 0, 114,} + , + {255, 255, 0xf0, 0, 111,} + , + {255, 255, 0xf0, 0, 107,} + , + {255, 255, 0xf0, 0, 104,} + , + {255, 255, 0xf0, 0, 101,} + , + {255, 255, 0xf0, 0, 99,} + , + {255, 255, 0xf0, 0, 96,} + , + {255, 255, 0xf0, 0, 93,} + , + {255, 255, 0xf0, 0, 90,} + , + {255, 255, 0xf0, 0, 88,} + , + {255, 255, 0xf0, 0, 85,} + , + {255, 255, 0xf0, 0, 83,} + , + {255, 255, 0xf0, 0, 81,} + , + {255, 255, 0xf0, 0, 78,} + , + {255, 255, 0xf0, 0, 76,} + , + {255, 255, 0xf0, 0, 74,} + , + {255, 255, 0xf0, 0, 72,} + , + {255, 255, 0xf0, 0, 70,} + , + {255, 255, 0xf0, 0, 68,} + , + {255, 255, 0xf0, 0, 66,} + , + {255, 255, 0xf0, 0, 64,} + , + {255, 248, 0xf0, 0, 64,} + , + {255, 241, 0xf0, 0, 64,} + , + {255, 251, 0xe0, 0, 64,} + , + {255, 244, 0xe0, 0, 64,} + , + {255, 254, 0xd0, 0, 64,} + , + {255, 246, 0xd0, 0, 64,} + , + {255, 239, 0xd0, 0, 64,} + , + {255, 249, 0xc0, 0, 64,} + , + {255, 242, 0xc0, 0, 64,} + , + {255, 255, 0xb0, 0, 64,} + , + {255, 248, 0xb0, 0, 64,} + , + {255, 241, 0xb0, 0, 64,} + , + {255, 254, 0xa0, 0, 64,} + , + {255, 246, 0xa0, 0, 64,} + , + {255, 239, 0xa0, 0, 64,} + , + {255, 255, 0x90, 0, 64,} + , + {255, 248, 0x90, 0, 64,} + , + {255, 241, 0x90, 0, 64,} + , + {255, 234, 0x90, 0, 64,} + , + {255, 255, 0x80, 0, 64,} + , + {255, 248, 0x80, 0, 64,} + , + {255, 241, 0x80, 0, 64,} + , + {255, 234, 0x80, 0, 64,} + , + {255, 255, 0x70, 0, 64,} + , + {255, 248, 0x70, 0, 64,} + , + {255, 241, 0x70, 0, 64,} + , + {255, 234, 0x70, 0, 64,} + , + {255, 227, 0x70, 0, 64,} + , + {255, 221, 0x70, 0, 64,} + , + {255, 215, 0x70, 0, 64,} + , + {255, 208, 0x70, 0, 64,} + , + {255, 203, 0x70, 0, 64,} + , + {255, 197, 0x70, 0, 64,} + , + {255, 255, 0x60, 0, 64,} + , + {255, 248, 0x60, 0, 64,} + , + {255, 241, 0x60, 0, 64,} + , + {255, 234, 0x60, 0, 64,} + , + {255, 227, 0x60, 0, 64,} + , + {255, 221, 0x60, 0, 64,} + , + {255, 255, 0x50, 0, 64,} + , + {255, 248, 0x50, 0, 64,} + , + {255, 241, 0x50, 0, 64,} + , + {255, 234, 0x50, 0, 64,} + , + {255, 227, 0x50, 0, 64,} + , + {255, 221, 0x50, 0, 64,} + , + {255, 215, 0x50, 0, 64,} + , + {255, 208, 0x50, 0, 64,} + , + {255, 255, 0x40, 0, 64,} + , + {255, 248, 0x40, 0, 64,} + , + {255, 241, 0x40, 0, 64,} + , + {255, 234, 0x40, 0, 64,} + , + {255, 227, 0x40, 0, 64,} + , + {255, 221, 0x40, 0, 64,} + , + {255, 215, 0x40, 0, 64,} + , + {255, 208, 0x40, 0, 64,} + , + {255, 203, 0x40, 0, 64,} + , + {255, 197, 0x40, 0, 64,} + , + {255, 255, 0x30, 0, 64,} + , + {255, 248, 0x30, 0, 64,} + , + {255, 241, 0x30, 0, 64,} + , + {255, 234, 0x30, 0, 64,} + , + {255, 227, 0x30, 0, 64,} + , + {255, 221, 0x30, 0, 64,} + , + {255, 215, 0x30, 0, 64,} + , + {255, 208, 0x30, 0, 64,} + , + {255, 203, 0x30, 0, 64,} + , + {255, 197, 0x30, 0, 64,} + , + {255, 191, 0x30, 0, 64,} + , + {255, 186, 0x30, 0, 64,} + , + {255, 181, 0x30, 0, 64,} + , + {255, 175, 0x30, 0, 64,} + , + {255, 255, 0x20, 0, 64,} + , + {255, 248, 0x20, 0, 64,} + , + {255, 241, 0x20, 0, 64,} + , + {255, 234, 0x20, 0, 64,} + , + {255, 227, 0x20, 0, 64,} + , + {255, 221, 0x20, 0, 64,} + , + {255, 215, 0x20, 0, 64,} + , + {255, 208, 0x20, 0, 64,} + , + {255, 203, 0x20, 0, 64,} + , + {255, 197, 0x20, 0, 64,} + , + {255, 191, 0x20, 0, 64,} + , + {255, 186, 0x20, 0, 64,} + , + {255, 181, 0x20, 0, 64,} + , + {255, 175, 0x20, 0, 64,} + , + {255, 170, 0x20, 0, 64,} + , + {255, 166, 0x20, 0, 64,} + , + {255, 161, 0x20, 0, 64,} + , + {255, 156, 0x20, 0, 64,} + , + {255, 152, 0x20, 0, 64,} + , + {255, 148, 0x20, 0, 64,} + , + {255, 143, 0x20, 0, 64,} + , + {255, 139, 0x20, 0, 64,} + , + {255, 135, 0x20, 0, 64,} + , + {255, 132, 0x20, 0, 64,} + , + {255, 255, 0x10, 0, 64,} + , + {255, 248, 0x10, 0, 64,} + , +}; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h new file mode 100644 index 0000000..5a64a98 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +typedef phytbl_info_t dot11lcnphytbl_info_t; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[]; +extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev0; +extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313; +extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa; +extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa_combo; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[]; +extern const u32 dot11lcnphytbl_info_sz_rev0; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[]; +extern const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[]; +extern const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[]; + +extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[]; + +typedef struct { + unsigned char gm; + unsigned char pga; + unsigned char pad; + unsigned char dac; + unsigned char bb_mult; +} lcnphy_tx_gain_tbl_entry; + +extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[]; +extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[]; + +extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[]; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c new file mode 100644 index 0000000..1dd613a --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c @@ -0,0 +1,10632 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include + +#include +#include +#include + +const u32 frame_struct_rev0[] = { + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x09804506, + 0x00100030, + 0x09804507, + 0x00100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a0c, + 0x00100004, + 0x01000a0d, + 0x00100024, + 0x0980450e, + 0x00100034, + 0x0980450f, + 0x00100034, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a04, + 0x00100000, + 0x11008a05, + 0x00100020, + 0x1980c506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x01800504, + 0x00100030, + 0x11808505, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000a04, + 0x00100000, + 0x11008a05, + 0x00100020, + 0x21810506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x1980c50e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x0180050c, + 0x00100038, + 0x1180850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x1980c506, + 0x00100030, + 0x1980c506, + 0x00100030, + 0x11808504, + 0x00100030, + 0x3981ca05, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x10008a04, + 0x00100000, + 0x3981ca05, + 0x00100030, + 0x1980c506, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a0c, + 0x00100008, + 0x01000a0d, + 0x00100028, + 0x1980c50e, + 0x00100038, + 0x1980c50e, + 0x00100038, + 0x1180850c, + 0x00100038, + 0x3981ca0d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x10008a0c, + 0x00100008, + 0x3981ca0d, + 0x00100038, + 0x1980c50e, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x02001405, + 0x00100040, + 0x0b004a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x43020a04, + 0x00100060, + 0x1b00ca05, + 0x00100060, + 0x23010a07, + 0x01500060, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x13008a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x0200140d, + 0x00100050, + 0x0b004a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x50029404, + 0x00100000, + 0x32019405, + 0x00100040, + 0x0b004a06, + 0x01900060, + 0x0b004a06, + 0x01900060, + 0x5b02ca04, + 0x00100060, + 0x3b01d405, + 0x00100060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x5802d404, + 0x00100000, + 0x3b01d405, + 0x00100060, + 0x0b004a06, + 0x01900060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x5002940c, + 0x00100010, + 0x3201940d, + 0x00100050, + 0x0b004a0e, + 0x01900070, + 0x0b004a0e, + 0x01900070, + 0x5b02ca0c, + 0x00100070, + 0x3b01d40d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x5802d40c, + 0x00100010, + 0x3b01d40d, + 0x00100070, + 0x0b004a0e, + 0x01900070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x000f4800, + 0x62031405, + 0x00100040, + 0x53028a06, + 0x01900060, + 0x53028a07, + 0x01900060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x000f4808, + 0x6203140d, + 0x00100048, + 0x53028a0e, + 0x01900068, + 0x53028a0f, + 0x01900068, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100004, + 0x11008a0d, + 0x00100024, + 0x1980c50e, + 0x00100034, + 0x2181050e, + 0x00100034, + 0x2181050e, + 0x00100034, + 0x0180050c, + 0x00100038, + 0x1180850d, + 0x00100038, + 0x1181850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x1181850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x0180c506, + 0x00100030, + 0x0180c506, + 0x00100030, + 0x2180c50c, + 0x00100030, + 0x49820a0d, + 0x0016a130, + 0x41824a0d, + 0x0016a130, + 0x2981450f, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x2000ca0c, + 0x00100000, + 0x49820a0d, + 0x0016a130, + 0x1980c50e, + 0x00100030, + 0x41824a0d, + 0x0016a130, + 0x2981450f, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100008, + 0x0200140d, + 0x00100048, + 0x0b004a0e, + 0x01900068, + 0x13008a0e, + 0x01900068, + 0x13008a0e, + 0x01900068, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x1b014a0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x1b014a0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x50029404, + 0x00100000, + 0x32019405, + 0x00100040, + 0x03004a06, + 0x01900060, + 0x03004a06, + 0x01900060, + 0x6b030a0c, + 0x00100060, + 0x4b02140d, + 0x0016a160, + 0x4302540d, + 0x0016a160, + 0x23010a0f, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x6b03140c, + 0x00100060, + 0x4b02140d, + 0x0016a160, + 0x0b004a0e, + 0x01900060, + 0x4302540d, + 0x0016a160, + 0x23010a0f, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x53028a06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x43020a04, + 0x00100060, + 0x1b00ca05, + 0x00100060, + 0x53028a07, + 0x0190c060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x53028a0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x53028a0f, + 0x0190c070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x5b02ca06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x53028a07, + 0x0190c060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x5b02ca0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x53028a0f, + 0x0190c070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u8 frame_lut_rev0[] = { + 0x02, + 0x04, + 0x14, + 0x14, + 0x03, + 0x05, + 0x16, + 0x16, + 0x0a, + 0x0c, + 0x1c, + 0x1c, + 0x0b, + 0x0d, + 0x1e, + 0x1e, + 0x06, + 0x08, + 0x18, + 0x18, + 0x07, + 0x09, + 0x1a, + 0x1a, + 0x0e, + 0x10, + 0x20, + 0x28, + 0x0f, + 0x11, + 0x22, + 0x2a, +}; + +const u32 tmap_tbl_rev0[] = { + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x000aa888, + 0x88880000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00011111, + 0x11110000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00088aaa, + 0xaaaa0000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xaaa8aaa0, + 0x8aaa8aaa, + 0xaa8a8a8a, + 0x000aaa88, + 0x8aaa0000, + 0xaaa8a888, + 0x8aa88a8a, + 0x8a88a888, + 0x08080a00, + 0x0a08080a, + 0x080a0a08, + 0x00080808, + 0x080a0000, + 0x080a0808, + 0x080a0808, + 0x0a0a0a08, + 0xa0a0a0a0, + 0x80a0a080, + 0x8080a0a0, + 0x00008080, + 0x80a00000, + 0x80a080a0, + 0xa080a0a0, + 0x8080a0a0, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x99999000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x22000000, + 0x2222b222, + 0x22222222, + 0x222222b2, + 0xb2222220, + 0x22222222, + 0x22d22222, + 0x00000222, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x33000000, + 0x3333b333, + 0x33333333, + 0x333333b3, + 0xb3333330, + 0x33333333, + 0x33d33333, + 0x00000333, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x99b99b00, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb99, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x22222200, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0x22222222, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x11111111, + 0xf1111111, + 0x11111111, + 0x11f11111, + 0x01111111, + 0xbb9bb900, + 0xb9b9bb99, + 0xb99bbbbb, + 0xbbbb9b9b, + 0xb9bb99bb, + 0xb99999b9, + 0xb9b9b99b, + 0x00000bbb, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88aa, + 0xa88888a8, + 0xa8a8a88a, + 0x0a888aaa, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00000aaa, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0xbbbbbb00, + 0x999bbbbb, + 0x9bb99b9b, + 0xb9b9b9bb, + 0xb9b99bbb, + 0xb9b9b9bb, + 0xb9bb9b99, + 0x00000999, + 0x8a000000, + 0xaa88a888, + 0xa88888aa, + 0xa88a8a88, + 0xa88aa88a, + 0x88a8aaaa, + 0xa8aa8aaa, + 0x0888a88a, + 0x0b0b0b00, + 0x090b0b0b, + 0x0b090b0b, + 0x0909090b, + 0x09090b0b, + 0x09090b0b, + 0x09090b09, + 0x00000909, + 0x0a000000, + 0x0a080808, + 0x080a080a, + 0x080a0a08, + 0x080a080a, + 0x0808080a, + 0x0a0a0a08, + 0x0808080a, + 0xb0b0b000, + 0x9090b0b0, + 0x90b09090, + 0xb0b0b090, + 0xb0b090b0, + 0x90b0b0b0, + 0xb0b09090, + 0x00000090, + 0x80000000, + 0xa080a080, + 0xa08080a0, + 0xa0808080, + 0xa080a080, + 0x80a0a0a0, + 0xa0a080a0, + 0x00a0a0a0, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x33000000, + 0x3333f333, + 0x33333333, + 0x333333f3, + 0xf3333330, + 0x33333333, + 0x33f33333, + 0x00000333, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x99000000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88888000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x88a88a00, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 tdtrn_tbl_rev0[] = { + 0x061c061c, + 0x0050ee68, + 0xf592fe36, + 0xfe5212f6, + 0x00000c38, + 0xfe5212f6, + 0xf592fe36, + 0x0050ee68, + 0x061c061c, + 0xee680050, + 0xfe36f592, + 0x12f6fe52, + 0x0c380000, + 0x12f6fe52, + 0xfe36f592, + 0xee680050, + 0x061c061c, + 0x0050ee68, + 0xf592fe36, + 0xfe5212f6, + 0x00000c38, + 0xfe5212f6, + 0xf592fe36, + 0x0050ee68, + 0x061c061c, + 0xee680050, + 0xfe36f592, + 0x12f6fe52, + 0x0c380000, + 0x12f6fe52, + 0xfe36f592, + 0xee680050, + 0x05e305e3, + 0x004def0c, + 0xf5f3fe47, + 0xfe611246, + 0x00000bc7, + 0xfe611246, + 0xf5f3fe47, + 0x004def0c, + 0x05e305e3, + 0xef0c004d, + 0xfe47f5f3, + 0x1246fe61, + 0x0bc70000, + 0x1246fe61, + 0xfe47f5f3, + 0xef0c004d, + 0x05e305e3, + 0x004def0c, + 0xf5f3fe47, + 0xfe611246, + 0x00000bc7, + 0xfe611246, + 0xf5f3fe47, + 0x004def0c, + 0x05e305e3, + 0xef0c004d, + 0xfe47f5f3, + 0x1246fe61, + 0x0bc70000, + 0x1246fe61, + 0xfe47f5f3, + 0xef0c004d, + 0xfa58fa58, + 0xf895043b, + 0xff4c09c0, + 0xfbc6ffa8, + 0xfb84f384, + 0x0798f6f9, + 0x05760122, + 0x058409f6, + 0x0b500000, + 0x05b7f542, + 0x08860432, + 0x06ddfee7, + 0xfb84f384, + 0xf9d90664, + 0xf7e8025c, + 0x00fff7bd, + 0x05a805a8, + 0xf7bd00ff, + 0x025cf7e8, + 0x0664f9d9, + 0xf384fb84, + 0xfee706dd, + 0x04320886, + 0xf54205b7, + 0x00000b50, + 0x09f60584, + 0x01220576, + 0xf6f90798, + 0xf384fb84, + 0xffa8fbc6, + 0x09c0ff4c, + 0x043bf895, + 0x02d402d4, + 0x07de0270, + 0xfc96079c, + 0xf90afe94, + 0xfe00ff2c, + 0x02d4065d, + 0x092a0096, + 0x0014fbb8, + 0xfd2cfd2c, + 0x076afb3c, + 0x0096f752, + 0xf991fd87, + 0xfb2c0200, + 0xfeb8f960, + 0x08e0fc96, + 0x049802a8, + 0xfd2cfd2c, + 0x02a80498, + 0xfc9608e0, + 0xf960feb8, + 0x0200fb2c, + 0xfd87f991, + 0xf7520096, + 0xfb3c076a, + 0xfd2cfd2c, + 0xfbb80014, + 0x0096092a, + 0x065d02d4, + 0xff2cfe00, + 0xfe94f90a, + 0x079cfc96, + 0x027007de, + 0x02d402d4, + 0x027007de, + 0x079cfc96, + 0xfe94f90a, + 0xff2cfe00, + 0x065d02d4, + 0x0096092a, + 0xfbb80014, + 0xfd2cfd2c, + 0xfb3c076a, + 0xf7520096, + 0xfd87f991, + 0x0200fb2c, + 0xf960feb8, + 0xfc9608e0, + 0x02a80498, + 0xfd2cfd2c, + 0x049802a8, + 0x08e0fc96, + 0xfeb8f960, + 0xfb2c0200, + 0xf991fd87, + 0x0096f752, + 0x076afb3c, + 0xfd2cfd2c, + 0x0014fbb8, + 0x092a0096, + 0x02d4065d, + 0xfe00ff2c, + 0xf90afe94, + 0xfc96079c, + 0x07de0270, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x062a0000, + 0xfefa0759, + 0x08b80908, + 0xf396fc2d, + 0xf9d6045c, + 0xfc4ef608, + 0xf748f596, + 0x07b207bf, + 0x062a062a, + 0xf84ef841, + 0xf748f596, + 0x03b209f8, + 0xf9d6045c, + 0x0c6a03d3, + 0x08b80908, + 0x0106f8a7, + 0x062a0000, + 0xfefaf8a7, + 0x08b8f6f8, + 0xf39603d3, + 0xf9d6fba4, + 0xfc4e09f8, + 0xf7480a6a, + 0x07b2f841, + 0x062af9d6, + 0xf84e07bf, + 0xf7480a6a, + 0x03b2f608, + 0xf9d6fba4, + 0x0c6afc2d, + 0x08b8f6f8, + 0x01060759, + 0x062a0000, + 0xfefa0759, + 0x08b80908, + 0xf396fc2d, + 0xf9d6045c, + 0xfc4ef608, + 0xf748f596, + 0x07b207bf, + 0x062a062a, + 0xf84ef841, + 0xf748f596, + 0x03b209f8, + 0xf9d6045c, + 0x0c6a03d3, + 0x08b80908, + 0x0106f8a7, + 0x062a0000, + 0xfefaf8a7, + 0x08b8f6f8, + 0xf39603d3, + 0xf9d6fba4, + 0xfc4e09f8, + 0xf7480a6a, + 0x07b2f841, + 0x062af9d6, + 0xf84e07bf, + 0xf7480a6a, + 0x03b2f608, + 0xf9d6fba4, + 0x0c6afc2d, + 0x08b8f6f8, + 0x01060759, + 0x061c061c, + 0xff30009d, + 0xffb21141, + 0xfd87fb54, + 0xf65dfe59, + 0x02eef99e, + 0x0166f03c, + 0xfff809b6, + 0x000008a4, + 0x000af42b, + 0x00eff577, + 0xfa840bf2, + 0xfc02ff51, + 0x08260f67, + 0xfff0036f, + 0x0842f9c3, + 0x00000000, + 0x063df7be, + 0xfc910010, + 0xf099f7da, + 0x00af03fe, + 0xf40e057c, + 0x0a89ff11, + 0x0bd5fff6, + 0xf75c0000, + 0xf64a0008, + 0x0fc4fe9a, + 0x0662fd12, + 0x01a709a3, + 0x04ac0279, + 0xeebf004e, + 0xff6300d0, + 0xf9e4f9e4, + 0x00d0ff63, + 0x004eeebf, + 0x027904ac, + 0x09a301a7, + 0xfd120662, + 0xfe9a0fc4, + 0x0008f64a, + 0x0000f75c, + 0xfff60bd5, + 0xff110a89, + 0x057cf40e, + 0x03fe00af, + 0xf7daf099, + 0x0010fc91, + 0xf7be063d, + 0x00000000, + 0xf9c30842, + 0x036ffff0, + 0x0f670826, + 0xff51fc02, + 0x0bf2fa84, + 0xf57700ef, + 0xf42b000a, + 0x08a40000, + 0x09b6fff8, + 0xf03c0166, + 0xf99e02ee, + 0xfe59f65d, + 0xfb54fd87, + 0x1141ffb2, + 0x009dff30, + 0x05e30000, + 0xff060705, + 0x085408a0, + 0xf425fc59, + 0xfa1d042a, + 0xfc78f67a, + 0xf7acf60e, + 0x075a0766, + 0x05e305e3, + 0xf8a6f89a, + 0xf7acf60e, + 0x03880986, + 0xfa1d042a, + 0x0bdb03a7, + 0x085408a0, + 0x00faf8fb, + 0x05e30000, + 0xff06f8fb, + 0x0854f760, + 0xf42503a7, + 0xfa1dfbd6, + 0xfc780986, + 0xf7ac09f2, + 0x075af89a, + 0x05e3fa1d, + 0xf8a60766, + 0xf7ac09f2, + 0x0388f67a, + 0xfa1dfbd6, + 0x0bdbfc59, + 0x0854f760, + 0x00fa0705, + 0x05e30000, + 0xff060705, + 0x085408a0, + 0xf425fc59, + 0xfa1d042a, + 0xfc78f67a, + 0xf7acf60e, + 0x075a0766, + 0x05e305e3, + 0xf8a6f89a, + 0xf7acf60e, + 0x03880986, + 0xfa1d042a, + 0x0bdb03a7, + 0x085408a0, + 0x00faf8fb, + 0x05e30000, + 0xff06f8fb, + 0x0854f760, + 0xf42503a7, + 0xfa1dfbd6, + 0xfc780986, + 0xf7ac09f2, + 0x075af89a, + 0x05e3fa1d, + 0xf8a60766, + 0xf7ac09f2, + 0x0388f67a, + 0xfa1dfbd6, + 0x0bdbfc59, + 0x0854f760, + 0x00fa0705, + 0xfa58fa58, + 0xf8f0fe00, + 0x0448073d, + 0xfdc9fe46, + 0xf9910258, + 0x089d0407, + 0xfd5cf71a, + 0x02affde0, + 0x083e0496, + 0xff5a0740, + 0xff7afd97, + 0x00fe01f1, + 0x0009082e, + 0xfa94ff75, + 0xfecdf8ea, + 0xffb0f693, + 0xfd2cfa58, + 0x0433ff16, + 0xfba405dd, + 0xfa610341, + 0x06a606cb, + 0x0039fd2d, + 0x0677fa97, + 0x01fa05e0, + 0xf896003e, + 0x075a068b, + 0x012cfc3e, + 0xfa23f98d, + 0xfc7cfd43, + 0xff90fc0d, + 0x01c10982, + 0x00c601d6, + 0xfd2cfd2c, + 0x01d600c6, + 0x098201c1, + 0xfc0dff90, + 0xfd43fc7c, + 0xf98dfa23, + 0xfc3e012c, + 0x068b075a, + 0x003ef896, + 0x05e001fa, + 0xfa970677, + 0xfd2d0039, + 0x06cb06a6, + 0x0341fa61, + 0x05ddfba4, + 0xff160433, + 0xfa58fd2c, + 0xf693ffb0, + 0xf8eafecd, + 0xff75fa94, + 0x082e0009, + 0x01f100fe, + 0xfd97ff7a, + 0x0740ff5a, + 0x0496083e, + 0xfde002af, + 0xf71afd5c, + 0x0407089d, + 0x0258f991, + 0xfe46fdc9, + 0x073d0448, + 0xfe00f8f0, + 0xfd2cfd2c, + 0xfce00500, + 0xfc09fddc, + 0xfe680157, + 0x04c70571, + 0xfc3aff21, + 0xfcd70228, + 0x056d0277, + 0x0200fe00, + 0x0022f927, + 0xfe3c032b, + 0xfc44ff3c, + 0x03e9fbdb, + 0x04570313, + 0x04c9ff5c, + 0x000d03b8, + 0xfa580000, + 0xfbe900d2, + 0xf9d0fe0b, + 0x0125fdf9, + 0x042501bf, + 0x0328fa2b, + 0xffa902f0, + 0xfa250157, + 0x0200fe00, + 0x03740438, + 0xff0405fd, + 0x030cfe52, + 0x0037fb39, + 0xff6904c5, + 0x04f8fd23, + 0xfd31fc1b, + 0xfd2cfd2c, + 0xfc1bfd31, + 0xfd2304f8, + 0x04c5ff69, + 0xfb390037, + 0xfe52030c, + 0x05fdff04, + 0x04380374, + 0xfe000200, + 0x0157fa25, + 0x02f0ffa9, + 0xfa2b0328, + 0x01bf0425, + 0xfdf90125, + 0xfe0bf9d0, + 0x00d2fbe9, + 0x0000fa58, + 0x03b8000d, + 0xff5c04c9, + 0x03130457, + 0xfbdb03e9, + 0xff3cfc44, + 0x032bfe3c, + 0xf9270022, + 0xfe000200, + 0x0277056d, + 0x0228fcd7, + 0xff21fc3a, + 0x057104c7, + 0x0157fe68, + 0xfddcfc09, + 0x0500fce0, + 0xfd2cfd2c, + 0x0500fce0, + 0xfddcfc09, + 0x0157fe68, + 0x057104c7, + 0xff21fc3a, + 0x0228fcd7, + 0x0277056d, + 0xfe000200, + 0xf9270022, + 0x032bfe3c, + 0xff3cfc44, + 0xfbdb03e9, + 0x03130457, + 0xff5c04c9, + 0x03b8000d, + 0x0000fa58, + 0x00d2fbe9, + 0xfe0bf9d0, + 0xfdf90125, + 0x01bf0425, + 0xfa2b0328, + 0x02f0ffa9, + 0x0157fa25, + 0xfe000200, + 0x04380374, + 0x05fdff04, + 0xfe52030c, + 0xfb390037, + 0x04c5ff69, + 0xfd2304f8, + 0xfc1bfd31, + 0xfd2cfd2c, + 0xfd31fc1b, + 0x04f8fd23, + 0xff6904c5, + 0x0037fb39, + 0x030cfe52, + 0xff0405fd, + 0x03740438, + 0x0200fe00, + 0xfa250157, + 0xffa902f0, + 0x0328fa2b, + 0x042501bf, + 0x0125fdf9, + 0xf9d0fe0b, + 0xfbe900d2, + 0xfa580000, + 0x000d03b8, + 0x04c9ff5c, + 0x04570313, + 0x03e9fbdb, + 0xfc44ff3c, + 0xfe3c032b, + 0x0022f927, + 0x0200fe00, + 0x056d0277, + 0xfcd70228, + 0xfc3aff21, + 0x04c70571, + 0xfe680157, + 0xfc09fddc, + 0xfce00500, + 0x05a80000, + 0xff1006be, + 0x0800084a, + 0xf49cfc7e, + 0xfa580400, + 0xfc9cf6da, + 0xf800f672, + 0x0710071c, + 0x05a805a8, + 0xf8f0f8e4, + 0xf800f672, + 0x03640926, + 0xfa580400, + 0x0b640382, + 0x0800084a, + 0x00f0f942, + 0x05a80000, + 0xff10f942, + 0x0800f7b6, + 0xf49c0382, + 0xfa58fc00, + 0xfc9c0926, + 0xf800098e, + 0x0710f8e4, + 0x05a8fa58, + 0xf8f0071c, + 0xf800098e, + 0x0364f6da, + 0xfa58fc00, + 0x0b64fc7e, + 0x0800f7b6, + 0x00f006be, + 0x05a80000, + 0xff1006be, + 0x0800084a, + 0xf49cfc7e, + 0xfa580400, + 0xfc9cf6da, + 0xf800f672, + 0x0710071c, + 0x05a805a8, + 0xf8f0f8e4, + 0xf800f672, + 0x03640926, + 0xfa580400, + 0x0b640382, + 0x0800084a, + 0x00f0f942, + 0x05a80000, + 0xff10f942, + 0x0800f7b6, + 0xf49c0382, + 0xfa58fc00, + 0xfc9c0926, + 0xf800098e, + 0x0710f8e4, + 0x05a8fa58, + 0xf8f0071c, + 0xf800098e, + 0x0364f6da, + 0xfa58fc00, + 0x0b64fc7e, + 0x0800f7b6, + 0x00f006be, +}; + +const u32 intlv_tbl_rev0[] = { + 0x00802070, + 0x0671188d, + 0x0a60192c, + 0x0a300e46, + 0x00c1188d, + 0x080024d2, + 0x00000070, +}; + +const u16 pilot_tbl_rev0[] = { + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0xff0a, + 0xff82, + 0xffa0, + 0xff28, + 0xffff, + 0xffff, + 0xffff, + 0xffff, + 0xff82, + 0xffa0, + 0xff28, + 0xff0a, + 0xffff, + 0xffff, + 0xffff, + 0xffff, + 0xf83f, + 0xfa1f, + 0xfa97, + 0xfab5, + 0xf2bd, + 0xf0bf, + 0xffff, + 0xffff, + 0xf017, + 0xf815, + 0xf215, + 0xf095, + 0xf035, + 0xf01d, + 0xffff, + 0xffff, + 0xff08, + 0xff02, + 0xff80, + 0xff20, + 0xff08, + 0xff02, + 0xff80, + 0xff20, + 0xf01f, + 0xf817, + 0xfa15, + 0xf295, + 0xf0b5, + 0xf03d, + 0xffff, + 0xffff, + 0xf82a, + 0xfa0a, + 0xfa82, + 0xfaa0, + 0xf2a8, + 0xf0aa, + 0xffff, + 0xffff, + 0xf002, + 0xf800, + 0xf200, + 0xf080, + 0xf020, + 0xf008, + 0xffff, + 0xffff, + 0xf00a, + 0xf802, + 0xfa00, + 0xf280, + 0xf0a0, + 0xf028, + 0xffff, + 0xffff, +}; + +const u32 pltlut_tbl_rev0[] = { + 0x76540123, + 0x62407351, + 0x76543201, + 0x76540213, + 0x76540123, + 0x76430521, +}; + +const u32 tdi_tbl20_ant0_rev0[] = { + 0x00091226, + 0x000a1429, + 0x000b56ad, + 0x000c58b0, + 0x000d5ab3, + 0x000e9cb6, + 0x000f9eba, + 0x0000c13d, + 0x00020301, + 0x00030504, + 0x00040708, + 0x0005090b, + 0x00064b8e, + 0x00095291, + 0x000a5494, + 0x000b9718, + 0x000c9927, + 0x000d9b2a, + 0x000edd2e, + 0x000fdf31, + 0x000101b4, + 0x000243b7, + 0x000345bb, + 0x000447be, + 0x00058982, + 0x00068c05, + 0x00099309, + 0x000a950c, + 0x000bd78f, + 0x000cd992, + 0x000ddb96, + 0x000f1d99, + 0x00005fa8, + 0x0001422c, + 0x0002842f, + 0x00038632, + 0x00048835, + 0x0005ca38, + 0x0006ccbc, + 0x0009d3bf, + 0x000b1603, + 0x000c1806, + 0x000d1a0a, + 0x000e1c0d, + 0x000f5e10, + 0x00008093, + 0x00018297, + 0x0002c49a, + 0x0003c680, + 0x0004c880, + 0x00060b00, + 0x00070d00, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl20_ant1_rev0[] = { + 0x00014b26, + 0x00028d29, + 0x000393ad, + 0x00049630, + 0x0005d833, + 0x0006da36, + 0x00099c3a, + 0x000a9e3d, + 0x000bc081, + 0x000cc284, + 0x000dc488, + 0x000f068b, + 0x0000488e, + 0x00018b91, + 0x0002d214, + 0x0003d418, + 0x0004d6a7, + 0x000618aa, + 0x00071aae, + 0x0009dcb1, + 0x000b1eb4, + 0x000c0137, + 0x000d033b, + 0x000e053e, + 0x000f4702, + 0x00008905, + 0x00020c09, + 0x0003128c, + 0x0004148f, + 0x00051712, + 0x00065916, + 0x00091b19, + 0x000a1d28, + 0x000b5f2c, + 0x000c41af, + 0x000d43b2, + 0x000e85b5, + 0x000f87b8, + 0x0000c9bc, + 0x00024cbf, + 0x00035303, + 0x00045506, + 0x0005978a, + 0x0006998d, + 0x00095b90, + 0x000a5d93, + 0x000b9f97, + 0x000c821a, + 0x000d8400, + 0x000ec600, + 0x000fc800, + 0x00010a00, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl40_ant0_rev0[] = { + 0x0011a346, + 0x00136ccf, + 0x0014f5d9, + 0x001641e2, + 0x0017cb6b, + 0x00195475, + 0x001b2383, + 0x001cad0c, + 0x001e7616, + 0x0000821f, + 0x00020ba8, + 0x0003d4b2, + 0x00056447, + 0x00072dd0, + 0x0008b6da, + 0x000a02e3, + 0x000b8c6c, + 0x000d15f6, + 0x0011e484, + 0x0013ae0d, + 0x00153717, + 0x00168320, + 0x00180ca9, + 0x00199633, + 0x001b6548, + 0x001ceed1, + 0x001eb7db, + 0x0000c3e4, + 0x00024d6d, + 0x000416f7, + 0x0005a585, + 0x00076f0f, + 0x0008f818, + 0x000a4421, + 0x000bcdab, + 0x000d9734, + 0x00122649, + 0x0013efd2, + 0x001578dc, + 0x0016c4e5, + 0x00184e6e, + 0x001a17f8, + 0x001ba686, + 0x001d3010, + 0x001ef999, + 0x00010522, + 0x00028eac, + 0x00045835, + 0x0005e74a, + 0x0007b0d3, + 0x00093a5d, + 0x000a85e6, + 0x000c0f6f, + 0x000dd8f9, + 0x00126787, + 0x00143111, + 0x0015ba9a, + 0x00170623, + 0x00188fad, + 0x001a5936, + 0x001be84b, + 0x001db1d4, + 0x001f3b5e, + 0x000146e7, + 0x00031070, + 0x000499fa, + 0x00062888, + 0x0007f212, + 0x00097b9b, + 0x000ac7a4, + 0x000c50ae, + 0x000e1a37, + 0x0012a94c, + 0x001472d5, + 0x0015fc5f, + 0x00174868, + 0x0018d171, + 0x001a9afb, + 0x001c2989, + 0x001df313, + 0x001f7c9c, + 0x000188a5, + 0x000351af, + 0x0004db38, + 0x0006aa4d, + 0x000833d7, + 0x0009bd60, + 0x000b0969, + 0x000c9273, + 0x000e5bfc, + 0x00132a8a, + 0x0014b414, + 0x00163d9d, + 0x001789a6, + 0x001912b0, + 0x001adc39, + 0x001c6bce, + 0x001e34d8, + 0x001fbe61, + 0x0001ca6a, + 0x00039374, + 0x00051cfd, + 0x0006ec0b, + 0x00087515, + 0x0009fe9e, + 0x000b4aa7, + 0x000cd3b1, + 0x000e9d3a, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl40_ant1_rev0[] = { + 0x001edb36, + 0x000129ca, + 0x0002b353, + 0x00047cdd, + 0x0005c8e6, + 0x000791ef, + 0x00091bf9, + 0x000aaa07, + 0x000c3391, + 0x000dfd1a, + 0x00120923, + 0x0013d22d, + 0x00155c37, + 0x0016eacb, + 0x00187454, + 0x001a3dde, + 0x001b89e7, + 0x001d12f0, + 0x001f1cfa, + 0x00016b88, + 0x00033492, + 0x0004be1b, + 0x00060a24, + 0x0007d32e, + 0x00095d38, + 0x000aec4c, + 0x000c7555, + 0x000e3edf, + 0x00124ae8, + 0x001413f1, + 0x0015a37b, + 0x00172c89, + 0x0018b593, + 0x001a419c, + 0x001bcb25, + 0x001d942f, + 0x001f63b9, + 0x0001ad4d, + 0x00037657, + 0x0004c260, + 0x00068be9, + 0x000814f3, + 0x0009a47c, + 0x000b2d8a, + 0x000cb694, + 0x000e429d, + 0x00128c26, + 0x001455b0, + 0x0015e4ba, + 0x00176e4e, + 0x0018f758, + 0x001a8361, + 0x001c0cea, + 0x001dd674, + 0x001fa57d, + 0x0001ee8b, + 0x0003b795, + 0x0005039e, + 0x0006cd27, + 0x000856b1, + 0x0009e5c6, + 0x000b6f4f, + 0x000cf859, + 0x000e8462, + 0x00130deb, + 0x00149775, + 0x00162603, + 0x0017af8c, + 0x00193896, + 0x001ac49f, + 0x001c4e28, + 0x001e17b2, + 0x0000a6c7, + 0x00023050, + 0x0003f9da, + 0x00054563, + 0x00070eec, + 0x00089876, + 0x000a2704, + 0x000bb08d, + 0x000d3a17, + 0x001185a0, + 0x00134f29, + 0x0014d8b3, + 0x001667c8, + 0x0017f151, + 0x00197adb, + 0x001b0664, + 0x001c8fed, + 0x001e5977, + 0x0000e805, + 0x0002718f, + 0x00043b18, + 0x000586a1, + 0x0007502b, + 0x0008d9b4, + 0x000a68c9, + 0x000bf252, + 0x000dbbdc, + 0x0011c7e5, + 0x001390ee, + 0x00151a78, + 0x0016a906, + 0x00183290, + 0x0019bc19, + 0x001b4822, + 0x001cd12c, + 0x001e9ab5, + 0x00000000, + 0x00000000, +}; + +const u16 bdi_tbl_rev0[] = { + 0x0070, + 0x0126, + 0x012c, + 0x0246, + 0x048d, + 0x04d2, +}; + +const u32 chanest_tbl_rev0[] = { + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, +}; + +const u8 mcs_tbl_rev0[] = { + 0x00, + 0x08, + 0x0a, + 0x10, + 0x12, + 0x19, + 0x1a, + 0x1c, + 0x40, + 0x48, + 0x4a, + 0x50, + 0x52, + 0x59, + 0x5a, + 0x5c, + 0x80, + 0x88, + 0x8a, + 0x90, + 0x92, + 0x99, + 0x9a, + 0x9c, + 0xc0, + 0xc8, + 0xca, + 0xd0, + 0xd2, + 0xd9, + 0xda, + 0xdc, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x01, + 0x02, + 0x04, + 0x08, + 0x09, + 0x0a, + 0x0c, + 0x10, + 0x11, + 0x12, + 0x14, + 0x18, + 0x19, + 0x1a, + 0x1c, + 0x20, + 0x21, + 0x22, + 0x24, + 0x40, + 0x41, + 0x42, + 0x44, + 0x48, + 0x49, + 0x4a, + 0x4c, + 0x50, + 0x51, + 0x52, + 0x54, + 0x58, + 0x59, + 0x5a, + 0x5c, + 0x60, + 0x61, + 0x62, + 0x64, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, +}; + +const u32 noise_var_tbl0_rev0[] = { + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, +}; + +const u32 noise_var_tbl1_rev0[] = { + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, +}; + +const u8 est_pwr_lut_core0_rev0[] = { + 0x50, + 0x4f, + 0x4e, + 0x4d, + 0x4c, + 0x4b, + 0x4a, + 0x49, + 0x48, + 0x47, + 0x46, + 0x45, + 0x44, + 0x43, + 0x42, + 0x41, + 0x40, + 0x3f, + 0x3e, + 0x3d, + 0x3c, + 0x3b, + 0x3a, + 0x39, + 0x38, + 0x37, + 0x36, + 0x35, + 0x34, + 0x33, + 0x32, + 0x31, + 0x30, + 0x2f, + 0x2e, + 0x2d, + 0x2c, + 0x2b, + 0x2a, + 0x29, + 0x28, + 0x27, + 0x26, + 0x25, + 0x24, + 0x23, + 0x22, + 0x21, + 0x20, + 0x1f, + 0x1e, + 0x1d, + 0x1c, + 0x1b, + 0x1a, + 0x19, + 0x18, + 0x17, + 0x16, + 0x15, + 0x14, + 0x13, + 0x12, + 0x11, +}; + +const u8 est_pwr_lut_core1_rev0[] = { + 0x50, + 0x4f, + 0x4e, + 0x4d, + 0x4c, + 0x4b, + 0x4a, + 0x49, + 0x48, + 0x47, + 0x46, + 0x45, + 0x44, + 0x43, + 0x42, + 0x41, + 0x40, + 0x3f, + 0x3e, + 0x3d, + 0x3c, + 0x3b, + 0x3a, + 0x39, + 0x38, + 0x37, + 0x36, + 0x35, + 0x34, + 0x33, + 0x32, + 0x31, + 0x30, + 0x2f, + 0x2e, + 0x2d, + 0x2c, + 0x2b, + 0x2a, + 0x29, + 0x28, + 0x27, + 0x26, + 0x25, + 0x24, + 0x23, + 0x22, + 0x21, + 0x20, + 0x1f, + 0x1e, + 0x1d, + 0x1c, + 0x1b, + 0x1a, + 0x19, + 0x18, + 0x17, + 0x16, + 0x15, + 0x14, + 0x13, + 0x12, + 0x11, +}; + +const u8 adj_pwr_lut_core0_rev0[] = { + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, +}; + +const u8 adj_pwr_lut_core1_rev0[] = { + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, +}; + +const u32 gainctrl_lut_core0_rev0[] = { + 0x03cc2b44, + 0x03cc2b42, + 0x03cc2b40, + 0x03cc2b3e, + 0x03cc2b3d, + 0x03cc2b3b, + 0x03c82b44, + 0x03c82b42, + 0x03c82b40, + 0x03c82b3e, + 0x03c82b3d, + 0x03c82b3b, + 0x03c82b39, + 0x03c82b38, + 0x03c82b36, + 0x03c82b34, + 0x03c42b44, + 0x03c42b42, + 0x03c42b40, + 0x03c42b3e, + 0x03c42b3d, + 0x03c42b3b, + 0x03c42b39, + 0x03c42b38, + 0x03c42b36, + 0x03c42b34, + 0x03c42b33, + 0x03c42b32, + 0x03c42b30, + 0x03c42b2f, + 0x03c42b2d, + 0x03c02b44, + 0x03c02b42, + 0x03c02b40, + 0x03c02b3e, + 0x03c02b3d, + 0x03c02b3b, + 0x03c02b39, + 0x03c02b38, + 0x03c02b36, + 0x03c02b34, + 0x03b02b44, + 0x03b02b42, + 0x03b02b40, + 0x03b02b3e, + 0x03b02b3d, + 0x03b02b3b, + 0x03b02b39, + 0x03b02b38, + 0x03b02b36, + 0x03b02b34, + 0x03b02b33, + 0x03b02b32, + 0x03b02b30, + 0x03b02b2f, + 0x03b02b2d, + 0x03a02b44, + 0x03a02b42, + 0x03a02b40, + 0x03a02b3e, + 0x03a02b3d, + 0x03a02b3b, + 0x03a02b39, + 0x03a02b38, + 0x03a02b36, + 0x03a02b34, + 0x03902b44, + 0x03902b42, + 0x03902b40, + 0x03902b3e, + 0x03902b3d, + 0x03902b3b, + 0x03902b39, + 0x03902b38, + 0x03902b36, + 0x03902b34, + 0x03902b33, + 0x03902b32, + 0x03902b30, + 0x03802b44, + 0x03802b42, + 0x03802b40, + 0x03802b3e, + 0x03802b3d, + 0x03802b3b, + 0x03802b39, + 0x03802b38, + 0x03802b36, + 0x03802b34, + 0x03802b33, + 0x03802b32, + 0x03802b30, + 0x03802b2f, + 0x03802b2d, + 0x03802b2c, + 0x03802b2b, + 0x03802b2a, + 0x03802b29, + 0x03802b27, + 0x03802b26, + 0x03802b25, + 0x03802b24, + 0x03802b23, + 0x03802b22, + 0x03802b21, + 0x03802b20, + 0x03802b1f, + 0x03802b1e, + 0x03802b1e, + 0x03802b1d, + 0x03802b1c, + 0x03802b1b, + 0x03802b1a, + 0x03802b1a, + 0x03802b19, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x00002b00, +}; + +const u32 gainctrl_lut_core1_rev0[] = { + 0x03cc2b44, + 0x03cc2b42, + 0x03cc2b40, + 0x03cc2b3e, + 0x03cc2b3d, + 0x03cc2b3b, + 0x03c82b44, + 0x03c82b42, + 0x03c82b40, + 0x03c82b3e, + 0x03c82b3d, + 0x03c82b3b, + 0x03c82b39, + 0x03c82b38, + 0x03c82b36, + 0x03c82b34, + 0x03c42b44, + 0x03c42b42, + 0x03c42b40, + 0x03c42b3e, + 0x03c42b3d, + 0x03c42b3b, + 0x03c42b39, + 0x03c42b38, + 0x03c42b36, + 0x03c42b34, + 0x03c42b33, + 0x03c42b32, + 0x03c42b30, + 0x03c42b2f, + 0x03c42b2d, + 0x03c02b44, + 0x03c02b42, + 0x03c02b40, + 0x03c02b3e, + 0x03c02b3d, + 0x03c02b3b, + 0x03c02b39, + 0x03c02b38, + 0x03c02b36, + 0x03c02b34, + 0x03b02b44, + 0x03b02b42, + 0x03b02b40, + 0x03b02b3e, + 0x03b02b3d, + 0x03b02b3b, + 0x03b02b39, + 0x03b02b38, + 0x03b02b36, + 0x03b02b34, + 0x03b02b33, + 0x03b02b32, + 0x03b02b30, + 0x03b02b2f, + 0x03b02b2d, + 0x03a02b44, + 0x03a02b42, + 0x03a02b40, + 0x03a02b3e, + 0x03a02b3d, + 0x03a02b3b, + 0x03a02b39, + 0x03a02b38, + 0x03a02b36, + 0x03a02b34, + 0x03902b44, + 0x03902b42, + 0x03902b40, + 0x03902b3e, + 0x03902b3d, + 0x03902b3b, + 0x03902b39, + 0x03902b38, + 0x03902b36, + 0x03902b34, + 0x03902b33, + 0x03902b32, + 0x03902b30, + 0x03802b44, + 0x03802b42, + 0x03802b40, + 0x03802b3e, + 0x03802b3d, + 0x03802b3b, + 0x03802b39, + 0x03802b38, + 0x03802b36, + 0x03802b34, + 0x03802b33, + 0x03802b32, + 0x03802b30, + 0x03802b2f, + 0x03802b2d, + 0x03802b2c, + 0x03802b2b, + 0x03802b2a, + 0x03802b29, + 0x03802b27, + 0x03802b26, + 0x03802b25, + 0x03802b24, + 0x03802b23, + 0x03802b22, + 0x03802b21, + 0x03802b20, + 0x03802b1f, + 0x03802b1e, + 0x03802b1e, + 0x03802b1d, + 0x03802b1c, + 0x03802b1b, + 0x03802b1a, + 0x03802b1a, + 0x03802b19, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x03802b18, + 0x00002b00, +}; + +const u32 iq_lut_core0_rev0[] = { + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, +}; + +const u32 iq_lut_core1_rev0[] = { + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, + 0x0000007f, +}; + +const u16 loft_lut_core0_rev0[] = { + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, +}; + +const u16 loft_lut_core1_rev0[] = { + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, + 0x0000, + 0x0101, + 0x0002, + 0x0103, +}; + +const mimophytbl_info_t mimophytbl_info_rev0_volatile[] = { + {&bdi_tbl_rev0, sizeof(bdi_tbl_rev0) / sizeof(bdi_tbl_rev0[0]), 21, 0, + 16} + , + {&pltlut_tbl_rev0, sizeof(pltlut_tbl_rev0) / sizeof(pltlut_tbl_rev0[0]), + 20, 0, 32} + , + {&gainctrl_lut_core0_rev0, + sizeof(gainctrl_lut_core0_rev0) / sizeof(gainctrl_lut_core0_rev0[0]), + 26, 192, 32} + , + {&gainctrl_lut_core1_rev0, + sizeof(gainctrl_lut_core1_rev0) / sizeof(gainctrl_lut_core1_rev0[0]), + 27, 192, 32} + , + + {&est_pwr_lut_core0_rev0, + sizeof(est_pwr_lut_core0_rev0) / sizeof(est_pwr_lut_core0_rev0[0]), 26, + 0, 8} + , + {&est_pwr_lut_core1_rev0, + sizeof(est_pwr_lut_core1_rev0) / sizeof(est_pwr_lut_core1_rev0[0]), 27, + 0, 8} + , + {&adj_pwr_lut_core0_rev0, + sizeof(adj_pwr_lut_core0_rev0) / sizeof(adj_pwr_lut_core0_rev0[0]), 26, + 64, 8} + , + {&adj_pwr_lut_core1_rev0, + sizeof(adj_pwr_lut_core1_rev0) / sizeof(adj_pwr_lut_core1_rev0[0]), 27, + 64, 8} + , + {&iq_lut_core0_rev0, + sizeof(iq_lut_core0_rev0) / sizeof(iq_lut_core0_rev0[0]), 26, 320, 32} + , + {&iq_lut_core1_rev0, + sizeof(iq_lut_core1_rev0) / sizeof(iq_lut_core1_rev0[0]), 27, 320, 32} + , + {&loft_lut_core0_rev0, + sizeof(loft_lut_core0_rev0) / sizeof(loft_lut_core0_rev0[0]), 26, 448, + 16} + , + {&loft_lut_core1_rev0, + sizeof(loft_lut_core1_rev0) / sizeof(loft_lut_core1_rev0[0]), 27, 448, + 16} + , +}; + +const mimophytbl_info_t mimophytbl_info_rev0[] = { + {&frame_struct_rev0, + sizeof(frame_struct_rev0) / sizeof(frame_struct_rev0[0]), 10, 0, 32} + , + {&frame_lut_rev0, sizeof(frame_lut_rev0) / sizeof(frame_lut_rev0[0]), + 24, 0, 8} + , + {&tmap_tbl_rev0, sizeof(tmap_tbl_rev0) / sizeof(tmap_tbl_rev0[0]), 12, + 0, 32} + , + {&tdtrn_tbl_rev0, sizeof(tdtrn_tbl_rev0) / sizeof(tdtrn_tbl_rev0[0]), + 14, 0, 32} + , + {&intlv_tbl_rev0, sizeof(intlv_tbl_rev0) / sizeof(intlv_tbl_rev0[0]), + 13, 0, 32} + , + {&pilot_tbl_rev0, sizeof(pilot_tbl_rev0) / sizeof(pilot_tbl_rev0[0]), + 11, 0, 16} + , + {&tdi_tbl20_ant0_rev0, + sizeof(tdi_tbl20_ant0_rev0) / sizeof(tdi_tbl20_ant0_rev0[0]), 19, 128, + 32} + , + {&tdi_tbl20_ant1_rev0, + sizeof(tdi_tbl20_ant1_rev0) / sizeof(tdi_tbl20_ant1_rev0[0]), 19, 256, + 32} + , + {&tdi_tbl40_ant0_rev0, + sizeof(tdi_tbl40_ant0_rev0) / sizeof(tdi_tbl40_ant0_rev0[0]), 19, 640, + 32} + , + {&tdi_tbl40_ant1_rev0, + sizeof(tdi_tbl40_ant1_rev0) / sizeof(tdi_tbl40_ant1_rev0[0]), 19, 768, + 32} + , + {&chanest_tbl_rev0, + sizeof(chanest_tbl_rev0) / sizeof(chanest_tbl_rev0[0]), 22, 0, 32} + , + {&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0, 8} + , + {&noise_var_tbl0_rev0, + sizeof(noise_var_tbl0_rev0) / sizeof(noise_var_tbl0_rev0[0]), 16, 0, + 32} + , + {&noise_var_tbl1_rev0, + sizeof(noise_var_tbl1_rev0) / sizeof(noise_var_tbl1_rev0[0]), 16, 128, + 32} + , +}; + +const u32 mimophytbl_info_sz_rev0 = + sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]); +const u32 mimophytbl_info_sz_rev0_volatile = + sizeof(mimophytbl_info_rev0_volatile) / + sizeof(mimophytbl_info_rev0_volatile[0]); + +const u16 ant_swctrl_tbl_rev3[] = { + 0x0082, + 0x0082, + 0x0211, + 0x0222, + 0x0328, + 0x0000, + 0x0000, + 0x0000, + 0x0144, + 0x0000, + 0x0000, + 0x0000, + 0x0188, + 0x0000, + 0x0000, + 0x0000, + 0x0082, + 0x0082, + 0x0211, + 0x0222, + 0x0328, + 0x0000, + 0x0000, + 0x0000, + 0x0144, + 0x0000, + 0x0000, + 0x0000, + 0x0188, + 0x0000, + 0x0000, + 0x0000, +}; + +const u16 ant_swctrl_tbl_rev3_1[] = { + 0x0022, + 0x0022, + 0x0011, + 0x0022, + 0x0022, + 0x0000, + 0x0000, + 0x0000, + 0x0011, + 0x0000, + 0x0000, + 0x0000, + 0x0022, + 0x0000, + 0x0000, + 0x0000, + 0x0022, + 0x0022, + 0x0011, + 0x0022, + 0x0022, + 0x0000, + 0x0000, + 0x0000, + 0x0011, + 0x0000, + 0x0000, + 0x0000, + 0x0022, + 0x0000, + 0x0000, + 0x0000, +}; + +const u16 ant_swctrl_tbl_rev3_2[] = { + 0x0088, + 0x0088, + 0x0044, + 0x0088, + 0x0088, + 0x0000, + 0x0000, + 0x0000, + 0x0044, + 0x0000, + 0x0000, + 0x0000, + 0x0088, + 0x0000, + 0x0000, + 0x0000, + 0x0088, + 0x0088, + 0x0044, + 0x0088, + 0x0088, + 0x0000, + 0x0000, + 0x0000, + 0x0044, + 0x0000, + 0x0000, + 0x0000, + 0x0088, + 0x0000, + 0x0000, + 0x0000, +}; + +const u16 ant_swctrl_tbl_rev3_3[] = { + 0x022, + 0x022, + 0x011, + 0x022, + 0x000, + 0x000, + 0x000, + 0x000, + 0x011, + 0x000, + 0x000, + 0x000, + 0x022, + 0x000, + 0x000, + 0x3cc, + 0x022, + 0x022, + 0x011, + 0x022, + 0x000, + 0x000, + 0x000, + 0x000, + 0x011, + 0x000, + 0x000, + 0x000, + 0x022, + 0x000, + 0x000, + 0x3cc +}; + +const u32 frame_struct_rev3[] = { + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x09804506, + 0x00100030, + 0x09804507, + 0x00100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a0c, + 0x00100004, + 0x01000a0d, + 0x00100024, + 0x0980450e, + 0x00100034, + 0x0980450f, + 0x00100034, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a04, + 0x00100000, + 0x11008a05, + 0x00100020, + 0x1980c506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x01800504, + 0x00100030, + 0x11808505, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000a04, + 0x00100000, + 0x11008a05, + 0x00100020, + 0x21810506, + 0x00100030, + 0x21810506, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x1980c50e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x0180050c, + 0x00100038, + 0x1180850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x1980c506, + 0x00100030, + 0x1980c506, + 0x00100030, + 0x11808504, + 0x00100030, + 0x3981ca05, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x10008a04, + 0x00100000, + 0x3981ca05, + 0x00100030, + 0x1980c506, + 0x00100030, + 0x29814507, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a0c, + 0x00100008, + 0x01000a0d, + 0x00100028, + 0x1980c50e, + 0x00100038, + 0x1980c50e, + 0x00100038, + 0x1180850c, + 0x00100038, + 0x3981ca0d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x10008a0c, + 0x00100008, + 0x3981ca0d, + 0x00100038, + 0x1980c50e, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x02001405, + 0x00100040, + 0x0b004a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x43020a04, + 0x00100060, + 0x1b00ca05, + 0x00100060, + 0x23010a07, + 0x01500060, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x13008a06, + 0x01900060, + 0x13008a06, + 0x01900060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x0200140d, + 0x00100050, + 0x0b004a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x50029404, + 0x00100000, + 0x32019405, + 0x00100040, + 0x0b004a06, + 0x01900060, + 0x0b004a06, + 0x01900060, + 0x5b02ca04, + 0x00100060, + 0x3b01d405, + 0x00100060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x5802d404, + 0x00100000, + 0x3b01d405, + 0x00100060, + 0x0b004a06, + 0x01900060, + 0x23010a07, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x5002940c, + 0x00100010, + 0x3201940d, + 0x00100050, + 0x0b004a0e, + 0x01900070, + 0x0b004a0e, + 0x01900070, + 0x5b02ca0c, + 0x00100070, + 0x3b01d40d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x5802d40c, + 0x00100010, + 0x3b01d40d, + 0x00100070, + 0x0b004a0e, + 0x01900070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x000f4800, + 0x62031405, + 0x00100040, + 0x53028a06, + 0x01900060, + 0x53028a07, + 0x01900060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x000f4808, + 0x6203140d, + 0x00100048, + 0x53028a0e, + 0x01900068, + 0x53028a0f, + 0x01900068, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100004, + 0x11008a0d, + 0x00100024, + 0x1980c50e, + 0x00100034, + 0x2181050e, + 0x00100034, + 0x2181050e, + 0x00100034, + 0x0180050c, + 0x00100038, + 0x1180850d, + 0x00100038, + 0x1181850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000a0c, + 0x00100008, + 0x11008a0d, + 0x00100028, + 0x2181050e, + 0x00100038, + 0x2181050e, + 0x00100038, + 0x1181850d, + 0x00100038, + 0x2981450f, + 0x01100038, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x08004a04, + 0x00100000, + 0x01000a05, + 0x00100020, + 0x0180c506, + 0x00100030, + 0x0180c506, + 0x00100030, + 0x2180c50c, + 0x00100030, + 0x49820a0d, + 0x0016a130, + 0x41824a0d, + 0x0016a130, + 0x2981450f, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x2000ca0c, + 0x00100000, + 0x49820a0d, + 0x0016a130, + 0x1980c50e, + 0x00100030, + 0x41824a0d, + 0x0016a130, + 0x2981450f, + 0x01100030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100008, + 0x0200140d, + 0x00100048, + 0x0b004a0e, + 0x01900068, + 0x13008a0e, + 0x01900068, + 0x13008a0e, + 0x01900068, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x1b014a0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x13008a0e, + 0x01900070, + 0x13008a0e, + 0x01900070, + 0x1b014a0d, + 0x00100070, + 0x23010a0f, + 0x01500070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x50029404, + 0x00100000, + 0x32019405, + 0x00100040, + 0x03004a06, + 0x01900060, + 0x03004a06, + 0x01900060, + 0x6b030a0c, + 0x00100060, + 0x4b02140d, + 0x0016a160, + 0x4302540d, + 0x0016a160, + 0x23010a0f, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x6b03140c, + 0x00100060, + 0x4b02140d, + 0x0016a160, + 0x0b004a0e, + 0x01900060, + 0x4302540d, + 0x0016a160, + 0x23010a0f, + 0x01500060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x53028a06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x43020a04, + 0x00100060, + 0x1b00ca05, + 0x00100060, + 0x53028a07, + 0x0190c060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x53028a0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x43020a0c, + 0x00100070, + 0x1b00ca0d, + 0x00100070, + 0x53028a0f, + 0x0190c070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x40021404, + 0x00100000, + 0x1a00d405, + 0x00100040, + 0x5b02ca06, + 0x01900060, + 0x5b02ca06, + 0x01900060, + 0x53028a07, + 0x0190c060, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x4002140c, + 0x00100010, + 0x1a00d40d, + 0x00100050, + 0x5b02ca0e, + 0x01900070, + 0x5b02ca0e, + 0x01900070, + 0x53028a0f, + 0x0190c070, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u16 pilot_tbl_rev3[] = { + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0xff08, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0x80d5, + 0xff0a, + 0xff82, + 0xffa0, + 0xff28, + 0xffff, + 0xffff, + 0xffff, + 0xffff, + 0xff82, + 0xffa0, + 0xff28, + 0xff0a, + 0xffff, + 0xffff, + 0xffff, + 0xffff, + 0xf83f, + 0xfa1f, + 0xfa97, + 0xfab5, + 0xf2bd, + 0xf0bf, + 0xffff, + 0xffff, + 0xf017, + 0xf815, + 0xf215, + 0xf095, + 0xf035, + 0xf01d, + 0xffff, + 0xffff, + 0xff08, + 0xff02, + 0xff80, + 0xff20, + 0xff08, + 0xff02, + 0xff80, + 0xff20, + 0xf01f, + 0xf817, + 0xfa15, + 0xf295, + 0xf0b5, + 0xf03d, + 0xffff, + 0xffff, + 0xf82a, + 0xfa0a, + 0xfa82, + 0xfaa0, + 0xf2a8, + 0xf0aa, + 0xffff, + 0xffff, + 0xf002, + 0xf800, + 0xf200, + 0xf080, + 0xf020, + 0xf008, + 0xffff, + 0xffff, + 0xf00a, + 0xf802, + 0xfa00, + 0xf280, + 0xf0a0, + 0xf028, + 0xffff, + 0xffff, +}; + +const u32 tmap_tbl_rev3[] = { + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x000aa888, + 0x88880000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00011111, + 0x11110000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00088aaa, + 0xaaaa0000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xaaa8aaa0, + 0x8aaa8aaa, + 0xaa8a8a8a, + 0x000aaa88, + 0x8aaa0000, + 0xaaa8a888, + 0x8aa88a8a, + 0x8a88a888, + 0x08080a00, + 0x0a08080a, + 0x080a0a08, + 0x00080808, + 0x080a0000, + 0x080a0808, + 0x080a0808, + 0x0a0a0a08, + 0xa0a0a0a0, + 0x80a0a080, + 0x8080a0a0, + 0x00008080, + 0x80a00000, + 0x80a080a0, + 0xa080a0a0, + 0x8080a0a0, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x99999000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x22000000, + 0x2222b222, + 0x22222222, + 0x222222b2, + 0xb2222220, + 0x22222222, + 0x22d22222, + 0x00000222, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x33000000, + 0x3333b333, + 0x33333333, + 0x333333b3, + 0xb3333330, + 0x33333333, + 0x33d33333, + 0x00000333, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x99b99b00, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb99, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x22222200, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0x22222222, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x11111111, + 0xf1111111, + 0x11111111, + 0x11f11111, + 0x01111111, + 0xbb9bb900, + 0xb9b9bb99, + 0xb99bbbbb, + 0xbbbb9b9b, + 0xb9bb99bb, + 0xb99999b9, + 0xb9b9b99b, + 0x00000bbb, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88aa, + 0xa88888a8, + 0xa8a8a88a, + 0x0a888aaa, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00000aaa, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0xbbbbbb00, + 0x999bbbbb, + 0x9bb99b9b, + 0xb9b9b9bb, + 0xb9b99bbb, + 0xb9b9b9bb, + 0xb9bb9b99, + 0x00000999, + 0x8a000000, + 0xaa88a888, + 0xa88888aa, + 0xa88a8a88, + 0xa88aa88a, + 0x88a8aaaa, + 0xa8aa8aaa, + 0x0888a88a, + 0x0b0b0b00, + 0x090b0b0b, + 0x0b090b0b, + 0x0909090b, + 0x09090b0b, + 0x09090b0b, + 0x09090b09, + 0x00000909, + 0x0a000000, + 0x0a080808, + 0x080a080a, + 0x080a0a08, + 0x080a080a, + 0x0808080a, + 0x0a0a0a08, + 0x0808080a, + 0xb0b0b000, + 0x9090b0b0, + 0x90b09090, + 0xb0b0b090, + 0xb0b090b0, + 0x90b0b0b0, + 0xb0b09090, + 0x00000090, + 0x80000000, + 0xa080a080, + 0xa08080a0, + 0xa0808080, + 0xa080a080, + 0x80a0a0a0, + 0xa0a080a0, + 0x00a0a0a0, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x33000000, + 0x3333f333, + 0x33333333, + 0x333333f3, + 0xf3333330, + 0x33333333, + 0x33f33333, + 0x00000333, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x99000000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88888000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x88a88a00, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 intlv_tbl_rev3[] = { + 0x00802070, + 0x0671188d, + 0x0a60192c, + 0x0a300e46, + 0x00c1188d, + 0x080024d2, + 0x00000070, +}; + +const u32 tdtrn_tbl_rev3[] = { + 0x061c061c, + 0x0050ee68, + 0xf592fe36, + 0xfe5212f6, + 0x00000c38, + 0xfe5212f6, + 0xf592fe36, + 0x0050ee68, + 0x061c061c, + 0xee680050, + 0xfe36f592, + 0x12f6fe52, + 0x0c380000, + 0x12f6fe52, + 0xfe36f592, + 0xee680050, + 0x061c061c, + 0x0050ee68, + 0xf592fe36, + 0xfe5212f6, + 0x00000c38, + 0xfe5212f6, + 0xf592fe36, + 0x0050ee68, + 0x061c061c, + 0xee680050, + 0xfe36f592, + 0x12f6fe52, + 0x0c380000, + 0x12f6fe52, + 0xfe36f592, + 0xee680050, + 0x05e305e3, + 0x004def0c, + 0xf5f3fe47, + 0xfe611246, + 0x00000bc7, + 0xfe611246, + 0xf5f3fe47, + 0x004def0c, + 0x05e305e3, + 0xef0c004d, + 0xfe47f5f3, + 0x1246fe61, + 0x0bc70000, + 0x1246fe61, + 0xfe47f5f3, + 0xef0c004d, + 0x05e305e3, + 0x004def0c, + 0xf5f3fe47, + 0xfe611246, + 0x00000bc7, + 0xfe611246, + 0xf5f3fe47, + 0x004def0c, + 0x05e305e3, + 0xef0c004d, + 0xfe47f5f3, + 0x1246fe61, + 0x0bc70000, + 0x1246fe61, + 0xfe47f5f3, + 0xef0c004d, + 0xfa58fa58, + 0xf895043b, + 0xff4c09c0, + 0xfbc6ffa8, + 0xfb84f384, + 0x0798f6f9, + 0x05760122, + 0x058409f6, + 0x0b500000, + 0x05b7f542, + 0x08860432, + 0x06ddfee7, + 0xfb84f384, + 0xf9d90664, + 0xf7e8025c, + 0x00fff7bd, + 0x05a805a8, + 0xf7bd00ff, + 0x025cf7e8, + 0x0664f9d9, + 0xf384fb84, + 0xfee706dd, + 0x04320886, + 0xf54205b7, + 0x00000b50, + 0x09f60584, + 0x01220576, + 0xf6f90798, + 0xf384fb84, + 0xffa8fbc6, + 0x09c0ff4c, + 0x043bf895, + 0x02d402d4, + 0x07de0270, + 0xfc96079c, + 0xf90afe94, + 0xfe00ff2c, + 0x02d4065d, + 0x092a0096, + 0x0014fbb8, + 0xfd2cfd2c, + 0x076afb3c, + 0x0096f752, + 0xf991fd87, + 0xfb2c0200, + 0xfeb8f960, + 0x08e0fc96, + 0x049802a8, + 0xfd2cfd2c, + 0x02a80498, + 0xfc9608e0, + 0xf960feb8, + 0x0200fb2c, + 0xfd87f991, + 0xf7520096, + 0xfb3c076a, + 0xfd2cfd2c, + 0xfbb80014, + 0x0096092a, + 0x065d02d4, + 0xff2cfe00, + 0xfe94f90a, + 0x079cfc96, + 0x027007de, + 0x02d402d4, + 0x027007de, + 0x079cfc96, + 0xfe94f90a, + 0xff2cfe00, + 0x065d02d4, + 0x0096092a, + 0xfbb80014, + 0xfd2cfd2c, + 0xfb3c076a, + 0xf7520096, + 0xfd87f991, + 0x0200fb2c, + 0xf960feb8, + 0xfc9608e0, + 0x02a80498, + 0xfd2cfd2c, + 0x049802a8, + 0x08e0fc96, + 0xfeb8f960, + 0xfb2c0200, + 0xf991fd87, + 0x0096f752, + 0x076afb3c, + 0xfd2cfd2c, + 0x0014fbb8, + 0x092a0096, + 0x02d4065d, + 0xfe00ff2c, + 0xf90afe94, + 0xfc96079c, + 0x07de0270, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x062a0000, + 0xfefa0759, + 0x08b80908, + 0xf396fc2d, + 0xf9d6045c, + 0xfc4ef608, + 0xf748f596, + 0x07b207bf, + 0x062a062a, + 0xf84ef841, + 0xf748f596, + 0x03b209f8, + 0xf9d6045c, + 0x0c6a03d3, + 0x08b80908, + 0x0106f8a7, + 0x062a0000, + 0xfefaf8a7, + 0x08b8f6f8, + 0xf39603d3, + 0xf9d6fba4, + 0xfc4e09f8, + 0xf7480a6a, + 0x07b2f841, + 0x062af9d6, + 0xf84e07bf, + 0xf7480a6a, + 0x03b2f608, + 0xf9d6fba4, + 0x0c6afc2d, + 0x08b8f6f8, + 0x01060759, + 0x062a0000, + 0xfefa0759, + 0x08b80908, + 0xf396fc2d, + 0xf9d6045c, + 0xfc4ef608, + 0xf748f596, + 0x07b207bf, + 0x062a062a, + 0xf84ef841, + 0xf748f596, + 0x03b209f8, + 0xf9d6045c, + 0x0c6a03d3, + 0x08b80908, + 0x0106f8a7, + 0x062a0000, + 0xfefaf8a7, + 0x08b8f6f8, + 0xf39603d3, + 0xf9d6fba4, + 0xfc4e09f8, + 0xf7480a6a, + 0x07b2f841, + 0x062af9d6, + 0xf84e07bf, + 0xf7480a6a, + 0x03b2f608, + 0xf9d6fba4, + 0x0c6afc2d, + 0x08b8f6f8, + 0x01060759, + 0x061c061c, + 0xff30009d, + 0xffb21141, + 0xfd87fb54, + 0xf65dfe59, + 0x02eef99e, + 0x0166f03c, + 0xfff809b6, + 0x000008a4, + 0x000af42b, + 0x00eff577, + 0xfa840bf2, + 0xfc02ff51, + 0x08260f67, + 0xfff0036f, + 0x0842f9c3, + 0x00000000, + 0x063df7be, + 0xfc910010, + 0xf099f7da, + 0x00af03fe, + 0xf40e057c, + 0x0a89ff11, + 0x0bd5fff6, + 0xf75c0000, + 0xf64a0008, + 0x0fc4fe9a, + 0x0662fd12, + 0x01a709a3, + 0x04ac0279, + 0xeebf004e, + 0xff6300d0, + 0xf9e4f9e4, + 0x00d0ff63, + 0x004eeebf, + 0x027904ac, + 0x09a301a7, + 0xfd120662, + 0xfe9a0fc4, + 0x0008f64a, + 0x0000f75c, + 0xfff60bd5, + 0xff110a89, + 0x057cf40e, + 0x03fe00af, + 0xf7daf099, + 0x0010fc91, + 0xf7be063d, + 0x00000000, + 0xf9c30842, + 0x036ffff0, + 0x0f670826, + 0xff51fc02, + 0x0bf2fa84, + 0xf57700ef, + 0xf42b000a, + 0x08a40000, + 0x09b6fff8, + 0xf03c0166, + 0xf99e02ee, + 0xfe59f65d, + 0xfb54fd87, + 0x1141ffb2, + 0x009dff30, + 0x05e30000, + 0xff060705, + 0x085408a0, + 0xf425fc59, + 0xfa1d042a, + 0xfc78f67a, + 0xf7acf60e, + 0x075a0766, + 0x05e305e3, + 0xf8a6f89a, + 0xf7acf60e, + 0x03880986, + 0xfa1d042a, + 0x0bdb03a7, + 0x085408a0, + 0x00faf8fb, + 0x05e30000, + 0xff06f8fb, + 0x0854f760, + 0xf42503a7, + 0xfa1dfbd6, + 0xfc780986, + 0xf7ac09f2, + 0x075af89a, + 0x05e3fa1d, + 0xf8a60766, + 0xf7ac09f2, + 0x0388f67a, + 0xfa1dfbd6, + 0x0bdbfc59, + 0x0854f760, + 0x00fa0705, + 0x05e30000, + 0xff060705, + 0x085408a0, + 0xf425fc59, + 0xfa1d042a, + 0xfc78f67a, + 0xf7acf60e, + 0x075a0766, + 0x05e305e3, + 0xf8a6f89a, + 0xf7acf60e, + 0x03880986, + 0xfa1d042a, + 0x0bdb03a7, + 0x085408a0, + 0x00faf8fb, + 0x05e30000, + 0xff06f8fb, + 0x0854f760, + 0xf42503a7, + 0xfa1dfbd6, + 0xfc780986, + 0xf7ac09f2, + 0x075af89a, + 0x05e3fa1d, + 0xf8a60766, + 0xf7ac09f2, + 0x0388f67a, + 0xfa1dfbd6, + 0x0bdbfc59, + 0x0854f760, + 0x00fa0705, + 0xfa58fa58, + 0xf8f0fe00, + 0x0448073d, + 0xfdc9fe46, + 0xf9910258, + 0x089d0407, + 0xfd5cf71a, + 0x02affde0, + 0x083e0496, + 0xff5a0740, + 0xff7afd97, + 0x00fe01f1, + 0x0009082e, + 0xfa94ff75, + 0xfecdf8ea, + 0xffb0f693, + 0xfd2cfa58, + 0x0433ff16, + 0xfba405dd, + 0xfa610341, + 0x06a606cb, + 0x0039fd2d, + 0x0677fa97, + 0x01fa05e0, + 0xf896003e, + 0x075a068b, + 0x012cfc3e, + 0xfa23f98d, + 0xfc7cfd43, + 0xff90fc0d, + 0x01c10982, + 0x00c601d6, + 0xfd2cfd2c, + 0x01d600c6, + 0x098201c1, + 0xfc0dff90, + 0xfd43fc7c, + 0xf98dfa23, + 0xfc3e012c, + 0x068b075a, + 0x003ef896, + 0x05e001fa, + 0xfa970677, + 0xfd2d0039, + 0x06cb06a6, + 0x0341fa61, + 0x05ddfba4, + 0xff160433, + 0xfa58fd2c, + 0xf693ffb0, + 0xf8eafecd, + 0xff75fa94, + 0x082e0009, + 0x01f100fe, + 0xfd97ff7a, + 0x0740ff5a, + 0x0496083e, + 0xfde002af, + 0xf71afd5c, + 0x0407089d, + 0x0258f991, + 0xfe46fdc9, + 0x073d0448, + 0xfe00f8f0, + 0xfd2cfd2c, + 0xfce00500, + 0xfc09fddc, + 0xfe680157, + 0x04c70571, + 0xfc3aff21, + 0xfcd70228, + 0x056d0277, + 0x0200fe00, + 0x0022f927, + 0xfe3c032b, + 0xfc44ff3c, + 0x03e9fbdb, + 0x04570313, + 0x04c9ff5c, + 0x000d03b8, + 0xfa580000, + 0xfbe900d2, + 0xf9d0fe0b, + 0x0125fdf9, + 0x042501bf, + 0x0328fa2b, + 0xffa902f0, + 0xfa250157, + 0x0200fe00, + 0x03740438, + 0xff0405fd, + 0x030cfe52, + 0x0037fb39, + 0xff6904c5, + 0x04f8fd23, + 0xfd31fc1b, + 0xfd2cfd2c, + 0xfc1bfd31, + 0xfd2304f8, + 0x04c5ff69, + 0xfb390037, + 0xfe52030c, + 0x05fdff04, + 0x04380374, + 0xfe000200, + 0x0157fa25, + 0x02f0ffa9, + 0xfa2b0328, + 0x01bf0425, + 0xfdf90125, + 0xfe0bf9d0, + 0x00d2fbe9, + 0x0000fa58, + 0x03b8000d, + 0xff5c04c9, + 0x03130457, + 0xfbdb03e9, + 0xff3cfc44, + 0x032bfe3c, + 0xf9270022, + 0xfe000200, + 0x0277056d, + 0x0228fcd7, + 0xff21fc3a, + 0x057104c7, + 0x0157fe68, + 0xfddcfc09, + 0x0500fce0, + 0xfd2cfd2c, + 0x0500fce0, + 0xfddcfc09, + 0x0157fe68, + 0x057104c7, + 0xff21fc3a, + 0x0228fcd7, + 0x0277056d, + 0xfe000200, + 0xf9270022, + 0x032bfe3c, + 0xff3cfc44, + 0xfbdb03e9, + 0x03130457, + 0xff5c04c9, + 0x03b8000d, + 0x0000fa58, + 0x00d2fbe9, + 0xfe0bf9d0, + 0xfdf90125, + 0x01bf0425, + 0xfa2b0328, + 0x02f0ffa9, + 0x0157fa25, + 0xfe000200, + 0x04380374, + 0x05fdff04, + 0xfe52030c, + 0xfb390037, + 0x04c5ff69, + 0xfd2304f8, + 0xfc1bfd31, + 0xfd2cfd2c, + 0xfd31fc1b, + 0x04f8fd23, + 0xff6904c5, + 0x0037fb39, + 0x030cfe52, + 0xff0405fd, + 0x03740438, + 0x0200fe00, + 0xfa250157, + 0xffa902f0, + 0x0328fa2b, + 0x042501bf, + 0x0125fdf9, + 0xf9d0fe0b, + 0xfbe900d2, + 0xfa580000, + 0x000d03b8, + 0x04c9ff5c, + 0x04570313, + 0x03e9fbdb, + 0xfc44ff3c, + 0xfe3c032b, + 0x0022f927, + 0x0200fe00, + 0x056d0277, + 0xfcd70228, + 0xfc3aff21, + 0x04c70571, + 0xfe680157, + 0xfc09fddc, + 0xfce00500, + 0x05a80000, + 0xff1006be, + 0x0800084a, + 0xf49cfc7e, + 0xfa580400, + 0xfc9cf6da, + 0xf800f672, + 0x0710071c, + 0x05a805a8, + 0xf8f0f8e4, + 0xf800f672, + 0x03640926, + 0xfa580400, + 0x0b640382, + 0x0800084a, + 0x00f0f942, + 0x05a80000, + 0xff10f942, + 0x0800f7b6, + 0xf49c0382, + 0xfa58fc00, + 0xfc9c0926, + 0xf800098e, + 0x0710f8e4, + 0x05a8fa58, + 0xf8f0071c, + 0xf800098e, + 0x0364f6da, + 0xfa58fc00, + 0x0b64fc7e, + 0x0800f7b6, + 0x00f006be, + 0x05a80000, + 0xff1006be, + 0x0800084a, + 0xf49cfc7e, + 0xfa580400, + 0xfc9cf6da, + 0xf800f672, + 0x0710071c, + 0x05a805a8, + 0xf8f0f8e4, + 0xf800f672, + 0x03640926, + 0xfa580400, + 0x0b640382, + 0x0800084a, + 0x00f0f942, + 0x05a80000, + 0xff10f942, + 0x0800f7b6, + 0xf49c0382, + 0xfa58fc00, + 0xfc9c0926, + 0xf800098e, + 0x0710f8e4, + 0x05a8fa58, + 0xf8f0071c, + 0xf800098e, + 0x0364f6da, + 0xfa58fc00, + 0x0b64fc7e, + 0x0800f7b6, + 0x00f006be, +}; + +const u32 noise_var_tbl_rev3[] = { + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, + 0x02110211, + 0x0000014d, +}; + +const u16 mcs_tbl_rev3[] = { + 0x0000, + 0x0008, + 0x000a, + 0x0010, + 0x0012, + 0x0019, + 0x001a, + 0x001c, + 0x0080, + 0x0088, + 0x008a, + 0x0090, + 0x0092, + 0x0099, + 0x009a, + 0x009c, + 0x0100, + 0x0108, + 0x010a, + 0x0110, + 0x0112, + 0x0119, + 0x011a, + 0x011c, + 0x0180, + 0x0188, + 0x018a, + 0x0190, + 0x0192, + 0x0199, + 0x019a, + 0x019c, + 0x0000, + 0x0098, + 0x00a0, + 0x00a8, + 0x009a, + 0x00a2, + 0x00aa, + 0x0120, + 0x0128, + 0x0128, + 0x0130, + 0x0138, + 0x0138, + 0x0140, + 0x0122, + 0x012a, + 0x012a, + 0x0132, + 0x013a, + 0x013a, + 0x0142, + 0x01a8, + 0x01b0, + 0x01b8, + 0x01b0, + 0x01b8, + 0x01c0, + 0x01c8, + 0x01c0, + 0x01c8, + 0x01d0, + 0x01d0, + 0x01d8, + 0x01aa, + 0x01b2, + 0x01ba, + 0x01b2, + 0x01ba, + 0x01c2, + 0x01ca, + 0x01c2, + 0x01ca, + 0x01d2, + 0x01d2, + 0x01da, + 0x0001, + 0x0002, + 0x0004, + 0x0009, + 0x000c, + 0x0011, + 0x0014, + 0x0018, + 0x0020, + 0x0021, + 0x0022, + 0x0024, + 0x0081, + 0x0082, + 0x0084, + 0x0089, + 0x008c, + 0x0091, + 0x0094, + 0x0098, + 0x00a0, + 0x00a1, + 0x00a2, + 0x00a4, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, + 0x0007, +}; + +const u32 tdi_tbl20_ant0_rev3[] = { + 0x00091226, + 0x000a1429, + 0x000b56ad, + 0x000c58b0, + 0x000d5ab3, + 0x000e9cb6, + 0x000f9eba, + 0x0000c13d, + 0x00020301, + 0x00030504, + 0x00040708, + 0x0005090b, + 0x00064b8e, + 0x00095291, + 0x000a5494, + 0x000b9718, + 0x000c9927, + 0x000d9b2a, + 0x000edd2e, + 0x000fdf31, + 0x000101b4, + 0x000243b7, + 0x000345bb, + 0x000447be, + 0x00058982, + 0x00068c05, + 0x00099309, + 0x000a950c, + 0x000bd78f, + 0x000cd992, + 0x000ddb96, + 0x000f1d99, + 0x00005fa8, + 0x0001422c, + 0x0002842f, + 0x00038632, + 0x00048835, + 0x0005ca38, + 0x0006ccbc, + 0x0009d3bf, + 0x000b1603, + 0x000c1806, + 0x000d1a0a, + 0x000e1c0d, + 0x000f5e10, + 0x00008093, + 0x00018297, + 0x0002c49a, + 0x0003c680, + 0x0004c880, + 0x00060b00, + 0x00070d00, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl20_ant1_rev3[] = { + 0x00014b26, + 0x00028d29, + 0x000393ad, + 0x00049630, + 0x0005d833, + 0x0006da36, + 0x00099c3a, + 0x000a9e3d, + 0x000bc081, + 0x000cc284, + 0x000dc488, + 0x000f068b, + 0x0000488e, + 0x00018b91, + 0x0002d214, + 0x0003d418, + 0x0004d6a7, + 0x000618aa, + 0x00071aae, + 0x0009dcb1, + 0x000b1eb4, + 0x000c0137, + 0x000d033b, + 0x000e053e, + 0x000f4702, + 0x00008905, + 0x00020c09, + 0x0003128c, + 0x0004148f, + 0x00051712, + 0x00065916, + 0x00091b19, + 0x000a1d28, + 0x000b5f2c, + 0x000c41af, + 0x000d43b2, + 0x000e85b5, + 0x000f87b8, + 0x0000c9bc, + 0x00024cbf, + 0x00035303, + 0x00045506, + 0x0005978a, + 0x0006998d, + 0x00095b90, + 0x000a5d93, + 0x000b9f97, + 0x000c821a, + 0x000d8400, + 0x000ec600, + 0x000fc800, + 0x00010a00, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl40_ant0_rev3[] = { + 0x0011a346, + 0x00136ccf, + 0x0014f5d9, + 0x001641e2, + 0x0017cb6b, + 0x00195475, + 0x001b2383, + 0x001cad0c, + 0x001e7616, + 0x0000821f, + 0x00020ba8, + 0x0003d4b2, + 0x00056447, + 0x00072dd0, + 0x0008b6da, + 0x000a02e3, + 0x000b8c6c, + 0x000d15f6, + 0x0011e484, + 0x0013ae0d, + 0x00153717, + 0x00168320, + 0x00180ca9, + 0x00199633, + 0x001b6548, + 0x001ceed1, + 0x001eb7db, + 0x0000c3e4, + 0x00024d6d, + 0x000416f7, + 0x0005a585, + 0x00076f0f, + 0x0008f818, + 0x000a4421, + 0x000bcdab, + 0x000d9734, + 0x00122649, + 0x0013efd2, + 0x001578dc, + 0x0016c4e5, + 0x00184e6e, + 0x001a17f8, + 0x001ba686, + 0x001d3010, + 0x001ef999, + 0x00010522, + 0x00028eac, + 0x00045835, + 0x0005e74a, + 0x0007b0d3, + 0x00093a5d, + 0x000a85e6, + 0x000c0f6f, + 0x000dd8f9, + 0x00126787, + 0x00143111, + 0x0015ba9a, + 0x00170623, + 0x00188fad, + 0x001a5936, + 0x001be84b, + 0x001db1d4, + 0x001f3b5e, + 0x000146e7, + 0x00031070, + 0x000499fa, + 0x00062888, + 0x0007f212, + 0x00097b9b, + 0x000ac7a4, + 0x000c50ae, + 0x000e1a37, + 0x0012a94c, + 0x001472d5, + 0x0015fc5f, + 0x00174868, + 0x0018d171, + 0x001a9afb, + 0x001c2989, + 0x001df313, + 0x001f7c9c, + 0x000188a5, + 0x000351af, + 0x0004db38, + 0x0006aa4d, + 0x000833d7, + 0x0009bd60, + 0x000b0969, + 0x000c9273, + 0x000e5bfc, + 0x00132a8a, + 0x0014b414, + 0x00163d9d, + 0x001789a6, + 0x001912b0, + 0x001adc39, + 0x001c6bce, + 0x001e34d8, + 0x001fbe61, + 0x0001ca6a, + 0x00039374, + 0x00051cfd, + 0x0006ec0b, + 0x00087515, + 0x0009fe9e, + 0x000b4aa7, + 0x000cd3b1, + 0x000e9d3a, + 0x00000000, + 0x00000000, +}; + +const u32 tdi_tbl40_ant1_rev3[] = { + 0x001edb36, + 0x000129ca, + 0x0002b353, + 0x00047cdd, + 0x0005c8e6, + 0x000791ef, + 0x00091bf9, + 0x000aaa07, + 0x000c3391, + 0x000dfd1a, + 0x00120923, + 0x0013d22d, + 0x00155c37, + 0x0016eacb, + 0x00187454, + 0x001a3dde, + 0x001b89e7, + 0x001d12f0, + 0x001f1cfa, + 0x00016b88, + 0x00033492, + 0x0004be1b, + 0x00060a24, + 0x0007d32e, + 0x00095d38, + 0x000aec4c, + 0x000c7555, + 0x000e3edf, + 0x00124ae8, + 0x001413f1, + 0x0015a37b, + 0x00172c89, + 0x0018b593, + 0x001a419c, + 0x001bcb25, + 0x001d942f, + 0x001f63b9, + 0x0001ad4d, + 0x00037657, + 0x0004c260, + 0x00068be9, + 0x000814f3, + 0x0009a47c, + 0x000b2d8a, + 0x000cb694, + 0x000e429d, + 0x00128c26, + 0x001455b0, + 0x0015e4ba, + 0x00176e4e, + 0x0018f758, + 0x001a8361, + 0x001c0cea, + 0x001dd674, + 0x001fa57d, + 0x0001ee8b, + 0x0003b795, + 0x0005039e, + 0x0006cd27, + 0x000856b1, + 0x0009e5c6, + 0x000b6f4f, + 0x000cf859, + 0x000e8462, + 0x00130deb, + 0x00149775, + 0x00162603, + 0x0017af8c, + 0x00193896, + 0x001ac49f, + 0x001c4e28, + 0x001e17b2, + 0x0000a6c7, + 0x00023050, + 0x0003f9da, + 0x00054563, + 0x00070eec, + 0x00089876, + 0x000a2704, + 0x000bb08d, + 0x000d3a17, + 0x001185a0, + 0x00134f29, + 0x0014d8b3, + 0x001667c8, + 0x0017f151, + 0x00197adb, + 0x001b0664, + 0x001c8fed, + 0x001e5977, + 0x0000e805, + 0x0002718f, + 0x00043b18, + 0x000586a1, + 0x0007502b, + 0x0008d9b4, + 0x000a68c9, + 0x000bf252, + 0x000dbbdc, + 0x0011c7e5, + 0x001390ee, + 0x00151a78, + 0x0016a906, + 0x00183290, + 0x0019bc19, + 0x001b4822, + 0x001cd12c, + 0x001e9ab5, + 0x00000000, + 0x00000000, +}; + +const u32 pltlut_tbl_rev3[] = { + 0x76540213, + 0x62407351, + 0x76543210, + 0x76540213, + 0x76540213, + 0x76430521, +}; + +const u32 chanest_tbl_rev3[] = { + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x44444444, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, + 0x10101010, +}; + +const u8 frame_lut_rev3[] = { + 0x02, + 0x04, + 0x14, + 0x14, + 0x03, + 0x05, + 0x16, + 0x16, + 0x0a, + 0x0c, + 0x1c, + 0x1c, + 0x0b, + 0x0d, + 0x1e, + 0x1e, + 0x06, + 0x08, + 0x18, + 0x18, + 0x07, + 0x09, + 0x1a, + 0x1a, + 0x0e, + 0x10, + 0x20, + 0x28, + 0x0f, + 0x11, + 0x22, + 0x2a, +}; + +const u8 est_pwr_lut_core0_rev3[] = { + 0x55, + 0x54, + 0x54, + 0x53, + 0x52, + 0x52, + 0x51, + 0x51, + 0x50, + 0x4f, + 0x4f, + 0x4e, + 0x4e, + 0x4d, + 0x4c, + 0x4c, + 0x4b, + 0x4a, + 0x49, + 0x49, + 0x48, + 0x47, + 0x46, + 0x46, + 0x45, + 0x44, + 0x43, + 0x42, + 0x41, + 0x40, + 0x40, + 0x3f, + 0x3e, + 0x3d, + 0x3c, + 0x3a, + 0x39, + 0x38, + 0x37, + 0x36, + 0x35, + 0x33, + 0x32, + 0x31, + 0x2f, + 0x2e, + 0x2c, + 0x2b, + 0x29, + 0x27, + 0x25, + 0x23, + 0x21, + 0x1f, + 0x1d, + 0x1a, + 0x18, + 0x15, + 0x12, + 0x0e, + 0x0b, + 0x07, + 0x02, + 0xfd, +}; + +const u8 est_pwr_lut_core1_rev3[] = { + 0x55, + 0x54, + 0x54, + 0x53, + 0x52, + 0x52, + 0x51, + 0x51, + 0x50, + 0x4f, + 0x4f, + 0x4e, + 0x4e, + 0x4d, + 0x4c, + 0x4c, + 0x4b, + 0x4a, + 0x49, + 0x49, + 0x48, + 0x47, + 0x46, + 0x46, + 0x45, + 0x44, + 0x43, + 0x42, + 0x41, + 0x40, + 0x40, + 0x3f, + 0x3e, + 0x3d, + 0x3c, + 0x3a, + 0x39, + 0x38, + 0x37, + 0x36, + 0x35, + 0x33, + 0x32, + 0x31, + 0x2f, + 0x2e, + 0x2c, + 0x2b, + 0x29, + 0x27, + 0x25, + 0x23, + 0x21, + 0x1f, + 0x1d, + 0x1a, + 0x18, + 0x15, + 0x12, + 0x0e, + 0x0b, + 0x07, + 0x02, + 0xfd, +}; + +const u8 adj_pwr_lut_core0_rev3[] = { + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, +}; + +const u8 adj_pwr_lut_core1_rev3[] = { + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, +}; + +const u32 gainctrl_lut_core0_rev3[] = { + 0x5bf70044, + 0x5bf70042, + 0x5bf70040, + 0x5bf7003e, + 0x5bf7003c, + 0x5bf7003b, + 0x5bf70039, + 0x5bf70037, + 0x5bf70036, + 0x5bf70034, + 0x5bf70033, + 0x5bf70031, + 0x5bf70030, + 0x5ba70044, + 0x5ba70042, + 0x5ba70040, + 0x5ba7003e, + 0x5ba7003c, + 0x5ba7003b, + 0x5ba70039, + 0x5ba70037, + 0x5ba70036, + 0x5ba70034, + 0x5ba70033, + 0x5b770044, + 0x5b770042, + 0x5b770040, + 0x5b77003e, + 0x5b77003c, + 0x5b77003b, + 0x5b770039, + 0x5b770037, + 0x5b770036, + 0x5b770034, + 0x5b770033, + 0x5b770031, + 0x5b770030, + 0x5b77002f, + 0x5b77002d, + 0x5b77002c, + 0x5b470044, + 0x5b470042, + 0x5b470040, + 0x5b47003e, + 0x5b47003c, + 0x5b47003b, + 0x5b470039, + 0x5b470037, + 0x5b470036, + 0x5b470034, + 0x5b470033, + 0x5b470031, + 0x5b470030, + 0x5b47002f, + 0x5b47002d, + 0x5b47002c, + 0x5b47002b, + 0x5b47002a, + 0x5b270044, + 0x5b270042, + 0x5b270040, + 0x5b27003e, + 0x5b27003c, + 0x5b27003b, + 0x5b270039, + 0x5b270037, + 0x5b270036, + 0x5b270034, + 0x5b270033, + 0x5b270031, + 0x5b270030, + 0x5b27002f, + 0x5b170044, + 0x5b170042, + 0x5b170040, + 0x5b17003e, + 0x5b17003c, + 0x5b17003b, + 0x5b170039, + 0x5b170037, + 0x5b170036, + 0x5b170034, + 0x5b170033, + 0x5b170031, + 0x5b170030, + 0x5b17002f, + 0x5b17002d, + 0x5b17002c, + 0x5b17002b, + 0x5b17002a, + 0x5b170028, + 0x5b170027, + 0x5b170026, + 0x5b170025, + 0x5b170024, + 0x5b170023, + 0x5b070044, + 0x5b070042, + 0x5b070040, + 0x5b07003e, + 0x5b07003c, + 0x5b07003b, + 0x5b070039, + 0x5b070037, + 0x5b070036, + 0x5b070034, + 0x5b070033, + 0x5b070031, + 0x5b070030, + 0x5b07002f, + 0x5b07002d, + 0x5b07002c, + 0x5b07002b, + 0x5b07002a, + 0x5b070028, + 0x5b070027, + 0x5b070026, + 0x5b070025, + 0x5b070024, + 0x5b070023, + 0x5b070022, + 0x5b070021, + 0x5b070020, + 0x5b07001f, + 0x5b07001e, + 0x5b07001d, + 0x5b07001d, + 0x5b07001c, +}; + +const u32 gainctrl_lut_core1_rev3[] = { + 0x5bf70044, + 0x5bf70042, + 0x5bf70040, + 0x5bf7003e, + 0x5bf7003c, + 0x5bf7003b, + 0x5bf70039, + 0x5bf70037, + 0x5bf70036, + 0x5bf70034, + 0x5bf70033, + 0x5bf70031, + 0x5bf70030, + 0x5ba70044, + 0x5ba70042, + 0x5ba70040, + 0x5ba7003e, + 0x5ba7003c, + 0x5ba7003b, + 0x5ba70039, + 0x5ba70037, + 0x5ba70036, + 0x5ba70034, + 0x5ba70033, + 0x5b770044, + 0x5b770042, + 0x5b770040, + 0x5b77003e, + 0x5b77003c, + 0x5b77003b, + 0x5b770039, + 0x5b770037, + 0x5b770036, + 0x5b770034, + 0x5b770033, + 0x5b770031, + 0x5b770030, + 0x5b77002f, + 0x5b77002d, + 0x5b77002c, + 0x5b470044, + 0x5b470042, + 0x5b470040, + 0x5b47003e, + 0x5b47003c, + 0x5b47003b, + 0x5b470039, + 0x5b470037, + 0x5b470036, + 0x5b470034, + 0x5b470033, + 0x5b470031, + 0x5b470030, + 0x5b47002f, + 0x5b47002d, + 0x5b47002c, + 0x5b47002b, + 0x5b47002a, + 0x5b270044, + 0x5b270042, + 0x5b270040, + 0x5b27003e, + 0x5b27003c, + 0x5b27003b, + 0x5b270039, + 0x5b270037, + 0x5b270036, + 0x5b270034, + 0x5b270033, + 0x5b270031, + 0x5b270030, + 0x5b27002f, + 0x5b170044, + 0x5b170042, + 0x5b170040, + 0x5b17003e, + 0x5b17003c, + 0x5b17003b, + 0x5b170039, + 0x5b170037, + 0x5b170036, + 0x5b170034, + 0x5b170033, + 0x5b170031, + 0x5b170030, + 0x5b17002f, + 0x5b17002d, + 0x5b17002c, + 0x5b17002b, + 0x5b17002a, + 0x5b170028, + 0x5b170027, + 0x5b170026, + 0x5b170025, + 0x5b170024, + 0x5b170023, + 0x5b070044, + 0x5b070042, + 0x5b070040, + 0x5b07003e, + 0x5b07003c, + 0x5b07003b, + 0x5b070039, + 0x5b070037, + 0x5b070036, + 0x5b070034, + 0x5b070033, + 0x5b070031, + 0x5b070030, + 0x5b07002f, + 0x5b07002d, + 0x5b07002c, + 0x5b07002b, + 0x5b07002a, + 0x5b070028, + 0x5b070027, + 0x5b070026, + 0x5b070025, + 0x5b070024, + 0x5b070023, + 0x5b070022, + 0x5b070021, + 0x5b070020, + 0x5b07001f, + 0x5b07001e, + 0x5b07001d, + 0x5b07001d, + 0x5b07001c, +}; + +const u32 iq_lut_core0_rev3[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 iq_lut_core1_rev3[] = { + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u16 loft_lut_core0_rev3[] = { + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, +}; + +const u16 loft_lut_core1_rev3[] = { + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, +}; + +const u16 papd_comp_rfpwr_tbl_core0_rev3[] = { + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, +}; + +const u16 papd_comp_rfpwr_tbl_core1_rev3[] = { + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x0036, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x002a, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x001e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x000e, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01fc, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01ee, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, + 0x01d6, +}; + +const u32 papd_comp_epsilon_tbl_core0_rev3[] = { + 0x00000000, + 0x00001fa0, + 0x00019f78, + 0x0001df7e, + 0x03fa9f86, + 0x03fd1f90, + 0x03fe5f8a, + 0x03fb1f94, + 0x03fd9fa0, + 0x00009f98, + 0x03fd1fac, + 0x03ff9fa2, + 0x03fe9fae, + 0x00001fae, + 0x03fddfb4, + 0x03ff1fb8, + 0x03ff9fbc, + 0x03ffdfbe, + 0x03fe9fc2, + 0x03fedfc6, + 0x03fedfc6, + 0x03ff9fc8, + 0x03ff5fc6, + 0x03fedfc2, + 0x03ff9fc0, + 0x03ff5fac, + 0x03ff5fac, + 0x03ff9fa2, + 0x03ff9fa6, + 0x03ff9faa, + 0x03ff5fb0, + 0x03ff5fb4, + 0x03ff1fca, + 0x03ff5fce, + 0x03fcdfdc, + 0x03fb4006, + 0x00000030, + 0x03ff808a, + 0x03ff80da, + 0x0000016c, + 0x03ff8318, + 0x03ff063a, + 0x03fd8bd6, + 0x00014ffe, + 0x00034ffe, + 0x00034ffe, + 0x0003cffe, + 0x00040ffe, + 0x00040ffe, + 0x0003cffe, + 0x0003cffe, + 0x00020ffe, + 0x03fe0ffe, + 0x03fdcffe, + 0x03f94ffe, + 0x03f54ffe, + 0x03f44ffe, + 0x03ef8ffe, + 0x03ee0ffe, + 0x03ebcffe, + 0x03e8cffe, + 0x03e74ffe, + 0x03e4cffe, + 0x03e38ffe, +}; + +const u32 papd_cal_scalars_tbl_core0_rev3[] = { + 0x05af005a, + 0x0571005e, + 0x05040066, + 0x04bd006c, + 0x047d0072, + 0x04430078, + 0x03f70081, + 0x03cb0087, + 0x03870091, + 0x035e0098, + 0x032e00a1, + 0x030300aa, + 0x02d800b4, + 0x02ae00bf, + 0x028900ca, + 0x026400d6, + 0x024100e3, + 0x022200f0, + 0x020200ff, + 0x01e5010e, + 0x01ca011e, + 0x01b0012f, + 0x01990140, + 0x01830153, + 0x016c0168, + 0x0158017d, + 0x01450193, + 0x013301ab, + 0x012101c5, + 0x011101e0, + 0x010201fc, + 0x00f4021a, + 0x00e6011d, + 0x00d9012e, + 0x00cd0140, + 0x00c20153, + 0x00b70167, + 0x00ac017c, + 0x00a30193, + 0x009a01ab, + 0x009101c4, + 0x008901df, + 0x008101fb, + 0x007a0219, + 0x00730239, + 0x006d025b, + 0x0067027e, + 0x006102a4, + 0x005c02cc, + 0x005602f6, + 0x00520323, + 0x004d0353, + 0x00490385, + 0x004503bb, + 0x004103f3, + 0x003d042f, + 0x003a046f, + 0x003704b2, + 0x003404f9, + 0x00310545, + 0x002e0596, + 0x002b05f5, + 0x00290640, + 0x002606a4, +}; + +const u32 papd_comp_epsilon_tbl_core1_rev3[] = { + 0x00000000, + 0x00001fa0, + 0x00019f78, + 0x0001df7e, + 0x03fa9f86, + 0x03fd1f90, + 0x03fe5f8a, + 0x03fb1f94, + 0x03fd9fa0, + 0x00009f98, + 0x03fd1fac, + 0x03ff9fa2, + 0x03fe9fae, + 0x00001fae, + 0x03fddfb4, + 0x03ff1fb8, + 0x03ff9fbc, + 0x03ffdfbe, + 0x03fe9fc2, + 0x03fedfc6, + 0x03fedfc6, + 0x03ff9fc8, + 0x03ff5fc6, + 0x03fedfc2, + 0x03ff9fc0, + 0x03ff5fac, + 0x03ff5fac, + 0x03ff9fa2, + 0x03ff9fa6, + 0x03ff9faa, + 0x03ff5fb0, + 0x03ff5fb4, + 0x03ff1fca, + 0x03ff5fce, + 0x03fcdfdc, + 0x03fb4006, + 0x00000030, + 0x03ff808a, + 0x03ff80da, + 0x0000016c, + 0x03ff8318, + 0x03ff063a, + 0x03fd8bd6, + 0x00014ffe, + 0x00034ffe, + 0x00034ffe, + 0x0003cffe, + 0x00040ffe, + 0x00040ffe, + 0x0003cffe, + 0x0003cffe, + 0x00020ffe, + 0x03fe0ffe, + 0x03fdcffe, + 0x03f94ffe, + 0x03f54ffe, + 0x03f44ffe, + 0x03ef8ffe, + 0x03ee0ffe, + 0x03ebcffe, + 0x03e8cffe, + 0x03e74ffe, + 0x03e4cffe, + 0x03e38ffe, +}; + +const u32 papd_cal_scalars_tbl_core1_rev3[] = { + 0x05af005a, + 0x0571005e, + 0x05040066, + 0x04bd006c, + 0x047d0072, + 0x04430078, + 0x03f70081, + 0x03cb0087, + 0x03870091, + 0x035e0098, + 0x032e00a1, + 0x030300aa, + 0x02d800b4, + 0x02ae00bf, + 0x028900ca, + 0x026400d6, + 0x024100e3, + 0x022200f0, + 0x020200ff, + 0x01e5010e, + 0x01ca011e, + 0x01b0012f, + 0x01990140, + 0x01830153, + 0x016c0168, + 0x0158017d, + 0x01450193, + 0x013301ab, + 0x012101c5, + 0x011101e0, + 0x010201fc, + 0x00f4021a, + 0x00e6011d, + 0x00d9012e, + 0x00cd0140, + 0x00c20153, + 0x00b70167, + 0x00ac017c, + 0x00a30193, + 0x009a01ab, + 0x009101c4, + 0x008901df, + 0x008101fb, + 0x007a0219, + 0x00730239, + 0x006d025b, + 0x0067027e, + 0x006102a4, + 0x005c02cc, + 0x005602f6, + 0x00520323, + 0x004d0353, + 0x00490385, + 0x004503bb, + 0x004103f3, + 0x003d042f, + 0x003a046f, + 0x003704b2, + 0x003404f9, + 0x00310545, + 0x002e0596, + 0x002b05f5, + 0x00290640, + 0x002606a4, +}; + +const mimophytbl_info_t mimophytbl_info_rev3_volatile[] = { + {&ant_swctrl_tbl_rev3, + sizeof(ant_swctrl_tbl_rev3) / sizeof(ant_swctrl_tbl_rev3[0]), 9, 0, 16} + , +}; + +const mimophytbl_info_t mimophytbl_info_rev3_volatile1[] = { + {&ant_swctrl_tbl_rev3_1, + sizeof(ant_swctrl_tbl_rev3_1) / sizeof(ant_swctrl_tbl_rev3_1[0]), 9, 0, + 16} + , +}; + +const mimophytbl_info_t mimophytbl_info_rev3_volatile2[] = { + {&ant_swctrl_tbl_rev3_2, + sizeof(ant_swctrl_tbl_rev3_2) / sizeof(ant_swctrl_tbl_rev3_2[0]), 9, 0, + 16} + , +}; + +const mimophytbl_info_t mimophytbl_info_rev3_volatile3[] = { + {&ant_swctrl_tbl_rev3_3, + sizeof(ant_swctrl_tbl_rev3_3) / sizeof(ant_swctrl_tbl_rev3_3[0]), 9, 0, + 16} + , +}; + +const mimophytbl_info_t mimophytbl_info_rev3[] = { + {&frame_struct_rev3, + sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} + , + {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), + 11, 0, 16} + , + {&tmap_tbl_rev3, sizeof(tmap_tbl_rev3) / sizeof(tmap_tbl_rev3[0]), 12, + 0, 32} + , + {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), + 13, 0, 32} + , + {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), + 14, 0, 32} + , + {&noise_var_tbl_rev3, + sizeof(noise_var_tbl_rev3) / sizeof(noise_var_tbl_rev3[0]), 16, 0, 32} + , + {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, + 16} + , + {&tdi_tbl20_ant0_rev3, + sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, + 32} + , + {&tdi_tbl20_ant1_rev3, + sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256, + 32} + , + {&tdi_tbl40_ant0_rev3, + sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640, + 32} + , + {&tdi_tbl40_ant1_rev3, + sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768, + 32} + , + {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]), + 20, 0, 32} + , + {&chanest_tbl_rev3, + sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32} + , + {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]), + 24, 0, 8} + , + {&est_pwr_lut_core0_rev3, + sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, + 0, 8} + , + {&est_pwr_lut_core1_rev3, + sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, + 0, 8} + , + {&adj_pwr_lut_core0_rev3, + sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, + 64, 8} + , + {&adj_pwr_lut_core1_rev3, + sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, + 64, 8} + , + {&gainctrl_lut_core0_rev3, + sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), + 26, 192, 32} + , + {&gainctrl_lut_core1_rev3, + sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), + 27, 192, 32} + , + {&iq_lut_core0_rev3, + sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} + , + {&iq_lut_core1_rev3, + sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} + , + {&loft_lut_core0_rev3, + sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, + 16} + , + {&loft_lut_core1_rev3, + sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, + 16} +}; + +const u32 mimophytbl_info_sz_rev3 = + sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]); +const u32 mimophytbl_info_sz_rev3_volatile = + sizeof(mimophytbl_info_rev3_volatile) / + sizeof(mimophytbl_info_rev3_volatile[0]); +const u32 mimophytbl_info_sz_rev3_volatile1 = + sizeof(mimophytbl_info_rev3_volatile1) / + sizeof(mimophytbl_info_rev3_volatile1[0]); +const u32 mimophytbl_info_sz_rev3_volatile2 = + sizeof(mimophytbl_info_rev3_volatile2) / + sizeof(mimophytbl_info_rev3_volatile2[0]); +const u32 mimophytbl_info_sz_rev3_volatile3 = + sizeof(mimophytbl_info_rev3_volatile3) / + sizeof(mimophytbl_info_rev3_volatile3[0]); + +const u32 tmap_tbl_rev7[] = { + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x000aa888, + 0x88880000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00011111, + 0x11110000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00088aaa, + 0xaaaa0000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xaaa8aaa0, + 0x8aaa8aaa, + 0xaa8a8a8a, + 0x000aaa88, + 0x8aaa0000, + 0xaaa8a888, + 0x8aa88a8a, + 0x8a88a888, + 0x08080a00, + 0x0a08080a, + 0x080a0a08, + 0x00080808, + 0x080a0000, + 0x080a0808, + 0x080a0808, + 0x0a0a0a08, + 0xa0a0a0a0, + 0x80a0a080, + 0x8080a0a0, + 0x00008080, + 0x80a00000, + 0x80a080a0, + 0xa080a0a0, + 0x8080a0a0, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x99999000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x22000000, + 0x2222b222, + 0x22222222, + 0x222222b2, + 0xb2222220, + 0x22222222, + 0x22d22222, + 0x00000222, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x33000000, + 0x3333b333, + 0x33333333, + 0x333333b3, + 0xb3333330, + 0x33333333, + 0x33d33333, + 0x00000333, + 0x22000000, + 0x2222a222, + 0x22222222, + 0x222222a2, + 0xa2222220, + 0x22222222, + 0x22c22222, + 0x00000222, + 0x99b99b00, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb99, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x22222200, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0x22222222, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x11111111, + 0xf1111111, + 0x11111111, + 0x11f11111, + 0x01111111, + 0xbb9bb900, + 0xb9b9bb99, + 0xb99bbbbb, + 0xbbbb9b9b, + 0xb9bb99bb, + 0xb99999b9, + 0xb9b9b99b, + 0x00000bbb, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88aa, + 0xa88888a8, + 0xa8a8a88a, + 0x0a888aaa, + 0xaa000000, + 0xa8a8aa88, + 0xa88aaaaa, + 0xaaaa8a8a, + 0xa8aa88a0, + 0xa88888a8, + 0xa8a8a88a, + 0x00000aaa, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0xbbbbbb00, + 0x999bbbbb, + 0x9bb99b9b, + 0xb9b9b9bb, + 0xb9b99bbb, + 0xb9b9b9bb, + 0xb9bb9b99, + 0x00000999, + 0x8a000000, + 0xaa88a888, + 0xa88888aa, + 0xa88a8a88, + 0xa88aa88a, + 0x88a8aaaa, + 0xa8aa8aaa, + 0x0888a88a, + 0x0b0b0b00, + 0x090b0b0b, + 0x0b090b0b, + 0x0909090b, + 0x09090b0b, + 0x09090b0b, + 0x09090b09, + 0x00000909, + 0x0a000000, + 0x0a080808, + 0x080a080a, + 0x080a0a08, + 0x080a080a, + 0x0808080a, + 0x0a0a0a08, + 0x0808080a, + 0xb0b0b000, + 0x9090b0b0, + 0x90b09090, + 0xb0b0b090, + 0xb0b090b0, + 0x90b0b0b0, + 0xb0b09090, + 0x00000090, + 0x80000000, + 0xa080a080, + 0xa08080a0, + 0xa0808080, + 0xa080a080, + 0x80a0a0a0, + 0xa0a080a0, + 0x00a0a0a0, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x11000000, + 0x1111f111, + 0x11111111, + 0x111111f1, + 0xf1111110, + 0x11111111, + 0x11f11111, + 0x00000111, + 0x33000000, + 0x3333f333, + 0x33333333, + 0x333333f3, + 0xf3333330, + 0x33333333, + 0x33f33333, + 0x00000333, + 0x22000000, + 0x2222f222, + 0x22222222, + 0x222222f2, + 0xf2222220, + 0x22222222, + 0x22f22222, + 0x00000222, + 0x99000000, + 0x9b9b99bb, + 0x9bb99999, + 0x9999b9b9, + 0x9b99bb90, + 0x9bbbbb9b, + 0x9b9b9bb9, + 0x00000999, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88888000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00aaa888, + 0x88a88a00, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x000aa888, + 0x88880000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa88, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x08aaa888, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x11000000, + 0x1111a111, + 0x11111111, + 0x111111a1, + 0xa1111110, + 0x11111111, + 0x11c11111, + 0x00000111, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x88000000, + 0x8a8a88aa, + 0x8aa88888, + 0x8888a8a8, + 0x8a88aa80, + 0x8aaaaa8a, + 0x8a8a8aa8, + 0x00000888, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const u32 noise_var_tbl_rev7[] = { + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, + 0x020c020c, + 0x0000014d, +}; + +const u32 papd_comp_epsilon_tbl_core0_rev7[] = { + 0x00000000, + 0x00000000, + 0x00016023, + 0x00006028, + 0x00034036, + 0x0003402e, + 0x0007203c, + 0x0006e037, + 0x00070030, + 0x0009401f, + 0x0009a00f, + 0x000b600d, + 0x000c8007, + 0x000ce007, + 0x00101fff, + 0x00121ff9, + 0x0012e004, + 0x0014dffc, + 0x0016dff6, + 0x0018dfe9, + 0x001b3fe5, + 0x001c5fd0, + 0x001ddfc2, + 0x001f1fb6, + 0x00207fa4, + 0x00219f8f, + 0x0022ff7d, + 0x00247f6c, + 0x0024df5b, + 0x00267f4b, + 0x0027df3b, + 0x0029bf3b, + 0x002b5f2f, + 0x002d3f2e, + 0x002f5f2a, + 0x002fff15, + 0x00315f0b, + 0x0032defa, + 0x0033beeb, + 0x0034fed9, + 0x00353ec5, + 0x00361eb0, + 0x00363e9b, + 0x0036be87, + 0x0036be70, + 0x0038fe67, + 0x0044beb2, + 0x00513ef3, + 0x00595f11, + 0x00669f3d, + 0x0078dfdf, + 0x00a143aa, + 0x01642fff, + 0x0162afff, + 0x01620fff, + 0x0160cfff, + 0x015f0fff, + 0x015dafff, + 0x015bcfff, + 0x015bcfff, + 0x015b4fff, + 0x015acfff, + 0x01590fff, + 0x0156cfff, +}; + +const u32 papd_cal_scalars_tbl_core0_rev7[] = { + 0x0b5e002d, + 0x0ae2002f, + 0x0a3b0032, + 0x09a70035, + 0x09220038, + 0x08ab003b, + 0x081f003f, + 0x07a20043, + 0x07340047, + 0x06d2004b, + 0x067a004f, + 0x06170054, + 0x05bf0059, + 0x0571005e, + 0x051e0064, + 0x04d3006a, + 0x04910070, + 0x044c0077, + 0x040f007e, + 0x03d90085, + 0x03a1008d, + 0x036f0095, + 0x033d009e, + 0x030b00a8, + 0x02e000b2, + 0x02b900bc, + 0x029200c7, + 0x026d00d3, + 0x024900e0, + 0x022900ed, + 0x020a00fb, + 0x01ec010a, + 0x01d20119, + 0x01b7012a, + 0x019e013c, + 0x0188014e, + 0x01720162, + 0x015d0177, + 0x0149018e, + 0x013701a5, + 0x012601be, + 0x011501d8, + 0x010601f4, + 0x00f70212, + 0x00e90231, + 0x00dc0253, + 0x00d00276, + 0x00c4029b, + 0x00b902c3, + 0x00af02ed, + 0x00a50319, + 0x009c0348, + 0x0093037a, + 0x008b03af, + 0x008303e6, + 0x007c0422, + 0x00750460, + 0x006e04a3, + 0x006804e9, + 0x00620533, + 0x005d0582, + 0x005805d6, + 0x0053062e, + 0x004e068c, +}; + +const u32 papd_comp_epsilon_tbl_core1_rev7[] = { + 0x00000000, + 0x00000000, + 0x00016023, + 0x00006028, + 0x00034036, + 0x0003402e, + 0x0007203c, + 0x0006e037, + 0x00070030, + 0x0009401f, + 0x0009a00f, + 0x000b600d, + 0x000c8007, + 0x000ce007, + 0x00101fff, + 0x00121ff9, + 0x0012e004, + 0x0014dffc, + 0x0016dff6, + 0x0018dfe9, + 0x001b3fe5, + 0x001c5fd0, + 0x001ddfc2, + 0x001f1fb6, + 0x00207fa4, + 0x00219f8f, + 0x0022ff7d, + 0x00247f6c, + 0x0024df5b, + 0x00267f4b, + 0x0027df3b, + 0x0029bf3b, + 0x002b5f2f, + 0x002d3f2e, + 0x002f5f2a, + 0x002fff15, + 0x00315f0b, + 0x0032defa, + 0x0033beeb, + 0x0034fed9, + 0x00353ec5, + 0x00361eb0, + 0x00363e9b, + 0x0036be87, + 0x0036be70, + 0x0038fe67, + 0x0044beb2, + 0x00513ef3, + 0x00595f11, + 0x00669f3d, + 0x0078dfdf, + 0x00a143aa, + 0x01642fff, + 0x0162afff, + 0x01620fff, + 0x0160cfff, + 0x015f0fff, + 0x015dafff, + 0x015bcfff, + 0x015bcfff, + 0x015b4fff, + 0x015acfff, + 0x01590fff, + 0x0156cfff, +}; + +const u32 papd_cal_scalars_tbl_core1_rev7[] = { + 0x0b5e002d, + 0x0ae2002f, + 0x0a3b0032, + 0x09a70035, + 0x09220038, + 0x08ab003b, + 0x081f003f, + 0x07a20043, + 0x07340047, + 0x06d2004b, + 0x067a004f, + 0x06170054, + 0x05bf0059, + 0x0571005e, + 0x051e0064, + 0x04d3006a, + 0x04910070, + 0x044c0077, + 0x040f007e, + 0x03d90085, + 0x03a1008d, + 0x036f0095, + 0x033d009e, + 0x030b00a8, + 0x02e000b2, + 0x02b900bc, + 0x029200c7, + 0x026d00d3, + 0x024900e0, + 0x022900ed, + 0x020a00fb, + 0x01ec010a, + 0x01d20119, + 0x01b7012a, + 0x019e013c, + 0x0188014e, + 0x01720162, + 0x015d0177, + 0x0149018e, + 0x013701a5, + 0x012601be, + 0x011501d8, + 0x010601f4, + 0x00f70212, + 0x00e90231, + 0x00dc0253, + 0x00d00276, + 0x00c4029b, + 0x00b902c3, + 0x00af02ed, + 0x00a50319, + 0x009c0348, + 0x0093037a, + 0x008b03af, + 0x008303e6, + 0x007c0422, + 0x00750460, + 0x006e04a3, + 0x006804e9, + 0x00620533, + 0x005d0582, + 0x005805d6, + 0x0053062e, + 0x004e068c, +}; + +const mimophytbl_info_t mimophytbl_info_rev7[] = { + {&frame_struct_rev3, + sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} + , + {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), + 11, 0, 16} + , + {&tmap_tbl_rev7, sizeof(tmap_tbl_rev7) / sizeof(tmap_tbl_rev7[0]), 12, + 0, 32} + , + {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), + 13, 0, 32} + , + {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), + 14, 0, 32} + , + {&noise_var_tbl_rev7, + sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} + , + {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, + 16} + , + {&tdi_tbl20_ant0_rev3, + sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, + 32} + , + {&tdi_tbl20_ant1_rev3, + sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256, + 32} + , + {&tdi_tbl40_ant0_rev3, + sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640, + 32} + , + {&tdi_tbl40_ant1_rev3, + sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768, + 32} + , + {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]), + 20, 0, 32} + , + {&chanest_tbl_rev3, + sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32} + , + {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]), + 24, 0, 8} + , + {&est_pwr_lut_core0_rev3, + sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, + 0, 8} + , + {&est_pwr_lut_core1_rev3, + sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, + 0, 8} + , + {&adj_pwr_lut_core0_rev3, + sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, + 64, 8} + , + {&adj_pwr_lut_core1_rev3, + sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, + 64, 8} + , + {&gainctrl_lut_core0_rev3, + sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), + 26, 192, 32} + , + {&gainctrl_lut_core1_rev3, + sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), + 27, 192, 32} + , + {&iq_lut_core0_rev3, + sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} + , + {&iq_lut_core1_rev3, + sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} + , + {&loft_lut_core0_rev3, + sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, + 16} + , + {&loft_lut_core1_rev3, + sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, + 16} + , + {&papd_comp_rfpwr_tbl_core0_rev3, + sizeof(papd_comp_rfpwr_tbl_core0_rev3) / + sizeof(papd_comp_rfpwr_tbl_core0_rev3[0]), 26, 576, 16} + , + {&papd_comp_rfpwr_tbl_core1_rev3, + sizeof(papd_comp_rfpwr_tbl_core1_rev3) / + sizeof(papd_comp_rfpwr_tbl_core1_rev3[0]), 27, 576, 16} + , + {&papd_comp_epsilon_tbl_core0_rev7, + sizeof(papd_comp_epsilon_tbl_core0_rev7) / + sizeof(papd_comp_epsilon_tbl_core0_rev7[0]), 31, 0, 32} + , + {&papd_cal_scalars_tbl_core0_rev7, + sizeof(papd_cal_scalars_tbl_core0_rev7) / + sizeof(papd_cal_scalars_tbl_core0_rev7[0]), 32, 0, 32} + , + {&papd_comp_epsilon_tbl_core1_rev7, + sizeof(papd_comp_epsilon_tbl_core1_rev7) / + sizeof(papd_comp_epsilon_tbl_core1_rev7[0]), 33, 0, 32} + , + {&papd_cal_scalars_tbl_core1_rev7, + sizeof(papd_cal_scalars_tbl_core1_rev7) / + sizeof(papd_cal_scalars_tbl_core1_rev7[0]), 34, 0, 32} + , +}; + +const u32 mimophytbl_info_sz_rev7 = + sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]); + +const mimophytbl_info_t mimophytbl_info_rev16[] = { + {&noise_var_tbl_rev7, + sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} + , + {&est_pwr_lut_core0_rev3, + sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, + 0, 8} + , + {&est_pwr_lut_core1_rev3, + sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, + 0, 8} + , + {&adj_pwr_lut_core0_rev3, + sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, + 64, 8} + , + {&adj_pwr_lut_core1_rev3, + sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, + 64, 8} + , + {&gainctrl_lut_core0_rev3, + sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), + 26, 192, 32} + , + {&gainctrl_lut_core1_rev3, + sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), + 27, 192, 32} + , + {&iq_lut_core0_rev3, + sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} + , + {&iq_lut_core1_rev3, + sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} + , + {&loft_lut_core0_rev3, + sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, + 16} + , + {&loft_lut_core1_rev3, + sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, + 16} + , +}; + +const u32 mimophytbl_info_sz_rev16 = + sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]); diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h new file mode 100644 index 0000000..396122f --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#define ANT_SWCTRL_TBL_REV3_IDX (0) + +typedef phytbl_info_t mimophytbl_info_t; + +extern const mimophytbl_info_t mimophytbl_info_rev0[], + mimophytbl_info_rev0_volatile[]; +extern const u32 mimophytbl_info_sz_rev0, mimophytbl_info_sz_rev0_volatile; + +extern const mimophytbl_info_t mimophytbl_info_rev3[], + mimophytbl_info_rev3_volatile[], mimophytbl_info_rev3_volatile1[], + mimophytbl_info_rev3_volatile2[], mimophytbl_info_rev3_volatile3[]; +extern const u32 mimophytbl_info_sz_rev3, mimophytbl_info_sz_rev3_volatile, + mimophytbl_info_sz_rev3_volatile1, mimophytbl_info_sz_rev3_volatile2, + mimophytbl_info_sz_rev3_volatile3; + +extern const u32 noise_var_tbl_rev3[]; + +extern const mimophytbl_info_t mimophytbl_info_rev7[]; +extern const u32 mimophytbl_info_sz_rev7; +extern const u32 noise_var_tbl_rev7[]; + +extern const mimophytbl_info_t mimophytbl_info_rev16[]; +extern const u32 mimophytbl_info_sz_rev16; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c deleted file mode 100644 index b2866de..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ /dev/null @@ -1,3249 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include "bcmdma.h" - -#include -#include -#include -#include -#include - -u32 phyhal_msg_level = PHYHAL_ERROR; - -typedef struct _chan_info_basic { - u16 chan; - u16 freq; -} chan_info_basic_t; - -static chan_info_basic_t chan_info_all[] = { - - {1, 2412}, - {2, 2417}, - {3, 2422}, - {4, 2427}, - {5, 2432}, - {6, 2437}, - {7, 2442}, - {8, 2447}, - {9, 2452}, - {10, 2457}, - {11, 2462}, - {12, 2467}, - {13, 2472}, - {14, 2484}, - - {34, 5170}, - {38, 5190}, - {42, 5210}, - {46, 5230}, - - {36, 5180}, - {40, 5200}, - {44, 5220}, - {48, 5240}, - {52, 5260}, - {56, 5280}, - {60, 5300}, - {64, 5320}, - - {100, 5500}, - {104, 5520}, - {108, 5540}, - {112, 5560}, - {116, 5580}, - {120, 5600}, - {124, 5620}, - {128, 5640}, - {132, 5660}, - {136, 5680}, - {140, 5700}, - - {149, 5745}, - {153, 5765}, - {157, 5785}, - {161, 5805}, - {165, 5825}, - - {184, 4920}, - {188, 4940}, - {192, 4960}, - {196, 4980}, - {200, 5000}, - {204, 5020}, - {208, 5040}, - {212, 5060}, - {216, 50800} -}; - -u16 ltrn_list[PHY_LTRN_LIST_LEN] = { - 0x18f9, 0x0d01, 0x00e4, 0xdef4, 0x06f1, 0x0ffc, - 0xfa27, 0x1dff, 0x10f0, 0x0918, 0xf20a, 0xe010, - 0x1417, 0x1104, 0xf114, 0xf2fa, 0xf7db, 0xe2fc, - 0xe1fb, 0x13ee, 0xff0d, 0xe91c, 0x171a, 0x0318, - 0xda00, 0x03e8, 0x17e6, 0xe9e4, 0xfff3, 0x1312, - 0xe105, 0xe204, 0xf725, 0xf206, 0xf1ec, 0x11fc, - 0x14e9, 0xe0f0, 0xf2f6, 0x09e8, 0x1010, 0x1d01, - 0xfad9, 0x0f04, 0x060f, 0xde0c, 0x001c, 0x0dff, - 0x1807, 0xf61a, 0xe40e, 0x0f16, 0x05f9, 0x18ec, - 0x0a1b, 0xff1e, 0x2600, 0xffe2, 0x0ae5, 0x1814, - 0x0507, 0x0fea, 0xe4f2, 0xf6e6 -}; - -const u8 ofdm_rate_lookup[] = { - - WLC_RATE_48M, - WLC_RATE_24M, - WLC_RATE_12M, - WLC_RATE_6M, - WLC_RATE_54M, - WLC_RATE_36M, - WLC_RATE_18M, - WLC_RATE_9M -}; - -#define PHY_WREG_LIMIT 24 - -static void wlc_set_phy_uninitted(phy_info_t *pi); -static u32 wlc_phy_get_radio_ver(phy_info_t *pi); -static void wlc_phy_timercb_phycal(void *arg); - -static bool wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, - s8 *pwr_ant); - -static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay); -static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm); -static void wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, - u8 ch); - -static void wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, - struct txpwr_limits *tp, chanspec_t); -static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi); - -static s8 wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, - u32 band, u8 rate); -static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band); -static s8 wlc_phy_env_measure_vbat(phy_info_t *pi); -static s8 wlc_phy_env_measure_temperature(phy_info_t *pi); - -char *phy_getvar(phy_info_t *pi, const char *name) -{ - char *vars = pi->vars; - char *s; - int len; - - if (!name) - return NULL; - - len = strlen(name); - if (len == 0) - return NULL; - - for (s = vars; s && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - - return NULL; -} - -int phy_getintvar(phy_info_t *pi, const char *name) -{ - char *val; - - val = PHY_GETVAR(pi, name); - if (val == NULL) - return 0; - - return simple_strtoul(val, NULL, 0); -} - -void wlc_phyreg_enter(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - wlapi_bmac_ucode_wake_override_phyreg_set(pi->sh->physhim); -} - -void wlc_phyreg_exit(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - wlapi_bmac_ucode_wake_override_phyreg_clear(pi->sh->physhim); -} - -void wlc_radioreg_enter(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, MCTL_LOCK_RADIO); - - udelay(10); -} - -void wlc_radioreg_exit(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - volatile u16 dummy; - - dummy = R_REG(&pi->regs->phyversion); - pi->phy_wreg = 0; - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, 0); -} - -u16 read_radio_reg(phy_info_t *pi, u16 addr) -{ - u16 data; - - if ((addr == RADIO_IDCODE)) - return 0xffff; - - if (NORADIO_ENAB(pi->pubpi)) - return NORADIO_IDCODE & 0xffff; - - switch (pi->pubpi.phy_type) { - case PHY_TYPE_N: - CASECHECK(PHYTYPE, PHY_TYPE_N); - if (NREV_GE(pi->pubpi.phy_rev, 7)) - addr |= RADIO_2057_READ_OFF; - else - addr |= RADIO_2055_READ_OFF; - break; - - case PHY_TYPE_LCN: - CASECHECK(PHYTYPE, PHY_TYPE_LCN); - addr |= RADIO_2064_READ_OFF; - break; - - default: - break; - } - - if ((D11REV_GE(pi->sh->corerev, 24)) || - (D11REV_IS(pi->sh->corerev, 22) - && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - W_REG_FLUSH(&pi->regs->radioregaddr, addr); - data = R_REG(&pi->regs->radioregdata); - } else { - W_REG_FLUSH(&pi->regs->phy4waddr, addr); - -#ifdef __ARM_ARCH_4T__ - __asm__(" .align 4 "); - __asm__(" nop "); - data = R_REG(&pi->regs->phy4wdatalo); -#else - data = R_REG(&pi->regs->phy4wdatalo); -#endif - - } - pi->phy_wreg = 0; - - return data; -} - -void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) -{ - if (NORADIO_ENAB(pi->pubpi)) - return; - - if ((D11REV_GE(pi->sh->corerev, 24)) || - (D11REV_IS(pi->sh->corerev, 22) - && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - - W_REG_FLUSH(&pi->regs->radioregaddr, addr); - W_REG(&pi->regs->radioregdata, val); - } else { - W_REG_FLUSH(&pi->regs->phy4waddr, addr); - W_REG(&pi->regs->phy4wdatalo, val); - } - - if (pi->sh->bustype == PCI_BUS) { - if (++pi->phy_wreg >= pi->phy_wreg_limit) { - (void)R_REG(&pi->regs->maccontrol); - pi->phy_wreg = 0; - } - } -} - -static u32 read_radio_id(phy_info_t *pi) -{ - u32 id; - - if (NORADIO_ENAB(pi->pubpi)) - return NORADIO_IDCODE; - - if (D11REV_GE(pi->sh->corerev, 24)) { - u32 b0, b1, b2; - - W_REG_FLUSH(&pi->regs->radioregaddr, 0); - b0 = (u32) R_REG(&pi->regs->radioregdata); - W_REG_FLUSH(&pi->regs->radioregaddr, 1); - b1 = (u32) R_REG(&pi->regs->radioregdata); - W_REG_FLUSH(&pi->regs->radioregaddr, 2); - b2 = (u32) R_REG(&pi->regs->radioregdata); - - id = ((b0 & 0xf) << 28) | (((b2 << 8) | b1) << 12) | ((b0 >> 4) - & 0xf); - } else { - W_REG_FLUSH(&pi->regs->phy4waddr, RADIO_IDCODE); - id = (u32) R_REG(&pi->regs->phy4wdatalo); - id |= (u32) R_REG(&pi->regs->phy4wdatahi) << 16; - } - pi->phy_wreg = 0; - return id; -} - -void and_radio_reg(phy_info_t *pi, u16 addr, u16 val) -{ - u16 rval; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - rval = read_radio_reg(pi, addr); - write_radio_reg(pi, addr, (rval & val)); -} - -void or_radio_reg(phy_info_t *pi, u16 addr, u16 val) -{ - u16 rval; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - rval = read_radio_reg(pi, addr); - write_radio_reg(pi, addr, (rval | val)); -} - -void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask) -{ - u16 rval; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - rval = read_radio_reg(pi, addr); - write_radio_reg(pi, addr, (rval ^ mask)); -} - -void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) -{ - u16 rval; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - rval = read_radio_reg(pi, addr); - write_radio_reg(pi, addr, (rval & ~mask) | (val & mask)); -} - -void write_phy_channel_reg(phy_info_t *pi, uint val) -{ - W_REG(&pi->regs->phychannel, val); -} - -u16 read_phy_reg(phy_info_t *pi, u16 addr) -{ - d11regs_t *regs; - - regs = pi->regs; - - W_REG_FLUSH(®s->phyregaddr, addr); - - pi->phy_wreg = 0; - return R_REG(®s->phyregdata); -} - -void write_phy_reg(phy_info_t *pi, u16 addr, u16 val) -{ - d11regs_t *regs; - - regs = pi->regs; - -#ifdef __mips__ - W_REG_FLUSH(®s->phyregaddr, addr); - W_REG(®s->phyregdata, val); - if (addr == 0x72) - (void)R_REG(®s->phyregdata); -#else - W_REG((u32 *)(®s->phyregaddr), - addr | (val << 16)); - if (pi->sh->bustype == PCI_BUS) { - if (++pi->phy_wreg >= pi->phy_wreg_limit) { - pi->phy_wreg = 0; - (void)R_REG(®s->phyversion); - } - } -#endif -} - -void and_phy_reg(phy_info_t *pi, u16 addr, u16 val) -{ - d11regs_t *regs; - - regs = pi->regs; - - W_REG_FLUSH(®s->phyregaddr, addr); - - W_REG(®s->phyregdata, (R_REG(®s->phyregdata) & val)); - pi->phy_wreg = 0; -} - -void or_phy_reg(phy_info_t *pi, u16 addr, u16 val) -{ - d11regs_t *regs; - - regs = pi->regs; - - W_REG_FLUSH(®s->phyregaddr, addr); - - W_REG(®s->phyregdata, (R_REG(®s->phyregdata) | val)); - pi->phy_wreg = 0; -} - -void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) -{ - d11regs_t *regs; - - regs = pi->regs; - - W_REG_FLUSH(®s->phyregaddr, addr); - - W_REG(®s->phyregdata, - ((R_REG(®s->phyregdata) & ~mask) | (val & mask))); - pi->phy_wreg = 0; -} - -static void WLBANDINITFN(wlc_set_phy_uninitted) (phy_info_t *pi) -{ - int i, j; - - pi->initialized = false; - - pi->tx_vos = 0xffff; - pi->nrssi_table_delta = 0x7fffffff; - pi->rc_cal = 0xffff; - pi->mintxbias = 0xffff; - pi->txpwridx = -1; - if (ISNPHY(pi)) { - pi->phy_spuravoid = SPURAVOID_DISABLE; - - if (NREV_GE(pi->pubpi.phy_rev, 3) - && NREV_LT(pi->pubpi.phy_rev, 7)) - pi->phy_spuravoid = SPURAVOID_AUTO; - - pi->nphy_papd_skip = 0; - pi->nphy_papd_epsilon_offset[0] = 0xf588; - pi->nphy_papd_epsilon_offset[1] = 0xf588; - pi->nphy_txpwr_idx[0] = 128; - pi->nphy_txpwr_idx[1] = 128; - pi->nphy_txpwrindex[0].index_internal = 40; - pi->nphy_txpwrindex[1].index_internal = 40; - pi->phy_pabias = 0; - } else { - pi->phy_spuravoid = SPURAVOID_AUTO; - } - pi->radiopwr = 0xffff; - for (i = 0; i < STATIC_NUM_RF; i++) { - for (j = 0; j < STATIC_NUM_BB; j++) { - pi->stats_11b_txpower[i][j] = -1; - } - } -} - -shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp) -{ - shared_phy_t *sh; - - sh = kzalloc(sizeof(shared_phy_t), GFP_ATOMIC); - if (sh == NULL) { - return NULL; - } - - sh->sih = shp->sih; - sh->physhim = shp->physhim; - sh->unit = shp->unit; - sh->corerev = shp->corerev; - - sh->vid = shp->vid; - sh->did = shp->did; - sh->chip = shp->chip; - sh->chiprev = shp->chiprev; - sh->chippkg = shp->chippkg; - sh->sromrev = shp->sromrev; - sh->boardtype = shp->boardtype; - sh->boardrev = shp->boardrev; - sh->boardvendor = shp->boardvendor; - sh->boardflags = shp->boardflags; - sh->boardflags2 = shp->boardflags2; - sh->bustype = shp->bustype; - sh->buscorerev = shp->buscorerev; - - sh->fast_timer = PHY_SW_TIMER_FAST; - sh->slow_timer = PHY_SW_TIMER_SLOW; - sh->glacial_timer = PHY_SW_TIMER_GLACIAL; - - sh->rssi_mode = RSSI_ANT_MERGE_MAX; - - return sh; -} - -void wlc_phy_shared_detach(shared_phy_t *phy_sh) -{ - if (phy_sh) { - kfree(phy_sh); - } -} - -wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, - char *vars, struct wiphy *wiphy) -{ - phy_info_t *pi; - u32 sflags = 0; - uint phyversion; - int i; - - if (D11REV_IS(sh->corerev, 4)) - sflags = SISF_2G_PHY | SISF_5G_PHY; - else - sflags = ai_core_sflags(sh->sih, 0, 0); - - if (BAND_5G(bandtype)) { - if ((sflags & (SISF_5G_PHY | SISF_DB_PHY)) == 0) { - return NULL; - } - } - - pi = sh->phy_head; - if ((sflags & SISF_DB_PHY) && pi) { - - wlapi_bmac_corereset(pi->sh->physhim, pi->pubpi.coreflags); - pi->refcnt++; - return &pi->pubpi_ro; - } - - pi = kzalloc(sizeof(phy_info_t), GFP_ATOMIC); - if (pi == NULL) { - return NULL; - } - pi->wiphy = wiphy; - pi->regs = (d11regs_t *) regs; - pi->sh = sh; - pi->phy_init_por = true; - pi->phy_wreg_limit = PHY_WREG_LIMIT; - - pi->vars = vars; - - pi->txpwr_percent = 100; - - pi->do_initcal = true; - - pi->phycal_tempdelta = 0; - - if (BAND_2G(bandtype) && (sflags & SISF_2G_PHY)) { - - pi->pubpi.coreflags = SICF_GMODE; - } - - wlapi_bmac_corereset(pi->sh->physhim, pi->pubpi.coreflags); - phyversion = R_REG(&pi->regs->phyversion); - - pi->pubpi.phy_type = PHY_TYPE(phyversion); - pi->pubpi.phy_rev = phyversion & PV_PV_MASK; - - if (pi->pubpi.phy_type == PHY_TYPE_LCNXN) { - pi->pubpi.phy_type = PHY_TYPE_N; - pi->pubpi.phy_rev += LCNXN_BASEREV; - } - pi->pubpi.phy_corenum = PHY_CORE_NUM_2; - pi->pubpi.ana_rev = (phyversion & PV_AV_MASK) >> PV_AV_SHIFT; - - if (!VALID_PHYTYPE(pi->pubpi.phy_type)) { - goto err; - } - if (BAND_5G(bandtype)) { - if (!ISNPHY(pi)) { - goto err; - } - } else { - if (!ISNPHY(pi) && !ISLCNPHY(pi)) { - goto err; - } - } - - if (ISSIM_ENAB(pi->sh->sih)) { - pi->pubpi.radioid = NORADIO_ID; - pi->pubpi.radiorev = 5; - } else { - u32 idcode; - - wlc_phy_anacore((wlc_phy_t *) pi, ON); - - idcode = wlc_phy_get_radio_ver(pi); - pi->pubpi.radioid = - (idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT; - pi->pubpi.radiorev = - (idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT; - pi->pubpi.radiover = - (idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT; - if (!VALID_RADIO(pi, pi->pubpi.radioid)) { - goto err; - } - - wlc_phy_switch_radio((wlc_phy_t *) pi, OFF); - } - - wlc_set_phy_uninitted(pi); - - pi->bw = WL_CHANSPEC_BW_20; - pi->radio_chanspec = - BAND_2G(bandtype) ? CH20MHZ_CHSPEC(1) : CH20MHZ_CHSPEC(36); - - pi->rxiq_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; - pi->rxiq_antsel = ANT_RX_DIV_DEF; - - pi->watchdog_override = true; - - pi->cal_type_override = PHY_PERICAL_AUTO; - - pi->nphy_saved_noisevars.bufcount = 0; - - if (ISNPHY(pi)) - pi->min_txpower = PHY_TXPWR_MIN_NPHY; - else - pi->min_txpower = PHY_TXPWR_MIN; - - pi->sh->phyrxchain = 0x3; - - pi->rx2tx_biasentry = -1; - - pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; - pi->phy_txcore_enable_temp = - PHY_CHAIN_TX_DISABLE_TEMP - PHY_HYSTERESIS_DELTATEMP; - pi->phy_tempsense_offset = 0; - pi->phy_txcore_heatedup = false; - - pi->nphy_lastcal_temp = -50; - - pi->phynoise_polling = true; - if (ISNPHY(pi) || ISLCNPHY(pi)) - pi->phynoise_polling = false; - - for (i = 0; i < TXP_NUM_RATES; i++) { - pi->txpwr_limit[i] = WLC_TXPWR_MAX; - pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; - pi->tx_user_target[i] = WLC_TXPWR_MAX; - } - - pi->radiopwr_override = RADIOPWR_OVERRIDE_DEF; - - pi->user_txpwr_at_rfport = false; - - if (ISNPHY(pi)) { - - pi->phycal_timer = wlapi_init_timer(pi->sh->physhim, - wlc_phy_timercb_phycal, - pi, "phycal"); - if (!pi->phycal_timer) { - goto err; - } - - if (!wlc_phy_attach_nphy(pi)) - goto err; - - } else if (ISLCNPHY(pi)) { - if (!wlc_phy_attach_lcnphy(pi)) - goto err; - - } else { - - } - - pi->refcnt++; - pi->next = pi->sh->phy_head; - sh->phy_head = pi; - - pi->vars = (char *)&pi->vars; - - memcpy(&pi->pubpi_ro, &pi->pubpi, sizeof(wlc_phy_t)); - - return &pi->pubpi_ro; - - err: - kfree(pi); - return NULL; -} - -void wlc_phy_detach(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (pih) { - if (--pi->refcnt) { - return; - } - - if (pi->phycal_timer) { - wlapi_free_timer(pi->sh->physhim, pi->phycal_timer); - pi->phycal_timer = NULL; - } - - if (pi->sh->phy_head == pi) - pi->sh->phy_head = pi->next; - else if (pi->sh->phy_head->next == pi) - pi->sh->phy_head->next = NULL; - - if (pi->pi_fptr.detach) - (pi->pi_fptr.detach) (pi); - - kfree(pi); - } -} - -bool -wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev, - u16 *radioid, u16 *radiover) -{ - phy_info_t *pi = (phy_info_t *) pih; - *phytype = (u16) pi->pubpi.phy_type; - *phyrev = (u16) pi->pubpi.phy_rev; - *radioid = pi->pubpi.radioid; - *radiover = pi->pubpi.radiorev; - - return true; -} - -bool wlc_phy_get_encore(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - return pi->pubpi.abgphy_encore; -} - -u32 wlc_phy_get_coreflags(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - return pi->pubpi.coreflags; -} - -static void wlc_phy_timercb_phycal(void *arg) -{ - phy_info_t *pi = (phy_info_t *) arg; - uint delay = 5; - - if (PHY_PERICAL_MPHASE_PENDING(pi)) { - if (!pi->sh->up) { - wlc_phy_cal_perical_mphase_reset(pi); - return; - } - - if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi)) { - - delay = 1000; - wlc_phy_cal_perical_mphase_restart(pi); - } else - wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_AUTO); - wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); - return; - } - -} - -void wlc_phy_anacore(wlc_phy_t *pih, bool on) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (ISNPHY(pi)) { - if (on) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0xa6, 0x0d); - write_phy_reg(pi, 0x8f, 0x0); - write_phy_reg(pi, 0xa7, 0x0d); - write_phy_reg(pi, 0xa5, 0x0); - } else { - write_phy_reg(pi, 0xa5, 0x0); - } - } else { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0x8f, 0x07ff); - write_phy_reg(pi, 0xa6, 0x0fd); - write_phy_reg(pi, 0xa5, 0x07ff); - write_phy_reg(pi, 0xa7, 0x0fd); - } else { - write_phy_reg(pi, 0xa5, 0x7fff); - } - } - } else if (ISLCNPHY(pi)) { - if (on) { - and_phy_reg(pi, 0x43b, - ~((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); - } else { - or_phy_reg(pi, 0x43c, - (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); - or_phy_reg(pi, 0x43b, - (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); - } - } -} - -u32 wlc_phy_clk_bwbits(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - - u32 phy_bw_clkbits = 0; - - if (pi && (ISNPHY(pi) || ISLCNPHY(pi))) { - switch (pi->bw) { - case WL_CHANSPEC_BW_10: - phy_bw_clkbits = SICF_BW10; - break; - case WL_CHANSPEC_BW_20: - phy_bw_clkbits = SICF_BW20; - break; - case WL_CHANSPEC_BW_40: - phy_bw_clkbits = SICF_BW40; - break; - default: - break; - } - } - - return phy_bw_clkbits; -} - -void WLBANDINITFN(wlc_phy_por_inform) (wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->phy_init_por = true; -} - -void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->edcrs_threshold_lock = lock; - - write_phy_reg(pi, 0x22c, 0x46b); - write_phy_reg(pi, 0x22d, 0x46b); - write_phy_reg(pi, 0x22e, 0x3c0); - write_phy_reg(pi, 0x22f, 0x3c0); -} - -void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->do_initcal = initcal; -} - -void wlc_phy_hw_clk_state_upd(wlc_phy_t *pih, bool newstate) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (!pi || !pi->sh) - return; - - pi->sh->clk = newstate; -} - -void wlc_phy_hw_state_upd(wlc_phy_t *pih, bool newstate) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (!pi || !pi->sh) - return; - - pi->sh->up = newstate; -} - -void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) -{ - u32 mc; - initfn_t phy_init = NULL; - phy_info_t *pi = (phy_info_t *) pih; - - if (pi->init_in_progress) - return; - - pi->init_in_progress = true; - - pi->radio_chanspec = chanspec; - - mc = R_REG(&pi->regs->maccontrol); - if (WARN(mc & MCTL_EN_MAC, "HW error MAC running on init")) - return; - - if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) { - pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; - } - - if (WARN(!(ai_core_sflags(pi->sh->sih, 0, 0) & SISF_FCLKA), - "HW error SISF_FCLKA\n")) - return; - - phy_init = pi->pi_fptr.init; - - if (phy_init == NULL) { - return; - } - - wlc_phy_anacore(pih, ON); - - if (CHSPEC_BW(pi->radio_chanspec) != pi->bw) - wlapi_bmac_bw_set(pi->sh->physhim, - CHSPEC_BW(pi->radio_chanspec)); - - pi->nphy_gain_boost = true; - - wlc_phy_switch_radio((wlc_phy_t *) pi, ON); - - (*phy_init) (pi); - - pi->phy_init_por = false; - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) - wlc_phy_do_dummy_tx(pi, true, OFF); - - if (!(ISNPHY(pi))) - wlc_phy_txpower_update_shm(pi); - - wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, pi->sh->rx_antdiv); - - pi->init_in_progress = false; -} - -void wlc_phy_cal_init(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - initfn_t cal_init = NULL; - - if (WARN((R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) != 0, - "HW error: MAC enabled during phy cal\n")) - return; - - if (!pi->initialized) { - cal_init = pi->pi_fptr.calinit; - if (cal_init) - (*cal_init) (pi); - - pi->initialized = true; - } -} - -int wlc_phy_down(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - int callbacks = 0; - - if (pi->phycal_timer - && !wlapi_del_timer(pi->sh->physhim, pi->phycal_timer)) - callbacks++; - - pi->nphy_iqcal_chanspec_2G = 0; - pi->nphy_iqcal_chanspec_5G = 0; - - return callbacks; -} - -static u32 wlc_phy_get_radio_ver(phy_info_t *pi) -{ - u32 ver; - - ver = read_radio_id(pi); - - return ver; -} - -void -wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, - u16 tblAddr, u16 tblDataHi, u16 tblDataLo) -{ - write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); - - pi->tbl_data_hi = tblDataHi; - pi->tbl_data_lo = tblDataLo; - - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && - (pi->sh->chiprev == 1)) { - pi->tbl_addr = tblAddr; - pi->tbl_save_id = tbl_id; - pi->tbl_save_offset = tbl_offset; - } -} - -void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val) -{ - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && - (pi->sh->chiprev == 1) && - (pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { - read_phy_reg(pi, pi->tbl_data_lo); - - write_phy_reg(pi, pi->tbl_addr, - (pi->tbl_save_id << 10) | pi->tbl_save_offset); - pi->tbl_save_offset++; - } - - if (width == 32) { - - write_phy_reg(pi, pi->tbl_data_hi, (u16) (val >> 16)); - write_phy_reg(pi, pi->tbl_data_lo, (u16) val); - } else { - - write_phy_reg(pi, pi->tbl_data_lo, (u16) val); - } -} - -void -wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, - u16 tblAddr, u16 tblDataHi, u16 tblDataLo) -{ - uint idx; - uint tbl_id = ptbl_info->tbl_id; - uint tbl_offset = ptbl_info->tbl_offset; - uint tbl_width = ptbl_info->tbl_width; - const u8 *ptbl_8b = (const u8 *)ptbl_info->tbl_ptr; - const u16 *ptbl_16b = (const u16 *)ptbl_info->tbl_ptr; - const u32 *ptbl_32b = (const u32 *)ptbl_info->tbl_ptr; - - write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); - - for (idx = 0; idx < ptbl_info->tbl_len; idx++) { - - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && - (pi->sh->chiprev == 1) && - (tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { - read_phy_reg(pi, tblDataLo); - - write_phy_reg(pi, tblAddr, - (tbl_id << 10) | (tbl_offset + idx)); - } - - if (tbl_width == 32) { - - write_phy_reg(pi, tblDataHi, - (u16) (ptbl_32b[idx] >> 16)); - write_phy_reg(pi, tblDataLo, (u16) ptbl_32b[idx]); - } else if (tbl_width == 16) { - - write_phy_reg(pi, tblDataLo, ptbl_16b[idx]); - } else { - - write_phy_reg(pi, tblDataLo, ptbl_8b[idx]); - } - } -} - -void -wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, - u16 tblAddr, u16 tblDataHi, u16 tblDataLo) -{ - uint idx; - uint tbl_id = ptbl_info->tbl_id; - uint tbl_offset = ptbl_info->tbl_offset; - uint tbl_width = ptbl_info->tbl_width; - u8 *ptbl_8b = (u8 *)ptbl_info->tbl_ptr; - u16 *ptbl_16b = (u16 *)ptbl_info->tbl_ptr; - u32 *ptbl_32b = (u32 *)ptbl_info->tbl_ptr; - - write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); - - for (idx = 0; idx < ptbl_info->tbl_len; idx++) { - - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && - (pi->sh->chiprev == 1)) { - (void)read_phy_reg(pi, tblDataLo); - - write_phy_reg(pi, tblAddr, - (tbl_id << 10) | (tbl_offset + idx)); - } - - if (tbl_width == 32) { - - ptbl_32b[idx] = read_phy_reg(pi, tblDataLo); - ptbl_32b[idx] |= (read_phy_reg(pi, tblDataHi) << 16); - } else if (tbl_width == 16) { - - ptbl_16b[idx] = read_phy_reg(pi, tblDataLo); - } else { - - ptbl_8b[idx] = (u8) read_phy_reg(pi, tblDataLo); - } - } -} - -uint -wlc_phy_init_radio_regs_allbands(phy_info_t *pi, radio_20xx_regs_t *radioregs) -{ - uint i = 0; - - do { - if (radioregs[i].do_init) { - write_radio_reg(pi, radioregs[i].address, - (u16) radioregs[i].init); - } - - i++; - } while (radioregs[i].address != 0xffff); - - return i; -} - -uint -wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, - u16 core_offset) -{ - uint i = 0; - uint count = 0; - - do { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (radioregs[i].do_init_a) { - write_radio_reg(pi, - radioregs[i]. - address | core_offset, - (u16) radioregs[i].init_a); - if (ISNPHY(pi) && (++count % 4 == 0)) - WLC_PHY_WAR_PR51571(pi); - } - } else { - if (radioregs[i].do_init_g) { - write_radio_reg(pi, - radioregs[i]. - address | core_offset, - (u16) radioregs[i].init_g); - if (ISNPHY(pi) && (++count % 4 == 0)) - WLC_PHY_WAR_PR51571(pi); - } - } - - i++; - } while (radioregs[i].address != 0xffff); - - return i; -} - -void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) -{ -#define DUMMY_PKT_LEN 20 - d11regs_t *regs = pi->regs; - int i, count; - u8 ofdmpkt[DUMMY_PKT_LEN] = { - 0xcc, 0x01, 0x02, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 - }; - u8 cckpkt[DUMMY_PKT_LEN] = { - 0x6e, 0x84, 0x0b, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 - }; - u32 *dummypkt; - - dummypkt = (u32 *) (ofdm ? ofdmpkt : cckpkt); - wlapi_bmac_write_template_ram(pi->sh->physhim, 0, DUMMY_PKT_LEN, - dummypkt); - - W_REG(®s->xmtsel, 0); - - if (D11REV_GE(pi->sh->corerev, 11)) - W_REG(®s->wepctl, 0x100); - else - W_REG(®s->wepctl, 0); - - W_REG(®s->txe_phyctl, (ofdm ? 1 : 0) | PHY_TXC_ANT_0); - if (ISNPHY(pi) || ISLCNPHY(pi)) { - W_REG(®s->txe_phyctl1, 0x1A02); - } - - W_REG(®s->txe_wm_0, 0); - W_REG(®s->txe_wm_1, 0); - - W_REG(®s->xmttplatetxptr, 0); - W_REG(®s->xmttxcnt, DUMMY_PKT_LEN); - - W_REG(®s->xmtsel, ((8 << 8) | (1 << 5) | (1 << 2) | 2)); - - W_REG(®s->txe_ctl, 0); - - if (!pa_on) { - if (ISNPHY(pi)) - wlc_phy_pa_override_nphy(pi, OFF); - } - - if (ISNPHY(pi) || ISLCNPHY(pi)) - W_REG(®s->txe_aux, 0xD0); - else - W_REG(®s->txe_aux, ((1 << 5) | (1 << 4))); - - (void)R_REG(®s->txe_aux); - - i = 0; - count = ofdm ? 30 : 250; - - if (ISSIM_ENAB(pi->sh->sih)) { - count *= 100; - } - - while ((i++ < count) - && (R_REG(®s->txe_status) & (1 << 7))) { - udelay(10); - } - - i = 0; - - while ((i++ < 10) - && ((R_REG(®s->txe_status) & (1 << 10)) == 0)) { - udelay(10); - } - - i = 0; - - while ((i++ < 10) && ((R_REG(®s->ifsstat) & (1 << 8)))) - udelay(10); - - if (!pa_on) { - if (ISNPHY(pi)) - wlc_phy_pa_override_nphy(pi, ON); - } -} - -void wlc_phy_hold_upd(wlc_phy_t *pih, mbool id, bool set) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (set) { - mboolset(pi->measure_hold, id); - } else { - mboolclr(pi->measure_hold, id); - } - - return; -} - -void wlc_phy_mute_upd(wlc_phy_t *pih, bool mute, mbool flags) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (mute) { - mboolset(pi->measure_hold, PHY_HOLD_FOR_MUTE); - } else { - mboolclr(pi->measure_hold, PHY_HOLD_FOR_MUTE); - } - - if (!mute && (flags & PHY_MUTE_FOR_PREISM)) - pi->nphy_perical_last = pi->sh->now - pi->sh->glacial_timer; - return; -} - -void wlc_phy_clear_tssi(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (ISNPHY(pi)) { - return; - } else { - wlapi_bmac_write_shm(pi->sh->physhim, M_B_TSSI_0, NULL_TSSI_W); - wlapi_bmac_write_shm(pi->sh->physhim, M_B_TSSI_1, NULL_TSSI_W); - wlapi_bmac_write_shm(pi->sh->physhim, M_G_TSSI_0, NULL_TSSI_W); - wlapi_bmac_write_shm(pi->sh->physhim, M_G_TSSI_1, NULL_TSSI_W); - } -} - -static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi) -{ - return false; -} - -void wlc_phy_switch_radio(wlc_phy_t *pih, bool on) -{ - phy_info_t *pi = (phy_info_t *) pih; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - { - uint mc; - - mc = R_REG(&pi->regs->maccontrol); - } - - if (ISNPHY(pi)) { - wlc_phy_switch_radio_nphy(pi, on); - - } else if (ISLCNPHY(pi)) { - if (on) { - and_phy_reg(pi, 0x44c, - ~((0x1 << 8) | - (0x1 << 9) | - (0x1 << 10) | (0x1 << 11) | (0x1 << 12))); - and_phy_reg(pi, 0x4b0, ~((0x1 << 3) | (0x1 << 11))); - and_phy_reg(pi, 0x4f9, ~(0x1 << 3)); - } else { - and_phy_reg(pi, 0x44d, - ~((0x1 << 10) | - (0x1 << 11) | - (0x1 << 12) | (0x1 << 13) | (0x1 << 14))); - or_phy_reg(pi, 0x44c, - (0x1 << 8) | - (0x1 << 9) | - (0x1 << 10) | (0x1 << 11) | (0x1 << 12)); - - and_phy_reg(pi, 0x4b7, ~((0x7f << 8))); - and_phy_reg(pi, 0x4b1, ~((0x1 << 13))); - or_phy_reg(pi, 0x4b0, (0x1 << 3) | (0x1 << 11)); - and_phy_reg(pi, 0x4fa, ~((0x1 << 3))); - or_phy_reg(pi, 0x4f9, (0x1 << 3)); - } - } -} - -u16 wlc_phy_bw_state_get(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - return pi->bw; -} - -void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->bw = bw; -} - -void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch) -{ - phy_info_t *pi = (phy_info_t *) ppi; - pi->radio_chanspec = newch; - -} - -chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - return pi->radio_chanspec; -} - -void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec) -{ - phy_info_t *pi = (phy_info_t *) ppi; - u16 m_cur_channel; - chansetfn_t chanspec_set = NULL; - - m_cur_channel = CHSPEC_CHANNEL(chanspec); - if (CHSPEC_IS5G(chanspec)) - m_cur_channel |= D11_CURCHANNEL_5G; - if (CHSPEC_IS40(chanspec)) - m_cur_channel |= D11_CURCHANNEL_40; - wlapi_bmac_write_shm(pi->sh->physhim, M_CURCHANNEL, m_cur_channel); - - chanspec_set = pi->pi_fptr.chanset; - if (chanspec_set) - (*chanspec_set) (pi, chanspec); - -} - -int wlc_phy_chanspec_freq2bandrange_lpssn(uint freq) -{ - int range = -1; - - if (freq < 2500) - range = WL_CHAN_FREQ_RANGE_2G; - else if (freq <= 5320) - range = WL_CHAN_FREQ_RANGE_5GL; - else if (freq <= 5700) - range = WL_CHAN_FREQ_RANGE_5GM; - else - range = WL_CHAN_FREQ_RANGE_5GH; - - return range; -} - -int wlc_phy_chanspec_bandrange_get(phy_info_t *pi, chanspec_t chanspec) -{ - int range = -1; - uint channel = CHSPEC_CHANNEL(chanspec); - uint freq = wlc_phy_channel2freq(channel); - - if (ISNPHY(pi)) { - range = wlc_phy_get_chan_freq_range_nphy(pi, channel); - } else if (ISLCNPHY(pi)) { - range = wlc_phy_chanspec_freq2bandrange_lpssn(freq); - } - - return range; -} - -void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, bool wide_filter) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->channel_14_wide_filter = wide_filter; - -} - -int wlc_phy_channel2freq(uint channel) -{ - uint i; - - for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) - if (chan_info_all[i].chan == channel) - return chan_info_all[i].freq; - return 0; -} - -void -wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, chanvec_t *channels) -{ - phy_info_t *pi = (phy_info_t *) ppi; - uint i; - uint channel; - - memset(channels, 0, sizeof(chanvec_t)); - - for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { - channel = chan_info_all[i].chan; - - if ((pi->a_band_high_disable) && (channel >= FIRST_REF5_CHANNUM) - && (channel <= LAST_REF5_CHANNUM)) - continue; - - if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || - ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) - setbit(channels->vec, channel); - } -} - -chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band) -{ - phy_info_t *pi = (phy_info_t *) ppi; - uint i; - uint channel; - chanspec_t chspec; - - for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { - channel = chan_info_all[i].chan; - - if (ISNPHY(pi) && IS40MHZ(pi)) { - uint j; - - for (j = 0; j < ARRAY_SIZE(chan_info_all); j++) { - if (chan_info_all[j].chan == - channel + CH_10MHZ_APART) - break; - } - - if (j == ARRAY_SIZE(chan_info_all)) - continue; - - channel = UPPER_20_SB(channel); - chspec = - channel | WL_CHANSPEC_BW_40 | - WL_CHANSPEC_CTL_SB_LOWER; - if (band == WLC_BAND_2G) - chspec |= WL_CHANSPEC_BAND_2G; - else - chspec |= WL_CHANSPEC_BAND_5G; - } else - chspec = CH20MHZ_CHSPEC(channel); - - if ((pi->a_band_high_disable) && (channel >= FIRST_REF5_CHANNUM) - && (channel <= LAST_REF5_CHANNUM)) - continue; - - if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || - ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) - return chspec; - } - - return (chanspec_t) INVCHANSPEC; -} - -int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - *qdbm = pi->tx_user_target[0]; - if (override != NULL) - *override = pi->txpwroverride; - return 0; -} - -void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr) -{ - bool mac_enabled = false; - phy_info_t *pi = (phy_info_t *) ppi; - - memcpy(&pi->tx_user_target[TXP_FIRST_CCK], - &txpwr->cck[0], WLC_NUM_RATES_CCK); - - memcpy(&pi->tx_user_target[TXP_FIRST_OFDM], - &txpwr->ofdm[0], WLC_NUM_RATES_OFDM); - memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_20_CDD], - &txpwr->ofdm_cdd[0], WLC_NUM_RATES_OFDM); - - memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_SISO], - &txpwr->ofdm_40_siso[0], WLC_NUM_RATES_OFDM); - memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_CDD], - &txpwr->ofdm_40_cdd[0], WLC_NUM_RATES_OFDM); - - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SISO], - &txpwr->mcs_20_siso[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_CDD], - &txpwr->mcs_20_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_STBC], - &txpwr->mcs_20_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SDM], - &txpwr->mcs_20_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); - - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SISO], - &txpwr->mcs_40_siso[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_CDD], - &txpwr->mcs_40_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_STBC], - &txpwr->mcs_40_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); - memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SDM], - &txpwr->mcs_40_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); - - if (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) - mac_enabled = true; - - if (mac_enabled) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - wlc_phy_txpower_recalc_target(pi); - wlc_phy_cal_txpower_recalc_sw(pi); - - if (mac_enabled) - wlapi_enable_mac(pi->sh->physhim); -} - -int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) -{ - phy_info_t *pi = (phy_info_t *) ppi; - int i; - - if (qdbm > 127) - return 5; - - for (i = 0; i < TXP_NUM_RATES; i++) - pi->tx_user_target[i] = (u8) qdbm; - - pi->txpwroverride = false; - - if (pi->sh->up) { - if (!SCAN_INPROG_PHY(pi)) { - bool suspend; - - suspend = - (0 == - (R_REG(&pi->regs->maccontrol) & - MCTL_EN_MAC)); - - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - wlc_phy_txpower_recalc_target(pi); - wlc_phy_cal_txpower_recalc_sw(pi); - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - } - } - return 0; -} - -void -wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, - u8 *max_pwr, int txp_rate_idx) -{ - phy_info_t *pi = (phy_info_t *) ppi; - uint i; - - *min_pwr = pi->min_txpower * WLC_TXPWR_DB_FACTOR; - - if (ISNPHY(pi)) { - if (txp_rate_idx < 0) - txp_rate_idx = TXP_FIRST_CCK; - wlc_phy_txpower_sromlimit_get_nphy(pi, channel, max_pwr, - (u8) txp_rate_idx); - - } else if ((channel <= CH_MAX_2G_CHANNEL)) { - if (txp_rate_idx < 0) - txp_rate_idx = TXP_FIRST_CCK; - *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; - } else { - - *max_pwr = WLC_TXPWR_MAX; - - if (txp_rate_idx < 0) - txp_rate_idx = TXP_FIRST_OFDM; - - for (i = 0; i < ARRAY_SIZE(chan_info_all); i++) { - if (channel == chan_info_all[i].chan) { - break; - } - } - - if (pi->hwtxpwr) { - *max_pwr = pi->hwtxpwr[i]; - } else { - - if ((i >= FIRST_MID_5G_CHAN) && (i <= LAST_MID_5G_CHAN)) - *max_pwr = - pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; - if ((i >= FIRST_HIGH_5G_CHAN) - && (i <= LAST_HIGH_5G_CHAN)) - *max_pwr = - pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; - if ((i >= FIRST_LOW_5G_CHAN) && (i <= LAST_LOW_5G_CHAN)) - *max_pwr = - pi->tx_srom_max_rate_5g_low[txp_rate_idx]; - } - } -} - -void -wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, u8 *max_txpwr, - u8 *min_txpwr) -{ - phy_info_t *pi = (phy_info_t *) ppi; - u8 tx_pwr_max = 0; - u8 tx_pwr_min = 255; - u8 max_num_rate; - u8 maxtxpwr, mintxpwr, rate, pactrl; - - pactrl = 0; - - max_num_rate = ISNPHY(pi) ? TXP_NUM_RATES : - ISLCNPHY(pi) ? (TXP_LAST_SISO_MCS_20 + 1) : (TXP_LAST_OFDM + 1); - - for (rate = 0; rate < max_num_rate; rate++) { - - wlc_phy_txpower_sromlimit(ppi, chan, &mintxpwr, &maxtxpwr, - rate); - - maxtxpwr = (maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0; - - maxtxpwr = (maxtxpwr > 6) ? (maxtxpwr - 6) : 0; - - tx_pwr_max = max(tx_pwr_max, maxtxpwr); - tx_pwr_min = min(tx_pwr_min, maxtxpwr); - } - *max_txpwr = tx_pwr_max; - *min_txpwr = tx_pwr_min; -} - -void -wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint bandunit, s32 *max_pwr, - s32 *min_pwr, u32 *step_pwr) -{ - return; -} - -u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - return pi->tx_power_min; -} - -u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - return pi->tx_power_max; -} - -void wlc_phy_txpower_recalc_target(phy_info_t *pi) -{ - u8 maxtxpwr, mintxpwr, rate, pactrl; - uint target_chan; - u8 tx_pwr_target[TXP_NUM_RATES]; - u8 tx_pwr_max = 0; - u8 tx_pwr_min = 255; - u8 tx_pwr_max_rate_ind = 0; - u8 max_num_rate; - u8 start_rate = 0; - chanspec_t chspec; - u32 band = CHSPEC2WLC_BAND(pi->radio_chanspec); - initfn_t txpwr_recalc_fn = NULL; - - chspec = pi->radio_chanspec; - if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) - target_chan = CHSPEC_CHANNEL(chspec); - else if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) - target_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); - else - target_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); - - pactrl = 0; - if (ISLCNPHY(pi)) { - u32 offset_mcs, i; - - if (CHSPEC_IS40(pi->radio_chanspec)) { - offset_mcs = pi->mcs40_po; - for (i = TXP_FIRST_SISO_MCS_20; - i <= TXP_LAST_SISO_MCS_20; i++) { - pi->tx_srom_max_rate_2g[i - 8] = - pi->tx_srom_max_2g - - ((offset_mcs & 0xf) * 2); - offset_mcs >>= 4; - } - } else { - offset_mcs = pi->mcs20_po; - for (i = TXP_FIRST_SISO_MCS_20; - i <= TXP_LAST_SISO_MCS_20; i++) { - pi->tx_srom_max_rate_2g[i - 8] = - pi->tx_srom_max_2g - - ((offset_mcs & 0xf) * 2); - offset_mcs >>= 4; - } - } - } -#if WL11N - max_num_rate = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : - ((ISLCNPHY(pi)) ? - (TXP_LAST_SISO_MCS_20 + 1) : (TXP_LAST_OFDM + 1))); -#else - max_num_rate = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : (TXP_LAST_OFDM + 1)); -#endif - - wlc_phy_upd_env_txpwr_rate_limits(pi, band); - - for (rate = start_rate; rate < max_num_rate; rate++) { - - tx_pwr_target[rate] = pi->tx_user_target[rate]; - - if (pi->user_txpwr_at_rfport) { - tx_pwr_target[rate] += - wlc_user_txpwr_antport_to_rfport(pi, target_chan, - band, rate); - } - - { - - wlc_phy_txpower_sromlimit((wlc_phy_t *) pi, target_chan, - &mintxpwr, &maxtxpwr, rate); - - maxtxpwr = min(maxtxpwr, pi->txpwr_limit[rate]); - - maxtxpwr = - (maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0; - - maxtxpwr = (maxtxpwr > 6) ? (maxtxpwr - 6) : 0; - - maxtxpwr = min(maxtxpwr, tx_pwr_target[rate]); - - if (pi->txpwr_percent <= 100) - maxtxpwr = (maxtxpwr * pi->txpwr_percent) / 100; - - tx_pwr_target[rate] = max(maxtxpwr, mintxpwr); - } - - tx_pwr_target[rate] = - min(tx_pwr_target[rate], pi->txpwr_env_limit[rate]); - - if (tx_pwr_target[rate] > tx_pwr_max) - tx_pwr_max_rate_ind = rate; - - tx_pwr_max = max(tx_pwr_max, tx_pwr_target[rate]); - tx_pwr_min = min(tx_pwr_min, tx_pwr_target[rate]); - } - - memset(pi->tx_power_offset, 0, sizeof(pi->tx_power_offset)); - pi->tx_power_max = tx_pwr_max; - pi->tx_power_min = tx_pwr_min; - pi->tx_power_max_rate_ind = tx_pwr_max_rate_ind; - for (rate = 0; rate < max_num_rate; rate++) { - - pi->tx_power_target[rate] = tx_pwr_target[rate]; - - if (!pi->hwpwrctrl || ISNPHY(pi)) { - pi->tx_power_offset[rate] = - pi->tx_power_max - pi->tx_power_target[rate]; - } else { - pi->tx_power_offset[rate] = - pi->tx_power_target[rate] - pi->tx_power_min; - } - } - - txpwr_recalc_fn = pi->pi_fptr.txpwrrecalc; - if (txpwr_recalc_fn) - (*txpwr_recalc_fn) (pi); -} - -void -wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, - chanspec_t chanspec) -{ - u8 tmp_txpwr_limit[2 * WLC_NUM_RATES_OFDM]; - u8 *txpwr_ptr1 = NULL, *txpwr_ptr2 = NULL; - int rate_start_index = 0, rate1, rate2, k; - - for (rate1 = WL_TX_POWER_CCK_FIRST, rate2 = 0; - rate2 < WL_TX_POWER_CCK_NUM; rate1++, rate2++) - pi->txpwr_limit[rate1] = txpwr->cck[rate2]; - - for (rate1 = WL_TX_POWER_OFDM_FIRST, rate2 = 0; - rate2 < WL_TX_POWER_OFDM_NUM; rate1++, rate2++) - pi->txpwr_limit[rate1] = txpwr->ofdm[rate2]; - - if (ISNPHY(pi)) { - - for (k = 0; k < 4; k++) { - switch (k) { - case 0: - - txpwr_ptr1 = txpwr->mcs_20_siso; - txpwr_ptr2 = txpwr->ofdm; - rate_start_index = WL_TX_POWER_OFDM_FIRST; - break; - case 1: - - txpwr_ptr1 = txpwr->mcs_20_cdd; - txpwr_ptr2 = txpwr->ofdm_cdd; - rate_start_index = WL_TX_POWER_OFDM20_CDD_FIRST; - break; - case 2: - - txpwr_ptr1 = txpwr->mcs_40_siso; - txpwr_ptr2 = txpwr->ofdm_40_siso; - rate_start_index = - WL_TX_POWER_OFDM40_SISO_FIRST; - break; - case 3: - - txpwr_ptr1 = txpwr->mcs_40_cdd; - txpwr_ptr2 = txpwr->ofdm_40_cdd; - rate_start_index = WL_TX_POWER_OFDM40_CDD_FIRST; - break; - } - - for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { - tmp_txpwr_limit[rate2] = 0; - tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = - txpwr_ptr1[rate2]; - } - wlc_phy_mcs_to_ofdm_powers_nphy(tmp_txpwr_limit, 0, - WLC_NUM_RATES_OFDM - 1, - WLC_NUM_RATES_OFDM); - for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_OFDM; rate1++, rate2++) - pi->txpwr_limit[rate1] = - min(txpwr_ptr2[rate2], - tmp_txpwr_limit[rate2]); - } - - for (k = 0; k < 4; k++) { - switch (k) { - case 0: - - txpwr_ptr1 = txpwr->ofdm; - txpwr_ptr2 = txpwr->mcs_20_siso; - rate_start_index = WL_TX_POWER_MCS20_SISO_FIRST; - break; - case 1: - - txpwr_ptr1 = txpwr->ofdm_cdd; - txpwr_ptr2 = txpwr->mcs_20_cdd; - rate_start_index = WL_TX_POWER_MCS20_CDD_FIRST; - break; - case 2: - - txpwr_ptr1 = txpwr->ofdm_40_siso; - txpwr_ptr2 = txpwr->mcs_40_siso; - rate_start_index = WL_TX_POWER_MCS40_SISO_FIRST; - break; - case 3: - - txpwr_ptr1 = txpwr->ofdm_40_cdd; - txpwr_ptr2 = txpwr->mcs_40_cdd; - rate_start_index = WL_TX_POWER_MCS40_CDD_FIRST; - break; - } - for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { - tmp_txpwr_limit[rate2] = 0; - tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = - txpwr_ptr1[rate2]; - } - wlc_phy_ofdm_to_mcs_powers_nphy(tmp_txpwr_limit, 0, - WLC_NUM_RATES_OFDM - 1, - WLC_NUM_RATES_OFDM); - for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_1_STREAM; - rate1++, rate2++) - pi->txpwr_limit[rate1] = - min(txpwr_ptr2[rate2], - tmp_txpwr_limit[rate2]); - } - - for (k = 0; k < 2; k++) { - switch (k) { - case 0: - - rate_start_index = WL_TX_POWER_MCS20_STBC_FIRST; - txpwr_ptr1 = txpwr->mcs_20_stbc; - break; - case 1: - - rate_start_index = WL_TX_POWER_MCS40_STBC_FIRST; - txpwr_ptr1 = txpwr->mcs_40_stbc; - break; - } - for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_1_STREAM; - rate1++, rate2++) - pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; - } - - for (k = 0; k < 2; k++) { - switch (k) { - case 0: - - rate_start_index = WL_TX_POWER_MCS20_SDM_FIRST; - txpwr_ptr1 = txpwr->mcs_20_mimo; - break; - case 1: - - rate_start_index = WL_TX_POWER_MCS40_SDM_FIRST; - txpwr_ptr1 = txpwr->mcs_40_mimo; - break; - } - for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_2_STREAM; - rate1++, rate2++) - pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; - } - - pi->txpwr_limit[WL_TX_POWER_MCS_32] = txpwr->mcs32; - - pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST] = - min(pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST], - pi->txpwr_limit[WL_TX_POWER_MCS_32]); - pi->txpwr_limit[WL_TX_POWER_MCS_32] = - pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST]; - } -} - -void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->txpwr_percent = txpwr_percent; -} - -void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->sh->machwcap = machwcap; -} - -void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end) -{ - phy_info_t *pi = (phy_info_t *) ppi; - u16 rxc; - rxc = 0; - - if (start_end == ON) { - if (!ISNPHY(pi)) - return; - - if (NREV_IS(pi->pubpi.phy_rev, 3) - || NREV_IS(pi->pubpi.phy_rev, 4)) { - W_REG(&pi->regs->phyregaddr, 0xa0); - (void)R_REG(&pi->regs->phyregaddr); - rxc = R_REG(&pi->regs->phyregdata); - W_REG(&pi->regs->phyregdata, - (0x1 << 15) | rxc); - } - } else { - if (NREV_IS(pi->pubpi.phy_rev, 3) - || NREV_IS(pi->pubpi.phy_rev, 4)) { - W_REG(&pi->regs->phyregaddr, 0xa0); - (void)R_REG(&pi->regs->phyregaddr); - W_REG(&pi->regs->phyregdata, rxc); - } - - wlc_phy_por_inform(ppi); - } -} - -void -wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr, - chanspec_t chanspec) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - wlc_phy_txpower_reg_limit_calc(pi, txpwr, chanspec); - - if (ISLCNPHY(pi)) { - int i, j; - for (i = TXP_FIRST_OFDM_20_CDD, j = 0; - j < WLC_NUM_RATES_MCS_1_STREAM; i++, j++) { - if (txpwr->mcs_20_siso[j]) - pi->txpwr_limit[i] = txpwr->mcs_20_siso[j]; - else - pi->txpwr_limit[i] = txpwr->ofdm[j]; - } - } - - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - wlc_phy_txpower_recalc_target(pi); - wlc_phy_cal_txpower_recalc_sw(pi); - wlapi_enable_mac(pi->sh->physhim); -} - -void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->ofdm_rateset_war = war; -} - -void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->bf_preempt_4306 = bf_preempt; -} - -void wlc_phy_txpower_update_shm(phy_info_t *pi) -{ - int j; - if (ISNPHY(pi)) { - return; - } - - if (!pi->sh->clk) - return; - - if (pi->hwpwrctrl) { - u16 offset; - - wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_MAX, 63); - wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_N, - 1 << NUM_TSSI_FRAMES); - - wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_TARGET, - pi->tx_power_min << NUM_TSSI_FRAMES); - - wlapi_bmac_write_shm(pi->sh->physhim, M_TXPWR_CUR, - pi->hwpwr_txcur); - - for (j = TXP_FIRST_OFDM; j <= TXP_LAST_OFDM; j++) { - const u8 ucode_ofdm_rates[] = { - 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c - }; - offset = wlapi_bmac_rate_shm_offset(pi->sh->physhim, - ucode_ofdm_rates[j - - TXP_FIRST_OFDM]); - wlapi_bmac_write_shm(pi->sh->physhim, offset + 6, - pi->tx_power_offset[j]); - wlapi_bmac_write_shm(pi->sh->physhim, offset + 14, - -(pi->tx_power_offset[j] / 2)); - } - - wlapi_bmac_mhf(pi->sh->physhim, MHF2, MHF2_HWPWRCTL, - MHF2_HWPWRCTL, WLC_BAND_ALL); - } else { - int i; - - for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) - pi->tx_power_offset[i] = - (u8) roundup(pi->tx_power_offset[i], 8); - wlapi_bmac_write_shm(pi->sh->physhim, M_OFDM_OFFSET, - (u16) ((pi-> - tx_power_offset[TXP_FIRST_OFDM] - + 7) >> 3)); - } -} - -bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - if (ISNPHY(pi)) { - return pi->nphy_txpwrctrl; - } else { - return pi->hwpwrctrl; - } -} - -void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl) -{ - phy_info_t *pi = (phy_info_t *) ppi; - bool cur_hwpwrctrl = pi->hwpwrctrl; - bool suspend; - - if (!pi->hwpwrctrl_capable) { - return; - } - - pi->hwpwrctrl = hwpwrctrl; - pi->nphy_txpwrctrl = hwpwrctrl; - pi->txpwrctrl = hwpwrctrl; - - if (ISNPHY(pi)) { - suspend = - (0 == - (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); - if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { - wlc_phy_txpwr_fixpower_nphy(pi); - } else { - - mod_phy_reg(pi, 0x1e7, (0x7f << 0), - pi->saved_txpwr_idx); - } - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - } else if (hwpwrctrl != cur_hwpwrctrl) { - - return; - } -} - -void wlc_phy_txpower_ipa_upd(phy_info_t *pi) -{ - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - pi->ipa2g_on = (pi->srom_fem2g.extpagain == 2); - pi->ipa5g_on = (pi->srom_fem5g.extpagain == 2); - } else { - pi->ipa2g_on = false; - pi->ipa5g_on = false; - } -} - -static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi); - -static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) -{ - s16 tx0_status, tx1_status; - u16 estPower1, estPower2; - u8 pwr0, pwr1, adj_pwr0, adj_pwr1; - u32 est_pwr; - - estPower1 = read_phy_reg(pi, 0x118); - estPower2 = read_phy_reg(pi, 0x119); - - if ((estPower1 & (0x1 << 8)) - == (0x1 << 8)) { - pwr0 = (u8) (estPower1 & (0xff << 0)) - >> 0; - } else { - pwr0 = 0x80; - } - - if ((estPower2 & (0x1 << 8)) - == (0x1 << 8)) { - pwr1 = (u8) (estPower2 & (0xff << 0)) - >> 0; - } else { - pwr1 = 0x80; - } - - tx0_status = read_phy_reg(pi, 0x1ed); - tx1_status = read_phy_reg(pi, 0x1ee); - - if ((tx0_status & (0x1 << 15)) - == (0x1 << 15)) { - adj_pwr0 = (u8) (tx0_status & (0xff << 0)) - >> 0; - } else { - adj_pwr0 = 0x80; - } - if ((tx1_status & (0x1 << 15)) - == (0x1 << 15)) { - adj_pwr1 = (u8) (tx1_status & (0xff << 0)) - >> 0; - } else { - adj_pwr1 = 0x80; - } - - est_pwr = - (u32) ((pwr0 << 24) | (pwr1 << 16) | (adj_pwr0 << 8) | adj_pwr1); - return est_pwr; -} - -void -wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) -{ - phy_info_t *pi = (phy_info_t *) ppi; - uint rate, num_rates; - u8 min_pwr, max_pwr; - -#if WL_TX_POWER_RATES != TXP_NUM_RATES -#error "tx_power_t struct out of sync with this fn" -#endif - - if (ISNPHY(pi)) { - power->rf_cores = 2; - power->flags |= (WL_TX_POWER_F_MIMO); - if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) - power->flags |= - (WL_TX_POWER_F_ENABLED | WL_TX_POWER_F_HW); - } else if (ISLCNPHY(pi)) { - power->rf_cores = 1; - power->flags |= (WL_TX_POWER_F_SISO); - if (pi->radiopwr_override == RADIOPWR_OVERRIDE_DEF) - power->flags |= WL_TX_POWER_F_ENABLED; - if (pi->hwpwrctrl) - power->flags |= WL_TX_POWER_F_HW; - } - - num_rates = ((ISNPHY(pi)) ? (TXP_NUM_RATES) : - ((ISLCNPHY(pi)) ? - (TXP_LAST_OFDM_20_CDD + 1) : (TXP_LAST_OFDM + 1))); - - for (rate = 0; rate < num_rates; rate++) { - power->user_limit[rate] = pi->tx_user_target[rate]; - wlc_phy_txpower_sromlimit(ppi, channel, &min_pwr, &max_pwr, - rate); - power->board_limit[rate] = (u8) max_pwr; - power->target[rate] = pi->tx_power_target[rate]; - } - - if (ISNPHY(pi)) { - u32 est_pout; - - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_phyreg_enter((wlc_phy_t *) pi); - est_pout = wlc_phy_txpower_est_power_nphy(pi); - wlc_phyreg_exit((wlc_phy_t *) pi); - wlapi_enable_mac(pi->sh->physhim); - - power->est_Pout[0] = (est_pout >> 8) & 0xff; - power->est_Pout[1] = est_pout & 0xff; - - power->est_Pout_act[0] = est_pout >> 24; - power->est_Pout_act[1] = (est_pout >> 16) & 0xff; - - if (power->est_Pout[0] == 0x80) - power->est_Pout[0] = 0; - if (power->est_Pout[1] == 0x80) - power->est_Pout[1] = 0; - - if (power->est_Pout_act[0] == 0x80) - power->est_Pout_act[0] = 0; - if (power->est_Pout_act[1] == 0x80) - power->est_Pout_act[1] = 0; - - power->est_Pout_cck = 0; - - power->tx_power_max[0] = pi->tx_power_max; - power->tx_power_max[1] = pi->tx_power_max; - - power->tx_power_max_rate_ind[0] = pi->tx_power_max_rate_ind; - power->tx_power_max_rate_ind[1] = pi->tx_power_max_rate_ind; - } else if (!pi->hwpwrctrl) { - } else if (pi->sh->up) { - - wlc_phyreg_enter(ppi); - if (ISLCNPHY(pi)) { - - power->tx_power_max[0] = pi->tx_power_max; - power->tx_power_max[1] = pi->tx_power_max; - - power->tx_power_max_rate_ind[0] = - pi->tx_power_max_rate_ind; - power->tx_power_max_rate_ind[1] = - pi->tx_power_max_rate_ind; - - if (wlc_phy_tpc_isenabled_lcnphy(pi)) - power->flags |= - (WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED); - else - power->flags &= - ~(WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED); - - wlc_lcnphy_get_tssi(pi, (s8 *) &power->est_Pout[0], - (s8 *) &power->est_Pout_cck); - } - wlc_phyreg_exit(ppi); - } -} - -void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - pi->antsel_type = antsel_type; -} - -bool wlc_phy_test_ison(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - return pi->phytest_on; -} - -void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) -{ - phy_info_t *pi = (phy_info_t *) ppi; - bool suspend; - - pi->sh->rx_antdiv = val; - - if (!(ISNPHY(pi) && D11REV_IS(pi->sh->corerev, 16))) { - if (val > ANT_RX_DIV_FORCE_1) - wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, - MHF1_ANTDIV, WLC_BAND_ALL); - else - wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, 0, - WLC_BAND_ALL); - } - - if (ISNPHY(pi)) { - - return; - } - - if (!pi->sh->clk) - return; - - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - if (ISLCNPHY(pi)) { - if (val > ANT_RX_DIV_FORCE_1) { - mod_phy_reg(pi, 0x410, (0x1 << 1), 0x01 << 1); - mod_phy_reg(pi, 0x410, - (0x1 << 0), - ((ANT_RX_DIV_START_1 == val) ? 1 : 0) << 0); - } else { - mod_phy_reg(pi, 0x410, (0x1 << 1), 0x00 << 1); - mod_phy_reg(pi, 0x410, (0x1 << 0), (u16) val << 0); - } - } - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - - return; -} - -static bool -wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant) -{ - s8 cmplx_pwr_dbm[PHY_CORE_MAX]; - u8 i; - - memset((u8 *) cmplx_pwr_dbm, 0, sizeof(cmplx_pwr_dbm)); - wlc_phy_compute_dB(cmplx_pwr, cmplx_pwr_dbm, pi->pubpi.phy_corenum); - - for (i = 0; i < pi->pubpi.phy_corenum; i++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) - cmplx_pwr_dbm[i] += (s8) PHY_NOISE_OFFSETFACT_4322; - else - - cmplx_pwr_dbm[i] += (s8) (16 - (15) * 3 - 70); - } - - for (i = 0; i < pi->pubpi.phy_corenum; i++) { - pi->nphy_noise_win[i][pi->nphy_noise_index] = cmplx_pwr_dbm[i]; - pwr_ant[i] = cmplx_pwr_dbm[i]; - } - pi->nphy_noise_index = - MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ); - return true; -} - -static void -wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) -{ - phy_info_t *pi = (phy_info_t *) pih; - s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; - bool sampling_in_progress = (pi->phynoise_state != 0); - bool wait_for_intr = true; - - if (NORADIO_ENAB(pi->pubpi)) { - return; - } - - switch (reason) { - case PHY_NOISE_SAMPLE_MON: - - pi->phynoise_chan_watchdog = ch; - pi->phynoise_state |= PHY_NOISE_STATE_MON; - - break; - - case PHY_NOISE_SAMPLE_EXTERNAL: - - pi->phynoise_state |= PHY_NOISE_STATE_EXTERNAL; - break; - - default: - break; - } - - if (sampling_in_progress) - return; - - pi->phynoise_now = pi->sh->now; - - if (pi->phy_fixed_noise) { - if (ISNPHY(pi)) { - pi->nphy_noise_win[WL_ANT_IDX_1][pi->nphy_noise_index] = - PHY_NOISE_FIXED_VAL_NPHY; - pi->nphy_noise_win[WL_ANT_IDX_2][pi->nphy_noise_index] = - PHY_NOISE_FIXED_VAL_NPHY; - pi->nphy_noise_index = MODINC_POW2(pi->nphy_noise_index, - PHY_NOISE_WINDOW_SZ); - - noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; - } else { - - noise_dbm = PHY_NOISE_FIXED_VAL; - } - - wait_for_intr = false; - goto done; - } - - if (ISLCNPHY(pi)) { - if (!pi->phynoise_polling - || (reason == PHY_NOISE_SAMPLE_EXTERNAL)) { - wlapi_bmac_write_shm(pi->sh->physhim, M_JSSI_0, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP0, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP1, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP2, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP3, 0); - - OR_REG(&pi->regs->maccommand, - MCMD_BG_NOISE); - } else { - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_deaf_mode(pi, (bool) 0); - noise_dbm = (s8) wlc_lcnphy_rx_signal_power(pi, 20); - wlc_lcnphy_deaf_mode(pi, (bool) 1); - wlapi_enable_mac(pi->sh->physhim); - wait_for_intr = false; - } - } else if (ISNPHY(pi)) { - if (!pi->phynoise_polling - || (reason == PHY_NOISE_SAMPLE_EXTERNAL)) { - - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP0, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP1, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP2, 0); - wlapi_bmac_write_shm(pi->sh->physhim, M_PWRIND_MAP3, 0); - - OR_REG(&pi->regs->maccommand, - MCMD_BG_NOISE); - } else { - phy_iq_est_t est[PHY_CORE_MAX]; - u32 cmplx_pwr[PHY_CORE_MAX]; - s8 noise_dbm_ant[PHY_CORE_MAX]; - u16 log_num_samps, num_samps, classif_state = 0; - u8 wait_time = 32; - u8 wait_crs = 0; - u8 i; - - memset((u8 *) est, 0, sizeof(est)); - memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr)); - memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant)); - - log_num_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; - num_samps = 1 << log_num_samps; - - wlapi_suspend_mac_and_wait(pi->sh->physhim); - classif_state = wlc_phy_classifier_nphy(pi, 0, 0); - wlc_phy_classifier_nphy(pi, 3, 0); - wlc_phy_rx_iq_est_nphy(pi, est, num_samps, wait_time, - wait_crs); - wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); - wlapi_enable_mac(pi->sh->physhim); - - for (i = 0; i < pi->pubpi.phy_corenum; i++) - cmplx_pwr[i] = - (est[i].i_pwr + - est[i].q_pwr) >> log_num_samps; - - wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant); - - for (i = 0; i < pi->pubpi.phy_corenum; i++) { - pi->nphy_noise_win[i][pi->nphy_noise_index] = - noise_dbm_ant[i]; - - if (noise_dbm_ant[i] > noise_dbm) - noise_dbm = noise_dbm_ant[i]; - } - pi->nphy_noise_index = MODINC_POW2(pi->nphy_noise_index, - PHY_NOISE_WINDOW_SZ); - - wait_for_intr = false; - } - } - - done: - - if (!wait_for_intr) - wlc_phy_noise_cb(pi, ch, noise_dbm); - -} - -void wlc_phy_noise_sample_request_external(wlc_phy_t *pih) -{ - u8 channel; - - channel = CHSPEC_CHANNEL(wlc_phy_chanspec_get(pih)); - - wlc_phy_noise_sample_request(pih, PHY_NOISE_SAMPLE_EXTERNAL, channel); -} - -static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm) -{ - if (!pi->phynoise_state) - return; - - if (pi->phynoise_state & PHY_NOISE_STATE_MON) { - if (pi->phynoise_chan_watchdog == channel) { - pi->sh->phy_noise_window[pi->sh->phy_noise_index] = - noise_dbm; - pi->sh->phy_noise_index = - MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ); - } - pi->phynoise_state &= ~PHY_NOISE_STATE_MON; - } - - if (pi->phynoise_state & PHY_NOISE_STATE_EXTERNAL) { - pi->phynoise_state &= ~PHY_NOISE_STATE_EXTERNAL; - } - -} - -static s8 wlc_phy_noise_read_shmem(phy_info_t *pi) -{ - u32 cmplx_pwr[PHY_CORE_MAX]; - s8 noise_dbm_ant[PHY_CORE_MAX]; - u16 lo, hi; - u32 cmplx_pwr_tot = 0; - s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; - u8 idx, core; - - memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr)); - memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant)); - - for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2, core++) { - lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx)); - hi = wlapi_bmac_read_shm(pi->sh->physhim, - M_PWRIND_MAP(idx + 1)); - cmplx_pwr[core] = (hi << 16) + lo; - cmplx_pwr_tot += cmplx_pwr[core]; - if (cmplx_pwr[core] == 0) { - noise_dbm_ant[core] = PHY_NOISE_FIXED_VAL_NPHY; - } else - cmplx_pwr[core] >>= PHY_NOISE_SAMPLE_LOG_NUM_UCODE; - } - - if (cmplx_pwr_tot != 0) - wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant); - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - pi->nphy_noise_win[core][pi->nphy_noise_index] = - noise_dbm_ant[core]; - - if (noise_dbm_ant[core] > noise_dbm) - noise_dbm = noise_dbm_ant[core]; - } - pi->nphy_noise_index = - MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ); - - return noise_dbm; - -} - -void wlc_phy_noise_sample_intr(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - u16 jssi_aux; - u8 channel = 0; - s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; - - if (ISLCNPHY(pi)) { - u32 cmplx_pwr, cmplx_pwr0, cmplx_pwr1; - u16 lo, hi; - s32 pwr_offset_dB, gain_dB; - u16 status_0, status_1; - - jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX); - channel = jssi_aux & D11_CURCHANNEL_MAX; - - lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP0); - hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP1); - cmplx_pwr0 = (hi << 16) + lo; - - lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP2); - hi = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP3); - cmplx_pwr1 = (hi << 16) + lo; - cmplx_pwr = (cmplx_pwr0 + cmplx_pwr1) >> 6; - - status_0 = 0x44; - status_1 = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_0); - if ((cmplx_pwr > 0 && cmplx_pwr < 500) - && ((status_1 & 0xc000) == 0x4000)) { - - wlc_phy_compute_dB(&cmplx_pwr, &noise_dbm, - pi->pubpi.phy_corenum); - pwr_offset_dB = (read_phy_reg(pi, 0x434) & 0xFF); - if (pwr_offset_dB > 127) - pwr_offset_dB -= 256; - - noise_dbm += (s8) (pwr_offset_dB - 30); - - gain_dB = (status_0 & 0x1ff); - noise_dbm -= (s8) (gain_dB); - } else { - noise_dbm = PHY_NOISE_FIXED_VAL_LCNPHY; - } - } else if (ISNPHY(pi)) { - - jssi_aux = wlapi_bmac_read_shm(pi->sh->physhim, M_JSSI_AUX); - channel = jssi_aux & D11_CURCHANNEL_MAX; - - noise_dbm = wlc_phy_noise_read_shmem(pi); - } - - wlc_phy_noise_cb(pi, channel, noise_dbm); - -} - -s8 lcnphy_gain_index_offset_for_pkt_rssi[] = { - 8, - 8, - 8, - 8, - 8, - 8, - 8, - 9, - 10, - 8, - 8, - 7, - 7, - 1, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 2, - 1, - 1, - 0, - 0, - 0, - 0 -}; - -void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_cmplx_pwr_dB, u8 core) -{ - u8 msb, secondmsb, i; - u32 tmp; - - for (i = 0; i < core; i++) { - secondmsb = 0; - tmp = cmplx_pwr[i]; - msb = fls(tmp); - if (msb) - secondmsb = (u8) ((tmp >> (--msb - 1)) & 1); - p_cmplx_pwr_dB[i] = (s8) (3 * msb + 2 * secondmsb); - } -} - -void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx) -{ - wlc_d11rxhdr_t *wlc_rxhdr = (wlc_d11rxhdr_t *) ctx; - d11rxhdr_t *rxh = &wlc_rxhdr->rxhdr; - int rssi = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_JSSI_MASK; - uint radioid = pih->radioid; - phy_info_t *pi = (phy_info_t *) pih; - - if (NORADIO_ENAB(pi->pubpi)) { - rssi = WLC_RSSI_INVALID; - goto end; - } - - if ((pi->sh->corerev >= 11) - && !(le16_to_cpu(rxh->RxStatus2) & RXS_PHYRXST_VALID)) { - rssi = WLC_RSSI_INVALID; - goto end; - } - - if (ISLCNPHY(pi)) { - u8 gidx = (le16_to_cpu(rxh->PhyRxStatus_2) & 0xFC00) >> 10; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (rssi > 127) - rssi -= 256; - - rssi = rssi + lcnphy_gain_index_offset_for_pkt_rssi[gidx]; - if ((rssi > -46) && (gidx > 18)) - rssi = rssi + 7; - - rssi = rssi + pi_lcn->lcnphy_pkteng_rssi_slope; - - rssi = rssi + 2; - - } - - if (ISLCNPHY(pi)) { - - if (rssi > 127) - rssi -= 256; - } else if (radioid == BCM2055_ID || radioid == BCM2056_ID - || radioid == BCM2057_ID) { - rssi = wlc_phy_rssi_compute_nphy(pi, wlc_rxhdr); - } - - end: - wlc_rxhdr->rssi = (s8) rssi; -} - -void wlc_phy_freqtrack_start(wlc_phy_t *pih) -{ - return; -} - -void wlc_phy_freqtrack_end(wlc_phy_t *pih) -{ - return; -} - -void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag) -{ - phy_info_t *pi; - pi = (phy_info_t *) ppi; - - if (ISLCNPHY(pi)) - wlc_lcnphy_deaf_mode(pi, true); - else if (ISNPHY(pi)) - wlc_nphy_deaf_mode(pi, true); -} - -void wlc_phy_watchdog(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - bool delay_phy_cal = false; - pi->sh->now++; - - if (!pi->watchdog_override) - return; - - if (!(SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi))) { - wlc_phy_noise_sample_request((wlc_phy_t *) pi, - PHY_NOISE_SAMPLE_MON, - CHSPEC_CHANNEL(pi-> - radio_chanspec)); - } - - if (pi->phynoise_state && (pi->sh->now - pi->phynoise_now) > 5) { - pi->phynoise_state = 0; - } - - if ((!pi->phycal_txpower) || - ((pi->sh->now - pi->phycal_txpower) >= pi->sh->fast_timer)) { - - if (!SCAN_INPROG_PHY(pi) && wlc_phy_cal_txpower_recalc_sw(pi)) { - pi->phycal_txpower = pi->sh->now; - } - } - - if (NORADIO_ENAB(pi->pubpi)) - return; - - if ((SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) - || ASSOC_INPROG_PHY(pi))) - return; - - if (ISNPHY(pi) && !pi->disable_percal && !delay_phy_cal) { - - if ((pi->nphy_perical != PHY_PERICAL_DISABLE) && - (pi->nphy_perical != PHY_PERICAL_MANUAL) && - ((pi->sh->now - pi->nphy_perical_last) >= - pi->sh->glacial_timer)) - wlc_phy_cal_perical((wlc_phy_t *) pi, - PHY_PERICAL_WATCHDOG); - - wlc_phy_txpwr_papd_cal_nphy(pi); - } - - if (ISLCNPHY(pi)) { - if (pi->phy_forcecal || - ((pi->sh->now - pi->phy_lastcal) >= - pi->sh->glacial_timer)) { - if (!(SCAN_RM_IN_PROGRESS(pi) || ASSOC_INPROG_PHY(pi))) - wlc_lcnphy_calib_modes(pi, - LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL); - if (! - (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) - || ASSOC_INPROG_PHY(pi) - || pi->carrier_suppr_disable - || pi->disable_percal)) - wlc_lcnphy_calib_modes(pi, - PHY_PERICAL_WATCHDOG); - } - } -} - -void wlc_phy_BSSinit(wlc_phy_t *pih, bool bonlyap, int rssi) -{ - phy_info_t *pi = (phy_info_t *) pih; - uint i; - uint k; - - for (i = 0; i < MA_WINDOW_SZ; i++) { - pi->sh->phy_noise_window[i] = (s8) (rssi & 0xff); - } - if (ISLCNPHY(pi)) { - for (i = 0; i < MA_WINDOW_SZ; i++) - pi->sh->phy_noise_window[i] = - PHY_NOISE_FIXED_VAL_LCNPHY; - } - pi->sh->phy_noise_index = 0; - - for (i = 0; i < PHY_NOISE_WINDOW_SZ; i++) { - for (k = WL_ANT_IDX_1; k < WL_ANT_RX_MAX; k++) - pi->nphy_noise_win[k][i] = PHY_NOISE_FIXED_VAL_NPHY; - } - pi->nphy_noise_index = 0; -} - -void -wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real, s32 *eps_imag) -{ - *eps_imag = (epsilon >> 13); - if (*eps_imag > 0xfff) - *eps_imag -= 0x2000; - - *eps_real = (epsilon & 0x1fff); - if (*eps_real > 0xfff) - *eps_real -= 0x2000; -} - -static const fixed AtanTbl[] = { - 2949120, - 1740967, - 919879, - 466945, - 234379, - 117304, - 58666, - 29335, - 14668, - 7334, - 3667, - 1833, - 917, - 458, - 229, - 115, - 57, - 29 -}; - -void wlc_phy_cordic(fixed theta, cs32 *val) -{ - fixed angle, valtmp; - unsigned iter; - int signx = 1; - int signtheta; - - val[0].i = CORDIC_AG; - val[0].q = 0; - angle = 0; - - signtheta = (theta < 0) ? -1 : 1; - theta = - ((theta + FIXED(180) * signtheta) % FIXED(360)) - - FIXED(180) * signtheta; - - if (FLOAT(theta) > 90) { - theta -= FIXED(180); - signx = -1; - } else if (FLOAT(theta) < -90) { - theta += FIXED(180); - signx = -1; - } - - for (iter = 0; iter < CORDIC_NI; iter++) { - if (theta > angle) { - valtmp = val[0].i - (val[0].q >> iter); - val[0].q = (val[0].i >> iter) + val[0].q; - val[0].i = valtmp; - angle += AtanTbl[iter]; - } else { - valtmp = val[0].i + (val[0].q >> iter); - val[0].q = -(val[0].i >> iter) + val[0].q; - val[0].i = valtmp; - angle -= AtanTbl[iter]; - } - } - - val[0].i = val[0].i * signx; - val[0].q = val[0].q * signx; -} - -void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi) -{ - wlapi_del_timer(pi->sh->physhim, pi->phycal_timer); - - pi->cal_type_override = PHY_PERICAL_AUTO; - pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; - pi->mphase_txcal_cmdidx = 0; -} - -static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay) -{ - - if ((pi->nphy_perical != PHY_PERICAL_MPHASE) && - (pi->nphy_perical != PHY_PERICAL_MANUAL)) - return; - - wlapi_del_timer(pi->sh->physhim, pi->phycal_timer); - - pi->mphase_cal_phase_id = MPHASE_CAL_STATE_INIT; - wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); -} - -void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) -{ - s16 nphy_currtemp = 0; - s16 delta_temp = 0; - bool do_periodic_cal = true; - phy_info_t *pi = (phy_info_t *) pih; - - if (!ISNPHY(pi)) - return; - - if ((pi->nphy_perical == PHY_PERICAL_DISABLE) || - (pi->nphy_perical == PHY_PERICAL_MANUAL)) - return; - - switch (reason) { - case PHY_PERICAL_DRIVERUP: - break; - - case PHY_PERICAL_PHYINIT: - if (pi->nphy_perical == PHY_PERICAL_MPHASE) { - if (PHY_PERICAL_MPHASE_PENDING(pi)) { - wlc_phy_cal_perical_mphase_reset(pi); - } - wlc_phy_cal_perical_mphase_schedule(pi, - PHY_PERICAL_INIT_DELAY); - } - break; - - case PHY_PERICAL_JOIN_BSS: - case PHY_PERICAL_START_IBSS: - case PHY_PERICAL_UP_BSS: - if ((pi->nphy_perical == PHY_PERICAL_MPHASE) && - PHY_PERICAL_MPHASE_PENDING(pi)) { - wlc_phy_cal_perical_mphase_reset(pi); - } - - pi->first_cal_after_assoc = true; - - pi->cal_type_override = PHY_PERICAL_FULL; - - if (pi->phycal_tempdelta) { - pi->nphy_lastcal_temp = wlc_phy_tempsense_nphy(pi); - } - wlc_phy_cal_perical_nphy_run(pi, PHY_PERICAL_FULL); - break; - - case PHY_PERICAL_WATCHDOG: - if (pi->phycal_tempdelta) { - nphy_currtemp = wlc_phy_tempsense_nphy(pi); - delta_temp = - (nphy_currtemp > pi->nphy_lastcal_temp) ? - nphy_currtemp - pi->nphy_lastcal_temp : - pi->nphy_lastcal_temp - nphy_currtemp; - - if ((delta_temp < (s16) pi->phycal_tempdelta) && - (pi->nphy_txiqlocal_chanspec == - pi->radio_chanspec)) { - do_periodic_cal = false; - } else { - pi->nphy_lastcal_temp = nphy_currtemp; - } - } - - if (do_periodic_cal) { - - if (pi->nphy_perical == PHY_PERICAL_MPHASE) { - - if (!PHY_PERICAL_MPHASE_PENDING(pi)) - wlc_phy_cal_perical_mphase_schedule(pi, - PHY_PERICAL_WDOG_DELAY); - } else if (pi->nphy_perical == PHY_PERICAL_SPHASE) - wlc_phy_cal_perical_nphy_run(pi, - PHY_PERICAL_AUTO); - } - break; - default: - break; - } -} - -void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi) -{ - pi->mphase_cal_phase_id = MPHASE_CAL_STATE_INIT; - pi->mphase_txcal_cmdidx = 0; -} - -u8 wlc_phy_nbits(s32 value) -{ - s32 abs_val; - u8 nbits = 0; - - abs_val = ABS(value); - while ((abs_val >> nbits) > 0) - nbits++; - - return nbits; -} - -void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, u8 rxchain) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->sh->hw_phytxchain = txchain; - pi->sh->hw_phyrxchain = rxchain; - pi->sh->phytxchain = txchain; - pi->sh->phyrxchain = rxchain; - pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); -} - -void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, u8 rxchain) -{ - phy_info_t *pi = (phy_info_t *) pih; - - pi->sh->phytxchain = txchain; - - if (ISNPHY(pi)) { - wlc_phy_rxcore_setstate_nphy(pih, rxchain); - } - pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); -} - -void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, u8 *rxchain) -{ - phy_info_t *pi = (phy_info_t *) pih; - - *txchain = pi->sh->phytxchain; - *rxchain = pi->sh->phyrxchain; -} - -u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) -{ - s16 nphy_currtemp; - u8 active_bitmap; - phy_info_t *pi = (phy_info_t *) pih; - - active_bitmap = (pi->phy_txcore_heatedup) ? 0x31 : 0x33; - - if (!pi->watchdog_override) - return active_bitmap; - - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - wlapi_suspend_mac_and_wait(pi->sh->physhim); - nphy_currtemp = wlc_phy_tempsense_nphy(pi); - wlapi_enable_mac(pi->sh->physhim); - - if (!pi->phy_txcore_heatedup) { - if (nphy_currtemp >= pi->phy_txcore_disable_temp) { - active_bitmap &= 0xFD; - pi->phy_txcore_heatedup = true; - } - } else { - if (nphy_currtemp <= pi->phy_txcore_enable_temp) { - active_bitmap |= 0x2; - pi->phy_txcore_heatedup = false; - } - } - } - - return active_bitmap; -} - -s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec) -{ - phy_info_t *pi = (phy_info_t *) pih; - u8 siso_mcs_id, cdd_mcs_id; - - siso_mcs_id = - (CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_SISO : - TXP_FIRST_MCS_20_SISO; - cdd_mcs_id = - (CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_CDD : - TXP_FIRST_MCS_20_CDD; - - if (pi->tx_power_target[siso_mcs_id] > - (pi->tx_power_target[cdd_mcs_id] + 12)) - return PHY_TXC1_MODE_SISO; - else - return PHY_TXC1_MODE_CDD; -} - -const u8 *wlc_phy_get_ofdm_rate_lookup(void) -{ - return ofdm_rate_lookup; -} - -void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode) -{ - if ((pi->sh->chip == BCM4313_CHIP_ID) && - (pi->sh->boardflags & BFL_FEM)) { - if (mode) { - u16 txant = 0; - txant = wlapi_bmac_get_txant(pi->sh->physhim); - if (txant == 1) { - mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x44c, (0x1 << 2), (1) << 2); - - } - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpiocontrol), ~0x0, - 0x0); - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpioout), 0x40, 0x40); - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpioouten), 0x40, - 0x40); - } else { - mod_phy_reg(pi, 0x44c, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, 0x44d, (0x1 << 2), (0) << 2); - - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpioout), 0x40, 0x00); - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpioouten), 0x40, 0x0); - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, gpiocontrol), ~0x0, - 0x40); - } - } -} - -static s8 -wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, u32 band, - u8 rate) -{ - s8 offset = 0; - - if (!pi->user_txpwr_at_rfport) - return offset; - return offset; -} - -static s8 wlc_phy_env_measure_vbat(phy_info_t *pi) -{ - if (ISLCNPHY(pi)) - return wlc_lcnphy_vbatsense(pi, 0); - else - return 0; -} - -static s8 wlc_phy_env_measure_temperature(phy_info_t *pi) -{ - if (ISLCNPHY(pi)) - return wlc_lcnphy_tempsense_degree(pi, 0); - else - return 0; -} - -static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band) -{ - u8 i; - s8 temp, vbat; - - for (i = 0; i < TXP_NUM_RATES; i++) - pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; - - vbat = wlc_phy_env_measure_vbat(pi); - temp = wlc_phy_env_measure_temperature(pi); - -} - -void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool ldpc) -{ - return; -} - -void -wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, s8 *ofdmoffset) -{ - *cckoffset = 0; - *ofdmoffset = 0; -} - -s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, chanspec_t chanspec) -{ - - return rssi; -} - -bool wlc_phy_txpower_ipa_ison(wlc_phy_t *ppi) -{ - phy_info_t *pi = (phy_info_t *) ppi; - - if (ISNPHY(pi)) - return wlc_phy_n_txpower_ipa_ison(pi); - else - return 0; -} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h deleted file mode 100644 index 4d03933..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/* - * phy_hal.h: functionality exported from the phy to higher layers - */ - -#ifndef _BRCM_PHY_HAL_H_ -#define _BRCM_PHY_HAL_H_ - -#include -#include -#include -#include /* struct wiphy */ -#include "brcmu_wifi.h" /* chanspec_t */ - -#define IDCODE_VER_MASK 0x0000000f -#define IDCODE_VER_SHIFT 0 -#define IDCODE_MFG_MASK 0x00000fff -#define IDCODE_MFG_SHIFT 0 -#define IDCODE_ID_MASK 0x0ffff000 -#define IDCODE_ID_SHIFT 12 -#define IDCODE_REV_MASK 0xf0000000 -#define IDCODE_REV_SHIFT 28 - -#define NORADIO_ID 0xe4f5 -#define NORADIO_IDCODE 0x4e4f5246 - -#define BCM2055_ID 0x2055 -#define BCM2055_IDCODE 0x02055000 -#define BCM2055A0_IDCODE 0x1205517f - -#define BCM2056_ID 0x2056 -#define BCM2056_IDCODE 0x02056000 -#define BCM2056A0_IDCODE 0x1205617f - -#define BCM2057_ID 0x2057 -#define BCM2057_IDCODE 0x02057000 -#define BCM2057A0_IDCODE 0x1205717f - -#define BCM2064_ID 0x2064 -#define BCM2064_IDCODE 0x02064000 -#define BCM2064A0_IDCODE 0x0206417f - -#define PHY_TPC_HW_OFF false -#define PHY_TPC_HW_ON true - -#define PHY_PERICAL_DRIVERUP 1 -#define PHY_PERICAL_WATCHDOG 2 -#define PHY_PERICAL_PHYINIT 3 -#define PHY_PERICAL_JOIN_BSS 4 -#define PHY_PERICAL_START_IBSS 5 -#define PHY_PERICAL_UP_BSS 6 -#define PHY_PERICAL_CHAN 7 -#define PHY_FULLCAL 8 - -#define PHY_PERICAL_DISABLE 0 -#define PHY_PERICAL_SPHASE 1 -#define PHY_PERICAL_MPHASE 2 -#define PHY_PERICAL_MANUAL 3 - -#define PHY_HOLD_FOR_ASSOC 1 -#define PHY_HOLD_FOR_SCAN 2 -#define PHY_HOLD_FOR_RM 4 -#define PHY_HOLD_FOR_PLT 8 -#define PHY_HOLD_FOR_MUTE 16 -#define PHY_HOLD_FOR_NOT_ASSOC 0x20 - -#define PHY_MUTE_FOR_PREISM 1 -#define PHY_MUTE_ALL 0xffffffff - -#define PHY_NOISE_FIXED_VAL (-95) -#define PHY_NOISE_FIXED_VAL_NPHY (-92) -#define PHY_NOISE_FIXED_VAL_LCNPHY (-92) - -#define PHY_MODE_CAL 0x0002 -#define PHY_MODE_NOISEM 0x0004 - -#define WLC_TXPWR_DB_FACTOR 4 - -/* a large TX Power as an init value to factor out of min() calculations, - * keep low enough to fit in an s8, units are .25 dBm - */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ - -#define WLC_NUM_RATES_CCK 4 -#define WLC_NUM_RATES_OFDM 8 -#define WLC_NUM_RATES_MCS_1_STREAM 8 -#define WLC_NUM_RATES_MCS_2_STREAM 8 -#define WLC_NUM_RATES_MCS_3_STREAM 8 -#define WLC_NUM_RATES_MCS_4_STREAM 8 - -#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ - -typedef struct txpwr_limits { - u8 cck[WLC_NUM_RATES_CCK]; - u8 ofdm[WLC_NUM_RATES_OFDM]; - - u8 ofdm_cdd[WLC_NUM_RATES_OFDM]; - - u8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; - u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; - - u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - - u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - u8 mcs32; -} txpwr_limits_t; - -typedef struct { - u32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - u8 local_max; /* local max according to the AP */ - u8 local_constraint; /* local constraint according to the AP */ - s8 antgain[2]; /* Ant gain for each band - from SROM */ - u8 rf_cores; /* count of RF Cores being reported */ - u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ - u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain - * without adjustment - */ - u8 est_Pout_cck; /* Latest CCK tx power out estimate */ - u8 tx_power_max[4]; /* Maximum target power among all rates */ - u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ - u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ - u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ - u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ - u8 target[WL_TX_POWER_RATES]; /* Latest target power */ -} tx_power_t; - -typedef struct tx_inst_power { - u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_inst_power_t; - -typedef struct { - u8 vec[MAXCHANNEL / NBBY]; -} chanvec_t; - -struct rpc_info; -typedef struct shared_phy shared_phy_t; - -struct phy_pub; - -typedef struct phy_pub wlc_phy_t; - -typedef struct shared_phy_params { - struct si_pub *sih; - void *physhim; - uint unit; - uint corerev; - uint bustype; - uint buscorerev; - char *vars; - u16 vid; - u16 did; - uint chip; - uint chiprev; - uint chippkg; - uint sromrev; - uint boardtype; - uint boardrev; - uint boardvendor; - u32 boardflags; - u32 boardflags2; -} shared_phy_params_t; - - -extern shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp); -extern void wlc_phy_shared_detach(shared_phy_t *phy_sh); -extern wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, - char *vars, struct wiphy *wiphy); -extern void wlc_phy_detach(wlc_phy_t *ppi); - -extern bool wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, - u16 *phyrev, u16 *radioid, - u16 *radiover); -extern bool wlc_phy_get_encore(wlc_phy_t *pih); -extern u32 wlc_phy_get_coreflags(wlc_phy_t *pih); - -extern void wlc_phy_hw_clk_state_upd(wlc_phy_t *ppi, bool newstate); -extern void wlc_phy_hw_state_upd(wlc_phy_t *ppi, bool newstate); -extern void wlc_phy_init(wlc_phy_t *ppi, chanspec_t chanspec); -extern void wlc_phy_watchdog(wlc_phy_t *ppi); -extern int wlc_phy_down(wlc_phy_t *ppi); -extern u32 wlc_phy_clk_bwbits(wlc_phy_t *pih); -extern void wlc_phy_cal_init(wlc_phy_t *ppi); -extern void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init); - -extern void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec); -extern chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi); -extern void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch); -extern u16 wlc_phy_bw_state_get(wlc_phy_t *ppi); -extern void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw); - -extern void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx); -extern void wlc_phy_por_inform(wlc_phy_t *ppi); -extern void wlc_phy_noise_sample_intr(wlc_phy_t *ppi); -extern bool wlc_phy_bist_check_phy(wlc_phy_t *ppi); - -extern void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag); - -extern void wlc_phy_switch_radio(wlc_phy_t *ppi, bool on); -extern void wlc_phy_anacore(wlc_phy_t *ppi, bool on); - - -extern void wlc_phy_BSSinit(wlc_phy_t *ppi, bool bonlyap, int rssi); - -extern void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, - bool wide_filter); -extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, - chanvec_t *channels); -extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band); - -extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan, - u8 *_min_, u8 *_max_, int rate); -extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, - u8 *_max_, u8 *_min_); -extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, s32 *, - s32 *, u32 *); -extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *, - chanspec_t chanspec); -extern int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override); -extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override); -extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *); -extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi); -extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl); -extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); -extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); -extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih); - -extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, - u8 rxchain); -extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, - u8 rxchain); -extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, - u8 *rxchain); -extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); -extern s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec); -extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val); - -extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason); -extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi); -extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); -extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); - -extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); -extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); -extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); -extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); - -extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type); - -extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, - uint channel); - -extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal); -extern bool wlc_phy_test_ison(wlc_phy_t *ppi); -extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent); -extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war); -extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt); -extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap); - -extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end); - -extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi); -extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi); - -extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); - -extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, - u8 mcs_offset); -extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); -#endif /* _BRCM_PHY_HAL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h deleted file mode 100644 index ce417e6..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ /dev/null @@ -1,1235 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_PHY_INT_H_ -#define _BRCM_PHY_INT_H_ - -#include -#include -#include - -#include - -#define PHY_VERSION { 1, 82, 8, 0 } - -#define PHYHAL_ERROR 0x0001 -#define PHYHAL_TRACE 0x0002 -#define PHYHAL_INFORM 0x0004 - -extern u32 phyhal_msg_level; - -#define PHY_INFORM_ON() (phyhal_msg_level & PHYHAL_INFORM) -#define PHY_THERMAL_ON() (phyhal_msg_level & PHYHAL_THERMAL) -#define PHY_CAL_ON() (phyhal_msg_level & PHYHAL_CAL) - -#ifdef BOARD_TYPE -#define BOARDTYPE(_type) BOARD_TYPE -#else -#define BOARDTYPE(_type) _type -#endif - -#define LCNXN_BASEREV 16 - -typedef struct { - u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ - u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ - u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ - u8 triso; /* TR switch isolation */ - u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ -} wlc_phy_srom_fem_t; - -struct wlc_hw_info; -typedef struct phy_info phy_info_t; -typedef void (*initfn_t) (phy_info_t *); -typedef void (*chansetfn_t) (phy_info_t *, chanspec_t); -typedef int (*longtrnfn_t) (phy_info_t *, int); -typedef void (*txiqccgetfn_t) (phy_info_t *, u16 *, u16 *); -typedef void (*txiqccsetfn_t) (phy_info_t *, u16, u16); -typedef u16(*txloccgetfn_t) (phy_info_t *); -typedef void (*radioloftgetfn_t) (phy_info_t *, u8 *, u8 *, u8 *, - u8 *); -typedef s32(*rxsigpwrfn_t) (phy_info_t *, s32); -typedef void (*detachfn_t) (phy_info_t *); - -#undef ISNPHY -#undef ISLCNPHY -#define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N) -#define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN) - -#define ISPHY_11N_CAP(pi) (ISNPHY(pi) || ISLCNPHY(pi)) - -#define IS20MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_20) -#define IS40MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_40) - -#define PHY_GET_RFATTN(rfgain) ((rfgain) & 0x0f) -#define PHY_GET_PADMIX(rfgain) (((rfgain) & 0x10) >> 4) -#define PHY_GET_RFGAINID(rfattn, padmix, width) ((rfattn) + ((padmix)*(width))) -#define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \ - ((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x))) -#define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n)) -#define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0))) - -#define CH_5G_GROUP 3 -#define A_LOW_CHANS 0 -#define A_MID_CHANS 1 -#define A_HIGH_CHANS 2 -#define CH_2G_GROUP 1 -#define G_ALL_CHANS 0 - -#define FIRST_REF5_CHANNUM 149 -#define LAST_REF5_CHANNUM 165 -#define FIRST_5G_CHAN 14 -#define LAST_5G_CHAN 50 -#define FIRST_MID_5G_CHAN 14 -#define LAST_MID_5G_CHAN 35 -#define FIRST_HIGH_5G_CHAN 36 -#define LAST_HIGH_5G_CHAN 41 -#define FIRST_LOW_5G_CHAN 42 -#define LAST_LOW_5G_CHAN 50 - -#define BASE_LOW_5G_CHAN 4900 -#define BASE_MID_5G_CHAN 5100 -#define BASE_HIGH_5G_CHAN 5500 - -#define CHAN5G_FREQ(chan) (5000 + chan*5) -#define CHAN2G_FREQ(chan) (2407 + chan*5) - -#define TXP_FIRST_CCK 0 -#define TXP_LAST_CCK 3 -#define TXP_FIRST_OFDM 4 -#define TXP_LAST_OFDM 11 -#define TXP_FIRST_OFDM_20_CDD 12 -#define TXP_LAST_OFDM_20_CDD 19 -#define TXP_FIRST_MCS_20_SISO 20 -#define TXP_LAST_MCS_20_SISO 27 -#define TXP_FIRST_MCS_20_CDD 28 -#define TXP_LAST_MCS_20_CDD 35 -#define TXP_FIRST_MCS_20_STBC 36 -#define TXP_LAST_MCS_20_STBC 43 -#define TXP_FIRST_MCS_20_SDM 44 -#define TXP_LAST_MCS_20_SDM 51 -#define TXP_FIRST_OFDM_40_SISO 52 -#define TXP_LAST_OFDM_40_SISO 59 -#define TXP_FIRST_OFDM_40_CDD 60 -#define TXP_LAST_OFDM_40_CDD 67 -#define TXP_FIRST_MCS_40_SISO 68 -#define TXP_LAST_MCS_40_SISO 75 -#define TXP_FIRST_MCS_40_CDD 76 -#define TXP_LAST_MCS_40_CDD 83 -#define TXP_FIRST_MCS_40_STBC 84 -#define TXP_LAST_MCS_40_STBC 91 -#define TXP_FIRST_MCS_40_SDM 92 -#define TXP_LAST_MCS_40_SDM 99 -#define TXP_MCS_32 100 -#define TXP_NUM_RATES 101 -#define ADJ_PWR_TBL_LEN 84 - -#define TXP_FIRST_SISO_MCS_20 20 -#define TXP_LAST_SISO_MCS_20 27 - -#define PHY_CORE_NUM_1 1 -#define PHY_CORE_NUM_2 2 -#define PHY_CORE_NUM_3 3 -#define PHY_CORE_NUM_4 4 -#define PHY_CORE_MAX PHY_CORE_NUM_4 -#define PHY_CORE_0 0 -#define PHY_CORE_1 1 -#define PHY_CORE_2 2 -#define PHY_CORE_3 3 - -#define MA_WINDOW_SZ 8 - -#define PHY_NOISE_SAMPLE_MON 1 -#define PHY_NOISE_SAMPLE_EXTERNAL 2 -#define PHY_NOISE_WINDOW_SZ 16 -#define PHY_NOISE_GLITCH_INIT_MA 10 -#define PHY_NOISE_GLITCH_INIT_MA_BADPlCP 10 -#define PHY_NOISE_STATE_MON 0x1 -#define PHY_NOISE_STATE_EXTERNAL 0x2 -#define PHY_NOISE_SAMPLE_LOG_NUM_NPHY 10 -#define PHY_NOISE_SAMPLE_LOG_NUM_UCODE 9 - -#define PHY_NOISE_OFFSETFACT_4322 (-103) -#define PHY_NOISE_MA_WINDOW_SZ 2 - -#define PHY_RSSI_TABLE_SIZE 64 -#define RSSI_ANT_MERGE_MAX 0 -#define RSSI_ANT_MERGE_MIN 1 -#define RSSI_ANT_MERGE_AVG 2 - -#define PHY_TSSI_TABLE_SIZE 64 -#define APHY_TSSI_TABLE_SIZE 256 -#define TX_GAIN_TABLE_LENGTH 64 -#define DEFAULT_11A_TXP_IDX 24 -#define NUM_TSSI_FRAMES 4 -#define NULL_TSSI 0x7f -#define NULL_TSSI_W 0x7f7f - -#define PHY_PAPD_EPS_TBL_SIZE_LCNPHY 64 - -#define LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL 9 - -#define PHY_TXPWR_MIN 10 -#define PHY_TXPWR_MIN_NPHY 8 -#define RADIOPWR_OVERRIDE_DEF (-1) - -#define PWRTBL_NUM_COEFF 3 - -#define SPURAVOID_DISABLE 0 -#define SPURAVOID_AUTO 1 -#define SPURAVOID_FORCEON 2 -#define SPURAVOID_FORCEON2 3 - -#define PHY_SW_TIMER_FAST 15 -#define PHY_SW_TIMER_SLOW 60 -#define PHY_SW_TIMER_GLACIAL 120 - -#define PHY_PERICAL_AUTO 0 -#define PHY_PERICAL_FULL 1 -#define PHY_PERICAL_PARTIAL 2 - -#define PHY_PERICAL_NODELAY 0 -#define PHY_PERICAL_INIT_DELAY 5 -#define PHY_PERICAL_ASSOC_DELAY 5 -#define PHY_PERICAL_WDOG_DELAY 5 - -#define MPHASE_TXCAL_NUMCMDS 2 -#define PHY_PERICAL_MPHASE_PENDING(pi) (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE) - -enum { - MPHASE_CAL_STATE_IDLE = 0, - MPHASE_CAL_STATE_INIT = 1, - MPHASE_CAL_STATE_TXPHASE0, - MPHASE_CAL_STATE_TXPHASE1, - MPHASE_CAL_STATE_TXPHASE2, - MPHASE_CAL_STATE_TXPHASE3, - MPHASE_CAL_STATE_TXPHASE4, - MPHASE_CAL_STATE_TXPHASE5, - MPHASE_CAL_STATE_PAPDCAL, - MPHASE_CAL_STATE_RXCAL, - MPHASE_CAL_STATE_RSSICAL, - MPHASE_CAL_STATE_IDLETSSI -}; - -typedef enum { - CAL_FULL, - CAL_RECAL, - CAL_CURRECAL, - CAL_DIGCAL, - CAL_GCTRL, - CAL_SOFT, - CAL_DIGLO -} phy_cal_mode_t; - -#define RDR_NTIERS 1 -#define RDR_TIER_SIZE 64 -#define RDR_LIST_SIZE (512/3) -#define RDR_EPOCH_SIZE 40 -#define RDR_NANTENNAS 2 -#define RDR_NTIER_SIZE RDR_LIST_SIZE -#define RDR_LP_BUFFER_SIZE 64 -#define LP_LEN_HIS_SIZE 10 - -#define STATIC_NUM_RF 32 -#define STATIC_NUM_BB 9 - -#define BB_MULT_MASK 0x0000ffff -#define BB_MULT_VALID_MASK 0x80000000 - -#define CORDIC_AG 39797 -#define CORDIC_NI 18 -#define FIXED(X) ((s32)((X) << 16)) -#define FLOAT(X) (((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1)) - -#define PHY_CHAIN_TX_DISABLE_TEMP 115 -#define PHY_HYSTERESIS_DELTATEMP 5 - -#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) - -#define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \ - mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \ - (value) << phy_type##_##reg_name##_##field##_##SHIFT); -#define READ_PHY_REG(pi, phy_type, reg_name, field) \ - ((read_phy_reg(pi, phy_type##_##reg_name) & phy_type##_##reg_name##_##field##_##MASK)\ - >> phy_type##_##reg_name##_##field##_##SHIFT) - -#define VALID_PHYTYPE(phytype) (((uint)phytype == PHY_TYPE_N) || \ - ((uint)phytype == PHY_TYPE_LCN)) - -#define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || (radioid == BCM2056_ID) || \ - (radioid == BCM2057_ID)) -#define VALID_LCN_RADIO(radioid) (radioid == BCM2064_ID) - -#define VALID_RADIO(pi, radioid) (\ - (ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \ - (ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false)) - -#define SCAN_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN)) -#define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM)) -#define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT)) -#define ASSOC_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC)) -#define SCAN_RM_IN_PROGRESS(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM)) -#define PHY_MUTED(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE)) -#define PUB_NOT_ASSOC(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC)) - -#if defined(EXT_CBALL) -#define NORADIO_ENAB(pub) ((pub).radioid == NORADIO_ID) -#else -#define NORADIO_ENAB(pub) 0 -#endif - -#define PHY_LTRN_LIST_LEN 64 -extern u16 ltrn_list[PHY_LTRN_LIST_LEN]; - -typedef struct _phy_table_info { - uint table; - int q; - uint max; -} phy_table_info_t; - -typedef struct phytbl_info { - const void *tbl_ptr; - u32 tbl_len; - u32 tbl_id; - u32 tbl_offset; - u32 tbl_width; -} phytbl_info_t; - -typedef struct { - u8 curr_home_channel; - u16 crsminpwrthld_40_stored; - u16 crsminpwrthld_20L_stored; - u16 crsminpwrthld_20U_stored; - u16 init_gain_code_core1_stored; - u16 init_gain_code_core2_stored; - u16 init_gain_codeb_core1_stored; - u16 init_gain_codeb_core2_stored; - u16 init_gain_table_stored[4]; - - u16 clip1_hi_gain_code_core1_stored; - u16 clip1_hi_gain_code_core2_stored; - u16 clip1_hi_gain_codeb_core1_stored; - u16 clip1_hi_gain_codeb_core2_stored; - u16 nb_clip_thresh_core1_stored; - u16 nb_clip_thresh_core2_stored; - u16 init_ofdmlna2gainchange_stored[4]; - u16 init_ccklna2gainchange_stored[4]; - u16 clip1_lo_gain_code_core1_stored; - u16 clip1_lo_gain_code_core2_stored; - u16 clip1_lo_gain_codeb_core1_stored; - u16 clip1_lo_gain_codeb_core2_stored; - u16 w1_clip_thresh_core1_stored; - u16 w1_clip_thresh_core2_stored; - u16 radio_2056_core1_rssi_gain_stored; - u16 radio_2056_core2_rssi_gain_stored; - u16 energy_drop_timeout_len_stored; - - u16 ed_crs40_assertthld0_stored; - u16 ed_crs40_assertthld1_stored; - u16 ed_crs40_deassertthld0_stored; - u16 ed_crs40_deassertthld1_stored; - u16 ed_crs20L_assertthld0_stored; - u16 ed_crs20L_assertthld1_stored; - u16 ed_crs20L_deassertthld0_stored; - u16 ed_crs20L_deassertthld1_stored; - u16 ed_crs20U_assertthld0_stored; - u16 ed_crs20U_assertthld1_stored; - u16 ed_crs20U_deassertthld0_stored; - u16 ed_crs20U_deassertthld1_stored; - - u16 badplcp_ma; - u16 badplcp_ma_previous; - u16 badplcp_ma_total; - u16 badplcp_ma_list[MA_WINDOW_SZ]; - int badplcp_ma_index; - s16 pre_badplcp_cnt; - s16 bphy_pre_badplcp_cnt; - - u16 init_gain_core1; - u16 init_gain_core2; - u16 init_gainb_core1; - u16 init_gainb_core2; - u16 init_gain_rfseq[4]; - - u16 crsminpwr0; - u16 crsminpwrl0; - u16 crsminpwru0; - - s16 crsminpwr_index; - - u16 radio_2057_core1_rssi_wb1a_gc_stored; - u16 radio_2057_core2_rssi_wb1a_gc_stored; - u16 radio_2057_core1_rssi_wb1g_gc_stored; - u16 radio_2057_core2_rssi_wb1g_gc_stored; - u16 radio_2057_core1_rssi_wb2_gc_stored; - u16 radio_2057_core2_rssi_wb2_gc_stored; - u16 radio_2057_core1_rssi_nb_gc_stored; - u16 radio_2057_core2_rssi_nb_gc_stored; - -} interference_info_t; - -typedef struct { - u16 rc_cal_ovr; - u16 phycrsth1; - u16 phycrsth2; - u16 init_n1p1_gain; - u16 p1_p2_gain; - u16 n1_n2_gain; - u16 n1_p1_gain; - u16 div_search_gain; - u16 div_p1_p2_gain; - u16 div_search_gn_change; - u16 table_7_2; - u16 table_7_3; - u16 cckshbits_gnref; - u16 clip_thresh; - u16 clip2_thresh; - u16 clip3_thresh; - u16 clip_p2_thresh; - u16 clip_pwdn_thresh; - u16 clip_n1p1_thresh; - u16 clip_n1_pwdn_thresh; - u16 bbconfig; - u16 cthr_sthr_shdin; - u16 energy; - u16 clip_p1_p2_thresh; - u16 threshold; - u16 reg15; - u16 reg16; - u16 reg17; - u16 div_srch_idx; - u16 div_srch_p1_p2; - u16 div_srch_gn_back; - u16 ant_dwell; - u16 ant_wr_settle; -} aci_save_gphy_t; - -typedef struct _lo_complex_t { - s8 i; - s8 q; -} lo_complex_abgphy_info_t; - -typedef struct _nphy_iq_comp { - s16 a0; - s16 b0; - s16 a1; - s16 b1; -} nphy_iq_comp_t; - -typedef struct _nphy_txpwrindex { - s8 index; - s8 index_internal; - s8 index_internal_save; - u16 AfectrlOverride; - u16 AfeCtrlDacGain; - u16 rad_gain; - u8 bbmult; - u16 iqcomp_a; - u16 iqcomp_b; - u16 locomp; -} phy_txpwrindex_t; - -typedef struct { - - u16 txcal_coeffs_2G[8]; - u16 txcal_radio_regs_2G[8]; - nphy_iq_comp_t rxcal_coeffs_2G; - - u16 txcal_coeffs_5G[8]; - u16 txcal_radio_regs_5G[8]; - nphy_iq_comp_t rxcal_coeffs_5G; -} txiqcal_cache_t; - -typedef struct _nphy_pwrctrl { - s8 max_pwr_2g; - s8 idle_targ_2g; - s16 pwrdet_2g_a1; - s16 pwrdet_2g_b0; - s16 pwrdet_2g_b1; - s8 max_pwr_5gm; - s8 idle_targ_5gm; - s8 max_pwr_5gh; - s8 max_pwr_5gl; - s16 pwrdet_5gm_a1; - s16 pwrdet_5gm_b0; - s16 pwrdet_5gm_b1; - s16 pwrdet_5gl_a1; - s16 pwrdet_5gl_b0; - s16 pwrdet_5gl_b1; - s16 pwrdet_5gh_a1; - s16 pwrdet_5gh_b0; - s16 pwrdet_5gh_b1; - s8 idle_targ_5gl; - s8 idle_targ_5gh; - s8 idle_tssi_2g; - s8 idle_tssi_5g; - s8 idle_tssi; - s16 a1; - s16 b0; - s16 b1; -} phy_pwrctrl_t; - -typedef struct _nphy_txgains { - u16 txlpf[2]; - u16 txgm[2]; - u16 pga[2]; - u16 pad[2]; - u16 ipa[2]; -} nphy_txgains_t; - -#define PHY_NOISEVAR_BUFSIZE 10 - -typedef struct _nphy_noisevar_buf { - int bufcount; - int tone_id[PHY_NOISEVAR_BUFSIZE]; - u32 noise_vars[PHY_NOISEVAR_BUFSIZE]; - u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE]; -} phy_noisevar_buf_t; - -typedef struct { - u16 rssical_radio_regs_2G[2]; - u16 rssical_phyregs_2G[12]; - - u16 rssical_radio_regs_5G[2]; - u16 rssical_phyregs_5G[12]; -} rssical_cache_t; - -typedef struct { - - u16 txiqlocal_a; - u16 txiqlocal_b; - u16 txiqlocal_didq; - u8 txiqlocal_ei0; - u8 txiqlocal_eq0; - u8 txiqlocal_fi0; - u8 txiqlocal_fq0; - - u16 txiqlocal_bestcoeffs[11]; - u16 txiqlocal_bestcoeffs_valid; - - u32 papd_eps_tbl[PHY_PAPD_EPS_TBL_SIZE_LCNPHY]; - u16 analog_gain_ref; - u16 lut_begin; - u16 lut_end; - u16 lut_step; - u16 rxcompdbm; - u16 papdctrl; - u16 sslpnCalibClkEnCtrl; - - u16 rxiqcal_coeff_a0; - u16 rxiqcal_coeff_b0; -} lcnphy_cal_results_t; - -struct shared_phy { - struct phy_info *phy_head; - uint unit; - struct si_pub *sih; - void *physhim; - uint corerev; - u32 machwcap; - bool up; - bool clk; - uint now; - u16 vid; - u16 did; - uint chip; - uint chiprev; - uint chippkg; - uint sromrev; - uint boardtype; - uint boardrev; - uint boardvendor; - u32 boardflags; - u32 boardflags2; - uint bustype; - uint buscorerev; - uint fast_timer; - uint slow_timer; - uint glacial_timer; - u8 rx_antdiv; - s8 phy_noise_window[MA_WINDOW_SZ]; - uint phy_noise_index; - u8 hw_phytxchain; - u8 hw_phyrxchain; - u8 phytxchain; - u8 phyrxchain; - u8 rssi_mode; - bool _rifs_phy; -}; - -struct phy_pub { - uint phy_type; - uint phy_rev; - u8 phy_corenum; - u16 radioid; - u8 radiorev; - u8 radiover; - - uint coreflags; - uint ana_rev; - bool abgphy_encore; -}; - -struct phy_info_nphy; -typedef struct phy_info_nphy phy_info_nphy_t; - -struct phy_info_lcnphy; -typedef struct phy_info_lcnphy phy_info_lcnphy_t; - -struct phy_func_ptr { - initfn_t init; - initfn_t calinit; - chansetfn_t chanset; - initfn_t txpwrrecalc; - longtrnfn_t longtrn; - txiqccgetfn_t txiqccget; - txiqccsetfn_t txiqccset; - txloccgetfn_t txloccget; - radioloftgetfn_t radioloftget; - initfn_t carrsuppr; - rxsigpwrfn_t rxsigpwr; - detachfn_t detach; -}; -typedef struct phy_func_ptr phy_func_ptr_t; - -struct phy_info { - wlc_phy_t pubpi_ro; - shared_phy_t *sh; - phy_func_ptr_t pi_fptr; - void *pi_ptr; - - union { - phy_info_lcnphy_t *pi_lcnphy; - } u; - bool user_txpwr_at_rfport; - - d11regs_t *regs; - struct phy_info *next; - char *vars; - wlc_phy_t pubpi; - - bool do_initcal; - bool phytest_on; - bool ofdm_rateset_war; - bool bf_preempt_4306; - chanspec_t radio_chanspec; - u8 antsel_type; - u16 bw; - u8 txpwr_percent; - bool phy_init_por; - - bool init_in_progress; - bool initialized; - bool sbtml_gm; - uint refcnt; - bool watchdog_override; - u8 phynoise_state; - uint phynoise_now; - int phynoise_chan_watchdog; - bool phynoise_polling; - bool disable_percal; - mbool measure_hold; - - s16 txpa_2g[PWRTBL_NUM_COEFF]; - s16 txpa_2g_low_temp[PWRTBL_NUM_COEFF]; - s16 txpa_2g_high_temp[PWRTBL_NUM_COEFF]; - s16 txpa_5g_low[PWRTBL_NUM_COEFF]; - s16 txpa_5g_mid[PWRTBL_NUM_COEFF]; - s16 txpa_5g_hi[PWRTBL_NUM_COEFF]; - - u8 tx_srom_max_2g; - u8 tx_srom_max_5g_low; - u8 tx_srom_max_5g_mid; - u8 tx_srom_max_5g_hi; - u8 tx_srom_max_rate_2g[TXP_NUM_RATES]; - u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES]; - u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES]; - u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES]; - u8 tx_user_target[TXP_NUM_RATES]; - s8 tx_power_offset[TXP_NUM_RATES]; - u8 tx_power_target[TXP_NUM_RATES]; - - wlc_phy_srom_fem_t srom_fem2g; - wlc_phy_srom_fem_t srom_fem5g; - - u8 tx_power_max; - u8 tx_power_max_rate_ind; - bool hwpwrctrl; - u8 nphy_txpwrctrl; - s8 nphy_txrx_chain; - bool phy_5g_pwrgain; - - u16 phy_wreg; - u16 phy_wreg_limit; - - s8 n_preamble_override; - u8 antswitch; - u8 aa2g, aa5g; - - s8 idle_tssi[CH_5G_GROUP]; - s8 target_idle_tssi; - s8 txpwr_est_Pout; - u8 tx_power_min; - u8 txpwr_limit[TXP_NUM_RATES]; - u8 txpwr_env_limit[TXP_NUM_RATES]; - u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN]; - - bool channel_14_wide_filter; - - bool txpwroverride; - bool txpwridx_override_aphy; - s16 radiopwr_override; - u16 hwpwr_txcur; - u8 saved_txpwr_idx; - - bool edcrs_threshold_lock; - - u32 tr_R_gain_val; - u32 tr_T_gain_val; - - s16 ofdm_analog_filt_bw_override; - s16 cck_analog_filt_bw_override; - s16 ofdm_rccal_override; - s16 cck_rccal_override; - u16 extlna_type; - - uint interference_mode_crs_time; - u16 crsglitch_prev; - bool interference_mode_crs; - - u32 phy_tx_tone_freq; - uint phy_lastcal; - bool phy_forcecal; - bool phy_fixed_noise; - u32 xtalfreq; - u8 pdiv; - s8 carrier_suppr_disable; - - bool phy_bphy_evm; - bool phy_bphy_rfcs; - s8 phy_scraminit; - u8 phy_gpiosel; - - s16 phy_txcore_disable_temp; - s16 phy_txcore_enable_temp; - s8 phy_tempsense_offset; - bool phy_txcore_heatedup; - - u16 radiopwr; - u16 bb_atten; - u16 txctl1; - - u16 mintxbias; - u16 mintxmag; - lo_complex_abgphy_info_t gphy_locomp_iq[STATIC_NUM_RF][STATIC_NUM_BB]; - s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB]; - u16 gain_table[TX_GAIN_TABLE_LENGTH]; - bool loopback_gain; - s16 max_lpback_gain_hdB; - s16 trsw_rx_gain_hdB; - u8 power_vec[8]; - - u16 rc_cal; - int nrssi_table_delta; - int nrssi_slope_scale; - int nrssi_slope_offset; - int min_rssi; - int max_rssi; - - s8 txpwridx; - u8 min_txpower; - - u8 a_band_high_disable; - - u16 tx_vos; - u16 global_tx_bb_dc_bias_loft; - - int rf_max; - int bb_max; - int rf_list_size; - int bb_list_size; - u16 *rf_attn_list; - u16 *bb_attn_list; - u16 padmix_mask; - u16 padmix_reg; - u16 *txmag_list; - uint txmag_len; - bool txmag_enable; - - s8 *a_tssi_to_dbm; - s8 *m_tssi_to_dbm; - s8 *l_tssi_to_dbm; - s8 *h_tssi_to_dbm; - u8 *hwtxpwr; - - u16 freqtrack_saved_regs[2]; - int cur_interference_mode; - bool hwpwrctrl_capable; - bool temppwrctrl_capable; - - uint phycal_nslope; - uint phycal_noffset; - uint phycal_mlo; - uint phycal_txpower; - - u8 phy_aa2g; - - bool nphy_tableloaded; - s8 nphy_rssisel; - u32 nphy_bb_mult_save; - u16 nphy_txiqlocal_bestc[11]; - bool nphy_txiqlocal_coeffsvalid; - phy_txpwrindex_t nphy_txpwrindex[PHY_CORE_NUM_2]; - phy_pwrctrl_t nphy_pwrctrl_info[PHY_CORE_NUM_2]; - u16 cck2gpo; - u32 ofdm2gpo; - u32 ofdm5gpo; - u32 ofdm5glpo; - u32 ofdm5ghpo; - u8 bw402gpo; - u8 bw405gpo; - u8 bw405glpo; - u8 bw405ghpo; - u8 cdd2gpo; - u8 cdd5gpo; - u8 cdd5glpo; - u8 cdd5ghpo; - u8 stbc2gpo; - u8 stbc5gpo; - u8 stbc5glpo; - u8 stbc5ghpo; - u8 bwdup2gpo; - u8 bwdup5gpo; - u8 bwdup5glpo; - u8 bwdup5ghpo; - u16 mcs2gpo[8]; - u16 mcs5gpo[8]; - u16 mcs5glpo[8]; - u16 mcs5ghpo[8]; - u32 nphy_rxcalparams; - - u8 phy_spuravoid; - bool phy_isspuravoid; - - u8 phy_pabias; - u8 nphy_papd_skip; - u8 nphy_tssi_slope; - - s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ]; - u8 nphy_noise_index; - - u8 nphy_txpid2g[PHY_CORE_NUM_2]; - u8 nphy_txpid5g[PHY_CORE_NUM_2]; - u8 nphy_txpid5gl[PHY_CORE_NUM_2]; - u8 nphy_txpid5gh[PHY_CORE_NUM_2]; - - bool nphy_gain_boost; - bool nphy_elna_gain_config; - u16 old_bphy_test; - u16 old_bphy_testcontrol; - - bool phyhang_avoid; - - bool rssical_nphy; - u8 nphy_perical; - uint nphy_perical_last; - u8 cal_type_override; - u8 mphase_cal_phase_id; - u8 mphase_txcal_cmdidx; - u8 mphase_txcal_numcmds; - u16 mphase_txcal_bestcoeffs[11]; - chanspec_t nphy_txiqlocal_chanspec; - chanspec_t nphy_iqcal_chanspec_2G; - chanspec_t nphy_iqcal_chanspec_5G; - chanspec_t nphy_rssical_chanspec_2G; - chanspec_t nphy_rssical_chanspec_5G; - struct wlapi_timer *phycal_timer; - bool use_int_tx_iqlo_cal_nphy; - bool internal_tx_iqlo_cal_tapoff_intpa_nphy; - s16 nphy_lastcal_temp; - - txiqcal_cache_t calibration_cache; - rssical_cache_t rssical_cache; - - u8 nphy_txpwr_idx[2]; - u8 nphy_papd_cal_type; - uint nphy_papd_last_cal; - u16 nphy_papd_tx_gain_at_last_cal[2]; - u8 nphy_papd_cal_gain_index[2]; - s16 nphy_papd_epsilon_offset[2]; - bool nphy_papd_recal_enable; - u32 nphy_papd_recal_counter; - bool nphy_force_papd_cal; - bool nphy_papdcomp; - bool ipa2g_on; - bool ipa5g_on; - - u16 classifier_state; - u16 clip_state[2]; - uint nphy_deaf_count; - u8 rxiq_samps; - u8 rxiq_antsel; - - u16 rfctrlIntc1_save; - u16 rfctrlIntc2_save; - bool first_cal_after_assoc; - u16 tx_rx_cal_radio_saveregs[22]; - u16 tx_rx_cal_phy_saveregs[15]; - - u8 nphy_cal_orig_pwr_idx[2]; - u8 nphy_txcal_pwr_idx[2]; - u8 nphy_rxcal_pwr_idx[2]; - u16 nphy_cal_orig_tx_gain[2]; - nphy_txgains_t nphy_cal_target_gain; - u16 nphy_txcal_bbmult; - u16 nphy_gmval; - - u16 nphy_saved_bbconf; - - bool nphy_gband_spurwar_en; - bool nphy_gband_spurwar2_en; - bool nphy_aband_spurwar_en; - u16 nphy_rccal_value; - u16 nphy_crsminpwr[3]; - phy_noisevar_buf_t nphy_saved_noisevars; - bool nphy_anarxlpf_adjusted; - bool nphy_crsminpwr_adjusted; - bool nphy_noisevars_adjusted; - - bool nphy_rxcal_active; - u16 radar_percal_mask; - bool dfs_lp_buffer_nphy; - - u16 nphy_fineclockgatecontrol; - - s8 rx2tx_biasentry; - - u16 crsminpwr0; - u16 crsminpwrl0; - u16 crsminpwru0; - s16 noise_crsminpwr_index; - u16 init_gain_core1; - u16 init_gain_core2; - u16 init_gainb_core1; - u16 init_gainb_core2; - u8 aci_noise_curr_channel; - u16 init_gain_rfseq[4]; - - bool radio_is_on; - - bool nphy_sample_play_lpf_bw_ctl_ovr; - - u16 tbl_data_hi; - u16 tbl_data_lo; - u16 tbl_addr; - - uint tbl_save_id; - uint tbl_save_offset; - - u8 txpwrctrl; - s8 txpwrindex[PHY_CORE_MAX]; - - u8 phycal_tempdelta; - u32 mcs20_po; - u32 mcs40_po; - struct wiphy *wiphy; -}; - -typedef s32 fixed; - -typedef struct _cs32 { - fixed q; - fixed i; -} cs32; - -typedef struct radio_regs { - u16 address; - u32 init_a; - u32 init_g; - u8 do_init_a; - u8 do_init_g; -} radio_regs_t; - -typedef struct radio_20xx_regs { - u16 address; - u8 init; - u8 do_init; -} radio_20xx_regs_t; - -typedef struct lcnphy_radio_regs { - u16 address; - u8 init_a; - u8 init_g; - u8 do_init_a; - u8 do_init_g; -} lcnphy_radio_regs_t; - -extern lcnphy_radio_regs_t lcnphy_radio_regs_2064[]; -extern lcnphy_radio_regs_t lcnphy_radio_regs_2066[]; -extern radio_regs_t regs_2055[], regs_SYN_2056[], regs_TX_2056[], - regs_RX_2056[]; -extern radio_regs_t regs_SYN_2056_A1[], regs_TX_2056_A1[], regs_RX_2056_A1[]; -extern radio_regs_t regs_SYN_2056_rev5[], regs_TX_2056_rev5[], - regs_RX_2056_rev5[]; -extern radio_regs_t regs_SYN_2056_rev6[], regs_TX_2056_rev6[], - regs_RX_2056_rev6[]; -extern radio_regs_t regs_SYN_2056_rev7[], regs_TX_2056_rev7[], - regs_RX_2056_rev7[]; -extern radio_regs_t regs_SYN_2056_rev8[], regs_TX_2056_rev8[], - regs_RX_2056_rev8[]; -extern radio_20xx_regs_t regs_2057_rev4[], regs_2057_rev5[], regs_2057_rev5v1[]; -extern radio_20xx_regs_t regs_2057_rev7[], regs_2057_rev8[]; - -extern char *phy_getvar(phy_info_t *pi, const char *name); -extern int phy_getintvar(phy_info_t *pi, const char *name); -#define PHY_GETVAR(pi, name) phy_getvar(pi, name) -#define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name) - -extern u16 read_phy_reg(phy_info_t *pi, u16 addr); -extern void write_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void and_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void or_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val); - -extern u16 read_radio_reg(phy_info_t *pi, u16 addr); -extern void or_radio_reg(phy_info_t *pi, u16 addr, u16 val); -extern void and_radio_reg(phy_info_t *pi, u16 addr, u16 val); -extern void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, - u16 val); -extern void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask); - -extern void write_radio_reg(phy_info_t *pi, u16 addr, u16 val); - -extern void wlc_phyreg_enter(wlc_phy_t *pih); -extern void wlc_phyreg_exit(wlc_phy_t *pih); -extern void wlc_radioreg_enter(wlc_phy_t *pih); -extern void wlc_radioreg_exit(wlc_phy_t *pih); - -extern void wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, - u16 tblAddr, u16 tblDataHi, - u16 tblDatalo); -extern void wlc_phy_write_table(phy_info_t *pi, - const phytbl_info_t *ptbl_info, u16 tblAddr, - u16 tblDataHi, u16 tblDatalo); -extern void wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, - u16 tblAddr, u16 tblDataHi, - u16 tblDataLo); -extern void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val); - -extern void write_phy_channel_reg(phy_info_t *pi, uint val); -extern void wlc_phy_txpower_update_shm(phy_info_t *pi); - -extern void wlc_phy_cordic(fixed theta, cs32 *val); -extern u8 wlc_phy_nbits(s32 value); -extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core); - -extern uint wlc_phy_init_radio_regs_allbands(phy_info_t *pi, - radio_20xx_regs_t *radioregs); -extern uint wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, - u16 core_offset); - -extern void wlc_phy_txpower_ipa_upd(phy_info_t *pi); - -extern void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on); -extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real, - s32 *eps_imag); - -extern void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi); -extern void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi); - -extern bool wlc_phy_attach_nphy(phy_info_t *pi); -extern bool wlc_phy_attach_lcnphy(phy_info_t *pi); - -extern void wlc_phy_detach_lcnphy(phy_info_t *pi); - -extern void wlc_phy_init_nphy(phy_info_t *pi); -extern void wlc_phy_init_lcnphy(phy_info_t *pi); - -extern void wlc_phy_cal_init_nphy(phy_info_t *pi); -extern void wlc_phy_cal_init_lcnphy(phy_info_t *pi); - -extern void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec); -extern void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec); -extern void wlc_phy_chanspec_set_fixup_lcnphy(phy_info_t *pi, - chanspec_t chanspec); -extern int wlc_phy_channel2freq(uint channel); -extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint); -extern int wlc_phy_chanspec_bandrange_get(phy_info_t *, chanspec_t); - -extern void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode); -extern s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi); - -extern void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi); -extern void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi); -extern void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi); - -extern void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index); -extern void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable); -extern void wlc_lcnphy_stop_tx_tone(phy_info_t *pi); -extern void wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, - u16 max_val, bool iqcalmode); - -extern void wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, - u8 *max_pwr, u8 rate_id); -extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, - u8 rate_mcs_end, - u8 rate_ofdm_start); -extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, - u8 rate_ofdm_start, - u8 rate_ofdm_end, - u8 rate_mcs_start); - -extern u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode); -extern s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode); -extern s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode); -extern s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode); -extern void wlc_phy_carrier_suppress_lcnphy(phy_info_t *pi); -extern void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel); -extern void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode); -extern void wlc_2064_vco_cal(phy_info_t *pi); - -extern void wlc_phy_txpower_recalc_target(phy_info_t *pi); - -#define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18 -#define LCNPHY_TX_POWER_TABLE_SIZE 128 -#define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1) -#define LCNPHY_TBL_ID_TXPWRCTL 0x07 -#define LCNPHY_TX_PWR_CTRL_OFF 0 -#define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15) -#define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \ - (0x1 << 14) | \ - (0x1 << 13)) - -#define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001 - -extern void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti); -extern void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti); -extern void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b); -extern void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq); -extern void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b); -extern u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi); -extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, u8 *ei0, - u8 *eq0, u8 *fi0, u8 *fq0); -extern void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode); -extern void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode); -extern bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi); -extern void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi); -extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1); -extern void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, - s8 *cck_pwr); -extern void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi); - -extern s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index); - -#define NPHY_MAX_HPVGA1_INDEX 10 -#define NPHY_DEF_HPVGA1_INDEXLIMIT 7 - -typedef struct _phy_iq_est { - s32 iq_prod; - u32 i_pwr; - u32 q_pwr; -} phy_iq_est_t; - -extern void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable); -extern void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode); - -#define wlc_phy_write_table_nphy(pi, pti) wlc_phy_write_table(pi, pti, 0x72, \ - 0x74, 0x73) -#define wlc_phy_read_table_nphy(pi, pti) wlc_phy_read_table(pi, pti, 0x72, \ - 0x74, 0x73) -#define wlc_nphy_table_addr(pi, id, off) wlc_phy_table_addr((pi), (id), (off), \ - 0x72, 0x74, 0x73) -#define wlc_nphy_table_data_write(pi, w, v) wlc_phy_table_data_write((pi), (w), (v)) - -extern void wlc_phy_table_read_nphy(phy_info_t *pi, u32, u32 l, u32 o, - u32 w, void *d); -extern void wlc_phy_table_write_nphy(phy_info_t *pi, u32, u32, u32, - u32, const void *); - -#define PHY_IPA(pi) \ - ((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \ - (pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec))) - -#define WLC_PHY_WAR_PR51571(pi) \ - if (((pi)->sh->bustype == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \ - (void)R_REG(&(pi)->regs->maccontrol) - -extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype); -extern void wlc_phy_aci_reset_nphy(phy_info_t *pi); -extern void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en); - -extern u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan); -extern void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on); - -extern void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi); - -extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd); -extern s16 wlc_phy_tempsense_nphy(phy_info_t *pi); - -extern u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val); - -extern void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, - u16 num_samps, u8 wait_time, - u8 wait_for_crs); - -extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, - nphy_iq_comp_t *comp); -extern void wlc_phy_aci_and_noise_reduction_nphy(phy_info_t *pi); - -extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask); -extern u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih); - -extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type); -extern void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi); -extern void wlc_phy_txpwr_apply_nphy(phy_info_t *pi); -extern void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi); -extern u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi); - -extern nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi); -extern int wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - bool full, bool m); -extern int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - u8 type, bool d); -extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, - s8 txpwrindex, bool res); -extern void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core, u8 rssi_type); -extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, - s32 *rssi_buf, u8 nsamps); -extern void wlc_phy_rssi_cal_nphy(phy_info_t *pi); -extern int wlc_phy_aci_scan_nphy(phy_info_t *pi); -extern void wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, - bool debug); -extern int wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, - u8 mode, u8, bool); -extern void wlc_phy_stopplayback_nphy(phy_info_t *pi); -extern void wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, - u8 num_samps); -extern void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi); - -extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh); - -#define NPHY_TESTPATTERN_BPHY_EVM 0 -#define NPHY_TESTPATTERN_BPHY_RFCS 1 - -extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs); - -void wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, - s8 *ofdmoffset); -extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, - chanspec_t chanspec); - -extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih); -#endif /* _BRCM_PHY_INT_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c deleted file mode 100644 index a3655ca..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c +++ /dev/null @@ -1,5304 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "bcmdma.h" - -#include "wlc_phy_radio.h" -#include "wlc_phy_int.h" -#include "wlc_phy_qmath.h" -#include "wlc_phy_lcn.h" -#include "wlc_phytbl_lcn.h" - -#define PLL_2064_NDIV 90 -#define PLL_2064_LOW_END_VCO 3000 -#define PLL_2064_LOW_END_KVCO 27 -#define PLL_2064_HIGH_END_VCO 4200 -#define PLL_2064_HIGH_END_KVCO 68 -#define PLL_2064_LOOP_BW_DOUBLER 200 -#define PLL_2064_D30_DOUBLER 10500 -#define PLL_2064_LOOP_BW 260 -#define PLL_2064_D30 8000 -#define PLL_2064_CAL_REF_TO 8 -#define PLL_2064_MHZ 1000000 -#define PLL_2064_OPEN_LOOP_DELAY 5 - -#define TEMPSENSE 1 -#define VBATSENSE 2 - -#define NOISE_IF_UPD_CHK_INTERVAL 1 -#define NOISE_IF_UPD_RST_INTERVAL 60 -#define NOISE_IF_UPD_THRESHOLD_CNT 1 -#define NOISE_IF_UPD_TRHRESHOLD 50 -#define NOISE_IF_UPD_TIMEOUT 1000 -#define NOISE_IF_OFF 0 -#define NOISE_IF_CHK 1 -#define NOISE_IF_ON 2 - -#define PAPD_BLANKING_PROFILE 3 -#define PAPD2LUT 0 -#define PAPD_CORR_NORM 0 -#define PAPD_BLANKING_THRESHOLD 0 -#define PAPD_STOP_AFTER_LAST_UPDATE 0 - -#define LCN_TARGET_PWR 60 - -#define LCN_VBAT_OFFSET_433X 34649679 -#define LCN_VBAT_SLOPE_433X 8258032 - -#define LCN_VBAT_SCALE_NOM 53 -#define LCN_VBAT_SCALE_DEN 432 - -#define LCN_TEMPSENSE_OFFSET 80812 -#define LCN_TEMPSENSE_DEN 2647 - -#define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT \ - (0 + 8) -#define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK \ - (0x7f << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT) - -#define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT \ - (0 + 8) -#define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK \ - (0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT) - -#define wlc_lcnphy_enable_tx_gain_override(pi) \ - wlc_lcnphy_set_tx_gain_override(pi, true) -#define wlc_lcnphy_disable_tx_gain_override(pi) \ - wlc_lcnphy_set_tx_gain_override(pi, false) - -#define wlc_lcnphy_iqcal_active(pi) \ - (read_phy_reg((pi), 0x451) & \ - ((0x1 << 15) | (0x1 << 14))) - -#define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13)) -#define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \ - (pi->temppwrctrl_capable) -#define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \ - (pi->hwpwrctrl_capable) - -#define SWCTRL_BT_TX 0x18 -#define SWCTRL_OVR_DISABLE 0x40 - -#define AFE_CLK_INIT_MODE_TXRX2X 1 -#define AFE_CLK_INIT_MODE_PAPD 0 - -#define LCNPHY_TBL_ID_IQLOCAL 0x00 - -#define LCNPHY_TBL_ID_RFSEQ 0x08 -#define LCNPHY_TBL_ID_GAIN_IDX 0x0d -#define LCNPHY_TBL_ID_SW_CTRL 0x0f -#define LCNPHY_TBL_ID_GAIN_TBL 0x12 -#define LCNPHY_TBL_ID_SPUR 0x14 -#define LCNPHY_TBL_ID_SAMPLEPLAY 0x15 -#define LCNPHY_TBL_ID_SAMPLEPLAY1 0x16 - -#define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832 -#define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128 -#define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192 -#define LCNPHY_TX_PWR_CTRL_IQ_OFFSET 320 -#define LCNPHY_TX_PWR_CTRL_LO_OFFSET 448 -#define LCNPHY_TX_PWR_CTRL_PWR_OFFSET 576 - -#define LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313 140 - -#define LCNPHY_TX_PWR_CTRL_START_NPT 1 -#define LCNPHY_TX_PWR_CTRL_MAX_NPT 7 - -#define LCNPHY_NOISE_SAMPLES_DEFAULT 5000 - -#define LCNPHY_ACI_DETECT_START 1 -#define LCNPHY_ACI_DETECT_PROGRESS 2 -#define LCNPHY_ACI_DETECT_STOP 3 - -#define LCNPHY_ACI_CRSHIFRMLO_TRSH 100 -#define LCNPHY_ACI_GLITCH_TRSH 2000 -#define LCNPHY_ACI_TMOUT 250 -#define LCNPHY_ACI_DETECT_TIMEOUT 2 -#define LCNPHY_ACI_START_DELAY 0 - -#define wlc_lcnphy_tx_gain_override_enabled(pi) \ - (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6))) - -#define wlc_lcnphy_total_tx_frames(pi) \ - wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + offsetof(macstat_t, txallfrm)) - -typedef struct { - u16 gm_gain; - u16 pga_gain; - u16 pad_gain; - u16 dac_gain; -} lcnphy_txgains_t; - -typedef enum { - LCNPHY_CAL_FULL, - LCNPHY_CAL_RECAL, - LCNPHY_CAL_CURRECAL, - LCNPHY_CAL_DIGCAL, - LCNPHY_CAL_GCTRL -} lcnphy_cal_mode_t; - -typedef struct { - lcnphy_txgains_t gains; - bool useindex; - u8 index; -} lcnphy_txcalgains_t; - -typedef struct { - u8 chan; - s16 a; - s16 b; -} lcnphy_rx_iqcomp_t; - -typedef struct { - s16 re; - s16 im; -} lcnphy_spb_tone_t; - -typedef struct { - u16 re; - u16 im; -} lcnphy_unsign16_struct; - -typedef struct { - u32 iq_prod; - u32 i_pwr; - u32 q_pwr; -} lcnphy_iq_est_t; - -typedef struct { - u16 ptcentreTs20; - u16 ptcentreFactor; -} lcnphy_sfo_cfg_t; - -typedef enum { - LCNPHY_PAPD_CAL_CW, - LCNPHY_PAPD_CAL_OFDM -} lcnphy_papd_cal_type_t; - -typedef u16 iqcal_gain_params_lcnphy[9]; - -static const iqcal_gain_params_lcnphy tbl_iqcal_gainparams_lcnphy_2G[] = { - {0, 0, 0, 0, 0, 0, 0, 0, 0}, -}; - -static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = { - tbl_iqcal_gainparams_lcnphy_2G, -}; - -static const u16 iqcal_gainparams_numgains_lcnphy[1] = { - sizeof(tbl_iqcal_gainparams_lcnphy_2G) / - sizeof(*tbl_iqcal_gainparams_lcnphy_2G), -}; - -static const lcnphy_sfo_cfg_t lcnphy_sfo_cfg[] = { - {965, 1087}, - {967, 1085}, - {969, 1082}, - {971, 1080}, - {973, 1078}, - {975, 1076}, - {977, 1073}, - {979, 1071}, - {981, 1069}, - {983, 1067}, - {985, 1065}, - {987, 1063}, - {989, 1060}, - {994, 1055} -}; - -static const -u16 lcnphy_iqcal_loft_gainladder[] = { - ((2 << 8) | 0), - ((3 << 8) | 0), - ((4 << 8) | 0), - ((6 << 8) | 0), - ((8 << 8) | 0), - ((11 << 8) | 0), - ((16 << 8) | 0), - ((16 << 8) | 1), - ((16 << 8) | 2), - ((16 << 8) | 3), - ((16 << 8) | 4), - ((16 << 8) | 5), - ((16 << 8) | 6), - ((16 << 8) | 7), - ((23 << 8) | 7), - ((32 << 8) | 7), - ((45 << 8) | 7), - ((64 << 8) | 7), - ((91 << 8) | 7), - ((128 << 8) | 7) -}; - -static const -u16 lcnphy_iqcal_ir_gainladder[] = { - ((1 << 8) | 0), - ((2 << 8) | 0), - ((4 << 8) | 0), - ((6 << 8) | 0), - ((8 << 8) | 0), - ((11 << 8) | 0), - ((16 << 8) | 0), - ((23 << 8) | 0), - ((32 << 8) | 0), - ((45 << 8) | 0), - ((64 << 8) | 0), - ((64 << 8) | 1), - ((64 << 8) | 2), - ((64 << 8) | 3), - ((64 << 8) | 4), - ((64 << 8) | 5), - ((64 << 8) | 6), - ((64 << 8) | 7), - ((91 << 8) | 7), - ((128 << 8) | 7) -}; - -static const -lcnphy_spb_tone_t lcnphy_spb_tone_3750[] = { - {88, 0}, - {73, 49}, - {34, 81}, - {-17, 86}, - {-62, 62}, - {-86, 17}, - {-81, -34}, - {-49, -73}, - {0, -88}, - {49, -73}, - {81, -34}, - {86, 17}, - {62, 62}, - {17, 86}, - {-34, 81}, - {-73, 49}, - {-88, 0}, - {-73, -49}, - {-34, -81}, - {17, -86}, - {62, -62}, - {86, -17}, - {81, 34}, - {49, 73}, - {0, 88}, - {-49, 73}, - {-81, 34}, - {-86, -17}, - {-62, -62}, - {-17, -86}, - {34, -81}, - {73, -49}, -}; - -static const -u16 iqlo_loopback_rf_regs[20] = { - RADIO_2064_REG036, - RADIO_2064_REG11A, - RADIO_2064_REG03A, - RADIO_2064_REG025, - RADIO_2064_REG028, - RADIO_2064_REG005, - RADIO_2064_REG112, - RADIO_2064_REG0FF, - RADIO_2064_REG11F, - RADIO_2064_REG00B, - RADIO_2064_REG113, - RADIO_2064_REG007, - RADIO_2064_REG0FC, - RADIO_2064_REG0FD, - RADIO_2064_REG012, - RADIO_2064_REG057, - RADIO_2064_REG059, - RADIO_2064_REG05C, - RADIO_2064_REG078, - RADIO_2064_REG092, -}; - -static const -u16 tempsense_phy_regs[14] = { - 0x503, - 0x4a4, - 0x4d0, - 0x4d9, - 0x4da, - 0x4a6, - 0x938, - 0x939, - 0x4d8, - 0x4d0, - 0x4d7, - 0x4a5, - 0x40d, - 0x4a2, -}; - -static const -u16 rxiq_cal_rf_reg[11] = { - RADIO_2064_REG098, - RADIO_2064_REG116, - RADIO_2064_REG12C, - RADIO_2064_REG06A, - RADIO_2064_REG00B, - RADIO_2064_REG01B, - RADIO_2064_REG113, - RADIO_2064_REG01D, - RADIO_2064_REG114, - RADIO_2064_REG02E, - RADIO_2064_REG12A, -}; - -static const -lcnphy_rx_iqcomp_t lcnphy_rx_iqcomp_table_rev0[] = { - {1, 0, 0}, - {2, 0, 0}, - {3, 0, 0}, - {4, 0, 0}, - {5, 0, 0}, - {6, 0, 0}, - {7, 0, 0}, - {8, 0, 0}, - {9, 0, 0}, - {10, 0, 0}, - {11, 0, 0}, - {12, 0, 0}, - {13, 0, 0}, - {14, 0, 0}, - {34, 0, 0}, - {38, 0, 0}, - {42, 0, 0}, - {46, 0, 0}, - {36, 0, 0}, - {40, 0, 0}, - {44, 0, 0}, - {48, 0, 0}, - {52, 0, 0}, - {56, 0, 0}, - {60, 0, 0}, - {64, 0, 0}, - {100, 0, 0}, - {104, 0, 0}, - {108, 0, 0}, - {112, 0, 0}, - {116, 0, 0}, - {120, 0, 0}, - {124, 0, 0}, - {128, 0, 0}, - {132, 0, 0}, - {136, 0, 0}, - {140, 0, 0}, - {149, 0, 0}, - {153, 0, 0}, - {157, 0, 0}, - {161, 0, 0}, - {165, 0, 0}, - {184, 0, 0}, - {188, 0, 0}, - {192, 0, 0}, - {196, 0, 0}, - {200, 0, 0}, - {204, 0, 0}, - {208, 0, 0}, - {212, 0, 0}, - {216, 0, 0}, -}; - -static const u32 lcnphy_23bitgaincode_table[] = { - 0x200100, - 0x200200, - 0x200004, - 0x200014, - 0x200024, - 0x200034, - 0x200134, - 0x200234, - 0x200334, - 0x200434, - 0x200037, - 0x200137, - 0x200237, - 0x200337, - 0x200437, - 0x000035, - 0x000135, - 0x000235, - 0x000037, - 0x000137, - 0x000237, - 0x000337, - 0x00013f, - 0x00023f, - 0x00033f, - 0x00034f, - 0x00044f, - 0x00144f, - 0x00244f, - 0x00254f, - 0x00354f, - 0x00454f, - 0x00464f, - 0x01464f, - 0x02464f, - 0x03464f, - 0x04464f, -}; - -static const s8 lcnphy_gain_table[] = { - -16, - -13, - 10, - 7, - 4, - 0, - 3, - 6, - 9, - 12, - 15, - 18, - 21, - 24, - 27, - 30, - 33, - 36, - 39, - 42, - 45, - 48, - 50, - 53, - 56, - 59, - 62, - 65, - 68, - 71, - 74, - 77, - 80, - 83, - 86, - 89, - 92, -}; - -static const s8 lcnphy_gain_index_offset_for_rssi[] = { - 7, - 7, - 7, - 7, - 7, - 7, - 7, - 8, - 7, - 7, - 6, - 7, - 7, - 4, - 4, - 4, - 4, - 4, - 4, - 4, - 4, - 3, - 3, - 3, - 3, - 3, - 3, - 4, - 2, - 2, - 2, - 2, - 2, - 2, - -1, - -2, - -2, - -2 -}; - -extern const u8 spur_tbl_rev0[]; -extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev1; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[]; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250; - -typedef struct _chan_info_2064_lcnphy { - uint chan; - uint freq; - u8 logen_buftune; - u8 logen_rccr_tx; - u8 txrf_mix_tune_ctrl; - u8 pa_input_tune_g; - u8 logen_rccr_rx; - u8 pa_rxrf_lna1_freq_tune; - u8 pa_rxrf_lna2_freq_tune; - u8 rxrf_rxrf_spare1; -} chan_info_2064_lcnphy_t; - -static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = { - {1, 2412, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {2, 2417, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {3, 2422, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {4, 2427, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {5, 2432, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {6, 2437, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {7, 2442, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {8, 2447, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {9, 2452, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {10, 2457, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {11, 2462, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {12, 2467, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {13, 2472, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, - {14, 2484, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, -}; - -lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = { - {0x00, 0, 0, 0, 0}, - {0x01, 0x64, 0x64, 0, 0}, - {0x02, 0x20, 0x20, 0, 0}, - {0x03, 0x66, 0x66, 0, 0}, - {0x04, 0xf8, 0xf8, 0, 0}, - {0x05, 0, 0, 0, 0}, - {0x06, 0x10, 0x10, 0, 0}, - {0x07, 0, 0, 0, 0}, - {0x08, 0, 0, 0, 0}, - {0x09, 0, 0, 0, 0}, - {0x0A, 0x37, 0x37, 0, 0}, - {0x0B, 0x6, 0x6, 0, 0}, - {0x0C, 0x55, 0x55, 0, 0}, - {0x0D, 0x8b, 0x8b, 0, 0}, - {0x0E, 0, 0, 0, 0}, - {0x0F, 0x5, 0x5, 0, 0}, - {0x10, 0, 0, 0, 0}, - {0x11, 0xe, 0xe, 0, 0}, - {0x12, 0, 0, 0, 0}, - {0x13, 0xb, 0xb, 0, 0}, - {0x14, 0x2, 0x2, 0, 0}, - {0x15, 0x12, 0x12, 0, 0}, - {0x16, 0x12, 0x12, 0, 0}, - {0x17, 0xc, 0xc, 0, 0}, - {0x18, 0xc, 0xc, 0, 0}, - {0x19, 0xc, 0xc, 0, 0}, - {0x1A, 0x8, 0x8, 0, 0}, - {0x1B, 0x2, 0x2, 0, 0}, - {0x1C, 0, 0, 0, 0}, - {0x1D, 0x1, 0x1, 0, 0}, - {0x1E, 0x12, 0x12, 0, 0}, - {0x1F, 0x6e, 0x6e, 0, 0}, - {0x20, 0x2, 0x2, 0, 0}, - {0x21, 0x23, 0x23, 0, 0}, - {0x22, 0x8, 0x8, 0, 0}, - {0x23, 0, 0, 0, 0}, - {0x24, 0, 0, 0, 0}, - {0x25, 0xc, 0xc, 0, 0}, - {0x26, 0x33, 0x33, 0, 0}, - {0x27, 0x55, 0x55, 0, 0}, - {0x28, 0, 0, 0, 0}, - {0x29, 0x30, 0x30, 0, 0}, - {0x2A, 0xb, 0xb, 0, 0}, - {0x2B, 0x1b, 0x1b, 0, 0}, - {0x2C, 0x3, 0x3, 0, 0}, - {0x2D, 0x1b, 0x1b, 0, 0}, - {0x2E, 0, 0, 0, 0}, - {0x2F, 0x20, 0x20, 0, 0}, - {0x30, 0xa, 0xa, 0, 0}, - {0x31, 0, 0, 0, 0}, - {0x32, 0x62, 0x62, 0, 0}, - {0x33, 0x19, 0x19, 0, 0}, - {0x34, 0x33, 0x33, 0, 0}, - {0x35, 0x77, 0x77, 0, 0}, - {0x36, 0, 0, 0, 0}, - {0x37, 0x70, 0x70, 0, 0}, - {0x38, 0x3, 0x3, 0, 0}, - {0x39, 0xf, 0xf, 0, 0}, - {0x3A, 0x6, 0x6, 0, 0}, - {0x3B, 0xcf, 0xcf, 0, 0}, - {0x3C, 0x1a, 0x1a, 0, 0}, - {0x3D, 0x6, 0x6, 0, 0}, - {0x3E, 0x42, 0x42, 0, 0}, - {0x3F, 0, 0, 0, 0}, - {0x40, 0xfb, 0xfb, 0, 0}, - {0x41, 0x9a, 0x9a, 0, 0}, - {0x42, 0x7a, 0x7a, 0, 0}, - {0x43, 0x29, 0x29, 0, 0}, - {0x44, 0, 0, 0, 0}, - {0x45, 0x8, 0x8, 0, 0}, - {0x46, 0xce, 0xce, 0, 0}, - {0x47, 0x27, 0x27, 0, 0}, - {0x48, 0x62, 0x62, 0, 0}, - {0x49, 0x6, 0x6, 0, 0}, - {0x4A, 0x58, 0x58, 0, 0}, - {0x4B, 0xf7, 0xf7, 0, 0}, - {0x4C, 0, 0, 0, 0}, - {0x4D, 0xb3, 0xb3, 0, 0}, - {0x4E, 0, 0, 0, 0}, - {0x4F, 0x2, 0x2, 0, 0}, - {0x50, 0, 0, 0, 0}, - {0x51, 0x9, 0x9, 0, 0}, - {0x52, 0x5, 0x5, 0, 0}, - {0x53, 0x17, 0x17, 0, 0}, - {0x54, 0x38, 0x38, 0, 0}, - {0x55, 0, 0, 0, 0}, - {0x56, 0, 0, 0, 0}, - {0x57, 0xb, 0xb, 0, 0}, - {0x58, 0, 0, 0, 0}, - {0x59, 0, 0, 0, 0}, - {0x5A, 0, 0, 0, 0}, - {0x5B, 0, 0, 0, 0}, - {0x5C, 0, 0, 0, 0}, - {0x5D, 0, 0, 0, 0}, - {0x5E, 0x88, 0x88, 0, 0}, - {0x5F, 0xcc, 0xcc, 0, 0}, - {0x60, 0x74, 0x74, 0, 0}, - {0x61, 0x74, 0x74, 0, 0}, - {0x62, 0x74, 0x74, 0, 0}, - {0x63, 0x44, 0x44, 0, 0}, - {0x64, 0x77, 0x77, 0, 0}, - {0x65, 0x44, 0x44, 0, 0}, - {0x66, 0x77, 0x77, 0, 0}, - {0x67, 0x55, 0x55, 0, 0}, - {0x68, 0x77, 0x77, 0, 0}, - {0x69, 0x77, 0x77, 0, 0}, - {0x6A, 0, 0, 0, 0}, - {0x6B, 0x7f, 0x7f, 0, 0}, - {0x6C, 0x8, 0x8, 0, 0}, - {0x6D, 0, 0, 0, 0}, - {0x6E, 0x88, 0x88, 0, 0}, - {0x6F, 0x66, 0x66, 0, 0}, - {0x70, 0x66, 0x66, 0, 0}, - {0x71, 0x28, 0x28, 0, 0}, - {0x72, 0x55, 0x55, 0, 0}, - {0x73, 0x4, 0x4, 0, 0}, - {0x74, 0, 0, 0, 0}, - {0x75, 0, 0, 0, 0}, - {0x76, 0, 0, 0, 0}, - {0x77, 0x1, 0x1, 0, 0}, - {0x78, 0xd6, 0xd6, 0, 0}, - {0x79, 0, 0, 0, 0}, - {0x7A, 0, 0, 0, 0}, - {0x7B, 0, 0, 0, 0}, - {0x7C, 0, 0, 0, 0}, - {0x7D, 0, 0, 0, 0}, - {0x7E, 0, 0, 0, 0}, - {0x7F, 0, 0, 0, 0}, - {0x80, 0, 0, 0, 0}, - {0x81, 0, 0, 0, 0}, - {0x82, 0, 0, 0, 0}, - {0x83, 0xb4, 0xb4, 0, 0}, - {0x84, 0x1, 0x1, 0, 0}, - {0x85, 0x20, 0x20, 0, 0}, - {0x86, 0x5, 0x5, 0, 0}, - {0x87, 0xff, 0xff, 0, 0}, - {0x88, 0x7, 0x7, 0, 0}, - {0x89, 0x77, 0x77, 0, 0}, - {0x8A, 0x77, 0x77, 0, 0}, - {0x8B, 0x77, 0x77, 0, 0}, - {0x8C, 0x77, 0x77, 0, 0}, - {0x8D, 0x8, 0x8, 0, 0}, - {0x8E, 0xa, 0xa, 0, 0}, - {0x8F, 0x8, 0x8, 0, 0}, - {0x90, 0x18, 0x18, 0, 0}, - {0x91, 0x5, 0x5, 0, 0}, - {0x92, 0x1f, 0x1f, 0, 0}, - {0x93, 0x10, 0x10, 0, 0}, - {0x94, 0x3, 0x3, 0, 0}, - {0x95, 0, 0, 0, 0}, - {0x96, 0, 0, 0, 0}, - {0x97, 0xaa, 0xaa, 0, 0}, - {0x98, 0, 0, 0, 0}, - {0x99, 0x23, 0x23, 0, 0}, - {0x9A, 0x7, 0x7, 0, 0}, - {0x9B, 0xf, 0xf, 0, 0}, - {0x9C, 0x10, 0x10, 0, 0}, - {0x9D, 0x3, 0x3, 0, 0}, - {0x9E, 0x4, 0x4, 0, 0}, - {0x9F, 0x20, 0x20, 0, 0}, - {0xA0, 0, 0, 0, 0}, - {0xA1, 0, 0, 0, 0}, - {0xA2, 0, 0, 0, 0}, - {0xA3, 0, 0, 0, 0}, - {0xA4, 0x1, 0x1, 0, 0}, - {0xA5, 0x77, 0x77, 0, 0}, - {0xA6, 0x77, 0x77, 0, 0}, - {0xA7, 0x77, 0x77, 0, 0}, - {0xA8, 0x77, 0x77, 0, 0}, - {0xA9, 0x8c, 0x8c, 0, 0}, - {0xAA, 0x88, 0x88, 0, 0}, - {0xAB, 0x78, 0x78, 0, 0}, - {0xAC, 0x57, 0x57, 0, 0}, - {0xAD, 0x88, 0x88, 0, 0}, - {0xAE, 0, 0, 0, 0}, - {0xAF, 0x8, 0x8, 0, 0}, - {0xB0, 0x88, 0x88, 0, 0}, - {0xB1, 0, 0, 0, 0}, - {0xB2, 0x1b, 0x1b, 0, 0}, - {0xB3, 0x3, 0x3, 0, 0}, - {0xB4, 0x24, 0x24, 0, 0}, - {0xB5, 0x3, 0x3, 0, 0}, - {0xB6, 0x1b, 0x1b, 0, 0}, - {0xB7, 0x24, 0x24, 0, 0}, - {0xB8, 0x3, 0x3, 0, 0}, - {0xB9, 0, 0, 0, 0}, - {0xBA, 0xaa, 0xaa, 0, 0}, - {0xBB, 0, 0, 0, 0}, - {0xBC, 0x4, 0x4, 0, 0}, - {0xBD, 0, 0, 0, 0}, - {0xBE, 0x8, 0x8, 0, 0}, - {0xBF, 0x11, 0x11, 0, 0}, - {0xC0, 0, 0, 0, 0}, - {0xC1, 0, 0, 0, 0}, - {0xC2, 0x62, 0x62, 0, 0}, - {0xC3, 0x1e, 0x1e, 0, 0}, - {0xC4, 0x33, 0x33, 0, 0}, - {0xC5, 0x37, 0x37, 0, 0}, - {0xC6, 0, 0, 0, 0}, - {0xC7, 0x70, 0x70, 0, 0}, - {0xC8, 0x1e, 0x1e, 0, 0}, - {0xC9, 0x6, 0x6, 0, 0}, - {0xCA, 0x4, 0x4, 0, 0}, - {0xCB, 0x2f, 0x2f, 0, 0}, - {0xCC, 0xf, 0xf, 0, 0}, - {0xCD, 0, 0, 0, 0}, - {0xCE, 0xff, 0xff, 0, 0}, - {0xCF, 0x8, 0x8, 0, 0}, - {0xD0, 0x3f, 0x3f, 0, 0}, - {0xD1, 0x3f, 0x3f, 0, 0}, - {0xD2, 0x3f, 0x3f, 0, 0}, - {0xD3, 0, 0, 0, 0}, - {0xD4, 0, 0, 0, 0}, - {0xD5, 0, 0, 0, 0}, - {0xD6, 0xcc, 0xcc, 0, 0}, - {0xD7, 0, 0, 0, 0}, - {0xD8, 0x8, 0x8, 0, 0}, - {0xD9, 0x8, 0x8, 0, 0}, - {0xDA, 0x8, 0x8, 0, 0}, - {0xDB, 0x11, 0x11, 0, 0}, - {0xDC, 0, 0, 0, 0}, - {0xDD, 0x87, 0x87, 0, 0}, - {0xDE, 0x88, 0x88, 0, 0}, - {0xDF, 0x8, 0x8, 0, 0}, - {0xE0, 0x8, 0x8, 0, 0}, - {0xE1, 0x8, 0x8, 0, 0}, - {0xE2, 0, 0, 0, 0}, - {0xE3, 0, 0, 0, 0}, - {0xE4, 0, 0, 0, 0}, - {0xE5, 0xf5, 0xf5, 0, 0}, - {0xE6, 0x30, 0x30, 0, 0}, - {0xE7, 0x1, 0x1, 0, 0}, - {0xE8, 0, 0, 0, 0}, - {0xE9, 0xff, 0xff, 0, 0}, - {0xEA, 0, 0, 0, 0}, - {0xEB, 0, 0, 0, 0}, - {0xEC, 0x22, 0x22, 0, 0}, - {0xED, 0, 0, 0, 0}, - {0xEE, 0, 0, 0, 0}, - {0xEF, 0, 0, 0, 0}, - {0xF0, 0x3, 0x3, 0, 0}, - {0xF1, 0x1, 0x1, 0, 0}, - {0xF2, 0, 0, 0, 0}, - {0xF3, 0, 0, 0, 0}, - {0xF4, 0, 0, 0, 0}, - {0xF5, 0, 0, 0, 0}, - {0xF6, 0, 0, 0, 0}, - {0xF7, 0x6, 0x6, 0, 0}, - {0xF8, 0, 0, 0, 0}, - {0xF9, 0, 0, 0, 0}, - {0xFA, 0x40, 0x40, 0, 0}, - {0xFB, 0, 0, 0, 0}, - {0xFC, 0x1, 0x1, 0, 0}, - {0xFD, 0x80, 0x80, 0, 0}, - {0xFE, 0x2, 0x2, 0, 0}, - {0xFF, 0x10, 0x10, 0, 0}, - {0x100, 0x2, 0x2, 0, 0}, - {0x101, 0x1e, 0x1e, 0, 0}, - {0x102, 0x1e, 0x1e, 0, 0}, - {0x103, 0, 0, 0, 0}, - {0x104, 0x1f, 0x1f, 0, 0}, - {0x105, 0, 0x8, 0, 1}, - {0x106, 0x2a, 0x2a, 0, 0}, - {0x107, 0xf, 0xf, 0, 0}, - {0x108, 0, 0, 0, 0}, - {0x109, 0, 0, 0, 0}, - {0x10A, 0, 0, 0, 0}, - {0x10B, 0, 0, 0, 0}, - {0x10C, 0, 0, 0, 0}, - {0x10D, 0, 0, 0, 0}, - {0x10E, 0, 0, 0, 0}, - {0x10F, 0, 0, 0, 0}, - {0x110, 0, 0, 0, 0}, - {0x111, 0, 0, 0, 0}, - {0x112, 0, 0, 0, 0}, - {0x113, 0, 0, 0, 0}, - {0x114, 0, 0, 0, 0}, - {0x115, 0, 0, 0, 0}, - {0x116, 0, 0, 0, 0}, - {0x117, 0, 0, 0, 0}, - {0x118, 0, 0, 0, 0}, - {0x119, 0, 0, 0, 0}, - {0x11A, 0, 0, 0, 0}, - {0x11B, 0, 0, 0, 0}, - {0x11C, 0x1, 0x1, 0, 0}, - {0x11D, 0, 0, 0, 0}, - {0x11E, 0, 0, 0, 0}, - {0x11F, 0, 0, 0, 0}, - {0x120, 0, 0, 0, 0}, - {0x121, 0, 0, 0, 0}, - {0x122, 0x80, 0x80, 0, 0}, - {0x123, 0, 0, 0, 0}, - {0x124, 0xf8, 0xf8, 0, 0}, - {0x125, 0, 0, 0, 0}, - {0x126, 0, 0, 0, 0}, - {0x127, 0, 0, 0, 0}, - {0x128, 0, 0, 0, 0}, - {0x129, 0, 0, 0, 0}, - {0x12A, 0, 0, 0, 0}, - {0x12B, 0, 0, 0, 0}, - {0x12C, 0, 0, 0, 0}, - {0x12D, 0, 0, 0, 0}, - {0x12E, 0, 0, 0, 0}, - {0x12F, 0, 0, 0, 0}, - {0x130, 0, 0, 0, 0}, - {0xFFFF, 0, 0, 0, 0} -}; - -#define LCNPHY_NUM_DIG_FILT_COEFFS 16 -#define LCNPHY_NUM_TX_DIG_FILTERS_CCK 13 - -u16 - LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK] - [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { - {0, 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778, 1582, 64, - 128, 64,}, - {1, 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608, 1863, 93, - 167, 93,}, - {2, 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192, 778, 1582, 64, - 128, 64,}, - {3, 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205, 754, 1760, - 170, 340, 170,}, - {20, 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205, 767, 1760, - 256, 185, 256,}, - {21, 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205, 767, 1760, - 256, 273, 256,}, - {22, 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205, 767, 1760, - 256, 352, 256,}, - {23, 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205, 767, 1760, - 128, 233, 128,}, - {24, 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766, 1760, 256, - 1881, 256,}, - {25, 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765, 1760, 256, - 1881, 256,}, - {26, 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614, 1864, 128, - 384, 288,}, - {27, 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576, 613, 1864, - 128, 384, 288,}, - {30, 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205, 754, 1760, - 170, 340, 170,}, -}; - -#define LCNPHY_NUM_TX_DIG_FILTERS_OFDM 3 -u16 - LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM] - [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { - {0, 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0, 0x0, - 0x278, 0xfea0, 0x80, 0x100, 0x80,}, - {1, 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50, - 750, 0xFE2B, 212, 0xFFCE, 212,}, - {2, 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748, - 0xFEF2, 128, 0xFFE2, 128} -}; - -#define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \ - mod_phy_reg(pi, 0x4a4, \ - (0x1ff << 0), \ - (u16)(idx) << 0) - -#define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \ - mod_phy_reg(pi, 0x4a5, \ - (0x7 << 8), \ - (u16)(npt) << 8) - -#define wlc_lcnphy_get_tx_pwr_ctrl(pi) \ - (read_phy_reg((pi), 0x4a4) & \ - ((0x1 << 15) | \ - (0x1 << 14) | \ - (0x1 << 13))) - -#define wlc_lcnphy_get_tx_pwr_npt(pi) \ - ((read_phy_reg(pi, 0x4a5) & \ - (0x7 << 8)) >> \ - 8) - -#define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \ - (read_phy_reg(pi, 0x473) & 0x1ff) - -#define wlc_lcnphy_get_target_tx_pwr(pi) \ - ((read_phy_reg(pi, 0x4a7) & \ - (0xff << 0)) >> \ - 0) - -#define wlc_lcnphy_set_target_tx_pwr(pi, target) \ - mod_phy_reg(pi, 0x4a7, \ - (0xff << 0), \ - (u16)(target) << 0) - -#define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20)) -#define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000)) - -#define LCNPHY_IQLOCC_READ(val) ((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f))) -#define FIXED_TXPWR 78 -#define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val)) - -static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor, - u8 precision); -static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, - u16 ext_lna, u16 trsw, - u16 biq2, u16 biq1, - u16 tia, u16 lna2, - u16 lna1); -static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi); -static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain); -static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx); -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0); -static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi); -static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains); -static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable); -static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi); -static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable); -static void wlc_lcnphy_set_tx_gain(phy_info_t *pi, - lcnphy_txgains_t *target_gains); -static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, u16 num_samps, - u8 wait_time, lcnphy_iq_est_t *iq_est); -static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps); -static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi); -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode); -extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi); -static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, - u8 channel); - -static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi, - const lcnphy_tx_gain_tbl_entry *g); - -static void wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, - u16 thresh, s16 *ptr, int mode); -static int wlc_lcnphy_calc_floor(s16 coeff, int type); -static void wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, - u16 *values_to_save); -static void wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, - u16 *values_to_save); -static void wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, - s16 coeff_y); -static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type); -static void wlc_lcnphy_a1(phy_info_t *pi, int cal_type, - int num_levels, int step_size_lg2); -static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi); - -static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, - chanspec_t chanspec); -static void wlc_lcnphy_agc_temp_init(phy_info_t *pi); -static void wlc_lcnphy_temp_adj(phy_info_t *pi); -static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi); -static void wlc_lcnphy_baseband_init(phy_info_t *pi); -static void wlc_lcnphy_radio_init(phy_info_t *pi); -static void wlc_lcnphy_rc_cal(phy_info_t *pi); -static void wlc_lcnphy_rcal(phy_info_t *pi); -static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable); -static int wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, - s16 filt_type); -static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b); - -void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti) -{ - wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456); -} - -void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti) -{ - wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456); -} - -static void -wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id, - const void *tbl_ptr, u32 tbl_len, - u32 tbl_width, u32 tbl_offset) -{ - phytbl_info_t tab; - tab.tbl_id = tbl_id; - tab.tbl_ptr = tbl_ptr; - tab.tbl_len = tbl_len; - tab.tbl_width = tbl_width; - tab.tbl_offset = tbl_offset; - wlc_lcnphy_read_table(pi, &tab); -} - -static void -wlc_lcnphy_common_write_table(phy_info_t *pi, u32 tbl_id, - const void *tbl_ptr, u32 tbl_len, - u32 tbl_width, u32 tbl_offset) -{ - - phytbl_info_t tab; - tab.tbl_id = tbl_id; - tab.tbl_ptr = tbl_ptr; - tab.tbl_len = tbl_len; - tab.tbl_width = tbl_width; - tab.tbl_offset = tbl_offset; - wlc_lcnphy_write_table(pi, &tab); -} - -static u32 -wlc_lcnphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision) -{ - u32 quotient, remainder, roundup, rbit; - - quotient = dividend / divisor; - remainder = dividend % divisor; - rbit = divisor & 1; - roundup = (divisor >> 1) + rbit; - - while (precision--) { - quotient <<= 1; - if (remainder >= roundup) { - quotient++; - remainder = ((remainder - roundup) << 1) + rbit; - } else { - remainder <<= 1; - } - } - - if (remainder >= roundup) - quotient++; - - return quotient; -} - -static int wlc_lcnphy_calc_floor(s16 coeff_x, int type) -{ - int k; - k = 0; - if (type == 0) { - if (coeff_x < 0) { - k = (coeff_x - 1) / 2; - } else { - k = coeff_x / 2; - } - } - if (type == 1) { - if ((coeff_x + 1) < 0) - k = (coeff_x) / 2; - else - k = (coeff_x + 1) / 2; - } - return k; -} - -s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi) -{ - s8 index; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (txpwrctrl_off(pi)) - index = pi_lcn->lcnphy_current_index; - else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) - index = - (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) - / 2); - else - index = pi_lcn->lcnphy_current_index; - return index; -} - -static u32 wlc_lcnphy_measure_digital_power(phy_info_t *pi, u16 nsamples) -{ - lcnphy_iq_est_t iq_est = { 0, 0, 0 }; - - if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est)) - return 0; - return (iq_est.i_pwr + iq_est.q_pwr) / nsamples; -} - -void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel) -{ - u16 afectrlovr, afectrlovrval; - afectrlovr = read_phy_reg(pi, 0x43b); - afectrlovrval = read_phy_reg(pi, 0x43c); - if (channel != 0) { - mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1); - - mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1); - - mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4); - - mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6); - - write_phy_reg(pi, 0x44b, 0xffff); - wlc_lcnphy_tx_pu(pi, 1); - - mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8); - - or_phy_reg(pi, 0x6da, 0x0080); - - or_phy_reg(pi, 0x00a, 0x228); - } else { - and_phy_reg(pi, 0x00a, ~(0x228)); - - and_phy_reg(pi, 0x6da, 0xFF7F); - write_phy_reg(pi, 0x43b, afectrlovr); - write_phy_reg(pi, 0x43c, afectrlovrval); - } -} - -static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi) -{ - u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr; - - save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c); - save_AfeCtrlOvr = read_phy_reg(pi, 0x43b); - - write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1); - write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1); - - write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe); - write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe); - - write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal); - write_phy_reg(pi, 0x43b, save_AfeCtrlOvr); -} - -static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable) -{ - if (enable) { - write_phy_reg(pi, 0x942, 0x7); - write_phy_reg(pi, 0x93b, ((1 << 13) + 23)); - write_phy_reg(pi, 0x93c, ((1 << 13) + 1989)); - - write_phy_reg(pi, 0x44a, 0x084); - write_phy_reg(pi, 0x44a, 0x080); - write_phy_reg(pi, 0x6d3, 0x2222); - write_phy_reg(pi, 0x6d3, 0x2220); - } else { - write_phy_reg(pi, 0x942, 0x0); - write_phy_reg(pi, 0x93b, ((0 << 13) + 23)); - write_phy_reg(pi, 0x93c, ((0 << 13) + 1989)); - } - wlapi_switch_macfreq(pi->sh->physhim, enable); -} - -void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) -{ - u8 channel = CHSPEC_CHANNEL(chanspec); - - wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); - - wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec); - - or_phy_reg(pi, 0x44a, 0x44); - write_phy_reg(pi, 0x44a, 0x80); - - if (!NORADIO_ENAB(pi->pubpi)) { - wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel); - udelay(1000); - } - - wlc_lcnphy_toggle_afe_pwdn(pi); - - write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20); - write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor); - - if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { - mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); - - wlc_lcnphy_load_tx_iir_filter(pi, false, 3); - } else { - mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); - - wlc_lcnphy_load_tx_iir_filter(pi, false, 2); - } - - wlc_lcnphy_load_tx_iir_filter(pi, true, 0); - - mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3); - -} - -static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain) -{ - u16 dac_ctrl; - - dac_ctrl = (read_phy_reg(pi, 0x439) >> 0); - dac_ctrl = dac_ctrl & 0xc7f; - dac_ctrl = dac_ctrl | (dac_gain << 7); - mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0); - -} - -static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable) -{ - u16 bit = bEnable ? 1 : 0; - - mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7); - - mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14); - - mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6); -} - -static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi) -{ - u16 pa_gain; - - pa_gain = (read_phy_reg(pi, 0x4fb) & - LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >> - LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT; - - return pa_gain; -} - -static void -wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains) -{ - u16 pa_gain = wlc_lcnphy_get_pa_gain(pi); - - mod_phy_reg(pi, 0x4b5, - (0xffff << 0), - ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) << - 0); - mod_phy_reg(pi, 0x4fb, - (0x7fff << 0), - ((target_gains->pad_gain) | (pa_gain << 8)) << 0); - - mod_phy_reg(pi, 0x4fc, - (0xffff << 0), - ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) << - 0); - mod_phy_reg(pi, 0x4fd, - (0x7fff << 0), - ((target_gains->pad_gain) | (pa_gain << 8)) << 0); - - wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain); - - wlc_lcnphy_enable_tx_gain_override(pi); -} - -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0) -{ - u16 m0m1 = (u16) m0 << 8; - phytbl_info_t tab; - - tab.tbl_ptr = &m0m1; - tab.tbl_len = 1; - tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; - tab.tbl_offset = 87; - tab.tbl_width = 16; - wlc_lcnphy_write_table(pi, &tab); -} - -static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi) -{ - u32 data_buf[64]; - phytbl_info_t tab; - - memset(data_buf, 0, sizeof(data_buf)); - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_ptr = data_buf; - - if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { - - tab.tbl_len = 30; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; - wlc_lcnphy_write_table(pi, &tab); - } - - tab.tbl_len = 64; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET; - wlc_lcnphy_write_table(pi, &tab); -} - -typedef enum { - LCNPHY_TSSI_PRE_PA, - LCNPHY_TSSI_POST_PA, - LCNPHY_TSSI_EXT -} lcnphy_tssi_mode_t; - -static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos) -{ - mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0); - - mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6); - - if (LCNPHY_TSSI_POST_PA == pos) { - mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); - } else { - mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1); - mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); - } - } else { - mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2); - - mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); - } else { - mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); - mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); - } - } - mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14); - - if (LCNPHY_TSSI_EXT == pos) { - write_radio_reg(pi, RADIO_2064_REG07F, 1); - mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2); - mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7); - mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3); - } -} - -static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi) -{ - u16 N1, N2, N3, N4, N5, N6, N; - N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0)) - >> 0); - N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12)) - >> 12); - N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0)) - >> 0); - N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8)) - >> 8); - N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0)) - >> 0); - N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8)) - >> 8); - N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80; - if (N < 1600) - N = 1600; - return N; -} - -static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi) -{ - u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - auxpga_vmid = - (2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf; - auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4; - auxpga_gain_temp = 2; - - mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1); - - mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3); - - mod_phy_reg(pi, 0x4db, - (0x3ff << 0) | - (0x7 << 12), - (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); - - mod_phy_reg(pi, 0x4dc, - (0x3ff << 0) | - (0x7 << 12), - (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); - - mod_phy_reg(pi, 0x40a, - (0x3ff << 0) | - (0x7 << 12), - (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12)); - - mod_phy_reg(pi, 0x40b, - (0x3ff << 0) | - (0x7 << 12), - (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12)); - - mod_phy_reg(pi, 0x40c, - (0x3ff << 0) | - (0x7 << 12), - (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12)); - - mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5)); -} - -static void wlc_lcnphy_tssi_setup(phy_info_t *pi) -{ - phytbl_info_t tab; - u32 rfseq, ind; - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_ptr = &ind; - tab.tbl_len = 1; - tab.tbl_offset = 0; - for (ind = 0; ind < 128; ind++) { - wlc_lcnphy_write_table(pi, &tab); - tab.tbl_offset++; - } - tab.tbl_offset = 704; - for (ind = 0; ind < 128; ind++) { - wlc_lcnphy_write_table(pi, &tab); - tab.tbl_offset++; - } - mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4); - - wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT); - mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); - - mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15); - - mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); - - mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0); - - mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); - - mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); - - mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); - - mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); - - mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8); - - mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); - - mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8); - - mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6); - - mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0); - - wlc_lcnphy_clear_tx_power_offsets(pi); - - mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); - - mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0); - - mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe); - mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); - } else { - mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); - mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3); - } - - write_radio_reg(pi, RADIO_2064_REG025, 0xc); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); - } else { - if (CHSPEC_IS2G(pi->radio_chanspec)) - mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); - else - mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1); - } - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) - mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); - else - mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2); - - mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0); - - mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3); - - if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { - mod_phy_reg(pi, 0x4d7, - (0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12); - } - - rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); - tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; - tab.tbl_width = 16; - tab.tbl_ptr = &rfseq; - tab.tbl_len = 1; - tab.tbl_offset = 6; - wlc_lcnphy_write_table(pi, &tab); - - mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); - - mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8); - - wlc_lcnphy_pwrctrl_rssiparams(pi); -} - -void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi) -{ - u16 tx_cnt, tx_total, npt; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - tx_total = wlc_lcnphy_total_tx_frames(pi); - tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt; - npt = wlc_lcnphy_get_tx_pwr_npt(pi); - - if (tx_cnt > (1 << npt)) { - - pi_lcn->lcnphy_tssi_tx_cnt = tx_total; - - pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi); - pi_lcn->lcnphy_tssi_npt = npt; - - } -} - -s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1) -{ - s32 a, b, p; - - a = 32768 + (a1 * tssi); - b = (1024 * b0) + (64 * b1 * tssi); - p = ((2 * b) + a) / (2 * a); - - return p; -} - -static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi) -{ - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - return; - - pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313; - pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT; -} - -void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi) -{ - phytbl_info_t tab; - u32 rate_table[WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM + - WLC_NUM_RATES_MCS_1_STREAM]; - uint i, j; - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - return; - - for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) { - - if (i == WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM) - j = TXP_FIRST_MCS_20_SISO; - - rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); - } - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_len = ARRAY_SIZE(rate_table); - tab.tbl_ptr = rate_table; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; - wlc_lcnphy_write_table(pi, &tab); - - if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) { - wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min); - - wlc_lcnphy_txpower_reset_npt(pi); - } -} - -static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index) -{ - u32 cck_offset[4] = { 22, 22, 22, 22 }; - u32 ofdm_offset, reg_offset_cck; - int i; - u16 index2; - phytbl_info_t tab; - - if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) - return; - - mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); - - mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14); - - or_phy_reg(pi, 0x6da, 0x0040); - - reg_offset_cck = 0; - for (i = 0; i < 4; i++) - cck_offset[i] -= reg_offset_cck; - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_len = 4; - tab.tbl_ptr = cck_offset; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; - wlc_lcnphy_write_table(pi, &tab); - ofdm_offset = 0; - tab.tbl_len = 1; - tab.tbl_ptr = &ofdm_offset; - for (i = 836; i < 862; i++) { - tab.tbl_offset = i; - wlc_lcnphy_write_table(pi, &tab); - } - - mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15); - - mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); - - mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13); - - mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7); - - mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6); - - mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15); - - index2 = (u16) (index * 2); - mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); - - mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4); - -} - -static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi) -{ - s8 index, delta_brd, delta_temp, new_index, tempcorrx; - s16 manp, meas_temp, temp_diff; - bool neg = 0; - u16 temp; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) - return pi_lcn->lcnphy_current_index; - - index = FIXED_TXPWR; - - if (NORADIO_ENAB(pi->pubpi)) - return index; - - if (pi_lcn->lcnphy_tempsense_slope == 0) { - return index; - } - temp = (u16) wlc_lcnphy_tempsense(pi, 0); - meas_temp = LCNPHY_TEMPSENSE(temp); - - if (pi->tx_power_min != 0) { - delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min); - } else { - delta_brd = 0; - } - - manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense); - temp_diff = manp - meas_temp; - if (temp_diff < 0) { - - neg = 1; - - temp_diff = -temp_diff; - } - - delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192), - (u32) (pi_lcn-> - lcnphy_tempsense_slope - * 10), 0); - if (neg) - delta_temp = -delta_temp; - - if (pi_lcn->lcnphy_tempsense_option == 3 - && LCNREV_IS(pi->pubpi.phy_rev, 0)) - delta_temp = 0; - if (pi_lcn->lcnphy_tempcorrx > 31) - tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64); - else - tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx; - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) - tempcorrx = 4; - new_index = - index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr; - new_index += tempcorrx; - - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) - index = 127; - if (new_index < 0 || new_index > 126) { - return index; - } - return new_index; -} - -static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode) -{ - - u16 current_mode = mode; - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && - mode == LCNPHY_TX_PWR_CTRL_HW) - current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED; - if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && - mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) - current_mode = LCNPHY_TX_PWR_CTRL_HW; - return current_mode; -} - -void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode) -{ - u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi); - s8 index; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode); - old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode); - - mod_phy_reg(pi, 0x6da, (0x1 << 6), - ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6); - - mod_phy_reg(pi, 0x6a3, (0x1 << 4), - ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4); - - if (old_mode != mode) { - if (LCNPHY_TX_PWR_CTRL_HW == old_mode) { - - wlc_lcnphy_tx_pwr_update_npt(pi); - - wlc_lcnphy_clear_tx_power_offsets(pi); - } - if (LCNPHY_TX_PWR_CTRL_HW == mode) { - - wlc_lcnphy_txpower_recalc_target(pi); - - wlc_lcnphy_set_start_tx_pwr_idx(pi, - pi_lcn-> - lcnphy_tssi_idx); - wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt); - mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0); - - pi_lcn->lcnphy_tssi_tx_cnt = - wlc_lcnphy_total_tx_frames(pi); - - wlc_lcnphy_disable_tx_gain_override(pi); - pi_lcn->lcnphy_tx_power_idx_override = -1; - } else - wlc_lcnphy_enable_tx_gain_override(pi); - - mod_phy_reg(pi, 0x4a4, - ((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode); - if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) { - index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); - wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index); - pi_lcn->lcnphy_current_index = (s8) - ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2); - } - } -} - -static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi) -{ - uint delay_count = 0; - - while (wlc_lcnphy_iqcal_active(pi)) { - udelay(100); - delay_count++; - - if (delay_count > (10 * 500)) - break; - } - - return (0 == wlc_lcnphy_iqcal_active(pi)); -} - -static void -wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, - lcnphy_txgains_t *target_gains, - lcnphy_cal_mode_t cal_mode, bool keep_tone) -{ - - lcnphy_txgains_t cal_gains, temp_gains; - u16 hash; - u8 band_idx; - int j; - u16 ncorr_override[5]; - u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 - }; - - u16 commands_fullcal[] = { - 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 }; - - u16 commands_recal[] = { - 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 }; - - u16 command_nums_fullcal[] = { - 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 }; - - u16 command_nums_recal[] = { - 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 }; - u16 *command_nums = command_nums_fullcal; - - u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start; - u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2; - u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl; - bool tx_gain_override_old; - lcnphy_txgains_t old_gains; - uint i, n_cal_cmds = 0, n_cal_start = 0; - u16 *values_to_save; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - values_to_save = kmalloc(sizeof(u16) * 20, GFP_ATOMIC); - if (NULL == values_to_save) { - return; - } - - save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); - save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); - - or_phy_reg(pi, 0x6da, 0x40); - or_phy_reg(pi, 0x6db, 0x3); - - switch (cal_mode) { - case LCNPHY_CAL_FULL: - start_coeffs = syst_coeffs; - cal_cmds = commands_fullcal; - n_cal_cmds = ARRAY_SIZE(commands_fullcal); - break; - - case LCNPHY_CAL_RECAL: - start_coeffs = syst_coeffs; - cal_cmds = commands_recal; - n_cal_cmds = ARRAY_SIZE(commands_recal); - command_nums = command_nums_recal; - break; - - default: - break; - } - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - start_coeffs, 11, 16, 64); - - write_phy_reg(pi, 0x6da, 0xffff); - mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3); - - tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi); - - mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - - save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db); - - mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0); - - mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12); - - wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save); - - tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); - if (tx_gain_override_old) - wlc_lcnphy_get_tx_gain(pi, &old_gains); - - if (!target_gains) { - if (!tx_gain_override_old) - wlc_lcnphy_set_tx_pwr_by_index(pi, - pi_lcn->lcnphy_tssi_idx); - wlc_lcnphy_get_tx_gain(pi, &temp_gains); - target_gains = &temp_gains; - } - - hash = (target_gains->gm_gain << 8) | - (target_gains->pga_gain << 4) | (target_gains->pad_gain); - - band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); - - cal_gains = *target_gains; - memset(ncorr_override, 0, sizeof(ncorr_override)); - for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) { - if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) { - cal_gains.gm_gain = - tbl_iqcal_gainparams_lcnphy[band_idx][j][1]; - cal_gains.pga_gain = - tbl_iqcal_gainparams_lcnphy[band_idx][j][2]; - cal_gains.pad_gain = - tbl_iqcal_gainparams_lcnphy[band_idx][j][3]; - memcpy(ncorr_override, - &tbl_iqcal_gainparams_lcnphy[band_idx][j][3], - sizeof(ncorr_override)); - break; - } - } - - wlc_lcnphy_set_tx_gain(pi, &cal_gains); - - write_phy_reg(pi, 0x453, 0xaa9); - write_phy_reg(pi, 0x93d, 0xc0); - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - (const void *) - lcnphy_iqcal_loft_gainladder, - ARRAY_SIZE(lcnphy_iqcal_loft_gainladder), - 16, 0); - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - (const void *)lcnphy_iqcal_ir_gainladder, - ARRAY_SIZE(lcnphy_iqcal_ir_gainladder), 16, - 32); - - if (pi->phy_tx_tone_freq) { - - wlc_lcnphy_stop_tx_tone(pi); - udelay(5); - wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); - } else { - wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); - } - - write_phy_reg(pi, 0x6da, 0xffff); - - for (i = n_cal_start; i < n_cal_cmds; i++) { - u16 zero_diq = 0; - u16 best_coeffs[11]; - u16 command_num; - - cal_type = (cal_cmds[i] & 0x0f00) >> 8; - - command_num = command_nums[i]; - if (ncorr_override[cal_type]) - command_num = - ncorr_override[cal_type] << 8 | (command_num & - 0xff); - - write_phy_reg(pi, 0x452, command_num); - - if ((cal_type == 3) || (cal_type == 4)) { - - wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, - &diq_start, 1, 16, 69); - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - &zero_diq, 1, 16, 69); - } - - write_phy_reg(pi, 0x451, cal_cmds[i]); - - if (!wlc_lcnphy_iqcal_wait(pi)) { - - goto cleanup; - } - - wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, - best_coeffs, - ARRAY_SIZE(best_coeffs), 16, 96); - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - best_coeffs, - ARRAY_SIZE(best_coeffs), 16, 64); - - if ((cal_type == 3) || (cal_type == 4)) { - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - &diq_start, 1, 16, 69); - } - wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, - pi_lcn->lcnphy_cal_results. - txiqlocal_bestcoeffs, - ARRAY_SIZE(pi_lcn-> - lcnphy_cal_results. - txiqlocal_bestcoeffs), - 16, 96); - } - - wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, - pi_lcn->lcnphy_cal_results. - txiqlocal_bestcoeffs, - ARRAY_SIZE(pi_lcn->lcnphy_cal_results. - txiqlocal_bestcoeffs), 16, 96); - pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true; - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - &pi_lcn->lcnphy_cal_results. - txiqlocal_bestcoeffs[0], 4, 16, 80); - - wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, - &pi_lcn->lcnphy_cal_results. - txiqlocal_bestcoeffs[5], 2, 16, 85); - - cleanup: - wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save); - kfree(values_to_save); - - if (!keep_tone) - wlc_lcnphy_stop_tx_tone(pi); - - write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2); - - write_phy_reg(pi, 0x453, 0); - - if (tx_gain_override_old) - wlc_lcnphy_set_tx_gain(pi, &old_gains); - wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old); - - write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl); - write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl); - -} - -static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) -{ - bool suspend, tx_gain_override_old; - lcnphy_txgains_t old_gains; - phy_info_t *pi = (phy_info_t *) ppi; - u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB, - idleTssi0_regvalue_2C; - u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112); - u16 SAVE_jtag_bb_afe_switch = - read_radio_reg(pi, RADIO_2064_REG007) & 1; - u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10; - u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4; - idleTssi = read_phy_reg(pi, 0x4ab); - suspend = - (0 == - (R_REG(&((phy_info_t *) pi)->regs->maccontrol) & - MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - - tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); - wlc_lcnphy_get_tx_gain(pi, &old_gains); - - wlc_lcnphy_enable_tx_gain_override(pi); - wlc_lcnphy_set_tx_pwr_by_index(pi, 127); - write_radio_reg(pi, RADIO_2064_REG112, 0x6); - mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1); - mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4); - mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2); - wlc_lcnphy_tssi_setup(pi); - wlc_phy_do_dummy_tx(pi, true, OFF); - idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) - >> 0); - - idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0)) - >> 0); - - if (idleTssi0_2C >= 256) - idleTssi0_OB = idleTssi0_2C - 256; - else - idleTssi0_OB = idleTssi0_2C + 256; - - idleTssi0_regvalue_OB = idleTssi0_OB; - if (idleTssi0_regvalue_OB >= 256) - idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256; - else - idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256; - mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0); - - mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12); - - wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old); - wlc_lcnphy_set_tx_gain(pi, &old_gains); - wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); - - write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain); - mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch); - mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga); - mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en); - mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7); - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); -} - -static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) -{ - bool suspend; - u16 save_txpwrCtrlEn; - u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain; - u16 auxpga_vmid; - phytbl_info_t tab; - u32 val; - u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025, - save_reg112; - u16 values_to_save[14]; - s8 index; - int i; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - udelay(999); - - save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007); - save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF); - save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F); - save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005); - save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025); - save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112); - - for (i = 0; i < 14; i++) - values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]); - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - index = pi_lcn->lcnphy_current_index; - wlc_lcnphy_set_tx_pwr_by_index(pi, 127); - mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1); - mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4); - mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2); - mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); - - mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15); - - mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); - - mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); - - mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); - - mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); - - mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); - - mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8); - - mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); - - mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8); - - mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4); - - mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8); - - mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12); - - mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12); - - mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13); - - mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); - - write_radio_reg(pi, RADIO_2064_REG025, 0xC); - - mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3); - - mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); - - mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); - - val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); - tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; - tab.tbl_width = 16; - tab.tbl_len = 1; - tab.tbl_ptr = &val; - tab.tbl_offset = 6; - wlc_lcnphy_write_table(pi, &tab); - if (mode == TEMPSENSE) { - mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); - - mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12); - - auxpga_vmidcourse = 8; - auxpga_vmidfine = 0x4; - auxpga_gain = 2; - mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5); - } else { - mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); - - mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12); - - auxpga_vmidcourse = 7; - auxpga_vmidfine = 0xa; - auxpga_gain = 2; - } - auxpga_vmid = - (u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine); - mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2); - - mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1); - - mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12); - - mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5); - - write_radio_reg(pi, RADIO_2064_REG112, 0x6); - - wlc_phy_do_dummy_tx(pi, true, OFF); - if (!tempsense_done(pi)) - udelay(10); - - write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007); - write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF); - write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F); - write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005); - write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025); - write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112); - for (i = 0; i < 14; i++) - write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]); - wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index); - - write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn); - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - udelay(999); -} - -void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) -{ - lcnphy_txgains_t tx_gains; - u8 bbmult; - phytbl_info_t tab; - s32 a1, b0, b1; - s32 tssi, pwr, maxtargetpwr, mintargetpwr; - bool suspend; - phy_info_t *pi = (phy_info_t *) ppi; - - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - if (NORADIO_ENAB(pi->pubpi)) { - wlc_lcnphy_set_bbmult(pi, 0x30); - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - return; - } - - if (!pi->hwpwrctrl_capable) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - tx_gains.gm_gain = 4; - tx_gains.pga_gain = 12; - tx_gains.pad_gain = 12; - tx_gains.dac_gain = 0; - - bbmult = 150; - } else { - tx_gains.gm_gain = 7; - tx_gains.pga_gain = 15; - tx_gains.pad_gain = 14; - tx_gains.dac_gain = 0; - - bbmult = 150; - } - wlc_lcnphy_set_tx_gain(pi, &tx_gains); - wlc_lcnphy_set_bbmult(pi, bbmult); - wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); - } else { - - wlc_lcnphy_idle_tssi_est(ppi); - - wlc_lcnphy_clear_tx_power_offsets(pi); - - b0 = pi->txpa_2g[0]; - b1 = pi->txpa_2g[1]; - a1 = pi->txpa_2g[2]; - maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1); - mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1); - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_ptr = &pwr; - tab.tbl_len = 1; - tab.tbl_offset = 0; - for (tssi = 0; tssi < 128; tssi++) { - pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1); - - pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr; - wlc_lcnphy_write_table(pi, &tab); - tab.tbl_offset++; - } - - mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7); - - write_phy_reg(pi, 0x4a8, 10); - - wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); - } - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); -} - -static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi) -{ - u16 m0m1; - phytbl_info_t tab; - - tab.tbl_ptr = &m0m1; - tab.tbl_len = 1; - tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; - tab.tbl_offset = 87; - tab.tbl_width = 16; - wlc_lcnphy_read_table(pi, &tab); - - return (u8) ((m0m1 & 0xff00) >> 8); -} - -static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain) -{ - mod_phy_reg(pi, 0x4fb, - LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK, - gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT); - mod_phy_reg(pi, 0x4fd, - LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK, - gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT); -} - -void -wlc_lcnphy_get_radio_loft(phy_info_t *pi, - u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0) -{ - *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089)); - *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A)); - *fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B)); - *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C)); -} - -static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains) -{ - u16 dac_gain; - - dac_gain = read_phy_reg(pi, 0x439) >> 0; - gains->dac_gain = (dac_gain & 0x380) >> 7; - - { - u16 rfgain0, rfgain1; - - rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0; - rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0; - - gains->gm_gain = rfgain0 & 0xff; - gains->pga_gain = (rfgain0 >> 8) & 0xff; - gains->pad_gain = rfgain1 & 0xff; - } -} - -void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b) -{ - phytbl_info_t tab; - u16 iqcc[2]; - - iqcc[0] = a; - iqcc[1] = b; - - tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; - tab.tbl_width = 16; - tab.tbl_ptr = iqcc; - tab.tbl_len = 2; - tab.tbl_offset = 80; - wlc_lcnphy_write_table(pi, &tab); -} - -void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq) -{ - phytbl_info_t tab; - - tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; - tab.tbl_width = 16; - tab.tbl_ptr = &didq; - tab.tbl_len = 1; - tab.tbl_offset = 85; - wlc_lcnphy_write_table(pi, &tab); -} - -void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) -{ - phytbl_info_t tab; - u16 a, b; - u8 bb_mult; - u32 bbmultiqcomp, txgain, locoeffs, rfpower; - lcnphy_txgains_t gains; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - pi_lcn->lcnphy_tx_power_idx_override = (s8) index; - pi_lcn->lcnphy_current_index = (u8) index; - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_len = 1; - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index; - tab.tbl_ptr = &bbmultiqcomp; - wlc_lcnphy_read_table(pi, &tab); - - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index; - tab.tbl_width = 32; - tab.tbl_ptr = &txgain; - wlc_lcnphy_read_table(pi, &tab); - - gains.gm_gain = (u16) (txgain & 0xff); - gains.pga_gain = (u16) (txgain >> 8) & 0xff; - gains.pad_gain = (u16) (txgain >> 16) & 0xff; - gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07; - wlc_lcnphy_set_tx_gain(pi, &gains); - wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f); - - bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff); - wlc_lcnphy_set_bbmult(pi, bb_mult); - - wlc_lcnphy_enable_tx_gain_override(pi); - - if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { - - a = (u16) ((bbmultiqcomp >> 10) & 0x3ff); - b = (u16) (bbmultiqcomp & 0x3ff); - wlc_lcnphy_set_tx_iqcc(pi, a, b); - - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index; - tab.tbl_ptr = &locoeffs; - wlc_lcnphy_read_table(pi, &tab); - - wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs); - - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index; - tab.tbl_ptr = &rfpower; - wlc_lcnphy_read_table(pi, &tab); - mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0); - - } -} - -static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx) -{ - - mod_phy_reg(pi, 0x44d, - (0x1 << 1) | - (0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0)); - - or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0)); -} - -static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi) -{ - u32 j; - phytbl_info_t tab; - u32 temp_offset[128]; - tab.tbl_ptr = temp_offset; - tab.tbl_len = 128; - tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL; - tab.tbl_width = 32; - tab.tbl_offset = 0; - - memset(temp_offset, 0, sizeof(temp_offset)); - for (j = 1; j < 128; j += 2) - temp_offset[j] = 0x80000; - - wlc_lcnphy_write_table(pi, &tab); - return; -} - -static void -wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, - u16 trsw, - u16 ext_lna, - u16 biq2, - u16 biq1, - u16 tia, u16 lna2, u16 lna1) -{ - u16 gain0_15, gain16_19; - - gain16_19 = biq2 & 0xf; - gain0_15 = ((biq1 & 0xf) << 12) | - ((tia & 0xf) << 8) | - ((lna2 & 0x3) << 6) | - ((lna2 & 0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0); - - mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); - mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); - mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); - - if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { - mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); - mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); - } else { - mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10); - - mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15); - - mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); - } - - mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0); - -} - -static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable) -{ - u16 ebit = enable ? 1 : 0; - - mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8); - - mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0); - - if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { - mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4); - mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6); - mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); - mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6); - } else { - mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12); - mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13); - mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10); - mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3); - } -} - -void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable) -{ - if (!bEnable) { - - and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4))); - - mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1); - - and_phy_reg(pi, 0x44c, - ~(u16) ((0x1 << 3) | - (0x1 << 5) | - (0x1 << 12) | - (0x1 << 0) | (0x1 << 1) | (0x1 << 2))); - - and_phy_reg(pi, 0x44d, - ~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14))); - mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2); - - mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0)); - - and_phy_reg(pi, 0x4f9, - ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); - - and_phy_reg(pi, 0x4fa, - ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2))); - } else { - - mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); - - mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4); - mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6); - - mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); - mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); - - wlc_lcnphy_set_trsw_override(pi, true, false); - - mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2); - mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - - mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); - mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3); - - mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); - mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5); - - mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1); - - mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); - mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2); - - mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0); - } else { - - mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); - mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3); - - mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); - mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5); - - mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1); - - mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); - mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2); - - mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); - } - } -} - -static void -wlc_lcnphy_run_samples(phy_info_t *pi, - u16 num_samps, - u16 num_loops, u16 wait, bool iqcalmode) -{ - - or_phy_reg(pi, 0x6da, 0x8080); - - mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0); - if (num_loops != 0xffff) - num_loops--; - mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0); - - mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0); - - if (iqcalmode) { - - and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15)); - or_phy_reg(pi, 0x453, (0x1 << 15)); - } else { - write_phy_reg(pi, 0x63f, 1); - wlc_lcnphy_tx_pu(pi, 1); - } - - or_radio_reg(pi, RADIO_2064_REG112, 0x6); -} - -void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode) -{ - - u8 phybw40; - phybw40 = CHSPEC_IS40(pi->radio_chanspec); - - if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { - mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5); - mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9); - } else { - mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5); - mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9); - } - - if (phybw40 == 0) { - mod_phy_reg((pi), 0x410, - (0x1 << 6) | - (0x1 << 5), - ((CHSPEC_IS2G(pi->radio_chanspec)) ? (!mode) : 0) << - 6 | (!mode) << 5); - mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7); - } -} - -void -wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, - bool iqcalmode) -{ - u8 phy_bw; - u16 num_samps, t, k; - u32 bw; - fixed theta = 0, rot = 0; - cs32 tone_samp; - u32 data_buf[64]; - u16 i_samp, q_samp; - phytbl_info_t tab; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - pi->phy_tx_tone_freq = f_kHz; - - wlc_lcnphy_deaf_mode(pi, true); - - phy_bw = 40; - if (pi_lcn->lcnphy_spurmod) { - write_phy_reg(pi, 0x942, 0x2); - write_phy_reg(pi, 0x93b, 0x0); - write_phy_reg(pi, 0x93c, 0x0); - wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); - } - - if (f_kHz) { - k = 1; - do { - bw = phy_bw * 1000 * k; - num_samps = bw / ABS(f_kHz); - k++; - } while ((num_samps * (u32) (ABS(f_kHz))) != bw); - } else - num_samps = 2; - - rot = FIXED((f_kHz * 36) / phy_bw) / 100; - theta = 0; - - for (t = 0; t < num_samps; t++) { - - wlc_phy_cordic(theta, &tone_samp); - - theta += rot; - - i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff); - q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff); - data_buf[t] = (i_samp << 10) | q_samp; - } - - mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0); - - mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3); - - tab.tbl_ptr = data_buf; - tab.tbl_len = num_samps; - tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY; - tab.tbl_offset = 0; - tab.tbl_width = 32; - wlc_lcnphy_write_table(pi, &tab); - - wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode); -} - -void wlc_lcnphy_stop_tx_tone(phy_info_t *pi) -{ - s16 playback_status; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - pi->phy_tx_tone_freq = 0; - if (pi_lcn->lcnphy_spurmod) { - write_phy_reg(pi, 0x942, 0x7); - write_phy_reg(pi, 0x93b, 0x2017); - write_phy_reg(pi, 0x93c, 0x27c5); - wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); - } - - playback_status = read_phy_reg(pi, 0x644); - if (playback_status & (0x1 << 0)) { - wlc_lcnphy_tx_pu(pi, 0); - mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1); - } else if (playback_status & (0x1 << 1)) - mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15); - - mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0); - - mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3); - - mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7); - - and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9); - - wlc_lcnphy_deaf_mode(pi, false); -} - -static void wlc_lcnphy_clear_trsw_override(phy_info_t *pi) -{ - - and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0))); -} - -void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b) -{ - u16 iqcc[2]; - phytbl_info_t tab; - - tab.tbl_ptr = iqcc; - tab.tbl_len = 2; - tab.tbl_id = 0; - tab.tbl_offset = 80; - tab.tbl_width = 16; - wlc_lcnphy_read_table(pi, &tab); - - *a = iqcc[0]; - *b = iqcc[1]; -} - -u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi) -{ - phytbl_info_t tab; - u16 didq; - - tab.tbl_id = 0; - tab.tbl_width = 16; - tab.tbl_ptr = &didq; - tab.tbl_len = 1; - tab.tbl_offset = 85; - wlc_lcnphy_read_table(pi, &tab); - - return didq; -} - -static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi) -{ - - lcnphy_txgains_t target_gains, old_gains; - u8 save_bb_mult; - u16 a, b, didq, save_pa_gain = 0; - uint idx, SAVE_txpwrindex = 0xFF; - u32 val; - u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phytbl_info_t tab; - u8 ei0, eq0, fi0, fq0; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - wlc_lcnphy_get_tx_gain(pi, &old_gains); - save_pa_gain = wlc_lcnphy_get_pa_gain(pi); - - save_bb_mult = wlc_lcnphy_get_bbmult(pi); - - if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF) - SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - - target_gains.gm_gain = 7; - target_gains.pga_gain = 0; - target_gains.pad_gain = 21; - target_gains.dac_gain = 0; - wlc_lcnphy_set_tx_gain(pi, &target_gains); - wlc_lcnphy_set_tx_pwr_by_index(pi, 16); - - if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) { - - wlc_lcnphy_set_tx_pwr_by_index(pi, 30); - - wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, - (pi_lcn-> - lcnphy_recal ? LCNPHY_CAL_RECAL : - LCNPHY_CAL_FULL), false); - } else { - - wlc_lcnphy_tx_iqlo_soft_cal_full(pi); - } - - wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0); - if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - target_gains.gm_gain = 255; - target_gains.pga_gain = 255; - target_gains.pad_gain = 0xf0; - target_gains.dac_gain = 0; - } else { - target_gains.gm_gain = 7; - target_gains.pga_gain = 45; - target_gains.pad_gain = 186; - target_gains.dac_gain = 0; - } - - if (LCNREV_IS(pi->pubpi.phy_rev, 1) - || pi_lcn->lcnphy_hw_iqcal_en) { - - target_gains.pga_gain = 0; - target_gains.pad_gain = 30; - wlc_lcnphy_set_tx_pwr_by_index(pi, 16); - wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, - LCNPHY_CAL_FULL, false); - } else { - - wlc_lcnphy_tx_iqlo_soft_cal_full(pi); - } - - } - - wlc_lcnphy_get_tx_iqcc(pi, &a, &b); - - didq = wlc_lcnphy_get_tx_locc(pi); - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_ptr = &val; - - tab.tbl_len = 1; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; - - for (idx = 0; idx < 128; idx++) { - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx; - - wlc_lcnphy_read_table(pi, &tab); - val = (val & 0xfff00000) | - ((u32) (a & 0x3FF) << 10) | (b & 0x3ff); - wlc_lcnphy_write_table(pi, &tab); - - val = didq; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx; - wlc_lcnphy_write_table(pi, &tab); - } - - pi_lcn->lcnphy_cal_results.txiqlocal_a = a; - pi_lcn->lcnphy_cal_results.txiqlocal_b = b; - pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq; - pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0; - pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0; - pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0; - pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0; - - wlc_lcnphy_set_bbmult(pi, save_bb_mult); - wlc_lcnphy_set_pa_gain(pi, save_pa_gain); - wlc_lcnphy_set_tx_gain(pi, &old_gains); - - if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF) - wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); - else - wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex); -} - -s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode) -{ - u16 tempsenseval1, tempsenseval2; - s16 avg = 0; - bool suspend = 0; - - if (NORADIO_ENAB(pi->pubpi)) - return -1; - - if (mode == 1) { - suspend = - (0 == - (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); - } - tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; - tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; - - if (tempsenseval1 > 255) - avg = (s16) (tempsenseval1 - 512); - else - avg = (s16) tempsenseval1; - - if (tempsenseval2 > 255) - avg += (s16) (tempsenseval2 - 512); - else - avg += (s16) tempsenseval2; - - avg /= 2; - - if (mode == 1) { - - mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); - - udelay(100); - mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - } - return avg; -} - -u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode) -{ - u16 tempsenseval1, tempsenseval2; - s32 avg = 0; - bool suspend = 0; - u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (NORADIO_ENAB(pi->pubpi)) - return -1; - - if (mode == 1) { - suspend = - (0 == - (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); - } - tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; - tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; - - if (tempsenseval1 > 255) - avg = (int)(tempsenseval1 - 512); - else - avg = (int)tempsenseval1; - - if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) { - if (tempsenseval2 > 255) - avg = (int)(avg - tempsenseval2 + 512); - else - avg = (int)(avg - tempsenseval2); - } else { - if (tempsenseval2 > 255) - avg = (int)(avg + tempsenseval2 - 512); - else - avg = (int)(avg + tempsenseval2); - avg = avg / 2; - } - if (avg < 0) - avg = avg + 512; - - if (pi_lcn->lcnphy_tempsense_option == 2) - avg = tempsenseval1; - - if (mode) - wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); - - if (mode == 1) { - - mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); - - udelay(100); - mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - } - return (u16) avg; -} - -s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode) -{ - s32 degree = wlc_lcnphy_tempsense_new(pi, mode); - degree = - ((degree << 10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1)) - / LCN_TEMPSENSE_DEN; - return (s8) degree; -} - -s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode) -{ - u16 vbatsenseval; - s32 avg = 0; - bool suspend = 0; - - if (NORADIO_ENAB(pi->pubpi)) - return -1; - - if (mode == 1) { - suspend = - (0 == - (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE); - } - - vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF; - - if (vbatsenseval > 255) - avg = (s32) (vbatsenseval - 512); - else - avg = (s32) vbatsenseval; - - avg = - (avg * LCN_VBAT_SCALE_NOM + - (LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN; - - if (mode == 1) { - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - } - return (s8) avg; -} - -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode) -{ - u8 phybw40; - phybw40 = CHSPEC_IS40(pi->radio_chanspec); - - mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7); - - if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) || - (mode == AFE_CLK_INIT_MODE_TXRX2X)) - write_phy_reg(pi, 0x6d0, 0x7); - - wlc_lcnphy_toggle_afe_pwdn(pi); -} - -static bool -wlc_lcnphy_rx_iq_est(phy_info_t *pi, - u16 num_samps, - u8 wait_time, lcnphy_iq_est_t *iq_est) -{ - int wait_count = 0; - bool result = true; - u8 phybw40; - phybw40 = CHSPEC_IS40(pi->radio_chanspec); - - mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5); - - mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3); - - mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0); - - mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0); - - mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8); - - mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9); - - while (read_phy_reg(pi, 0x481) & (0x1 << 9)) { - - if (wait_count > (10 * 500)) { - result = false; - goto cleanup; - } - udelay(100); - wait_count++; - } - - iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) | - (u32) read_phy_reg(pi, 0x484); - iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) | - (u32) read_phy_reg(pi, 0x486); - iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) | - (u32) read_phy_reg(pi, 0x488); - - cleanup: - mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3); - - mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5); - - return result; -} - -static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps) -{ -#define LCNPHY_MIN_RXIQ_PWR 2 - bool result; - u16 a0_new, b0_new; - lcnphy_iq_est_t iq_est = { 0, 0, 0 }; - s32 a, b, temp; - s16 iq_nbits, qq_nbits, arsh, brsh; - s32 iq; - u32 ii, qq; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0); - b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0); - mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6); - - wlc_lcnphy_set_rx_iq_comp(pi, 0, 0); - - result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est); - if (!result) - goto cleanup; - - iq = (s32) iq_est.iq_prod; - ii = iq_est.i_pwr; - qq = iq_est.q_pwr; - - if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) { - result = false; - goto cleanup; - } - - iq_nbits = wlc_phy_nbits(iq); - qq_nbits = wlc_phy_nbits(qq); - - arsh = 10 - (30 - iq_nbits); - if (arsh >= 0) { - a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); - temp = (s32) (ii >> arsh); - if (temp == 0) { - return false; - } - } else { - a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); - temp = (s32) (ii << -arsh); - if (temp == 0) { - return false; - } - } - a /= temp; - brsh = qq_nbits - 31 + 20; - if (brsh >= 0) { - b = (qq << (31 - qq_nbits)); - temp = (s32) (ii >> brsh); - if (temp == 0) { - return false; - } - } else { - b = (qq << (31 - qq_nbits)); - temp = (s32) (ii << -brsh); - if (temp == 0) { - return false; - } - } - b /= temp; - b -= a * a; - b = (s32) int_sqrt((unsigned long) b); - b -= (1 << 10); - a0_new = (u16) (a & 0x3ff); - b0_new = (u16) (b & 0x3ff); - cleanup: - - wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new); - - mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3); - - pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new; - pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new; - - return result; -} - -static bool -wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, - int iqcomp_sz, bool tx_switch, bool rx_switch, int module, - int tx_gain_idx) -{ - lcnphy_txgains_t old_gains; - u16 tx_pwr_ctrl; - u8 tx_gain_index_old = 0; - bool result = false, tx_gain_override_old = false; - u16 i, Core1TxControl_old, RFOverride0_old, - RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old, - rfoverride3_old, rfoverride3val_old, rfoverride4_old, - rfoverride4val_old, afectrlovr_old, afectrlovrval_old; - int tia_gain; - u32 received_power, rx_pwr_threshold; - u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl; - u16 values_to_save[11]; - s16 *ptr; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC); - if (NULL == ptr) { - return false; - } - if (module == 2) { - while (iqcomp_sz--) { - if (iqcomp[iqcomp_sz].chan == - CHSPEC_CHANNEL(pi->radio_chanspec)) { - - wlc_lcnphy_set_rx_iq_comp(pi, - (u16) - iqcomp[iqcomp_sz].a, - (u16) - iqcomp[iqcomp_sz].b); - result = true; - break; - } - } - goto cal_done; - } - - if (module == 1) { - - tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - - for (i = 0; i < 11; i++) { - values_to_save[i] = - read_radio_reg(pi, rxiq_cal_rf_reg[i]); - } - Core1TxControl_old = read_phy_reg(pi, 0x631); - - or_phy_reg(pi, 0x631, 0x0015); - - RFOverride0_old = read_phy_reg(pi, 0x44c); - RFOverrideVal0_old = read_phy_reg(pi, 0x44d); - rfoverride2_old = read_phy_reg(pi, 0x4b0); - rfoverride2val_old = read_phy_reg(pi, 0x4b1); - rfoverride3_old = read_phy_reg(pi, 0x4f9); - rfoverride3val_old = read_phy_reg(pi, 0x4fa); - rfoverride4_old = read_phy_reg(pi, 0x938); - rfoverride4val_old = read_phy_reg(pi, 0x939); - afectrlovr_old = read_phy_reg(pi, 0x43b); - afectrlovrval_old = read_phy_reg(pi, 0x43c); - old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); - old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); - - tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); - if (tx_gain_override_old) { - wlc_lcnphy_get_tx_gain(pi, &old_gains); - tx_gain_index_old = pi_lcn->lcnphy_current_index; - } - - wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx); - - mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); - - mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); - - write_radio_reg(pi, RADIO_2064_REG116, 0x06); - write_radio_reg(pi, RADIO_2064_REG12C, 0x07); - write_radio_reg(pi, RADIO_2064_REG06A, 0xd3); - write_radio_reg(pi, RADIO_2064_REG098, 0x03); - write_radio_reg(pi, RADIO_2064_REG00B, 0x7); - mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4); - write_radio_reg(pi, RADIO_2064_REG01D, 0x01); - write_radio_reg(pi, RADIO_2064_REG114, 0x01); - write_radio_reg(pi, RADIO_2064_REG02E, 0x10); - write_radio_reg(pi, RADIO_2064_REG12A, 0x08); - - mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0); - mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2); - mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2); - mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3); - mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3); - mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5); - mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5); - - mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); - - wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0); - write_phy_reg(pi, 0x6da, 0xffff); - or_phy_reg(pi, 0x6db, 0x3); - wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch); - wlc_lcnphy_rx_gain_override_enable(pi, true); - - tia_gain = 8; - rx_pwr_threshold = 950; - while (tia_gain > 0) { - tia_gain -= 1; - wlc_lcnphy_set_rx_gain_by_distribution(pi, - 0, 0, 2, 2, - (u16) - tia_gain, 1, 0); - udelay(500); - - received_power = - wlc_lcnphy_measure_digital_power(pi, 2000); - if (received_power < rx_pwr_threshold) - break; - } - result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff); - - wlc_lcnphy_stop_tx_tone(pi); - - write_phy_reg(pi, 0x631, Core1TxControl_old); - - write_phy_reg(pi, 0x44c, RFOverrideVal0_old); - write_phy_reg(pi, 0x44d, RFOverrideVal0_old); - write_phy_reg(pi, 0x4b0, rfoverride2_old); - write_phy_reg(pi, 0x4b1, rfoverride2val_old); - write_phy_reg(pi, 0x4f9, rfoverride3_old); - write_phy_reg(pi, 0x4fa, rfoverride3val_old); - write_phy_reg(pi, 0x938, rfoverride4_old); - write_phy_reg(pi, 0x939, rfoverride4val_old); - write_phy_reg(pi, 0x43b, afectrlovr_old); - write_phy_reg(pi, 0x43c, afectrlovrval_old); - write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); - write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl); - - wlc_lcnphy_clear_trsw_override(pi); - - mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2); - - for (i = 0; i < 11; i++) { - write_radio_reg(pi, rxiq_cal_rf_reg[i], - values_to_save[i]); - } - - if (tx_gain_override_old) { - wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old); - } else - wlc_lcnphy_disable_tx_gain_override(pi); - wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl); - - wlc_lcnphy_rx_gain_override_enable(pi, false); - } - - cal_done: - kfree(ptr); - return result; -} - -static void wlc_lcnphy_temp_adj(phy_info_t *pi) -{ - if (NORADIO_ENAB(pi->pubpi)) - return; -} - -static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi) -{ - bool suspend; - s8 index; - u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_lcnphy_deaf_mode(pi, true); - pi->phy_lastcal = pi->sh->now; - pi->phy_forcecal = false; - index = pi_lcn->lcnphy_current_index; - - wlc_lcnphy_txpwrtbl_iqlo_cal(pi); - - wlc_lcnphy_set_tx_pwr_by_index(pi, index); - wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); - wlc_lcnphy_deaf_mode(pi, false); - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); - -} - -static void wlc_lcnphy_periodic_cal(phy_info_t *pi) -{ - bool suspend, full_cal; - const lcnphy_rx_iqcomp_t *rx_iqcomp; - int rx_iqcomp_sz; - u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - s8 index; - phytbl_info_t tab; - s32 a1, b0, b1; - s32 tssi, pwr, maxtargetpwr, mintargetpwr; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - pi->phy_lastcal = pi->sh->now; - pi->phy_forcecal = false; - full_cal = - (pi_lcn->lcnphy_full_cal_channel != - CHSPEC_CHANNEL(pi->radio_chanspec)); - pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec); - index = pi_lcn->lcnphy_current_index; - - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) { - - wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); - wlapi_suspend_mac_and_wait(pi->sh->physhim); - } - wlc_lcnphy_deaf_mode(pi, true); - - wlc_lcnphy_txpwrtbl_iqlo_cal(pi); - - rx_iqcomp = lcnphy_rx_iqcomp_table_rev0; - rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0); - - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) - wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40); - else - wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127); - - if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { - - wlc_lcnphy_idle_tssi_est((wlc_phy_t *) pi); - - b0 = pi->txpa_2g[0]; - b1 = pi->txpa_2g[1]; - a1 = pi->txpa_2g[2]; - maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1); - mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1); - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_ptr = &pwr; - tab.tbl_len = 1; - tab.tbl_offset = 0; - for (tssi = 0; tssi < 128; tssi++) { - pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1); - pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr; - wlc_lcnphy_write_table(pi, &tab); - tab.tbl_offset++; - } - } - - wlc_lcnphy_set_tx_pwr_by_index(pi, index); - wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); - wlc_lcnphy_deaf_mode(pi, false); - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); -} - -void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode) -{ - u16 temp_new; - int temp1, temp2, temp_diff; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - switch (mode) { - case PHY_PERICAL_CHAN: - - break; - case PHY_FULLCAL: - wlc_lcnphy_periodic_cal(pi); - break; - case PHY_PERICAL_PHYINIT: - wlc_lcnphy_periodic_cal(pi); - break; - case PHY_PERICAL_WATCHDOG: - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { - temp_new = wlc_lcnphy_tempsense(pi, 0); - temp1 = LCNPHY_TEMPSENSE(temp_new); - temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper); - temp_diff = temp1 - temp2; - if ((pi_lcn->lcnphy_cal_counter > 90) || - (temp_diff > 60) || (temp_diff < -60)) { - wlc_lcnphy_glacial_timer_based_cal(pi); - wlc_2064_vco_cal(pi); - pi_lcn->lcnphy_cal_temper = temp_new; - pi_lcn->lcnphy_cal_counter = 0; - } else - pi_lcn->lcnphy_cal_counter++; - } - break; - case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL: - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - wlc_lcnphy_tx_power_adjustment((wlc_phy_t *) pi); - break; - } -} - -void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr) -{ - s8 cck_offset; - u16 status; - status = (read_phy_reg(pi, 0x4ab)); - if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && - (status & (0x1 << 15))) { - *ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) - >> 0) >> 1); - - if (wlc_phy_tpc_isenabled_lcnphy(pi)) - cck_offset = pi->tx_power_offset[TXP_FIRST_CCK]; - else - cck_offset = 0; - - *cck_pwr = *ofdm_pwr + cck_offset; - } else { - *cck_pwr = 0; - *ofdm_pwr = 0; - } -} - -void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi) -{ - return; - -} - -static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) -{ - u8 channel = CHSPEC_CHANNEL(chanspec); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - if (channel == 14) { - mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); - - } else { - mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); - - } - pi_lcn->lcnphy_bandedge_corr = 2; - if (channel == 1) - pi_lcn->lcnphy_bandedge_corr = 4; - - if (channel == 1 || channel == 2 || channel == 3 || - channel == 4 || channel == 9 || - channel == 10 || channel == 11 || channel == 12) { - si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04); - si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0); - si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0); - - si_pmu_pllupd(pi->sh->sih); - write_phy_reg(pi, 0x942, 0); - wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); - pi_lcn->lcnphy_spurmod = 0; - mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8); - - write_phy_reg(pi, 0x425, 0x5907); - } else { - si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04); - si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333); - si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820); - - si_pmu_pllupd(pi->sh->sih); - write_phy_reg(pi, 0x942, 0); - wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); - - pi_lcn->lcnphy_spurmod = 0; - mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8); - - write_phy_reg(pi, 0x425, 0x590a); - } - - or_phy_reg(pi, 0x44a, 0x44); - write_phy_reg(pi, 0x44a, 0x80); -} - -void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi) -{ - s8 index; - u16 index2; - phy_info_t *pi = (phy_info_t *) ppi; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) { - index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); - index2 = (u16) (index * 2); - mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); - - pi_lcn->lcnphy_current_index = (s8) - ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2); - } -} - -static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b) -{ - mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0); - - mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0); - - mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0); - - mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0); - - mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0); - - mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0); - -} - -void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) -{ - u8 phybw40; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - phybw40 = CHSPEC_IS40(pi->radio_chanspec); - - pi_lcn->lcnphy_cal_counter = 0; - pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense; - - or_phy_reg(pi, 0x44a, 0x80); - and_phy_reg(pi, 0x44a, 0x7f); - - wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X); - - write_phy_reg(pi, 0x60a, 160); - - write_phy_reg(pi, 0x46a, 25); - - wlc_lcnphy_baseband_init(pi); - - wlc_lcnphy_radio_init(pi); - - if (CHSPEC_IS2G(pi->radio_chanspec)) - wlc_lcnphy_tx_pwr_ctrl_init((wlc_phy_t *) pi); - - wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); - - si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9); - - si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD); - - if ((pi->sh->boardflags & BFL_FEM) - && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR); - - wlc_lcnphy_agc_temp_init(pi); - - wlc_lcnphy_temp_adj(pi); - - mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); - - udelay(100); - mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); - pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT; - wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT); -} - -static void -wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save) -{ - u16 vmid; - int i; - for (i = 0; i < 20; i++) { - values_to_save[i] = - read_radio_reg(pi, iqlo_loopback_rf_regs[i]); - } - - mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); - mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); - - mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11); - mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13); - - mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); - - mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) - and_radio_reg(pi, RADIO_2064_REG03A, 0xFD); - else - and_radio_reg(pi, RADIO_2064_REG03A, 0xF9); - or_radio_reg(pi, RADIO_2064_REG11A, 0x1); - - or_radio_reg(pi, RADIO_2064_REG036, 0x01); - or_radio_reg(pi, RADIO_2064_REG11A, 0x18); - udelay(20); - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) - mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); - else - or_radio_reg(pi, RADIO_2064_REG03A, 1); - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) - mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1); - else - or_radio_reg(pi, RADIO_2064_REG03A, 0x3); - } - - udelay(20); - - write_radio_reg(pi, RADIO_2064_REG025, 0xF); - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) - mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4); - else - mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6); - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) - mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1); - else - mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1); - } - - udelay(20); - - write_radio_reg(pi, RADIO_2064_REG005, 0x8); - or_radio_reg(pi, RADIO_2064_REG112, 0x80); - udelay(20); - - or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); - or_radio_reg(pi, RADIO_2064_REG11F, 0x44); - udelay(20); - - or_radio_reg(pi, RADIO_2064_REG00B, 0x7); - or_radio_reg(pi, RADIO_2064_REG113, 0x10); - udelay(20); - - write_radio_reg(pi, RADIO_2064_REG007, 0x1); - udelay(20); - - vmid = 0x2A6; - mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3); - write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff)); - or_radio_reg(pi, RADIO_2064_REG11F, 0x44); - udelay(20); - - or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); - udelay(20); - write_radio_reg(pi, RADIO_2064_REG012, 0x02); - or_radio_reg(pi, RADIO_2064_REG112, 0x06); - write_radio_reg(pi, RADIO_2064_REG036, 0x11); - write_radio_reg(pi, RADIO_2064_REG059, 0xcc); - write_radio_reg(pi, RADIO_2064_REG05C, 0x2e); - write_radio_reg(pi, RADIO_2064_REG078, 0xd7); - write_radio_reg(pi, RADIO_2064_REG092, 0x15); -} - -static void -wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh, - s16 *ptr, int mode) -{ - u32 curval1, curval2, stpptr, curptr, strptr, val; - u16 sslpnCalibClkEnCtrl, timer; - u16 old_sslpnCalibClkEnCtrl; - s16 imag, real; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - timer = 0; - old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); - - curval1 = R_REG(&pi->regs->psm_corectlsts); - ptr[130] = 0; - W_REG(&pi->regs->psm_corectlsts, ((1 << 6) | curval1)); - - W_REG(&pi->regs->smpl_clct_strptr, 0x7E00); - W_REG(&pi->regs->smpl_clct_stpptr, 0x8000); - udelay(20); - curval2 = R_REG(&pi->regs->psm_phy_hdr_param); - W_REG(&pi->regs->psm_phy_hdr_param, curval2 | 0x30); - - write_phy_reg(pi, 0x555, 0x0); - write_phy_reg(pi, 0x5a6, 0x5); - - write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6)); - write_phy_reg(pi, 0x5cf, 3); - write_phy_reg(pi, 0x5a5, 0x3); - write_phy_reg(pi, 0x583, 0x0); - write_phy_reg(pi, 0x584, 0x0); - write_phy_reg(pi, 0x585, 0x0fff); - write_phy_reg(pi, 0x586, 0x0000); - - write_phy_reg(pi, 0x580, 0x4501); - - sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); - write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008)); - stpptr = R_REG(&pi->regs->smpl_clct_stpptr); - curptr = R_REG(&pi->regs->smpl_clct_curptr); - do { - udelay(10); - curptr = R_REG(&pi->regs->smpl_clct_curptr); - timer++; - } while ((curptr != stpptr) && (timer < 500)); - - W_REG(&pi->regs->psm_phy_hdr_param, 0x2); - strptr = 0x7E00; - W_REG(&pi->regs->tplatewrptr, strptr); - while (strptr < 0x8000) { - val = R_REG(&pi->regs->tplatewrdata); - imag = ((val >> 16) & 0x3ff); - real = ((val) & 0x3ff); - if (imag > 511) { - imag -= 1024; - } - if (real > 511) { - real -= 1024; - } - if (pi_lcn->lcnphy_iqcal_swp_dis) - ptr[(strptr - 0x7E00) / 4] = real; - else - ptr[(strptr - 0x7E00) / 4] = imag; - if (clip_detect_algo) { - if (imag > thresh || imag < -thresh) { - strptr = 0x8000; - ptr[130] = 1; - } - } - strptr += 4; - } - - write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); - W_REG(&pi->regs->psm_phy_hdr_param, curval2); - W_REG(&pi->regs->psm_corectlsts, curval1); -} - -static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi) -{ - lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4; - - wlc_lcnphy_set_cc(pi, 0, 0, 0); - wlc_lcnphy_set_cc(pi, 2, 0, 0); - wlc_lcnphy_set_cc(pi, 3, 0, 0); - wlc_lcnphy_set_cc(pi, 4, 0, 0); - - wlc_lcnphy_a1(pi, 4, 0, 0); - wlc_lcnphy_a1(pi, 3, 0, 0); - wlc_lcnphy_a1(pi, 2, 3, 2); - wlc_lcnphy_a1(pi, 0, 5, 8); - wlc_lcnphy_a1(pi, 2, 2, 1); - wlc_lcnphy_a1(pi, 0, 4, 3); - - iqcc0 = wlc_lcnphy_get_cc(pi, 0); - locc2 = wlc_lcnphy_get_cc(pi, 2); - locc3 = wlc_lcnphy_get_cc(pi, 3); - locc4 = wlc_lcnphy_get_cc(pi, 4); -} - -static void -wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y) -{ - u16 di0dq0; - u16 x, y, data_rf; - int k; - switch (cal_type) { - case 0: - wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y); - break; - case 2: - di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff); - wlc_lcnphy_set_tx_locc(pi, di0dq0); - break; - case 3: - k = wlc_lcnphy_calc_floor(coeff_x, 0); - y = 8 + k; - k = wlc_lcnphy_calc_floor(coeff_x, 1); - x = 8 - k; - data_rf = (x * 16 + y); - write_radio_reg(pi, RADIO_2064_REG089, data_rf); - k = wlc_lcnphy_calc_floor(coeff_y, 0); - y = 8 + k; - k = wlc_lcnphy_calc_floor(coeff_y, 1); - x = 8 - k; - data_rf = (x * 16 + y); - write_radio_reg(pi, RADIO_2064_REG08A, data_rf); - break; - case 4: - k = wlc_lcnphy_calc_floor(coeff_x, 0); - y = 8 + k; - k = wlc_lcnphy_calc_floor(coeff_x, 1); - x = 8 - k; - data_rf = (x * 16 + y); - write_radio_reg(pi, RADIO_2064_REG08B, data_rf); - k = wlc_lcnphy_calc_floor(coeff_y, 0); - y = 8 + k; - k = wlc_lcnphy_calc_floor(coeff_y, 1); - x = 8 - k; - data_rf = (x * 16 + y); - write_radio_reg(pi, RADIO_2064_REG08C, data_rf); - break; - } -} - -static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type) -{ - u16 a, b, didq; - u8 di0, dq0, ei, eq, fi, fq; - lcnphy_unsign16_struct cc; - cc.re = 0; - cc.im = 0; - switch (cal_type) { - case 0: - wlc_lcnphy_get_tx_iqcc(pi, &a, &b); - cc.re = a; - cc.im = b; - break; - case 2: - didq = wlc_lcnphy_get_tx_locc(pi); - di0 = (((didq & 0xff00) << 16) >> 24); - dq0 = (((didq & 0x00ff) << 24) >> 24); - cc.re = (u16) di0; - cc.im = (u16) dq0; - break; - case 3: - wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); - cc.re = (u16) ei; - cc.im = (u16) eq; - break; - case 4: - wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); - cc.re = (u16) fi; - cc.im = (u16) fq; - break; - } - return cc; -} - -static void -wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2) -{ - const lcnphy_spb_tone_t *phy_c1; - lcnphy_spb_tone_t phy_c2; - lcnphy_unsign16_struct phy_c3; - int phy_c4, phy_c5, k, l, j, phy_c6; - u16 phy_c7, phy_c8, phy_c9; - s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16; - s16 *ptr, phy_c17; - s32 phy_c18, phy_c19; - u32 phy_c20, phy_c21; - bool phy_c22, phy_c23, phy_c24, phy_c25; - u16 phy_c26, phy_c27; - u16 phy_c28, phy_c29, phy_c30; - u16 phy_c31; - u16 *phy_c32; - phy_c21 = 0; - phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0; - ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC); - if (NULL == ptr) { - return; - } - - phy_c32 = kmalloc(sizeof(u16) * 20, GFP_ATOMIC); - if (NULL == phy_c32) { - kfree(ptr); - return; - } - phy_c26 = read_phy_reg(pi, 0x6da); - phy_c27 = read_phy_reg(pi, 0x6db); - phy_c31 = read_radio_reg(pi, RADIO_2064_REG026); - write_phy_reg(pi, 0x93d, 0xC0); - - wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0); - write_phy_reg(pi, 0x6da, 0xffff); - or_phy_reg(pi, 0x6db, 0x3); - - wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32); - udelay(500); - phy_c28 = read_phy_reg(pi, 0x938); - phy_c29 = read_phy_reg(pi, 0x4d7); - phy_c30 = read_phy_reg(pi, 0x4d8); - or_phy_reg(pi, 0x938, 0x1 << 2); - or_phy_reg(pi, 0x4d7, 0x1 << 2); - or_phy_reg(pi, 0x4d7, 0x1 << 3); - mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12); - or_phy_reg(pi, 0x4d8, 1 << 0); - or_phy_reg(pi, 0x4d8, 1 << 1); - mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2); - mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12); - phy_c1 = &lcnphy_spb_tone_3750[0]; - phy_c4 = 32; - - if (num_levels == 0) { - if (cal_type != 0) { - num_levels = 4; - } else { - num_levels = 9; - } - } - if (step_size_lg2 == 0) { - if (cal_type != 0) { - step_size_lg2 = 3; - } else { - step_size_lg2 = 8; - } - } - - phy_c7 = (1 << step_size_lg2); - phy_c3 = wlc_lcnphy_get_cc(pi, cal_type); - phy_c15 = (s16) phy_c3.re; - phy_c16 = (s16) phy_c3.im; - if (cal_type == 2) { - if (phy_c3.re > 127) - phy_c15 = phy_c3.re - 256; - if (phy_c3.im > 127) - phy_c16 = phy_c3.im - 256; - } - wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); - udelay(20); - for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) { - phy_c23 = 1; - phy_c22 = 0; - switch (cal_type) { - case 0: - phy_c10 = 511; - break; - case 2: - phy_c10 = 127; - break; - case 3: - phy_c10 = 15; - break; - case 4: - phy_c10 = 15; - break; - } - - phy_c9 = read_phy_reg(pi, 0x93d); - phy_c9 = 2 * phy_c9; - phy_c24 = 0; - phy_c5 = 7; - phy_c25 = 1; - while (1) { - write_radio_reg(pi, RADIO_2064_REG026, - (phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4)); - udelay(50); - phy_c22 = 0; - ptr[130] = 0; - wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2); - if (ptr[130] == 1) - phy_c22 = 1; - if (phy_c22) - phy_c5 -= 1; - if ((phy_c22 != phy_c24) && (!phy_c25)) - break; - if (!phy_c22) - phy_c5 += 1; - if (phy_c5 <= 0 || phy_c5 >= 7) - break; - phy_c24 = phy_c22; - phy_c25 = 0; - } - - if (phy_c5 < 0) - phy_c5 = 0; - else if (phy_c5 > 7) - phy_c5 = 7; - - for (k = -phy_c7; k <= phy_c7; k += phy_c7) { - for (l = -phy_c7; l <= phy_c7; l += phy_c7) { - phy_c11 = phy_c15 + k; - phy_c12 = phy_c16 + l; - - if (phy_c11 < -phy_c10) - phy_c11 = -phy_c10; - else if (phy_c11 > phy_c10) - phy_c11 = phy_c10; - if (phy_c12 < -phy_c10) - phy_c12 = -phy_c10; - else if (phy_c12 > phy_c10) - phy_c12 = phy_c10; - wlc_lcnphy_set_cc(pi, cal_type, phy_c11, - phy_c12); - udelay(20); - wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2); - - phy_c18 = 0; - phy_c19 = 0; - for (j = 0; j < 128; j++) { - if (cal_type != 0) { - phy_c6 = j % phy_c4; - } else { - phy_c6 = (2 * j) % phy_c4; - } - phy_c2.re = phy_c1[phy_c6].re; - phy_c2.im = phy_c1[phy_c6].im; - phy_c17 = ptr[j]; - phy_c18 = phy_c18 + phy_c17 * phy_c2.re; - phy_c19 = phy_c19 + phy_c17 * phy_c2.im; - } - - phy_c18 = phy_c18 >> 10; - phy_c19 = phy_c19 >> 10; - phy_c20 = - ((phy_c18 * phy_c18) + (phy_c19 * phy_c19)); - - if (phy_c23 || phy_c20 < phy_c21) { - phy_c21 = phy_c20; - phy_c13 = phy_c11; - phy_c14 = phy_c12; - } - phy_c23 = 0; - } - } - phy_c23 = 1; - phy_c15 = phy_c13; - phy_c16 = phy_c14; - phy_c7 = phy_c7 >> 1; - wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); - udelay(20); - } - goto cleanup; - cleanup: - wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32); - wlc_lcnphy_stop_tx_tone(pi); - write_phy_reg(pi, 0x6da, phy_c26); - write_phy_reg(pi, 0x6db, phy_c27); - write_phy_reg(pi, 0x938, phy_c28); - write_phy_reg(pi, 0x4d7, phy_c29); - write_phy_reg(pi, 0x4d8, phy_c30); - write_radio_reg(pi, RADIO_2064_REG026, phy_c31); - - kfree(phy_c32); - kfree(ptr); -} - -static void -wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save) -{ - int i; - - and_phy_reg(pi, 0x44c, 0x0 >> 11); - - and_phy_reg(pi, 0x43b, 0xC); - - for (i = 0; i < 20; i++) { - write_radio_reg(pi, iqlo_loopback_rf_regs[i], - values_to_save[i]); - } -} - -static void -WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi, - const lcnphy_tx_gain_tbl_entry * - gain_table) { - u32 j; - phytbl_info_t tab; - u32 val; - u16 pa_gain; - u16 gm_gain; - - if (CHSPEC_IS5G(pi->radio_chanspec)) - pa_gain = 0x70; - else - pa_gain = 0x70; - - if (pi->sh->boardflags & BFL_FEM) - pa_gain = 0x10; - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_len = 1; - tab.tbl_ptr = &val; - - for (j = 0; j < 128; j++) { - gm_gain = gain_table[j].gm; - val = (((u32) pa_gain << 24) | - (gain_table[j].pad << 16) | - (gain_table[j].pga << 8) | gm_gain); - - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j; - wlc_lcnphy_write_table(pi, &tab); - - val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20); - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j; - wlc_lcnphy_write_table(pi, &tab); - } -} - -static void wlc_lcnphy_load_rfpower(phy_info_t *pi) -{ - phytbl_info_t tab; - u32 val, bbmult, rfgain; - u8 index; - u8 scale_factor = 1; - s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift; - - tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; - tab.tbl_width = 32; - tab.tbl_len = 1; - - for (index = 0; index < 128; index++) { - tab.tbl_ptr = &bbmult; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index; - wlc_lcnphy_read_table(pi, &tab); - bbmult = bbmult >> 20; - - tab.tbl_ptr = &rfgain; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index; - wlc_lcnphy_read_table(pi, &tab); - - qm_log10((s32) (bbmult), 0, &temp1, &qQ1); - qm_log10((s32) (1 << 6), 0, &temp2, &qQ2); - - if (qQ1 < qQ2) { - temp2 = qm_shr16(temp2, qQ2 - qQ1); - qQ = qQ1; - } else { - temp1 = qm_shr16(temp1, qQ1 - qQ2); - qQ = qQ2; - } - temp = qm_sub16(temp1, temp2); - - if (qQ >= 4) - shift = qQ - 4; - else - shift = 4 - qQ; - - val = (((index << shift) + (5 * temp) + - (1 << (scale_factor + shift - 3))) >> (scale_factor + - shift - 2)); - - tab.tbl_ptr = &val; - tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index; - wlc_lcnphy_write_table(pi, &tab); - } -} - -static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi) -{ - uint idx; - u8 phybw40; - phytbl_info_t tab; - u32 val; - - phybw40 = CHSPEC_IS40(pi->radio_chanspec); - - for (idx = 0; idx < dot11lcnphytbl_info_sz_rev0; idx++) { - wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]); - } - - if (pi->sh->boardflags & BFL_FEM_BT) { - tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; - tab.tbl_width = 16; - tab.tbl_ptr = &val; - tab.tbl_len = 1; - val = 100; - tab.tbl_offset = 4; - wlc_lcnphy_write_table(pi, &tab); - } - - tab.tbl_id = LCNPHY_TBL_ID_RFSEQ; - tab.tbl_width = 16; - tab.tbl_ptr = &val; - tab.tbl_len = 1; - - val = 114; - tab.tbl_offset = 0; - wlc_lcnphy_write_table(pi, &tab); - - val = 130; - tab.tbl_offset = 1; - wlc_lcnphy_write_table(pi, &tab); - - val = 6; - tab.tbl_offset = 8; - wlc_lcnphy_write_table(pi, &tab); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->sh->boardflags & BFL_FEM) - wlc_lcnphy_load_tx_gain_table(pi, - dot11lcnphy_2GHz_extPA_gaintable_rev0); - else - wlc_lcnphy_load_tx_gain_table(pi, - dot11lcnphy_2GHz_gaintable_rev0); - } - - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - for (idx = 0; - idx < dot11lcnphytbl_rx_gain_info_2G_rev2_sz; - idx++) - if (pi->sh->boardflags & BFL_EXTLNA) - wlc_lcnphy_write_table(pi, - &dot11lcnphytbl_rx_gain_info_extlna_2G_rev2 - [idx]); - else - wlc_lcnphy_write_table(pi, - &dot11lcnphytbl_rx_gain_info_2G_rev2 - [idx]); - } else { - for (idx = 0; - idx < dot11lcnphytbl_rx_gain_info_5G_rev2_sz; - idx++) - if (pi->sh->boardflags & BFL_EXTLNA_5GHz) - wlc_lcnphy_write_table(pi, - &dot11lcnphytbl_rx_gain_info_extlna_5G_rev2 - [idx]); - else - wlc_lcnphy_write_table(pi, - &dot11lcnphytbl_rx_gain_info_5G_rev2 - [idx]); - } - } - - if ((pi->sh->boardflags & BFL_FEM) - && !(pi->sh->boardflags & BFL_FEM_BT)) - wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313_epa); - else if (pi->sh->boardflags & BFL_FEM_BT) { - if (pi->sh->boardrev < 0x1250) - wlc_lcnphy_write_table(pi, - &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa); - else - wlc_lcnphy_write_table(pi, - &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250); - } else - wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313); - - wlc_lcnphy_load_rfpower(pi); - - wlc_lcnphy_clear_papd_comptable(pi); -} - -static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi) -{ - u16 afectrl1; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - write_radio_reg(pi, RADIO_2064_REG11C, 0x0); - - write_phy_reg(pi, 0x43b, 0x0); - write_phy_reg(pi, 0x43c, 0x0); - write_phy_reg(pi, 0x44c, 0x0); - write_phy_reg(pi, 0x4e6, 0x0); - write_phy_reg(pi, 0x4f9, 0x0); - write_phy_reg(pi, 0x4b0, 0x0); - write_phy_reg(pi, 0x938, 0x0); - write_phy_reg(pi, 0x4b0, 0x0); - write_phy_reg(pi, 0x44e, 0); - - or_phy_reg(pi, 0x567, 0x03); - - or_phy_reg(pi, 0x44a, 0x44); - write_phy_reg(pi, 0x44a, 0x80); - - if (!(pi->sh->boardflags & BFL_FEM)) - wlc_lcnphy_set_tx_pwr_by_index(pi, 52); - - if (0) { - afectrl1 = 0; - afectrl1 = (u16) ((pi_lcn->lcnphy_rssi_vf) | - (pi_lcn->lcnphy_rssi_vc << 4) | (pi_lcn-> - lcnphy_rssi_gs - << 10)); - write_phy_reg(pi, 0x43e, afectrl1); - } - - mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0); - if (pi->sh->boardflags & BFL_FEM) { - mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0); - - write_phy_reg(pi, 0x910, 0x1); - } - - mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8); - mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0); - mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0); - -} - -static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi) -{ - if (CHSPEC_IS5G(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0); - - mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8); - } -} - -static void wlc_lcnphy_agc_temp_init(phy_info_t *pi) -{ - s16 temp; - phytbl_info_t tab; - u32 tableBuffer[2]; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - temp = (s16) read_phy_reg(pi, 0x4df); - pi_lcn->lcnphy_ofdmgainidxtableoffset = (temp & (0xff << 0)) >> 0; - - if (pi_lcn->lcnphy_ofdmgainidxtableoffset > 127) - pi_lcn->lcnphy_ofdmgainidxtableoffset -= 256; - - pi_lcn->lcnphy_dsssgainidxtableoffset = (temp & (0xff << 8)) >> 8; - - if (pi_lcn->lcnphy_dsssgainidxtableoffset > 127) - pi_lcn->lcnphy_dsssgainidxtableoffset -= 256; - - tab.tbl_ptr = tableBuffer; - tab.tbl_len = 2; - tab.tbl_id = 17; - tab.tbl_offset = 59; - tab.tbl_width = 32; - wlc_lcnphy_read_table(pi, &tab); - - if (tableBuffer[0] > 63) - tableBuffer[0] -= 128; - pi_lcn->lcnphy_tr_R_gain_val = tableBuffer[0]; - - if (tableBuffer[1] > 63) - tableBuffer[1] -= 128; - pi_lcn->lcnphy_tr_T_gain_val = tableBuffer[1]; - - temp = (s16) (read_phy_reg(pi, 0x434) - & (0xff << 0)); - if (temp > 127) - temp -= 256; - pi_lcn->lcnphy_input_pwr_offset_db = (s8) temp; - - pi_lcn->lcnphy_Med_Low_Gain_db = (read_phy_reg(pi, 0x424) - & (0xff << 8)) - >> 8; - pi_lcn->lcnphy_Very_Low_Gain_db = (read_phy_reg(pi, 0x425) - & (0xff << 0)) - >> 0; - - tab.tbl_ptr = tableBuffer; - tab.tbl_len = 2; - tab.tbl_id = LCNPHY_TBL_ID_GAIN_IDX; - tab.tbl_offset = 28; - tab.tbl_width = 32; - wlc_lcnphy_read_table(pi, &tab); - - pi_lcn->lcnphy_gain_idx_14_lowword = tableBuffer[0]; - pi_lcn->lcnphy_gain_idx_14_hiword = tableBuffer[1]; - -} - -static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi) -{ - if (NORADIO_ENAB(pi->pubpi)) - return; - - or_phy_reg(pi, 0x805, 0x1); - - mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0); - - mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0); - - write_phy_reg(pi, 0x414, 0x1e10); - write_phy_reg(pi, 0x415, 0x0640); - - mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8); - - or_phy_reg(pi, 0x44a, 0x44); - write_phy_reg(pi, 0x44a, 0x80); - mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0); - - mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0); - - if (!(pi->sh->boardrev < 0x1204)) - mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0); - - write_phy_reg(pi, 0x7d6, 0x0902); - mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0); - - mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4); - - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { - mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0); - - mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0); - - mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0); - - mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0); - - mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2); - - mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4); - mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0); - mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90); - mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2); - mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0); - - mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2); - - wlc_lcnphy_clear_tx_power_offsets(pi); - mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6); - - } -} - -static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi) -{ - - wlc_lcnphy_tbl_init(pi); - wlc_lcnphy_rev0_baseband_init(pi); - if (LCNREV_IS(pi->pubpi.phy_rev, 2)) - wlc_lcnphy_rev2_baseband_init(pi); - wlc_lcnphy_bu_tweaks(pi); -} - -static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi) -{ - u32 i; - lcnphy_radio_regs_t *lcnphyregs = NULL; - - lcnphyregs = lcnphy_radio_regs_2064; - - for (i = 0; lcnphyregs[i].address != 0xffff; i++) - if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a) - write_radio_reg(pi, - ((lcnphyregs[i].address & 0x3fff) | - RADIO_DEFAULT_CORE), - (u16) lcnphyregs[i].init_a); - else if (lcnphyregs[i].do_init_g) - write_radio_reg(pi, - ((lcnphyregs[i].address & 0x3fff) | - RADIO_DEFAULT_CORE), - (u16) lcnphyregs[i].init_g); - - write_radio_reg(pi, RADIO_2064_REG032, 0x62); - write_radio_reg(pi, RADIO_2064_REG033, 0x19); - - write_radio_reg(pi, RADIO_2064_REG090, 0x10); - - write_radio_reg(pi, RADIO_2064_REG010, 0x00); - - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { - - write_radio_reg(pi, RADIO_2064_REG060, 0x7f); - write_radio_reg(pi, RADIO_2064_REG061, 0x72); - write_radio_reg(pi, RADIO_2064_REG062, 0x7f); - } - - write_radio_reg(pi, RADIO_2064_REG01D, 0x02); - write_radio_reg(pi, RADIO_2064_REG01E, 0x06); - - mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0); - - mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3); - - mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6); - - mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9); - - mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12); - - write_phy_reg(pi, 0x4ea, 0x4688); - - mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0); - - mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6); - - mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0); - - wlc_lcnphy_set_tx_locc(pi, 0); - - wlc_lcnphy_rcal(pi); - - wlc_lcnphy_rc_cal(pi); -} - -static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi) -{ - if (NORADIO_ENAB(pi->pubpi)) - return; - - wlc_radio_2064_init(pi); -} - -static void wlc_lcnphy_rcal(phy_info_t *pi) -{ - u8 rcal_value; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); - - or_radio_reg(pi, RADIO_2064_REG004, 0x40); - or_radio_reg(pi, RADIO_2064_REG120, 0x10); - - or_radio_reg(pi, RADIO_2064_REG078, 0x80); - or_radio_reg(pi, RADIO_2064_REG129, 0x02); - - or_radio_reg(pi, RADIO_2064_REG057, 0x01); - - or_radio_reg(pi, RADIO_2064_REG05B, 0x02); - mdelay(5); - SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000); - - if (wlc_radio_2064_rcal_done(pi)) { - rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C); - rcal_value = rcal_value & 0x1f; - } - - and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); - - and_radio_reg(pi, RADIO_2064_REG057, 0xFE); -} - -static void wlc_lcnphy_rc_cal(phy_info_t *pi) -{ - u8 dflt_rc_cal_val; - u16 flt_val; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - dflt_rc_cal_val = 7; - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) - dflt_rc_cal_val = 11; - flt_val = - (dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) | - (dflt_rc_cal_val); - write_phy_reg(pi, 0x933, flt_val); - write_phy_reg(pi, 0x934, flt_val); - write_phy_reg(pi, 0x935, flt_val); - write_phy_reg(pi, 0x936, flt_val); - write_phy_reg(pi, 0x937, (flt_val & 0x1FF)); - - return; -} - -static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) -{ - s8 txpwr = 0; - int i; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - u16 cckpo = 0; - u32 offset_ofdm, offset_mcs; - - pi_lcn->lcnphy_tr_isolation_mid = - (u8) PHY_GETINTVAR(pi, "triso2g"); - - pi_lcn->lcnphy_rx_power_offset = - (u8) PHY_GETINTVAR(pi, "rxpo2g"); - - pi->txpa_2g[0] = (s16) PHY_GETINTVAR(pi, "pa0b0"); - pi->txpa_2g[1] = (s16) PHY_GETINTVAR(pi, "pa0b1"); - pi->txpa_2g[2] = (s16) PHY_GETINTVAR(pi, "pa0b2"); - - pi_lcn->lcnphy_rssi_vf = (u8) PHY_GETINTVAR(pi, "rssismf2g"); - pi_lcn->lcnphy_rssi_vc = (u8) PHY_GETINTVAR(pi, "rssismc2g"); - pi_lcn->lcnphy_rssi_gs = (u8) PHY_GETINTVAR(pi, "rssisav2g"); - - { - pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf; - pi_lcn->lcnphy_rssi_vc_lowtemp = pi_lcn->lcnphy_rssi_vc; - pi_lcn->lcnphy_rssi_gs_lowtemp = pi_lcn->lcnphy_rssi_gs; - - pi_lcn->lcnphy_rssi_vf_hightemp = - pi_lcn->lcnphy_rssi_vf; - pi_lcn->lcnphy_rssi_vc_hightemp = - pi_lcn->lcnphy_rssi_vc; - pi_lcn->lcnphy_rssi_gs_hightemp = - pi_lcn->lcnphy_rssi_gs; - } - - txpwr = (s8) PHY_GETINTVAR(pi, "maxp2ga0"); - pi->tx_srom_max_2g = txpwr; - - for (i = 0; i < PWRTBL_NUM_COEFF; i++) { - pi->txpa_2g_low_temp[i] = pi->txpa_2g[i]; - pi->txpa_2g_high_temp[i] = pi->txpa_2g[i]; - } - - cckpo = (u16) PHY_GETINTVAR(pi, "cck2gpo"); - if (cckpo) { - uint max_pwr_chan = txpwr; - - for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) { - pi->tx_srom_max_rate_2g[i] = max_pwr_chan - - ((cckpo & 0xf) * 2); - cckpo >>= 4; - } - - offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); - for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) { - pi->tx_srom_max_rate_2g[i] = max_pwr_chan - - ((offset_ofdm & 0xf) * 2); - offset_ofdm >>= 4; - } - } else { - u8 opo = 0; - - opo = (u8) PHY_GETINTVAR(pi, "opo"); - - for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) { - pi->tx_srom_max_rate_2g[i] = txpwr; - } - - offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); - - for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) { - pi->tx_srom_max_rate_2g[i] = txpwr - - ((offset_ofdm & 0xf) * 2); - offset_ofdm >>= 4; - } - offset_mcs = - ((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) | - (u16) PHY_GETINTVAR(pi, "mcs2gpo0"); - pi_lcn->lcnphy_mcs20_po = offset_mcs; - for (i = TXP_FIRST_SISO_MCS_20; - i <= TXP_LAST_SISO_MCS_20; i++) { - pi->tx_srom_max_rate_2g[i] = - txpwr - ((offset_mcs & 0xf) * 2); - offset_mcs >>= 4; - } - } - - pi_lcn->lcnphy_rawtempsense = - (u16) PHY_GETINTVAR(pi, "rawtempsense"); - pi_lcn->lcnphy_measPower = - (u8) PHY_GETINTVAR(pi, "measpower"); - pi_lcn->lcnphy_tempsense_slope = - (u8) PHY_GETINTVAR(pi, "tempsense_slope"); - pi_lcn->lcnphy_hw_iqcal_en = - (bool) PHY_GETINTVAR(pi, "hw_iqcal_en"); - pi_lcn->lcnphy_iqcal_swp_dis = - (bool) PHY_GETINTVAR(pi, "iqcal_swp_dis"); - pi_lcn->lcnphy_tempcorrx = - (u8) PHY_GETINTVAR(pi, "tempcorrx"); - pi_lcn->lcnphy_tempsense_option = - (u8) PHY_GETINTVAR(pi, "tempsense_option"); - pi_lcn->lcnphy_freqoffset_corr = - (u8) PHY_GETINTVAR(pi, "freqoffset_corr"); - if ((u8) getintvar(pi->vars, "aa2g") > 1) - wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, - (u8) getintvar(pi->vars, - "aa2g")); - } - pi_lcn->lcnphy_cck_dig_filt_type = -1; - if (PHY_GETVAR(pi, "cckdigfilttype")) { - s16 temp; - temp = (s16) PHY_GETINTVAR(pi, "cckdigfilttype"); - if (temp >= 0) { - pi_lcn->lcnphy_cck_dig_filt_type = temp; - } - } - - return true; -} - -void wlc_2064_vco_cal(phy_info_t *pi) -{ - u8 calnrst; - - mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3); - calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8; - write_radio_reg(pi, RADIO_2064_REG056, calnrst); - udelay(1); - write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03); - udelay(1); - write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07); - udelay(300); - mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0); -} - -static void -wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel) -{ - uint i; - const chan_info_2064_lcnphy_t *ci; - u8 rfpll_doubler = 0; - u8 pll_pwrup, pll_pwrup_ovr; - fixed qFxtal, qFref, qFvco, qFcal; - u8 d15, d16, f16, e44, e45; - u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div; - u16 loop_bw, d30, setCount; - if (NORADIO_ENAB(pi->pubpi)) - return; - ci = &chan_info_2064_lcnphy[0]; - rfpll_doubler = 1; - - mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2); - - write_radio_reg(pi, RADIO_2064_REG09E, 0xf); - if (!rfpll_doubler) { - loop_bw = PLL_2064_LOOP_BW; - d30 = PLL_2064_D30; - } else { - loop_bw = PLL_2064_LOOP_BW_DOUBLER; - d30 = PLL_2064_D30_DOUBLER; - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++) - if (chan_info_2064_lcnphy[i].chan == channel) - break; - - if (i >= ARRAY_SIZE(chan_info_2064_lcnphy)) { - return; - } - - ci = &chan_info_2064_lcnphy[i]; - } - - write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune); - - mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx); - - mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl); - - mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g); - - mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2, - (ci->logen_rccr_rx) << 2); - - mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune); - - mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4, - (ci->pa_rxrf_lna2_freq_tune) << 4); - - write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1); - - pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044); - pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B); - - or_radio_reg(pi, RADIO_2064_REG044, 0x07); - - or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1); - e44 = 0; - e45 = 0; - - fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq); - if (pi->xtalfreq > 26000000) - e44 = 1; - if (pi->xtalfreq > 52000000) - e45 = 1; - if (e44 == 0) - fcal_div = 1; - else if (e45 == 0) - fcal_div = 2; - else - fcal_div = 4; - fvco3 = (ci->freq * 3); - fref3 = 2 * fpfd; - - qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16); - qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16); - qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ; - qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16); - - write_radio_reg(pi, RADIO_2064_REG04F, 0x02); - - d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1; - write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2))); - write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5); - - d16 = (qFcal * 8 / (d15 + 1)) - 1; - write_radio_reg(pi, RADIO_2064_REG051, d16); - - f16 = ((d16 + 1) * (d15 + 1)) / qFcal; - setCount = f16 * 3 * (ci->freq) / 32 - 1; - mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0), - (u8) (setCount >> 8)); - - or_radio_reg(pi, RADIO_2064_REG053, 0x10); - write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff)); - - div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4; - - div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4; - while (div_frac >= fref3) { - div_int++; - div_frac -= fref3; - } - div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20); - - mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0), - (u8) (div_int >> 4)); - mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4), - (u8) (div_int << 4)); - mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0), - (u8) (div_frac >> 16)); - write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff); - write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff); - - write_radio_reg(pi, RADIO_2064_REG040, 0xfb); - - write_radio_reg(pi, RADIO_2064_REG041, 0x9A); - write_radio_reg(pi, RADIO_2064_REG042, 0xA3); - write_radio_reg(pi, RADIO_2064_REG043, 0x0C); - - { - u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current; - u16 c29, c38, c30, g30, d28; - c29 = loop_bw; - d29 = 200; - c38 = 1250; - h29 = d29 / c29; - h23 = 1; - c28 = 30; - d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) * - (fvco3 / 2 - PLL_2064_LOW_END_VCO)) / - (PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO)) - + PLL_2064_LOW_END_KVCO; - h28_ten = (d28 * 10) / c28; - c30 = 2640; - e30 = (d30 - 680) / 490; - g30 = 680 + (e30 * 490); - h30_ten = (g30 * 10) / c30; - cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten; - mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current); - } - if (channel >= 1 && channel <= 5) - write_radio_reg(pi, RADIO_2064_REG03C, 0x8); - else - write_radio_reg(pi, RADIO_2064_REG03C, 0x7); - write_radio_reg(pi, RADIO_2064_REG03D, 0x3); - - mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c); - udelay(1); - - wlc_2064_vco_cal(pi); - - write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup); - write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr); - if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { - write_radio_reg(pi, RADIO_2064_REG038, 3); - write_radio_reg(pi, RADIO_2064_REG091, 7); - } -} - -bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi) -{ - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - return 0; - else - return (LCNPHY_TX_PWR_CTRL_HW == - wlc_lcnphy_get_tx_pwr_ctrl((pi))); -} - -void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi) -{ - u16 pwr_ctrl; - if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { - wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL); - } else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { - - pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); - wlc_lcnphy_txpower_recalc_target(pi); - - wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl); - } else - return; -} - -void wlc_phy_detach_lcnphy(phy_info_t *pi) -{ - kfree(pi->u.pi_lcnphy); -} - -bool wlc_phy_attach_lcnphy(phy_info_t *pi) -{ - phy_info_lcnphy_t *pi_lcn; - - pi->u.pi_lcnphy = kzalloc(sizeof(phy_info_lcnphy_t), GFP_ATOMIC); - if (pi->u.pi_lcnphy == NULL) { - return false; - } - - pi_lcn = pi->u.pi_lcnphy; - - if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) { - pi->hwpwrctrl = true; - pi->hwpwrctrl_capable = true; - } - - pi->xtalfreq = si_pmu_alp_clock(pi->sh->sih); - pi_lcn->lcnphy_papd_rxGnCtrl_init = 0; - - pi->pi_fptr.init = wlc_phy_init_lcnphy; - pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy; - pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy; - pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy; - pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc; - pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc; - pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc; - pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft; - pi->pi_fptr.detach = wlc_phy_detach_lcnphy; - - if (!wlc_phy_txpwr_srom_read_lcnphy(pi)) - return false; - - if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) { - if (pi_lcn->lcnphy_tempsense_option == 3) { - pi->hwpwrctrl = true; - pi->hwpwrctrl_capable = true; - pi->temppwrctrl_capable = false; - } else { - pi->hwpwrctrl = false; - pi->hwpwrctrl_capable = false; - pi->temppwrctrl_capable = true; - } - } - - return true; -} - -static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) -{ - u16 trsw, ext_lna, lna1, lna2, tia, biq0, biq1, gain0_15, gain16_19; - - trsw = (gain & ((u32) 1 << 28)) ? 0 : 1; - ext_lna = (u16) (gain >> 29) & 0x01; - lna1 = (u16) (gain >> 0) & 0x0f; - lna2 = (u16) (gain >> 4) & 0x0f; - tia = (u16) (gain >> 8) & 0xf; - biq0 = (u16) (gain >> 12) & 0xf; - biq1 = (u16) (gain >> 16) & 0xf; - - gain0_15 = (u16) ((lna1 & 0x3) | ((lna1 & 0x3) << 2) | - ((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) | - ((tia & 0xf) << 8) | ((biq0 & 0xf) << 12)); - gain16_19 = biq1; - - mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0); - mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); - mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); - mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); - mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); - mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3); - } - wlc_lcnphy_rx_gain_override_enable(pi, true); -} - -static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index) -{ - u32 received_power = 0; - s32 max_index = 0; - u32 gain_code = 0; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - max_index = 36; - if (*gain_index >= 0) - gain_code = lcnphy_23bitgaincode_table[*gain_index]; - - if (-1 == *gain_index) { - *gain_index = 0; - while ((*gain_index <= (s32) max_index) - && (received_power < 700)) { - wlc_lcnphy_set_rx_gain(pi, - lcnphy_23bitgaincode_table - [*gain_index]); - received_power = - wlc_lcnphy_measure_digital_power(pi, - pi_lcn-> - lcnphy_noise_samples); - (*gain_index)++; - } - (*gain_index)--; - } else { - wlc_lcnphy_set_rx_gain(pi, gain_code); - received_power = - wlc_lcnphy_measure_digital_power(pi, - pi_lcn-> - lcnphy_noise_samples); - } - - return received_power; -} - -s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index) -{ - s32 gain = 0; - s32 nominal_power_db; - s32 log_val, gain_mismatch, desired_gain, input_power_offset_db, - input_power_db; - s32 received_power, temperature; - uint freq; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; - - received_power = wlc_lcnphy_get_receive_power(pi, &gain_index); - - gain = lcnphy_gain_table[gain_index]; - - nominal_power_db = read_phy_reg(pi, 0x425) >> 8; - - { - u32 power = (received_power * 16); - u32 msb1, msb2, val1, val2, diff1, diff2; - msb1 = ffs(power) - 1; - msb2 = msb1 + 1; - val1 = 1 << msb1; - val2 = 1 << msb2; - diff1 = (power - val1); - diff2 = (val2 - power); - if (diff1 < diff2) - log_val = msb1; - else - log_val = msb2; - } - - log_val = log_val * 3; - - gain_mismatch = (nominal_power_db / 2) - (log_val); - - desired_gain = gain + gain_mismatch; - - input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF; - - if (input_power_offset_db > 127) - input_power_offset_db -= 256; - - input_power_db = input_power_offset_db - desired_gain; - - input_power_db = - input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index]; - - freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec)); - if ((freq > 2427) && (freq <= 2467)) - input_power_db = input_power_db - 1; - - temperature = pi_lcn->lcnphy_lastsensed_temperature; - - if ((temperature - 15) < -30) { - input_power_db = - input_power_db + (((temperature - 10 - 25) * 286) >> 12) - - 7; - } else if ((temperature - 15) < 4) { - input_power_db = - input_power_db + (((temperature - 10 - 25) * 286) >> 12) - - 3; - } else { - input_power_db = - input_power_db + (((temperature - 10 - 25) * 286) >> 12); - } - - wlc_lcnphy_rx_gain_override_enable(pi, 0); - - return input_power_db; -} - -static int -wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, s16 filt_type) -{ - s16 filt_index = -1; - int j; - - u16 addr[] = { - 0x910, - 0x91e, - 0x91f, - 0x924, - 0x925, - 0x926, - 0x920, - 0x921, - 0x927, - 0x928, - 0x929, - 0x922, - 0x923, - 0x930, - 0x931, - 0x932 - }; - - u16 addr_ofdm[] = { - 0x90f, - 0x900, - 0x901, - 0x906, - 0x907, - 0x908, - 0x902, - 0x903, - 0x909, - 0x90a, - 0x90b, - 0x904, - 0x905, - 0x90c, - 0x90d, - 0x90e - }; - - if (!is_ofdm) { - for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) { - if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) { - filt_index = (s16) j; - break; - } - } - - if (filt_index != -1) { - for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, addr[j], - LCNPHY_txdigfiltcoeffs_cck - [filt_index][j + 1]); - } - } - } else { - for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) { - if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) { - filt_index = (s16) j; - break; - } - } - - if (filt_index != -1) { - for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, addr_ofdm[j], - LCNPHY_txdigfiltcoeffs_ofdm - [filt_index][j + 1]); - } - } - } - - return (filt_index != -1) ? 0 : -1; -} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h deleted file mode 100644 index efa8c90..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_PHY_LCN_H_ -#define _BRCM_PHY_LCN_H_ - -struct phy_info_lcnphy { - int lcnphy_txrf_sp_9_override; - u8 lcnphy_full_cal_channel; - u8 lcnphy_cal_counter; - u16 lcnphy_cal_temper; - bool lcnphy_recal; - - u8 lcnphy_rc_cap; - u32 lcnphy_mcs20_po; - - u8 lcnphy_tr_isolation_mid; - u8 lcnphy_tr_isolation_low; - u8 lcnphy_tr_isolation_hi; - - u8 lcnphy_bx_arch; - u8 lcnphy_rx_power_offset; - u8 lcnphy_rssi_vf; - u8 lcnphy_rssi_vc; - u8 lcnphy_rssi_gs; - u8 lcnphy_tssi_val; - u8 lcnphy_rssi_vf_lowtemp; - u8 lcnphy_rssi_vc_lowtemp; - u8 lcnphy_rssi_gs_lowtemp; - - u8 lcnphy_rssi_vf_hightemp; - u8 lcnphy_rssi_vc_hightemp; - u8 lcnphy_rssi_gs_hightemp; - - s16 lcnphy_pa0b0; - s16 lcnphy_pa0b1; - s16 lcnphy_pa0b2; - - u16 lcnphy_rawtempsense; - u8 lcnphy_measPower; - u8 lcnphy_tempsense_slope; - u8 lcnphy_freqoffset_corr; - u8 lcnphy_tempsense_option; - u8 lcnphy_tempcorrx; - bool lcnphy_iqcal_swp_dis; - bool lcnphy_hw_iqcal_en; - uint lcnphy_bandedge_corr; - bool lcnphy_spurmod; - u16 lcnphy_tssi_tx_cnt; - u16 lcnphy_tssi_idx; - u16 lcnphy_tssi_npt; - - u16 lcnphy_target_tx_freq; - s8 lcnphy_tx_power_idx_override; - u16 lcnphy_noise_samples; - - u32 lcnphy_papdRxGnIdx; - u32 lcnphy_papd_rxGnCtrl_init; - - u32 lcnphy_gain_idx_14_lowword; - u32 lcnphy_gain_idx_14_hiword; - u32 lcnphy_gain_idx_27_lowword; - u32 lcnphy_gain_idx_27_hiword; - s16 lcnphy_ofdmgainidxtableoffset; - s16 lcnphy_dsssgainidxtableoffset; - u32 lcnphy_tr_R_gain_val; - u32 lcnphy_tr_T_gain_val; - s8 lcnphy_input_pwr_offset_db; - u16 lcnphy_Med_Low_Gain_db; - u16 lcnphy_Very_Low_Gain_db; - s8 lcnphy_lastsensed_temperature; - s8 lcnphy_pkteng_rssi_slope; - u8 lcnphy_saved_tx_user_target[TXP_NUM_RATES]; - u8 lcnphy_volt_winner; - u8 lcnphy_volt_low; - u8 lcnphy_54_48_36_24mbps_backoff; - u8 lcnphy_11n_backoff; - u8 lcnphy_lowerofdm; - u8 lcnphy_cck; - u8 lcnphy_psat_2pt3_detected; - s32 lcnphy_lowest_Re_div_Im; - s8 lcnphy_final_papd_cal_idx; - u16 lcnphy_extstxctrl4; - u16 lcnphy_extstxctrl0; - u16 lcnphy_extstxctrl1; - s16 lcnphy_cck_dig_filt_type; - s16 lcnphy_ofdm_dig_filt_type; - lcnphy_cal_results_t lcnphy_cal_results; - - u8 lcnphy_psat_pwr; - u8 lcnphy_psat_indx; - s32 lcnphy_min_phase; - u8 lcnphy_final_idx; - u8 lcnphy_start_idx; - u8 lcnphy_current_index; - u16 lcnphy_logen_buf_1; - u16 lcnphy_local_ovr_2; - u16 lcnphy_local_oval_6; - u16 lcnphy_local_oval_5; - u16 lcnphy_logen_mixer_1; - - u8 lcnphy_aci_stat; - uint lcnphy_aci_start_time; - s8 lcnphy_tx_power_offset[TXP_NUM_RATES]; -}; -#endif /* _BRCM_PHY_LCN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c deleted file mode 100644 index da2afbb..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ /dev/null @@ -1,29174 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "bcmdma.h" - -#include -#include -#include -#include -#include - -#define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ - read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ - ((core == PHY_CORE_0) ? radio_type##_##jspace##0 : radio_type##_##jspace##1)) -#define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ - write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ - ((core == PHY_CORE_0) ? radio_type##_##jspace##0 : radio_type##_##jspace##1), value); -#define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ - write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value); - -#define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ - read_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##jspace##0##_##reg_name : \ - radio_type##_##jspace##1##_##reg_name)); -#define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ - write_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##jspace##0##_##reg_name : \ - radio_type##_##jspace##1##_##reg_name), value); -#define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ - read_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##reg_name##_##jspace##0 : \ - radio_type##_##reg_name##_##jspace##1)); -#define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ - write_radio_reg(pi, ((core == PHY_CORE_0) ? radio_type##_##reg_name##_##jspace##0 : \ - radio_type##_##reg_name##_##jspace##1), value); - -#define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 -#define NPHY_ACI_CHANNEL_DELTA 5 -#define NPHY_ACI_CHANNEL_SKIP 4 -#define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 -#define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 -#define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 -#define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 -#define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 -#define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 - -#define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 - -#define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 - -#define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 - -#define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 - -#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 - -#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 - -#define NPHY_NOISE_NOASSOC_ENTER_TH 400 - -#define NPHY_NOISE_ASSOC_ENTER_TH 400 - -#define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 - -#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 -#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 - -#define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 - -#define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 - -#define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) - -#define NPHY_RSSICAL_MAXREAD 31 - -#define NPHY_RSSICAL_NPOLL 8 -#define NPHY_RSSICAL_MAXD (1<<20) -#define NPHY_MIN_RXIQ_PWR 2 - -#define NPHY_RSSICAL_W1_TARGET 25 -#define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET -#define NPHY_RSSICAL_NB_TARGET 0 - -#define NPHY_RSSICAL_W1_TARGET_REV3 29 -#define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 - -#define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 -#define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 -#define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 -#define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - NPHY_RSSICAL_MAXREAD) -#define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS -#define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - NPHY_RSSICAL_MAXREAD) -#define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) -#define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ - ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) -#define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ - ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) -#define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ - ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) - -#define NPHY_IQCAL_NUMGAINS 9 -#define NPHY_N_GCTL 0x66 - -#define NPHY_PAPD_EPS_TBL_SIZE 64 -#define NPHY_PAPD_SCL_TBL_SIZE 64 -#define NPHY_NUM_DIG_FILT_COEFFS 15 - -#define NPHY_PAPD_COMP_OFF 0 -#define NPHY_PAPD_COMP_ON 1 - -#define NPHY_SROM_TEMPSHIFT 32 -#define NPHY_SROM_MAXTEMPOFFSET 16 -#define NPHY_SROM_MINTEMPOFFSET -16 - -#define NPHY_CAL_MAXTEMPDELTA 64 - -#define NPHY_NOISEVAR_TBLLEN40 256 -#define NPHY_NOISEVAR_TBLLEN20 128 - -#define NPHY_ANARXLPFBW_REDUCTIONFACT 7 - -#define NPHY_ADJUSTED_MINCRSPOWER 0x1e - -/* 5357 Chip specific ChipControl register bits */ -#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ -#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ - -typedef struct _nphy_iqcal_params { - u16 txlpf; - u16 txgm; - u16 pga; - u16 pad; - u16 ipa; - u16 cal_gain; - u16 ncorr[5]; -} nphy_iqcal_params_t; - -typedef struct _nphy_txiqcal_ladder { - u8 percent; - u8 g_env; -} nphy_txiqcal_ladder_t; - -typedef struct { - nphy_txgains_t gains; - bool useindex; - u8 index; -} nphy_ipa_txcalgains_t; - -typedef struct nphy_papd_restore_state_t { - u16 fbmix[2]; - u16 vga_master[2]; - u16 intpa_master[2]; - u16 afectrl[2]; - u16 afeoverride[2]; - u16 pwrup[2]; - u16 atten[2]; - u16 mm; -} nphy_papd_restore_state; - -typedef struct _nphy_ipa_txrxgain { - u16 hpvga; - u16 lpf_biq1; - u16 lpf_biq0; - u16 lna2; - u16 lna1; - s8 txpwrindex; -} nphy_ipa_txrxgain_t; - -#define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) - -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz[] = { {0, 0, 0, 0, 0, 100}, -{0, 0, 0, 0, 0, 50}, -{0, 0, 0, 0, 0, -1}, -{0, 0, 0, 3, 0, -1}, -{0, 0, 3, 3, 0, -1}, -{0, 2, 3, 3, 0, -1} -}; - -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz[] = { {0, 0, 0, 0, 0, 128}, -{0, 0, 0, 0, 0, 70}, -{0, 0, 0, 0, 0, 20}, -{0, 0, 0, 3, 0, 20}, -{0, 0, 3, 3, 0, 20}, -{0, 2, 3, 3, 0, 20} -}; - -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { {0, 0, 0, 0, 0, 100}, -{0, 0, 0, 0, 0, 50}, -{0, 0, 0, 0, 0, -1}, -{0, 0, 0, 3, 0, -1}, -{0, 0, 3, 3, 0, -1}, -{0, 0, 5, 3, 0, -1} -}; - -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { {0, 0, 0, 0, 0, 10}, -{0, 0, 0, 1, 0, 10}, -{0, 0, 1, 2, 0, 10}, -{0, 0, 1, 3, 0, 10}, -{0, 0, 4, 3, 0, 10}, -{0, 0, 6, 3, 0, 10} -}; - -#define NPHY_RXCAL_TONEAMP 181 -#define NPHY_RXCAL_TONEFREQ_40MHz 4000 -#define NPHY_RXCAL_TONEFREQ_20MHz 2000 - -enum { - NPHY_RXCAL_GAIN_INIT = 0, - NPHY_RXCAL_GAIN_UP, - NPHY_RXCAL_GAIN_DOWN -}; - -#define wlc_phy_get_papd_nphy(pi) \ - (read_phy_reg((pi), 0x1e7) & \ - ((0x1 << 15) | \ - (0x1 << 14) | \ - (0x1 << 13))) - -#define TXFILT_SHAPING_OFDM20 0 -#define TXFILT_SHAPING_OFDM40 1 -#define TXFILT_SHAPING_CCK 2 -#define TXFILT_DEFAULT_OFDM20 3 -#define TXFILT_DEFAULT_OFDM40 4 - -u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { - {-377, 137, -407, 208, -1527, 956, 93, 186, 93, - 230, -44, 230, 201, -191, 201}, - {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, - 26, 34, -32, 34}, - {-360, 164, -376, 164, -1533, 576, 308, -314, 308, - 121, -73, 121, 91, 124, 91}, - {-295, 200, -363, 142, -1391, 826, 151, 301, 151, - 151, 301, 151, 602, -752, 602}, - {-92, 58, -96, 49, -104, 44, 17, 35, 17, - 12, 25, 12, 13, 27, 13}, - {-375, 136, -399, 209, -1479, 949, 130, 260, 130, - 230, -44, 230, 201, -191, 201}, - {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, - 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} -}; - -typedef struct _chan_info_nphy_2055 { - u16 chan; - u16 freq; - uint unknown; - u8 RF_pll_ref; - u8 RF_rf_pll_mod1; - u8 RF_rf_pll_mod0; - u8 RF_vco_cap_tail; - u8 RF_vco_cal1; - u8 RF_vco_cal2; - u8 RF_pll_lf_c1; - u8 RF_pll_lf_r1; - u8 RF_pll_lf_c2; - u8 RF_lgbuf_cen_buf; - u8 RF_lgen_tune1; - u8 RF_lgen_tune2; - u8 RF_core1_lgbuf_a_tune; - u8 RF_core1_lgbuf_g_tune; - u8 RF_core1_rxrf_reg1; - u8 RF_core1_tx_pga_pad_tn; - u8 RF_core1_tx_mx_bgtrim; - u8 RF_core2_lgbuf_a_tune; - u8 RF_core2_lgbuf_g_tune; - u8 RF_core2_rxrf_reg1; - u8 RF_core2_tx_pga_pad_tn; - u8 RF_core2_tx_mx_bgtrim; - u16 PHY_BW1a; - u16 PHY_BW2; - u16 PHY_BW3; - u16 PHY_BW4; - u16 PHY_BW5; - u16 PHY_BW6; -} chan_info_nphy_2055_t; - -typedef struct _chan_info_nphy_radio205x { - u16 chan; - u16 freq; - u8 RF_SYN_pll_vcocal1; - u8 RF_SYN_pll_vcocal2; - u8 RF_SYN_pll_refdiv; - u8 RF_SYN_pll_mmd2; - u8 RF_SYN_pll_mmd1; - u8 RF_SYN_pll_loopfilter1; - u8 RF_SYN_pll_loopfilter2; - u8 RF_SYN_pll_loopfilter3; - u8 RF_SYN_pll_loopfilter4; - u8 RF_SYN_pll_loopfilter5; - u8 RF_SYN_reserved_addr27; - u8 RF_SYN_reserved_addr28; - u8 RF_SYN_reserved_addr29; - u8 RF_SYN_logen_VCOBUF1; - u8 RF_SYN_logen_MIXER2; - u8 RF_SYN_logen_BUF3; - u8 RF_SYN_logen_BUF4; - u8 RF_RX0_lnaa_tune; - u8 RF_RX0_lnag_tune; - u8 RF_TX0_intpaa_boost_tune; - u8 RF_TX0_intpag_boost_tune; - u8 RF_TX0_pada_boost_tune; - u8 RF_TX0_padg_boost_tune; - u8 RF_TX0_pgaa_boost_tune; - u8 RF_TX0_pgag_boost_tune; - u8 RF_TX0_mixa_boost_tune; - u8 RF_TX0_mixg_boost_tune; - u8 RF_RX1_lnaa_tune; - u8 RF_RX1_lnag_tune; - u8 RF_TX1_intpaa_boost_tune; - u8 RF_TX1_intpag_boost_tune; - u8 RF_TX1_pada_boost_tune; - u8 RF_TX1_padg_boost_tune; - u8 RF_TX1_pgaa_boost_tune; - u8 RF_TX1_pgag_boost_tune; - u8 RF_TX1_mixa_boost_tune; - u8 RF_TX1_mixg_boost_tune; - u16 PHY_BW1a; - u16 PHY_BW2; - u16 PHY_BW3; - u16 PHY_BW4; - u16 PHY_BW5; - u16 PHY_BW6; -} chan_info_nphy_radio205x_t; - -typedef struct _chan_info_nphy_radio2057 { - u16 chan; - u16 freq; - u8 RF_vcocal_countval0; - u8 RF_vcocal_countval1; - u8 RF_rfpll_refmaster_sparextalsize; - u8 RF_rfpll_loopfilter_r1; - u8 RF_rfpll_loopfilter_c2; - u8 RF_rfpll_loopfilter_c1; - u8 RF_cp_kpd_idac; - u8 RF_rfpll_mmd0; - u8 RF_rfpll_mmd1; - u8 RF_vcobuf_tune; - u8 RF_logen_mx2g_tune; - u8 RF_logen_mx5g_tune; - u8 RF_logen_indbuf2g_tune; - u8 RF_logen_indbuf5g_tune; - u8 RF_txmix2g_tune_boost_pu_core0; - u8 RF_pad2g_tune_pus_core0; - u8 RF_pga_boost_tune_core0; - u8 RF_txmix5g_boost_tune_core0; - u8 RF_pad5g_tune_misc_pus_core0; - u8 RF_lna2g_tune_core0; - u8 RF_lna5g_tune_core0; - u8 RF_txmix2g_tune_boost_pu_core1; - u8 RF_pad2g_tune_pus_core1; - u8 RF_pga_boost_tune_core1; - u8 RF_txmix5g_boost_tune_core1; - u8 RF_pad5g_tune_misc_pus_core1; - u8 RF_lna2g_tune_core1; - u8 RF_lna5g_tune_core1; - u16 PHY_BW1a; - u16 PHY_BW2; - u16 PHY_BW3; - u16 PHY_BW4; - u16 PHY_BW5; - u16 PHY_BW6; -} chan_info_nphy_radio2057_t; - -typedef struct _chan_info_nphy_radio2057_rev5 { - u16 chan; - u16 freq; - u8 RF_vcocal_countval0; - u8 RF_vcocal_countval1; - u8 RF_rfpll_refmaster_sparextalsize; - u8 RF_rfpll_loopfilter_r1; - u8 RF_rfpll_loopfilter_c2; - u8 RF_rfpll_loopfilter_c1; - u8 RF_cp_kpd_idac; - u8 RF_rfpll_mmd0; - u8 RF_rfpll_mmd1; - u8 RF_vcobuf_tune; - u8 RF_logen_mx2g_tune; - u8 RF_logen_indbuf2g_tune; - u8 RF_txmix2g_tune_boost_pu_core0; - u8 RF_pad2g_tune_pus_core0; - u8 RF_lna2g_tune_core0; - u8 RF_txmix2g_tune_boost_pu_core1; - u8 RF_pad2g_tune_pus_core1; - u8 RF_lna2g_tune_core1; - u16 PHY_BW1a; - u16 PHY_BW2; - u16 PHY_BW3; - u16 PHY_BW4; - u16 PHY_BW5; - u16 PHY_BW6; -} chan_info_nphy_radio2057_rev5_t; - -typedef struct nphy_sfo_cfg { - u16 PHY_BW1a; - u16 PHY_BW2; - u16 PHY_BW3; - u16 PHY_BW4; - u16 PHY_BW5; - u16 PHY_BW6; -} nphy_sfo_cfg_t; - -static chan_info_nphy_2055_t chan_info_nphy_2055[] = { - { - 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, - { - 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, - { - 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, - { - 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, - { - 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, - { - 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, - { - 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, - { - 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, - { - 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, - { - 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, - { - 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, - { - 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, - { - 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, - { - 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, - 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, - { - 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, - 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, - { - 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, - 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, - 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, - { - 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, - 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, - 0x0F, 0x8D, 0x7F4, 0x7F0, 0x7EC, 0x203, 0x204, 0x205}, - { - 218, 5090, 3393, 0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, - 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, - 0x0F, 0x8D, 0x7F8, 0x7F4, 0x7F0, 0x202, 0x203, 0x204}, - { - 220, 5100, 3400, 0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A, - 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x8D, 0xEE, 0x00, 0x0D, - 0x0F, 0x8D, 0x7FC, 0x7F8, 0x7F4, 0x201, 0x202, 0x203}, - { - 222, 5110, 3407, 0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A, - 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x8D, 0xEE, 0x00, 0x0D, - 0x0F, 0x8D, 0x800, 0x7FC, 0x7F8, 0x200, 0x201, 0x202}, - { - 224, 5120, 3413, 0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A, - 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x8C, 0xDD, 0x00, 0x0D, - 0x0F, 0x8C, 0x804, 0x800, 0x7FC, 0x1FF, 0x200, 0x201}, - { - 226, 5130, 3420, 0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A, - 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x8C, 0xDD, 0x00, 0x0D, - 0x0F, 0x8C, 0x808, 0x804, 0x800, 0x1FE, 0x1FF, 0x200}, - { - 228, 5140, 3427, 0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A, - 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E, 0x8B, 0xDD, 0x00, 0x0C, - 0x0E, 0x8B, 0x80C, 0x808, 0x804, 0x1FD, 0x1FE, 0x1FF}, - { - 32, 5160, 3440, 0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A, - 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x8A, 0xCC, 0x00, 0x0B, - 0x0D, 0x8A, 0x814, 0x810, 0x80C, 0x1FB, 0x1FC, 0x1FD}, - { - 34, 5170, 3447, 0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A, - 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x8A, 0xCC, 0x00, 0x0B, - 0x0D, 0x8A, 0x818, 0x814, 0x810, 0x1FA, 0x1FB, 0x1FC}, - { - 36, 5180, 3453, 0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A, - 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x89, 0xCC, 0x00, 0x0B, - 0x0C, 0x89, 0x81C, 0x818, 0x814, 0x1F9, 0x1FA, 0x1FB}, - { - 38, 5190, 3460, 0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A, - 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x89, 0xCC, 0x00, 0x0B, - 0x0C, 0x89, 0x820, 0x81C, 0x818, 0x1F8, 0x1F9, 0x1FA}, - { - 40, 5200, 3467, 0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A, - 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x89, 0xBB, 0x00, 0x0A, - 0x0B, 0x89, 0x824, 0x820, 0x81C, 0x1F7, 0x1F8, 0x1F9}, - { - 42, 5210, 3473, 0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A, - 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x89, 0xBB, 0x00, 0x0A, - 0x0B, 0x89, 0x828, 0x824, 0x820, 0x1F6, 0x1F7, 0x1F8}, - { - 44, 5220, 3480, 0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A, - 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x88, 0xBB, 0x00, 0x09, - 0x0A, 0x88, 0x82C, 0x828, 0x824, 0x1F5, 0x1F6, 0x1F7}, - { - 46, 5230, 3487, 0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A, - 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x88, 0xBB, 0x00, 0x09, - 0x0A, 0x88, 0x830, 0x82C, 0x828, 0x1F4, 0x1F5, 0x1F6}, - { - 48, 5240, 3493, 0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A, - 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x87, 0xAA, 0x00, 0x09, - 0x0A, 0x87, 0x834, 0x830, 0x82C, 0x1F3, 0x1F4, 0x1F5}, - { - 50, 5250, 3500, 0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A, - 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x87, 0xAA, 0x00, 0x09, - 0x0A, 0x87, 0x838, 0x834, 0x830, 0x1F2, 0x1F3, 0x1F4}, - { - 52, 5260, 3507, 0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A, - 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x87, 0xAA, 0x00, 0x08, - 0x09, 0x87, 0x83C, 0x838, 0x834, 0x1F1, 0x1F2, 0x1F3}, - { - 54, 5270, 3513, 0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A, - 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x87, 0xAA, 0x00, 0x08, - 0x09, 0x87, 0x840, 0x83C, 0x838, 0x1F0, 0x1F1, 0x1F2}, - { - 56, 5280, 3520, 0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A, - 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, 0x86, 0x99, 0x00, 0x08, - 0x08, 0x86, 0x844, 0x840, 0x83C, 0x1F0, 0x1F0, 0x1F1}, - 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{ - 166, 5830, 3887, 0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x920, 0x91C, 0x918, 0x1C1, 0x1C2, 0x1C2}, - { - 168, 5840, 3893, 0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x924, 0x920, 0x91C, 0x1C0, 0x1C1, 0x1C2}, - { - 170, 5850, 3900, 0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x928, 0x924, 0x920, 0x1BF, 0x1C0, 0x1C1}, - { - 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, - { - 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, - { - 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, - { - 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, - { - 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, - { - 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, - { - 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, - 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, - { - 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, - 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, - { - 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, - 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, - { - 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, - 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, - { - 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, - 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, - { - 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, - 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, - { - 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, - 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, - { - 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, - 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, - { - 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, - 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, - { - 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, - 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, - { - 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, - 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, - { - 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, - 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, - { - 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, - 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, - { - 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, - 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, - 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev3_2056[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, - 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, - 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, - 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0x00, 0xf2, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, - { - 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, - 0x70, 0x00, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, - 0x0f, 0x00, 0x0f, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, - { - 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, - 0x70, 0x00, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, - 0x0f, 0x00, 0x0f, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, - { - 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, - 0x70, 0x00, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, - 0x0f, 0x00, 0x0f, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, - { - 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, - 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0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev4_2056_A1[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, - 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, - 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, - { - 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, - 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, - 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0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v6[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, - { - 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, - 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{ - 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, - 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, - 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, - { - 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, - 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, - 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev5n6_2056v7[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, - 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, - 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0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v8[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, - { - 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, - 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{ - 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, - 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, - 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, - { - 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, - 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, - 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, - 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v11[] = { - { - 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, - 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, - 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, - 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, - { - 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x02, 0x0c, 0x01, - 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0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio2057_t chan_info_nphyrev7_2057_rev4[] = { - { - 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, - 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b4, 0x07b0, 0x07ac, 0x0214, - 0x0215, - 0x0216, - }, - { - 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, - 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b8, 0x07b4, 0x07b0, 0x0213, - 0x0214, - 0x0215, - }, - { - 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, - 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07bc, 0x07b8, 0x07b4, 0x0212, - 0x0213, - 0x0214, - }, - { - 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, - 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, - 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0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, - 0x041f, - 0x0424} -}; - -static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev8_2057_rev5[] = { - { - 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, - 0x043a, 0x043f, 0x0443}, - { - 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, - 0x0438, 0x043d, 0x0441}, - { - 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, - 0x0436, 0x043a, 0x043f}, - { - 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, - 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, - 0x0434, 0x0438, 0x043d}, - { - 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, - 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, - 0x0431, 0x0436, 0x043a}, - { - 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, - 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, - 0x042f, 0x0434, 0x0438}, - { - 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, - 0x042d, 0x0431, 0x0436}, - { - 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, - 0x042b, 0x042f, 0x0434}, - { - 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, - 0x0429, 0x042d, 0x0431}, - { - 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, - 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, - 0x0427, 0x042b, 0x042f}, - { - 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, - 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, - 0x0424, 0x0429, 0x042d}, - { - 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, - 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, - 0x0422, 0x0427, 0x042b}, - { - 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, - 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, - 0x0420, 0x0424, 0x0429}, - { - 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, - 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, - 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev9_2057_rev5v1[] = { - { - 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, - 0x043a, 0x043f, 0x0443}, - { - 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, - 0x0438, 0x043d, 0x0441}, - { - 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, - 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, - 0x0436, 0x043a, 0x043f}, - { - 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, - 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, - 0x0434, 0x0438, 0x043d}, - { - 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, - 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, - 0x0431, 0x0436, 0x043a}, - { - 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, - 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, - 0x042f, 0x0434, 0x0438}, - { - 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, - 0x042d, 0x0431, 0x0436}, - { - 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, - 0x042b, 0x042f, 0x0434}, - { - 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, - 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, - 0x0429, 0x042d, 0x0431}, - { - 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, - 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, - 0x0427, 0x042b, 0x042f}, - { - 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, - 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, - 0x0424, 0x0429, 0x042d}, - { - 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, - 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, - 0x0422, 0x0427, 0x042b}, - { - 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, - 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, - 0x0420, 0x0424, 0x0429}, - { - 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, - 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, - 0x041b, 0x041f, 0x0424} -}; - -static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev7[] = { - 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0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, - 0x043a, - 0x043f}, - { - 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, - 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, - 0x0438, - 0x043d}, - { - 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, - 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, - 0x0436, - 0x043a}, - { - 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, - 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, - 0x0434, - 0x0438}, - { - 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, - 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, - 0x0431, - 0x0436}, - { - 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, - 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, - 0x042f, - 0x0434}, - { - 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, - 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, - 0x042d, - 0x0431}, - { - 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, - 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, - 0x042b, - 0x042f}, - { - 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, - 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, - 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, - 0x0429, - 0x042d}, - { - 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, - 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{0x0E, 0x5, 0x5, 1, 1}, - {0x0F, 0x4f, 0x4f, 1, 1}, - {0x10, 0x5, 0x5, 1, 1}, - {0x11, 0xd0, 0xd0, 0, 0}, - {0x12, 0x2, 0x2, 0, 0}, - {0x13, 0, 0, 0, 0}, - {0x14, 0x40, 0x40, 0, 0}, - {0x15, 0, 0, 0, 0}, - {0x16, 0, 0, 0, 0}, - {0x17, 0, 0, 0, 0}, - {0x18, 0, 0, 0, 0}, - {0x19, 0, 0, 0, 0}, - {0x1A, 0, 0, 0, 0}, - {0x1B, 0, 0, 0, 0}, - {0x1C, 0, 0, 0, 0}, - {0x1D, 0xc0, 0xc0, 0, 0}, - {0x1E, 0xff, 0xff, 0, 0}, - {0x1F, 0xc0, 0xc0, 0, 0}, - {0x20, 0xff, 0xff, 0, 0}, - {0x21, 0xc0, 0xc0, 0, 0}, - {0x22, 0, 0, 0, 0}, - {0x23, 0x2c, 0x2c, 0, 0}, - {0x24, 0, 0, 0, 0}, - {0x25, 0, 0, 0, 0}, - {0x26, 0, 0, 0, 0}, - {0x27, 0, 0, 0, 0}, - {0x28, 0, 0, 0, 0}, - {0x29, 0, 0, 0, 0}, - {0x2A, 0, 0, 0, 0}, - {0x2B, 0, 0, 0, 0}, - {0x2C, 0, 0, 0, 0}, - {0x2D, 0xa4, 0xa4, 0, 0}, - {0x2E, 0x38, 0x38, 0, 0}, - {0x2F, 0, 0, 0, 0}, - {0x30, 0x4, 0x4, 1, 1}, - {0x31, 0, 0, 0, 0}, - {0x32, 0xa, 0xa, 0, 0}, - {0x33, 0x87, 0x87, 0, 0}, - {0x34, 0x9, 0x9, 0, 0}, - {0x35, 0x70, 0x70, 0, 0}, - {0x36, 0x11, 0x11, 0, 0}, - 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{0xF8, 0x8, 0}, - {0xF9, 0x60, 0}, - {0xFA, 0x1e, 0}, - {0xFB, 0x70, 0}, - {0xFC, 0, 0}, - {0xFD, 0, 0}, - {0xFE, 0, 0}, - {0xFF, 0x33, 0}, - {0x100, 0x1e, 0}, - {0x101, 0x62, 0}, - {0x102, 0x11, 0}, - {0x105, 0x3c, 0}, - {0x106, 0x9c, 0}, - {0x107, 0xa, 0}, - {0x108, 0x9d, 0}, - {0x109, 0xa, 0}, - {0x10A, 0, 0}, - {0x10B, 0x40, 0}, - {0x10C, 0x40, 0}, - {0x10D, 0x88, 0}, - {0x10E, 0x10, 0}, - {0x10F, 0xf0, 1}, - {0x110, 0x10, 1}, - {0x111, 0xf0, 1}, - {0x112, 0, 0}, - {0x113, 0, 0}, - {0x114, 0x10, 0}, - {0x115, 0x55, 0}, - {0x116, 0x3f, 1}, - {0x117, 0x36, 1}, - {0x118, 0, 0}, - {0x119, 0, 0}, - {0x11A, 0, 0}, - {0x11B, 0x87, 0}, - {0x11C, 0x11, 0}, - {0x11D, 0, 0}, - {0x11E, 0x33, 0}, - {0x11F, 0x88, 0}, - {0x120, 0, 0}, - {0x121, 0x87, 0}, - {0x122, 0x11, 0}, - {0x123, 0, 0}, - {0x124, 0x33, 0}, - {0x125, 0x88, 0}, - {0x126, 0xe1, 0}, - {0x127, 0x3f, 0}, - {0x128, 0x44, 0}, - {0x129, 0x8c, 1}, - {0x12A, 0x6d, 0}, - {0x12B, 0x22, 0}, - {0x12C, 0xbe, 0}, - {0x12D, 0x55, 1}, - {0x12E, 0xc, 0}, - {0x12F, 0xc, 0}, - {0x130, 0xaa, 0}, - {0x131, 0x2, 0}, - {0x132, 0, 0}, - {0x133, 0x10, 0}, - {0x134, 0x1, 1}, - {0x135, 0, 0}, - {0x136, 0, 0}, - {0x137, 0x80, 0}, - {0x138, 0x60, 0}, - {0x139, 0x44, 0}, - {0x13A, 0x55, 0}, - {0x13B, 0x1, 0}, - {0x13C, 0x55, 0}, - {0x13D, 0x1, 0}, - {0x13E, 0x5, 0}, - {0x13F, 0x55, 0}, - {0x140, 0x55, 0}, - {0x146, 0, 0}, - {0x147, 0, 0}, - {0x148, 0, 0}, - {0x149, 0, 0}, - {0x14A, 0, 0}, - {0x14B, 0, 0}, - {0x14C, 0, 0}, - {0x14D, 0, 0}, - {0x14E, 0, 0}, - {0x14F, 0, 0}, - {0x150, 0, 0}, - {0x151, 0, 0}, - {0x152, 0, 0}, - {0x153, 0, 0}, - {0x154, 0xc, 0}, - {0x155, 0xc, 0}, - {0x156, 0xc, 0}, - {0x157, 0, 0}, - {0x158, 0x2b, 0}, - {0x159, 0x84, 0}, - {0x15A, 0x15, 0}, - {0x15B, 0xf, 0}, - {0x15C, 0, 0}, - {0x15D, 0, 0}, - {0x15E, 0, 1}, - {0x15F, 0, 1}, - {0x160, 0, 1}, - {0x161, 0, 1}, - {0x162, 0, 1}, - {0x163, 0, 1}, - {0x164, 0, 0}, - {0x165, 0, 0}, - {0x166, 0, 0}, - {0x167, 0, 0}, - {0x168, 0, 0}, - {0x169, 0x2, 1}, - {0x16A, 0, 1}, - {0x16B, 0, 1}, - {0x16C, 0, 1}, - {0x16D, 0, 0}, - {0x170, 0, 0}, - {0x171, 0x77, 0}, - {0x172, 0x77, 0}, - {0x173, 0x77, 0}, - {0x174, 0x77, 0}, - {0x175, 0, 0}, - {0x176, 0x3, 0}, - {0x177, 0x37, 0}, - {0x178, 0x3, 0}, - {0x179, 0, 0}, - {0x17A, 0x21, 0}, - {0x17B, 0x21, 0}, - {0x17C, 0, 0}, - {0x17D, 0xaa, 0}, - {0x17E, 0, 0}, - {0x17F, 0xaa, 0}, - {0x180, 0, 0}, - {0x190, 0, 0}, - {0x191, 0x77, 0}, - {0x192, 0x77, 0}, - {0x193, 0x77, 0}, - {0x194, 0x77, 0}, - {0x195, 0, 0}, - {0x196, 0x3, 0}, - {0x197, 0x37, 0}, - {0x198, 0x3, 0}, - {0x199, 0, 0}, - {0x19A, 0x21, 0}, - {0x19B, 0x21, 0}, - {0x19C, 0, 0}, - {0x19D, 0xaa, 0}, - {0x19E, 0, 0}, - {0x19F, 0xaa, 0}, - {0x1A0, 0, 0}, - {0x1A1, 0x2, 0}, - {0x1A2, 0xf, 0}, - {0x1A3, 0xf, 0}, - {0x1A4, 0, 1}, - {0x1A5, 0, 1}, - {0x1A6, 0, 1}, - {0x1A7, 0x2, 0}, - {0x1A8, 0xf, 0}, - {0x1A9, 0xf, 0}, - {0x1AA, 0, 1}, - {0x1AB, 0, 1}, - {0x1AC, 0, 1}, - {0xFFFF, 0, 0}, -}; - -radio_20xx_regs_t regs_2057_rev5[] = { - {0x00, 0, 1}, - {0x01, 0x57, 1}, - {0x02, 0x20, 1}, - {0x03, 0x1f, 0}, - {0x04, 0x4, 0}, - {0x05, 0x2, 0}, - {0x06, 0x1, 0}, - {0x07, 0x1, 0}, - {0x08, 0x1, 0}, - {0x09, 0x69, 0}, - {0x0A, 0x66, 0}, - {0x0B, 0x6, 0}, - {0x0C, 0x18, 0}, - {0x0D, 0x3, 0}, - {0x0E, 0x20, 0}, - {0x0F, 0x20, 0}, - {0x10, 0, 0}, - {0x11, 0x7c, 0}, - {0x12, 0x42, 0}, - {0x13, 0xbd, 0}, - {0x14, 0x7, 0}, - {0x15, 0x87, 0}, - {0x16, 0x8, 0}, - {0x17, 0x17, 0}, - {0x18, 0x7, 0}, - {0x19, 0, 0}, - {0x1A, 0x2, 0}, - {0x1B, 0x13, 0}, - {0x1C, 0x3e, 0}, - {0x1D, 0x3e, 0}, - {0x1E, 0x96, 0}, - {0x1F, 0x4, 0}, - {0x20, 0, 0}, - {0x21, 0, 0}, - {0x22, 0x17, 0}, - {0x23, 0x6, 1}, - {0x24, 0x1, 0}, - {0x25, 0x6, 0}, - {0x26, 0x4, 0}, - {0x27, 0xd, 0}, - {0x28, 0xd, 0}, - {0x29, 0x30, 0}, - {0x2A, 0x32, 0}, - {0x2B, 0x8, 0}, - {0x2C, 0x1c, 0}, - {0x2D, 0x2, 0}, - {0x2E, 0x4, 0}, - {0x2F, 0x7f, 0}, - {0x30, 0x27, 0}, - {0x31, 0, 1}, - {0x32, 0, 1}, - {0x33, 0, 1}, - {0x34, 0, 0}, - {0x35, 0x20, 0}, - {0x36, 0x18, 0}, - {0x37, 0x7, 0}, - {0x38, 0x66, 0}, - {0x39, 0x66, 0}, - {0x3C, 0xff, 0}, - {0x3D, 0xff, 0}, - {0x40, 0x16, 0}, - {0x41, 0x7, 0}, - {0x45, 0x3, 0}, - {0x46, 0x1, 0}, - {0x47, 0x7, 0}, - {0x4B, 0x66, 0}, - {0x4C, 0x66, 0}, - {0x4D, 0, 0}, - {0x4E, 0x4, 0}, - {0x4F, 0xc, 0}, - {0x50, 0, 0}, - {0x51, 0x70, 1}, - {0x56, 0x7, 0}, - {0x57, 0, 0}, - {0x58, 0, 0}, - {0x59, 0x88, 1}, - {0x5A, 0, 0}, - {0x5B, 0x1f, 0}, - {0x5C, 0x20, 1}, - {0x5D, 0x1, 0}, - {0x5E, 0x30, 0}, - {0x5F, 0x70, 0}, - {0x60, 0, 0}, - {0x61, 0, 0}, - {0x62, 0x33, 1}, - {0x63, 0xf, 1}, - {0x64, 0xf, 1}, - {0x65, 0, 0}, - {0x66, 0x11, 0}, - {0x80, 0x3c, 0}, - {0x81, 0x1, 1}, - {0x82, 0xa, 0}, - {0x85, 0, 0}, - {0x86, 0x40, 0}, - {0x87, 0x40, 0}, - {0x88, 0x88, 0}, - {0x89, 0x10, 0}, - {0x8A, 0xf0, 0}, - {0x8B, 0x10, 0}, - {0x8C, 0xf0, 0}, - {0x8F, 0x10, 0}, - {0x90, 0x55, 0}, - {0x91, 0x3f, 1}, - {0x92, 0x36, 1}, - {0x93, 0, 0}, - {0x94, 0, 0}, - {0x95, 0, 0}, - {0x96, 0x87, 0}, - {0x97, 0x11, 0}, - {0x98, 0, 0}, - {0x99, 0x33, 0}, - {0x9A, 0x88, 0}, - {0xA1, 0x20, 1}, - {0xA2, 0x3f, 0}, - {0xA3, 0x44, 0}, - {0xA4, 0x8c, 0}, - {0xA5, 0x6c, 0}, - {0xA6, 0x22, 0}, - {0xA7, 0xbe, 0}, - {0xA8, 0x55, 0}, - {0xAA, 0xc, 0}, - {0xAB, 0xaa, 0}, - {0xAC, 0x2, 0}, - {0xAD, 0, 0}, - {0xAE, 0x10, 0}, - {0xAF, 0x1, 0}, - {0xB0, 0, 0}, - {0xB1, 0, 0}, - {0xB2, 0x80, 0}, - {0xB3, 0x60, 0}, - {0xB4, 0x44, 0}, - {0xB5, 0x55, 0}, - {0xB6, 0x1, 0}, - {0xB7, 0x55, 0}, - {0xB8, 0x1, 0}, - {0xB9, 0x5, 0}, - {0xBA, 0x55, 0}, - {0xBB, 0x55, 0}, - {0xC3, 0, 0}, - {0xC4, 0, 0}, - {0xC5, 0, 0}, - {0xC6, 0, 0}, - {0xC7, 0, 0}, - {0xC8, 0, 0}, - {0xC9, 0, 0}, - {0xCA, 0, 0}, - {0xCB, 0, 0}, - {0xCD, 0, 0}, - {0xCE, 0x5e, 0}, - {0xCF, 0xc, 0}, - {0xD0, 0xc, 0}, - {0xD1, 0xc, 0}, - {0xD2, 0, 0}, - {0xD3, 0x2b, 0}, - {0xD4, 0xc, 0}, - {0xD5, 0, 0}, - {0xD6, 0x70, 1}, - {0xDB, 0x7, 0}, - {0xDC, 0, 0}, - {0xDD, 0, 0}, - {0xDE, 0x88, 1}, - {0xDF, 0, 0}, - {0xE0, 0x1f, 0}, - {0xE1, 0x20, 1}, - {0xE2, 0x1, 0}, - {0xE3, 0x30, 0}, - {0xE4, 0x70, 0}, - {0xE5, 0, 0}, - {0xE6, 0, 0}, - {0xE7, 0x33, 0}, - {0xE8, 0xf, 1}, - {0xE9, 0xf, 1}, - {0xEA, 0, 0}, - {0xEB, 0x11, 0}, - {0x105, 0x3c, 0}, - {0x106, 0x1, 1}, - {0x107, 0xa, 0}, - {0x10A, 0, 0}, - {0x10B, 0x40, 0}, - {0x10C, 0x40, 0}, - {0x10D, 0x88, 0}, - {0x10E, 0x10, 0}, - {0x10F, 0xf0, 0}, - {0x110, 0x10, 0}, - {0x111, 0xf0, 0}, - {0x114, 0x10, 0}, - {0x115, 0x55, 0}, - {0x116, 0x3f, 1}, - {0x117, 0x36, 1}, - {0x118, 0, 0}, - {0x119, 0, 0}, - {0x11A, 0, 0}, - {0x11B, 0x87, 0}, - {0x11C, 0x11, 0}, - {0x11D, 0, 0}, - {0x11E, 0x33, 0}, - {0x11F, 0x88, 0}, - {0x126, 0x20, 1}, - {0x127, 0x3f, 0}, - {0x128, 0x44, 0}, - {0x129, 0x8c, 0}, - {0x12A, 0x6c, 0}, - {0x12B, 0x22, 0}, - {0x12C, 0xbe, 0}, - {0x12D, 0x55, 0}, - {0x12F, 0xc, 0}, - {0x130, 0xaa, 0}, - {0x131, 0x2, 0}, - {0x132, 0, 0}, - {0x133, 0x10, 0}, - {0x134, 0x1, 0}, - {0x135, 0, 0}, - {0x136, 0, 0}, - {0x137, 0x80, 0}, - {0x138, 0x60, 0}, - {0x139, 0x44, 0}, - {0x13A, 0x55, 0}, - {0x13B, 0x1, 0}, - {0x13C, 0x55, 0}, - {0x13D, 0x1, 0}, - {0x13E, 0x5, 0}, - {0x13F, 0x55, 0}, - {0x140, 0x55, 0}, - {0x148, 0, 0}, - {0x149, 0, 0}, - {0x14A, 0, 0}, - {0x14B, 0, 0}, - {0x14C, 0, 0}, - {0x14D, 0, 0}, - {0x14E, 0, 0}, - {0x14F, 0, 0}, - {0x150, 0, 0}, - {0x154, 0xc, 0}, - {0x155, 0xc, 0}, - {0x156, 0xc, 0}, - {0x157, 0, 0}, - {0x158, 0x2b, 0}, - {0x159, 0x84, 0}, - {0x15A, 0x15, 0}, - {0x15B, 0xf, 0}, - {0x15C, 0, 0}, - {0x15D, 0, 0}, - {0x15E, 0, 1}, - {0x15F, 0, 1}, - {0x160, 0, 1}, - {0x161, 0, 1}, - {0x162, 0, 1}, - {0x163, 0, 1}, - {0x164, 0, 0}, - {0x165, 0, 0}, - {0x166, 0, 0}, - {0x167, 0, 0}, - {0x168, 0, 0}, - {0x169, 0, 0}, - {0x16A, 0, 1}, - {0x16B, 0, 1}, - {0x16C, 0, 1}, - {0x16D, 0, 0}, - {0x170, 0, 0}, - {0x171, 0x77, 0}, - {0x172, 0x77, 0}, - {0x173, 0x77, 0}, - {0x174, 0x77, 0}, - {0x175, 0, 0}, - {0x176, 0x3, 0}, - {0x177, 0x37, 0}, - {0x178, 0x3, 0}, - {0x179, 0, 0}, - {0x17B, 0x21, 0}, - {0x17C, 0, 0}, - {0x17D, 0xaa, 0}, - {0x17E, 0, 0}, - {0x190, 0, 0}, - {0x191, 0x77, 0}, - {0x192, 0x77, 0}, - {0x193, 0x77, 0}, - {0x194, 0x77, 0}, - {0x195, 0, 0}, - {0x196, 0x3, 0}, - {0x197, 0x37, 0}, - {0x198, 0x3, 0}, - {0x199, 0, 0}, - {0x19B, 0x21, 0}, - {0x19C, 0, 0}, - {0x19D, 0xaa, 0}, - {0x19E, 0, 0}, - {0x1A1, 0x2, 0}, - {0x1A2, 0xf, 0}, - {0x1A3, 0xf, 0}, - {0x1A4, 0, 1}, - {0x1A5, 0, 1}, - {0x1A6, 0, 1}, - {0x1A7, 0x2, 0}, - {0x1A8, 0xf, 0}, - {0x1A9, 0xf, 0}, - {0x1AA, 0, 1}, - {0x1AB, 0, 1}, - {0x1AC, 0, 1}, - {0x1AD, 0x84, 0}, - {0x1AE, 0x60, 0}, - {0x1AF, 0x47, 0}, - {0x1B0, 0x47, 0}, - {0x1B1, 0, 0}, - {0x1B2, 0, 0}, - {0x1B3, 0, 0}, - {0x1B4, 0, 0}, - {0x1B5, 0, 0}, - {0x1B6, 0, 0}, - {0x1B7, 0xc, 1}, - {0x1B8, 0, 0}, - {0x1B9, 0, 0}, - {0x1BA, 0, 0}, - {0x1BB, 0, 0}, - {0x1BC, 0, 0}, - {0x1BD, 0, 0}, - {0x1BE, 0, 0}, - {0x1BF, 0, 0}, - {0x1C0, 0, 0}, - {0x1C1, 0x1, 1}, - {0x1C2, 0x80, 1}, - {0x1C3, 0, 0}, - {0x1C4, 0, 0}, - {0x1C5, 0, 0}, - {0x1C6, 0, 0}, - {0x1C7, 0, 0}, - {0x1C8, 0, 0}, - {0x1C9, 0, 0}, - {0x1CA, 0, 0}, - {0xFFFF, 0, 0} -}; - -radio_20xx_regs_t regs_2057_rev5v1[] = { - {0x00, 0x15, 1}, - {0x01, 0x57, 1}, - {0x02, 0x20, 1}, - {0x03, 0x1f, 0}, - {0x04, 0x4, 0}, - {0x05, 0x2, 0}, - {0x06, 0x1, 0}, - {0x07, 0x1, 0}, - {0x08, 0x1, 0}, - {0x09, 0x69, 0}, - {0x0A, 0x66, 0}, - {0x0B, 0x6, 0}, - {0x0C, 0x18, 0}, - {0x0D, 0x3, 0}, - {0x0E, 0x20, 0}, - {0x0F, 0x20, 0}, - {0x10, 0, 0}, - {0x11, 0x7c, 0}, - {0x12, 0x42, 0}, - {0x13, 0xbd, 0}, - {0x14, 0x7, 0}, - {0x15, 0x87, 0}, - {0x16, 0x8, 0}, - {0x17, 0x17, 0}, - {0x18, 0x7, 0}, - {0x19, 0, 0}, - {0x1A, 0x2, 0}, - {0x1B, 0x13, 0}, - {0x1C, 0x3e, 0}, - {0x1D, 0x3e, 0}, - {0x1E, 0x96, 0}, - {0x1F, 0x4, 0}, - {0x20, 0, 0}, - {0x21, 0, 0}, - {0x22, 0x17, 0}, - {0x23, 0x6, 1}, - {0x24, 0x1, 0}, - {0x25, 0x6, 0}, - {0x26, 0x4, 0}, - {0x27, 0xd, 0}, - {0x28, 0xd, 0}, - {0x29, 0x30, 0}, - {0x2A, 0x32, 0}, - {0x2B, 0x8, 0}, - {0x2C, 0x1c, 0}, - {0x2D, 0x2, 0}, - {0x2E, 0x4, 0}, - {0x2F, 0x7f, 0}, - {0x30, 0x27, 0}, - {0x31, 0, 1}, - {0x32, 0, 1}, - {0x33, 0, 1}, - {0x34, 0, 0}, - {0x35, 0x20, 0}, - {0x36, 0x18, 0}, - {0x37, 0x7, 0}, - {0x38, 0x66, 0}, - {0x39, 0x66, 0}, - {0x3C, 0xff, 0}, - {0x3D, 0xff, 0}, - {0x40, 0x16, 0}, - {0x41, 0x7, 0}, - {0x45, 0x3, 0}, - {0x46, 0x1, 0}, - {0x47, 0x7, 0}, - {0x4B, 0x66, 0}, - {0x4C, 0x66, 0}, - {0x4D, 0, 0}, - {0x4E, 0x4, 0}, - {0x4F, 0xc, 0}, - {0x50, 0, 0}, - {0x51, 0x70, 1}, - {0x56, 0x7, 0}, - {0x57, 0, 0}, - {0x58, 0, 0}, - {0x59, 0x88, 1}, - {0x5A, 0, 0}, - {0x5B, 0x1f, 0}, - {0x5C, 0x20, 1}, - {0x5D, 0x1, 0}, - {0x5E, 0x30, 0}, - {0x5F, 0x70, 0}, - {0x60, 0, 0}, - {0x61, 0, 0}, - {0x62, 0x33, 1}, - {0x63, 0xf, 1}, - {0x64, 0xf, 1}, - {0x65, 0, 0}, - {0x66, 0x11, 0}, - {0x80, 0x3c, 0}, - {0x81, 0x1, 1}, - {0x82, 0xa, 0}, - {0x85, 0, 0}, - {0x86, 0x40, 0}, - {0x87, 0x40, 0}, - {0x88, 0x88, 0}, - {0x89, 0x10, 0}, - {0x8A, 0xf0, 0}, - {0x8B, 0x10, 0}, - {0x8C, 0xf0, 0}, - {0x8F, 0x10, 0}, - {0x90, 0x55, 0}, - {0x91, 0x3f, 1}, - {0x92, 0x36, 1}, - {0x93, 0, 0}, - {0x94, 0, 0}, - {0x95, 0, 0}, - {0x96, 0x87, 0}, - {0x97, 0x11, 0}, - {0x98, 0, 0}, - {0x99, 0x33, 0}, - {0x9A, 0x88, 0}, - {0xA1, 0x20, 1}, - {0xA2, 0x3f, 0}, - {0xA3, 0x44, 0}, - {0xA4, 0x8c, 0}, - {0xA5, 0x6c, 0}, - {0xA6, 0x22, 0}, - {0xA7, 0xbe, 0}, - {0xA8, 0x55, 0}, - {0xAA, 0xc, 0}, - {0xAB, 0xaa, 0}, - {0xAC, 0x2, 0}, - {0xAD, 0, 0}, - {0xAE, 0x10, 0}, - {0xAF, 0x1, 0}, - {0xB0, 0, 0}, - {0xB1, 0, 0}, - {0xB2, 0x80, 0}, - {0xB3, 0x60, 0}, - {0xB4, 0x44, 0}, - {0xB5, 0x55, 0}, - {0xB6, 0x1, 0}, - {0xB7, 0x55, 0}, - {0xB8, 0x1, 0}, - {0xB9, 0x5, 0}, - {0xBA, 0x55, 0}, - {0xBB, 0x55, 0}, - {0xC3, 0, 0}, - {0xC4, 0, 0}, - {0xC5, 0, 0}, - {0xC6, 0, 0}, - {0xC7, 0, 0}, - {0xC8, 0, 0}, - {0xC9, 0x1, 1}, - {0xCA, 0, 0}, - {0xCB, 0, 0}, - {0xCD, 0, 0}, - {0xCE, 0x5e, 0}, - {0xCF, 0xc, 0}, - {0xD0, 0xc, 0}, - {0xD1, 0xc, 0}, - {0xD2, 0, 0}, - {0xD3, 0x2b, 0}, - {0xD4, 0xc, 0}, - {0xD5, 0, 0}, - {0xD6, 0x70, 1}, - {0xDB, 0x7, 0}, - {0xDC, 0, 0}, - {0xDD, 0, 0}, - {0xDE, 0x88, 1}, - {0xDF, 0, 0}, - {0xE0, 0x1f, 0}, - {0xE1, 0x20, 1}, - {0xE2, 0x1, 0}, - {0xE3, 0x30, 0}, - {0xE4, 0x70, 0}, - {0xE5, 0, 0}, - {0xE6, 0, 0}, - {0xE7, 0x33, 0}, - {0xE8, 0xf, 1}, - {0xE9, 0xf, 1}, - {0xEA, 0, 0}, - {0xEB, 0x11, 0}, - {0x105, 0x3c, 0}, - {0x106, 0x1, 1}, - {0x107, 0xa, 0}, - {0x10A, 0, 0}, - {0x10B, 0x40, 0}, - {0x10C, 0x40, 0}, - {0x10D, 0x88, 0}, - {0x10E, 0x10, 0}, - {0x10F, 0xf0, 0}, - {0x110, 0x10, 0}, - {0x111, 0xf0, 0}, - {0x114, 0x10, 0}, - {0x115, 0x55, 0}, - {0x116, 0x3f, 1}, - {0x117, 0x36, 1}, - {0x118, 0, 0}, - {0x119, 0, 0}, - {0x11A, 0, 0}, - {0x11B, 0x87, 0}, - {0x11C, 0x11, 0}, - {0x11D, 0, 0}, - {0x11E, 0x33, 0}, - {0x11F, 0x88, 0}, - {0x126, 0x20, 1}, - {0x127, 0x3f, 0}, - {0x128, 0x44, 0}, - {0x129, 0x8c, 0}, - {0x12A, 0x6c, 0}, - {0x12B, 0x22, 0}, - {0x12C, 0xbe, 0}, - {0x12D, 0x55, 0}, - {0x12F, 0xc, 0}, - {0x130, 0xaa, 0}, - {0x131, 0x2, 0}, - {0x132, 0, 0}, - {0x133, 0x10, 0}, - {0x134, 0x1, 0}, - {0x135, 0, 0}, - {0x136, 0, 0}, - {0x137, 0x80, 0}, - {0x138, 0x60, 0}, - {0x139, 0x44, 0}, - {0x13A, 0x55, 0}, - {0x13B, 0x1, 0}, - {0x13C, 0x55, 0}, - {0x13D, 0x1, 0}, - {0x13E, 0x5, 0}, - {0x13F, 0x55, 0}, - {0x140, 0x55, 0}, - {0x148, 0, 0}, - {0x149, 0, 0}, - {0x14A, 0, 0}, - {0x14B, 0, 0}, - {0x14C, 0, 0}, - {0x14D, 0, 0}, - {0x14E, 0x1, 1}, - {0x14F, 0, 0}, - {0x150, 0, 0}, - {0x154, 0xc, 0}, - {0x155, 0xc, 0}, - {0x156, 0xc, 0}, - {0x157, 0, 0}, - {0x158, 0x2b, 0}, - {0x159, 0x84, 0}, - {0x15A, 0x15, 0}, - {0x15B, 0xf, 0}, - {0x15C, 0, 0}, - {0x15D, 0, 0}, - {0x15E, 0, 1}, - {0x15F, 0, 1}, - {0x160, 0, 1}, - {0x161, 0, 1}, - {0x162, 0, 1}, - {0x163, 0, 1}, - {0x164, 0, 0}, - {0x165, 0, 0}, - {0x166, 0, 0}, - {0x167, 0, 0}, - {0x168, 0, 0}, - {0x169, 0, 0}, - {0x16A, 0, 1}, - {0x16B, 0, 1}, - {0x16C, 0, 1}, - {0x16D, 0, 0}, - {0x170, 0, 0}, - {0x171, 0x77, 0}, - {0x172, 0x77, 0}, - {0x173, 0x77, 0}, - {0x174, 0x77, 0}, - {0x175, 0, 0}, - {0x176, 0x3, 0}, - {0x177, 0x37, 0}, - {0x178, 0x3, 0}, - {0x179, 0, 0}, - {0x17B, 0x21, 0}, - {0x17C, 0, 0}, - {0x17D, 0xaa, 0}, - {0x17E, 0, 0}, - {0x190, 0, 0}, - {0x191, 0x77, 0}, - {0x192, 0x77, 0}, - {0x193, 0x77, 0}, - {0x194, 0x77, 0}, - {0x195, 0, 0}, - {0x196, 0x3, 0}, - {0x197, 0x37, 0}, - {0x198, 0x3, 0}, - {0x199, 0, 0}, - {0x19B, 0x21, 0}, - {0x19C, 0, 0}, - {0x19D, 0xaa, 0}, - {0x19E, 0, 0}, - {0x1A1, 0x2, 0}, - {0x1A2, 0xf, 0}, - {0x1A3, 0xf, 0}, - {0x1A4, 0, 1}, - {0x1A5, 0, 1}, - {0x1A6, 0, 1}, - {0x1A7, 0x2, 0}, - {0x1A8, 0xf, 0}, - {0x1A9, 0xf, 0}, - {0x1AA, 0, 1}, - {0x1AB, 0, 1}, - {0x1AC, 0, 1}, - {0x1AD, 0x84, 0}, - {0x1AE, 0x60, 0}, - {0x1AF, 0x47, 0}, - {0x1B0, 0x47, 0}, - {0x1B1, 0, 0}, - {0x1B2, 0, 0}, - {0x1B3, 0, 0}, - {0x1B4, 0, 0}, - {0x1B5, 0, 0}, - {0x1B6, 0, 0}, - {0x1B7, 0xc, 1}, - {0x1B8, 0, 0}, - {0x1B9, 0, 0}, - {0x1BA, 0, 0}, - {0x1BB, 0, 0}, - {0x1BC, 0, 0}, - {0x1BD, 0, 0}, - {0x1BE, 0, 0}, - {0x1BF, 0, 0}, - {0x1C0, 0, 0}, - {0x1C1, 0x1, 1}, - {0x1C2, 0x80, 1}, - {0x1C3, 0, 0}, - {0x1C4, 0, 0}, - {0x1C5, 0, 0}, - {0x1C6, 0, 0}, - {0x1C7, 0, 0}, - {0x1C8, 0, 0}, - {0x1C9, 0, 0}, - {0x1CA, 0, 0}, - {0xFFFF, 0, 0} -}; - -radio_20xx_regs_t regs_2057_rev7[] = { - {0x00, 0, 1}, - {0x01, 0x57, 1}, - {0x02, 0x20, 1}, - {0x03, 0x1f, 0}, - {0x04, 0x4, 0}, - {0x05, 0x2, 0}, - {0x06, 0x1, 0}, - {0x07, 0x1, 0}, - {0x08, 0x1, 0}, - {0x09, 0x69, 0}, - {0x0A, 0x66, 0}, - {0x0B, 0x6, 0}, - {0x0C, 0x18, 0}, - {0x0D, 0x3, 0}, - {0x0E, 0x20, 0}, - {0x0F, 0x20, 0}, - {0x10, 0, 0}, - {0x11, 0x7c, 0}, - {0x12, 0x42, 0}, - {0x13, 0xbd, 0}, - {0x14, 0x7, 0}, - {0x15, 0x87, 0}, - {0x16, 0x8, 0}, - {0x17, 0x17, 0}, - {0x18, 0x7, 0}, - {0x19, 0, 0}, - {0x1A, 0x2, 0}, - {0x1B, 0x13, 0}, - {0x1C, 0x3e, 0}, - {0x1D, 0x3e, 0}, - {0x1E, 0x96, 0}, - {0x1F, 0x4, 0}, - {0x20, 0, 0}, - {0x21, 0, 0}, - {0x22, 0x17, 0}, - {0x23, 0x6, 0}, - {0x24, 0x1, 0}, - {0x25, 0x6, 0}, - {0x26, 0x4, 0}, - {0x27, 0xd, 0}, - {0x28, 0xd, 0}, - {0x29, 0x30, 0}, - {0x2A, 0x32, 0}, - {0x2B, 0x8, 0}, - {0x2C, 0x1c, 0}, - {0x2D, 0x2, 0}, - {0x2E, 0x4, 0}, - {0x2F, 0x7f, 0}, - {0x30, 0x27, 0}, - {0x31, 0, 1}, - {0x32, 0, 1}, - {0x33, 0, 1}, - {0x34, 0, 0}, - {0x35, 0x20, 0}, - {0x36, 0x18, 0}, - {0x37, 0x7, 0}, - {0x38, 0x66, 0}, - {0x39, 0x66, 0}, - {0x3A, 0x66, 0}, - {0x3B, 0x66, 0}, - {0x3C, 0xff, 0}, - {0x3D, 0xff, 0}, - {0x3E, 0xff, 0}, - {0x3F, 0xff, 0}, - {0x40, 0x16, 0}, - {0x41, 0x7, 0}, - {0x42, 0x19, 0}, - {0x43, 0x7, 0}, - {0x44, 0x6, 0}, - {0x45, 0x3, 0}, - {0x46, 0x1, 0}, - {0x47, 0x7, 0}, - {0x48, 0x33, 0}, - {0x49, 0x5, 0}, - {0x4A, 0x77, 0}, - {0x4B, 0x66, 0}, - {0x4C, 0x66, 0}, - {0x4D, 0, 0}, - {0x4E, 0x4, 0}, - {0x4F, 0xc, 0}, - {0x50, 0, 0}, - {0x51, 0x70, 1}, - {0x56, 0x7, 0}, - {0x57, 0, 0}, - {0x58, 0, 0}, - {0x59, 0x88, 1}, - {0x5A, 0, 0}, - {0x5B, 0x1f, 0}, - {0x5C, 0x20, 1}, - {0x5D, 0x1, 0}, - {0x5E, 0x30, 0}, - {0x5F, 0x70, 0}, - {0x60, 0, 0}, - {0x61, 0, 0}, - {0x62, 0x33, 1}, - {0x63, 0xf, 1}, - {0x64, 0x13, 1}, - {0x65, 0, 0}, - {0x66, 0xee, 1}, - {0x69, 0, 0}, - {0x6A, 0x7e, 0}, - {0x6B, 0x3f, 0}, - {0x6C, 0x7f, 0}, - {0x6D, 0x78, 0}, - {0x6E, 0x58, 1}, - {0x6F, 0x88, 0}, - {0x70, 0x8, 0}, - {0x71, 0xf, 0}, - {0x72, 0xbc, 0}, - {0x73, 0x8, 0}, - {0x74, 0x60, 0}, - {0x75, 0x13, 1}, - {0x76, 0x70, 0}, - {0x77, 0, 0}, - {0x78, 0, 0}, - {0x79, 0, 0}, - {0x7A, 0x33, 0}, - {0x7B, 0x13, 1}, - {0x7C, 0x14, 1}, - {0x7D, 0xee, 1}, - {0x80, 0x3c, 0}, - {0x81, 0x1, 1}, - {0x82, 0xa, 0}, - {0x83, 0x9d, 0}, - {0x84, 0xa, 0}, - {0x85, 0, 0}, - {0x86, 0x40, 0}, - {0x87, 0x40, 0}, - {0x88, 0x88, 0}, - {0x89, 0x10, 0}, - {0x8A, 0xf0, 0}, - {0x8B, 0x10, 0}, - {0x8C, 0xf0, 0}, - {0x8D, 0, 0}, - {0x8E, 0, 0}, - {0x8F, 0x10, 0}, - {0x90, 0x55, 0}, - {0x91, 0x3f, 1}, - {0x92, 0x36, 1}, - {0x93, 0, 0}, - {0x94, 0, 0}, - {0x95, 0, 0}, - {0x96, 0x87, 0}, - {0x97, 0x11, 0}, - {0x98, 0, 0}, - {0x99, 0x33, 0}, - {0x9A, 0x88, 0}, - {0x9B, 0, 0}, - {0x9C, 0x87, 0}, - {0x9D, 0x11, 0}, - {0x9E, 0, 0}, - {0x9F, 0x33, 0}, - {0xA0, 0x88, 0}, - {0xA1, 0x20, 1}, - {0xA2, 0x3f, 0}, - {0xA3, 0x44, 0}, - {0xA4, 0x8c, 0}, - {0xA5, 0x6c, 0}, - {0xA6, 0x22, 0}, - {0xA7, 0xbe, 0}, - {0xA8, 0x55, 0}, - {0xAA, 0xc, 0}, - {0xAB, 0xaa, 0}, - {0xAC, 0x2, 0}, - {0xAD, 0, 0}, - {0xAE, 0x10, 0}, - {0xAF, 0x1, 0}, - {0xB0, 0, 0}, - {0xB1, 0, 0}, - {0xB2, 0x80, 0}, - {0xB3, 0x60, 0}, - {0xB4, 0x44, 0}, - {0xB5, 0x55, 0}, - {0xB6, 0x1, 0}, - {0xB7, 0x55, 0}, - {0xB8, 0x1, 0}, - {0xB9, 0x5, 0}, - {0xBA, 0x55, 0}, - {0xBB, 0x55, 0}, - {0xC1, 0, 0}, - {0xC2, 0, 0}, - {0xC3, 0, 0}, - {0xC4, 0, 0}, - {0xC5, 0, 0}, - {0xC6, 0, 0}, - {0xC7, 0, 0}, - {0xC8, 0, 0}, - {0xC9, 0, 0}, - {0xCA, 0, 0}, - {0xCB, 0, 0}, - {0xCC, 0, 0}, - {0xCD, 0, 0}, - {0xCE, 0x5e, 0}, - {0xCF, 0xc, 0}, - {0xD0, 0xc, 0}, - {0xD1, 0xc, 0}, - {0xD2, 0, 0}, - {0xD3, 0x2b, 0}, - {0xD4, 0xc, 0}, - {0xD5, 0, 0}, - {0xD6, 0x70, 1}, - {0xDB, 0x7, 0}, - {0xDC, 0, 0}, - {0xDD, 0, 0}, - {0xDE, 0x88, 1}, - {0xDF, 0, 0}, - {0xE0, 0x1f, 0}, - {0xE1, 0x20, 1}, - {0xE2, 0x1, 0}, - {0xE3, 0x30, 0}, - {0xE4, 0x70, 0}, - {0xE5, 0, 0}, - {0xE6, 0, 0}, - {0xE7, 0x33, 0}, - {0xE8, 0xf, 1}, - {0xE9, 0x13, 1}, - {0xEA, 0, 0}, - {0xEB, 0xee, 1}, - {0xEE, 0, 0}, - {0xEF, 0x7e, 0}, - {0xF0, 0x3f, 0}, - {0xF1, 0x7f, 0}, - {0xF2, 0x78, 0}, - {0xF3, 0x58, 1}, - {0xF4, 0x88, 0}, - {0xF5, 0x8, 0}, - {0xF6, 0xf, 0}, - {0xF7, 0xbc, 0}, - {0xF8, 0x8, 0}, - {0xF9, 0x60, 0}, - {0xFA, 0x13, 1}, - {0xFB, 0x70, 0}, - {0xFC, 0, 0}, - {0xFD, 0, 0}, - {0xFE, 0, 0}, - {0xFF, 0x33, 0}, - {0x100, 0x13, 1}, - {0x101, 0x14, 1}, - {0x102, 0xee, 1}, - {0x105, 0x3c, 0}, - {0x106, 0x1, 1}, - {0x107, 0xa, 0}, - {0x108, 0x9d, 0}, - {0x109, 0xa, 0}, - {0x10A, 0, 0}, - {0x10B, 0x40, 0}, - {0x10C, 0x40, 0}, - {0x10D, 0x88, 0}, - {0x10E, 0x10, 0}, - {0x10F, 0xf0, 0}, - {0x110, 0x10, 0}, - {0x111, 0xf0, 0}, - {0x112, 0, 0}, - {0x113, 0, 0}, - {0x114, 0x10, 0}, - {0x115, 0x55, 0}, - {0x116, 0x3f, 1}, - {0x117, 0x36, 1}, - {0x118, 0, 0}, - {0x119, 0, 0}, - {0x11A, 0, 0}, - {0x11B, 0x87, 0}, - {0x11C, 0x11, 0}, - {0x11D, 0, 0}, - {0x11E, 0x33, 0}, - {0x11F, 0x88, 0}, - {0x120, 0, 0}, - {0x121, 0x87, 0}, - {0x122, 0x11, 0}, - {0x123, 0, 0}, - {0x124, 0x33, 0}, - {0x125, 0x88, 0}, - {0x126, 0x20, 1}, - {0x127, 0x3f, 0}, - {0x128, 0x44, 0}, - {0x129, 0x8c, 0}, - {0x12A, 0x6c, 0}, - {0x12B, 0x22, 0}, - {0x12C, 0xbe, 0}, - {0x12D, 0x55, 0}, - {0x12F, 0xc, 0}, - {0x130, 0xaa, 0}, - {0x131, 0x2, 0}, - {0x132, 0, 0}, - {0x133, 0x10, 0}, - {0x134, 0x1, 0}, - {0x135, 0, 0}, - {0x136, 0, 0}, - {0x137, 0x80, 0}, - {0x138, 0x60, 0}, - {0x139, 0x44, 0}, - {0x13A, 0x55, 0}, - {0x13B, 0x1, 0}, - {0x13C, 0x55, 0}, - {0x13D, 0x1, 0}, - {0x13E, 0x5, 0}, - {0x13F, 0x55, 0}, - {0x140, 0x55, 0}, - {0x146, 0, 0}, - {0x147, 0, 0}, - {0x148, 0, 0}, - {0x149, 0, 0}, - {0x14A, 0, 0}, - {0x14B, 0, 0}, - {0x14C, 0, 0}, - {0x14D, 0, 0}, - {0x14E, 0, 0}, - {0x14F, 0, 0}, - {0x150, 0, 0}, - {0x151, 0, 0}, - {0x154, 0xc, 0}, - {0x155, 0xc, 0}, - {0x156, 0xc, 0}, - {0x157, 0, 0}, - {0x158, 0x2b, 0}, - {0x159, 0x84, 0}, - {0x15A, 0x15, 0}, - {0x15B, 0xf, 0}, - {0x15C, 0, 0}, - {0x15D, 0, 0}, - {0x15E, 0, 1}, - {0x15F, 0, 1}, - {0x160, 0, 1}, - {0x161, 0, 1}, - {0x162, 0, 1}, - {0x163, 0, 1}, - {0x164, 0, 0}, - {0x165, 0, 0}, - {0x166, 0, 0}, - {0x167, 0, 0}, - {0x168, 0, 0}, - {0x169, 0, 0}, - {0x16A, 0, 1}, - {0x16B, 0, 1}, - {0x16C, 0, 1}, - {0x16D, 0, 0}, - {0x170, 0, 0}, - {0x171, 0x77, 0}, - {0x172, 0x77, 0}, - {0x173, 0x77, 0}, - {0x174, 0x77, 0}, - {0x175, 0, 0}, - {0x176, 0x3, 0}, - {0x177, 0x37, 0}, - {0x178, 0x3, 0}, - {0x179, 0, 0}, - {0x17A, 0x21, 0}, - {0x17B, 0x21, 0}, - {0x17C, 0, 0}, - {0x17D, 0xaa, 0}, - {0x17E, 0, 0}, - {0x17F, 0xaa, 0}, - {0x180, 0, 0}, - {0x190, 0, 0}, - {0x191, 0x77, 0}, - {0x192, 0x77, 0}, - {0x193, 0x77, 0}, - {0x194, 0x77, 0}, - {0x195, 0, 0}, - {0x196, 0x3, 0}, - {0x197, 0x37, 0}, - {0x198, 0x3, 0}, - {0x199, 0, 0}, - {0x19A, 0x21, 0}, - {0x19B, 0x21, 0}, - {0x19C, 0, 0}, - {0x19D, 0xaa, 0}, - {0x19E, 0, 0}, - {0x19F, 0xaa, 0}, - {0x1A0, 0, 0}, - {0x1A1, 0x2, 0}, - {0x1A2, 0xf, 0}, - {0x1A3, 0xf, 0}, - {0x1A4, 0, 1}, - {0x1A5, 0, 1}, - {0x1A6, 0, 1}, - {0x1A7, 0x2, 0}, - {0x1A8, 0xf, 0}, - {0x1A9, 0xf, 0}, - {0x1AA, 0, 1}, - {0x1AB, 0, 1}, - {0x1AC, 0, 1}, - {0x1AD, 0x84, 0}, - {0x1AE, 0x60, 0}, - {0x1AF, 0x47, 0}, - {0x1B0, 0x47, 0}, - {0x1B1, 0, 0}, - {0x1B2, 0, 0}, - {0x1B3, 0, 0}, - {0x1B4, 0, 0}, - {0x1B5, 0, 0}, - {0x1B6, 0, 0}, - {0x1B7, 0x5, 1}, - {0x1B8, 0, 0}, - {0x1B9, 0, 0}, - {0x1BA, 0, 0}, - {0x1BB, 0, 0}, - {0x1BC, 0, 0}, - {0x1BD, 0, 0}, - {0x1BE, 0, 0}, - {0x1BF, 0, 0}, - {0x1C0, 0, 0}, - {0x1C1, 0, 0}, - {0x1C2, 0xa0, 1}, - {0x1C3, 0, 0}, - {0x1C4, 0, 0}, - {0x1C5, 0, 0}, - {0x1C6, 0, 0}, - {0x1C7, 0, 0}, - {0x1C8, 0, 0}, - {0x1C9, 0, 0}, - {0x1CA, 0, 0}, - {0xFFFF, 0, 0} -}; - -radio_20xx_regs_t regs_2057_rev8[] = { - {0x00, 0x8, 1}, - {0x01, 0x57, 1}, - {0x02, 0x20, 1}, - {0x03, 0x1f, 0}, - {0x04, 0x4, 0}, - {0x05, 0x2, 0}, - {0x06, 0x1, 0}, - {0x07, 0x1, 0}, - {0x08, 0x1, 0}, - {0x09, 0x69, 0}, - {0x0A, 0x66, 0}, - {0x0B, 0x6, 0}, - {0x0C, 0x18, 0}, - {0x0D, 0x3, 0}, - {0x0E, 0x20, 0}, - {0x0F, 0x20, 0}, - {0x10, 0, 0}, - {0x11, 0x7c, 0}, - {0x12, 0x42, 0}, - {0x13, 0xbd, 0}, - {0x14, 0x7, 0}, - {0x15, 0x87, 0}, - {0x16, 0x8, 0}, - {0x17, 0x17, 0}, - {0x18, 0x7, 0}, - {0x19, 0, 0}, - {0x1A, 0x2, 0}, - {0x1B, 0x13, 0}, - {0x1C, 0x3e, 0}, - {0x1D, 0x3e, 0}, - {0x1E, 0x96, 0}, - {0x1F, 0x4, 0}, - {0x20, 0, 0}, - {0x21, 0, 0}, - {0x22, 0x17, 0}, - {0x23, 0x6, 0}, - {0x24, 0x1, 0}, - {0x25, 0x6, 0}, - {0x26, 0x4, 0}, - {0x27, 0xd, 0}, - {0x28, 0xd, 0}, - {0x29, 0x30, 0}, - {0x2A, 0x32, 0}, - {0x2B, 0x8, 0}, - {0x2C, 0x1c, 0}, - {0x2D, 0x2, 0}, - {0x2E, 0x4, 0}, - {0x2F, 0x7f, 0}, - {0x30, 0x27, 0}, - {0x31, 0, 1}, - {0x32, 0, 1}, - {0x33, 0, 1}, - {0x34, 0, 0}, - {0x35, 0x20, 0}, - {0x36, 0x18, 0}, - {0x37, 0x7, 0}, - {0x38, 0x66, 0}, - {0x39, 0x66, 0}, - {0x3A, 0x66, 0}, - {0x3B, 0x66, 0}, - {0x3C, 0xff, 0}, - {0x3D, 0xff, 0}, - {0x3E, 0xff, 0}, - {0x3F, 0xff, 0}, - {0x40, 0x16, 0}, - {0x41, 0x7, 0}, - {0x42, 0x19, 0}, - {0x43, 0x7, 0}, - {0x44, 0x6, 0}, - {0x45, 0x3, 0}, - {0x46, 0x1, 0}, - {0x47, 0x7, 0}, - {0x48, 0x33, 0}, - {0x49, 0x5, 0}, - {0x4A, 0x77, 0}, - {0x4B, 0x66, 0}, - {0x4C, 0x66, 0}, - {0x4D, 0, 0}, - {0x4E, 0x4, 0}, - {0x4F, 0xc, 0}, - {0x50, 0, 0}, - {0x51, 0x70, 1}, - {0x56, 0x7, 0}, - {0x57, 0, 0}, - {0x58, 0, 0}, - {0x59, 0x88, 1}, - {0x5A, 0, 0}, - {0x5B, 0x1f, 0}, - {0x5C, 0x20, 1}, - {0x5D, 0x1, 0}, - {0x5E, 0x30, 0}, - {0x5F, 0x70, 0}, - {0x60, 0, 0}, - {0x61, 0, 0}, - {0x62, 0x33, 1}, - {0x63, 0xf, 1}, - {0x64, 0xf, 1}, - {0x65, 0, 0}, - {0x66, 0x11, 0}, - {0x69, 0, 0}, - {0x6A, 0x7e, 0}, - {0x6B, 0x3f, 0}, - {0x6C, 0x7f, 0}, - {0x6D, 0x78, 0}, - {0x6E, 0x58, 1}, - {0x6F, 0x88, 0}, - {0x70, 0x8, 0}, - {0x71, 0xf, 0}, - {0x72, 0xbc, 0}, - {0x73, 0x8, 0}, - {0x74, 0x60, 0}, - {0x75, 0x13, 1}, - {0x76, 0x70, 0}, - {0x77, 0, 0}, - {0x78, 0, 0}, - {0x79, 0, 0}, - {0x7A, 0x33, 0}, - {0x7B, 0x13, 1}, - {0x7C, 0xf, 1}, - {0x7D, 0xee, 1}, - {0x80, 0x3c, 0}, - {0x81, 0x1, 1}, - {0x82, 0xa, 0}, - {0x83, 0x9d, 0}, - {0x84, 0xa, 0}, - {0x85, 0, 0}, - {0x86, 0x40, 0}, - {0x87, 0x40, 0}, - {0x88, 0x88, 0}, - {0x89, 0x10, 0}, - {0x8A, 0xf0, 0}, - {0x8B, 0x10, 0}, - {0x8C, 0xf0, 0}, - {0x8D, 0, 0}, - {0x8E, 0, 0}, - {0x8F, 0x10, 0}, - {0x90, 0x55, 0}, - {0x91, 0x3f, 1}, - {0x92, 0x36, 1}, - {0x93, 0, 0}, - {0x94, 0, 0}, - {0x95, 0, 0}, - {0x96, 0x87, 0}, - {0x97, 0x11, 0}, - {0x98, 0, 0}, - {0x99, 0x33, 0}, - {0x9A, 0x88, 0}, - {0x9B, 0, 0}, - {0x9C, 0x87, 0}, - {0x9D, 0x11, 0}, - {0x9E, 0, 0}, - {0x9F, 0x33, 0}, - {0xA0, 0x88, 0}, - {0xA1, 0x20, 1}, - {0xA2, 0x3f, 0}, - {0xA3, 0x44, 0}, - {0xA4, 0x8c, 0}, - {0xA5, 0x6c, 0}, - {0xA6, 0x22, 0}, - {0xA7, 0xbe, 0}, - {0xA8, 0x55, 0}, - {0xAA, 0xc, 0}, - {0xAB, 0xaa, 0}, - {0xAC, 0x2, 0}, - {0xAD, 0, 0}, - {0xAE, 0x10, 0}, - {0xAF, 0x1, 0}, - {0xB0, 0, 0}, - {0xB1, 0, 0}, - {0xB2, 0x80, 0}, - {0xB3, 0x60, 0}, - {0xB4, 0x44, 0}, - {0xB5, 0x55, 0}, - {0xB6, 0x1, 0}, - {0xB7, 0x55, 0}, - {0xB8, 0x1, 0}, - {0xB9, 0x5, 0}, - {0xBA, 0x55, 0}, - {0xBB, 0x55, 0}, - {0xC1, 0, 0}, - {0xC2, 0, 0}, - {0xC3, 0, 0}, - {0xC4, 0, 0}, - {0xC5, 0, 0}, - {0xC6, 0, 0}, - {0xC7, 0, 0}, - {0xC8, 0, 0}, - {0xC9, 0x1, 1}, - {0xCA, 0, 0}, - {0xCB, 0, 0}, - {0xCC, 0, 0}, - {0xCD, 0, 0}, - {0xCE, 0x5e, 0}, - {0xCF, 0xc, 0}, - {0xD0, 0xc, 0}, - {0xD1, 0xc, 0}, - {0xD2, 0, 0}, - {0xD3, 0x2b, 0}, - {0xD4, 0xc, 0}, - {0xD5, 0, 0}, - {0xD6, 0x70, 1}, - {0xDB, 0x7, 0}, - {0xDC, 0, 0}, - {0xDD, 0, 0}, - {0xDE, 0x88, 1}, - {0xDF, 0, 0}, - {0xE0, 0x1f, 0}, - {0xE1, 0x20, 1}, - {0xE2, 0x1, 0}, - {0xE3, 0x30, 0}, - {0xE4, 0x70, 0}, - {0xE5, 0, 0}, - {0xE6, 0, 0}, - {0xE7, 0x33, 0}, - {0xE8, 0xf, 1}, - {0xE9, 0xf, 1}, - {0xEA, 0, 0}, - {0xEB, 0x11, 0}, - {0xEE, 0, 0}, - {0xEF, 0x7e, 0}, - {0xF0, 0x3f, 0}, - {0xF1, 0x7f, 0}, - {0xF2, 0x78, 0}, - {0xF3, 0x58, 1}, - {0xF4, 0x88, 0}, - {0xF5, 0x8, 0}, - {0xF6, 0xf, 0}, - {0xF7, 0xbc, 0}, - {0xF8, 0x8, 0}, - {0xF9, 0x60, 0}, - {0xFA, 0x13, 1}, - {0xFB, 0x70, 0}, - {0xFC, 0, 0}, - {0xFD, 0, 0}, - {0xFE, 0, 0}, - {0xFF, 0x33, 0}, - {0x100, 0x13, 1}, - {0x101, 0xf, 1}, - {0x102, 0xee, 1}, - {0x105, 0x3c, 0}, - {0x106, 0x1, 1}, - {0x107, 0xa, 0}, - {0x108, 0x9d, 0}, - {0x109, 0xa, 0}, - {0x10A, 0, 0}, - {0x10B, 0x40, 0}, - {0x10C, 0x40, 0}, - {0x10D, 0x88, 0}, - {0x10E, 0x10, 0}, - {0x10F, 0xf0, 0}, - {0x110, 0x10, 0}, - {0x111, 0xf0, 0}, - {0x112, 0, 0}, - {0x113, 0, 0}, - {0x114, 0x10, 0}, - {0x115, 0x55, 0}, - {0x116, 0x3f, 1}, - {0x117, 0x36, 1}, - {0x118, 0, 0}, - {0x119, 0, 0}, - {0x11A, 0, 0}, - {0x11B, 0x87, 0}, - {0x11C, 0x11, 0}, - {0x11D, 0, 0}, - {0x11E, 0x33, 0}, - {0x11F, 0x88, 0}, - {0x120, 0, 0}, - {0x121, 0x87, 0}, - {0x122, 0x11, 0}, - {0x123, 0, 0}, - {0x124, 0x33, 0}, - {0x125, 0x88, 0}, - {0x126, 0x20, 1}, - {0x127, 0x3f, 0}, - {0x128, 0x44, 0}, - {0x129, 0x8c, 0}, - {0x12A, 0x6c, 0}, - {0x12B, 0x22, 0}, - {0x12C, 0xbe, 0}, - {0x12D, 0x55, 0}, - {0x12F, 0xc, 0}, - {0x130, 0xaa, 0}, - {0x131, 0x2, 0}, - {0x132, 0, 0}, - {0x133, 0x10, 0}, - {0x134, 0x1, 0}, - {0x135, 0, 0}, - {0x136, 0, 0}, - {0x137, 0x80, 0}, - {0x138, 0x60, 0}, - {0x139, 0x44, 0}, - {0x13A, 0x55, 0}, - {0x13B, 0x1, 0}, - {0x13C, 0x55, 0}, - {0x13D, 0x1, 0}, - {0x13E, 0x5, 0}, - {0x13F, 0x55, 0}, - {0x140, 0x55, 0}, - {0x146, 0, 0}, - {0x147, 0, 0}, - {0x148, 0, 0}, - {0x149, 0, 0}, - {0x14A, 0, 0}, - {0x14B, 0, 0}, - {0x14C, 0, 0}, - {0x14D, 0, 0}, - {0x14E, 0x1, 1}, - {0x14F, 0, 0}, - {0x150, 0, 0}, - {0x151, 0, 0}, - {0x154, 0xc, 0}, - {0x155, 0xc, 0}, - {0x156, 0xc, 0}, - {0x157, 0, 0}, - {0x158, 0x2b, 0}, - {0x159, 0x84, 0}, - {0x15A, 0x15, 0}, - {0x15B, 0xf, 0}, - {0x15C, 0, 0}, - {0x15D, 0, 0}, - {0x15E, 0, 1}, - {0x15F, 0, 1}, - {0x160, 0, 1}, - {0x161, 0, 1}, - {0x162, 0, 1}, - {0x163, 0, 1}, - {0x164, 0, 0}, - {0x165, 0, 0}, - {0x166, 0, 0}, - {0x167, 0, 0}, - {0x168, 0, 0}, - {0x169, 0, 0}, - {0x16A, 0, 1}, - {0x16B, 0, 1}, - {0x16C, 0, 1}, - {0x16D, 0, 0}, - {0x170, 0, 0}, - {0x171, 0x77, 0}, - {0x172, 0x77, 0}, - {0x173, 0x77, 0}, - {0x174, 0x77, 0}, - {0x175, 0, 0}, - {0x176, 0x3, 0}, - {0x177, 0x37, 0}, - {0x178, 0x3, 0}, - {0x179, 0, 0}, - {0x17A, 0x21, 0}, - {0x17B, 0x21, 0}, - {0x17C, 0, 0}, - {0x17D, 0xaa, 0}, - {0x17E, 0, 0}, - {0x17F, 0xaa, 0}, - {0x180, 0, 0}, - {0x190, 0, 0}, - {0x191, 0x77, 0}, - {0x192, 0x77, 0}, - {0x193, 0x77, 0}, - {0x194, 0x77, 0}, - {0x195, 0, 0}, - {0x196, 0x3, 0}, - {0x197, 0x37, 0}, - {0x198, 0x3, 0}, - {0x199, 0, 0}, - {0x19A, 0x21, 0}, - {0x19B, 0x21, 0}, - {0x19C, 0, 0}, - {0x19D, 0xaa, 0}, - {0x19E, 0, 0}, - {0x19F, 0xaa, 0}, - {0x1A0, 0, 0}, - {0x1A1, 0x2, 0}, - {0x1A2, 0xf, 0}, - {0x1A3, 0xf, 0}, - {0x1A4, 0, 1}, - {0x1A5, 0, 1}, - {0x1A6, 0, 1}, - {0x1A7, 0x2, 0}, - {0x1A8, 0xf, 0}, - {0x1A9, 0xf, 0}, - {0x1AA, 0, 1}, - {0x1AB, 0, 1}, - {0x1AC, 0, 1}, - {0x1AD, 0x84, 0}, - {0x1AE, 0x60, 0}, - {0x1AF, 0x47, 0}, - {0x1B0, 0x47, 0}, - {0x1B1, 0, 0}, - {0x1B2, 0, 0}, - {0x1B3, 0, 0}, - {0x1B4, 0, 0}, - {0x1B5, 0, 0}, - {0x1B6, 0, 0}, - {0x1B7, 0x5, 1}, - {0x1B8, 0, 0}, - {0x1B9, 0, 0}, - {0x1BA, 0, 0}, - {0x1BB, 0, 0}, - {0x1BC, 0, 0}, - {0x1BD, 0, 0}, - {0x1BE, 0, 0}, - {0x1BF, 0, 0}, - {0x1C0, 0, 0}, - {0x1C1, 0, 0}, - {0x1C2, 0xa0, 1}, - {0x1C3, 0, 0}, - {0x1C4, 0, 0}, - {0x1C5, 0, 0}, - {0x1C6, 0, 0}, - {0x1C7, 0, 0}, - {0x1C8, 0, 0}, - {0x1C9, 0, 0}, - {0x1CA, 0, 0}, - {0xFFFF, 0, 0} -}; - -static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; - -static s32 nphy_lnagain_est0[] = { -315, 40370 }; -static s32 nphy_lnagain_est1[] = { -224, 23242 }; - -static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { - { - {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, - {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, - {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, - {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, - {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, - {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, - {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, - {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, - {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} - }, - { - {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, - {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, - {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, - {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, - {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, - {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, - {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, - {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, - {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} - } -}; - -static const u32 nphy_tpc_txgain[] = { - 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, - 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, - 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, - 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, - 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, - 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, - 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, - 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, - 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, - 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, - 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, - 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, - 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, - 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, - 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, - 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, - 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, - 0x03902942, 0x03902844, 0x03902842, 0x03902744, - 0x03902742, 0x03902644, 0x03902642, 0x03902544, - 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, - 0x03802a42, 0x03802944, 0x03802942, 0x03802844, - 0x03802842, 0x03802744, 0x03802742, 0x03802644, - 0x03802642, 0x03802544, 0x03802542, 0x03802444, - 0x03802442, 0x03802344, 0x03802342, 0x03802244, - 0x03802242, 0x03802144, 0x03802142, 0x03802044, - 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, - 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, - 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, - 0x03801a42, 0x03801944, 0x03801942, 0x03801844, - 0x03801842, 0x03801744, 0x03801742, 0x03801644, - 0x03801642, 0x03801544, 0x03801542, 0x03801444, - 0x03801442, 0x03801344, 0x03801342, 0x00002b00 -}; - -static const u16 nphy_tpc_loscale[] = { - 256, 256, 271, 271, 287, 256, 256, 271, - 271, 287, 287, 304, 304, 256, 256, 271, - 271, 287, 287, 304, 304, 322, 322, 341, - 341, 362, 362, 383, 383, 256, 256, 271, - 271, 287, 287, 304, 304, 322, 322, 256, - 256, 271, 271, 287, 287, 304, 304, 322, - 322, 341, 341, 362, 362, 256, 256, 271, - 271, 287, 287, 304, 304, 322, 322, 256, - 256, 271, 271, 287, 287, 304, 304, 322, - 322, 341, 341, 362, 362, 256, 256, 271, - 271, 287, 287, 304, 304, 322, 322, 341, - 341, 362, 362, 383, 383, 406, 406, 430, - 430, 455, 455, 482, 482, 511, 511, 541, - 541, 573, 573, 607, 607, 643, 643, 681, - 681, 722, 722, 764, 764, 810, 810, 858, - 858, 908, 908, 962, 962, 1019, 1019, 256 -}; - -static u32 nphy_tpc_txgain_ipa[] = { - 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, - 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, - 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, - 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, - 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, - 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, - 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, - 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, - 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, - 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, - 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, - 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, - 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, - 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, - 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, - 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, - 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, - 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, - 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, - 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, - 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, - 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, - 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, - 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, - 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, - 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, - 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, - 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, - 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, - 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, - 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, - 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 -}; - -static u32 nphy_tpc_txgain_ipa_rev5[] = { - 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, - 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, - 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, - 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, - 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, - 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, - 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, - 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, - 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, - 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, - 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, - 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, - 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, - 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, - 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, - 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, - 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, - 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, - 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, - 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, - 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, - 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, - 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, - 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, - 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, - 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, - 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, - 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, - 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, - 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, - 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, - 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 -}; - -static u32 nphy_tpc_txgain_ipa_rev6[] = { - 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, - 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, - 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, - 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, - 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, - 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, - 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, - 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, - 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, - 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, - 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, - 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, - 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, - 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, - 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, - 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, - 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, - 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, - 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, - 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, - 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, - 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, - 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, - 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, - 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, - 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, - 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, - 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, - 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, - 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, - 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, - 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 -}; - -static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { - 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, - 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, - 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, - 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, - 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, - 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, - 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, - 0x70470028, 0x70470026, 0x70470024, 0x70470022, - 0x7047001f, 0x70370027, 0x70370024, 0x70370022, - 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, - 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, - 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, - 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, - 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, - 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, - 0x70170019, 0x70170018, 0x70170016, 0x70170015, - 0x70170014, 0x70170013, 0x70170012, 0x70170010, - 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, - 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, - 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, - 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, - 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, - 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, - 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, - 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, - 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, - 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, - 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, - 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, - 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, - 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, - 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 -}; - -static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { - 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, - 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, - 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, - 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, - 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, - 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, - 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, - 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, - 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, - 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, - 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, - 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, - 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, - 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, - 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, - 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, - 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, - 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, - 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, - 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, - 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, - 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, - 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, - 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, - 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, - 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, - 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, - 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, - 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, - 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, - 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, - 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 -}; - -static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { - 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, - 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, - 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, - 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, - 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, - 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, - 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, - 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, - 0x30270027, 0x30270025, 0x30270023, 0x301f002c, - 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, - 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, - 0x30170028, 0x30170026, 0x30170024, 0x30170022, - 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, - 0x3017001a, 0x30170018, 0x30170017, 0x30170015, - 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, - 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, - 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, - 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, - 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 -}; - -static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { - 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, - 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, - 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, - 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, - 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, - 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, - 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, - 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, - 0x30270027, 0x30270025, 0x30270023, 0x301f002c, - 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, - 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, - 0x30170028, 0x30170026, 0x30170024, 0x30170022, - 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, - 0x3017001a, 0x30170018, 0x30170017, 0x30170015, - 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, - 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, - 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, - 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, - 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, - 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 -}; - -static u32 nphy_tpc_txgain_ipa_5g[] = { - 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, - 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, - 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, - 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, - 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, - 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, - 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, - 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, - 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, - 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, - 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, - 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, - 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, - 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, - 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, - 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, - 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, - 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, - 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, - 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, - 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, - 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, - 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, - 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, - 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, - 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, - 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, - 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, - 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, - 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, - 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, - 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f -}; - -static u32 nphy_tpc_txgain_ipa_5g_2057[] = { - 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, - 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, - 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, - 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, - 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, - 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, - 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, - 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, - 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, - 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, - 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, - 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, - 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, - 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, - 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, - 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, - 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, - 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, - 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, - 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, - 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, - 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, - 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, - 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, - 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, - 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, - 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, - 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, - 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, - 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, - 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, - 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 -}; - -static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { - 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, - 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, - 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, - 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, - 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, - 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, - 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, - 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, - 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, - 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, - 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, - 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, - 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, - 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, - 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, - 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, - 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, - 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, - 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, - 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, - 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, - 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, - 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, - 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, - 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, - 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, - 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, - 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, - 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, - 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, - 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, - 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 -}; - -static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { - -114, -108, -98, -91, -84, -78, -70, -62, - -54, -46, -39, -31, -23, -15, -8, 0 -}; - -static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { - -100, -95, -89, -83, -77, -70, -63, -56, - -48, -41, -33, -25, -19, -12, -6, 0 -}; - -static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { - -159, -113, -86, -72, -62, -54, -48, -43, - -39, -35, -31, -28, -25, -23, -20, -18, - -17, -15, -13, -11, -10, -8, -7, -6, - -5, -4, -3, -3, -2, -1, -1, 0 -}; - -static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { - -109, -109, -82, -68, -58, -50, -44, -39, - -35, -31, -28, -26, -23, -21, -19, -17, - -16, -14, -13, -11, -10, -9, -8, -7, - -5, -5, -4, -3, -2, -1, -1, 0 -}; - -static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { - -122, -122, -95, -80, -69, -61, -54, -49, - -43, -39, -35, -32, -28, -26, -23, -21, - -18, -16, -15, -13, -11, -10, -8, -7, - -6, -5, -4, -3, -2, -1, -1, 0 -}; - -static s8 nphy_papd_pgagain_dlt_5g_2057[] = { - -107, -101, -92, -85, -78, -71, -62, -55, - -47, -39, -32, -24, -19, -12, -6, 0 -}; - -static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { - -110, -104, -95, -88, -81, -74, -66, -58, - -50, -44, -36, -28, -23, -15, -8, 0 -}; - -static u8 pad_gain_codes_used_2057rev5[] = { - 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, - 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 -}; - -static u8 pad_gain_codes_used_2057rev7[] = { - 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, - 5, 4, 3, 2, 1 -}; - -static u8 pad_all_gain_codes_2057[] = { - 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, - 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, - 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, - 1, 0 -}; - -static u8 pga_all_gain_codes_2057[] = { - 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 -}; - -static u32 nphy_papd_scaltbl[] = { - 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, - 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, - 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, - 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, - 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, - 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, - 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, - 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, - 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, - 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, - 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, - 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, - 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, - 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, - 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, - 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 -}; - -static u32 nphy_tpc_txgain_rev3[] = { - 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, - 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, - 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, - 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, - 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, - 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, - 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, - 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, - 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, - 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, - 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, - 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, - 0x19410044, 0x19410042, 0x19410040, 0x1941003e, - 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, - 0x18410044, 0x18410042, 0x18410040, 0x1841003e, - 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, - 0x17410044, 0x17410042, 0x17410040, 0x1741003e, - 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, - 0x16410044, 0x16410042, 0x16410040, 0x1641003e, - 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, - 0x15410044, 0x15410042, 0x15410040, 0x1541003e, - 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, - 0x14410044, 0x14410042, 0x14410040, 0x1441003e, - 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, - 0x13410044, 0x13410042, 0x13410040, 0x1341003e, - 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, - 0x12410044, 0x12410042, 0x12410040, 0x1241003e, - 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, - 0x11410044, 0x11410042, 0x11410040, 0x1141003e, - 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, - 0x10410044, 0x10410042, 0x10410040, 0x1041003e, - 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 -}; - -static u32 nphy_tpc_txgain_HiPwrEPA[] = { - 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, - 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, - 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, - 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, - 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, - 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, - 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, - 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, - 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, - 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, - 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, - 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, - 0x09410044, 0x09410042, 0x09410040, 0x0941003e, - 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, - 0x08410044, 0x08410042, 0x08410040, 0x0841003e, - 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, - 0x07410044, 0x07410042, 0x07410040, 0x0741003e, - 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, - 0x06410044, 0x06410042, 0x06410040, 0x0641003e, - 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, - 0x05410044, 0x05410042, 0x05410040, 0x0541003e, - 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, - 0x04410044, 0x04410042, 0x04410040, 0x0441003e, - 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, - 0x03410044, 0x03410042, 0x03410040, 0x0341003e, - 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, - 0x02410044, 0x02410042, 0x02410040, 0x0241003e, - 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, - 0x01410044, 0x01410042, 0x01410040, 0x0141003e, - 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, - 0x00410044, 0x00410042, 0x00410040, 0x0041003e, - 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 -}; - -static u32 nphy_tpc_txgain_epa_2057rev3[] = { - 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, - 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, - 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, - 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, - 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, - 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, - 0x80390038, 0x80390035, 0x8031003a, 0x80310036, - 0x80310033, 0x8029003a, 0x80290037, 0x80290034, - 0x80290031, 0x80210039, 0x80210036, 0x80210033, - 0x80210030, 0x8019003c, 0x80190039, 0x80190036, - 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, - 0x80190028, 0x8011003a, 0x80110036, 0x80110033, - 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, - 0x80110027, 0x80110024, 0x80110022, 0x80110020, - 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, - 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, - 0x80090029, 0x80090027, 0x80090025, 0x80090023, - 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, - 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, - 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, - 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d -}; - -static u32 nphy_tpc_txgain_epa_2057rev5[] = { - 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, - 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, - 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, - 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, - 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, - 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, - 0x10390038, 0x10390035, 0x1031003a, 0x10310036, - 0x10310033, 0x1029003a, 0x10290037, 0x10290034, - 0x10290031, 0x10210039, 0x10210036, 0x10210033, - 0x10210030, 0x1019003c, 0x10190039, 0x10190036, - 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, - 0x10190028, 0x1011003a, 0x10110036, 0x10110033, - 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, - 0x10110027, 0x10110024, 0x10110022, 0x10110020, - 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, - 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, - 0x10090029, 0x10090027, 0x10090025, 0x10090023, - 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, - 0x1009001a, 0x10090018, 0x10090017, 0x10090016, - 0x10090015, 0x10090013, 0x10090012, 0x10090011, - 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, - 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, - 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, - 0x10090008, 0x10090008, 0x10090007, 0x10090007, - 0x10090007, 0x10090006, 0x10090006, 0x10090005, - 0x10090005, 0x10090005, 0x10090005, 0x10090004, - 0x10090004, 0x10090004, 0x10090004, 0x10090003, - 0x10090003, 0x10090003, 0x10090003, 0x10090003, - 0x10090003, 0x10090002, 0x10090002, 0x10090002, - 0x10090002, 0x10090002, 0x10090002, 0x10090002, - 0x10090002, 0x10090002, 0x10090001, 0x10090001, - 0x10090001, 0x10090001, 0x10090001, 0x10090001 -}; - -static u32 nphy_tpc_5GHz_txgain_rev3[] = { - 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, - 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, - 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, - 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, - 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, - 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, - 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, - 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, - 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, - 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, - 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, - 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, - 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, - 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, - 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, - 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, - 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, - 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, - 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, - 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, - 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, - 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, - 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, - 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, - 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, - 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, - 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, - 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, - 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, - 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, - 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, - 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 -}; - -static u32 nphy_tpc_5GHz_txgain_rev4[] = { - 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, - 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, - 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, - 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, - 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, - 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, - 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, - 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, - 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, - 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, - 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, - 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, - 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, - 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, - 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, - 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, - 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, - 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, - 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, - 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, - 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, - 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, - 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, - 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, - 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, - 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, - 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, - 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, - 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, - 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, - 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, - 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 -}; - -static u32 nphy_tpc_5GHz_txgain_rev5[] = { - 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, - 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, - 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, - 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, - 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, - 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, - 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, - 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, - 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, - 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, - 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, - 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, - 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, - 0x09620039, 0x09620037, 0x09620035, 0x09620033, - 0x08620044, 0x08620042, 0x08620040, 0x0862003e, - 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, - 0x07620043, 0x07620042, 0x07620040, 0x0762003f, - 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, - 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, - 0x06620039, 0x06620037, 0x06620035, 0x06620033, - 0x05620046, 0x05620044, 0x05620042, 0x05620040, - 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, - 0x04620044, 0x04620042, 0x04620040, 0x0462003e, - 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, - 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, - 0x03620038, 0x03620037, 0x03620035, 0x03620033, - 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, - 0x02620046, 0x02620044, 0x02620043, 0x02620042, - 0x0162004a, 0x01620048, 0x01620046, 0x01620044, - 0x01620043, 0x01620042, 0x01620041, 0x01620040, - 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, - 0x0062003b, 0x00620039, 0x00620037, 0x00620035 -}; - -static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { - 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, - 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, - 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, - 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, - 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, - 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, - 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, - 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, - 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, - 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, - 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, - 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, - 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, - 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, - 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, - 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, - 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, - 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, - 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, - 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, - 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, - 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, - 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, - 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, - 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, - 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, - 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, - 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, - 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, - 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, - 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, - 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 -}; - -static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; -static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; -static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { - 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a }; -static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { - 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 }; - -static bool wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, - chan_info_nphy_radio2057_t **t0, - chan_info_nphy_radio205x_t **t1, - chan_info_nphy_radio2057_rev5_t **t2, - chan_info_nphy_2055_t **t3); -static void wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chans, - const nphy_sfo_cfg_t *c); - -static void wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, - u16 reduction_factr); -static void wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *, - u32 *buf); -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr); -static void wlc_phy_txlpfbw_nphy(phy_info_t *pi); -static void wlc_phy_spurwar_nphy(phy_info_t *pi); - -static void wlc_phy_radio_preinit_2055(phy_info_t *pi); -static void wlc_phy_radio_init_2055(phy_info_t *pi); -static void wlc_phy_radio_postinit_2055(phy_info_t *pi); -static void wlc_phy_radio_preinit_205x(phy_info_t *pi); -static void wlc_phy_radio_init_2056(phy_info_t *pi); -static void wlc_phy_radio_postinit_2056(phy_info_t *pi); -static void wlc_phy_radio_init_2057(phy_info_t *pi); -static void wlc_phy_radio_postinit_2057(phy_info_t *pi); -static void wlc_phy_workarounds_nphy(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi); -static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi); - -static void wlc_phy_restore_rssical_nphy(phy_info_t *pi); -static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi); -static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi); -static int wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t tg, - u8 type, bool d); -static void wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rxcore, - u16 *rg, u8 type); -static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble); -static void wlc_phy_savecal_nphy(phy_info_t *pi); -static void wlc_phy_restorecal_nphy(phy_info_t *pi); -static void wlc_phy_resetcca_nphy(phy_info_t *pi); - -static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi); -static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi); -static void wlc_phy_precal_txgain_nphy(phy_info_t *pi); -static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core); - -static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi); -static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi); -static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi); -static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi); -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1); -static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi); - -static void wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32, - u32 e); -static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core); -static void wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *, - phy_cal_mode_t, u8); -static void wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, - nphy_papd_restore_state *state); -static void wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, - nphy_papd_restore_state *state, u8); - -static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals); - -static void wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *evts, - u8 *dlys, u8 len); - -static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset); - -static void -wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, - u8 core_mask, u8 off, - u8 override_id); - -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type); -static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi); - -static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi); -static void wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, - u16 *pwr_offset, - u8 tmp_max_pwr, u8 rate_start, - u8 rate_end); - -static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi); - -static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi); -static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core); -static void wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, - u8 idx1); -static void wlc_phy_a4(phy_info_t *pi, bool full_cal); - -static u16 wlc_phy_radio205x_rcal(phy_info_t *pi); - -static u16 wlc_phy_radio2057_rccal(phy_info_t *pi); - -static u16 wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, - u16 max_val, - u8 dac_test_mode); -static void wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, - u16 num_samps); -static void wlc_phy_runsamples_nphy(phy_info_t *pi, u16 n, u16 lps, - u16 wait, u8 iq, u8 dac_test_mode, - bool modify_bbmult); - -bool wlc_phy_bist_check_phy(wlc_phy_t *pih) -{ - phy_info_t *pi = (phy_info_t *) pih; - u32 phybist0, phybist1, phybist2, phybist3, phybist4; - - if (NREV_GE(pi->pubpi.phy_rev, 16)) - return true; - - phybist0 = read_phy_reg(pi, 0x0e); - phybist1 = read_phy_reg(pi, 0x0f); - phybist2 = read_phy_reg(pi, 0xea); - phybist3 = read_phy_reg(pi, 0xeb); - phybist4 = read_phy_reg(pi, 0x156); - - if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && - (phybist3 == 0) && (phybist4 == 0)) { - return true; - } - - return false; -} - -static void WLBANDINITFN(wlc_phy_bphy_init_nphy) (phy_info_t *pi) -{ - u16 addr, val; - - val = 0x1e1f; - for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); - addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { - write_phy_reg(pi, addr, val); - if (addr == (NPHY_TO_BPHY_OFF + 0x97)) - val = 0x3e3f; - else - val -= 0x0202; - } - - if (NORADIO_ENAB(pi->pubpi)) { - - write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_PHYCRSTH, 0x3206); - - write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_RSSI_TRESH, 0x281e); - - or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_LNA_GAIN_RANGE, 0x1a); - - } else { - - write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); - } -} - -void -wlc_phy_table_write_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, - u32 width, const void *data) -{ - mimophytbl_info_t tbl; - - tbl.tbl_id = id; - tbl.tbl_len = len; - tbl.tbl_offset = offset; - tbl.tbl_width = width; - tbl.tbl_ptr = data; - wlc_phy_write_table_nphy(pi, &tbl); -} - -void -wlc_phy_table_read_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, - u32 width, void *data) -{ - mimophytbl_info_t tbl; - - tbl.tbl_id = id; - tbl.tbl_len = len; - tbl.tbl_offset = offset; - tbl.tbl_width = width; - tbl.tbl_ptr = data; - wlc_phy_read_table_nphy(pi, &tbl); -} - -static void WLBANDINITFN(wlc_phy_static_table_download_nphy) (phy_info_t *pi) -{ - uint idx; - - if (NREV_GE(pi->pubpi.phy_rev, 16)) { - for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev16[idx]); - } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev7[idx]); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3[idx]); - } else { - for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev0[idx]); - } -} - -static void WLBANDINITFN(wlc_phy_tbl_init_nphy) (phy_info_t *pi) -{ - uint idx = 0; - u8 antswctrllut; - - if (pi->phy_init_por) - wlc_phy_static_table_download_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? - pi->srom_fem2g.antswctrllut : pi->srom_fem5g.antswctrllut; - - switch (antswctrllut) { - case 0: - - break; - - case 1: - - if (pi->aa2g == 7) { - - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x21, 8, - &ant_sw_ctrl_tbl_rev8_2o3 - [0]); - } else { - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x21, 8, - &ant_sw_ctrl_tbl_rev8 - [0]); - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x25, 8, - &ant_sw_ctrl_tbl_rev8[2]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x29, 8, - &ant_sw_ctrl_tbl_rev8[4]); - break; - - case 2: - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x1, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core0 - [0]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x5, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core0 - [2]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x9, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core0 - [4]); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x21, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core1 - [0]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x25, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core1 - [2]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 2, 0x29, 8, - &ant_sw_ctrl_tbl_rev8_2057v7_core1 - [4]); - break; - - default: - break; - } - - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { - - if (idx == ANT_SWCTRL_TBL_REV3_IDX) { - antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? - pi->srom_fem2g.antswctrllut : pi-> - srom_fem5g.antswctrllut; - switch (antswctrllut) { - case 0: - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3_volatile - [idx]); - break; - case 1: - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3_volatile1 - [idx]); - break; - case 2: - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3_volatile2 - [idx]); - break; - case 3: - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3_volatile3 - [idx]); - break; - default: - break; - } - } else { - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev3_volatile - [idx]); - } - } - } else { - for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) { - wlc_phy_write_table_nphy(pi, - &mimophytbl_info_rev0_volatile - [idx]); - } - } -} - -static void -wlc_phy_write_txmacreg_nphy(phy_info_t *pi, u16 holdoff, u16 delay) -{ - write_phy_reg(pi, 0x77, holdoff); - write_phy_reg(pi, 0xb4, delay); -} - -void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs) -{ - u16 holdoff, delay; - - if (rifs) { - - holdoff = 0x10; - delay = 0x258; - } else { - - holdoff = 0x15; - delay = 0x320; - } - - wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); - - if (pi && pi->sh && (pi->sh->_rifs_phy != rifs)) { - pi->sh->_rifs_phy = rifs; - } -} - -bool wlc_phy_attach_nphy(phy_info_t *pi) -{ - uint i; - - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) { - pi->phyhang_avoid = true; - } - - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { - - pi->nphy_gband_spurwar_en = true; - - if (pi->sh->boardflags2 & BFL2_SPUR_WAR) { - pi->nphy_aband_spurwar_en = true; - } - } - if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { - - if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) { - pi->nphy_gband_spurwar2_en = true; - } - } - - pi->n_preamble_override = AUTO; - if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) - pi->n_preamble_override = WLC_N_PREAMBLE_MIXEDMODE; - - pi->nphy_txrx_chain = AUTO; - pi->phy_scraminit = AUTO; - - pi->nphy_rxcalparams = 0x010100B5; - - pi->nphy_perical = PHY_PERICAL_MPHASE; - pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; - pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; - - pi->nphy_gain_boost = true; - pi->nphy_elna_gain_config = false; - pi->radio_is_on = false; - - for (i = 0; i < pi->pubpi.phy_corenum; i++) { - pi->nphy_txpwrindex[i].index = AUTO; - } - - wlc_phy_txpwrctrl_config_nphy(pi); - if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) - pi->hwpwrctrl_capable = true; - - pi->pi_fptr.init = wlc_phy_init_nphy; - pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; - pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; - pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; - - if (!wlc_phy_txpwr_srom_read_nphy(pi)) - return false; - - return true; -} - -static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi) -{ - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - pi->nphy_txpwrctrl = PHY_TPC_HW_ON; - pi->phy_5g_pwrgain = true; - return; - } - - pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; - pi->phy_5g_pwrgain = false; - - if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && - NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) - pi->nphy_txpwrctrl = PHY_TPC_HW_ON; - else if ((pi->sh->sromrev >= 4) - && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) - pi->phy_5g_pwrgain = true; -} - -void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) -{ - u16 val; - u16 clip1_ths[2]; - nphy_txgains_t target_gain; - u8 tx_pwr_ctrl_state; - bool do_nphy_cal = false; - uint core; - uint origidx, intr_val; - d11regs_t *regs; - u32 d11_clk_ctl_st; - - core = 0; - - if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) { - pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; - } - - if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && - ((pi->sh->chippkg == BCM4717_PKG_ID) || - (pi->sh->chippkg == BCM4718_PKG_ID))) { - if ((pi->sh->boardflags & BFL_EXTLNA) && - (CHSPEC_IS2G(pi->radio_chanspec))) { - ai_corereg(pi->sh->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol), 0x40, - 0x40); - } - } - - if ((!PHY_IPA(pi)) && (pi->sh->chip == BCM5357_CHIP_ID)) { - si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA, - CCTRL5357_EXTPA); - } - - if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && - CHSPEC_IS40(pi->radio_chanspec)) { - - regs = (d11regs_t *) ai_switch_core(pi->sh->sih, D11_CORE_ID, - &origidx, &intr_val); - d11_clk_ctl_st = R_REG(®s->clk_ctl_st); - AND_REG(®s->clk_ctl_st, - ~(CCS_FORCEHT | CCS_HTAREQ)); - - W_REG(®s->clk_ctl_st, d11_clk_ctl_st); - - ai_restore_core(pi->sh->sih, origidx, intr_val); - } - - pi->use_int_tx_iqlo_cal_nphy = - (PHY_IPA(pi) || - (NREV_GE(pi->pubpi.phy_rev, 7) || - (NREV_GE(pi->pubpi.phy_rev, 5) - && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); - - pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; - - pi->nphy_deaf_count = 0; - - wlc_phy_tbl_init_nphy(pi); - - pi->nphy_crsminpwr_adjusted = false; - pi->nphy_noisevars_adjusted = false; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0xe7, 0); - write_phy_reg(pi, 0xec, 0); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_phy_reg(pi, 0x342, 0); - write_phy_reg(pi, 0x343, 0); - write_phy_reg(pi, 0x346, 0); - write_phy_reg(pi, 0x347, 0); - } - write_phy_reg(pi, 0xe5, 0); - write_phy_reg(pi, 0xe6, 0); - } else { - write_phy_reg(pi, 0xec, 0); - } - - write_phy_reg(pi, 0x91, 0); - write_phy_reg(pi, 0x92, 0); - if (NREV_LT(pi->pubpi.phy_rev, 6)) { - write_phy_reg(pi, 0x93, 0); - write_phy_reg(pi, 0x94, 0); - } - - and_phy_reg(pi, 0xa1, ~3); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0x8f, 0); - write_phy_reg(pi, 0xa5, 0); - } else { - write_phy_reg(pi, 0xa5, 0); - } - - if (NREV_IS(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); - else if (NREV_LT(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); - - write_phy_reg(pi, 0x203, 32); - write_phy_reg(pi, 0x201, 32); - - if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) - write_phy_reg(pi, 0x20d, 160); - else - write_phy_reg(pi, 0x20d, 184); - - write_phy_reg(pi, 0x13a, 200); - - write_phy_reg(pi, 0x70, 80); - - write_phy_reg(pi, 0x1ff, 48); - - if (NREV_LT(pi->pubpi.phy_rev, 8)) { - wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); - } - - wlc_phy_stf_chain_upd_nphy(pi); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - write_phy_reg(pi, 0x180, 0xaa8); - write_phy_reg(pi, 0x181, 0x9a4); - } - - if (PHY_IPA(pi)) { - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : - 0x29c, (0x1ff << 7), - (pi->nphy_papd_epsilon_offset[core]) << 7); - - } - - wlc_phy_ipa_set_tx_digi_filts_nphy(pi); - } else { - - if (NREV_GE(pi->pubpi.phy_rev, 5)) { - wlc_phy_extpa_set_tx_digi_filts_nphy(pi); - } - } - - wlc_phy_workarounds_nphy(pi); - - wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); - - val = read_phy_reg(pi, 0x01); - write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); - write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); - wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); - - wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); - - wlc_phy_pa_override_nphy(pi, OFF); - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - wlc_phy_pa_override_nphy(pi, ON); - - wlc_phy_classifier_nphy(pi, 0, 0); - wlc_phy_clip_det_nphy(pi, 0, clip1_ths); - - if (CHSPEC_IS2G(pi->radio_chanspec)) - wlc_phy_bphy_init_nphy(pi); - - tx_pwr_ctrl_state = pi->nphy_txpwrctrl; - wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); - - wlc_phy_txpwr_fixpower_nphy(pi); - - wlc_phy_txpwrctrl_idle_tssi_nphy(pi); - - wlc_phy_txpwrctrl_pwr_setup_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - u32 *tx_pwrctrl_tbl = NULL; - u16 idx; - s16 pga_gn = 0; - s16 pad_gn = 0; - s32 rfpwr_offset = 0; - - if (PHY_IPA(pi)) { - tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { - tx_pwrctrl_tbl = - nphy_tpc_5GHz_txgain_rev3; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { - tx_pwrctrl_tbl = - (pi->srom_fem5g.extpagain == 3) ? - nphy_tpc_5GHz_txgain_HiPwrEPA : - nphy_tpc_5GHz_txgain_rev4; - } else { - tx_pwrctrl_tbl = - nphy_tpc_5GHz_txgain_rev5; - } - - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (pi->pubpi.radiorev == 5) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_epa_2057rev5; - } else if (pi->pubpi.radiorev == 3) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_epa_2057rev3; - } - - } else { - if (NREV_GE(pi->pubpi.phy_rev, 5) && - (pi->srom_fem2g.extpagain == 3)) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_HiPwrEPA; - } else { - tx_pwrctrl_tbl = - nphy_tpc_txgain_rev3; - } - } - } - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, - 192, 32, tx_pwrctrl_tbl); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, - 192, 32, tx_pwrctrl_tbl); - - pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - for (idx = 0; idx < 128; idx++) { - pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; - pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - rfpwr_offset = (s16) - nphy_papd_padgain_dlt_2g_2057rev3n4 - [pad_gn]; - } else if (pi->pubpi.radiorev == 5) { - rfpwr_offset = (s16) - nphy_papd_padgain_dlt_2g_2057rev5 - [pad_gn]; - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == - 8)) { - rfpwr_offset = (s16) - nphy_papd_padgain_dlt_2g_2057rev7 - [pad_gn]; - } - } else { - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - rfpwr_offset = (s16) - nphy_papd_pgagain_dlt_5g_2057 - [pga_gn]; - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == - 8)) { - rfpwr_offset = (s16) - nphy_papd_pgagain_dlt_5g_2057rev7 - [pga_gn]; - } - } - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_CORE1TXPWRCTL, - 1, 576 + idx, 32, - &rfpwr_offset); - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_CORE2TXPWRCTL, - 1, 576 + idx, 32, - &rfpwr_offset); - } - } else { - - for (idx = 0; idx < 128; idx++) { - pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; - if (CHSPEC_IS2G(pi->radio_chanspec)) { - rfpwr_offset = (s16) - nphy_papd_pga_gain_delta_ipa_2g - [pga_gn]; - } else { - rfpwr_offset = (s16) - nphy_papd_pga_gain_delta_ipa_5g - [pga_gn]; - } - - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_CORE1TXPWRCTL, - 1, 576 + idx, 32, - &rfpwr_offset); - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_CORE2TXPWRCTL, - 1, 576 + idx, 32, - &rfpwr_offset); - } - - } - } else { - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, - 192, 32, nphy_tpc_txgain); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, - 192, 32, nphy_tpc_txgain); - } - - if (pi->sh->phyrxchain != 0x3) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t *) pi, - pi->sh->phyrxchain); - } - - if (PHY_PERICAL_MPHASE_PENDING(pi)) { - wlc_phy_cal_perical_mphase_restart(pi); - } - - if (!NORADIO_ENAB(pi->pubpi)) { - bool do_rssi_cal = false; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? - (pi->nphy_rssical_chanspec_2G == 0) : - (pi->nphy_rssical_chanspec_5G == 0); - - if (do_rssi_cal) { - wlc_phy_rssi_cal_nphy(pi); - } else { - wlc_phy_restore_rssical_nphy(pi); - } - } else { - wlc_phy_rssi_cal_nphy(pi); - } - - if (!SCAN_RM_IN_PROGRESS(pi)) { - do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? - (pi->nphy_iqcal_chanspec_2G == 0) : - (pi->nphy_iqcal_chanspec_5G == 0); - } - - if (!pi->do_initcal) - do_nphy_cal = false; - - if (do_nphy_cal) { - - target_gain = wlc_phy_get_tx_gain_nphy(pi); - - if (pi->antsel_type == ANTSEL_2x3) - wlc_phy_antsel_init((wlc_phy_t *) pi, true); - - if (pi->nphy_perical != PHY_PERICAL_MPHASE) { - wlc_phy_rssi_cal_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - pi->nphy_cal_orig_pwr_idx[0] = - pi->nphy_txpwrindex[PHY_CORE_0]. - index_internal; - pi->nphy_cal_orig_pwr_idx[1] = - pi->nphy_txpwrindex[PHY_CORE_1]. - index_internal; - - wlc_phy_precal_txgain_nphy(pi); - target_gain = - wlc_phy_get_tx_gain_nphy(pi); - } - - if (wlc_phy_cal_txiqlo_nphy - (pi, target_gain, true, false) == 0) { - if (wlc_phy_cal_rxiq_nphy - (pi, target_gain, 2, - false) == 0) { - wlc_phy_savecal_nphy(pi); - - } - } - } else if (pi->mphase_cal_phase_id == - MPHASE_CAL_STATE_IDLE) { - - wlc_phy_cal_perical((wlc_phy_t *) pi, - PHY_PERICAL_PHYINIT); - } - } else { - wlc_phy_restorecal_nphy(pi); - } - } - - wlc_phy_txpwrctrl_coeff_setup_nphy(pi); - - wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); - - wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); - - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) - - write_phy_reg(pi, 0x70, 50); - - wlc_phy_txlpfbw_nphy(pi); - - wlc_phy_spurwar_nphy(pi); - -} - -static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble) -{ - bool gf_preamble = false; - u16 val; - - if (preamble == WLC_N_PREAMBLE_GF) { - gf_preamble = true; - } - - val = read_phy_reg(pi, 0xed); - - val |= RX_GF_MM_AUTO; - val &= ~RX_GF_OR_MM; - if (gf_preamble) - val |= RX_GF_OR_MM; - - write_phy_reg(pi, 0xed, val); -} - -static void wlc_phy_resetcca_nphy(phy_info_t *pi) -{ - u16 val; - - wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); - - val = read_phy_reg(pi, 0x01); - write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); - udelay(1); - write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); - - wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); - - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); -} - -void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en) -{ - u16 rfctrlintc_override_val; - - if (!en) { - - pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); - pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - rfctrlintc_override_val = 0x1480; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - rfctrlintc_override_val = - CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; - } else { - rfctrlintc_override_val = - CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; - } - - write_phy_reg(pi, 0x91, rfctrlintc_override_val); - write_phy_reg(pi, 0x92, rfctrlintc_override_val); - } else { - - write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); - write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); - } - -} - -void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi) -{ - - u16 txrx_chain = - (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); - bool CoreActv_override = false; - - if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN0) { - txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; - CoreActv_override = true; - - if (NREV_LE(pi->pubpi.phy_rev, 2)) { - and_phy_reg(pi, 0xa0, ~0x20); - } - } else if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN1) { - txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; - CoreActv_override = true; - - if (NREV_LE(pi->pubpi.phy_rev, 2)) { - or_phy_reg(pi, 0xa0, 0x20); - } - } - - mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); - - if (CoreActv_override) { - - pi->nphy_perical = PHY_PERICAL_DISABLE; - or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); - } else { - pi->nphy_perical = PHY_PERICAL_MPHASE; - and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); - } -} - -void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask) -{ - u16 regval; - u16 tbl_buf[16]; - uint i; - phy_info_t *pi = (phy_info_t *) pih; - u16 tbl_opcode; - bool suspend; - - pi->sh->phyrxchain = rxcore_bitmask; - - if (!pi->sh->clk) - return; - - suspend = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!suspend) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - regval = read_phy_reg(pi, 0xa2); - regval &= ~(0xf << 4); - regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; - write_phy_reg(pi, 0xa2, regval); - - if ((rxcore_bitmask & 0x3) != 0x3) { - - write_phy_reg(pi, 0x20e, 1); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (pi->rx2tx_biasentry == -1) { - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, - ARRAY_SIZE(tbl_buf), 80, - 16, tbl_buf); - - for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { - if (tbl_buf[i] == - NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { - - pi->rx2tx_biasentry = (u8) i; - tbl_opcode = - NPHY_REV3_RFSEQ_CMD_NOP; - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_RFSEQ, - 1, i, - 16, - &tbl_opcode); - break; - } else if (tbl_buf[i] == - NPHY_REV3_RFSEQ_CMD_END) { - break; - } - } - } - } - } else { - - write_phy_reg(pi, 0x20e, 30); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (pi->rx2tx_biasentry != -1) { - tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, pi->rx2tx_biasentry, - 16, &tbl_opcode); - pi->rx2tx_biasentry = -1; - } - } - } - - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - if (!suspend) - wlapi_enable_mac(pi->sh->physhim); -} - -u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) -{ - u16 regval, rxen_bits; - phy_info_t *pi = (phy_info_t *) pih; - - regval = read_phy_reg(pi, 0xa2); - rxen_bits = (regval >> 4) & 0xf; - - return (u8) rxen_bits; -} - -bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pi) -{ - return PHY_IPA(pi); -} - -static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi) -{ - u8 idx, idx2, i, delta_ind; - - for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) { - pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; - } - - for (i = 0; i < 4; i++) { - idx2 = 0; - - delta_ind = 0; - - switch (i) { - case 0: - - if (CHSPEC_IS40(pi->radio_chanspec) - && NPHY_IS_SROM_REINTERPRET) { - idx = TXP_FIRST_MCS_40_SISO; - } else { - idx = (CHSPEC_IS40(pi->radio_chanspec)) ? - TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; - delta_ind = 1; - } - break; - - case 1: - - idx = (CHSPEC_IS40(pi->radio_chanspec)) ? - TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; - break; - - case 2: - - idx = (CHSPEC_IS40(pi->radio_chanspec)) ? - TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; - break; - - case 3: - - idx = (CHSPEC_IS40(pi->radio_chanspec)) ? - TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; - break; - } - - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - idx = idx + delta_ind; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx++]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - idx = idx + 1 - delta_ind; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = - pi->tx_power_offset[idx]; - } -} - -void wlc_phy_cal_init_nphy(phy_info_t *pi) -{ -} - -static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, u8 core) -{ - if (core == PHY_CORE_0) { - write_phy_reg(pi, 0x38, 0x4); - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_phy_reg(pi, 0x37, 0x0060); - } else { - write_phy_reg(pi, 0x37, 0x1080); - } - } else if (core == PHY_CORE_1) { - write_phy_reg(pi, 0x2ae, 0x4); - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_phy_reg(pi, 0x2ad, 0x0060); - } else { - write_phy_reg(pi, 0x2ad, 0x1080); - } - } -} - -static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, u8 txchain) -{ - u8 txchain0, txchain1; - - txchain0 = txchain & 0x1; - txchain1 = (txchain & 0x2) >> 1; - if (!txchain0) { - wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); - } - - if (!txchain1) { - wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); - } -} - -static void wlc_phy_workarounds_nphy(phy_info_t *pi) -{ - u8 rfseq_rx2tx_events[] = { - NPHY_RFSEQ_CMD_NOP, - NPHY_RFSEQ_CMD_RXG_FBW, - NPHY_RFSEQ_CMD_TR_SWITCH, - NPHY_RFSEQ_CMD_CLR_HIQ_DIS, - NPHY_RFSEQ_CMD_RXPD_TXPD, - NPHY_RFSEQ_CMD_TX_GAIN, - NPHY_RFSEQ_CMD_EXT_PA - }; - u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; - u8 rfseq_tx2rx_events[] = { - NPHY_RFSEQ_CMD_NOP, - NPHY_RFSEQ_CMD_EXT_PA, - NPHY_RFSEQ_CMD_TX_GAIN, - NPHY_RFSEQ_CMD_RXPD_TXPD, - NPHY_RFSEQ_CMD_TR_SWITCH, - NPHY_RFSEQ_CMD_RXG_FBW, - NPHY_RFSEQ_CMD_CLR_HIQ_DIS - }; - u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; - u8 rfseq_tx2rx_events_rev3[] = { - NPHY_REV3_RFSEQ_CMD_EXT_PA, - NPHY_REV3_RFSEQ_CMD_INT_PA_PU, - NPHY_REV3_RFSEQ_CMD_TX_GAIN, - NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, - NPHY_REV3_RFSEQ_CMD_TR_SWITCH, - NPHY_REV3_RFSEQ_CMD_RXG_FBW, - NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, - NPHY_REV3_RFSEQ_CMD_END - }; - u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; - u8 rfseq_rx2tx_events_rev3[] = { - NPHY_REV3_RFSEQ_CMD_NOP, - NPHY_REV3_RFSEQ_CMD_RXG_FBW, - NPHY_REV3_RFSEQ_CMD_TR_SWITCH, - NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, - NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, - NPHY_REV3_RFSEQ_CMD_TX_GAIN, - NPHY_REV3_RFSEQ_CMD_INT_PA_PU, - NPHY_REV3_RFSEQ_CMD_EXT_PA, - NPHY_REV3_RFSEQ_CMD_END - }; - u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; - - u8 rfseq_rx2tx_events_rev3_ipa[] = { - NPHY_REV3_RFSEQ_CMD_NOP, - NPHY_REV3_RFSEQ_CMD_RXG_FBW, - NPHY_REV3_RFSEQ_CMD_TR_SWITCH, - NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, - NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, - NPHY_REV3_RFSEQ_CMD_TX_GAIN, - NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, - NPHY_REV3_RFSEQ_CMD_INT_PA_PU, - NPHY_REV3_RFSEQ_CMD_END - }; - u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; - u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; - - s16 alpha0, alpha1, alpha2; - s16 beta0, beta1, beta2; - u32 leg_data_weights, ht_data_weights, nss1_data_weights, - stbc_data_weights; - u8 chan_freq_range = 0; - u16 dac_control = 0x0002; - u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; - u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; - u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; - u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; - u16 *aux_adc_vmid; - u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; - u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; - u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; - u16 *aux_adc_gain; - u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; - u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; - s32 min_nvar_val = 0x18d; - s32 min_nvar_offset_6mbps = 20; - u8 pdetrange; - u8 triso; - u16 regval; - u16 afectrl_adc_ctrl1_rev7 = 0x20; - u16 afectrl_adc_ctrl2_rev7 = 0x0; - u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; - u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; - u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; - u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; - u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; - u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; - u16 ipalvlshift_3p3_war_en = 0; - u16 rccal_bcap_val, rccal_scap_val; - u16 rccal_tx20_11b_bcap = 0; - u16 rccal_tx20_11b_scap = 0; - u16 rccal_tx20_11n_bcap = 0; - u16 rccal_tx20_11n_scap = 0; - u16 rccal_tx40_11n_bcap = 0; - u16 rccal_tx40_11n_scap = 0; - u16 rx2tx_lpf_rc_lut_tx20_11b = 0; - u16 rx2tx_lpf_rc_lut_tx20_11n = 0; - u16 rx2tx_lpf_rc_lut_tx40_11n = 0; - u16 tx_lpf_bw_ofdm_20mhz = 0; - u16 tx_lpf_bw_ofdm_40mhz = 0; - u16 tx_lpf_bw_11b = 0; - u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; - u16 txgm_idac_bleed = 0; - bool rccal_ovrd = false; - u16 freq; - int coreNum; - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); - } else { - wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (!ISSIM_ENAB(pi->sh->sih)) { - or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if (NREV_IS(pi->pubpi.phy_rev, 7)) { - mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); - - mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); - mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); - mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); - mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); - mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); - mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); - mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); - mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); - mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); - mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); - mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); - mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); - mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); - mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); - mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); - mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); - } - - if (NREV_LE(pi->pubpi.phy_rev, 8)) { - write_phy_reg(pi, 0x23f, 0x1b0); - write_phy_reg(pi, 0x240, 0x1b0); - } - - if (NREV_GE(pi->pubpi.phy_rev, 8)) { - mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, - &dac_control); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, - &dac_control); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 0, 32, &leg_data_weights); - leg_data_weights = leg_data_weights & 0xffffff; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 0, 32, &leg_data_weights); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 2, 0x15e, 16, - rfseq_rx2tx_dacbufpu_rev7); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, - rfseq_rx2tx_dacbufpu_rev7); - - if (PHY_IPA(pi)) { - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, - rfseq_rx2tx_events_rev3_ipa, - rfseq_rx2tx_dlys_rev3_ipa, - sizeof - (rfseq_rx2tx_events_rev3_ipa) / - sizeof - (rfseq_rx2tx_events_rev3_ipa - [0])); - } - - mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); - mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); - - tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); - tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); - tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); - - if (PHY_IPA(pi)) { - - if (((pi->pubpi.radiorev == 5) - && (CHSPEC_IS40(pi->radio_chanspec) == 1)) - || (pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - rccal_bcap_val = - read_radio_reg(pi, - RADIO_2057_RCCAL_BCAP_VAL); - rccal_scap_val = - read_radio_reg(pi, - RADIO_2057_RCCAL_SCAP_VAL); - - rccal_tx20_11b_bcap = rccal_bcap_val; - rccal_tx20_11b_scap = rccal_scap_val; - - if ((pi->pubpi.radiorev == 5) && - (CHSPEC_IS40(pi->radio_chanspec) == 1)) { - - rccal_tx20_11n_bcap = rccal_bcap_val; - rccal_tx20_11n_scap = rccal_scap_val; - rccal_tx40_11n_bcap = 0xc; - rccal_tx40_11n_scap = 0xc; - - rccal_ovrd = true; - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - tx_lpf_bw_ofdm_20mhz = 4; - tx_lpf_bw_11b = 1; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - rccal_tx20_11n_bcap = 0xc; - rccal_tx20_11n_scap = 0xc; - rccal_tx40_11n_bcap = 0xa; - rccal_tx40_11n_scap = 0xa; - } else { - rccal_tx20_11n_bcap = 0x14; - rccal_tx20_11n_scap = 0x14; - rccal_tx40_11n_bcap = 0xf; - rccal_tx40_11n_scap = 0xf; - } - - rccal_ovrd = true; - } - } - - } else { - - if (pi->pubpi.radiorev == 5) { - - tx_lpf_bw_ofdm_20mhz = 1; - tx_lpf_bw_ofdm_40mhz = 3; - - rccal_bcap_val = - read_radio_reg(pi, - RADIO_2057_RCCAL_BCAP_VAL); - rccal_scap_val = - read_radio_reg(pi, - RADIO_2057_RCCAL_SCAP_VAL); - - rccal_tx20_11b_bcap = rccal_bcap_val; - rccal_tx20_11b_scap = rccal_scap_val; - - rccal_tx20_11n_bcap = 0x13; - rccal_tx20_11n_scap = 0x11; - rccal_tx40_11n_bcap = 0x13; - rccal_tx40_11n_scap = 0x11; - - rccal_ovrd = true; - } - } - - if (rccal_ovrd) { - - rx2tx_lpf_rc_lut_tx20_11b = (rccal_tx20_11b_bcap << 8) | - (rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b; - rx2tx_lpf_rc_lut_tx20_11n = (rccal_tx20_11n_bcap << 8) | - (rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz; - rx2tx_lpf_rc_lut_tx40_11n = (rccal_tx40_11n_bcap << 8) | - (rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz; - - for (coreNum = 0; coreNum <= 1; coreNum++) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x152 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx20_11b); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x153 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx20_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x154 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx20_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x155 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx40_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x156 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx40_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x157 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx40_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x158 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx40_11n); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 1, - 0x159 + coreNum * 0x10, - 16, - &rx2tx_lpf_rc_lut_tx40_11n); - } - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), - 1, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - } - - if (!NORADIO_ENAB(pi->pubpi)) { - write_phy_reg(pi, 0x32f, 0x3); - } - - if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), - 1, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } - - if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - if ((pi->sh->sromrev >= 8) - && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) - ipalvlshift_3p3_war_en = 1; - - if (ipalvlshift_3p3_war_en) { - write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, - 0x5); - write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, - 0x30); - write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); - or_radio_reg(pi, - RADIO_2057_RXTXBIAS_CONFIG_CORE0, - 0x1); - or_radio_reg(pi, - RADIO_2057_RXTXBIAS_CONFIG_CORE1, - 0x1); - - ipa2g_mainbias = 0x1f; - - ipa2g_casconv = 0x6f; - - ipa2g_biasfilt = 0xaa; - } else { - - ipa2g_mainbias = 0x2b; - - ipa2g_casconv = 0x7f; - - ipa2g_biasfilt = 0xee; - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - for (coreNum = 0; coreNum <= 1; coreNum++) { - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - coreNum, IPA2G_IMAIN, - ipa2g_mainbias); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - coreNum, IPA2G_CASCONV, - ipa2g_casconv); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - coreNum, - IPA2G_BIAS_FILTER, - ipa2g_biasfilt); - } - } - } - - if (PHY_IPA(pi)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if ((pi->pubpi.radiorev == 3) - || (pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)) { - - txgm_idac_bleed = 0x7f; - } - - for (coreNum = 0; coreNum <= 1; coreNum++) { - if (txgm_idac_bleed != 0) - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - TXGM_IDAC_BLEED, - txgm_idac_bleed); - } - - if (pi->pubpi.radiorev == 5) { - - for (coreNum = 0; coreNum <= 1; - coreNum++) { - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - IPA2G_CASCONV, - 0x13); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - IPA2G_IMAIN, - 0x1f); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - IPA2G_BIAS_FILTER, - 0xee); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - PAD2G_IDACS, - 0x8a); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, coreNum, - PAD_BIAS_FILTER_BWS, - 0x3e); - } - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - if (CHSPEC_IS40(pi->radio_chanspec) == - 0) { - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, 0, - IPA2G_IMAIN, - 0x14); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, 1, - IPA2G_IMAIN, - 0x12); - } else { - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, 0, - IPA2G_IMAIN, - 0x16); - WRITE_RADIO_REG4(pi, RADIO_2057, - CORE, 1, - IPA2G_IMAIN, - 0x16); - } - } - - } else { - freq = - CHAN5G_FREQ(CHSPEC_CHANNEL - (pi->radio_chanspec)); - if (((freq >= 5180) && (freq <= 5230)) - || ((freq >= 5745) && (freq <= 5805))) { - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - 0, IPA5G_BIAS_FILTER, - 0xff); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - 1, IPA5G_BIAS_FILTER, - 0xff); - } - } - } else { - - if (pi->pubpi.radiorev != 5) { - for (coreNum = 0; coreNum <= 1; coreNum++) { - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - coreNum, - TXMIX2G_TUNE_BOOST_PU, - 0x61); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, - coreNum, - TXGM_IDAC_BLEED, 0x70); - } - } - } - - if (pi->pubpi.radiorev == 4) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, - 0x05, 16, - &afectrl_adc_ctrl1_rev7); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, - 0x15, 16, - &afectrl_adc_ctrl1_rev7); - - for (coreNum = 0; coreNum <= 1; coreNum++) { - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, - AFE_VCM_CAL_MASTER, 0x0); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, - AFE_SET_VCM_I, 0x3f); - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, - AFE_SET_VCM_Q, 0x3f); - } - } else { - mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); - - mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); - mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); - mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); - mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, - 0x05, 16, - &afectrl_adc_ctrl2_rev7); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, - 0x15, 16, - &afectrl_adc_ctrl2_rev7); - - mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); - mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); - mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); - mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); - } - - write_phy_reg(pi, 0x6a, 0x2); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, - &min_nvar_offset_6mbps); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, - &rfseq_pktgn_lpf_hpc_rev7); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, - &rfseq_pktgn_lpf_h_hpc_rev7); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, - &rfseq_htpktgn_lpf_hpc_rev7); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, - &rfseq_cckpktgn_lpf_hpc_rev7); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, - &rfseq_tx2rx_lpf_h_hpc_rev7); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, - &rfseq_rx2tx_lpf_h_hpc_rev7); - - if (CHSPEC_IS40(pi->radio_chanspec) == 0) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, - 32, &min_nvar_val); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - 127, 32, &min_nvar_val); - } else { - min_nvar_val = noise_var_tbl_rev7[3]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, - 32, &min_nvar_val); - - min_nvar_val = noise_var_tbl_rev7[127]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - 127, 32, &min_nvar_val); - } - - wlc_phy_workarounds_nphy_gainctrl(pi); - - pdetrange = - (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. - pdetrange : pi->srom_fem2g.pdetrange; - - if (pdetrange == 0) { - chan_freq_range = - wlc_phy_get_chan_freq_range_nphy(pi, 0); - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - aux_adc_vmid_rev7_core0[3] = 0x70; - aux_adc_vmid_rev7_core1[3] = 0x70; - aux_adc_gain_rev7[3] = 2; - } else { - aux_adc_vmid_rev7_core0[3] = 0x80; - aux_adc_vmid_rev7_core1[3] = 0x80; - aux_adc_gain_rev7[3] = 3; - } - } else if (pdetrange == 1) { - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - aux_adc_vmid_rev7_core0[3] = 0x7c; - aux_adc_vmid_rev7_core1[3] = 0x7c; - aux_adc_gain_rev7[3] = 2; - } else { - aux_adc_vmid_rev7_core0[3] = 0x8c; - aux_adc_vmid_rev7_core1[3] = 0x8c; - aux_adc_gain_rev7[3] = 1; - } - } else if (pdetrange == 2) { - if (pi->pubpi.radioid == BCM2057_ID) { - if ((pi->pubpi.radiorev == 5) - || (pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - if (chan_freq_range == - WL_CHAN_FREQ_RANGE_2G) { - aux_adc_vmid_rev7_core0[3] = - 0x8c; - aux_adc_vmid_rev7_core1[3] = - 0x8c; - aux_adc_gain_rev7[3] = 0; - } else { - aux_adc_vmid_rev7_core0[3] = - 0x96; - aux_adc_vmid_rev7_core1[3] = - 0x96; - aux_adc_gain_rev7[3] = 0; - } - } - } - - } else if (pdetrange == 3) { - if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { - aux_adc_vmid_rev7_core0[3] = 0x89; - aux_adc_vmid_rev7_core1[3] = 0x89; - aux_adc_gain_rev7[3] = 0; - } - - } else if (pdetrange == 5) { - - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - aux_adc_vmid_rev7_core0[3] = 0x80; - aux_adc_vmid_rev7_core1[3] = 0x80; - aux_adc_gain_rev7[3] = 3; - } else { - aux_adc_vmid_rev7_core0[3] = 0x70; - aux_adc_vmid_rev7_core1[3] = 0x70; - aux_adc_gain_rev7[3] = 2; - } - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, - &aux_adc_vmid_rev7_core0); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, - &aux_adc_vmid_rev7_core1); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, - &aux_adc_gain_rev7); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, - &aux_adc_gain_rev7); - - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - write_phy_reg(pi, 0x23f, 0x1f8); - write_phy_reg(pi, 0x240, 0x1f8); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 0, 32, &leg_data_weights); - leg_data_weights = leg_data_weights & 0xffffff; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 0, 32, &leg_data_weights); - - alpha0 = 293; - alpha1 = 435; - alpha2 = 261; - beta0 = 366; - beta1 = 205; - beta2 = 32; - write_phy_reg(pi, 0x145, alpha0); - write_phy_reg(pi, 0x146, alpha1); - write_phy_reg(pi, 0x147, alpha2); - write_phy_reg(pi, 0x148, beta0); - write_phy_reg(pi, 0x149, beta1); - write_phy_reg(pi, 0x14a, beta2); - - write_phy_reg(pi, 0x38, 0xC); - write_phy_reg(pi, 0x2ae, 0xC); - - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, - rfseq_tx2rx_events_rev3, - rfseq_tx2rx_dlys_rev3, - sizeof(rfseq_tx2rx_events_rev3) / - sizeof(rfseq_tx2rx_events_rev3[0])); - - if (PHY_IPA(pi)) { - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, - rfseq_rx2tx_events_rev3_ipa, - rfseq_rx2tx_dlys_rev3_ipa, - sizeof - (rfseq_rx2tx_events_rev3_ipa) / - sizeof - (rfseq_rx2tx_events_rev3_ipa - [0])); - } - - if ((pi->sh->hw_phyrxchain != 0x3) && - (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { - - if (PHY_IPA(pi)) { - rfseq_rx2tx_dlys_rev3[5] = 59; - rfseq_rx2tx_dlys_rev3[6] = 1; - rfseq_rx2tx_events_rev3[7] = - NPHY_REV3_RFSEQ_CMD_END; - } - - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, - rfseq_rx2tx_events_rev3, - rfseq_rx2tx_dlys_rev3, - sizeof(rfseq_rx2tx_events_rev3) / - sizeof(rfseq_rx2tx_events_rev3 - [0])); - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_phy_reg(pi, 0x6a, 0x2); - } else { - write_phy_reg(pi, 0x6a, 0x9c40); - } - - mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); - - if (CHSPEC_IS40(pi->radio_chanspec) == 0) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, - 32, &min_nvar_val); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - 127, 32, &min_nvar_val); - } else { - min_nvar_val = noise_var_tbl_rev3[3]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, - 32, &min_nvar_val); - - min_nvar_val = noise_var_tbl_rev3[127]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - 127, 32, &min_nvar_val); - } - - wlc_phy_workarounds_nphy_gainctrl(pi); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, - &dac_control); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, - &dac_control); - - pdetrange = - (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. - pdetrange : pi->srom_fem2g.pdetrange; - - if (pdetrange == 0) { - if (NREV_GE(pi->pubpi.phy_rev, 4)) { - aux_adc_vmid = aux_adc_vmid_rev4; - aux_adc_gain = aux_adc_gain_rev4; - } else { - aux_adc_vmid = aux_adc_vmid_rev3; - aux_adc_gain = aux_adc_gain_rev3; - } - chan_freq_range = - wlc_phy_get_chan_freq_range_nphy(pi, 0); - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - switch (chan_freq_range) { - case WL_CHAN_FREQ_RANGE_5GL: - aux_adc_vmid[3] = 0x89; - aux_adc_gain[3] = 0; - break; - case WL_CHAN_FREQ_RANGE_5GM: - aux_adc_vmid[3] = 0x89; - aux_adc_gain[3] = 0; - break; - case WL_CHAN_FREQ_RANGE_5GH: - aux_adc_vmid[3] = 0x89; - aux_adc_gain[3] = 0; - break; - default: - break; - } - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x08, 16, aux_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x18, 16, aux_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x0c, 16, aux_adc_gain); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x1c, 16, aux_adc_gain); - } else if (pdetrange == 1) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x08, 16, sk_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x18, 16, sk_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x0c, 16, sk_adc_gain); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x1c, 16, sk_adc_gain); - } else if (pdetrange == 2) { - - u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; - u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; - - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - chan_freq_range = - wlc_phy_get_chan_freq_range_nphy(pi, 0); - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - bcm_adc_vmid[3] = 0x8e; - bcm_adc_gain[3] = 0x03; - } else { - bcm_adc_vmid[3] = 0x94; - bcm_adc_gain[3] = 0x03; - } - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { - bcm_adc_vmid[3] = 0x84; - bcm_adc_gain[3] = 0x02; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x08, 16, bcm_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x18, 16, bcm_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x0c, 16, bcm_adc_gain); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x1c, 16, bcm_adc_gain); - } else if (pdetrange == 3) { - chan_freq_range = - wlc_phy_get_chan_freq_range_nphy(pi, 0); - if ((NREV_GE(pi->pubpi.phy_rev, 4)) - && (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { - - u16 auxadc_vmid[] = { - 0xa2, 0xb4, 0xb4, 0x270 }; - u16 auxadc_gain[] = { - 0x02, 0x02, 0x02, 0x00 }; - - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_AFECTRL, 4, - 0x08, 16, auxadc_vmid); - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_AFECTRL, 4, - 0x18, 16, auxadc_vmid); - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_AFECTRL, 4, - 0x0c, 16, auxadc_gain); - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_AFECTRL, 4, - 0x1c, 16, auxadc_gain); - } - } else if ((pdetrange == 4) || (pdetrange == 5)) { - u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; - u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; - u16 Vmid[2], Av[2]; - - chan_freq_range = - wlc_phy_get_chan_freq_range_nphy(pi, 0); - if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { - Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; - Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; - Av[0] = (pdetrange == 4) ? 2 : 0; - Av[1] = (pdetrange == 4) ? 2 : 0; - } else { - Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; - Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; - Av[0] = (pdetrange == 4) ? 2 : 0; - Av[1] = (pdetrange == 4) ? 2 : 0; - } - - bcm_adc_vmid[3] = Vmid[0]; - bcm_adc_gain[3] = Av[0]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x08, 16, bcm_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x0c, 16, bcm_adc_gain); - - bcm_adc_vmid[3] = Vmid[1]; - bcm_adc_gain[3] = Av[1]; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x18, 16, bcm_adc_vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, - 0x1c, 16, bcm_adc_gain); - } - - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), - 0x0); - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), - 0x0); - - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), - 0x6); - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), - 0x6); - - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), - 0x7); - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), - 0x7); - - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), - 0x88); - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), - 0x88); - - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), - 0x0); - write_radio_reg(pi, - (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), - 0x0); - - write_radio_reg(pi, - (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), - 0x0); - write_radio_reg(pi, - (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), - 0x0); - - triso = - (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. - triso : pi->srom_fem2g.triso; - if (triso == 7) { - wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); - wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); - } - - wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); - - if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && - (CHSPEC_IS5G(pi->radio_chanspec))) || - (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || - (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && - (CHSPEC_IS2G(pi->radio_chanspec)))) { - nss1_data_weights = 0x00088888; - ht_data_weights = 0x00088888; - stbc_data_weights = 0x00088888; - } else { - nss1_data_weights = 0x88888888; - ht_data_weights = 0x88888888; - stbc_data_weights = 0x88888888; - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 1, 32, &nss1_data_weights); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 2, 32, &ht_data_weights); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, - 1, 3, 32, &stbc_data_weights); - - if (NREV_IS(pi->pubpi.phy_rev, 4)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - write_radio_reg(pi, - RADIO_2056_TX_GMBB_IDAC | - RADIO_2056_TX0, 0x70); - write_radio_reg(pi, - RADIO_2056_TX_GMBB_IDAC | - RADIO_2056_TX1, 0x70); - } - } - - if (!pi->edcrs_threshold_lock) { - write_phy_reg(pi, 0x224, 0x3eb); - write_phy_reg(pi, 0x225, 0x3eb); - write_phy_reg(pi, 0x226, 0x341); - write_phy_reg(pi, 0x227, 0x341); - write_phy_reg(pi, 0x228, 0x42b); - write_phy_reg(pi, 0x229, 0x42b); - write_phy_reg(pi, 0x22a, 0x381); - write_phy_reg(pi, 0x22b, 0x381); - write_phy_reg(pi, 0x22c, 0x42b); - write_phy_reg(pi, 0x22d, 0x42b); - write_phy_reg(pi, 0x22e, 0x381); - write_phy_reg(pi, 0x22f, 0x381); - } - - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - - if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) { - wlapi_bmac_mhf(pi->sh->physhim, MHF4, - MHF4_BPHY_TXCORE0, - MHF4_BPHY_TXCORE0, WLC_BAND_ALL); - } - } - } else { - - if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || - (pi->sh->boardtype == 0x8b)) { - uint i; - u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; - for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) - rfseq_rx2tx_dlys[i] = war_dlys[i]; - } - - if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { - and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); - and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); - } else { - or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); - or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); - } - - regval = 0x000a; - wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); - wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); - - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - regval = 0xcdaa; - wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); - wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); - } - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - regval = 0x0000; - wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); - wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); - - regval = 0x7aab; - wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); - wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); - - regval = 0x0800; - wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); - wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); - } - - write_phy_reg(pi, 0xf8, 0x02d8); - write_phy_reg(pi, 0xf9, 0x0301); - write_phy_reg(pi, 0xfa, 0x02d8); - write_phy_reg(pi, 0xfb, 0x0301); - - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, - rfseq_rx2tx_dlys, - sizeof(rfseq_rx2tx_events) / - sizeof(rfseq_rx2tx_events[0])); - - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, - rfseq_tx2rx_dlys, - sizeof(rfseq_tx2rx_events) / - sizeof(rfseq_tx2rx_events[0])); - - wlc_phy_workarounds_nphy_gainctrl(pi); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - - if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) - wlapi_bmac_mhf(pi->sh->physhim, MHF3, - MHF3_NPHY_MLADV_WAR, - MHF3_NPHY_MLADV_WAR, - WLC_BAND_ALL); - - } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { - write_phy_reg(pi, 0x1e3, 0x0); - write_phy_reg(pi, 0x1e4, 0x0); - } - - if (NREV_LT(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0x90, (0x1 << 7), 0); - - alpha0 = 293; - alpha1 = 435; - alpha2 = 261; - beta0 = 366; - beta1 = 205; - beta2 = 32; - write_phy_reg(pi, 0x145, alpha0); - write_phy_reg(pi, 0x146, alpha1); - write_phy_reg(pi, 0x147, alpha2); - write_phy_reg(pi, 0x148, beta0); - write_phy_reg(pi, 0x149, beta1); - write_phy_reg(pi, 0x14a, beta2); - - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - mod_phy_reg(pi, 0x142, (0xf << 12), 0); - - write_phy_reg(pi, 0x192, 0xb5); - write_phy_reg(pi, 0x193, 0xa4); - write_phy_reg(pi, 0x194, 0x0); - } - - if (NREV_IS(pi->pubpi.phy_rev, 2)) { - mod_phy_reg(pi, 0x221, - NPHY_FORCESIG_DECODEGATEDCLKS, - NPHY_FORCESIG_DECODEGATEDCLKS); - } - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) -{ - u16 w1th, hpf_code, currband; - int ctr; - u8 rfseq_updategainu_events[] = { - NPHY_RFSEQ_CMD_RX_GAIN, - NPHY_RFSEQ_CMD_CLR_HIQ_DIS, - NPHY_RFSEQ_CMD_SET_HPF_BW - }; - u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; - s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; - s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; - s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; - s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; - s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; - s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; - s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; - s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; - s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; - s8 *lna1_gain_db = NULL; - s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; - s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; - s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; - s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; - s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; - s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; - s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; - s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; - s8 *lna2_gain_db = NULL; - s8 tiaG_gain_db[] = { - 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; - s8 tiaA_gain_db[] = { - 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; - s8 tiaA_gain_db_rev4[] = { - 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; - s8 tiaA_gain_db_rev5[] = { - 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; - s8 tiaA_gain_db_rev6[] = { - 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; - s8 *tia_gain_db; - s8 tiaG_gainbits[] = { - 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; - s8 tiaA_gainbits[] = { - 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; - s8 tiaA_gainbits_rev4[] = { - 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; - s8 tiaA_gainbits_rev5[] = { - 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; - s8 tiaA_gainbits_rev6[] = { - 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; - s8 *tia_gainbits; - s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; - s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; - u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; - u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; - u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; - u16 rfseqG_init_gain_rev5_elna[] = { - 0x013f, 0x013f, 0x013f, 0x013f }; - u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; - u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; - u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; - u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; - u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; - u16 rfseqA_init_gain_rev4_elna[] = { - 0x314f, 0x314f, 0x314f, 0x314f }; - u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; - u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; - u16 *rfseq_init_gain; - u16 initG_gaincode = 0x627e; - u16 initG_gaincode_rev4 = 0x527e; - u16 initG_gaincode_rev5 = 0x427e; - u16 initG_gaincode_rev5_elna = 0x027e; - u16 initG_gaincode_rev6 = 0x527e; - u16 initG_gaincode_rev6_224B0 = 0x427e; - u16 initG_gaincode_rev6_elna = 0x127e; - u16 initA_gaincode = 0x52de; - u16 initA_gaincode_rev4 = 0x629e; - u16 initA_gaincode_rev4_elna = 0x329e; - u16 initA_gaincode_rev5 = 0x729e; - u16 initA_gaincode_rev6 = 0x729e; - u16 init_gaincode; - u16 clip1hiG_gaincode = 0x107e; - u16 clip1hiG_gaincode_rev4 = 0x007e; - u16 clip1hiG_gaincode_rev5 = 0x1076; - u16 clip1hiG_gaincode_rev6 = 0x007e; - u16 clip1hiA_gaincode = 0x00de; - u16 clip1hiA_gaincode_rev4 = 0x029e; - u16 clip1hiA_gaincode_rev5 = 0x029e; - u16 clip1hiA_gaincode_rev6 = 0x029e; - u16 clip1hi_gaincode; - u16 clip1mdG_gaincode = 0x0066; - u16 clip1mdA_gaincode = 0x00ca; - u16 clip1mdA_gaincode_rev4 = 0x1084; - u16 clip1mdA_gaincode_rev5 = 0x2084; - u16 clip1mdA_gaincode_rev6 = 0x2084; - u16 clip1md_gaincode = 0; - u16 clip1loG_gaincode = 0x0074; - u16 clip1loG_gaincode_rev5[] = { - 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c - }; - u16 clip1loG_gaincode_rev6[] = { - 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e - }; - u16 clip1loG_gaincode_rev6_224B0 = 0x1074; - u16 clip1loA_gaincode = 0x00cc; - u16 clip1loA_gaincode_rev4 = 0x0086; - u16 clip1loA_gaincode_rev5 = 0x2086; - u16 clip1loA_gaincode_rev6 = 0x2086; - u16 clip1lo_gaincode; - u8 crsminG_th = 0x18; - u8 crsminG_th_rev5 = 0x18; - u8 crsminG_th_rev6 = 0x18; - u8 crsminA_th = 0x1e; - u8 crsminA_th_rev4 = 0x24; - u8 crsminA_th_rev5 = 0x24; - u8 crsminA_th_rev6 = 0x24; - u8 crsmin_th; - u8 crsminlG_th = 0x18; - u8 crsminlG_th_rev5 = 0x18; - u8 crsminlG_th_rev6 = 0x18; - u8 crsminlA_th = 0x1e; - u8 crsminlA_th_rev4 = 0x24; - u8 crsminlA_th_rev5 = 0x24; - u8 crsminlA_th_rev6 = 0x24; - u8 crsminl_th = 0; - u8 crsminuG_th = 0x18; - u8 crsminuG_th_rev5 = 0x18; - u8 crsminuG_th_rev6 = 0x18; - u8 crsminuA_th = 0x1e; - u8 crsminuA_th_rev4 = 0x24; - u8 crsminuA_th_rev5 = 0x24; - u8 crsminuA_th_rev6 = 0x24; - u8 crsminuA_th_rev6_224B0 = 0x2d; - u8 crsminu_th; - u16 nbclipG_th = 0x20d; - u16 nbclipG_th_rev4 = 0x1a1; - u16 nbclipG_th_rev5 = 0x1d0; - u16 nbclipG_th_rev6 = 0x1d0; - u16 nbclipA_th = 0x1a1; - u16 nbclipA_th_rev4 = 0x107; - u16 nbclipA_th_rev5 = 0x0a9; - u16 nbclipA_th_rev6 = 0x0f0; - u16 nbclip_th = 0; - u8 w1clipG_th = 5; - u8 w1clipG_th_rev5 = 9; - u8 w1clipG_th_rev6 = 5; - u8 w1clipA_th = 25, w1clip_th; - u8 rssi_gain_default = 0x50; - u8 rssiG_gain_rev6_224B0 = 0x50; - u8 rssiA_gain_rev5 = 0x90; - u8 rssiA_gain_rev6 = 0x90; - u8 rssi_gain; - u16 regval[21]; - u8 triso; - - triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : - pi->srom_fem2g.triso; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (pi->pubpi.radiorev == 5) { - - wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); - } else if (pi->pubpi.radiorev == 7) { - wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); - - mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); - mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); - - } else if ((pi->pubpi.radiorev == 3) - || (pi->pubpi.radiorev == 8)) { - wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); - - if (pi->pubpi.radiorev == 8) { - mod_phy_reg(pi, 0x283, - (0xff << 0), (0x44 << 0)); - mod_phy_reg(pi, 0x280, - (0xff << 0), (0x44 << 0)); - } - } else { - wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); - } - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); - - mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); - mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); - - currband = - read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; - if (currband == 0) { - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - if (pi->pubpi.radiorev == 11) { - lna1_gain_db = lna1G_gain_db_rev6_224B0; - lna2_gain_db = lna2G_gain_db_rev6_224B0; - rfseq_init_gain = - rfseqG_init_gain_rev6_224B0; - init_gaincode = - initG_gaincode_rev6_224B0; - clip1hi_gaincode = - clip1hiG_gaincode_rev6; - clip1lo_gaincode = - clip1loG_gaincode_rev6_224B0; - nbclip_th = nbclipG_th_rev6; - w1clip_th = w1clipG_th_rev6; - crsmin_th = crsminG_th_rev6; - crsminl_th = crsminlG_th_rev6; - crsminu_th = crsminuG_th_rev6; - rssi_gain = rssiG_gain_rev6_224B0; - } else { - lna1_gain_db = lna1G_gain_db_rev6; - lna2_gain_db = lna2G_gain_db_rev6; - if (pi->sh->boardflags & BFL_EXTLNA) { - - rfseq_init_gain = - rfseqG_init_gain_rev6_elna; - init_gaincode = - initG_gaincode_rev6_elna; - } else { - rfseq_init_gain = - rfseqG_init_gain_rev6; - init_gaincode = - initG_gaincode_rev6; - } - clip1hi_gaincode = - clip1hiG_gaincode_rev6; - switch (triso) { - case 0: - clip1lo_gaincode = - clip1loG_gaincode_rev6[0]; - break; - case 1: - clip1lo_gaincode = - clip1loG_gaincode_rev6[1]; - break; - case 2: - clip1lo_gaincode = - clip1loG_gaincode_rev6[2]; - break; - case 3: - default: - - clip1lo_gaincode = - clip1loG_gaincode_rev6[3]; - break; - case 4: - clip1lo_gaincode = - clip1loG_gaincode_rev6[4]; - break; - case 5: - clip1lo_gaincode = - clip1loG_gaincode_rev6[5]; - break; - case 6: - clip1lo_gaincode = - clip1loG_gaincode_rev6[6]; - break; - case 7: - clip1lo_gaincode = - clip1loG_gaincode_rev6[7]; - break; - } - nbclip_th = nbclipG_th_rev6; - w1clip_th = w1clipG_th_rev6; - crsmin_th = crsminG_th_rev6; - crsminl_th = crsminlG_th_rev6; - crsminu_th = crsminuG_th_rev6; - rssi_gain = rssi_gain_default; - } - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { - lna1_gain_db = lna1G_gain_db_rev5; - lna2_gain_db = lna2G_gain_db_rev5; - if (pi->sh->boardflags & BFL_EXTLNA) { - - rfseq_init_gain = - rfseqG_init_gain_rev5_elna; - init_gaincode = - initG_gaincode_rev5_elna; - } else { - rfseq_init_gain = rfseqG_init_gain_rev5; - init_gaincode = initG_gaincode_rev5; - } - clip1hi_gaincode = clip1hiG_gaincode_rev5; - switch (triso) { - case 0: - clip1lo_gaincode = - clip1loG_gaincode_rev5[0]; - break; - case 1: - clip1lo_gaincode = - clip1loG_gaincode_rev5[1]; - break; - case 2: - clip1lo_gaincode = - clip1loG_gaincode_rev5[2]; - break; - case 3: - - clip1lo_gaincode = - clip1loG_gaincode_rev5[3]; - break; - case 4: - clip1lo_gaincode = - clip1loG_gaincode_rev5[4]; - break; - case 5: - clip1lo_gaincode = - clip1loG_gaincode_rev5[5]; - break; - case 6: - clip1lo_gaincode = - clip1loG_gaincode_rev5[6]; - break; - case 7: - clip1lo_gaincode = - clip1loG_gaincode_rev5[7]; - break; - default: - clip1lo_gaincode = - clip1loG_gaincode_rev5[3]; - break; - } - nbclip_th = nbclipG_th_rev5; - w1clip_th = w1clipG_th_rev5; - crsmin_th = crsminG_th_rev5; - crsminl_th = crsminlG_th_rev5; - crsminu_th = crsminuG_th_rev5; - rssi_gain = rssi_gain_default; - } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { - lna1_gain_db = lna1G_gain_db_rev4; - lna2_gain_db = lna2G_gain_db; - rfseq_init_gain = rfseqG_init_gain_rev4; - init_gaincode = initG_gaincode_rev4; - clip1hi_gaincode = clip1hiG_gaincode_rev4; - clip1lo_gaincode = clip1loG_gaincode; - nbclip_th = nbclipG_th_rev4; - w1clip_th = w1clipG_th; - crsmin_th = crsminG_th; - crsminl_th = crsminlG_th; - crsminu_th = crsminuG_th; - rssi_gain = rssi_gain_default; - } else { - lna1_gain_db = lna1G_gain_db; - lna2_gain_db = lna2G_gain_db; - rfseq_init_gain = rfseqG_init_gain; - init_gaincode = initG_gaincode; - clip1hi_gaincode = clip1hiG_gaincode; - clip1lo_gaincode = clip1loG_gaincode; - nbclip_th = nbclipG_th; - w1clip_th = w1clipG_th; - crsmin_th = crsminG_th; - crsminl_th = crsminlG_th; - crsminu_th = crsminuG_th; - rssi_gain = rssi_gain_default; - } - tia_gain_db = tiaG_gain_db; - tia_gainbits = tiaG_gainbits; - clip1md_gaincode = clip1mdG_gaincode; - } else { - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - lna1_gain_db = lna1A_gain_db_rev6; - lna2_gain_db = lna2A_gain_db_rev6; - tia_gain_db = tiaA_gain_db_rev6; - tia_gainbits = tiaA_gainbits_rev6; - rfseq_init_gain = rfseqA_init_gain_rev6; - init_gaincode = initA_gaincode_rev6; - clip1hi_gaincode = clip1hiA_gaincode_rev6; - clip1md_gaincode = clip1mdA_gaincode_rev6; - clip1lo_gaincode = clip1loA_gaincode_rev6; - crsmin_th = crsminA_th_rev6; - crsminl_th = crsminlA_th_rev6; - if ((pi->pubpi.radiorev == 11) && - (CHSPEC_IS40(pi->radio_chanspec) == 0)) { - crsminu_th = crsminuA_th_rev6_224B0; - } else { - crsminu_th = crsminuA_th_rev6; - } - nbclip_th = nbclipA_th_rev6; - rssi_gain = rssiA_gain_rev6; - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { - lna1_gain_db = lna1A_gain_db_rev5; - lna2_gain_db = lna2A_gain_db_rev5; - tia_gain_db = tiaA_gain_db_rev5; - tia_gainbits = tiaA_gainbits_rev5; - rfseq_init_gain = rfseqA_init_gain_rev5; - init_gaincode = initA_gaincode_rev5; - clip1hi_gaincode = clip1hiA_gaincode_rev5; - clip1md_gaincode = clip1mdA_gaincode_rev5; - clip1lo_gaincode = clip1loA_gaincode_rev5; - crsmin_th = crsminA_th_rev5; - crsminl_th = crsminlA_th_rev5; - crsminu_th = crsminuA_th_rev5; - nbclip_th = nbclipA_th_rev5; - rssi_gain = rssiA_gain_rev5; - } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { - lna1_gain_db = lna1A_gain_db_rev4; - lna2_gain_db = lna2A_gain_db_rev4; - tia_gain_db = tiaA_gain_db_rev4; - tia_gainbits = tiaA_gainbits_rev4; - if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { - - rfseq_init_gain = - rfseqA_init_gain_rev4_elna; - init_gaincode = - initA_gaincode_rev4_elna; - } else { - rfseq_init_gain = rfseqA_init_gain_rev4; - init_gaincode = initA_gaincode_rev4; - } - clip1hi_gaincode = clip1hiA_gaincode_rev4; - clip1md_gaincode = clip1mdA_gaincode_rev4; - clip1lo_gaincode = clip1loA_gaincode_rev4; - crsmin_th = crsminA_th_rev4; - crsminl_th = crsminlA_th_rev4; - crsminu_th = crsminuA_th_rev4; - nbclip_th = nbclipA_th_rev4; - rssi_gain = rssi_gain_default; - } else { - lna1_gain_db = lna1A_gain_db; - lna2_gain_db = lna2A_gain_db; - tia_gain_db = tiaA_gain_db; - tia_gainbits = tiaA_gainbits; - rfseq_init_gain = rfseqA_init_gain; - init_gaincode = initA_gaincode; - clip1hi_gaincode = clip1hiA_gaincode; - clip1md_gaincode = clip1mdA_gaincode; - clip1lo_gaincode = clip1loA_gaincode; - crsmin_th = crsminA_th; - crsminl_th = crsminlA_th; - crsminu_th = crsminuA_th; - nbclip_th = nbclipA_th; - rssi_gain = rssi_gain_default; - } - w1clip_th = w1clipA_th; - } - - write_radio_reg(pi, - (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | - RADIO_2056_RX0), 0x17); - write_radio_reg(pi, - (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | - RADIO_2056_RX1), 0x17); - - write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), - 0xf0); - write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), - 0xf0); - - write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), - 0x0); - write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), - 0x0); - - write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), - rssi_gain); - write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), - rssi_gain); - - write_radio_reg(pi, - (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | - RADIO_2056_RX0), 0x17); - write_radio_reg(pi, - (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | - RADIO_2056_RX1), 0x17); - - write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), - 0xFF); - write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), - 0xFF); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, - 8, lna1_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, - 8, lna1_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, - 8, lna2_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, - 8, lna2_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, - 8, tia_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, - 8, tia_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, - 8, tia_gainbits); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, - 8, tia_gainbits); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, - 8, &lpf_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, - 8, &lpf_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, - 8, &lpf_gainbits); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, - 8, &lpf_gainbits); - - write_phy_reg(pi, 0x20, init_gaincode); - write_phy_reg(pi, 0x2a7, init_gaincode); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - pi->pubpi.phy_corenum, 0x106, 16, - rfseq_init_gain); - - write_phy_reg(pi, 0x22, clip1hi_gaincode); - write_phy_reg(pi, 0x2a9, clip1hi_gaincode); - - write_phy_reg(pi, 0x24, clip1md_gaincode); - write_phy_reg(pi, 0x2ab, clip1md_gaincode); - - write_phy_reg(pi, 0x37, clip1lo_gaincode); - write_phy_reg(pi, 0x2ad, clip1lo_gaincode); - - mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); - mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); - mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); - - write_phy_reg(pi, 0x2b, nbclip_th); - write_phy_reg(pi, 0x41, nbclip_th); - - mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); - mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); - - write_phy_reg(pi, 0x150, 0x809c); - - } else { - - mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); - mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); - - write_phy_reg(pi, 0x2b, 0x84); - write_phy_reg(pi, 0x41, 0x84); - - if (CHSPEC_IS20(pi->radio_chanspec)) { - write_phy_reg(pi, 0x6b, 0x2b); - write_phy_reg(pi, 0x6c, 0x2b); - write_phy_reg(pi, 0x6d, 0x9); - write_phy_reg(pi, 0x6e, 0x9); - } - - w1th = NPHY_RSSICAL_W1_TARGET - 4; - mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); - mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); - - if (CHSPEC_IS20(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); - mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); - - mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); - mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); - } - - write_phy_reg(pi, 0x150, 0x809c); - - if (pi->nphy_gain_boost) - if ((CHSPEC_IS2G(pi->radio_chanspec)) && - (CHSPEC_IS40(pi->radio_chanspec))) - hpf_code = 4; - else - hpf_code = 5; - else if (CHSPEC_IS40(pi->radio_chanspec)) - hpf_code = 6; - else - hpf_code = 7; - - mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); - mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); - - for (ctr = 0; ctr < 4; ctr++) { - regval[ctr] = (hpf_code << 8) | 0x7c; - } - wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); - - wlc_phy_adjust_lnagaintbl_nphy(pi); - - if (pi->nphy_elna_gain_config) { - regval[0] = 0; - regval[1] = 1; - regval[2] = 1; - regval[3] = 1; - wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); - wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); - - for (ctr = 0; ctr < 4; ctr++) { - regval[ctr] = (hpf_code << 8) | 0x74; - } - wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); - } - - if (NREV_IS(pi->pubpi.phy_rev, 2)) { - for (ctr = 0; ctr < 21; ctr++) { - regval[ctr] = 3 * ctr; - } - wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); - wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); - - for (ctr = 0; ctr < 21; ctr++) { - regval[ctr] = (u16) ctr; - } - wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); - wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); - } - - wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, - rfseq_updategainu_events, - rfseq_updategainu_dlys, - sizeof(rfseq_updategainu_events) / - sizeof(rfseq_updategainu_events[0])); - - mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); - - if (CHSPEC_IS2G(pi->radio_chanspec)) - mod_phy_reg(pi, - (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), - 0x7f, 0x4); - } -} - -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi) -{ - s8 lna1_gain_db[] = { 8, 13, 17, 22 }; - s8 lna2_gain_db[] = { -2, 7, 11, 15 }; - s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; - s8 tia_gainbits[] = { - 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; - - mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); - mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); - - mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); - - mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); - mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, - lna1_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, - lna1_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, - lna2_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, - lna2_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, - tia_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, - tia_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, - tia_gainbits); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, - tia_gainbits); - - write_phy_reg(pi, 0x37, 0x74); - write_phy_reg(pi, 0x2ad, 0x74); - write_phy_reg(pi, 0x38, 0x18); - write_phy_reg(pi, 0x2ae, 0x18); - - write_phy_reg(pi, 0x2b, 0xe8); - write_phy_reg(pi, 0x41, 0xe8); - - if (CHSPEC_IS20(pi->radio_chanspec)) { - - mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); - mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); - } else { - - mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); - mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); - } -} - -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi) -{ - u16 currband; - s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; - s8 *lna1_gain_db = NULL; - s8 *lna1_gain_db_2 = NULL; - s8 *lna2_gain_db = NULL; - s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; - s8 *tia_gain_db; - s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; - s8 *tia_gainbits; - u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; - u16 *rfseq_init_gain; - u16 init_gaincode; - u16 clip1hi_gaincode; - u16 clip1md_gaincode = 0; - u16 clip1md_gaincode_B; - u16 clip1lo_gaincode; - u16 clip1lo_gaincode_B; - u8 crsminl_th = 0; - u8 crsminu_th; - u16 nbclip_th = 0; - u8 w1clip_th; - u16 freq; - s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; - u8 chg_nbclip_th = 0; - - mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); - mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); - - currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; - if (currband == 0) { - - lna1_gain_db = lna1G_gain_db_rev7; - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, - lna1_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, - lna1_gain_db); - - mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); - - if (CHSPEC_IS40(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); - mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); - } - - mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); - - if (CHSPEC_IS20(pi->radio_chanspec)) { - mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); - mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); - } - } else { - - init_gaincode = 0x9e; - clip1hi_gaincode = 0x9e; - clip1md_gaincode_B = 0x24; - clip1lo_gaincode = 0x8a; - clip1lo_gaincode_B = 8; - rfseq_init_gain = rfseqA_init_gain_rev7; - - tia_gain_db = tiaA_gain_db_rev7; - tia_gainbits = tiaA_gainbits_rev7; - - freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); - if (CHSPEC_IS20(pi->radio_chanspec)) { - - w1clip_th = 25; - clip1md_gaincode = 0x82; - - if ((freq <= 5080) || (freq == 5825)) { - - s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; - s8 lna1A_gain_db_2_rev7[] = { - 11, 17, 22, 25 }; - s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; - - crsminu_th = 0x3e; - lna1_gain_db = lna1A_gain_db_rev7; - lna1_gain_db_2 = lna1A_gain_db_2_rev7; - lna2_gain_db = lna2A_gain_db_rev7; - } else if ((freq >= 5500) && (freq <= 5700)) { - - s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; - s8 lna1A_gain_db_2_rev7[] = { - 12, 18, 22, 26 }; - s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; - - crsminu_th = 0x45; - clip1md_gaincode_B = 0x14; - nbclip_th = 0xff; - chg_nbclip_th = 1; - lna1_gain_db = lna1A_gain_db_rev7; - lna1_gain_db_2 = lna1A_gain_db_2_rev7; - lna2_gain_db = lna2A_gain_db_rev7; - } else { - - s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; - s8 lna1A_gain_db_2_rev7[] = { - 12, 18, 22, 26 }; - s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; - - crsminu_th = 0x41; - lna1_gain_db = lna1A_gain_db_rev7; - lna1_gain_db_2 = lna1A_gain_db_2_rev7; - lna2_gain_db = lna2A_gain_db_rev7; - } - - if (freq <= 4920) { - nvar_baseline_offset0 = 5; - nvar_baseline_offset1 = 5; - } else if ((freq > 4920) && (freq <= 5320)) { - nvar_baseline_offset0 = 3; - nvar_baseline_offset1 = 5; - } else if ((freq > 5320) && (freq <= 5700)) { - nvar_baseline_offset0 = 3; - nvar_baseline_offset1 = 2; - } else { - nvar_baseline_offset0 = 4; - nvar_baseline_offset1 = 0; - } - } else { - - crsminu_th = 0x3a; - crsminl_th = 0x3a; - w1clip_th = 20; - - if ((freq >= 4920) && (freq <= 5320)) { - nvar_baseline_offset0 = 4; - nvar_baseline_offset1 = 5; - } else if ((freq > 5320) && (freq <= 5550)) { - nvar_baseline_offset0 = 4; - nvar_baseline_offset1 = 2; - } else { - nvar_baseline_offset0 = 5; - nvar_baseline_offset1 = 3; - } - } - - write_phy_reg(pi, 0x20, init_gaincode); - write_phy_reg(pi, 0x2a7, init_gaincode); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - pi->pubpi.phy_corenum, 0x106, 16, - rfseq_init_gain); - - write_phy_reg(pi, 0x22, clip1hi_gaincode); - write_phy_reg(pi, 0x2a9, clip1hi_gaincode); - - write_phy_reg(pi, 0x36, clip1md_gaincode_B); - write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); - - write_phy_reg(pi, 0x37, clip1lo_gaincode); - write_phy_reg(pi, 0x2ad, clip1lo_gaincode); - write_phy_reg(pi, 0x38, clip1lo_gaincode_B); - write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, - tia_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, - tia_gain_db); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, - tia_gainbits); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, - tia_gainbits); - - mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); - - if (chg_nbclip_th == 1) { - write_phy_reg(pi, 0x2b, nbclip_th); - write_phy_reg(pi, 0x41, nbclip_th); - } - - mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); - mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); - - mod_phy_reg(pi, 0x2e4, - (0x3f << 0), (nvar_baseline_offset0 << 0)); - - mod_phy_reg(pi, 0x2e4, - (0x3f << 6), (nvar_baseline_offset1 << 6)); - - if (CHSPEC_IS20(pi->radio_chanspec)) { - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, - lna1_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, - lna1_gain_db_2); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, - 8, lna2_gain_db); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, - 8, lna2_gain_db); - - write_phy_reg(pi, 0x24, clip1md_gaincode); - write_phy_reg(pi, 0x2ab, clip1md_gaincode); - } else { - mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); - } - - } - -} - -static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi) -{ - uint core; - int ctr; - s16 gain_delta[2]; - u8 curr_channel; - u16 minmax_gain[2]; - u16 regval[4]; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (pi->nphy_gain_boost) { - if ((CHSPEC_IS2G(pi->radio_chanspec))) { - - gain_delta[0] = 6; - gain_delta[1] = 6; - } else { - - curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); - gain_delta[0] = - (s16) - PHY_HW_ROUND(((nphy_lnagain_est0[0] * - curr_channel) + - nphy_lnagain_est0[1]), 13); - gain_delta[1] = - (s16) - PHY_HW_ROUND(((nphy_lnagain_est1[0] * - curr_channel) + - nphy_lnagain_est1[1]), 13); - } - } else { - - gain_delta[0] = 0; - gain_delta[1] = 0; - } - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (pi->nphy_elna_gain_config) { - - regval[0] = nphy_def_lnagains[2] + gain_delta[core]; - regval[1] = nphy_def_lnagains[3] + gain_delta[core]; - regval[2] = nphy_def_lnagains[3] + gain_delta[core]; - regval[3] = nphy_def_lnagains[3] + gain_delta[core]; - } else { - for (ctr = 0; ctr < 4; ctr++) { - regval[ctr] = - nphy_def_lnagains[ctr] + gain_delta[core]; - } - } - wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); - - minmax_gain[core] = - (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); - } - - mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); - mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on) -{ - if (on) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (!pi->radio_is_on) { - wlc_phy_radio_preinit_205x(pi); - wlc_phy_radio_init_2057(pi); - wlc_phy_radio_postinit_2057(pi); - } - - wlc_phy_chanspec_set((wlc_phy_t *) pi, - pi->radio_chanspec); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_radio_preinit_205x(pi); - wlc_phy_radio_init_2056(pi); - wlc_phy_radio_postinit_2056(pi); - - wlc_phy_chanspec_set((wlc_phy_t *) pi, - pi->radio_chanspec); - } else { - wlc_phy_radio_preinit_2055(pi); - wlc_phy_radio_init_2055(pi); - wlc_phy_radio_postinit_2055(pi); - } - - pi->radio_is_on = true; - - } else { - - if (NREV_GE(pi->pubpi.phy_rev, 3) - && NREV_LT(pi->pubpi.phy_rev, 7)) { - and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); - mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); - - write_radio_reg(pi, - RADIO_2056_TX_PADA_BOOST_TUNE | - RADIO_2056_TX0, 0); - write_radio_reg(pi, - RADIO_2056_TX_PADG_BOOST_TUNE | - RADIO_2056_TX0, 0); - write_radio_reg(pi, - RADIO_2056_TX_PGAA_BOOST_TUNE | - RADIO_2056_TX0, 0); - write_radio_reg(pi, - RADIO_2056_TX_PGAG_BOOST_TUNE | - RADIO_2056_TX0, 0); - mod_radio_reg(pi, - RADIO_2056_TX_MIXA_BOOST_TUNE | - RADIO_2056_TX0, 0xf0, 0); - write_radio_reg(pi, - RADIO_2056_TX_MIXG_BOOST_TUNE | - RADIO_2056_TX0, 0); - - write_radio_reg(pi, - RADIO_2056_TX_PADA_BOOST_TUNE | - RADIO_2056_TX1, 0); - write_radio_reg(pi, - RADIO_2056_TX_PADG_BOOST_TUNE | - RADIO_2056_TX1, 0); - write_radio_reg(pi, - RADIO_2056_TX_PGAA_BOOST_TUNE | - RADIO_2056_TX1, 0); - write_radio_reg(pi, - RADIO_2056_TX_PGAG_BOOST_TUNE | - RADIO_2056_TX1, 0); - mod_radio_reg(pi, - RADIO_2056_TX_MIXA_BOOST_TUNE | - RADIO_2056_TX1, 0xf0, 0); - write_radio_reg(pi, - RADIO_2056_TX_MIXG_BOOST_TUNE | - RADIO_2056_TX1, 0); - - pi->radio_is_on = false; - } - - if (NREV_GE(pi->pubpi.phy_rev, 8)) { - and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); - pi->radio_is_on = false; - } - - } -} - -static void wlc_phy_radio_preinit_2055(phy_info_t *pi) -{ - - and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); - or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); - - or_phy_reg(pi, 0x78, RFCC_POR_FORCE); -} - -static void wlc_phy_radio_init_2055(phy_info_t *pi) -{ - wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); -} - -static void wlc_phy_radio_postinit_2055(phy_info_t *pi) -{ - - and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, - ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); - - if (((pi->sh->sromrev >= 4) - && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) - || ((pi->sh->sromrev < 4))) { - and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); - and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); - } - - mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); - write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); - - and_radio_reg(pi, RADIO_2055_CAL_MISC, - ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); - - or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); - - or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); - - udelay(1000); - - or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); - - SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & - RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); - - if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & - RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, - "HW error: radio calibration1\n")) - return; - - and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, - ~(RADIO_2055_CAL_LPO_ENABLE)); - - wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); - - write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); - write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); - - write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); - write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); - - mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, - RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); - mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, - RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); - if (pi->nphy_gain_boost) { - and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, - ~(RADIO_2055_GAINBST_DISABLE)); - and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, - ~(RADIO_2055_GAINBST_DISABLE)); - } else { - or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, - RADIO_2055_GAINBST_DISABLE); - or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, - RADIO_2055_GAINBST_DISABLE); - } - - udelay(2); -} - -static void wlc_phy_radio_preinit_205x(phy_info_t *pi) -{ - - and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); - and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); - - or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); - or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); - -} - -static void wlc_phy_radio_init_2056(phy_info_t *pi) -{ - radio_regs_t *regs_SYN_2056_ptr = NULL; - radio_regs_t *regs_TX_2056_ptr = NULL; - radio_regs_t *regs_RX_2056_ptr = NULL; - - if (NREV_IS(pi->pubpi.phy_rev, 3)) { - regs_SYN_2056_ptr = regs_SYN_2056; - regs_TX_2056_ptr = regs_TX_2056; - regs_RX_2056_ptr = regs_RX_2056; - } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { - regs_SYN_2056_ptr = regs_SYN_2056_A1; - regs_TX_2056_ptr = regs_TX_2056_A1; - regs_RX_2056_ptr = regs_RX_2056_A1; - } else { - switch (pi->pubpi.radiorev) { - case 5: - regs_SYN_2056_ptr = regs_SYN_2056_rev5; - regs_TX_2056_ptr = regs_TX_2056_rev5; - regs_RX_2056_ptr = regs_RX_2056_rev5; - break; - - case 6: - regs_SYN_2056_ptr = regs_SYN_2056_rev6; - regs_TX_2056_ptr = regs_TX_2056_rev6; - regs_RX_2056_ptr = regs_RX_2056_rev6; - break; - - case 7: - case 9: - regs_SYN_2056_ptr = regs_SYN_2056_rev7; - regs_TX_2056_ptr = regs_TX_2056_rev7; - regs_RX_2056_ptr = regs_RX_2056_rev7; - break; - - case 8: - regs_SYN_2056_ptr = regs_SYN_2056_rev8; - regs_TX_2056_ptr = regs_TX_2056_rev8; - regs_RX_2056_ptr = regs_RX_2056_rev8; - break; - - case 11: - regs_SYN_2056_ptr = regs_SYN_2056_rev11; - regs_TX_2056_ptr = regs_TX_2056_rev11; - regs_RX_2056_ptr = regs_RX_2056_rev11; - break; - - default: - break; - } - } - - wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); - - wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); - - wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); - - wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); - - wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); -} - -static void wlc_phy_radio_postinit_2056(phy_info_t *pi) -{ - mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); - - mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); - mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); - udelay(1000); - mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); - - if ((pi->sh->boardflags2 & BFL2_LEGACY) - || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) { - - mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); - } else { - - mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); - } - - mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); - - if (pi->phy_init_por) { - wlc_phy_radio205x_rcal(pi); - } -} - -static void wlc_phy_radio_init_2057(phy_info_t *pi) -{ - radio_20xx_regs_t *regs_2057_ptr = NULL; - - if (NREV_IS(pi->pubpi.phy_rev, 7)) { - - regs_2057_ptr = regs_2057_rev4; - } else if (NREV_IS(pi->pubpi.phy_rev, 8) - || NREV_IS(pi->pubpi.phy_rev, 9)) { - switch (pi->pubpi.radiorev) { - case 5: - - if (pi->pubpi.radiover == 0x0) { - - regs_2057_ptr = regs_2057_rev5; - - } else if (pi->pubpi.radiover == 0x1) { - - regs_2057_ptr = regs_2057_rev5v1; - } else { - break; - } - - case 7: - - regs_2057_ptr = regs_2057_rev7; - break; - - case 8: - - regs_2057_ptr = regs_2057_rev8; - break; - - default: - break; - } - } - - wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); -} - -static void wlc_phy_radio_postinit_2057(phy_info_t *pi) -{ - - mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); - - if (pi->sh->chip == !BCM6362_CHIP_ID) { - - mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x2, 0x2); - } - - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); - mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); - mdelay(2); - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); - mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); - - if (pi->phy_init_por) { - wlc_phy_radio205x_rcal(pi); - wlc_phy_radio2057_rccal(pi); - } - - mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); -} - -static bool -wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, - chan_info_nphy_radio2057_t **t0, - chan_info_nphy_radio205x_t **t1, - chan_info_nphy_radio2057_rev5_t **t2, - chan_info_nphy_2055_t **t3) -{ - uint i; - chan_info_nphy_radio2057_t *chan_info_tbl_p_0 = NULL; - chan_info_nphy_radio205x_t *chan_info_tbl_p_1 = NULL; - chan_info_nphy_radio2057_rev5_t *chan_info_tbl_p_2 = NULL; - u32 tbl_len = 0; - - int freq = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if (NREV_IS(pi->pubpi.phy_rev, 7)) { - - chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; - tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); - - } else if (NREV_IS(pi->pubpi.phy_rev, 8) - || NREV_IS(pi->pubpi.phy_rev, 9)) { - switch (pi->pubpi.radiorev) { - - case 5: - - if (pi->pubpi.radiover == 0x0) { - - chan_info_tbl_p_2 = - chan_info_nphyrev8_2057_rev5; - tbl_len = - ARRAY_SIZE - (chan_info_nphyrev8_2057_rev5); - - } else if (pi->pubpi.radiover == 0x1) { - - chan_info_tbl_p_2 = - chan_info_nphyrev9_2057_rev5v1; - tbl_len = - ARRAY_SIZE - (chan_info_nphyrev9_2057_rev5v1); - - } - break; - - case 7: - chan_info_tbl_p_0 = - chan_info_nphyrev8_2057_rev7; - tbl_len = - ARRAY_SIZE(chan_info_nphyrev8_2057_rev7); - break; - - case 8: - chan_info_tbl_p_0 = - chan_info_nphyrev8_2057_rev8; - tbl_len = - ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); - break; - - default: - if (NORADIO_ENAB(pi->pubpi)) { - goto fail; - } - break; - } - } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { - - chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; - tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); - } else { - goto fail; - } - - for (i = 0; i < tbl_len; i++) { - if (pi->pubpi.radiorev == 5) { - - if (chan_info_tbl_p_2[i].chan == channel) - break; - } else { - - if (chan_info_tbl_p_0[i].chan == channel) - break; - } - } - - if (i >= tbl_len) { - goto fail; - } - if (pi->pubpi.radiorev == 5) { - *t2 = &chan_info_tbl_p_2[i]; - freq = chan_info_tbl_p_2[i].freq; - } else { - *t0 = &chan_info_tbl_p_0[i]; - freq = chan_info_tbl_p_0[i].freq; - } - - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (NREV_IS(pi->pubpi.phy_rev, 3)) { - chan_info_tbl_p_1 = chan_info_nphyrev3_2056; - tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); - } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { - chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; - tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); - } else if (NREV_IS(pi->pubpi.phy_rev, 5) - || NREV_IS(pi->pubpi.phy_rev, 6)) { - switch (pi->pubpi.radiorev) { - case 5: - chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; - tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); - break; - case 6: - chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; - tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); - break; - case 7: - case 9: - chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; - tbl_len = - ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); - break; - case 8: - chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; - tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); - break; - case 11: - chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; - tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v11); - break; - default: - if (NORADIO_ENAB(pi->pubpi)) { - goto fail; - } - break; - } - } - - for (i = 0; i < tbl_len; i++) { - if (chan_info_tbl_p_1[i].chan == channel) - break; - } - - if (i >= tbl_len) { - goto fail; - } - *t1 = &chan_info_tbl_p_1[i]; - freq = chan_info_tbl_p_1[i].freq; - - } else { - for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) - if (chan_info_nphy_2055[i].chan == channel) - break; - - if (i >= ARRAY_SIZE(chan_info_nphy_2055)) { - goto fail; - } - *t3 = &chan_info_nphy_2055[i]; - freq = chan_info_nphy_2055[i].freq; - } - - *f = freq; - return true; - - fail: - *f = WL_CHAN_FREQ_RANGE_2G; - return false; -} - -u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) -{ - int freq; - chan_info_nphy_radio2057_t *t0 = NULL; - chan_info_nphy_radio205x_t *t1 = NULL; - chan_info_nphy_radio2057_rev5_t *t2 = NULL; - chan_info_nphy_2055_t *t3 = NULL; - - if (NORADIO_ENAB(pi->pubpi)) - return WL_CHAN_FREQ_RANGE_2G; - - if (channel == 0) - channel = CHSPEC_CHANNEL(pi->radio_chanspec); - - wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); - - if (CHSPEC_IS2G(pi->radio_chanspec)) - return WL_CHAN_FREQ_RANGE_2G; - - if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) { - return WL_CHAN_FREQ_RANGE_5GL; - } else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) { - return WL_CHAN_FREQ_RANGE_5GM; - } else { - return WL_CHAN_FREQ_RANGE_5GH; - } -} - -static void -wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) -{ - - write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); - write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); - write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); - write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); - write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); - write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); - write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); - write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); - write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); - write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, - ci->RF_core1_lgbuf_a_tune); - write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, - ci->RF_core1_lgbuf_g_tune); - write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); - write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, - ci->RF_core1_tx_pga_pad_tn); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, - ci->RF_core1_tx_mx_bgtrim); - write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, - ci->RF_core2_lgbuf_a_tune); - write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, - ci->RF_core2_lgbuf_g_tune); - write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, - ci->RF_core2_tx_pga_pad_tn); - write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, - ci->RF_core2_tx_mx_bgtrim); - - udelay(50); - - write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); - write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); - - WLC_PHY_WAR_PR51571(pi); - - write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); - - udelay(300); -} - -static void -wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, - const chan_info_nphy_radio205x_t *ci) -{ - radio_regs_t *regs_SYN_2056_ptr = NULL; - - write_radio_reg(pi, - RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, - ci->RF_SYN_pll_vcocal1); - write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, - ci->RF_SYN_pll_vcocal2); - write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, - ci->RF_SYN_pll_refdiv); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, - ci->RF_SYN_pll_mmd2); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, - ci->RF_SYN_pll_mmd1); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, - ci->RF_SYN_pll_loopfilter1); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, - ci->RF_SYN_pll_loopfilter2); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, - ci->RF_SYN_pll_loopfilter3); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, - ci->RF_SYN_pll_loopfilter4); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, - ci->RF_SYN_pll_loopfilter5); - write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, - ci->RF_SYN_reserved_addr27); - write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, - ci->RF_SYN_reserved_addr28); - write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, - ci->RF_SYN_reserved_addr29); - write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, - ci->RF_SYN_logen_VCOBUF1); - write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, - ci->RF_SYN_logen_MIXER2); - write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, - ci->RF_SYN_logen_BUF3); - write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, - ci->RF_SYN_logen_BUF4); - - write_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, - ci->RF_RX0_lnaa_tune); - write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, - ci->RF_RX0_lnag_tune); - write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_intpaa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_intpag_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_pada_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_padg_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_pgaa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_pgag_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_mixa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, - ci->RF_TX0_mixg_boost_tune); - - write_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, - ci->RF_RX1_lnaa_tune); - write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, - ci->RF_RX1_lnag_tune); - write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_intpaa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_intpag_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_pada_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_padg_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_pgaa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_pgag_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_mixa_boost_tune); - write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, - ci->RF_TX1_mixg_boost_tune); - - if (NREV_IS(pi->pubpi.phy_rev, 3)) - regs_SYN_2056_ptr = regs_SYN_2056; - else if (NREV_IS(pi->pubpi.phy_rev, 4)) - regs_SYN_2056_ptr = regs_SYN_2056_A1; - else { - switch (pi->pubpi.radiorev) { - case 5: - regs_SYN_2056_ptr = regs_SYN_2056_rev5; - break; - case 6: - regs_SYN_2056_ptr = regs_SYN_2056_rev6; - break; - case 7: - case 9: - regs_SYN_2056_ptr = regs_SYN_2056_rev7; - break; - case 8: - regs_SYN_2056_ptr = regs_SYN_2056_rev8; - break; - case 11: - regs_SYN_2056_ptr = regs_SYN_2056_rev11; - break; - } - } - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, - (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); - } else { - write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, - (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); - } - - if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | - RADIO_2056_SYN, 0x1f); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | - RADIO_2056_SYN, 0x1f); - - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID)) { - - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER4 | - RADIO_2056_SYN, 0x14); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, 0x00); - } else { - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER4 | - RADIO_2056_SYN, 0xb); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, 0x14); - } - } - } - - if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && - (CHSPEC_IS2G(pi->radio_chanspec))) { - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, - 0x1f); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, - 0x1f); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, - 0xb); - write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, - 0x20); - } - - if (pi->sh->boardflags2 & BFL2_APLL_WAR) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | - RADIO_2056_SYN, 0x1f); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | - RADIO_2056_SYN, 0x1f); - write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | - RADIO_2056_SYN, 0x5); - write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, 0xc); - } - } - - if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { - u16 pag_boost_tune; - u16 padg_boost_tune; - u16 pgag_boost_tune; - u16 mixg_boost_tune; - u16 bias, cascbias; - uint core; - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - if (NREV_GE(pi->pubpi.phy_rev, 5)) { - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PADG_IDAC, 0xcc); - - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == - BCM47162_CHIP_ID)) { - bias = 0x40; - cascbias = 0x45; - pag_boost_tune = 0x5; - pgag_boost_tune = 0x33; - padg_boost_tune = 0x77; - mixg_boost_tune = 0x55; - } else { - bias = 0x25; - cascbias = 0x20; - - if ((pi->sh->chip == - BCM43224_CHIP_ID) - || (pi->sh->chip == - BCM43225_CHIP_ID) - || (pi->sh->chip == - BCM43421_CHIP_ID)) { - if (pi->sh->chippkg == - BCM43224_FAB_SMIC) { - bias = 0x2a; - cascbias = 0x38; - } - } - - pag_boost_tune = 0x4; - pgag_boost_tune = 0x03; - padg_boost_tune = 0x77; - mixg_boost_tune = 0x65; - } - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_IMAIN_STAT, bias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_IAUX_STAT, bias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_CASCBIAS, cascbias); - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_BOOST_TUNE, - pag_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PGAG_BOOST_TUNE, - pgag_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PADG_BOOST_TUNE, - padg_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - MIXG_BOOST_TUNE, - mixg_boost_tune); - } else { - - bias = IS40MHZ(pi) ? 0x40 : 0x20; - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_IMAIN_STAT, bias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_IAUX_STAT, bias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_CASCBIAS, 0x30); - } - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, - 0xee); - } - } - - if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) - && CHSPEC_IS5G(pi->radio_chanspec)) { - u16 paa_boost_tune; - u16 pada_boost_tune; - u16 pgaa_boost_tune; - u16 mixa_boost_tune; - u16 freq, pabias, cascbias; - uint core; - - freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); - - if (freq < 5150) { - - paa_boost_tune = 0xa; - pada_boost_tune = 0x77; - pgaa_boost_tune = 0xf; - mixa_boost_tune = 0xf; - } else if (freq < 5340) { - - paa_boost_tune = 0x8; - pada_boost_tune = 0x77; - pgaa_boost_tune = 0xfb; - mixa_boost_tune = 0xf; - } else if (freq < 5650) { - - paa_boost_tune = 0x0; - pada_boost_tune = 0x77; - pgaa_boost_tune = 0xb; - mixa_boost_tune = 0xf; - } else { - - paa_boost_tune = 0x0; - pada_boost_tune = 0x77; - if (freq != 5825) { - pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; - } else { - pgaa_boost_tune = 6; - } - mixa_boost_tune = 0xf; - } - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_BOOST_TUNE, paa_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PADA_BOOST_TUNE, pada_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PGAA_BOOST_TUNE, pgaa_boost_tune); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - MIXA_BOOST_TUNE, mixa_boost_tune); - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TXSPARE1, 0x30); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PA_SPARE2, 0xee); - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - PADA_CASCBIAS, 0x3); - - cascbias = 0x30; - - if ((pi->sh->chip == BCM43224_CHIP_ID) || - (pi->sh->chip == BCM43225_CHIP_ID) || - (pi->sh->chip == BCM43421_CHIP_ID)) { - if (pi->sh->chippkg == BCM43224_FAB_SMIC) { - cascbias = 0x35; - } - } - - pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_IAUX_STAT, pabias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_IMAIN_STAT, pabias); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_CASCBIAS, cascbias); - } - } - - udelay(50); - - wlc_phy_radio205x_vcocal_nphy(pi); -} - -void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi) -{ - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, - (1 << 2)); - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); - } - - udelay(300); -} - -#define MAX_205x_RCAL_WAITLOOPS 10000 - -static u16 wlc_phy_radio205x_rcal(phy_info_t *pi) -{ - u16 rcal_reg = 0; - int i; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if (pi->pubpi.radiorev == 5) { - - and_phy_reg(pi, 0x342, ~(0x1 << 1)); - - udelay(10); - - mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); - mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, - 0x1); - } - mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); - - udelay(10); - - mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); - - for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { - rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); - if (rcal_reg & 0x1) { - break; - } - udelay(100); - } - - if (WARN(i == MAX_205x_RCAL_WAITLOOPS, - "HW error: radio calib2")) - return 0; - - mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); - - rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; - - mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); - if (pi->pubpi.radiorev == 5) { - - mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); - mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, - 0x0); - } - - if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { - - mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, - rcal_reg); - mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, - rcal_reg << 2); - } - - } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { - u16 savereg; - - savereg = - read_radio_reg(pi, - RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN); - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, - savereg | 0x7); - udelay(10); - - write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, - 0x1); - udelay(10); - - write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, - 0x9); - - for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { - rcal_reg = read_radio_reg(pi, - RADIO_2056_SYN_RCAL_CODE_OUT | - RADIO_2056_SYN); - if (rcal_reg & 0x80) { - break; - } - udelay(100); - } - - if (WARN(i == MAX_205x_RCAL_WAITLOOPS, - "HW error: radio calib3")) - return 0; - - write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, - 0x1); - - rcal_reg = - read_radio_reg(pi, - RADIO_2056_SYN_RCAL_CODE_OUT | - RADIO_2056_SYN); - - write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, - 0x0); - - write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, - savereg); - - return rcal_reg & 0x1f; - } - return rcal_reg & 0x3e; -} - -static void -wlc_phy_chanspec_radio2057_setup(phy_info_t *pi, - const chan_info_nphy_radio2057_t *ci, - const chan_info_nphy_radio2057_rev5_t *ci2) -{ - int coreNum; - u16 txmix2g_tune_boost_pu = 0; - u16 pad2g_tune_pus = 0; - - if (pi->pubpi.radiorev == 5) { - - write_radio_reg(pi, - RADIO_2057_VCOCAL_COUNTVAL0, - ci2->RF_vcocal_countval0); - write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, - ci2->RF_vcocal_countval1); - write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, - ci2->RF_rfpll_refmaster_sparextalsize); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - ci2->RF_rfpll_loopfilter_r1); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - ci2->RF_rfpll_loopfilter_c2); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - ci2->RF_rfpll_loopfilter_c1); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, - ci2->RF_cp_kpd_idac); - write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); - write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); - write_radio_reg(pi, - RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); - write_radio_reg(pi, - RADIO_2057_LOGEN_MX2G_TUNE, - ci2->RF_logen_mx2g_tune); - write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, - ci2->RF_logen_indbuf2g_tune); - - write_radio_reg(pi, - RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, - ci2->RF_txmix2g_tune_boost_pu_core0); - write_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE0, - ci2->RF_pad2g_tune_pus_core0); - write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, - ci2->RF_lna2g_tune_core0); - - write_radio_reg(pi, - RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, - ci2->RF_txmix2g_tune_boost_pu_core1); - write_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE1, - ci2->RF_pad2g_tune_pus_core1); - write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, - ci2->RF_lna2g_tune_core1); - - } else { - - write_radio_reg(pi, - RADIO_2057_VCOCAL_COUNTVAL0, - ci->RF_vcocal_countval0); - write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, - ci->RF_vcocal_countval1); - write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, - ci->RF_rfpll_refmaster_sparextalsize); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - ci->RF_rfpll_loopfilter_r1); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - ci->RF_rfpll_loopfilter_c2); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - ci->RF_rfpll_loopfilter_c1); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); - write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); - write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); - write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); - write_radio_reg(pi, - RADIO_2057_LOGEN_MX2G_TUNE, - ci->RF_logen_mx2g_tune); - write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, - ci->RF_logen_mx5g_tune); - write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, - ci->RF_logen_indbuf2g_tune); - write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, - ci->RF_logen_indbuf5g_tune); - - write_radio_reg(pi, - RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, - ci->RF_txmix2g_tune_boost_pu_core0); - write_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE0, - ci->RF_pad2g_tune_pus_core0); - write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, - ci->RF_pga_boost_tune_core0); - write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, - ci->RF_txmix5g_boost_tune_core0); - write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, - ci->RF_pad5g_tune_misc_pus_core0); - write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, - ci->RF_lna2g_tune_core0); - write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, - ci->RF_lna5g_tune_core0); - - write_radio_reg(pi, - RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, - ci->RF_txmix2g_tune_boost_pu_core1); - write_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE1, - ci->RF_pad2g_tune_pus_core1); - write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, - ci->RF_pga_boost_tune_core1); - write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, - ci->RF_txmix5g_boost_tune_core1); - write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, - ci->RF_pad5g_tune_misc_pus_core1); - write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, - ci->RF_lna2g_tune_core1); - write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, - ci->RF_lna5g_tune_core1); - } - - if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - 0x3f); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - 0x8); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - 0x8); - } else { - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - 0x1f); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - 0x8); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - 0x8); - } - } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || - (pi->pubpi.radiorev == 8)) { - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - 0x1b); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - 0xa); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - 0xa); - } else { - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, - 0x1f); - write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, - 0x8); - write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, - 0x8); - } - - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (PHY_IPA(pi)) { - if (pi->pubpi.radiorev == 3) { - txmix2g_tune_boost_pu = 0x6b; - } - - if (pi->pubpi.radiorev == 5) - pad2g_tune_pus = 0x73; - - } else { - if (pi->pubpi.radiorev != 5) { - pad2g_tune_pus = 0x3; - - txmix2g_tune_boost_pu = 0x61; - } - } - - for (coreNum = 0; coreNum <= 1; coreNum++) { - - if (txmix2g_tune_boost_pu != 0) - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, - TXMIX2G_TUNE_BOOST_PU, - txmix2g_tune_boost_pu); - - if (pad2g_tune_pus != 0) - WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, - PAD2G_TUNE_PUS, - pad2g_tune_pus); - } - } - - udelay(50); - - wlc_phy_radio205x_vcocal_nphy(pi); -} - -static u16 wlc_phy_radio2057_rccal(phy_info_t *pi) -{ - u16 rccal_valid; - int i; - bool chip43226_6362A0; - - chip43226_6362A0 = ((pi->pubpi.radiorev == 3) - || (pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)); - - rccal_valid = 0; - if (chip43226_6362A0) { - write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); - } else { - write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); - - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); - } - write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); - - for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { - rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); - if (rccal_valid & 0x2) { - break; - } - udelay(500); - } - - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); - - rccal_valid = 0; - if (chip43226_6362A0) { - write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); - } else { - write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); - - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); - } - write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); - - for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { - rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); - if (rccal_valid & 0x2) { - break; - } - udelay(500); - } - - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); - - rccal_valid = 0; - if (chip43226_6362A0) { - write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); - - write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); - } else { - write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); - write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); - write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); - } - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); - - for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { - rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); - if (rccal_valid & 0x2) { - break; - } - udelay(500); - } - - if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) - return 0; - - write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); - - return rccal_valid; -} - -static void -wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, u16 reduction_factr) -{ - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { - if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && - CHSPEC_IS40(pi->radio_chanspec)) { - if (!pi->nphy_anarxlpf_adjusted) { - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_LPC | - RADIO_2056_RX0), - ((pi->nphy_rccal_value + - reduction_factr) | 0x80)); - - pi->nphy_anarxlpf_adjusted = true; - } - } else { - if (pi->nphy_anarxlpf_adjusted) { - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_LPC | - RADIO_2056_RX0), - (pi->nphy_rccal_value | 0x80)); - - pi->nphy_anarxlpf_adjusted = false; - } - } - } -} - -static void -wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *tone_id_buf, - u32 *noise_var_buf) -{ - int i; - u32 offset; - int tone_id; - int tbllen = - CHSPEC_IS40(pi-> - radio_chanspec) ? NPHY_NOISEVAR_TBLLEN40 : - NPHY_NOISEVAR_TBLLEN20; - - if (pi->nphy_noisevars_adjusted) { - for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { - tone_id = pi->nphy_saved_noisevars.tone_id[i]; - offset = (tone_id >= 0) ? - ((tone_id * 2) + 1) : (tbllen + (tone_id * 2) + 1); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - offset, 32, - (void *)&pi-> - nphy_saved_noisevars. - min_noise_vars[i]); - } - - pi->nphy_saved_noisevars.bufcount = 0; - pi->nphy_noisevars_adjusted = false; - } - - if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { - pi->nphy_saved_noisevars.bufcount = 0; - - for (i = 0; i < ntones; i++) { - tone_id = tone_id_buf[i]; - offset = (tone_id >= 0) ? - ((tone_id * 2) + 1) : (tbllen + (tone_id * 2) + 1); - pi->nphy_saved_noisevars.tone_id[i] = tone_id; - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - offset, 32, - &pi->nphy_saved_noisevars. - min_noise_vars[i]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, - offset, 32, - (void *)&noise_var_buf[i]); - pi->nphy_saved_noisevars.bufcount++; - } - - pi->nphy_noisevars_adjusted = true; - } -} - -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr) -{ - u16 regval; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && - CHSPEC_IS40(pi->radio_chanspec)) { - if (!pi->nphy_crsminpwr_adjusted) { - regval = read_phy_reg(pi, 0x27d); - pi->nphy_crsminpwr[0] = regval & 0xff; - regval &= 0xff00; - regval |= (u16) minpwr; - write_phy_reg(pi, 0x27d, regval); - - regval = read_phy_reg(pi, 0x280); - pi->nphy_crsminpwr[1] = regval & 0xff; - regval &= 0xff00; - regval |= (u16) minpwr; - write_phy_reg(pi, 0x280, regval); - - regval = read_phy_reg(pi, 0x283); - pi->nphy_crsminpwr[2] = regval & 0xff; - regval &= 0xff00; - regval |= (u16) minpwr; - write_phy_reg(pi, 0x283, regval); - - pi->nphy_crsminpwr_adjusted = true; - } - } else { - if (pi->nphy_crsminpwr_adjusted) { - regval = read_phy_reg(pi, 0x27d); - regval &= 0xff00; - regval |= pi->nphy_crsminpwr[0]; - write_phy_reg(pi, 0x27d, regval); - - regval = read_phy_reg(pi, 0x280); - regval &= 0xff00; - regval |= pi->nphy_crsminpwr[1]; - write_phy_reg(pi, 0x280, regval); - - regval = read_phy_reg(pi, 0x283); - regval &= 0xff00; - regval |= pi->nphy_crsminpwr[2]; - write_phy_reg(pi, 0x283, regval); - - pi->nphy_crsminpwr_adjusted = false; - } - } - } -} - -static void wlc_phy_txlpfbw_nphy(phy_info_t *pi) -{ - u8 tx_lpf_bw = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS40(pi->radio_chanspec)) { - tx_lpf_bw = 3; - } else { - tx_lpf_bw = 1; - } - - if (PHY_IPA(pi)) { - if (CHSPEC_IS40(pi->radio_chanspec)) { - tx_lpf_bw = 5; - } else { - tx_lpf_bw = 4; - } - } - write_phy_reg(pi, 0xe8, - (tx_lpf_bw << 0) | - (tx_lpf_bw << 3) | - (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); - - if (PHY_IPA(pi)) { - - if (CHSPEC_IS40(pi->radio_chanspec)) { - tx_lpf_bw = 4; - } else { - tx_lpf_bw = 1; - } - - write_phy_reg(pi, 0xe9, - (tx_lpf_bw << 0) | - (tx_lpf_bw << 3) | - (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); - } - } -} - -static void wlc_phy_spurwar_nphy(phy_info_t *pi) -{ - u16 cur_channel = 0; - int nphy_adj_tone_id_buf[] = { 57, 58 }; - u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; - bool isAdjustNoiseVar = false; - uint numTonesAdjust = 0; - u32 tempval = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); - - if (pi->nphy_gband_spurwar_en) { - - wlc_phy_adjust_rx_analpfbw_nphy(pi, - NPHY_ANARXLPFBW_REDUCTIONFACT); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if ((cur_channel == 11) - && CHSPEC_IS40(pi->radio_chanspec)) { - - wlc_phy_adjust_min_noisevar_nphy(pi, 2, - nphy_adj_tone_id_buf, - nphy_adj_noise_var_buf); - } else { - - wlc_phy_adjust_min_noisevar_nphy(pi, 0, - NULL, - NULL); - } - } - wlc_phy_adjust_crsminpwr_nphy(pi, - NPHY_ADJUSTED_MINCRSPOWER); - } - - if ((pi->nphy_gband_spurwar2_en) - && CHSPEC_IS2G(pi->radio_chanspec)) { - - if (CHSPEC_IS40(pi->radio_chanspec)) { - switch (cur_channel) { - case 3: - nphy_adj_tone_id_buf[0] = 57; - nphy_adj_tone_id_buf[1] = 58; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x25f; - isAdjustNoiseVar = true; - break; - case 4: - nphy_adj_tone_id_buf[0] = 41; - nphy_adj_tone_id_buf[1] = 42; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x25f; - isAdjustNoiseVar = true; - break; - case 5: - nphy_adj_tone_id_buf[0] = 25; - nphy_adj_tone_id_buf[1] = 26; - nphy_adj_noise_var_buf[0] = 0x24f; - nphy_adj_noise_var_buf[1] = 0x25f; - isAdjustNoiseVar = true; - break; - case 6: - nphy_adj_tone_id_buf[0] = 9; - nphy_adj_tone_id_buf[1] = 10; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x24f; - isAdjustNoiseVar = true; - break; - case 7: - nphy_adj_tone_id_buf[0] = 121; - nphy_adj_tone_id_buf[1] = 122; - nphy_adj_noise_var_buf[0] = 0x18f; - nphy_adj_noise_var_buf[1] = 0x24f; - isAdjustNoiseVar = true; - break; - case 8: - nphy_adj_tone_id_buf[0] = 105; - nphy_adj_tone_id_buf[1] = 106; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x25f; - isAdjustNoiseVar = true; - break; - case 9: - nphy_adj_tone_id_buf[0] = 89; - nphy_adj_tone_id_buf[1] = 90; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x24f; - isAdjustNoiseVar = true; - break; - case 10: - nphy_adj_tone_id_buf[0] = 73; - nphy_adj_tone_id_buf[1] = 74; - nphy_adj_noise_var_buf[0] = 0x22f; - nphy_adj_noise_var_buf[1] = 0x24f; - isAdjustNoiseVar = true; - break; - default: - isAdjustNoiseVar = false; - break; - } - } - - if (isAdjustNoiseVar) { - numTonesAdjust = sizeof(nphy_adj_tone_id_buf) / - sizeof(nphy_adj_tone_id_buf[0]); - - wlc_phy_adjust_min_noisevar_nphy(pi, - numTonesAdjust, - nphy_adj_tone_id_buf, - nphy_adj_noise_var_buf); - - tempval = 0; - - } else { - - wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, - NULL); - } - } - - if ((pi->nphy_aband_spurwar_en) && - (CHSPEC_IS5G(pi->radio_chanspec))) { - switch (cur_channel) { - case 54: - nphy_adj_tone_id_buf[0] = 32; - nphy_adj_noise_var_buf[0] = 0x25f; - break; - case 38: - case 102: - case 118: - if ((pi->sh->chip == BCM4716_CHIP_ID) && - (pi->sh->chippkg == BCM4717_PKG_ID)) { - nphy_adj_tone_id_buf[0] = 32; - nphy_adj_noise_var_buf[0] = 0x21f; - } else { - nphy_adj_tone_id_buf[0] = 0; - nphy_adj_noise_var_buf[0] = 0x0; - } - break; - case 134: - nphy_adj_tone_id_buf[0] = 32; - nphy_adj_noise_var_buf[0] = 0x21f; - break; - case 151: - nphy_adj_tone_id_buf[0] = 16; - nphy_adj_noise_var_buf[0] = 0x23f; - break; - case 153: - case 161: - nphy_adj_tone_id_buf[0] = 48; - nphy_adj_noise_var_buf[0] = 0x23f; - break; - default: - nphy_adj_tone_id_buf[0] = 0; - nphy_adj_noise_var_buf[0] = 0x0; - break; - } - - if (nphy_adj_tone_id_buf[0] - && nphy_adj_noise_var_buf[0]) { - wlc_phy_adjust_min_noisevar_nphy(pi, 1, - nphy_adj_tone_id_buf, - nphy_adj_noise_var_buf); - } else { - wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, - NULL); - } - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); - } -} - -static void -wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, - const nphy_sfo_cfg_t *ci) -{ - u16 val; - - val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; - if (CHSPEC_IS5G(chanspec) && !val) { - - val = R_REG(&pi->regs->psm_phy_hdr_param); - W_REG(&pi->regs->psm_phy_hdr_param, - (val | MAC_PHY_FORCE_CLK)); - - or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), - (BBCFG_RESETCCA | BBCFG_RESETRX)); - - W_REG(&pi->regs->psm_phy_hdr_param, val); - - or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); - } else if (!CHSPEC_IS5G(chanspec) && val) { - - and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); - - val = R_REG(&pi->regs->psm_phy_hdr_param); - W_REG(&pi->regs->psm_phy_hdr_param, - (val | MAC_PHY_FORCE_CLK)); - - and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), - (u16) (~(BBCFG_RESETCCA | BBCFG_RESETRX))); - - W_REG(&pi->regs->psm_phy_hdr_param, val); - } - - write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); - write_phy_reg(pi, 0x1cf, ci->PHY_BW2); - write_phy_reg(pi, 0x1d0, ci->PHY_BW3); - - write_phy_reg(pi, 0x1d1, ci->PHY_BW4); - write_phy_reg(pi, 0x1d2, ci->PHY_BW5); - write_phy_reg(pi, 0x1d3, ci->PHY_BW6); - - if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { - wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); - - or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); - } else { - wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, - NPHY_ClassifierCtrl_ofdm_en); - - if (CHSPEC_IS2G(chanspec)) - and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); - } - - if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { - wlc_phy_txpwr_fixpower_nphy(pi); - } - - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - - wlc_phy_adjust_lnagaintbl_nphy(pi); - } - - wlc_phy_txlpfbw_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 3) - && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { - u8 spuravoid = 0; - - val = CHSPEC_CHANNEL(chanspec); - if (!CHSPEC_IS40(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if ((val == 13) || (val == 14) || (val == 153)) { - spuravoid = 1; - } - } else { - - if (((val >= 5) && (val <= 8)) || (val == 13) - || (val == 14)) { - spuravoid = 1; - } - } - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (val == 54) { - spuravoid = 1; - } - } else { - - if (pi->nphy_aband_spurwar_en && - ((val == 38) || (val == 102) - || (val == 118))) { - if ((pi->sh->chip == - BCM4716_CHIP_ID) - && (pi->sh->chippkg == - BCM4717_PKG_ID)) { - spuravoid = 0; - } else { - spuravoid = 1; - } - } - } - } - - if (pi->phy_spuravoid == SPURAVOID_FORCEON) - spuravoid = 1; - - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID)) { - si_pmu_spuravoid(pi->sh->sih, spuravoid); - } else { - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); - si_pmu_spuravoid(pi->sh->sih, spuravoid); - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); - } - - if ((pi->sh->chip == BCM43224_CHIP_ID) || - (pi->sh->chip == BCM43225_CHIP_ID) || - (pi->sh->chip == BCM43421_CHIP_ID)) { - - if (spuravoid == 1) { - - W_REG(&pi->regs->tsf_clk_frac_l, - 0x5341); - W_REG(&pi->regs->tsf_clk_frac_h, - 0x8); - } else { - - W_REG(&pi->regs->tsf_clk_frac_l, - 0x8889); - W_REG(&pi->regs->tsf_clk_frac_h, - 0x8); - } - } - - if (!((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID))) { - wlapi_bmac_core_phypll_reset(pi->sh->physhim); - } - - mod_phy_reg(pi, 0x01, (0x1 << 15), - ((spuravoid > 0) ? (0x1 << 15) : 0)); - - wlc_phy_resetcca_nphy(pi); - - pi->phy_isspuravoid = (spuravoid > 0); - } - - if (NREV_LT(pi->pubpi.phy_rev, 7)) - write_phy_reg(pi, 0x17e, 0x3830); - - wlc_phy_spurwar_nphy(pi); -} - -void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) -{ - int freq; - chan_info_nphy_radio2057_t *t0 = NULL; - chan_info_nphy_radio205x_t *t1 = NULL; - chan_info_nphy_radio2057_rev5_t *t2 = NULL; - chan_info_nphy_2055_t *t3 = NULL; - - if (NORADIO_ENAB(pi->pubpi)) { - return; - } - - if (!wlc_phy_chan2freq_nphy - (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) - return; - - wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); - - if (CHSPEC_BW(chanspec) != pi->bw) - wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); - - if (CHSPEC_IS40(chanspec)) { - if (CHSPEC_SB_UPPER(chanspec)) { - or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - or_phy_reg(pi, 0x310, PRIM_SEL_UP20); - } - } else { - and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - and_phy_reg(pi, 0x310, - (~PRIM_SEL_UP20 & 0xffff)); - } - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if ((pi->pubpi.radiorev <= 4) - || (pi->pubpi.radiorev == 6)) { - mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, - 0x2, - (CHSPEC_IS5G(chanspec) ? (1 << 1) - : 0)); - mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, - 0x2, - (CHSPEC_IS5G(chanspec) ? (1 << 1) - : 0)); - } - - wlc_phy_chanspec_radio2057_setup(pi, t0, t2); - wlc_phy_chanspec_nphy_setup(pi, chanspec, - (pi->pubpi.radiorev == - 5) ? (const nphy_sfo_cfg_t - *)&(t2-> - PHY_BW1a) - : (const nphy_sfo_cfg_t *) - &(t0->PHY_BW1a)); - - } else { - - mod_radio_reg(pi, - RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, - 0x4, - (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); - wlc_phy_chanspec_radio2056_setup(pi, t1); - - wlc_phy_chanspec_nphy_setup(pi, chanspec, - (const nphy_sfo_cfg_t *) - &(t1->PHY_BW1a)); - } - - } else { - - mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, - (CHSPEC_IS5G(chanspec) ? (0x02 << 4) - : (0x05 << 4))); - - wlc_phy_chanspec_radio2055_setup(pi, t3); - wlc_phy_chanspec_nphy_setup(pi, chanspec, - (const nphy_sfo_cfg_t *)&(t3-> - PHY_BW1a)); - } - -} - -static void wlc_phy_savecal_nphy(phy_info_t *pi) -{ - void *tbl_ptr; - int coreNum; - u16 *txcal_radio_regs = NULL; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - - wlc_phy_rx_iq_coeffs_nphy(pi, 0, - &pi->calibration_cache. - rxcal_coeffs_2G); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - txcal_radio_regs = - pi->calibration_cache.txcal_radio_regs_2G; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - pi->calibration_cache.txcal_radio_regs_2G[0] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_2G[1] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_2G[2] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX1); - pi->calibration_cache.txcal_radio_regs_2G[3] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX1); - - pi->calibration_cache.txcal_radio_regs_2G[4] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_2G[5] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_2G[6] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX1); - pi->calibration_cache.txcal_radio_regs_2G[7] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX1); - } else { - pi->calibration_cache.txcal_radio_regs_2G[0] = - read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); - pi->calibration_cache.txcal_radio_regs_2G[1] = - read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); - pi->calibration_cache.txcal_radio_regs_2G[2] = - read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); - pi->calibration_cache.txcal_radio_regs_2G[3] = - read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); - } - - pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; - tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; - } else { - - wlc_phy_rx_iq_coeffs_nphy(pi, 0, - &pi->calibration_cache. - rxcal_coeffs_5G); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - txcal_radio_regs = - pi->calibration_cache.txcal_radio_regs_5G; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - pi->calibration_cache.txcal_radio_regs_5G[0] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_5G[1] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_5G[2] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX1); - pi->calibration_cache.txcal_radio_regs_5G[3] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX1); - - pi->calibration_cache.txcal_radio_regs_5G[4] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_5G[5] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX0); - pi->calibration_cache.txcal_radio_regs_5G[6] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX1); - pi->calibration_cache.txcal_radio_regs_5G[7] = - read_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX1); - } else { - pi->calibration_cache.txcal_radio_regs_5G[0] = - read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); - pi->calibration_cache.txcal_radio_regs_5G[1] = - read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); - pi->calibration_cache.txcal_radio_regs_5G[2] = - read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); - pi->calibration_cache.txcal_radio_regs_5G[3] = - read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); - } - - pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; - tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; - } - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (coreNum = 0; coreNum <= 1; coreNum++) { - - txcal_radio_regs[2 * coreNum] = - READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_FINE_I); - txcal_radio_regs[2 * coreNum + 1] = - READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_FINE_Q); - - txcal_radio_regs[2 * coreNum + 4] = - READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_COARSE_I); - txcal_radio_regs[2 * coreNum + 5] = - READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_COARSE_Q); - } - } - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void wlc_phy_restorecal_nphy(phy_info_t *pi) -{ - u16 *loft_comp; - u16 txcal_coeffs_bphy[4]; - u16 *tbl_ptr; - int coreNum; - u16 *txcal_radio_regs = NULL; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->nphy_iqcal_chanspec_2G == 0) - return; - - tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; - loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; - } else { - if (pi->nphy_iqcal_chanspec_5G == 0) - return; - - tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; - loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, - (void *)tbl_ptr); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - txcal_coeffs_bphy[0] = tbl_ptr[0]; - txcal_coeffs_bphy[1] = tbl_ptr[1]; - txcal_coeffs_bphy[2] = tbl_ptr[2]; - txcal_coeffs_bphy[3] = tbl_ptr[3]; - } else { - txcal_coeffs_bphy[0] = 0; - txcal_coeffs_bphy[1] = 0; - txcal_coeffs_bphy[2] = 0; - txcal_coeffs_bphy[3] = 0; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, - txcal_coeffs_bphy); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) - wlc_phy_tx_iq_war_nphy(pi); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - txcal_radio_regs = - pi->calibration_cache.txcal_radio_regs_2G; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_2G[0]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_2G[1]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_2G[2]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_2G[3]); - - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_2G[4]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_2G[5]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_2G[6]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_2G[7]); - } else { - write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, - pi->calibration_cache. - txcal_radio_regs_2G[0]); - write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, - pi->calibration_cache. - txcal_radio_regs_2G[1]); - write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, - pi->calibration_cache. - txcal_radio_regs_2G[2]); - write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, - pi->calibration_cache. - txcal_radio_regs_2G[3]); - } - - wlc_phy_rx_iq_coeffs_nphy(pi, 1, - &pi->calibration_cache. - rxcal_coeffs_2G); - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - txcal_radio_regs = - pi->calibration_cache.txcal_radio_regs_5G; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_5G[0]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_5G[1]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_I | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_5G[2]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_FINE_Q | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_5G[3]); - - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_5G[4]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX0, - pi->calibration_cache. - txcal_radio_regs_5G[5]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_I | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_5G[6]); - write_radio_reg(pi, - RADIO_2056_TX_LOFT_COARSE_Q | - RADIO_2056_TX1, - pi->calibration_cache. - txcal_radio_regs_5G[7]); - } else { - write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, - pi->calibration_cache. - txcal_radio_regs_5G[0]); - write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, - pi->calibration_cache. - txcal_radio_regs_5G[1]); - write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, - pi->calibration_cache. - txcal_radio_regs_5G[2]); - write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, - pi->calibration_cache. - txcal_radio_regs_5G[3]); - } - - wlc_phy_rx_iq_coeffs_nphy(pi, 1, - &pi->calibration_cache. - rxcal_coeffs_5G); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (coreNum = 0; coreNum <= 1; coreNum++) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_FINE_I, - txcal_radio_regs[2 * coreNum]); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_FINE_Q, - txcal_radio_regs[2 * coreNum + 1]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_COARSE_I, - txcal_radio_regs[2 * coreNum + 4]); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, - LOFT_COARSE_Q, - txcal_radio_regs[2 * coreNum + 5]); - } - } -} - -void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init) -{ - phy_info_t *pi = (phy_info_t *) ppi; - u16 mask = 0xfc00; - u32 mc = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) - return; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; - - if (lut_init == false) - return; - - if (pi->srom_fem2g.antswctrllut == 0) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x02, 16, &v0); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x03, 16, &v1); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x08, 16, &v2); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x0C, 16, &v3); - } - - if (pi->srom_fem5g.antswctrllut == 0) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x12, 16, &v0); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x13, 16, &v1); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x18, 16, &v2); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, - 1, 0x1C, 16, &v3); - } - } else { - - write_phy_reg(pi, 0xc8, 0x0); - write_phy_reg(pi, 0xc9, 0x0); - - ai_gpiocontrol(pi->sh->sih, mask, mask, GPIO_DRV_PRIORITY); - - mc = R_REG(&pi->regs->maccontrol); - mc &= ~MCTL_GPOUT_SEL_MASK; - W_REG(&pi->regs->maccontrol, mc); - - OR_REG(&pi->regs->psm_gpio_oe, mask); - - AND_REG(&pi->regs->psm_gpio_out, ~mask); - - if (lut_init) { - write_phy_reg(pi, 0xf8, 0x02d8); - write_phy_reg(pi, 0xf9, 0x0301); - write_phy_reg(pi, 0xfa, 0x02d8); - write_phy_reg(pi, 0xfb, 0x0301); - } - } -} - -u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val) -{ - u16 curr_ctl, new_ctl; - bool suspended = false; - - if (D11REV_IS(pi->sh->corerev, 16)) { - suspended = - (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) ? - false : true; - if (!suspended) - wlapi_suspend_mac_and_wait(pi->sh->physhim); - } - - curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); - - new_ctl = (curr_ctl & (~mask)) | (val & mask); - - mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); - - if (D11REV_IS(pi->sh->corerev, 16) && !suspended) - wlapi_enable_mac(pi->sh->physhim); - - return new_ctl; -} - -static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals) -{ - - if (write == 0) { - vals[0] = read_phy_reg(pi, 0x2c); - vals[1] = read_phy_reg(pi, 0x42); - } else { - write_phy_reg(pi, 0x2c, vals[0]); - write_phy_reg(pi, 0x42, vals[1]); - } -} - -void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd) -{ - u16 trigger_mask, status_mask; - u16 orig_RfseqCoreActv; - - switch (cmd) { - case NPHY_RFSEQ_RX2TX: - trigger_mask = NPHY_RfseqTrigger_rx2tx; - status_mask = NPHY_RfseqStatus_rx2tx; - break; - case NPHY_RFSEQ_TX2RX: - trigger_mask = NPHY_RfseqTrigger_tx2rx; - status_mask = NPHY_RfseqStatus_tx2rx; - break; - case NPHY_RFSEQ_RESET2RX: - trigger_mask = NPHY_RfseqTrigger_reset2rx; - status_mask = NPHY_RfseqStatus_reset2rx; - break; - case NPHY_RFSEQ_UPDATEGAINH: - trigger_mask = NPHY_RfseqTrigger_updategainh; - status_mask = NPHY_RfseqStatus_updategainh; - break; - case NPHY_RFSEQ_UPDATEGAINL: - trigger_mask = NPHY_RfseqTrigger_updategainl; - status_mask = NPHY_RfseqStatus_updategainl; - break; - case NPHY_RFSEQ_UPDATEGAINU: - trigger_mask = NPHY_RfseqTrigger_updategainu; - status_mask = NPHY_RfseqStatus_updategainu; - break; - default: - return; - } - - orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); - or_phy_reg(pi, 0xa1, - (NPHY_RfseqMode_CoreActv_override | - NPHY_RfseqMode_Trigger_override)); - or_phy_reg(pi, 0xa3, trigger_mask); - SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); - write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); - WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); -} - -static void -wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *events, u8 *dlys, - u8 len) -{ - u32 t1_offset, t2_offset; - u8 ctr; - u8 end_event = - NREV_GE(pi->pubpi.phy_rev, - 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; - u8 end_dly = 1; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - t1_offset = cmd << 4; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, - events); - t2_offset = t1_offset + 0x080; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, - dlys); - - for (ctr = len; ctr < 16; ctr++) { - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, - t1_offset + ctr, 8, &end_event); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, - t2_offset + ctr, 8, &end_dly); - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset) -{ - u16 lpf_bw_ctl_val = 0; - u16 rx2tx_lpf_rc_lut_offset = 0; - - if (offset == 0) { - if (CHSPEC_IS40(pi->radio_chanspec)) { - rx2tx_lpf_rc_lut_offset = 0x159; - } else { - rx2tx_lpf_rc_lut_offset = 0x154; - } - } else { - rx2tx_lpf_rc_lut_offset = offset; - } - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, - (u32) rx2tx_lpf_rc_lut_offset, 16, - &lpf_bw_ctl_val); - - lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; - - return lpf_bw_ctl_val; -} - -static void -wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, - u8 core_mask, u8 off, u8 override_id) -{ - u8 core_num; - u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; - u8 val_shift = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - en_mask = field; - for (core_num = 0; core_num < 2; core_num++) { - if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { - - switch (field) { - case (0x1 << 2): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 1); - val_shift = 1; - break; - case (0x1 << 3): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 2); - val_shift = 2; - break; - case (0x1 << 4): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 4); - val_shift = 4; - break; - case (0x1 << 5): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 5); - val_shift = 5; - break; - case (0x1 << 6): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 6); - val_shift = 6; - break; - case (0x1 << 7): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : - 0x7d; - val_mask = (0x1 << 7); - val_shift = 7; - break; - case (0x1 << 10): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0xf8 : - 0xfa; - val_mask = (0x7 << 4); - val_shift = 4; - break; - case (0x1 << 11): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7b : - 0x7e; - val_mask = (0xffff << 0); - val_shift = 0; - break; - case (0x1 << 12): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7c : - 0x7f; - val_mask = (0xffff << 0); - val_shift = 0; - break; - case (0x3 << 13): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x348 : - 0x349; - val_mask = (0xff << 0); - val_shift = 0; - break; - case (0x1 << 13): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x348 : - 0x349; - val_mask = (0xf << 0); - val_shift = 0; - break; - default: - addr = 0xffff; - break; - } - } else if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID1) { - - switch (field) { - case (0x1 << 1): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 1); - val_shift = 1; - break; - case (0x1 << 3): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 3); - val_shift = 3; - break; - case (0x1 << 5): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 5); - val_shift = 5; - break; - case (0x1 << 4): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 4); - val_shift = 4; - break; - case (0x1 << 2): - - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 2); - val_shift = 2; - break; - case (0x1 << 7): - - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x7 << 8); - val_shift = 8; - break; - case (0x1 << 11): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 14); - val_shift = 14; - break; - case (0x1 << 10): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 13); - val_shift = 13; - break; - case (0x1 << 9): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 12); - val_shift = 12; - break; - case (0x1 << 8): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 11); - val_shift = 11; - break; - case (0x1 << 6): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 6); - val_shift = 6; - break; - case (0x1 << 0): - en_addr = (core_num == 0) ? 0x342 : - 0x343; - val_addr = (core_num == 0) ? 0x340 : - 0x341; - val_mask = (0x1 << 0); - val_shift = 0; - break; - default: - addr = 0xffff; - break; - } - } else if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID2) { - - switch (field) { - case (0x1 << 3): - en_addr = (core_num == 0) ? 0x346 : - 0x347; - val_addr = (core_num == 0) ? 0x344 : - 0x345; - val_mask = (0x1 << 3); - val_shift = 3; - break; - case (0x1 << 1): - en_addr = (core_num == 0) ? 0x346 : - 0x347; - val_addr = (core_num == 0) ? 0x344 : - 0x345; - val_mask = (0x1 << 1); - val_shift = 1; - break; - case (0x1 << 0): - en_addr = (core_num == 0) ? 0x346 : - 0x347; - val_addr = (core_num == 0) ? 0x344 : - 0x345; - val_mask = (0x1 << 0); - val_shift = 0; - break; - case (0x1 << 2): - en_addr = (core_num == 0) ? 0x346 : - 0x347; - val_addr = (core_num == 0) ? 0x344 : - 0x345; - val_mask = (0x1 << 2); - val_shift = 2; - break; - case (0x1 << 4): - en_addr = (core_num == 0) ? 0x346 : - 0x347; - val_addr = (core_num == 0) ? 0x344 : - 0x345; - val_mask = (0x1 << 4); - val_shift = 4; - break; - default: - addr = 0xffff; - break; - } - } - - if (off) { - and_phy_reg(pi, en_addr, ~en_mask); - and_phy_reg(pi, val_addr, ~val_mask); - } else { - - if ((core_mask == 0) - || (core_mask & (1 << core_num))) { - or_phy_reg(pi, en_addr, en_mask); - - if (addr != 0xffff) { - mod_phy_reg(pi, val_addr, - val_mask, - (value << - val_shift)); - } - } - } - } - } -} - -static void -wlc_phy_rfctrl_override_nphy(phy_info_t *pi, u16 field, u16 value, - u8 core_mask, u8 off) -{ - u8 core_num; - u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = - 0, val_mask = 0; - u8 shift = 0, val_shift = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { - - en_mask = field; - for (core_num = 0; core_num < 2; core_num++) { - - switch (field) { - case (0x1 << 1): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 0); - val_shift = 0; - break; - case (0x1 << 2): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 1); - val_shift = 1; - break; - case (0x1 << 3): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 2); - val_shift = 2; - break; - case (0x1 << 4): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 4); - val_shift = 4; - break; - case (0x1 << 5): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 5); - val_shift = 5; - break; - case (0x1 << 6): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 6); - val_shift = 6; - break; - case (0x1 << 7): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x1 << 7); - val_shift = 7; - break; - case (0x1 << 8): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x7 << 8); - val_shift = 8; - break; - case (0x1 << 11): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7a : 0x7d; - val_mask = (0x7 << 13); - val_shift = 13; - break; - - case (0x1 << 9): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0xf8 : 0xfa; - val_mask = (0x7 << 0); - val_shift = 0; - break; - - case (0x1 << 10): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0xf8 : 0xfa; - val_mask = (0x7 << 4); - val_shift = 4; - break; - - case (0x1 << 12): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7b : 0x7e; - val_mask = (0xffff << 0); - val_shift = 0; - break; - case (0x1 << 13): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0x7c : 0x7f; - val_mask = (0xffff << 0); - val_shift = 0; - break; - case (0x1 << 14): - en_addr = (core_num == 0) ? 0xe7 : 0xec; - val_addr = (core_num == 0) ? 0xf9 : 0xfb; - val_mask = (0x3 << 6); - val_shift = 6; - break; - case (0x1 << 0): - en_addr = (core_num == 0) ? 0xe5 : 0xe6; - val_addr = (core_num == 0) ? 0xf9 : 0xfb; - val_mask = (0x1 << 15); - val_shift = 15; - break; - default: - addr = 0xffff; - break; - } - - if (off) { - and_phy_reg(pi, en_addr, ~en_mask); - and_phy_reg(pi, val_addr, ~val_mask); - } else { - - if ((core_mask == 0) - || (core_mask & (1 << core_num))) { - or_phy_reg(pi, en_addr, en_mask); - - if (addr != 0xffff) { - mod_phy_reg(pi, val_addr, - val_mask, - (value << - val_shift)); - } - } - } - } - } else { - - if (off) { - and_phy_reg(pi, 0xec, ~field); - value = 0x0; - } else { - or_phy_reg(pi, 0xec, field); - } - - for (core_num = 0; core_num < 2; core_num++) { - - switch (field) { - case (0x1 << 1): - case (0x1 << 9): - case (0x1 << 12): - case (0x1 << 13): - case (0x1 << 14): - addr = 0x78; - - core_mask = 0x1; - break; - case (0x1 << 2): - case (0x1 << 3): - case (0x1 << 4): - case (0x1 << 5): - case (0x1 << 6): - case (0x1 << 7): - case (0x1 << 8): - addr = (core_num == 0) ? 0x7a : 0x7d; - break; - case (0x1 << 10): - addr = (core_num == 0) ? 0x7b : 0x7e; - break; - case (0x1 << 11): - addr = (core_num == 0) ? 0x7c : 0x7f; - break; - default: - addr = 0xffff; - } - - switch (field) { - case (0x1 << 1): - mask = (0x7 << 3); - shift = 3; - break; - case (0x1 << 9): - mask = (0x1 << 2); - shift = 2; - break; - case (0x1 << 12): - mask = (0x1 << 8); - shift = 8; - break; - case (0x1 << 13): - mask = (0x1 << 9); - shift = 9; - break; - case (0x1 << 14): - mask = (0xf << 12); - shift = 12; - break; - case (0x1 << 2): - mask = (0x1 << 0); - shift = 0; - break; - case (0x1 << 3): - mask = (0x1 << 1); - shift = 1; - break; - case (0x1 << 4): - mask = (0x1 << 2); - shift = 2; - break; - case (0x1 << 5): - mask = (0x3 << 4); - shift = 4; - break; - case (0x1 << 6): - mask = (0x3 << 6); - shift = 6; - break; - case (0x1 << 7): - mask = (0x1 << 8); - shift = 8; - break; - case (0x1 << 8): - mask = (0x1 << 9); - shift = 9; - break; - case (0x1 << 10): - mask = 0x1fff; - shift = 0x0; - break; - case (0x1 << 11): - mask = 0x1fff; - shift = 0x0; - break; - default: - mask = 0x0; - shift = 0x0; - break; - } - - if ((addr != 0xffff) && (core_mask & (1 << core_num))) { - mod_phy_reg(pi, addr, mask, (value << shift)); - } - } - - or_phy_reg(pi, 0xec, (0x1 << 0)); - or_phy_reg(pi, 0x78, (0x1 << 0)); - udelay(1); - and_phy_reg(pi, 0xec, ~(0x1 << 0)); - } -} - -static void -wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, u16 cmd, u16 value, - u8 core_mask, u8 off) -{ - u16 rfmxgain = 0, lpfgain = 0; - u16 tgain = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - switch (cmd) { - case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), - value, core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - break; - case NPHY_REV7_RfctrlOverride_cmd_rx_pu: - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), - value, core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - break; - case NPHY_REV7_RfctrlOverride_cmd_tx_pu: - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), - value, core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), value, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, - core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - break; - case NPHY_REV7_RfctrlOverride_cmd_rxgain: - rfmxgain = value & 0x000ff; - lpfgain = value & 0x0ff00; - lpfgain = lpfgain >> 8; - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), - rfmxgain, core_mask, - off, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x3 << 13), - lpfgain, core_mask, - off, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - break; - case NPHY_REV7_RfctrlOverride_cmd_txgain: - tgain = value & 0x7fff; - lpfgain = value & 0x8000; - lpfgain = lpfgain >> 14; - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), - tgain, core_mask, off, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 13), - lpfgain, core_mask, - off, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - break; - } - } -} - -static void -wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, u16 scale, s8 offset, - u8 coresel, u8 rail, u8 rssi_type) -{ - u16 valuetostuff; - - offset = (offset > NPHY_RSSICAL_MAXREAD) ? - NPHY_RSSICAL_MAXREAD : offset; - offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? - -NPHY_RSSICAL_MAXREAD - 1 : offset; - - valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) { - write_phy_reg(pi, 0x1a6, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) { - write_phy_reg(pi, 0x1ac, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) { - write_phy_reg(pi, 0x1b2, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) { - write_phy_reg(pi, 0x1b8, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) { - write_phy_reg(pi, 0x1a4, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) { - write_phy_reg(pi, 0x1aa, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) { - write_phy_reg(pi, 0x1b0, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) { - write_phy_reg(pi, 0x1b6, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) { - write_phy_reg(pi, 0x1a5, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) { - write_phy_reg(pi, 0x1ab, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) { - write_phy_reg(pi, 0x1b1, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) { - write_phy_reg(pi, 0x1b7, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) { - write_phy_reg(pi, 0x1a7, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) { - write_phy_reg(pi, 0x1ad, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) { - write_phy_reg(pi, 0x1b3, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) { - write_phy_reg(pi, 0x1b9, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) { - write_phy_reg(pi, 0x1a8, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) { - write_phy_reg(pi, 0x1ae, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) { - write_phy_reg(pi, 0x1b4, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) { - write_phy_reg(pi, 0x1ba, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) { - write_phy_reg(pi, 0x1a9, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) { - write_phy_reg(pi, 0x1b5, valuetostuff); - } - - if (((coresel == RADIO_MIMO_CORESEL_CORE1) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) { - write_phy_reg(pi, 0x1af, valuetostuff); - } - if (((coresel == RADIO_MIMO_CORESEL_CORE2) || - (coresel == RADIO_MIMO_CORESEL_ALLRX)) && - (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) { - write_phy_reg(pi, 0x1bb, valuetostuff); - } -} - -void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core_code, u8 rssi_type) -{ - u16 mask, val; - u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, - startseq; - u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, - rfctrlovr_trigger_val; - u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; - u16 rfctrlcmd_val, rfctrlovr_val; - u8 core; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (core_code == RADIO_MIMO_CORESEL_OFF) { - mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); - mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); - - mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); - mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); - - mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); - mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); - - mask = (0x1 << 2) | - (0x1 << 3) | (0x1 << 4) | (0x1 << 5); - mod_phy_reg(pi, 0xf9, mask, 0); - mod_phy_reg(pi, 0xfb, mask, 0); - - } else { - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (core_code == RADIO_MIMO_CORESEL_CORE1 - && core == PHY_CORE_1) - continue; - else if (core_code == RADIO_MIMO_CORESEL_CORE2 - && core == PHY_CORE_0) - continue; - - mod_phy_reg(pi, (core == PHY_CORE_0) ? - 0x8f : 0xa5, (0x1 << 9), 1 << 9); - - if (rssi_type == NPHY_RSSI_SEL_W1 || - rssi_type == NPHY_RSSI_SEL_W2 || - rssi_type == NPHY_RSSI_SEL_NB) { - - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 : 0xa7, - (0x3 << 8), 0); - - mask = (0x1 << 2) | - (0x1 << 3) | - (0x1 << 4) | (0x1 << 5); - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xf9 : 0xfb, - mask, 0); - - if (rssi_type == NPHY_RSSI_SEL_W1) { - if (CHSPEC_IS5G - (pi->radio_chanspec)) { - mask = (0x1 << 2); - val = 1 << 2; - } else { - mask = (0x1 << 3); - val = 1 << 3; - } - } else if (rssi_type == - NPHY_RSSI_SEL_W2) { - mask = (0x1 << 4); - val = 1 << 4; - } else { - mask = (0x1 << 5); - val = 1 << 5; - } - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xf9 : 0xfb, - mask, val); - - mask = (0x1 << 5); - val = 1 << 5; - mod_phy_reg(pi, (core == PHY_CORE_0) ? - 0xe5 : 0xe6, mask, val); - } else { - if (rssi_type == NPHY_RSSI_SEL_TBD) { - - mask = (0x3 << 8); - val = 1 << 8; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - mask = (0x3 << 10); - val = 1 << 10; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - } else if (rssi_type == - NPHY_RSSI_SEL_IQ) { - - mask = (0x3 << 8); - val = 2 << 8; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - mask = (0x3 << 10); - val = 2 << 10; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - } else { - - mask = (0x3 << 8); - val = 3 << 8; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - mask = (0x3 << 10); - val = 3 << 10; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xa6 - : 0xa7, mask, val); - - if (PHY_IPA(pi)) { - if (NREV_GE - (pi->pubpi.phy_rev, - 7)) { - - write_radio_reg - (pi, - ((core == - PHY_CORE_0) - ? - RADIO_2057_TX0_TX_SSI_MUX - : - RADIO_2057_TX1_TX_SSI_MUX), - (CHSPEC_IS5G - (pi-> - radio_chanspec) - ? 0xc : - 0xe)); - } else { - write_radio_reg - (pi, - RADIO_2056_TX_TX_SSI_MUX - | - ((core == - PHY_CORE_0) - ? - RADIO_2056_TX0 - : - RADIO_2056_TX1), - (CHSPEC_IS5G - (pi-> - radio_chanspec) - ? 0xc : - 0xe)); - } - } else { - - if (NREV_GE - (pi->pubpi.phy_rev, - 7)) { - write_radio_reg - (pi, - ((core == - PHY_CORE_0) - ? - RADIO_2057_TX0_TX_SSI_MUX - : - RADIO_2057_TX1_TX_SSI_MUX), - 0x11); - - if (pi->pubpi. - radioid == - BCM2057_ID) - write_radio_reg - (pi, - RADIO_2057_IQTEST_SEL_PU, - 0x1); - - } else { - write_radio_reg - (pi, - RADIO_2056_TX_TX_SSI_MUX - | - ((core == - PHY_CORE_0) - ? - RADIO_2056_TX0 - : - RADIO_2056_TX1), - 0x11); - } - } - - afectrlovr_rssi_val = 1 << 9; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x8f - : 0xa5, (0x1 << 9), - afectrlovr_rssi_val); - } - } - } - } - } else { - - if ((rssi_type == NPHY_RSSI_SEL_W1) || - (rssi_type == NPHY_RSSI_SEL_W2) || - (rssi_type == NPHY_RSSI_SEL_NB)) { - - val = 0x0; - } else if (rssi_type == NPHY_RSSI_SEL_TBD) { - - val = 0x1; - } else if (rssi_type == NPHY_RSSI_SEL_IQ) { - - val = 0x2; - } else { - - val = 0x3; - } - mask = ((0x3 << 12) | (0x3 << 14)); - val = (val << 12) | (val << 14); - mod_phy_reg(pi, 0xa6, mask, val); - mod_phy_reg(pi, 0xa7, mask, val); - - if ((rssi_type == NPHY_RSSI_SEL_W1) || - (rssi_type == NPHY_RSSI_SEL_W2) || - (rssi_type == NPHY_RSSI_SEL_NB)) { - if (rssi_type == NPHY_RSSI_SEL_W1) { - val = 0x1; - } - if (rssi_type == NPHY_RSSI_SEL_W2) { - val = 0x2; - } - if (rssi_type == NPHY_RSSI_SEL_NB) { - val = 0x3; - } - mask = (0x3 << 4); - val = (val << 4); - mod_phy_reg(pi, 0x7a, mask, val); - mod_phy_reg(pi, 0x7d, mask, val); - } - - if (core_code == RADIO_MIMO_CORESEL_OFF) { - afectrlovr_rssi_val = 0; - rfctrlcmd_rxen_val = 0; - rfctrlcmd_coresel_val = 0; - rfctrlovr_rssi_val = 0; - rfctrlovr_rxen_val = 0; - rfctrlovr_coresel_val = 0; - rfctrlovr_trigger_val = 0; - startseq = 0; - } else { - afectrlovr_rssi_val = 1; - rfctrlcmd_rxen_val = 1; - rfctrlcmd_coresel_val = core_code; - rfctrlovr_rssi_val = 1; - rfctrlovr_rxen_val = 1; - rfctrlovr_coresel_val = 1; - rfctrlovr_trigger_val = 1; - startseq = 1; - } - - afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); - afectrlovr_rssi_val = (afectrlovr_rssi_val << - 12) | (afectrlovr_rssi_val << 13); - mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, - afectrlovr_rssi_val); - - if ((rssi_type == NPHY_RSSI_SEL_W1) || - (rssi_type == NPHY_RSSI_SEL_W2) || - (rssi_type == NPHY_RSSI_SEL_NB)) { - rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); - rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | - (rfctrlcmd_coresel_val << 3); - - rfctrlovr_mask = ((0x1 << 5) | - (0x1 << 12) | - (0x1 << 1) | (0x1 << 0)); - rfctrlovr_val = (rfctrlovr_rssi_val << - 5) | - (rfctrlovr_rxen_val << 12) | - (rfctrlovr_coresel_val << 1) | - (rfctrlovr_trigger_val << 0); - - mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); - mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); - - mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); - udelay(20); - - mod_phy_reg(pi, 0xec, (0x1 << 0), 0); - } - } -} - -int -wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, s32 *rssi_buf, - u8 nsamps) -{ - s16 rssi0, rssi1; - u16 afectrlCore1_save = 0; - u16 afectrlCore2_save = 0; - u16 afectrlOverride1_save = 0; - u16 afectrlOverride2_save = 0; - u16 rfctrlOverrideAux0_save = 0; - u16 rfctrlOverrideAux1_save = 0; - u16 rfctrlMiscReg1_save = 0; - u16 rfctrlMiscReg2_save = 0; - u16 rfctrlcmd_save = 0; - u16 rfctrloverride_save = 0; - u16 rfctrlrssiothers1_save = 0; - u16 rfctrlrssiothers2_save = 0; - s8 tmp_buf[4]; - u8 ctr = 0, samp = 0; - s32 rssi_out_val; - u16 gpiosel_orig; - - afectrlCore1_save = read_phy_reg(pi, 0xa6); - afectrlCore2_save = read_phy_reg(pi, 0xa7); - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); - rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); - afectrlOverride1_save = read_phy_reg(pi, 0x8f); - afectrlOverride2_save = read_phy_reg(pi, 0xa5); - rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); - rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); - } else { - afectrlOverride1_save = read_phy_reg(pi, 0xa5); - rfctrlcmd_save = read_phy_reg(pi, 0x78); - rfctrloverride_save = read_phy_reg(pi, 0xec); - rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); - rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); - } - - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); - - gpiosel_orig = read_phy_reg(pi, 0xca); - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - write_phy_reg(pi, 0xca, 5); - } - - for (ctr = 0; ctr < 4; ctr++) { - rssi_buf[ctr] = 0; - } - - for (samp = 0; samp < nsamps; samp++) { - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - rssi0 = read_phy_reg(pi, 0x1c9); - rssi1 = read_phy_reg(pi, 0x1ca); - } else { - rssi0 = read_phy_reg(pi, 0x219); - rssi1 = read_phy_reg(pi, 0x21a); - } - - ctr = 0; - tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; - tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; - tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; - tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; - - for (ctr = 0; ctr < 4; ctr++) { - rssi_buf[ctr] += tmp_buf[ctr]; - } - - } - - rssi_out_val = rssi_buf[3] & 0xff; - rssi_out_val |= (rssi_buf[2] & 0xff) << 8; - rssi_out_val |= (rssi_buf[1] & 0xff) << 16; - rssi_out_val |= (rssi_buf[0] & 0xff) << 24; - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - write_phy_reg(pi, 0xca, gpiosel_orig); - } - - write_phy_reg(pi, 0xa6, afectrlCore1_save); - write_phy_reg(pi, 0xa7, afectrlCore2_save); - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); - write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); - write_phy_reg(pi, 0x8f, afectrlOverride1_save); - write_phy_reg(pi, 0xa5, afectrlOverride2_save); - write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); - write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); - } else { - write_phy_reg(pi, 0xa5, afectrlOverride1_save); - write_phy_reg(pi, 0x78, rfctrlcmd_save); - write_phy_reg(pi, 0xec, rfctrloverride_save); - write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); - write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); - } - - return rssi_out_val; -} - -s16 wlc_phy_tempsense_nphy(phy_info_t *pi) -{ - u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; - u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; - u16 pwrdet_rxtx_core1_save; - u16 pwrdet_rxtx_core2_save; - u16 afectrlCore1_save; - u16 afectrlCore2_save; - u16 afectrlOverride_save; - u16 afectrlOverride2_save; - u16 pd_pll_ts_save; - u16 gpioSel_save; - s32 radio_temp[4]; - s32 radio_temp2[4]; - u16 syn_tempprocsense_save; - s16 offset = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; - u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; - u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; - s32 auxADC_Vl; - u16 RfctrlOverride5_save, RfctrlOverride6_save; - u16 RfctrlMiscReg5_save, RfctrlMiscReg6_save; - u16 RSSIMultCoef0QPowerDet_save; - u16 tempsense_Rcal; - - syn_tempprocsense_save = - read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); - - afectrlCore1_save = read_phy_reg(pi, 0xa6); - afectrlCore2_save = read_phy_reg(pi, 0xa7); - afectrlOverride_save = read_phy_reg(pi, 0x8f); - afectrlOverride2_save = read_phy_reg(pi, 0xa5); - RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); - RfctrlOverride5_save = read_phy_reg(pi, 0x346); - RfctrlOverride6_save = read_phy_reg(pi, 0x347); - RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); - RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, - &auxADC_Vmid_save); - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, - &auxADC_Av_save); - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, - &auxADC_rssi_ctrlL_save); - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, - &auxADC_rssi_ctrlH_save); - - write_phy_reg(pi, 0x1ae, 0x0); - - auxADC_rssi_ctrlL = 0x0; - auxADC_rssi_ctrlH = 0x20; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, - &auxADC_rssi_ctrlL); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, - &auxADC_rssi_ctrlH); - - tempsense_Rcal = syn_tempprocsense_save & 0x1c; - - write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, - tempsense_Rcal | 0x01); - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), - 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); - mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); - mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); - mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); - - mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); - udelay(5); - mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); - mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); - mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); - mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); - mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); - mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); - mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); - mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); - mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); - mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); - - auxADC_Vmid = 0xA3; - auxADC_Av = 0x0; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, - &auxADC_Vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, - &auxADC_Av); - - udelay(3); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, - tempsense_Rcal | 0x03); - - udelay(5); - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); - - auxADC_Av = 0x7; - if (radio_temp[1] + radio_temp2[1] < -30) { - auxADC_Vmid = 0x45; - auxADC_Vl = 263; - } else if (radio_temp[1] + radio_temp2[1] < -9) { - auxADC_Vmid = 0x200; - auxADC_Vl = 467; - } else if (radio_temp[1] + radio_temp2[1] < 11) { - auxADC_Vmid = 0x266; - auxADC_Vl = 634; - } else { - auxADC_Vmid = 0x2D5; - auxADC_Vl = 816; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, - &auxADC_Vmid); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, - &auxADC_Av); - - udelay(3); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); - write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, - tempsense_Rcal | 0x01); - - udelay(5); - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - - write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, - syn_tempprocsense_save); - - write_phy_reg(pi, 0xa6, afectrlCore1_save); - write_phy_reg(pi, 0xa7, afectrlCore2_save); - write_phy_reg(pi, 0x8f, afectrlOverride_save); - write_phy_reg(pi, 0xa5, afectrlOverride2_save); - write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); - write_phy_reg(pi, 0x346, RfctrlOverride5_save); - write_phy_reg(pi, 0x347, RfctrlOverride6_save); - write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); - write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, - &auxADC_Vmid_save); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, - &auxADC_Av_save); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, - &auxADC_rssi_ctrlL_save); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, - &auxADC_rssi_ctrlH_save); - - if (pi->sh->chip == BCM5357_CHIP_ID) { - radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) - + 88 * (auxADC_Vl) - 27111 + - 128) / 256; - } else if (pi->sh->chip == BCM43236_CHIP_ID) { - radio_temp[0] = (198 * (radio_temp[1] + radio_temp2[1]) - + 91 * (auxADC_Vl) - 27243 + - 128) / 256; - } else { - radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) - + 82 * (auxADC_Vl) - 28861 + - 128) / 256; - } - - offset = (s16) pi->phy_tempsense_offset; - - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - syn_tempprocsense_save = - read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); - - afectrlCore1_save = read_phy_reg(pi, 0xa6); - afectrlCore2_save = read_phy_reg(pi, 0xa7); - afectrlOverride_save = read_phy_reg(pi, 0x8f); - afectrlOverride2_save = read_phy_reg(pi, 0xa5); - gpioSel_save = read_phy_reg(pi, 0xca); - - write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - } else { - write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); - } - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); - } else { - write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); - } - - radio_temp[0] = - (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; - - write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, - syn_tempprocsense_save); - - write_phy_reg(pi, 0xca, gpioSel_save); - write_phy_reg(pi, 0xa6, afectrlCore1_save); - write_phy_reg(pi, 0xa7, afectrlCore2_save); - write_phy_reg(pi, 0x8f, afectrlOverride_save); - write_phy_reg(pi, 0xa5, afectrlOverride2_save); - - offset = (s16) pi->phy_tempsense_offset; - } else { - - pwrdet_rxtx_core1_save = - read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); - pwrdet_rxtx_core2_save = - read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); - core1_txrf_iqcal1_save = - read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); - core1_txrf_iqcal2_save = - read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); - core2_txrf_iqcal1_save = - read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); - core2_txrf_iqcal2_save = - read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); - pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); - - afectrlCore1_save = read_phy_reg(pi, 0xa6); - afectrlCore2_save = read_phy_reg(pi, 0xa7); - afectrlOverride_save = read_phy_reg(pi, 0xa5); - gpioSel_save = read_phy_reg(pi, 0xca); - - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); - write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); - xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); - - radio_temp[0] = (radio_temp[0] + radio_temp2[0]); - radio_temp[1] = (radio_temp[1] + radio_temp2[1]); - radio_temp[2] = (radio_temp[2] + radio_temp2[2]); - radio_temp[3] = (radio_temp[3] + radio_temp2[3]); - - radio_temp[0] = - (radio_temp[0] + radio_temp[1] + radio_temp[2] + - radio_temp[3]); - - radio_temp[0] = - (radio_temp[0] + (8 * 32)) * (950 - 350) / 63 + (350 * 8); - - radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; - - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, - pwrdet_rxtx_core1_save); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, - pwrdet_rxtx_core2_save); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, - core1_txrf_iqcal1_save); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, - core2_txrf_iqcal1_save); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, - core1_txrf_iqcal2_save); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, - core2_txrf_iqcal2_save); - write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); - - write_phy_reg(pi, 0xca, gpioSel_save); - write_phy_reg(pi, 0xa6, afectrlCore1_save); - write_phy_reg(pi, 0xa7, afectrlCore2_save); - write_phy_reg(pi, 0xa5, afectrlOverride_save); - } - - return (s16) radio_temp[0] + offset; -} - -static void -wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, u8 rssi_type, u8 *vcm_buf) -{ - u8 core; - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (rssi_type == NPHY_RSSI_SEL_NB) { - if (core == PHY_CORE_0) { - mod_radio_reg(pi, - RADIO_2055_CORE1_B0_NBRSSI_VCM, - RADIO_2055_NBRSSI_VCM_I_MASK, - vcm_buf[2 * - core] << - RADIO_2055_NBRSSI_VCM_I_SHIFT); - mod_radio_reg(pi, - RADIO_2055_CORE1_RXBB_RSSI_CTRL5, - RADIO_2055_NBRSSI_VCM_Q_MASK, - vcm_buf[2 * core + - 1] << - RADIO_2055_NBRSSI_VCM_Q_SHIFT); - } else { - mod_radio_reg(pi, - RADIO_2055_CORE2_B0_NBRSSI_VCM, - RADIO_2055_NBRSSI_VCM_I_MASK, - vcm_buf[2 * - core] << - RADIO_2055_NBRSSI_VCM_I_SHIFT); - mod_radio_reg(pi, - RADIO_2055_CORE2_RXBB_RSSI_CTRL5, - RADIO_2055_NBRSSI_VCM_Q_MASK, - vcm_buf[2 * core + - 1] << - RADIO_2055_NBRSSI_VCM_Q_SHIFT); - } - } else { - - if (core == PHY_CORE_0) { - mod_radio_reg(pi, - RADIO_2055_CORE1_RXBB_RSSI_CTRL5, - RADIO_2055_WBRSSI_VCM_IQ_MASK, - vcm_buf[2 * - core] << - RADIO_2055_WBRSSI_VCM_IQ_SHIFT); - } else { - mod_radio_reg(pi, - RADIO_2055_CORE2_RXBB_RSSI_CTRL5, - RADIO_2055_WBRSSI_VCM_IQ_MASK, - vcm_buf[2 * - core] << - RADIO_2055_WBRSSI_VCM_IQ_SHIFT); - } - } - } -} - -void wlc_phy_rssi_cal_nphy(phy_info_t *pi) -{ - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - wlc_phy_rssi_cal_nphy_rev3(pi); - } else { - wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); - wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); - wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); - } -} - -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type) -{ - s32 target_code; - u16 classif_state; - u16 clip_state[2]; - u16 rssi_ctrl_state[2], pd_state[2]; - u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; - u16 rfctrlintc_override_val; - u16 clip_off[] = { 0xffff, 0xffff }; - u16 rf_pd_val, pd_mask, rssi_ctrl_mask; - u8 vcm, min_vcm, vcm_tmp[4]; - u8 vcm_final[4] = { 0, 0, 0, 0 }; - u8 result_idx, ctr; - s32 poll_results[4][4] = { - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0} - }; - s32 poll_miniq[4][2] = { - {0, 0}, - {0, 0}, - {0, 0}, - {0, 0} - }; - s32 min_d, curr_d; - s32 fine_digital_offset[4]; - s32 poll_results_min[4] = { 0, 0, 0, 0 }; - s32 min_poll; - - switch (rssi_type) { - case NPHY_RSSI_SEL_NB: - target_code = NPHY_RSSICAL_NB_TARGET; - break; - case NPHY_RSSI_SEL_W1: - target_code = NPHY_RSSICAL_W1_TARGET; - break; - case NPHY_RSSI_SEL_W2: - target_code = NPHY_RSSICAL_W2_TARGET; - break; - default: - return; - break; - } - - classif_state = wlc_phy_classifier_nphy(pi, 0, 0); - wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); - wlc_phy_clip_det_nphy(pi, 0, clip_state); - wlc_phy_clip_det_nphy(pi, 1, clip_off); - - rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; - rfctrlintc_override_val = - CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; - - rfctrlintc_state[0] = read_phy_reg(pi, 0x91); - rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); - write_phy_reg(pi, 0x91, rfctrlintc_override_val); - write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); - - rfctrlintc_state[1] = read_phy_reg(pi, 0x92); - rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); - write_phy_reg(pi, 0x92, rfctrlintc_override_val); - write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); - - pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | - RADIO_2055_WBRSSI_G2_PD; - pd_state[0] = - read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; - pd_state[1] = - read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; - mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); - mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); - rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | - RADIO_2055_WBRSSI_G2_SEL; - rssi_ctrl_state[0] = - read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; - rssi_ctrl_state[1] = - read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, - NPHY_RAIL_I, rssi_type); - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, - NPHY_RAIL_Q, rssi_type); - - for (vcm = 0; vcm < 4; vcm++) { - - vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; - if (rssi_type != NPHY_RSSI_SEL_W2) { - wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); - } - - wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], - NPHY_RSSICAL_NPOLL); - - if ((rssi_type == NPHY_RSSI_SEL_W1) - || (rssi_type == NPHY_RSSI_SEL_W2)) { - for (ctr = 0; ctr < 2; ctr++) { - poll_miniq[vcm][ctr] = - min(poll_results[vcm][ctr * 2 + 0], - poll_results[vcm][ctr * 2 + 1]); - } - } - } - - for (result_idx = 0; result_idx < 4; result_idx++) { - min_d = NPHY_RSSICAL_MAXD; - min_vcm = 0; - min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; - for (vcm = 0; vcm < 4; vcm++) { - curr_d = ABS(((rssi_type == NPHY_RSSI_SEL_NB) ? - poll_results[vcm][result_idx] : - poll_miniq[vcm][result_idx / 2]) - - (target_code * NPHY_RSSICAL_NPOLL)); - if (curr_d < min_d) { - min_d = curr_d; - min_vcm = vcm; - } - if (poll_results[vcm][result_idx] < min_poll) { - min_poll = poll_results[vcm][result_idx]; - } - } - vcm_final[result_idx] = min_vcm; - poll_results_min[result_idx] = min_poll; - } - - if (rssi_type != NPHY_RSSI_SEL_W2) { - wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); - } - - for (result_idx = 0; result_idx < 4; result_idx++) { - fine_digital_offset[result_idx] = - (target_code * NPHY_RSSICAL_NPOLL) - - poll_results[vcm_final[result_idx]][result_idx]; - if (fine_digital_offset[result_idx] < 0) { - fine_digital_offset[result_idx] = - ABS(fine_digital_offset[result_idx]); - fine_digital_offset[result_idx] += - (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; - fine_digital_offset[result_idx] = - -fine_digital_offset[result_idx]; - } else { - fine_digital_offset[result_idx] += - (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; - } - - if (poll_results_min[result_idx] == - NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) { - fine_digital_offset[result_idx] = - (target_code - NPHY_RSSICAL_MAXREAD - 1); - } - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, - (s8) - fine_digital_offset[result_idx], - (result_idx / 2 == - 0) ? RADIO_MIMO_CORESEL_CORE1 : - RADIO_MIMO_CORESEL_CORE2, - (result_idx % 2 == - 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, - rssi_type); - } - - mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); - mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); - if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, - NPHY_RSSI_SEL_NB); - } else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, - NPHY_RSSI_SEL_W1); - } else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G2_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, - NPHY_RSSI_SEL_W2); - } else { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, - NPHY_RSSI_SEL_W2); - } - if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, - NPHY_RSSI_SEL_NB); - } else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, - NPHY_RSSI_SEL_W1); - } else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G2_SEL) { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, - NPHY_RSSI_SEL_W2); - } else { - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, - NPHY_RSSI_SEL_W2); - } - - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); - - write_phy_reg(pi, 0x91, rfctrlintc_state[0]); - write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); - write_phy_reg(pi, 0x92, rfctrlintc_state[1]); - write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); - - wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); - wlc_phy_clip_det_nphy(pi, 1, clip_state); - - wlc_phy_resetcca_nphy(pi); -} - -int -wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh) -{ - d11rxhdr_t *rxh = &wlc_rxh->rxhdr; - s16 rxpwr, rxpwr0, rxpwr1; - s16 phyRx0_l, phyRx2_l; - - rxpwr = 0; - rxpwr0 = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR0_MASK; - rxpwr1 = (le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR1_MASK) >> 8; - - if (rxpwr0 > 127) - rxpwr0 -= 256; - if (rxpwr1 > 127) - rxpwr1 -= 256; - - phyRx0_l = le16_to_cpu(rxh->PhyRxStatus_0) & 0x00ff; - phyRx2_l = le16_to_cpu(rxh->PhyRxStatus_2) & 0x00ff; - if (phyRx2_l > 127) - phyRx2_l -= 256; - - if (((rxpwr0 == 16) || (rxpwr0 == 32))) { - rxpwr0 = rxpwr1; - rxpwr1 = phyRx2_l; - } - - wlc_rxh->rxpwr[0] = (s8) rxpwr0; - wlc_rxh->rxpwr[1] = (s8) rxpwr1; - wlc_rxh->do_rssi_ma = 0; - - if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) - rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; - else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) - rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; - else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) - rxpwr = (rxpwr0 + rxpwr1) >> 1; - - return rxpwr; -} - -static void -wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, u8 field, u16 value, - u8 core_code) -{ - u16 mask; - u16 val; - u8 core; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (core_code == RADIO_MIMO_CORESEL_CORE1 - && core == PHY_CORE_1) - continue; - else if (core_code == RADIO_MIMO_CORESEL_CORE2 - && core == PHY_CORE_0) - continue; - - if (NREV_LT(pi->pubpi.phy_rev, 7)) { - - mask = (0x1 << 10); - val = 1 << 10; - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : - 0x92, mask, val); - } - - if (field == NPHY_RfctrlIntc_override_OFF) { - - write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : - 0x92, 0); - - wlc_phy_force_rfseq_nphy(pi, - NPHY_RFSEQ_RESET2RX); - } else if (field == NPHY_RfctrlIntc_override_TRSW) { - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - mask = (0x1 << 6) | (0x1 << 7); - - val = value << 6; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - - or_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - (0x1 << 10)); - - and_phy_reg(pi, 0x2ff, (u16) - ~(0x3 << 14)); - or_phy_reg(pi, 0x2ff, (0x1 << 13)); - or_phy_reg(pi, 0x2ff, (0x1 << 0)); - } else { - - mask = (0x1 << 6) | - (0x1 << 7) | - (0x1 << 8) | (0x1 << 9); - val = value << 6; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - - mask = (0x1 << 0); - val = 1 << 0; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xe7 : 0xec, - mask, val); - - mask = (core == PHY_CORE_0) ? (0x1 << 0) - : (0x1 << 1); - val = 1 << ((core == PHY_CORE_0) ? - 0 : 1); - mod_phy_reg(pi, 0x78, mask, val); - - SPINWAIT(((read_phy_reg(pi, 0x78) & val) - != 0), 10000); - if (WARN(read_phy_reg(pi, 0x78) & val, - "HW error: override failed")) - return; - - mask = (0x1 << 0); - val = 0 << 0; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xe7 : 0xec, - mask, val); - } - } else if (field == NPHY_RfctrlIntc_override_PA) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - mask = (0x1 << 4) | (0x1 << 5); - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - val = value << 5; - } else { - val = value << 4; - } - - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - - or_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - (0x1 << 12)); - } else { - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - mask = (0x1 << 5); - val = value << 5; - } else { - mask = (0x1 << 4); - val = value << 4; - } - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - } - } else if (field == NPHY_RfctrlIntc_override_EXT_LNA_PU) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - - mask = (0x1 << 0); - val = value << 0; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, val); - - mask = (0x1 << 2); - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, 0); - } else { - - mask = (0x1 << 2); - val = value << 2; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, val); - - mask = (0x1 << 0); - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, 0); - } - - mask = (0x1 << 11); - val = 1 << 11; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - } else { - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - mask = (0x1 << 0); - val = value << 0; - } else { - mask = (0x1 << 2); - val = value << 2; - } - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - } - } else if (field == - NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - - mask = (0x1 << 1); - val = value << 1; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, val); - - mask = (0x1 << 3); - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, 0); - } else { - - mask = (0x1 << 3); - val = value << 3; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, val); - - mask = (0x1 << 1); - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 - : 0x92, mask, 0); - } - - mask = (0x1 << 11); - val = 1 << 11; - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - } else { - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - mask = (0x1 << 1); - val = value << 1; - } else { - mask = (0x1 << 3); - val = value << 3; - } - mod_phy_reg(pi, - (core == - PHY_CORE_0) ? 0x91 : 0x92, - mask, val); - } - } - } - } else { - return; - } -} - -static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) -{ - u16 classif_state; - u16 clip_state[2]; - u16 clip_off[] = { 0xffff, 0xffff }; - s32 target_code; - u8 vcm, min_vcm; - u8 vcm_final = 0; - u8 result_idx; - s32 poll_results[8][4] = { - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0}, - {0, 0, 0, 0} - }; - s32 poll_result_core[4] = { 0, 0, 0, 0 }; - s32 min_d = NPHY_RSSICAL_MAXD, curr_d; - s32 fine_digital_offset[4]; - s32 poll_results_min[4] = { 0, 0, 0, 0 }; - s32 min_poll; - u8 vcm_level_max; - u8 core; - u8 wb_cnt; - u8 rssi_type; - u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; - u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; - u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; - u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; - u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; - u16 NPHY_RfctrlCmd_save; - u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; - u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; - u8 rxcore_state; - u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; - u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; - u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; - u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; - - NPHY_REV7_RfctrlOverride3_save = NPHY_REV7_RfctrlOverride4_save = - NPHY_REV7_RfctrlOverride5_save = NPHY_REV7_RfctrlOverride6_save = - NPHY_REV7_RfctrlMiscReg3_save = NPHY_REV7_RfctrlMiscReg4_save = - NPHY_REV7_RfctrlMiscReg5_save = NPHY_REV7_RfctrlMiscReg6_save = 0; - - classif_state = wlc_phy_classifier_nphy(pi, 0, 0); - wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); - wlc_phy_clip_det_nphy(pi, 0, clip_state); - wlc_phy_clip_det_nphy(pi, 1, clip_off); - - NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); - NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); - NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); - NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); - NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); - NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); - NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); - NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); - NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); - NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); - NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); - } - NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); - NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); - NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); - NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); - NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); - NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); - NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); - NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); - } - NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); - NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); - - wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, - RADIO_MIMO_CORESEL_ALLRXTX); - wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, - RADIO_MIMO_CORESEL_ALLRXTX); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, - 0, 0, 0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_rx_pu, - 1, 0, 0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), - 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), - 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0, - 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); - } - - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), - 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 1, 0, - 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); - } - } - - rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); - - vcm_level_max = 8; - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - if ((rxcore_state & (1 << core)) == 0) - continue; - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, - core == - PHY_CORE_0 ? - RADIO_MIMO_CORESEL_CORE1 : - RADIO_MIMO_CORESEL_CORE2, - NPHY_RAIL_I, NPHY_RSSI_SEL_NB); - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, - core == - PHY_CORE_0 ? - RADIO_MIMO_CORESEL_CORE1 : - RADIO_MIMO_CORESEL_CORE2, - NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); - - for (vcm = 0; vcm < vcm_level_max; vcm++) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - mod_radio_reg(pi, (core == PHY_CORE_0) ? - RADIO_2057_NB_MASTER_CORE0 : - RADIO_2057_NB_MASTER_CORE1, - RADIO_2057_VCM_MASK, vcm); - } else { - - mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | - ((core == - PHY_CORE_0) ? RADIO_2056_RX0 : - RADIO_2056_RX1), - RADIO_2056_VCM_MASK, - vcm << RADIO_2056_RSSI_VCM_SHIFT); - } - - wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, - &poll_results[vcm][0], - NPHY_RSSICAL_NPOLL); - } - - for (result_idx = 0; result_idx < 4; result_idx++) { - if ((core == result_idx / 2) && (result_idx % 2 == 0)) { - - min_d = NPHY_RSSICAL_MAXD; - min_vcm = 0; - min_poll = - NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + - 1; - for (vcm = 0; vcm < vcm_level_max; vcm++) { - curr_d = poll_results[vcm][result_idx] * - poll_results[vcm][result_idx] + - poll_results[vcm][result_idx + 1] * - poll_results[vcm][result_idx + 1]; - if (curr_d < min_d) { - min_d = curr_d; - min_vcm = vcm; - } - if (poll_results[vcm][result_idx] < - min_poll) { - min_poll = - poll_results[vcm] - [result_idx]; - } - } - vcm_final = min_vcm; - poll_results_min[result_idx] = min_poll; - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_radio_reg(pi, (core == PHY_CORE_0) ? - RADIO_2057_NB_MASTER_CORE0 : - RADIO_2057_NB_MASTER_CORE1, - RADIO_2057_VCM_MASK, vcm_final); - } else { - mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | - ((core == - PHY_CORE_0) ? RADIO_2056_RX0 : - RADIO_2056_RX1), RADIO_2056_VCM_MASK, - vcm_final << RADIO_2056_RSSI_VCM_SHIFT); - } - - for (result_idx = 0; result_idx < 4; result_idx++) { - if (core == result_idx / 2) { - fine_digital_offset[result_idx] = - (NPHY_RSSICAL_NB_TARGET * - NPHY_RSSICAL_NPOLL) - - poll_results[vcm_final][result_idx]; - if (fine_digital_offset[result_idx] < 0) { - fine_digital_offset[result_idx] = - ABS(fine_digital_offset - [result_idx]); - fine_digital_offset[result_idx] += - (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] /= - NPHY_RSSICAL_NPOLL; - fine_digital_offset[result_idx] = - -fine_digital_offset[result_idx]; - } else { - fine_digital_offset[result_idx] += - (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] /= - NPHY_RSSICAL_NPOLL; - } - - if (poll_results_min[result_idx] == - NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) { - fine_digital_offset[result_idx] = - (NPHY_RSSICAL_NB_TARGET - - NPHY_RSSICAL_MAXREAD - 1); - } - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, - (s8) - fine_digital_offset - [result_idx], - (result_idx / - 2 == - 0) ? - RADIO_MIMO_CORESEL_CORE1 - : - RADIO_MIMO_CORESEL_CORE2, - (result_idx % - 2 == - 0) ? NPHY_RAIL_I - : NPHY_RAIL_Q, - NPHY_RSSI_SEL_NB); - } - } - - } - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - if ((rxcore_state & (1 << core)) == 0) - continue; - - for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { - if (wb_cnt == 0) { - rssi_type = NPHY_RSSI_SEL_W1; - target_code = NPHY_RSSICAL_W1_TARGET_REV3; - } else { - rssi_type = NPHY_RSSI_SEL_W2; - target_code = NPHY_RSSICAL_W2_TARGET_REV3; - } - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, - core == - PHY_CORE_0 ? - RADIO_MIMO_CORESEL_CORE1 - : - RADIO_MIMO_CORESEL_CORE2, - NPHY_RAIL_I, rssi_type); - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, - core == - PHY_CORE_0 ? - RADIO_MIMO_CORESEL_CORE1 - : - RADIO_MIMO_CORESEL_CORE2, - NPHY_RAIL_Q, rssi_type); - - wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, - NPHY_RSSICAL_NPOLL); - - for (result_idx = 0; result_idx < 4; result_idx++) { - if (core == result_idx / 2) { - fine_digital_offset[result_idx] = - (target_code * NPHY_RSSICAL_NPOLL) - - poll_result_core[result_idx]; - if (fine_digital_offset[result_idx] < 0) { - fine_digital_offset[result_idx] - = - ABS(fine_digital_offset - [result_idx]); - fine_digital_offset[result_idx] - += (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] - /= NPHY_RSSICAL_NPOLL; - fine_digital_offset[result_idx] - = - -fine_digital_offset - [result_idx]; - } else { - fine_digital_offset[result_idx] - += (NPHY_RSSICAL_NPOLL / 2); - fine_digital_offset[result_idx] - /= NPHY_RSSICAL_NPOLL; - } - - wlc_phy_scale_offset_rssi_nphy(pi, 0x0, - (s8) - fine_digital_offset - [core * - 2], - (core == - PHY_CORE_0) - ? - RADIO_MIMO_CORESEL_CORE1 - : - RADIO_MIMO_CORESEL_CORE2, - (result_idx - % 2 == - 0) ? - NPHY_RAIL_I - : - NPHY_RAIL_Q, - rssi_type); - } - } - - } - } - - write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); - write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); - - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - - mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); - - mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); - mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); - mod_phy_reg(pi, 0xec, (0x1 << 0), 0); - - write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); - write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); - write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); - write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); - write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); - write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); - write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); - write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); - write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); - } - write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); - write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); - write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); - write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); - write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); - write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); - write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); - write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); - } - write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); - write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - pi->rssical_cache.rssical_radio_regs_2G[0] = - read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); - pi->rssical_cache.rssical_radio_regs_2G[1] = - read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); - } else { - pi->rssical_cache.rssical_radio_regs_2G[0] = - read_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | - RADIO_2056_RX0); - pi->rssical_cache.rssical_radio_regs_2G[1] = - read_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | - RADIO_2056_RX1); - } - - pi->rssical_cache.rssical_phyregs_2G[0] = - read_phy_reg(pi, 0x1a6); - pi->rssical_cache.rssical_phyregs_2G[1] = - read_phy_reg(pi, 0x1ac); - pi->rssical_cache.rssical_phyregs_2G[2] = - read_phy_reg(pi, 0x1b2); - pi->rssical_cache.rssical_phyregs_2G[3] = - read_phy_reg(pi, 0x1b8); - pi->rssical_cache.rssical_phyregs_2G[4] = - read_phy_reg(pi, 0x1a4); - pi->rssical_cache.rssical_phyregs_2G[5] = - read_phy_reg(pi, 0x1aa); - pi->rssical_cache.rssical_phyregs_2G[6] = - read_phy_reg(pi, 0x1b0); - pi->rssical_cache.rssical_phyregs_2G[7] = - read_phy_reg(pi, 0x1b6); - pi->rssical_cache.rssical_phyregs_2G[8] = - read_phy_reg(pi, 0x1a5); - pi->rssical_cache.rssical_phyregs_2G[9] = - read_phy_reg(pi, 0x1ab); - pi->rssical_cache.rssical_phyregs_2G[10] = - read_phy_reg(pi, 0x1b1); - pi->rssical_cache.rssical_phyregs_2G[11] = - read_phy_reg(pi, 0x1b7); - - pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - pi->rssical_cache.rssical_radio_regs_5G[0] = - read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); - pi->rssical_cache.rssical_radio_regs_5G[1] = - read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); - } else { - pi->rssical_cache.rssical_radio_regs_5G[0] = - read_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | - RADIO_2056_RX0); - pi->rssical_cache.rssical_radio_regs_5G[1] = - read_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | - RADIO_2056_RX1); - } - - pi->rssical_cache.rssical_phyregs_5G[0] = - read_phy_reg(pi, 0x1a6); - pi->rssical_cache.rssical_phyregs_5G[1] = - read_phy_reg(pi, 0x1ac); - pi->rssical_cache.rssical_phyregs_5G[2] = - read_phy_reg(pi, 0x1b2); - pi->rssical_cache.rssical_phyregs_5G[3] = - read_phy_reg(pi, 0x1b8); - pi->rssical_cache.rssical_phyregs_5G[4] = - read_phy_reg(pi, 0x1a4); - pi->rssical_cache.rssical_phyregs_5G[5] = - read_phy_reg(pi, 0x1aa); - pi->rssical_cache.rssical_phyregs_5G[6] = - read_phy_reg(pi, 0x1b0); - pi->rssical_cache.rssical_phyregs_5G[7] = - read_phy_reg(pi, 0x1b6); - pi->rssical_cache.rssical_phyregs_5G[8] = - read_phy_reg(pi, 0x1a5); - pi->rssical_cache.rssical_phyregs_5G[9] = - read_phy_reg(pi, 0x1ab); - pi->rssical_cache.rssical_phyregs_5G[10] = - read_phy_reg(pi, 0x1b1); - pi->rssical_cache.rssical_phyregs_5G[11] = - read_phy_reg(pi, 0x1b7); - - pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; - } - - wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); - wlc_phy_clip_det_nphy(pi, 1, clip_state); -} - -static void wlc_phy_restore_rssical_nphy(phy_info_t *pi) -{ - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->nphy_rssical_chanspec_2G == 0) - return; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, - RADIO_2057_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_2G[0]); - mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, - RADIO_2057_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_2G[1]); - } else { - mod_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, - RADIO_2056_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_2G[0]); - mod_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, - RADIO_2056_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_2G[1]); - } - - write_phy_reg(pi, 0x1a6, - pi->rssical_cache.rssical_phyregs_2G[0]); - write_phy_reg(pi, 0x1ac, - pi->rssical_cache.rssical_phyregs_2G[1]); - write_phy_reg(pi, 0x1b2, - pi->rssical_cache.rssical_phyregs_2G[2]); - write_phy_reg(pi, 0x1b8, - pi->rssical_cache.rssical_phyregs_2G[3]); - write_phy_reg(pi, 0x1a4, - pi->rssical_cache.rssical_phyregs_2G[4]); - write_phy_reg(pi, 0x1aa, - pi->rssical_cache.rssical_phyregs_2G[5]); - write_phy_reg(pi, 0x1b0, - pi->rssical_cache.rssical_phyregs_2G[6]); - write_phy_reg(pi, 0x1b6, - pi->rssical_cache.rssical_phyregs_2G[7]); - write_phy_reg(pi, 0x1a5, - pi->rssical_cache.rssical_phyregs_2G[8]); - write_phy_reg(pi, 0x1ab, - pi->rssical_cache.rssical_phyregs_2G[9]); - write_phy_reg(pi, 0x1b1, - pi->rssical_cache.rssical_phyregs_2G[10]); - write_phy_reg(pi, 0x1b7, - pi->rssical_cache.rssical_phyregs_2G[11]); - - } else { - if (pi->nphy_rssical_chanspec_5G == 0) - return; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, - RADIO_2057_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_5G[0]); - mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, - RADIO_2057_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_5G[1]); - } else { - mod_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, - RADIO_2056_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_5G[0]); - mod_radio_reg(pi, - RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, - RADIO_2056_VCM_MASK, - pi->rssical_cache. - rssical_radio_regs_5G[1]); - } - - write_phy_reg(pi, 0x1a6, - pi->rssical_cache.rssical_phyregs_5G[0]); - write_phy_reg(pi, 0x1ac, - pi->rssical_cache.rssical_phyregs_5G[1]); - write_phy_reg(pi, 0x1b2, - pi->rssical_cache.rssical_phyregs_5G[2]); - write_phy_reg(pi, 0x1b8, - pi->rssical_cache.rssical_phyregs_5G[3]); - write_phy_reg(pi, 0x1a4, - pi->rssical_cache.rssical_phyregs_5G[4]); - write_phy_reg(pi, 0x1aa, - pi->rssical_cache.rssical_phyregs_5G[5]); - write_phy_reg(pi, 0x1b0, - pi->rssical_cache.rssical_phyregs_5G[6]); - write_phy_reg(pi, 0x1b6, - pi->rssical_cache.rssical_phyregs_5G[7]); - write_phy_reg(pi, 0x1a5, - pi->rssical_cache.rssical_phyregs_5G[8]); - write_phy_reg(pi, 0x1ab, - pi->rssical_cache.rssical_phyregs_5G[9]); - write_phy_reg(pi, 0x1b1, - pi->rssical_cache.rssical_phyregs_5G[10]); - write_phy_reg(pi, 0x1b7, - pi->rssical_cache.rssical_phyregs_5G[11]); - } -} - -static u16 -wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, - u8 dac_test_mode) -{ - u8 phy_bw, is_phybw40; - u16 num_samps, t, spur; - fixed theta = 0, rot = 0; - u32 tbl_len; - cs32 *tone_buf = NULL; - - is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); - phy_bw = (is_phybw40 == 1) ? 40 : 20; - tbl_len = (phy_bw << 3); - - if (dac_test_mode == 1) { - spur = read_phy_reg(pi, 0x01); - spur = (spur >> 15) & 1; - phy_bw = (spur == 1) ? 82 : 80; - phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; - - tbl_len = (phy_bw << 1); - } - - tone_buf = kmalloc(sizeof(cs32) * tbl_len, GFP_ATOMIC); - if (tone_buf == NULL) { - return 0; - } - - num_samps = (u16) tbl_len; - rot = FIXED((f_kHz * 36) / phy_bw) / 100; - theta = 0; - - for (t = 0; t < num_samps; t++) { - - wlc_phy_cordic(theta, &tone_buf[t]); - - theta += rot; - - tone_buf[t].q = (s32) FLOAT(tone_buf[t].q * max_val); - tone_buf[t].i = (s32) FLOAT(tone_buf[t].i * max_val); - } - - wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); - - kfree(tone_buf); - - return num_samps; -} - -int -wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, - u8 iqmode, u8 dac_test_mode, bool modify_bbmult) -{ - u16 num_samps; - u16 loops = 0xffff; - u16 wait = 0; - - num_samps = - wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, dac_test_mode); - if (num_samps == 0) { - return -EBADE; - } - - wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, - dac_test_mode, modify_bbmult); - - return 0; -} - -static void -wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, - u16 num_samps) -{ - u16 t; - u32 *data_buf = NULL; - - data_buf = kmalloc(sizeof(u32) * num_samps, GFP_ATOMIC); - if (data_buf == NULL) { - return; - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - for (t = 0; t < num_samps; t++) { - data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | - (((unsigned int)tone_buf[t].q) & 0x3ff); - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, - data_buf); - - kfree(data_buf); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void -wlc_phy_runsamples_nphy(phy_info_t *pi, u16 num_samps, u16 loops, - u16 wait, u8 iqmode, u8 dac_test_mode, - bool modify_bbmult) -{ - u16 bb_mult; - u8 phy_bw, sample_cmd; - u16 orig_RfseqCoreActv; - u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4, lpf_bw_ctl_miscreg3, - lpf_bw_ctl_miscreg4; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - phy_bw = 20; - if (CHSPEC_IS40(pi->radio_chanspec)) - phy_bw = 40; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); - lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); - if (lpf_bw_ctl_override3 | lpf_bw_ctl_override4) { - lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & - (0x7 << 8); - lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & - (0x7 << 8); - } else { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 7), - wlc_phy_read_lpf_bw_ctl_nphy - (pi, 0), 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - - pi->nphy_sample_play_lpf_bw_ctl_ovr = true; - - lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & - (0x7 << 8); - lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & - (0x7 << 8); - } - } - - if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, - &bb_mult); - pi->nphy_bb_mult_save = - BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); - } - - if (modify_bbmult) { - bb_mult = (phy_bw == 20) ? 100 : 71; - bb_mult = (bb_mult << 8) + bb_mult; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, - &bb_mult); - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - write_phy_reg(pi, 0xc6, num_samps - 1); - - if (loops != 0xffff) { - write_phy_reg(pi, 0xc4, loops - 1); - } else { - write_phy_reg(pi, 0xc4, loops); - } - write_phy_reg(pi, 0xc5, wait); - - orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); - or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); - if (iqmode) { - - and_phy_reg(pi, 0xc2, 0x7FFF); - - or_phy_reg(pi, 0xc2, 0x8000); - } else { - - sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; - write_phy_reg(pi, 0xc3, sample_cmd); - } - - SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); - - write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); -} - -void wlc_phy_stopplayback_nphy(phy_info_t *pi) -{ - u16 playback_status; - u16 bb_mult; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - playback_status = read_phy_reg(pi, 0xc7); - if (playback_status & 0x1) { - or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); - } else if (playback_status & 0x2) { - - and_phy_reg(pi, 0xc2, - (u16) ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); - } - - and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); - - if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { - - bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, - &bb_mult); - - pi->nphy_bb_mult_save = 0; - } - - if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { - if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 7), - 0, 0, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - pi->nphy_sample_play_lpf_bw_ctl_ovr = false; - } - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) -{ - u16 base_idx[2], curr_gain[2]; - u8 core_no; - nphy_txgains_t target_gain; - u32 *tx_pwrctrl_tbl = NULL; - - if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - curr_gain); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - for (core_no = 0; core_no < 2; core_no++) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - target_gain.ipa[core_no] = - curr_gain[core_no] & 0x0007; - target_gain.pad[core_no] = - ((curr_gain[core_no] & 0x00F8) >> 3); - target_gain.pga[core_no] = - ((curr_gain[core_no] & 0x0F00) >> 8); - target_gain.txgm[core_no] = - ((curr_gain[core_no] & 0x7000) >> 12); - target_gain.txlpf[core_no] = - ((curr_gain[core_no] & 0x8000) >> 15); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - target_gain.ipa[core_no] = - curr_gain[core_no] & 0x000F; - target_gain.pad[core_no] = - ((curr_gain[core_no] & 0x00F0) >> 4); - target_gain.pga[core_no] = - ((curr_gain[core_no] & 0x0F00) >> 8); - target_gain.txgm[core_no] = - ((curr_gain[core_no] & 0x7000) >> 12); - } else { - target_gain.ipa[core_no] = - curr_gain[core_no] & 0x0003; - target_gain.pad[core_no] = - ((curr_gain[core_no] & 0x000C) >> 2); - target_gain.pga[core_no] = - ((curr_gain[core_no] & 0x0070) >> 4); - target_gain.txgm[core_no] = - ((curr_gain[core_no] & 0x0380) >> 7); - } - } - } else { - base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; - base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; - for (core_no = 0; core_no < 2; core_no++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (PHY_IPA(pi)) { - tx_pwrctrl_tbl = - wlc_phy_get_ipa_gaintbl_nphy(pi); - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { - tx_pwrctrl_tbl = - nphy_tpc_5GHz_txgain_rev3; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { - tx_pwrctrl_tbl = - (pi->srom_fem5g. - extpagain == - 3) ? - nphy_tpc_5GHz_txgain_HiPwrEPA - : - nphy_tpc_5GHz_txgain_rev4; - } else { - tx_pwrctrl_tbl = - nphy_tpc_5GHz_txgain_rev5; - } - } else { - if (NREV_GE - (pi->pubpi.phy_rev, 7)) { - if (pi->pubpi. - radiorev == 3) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_epa_2057rev3; - } else if (pi->pubpi. - radiorev == - 5) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_epa_2057rev5; - } - - } else { - if (NREV_GE - (pi->pubpi.phy_rev, - 5) - && (pi->srom_fem2g. - extpagain == - 3)) { - tx_pwrctrl_tbl = - nphy_tpc_txgain_HiPwrEPA; - } else { - tx_pwrctrl_tbl = - nphy_tpc_txgain_rev3; - } - } - } - } - if NREV_GE - (pi->pubpi.phy_rev, 7) { - target_gain.ipa[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 16) & 0x7; - target_gain.pad[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 19) & 0x1f; - target_gain.pga[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 24) & 0xf; - target_gain.txgm[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 28) & 0x7; - target_gain.txlpf[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 31) & 0x1; - } else { - target_gain.ipa[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 16) & 0xf; - target_gain.pad[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 20) & 0xf; - target_gain.pga[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 24) & 0xf; - target_gain.txgm[core_no] = - (tx_pwrctrl_tbl[base_idx[core_no]] - >> 28) & 0x7; - } - } else { - target_gain.ipa[core_no] = - (nphy_tpc_txgain[base_idx[core_no]] >> 16) & - 0x3; - target_gain.pad[core_no] = - (nphy_tpc_txgain[base_idx[core_no]] >> 18) & - 0x3; - target_gain.pga[core_no] = - (nphy_tpc_txgain[base_idx[core_no]] >> 20) & - 0x7; - target_gain.txgm[core_no] = - (nphy_tpc_txgain[base_idx[core_no]] >> 23) & - 0x7; - } - } - } - - return target_gain; -} - -static void -wlc_phy_iqcal_gainparams_nphy(phy_info_t *pi, u16 core_no, - nphy_txgains_t target_gain, - nphy_iqcal_params_t *params) -{ - u8 k; - int idx; - u16 gain_index; - u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - params->txlpf = target_gain.txlpf[core_no]; - } - params->txgm = target_gain.txgm[core_no]; - params->pga = target_gain.pga[core_no]; - params->pad = target_gain.pad[core_no]; - params->ipa = target_gain.ipa[core_no]; - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - params->cal_gain = - ((params->txlpf << 15) | (params-> - txgm << 12) | (params-> - pga << 8) | - (params->pad << 3) | (params->ipa)); - } else { - params->cal_gain = - ((params->txgm << 12) | (params-> - pga << 8) | (params-> - pad << 4) | - (params->ipa)); - } - params->ncorr[0] = 0x79; - params->ncorr[1] = 0x79; - params->ncorr[2] = 0x79; - params->ncorr[3] = 0x79; - params->ncorr[4] = 0x79; - } else { - - gain_index = ((target_gain.pad[core_no] << 0) | - (target_gain.pga[core_no] << 4) | (target_gain. - txgm[core_no] - << 8)); - - idx = -1; - for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { - if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == - gain_index) { - idx = k; - break; - } - } - - params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; - params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; - params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; - params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | - (params->pad << 2)); - params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; - params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; - params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; - params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; - } -} - -static void wlc_phy_txcal_radio_setup_nphy(phy_info_t *pi) -{ - u16 jtag_core, core; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - for (core = 0; core <= 1; core++) { - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_VCM_HG); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_IDAC); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MUX); - - if (pi->pubpi.radiorev != 5) - pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSIA); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSI_MISC1); - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER, 0x0a); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_VCM_HG, 0x43); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_IDAC, 0x55); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSI_VCM, 0x00); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSIG, 0x00); - if (pi->use_int_tx_iqlo_cal_nphy) { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TX_SSI_MUX, 0x4); - if (! - (pi-> - internal_tx_iqlo_cal_tapoff_intpa_nphy)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIA, 0x31); - } else { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIA, 0x21); - } - } - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSI_MISC1, 0x00); - } else { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER, 0x06); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_VCM_HG, 0x43); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - IQCAL_IDAC, 0x55); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSI_VCM, 0x00); - - if (pi->pubpi.radiorev != 5) - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TSSIA, 0x00); - if (pi->use_int_tx_iqlo_cal_nphy) { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TX_SSI_MUX, - 0x06); - if (! - (pi-> - internal_tx_iqlo_cal_tapoff_intpa_nphy)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIG, 0x31); - } else { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIG, 0x21); - } - } - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSI_MISC1, 0x00); - } - } - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - for (core = 0; core <= 1; core++) { - jtag_core = - (core == - PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = - read_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MASTER | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = - read_radio_reg(pi, - RADIO_2056_TX_IQCAL_VCM_HG | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = - read_radio_reg(pi, - RADIO_2056_TX_IQCAL_IDAC | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = - read_radio_reg(pi, - RADIO_2056_TX_TSSI_VCM | jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = - read_radio_reg(pi, - RADIO_2056_TX_TX_AMP_DET | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = - read_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = - read_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = - read_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = - read_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC1 | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = - read_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC2 | - jtag_core); - - pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = - read_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC3 | - jtag_core); - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MASTER | - jtag_core, 0x0a); - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_VCM_HG | - jtag_core, 0x40); - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_IDAC | - jtag_core, 0x55); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_VCM | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TX_AMP_DET | - jtag_core, 0x00); - - if (PHY_IPA(pi)) { - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX - | jtag_core, 0x4); - write_radio_reg(pi, - RADIO_2056_TX_TSSIA | - jtag_core, 0x1); - } else { - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX - | jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSIA | - jtag_core, 0x2f); - } - write_radio_reg(pi, - RADIO_2056_TX_TSSIG | jtag_core, - 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC1 | - jtag_core, 0x00); - - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC2 | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC3 | - jtag_core, 0x00); - } else { - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MASTER | - jtag_core, 0x06); - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_VCM_HG | - jtag_core, 0x40); - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_IDAC | - jtag_core, 0x55); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_VCM | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TX_AMP_DET | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSIA | jtag_core, - 0x00); - - if (PHY_IPA(pi)) { - - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX - | jtag_core, 0x06); - if (NREV_LT(pi->pubpi.phy_rev, 5)) { - - write_radio_reg(pi, - RADIO_2056_TX_TSSIG - | jtag_core, - 0x11); - } else { - - write_radio_reg(pi, - RADIO_2056_TX_TSSIG - | jtag_core, - 0x1); - } - } else { - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX - | jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSIG | - jtag_core, 0x20); - } - - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC1 | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC2 | - jtag_core, 0x00); - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC3 | - jtag_core, 0x00); - } - } - } else { - - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); - - pi->tx_rx_cal_radio_saveregs[2] = - read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); - pi->tx_rx_cal_radio_saveregs[3] = - read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); - - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); - pi->tx_rx_cal_radio_saveregs[5] = - read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); - - if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == - 0) { - - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); - } else { - - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); - } - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - - or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); - or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); - } else { - - and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); - and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); - } - } -} - -static void wlc_phy_txcal_radio_cleanup_nphy(phy_info_t *pi) -{ - u16 jtag_core, core; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (core = 0; core <= 1; core++) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 0]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 1]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 2]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 3]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 5]); - - if (pi->pubpi.radiorev != 5) - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSIA, - pi-> - tx_rx_cal_radio_saveregs[(core - * - 11) + - 6]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 7]); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 8]); - } - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - for (core = 0; core <= 1; core++) { - jtag_core = - (core == - PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; - - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MASTER | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 0]); - - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 1]); - - write_radio_reg(pi, - RADIO_2056_TX_IQCAL_IDAC | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 2]); - - write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 3]); - - write_radio_reg(pi, - RADIO_2056_TX_TX_AMP_DET | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 4]); - - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 5]); - - write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 6]); - - write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 7]); - - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC1 | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 8]); - - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC2 | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 9]); - - write_radio_reg(pi, - RADIO_2056_TX_TSSI_MISC3 | jtag_core, - pi-> - tx_rx_cal_radio_saveregs[(core * 11) + - 10]); - } - } else { - - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, - pi->tx_rx_cal_radio_saveregs[0]); - write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, - pi->tx_rx_cal_radio_saveregs[1]); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, - pi->tx_rx_cal_radio_saveregs[2]); - write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, - pi->tx_rx_cal_radio_saveregs[3]); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, - pi->tx_rx_cal_radio_saveregs[4]); - write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, - pi->tx_rx_cal_radio_saveregs[5]); - } -} - -static void wlc_phy_txcal_physetup_nphy(phy_info_t *pi) -{ - u16 val, mask; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); - pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); - - mask = ((0x3 << 8) | (0x3 << 10)); - val = (0x2 << 8); - val |= (0x2 << 10); - mod_phy_reg(pi, 0xa6, mask, val); - mod_phy_reg(pi, 0xa7, mask, val); - - val = read_phy_reg(pi, 0x8f); - pi->tx_rx_cal_phy_saveregs[2] = val; - val |= ((0x1 << 9) | (0x1 << 10)); - write_phy_reg(pi, 0x8f, val); - - val = read_phy_reg(pi, 0xa5); - pi->tx_rx_cal_phy_saveregs[3] = val; - val |= ((0x1 << 9) | (0x1 << 10)); - write_phy_reg(pi, 0xa5, val); - - pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); - mod_phy_reg(pi, 0x01, (0x1 << 15), 0); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, - &val); - pi->tx_rx_cal_phy_saveregs[5] = val; - val = 0; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, - &val); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, - &val); - pi->tx_rx_cal_phy_saveregs[6] = val; - val = 0; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, - &val); - - pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); - pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); - - if (!(pi->use_int_tx_iqlo_cal_nphy)) { - - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_PA, - 1, - RADIO_MIMO_CORESEL_CORE1 - | - RADIO_MIMO_CORESEL_CORE2); - } else { - - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_PA, - 0, - RADIO_MIMO_CORESEL_CORE1 - | - RADIO_MIMO_CORESEL_CORE2); - } - - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x2, RADIO_MIMO_CORESEL_CORE1); - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x8, RADIO_MIMO_CORESEL_CORE2); - - pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); - pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - if (NREV_IS(pi->pubpi.phy_rev, 7) - || NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), - wlc_phy_read_lpf_bw_ctl_nphy - (pi, 0), 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } - - if (pi->use_int_tx_iqlo_cal_nphy - && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { - - if (NREV_IS(pi->pubpi.phy_rev, 7)) { - - mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, - 1 << 4); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - mod_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE0, - 1, 0); - mod_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE1, - 1, 0); - } else { - mod_radio_reg(pi, - RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, - 1, 0); - mod_radio_reg(pi, - RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, - 1, 0); - } - } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 3), 0, - 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } - } - } else { - pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); - pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); - - mask = ((0x3 << 12) | (0x3 << 14)); - val = (0x2 << 12); - val |= (0x2 << 14); - mod_phy_reg(pi, 0xa6, mask, val); - mod_phy_reg(pi, 0xa7, mask, val); - - val = read_phy_reg(pi, 0xa5); - pi->tx_rx_cal_phy_saveregs[2] = val; - val |= ((0x1 << 12) | (0x1 << 13)); - write_phy_reg(pi, 0xa5, val); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, - &val); - pi->tx_rx_cal_phy_saveregs[3] = val; - val |= 0x2000; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, - &val); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, - &val); - pi->tx_rx_cal_phy_saveregs[4] = val; - val |= 0x2000; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, - &val); - - pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); - pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); - val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; - write_phy_reg(pi, 0x91, val); - write_phy_reg(pi, 0x92, val); - } -} - -static void wlc_phy_txcal_phycleanup_nphy(phy_info_t *pi) -{ - u16 mask; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); - write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); - write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); - write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); - write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, - &pi->tx_rx_cal_phy_saveregs[5]); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, - &pi->tx_rx_cal_phy_saveregs[6]); - - write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); - write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); - - write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); - write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); - - if (NREV_IS(pi->pubpi.phy_rev, 7) - || NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 0, 0, - 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } - - wlc_phy_resetcca_nphy(pi); - - if (pi->use_int_tx_iqlo_cal_nphy - && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { - - if (NREV_IS(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - mod_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE0, - 1, 1); - mod_radio_reg(pi, - RADIO_2057_PAD2G_TUNE_PUS_CORE1, - 1, 1); - } else { - mod_radio_reg(pi, - RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, - 1, 1); - mod_radio_reg(pi, - RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, - 1, 1); - } - - mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, - 0); - } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 3), 0, - 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } - } - } else { - mask = ((0x3 << 12) | (0x3 << 14)); - mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); - mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); - write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, - &pi->tx_rx_cal_phy_saveregs[3]); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, - &pi->tx_rx_cal_phy_saveregs[4]); - - write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); - write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); - } -} - -#define NPHY_CAL_TSSISAMPS 64 -#define NPHY_TEST_TONE_FREQ_40MHz 4000 -#define NPHY_TEST_TONE_FREQ_20MHz 2500 - -void -wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, u8 num_samps) -{ - u16 tssi_reg; - s32 temp, pwrindex[2]; - s32 idle_tssi[2]; - s32 rssi_buf[4]; - s32 tssival[2]; - u8 tssi_type; - - tssi_reg = read_phy_reg(pi, 0x1e9); - - temp = (s32) (tssi_reg & 0x3f); - idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); - - temp = (s32) ((tssi_reg >> 8) & 0x3f); - idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); - - tssi_type = - CHSPEC_IS5G(pi->radio_chanspec) ? - (u8)NPHY_RSSI_SEL_TSSI_5G:(u8)NPHY_RSSI_SEL_TSSI_2G; - - wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); - - tssival[0] = rssi_buf[0] / ((s32) num_samps); - tssival[1] = rssi_buf[2] / ((s32) num_samps); - - pwrindex[0] = idle_tssi[0] - tssival[0] + 64; - pwrindex[1] = idle_tssi[1] - tssival[1] + 64; - - if (pwrindex[0] < 0) { - pwrindex[0] = 0; - } else if (pwrindex[0] > 63) { - pwrindex[0] = 63; - } - - if (pwrindex[1] < 0) { - pwrindex[1] = 0; - } else if (pwrindex[1] > 63) { - pwrindex[1] = 63; - } - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, - (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, - (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); -} - -static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi) -{ - u16 txcal_gain[2]; - - pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; - pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; - wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); - wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - txcal_gain); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; - txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; - } else { - txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; - txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - txcal_gain); -} - -static void wlc_phy_precal_txgain_nphy(phy_info_t *pi) -{ - bool save_bbmult = false; - u8 txcal_index_2057_rev5n7 = 0; - u8 txcal_index_2057_rev3n4n6 = 10; - - if (pi->use_int_tx_iqlo_cal_nphy) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - - pi->nphy_txcal_pwr_idx[0] = - txcal_index_2057_rev3n4n6; - pi->nphy_txcal_pwr_idx[1] = - txcal_index_2057_rev3n4n6; - wlc_phy_txpwr_index_nphy(pi, 3, - txcal_index_2057_rev3n4n6, - false); - } else { - - pi->nphy_txcal_pwr_idx[0] = - txcal_index_2057_rev5n7; - pi->nphy_txcal_pwr_idx[1] = - txcal_index_2057_rev5n7; - wlc_phy_txpwr_index_nphy(pi, 3, - txcal_index_2057_rev5n7, - false); - } - save_bbmult = true; - - } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { - wlc_phy_cal_txgainctrl_nphy(pi, 11, false); - if (pi->sh->hw_phytxchain != 3) { - pi->nphy_txcal_pwr_idx[1] = - pi->nphy_txcal_pwr_idx[0]; - wlc_phy_txpwr_index_nphy(pi, 3, - pi-> - nphy_txcal_pwr_idx[0], - true); - save_bbmult = true; - } - - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { - if (PHY_IPA(pi)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - wlc_phy_cal_txgainctrl_nphy(pi, 12, - false); - } else { - pi->nphy_txcal_pwr_idx[0] = 80; - pi->nphy_txcal_pwr_idx[1] = 80; - wlc_phy_txpwr_index_nphy(pi, 3, 80, - false); - save_bbmult = true; - } - } else { - - wlc_phy_internal_cal_txgain_nphy(pi); - save_bbmult = true; - } - - } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { - if (PHY_IPA(pi)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - wlc_phy_cal_txgainctrl_nphy(pi, 12, - false); - } else { - wlc_phy_cal_txgainctrl_nphy(pi, 14, - false); - } - } else { - - wlc_phy_internal_cal_txgain_nphy(pi); - save_bbmult = true; - } - } - - } else { - wlc_phy_cal_txgainctrl_nphy(pi, 10, false); - } - - if (save_bbmult) { - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, - &pi->nphy_txcal_bbmult); - } -} - -void -wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, bool debug) -{ - int gainctrl_loopidx; - uint core; - u16 m0m1, curr_m0m1; - s32 delta_power; - s32 txpwrindex; - s32 qdBm_power[2]; - u16 orig_BBConfig; - u16 phy_saveregs[4]; - u32 freq_test; - u16 ampl_test = 250; - uint stepsize; - bool phyhang_avoid_state = false; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - stepsize = 2; - } else { - - stepsize = 1; - } - - if (CHSPEC_IS40(pi->radio_chanspec)) { - freq_test = 5000; - } else { - freq_test = 2500; - } - - wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); - wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - phyhang_avoid_state = pi->phyhang_avoid; - pi->phyhang_avoid = false; - - phy_saveregs[0] = read_phy_reg(pi, 0x91); - phy_saveregs[1] = read_phy_reg(pi, 0x92); - phy_saveregs[2] = read_phy_reg(pi, 0xe7); - phy_saveregs[3] = read_phy_reg(pi, 0xec); - wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, - RADIO_MIMO_CORESEL_CORE1 | - RADIO_MIMO_CORESEL_CORE2); - - if (!debug) { - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x2, RADIO_MIMO_CORESEL_CORE1); - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x8, RADIO_MIMO_CORESEL_CORE2); - } else { - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x1, RADIO_MIMO_CORESEL_CORE1); - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x7, RADIO_MIMO_CORESEL_CORE2); - } - - orig_BBConfig = read_phy_reg(pi, 0x01); - mod_phy_reg(pi, 0x01, (0x1 << 15), 0); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; - - for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; - gainctrl_loopidx++) { - wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, - false); - - if (core == PHY_CORE_0) { - curr_m0m1 = m0m1 & 0xff00; - } else { - curr_m0m1 = m0m1 & 0x00ff; - } - - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); - wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); - - udelay(50); - - wlc_phy_est_tonepwr_nphy(pi, qdBm_power, - NPHY_CAL_TSSISAMPS); - - pi->nphy_bb_mult_save = 0; - wlc_phy_stopplayback_nphy(pi); - - delta_power = (dBm_targetpower * 4) - qdBm_power[core]; - - txpwrindex -= stepsize * delta_power; - if (txpwrindex < 0) { - txpwrindex = 0; - } else if (txpwrindex > 127) { - txpwrindex = 127; - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (NREV_IS(pi->pubpi.phy_rev, 4) && - (pi->srom_fem5g.extpagain == 3)) { - if (txpwrindex < 30) { - txpwrindex = 30; - } - } - } else { - if (NREV_GE(pi->pubpi.phy_rev, 5) && - (pi->srom_fem2g.extpagain == 3)) { - if (txpwrindex < 50) { - txpwrindex = 50; - } - } - } - - wlc_phy_txpwr_index_nphy(pi, (1 << core), - (u8) txpwrindex, true); - } - - pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; - - if (debug) { - u16 radio_gain; - u16 dbg_m0m1; - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); - - wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, - false); - - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); - wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); - - udelay(100); - - wlc_phy_est_tonepwr_nphy(pi, qdBm_power, - NPHY_CAL_TSSISAMPS); - - wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, - &radio_gain); - - mdelay(4000); - pi->nphy_bb_mult_save = 0; - wlc_phy_stopplayback_nphy(pi); - } - } - - wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); - wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); - - write_phy_reg(pi, 0x01, orig_BBConfig); - - write_phy_reg(pi, 0x91, phy_saveregs[0]); - write_phy_reg(pi, 0x92, phy_saveregs[1]); - write_phy_reg(pi, 0xe7, phy_saveregs[2]); - write_phy_reg(pi, 0xec, phy_saveregs[3]); - - pi->phyhang_avoid = phyhang_avoid_state; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core) -{ - int index; - u32 bbmult_scale; - u16 bbmult; - u16 tblentry; - - nphy_txiqcal_ladder_t ladder_lo[] = { - {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, - {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, - {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} - }; - - nphy_txiqcal_ladder_t ladder_iq[] = { - {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, - {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, - {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} - }; - - bbmult = (core == PHY_CORE_0) ? - ((pi->nphy_txcal_bbmult >> 8) & 0xff) : (pi-> - nphy_txcal_bbmult & 0xff); - - for (index = 0; index < 18; index++) { - bbmult_scale = ladder_lo[index].percent * bbmult; - bbmult_scale /= 100; - - tblentry = - ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, - &tblentry); - - bbmult_scale = ladder_iq[index].percent * bbmult; - bbmult_scale /= 100; - - tblentry = - ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, - 16, &tblentry); - } -} - -void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) -{ - nphy_txgains_t target_gain; - u8 tx_pwr_ctrl_state; - bool fullcal = true; - bool restore_tx_gain = false; - bool mphase; - - if (NORADIO_ENAB(pi->pubpi)) { - wlc_phy_cal_perical_mphase_reset(pi); - return; - } - - if (PHY_MUTED(pi)) - return; - - if (caltype == PHY_PERICAL_AUTO) - fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); - else if (caltype == PHY_PERICAL_PARTIAL) - fullcal = false; - - if (pi->cal_type_override != PHY_PERICAL_AUTO) { - fullcal = - (pi->cal_type_override == PHY_PERICAL_FULL) ? true : false; - } - - if ((pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT)) { - if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) - wlc_phy_cal_perical_mphase_restart(pi); - } - - if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL)) { - wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); - } - - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - wlc_phyreg_enter((wlc_phy_t *) pi); - - if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || - (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { - pi->nphy_cal_orig_pwr_idx[0] = - (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); - pi->nphy_cal_orig_pwr_idx[1] = - (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); - - if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, - 0x110, 16, - pi->nphy_cal_orig_tx_gain); - } else { - pi->nphy_cal_orig_tx_gain[0] = 0; - pi->nphy_cal_orig_tx_gain[1] = 0; - } - } - target_gain = wlc_phy_get_tx_gain_nphy(pi); - tx_pwr_ctrl_state = pi->nphy_txpwrctrl; - wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); - - if (pi->antsel_type == ANTSEL_2x3) - wlc_phy_antsel_init((wlc_phy_t *) pi, true); - - mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); - if (!mphase) { - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_precal_txgain_nphy(pi); - pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); - restore_tx_gain = true; - - target_gain = pi->nphy_cal_target_gain; - } - if (0 == - wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, mphase)) { - if (PHY_IPA(pi)) - wlc_phy_a4(pi, true); - - wlc_phyreg_exit((wlc_phy_t *) pi); - wlapi_enable_mac(pi->sh->physhim); - wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, - 10000); - wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_phyreg_enter((wlc_phy_t *) pi); - - if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, - (pi-> - first_cal_after_assoc - || (pi-> - cal_type_override - == - PHY_PERICAL_FULL)) - ? 2 : 0, false)) { - wlc_phy_savecal_nphy(pi); - - wlc_phy_txpwrctrl_coeff_setup_nphy(pi); - - pi->nphy_perical_last = pi->sh->now; - } - } - if (caltype != PHY_PERICAL_AUTO) { - wlc_phy_rssi_cal_nphy(pi); - } - - if (pi->first_cal_after_assoc - || (pi->cal_type_override == PHY_PERICAL_FULL)) { - pi->first_cal_after_assoc = false; - wlc_phy_txpwrctrl_idle_tssi_nphy(pi); - wlc_phy_txpwrctrl_pwr_setup_nphy(pi); - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_radio205x_vcocal_nphy(pi); - } - } else { - switch (pi->mphase_cal_phase_id) { - case MPHASE_CAL_STATE_INIT: - pi->nphy_perical_last = pi->sh->now; - pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_precal_txgain_nphy(pi); - } - pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); - pi->mphase_cal_phase_id++; - break; - - case MPHASE_CAL_STATE_TXPHASE0: - case MPHASE_CAL_STATE_TXPHASE1: - case MPHASE_CAL_STATE_TXPHASE2: - case MPHASE_CAL_STATE_TXPHASE3: - case MPHASE_CAL_STATE_TXPHASE4: - case MPHASE_CAL_STATE_TXPHASE5: - if ((pi->radar_percal_mask & 0x10) != 0) - pi->nphy_rxcal_active = true; - - if (wlc_phy_cal_txiqlo_nphy - (pi, pi->nphy_cal_target_gain, fullcal, - true) != 0) { - - wlc_phy_cal_perical_mphase_reset(pi); - break; - } - - if (NREV_LE(pi->pubpi.phy_rev, 2) && - (pi->mphase_cal_phase_id == - MPHASE_CAL_STATE_TXPHASE4)) { - pi->mphase_cal_phase_id += 2; - } else { - pi->mphase_cal_phase_id++; - } - break; - - case MPHASE_CAL_STATE_PAPDCAL: - if ((pi->radar_percal_mask & 0x2) != 0) - pi->nphy_rxcal_active = true; - - if (PHY_IPA(pi)) { - wlc_phy_a4(pi, true); - } - pi->mphase_cal_phase_id++; - break; - - case MPHASE_CAL_STATE_RXCAL: - if ((pi->radar_percal_mask & 0x1) != 0) - pi->nphy_rxcal_active = true; - if (wlc_phy_cal_rxiq_nphy(pi, target_gain, - (pi->first_cal_after_assoc || - (pi->cal_type_override == - PHY_PERICAL_FULL)) ? 2 : 0, - false) == 0) { - wlc_phy_savecal_nphy(pi); - } - - pi->mphase_cal_phase_id++; - break; - - case MPHASE_CAL_STATE_RSSICAL: - if ((pi->radar_percal_mask & 0x4) != 0) - pi->nphy_rxcal_active = true; - wlc_phy_txpwrctrl_coeff_setup_nphy(pi); - wlc_phy_rssi_cal_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_radio205x_vcocal_nphy(pi); - } - restore_tx_gain = true; - - if (pi->first_cal_after_assoc) { - pi->mphase_cal_phase_id++; - } else { - wlc_phy_cal_perical_mphase_reset(pi); - } - - break; - - case MPHASE_CAL_STATE_IDLETSSI: - if ((pi->radar_percal_mask & 0x8) != 0) - pi->nphy_rxcal_active = true; - - if (pi->first_cal_after_assoc) { - pi->first_cal_after_assoc = false; - wlc_phy_txpwrctrl_idle_tssi_nphy(pi); - wlc_phy_txpwrctrl_pwr_setup_nphy(pi); - } - - wlc_phy_cal_perical_mphase_reset(pi); - break; - - default: - wlc_phy_cal_perical_mphase_reset(pi); - break; - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (restore_tx_gain) { - if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { - - wlc_phy_txpwr_index_nphy(pi, 1, - pi-> - nphy_cal_orig_pwr_idx - [0], false); - wlc_phy_txpwr_index_nphy(pi, 2, - pi-> - nphy_cal_orig_pwr_idx - [1], false); - - pi->nphy_txpwrindex[0].index = -1; - pi->nphy_txpwrindex[1].index = -1; - } else { - wlc_phy_txpwr_index_nphy(pi, (1 << 0), - (s8) (pi-> - nphy_txpwrindex - [0]. - index_internal), - false); - wlc_phy_txpwr_index_nphy(pi, (1 << 1), - (s8) (pi-> - nphy_txpwrindex - [1]. - index_internal), - false); - } - } - } - - wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); - wlc_phyreg_exit((wlc_phy_t *) pi); - wlapi_enable_mac(pi->sh->physhim); -} - -int -wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - bool fullcal, bool mphase) -{ - u16 val; - u16 tbl_buf[11]; - u8 cal_cnt; - u16 cal_cmd; - u8 num_cals, max_cal_cmds; - u16 core_no, cal_type; - u16 diq_start = 0; - u8 phy_bw; - u16 max_val; - u16 tone_freq; - u16 gain_save[2]; - u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; - u32 tbl_len; - void *tbl_ptr; - bool ladder_updated[2]; - u8 mphase_cal_lastphase = 0; - int bcmerror = 0; - bool phyhang_avoid_state = false; - - u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { - 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, - 0x1902, - 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, - 0x6407 - }; - - u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { - 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, - 0x3200, - 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, - 0x6407 - }; - - u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { - 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, - 0x1202, - 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, - 0x4707 - }; - - u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { - 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, - 0x2300, - 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, - 0x4707 - }; - - u16 tbl_tx_iqlo_cal_startcoefs[] = { - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000 - }; - - u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { - 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, - 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 - }; - - u16 tbl_tx_iqlo_cal_cmds_recal[] = { - 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, - 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 - }; - - u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000 - }; - - u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { - 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, - 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 - }; - - u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { - 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, - 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 - }; - - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (NREV_GE(pi->pubpi.phy_rev, 4)) { - phyhang_avoid_state = pi->phyhang_avoid; - pi->phyhang_avoid = false; - } - - if (CHSPEC_IS40(pi->radio_chanspec)) { - phy_bw = 40; - } else { - phy_bw = 20; - } - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); - - for (core_no = 0; core_no <= 1; core_no++) { - wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, - &cal_params[core_no]); - cal_gain[core_no] = cal_params[core_no].cal_gain; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); - - wlc_phy_txcal_radio_setup_nphy(pi); - - wlc_phy_txcal_physetup_nphy(pi); - - ladder_updated[0] = ladder_updated[1] = false; - if (!(NREV_GE(pi->pubpi.phy_rev, 6) || - (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) - && (CHSPEC_IS2G(pi->radio_chanspec))))) { - - if (phy_bw == 40) { - tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; - tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); - } else { - tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; - tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, - 16, tbl_ptr); - - if (phy_bw == 40) { - tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; - tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); - } else { - tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; - tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, - 16, tbl_ptr); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_phy_reg(pi, 0xc2, 0x8ad9); - } else { - write_phy_reg(pi, 0xc2, 0x8aa9); - } - - max_val = 250; - tone_freq = (phy_bw == 20) ? 2500 : 5000; - - if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { - wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); - bcmerror = 0; - } else { - bcmerror = - wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, false); - } - - if (bcmerror == 0) { - - if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { - tbl_ptr = pi->mphase_txcal_bestcoeffs; - tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - - tbl_len -= 2; - } - } else { - if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { - - tbl_ptr = pi->nphy_txiqlocal_bestc; - tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - - tbl_len -= 2; - } - } else { - - fullcal = true; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - tbl_ptr = - tbl_tx_iqlo_cal_startcoefs_nphyrev3; - tbl_len = - ARRAY_SIZE - (tbl_tx_iqlo_cal_startcoefs_nphyrev3); - } else { - tbl_ptr = tbl_tx_iqlo_cal_startcoefs; - tbl_len = - ARRAY_SIZE - (tbl_tx_iqlo_cal_startcoefs); - } - } - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, - 16, tbl_ptr); - - if (fullcal) { - max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? - ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : - ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); - } else { - max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? - ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : - ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); - } - - if (mphase) { - cal_cnt = pi->mphase_txcal_cmdidx; - if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) { - num_cals = cal_cnt + pi->mphase_txcal_numcmds; - } else { - num_cals = max_cal_cmds; - } - } else { - cal_cnt = 0; - num_cals = max_cal_cmds; - } - - for (; cal_cnt < num_cals; cal_cnt++) { - - if (fullcal) { - cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? - tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 - [cal_cnt] : - tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; - } else { - cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? - tbl_tx_iqlo_cal_cmds_recal_nphyrev3[cal_cnt] - : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; - } - - core_no = ((cal_cmd & 0x3000) >> 12); - cal_type = ((cal_cmd & 0x0F00) >> 8); - - if (NREV_GE(pi->pubpi.phy_rev, 6) || - (NREV_IS(pi->pubpi.phy_rev, 5) && - PHY_IPA(pi) - && (CHSPEC_IS2G(pi->radio_chanspec)))) { - if (!ladder_updated[core_no]) { - wlc_phy_update_txcal_ladder_nphy(pi, - core_no); - ladder_updated[core_no] = true; - } - } - - val = - (cal_params[core_no]. - ncorr[cal_type] << 8) | NPHY_N_GCTL; - write_phy_reg(pi, 0xc1, val); - - if ((cal_type == 1) || (cal_type == 3) - || (cal_type == 4)) { - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, - 1, 69 + core_no, 16, - tbl_buf); - - diq_start = tbl_buf[0]; - - tbl_buf[0] = 0; - wlc_phy_table_write_nphy(pi, - NPHY_TBL_ID_IQLOCAL, 1, - 69 + core_no, 16, - tbl_buf); - } - - write_phy_reg(pi, 0xc0, cal_cmd); - - SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), - 20000); - if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, - "HW error: txiq calib")) - return -EIO; - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, - tbl_len, 96, 16, tbl_buf); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, - tbl_len, 64, 16, tbl_buf); - - if ((cal_type == 1) || (cal_type == 3) - || (cal_type == 4)) { - - tbl_buf[0] = diq_start; - - } - - } - - if (mphase) { - pi->mphase_txcal_cmdidx = num_cals; - if (pi->mphase_txcal_cmdidx >= max_cal_cmds) - pi->mphase_txcal_cmdidx = 0; - } - - mphase_cal_lastphase = - (NREV_LE(pi->pubpi.phy_rev, 2)) ? - MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; - - if (!mphase - || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, - 16, tbl_buf); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, - 16, tbl_buf); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - - tbl_buf[0] = 0; - tbl_buf[1] = 0; - tbl_buf[2] = 0; - tbl_buf[3] = 0; - - } - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, - 16, tbl_buf); - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, - 16, tbl_buf); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, - 16, tbl_buf); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, - 16, tbl_buf); - - tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - - tbl_len -= 2; - } - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, - tbl_len, 96, 16, - pi->nphy_txiqlocal_bestc); - - pi->nphy_txiqlocal_coeffsvalid = true; - pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; - } else { - tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - - tbl_len -= 2; - } - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, - tbl_len, 96, 16, - pi->mphase_txcal_bestcoeffs); - } - - wlc_phy_stopplayback_nphy(pi); - - write_phy_reg(pi, 0xc2, 0x0000); - - } - - wlc_phy_txcal_phycleanup_nphy(pi); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - gain_save); - - wlc_phy_txcal_radio_cleanup_nphy(pi); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - if (!mphase - || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) - wlc_phy_tx_iq_war_nphy(pi); - } - - if (NREV_GE(pi->pubpi.phy_rev, 4)) { - pi->phyhang_avoid = phyhang_avoid_state; - } - - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - return bcmerror; -} - -static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi) -{ - u16 tbl_buf[7]; - - if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && - (pi->nphy_txiqlocal_coeffsvalid)) { - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, - ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); - - if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || - (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || - (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || - (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, - 16, pi->nphy_txiqlocal_bestc); - - tbl_buf[0] = 0; - tbl_buf[1] = 0; - tbl_buf[2] = 0; - tbl_buf[3] = 0; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, - 16, tbl_buf); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, - 16, - &pi->nphy_txiqlocal_bestc[5]); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, - 16, - &pi->nphy_txiqlocal_bestc[5]); - } - } -} - -static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi) -{ - nphy_iq_comp_t tx_comp; - - wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, (void *)&tx_comp); - - wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); - wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); - wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); - wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); -} - -void -wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *pcomp) -{ - if (write) { - write_phy_reg(pi, 0x9a, pcomp->a0); - write_phy_reg(pi, 0x9b, pcomp->b0); - write_phy_reg(pi, 0x9c, pcomp->a1); - write_phy_reg(pi, 0x9d, pcomp->b1); - } else { - pcomp->a0 = read_phy_reg(pi, 0x9a); - pcomp->b0 = read_phy_reg(pi, 0x9b); - pcomp->a1 = read_phy_reg(pi, 0x9c); - pcomp->b1 = read_phy_reg(pi, 0x9d); - } -} - -void -wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, u16 num_samps, - u8 wait_time, u8 wait_for_crs) -{ - u8 core; - - write_phy_reg(pi, 0x12b, num_samps); - mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); - mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, - (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); - - mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); - - SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), - 10000); - if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, - "HW error: rxiq est")) - return; - - if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - est[core].i_pwr = - (read_phy_reg(pi, NPHY_IqestipwrAccHi(core)) << 16) - | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); - est[core].q_pwr = - (read_phy_reg(pi, NPHY_IqestqpwrAccHi(core)) << 16) - | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); - est[core].iq_prod = - (read_phy_reg(pi, NPHY_IqestIqAccHi(core)) << 16) | - read_phy_reg(pi, NPHY_IqestIqAccLo(core)); - } - } -} - -#define CAL_RETRY_CNT 2 -static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) -{ - u8 curr_core; - phy_iq_est_t est[PHY_CORE_MAX]; - nphy_iq_comp_t old_comp, new_comp; - s32 iq = 0; - u32 ii = 0, qq = 0; - s16 iq_nbits, qq_nbits, brsh, arsh; - s32 a, b, temp; - int bcmerror = 0; - uint cal_retry = 0; - - if (core_mask == 0x0) - return; - - wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); - new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; - wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); - - cal_try: - wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); - - new_comp = old_comp; - - for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { - - if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { - iq = est[curr_core].iq_prod; - ii = est[curr_core].i_pwr; - qq = est[curr_core].q_pwr; - } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { - iq = est[curr_core].iq_prod; - ii = est[curr_core].i_pwr; - qq = est[curr_core].q_pwr; - } else { - continue; - } - - if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { - bcmerror = -EBADE; - break; - } - - iq_nbits = wlc_phy_nbits(iq); - qq_nbits = wlc_phy_nbits(qq); - - arsh = 10 - (30 - iq_nbits); - if (arsh >= 0) { - a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); - temp = (s32) (ii >> arsh); - if (temp == 0) { - bcmerror = -EBADE; - break; - } - } else { - a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); - temp = (s32) (ii << -arsh); - if (temp == 0) { - bcmerror = -EBADE; - break; - } - } - - a /= temp; - - brsh = qq_nbits - 31 + 20; - if (brsh >= 0) { - b = (qq << (31 - qq_nbits)); - temp = (s32) (ii >> brsh); - if (temp == 0) { - bcmerror = -EBADE; - break; - } - } else { - b = (qq << (31 - qq_nbits)); - temp = (s32) (ii << -brsh); - if (temp == 0) { - bcmerror = -EBADE; - break; - } - } - b /= temp; - b -= a * a; - b = (s32) int_sqrt((unsigned long) b); - b -= (1 << 10); - - if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - new_comp.a0 = (s16) a & 0x3ff; - new_comp.b0 = (s16) b & 0x3ff; - } else { - - new_comp.a0 = (s16) b & 0x3ff; - new_comp.b0 = (s16) a & 0x3ff; - } - } - if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - new_comp.a1 = (s16) a & 0x3ff; - new_comp.b1 = (s16) b & 0x3ff; - } else { - - new_comp.a1 = (s16) b & 0x3ff; - new_comp.b1 = (s16) a & 0x3ff; - } - } - } - - if (bcmerror != 0) { - printk("%s: Failed, cnt = %d\n", __func__, cal_retry); - - if (cal_retry < CAL_RETRY_CNT) { - cal_retry++; - goto cal_try; - } - - new_comp = old_comp; - } else if (cal_retry > 0) { - } - - wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); -} - -static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, u8 rx_core) -{ - u16 offtune_val; - u16 bias_g = 0; - u16 bias_a = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (rx_core == PHY_CORE_0) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); - - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, - 0x3); - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, - 0xaf); - - } else { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); - - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, - 0x3); - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, - 0x7f); - } - - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); - - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, - 0x3); - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, - 0xaf); - - } else { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); - - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, - 0x3); - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, - 0x7f); - } - } - - } else { - if (rx_core == PHY_CORE_0) { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX1); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX0); - - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[2] = - read_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX0); - pi->tx_rx_cal_radio_saveregs[3] = - read_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX1); - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX0); - - write_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX0, 0x40); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX1, bias_a); - - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX0, bias_a); - } else { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE - | RADIO_2056_RX0); - - offtune_val = - (pi-> - tx_rx_cal_radio_saveregs[2] & 0xF0) - >> 8; - offtune_val = - (offtune_val <= 0x7) ? 0xF : 0; - - mod_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE | - RADIO_2056_RX0, 0xF0, - (offtune_val << 8)); - } - - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX1, 0x9); - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX0, 0x9); - } else { - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX0); - - write_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX0, 0x40); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX1, bias_g); - - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX0, bias_g); - - } else { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE - | RADIO_2056_RX0); - - offtune_val = - (pi-> - tx_rx_cal_radio_saveregs[2] & 0xF0) - >> 8; - offtune_val = - (offtune_val <= 0x7) ? 0xF : 0; - - mod_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE | - RADIO_2056_RX0, 0xF0, - (offtune_val << 8)); - } - - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX1, 0x6); - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX0, 0x6); - } - - } else { - pi->tx_rx_cal_radio_saveregs[0] = - read_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX0); - pi->tx_rx_cal_radio_saveregs[1] = - read_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX1); - - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[2] = - read_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX1); - pi->tx_rx_cal_radio_saveregs[3] = - read_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX0); - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX1); - - write_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX1, 0x40); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX0, bias_a); - - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX1, bias_a); - } else { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE - | RADIO_2056_RX1); - - offtune_val = - (pi-> - tx_rx_cal_radio_saveregs[2] & 0xF0) - >> 8; - offtune_val = - (offtune_val <= 0x7) ? 0xF : 0; - - mod_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE | - RADIO_2056_RX1, 0xF0, - (offtune_val << 8)); - } - - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX0, 0x9); - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX1, 0x9); - } else { - if (pi->pubpi.radiorev >= 5) { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX1); - - write_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX1, 0x40); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX0, bias_g); - - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX1, bias_g); - } else { - pi->tx_rx_cal_radio_saveregs[4] = - read_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE - | RADIO_2056_RX1); - - offtune_val = - (pi-> - tx_rx_cal_radio_saveregs[2] & 0xF0) - >> 8; - offtune_val = - (offtune_val <= 0x7) ? 0xF : 0; - - mod_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE | - RADIO_2056_RX1, 0xF0, - (offtune_val << 8)); - } - - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX0, 0x6); - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX1, 0x6); - } - } - } -} - -static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, u8 rx_core) -{ - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (rx_core == PHY_CORE_0) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, - pi-> - tx_rx_cal_radio_saveregs[0]); - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, - pi-> - tx_rx_cal_radio_saveregs[1]); - - } else { - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, - pi-> - tx_rx_cal_radio_saveregs[0]); - write_radio_reg(pi, - RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, - pi-> - tx_rx_cal_radio_saveregs[1]); - } - - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, - pi-> - tx_rx_cal_radio_saveregs[0]); - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, - pi-> - tx_rx_cal_radio_saveregs[1]); - - } else { - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, - pi-> - tx_rx_cal_radio_saveregs[0]); - write_radio_reg(pi, - RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, - pi-> - tx_rx_cal_radio_saveregs[1]); - } - } - - } else { - if (rx_core == PHY_CORE_0) { - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX1, - pi->tx_rx_cal_radio_saveregs[0]); - - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX0, - pi->tx_rx_cal_radio_saveregs[1]); - - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX0, - pi-> - tx_rx_cal_radio_saveregs[2]); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX1, - pi-> - tx_rx_cal_radio_saveregs[3]); - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX0, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } else { - write_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE - | RADIO_2056_RX0, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } - } else { - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX0, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } else { - write_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE - | RADIO_2056_RX0, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } - } - - } else { - write_radio_reg(pi, - RADIO_2056_TX_RXIQCAL_TXMUX | - RADIO_2056_TX0, - pi->tx_rx_cal_radio_saveregs[0]); - - write_radio_reg(pi, - RADIO_2056_RX_RXIQCAL_RXMUX | - RADIO_2056_RX1, - pi->tx_rx_cal_radio_saveregs[1]); - - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_RXSPARE2 | - RADIO_2056_RX1, - pi-> - tx_rx_cal_radio_saveregs[2]); - - write_radio_reg(pi, - RADIO_2056_TX_TXSPARE2 | - RADIO_2056_TX0, - pi-> - tx_rx_cal_radio_saveregs[3]); - } - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_LNAA_MASTER - | RADIO_2056_RX1, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } else { - write_radio_reg(pi, - RADIO_2056_RX_LNAA_TUNE - | RADIO_2056_RX1, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } - } else { - if (pi->pubpi.radiorev >= 5) { - write_radio_reg(pi, - RADIO_2056_RX_LNAG_MASTER - | RADIO_2056_RX1, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } else { - write_radio_reg(pi, - RADIO_2056_RX_LNAG_TUNE - | RADIO_2056_RX1, - pi-> - tx_rx_cal_radio_saveregs - [4]); - } - } - } - } -} - -static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, u8 rx_core) -{ - u8 tx_core; - u16 rx_antval, tx_antval; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - tx_core = rx_core; - } else { - tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; - } - - pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); - pi->tx_rx_cal_phy_saveregs[1] = - read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); - pi->tx_rx_cal_phy_saveregs[2] = - read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); - pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); - pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); - pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); - pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); - pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); - pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); - pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); - pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); - pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); - } - - pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); - pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); - - mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); - - } else { - - mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); - mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); - mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); - mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); - } - - mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); - mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, - (0x1 << 2), (0x1 << 2)); - if (NREV_LT(pi->pubpi.phy_rev, 7)) { - mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), - (0x1 << 0) | (0x1 << 1), 0); - mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? - 0x8f : 0xa5, - (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); - } - - wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, - RADIO_MIMO_CORESEL_CORE1 | - RADIO_MIMO_CORESEL_CORE2); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), - 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - if (CHSPEC_IS40(pi->radio_chanspec)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 7), - 2, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } else { - wlc_phy_rfctrl_override_nphy_rev7(pi, - (0x1 << 7), - 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), - 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); - } - - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - 0x1, rx_core + 1); - } else { - - if (rx_core == PHY_CORE_0) { - rx_antval = 0x1; - tx_antval = 0x8; - } else { - rx_antval = 0x4; - tx_antval = 0x2; - } - - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - rx_antval, rx_core + 1); - wlc_phy_rfctrlintc_override_nphy(pi, - NPHY_RfctrlIntc_override_TRSW, - tx_antval, tx_core + 1); - } -} - -static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, u8 rx_core) -{ - - write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); - write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, - pi->tx_rx_cal_phy_saveregs[1]); - write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, - pi->tx_rx_cal_phy_saveregs[2]); - write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); - write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); - - write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); - write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); - write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); - write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); - write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); - write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); - write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); - } - - write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); - write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); -} - -static void -wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, - u16 *rxgain, u8 cal_type) -{ - - u16 num_samps; - phy_iq_est_t est[PHY_CORE_MAX]; - u8 tx_core; - nphy_iq_comp_t save_comp, zero_comp; - u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, thresh_pwr = - 10000; - s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; - bool gainctrl_done = false; - u8 mix_tia_gain = 3; - s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; - s8 curr_gaintbl_index = 3; - u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; - nphy_ipa_txrxgain_t *nphy_rxcal_gaintbl; - u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; - int fine_gain_idx; - s8 txpwrindex; - u16 nphy_rxcal_txgain[2]; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - tx_core = rx_core; - } else { - tx_core = 1 - rx_core; - } - - num_samps = 1024; - desired_log2_pwr = (cal_type == 0) ? 13 : 13; - - wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); - zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; - wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mix_tia_gain = 3; - } else if (NREV_GE(pi->pubpi.phy_rev, 4)) { - mix_tia_gain = 4; - } else { - mix_tia_gain = 6; - } - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; - } else { - nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; - } - } else { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; - } else { - nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; - } - } - - do { - - hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? - 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; - lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; - lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; - lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; - lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; - txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_rxgain, - ((lpf_biq1 << 12) | - (lpf_biq0 << 8) | - (mix_tia_gain << - 4) | (lna2 << 2) - | lna1), 0x3, 0); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), - ((hpvga << 12) | - (lpf_biq1 << 10) | - (lpf_biq0 << 8) | - (mix_tia_gain << 4) | - (lna2 << 2) | lna1), 0x3, - 0); - } - - pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; - - if (txpwrindex == -1) { - nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; - nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, - 2, 0x110, 16, - nphy_rxcal_txgain); - } else { - wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, - false); - } - - wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? - NPHY_RXCAL_TONEFREQ_40MHz : - NPHY_RXCAL_TONEFREQ_20MHz, - NPHY_RXCAL_TONEAMP, 0, cal_type, false); - - wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); - i_pwr = (est[rx_core].i_pwr + num_samps / 2) / num_samps; - q_pwr = (est[rx_core].q_pwr + num_samps / 2) / num_samps; - curr_pwr = i_pwr + q_pwr; - - switch (gainctrl_dirn) { - case NPHY_RXCAL_GAIN_INIT: - if (curr_pwr > thresh_pwr) { - gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; - prev_gaintbl_index = curr_gaintbl_index; - curr_gaintbl_index--; - } else { - gainctrl_dirn = NPHY_RXCAL_GAIN_UP; - prev_gaintbl_index = curr_gaintbl_index; - curr_gaintbl_index++; - } - break; - - case NPHY_RXCAL_GAIN_UP: - if (curr_pwr > thresh_pwr) { - gainctrl_done = true; - optim_pwr = prev_pwr; - optim_gaintbl_index = prev_gaintbl_index; - } else { - prev_gaintbl_index = curr_gaintbl_index; - curr_gaintbl_index++; - } - break; - - case NPHY_RXCAL_GAIN_DOWN: - if (curr_pwr > thresh_pwr) { - prev_gaintbl_index = curr_gaintbl_index; - curr_gaintbl_index--; - } else { - gainctrl_done = true; - optim_pwr = curr_pwr; - optim_gaintbl_index = curr_gaintbl_index; - } - break; - - default: - break; - } - - if ((curr_gaintbl_index < 0) || - (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { - gainctrl_done = true; - optim_pwr = curr_pwr; - optim_gaintbl_index = prev_gaintbl_index; - } else { - prev_pwr = curr_pwr; - } - - wlc_phy_stopplayback_nphy(pi); - } while (!gainctrl_done); - - hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; - lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; - lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; - lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; - lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; - txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; - - actual_log2_pwr = wlc_phy_nbits(optim_pwr); - delta_pwr = desired_log2_pwr - actual_log2_pwr; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - fine_gain_idx = (int)lpf_biq1 + delta_pwr; - - if (fine_gain_idx + (int)lpf_biq0 > 10) { - lpf_biq1 = 10 - lpf_biq0; - } else { - lpf_biq1 = (u16) max(fine_gain_idx, 0); - } - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_rxgain, - ((lpf_biq1 << 12) | - (lpf_biq0 << 8) | - (mix_tia_gain << 4) | - (lna2 << 2) | lna1), 0x3, - 0); - } else { - hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), - ((hpvga << 12) | (lpf_biq1 << 10) | - (lpf_biq0 << 8) | (mix_tia_gain << - 4) | (lna2 << - 2) | - lna1), 0x3, 0); - - } - - if (rxgain != NULL) { - *rxgain++ = lna1; - *rxgain++ = lna2; - *rxgain++ = mix_tia_gain; - *rxgain++ = lpf_biq0; - *rxgain++ = lpf_biq1; - *rxgain = hpvga; - } - - wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); -} - -static void -wlc_phy_rxcal_gainctrl_nphy(phy_info_t *pi, u8 rx_core, u16 *rxgain, - u8 cal_type) -{ - wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); -} - -static u8 -wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) -{ - u32 target_bws[2] = { 9500, 21000 }; - u32 ref_tones[2] = { 3000, 6000 }; - u32 target_bw, ref_tone; - - u32 target_pwr_ratios[2] = { 28606, 18468 }; - u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; - - u16 start_rccal_ovr_val = 128; - u16 txlpf_rccal_lpc_ovr_val = 128; - u16 rxlpf_rccal_hpc_ovr_val = 159; - - u16 orig_txlpf_rccal_lpc_ovr_val; - u16 orig_rxlpf_rccal_hpc_ovr_val; - u16 radio_addr_offset_rx; - u16 radio_addr_offset_tx; - u16 orig_dcBypass; - u16 orig_RxStrnFilt40Num[6]; - u16 orig_RxStrnFilt40Den[4]; - u16 orig_rfctrloverride[2]; - u16 orig_rfctrlauxreg[2]; - u16 orig_rfctrlrssiothers; - u16 tx_lpf_bw = 4; - - u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; - u16 lpf_hpc = 7, hpvga_hpc = 7; - - s8 rccal_stepsize; - u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; - u32 ref_iq_vals = 0, target_iq_vals = 0; - u16 num_samps, log_num_samps = 10; - phy_iq_est_t est[PHY_CORE_MAX]; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - return 0; - } - - num_samps = (1 << log_num_samps); - - if (CHSPEC_IS40(pi->radio_chanspec)) { - target_bw = target_bws[1]; - target_pwr_ratio = target_pwr_ratios[1]; - ref_tone = ref_tones[1]; - rx_lpf_bw = rx_lpf_bws[1]; - } else { - target_bw = target_bws[0]; - target_pwr_ratio = target_pwr_ratios[0]; - ref_tone = ref_tones[0]; - rx_lpf_bw = rx_lpf_bws[0]; - } - - if (core_idx == 0) { - radio_addr_offset_rx = RADIO_2056_RX0; - radio_addr_offset_tx = - (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; - } else { - radio_addr_offset_rx = RADIO_2056_RX1; - radio_addr_offset_tx = - (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; - } - - orig_txlpf_rccal_lpc_ovr_val = - read_radio_reg(pi, - (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx)); - orig_rxlpf_rccal_hpc_ovr_val = - read_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_HPC | - radio_addr_offset_rx)); - - orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); - - orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); - orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); - orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); - orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); - orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); - orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); - orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); - orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); - orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); - orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); - - orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); - orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); - orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); - orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); - orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); - - write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), - txlpf_rccal_lpc_ovr_val); - - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), - rxlpf_rccal_hpc_ovr_val); - - mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); - - write_phy_reg(pi, 0x267, 0x02d4); - write_phy_reg(pi, 0x268, 0x0000); - write_phy_reg(pi, 0x269, 0x0000); - write_phy_reg(pi, 0x26a, 0x0000); - write_phy_reg(pi, 0x26b, 0x0000); - write_phy_reg(pi, 0x26c, 0x02d4); - write_phy_reg(pi, 0x26d, 0x0000); - write_phy_reg(pi, 0x26e, 0x0000); - write_phy_reg(pi, 0x26f, 0x0000); - write_phy_reg(pi, 0x270, 0x0000); - - or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); - or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); - or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); - or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); - - mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, - (0x7 << 10), (tx_lpf_bw << 10)); - mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, - (0x7 << 0), (hpvga_hpc << 0)); - mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, - (0x7 << 4), (lpf_hpc << 4)); - mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, - (0x7 << 8), (rx_lpf_bw << 8)); - - rccal_stepsize = 16; - rccal_val = start_rccal_ovr_val + rccal_stepsize; - - while (rccal_stepsize >= 0) { - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_LPC | - radio_addr_offset_rx), rccal_val); - - if (rccal_stepsize == 16) { - - wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, - 0, 1, false); - udelay(2); - - wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); - - if (core_idx == 0) { - ref_iq_vals = - max_t(u32, (est[0].i_pwr + - est[0].q_pwr) >> (log_num_samps + 1), - 1); - } else { - ref_iq_vals = - max_t(u32, (est[1].i_pwr + - est[1].q_pwr) >> (log_num_samps + 1), - 1); - } - - wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, - 0, 1, false); - udelay(2); - } - - wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); - - if (core_idx == 0) { - target_iq_vals = - (est[0].i_pwr + est[0].q_pwr) >> (log_num_samps + - 1); - } else { - target_iq_vals = - (est[1].i_pwr + est[1].q_pwr) >> (log_num_samps + - 1); - } - pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); - - if (rccal_stepsize == 0) { - rccal_stepsize--; - } else if (rccal_stepsize == 1) { - last_rccal_val = rccal_val; - rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; - last_pwr_ratio = pwr_ratio; - rccal_stepsize--; - } else { - rccal_stepsize = (rccal_stepsize >> 1); - rccal_val += ((pwr_ratio > target_pwr_ratio) ? - rccal_stepsize : (-rccal_stepsize)); - } - - if (rccal_stepsize == -1) { - best_rccal_val = - (ABS((int)last_pwr_ratio - (int)target_pwr_ratio) < - ABS((int)pwr_ratio - - (int)target_pwr_ratio)) ? last_rccal_val : - rccal_val; - - if (CHSPEC_IS40(pi->radio_chanspec)) { - if ((best_rccal_val > 140) - || (best_rccal_val < 135)) { - best_rccal_val = 138; - } - } else { - if ((best_rccal_val > 142) - || (best_rccal_val < 137)) { - best_rccal_val = 140; - } - } - - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_LPC | - radio_addr_offset_rx), best_rccal_val); - } - } - - wlc_phy_stopplayback_nphy(pi); - - write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), - orig_txlpf_rccal_lpc_ovr_val); - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), - orig_rxlpf_rccal_hpc_ovr_val); - - mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); - - write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); - write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); - write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); - write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); - write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); - write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); - write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); - write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); - write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); - write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); - - write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); - write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); - write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); - write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); - write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); - - pi->nphy_anarxlpf_adjusted = false; - - return best_rccal_val - 0x80; -} - -#define WAIT_FOR_SCOPE 4000 -static int -wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, - u8 cal_type, bool debug) -{ - u16 orig_BBConfig; - u8 core_no, rx_core; - u8 best_rccal[2]; - u16 gain_save[2]; - u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; - u8 rxcore_state; - s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; - s8 txlpf_idac; - bool phyhang_avoid_state = false; - bool skip_rxiqcal = false; - - orig_BBConfig = read_phy_reg(pi, 0x01); - mod_phy_reg(pi, 0x01, (0x1 << 15), 0); - - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (NREV_GE(pi->pubpi.phy_rev, 4)) { - phyhang_avoid_state = pi->phyhang_avoid; - pi->phyhang_avoid = false; - } - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); - - for (core_no = 0; core_no <= 1; core_no++) { - wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, - &cal_params[core_no]); - cal_gain[core_no] = cal_params[core_no].cal_gain; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); - - rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); - - for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { - - skip_rxiqcal = - ((rxcore_state & (1 << rx_core)) == 0) ? true : false; - - wlc_phy_rxcal_physetup_nphy(pi, rx_core); - - wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); - - if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { - - wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); - - wlc_phy_tx_tone_nphy(pi, - (CHSPEC_IS40(pi->radio_chanspec)) ? - NPHY_RXCAL_TONEFREQ_40MHz : - NPHY_RXCAL_TONEFREQ_20MHz, - NPHY_RXCAL_TONEAMP, 0, cal_type, - false); - - if (debug) - mdelay(WAIT_FOR_SCOPE); - - wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); - wlc_phy_stopplayback_nphy(pi); - } - - if (((cal_type == 1) || (cal_type == 2)) - && NREV_LT(pi->pubpi.phy_rev, 7)) { - - if (rx_core == PHY_CORE_1) { - - if (rxcore_state == 1) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t - *) pi, 3); - } - - wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, - 1); - - best_rccal[rx_core] = - wlc_phy_rc_sweep_nphy(pi, rx_core, 1); - pi->nphy_rccal_value = best_rccal[rx_core]; - - if (rxcore_state == 1) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t - *) pi, - rxcore_state); - } - } - } - - wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); - - wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - } - - if ((cal_type == 1) || (cal_type == 2)) { - - best_rccal[0] = best_rccal[1]; - write_radio_reg(pi, - (RADIO_2056_RX_RXLPF_RCCAL_LPC | - RADIO_2056_RX0), (best_rccal[0] | 0x80)); - - for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { - rxlpf_rccal_hpc = - (((int)best_rccal[rx_core] - 12) >> 1) + 10; - txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; - - if (PHY_IPA(pi)) { - txlpf_rccal_lpc += IS40MHZ(pi) ? 24 : 12; - txlpf_idac = IS40MHZ(pi) ? 0x0e : 0x13; - WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, - TXLPF_IDAC_4, txlpf_idac); - } - - rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 0); - txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 0); - - write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | - ((rx_core == - PHY_CORE_0) ? RADIO_2056_RX0 : - RADIO_2056_RX1)), - (rxlpf_rccal_hpc | 0x80)); - - write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | - ((rx_core == - PHY_CORE_0) ? RADIO_2056_TX0 : - RADIO_2056_TX1)), - (txlpf_rccal_lpc | 0x80)); - } - } - - write_phy_reg(pi, 0x01, orig_BBConfig); - - wlc_phy_resetcca_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_rxgain, - 0, 0x3, 1); - } else { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); - } - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - gain_save); - - if (NREV_GE(pi->pubpi.phy_rev, 4)) { - pi->phyhang_avoid = phyhang_avoid_state; - } - - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - return 0; -} - -static int -wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, - bool debug) -{ - phy_iq_est_t est[PHY_CORE_MAX]; - u8 core_num, rx_core, tx_core; - u16 lna_vals[] = { 0x3, 0x3, 0x1 }; - u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; - u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; - s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; - s16 desired_log2_pwr, actual_log2_pwr, hpf_change; - u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; - u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; - u16 num_samps; - u32 i_pwr, q_pwr, tot_pwr[3]; - u8 gain_pass, use_hpf_num; - u16 mask, val1, val2; - u16 core_no; - u16 gain_save[2]; - u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; - u8 phy_bw; - int bcmerror = 0; - bool first_playtone = true; - - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - - wlc_phy_reapply_txcal_coeffs_nphy(pi); - } - - wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); - - for (core_no = 0; core_no <= 1; core_no++) { - wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, - &cal_params[core_no]); - cal_gain[core_no] = cal_params[core_no].cal_gain; - } - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); - - num_samps = 1024; - desired_log2_pwr = 13; - - for (core_num = 0; core_num < 2; core_num++) { - - rx_core = core_num; - tx_core = 1 - core_num; - - orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); - orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? - 0xa6 : 0xa7); - orig_AfectrlOverride = read_phy_reg(pi, 0xa5); - orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? - 0x91 : 0x92); - orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? - 0x91 : 0x92); - - mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); - mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); - - or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), - ((0x1 << 1) | (0x1 << 2))); - or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); - - if (((pi->nphy_rxcalparams) & 0xff000000)) { - - write_phy_reg(pi, - (rx_core == PHY_CORE_0) ? 0x91 : 0x92, - (CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : - 0x110)); - } else { - - write_phy_reg(pi, - (rx_core == PHY_CORE_0) ? 0x91 : 0x92, - (CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : - 0x120)); - } - - write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, - (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : - 0x114)); - - mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; - if (rx_core == PHY_CORE_0) { - val1 = RADIO_2055_COUPLE_RX_MASK; - val2 = RADIO_2055_COUPLE_TX_MASK; - } else { - val1 = RADIO_2055_COUPLE_TX_MASK; - val2 = RADIO_2055_COUPLE_RX_MASK; - } - - if ((pi->nphy_rxcalparams & 0x10000)) { - mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, - val1); - mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, - val2); - } - - for (gain_pass = 0; gain_pass < 4; gain_pass++) { - - if (debug) - mdelay(WAIT_FOR_SCOPE); - - if (gain_pass < 3) { - curr_lna = lna_vals[gain_pass]; - curr_hpf1 = hpf1_vals[gain_pass]; - curr_hpf2 = hpf2_vals[gain_pass]; - } else { - - if (tot_pwr[1] > 10000) { - curr_lna = lna_vals[2]; - curr_hpf1 = hpf1_vals[2]; - curr_hpf2 = hpf2_vals[2]; - use_hpf_num = 1; - curr_hpf = curr_hpf1; - actual_log2_pwr = - wlc_phy_nbits(tot_pwr[2]); - } else { - if (tot_pwr[0] > 10000) { - curr_lna = lna_vals[1]; - curr_hpf1 = hpf1_vals[1]; - curr_hpf2 = hpf2_vals[1]; - use_hpf_num = 1; - curr_hpf = curr_hpf1; - actual_log2_pwr = - wlc_phy_nbits(tot_pwr[1]); - } else { - curr_lna = lna_vals[0]; - curr_hpf1 = hpf1_vals[0]; - curr_hpf2 = hpf2_vals[0]; - use_hpf_num = 2; - curr_hpf = curr_hpf2; - actual_log2_pwr = - wlc_phy_nbits(tot_pwr[0]); - } - } - - hpf_change = desired_log2_pwr - actual_log2_pwr; - curr_hpf += hpf_change; - curr_hpf = max(min_t(u16, curr_hpf, 10), 0); - if (use_hpf_num == 1) { - curr_hpf1 = curr_hpf; - } else { - curr_hpf2 = curr_hpf; - } - } - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), - ((curr_hpf2 << 8) | - (curr_hpf1 << 4) | - (curr_lna << 2)), 0x3, 0); - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - - wlc_phy_stopplayback_nphy(pi); - - if (first_playtone) { - bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, - (u16) (pi-> - nphy_rxcalparams - & - 0xffff), - 0, 0, true); - first_playtone = false; - } else { - phy_bw = - (CHSPEC_IS40(pi->radio_chanspec)) ? 40 : 20; - wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, - 0, 0, 0, true); - } - - if (bcmerror == 0) { - if (gain_pass < 3) { - - wlc_phy_rx_iq_est_nphy(pi, est, - num_samps, 32, - 0); - i_pwr = - (est[rx_core].i_pwr + - num_samps / 2) / num_samps; - q_pwr = - (est[rx_core].q_pwr + - num_samps / 2) / num_samps; - tot_pwr[gain_pass] = i_pwr + q_pwr; - } else { - - wlc_phy_calc_rx_iq_comp_nphy(pi, - (1 << - rx_core)); - } - - wlc_phy_stopplayback_nphy(pi); - } - - if (bcmerror != 0) - break; - } - - and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); - and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); - - write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : - 0x92, orig_RfctrlIntcTx); - write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : - 0x92, orig_RfctrlIntcRx); - write_phy_reg(pi, 0xa5, orig_AfectrlOverride); - write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : - 0xa7, orig_AfectrlCore); - write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); - - if (bcmerror != 0) - break; - } - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); - wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, - gain_save); - - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - return bcmerror; -} - -int -wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, - u8 cal_type, bool debug) -{ - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - cal_type = 0; - } - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, - debug); - } else { - return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); - } -} - -static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi) -{ - int j, type = 2; - u16 addr_offset = 0x2c5; - - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, addr_offset + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); - } -} - -static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi) -{ - int j, type; - u16 addr_offset[] = { 0x186, 0x195, - 0x2c5 - }; - - for (type = 0; type < 3; type++) { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, addr_offset[type] + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); - } - } - - if (IS40MHZ(pi)) { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, 0x186 + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); - } - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, 0x186 + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[5] - [j]); - } - } - - if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, 0x2c5 + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[6] - [j]); - } - } - } -} - -static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi) -{ - int j; - - if (IS40MHZ(pi)) { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, 0x195 + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); - } - } else { - for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) { - write_phy_reg(pi, 0x186 + j, - NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); - } - } -} - -static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi) -{ - u16 m0m1; - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); - - return m0m1; -} - -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1) -{ - u16 m0m1 = (u16) ((m0 << 8) | m1); - - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); - wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); -} - -static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) -{ - u32 *tx_pwrctrl_tbl = NULL; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if ((pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)) { - - tx_pwrctrl_tbl = - nphy_tpc_txgain_ipa_2g_2057rev4n6; - } else if (pi->pubpi.radiorev == 3) { - - tx_pwrctrl_tbl = - nphy_tpc_txgain_ipa_2g_2057rev3; - } else if (pi->pubpi.radiorev == 5) { - - tx_pwrctrl_tbl = - nphy_tpc_txgain_ipa_2g_2057rev5; - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - tx_pwrctrl_tbl = - nphy_tpc_txgain_ipa_2g_2057rev7; - } - - } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; - if (pi->sh->chip == BCM47162_CHIP_ID) { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; - } - - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; - } else { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; - } - - } else { - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - tx_pwrctrl_tbl = - nphy_tpc_txgain_ipa_5g_2057rev7; - } - - } else { - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; - } - } - - return tx_pwrctrl_tbl; -} - -static void -wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, - u8 core) -{ - s32 tone_freq; - u8 off_core; - u16 mixgain = 0; - - off_core = core ^ 0x1; - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - if (NREV_IS(pi->pubpi.phy_rev, 7) - || NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), - wlc_phy_read_lpf_bw_ctl_nphy - (pi, 0), 0, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->pubpi.radiorev == 5) { - mixgain = (core == 0) ? 0x20 : 0x00; - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - mixgain = 0x00; - - } else if ((pi->pubpi.radiorev <= 4) - || (pi->pubpi.radiorev == 6)) { - - mixgain = 0x00; - } - - } else { - if ((pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - - mixgain = 0x50; - } else if ((pi->pubpi.radiorev == 3) - || (pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - mixgain = 0x0; - } - } - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), - mixgain, (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_tx_pu, - 1, (1 << core), 0); - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_tx_pu, - 0, (1 << off_core), 0); - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), - 0, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), - 0, (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, - (1 << core), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - - state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? - 0xa6 : 0xa7); - state->afeoverride[core] = - read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); - state->afectrl[off_core] = - read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); - state->afeoverride[off_core] = - read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); - - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), - (0x1 << 2), 0); - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : - 0xa5), (0x1 << 2), (0x1 << 2)); - - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), - (0x1 << 2), (0x1 << 2)); - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : - 0x8f), (0x1 << 2), (0x1 << 2)); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - state->pwrup[core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_PWRUP); - state->atten[core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_ATTEN); - state->pwrup[off_core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_2G_PWRUP); - state->atten[off_core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_2G_ATTEN); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_PWRUP, 0xc); - - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_ATTEN, 0xf0); - - } else if (pi->pubpi.radiorev == 5) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_ATTEN, - (core == 0) ? 0xf7 : 0xf2); - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_ATTEN, 0xf0); - - } - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_2G_PWRUP, 0x0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_2G_ATTEN, 0xff); - - } else { - state->pwrup[core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_PWRUP); - state->atten[core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_ATTEN); - state->pwrup[off_core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_5G_PWRUP); - state->atten[off_core] = - READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_5G_ATTEN); - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_PWRUP, 0xc); - - if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_ATTEN, 0xf4); - - } else { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_ATTEN, 0xf0); - } - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_5G_PWRUP, 0x0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, - TXRXCOUPLE_5G_ATTEN, 0xff); - } - - tone_freq = 4000; - - wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (1) << 13); - - mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); - - mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (0) << 13); - - } else { - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); - - state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? - 0xa6 : 0xa7); - state->afeoverride[core] = - read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); - - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), - (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : - 0xa5), - (0x1 << 0) | - (0x1 << 1) | - (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); - - state->vga_master[core] = - READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); - if (CHSPEC_IS2G(pi->radio_chanspec)) { - state->fbmix[core] = - READ_RADIO_REG2(pi, RADIO_2056, RX, core, - TXFBMIX_G); - state->intpa_master[core] = - READ_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_MASTER); - - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, - 0x03); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_MASTER, 0x04); - } else { - state->fbmix[core] = - READ_RADIO_REG2(pi, RADIO_2056, RX, core, - TXFBMIX_A); - state->intpa_master[core] = - READ_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_MASTER); - - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, - 0x03); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_MASTER, 0x04); - - } - - tone_freq = 4000; - - wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); - } -} - -static void -wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) -{ - u8 core; - - wlc_phy_stopplayback_nphy(pi); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_PWRUP, 0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_2G_ATTEN, - state->atten[core]); - } else { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_PWRUP, 0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TXRXCOUPLE_5G_ATTEN, - state->atten[core]); - } - } - - if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), - 1, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), - 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), - 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID2); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - write_phy_reg(pi, (core == PHY_CORE_0) ? - 0xa6 : 0xa7, state->afectrl[core]); - write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : - 0xa5, state->afeoverride[core]); - } - - wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, - (state->mm & 0xff)); - - if (NREV_IS(pi->pubpi.phy_rev, 7) - || NREV_GE(pi->pubpi.phy_rev, 8)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 0, 0, - 1, - NPHY_REV7_RFCTRLOVERRIDE_ID1); - } - } else { - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, - state->vga_master[core]); - if (CHSPEC_IS2G(pi->radio_chanspec)) { - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, - TXFBMIX_G, state->fbmix[core]); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAG_MASTER, - state->intpa_master[core]); - } else { - WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, - TXFBMIX_A, state->fbmix[core]); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - INTPAA_MASTER, - state->intpa_master[core]); - } - - write_phy_reg(pi, (core == PHY_CORE_0) ? - 0xa6 : 0xa7, state->afectrl[core]); - write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : - 0xa5, state->afeoverride[core]); - } - - wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, - (state->mm & 0xff)); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); - } -} - -static void -wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32 start, - u32 end) -{ - u32 *buf, *src, *dst, sz; - - sz = end - start + 1; - - buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); - if (NULL == buf) { - return; - } - - src = buf; - dst = buf + NPHY_PAPD_EPS_TBL_SIZE; - - wlc_phy_table_read_nphy(pi, - (core == - PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : - NPHY_TBL_ID_EPSILONTBL1), - NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); - - do { - u32 phy_a1, phy_a2; - s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; - - phy_a1 = end - min(end, (winsz >> 1)); - phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, end + (winsz >> 1)); - phy_a3 = phy_a2 - phy_a1 + 1; - phy_a6 = 0; - phy_a7 = 0; - - do { - wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, - &phy_a5); - phy_a6 += phy_a4; - phy_a7 += phy_a5; - } while (phy_a2-- != phy_a1); - - phy_a6 /= phy_a3; - phy_a7 /= phy_a3; - dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); - } while (end-- != start); - - wlc_phy_table_write_nphy(pi, - (core == - PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : - NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); - - kfree(buf); -} - -static void -wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, - phy_cal_mode_t cal_mode, u8 core) -{ - u16 phy_a1, phy_a2, phy_a3; - u16 phy_a4, phy_a5; - bool phy_a6; - u8 phy_a7, m[2]; - u32 phy_a8 = 0; - nphy_txgains_t phy_a9; - - if (NREV_LT(pi->pubpi.phy_rev, 3)) - return; - - phy_a7 = (core == PHY_CORE_0) ? 1 : 0; - - phy_a6 = ((cal_mode == CAL_GCTRL) - || (cal_mode == CAL_SOFT)) ? true : false; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - phy_a9 = wlc_phy_get_tx_gain_nphy(pi); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - phy_a5 = ((phy_a9.txlpf[core] << 15) | - (phy_a9.txgm[core] << 12) | - (phy_a9.pga[core] << 8) | - (txgains->gains.pad[core] << 3) | - (phy_a9.ipa[core])); - } else { - phy_a5 = ((phy_a9.txlpf[core] << 15) | - (phy_a9.txgm[core] << 12) | - (txgains->gains.pga[core] << 8) | - (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); - } - - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_txgain, - phy_a5, (1 << core), 0); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if ((pi->pubpi.radiorev <= 4) - || (pi->pubpi.radiorev == 6)) { - - m[core] = IS40MHZ(pi) ? 60 : 79; - } else { - - m[core] = IS40MHZ(pi) ? 45 : 64; - } - - } else { - m[core] = IS40MHZ(pi) ? 75 : 107; - } - - m[phy_a7] = 0; - wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); - - phy_a2 = 63; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->sh->chip == BCM6362_CHIP_ID) { - phy_a1 = 35; - phy_a3 = 35; - } else if ((pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)) { - phy_a1 = 30; - phy_a3 = 30; - } else { - phy_a1 = 25; - phy_a3 = 25; - } - } else { - if ((pi->pubpi.radiorev == 5) - || (pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - phy_a1 = 25; - phy_a3 = 25; - } else { - phy_a1 = 35; - phy_a3 = 35; - } - } - - if (cal_mode == CAL_GCTRL) { - if ((pi->pubpi.radiorev == 5) - && (CHSPEC_IS2G(pi->radio_chanspec))) { - phy_a1 = 55; - } else if (((pi->pubpi.radiorev == 7) && - (CHSPEC_IS2G(pi->radio_chanspec))) || - ((pi->pubpi.radiorev == 8) && - (CHSPEC_IS2G(pi->radio_chanspec)))) { - phy_a1 = 60; - } else { - phy_a1 = 63; - } - - } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { - - phy_a1 = 35; - phy_a3 = 35; - } - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (1) << 13); - - mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (0) << 13); - - write_phy_reg(pi, 0x2a1, 0x80); - write_phy_reg(pi, 0x2a2, 0x100); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 4), (11) << 4); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 8), (11) << 8); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 0), (0x3) << 0); - - write_phy_reg(pi, 0x2e5, 0x20); - - mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); - - mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); - - mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), - 1, ((core == 0) ? 1 : 2), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), - 0, ((core == 0) ? 2 : 1), 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - - write_phy_reg(pi, 0x2be, 1); - SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); - - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), - 0, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - - wlc_phy_table_write_nphy(pi, - (core == - PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 - : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, - 32, &phy_a8); - - if (cal_mode != CAL_GCTRL) { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - wlc_phy_a1_nphy(pi, core, 5, 0, 35); - } - } - - wlc_phy_rfctrl_override_1tomany_nphy(pi, - NPHY_REV7_RfctrlOverride_cmd_txgain, - phy_a5, (1 << core), 1); - - } else { - - if (txgains) { - if (txgains->useindex) { - phy_a4 = 15 - ((txgains->index) >> 3); - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - phy_a5 = 0x00f7 | (phy_a4 << 8); - - if (pi->sh->chip == - BCM47162_CHIP_ID) { - phy_a5 = - 0x10f7 | (phy_a4 << - 8); - } - } else - if (NREV_IS(pi->pubpi.phy_rev, 5)) - phy_a5 = 0x10f7 | (phy_a4 << 8); - else - phy_a5 = 0x50f7 | (phy_a4 << 8); - } else { - phy_a5 = 0x70f7 | (phy_a4 << 8); - } - wlc_phy_rfctrl_override_nphy(pi, - (0x1 << 13), - phy_a5, - (1 << core), 0); - } else { - wlc_phy_rfctrl_override_nphy(pi, - (0x1 << 13), - 0x5bf7, - (1 << core), 0); - } - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - m[core] = IS40MHZ(pi) ? 45 : 64; - } else { - m[core] = IS40MHZ(pi) ? 75 : 107; - } - - m[phy_a7] = 0; - wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); - - phy_a2 = 63; - - if (cal_mode == CAL_FULL) { - phy_a1 = 25; - phy_a3 = 25; - } else if (cal_mode == CAL_SOFT) { - phy_a1 = 25; - phy_a3 = 25; - } else if (cal_mode == CAL_GCTRL) { - phy_a1 = 63; - phy_a3 = 25; - } else { - - phy_a1 = 25; - phy_a3 = 25; - } - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (1) << 0); - - mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (0) << 0); - - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (1) << 13); - - mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (0) << 13); - - write_phy_reg(pi, 0x2a1, 0x20); - write_phy_reg(pi, 0x2a2, 0x60); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0xf << 4), (9) << 4); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0xf << 8), (9) << 8); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0xf << 0), (0x2) << 0); - - write_phy_reg(pi, 0x2e5, 0x20); - } else { - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 11), (1) << 11); - - mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 11), (0) << 11); - - write_phy_reg(pi, 0x2a1, 0x80); - write_phy_reg(pi, 0x2a2, 0x600); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 4), (0) << 4); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 8), (0) << 8); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x7 << 0), (0x3) << 0); - - mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); - - } - - mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); - - mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); - - mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); - - write_phy_reg(pi, 0x2be, 1); - SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); - - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); - - wlc_phy_table_write_nphy(pi, - (core == - PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 - : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, - 32, &phy_a8); - - if (cal_mode != CAL_GCTRL) { - wlc_phy_a1_nphy(pi, core, 5, 0, 40); - } - } -} - -static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core) -{ - int phy_a1; - int phy_a2; - bool phy_a3; - nphy_ipa_txcalgains_t phy_a4; - bool phy_a5 = false; - bool phy_a6 = true; - s32 phy_a7, phy_a8; - u32 phy_a9; - int phy_a10; - bool phy_a11 = false; - int phy_a12; - u8 phy_a13 = 0; - u8 phy_a14; - u8 *phy_a15 = NULL; - - phy_a4.useindex = true; - phy_a12 = start_gain; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - - phy_a2 = 20; - phy_a1 = 1; - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->pubpi.radiorev == 5) { - - phy_a15 = pad_gain_codes_used_2057rev5; - phy_a13 = sizeof(pad_gain_codes_used_2057rev5) / - sizeof(pad_gain_codes_used_2057rev5[0]) - 1; - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - phy_a15 = pad_gain_codes_used_2057rev7; - phy_a13 = sizeof(pad_gain_codes_used_2057rev7) / - sizeof(pad_gain_codes_used_2057rev7[0]) - 1; - - } else { - - phy_a15 = pad_all_gain_codes_2057; - phy_a13 = sizeof(pad_all_gain_codes_2057) / - sizeof(pad_all_gain_codes_2057[0]) - 1; - } - - } else { - - phy_a15 = pga_all_gain_codes_2057; - phy_a13 = sizeof(pga_all_gain_codes_2057) / - sizeof(pga_all_gain_codes_2057[0]) - 1; - } - - phy_a14 = 0; - - for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - phy_a4.gains.pad[core] = - (u16) phy_a15[phy_a12]; - } else { - phy_a4.gains.pga[core] = - (u16) phy_a15[phy_a12]; - } - - wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); - - wlc_phy_table_read_nphy(pi, - (core == - PHY_CORE_0 ? - NPHY_TBL_ID_EPSILONTBL0 : - NPHY_TBL_ID_EPSILONTBL1), 1, - 63, 32, &phy_a9); - - wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); - - phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || - (phy_a8 == 4095) || (phy_a8 == -4096)); - - if (!phy_a6 && (phy_a3 != phy_a5)) { - if (!phy_a3) { - phy_a12 -= (u8) phy_a1; - } - phy_a11 = true; - break; - } - - if (phy_a3) - phy_a12 += (u8) phy_a1; - else - phy_a12 -= (u8) phy_a1; - - if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { - if (phy_a12 < phy_a14) { - phy_a12 = phy_a14; - } else { - phy_a12 = phy_a13; - } - phy_a11 = true; - break; - } - - phy_a6 = false; - phy_a5 = phy_a3; - } - - } else { - phy_a2 = 10; - phy_a1 = 8; - for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { - phy_a4.index = (u8) phy_a12; - wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); - - wlc_phy_table_read_nphy(pi, - (core == - PHY_CORE_0 ? - NPHY_TBL_ID_EPSILONTBL0 : - NPHY_TBL_ID_EPSILONTBL1), 1, - 63, 32, &phy_a9); - - wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); - - phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || - (phy_a8 == 4095) || (phy_a8 == -4096)); - - if (!phy_a6 && (phy_a3 != phy_a5)) { - if (!phy_a3) { - phy_a12 -= (u8) phy_a1; - } - phy_a11 = true; - break; - } - - if (phy_a3) - phy_a12 += (u8) phy_a1; - else - phy_a12 -= (u8) phy_a1; - - if ((phy_a12 < 0) || (phy_a12 > 127)) { - if (phy_a12 < 0) { - phy_a12 = 0; - } else { - phy_a12 = 127; - } - phy_a11 = true; - break; - } - - phy_a6 = false; - phy_a5 = phy_a3; - } - - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - return (u8) phy_a15[phy_a12]; - } else { - return (u8) phy_a12; - } - -} - -static void wlc_phy_a4(phy_info_t *pi, bool full_cal) -{ - nphy_ipa_txcalgains_t phy_b1[2]; - nphy_papd_restore_state phy_b2; - bool phy_b3; - u8 phy_b4; - u8 phy_b5; - s16 phy_b6, phy_b7, phy_b8; - u16 phy_b9; - s16 phy_b10, phy_b11, phy_b12; - - phy_b11 = 0; - phy_b12 = 0; - phy_b7 = 0; - phy_b8 = 0; - phy_b6 = 0; - - if (pi->nphy_papd_skip == 1) - return; - - phy_b3 = - (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); - if (!phy_b3) { - wlapi_suspend_mac_and_wait(pi->sh->physhim); - } - - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - pi->nphy_force_papd_cal = false; - - for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) - pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = - wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); - - pi->nphy_papd_last_cal = pi->sh->now; - pi->nphy_papd_recal_counter++; - - if (NORADIO_ENAB(pi->pubpi)) - return; - - phy_b4 = pi->nphy_txpwrctrl; - wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, - nphy_papd_scaltbl); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, - nphy_papd_scaltbl); - - phy_b9 = read_phy_reg(pi, 0x01); - mod_phy_reg(pi, 0x01, (0x1 << 15), 0); - - for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { - s32 i, val = 0; - for (i = 0; i < 64; i++) { - wlc_phy_table_write_nphy(pi, - ((phy_b5 == - PHY_CORE_0) ? - NPHY_TBL_ID_EPSILONTBL0 : - NPHY_TBL_ID_EPSILONTBL1), 1, - i, 32, &val); - } - } - - wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); - - phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); - for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { - wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - - if ((pi->pubpi.radiorev == 3) - || (pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)) { - - pi->nphy_papd_cal_gain_index[phy_b5] = - 23; - - } else if (pi->pubpi.radiorev == 5) { - - pi->nphy_papd_cal_gain_index[phy_b5] = - 0; - pi->nphy_papd_cal_gain_index[phy_b5] = - wlc_phy_a3_nphy(pi, - pi-> - nphy_papd_cal_gain_index - [phy_b5], phy_b5); - - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - - pi->nphy_papd_cal_gain_index[phy_b5] = - 0; - pi->nphy_papd_cal_gain_index[phy_b5] = - wlc_phy_a3_nphy(pi, - pi-> - nphy_papd_cal_gain_index - [phy_b5], phy_b5); - - } - - phy_b1[phy_b5].gains.pad[phy_b5] = - pi->nphy_papd_cal_gain_index[phy_b5]; - - } else { - pi->nphy_papd_cal_gain_index[phy_b5] = 0; - pi->nphy_papd_cal_gain_index[phy_b5] = - wlc_phy_a3_nphy(pi, - pi-> - nphy_papd_cal_gain_index - [phy_b5], phy_b5); - phy_b1[phy_b5].gains.pga[phy_b5] = - pi->nphy_papd_cal_gain_index[phy_b5]; - } - } else { - phy_b1[phy_b5].useindex = true; - phy_b1[phy_b5].index = 16; - phy_b1[phy_b5].index = - wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, phy_b5); - - pi->nphy_papd_cal_gain_index[phy_b5] = - 15 - ((phy_b1[phy_b5].index) >> 3); - } - - switch (pi->nphy_papd_cal_type) { - case 0: - wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); - break; - case 1: - wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); - break; - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); - } - } - - if (NREV_LT(pi->pubpi.phy_rev, 7)) { - wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); - } - - for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { - int eps_offset = 0; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->pubpi.radiorev == 3) { - eps_offset = -2; - } else if (pi->pubpi.radiorev == 5) { - eps_offset = 3; - } else { - eps_offset = -1; - } - } else { - eps_offset = 2; - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; - phy_b10 = 0; - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - phy_b12 = - - - (nphy_papd_padgain_dlt_2g_2057rev3n4 - [phy_b8] - + 1) / 2; - phy_b10 = -1; - } else if (pi->pubpi.radiorev == 5) { - phy_b12 = - -(nphy_papd_padgain_dlt_2g_2057rev5 - [phy_b8] - + 1) / 2; - } else if ((pi->pubpi.radiorev == 7) || - (pi->pubpi.radiorev == 8)) { - phy_b12 = - -(nphy_papd_padgain_dlt_2g_2057rev7 - [phy_b8] - + 1) / 2; - } - } else { - phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; - if ((pi->pubpi.radiorev == 3) || - (pi->pubpi.radiorev == 4) || - (pi->pubpi.radiorev == 6)) { - phy_b11 = - -(nphy_papd_pgagain_dlt_5g_2057 - [phy_b7] - + 1) / 2; - } else if ((pi->pubpi.radiorev == 7) - || (pi->pubpi.radiorev == 8)) { - phy_b11 = - -(nphy_papd_pgagain_dlt_5g_2057rev7 - [phy_b7] - + 1) / 2; - } - - phy_b10 = -9; - } - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - phy_b6 = - -60 + 27 + eps_offset + phy_b12 + phy_b10; - } else { - phy_b6 = - -60 + 27 + eps_offset + phy_b11 + phy_b10; - } - - mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : - 0x29c, (0x1ff << 7), (phy_b6) << 7); - - pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; - } else { - if (NREV_LT(pi->pubpi.phy_rev, 5)) { - eps_offset = 4; - } else { - eps_offset = 2; - } - - phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - phy_b11 = - -(nphy_papd_pga_gain_delta_ipa_2g[phy_b7] + - 1) / 2; - phy_b10 = 0; - } else { - phy_b11 = - -(nphy_papd_pga_gain_delta_ipa_5g[phy_b7] + - 1) / 2; - phy_b10 = -9; - } - - phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; - - mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : - 0x29c, (0x1ff << 7), (phy_b6) << 7); - - pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; - } - } - - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); - - if (NREV_GE(pi->pubpi.phy_rev, 6)) { - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (0) << 13); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 13), (0) << 13); - - } else { - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 11), (0) << 11); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : - 0x2a4, (0x1 << 11), (0) << 11); - - } - pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; - - write_phy_reg(pi, 0x01, phy_b9); - - wlc_phy_ipa_set_tx_digi_filts_nphy(pi); - - wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); - if (phy_b4 == PHY_TPC_HW_OFF) { - wlc_phy_txpwr_index_nphy(pi, (1 << 0), - (s8) (pi->nphy_txpwrindex[0]. - index_internal), false); - wlc_phy_txpwr_index_nphy(pi, (1 << 1), - (s8) (pi->nphy_txpwrindex[1]. - index_internal), false); - } - - wlc_phy_stay_in_carriersearch_nphy(pi, false); - - if (!phy_b3) { - wlapi_enable_mac(pi->sh->physhim); - } -} - -void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) -{ - uint core; - u32 txgain; - u16 rad_gain, dac_gain, bbmult, m1m2; - u8 txpi[2], chan_freq_range; - s32 rfpwr_offset; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - if (pi->sh->sromrev < 4) { - txpi[0] = txpi[1] = 72; - } else { - - chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); - switch (chan_freq_range) { - case WL_CHAN_FREQ_RANGE_2G: - txpi[0] = pi->nphy_txpid2g[0]; - txpi[1] = pi->nphy_txpid2g[1]; - break; - case WL_CHAN_FREQ_RANGE_5GL: - txpi[0] = pi->nphy_txpid5gl[0]; - txpi[1] = pi->nphy_txpid5gl[1]; - break; - case WL_CHAN_FREQ_RANGE_5GM: - txpi[0] = pi->nphy_txpid5g[0]; - txpi[1] = pi->nphy_txpid5g[1]; - break; - case WL_CHAN_FREQ_RANGE_5GH: - txpi[0] = pi->nphy_txpid5gh[0]; - txpi[1] = pi->nphy_txpid5gh[1]; - break; - default: - txpi[0] = txpi[1] = 91; - break; - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - txpi[0] = txpi[1] = 30; - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - txpi[0] = txpi[1] = 40; - } - - if (NREV_LT(pi->pubpi.phy_rev, 7)) { - - if ((txpi[0] < 40) || (txpi[0] > 100) || - (txpi[1] < 40) || (txpi[1] > 100)) - txpi[0] = txpi[1] = 91; - } - - pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; - pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; - pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; - pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (PHY_IPA(pi)) { - u32 *tx_gaintbl = - wlc_phy_get_ipa_gaintbl_nphy(pi); - txgain = tx_gaintbl[txpi[core]]; - } else { - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { - txgain = - nphy_tpc_5GHz_txgain_rev3 - [txpi[core]]; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { - txgain = - (pi->srom_fem5g.extpagain == - 3) ? - nphy_tpc_5GHz_txgain_HiPwrEPA - [txpi[core]] : - nphy_tpc_5GHz_txgain_rev4 - [txpi[core]]; - } else { - txgain = - nphy_tpc_5GHz_txgain_rev5 - [txpi[core]]; - } - } else { - if (NREV_GE(pi->pubpi.phy_rev, 5) && - (pi->srom_fem2g.extpagain == 3)) { - txgain = - nphy_tpc_txgain_HiPwrEPA - [txpi[core]]; - } else { - txgain = - nphy_tpc_txgain_rev3[txpi - [core]]; - } - } - } - } else { - txgain = nphy_tpc_txgain[txpi[core]]; - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); - } else { - rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); - } else { - dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); - } - bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : - 0xa5), (0x1 << 8), (0x1 << 8)); - } else { - mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); - } - write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); - - wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, - &rad_gain); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); - m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); - m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); - - if (PHY_IPA(pi)) { - wlc_phy_table_read_nphy(pi, - (core == - PHY_CORE_0 ? - NPHY_TBL_ID_CORE1TXPWRCTL : - NPHY_TBL_ID_CORE2TXPWRCTL), 1, - 576 + txpi[core], 32, - &rfpwr_offset); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1ff << 4), - ((s16) rfpwr_offset) << 4); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 2), (1) << 2); - - } - } - - and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void -wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, - u8 tmp_max_pwr, u8 rate_start, - u8 rate_end) -{ - u8 rate; - u8 word_num, nibble_num; - u8 tmp_nibble; - - for (rate = rate_start; rate <= rate_end; rate++) { - word_num = (rate - rate_start) >> 2; - nibble_num = (rate - rate_start) & 0x3; - tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; - - srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; - } -} - -static void -wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, - u8 rate_start, u8 rate_end) -{ - u8 rate; - - for (rate = rate_start; rate <= rate_end; rate++) { - srom_max[rate] -= 2 * pwr_offset; - } -} - -void -wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, - u8 rate_mcs_end, u8 rate_ofdm_start) -{ - u8 rate1, rate2; - - rate2 = rate_ofdm_start; - for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { - power[rate1] = power[rate2]; - rate2 += (rate1 == rate_mcs_start) ? 2 : 1; - } - power[rate_mcs_end] = power[rate_mcs_end - 1]; -} - -void -wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, - u8 rate_ofdm_end, u8 rate_mcs_start) -{ - u8 rate1, rate2; - - for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; - rate1 <= rate_ofdm_end; rate1++, rate2++) { - power[rate1] = power[rate2]; - if (rate1 == rate_ofdm_start) - power[++rate1] = power[rate2]; - } -} - -void wlc_phy_txpwr_apply_nphy(phy_info_t *pi) -{ - uint rate1, rate2, band_num; - u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; - u8 tmp_max_pwr = 0; - u16 pwr_offsets1[2], *pwr_offsets2 = NULL; - u8 *tx_srom_max_rate = NULL; - - for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); band_num++) { - switch (band_num) { - case 0: - - tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, - pi->nphy_pwrctrl_info[1].max_pwr_2g); - - pwr_offsets1[0] = pi->cck2gpo; - wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, - pwr_offsets1, - tmp_max_pwr, - TXP_FIRST_CCK, - TXP_LAST_CCK); - - pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); - pwr_offsets1[1] = - (u16) (pi->ofdm2gpo >> 16) & 0xffff; - - pwr_offsets2 = pi->mcs2gpo; - - tmp_cddpo = pi->cdd2gpo; - tmp_stbcpo = pi->stbc2gpo; - tmp_bw40po = pi->bw402gpo; - - tx_srom_max_rate = pi->tx_srom_max_rate_2g; - break; - case 1: - - tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, - pi->nphy_pwrctrl_info[1].max_pwr_5gm); - - pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); - pwr_offsets1[1] = - (u16) (pi->ofdm5gpo >> 16) & 0xffff; - - pwr_offsets2 = pi->mcs5gpo; - - tmp_cddpo = pi->cdd5gpo; - tmp_stbcpo = pi->stbc5gpo; - tmp_bw40po = pi->bw405gpo; - - tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; - break; - case 2: - - tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, - pi->nphy_pwrctrl_info[1].max_pwr_5gl); - - pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); - pwr_offsets1[1] = - (u16) (pi->ofdm5glpo >> 16) & 0xffff; - - pwr_offsets2 = pi->mcs5glpo; - - tmp_cddpo = pi->cdd5glpo; - tmp_stbcpo = pi->stbc5glpo; - tmp_bw40po = pi->bw405glpo; - - tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; - break; - case 3: - - tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, - pi->nphy_pwrctrl_info[1].max_pwr_5gh); - - pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); - pwr_offsets1[1] = - (u16) (pi->ofdm5ghpo >> 16) & 0xffff; - - pwr_offsets2 = pi->mcs5ghpo; - - tmp_cddpo = pi->cdd5ghpo; - tmp_stbcpo = pi->stbc5ghpo; - tmp_bw40po = pi->bw405ghpo; - - tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; - break; - } - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, - tmp_max_pwr, TXP_FIRST_OFDM, - TXP_LAST_OFDM); - - wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, - TXP_FIRST_MCS_20_SISO, - TXP_LAST_MCS_20_SISO, - TXP_FIRST_OFDM); - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, - tmp_max_pwr, - TXP_FIRST_MCS_20_CDD, - TXP_LAST_MCS_20_CDD); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, - TXP_FIRST_MCS_20_CDD, - TXP_LAST_MCS_20_CDD); - } - - wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, - TXP_FIRST_OFDM_20_CDD, - TXP_LAST_OFDM_20_CDD, - TXP_FIRST_MCS_20_CDD); - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, - tmp_max_pwr, - TXP_FIRST_MCS_20_STBC, - TXP_LAST_MCS_20_STBC); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, - tmp_stbcpo, - TXP_FIRST_MCS_20_STBC, - TXP_LAST_MCS_20_STBC); - } - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, - &pwr_offsets2[2], tmp_max_pwr, - TXP_FIRST_MCS_20_SDM, - TXP_LAST_MCS_20_SDM); - - if (NPHY_IS_SROM_REINTERPRET) { - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, - &pwr_offsets2[4], - tmp_max_pwr, - TXP_FIRST_MCS_40_SISO, - TXP_LAST_MCS_40_SISO); - - wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, - TXP_FIRST_OFDM_40_SISO, - TXP_LAST_OFDM_40_SISO, - TXP_FIRST_MCS_40_SISO); - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, - &pwr_offsets2[4], - tmp_max_pwr, - TXP_FIRST_MCS_40_CDD, - TXP_LAST_MCS_40_CDD); - - wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, - TXP_FIRST_MCS_40_CDD, - TXP_LAST_MCS_40_CDD); - - wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, - TXP_FIRST_OFDM_40_CDD, - TXP_LAST_OFDM_40_CDD, - TXP_FIRST_MCS_40_CDD); - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, - &pwr_offsets2[4], - tmp_max_pwr, - TXP_FIRST_MCS_40_STBC, - TXP_LAST_MCS_40_STBC); - - wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, - tmp_stbcpo, - TXP_FIRST_MCS_40_STBC, - TXP_LAST_MCS_40_STBC); - - wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, - &pwr_offsets2[6], - tmp_max_pwr, - TXP_FIRST_MCS_40_SDM, - TXP_LAST_MCS_40_SDM); - } else { - - for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = - TXP_FIRST_OFDM; rate1 <= TXP_LAST_MCS_40_SDM; - rate1++, rate2++) - tx_srom_max_rate[rate1] = - tx_srom_max_rate[rate2]; - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, - tmp_bw40po, - TXP_FIRST_OFDM_40_SISO, - TXP_LAST_MCS_40_SDM); - } - - tx_srom_max_rate[TXP_MCS_32] = - tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; - } - - return; -} - -static void wlc_phy_txpwr_srom_read_ppr_nphy(phy_info_t *pi) -{ - u16 bw40po, cddpo, stbcpo, bwduppo; - uint band_num; - - if (pi->sh->sromrev >= 9) { - - return; - } - - bw40po = (u16) PHY_GETINTVAR(pi, "bw40po"); - pi->bw402gpo = bw40po & 0xf; - pi->bw405gpo = (bw40po & 0xf0) >> 4; - pi->bw405glpo = (bw40po & 0xf00) >> 8; - pi->bw405ghpo = (bw40po & 0xf000) >> 12; - - cddpo = (u16) PHY_GETINTVAR(pi, "cddpo"); - pi->cdd2gpo = cddpo & 0xf; - pi->cdd5gpo = (cddpo & 0xf0) >> 4; - pi->cdd5glpo = (cddpo & 0xf00) >> 8; - pi->cdd5ghpo = (cddpo & 0xf000) >> 12; - - stbcpo = (u16) PHY_GETINTVAR(pi, "stbcpo"); - pi->stbc2gpo = stbcpo & 0xf; - pi->stbc5gpo = (stbcpo & 0xf0) >> 4; - pi->stbc5glpo = (stbcpo & 0xf00) >> 8; - pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; - - bwduppo = (u16) PHY_GETINTVAR(pi, "bwduppo"); - pi->bwdup2gpo = bwduppo & 0xf; - pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; - pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; - pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; - - for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); band_num++) { - switch (band_num) { - case 0: - - pi->nphy_txpid2g[PHY_CORE_0] = - (u8) PHY_GETINTVAR(pi, "txpid2ga0"); - pi->nphy_txpid2g[PHY_CORE_1] = - (u8) PHY_GETINTVAR(pi, "txpid2ga1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = - (s8) PHY_GETINTVAR(pi, "maxp2ga0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = - (s8) PHY_GETINTVAR(pi, "maxp2ga1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = - (s16) PHY_GETINTVAR(pi, "pa2gw0a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = - (s16) PHY_GETINTVAR(pi, "pa2gw0a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = - (s16) PHY_GETINTVAR(pi, "pa2gw1a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = - (s16) PHY_GETINTVAR(pi, "pa2gw1a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = - (s16) PHY_GETINTVAR(pi, "pa2gw2a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = - (s16) PHY_GETINTVAR(pi, "pa2gw2a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = - (s8) PHY_GETINTVAR(pi, "itt2ga0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = - (s8) PHY_GETINTVAR(pi, "itt2ga1"); - - pi->cck2gpo = (u16) PHY_GETINTVAR(pi, "cck2gpo"); - - pi->ofdm2gpo = (u32) PHY_GETINTVAR(pi, "ofdm2gpo"); - - pi->mcs2gpo[0] = (u16) PHY_GETINTVAR(pi, "mcs2gpo0"); - pi->mcs2gpo[1] = (u16) PHY_GETINTVAR(pi, "mcs2gpo1"); - pi->mcs2gpo[2] = (u16) PHY_GETINTVAR(pi, "mcs2gpo2"); - pi->mcs2gpo[3] = (u16) PHY_GETINTVAR(pi, "mcs2gpo3"); - pi->mcs2gpo[4] = (u16) PHY_GETINTVAR(pi, "mcs2gpo4"); - pi->mcs2gpo[5] = (u16) PHY_GETINTVAR(pi, "mcs2gpo5"); - pi->mcs2gpo[6] = (u16) PHY_GETINTVAR(pi, "mcs2gpo6"); - pi->mcs2gpo[7] = (u16) PHY_GETINTVAR(pi, "mcs2gpo7"); - break; - case 1: - - pi->nphy_txpid5g[PHY_CORE_0] = - (u8) PHY_GETINTVAR(pi, "txpid5ga0"); - pi->nphy_txpid5g[PHY_CORE_1] = - (u8) PHY_GETINTVAR(pi, "txpid5ga1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = - (s8) PHY_GETINTVAR(pi, "maxp5ga0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = - (s8) PHY_GETINTVAR(pi, "maxp5ga1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = - (s16) PHY_GETINTVAR(pi, "pa5gw0a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = - (s16) PHY_GETINTVAR(pi, "pa5gw0a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = - (s16) PHY_GETINTVAR(pi, "pa5gw1a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = - (s16) PHY_GETINTVAR(pi, "pa5gw1a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = - (s16) PHY_GETINTVAR(pi, "pa5gw2a0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = - (s16) PHY_GETINTVAR(pi, "pa5gw2a1"); - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = - (s8) PHY_GETINTVAR(pi, "itt5ga0"); - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = - (s8) PHY_GETINTVAR(pi, "itt5ga1"); - - pi->ofdm5gpo = (u32) PHY_GETINTVAR(pi, "ofdm5gpo"); - - pi->mcs5gpo[0] = (u16) PHY_GETINTVAR(pi, "mcs5gpo0"); - pi->mcs5gpo[1] = (u16) PHY_GETINTVAR(pi, "mcs5gpo1"); - pi->mcs5gpo[2] = (u16) PHY_GETINTVAR(pi, "mcs5gpo2"); - pi->mcs5gpo[3] = (u16) PHY_GETINTVAR(pi, "mcs5gpo3"); - pi->mcs5gpo[4] = (u16) PHY_GETINTVAR(pi, "mcs5gpo4"); - pi->mcs5gpo[5] = (u16) PHY_GETINTVAR(pi, "mcs5gpo5"); - pi->mcs5gpo[6] = (u16) PHY_GETINTVAR(pi, "mcs5gpo6"); - pi->mcs5gpo[7] = (u16) PHY_GETINTVAR(pi, "mcs5gpo7"); - break; - case 2: - - pi->nphy_txpid5gl[0] = - (u8) PHY_GETINTVAR(pi, "txpid5gla0"); - pi->nphy_txpid5gl[1] = - (u8) PHY_GETINTVAR(pi, "txpid5gla1"); - pi->nphy_pwrctrl_info[0].max_pwr_5gl = - (s8) PHY_GETINTVAR(pi, "maxp5gla0"); - pi->nphy_pwrctrl_info[1].max_pwr_5gl = - (s8) PHY_GETINTVAR(pi, "maxp5gla1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = - (s16) PHY_GETINTVAR(pi, "pa5glw0a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = - (s16) PHY_GETINTVAR(pi, "pa5glw0a1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = - (s16) PHY_GETINTVAR(pi, "pa5glw1a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = - (s16) PHY_GETINTVAR(pi, "pa5glw1a1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = - (s16) PHY_GETINTVAR(pi, "pa5glw2a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = - (s16) PHY_GETINTVAR(pi, "pa5glw2a1"); - pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; - pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; - - pi->ofdm5glpo = (u32) PHY_GETINTVAR(pi, "ofdm5glpo"); - - pi->mcs5glpo[0] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo0"); - pi->mcs5glpo[1] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo1"); - pi->mcs5glpo[2] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo2"); - pi->mcs5glpo[3] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo3"); - pi->mcs5glpo[4] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo4"); - pi->mcs5glpo[5] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo5"); - pi->mcs5glpo[6] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo6"); - pi->mcs5glpo[7] = - (u16) PHY_GETINTVAR(pi, "mcs5glpo7"); - break; - case 3: - - pi->nphy_txpid5gh[0] = - (u8) PHY_GETINTVAR(pi, "txpid5gha0"); - pi->nphy_txpid5gh[1] = - (u8) PHY_GETINTVAR(pi, "txpid5gha1"); - pi->nphy_pwrctrl_info[0].max_pwr_5gh = - (s8) PHY_GETINTVAR(pi, "maxp5gha0"); - pi->nphy_pwrctrl_info[1].max_pwr_5gh = - (s8) PHY_GETINTVAR(pi, "maxp5gha1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = - (s16) PHY_GETINTVAR(pi, "pa5ghw0a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = - (s16) PHY_GETINTVAR(pi, "pa5ghw0a1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = - (s16) PHY_GETINTVAR(pi, "pa5ghw1a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = - (s16) PHY_GETINTVAR(pi, "pa5ghw1a1"); - pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = - (s16) PHY_GETINTVAR(pi, "pa5ghw2a0"); - pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = - (s16) PHY_GETINTVAR(pi, "pa5ghw2a1"); - pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; - pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; - - pi->ofdm5ghpo = (u32) PHY_GETINTVAR(pi, "ofdm5ghpo"); - - pi->mcs5ghpo[0] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo0"); - pi->mcs5ghpo[1] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo1"); - pi->mcs5ghpo[2] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo2"); - pi->mcs5ghpo[3] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo3"); - pi->mcs5ghpo[4] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo4"); - pi->mcs5ghpo[5] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo5"); - pi->mcs5ghpo[6] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo6"); - pi->mcs5ghpo[7] = - (u16) PHY_GETINTVAR(pi, "mcs5ghpo7"); - break; - } - } - - wlc_phy_txpwr_apply_nphy(pi); -} - -static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi) -{ - - pi->antswitch = (u8) PHY_GETINTVAR(pi, "antswitch"); - pi->aa2g = (u8) PHY_GETINTVAR(pi, "aa2g"); - pi->aa5g = (u8) PHY_GETINTVAR(pi, "aa5g"); - - pi->srom_fem2g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos2g"); - pi->srom_fem2g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain2g"); - pi->srom_fem2g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange2g"); - pi->srom_fem2g.triso = (u8) PHY_GETINTVAR(pi, "triso2g"); - pi->srom_fem2g.antswctrllut = (u8) PHY_GETINTVAR(pi, "antswctl2g"); - - pi->srom_fem5g.tssipos = (u8) PHY_GETINTVAR(pi, "tssipos5g"); - pi->srom_fem5g.extpagain = (u8) PHY_GETINTVAR(pi, "extpagain5g"); - pi->srom_fem5g.pdetrange = (u8) PHY_GETINTVAR(pi, "pdetrange5g"); - pi->srom_fem5g.triso = (u8) PHY_GETINTVAR(pi, "triso5g"); - if (PHY_GETVAR(pi, "antswctl5g")) { - - pi->srom_fem5g.antswctrllut = - (u8) PHY_GETINTVAR(pi, "antswctl5g"); - } else { - - pi->srom_fem5g.antswctrllut = - (u8) PHY_GETINTVAR(pi, "antswctl2g"); - } - - wlc_phy_txpower_ipa_upd(pi); - - pi->phy_txcore_disable_temp = (s16) PHY_GETINTVAR(pi, "tempthresh"); - if (pi->phy_txcore_disable_temp == 0) { - pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; - } - - pi->phy_tempsense_offset = (s8) PHY_GETINTVAR(pi, "tempoffset"); - if (pi->phy_tempsense_offset != 0) { - if (pi->phy_tempsense_offset > - (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) { - pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; - } else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + - NPHY_SROM_MINTEMPOFFSET)) { - pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; - } else { - pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; - } - } - - pi->phy_txcore_enable_temp = - pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; - - pi->phycal_tempdelta = (u8) PHY_GETINTVAR(pi, "phycal_tempdelta"); - if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) { - pi->phycal_tempdelta = 0; - } - - wlc_phy_txpwr_srom_read_ppr_nphy(pi); - - return true; -} - -void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi) -{ - u8 tx_pwr_ctrl_state; - wlc_phy_txpwr_limit_to_tbl_nphy(pi); - wlc_phy_txpwrctrl_pwr_setup_nphy(pi); - - tx_pwr_ctrl_state = pi->nphy_txpwrctrl; - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); - (void)R_REG(&pi->regs->maccontrol); - udelay(1); - } - - wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); -} - -static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi) -{ - u32 idx; - u16 iqloCalbuf[7]; - u32 iqcomp, locomp, curr_locomp; - s8 locomp_i, locomp_q; - s8 curr_locomp_i, curr_locomp_q; - u32 tbl_id, tbl_len, tbl_offset; - u32 regval[128]; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); - - tbl_len = 128; - tbl_offset = 320; - for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; - tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { - iqcomp = - (tbl_id == - 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | - (iqloCalbuf[1] & 0x3ff) - : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | - (iqloCalbuf[3] & 0x3ff); - - for (idx = 0; idx < tbl_len; idx++) { - regval[idx] = iqcomp; - } - wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, - regval); - } - - tbl_offset = 448; - for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; - tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { - - locomp = - (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); - locomp_i = (s8) ((locomp >> 8) & 0xff); - locomp_q = (s8) ((locomp) & 0xff); - for (idx = 0; idx < tbl_len; idx++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - curr_locomp_i = locomp_i; - curr_locomp_q = locomp_q; - } else { - curr_locomp_i = (s8) ((locomp_i * - nphy_tpc_loscale[idx] + - 128) >> 8); - curr_locomp_q = - (s8) ((locomp_q * nphy_tpc_loscale[idx] + - 128) >> 8); - } - curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); - curr_locomp |= (u32) (curr_locomp_q & 0xff); - regval[idx] = curr_locomp; - } - wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, - regval); - } - - if (NREV_LT(pi->pubpi.phy_rev, 2)) { - - wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); - wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static void wlc_phy_ipa_internal_tssi_setup_nphy(phy_info_t *pi) -{ - u8 core; - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (CHSPEC_IS2G(pi->radio_chanspec)) { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER, 0x5); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MUX, 0xe); - - if (pi->pubpi.radiorev != 5) - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TSSIA, 0); - - if (!NREV_IS(pi->pubpi.phy_rev, 7)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TSSIG, 0x1); - } else { - - WRITE_RADIO_REG3(pi, RADIO_2057, TX, - core, TSSIG, 0x31); - } - } else { - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MASTER, 0x9); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TX_SSI_MUX, 0xc); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, - TSSIG, 0); - - if (pi->pubpi.radiorev != 5) { - if (!NREV_IS(pi->pubpi.phy_rev, 7)) { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIA, 0x1); - } else { - - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TSSIA, 0x31); - } - } - } - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, - 0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, - 0); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, - 0x3); - WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, - 0x0); - } - } else { - WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, - (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : - 0x80); - WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); - WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, - 0x0); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, - 0x0); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, - 0x3); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, - 0x0); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, - 0x8); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, - 0x0); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, - 0x0); - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TX_SSI_MASTER, 0x5); - - if (pi->pubpi.radiorev != 5) - WRITE_RADIO_REG2(pi, RADIO_2056, TX, - core, TSSIA, 0x0); - if (NREV_GE(pi->pubpi.phy_rev, 5)) { - - WRITE_RADIO_REG2(pi, RADIO_2056, TX, - core, TSSIG, 0x31); - } else { - WRITE_RADIO_REG2(pi, RADIO_2056, TX, - core, TSSIG, 0x11); - } - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TX_SSI_MUX, 0xe); - } else { - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TX_SSI_MASTER, 0x9); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TSSIA, 0x31); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TSSIG, 0x0); - WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, - TX_SSI_MUX, 0xc); - } - } - } -} - -static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) -{ - s32 rssi_buf[4]; - s32 int_val; - - if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) - - return; - - if (PHY_IPA(pi)) { - wlc_phy_ipa_internal_tssi_setup_nphy(pi); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), - 0, 0x3, 0, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); - } - - wlc_phy_stopplayback_nphy(pi); - - wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); - - udelay(20); - int_val = - wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, - 1); - wlc_phy_stopplayback_nphy(pi); - wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), - 0, 0x3, 1, - NPHY_REV7_RFCTRLOVERRIDE_ID0); - } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { - wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = - (u8) ((int_val >> 24) & 0xff); - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = - (u8) ((int_val >> 24) & 0xff); - - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = - (u8) ((int_val >> 8) & 0xff); - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = - (u8) ((int_val >> 8) & 0xff); - } else { - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = - (u8) ((int_val >> 24) & 0xff); - - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = - (u8) ((int_val >> 8) & 0xff); - - pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = - (u8) ((int_val >> 16) & 0xff); - pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = - (u8) ((int_val) & 0xff); - } - -} - -static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi) -{ - u32 idx; - s16 a1[2], b0[2], b1[2]; - s8 target_pwr_qtrdbm[2]; - s32 num, den, pwr_est; - u8 chan_freq_range; - u8 idle_tssi[2]; - u32 tbl_id, tbl_len, tbl_offset; - u32 regval[64]; - u8 core; - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); - (void)R_REG(&pi->regs->maccontrol); - udelay(1); - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - or_phy_reg(pi, 0x122, (0x1 << 0)); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - and_phy_reg(pi, 0x1e7, (u16) (~(0x1 << 15))); - } else { - - or_phy_reg(pi, 0x1e7, (0x1 << 15)); - } - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); - - if (pi->sh->sromrev < 4) { - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; - target_pwr_qtrdbm[0] = 13 * 4; - target_pwr_qtrdbm[1] = 13 * 4; - a1[0] = -424; - a1[1] = -424; - b0[0] = 5612; - b0[1] = 5612; - b1[1] = -1393; - b1[0] = -1393; - } else { - - chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); - switch (chan_freq_range) { - case WL_CHAN_FREQ_RANGE_2G: - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; - target_pwr_qtrdbm[0] = - pi->nphy_pwrctrl_info[0].max_pwr_2g; - target_pwr_qtrdbm[1] = - pi->nphy_pwrctrl_info[1].max_pwr_2g; - a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; - a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; - b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; - b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; - b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; - b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; - break; - case WL_CHAN_FREQ_RANGE_5GL: - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; - target_pwr_qtrdbm[0] = - pi->nphy_pwrctrl_info[0].max_pwr_5gl; - target_pwr_qtrdbm[1] = - pi->nphy_pwrctrl_info[1].max_pwr_5gl; - a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; - a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; - b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; - b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; - b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; - b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; - break; - case WL_CHAN_FREQ_RANGE_5GM: - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; - target_pwr_qtrdbm[0] = - pi->nphy_pwrctrl_info[0].max_pwr_5gm; - target_pwr_qtrdbm[1] = - pi->nphy_pwrctrl_info[1].max_pwr_5gm; - a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; - a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; - b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; - b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; - b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; - b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; - break; - case WL_CHAN_FREQ_RANGE_5GH: - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; - target_pwr_qtrdbm[0] = - pi->nphy_pwrctrl_info[0].max_pwr_5gh; - target_pwr_qtrdbm[1] = - pi->nphy_pwrctrl_info[1].max_pwr_5gh; - a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; - a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; - b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; - b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; - b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; - b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; - break; - default: - idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; - idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; - target_pwr_qtrdbm[0] = 13 * 4; - target_pwr_qtrdbm[1] = 13 * 4; - a1[0] = -424; - a1[1] = -424; - b0[0] = 5612; - b0[1] = 5612; - b1[1] = -1393; - b1[0] = -1393; - break; - } - } - - target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; - target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if (pi->srom_fem2g.tssipos) { - or_phy_reg(pi, 0x1e9, (0x1 << 14)); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - for (core = 0; core <= 1; core++) { - if (PHY_IPA(pi)) { - - if (CHSPEC_IS2G(pi->radio_chanspec)) { - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TX_SSI_MUX, - 0xe); - } else { - WRITE_RADIO_REG3(pi, RADIO_2057, - TX, core, - TX_SSI_MUX, - 0xc); - } - } else { - } - } - } else { - if (PHY_IPA(pi)) { - - write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | - RADIO_2056_TX0, - (CHSPEC_IS5G - (pi-> - radio_chanspec)) ? 0xc : 0xe); - write_radio_reg(pi, - RADIO_2056_TX_TX_SSI_MUX | - RADIO_2056_TX1, - (CHSPEC_IS5G - (pi-> - radio_chanspec)) ? 0xc : 0xe); - } else { - - write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | - RADIO_2056_TX0, 0x11); - write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | - RADIO_2056_TX1, 0x11); - } - } - } - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); - (void)R_REG(&pi->regs->maccontrol); - udelay(1); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_phy_reg(pi, 0x1e7, (0x7f << 0), - (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); - } else { - mod_phy_reg(pi, 0x1e7, (0x7f << 0), - (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); - } - - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_phy_reg(pi, 0x222, (0xff << 0), - (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); - } else if (NREV_GT(pi->pubpi.phy_rev, 1)) { - mod_phy_reg(pi, 0x222, (0xff << 0), - (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); - } - - if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) - wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); - - write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); - - write_phy_reg(pi, 0x1e9, - (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); - - write_phy_reg(pi, 0x1ea, - (target_pwr_qtrdbm[0] << 0) | - (target_pwr_qtrdbm[1] << 8)); - - tbl_len = 64; - tbl_offset = 0; - for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; - tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { - - for (idx = 0; idx < tbl_len; idx++) { - num = - 8 * (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); - den = 32768 + a1[tbl_id - 26] * idx; - pwr_est = max(((4 * num + den / 2) / den), -8); - if (NREV_LT(pi->pubpi.phy_rev, 3)) { - if (idx <= - (uint) (31 - idle_tssi[tbl_id - 26] + 1)) - pwr_est = - max(pwr_est, - target_pwr_qtrdbm[tbl_id - 26] + - 1); - } - regval[idx] = (u32) pwr_est; - } - wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, - regval); - } - - wlc_phy_txpwr_limit_to_tbl_nphy(pi); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, - pi->adj_pwr_tbl_nphy); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, - pi->adj_pwr_tbl_nphy); - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi) -{ - return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | - (0x1 << 14) | (0x1 << 13)); -} - -static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core) -{ - u16 tmp; - tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); - - tmp = (tmp & (0x7f << 8)) >> 8; - return (u8) tmp; -} - -static void -wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, u8 idx1) -{ - mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); - - if (NREV_GT(pi->pubpi.phy_rev, 1)) - mod_phy_reg(pi, 0x222, (0xff << 0), idx1); -} - -u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi) -{ - u16 tmp; - u16 pwr_idx[2]; - - if (wlc_phy_txpwr_ison_nphy(pi)) { - pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); - pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); - - tmp = (pwr_idx[0] << 8) | pwr_idx[1]; - } else { - tmp = - ((pi->nphy_txpwrindex[PHY_CORE_0]. - index_internal & 0xff) << 8) | (pi-> - nphy_txpwrindex - [PHY_CORE_1]. - index_internal & 0xff); - } - - return tmp; -} - -void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi) -{ - if (PHY_IPA(pi) - && (pi->nphy_force_papd_cal - || (wlc_phy_txpwr_ison_nphy(pi) - && - (((u32) - ABS(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - - pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) - || ((u32) - ABS(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - - pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) { - wlc_phy_a4(pi, true); - } -} - -void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) -{ - u16 mask = 0, val = 0, ishw = 0; - u8 ctr; - uint core; - u32 tbl_offset; - u32 tbl_len; - u16 regval[84]; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - switch (ctrl_type) { - case PHY_TPC_HW_OFF: - case PHY_TPC_HW_ON: - pi->nphy_txpwrctrl = ctrl_type; - break; - default: - break; - } - - if (ctrl_type == PHY_TPC_HW_OFF) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - if (wlc_phy_txpwr_ison_nphy(pi)) { - for (core = 0; core < pi->pubpi.phy_corenum; - core++) - pi->nphy_txpwr_idx[core] = - wlc_phy_txpwr_idx_cur_get_nphy(pi, - (u8) - core); - } - - } - - tbl_len = 84; - tbl_offset = 64; - for (ctr = 0; ctr < tbl_len; ctr++) { - regval[ctr] = 0; - } - wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, - regval); - wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, - regval); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - - and_phy_reg(pi, 0x1e7, - (u16) (~((0x1 << 15) | - (0x1 << 14) | (0x1 << 13)))); - } else { - and_phy_reg(pi, 0x1e7, - (u16) (~((0x1 << 14) | (0x1 << 13)))); - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - or_phy_reg(pi, 0x8f, (0x1 << 8)); - or_phy_reg(pi, 0xa5, (0x1 << 8)); - } else { - or_phy_reg(pi, 0xa5, (0x1 << 14)); - } - - if (NREV_IS(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); - else if (NREV_LT(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); - - if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) - wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, - MHF1_IQSWAP_WAR, WLC_BAND_ALL); - - } else { - - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, - 8, pi->adj_pwr_tbl_nphy); - wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, - 8, pi->adj_pwr_tbl_nphy); - - ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; - mask = (0x1 << 14) | (0x1 << 13); - val = (ishw << 14) | (ishw << 13); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - mask |= (0x1 << 15); - val |= (ishw << 15); - } - - mod_phy_reg(pi, 0x1e7, mask, val); - - if (CHSPEC_IS5G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); - mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); - } else { - mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); - if (NREV_GT(pi->pubpi.phy_rev, 1)) - mod_phy_reg(pi, 0x222, - (0xff << 0), 0x64); - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - if ((pi->nphy_txpwr_idx[0] != 128) - && (pi->nphy_txpwr_idx[1] != 128)) { - wlc_phy_txpwr_idx_cur_set_nphy(pi, - pi-> - nphy_txpwr_idx - [0], - pi-> - nphy_txpwr_idx - [1]); - } - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - and_phy_reg(pi, 0x8f, ~(0x1 << 8)); - and_phy_reg(pi, 0xa5, ~(0x1 << 8)); - } else { - and_phy_reg(pi, 0xa5, ~(0x1 << 14)); - } - - if (NREV_IS(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); - else if (NREV_LT(pi->pubpi.phy_rev, 2)) - mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); - - if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) - wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, - 0x0, WLC_BAND_ALL); - - if (PHY_IPA(pi)) { - mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 2), (0) << 2); - - mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 2), (0) << 2); - - } - - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -void -wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, s8 txpwrindex, - bool restore_cals) -{ - u8 core, txpwrctl_tbl; - u16 tx_ind0, iq_ind0, lo_ind0; - u16 m1m2; - u32 txgain; - u16 rad_gain, dac_gain; - u8 bbmult; - u32 iqcomp; - u16 iqcomp_a, iqcomp_b; - u32 locomp; - u16 tmpval; - u8 tx_pwr_ctrl_state; - s32 rfpwr_offset; - u16 regval[2]; - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - - tx_ind0 = 192; - iq_ind0 = 320; - lo_ind0 = 448; - - for (core = 0; core < pi->pubpi.phy_corenum; core++) { - - if ((core_mask & (1 << core)) == 0) { - continue; - } - - txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; - - if (txpwrindex < 0) { - if (pi->nphy_txpwrindex[core].index < 0) { - - continue; - } - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - mod_phy_reg(pi, 0x8f, - (0x1 << 8), - pi->nphy_txpwrindex[core]. - AfectrlOverride); - mod_phy_reg(pi, 0xa5, (0x1 << 8), - pi->nphy_txpwrindex[core]. - AfectrlOverride); - } else { - mod_phy_reg(pi, 0xa5, - (0x1 << 14), - pi->nphy_txpwrindex[core]. - AfectrlOverride); - } - - write_phy_reg(pi, (core == PHY_CORE_0) ? - 0xaa : 0xab, - pi->nphy_txpwrindex[core].AfeCtrlDacGain); - - wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, - &pi->nphy_txpwrindex[core]. - rad_gain); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); - m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); - m1m2 |= ((core == PHY_CORE_0) ? - (pi->nphy_txpwrindex[core].bbmult << 8) : - (pi->nphy_txpwrindex[core].bbmult << 0)); - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); - - if (restore_cals) { - - wlc_phy_table_write_nphy(pi, 15, 2, - (80 + 2 * core), 16, - (void *)&pi-> - nphy_txpwrindex[core]. - iqcomp_a); - - wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), - 16, - &pi-> - nphy_txpwrindex[core]. - locomp); - wlc_phy_table_write_nphy(pi, 15, 1, (93 + core), - 16, - (void *)&pi-> - nphy_txpwrindex[core]. - locomp); - } - - wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); - - pi->nphy_txpwrindex[core].index_internal = - pi->nphy_txpwrindex[core].index_internal_save; - } else { - - if (pi->nphy_txpwrindex[core].index < 0) { - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - mod_phy_reg(pi, 0x8f, - (0x1 << 8), - pi->nphy_txpwrindex[core]. - AfectrlOverride); - mod_phy_reg(pi, 0xa5, (0x1 << 8), - pi->nphy_txpwrindex[core]. - AfectrlOverride); - } else { - pi->nphy_txpwrindex[core]. - AfectrlOverride = - read_phy_reg(pi, 0xa5); - } - - pi->nphy_txpwrindex[core].AfeCtrlDacGain = - read_phy_reg(pi, - (core == - PHY_CORE_0) ? 0xaa : 0xab); - - wlc_phy_table_read_nphy(pi, 7, 1, - (0x110 + core), 16, - &pi-> - nphy_txpwrindex[core]. - rad_gain); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, - &tmpval); - tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); - tmpval &= 0xff; - pi->nphy_txpwrindex[core].bbmult = - (u8) tmpval; - - wlc_phy_table_read_nphy(pi, 15, 2, - (80 + 2 * core), 16, - (void *)&pi-> - nphy_txpwrindex[core]. - iqcomp_a); - - wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), - 16, - (void *)&pi-> - nphy_txpwrindex[core]. - locomp); - - pi->nphy_txpwrindex[core].index_internal_save = - pi->nphy_txpwrindex[core].index_internal; - } - - tx_pwr_ctrl_state = pi->nphy_txpwrctrl; - wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); - - if (NREV_IS(pi->pubpi.phy_rev, 1)) - wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); - - wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, - (tx_ind0 + txpwrindex), 32, - &txgain); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - rad_gain = - (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); - } else { - rad_gain = - (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); - } - dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); - bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); - - if (NREV_GE(pi->pubpi.phy_rev, 3)) { - mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : - 0xa5), (0x1 << 8), (0x1 << 8)); - } else { - mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); - } - write_phy_reg(pi, (core == PHY_CORE_0) ? - 0xaa : 0xab, dac_gain); - - wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, - &rad_gain); - - wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); - m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); - m1m2 |= - ((core == - PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); - - wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); - - wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, - (iq_ind0 + txpwrindex), 32, - &iqcomp); - iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); - iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); - - if (restore_cals) { - regval[0] = (u16) iqcomp_a; - regval[1] = (u16) iqcomp_b; - wlc_phy_table_write_nphy(pi, 15, 2, - (80 + 2 * core), 16, - regval); - } - - wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, - (lo_ind0 + txpwrindex), 32, - &locomp); - if (restore_cals) { - wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), - 16, &locomp); - } - - if (NREV_IS(pi->pubpi.phy_rev, 1)) - wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); - - if (PHY_IPA(pi)) { - wlc_phy_table_read_nphy(pi, - (core == - PHY_CORE_0 ? - NPHY_TBL_ID_CORE1TXPWRCTL - : - NPHY_TBL_ID_CORE2TXPWRCTL), - 1, 576 + txpwrindex, 32, - &rfpwr_offset); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1ff << 4), - ((s16) rfpwr_offset) << 4); - - mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : - 0x29b, (0x1 << 2), (1) << 2); - - } - - wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); - } - - pi->nphy_txpwrindex[core].index = txpwrindex; - } - - if (pi->phyhang_avoid) - wlc_phy_stay_in_carriersearch_nphy(pi, false); -} - -void -wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, u8 *max_pwr, - u8 txp_rate_idx) -{ - u8 chan_freq_range; - - chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); - switch (chan_freq_range) { - case WL_CHAN_FREQ_RANGE_2G: - *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; - break; - case WL_CHAN_FREQ_RANGE_5GM: - *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; - break; - case WL_CHAN_FREQ_RANGE_5GL: - *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; - break; - case WL_CHAN_FREQ_RANGE_5GH: - *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; - break; - default: - *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; - break; - } - - return; -} - -void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable) -{ - u16 clip_off[] = { 0xffff, 0xffff }; - - if (enable) { - if (pi->nphy_deaf_count == 0) { - pi->classifier_state = - wlc_phy_classifier_nphy(pi, 0, 0); - wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); - wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); - wlc_phy_clip_det_nphy(pi, 1, clip_off); - } - - pi->nphy_deaf_count++; - - wlc_phy_resetcca_nphy(pi); - - } else { - pi->nphy_deaf_count--; - - if (pi->nphy_deaf_count == 0) { - wlc_phy_classifier_nphy(pi, (0x7 << 0), - pi->classifier_state); - wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); - } - } -} - -void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode) -{ - wlapi_suspend_mac_and_wait(pi->sh->physhim); - - if (mode) { - if (pi->nphy_deaf_count == 0) - wlc_phy_stay_in_carriersearch_nphy(pi, true); - } else { - if (pi->nphy_deaf_count > 0) - wlc_phy_stay_in_carriersearch_nphy(pi, false); - } - wlapi_enable_mac(pi->sh->physhim); -} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c deleted file mode 100644 index c98176f..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c +++ /dev/null @@ -1,296 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include - -#include "wlc_phy_qmath.h" - -/* -Description: This function make 16 bit unsigned multiplication. To fit the output into -16 bits the 32 bit multiplication result is right shifted by 16 bits. -*/ -u16 qm_mulu16(u16 op1, u16 op2) -{ - return (u16) (((u32) op1 * (u32) op2) >> 16); -} - -/* -Description: This function make 16 bit multiplication and return the result in 16 bits. -To fit the multiplication result into 16 bits the multiplication result is right shifted by -15 bits. Right shifting 15 bits instead of 16 bits is done to remove the extra sign bit formed -due to the multiplication. -When both the 16bit inputs are 0x8000 then the output is saturated to 0x7fffffff. -*/ -s16 qm_muls16(s16 op1, s16 op2) -{ - s32 result; - if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000) { - result = 0x7fffffff; - } else { - result = ((s32) (op1) * (s32) (op2)); - } - return (s16) (result >> 15); -} - -/* -Description: This function add two 32 bit numbers and return the 32bit result. -If the result overflow 32 bits, the output will be saturated to 32bits. -*/ -s32 qm_add32(s32 op1, s32 op2) -{ - s32 result; - result = op1 + op2; - if (op1 < 0 && op2 < 0 && result > 0) { - result = 0x80000000; - } else if (op1 > 0 && op2 > 0 && result < 0) { - result = 0x7fffffff; - } - return result; -} - -/* -Description: This function add two 16 bit numbers and return the 16bit result. -If the result overflow 16 bits, the output will be saturated to 16bits. -*/ -s16 qm_add16(s16 op1, s16 op2) -{ - s16 result; - s32 temp = (s32) op1 + (s32) op2; - if (temp > (s32) 0x7fff) { - result = (s16) 0x7fff; - } else if (temp < (s32) 0xffff8000) { - result = (s16) 0xffff8000; - } else { - result = (s16) temp; - } - return result; -} - -/* -Description: This function make 16 bit subtraction and return the 16bit result. -If the result overflow 16 bits, the output will be saturated to 16bits. -*/ -s16 qm_sub16(s16 op1, s16 op2) -{ - s16 result; - s32 temp = (s32) op1 - (s32) op2; - if (temp > (s32) 0x7fff) { - result = (s16) 0x7fff; - } else if (temp < (s32) 0xffff8000) { - result = (s16) 0xffff8000; - } else { - result = (s16) temp; - } - return result; -} - -/* -Description: This function make a 32 bit saturated left shift when the specified shift -is +ve. This function will make a 32 bit right shift when the specified shift is -ve. -This function return the result after shifting operation. -*/ -s32 qm_shl32(s32 op, int shift) -{ - int i; - s32 result; - result = op; - if (shift > 31) - shift = 31; - else if (shift < -31) - shift = -31; - if (shift >= 0) { - for (i = 0; i < shift; i++) { - result = qm_add32(result, result); - } - } else { - result = result >> (-shift); - } - return result; -} - -/* -Description: This function make a 16 bit saturated left shift when the specified shift -is +ve. This function will make a 16 bit right shift when the specified shift is -ve. -This function return the result after shifting operation. -*/ -s16 qm_shl16(s16 op, int shift) -{ - int i; - s16 result; - result = op; - if (shift > 15) - shift = 15; - else if (shift < -15) - shift = -15; - if (shift > 0) { - for (i = 0; i < shift; i++) { - result = qm_add16(result, result); - } - } else { - result = result >> (-shift); - } - return result; -} - -/* -Description: This function make a 16 bit right shift when shift is +ve. -This function make a 16 bit saturated left shift when shift is -ve. This function -return the result of the shift operation. -*/ -s16 qm_shr16(s16 op, int shift) -{ - return qm_shl16(op, -shift); -} - -/* -Description: This function return the number of redundant sign bits in a 32 bit number. -Example: qm_norm32(0x00000080) = 23 -*/ -s16 qm_norm32(s32 op) -{ - u16 u16extraSignBits; - if (op == 0) { - return 31; - } else { - u16extraSignBits = 0; - while ((op >> 31) == (op >> 30)) { - u16extraSignBits++; - op = op << 1; - } - } - return u16extraSignBits; -} - -/* This table is log2(1+(i/32)) where i=[0:1:31], in q.15 format */ -static const s16 log_table[] = { - 0, - 1455, - 2866, - 4236, - 5568, - 6863, - 8124, - 9352, - 10549, - 11716, - 12855, - 13968, - 15055, - 16117, - 17156, - 18173, - 19168, - 20143, - 21098, - 22034, - 22952, - 23852, - 24736, - 25604, - 26455, - 27292, - 28114, - 28922, - 29717, - 30498, - 31267, - 32024 -}; - -#define LOG_TABLE_SIZE 32 /* log_table size */ -#define LOG2_LOG_TABLE_SIZE 5 /* log2(log_table size) */ -#define Q_LOG_TABLE 15 /* qformat of log_table */ -#define LOG10_2 19728 /* log10(2) in q.16 */ - -/* -Description: -This routine takes the input number N and its q format qN and compute -the log10(N). This routine first normalizes the input no N. Then N is in mag*(2^x) format. -mag is any number in the range 2^30-(2^31 - 1). Then log2(mag * 2^x) = log2(mag) + x is computed. -From that log10(mag * 2^x) = log2(mag * 2^x) * log10(2) is computed. -This routine looks the log2 value in the table considering LOG2_LOG_TABLE_SIZE+1 MSBs. -As the MSB is always 1, only next LOG2_OF_LOG_TABLE_SIZE MSBs are used for table lookup. -Next 16 MSBs are used for interpolation. -Inputs: -N - number to which log10 has to be found. -qN - q format of N -log10N - address where log10(N) will be written. -qLog10N - address where log10N qformat will be written. -Note/Problem: -For accurate results input should be in normalized or near normalized form. -*/ -void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N) -{ - s16 s16norm, s16tableIndex, s16errorApproximation; - u16 u16offset; - s32 s32log; - - /* normalize the N. */ - s16norm = qm_norm32(N); - N = N << s16norm; - - /* The qformat of N after normalization. - * -30 is added to treat the no as between 1.0 to 2.0 - * i.e. after adding the -30 to the qformat the decimal point will be - * just rigtht of the MSB. (i.e. after sign bit and 1st MSB). i.e. - * at the right side of 30th bit. - */ - qN = qN + s16norm - 30; - - /* take the table index as the LOG2_OF_LOG_TABLE_SIZE bits right of the MSB */ - s16tableIndex = (s16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE))); - - /* remove the MSB. the MSB is always 1 after normalization. */ - s16tableIndex = - s16tableIndex & (s16) ((1 << LOG2_LOG_TABLE_SIZE) - 1); - - /* remove the (1+LOG2_OF_LOG_TABLE_SIZE) MSBs in the N. */ - N = N & ((1 << (32 - (2 + LOG2_LOG_TABLE_SIZE))) - 1); - - /* take the offset as the 16 MSBS after table index. - */ - u16offset = (u16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE + 16))); - - /* look the log value in the table. */ - s32log = log_table[s16tableIndex]; /* q.15 format */ - - /* interpolate using the offset. */ - s16errorApproximation = (s16) qm_mulu16(u16offset, (u16) (log_table[s16tableIndex + 1] - log_table[s16tableIndex])); /* q.15 */ - - s32log = qm_add16((s16) s32log, s16errorApproximation); /* q.15 format */ - - /* adjust for the qformat of the N as - * log2(mag * 2^x) = log2(mag) + x - */ - s32log = qm_add32(s32log, ((s32) -qN) << 15); /* q.15 format */ - - /* normalize the result. */ - s16norm = qm_norm32(s32log); - - /* bring all the important bits into lower 16 bits */ - s32log = qm_shl32(s32log, s16norm - 16); /* q.15+s16norm-16 format */ - - /* compute the log10(N) by multiplying log2(N) with log10(2). - * as log10(mag * 2^x) = log2(mag * 2^x) * log10(2) - * log10N in q.15+s16norm-16+1 (LOG10_2 is in q.16) - */ - *log10N = qm_muls16((s16) s32log, (s16) LOG10_2); - - /* write the q format of the result. */ - *qLog10N = 15 + s16norm - 16 + 1; - - return; -} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h deleted file mode 100644 index 49f57f4..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_QMATH_H_ -#define _BRCM_QMATH_H_ - -u16 qm_mulu16(u16 op1, u16 op2); - -s16 qm_muls16(s16 op1, s16 op2); - -s32 qm_add32(s32 op1, s32 op2); - -s16 qm_add16(s16 op1, s16 op2); - -s16 qm_sub16(s16 op1, s16 op2); - -s32 qm_shl32(s32 op, int shift); - -s16 qm_shl16(s16 op, int shift); - -s16 qm_shr16(s16 op, int shift); - -s16 qm_norm32(s32 op); - -void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N); - -#endif /* #ifndef _BRCM_QMATH_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h deleted file mode 100644 index c3a6754..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h +++ /dev/null @@ -1,1533 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_PHY_RADIO_H_ -#define _BRCM_PHY_RADIO_H_ - -#define RADIO_IDCODE 0x01 - -#define RADIO_DEFAULT_CORE 0 - -#define RXC0_RSSI_RST 0x80 -#define RXC0_MODE_RSSI 0x40 -#define RXC0_MODE_OFF 0x20 -#define RXC0_MODE_CM 0x10 -#define RXC0_LAN_LOAD 0x08 -#define RXC0_OFF_ADJ_MASK 0x07 - -#define TXC0_MODE_TXLPF 0x04 -#define TXC0_PA_TSSI_EN 0x02 -#define TXC0_TSSI_EN 0x01 - -#define TXC1_PA_GAIN_MASK 0x60 -#define TXC1_PA_GAIN_3DB 0x40 -#define TXC1_PA_GAIN_2DB 0x20 -#define TXC1_TX_MIX_GAIN 0x10 -#define TXC1_OFF_I_MASK 0x0c -#define TXC1_OFF_Q_MASK 0x03 - -#define RADIO_2055_READ_OFF 0x100 -#define RADIO_2057_READ_OFF 0x200 - -#define RADIO_2055_GEN_SPARE 0x00 -#define RADIO_2055_SP_PIN_PD 0x02 -#define RADIO_2055_SP_RSSI_CORE1 0x03 -#define RADIO_2055_SP_PD_MISC_CORE1 0x04 -#define RADIO_2055_SP_RSSI_CORE2 0x05 -#define RADIO_2055_SP_PD_MISC_CORE2 0x06 -#define RADIO_2055_SP_RX_GC1_CORE1 0x07 -#define RADIO_2055_SP_RX_GC2_CORE1 0x08 -#define RADIO_2055_SP_RX_GC1_CORE2 0x09 -#define RADIO_2055_SP_RX_GC2_CORE2 0x0a -#define RADIO_2055_SP_LPF_BW_SELECT_CORE1 0x0b -#define RADIO_2055_SP_LPF_BW_SELECT_CORE2 0x0c -#define RADIO_2055_SP_TX_GC1_CORE1 0x0d -#define RADIO_2055_SP_TX_GC2_CORE1 0x0e -#define RADIO_2055_SP_TX_GC1_CORE2 0x0f -#define RADIO_2055_SP_TX_GC2_CORE2 0x10 -#define RADIO_2055_MASTER_CNTRL1 0x11 -#define RADIO_2055_MASTER_CNTRL2 0x12 -#define RADIO_2055_PD_LGEN 0x13 -#define RADIO_2055_PD_PLL_TS 0x14 -#define RADIO_2055_PD_CORE1_LGBUF 0x15 -#define RADIO_2055_PD_CORE1_TX 0x16 -#define RADIO_2055_PD_CORE1_RXTX 0x17 -#define RADIO_2055_PD_CORE1_RSSI_MISC 0x18 -#define RADIO_2055_PD_CORE2_LGBUF 0x19 -#define RADIO_2055_PD_CORE2_TX 0x1a -#define RADIO_2055_PD_CORE2_RXTX 0x1b -#define RADIO_2055_PD_CORE2_RSSI_MISC 0x1c -#define RADIO_2055_PWRDET_LGEN 0x1d -#define RADIO_2055_PWRDET_LGBUF_CORE1 0x1e -#define RADIO_2055_PWRDET_RXTX_CORE1 0x1f -#define RADIO_2055_PWRDET_LGBUF_CORE2 0x20 -#define RADIO_2055_PWRDET_RXTX_CORE2 0x21 -#define RADIO_2055_RRCCAL_CNTRL_SPARE 0x22 -#define RADIO_2055_RRCCAL_N_OPT_SEL 0x23 -#define RADIO_2055_CAL_MISC 0x24 -#define RADIO_2055_CAL_COUNTER_OUT 0x25 -#define RADIO_2055_CAL_COUNTER_OUT2 0x26 -#define RADIO_2055_CAL_CVAR_CNTRL 0x27 -#define RADIO_2055_CAL_RVAR_CNTRL 0x28 -#define RADIO_2055_CAL_LPO_CNTRL 0x29 -#define RADIO_2055_CAL_TS 0x2a -#define RADIO_2055_CAL_RCCAL_READ_TS 0x2b -#define RADIO_2055_CAL_RCAL_READ_TS 0x2c -#define RADIO_2055_PAD_DRIVER 0x2d -#define RADIO_2055_XO_CNTRL1 0x2e -#define RADIO_2055_XO_CNTRL2 0x2f -#define RADIO_2055_XO_REGULATOR 0x30 -#define RADIO_2055_XO_MISC 0x31 -#define RADIO_2055_PLL_LF_C1 0x32 -#define RADIO_2055_PLL_CAL_VTH 0x33 -#define RADIO_2055_PLL_LF_C2 0x34 -#define RADIO_2055_PLL_REF 0x35 -#define RADIO_2055_PLL_LF_R1 0x36 -#define RADIO_2055_PLL_PFD_CP 0x37 -#define RADIO_2055_PLL_IDAC_CPOPAMP 0x38 -#define RADIO_2055_PLL_CP_REGULATOR 0x39 -#define RADIO_2055_PLL_RCAL 0x3a -#define RADIO_2055_RF_PLL_MOD0 0x3b -#define RADIO_2055_RF_PLL_MOD1 0x3c -#define RADIO_2055_RF_MMD_IDAC1 0x3d -#define RADIO_2055_RF_MMD_IDAC0 0x3e -#define RADIO_2055_RF_MMD_SPARE 0x3f -#define RADIO_2055_VCO_CAL1 0x40 -#define RADIO_2055_VCO_CAL2 0x41 -#define RADIO_2055_VCO_CAL3 0x42 -#define RADIO_2055_VCO_CAL4 0x43 -#define RADIO_2055_VCO_CAL5 0x44 -#define RADIO_2055_VCO_CAL6 0x45 -#define RADIO_2055_VCO_CAL7 0x46 -#define RADIO_2055_VCO_CAL8 0x47 -#define RADIO_2055_VCO_CAL9 0x48 -#define RADIO_2055_VCO_CAL10 0x49 -#define RADIO_2055_VCO_CAL11 0x4a -#define RADIO_2055_VCO_CAL12 0x4b -#define RADIO_2055_VCO_CAL13 0x4c -#define RADIO_2055_VCO_CAL14 0x4d -#define RADIO_2055_VCO_CAL15 0x4e -#define RADIO_2055_VCO_CAL16 0x4f -#define RADIO_2055_VCO_KVCO 0x50 -#define RADIO_2055_VCO_CAP_TAIL 0x51 -#define RADIO_2055_VCO_IDAC_VCO 0x52 -#define RADIO_2055_VCO_REGULATOR 0x53 -#define RADIO_2055_PLL_RF_VTH 0x54 -#define RADIO_2055_LGBUF_CEN_BUF 0x55 -#define RADIO_2055_LGEN_TUNE1 0x56 -#define RADIO_2055_LGEN_TUNE2 0x57 -#define RADIO_2055_LGEN_IDAC1 0x58 -#define RADIO_2055_LGEN_IDAC2 0x59 -#define RADIO_2055_LGEN_BIAS_CNT 0x5a -#define RADIO_2055_LGEN_BIAS_IDAC 0x5b -#define RADIO_2055_LGEN_RCAL 0x5c -#define RADIO_2055_LGEN_DIV 0x5d -#define RADIO_2055_LGEN_SPARE2 0x5e -#define RADIO_2055_CORE1_LGBUF_A_TUNE 0x5f -#define RADIO_2055_CORE1_LGBUF_G_TUNE 0x60 -#define RADIO_2055_CORE1_LGBUF_DIV 0x61 -#define RADIO_2055_CORE1_LGBUF_A_IDAC 0x62 -#define RADIO_2055_CORE1_LGBUF_G_IDAC 0x63 -#define RADIO_2055_CORE1_LGBUF_IDACFIL_OVR 0x64 -#define RADIO_2055_CORE1_LGBUF_SPARE 0x65 -#define RADIO_2055_CORE1_RXRF_SPC1 0x66 -#define RADIO_2055_CORE1_RXRF_REG1 0x67 -#define RADIO_2055_CORE1_RXRF_REG2 0x68 -#define RADIO_2055_CORE1_RXRF_RCAL 0x69 -#define RADIO_2055_CORE1_RXBB_BUFI_LPFCMP 0x6a -#define RADIO_2055_CORE1_RXBB_LPF 0x6b -#define RADIO_2055_CORE1_RXBB_MIDAC_HIPAS 0x6c -#define RADIO_2055_CORE1_RXBB_VGA1_IDAC 0x6d -#define RADIO_2055_CORE1_RXBB_VGA2_IDAC 0x6e -#define RADIO_2055_CORE1_RXBB_VGA3_IDAC 0x6f -#define RADIO_2055_CORE1_RXBB_BUFO_CTRL 0x70 -#define RADIO_2055_CORE1_RXBB_RCCAL_CTRL 0x71 -#define RADIO_2055_CORE1_RXBB_RSSI_CTRL1 0x72 -#define RADIO_2055_CORE1_RXBB_RSSI_CTRL2 0x73 -#define RADIO_2055_CORE1_RXBB_RSSI_CTRL3 0x74 -#define RADIO_2055_CORE1_RXBB_RSSI_CTRL4 0x75 -#define RADIO_2055_CORE1_RXBB_RSSI_CTRL5 0x76 -#define RADIO_2055_CORE1_RXBB_REGULATOR 0x77 -#define RADIO_2055_CORE1_RXBB_SPARE1 0x78 -#define RADIO_2055_CORE1_RXTXBB_RCAL 0x79 -#define RADIO_2055_CORE1_TXRF_SGM_PGA 0x7a -#define RADIO_2055_CORE1_TXRF_SGM_PAD 0x7b -#define RADIO_2055_CORE1_TXRF_CNTR_PGA1 0x7c -#define RADIO_2055_CORE1_TXRF_CNTR_PAD1 0x7d -#define RADIO_2055_CORE1_TX_RFPGA_IDAC 0x7e -#define RADIO_2055_CORE1_TX_PGA_PAD_TN 0x7f -#define RADIO_2055_CORE1_TX_PAD_IDAC1 0x80 -#define RADIO_2055_CORE1_TX_PAD_IDAC2 0x81 -#define RADIO_2055_CORE1_TX_MX_BGTRIM 0x82 -#define RADIO_2055_CORE1_TXRF_RCAL 0x83 -#define RADIO_2055_CORE1_TXRF_PAD_TSSI1 0x84 -#define RADIO_2055_CORE1_TXRF_PAD_TSSI2 0x85 -#define RADIO_2055_CORE1_TX_RF_SPARE 0x86 -#define RADIO_2055_CORE1_TXRF_IQCAL1 0x87 -#define RADIO_2055_CORE1_TXRF_IQCAL2 0x88 -#define RADIO_2055_CORE1_TXBB_RCCAL_CTRL 0x89 -#define RADIO_2055_CORE1_TXBB_LPF1 0x8a -#define RADIO_2055_CORE1_TX_VOS_CNCL 0x8b -#define RADIO_2055_CORE1_TX_LPF_MXGM_IDAC 0x8c -#define RADIO_2055_CORE1_TX_BB_MXGM 0x8d -#define RADIO_2055_CORE2_LGBUF_A_TUNE 0x8e -#define RADIO_2055_CORE2_LGBUF_G_TUNE 0x8f -#define RADIO_2055_CORE2_LGBUF_DIV 0x90 -#define RADIO_2055_CORE2_LGBUF_A_IDAC 0x91 -#define RADIO_2055_CORE2_LGBUF_G_IDAC 0x92 -#define RADIO_2055_CORE2_LGBUF_IDACFIL_OVR 0x93 -#define RADIO_2055_CORE2_LGBUF_SPARE 0x94 -#define RADIO_2055_CORE2_RXRF_SPC1 0x95 -#define RADIO_2055_CORE2_RXRF_REG1 0x96 -#define RADIO_2055_CORE2_RXRF_REG2 0x97 -#define RADIO_2055_CORE2_RXRF_RCAL 0x98 -#define RADIO_2055_CORE2_RXBB_BUFI_LPFCMP 0x99 -#define RADIO_2055_CORE2_RXBB_LPF 0x9a -#define RADIO_2055_CORE2_RXBB_MIDAC_HIPAS 0x9b -#define RADIO_2055_CORE2_RXBB_VGA1_IDAC 0x9c -#define RADIO_2055_CORE2_RXBB_VGA2_IDAC 0x9d -#define RADIO_2055_CORE2_RXBB_VGA3_IDAC 0x9e -#define RADIO_2055_CORE2_RXBB_BUFO_CTRL 0x9f -#define RADIO_2055_CORE2_RXBB_RCCAL_CTRL 0xa0 -#define RADIO_2055_CORE2_RXBB_RSSI_CTRL1 0xa1 -#define RADIO_2055_CORE2_RXBB_RSSI_CTRL2 0xa2 -#define RADIO_2055_CORE2_RXBB_RSSI_CTRL3 0xa3 -#define RADIO_2055_CORE2_RXBB_RSSI_CTRL4 0xa4 -#define RADIO_2055_CORE2_RXBB_RSSI_CTRL5 0xa5 -#define RADIO_2055_CORE2_RXBB_REGULATOR 0xa6 -#define RADIO_2055_CORE2_RXBB_SPARE1 0xa7 -#define RADIO_2055_CORE2_RXTXBB_RCAL 0xa8 -#define RADIO_2055_CORE2_TXRF_SGM_PGA 0xa9 -#define RADIO_2055_CORE2_TXRF_SGM_PAD 0xaa -#define RADIO_2055_CORE2_TXRF_CNTR_PGA1 0xab -#define RADIO_2055_CORE2_TXRF_CNTR_PAD1 0xac -#define RADIO_2055_CORE2_TX_RFPGA_IDAC 0xad -#define RADIO_2055_CORE2_TX_PGA_PAD_TN 0xae -#define RADIO_2055_CORE2_TX_PAD_IDAC1 0xaf -#define RADIO_2055_CORE2_TX_PAD_IDAC2 0xb0 -#define RADIO_2055_CORE2_TX_MX_BGTRIM 0xb1 -#define RADIO_2055_CORE2_TXRF_RCAL 0xb2 -#define RADIO_2055_CORE2_TXRF_PAD_TSSI1 0xb3 -#define RADIO_2055_CORE2_TXRF_PAD_TSSI2 0xb4 -#define RADIO_2055_CORE2_TX_RF_SPARE 0xb5 -#define RADIO_2055_CORE2_TXRF_IQCAL1 0xb6 -#define RADIO_2055_CORE2_TXRF_IQCAL2 0xb7 -#define RADIO_2055_CORE2_TXBB_RCCAL_CTRL 0xb8 -#define RADIO_2055_CORE2_TXBB_LPF1 0xb9 -#define RADIO_2055_CORE2_TX_VOS_CNCL 0xba -#define RADIO_2055_CORE2_TX_LPF_MXGM_IDAC 0xbb -#define RADIO_2055_CORE2_TX_BB_MXGM 0xbc -#define RADIO_2055_PRG_GC_HPVGA23_21 0xbd -#define RADIO_2055_PRG_GC_HPVGA23_22 0xbe -#define RADIO_2055_PRG_GC_HPVGA23_23 0xbf -#define RADIO_2055_PRG_GC_HPVGA23_24 0xc0 -#define RADIO_2055_PRG_GC_HPVGA23_25 0xc1 -#define RADIO_2055_PRG_GC_HPVGA23_26 0xc2 -#define RADIO_2055_PRG_GC_HPVGA23_27 0xc3 -#define RADIO_2055_PRG_GC_HPVGA23_28 0xc4 -#define RADIO_2055_PRG_GC_HPVGA23_29 0xc5 -#define RADIO_2055_PRG_GC_HPVGA23_30 0xc6 -#define RADIO_2055_CORE1_LNA_GAINBST 0xcd -#define RADIO_2055_CORE1_B0_NBRSSI_VCM 0xd2 -#define RADIO_2055_CORE1_GEN_SPARE2 0xd6 -#define RADIO_2055_CORE2_LNA_GAINBST 0xd9 -#define RADIO_2055_CORE2_B0_NBRSSI_VCM 0xde -#define RADIO_2055_CORE2_GEN_SPARE2 0xe2 - -#define RADIO_2055_GAINBST_GAIN_DB 6 -#define RADIO_2055_GAINBST_CODE 0x6 - -#define RADIO_2055_JTAGCTRL_MASK 0x04 -#define RADIO_2055_JTAGSYNC_MASK 0x08 -#define RADIO_2055_RRCAL_START 0x40 -#define RADIO_2055_RRCAL_RST_N 0x01 -#define RADIO_2055_CAL_LPO_ENABLE 0x80 -#define RADIO_2055_RCAL_DONE 0x80 -#define RADIO_2055_NBRSSI_VCM_I_MASK 0x03 -#define RADIO_2055_NBRSSI_VCM_I_SHIFT 0x00 -#define RADIO_2055_NBRSSI_VCM_Q_MASK 0x03 -#define RADIO_2055_NBRSSI_VCM_Q_SHIFT 0x00 -#define RADIO_2055_WBRSSI_VCM_IQ_MASK 0x0c -#define RADIO_2055_WBRSSI_VCM_IQ_SHIFT 0x02 -#define RADIO_2055_NBRSSI_PD 0x01 -#define RADIO_2055_WBRSSI_G1_PD 0x04 -#define RADIO_2055_WBRSSI_G2_PD 0x02 -#define RADIO_2055_NBRSSI_SEL 0x01 -#define RADIO_2055_WBRSSI_G1_SEL 0x04 -#define RADIO_2055_WBRSSI_G2_SEL 0x02 -#define RADIO_2055_COUPLE_RX_MASK 0x01 -#define RADIO_2055_COUPLE_TX_MASK 0x02 -#define RADIO_2055_GAINBST_DISABLE 0x02 -#define RADIO_2055_GAINBST_VAL_MASK 0x07 -#define RADIO_2055_RXMX_GC_MASK 0x0c - -#define RADIO_MIMO_CORESEL_OFF 0x0 -#define RADIO_MIMO_CORESEL_CORE1 0x1 -#define RADIO_MIMO_CORESEL_CORE2 0x2 -#define RADIO_MIMO_CORESEL_CORE3 0x3 -#define RADIO_MIMO_CORESEL_CORE4 0x4 -#define RADIO_MIMO_CORESEL_ALLRX 0x5 -#define RADIO_MIMO_CORESEL_ALLTX 0x6 -#define RADIO_MIMO_CORESEL_ALLRXTX 0x7 - -#define RADIO_2064_READ_OFF 0x200 - -#define RADIO_2064_REG000 0x0 -#define RADIO_2064_REG001 0x1 -#define RADIO_2064_REG002 0x2 -#define RADIO_2064_REG003 0x3 -#define RADIO_2064_REG004 0x4 -#define RADIO_2064_REG005 0x5 -#define RADIO_2064_REG006 0x6 -#define RADIO_2064_REG007 0x7 -#define RADIO_2064_REG008 0x8 -#define RADIO_2064_REG009 0x9 -#define RADIO_2064_REG00A 0xa -#define RADIO_2064_REG00B 0xb -#define RADIO_2064_REG00C 0xc -#define RADIO_2064_REG00D 0xd -#define RADIO_2064_REG00E 0xe -#define RADIO_2064_REG00F 0xf -#define RADIO_2064_REG010 0x10 -#define RADIO_2064_REG011 0x11 -#define RADIO_2064_REG012 0x12 -#define RADIO_2064_REG013 0x13 -#define RADIO_2064_REG014 0x14 -#define RADIO_2064_REG015 0x15 -#define RADIO_2064_REG016 0x16 -#define RADIO_2064_REG017 0x17 -#define RADIO_2064_REG018 0x18 -#define RADIO_2064_REG019 0x19 -#define RADIO_2064_REG01A 0x1a -#define RADIO_2064_REG01B 0x1b -#define RADIO_2064_REG01C 0x1c -#define RADIO_2064_REG01D 0x1d -#define RADIO_2064_REG01E 0x1e -#define RADIO_2064_REG01F 0x1f -#define RADIO_2064_REG020 0x20 -#define RADIO_2064_REG021 0x21 -#define RADIO_2064_REG022 0x22 -#define RADIO_2064_REG023 0x23 -#define RADIO_2064_REG024 0x24 -#define RADIO_2064_REG025 0x25 -#define RADIO_2064_REG026 0x26 -#define RADIO_2064_REG027 0x27 -#define RADIO_2064_REG028 0x28 -#define RADIO_2064_REG029 0x29 -#define RADIO_2064_REG02A 0x2a -#define RADIO_2064_REG02B 0x2b -#define RADIO_2064_REG02C 0x2c -#define RADIO_2064_REG02D 0x2d -#define RADIO_2064_REG02E 0x2e -#define RADIO_2064_REG02F 0x2f -#define RADIO_2064_REG030 0x30 -#define RADIO_2064_REG031 0x31 -#define RADIO_2064_REG032 0x32 -#define RADIO_2064_REG033 0x33 -#define RADIO_2064_REG034 0x34 -#define RADIO_2064_REG035 0x35 -#define RADIO_2064_REG036 0x36 -#define RADIO_2064_REG037 0x37 -#define RADIO_2064_REG038 0x38 -#define RADIO_2064_REG039 0x39 -#define RADIO_2064_REG03A 0x3a -#define RADIO_2064_REG03B 0x3b -#define RADIO_2064_REG03C 0x3c -#define RADIO_2064_REG03D 0x3d -#define RADIO_2064_REG03E 0x3e -#define RADIO_2064_REG03F 0x3f -#define RADIO_2064_REG040 0x40 -#define RADIO_2064_REG041 0x41 -#define RADIO_2064_REG042 0x42 -#define RADIO_2064_REG043 0x43 -#define RADIO_2064_REG044 0x44 -#define RADIO_2064_REG045 0x45 -#define RADIO_2064_REG046 0x46 -#define RADIO_2064_REG047 0x47 -#define RADIO_2064_REG048 0x48 -#define RADIO_2064_REG049 0x49 -#define RADIO_2064_REG04A 0x4a -#define RADIO_2064_REG04B 0x4b -#define RADIO_2064_REG04C 0x4c -#define RADIO_2064_REG04D 0x4d -#define RADIO_2064_REG04E 0x4e -#define RADIO_2064_REG04F 0x4f -#define RADIO_2064_REG050 0x50 -#define RADIO_2064_REG051 0x51 -#define RADIO_2064_REG052 0x52 -#define RADIO_2064_REG053 0x53 -#define RADIO_2064_REG054 0x54 -#define RADIO_2064_REG055 0x55 -#define RADIO_2064_REG056 0x56 -#define RADIO_2064_REG057 0x57 -#define RADIO_2064_REG058 0x58 -#define RADIO_2064_REG059 0x59 -#define RADIO_2064_REG05A 0x5a -#define RADIO_2064_REG05B 0x5b -#define RADIO_2064_REG05C 0x5c -#define RADIO_2064_REG05D 0x5d -#define RADIO_2064_REG05E 0x5e -#define RADIO_2064_REG05F 0x5f -#define RADIO_2064_REG060 0x60 -#define RADIO_2064_REG061 0x61 -#define RADIO_2064_REG062 0x62 -#define RADIO_2064_REG063 0x63 -#define RADIO_2064_REG064 0x64 -#define RADIO_2064_REG065 0x65 -#define RADIO_2064_REG066 0x66 -#define RADIO_2064_REG067 0x67 -#define RADIO_2064_REG068 0x68 -#define RADIO_2064_REG069 0x69 -#define RADIO_2064_REG06A 0x6a -#define RADIO_2064_REG06B 0x6b -#define RADIO_2064_REG06C 0x6c -#define RADIO_2064_REG06D 0x6d -#define RADIO_2064_REG06E 0x6e -#define RADIO_2064_REG06F 0x6f -#define RADIO_2064_REG070 0x70 -#define RADIO_2064_REG071 0x71 -#define RADIO_2064_REG072 0x72 -#define RADIO_2064_REG073 0x73 -#define RADIO_2064_REG074 0x74 -#define RADIO_2064_REG075 0x75 -#define RADIO_2064_REG076 0x76 -#define RADIO_2064_REG077 0x77 -#define RADIO_2064_REG078 0x78 -#define RADIO_2064_REG079 0x79 -#define RADIO_2064_REG07A 0x7a -#define RADIO_2064_REG07B 0x7b -#define RADIO_2064_REG07C 0x7c -#define RADIO_2064_REG07D 0x7d -#define RADIO_2064_REG07E 0x7e -#define RADIO_2064_REG07F 0x7f -#define RADIO_2064_REG080 0x80 -#define RADIO_2064_REG081 0x81 -#define RADIO_2064_REG082 0x82 -#define RADIO_2064_REG083 0x83 -#define RADIO_2064_REG084 0x84 -#define RADIO_2064_REG085 0x85 -#define RADIO_2064_REG086 0x86 -#define RADIO_2064_REG087 0x87 -#define RADIO_2064_REG088 0x88 -#define RADIO_2064_REG089 0x89 -#define RADIO_2064_REG08A 0x8a -#define RADIO_2064_REG08B 0x8b -#define RADIO_2064_REG08C 0x8c -#define RADIO_2064_REG08D 0x8d -#define RADIO_2064_REG08E 0x8e -#define RADIO_2064_REG08F 0x8f -#define RADIO_2064_REG090 0x90 -#define RADIO_2064_REG091 0x91 -#define RADIO_2064_REG092 0x92 -#define RADIO_2064_REG093 0x93 -#define RADIO_2064_REG094 0x94 -#define RADIO_2064_REG095 0x95 -#define RADIO_2064_REG096 0x96 -#define RADIO_2064_REG097 0x97 -#define RADIO_2064_REG098 0x98 -#define RADIO_2064_REG099 0x99 -#define RADIO_2064_REG09A 0x9a -#define RADIO_2064_REG09B 0x9b -#define RADIO_2064_REG09C 0x9c -#define RADIO_2064_REG09D 0x9d -#define RADIO_2064_REG09E 0x9e -#define RADIO_2064_REG09F 0x9f -#define RADIO_2064_REG0A0 0xa0 -#define RADIO_2064_REG0A1 0xa1 -#define RADIO_2064_REG0A2 0xa2 -#define RADIO_2064_REG0A3 0xa3 -#define RADIO_2064_REG0A4 0xa4 -#define RADIO_2064_REG0A5 0xa5 -#define RADIO_2064_REG0A6 0xa6 -#define RADIO_2064_REG0A7 0xa7 -#define RADIO_2064_REG0A8 0xa8 -#define RADIO_2064_REG0A9 0xa9 -#define RADIO_2064_REG0AA 0xaa -#define RADIO_2064_REG0AB 0xab -#define RADIO_2064_REG0AC 0xac -#define RADIO_2064_REG0AD 0xad -#define RADIO_2064_REG0AE 0xae -#define RADIO_2064_REG0AF 0xaf -#define RADIO_2064_REG0B0 0xb0 -#define RADIO_2064_REG0B1 0xb1 -#define RADIO_2064_REG0B2 0xb2 -#define RADIO_2064_REG0B3 0xb3 -#define RADIO_2064_REG0B4 0xb4 -#define RADIO_2064_REG0B5 0xb5 -#define RADIO_2064_REG0B6 0xb6 -#define RADIO_2064_REG0B7 0xb7 -#define RADIO_2064_REG0B8 0xb8 -#define RADIO_2064_REG0B9 0xb9 -#define RADIO_2064_REG0BA 0xba -#define RADIO_2064_REG0BB 0xbb -#define RADIO_2064_REG0BC 0xbc -#define RADIO_2064_REG0BD 0xbd -#define RADIO_2064_REG0BE 0xbe -#define RADIO_2064_REG0BF 0xbf -#define RADIO_2064_REG0C0 0xc0 -#define RADIO_2064_REG0C1 0xc1 -#define RADIO_2064_REG0C2 0xc2 -#define RADIO_2064_REG0C3 0xc3 -#define RADIO_2064_REG0C4 0xc4 -#define RADIO_2064_REG0C5 0xc5 -#define RADIO_2064_REG0C6 0xc6 -#define RADIO_2064_REG0C7 0xc7 -#define RADIO_2064_REG0C8 0xc8 -#define RADIO_2064_REG0C9 0xc9 -#define RADIO_2064_REG0CA 0xca -#define RADIO_2064_REG0CB 0xcb -#define RADIO_2064_REG0CC 0xcc -#define RADIO_2064_REG0CD 0xcd -#define RADIO_2064_REG0CE 0xce -#define RADIO_2064_REG0CF 0xcf -#define RADIO_2064_REG0D0 0xd0 -#define RADIO_2064_REG0D1 0xd1 -#define RADIO_2064_REG0D2 0xd2 -#define RADIO_2064_REG0D3 0xd3 -#define RADIO_2064_REG0D4 0xd4 -#define RADIO_2064_REG0D5 0xd5 -#define RADIO_2064_REG0D6 0xd6 -#define RADIO_2064_REG0D7 0xd7 -#define RADIO_2064_REG0D8 0xd8 -#define RADIO_2064_REG0D9 0xd9 -#define RADIO_2064_REG0DA 0xda -#define RADIO_2064_REG0DB 0xdb -#define RADIO_2064_REG0DC 0xdc -#define RADIO_2064_REG0DD 0xdd -#define RADIO_2064_REG0DE 0xde -#define RADIO_2064_REG0DF 0xdf -#define RADIO_2064_REG0E0 0xe0 -#define RADIO_2064_REG0E1 0xe1 -#define RADIO_2064_REG0E2 0xe2 -#define RADIO_2064_REG0E3 0xe3 -#define RADIO_2064_REG0E4 0xe4 -#define RADIO_2064_REG0E5 0xe5 -#define RADIO_2064_REG0E6 0xe6 -#define RADIO_2064_REG0E7 0xe7 -#define RADIO_2064_REG0E8 0xe8 -#define RADIO_2064_REG0E9 0xe9 -#define RADIO_2064_REG0EA 0xea -#define RADIO_2064_REG0EB 0xeb -#define RADIO_2064_REG0EC 0xec -#define RADIO_2064_REG0ED 0xed -#define RADIO_2064_REG0EE 0xee -#define RADIO_2064_REG0EF 0xef -#define RADIO_2064_REG0F0 0xf0 -#define RADIO_2064_REG0F1 0xf1 -#define RADIO_2064_REG0F2 0xf2 -#define RADIO_2064_REG0F3 0xf3 -#define RADIO_2064_REG0F4 0xf4 -#define RADIO_2064_REG0F5 0xf5 -#define RADIO_2064_REG0F6 0xf6 -#define RADIO_2064_REG0F7 0xf7 -#define RADIO_2064_REG0F8 0xf8 -#define RADIO_2064_REG0F9 0xf9 -#define RADIO_2064_REG0FA 0xfa -#define RADIO_2064_REG0FB 0xfb -#define RADIO_2064_REG0FC 0xfc -#define RADIO_2064_REG0FD 0xfd -#define RADIO_2064_REG0FE 0xfe -#define RADIO_2064_REG0FF 0xff -#define RADIO_2064_REG100 0x100 -#define RADIO_2064_REG101 0x101 -#define RADIO_2064_REG102 0x102 -#define RADIO_2064_REG103 0x103 -#define RADIO_2064_REG104 0x104 -#define RADIO_2064_REG105 0x105 -#define RADIO_2064_REG106 0x106 -#define RADIO_2064_REG107 0x107 -#define RADIO_2064_REG108 0x108 -#define RADIO_2064_REG109 0x109 -#define RADIO_2064_REG10A 0x10a -#define RADIO_2064_REG10B 0x10b -#define RADIO_2064_REG10C 0x10c -#define RADIO_2064_REG10D 0x10d -#define RADIO_2064_REG10E 0x10e -#define RADIO_2064_REG10F 0x10f -#define RADIO_2064_REG110 0x110 -#define RADIO_2064_REG111 0x111 -#define RADIO_2064_REG112 0x112 -#define RADIO_2064_REG113 0x113 -#define RADIO_2064_REG114 0x114 -#define RADIO_2064_REG115 0x115 -#define RADIO_2064_REG116 0x116 -#define RADIO_2064_REG117 0x117 -#define RADIO_2064_REG118 0x118 -#define RADIO_2064_REG119 0x119 -#define RADIO_2064_REG11A 0x11a -#define RADIO_2064_REG11B 0x11b -#define RADIO_2064_REG11C 0x11c -#define RADIO_2064_REG11D 0x11d -#define RADIO_2064_REG11E 0x11e -#define RADIO_2064_REG11F 0x11f -#define RADIO_2064_REG120 0x120 -#define RADIO_2064_REG121 0x121 -#define RADIO_2064_REG122 0x122 -#define RADIO_2064_REG123 0x123 -#define RADIO_2064_REG124 0x124 -#define RADIO_2064_REG125 0x125 -#define RADIO_2064_REG126 0x126 -#define RADIO_2064_REG127 0x127 -#define RADIO_2064_REG128 0x128 -#define RADIO_2064_REG129 0x129 -#define RADIO_2064_REG12A 0x12a -#define RADIO_2064_REG12B 0x12b -#define RADIO_2064_REG12C 0x12c -#define RADIO_2064_REG12D 0x12d -#define RADIO_2064_REG12E 0x12e -#define RADIO_2064_REG12F 0x12f -#define RADIO_2064_REG130 0x130 - -#define RADIO_2056_SYN (0x0 << 12) -#define RADIO_2056_TX0 (0x2 << 12) -#define RADIO_2056_TX1 (0x3 << 12) -#define RADIO_2056_RX0 (0x6 << 12) -#define RADIO_2056_RX1 (0x7 << 12) -#define RADIO_2056_ALLTX (0xe << 12) -#define RADIO_2056_ALLRX (0xf << 12) - -#define RADIO_2056_SYN_RESERVED_ADDR0 0x0 -#define RADIO_2056_SYN_IDCODE 0x1 -#define RADIO_2056_SYN_RESERVED_ADDR2 0x2 -#define RADIO_2056_SYN_RESERVED_ADDR3 0x3 -#define RADIO_2056_SYN_RESERVED_ADDR4 0x4 -#define RADIO_2056_SYN_RESERVED_ADDR5 0x5 -#define RADIO_2056_SYN_RESERVED_ADDR6 0x6 -#define RADIO_2056_SYN_RESERVED_ADDR7 0x7 -#define RADIO_2056_SYN_COM_CTRL 0x8 -#define RADIO_2056_SYN_COM_PU 0x9 -#define RADIO_2056_SYN_COM_OVR 0xa -#define RADIO_2056_SYN_COM_RESET 0xb -#define RADIO_2056_SYN_COM_RCAL 0xc -#define RADIO_2056_SYN_COM_RC_RXLPF 0xd -#define RADIO_2056_SYN_COM_RC_TXLPF 0xe -#define RADIO_2056_SYN_COM_RC_RXHPF 0xf -#define RADIO_2056_SYN_RESERVED_ADDR16 0x10 -#define RADIO_2056_SYN_RESERVED_ADDR17 0x11 -#define RADIO_2056_SYN_RESERVED_ADDR18 0x12 -#define RADIO_2056_SYN_RESERVED_ADDR19 0x13 -#define RADIO_2056_SYN_RESERVED_ADDR20 0x14 -#define RADIO_2056_SYN_RESERVED_ADDR21 0x15 -#define RADIO_2056_SYN_RESERVED_ADDR22 0x16 -#define RADIO_2056_SYN_RESERVED_ADDR23 0x17 -#define RADIO_2056_SYN_RESERVED_ADDR24 0x18 -#define RADIO_2056_SYN_RESERVED_ADDR25 0x19 -#define RADIO_2056_SYN_RESERVED_ADDR26 0x1a -#define RADIO_2056_SYN_RESERVED_ADDR27 0x1b -#define RADIO_2056_SYN_RESERVED_ADDR28 0x1c -#define RADIO_2056_SYN_RESERVED_ADDR29 0x1d -#define RADIO_2056_SYN_RESERVED_ADDR30 0x1e -#define RADIO_2056_SYN_RESERVED_ADDR31 0x1f -#define RADIO_2056_SYN_GPIO_MASTER1 0x20 -#define RADIO_2056_SYN_GPIO_MASTER2 0x21 -#define RADIO_2056_SYN_TOPBIAS_MASTER 0x22 -#define RADIO_2056_SYN_TOPBIAS_RCAL 0x23 -#define RADIO_2056_SYN_AFEREG 0x24 -#define RADIO_2056_SYN_TEMPPROCSENSE 0x25 -#define RADIO_2056_SYN_TEMPPROCSENSEIDAC 0x26 -#define RADIO_2056_SYN_TEMPPROCSENSERCAL 0x27 -#define RADIO_2056_SYN_LPO 0x28 -#define RADIO_2056_SYN_VDDCAL_MASTER 0x29 -#define RADIO_2056_SYN_VDDCAL_IDAC 0x2a -#define RADIO_2056_SYN_VDDCAL_STATUS 0x2b -#define RADIO_2056_SYN_RCAL_MASTER 0x2c -#define RADIO_2056_SYN_RCAL_CODE_OUT 0x2d -#define RADIO_2056_SYN_RCCAL_CTRL0 0x2e -#define RADIO_2056_SYN_RCCAL_CTRL1 0x2f -#define RADIO_2056_SYN_RCCAL_CTRL2 0x30 -#define RADIO_2056_SYN_RCCAL_CTRL3 0x31 -#define RADIO_2056_SYN_RCCAL_CTRL4 0x32 -#define RADIO_2056_SYN_RCCAL_CTRL5 0x33 -#define RADIO_2056_SYN_RCCAL_CTRL6 0x34 -#define RADIO_2056_SYN_RCCAL_CTRL7 0x35 -#define RADIO_2056_SYN_RCCAL_CTRL8 0x36 -#define RADIO_2056_SYN_RCCAL_CTRL9 0x37 -#define RADIO_2056_SYN_RCCAL_CTRL10 0x38 -#define RADIO_2056_SYN_RCCAL_CTRL11 0x39 -#define RADIO_2056_SYN_ZCAL_SPARE1 0x3a -#define RADIO_2056_SYN_ZCAL_SPARE2 0x3b -#define RADIO_2056_SYN_PLL_MAST1 0x3c -#define RADIO_2056_SYN_PLL_MAST2 0x3d -#define RADIO_2056_SYN_PLL_MAST3 0x3e -#define RADIO_2056_SYN_PLL_BIAS_RESET 0x3f -#define RADIO_2056_SYN_PLL_XTAL0 0x40 -#define RADIO_2056_SYN_PLL_XTAL1 0x41 -#define RADIO_2056_SYN_PLL_XTAL3 0x42 -#define RADIO_2056_SYN_PLL_XTAL4 0x43 -#define RADIO_2056_SYN_PLL_XTAL5 0x44 -#define RADIO_2056_SYN_PLL_XTAL6 0x45 -#define RADIO_2056_SYN_PLL_REFDIV 0x46 -#define RADIO_2056_SYN_PLL_PFD 0x47 -#define RADIO_2056_SYN_PLL_CP1 0x48 -#define RADIO_2056_SYN_PLL_CP2 0x49 -#define RADIO_2056_SYN_PLL_CP3 0x4a -#define RADIO_2056_SYN_PLL_LOOPFILTER1 0x4b -#define RADIO_2056_SYN_PLL_LOOPFILTER2 0x4c -#define RADIO_2056_SYN_PLL_LOOPFILTER3 0x4d -#define RADIO_2056_SYN_PLL_LOOPFILTER4 0x4e -#define RADIO_2056_SYN_PLL_LOOPFILTER5 0x4f -#define RADIO_2056_SYN_PLL_MMD1 0x50 -#define RADIO_2056_SYN_PLL_MMD2 0x51 -#define RADIO_2056_SYN_PLL_VCO1 0x52 -#define RADIO_2056_SYN_PLL_VCO2 0x53 -#define RADIO_2056_SYN_PLL_MONITOR1 0x54 -#define RADIO_2056_SYN_PLL_MONITOR2 0x55 -#define RADIO_2056_SYN_PLL_VCOCAL1 0x56 -#define RADIO_2056_SYN_PLL_VCOCAL2 0x57 -#define RADIO_2056_SYN_PLL_VCOCAL4 0x58 -#define RADIO_2056_SYN_PLL_VCOCAL5 0x59 -#define RADIO_2056_SYN_PLL_VCOCAL6 0x5a -#define RADIO_2056_SYN_PLL_VCOCAL7 0x5b -#define RADIO_2056_SYN_PLL_VCOCAL8 0x5c -#define RADIO_2056_SYN_PLL_VCOCAL9 0x5d -#define RADIO_2056_SYN_PLL_VCOCAL10 0x5e -#define RADIO_2056_SYN_PLL_VCOCAL11 0x5f -#define RADIO_2056_SYN_PLL_VCOCAL12 0x60 -#define RADIO_2056_SYN_PLL_VCOCAL13 0x61 -#define RADIO_2056_SYN_PLL_VREG 0x62 -#define RADIO_2056_SYN_PLL_STATUS1 0x63 -#define RADIO_2056_SYN_PLL_STATUS2 0x64 -#define RADIO_2056_SYN_PLL_STATUS3 0x65 -#define RADIO_2056_SYN_LOGEN_PU0 0x66 -#define RADIO_2056_SYN_LOGEN_PU1 0x67 -#define RADIO_2056_SYN_LOGEN_PU2 0x68 -#define RADIO_2056_SYN_LOGEN_PU3 0x69 -#define RADIO_2056_SYN_LOGEN_PU5 0x6a -#define RADIO_2056_SYN_LOGEN_PU6 0x6b -#define RADIO_2056_SYN_LOGEN_PU7 0x6c -#define RADIO_2056_SYN_LOGEN_PU8 0x6d -#define RADIO_2056_SYN_LOGEN_BIAS_RESET 0x6e -#define RADIO_2056_SYN_LOGEN_RCCR1 0x6f -#define RADIO_2056_SYN_LOGEN_VCOBUF1 0x70 -#define RADIO_2056_SYN_LOGEN_MIXER1 0x71 -#define RADIO_2056_SYN_LOGEN_MIXER2 0x72 -#define RADIO_2056_SYN_LOGEN_BUF1 0x73 -#define RADIO_2056_SYN_LOGENBUF2 0x74 -#define RADIO_2056_SYN_LOGEN_BUF3 0x75 -#define RADIO_2056_SYN_LOGEN_BUF4 0x76 -#define RADIO_2056_SYN_LOGEN_DIV1 0x77 -#define RADIO_2056_SYN_LOGEN_DIV2 0x78 -#define RADIO_2056_SYN_LOGEN_DIV3 0x79 -#define RADIO_2056_SYN_LOGEN_ACL1 0x7a -#define RADIO_2056_SYN_LOGEN_ACL2 0x7b -#define RADIO_2056_SYN_LOGEN_ACL3 0x7c -#define RADIO_2056_SYN_LOGEN_ACL4 0x7d -#define RADIO_2056_SYN_LOGEN_ACL5 0x7e -#define RADIO_2056_SYN_LOGEN_ACL6 0x7f -#define RADIO_2056_SYN_LOGEN_ACLOUT 0x80 -#define RADIO_2056_SYN_LOGEN_ACLCAL1 0x81 -#define RADIO_2056_SYN_LOGEN_ACLCAL2 0x82 -#define RADIO_2056_SYN_LOGEN_ACLCAL3 0x83 -#define RADIO_2056_SYN_CALEN 0x84 -#define RADIO_2056_SYN_LOGEN_PEAKDET1 0x85 -#define RADIO_2056_SYN_LOGEN_CORE_ACL_OVR 0x86 -#define RADIO_2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 -#define RADIO_2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 -#define RADIO_2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 -#define RADIO_2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8a -#define RADIO_2056_SYN_LOGEN_VCOBUF2 0x8b -#define RADIO_2056_SYN_LOGEN_MIXER3 0x8c -#define RADIO_2056_SYN_LOGEN_BUF5 0x8d -#define RADIO_2056_SYN_LOGEN_BUF6 0x8e -#define RADIO_2056_SYN_LOGEN_CBUFRX1 0x8f -#define RADIO_2056_SYN_LOGEN_CBUFRX2 0x90 -#define RADIO_2056_SYN_LOGEN_CBUFRX3 0x91 -#define RADIO_2056_SYN_LOGEN_CBUFRX4 0x92 -#define RADIO_2056_SYN_LOGEN_CBUFTX1 0x93 -#define RADIO_2056_SYN_LOGEN_CBUFTX2 0x94 -#define RADIO_2056_SYN_LOGEN_CBUFTX3 0x95 -#define RADIO_2056_SYN_LOGEN_CBUFTX4 0x96 -#define RADIO_2056_SYN_LOGEN_CMOSRX1 0x97 -#define RADIO_2056_SYN_LOGEN_CMOSRX2 0x98 -#define RADIO_2056_SYN_LOGEN_CMOSRX3 0x99 -#define RADIO_2056_SYN_LOGEN_CMOSRX4 0x9a -#define RADIO_2056_SYN_LOGEN_CMOSTX1 0x9b -#define RADIO_2056_SYN_LOGEN_CMOSTX2 0x9c -#define RADIO_2056_SYN_LOGEN_CMOSTX3 0x9d -#define RADIO_2056_SYN_LOGEN_CMOSTX4 0x9e -#define RADIO_2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9f -#define RADIO_2056_SYN_LOGEN_MIXER3_OVRVAL 0xa0 -#define RADIO_2056_SYN_LOGEN_BUF5_OVRVAL 0xa1 -#define RADIO_2056_SYN_LOGEN_BUF6_OVRVAL 0xa2 -#define RADIO_2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xa3 -#define RADIO_2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xa4 -#define RADIO_2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xa5 -#define RADIO_2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xa6 -#define RADIO_2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xa7 -#define RADIO_2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xa8 -#define RADIO_2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xa9 -#define RADIO_2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xaa -#define RADIO_2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xab -#define RADIO_2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xac -#define RADIO_2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xad -#define RADIO_2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xae -#define RADIO_2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xaf -#define RADIO_2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xb0 -#define RADIO_2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xb1 -#define RADIO_2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xb2 -#define RADIO_2056_SYN_LOGEN_ACL_WAITCNT 0xb3 -#define RADIO_2056_SYN_LOGEN_CORE_CALVALID 0xb4 -#define RADIO_2056_SYN_LOGEN_RX_CMOS_CALVALID 0xb5 -#define RADIO_2056_SYN_LOGEN_TX_CMOS_VALID 0xb6 - -#define RADIO_2056_TX_RESERVED_ADDR0 0x0 -#define RADIO_2056_TX_IDCODE 0x1 -#define RADIO_2056_TX_RESERVED_ADDR2 0x2 -#define RADIO_2056_TX_RESERVED_ADDR3 0x3 -#define RADIO_2056_TX_RESERVED_ADDR4 0x4 -#define RADIO_2056_TX_RESERVED_ADDR5 0x5 -#define RADIO_2056_TX_RESERVED_ADDR6 0x6 -#define RADIO_2056_TX_RESERVED_ADDR7 0x7 -#define RADIO_2056_TX_COM_CTRL 0x8 -#define RADIO_2056_TX_COM_PU 0x9 -#define RADIO_2056_TX_COM_OVR 0xa -#define RADIO_2056_TX_COM_RESET 0xb -#define RADIO_2056_TX_COM_RCAL 0xc -#define RADIO_2056_TX_COM_RC_RXLPF 0xd -#define RADIO_2056_TX_COM_RC_TXLPF 0xe -#define RADIO_2056_TX_COM_RC_RXHPF 0xf -#define RADIO_2056_TX_RESERVED_ADDR16 0x10 -#define RADIO_2056_TX_RESERVED_ADDR17 0x11 -#define RADIO_2056_TX_RESERVED_ADDR18 0x12 -#define RADIO_2056_TX_RESERVED_ADDR19 0x13 -#define RADIO_2056_TX_RESERVED_ADDR20 0x14 -#define RADIO_2056_TX_RESERVED_ADDR21 0x15 -#define RADIO_2056_TX_RESERVED_ADDR22 0x16 -#define RADIO_2056_TX_RESERVED_ADDR23 0x17 -#define RADIO_2056_TX_RESERVED_ADDR24 0x18 -#define RADIO_2056_TX_RESERVED_ADDR25 0x19 -#define RADIO_2056_TX_RESERVED_ADDR26 0x1a -#define RADIO_2056_TX_RESERVED_ADDR27 0x1b -#define RADIO_2056_TX_RESERVED_ADDR28 0x1c -#define RADIO_2056_TX_RESERVED_ADDR29 0x1d -#define RADIO_2056_TX_RESERVED_ADDR30 0x1e -#define RADIO_2056_TX_RESERVED_ADDR31 0x1f -#define RADIO_2056_TX_IQCAL_GAIN_BW 0x20 -#define RADIO_2056_TX_LOFT_FINE_I 0x21 -#define RADIO_2056_TX_LOFT_FINE_Q 0x22 -#define RADIO_2056_TX_LOFT_COARSE_I 0x23 -#define RADIO_2056_TX_LOFT_COARSE_Q 0x24 -#define RADIO_2056_TX_TX_COM_MASTER1 0x25 -#define RADIO_2056_TX_TX_COM_MASTER2 0x26 -#define RADIO_2056_TX_RXIQCAL_TXMUX 0x27 -#define RADIO_2056_TX_TX_SSI_MASTER 0x28 -#define RADIO_2056_TX_IQCAL_VCM_HG 0x29 -#define RADIO_2056_TX_IQCAL_IDAC 0x2a -#define RADIO_2056_TX_TSSI_VCM 0x2b -#define RADIO_2056_TX_TX_AMP_DET 0x2c -#define RADIO_2056_TX_TX_SSI_MUX 0x2d -#define RADIO_2056_TX_TSSIA 0x2e -#define RADIO_2056_TX_TSSIG 0x2f -#define RADIO_2056_TX_TSSI_MISC1 0x30 -#define RADIO_2056_TX_TSSI_MISC2 0x31 -#define RADIO_2056_TX_TSSI_MISC3 0x32 -#define RADIO_2056_TX_PA_SPARE1 0x33 -#define RADIO_2056_TX_PA_SPARE2 0x34 -#define RADIO_2056_TX_INTPAA_MASTER 0x35 -#define RADIO_2056_TX_INTPAA_GAIN 0x36 -#define RADIO_2056_TX_INTPAA_BOOST_TUNE 0x37 -#define RADIO_2056_TX_INTPAA_IAUX_STAT 0x38 -#define RADIO_2056_TX_INTPAA_IAUX_DYN 0x39 -#define RADIO_2056_TX_INTPAA_IMAIN_STAT 0x3a -#define RADIO_2056_TX_INTPAA_IMAIN_DYN 0x3b -#define RADIO_2056_TX_INTPAA_CASCBIAS 0x3c -#define RADIO_2056_TX_INTPAA_PASLOPE 0x3d -#define RADIO_2056_TX_INTPAA_PA_MISC 0x3e -#define RADIO_2056_TX_INTPAG_MASTER 0x3f -#define RADIO_2056_TX_INTPAG_GAIN 0x40 -#define RADIO_2056_TX_INTPAG_BOOST_TUNE 0x41 -#define RADIO_2056_TX_INTPAG_IAUX_STAT 0x42 -#define RADIO_2056_TX_INTPAG_IAUX_DYN 0x43 -#define RADIO_2056_TX_INTPAG_IMAIN_STAT 0x44 -#define RADIO_2056_TX_INTPAG_IMAIN_DYN 0x45 -#define RADIO_2056_TX_INTPAG_CASCBIAS 0x46 -#define RADIO_2056_TX_INTPAG_PASLOPE 0x47 -#define RADIO_2056_TX_INTPAG_PA_MISC 0x48 -#define RADIO_2056_TX_PADA_MASTER 0x49 -#define RADIO_2056_TX_PADA_IDAC 0x4a -#define RADIO_2056_TX_PADA_CASCBIAS 0x4b -#define RADIO_2056_TX_PADA_GAIN 0x4c -#define RADIO_2056_TX_PADA_BOOST_TUNE 0x4d -#define RADIO_2056_TX_PADA_SLOPE 0x4e -#define RADIO_2056_TX_PADG_MASTER 0x4f -#define RADIO_2056_TX_PADG_IDAC 0x50 -#define RADIO_2056_TX_PADG_CASCBIAS 0x51 -#define RADIO_2056_TX_PADG_GAIN 0x52 -#define RADIO_2056_TX_PADG_BOOST_TUNE 0x53 -#define RADIO_2056_TX_PADG_SLOPE 0x54 -#define RADIO_2056_TX_PGAA_MASTER 0x55 -#define RADIO_2056_TX_PGAA_IDAC 0x56 -#define RADIO_2056_TX_PGAA_GAIN 0x57 -#define RADIO_2056_TX_PGAA_BOOST_TUNE 0x58 -#define RADIO_2056_TX_PGAA_SLOPE 0x59 -#define RADIO_2056_TX_PGAA_MISC 0x5a -#define RADIO_2056_TX_PGAG_MASTER 0x5b -#define RADIO_2056_TX_PGAG_IDAC 0x5c -#define RADIO_2056_TX_PGAG_GAIN 0x5d -#define RADIO_2056_TX_PGAG_BOOST_TUNE 0x5e -#define RADIO_2056_TX_PGAG_SLOPE 0x5f -#define RADIO_2056_TX_PGAG_MISC 0x60 -#define RADIO_2056_TX_MIXA_MASTER 0x61 -#define RADIO_2056_TX_MIXA_BOOST_TUNE 0x62 -#define RADIO_2056_TX_MIXG 0x63 -#define RADIO_2056_TX_MIXG_BOOST_TUNE 0x64 -#define RADIO_2056_TX_BB_GM_MASTER 0x65 -#define RADIO_2056_TX_GMBB_GM 0x66 -#define RADIO_2056_TX_GMBB_IDAC 0x67 -#define RADIO_2056_TX_TXLPF_MASTER 0x68 -#define RADIO_2056_TX_TXLPF_RCCAL 0x69 -#define RADIO_2056_TX_TXLPF_RCCAL_OFF0 0x6a -#define RADIO_2056_TX_TXLPF_RCCAL_OFF1 0x6b -#define RADIO_2056_TX_TXLPF_RCCAL_OFF2 0x6c -#define RADIO_2056_TX_TXLPF_RCCAL_OFF3 0x6d -#define RADIO_2056_TX_TXLPF_RCCAL_OFF4 0x6e -#define RADIO_2056_TX_TXLPF_RCCAL_OFF5 0x6f -#define RADIO_2056_TX_TXLPF_RCCAL_OFF6 0x70 -#define RADIO_2056_TX_TXLPF_BW 0x71 -#define RADIO_2056_TX_TXLPF_GAIN 0x72 -#define RADIO_2056_TX_TXLPF_IDAC 0x73 -#define RADIO_2056_TX_TXLPF_IDAC_0 0x74 -#define RADIO_2056_TX_TXLPF_IDAC_1 0x75 -#define RADIO_2056_TX_TXLPF_IDAC_2 0x76 -#define RADIO_2056_TX_TXLPF_IDAC_3 0x77 -#define RADIO_2056_TX_TXLPF_IDAC_4 0x78 -#define RADIO_2056_TX_TXLPF_IDAC_5 0x79 -#define RADIO_2056_TX_TXLPF_IDAC_6 0x7a -#define RADIO_2056_TX_TXLPF_OPAMP_IDAC 0x7b -#define RADIO_2056_TX_TXLPF_MISC 0x7c -#define RADIO_2056_TX_TXSPARE1 0x7d -#define RADIO_2056_TX_TXSPARE2 0x7e -#define RADIO_2056_TX_TXSPARE3 0x7f -#define RADIO_2056_TX_TXSPARE4 0x80 -#define RADIO_2056_TX_TXSPARE5 0x81 -#define RADIO_2056_TX_TXSPARE6 0x82 -#define RADIO_2056_TX_TXSPARE7 0x83 -#define RADIO_2056_TX_TXSPARE8 0x84 -#define RADIO_2056_TX_TXSPARE9 0x85 -#define RADIO_2056_TX_TXSPARE10 0x86 -#define RADIO_2056_TX_TXSPARE11 0x87 -#define RADIO_2056_TX_TXSPARE12 0x88 -#define RADIO_2056_TX_TXSPARE13 0x89 -#define RADIO_2056_TX_TXSPARE14 0x8a -#define RADIO_2056_TX_TXSPARE15 0x8b -#define RADIO_2056_TX_TXSPARE16 0x8c -#define RADIO_2056_TX_STATUS_INTPA_GAIN 0x8d -#define RADIO_2056_TX_STATUS_PAD_GAIN 0x8e -#define RADIO_2056_TX_STATUS_PGA_GAIN 0x8f -#define RADIO_2056_TX_STATUS_GM_TXLPF_GAIN 0x90 -#define RADIO_2056_TX_STATUS_TXLPF_BW 0x91 -#define RADIO_2056_TX_STATUS_TXLPF_RC 0x92 -#define RADIO_2056_TX_GMBB_IDAC0 0x93 -#define RADIO_2056_TX_GMBB_IDAC1 0x94 -#define RADIO_2056_TX_GMBB_IDAC2 0x95 -#define RADIO_2056_TX_GMBB_IDAC3 0x96 -#define RADIO_2056_TX_GMBB_IDAC4 0x97 -#define RADIO_2056_TX_GMBB_IDAC5 0x98 -#define RADIO_2056_TX_GMBB_IDAC6 0x99 -#define RADIO_2056_TX_GMBB_IDAC7 0x9a - -#define RADIO_2056_RX_RESERVED_ADDR0 0x0 -#define RADIO_2056_RX_IDCODE 0x1 -#define RADIO_2056_RX_RESERVED_ADDR2 0x2 -#define RADIO_2056_RX_RESERVED_ADDR3 0x3 -#define RADIO_2056_RX_RESERVED_ADDR4 0x4 -#define RADIO_2056_RX_RESERVED_ADDR5 0x5 -#define RADIO_2056_RX_RESERVED_ADDR6 0x6 -#define RADIO_2056_RX_RESERVED_ADDR7 0x7 -#define RADIO_2056_RX_COM_CTRL 0x8 -#define RADIO_2056_RX_COM_PU 0x9 -#define RADIO_2056_RX_COM_OVR 0xa -#define RADIO_2056_RX_COM_RESET 0xb -#define RADIO_2056_RX_COM_RCAL 0xc -#define RADIO_2056_RX_COM_RC_RXLPF 0xd -#define RADIO_2056_RX_COM_RC_TXLPF 0xe -#define RADIO_2056_RX_COM_RC_RXHPF 0xf -#define RADIO_2056_RX_RESERVED_ADDR16 0x10 -#define RADIO_2056_RX_RESERVED_ADDR17 0x11 -#define RADIO_2056_RX_RESERVED_ADDR18 0x12 -#define RADIO_2056_RX_RESERVED_ADDR19 0x13 -#define RADIO_2056_RX_RESERVED_ADDR20 0x14 -#define RADIO_2056_RX_RESERVED_ADDR21 0x15 -#define RADIO_2056_RX_RESERVED_ADDR22 0x16 -#define RADIO_2056_RX_RESERVED_ADDR23 0x17 -#define RADIO_2056_RX_RESERVED_ADDR24 0x18 -#define RADIO_2056_RX_RESERVED_ADDR25 0x19 -#define RADIO_2056_RX_RESERVED_ADDR26 0x1a -#define RADIO_2056_RX_RESERVED_ADDR27 0x1b -#define RADIO_2056_RX_RESERVED_ADDR28 0x1c -#define RADIO_2056_RX_RESERVED_ADDR29 0x1d -#define RADIO_2056_RX_RESERVED_ADDR30 0x1e -#define RADIO_2056_RX_RESERVED_ADDR31 0x1f -#define RADIO_2056_RX_RXIQCAL_RXMUX 0x20 -#define RADIO_2056_RX_RSSI_PU 0x21 -#define RADIO_2056_RX_RSSI_SEL 0x22 -#define RADIO_2056_RX_RSSI_GAIN 0x23 -#define RADIO_2056_RX_RSSI_NB_IDAC 0x24 -#define RADIO_2056_RX_RSSI_WB2I_IDAC_1 0x25 -#define RADIO_2056_RX_RSSI_WB2I_IDAC_2 0x26 -#define RADIO_2056_RX_RSSI_WB2Q_IDAC_1 0x27 -#define RADIO_2056_RX_RSSI_WB2Q_IDAC_2 0x28 -#define RADIO_2056_RX_RSSI_POLE 0x29 -#define RADIO_2056_RX_RSSI_WB1_IDAC 0x2a -#define RADIO_2056_RX_RSSI_MISC 0x2b -#define RADIO_2056_RX_LNAA_MASTER 0x2c -#define RADIO_2056_RX_LNAA_TUNE 0x2d -#define RADIO_2056_RX_LNAA_GAIN 0x2e -#define RADIO_2056_RX_LNA_A_SLOPE 0x2f -#define RADIO_2056_RX_BIASPOLE_LNAA1_IDAC 0x30 -#define RADIO_2056_RX_LNAA2_IDAC 0x31 -#define RADIO_2056_RX_LNA1A_MISC 0x32 -#define RADIO_2056_RX_LNAG_MASTER 0x33 -#define RADIO_2056_RX_LNAG_TUNE 0x34 -#define RADIO_2056_RX_LNAG_GAIN 0x35 -#define RADIO_2056_RX_LNA_G_SLOPE 0x36 -#define RADIO_2056_RX_BIASPOLE_LNAG1_IDAC 0x37 -#define RADIO_2056_RX_LNAG2_IDAC 0x38 -#define RADIO_2056_RX_LNA1G_MISC 0x39 -#define RADIO_2056_RX_MIXA_MASTER 0x3a -#define RADIO_2056_RX_MIXA_VCM 0x3b -#define RADIO_2056_RX_MIXA_CTRLPTAT 0x3c -#define RADIO_2056_RX_MIXA_LOB_BIAS 0x3d -#define RADIO_2056_RX_MIXA_CORE_IDAC 0x3e -#define RADIO_2056_RX_MIXA_CMFB_IDAC 0x3f -#define RADIO_2056_RX_MIXA_BIAS_AUX 0x40 -#define RADIO_2056_RX_MIXA_BIAS_MAIN 0x41 -#define RADIO_2056_RX_MIXA_BIAS_MISC 0x42 -#define RADIO_2056_RX_MIXA_MAST_BIAS 0x43 -#define RADIO_2056_RX_MIXG_MASTER 0x44 -#define RADIO_2056_RX_MIXG_VCM 0x45 -#define RADIO_2056_RX_MIXG_CTRLPTAT 0x46 -#define RADIO_2056_RX_MIXG_LOB_BIAS 0x47 -#define RADIO_2056_RX_MIXG_CORE_IDAC 0x48 -#define RADIO_2056_RX_MIXG_CMFB_IDAC 0x49 -#define RADIO_2056_RX_MIXG_BIAS_AUX 0x4a -#define RADIO_2056_RX_MIXG_BIAS_MAIN 0x4b -#define RADIO_2056_RX_MIXG_BIAS_MISC 0x4c -#define RADIO_2056_RX_MIXG_MAST_BIAS 0x4d -#define RADIO_2056_RX_TIA_MASTER 0x4e -#define RADIO_2056_RX_TIA_IOPAMP 0x4f -#define RADIO_2056_RX_TIA_QOPAMP 0x50 -#define RADIO_2056_RX_TIA_IMISC 0x51 -#define RADIO_2056_RX_TIA_QMISC 0x52 -#define RADIO_2056_RX_TIA_GAIN 0x53 -#define RADIO_2056_RX_TIA_SPARE1 0x54 -#define RADIO_2056_RX_TIA_SPARE2 0x55 -#define RADIO_2056_RX_BB_LPF_MASTER 0x56 -#define RADIO_2056_RX_AACI_MASTER 0x57 -#define RADIO_2056_RX_RXLPF_IDAC 0x58 -#define RADIO_2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 -#define RADIO_2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5a -#define RADIO_2056_RX_RXLPF_BIAS_DCCANCEL 0x5b -#define RADIO_2056_RX_RXLPF_OUTVCM 0x5c -#define RADIO_2056_RX_RXLPF_INVCM_BODY 0x5d -#define RADIO_2056_RX_RXLPF_CC_OP 0x5e -#define RADIO_2056_RX_RXLPF_GAIN 0x5f -#define RADIO_2056_RX_RXLPF_Q_BW 0x60 -#define RADIO_2056_RX_RXLPF_HP_CORNER_BW 0x61 -#define RADIO_2056_RX_RXLPF_RCCAL_HPC 0x62 -#define RADIO_2056_RX_RXHPF_OFF0 0x63 -#define RADIO_2056_RX_RXHPF_OFF1 0x64 -#define RADIO_2056_RX_RXHPF_OFF2 0x65 -#define RADIO_2056_RX_RXHPF_OFF3 0x66 -#define RADIO_2056_RX_RXHPF_OFF4 0x67 -#define RADIO_2056_RX_RXHPF_OFF5 0x68 -#define RADIO_2056_RX_RXHPF_OFF6 0x69 -#define RADIO_2056_RX_RXHPF_OFF7 0x6a -#define RADIO_2056_RX_RXLPF_RCCAL_LPC 0x6b -#define RADIO_2056_RX_RXLPF_OFF_0 0x6c -#define RADIO_2056_RX_RXLPF_OFF_1 0x6d -#define RADIO_2056_RX_RXLPF_OFF_2 0x6e -#define RADIO_2056_RX_RXLPF_OFF_3 0x6f -#define RADIO_2056_RX_RXLPF_OFF_4 0x70 -#define RADIO_2056_RX_UNUSED 0x71 -#define RADIO_2056_RX_VGA_MASTER 0x72 -#define RADIO_2056_RX_VGA_BIAS 0x73 -#define RADIO_2056_RX_VGA_BIAS_DCCANCEL 0x74 -#define RADIO_2056_RX_VGA_GAIN 0x75 -#define RADIO_2056_RX_VGA_HP_CORNER_BW 0x76 -#define RADIO_2056_RX_VGABUF_BIAS 0x77 -#define RADIO_2056_RX_VGABUF_GAIN_BW 0x78 -#define RADIO_2056_RX_TXFBMIX_A 0x79 -#define RADIO_2056_RX_TXFBMIX_G 0x7a -#define RADIO_2056_RX_RXSPARE1 0x7b -#define RADIO_2056_RX_RXSPARE2 0x7c -#define RADIO_2056_RX_RXSPARE3 0x7d -#define RADIO_2056_RX_RXSPARE4 0x7e -#define RADIO_2056_RX_RXSPARE5 0x7f -#define RADIO_2056_RX_RXSPARE6 0x80 -#define RADIO_2056_RX_RXSPARE7 0x81 -#define RADIO_2056_RX_RXSPARE8 0x82 -#define RADIO_2056_RX_RXSPARE9 0x83 -#define RADIO_2056_RX_RXSPARE10 0x84 -#define RADIO_2056_RX_RXSPARE11 0x85 -#define RADIO_2056_RX_RXSPARE12 0x86 -#define RADIO_2056_RX_RXSPARE13 0x87 -#define RADIO_2056_RX_RXSPARE14 0x88 -#define RADIO_2056_RX_RXSPARE15 0x89 -#define RADIO_2056_RX_RXSPARE16 0x8a -#define RADIO_2056_RX_STATUS_LNAA_GAIN 0x8b -#define RADIO_2056_RX_STATUS_LNAG_GAIN 0x8c -#define RADIO_2056_RX_STATUS_MIXTIA_GAIN 0x8d -#define RADIO_2056_RX_STATUS_RXLPF_GAIN 0x8e -#define RADIO_2056_RX_STATUS_VGA_BUF_GAIN 0x8f -#define RADIO_2056_RX_STATUS_RXLPF_Q 0x90 -#define RADIO_2056_RX_STATUS_RXLPF_BUF_BW 0x91 -#define RADIO_2056_RX_STATUS_RXLPF_VGA_HPC 0x92 -#define RADIO_2056_RX_STATUS_RXLPF_RC 0x93 -#define RADIO_2056_RX_STATUS_HPC_RC 0x94 - -#define RADIO_2056_LNA1_A_PU 0x01 -#define RADIO_2056_LNA2_A_PU 0x02 -#define RADIO_2056_LNA1_G_PU 0x01 -#define RADIO_2056_LNA2_G_PU 0x02 -#define RADIO_2056_MIXA_PU_I 0x01 -#define RADIO_2056_MIXA_PU_Q 0x02 -#define RADIO_2056_MIXA_PU_GM 0x10 -#define RADIO_2056_MIXG_PU_I 0x01 -#define RADIO_2056_MIXG_PU_Q 0x02 -#define RADIO_2056_MIXG_PU_GM 0x10 -#define RADIO_2056_TIA_PU 0x01 -#define RADIO_2056_BB_LPF_PU 0x20 -#define RADIO_2056_W1_PU 0x02 -#define RADIO_2056_W2_PU 0x04 -#define RADIO_2056_NB_PU 0x08 -#define RADIO_2056_RSSI_W1_SEL 0x02 -#define RADIO_2056_RSSI_W2_SEL 0x04 -#define RADIO_2056_RSSI_NB_SEL 0x08 -#define RADIO_2056_VCM_MASK 0x1c -#define RADIO_2056_RSSI_VCM_SHIFT 0x02 - -#define RADIO_2057_DACBUF_VINCM_CORE0 0x0 -#define RADIO_2057_IDCODE 0x1 -#define RADIO_2057_RCCAL_MASTER 0x2 -#define RADIO_2057_RCCAL_CAP_SIZE 0x3 -#define RADIO_2057_RCAL_CONFIG 0x4 -#define RADIO_2057_GPAIO_CONFIG 0x5 -#define RADIO_2057_GPAIO_SEL1 0x6 -#define RADIO_2057_GPAIO_SEL0 0x7 -#define RADIO_2057_CLPO_CONFIG 0x8 -#define RADIO_2057_BANDGAP_CONFIG 0x9 -#define RADIO_2057_BANDGAP_RCAL_TRIM 0xa -#define RADIO_2057_AFEREG_CONFIG 0xb -#define RADIO_2057_TEMPSENSE_CONFIG 0xc -#define RADIO_2057_XTAL_CONFIG1 0xd -#define RADIO_2057_XTAL_ICORE_SIZE 0xe -#define RADIO_2057_XTAL_BUF_SIZE 0xf -#define RADIO_2057_XTAL_PULLCAP_SIZE 0x10 -#define RADIO_2057_RFPLL_MASTER 0x11 -#define RADIO_2057_VCOMONITOR_VTH_L 0x12 -#define RADIO_2057_VCOMONITOR_VTH_H 0x13 -#define RADIO_2057_VCOCAL_BIASRESET_RFPLLREG_VOUT 0x14 -#define RADIO_2057_VCO_VARCSIZE_IDAC 0x15 -#define RADIO_2057_VCOCAL_COUNTVAL0 0x16 -#define RADIO_2057_VCOCAL_COUNTVAL1 0x17 -#define RADIO_2057_VCOCAL_INTCLK_COUNT 0x18 -#define RADIO_2057_VCOCAL_MASTER 0x19 -#define RADIO_2057_VCOCAL_NUMCAPCHANGE 0x1a -#define RADIO_2057_VCOCAL_WINSIZE 0x1b -#define RADIO_2057_VCOCAL_DELAY_AFTER_REFRESH 0x1c -#define RADIO_2057_VCOCAL_DELAY_AFTER_CLOSELOOP 0x1d -#define RADIO_2057_VCOCAL_DELAY_AFTER_OPENLOOP 0x1e -#define RADIO_2057_VCOCAL_DELAY_BEFORE_OPENLOOP 0x1f -#define RADIO_2057_VCO_FORCECAPEN_FORCECAP1 0x20 -#define RADIO_2057_VCO_FORCECAP0 0x21 -#define RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE 0x22 -#define RADIO_2057_RFPLL_PFD_RESET_PW 0x23 -#define RADIO_2057_RFPLL_LOOPFILTER_R2 0x24 -#define RADIO_2057_RFPLL_LOOPFILTER_R1 0x25 -#define RADIO_2057_RFPLL_LOOPFILTER_C3 0x26 -#define RADIO_2057_RFPLL_LOOPFILTER_C2 0x27 -#define RADIO_2057_RFPLL_LOOPFILTER_C1 0x28 -#define RADIO_2057_CP_KPD_IDAC 0x29 -#define RADIO_2057_RFPLL_IDACS 0x2a -#define RADIO_2057_RFPLL_MISC_EN 0x2b -#define RADIO_2057_RFPLL_MMD0 0x2c -#define RADIO_2057_RFPLL_MMD1 0x2d -#define RADIO_2057_RFPLL_MISC_CAL_RESETN 0x2e -#define RADIO_2057_JTAGXTAL_SIZE_CPBIAS_FILTRES 0x2f -#define RADIO_2057_VCO_ALCREF_BBPLLXTAL_SIZE 0x30 -#define RADIO_2057_VCOCAL_READCAP0 0x31 -#define RADIO_2057_VCOCAL_READCAP1 0x32 -#define RADIO_2057_VCOCAL_STATUS 0x33 -#define RADIO_2057_LOGEN_PUS 0x34 -#define RADIO_2057_LOGEN_PTAT_RESETS 0x35 -#define RADIO_2057_VCOBUF_IDACS 0x36 -#define RADIO_2057_VCOBUF_TUNE 0x37 -#define RADIO_2057_CMOSBUF_TX2GQ_IDACS 0x38 -#define RADIO_2057_CMOSBUF_TX2GI_IDACS 0x39 -#define RADIO_2057_CMOSBUF_TX5GQ_IDACS 0x3a -#define RADIO_2057_CMOSBUF_TX5GI_IDACS 0x3b -#define RADIO_2057_CMOSBUF_RX2GQ_IDACS 0x3c -#define RADIO_2057_CMOSBUF_RX2GI_IDACS 0x3d -#define RADIO_2057_CMOSBUF_RX5GQ_IDACS 0x3e -#define RADIO_2057_CMOSBUF_RX5GI_IDACS 0x3f -#define RADIO_2057_LOGEN_MX2G_IDACS 0x40 -#define RADIO_2057_LOGEN_MX2G_TUNE 0x41 -#define RADIO_2057_LOGEN_MX5G_IDACS 0x42 -#define RADIO_2057_LOGEN_MX5G_TUNE 0x43 -#define RADIO_2057_LOGEN_MX5G_RCCR 0x44 -#define RADIO_2057_LOGEN_INDBUF2G_IDAC 0x45 -#define RADIO_2057_LOGEN_INDBUF2G_IBOOST 0x46 -#define RADIO_2057_LOGEN_INDBUF2G_TUNE 0x47 -#define RADIO_2057_LOGEN_INDBUF5G_IDAC 0x48 -#define RADIO_2057_LOGEN_INDBUF5G_IBOOST 0x49 -#define RADIO_2057_LOGEN_INDBUF5G_TUNE 0x4a -#define RADIO_2057_CMOSBUF_TX_RCCR 0x4b -#define RADIO_2057_CMOSBUF_RX_RCCR 0x4c -#define RADIO_2057_LOGEN_SEL_PKDET 0x4d -#define RADIO_2057_CMOSBUF_SHAREIQ_PTAT 0x4e -#define RADIO_2057_RXTXBIAS_CONFIG_CORE0 0x4f -#define RADIO_2057_TXGM_TXRF_PUS_CORE0 0x50 -#define RADIO_2057_TXGM_IDAC_BLEED_CORE0 0x51 -#define RADIO_2057_TXGM_GAIN_CORE0 0x56 -#define RADIO_2057_TXGM2G_PKDET_PUS_CORE0 0x57 -#define RADIO_2057_PAD2G_PTATS_CORE0 0x58 -#define RADIO_2057_PAD2G_IDACS_CORE0 0x59 -#define RADIO_2057_PAD2G_BOOST_PU_CORE0 0x5a -#define RADIO_2057_PAD2G_CASCV_GAIN_CORE0 0x5b -#define RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0 0x5c -#define RADIO_2057_TXMIX2G_LODC_CORE0 0x5d -#define RADIO_2057_PAD2G_TUNE_PUS_CORE0 0x5e -#define RADIO_2057_IPA2G_GAIN_CORE0 0x5f -#define RADIO_2057_TSSI2G_SPARE1_CORE0 0x60 -#define RADIO_2057_TSSI2G_SPARE2_CORE0 0x61 -#define RADIO_2057_IPA2G_TUNEV_CASCV_PTAT_CORE0 0x62 -#define RADIO_2057_IPA2G_IMAIN_CORE0 0x63 -#define RADIO_2057_IPA2G_CASCONV_CORE0 0x64 -#define RADIO_2057_IPA2G_CASCOFFV_CORE0 0x65 -#define RADIO_2057_IPA2G_BIAS_FILTER_CORE0 0x66 -#define RADIO_2057_TX5G_PKDET_CORE0 0x69 -#define RADIO_2057_PGA_PTAT_TXGM5G_PU_CORE0 0x6a -#define RADIO_2057_PAD5G_PTATS1_CORE0 0x6b -#define RADIO_2057_PAD5G_CLASS_PTATS2_CORE0 0x6c -#define RADIO_2057_PGA_BOOSTPTAT_IMAIN_CORE0 0x6d -#define RADIO_2057_PAD5G_CASCV_IMAIN_CORE0 0x6e -#define RADIO_2057_TXMIX5G_IBOOST_PAD_IAUX_CORE0 0x6f -#define RADIO_2057_PGA_BOOST_TUNE_CORE0 0x70 -#define RADIO_2057_PGA_GAIN_CORE0 0x71 -#define RADIO_2057_PAD5G_CASCOFFV_GAIN_PUS_CORE0 0x72 -#define RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0 0x73 -#define RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0 0x74 -#define RADIO_2057_IPA5G_IAUX_CORE0 0x75 -#define RADIO_2057_IPA5G_GAIN_CORE0 0x76 -#define RADIO_2057_TSSI5G_SPARE1_CORE0 0x77 -#define RADIO_2057_TSSI5G_SPARE2_CORE0 0x78 -#define RADIO_2057_IPA5G_CASCOFFV_PU_CORE0 0x79 -#define RADIO_2057_IPA5G_PTAT_CORE0 0x7a -#define RADIO_2057_IPA5G_IMAIN_CORE0 0x7b -#define RADIO_2057_IPA5G_CASCONV_CORE0 0x7c -#define RADIO_2057_IPA5G_BIAS_FILTER_CORE0 0x7d -#define RADIO_2057_PAD_BIAS_FILTER_BWS_CORE0 0x80 -#define RADIO_2057_TR2G_CONFIG1_CORE0_NU 0x81 -#define RADIO_2057_TR2G_CONFIG2_CORE0_NU 0x82 -#define RADIO_2057_LNA5G_RFEN_CORE0 0x83 -#define RADIO_2057_TR5G_CONFIG2_CORE0_NU 0x84 -#define RADIO_2057_RXRFBIAS_IBOOST_PU_CORE0 0x85 -#define RADIO_2057_RXRF_IABAND_RXGM_IMAIN_PTAT_CORE0 0x86 -#define RADIO_2057_RXGM_CMFBITAIL_AUXPTAT_CORE0 0x87 -#define RADIO_2057_RXMIX_ICORE_RXGM_IAUX_CORE0 0x88 -#define RADIO_2057_RXMIX_CMFBITAIL_PU_CORE0 0x89 -#define RADIO_2057_LNA2_IMAIN_PTAT_PU_CORE0 0x8a -#define RADIO_2057_LNA2_IAUX_PTAT_CORE0 0x8b -#define RADIO_2057_LNA1_IMAIN_PTAT_PU_CORE0 0x8c -#define RADIO_2057_LNA15G_INPUT_MATCH_TUNE_CORE0 0x8d -#define RADIO_2057_RXRFBIAS_BANDSEL_CORE0 0x8e -#define RADIO_2057_TIA_CONFIG_CORE0 0x8f -#define RADIO_2057_TIA_IQGAIN_CORE0 0x90 -#define RADIO_2057_TIA_IBIAS2_CORE0 0x91 -#define RADIO_2057_TIA_IBIAS1_CORE0 0x92 -#define RADIO_2057_TIA_SPARE_Q_CORE0 0x93 -#define RADIO_2057_TIA_SPARE_I_CORE0 0x94 -#define RADIO_2057_RXMIX2G_PUS_CORE0 0x95 -#define RADIO_2057_RXMIX2G_VCMREFS_CORE0 0x96 -#define RADIO_2057_RXMIX2G_LODC_QI_CORE0 0x97 -#define RADIO_2057_W12G_BW_LNA2G_PUS_CORE0 0x98 -#define RADIO_2057_LNA2G_GAIN_CORE0 0x99 -#define RADIO_2057_LNA2G_TUNE_CORE0 0x9a -#define RADIO_2057_RXMIX5G_PUS_CORE0 0x9b -#define RADIO_2057_RXMIX5G_VCMREFS_CORE0 0x9c -#define RADIO_2057_RXMIX5G_LODC_QI_CORE0 0x9d -#define RADIO_2057_W15G_BW_LNA5G_PUS_CORE0 0x9e -#define RADIO_2057_LNA5G_GAIN_CORE0 0x9f -#define RADIO_2057_LNA5G_TUNE_CORE0 0xa0 -#define RADIO_2057_LPFSEL_TXRX_RXBB_PUS_CORE0 0xa1 -#define RADIO_2057_RXBB_BIAS_MASTER_CORE0 0xa2 -#define RADIO_2057_RXBB_VGABUF_IDACS_CORE0 0xa3 -#define RADIO_2057_LPF_VCMREF_TXBUF_VCMREF_CORE0 0xa4 -#define RADIO_2057_TXBUF_VINCM_CORE0 0xa5 -#define RADIO_2057_TXBUF_IDACS_CORE0 0xa6 -#define RADIO_2057_LPF_RESP_RXBUF_BW_CORE0 0xa7 -#define RADIO_2057_RXBB_CC_CORE0 0xa8 -#define RADIO_2057_RXBB_SPARE3_CORE0 0xa9 -#define RADIO_2057_RXBB_RCCAL_HPC_CORE0 0xaa -#define RADIO_2057_LPF_IDACS_CORE0 0xab -#define RADIO_2057_LPFBYP_DCLOOP_BYP_IDAC_CORE0 0xac -#define RADIO_2057_TXBUF_GAIN_CORE0 0xad -#define RADIO_2057_AFELOOPBACK_AACI_RESP_CORE0 0xae -#define RADIO_2057_RXBUF_DEGEN_CORE0 0xaf -#define RADIO_2057_RXBB_SPARE2_CORE0 0xb0 -#define RADIO_2057_RXBB_SPARE1_CORE0 0xb1 -#define RADIO_2057_RSSI_MASTER_CORE0 0xb2 -#define RADIO_2057_W2_MASTER_CORE0 0xb3 -#define RADIO_2057_NB_MASTER_CORE0 0xb4 -#define RADIO_2057_W2_IDACS0_Q_CORE0 0xb5 -#define RADIO_2057_W2_IDACS1_Q_CORE0 0xb6 -#define RADIO_2057_W2_IDACS0_I_CORE0 0xb7 -#define RADIO_2057_W2_IDACS1_I_CORE0 0xb8 -#define RADIO_2057_RSSI_GPAIOSEL_W1_IDACS_CORE0 0xb9 -#define RADIO_2057_NB_IDACS_Q_CORE0 0xba -#define RADIO_2057_NB_IDACS_I_CORE0 0xbb -#define RADIO_2057_BACKUP4_CORE0 0xc1 -#define RADIO_2057_BACKUP3_CORE0 0xc2 -#define RADIO_2057_BACKUP2_CORE0 0xc3 -#define RADIO_2057_BACKUP1_CORE0 0xc4 -#define RADIO_2057_SPARE16_CORE0 0xc5 -#define RADIO_2057_SPARE15_CORE0 0xc6 -#define RADIO_2057_SPARE14_CORE0 0xc7 -#define RADIO_2057_SPARE13_CORE0 0xc8 -#define RADIO_2057_SPARE12_CORE0 0xc9 -#define RADIO_2057_SPARE11_CORE0 0xca -#define RADIO_2057_TX2G_BIAS_RESETS_CORE0 0xcb -#define RADIO_2057_TX5G_BIAS_RESETS_CORE0 0xcc -#define RADIO_2057_IQTEST_SEL_PU 0xcd -#define RADIO_2057_XTAL_CONFIG2 0xce -#define RADIO_2057_BUFS_MISC_LPFBW_CORE0 0xcf -#define RADIO_2057_TXLPF_RCCAL_CORE0 0xd0 -#define RADIO_2057_RXBB_GPAIOSEL_RXLPF_RCCAL_CORE0 0xd1 -#define RADIO_2057_LPF_GAIN_CORE0 0xd2 -#define RADIO_2057_DACBUF_IDACS_BW_CORE0 0xd3 -#define RADIO_2057_RXTXBIAS_CONFIG_CORE1 0xd4 -#define RADIO_2057_TXGM_TXRF_PUS_CORE1 0xd5 -#define RADIO_2057_TXGM_IDAC_BLEED_CORE1 0xd6 -#define RADIO_2057_TXGM_GAIN_CORE1 0xdb -#define RADIO_2057_TXGM2G_PKDET_PUS_CORE1 0xdc -#define RADIO_2057_PAD2G_PTATS_CORE1 0xdd -#define RADIO_2057_PAD2G_IDACS_CORE1 0xde -#define RADIO_2057_PAD2G_BOOST_PU_CORE1 0xdf -#define RADIO_2057_PAD2G_CASCV_GAIN_CORE1 0xe0 -#define RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1 0xe1 -#define RADIO_2057_TXMIX2G_LODC_CORE1 0xe2 -#define RADIO_2057_PAD2G_TUNE_PUS_CORE1 0xe3 -#define RADIO_2057_IPA2G_GAIN_CORE1 0xe4 -#define RADIO_2057_TSSI2G_SPARE1_CORE1 0xe5 -#define RADIO_2057_TSSI2G_SPARE2_CORE1 0xe6 -#define RADIO_2057_IPA2G_TUNEV_CASCV_PTAT_CORE1 0xe7 -#define RADIO_2057_IPA2G_IMAIN_CORE1 0xe8 -#define RADIO_2057_IPA2G_CASCONV_CORE1 0xe9 -#define RADIO_2057_IPA2G_CASCOFFV_CORE1 0xea -#define RADIO_2057_IPA2G_BIAS_FILTER_CORE1 0xeb -#define RADIO_2057_TX5G_PKDET_CORE1 0xee -#define RADIO_2057_PGA_PTAT_TXGM5G_PU_CORE1 0xef -#define RADIO_2057_PAD5G_PTATS1_CORE1 0xf0 -#define RADIO_2057_PAD5G_CLASS_PTATS2_CORE1 0xf1 -#define RADIO_2057_PGA_BOOSTPTAT_IMAIN_CORE1 0xf2 -#define RADIO_2057_PAD5G_CASCV_IMAIN_CORE1 0xf3 -#define RADIO_2057_TXMIX5G_IBOOST_PAD_IAUX_CORE1 0xf4 -#define RADIO_2057_PGA_BOOST_TUNE_CORE1 0xf5 -#define RADIO_2057_PGA_GAIN_CORE1 0xf6 -#define RADIO_2057_PAD5G_CASCOFFV_GAIN_PUS_CORE1 0xf7 -#define RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1 0xf8 -#define RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1 0xf9 -#define RADIO_2057_IPA5G_IAUX_CORE1 0xfa -#define RADIO_2057_IPA5G_GAIN_CORE1 0xfb -#define RADIO_2057_TSSI5G_SPARE1_CORE1 0xfc -#define RADIO_2057_TSSI5G_SPARE2_CORE1 0xfd -#define RADIO_2057_IPA5G_CASCOFFV_PU_CORE1 0xfe -#define RADIO_2057_IPA5G_PTAT_CORE1 0xff -#define RADIO_2057_IPA5G_IMAIN_CORE1 0x100 -#define RADIO_2057_IPA5G_CASCONV_CORE1 0x101 -#define RADIO_2057_IPA5G_BIAS_FILTER_CORE1 0x102 -#define RADIO_2057_PAD_BIAS_FILTER_BWS_CORE1 0x105 -#define RADIO_2057_TR2G_CONFIG1_CORE1_NU 0x106 -#define RADIO_2057_TR2G_CONFIG2_CORE1_NU 0x107 -#define RADIO_2057_LNA5G_RFEN_CORE1 0x108 -#define RADIO_2057_TR5G_CONFIG2_CORE1_NU 0x109 -#define RADIO_2057_RXRFBIAS_IBOOST_PU_CORE1 0x10a -#define RADIO_2057_RXRF_IABAND_RXGM_IMAIN_PTAT_CORE1 0x10b -#define RADIO_2057_RXGM_CMFBITAIL_AUXPTAT_CORE1 0x10c -#define RADIO_2057_RXMIX_ICORE_RXGM_IAUX_CORE1 0x10d -#define RADIO_2057_RXMIX_CMFBITAIL_PU_CORE1 0x10e -#define RADIO_2057_LNA2_IMAIN_PTAT_PU_CORE1 0x10f -#define RADIO_2057_LNA2_IAUX_PTAT_CORE1 0x110 -#define RADIO_2057_LNA1_IMAIN_PTAT_PU_CORE1 0x111 -#define RADIO_2057_LNA15G_INPUT_MATCH_TUNE_CORE1 0x112 -#define RADIO_2057_RXRFBIAS_BANDSEL_CORE1 0x113 -#define RADIO_2057_TIA_CONFIG_CORE1 0x114 -#define RADIO_2057_TIA_IQGAIN_CORE1 0x115 -#define RADIO_2057_TIA_IBIAS2_CORE1 0x116 -#define RADIO_2057_TIA_IBIAS1_CORE1 0x117 -#define RADIO_2057_TIA_SPARE_Q_CORE1 0x118 -#define RADIO_2057_TIA_SPARE_I_CORE1 0x119 -#define RADIO_2057_RXMIX2G_PUS_CORE1 0x11a -#define RADIO_2057_RXMIX2G_VCMREFS_CORE1 0x11b -#define RADIO_2057_RXMIX2G_LODC_QI_CORE1 0x11c -#define RADIO_2057_W12G_BW_LNA2G_PUS_CORE1 0x11d -#define RADIO_2057_LNA2G_GAIN_CORE1 0x11e -#define RADIO_2057_LNA2G_TUNE_CORE1 0x11f -#define RADIO_2057_RXMIX5G_PUS_CORE1 0x120 -#define RADIO_2057_RXMIX5G_VCMREFS_CORE1 0x121 -#define RADIO_2057_RXMIX5G_LODC_QI_CORE1 0x122 -#define RADIO_2057_W15G_BW_LNA5G_PUS_CORE1 0x123 -#define RADIO_2057_LNA5G_GAIN_CORE1 0x124 -#define RADIO_2057_LNA5G_TUNE_CORE1 0x125 -#define RADIO_2057_LPFSEL_TXRX_RXBB_PUS_CORE1 0x126 -#define RADIO_2057_RXBB_BIAS_MASTER_CORE1 0x127 -#define RADIO_2057_RXBB_VGABUF_IDACS_CORE1 0x128 -#define RADIO_2057_LPF_VCMREF_TXBUF_VCMREF_CORE1 0x129 -#define RADIO_2057_TXBUF_VINCM_CORE1 0x12a -#define RADIO_2057_TXBUF_IDACS_CORE1 0x12b -#define RADIO_2057_LPF_RESP_RXBUF_BW_CORE1 0x12c -#define RADIO_2057_RXBB_CC_CORE1 0x12d -#define RADIO_2057_RXBB_SPARE3_CORE1 0x12e -#define RADIO_2057_RXBB_RCCAL_HPC_CORE1 0x12f -#define RADIO_2057_LPF_IDACS_CORE1 0x130 -#define RADIO_2057_LPFBYP_DCLOOP_BYP_IDAC_CORE1 0x131 -#define RADIO_2057_TXBUF_GAIN_CORE1 0x132 -#define RADIO_2057_AFELOOPBACK_AACI_RESP_CORE1 0x133 -#define RADIO_2057_RXBUF_DEGEN_CORE1 0x134 -#define RADIO_2057_RXBB_SPARE2_CORE1 0x135 -#define RADIO_2057_RXBB_SPARE1_CORE1 0x136 -#define RADIO_2057_RSSI_MASTER_CORE1 0x137 -#define RADIO_2057_W2_MASTER_CORE1 0x138 -#define RADIO_2057_NB_MASTER_CORE1 0x139 -#define RADIO_2057_W2_IDACS0_Q_CORE1 0x13a -#define RADIO_2057_W2_IDACS1_Q_CORE1 0x13b -#define RADIO_2057_W2_IDACS0_I_CORE1 0x13c -#define RADIO_2057_W2_IDACS1_I_CORE1 0x13d -#define RADIO_2057_RSSI_GPAIOSEL_W1_IDACS_CORE1 0x13e -#define RADIO_2057_NB_IDACS_Q_CORE1 0x13f -#define RADIO_2057_NB_IDACS_I_CORE1 0x140 -#define RADIO_2057_BACKUP4_CORE1 0x146 -#define RADIO_2057_BACKUP3_CORE1 0x147 -#define RADIO_2057_BACKUP2_CORE1 0x148 -#define RADIO_2057_BACKUP1_CORE1 0x149 -#define RADIO_2057_SPARE16_CORE1 0x14a -#define RADIO_2057_SPARE15_CORE1 0x14b -#define RADIO_2057_SPARE14_CORE1 0x14c -#define RADIO_2057_SPARE13_CORE1 0x14d -#define RADIO_2057_SPARE12_CORE1 0x14e -#define RADIO_2057_SPARE11_CORE1 0x14f -#define RADIO_2057_TX2G_BIAS_RESETS_CORE1 0x150 -#define RADIO_2057_TX5G_BIAS_RESETS_CORE1 0x151 -#define RADIO_2057_SPARE8_CORE1 0x152 -#define RADIO_2057_SPARE7_CORE1 0x153 -#define RADIO_2057_BUFS_MISC_LPFBW_CORE1 0x154 -#define RADIO_2057_TXLPF_RCCAL_CORE1 0x155 -#define RADIO_2057_RXBB_GPAIOSEL_RXLPF_RCCAL_CORE1 0x156 -#define RADIO_2057_LPF_GAIN_CORE1 0x157 -#define RADIO_2057_DACBUF_IDACS_BW_CORE1 0x158 -#define RADIO_2057_DACBUF_VINCM_CORE1 0x159 -#define RADIO_2057_RCCAL_START_R1_Q1_P1 0x15a -#define RADIO_2057_RCCAL_X1 0x15b -#define RADIO_2057_RCCAL_TRC0 0x15c -#define RADIO_2057_RCCAL_TRC1 0x15d -#define RADIO_2057_RCCAL_DONE_OSCCAP 0x15e -#define RADIO_2057_RCCAL_N0_0 0x15f -#define RADIO_2057_RCCAL_N0_1 0x160 -#define RADIO_2057_RCCAL_N1_0 0x161 -#define RADIO_2057_RCCAL_N1_1 0x162 -#define RADIO_2057_RCAL_STATUS 0x163 -#define RADIO_2057_XTALPUOVR_PINCTRL 0x164 -#define RADIO_2057_OVR_REG0 0x165 -#define RADIO_2057_OVR_REG1 0x166 -#define RADIO_2057_OVR_REG2 0x167 -#define RADIO_2057_OVR_REG3 0x168 -#define RADIO_2057_OVR_REG4 0x169 -#define RADIO_2057_RCCAL_SCAP_VAL 0x16a -#define RADIO_2057_RCCAL_BCAP_VAL 0x16b -#define RADIO_2057_RCCAL_HPC_VAL 0x16c -#define RADIO_2057_RCCAL_OVERRIDES 0x16d -#define RADIO_2057_TX0_IQCAL_GAIN_BW 0x170 -#define RADIO_2057_TX0_LOFT_FINE_I 0x171 -#define RADIO_2057_TX0_LOFT_FINE_Q 0x172 -#define RADIO_2057_TX0_LOFT_COARSE_I 0x173 -#define RADIO_2057_TX0_LOFT_COARSE_Q 0x174 -#define RADIO_2057_TX0_TX_SSI_MASTER 0x175 -#define RADIO_2057_TX0_IQCAL_VCM_HG 0x176 -#define RADIO_2057_TX0_IQCAL_IDAC 0x177 -#define RADIO_2057_TX0_TSSI_VCM 0x178 -#define RADIO_2057_TX0_TX_SSI_MUX 0x179 -#define RADIO_2057_TX0_TSSIA 0x17a -#define RADIO_2057_TX0_TSSIG 0x17b -#define RADIO_2057_TX0_TSSI_MISC1 0x17c -#define RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN 0x17d -#define RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP 0x17e -#define RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN 0x17f -#define RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP 0x180 -#define RADIO_2057_TX1_IQCAL_GAIN_BW 0x190 -#define RADIO_2057_TX1_LOFT_FINE_I 0x191 -#define RADIO_2057_TX1_LOFT_FINE_Q 0x192 -#define RADIO_2057_TX1_LOFT_COARSE_I 0x193 -#define RADIO_2057_TX1_LOFT_COARSE_Q 0x194 -#define RADIO_2057_TX1_TX_SSI_MASTER 0x195 -#define RADIO_2057_TX1_IQCAL_VCM_HG 0x196 -#define RADIO_2057_TX1_IQCAL_IDAC 0x197 -#define RADIO_2057_TX1_TSSI_VCM 0x198 -#define RADIO_2057_TX1_TX_SSI_MUX 0x199 -#define RADIO_2057_TX1_TSSIA 0x19a -#define RADIO_2057_TX1_TSSIG 0x19b -#define RADIO_2057_TX1_TSSI_MISC1 0x19c -#define RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN 0x19d -#define RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP 0x19e -#define RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN 0x19f -#define RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP 0x1a0 -#define RADIO_2057_AFE_VCM_CAL_MASTER_CORE0 0x1a1 -#define RADIO_2057_AFE_SET_VCM_I_CORE0 0x1a2 -#define RADIO_2057_AFE_SET_VCM_Q_CORE0 0x1a3 -#define RADIO_2057_AFE_STATUS_VCM_IQADC_CORE0 0x1a4 -#define RADIO_2057_AFE_STATUS_VCM_I_CORE0 0x1a5 -#define RADIO_2057_AFE_STATUS_VCM_Q_CORE0 0x1a6 -#define RADIO_2057_AFE_VCM_CAL_MASTER_CORE1 0x1a7 -#define RADIO_2057_AFE_SET_VCM_I_CORE1 0x1a8 -#define RADIO_2057_AFE_SET_VCM_Q_CORE1 0x1a9 -#define RADIO_2057_AFE_STATUS_VCM_IQADC_CORE1 0x1aa -#define RADIO_2057_AFE_STATUS_VCM_I_CORE1 0x1ab -#define RADIO_2057_AFE_STATUS_VCM_Q_CORE1 0x1ac - -#define RADIO_2057v7_DACBUF_VINCM_CORE0 0x1ad -#define RADIO_2057v7_RCCAL_MASTER 0x1ae -#define RADIO_2057v7_TR2G_CONFIG3_CORE0_NU 0x1af -#define RADIO_2057v7_TR2G_CONFIG3_CORE1_NU 0x1b0 -#define RADIO_2057v7_LOGEN_PUS1 0x1b1 -#define RADIO_2057v7_OVR_REG5 0x1b2 -#define RADIO_2057v7_OVR_REG6 0x1b3 -#define RADIO_2057v7_OVR_REG7 0x1b4 -#define RADIO_2057v7_OVR_REG8 0x1b5 -#define RADIO_2057v7_OVR_REG9 0x1b6 -#define RADIO_2057v7_OVR_REG10 0x1b7 -#define RADIO_2057v7_OVR_REG11 0x1b8 -#define RADIO_2057v7_OVR_REG12 0x1b9 -#define RADIO_2057v7_OVR_REG13 0x1ba -#define RADIO_2057v7_OVR_REG14 0x1bb -#define RADIO_2057v7_OVR_REG15 0x1bc -#define RADIO_2057v7_OVR_REG16 0x1bd -#define RADIO_2057v7_OVR_REG1 0x1be -#define RADIO_2057v7_OVR_REG18 0x1bf -#define RADIO_2057v7_OVR_REG19 0x1c0 -#define RADIO_2057v7_OVR_REG20 0x1c1 -#define RADIO_2057v7_OVR_REG21 0x1c2 -#define RADIO_2057v7_OVR_REG2 0x1c3 -#define RADIO_2057v7_OVR_REG23 0x1c4 -#define RADIO_2057v7_OVR_REG24 0x1c5 -#define RADIO_2057v7_OVR_REG25 0x1c6 -#define RADIO_2057v7_OVR_REG26 0x1c7 -#define RADIO_2057v7_OVR_REG27 0x1c8 -#define RADIO_2057v7_OVR_REG28 0x1c9 -#define RADIO_2057v7_IQTEST_SEL_PU2 0x1ca - -#define RADIO_2057_VCM_MASK 0x7 - -#endif /* _BRCM_PHY_RADIO_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h deleted file mode 100644 index 211bc3a..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#define NPHY_TBL_ID_GAIN1 0 -#define NPHY_TBL_ID_GAIN2 1 -#define NPHY_TBL_ID_GAINBITS1 2 -#define NPHY_TBL_ID_GAINBITS2 3 -#define NPHY_TBL_ID_GAINLIMIT 4 -#define NPHY_TBL_ID_WRSSIGainLimit 5 -#define NPHY_TBL_ID_RFSEQ 7 -#define NPHY_TBL_ID_AFECTRL 8 -#define NPHY_TBL_ID_ANTSWCTRLLUT 9 -#define NPHY_TBL_ID_IQLOCAL 15 -#define NPHY_TBL_ID_NOISEVAR 16 -#define NPHY_TBL_ID_SAMPLEPLAY 17 -#define NPHY_TBL_ID_CORE1TXPWRCTL 26 -#define NPHY_TBL_ID_CORE2TXPWRCTL 27 -#define NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL 30 - -#define NPHY_TBL_ID_EPSILONTBL0 31 -#define NPHY_TBL_ID_SCALARTBL0 32 -#define NPHY_TBL_ID_EPSILONTBL1 33 -#define NPHY_TBL_ID_SCALARTBL1 34 - -#define NPHY_TO_BPHY_OFF 0xc00 - -#define NPHY_BandControl_currentBand 0x0001 -#define RFCC_CHIP0_PU 0x0400 -#define RFCC_POR_FORCE 0x0040 -#define RFCC_OE_POR_FORCE 0x0080 -#define NPHY_RfctrlIntc_override_OFF 0 -#define NPHY_RfctrlIntc_override_TRSW 1 -#define NPHY_RfctrlIntc_override_PA 2 -#define NPHY_RfctrlIntc_override_EXT_LNA_PU 3 -#define NPHY_RfctrlIntc_override_EXT_LNA_GAIN 4 -#define RIFS_ENABLE 0x80 -#define BPHY_BAND_SEL_UP20 0x10 -#define NPHY_MLenable 0x02 - -#define NPHY_RfseqMode_CoreActv_override 0x0001 -#define NPHY_RfseqMode_Trigger_override 0x0002 -#define NPHY_RfseqCoreActv_TxRxChain0 (0x11) -#define NPHY_RfseqCoreActv_TxRxChain1 (0x22) - -#define NPHY_RfseqTrigger_rx2tx 0x0001 -#define NPHY_RfseqTrigger_tx2rx 0x0002 -#define NPHY_RfseqTrigger_updategainh 0x0004 -#define NPHY_RfseqTrigger_updategainl 0x0008 -#define NPHY_RfseqTrigger_updategainu 0x0010 -#define NPHY_RfseqTrigger_reset2rx 0x0020 -#define NPHY_RfseqStatus_rx2tx 0x0001 -#define NPHY_RfseqStatus_tx2rx 0x0002 -#define NPHY_RfseqStatus_updategainh 0x0004 -#define NPHY_RfseqStatus_updategainl 0x0008 -#define NPHY_RfseqStatus_updategainu 0x0010 -#define NPHY_RfseqStatus_reset2rx 0x0020 -#define NPHY_ClassifierCtrl_cck_en 0x1 -#define NPHY_ClassifierCtrl_ofdm_en 0x2 -#define NPHY_ClassifierCtrl_waited_en 0x4 -#define NPHY_IQFlip_ADC1 0x0001 -#define NPHY_IQFlip_ADC2 0x0010 -#define NPHY_sampleCmd_STOP 0x0002 - -#define RX_GF_OR_MM 0x0004 -#define RX_GF_MM_AUTO 0x0100 - -#define NPHY_iqloCalCmdGctl_IQLO_CAL_EN 0x8000 - -#define NPHY_IqestCmd_iqstart 0x1 -#define NPHY_IqestCmd_iqMode 0x2 - -#define NPHY_TxPwrCtrlCmd_pwrIndex_init 0x40 -#define NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 0x19 - -#define PRIM_SEL_UP20 0x8000 - -#define NPHY_RFSEQ_RX2TX 0x0 -#define NPHY_RFSEQ_TX2RX 0x1 -#define NPHY_RFSEQ_RESET2RX 0x2 -#define NPHY_RFSEQ_UPDATEGAINH 0x3 -#define NPHY_RFSEQ_UPDATEGAINL 0x4 -#define NPHY_RFSEQ_UPDATEGAINU 0x5 - -#define NPHY_RFSEQ_CMD_NOP 0x0 -#define NPHY_RFSEQ_CMD_RXG_FBW 0x1 -#define NPHY_RFSEQ_CMD_TR_SWITCH 0x2 -#define NPHY_RFSEQ_CMD_EXT_PA 0x3 -#define NPHY_RFSEQ_CMD_RXPD_TXPD 0x4 -#define NPHY_RFSEQ_CMD_TX_GAIN 0x5 -#define NPHY_RFSEQ_CMD_RX_GAIN 0x6 -#define NPHY_RFSEQ_CMD_SET_HPF_BW 0x7 -#define NPHY_RFSEQ_CMD_CLR_HIQ_DIS 0x8 -#define NPHY_RFSEQ_CMD_END 0xf - -#define NPHY_REV3_RFSEQ_CMD_NOP 0x0 -#define NPHY_REV3_RFSEQ_CMD_RXG_FBW 0x1 -#define NPHY_REV3_RFSEQ_CMD_TR_SWITCH 0x2 -#define NPHY_REV3_RFSEQ_CMD_INT_PA_PU 0x3 -#define NPHY_REV3_RFSEQ_CMD_EXT_PA 0x4 -#define NPHY_REV3_RFSEQ_CMD_RXPD_TXPD 0x5 -#define NPHY_REV3_RFSEQ_CMD_TX_GAIN 0x6 -#define NPHY_REV3_RFSEQ_CMD_RX_GAIN 0x7 -#define NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS 0x8 -#define NPHY_REV3_RFSEQ_CMD_SET_HPF_H_HPC 0x9 -#define NPHY_REV3_RFSEQ_CMD_SET_LPF_H_HPC 0xa -#define NPHY_REV3_RFSEQ_CMD_SET_HPF_M_HPC 0xb -#define NPHY_REV3_RFSEQ_CMD_SET_LPF_M_HPC 0xc -#define NPHY_REV3_RFSEQ_CMD_SET_HPF_L_HPC 0xd -#define NPHY_REV3_RFSEQ_CMD_SET_LPF_L_HPC 0xe -#define NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS 0xf -#define NPHY_REV3_RFSEQ_CMD_END 0x1f - -#define NPHY_RSSI_SEL_W1 0x0 -#define NPHY_RSSI_SEL_W2 0x1 -#define NPHY_RSSI_SEL_NB 0x2 -#define NPHY_RSSI_SEL_IQ 0x3 -#define NPHY_RSSI_SEL_TSSI_2G 0x4 -#define NPHY_RSSI_SEL_TSSI_5G 0x5 -#define NPHY_RSSI_SEL_TBD 0x6 - -#define NPHY_RAIL_I 0x0 -#define NPHY_RAIL_Q 0x1 - -#define NPHY_FORCESIG_DECODEGATEDCLKS 0x8 - -#define NPHY_REV7_RfctrlOverride_cmd_rxrf_pu 0x0 -#define NPHY_REV7_RfctrlOverride_cmd_rx_pu 0x1 -#define NPHY_REV7_RfctrlOverride_cmd_tx_pu 0x2 -#define NPHY_REV7_RfctrlOverride_cmd_rxgain 0x3 -#define NPHY_REV7_RfctrlOverride_cmd_txgain 0x4 - -#define NPHY_REV7_RXGAINCODE_RFMXGAIN_MASK 0x000ff -#define NPHY_REV7_RXGAINCODE_LPFGAIN_MASK 0x0ff00 -#define NPHY_REV7_RXGAINCODE_DVGAGAIN_MASK 0xf0000 - -#define NPHY_REV7_TXGAINCODE_TGAIN_MASK 0x7fff -#define NPHY_REV7_TXGAINCODE_LPFGAIN_MASK 0x8000 -#define NPHY_REV7_TXGAINCODE_BIQ0GAIN_SHIFT 14 - -#define NPHY_REV7_RFCTRLOVERRIDE_ID0 0x0 -#define NPHY_REV7_RFCTRLOVERRIDE_ID1 0x1 -#define NPHY_REV7_RFCTRLOVERRIDE_ID2 0x2 - -#define NPHY_IqestIqAccLo(core) ((core == 0) ? 0x12c : 0x134) - -#define NPHY_IqestIqAccHi(core) ((core == 0) ? 0x12d : 0x135) - -#define NPHY_IqestipwrAccLo(core) ((core == 0) ? 0x12e : 0x136) - -#define NPHY_IqestipwrAccHi(core) ((core == 0) ? 0x12f : 0x137) - -#define NPHY_IqestqpwrAccLo(core) ((core == 0) ? 0x130 : 0x138) - -#define NPHY_IqestqpwrAccHi(core) ((core == 0) ? 0x131 : 0x139) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c deleted file mode 100644 index 679002e..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c +++ /dev/null @@ -1,3639 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include "bcmdma.h" -#include -#include - -const u32 dot11lcn_gain_tbl_rev0[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000004, - 0x00000000, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000d, - 0x0000004d, - 0x0000008d, - 0x0000000d, - 0x0000004d, - 0x0000008d, - 0x000000cd, - 0x0000004f, - 0x0000008f, - 0x000000cf, - 0x000000d3, - 0x00000113, - 0x00000513, - 0x00000913, - 0x00000953, - 0x00000d53, - 0x00001153, - 0x00001193, - 0x00005193, - 0x00009193, - 0x0000d193, - 0x00011193, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000004, - 0x00000000, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000d, - 0x0000004d, - 0x0000008d, - 0x0000000d, - 0x0000004d, - 0x0000008d, - 0x000000cd, - 0x0000004f, - 0x0000008f, - 0x000000cf, - 0x000000d3, - 0x00000113, - 0x00000513, - 0x00000913, - 0x00000953, - 0x00000d53, - 0x00001153, - 0x00005153, - 0x00009153, - 0x0000d153, - 0x00011153, - 0x00015153, - 0x00019153, - 0x0001d153, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 dot11lcn_gain_tbl_rev1[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000008, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000D, - 0x00000011, - 0x00000051, - 0x00000091, - 0x00000011, - 0x00000051, - 0x00000091, - 0x000000d1, - 0x00000053, - 0x00000093, - 0x000000d3, - 0x000000d7, - 0x00000117, - 0x00000517, - 0x00000917, - 0x00000957, - 0x00000d57, - 0x00001157, - 0x00001197, - 0x00005197, - 0x00009197, - 0x0000d197, - 0x00011197, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000008, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000D, - 0x00000011, - 0x00000051, - 0x00000091, - 0x00000011, - 0x00000051, - 0x00000091, - 0x000000d1, - 0x00000053, - 0x00000093, - 0x000000d3, - 0x000000d7, - 0x00000117, - 0x00000517, - 0x00000917, - 0x00000957, - 0x00000d57, - 0x00001157, - 0x00005157, - 0x00009157, - 0x0000d157, - 0x00011157, - 0x00015157, - 0x00019157, - 0x0001d157, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u16 dot11lcn_aux_gain_idx_tbl_rev0[] = { - 0x0401, - 0x0402, - 0x0403, - 0x0404, - 0x0405, - 0x0406, - 0x0407, - 0x0408, - 0x0409, - 0x040a, - 0x058b, - 0x058c, - 0x058d, - 0x058e, - 0x058f, - 0x0090, - 0x0091, - 0x0092, - 0x0193, - 0x0194, - 0x0195, - 0x0196, - 0x0197, - 0x0198, - 0x0199, - 0x019a, - 0x019b, - 0x019c, - 0x019d, - 0x019e, - 0x019f, - 0x01a0, - 0x01a1, - 0x01a2, - 0x01a3, - 0x01a4, - 0x01a5, - 0x0000, -}; - -const u32 dot11lcn_gain_idx_tbl_rev0[] = { - 0x00000000, - 0x00000000, - 0x10000000, - 0x00000000, - 0x20000000, - 0x00000000, - 0x30000000, - 0x00000000, - 0x40000000, - 0x00000000, - 0x50000000, - 0x00000000, - 0x60000000, - 0x00000000, - 0x70000000, - 0x00000000, - 0x80000000, - 0x00000000, - 0x90000000, - 0x00000008, - 0xa0000000, - 0x00000008, - 0xb0000000, - 0x00000008, - 0xc0000000, - 0x00000008, - 0xd0000000, - 0x00000008, - 0xe0000000, - 0x00000008, - 0xf0000000, - 0x00000008, - 0x00000000, - 0x00000009, - 0x10000000, - 0x00000009, - 0x20000000, - 0x00000019, - 0x30000000, - 0x00000019, - 0x40000000, - 0x00000019, - 0x50000000, - 0x00000019, - 0x60000000, - 0x00000019, - 0x70000000, - 0x00000019, - 0x80000000, - 0x00000019, - 0x90000000, - 0x00000019, - 0xa0000000, - 0x00000019, - 0xb0000000, - 0x00000019, - 0xc0000000, - 0x00000019, - 0xd0000000, - 0x00000019, - 0xe0000000, - 0x00000019, - 0xf0000000, - 0x00000019, - 0x00000000, - 0x0000001a, - 0x10000000, - 0x0000001a, - 0x20000000, - 0x0000001a, - 0x30000000, - 0x0000001a, - 0x40000000, - 0x0000001a, - 0x50000000, - 0x00000002, - 0x60000000, - 0x00000002, - 0x70000000, - 0x00000002, - 0x80000000, - 0x00000002, - 0x90000000, - 0x00000002, - 0xa0000000, - 0x00000002, - 0xb0000000, - 0x00000002, - 0xc0000000, - 0x0000000a, - 0xd0000000, - 0x0000000a, - 0xe0000000, - 0x0000000a, - 0xf0000000, - 0x0000000a, - 0x00000000, - 0x0000000b, - 0x10000000, - 0x0000000b, - 0x20000000, - 0x0000000b, - 0x30000000, - 0x0000000b, - 0x40000000, - 0x0000000b, - 0x50000000, - 0x0000001b, - 0x60000000, - 0x0000001b, - 0x70000000, - 0x0000001b, - 0x80000000, - 0x0000001b, - 0x90000000, - 0x0000001b, - 0xa0000000, - 0x0000001b, - 0xb0000000, - 0x0000001b, - 0xc0000000, - 0x0000001b, - 0xd0000000, - 0x0000001b, - 0xe0000000, - 0x0000001b, - 0xf0000000, - 0x0000001b, - 0x00000000, - 0x0000001c, - 0x10000000, - 0x0000001c, - 0x20000000, - 0x0000001c, - 0x30000000, - 0x0000001c, - 0x40000000, - 0x0000001c, - 0x50000000, - 0x0000001c, - 0x60000000, - 0x0000001c, - 0x70000000, - 0x0000001c, - 0x80000000, - 0x0000001c, - 0x90000000, - 0x0000001c, -}; - -const u16 dot11lcn_aux_gain_idx_tbl_2G[] = { - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0001, - 0x0080, - 0x0081, - 0x0100, - 0x0101, - 0x0180, - 0x0181, - 0x0182, - 0x0183, - 0x0184, - 0x0185, - 0x0186, - 0x0187, - 0x0188, - 0x0285, - 0x0289, - 0x028a, - 0x028b, - 0x028c, - 0x028d, - 0x028e, - 0x028f, - 0x0290, - 0x0291, - 0x0292, - 0x0293, - 0x0294, - 0x0295, - 0x0296, - 0x0297, - 0x0298, - 0x0299, - 0x029a, - 0x0000 -}; - -const u8 dot11lcn_gain_val_tbl_2G[] = { - 0xfc, - 0x02, - 0x08, - 0x0e, - 0x13, - 0x1b, - 0xfc, - 0x02, - 0x08, - 0x0e, - 0x13, - 0x1b, - 0xfc, - 0x00, - 0x0c, - 0x03, - 0xeb, - 0xfe, - 0x07, - 0x0b, - 0x0f, - 0xfb, - 0xfe, - 0x01, - 0x05, - 0x08, - 0x0b, - 0x0e, - 0x11, - 0x14, - 0x17, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x15, - 0x18, - 0x1b, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; - -const u32 dot11lcn_gain_idx_tbl_2G[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x10000000, - 0x00000000, - 0x00000000, - 0x00000008, - 0x10000000, - 0x00000008, - 0x00000000, - 0x00000010, - 0x10000000, - 0x00000010, - 0x00000000, - 0x00000018, - 0x10000000, - 0x00000018, - 0x20000000, - 0x00000018, - 0x30000000, - 0x00000018, - 0x40000000, - 0x00000018, - 0x50000000, - 0x00000018, - 0x60000000, - 0x00000018, - 0x70000000, - 0x00000018, - 0x80000000, - 0x00000018, - 0x50000000, - 0x00000028, - 0x90000000, - 0x00000028, - 0xa0000000, - 0x00000028, - 0xb0000000, - 0x00000028, - 0xc0000000, - 0x00000028, - 0xd0000000, - 0x00000028, - 0xe0000000, - 0x00000028, - 0xf0000000, - 0x00000028, - 0x00000000, - 0x00000029, - 0x10000000, - 0x00000029, - 0x20000000, - 0x00000029, - 0x30000000, - 0x00000029, - 0x40000000, - 0x00000029, - 0x50000000, - 0x00000029, - 0x60000000, - 0x00000029, - 0x70000000, - 0x00000029, - 0x80000000, - 0x00000029, - 0x90000000, - 0x00000029, - 0xa0000000, - 0x00000029, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x10000000, - 0x00000000, - 0x00000000, - 0x00000008, - 0x10000000, - 0x00000008, - 0x00000000, - 0x00000010, - 0x10000000, - 0x00000010, - 0x00000000, - 0x00000018, - 0x10000000, - 0x00000018, - 0x20000000, - 0x00000018, - 0x30000000, - 0x00000018, - 0x40000000, - 0x00000018, - 0x50000000, - 0x00000018, - 0x60000000, - 0x00000018, - 0x70000000, - 0x00000018, - 0x80000000, - 0x00000018, - 0x50000000, - 0x00000028, - 0x90000000, - 0x00000028, - 0xa0000000, - 0x00000028, - 0xb0000000, - 0x00000028, - 0xc0000000, - 0x00000028, - 0xd0000000, - 0x00000028, - 0xe0000000, - 0x00000028, - 0xf0000000, - 0x00000028, - 0x00000000, - 0x00000029, - 0x10000000, - 0x00000029, - 0x20000000, - 0x00000029, - 0x30000000, - 0x00000029, - 0x40000000, - 0x00000029, - 0x50000000, - 0x00000029, - 0x60000000, - 0x00000029, - 0x70000000, - 0x00000029, - 0x80000000, - 0x00000029, - 0x90000000, - 0x00000029, - 0xa0000000, - 0x00000029, - 0xb0000000, - 0x00000029, - 0xc0000000, - 0x00000029, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const u32 dot11lcn_gain_tbl_2G[] = { - 0x00000000, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000d, - 0x0000004d, - 0x0000008d, - 0x00000049, - 0x00000089, - 0x000000c9, - 0x0000004b, - 0x0000008b, - 0x000000cb, - 0x000000cf, - 0x0000010f, - 0x0000050f, - 0x0000090f, - 0x0000094f, - 0x00000d4f, - 0x0000114f, - 0x0000118f, - 0x0000518f, - 0x0000918f, - 0x0000d18f, - 0x0001118f, - 0x0001518f, - 0x0001918f, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const u32 dot11lcn_gain_tbl_extlna_2G[] = { - 0x00000000, - 0x00000004, - 0x00000008, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000d, - 0x00000003, - 0x00000007, - 0x0000000b, - 0x0000000f, - 0x0000004f, - 0x0000008f, - 0x000000cf, - 0x0000010f, - 0x0000014f, - 0x0000018f, - 0x0000058f, - 0x0000098f, - 0x00000d8f, - 0x00008000, - 0x00008004, - 0x00008008, - 0x00008001, - 0x00008005, - 0x00008009, - 0x0000800d, - 0x00008003, - 0x00008007, - 0x0000800b, - 0x0000800f, - 0x0000804f, - 0x0000808f, - 0x000080cf, - 0x0000810f, - 0x0000814f, - 0x0000818f, - 0x0000858f, - 0x0000898f, - 0x00008d8f, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const u16 dot11lcn_aux_gain_idx_tbl_extlna_2G[] = { - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0400, - 0x0401, - 0x0402, - 0x0403, - 0x0404, - 0x0483, - 0x0484, - 0x0485, - 0x0486, - 0x0583, - 0x0584, - 0x0585, - 0x0587, - 0x0588, - 0x0589, - 0x058a, - 0x0687, - 0x0688, - 0x0689, - 0x068a, - 0x068b, - 0x068c, - 0x068d, - 0x068e, - 0x068f, - 0x0690, - 0x0691, - 0x0692, - 0x0693, - 0x0000 -}; - -const u8 dot11lcn_gain_val_tbl_extlna_2G[] = { - 0xfc, - 0x02, - 0x08, - 0x0e, - 0x13, - 0x1b, - 0xfc, - 0x02, - 0x08, - 0x0e, - 0x13, - 0x1b, - 0xfc, - 0x00, - 0x0f, - 0x03, - 0xeb, - 0xfe, - 0x07, - 0x0b, - 0x0f, - 0xfb, - 0xfe, - 0x01, - 0x05, - 0x08, - 0x0b, - 0x0e, - 0x11, - 0x14, - 0x17, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x15, - 0x18, - 0x1b, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; - -const u32 dot11lcn_gain_idx_tbl_extlna_2G[] = { - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x00000000, - 0x00000040, - 0x10000000, - 0x00000040, - 0x20000000, - 0x00000040, - 0x30000000, - 0x00000040, - 0x40000000, - 0x00000040, - 0x30000000, - 0x00000048, - 0x40000000, - 0x00000048, - 0x50000000, - 0x00000048, - 0x60000000, - 0x00000048, - 0x30000000, - 0x00000058, - 0x40000000, - 0x00000058, - 0x50000000, - 0x00000058, - 0x70000000, - 0x00000058, - 0x80000000, - 0x00000058, - 0x90000000, - 0x00000058, - 0xa0000000, - 0x00000058, - 0x70000000, - 0x00000068, - 0x80000000, - 0x00000068, - 0x90000000, - 0x00000068, - 0xa0000000, - 0x00000068, - 0xb0000000, - 0x00000068, - 0xc0000000, - 0x00000068, - 0xd0000000, - 0x00000068, - 0xe0000000, - 0x00000068, - 0xf0000000, - 0x00000068, - 0x00000000, - 0x00000069, - 0x10000000, - 0x00000069, - 0x20000000, - 0x00000069, - 0x30000000, - 0x00000069, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x40000000, - 0x00000041, - 0x50000000, - 0x00000041, - 0x60000000, - 0x00000041, - 0x70000000, - 0x00000041, - 0x80000000, - 0x00000041, - 0x70000000, - 0x00000049, - 0x80000000, - 0x00000049, - 0x90000000, - 0x00000049, - 0xa0000000, - 0x00000049, - 0x70000000, - 0x00000059, - 0x80000000, - 0x00000059, - 0x90000000, - 0x00000059, - 0xb0000000, - 0x00000059, - 0xc0000000, - 0x00000059, - 0xd0000000, - 0x00000059, - 0xe0000000, - 0x00000059, - 0xb0000000, - 0x00000069, - 0xc0000000, - 0x00000069, - 0xd0000000, - 0x00000069, - 0xe0000000, - 0x00000069, - 0xf0000000, - 0x00000069, - 0x00000000, - 0x0000006a, - 0x10000000, - 0x0000006a, - 0x20000000, - 0x0000006a, - 0x30000000, - 0x0000006a, - 0x40000000, - 0x0000006a, - 0x50000000, - 0x0000006a, - 0x60000000, - 0x0000006a, - 0x70000000, - 0x0000006a, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const u32 dot11lcn_aux_gain_idx_tbl_5G[] = { - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0001, - 0x0002, - 0x0003, - 0x0004, - 0x0083, - 0x0084, - 0x0085, - 0x0086, - 0x0087, - 0x0186, - 0x0187, - 0x0188, - 0x0189, - 0x018a, - 0x018b, - 0x018c, - 0x018d, - 0x018e, - 0x018f, - 0x0190, - 0x0191, - 0x0192, - 0x0193, - 0x0194, - 0x0195, - 0x0196, - 0x0197, - 0x0198, - 0x0199, - 0x019a, - 0x019b, - 0x019c, - 0x019d, - 0x0000 -}; - -const u32 dot11lcn_gain_val_tbl_5G[] = { - 0xf7, - 0xfd, - 0x00, - 0x04, - 0x04, - 0x04, - 0xf7, - 0xfd, - 0x00, - 0x04, - 0x04, - 0x04, - 0xf6, - 0x00, - 0x0c, - 0x03, - 0xeb, - 0xfe, - 0x06, - 0x0a, - 0x10, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x15, - 0x18, - 0x1b, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x15, - 0x18, - 0x1b, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; - -const u32 dot11lcn_gain_idx_tbl_5G[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x10000000, - 0x00000000, - 0x20000000, - 0x00000000, - 0x30000000, - 0x00000000, - 0x40000000, - 0x00000000, - 0x30000000, - 0x00000008, - 0x40000000, - 0x00000008, - 0x50000000, - 0x00000008, - 0x60000000, - 0x00000008, - 0x70000000, - 0x00000008, - 0x60000000, - 0x00000018, - 0x70000000, - 0x00000018, - 0x80000000, - 0x00000018, - 0x90000000, - 0x00000018, - 0xa0000000, - 0x00000018, - 0xb0000000, - 0x00000018, - 0xc0000000, - 0x00000018, - 0xd0000000, - 0x00000018, - 0xe0000000, - 0x00000018, - 0xf0000000, - 0x00000018, - 0x00000000, - 0x00000019, - 0x10000000, - 0x00000019, - 0x20000000, - 0x00000019, - 0x30000000, - 0x00000019, - 0x40000000, - 0x00000019, - 0x50000000, - 0x00000019, - 0x60000000, - 0x00000019, - 0x70000000, - 0x00000019, - 0x80000000, - 0x00000019, - 0x90000000, - 0x00000019, - 0xa0000000, - 0x00000019, - 0xb0000000, - 0x00000019, - 0xc0000000, - 0x00000019, - 0xd0000000, - 0x00000019, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const u32 dot11lcn_gain_tbl_5G[] = { - 0x00000000, - 0x00000040, - 0x00000080, - 0x00000001, - 0x00000005, - 0x00000009, - 0x0000000d, - 0x00000011, - 0x00000015, - 0x00000055, - 0x00000095, - 0x00000017, - 0x0000001b, - 0x0000005b, - 0x0000009b, - 0x000000db, - 0x0000011b, - 0x0000015b, - 0x0000019b, - 0x0000059b, - 0x0000099b, - 0x00000d9b, - 0x0000119b, - 0x0000519b, - 0x0000919b, - 0x0000d19b, - 0x0001119b, - 0x0001519b, - 0x0001919b, - 0x0001d19b, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000 -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[] = { - {&dot11lcn_gain_tbl_rev0, - sizeof(dot11lcn_gain_tbl_rev0) / sizeof(dot11lcn_gain_tbl_rev0[0]), 18, - 0, 32} - , - {&dot11lcn_aux_gain_idx_tbl_rev0, - sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / - sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_rev0, - sizeof(dot11lcn_gain_idx_tbl_rev0) / - sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} - , -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[] = { - {&dot11lcn_gain_tbl_rev1, - sizeof(dot11lcn_gain_tbl_rev1) / sizeof(dot11lcn_gain_tbl_rev1[0]), 18, - 0, 32} - , - {&dot11lcn_aux_gain_idx_tbl_rev0, - sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / - sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_rev0, - sizeof(dot11lcn_gain_idx_tbl_rev0) / - sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} - , -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[] = { - {&dot11lcn_gain_tbl_2G, - sizeof(dot11lcn_gain_tbl_2G) / sizeof(dot11lcn_gain_tbl_2G[0]), 18, 0, - 32} - , - {&dot11lcn_aux_gain_idx_tbl_2G, - sizeof(dot11lcn_aux_gain_idx_tbl_2G) / - sizeof(dot11lcn_aux_gain_idx_tbl_2G[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_2G, - sizeof(dot11lcn_gain_idx_tbl_2G) / sizeof(dot11lcn_gain_idx_tbl_2G[0]), - 13, 0, 32} - , - {&dot11lcn_gain_val_tbl_2G, - sizeof(dot11lcn_gain_val_tbl_2G) / sizeof(dot11lcn_gain_val_tbl_2G[0]), - 17, 0, 8} -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[] = { - {&dot11lcn_gain_tbl_5G, - sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, - 32} - , - {&dot11lcn_aux_gain_idx_tbl_5G, - sizeof(dot11lcn_aux_gain_idx_tbl_5G) / - sizeof(dot11lcn_aux_gain_idx_tbl_5G[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_5G, - sizeof(dot11lcn_gain_idx_tbl_5G) / sizeof(dot11lcn_gain_idx_tbl_5G[0]), - 13, 0, 32} - , - {&dot11lcn_gain_val_tbl_5G, - sizeof(dot11lcn_gain_val_tbl_5G) / sizeof(dot11lcn_gain_val_tbl_5G[0]), - 17, 0, 8} -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[] = { - {&dot11lcn_gain_tbl_extlna_2G, - sizeof(dot11lcn_gain_tbl_extlna_2G) / - sizeof(dot11lcn_gain_tbl_extlna_2G[0]), 18, 0, 32} - , - {&dot11lcn_aux_gain_idx_tbl_extlna_2G, - sizeof(dot11lcn_aux_gain_idx_tbl_extlna_2G) / - sizeof(dot11lcn_aux_gain_idx_tbl_extlna_2G[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_extlna_2G, - sizeof(dot11lcn_gain_idx_tbl_extlna_2G) / - sizeof(dot11lcn_gain_idx_tbl_extlna_2G[0]), 13, 0, 32} - , - {&dot11lcn_gain_val_tbl_extlna_2G, - sizeof(dot11lcn_gain_val_tbl_extlna_2G) / - sizeof(dot11lcn_gain_val_tbl_extlna_2G[0]), 17, 0, 8} -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[] = { - {&dot11lcn_gain_tbl_5G, - sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, - 32} - , - {&dot11lcn_aux_gain_idx_tbl_5G, - sizeof(dot11lcn_aux_gain_idx_tbl_5G) / - sizeof(dot11lcn_aux_gain_idx_tbl_5G[0]), 14, 0, 16} - , - {&dot11lcn_gain_idx_tbl_5G, - sizeof(dot11lcn_gain_idx_tbl_5G) / sizeof(dot11lcn_gain_idx_tbl_5G[0]), - 13, 0, 32} - , - {&dot11lcn_gain_val_tbl_5G, - sizeof(dot11lcn_gain_val_tbl_5G) / sizeof(dot11lcn_gain_val_tbl_5G[0]), - 17, 0, 8} -}; - -const u32 dot11lcnphytbl_rx_gain_info_sz_rev0 = - sizeof(dot11lcnphytbl_rx_gain_info_rev0) / - sizeof(dot11lcnphytbl_rx_gain_info_rev0[0]); - -const u32 dot11lcnphytbl_rx_gain_info_sz_rev1 = - sizeof(dot11lcnphytbl_rx_gain_info_rev1) / - sizeof(dot11lcnphytbl_rx_gain_info_rev1[0]); - -const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz = - sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2) / - sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2[0]); - -const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz = - sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2) / - sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2[0]); - -const u16 dot11lcn_min_sig_sq_tbl_rev0[] = { - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, - 0x014d, -}; - -const u16 dot11lcn_noise_scale_tbl_rev0[] = { - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, -}; - -const u32 dot11lcn_fltr_ctrl_tbl_rev0[] = { - 0x000141f8, - 0x000021f8, - 0x000021fb, - 0x000041fb, - 0x0001fe4b, - 0x0000217b, - 0x00002133, - 0x000040eb, - 0x0001fea3, - 0x0000024b, -}; - -const u32 dot11lcn_ps_ctrl_tbl_rev0[] = { - 0x00100001, - 0x00200010, - 0x00300001, - 0x00400010, - 0x00500022, - 0x00600122, - 0x00700222, - 0x00800322, - 0x00900422, - 0x00a00522, - 0x00b00622, - 0x00c00722, - 0x00d00822, - 0x00f00922, - 0x00100a22, - 0x00200b22, - 0x00300c22, - 0x00400d22, - 0x00500e22, - 0x00600f22, -}; - -const u16 dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[] = { - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x0007, - 0x0005, - 0x0006, - 0x0004, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - 0x000b, - 0x000b, - 0x000a, - 0x000a, - -}; - -const u16 dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[] = { - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0005, - 0x0002, - 0x0000, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, - 0x0007, - 0x0007, - 0x0002, - 0x0002, -}; - -const u16 dot11lcn_sw_ctrl_tbl_4313_epa_rev0[] = { - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, - 0x0002, - 0x0008, - 0x0004, - 0x0001, -}; - -const u16 dot11lcn_sw_ctrl_tbl_4313_rev0[] = { - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, - 0x000a, - 0x0009, - 0x0006, - 0x0005, -}; - -const u16 dot11lcn_sw_ctrl_tbl_rev0[] = { - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, - 0x0004, - 0x0004, - 0x0002, - 0x0002, -}; - -const u8 dot11lcn_nf_table_rev0[] = { - 0x5f, - 0x36, - 0x29, - 0x1f, - 0x5f, - 0x36, - 0x29, - 0x1f, - 0x5f, - 0x36, - 0x29, - 0x1f, - 0x5f, - 0x36, - 0x29, - 0x1f, -}; - -const u8 dot11lcn_gain_val_tbl_rev0[] = { - 0x09, - 0x0f, - 0x14, - 0x18, - 0xfe, - 0x07, - 0x0b, - 0x0f, - 0xfb, - 0xfe, - 0x01, - 0x05, - 0x08, - 0x0b, - 0x0e, - 0x11, - 0x14, - 0x17, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0x06, - 0x09, - 0x0c, - 0x0f, - 0x12, - 0x15, - 0x18, - 0x1b, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x03, - 0xeb, - 0x00, - 0x00, -}; - -const u8 dot11lcn_spur_tbl_rev0[] = { - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x02, - 0x03, - 0x01, - 0x03, - 0x02, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x02, - 0x03, - 0x01, - 0x03, - 0x02, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, - 0x01, -}; - -const u16 dot11lcn_unsup_mcs_tbl_rev0[] = { - 0x001a, - 0x0034, - 0x004e, - 0x0068, - 0x009c, - 0x00d0, - 0x00ea, - 0x0104, - 0x0034, - 0x0068, - 0x009c, - 0x00d0, - 0x0138, - 0x01a0, - 0x01d4, - 0x0208, - 0x004e, - 0x009c, - 0x00ea, - 0x0138, - 0x01d4, - 0x0270, - 0x02be, - 0x030c, - 0x0068, - 0x00d0, - 0x0138, - 0x01a0, - 0x0270, - 0x0340, - 0x03a8, - 0x0410, - 0x0018, - 0x009c, - 0x00d0, - 0x0104, - 0x00ea, - 0x0138, - 0x0186, - 0x00d0, - 0x0104, - 0x0104, - 0x0138, - 0x016c, - 0x016c, - 0x01a0, - 0x0138, - 0x0186, - 0x0186, - 0x01d4, - 0x0222, - 0x0222, - 0x0270, - 0x0104, - 0x0138, - 0x016c, - 0x0138, - 0x016c, - 0x01a0, - 0x01d4, - 0x01a0, - 0x01d4, - 0x0208, - 0x0208, - 0x023c, - 0x0186, - 0x01d4, - 0x0222, - 0x01d4, - 0x0222, - 0x0270, - 0x02be, - 0x0270, - 0x02be, - 0x030c, - 0x030c, - 0x035a, - 0x0036, - 0x006c, - 0x00a2, - 0x00d8, - 0x0144, - 0x01b0, - 0x01e6, - 0x021c, - 0x006c, - 0x00d8, - 0x0144, - 0x01b0, - 0x0288, - 0x0360, - 0x03cc, - 0x0438, - 0x00a2, - 0x0144, - 0x01e6, - 0x0288, - 0x03cc, - 0x0510, - 0x05b2, - 0x0654, - 0x00d8, - 0x01b0, - 0x0288, - 0x0360, - 0x0510, - 0x06c0, - 0x0798, - 0x0870, - 0x0018, - 0x0144, - 0x01b0, - 0x021c, - 0x01e6, - 0x0288, - 0x032a, - 0x01b0, - 0x021c, - 0x021c, - 0x0288, - 0x02f4, - 0x02f4, - 0x0360, - 0x0288, - 0x032a, - 0x032a, - 0x03cc, - 0x046e, - 0x046e, - 0x0510, - 0x021c, - 0x0288, - 0x02f4, - 0x0288, - 0x02f4, - 0x0360, - 0x03cc, - 0x0360, - 0x03cc, - 0x0438, - 0x0438, - 0x04a4, - 0x032a, - 0x03cc, - 0x046e, - 0x03cc, - 0x046e, - 0x0510, - 0x05b2, - 0x0510, - 0x05b2, - 0x0654, - 0x0654, - 0x06f6, -}; - -const u16 dot11lcn_iq_local_tbl_rev0[] = { - 0x0200, - 0x0300, - 0x0400, - 0x0600, - 0x0800, - 0x0b00, - 0x1000, - 0x1001, - 0x1002, - 0x1003, - 0x1004, - 0x1005, - 0x1006, - 0x1007, - 0x1707, - 0x2007, - 0x2d07, - 0x4007, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0200, - 0x0300, - 0x0400, - 0x0600, - 0x0800, - 0x0b00, - 0x1000, - 0x1001, - 0x1002, - 0x1003, - 0x1004, - 0x1005, - 0x1006, - 0x1007, - 0x1707, - 0x2007, - 0x2d07, - 0x4007, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x4000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, -}; - -const u32 dot11lcn_papd_compdelta_tbl_rev0[] = { - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, - 0x00080000, -}; - -const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[] = { - {&dot11lcn_min_sig_sq_tbl_rev0, - sizeof(dot11lcn_min_sig_sq_tbl_rev0) / - sizeof(dot11lcn_min_sig_sq_tbl_rev0[0]), 2, 0, 16} - , - {&dot11lcn_noise_scale_tbl_rev0, - sizeof(dot11lcn_noise_scale_tbl_rev0) / - sizeof(dot11lcn_noise_scale_tbl_rev0[0]), 1, 0, 16} - , - {&dot11lcn_fltr_ctrl_tbl_rev0, - sizeof(dot11lcn_fltr_ctrl_tbl_rev0) / - sizeof(dot11lcn_fltr_ctrl_tbl_rev0[0]), 11, 0, 32} - , - {&dot11lcn_ps_ctrl_tbl_rev0, - sizeof(dot11lcn_ps_ctrl_tbl_rev0) / - sizeof(dot11lcn_ps_ctrl_tbl_rev0[0]), 12, 0, 32} - , - {&dot11lcn_gain_idx_tbl_rev0, - sizeof(dot11lcn_gain_idx_tbl_rev0) / - sizeof(dot11lcn_gain_idx_tbl_rev0[0]), 13, 0, 32} - , - {&dot11lcn_aux_gain_idx_tbl_rev0, - sizeof(dot11lcn_aux_gain_idx_tbl_rev0) / - sizeof(dot11lcn_aux_gain_idx_tbl_rev0[0]), 14, 0, 16} - , - {&dot11lcn_sw_ctrl_tbl_rev0, - sizeof(dot11lcn_sw_ctrl_tbl_rev0) / - sizeof(dot11lcn_sw_ctrl_tbl_rev0[0]), 15, 0, 16} - , - {&dot11lcn_nf_table_rev0, - sizeof(dot11lcn_nf_table_rev0) / sizeof(dot11lcn_nf_table_rev0[0]), 16, - 0, 8} - , - {&dot11lcn_gain_val_tbl_rev0, - sizeof(dot11lcn_gain_val_tbl_rev0) / - sizeof(dot11lcn_gain_val_tbl_rev0[0]), 17, 0, 8} - , - {&dot11lcn_gain_tbl_rev0, - sizeof(dot11lcn_gain_tbl_rev0) / sizeof(dot11lcn_gain_tbl_rev0[0]), 18, - 0, 32} - , - {&dot11lcn_spur_tbl_rev0, - sizeof(dot11lcn_spur_tbl_rev0) / sizeof(dot11lcn_spur_tbl_rev0[0]), 20, - 0, 8} - , - {&dot11lcn_unsup_mcs_tbl_rev0, - sizeof(dot11lcn_unsup_mcs_tbl_rev0) / - sizeof(dot11lcn_unsup_mcs_tbl_rev0[0]), 23, 0, 16} - , - {&dot11lcn_iq_local_tbl_rev0, - sizeof(dot11lcn_iq_local_tbl_rev0) / - sizeof(dot11lcn_iq_local_tbl_rev0[0]), 0, 0, 16} - , - {&dot11lcn_papd_compdelta_tbl_rev0, - sizeof(dot11lcn_papd_compdelta_tbl_rev0) / - sizeof(dot11lcn_papd_compdelta_tbl_rev0[0]), 24, 0, 32} - , -}; - -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313 = { - &dot11lcn_sw_ctrl_tbl_4313_rev0, - sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0) / - sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0[0]), 15, 0, 16 -}; - -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa = { - &dot11lcn_sw_ctrl_tbl_4313_epa_rev0, - sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0) / - sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0[0]), 15, 0, 16 -}; - -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa = { - &dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo, - sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo) / - sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[0]), 15, 0, 16 -}; - -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250 = { - &dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0, - sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0) / - sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[0]), 15, 0, 16 -}; - -const u32 dot11lcnphytbl_info_sz_rev0 = - sizeof(dot11lcnphytbl_info_rev0) / sizeof(dot11lcnphytbl_info_rev0[0]); - -const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = { - {3, 0, 31, 0, 72,} - , - {3, 0, 31, 0, 70,} - , - {3, 0, 31, 0, 68,} - , - {3, 0, 30, 0, 67,} - , - {3, 0, 29, 0, 68,} - , - {3, 0, 28, 0, 68,} - , - {3, 0, 27, 0, 69,} - , - {3, 0, 26, 0, 70,} - , - {3, 0, 25, 0, 70,} - , - {3, 0, 24, 0, 71,} - , - {3, 0, 23, 0, 72,} - , - {3, 0, 23, 0, 70,} - , - {3, 0, 22, 0, 71,} - , - {3, 0, 21, 0, 72,} - , - {3, 0, 21, 0, 70,} - , - {3, 0, 21, 0, 68,} - , - {3, 0, 21, 0, 66,} - , - {3, 0, 21, 0, 64,} - , - {3, 0, 21, 0, 63,} - , - {3, 0, 20, 0, 64,} - , - {3, 0, 19, 0, 65,} - , - {3, 0, 19, 0, 64,} - , - {3, 0, 18, 0, 65,} - , - {3, 0, 18, 0, 64,} - , - {3, 0, 17, 0, 65,} - , - {3, 0, 17, 0, 64,} - , - {3, 0, 16, 0, 65,} - , - {3, 0, 16, 0, 64,} - , - {3, 0, 16, 0, 62,} - , - {3, 0, 16, 0, 60,} - , - {3, 0, 16, 0, 58,} - , - {3, 0, 15, 0, 61,} - , - {3, 0, 15, 0, 59,} - , - {3, 0, 14, 0, 61,} - , - {3, 0, 14, 0, 60,} - , - {3, 0, 14, 0, 58,} - , - {3, 0, 13, 0, 60,} - , - {3, 0, 13, 0, 59,} - , - {3, 0, 12, 0, 62,} - , - {3, 0, 12, 0, 60,} - , - {3, 0, 12, 0, 58,} - , - {3, 0, 11, 0, 62,} - , - {3, 0, 11, 0, 60,} - , - {3, 0, 11, 0, 59,} - , - {3, 0, 11, 0, 57,} - , - {3, 0, 10, 0, 61,} - , - {3, 0, 10, 0, 59,} - , - {3, 0, 10, 0, 57,} - , - {3, 0, 9, 0, 62,} - , - {3, 0, 9, 0, 60,} - , - {3, 0, 9, 0, 58,} - , - {3, 0, 9, 0, 57,} - , - {3, 0, 8, 0, 62,} - , - {3, 0, 8, 0, 60,} - , - {3, 0, 8, 0, 58,} - , - {3, 0, 8, 0, 57,} - , - {3, 0, 8, 0, 55,} - , - {3, 0, 7, 0, 61,} - , - {3, 0, 7, 0, 60,} - , - {3, 0, 7, 0, 58,} - , - {3, 0, 7, 0, 56,} - , - {3, 0, 7, 0, 55,} - , - {3, 0, 6, 0, 62,} - , - {3, 0, 6, 0, 60,} - , - {3, 0, 6, 0, 58,} - , - {3, 0, 6, 0, 57,} - , - {3, 0, 6, 0, 55,} - , - {3, 0, 6, 0, 54,} - , - {3, 0, 6, 0, 52,} - , - {3, 0, 5, 0, 61,} - , - {3, 0, 5, 0, 59,} - , - {3, 0, 5, 0, 57,} - , - {3, 0, 5, 0, 56,} - , - {3, 0, 5, 0, 54,} - , - {3, 0, 5, 0, 53,} - , - {3, 0, 5, 0, 51,} - , - {3, 0, 4, 0, 62,} - , - {3, 0, 4, 0, 60,} - , - {3, 0, 4, 0, 58,} - , - {3, 0, 4, 0, 57,} - , - {3, 0, 4, 0, 55,} - , - {3, 0, 4, 0, 54,} - , - {3, 0, 4, 0, 52,} - , - {3, 0, 4, 0, 51,} - , - {3, 0, 4, 0, 49,} - , - {3, 0, 4, 0, 48,} - , - {3, 0, 4, 0, 46,} - , - {3, 0, 3, 0, 60,} - , - {3, 0, 3, 0, 58,} - , - {3, 0, 3, 0, 57,} - , - {3, 0, 3, 0, 55,} - , - {3, 0, 3, 0, 54,} - , - {3, 0, 3, 0, 52,} - , - {3, 0, 3, 0, 51,} - , - {3, 0, 3, 0, 49,} - , - {3, 0, 3, 0, 48,} - , - {3, 0, 3, 0, 46,} - , - {3, 0, 3, 0, 45,} - , - {3, 0, 3, 0, 44,} - , - {3, 0, 3, 0, 43,} - , - {3, 0, 3, 0, 41,} - , - {3, 0, 2, 0, 61,} - , - {3, 0, 2, 0, 59,} - , - {3, 0, 2, 0, 57,} - , - {3, 0, 2, 0, 56,} - , - {3, 0, 2, 0, 54,} - , - {3, 0, 2, 0, 53,} - , - {3, 0, 2, 0, 51,} - , - {3, 0, 2, 0, 50,} - , - {3, 0, 2, 0, 48,} - , - {3, 0, 2, 0, 47,} - , - {3, 0, 2, 0, 46,} - , - {3, 0, 2, 0, 44,} - , - {3, 0, 2, 0, 43,} - , - {3, 0, 2, 0, 42,} - , - {3, 0, 2, 0, 41,} - , - {3, 0, 2, 0, 39,} - , - {3, 0, 2, 0, 38,} - , - {3, 0, 2, 0, 37,} - , - {3, 0, 2, 0, 36,} - , - {3, 0, 2, 0, 35,} - , - {3, 0, 2, 0, 34,} - , - {3, 0, 2, 0, 33,} - , - {3, 0, 2, 0, 32,} - , - {3, 0, 1, 0, 63,} - , - {3, 0, 1, 0, 61,} - , - {3, 0, 1, 0, 59,} - , - {3, 0, 1, 0, 57,} - , -}; - -const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = { - {7, 0, 31, 0, 72,} - , - {7, 0, 31, 0, 70,} - , - {7, 0, 31, 0, 68,} - , - {7, 0, 30, 0, 67,} - , - {7, 0, 29, 0, 68,} - , - {7, 0, 28, 0, 68,} - , - {7, 0, 27, 0, 69,} - , - {7, 0, 26, 0, 70,} - , - {7, 0, 25, 0, 70,} - , - {7, 0, 24, 0, 71,} - , - {7, 0, 23, 0, 72,} - , - {7, 0, 23, 0, 70,} - , - {7, 0, 22, 0, 71,} - , - {7, 0, 21, 0, 72,} - , - {7, 0, 21, 0, 70,} - , - {7, 0, 21, 0, 68,} - , - {7, 0, 21, 0, 66,} - , - {7, 0, 21, 0, 64,} - , - {7, 0, 21, 0, 63,} - , - {7, 0, 20, 0, 64,} - , - {7, 0, 19, 0, 65,} - , - {7, 0, 19, 0, 64,} - , - {7, 0, 18, 0, 65,} - , - {7, 0, 18, 0, 64,} - , - {7, 0, 17, 0, 65,} - , - {7, 0, 17, 0, 64,} - , - {7, 0, 16, 0, 65,} - , - {7, 0, 16, 0, 64,} - , - {7, 0, 16, 0, 62,} - , - {7, 0, 16, 0, 60,} - , - {7, 0, 16, 0, 58,} - , - {7, 0, 15, 0, 61,} - , - {7, 0, 15, 0, 59,} - , - {7, 0, 14, 0, 61,} - , - {7, 0, 14, 0, 60,} - , - {7, 0, 14, 0, 58,} - , - {7, 0, 13, 0, 60,} - , - {7, 0, 13, 0, 59,} - , - {7, 0, 12, 0, 62,} - , - {7, 0, 12, 0, 60,} - , - {7, 0, 12, 0, 58,} - , - {7, 0, 11, 0, 62,} - , - {7, 0, 11, 0, 60,} - , - {7, 0, 11, 0, 59,} - , - {7, 0, 11, 0, 57,} - , - {7, 0, 10, 0, 61,} - , - {7, 0, 10, 0, 59,} - , - {7, 0, 10, 0, 57,} - , - {7, 0, 9, 0, 62,} - , - {7, 0, 9, 0, 60,} - , - {7, 0, 9, 0, 58,} - , - {7, 0, 9, 0, 57,} - , - {7, 0, 8, 0, 62,} - , - {7, 0, 8, 0, 60,} - , - {7, 0, 8, 0, 58,} - , - {7, 0, 8, 0, 57,} - , - {7, 0, 8, 0, 55,} - , - {7, 0, 7, 0, 61,} - , - {7, 0, 7, 0, 60,} - , - {7, 0, 7, 0, 58,} - , - {7, 0, 7, 0, 56,} - , - {7, 0, 7, 0, 55,} - , - {7, 0, 6, 0, 62,} - , - {7, 0, 6, 0, 60,} - , - {7, 0, 6, 0, 58,} - , - {7, 0, 6, 0, 57,} - , - {7, 0, 6, 0, 55,} - , - {7, 0, 6, 0, 54,} - , - {7, 0, 6, 0, 52,} - , - {7, 0, 5, 0, 61,} - , - {7, 0, 5, 0, 59,} - , - {7, 0, 5, 0, 57,} - , - {7, 0, 5, 0, 56,} - , - {7, 0, 5, 0, 54,} - , - {7, 0, 5, 0, 53,} - , - {7, 0, 5, 0, 51,} - , - {7, 0, 4, 0, 62,} - , - {7, 0, 4, 0, 60,} - , - {7, 0, 4, 0, 58,} - , - {7, 0, 4, 0, 57,} - , - {7, 0, 4, 0, 55,} - , - {7, 0, 4, 0, 54,} - , - {7, 0, 4, 0, 52,} - , - {7, 0, 4, 0, 51,} - , - {7, 0, 4, 0, 49,} - , - {7, 0, 4, 0, 48,} - , - {7, 0, 4, 0, 46,} - , - {7, 0, 3, 0, 60,} - , - {7, 0, 3, 0, 58,} - , - {7, 0, 3, 0, 57,} - , - {7, 0, 3, 0, 55,} - , - {7, 0, 3, 0, 54,} - , - {7, 0, 3, 0, 52,} - , - {7, 0, 3, 0, 51,} - , - {7, 0, 3, 0, 49,} - , - {7, 0, 3, 0, 48,} - , - {7, 0, 3, 0, 46,} - , - {7, 0, 3, 0, 45,} - , - {7, 0, 3, 0, 44,} - , - {7, 0, 3, 0, 43,} - , - {7, 0, 3, 0, 41,} - , - {7, 0, 2, 0, 61,} - , - {7, 0, 2, 0, 59,} - , - {7, 0, 2, 0, 57,} - , - {7, 0, 2, 0, 56,} - , - {7, 0, 2, 0, 54,} - , - {7, 0, 2, 0, 53,} - , - {7, 0, 2, 0, 51,} - , - {7, 0, 2, 0, 50,} - , - {7, 0, 2, 0, 48,} - , - {7, 0, 2, 0, 47,} - , - {7, 0, 2, 0, 46,} - , - {7, 0, 2, 0, 44,} - , - {7, 0, 2, 0, 43,} - , - {7, 0, 2, 0, 42,} - , - {7, 0, 2, 0, 41,} - , - {7, 0, 2, 0, 39,} - , - {7, 0, 2, 0, 38,} - , - {7, 0, 2, 0, 37,} - , - {7, 0, 2, 0, 36,} - , - {7, 0, 2, 0, 35,} - , - {7, 0, 2, 0, 34,} - , - {7, 0, 2, 0, 33,} - , - {7, 0, 2, 0, 32,} - , - {7, 0, 1, 0, 63,} - , - {7, 0, 1, 0, 61,} - , - {7, 0, 1, 0, 59,} - , - {7, 0, 1, 0, 57,} - , -}; - -const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[128] = { - {255, 255, 0xf0, 0, 152,} - , - {255, 255, 0xf0, 0, 147,} - , - {255, 255, 0xf0, 0, 143,} - , - {255, 255, 0xf0, 0, 139,} - , - {255, 255, 0xf0, 0, 135,} - , - {255, 255, 0xf0, 0, 131,} - , - {255, 255, 0xf0, 0, 128,} - , - {255, 255, 0xf0, 0, 124,} - , - {255, 255, 0xf0, 0, 121,} - , - {255, 255, 0xf0, 0, 117,} - , - {255, 255, 0xf0, 0, 114,} - , - {255, 255, 0xf0, 0, 111,} - , - {255, 255, 0xf0, 0, 107,} - , - {255, 255, 0xf0, 0, 104,} - , - {255, 255, 0xf0, 0, 101,} - , - {255, 255, 0xf0, 0, 99,} - , - {255, 255, 0xf0, 0, 96,} - , - {255, 255, 0xf0, 0, 93,} - , - {255, 255, 0xf0, 0, 90,} - , - {255, 255, 0xf0, 0, 88,} - , - {255, 255, 0xf0, 0, 85,} - , - {255, 255, 0xf0, 0, 83,} - , - {255, 255, 0xf0, 0, 81,} - , - {255, 255, 0xf0, 0, 78,} - , - {255, 255, 0xf0, 0, 76,} - , - {255, 255, 0xf0, 0, 74,} - , - {255, 255, 0xf0, 0, 72,} - , - {255, 255, 0xf0, 0, 70,} - , - {255, 255, 0xf0, 0, 68,} - , - {255, 255, 0xf0, 0, 66,} - , - {255, 255, 0xf0, 0, 64,} - , - {255, 248, 0xf0, 0, 64,} - , - {255, 241, 0xf0, 0, 64,} - , - {255, 251, 0xe0, 0, 64,} - , - {255, 244, 0xe0, 0, 64,} - , - {255, 254, 0xd0, 0, 64,} - , - {255, 246, 0xd0, 0, 64,} - , - {255, 239, 0xd0, 0, 64,} - , - {255, 249, 0xc0, 0, 64,} - , - {255, 242, 0xc0, 0, 64,} - , - {255, 255, 0xb0, 0, 64,} - , - {255, 248, 0xb0, 0, 64,} - , - {255, 241, 0xb0, 0, 64,} - , - {255, 254, 0xa0, 0, 64,} - , - {255, 246, 0xa0, 0, 64,} - , - {255, 239, 0xa0, 0, 64,} - , - {255, 255, 0x90, 0, 64,} - , - {255, 248, 0x90, 0, 64,} - , - {255, 241, 0x90, 0, 64,} - , - {255, 234, 0x90, 0, 64,} - , - {255, 255, 0x80, 0, 64,} - , - {255, 248, 0x80, 0, 64,} - , - {255, 241, 0x80, 0, 64,} - , - {255, 234, 0x80, 0, 64,} - , - {255, 255, 0x70, 0, 64,} - , - {255, 248, 0x70, 0, 64,} - , - {255, 241, 0x70, 0, 64,} - , - {255, 234, 0x70, 0, 64,} - , - {255, 227, 0x70, 0, 64,} - , - {255, 221, 0x70, 0, 64,} - , - {255, 215, 0x70, 0, 64,} - , - {255, 208, 0x70, 0, 64,} - , - {255, 203, 0x70, 0, 64,} - , - {255, 197, 0x70, 0, 64,} - , - {255, 255, 0x60, 0, 64,} - , - {255, 248, 0x60, 0, 64,} - , - {255, 241, 0x60, 0, 64,} - , - {255, 234, 0x60, 0, 64,} - , - {255, 227, 0x60, 0, 64,} - , - {255, 221, 0x60, 0, 64,} - , - {255, 255, 0x50, 0, 64,} - , - {255, 248, 0x50, 0, 64,} - , - {255, 241, 0x50, 0, 64,} - , - {255, 234, 0x50, 0, 64,} - , - {255, 227, 0x50, 0, 64,} - , - {255, 221, 0x50, 0, 64,} - , - {255, 215, 0x50, 0, 64,} - , - {255, 208, 0x50, 0, 64,} - , - {255, 255, 0x40, 0, 64,} - , - {255, 248, 0x40, 0, 64,} - , - {255, 241, 0x40, 0, 64,} - , - {255, 234, 0x40, 0, 64,} - , - {255, 227, 0x40, 0, 64,} - , - {255, 221, 0x40, 0, 64,} - , - {255, 215, 0x40, 0, 64,} - , - {255, 208, 0x40, 0, 64,} - , - {255, 203, 0x40, 0, 64,} - , - {255, 197, 0x40, 0, 64,} - , - {255, 255, 0x30, 0, 64,} - , - {255, 248, 0x30, 0, 64,} - , - {255, 241, 0x30, 0, 64,} - , - {255, 234, 0x30, 0, 64,} - , - {255, 227, 0x30, 0, 64,} - , - {255, 221, 0x30, 0, 64,} - , - {255, 215, 0x30, 0, 64,} - , - {255, 208, 0x30, 0, 64,} - , - {255, 203, 0x30, 0, 64,} - , - {255, 197, 0x30, 0, 64,} - , - {255, 191, 0x30, 0, 64,} - , - {255, 186, 0x30, 0, 64,} - , - {255, 181, 0x30, 0, 64,} - , - {255, 175, 0x30, 0, 64,} - , - {255, 255, 0x20, 0, 64,} - , - {255, 248, 0x20, 0, 64,} - , - {255, 241, 0x20, 0, 64,} - , - {255, 234, 0x20, 0, 64,} - , - {255, 227, 0x20, 0, 64,} - , - {255, 221, 0x20, 0, 64,} - , - {255, 215, 0x20, 0, 64,} - , - {255, 208, 0x20, 0, 64,} - , - {255, 203, 0x20, 0, 64,} - , - {255, 197, 0x20, 0, 64,} - , - {255, 191, 0x20, 0, 64,} - , - {255, 186, 0x20, 0, 64,} - , - {255, 181, 0x20, 0, 64,} - , - {255, 175, 0x20, 0, 64,} - , - {255, 170, 0x20, 0, 64,} - , - {255, 166, 0x20, 0, 64,} - , - {255, 161, 0x20, 0, 64,} - , - {255, 156, 0x20, 0, 64,} - , - {255, 152, 0x20, 0, 64,} - , - {255, 148, 0x20, 0, 64,} - , - {255, 143, 0x20, 0, 64,} - , - {255, 139, 0x20, 0, 64,} - , - {255, 135, 0x20, 0, 64,} - , - {255, 132, 0x20, 0, 64,} - , - {255, 255, 0x10, 0, 64,} - , - {255, 248, 0x10, 0, 64,} - , -}; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h deleted file mode 100644 index 5a64a98..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -typedef phytbl_info_t dot11lcnphytbl_info_t; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[]; -extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev0; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa_combo; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[]; -extern const u32 dot11lcnphytbl_info_sz_rev0; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[]; -extern const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[]; -extern const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[]; - -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[]; - -typedef struct { - unsigned char gm; - unsigned char pga; - unsigned char pad; - unsigned char dac; - unsigned char bb_mult; -} lcnphy_tx_gain_tbl_entry; - -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[]; -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[]; - -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[]; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c deleted file mode 100644 index ad41a19..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c +++ /dev/null @@ -1,10632 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include - -#include "bcmdma.h" -#include -#include - -const u32 frame_struct_rev0[] = { - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x09804506, - 0x00100030, - 0x09804507, - 0x00100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a0c, - 0x00100004, - 0x01000a0d, - 0x00100024, - 0x0980450e, - 0x00100034, - 0x0980450f, - 0x00100034, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a04, - 0x00100000, - 0x11008a05, - 0x00100020, - 0x1980c506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x01800504, - 0x00100030, - 0x11808505, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000a04, - 0x00100000, - 0x11008a05, - 0x00100020, - 0x21810506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x1980c50e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x0180050c, - 0x00100038, - 0x1180850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x1980c506, - 0x00100030, - 0x1980c506, - 0x00100030, - 0x11808504, - 0x00100030, - 0x3981ca05, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x10008a04, - 0x00100000, - 0x3981ca05, - 0x00100030, - 0x1980c506, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a0c, - 0x00100008, - 0x01000a0d, - 0x00100028, - 0x1980c50e, - 0x00100038, - 0x1980c50e, - 0x00100038, - 0x1180850c, - 0x00100038, - 0x3981ca0d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x10008a0c, - 0x00100008, - 0x3981ca0d, - 0x00100038, - 0x1980c50e, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x02001405, - 0x00100040, - 0x0b004a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x43020a04, - 0x00100060, - 0x1b00ca05, - 0x00100060, - 0x23010a07, - 0x01500060, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x13008a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x0200140d, - 0x00100050, - 0x0b004a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x50029404, - 0x00100000, - 0x32019405, - 0x00100040, - 0x0b004a06, - 0x01900060, - 0x0b004a06, - 0x01900060, - 0x5b02ca04, - 0x00100060, - 0x3b01d405, - 0x00100060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x5802d404, - 0x00100000, - 0x3b01d405, - 0x00100060, - 0x0b004a06, - 0x01900060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x5002940c, - 0x00100010, - 0x3201940d, - 0x00100050, - 0x0b004a0e, - 0x01900070, - 0x0b004a0e, - 0x01900070, - 0x5b02ca0c, - 0x00100070, - 0x3b01d40d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x5802d40c, - 0x00100010, - 0x3b01d40d, - 0x00100070, - 0x0b004a0e, - 0x01900070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x000f4800, - 0x62031405, - 0x00100040, - 0x53028a06, - 0x01900060, - 0x53028a07, - 0x01900060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x000f4808, - 0x6203140d, - 0x00100048, - 0x53028a0e, - 0x01900068, - 0x53028a0f, - 0x01900068, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100004, - 0x11008a0d, - 0x00100024, - 0x1980c50e, - 0x00100034, - 0x2181050e, - 0x00100034, - 0x2181050e, - 0x00100034, - 0x0180050c, - 0x00100038, - 0x1180850d, - 0x00100038, - 0x1181850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x1181850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x0180c506, - 0x00100030, - 0x0180c506, - 0x00100030, - 0x2180c50c, - 0x00100030, - 0x49820a0d, - 0x0016a130, - 0x41824a0d, - 0x0016a130, - 0x2981450f, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x2000ca0c, - 0x00100000, - 0x49820a0d, - 0x0016a130, - 0x1980c50e, - 0x00100030, - 0x41824a0d, - 0x0016a130, - 0x2981450f, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100008, - 0x0200140d, - 0x00100048, - 0x0b004a0e, - 0x01900068, - 0x13008a0e, - 0x01900068, - 0x13008a0e, - 0x01900068, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x1b014a0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x1b014a0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x50029404, - 0x00100000, - 0x32019405, - 0x00100040, - 0x03004a06, - 0x01900060, - 0x03004a06, - 0x01900060, - 0x6b030a0c, - 0x00100060, - 0x4b02140d, - 0x0016a160, - 0x4302540d, - 0x0016a160, - 0x23010a0f, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x6b03140c, - 0x00100060, - 0x4b02140d, - 0x0016a160, - 0x0b004a0e, - 0x01900060, - 0x4302540d, - 0x0016a160, - 0x23010a0f, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x53028a06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x43020a04, - 0x00100060, - 0x1b00ca05, - 0x00100060, - 0x53028a07, - 0x0190c060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x53028a0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x53028a0f, - 0x0190c070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x5b02ca06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x53028a07, - 0x0190c060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x5b02ca0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x53028a0f, - 0x0190c070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u8 frame_lut_rev0[] = { - 0x02, - 0x04, - 0x14, - 0x14, - 0x03, - 0x05, - 0x16, - 0x16, - 0x0a, - 0x0c, - 0x1c, - 0x1c, - 0x0b, - 0x0d, - 0x1e, - 0x1e, - 0x06, - 0x08, - 0x18, - 0x18, - 0x07, - 0x09, - 0x1a, - 0x1a, - 0x0e, - 0x10, - 0x20, - 0x28, - 0x0f, - 0x11, - 0x22, - 0x2a, -}; - -const u32 tmap_tbl_rev0[] = { - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x000aa888, - 0x88880000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00011111, - 0x11110000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00088aaa, - 0xaaaa0000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xaaa8aaa0, - 0x8aaa8aaa, - 0xaa8a8a8a, - 0x000aaa88, - 0x8aaa0000, - 0xaaa8a888, - 0x8aa88a8a, - 0x8a88a888, - 0x08080a00, - 0x0a08080a, - 0x080a0a08, - 0x00080808, - 0x080a0000, - 0x080a0808, - 0x080a0808, - 0x0a0a0a08, - 0xa0a0a0a0, - 0x80a0a080, - 0x8080a0a0, - 0x00008080, - 0x80a00000, - 0x80a080a0, - 0xa080a0a0, - 0x8080a0a0, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x99999000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x22000000, - 0x2222b222, - 0x22222222, - 0x222222b2, - 0xb2222220, - 0x22222222, - 0x22d22222, - 0x00000222, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x33000000, - 0x3333b333, - 0x33333333, - 0x333333b3, - 0xb3333330, - 0x33333333, - 0x33d33333, - 0x00000333, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x99b99b00, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb99, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x22222200, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0x22222222, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x11111111, - 0xf1111111, - 0x11111111, - 0x11f11111, - 0x01111111, - 0xbb9bb900, - 0xb9b9bb99, - 0xb99bbbbb, - 0xbbbb9b9b, - 0xb9bb99bb, - 0xb99999b9, - 0xb9b9b99b, - 0x00000bbb, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88aa, - 0xa88888a8, - 0xa8a8a88a, - 0x0a888aaa, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00000aaa, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0xbbbbbb00, - 0x999bbbbb, - 0x9bb99b9b, - 0xb9b9b9bb, - 0xb9b99bbb, - 0xb9b9b9bb, - 0xb9bb9b99, - 0x00000999, - 0x8a000000, - 0xaa88a888, - 0xa88888aa, - 0xa88a8a88, - 0xa88aa88a, - 0x88a8aaaa, - 0xa8aa8aaa, - 0x0888a88a, - 0x0b0b0b00, - 0x090b0b0b, - 0x0b090b0b, - 0x0909090b, - 0x09090b0b, - 0x09090b0b, - 0x09090b09, - 0x00000909, - 0x0a000000, - 0x0a080808, - 0x080a080a, - 0x080a0a08, - 0x080a080a, - 0x0808080a, - 0x0a0a0a08, - 0x0808080a, - 0xb0b0b000, - 0x9090b0b0, - 0x90b09090, - 0xb0b0b090, - 0xb0b090b0, - 0x90b0b0b0, - 0xb0b09090, - 0x00000090, - 0x80000000, - 0xa080a080, - 0xa08080a0, - 0xa0808080, - 0xa080a080, - 0x80a0a0a0, - 0xa0a080a0, - 0x00a0a0a0, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x33000000, - 0x3333f333, - 0x33333333, - 0x333333f3, - 0xf3333330, - 0x33333333, - 0x33f33333, - 0x00000333, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x99000000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88888000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x88a88a00, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 tdtrn_tbl_rev0[] = { - 0x061c061c, - 0x0050ee68, - 0xf592fe36, - 0xfe5212f6, - 0x00000c38, - 0xfe5212f6, - 0xf592fe36, - 0x0050ee68, - 0x061c061c, - 0xee680050, - 0xfe36f592, - 0x12f6fe52, - 0x0c380000, - 0x12f6fe52, - 0xfe36f592, - 0xee680050, - 0x061c061c, - 0x0050ee68, - 0xf592fe36, - 0xfe5212f6, - 0x00000c38, - 0xfe5212f6, - 0xf592fe36, - 0x0050ee68, - 0x061c061c, - 0xee680050, - 0xfe36f592, - 0x12f6fe52, - 0x0c380000, - 0x12f6fe52, - 0xfe36f592, - 0xee680050, - 0x05e305e3, - 0x004def0c, - 0xf5f3fe47, - 0xfe611246, - 0x00000bc7, - 0xfe611246, - 0xf5f3fe47, - 0x004def0c, - 0x05e305e3, - 0xef0c004d, - 0xfe47f5f3, - 0x1246fe61, - 0x0bc70000, - 0x1246fe61, - 0xfe47f5f3, - 0xef0c004d, - 0x05e305e3, - 0x004def0c, - 0xf5f3fe47, - 0xfe611246, - 0x00000bc7, - 0xfe611246, - 0xf5f3fe47, - 0x004def0c, - 0x05e305e3, - 0xef0c004d, - 0xfe47f5f3, - 0x1246fe61, - 0x0bc70000, - 0x1246fe61, - 0xfe47f5f3, - 0xef0c004d, - 0xfa58fa58, - 0xf895043b, - 0xff4c09c0, - 0xfbc6ffa8, - 0xfb84f384, - 0x0798f6f9, - 0x05760122, - 0x058409f6, - 0x0b500000, - 0x05b7f542, - 0x08860432, - 0x06ddfee7, - 0xfb84f384, - 0xf9d90664, - 0xf7e8025c, - 0x00fff7bd, - 0x05a805a8, - 0xf7bd00ff, - 0x025cf7e8, - 0x0664f9d9, - 0xf384fb84, - 0xfee706dd, - 0x04320886, - 0xf54205b7, - 0x00000b50, - 0x09f60584, - 0x01220576, - 0xf6f90798, - 0xf384fb84, - 0xffa8fbc6, - 0x09c0ff4c, - 0x043bf895, - 0x02d402d4, - 0x07de0270, - 0xfc96079c, - 0xf90afe94, - 0xfe00ff2c, - 0x02d4065d, - 0x092a0096, - 0x0014fbb8, - 0xfd2cfd2c, - 0x076afb3c, - 0x0096f752, - 0xf991fd87, - 0xfb2c0200, - 0xfeb8f960, - 0x08e0fc96, - 0x049802a8, - 0xfd2cfd2c, - 0x02a80498, - 0xfc9608e0, - 0xf960feb8, - 0x0200fb2c, - 0xfd87f991, - 0xf7520096, - 0xfb3c076a, - 0xfd2cfd2c, - 0xfbb80014, - 0x0096092a, - 0x065d02d4, - 0xff2cfe00, - 0xfe94f90a, - 0x079cfc96, - 0x027007de, - 0x02d402d4, - 0x027007de, - 0x079cfc96, - 0xfe94f90a, - 0xff2cfe00, - 0x065d02d4, - 0x0096092a, - 0xfbb80014, - 0xfd2cfd2c, - 0xfb3c076a, - 0xf7520096, - 0xfd87f991, - 0x0200fb2c, - 0xf960feb8, - 0xfc9608e0, - 0x02a80498, - 0xfd2cfd2c, - 0x049802a8, - 0x08e0fc96, - 0xfeb8f960, - 0xfb2c0200, - 0xf991fd87, - 0x0096f752, - 0x076afb3c, - 0xfd2cfd2c, - 0x0014fbb8, - 0x092a0096, - 0x02d4065d, - 0xfe00ff2c, - 0xf90afe94, - 0xfc96079c, - 0x07de0270, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x062a0000, - 0xfefa0759, - 0x08b80908, - 0xf396fc2d, - 0xf9d6045c, - 0xfc4ef608, - 0xf748f596, - 0x07b207bf, - 0x062a062a, - 0xf84ef841, - 0xf748f596, - 0x03b209f8, - 0xf9d6045c, - 0x0c6a03d3, - 0x08b80908, - 0x0106f8a7, - 0x062a0000, - 0xfefaf8a7, - 0x08b8f6f8, - 0xf39603d3, - 0xf9d6fba4, - 0xfc4e09f8, - 0xf7480a6a, - 0x07b2f841, - 0x062af9d6, - 0xf84e07bf, - 0xf7480a6a, - 0x03b2f608, - 0xf9d6fba4, - 0x0c6afc2d, - 0x08b8f6f8, - 0x01060759, - 0x062a0000, - 0xfefa0759, - 0x08b80908, - 0xf396fc2d, - 0xf9d6045c, - 0xfc4ef608, - 0xf748f596, - 0x07b207bf, - 0x062a062a, - 0xf84ef841, - 0xf748f596, - 0x03b209f8, - 0xf9d6045c, - 0x0c6a03d3, - 0x08b80908, - 0x0106f8a7, - 0x062a0000, - 0xfefaf8a7, - 0x08b8f6f8, - 0xf39603d3, - 0xf9d6fba4, - 0xfc4e09f8, - 0xf7480a6a, - 0x07b2f841, - 0x062af9d6, - 0xf84e07bf, - 0xf7480a6a, - 0x03b2f608, - 0xf9d6fba4, - 0x0c6afc2d, - 0x08b8f6f8, - 0x01060759, - 0x061c061c, - 0xff30009d, - 0xffb21141, - 0xfd87fb54, - 0xf65dfe59, - 0x02eef99e, - 0x0166f03c, - 0xfff809b6, - 0x000008a4, - 0x000af42b, - 0x00eff577, - 0xfa840bf2, - 0xfc02ff51, - 0x08260f67, - 0xfff0036f, - 0x0842f9c3, - 0x00000000, - 0x063df7be, - 0xfc910010, - 0xf099f7da, - 0x00af03fe, - 0xf40e057c, - 0x0a89ff11, - 0x0bd5fff6, - 0xf75c0000, - 0xf64a0008, - 0x0fc4fe9a, - 0x0662fd12, - 0x01a709a3, - 0x04ac0279, - 0xeebf004e, - 0xff6300d0, - 0xf9e4f9e4, - 0x00d0ff63, - 0x004eeebf, - 0x027904ac, - 0x09a301a7, - 0xfd120662, - 0xfe9a0fc4, - 0x0008f64a, - 0x0000f75c, - 0xfff60bd5, - 0xff110a89, - 0x057cf40e, - 0x03fe00af, - 0xf7daf099, - 0x0010fc91, - 0xf7be063d, - 0x00000000, - 0xf9c30842, - 0x036ffff0, - 0x0f670826, - 0xff51fc02, - 0x0bf2fa84, - 0xf57700ef, - 0xf42b000a, - 0x08a40000, - 0x09b6fff8, - 0xf03c0166, - 0xf99e02ee, - 0xfe59f65d, - 0xfb54fd87, - 0x1141ffb2, - 0x009dff30, - 0x05e30000, - 0xff060705, - 0x085408a0, - 0xf425fc59, - 0xfa1d042a, - 0xfc78f67a, - 0xf7acf60e, - 0x075a0766, - 0x05e305e3, - 0xf8a6f89a, - 0xf7acf60e, - 0x03880986, - 0xfa1d042a, - 0x0bdb03a7, - 0x085408a0, - 0x00faf8fb, - 0x05e30000, - 0xff06f8fb, - 0x0854f760, - 0xf42503a7, - 0xfa1dfbd6, - 0xfc780986, - 0xf7ac09f2, - 0x075af89a, - 0x05e3fa1d, - 0xf8a60766, - 0xf7ac09f2, - 0x0388f67a, - 0xfa1dfbd6, - 0x0bdbfc59, - 0x0854f760, - 0x00fa0705, - 0x05e30000, - 0xff060705, - 0x085408a0, - 0xf425fc59, - 0xfa1d042a, - 0xfc78f67a, - 0xf7acf60e, - 0x075a0766, - 0x05e305e3, - 0xf8a6f89a, - 0xf7acf60e, - 0x03880986, - 0xfa1d042a, - 0x0bdb03a7, - 0x085408a0, - 0x00faf8fb, - 0x05e30000, - 0xff06f8fb, - 0x0854f760, - 0xf42503a7, - 0xfa1dfbd6, - 0xfc780986, - 0xf7ac09f2, - 0x075af89a, - 0x05e3fa1d, - 0xf8a60766, - 0xf7ac09f2, - 0x0388f67a, - 0xfa1dfbd6, - 0x0bdbfc59, - 0x0854f760, - 0x00fa0705, - 0xfa58fa58, - 0xf8f0fe00, - 0x0448073d, - 0xfdc9fe46, - 0xf9910258, - 0x089d0407, - 0xfd5cf71a, - 0x02affde0, - 0x083e0496, - 0xff5a0740, - 0xff7afd97, - 0x00fe01f1, - 0x0009082e, - 0xfa94ff75, - 0xfecdf8ea, - 0xffb0f693, - 0xfd2cfa58, - 0x0433ff16, - 0xfba405dd, - 0xfa610341, - 0x06a606cb, - 0x0039fd2d, - 0x0677fa97, - 0x01fa05e0, - 0xf896003e, - 0x075a068b, - 0x012cfc3e, - 0xfa23f98d, - 0xfc7cfd43, - 0xff90fc0d, - 0x01c10982, - 0x00c601d6, - 0xfd2cfd2c, - 0x01d600c6, - 0x098201c1, - 0xfc0dff90, - 0xfd43fc7c, - 0xf98dfa23, - 0xfc3e012c, - 0x068b075a, - 0x003ef896, - 0x05e001fa, - 0xfa970677, - 0xfd2d0039, - 0x06cb06a6, - 0x0341fa61, - 0x05ddfba4, - 0xff160433, - 0xfa58fd2c, - 0xf693ffb0, - 0xf8eafecd, - 0xff75fa94, - 0x082e0009, - 0x01f100fe, - 0xfd97ff7a, - 0x0740ff5a, - 0x0496083e, - 0xfde002af, - 0xf71afd5c, - 0x0407089d, - 0x0258f991, - 0xfe46fdc9, - 0x073d0448, - 0xfe00f8f0, - 0xfd2cfd2c, - 0xfce00500, - 0xfc09fddc, - 0xfe680157, - 0x04c70571, - 0xfc3aff21, - 0xfcd70228, - 0x056d0277, - 0x0200fe00, - 0x0022f927, - 0xfe3c032b, - 0xfc44ff3c, - 0x03e9fbdb, - 0x04570313, - 0x04c9ff5c, - 0x000d03b8, - 0xfa580000, - 0xfbe900d2, - 0xf9d0fe0b, - 0x0125fdf9, - 0x042501bf, - 0x0328fa2b, - 0xffa902f0, - 0xfa250157, - 0x0200fe00, - 0x03740438, - 0xff0405fd, - 0x030cfe52, - 0x0037fb39, - 0xff6904c5, - 0x04f8fd23, - 0xfd31fc1b, - 0xfd2cfd2c, - 0xfc1bfd31, - 0xfd2304f8, - 0x04c5ff69, - 0xfb390037, - 0xfe52030c, - 0x05fdff04, - 0x04380374, - 0xfe000200, - 0x0157fa25, - 0x02f0ffa9, - 0xfa2b0328, - 0x01bf0425, - 0xfdf90125, - 0xfe0bf9d0, - 0x00d2fbe9, - 0x0000fa58, - 0x03b8000d, - 0xff5c04c9, - 0x03130457, - 0xfbdb03e9, - 0xff3cfc44, - 0x032bfe3c, - 0xf9270022, - 0xfe000200, - 0x0277056d, - 0x0228fcd7, - 0xff21fc3a, - 0x057104c7, - 0x0157fe68, - 0xfddcfc09, - 0x0500fce0, - 0xfd2cfd2c, - 0x0500fce0, - 0xfddcfc09, - 0x0157fe68, - 0x057104c7, - 0xff21fc3a, - 0x0228fcd7, - 0x0277056d, - 0xfe000200, - 0xf9270022, - 0x032bfe3c, - 0xff3cfc44, - 0xfbdb03e9, - 0x03130457, - 0xff5c04c9, - 0x03b8000d, - 0x0000fa58, - 0x00d2fbe9, - 0xfe0bf9d0, - 0xfdf90125, - 0x01bf0425, - 0xfa2b0328, - 0x02f0ffa9, - 0x0157fa25, - 0xfe000200, - 0x04380374, - 0x05fdff04, - 0xfe52030c, - 0xfb390037, - 0x04c5ff69, - 0xfd2304f8, - 0xfc1bfd31, - 0xfd2cfd2c, - 0xfd31fc1b, - 0x04f8fd23, - 0xff6904c5, - 0x0037fb39, - 0x030cfe52, - 0xff0405fd, - 0x03740438, - 0x0200fe00, - 0xfa250157, - 0xffa902f0, - 0x0328fa2b, - 0x042501bf, - 0x0125fdf9, - 0xf9d0fe0b, - 0xfbe900d2, - 0xfa580000, - 0x000d03b8, - 0x04c9ff5c, - 0x04570313, - 0x03e9fbdb, - 0xfc44ff3c, - 0xfe3c032b, - 0x0022f927, - 0x0200fe00, - 0x056d0277, - 0xfcd70228, - 0xfc3aff21, - 0x04c70571, - 0xfe680157, - 0xfc09fddc, - 0xfce00500, - 0x05a80000, - 0xff1006be, - 0x0800084a, - 0xf49cfc7e, - 0xfa580400, - 0xfc9cf6da, - 0xf800f672, - 0x0710071c, - 0x05a805a8, - 0xf8f0f8e4, - 0xf800f672, - 0x03640926, - 0xfa580400, - 0x0b640382, - 0x0800084a, - 0x00f0f942, - 0x05a80000, - 0xff10f942, - 0x0800f7b6, - 0xf49c0382, - 0xfa58fc00, - 0xfc9c0926, - 0xf800098e, - 0x0710f8e4, - 0x05a8fa58, - 0xf8f0071c, - 0xf800098e, - 0x0364f6da, - 0xfa58fc00, - 0x0b64fc7e, - 0x0800f7b6, - 0x00f006be, - 0x05a80000, - 0xff1006be, - 0x0800084a, - 0xf49cfc7e, - 0xfa580400, - 0xfc9cf6da, - 0xf800f672, - 0x0710071c, - 0x05a805a8, - 0xf8f0f8e4, - 0xf800f672, - 0x03640926, - 0xfa580400, - 0x0b640382, - 0x0800084a, - 0x00f0f942, - 0x05a80000, - 0xff10f942, - 0x0800f7b6, - 0xf49c0382, - 0xfa58fc00, - 0xfc9c0926, - 0xf800098e, - 0x0710f8e4, - 0x05a8fa58, - 0xf8f0071c, - 0xf800098e, - 0x0364f6da, - 0xfa58fc00, - 0x0b64fc7e, - 0x0800f7b6, - 0x00f006be, -}; - -const u32 intlv_tbl_rev0[] = { - 0x00802070, - 0x0671188d, - 0x0a60192c, - 0x0a300e46, - 0x00c1188d, - 0x080024d2, - 0x00000070, -}; - -const u16 pilot_tbl_rev0[] = { - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0xff0a, - 0xff82, - 0xffa0, - 0xff28, - 0xffff, - 0xffff, - 0xffff, - 0xffff, - 0xff82, - 0xffa0, - 0xff28, - 0xff0a, - 0xffff, - 0xffff, - 0xffff, - 0xffff, - 0xf83f, - 0xfa1f, - 0xfa97, - 0xfab5, - 0xf2bd, - 0xf0bf, - 0xffff, - 0xffff, - 0xf017, - 0xf815, - 0xf215, - 0xf095, - 0xf035, - 0xf01d, - 0xffff, - 0xffff, - 0xff08, - 0xff02, - 0xff80, - 0xff20, - 0xff08, - 0xff02, - 0xff80, - 0xff20, - 0xf01f, - 0xf817, - 0xfa15, - 0xf295, - 0xf0b5, - 0xf03d, - 0xffff, - 0xffff, - 0xf82a, - 0xfa0a, - 0xfa82, - 0xfaa0, - 0xf2a8, - 0xf0aa, - 0xffff, - 0xffff, - 0xf002, - 0xf800, - 0xf200, - 0xf080, - 0xf020, - 0xf008, - 0xffff, - 0xffff, - 0xf00a, - 0xf802, - 0xfa00, - 0xf280, - 0xf0a0, - 0xf028, - 0xffff, - 0xffff, -}; - -const u32 pltlut_tbl_rev0[] = { - 0x76540123, - 0x62407351, - 0x76543201, - 0x76540213, - 0x76540123, - 0x76430521, -}; - -const u32 tdi_tbl20_ant0_rev0[] = { - 0x00091226, - 0x000a1429, - 0x000b56ad, - 0x000c58b0, - 0x000d5ab3, - 0x000e9cb6, - 0x000f9eba, - 0x0000c13d, - 0x00020301, - 0x00030504, - 0x00040708, - 0x0005090b, - 0x00064b8e, - 0x00095291, - 0x000a5494, - 0x000b9718, - 0x000c9927, - 0x000d9b2a, - 0x000edd2e, - 0x000fdf31, - 0x000101b4, - 0x000243b7, - 0x000345bb, - 0x000447be, - 0x00058982, - 0x00068c05, - 0x00099309, - 0x000a950c, - 0x000bd78f, - 0x000cd992, - 0x000ddb96, - 0x000f1d99, - 0x00005fa8, - 0x0001422c, - 0x0002842f, - 0x00038632, - 0x00048835, - 0x0005ca38, - 0x0006ccbc, - 0x0009d3bf, - 0x000b1603, - 0x000c1806, - 0x000d1a0a, - 0x000e1c0d, - 0x000f5e10, - 0x00008093, - 0x00018297, - 0x0002c49a, - 0x0003c680, - 0x0004c880, - 0x00060b00, - 0x00070d00, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl20_ant1_rev0[] = { - 0x00014b26, - 0x00028d29, - 0x000393ad, - 0x00049630, - 0x0005d833, - 0x0006da36, - 0x00099c3a, - 0x000a9e3d, - 0x000bc081, - 0x000cc284, - 0x000dc488, - 0x000f068b, - 0x0000488e, - 0x00018b91, - 0x0002d214, - 0x0003d418, - 0x0004d6a7, - 0x000618aa, - 0x00071aae, - 0x0009dcb1, - 0x000b1eb4, - 0x000c0137, - 0x000d033b, - 0x000e053e, - 0x000f4702, - 0x00008905, - 0x00020c09, - 0x0003128c, - 0x0004148f, - 0x00051712, - 0x00065916, - 0x00091b19, - 0x000a1d28, - 0x000b5f2c, - 0x000c41af, - 0x000d43b2, - 0x000e85b5, - 0x000f87b8, - 0x0000c9bc, - 0x00024cbf, - 0x00035303, - 0x00045506, - 0x0005978a, - 0x0006998d, - 0x00095b90, - 0x000a5d93, - 0x000b9f97, - 0x000c821a, - 0x000d8400, - 0x000ec600, - 0x000fc800, - 0x00010a00, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl40_ant0_rev0[] = { - 0x0011a346, - 0x00136ccf, - 0x0014f5d9, - 0x001641e2, - 0x0017cb6b, - 0x00195475, - 0x001b2383, - 0x001cad0c, - 0x001e7616, - 0x0000821f, - 0x00020ba8, - 0x0003d4b2, - 0x00056447, - 0x00072dd0, - 0x0008b6da, - 0x000a02e3, - 0x000b8c6c, - 0x000d15f6, - 0x0011e484, - 0x0013ae0d, - 0x00153717, - 0x00168320, - 0x00180ca9, - 0x00199633, - 0x001b6548, - 0x001ceed1, - 0x001eb7db, - 0x0000c3e4, - 0x00024d6d, - 0x000416f7, - 0x0005a585, - 0x00076f0f, - 0x0008f818, - 0x000a4421, - 0x000bcdab, - 0x000d9734, - 0x00122649, - 0x0013efd2, - 0x001578dc, - 0x0016c4e5, - 0x00184e6e, - 0x001a17f8, - 0x001ba686, - 0x001d3010, - 0x001ef999, - 0x00010522, - 0x00028eac, - 0x00045835, - 0x0005e74a, - 0x0007b0d3, - 0x00093a5d, - 0x000a85e6, - 0x000c0f6f, - 0x000dd8f9, - 0x00126787, - 0x00143111, - 0x0015ba9a, - 0x00170623, - 0x00188fad, - 0x001a5936, - 0x001be84b, - 0x001db1d4, - 0x001f3b5e, - 0x000146e7, - 0x00031070, - 0x000499fa, - 0x00062888, - 0x0007f212, - 0x00097b9b, - 0x000ac7a4, - 0x000c50ae, - 0x000e1a37, - 0x0012a94c, - 0x001472d5, - 0x0015fc5f, - 0x00174868, - 0x0018d171, - 0x001a9afb, - 0x001c2989, - 0x001df313, - 0x001f7c9c, - 0x000188a5, - 0x000351af, - 0x0004db38, - 0x0006aa4d, - 0x000833d7, - 0x0009bd60, - 0x000b0969, - 0x000c9273, - 0x000e5bfc, - 0x00132a8a, - 0x0014b414, - 0x00163d9d, - 0x001789a6, - 0x001912b0, - 0x001adc39, - 0x001c6bce, - 0x001e34d8, - 0x001fbe61, - 0x0001ca6a, - 0x00039374, - 0x00051cfd, - 0x0006ec0b, - 0x00087515, - 0x0009fe9e, - 0x000b4aa7, - 0x000cd3b1, - 0x000e9d3a, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl40_ant1_rev0[] = { - 0x001edb36, - 0x000129ca, - 0x0002b353, - 0x00047cdd, - 0x0005c8e6, - 0x000791ef, - 0x00091bf9, - 0x000aaa07, - 0x000c3391, - 0x000dfd1a, - 0x00120923, - 0x0013d22d, - 0x00155c37, - 0x0016eacb, - 0x00187454, - 0x001a3dde, - 0x001b89e7, - 0x001d12f0, - 0x001f1cfa, - 0x00016b88, - 0x00033492, - 0x0004be1b, - 0x00060a24, - 0x0007d32e, - 0x00095d38, - 0x000aec4c, - 0x000c7555, - 0x000e3edf, - 0x00124ae8, - 0x001413f1, - 0x0015a37b, - 0x00172c89, - 0x0018b593, - 0x001a419c, - 0x001bcb25, - 0x001d942f, - 0x001f63b9, - 0x0001ad4d, - 0x00037657, - 0x0004c260, - 0x00068be9, - 0x000814f3, - 0x0009a47c, - 0x000b2d8a, - 0x000cb694, - 0x000e429d, - 0x00128c26, - 0x001455b0, - 0x0015e4ba, - 0x00176e4e, - 0x0018f758, - 0x001a8361, - 0x001c0cea, - 0x001dd674, - 0x001fa57d, - 0x0001ee8b, - 0x0003b795, - 0x0005039e, - 0x0006cd27, - 0x000856b1, - 0x0009e5c6, - 0x000b6f4f, - 0x000cf859, - 0x000e8462, - 0x00130deb, - 0x00149775, - 0x00162603, - 0x0017af8c, - 0x00193896, - 0x001ac49f, - 0x001c4e28, - 0x001e17b2, - 0x0000a6c7, - 0x00023050, - 0x0003f9da, - 0x00054563, - 0x00070eec, - 0x00089876, - 0x000a2704, - 0x000bb08d, - 0x000d3a17, - 0x001185a0, - 0x00134f29, - 0x0014d8b3, - 0x001667c8, - 0x0017f151, - 0x00197adb, - 0x001b0664, - 0x001c8fed, - 0x001e5977, - 0x0000e805, - 0x0002718f, - 0x00043b18, - 0x000586a1, - 0x0007502b, - 0x0008d9b4, - 0x000a68c9, - 0x000bf252, - 0x000dbbdc, - 0x0011c7e5, - 0x001390ee, - 0x00151a78, - 0x0016a906, - 0x00183290, - 0x0019bc19, - 0x001b4822, - 0x001cd12c, - 0x001e9ab5, - 0x00000000, - 0x00000000, -}; - -const u16 bdi_tbl_rev0[] = { - 0x0070, - 0x0126, - 0x012c, - 0x0246, - 0x048d, - 0x04d2, -}; - -const u32 chanest_tbl_rev0[] = { - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, -}; - -const u8 mcs_tbl_rev0[] = { - 0x00, - 0x08, - 0x0a, - 0x10, - 0x12, - 0x19, - 0x1a, - 0x1c, - 0x40, - 0x48, - 0x4a, - 0x50, - 0x52, - 0x59, - 0x5a, - 0x5c, - 0x80, - 0x88, - 0x8a, - 0x90, - 0x92, - 0x99, - 0x9a, - 0x9c, - 0xc0, - 0xc8, - 0xca, - 0xd0, - 0xd2, - 0xd9, - 0xda, - 0xdc, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x01, - 0x02, - 0x04, - 0x08, - 0x09, - 0x0a, - 0x0c, - 0x10, - 0x11, - 0x12, - 0x14, - 0x18, - 0x19, - 0x1a, - 0x1c, - 0x20, - 0x21, - 0x22, - 0x24, - 0x40, - 0x41, - 0x42, - 0x44, - 0x48, - 0x49, - 0x4a, - 0x4c, - 0x50, - 0x51, - 0x52, - 0x54, - 0x58, - 0x59, - 0x5a, - 0x5c, - 0x60, - 0x61, - 0x62, - 0x64, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, -}; - -const u32 noise_var_tbl0_rev0[] = { - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, -}; - -const u32 noise_var_tbl1_rev0[] = { - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, -}; - -const u8 est_pwr_lut_core0_rev0[] = { - 0x50, - 0x4f, - 0x4e, - 0x4d, - 0x4c, - 0x4b, - 0x4a, - 0x49, - 0x48, - 0x47, - 0x46, - 0x45, - 0x44, - 0x43, - 0x42, - 0x41, - 0x40, - 0x3f, - 0x3e, - 0x3d, - 0x3c, - 0x3b, - 0x3a, - 0x39, - 0x38, - 0x37, - 0x36, - 0x35, - 0x34, - 0x33, - 0x32, - 0x31, - 0x30, - 0x2f, - 0x2e, - 0x2d, - 0x2c, - 0x2b, - 0x2a, - 0x29, - 0x28, - 0x27, - 0x26, - 0x25, - 0x24, - 0x23, - 0x22, - 0x21, - 0x20, - 0x1f, - 0x1e, - 0x1d, - 0x1c, - 0x1b, - 0x1a, - 0x19, - 0x18, - 0x17, - 0x16, - 0x15, - 0x14, - 0x13, - 0x12, - 0x11, -}; - -const u8 est_pwr_lut_core1_rev0[] = { - 0x50, - 0x4f, - 0x4e, - 0x4d, - 0x4c, - 0x4b, - 0x4a, - 0x49, - 0x48, - 0x47, - 0x46, - 0x45, - 0x44, - 0x43, - 0x42, - 0x41, - 0x40, - 0x3f, - 0x3e, - 0x3d, - 0x3c, - 0x3b, - 0x3a, - 0x39, - 0x38, - 0x37, - 0x36, - 0x35, - 0x34, - 0x33, - 0x32, - 0x31, - 0x30, - 0x2f, - 0x2e, - 0x2d, - 0x2c, - 0x2b, - 0x2a, - 0x29, - 0x28, - 0x27, - 0x26, - 0x25, - 0x24, - 0x23, - 0x22, - 0x21, - 0x20, - 0x1f, - 0x1e, - 0x1d, - 0x1c, - 0x1b, - 0x1a, - 0x19, - 0x18, - 0x17, - 0x16, - 0x15, - 0x14, - 0x13, - 0x12, - 0x11, -}; - -const u8 adj_pwr_lut_core0_rev0[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, -}; - -const u8 adj_pwr_lut_core1_rev0[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, -}; - -const u32 gainctrl_lut_core0_rev0[] = { - 0x03cc2b44, - 0x03cc2b42, - 0x03cc2b40, - 0x03cc2b3e, - 0x03cc2b3d, - 0x03cc2b3b, - 0x03c82b44, - 0x03c82b42, - 0x03c82b40, - 0x03c82b3e, - 0x03c82b3d, - 0x03c82b3b, - 0x03c82b39, - 0x03c82b38, - 0x03c82b36, - 0x03c82b34, - 0x03c42b44, - 0x03c42b42, - 0x03c42b40, - 0x03c42b3e, - 0x03c42b3d, - 0x03c42b3b, - 0x03c42b39, - 0x03c42b38, - 0x03c42b36, - 0x03c42b34, - 0x03c42b33, - 0x03c42b32, - 0x03c42b30, - 0x03c42b2f, - 0x03c42b2d, - 0x03c02b44, - 0x03c02b42, - 0x03c02b40, - 0x03c02b3e, - 0x03c02b3d, - 0x03c02b3b, - 0x03c02b39, - 0x03c02b38, - 0x03c02b36, - 0x03c02b34, - 0x03b02b44, - 0x03b02b42, - 0x03b02b40, - 0x03b02b3e, - 0x03b02b3d, - 0x03b02b3b, - 0x03b02b39, - 0x03b02b38, - 0x03b02b36, - 0x03b02b34, - 0x03b02b33, - 0x03b02b32, - 0x03b02b30, - 0x03b02b2f, - 0x03b02b2d, - 0x03a02b44, - 0x03a02b42, - 0x03a02b40, - 0x03a02b3e, - 0x03a02b3d, - 0x03a02b3b, - 0x03a02b39, - 0x03a02b38, - 0x03a02b36, - 0x03a02b34, - 0x03902b44, - 0x03902b42, - 0x03902b40, - 0x03902b3e, - 0x03902b3d, - 0x03902b3b, - 0x03902b39, - 0x03902b38, - 0x03902b36, - 0x03902b34, - 0x03902b33, - 0x03902b32, - 0x03902b30, - 0x03802b44, - 0x03802b42, - 0x03802b40, - 0x03802b3e, - 0x03802b3d, - 0x03802b3b, - 0x03802b39, - 0x03802b38, - 0x03802b36, - 0x03802b34, - 0x03802b33, - 0x03802b32, - 0x03802b30, - 0x03802b2f, - 0x03802b2d, - 0x03802b2c, - 0x03802b2b, - 0x03802b2a, - 0x03802b29, - 0x03802b27, - 0x03802b26, - 0x03802b25, - 0x03802b24, - 0x03802b23, - 0x03802b22, - 0x03802b21, - 0x03802b20, - 0x03802b1f, - 0x03802b1e, - 0x03802b1e, - 0x03802b1d, - 0x03802b1c, - 0x03802b1b, - 0x03802b1a, - 0x03802b1a, - 0x03802b19, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x00002b00, -}; - -const u32 gainctrl_lut_core1_rev0[] = { - 0x03cc2b44, - 0x03cc2b42, - 0x03cc2b40, - 0x03cc2b3e, - 0x03cc2b3d, - 0x03cc2b3b, - 0x03c82b44, - 0x03c82b42, - 0x03c82b40, - 0x03c82b3e, - 0x03c82b3d, - 0x03c82b3b, - 0x03c82b39, - 0x03c82b38, - 0x03c82b36, - 0x03c82b34, - 0x03c42b44, - 0x03c42b42, - 0x03c42b40, - 0x03c42b3e, - 0x03c42b3d, - 0x03c42b3b, - 0x03c42b39, - 0x03c42b38, - 0x03c42b36, - 0x03c42b34, - 0x03c42b33, - 0x03c42b32, - 0x03c42b30, - 0x03c42b2f, - 0x03c42b2d, - 0x03c02b44, - 0x03c02b42, - 0x03c02b40, - 0x03c02b3e, - 0x03c02b3d, - 0x03c02b3b, - 0x03c02b39, - 0x03c02b38, - 0x03c02b36, - 0x03c02b34, - 0x03b02b44, - 0x03b02b42, - 0x03b02b40, - 0x03b02b3e, - 0x03b02b3d, - 0x03b02b3b, - 0x03b02b39, - 0x03b02b38, - 0x03b02b36, - 0x03b02b34, - 0x03b02b33, - 0x03b02b32, - 0x03b02b30, - 0x03b02b2f, - 0x03b02b2d, - 0x03a02b44, - 0x03a02b42, - 0x03a02b40, - 0x03a02b3e, - 0x03a02b3d, - 0x03a02b3b, - 0x03a02b39, - 0x03a02b38, - 0x03a02b36, - 0x03a02b34, - 0x03902b44, - 0x03902b42, - 0x03902b40, - 0x03902b3e, - 0x03902b3d, - 0x03902b3b, - 0x03902b39, - 0x03902b38, - 0x03902b36, - 0x03902b34, - 0x03902b33, - 0x03902b32, - 0x03902b30, - 0x03802b44, - 0x03802b42, - 0x03802b40, - 0x03802b3e, - 0x03802b3d, - 0x03802b3b, - 0x03802b39, - 0x03802b38, - 0x03802b36, - 0x03802b34, - 0x03802b33, - 0x03802b32, - 0x03802b30, - 0x03802b2f, - 0x03802b2d, - 0x03802b2c, - 0x03802b2b, - 0x03802b2a, - 0x03802b29, - 0x03802b27, - 0x03802b26, - 0x03802b25, - 0x03802b24, - 0x03802b23, - 0x03802b22, - 0x03802b21, - 0x03802b20, - 0x03802b1f, - 0x03802b1e, - 0x03802b1e, - 0x03802b1d, - 0x03802b1c, - 0x03802b1b, - 0x03802b1a, - 0x03802b1a, - 0x03802b19, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x03802b18, - 0x00002b00, -}; - -const u32 iq_lut_core0_rev0[] = { - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, -}; - -const u32 iq_lut_core1_rev0[] = { - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, - 0x0000007f, -}; - -const u16 loft_lut_core0_rev0[] = { - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, -}; - -const u16 loft_lut_core1_rev0[] = { - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, - 0x0000, - 0x0101, - 0x0002, - 0x0103, -}; - -const mimophytbl_info_t mimophytbl_info_rev0_volatile[] = { - {&bdi_tbl_rev0, sizeof(bdi_tbl_rev0) / sizeof(bdi_tbl_rev0[0]), 21, 0, - 16} - , - {&pltlut_tbl_rev0, sizeof(pltlut_tbl_rev0) / sizeof(pltlut_tbl_rev0[0]), - 20, 0, 32} - , - {&gainctrl_lut_core0_rev0, - sizeof(gainctrl_lut_core0_rev0) / sizeof(gainctrl_lut_core0_rev0[0]), - 26, 192, 32} - , - {&gainctrl_lut_core1_rev0, - sizeof(gainctrl_lut_core1_rev0) / sizeof(gainctrl_lut_core1_rev0[0]), - 27, 192, 32} - , - - {&est_pwr_lut_core0_rev0, - sizeof(est_pwr_lut_core0_rev0) / sizeof(est_pwr_lut_core0_rev0[0]), 26, - 0, 8} - , - {&est_pwr_lut_core1_rev0, - sizeof(est_pwr_lut_core1_rev0) / sizeof(est_pwr_lut_core1_rev0[0]), 27, - 0, 8} - , - {&adj_pwr_lut_core0_rev0, - sizeof(adj_pwr_lut_core0_rev0) / sizeof(adj_pwr_lut_core0_rev0[0]), 26, - 64, 8} - , - {&adj_pwr_lut_core1_rev0, - sizeof(adj_pwr_lut_core1_rev0) / sizeof(adj_pwr_lut_core1_rev0[0]), 27, - 64, 8} - , - {&iq_lut_core0_rev0, - sizeof(iq_lut_core0_rev0) / sizeof(iq_lut_core0_rev0[0]), 26, 320, 32} - , - {&iq_lut_core1_rev0, - sizeof(iq_lut_core1_rev0) / sizeof(iq_lut_core1_rev0[0]), 27, 320, 32} - , - {&loft_lut_core0_rev0, - sizeof(loft_lut_core0_rev0) / sizeof(loft_lut_core0_rev0[0]), 26, 448, - 16} - , - {&loft_lut_core1_rev0, - sizeof(loft_lut_core1_rev0) / sizeof(loft_lut_core1_rev0[0]), 27, 448, - 16} - , -}; - -const mimophytbl_info_t mimophytbl_info_rev0[] = { - {&frame_struct_rev0, - sizeof(frame_struct_rev0) / sizeof(frame_struct_rev0[0]), 10, 0, 32} - , - {&frame_lut_rev0, sizeof(frame_lut_rev0) / sizeof(frame_lut_rev0[0]), - 24, 0, 8} - , - {&tmap_tbl_rev0, sizeof(tmap_tbl_rev0) / sizeof(tmap_tbl_rev0[0]), 12, - 0, 32} - , - {&tdtrn_tbl_rev0, sizeof(tdtrn_tbl_rev0) / sizeof(tdtrn_tbl_rev0[0]), - 14, 0, 32} - , - {&intlv_tbl_rev0, sizeof(intlv_tbl_rev0) / sizeof(intlv_tbl_rev0[0]), - 13, 0, 32} - , - {&pilot_tbl_rev0, sizeof(pilot_tbl_rev0) / sizeof(pilot_tbl_rev0[0]), - 11, 0, 16} - , - {&tdi_tbl20_ant0_rev0, - sizeof(tdi_tbl20_ant0_rev0) / sizeof(tdi_tbl20_ant0_rev0[0]), 19, 128, - 32} - , - {&tdi_tbl20_ant1_rev0, - sizeof(tdi_tbl20_ant1_rev0) / sizeof(tdi_tbl20_ant1_rev0[0]), 19, 256, - 32} - , - {&tdi_tbl40_ant0_rev0, - sizeof(tdi_tbl40_ant0_rev0) / sizeof(tdi_tbl40_ant0_rev0[0]), 19, 640, - 32} - , - {&tdi_tbl40_ant1_rev0, - sizeof(tdi_tbl40_ant1_rev0) / sizeof(tdi_tbl40_ant1_rev0[0]), 19, 768, - 32} - , - {&chanest_tbl_rev0, - sizeof(chanest_tbl_rev0) / sizeof(chanest_tbl_rev0[0]), 22, 0, 32} - , - {&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0, 8} - , - {&noise_var_tbl0_rev0, - sizeof(noise_var_tbl0_rev0) / sizeof(noise_var_tbl0_rev0[0]), 16, 0, - 32} - , - {&noise_var_tbl1_rev0, - sizeof(noise_var_tbl1_rev0) / sizeof(noise_var_tbl1_rev0[0]), 16, 128, - 32} - , -}; - -const u32 mimophytbl_info_sz_rev0 = - sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]); -const u32 mimophytbl_info_sz_rev0_volatile = - sizeof(mimophytbl_info_rev0_volatile) / - sizeof(mimophytbl_info_rev0_volatile[0]); - -const u16 ant_swctrl_tbl_rev3[] = { - 0x0082, - 0x0082, - 0x0211, - 0x0222, - 0x0328, - 0x0000, - 0x0000, - 0x0000, - 0x0144, - 0x0000, - 0x0000, - 0x0000, - 0x0188, - 0x0000, - 0x0000, - 0x0000, - 0x0082, - 0x0082, - 0x0211, - 0x0222, - 0x0328, - 0x0000, - 0x0000, - 0x0000, - 0x0144, - 0x0000, - 0x0000, - 0x0000, - 0x0188, - 0x0000, - 0x0000, - 0x0000, -}; - -const u16 ant_swctrl_tbl_rev3_1[] = { - 0x0022, - 0x0022, - 0x0011, - 0x0022, - 0x0022, - 0x0000, - 0x0000, - 0x0000, - 0x0011, - 0x0000, - 0x0000, - 0x0000, - 0x0022, - 0x0000, - 0x0000, - 0x0000, - 0x0022, - 0x0022, - 0x0011, - 0x0022, - 0x0022, - 0x0000, - 0x0000, - 0x0000, - 0x0011, - 0x0000, - 0x0000, - 0x0000, - 0x0022, - 0x0000, - 0x0000, - 0x0000, -}; - -const u16 ant_swctrl_tbl_rev3_2[] = { - 0x0088, - 0x0088, - 0x0044, - 0x0088, - 0x0088, - 0x0000, - 0x0000, - 0x0000, - 0x0044, - 0x0000, - 0x0000, - 0x0000, - 0x0088, - 0x0000, - 0x0000, - 0x0000, - 0x0088, - 0x0088, - 0x0044, - 0x0088, - 0x0088, - 0x0000, - 0x0000, - 0x0000, - 0x0044, - 0x0000, - 0x0000, - 0x0000, - 0x0088, - 0x0000, - 0x0000, - 0x0000, -}; - -const u16 ant_swctrl_tbl_rev3_3[] = { - 0x022, - 0x022, - 0x011, - 0x022, - 0x000, - 0x000, - 0x000, - 0x000, - 0x011, - 0x000, - 0x000, - 0x000, - 0x022, - 0x000, - 0x000, - 0x3cc, - 0x022, - 0x022, - 0x011, - 0x022, - 0x000, - 0x000, - 0x000, - 0x000, - 0x011, - 0x000, - 0x000, - 0x000, - 0x022, - 0x000, - 0x000, - 0x3cc -}; - -const u32 frame_struct_rev3[] = { - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x09804506, - 0x00100030, - 0x09804507, - 0x00100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a0c, - 0x00100004, - 0x01000a0d, - 0x00100024, - 0x0980450e, - 0x00100034, - 0x0980450f, - 0x00100034, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a04, - 0x00100000, - 0x11008a05, - 0x00100020, - 0x1980c506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x01800504, - 0x00100030, - 0x11808505, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000a04, - 0x00100000, - 0x11008a05, - 0x00100020, - 0x21810506, - 0x00100030, - 0x21810506, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x1980c50e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x0180050c, - 0x00100038, - 0x1180850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x1980c506, - 0x00100030, - 0x1980c506, - 0x00100030, - 0x11808504, - 0x00100030, - 0x3981ca05, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x10008a04, - 0x00100000, - 0x3981ca05, - 0x00100030, - 0x1980c506, - 0x00100030, - 0x29814507, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a0c, - 0x00100008, - 0x01000a0d, - 0x00100028, - 0x1980c50e, - 0x00100038, - 0x1980c50e, - 0x00100038, - 0x1180850c, - 0x00100038, - 0x3981ca0d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x10008a0c, - 0x00100008, - 0x3981ca0d, - 0x00100038, - 0x1980c50e, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x02001405, - 0x00100040, - 0x0b004a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x43020a04, - 0x00100060, - 0x1b00ca05, - 0x00100060, - 0x23010a07, - 0x01500060, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x13008a06, - 0x01900060, - 0x13008a06, - 0x01900060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x0200140d, - 0x00100050, - 0x0b004a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x50029404, - 0x00100000, - 0x32019405, - 0x00100040, - 0x0b004a06, - 0x01900060, - 0x0b004a06, - 0x01900060, - 0x5b02ca04, - 0x00100060, - 0x3b01d405, - 0x00100060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x5802d404, - 0x00100000, - 0x3b01d405, - 0x00100060, - 0x0b004a06, - 0x01900060, - 0x23010a07, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x5002940c, - 0x00100010, - 0x3201940d, - 0x00100050, - 0x0b004a0e, - 0x01900070, - 0x0b004a0e, - 0x01900070, - 0x5b02ca0c, - 0x00100070, - 0x3b01d40d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x5802d40c, - 0x00100010, - 0x3b01d40d, - 0x00100070, - 0x0b004a0e, - 0x01900070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x000f4800, - 0x62031405, - 0x00100040, - 0x53028a06, - 0x01900060, - 0x53028a07, - 0x01900060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x000f4808, - 0x6203140d, - 0x00100048, - 0x53028a0e, - 0x01900068, - 0x53028a0f, - 0x01900068, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100004, - 0x11008a0d, - 0x00100024, - 0x1980c50e, - 0x00100034, - 0x2181050e, - 0x00100034, - 0x2181050e, - 0x00100034, - 0x0180050c, - 0x00100038, - 0x1180850d, - 0x00100038, - 0x1181850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000a0c, - 0x00100008, - 0x11008a0d, - 0x00100028, - 0x2181050e, - 0x00100038, - 0x2181050e, - 0x00100038, - 0x1181850d, - 0x00100038, - 0x2981450f, - 0x01100038, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x08004a04, - 0x00100000, - 0x01000a05, - 0x00100020, - 0x0180c506, - 0x00100030, - 0x0180c506, - 0x00100030, - 0x2180c50c, - 0x00100030, - 0x49820a0d, - 0x0016a130, - 0x41824a0d, - 0x0016a130, - 0x2981450f, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x2000ca0c, - 0x00100000, - 0x49820a0d, - 0x0016a130, - 0x1980c50e, - 0x00100030, - 0x41824a0d, - 0x0016a130, - 0x2981450f, - 0x01100030, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100008, - 0x0200140d, - 0x00100048, - 0x0b004a0e, - 0x01900068, - 0x13008a0e, - 0x01900068, - 0x13008a0e, - 0x01900068, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x1b014a0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x13008a0e, - 0x01900070, - 0x13008a0e, - 0x01900070, - 0x1b014a0d, - 0x00100070, - 0x23010a0f, - 0x01500070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x50029404, - 0x00100000, - 0x32019405, - 0x00100040, - 0x03004a06, - 0x01900060, - 0x03004a06, - 0x01900060, - 0x6b030a0c, - 0x00100060, - 0x4b02140d, - 0x0016a160, - 0x4302540d, - 0x0016a160, - 0x23010a0f, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x6b03140c, - 0x00100060, - 0x4b02140d, - 0x0016a160, - 0x0b004a0e, - 0x01900060, - 0x4302540d, - 0x0016a160, - 0x23010a0f, - 0x01500060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x53028a06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x43020a04, - 0x00100060, - 0x1b00ca05, - 0x00100060, - 0x53028a07, - 0x0190c060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x53028a0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x43020a0c, - 0x00100070, - 0x1b00ca0d, - 0x00100070, - 0x53028a0f, - 0x0190c070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40021404, - 0x00100000, - 0x1a00d405, - 0x00100040, - 0x5b02ca06, - 0x01900060, - 0x5b02ca06, - 0x01900060, - 0x53028a07, - 0x0190c060, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x4002140c, - 0x00100010, - 0x1a00d40d, - 0x00100050, - 0x5b02ca0e, - 0x01900070, - 0x5b02ca0e, - 0x01900070, - 0x53028a0f, - 0x0190c070, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u16 pilot_tbl_rev3[] = { - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0xff08, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0x80d5, - 0xff0a, - 0xff82, - 0xffa0, - 0xff28, - 0xffff, - 0xffff, - 0xffff, - 0xffff, - 0xff82, - 0xffa0, - 0xff28, - 0xff0a, - 0xffff, - 0xffff, - 0xffff, - 0xffff, - 0xf83f, - 0xfa1f, - 0xfa97, - 0xfab5, - 0xf2bd, - 0xf0bf, - 0xffff, - 0xffff, - 0xf017, - 0xf815, - 0xf215, - 0xf095, - 0xf035, - 0xf01d, - 0xffff, - 0xffff, - 0xff08, - 0xff02, - 0xff80, - 0xff20, - 0xff08, - 0xff02, - 0xff80, - 0xff20, - 0xf01f, - 0xf817, - 0xfa15, - 0xf295, - 0xf0b5, - 0xf03d, - 0xffff, - 0xffff, - 0xf82a, - 0xfa0a, - 0xfa82, - 0xfaa0, - 0xf2a8, - 0xf0aa, - 0xffff, - 0xffff, - 0xf002, - 0xf800, - 0xf200, - 0xf080, - 0xf020, - 0xf008, - 0xffff, - 0xffff, - 0xf00a, - 0xf802, - 0xfa00, - 0xf280, - 0xf0a0, - 0xf028, - 0xffff, - 0xffff, -}; - -const u32 tmap_tbl_rev3[] = { - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x000aa888, - 0x88880000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00011111, - 0x11110000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00088aaa, - 0xaaaa0000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xaaa8aaa0, - 0x8aaa8aaa, - 0xaa8a8a8a, - 0x000aaa88, - 0x8aaa0000, - 0xaaa8a888, - 0x8aa88a8a, - 0x8a88a888, - 0x08080a00, - 0x0a08080a, - 0x080a0a08, - 0x00080808, - 0x080a0000, - 0x080a0808, - 0x080a0808, - 0x0a0a0a08, - 0xa0a0a0a0, - 0x80a0a080, - 0x8080a0a0, - 0x00008080, - 0x80a00000, - 0x80a080a0, - 0xa080a0a0, - 0x8080a0a0, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x99999000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x22000000, - 0x2222b222, - 0x22222222, - 0x222222b2, - 0xb2222220, - 0x22222222, - 0x22d22222, - 0x00000222, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x33000000, - 0x3333b333, - 0x33333333, - 0x333333b3, - 0xb3333330, - 0x33333333, - 0x33d33333, - 0x00000333, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x99b99b00, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb99, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x22222200, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0x22222222, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x11111111, - 0xf1111111, - 0x11111111, - 0x11f11111, - 0x01111111, - 0xbb9bb900, - 0xb9b9bb99, - 0xb99bbbbb, - 0xbbbb9b9b, - 0xb9bb99bb, - 0xb99999b9, - 0xb9b9b99b, - 0x00000bbb, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88aa, - 0xa88888a8, - 0xa8a8a88a, - 0x0a888aaa, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00000aaa, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0xbbbbbb00, - 0x999bbbbb, - 0x9bb99b9b, - 0xb9b9b9bb, - 0xb9b99bbb, - 0xb9b9b9bb, - 0xb9bb9b99, - 0x00000999, - 0x8a000000, - 0xaa88a888, - 0xa88888aa, - 0xa88a8a88, - 0xa88aa88a, - 0x88a8aaaa, - 0xa8aa8aaa, - 0x0888a88a, - 0x0b0b0b00, - 0x090b0b0b, - 0x0b090b0b, - 0x0909090b, - 0x09090b0b, - 0x09090b0b, - 0x09090b09, - 0x00000909, - 0x0a000000, - 0x0a080808, - 0x080a080a, - 0x080a0a08, - 0x080a080a, - 0x0808080a, - 0x0a0a0a08, - 0x0808080a, - 0xb0b0b000, - 0x9090b0b0, - 0x90b09090, - 0xb0b0b090, - 0xb0b090b0, - 0x90b0b0b0, - 0xb0b09090, - 0x00000090, - 0x80000000, - 0xa080a080, - 0xa08080a0, - 0xa0808080, - 0xa080a080, - 0x80a0a0a0, - 0xa0a080a0, - 0x00a0a0a0, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x33000000, - 0x3333f333, - 0x33333333, - 0x333333f3, - 0xf3333330, - 0x33333333, - 0x33f33333, - 0x00000333, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x99000000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88888000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x88a88a00, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 intlv_tbl_rev3[] = { - 0x00802070, - 0x0671188d, - 0x0a60192c, - 0x0a300e46, - 0x00c1188d, - 0x080024d2, - 0x00000070, -}; - -const u32 tdtrn_tbl_rev3[] = { - 0x061c061c, - 0x0050ee68, - 0xf592fe36, - 0xfe5212f6, - 0x00000c38, - 0xfe5212f6, - 0xf592fe36, - 0x0050ee68, - 0x061c061c, - 0xee680050, - 0xfe36f592, - 0x12f6fe52, - 0x0c380000, - 0x12f6fe52, - 0xfe36f592, - 0xee680050, - 0x061c061c, - 0x0050ee68, - 0xf592fe36, - 0xfe5212f6, - 0x00000c38, - 0xfe5212f6, - 0xf592fe36, - 0x0050ee68, - 0x061c061c, - 0xee680050, - 0xfe36f592, - 0x12f6fe52, - 0x0c380000, - 0x12f6fe52, - 0xfe36f592, - 0xee680050, - 0x05e305e3, - 0x004def0c, - 0xf5f3fe47, - 0xfe611246, - 0x00000bc7, - 0xfe611246, - 0xf5f3fe47, - 0x004def0c, - 0x05e305e3, - 0xef0c004d, - 0xfe47f5f3, - 0x1246fe61, - 0x0bc70000, - 0x1246fe61, - 0xfe47f5f3, - 0xef0c004d, - 0x05e305e3, - 0x004def0c, - 0xf5f3fe47, - 0xfe611246, - 0x00000bc7, - 0xfe611246, - 0xf5f3fe47, - 0x004def0c, - 0x05e305e3, - 0xef0c004d, - 0xfe47f5f3, - 0x1246fe61, - 0x0bc70000, - 0x1246fe61, - 0xfe47f5f3, - 0xef0c004d, - 0xfa58fa58, - 0xf895043b, - 0xff4c09c0, - 0xfbc6ffa8, - 0xfb84f384, - 0x0798f6f9, - 0x05760122, - 0x058409f6, - 0x0b500000, - 0x05b7f542, - 0x08860432, - 0x06ddfee7, - 0xfb84f384, - 0xf9d90664, - 0xf7e8025c, - 0x00fff7bd, - 0x05a805a8, - 0xf7bd00ff, - 0x025cf7e8, - 0x0664f9d9, - 0xf384fb84, - 0xfee706dd, - 0x04320886, - 0xf54205b7, - 0x00000b50, - 0x09f60584, - 0x01220576, - 0xf6f90798, - 0xf384fb84, - 0xffa8fbc6, - 0x09c0ff4c, - 0x043bf895, - 0x02d402d4, - 0x07de0270, - 0xfc96079c, - 0xf90afe94, - 0xfe00ff2c, - 0x02d4065d, - 0x092a0096, - 0x0014fbb8, - 0xfd2cfd2c, - 0x076afb3c, - 0x0096f752, - 0xf991fd87, - 0xfb2c0200, - 0xfeb8f960, - 0x08e0fc96, - 0x049802a8, - 0xfd2cfd2c, - 0x02a80498, - 0xfc9608e0, - 0xf960feb8, - 0x0200fb2c, - 0xfd87f991, - 0xf7520096, - 0xfb3c076a, - 0xfd2cfd2c, - 0xfbb80014, - 0x0096092a, - 0x065d02d4, - 0xff2cfe00, - 0xfe94f90a, - 0x079cfc96, - 0x027007de, - 0x02d402d4, - 0x027007de, - 0x079cfc96, - 0xfe94f90a, - 0xff2cfe00, - 0x065d02d4, - 0x0096092a, - 0xfbb80014, - 0xfd2cfd2c, - 0xfb3c076a, - 0xf7520096, - 0xfd87f991, - 0x0200fb2c, - 0xf960feb8, - 0xfc9608e0, - 0x02a80498, - 0xfd2cfd2c, - 0x049802a8, - 0x08e0fc96, - 0xfeb8f960, - 0xfb2c0200, - 0xf991fd87, - 0x0096f752, - 0x076afb3c, - 0xfd2cfd2c, - 0x0014fbb8, - 0x092a0096, - 0x02d4065d, - 0xfe00ff2c, - 0xf90afe94, - 0xfc96079c, - 0x07de0270, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x062a0000, - 0xfefa0759, - 0x08b80908, - 0xf396fc2d, - 0xf9d6045c, - 0xfc4ef608, - 0xf748f596, - 0x07b207bf, - 0x062a062a, - 0xf84ef841, - 0xf748f596, - 0x03b209f8, - 0xf9d6045c, - 0x0c6a03d3, - 0x08b80908, - 0x0106f8a7, - 0x062a0000, - 0xfefaf8a7, - 0x08b8f6f8, - 0xf39603d3, - 0xf9d6fba4, - 0xfc4e09f8, - 0xf7480a6a, - 0x07b2f841, - 0x062af9d6, - 0xf84e07bf, - 0xf7480a6a, - 0x03b2f608, - 0xf9d6fba4, - 0x0c6afc2d, - 0x08b8f6f8, - 0x01060759, - 0x062a0000, - 0xfefa0759, - 0x08b80908, - 0xf396fc2d, - 0xf9d6045c, - 0xfc4ef608, - 0xf748f596, - 0x07b207bf, - 0x062a062a, - 0xf84ef841, - 0xf748f596, - 0x03b209f8, - 0xf9d6045c, - 0x0c6a03d3, - 0x08b80908, - 0x0106f8a7, - 0x062a0000, - 0xfefaf8a7, - 0x08b8f6f8, - 0xf39603d3, - 0xf9d6fba4, - 0xfc4e09f8, - 0xf7480a6a, - 0x07b2f841, - 0x062af9d6, - 0xf84e07bf, - 0xf7480a6a, - 0x03b2f608, - 0xf9d6fba4, - 0x0c6afc2d, - 0x08b8f6f8, - 0x01060759, - 0x061c061c, - 0xff30009d, - 0xffb21141, - 0xfd87fb54, - 0xf65dfe59, - 0x02eef99e, - 0x0166f03c, - 0xfff809b6, - 0x000008a4, - 0x000af42b, - 0x00eff577, - 0xfa840bf2, - 0xfc02ff51, - 0x08260f67, - 0xfff0036f, - 0x0842f9c3, - 0x00000000, - 0x063df7be, - 0xfc910010, - 0xf099f7da, - 0x00af03fe, - 0xf40e057c, - 0x0a89ff11, - 0x0bd5fff6, - 0xf75c0000, - 0xf64a0008, - 0x0fc4fe9a, - 0x0662fd12, - 0x01a709a3, - 0x04ac0279, - 0xeebf004e, - 0xff6300d0, - 0xf9e4f9e4, - 0x00d0ff63, - 0x004eeebf, - 0x027904ac, - 0x09a301a7, - 0xfd120662, - 0xfe9a0fc4, - 0x0008f64a, - 0x0000f75c, - 0xfff60bd5, - 0xff110a89, - 0x057cf40e, - 0x03fe00af, - 0xf7daf099, - 0x0010fc91, - 0xf7be063d, - 0x00000000, - 0xf9c30842, - 0x036ffff0, - 0x0f670826, - 0xff51fc02, - 0x0bf2fa84, - 0xf57700ef, - 0xf42b000a, - 0x08a40000, - 0x09b6fff8, - 0xf03c0166, - 0xf99e02ee, - 0xfe59f65d, - 0xfb54fd87, - 0x1141ffb2, - 0x009dff30, - 0x05e30000, - 0xff060705, - 0x085408a0, - 0xf425fc59, - 0xfa1d042a, - 0xfc78f67a, - 0xf7acf60e, - 0x075a0766, - 0x05e305e3, - 0xf8a6f89a, - 0xf7acf60e, - 0x03880986, - 0xfa1d042a, - 0x0bdb03a7, - 0x085408a0, - 0x00faf8fb, - 0x05e30000, - 0xff06f8fb, - 0x0854f760, - 0xf42503a7, - 0xfa1dfbd6, - 0xfc780986, - 0xf7ac09f2, - 0x075af89a, - 0x05e3fa1d, - 0xf8a60766, - 0xf7ac09f2, - 0x0388f67a, - 0xfa1dfbd6, - 0x0bdbfc59, - 0x0854f760, - 0x00fa0705, - 0x05e30000, - 0xff060705, - 0x085408a0, - 0xf425fc59, - 0xfa1d042a, - 0xfc78f67a, - 0xf7acf60e, - 0x075a0766, - 0x05e305e3, - 0xf8a6f89a, - 0xf7acf60e, - 0x03880986, - 0xfa1d042a, - 0x0bdb03a7, - 0x085408a0, - 0x00faf8fb, - 0x05e30000, - 0xff06f8fb, - 0x0854f760, - 0xf42503a7, - 0xfa1dfbd6, - 0xfc780986, - 0xf7ac09f2, - 0x075af89a, - 0x05e3fa1d, - 0xf8a60766, - 0xf7ac09f2, - 0x0388f67a, - 0xfa1dfbd6, - 0x0bdbfc59, - 0x0854f760, - 0x00fa0705, - 0xfa58fa58, - 0xf8f0fe00, - 0x0448073d, - 0xfdc9fe46, - 0xf9910258, - 0x089d0407, - 0xfd5cf71a, - 0x02affde0, - 0x083e0496, - 0xff5a0740, - 0xff7afd97, - 0x00fe01f1, - 0x0009082e, - 0xfa94ff75, - 0xfecdf8ea, - 0xffb0f693, - 0xfd2cfa58, - 0x0433ff16, - 0xfba405dd, - 0xfa610341, - 0x06a606cb, - 0x0039fd2d, - 0x0677fa97, - 0x01fa05e0, - 0xf896003e, - 0x075a068b, - 0x012cfc3e, - 0xfa23f98d, - 0xfc7cfd43, - 0xff90fc0d, - 0x01c10982, - 0x00c601d6, - 0xfd2cfd2c, - 0x01d600c6, - 0x098201c1, - 0xfc0dff90, - 0xfd43fc7c, - 0xf98dfa23, - 0xfc3e012c, - 0x068b075a, - 0x003ef896, - 0x05e001fa, - 0xfa970677, - 0xfd2d0039, - 0x06cb06a6, - 0x0341fa61, - 0x05ddfba4, - 0xff160433, - 0xfa58fd2c, - 0xf693ffb0, - 0xf8eafecd, - 0xff75fa94, - 0x082e0009, - 0x01f100fe, - 0xfd97ff7a, - 0x0740ff5a, - 0x0496083e, - 0xfde002af, - 0xf71afd5c, - 0x0407089d, - 0x0258f991, - 0xfe46fdc9, - 0x073d0448, - 0xfe00f8f0, - 0xfd2cfd2c, - 0xfce00500, - 0xfc09fddc, - 0xfe680157, - 0x04c70571, - 0xfc3aff21, - 0xfcd70228, - 0x056d0277, - 0x0200fe00, - 0x0022f927, - 0xfe3c032b, - 0xfc44ff3c, - 0x03e9fbdb, - 0x04570313, - 0x04c9ff5c, - 0x000d03b8, - 0xfa580000, - 0xfbe900d2, - 0xf9d0fe0b, - 0x0125fdf9, - 0x042501bf, - 0x0328fa2b, - 0xffa902f0, - 0xfa250157, - 0x0200fe00, - 0x03740438, - 0xff0405fd, - 0x030cfe52, - 0x0037fb39, - 0xff6904c5, - 0x04f8fd23, - 0xfd31fc1b, - 0xfd2cfd2c, - 0xfc1bfd31, - 0xfd2304f8, - 0x04c5ff69, - 0xfb390037, - 0xfe52030c, - 0x05fdff04, - 0x04380374, - 0xfe000200, - 0x0157fa25, - 0x02f0ffa9, - 0xfa2b0328, - 0x01bf0425, - 0xfdf90125, - 0xfe0bf9d0, - 0x00d2fbe9, - 0x0000fa58, - 0x03b8000d, - 0xff5c04c9, - 0x03130457, - 0xfbdb03e9, - 0xff3cfc44, - 0x032bfe3c, - 0xf9270022, - 0xfe000200, - 0x0277056d, - 0x0228fcd7, - 0xff21fc3a, - 0x057104c7, - 0x0157fe68, - 0xfddcfc09, - 0x0500fce0, - 0xfd2cfd2c, - 0x0500fce0, - 0xfddcfc09, - 0x0157fe68, - 0x057104c7, - 0xff21fc3a, - 0x0228fcd7, - 0x0277056d, - 0xfe000200, - 0xf9270022, - 0x032bfe3c, - 0xff3cfc44, - 0xfbdb03e9, - 0x03130457, - 0xff5c04c9, - 0x03b8000d, - 0x0000fa58, - 0x00d2fbe9, - 0xfe0bf9d0, - 0xfdf90125, - 0x01bf0425, - 0xfa2b0328, - 0x02f0ffa9, - 0x0157fa25, - 0xfe000200, - 0x04380374, - 0x05fdff04, - 0xfe52030c, - 0xfb390037, - 0x04c5ff69, - 0xfd2304f8, - 0xfc1bfd31, - 0xfd2cfd2c, - 0xfd31fc1b, - 0x04f8fd23, - 0xff6904c5, - 0x0037fb39, - 0x030cfe52, - 0xff0405fd, - 0x03740438, - 0x0200fe00, - 0xfa250157, - 0xffa902f0, - 0x0328fa2b, - 0x042501bf, - 0x0125fdf9, - 0xf9d0fe0b, - 0xfbe900d2, - 0xfa580000, - 0x000d03b8, - 0x04c9ff5c, - 0x04570313, - 0x03e9fbdb, - 0xfc44ff3c, - 0xfe3c032b, - 0x0022f927, - 0x0200fe00, - 0x056d0277, - 0xfcd70228, - 0xfc3aff21, - 0x04c70571, - 0xfe680157, - 0xfc09fddc, - 0xfce00500, - 0x05a80000, - 0xff1006be, - 0x0800084a, - 0xf49cfc7e, - 0xfa580400, - 0xfc9cf6da, - 0xf800f672, - 0x0710071c, - 0x05a805a8, - 0xf8f0f8e4, - 0xf800f672, - 0x03640926, - 0xfa580400, - 0x0b640382, - 0x0800084a, - 0x00f0f942, - 0x05a80000, - 0xff10f942, - 0x0800f7b6, - 0xf49c0382, - 0xfa58fc00, - 0xfc9c0926, - 0xf800098e, - 0x0710f8e4, - 0x05a8fa58, - 0xf8f0071c, - 0xf800098e, - 0x0364f6da, - 0xfa58fc00, - 0x0b64fc7e, - 0x0800f7b6, - 0x00f006be, - 0x05a80000, - 0xff1006be, - 0x0800084a, - 0xf49cfc7e, - 0xfa580400, - 0xfc9cf6da, - 0xf800f672, - 0x0710071c, - 0x05a805a8, - 0xf8f0f8e4, - 0xf800f672, - 0x03640926, - 0xfa580400, - 0x0b640382, - 0x0800084a, - 0x00f0f942, - 0x05a80000, - 0xff10f942, - 0x0800f7b6, - 0xf49c0382, - 0xfa58fc00, - 0xfc9c0926, - 0xf800098e, - 0x0710f8e4, - 0x05a8fa58, - 0xf8f0071c, - 0xf800098e, - 0x0364f6da, - 0xfa58fc00, - 0x0b64fc7e, - 0x0800f7b6, - 0x00f006be, -}; - -const u32 noise_var_tbl_rev3[] = { - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, - 0x02110211, - 0x0000014d, -}; - -const u16 mcs_tbl_rev3[] = { - 0x0000, - 0x0008, - 0x000a, - 0x0010, - 0x0012, - 0x0019, - 0x001a, - 0x001c, - 0x0080, - 0x0088, - 0x008a, - 0x0090, - 0x0092, - 0x0099, - 0x009a, - 0x009c, - 0x0100, - 0x0108, - 0x010a, - 0x0110, - 0x0112, - 0x0119, - 0x011a, - 0x011c, - 0x0180, - 0x0188, - 0x018a, - 0x0190, - 0x0192, - 0x0199, - 0x019a, - 0x019c, - 0x0000, - 0x0098, - 0x00a0, - 0x00a8, - 0x009a, - 0x00a2, - 0x00aa, - 0x0120, - 0x0128, - 0x0128, - 0x0130, - 0x0138, - 0x0138, - 0x0140, - 0x0122, - 0x012a, - 0x012a, - 0x0132, - 0x013a, - 0x013a, - 0x0142, - 0x01a8, - 0x01b0, - 0x01b8, - 0x01b0, - 0x01b8, - 0x01c0, - 0x01c8, - 0x01c0, - 0x01c8, - 0x01d0, - 0x01d0, - 0x01d8, - 0x01aa, - 0x01b2, - 0x01ba, - 0x01b2, - 0x01ba, - 0x01c2, - 0x01ca, - 0x01c2, - 0x01ca, - 0x01d2, - 0x01d2, - 0x01da, - 0x0001, - 0x0002, - 0x0004, - 0x0009, - 0x000c, - 0x0011, - 0x0014, - 0x0018, - 0x0020, - 0x0021, - 0x0022, - 0x0024, - 0x0081, - 0x0082, - 0x0084, - 0x0089, - 0x008c, - 0x0091, - 0x0094, - 0x0098, - 0x00a0, - 0x00a1, - 0x00a2, - 0x00a4, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, - 0x0007, -}; - -const u32 tdi_tbl20_ant0_rev3[] = { - 0x00091226, - 0x000a1429, - 0x000b56ad, - 0x000c58b0, - 0x000d5ab3, - 0x000e9cb6, - 0x000f9eba, - 0x0000c13d, - 0x00020301, - 0x00030504, - 0x00040708, - 0x0005090b, - 0x00064b8e, - 0x00095291, - 0x000a5494, - 0x000b9718, - 0x000c9927, - 0x000d9b2a, - 0x000edd2e, - 0x000fdf31, - 0x000101b4, - 0x000243b7, - 0x000345bb, - 0x000447be, - 0x00058982, - 0x00068c05, - 0x00099309, - 0x000a950c, - 0x000bd78f, - 0x000cd992, - 0x000ddb96, - 0x000f1d99, - 0x00005fa8, - 0x0001422c, - 0x0002842f, - 0x00038632, - 0x00048835, - 0x0005ca38, - 0x0006ccbc, - 0x0009d3bf, - 0x000b1603, - 0x000c1806, - 0x000d1a0a, - 0x000e1c0d, - 0x000f5e10, - 0x00008093, - 0x00018297, - 0x0002c49a, - 0x0003c680, - 0x0004c880, - 0x00060b00, - 0x00070d00, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl20_ant1_rev3[] = { - 0x00014b26, - 0x00028d29, - 0x000393ad, - 0x00049630, - 0x0005d833, - 0x0006da36, - 0x00099c3a, - 0x000a9e3d, - 0x000bc081, - 0x000cc284, - 0x000dc488, - 0x000f068b, - 0x0000488e, - 0x00018b91, - 0x0002d214, - 0x0003d418, - 0x0004d6a7, - 0x000618aa, - 0x00071aae, - 0x0009dcb1, - 0x000b1eb4, - 0x000c0137, - 0x000d033b, - 0x000e053e, - 0x000f4702, - 0x00008905, - 0x00020c09, - 0x0003128c, - 0x0004148f, - 0x00051712, - 0x00065916, - 0x00091b19, - 0x000a1d28, - 0x000b5f2c, - 0x000c41af, - 0x000d43b2, - 0x000e85b5, - 0x000f87b8, - 0x0000c9bc, - 0x00024cbf, - 0x00035303, - 0x00045506, - 0x0005978a, - 0x0006998d, - 0x00095b90, - 0x000a5d93, - 0x000b9f97, - 0x000c821a, - 0x000d8400, - 0x000ec600, - 0x000fc800, - 0x00010a00, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl40_ant0_rev3[] = { - 0x0011a346, - 0x00136ccf, - 0x0014f5d9, - 0x001641e2, - 0x0017cb6b, - 0x00195475, - 0x001b2383, - 0x001cad0c, - 0x001e7616, - 0x0000821f, - 0x00020ba8, - 0x0003d4b2, - 0x00056447, - 0x00072dd0, - 0x0008b6da, - 0x000a02e3, - 0x000b8c6c, - 0x000d15f6, - 0x0011e484, - 0x0013ae0d, - 0x00153717, - 0x00168320, - 0x00180ca9, - 0x00199633, - 0x001b6548, - 0x001ceed1, - 0x001eb7db, - 0x0000c3e4, - 0x00024d6d, - 0x000416f7, - 0x0005a585, - 0x00076f0f, - 0x0008f818, - 0x000a4421, - 0x000bcdab, - 0x000d9734, - 0x00122649, - 0x0013efd2, - 0x001578dc, - 0x0016c4e5, - 0x00184e6e, - 0x001a17f8, - 0x001ba686, - 0x001d3010, - 0x001ef999, - 0x00010522, - 0x00028eac, - 0x00045835, - 0x0005e74a, - 0x0007b0d3, - 0x00093a5d, - 0x000a85e6, - 0x000c0f6f, - 0x000dd8f9, - 0x00126787, - 0x00143111, - 0x0015ba9a, - 0x00170623, - 0x00188fad, - 0x001a5936, - 0x001be84b, - 0x001db1d4, - 0x001f3b5e, - 0x000146e7, - 0x00031070, - 0x000499fa, - 0x00062888, - 0x0007f212, - 0x00097b9b, - 0x000ac7a4, - 0x000c50ae, - 0x000e1a37, - 0x0012a94c, - 0x001472d5, - 0x0015fc5f, - 0x00174868, - 0x0018d171, - 0x001a9afb, - 0x001c2989, - 0x001df313, - 0x001f7c9c, - 0x000188a5, - 0x000351af, - 0x0004db38, - 0x0006aa4d, - 0x000833d7, - 0x0009bd60, - 0x000b0969, - 0x000c9273, - 0x000e5bfc, - 0x00132a8a, - 0x0014b414, - 0x00163d9d, - 0x001789a6, - 0x001912b0, - 0x001adc39, - 0x001c6bce, - 0x001e34d8, - 0x001fbe61, - 0x0001ca6a, - 0x00039374, - 0x00051cfd, - 0x0006ec0b, - 0x00087515, - 0x0009fe9e, - 0x000b4aa7, - 0x000cd3b1, - 0x000e9d3a, - 0x00000000, - 0x00000000, -}; - -const u32 tdi_tbl40_ant1_rev3[] = { - 0x001edb36, - 0x000129ca, - 0x0002b353, - 0x00047cdd, - 0x0005c8e6, - 0x000791ef, - 0x00091bf9, - 0x000aaa07, - 0x000c3391, - 0x000dfd1a, - 0x00120923, - 0x0013d22d, - 0x00155c37, - 0x0016eacb, - 0x00187454, - 0x001a3dde, - 0x001b89e7, - 0x001d12f0, - 0x001f1cfa, - 0x00016b88, - 0x00033492, - 0x0004be1b, - 0x00060a24, - 0x0007d32e, - 0x00095d38, - 0x000aec4c, - 0x000c7555, - 0x000e3edf, - 0x00124ae8, - 0x001413f1, - 0x0015a37b, - 0x00172c89, - 0x0018b593, - 0x001a419c, - 0x001bcb25, - 0x001d942f, - 0x001f63b9, - 0x0001ad4d, - 0x00037657, - 0x0004c260, - 0x00068be9, - 0x000814f3, - 0x0009a47c, - 0x000b2d8a, - 0x000cb694, - 0x000e429d, - 0x00128c26, - 0x001455b0, - 0x0015e4ba, - 0x00176e4e, - 0x0018f758, - 0x001a8361, - 0x001c0cea, - 0x001dd674, - 0x001fa57d, - 0x0001ee8b, - 0x0003b795, - 0x0005039e, - 0x0006cd27, - 0x000856b1, - 0x0009e5c6, - 0x000b6f4f, - 0x000cf859, - 0x000e8462, - 0x00130deb, - 0x00149775, - 0x00162603, - 0x0017af8c, - 0x00193896, - 0x001ac49f, - 0x001c4e28, - 0x001e17b2, - 0x0000a6c7, - 0x00023050, - 0x0003f9da, - 0x00054563, - 0x00070eec, - 0x00089876, - 0x000a2704, - 0x000bb08d, - 0x000d3a17, - 0x001185a0, - 0x00134f29, - 0x0014d8b3, - 0x001667c8, - 0x0017f151, - 0x00197adb, - 0x001b0664, - 0x001c8fed, - 0x001e5977, - 0x0000e805, - 0x0002718f, - 0x00043b18, - 0x000586a1, - 0x0007502b, - 0x0008d9b4, - 0x000a68c9, - 0x000bf252, - 0x000dbbdc, - 0x0011c7e5, - 0x001390ee, - 0x00151a78, - 0x0016a906, - 0x00183290, - 0x0019bc19, - 0x001b4822, - 0x001cd12c, - 0x001e9ab5, - 0x00000000, - 0x00000000, -}; - -const u32 pltlut_tbl_rev3[] = { - 0x76540213, - 0x62407351, - 0x76543210, - 0x76540213, - 0x76540213, - 0x76430521, -}; - -const u32 chanest_tbl_rev3[] = { - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x44444444, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, - 0x10101010, -}; - -const u8 frame_lut_rev3[] = { - 0x02, - 0x04, - 0x14, - 0x14, - 0x03, - 0x05, - 0x16, - 0x16, - 0x0a, - 0x0c, - 0x1c, - 0x1c, - 0x0b, - 0x0d, - 0x1e, - 0x1e, - 0x06, - 0x08, - 0x18, - 0x18, - 0x07, - 0x09, - 0x1a, - 0x1a, - 0x0e, - 0x10, - 0x20, - 0x28, - 0x0f, - 0x11, - 0x22, - 0x2a, -}; - -const u8 est_pwr_lut_core0_rev3[] = { - 0x55, - 0x54, - 0x54, - 0x53, - 0x52, - 0x52, - 0x51, - 0x51, - 0x50, - 0x4f, - 0x4f, - 0x4e, - 0x4e, - 0x4d, - 0x4c, - 0x4c, - 0x4b, - 0x4a, - 0x49, - 0x49, - 0x48, - 0x47, - 0x46, - 0x46, - 0x45, - 0x44, - 0x43, - 0x42, - 0x41, - 0x40, - 0x40, - 0x3f, - 0x3e, - 0x3d, - 0x3c, - 0x3a, - 0x39, - 0x38, - 0x37, - 0x36, - 0x35, - 0x33, - 0x32, - 0x31, - 0x2f, - 0x2e, - 0x2c, - 0x2b, - 0x29, - 0x27, - 0x25, - 0x23, - 0x21, - 0x1f, - 0x1d, - 0x1a, - 0x18, - 0x15, - 0x12, - 0x0e, - 0x0b, - 0x07, - 0x02, - 0xfd, -}; - -const u8 est_pwr_lut_core1_rev3[] = { - 0x55, - 0x54, - 0x54, - 0x53, - 0x52, - 0x52, - 0x51, - 0x51, - 0x50, - 0x4f, - 0x4f, - 0x4e, - 0x4e, - 0x4d, - 0x4c, - 0x4c, - 0x4b, - 0x4a, - 0x49, - 0x49, - 0x48, - 0x47, - 0x46, - 0x46, - 0x45, - 0x44, - 0x43, - 0x42, - 0x41, - 0x40, - 0x40, - 0x3f, - 0x3e, - 0x3d, - 0x3c, - 0x3a, - 0x39, - 0x38, - 0x37, - 0x36, - 0x35, - 0x33, - 0x32, - 0x31, - 0x2f, - 0x2e, - 0x2c, - 0x2b, - 0x29, - 0x27, - 0x25, - 0x23, - 0x21, - 0x1f, - 0x1d, - 0x1a, - 0x18, - 0x15, - 0x12, - 0x0e, - 0x0b, - 0x07, - 0x02, - 0xfd, -}; - -const u8 adj_pwr_lut_core0_rev3[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, -}; - -const u8 adj_pwr_lut_core1_rev3[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, -}; - -const u32 gainctrl_lut_core0_rev3[] = { - 0x5bf70044, - 0x5bf70042, - 0x5bf70040, - 0x5bf7003e, - 0x5bf7003c, - 0x5bf7003b, - 0x5bf70039, - 0x5bf70037, - 0x5bf70036, - 0x5bf70034, - 0x5bf70033, - 0x5bf70031, - 0x5bf70030, - 0x5ba70044, - 0x5ba70042, - 0x5ba70040, - 0x5ba7003e, - 0x5ba7003c, - 0x5ba7003b, - 0x5ba70039, - 0x5ba70037, - 0x5ba70036, - 0x5ba70034, - 0x5ba70033, - 0x5b770044, - 0x5b770042, - 0x5b770040, - 0x5b77003e, - 0x5b77003c, - 0x5b77003b, - 0x5b770039, - 0x5b770037, - 0x5b770036, - 0x5b770034, - 0x5b770033, - 0x5b770031, - 0x5b770030, - 0x5b77002f, - 0x5b77002d, - 0x5b77002c, - 0x5b470044, - 0x5b470042, - 0x5b470040, - 0x5b47003e, - 0x5b47003c, - 0x5b47003b, - 0x5b470039, - 0x5b470037, - 0x5b470036, - 0x5b470034, - 0x5b470033, - 0x5b470031, - 0x5b470030, - 0x5b47002f, - 0x5b47002d, - 0x5b47002c, - 0x5b47002b, - 0x5b47002a, - 0x5b270044, - 0x5b270042, - 0x5b270040, - 0x5b27003e, - 0x5b27003c, - 0x5b27003b, - 0x5b270039, - 0x5b270037, - 0x5b270036, - 0x5b270034, - 0x5b270033, - 0x5b270031, - 0x5b270030, - 0x5b27002f, - 0x5b170044, - 0x5b170042, - 0x5b170040, - 0x5b17003e, - 0x5b17003c, - 0x5b17003b, - 0x5b170039, - 0x5b170037, - 0x5b170036, - 0x5b170034, - 0x5b170033, - 0x5b170031, - 0x5b170030, - 0x5b17002f, - 0x5b17002d, - 0x5b17002c, - 0x5b17002b, - 0x5b17002a, - 0x5b170028, - 0x5b170027, - 0x5b170026, - 0x5b170025, - 0x5b170024, - 0x5b170023, - 0x5b070044, - 0x5b070042, - 0x5b070040, - 0x5b07003e, - 0x5b07003c, - 0x5b07003b, - 0x5b070039, - 0x5b070037, - 0x5b070036, - 0x5b070034, - 0x5b070033, - 0x5b070031, - 0x5b070030, - 0x5b07002f, - 0x5b07002d, - 0x5b07002c, - 0x5b07002b, - 0x5b07002a, - 0x5b070028, - 0x5b070027, - 0x5b070026, - 0x5b070025, - 0x5b070024, - 0x5b070023, - 0x5b070022, - 0x5b070021, - 0x5b070020, - 0x5b07001f, - 0x5b07001e, - 0x5b07001d, - 0x5b07001d, - 0x5b07001c, -}; - -const u32 gainctrl_lut_core1_rev3[] = { - 0x5bf70044, - 0x5bf70042, - 0x5bf70040, - 0x5bf7003e, - 0x5bf7003c, - 0x5bf7003b, - 0x5bf70039, - 0x5bf70037, - 0x5bf70036, - 0x5bf70034, - 0x5bf70033, - 0x5bf70031, - 0x5bf70030, - 0x5ba70044, - 0x5ba70042, - 0x5ba70040, - 0x5ba7003e, - 0x5ba7003c, - 0x5ba7003b, - 0x5ba70039, - 0x5ba70037, - 0x5ba70036, - 0x5ba70034, - 0x5ba70033, - 0x5b770044, - 0x5b770042, - 0x5b770040, - 0x5b77003e, - 0x5b77003c, - 0x5b77003b, - 0x5b770039, - 0x5b770037, - 0x5b770036, - 0x5b770034, - 0x5b770033, - 0x5b770031, - 0x5b770030, - 0x5b77002f, - 0x5b77002d, - 0x5b77002c, - 0x5b470044, - 0x5b470042, - 0x5b470040, - 0x5b47003e, - 0x5b47003c, - 0x5b47003b, - 0x5b470039, - 0x5b470037, - 0x5b470036, - 0x5b470034, - 0x5b470033, - 0x5b470031, - 0x5b470030, - 0x5b47002f, - 0x5b47002d, - 0x5b47002c, - 0x5b47002b, - 0x5b47002a, - 0x5b270044, - 0x5b270042, - 0x5b270040, - 0x5b27003e, - 0x5b27003c, - 0x5b27003b, - 0x5b270039, - 0x5b270037, - 0x5b270036, - 0x5b270034, - 0x5b270033, - 0x5b270031, - 0x5b270030, - 0x5b27002f, - 0x5b170044, - 0x5b170042, - 0x5b170040, - 0x5b17003e, - 0x5b17003c, - 0x5b17003b, - 0x5b170039, - 0x5b170037, - 0x5b170036, - 0x5b170034, - 0x5b170033, - 0x5b170031, - 0x5b170030, - 0x5b17002f, - 0x5b17002d, - 0x5b17002c, - 0x5b17002b, - 0x5b17002a, - 0x5b170028, - 0x5b170027, - 0x5b170026, - 0x5b170025, - 0x5b170024, - 0x5b170023, - 0x5b070044, - 0x5b070042, - 0x5b070040, - 0x5b07003e, - 0x5b07003c, - 0x5b07003b, - 0x5b070039, - 0x5b070037, - 0x5b070036, - 0x5b070034, - 0x5b070033, - 0x5b070031, - 0x5b070030, - 0x5b07002f, - 0x5b07002d, - 0x5b07002c, - 0x5b07002b, - 0x5b07002a, - 0x5b070028, - 0x5b070027, - 0x5b070026, - 0x5b070025, - 0x5b070024, - 0x5b070023, - 0x5b070022, - 0x5b070021, - 0x5b070020, - 0x5b07001f, - 0x5b07001e, - 0x5b07001d, - 0x5b07001d, - 0x5b07001c, -}; - -const u32 iq_lut_core0_rev3[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 iq_lut_core1_rev3[] = { - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u16 loft_lut_core0_rev3[] = { - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, -}; - -const u16 loft_lut_core1_rev3[] = { - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, - 0x0000, -}; - -const u16 papd_comp_rfpwr_tbl_core0_rev3[] = { - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, -}; - -const u16 papd_comp_rfpwr_tbl_core1_rev3[] = { - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x0036, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x002a, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x001e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x000e, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01fc, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01ee, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, - 0x01d6, -}; - -const u32 papd_comp_epsilon_tbl_core0_rev3[] = { - 0x00000000, - 0x00001fa0, - 0x00019f78, - 0x0001df7e, - 0x03fa9f86, - 0x03fd1f90, - 0x03fe5f8a, - 0x03fb1f94, - 0x03fd9fa0, - 0x00009f98, - 0x03fd1fac, - 0x03ff9fa2, - 0x03fe9fae, - 0x00001fae, - 0x03fddfb4, - 0x03ff1fb8, - 0x03ff9fbc, - 0x03ffdfbe, - 0x03fe9fc2, - 0x03fedfc6, - 0x03fedfc6, - 0x03ff9fc8, - 0x03ff5fc6, - 0x03fedfc2, - 0x03ff9fc0, - 0x03ff5fac, - 0x03ff5fac, - 0x03ff9fa2, - 0x03ff9fa6, - 0x03ff9faa, - 0x03ff5fb0, - 0x03ff5fb4, - 0x03ff1fca, - 0x03ff5fce, - 0x03fcdfdc, - 0x03fb4006, - 0x00000030, - 0x03ff808a, - 0x03ff80da, - 0x0000016c, - 0x03ff8318, - 0x03ff063a, - 0x03fd8bd6, - 0x00014ffe, - 0x00034ffe, - 0x00034ffe, - 0x0003cffe, - 0x00040ffe, - 0x00040ffe, - 0x0003cffe, - 0x0003cffe, - 0x00020ffe, - 0x03fe0ffe, - 0x03fdcffe, - 0x03f94ffe, - 0x03f54ffe, - 0x03f44ffe, - 0x03ef8ffe, - 0x03ee0ffe, - 0x03ebcffe, - 0x03e8cffe, - 0x03e74ffe, - 0x03e4cffe, - 0x03e38ffe, -}; - -const u32 papd_cal_scalars_tbl_core0_rev3[] = { - 0x05af005a, - 0x0571005e, - 0x05040066, - 0x04bd006c, - 0x047d0072, - 0x04430078, - 0x03f70081, - 0x03cb0087, - 0x03870091, - 0x035e0098, - 0x032e00a1, - 0x030300aa, - 0x02d800b4, - 0x02ae00bf, - 0x028900ca, - 0x026400d6, - 0x024100e3, - 0x022200f0, - 0x020200ff, - 0x01e5010e, - 0x01ca011e, - 0x01b0012f, - 0x01990140, - 0x01830153, - 0x016c0168, - 0x0158017d, - 0x01450193, - 0x013301ab, - 0x012101c5, - 0x011101e0, - 0x010201fc, - 0x00f4021a, - 0x00e6011d, - 0x00d9012e, - 0x00cd0140, - 0x00c20153, - 0x00b70167, - 0x00ac017c, - 0x00a30193, - 0x009a01ab, - 0x009101c4, - 0x008901df, - 0x008101fb, - 0x007a0219, - 0x00730239, - 0x006d025b, - 0x0067027e, - 0x006102a4, - 0x005c02cc, - 0x005602f6, - 0x00520323, - 0x004d0353, - 0x00490385, - 0x004503bb, - 0x004103f3, - 0x003d042f, - 0x003a046f, - 0x003704b2, - 0x003404f9, - 0x00310545, - 0x002e0596, - 0x002b05f5, - 0x00290640, - 0x002606a4, -}; - -const u32 papd_comp_epsilon_tbl_core1_rev3[] = { - 0x00000000, - 0x00001fa0, - 0x00019f78, - 0x0001df7e, - 0x03fa9f86, - 0x03fd1f90, - 0x03fe5f8a, - 0x03fb1f94, - 0x03fd9fa0, - 0x00009f98, - 0x03fd1fac, - 0x03ff9fa2, - 0x03fe9fae, - 0x00001fae, - 0x03fddfb4, - 0x03ff1fb8, - 0x03ff9fbc, - 0x03ffdfbe, - 0x03fe9fc2, - 0x03fedfc6, - 0x03fedfc6, - 0x03ff9fc8, - 0x03ff5fc6, - 0x03fedfc2, - 0x03ff9fc0, - 0x03ff5fac, - 0x03ff5fac, - 0x03ff9fa2, - 0x03ff9fa6, - 0x03ff9faa, - 0x03ff5fb0, - 0x03ff5fb4, - 0x03ff1fca, - 0x03ff5fce, - 0x03fcdfdc, - 0x03fb4006, - 0x00000030, - 0x03ff808a, - 0x03ff80da, - 0x0000016c, - 0x03ff8318, - 0x03ff063a, - 0x03fd8bd6, - 0x00014ffe, - 0x00034ffe, - 0x00034ffe, - 0x0003cffe, - 0x00040ffe, - 0x00040ffe, - 0x0003cffe, - 0x0003cffe, - 0x00020ffe, - 0x03fe0ffe, - 0x03fdcffe, - 0x03f94ffe, - 0x03f54ffe, - 0x03f44ffe, - 0x03ef8ffe, - 0x03ee0ffe, - 0x03ebcffe, - 0x03e8cffe, - 0x03e74ffe, - 0x03e4cffe, - 0x03e38ffe, -}; - -const u32 papd_cal_scalars_tbl_core1_rev3[] = { - 0x05af005a, - 0x0571005e, - 0x05040066, - 0x04bd006c, - 0x047d0072, - 0x04430078, - 0x03f70081, - 0x03cb0087, - 0x03870091, - 0x035e0098, - 0x032e00a1, - 0x030300aa, - 0x02d800b4, - 0x02ae00bf, - 0x028900ca, - 0x026400d6, - 0x024100e3, - 0x022200f0, - 0x020200ff, - 0x01e5010e, - 0x01ca011e, - 0x01b0012f, - 0x01990140, - 0x01830153, - 0x016c0168, - 0x0158017d, - 0x01450193, - 0x013301ab, - 0x012101c5, - 0x011101e0, - 0x010201fc, - 0x00f4021a, - 0x00e6011d, - 0x00d9012e, - 0x00cd0140, - 0x00c20153, - 0x00b70167, - 0x00ac017c, - 0x00a30193, - 0x009a01ab, - 0x009101c4, - 0x008901df, - 0x008101fb, - 0x007a0219, - 0x00730239, - 0x006d025b, - 0x0067027e, - 0x006102a4, - 0x005c02cc, - 0x005602f6, - 0x00520323, - 0x004d0353, - 0x00490385, - 0x004503bb, - 0x004103f3, - 0x003d042f, - 0x003a046f, - 0x003704b2, - 0x003404f9, - 0x00310545, - 0x002e0596, - 0x002b05f5, - 0x00290640, - 0x002606a4, -}; - -const mimophytbl_info_t mimophytbl_info_rev3_volatile[] = { - {&ant_swctrl_tbl_rev3, - sizeof(ant_swctrl_tbl_rev3) / sizeof(ant_swctrl_tbl_rev3[0]), 9, 0, 16} - , -}; - -const mimophytbl_info_t mimophytbl_info_rev3_volatile1[] = { - {&ant_swctrl_tbl_rev3_1, - sizeof(ant_swctrl_tbl_rev3_1) / sizeof(ant_swctrl_tbl_rev3_1[0]), 9, 0, - 16} - , -}; - -const mimophytbl_info_t mimophytbl_info_rev3_volatile2[] = { - {&ant_swctrl_tbl_rev3_2, - sizeof(ant_swctrl_tbl_rev3_2) / sizeof(ant_swctrl_tbl_rev3_2[0]), 9, 0, - 16} - , -}; - -const mimophytbl_info_t mimophytbl_info_rev3_volatile3[] = { - {&ant_swctrl_tbl_rev3_3, - sizeof(ant_swctrl_tbl_rev3_3) / sizeof(ant_swctrl_tbl_rev3_3[0]), 9, 0, - 16} - , -}; - -const mimophytbl_info_t mimophytbl_info_rev3[] = { - {&frame_struct_rev3, - sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} - , - {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), - 11, 0, 16} - , - {&tmap_tbl_rev3, sizeof(tmap_tbl_rev3) / sizeof(tmap_tbl_rev3[0]), 12, - 0, 32} - , - {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), - 13, 0, 32} - , - {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), - 14, 0, 32} - , - {&noise_var_tbl_rev3, - sizeof(noise_var_tbl_rev3) / sizeof(noise_var_tbl_rev3[0]), 16, 0, 32} - , - {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, - 16} - , - {&tdi_tbl20_ant0_rev3, - sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, - 32} - , - {&tdi_tbl20_ant1_rev3, - sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256, - 32} - , - {&tdi_tbl40_ant0_rev3, - sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640, - 32} - , - {&tdi_tbl40_ant1_rev3, - sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768, - 32} - , - {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]), - 20, 0, 32} - , - {&chanest_tbl_rev3, - sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32} - , - {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]), - 24, 0, 8} - , - {&est_pwr_lut_core0_rev3, - sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, - 0, 8} - , - {&est_pwr_lut_core1_rev3, - sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, - 0, 8} - , - {&adj_pwr_lut_core0_rev3, - sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, - 64, 8} - , - {&adj_pwr_lut_core1_rev3, - sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, - 64, 8} - , - {&gainctrl_lut_core0_rev3, - sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), - 26, 192, 32} - , - {&gainctrl_lut_core1_rev3, - sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), - 27, 192, 32} - , - {&iq_lut_core0_rev3, - sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} - , - {&iq_lut_core1_rev3, - sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} - , - {&loft_lut_core0_rev3, - sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, - 16} - , - {&loft_lut_core1_rev3, - sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, - 16} -}; - -const u32 mimophytbl_info_sz_rev3 = - sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]); -const u32 mimophytbl_info_sz_rev3_volatile = - sizeof(mimophytbl_info_rev3_volatile) / - sizeof(mimophytbl_info_rev3_volatile[0]); -const u32 mimophytbl_info_sz_rev3_volatile1 = - sizeof(mimophytbl_info_rev3_volatile1) / - sizeof(mimophytbl_info_rev3_volatile1[0]); -const u32 mimophytbl_info_sz_rev3_volatile2 = - sizeof(mimophytbl_info_rev3_volatile2) / - sizeof(mimophytbl_info_rev3_volatile2[0]); -const u32 mimophytbl_info_sz_rev3_volatile3 = - sizeof(mimophytbl_info_rev3_volatile3) / - sizeof(mimophytbl_info_rev3_volatile3[0]); - -const u32 tmap_tbl_rev7[] = { - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x000aa888, - 0x88880000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00011111, - 0x11110000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00088aaa, - 0xaaaa0000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xaaa8aaa0, - 0x8aaa8aaa, - 0xaa8a8a8a, - 0x000aaa88, - 0x8aaa0000, - 0xaaa8a888, - 0x8aa88a8a, - 0x8a88a888, - 0x08080a00, - 0x0a08080a, - 0x080a0a08, - 0x00080808, - 0x080a0000, - 0x080a0808, - 0x080a0808, - 0x0a0a0a08, - 0xa0a0a0a0, - 0x80a0a080, - 0x8080a0a0, - 0x00008080, - 0x80a00000, - 0x80a080a0, - 0xa080a0a0, - 0x8080a0a0, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x99999000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x22000000, - 0x2222b222, - 0x22222222, - 0x222222b2, - 0xb2222220, - 0x22222222, - 0x22d22222, - 0x00000222, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x33000000, - 0x3333b333, - 0x33333333, - 0x333333b3, - 0xb3333330, - 0x33333333, - 0x33d33333, - 0x00000333, - 0x22000000, - 0x2222a222, - 0x22222222, - 0x222222a2, - 0xa2222220, - 0x22222222, - 0x22c22222, - 0x00000222, - 0x99b99b00, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb99, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x22222200, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0x22222222, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x11111111, - 0xf1111111, - 0x11111111, - 0x11f11111, - 0x01111111, - 0xbb9bb900, - 0xb9b9bb99, - 0xb99bbbbb, - 0xbbbb9b9b, - 0xb9bb99bb, - 0xb99999b9, - 0xb9b9b99b, - 0x00000bbb, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88aa, - 0xa88888a8, - 0xa8a8a88a, - 0x0a888aaa, - 0xaa000000, - 0xa8a8aa88, - 0xa88aaaaa, - 0xaaaa8a8a, - 0xa8aa88a0, - 0xa88888a8, - 0xa8a8a88a, - 0x00000aaa, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0xbbbbbb00, - 0x999bbbbb, - 0x9bb99b9b, - 0xb9b9b9bb, - 0xb9b99bbb, - 0xb9b9b9bb, - 0xb9bb9b99, - 0x00000999, - 0x8a000000, - 0xaa88a888, - 0xa88888aa, - 0xa88a8a88, - 0xa88aa88a, - 0x88a8aaaa, - 0xa8aa8aaa, - 0x0888a88a, - 0x0b0b0b00, - 0x090b0b0b, - 0x0b090b0b, - 0x0909090b, - 0x09090b0b, - 0x09090b0b, - 0x09090b09, - 0x00000909, - 0x0a000000, - 0x0a080808, - 0x080a080a, - 0x080a0a08, - 0x080a080a, - 0x0808080a, - 0x0a0a0a08, - 0x0808080a, - 0xb0b0b000, - 0x9090b0b0, - 0x90b09090, - 0xb0b0b090, - 0xb0b090b0, - 0x90b0b0b0, - 0xb0b09090, - 0x00000090, - 0x80000000, - 0xa080a080, - 0xa08080a0, - 0xa0808080, - 0xa080a080, - 0x80a0a0a0, - 0xa0a080a0, - 0x00a0a0a0, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x11000000, - 0x1111f111, - 0x11111111, - 0x111111f1, - 0xf1111110, - 0x11111111, - 0x11f11111, - 0x00000111, - 0x33000000, - 0x3333f333, - 0x33333333, - 0x333333f3, - 0xf3333330, - 0x33333333, - 0x33f33333, - 0x00000333, - 0x22000000, - 0x2222f222, - 0x22222222, - 0x222222f2, - 0xf2222220, - 0x22222222, - 0x22f22222, - 0x00000222, - 0x99000000, - 0x9b9b99bb, - 0x9bb99999, - 0x9999b9b9, - 0x9b99bb90, - 0x9bbbbb9b, - 0x9b9b9bb9, - 0x00000999, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88888000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00aaa888, - 0x88a88a00, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x000aa888, - 0x88880000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa88, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x08aaa888, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x11000000, - 0x1111a111, - 0x11111111, - 0x111111a1, - 0xa1111110, - 0x11111111, - 0x11c11111, - 0x00000111, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x88000000, - 0x8a8a88aa, - 0x8aa88888, - 0x8888a8a8, - 0x8a88aa80, - 0x8aaaaa8a, - 0x8a8a8aa8, - 0x00000888, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; - -const u32 noise_var_tbl_rev7[] = { - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, - 0x020c020c, - 0x0000014d, -}; - -const u32 papd_comp_epsilon_tbl_core0_rev7[] = { - 0x00000000, - 0x00000000, - 0x00016023, - 0x00006028, - 0x00034036, - 0x0003402e, - 0x0007203c, - 0x0006e037, - 0x00070030, - 0x0009401f, - 0x0009a00f, - 0x000b600d, - 0x000c8007, - 0x000ce007, - 0x00101fff, - 0x00121ff9, - 0x0012e004, - 0x0014dffc, - 0x0016dff6, - 0x0018dfe9, - 0x001b3fe5, - 0x001c5fd0, - 0x001ddfc2, - 0x001f1fb6, - 0x00207fa4, - 0x00219f8f, - 0x0022ff7d, - 0x00247f6c, - 0x0024df5b, - 0x00267f4b, - 0x0027df3b, - 0x0029bf3b, - 0x002b5f2f, - 0x002d3f2e, - 0x002f5f2a, - 0x002fff15, - 0x00315f0b, - 0x0032defa, - 0x0033beeb, - 0x0034fed9, - 0x00353ec5, - 0x00361eb0, - 0x00363e9b, - 0x0036be87, - 0x0036be70, - 0x0038fe67, - 0x0044beb2, - 0x00513ef3, - 0x00595f11, - 0x00669f3d, - 0x0078dfdf, - 0x00a143aa, - 0x01642fff, - 0x0162afff, - 0x01620fff, - 0x0160cfff, - 0x015f0fff, - 0x015dafff, - 0x015bcfff, - 0x015bcfff, - 0x015b4fff, - 0x015acfff, - 0x01590fff, - 0x0156cfff, -}; - -const u32 papd_cal_scalars_tbl_core0_rev7[] = { - 0x0b5e002d, - 0x0ae2002f, - 0x0a3b0032, - 0x09a70035, - 0x09220038, - 0x08ab003b, - 0x081f003f, - 0x07a20043, - 0x07340047, - 0x06d2004b, - 0x067a004f, - 0x06170054, - 0x05bf0059, - 0x0571005e, - 0x051e0064, - 0x04d3006a, - 0x04910070, - 0x044c0077, - 0x040f007e, - 0x03d90085, - 0x03a1008d, - 0x036f0095, - 0x033d009e, - 0x030b00a8, - 0x02e000b2, - 0x02b900bc, - 0x029200c7, - 0x026d00d3, - 0x024900e0, - 0x022900ed, - 0x020a00fb, - 0x01ec010a, - 0x01d20119, - 0x01b7012a, - 0x019e013c, - 0x0188014e, - 0x01720162, - 0x015d0177, - 0x0149018e, - 0x013701a5, - 0x012601be, - 0x011501d8, - 0x010601f4, - 0x00f70212, - 0x00e90231, - 0x00dc0253, - 0x00d00276, - 0x00c4029b, - 0x00b902c3, - 0x00af02ed, - 0x00a50319, - 0x009c0348, - 0x0093037a, - 0x008b03af, - 0x008303e6, - 0x007c0422, - 0x00750460, - 0x006e04a3, - 0x006804e9, - 0x00620533, - 0x005d0582, - 0x005805d6, - 0x0053062e, - 0x004e068c, -}; - -const u32 papd_comp_epsilon_tbl_core1_rev7[] = { - 0x00000000, - 0x00000000, - 0x00016023, - 0x00006028, - 0x00034036, - 0x0003402e, - 0x0007203c, - 0x0006e037, - 0x00070030, - 0x0009401f, - 0x0009a00f, - 0x000b600d, - 0x000c8007, - 0x000ce007, - 0x00101fff, - 0x00121ff9, - 0x0012e004, - 0x0014dffc, - 0x0016dff6, - 0x0018dfe9, - 0x001b3fe5, - 0x001c5fd0, - 0x001ddfc2, - 0x001f1fb6, - 0x00207fa4, - 0x00219f8f, - 0x0022ff7d, - 0x00247f6c, - 0x0024df5b, - 0x00267f4b, - 0x0027df3b, - 0x0029bf3b, - 0x002b5f2f, - 0x002d3f2e, - 0x002f5f2a, - 0x002fff15, - 0x00315f0b, - 0x0032defa, - 0x0033beeb, - 0x0034fed9, - 0x00353ec5, - 0x00361eb0, - 0x00363e9b, - 0x0036be87, - 0x0036be70, - 0x0038fe67, - 0x0044beb2, - 0x00513ef3, - 0x00595f11, - 0x00669f3d, - 0x0078dfdf, - 0x00a143aa, - 0x01642fff, - 0x0162afff, - 0x01620fff, - 0x0160cfff, - 0x015f0fff, - 0x015dafff, - 0x015bcfff, - 0x015bcfff, - 0x015b4fff, - 0x015acfff, - 0x01590fff, - 0x0156cfff, -}; - -const u32 papd_cal_scalars_tbl_core1_rev7[] = { - 0x0b5e002d, - 0x0ae2002f, - 0x0a3b0032, - 0x09a70035, - 0x09220038, - 0x08ab003b, - 0x081f003f, - 0x07a20043, - 0x07340047, - 0x06d2004b, - 0x067a004f, - 0x06170054, - 0x05bf0059, - 0x0571005e, - 0x051e0064, - 0x04d3006a, - 0x04910070, - 0x044c0077, - 0x040f007e, - 0x03d90085, - 0x03a1008d, - 0x036f0095, - 0x033d009e, - 0x030b00a8, - 0x02e000b2, - 0x02b900bc, - 0x029200c7, - 0x026d00d3, - 0x024900e0, - 0x022900ed, - 0x020a00fb, - 0x01ec010a, - 0x01d20119, - 0x01b7012a, - 0x019e013c, - 0x0188014e, - 0x01720162, - 0x015d0177, - 0x0149018e, - 0x013701a5, - 0x012601be, - 0x011501d8, - 0x010601f4, - 0x00f70212, - 0x00e90231, - 0x00dc0253, - 0x00d00276, - 0x00c4029b, - 0x00b902c3, - 0x00af02ed, - 0x00a50319, - 0x009c0348, - 0x0093037a, - 0x008b03af, - 0x008303e6, - 0x007c0422, - 0x00750460, - 0x006e04a3, - 0x006804e9, - 0x00620533, - 0x005d0582, - 0x005805d6, - 0x0053062e, - 0x004e068c, -}; - -const mimophytbl_info_t mimophytbl_info_rev7[] = { - {&frame_struct_rev3, - sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} - , - {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), - 11, 0, 16} - , - {&tmap_tbl_rev7, sizeof(tmap_tbl_rev7) / sizeof(tmap_tbl_rev7[0]), 12, - 0, 32} - , - {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), - 13, 0, 32} - , - {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), - 14, 0, 32} - , - {&noise_var_tbl_rev7, - sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} - , - {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, - 16} - , - {&tdi_tbl20_ant0_rev3, - sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, - 32} - , - {&tdi_tbl20_ant1_rev3, - sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256, - 32} - , - {&tdi_tbl40_ant0_rev3, - sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640, - 32} - , - {&tdi_tbl40_ant1_rev3, - sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768, - 32} - , - {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]), - 20, 0, 32} - , - {&chanest_tbl_rev3, - sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32} - , - {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]), - 24, 0, 8} - , - {&est_pwr_lut_core0_rev3, - sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, - 0, 8} - , - {&est_pwr_lut_core1_rev3, - sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, - 0, 8} - , - {&adj_pwr_lut_core0_rev3, - sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, - 64, 8} - , - {&adj_pwr_lut_core1_rev3, - sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, - 64, 8} - , - {&gainctrl_lut_core0_rev3, - sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), - 26, 192, 32} - , - {&gainctrl_lut_core1_rev3, - sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), - 27, 192, 32} - , - {&iq_lut_core0_rev3, - sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} - , - {&iq_lut_core1_rev3, - sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} - , - {&loft_lut_core0_rev3, - sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, - 16} - , - {&loft_lut_core1_rev3, - sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, - 16} - , - {&papd_comp_rfpwr_tbl_core0_rev3, - sizeof(papd_comp_rfpwr_tbl_core0_rev3) / - sizeof(papd_comp_rfpwr_tbl_core0_rev3[0]), 26, 576, 16} - , - {&papd_comp_rfpwr_tbl_core1_rev3, - sizeof(papd_comp_rfpwr_tbl_core1_rev3) / - sizeof(papd_comp_rfpwr_tbl_core1_rev3[0]), 27, 576, 16} - , - {&papd_comp_epsilon_tbl_core0_rev7, - sizeof(papd_comp_epsilon_tbl_core0_rev7) / - sizeof(papd_comp_epsilon_tbl_core0_rev7[0]), 31, 0, 32} - , - {&papd_cal_scalars_tbl_core0_rev7, - sizeof(papd_cal_scalars_tbl_core0_rev7) / - sizeof(papd_cal_scalars_tbl_core0_rev7[0]), 32, 0, 32} - , - {&papd_comp_epsilon_tbl_core1_rev7, - sizeof(papd_comp_epsilon_tbl_core1_rev7) / - sizeof(papd_comp_epsilon_tbl_core1_rev7[0]), 33, 0, 32} - , - {&papd_cal_scalars_tbl_core1_rev7, - sizeof(papd_cal_scalars_tbl_core1_rev7) / - sizeof(papd_cal_scalars_tbl_core1_rev7[0]), 34, 0, 32} - , -}; - -const u32 mimophytbl_info_sz_rev7 = - sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]); - -const mimophytbl_info_t mimophytbl_info_rev16[] = { - {&noise_var_tbl_rev7, - sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} - , - {&est_pwr_lut_core0_rev3, - sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, - 0, 8} - , - {&est_pwr_lut_core1_rev3, - sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, - 0, 8} - , - {&adj_pwr_lut_core0_rev3, - sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26, - 64, 8} - , - {&adj_pwr_lut_core1_rev3, - sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27, - 64, 8} - , - {&gainctrl_lut_core0_rev3, - sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]), - 26, 192, 32} - , - {&gainctrl_lut_core1_rev3, - sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]), - 27, 192, 32} - , - {&iq_lut_core0_rev3, - sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32} - , - {&iq_lut_core1_rev3, - sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32} - , - {&loft_lut_core0_rev3, - sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448, - 16} - , - {&loft_lut_core1_rev3, - sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448, - 16} - , -}; - -const u32 mimophytbl_info_sz_rev16 = - sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]); diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h deleted file mode 100644 index 396122f..0000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#define ANT_SWCTRL_TBL_REV3_IDX (0) - -typedef phytbl_info_t mimophytbl_info_t; - -extern const mimophytbl_info_t mimophytbl_info_rev0[], - mimophytbl_info_rev0_volatile[]; -extern const u32 mimophytbl_info_sz_rev0, mimophytbl_info_sz_rev0_volatile; - -extern const mimophytbl_info_t mimophytbl_info_rev3[], - mimophytbl_info_rev3_volatile[], mimophytbl_info_rev3_volatile1[], - mimophytbl_info_rev3_volatile2[], mimophytbl_info_rev3_volatile3[]; -extern const u32 mimophytbl_info_sz_rev3, mimophytbl_info_sz_rev3_volatile, - mimophytbl_info_sz_rev3_volatile1, mimophytbl_info_sz_rev3_volatile2, - mimophytbl_info_sz_rev3_volatile3; - -extern const u32 noise_var_tbl_rev3[]; - -extern const mimophytbl_info_t mimophytbl_info_rev7[]; -extern const u32 mimophytbl_info_sz_rev7; -extern const u32 noise_var_tbl_rev7[]; - -extern const mimophytbl_info_t mimophytbl_info_rev16[]; -extern const u32 mimophytbl_info_sz_rev16; diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c new file mode 100644 index 0000000..3300015 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -0,0 +1,237 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer. + * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY. + * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the + * access to wlc_hw pointer. + */ + +#include +#include + +#include +#include +#include +#include +#include +#include "dma.h" +#include + +#include "types.h" +#include "cfg.h" +#include "d11.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include +#include "key.h" +#include "bottom_mac.h" +#include "phy_hal.h" +#include "main.h" +#include "phy_shim.h" +#include "mac80211_if.h" + +/* PHY SHIM module specific state */ +struct wlc_phy_shim_info { + struct wlc_hw_info *wlc_hw; /* pointer to main wlc_hw structure */ + void *wlc; /* pointer to main wlc structure */ + void *wl; /* pointer to os-specific private state */ +}; + +wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, + void *wl, void *wlc) { + wlc_phy_shim_info_t *physhim = NULL; + + physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC); + if (!physhim) { + wiphy_err(wlc_hw->wlc->wiphy, + "wl%d: wlc_phy_shim_attach: out of mem\n", + wlc_hw->unit); + return NULL; + } + physhim->wlc_hw = wlc_hw; + physhim->wlc = wlc; + physhim->wl = wl; + + return physhim; +} + +void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim) +{ + kfree(physhim); +} + +struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, + void (*fn) (void *arg), void *arg, + const char *name) +{ + return (struct wlapi_timer *) + brcms_init_timer(physhim->wl, fn, arg, name); +} + +void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) +{ + brcms_free_timer(physhim->wl, (struct brcms_timer *)t); +} + +void +wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms, + int periodic) +{ + brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic); +} + +bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) +{ + return brcms_del_timer(physhim->wl, (struct brcms_timer *)t); +} + +void wlapi_intrson(wlc_phy_shim_info_t *physhim) +{ + brcms_intrson(physhim->wl); +} + +u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim) +{ + return brcms_intrsoff(physhim->wl); +} + +void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask) +{ + brcms_intrsrestore(physhim->wl, macintmask); +} + +void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v) +{ + wlc_bmac_write_shm(physhim->wlc_hw, offset, v); +} + +u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset) +{ + return wlc_bmac_read_shm(physhim->wlc_hw, offset); +} + +void +wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask, + u16 val, int bands) +{ + wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands); +} + +void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags) +{ + wlc_bmac_corereset(physhim->wlc_hw, flags); +} + +void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim) +{ + wlc_suspend_mac_and_wait(physhim->wlc); +} + +void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode) +{ + wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode); +} + +void wlapi_enable_mac(wlc_phy_shim_info_t *physhim) +{ + wlc_enable_mac(physhim->wlc); +} + +void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val) +{ + wlc_bmac_mctrl(physhim->wlc_hw, mask, val); +} + +void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim) +{ + wlc_bmac_phy_reset(physhim->wlc_hw); +} + +void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw) +{ + wlc_bmac_bw_set(physhim->wlc_hw, bw); +} + +u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim) +{ + return wlc_bmac_get_txant(physhim->wlc_hw); +} + +void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk) +{ + wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk); +} + +void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk) +{ + wlc_bmac_macphyclk_set(physhim->wlc_hw, clk); +} + +void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on) +{ + wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on); +} + +void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim) +{ + wlc_bmac_core_phypll_reset(physhim->wlc_hw); +} + +void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim) +{ + wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG); +} + +void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim) +{ + wlc_ucode_wake_override_clear(physhim->wlc_hw, + WLC_WAKE_OVERRIDE_PHYREG); +} + +void +wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset, + int len, void *buf) +{ + wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf); +} + +u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate) +{ + return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate); +} + +void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim) +{ +} + +void +wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf, + int len, u32 sel) +{ + wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel); +} + +void +wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf, + int l, u32 sel) +{ + wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel); +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.h b/drivers/staging/brcm80211/brcmsmac/phy_shim.h new file mode 100644 index 0000000..1677df2 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * phy_shim.h: stuff defined in phy_shim.c and included only by the phy + */ + +#ifndef _BRCM_PHY_SHIM_H_ +#define _BRCM_PHY_SHIM_H_ + +#define RADAR_TYPE_NONE 0 /* Radar type None */ +#define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */ +#define RADAR_TYPE_ETSI_2 2 /* ETSI 2 Radar type */ +#define RADAR_TYPE_ETSI_3 3 /* ETSI 3 Radar type */ +#define RADAR_TYPE_ITU_E 4 /* ITU E Radar type */ +#define RADAR_TYPE_ITU_K 5 /* ITU K Radar type */ +#define RADAR_TYPE_UNCLASSIFIED 6 /* Unclassified Radar type */ +#define RADAR_TYPE_BIN5 7 /* long pulse radar type */ +#define RADAR_TYPE_STG2 8 /* staggered-2 radar */ +#define RADAR_TYPE_STG3 9 /* staggered-3 radar */ +#define RADAR_TYPE_FRA 10 /* French radar */ + +/* French radar pulse widths */ +#define FRA_T1_20MHZ 52770 +#define FRA_T2_20MHZ 61538 +#define FRA_T3_20MHZ 66002 +#define FRA_T1_40MHZ 105541 +#define FRA_T2_40MHZ 123077 +#define FRA_T3_40MHZ 132004 +#define FRA_ERR_20MHZ 60 +#define FRA_ERR_40MHZ 120 + +#define ANTSEL_NA 0 /* No boardlevel selection available */ +#define ANTSEL_2x4 1 /* 2x4 boardlevel selection available */ +#define ANTSEL_2x3 2 /* 2x3 CB2 boardlevel selection available */ + +/* Rx Antenna diversity control values */ +#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ +#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ +#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ +#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ +#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ +#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ + +#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ +#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ +#define WL_ANT_IDX_1 0 /* antenna index 1 */ +#define WL_ANT_IDX_2 1 /* antenna index 2 */ + +/* values for n_preamble_type */ +#define WLC_N_PREAMBLE_MIXEDMODE 0 +#define WLC_N_PREAMBLE_GF 1 +#define WLC_N_PREAMBLE_GF_BRCM 2 + +#define WL_TX_POWER_RATES_LEGACY 45 +#define WL_TX_POWER_MCS20_FIRST 12 +#define WL_TX_POWER_MCS20_NUM 16 +#define WL_TX_POWER_MCS40_FIRST 28 +#define WL_TX_POWER_MCS40_NUM 17 + + +#define WL_TX_POWER_RATES 101 +#define WL_TX_POWER_CCK_FIRST 0 +#define WL_TX_POWER_CCK_NUM 4 +#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM_NUM 8 +#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ +#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ +#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ +#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ +#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ +#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ +#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ +#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ +#define WL_TX_POWER_MCS_1_STREAM_NUM 8 +#define WL_TX_POWER_MCS_2_STREAM_NUM 8 +#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ +#define WL_TX_POWER_MCS_32_NUM 1 + +/* sslpnphy specifics */ +#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ + +/* tx_power_t.flags bits */ +#define WL_TX_POWER_F_ENABLED 1 +#define WL_TX_POWER_F_HW 2 +#define WL_TX_POWER_F_MIMO 4 +#define WL_TX_POWER_F_SISO 8 + +/* values to force tx/rx chain */ +#define WLC_N_TXRX_CHAIN0 0 +#define WLC_N_TXRX_CHAIN1 1 + +/* Forward declarations */ +struct wlc_hw_info; +typedef struct wlc_phy_shim_info wlc_phy_shim_info_t; + +extern wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, + void *wl, void *wlc); +extern void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim); + +/* PHY to WL utility functions */ +struct wlapi_timer; +extern struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, + void (*fn) (void *arg), void *arg, + const char *name); +extern void wlapi_free_timer(wlc_phy_shim_info_t *physhim, + struct wlapi_timer *t); +extern void wlapi_add_timer(wlc_phy_shim_info_t *physhim, + struct wlapi_timer *t, uint ms, int periodic); +extern bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, + struct wlapi_timer *t); +extern void wlapi_intrson(wlc_phy_shim_info_t *physhim); +extern u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim); +extern void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, + u32 macintmask); + +extern void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, + u16 v); +extern u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset); +extern void wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, + u16 mask, u16 val, int bands); +extern void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags); +extern void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim); +extern void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode); +extern void wlapi_enable_mac(wlc_phy_shim_info_t *physhim); +extern void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, + u32 val); +extern void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim); +extern void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw); +extern void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk); +extern void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk); +extern void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on); +extern void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim); +extern void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t * + physhim); +extern void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t * + physhim); +extern void wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int o, + int len, void *buf); +extern u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, + u8 rate); +extern void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim); +extern void wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint, + void *buf, int, u32 sel); +extern void wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint, + const void *buf, int, u32); + +extern void wlapi_high_update_phy_mode(wlc_phy_shim_info_t *physhim, + u32 phy_mode); +extern u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim); +#endif /* _BRCM_PHY_SHIM_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/pmu.c b/drivers/staging/brcm80211/brcmsmac/pmu.c new file mode 100644 index 0000000..b822d40 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/pmu.c @@ -0,0 +1,2397 @@ +/* + * Copyright (c) 2011 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include +#include +#include + +#include +#include "types.h" +#include +#include +#include "scb.h" +#include "pub.h" +#include "pmu.h" + +/* + * d11 slow to fast clock transition time in slow clock cycles + */ +#define D11SCC_SLOW2FAST_TRANSITION 2 + +/* + * external LPO crystal frequency + */ +#define EXT_ILP_HZ 32768 + +/* + * Duration for ILP clock frequency measurment in milliseconds + * + * remark: 1000 must be an integer multiple of this duration + */ +#define ILP_CALC_DUR 10 + +/* + * FVCO frequency + */ +#define FVCO_880 880000 /* 880MHz */ +#define FVCO_1760 1760000 /* 1760MHz */ +#define FVCO_1440 1440000 /* 1440MHz */ +#define FVCO_960 960000 /* 960MHz */ + +/* + * PMU crystal table indices for 1440MHz fvco + */ +#define PMU1_XTALTAB0_1440_12000K 0 +#define PMU1_XTALTAB0_1440_13000K 1 +#define PMU1_XTALTAB0_1440_14400K 2 +#define PMU1_XTALTAB0_1440_15360K 3 +#define PMU1_XTALTAB0_1440_16200K 4 +#define PMU1_XTALTAB0_1440_16800K 5 +#define PMU1_XTALTAB0_1440_19200K 6 +#define PMU1_XTALTAB0_1440_19800K 7 +#define PMU1_XTALTAB0_1440_20000K 8 +#define PMU1_XTALTAB0_1440_25000K 9 +#define PMU1_XTALTAB0_1440_26000K 10 +#define PMU1_XTALTAB0_1440_30000K 11 +#define PMU1_XTALTAB0_1440_37400K 12 +#define PMU1_XTALTAB0_1440_38400K 13 +#define PMU1_XTALTAB0_1440_40000K 14 +#define PMU1_XTALTAB0_1440_48000K 15 + +/* + * PMU crystal table indices for 960MHz fvco + */ +#define PMU1_XTALTAB0_960_12000K 0 +#define PMU1_XTALTAB0_960_13000K 1 +#define PMU1_XTALTAB0_960_14400K 2 +#define PMU1_XTALTAB0_960_15360K 3 +#define PMU1_XTALTAB0_960_16200K 4 +#define PMU1_XTALTAB0_960_16800K 5 +#define PMU1_XTALTAB0_960_19200K 6 +#define PMU1_XTALTAB0_960_19800K 7 +#define PMU1_XTALTAB0_960_20000K 8 +#define PMU1_XTALTAB0_960_25000K 9 +#define PMU1_XTALTAB0_960_26000K 10 +#define PMU1_XTALTAB0_960_30000K 11 +#define PMU1_XTALTAB0_960_37400K 12 +#define PMU1_XTALTAB0_960_38400K 13 +#define PMU1_XTALTAB0_960_40000K 14 +#define PMU1_XTALTAB0_960_48000K 15 + +/* + * PMU crystal table indices for 880MHz fvco + */ +#define PMU1_XTALTAB0_880_12000K 0 +#define PMU1_XTALTAB0_880_13000K 1 +#define PMU1_XTALTAB0_880_14400K 2 +#define PMU1_XTALTAB0_880_15360K 3 +#define PMU1_XTALTAB0_880_16200K 4 +#define PMU1_XTALTAB0_880_16800K 5 +#define PMU1_XTALTAB0_880_19200K 6 +#define PMU1_XTALTAB0_880_19800K 7 +#define PMU1_XTALTAB0_880_20000K 8 +#define PMU1_XTALTAB0_880_24000K 9 +#define PMU1_XTALTAB0_880_25000K 10 +#define PMU1_XTALTAB0_880_26000K 11 +#define PMU1_XTALTAB0_880_30000K 12 +#define PMU1_XTALTAB0_880_37400K 13 +#define PMU1_XTALTAB0_880_38400K 14 +#define PMU1_XTALTAB0_880_40000K 15 + +/* + * crystal frequency values + */ +#define XTAL_FREQ_24000MHZ 24000 +#define XTAL_FREQ_30000MHZ 30000 +#define XTAL_FREQ_37400MHZ 37400 +#define XTAL_FREQ_48000MHZ 48000 + +/* + * Resource dependancies mask change action + * + * @RES_DEPEND_SET: Override the dependancies mask + * @RES_DEPEND_ADD: Add to the dependancies mask + * @RES_DEPEND_REMOVE: Remove from the dependancies mask + */ +#define RES_DEPEND_SET 0 +#define RES_DEPEND_ADD 1 +#define RES_DEPEND_REMOVE -1 + +/* Fields in pmucontrol */ +#define PCTL_ILP_DIV_MASK 0xffff0000 +#define PCTL_ILP_DIV_SHIFT 16 +#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ +#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ +#define PCTL_HT_REQ_EN 0x00000100 +#define PCTL_ALP_REQ_EN 0x00000080 +#define PCTL_XTALFREQ_MASK 0x0000007c +#define PCTL_XTALFREQ_SHIFT 2 +#define PCTL_ILP_DIV_EN 0x00000002 +#define PCTL_LPO_SEL 0x00000001 + +/* Fields in clkstretch */ +#define CSTRETCH_HT 0xffff0000 +#define CSTRETCH_ALP 0x0000ffff + +/* d11 slow to fast clock transition time in slow clock cycles */ +#define D11SCC_SLOW2FAST_TRANSITION 2 + +/* ILP clock */ +#define ILP_CLOCK 32000 + +/* ALP clock on pre-PMU chips */ +#define ALP_CLOCK 20000000 + +/* HT clock */ +#define HT_CLOCK 80000000 + +#define OTPS_READY 0x00001000 + +/* pmustatus */ +#define PST_EXTLPOAVAIL 0x0100 +#define PST_WDRESET 0x0080 +#define PST_INTPEND 0x0040 +#define PST_SBCLKST 0x0030 +#define PST_SBCLKST_ILP 0x0010 +#define PST_SBCLKST_ALP 0x0020 +#define PST_SBCLKST_HT 0x0030 +#define PST_ALPAVAIL 0x0008 +#define PST_HTAVAIL 0x0004 +#define PST_RESINIT 0x0003 + +/* PMU Resource Request Timer registers */ +/* This is based on PmuRev0 */ +#define PRRT_TIME_MASK 0x03ff +#define PRRT_INTEN 0x0400 +#define PRRT_REQ_ACTIVE 0x0800 +#define PRRT_ALP_REQ 0x1000 +#define PRRT_HT_REQ 0x2000 + +/* PMU resource bit position */ +#define PMURES_BIT(bit) (1 << (bit)) + +/* PMU resource number limit */ +#define PMURES_MAX_RESNUM 30 + +/* PMU chip control0 register */ +#define PMU_CHIPCTL0 0 + +/* PMU chip control1 register */ +#define PMU_CHIPCTL1 1 +#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 + +#define PMU_CC1_IF_TYPE_MASK 0x00000030 +#define PMU_CC1_IF_TYPE_RMII 0x00000000 +#define PMU_CC1_IF_TYPE_MII 0x00000010 +#define PMU_CC1_IF_TYPE_RGMII 0x00000020 + +#define PMU_CC1_SW_TYPE_MASK 0x000000c0 +#define PMU_CC1_SW_TYPE_EPHY 0x00000000 +#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 +#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 +#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 + +/* PMU corerev and chip specific PLL controls. + * PMU_PLL_XX where is PMU corerev and is an arbitrary number + * to differentiate different PLLs controlled by the same PMU rev. + */ +/* pllcontrol registers */ +/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */ +#define PMU0_PLL0_PLLCTL0 0 +#define PMU0_PLL0_PC0_PDIV_MASK 1 +#define PMU0_PLL0_PC0_PDIV_FREQ 25000 +#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 +#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 +#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 + +/* PC0_DIV_ARM for PLLOUT_ARM */ +#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 +#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 +#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 +#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */ +#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 +#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 +#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 +#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 + +/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */ +#define PMU0_PLL0_PLLCTL1 1 +#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 +#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 +#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 +#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 +#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 + +/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */ +#define PMU0_PLL0_PLLCTL2 2 +#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf +#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 + +/* pllcontrol registers */ +/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ +#define PMU1_PLL0_PLLCTL0 0 +#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 +#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 +#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 +#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 + +/* mdiv */ +#define PMU1_PLL0_PLLCTL1 1 +#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff +#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 +#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 +#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 +#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 +#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 +#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 + +#define PMU1_PLL0_CHIPCTL0 0 +#define PMU1_PLL0_CHIPCTL1 1 +#define PMU1_PLL0_CHIPCTL2 2 + +#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 +#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) +#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) + +/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ +#define PMU1_PLL0_PLLCTL2 2 +#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff +#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 +#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 +#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 +#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 +#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */ +#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 + +/* ndiv_frac */ +#define PMU1_PLL0_PLLCTL3 3 +#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 + +/* pll_ctrl */ +#define PMU1_PLL0_PLLCTL4 4 + +/* pll_ctrl, vco_rng, clkdrive_ch */ +#define PMU1_PLL0_PLLCTL5 5 +#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 +#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 + +/* PMU rev 2 control words */ +#define PMU2_PHY_PLL_PLLCTL 4 +#define PMU2_SI_PLL_PLLCTL 10 + +/* PMU rev 2 */ +/* pllcontrol registers */ +/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ +#define PMU2_PLL_PLLCTL0 0 +#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 +#define PMU2_PLL_PC0_P1DIV_SHIFT 20 +#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 +#define PMU2_PLL_PC0_P2DIV_SHIFT 24 + +/* mdiv */ +#define PMU2_PLL_PLLCTL1 1 +#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff +#define PMU2_PLL_PC1_M1DIV_SHIFT 0 +#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC1_M2DIV_SHIFT 8 +#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 +#define PMU2_PLL_PC1_M3DIV_SHIFT 16 +#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 +#define PMU2_PLL_PC1_M4DIV_SHIFT 24 + +/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ +#define PMU2_PLL_PLLCTL2 2 +#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff +#define PMU2_PLL_PC2_M5DIV_SHIFT 0 +#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC2_M6DIV_SHIFT 8 +#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 +#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 + +/* ndiv_frac */ +#define PMU2_PLL_PLLCTL3 3 +#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 + +/* pll_ctrl */ +#define PMU2_PLL_PLLCTL4 4 + +/* pll_ctrl, vco_rng, clkdrive_ch */ +#define PMU2_PLL_PLLCTL5 5 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 + +/* PMU rev 5 (& 6) */ +#define PMU5_PLL_P1P2_OFF 0 +#define PMU5_PLL_P1_MASK 0x0f000000 +#define PMU5_PLL_P1_SHIFT 24 +#define PMU5_PLL_P2_MASK 0x00f00000 +#define PMU5_PLL_P2_SHIFT 20 +#define PMU5_PLL_M14_OFF 1 +#define PMU5_PLL_MDIV_MASK 0x000000ff +#define PMU5_PLL_MDIV_WIDTH 8 +#define PMU5_PLL_NM5_OFF 2 +#define PMU5_PLL_NDIV_MASK 0xfff00000 +#define PMU5_PLL_NDIV_SHIFT 20 +#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 +#define PMU5_PLL_NDIV_MODE_SHIFT 17 +#define PMU5_PLL_FMAB_OFF 3 +#define PMU5_PLL_MRAT_MASK 0xf0000000 +#define PMU5_PLL_MRAT_SHIFT 28 +#define PMU5_PLL_ABRAT_MASK 0x08000000 +#define PMU5_PLL_ABRAT_SHIFT 27 +#define PMU5_PLL_FDIV_MASK 0x07ffffff +#define PMU5_PLL_PLLCTL_OFF 4 +#define PMU5_PLL_PCHI_OFF 5 +#define PMU5_PLL_PCHI_MASK 0x0000003f + +/* pmu XtalFreqRatio */ +#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF +#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 +#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 + +/* Divider allocation in 4716/47162/5356/5357 */ +#define PMU5_MAINPLL_CPU 1 +#define PMU5_MAINPLL_MEM 2 +#define PMU5_MAINPLL_SI 3 + +#define PMU7_PLL_PLLCTL7 7 +#define PMU7_PLL_PLLCTL8 8 +#define PMU7_PLL_PLLCTL11 11 + +/* PLL usage in 4716/47162 */ +#define PMU4716_MAINPLL_PLL0 12 + +/* PLL usage in 5356/5357 */ +#define PMU5356_MAINPLL_PLL0 0 +#define PMU5357_MAINPLL_PLL0 0 + +/* 4328 resources */ +#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */ +#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */ +#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */ +#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ +#define RES4328_ILP_REQUEST 4 /* 0x00010 */ +#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */ +#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */ +#define RES4328_ROM_SWITCH 7 /* 0x00080 */ +#define RES4328_PA_REF_LDO 8 /* 0x00100 */ +#define RES4328_RADIO_LDO 9 /* 0x00200 */ +#define RES4328_AFE_LDO 10 /* 0x00400 */ +#define RES4328_PLL_LDO 11 /* 0x00800 */ +#define RES4328_BG_FILTBYP 12 /* 0x01000 */ +#define RES4328_TX_FILTBYP 13 /* 0x02000 */ +#define RES4328_RX_FILTBYP 14 /* 0x04000 */ +#define RES4328_XTAL_PU 15 /* 0x08000 */ +#define RES4328_XTAL_EN 16 /* 0x10000 */ +#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */ +#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */ +#define RES4328_BB_PLL_PU 19 /* 0x80000 */ + +/* 4325 A0/A1 resources */ +#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */ +#define RES4325_CBUCK_BURST 1 /* 0x00000002 */ +#define RES4325_CBUCK_PWM 2 /* 0x00000004 */ +#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */ +#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */ +#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */ +#define RES4325_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4325_ABUCK_BURST 7 /* 0x00000080 */ +#define RES4325_ABUCK_PWM 8 /* 0x00000100 */ +#define RES4325_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4325_OTP_PU 10 /* 0x00000400 */ +#define RES4325_LNLDO3_PU 11 /* 0x00000800 */ +#define RES4325_LNLDO4_PU 12 /* 0x00001000 */ +#define RES4325_XTAL_PU 13 /* 0x00002000 */ +#define RES4325_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4325_HT_AVAIL 21 /* 0x00200000 */ + +/* 4325 B0/C0 resources */ +#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4325B0_CLDO_PU 4 /* 0x00000010 */ + +/* 4325 C1 resources */ +#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */ + +#define RES4329_RESERVED0 0 /* 0x00000001 */ +#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4329_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4329_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4329_CLDO_PU 4 /* 0x00000010 */ +#define RES4329_PALDO_PU 5 /* 0x00000020 */ +#define RES4329_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4329_RESERVED7 7 /* 0x00000080 */ +#define RES4329_RESERVED8 8 /* 0x00000100 */ +#define RES4329_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4329_OTP_PU 10 /* 0x00000400 */ +#define RES4329_RESERVED11 11 /* 0x00000800 */ +#define RES4329_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4329_XTAL_PU 13 /* 0x00002000 */ +#define RES4329_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4329_HT_AVAIL 21 /* 0x00200000 */ + +/* 4315 resources */ +#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4315_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4315_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4315_CLDO_PU 4 /* 0x00000010 */ +#define RES4315_PALDO_PU 5 /* 0x00000020 */ +#define RES4315_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4315_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4315_OTP_PU 10 /* 0x00000400 */ +#define RES4315_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4315_XTAL_PU 13 /* 0x00002000 */ +#define RES4315_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4315_HT_AVAIL 21 /* 0x00200000 */ + +/* 4319 resources */ +#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */ +#define RES4319_CBUCK_BURST 2 /* 0x00000004 */ +#define RES4319_CBUCK_PWM 3 /* 0x00000008 */ +#define RES4319_CLDO_PU 4 /* 0x00000010 */ +#define RES4319_PALDO_PU 5 /* 0x00000020 */ +#define RES4319_ILP_REQUEST 6 /* 0x00000040 */ +#define RES4319_LNLDO1_PU 9 /* 0x00000200 */ +#define RES4319_OTP_PU 10 /* 0x00000400 */ +#define RES4319_LNLDO2_PU 12 /* 0x00001000 */ +#define RES4319_XTAL_PU 13 /* 0x00002000 */ +#define RES4319_ALP_AVAIL 14 /* 0x00004000 */ +#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */ +#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */ +#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */ +#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */ +#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */ +#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */ +#define RES4319_HT_AVAIL 21 /* 0x00200000 */ + +#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 +#define CCTL_4319USB_XTAL_SEL_SHIFT 19 +#define CCTL_4319USB_48MHZ_PLL_SEL 1 +#define CCTL_4319USB_24MHZ_PLL_SEL 2 + +/* PMU resources for 4336 */ +#define RES4336_CBUCK_LPOM 0 +#define RES4336_CBUCK_BURST 1 +#define RES4336_CBUCK_LP_PWM 2 +#define RES4336_CBUCK_PWM 3 +#define RES4336_CLDO_PU 4 +#define RES4336_DIS_INT_RESET_PD 5 +#define RES4336_ILP_REQUEST 6 +#define RES4336_LNLDO_PU 7 +#define RES4336_LDO3P3_PU 8 +#define RES4336_OTP_PU 9 +#define RES4336_XTAL_PU 10 +#define RES4336_ALP_AVAIL 11 +#define RES4336_RADIO_PU 12 +#define RES4336_BG_PU 13 +#define RES4336_VREG1p4_PU_PU 14 +#define RES4336_AFE_PWRSW_PU 15 +#define RES4336_RX_PWRSW_PU 16 +#define RES4336_TX_PWRSW_PU 17 +#define RES4336_BB_PWRSW_PU 18 +#define RES4336_SYNTH_PWRSW_PU 19 +#define RES4336_MISC_PWRSW_PU 20 +#define RES4336_LOGEN_PWRSW_PU 21 +#define RES4336_BBPLL_PWRSW_PU 22 +#define RES4336_MACPHY_CLKAVAIL 23 +#define RES4336_HT_AVAIL 24 +#define RES4336_RSVD 25 + +/* 4330 resources */ +#define RES4330_CBUCK_LPOM 0 +#define RES4330_CBUCK_BURST 1 +#define RES4330_CBUCK_LP_PWM 2 +#define RES4330_CBUCK_PWM 3 +#define RES4330_CLDO_PU 4 +#define RES4330_DIS_INT_RESET_PD 5 +#define RES4330_ILP_REQUEST 6 +#define RES4330_LNLDO_PU 7 +#define RES4330_LDO3P3_PU 8 +#define RES4330_OTP_PU 9 +#define RES4330_XTAL_PU 10 +#define RES4330_ALP_AVAIL 11 +#define RES4330_RADIO_PU 12 +#define RES4330_BG_PU 13 +#define RES4330_VREG1p4_PU_PU 14 +#define RES4330_AFE_PWRSW_PU 15 +#define RES4330_RX_PWRSW_PU 16 +#define RES4330_TX_PWRSW_PU 17 +#define RES4330_BB_PWRSW_PU 18 +#define RES4330_SYNTH_PWRSW_PU 19 +#define RES4330_MISC_PWRSW_PU 20 +#define RES4330_LOGEN_PWRSW_PU 21 +#define RES4330_BBPLL_PWRSW_PU 22 +#define RES4330_MACPHY_CLKAVAIL 23 +#define RES4330_HT_AVAIL 24 +#define RES4330_5gRX_PWRSW_PU 25 +#define RES4330_5gTX_PWRSW_PU 26 +#define RES4330_5g_LOGEN_PWRSW_PU 27 + +/* 4313 resources */ +#define RES4313_BB_PU_RSRC 0 +#define RES4313_ILP_REQ_RSRC 1 +#define RES4313_XTAL_PU_RSRC 2 +#define RES4313_ALP_AVAIL_RSRC 3 +#define RES4313_RADIO_PU_RSRC 4 +#define RES4313_BG_PU_RSRC 5 +#define RES4313_VREG1P4_PU_RSRC 6 +#define RES4313_AFE_PWRSW_RSRC 7 +#define RES4313_RX_PWRSW_RSRC 8 +#define RES4313_TX_PWRSW_RSRC 9 +#define RES4313_BB_PWRSW_RSRC 10 +#define RES4313_SYNTH_PWRSW_RSRC 11 +#define RES4313_MISC_PWRSW_RSRC 12 +#define RES4313_BB_PLL_PWRSW_RSRC 13 +#define RES4313_HT_AVAIL_RSRC 14 +#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 + +/* PMU resource up transition time in ILP cycles */ +#define PMURES_UP_TRANSITION 2 + +/* Setup resource up/down timers */ +typedef struct { + u8 resnum; + u16 updown; +} pmu_res_updown_t; + +/* Change resource dependancies masks */ +typedef struct { + u32 res_mask; /* resources (chip specific) */ + s8 action; /* action */ + u32 depend_mask; /* changes to the dependancies mask */ + /* action is taken when filter is NULL or return true: */ + bool(*filter) (struct si_pub *sih); +} pmu_res_depend_t; + +/* setup pll and query clock speed */ +typedef struct { + u16 fref; + u8 xf; + u8 p1div; + u8 p2div; + u8 ndiv_int; + u32 ndiv_frac; +} pmu1_xtaltab0_t; + +/* + * prototypes used in resource tables + */ +static bool si_pmu_res_depfltr_bb(struct si_pub *sih); +static bool si_pmu_res_depfltr_ncb(struct si_pub *sih); +static bool si_pmu_res_depfltr_paldo(struct si_pub *sih); +static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih); + +static const pmu_res_updown_t bcm4328a0_res_updown[] = { + { + RES4328_EXT_SWITCHER_PWM, 0x0101}, { + RES4328_BB_SWITCHER_PWM, 0x1f01}, { + RES4328_BB_SWITCHER_BURST, 0x010f}, { + RES4328_BB_EXT_SWITCHER_BURST, 0x0101}, { + RES4328_ILP_REQUEST, 0x0202}, { + RES4328_RADIO_SWITCHER_PWM, 0x0f01}, { + RES4328_RADIO_SWITCHER_BURST, 0x0f01}, { + RES4328_ROM_SWITCH, 0x0101}, { + RES4328_PA_REF_LDO, 0x0f01}, { + RES4328_RADIO_LDO, 0x0f01}, { + RES4328_AFE_LDO, 0x0f01}, { + RES4328_PLL_LDO, 0x0f01}, { + RES4328_BG_FILTBYP, 0x0101}, { + RES4328_TX_FILTBYP, 0x0101}, { + RES4328_RX_FILTBYP, 0x0101}, { + RES4328_XTAL_PU, 0x0101}, { + RES4328_XTAL_EN, 0xa001}, { + RES4328_BB_PLL_FILTBYP, 0x0101}, { + RES4328_RF_PLL_FILTBYP, 0x0101}, { + RES4328_BB_PLL_PU, 0x0701} +}; + +static const pmu_res_depend_t bcm4328a0_res_depend[] = { + /* Adjust ILP request resource not to force ext/BB switchers into burst mode */ + { + PMURES_BIT(RES4328_ILP_REQUEST), + RES_DEPEND_SET, + PMURES_BIT(RES4328_EXT_SWITCHER_PWM) | + PMURES_BIT(RES4328_BB_SWITCHER_PWM), NULL} +}; + +static const pmu_res_updown_t bcm4325a0_res_updown_qt[] = { + { + RES4325_HT_AVAIL, 0x0300}, { + RES4325_BBPLL_PWRSW_PU, 0x0101}, { + RES4325_RFPLL_PWRSW_PU, 0x0101}, { + RES4325_ALP_AVAIL, 0x0100}, { + RES4325_XTAL_PU, 0x1000}, { + RES4325_LNLDO1_PU, 0x0800}, { + RES4325_CLDO_CBUCK_PWM, 0x0101}, { + RES4325_CBUCK_PWM, 0x0803} +}; + +static const pmu_res_updown_t bcm4325a0_res_updown[] = { + { + RES4325_XTAL_PU, 0x1501} +}; + +static const pmu_res_depend_t bcm4325a0_res_depend[] = { + /* Adjust OTP PU resource dependencies - remove BB BURST */ + { + PMURES_BIT(RES4325_OTP_PU), + RES_DEPEND_REMOVE, + PMURES_BIT(RES4325_BUCK_BOOST_BURST), NULL}, + /* Adjust ALP/HT Avail resource dependencies - bring up BB along if it is used. */ + { + PMURES_BIT(RES4325_ALP_AVAIL) | PMURES_BIT(RES4325_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4325_BUCK_BOOST_BURST) | + PMURES_BIT(RES4325_BUCK_BOOST_PWM), si_pmu_res_depfltr_bb}, + /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ + { + PMURES_BIT(RES4325_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4325_RX_PWRSW_PU) | + PMURES_BIT(RES4325_TX_PWRSW_PU) | + PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4325_AFE_PWRSW_PU), NULL}, + /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ + { + PMURES_BIT(RES4325_ILP_REQUEST) | + PMURES_BIT(RES4325_ABUCK_BURST) | + PMURES_BIT(RES4325_ABUCK_PWM) | + PMURES_BIT(RES4325_LNLDO1_PU) | + PMURES_BIT(RES4325C1_LNLDO2_PU) | + PMURES_BIT(RES4325_XTAL_PU) | + PMURES_BIT(RES4325_ALP_AVAIL) | + PMURES_BIT(RES4325_RX_PWRSW_PU) | + PMURES_BIT(RES4325_TX_PWRSW_PU) | + PMURES_BIT(RES4325_RFPLL_PWRSW_PU) | + PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4325_AFE_PWRSW_PU) | + PMURES_BIT(RES4325_BBPLL_PWRSW_PU) | + PMURES_BIT(RES4325_HT_AVAIL), RES_DEPEND_REMOVE, + PMURES_BIT(RES4325B0_CBUCK_LPOM) | + PMURES_BIT(RES4325B0_CBUCK_BURST) | + PMURES_BIT(RES4325B0_CBUCK_PWM), si_pmu_res_depfltr_ncb} +}; + +static const pmu_res_updown_t bcm4315a0_res_updown_qt[] = { + { + RES4315_HT_AVAIL, 0x0101}, { + RES4315_XTAL_PU, 0x0100}, { + RES4315_LNLDO1_PU, 0x0100}, { + RES4315_PALDO_PU, 0x0100}, { + RES4315_CLDO_PU, 0x0100}, { + RES4315_CBUCK_PWM, 0x0100}, { + RES4315_CBUCK_BURST, 0x0100}, { + RES4315_CBUCK_LPOM, 0x0100} +}; + +static const pmu_res_updown_t bcm4315a0_res_updown[] = { + { + RES4315_XTAL_PU, 0x2501} +}; + +static const pmu_res_depend_t bcm4315a0_res_depend[] = { + /* Adjust OTP PU resource dependencies - not need PALDO unless write */ + { + PMURES_BIT(RES4315_OTP_PU), + RES_DEPEND_REMOVE, + PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_npaldo}, + /* Adjust ALP/HT Avail resource dependencies - bring up PALDO along if it is used. */ + { + PMURES_BIT(RES4315_ALP_AVAIL) | PMURES_BIT(RES4315_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_paldo}, + /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ + { + PMURES_BIT(RES4315_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4315_RX_PWRSW_PU) | + PMURES_BIT(RES4315_TX_PWRSW_PU) | + PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4315_AFE_PWRSW_PU), NULL}, + /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ + { + PMURES_BIT(RES4315_CLDO_PU) | PMURES_BIT(RES4315_ILP_REQUEST) | + PMURES_BIT(RES4315_LNLDO1_PU) | + PMURES_BIT(RES4315_OTP_PU) | + PMURES_BIT(RES4315_LNLDO2_PU) | + PMURES_BIT(RES4315_XTAL_PU) | + PMURES_BIT(RES4315_ALP_AVAIL) | + PMURES_BIT(RES4315_RX_PWRSW_PU) | + PMURES_BIT(RES4315_TX_PWRSW_PU) | + PMURES_BIT(RES4315_RFPLL_PWRSW_PU) | + PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4315_AFE_PWRSW_PU) | + PMURES_BIT(RES4315_BBPLL_PWRSW_PU) | + PMURES_BIT(RES4315_HT_AVAIL), RES_DEPEND_REMOVE, + PMURES_BIT(RES4315_CBUCK_LPOM) | + PMURES_BIT(RES4315_CBUCK_BURST) | + PMURES_BIT(RES4315_CBUCK_PWM), si_pmu_res_depfltr_ncb} +}; + + /* 4329 specific. needs to come back this issue later */ +static const pmu_res_updown_t bcm4329_res_updown[] = { + { + RES4329_XTAL_PU, 0x1501} +}; + +static const pmu_res_depend_t bcm4329_res_depend[] = { + /* Adjust HT Avail resource dependencies */ + { + PMURES_BIT(RES4329_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4329_CBUCK_LPOM) | + PMURES_BIT(RES4329_CBUCK_BURST) | + PMURES_BIT(RES4329_CBUCK_PWM) | + PMURES_BIT(RES4329_CLDO_PU) | + PMURES_BIT(RES4329_PALDO_PU) | + PMURES_BIT(RES4329_LNLDO1_PU) | + PMURES_BIT(RES4329_XTAL_PU) | + PMURES_BIT(RES4329_ALP_AVAIL) | + PMURES_BIT(RES4329_RX_PWRSW_PU) | + PMURES_BIT(RES4329_TX_PWRSW_PU) | + PMURES_BIT(RES4329_RFPLL_PWRSW_PU) | + PMURES_BIT(RES4329_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4329_AFE_PWRSW_PU) | + PMURES_BIT(RES4329_BBPLL_PWRSW_PU), NULL} +}; + +static const pmu_res_updown_t bcm4319a0_res_updown_qt[] = { + { + RES4319_HT_AVAIL, 0x0101}, { + RES4319_XTAL_PU, 0x0100}, { + RES4319_LNLDO1_PU, 0x0100}, { + RES4319_PALDO_PU, 0x0100}, { + RES4319_CLDO_PU, 0x0100}, { + RES4319_CBUCK_PWM, 0x0100}, { + RES4319_CBUCK_BURST, 0x0100}, { + RES4319_CBUCK_LPOM, 0x0100} +}; + +static const pmu_res_updown_t bcm4319a0_res_updown[] = { + { + RES4319_XTAL_PU, 0x3f01} +}; + +static const pmu_res_depend_t bcm4319a0_res_depend[] = { + /* Adjust OTP PU resource dependencies - not need PALDO unless write */ + { + PMURES_BIT(RES4319_OTP_PU), + RES_DEPEND_REMOVE, + PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_npaldo}, + /* Adjust HT Avail resource dependencies - bring up PALDO along if it is used. */ + { + PMURES_BIT(RES4319_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_paldo}, + /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ + { + PMURES_BIT(RES4319_HT_AVAIL), + RES_DEPEND_ADD, + PMURES_BIT(RES4319_RX_PWRSW_PU) | + PMURES_BIT(RES4319_TX_PWRSW_PU) | + PMURES_BIT(RES4319_RFPLL_PWRSW_PU) | + PMURES_BIT(RES4319_LOGEN_PWRSW_PU) | + PMURES_BIT(RES4319_AFE_PWRSW_PU), NULL} +}; + +static const pmu_res_updown_t bcm4336a0_res_updown_qt[] = { + { + RES4336_HT_AVAIL, 0x0101}, { + RES4336_XTAL_PU, 0x0100}, { + RES4336_CLDO_PU, 0x0100}, { + RES4336_CBUCK_PWM, 0x0100}, { + RES4336_CBUCK_BURST, 0x0100}, { + RES4336_CBUCK_LPOM, 0x0100} +}; + +static const pmu_res_updown_t bcm4336a0_res_updown[] = { + { + RES4336_HT_AVAIL, 0x0D01} +}; + +static const pmu_res_depend_t bcm4336a0_res_depend[] = { + /* Just a dummy entry for now */ + { + PMURES_BIT(RES4336_RSVD), RES_DEPEND_ADD, 0, NULL} +}; + +static const pmu_res_updown_t bcm4330a0_res_updown_qt[] = { + { + RES4330_HT_AVAIL, 0x0101}, { + RES4330_XTAL_PU, 0x0100}, { + RES4330_CLDO_PU, 0x0100}, { + RES4330_CBUCK_PWM, 0x0100}, { + RES4330_CBUCK_BURST, 0x0100}, { + RES4330_CBUCK_LPOM, 0x0100} +}; + +static const pmu_res_updown_t bcm4330a0_res_updown[] = { + { + RES4330_HT_AVAIL, 0x0e02} +}; + +static const pmu_res_depend_t bcm4330a0_res_depend[] = { + /* Just a dummy entry for now */ + { + PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL} +}; + +/* the following table is based on 1440Mhz fvco */ +static const pmu1_xtaltab0_t pmu1_xtaltab0_1440[] = { + { + 12000, 1, 1, 1, 0x78, 0x0}, { + 13000, 2, 1, 1, 0x6E, 0xC4EC4E}, { + 14400, 3, 1, 1, 0x64, 0x0}, { + 15360, 4, 1, 1, 0x5D, 0xC00000}, { + 16200, 5, 1, 1, 0x58, 0xE38E38}, { + 16800, 6, 1, 1, 0x55, 0xB6DB6D}, { + 19200, 7, 1, 1, 0x4B, 0}, { + 19800, 8, 1, 1, 0x48, 0xBA2E8B}, { + 20000, 9, 1, 1, 0x48, 0x0}, { + 25000, 10, 1, 1, 0x39, 0x999999}, { + 26000, 11, 1, 1, 0x37, 0x627627}, { + 30000, 12, 1, 1, 0x30, 0x0}, { + 37400, 13, 2, 1, 0x4D, 0x15E76}, { + 38400, 13, 2, 1, 0x4B, 0x0}, { + 40000, 14, 2, 1, 0x48, 0x0}, { + 48000, 15, 2, 1, 0x3c, 0x0}, { + 0, 0, 0, 0, 0, 0} +}; + +static const pmu1_xtaltab0_t pmu1_xtaltab0_960[] = { + { + 12000, 1, 1, 1, 0x50, 0x0}, { + 13000, 2, 1, 1, 0x49, 0xD89D89}, { + 14400, 3, 1, 1, 0x42, 0xAAAAAA}, { + 15360, 4, 1, 1, 0x3E, 0x800000}, { + 16200, 5, 1, 1, 0x39, 0x425ED0}, { + 16800, 6, 1, 1, 0x39, 0x249249}, { + 19200, 7, 1, 1, 0x32, 0x0}, { + 19800, 8, 1, 1, 0x30, 0x7C1F07}, { + 20000, 9, 1, 1, 0x30, 0x0}, { + 25000, 10, 1, 1, 0x26, 0x666666}, { + 26000, 11, 1, 1, 0x24, 0xEC4EC4}, { + 30000, 12, 1, 1, 0x20, 0x0}, { + 37400, 13, 2, 1, 0x33, 0x563EF9}, { + 38400, 14, 2, 1, 0x32, 0x0}, { + 40000, 15, 2, 1, 0x30, 0x0}, { + 48000, 16, 2, 1, 0x28, 0x0}, { + 0, 0, 0, 0, 0, 0} +}; + +static const pmu1_xtaltab0_t pmu1_xtaltab0_880_4329[] = { + { + 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { + 13000, 2, 1, 6, 0xb, 0x483483}, { + 14400, 3, 1, 10, 0xa, 0x1C71C7}, { + 15360, 4, 1, 5, 0xb, 0x755555}, { + 16200, 5, 1, 10, 0x5, 0x6E9E06}, { + 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { + 19200, 7, 1, 4, 0xb, 0x755555}, { + 19800, 8, 1, 11, 0x4, 0xA57EB}, { + 20000, 9, 1, 11, 0x4, 0x0}, { + 24000, 10, 3, 11, 0xa, 0x0}, { + 25000, 11, 5, 16, 0xb, 0x0}, { + 26000, 12, 1, 1, 0x21, 0xD89D89}, { + 30000, 13, 3, 8, 0xb, 0x0}, { + 37400, 14, 3, 1, 0x46, 0x969696}, { + 38400, 15, 1, 1, 0x16, 0xEAAAAA}, { + 40000, 16, 1, 2, 0xb, 0}, { + 0, 0, 0, 0, 0, 0} +}; + +/* the following table is based on 880Mhz fvco */ +static const pmu1_xtaltab0_t pmu1_xtaltab0_880[] = { + { + 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { + 13000, 2, 1, 6, 0xb, 0x483483}, { + 14400, 3, 1, 10, 0xa, 0x1C71C7}, { + 15360, 4, 1, 5, 0xb, 0x755555}, { + 16200, 5, 1, 10, 0x5, 0x6E9E06}, { + 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { + 19200, 7, 1, 4, 0xb, 0x755555}, { + 19800, 8, 1, 11, 0x4, 0xA57EB}, { + 20000, 9, 1, 11, 0x4, 0x0}, { + 24000, 10, 3, 11, 0xa, 0x0}, { + 25000, 11, 5, 16, 0xb, 0x0}, { + 26000, 12, 1, 2, 0x10, 0xEC4EC4}, { + 30000, 13, 3, 8, 0xb, 0x0}, { + 33600, 14, 1, 2, 0xd, 0x186186}, { + 38400, 15, 1, 2, 0xb, 0x755555}, { + 40000, 16, 1, 2, 0xb, 0}, { + 0, 0, 0, 0, 0, 0} +}; + +/* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ +static bool si_pmu_res_depfltr_bb(struct si_pub *sih) +{ + return (sih->boardflags & BFL_BUCKBOOST) != 0; +} + +/* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ +static bool si_pmu_res_depfltr_ncb(struct si_pub *sih) +{ + + return (sih->boardflags & BFL_NOCBUCK) != 0; +} + +/* true if the power topology uses the PALDO */ +static bool si_pmu_res_depfltr_paldo(struct si_pub *sih) +{ + return (sih->boardflags & BFL_PALDO) != 0; +} + +/* true if the power topology doesn't use the PALDO */ +static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih) +{ + return (sih->boardflags & BFL_PALDO) == 0; +} + +/* Return dependancies (direct or all/indirect) for the given resources */ +static u32 +si_pmu_res_deps(struct si_pub *sih, chipcregs_t *cc, u32 rsrcs, + bool all) +{ + u32 deps = 0; + u32 i; + + for (i = 0; i <= PMURES_MAX_RESNUM; i++) { + if (!(rsrcs & PMURES_BIT(i))) + continue; + W_REG(&cc->res_table_sel, i); + deps |= R_REG(&cc->res_dep_mask); + } + + return !all ? deps : (deps + ? (deps | + si_pmu_res_deps(sih, cc, deps, + true)) : 0); +} + +/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */ +static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax) +{ + u32 min_mask = 0, max_mask = 0; + uint rsrcs; + char *val; + + /* # resources */ + rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; + + /* determine min/max rsrc masks */ + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43238_CHIP_ID: + case BCM4331_CHIP_ID: + case BCM6362_CHIP_ID: + /* ??? */ + break; + + case BCM4329_CHIP_ID: + /* 4329 spedific issue. Needs to come back this issue later */ + /* Down to save the power. */ + min_mask = + PMURES_BIT(RES4329_CBUCK_LPOM) | + PMURES_BIT(RES4329_CLDO_PU); + /* Allow (but don't require) PLL to turn on */ + max_mask = 0x3ff63e; + break; + case BCM4319_CHIP_ID: + /* We only need a few resources to be kept on all the time */ + min_mask = PMURES_BIT(RES4319_CBUCK_LPOM) | + PMURES_BIT(RES4319_CLDO_PU); + + /* Allow everything else to be turned on upon requests */ + max_mask = ~(~0 << rsrcs); + break; + case BCM4336_CHIP_ID: + /* Down to save the power. */ + min_mask = + PMURES_BIT(RES4336_CBUCK_LPOM) | PMURES_BIT(RES4336_CLDO_PU) + | PMURES_BIT(RES4336_LDO3P3_PU) | PMURES_BIT(RES4336_OTP_PU) + | PMURES_BIT(RES4336_DIS_INT_RESET_PD); + /* Allow (but don't require) PLL to turn on */ + max_mask = 0x1ffffff; + break; + + case BCM4330_CHIP_ID: + /* Down to save the power. */ + min_mask = + PMURES_BIT(RES4330_CBUCK_LPOM) | PMURES_BIT(RES4330_CLDO_PU) + | PMURES_BIT(RES4330_DIS_INT_RESET_PD) | + PMURES_BIT(RES4330_LDO3P3_PU) | PMURES_BIT(RES4330_OTP_PU); + /* Allow (but don't require) PLL to turn on */ + max_mask = 0xfffffff; + break; + + case BCM4313_CHIP_ID: + min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) | + PMURES_BIT(RES4313_XTAL_PU_RSRC) | + PMURES_BIT(RES4313_ALP_AVAIL_RSRC) | + PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC); + max_mask = 0xffff; + break; + default: + break; + } + + /* Apply nvram override to min mask */ + val = getvar(NULL, "rmin"); + if (val != NULL) { + min_mask = (u32) simple_strtoul(val, NULL, 0); + } + /* Apply nvram override to max mask */ + val = getvar(NULL, "rmax"); + if (val != NULL) { + max_mask = (u32) simple_strtoul(val, NULL, 0); + } + + *pmin = min_mask; + *pmax = max_mask; +} + +/* Return up time in ILP cycles for the given resource. */ +static uint +si_pmu_res_uptime(struct si_pub *sih, chipcregs_t *cc, u8 rsrc) { + u32 deps; + uint up, i, dup, dmax; + u32 min_mask = 0, max_mask = 0; + + /* uptime of resource 'rsrc' */ + W_REG(&cc->res_table_sel, rsrc); + up = (R_REG(&cc->res_updn_timer) >> 8) & 0xff; + + /* direct dependancies of resource 'rsrc' */ + deps = si_pmu_res_deps(sih, cc, PMURES_BIT(rsrc), false); + for (i = 0; i <= PMURES_MAX_RESNUM; i++) { + if (!(deps & PMURES_BIT(i))) + continue; + deps &= ~si_pmu_res_deps(sih, cc, PMURES_BIT(i), true); + } + si_pmu_res_masks(sih, &min_mask, &max_mask); + deps &= ~min_mask; + + /* max uptime of direct dependancies */ + dmax = 0; + for (i = 0; i <= PMURES_MAX_RESNUM; i++) { + if (!(deps & PMURES_BIT(i))) + continue; + dup = si_pmu_res_uptime(sih, cc, (u8) i); + if (dmax < dup) + dmax = dup; + } + + return up + dmax + PMURES_UP_TRANSITION; +} + +static void +si_pmu_spuravoid_pllupdate(struct si_pub *sih, chipcregs_t *cc, u8 spuravoid) +{ + u32 tmp = 0; + u8 phypll_offset = 0; + u8 bcm5357_bcm43236_p1div[] = { 0x1, 0x5, 0x5 }; + u8 bcm5357_bcm43236_ndiv[] = { 0x30, 0xf6, 0xfc }; + + switch (sih->chip) { + case BCM5357_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43238_CHIP_ID: + + /* + * BCM5357 needs to touch PLL1_PLLCTL[02], + * so offset PLL0_PLLCTL[02] by 6 + */ + phypll_offset = (sih->chip == BCM5357_CHIP_ID) ? 6 : 0; + + /* RMW only the P1 divider */ + W_REG(&cc->pllcontrol_addr, + PMU1_PLL0_PLLCTL0 + phypll_offset); + tmp = R_REG(&cc->pllcontrol_data); + tmp &= (~(PMU1_PLL0_PC0_P1DIV_MASK)); + tmp |= + (bcm5357_bcm43236_p1div[spuravoid] << + PMU1_PLL0_PC0_P1DIV_SHIFT); + W_REG(&cc->pllcontrol_data, tmp); + + /* RMW only the int feedback divider */ + W_REG(&cc->pllcontrol_addr, + PMU1_PLL0_PLLCTL2 + phypll_offset); + tmp = R_REG(&cc->pllcontrol_data); + tmp &= ~(PMU1_PLL0_PC2_NDIV_INT_MASK); + tmp |= + (bcm5357_bcm43236_ndiv[spuravoid]) << + PMU1_PLL0_PC2_NDIV_INT_SHIFT; + W_REG(&cc->pllcontrol_data, tmp); + + tmp = 1 << 10; + break; + + case BCM4331_CHIP_ID: + if (spuravoid == 2) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11500014); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x0FC00a08); + } else if (spuravoid == 1) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11500014); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x0F600a08); + } else { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100014); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000a08); + } + tmp = 1 << 10; + break; + + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM6362_CHIP_ID: + if (spuravoid == 1) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11500010); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x000C0C06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x0F600a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x2001E920); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } else { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100010); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x000c0c06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x200005c0); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } + tmp = 1 << 10; + break; + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100008); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x0c000c06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x200005c0); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888855); + + tmp = 1 << 10; + break; + + case BCM4716_CHIP_ID: + case BCM4748_CHIP_ID: + case BCM47162_CHIP_ID: + if (spuravoid == 1) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11500060); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x080C0C06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x0F600000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x2001E924); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } else { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100060); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x080c0c06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x200005c0); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } + + tmp = 3 << 9; + break; + + case BCM4319_CHIP_ID: + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100070); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x1014140a); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888854); + + if (spuravoid == 1) { + /* spur_avoid ON, so enable 41/82/164Mhz clock mode */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x05201828); + } else { + /* enable 40/80/160Mhz clock mode */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x05001828); + } + break; + case BCM4336_CHIP_ID: + /* Looks like these are only for default xtal freq 26MHz */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x02100020); + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x0C0C0C0C); + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x01240C0C); + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x202C2820); + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888825); + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + if (spuravoid == 1) + W_REG(&cc->pllcontrol_data, 0x00EC4EC4); + else + W_REG(&cc->pllcontrol_data, 0x00762762); + + tmp = PCTL_PLL_PLLCTL_UPD; + break; + + default: + /* bail out */ + return; + } + + tmp |= R_REG(&cc->pmucontrol); + W_REG(&cc->pmucontrol, tmp); +} + +/* select default xtal frequency for each chip */ +static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(struct si_pub *sih) +{ + switch (sih->chip) { + case BCM4329_CHIP_ID: + /* Default to 38400Khz */ + return &pmu1_xtaltab0_880_4329[PMU1_XTALTAB0_880_38400K]; + case BCM4319_CHIP_ID: + /* Default to 30000Khz */ + return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_30000K]; + case BCM4336_CHIP_ID: + /* Default to 26000Khz */ + return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_26000K]; + case BCM4330_CHIP_ID: + /* Default to 37400Khz */ + if (CST4330_CHIPMODE_SDIOD(sih->chipst)) + return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_37400K]; + else + return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_37400K]; + default: + break; + } + return NULL; +} + +/* select xtal table for each chip */ +static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(struct si_pub *sih) +{ + switch (sih->chip) { + case BCM4329_CHIP_ID: + return pmu1_xtaltab0_880_4329; + case BCM4319_CHIP_ID: + return pmu1_xtaltab0_1440; + case BCM4336_CHIP_ID: + return pmu1_xtaltab0_960; + case BCM4330_CHIP_ID: + if (CST4330_CHIPMODE_SDIOD(sih->chipst)) + return pmu1_xtaltab0_960; + else + return pmu1_xtaltab0_1440; + default: + break; + } + return NULL; +} + +/* query alp/xtal clock frequency */ +static u32 +si_pmu1_alpclk0(struct si_pub *sih, chipcregs_t *cc) +{ + const pmu1_xtaltab0_t *xt; + u32 xf; + + /* Find the frequency in the table */ + xf = (R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> + PCTL_XTALFREQ_SHIFT; + for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) + if (xt->xf == xf) + break; + /* Could not find it so assign a default value */ + if (xt == NULL || xt->fref == 0) + xt = si_pmu1_xtaldef0(sih); + return xt->fref * 1000; +} + +/* select default pll fvco for each chip */ +static u32 si_pmu1_pllfvco0(struct si_pub *sih) +{ + switch (sih->chip) { + case BCM4329_CHIP_ID: + return FVCO_880; + case BCM4319_CHIP_ID: + return FVCO_1440; + case BCM4336_CHIP_ID: + return FVCO_960; + case BCM4330_CHIP_ID: + if (CST4330_CHIPMODE_SDIOD(sih->chipst)) + return FVCO_960; + else + return FVCO_1440; + default: + break; + } + return 0; +} + +static void si_pmu_set_4330_plldivs(struct si_pub *sih) +{ + u32 FVCO = si_pmu1_pllfvco0(sih) / 1000; + u32 m1div, m2div, m3div, m4div, m5div, m6div; + u32 pllc1, pllc2; + + m2div = m3div = m4div = m6div = FVCO / 80; + m5div = FVCO / 160; + + if (CST4330_CHIPMODE_SDIOD(sih->chipst)) + m1div = FVCO / 80; + else + m1div = FVCO / 90; + pllc1 = + (m1div << PMU1_PLL0_PC1_M1DIV_SHIFT) | (m2div << + PMU1_PLL0_PC1_M2DIV_SHIFT) | + (m3div << PMU1_PLL0_PC1_M3DIV_SHIFT) | (m4div << + PMU1_PLL0_PC1_M4DIV_SHIFT); + si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, ~0, pllc1); + + pllc2 = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, 0, 0); + pllc2 &= ~(PMU1_PLL0_PC2_M5DIV_MASK | PMU1_PLL0_PC2_M6DIV_MASK); + pllc2 |= + ((m5div << PMU1_PLL0_PC2_M5DIV_SHIFT) | + (m6div << PMU1_PLL0_PC2_M6DIV_SHIFT)); + si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL2, ~0, pllc2); +} + +/* Set up PLL registers in the PMU as per the crystal speed. + * XtalFreq field in pmucontrol register being 0 indicates the PLL + * is not programmed and the h/w default is assumed to work, in which + * case the xtal frequency is unknown to the s/w so we need to call + * si_pmu1_xtaldef0() wherever it is needed to return a default value. + */ +static void si_pmu1_pllinit0(struct si_pub *sih, chipcregs_t *cc, u32 xtal) +{ + const pmu1_xtaltab0_t *xt; + u32 tmp; + u32 buf_strength = 0; + u8 ndiv_mode = 1; + + /* Use h/w default PLL config */ + if (xtal == 0) { + return; + } + + /* Find the frequency in the table */ + for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) + if (xt->fref == xtal) + break; + + /* Check current PLL state, bail out if it has been programmed or + * we don't know how to program it. + */ + if (xt == NULL || xt->fref == 0) { + return; + } + /* for 4319 bootloader already programs the PLL but bootloader does not + * program the PLL4 and PLL5. So Skip this check for 4319 + */ + if ((((R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> + PCTL_XTALFREQ_SHIFT) == xt->xf) && + !((sih->chip == BCM4319_CHIP_ID) + || (sih->chip == BCM4330_CHIP_ID))) + return; + + switch (sih->chip) { + case BCM4329_CHIP_ID: + /* Change the BBPLL drive strength to 8 for all channels */ + buf_strength = 0x888888; + AND_REG(&cc->min_res_mask, + ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | + PMURES_BIT(RES4329_HT_AVAIL))); + AND_REG(&cc->max_res_mask, + ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | + PMURES_BIT(RES4329_HT_AVAIL))); + SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, + PMU_MAX_TRANSITION_DLY); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + if (xt->fref == 38400) + tmp = 0x200024C0; + else if (xt->fref == 37400) + tmp = 0x20004500; + else if (xt->fref == 26000) + tmp = 0x200024C0; + else + tmp = 0x200005C0; /* Chip Dflt Settings */ + W_REG(&cc->pllcontrol_data, tmp); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + tmp = + R_REG(&cc->pllcontrol_data) & PMU1_PLL0_PC5_CLK_DRV_MASK; + if ((xt->fref == 38400) || (xt->fref == 37400) + || (xt->fref == 26000)) + tmp |= 0x15; + else + tmp |= 0x25; /* Chip Dflt Settings */ + W_REG(&cc->pllcontrol_data, tmp); + break; + + case BCM4319_CHIP_ID: + /* Change the BBPLL drive strength to 2 for all channels */ + buf_strength = 0x222222; + + /* Make sure the PLL is off */ + /* WAR65104: Disable the HT_AVAIL resource first and then + * after a delay (more than downtime for HT_AVAIL) remove the + * BBPLL resource; backplane clock moves to ALP from HT. + */ + AND_REG(&cc->min_res_mask, + ~(PMURES_BIT(RES4319_HT_AVAIL))); + AND_REG(&cc->max_res_mask, + ~(PMURES_BIT(RES4319_HT_AVAIL))); + + udelay(100); + AND_REG(&cc->min_res_mask, + ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); + AND_REG(&cc->max_res_mask, + ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); + + udelay(100); + SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, + PMU_MAX_TRANSITION_DLY); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + tmp = 0x200005c0; + W_REG(&cc->pllcontrol_data, tmp); + break; + + case BCM4336_CHIP_ID: + AND_REG(&cc->min_res_mask, + ~(PMURES_BIT(RES4336_HT_AVAIL) | + PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); + AND_REG(&cc->max_res_mask, + ~(PMURES_BIT(RES4336_HT_AVAIL) | + PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); + udelay(100); + SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, + PMU_MAX_TRANSITION_DLY); + break; + + case BCM4330_CHIP_ID: + AND_REG(&cc->min_res_mask, + ~(PMURES_BIT(RES4330_HT_AVAIL) | + PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); + AND_REG(&cc->max_res_mask, + ~(PMURES_BIT(RES4330_HT_AVAIL) | + PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); + udelay(100); + SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, + PMU_MAX_TRANSITION_DLY); + break; + + default: + break; + } + + /* Write p1div and p2div to pllcontrol[0] */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + tmp = R_REG(&cc->pllcontrol_data) & + ~(PMU1_PLL0_PC0_P1DIV_MASK | PMU1_PLL0_PC0_P2DIV_MASK); + tmp |= + ((xt-> + p1div << PMU1_PLL0_PC0_P1DIV_SHIFT) & PMU1_PLL0_PC0_P1DIV_MASK) | + ((xt-> + p2div << PMU1_PLL0_PC0_P2DIV_SHIFT) & PMU1_PLL0_PC0_P2DIV_MASK); + W_REG(&cc->pllcontrol_data, tmp); + + if ((sih->chip == BCM4330_CHIP_ID)) + si_pmu_set_4330_plldivs(sih); + + if ((sih->chip == BCM4329_CHIP_ID) + && (sih->chiprev == 0)) { + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + tmp = R_REG(&cc->pllcontrol_data); + tmp = tmp & (~DOT11MAC_880MHZ_CLK_DIVISOR_MASK); + tmp = tmp | DOT11MAC_880MHZ_CLK_DIVISOR_VAL; + W_REG(&cc->pllcontrol_data, tmp); + } + if ((sih->chip == BCM4319_CHIP_ID) || + (sih->chip == BCM4336_CHIP_ID) || + (sih->chip == BCM4330_CHIP_ID)) + ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MFB; + else + ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MASH; + + /* Write ndiv_int and ndiv_mode to pllcontrol[2] */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + tmp = R_REG(&cc->pllcontrol_data) & + ~(PMU1_PLL0_PC2_NDIV_INT_MASK | PMU1_PLL0_PC2_NDIV_MODE_MASK); + tmp |= + ((xt-> + ndiv_int << PMU1_PLL0_PC2_NDIV_INT_SHIFT) & + PMU1_PLL0_PC2_NDIV_INT_MASK) | ((ndiv_mode << + PMU1_PLL0_PC2_NDIV_MODE_SHIFT) & + PMU1_PLL0_PC2_NDIV_MODE_MASK); + W_REG(&cc->pllcontrol_data, tmp); + + /* Write ndiv_frac to pllcontrol[3] */ + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + tmp = R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC3_NDIV_FRAC_MASK; + tmp |= ((xt->ndiv_frac << PMU1_PLL0_PC3_NDIV_FRAC_SHIFT) & + PMU1_PLL0_PC3_NDIV_FRAC_MASK); + W_REG(&cc->pllcontrol_data, tmp); + + /* Write clock driving strength to pllcontrol[5] */ + if (buf_strength) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + tmp = + R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC5_CLK_DRV_MASK; + tmp |= (buf_strength << PMU1_PLL0_PC5_CLK_DRV_SHIFT); + W_REG(&cc->pllcontrol_data, tmp); + } + + /* to operate the 4319 usb in 24MHz/48MHz; chipcontrol[2][84:83] needs + * to be updated. + */ + if ((sih->chip == BCM4319_CHIP_ID) + && (xt->fref != XTAL_FREQ_30000MHZ)) { + W_REG(&cc->chipcontrol_addr, PMU1_PLL0_CHIPCTL2); + tmp = + R_REG(&cc->chipcontrol_data) & ~CCTL_4319USB_XTAL_SEL_MASK; + if (xt->fref == XTAL_FREQ_24000MHZ) { + tmp |= + (CCTL_4319USB_24MHZ_PLL_SEL << + CCTL_4319USB_XTAL_SEL_SHIFT); + } else if (xt->fref == XTAL_FREQ_48000MHZ) { + tmp |= + (CCTL_4319USB_48MHZ_PLL_SEL << + CCTL_4319USB_XTAL_SEL_SHIFT); + } + W_REG(&cc->chipcontrol_data, tmp); + } + + /* Flush deferred pll control registers writes */ + if (sih->pmurev >= 2) + OR_REG(&cc->pmucontrol, PCTL_PLL_PLLCTL_UPD); + + /* Write XtalFreq. Set the divisor also. */ + tmp = R_REG(&cc->pmucontrol) & + ~(PCTL_ILP_DIV_MASK | PCTL_XTALFREQ_MASK); + tmp |= (((((xt->fref + 127) / 128) - 1) << PCTL_ILP_DIV_SHIFT) & + PCTL_ILP_DIV_MASK) | + ((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK); + + if ((sih->chip == BCM4329_CHIP_ID) + && sih->chiprev == 0) { + /* clear the htstretch before clearing HTReqEn */ + AND_REG(&cc->clkstretch, ~CSTRETCH_HT); + tmp &= ~PCTL_HT_REQ_EN; + } + + W_REG(&cc->pmucontrol, tmp); +} + +u32 si_pmu_ilp_clock(struct si_pub *sih) +{ + static u32 ilpcycles_per_sec; + + if (ISSIM_ENAB(sih) || !PMUCTL_ENAB(sih)) + return ILP_CLOCK; + + if (ilpcycles_per_sec == 0) { + u32 start, end, delta; + u32 origidx = ai_coreidx(sih); + chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX); + start = R_REG(&cc->pmutimer); + mdelay(ILP_CALC_DUR); + end = R_REG(&cc->pmutimer); + delta = end - start; + ilpcycles_per_sec = delta * (1000 / ILP_CALC_DUR); + ai_setcoreidx(sih, origidx); + } + + return ilpcycles_per_sec; +} + +void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage) +{ + u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0; + u8 addr = 0; + + switch (sih->chip) { + case BCM4336_CHIP_ID: + switch (ldo) { + case SET_LDO_VOLTAGE_CLDO_PWM: + addr = 4; + rc_shift = 1; + mask = 0xf; + break; + case SET_LDO_VOLTAGE_CLDO_BURST: + addr = 4; + rc_shift = 5; + mask = 0xf; + break; + case SET_LDO_VOLTAGE_LNLDO1: + addr = 4; + rc_shift = 17; + mask = 0xf; + break; + default: + return; + } + break; + case BCM4330_CHIP_ID: + switch (ldo) { + case SET_LDO_VOLTAGE_CBUCK_PWM: + addr = 3; + rc_shift = 0; + mask = 0x1f; + break; + default: + return; + } + break; + default: + return; + } + + shift = sr_cntl_shift + rc_shift; + + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), + ~0, addr); + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_data), + mask << shift, (voltage & mask) << shift); +} + +u16 si_pmu_fast_pwrup_delay(struct si_pub *sih) +{ + uint delay = PMU_MAX_TRANSITION_DLY; + chipcregs_t *cc; + uint origidx; +#ifdef BCMDBG + char chn[8]; + chn[0] = 0; /* to suppress compile error */ +#endif + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43238_CHIP_ID: + case BCM4331_CHIP_ID: + case BCM6362_CHIP_ID: + case BCM4313_CHIP_ID: + delay = ISSIM_ENAB(sih) ? 70 : 3700; + break; + case BCM4329_CHIP_ID: + if (ISSIM_ENAB(sih)) + delay = 70; + else { + u32 ilp = si_pmu_ilp_clock(sih); + delay = + (si_pmu_res_uptime(sih, cc, RES4329_HT_AVAIL) + + D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - + 1) / ilp); + delay = (11 * delay) / 10; + } + break; + case BCM4319_CHIP_ID: + delay = ISSIM_ENAB(sih) ? 70 : 3700; + break; + case BCM4336_CHIP_ID: + if (ISSIM_ENAB(sih)) + delay = 70; + else { + u32 ilp = si_pmu_ilp_clock(sih); + delay = + (si_pmu_res_uptime(sih, cc, RES4336_HT_AVAIL) + + D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - + 1) / ilp); + delay = (11 * delay) / 10; + } + break; + case BCM4330_CHIP_ID: + if (ISSIM_ENAB(sih)) + delay = 70; + else { + u32 ilp = si_pmu_ilp_clock(sih); + delay = + (si_pmu_res_uptime(sih, cc, RES4330_HT_AVAIL) + + D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - + 1) / ilp); + delay = (11 * delay) / 10; + } + break; + default: + break; + } + /* Return to original core */ + ai_setcoreidx(sih, origidx); + + return (u16) delay; +} + +void si_pmu_sprom_enable(struct si_pub *sih, bool enable) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* Read/write a chipcontrol reg */ +u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), mask, val); +} + +/* Read/write a regcontrol reg */ +u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, regcontrol_data), mask, val); +} + +/* Read/write a pllcontrol reg */ +u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, pllcontrol_data), mask, val); +} + +/* PMU PLL update */ +void si_pmu_pllupd(struct si_pub *sih) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol), + PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); +} + +/* query alp/xtal clock frequency */ +u32 si_pmu_alp_clock(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + u32 clock = ALP_CLOCK; + + /* bail out with default */ + if (!PMUCTL_ENAB(sih)) + return clock; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43238_CHIP_ID: + case BCM4331_CHIP_ID: + case BCM6362_CHIP_ID: + case BCM4716_CHIP_ID: + case BCM4748_CHIP_ID: + case BCM47162_CHIP_ID: + case BCM4313_CHIP_ID: + case BCM5357_CHIP_ID: + /* always 20Mhz */ + clock = 20000 * 1000; + break; + case BCM4329_CHIP_ID: + case BCM4319_CHIP_ID: + case BCM4336_CHIP_ID: + case BCM4330_CHIP_ID: + + clock = si_pmu1_alpclk0(sih, cc); + break; + case BCM5356_CHIP_ID: + /* always 25Mhz */ + clock = 25000 * 1000; + break; + default: + break; + } + + /* Return to original core */ + ai_setcoreidx(sih, origidx); + return clock; +} + +void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid) +{ + chipcregs_t *cc; + uint origidx, intr_val; + u32 tmp = 0; + + /* Remember original core before switch to chipc */ + cc = (chipcregs_t *) ai_switch_core(sih, CC_CORE_ID, &origidx, + &intr_val); + + /* force the HT off */ + if (sih->chip == BCM4336_CHIP_ID) { + tmp = R_REG(&cc->max_res_mask); + tmp &= ~RES4336_HT_AVAIL; + W_REG(&cc->max_res_mask, tmp); + /* wait for the ht to really go away */ + SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0), + 10000); + } + + /* update the pll changes */ + si_pmu_spuravoid_pllupdate(sih, cc, spuravoid); + + /* enable HT back on */ + if (sih->chip == BCM4336_CHIP_ID) { + tmp = R_REG(&cc->max_res_mask); + tmp |= RES4336_HT_AVAIL; + W_REG(&cc->max_res_mask, tmp); + } + + /* Return to original core */ + ai_restore_core(sih, origidx, intr_val); +} + +/* initialize PMU */ +void si_pmu_init(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + if (sih->pmurev == 1) + AND_REG(&cc->pmucontrol, ~PCTL_NOILP_ON_WAIT); + else if (sih->pmurev >= 2) + OR_REG(&cc->pmucontrol, PCTL_NOILP_ON_WAIT); + + if ((sih->chip == BCM4329_CHIP_ID) && (sih->chiprev == 2)) { + /* Fix for 4329b0 bad LPOM state. */ + W_REG(&cc->regcontrol_addr, 2); + OR_REG(&cc->regcontrol_data, 0x100); + + W_REG(&cc->regcontrol_addr, 3); + OR_REG(&cc->regcontrol_data, 0x4); + } + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU chip controls and other chip level stuff */ +void si_pmu_chip_init(struct si_pub *sih) +{ + uint origidx; + + /* Gate off SPROM clock and chip select signals */ + si_pmu_sprom_enable(sih, false); + + /* Remember original core */ + origidx = ai_coreidx(sih); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU switch/regulators */ +void si_pmu_swreg_init(struct si_pub *sih) +{ + switch (sih->chip) { + case BCM4336_CHIP_ID: + /* Reduce CLDO PWM output voltage to 1.2V */ + si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_PWM, 0xe); + /* Reduce CLDO BURST output voltage to 1.2V */ + si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_BURST, + 0xe); + /* Reduce LNLDO1 output voltage to 1.2V */ + si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_LNLDO1, 0xe); + if (sih->chiprev == 0) + si_pmu_regcontrol(sih, 2, 0x400000, 0x400000); + break; + + case BCM4330_CHIP_ID: + /* CBUCK Voltage is 1.8 by default and set that to 1.5 */ + si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CBUCK_PWM, 0); + break; + default: + break; + } +} + +/* initialize PLL */ +void si_pmu_pll_init(struct si_pub *sih, uint xtalfreq) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM4329_CHIP_ID: + if (xtalfreq == 0) + xtalfreq = 38400; + si_pmu1_pllinit0(sih, cc, xtalfreq); + break; + case BCM4313_CHIP_ID: + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43238_CHIP_ID: + case BCM4331_CHIP_ID: + case BCM6362_CHIP_ID: + /* ??? */ + break; + case BCM4319_CHIP_ID: + case BCM4336_CHIP_ID: + case BCM4330_CHIP_ID: + si_pmu1_pllinit0(sih, cc, xtalfreq); + break; + default: + break; + } + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU resources */ +void si_pmu_res_init(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + const pmu_res_updown_t *pmu_res_updown_table = NULL; + uint pmu_res_updown_table_sz = 0; + const pmu_res_depend_t *pmu_res_depend_table = NULL; + uint pmu_res_depend_table_sz = 0; + u32 min_mask = 0, max_mask = 0; + char name[8], *val; + uint i, rsrcs; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM4329_CHIP_ID: + /* Optimize resources up/down timers */ + if (ISSIM_ENAB(sih)) { + pmu_res_updown_table = NULL; + pmu_res_updown_table_sz = 0; + } else { + pmu_res_updown_table = bcm4329_res_updown; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4329_res_updown); + } + /* Optimize resources dependencies */ + pmu_res_depend_table = bcm4329_res_depend; + pmu_res_depend_table_sz = ARRAY_SIZE(bcm4329_res_depend); + break; + + case BCM4319_CHIP_ID: + /* Optimize resources up/down timers */ + if (ISSIM_ENAB(sih)) { + pmu_res_updown_table = bcm4319a0_res_updown_qt; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4319a0_res_updown_qt); + } else { + pmu_res_updown_table = bcm4319a0_res_updown; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4319a0_res_updown); + } + /* Optimize resources dependancies masks */ + pmu_res_depend_table = bcm4319a0_res_depend; + pmu_res_depend_table_sz = ARRAY_SIZE(bcm4319a0_res_depend); + break; + + case BCM4336_CHIP_ID: + /* Optimize resources up/down timers */ + if (ISSIM_ENAB(sih)) { + pmu_res_updown_table = bcm4336a0_res_updown_qt; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4336a0_res_updown_qt); + } else { + pmu_res_updown_table = bcm4336a0_res_updown; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4336a0_res_updown); + } + /* Optimize resources dependancies masks */ + pmu_res_depend_table = bcm4336a0_res_depend; + pmu_res_depend_table_sz = ARRAY_SIZE(bcm4336a0_res_depend); + break; + + case BCM4330_CHIP_ID: + /* Optimize resources up/down timers */ + if (ISSIM_ENAB(sih)) { + pmu_res_updown_table = bcm4330a0_res_updown_qt; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4330a0_res_updown_qt); + } else { + pmu_res_updown_table = bcm4330a0_res_updown; + pmu_res_updown_table_sz = + ARRAY_SIZE(bcm4330a0_res_updown); + } + /* Optimize resources dependancies masks */ + pmu_res_depend_table = bcm4330a0_res_depend; + pmu_res_depend_table_sz = ARRAY_SIZE(bcm4330a0_res_depend); + break; + + default: + break; + } + + /* # resources */ + rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; + + /* Program up/down timers */ + while (pmu_res_updown_table_sz--) { + W_REG(&cc->res_table_sel, + pmu_res_updown_table[pmu_res_updown_table_sz].resnum); + W_REG(&cc->res_updn_timer, + pmu_res_updown_table[pmu_res_updown_table_sz].updown); + } + /* Apply nvram overrides to up/down timers */ + for (i = 0; i < rsrcs; i++) { + snprintf(name, sizeof(name), "r%dt", i); + val = getvar(NULL, name); + if (val == NULL) + continue; + W_REG(&cc->res_table_sel, (u32) i); + W_REG(&cc->res_updn_timer, + (u32) simple_strtoul(val, NULL, 0)); + } + + /* Program resource dependencies table */ + while (pmu_res_depend_table_sz--) { + if (pmu_res_depend_table[pmu_res_depend_table_sz].filter != NULL + && !(pmu_res_depend_table[pmu_res_depend_table_sz]. + filter) (sih)) + continue; + for (i = 0; i < rsrcs; i++) { + if ((pmu_res_depend_table[pmu_res_depend_table_sz]. + res_mask & PMURES_BIT(i)) == 0) + continue; + W_REG(&cc->res_table_sel, i); + switch (pmu_res_depend_table[pmu_res_depend_table_sz]. + action) { + case RES_DEPEND_SET: + W_REG(&cc->res_dep_mask, + pmu_res_depend_table + [pmu_res_depend_table_sz].depend_mask); + break; + case RES_DEPEND_ADD: + OR_REG(&cc->res_dep_mask, + pmu_res_depend_table + [pmu_res_depend_table_sz].depend_mask); + break; + case RES_DEPEND_REMOVE: + AND_REG(&cc->res_dep_mask, + ~pmu_res_depend_table + [pmu_res_depend_table_sz].depend_mask); + break; + default: + break; + } + } + } + /* Apply nvram overrides to dependancies masks */ + for (i = 0; i < rsrcs; i++) { + snprintf(name, sizeof(name), "r%dd", i); + val = getvar(NULL, name); + if (val == NULL) + continue; + W_REG(&cc->res_table_sel, (u32) i); + W_REG(&cc->res_dep_mask, + (u32) simple_strtoul(val, NULL, 0)); + } + + /* Determine min/max rsrc masks */ + si_pmu_res_masks(sih, &min_mask, &max_mask); + + /* It is required to program max_mask first and then min_mask */ + + /* Program max resource mask */ + + if (max_mask) + W_REG(&cc->max_res_mask, max_mask); + + /* Program min resource mask */ + + if (min_mask) + W_REG(&cc->min_res_mask, min_mask); + + /* Add some delay; allow resources to come up and settle. */ + mdelay(2); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +u32 si_pmu_measure_alpclk(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + u32 alp_khz; + + if (sih->pmurev < 10) + return 0; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) { + u32 ilp_ctr, alp_hz; + + /* + * Enable the reg to measure the freq, + * in case it was disabled before + */ + W_REG(&cc->pmu_xtalfreq, + 1U << PMU_XTALFREQ_REG_MEASURE_SHIFT); + + /* Delay for well over 4 ILP clocks */ + udelay(1000); + + /* Read the latched number of ALP ticks per 4 ILP ticks */ + ilp_ctr = + R_REG(&cc->pmu_xtalfreq) & PMU_XTALFREQ_REG_ILPCTR_MASK; + + /* + * Turn off the PMU_XTALFREQ_REG_MEASURE_SHIFT + * bit to save power + */ + W_REG(&cc->pmu_xtalfreq, 0); + + /* Calculate ALP frequency */ + alp_hz = (ilp_ctr * EXT_ILP_HZ) / 4; + + /* + * Round to nearest 100KHz, and at + * the same time convert to KHz + */ + alp_khz = (alp_hz + 50000) / 100000 * 100; + } else + alp_khz = 0; + + /* Return to original core */ + ai_setcoreidx(sih, origidx); + + return alp_khz; +} + +bool si_pmu_is_otp_powered(struct si_pub *sih) +{ + uint idx; + chipcregs_t *cc; + bool st; + + /* Remember original core before switch to chipc */ + idx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM4329_CHIP_ID: + st = (R_REG(&cc->res_state) & PMURES_BIT(RES4329_OTP_PU)) + != 0; + break; + case BCM4319_CHIP_ID: + st = (R_REG(&cc->res_state) & PMURES_BIT(RES4319_OTP_PU)) + != 0; + break; + case BCM4336_CHIP_ID: + st = (R_REG(&cc->res_state) & PMURES_BIT(RES4336_OTP_PU)) + != 0; + break; + case BCM4330_CHIP_ID: + st = (R_REG(&cc->res_state) & PMURES_BIT(RES4330_OTP_PU)) + != 0; + break; + + /* These chip doesn't use PMU bit to power up/down OTP. OTP always on. + * Use OTP_INIT command to reset/refresh state. + */ + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM43421_CHIP_ID: + case BCM43236_CHIP_ID: + case BCM43235_CHIP_ID: + case BCM43238_CHIP_ID: + st = true; + break; + default: + st = true; + break; + } + + /* Return to original core */ + ai_setcoreidx(sih, idx); + return st; +} + +/* power up/down OTP through PMU resources */ +void si_pmu_otp_power(struct si_pub *sih, bool on) +{ + chipcregs_t *cc; + uint origidx; + u32 rsrcs = 0; /* rsrcs to turn on/off OTP power */ + + /* Don't do anything if OTP is disabled */ + if (ai_is_otp_disabled(sih)) + return; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM4329_CHIP_ID: + rsrcs = PMURES_BIT(RES4329_OTP_PU); + break; + case BCM4319_CHIP_ID: + rsrcs = PMURES_BIT(RES4319_OTP_PU); + break; + case BCM4336_CHIP_ID: + rsrcs = PMURES_BIT(RES4336_OTP_PU); + break; + case BCM4330_CHIP_ID: + rsrcs = PMURES_BIT(RES4330_OTP_PU); + break; + default: + break; + } + + if (rsrcs != 0) { + u32 otps; + + /* Figure out the dependancies (exclude min_res_mask) */ + u32 deps = si_pmu_res_deps(sih, cc, rsrcs, true); + u32 min_mask = 0, max_mask = 0; + si_pmu_res_masks(sih, &min_mask, &max_mask); + deps &= ~min_mask; + /* Turn on/off the power */ + if (on) { + OR_REG(&cc->min_res_mask, (rsrcs | deps)); + SPINWAIT(!(R_REG(&cc->res_state) & rsrcs), + PMU_MAX_TRANSITION_DLY); + } else { + AND_REG(&cc->min_res_mask, ~(rsrcs | deps)); + } + + SPINWAIT((((otps = R_REG(&cc->otpstatus)) & OTPS_READY) != + (on ? OTPS_READY : 0)), 100); + } + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} diff --git a/drivers/staging/brcm80211/brcmsmac/pmu.h b/drivers/staging/brcm80211/brcmsmac/pmu.h new file mode 100644 index 0000000..eff8d5b --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/pmu.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + + +#ifndef _BRCM_PMU_H_ +#define _BRCM_PMU_H_ + +#include + +#include + +/* + * LDO selections used in si_pmu_set_ldo_voltage + */ +#define SET_LDO_VOLTAGE_LDO1 1 +#define SET_LDO_VOLTAGE_LDO2 2 +#define SET_LDO_VOLTAGE_LDO3 3 +#define SET_LDO_VOLTAGE_PAREF 4 +#define SET_LDO_VOLTAGE_CLDO_PWM 5 +#define SET_LDO_VOLTAGE_CLDO_BURST 6 +#define SET_LDO_VOLTAGE_CBUCK_PWM 7 +#define SET_LDO_VOLTAGE_CBUCK_BURST 8 +#define SET_LDO_VOLTAGE_LNLDO1 9 +#define SET_LDO_VOLTAGE_LNLDO2_SEL 10 + +extern void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage); +extern u16 si_pmu_fast_pwrup_delay(struct si_pub *sih); +extern void si_pmu_sprom_enable(struct si_pub *sih, bool enable); +extern u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_ilp_clock(struct si_pub *sih); +extern u32 si_pmu_alp_clock(struct si_pub *sih); +extern void si_pmu_pllupd(struct si_pub *sih); +extern void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid); +extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern void si_pmu_init(struct si_pub *sih); +extern void si_pmu_chip_init(struct si_pub *sih); +extern void si_pmu_pll_init(struct si_pub *sih, u32 xtalfreq); +extern void si_pmu_res_init(struct si_pub *sih); +extern void si_pmu_swreg_init(struct si_pub *sih); +extern u32 si_pmu_measure_alpclk(struct si_pub *sih); +extern bool si_pmu_is_otp_powered(struct si_pub *sih); +extern void si_pmu_otp_power(struct si_pub *sih, bool on); + +#endif /* _BRCM_PMU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/pub.h b/drivers/staging/brcm80211/brcmsmac/pub.h new file mode 100644 index 0000000..e5f24b0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/pub.h @@ -0,0 +1,674 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_PUB_H_ +#define _BRCM_PUB_H_ + +#include "types.h" /* forward structure declarations */ +#include "brcmu_wifi.h" /* for chanspec_t */ + +#define WLC_NUMRATES 16 /* max # of rates in a rateset */ +#define MAXMULTILIST 32 /* max # multicast addresses */ +#define D11_PHY_HDR_LEN 6 /* Phy header length - 6 bytes */ + +/* phy types */ +#define PHY_TYPE_A 0 /* Phy type A */ +#define PHY_TYPE_G 2 /* Phy type G */ +#define PHY_TYPE_N 4 /* Phy type N */ +#define PHY_TYPE_LP 5 /* Phy type Low Power A/B/G */ +#define PHY_TYPE_SSN 6 /* Phy type Single Stream N */ +#define PHY_TYPE_LCN 8 /* Phy type Single Stream N */ +#define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */ +#define PHY_TYPE_HT 7 /* Phy type 3-Stream N */ + +/* bw */ +#define WLC_10_MHZ 10 /* 10Mhz nphy channel bandwidth */ +#define WLC_20_MHZ 20 /* 20Mhz nphy channel bandwidth */ +#define WLC_40_MHZ 40 /* 40Mhz nphy channel bandwidth */ + +#define CHSPEC_WLC_BW(chanspec) (CHSPEC_IS40(chanspec) ? WLC_40_MHZ : \ + CHSPEC_IS20(chanspec) ? WLC_20_MHZ : \ + WLC_10_MHZ) + +#define WLC_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */ +#define WLC_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */ +#define WLC_RSSI_VERY_LOW -80 /* Very low quality cutoffs */ +#define WLC_RSSI_LOW -70 /* Low quality cutoffs */ +#define WLC_RSSI_GOOD -68 /* Good quality cutoffs */ +#define WLC_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */ +#define WLC_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */ + +#define WLC_PHYTYPE(_x) (_x) /* macro to perform WLC PHY -> D11 PHY TYPE, currently 1:1 */ + +#define MA_WINDOW_SZ 8 /* moving average window size */ + +#define WLC_SNR_INVALID 0 /* invalid SNR value */ + +/* a large TX Power as an init value to factor out of min() calculations, + * keep low enough to fit in an s8, units are .25 dBm + */ +#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ + +/* rate related definitions */ +#define WLC_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */ +#define WLC_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */ + +/* legacy rx Antenna diversity for SISO rates */ +#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ +#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ +#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ +#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ +#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ +#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ + +/* legacy rx Antenna diversity for SISO rates */ +#define ANT_TX_FORCE_0 0 /* Tx on antenna 0, "legacy term Main" */ +#define ANT_TX_FORCE_1 1 /* Tx on antenna 1, "legacy term Aux" */ +#define ANT_TX_LAST_RX 3 /* Tx on phy's last good Rx antenna */ +#define ANT_TX_DEF 3 /* driver's default tx antenna setting */ + +#define TXCORE_POLICY_ALL 0x1 /* use all available core for transmit */ + +/* Tx Chain values */ +#define TXCHAIN_DEF 0x1 /* def bitmap of txchain */ +#define TXCHAIN_DEF_NPHY 0x3 /* default bitmap of tx chains for nphy */ +#define TXCHAIN_DEF_HTPHY 0x7 /* default bitmap of tx chains for nphy */ +#define RXCHAIN_DEF 0x1 /* def bitmap of rxchain */ +#define RXCHAIN_DEF_NPHY 0x3 /* default bitmap of rx chains for nphy */ +#define RXCHAIN_DEF_HTPHY 0x7 /* default bitmap of rx chains for nphy */ +#define ANTSWITCH_NONE 0 /* no antenna switch */ +#define ANTSWITCH_TYPE_1 1 /* antenna switch on 4321CB2, 2of3 */ +#define ANTSWITCH_TYPE_2 2 /* antenna switch on 4321MPCI, 2of3 */ +#define ANTSWITCH_TYPE_3 3 /* antenna switch on 4322, 2of3 */ + +#define RXBUFSZ PKTBUFSZ +#ifndef AIDMAPSZ +#define AIDMAPSZ (roundup(MAXSCB, NBBY)/NBBY) /* aid bitmap size in bytes */ +#endif /* AIDMAPSZ */ + +#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ + +#define WL_SPURAVOID_OFF 0 +#define WL_SPURAVOID_ON1 1 +#define WL_SPURAVOID_ON2 2 + +struct ieee80211_tx_queue_params; + +typedef struct wlc_tunables { + int ntxd; /* size of tx descriptor table */ + int nrxd; /* size of rx descriptor table */ + int rxbufsz; /* size of rx buffers to post */ + int nrxbufpost; /* # of rx buffers to post */ + int maxscb; /* # of SCBs supported */ + int ampdunummpdu; /* max number of mpdu in an ampdu */ + int maxpktcb; /* max # of packet callbacks */ + int maxucodebss; /* max # of BSS handled in ucode bcn/prb */ + int maxucodebss4; /* max # of BSS handled in sw bcn/prb */ + int maxbss; /* max # of bss info elements in scan list */ + int datahiwat; /* data msg txq hiwat mark */ + int ampdudatahiwat; /* AMPDU msg txq hiwat mark */ + int rxbnd; /* max # of rx bufs to process before deferring to dpc */ + int txsbnd; /* max # tx status to process in wlc_txstatus() */ + int memreserved; /* memory reserved for BMAC's USB dma rx */ +} wlc_tunables_t; + +typedef struct wlc_rateset { + uint count; /* number of rates in rates[] */ + u8 rates[WLC_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ + u8 htphy_membership; /* HT PHY Membership */ + u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ +} wlc_rateset_t; + +struct rsn_parms { + u8 flags; /* misc booleans (e.g., supported) */ + u8 multicast; /* multicast cipher */ + u8 ucount; /* count of unicast ciphers */ + u8 unicast[4]; /* unicast ciphers */ + u8 acount; /* count of auth modes */ + u8 auth[4]; /* Authentication modes */ + u8 PAD[4]; /* padding for future growth */ +}; + +/* + * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. + */ +#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) + +#define RSN_FLAGS_SUPPORTED 0x1 /* Flag for rsn_params */ +#define RSN_FLAGS_PREAUTH 0x2 /* Flag for WPA2 rsn_params */ + +/* All the HT-specific default advertised capabilities (including AMPDU) + * should be grouped here at one place + */ +#define AMPDU_DEF_MPDU_DENSITY 6 /* default mpdu density (110 ==> 4us) */ + +/* defaults for the HT (MIMO) bss */ +#define HT_CAP (IEEE80211_HT_CAP_SM_PS |\ + IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD |\ + IEEE80211_HT_CAP_MAX_AMSDU | IEEE80211_HT_CAP_DSSSCCK40) + +/* wlc internal bss_info */ +typedef struct wlc_bss_info { + u8 BSSID[ETH_ALEN]; /* network BSSID */ + u16 flags; /* flags for internal attributes */ + u8 SSID_len; /* the length of SSID */ + u8 SSID[32]; /* SSID string */ + s16 RSSI; /* receive signal strength (in dBm) */ + s16 SNR; /* receive signal SNR in dB */ + u16 beacon_period; /* units are Kusec */ + u16 atim_window; /* units are Kusec */ + chanspec_t chanspec; /* Channel num, bw, ctrl_sb and band */ + s8 infra; /* 0=IBSS, 1=infrastructure, 2=unknown */ + wlc_rateset_t rateset; /* supported rates */ + u8 dtim_period; /* DTIM period */ + s8 phy_noise; /* noise right after tx (in dBm) */ + u16 capability; /* Capability information */ + u8 wme_qosinfo; /* QoS Info from WME IE; valid if WLC_BSS_WME flag set */ + struct rsn_parms wpa; + struct rsn_parms wpa2; + u16 qbss_load_aac; /* qbss load available admission capacity */ + /* qbss_load_chan_free <- (0xff - channel_utilization of qbss_load_ie_t) */ + u8 qbss_load_chan_free; /* indicates how free the channel is */ + u8 mcipher; /* multicast cipher */ + u8 wpacfg; /* wpa config index */ +} wlc_bss_info_t; + +/* forward declarations */ +struct wlc_if; + +/* wlc_ioctl error codes */ +#define WLC_ENOIOCTL 1 /* No such Ioctl */ +#define WLC_EINVAL 2 /* Invalid value */ +#define WLC_ETOOSMALL 3 /* Value too small */ +#define WLC_ETOOBIG 4 /* Value too big */ +#define WLC_ERANGE 5 /* Out of range */ +#define WLC_EDOWN 6 /* Down */ +#define WLC_EUP 7 /* Up */ +#define WLC_ENOMEM 8 /* No Memory */ +#define WLC_EBUSY 9 /* Busy */ + +/* IOVar flags for common error checks */ +#define IOVF_MFG (1<<3) /* flag for mfgtest iovars */ +#define IOVF_WHL (1<<4) /* value must be whole (0-max) */ +#define IOVF_NTRL (1<<5) /* value must be natural (1-max) */ + +#define IOVF_SET_UP (1<<6) /* set requires driver be up */ +#define IOVF_SET_DOWN (1<<7) /* set requires driver be down */ +#define IOVF_SET_CLK (1<<8) /* set requires core clock */ +#define IOVF_SET_BAND (1<<9) /* set requires fixed band */ + +#define IOVF_GET_UP (1<<10) /* get requires driver be up */ +#define IOVF_GET_DOWN (1<<11) /* get requires driver be down */ +#define IOVF_GET_CLK (1<<12) /* get requires core clock */ +#define IOVF_GET_BAND (1<<13) /* get requires fixed band */ +#define IOVF_OPEN_ALLOW (1<<14) /* set allowed iovar for opensrc */ + +/* watchdog down and dump callback function proto's */ +typedef int (*watchdog_fn_t) (void *handle); +typedef int (*down_fn_t) (void *handle); +typedef int (*dump_fn_t) (void *handle, struct brcmu_strbuf *b); + +/* IOVar handler + * + * handle - a pointer value registered with the function + * vi - iovar_info that was looked up + * actionid - action ID, calculated by IOV_GVAL() and IOV_SVAL() based on varid. + * name - the actual iovar name + * params/plen - parameters and length for a get, input only. + * arg/len - buffer and length for value to be set or retrieved, input or output. + * vsize - value size, valid for integer type only. + * wlcif - interface context (wlc_if pointer) + * + * All pointers may point into the same buffer. + */ +typedef int (*iovar_fn_t) (void *handle, const struct brcmu_iovar *vi, + u32 actionid, const char *name, void *params, + uint plen, void *arg, int alen, int vsize, + struct wlc_if *wlcif); + +#define MAC80211_PROMISC_BCNS (1 << 0) +#define MAC80211_SCAN (1 << 1) + +/* + * Public portion of "common" os-independent state structure. + * The wlc handle points at this. + */ +struct wlc_pub { + void *wlc; + + struct ieee80211_hw *ieee_hw; + struct scb *global_scb; + scb_ampdu_t *global_ampdu; + uint mac80211_state; + uint unit; /* device instance number */ + uint corerev; /* core revision */ + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ + char *vars; /* "environment" name=value */ + bool up; /* interface up and running */ + bool hw_off; /* HW is off */ + wlc_tunables_t *tunables; /* tunables: ntxd, nrxd, maxscb, etc. */ + bool hw_up; /* one time hw up/down(from boot or hibernation) */ + bool _piomode; /* true if pio mode *//* BMAC_NOTE: NEED In both */ + uint _nbands; /* # bands supported */ + uint now; /* # elapsed seconds */ + + bool promisc; /* promiscuous destination address */ + bool delayed_down; /* down delayed */ + bool _ap; /* AP mode enabled */ + bool _apsta; /* simultaneous AP/STA mode enabled */ + bool _assoc_recreate; /* association recreation on up transitions */ + int _wme; /* WME QoS mode */ + u8 _mbss; /* MBSS mode on */ + bool allmulti; /* enable all multicasts */ + bool associated; /* true:part of [I]BSS, false: not */ + /* (union of stas_associated, aps_associated) */ + bool phytest_on; /* whether a PHY test is running */ + bool bf_preempt_4306; /* True to enable 'darwin' mode */ + bool _ampdu; /* ampdu enabled or not */ + bool _cac; /* 802.11e CAC enabled */ + u8 _n_enab; /* bitmap of 11N + HT support */ + bool _n_reqd; /* N support required for clients */ + + s8 _coex; /* 20/40 MHz BSS Management AUTO, ENAB, DISABLE */ + bool _priofc; /* Priority-based flowcontrol */ + + u8 cur_etheraddr[ETH_ALEN]; /* our local ethernet address */ + + u8 *multicast; /* ptr to list of multicast addresses */ + uint nmulticast; /* # enabled multicast addresses */ + + u32 wlfeatureflag; /* Flags to control sw features from registry */ + int psq_pkts_total; /* total num of ps pkts */ + + u16 txmaxpkts; /* max number of large pkts allowed to be pending */ + + /* s/w decryption counters */ + u32 swdecrypt; /* s/w decrypt attempts */ + + int bcmerror; /* last bcm error */ + + mbool radio_disabled; /* bit vector for radio disabled reasons */ + bool radio_active; /* radio on/off state */ + u16 roam_time_thresh; /* Max. # secs. of not hearing beacons + * before roaming. + */ + bool align_wd_tbtt; /* Align watchdog with tbtt indication + * handling. This flag is cleared by default + * and is set by per port code explicitly and + * you need to make sure the OSL_SYSUPTIME() + * is implemented properly in osl of that port + * when it enables this Power Save feature. + */ + + u16 boardrev; /* version # of particular board */ + u8 sromrev; /* version # of the srom */ + char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ + u32 boardflags; /* Board specific flags from srom */ + u32 boardflags2; /* More board flags if sromrev >= 4 */ + bool tempsense_disable; /* disable periodic tempsense check */ + bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */ + bool _ampdumac; /* mac assist ampdu enabled or not */ + + struct wl_cnt *_cnt; /* low-level counters in driver */ +}; + +/* wl_monitor rx status per packet */ +typedef struct wl_rxsts { + uint pkterror; /* error flags per pkt */ + uint phytype; /* 802.11 A/B/G ... */ + uint channel; /* channel */ + uint datarate; /* rate in 500kbps */ + uint antenna; /* antenna pkts received on */ + uint pktlength; /* pkt length minus bcm phy hdr */ + u32 mactime; /* time stamp from mac, count per 1us */ + uint sq; /* signal quality */ + s32 signal; /* in dbm */ + s32 noise; /* in dbm */ + uint preamble; /* Unknown, short, long */ + uint encoding; /* Unknown, CCK, PBCC, OFDM */ + uint nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */ + struct brcms_if *wlif; /* wl interface */ +} wl_rxsts_t; + +/* status per error RX pkt */ +#define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */ +#define WL_RXS_RUNT_ERROR 0x00000002 /* Runt packet */ +#define WL_RXS_ALIGN_ERROR 0x00000004 /* Misaligned packet */ +#define WL_RXS_OVERSIZE_ERROR 0x00000008 /* packet bigger than RX_LENGTH (usually 1518) */ +#define WL_RXS_WEP_ICV_ERROR 0x00000010 /* Integrity Check Value error */ +#define WL_RXS_WEP_ENCRYPTED 0x00000020 /* Encrypted with WEP */ +#define WL_RXS_PLCP_SHORT 0x00000040 /* Short PLCP error */ +#define WL_RXS_DECRYPT_ERR 0x00000080 /* Decryption error */ +#define WL_RXS_OTHER_ERR 0x80000000 /* Other errors */ + +/* phy type */ +#define WL_RXS_PHY_A 0x00000000 /* A phy type */ +#define WL_RXS_PHY_B 0x00000001 /* B phy type */ +#define WL_RXS_PHY_G 0x00000002 /* G phy type */ +#define WL_RXS_PHY_N 0x00000004 /* N phy type */ + +/* encoding */ +#define WL_RXS_ENCODING_CCK 0x00000000 /* CCK encoding */ +#define WL_RXS_ENCODING_OFDM 0x00000001 /* OFDM encoding */ + +/* preamble */ +#define WL_RXS_UNUSED_STUB 0x0 /* stub to match with wlc_ethereal.h */ +#define WL_RXS_PREAMBLE_SHORT 0x00000001 /* Short preamble */ +#define WL_RXS_PREAMBLE_LONG 0x00000002 /* Long preamble */ +#define WL_RXS_PREAMBLE_MIMO_MM 0x00000003 /* MIMO mixed mode preamble */ +#define WL_RXS_PREAMBLE_MIMO_GF 0x00000004 /* MIMO green field preamble */ + +#define WL_RXS_NFRM_AMPDU_FIRST 0x00000001 /* first MPDU in A-MPDU */ +#define WL_RXS_NFRM_AMPDU_SUB 0x00000002 /* subsequent MPDU(s) in A-MPDU */ +#define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */ +#define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */ + +enum wlc_par_id { + IOV_MPC = 1, + IOV_RTSTHRESH, + IOV_QTXPOWER, + IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */ +}; + +/* forward declare and use the struct notation so we don't have to + * have it defined if not necessary. + */ +struct wlc_info; +struct wlc_hw_info; +struct wlc_bsscfg; +struct wlc_if; + +/*********************************************** + * Feature-related macros to optimize out code * + * ********************************************* + */ + +/* AP Support (versus STA) */ +#define AP_ENAB(pub) (0) + +/* Macro to check if APSTA mode enabled */ +#define APSTA_ENAB(pub) (0) + +/* Some useful combinations */ +#define STA_ONLY(pub) (!AP_ENAB(pub)) +#define AP_ONLY(pub) (AP_ENAB(pub) && !APSTA_ENAB(pub)) + +#define ENAB_1x1 0x01 +#define ENAB_2x2 0x02 +#define ENAB_3x3 0x04 +#define ENAB_4x4 0x08 +#define SUPPORT_11N (ENAB_1x1|ENAB_2x2) +#define SUPPORT_HT (ENAB_1x1|ENAB_2x2|ENAB_3x3) +/* WL11N Support */ +#if ((defined(NCONF) && (NCONF != 0)) || (defined(LCNCONF) && (LCNCONF != 0)) || \ + (defined(HTCONF) && (HTCONF != 0)) || (defined(SSLPNCONF) && (SSLPNCONF != 0))) +#define N_ENAB(pub) ((pub)->_n_enab & SUPPORT_11N) +#define N_REQD(pub) ((pub)->_n_reqd) +#else +#define N_ENAB(pub) 0 +#define N_REQD(pub) 0 +#endif + +#if (defined(HTCONF) && (HTCONF != 0)) +#define HT_ENAB(pub) (((pub)->_n_enab & SUPPORT_HT) == SUPPORT_HT) +#else +#define HT_ENAB(pub) 0 +#endif + +#define AMPDU_AGG_HOST 1 +#define AMPDU_ENAB(pub) ((pub)->_ampdu) + +#define EDCF_ENAB(pub) (WME_ENAB(pub)) +#define QOS_ENAB(pub) (WME_ENAB(pub) || N_ENAB(pub)) + +#define MONITOR_ENAB(wlc) ((wlc)->monitor) + +#define PROMISC_ENAB(wlc) ((wlc)->promisc) + +#define WLC_PREC_COUNT 16 /* Max precedence level implemented */ + +/* pri is priority encoded in the packet. This maps the Packet priority to + * enqueue precedence as defined in wlc_prec_map + */ +extern const u8 wlc_prio2prec_map[]; +#define WLC_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7] + +/* This maps priority to one precedence higher - Used by PS-Poll response packets to + * simulate enqueue-at-head operation, but still maintain the order on the queue + */ +#define WLC_PRIO_TO_HI_PREC(pri) min(WLC_PRIO_TO_PREC(pri) + 1, WLC_PREC_COUNT - 1) + +extern const u8 wme_fifo2ac[]; +#define WME_PRIO2AC(prio) wme_fifo2ac[prio2fifo[(prio)]] + +/* Mask to describe all precedence levels */ +#define WLC_PREC_BMP_ALL MAXBITVAL(WLC_PREC_COUNT) + +/* Define a bitmap of precedences comprised by each AC */ +#define WLC_PREC_BMP_AC_BE (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BE)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \ + NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_EE)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_EE))) +#define WLC_PREC_BMP_AC_BK (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BK)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \ + NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NONE)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NONE))) +#define WLC_PREC_BMP_AC_VI (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_CL)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \ + NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VI)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VI))) +#define WLC_PREC_BMP_AC_VO (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VO)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \ + NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NC)) | \ + NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NC))) + +/* WME Support */ +#define WME_ENAB(pub) ((pub)->_wme != OFF) +#define WME_AUTO(wlc) ((wlc)->pub->_wme == AUTO) + +#define WLC_USE_COREFLAGS 0xffffffff /* invalid core flags, use the saved coreflags */ + + +/* network protection config */ +#define WLC_PROT_G_SPEC 1 /* SPEC g protection */ +#define WLC_PROT_G_OVR 2 /* SPEC g prot override */ +#define WLC_PROT_G_USER 3 /* gmode specified by user */ +#define WLC_PROT_OVERLAP 4 /* overlap */ +#define WLC_PROT_N_USER 10 /* nmode specified by user */ +#define WLC_PROT_N_CFG 11 /* n protection */ +#define WLC_PROT_N_CFG_OVR 12 /* n protection override */ +#define WLC_PROT_N_NONGF 13 /* non-GF protection */ +#define WLC_PROT_N_NONGF_OVR 14 /* non-GF protection override */ +#define WLC_PROT_N_PAM_OVR 15 /* n preamble override */ +#define WLC_PROT_N_OBSS 16 /* non-HT OBSS present */ + +/* + * 54g modes (basic bits may still be overridden) + * + * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 + * Preamble: Long + * Shortslot: Off + * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: Auto + * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 + * Extended Rateset: 6b, 9, 12b, 48 + * Preamble: Short required + * Shortslot: Auto + * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: On + * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 + * Preamble: Short required + * Shortslot: On and required + * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b + * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 + * Preamble: Long + * Shortslot: Auto + */ +#define GMODE_LEGACY_B 0 +#define GMODE_AUTO 1 +#define GMODE_ONLY 2 +#define GMODE_B_DEFERRED 3 +#define GMODE_PERFORMANCE 4 +#define GMODE_LRS 5 +#define GMODE_MAX 6 + +/* values for PLCPHdr_override */ +#define WLC_PLCP_AUTO -1 +#define WLC_PLCP_SHORT 0 +#define WLC_PLCP_LONG 1 + +/* values for g_protection_override and n_protection_override */ +#define WLC_PROTECTION_AUTO -1 +#define WLC_PROTECTION_OFF 0 +#define WLC_PROTECTION_ON 1 +#define WLC_PROTECTION_MMHDR_ONLY 2 +#define WLC_PROTECTION_CTS_ONLY 3 + +/* values for g_protection_control and n_protection_control */ +#define WLC_PROTECTION_CTL_OFF 0 +#define WLC_PROTECTION_CTL_LOCAL 1 +#define WLC_PROTECTION_CTL_OVERLAP 2 + +/* values for n_protection */ +#define WLC_N_PROTECTION_OFF 0 +#define WLC_N_PROTECTION_OPTIONAL 1 +#define WLC_N_PROTECTION_20IN40 2 +#define WLC_N_PROTECTION_MIXEDMODE 3 + +/* values for band specific 40MHz capabilities */ +#define WLC_N_BW_20ALL 0 +#define WLC_N_BW_40ALL 1 +#define WLC_N_BW_20IN2G_40IN5G 2 + +/* bitflags for SGI support (sgi_rx iovar) */ +#define WLC_N_SGI_20 0x01 +#define WLC_N_SGI_40 0x02 + +/* defines used by the nrate iovar */ +#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ +#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ +#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ +#define NRATE_STF_SHIFT 8 /* stf mode shift */ +#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ +#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ +#define NRATE_SGI_SHIFT 23 /* sgi mode */ +#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ +#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ + +#define NRATE_STF_SISO 0 /* stf mode SISO */ +#define NRATE_STF_CDD 1 /* stf mode CDD */ +#define NRATE_STF_STBC 2 /* stf mode STBC */ +#define NRATE_STF_SDM 3 /* stf mode SDM */ + +#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ + +#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ + +typedef struct { + u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ + u8 num_antcfg; /* number of available antenna configurations */ +} wlc_antselcfg_t; + +/* common functions for every port */ +extern void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam, uint *perr); +extern uint wlc_detach(struct wlc_info *wlc); +extern int wlc_up(struct wlc_info *wlc); +extern uint wlc_down(struct wlc_info *wlc); + +extern int wlc_set(struct wlc_info *wlc, int cmd, int arg); +extern int wlc_get(struct wlc_info *wlc, int cmd, int *arg); +extern bool wlc_chipmatch(u16 vendor, u16 device); +extern void wlc_init(struct wlc_info *wlc); +extern void wlc_reset(struct wlc_info *wlc); + +extern void wlc_intrson(struct wlc_info *wlc); +extern u32 wlc_intrsoff(struct wlc_info *wlc); +extern void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask); +extern bool wlc_intrsupd(struct wlc_info *wlc); +extern bool wlc_isr(struct wlc_info *wlc, bool *wantdpc); +extern bool wlc_dpc(struct wlc_info *wlc, bool bounded); +extern bool wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, + struct ieee80211_hw *hw); +extern int wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, + struct wlc_if *wlcif); +extern bool wlc_aggregatable(struct wlc_info *wlc, u8 tid); + +/* helper functions */ +extern void wlc_statsupd(struct wlc_info *wlc); +extern void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val); +extern int wlc_get_header_len(void); +extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); +extern void wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, + const u8 *addr); +extern void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, + const struct ieee80211_tx_queue_params *arg, + bool suspend); +extern struct wlc_pub *wlc_pub(void *wlc); + +/* common functions for every port */ +extern void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, + int bands); +extern void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset); +extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs); + +struct ieee80211_sta; +extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta, + u16 tid); +extern int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val); +extern int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr); +extern char *getvar(char *vars, const char *name); +extern int getintvar(char *vars, const char *name); + +/* wlc_phy.c helper functions */ +extern void wlc_set_ps_ctrl(struct wlc_info *wlc); +extern void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val); + +extern int wlc_module_register(struct wlc_pub *pub, + const char *name, void *hdl, + watchdog_fn_t watchdog_fn, down_fn_t down_fn); +extern int wlc_module_unregister(struct wlc_pub *pub, const char *name, + void *hdl); +extern void wlc_suspend_mac_and_wait(struct wlc_info *wlc); +extern void wlc_enable_mac(struct wlc_info *wlc); +extern void wlc_associate_upd(struct wlc_info *wlc, bool state); +extern void wlc_scan_start(struct wlc_info *wlc); +extern void wlc_scan_stop(struct wlc_info *wlc); +extern int wlc_get_curband(struct wlc_info *wlc); +extern void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop); + +/* helper functions */ +extern bool wlc_check_radio_disabled(struct wlc_info *wlc); +extern bool wlc_radio_monitor_stop(struct wlc_info *wlc); + +#define MAXBANDS 2 /* Maximum #of bands */ +/* bandstate array indices */ +#define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */ +#define BAND_5G_INDEX 1 /* wlc->bandstate[x] index */ + +#define BAND_2G_NAME "2.4G" +#define BAND_5G_NAME "5G" + +/* BMAC RPC: 7 u32 params: pkttotlen, fifo, commit, fid, txpktpend, pktflag, rpc_id */ +#define WLC_RPCTX_PARAMS 32 + +#endif /* _BRCM_PUB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/rate.c b/drivers/staging/brcm80211/brcmsmac/rate.c new file mode 100644 index 0000000..807c0f6 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/rate.c @@ -0,0 +1,496 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include + +#include +#include +#include +#include "dma.h" + +#include "types.h" +#include "d11.h" +#include "cfg.h" +#include "scb.h" +#include "pub.h" +#include "rate.h" + +/* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */ +const u8 rate_info[WLC_MAXRATE + 1] = { + /* 0 1 2 3 4 5 6 7 8 9 */ +/* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00, +/* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00, +/* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, +/* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, +/* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c +}; + +/* rates are in units of Kbps */ +const mcs_info_t mcs_table[MCS_TABLE_SIZE] = { + /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */ + {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00, + WLC_RATE_6M}, + /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */ + {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08, + WLC_RATE_12M}, + /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */ + {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A, + WLC_RATE_18M}, + /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */ + {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10, + WLC_RATE_24M}, + /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */ + {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12, + WLC_RATE_36M}, + /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */ + {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19, + WLC_RATE_48M}, + /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */ + {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A, + WLC_RATE_54M}, + /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */ + {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C, + WLC_RATE_54M}, + /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */ + {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40, + WLC_RATE_6M}, + /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */ + {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48, + WLC_RATE_12M}, + /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */ + {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A, + WLC_RATE_18M}, + /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */ + {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50, + WLC_RATE_24M}, + /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */ + {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52, + WLC_RATE_36M}, + /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */ + {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59, + WLC_RATE_48M}, + /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */ + {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A, + WLC_RATE_54M}, + /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */ + {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C, + WLC_RATE_54M}, + /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */ + {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80, + WLC_RATE_6M}, + /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */ + {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88, + WLC_RATE_12M}, + /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */ + {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A, + WLC_RATE_18M}, + /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */ + {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90, + WLC_RATE_24M}, + /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */ + {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92, + WLC_RATE_36M}, + /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */ + {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99, + WLC_RATE_48M}, + /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */ + {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A, + WLC_RATE_54M}, + /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */ + {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B, + WLC_RATE_54M}, + /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */ + {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0, + WLC_RATE_6M}, + /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */ + {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8, + WLC_RATE_12M}, + /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */ + {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA, + WLC_RATE_18M}, + /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */ + {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0, + WLC_RATE_24M}, + /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */ + {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2, + WLC_RATE_36M}, + /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */ + {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9, + WLC_RATE_48M}, + /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */ + {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA, + WLC_RATE_54M}, + /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */ + {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB, + WLC_RATE_54M}, + /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */ + {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, WLC_RATE_6M}, +}; + +/* phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams + * Number of spatial streams: always 1 + * other fields: refer to table 78 of section 17.3.2.2 of the original .11a standard + */ +typedef struct legacy_phycfg { + u32 rate_ofdm; /* ofdm mac rate */ + u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ +} legacy_phycfg_t; + +#define LEGACY_PHYCFG_TABLE_SIZE 12 /* Number of legacy_rate_cfg entries in the table */ + +/* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ +/* Eventually MIMOPHY would also be converted to this format */ +/* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ +static const legacy_phycfg_t legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = { + {WLC_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */ + {WLC_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */ + {WLC_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */ + {WLC_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */ + {WLC_RATE_6M, 0x00}, /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */ + {WLC_RATE_9M, 0x02}, /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */ + {WLC_RATE_12M, 0x08}, /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */ + {WLC_RATE_18M, 0x0A}, /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */ + {WLC_RATE_24M, 0x10}, /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */ + {WLC_RATE_36M, 0x12}, /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */ + {WLC_RATE_48M, 0x19}, /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */ + {WLC_RATE_54M, 0x1A}, /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */ +}; + +/* Hardware rates (also encodes default basic rates) */ + +const wlc_rateset_t cck_ofdm_mimo_rates = { + 12, + { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ + 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, + 0x6c}, + 0x00, + {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t ofdm_mimo_rates = { + 8, + { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ + 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, + 0x00, + {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +/* Default ratesets that include MCS32 for 40BW channels */ +const wlc_rateset_t cck_ofdm_40bw_mimo_rates = { + 12, + { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ + 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, + 0x6c}, + 0x00, + {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t ofdm_40bw_mimo_rates = { + 8, + { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ + 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, + 0x00, + {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t cck_ofdm_rates = { + 12, + { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ + 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, + 0x6c}, + 0x00, + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t gphy_legacy_rates = { + 4, + { /* 1b, 2b, 5.5b, 11b Mbps */ + 0x82, 0x84, 0x8b, 0x96}, + 0x00, + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t ofdm_rates = { + 8, + { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ + 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, + 0x00, + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +const wlc_rateset_t cck_rates = { + 4, + { /* 1b, 2b, 5.5, 11 Mbps */ + 0x82, 0x84, 0x0b, 0x16}, + 0x00, + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00} +}; + +static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate); + +/* check if rateset is valid. + * if check_brate is true, rateset without a basic rate is considered NOT valid. + */ +static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate) +{ + uint idx; + + if (!rs->count) + return false; + + if (!check_brate) + return true; + + /* error if no basic rates */ + for (idx = 0; idx < rs->count; idx++) { + if (rs->rates[idx] & WLC_RATE_FLAG) + return true; + } + return false; +} + +void wlc_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams) +{ + int i; + for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++) + rs->mcs[i] = 0; +} + +/* filter based on hardware rateset, and sort filtered rateset with basic bit(s) preserved, + * and check if resulting rateset is valid. +*/ +bool +wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, + const wlc_rateset_t *hw_rs, + bool check_brate, u8 txstreams) +{ + u8 rateset[WLC_MAXRATE + 1]; + u8 r; + uint count; + uint i; + + memset(rateset, 0, sizeof(rateset)); + count = rs->count; + + for (i = 0; i < count; i++) { + /* mask off "basic rate" bit, WLC_RATE_FLAG */ + r = (int)rs->rates[i] & WLC_RATE_MASK; + if ((r > WLC_MAXRATE) || (rate_info[r] == 0)) { + continue; + } + rateset[r] = rs->rates[i]; /* preserve basic bit! */ + } + + /* fill out the rates in order, looking at only supported rates */ + count = 0; + for (i = 0; i < hw_rs->count; i++) { + r = hw_rs->rates[i] & WLC_RATE_MASK; + if (rateset[r]) + rs->rates[count++] = rateset[r]; + } + + rs->count = count; + + /* only set the mcs rate bit if the equivalent hw mcs bit is set */ + for (i = 0; i < MCSSET_LEN; i++) + rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]); + + if (wlc_rateset_valid(rs, check_brate)) + return true; + else + return false; +} + +/* calculate the rate of a rx'd frame and return it as a ratespec */ +ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp) +{ + int phy_type; + ratespec_t rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT; + + phy_type = + ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT); + + if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) || + (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) { + switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) { + case PRXS0_CCK: + rspec = + CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); + break; + case PRXS0_OFDM: + rspec = + OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)-> + rlpt[0]); + break; + case PRXS0_PREN: + rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE; + if (plcp[0] & MIMO_PLCP_40MHZ) { + /* indicate rspec is for 40 MHz mode */ + rspec &= ~RSPEC_BW_MASK; + rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT); + } + break; + case PRXS0_STDN: + /* fallthru */ + default: + /* not supported, error condition */ + break; + } + if (PLCP3_ISSGI(plcp[3])) + rspec |= RSPEC_SHORT_GI; + } else + if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM)) + rspec = OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->rlpt[0]); + else + rspec = CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); + + return rspec; +} + +/* copy rateset src to dst as-is (no masking or sorting) */ +void wlc_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst) +{ + memcpy(dst, src, sizeof(wlc_rateset_t)); +} + +/* + * Copy and selectively filter one rateset to another. + * 'basic_only' means only copy basic rates. + * 'rates' indicates cck (11b) and ofdm rates combinations. + * - 0: cck and ofdm + * - 1: cck only + * - 2: ofdm only + * 'xmask' is the copy mask (typically 0x7f or 0xff). + */ +void +wlc_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only, + u8 rates, uint xmask, bool mcsallow) +{ + uint i; + uint r; + uint count; + + count = 0; + for (i = 0; i < src->count; i++) { + r = src->rates[i]; + if (basic_only && !(r & WLC_RATE_FLAG)) + continue; + if ((rates == WLC_RATES_CCK) && IS_OFDM((r & WLC_RATE_MASK))) + continue; + if ((rates == WLC_RATES_OFDM) && IS_CCK((r & WLC_RATE_MASK))) + continue; + dst->rates[count++] = r & xmask; + } + dst->count = count; + dst->htphy_membership = src->htphy_membership; + + if (mcsallow && rates != WLC_RATES_CCK) + memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN); + else + wlc_rateset_mcs_clear(dst); +} + +/* select rateset for a given phy_type and bandtype and filter it, sort it + * and fill rs_tgt with result + */ +void +wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, + uint phy_type, int bandtype, bool cck_only, uint rate_mask, + bool mcsallow, u8 bw, u8 txstreams) +{ + const wlc_rateset_t *rs_dflt; + wlc_rateset_t rs_sel; + if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) || + (PHYTYPE_IS(phy_type, PHY_TYPE_N)) || + (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) || + (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) { + if (BAND_5G(bandtype)) { + rs_dflt = (bw == WLC_20_MHZ ? + &ofdm_mimo_rates : &ofdm_40bw_mimo_rates); + } else { + rs_dflt = (bw == WLC_20_MHZ ? + &cck_ofdm_mimo_rates : + &cck_ofdm_40bw_mimo_rates); + } + } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) { + rs_dflt = (BAND_5G(bandtype)) ? &ofdm_rates : &cck_ofdm_rates; + } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) { + rs_dflt = &ofdm_rates; + } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) { + rs_dflt = &cck_ofdm_rates; + } else { + /* should not happen, error condition */ + rs_dflt = &cck_rates; /* force cck */ + } + + /* if hw rateset is not supplied, assign selected rateset to it */ + if (!rs_hw) + rs_hw = rs_dflt; + + wlc_rateset_copy(rs_dflt, &rs_sel); + wlc_rateset_mcs_upd(&rs_sel, txstreams); + wlc_rateset_filter(&rs_sel, rs_tgt, false, + cck_only ? WLC_RATES_CCK : WLC_RATES_CCK_OFDM, + rate_mask, mcsallow); + wlc_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false, + mcsallow ? txstreams : 1); +} + +s16 wlc_rate_legacy_phyctl(uint rate) +{ + uint i; + for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++) + if (rate == legacy_phycfg_table[i].rate_ofdm) + return legacy_phycfg_table[i].tx_phy_ctl3; + + return -1; +} + +void wlc_rateset_mcs_clear(wlc_rateset_t *rateset) +{ + uint i; + for (i = 0; i < MCSSET_LEN; i++) + rateset->mcs[i] = 0; +} + +void wlc_rateset_mcs_build(wlc_rateset_t *rateset, u8 txstreams) +{ + memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN); + wlc_rateset_mcs_upd(rateset, txstreams); +} + +/* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */ +void wlc_rateset_bw_mcs_filter(wlc_rateset_t *rateset, u8 bw) +{ + if (bw == WLC_40_MHZ) + setbit(rateset->mcs, 32); + else + clrbit(rateset->mcs, 32); +} diff --git a/drivers/staging/brcm80211/brcmsmac/rate.h b/drivers/staging/brcm80211/brcmsmac/rate.h new file mode 100644 index 0000000..5575e83 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/rate.h @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _WLC_RATE_H_ +#define _WLC_RATE_H_ + +extern const u8 rate_info[]; +extern const struct wlc_rateset cck_ofdm_mimo_rates; +extern const struct wlc_rateset ofdm_mimo_rates; +extern const struct wlc_rateset cck_ofdm_rates; +extern const struct wlc_rateset ofdm_rates; +extern const struct wlc_rateset cck_rates; +extern const struct wlc_rateset gphy_legacy_rates; +extern const struct wlc_rateset wlc_lrs_rates; +extern const struct wlc_rateset rate_limit_1_2; + +typedef struct mcs_info { + u32 phy_rate_20; /* phy rate in kbps [20Mhz] */ + u32 phy_rate_40; /* phy rate in kbps [40Mhz] */ + u32 phy_rate_20_sgi; /* phy rate in kbps [20Mhz] with SGI */ + u32 phy_rate_40_sgi; /* phy rate in kbps [40Mhz] with SGI */ + u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ + u8 leg_ofdm; /* matching legacy ofdm rate in 500bkps */ +} mcs_info_t; + +#define WLC_MAXMCS 32 /* max valid mcs index */ +#define MCS_TABLE_SIZE 33 /* Number of mcs entries in the table */ +extern const mcs_info_t mcs_table[]; + +#define MCS_INVALID 0xFF +#define MCS_CR_MASK 0x07 /* Code Rate bit mask */ +#define MCS_MOD_MASK 0x38 /* Modulation bit shift */ +#define MCS_MOD_SHIFT 3 /* MOdulation bit shift */ +#define MCS_TXS_MASK 0xc0 /* num tx streams - 1 bit mask */ +#define MCS_TXS_SHIFT 6 /* num tx streams - 1 bit shift */ +#define MCS_CR(_mcs) (mcs_table[_mcs].tx_phy_ctl3 & MCS_CR_MASK) +#define MCS_MOD(_mcs) ((mcs_table[_mcs].tx_phy_ctl3 & MCS_MOD_MASK) >> MCS_MOD_SHIFT) +#define MCS_TXS(_mcs) ((mcs_table[_mcs].tx_phy_ctl3 & MCS_TXS_MASK) >> MCS_TXS_SHIFT) +#define MCS_RATE(_mcs, _is40, _sgi) (_sgi ? \ + (_is40 ? mcs_table[_mcs].phy_rate_40_sgi : mcs_table[_mcs].phy_rate_20_sgi) : \ + (_is40 ? mcs_table[_mcs].phy_rate_40 : mcs_table[_mcs].phy_rate_20)) +#define VALID_MCS(_mcs) ((_mcs < MCS_TABLE_SIZE)) + +/* Macro to use the rate_info table */ +#define WLC_RATE_MASK_FULL 0xff /* Rate value mask with basic rate flag */ + +#define WLC_RATE_500K_TO_BPS(rate) ((rate) * 500000) /* convert 500kbps to bps */ + +/* rate spec : holds rate and mode specific information required to generate a tx frame. */ +/* Legacy CCK and OFDM information is held in the same manner as was done in the past */ +/* (in the lower byte) the upper 3 bytes primarily hold MIMO specific information */ +typedef u32 ratespec_t; + +/* rate spec bit fields */ +#define RSPEC_RATE_MASK 0x0000007F /* Either 500Kbps units or MIMO MCS idx */ +#define RSPEC_MIMORATE 0x08000000 /* mimo MCS is stored in RSPEC_RATE_MASK */ +#define RSPEC_BW_MASK 0x00000700 /* mimo bw mask */ +#define RSPEC_BW_SHIFT 8 /* mimo bw shift */ +#define RSPEC_STF_MASK 0x00003800 /* mimo Space/Time/Frequency mode mask */ +#define RSPEC_STF_SHIFT 11 /* mimo Space/Time/Frequency mode shift */ +#define RSPEC_CT_MASK 0x0000C000 /* mimo coding type mask */ +#define RSPEC_CT_SHIFT 14 /* mimo coding type shift */ +#define RSPEC_STC_MASK 0x00300000 /* mimo num STC streams per PLCP defn. */ +#define RSPEC_STC_SHIFT 20 /* mimo num STC streams per PLCP defn. */ +#define RSPEC_LDPC_CODING 0x00400000 /* mimo bit indicates adv coding in use */ +#define RSPEC_SHORT_GI 0x00800000 /* mimo bit indicates short GI in use */ +#define RSPEC_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define RSPEC_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicates override rate only */ + +#define WLC_HTPHY 127 /* HT PHY Membership */ + +#define RSPEC_ACTIVE(rspec) (rspec & (RSPEC_RATE_MASK | RSPEC_MIMORATE)) +#define RSPEC2RATE(rspec) ((rspec & RSPEC_MIMORATE) ? \ + MCS_RATE((rspec & RSPEC_RATE_MASK), RSPEC_IS40MHZ(rspec), RSPEC_ISSGI(rspec)) : \ + (rspec & RSPEC_RATE_MASK)) +/* return rate in unit of 500Kbps -- for internal use in wlc_rate_sel.c */ +#define RSPEC2RATE500K(rspec) ((rspec & RSPEC_MIMORATE) ? \ + MCS_RATE((rspec & RSPEC_RATE_MASK), state->is40bw, RSPEC_ISSGI(rspec))/500 : \ + (rspec & RSPEC_RATE_MASK)) +#define CRSPEC2RATE500K(rspec) ((rspec & RSPEC_MIMORATE) ? \ + MCS_RATE((rspec & RSPEC_RATE_MASK), RSPEC_IS40MHZ(rspec), RSPEC_ISSGI(rspec))/500 :\ + (rspec & RSPEC_RATE_MASK)) + +#define RSPEC2KBPS(rspec) (IS_MCS(rspec) ? RSPEC2RATE(rspec) : RSPEC2RATE(rspec)*500) +#define RSPEC_PHYTXBYTE2(rspec) ((rspec & 0xff00) >> 8) +#define RSPEC_GET_BW(rspec) ((rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT) +#define RSPEC_IS40MHZ(rspec) ((((rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT) == \ + PHY_TXC1_BW_40MHZ) || (((rspec & RSPEC_BW_MASK) >> \ + RSPEC_BW_SHIFT) == PHY_TXC1_BW_40MHZ_DUP)) +#define RSPEC_ISSGI(rspec) ((rspec & RSPEC_SHORT_GI) == RSPEC_SHORT_GI) +#define RSPEC_MIMOPLCP3(rspec) ((rspec & 0xf00000) >> 16) +#define PLCP3_ISSGI(plcp) (plcp & (RSPEC_SHORT_GI >> 16)) +#define RSPEC_STC(rspec) ((rspec & RSPEC_STC_MASK) >> RSPEC_STC_SHIFT) +#define RSPEC_STF(rspec) ((rspec & RSPEC_STF_MASK) >> RSPEC_STF_SHIFT) +#define PLCP3_ISSTBC(plcp) ((plcp & (RSPEC_STC_MASK) >> 16) == 0x10) +#define PLCP3_STC_MASK 0x30 +#define PLCP3_STC_SHIFT 4 + +/* Rate info table; takes a legacy rate or ratespec_t */ +#define IS_MCS(r) (r & RSPEC_MIMORATE) +#define IS_OFDM(r) (!IS_MCS(r) && (rate_info[(r) & RSPEC_RATE_MASK] & WLC_RATE_FLAG)) +#define IS_CCK(r) (!IS_MCS(r) && ( \ + ((r) & WLC_RATE_MASK) == WLC_RATE_1M || \ + ((r) & WLC_RATE_MASK) == WLC_RATE_2M || \ + ((r) & WLC_RATE_MASK) == WLC_RATE_5M5 || \ + ((r) & WLC_RATE_MASK) == WLC_RATE_11M)) +#define IS_SINGLE_STREAM(mcs) (((mcs) <= HIGHEST_SINGLE_STREAM_MCS) || ((mcs) == 32)) +#define CCK_RSPEC(cck) ((cck) & RSPEC_RATE_MASK) +#define OFDM_RSPEC(ofdm) (((ofdm) & RSPEC_RATE_MASK) |\ + (PHY_TXC1_MODE_CDD << RSPEC_STF_SHIFT)) +#define LEGACY_RSPEC(rate) (IS_CCK(rate) ? CCK_RSPEC(rate) : OFDM_RSPEC(rate)) + +#define MCS_RSPEC(mcs) (((mcs) & RSPEC_RATE_MASK) | RSPEC_MIMORATE | \ + (IS_SINGLE_STREAM(mcs) ? (PHY_TXC1_MODE_CDD << RSPEC_STF_SHIFT) : \ + (PHY_TXC1_MODE_SDM << RSPEC_STF_SHIFT))) + +/* Convert encoded rate value in plcp header to numerical rates in 500 KHz increments */ +extern const u8 ofdm_rate_lookup[]; +#define OFDM_PHY2MAC_RATE(rlpt) (ofdm_rate_lookup[rlpt & 0x7]) +#define CCK_PHY2MAC_RATE(signal) (signal/5) + +/* Rates specified in wlc_rateset_filter() */ +#define WLC_RATES_CCK_OFDM 0 +#define WLC_RATES_CCK 1 +#define WLC_RATES_OFDM 2 + +/* use the stuct form instead of typedef to fix dependency problems */ +struct wlc_rateset; + +/* sanitize, and sort a rateset with the basic bit(s) preserved, validate rateset */ +extern bool wlc_rate_hwrs_filter_sort_validate(struct wlc_rateset *rs, + const struct wlc_rateset *hw_rs, + bool check_brate, + u8 txstreams); +/* copy rateset src to dst as-is (no masking or sorting) */ +extern void wlc_rateset_copy(const struct wlc_rateset *src, + struct wlc_rateset *dst); + +/* would be nice to have these documented ... */ +extern ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp); + +extern void wlc_rateset_filter(struct wlc_rateset *src, struct wlc_rateset *dst, + bool basic_only, u8 rates, uint xmask, + bool mcsallow); +extern void wlc_rateset_default(struct wlc_rateset *rs_tgt, + const struct wlc_rateset *rs_hw, uint phy_type, + int bandtype, bool cck_only, uint rate_mask, + bool mcsallow, u8 bw, u8 txstreams); +extern s16 wlc_rate_legacy_phyctl(uint rate); + +extern void wlc_rateset_mcs_upd(struct wlc_rateset *rs, u8 txstreams); +extern void wlc_rateset_mcs_clear(struct wlc_rateset *rateset); +extern void wlc_rateset_mcs_build(struct wlc_rateset *rateset, u8 txstreams); +extern void wlc_rateset_bw_mcs_filter(struct wlc_rateset *rateset, u8 bw); + +#endif /* _WLC_RATE_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/scb.h b/drivers/staging/brcm80211/brcmsmac/scb.h new file mode 100644 index 0000000..dcad9d0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/scb.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SCB_H_ +#define _BRCM_SCB_H_ + +#include /* for ETH_ALEN */ + +#define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ +/* structure to store per-tid state for the ampdu initiator */ +typedef struct scb_ampdu_tid_ini { + u32 magic; + u8 tx_in_transit; /* number of pending mpdus in transit in driver */ + u8 tid; /* initiator tid for easy lookup */ + u8 txretry[AMPDU_TX_BA_MAX_WSIZE]; /* tx retry count; indexed by seq modulo */ + struct scb *scb; /* backptr for easy lookup */ +} scb_ampdu_tid_ini_t; + +#define AMPDU_MAX_SCB_TID NUMPRIO + +typedef struct scb_ampdu { + struct scb *scb; /* back pointer for easy reference */ + u8 mpdu_density; /* mpdu density */ + u8 max_pdu; /* max pdus allowed in ampdu */ + u8 release; /* # of mpdus released at a time */ + u16 min_len; /* min mpdu len to support the density */ + u32 max_rxlen; /* max ampdu rcv length; 8k, 16k, 32k, 64k */ + struct pktq txq; /* sdu transmit queue pending aggregation */ + + /* This could easily be a ini[] pointer and we keep this info in wl itself instead + * of having mac80211 hold it for us. Also could be made dynamic per tid instead of + * static. + */ + scb_ampdu_tid_ini_t ini[AMPDU_MAX_SCB_TID]; /* initiator info - per tid (NUMPRIO) */ +} scb_ampdu_t; + +#define SCB_MAGIC 0xbeefcafe +#define INI_MAGIC 0xabcd1234 + +/* station control block - one per remote MAC address */ +struct scb { + u32 magic; + u32 flags; /* various bit flags as defined below */ + u32 flags2; /* various bit flags2 as defined below */ + u8 state; /* current state bitfield of auth/assoc process */ + u8 ea[ETH_ALEN]; /* station address */ + void *fragbuf[NUMPRIO]; /* defragmentation buffer per prio */ + uint fragresid[NUMPRIO]; /* #bytes unused in frag buffer per prio */ + + u16 seqctl[NUMPRIO]; /* seqctl of last received frame (for dups) */ + u16 seqctl_nonqos; /* seqctl of last received frame (for dups) for + * non-QoS data and management + */ + u16 seqnum[NUMPRIO]; /* WME: driver maintained sw seqnum per priority */ + + scb_ampdu_t scb_ampdu; /* AMPDU state including per tid info */ +}; + +/* scb flags */ +#define SCB_WMECAP 0x0040 /* may ONLY be set if WME_ENAB(wlc) */ +#define SCB_HTCAP 0x10000 /* HT (MIMO) capable device */ +#define SCB_IS40 0x80000 /* 40MHz capable */ +#define SCB_STBCCAP 0x40000000 /* STBC Capable */ +#define SCB_WME(a) ((a)->flags & SCB_WMECAP)/* implies WME_ENAB */ +#define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)]) +#define SCB_PS(a) NULL +#define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP) +#define SCB_AMPDU(a) true +#endif /* _BRCM_SCB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/srom.c b/drivers/staging/brcm80211/brcmsmac/srom.c new file mode 100644 index 0000000..5a7b434 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/srom.c @@ -0,0 +1,1332 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#include +#include +#include +#include +#include +#include +#include +#include "types.h" +#include +#include +#include +#include +#include +#include +#include +#include "otp.h" + +#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ + (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \ + ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \ + ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET)) + +#if defined(BCMDBG) +#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */ +#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ +#endif + +/* Maximum srom: 6 Kilobits == 768 bytes */ +#define SROM_MAX 768 + +/* PCI fields */ +#define PCI_F0DEVID 48 + +#define SROM_WORDS 64 + +#define SROM_SSID 2 + +#define SROM_WL1LHMAXP 29 + +#define SROM_WL1LPAB0 30 +#define SROM_WL1LPAB1 31 +#define SROM_WL1LPAB2 32 + +#define SROM_WL1HPAB0 33 +#define SROM_WL1HPAB1 34 +#define SROM_WL1HPAB2 35 + +#define SROM_MACHI_IL0 36 +#define SROM_MACMID_IL0 37 +#define SROM_MACLO_IL0 38 +#define SROM_MACHI_ET1 42 +#define SROM_MACMID_ET1 43 +#define SROM_MACLO_ET1 44 +#define SROM3_MACHI 37 +#define SROM3_MACMID 38 +#define SROM3_MACLO 39 + +#define SROM_BXARSSI2G 40 +#define SROM_BXARSSI5G 41 + +#define SROM_TRI52G 42 +#define SROM_TRI5GHL 43 + +#define SROM_RXPO52G 45 + +#define SROM_AABREV 46 +/* Fields in AABREV */ +#define SROM_BR_MASK 0x00ff +#define SROM_CC_MASK 0x0f00 +#define SROM_CC_SHIFT 8 +#define SROM_AA0_MASK 0x3000 +#define SROM_AA0_SHIFT 12 +#define SROM_AA1_MASK 0xc000 +#define SROM_AA1_SHIFT 14 + +#define SROM_WL0PAB0 47 +#define SROM_WL0PAB1 48 +#define SROM_WL0PAB2 49 + +#define SROM_LEDBH10 50 +#define SROM_LEDBH32 51 + +#define SROM_WL10MAXP 52 + +#define SROM_WL1PAB0 53 +#define SROM_WL1PAB1 54 +#define SROM_WL1PAB2 55 + +#define SROM_ITT 56 + +#define SROM_BFL 57 +#define SROM_BFL2 28 +#define SROM3_BFL2 61 + +#define SROM_AG10 58 + +#define SROM_CCODE 59 + +#define SROM_OPO 60 + +#define SROM3_LEDDC 62 + +#define SROM_CRCREV 63 + +/* SROM Rev 4: Reallocate the software part of the srom to accommodate + * MIMO features. It assumes up to two PCIE functions and 440 bytes + * of usable srom i.e. the usable storage in chips with OTP that + * implements hardware redundancy. + */ + +#define SROM4_WORDS 220 + +#define SROM4_SIGN 32 +#define SROM4_SIGNATURE 0x5372 + +#define SROM4_BREV 33 + +#define SROM4_BFL0 34 +#define SROM4_BFL1 35 +#define SROM4_BFL2 36 +#define SROM4_BFL3 37 +#define SROM5_BFL0 37 +#define SROM5_BFL1 38 +#define SROM5_BFL2 39 +#define SROM5_BFL3 40 + +#define SROM4_MACHI 38 +#define SROM4_MACMID 39 +#define SROM4_MACLO 40 +#define SROM5_MACHI 41 +#define SROM5_MACMID 42 +#define SROM5_MACLO 43 + +#define SROM4_CCODE 41 +#define SROM4_REGREV 42 +#define SROM5_CCODE 34 +#define SROM5_REGREV 35 + +#define SROM4_LEDBH10 43 +#define SROM4_LEDBH32 44 +#define SROM5_LEDBH10 59 +#define SROM5_LEDBH32 60 + +#define SROM4_LEDDC 45 +#define SROM5_LEDDC 45 + +#define SROM4_AA 46 + +#define SROM4_AG10 47 +#define SROM4_AG32 48 + +#define SROM4_TXPID2G 49 +#define SROM4_TXPID5G 51 +#define SROM4_TXPID5GL 53 +#define SROM4_TXPID5GH 55 + +#define SROM4_TXRXC 61 +#define SROM4_TXCHAIN_MASK 0x000f +#define SROM4_TXCHAIN_SHIFT 0 +#define SROM4_RXCHAIN_MASK 0x00f0 +#define SROM4_RXCHAIN_SHIFT 4 +#define SROM4_SWITCH_MASK 0xff00 +#define SROM4_SWITCH_SHIFT 8 + +/* Per-path fields */ +#define MAX_PATH_SROM 4 +#define SROM4_PATH0 64 +#define SROM4_PATH1 87 +#define SROM4_PATH2 110 +#define SROM4_PATH3 133 + +#define SROM4_2G_ITT_MAXP 0 +#define SROM4_2G_PA 1 +#define SROM4_5G_ITT_MAXP 5 +#define SROM4_5GLH_MAXP 6 +#define SROM4_5G_PA 7 +#define SROM4_5GL_PA 11 +#define SROM4_5GH_PA 15 + +/* All the miriad power offsets */ +#define SROM4_2G_CCKPO 156 +#define SROM4_2G_OFDMPO 157 +#define SROM4_5G_OFDMPO 159 +#define SROM4_5GL_OFDMPO 161 +#define SROM4_5GH_OFDMPO 163 +#define SROM4_2G_MCSPO 165 +#define SROM4_5G_MCSPO 173 +#define SROM4_5GL_MCSPO 181 +#define SROM4_5GH_MCSPO 189 +#define SROM4_CDDPO 197 +#define SROM4_STBCPO 198 +#define SROM4_BW40PO 199 +#define SROM4_BWDUPPO 200 + +#define SROM4_CRCREV 219 + +/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. + * This is acombined srom for both MIMO and SISO boards, usable in + * the .130 4Kilobit OTP with hardware redundancy. + */ +#define SROM8_BREV 65 + +#define SROM8_BFL0 66 +#define SROM8_BFL1 67 +#define SROM8_BFL2 68 +#define SROM8_BFL3 69 + +#define SROM8_MACHI 70 +#define SROM8_MACMID 71 +#define SROM8_MACLO 72 + +#define SROM8_CCODE 73 +#define SROM8_REGREV 74 + +#define SROM8_LEDBH10 75 +#define SROM8_LEDBH32 76 + +#define SROM8_LEDDC 77 + +#define SROM8_AA 78 + +#define SROM8_AG10 79 +#define SROM8_AG32 80 + +#define SROM8_TXRXC 81 + +#define SROM8_BXARSSI2G 82 +#define SROM8_BXARSSI5G 83 +#define SROM8_TRI52G 84 +#define SROM8_TRI5GHL 85 +#define SROM8_RXPO52G 86 + +#define SROM8_FEM2G 87 +#define SROM8_FEM5G 88 +#define SROM8_FEM_ANTSWLUT_MASK 0xf800 +#define SROM8_FEM_ANTSWLUT_SHIFT 11 +#define SROM8_FEM_TR_ISO_MASK 0x0700 +#define SROM8_FEM_TR_ISO_SHIFT 8 +#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 +#define SROM8_FEM_PDET_RANGE_SHIFT 3 +#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 +#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 +#define SROM8_FEM_TSSIPOS_MASK 0x0001 +#define SROM8_FEM_TSSIPOS_SHIFT 0 + +#define SROM8_THERMAL 89 + +/* Temp sense related entries */ +#define SROM8_MPWR_RAWTS 90 +#define SROM8_TS_SLP_OPT_CORRX 91 +/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ +#define SROM8_FOC_HWIQ_IQSWP 92 + +/* Temperature delta for PHY calibration */ +#define SROM8_PHYCAL_TEMPDELTA 93 + +/* Per-path offsets & fields */ +#define SROM8_PATH0 96 +#define SROM8_PATH1 112 +#define SROM8_PATH2 128 +#define SROM8_PATH3 144 + +#define SROM8_2G_ITT_MAXP 0 +#define SROM8_2G_PA 1 +#define SROM8_5G_ITT_MAXP 4 +#define SROM8_5GLH_MAXP 5 +#define SROM8_5G_PA 6 +#define SROM8_5GL_PA 9 +#define SROM8_5GH_PA 12 + +/* All the miriad power offsets */ +#define SROM8_2G_CCKPO 160 + +#define SROM8_2G_OFDMPO 161 +#define SROM8_5G_OFDMPO 163 +#define SROM8_5GL_OFDMPO 165 +#define SROM8_5GH_OFDMPO 167 + +#define SROM8_2G_MCSPO 169 +#define SROM8_5G_MCSPO 177 +#define SROM8_5GL_MCSPO 185 +#define SROM8_5GH_MCSPO 193 + +#define SROM8_CDDPO 201 +#define SROM8_STBCPO 202 +#define SROM8_BW40PO 203 +#define SROM8_BWDUPPO 204 + +/* SISO PA parameters are in the path0 spaces */ +#define SROM8_SISO 96 + +/* Legacy names for SISO PA paramters */ +#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) +#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) +#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) +#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) +#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) +#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) +#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) +#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) +#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) +#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) +#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) +#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) +#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) +#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) +#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) + +/* SROM REV 9 */ +#define SROM9_2GPO_CCKBW20 160 +#define SROM9_2GPO_CCKBW20UL 161 +#define SROM9_2GPO_LOFDMBW20 162 +#define SROM9_2GPO_LOFDMBW20UL 164 + +#define SROM9_5GLPO_LOFDMBW20 166 +#define SROM9_5GLPO_LOFDMBW20UL 168 +#define SROM9_5GMPO_LOFDMBW20 170 +#define SROM9_5GMPO_LOFDMBW20UL 172 +#define SROM9_5GHPO_LOFDMBW20 174 +#define SROM9_5GHPO_LOFDMBW20UL 176 + +#define SROM9_2GPO_MCSBW20 178 +#define SROM9_2GPO_MCSBW20UL 180 +#define SROM9_2GPO_MCSBW40 182 + +#define SROM9_5GLPO_MCSBW20 184 +#define SROM9_5GLPO_MCSBW20UL 186 +#define SROM9_5GLPO_MCSBW40 188 +#define SROM9_5GMPO_MCSBW20 190 +#define SROM9_5GMPO_MCSBW20UL 192 +#define SROM9_5GMPO_MCSBW40 194 +#define SROM9_5GHPO_MCSBW20 196 +#define SROM9_5GHPO_MCSBW20UL 198 +#define SROM9_5GHPO_MCSBW40 200 + +#define SROM9_PO_MCS32 202 +#define SROM9_PO_LOFDM40DUP 203 + +/* SROM flags (see sromvar_t) */ +#define SRFL_MORE 1 /* value continues as described by the next entry */ +#define SRFL_NOFFS 2 /* value bits can't be all one's */ +#define SRFL_PRHEX 4 /* value is in hexdecimal format */ +#define SRFL_PRSIGN 8 /* value is in signed decimal format */ +#define SRFL_CCODE 0x10 /* value is in country code format */ +#define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ +#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ +#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ + +/* Max. nvram variable table size */ +#define MAXSZ_NVRAM_VARS 4096 + +typedef struct { + const char *name; + u32 revmask; + u32 flags; + u16 off; + u16 mask; +} sromvar_t; + +typedef struct varbuf { + char *base; /* pointer to buffer base */ + char *buf; /* pointer to current position */ + unsigned int size; /* current (residual) size in bytes */ +} varbuf_t; + +/* Assumptions: + * - Ethernet address spans across 3 consective words + * + * Table rules: + * - Add multiple entries next to each other if a value spans across multiple words + * (even multiple fields in the same word) with each entry except the last having + * it's SRFL_MORE bit set. + * - Ethernet address entry does not follow above rule and must not have SRFL_MORE + * bit set. Its SRFL_ETHADDR bit implies it takes multiple words. + * - The last entry's name field must be NULL to indicate the end of the table. Other + * entries must have non-NULL name. + */ +static const sromvar_t pci_sromvars[] = { + {"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff}, + {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, + {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, + {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, + {"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff}, + {"boardflags", 0x00000004, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM_BFL2, 0xffff}, + {"boardflags", 0x00000008, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM3_BFL2, 0xffff}, + {"boardflags", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL0, 0xffff}, + {"", 0, 0, SROM4_BFL1, 0xffff}, + {"boardflags", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL0, 0xffff}, + {"", 0, 0, SROM5_BFL1, 0xffff}, + {"boardflags", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 0xffff}, + {"", 0, 0, SROM8_BFL1, 0xffff}, + {"boardflags2", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL2, 0xffff}, + {"", 0, 0, SROM4_BFL3, 0xffff}, + {"boardflags2", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL2, 0xffff}, + {"", 0, 0, SROM5_BFL3, 0xffff}, + {"boardflags2", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 0xffff}, + {"", 0, 0, SROM8_BFL3, 0xffff}, + {"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, + {"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff}, + {"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff}, + {"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff}, + {"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff}, + {"boardnum", 0xffffff00, 0, SROM8_MACLO, 0xffff}, + {"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK}, + {"regrev", 0x00000008, 0, SROM_OPO, 0xff00}, + {"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff}, + {"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff}, + {"regrev", 0xffffff00, 0, SROM8_REGREV, 0x00ff}, + {"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff}, + {"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00}, + {"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff}, + {"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00}, + {"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff}, + {"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00}, + {"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff}, + {"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00}, + {"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff}, + {"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00}, + {"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff}, + {"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00}, + {"ledbh0", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, + {"ledbh1", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, + {"ledbh2", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, + {"ledbh3", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, + {"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff}, + {"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff}, + {"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff}, + {"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff}, + {"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff}, + {"pa0b0", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, + {"pa0b1", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, + {"pa0b2", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, + {"pa0itssit", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00}, + {"pa0maxpwr", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff}, + {"opo", 0x0000000c, 0, SROM_OPO, 0x00ff}, + {"opo", 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff}, + {"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK}, + {"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff}, + {"aa2g", 0xffffff00, 0, SROM8_AA, 0x00ff}, + {"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK}, + {"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00}, + {"aa5g", 0xffffff00, 0, SROM8_AA, 0xff00}, + {"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff}, + {"ag1", 0x0000000e, 0, SROM_AG10, 0xff00}, + {"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff}, + {"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00}, + {"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff}, + {"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00}, + {"ag0", 0xffffff00, 0, SROM8_AG10, 0x00ff}, + {"ag1", 0xffffff00, 0, SROM8_AG10, 0xff00}, + {"ag2", 0xffffff00, 0, SROM8_AG32, 0x00ff}, + {"ag3", 0xffffff00, 0, SROM8_AG32, 0xff00}, + {"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff}, + {"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff}, + {"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff}, + {"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff}, + {"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff}, + {"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff}, + {"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff}, + {"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff}, + {"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff}, + {"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00}, + {"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00}, + {"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00}, + {"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff}, + {"pa1b0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, + {"pa1b1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, + {"pa1b2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, + {"pa1lob0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, + {"pa1lob1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, + {"pa1lob2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, + {"pa1hib0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, + {"pa1hib1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, + {"pa1hib2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, + {"pa1itssit", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00}, + {"pa1maxpwr", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff}, + {"pa1lomaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00}, + {"pa1himaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, + {"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800}, + {"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700}, + {"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f}, + {"bxa2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800}, + {"rssisav2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700}, + {"rssismc2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f}, + {"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800}, + {"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700}, + {"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f}, + {"bxa5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800}, + {"rssisav5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700}, + {"rssismc5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f}, + {"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff}, + {"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00}, + {"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff}, + {"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00}, + {"tri2g", 0xffffff00, 0, SROM8_TRI52G, 0x00ff}, + {"tri5g", 0xffffff00, 0, SROM8_TRI52G, 0xff00}, + {"tri5gl", 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff}, + {"tri5gh", 0xffffff00, 0, SROM8_TRI5GHL, 0xff00}, + {"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff}, + {"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00}, + {"rxpo2g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, + {"rxpo5g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, + {"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK}, + {"txchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK}, + {"tssipos2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK}, + {"tssipos5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK}, + {"tempthresh", 0xffffff00, 0, SROM8_THERMAL, 0xff00}, + {"tempoffset", 0xffffff00, 0, SROM8_THERMAL, 0x00ff}, + {"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff}, + {"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00}, + {"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff}, + {"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00}, + {"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff}, + {"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00}, + {"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff}, + {"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00}, + {"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff}, + {"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00}, + {"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff}, + {"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00}, + {"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff}, + {"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00}, + {"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff}, + {"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00}, + + {"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff}, + {"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff}, + {"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff}, + {"ccode", 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff}, + {"macaddr", 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, + {"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff}, + {"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff}, + {"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff}, + {"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff}, + {"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff}, + {"leddc", 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 0xffff}, + {"leddc", 0x000000e0, SRFL_NOFFS | SRFL_LEDDC, SROM5_LEDDC, 0xffff}, + {"leddc", 0x00000010, SRFL_NOFFS | SRFL_LEDDC, SROM4_LEDDC, 0xffff}, + {"leddc", 0x00000008, SRFL_NOFFS | SRFL_LEDDC, SROM3_LEDDC, 0xffff}, + {"rawtempsense", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff}, + {"measpower", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00}, + {"tempsense_slope", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, + 0x00ff}, + {"tempcorrx", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00}, + {"tempsense_option", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, + 0x0300}, + {"freqoffset_corr", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, + 0x000f}, + {"iqcal_swp_dis", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010}, + {"hw_iqcal_en", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020}, + {"phycal_tempdelta", 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff}, + + {"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff}, + {"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, + {"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff}, + {"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, + {"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff}, + {"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, + {"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff}, + {"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff}, + {"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff}, + {"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff}, + {"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff}, + {"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff}, + {"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff}, + {"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, + + /* power per rate from sromrev 9 */ + {"cckbw202gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff}, + {"cckbw20ul2gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, + {"legofdmbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, + {"mcsbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw402gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20UL, + 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, + {"mcs32po", 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff}, + {"legofdm40duppo", 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff}, + + {NULL, 0, 0, 0, 0} +}; + +static const sromvar_t perpath_pci_sromvars[] = { + {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff}, + {"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff}, + {"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff}, + {"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff}, + {"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff}, + {"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff}, + {"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff}, + {"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff}, + {"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff}, + {"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff}, + {"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff}, + {"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff}, + {"maxp2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, + {"pa2gw1a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, + {"maxp5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, + {"pa5gw1a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, + {"pa5glw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, + {"pa5glw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff}, + {"pa5ghw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, + {"pa5ghw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff}, + {NULL, 0, 0, 0, 0} +}; + +static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count); +static int sprom_read_pci(struct si_pub *sih, u16 *sprom, + uint wordoff, u16 *buf, uint nwords, bool check_crc); +#if defined(BCMNVRAMR) +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz); +#endif +static u16 srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, + uint wordoff, u16 data); + +static int initvars_table(char *start, char *end, + char **vars, uint *count); + +/* Initialization of varbuf structure */ +static void varbuf_init(varbuf_t *b, char *buf, uint size) +{ + b->size = size; + b->base = b->buf = buf; +} + +/* append a null terminated var=value string */ +static int varbuf_append(varbuf_t *b, const char *fmt, ...) +{ + va_list ap; + int r; + size_t len; + char *s; + + if (b->size < 2) + return 0; + + va_start(ap, fmt); + r = vsnprintf(b->buf, b->size, fmt, ap); + va_end(ap); + + /* C99 snprintf behavior returns r >= size on overflow, + * others return -1 on overflow. + * All return -1 on format error. + * We need to leave room for 2 null terminations, one for the current var + * string, and one for final null of the var table. So check that the + * strlen written, r, leaves room for 2 chars. + */ + if ((r == -1) || (r > (int)(b->size - 2))) { + b->size = 0; + return 0; + } + + /* Remove any earlier occurrence of the same variable */ + s = strchr(b->buf, '='); + if (s != NULL) { + len = (size_t) (s - b->buf); + for (s = b->base; s < b->buf;) { + if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') { + len = strlen(s) + 1; + memmove(s, (s + len), + ((b->buf + r + 1) - (s + len))); + b->buf -= len; + b->size += (unsigned int)len; + break; + } + + while (*s++) + ; + } + } + + /* skip over this string's null termination */ + r++; + b->size -= r; + b->buf += r; + + return r; +} + +/* + * Initialize local vars from the right source for this platform. + * Return 0 on success, nonzero on error. + */ +int srom_var_init(struct si_pub *sih, uint bustype, void *curmap, + char **vars, uint *count) +{ + uint len; + + len = 0; + + if (vars == NULL || count == NULL) + return 0; + + *vars = NULL; + *count = 0; + + if (curmap != NULL && bustype == PCI_BUS) + return initvars_srom_pci(sih, curmap, vars, count); + + return -1; +} + +/* In chips with chipcommon rev 32 and later, the srom is in chipcommon, + * not in the bus cores. + */ +static u16 +srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd, + uint wordoff, u16 data) +{ + chipcregs_t *cc = (chipcregs_t *) ccregs; + uint wait_cnt = 1000; + + if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) { + W_REG(&cc->sromaddress, wordoff * 2); + if (cmd == SRC_OP_WRITE) + W_REG(&cc->sromdata, data); + } + + W_REG(&cc->sromcontrol, SRC_START | cmd); + + while (wait_cnt--) { + if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0) + break; + } + + if (!wait_cnt) { + return 0xffff; + } + if (cmd == SRC_OP_READ) + return (u16) R_REG(&cc->sromdata); + else + return 0xffff; +} + +static inline void ltoh16_buf(u16 *buf, unsigned int size) +{ + for (size /= 2; size; size--) + *(buf + size) = le16_to_cpu(*(buf + size)); +} + +static inline void htol16_buf(u16 *buf, unsigned int size) +{ + for (size /= 2; size; size--) + *(buf + size) = cpu_to_le16(*(buf + size)); +} + +/* + * Read in and validate sprom. + * Return 0 on success, nonzero on error. + */ +static int +sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, + u16 *buf, uint nwords, bool check_crc) +{ + int err = 0; + uint i; + void *ccregs = NULL; + + /* read the sprom */ + for (i = 0; i < nwords; i++) { + + if (sih->ccrev > 31 && ISSIM_ENAB(sih)) { + /* use indirect since direct is too slow on QT */ + if ((sih->cccaps & CC_CAP_SROM) == 0) + return 1; + + ccregs = (void *)((u8 *) sprom - CC_SROM_OTP); + buf[i] = + srom_cc_cmd(sih, ccregs, SRC_OP_READ, + wordoff + i, 0); + + } else { + if (ISSIM_ENAB(sih)) + buf[i] = R_REG(&sprom[wordoff + i]); + + buf[i] = R_REG(&sprom[wordoff + i]); + } + + } + + /* bypass crc checking for simulation to allow srom hack */ + if (ISSIM_ENAB(sih)) + return err; + + if (check_crc) { + + if (buf[0] == 0xffff) { + /* The hardware thinks that an srom that starts with 0xffff + * is blank, regardless of the rest of the content, so declare + * it bad. + */ + return 1; + } + + /* fixup the endianness so crc8 will pass */ + htol16_buf(buf, nwords * 2); + if (brcmu_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != + CRC8_GOOD_VALUE) { + /* DBG only pci always read srom4 first, then srom8/9 */ + err = 1; + } + /* now correct the endianness of the byte array */ + ltoh16_buf(buf, nwords * 2); + } + return err; +} + +#if defined(BCMNVRAMR) +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz) +{ + u8 *otp; + uint sz = OTP_SZ_MAX / 2; /* size in words */ + int err = 0; + + otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC); + if (otp == NULL) { + return -EBADE; + } + + err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz); + + memcpy(buf, otp, bufsz); + + kfree(otp); + + /* Check CRC */ + if (buf[0] == 0xffff) { + /* The hardware thinks that an srom that starts with 0xffff + * is blank, regardless of the rest of the content, so declare + * it bad. + */ + return 1; + } + + /* fixup the endianness so crc8 will pass */ + htol16_buf(buf, bufsz); + if (brcmu_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != + CRC8_GOOD_VALUE) { + err = 1; + } + /* now correct the endianness of the byte array */ + ltoh16_buf(buf, bufsz); + + return err; +} +#endif /* defined(BCMNVRAMR) */ +/* +* Create variable table from memory. +* Return 0 on success, nonzero on error. +*/ +static int initvars_table(char *start, char *end, + char **vars, uint *count) +{ + int c = (int)(end - start); + + /* do it only when there is more than just the null string */ + if (c > 1) { + char *vp = kmalloc(c, GFP_ATOMIC); + if (!vp) + return -ENOMEM; + memcpy(vp, start, c); + *vars = vp; + *count = c; + } else { + *vars = NULL; + *count = 0; + } + + return 0; +} + +/* Parse SROM and create name=value pairs. 'srom' points to + * the SROM word array. 'off' specifies the offset of the + * first word 'srom' points to, which should be either 0 or + * SROM3_SWRG_OFF (full SROM or software region). + */ + +static uint mask_shift(u16 mask) +{ + uint i; + for (i = 0; i < (sizeof(mask) << 3); i++) { + if (mask & (1 << i)) + return i; + } + return 0; +} + +static uint mask_width(u16 mask) +{ + int i; + for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) { + if (mask & (1 << i)) + return (uint) (i - mask_shift(mask) + 1); + } + return 0; +} + +static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b) +{ + u16 w; + u32 val; + const sromvar_t *srv; + uint width; + uint flags; + u32 sr = (1 << sromrev); + + varbuf_append(b, "sromrev=%d", sromrev); + + for (srv = pci_sromvars; srv->name != NULL; srv++) { + const char *name; + + if ((srv->revmask & sr) == 0) + continue; + + if (srv->off < off) + continue; + + flags = srv->flags; + name = srv->name; + + /* This entry is for mfgc only. Don't generate param for it, */ + if (flags & SRFL_NOVAR) + continue; + + if (flags & SRFL_ETHADDR) { + u8 ea[ETH_ALEN]; + + ea[0] = (srom[srv->off - off] >> 8) & 0xff; + ea[1] = srom[srv->off - off] & 0xff; + ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff; + ea[3] = srom[srv->off + 1 - off] & 0xff; + ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff; + ea[5] = srom[srv->off + 2 - off] & 0xff; + + varbuf_append(b, "%s=%pM", name, ea); + } else { + w = srom[srv->off - off]; + val = (w & srv->mask) >> mask_shift(srv->mask); + width = mask_width(srv->mask); + + while (srv->flags & SRFL_MORE) { + srv++; + if (srv->off == 0 || srv->off < off) + continue; + + w = srom[srv->off - off]; + val += + ((w & srv->mask) >> mask_shift(srv-> + mask)) << + width; + width += mask_width(srv->mask); + } + + if ((flags & SRFL_NOFFS) + && ((int)val == (1 << width) - 1)) + continue; + + if (flags & SRFL_CCODE) { + if (val == 0) + varbuf_append(b, "ccode="); + else + varbuf_append(b, "ccode=%c%c", + (val >> 8), (val & 0xff)); + } + /* LED Powersave duty cycle has to be scaled: + *(oncount >> 24) (offcount >> 8) + */ + else if (flags & SRFL_LEDDC) { + u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */ + (((val & 0xff)) << 8); /* offcount */ + varbuf_append(b, "leddc=%d", w32); + } else if (flags & SRFL_PRHEX) + varbuf_append(b, "%s=0x%x", name, val); + else if ((flags & SRFL_PRSIGN) + && (val & (1 << (width - 1)))) + varbuf_append(b, "%s=%d", name, + (int)(val | (~0 << width))); + else + varbuf_append(b, "%s=%u", name, val); + } + } + + if (sromrev >= 4) { + /* Do per-path variables */ + uint p, pb, psz; + + if (sromrev >= 8) { + pb = SROM8_PATH0; + psz = SROM8_PATH1 - SROM8_PATH0; + } else { + pb = SROM4_PATH0; + psz = SROM4_PATH1 - SROM4_PATH0; + } + + for (p = 0; p < MAX_PATH_SROM; p++) { + for (srv = perpath_pci_sromvars; srv->name != NULL; + srv++) { + if ((srv->revmask & sr) == 0) + continue; + + if (pb + srv->off < off) + continue; + + /* This entry is for mfgc only. Don't generate param for it, */ + if (srv->flags & SRFL_NOVAR) + continue; + + w = srom[pb + srv->off - off]; + val = (w & srv->mask) >> mask_shift(srv->mask); + width = mask_width(srv->mask); + + /* Cheating: no per-path var is more than 1 word */ + + if ((srv->flags & SRFL_NOFFS) + && ((int)val == (1 << width) - 1)) + continue; + + if (srv->flags & SRFL_PRHEX) + varbuf_append(b, "%s%d=0x%x", srv->name, + p, val); + else + varbuf_append(b, "%s%d=%d", srv->name, + p, val); + } + pb += psz; + } + } +} + +/* + * Initialize nonvolatile variable table from sprom. + * Return 0 on success, nonzero on error. + */ +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count) +{ + u16 *srom, *sromwindow; + u8 sromrev = 0; + u32 sr; + varbuf_t b; + char *vp, *base = NULL; + bool flash = false; + int err = 0; + + /* + * Apply CRC over SROM content regardless SROM is present or not, + * and use variable sromrev's existence in flash to decide + * if we should return an error when CRC fails or read SROM variables + * from flash. + */ + srom = kmalloc(SROM_MAX, GFP_ATOMIC); + if (!srom) + return -2; + + sromwindow = (u16 *) SROM_OFFSET(sih); + if (ai_is_sprom_available(sih)) { + err = + sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS, + true); + + if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || + (((sih->buscoretype == PCIE_CORE_ID) + && (sih->buscorerev >= 6)) + || ((sih->buscoretype == PCI_CORE_ID) + && (sih->buscorerev >= 0xe)))) { + /* sromrev >= 4, read more */ + err = + sprom_read_pci(sih, sromwindow, 0, srom, + SROM4_WORDS, true); + sromrev = srom[SROM4_CRCREV] & 0xff; + } else if (err == 0) { + /* srom is good and is rev < 4 */ + /* top word of sprom contains version and crc8 */ + sromrev = srom[SROM_CRCREV] & 0xff; + /* bcm4401 sroms misprogrammed */ + if (sromrev == 0x10) + sromrev = 1; + } + } +#if defined(BCMNVRAMR) + /* Use OTP if SPROM not available */ + else { + err = otp_read_pci(sih, srom, SROM_MAX); + if (err == 0) + /* OTP only contain SROM rev8/rev9 for now */ + sromrev = srom[SROM4_CRCREV] & 0xff; + else + err = 1; + } +#else + else + err = 1; +#endif + + /* + * We want internal/wltest driver to come up with default + * sromvars so we can program a blank SPROM/OTP. + */ + if (err) { + char *value; + u32 val; + val = 0; + + value = ai_getdevpathvar(sih, "sromrev"); + if (value) { + sromrev = (u8) simple_strtoul(value, NULL, 0); + flash = true; + goto varscont; + } + + value = ai_getnvramflvar(sih, "sromrev"); + if (value) { + err = 0; + goto errout; + } + + { + err = -1; + goto errout; + } + } + + varscont: + /* Bitmask for the sromrev */ + sr = 1 << sromrev; + + /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */ + if ((sr & 0x33e) == 0) { + err = -2; + goto errout; + } + + base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); + if (!base) { + err = -2; + goto errout; + } + + varbuf_init(&b, base, MAXSZ_NVRAM_VARS); + + /* parse SROM into name=value pairs. */ + _initvars_srom_pci(sromrev, srom, 0, &b); + + /* final nullbyte terminator */ + vp = b.buf; + *vp++ = '\0'; + + err = initvars_table(base, vp, vars, count); + + errout: + if (base) + kfree(base); + + kfree(srom); + return err; +} diff --git a/drivers/staging/brcm80211/brcmsmac/stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c new file mode 100644 index 0000000..a0abef3 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/stf.c @@ -0,0 +1,484 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include + +#include +#include +#include +#include +#include "dma.h" + +#include "types.h" +#include "d11.h" +#include "cfg.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "key.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "bottom_mac.h" +#include "stf.h" + +#define MIN_SPATIAL_EXPANSION 0 +#define MAX_SPATIAL_EXPANSION 1 + +#define WLC_STF_SS_STBC_RX(wlc) (WLCISNPHY(wlc->band) && \ + NREV_GT(wlc->band->phyrev, 3) && NREV_LE(wlc->band->phyrev, 6)) + +static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val); +static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 val); +static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val); +static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val); + +static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc); +static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); + +#define NSTS_1 1 +#define NSTS_2 2 +#define NSTS_3 3 +#define NSTS_4 4 +const u8 txcore_default[5] = { + (0), /* bitmap of the core enabled */ + (0x01), /* For Nsts = 1, enable core 1 */ + (0x03), /* For Nsts = 2, enable core 1 & 2 */ + (0x07), /* For Nsts = 3, enable core 1, 2 & 3 */ + (0x0f) /* For Nsts = 4, enable all cores */ +}; + +static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val) +{ + /* MIMOPHYs rev3-6 cannot receive STBC with only one rx core active */ + if (WLC_STF_SS_STBC_RX(wlc)) { + if ((wlc->stf->rxstreams == 1) && (val != HT_CAP_RX_STBC_NO)) + return; + } + + wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_RX_STBC; + wlc->ht_cap.cap_info |= (val << IEEE80211_HT_CAP_RX_STBC_SHIFT); + + if (wlc->pub->up) { + wlc_update_beacon(wlc); + wlc_update_probe_resp(wlc, true); + } +} + +/* every WLC_TEMPSENSE_PERIOD seconds temperature check to decide whether to turn on/off txchain */ +void wlc_tempsense_upd(struct wlc_info *wlc) +{ + wlc_phy_t *pi = wlc->band->pi; + uint active_chains, txchain; + + /* Check if the chip is too hot. Disable one Tx chain, if it is */ + /* high 4 bits are for Rx chain, low 4 bits are for Tx chain */ + active_chains = wlc_phy_stf_chain_active_get(pi); + txchain = active_chains & 0xf; + + if (wlc->stf->txchain == wlc->stf->hw_txchain) { + if (txchain && (txchain < wlc->stf->hw_txchain)) { + /* turn off 1 tx chain */ + wlc_stf_txchain_set(wlc, txchain, true); + } + } else if (wlc->stf->txchain < wlc->stf->hw_txchain) { + if (txchain == wlc->stf->hw_txchain) { + /* turn back on txchain */ + wlc_stf_txchain_set(wlc, txchain, true); + } + } +} + +void +wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, u16 *ss_algo_channel, + chanspec_t chanspec) +{ + tx_power_t power; + u8 siso_mcs_id, cdd_mcs_id, stbc_mcs_id; + + /* Clear previous settings */ + *ss_algo_channel = 0; + + if (!wlc->pub->up) { + *ss_algo_channel = (u16) -1; + return; + } + + wlc_phy_txpower_get_current(wlc->band->pi, &power, + CHSPEC_CHANNEL(chanspec)); + + siso_mcs_id = (CHSPEC_IS40(chanspec)) ? + WL_TX_POWER_MCS40_SISO_FIRST : WL_TX_POWER_MCS20_SISO_FIRST; + cdd_mcs_id = (CHSPEC_IS40(chanspec)) ? + WL_TX_POWER_MCS40_CDD_FIRST : WL_TX_POWER_MCS20_CDD_FIRST; + stbc_mcs_id = (CHSPEC_IS40(chanspec)) ? + WL_TX_POWER_MCS40_STBC_FIRST : WL_TX_POWER_MCS20_STBC_FIRST; + + /* criteria to choose stf mode */ + + /* the "+3dbm (12 0.25db units)" is to account for the fact that with CDD, tx occurs + * on both chains + */ + if (power.target[siso_mcs_id] > (power.target[cdd_mcs_id] + 12)) + setbit(ss_algo_channel, PHY_TXC1_MODE_SISO); + else + setbit(ss_algo_channel, PHY_TXC1_MODE_CDD); + + /* STBC is ORed into to algo channel as STBC requires per-packet SCB capability check + * so cannot be default mode of operation. One of SISO, CDD have to be set + */ + if (power.target[siso_mcs_id] <= (power.target[stbc_mcs_id] + 12)) + setbit(ss_algo_channel, PHY_TXC1_MODE_STBC); +} + +static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val) +{ + if ((int_val != AUTO) && (int_val != OFF) && (int_val != ON)) { + return false; + } + + if ((int_val == ON) && (wlc->stf->txstreams == 1)) + return false; + + if ((int_val == OFF) || (wlc->stf->txstreams == 1) + || !WLC_STBC_CAP_PHY(wlc)) + wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; + else + wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_TX_STBC; + + wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = (s8) int_val; + wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = (s8) int_val; + + return true; +} + +bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val) +{ + if ((int_val != HT_CAP_RX_STBC_NO) + && (int_val != HT_CAP_RX_STBC_ONE_STREAM)) { + return false; + } + + if (WLC_STF_SS_STBC_RX(wlc)) { + if ((int_val != HT_CAP_RX_STBC_NO) + && (wlc->stf->rxstreams == 1)) + return false; + } + + wlc_stf_stbc_rx_ht_update(wlc, int_val); + return true; +} + +static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 core_mask) +{ + BCMMSG(wlc->wiphy, "wl%d: Nsts %d core_mask %x\n", + wlc->pub->unit, Nsts, core_mask); + + if (WLC_BITSCNT(core_mask) > wlc->stf->txstreams) { + core_mask = 0; + } + + if ((WLC_BITSCNT(core_mask) == wlc->stf->txstreams) && + ((core_mask & ~wlc->stf->txchain) + || !(core_mask & wlc->stf->txchain))) { + core_mask = wlc->stf->txchain; + } + + wlc->stf->txcore[Nsts] = core_mask; + /* Nsts = 1..4, txcore index = 1..4 */ + if (Nsts == 1) { + /* Needs to update beacon and ucode generated response + * frames when 1 stream core map changed + */ + wlc->stf->phytxant = core_mask << PHY_TXC_ANT_SHIFT; + wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); + if (wlc->clk) { + wlc_suspend_mac_and_wait(wlc); + wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); + wlc_enable_mac(wlc); + } + } + + return 0; +} + +static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val) +{ + int i; + u8 core_mask = 0; + + BCMMSG(wlc->wiphy, "wl%d: val %x\n", wlc->pub->unit, val); + + wlc->stf->spatial_policy = (s8) val; + for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) { + core_mask = (val == MAX_SPATIAL_EXPANSION) ? + wlc->stf->txchain : txcore_default[i]; + wlc_stf_txcore_set(wlc, (u8) i, core_mask); + } + return 0; +} + +int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force) +{ + u8 txchain = (u8) int_val; + u8 txstreams; + uint i; + + if (wlc->stf->txchain == txchain) + return 0; + + if ((txchain & ~wlc->stf->hw_txchain) + || !(txchain & wlc->stf->hw_txchain)) + return -EINVAL; + + /* if nrate override is configured to be non-SISO STF mode, reject reducing txchain to 1 */ + txstreams = (u8) WLC_BITSCNT(txchain); + if (txstreams > MAX_STREAMS_SUPPORTED) + return -EINVAL; + + if (txstreams == 1) { + for (i = 0; i < NBANDS(wlc); i++) + if ((RSPEC_STF(wlc->bandstate[i]->rspec_override) != + PHY_TXC1_MODE_SISO) + || (RSPEC_STF(wlc->bandstate[i]->mrspec_override) != + PHY_TXC1_MODE_SISO)) { + if (!force) + return -EBADE; + + /* over-write the override rspec */ + if (RSPEC_STF(wlc->bandstate[i]->rspec_override) + != PHY_TXC1_MODE_SISO) { + wlc->bandstate[i]->rspec_override = 0; + wiphy_err(wlc->wiphy, "%s(): temp " + "sense override non-SISO " + "rspec_override\n", + __func__); + } + if (RSPEC_STF + (wlc->bandstate[i]->mrspec_override) != + PHY_TXC1_MODE_SISO) { + wlc->bandstate[i]->mrspec_override = 0; + wiphy_err(wlc->wiphy, "%s(): temp " + "sense override non-SISO " + "mrspec_override\n", + __func__); + } + } + } + + wlc->stf->txchain = txchain; + wlc->stf->txstreams = txstreams; + wlc_stf_stbc_tx_set(wlc, wlc->band->band_stf_stbc_tx); + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + wlc->stf->txant = + (wlc->stf->txstreams == 1) ? ANT_TX_FORCE_0 : ANT_TX_DEF; + _wlc_stf_phy_txant_upd(wlc); + + wlc_phy_stf_chain_set(wlc->band->pi, wlc->stf->txchain, + wlc->stf->rxchain); + + for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) + wlc_stf_txcore_set(wlc, (u8) i, txcore_default[i]); + + return 0; +} + +/* update wlc->stf->ss_opmode which represents the operational stf_ss mode we're using */ +int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band) +{ + int ret_code = 0; + u8 prev_stf_ss; + u8 upd_stf_ss; + + prev_stf_ss = wlc->stf->ss_opmode; + + /* NOTE: opmode can only be SISO or CDD as STBC is decided on a per-packet basis */ + if (WLC_STBC_CAP_PHY(wlc) && + wlc->stf->ss_algosel_auto + && (wlc->stf->ss_algo_channel != (u16) -1)) { + upd_stf_ss = (wlc->stf->no_cddstbc || (wlc->stf->txstreams == 1) + || isset(&wlc->stf->ss_algo_channel, + PHY_TXC1_MODE_SISO)) ? PHY_TXC1_MODE_SISO + : PHY_TXC1_MODE_CDD; + } else { + if (wlc->band != band) + return ret_code; + upd_stf_ss = (wlc->stf->no_cddstbc + || (wlc->stf->txstreams == + 1)) ? PHY_TXC1_MODE_SISO : band-> + band_stf_ss_mode; + } + if (prev_stf_ss != upd_stf_ss) { + wlc->stf->ss_opmode = upd_stf_ss; + wlc_bmac_band_stf_ss_set(wlc->hw, upd_stf_ss); + } + + return ret_code; +} + +int wlc_stf_attach(struct wlc_info *wlc) +{ + wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_SISO; + wlc->bandstate[BAND_5G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_CDD; + + if (WLCISNPHY(wlc->band) && + (wlc_phy_txpower_hw_ctrl_get(wlc->band->pi) != PHY_TPC_HW_ON)) + wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = + PHY_TXC1_MODE_CDD; + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + + wlc_stf_stbc_rx_ht_update(wlc, HT_CAP_RX_STBC_NO); + wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF; + wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; + + if (WLC_STBC_CAP_PHY(wlc)) { + wlc->stf->ss_algosel_auto = true; + wlc->stf->ss_algo_channel = (u16) -1; /* Init the default value */ + } + return 0; +} + +void wlc_stf_detach(struct wlc_info *wlc) +{ +} + +/* + * Centralized txant update function. call it whenever wlc->stf->txant and/or wlc->stf->txchain + * change + * + * Antennas are controlled by ucode indirectly, which drives PHY or GPIO to + * achieve various tx/rx antenna selection schemes + * + * legacy phy, bit 6 and bit 7 means antenna 0 and 1 respectively, bit6+bit7 means auto(last rx) + * for NREV<3, bit 6 and bit 7 means antenna 0 and 1 respectively, bit6+bit7 means last rx and + * do tx-antenna selection for SISO transmissions + * for NREV=3, bit 6 and bit _8_ means antenna 0 and 1 respectively, bit6+bit7 means last rx and + * do tx-antenna selection for SISO transmissions + * for NREV>=7, bit 6 and bit 7 mean antenna 0 and 1 respectively, nit6+bit7 means both cores active +*/ +static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc) +{ + s8 txant; + + txant = (s8) wlc->stf->txant; + if (WLC_PHY_11N_CAP(wlc->band)) { + if (txant == ANT_TX_FORCE_0) { + wlc->stf->phytxant = PHY_TXC_ANT_0; + } else if (txant == ANT_TX_FORCE_1) { + wlc->stf->phytxant = PHY_TXC_ANT_1; + + if (WLCISNPHY(wlc->band) && + NREV_GE(wlc->band->phyrev, 3) + && NREV_LT(wlc->band->phyrev, 7)) { + wlc->stf->phytxant = PHY_TXC_ANT_2; + } + } else { + if (WLCISLCNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) + wlc->stf->phytxant = PHY_TXC_LCNPHY_ANT_LAST; + else { + /* catch out of sync wlc->stf->txcore */ + WARN_ON(wlc->stf->txchain <= 0); + wlc->stf->phytxant = + wlc->stf->txchain << PHY_TXC_ANT_SHIFT; + } + } + } else { + if (txant == ANT_TX_FORCE_0) + wlc->stf->phytxant = PHY_TXC_OLD_ANT_0; + else if (txant == ANT_TX_FORCE_1) + wlc->stf->phytxant = PHY_TXC_OLD_ANT_1; + else + wlc->stf->phytxant = PHY_TXC_OLD_ANT_LAST; + } + + wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); +} + +void wlc_stf_phy_txant_upd(struct wlc_info *wlc) +{ + _wlc_stf_phy_txant_upd(wlc); +} + +void wlc_stf_phy_chain_calc(struct wlc_info *wlc) +{ + /* get available rx/tx chains */ + wlc->stf->hw_txchain = (u8) getintvar(wlc->pub->vars, "txchain"); + wlc->stf->hw_rxchain = (u8) getintvar(wlc->pub->vars, "rxchain"); + + /* these parameter are intended to be used for all PHY types */ + if (wlc->stf->hw_txchain == 0 || wlc->stf->hw_txchain == 0xf) { + if (WLCISNPHY(wlc->band)) { + wlc->stf->hw_txchain = TXCHAIN_DEF_NPHY; + } else { + wlc->stf->hw_txchain = TXCHAIN_DEF; + } + } + + wlc->stf->txchain = wlc->stf->hw_txchain; + wlc->stf->txstreams = (u8) WLC_BITSCNT(wlc->stf->hw_txchain); + + if (wlc->stf->hw_rxchain == 0 || wlc->stf->hw_rxchain == 0xf) { + if (WLCISNPHY(wlc->band)) { + wlc->stf->hw_rxchain = RXCHAIN_DEF_NPHY; + } else { + wlc->stf->hw_rxchain = RXCHAIN_DEF; + } + } + + wlc->stf->rxchain = wlc->stf->hw_rxchain; + wlc->stf->rxstreams = (u8) WLC_BITSCNT(wlc->stf->hw_rxchain); + + /* initialize the txcore table */ + memcpy(wlc->stf->txcore, txcore_default, sizeof(wlc->stf->txcore)); + + /* default spatial_policy */ + wlc->stf->spatial_policy = MIN_SPATIAL_EXPANSION; + wlc_stf_spatial_policy_set(wlc, MIN_SPATIAL_EXPANSION); +} + +static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) +{ + u16 phytxant = wlc->stf->phytxant; + + if (RSPEC_STF(rspec) != PHY_TXC1_MODE_SISO) { + phytxant = wlc->stf->txchain << PHY_TXC_ANT_SHIFT; + } else if (wlc->stf->txant == ANT_TX_DEF) + phytxant = wlc->stf->txchain << PHY_TXC_ANT_SHIFT; + phytxant &= PHY_TXC_ANT_MASK; + return phytxant; +} + +u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) +{ + return _wlc_stf_phytxchain_sel(wlc, rspec); +} + +u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec) +{ + u16 phytxant = wlc->stf->phytxant; + u16 mask = PHY_TXC_ANT_MASK; + + /* for non-siso rates or default setting, use the available chains */ + if (WLCISNPHY(wlc->band)) { + phytxant = _wlc_stf_phytxchain_sel(wlc, rspec); + mask = PHY_TXC_HTANT_MASK; + } + phytxant |= phytxant & mask; + return phytxant; +} diff --git a/drivers/staging/brcm80211/brcmsmac/stf.h b/drivers/staging/brcm80211/brcmsmac/stf.h new file mode 100644 index 0000000..75e8205 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/stf.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_STF_H_ +#define _BRCM_STF_H_ + +extern int wlc_stf_attach(struct wlc_info *wlc); +extern void wlc_stf_detach(struct wlc_info *wlc); + +extern void wlc_tempsense_upd(struct wlc_info *wlc); +extern void wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, + u16 *ss_algo_channel, + chanspec_t chanspec); +extern int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band); +extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); +extern int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force); +extern bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val); +extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); +extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc); +extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); +extern u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec); + +#endif /* _BRCM_STF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/types.h b/drivers/staging/brcm80211/brcmsmac/types.h new file mode 100644 index 0000000..d15860b --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/types.h @@ -0,0 +1,157 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_TYPES_H_ +#define _BRCM_TYPES_H_ + +/* Bus types */ +#define SI_BUS 0 /* SOC Interconnect */ +#define PCI_BUS 1 /* PCI target */ +#define SDIO_BUS 3 /* SDIO target */ +#define JTAG_BUS 4 /* JTAG */ +#define USB_BUS 5 /* USB (does not support R/W REG) */ +#define SPI_BUS 6 /* gSPI target */ +#define RPC_BUS 7 /* RPC target */ + +#define WL_CHAN_FREQ_RANGE_2G 0 +#define WL_CHAN_FREQ_RANGE_5GL 1 +#define WL_CHAN_FREQ_RANGE_5GM 2 +#define WL_CHAN_FREQ_RANGE_5GH 3 + +#define MAX_DMA_SEGS 4 + +#define BCMMSG(dev, fmt, args...) \ +do { \ + if (brcm_msg_level & LOG_TRACE_VAL) \ + wiphy_err(dev, "%s: " fmt, __func__, ##args); \ +} while (0) + +#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r) \ + ({\ + sizeof(*(r)) == sizeof(u8) ? \ + readb((volatile u8*)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ + readl((volatile u32*)(r)); \ + }) +#else /* __mips__ */ +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((volatile u8*)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((volatile u16*)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((volatile u32*)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }) +#endif /* __mips__ */ + +#define W_REG(r, v) do { \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), (volatile u8*)(r)); break; \ + case sizeof(u16): \ + writew((u16)(v), (volatile u16*)(r)); break; \ + case sizeof(u32): \ + writel((u32)(v), (volatile u32*)(r)); break; \ + }; \ + } while (0) +#else /* __BIG_ENDIAN */ +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((volatile u8*)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((volatile u16*)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((volatile u32*)(r)); \ + break; \ + } \ + __osl_v; \ + }) + +#define W_REG(r, v) do { \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), \ + (volatile u8*)((r)^3)); break; \ + case sizeof(u16): \ + writew((u16)(v), \ + (volatile u16*)((r)^2)); break; \ + case sizeof(u32): \ + writel((u32)(v), \ + (volatile u32*)(r)); break; \ + } \ + } while (0) +#endif /* __BIG_ENDIAN */ + +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) + +#define SET_REG(r, mask, val) \ + W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + +/* forward declarations */ +struct sk_buff; +struct brcms_info; +struct wlc_info; +struct wlc_hw_info; +struct wlc_if; +struct brcms_if; +struct ampdu_info; +struct antsel_info; +struct bmac_pmq; +struct d11init; +struct dma_pub; +struct wlc_bsscfg; +struct brcmu_strbuf; +struct si_pub; + +/* brcm_msg_level is a bit vector with defs in defs.h */ +extern u32 brcm_msg_level; + +#endif /* _BRCM_TYPES_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c index d38f124..32d5196 100644 --- a/drivers/staging/brcm80211/brcmsmac/ucode_loader.c +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c @@ -15,7 +15,7 @@ */ #include -#include +#include #include enum { diff --git a/drivers/staging/brcm80211/brcmsmac/ucode_loader.h b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h index 4b90121..ca53dec 100644 --- a/drivers/staging/brcm80211/brcmsmac/ucode_loader.h +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h @@ -14,7 +14,7 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include "wlc_types.h" /* forward structure declarations */ +#include "types.h" /* forward structure declarations */ #define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */ #define MAX_FW_SIZE 150000 diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c deleted file mode 100644 index 77caf06..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include - -#include -#include -#include -#include "bcmdma.h" - -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "wlc_alloc.h" -#include "wlc_rate.h" -#include "wlc_bsscfg.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" - -static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit); -static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg); -static struct wlc_pub *wlc_pub_malloc(uint unit, - uint *err, uint devid); -static void wlc_pub_mfree(struct wlc_pub *pub); -static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid); - -static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid) -{ - tunables->ntxd = NTXD; - tunables->nrxd = NRXD; - tunables->rxbufsz = RXBUFSZ; - tunables->nrxbufpost = NRXBUFPOST; - tunables->maxscb = MAXSCB; - tunables->ampdunummpdu = AMPDU_NUM_MPDU; - tunables->maxpktcb = MAXPKTCB; - tunables->maxucodebss = WLC_MAX_UCODE_BSS; - tunables->maxucodebss4 = WLC_MAX_UCODE_BSS4; - tunables->maxbss = MAXBSS; - tunables->datahiwat = WLC_DATAHIWAT; - tunables->ampdudatahiwat = WLC_AMPDUDATAHIWAT; - tunables->rxbnd = RXBND; - tunables->txsbnd = TXSBND; -} - -static struct wlc_pub *wlc_pub_malloc(uint unit, uint *err, uint devid) -{ - struct wlc_pub *pub; - - pub = kzalloc(sizeof(struct wlc_pub), GFP_ATOMIC); - if (pub == NULL) { - *err = 1001; - goto fail; - } - - pub->tunables = kzalloc(sizeof(wlc_tunables_t), GFP_ATOMIC); - if (pub->tunables == NULL) { - *err = 1028; - goto fail; - } - - /* need to init the tunables now */ - wlc_tunables_init(pub->tunables, devid); - - pub->multicast = kzalloc(ETH_ALEN * MAXMULTILIST, GFP_ATOMIC); - if (pub->multicast == NULL) { - *err = 1003; - goto fail; - } - - return pub; - - fail: - wlc_pub_mfree(pub); - return NULL; -} - -static void wlc_pub_mfree(struct wlc_pub *pub) -{ - if (pub == NULL) - return; - - kfree(pub->multicast); - kfree(pub->tunables); - kfree(pub); -} - -static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit) -{ - struct wlc_bsscfg *cfg; - - cfg = kzalloc(sizeof(struct wlc_bsscfg), GFP_ATOMIC); - if (cfg == NULL) - goto fail; - - cfg->current_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); - if (cfg->current_bss == NULL) - goto fail; - - return cfg; - - fail: - wlc_bsscfg_mfree(cfg); - return NULL; -} - -static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg) -{ - if (cfg == NULL) - return; - - kfree(cfg->maclist); - kfree(cfg->current_bss); - kfree(cfg); -} - -static void wlc_bsscfg_ID_assign(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg) -{ - bsscfg->ID = wlc->next_bsscfg_ID; - wlc->next_bsscfg_ID++; -} - -/* - * The common driver entry routine. Error codes should be unique - */ -struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) -{ - struct wlc_info *wlc; - - wlc = kzalloc(sizeof(struct wlc_info), GFP_ATOMIC); - if (wlc == NULL) { - *err = 1002; - goto fail; - } - - /* allocate struct wlc_pub state structure */ - wlc->pub = wlc_pub_malloc(unit, err, devid); - if (wlc->pub == NULL) { - *err = 1003; - goto fail; - } - wlc->pub->wlc = wlc; - - /* allocate struct wlc_hw_info state structure */ - - wlc->hw = kzalloc(sizeof(struct wlc_hw_info), GFP_ATOMIC); - if (wlc->hw == NULL) { - *err = 1005; - goto fail; - } - wlc->hw->wlc = wlc; - - wlc->hw->bandstate[0] = - kzalloc(sizeof(struct wlc_hwband) * MAXBANDS, GFP_ATOMIC); - if (wlc->hw->bandstate[0] == NULL) { - *err = 1006; - goto fail; - } else { - int i; - - for (i = 1; i < MAXBANDS; i++) { - wlc->hw->bandstate[i] = (struct wlc_hwband *) - ((unsigned long)wlc->hw->bandstate[0] + - (sizeof(struct wlc_hwband) * i)); - } - } - - wlc->modulecb = - kzalloc(sizeof(struct modulecb) * WLC_MAXMODULES, GFP_ATOMIC); - if (wlc->modulecb == NULL) { - *err = 1009; - goto fail; - } - - wlc->default_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); - if (wlc->default_bss == NULL) { - *err = 1010; - goto fail; - } - - wlc->cfg = wlc_bsscfg_malloc(unit); - if (wlc->cfg == NULL) { - *err = 1011; - goto fail; - } - wlc_bsscfg_ID_assign(wlc, wlc->cfg); - - wlc->wsec_def_keys[0] = - kzalloc(sizeof(wsec_key_t) * WLC_DEFAULT_KEYS, GFP_ATOMIC); - if (wlc->wsec_def_keys[0] == NULL) { - *err = 1015; - goto fail; - } else { - int i; - for (i = 1; i < WLC_DEFAULT_KEYS; i++) { - wlc->wsec_def_keys[i] = (wsec_key_t *) - ((unsigned long)wlc->wsec_def_keys[0] + - (sizeof(wsec_key_t) * i)); - } - } - - wlc->protection = kzalloc(sizeof(struct wlc_protection), GFP_ATOMIC); - if (wlc->protection == NULL) { - *err = 1016; - goto fail; - } - - wlc->stf = kzalloc(sizeof(struct wlc_stf), GFP_ATOMIC); - if (wlc->stf == NULL) { - *err = 1017; - goto fail; - } - - wlc->bandstate[0] = - kzalloc(sizeof(struct wlcband)*MAXBANDS, GFP_ATOMIC); - if (wlc->bandstate[0] == NULL) { - *err = 1025; - goto fail; - } else { - int i; - - for (i = 1; i < MAXBANDS; i++) { - wlc->bandstate[i] = - (struct wlcband *) ((unsigned long)wlc->bandstate[0] - + (sizeof(struct wlcband)*i)); - } - } - - wlc->corestate = kzalloc(sizeof(struct wlccore), GFP_ATOMIC); - if (wlc->corestate == NULL) { - *err = 1026; - goto fail; - } - - wlc->corestate->macstat_snapshot = - kzalloc(sizeof(macstat_t), GFP_ATOMIC); - if (wlc->corestate->macstat_snapshot == NULL) { - *err = 1027; - goto fail; - } - - return wlc; - - fail: - wlc_detach_mfree(wlc); - return NULL; -} - -void wlc_detach_mfree(struct wlc_info *wlc) -{ - if (wlc == NULL) - return; - - wlc_bsscfg_mfree(wlc->cfg); - wlc_pub_mfree(wlc->pub); - kfree(wlc->modulecb); - kfree(wlc->default_bss); - kfree(wlc->wsec_def_keys[0]); - kfree(wlc->protection); - kfree(wlc->stf); - kfree(wlc->bandstate[0]); - kfree(wlc->corestate->macstat_snapshot); - kfree(wlc->corestate); - kfree(wlc->hw->bandstate[0]); - kfree(wlc->hw); - - /* free the wlc */ - kfree(wlc); - wlc = NULL; -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h b/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h deleted file mode 100644 index 95f951e..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -extern struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid); -extern void wlc_detach_mfree(struct wlc_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c deleted file mode 100644 index 3668451..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ /dev/null @@ -1,1246 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include - -#include -#include -#include -#include "bcmdma.h" -#include -#include - -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_antsel.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_ampdu.h" - -#define AMPDU_MAX_MPDU 32 /* max number of mpdus in an ampdu */ -#define AMPDU_NUM_MPDU_LEGACY 16 /* max number of mpdus in an ampdu to a legacy */ -#define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ -#define AMPDU_TX_BA_DEF_WSIZE 64 /* default Tx ba window size (in pdu) */ -#define AMPDU_RX_BA_DEF_WSIZE 64 /* max Rx ba window size (in pdu) */ -#define AMPDU_RX_BA_MAX_WSIZE 64 /* default Rx ba window size (in pdu) */ -#define AMPDU_MAX_DUR 5 /* max dur of tx ampdu (in msec) */ -#define AMPDU_DEF_RETRY_LIMIT 5 /* default tx retry limit */ -#define AMPDU_DEF_RR_RETRY_LIMIT 2 /* default tx retry limit at reg rate */ -#define AMPDU_DEF_TXPKT_WEIGHT 2 /* default weight of ampdu in txfifo */ -#define AMPDU_DEF_FFPLD_RSVD 2048 /* default ffpld reserved bytes */ -#define AMPDU_INI_FREE 10 /* # of inis to be freed on detach */ -#define AMPDU_SCB_MAX_RELEASE 20 /* max # of mpdus released at a time */ - -#define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */ -#define FFPLD_TX_MAX_UNFL 200 /* default value of the average number of ampdu - * without underflows - */ -#define FFPLD_MPDU_SIZE 1800 /* estimate of maximum mpdu size */ -#define FFPLD_MAX_MCS 23 /* we don't deal with mcs 32 */ -#define FFPLD_PLD_INCR 1000 /* increments in bytes */ -#define FFPLD_MAX_AMPDU_CNT 5000 /* maximum number of ampdu we - * accumulate between resets. - */ - -#define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE) - -/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */ -#define AMPDU_MAX_MPDU_OVERHEAD (FCS_LEN + DOT11_ICV_AES_LEN +\ - AMPDU_DELIMITER_LEN + 3\ - + DOT11_A4_HDR_LEN + DOT11_QOS_LEN + DOT11_IV_MAX_LEN) - -/* structure to hold tx fifo information and pre-loading state - * counters specific to tx underflows of ampdus - * some counters might be redundant with the ones in wlc or ampdu structures. - * This allows to maintain a specific state independently of - * how often and/or when the wlc counters are updated. - */ -typedef struct wlc_fifo_info { - u16 ampdu_pld_size; /* number of bytes to be pre-loaded */ - u8 mcs2ampdu_table[FFPLD_MAX_MCS + 1]; /* per-mcs max # of mpdus in an ampdu */ - u16 prev_txfunfl; /* num of underflows last read from the HW macstats counter */ - u32 accum_txfunfl; /* num of underflows since we modified pld params */ - u32 accum_txampdu; /* num of tx ampdu since we modified pld params */ - u32 prev_txampdu; /* previous reading of tx ampdu */ - u32 dmaxferrate; /* estimated dma avg xfer rate in kbits/sec */ -} wlc_fifo_info_t; - -/* AMPDU module specific state */ -struct ampdu_info { - struct wlc_info *wlc; /* pointer to main wlc structure */ - int scb_handle; /* scb cubby handle to retrieve data from scb */ - u8 ini_enable[AMPDU_MAX_SCB_TID]; /* per-tid initiator enable/disable of ampdu */ - u8 ba_tx_wsize; /* Tx ba window size (in pdu) */ - u8 ba_rx_wsize; /* Rx ba window size (in pdu) */ - u8 retry_limit; /* mpdu transmit retry limit */ - u8 rr_retry_limit; /* mpdu transmit retry limit at regular rate */ - u8 retry_limit_tid[AMPDU_MAX_SCB_TID]; /* per-tid mpdu transmit retry limit */ - /* per-tid mpdu transmit retry limit at regular rate */ - u8 rr_retry_limit_tid[AMPDU_MAX_SCB_TID]; - u8 mpdu_density; /* min mpdu spacing (0-7) ==> 2^(x-1)/8 usec */ - s8 max_pdu; /* max pdus allowed in ampdu */ - u8 dur; /* max duration of an ampdu (in msec) */ - u8 txpkt_weight; /* weight of ampdu in txfifo; reduces rate lag */ - u8 rx_factor; /* maximum rx ampdu factor (0-3) ==> 2^(13+x) bytes */ - u32 ffpld_rsvd; /* number of bytes to reserve for preload */ - u32 max_txlen[MCS_TABLE_SIZE][2][2]; /* max size of ampdu per mcs, bw and sgi */ - void *ini_free[AMPDU_INI_FREE]; /* array of ini's to be freed on detach */ - bool mfbr; /* enable multiple fallback rate */ - u32 tx_max_funl; /* underflows should be kept such that - * (tx_max_funfl*underflows) < tx frames - */ - wlc_fifo_info_t fifo_tb[NUM_FFPLD_FIFO]; /* table of fifo infos */ - -}; - -/* used for flushing ampdu packets */ -struct cb_del_ampdu_pars { - struct ieee80211_sta *sta; - u16 tid; -}; - -#define AMPDU_CLEANUPFLAG_RX (0x1) -#define AMPDU_CLEANUPFLAG_TX (0x2) - -#define SCB_AMPDU_CUBBY(ampdu, scb) (&(scb->scb_ampdu)) -#define SCB_AMPDU_INI(scb_ampdu, tid) (&(scb_ampdu->ini[tid])) - -static void wlc_ffpld_init(struct ampdu_info *ampdu); -static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int f); -static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f); - -static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, - scb_ampdu_t *scb_ampdu, - u8 tid, bool override); -static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur); -static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb); -static void scb_ampdu_update_config_all(struct ampdu_info *ampdu); - -#define wlc_ampdu_txflowcontrol(a, b, c) do {} while (0) - -static void wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, - struct scb *scb, - struct sk_buff *p, tx_status_t *txs, - u32 frmtxstatus, u32 frmtxstatus2); -static bool wlc_ampdu_cap(struct ampdu_info *ampdu); -static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on); - -struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc) -{ - struct ampdu_info *ampdu; - int i; - - ampdu = kzalloc(sizeof(struct ampdu_info), GFP_ATOMIC); - if (!ampdu) { - wiphy_err(wlc->wiphy, "wl%d: wlc_ampdu_attach: out of mem\n", - wlc->pub->unit); - return NULL; - } - ampdu->wlc = wlc; - - for (i = 0; i < AMPDU_MAX_SCB_TID; i++) - ampdu->ini_enable[i] = true; - /* Disable ampdu for VO by default */ - ampdu->ini_enable[PRIO_8021D_VO] = false; - ampdu->ini_enable[PRIO_8021D_NC] = false; - - /* Disable ampdu for BK by default since not enough fifo space */ - ampdu->ini_enable[PRIO_8021D_NONE] = false; - ampdu->ini_enable[PRIO_8021D_BK] = false; - - ampdu->ba_tx_wsize = AMPDU_TX_BA_DEF_WSIZE; - ampdu->ba_rx_wsize = AMPDU_RX_BA_DEF_WSIZE; - ampdu->mpdu_density = AMPDU_DEF_MPDU_DENSITY; - ampdu->max_pdu = AUTO; - ampdu->dur = AMPDU_MAX_DUR; - ampdu->txpkt_weight = AMPDU_DEF_TXPKT_WEIGHT; - - ampdu->ffpld_rsvd = AMPDU_DEF_FFPLD_RSVD; - /* bump max ampdu rcv size to 64k for all 11n devices except 4321A0 and 4321A1 */ - if (WLCISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2)) - ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_32K; - else - ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_64K; - ampdu->retry_limit = AMPDU_DEF_RETRY_LIMIT; - ampdu->rr_retry_limit = AMPDU_DEF_RR_RETRY_LIMIT; - - for (i = 0; i < AMPDU_MAX_SCB_TID; i++) { - ampdu->retry_limit_tid[i] = ampdu->retry_limit; - ampdu->rr_retry_limit_tid[i] = ampdu->rr_retry_limit; - } - - ampdu_update_max_txlen(ampdu, ampdu->dur); - ampdu->mfbr = false; - /* try to set ampdu to the default value */ - wlc_ampdu_set(ampdu, wlc->pub->_ampdu); - - ampdu->tx_max_funl = FFPLD_TX_MAX_UNFL; - wlc_ffpld_init(ampdu); - - return ampdu; -} - -void wlc_ampdu_detach(struct ampdu_info *ampdu) -{ - int i; - - if (!ampdu) - return; - - /* free all ini's which were to be freed on callbacks which were never called */ - for (i = 0; i < AMPDU_INI_FREE; i++) { - kfree(ampdu->ini_free[i]); - } - - wlc_module_unregister(ampdu->wlc->pub, "ampdu", ampdu); - kfree(ampdu); -} - -static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb) -{ - scb_ampdu_t *scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - int i; - - scb_ampdu->max_pdu = (u8) ampdu->wlc->pub->tunables->ampdunummpdu; - - /* go back to legacy size if some preloading is occurring */ - for (i = 0; i < NUM_FFPLD_FIFO; i++) { - if (ampdu->fifo_tb[i].ampdu_pld_size > FFPLD_PLD_INCR) - scb_ampdu->max_pdu = AMPDU_NUM_MPDU_LEGACY; - } - - /* apply user override */ - if (ampdu->max_pdu != AUTO) - scb_ampdu->max_pdu = (u8) ampdu->max_pdu; - - scb_ampdu->release = min_t(u8, scb_ampdu->max_pdu, AMPDU_SCB_MAX_RELEASE); - - if (scb_ampdu->max_rxlen) - scb_ampdu->release = - min_t(u8, scb_ampdu->release, scb_ampdu->max_rxlen / 1600); - - scb_ampdu->release = min(scb_ampdu->release, - ampdu->fifo_tb[TX_AC_BE_FIFO]. - mcs2ampdu_table[FFPLD_MAX_MCS]); -} - -static void scb_ampdu_update_config_all(struct ampdu_info *ampdu) -{ - scb_ampdu_update_config(ampdu, ampdu->wlc->pub->global_scb); -} - -static void wlc_ffpld_init(struct ampdu_info *ampdu) -{ - int i, j; - wlc_fifo_info_t *fifo; - - for (j = 0; j < NUM_FFPLD_FIFO; j++) { - fifo = (ampdu->fifo_tb + j); - fifo->ampdu_pld_size = 0; - for (i = 0; i <= FFPLD_MAX_MCS; i++) - fifo->mcs2ampdu_table[i] = 255; - fifo->dmaxferrate = 0; - fifo->accum_txampdu = 0; - fifo->prev_txfunfl = 0; - fifo->accum_txfunfl = 0; - - } -} - -/* evaluate the dma transfer rate using the tx underflows as feedback. - * If necessary, increase tx fifo preloading. If not enough, - * decrease maximum ampdu size for each mcs till underflows stop - * Return 1 if pre-loading not active, -1 if not an underflow event, - * 0 if pre-loading module took care of the event. - */ -static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) -{ - struct ampdu_info *ampdu = wlc->ampdu; - u32 phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, false); - u32 txunfl_ratio; - u8 max_mpdu; - u32 current_ampdu_cnt = 0; - u16 max_pld_size; - u32 new_txunfl; - wlc_fifo_info_t *fifo = (ampdu->fifo_tb + fid); - uint xmtfifo_sz; - u16 cur_txunfl; - - /* return if we got here for a different reason than underflows */ - cur_txunfl = - wlc_read_shm(wlc, - M_UCODE_MACSTAT + offsetof(macstat_t, txfunfl[fid])); - new_txunfl = (u16) (cur_txunfl - fifo->prev_txfunfl); - if (new_txunfl == 0) { - BCMMSG(wlc->wiphy, "TX status FRAG set but no tx underflows\n"); - return -1; - } - fifo->prev_txfunfl = cur_txunfl; - - if (!ampdu->tx_max_funl) - return 1; - - /* check if fifo is big enough */ - if (wlc_xmtfifo_sz_get(wlc, fid, &xmtfifo_sz)) { - return -1; - } - - if ((TXFIFO_SIZE_UNIT * (u32) xmtfifo_sz) <= ampdu->ffpld_rsvd) - return 1; - - max_pld_size = TXFIFO_SIZE_UNIT * xmtfifo_sz - ampdu->ffpld_rsvd; - fifo->accum_txfunfl += new_txunfl; - - /* we need to wait for at least 10 underflows */ - if (fifo->accum_txfunfl < 10) - return 0; - - BCMMSG(wlc->wiphy, "ampdu_count %d tx_underflows %d\n", - current_ampdu_cnt, fifo->accum_txfunfl); - - /* - compute the current ratio of tx unfl per ampdu. - When the current ampdu count becomes too - big while the ratio remains small, we reset - the current count in order to not - introduce too big of a latency in detecting a - large amount of tx underflows later. - */ - - txunfl_ratio = current_ampdu_cnt / fifo->accum_txfunfl; - - if (txunfl_ratio > ampdu->tx_max_funl) { - if (current_ampdu_cnt >= FFPLD_MAX_AMPDU_CNT) { - fifo->accum_txfunfl = 0; - } - return 0; - } - max_mpdu = - min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY); - - /* In case max value max_pdu is already lower than - the fifo depth, there is nothing more we can do. - */ - - if (fifo->ampdu_pld_size >= max_mpdu * FFPLD_MPDU_SIZE) { - fifo->accum_txfunfl = 0; - return 0; - } - - if (fifo->ampdu_pld_size < max_pld_size) { - - /* increment by TX_FIFO_PLD_INC bytes */ - fifo->ampdu_pld_size += FFPLD_PLD_INCR; - if (fifo->ampdu_pld_size > max_pld_size) - fifo->ampdu_pld_size = max_pld_size; - - /* update scb release size */ - scb_ampdu_update_config_all(ampdu); - - /* - compute a new dma xfer rate for max_mpdu @ max mcs. - This is the minimum dma rate that - can achieve no underflow condition for the current mpdu size. - */ - /* note : we divide/multiply by 100 to avoid integer overflows */ - fifo->dmaxferrate = - (((phy_rate / 100) * - (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size)) - / (max_mpdu * FFPLD_MPDU_SIZE)) * 100; - - BCMMSG(wlc->wiphy, "DMA estimated transfer rate %d; " - "pre-load size %d\n", - fifo->dmaxferrate, fifo->ampdu_pld_size); - } else { - - /* decrease ampdu size */ - if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] > 1) { - if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] == 255) - fifo->mcs2ampdu_table[FFPLD_MAX_MCS] = - AMPDU_NUM_MPDU_LEGACY - 1; - else - fifo->mcs2ampdu_table[FFPLD_MAX_MCS] -= 1; - - /* recompute the table */ - wlc_ffpld_calc_mcs2ampdu_table(ampdu, fid); - - /* update scb release size */ - scb_ampdu_update_config_all(ampdu); - } - } - fifo->accum_txfunfl = 0; - return 0; -} - -static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f) -{ - int i; - u32 phy_rate, dma_rate, tmp; - u8 max_mpdu; - wlc_fifo_info_t *fifo = (ampdu->fifo_tb + f); - - /* recompute the dma rate */ - /* note : we divide/multiply by 100 to avoid integer overflows */ - max_mpdu = - min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY); - phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, false); - dma_rate = - (((phy_rate / 100) * - (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size)) - / (max_mpdu * FFPLD_MPDU_SIZE)) * 100; - fifo->dmaxferrate = dma_rate; - - /* fill up the mcs2ampdu table; do not recalc the last mcs */ - dma_rate = dma_rate >> 7; - for (i = 0; i < FFPLD_MAX_MCS; i++) { - /* shifting to keep it within integer range */ - phy_rate = MCS_RATE(i, true, false) >> 7; - if (phy_rate > dma_rate) { - tmp = ((fifo->ampdu_pld_size * phy_rate) / - ((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1; - tmp = min_t(u32, tmp, 255); - fifo->mcs2ampdu_table[i] = (u8) tmp; - } - } -} - -static void -wlc_ampdu_agg(struct ampdu_info *ampdu, struct scb *scb, struct sk_buff *p, - uint prec) -{ - scb_ampdu_t *scb_ampdu; - scb_ampdu_tid_ini_t *ini; - u8 tid = (u8) (p->priority); - - scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - - /* initialize initiator on first packet; sends addba req */ - ini = SCB_AMPDU_INI(scb_ampdu, tid); - if (ini->magic != INI_MAGIC) { - ini = wlc_ampdu_init_tid_ini(ampdu, scb_ampdu, tid, false); - } - return; -} - -int -wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, - struct sk_buff **pdu, int prec) -{ - struct wlc_info *wlc; - struct sk_buff *p, *pkt[AMPDU_MAX_MPDU]; - u8 tid, ndelim; - int err = 0; - u8 preamble_type = WLC_GF_PREAMBLE; - u8 fbr_preamble_type = WLC_GF_PREAMBLE; - u8 rts_preamble_type = WLC_LONG_PREAMBLE; - u8 rts_fbr_preamble_type = WLC_LONG_PREAMBLE; - - bool rr = true, fbr = false; - uint i, count = 0, fifo, seg_cnt = 0; - u16 plen, len, seq = 0, mcl, mch, index, frameid, dma_len = 0; - u32 ampdu_len, maxlen = 0; - d11txh_t *txh = NULL; - u8 *plcp; - struct ieee80211_hdr *h; - struct scb *scb; - scb_ampdu_t *scb_ampdu; - scb_ampdu_tid_ini_t *ini; - u8 mcs = 0; - bool use_rts = false, use_cts = false; - ratespec_t rspec = 0, rspec_fallback = 0; - ratespec_t rts_rspec = 0, rts_rspec_fallback = 0; - u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; - struct ieee80211_rts *rts; - u8 rr_retry_limit; - wlc_fifo_info_t *f; - bool fbr_iscck; - struct ieee80211_tx_info *tx_info; - u16 qlen; - struct wiphy *wiphy; - - wlc = ampdu->wlc; - wiphy = wlc->wiphy; - p = *pdu; - - tid = (u8) (p->priority); - - f = ampdu->fifo_tb + prio2fifo[tid]; - - scb = wlc->pub->global_scb; - scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - ini = &scb_ampdu->ini[tid]; - - /* Let pressure continue to build ... */ - qlen = pktq_plen(&qi->q, prec); - if (ini->tx_in_transit > 0 && qlen < scb_ampdu->max_pdu) { - return -EBUSY; - } - - wlc_ampdu_agg(ampdu, scb, p, tid); - - rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; - ampdu_len = 0; - dma_len = 0; - while (p) { - struct ieee80211_tx_rate *txrate; - - tx_info = IEEE80211_SKB_CB(p); - txrate = tx_info->status.rates; - - if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - err = wlc_prep_pdu(wlc, p, &fifo); - } else { - wiphy_err(wiphy, "%s: AMPDU flag is off!\n", __func__); - *pdu = NULL; - err = 0; - break; - } - - if (err) { - if (err == -EBUSY) { - wiphy_err(wiphy, "wl%d: wlc_sendampdu: " - "prep_xdu retry; seq 0x%x\n", - wlc->pub->unit, seq); - *pdu = p; - break; - } - - /* error in the packet; reject it */ - wiphy_err(wiphy, "wl%d: wlc_sendampdu: prep_xdu " - "rejected; seq 0x%x\n", wlc->pub->unit, seq); - *pdu = NULL; - break; - } - - /* pkt is good to be aggregated */ - txh = (d11txh_t *) p->data; - plcp = (u8 *) (txh + 1); - h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); - seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT; - index = TX_SEQ_TO_INDEX(seq); - - /* check mcl fields and test whether it can be agg'd */ - mcl = le16_to_cpu(txh->MacTxControlLow); - mcl &= ~TXC_AMPDU_MASK; - fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x3); - txh->PreloadSize = 0; /* always default to 0 */ - - /* Handle retry limits */ - if (txrate[0].count <= rr_retry_limit) { - txrate[0].count++; - rr = true; - fbr = false; - } else { - fbr = true; - rr = false; - txrate[1].count++; - } - - /* extract the length info */ - len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) - : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); - - /* retrieve null delimiter count */ - ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM]; - seg_cnt += 1; - - BCMMSG(wlc->wiphy, "wl%d: mpdu %d plcp_len %d\n", - wlc->pub->unit, count, len); - - /* - * aggregateable mpdu. For ucode/hw agg, - * test whether need to break or change the epoch - */ - if (count == 0) { - mcl |= (TXC_AMPDU_FIRST << TXC_AMPDU_SHIFT); - /* refill the bits since might be a retx mpdu */ - mcl |= TXC_STARTMSDU; - rts = (struct ieee80211_rts *)&txh->rts_frame; - - if (ieee80211_is_rts(rts->frame_control)) { - mcl |= TXC_SENDRTS; - use_rts = true; - } - if (ieee80211_is_cts(rts->frame_control)) { - mcl |= TXC_SENDCTS; - use_cts = true; - } - } else { - mcl |= (TXC_AMPDU_MIDDLE << TXC_AMPDU_SHIFT); - mcl &= ~(TXC_STARTMSDU | TXC_SENDRTS | TXC_SENDCTS); - } - - len = roundup(len, 4); - ampdu_len += (len + (ndelim + 1) * AMPDU_DELIMITER_LEN); - - dma_len += (u16) brcmu_pkttotlen(p); - - BCMMSG(wlc->wiphy, "wl%d: ampdu_len %d" - " seg_cnt %d null delim %d\n", - wlc->pub->unit, ampdu_len, seg_cnt, ndelim); - - txh->MacTxControlLow = cpu_to_le16(mcl); - - /* this packet is added */ - pkt[count++] = p; - - /* patch the first MPDU */ - if (count == 1) { - u8 plcp0, plcp3, is40, sgi; - struct ieee80211_sta *sta; - - sta = tx_info->control.sta; - - if (rr) { - plcp0 = plcp[0]; - plcp3 = plcp[3]; - } else { - plcp0 = txh->FragPLCPFallback[0]; - plcp3 = txh->FragPLCPFallback[3]; - - } - is40 = (plcp0 & MIMO_PLCP_40MHZ) ? 1 : 0; - sgi = PLCP3_ISSGI(plcp3) ? 1 : 0; - mcs = plcp0 & ~MIMO_PLCP_40MHZ; - maxlen = - min(scb_ampdu->max_rxlen, - ampdu->max_txlen[mcs][is40][sgi]); - - /* XXX Fix me to honor real max_rxlen */ - /* can fix this as soon as ampdu_action() in mac80211.h - * gets extra u8buf_size par */ - maxlen = 64 * 1024; - - if (is40) - mimo_ctlchbw = - CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) - ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; - - /* rebuild the rspec and rspec_fallback */ - rspec = RSPEC_MIMORATE; - rspec |= plcp[0] & ~MIMO_PLCP_40MHZ; - if (plcp[0] & MIMO_PLCP_40MHZ) - rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT); - - if (fbr_iscck) /* CCK */ - rspec_fallback = - CCK_RSPEC(CCK_PHY2MAC_RATE - (txh->FragPLCPFallback[0])); - else { /* MIMO */ - rspec_fallback = RSPEC_MIMORATE; - rspec_fallback |= - txh->FragPLCPFallback[0] & ~MIMO_PLCP_40MHZ; - if (txh->FragPLCPFallback[0] & MIMO_PLCP_40MHZ) - rspec_fallback |= - (PHY_TXC1_BW_40MHZ << - RSPEC_BW_SHIFT); - } - - if (use_rts || use_cts) { - rts_rspec = - wlc_rspec_to_rts_rspec(wlc, rspec, false, - mimo_ctlchbw); - rts_rspec_fallback = - wlc_rspec_to_rts_rspec(wlc, rspec_fallback, - false, mimo_ctlchbw); - } - } - - /* if (first mpdu for host agg) */ - /* test whether to add more */ - if ((MCS_RATE(mcs, true, false) >= f->dmaxferrate) && - (count == f->mcs2ampdu_table[mcs])) { - BCMMSG(wlc->wiphy, "wl%d: PR 37644: stopping" - " ampdu at %d for mcs %d\n", - wlc->pub->unit, count, mcs); - break; - } - - if (count == scb_ampdu->max_pdu) { - break; - } - - /* check to see if the next pkt is a candidate for aggregation */ - p = pktq_ppeek(&qi->q, prec); - tx_info = IEEE80211_SKB_CB(p); /* tx_info must be checked with current p */ - - if (p) { - if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && - ((u8) (p->priority) == tid)) { - - plen = brcmu_pkttotlen(p) + - AMPDU_MAX_MPDU_OVERHEAD; - plen = max(scb_ampdu->min_len, plen); - - if ((plen + ampdu_len) > maxlen) { - p = NULL; - wiphy_err(wiphy, "%s: Bogus plen #1\n", - __func__); - continue; - } - - /* check if there are enough descriptors available */ - if (TXAVAIL(wlc, fifo) <= (seg_cnt + 1)) { - wiphy_err(wiphy, "%s: No fifo space " - "!!\n", __func__); - p = NULL; - continue; - } - p = brcmu_pktq_pdeq(&qi->q, prec); - } else { - p = NULL; - } - } - } /* end while(p) */ - - ini->tx_in_transit += count; - - if (count) { - /* patch up the last txh */ - txh = (d11txh_t *) pkt[count - 1]->data; - mcl = le16_to_cpu(txh->MacTxControlLow); - mcl &= ~TXC_AMPDU_MASK; - mcl |= (TXC_AMPDU_LAST << TXC_AMPDU_SHIFT); - txh->MacTxControlLow = cpu_to_le16(mcl); - - /* remove the null delimiter after last mpdu */ - ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM]; - txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = 0; - ampdu_len -= ndelim * AMPDU_DELIMITER_LEN; - - /* remove the pad len from last mpdu */ - fbr_iscck = ((le16_to_cpu(txh->XtraFrameTypes) & 0x3) == 0); - len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) - : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); - ampdu_len -= roundup(len, 4) - len; - - /* patch up the first txh & plcp */ - txh = (d11txh_t *) pkt[0]->data; - plcp = (u8 *) (txh + 1); - - WLC_SET_MIMO_PLCP_LEN(plcp, ampdu_len); - /* mark plcp to indicate ampdu */ - WLC_SET_MIMO_PLCP_AMPDU(plcp); - - /* reset the mixed mode header durations */ - if (txh->MModeLen) { - u16 mmodelen = - wlc_calc_lsig_len(wlc, rspec, ampdu_len); - txh->MModeLen = cpu_to_le16(mmodelen); - preamble_type = WLC_MM_PREAMBLE; - } - if (txh->MModeFbrLen) { - u16 mmfbrlen = - wlc_calc_lsig_len(wlc, rspec_fallback, ampdu_len); - txh->MModeFbrLen = cpu_to_le16(mmfbrlen); - fbr_preamble_type = WLC_MM_PREAMBLE; - } - - /* set the preload length */ - if (MCS_RATE(mcs, true, false) >= f->dmaxferrate) { - dma_len = min(dma_len, f->ampdu_pld_size); - txh->PreloadSize = cpu_to_le16(dma_len); - } else - txh->PreloadSize = 0; - - mch = le16_to_cpu(txh->MacTxControlHigh); - - /* update RTS dur fields */ - if (use_rts || use_cts) { - u16 durid; - rts = (struct ieee80211_rts *)&txh->rts_frame; - if ((mch & TXC_PREAMBLE_RTS_MAIN_SHORT) == - TXC_PREAMBLE_RTS_MAIN_SHORT) - rts_preamble_type = WLC_SHORT_PREAMBLE; - - if ((mch & TXC_PREAMBLE_RTS_FB_SHORT) == - TXC_PREAMBLE_RTS_FB_SHORT) - rts_fbr_preamble_type = WLC_SHORT_PREAMBLE; - - durid = - wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec, - rspec, rts_preamble_type, - preamble_type, ampdu_len, - true); - rts->duration = cpu_to_le16(durid); - durid = wlc_compute_rtscts_dur(wlc, use_cts, - rts_rspec_fallback, - rspec_fallback, - rts_fbr_preamble_type, - fbr_preamble_type, - ampdu_len, true); - txh->RTSDurFallback = cpu_to_le16(durid); - /* set TxFesTimeNormal */ - txh->TxFesTimeNormal = rts->duration; - /* set fallback rate version of TxFesTimeNormal */ - txh->TxFesTimeFallback = txh->RTSDurFallback; - } - - /* set flag and plcp for fallback rate */ - if (fbr) { - mch |= TXC_AMPDU_FBR; - txh->MacTxControlHigh = cpu_to_le16(mch); - WLC_SET_MIMO_PLCP_AMPDU(plcp); - WLC_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback); - } - - BCMMSG(wlc->wiphy, "wl%d: count %d ampdu_len %d\n", - wlc->pub->unit, count, ampdu_len); - - /* inform rate_sel if it this is a rate probe pkt */ - frameid = le16_to_cpu(txh->TxFrameID); - if (frameid & TXFID_RATE_PROBE_MASK) { - wiphy_err(wiphy, "%s: XXX what to do with " - "TXFID_RATE_PROBE_MASK!?\n", __func__); - } - for (i = 0; i < count; i++) - wlc_txfifo(wlc, fifo, pkt[i], i == (count - 1), - ampdu->txpkt_weight); - - } - /* endif (count) */ - return err; -} - -void -wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs) -{ - scb_ampdu_t *scb_ampdu; - struct wlc_info *wlc = ampdu->wlc; - scb_ampdu_tid_ini_t *ini; - u32 s1 = 0, s2 = 0; - struct ieee80211_tx_info *tx_info; - - tx_info = IEEE80211_SKB_CB(p); - - /* BMAC_NOTE: For the split driver, second level txstatus comes later - * So if the ACK was received then wait for the second level else just - * call the first one - */ - if (txs->status & TX_STATUS_ACK_RCV) { - u8 status_delay = 0; - - /* wait till the next 8 bytes of txstatus is available */ - while (((s1 = R_REG(&wlc->regs->frmtxstatus)) & TXS_V) == 0) { - udelay(1); - status_delay++; - if (status_delay > 10) { - return; /* error condition */ - } - } - - s2 = R_REG(&wlc->regs->frmtxstatus2); - } - - if (likely(scb)) { - scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - ini = SCB_AMPDU_INI(scb_ampdu, p->priority); - wlc_ampdu_dotxstatus_complete(ampdu, scb, p, txs, s1, s2); - } else { - /* loop through all pkts and free */ - u8 queue = txs->frameid & TXFID_QUEUE_MASK; - d11txh_t *txh; - u16 mcl; - while (p) { - tx_info = IEEE80211_SKB_CB(p); - txh = (d11txh_t *) p->data; - mcl = le16_to_cpu(txh->MacTxControlLow); - brcmu_pkt_buf_free_skb(p); - /* break out if last packet of ampdu */ - if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == - TXC_AMPDU_LAST) - break; - p = GETNEXTTXP(wlc, queue); - } - wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); - } - wlc_ampdu_txflowcontrol(wlc, scb_ampdu, ini); -} - -static void -rate_status(struct wlc_info *wlc, struct ieee80211_tx_info *tx_info, - tx_status_t *txs, u8 mcs) -{ - struct ieee80211_tx_rate *txrate = tx_info->status.rates; - int i; - - /* clear the rest of the rates */ - for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) { - txrate[i].idx = -1; - txrate[i].count = 0; - } -} - -#define SHORTNAME "AMPDU status" - -static void -wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs, - u32 s1, u32 s2) -{ - scb_ampdu_t *scb_ampdu; - struct wlc_info *wlc = ampdu->wlc; - scb_ampdu_tid_ini_t *ini; - u8 bitmap[8], queue, tid; - d11txh_t *txh; - u8 *plcp; - struct ieee80211_hdr *h; - u16 seq, start_seq = 0, bindex, index, mcl; - u8 mcs = 0; - bool ba_recd = false, ack_recd = false; - u8 suc_mpdu = 0, tot_mpdu = 0; - uint supr_status; - bool update_rate = true, retry = true, tx_error = false; - u16 mimoantsel = 0; - u8 antselid = 0; - u8 retry_limit, rr_retry_limit; - struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(p); - struct wiphy *wiphy = wlc->wiphy; - -#ifdef BCMDBG - u8 hole[AMPDU_MAX_MPDU]; - memset(hole, 0, sizeof(hole)); -#endif - - scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - tid = (u8) (p->priority); - - ini = SCB_AMPDU_INI(scb_ampdu, tid); - retry_limit = ampdu->retry_limit_tid[tid]; - rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; - memset(bitmap, 0, sizeof(bitmap)); - queue = txs->frameid & TXFID_QUEUE_MASK; - supr_status = txs->status & TX_STATUS_SUPR_MASK; - - if (txs->status & TX_STATUS_ACK_RCV) { - if (TX_STATUS_SUPR_UF == supr_status) { - update_rate = false; - } - - WARN_ON(!(txs->status & TX_STATUS_INTERMEDIATE)); - start_seq = txs->sequence >> SEQNUM_SHIFT; - bitmap[0] = (txs->status & TX_STATUS_BA_BMAP03_MASK) >> - TX_STATUS_BA_BMAP03_SHIFT; - - WARN_ON(s1 & TX_STATUS_INTERMEDIATE); - WARN_ON(!(s1 & TX_STATUS_AMPDU)); - - bitmap[0] |= - (s1 & TX_STATUS_BA_BMAP47_MASK) << - TX_STATUS_BA_BMAP47_SHIFT; - bitmap[1] = (s1 >> 8) & 0xff; - bitmap[2] = (s1 >> 16) & 0xff; - bitmap[3] = (s1 >> 24) & 0xff; - - bitmap[4] = s2 & 0xff; - bitmap[5] = (s2 >> 8) & 0xff; - bitmap[6] = (s2 >> 16) & 0xff; - bitmap[7] = (s2 >> 24) & 0xff; - - ba_recd = true; - } else { - if (supr_status) { - update_rate = false; - if (supr_status == TX_STATUS_SUPR_BADCH) { - wiphy_err(wiphy, "%s: Pkt tx suppressed, " - "illegal channel possibly %d\n", - __func__, CHSPEC_CHANNEL( - wlc->default_bss->chanspec)); - } else { - if (supr_status != TX_STATUS_SUPR_FRAG) - wiphy_err(wiphy, "%s: wlc_ampdu_dotx" - "status:supr_status 0x%x\n", - __func__, supr_status); - } - /* no need to retry for badch; will fail again */ - if (supr_status == TX_STATUS_SUPR_BADCH || - supr_status == TX_STATUS_SUPR_EXPTIME) { - retry = false; - } else if (supr_status == TX_STATUS_SUPR_EXPTIME) { - /* TX underflow : try tuning pre-loading or ampdu size */ - } else if (supr_status == TX_STATUS_SUPR_FRAG) { - /* if there were underflows, but pre-loading is not active, - notify rate adaptation. - */ - if (wlc_ffpld_check_txfunfl(wlc, prio2fifo[tid]) - > 0) { - tx_error = true; - } - } - } else if (txs->phyerr) { - update_rate = false; - wiphy_err(wiphy, "wl%d: wlc_ampdu_dotxstatus: tx phy " - "error (0x%x)\n", wlc->pub->unit, - txs->phyerr); - - if (WL_ERROR_ON()) { - brcmu_prpkt("txpkt (AMPDU)", p); - wlc_print_txdesc((d11txh_t *) p->data); - } - wlc_print_txstatus(txs); - } - } - - /* loop through all pkts and retry if not acked */ - while (p) { - tx_info = IEEE80211_SKB_CB(p); - txh = (d11txh_t *) p->data; - mcl = le16_to_cpu(txh->MacTxControlLow); - plcp = (u8 *) (txh + 1); - h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); - seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT; - - if (tot_mpdu == 0) { - mcs = plcp[0] & MIMO_PLCP_MCS_MASK; - mimoantsel = le16_to_cpu(txh->ABI_MimoAntSel); - } - - index = TX_SEQ_TO_INDEX(seq); - ack_recd = false; - if (ba_recd) { - bindex = MODSUB_POW2(seq, start_seq, SEQNUM_MAX); - BCMMSG(wlc->wiphy, "tid %d seq %d," - " start_seq %d, bindex %d set %d, index %d\n", - tid, seq, start_seq, bindex, - isset(bitmap, bindex), index); - /* if acked then clear bit and free packet */ - if ((bindex < AMPDU_TX_BA_MAX_WSIZE) - && isset(bitmap, bindex)) { - ini->tx_in_transit--; - ini->txretry[index] = 0; - - /* ampdu_ack_len: number of acked aggregated frames */ - /* ampdu_len: number of aggregated frames */ - rate_status(wlc, tx_info, txs, mcs); - tx_info->flags |= IEEE80211_TX_STAT_ACK; - tx_info->flags |= IEEE80211_TX_STAT_AMPDU; - tx_info->status.ampdu_ack_len = - tx_info->status.ampdu_len = 1; - - skb_pull(p, D11_PHY_HDR_LEN); - skb_pull(p, D11_TXH_LEN); - - ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, - p); - ack_recd = true; - suc_mpdu++; - } - } - /* either retransmit or send bar if ack not recd */ - if (!ack_recd) { - struct ieee80211_tx_rate *txrate = - tx_info->status.rates; - if (retry && (txrate[0].count < (int)retry_limit)) { - ini->txretry[index]++; - ini->tx_in_transit--; - /* Use high prededence for retransmit to give some punch */ - /* wlc_txq_enq(wlc, scb, p, WLC_PRIO_TO_PREC(tid)); */ - wlc_txq_enq(wlc, scb, p, - WLC_PRIO_TO_HI_PREC(tid)); - } else { - /* Retry timeout */ - ini->tx_in_transit--; - ieee80211_tx_info_clear_status(tx_info); - tx_info->status.ampdu_ack_len = 0; - tx_info->status.ampdu_len = 1; - tx_info->flags |= - IEEE80211_TX_STAT_AMPDU_NO_BACK; - skb_pull(p, D11_PHY_HDR_LEN); - skb_pull(p, D11_TXH_LEN); - wiphy_err(wiphy, "%s: BA Timeout, seq %d, in_" - "transit %d\n", SHORTNAME, seq, - ini->tx_in_transit); - ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, - p); - } - } - tot_mpdu++; - - /* break out if last packet of ampdu */ - if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == - TXC_AMPDU_LAST) - break; - - p = GETNEXTTXP(wlc, queue); - } - wlc_send_q(wlc); - - /* update rate state */ - antselid = wlc_antsel_antsel2id(wlc->asi, mimoantsel); - - wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); -} - -/* initialize the initiator code for tid */ -static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, - scb_ampdu_t *scb_ampdu, - u8 tid, bool override) -{ - scb_ampdu_tid_ini_t *ini; - - /* check for per-tid control of ampdu */ - if (!ampdu->ini_enable[tid]) { - wiphy_err(ampdu->wlc->wiphy, "%s: Rejecting tid %d\n", - __func__, tid); - return NULL; - } - - ini = SCB_AMPDU_INI(scb_ampdu, tid); - ini->tid = tid; - ini->scb = scb_ampdu->scb; - ini->magic = INI_MAGIC; - return ini; -} - -static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on) -{ - struct wlc_info *wlc = ampdu->wlc; - - wlc->pub->_ampdu = false; - - if (on) { - if (!N_ENAB(wlc->pub)) { - wiphy_err(ampdu->wlc->wiphy, "wl%d: driver not " - "nmode enabled\n", wlc->pub->unit); - return -ENOTSUPP; - } - if (!wlc_ampdu_cap(ampdu)) { - wiphy_err(ampdu->wlc->wiphy, "wl%d: device not " - "ampdu capable\n", wlc->pub->unit); - return -ENOTSUPP; - } - wlc->pub->_ampdu = on; - } - - return 0; -} - -static bool wlc_ampdu_cap(struct ampdu_info *ampdu) -{ - if (WLC_PHY_11N_CAP(ampdu->wlc->band)) - return true; - else - return false; -} - -static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur) -{ - u32 rate, mcs; - - for (mcs = 0; mcs < MCS_TABLE_SIZE; mcs++) { - /* rate is in Kbps; dur is in msec ==> len = (rate * dur) / 8 */ - /* 20MHz, No SGI */ - rate = MCS_RATE(mcs, false, false); - ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3; - /* 40 MHz, No SGI */ - rate = MCS_RATE(mcs, true, false); - ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3; - /* 20MHz, SGI */ - rate = MCS_RATE(mcs, false, true); - ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3; - /* 40 MHz, SGI */ - rate = MCS_RATE(mcs, true, true); - ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3; - } -} - -void wlc_ampdu_macaddr_upd(struct wlc_info *wlc) -{ - char template[T_RAM_ACCESS_SZ * 2]; - - /* driver needs to write the ta in the template; ta is at offset 16 */ - memset(template, 0, sizeof(template)); - memcpy(template, wlc->pub->cur_etheraddr, ETH_ALEN); - wlc_write_template_ram(wlc, (T_BA_TPL_BASE + 16), (T_RAM_ACCESS_SZ * 2), - template); -} - -bool wlc_aggregatable(struct wlc_info *wlc, u8 tid) -{ - return wlc->ampdu->ini_enable[tid]; -} - -void wlc_ampdu_shm_upd(struct ampdu_info *ampdu) -{ - struct wlc_info *wlc = ampdu->wlc; - - /* Extend ucode internal watchdog timer to match larger received frames */ - if ((ampdu->rx_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) == - IEEE80211_HT_MAX_AMPDU_64K) { - wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX); - wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX); - } else { - wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF); - wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF); - } -} - -/* - * callback function that helps flushing ampdu packets from a priority queue - */ -static bool cb_del_ampdu_pkt(struct sk_buff *mpdu, void *arg_a) -{ - struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(mpdu); - struct cb_del_ampdu_pars *ampdu_pars = - (struct cb_del_ampdu_pars *)arg_a; - bool rc; - - rc = tx_info->flags & IEEE80211_TX_CTL_AMPDU ? true : false; - rc = rc && (tx_info->control.sta == NULL || ampdu_pars->sta == NULL || - tx_info->control.sta == ampdu_pars->sta); - rc = rc && ((u8)(mpdu->priority) == ampdu_pars->tid); - return rc; -} - -/* - * callback function that helps invalidating ampdu packets in a DMA queue - */ -static void dma_cb_fn_ampdu(void *txi, void *arg_a) -{ - struct ieee80211_sta *sta = arg_a; - struct ieee80211_tx_info *tx_info = (struct ieee80211_tx_info *)txi; - - if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && - (tx_info->control.sta == sta || sta == NULL)) - tx_info->control.sta = NULL; -} - -/* - * When a remote party is no longer available for ampdu communication, any - * pending tx ampdu packets in the driver have to be flushed. - */ -void wlc_ampdu_flush(struct wlc_info *wlc, - struct ieee80211_sta *sta, u16 tid) -{ - struct wlc_txq_info *qi = wlc->pkt_queue; - struct pktq *pq = &qi->q; - int prec; - struct cb_del_ampdu_pars ampdu_pars; - - ampdu_pars.sta = sta; - ampdu_pars.tid = tid; - for (prec = 0; prec < pq->num_prec; prec++) { - brcmu_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, - (void *)&du_pars); - } - wlc_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h deleted file mode 100644 index df7d7d9..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_AMPDU_H_ -#define _BRCM_AMPDU_H_ - -extern struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc); -extern void wlc_ampdu_detach(struct ampdu_info *ampdu); -extern int wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, - struct sk_buff **aggp, int prec); -extern void wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs); -extern void wlc_ampdu_macaddr_upd(struct wlc_info *wlc); -extern void wlc_ampdu_shm_upd(struct ampdu_info *ampdu); - -#endif /* _BRCM_AMPDU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c deleted file mode 100644 index 275369a..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ /dev/null @@ -1,322 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include - -#include -#include -#include - -#include -#include -#include -#include -#include "bcmdma.h" - -#include "d11.h" -#include "wlc_rate.h" -#include "wlc_key.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_bmac.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_antsel.h" - -#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ -#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ -#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ -#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ -#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ -#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ - -/* useful macros */ -#define WLC_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf) -#define WLC_ANTSEL_11N_1(ant) (((ant) & ANT_SELCFG_MASK) & 0xf) -#define WLC_ANTIDX_11N(ant) (((WLC_ANTSEL_11N_0(ant)) << 2) + (WLC_ANTSEL_11N_1(ant))) -#define WLC_ANT_ISAUTO_11N(ant) (((ant) & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) -#define WLC_ANTSEL_11N(ant) ((ant) & ANT_SELCFG_MASK) - -/* antenna switch */ -/* defines for no boardlevel antenna diversity */ -#define ANT_SELCFG_DEF_2x2 0x01 /* default antenna configuration */ - -/* 2x3 antdiv defines and tables for GPIO communication */ -#define ANT_SELCFG_NUM_2x3 3 -#define ANT_SELCFG_DEF_2x3 0x01 /* default antenna configuration */ - -/* 2x4 antdiv rev4 defines and tables for GPIO communication */ -#define ANT_SELCFG_NUM_2x4 4 -#define ANT_SELCFG_DEF_2x4 0x02 /* default antenna configuration */ - -/* static functions */ -static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel); -static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id); -static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg); -static void wlc_antsel_init_cfg(struct antsel_info *asi, - wlc_antselcfg_t *antsel, - bool auto_sel); - -const u16 mimo_2x4_div_antselpat_tbl[] = { - 0, 0, 0x9, 0xa, /* ant0: 0 ant1: 2,3 */ - 0, 0, 0x5, 0x6, /* ant0: 1 ant1: 2,3 */ - 0, 0, 0, 0, /* n.a. */ - 0, 0, 0, 0 /* n.a. */ -}; - -const u8 mimo_2x4_div_antselid_tbl[16] = { - 0, 0, 0, 0, 0, 2, 3, 0, - 0, 0, 1, 0, 0, 0, 0, 0 /* pat to antselid */ -}; - -const u16 mimo_2x3_div_antselpat_tbl[] = { - 16, 0, 1, 16, /* ant0: 0 ant1: 1,2 */ - 16, 16, 16, 16, /* n.a. */ - 16, 2, 16, 16, /* ant0: 2 ant1: 1 */ - 16, 16, 16, 16 /* n.a. */ -}; - -const u8 mimo_2x3_div_antselid_tbl[16] = { - 0, 1, 2, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 /* pat to antselid */ -}; - -struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc) -{ - struct antsel_info *asi; - - asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC); - if (!asi) { - wiphy_err(wlc->wiphy, "wl%d: wlc_antsel_attach: out of mem\n", - wlc->pub->unit); - return NULL; - } - - asi->wlc = wlc; - asi->pub = wlc->pub; - asi->antsel_type = ANTSEL_NA; - asi->antsel_avail = false; - asi->antsel_antswitch = (u8) getintvar(asi->pub->vars, "antswitch"); - - if ((asi->pub->sromrev >= 4) && (asi->antsel_antswitch != 0)) { - switch (asi->antsel_antswitch) { - case ANTSWITCH_TYPE_1: - case ANTSWITCH_TYPE_2: - case ANTSWITCH_TYPE_3: - /* 4321/2 board with 2x3 switch logic */ - asi->antsel_type = ANTSEL_2x3; - /* Antenna selection availability */ - if (((u16) getintvar(asi->pub->vars, "aa2g") == 7) || - ((u16) getintvar(asi->pub->vars, "aa5g") == 7)) { - asi->antsel_avail = true; - } else - if (((u16) getintvar(asi->pub->vars, "aa2g") == - 3) - || ((u16) getintvar(asi->pub->vars, "aa5g") - == 3)) { - asi->antsel_avail = false; - } else { - asi->antsel_avail = false; - wiphy_err(wlc->wiphy, "wlc_antsel_attach: 2o3 " - "board cfg invalid\n"); - } - break; - default: - break; - } - } else if ((asi->pub->sromrev == 4) && - ((u16) getintvar(asi->pub->vars, "aa2g") == 7) && - ((u16) getintvar(asi->pub->vars, "aa5g") == 0)) { - /* hack to match old 4321CB2 cards with 2of3 antenna switch */ - asi->antsel_type = ANTSEL_2x3; - asi->antsel_avail = true; - } else if (asi->pub->boardflags2 & BFL2_2X4_DIV) { - asi->antsel_type = ANTSEL_2x4; - asi->antsel_avail = true; - } - - /* Set the antenna selection type for the low driver */ - wlc_bmac_antsel_type_set(wlc->hw, asi->antsel_type); - - /* Init (auto/manual) antenna selection */ - wlc_antsel_init_cfg(asi, &asi->antcfg_11n, true); - wlc_antsel_init_cfg(asi, &asi->antcfg_cur, true); - - return asi; -} - -void wlc_antsel_detach(struct antsel_info *asi) -{ - kfree(asi); -} - -void wlc_antsel_init(struct antsel_info *asi) -{ - if ((asi->antsel_type == ANTSEL_2x3) || - (asi->antsel_type == ANTSEL_2x4)) - wlc_antsel_cfgupd(asi, &asi->antcfg_11n); -} - -/* boardlevel antenna selection: init antenna selection structure */ -static void -wlc_antsel_init_cfg(struct antsel_info *asi, wlc_antselcfg_t *antsel, - bool auto_sel) -{ - if (asi->antsel_type == ANTSEL_2x3) { - u8 antcfg_def = ANT_SELCFG_DEF_2x3 | - ((asi->antsel_avail && auto_sel) ? ANT_SELCFG_AUTO : 0); - antsel->ant_config[ANT_SELCFG_TX_DEF] = antcfg_def; - antsel->ant_config[ANT_SELCFG_TX_UNICAST] = antcfg_def; - antsel->ant_config[ANT_SELCFG_RX_DEF] = antcfg_def; - antsel->ant_config[ANT_SELCFG_RX_UNICAST] = antcfg_def; - antsel->num_antcfg = ANT_SELCFG_NUM_2x3; - - } else if (asi->antsel_type == ANTSEL_2x4) { - - antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x4; - antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x4; - antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x4; - antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x4; - antsel->num_antcfg = ANT_SELCFG_NUM_2x4; - - } else { /* no antenna selection available */ - - antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x2; - antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x2; - antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x2; - antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x2; - antsel->num_antcfg = 0; - } -} - -void -wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, - u8 antselid, u8 fbantselid, u8 *antcfg, - u8 *fbantcfg) -{ - u8 ant; - - /* if use default, assign it and return */ - if (usedef) { - *antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_DEF]; - *fbantcfg = *antcfg; - return; - } - - if (!sel) { - *antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; - *fbantcfg = *antcfg; - - } else { - ant = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; - if ((ant & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) { - *antcfg = wlc_antsel_id2antcfg(asi, antselid); - *fbantcfg = wlc_antsel_id2antcfg(asi, fbantselid); - } else { - *antcfg = - asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; - *fbantcfg = *antcfg; - } - } - return; -} - -/* boardlevel antenna selection: convert mimo_antsel (ucode interface) to id */ -u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel) -{ - u8 antselid = 0; - - if (asi->antsel_type == ANTSEL_2x4) { - /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ - antselid = mimo_2x4_div_antselid_tbl[(antsel & 0xf)]; - return antselid; - - } else if (asi->antsel_type == ANTSEL_2x3) { - /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ - antselid = mimo_2x3_div_antselid_tbl[(antsel & 0xf)]; - return antselid; - } - - return antselid; -} - -/* boardlevel antenna selection: convert id to ant_cfg */ -static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id) -{ - u8 antcfg = ANT_SELCFG_DEF_2x2; - - if (asi->antsel_type == ANTSEL_2x4) { - /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ - antcfg = (((id & 0x2) << 3) | ((id & 0x1) + 2)); - return antcfg; - - } else if (asi->antsel_type == ANTSEL_2x3) { - /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ - antcfg = (((id & 0x02) << 4) | ((id & 0x1) + 1)); - return antcfg; - } - - return antcfg; -} - -/* boardlevel antenna selection: convert ant_cfg to mimo_antsel (ucode interface) */ -static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg) -{ - u8 idx = WLC_ANTIDX_11N(WLC_ANTSEL_11N(ant_cfg)); - u16 mimo_antsel = 0; - - if (asi->antsel_type == ANTSEL_2x4) { - /* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */ - mimo_antsel = (mimo_2x4_div_antselpat_tbl[idx] & 0xf); - return mimo_antsel; - - } else if (asi->antsel_type == ANTSEL_2x3) { - /* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */ - mimo_antsel = (mimo_2x3_div_antselpat_tbl[idx] & 0xf); - return mimo_antsel; - } - - return mimo_antsel; -} - -/* boardlevel antenna selection: ucode interface control */ -static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel) -{ - struct wlc_info *wlc = asi->wlc; - u8 ant_cfg; - u16 mimo_antsel; - - /* 1) Update TX antconfig for all frames that are not unicast data - * (aka default TX) - */ - ant_cfg = antsel->ant_config[ANT_SELCFG_TX_DEF]; - mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); - wlc_write_shm(wlc, M_MIMO_ANTSEL_TXDFLT, mimo_antsel); - /* Update driver stats for currently selected default tx/rx antenna config */ - asi->antcfg_cur.ant_config[ANT_SELCFG_TX_DEF] = ant_cfg; - - /* 2) Update RX antconfig for all frames that are not unicast data - * (aka default RX) - */ - ant_cfg = antsel->ant_config[ANT_SELCFG_RX_DEF]; - mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); - wlc_write_shm(wlc, M_MIMO_ANTSEL_RXDFLT, mimo_antsel); - /* Update driver stats for currently selected default tx/rx antenna config */ - asi->antcfg_cur.ant_config[ANT_SELCFG_RX_DEF] = ant_cfg; - - return 0; -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h deleted file mode 100644 index c1b9cef..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_ANTSEL_H_ -#define _BRCM_ANTSEL_H_ - -extern struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc); -extern void wlc_antsel_detach(struct antsel_info *asi); -extern void wlc_antsel_init(struct antsel_info *asi); -extern void wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, - bool sel, - u8 id, u8 fbid, u8 *antcfg, - u8 *fbantcfg); -extern u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel); - -#endif /* _BRCM_ANTSEL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c deleted file mode 100644 index 06d03b6..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ /dev/null @@ -1,3599 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wlc_types.h" -#include "wlc_pmu.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "ucode_loader.h" -#include "wlc_antsel.h" -#include "wlc_alloc.h" -#include "wlc_bmac.h" -#include "brcms_mac80211.h" - -#define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ - -#define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */ -#define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us, default */ -#define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us, default */ -#define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */ - -#define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ - -#ifndef BMAC_DUP_TO_REMOVE -#define WLC_RM_WAIT_TX_SUSPEND 4 /* Wait Tx Suspend */ - -#define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ - -#endif /* BMAC_DUP_TO_REMOVE */ - -#define DMAREG(wlc_hw, direction, fifonum) \ - ((direction == DMA_TX) ? \ - (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ - (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) - -#define APHY_SLOT_TIME 9 -#define BPHY_SLOT_TIME 20 - -/* - * The following table lists the buffer memory allocated to xmt fifos in HW. - * the size is in units of 256bytes(one block), total size is HW dependent - * ucode has default fifo partition, sw can overwrite if necessary - * - * This is documented in twiki under the topic UcodeTxFifo. Please ensure - * the twiki is updated before making changes. - */ - -#define XMTFIFOTBL_STARTREV 20 /* Starting corerev for the fifo size table */ - -static u16 xmtfifo_sz[][NFIFO] = { - {20, 192, 192, 21, 17, 5}, /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ - {9, 58, 22, 14, 14, 5}, /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ - {20, 192, 192, 21, 17, 5}, /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ - {20, 192, 192, 21, 17, 5}, /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ - {9, 58, 22, 14, 14, 5}, /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ -}; - -static void wlc_clkctl_clk(struct wlc_hw_info *wlc, uint mode); -static void wlc_coreinit(struct wlc_info *wlc); - -/* used by wlc_wakeucode_init() */ -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, - const struct d11init *inits); -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], - const uint nbytes); -static void wlc_ucode_download(struct wlc_hw_info *wlc); -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); - -/* used by wlc_dpc() */ -static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, - u32 s2); -static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); -static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); - -/* used by wlc_down() */ -static void wlc_flushqueues(struct wlc_info *wlc); - -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs); -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw); -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, - uint tx_fifo); -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo); -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo); - -/* Low Level Prototypes */ -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want); -static u16 wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, - u32 sel); -static void wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, - u16 v, u32 sel); -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk); -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme); -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_bsinit(struct wlc_hw_info *wlc_hw); -static bool wlc_validboardtype(struct wlc_hw_info *wlc); -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw); -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw); -static void wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init); -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool want, mbool flags); -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw); -static u32 wlc_wlintrsoff(struct wlc_info *wlc); -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask); -static void wlc_gpio_init(struct wlc_info *wlc); -static void wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_bmac_bsinit(struct wlc_info *wlc, chanspec_t chanspec); -static u32 wlc_setband_inact(struct wlc_info *wlc, uint bandunit); -static void wlc_bmac_setband(struct wlc_hw_info *wlc_hw, uint bandunit, - chanspec_t chanspec); -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, - bool shortslot); -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw); -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, - u8 rate); - -/* === Low Level functions === */ - -void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) -{ - wlc_hw->shortslot = shortslot; - - if (BAND_2G(wlc_bmac_bandtype(wlc_hw)) && wlc_hw->up) { - wlc_suspend_mac_and_wait(wlc_hw->wlc); - wlc_bmac_update_slot_timing(wlc_hw, shortslot); - wlc_enable_mac(wlc_hw->wlc); - } -} - -/* - * Update the slot timing for standard 11b/g (20us slots) - * or shortslot 11g (9us slots) - * The PSM needs to be suspended for this call. - */ -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, - bool shortslot) -{ - d11regs_t *regs; - - regs = wlc_hw->regs; - - if (shortslot) { - /* 11g short slot: 11a timing */ - W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); - } else { - /* 11g long slot: 11b timing */ - W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); - } -} - -static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) -{ - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - /* init microcode host flags */ - wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs); - - /* do band-specific ucode IHR, SHM, and SCR inits */ - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11n0bsinitvals16); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } - } else { - if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0bsinitvals24); - } else - wiphy_err(wiphy, "%s: wl%d: unsupported phy in" - " core rev %d\n", __func__, - wlc_hw->unit, wlc_hw->corerev); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - } -} - -/* switch to new band but leave it inactive */ -static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintmask; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); - - /* disable interrupts */ - macintmask = brcms_intrsoff(wlc->wl); - - /* radio off */ - wlc_phy_switch_radio(wlc_hw->band->pi, OFF); - - wlc_bmac_core_phy_clk(wlc_hw, OFF); - - wlc_setxband(wlc_hw, bandunit); - - return macintmask; -} - -/* Process received frames */ -/* - * Return true if more frames need to be processed. false otherwise. - * Param 'bound' indicates max. # frames to process before break out. - */ -static bool -wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) -{ - struct sk_buff *p; - struct sk_buff *head = NULL; - struct sk_buff *tail = NULL; - uint n = 0; - uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; - wlc_d11rxhdr_t *wlc_rxhdr = NULL; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - /* gather received frames */ - while ((p = dma_rx(wlc_hw->di[fifo]))) { - - if (!tail) - head = tail = p; - else { - tail->prev = p; - tail = p; - } - - /* !give others some time to run! */ - if (++n >= bound_limit) - break; - } - - /* post more rbufs */ - dma_rxfill(wlc_hw->di[fifo]); - - /* process each frame */ - while ((p = head) != NULL) { - head = head->prev; - p->prev = NULL; - - wlc_rxhdr = (wlc_d11rxhdr_t *) p->data; - - /* compute the RSSI from d11rxhdr and record it in wlc_rxd11hr */ - wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); - - wlc_recv(wlc_hw->wlc, p); - } - - return n >= bound_limit; -} - -/* second-level interrupt processing - * Return true if another dpc needs to be re-scheduled. false otherwise. - * Param 'bounded' indicates if applicable loops should be bounded. - */ -bool wlc_dpc(struct wlc_info *wlc, bool bounded) -{ - u32 macintstatus; - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - bool fatal = false; - struct wiphy *wiphy = wlc->wiphy; - - if (DEVICEREMOVED(wlc)) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return false; - } - - /* grab and clear the saved software intstatus bits */ - macintstatus = wlc->macintstatus; - wlc->macintstatus = 0; - - BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", - wlc_hw->unit, macintstatus); - - WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ - - /* BCN template is available */ - /* ZZZ: Use AP_ACTIVE ? */ - if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) - && (macintstatus & MI_BCNTPL)) { - wlc_update_beacon(wlc); - } - - /* PMQ entry addition */ - if (macintstatus & MI_PMQ) { - } - - /* tx status */ - if (macintstatus & MI_TFS) { - if (wlc_bmac_txstatus(wlc->hw, bounded, &fatal)) - wlc->macintstatus |= MI_TFS; - if (fatal) { - wiphy_err(wiphy, "MI_TFS: fatal\n"); - goto fatal; - } - } - - if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) - wlc_tbtt(wlc, regs); - - /* ATIM window end */ - if (macintstatus & MI_ATIMWINEND) { - BCMMSG(wlc->wiphy, "end of ATIM window\n"); - OR_REG(®s->maccommand, wlc->qvalid); - wlc->qvalid = 0; - } - - /* received data or control frame, MI_DMAINT is indication of RX_FIFO interrupt */ - if (macintstatus & MI_DMAINT) { - if (wlc_bmac_recv(wlc_hw, RX_FIFO, bounded)) { - wlc->macintstatus |= MI_DMAINT; - } - } - - /* TX FIFO suspend/flush completion */ - if (macintstatus & MI_TXSTOP) { - if (wlc_bmac_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO)) { - /* wiphy_err(wiphy, "dpc: fifo_suspend_comlete\n"); */ - } - } - - /* noise sample collected */ - if (macintstatus & MI_BG_NOISE) { - wlc_phy_noise_sample_intr(wlc_hw->band->pi); - } - - if (macintstatus & MI_GP0) { - wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " - "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); - - printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", - __func__, wlc_hw->sih->chip, - wlc_hw->sih->chiprev); - /* big hammer */ - brcms_init(wlc->wl); - } - - /* gptimer timeout */ - if (macintstatus & MI_TO) { - W_REG(®s->gptimer, 0); - } - - if (macintstatus & MI_RFDISABLE) { - BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" - " RF Disable Input\n", wlc_hw->unit); - brcms_rfkill_set_hw_state(wlc->wl); - } - - /* send any enq'd tx packets. Just makes sure to jump start tx */ - if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); - - /* it isn't done and needs to be resched if macintstatus is non-zero */ - return wlc->macintstatus != 0; - - fatal: - brcms_init(wlc->wl); - return wlc->macintstatus != 0; -} - -/* common low-level watchdog code */ -void wlc_bmac_watchdog(void *arg) -{ - struct wlc_info *wlc = (struct wlc_info *) arg; - struct wlc_hw_info *wlc_hw = wlc->hw; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return; - - /* increment second count */ - wlc_hw->now++; - - /* Check for FIFO error interrupts */ - wlc_bmac_fifoerrors(wlc_hw); - - /* make sure RX dma has buffers */ - dma_rxfill(wlc->hw->di[RX_FIFO]); - - wlc_phy_watchdog(wlc_hw->band->pi); -} - -void -wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute, struct txpwr_limits *txpwr) -{ - uint bandunit; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); - - wlc_hw->chanspec = chanspec; - - /* Switch bands if necessary */ - if (NBANDS_HW(wlc_hw) > 1) { - bandunit = CHSPEC_WLCBANDUNIT(chanspec); - if (wlc_hw->band->bandunit != bandunit) { - /* wlc_bmac_setband disables other bandunit, - * use light band switch if not up yet - */ - if (wlc_hw->up) { - wlc_phy_chanspec_radio_set(wlc_hw-> - bandstate[bandunit]-> - pi, chanspec); - wlc_bmac_setband(wlc_hw, bandunit, chanspec); - } else { - wlc_setxband(wlc_hw, bandunit); - } - } - } - - wlc_phy_initcal_enable(wlc_hw->band->pi, !mute); - - if (!wlc_hw->up) { - if (wlc_hw->clk) - wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, - chanspec); - wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); - } else { - wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); - wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); - - /* Update muting of the channel */ - wlc_bmac_mute(wlc_hw, mute, 0); - } -} - -int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, wlc_bmac_state_t *state) -{ - state->machwcap = wlc_hw->machwcap; - - return 0; -} - -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) -{ - uint i; - char name[8]; - /* ucode host flag 2 needed for pio mode, independent of band and fifo */ - u16 pio_mhf2 = 0; - struct wlc_hw_info *wlc_hw = wlc->hw; - uint unit = wlc_hw->unit; - wlc_tunables_t *tune = wlc->pub->tunables; - struct wiphy *wiphy = wlc->wiphy; - - /* name and offsets for dma_attach */ - snprintf(name, sizeof(name), "wl%d", unit); - - if (wlc_hw->di[0] == 0) { /* Init FIFOs */ - uint addrwidth; - int dma_attach_err = 0; - /* Find out the DMA addressing capability and let OS know - * All the channels within one DMA core have 'common-minimum' same - * capability - */ - addrwidth = - dma_addrwidth(wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 0)); - - if (!wl_alloc_dma_resources(wlc_hw->wlc->wl, addrwidth)) { - wiphy_err(wiphy, "wl%d: wlc_attach: alloc_dma_" - "resources failed\n", unit); - return false; - } - - /* - * FIFO 0 - * TX: TX_AC_BK_FIFO (TX AC Background data packets) - * RX: RX_FIFO (RX data packets) - */ - wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, - (wme ? DMAREG(wlc_hw, DMA_TX, 0) : - NULL), DMAREG(wlc_hw, DMA_RX, 0), - (wme ? tune->ntxd : 0), tune->nrxd, - tune->rxbufsz, -1, tune->nrxbufpost, - WL_HWRXOFF, &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[0]); - - /* - * FIFO 1 - * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) - * (legacy) TX_DATA_FIFO (TX data packets) - * RX: UNUSED - */ - wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 1), NULL, - tune->ntxd, 0, 0, -1, 0, 0, - &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[1]); - - /* - * FIFO 2 - * TX: TX_AC_VI_FIFO (TX AC Video data packets) - * RX: UNUSED - */ - wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 2), NULL, - tune->ntxd, 0, 0, -1, 0, 0, - &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[2]); - /* - * FIFO 3 - * TX: TX_AC_VO_FIFO (TX AC Voice data packets) - * (legacy) TX_CTL_FIFO (TX control & mgmt packets) - */ - wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 3), - NULL, tune->ntxd, 0, 0, -1, - 0, 0, &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[3]); -/* Cleaner to leave this as if with AP defined */ - - if (dma_attach_err) { - wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" - "\n", unit); - return false; - } - - /* get pointer to dma engine tx flow control variable */ - for (i = 0; i < NFIFO; i++) - if (wlc_hw->di[i]) - wlc_hw->txavail[i] = - (uint *) dma_getvar(wlc_hw->di[i], - "&txavail"); - } - - /* initial ucode host flags */ - wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); - - return true; -} - -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) -{ - uint j; - - for (j = 0; j < NFIFO; j++) { - if (wlc_hw->di[j]) { - dma_detach(wlc_hw->di[j]); - wlc_hw->di[j] = NULL; - } - } -} - -/* low level attach - * run backplane attach, init nvram - * run phy attach - * initialize software state for each core and band - * put the whole chip in reset(driver down state), no clock - */ -int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam) -{ - struct wlc_hw_info *wlc_hw; - d11regs_t *regs; - char *macaddr = NULL; - char *vars; - uint err = 0; - uint j; - bool wme = false; - shared_phy_params_t sha_params; - struct wiphy *wiphy = wlc->wiphy; - - BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, - device); - - wme = true; - - wlc_hw = wlc->hw; - wlc_hw->wlc = wlc; - wlc_hw->unit = unit; - wlc_hw->band = wlc_hw->bandstate[0]; - wlc_hw->_piomode = piomode; - - /* populate struct wlc_hw_info with default values */ - wlc_bmac_info_init(wlc_hw); - - /* - * Do the hardware portion of the attach. - * Also initialize software state that depends on the particular hardware - * we are running. - */ - wlc_hw->sih = ai_attach((uint) device, regsva, bustype, btparam, - &wlc_hw->vars, &wlc_hw->vars_size); - if (wlc_hw->sih == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: si_attach failed\n", - unit); - err = 11; - goto fail; - } - vars = wlc_hw->vars; - - /* - * Get vendid/devid nvram overwrites, which could be different - * than those the BIOS recognizes for devices on PCMCIA_BUS, - * SDIO_BUS, and SROMless devices on PCI_BUS. - */ -#ifdef BCMBUSTYPE - bustype = BCMBUSTYPE; -#endif - if (bustype != SI_BUS) { - char *var; - - var = getvar(vars, "vendid"); - if (var) { - vendor = (u16) simple_strtoul(var, NULL, 0); - wiphy_err(wiphy, "Overriding vendor id = 0x%x\n", - vendor); - } - var = getvar(vars, "devid"); - if (var) { - u16 devid = (u16) simple_strtoul(var, NULL, 0); - if (devid != 0xffff) { - device = devid; - wiphy_err(wiphy, "Overriding device id = 0x%x" - "\n", device); - } - } - - /* verify again the device is supported */ - if (!wlc_chipmatch(vendor, device)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported " - "vendor/device (0x%x/0x%x)\n", - unit, vendor, device); - err = 12; - goto fail; - } - } - - wlc_hw->vendorid = vendor; - wlc_hw->deviceid = device; - - /* set bar0 window to point at D11 core */ - wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); - wlc_hw->corerev = ai_corerev(wlc_hw->sih); - - regs = wlc_hw->regs; - - wlc->regs = wlc_hw->regs; - - /* validate chip, chiprev and corerev */ - if (!wlc_isgoodchip(wlc_hw)) { - err = 13; - goto fail; - } - - /* initialize power control registers */ - ai_clkctl_init(wlc_hw->sih); - - /* request fastclock and force fastclock for the rest of attach - * bring the d11 core out of reset. - * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk is still false; - * But it will be called again inside wlc_corereset, after d11 is out of reset. - */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - if (!wlc_bmac_validate_chip_access(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: validate_chip_access " - "failed\n", unit); - err = 14; - goto fail; - } - - /* get the board rev, used just below */ - j = getintvar(vars, "boardrev"); - /* promote srom boardrev of 0xFF to 1 */ - if (j == BOARDREV_PROMOTABLE) - j = BOARDREV_PROMOTED; - wlc_hw->boardrev = (u16) j; - if (!wlc_validboardtype(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported Broadcom " - "board type (0x%x)" " or revision level (0x%x)\n", - unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); - err = 15; - goto fail; - } - wlc_hw->sromrev = (u8) getintvar(vars, "sromrev"); - wlc_hw->boardflags = (u32) getintvar(vars, "boardflags"); - wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); - - if (wlc_hw->boardflags & BFL_NOPLLDOWN) - wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED); - - if ((wlc_hw->sih->bustype == PCI_BUS) - && (ai_pci_war16165(wlc_hw->sih))) - wlc->war16165 = true; - - /* check device id(srom, nvram etc.) to set bands */ - if (wlc_hw->deviceid == BCM43224_D11N_ID || - wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { - /* Dualband boards */ - wlc_hw->_nbands = 2; - } else - wlc_hw->_nbands = 1; - - if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) - wlc_hw->_nbands = 1; - - /* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the - * init of these values - */ - wlc->vendorid = wlc_hw->vendorid; - wlc->deviceid = wlc_hw->deviceid; - wlc->pub->sih = wlc_hw->sih; - wlc->pub->corerev = wlc_hw->corerev; - wlc->pub->sromrev = wlc_hw->sromrev; - wlc->pub->boardrev = wlc_hw->boardrev; - wlc->pub->boardflags = wlc_hw->boardflags; - wlc->pub->boardflags2 = wlc_hw->boardflags2; - wlc->pub->_nbands = wlc_hw->_nbands; - - wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); - - if (wlc_hw->physhim == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_shim_attach " - "failed\n", unit); - err = 25; - goto fail; - } - - /* pass all the parameters to wlc_phy_shared_attach in one struct */ - sha_params.sih = wlc_hw->sih; - sha_params.physhim = wlc_hw->physhim; - sha_params.unit = unit; - sha_params.corerev = wlc_hw->corerev; - sha_params.vars = vars; - sha_params.vid = wlc_hw->vendorid; - sha_params.did = wlc_hw->deviceid; - sha_params.chip = wlc_hw->sih->chip; - sha_params.chiprev = wlc_hw->sih->chiprev; - sha_params.chippkg = wlc_hw->sih->chippkg; - sha_params.sromrev = wlc_hw->sromrev; - sha_params.boardtype = wlc_hw->sih->boardtype; - sha_params.boardrev = wlc_hw->boardrev; - sha_params.boardvendor = wlc_hw->sih->boardvendor; - sha_params.boardflags = wlc_hw->boardflags; - sha_params.boardflags2 = wlc_hw->boardflags2; - sha_params.bustype = wlc_hw->sih->bustype; - sha_params.buscorerev = wlc_hw->sih->buscorerev; - - /* alloc and save pointer to shared phy state area */ - wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); - if (!wlc_hw->phy_sh) { - err = 16; - goto fail; - } - - /* initialize software state for each core and band */ - for (j = 0; j < NBANDS_HW(wlc_hw); j++) { - /* - * band0 is always 2.4Ghz - * band1, if present, is 5Ghz - */ - - /* So if this is a single band 11a card, use band 1 */ - if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) - j = BAND_5G_INDEX; - - wlc_setxband(wlc_hw, j); - - wlc_hw->band->bandunit = j; - wlc_hw->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; - wlc->band->bandunit = j; - wlc->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; - wlc->core->coreidx = ai_coreidx(wlc_hw->sih); - - wlc_hw->machwcap = R_REG(®s->machwcap); - wlc_hw->machwcap_backup = wlc_hw->machwcap; - - /* init tx fifo size */ - wlc_hw->xmtfifo_sz = - xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; - - /* Get a phy for this band */ - wlc_hw->band->pi = wlc_phy_attach(wlc_hw->phy_sh, - (void *)regs, wlc_bmac_bandtype(wlc_hw), vars, - wlc->wiphy); - if (wlc_hw->band->pi == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_" - "attach failed\n", unit); - err = 17; - goto fail; - } - - wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); - - wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, - &wlc_hw->band->phyrev, - &wlc_hw->band->radioid, - &wlc_hw->band->radiorev); - wlc_hw->band->abgphy_encore = - wlc_phy_get_encore(wlc_hw->band->pi); - wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); - wlc_hw->band->core_flags = - wlc_phy_get_coreflags(wlc_hw->band->pi); - - /* verify good phy_type & supported phy revision */ - if (WLCISNPHY(wlc_hw->band)) { - if (NCONF_HAS(wlc_hw->band->phyrev)) - goto good_phy; - else - goto bad_phy; - } else if (WLCISLCNPHY(wlc_hw->band)) { - if (LCNCONF_HAS(wlc_hw->band->phyrev)) - goto good_phy; - else - goto bad_phy; - } else { - bad_phy: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: unsupported " - "phy type/rev (%d/%d)\n", unit, - wlc_hw->band->phytype, wlc_hw->band->phyrev); - err = 18; - goto fail; - } - - good_phy: - /* BMAC_NOTE: wlc->band->pi should not be set below and should be done in the - * high level attach. However we can not make that change until all low level access - * is changed to wlc_hw->band->pi. Instead do the wlc->band->pi init below, keeping - * wlc_hw->band->pi as well for incremental update of low level fns, and cut over - * low only init when all fns updated. - */ - wlc->band->pi = wlc_hw->band->pi; - wlc->band->phytype = wlc_hw->band->phytype; - wlc->band->phyrev = wlc_hw->band->phyrev; - wlc->band->radioid = wlc_hw->band->radioid; - wlc->band->radiorev = wlc_hw->band->radiorev; - - /* default contention windows size limits */ - wlc_hw->band->CWmin = APHY_CWMIN; - wlc_hw->band->CWmax = PHY_CWMAX; - - if (!wlc_bmac_attach_dmapio(wlc, j, wme)) { - err = 19; - goto fail; - } - } - - /* disable core to match driver "down" state */ - wlc_coredisable(wlc_hw); - - /* Match driver "down" state */ - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - - /* register sb interrupt callback functions */ - ai_register_intr_callback(wlc_hw->sih, (void *)wlc_wlintrsoff, - (void *)wlc_wlintrsrestore, NULL, wlc); - - /* turn off pll and xtal to match driver "down" state */ - wlc_bmac_xtal(wlc_hw, OFF); - - /* ********************************************************************* - * The hardware is in the DOWN state at this point. D11 core - * or cores are in reset with clocks off, and the board PLLs - * are off if possible. - * - * Beyond this point, wlc->sbclk == false and chip registers - * should not be touched. - ********************************************************************* - */ - - /* init etheraddr state variables */ - macaddr = wlc_get_macaddr(wlc_hw); - if (macaddr == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: macaddr not found\n", - unit); - err = 21; - goto fail; - } - brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); - if (is_broadcast_ether_addr(wlc_hw->etheraddr) || - is_zero_ether_addr(wlc_hw->etheraddr)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", - unit, macaddr); - err = 22; - goto fail; - } - - BCMMSG(wlc->wiphy, - "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", - wlc_hw->deviceid, wlc_hw->_nbands, - wlc_hw->sih->boardtype, macaddr); - - return err; - - fail: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: failed with err %d\n", unit, - err); - return err; -} - -/* - * Initialize wlc_info default values ... - * may get overrides later in this function - * BMAC_NOTES, move low out and resolve the dangling ones - */ -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) -{ - struct wlc_info *wlc = wlc_hw->wlc; - - /* set default sw macintmask value */ - wlc->defmacintmask = DEF_MACINTMASK; - - /* various 802.11g modes */ - wlc_hw->shortslot = false; - - wlc_hw->SFBL = RETRY_SHORT_FB; - wlc_hw->LFBL = RETRY_LONG_FB; - - /* default mac retry limits */ - wlc_hw->SRL = RETRY_SHORT_DEF; - wlc_hw->LRL = RETRY_LONG_DEF; - wlc_hw->chanspec = CH20MHZ_CHSPEC(1); -} - -/* - * low level detach - */ -int wlc_bmac_detach(struct wlc_info *wlc) -{ - uint i; - struct wlc_hwband *band; - struct wlc_hw_info *wlc_hw = wlc->hw; - int callbacks; - - callbacks = 0; - - if (wlc_hw->sih) { - /* detach interrupt sync mechanism since interrupt is disabled and per-port - * interrupt object may has been freed. this must be done before sb core switch - */ - ai_deregister_intr_callback(wlc_hw->sih); - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_sleep(wlc_hw->sih); - } - - wlc_bmac_detach_dmapio(wlc_hw); - - band = wlc_hw->band; - for (i = 0; i < NBANDS_HW(wlc_hw); i++) { - if (band->pi) { - /* Detach this band's phy */ - wlc_phy_detach(band->pi); - band->pi = NULL; - } - band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; - } - - /* Free shared phy state */ - wlc_phy_shared_detach(wlc_hw->phy_sh); - - wlc_phy_shim_detach(wlc_hw->physhim); - - /* free vars */ - kfree(wlc_hw->vars); - wlc_hw->vars = NULL; - - if (wlc_hw->sih) { - ai_detach(wlc_hw->sih); - wlc_hw->sih = NULL; - } - - return callbacks; - -} - -void wlc_bmac_reset(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* reset the core */ - if (!DEVICEREMOVED(wlc_hw->wlc)) - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - /* purge the dma rings */ - wlc_flushqueues(wlc_hw->wlc); - - wlc_reset_bmac_done(wlc_hw->wlc); -} - -void -wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute) { - u32 macintmask; - bool fastclk; - struct wlc_info *wlc = wlc_hw->wlc; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* disable interrupts */ - macintmask = brcms_intrsoff(wlc->wl); - - /* set up the specified band and chanspec */ - wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); - wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); - - /* do one-time phy inits and calibration */ - wlc_phy_cal_init(wlc_hw->band->pi); - - /* core-specific initialization */ - wlc_coreinit(wlc); - - /* suspend the tx fifos and mute the phy for preism cac time */ - if (mute) - wlc_bmac_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); - - /* band-specific inits */ - wlc_bmac_bsinit(wlc, chanspec); - - /* restore macintmask */ - brcms_intrsrestore(wlc->wl, macintmask); - - /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended - * and wlc_enable_mac() will clear this override bit. - */ - mboolset(wlc_hw->wake_override, WLC_WAKE_OVERRIDE_MACSUSPEND); - - /* - * initialize mac_suspend_depth to 1 to match ucode initial suspended state - */ - wlc_hw->mac_suspend_depth = 1; - - /* restore the clk */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) -{ - uint coremask; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* - * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). - */ - wlc_bmac_xtal(wlc_hw, ON); - ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* - * Configure pci/pcmcia here instead of in wlc_attach() - * to allow mfg hotswap: down, hotswap (chip power cycle), up. - */ - coremask = (1 << wlc_hw->wlc->core->coreidx); - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_setup(wlc_hw->sih, coremask); - - /* - * Need to read the hwradio status here to cover the case where the system - * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. - */ - if (wlc_bmac_radio_read_hwdisabled(wlc_hw)) { - /* put SB PCI in down state again */ - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); - return -ENOMEDIUM; - } - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_up(wlc_hw->sih); - - /* reset the d11 core */ - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - return 0; -} - -int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - wlc_hw->up = true; - wlc_phy_hw_state_upd(wlc_hw->band->pi, true); - - /* FULLY enable dynamic power control and d11 core interrupt */ - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); - brcms_intrson(wlc_hw->wlc->wl); - return 0; -} - -int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) -{ - bool dev_gone; - uint callbacks = 0; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return callbacks; - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - /* disable interrupts */ - if (dev_gone) - wlc_hw->wlc->macintmask = 0; - else { - /* now disable interrupts */ - brcms_intrsoff(wlc_hw->wlc->wl); - - /* ensure we're running on the pll clock again */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); - } - /* down phy at the last of this stage */ - callbacks += wlc_phy_down(wlc_hw->band->pi); - - return callbacks; -} - -int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) -{ - uint callbacks = 0; - bool dev_gone; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return callbacks; - - wlc_hw->up = false; - wlc_phy_hw_state_upd(wlc_hw->band->pi, false); - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - if (dev_gone) { - wlc_hw->sbclk = false; - wlc_hw->clk = false; - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); - - /* reclaim any posted packets */ - wlc_flushqueues(wlc_hw->wlc); - } else { - - /* Reset and disable the core */ - if (ai_iscoreup(wlc_hw->sih)) { - if (R_REG(&wlc_hw->regs->maccontrol) & - MCTL_EN_MAC) - wlc_suspend_mac_and_wait(wlc_hw->wlc); - callbacks += brcms_reset(wlc_hw->wlc->wl); - wlc_coredisable(wlc_hw); - } - - /* turn off primary xtal and pll */ - if (!wlc_hw->noreset) { - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); - } - } - - return callbacks; -} - -void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw) -{ - /* delay before first read of ucode state */ - udelay(40); - - /* wait until ucode is no longer asleep */ - SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) == - DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); -} - -void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea) -{ - memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); -} - -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw) -{ - return wlc_hw->band->bandtype; -} - -/* control chip clock to save power, enable dynamic clock or force fast clock */ -static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) -{ - if (PMUCTL_ENAB(wlc_hw->sih)) { - /* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane, - * but mac core will still run on ALP(not HT) when it enters powersave mode, - * which means the FCA bit may not be set. - * should wakeup mac if driver wants it to run on HT. - */ - - if (wlc_hw->clk) { - if (mode == CLK_FAST) { - OR_REG(&wlc_hw->regs->clk_ctl_st, - CCS_FORCEHT); - - udelay(64); - - SPINWAIT(((R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL) == 0), - PMU_MAX_TRANSITION_DLY); - WARN_ON(!(R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL)); - } else { - if ((wlc_hw->sih->pmurev == 0) && - (R_REG - (&wlc_hw->regs-> - clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) - SPINWAIT(((R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL) - == 0), - PMU_MAX_TRANSITION_DLY); - AND_REG(&wlc_hw->regs->clk_ctl_st, - ~CCS_FORCEHT); - } - } - wlc_hw->forcefastclk = (mode == CLK_FAST); - } else { - - /* old chips w/o PMU, force HT through cc, - * then use FCA to verify mac is running fast clock - */ - - wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); - - /* check fast clock is available (if core is not in reset) */ - if (wlc_hw->forcefastclk && wlc_hw->clk) - WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & - SISF_FCLKA)); - - /* keep the ucode wake bit on if forcefastclk is on - * since we do not want ucode to put us back to slow clock - * when it dozes for PM mode. - * Code below matches the wake override bit with current forcefastclk state - * Only setting bit in wake_override instead of waking ucode immediately - * since old code (wlc.c 1.4499) had this behavior. Older code set - * wlc->forcefastclk but only had the wake happen if the wakup_ucode work - * (protected by an up check) was executed just below. - */ - if (wlc_hw->forcefastclk) - mboolset(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); - else - mboolclr(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); - } -} - -/* set initial host flags value */ -static void -wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - - memset(mhfs, 0, MHFMAX * sizeof(u16)); - - mhfs[MHF2] |= mhf2_init; - - /* prohibit use of slowclock on multifunction boards */ - if (wlc_hw->boardflags & BFL_NOPLLDOWN) - mhfs[MHF1] |= MHF1_FORCEFASTCLK; - - if (WLCISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { - mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; - mhfs[MHF1] |= MHF1_IQSWAP_WAR; - } -} - -/* set or clear ucode host flag bits - * it has an optimization for no-change write - * it only writes through shared memory when the core has clock; - * pre-CLK changes should use wlc_write_mhf to get around the optimization - * - * - * bands values are: WLC_BAND_AUTO <--- Current band only - * WLC_BAND_5G <--- 5G band only - * WLC_BAND_2G <--- 2G band only - * WLC_BAND_ALL <--- All bands - */ -void -wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, - int bands) -{ - u16 save; - u16 addr[MHFMAX] = { - M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, - M_HOST_FLAGS5 - }; - struct wlc_hwband *band; - - if ((val & ~mask) || idx >= MHFMAX) - return; /* error condition */ - - switch (bands) { - /* Current band only or all bands, - * then set the band to current band - */ - case WLC_BAND_AUTO: - case WLC_BAND_ALL: - band = wlc_hw->band; - break; - case WLC_BAND_5G: - band = wlc_hw->bandstate[BAND_5G_INDEX]; - break; - case WLC_BAND_2G: - band = wlc_hw->bandstate[BAND_2G_INDEX]; - break; - default: - band = NULL; /* error condition */ - } - - if (band) { - save = band->mhfs[idx]; - band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; - - /* optimization: only write through if changed, and - * changed band is the current band - */ - if (wlc_hw->clk && (band->mhfs[idx] != save) - && (band == wlc_hw->band)) - wlc_bmac_write_shm(wlc_hw, addr[idx], - (u16) band->mhfs[idx]); - } - - if (bands == WLC_BAND_ALL) { - wlc_hw->bandstate[0]->mhfs[idx] = - (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; - wlc_hw->bandstate[1]->mhfs[idx] = - (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; - } -} - -u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) -{ - struct wlc_hwband *band; - - if (idx >= MHFMAX) - return 0; /* error condition */ - switch (bands) { - case WLC_BAND_AUTO: - band = wlc_hw->band; - break; - case WLC_BAND_5G: - band = wlc_hw->bandstate[BAND_5G_INDEX]; - break; - case WLC_BAND_2G: - band = wlc_hw->bandstate[BAND_2G_INDEX]; - break; - default: - band = NULL; /* error condition */ - } - - if (!band) - return 0; - - return band->mhfs[idx]; -} - -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) -{ - u8 idx; - u16 addr[] = { - M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, - M_HOST_FLAGS5 - }; - - for (idx = 0; idx < MHFMAX; idx++) { - wlc_bmac_write_shm(wlc_hw, addr[idx], mhfs[idx]); - } -} - -/* set the maccontrol register to desired reset state and - * initialize the sw cache of the register - */ -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw) -{ - /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ - wlc_hw->maccontrol = 0; - wlc_hw->suspended_fifos = 0; - wlc_hw->wake_override = 0; - wlc_hw->mute_override = 0; - wlc_bmac_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); -} - -/* set or clear maccontrol bits */ -void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) -{ - u32 maccontrol; - u32 new_maccontrol; - - if (val & ~mask) - return; /* error condition */ - maccontrol = wlc_hw->maccontrol; - new_maccontrol = (maccontrol & ~mask) | val; - - /* if the new maccontrol value is the same as the old, nothing to do */ - if (new_maccontrol == maccontrol) - return; - - /* something changed, cache the new value */ - wlc_hw->maccontrol = new_maccontrol; - - /* write the new values with overrides applied */ - wlc_mctrl_write(wlc_hw); -} - -/* write the software state of maccontrol and overrides to the maccontrol register */ -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) -{ - u32 maccontrol = wlc_hw->maccontrol; - - /* OR in the wake bit if overridden */ - if (wlc_hw->wake_override) - maccontrol |= MCTL_WAKE; - - /* set AP and INFRA bits for mute if needed */ - if (wlc_hw->mute_override) { - maccontrol &= ~(MCTL_AP); - maccontrol |= MCTL_INFRA; - } - - W_REG(&wlc_hw->regs->maccontrol, maccontrol); -} - -void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) -{ - if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { - mboolset(wlc_hw->wake_override, override_bit); - return; - } - - mboolset(wlc_hw->wake_override, override_bit); - - wlc_mctrl_write(wlc_hw); - wlc_bmac_wait_for_wake(wlc_hw); - - return; -} - -void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) -{ - mboolclr(wlc_hw->wake_override, override_bit); - - if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) - return; - - wlc_mctrl_write(wlc_hw); - - return; -} - -/* When driver needs ucode to stop beaconing, it has to make sure that - * MCTL_AP is clear and MCTL_INFRA is set - * Mode MCTL_AP MCTL_INFRA - * AP 1 1 - * STA 0 1 <--- This will ensure no beacons - * IBSS 0 0 - */ -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) -{ - wlc_hw->mute_override = 1; - - /* if maccontrol already has AP == 0 and INFRA == 1 without this - * override, then there is no change to write - */ - if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) - return; - - wlc_mctrl_write(wlc_hw); - - return; -} - -/* Clear the override on AP and INFRA bits */ -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) -{ - if (wlc_hw->mute_override == 0) - return; - - wlc_hw->mute_override = 0; - - /* if maccontrol already has AP == 0 and INFRA == 1 without this - * override, then there is no change to write - */ - if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) - return; - - wlc_mctrl_write(wlc_hw); -} - -/* - * Write a MAC address to the given match reg offset in the RXE match engine. - */ -void -wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, - const u8 *addr) -{ - d11regs_t *regs; - u16 mac_l; - u16 mac_m; - u16 mac_h; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: wlc_bmac_set_addrmatch\n", - wlc_hw->unit); - - regs = wlc_hw->regs; - mac_l = addr[0] | (addr[1] << 8); - mac_m = addr[2] | (addr[3] << 8); - mac_h = addr[4] | (addr[5] << 8); - - /* enter the MAC addr into the RXE match registers */ - W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); - W_REG(®s->rcm_mat_data, mac_l); - W_REG(®s->rcm_mat_data, mac_m); - W_REG(®s->rcm_mat_data, mac_h); - -} - -void -wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, - void *buf) -{ - d11regs_t *regs; - u32 word; - bool be_bit; - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - W_REG(®s->tplatewrptr, offset); - - /* if MCTL_BIGEND bit set in mac control register, - * the chip swaps data in fifo, as well as data in - * template ram - */ - be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; - - while (len > 0) { - memcpy(&word, buf, sizeof(u32)); - - if (be_bit) - word = cpu_to_be32(word); - else - word = cpu_to_le32(word); - - W_REG(®s->tplatewrdata, word); - - buf = (u8 *) buf + sizeof(u32); - len -= sizeof(u32); - } -} - -void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) -{ - wlc_hw->band->CWmin = newmin; - - W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, newmin); -} - -void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) -{ - wlc_hw->band->CWmax = newmax; - - W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, newmax); -} - -void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) -{ - bool fastclk; - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - wlc_phy_bw_state_set(wlc_hw->band->pi, bw); - - wlc_bmac_phy_reset(wlc_hw); - wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); - - /* restore the clk */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -static void -wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, int len) -{ - d11regs_t *regs = wlc_hw->regs; - - wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, - bcn); - /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); - /* mark beacon0 valid */ - OR_REG(®s->maccommand, MCMD_BCN0VLD); -} - -static void -wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, int len) -{ - d11regs_t *regs = wlc_hw->regs; - - wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, - bcn); - /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); - /* mark beacon1 valid */ - OR_REG(®s->maccommand, MCMD_BCN1VLD); -} - -/* mac is assumed to be suspended at this point */ -void -wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, void *bcn, int len, - bool both) -{ - d11regs_t *regs = wlc_hw->regs; - - if (both) { - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); - } else { - /* bcn 0 */ - if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); - /* bcn 1 */ - else if (! - (R_REG(®s->maccommand) & MCMD_BCN1VLD)) - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); - } -} - -static void WLBANDINITFN(wlc_bmac_upd_synthpu) (struct wlc_hw_info *wlc_hw) -{ - u16 v; - struct wlc_info *wlc = wlc_hw->wlc; - /* update SYNTHPU_DLY */ - - if (WLCISLCNPHY(wlc->band)) { - v = SYNTHPU_DLY_LPPHY_US; - } else if (WLCISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { - v = SYNTHPU_DLY_NPHY_US; - } else { - v = SYNTHPU_DLY_BPHY_US; - } - - wlc_bmac_write_shm(wlc_hw, M_SYNTHPU_DLY, v); -} - -/* band-specific init */ -static void -WLBANDINITFN(wlc_bmac_bsinit) (struct wlc_info *wlc, chanspec_t chanspec) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc_hw->band->bandunit); - - wlc_ucode_bsinit(wlc_hw); - - wlc_phy_init(wlc_hw->band->pi, chanspec); - - wlc_ucode_txant_set(wlc_hw); - - /* cwmin is band-specific, update hardware with value for current band */ - wlc_bmac_set_cwmin(wlc_hw, wlc_hw->band->CWmin); - wlc_bmac_set_cwmax(wlc_hw, wlc_hw->band->CWmax); - - wlc_bmac_update_slot_timing(wlc_hw, - BAND_5G(wlc_hw->band-> - bandtype) ? true : wlc_hw-> - shortslot); - - /* write phytype and phyvers */ - wlc_bmac_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); - wlc_bmac_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); - - /* initialize the txphyctl1 rate table since shmem is shared between bands */ - wlc_upd_ofdm_pctl1_table(wlc_hw); - - wlc_bmac_upd_synthpu(wlc_hw); -} - -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); - - wlc_hw->phyclk = clk; - - if (OFF == clk) { /* clear gmode bit, put phy into reset */ - - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), - (SICF_PRST | SICF_FGC)); - udelay(1); - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); - udelay(1); - - } else { /* take phy out of reset */ - - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); - udelay(1); - ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); - udelay(1); - - } -} - -/* Perform a soft reset of the PHY PLL */ -void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, 0); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 4); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); - udelay(1); -} - -/* light way to turn on phy clock without reset for NPHY only - * refer to wlc_bmac_core_phy_clk for full version - */ -void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) -{ - /* support(necessary for NPHY and HYPHY) only */ - if (!WLCISNPHY(wlc_hw->band)) - return; - - if (ON == clk) - ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); - else - ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); - -} - -void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) -{ - if (ON == clk) - ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); - else - ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); -} - -void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) -{ - wlc_phy_t *pih = wlc_hw->band->pi; - u32 phy_bw_clkbits; - bool phy_in_reset = false; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (pih == NULL) - return; - - phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); - - /* Specific reset sequence required for NPHY rev 3 and 4 */ - if (WLCISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && - NREV_LE(wlc_hw->band->phyrev, 4)) { - /* Set the PHY bandwidth */ - ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); - - udelay(1); - - /* Perform a soft reset of the PHY PLL */ - wlc_bmac_core_phypll_reset(wlc_hw); - - /* reset the PHY */ - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), - (SICF_PRST | SICF_PCLKE)); - phy_in_reset = true; - } else { - - ai_core_cflags(wlc_hw->sih, - (SICF_PRST | SICF_PCLKE | SICF_BWMASK), - (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); - } - - udelay(2); - wlc_bmac_core_phy_clk(wlc_hw, ON); - - if (pih) - wlc_phy_anacore(pih, ON); -} - -/* switch to and initialize new band */ -static void -WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, - chanspec_t chanspec) { - struct wlc_info *wlc = wlc_hw->wlc; - u32 macintmask; - - /* Enable the d11 core before accessing it */ - if (!ai_iscoreup(wlc_hw->sih)) { - ai_core_reset(wlc_hw->sih, 0, 0); - wlc_mctrl_reset(wlc_hw); - } - - macintmask = wlc_setband_inact(wlc, bandunit); - - if (!wlc_hw->up) - return; - - wlc_bmac_core_phy_clk(wlc_hw, ON); - - /* band-specific initializations */ - wlc_bmac_bsinit(wlc, chanspec); - - /* - * If there are any pending software interrupt bits, - * then replace these with a harmless nonzero value - * so wlc_dpc() will re-enable interrupts when done. - */ - if (wlc->macintstatus) - wlc->macintstatus = MI_DMAINT; - - /* restore macintmask */ - brcms_intrsrestore(wlc->wl, macintmask); - - /* ucode should still be suspended.. */ - WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); -} - -/* low-level band switch utility routine */ -void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - bandunit); - - wlc_hw->band = wlc_hw->bandstate[bandunit]; - - /* BMAC_NOTE: until we eliminate need for wlc->band refs in low level code */ - wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; - - /* set gmode core flag */ - if (wlc_hw->sbclk && !wlc_hw->noreset) { - ai_core_cflags(wlc_hw->sih, SICF_GMODE, - ((bandunit == 0) ? SICF_GMODE : 0)); - } -} - -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) -{ - - /* reject unsupported corerev */ - if (!VALID_COREREV(wlc_hw->corerev)) { - wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", - wlc_hw->corerev); - return false; - } - - return true; -} - -static bool wlc_validboardtype(struct wlc_hw_info *wlc_hw) -{ - bool goodboard = true; - uint boardrev = wlc_hw->boardrev; - - if (boardrev == 0) - goodboard = false; - else if (boardrev > 0xff) { - uint brt = (boardrev & 0xf000) >> 12; - uint b0 = (boardrev & 0xf00) >> 8; - uint b1 = (boardrev & 0xf0) >> 4; - uint b2 = boardrev & 0xf; - - if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) - || (b2 > 9)) - goodboard = false; - } - - if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) - return goodboard; - - return goodboard; -} - -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) -{ - const char *varname = "macaddr"; - char *macaddr; - - /* If macaddr exists, use it (Sromrev4, CIS, ...). */ - macaddr = getvar(wlc_hw->vars, varname); - if (macaddr != NULL) - return macaddr; - - if (NBANDS_HW(wlc_hw) > 1) - varname = "et1macaddr"; - else - varname = "il0macaddr"; - - macaddr = getvar(wlc_hw->vars, varname); - if (macaddr == NULL) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " - "getvar(%s) not found\n", wlc_hw->unit, varname); - } - - return macaddr; -} - -/* - * Return true if radio is disabled, otherwise false. - * hw radio disable signal is an external pin, users activate it asynchronously - * this function could be called when driver is down and w/o clock - * it operates on different registers depending on corerev and boardflag. - */ -bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) -{ - bool v, clk, xtal; - u32 resetbits = 0, flags = 0; - - xtal = wlc_hw->sbclk; - if (!xtal) - wlc_bmac_xtal(wlc_hw, ON); - - /* may need to take core out of reset first */ - clk = wlc_hw->clk; - if (!clk) { - /* - * mac no longer enables phyclk automatically when driver - * accesses phyreg throughput mac. This can be skipped since - * only mac reg is accessed below - */ - flags |= SICF_PCLKE; - - /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) - wlc_hw->regs = - (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, - 0); - ai_core_reset(wlc_hw->sih, flags, resetbits); - wlc_mctrl_reset(wlc_hw); - } - - v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); - - /* put core back into reset */ - if (!clk) - ai_core_disable(wlc_hw->sih, 0); - - if (!xtal) - wlc_bmac_xtal(wlc_hw, OFF); - - return v; -} - -/* Initialize just the hardware when coming out of POR or S3/S5 system states */ -void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) -{ - if (wlc_hw->wlc->pub->hw_up) - return; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* - * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). - */ - wlc_bmac_xtal(wlc_hw, ON); - ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - if (wlc_hw->sih->bustype == PCI_BUS) { - ai_pci_fixcfg(wlc_hw->sih); - - /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) - wlc_hw->regs = - (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, - 0); - } - - /* Inform phy that a POR reset has occurred so it does a complete phy init */ - wlc_phy_por_inform(wlc_hw->band->pi); - - wlc_hw->ucode_loaded = false; - wlc_hw->wlc->pub->hw_up = true; - - if ((wlc_hw->boardflags & BFL_FEM) - && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { - if (! - (wlc_hw->boardrev >= 0x1250 - && (wlc_hw->boardflags & BFL_FEM_BT))) - ai_epa_4313war(wlc_hw->sih); - } -} - -static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) -{ - struct dma_pub *di = wlc_hw->di[fifo]; - return dma_rxreset(di); -} - -/* d11 core reset - * ensure fask clock during reset - * reset dma - * reset d11(out of reset) - * reset phy(out of reset) - * clear software macintstatus for fresh new start - * one testing hack wlc_hw->noreset will bypass the d11/phy reset - */ -void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) -{ - d11regs_t *regs; - uint i; - bool fastclk; - u32 resetbits = 0; - - if (flags == WLC_USE_COREFLAGS) - flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* reset the dma engines except first time thru */ - if (ai_iscoreup(wlc_hw->sih)) { - for (i = 0; i < NFIFO; i++) - if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " - "dma_txreset[%d]: cannot stop dma\n", - wlc_hw->unit, __func__, i); - } - - if ((wlc_hw->di[RX_FIFO]) - && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" - "[%d]: cannot stop dma\n", - wlc_hw->unit, __func__, RX_FIFO); - } - } - /* if noreset, just stop the psm and return */ - if (wlc_hw->noreset) { - wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ - wlc_bmac_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); - return; - } - - /* - * mac no longer enables phyclk automatically when driver accesses - * phyreg throughput mac, AND phy_reset is skipped at early stage when - * band->pi is invalid. need to enable PHY CLK - */ - flags |= SICF_PCLKE; - - /* reset the core - * In chips with PMU, the fastclk request goes through d11 core reg 0x1e0, which - * is cleared by the core_reset. have to re-request it. - * This adds some delay and we can optimize it by also requesting fastclk through - * chipcommon during this period if necessary. But that has to work coordinate - * with other driver like mips/arm since they may touch chipcommon as well. - */ - wlc_hw->clk = false; - ai_core_reset(wlc_hw->sih, flags, resetbits); - wlc_hw->clk = true; - if (wlc_hw->band && wlc_hw->band->pi) - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); - - wlc_mctrl_reset(wlc_hw); - - if (PMUCTL_ENAB(wlc_hw->sih)) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - wlc_bmac_phy_reset(wlc_hw); - - /* turn on PHY_PLL */ - wlc_bmac_core_phypll_ctl(wlc_hw, true); - - /* clear sw intstatus */ - wlc_hw->wlc->macintstatus = 0; - - /* restore the clk setting */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -/* txfifo sizes needs to be modified(increased) since the newer cores - * have more memory. - */ -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) -{ - d11regs_t *regs = wlc_hw->regs; - u16 fifo_nu; - u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; - u16 txfifo_def, txfifo_def1; - u16 txfifo_cmd; - - /* tx fifos start at TXFIFO_START_BLK from the Base address */ - txfifo_startblk = TXFIFO_START_BLK; - - /* sequence of operations: reset fifo, set fifo size, reset fifo */ - for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { - - txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; - txfifo_def = (txfifo_startblk & 0xff) | - (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); - txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | - ((((txfifo_endblk - - 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); - txfifo_cmd = - TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); - - W_REG(®s->xmtfifocmd, txfifo_cmd); - W_REG(®s->xmtfifodef, txfifo_def); - W_REG(®s->xmtfifodef1, txfifo_def1); - - W_REG(®s->xmtfifocmd, txfifo_cmd); - - txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; - } - /* - * need to propagate to shm location to be in sync since ucode/hw won't - * do this - */ - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE0, - wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE1, - wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE2, - ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> - xmtfifo_sz[TX_AC_BK_FIFO])); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE3, - ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> - xmtfifo_sz[TX_BCMC_FIFO])); -} - -/* d11 core init - * reset PSM - * download ucode/PCM - * let ucode run to suspended - * download ucode inits - * config other core registers - * init dma - */ -static void wlc_coreinit(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs; - u32 sflags; - uint bcnint_us; - uint i = 0; - bool fifosz_fixup = false; - int err = 0; - u16 buf[NFIFO]; - struct wiphy *wiphy = wlc->wiphy; - - regs = wlc_hw->regs; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* reset PSM */ - wlc_bmac_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); - - wlc_ucode_download(wlc_hw); - /* - * FIFOSZ fixup. driver wants to controls the fifo allocation. - */ - fifosz_fixup = true; - - /* let the PSM run to the suspended state, set mode to BSS STA */ - W_REG(®s->macintstatus, -1); - wlc_bmac_mctrl(wlc_hw, ~0, - (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); - - /* wait for ucode to self-suspend after auto-init */ - SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), - 1000 * 1000); - if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) - wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" - "suspend!\n", wlc_hw->unit); - - wlc_gpio_init(wlc); - - sflags = ai_core_sflags(wlc_hw->sih, 0, 0); - - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) - wlc_write_inits(wlc_hw, d11n0initvals16); - else - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0initvals24); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - - /* For old ucode, txfifo sizes needs to be modified(increased) */ - if (fifosz_fixup == true) { - wlc_corerev_fifofixup(wlc_hw); - } - - /* check txfifo allocations match between ucode and driver */ - buf[TX_AC_BE_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE0); - if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { - i = TX_AC_BE_FIFO; - err = -1; - } - buf[TX_AC_VI_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE1); - if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { - i = TX_AC_VI_FIFO; - err = -1; - } - buf[TX_AC_BK_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE2); - buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; - buf[TX_AC_BK_FIFO] &= 0xff; - if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { - i = TX_AC_BK_FIFO; - err = -1; - } - if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { - i = TX_AC_VO_FIFO; - err = -1; - } - buf[TX_BCMC_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE3); - buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; - buf[TX_BCMC_FIFO] &= 0xff; - if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { - i = TX_BCMC_FIFO; - err = -1; - } - if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { - i = TX_ATIM_FIFO; - err = -1; - } - if (err != 0) { - wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" - " driver size %d index %d\n", buf[i], - wlc_hw->xmtfifo_sz[i], i); - } - - /* make sure we can still talk to the mac */ - WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); - - /* band-specific inits done by wlc_bsinit() */ - - /* Set up frame burst size and antenna swap threshold init values */ - wlc_bmac_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); - wlc_bmac_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); - - /* enable one rx interrupt per received frame */ - W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); - - /* set the station mode (BSS STA) */ - wlc_bmac_mctrl(wlc_hw, - (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), - (MCTL_INFRA | MCTL_DISCARD_PMQ)); - - /* set up Beacon interval */ - bcnint_us = 0x8000 << 10; - W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); - W_REG(®s->tsf_cfpstart, bcnint_us); - W_REG(®s->macintstatus, MI_GP1); - - /* write interrupt mask */ - W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); - - /* allow the MAC to control the PHY clock (dynamic on/off) */ - wlc_bmac_macphyclk_set(wlc_hw, ON); - - /* program dynamic clock control fast powerup delay register */ - wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); - W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); - - /* tell the ucode the corerev */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); - - /* tell the ucode MAC capabilities */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_L, - (u16) (wlc_hw->machwcap & 0xffff)); - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_H, - (u16) ((wlc_hw-> - machwcap >> 16) & 0xffff)); - - /* write retry limits to SCR, this done after PSM init */ - W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, wlc_hw->SRL); - W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, wlc_hw->LRL); - - /* write rate fallback retry limits */ - wlc_bmac_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); - wlc_bmac_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); - - AND_REG(®s->ifs_ctl, 0x0FFF); - W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); - - /* dma initializations */ - wlc->txpend16165war = 0; - - /* init the tx dma engines */ - for (i = 0; i < NFIFO; i++) { - if (wlc_hw->di[i]) - dma_txinit(wlc_hw->di[i]); - } - - /* init the rx dma engine(s) and post receive buffers */ - dma_rxinit(wlc_hw->di[RX_FIFO]); - dma_rxfill(wlc_hw->di[RX_FIFO]); -} - -/* This function is used for changing the tsf frac register - * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz - * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz - * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz - * HTPHY Formula is 2^26/freq(MHz) e.g. - * For spuron2 - 126MHz -> 2^26/126 = 532610.0 - * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 - * For spuron: 123MHz -> 2^26/123 = 545600.5 - * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 - * For spur off: 120MHz -> 2^26/120 = 559240.5 - * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 - */ - -void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) -{ - d11regs_t *regs; - regs = wlc_hw->regs; - - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { - if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x2082); - W_REG(®s->tsf_clk_frac_h, 0x8); - } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x5341); - W_REG(®s->tsf_clk_frac_h, 0x8); - } else { /* 120Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x8889); - W_REG(®s->tsf_clk_frac_h, 0x8); - } - } else if (WLCISLCNPHY(wlc_hw->band)) { - if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x7CE0); - W_REG(®s->tsf_clk_frac_h, 0xC); - } else { /* 80Mhz */ - W_REG(®s->tsf_clk_frac_l, 0xCCCD); - W_REG(®s->tsf_clk_frac_h, 0xC); - } - } -} - -/* Initialize GPIOs that are controlled by D11 core */ -static void wlc_gpio_init(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs; - u32 gc, gm; - - regs = wlc_hw->regs; - - /* use GPIO select 0 to get all gpio signals from the gpio out reg */ - wlc_bmac_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); - - /* - * Common GPIO setup: - * G0 = LED 0 = WLAN Activity - * G1 = LED 1 = WLAN 2.4 GHz Radio State - * G2 = LED 2 = WLAN 5 GHz Radio State - * G4 = radio disable input (HI enabled, LO disabled) - */ - - gc = gm = 0; - - /* Allocate GPIOs for mimo antenna diversity feature */ - if (wlc_hw->antsel_type == ANTSEL_2x3) { - /* Enable antenna diversity, use 2x3 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, - MHF3_ANTSEL_MODE, WLC_BAND_ALL); - - /* init superswitch control */ - wlc_phy_antsel_init(wlc_hw->band->pi, false); - - } else if (wlc_hw->antsel_type == ANTSEL_2x4) { - gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); - /* - * The board itself is powered by these GPIOs - * (when not sending pattern) so set them high - */ - OR_REG(®s->psm_gpio_oe, - (BOARD_GPIO_12 | BOARD_GPIO_13)); - OR_REG(®s->psm_gpio_out, - (BOARD_GPIO_12 | BOARD_GPIO_13)); - - /* Enable antenna diversity, use 2x4 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, - WLC_BAND_ALL); - - /* Configure the desired clock to be 4Mhz */ - wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV, - ANTSEL_CLKDIV_4MHZ); - } - - /* gpio 9 controls the PA. ucode is responsible for wiggling out and oe */ - if (wlc_hw->boardflags & BFL_PACTRL) - gm |= gc |= BOARD_GPIO_PACTRL; - - /* apply to gpiocontrol register */ - ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); -} - -static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) -{ - struct wlc_info *wlc; - wlc = wlc_hw->wlc; - - if (wlc_hw->ucode_loaded) - return; - - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, - bcm43xx_16_mimosz); - wlc_hw->ucode_loaded = true; - } else - wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " - "corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, - bcm43xx_24_lcnsz); - wlc_hw->ucode_loaded = true; - } else { - wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " - "corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - } -} - -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], - const uint nbytes) { - d11regs_t *regs = wlc_hw->regs; - uint i; - uint count; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - count = (nbytes / sizeof(u32)); - - W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); - (void)R_REG(®s->objaddr); - for (i = 0; i < count; i++) - W_REG(®s->objdata, ucode[i]); -} - -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, - const struct d11init *inits) -{ - int i; - volatile u8 *base; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - base = (volatile u8 *)wlc_hw->regs; - - for (i = 0; inits[i].addr != 0xffff; i++) { - if (inits[i].size == 2) - W_REG((u16 *)(base + inits[i].addr), - inits[i].value); - else if (inits[i].size == 4) - W_REG((u32 *)(base + inits[i].addr), - inits[i].value); - } -} - -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw) -{ - u16 phyctl; - u16 phytxant = wlc_hw->bmac_phytxant; - u16 mask = PHY_TXC_ANT_MASK; - - /* set the Probe Response frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); - phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); - - /* set the Response (ACK/CTS) frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_RSP_PCTLWD); - phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); -} - -void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) -{ - /* update sw state */ - wlc_hw->bmac_phytxant = phytxant; - - /* push to ucode if up */ - if (!wlc_hw->up) - return; - wlc_ucode_txant_set(wlc_hw); - -} - -u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw) -{ - return (u16) wlc_hw->wlc->stf->txant; -} - -void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) -{ - wlc_hw->antsel_type = antsel_type; - - /* Update the antsel type for phy module to use */ - wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); -} - -void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) -{ - bool fatal = false; - uint unit; - uint intstatus, idx; - d11regs_t *regs = wlc_hw->regs; - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - unit = wlc_hw->unit; - - for (idx = 0; idx < NFIFO; idx++) { - /* read intstatus register and ignore any non-error bits */ - intstatus = - R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; - if (!intstatus) - continue; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", - unit, idx, intstatus); - - if (intstatus & I_RO) { - wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " - "overflow\n", unit, idx); - fatal = true; - } - - if (intstatus & I_PC) { - wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", - unit, idx); - fatal = true; - } - - if (intstatus & I_PD) { - wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, - idx); - fatal = true; - } - - if (intstatus & I_DE) { - wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " - "error\n", unit, idx); - fatal = true; - } - - if (intstatus & I_RU) { - wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " - "underflow\n", idx, unit); - } - - if (intstatus & I_XU) { - wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " - "underflow\n", idx, unit); - fatal = true; - } - - if (fatal) { - wlc_fatal_error(wlc_hw->wlc); /* big hammer */ - break; - } else - W_REG(®s->intctrlregs[idx].intstatus, - intstatus); - } -} - -void wlc_intrson(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - wlc->macintmask = wlc->defmacintmask; - W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); -} - -/* callback for siutils.c, which has only wlc handler, no wl - * they both check up, not only because there is no need to off/restore d11 interrupt - * but also because per-port code may require sync with valid interrupt. - */ - -static u32 wlc_wlintrsoff(struct wlc_info *wlc) -{ - if (!wlc->hw->up) - return 0; - - return brcms_intrsoff(wlc->wl); -} - -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) -{ - if (!wlc->hw->up) - return; - - brcms_intrsrestore(wlc->wl, macintmask); -} - -u32 wlc_intrsoff(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintmask; - - if (!wlc_hw->clk) - return 0; - - macintmask = wlc->macintmask; /* isr can still happen */ - - W_REG(&wlc_hw->regs->macintmask, 0); - (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ - udelay(1); /* ensure int line is no longer driven */ - wlc->macintmask = 0; - - /* return previous macintmask; resolve race between us and our isr */ - return wlc->macintstatus ? 0 : macintmask; -} - -void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - if (!wlc_hw->clk) - return; - - wlc->macintmask = macintmask; - W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); -} - -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool on, mbool flags) -{ - u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; - - if (on) { - /* suspend tx fifos */ - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); - - /* zero the address match register so we do not send ACKs */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, - null_ether_addr); - } else { - /* resume tx fifos */ - if (!wlc_hw->wlc->tx_suspended) { - wlc_bmac_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); - } - wlc_bmac_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); - - /* Restore address */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, - wlc_hw->etheraddr); - } - - wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); - - if (on) - wlc_ucode_mute_override_set(wlc_hw); - else - wlc_ucode_mute_override_clear(wlc_hw); -} - -int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) -{ - if (fifo >= NFIFO) - return -EINVAL; - - *blocks = wlc_hw->xmtfifo_sz[fifo]; - - return 0; -} - -/* wlc_bmac_tx_fifo_suspended: - * Check the MAC's tx suspend status for a tx fifo. - * - * When the MAC acknowledges a tx suspend, it indicates that no more - * packets will be transmitted out the radio. This is independent of - * DMA channel suspension---the DMA may have finished suspending, or may still - * be pulling data into a tx fifo, by the time the MAC acks the suspend - * request. - */ -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - /* check that a suspend has been requested and is no longer pending */ - - /* - * for DMA mode, the suspend request is set in xmtcontrol of the DMA engine, - * and the tx fifo suspend at the lower end of the MAC is acknowledged in the - * chnstatus register. - * The tx fifo suspend completion is independent of the DMA suspend completion and - * may be acked before or after the DMA is suspended. - */ - if (dma_txsuspended(wlc_hw->di[tx_fifo]) && - (R_REG(&wlc_hw->regs->chnstatus) & - (1 << tx_fifo)) == 0) - return true; - - return false; -} - -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - u8 fifo = 1 << tx_fifo; - - /* Two clients of this code, 11h Quiet period and scanning. */ - - /* only suspend if not already suspended */ - if ((wlc_hw->suspended_fifos & fifo) == fifo) - return; - - /* force the core awake only if not already */ - if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_TXFIFO); - - wlc_hw->suspended_fifos |= fifo; - - if (wlc_hw->di[tx_fifo]) { - /* Suspending AMPDU transmissions in the middle can cause underflow - * which may result in mismatch between ucode and driver - * so suspend the mac before suspending the FIFO - */ - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_suspend_mac_and_wait(wlc_hw->wlc); - - dma_txsuspend(wlc_hw->di[tx_fifo]); - - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_enable_mac(wlc_hw->wlc); - } -} - -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - /* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done - * here for PIO otherwise the watchdog will catch the inconsistency and fire - */ - /* Two clients of this code, 11h Quiet period and scanning. */ - if (wlc_hw->di[tx_fifo]) - dma_txresume(wlc_hw->di[tx_fifo]); - - /* allow core to sleep again */ - if (wlc_hw->suspended_fifos == 0) - return; - else { - wlc_hw->suspended_fifos &= ~(1 << tx_fifo); - if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_clear(wlc_hw, - WLC_WAKE_OVERRIDE_TXFIFO); - } -} - -/* - * Read and clear macintmask and macintstatus and intstatus registers. - * This routine should be called with interrupts off - * Return: - * -1 if DEVICEREMOVED(wlc) evaluates to true; - * 0 if the interrupt is not for us, or we are in some special cases; - * device interrupt status bits otherwise. - */ -static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 macintstatus; - - /* macintstatus includes a DMA interrupt summary bit */ - macintstatus = R_REG(®s->macintstatus); - - BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, - macintstatus); - - /* detect cardbus removed, in power down(suspend) and in reset */ - if (DEVICEREMOVED(wlc)) - return -1; - - /* DEVICEREMOVED succeeds even when the core is still resetting, - * handle that case here. - */ - if (macintstatus == 0xffffffff) - return 0; - - /* defer unsolicited interrupts */ - macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); - - /* if not for us */ - if (macintstatus == 0) - return 0; - - /* interrupts are already turned off for CFE build - * Caution: For CFE Turning off the interrupts again has some undesired - * consequences - */ - /* turn off the interrupts */ - W_REG(®s->macintmask, 0); - (void)R_REG(®s->macintmask); /* sync readback */ - wlc->macintmask = 0; - - /* clear device interrupts */ - W_REG(®s->macintstatus, macintstatus); - - /* MI_DMAINT is indication of non-zero intstatus */ - if (macintstatus & MI_DMAINT) { - /* - * only fifo interrupt enabled is I_RI in - * RX_FIFO. If MI_DMAINT is set, assume it - * is set and clear the interrupt. - */ - W_REG(®s->intctrlregs[RX_FIFO].intstatus, - DEF_RXINTMASK); - } - - return macintstatus; -} - -/* Update wlc->macintstatus and wlc->intstatus[]. */ -/* Return true if they are updated successfully. false otherwise */ -bool wlc_intrsupd(struct wlc_info *wlc) -{ - u32 macintstatus; - - /* read and clear macintstatus and intstatus registers */ - macintstatus = wlc_intstatus(wlc, false); - - /* device is removed */ - if (macintstatus == 0xffffffff) - return false; - - /* update interrupt status in software */ - wlc->macintstatus |= macintstatus; - - return true; -} - -/* - * First-level interrupt processing. - * Return true if this was our interrupt, false otherwise. - * *wantdpc will be set to true if further wlc_dpc() processing is required, - * false otherwise. - */ -bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintstatus; - - *wantdpc = false; - - if (!wlc_hw->up || !wlc->macintmask) - return false; - - /* read and clear macintstatus and intstatus registers */ - macintstatus = wlc_intstatus(wlc, true); - - if (macintstatus == 0xffffffff) - wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" - " path\n"); - - /* it is not for us */ - if (macintstatus == 0) - return false; - - *wantdpc = true; - - /* save interrupt status bits */ - wlc->macintstatus = macintstatus; - - return true; - -} - -static bool -wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) -{ - /* discard intermediate indications for ucode with one legitimate case: - * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent - * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts - * transmission count) - */ - if (!(txs->status & TX_STATUS_AMPDU) - && (txs->status & TX_STATUS_INTERMEDIATE)) { - return false; - } - - return wlc_dotxstatus(wlc_hw->wlc, txs, s2); -} - -/* process tx completion events in BMAC - * Return true if more tx status need to be processed. false otherwise. - */ -static bool -wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) -{ - bool morepending = false; - struct wlc_info *wlc = wlc_hw->wlc; - d11regs_t *regs; - tx_status_t txstatus, *txs; - u32 s1, s2; - uint n = 0; - /* - * Param 'max_tx_num' indicates max. # tx status to process before - * break out. - */ - uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - txs = &txstatus; - regs = wlc_hw->regs; - while (!(*fatal) - && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { - - if (s1 == 0xffffffff) { - wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", - wlc_hw->unit, __func__); - return morepending; - } - - s2 = R_REG(®s->frmtxstatus2); - - txs->status = s1 & TXS_STATUS_MASK; - txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; - txs->sequence = s2 & TXS_SEQ_MASK; - txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; - txs->lasttxtime = 0; - - *fatal = wlc_bmac_dotxstatus(wlc_hw, txs, s2); - - /* !give others some time to run! */ - if (++n >= max_tx_num) - break; - } - - if (*fatal) - return 0; - - if (n >= max_tx_num) - morepending = true; - - if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); - - return morepending; -} - -void wlc_suspend_mac_and_wait(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 mc, mi; - struct wiphy *wiphy = wlc->wiphy; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc_hw->band->bandunit); - - /* - * Track overlapping suspend requests - */ - wlc_hw->mac_suspend_depth++; - if (wlc_hw->mac_suspend_depth > 1) - return; - - /* force the core awake */ - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); - - mc = R_REG(®s->maccontrol); - - if (mc == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_PSM_RUN)); - WARN_ON(!(mc & MCTL_EN_MAC)); - - mi = R_REG(®s->macintstatus); - if (mi == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mi & MI_MACSSPNDD); - - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0); - - SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), - WLC_MAX_MAC_SUSPEND); - - if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { - wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" - " and MI_MACSSPNDD is still not on.\n", - wlc_hw->unit, WLC_MAX_MAC_SUSPEND); - wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " - "psm_brc 0x%04x\n", wlc_hw->unit, - R_REG(®s->psmdebug), - R_REG(®s->phydebug), - R_REG(®s->psm_brc)); - } - - mc = R_REG(®s->maccontrol); - if (mc == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_PSM_RUN)); - WARN_ON(mc & MCTL_EN_MAC); -} - -void wlc_enable_mac(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 mc, mi; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc->band->bandunit); - - /* - * Track overlapping suspend requests - */ - wlc_hw->mac_suspend_depth--; - if (wlc_hw->mac_suspend_depth > 0) - return; - - mc = R_REG(®s->maccontrol); - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(mc & MCTL_EN_MAC); - WARN_ON(!(mc & MCTL_PSM_RUN)); - - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); - W_REG(®s->macintstatus, MI_MACSSPNDD); - - mc = R_REG(®s->maccontrol); - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_EN_MAC)); - WARN_ON(!(mc & MCTL_PSM_RUN)); - - mi = R_REG(®s->macintstatus); - WARN_ON(mi & MI_MACSSPNDD); - - wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); -} - -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw) -{ - u8 rate; - u8 rates[8] = { - WLC_RATE_6M, WLC_RATE_9M, WLC_RATE_12M, WLC_RATE_18M, - WLC_RATE_24M, WLC_RATE_36M, WLC_RATE_48M, WLC_RATE_54M - }; - u16 entry_ptr; - u16 pctl1; - uint i; - - if (!WLC_PHY_11N_CAP(wlc_hw->band)) - return; - - /* walk the phy rate table and update the entries */ - for (i = 0; i < ARRAY_SIZE(rates); i++) { - rate = rates[i]; - - entry_ptr = wlc_bmac_ofdm_ratetable_offset(wlc_hw, rate); - - /* read the SHM Rate Table entry OFDM PCTL1 values */ - pctl1 = - wlc_bmac_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); - - /* modify the value */ - pctl1 &= ~PHY_TXC1_MODE_MASK; - pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); - - /* Update the SHM Rate Table entry OFDM PCTL1 values */ - wlc_bmac_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, - pctl1); - } -} - -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) -{ - uint i; - u8 plcp_rate = 0; - struct plcp_signal_rate_lookup { - u8 rate; - u8 signal_rate; - }; - /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ - const struct plcp_signal_rate_lookup rate_lookup[] = { - {WLC_RATE_6M, 0xB}, - {WLC_RATE_9M, 0xF}, - {WLC_RATE_12M, 0xA}, - {WLC_RATE_18M, 0xE}, - {WLC_RATE_24M, 0x9}, - {WLC_RATE_36M, 0xD}, - {WLC_RATE_48M, 0x8}, - {WLC_RATE_54M, 0xC} - }; - - for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { - if (rate == rate_lookup[i].rate) { - plcp_rate = rate_lookup[i].signal_rate; - break; - } - } - - /* Find the SHM pointer to the rate table entry by looking in the - * Direct-map Table - */ - return 2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); -} - -void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode) -{ - wlc_hw->hw_stf_ss_opmode = stf_mode; - - if (wlc_hw->clk) - wlc_upd_ofdm_pctl1_table(wlc_hw); -} - -void -wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, - u32 *tsf_h_ptr) -{ - d11regs_t *regs = wlc_hw->regs; - - /* read the tsf timer low, then high to get an atomic read */ - *tsf_l_ptr = R_REG(®s->tsf_timerlow); - *tsf_h_ptr = R_REG(®s->tsf_timerhigh); - - return; -} - -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) -{ - d11regs_t *regs; - u32 w, val; - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - - /* Validate dchip register access */ - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - w = R_REG(®s->objdata); - - /* Can we write and read back a 32bit register? */ - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, (u32) 0xaa5555aa); - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - val = R_REG(®s->objdata); - if (val != (u32) 0xaa5555aa) { - wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " - "expected 0xaa5555aa\n", wlc_hw->unit, val); - return false; - } - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, (u32) 0x55aaaa55); - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - val = R_REG(®s->objdata); - if (val != (u32) 0x55aaaa55) { - wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " - "expected 0x55aaaa55\n", wlc_hw->unit, val); - return false; - } - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, w); - - /* clear CFPStart */ - W_REG(®s->tsf_cfpstart, 0); - - w = R_REG(®s->maccontrol); - if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && - (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { - wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " - "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, - (MCTL_IHR_EN | MCTL_WAKE), - (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); - return false; - } - - return true; -} - -#define PHYPLL_WAIT_US 100000 - -void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) -{ - d11regs_t *regs; - u32 tmp; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - tmp = 0; - regs = wlc_hw->regs; - - if (on) { - if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { - OR_REG(®s->clk_ctl_st, - (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | - CCS_ERSRC_REQ_PHYPLL)); - SPINWAIT((R_REG(®s->clk_ctl_st) & - (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), - PHYPLL_WAIT_US); - - tmp = R_REG(®s->clk_ctl_st); - if ((tmp & (CCS_ERSRC_AVAIL_HT)) != - (CCS_ERSRC_AVAIL_HT)) { - wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" - " PLL failed\n", __func__); - } - } else { - OR_REG(®s->clk_ctl_st, - (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); - SPINWAIT((R_REG(®s->clk_ctl_st) & - (CCS_ERSRC_AVAIL_D11PLL | - CCS_ERSRC_AVAIL_PHYPLL)) != - (CCS_ERSRC_AVAIL_D11PLL | - CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); - - tmp = R_REG(®s->clk_ctl_st); - if ((tmp & - (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) - != - (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) { - wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " - "PHY PLL failed\n", __func__); - } - } - } else { - /* Since the PLL may be shared, other cores can still be requesting it; - * so we'll deassert the request but not wait for status to comply. - */ - AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); - tmp = R_REG(®s->clk_ctl_st); - } -} - -void wlc_coredisable(struct wlc_hw_info *wlc_hw) -{ - bool dev_gone; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - if (dev_gone) - return; - - if (wlc_hw->noreset) - return; - - /* radio off */ - wlc_phy_switch_radio(wlc_hw->band->pi, OFF); - - /* turn off analog core */ - wlc_phy_anacore(wlc_hw->band->pi, OFF); - - /* turn off PHYPLL to save power */ - wlc_bmac_core_phypll_ctl(wlc_hw, false); - - /* No need to set wlc->pub->radio_active = OFF - * because this function needs down capability and - * radio_active is designed for BCMNODOWN. - */ - - /* remove gpio controls */ - if (wlc_hw->ucode_dbgsel) - ai_gpiocontrol(wlc_hw->sih, ~0, 0, GPIO_DRV_PRIORITY); - - wlc_hw->clk = false; - ai_core_disable(wlc_hw->sih, 0); - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); -} - -/* power both the pll and external oscillator on/off */ -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); - - /* dont power down if plldown is false or we must poll hw radio disable */ - if (!want && wlc_hw->pllreq) - return; - - if (wlc_hw->sih) - ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); - - wlc_hw->sbclk = want; - if (!wlc_hw->sbclk) { - wlc_hw->clk = false; - if (wlc_hw->band && wlc_hw->band->pi) - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); - } -} - -static void wlc_flushqueues(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - uint i; - - wlc->txpend16165war = 0; - - /* free any posted tx packets */ - for (i = 0; i < NFIFO; i++) - if (wlc_hw->di[i]) { - dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); - TXPKTPENDCLR(wlc, i); - BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); - } - - /* free any posted rx packets */ - dma_rxreclaim(wlc_hw->di[RX_FIFO]); -} - -u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset) -{ - return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); -} - -void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v) -{ - wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); -} - -static u16 -wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) -{ - d11regs_t *regs = wlc_hw->regs; - volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; - volatile u16 *objdata_hi = objdata_lo + 1; - u16 v; - - W_REG(®s->objaddr, sel | (offset >> 2)); - (void)R_REG(®s->objaddr); - if (offset & 2) { - v = R_REG(objdata_hi); - } else { - v = R_REG(objdata_lo); - } - - return v; -} - -static void -wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) -{ - d11regs_t *regs = wlc_hw->regs; - volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; - volatile u16 *objdata_hi = objdata_lo + 1; - - W_REG(®s->objaddr, sel | (offset >> 2)); - (void)R_REG(®s->objaddr); - if (offset & 2) { - W_REG(objdata_hi, v); - } else { - W_REG(objdata_lo, v); - } -} - -/* Copy a buffer to shared memory of specified type . - * SHM 'offset' needs to be an even address and - * Buffer length 'len' must be an even number of bytes - * 'sel' selects the type of memory - */ -void -wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, - int len, u32 sel) -{ - u16 v; - const u8 *p = (const u8 *)buf; - int i; - - if (len <= 0 || (offset & 1) || (len & 1)) - return; - - for (i = 0; i < len; i += 2) { - v = p[i] | (p[i + 1] << 8); - wlc_bmac_write_objmem(wlc_hw, offset + i, v, sel); - } -} - -/* Copy a piece of shared memory of specified type to a buffer . - * SHM 'offset' needs to be an even address and - * Buffer length 'len' must be an even number of bytes - * 'sel' selects the type of memory - */ -void -wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, - int len, u32 sel) -{ - u16 v; - u8 *p = (u8 *) buf; - int i; - - if (len <= 0 || (offset & 1) || (len & 1)) - return; - - for (i = 0; i < len; i += 2) { - v = wlc_bmac_read_objmem(wlc_hw, offset + i, sel); - p[i] = v & 0xFF; - p[i + 1] = (v >> 8) & 0xFF; - } -} - -void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) -{ - BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", - wlc_hw->vars_size); - - *buf = wlc_hw->vars; - *len = wlc_hw->vars_size; -} - -void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) -{ - wlc_hw->SRL = SRL; - wlc_hw->LRL = LRL; - - /* write retry limit to SCR, shouldn't need to suspend */ - if (wlc_hw->up) { - W_REG(&wlc_hw->regs->objaddr, - OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); - W_REG(&wlc_hw->regs->objaddr, - OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); - } -} - -void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) -{ - if (set) { - if (mboolisset(wlc_hw->pllreq, req_bit)) - return; - - mboolset(wlc_hw->pllreq, req_bit); - - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { - if (!wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, ON); - } - } - } else { - if (!mboolisset(wlc_hw->pllreq, req_bit)) - return; - - mboolclr(wlc_hw->pllreq, req_bit); - - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { - if (wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, OFF); - } - } - } - - return; -} - -u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) -{ - u16 table_ptr; - u8 phy_rate, index; - - /* get the phy specific rate encoding for the PLCP SIGNAL field */ - /* XXX4321 fixup needed ? */ - if (IS_OFDM(rate)) - table_ptr = M_RT_DIRMAP_A; - else - table_ptr = M_RT_DIRMAP_B; - - /* for a given rate, the LS-nibble of the PLCP SIGNAL field is - * the index into the rate table. - */ - phy_rate = rate_info[rate] & WLC_RATE_MASK; - index = phy_rate & 0xf; - - /* Find the SHM pointer to the rate table entry by looking in the - * Direct-map Table - */ - return 2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)); -} - -void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail) -{ - wlc_hw->antsel_avail = antsel_avail; -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h deleted file mode 100644 index 8a582d1..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _BRCM_BOTTOM_MAC_H_ -#define _BRCM_BOTTOM_MAC_H_ - -/* XXXXX this interface is under wlc.c by design - * http://hwnbu-twiki.broadcom.com/bin/view/Mwgroup/WlBmacDesign - * - * high driver files(e.g. wlc_ampdu.c etc) - * wlc.h/wlc.c - * wlc_bmac.h/wlc_bmac.c - * - * So don't include this in files other than wlc.c, wlc_bmac* wl_rte.c(dongle port) and wl_phy.c - * create wrappers in wlc.c if needed - */ - -/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info) - driver */ -typedef struct wlc_bmac_state { - u32 machwcap; /* mac hw capibility */ - u32 preamble_ovr; /* preamble override */ -} wlc_bmac_state_t; - -enum { - IOV_BMAC_DIAG, - IOV_BMAC_SBGPIOTIMERVAL, - IOV_BMAC_SBGPIOOUT, - IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ - IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ - IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ - IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ - IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ - IOV_BMAC_OTPDUMP, - IOV_BMAC_OTPSTAT, - IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ - IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ - IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ - IOV_BMAC_PCIELCREG, /* PCIE LCREG */ - IOV_BMAC_SBGPIOTIMERMASK, - IOV_BMAC_RFDISABLEDLY, - IOV_BMAC_PCIEREG, /* PCIE REG */ - IOV_BMAC_PCICFGREG, /* PCI Config register */ - IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ - IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ - IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ - IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ - IOV_BMAC_DMALPBK, - IOV_BMAC_CCREG, - IOV_BMAC_COREREG, - IOV_BMAC_SDCIS, - IOV_BMAC_SDIO_DRIVE, - IOV_BMAC_OTPW, - IOV_BMAC_NVOTPW, - IOV_BMAC_SROM, - IOV_BMAC_SRCRC, - IOV_BMAC_CIS_SOURCE, - IOV_BMAC_CISVAR, - IOV_BMAC_OTPLOCK, - IOV_BMAC_OTP_CHIPID, - IOV_BMAC_CUSTOMVAR1, - IOV_BMAC_BOARDFLAGS, - IOV_BMAC_BOARDFLAGS2, - IOV_BMAC_WPSLED, - IOV_BMAC_NVRAM_SOURCE, - IOV_BMAC_OTP_RAW_READ, - IOV_BMAC_LAST -}; - -extern int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, - uint unit, bool piomode, void *regsva, uint bustype, - void *btparam); -extern int wlc_bmac_detach(struct wlc_info *wlc); -extern void wlc_bmac_watchdog(void *arg); - -/* up/down, reset, clk */ -extern void wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, - uint offset, const void *buf, int len, - u32 sel); -extern void wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, - void *buf, int len, u32 sel); -#define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) -#define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) - -extern void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on); -extern void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags); -extern void wlc_bmac_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute); -extern int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode); - -/* chanspec, ucode interface */ -extern void wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, - chanspec_t chanspec, - bool mute, struct txpwr_limits *txpwr); - -extern int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, - uint *blocks); -extern void wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, - u16 val, int bands); -extern void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val); -extern u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands); -extern void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant); -extern u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, - u8 antsel_type); -extern int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, - wlc_bmac_state_t *state); -extern void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v); -extern u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset); -extern void wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, - int len, void *buf); -extern void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, - uint *len); - -extern void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, - u8 *ea); - -extern bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot); -extern void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode); - -extern void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw); - -extern void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, - u32 override_bit); -extern void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, - u32 override_bit); - -extern void wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, - int match_reg_offset, - const u8 *addr); -extern void wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, - void *bcn, int len, bool both); - -extern void wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, - u32 *tsf_h_ptr); -extern void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin); -extern void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax); - -extern void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, - u16 LRL); - -extern void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw); - - -/* API for BMAC driver (e.g. wlc_phy.c etc) */ - -extern void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw); -extern void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, - mbool req_bit); -extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); -extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); -extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); - -#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h deleted file mode 100644 index 49c30cd..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_BSSCFG_H_ -#define _BRCM_BSSCFG_H_ - -/* Check if a particular BSS config is AP or STA */ -#define BSSCFG_AP(cfg) (0) -#define BSSCFG_STA(cfg) (1) - -#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) - -#define NTXRATE 64 /* # tx MPDUs rate is reported for */ -#define MAXMACLIST 64 /* max # source MAC matches */ -#define BCN_TEMPLATE_COUNT 2 - -/* Iterator for "associated" STA bss configs: - (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */ -#define FOREACH_AS_STA(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated) - -/* As above for all non-NULL BSS configs */ -#define FOREACH_BSS(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx])) - -/* BSS configuration state */ -struct wlc_bsscfg { - struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */ - bool up; /* is this configuration up operational */ - bool enable; /* is this configuration enabled */ - bool associated; /* is BSS in ASSOCIATED state */ - bool BSS; /* infraustructure or adhac */ - bool dtim_programmed; - - u8 SSID_len; /* the length of SSID */ - u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ - struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ - s8 _idx; /* the index of this bsscfg, - * assigned at wlc_bsscfg_alloc() - */ - /* MAC filter */ - uint nmac; /* # of entries on maclist array */ - int macmode; /* allow/deny stations on maclist array */ - struct ether_addr *maclist; /* list of source MAC addrs to match */ - - /* security */ - u32 wsec; /* wireless security bitvec */ - s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ - s16 openshared; /* try Open auth first, then Shared Key */ - bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ - bool eap_restrict; /* restrict data until 802.1X auth succeeds */ - u16 WPA_auth; /* WPA: authenticated key management */ - bool wpa2_preauth; /* default is true, wpa_cap sets value */ - bool wsec_portopen; /* indicates keys are plumbed */ - wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ - int wsec_index; /* 0-3: default tx key, -1: not set */ - wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ - - /* TKIP countermeasures */ - bool tkip_countermeasures; /* flags TKIP no-assoc period */ - u32 tk_cm_dt; /* detect timer */ - u32 tk_cm_bt; /* blocking timer */ - u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ - bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ - - u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ - u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ - u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ - u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ - - u32 flags; /* WLC_BSSCFG flags; see below */ - - u8 *bcn; /* AP beacon */ - uint bcn_len; /* AP beacon length */ - bool ar_disassoc; /* disassociated in associated recreation */ - - int auth_atmptd; /* auth type (open/shared) attempted */ - - pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ - uint npmkid_cand; /* num PMKID candidates */ - pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ - uint npmkid; /* num cached PMKIDs */ - - wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */ - - /* PM states */ - bool PMawakebcn; /* bcn recvd during current waking state */ - bool PMpending; /* waiting for tx status with PM indicated set */ - bool priorPMstate; /* Detecting PM state transitions */ - bool PSpoll; /* whether there is an outstanding PS-Poll frame */ - - /* BSSID entry in RCMTA, use the wsec key management infrastructure to - * manage the RCMTA entries. - */ - wsec_key_t *rcmta; - - /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ - u16 ID; - - uint txrspecidx; /* index into tx rate circular buffer */ - ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ -}; - -#define WLC_BSSCFG_11N_DISABLE 0x1000 /* Do not advertise .11n IEs for this BSS */ -#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */ - -#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0) -#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0) - -/* Extend N_ENAB to per-BSS */ -#define BSS_N_ENAB(wlc, cfg) \ - (N_ENAB((wlc)->pub) && !((cfg)->flags & WLC_BSSCFG_11N_DISABLE)) - -#define MBSS_BCN_ENAB(cfg) 0 -#define MBSS_PRB_ENAB(cfg) 0 -#define SOFTBCN_ENAB(pub) (0) -#define SOFTPRB_ENAB(pub) (0) -#define wlc_bsscfg_tx_check(a) do { } while (0); - -#endif /* _BRCM_BSSCFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h deleted file mode 100644 index 534c536..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_CFG_H_ -#define _BRCM_CFG_H_ - -#define NBANDS(wlc) ((wlc)->pub->_nbands) -#define NBANDS_PUB(pub) ((pub)->_nbands) -#define NBANDS_HW(hw) ((hw)->_nbands) - -#define IS_SINGLEBAND_5G(device) 0 - -/* **** Core type/rev defaults **** */ -#define D11_DEFAULT 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 - * also need to update wlc.h MAXCOREREV - */ - -#define NPHY_DEFAULT 0x000001ff /* Supported nphy revs: - * 0 4321a0 - * 1 4321a1 - * 2 4321b0/b1/c0/c1 - * 3 4322a0 - * 4 4322a1 - * 5 4716a0 - * 6 43222a0, 43224a0 - * 7 43226a0 - * 8 5357a0, 43236a0 - */ - -#define LCNPHY_DEFAULT 0x00000007 /* Supported lcnphy revs: - * 0 4313a0, 4336a0, 4330a0 - * 1 - * 2 4330a0 - */ - -#define SSLPNPHY_DEFAULT 0x0000000f /* Supported sslpnphy revs: - * 0 4329a0/k0 - * 1 4329b0/4329C0 - * 2 4319a0 - * 3 5356a0 - */ - - -/* For undefined values, use defaults */ -#ifndef D11CONF -#define D11CONF D11_DEFAULT -#endif -#ifndef NCONF -#define NCONF NPHY_DEFAULT -#endif -#ifndef LCNCONF -#define LCNCONF LCNPHY_DEFAULT -#endif - -#ifndef SSLPNCONF -#define SSLPNCONF SSLPNPHY_DEFAULT -#endif - -/******************************************************************** - * Phy/Core Configuration. Defines macros to to check core phy/rev * - * compile-time configuration. Defines default core support. * - * ****************************************************************** - */ - -/* Basic macros to check a configuration bitmask */ - -#define CONF_HAS(config, val) ((config) & (1 << (val))) -#define CONF_MSK(config, mask) ((config) & (mask)) -#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) -#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) - -#define CONF_IS(config, val) ((config) == (1 << (val))) -#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) -#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) -#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) -#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) - -/* Wrappers for some of the above, specific to config constants */ - -#define NCONF_HAS(val) CONF_HAS(NCONF, val) -#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) -#define NCONF_IS(val) CONF_IS(NCONF, val) -#define NCONF_GE(val) CONF_GE(NCONF, val) -#define NCONF_GT(val) CONF_GT(NCONF, val) -#define NCONF_LT(val) CONF_LT(NCONF, val) -#define NCONF_LE(val) CONF_LE(NCONF, val) - -#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) -#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) -#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) -#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) -#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) -#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) -#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) - -#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) -#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) -#define D11CONF_IS(val) CONF_IS(D11CONF, val) -#define D11CONF_GE(val) CONF_GE(D11CONF, val) -#define D11CONF_GT(val) CONF_GT(D11CONF, val) -#define D11CONF_LT(val) CONF_LT(D11CONF, val) -#define D11CONF_LE(val) CONF_LE(D11CONF, val) - -#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) -#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) - -#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) -#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) -#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) -#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) -#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) - -#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) -#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) -#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) -#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) -#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) - -#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) -#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) -#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) -#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) -#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) - -#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) - -/* Finally, early-exit from switch case if anyone wants it... */ - -#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break -#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break - -#if (D11CONF ^ (D11CONF & D11_DEFAULT)) -#error "Unsupported MAC revision configured" -#endif -#if (NCONF ^ (NCONF & NPHY_DEFAULT)) -#error "Unsupported NPHY revision configured" -#endif -#if (LCNCONF ^ (LCNCONF & LCNPHY_DEFAULT)) -#error "Unsupported LPPHY revision configured" -#endif - -/* *** Consistency checks *** */ -#if !D11CONF -#error "No MAC revisions configured!" -#endif - -#if !NCONF && !LCNCONF && !SSLPNCONF -#error "No PHY configured!" -#endif - -/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ - -#define _PHYCONF_N (1 << PHY_TYPE_N) - -#if LCNCONF -#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) -#else -#define _PHYCONF_LCN 0 -#endif /* LCNCONF */ - -#if SSLPNCONF -#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) -#else -#define _PHYCONF_SSLPN 0 -#endif /* SSLPNCONF */ - -#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) - -/* Utility macro to identify 802.11n (HT) capable PHYs */ -#define PHYTYPE_11N_CAP(phytype) \ - (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ - PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ - PHYTYPE_IS(phytype, PHY_TYPE_SSN)) - -/* Last but not least: shorter wlc-specific var checks */ -#define WLCISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) -#define WLCISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) -#define WLCISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) - -#define WLC_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) - -/********************************************************************** - * ------------- End of Core phy/rev configuration. ----------------- * - * ******************************************************************** - */ - -/************************************************* - * Defaults for tunables (e.g. sizing constants) - * - * For each new tunable, add a member to the end - * of wlc_tunables_t in wlc_pub.h to enable - * runtime checks of tunable values. (Directly - * using the macros in code invalidates ROM code) - * - * *********************************************** - */ -#ifndef NTXD -#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ -#endif /* NTXD */ -#ifndef NRXD -#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ -#endif /* NRXD */ - -#ifndef NRXBUFPOST -#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ -#endif /* NRXBUFPOST */ - -#ifndef MAXSCB /* station control blocks in cache */ -#define MAXSCB 32 /* Maximum SCBs in cache for STA */ -#endif /* MAXSCB */ - -#ifndef AMPDU_NUM_MPDU -#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ -#endif /* AMPDU_NUM_MPDU */ - -#ifndef AMPDU_NUM_MPDU_3STREAMS -#define AMPDU_NUM_MPDU_3STREAMS 32 /* max allowed number of mpdus in an ampdu for 3+ streams */ -#endif /* AMPDU_NUM_MPDU_3STREAMS */ - -/* Count of packet callback structures. either of following - * 1. Set to the number of SCBs since a STA - * can queue up a rate callback for each IBSS STA it knows about, and an AP can - * queue up an "are you there?" Null Data callback for each associated STA - * 2. controlled by tunable config file - */ -#ifndef MAXPKTCB -#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ -#endif /* MAXPKTCB */ - -#ifndef CTFPOOLSZ -#define CTFPOOLSZ 128 -#endif /* CTFPOOLSZ */ - -/* NetBSD also needs to keep track of this */ -#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */ -#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */ -#ifndef WLC_MAXBSSCFG -#define WLC_MAXBSSCFG (1) /* max # BSS configs */ -#endif /* WLC_MAXBSSCFG */ - -#ifndef MAXBSS -#define MAXBSS 64 /* max # available networks */ -#endif /* MAXBSS */ - -#ifndef WLC_DATAHIWAT -#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */ -#endif /* WLC_DATAHIWAT */ - -#ifndef WLC_AMPDUDATAHIWAT -#define WLC_AMPDUDATAHIWAT 255 -#endif /* WLC_AMPDUDATAHIWAT */ - -/* bounded rx loops */ -#ifndef RXBND -#define RXBND 8 /* max # frames to process in wlc_recv() */ -#endif /* RXBND */ -#ifndef TXSBND -#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ -#endif /* TXSBND */ - -#define BAND_5G(bt) ((bt) == WLC_BAND_5G) -#define BAND_2G(bt) ((bt) == WLC_BAND_2G) - -#define WLBANDINITDATA(_data) _data -#define WLBANDINITFN(_fn) _fn - -#endif /* _BRCM_CFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/wlc_channel.c deleted file mode 100644 index 9897123..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ /dev/null @@ -1,1554 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include "bcmdma.h" - -#include "wlc_types.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_bmac.h" -#include "wlc_rate.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_stf.h" - -#define VALID_CHANNEL20_DB(wlc, val) wlc_valid_channel20_db((wlc)->cmi, val) -#define VALID_CHANNEL20_IN_BAND(wlc, bandunit, val) \ - wlc_valid_channel20_in_band((wlc)->cmi, bandunit, val) -#define VALID_CHANNEL20(wlc, val) wlc_valid_channel20((wlc)->cmi, val) - -typedef struct wlc_cm_band { - u8 locale_flags; /* locale_info_t flags */ - chanvec_t valid_channels; /* List of valid channels in the country */ - const chanvec_t *restricted_channels; /* List of restricted use channels */ - const chanvec_t *radar_channels; /* List of radar sensitive channels */ - u8 PAD[8]; -} wlc_cm_band_t; - -struct wlc_cm_info { - struct wlc_pub *pub; - struct wlc_info *wlc; - char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ - uint srom_regrev; /* Regulatory Rev for the SROM ccode */ - const country_info_t *country; /* current country def */ - char ccode[WLC_CNTRY_BUF_SZ]; /* current internal Country Code */ - uint regrev; /* current Regulatory Revision */ - char country_abbrev[WLC_CNTRY_BUF_SZ]; /* current advertised ccode */ - wlc_cm_band_t bandstate[MAXBANDS]; /* per-band state (one per phy/radio) */ - /* quiet channels currently for radar sensitivity or 11h support */ - chanvec_t quiet_channels; /* channels on which we cannot transmit */ -}; - -static int wlc_channels_init(wlc_cm_info_t *wlc_cm, - const country_info_t *country); -static void wlc_set_country_common(wlc_cm_info_t *wlc_cm, - const char *country_abbrev, - const char *ccode, uint regrev, - const country_info_t *country); -static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode); -static int wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, - const char *country_abbrev, - const char *ccode, int regrev); -static int wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, - char *mapped_ccode, uint *mapped_regrev); -static const country_info_t *wlc_country_lookup_direct(const char *ccode, - uint regrev); -static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, - const char *ccode, - char *mapped_ccode, - uint *mapped_regrev); -static void wlc_channels_commit(wlc_cm_info_t *wlc_cm); -static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm); -static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec); -static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val); -static bool wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, - uint val); -static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val); -static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, - const char *ccode); -static void wlc_locale_get_channels(const locale_info_t *locale, - chanvec_t *valid_channels); -static const locale_info_t *wlc_get_locale_2g(u8 locale_idx); -static const locale_info_t *wlc_get_locale_5g(u8 locale_idx); -static bool wlc_japan(struct wlc_info *wlc); -static bool wlc_japan_ccode(const char *ccode); -static void wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t * - wlc_cm, - struct - txpwr_limits - *txpwr, - u8 - local_constraint_qdbm); -static void wlc_locale_add_channels(chanvec_t *target, - const chanvec_t *channels); -static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx); -static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx); - -/* QDB() macro takes a dB value and converts to a quarter dB value */ -#ifdef QDB -#undef QDB -#endif -#define QDB(n) ((n) * WLC_TXPWR_DB_FACTOR) - -/* Regulatory Matrix Spreadsheet (CLM) MIMO v3.7.9 */ - -/* - * Some common channel sets - */ - -/* No channels */ -static const chanvec_t chanvec_none = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* All 2.4 GHz HW channels */ -const chanvec_t chanvec_all_2G = { - {0xfe, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* All 5 GHz HW channels */ -const chanvec_t chanvec_all_5G = { - {0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x11, 0x11, - 0x01, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, - 0x11, 0x11, 0x20, 0x22, 0x22, 0x00, 0x00, 0x11, - 0x11, 0x11, 0x11, 0x01} -}; - -/* - * Radar channel sets - */ - -/* No radar */ -#define radar_set_none chanvec_none - -static const chanvec_t radar_set1 = { /* Channels 52 - 64, 100 - 140 */ - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, /* 52 - 60 */ - 0x01, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, /* 64, 100 - 124 */ - 0x11, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 128 - 140 */ - 0x00, 0x00, 0x00, 0x00} -}; - -/* - * Restricted channel sets - */ - -#define restricted_set_none chanvec_none - -/* Channels 34, 38, 42, 46 */ -static const chanvec_t restricted_set_japan_legacy = { - {0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* Channels 12, 13 */ -static const chanvec_t restricted_set_2g_short = { - {0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* Channel 165 */ -static const chanvec_t restricted_chan_165 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* Channels 36 - 48 & 149 - 165 */ -static const chanvec_t restricted_low_hi = { - {0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x20, 0x22, 0x22, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* Channels 12 - 14 */ -static const chanvec_t restricted_set_12_13_14 = { - {0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -#define LOCALE_CHAN_01_11 (1<<0) -#define LOCALE_CHAN_12_13 (1<<1) -#define LOCALE_CHAN_14 (1<<2) -#define LOCALE_SET_5G_LOW_JP1 (1<<3) /* 34-48, step 2 */ -#define LOCALE_SET_5G_LOW_JP2 (1<<4) /* 34-46, step 4 */ -#define LOCALE_SET_5G_LOW1 (1<<5) /* 36-48, step 4 */ -#define LOCALE_SET_5G_LOW2 (1<<6) /* 52 */ -#define LOCALE_SET_5G_LOW3 (1<<7) /* 56-64, step 4 */ -#define LOCALE_SET_5G_MID1 (1<<8) /* 100-116, step 4 */ -#define LOCALE_SET_5G_MID2 (1<<9) /* 120-124, step 4 */ -#define LOCALE_SET_5G_MID3 (1<<10) /* 128 */ -#define LOCALE_SET_5G_HIGH1 (1<<11) /* 132-140, step 4 */ -#define LOCALE_SET_5G_HIGH2 (1<<12) /* 149-161, step 4 */ -#define LOCALE_SET_5G_HIGH3 (1<<13) /* 165 */ -#define LOCALE_CHAN_52_140_ALL (1<<14) -#define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */ - -#define LOCALE_CHAN_36_64 (LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3) -#define LOCALE_CHAN_52_64 (LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3) -#define LOCALE_CHAN_100_124 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2) -#define LOCALE_CHAN_100_140 \ - (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1) -#define LOCALE_CHAN_149_165 (LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3) -#define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4 - -#define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14) - -#define LOCALE_RADAR_SET_NONE 0 -#define LOCALE_RADAR_SET_1 1 - -#define LOCALE_RESTRICTED_NONE 0 -#define LOCALE_RESTRICTED_SET_2G_SHORT 1 -#define LOCALE_RESTRICTED_CHAN_165 2 -#define LOCALE_CHAN_ALL_5G 3 -#define LOCALE_RESTRICTED_JAPAN_LEGACY 4 -#define LOCALE_RESTRICTED_11D_2G 5 -#define LOCALE_RESTRICTED_11D_5G 6 -#define LOCALE_RESTRICTED_LOW_HI 7 -#define LOCALE_RESTRICTED_12_13_14 8 - -/* global memory to provide working buffer for expanded locale */ - -static const chanvec_t *g_table_radar_set[] = { - &chanvec_none, - &radar_set1 -}; - -static const chanvec_t *g_table_restricted_chan[] = { - &chanvec_none, /* restricted_set_none */ - &restricted_set_2g_short, - &restricted_chan_165, - &chanvec_all_5G, - &restricted_set_japan_legacy, - &chanvec_all_2G, /* restricted_set_11d_2G */ - &chanvec_all_5G, /* restricted_set_11d_5G */ - &restricted_low_hi, - &restricted_set_12_13_14 -}; - -static const chanvec_t locale_2g_01_11 = { - {0xfe, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_2g_12_13 = { - {0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_2g_14 = { - {0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_LOW_JP1 = { - {0x00, 0x00, 0x00, 0x00, 0x54, 0x55, 0x01, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_LOW_JP2 = { - {0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_LOW1 = { - {0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_LOW2 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_LOW3 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_MID1 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_MID2 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_MID3 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_HIGH1 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_HIGH2 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x20, 0x22, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_HIGH3 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_52_140_ALL = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, - 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, - 0x11, 0x11, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static const chanvec_t locale_5g_HIGH4 = { - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, - 0x11, 0x11, 0x11, 0x11} -}; - -static const chanvec_t *g_table_locale_base[] = { - &locale_2g_01_11, - &locale_2g_12_13, - &locale_2g_14, - &locale_5g_LOW_JP1, - &locale_5g_LOW_JP2, - &locale_5g_LOW1, - &locale_5g_LOW2, - &locale_5g_LOW3, - &locale_5g_MID1, - &locale_5g_MID2, - &locale_5g_MID3, - &locale_5g_HIGH1, - &locale_5g_HIGH2, - &locale_5g_HIGH3, - &locale_5g_52_140_ALL, - &locale_5g_HIGH4 -}; - -static void wlc_locale_add_channels(chanvec_t *target, - const chanvec_t *channels) -{ - u8 i; - for (i = 0; i < sizeof(chanvec_t); i++) { - target->vec[i] |= channels->vec[i]; - } -} - -static void wlc_locale_get_channels(const locale_info_t *locale, - chanvec_t *channels) -{ - u8 i; - - memset(channels, 0, sizeof(chanvec_t)); - - for (i = 0; i < ARRAY_SIZE(g_table_locale_base); i++) { - if (locale->valid_channels & (1 << i)) { - wlc_locale_add_channels(channels, - g_table_locale_base[i]); - } - } -} - -/* - * Locale Definitions - 2.4 GHz - */ -static const locale_info_t locale_i = { /* locale i. channel 1 - 13 */ - LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13, - LOCALE_RADAR_SET_NONE, - LOCALE_RESTRICTED_SET_2G_SHORT, - {QDB(19), QDB(19), QDB(19), - QDB(19), QDB(19), QDB(19)}, - {20, 20, 20, 0}, - WLC_EIRP -}; - -/* - * Locale Definitions - 5 GHz - */ -static const locale_info_t locale_11 = { - /* locale 11. channel 36 - 48, 52 - 64, 100 - 140, 149 - 165 */ - LOCALE_CHAN_36_64 | LOCALE_CHAN_100_140 | LOCALE_CHAN_149_165, - LOCALE_RADAR_SET_1, - LOCALE_RESTRICTED_NONE, - {QDB(21), QDB(21), QDB(21), QDB(21), QDB(21)}, - {23, 23, 23, 30, 30}, - WLC_EIRP | WLC_DFS_EU -}; - -#define LOCALE_2G_IDX_i 0 -static const locale_info_t *g_locale_2g_table[] = { - &locale_i -}; - -#define LOCALE_5G_IDX_11 0 -static const locale_info_t *g_locale_5g_table[] = { - &locale_11 -}; - -/* - * MIMO Locale Definitions - 2.4 GHz - */ -static const locale_mimo_info_t locale_bn = { - {QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), - QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), - QDB(13), QDB(13), QDB(13)}, - {0, 0, QDB(13), QDB(13), QDB(13), - QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), - QDB(13), 0, 0}, - 0 -}; - -/* locale mimo 2g indexes */ -#define LOCALE_MIMO_IDX_bn 0 - -static const locale_mimo_info_t *g_mimo_2g_table[] = { - &locale_bn -}; - -/* - * MIMO Locale Definitions - 5 GHz - */ -static const locale_mimo_info_t locale_11n = { - { /* 12.5 dBm */ 50, 50, 50, QDB(15), QDB(15)}, - {QDB(14), QDB(15), QDB(15), QDB(15), QDB(15)}, - 0 -}; - -#define LOCALE_MIMO_IDX_11n 0 -static const locale_mimo_info_t *g_mimo_5g_table[] = { - &locale_11n -}; - -#ifdef LC -#undef LC -#endif -#define LC(id) LOCALE_MIMO_IDX_ ## id - -#ifdef LC_2G -#undef LC_2G -#endif -#define LC_2G(id) LOCALE_2G_IDX_ ## id - -#ifdef LC_5G -#undef LC_5G -#endif -#define LC_5G(id) LOCALE_5G_IDX_ ## id - -#define LOCALES(band2, band5, mimo2, mimo5) {LC_2G(band2), LC_5G(band5), LC(mimo2), LC(mimo5)} - -static const struct { - char abbrev[WLC_CNTRY_BUF_SZ]; /* country abbreviation */ - country_info_t country; -} cntry_locales[] = { - { - "X2", LOCALES(i, 11, bn, 11n)}, /* Worldwide RoW 2 */ -}; - -#ifdef SUPPORT_40MHZ -/* 20MHz channel info for 40MHz pairing support */ -struct chan20_info { - u8 sb; - u8 adj_sbs; -}; - -/* indicates adjacent channels that are allowed for a 40 Mhz channel and - * those that permitted by the HT - */ -struct chan20_info chan20_info[] = { - /* 11b/11g */ -/* 0 */ {1, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 1 */ {2, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 2 */ {3, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 3 */ {4, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 4 */ {5, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, -/* 5 */ {6, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, -/* 6 */ {7, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, -/* 7 */ {8, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, -/* 8 */ {9, (CH_UPPER_SB | CH_LOWER_SB | CH_EWA_VALID)}, -/* 9 */ {10, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 10 */ {11, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 11 */ {12, (CH_LOWER_SB)}, -/* 12 */ {13, (CH_LOWER_SB)}, -/* 13 */ {14, (CH_LOWER_SB)}, - -/* 11a japan high */ -/* 14 */ {34, (CH_UPPER_SB)}, -/* 15 */ {38, (CH_LOWER_SB)}, -/* 16 */ {42, (CH_LOWER_SB)}, -/* 17 */ {46, (CH_LOWER_SB)}, - -/* 11a usa low */ -/* 18 */ {36, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 19 */ {40, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 20 */ {44, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 21 */ {48, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 22 */ {52, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 23 */ {56, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 24 */ {60, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 25 */ {64, (CH_LOWER_SB | CH_EWA_VALID)}, - -/* 11a Europe */ -/* 26 */ {100, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 27 */ {104, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 28 */ {108, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 29 */ {112, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 30 */ {116, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 31 */ {120, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 32 */ {124, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 33 */ {128, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 34 */ {132, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 35 */ {136, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 36 */ {140, (CH_LOWER_SB)}, - -/* 11a usa high, ref5 only */ -/* The 0x80 bit in pdiv means these are REF5, other entries are REF20 */ -/* 37 */ {149, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 38 */ {153, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 39 */ {157, (CH_UPPER_SB | CH_EWA_VALID)}, -/* 40 */ {161, (CH_LOWER_SB | CH_EWA_VALID)}, -/* 41 */ {165, (CH_LOWER_SB)}, - -/* 11a japan */ -/* 42 */ {184, (CH_UPPER_SB)}, -/* 43 */ {188, (CH_LOWER_SB)}, -/* 44 */ {192, (CH_UPPER_SB)}, -/* 45 */ {196, (CH_LOWER_SB)}, -/* 46 */ {200, (CH_UPPER_SB)}, -/* 47 */ {204, (CH_LOWER_SB)}, -/* 48 */ {208, (CH_UPPER_SB)}, -/* 49 */ {212, (CH_LOWER_SB)}, -/* 50 */ {216, (CH_LOWER_SB)} -}; -#endif /* SUPPORT_40MHZ */ - -static const locale_info_t *wlc_get_locale_2g(u8 locale_idx) -{ - if (locale_idx >= ARRAY_SIZE(g_locale_2g_table)) { - return NULL; /* error condition */ - } - return g_locale_2g_table[locale_idx]; -} - -static const locale_info_t *wlc_get_locale_5g(u8 locale_idx) -{ - if (locale_idx >= ARRAY_SIZE(g_locale_5g_table)) { - return NULL; /* error condition */ - } - return g_locale_5g_table[locale_idx]; -} - -static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx) -{ - if (locale_idx >= ARRAY_SIZE(g_mimo_2g_table)) { - return NULL; - } - return g_mimo_2g_table[locale_idx]; -} - -static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx) -{ - if (locale_idx >= ARRAY_SIZE(g_mimo_5g_table)) { - return NULL; - } - return g_mimo_5g_table[locale_idx]; -} - -wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc) -{ - wlc_cm_info_t *wlc_cm; - char country_abbrev[WLC_CNTRY_BUF_SZ]; - const country_info_t *country; - struct wlc_pub *pub = wlc->pub; - char *ccode; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - wlc_cm = kzalloc(sizeof(wlc_cm_info_t), GFP_ATOMIC); - if (wlc_cm == NULL) { - wiphy_err(wlc->wiphy, "wl%d: %s: out of memory", pub->unit, - __func__); - return NULL; - } - wlc_cm->pub = pub; - wlc_cm->wlc = wlc; - wlc->cmi = wlc_cm; - - /* store the country code for passing up as a regulatory hint */ - ccode = getvar(wlc->pub->vars, "ccode"); - if (ccode) { - strncpy(wlc->pub->srom_ccode, ccode, WLC_CNTRY_BUF_SZ - 1); - } - - /* internal country information which must match regulatory constraints in firmware */ - memset(country_abbrev, 0, WLC_CNTRY_BUF_SZ); - strncpy(country_abbrev, "X2", sizeof(country_abbrev) - 1); - country = wlc_country_lookup(wlc, country_abbrev); - - /* save default country for exiting 11d regulatory mode */ - strncpy(wlc->country_default, country_abbrev, WLC_CNTRY_BUF_SZ - 1); - - /* initialize autocountry_default to driver default */ - strncpy(wlc->autocountry_default, "X2", WLC_CNTRY_BUF_SZ - 1); - - wlc_set_countrycode(wlc_cm, country_abbrev); - - return wlc_cm; -} - -void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm) -{ - kfree(wlc_cm); -} - -u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, uint bandunit) -{ - return wlc_cm->bandstate[bandunit].locale_flags; -} - -/* set the driver's current country and regulatory information using a country code - * as the source. Lookup built in country information found with the country code. - */ -static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode) -{ - char country_abbrev[WLC_CNTRY_BUF_SZ]; - strncpy(country_abbrev, ccode, WLC_CNTRY_BUF_SZ); - return wlc_set_countrycode_rev(wlc_cm, country_abbrev, ccode, -1); -} - -static int -wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, - const char *country_abbrev, - const char *ccode, int regrev) -{ - const country_info_t *country; - char mapped_ccode[WLC_CNTRY_BUF_SZ]; - uint mapped_regrev; - - /* if regrev is -1, lookup the mapped country code, - * otherwise use the ccode and regrev directly - */ - if (regrev == -1) { - /* map the country code to a built-in country code, regrev, and country_info */ - country = - wlc_countrycode_map(wlc_cm, ccode, mapped_ccode, - &mapped_regrev); - } else { - /* find the matching built-in country definition */ - country = wlc_country_lookup_direct(ccode, regrev); - strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); - mapped_regrev = regrev; - } - - if (country == NULL) - return -EINVAL; - - /* set the driver state for the country */ - wlc_set_country_common(wlc_cm, country_abbrev, mapped_ccode, - mapped_regrev, country); - - return 0; -} - -/* set the driver's current country and regulatory information using a country code - * as the source. Look up built in country information found with the country code. - */ -static void -wlc_set_country_common(wlc_cm_info_t *wlc_cm, - const char *country_abbrev, - const char *ccode, uint regrev, - const country_info_t *country) -{ - const locale_mimo_info_t *li_mimo; - const locale_info_t *locale; - struct wlc_info *wlc = wlc_cm->wlc; - char prev_country_abbrev[WLC_CNTRY_BUF_SZ]; - - /* save current country state */ - wlc_cm->country = country; - - memset(&prev_country_abbrev, 0, WLC_CNTRY_BUF_SZ); - strncpy(prev_country_abbrev, wlc_cm->country_abbrev, - WLC_CNTRY_BUF_SZ - 1); - - strncpy(wlc_cm->country_abbrev, country_abbrev, WLC_CNTRY_BUF_SZ - 1); - strncpy(wlc_cm->ccode, ccode, WLC_CNTRY_BUF_SZ - 1); - wlc_cm->regrev = regrev; - - /* disable/restore nmode based on country regulations */ - li_mimo = wlc_get_mimo_2g(country->locale_mimo_2G); - if (li_mimo && (li_mimo->flags & WLC_NO_MIMO)) { - wlc_set_nmode(wlc, OFF); - wlc->stf->no_cddstbc = true; - } else { - wlc->stf->no_cddstbc = false; - if (N_ENAB(wlc->pub) != wlc->protection->nmode_user) - wlc_set_nmode(wlc, wlc->protection->nmode_user); - } - - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); - /* set or restore gmode as required by regulatory */ - locale = wlc_get_locale_2g(country->locale_2G); - if (locale && (locale->flags & WLC_NO_OFDM)) { - wlc_set_gmode(wlc, GMODE_LEGACY_B, false); - } else { - wlc_set_gmode(wlc, wlc->protection->gmode_user, false); - } - - wlc_channels_init(wlc_cm, country); - - return; -} - -/* Lookup a country info structure from a null terminated country code - * The lookup is case sensitive. - */ -static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, - const char *ccode) -{ - const country_info_t *country; - char mapped_ccode[WLC_CNTRY_BUF_SZ]; - uint mapped_regrev; - - /* map the country code to a built-in country code, regrev, and country_info struct */ - country = - wlc_countrycode_map(wlc->cmi, ccode, mapped_ccode, &mapped_regrev); - - return country; -} - -static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, - const char *ccode, - char *mapped_ccode, - uint *mapped_regrev) -{ - struct wlc_info *wlc = wlc_cm->wlc; - const country_info_t *country; - uint srom_regrev = wlc_cm->srom_regrev; - const char *srom_ccode = wlc_cm->srom_ccode; - int mapped; - - /* check for currently supported ccode size */ - if (strlen(ccode) > (WLC_CNTRY_BUF_SZ - 1)) { - wiphy_err(wlc->wiphy, "wl%d: %s: ccode \"%s\" too long for " - "match\n", wlc->pub->unit, __func__, ccode); - return NULL; - } - - /* default mapping is the given ccode and regrev 0 */ - strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); - *mapped_regrev = 0; - - /* If the desired country code matches the srom country code, - * then the mapped country is the srom regulatory rev. - * Otherwise look for an aggregate mapping. - */ - if (!strcmp(srom_ccode, ccode)) { - *mapped_regrev = srom_regrev; - mapped = 0; - wiphy_err(wlc->wiphy, "srom_code == ccode %s\n", __func__); - } else { - mapped = - wlc_country_aggregate_map(wlc_cm, ccode, mapped_ccode, - mapped_regrev); - } - - /* find the matching built-in country definition */ - country = wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); - - /* if there is not an exact rev match, default to rev zero */ - if (country == NULL && *mapped_regrev != 0) { - *mapped_regrev = 0; - country = - wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); - } - - return country; -} - -static int -wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, - char *mapped_ccode, uint *mapped_regrev) -{ - return false; -} - -/* Lookup a country info structure from a null terminated country - * abbreviation and regrev directly with no translation. - */ -static const country_info_t *wlc_country_lookup_direct(const char *ccode, - uint regrev) -{ - uint size, i; - - /* Should just return 0 for single locale driver. */ - /* Keep it this way in case we add more locales. (for now anyway) */ - - /* all other country def arrays are for regrev == 0, so if regrev is non-zero, fail */ - if (regrev > 0) - return NULL; - - /* find matched table entry from country code */ - size = ARRAY_SIZE(cntry_locales); - for (i = 0; i < size; i++) { - if (strcmp(ccode, cntry_locales[i].abbrev) == 0) { - return &cntry_locales[i].country; - } - } - return NULL; -} - -static int -wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) -{ - struct wlc_info *wlc = wlc_cm->wlc; - uint i, j; - struct wlcband *band; - const locale_info_t *li; - chanvec_t sup_chan; - const locale_mimo_info_t *li_mimo; - - band = wlc->band; - for (i = 0; i < NBANDS(wlc); - i++, band = wlc->bandstate[OTHERBANDUNIT(wlc)]) { - - li = BAND_5G(band->bandtype) ? - wlc_get_locale_5g(country->locale_5G) : - wlc_get_locale_2g(country->locale_2G); - wlc_cm->bandstate[band->bandunit].locale_flags = li->flags; - li_mimo = BAND_5G(band->bandtype) ? - wlc_get_mimo_5g(country->locale_mimo_5G) : - wlc_get_mimo_2g(country->locale_mimo_2G); - - /* merge the mimo non-mimo locale flags */ - wlc_cm->bandstate[band->bandunit].locale_flags |= - li_mimo->flags; - - wlc_cm->bandstate[band->bandunit].restricted_channels = - g_table_restricted_chan[li->restricted_channels]; - wlc_cm->bandstate[band->bandunit].radar_channels = - g_table_radar_set[li->radar_channels]; - - /* set the channel availability, - * masking out the channels that may not be supported on this phy - */ - wlc_phy_chanspec_band_validch(band->pi, band->bandtype, - &sup_chan); - wlc_locale_get_channels(li, - &wlc_cm->bandstate[band->bandunit]. - valid_channels); - for (j = 0; j < sizeof(chanvec_t); j++) - wlc_cm->bandstate[band->bandunit].valid_channels. - vec[j] &= sup_chan.vec[j]; - } - - wlc_quiet_channels_reset(wlc_cm); - wlc_channels_commit(wlc_cm); - - return 0; -} - -/* Update the radio state (enable/disable) and tx power targets - * based on a new set of channel/regulatory information - */ -static void wlc_channels_commit(wlc_cm_info_t *wlc_cm) -{ - struct wlc_info *wlc = wlc_cm->wlc; - uint chan; - struct txpwr_limits txpwr; - - /* search for the existence of any valid channel */ - for (chan = 0; chan < MAXCHANNEL; chan++) { - if (VALID_CHANNEL20_DB(wlc, chan)) { - break; - } - } - if (chan == MAXCHANNEL) - chan = INVCHANNEL; - - /* based on the channel search above, set or clear WL_RADIO_COUNTRY_DISABLE */ - if (chan == INVCHANNEL) { - /* country/locale with no valid channels, set the radio disable bit */ - mboolset(wlc->pub->radio_disabled, WL_RADIO_COUNTRY_DISABLE); - wiphy_err(wlc->wiphy, "wl%d: %s: no valid channel for \"%s\" " - "nbands %d bandlocked %d\n", wlc->pub->unit, - __func__, wlc_cm->country_abbrev, NBANDS(wlc), - wlc->bandlocked); - } else - if (mboolisset(wlc->pub->radio_disabled, - WL_RADIO_COUNTRY_DISABLE)) { - /* country/locale with valid channel, clear the radio disable bit */ - mboolclr(wlc->pub->radio_disabled, WL_RADIO_COUNTRY_DISABLE); - } - - /* Now that the country abbreviation is set, if the radio supports 2G, then - * set channel 14 restrictions based on the new locale. - */ - if (NBANDS(wlc) > 1 || BAND_2G(wlc->band->bandtype)) { - wlc_phy_chanspec_ch14_widefilter_set(wlc->band->pi, - wlc_japan(wlc) ? true : - false); - } - - if (wlc->pub->up && chan != INVCHANNEL) { - wlc_channel_reg_limits(wlc_cm, wlc->chanspec, &txpwr); - wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, - &txpwr, - WLC_TXPWR_MAX); - wlc_phy_txpower_limit_set(wlc->band->pi, &txpwr, wlc->chanspec); - } -} - -/* reset the quiet channels vector to the union of the restricted and radar channel sets */ -static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm) -{ - struct wlc_info *wlc = wlc_cm->wlc; - uint i, j; - struct wlcband *band; - const chanvec_t *chanvec; - - memset(&wlc_cm->quiet_channels, 0, sizeof(chanvec_t)); - - band = wlc->band; - for (i = 0; i < NBANDS(wlc); - i++, band = wlc->bandstate[OTHERBANDUNIT(wlc)]) { - - /* initialize quiet channels for restricted channels */ - chanvec = wlc_cm->bandstate[band->bandunit].restricted_channels; - for (j = 0; j < sizeof(chanvec_t); j++) - wlc_cm->quiet_channels.vec[j] |= chanvec->vec[j]; - - } -} - -static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec) -{ - return N_ENAB(wlc_cm->wlc->pub) && CHSPEC_IS40(chspec) ? - (isset - (wlc_cm->quiet_channels.vec, - LOWER_20_SB(CHSPEC_CHANNEL(chspec))) - || isset(wlc_cm->quiet_channels.vec, - UPPER_20_SB(CHSPEC_CHANNEL(chspec)))) : isset(wlc_cm-> - quiet_channels. - vec, - CHSPEC_CHANNEL - (chspec)); -} - -/* Is the channel valid for the current locale? (but don't consider channels not - * available due to bandlocking) - */ -static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val) -{ - struct wlc_info *wlc = wlc_cm->wlc; - - return VALID_CHANNEL20(wlc, val) || - (!wlc->bandlocked - && VALID_CHANNEL20_IN_BAND(wlc, OTHERBANDUNIT(wlc), val)); -} - -/* Is the channel valid for the current locale and specified band? */ -static bool -wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, uint val) -{ - return ((val < MAXCHANNEL) - && isset(wlc_cm->bandstate[bandunit].valid_channels.vec, val)); -} - -/* Is the channel valid for the current locale and current band? */ -static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val) -{ - struct wlc_info *wlc = wlc_cm->wlc; - - return ((val < MAXCHANNEL) && - isset(wlc_cm->bandstate[wlc->band->bandunit].valid_channels.vec, - val)); -} - -static void -wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t *wlc_cm, - struct txpwr_limits *txpwr, - u8 - local_constraint_qdbm) -{ - int j; - - /* CCK Rates */ - for (j = 0; j < WL_TX_POWER_CCK_NUM; j++) { - txpwr->cck[j] = min(txpwr->cck[j], local_constraint_qdbm); - } - - /* 20 MHz Legacy OFDM SISO */ - for (j = 0; j < WL_TX_POWER_OFDM_NUM; j++) { - txpwr->ofdm[j] = min(txpwr->ofdm[j], local_constraint_qdbm); - } - - /* 20 MHz Legacy OFDM CDD */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { - txpwr->ofdm_cdd[j] = - min(txpwr->ofdm_cdd[j], local_constraint_qdbm); - } - - /* 40 MHz Legacy OFDM SISO */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { - txpwr->ofdm_40_siso[j] = - min(txpwr->ofdm_40_siso[j], local_constraint_qdbm); - } - - /* 40 MHz Legacy OFDM CDD */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { - txpwr->ofdm_40_cdd[j] = - min(txpwr->ofdm_40_cdd[j], local_constraint_qdbm); - } - - /* 20MHz MCS 0-7 SISO */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_20_siso[j] = - min(txpwr->mcs_20_siso[j], local_constraint_qdbm); - } - - /* 20MHz MCS 0-7 CDD */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_20_cdd[j] = - min(txpwr->mcs_20_cdd[j], local_constraint_qdbm); - } - - /* 20MHz MCS 0-7 STBC */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_20_stbc[j] = - min(txpwr->mcs_20_stbc[j], local_constraint_qdbm); - } - - /* 20MHz MCS 8-15 MIMO */ - for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) - txpwr->mcs_20_mimo[j] = - min(txpwr->mcs_20_mimo[j], local_constraint_qdbm); - - /* 40MHz MCS 0-7 SISO */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_40_siso[j] = - min(txpwr->mcs_40_siso[j], local_constraint_qdbm); - } - - /* 40MHz MCS 0-7 CDD */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_40_cdd[j] = - min(txpwr->mcs_40_cdd[j], local_constraint_qdbm); - } - - /* 40MHz MCS 0-7 STBC */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { - txpwr->mcs_40_stbc[j] = - min(txpwr->mcs_40_stbc[j], local_constraint_qdbm); - } - - /* 40MHz MCS 8-15 MIMO */ - for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) - txpwr->mcs_40_mimo[j] = - min(txpwr->mcs_40_mimo[j], local_constraint_qdbm); - - /* 40MHz MCS 32 */ - txpwr->mcs32 = min(txpwr->mcs32, local_constraint_qdbm); - -} - -void -wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, - u8 local_constraint_qdbm) -{ - struct wlc_info *wlc = wlc_cm->wlc; - struct txpwr_limits txpwr; - - wlc_channel_reg_limits(wlc_cm, chanspec, &txpwr); - - wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, &txpwr, - local_constraint_qdbm); - - wlc_bmac_set_chanspec(wlc->hw, chanspec, - (wlc_quiet_chanspec(wlc_cm, chanspec) != 0), - &txpwr); -} - -#ifdef POWER_DBG -static void wlc_phy_txpower_limits_dump(txpwr_limits_t *txpwr) -{ - int i; - char buf[80]; - char fraction[4][4] = { " ", ".25", ".5 ", ".75" }; - - sprintf(buf, "CCK "); - for (i = 0; i < WLC_NUM_RATES_CCK; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->cck[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->cck[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz OFDM SISO "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz OFDM CDD "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_cdd[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz OFDM SISO "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_40_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_40_siso[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz OFDM CDD "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_40_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz MCS0-7 SISO "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_siso[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz MCS0-7 CDD "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_cdd[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz MCS0-7 STBC "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_stbc[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_stbc[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "20 MHz MCS8-15 SDM "); - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_mimo[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_mimo[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz MCS0-7 SISO "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_siso[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz MCS0-7 CDD "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz MCS0-7 STBC "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_stbc[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_stbc[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - sprintf(buf, "40 MHz MCS8-15 SDM "); - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { - sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_mimo[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_mimo[i] % WLC_TXPWR_DB_FACTOR]); - } - printk(KERN_DEBUG "%s\n", buf); - - printk(KERN_DEBUG "MCS32 %2d%s\n", - txpwr->mcs32 / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs32 % WLC_TXPWR_DB_FACTOR]); -} -#endif /* POWER_DBG */ - -void -wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, - txpwr_limits_t *txpwr) -{ - struct wlc_info *wlc = wlc_cm->wlc; - uint i; - uint chan; - int maxpwr; - int delta; - const country_info_t *country; - struct wlcband *band; - const locale_info_t *li; - int conducted_max; - int conducted_ofdm_max; - const locale_mimo_info_t *li_mimo; - int maxpwr20, maxpwr40; - int maxpwr_idx; - uint j; - - memset(txpwr, 0, sizeof(txpwr_limits_t)); - - if (!wlc_valid_chanspec_db(wlc_cm, chanspec)) { - country = wlc_country_lookup(wlc, wlc->autocountry_default); - if (country == NULL) - return; - } else { - country = wlc_cm->country; - } - - chan = CHSPEC_CHANNEL(chanspec); - band = wlc->bandstate[CHSPEC_WLCBANDUNIT(chanspec)]; - li = BAND_5G(band->bandtype) ? - wlc_get_locale_5g(country->locale_5G) : - wlc_get_locale_2g(country->locale_2G); - - li_mimo = BAND_5G(band->bandtype) ? - wlc_get_mimo_5g(country->locale_mimo_5G) : - wlc_get_mimo_2g(country->locale_mimo_2G); - - if (li->flags & WLC_EIRP) { - delta = band->antgain; - } else { - delta = 0; - if (band->antgain > QDB(6)) - delta = band->antgain - QDB(6); /* Excess over 6 dB */ - } - - if (li == &locale_i) { - conducted_max = QDB(22); - conducted_ofdm_max = QDB(22); - } - - /* CCK txpwr limits for 2.4G band */ - if (BAND_2G(band->bandtype)) { - maxpwr = li->maxpwr[CHANNEL_POWER_IDX_2G_CCK(chan)]; - - maxpwr = maxpwr - delta; - maxpwr = max(maxpwr, 0); - maxpwr = min(maxpwr, conducted_max); - - for (i = 0; i < WLC_NUM_RATES_CCK; i++) - txpwr->cck[i] = (u8) maxpwr; - } - - /* OFDM txpwr limits for 2.4G or 5G bands */ - if (BAND_2G(band->bandtype)) { - maxpwr = li->maxpwr[CHANNEL_POWER_IDX_2G_OFDM(chan)]; - - } else { - maxpwr = li->maxpwr[CHANNEL_POWER_IDX_5G(chan)]; - } - - maxpwr = maxpwr - delta; - maxpwr = max(maxpwr, 0); - maxpwr = min(maxpwr, conducted_ofdm_max); - - /* Keep OFDM lmit below CCK limit */ - if (BAND_2G(band->bandtype)) - maxpwr = min_t(int, maxpwr, txpwr->cck[0]); - - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - txpwr->ofdm[i] = (u8) maxpwr; - } - - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { - /* OFDM 40 MHz SISO has the same power as the corresponding MCS0-7 rate unless - * overriden by the locale specific code. We set this value to 0 as a - * flag (presumably 0 dBm isn't a possibility) and then copy the MCS0-7 value - * to the 40 MHz value if it wasn't explicitly set. - */ - txpwr->ofdm_40_siso[i] = 0; - - txpwr->ofdm_cdd[i] = (u8) maxpwr; - - txpwr->ofdm_40_cdd[i] = 0; - } - - /* MIMO/HT specific limits */ - if (li_mimo->flags & WLC_EIRP) { - delta = band->antgain; - } else { - delta = 0; - if (band->antgain > QDB(6)) - delta = band->antgain - QDB(6); /* Excess over 6 dB */ - } - - if (BAND_2G(band->bandtype)) - maxpwr_idx = (chan - 1); - else - maxpwr_idx = CHANNEL_POWER_IDX_5G(chan); - - maxpwr20 = li_mimo->maxpwr20[maxpwr_idx]; - maxpwr40 = li_mimo->maxpwr40[maxpwr_idx]; - - maxpwr20 = maxpwr20 - delta; - maxpwr20 = max(maxpwr20, 0); - maxpwr40 = maxpwr40 - delta; - maxpwr40 = max(maxpwr40, 0); - - /* Fill in the MCS 0-7 (SISO) rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - - /* 20 MHz has the same power as the corresponding OFDM rate unless - * overriden by the locale specific code. - */ - txpwr->mcs_20_siso[i] = txpwr->ofdm[i]; - txpwr->mcs_40_siso[i] = 0; - } - - /* Fill in the MCS 0-7 CDD rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - txpwr->mcs_20_cdd[i] = (u8) maxpwr20; - txpwr->mcs_40_cdd[i] = (u8) maxpwr40; - } - - /* These locales have SISO expressed in the table and override CDD later */ - if (li_mimo == &locale_bn) { - if (li_mimo == &locale_bn) { - maxpwr20 = QDB(16); - maxpwr40 = 0; - - if (chan >= 3 && chan <= 11) { - maxpwr40 = QDB(16); - } - } - - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - txpwr->mcs_20_siso[i] = (u8) maxpwr20; - txpwr->mcs_40_siso[i] = (u8) maxpwr40; - } - } - - /* Fill in the MCS 0-7 STBC rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - txpwr->mcs_20_stbc[i] = 0; - txpwr->mcs_40_stbc[i] = 0; - } - - /* Fill in the MCS 8-15 SDM rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { - txpwr->mcs_20_mimo[i] = (u8) maxpwr20; - txpwr->mcs_40_mimo[i] = (u8) maxpwr40; - } - - /* Fill in MCS32 */ - txpwr->mcs32 = (u8) maxpwr40; - - for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { - if (txpwr->ofdm_40_cdd[i] == 0) - txpwr->ofdm_40_cdd[i] = txpwr->mcs_40_cdd[j]; - if (i == 0) { - i = i + 1; - if (txpwr->ofdm_40_cdd[i] == 0) - txpwr->ofdm_40_cdd[i] = txpwr->mcs_40_cdd[j]; - } - } - - /* Copy the 40 MHZ MCS 0-7 CDD value to the 40 MHZ MCS 0-7 SISO value if it wasn't - * provided explicitly. - */ - - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - if (txpwr->mcs_40_siso[i] == 0) - txpwr->mcs_40_siso[i] = txpwr->mcs_40_cdd[i]; - } - - for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { - if (txpwr->ofdm_40_siso[i] == 0) - txpwr->ofdm_40_siso[i] = txpwr->mcs_40_siso[j]; - if (i == 0) { - i = i + 1; - if (txpwr->ofdm_40_siso[i] == 0) - txpwr->ofdm_40_siso[i] = txpwr->mcs_40_siso[j]; - } - } - - /* Copy the 20 and 40 MHz MCS0-7 CDD values to the corresponding STBC values if they weren't - * provided explicitly. - */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { - if (txpwr->mcs_20_stbc[i] == 0) - txpwr->mcs_20_stbc[i] = txpwr->mcs_20_cdd[i]; - - if (txpwr->mcs_40_stbc[i] == 0) - txpwr->mcs_40_stbc[i] = txpwr->mcs_40_cdd[i]; - } - -#ifdef POWER_DBG - wlc_phy_txpower_limits_dump(txpwr); -#endif - return; -} - -/* Returns true if currently set country is Japan or variant */ -static bool wlc_japan(struct wlc_info *wlc) -{ - return wlc_japan_ccode(wlc->cmi->country_abbrev); -} - -/* JP, J1 - J10 are Japan ccodes */ -static bool wlc_japan_ccode(const char *ccode) -{ - return (ccode[0] == 'J' && - (ccode[1] == 'P' || (ccode[1] >= '1' && ccode[1] <= '9'))); -} - -/* - * Validate the chanspec for this locale, for 40MHZ we need to also check that the sidebands - * are valid 20MZH channels in this locale and they are also a legal HT combination - */ -static bool -wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) -{ - struct wlc_info *wlc = wlc_cm->wlc; - u8 channel = CHSPEC_CHANNEL(chspec); - - /* check the chanspec */ - if (brcmu_chspec_malformed(chspec)) { - wiphy_err(wlc->wiphy, "wl%d: malformed chanspec 0x%x\n", - wlc->pub->unit, chspec); - return false; - } - - if (CHANNEL_BANDUNIT(wlc_cm->wlc, channel) != - CHSPEC_WLCBANDUNIT(chspec)) - return false; - - /* Check a 20Mhz channel */ - if (CHSPEC_IS20(chspec)) { - if (dualband) - return VALID_CHANNEL20_DB(wlc_cm->wlc, channel); - else - return VALID_CHANNEL20(wlc_cm->wlc, channel); - } -#ifdef SUPPORT_40MHZ - /* We know we are now checking a 40MHZ channel, so we should only be here - * for NPHYS - */ - if (WLCISNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) { - u8 upper_sideband = 0, idx; - u8 num_ch20_entries = - sizeof(chan20_info) / sizeof(struct chan20_info); - - if (!VALID_40CHANSPEC_IN_BAND(wlc, CHSPEC_WLCBANDUNIT(chspec))) - return false; - - if (dualband) { - if (!VALID_CHANNEL20_DB(wlc, LOWER_20_SB(channel)) || - !VALID_CHANNEL20_DB(wlc, UPPER_20_SB(channel))) - return false; - } else { - if (!VALID_CHANNEL20(wlc, LOWER_20_SB(channel)) || - !VALID_CHANNEL20(wlc, UPPER_20_SB(channel))) - return false; - } - - /* find the lower sideband info in the sideband array */ - for (idx = 0; idx < num_ch20_entries; idx++) { - if (chan20_info[idx].sb == LOWER_20_SB(channel)) - upper_sideband = chan20_info[idx].adj_sbs; - } - /* check that the lower sideband allows an upper sideband */ - if ((upper_sideband & (CH_UPPER_SB | CH_EWA_VALID)) == - (CH_UPPER_SB | CH_EWA_VALID)) - return true; - return false; - } -#endif /* 40 MHZ */ - - return false; -} - -bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec) -{ - return wlc_valid_chanspec_ext(wlc_cm, chspec, true); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h b/drivers/staging/brcm80211/brcmsmac/wlc_channel.h deleted file mode 100644 index f50a66e..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_CHANNEL_H_ -#define _BRCM_CHANNEL_H_ - -#define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ - -struct wlc_info; - -/* maxpwr mapping to 5GHz band channels: - * maxpwr[0] - channels [34-48] - * maxpwr[1] - channels [52-60] - * maxpwr[2] - channels [62-64] - * maxpwr[3] - channels [100-140] - * maxpwr[4] - channels [149-165] - */ -#define BAND_5G_PWR_LVLS 5 /* 5 power levels for 5G */ - -/* power level in group of 2.4GHz band channels: - * maxpwr[0] - CCK channels [1] - * maxpwr[1] - CCK channels [2-10] - * maxpwr[2] - CCK channels [11-14] - * maxpwr[3] - OFDM channels [1] - * maxpwr[4] - OFDM channels [2-10] - * maxpwr[5] - OFDM channels [11-14] - */ - -/* macro to get 2.4 GHz channel group index for tx power */ -#define CHANNEL_POWER_IDX_2G_CCK(c) (((c) < 2) ? 0 : (((c) < 11) ? 1 : 2)) /* cck index */ -#define CHANNEL_POWER_IDX_2G_OFDM(c) (((c) < 2) ? 3 : (((c) < 11) ? 4 : 5)) /* ofdm index */ - -/* macro to get 5 GHz channel group index for tx power */ -#define CHANNEL_POWER_IDX_5G(c) \ - (((c) < 52) ? 0 : (((c) < 62) ? 1 : (((c) < 100) ? 2 : (((c) < 149) ? 3 : 4)))) - -#define WLC_MAXPWR_TBL_SIZE 6 /* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */ -#define WLC_MAXPWR_MIMO_TBL_SIZE 14 /* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */ - -/* locale channel and power info. */ -typedef struct { - u32 valid_channels; - u8 radar_channels; /* List of radar sensitive channels */ - u8 restricted_channels; /* List of channels used only if APs are detected */ - s8 maxpwr[WLC_MAXPWR_TBL_SIZE]; /* Max tx pwr in qdBm for each sub-band */ - s8 pub_maxpwr[BAND_5G_PWR_LVLS]; /* Country IE advertised max tx pwr in dBm - * per sub-band - */ - u8 flags; -} locale_info_t; - -/* bits for locale_info flags */ -#define WLC_PEAK_CONDUCTED 0x00 /* Peak for locals */ -#define WLC_EIRP 0x01 /* Flag for EIRP */ -#define WLC_DFS_TPC 0x02 /* Flag for DFS TPC */ -#define WLC_NO_OFDM 0x04 /* Flag for No OFDM */ -#define WLC_NO_40MHZ 0x08 /* Flag for No MIMO 40MHz */ -#define WLC_NO_MIMO 0x10 /* Flag for No MIMO, 20 or 40 MHz */ -#define WLC_RADAR_TYPE_EU 0x20 /* Flag for EU */ -#define WLC_DFS_FCC WLC_DFS_TPC /* Flag for DFS FCC */ -#define WLC_DFS_EU (WLC_DFS_TPC | WLC_RADAR_TYPE_EU) /* Flag for DFS EU */ - -#define ISDFS_EU(fl) (((fl) & WLC_DFS_EU) == WLC_DFS_EU) - -/* locale per-channel tx power limits for MIMO frames - * maxpwr arrays are index by channel for 2.4 GHz limits, and - * by sub-band for 5 GHz limits using CHANNEL_POWER_IDX_5G(channel) - */ -typedef struct { - s8 maxpwr20[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 20 MHz power limits, qdBm units */ - s8 maxpwr40[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 40 MHz power limits, qdBm units */ - u8 flags; -} locale_mimo_info_t; - -extern const chanvec_t chanvec_all_2G; -extern const chanvec_t chanvec_all_5G; - -/* - * Country names and abbreviations with locale defined from ISO 3166 - */ -struct country_info { - const u8 locale_2G; /* 2.4G band locale */ - const u8 locale_5G; /* 5G band locale */ - const u8 locale_mimo_2G; /* 2.4G mimo info */ - const u8 locale_mimo_5G; /* 5G mimo info */ -}; - -typedef struct country_info country_info_t; - -typedef struct wlc_cm_info wlc_cm_info_t; - -extern wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc); -extern void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm); - -extern u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, - uint bandunit); - -extern bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec); - -extern void wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, - chanspec_t chanspec, - struct txpwr_limits *txpwr); -extern void wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, - chanspec_t chanspec, - u8 local_constraint_qdbm); - -#endif /* _WLC_CHANNEL_H */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_key.h b/drivers/staging/brcm80211/brcmsmac/wlc_key.h deleted file mode 100644 index ecfe969..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_key.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_KEY_H_ -#define _BRCM_KEY_H_ - -#include /* for ETH_ALEN */ - -struct scb; -struct wlc_info; -struct wlc_bsscfg; -/* Maximum # of keys that wl driver supports in S/W. - * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. - */ -#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ -#define WLC_DEFAULT_KEYS 4 /* Default # of keys */ - -#define WSEC_MAX_WOWL_KEYS 5 /* Max keys in WOWL mode (1 + 4 default keys) */ - -#define WPA2_GTK_MAX 3 - -/* -* Max # of keys currently supported: -* -* s/w keys if WSEC_SW(wlc->wsec). -* h/w keys otherwise. -*/ -#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS - -/* number of 802.11 default (non-paired, group keys) */ -#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ - -/* Max # of hardware keys supported */ -#define WLC_MAX_WSEC_HW_KEYS(wlc) WSEC_MAX_RCMTA_KEYS - -/* Max # of hardware TKIP MIC keys supported */ -#define WLC_MAX_TKMIC_HW_KEYS(wlc) (WSEC_MAX_TKMIC_ENGINE_KEYS) - -#define WSEC_HW_TKMIC_KEY(wlc, key, bsscfg) \ - ((((wlc)->machwcap & MCAP_TKIPMIC)) && \ - (key) && ((key)->algo == CRYPTO_ALGO_TKIP) && \ - !WSEC_SOFTKEY(wlc, key, bsscfg) && \ - WSEC_KEY_INDEX(wlc, key) >= WLC_DEFAULT_KEYS && \ - (WSEC_KEY_INDEX(wlc, key) < WSEC_MAX_TKMIC_ENGINE_KEYS)) - -/* index of key in key table */ -#define WSEC_KEY_INDEX(wlc, key) ((key)->idx) - -#define WSEC_SOFTKEY(wlc, key, bsscfg) (WLC_SW_KEYS(wlc, bsscfg) || \ - WSEC_KEY_INDEX(wlc, key) >= WLC_MAX_WSEC_HW_KEYS(wlc)) - -/* get a key, non-NULL only if key allocated and not clear */ -#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \ - (wlc)->wsec_keys[i] : NULL) - -#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : false) - -/* default key */ -#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \ - (struct wsec_key *)NULL:(bsscfg)->bss_def_keys[(bsscfg)->wsec_index]) - -/* Macros for key management in IBSS mode */ -#define WSEC_IBSS_MAX_PEERS 16 /* Max # of IBSS Peers */ -#define WSEC_IBSS_RCMTA_INDEX(idx) \ - (((idx - WSEC_MAX_DEFAULT_KEYS) % WSEC_IBSS_MAX_PEERS) + WSEC_MAX_DEFAULT_KEYS) - -/* contiguous # key slots for infrastructure mode STA */ -#define WSEC_BSS_STA_KEY_GROUP_SIZE 5 - -typedef struct wsec_iv { - u32 hi; /* upper 32 bits of IV */ - u16 lo; /* lower 16 bits of IV */ -} wsec_iv_t; - -#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ - -typedef struct wsec_key { - u8 ea[ETH_ALEN]; /* per station */ - u8 idx; /* key index in wsec_keys array */ - u8 id; /* key ID [0-3] */ - u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - u8 rcmta; /* rcmta entry index, same as idx by default */ - u16 flags; /* misc flags */ - u8 algo_hw; /* cache for hw register */ - u8 aes_mode; /* cache for hw register */ - s8 iv_len; /* IV length */ - s8 icv_len; /* ICV length */ - u32 len; /* key length..don't move this var */ - /* data is 4byte aligned */ - u8 data[WLAN_MAX_KEY_LEN]; /* key data */ - wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */ - wsec_iv_t txiv; /* Tx IV */ - -} wsec_key_t; - -#define broken_roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) - -/* For use with wsec_key_t.flags */ - -#define WSEC_BS_UPDATE (1 << 0) /* Indicates hw needs key update on BS switch */ -#define WSEC_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WSEC_TKIP_ERROR (1 << 2) /* Provoke deliberate MIC error */ -#define WSEC_REPLAY_ERROR (1 << 3) /* Provoke deliberate replay */ -#define WSEC_IBSS_PEER_GROUP_KEY (1 << 7) /* Flag: group key for a IBSS PEER */ -#define WSEC_ICV_ERROR (1 << 8) /* Provoke deliberate ICV error */ - -#define wlc_key_insert(a, b, c, d, e, f, g, h, i, j) (-EBADE) -#define wlc_key_update(a, b, c) do {} while (0) -#define wlc_key_remove(a, b, c) do {} while (0) -#define wlc_key_remove_all(a, b) do {} while (0) -#define wlc_key_delete(a, b, c) do {} while (0) -#define wlc_scb_key_delete(a, b) do {} while (0) -#define wlc_key_lookup(a, b, c, d, e) (NULL) -#define wlc_key_hw_init_all(a) do {} while (0) -#define wlc_key_hw_init(a, b, c) do {} while (0) -#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0) -#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0) -#define wlc_key_sw_wowl_create(a, b, c) (-EBADE) -#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0) -#define wlc_key_iv_init(a, b, c) do {} while (0) -#define wlc_key_set_error(a, b, c) (-EBADE) -#define wlc_key_dump_hw(a, b) (-EBADE) -#define wlc_key_dump_sw(a, b) (-EBADE) -#define wlc_key_defkeyflag(a) (0) -#define wlc_rcmta_add_bssid(a, b) do {} while (0) -#define wlc_rcmta_del_bssid(a, b) do {} while (0) -#define wlc_key_scb_delete(a, b) do {} while (0) - -#endif /* _BRCM_KEY_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/wlc_main.c deleted file mode 100644 index 7c86abc..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ /dev/null @@ -1,6037 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include "bcmdma.h" -#include - -#include "wlc_pmu.h" -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "wlc_bsscfg.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_bmac.h" -#include "wlc_phy_hal.h" -#include "wlc_antsel.h" -#include "wlc_stf.h" -#include "wlc_ampdu.h" -#include "wlc_alloc.h" -#include "brcms_mac80211.h" - -/* - * WPA(2) definitions - */ -#define RSN_CAP_4_REPLAY_CNTRS 2 -#define RSN_CAP_16_REPLAY_CNTRS 3 - -#define WPA_CAP_4_REPLAY_CNTRS RSN_CAP_4_REPLAY_CNTRS -#define WPA_CAP_16_REPLAY_CNTRS RSN_CAP_16_REPLAY_CNTRS - -/* - * Indication for txflowcontrol that all priority bits in - * TXQ_STOP_FOR_PRIOFC_MASK are to be considered. - */ -#define ALLPRIO -1 - -/* - * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. - */ -#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) - -#define TIMER_INTERVAL_WATCHDOG 1000 /* watchdog timer, in unit of ms */ -#define TIMER_INTERVAL_RADIOCHK 800 /* radio monitor timer, in unit of ms */ - -#ifndef WLC_MPC_MAX_DELAYCNT -#define WLC_MPC_MAX_DELAYCNT 10 /* Max MPC timeout, in unit of watchdog */ -#endif -#define WLC_MPC_MIN_DELAYCNT 1 /* Min MPC timeout, in unit of watchdog */ -#define WLC_MPC_THRESHOLD 3 /* MPC count threshold level */ - -#define BEACON_INTERVAL_DEFAULT 100 /* beacon interval, in unit of 1024TU */ -#define DTIM_INTERVAL_DEFAULT 3 /* DTIM interval, in unit of beacon interval */ - -/* Scale down delays to accommodate QT slow speed */ -#define BEACON_INTERVAL_DEF_QT 20 /* beacon interval, in unit of 1024TU */ -#define DTIM_INTERVAL_DEF_QT 1 /* DTIM interval, in unit of beacon interval */ - -#define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */ - -/* Software feature flag defines used by wlfeatureflag */ -#define WL_SWFL_NOHWRADIO 0x0004 -#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ -#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ - -/* n-mode support capability */ -/* 2x2 includes both 1x1 & 2x2 devices - * reserved #define 2 for future when we want to separate 1x1 & 2x2 and - * control it independently - */ -#define WL_11N_2x2 1 -#define WL_11N_3x3 3 -#define WL_11N_4x4 4 - -/* define 11n feature disable flags */ -#define WLFEATURE_DISABLE_11N 0x00000001 -#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 -#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 -#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 -#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 -#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 -#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 -#define WLFEATURE_DISABLE_11N_GF 0x00000080 - -#define EDCF_ACI_MASK 0x60 -#define EDCF_ACI_SHIFT 5 -#define EDCF_ECWMIN_MASK 0x0f -#define EDCF_ECWMAX_SHIFT 4 -#define EDCF_AIFSN_MASK 0x0f -#define EDCF_AIFSN_MAX 15 -#define EDCF_ECWMAX_MASK 0xf0 - -#define EDCF_AC_BE_TXOP_STA 0x0000 -#define EDCF_AC_BK_TXOP_STA 0x0000 -#define EDCF_AC_VO_ACI_STA 0x62 -#define EDCF_AC_VO_ECW_STA 0x32 -#define EDCF_AC_VI_ACI_STA 0x42 -#define EDCF_AC_VI_ECW_STA 0x43 -#define EDCF_AC_BK_ECW_STA 0xA4 -#define EDCF_AC_VI_TXOP_STA 0x005e -#define EDCF_AC_VO_TXOP_STA 0x002f -#define EDCF_AC_BE_ACI_STA 0x03 -#define EDCF_AC_BE_ECW_STA 0xA4 -#define EDCF_AC_BK_ACI_STA 0x27 -#define EDCF_AC_VO_TXOP_AP 0x002f - -#define EDCF_TXOP2USEC(txop) ((txop) << 5) -#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) - -#define APHY_SYMBOL_TIME 4 -#define APHY_PREAMBLE_TIME 16 -#define APHY_SIGNAL_TIME 4 -#define APHY_SIFS_TIME 16 -#define APHY_SERVICE_NBITS 16 -#define APHY_TAIL_NBITS 6 -#define BPHY_SIFS_TIME 10 -#define BPHY_PLCP_SHORT_TIME 96 - -#define PREN_PREAMBLE 24 -#define PREN_MM_EXT 12 -#define PREN_PREAMBLE_EXT 4 - -#define DOT11_MAC_HDR_LEN 24 -#define DOT11_ACK_LEN 10 -#define DOT11_BA_LEN 4 -#define DOT11_OFDM_SIGNAL_EXTENSION 6 -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_RTS_LEN 16 -#define DOT11_CTS_LEN 10 -#define DOT11_BA_BITMAP_LEN 128 -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF -#define DOT11_MAXNUMFRAGS 16 -#define DOT11_MAX_FRAG_LEN 2346 - -#define BPHY_PLCP_TIME 192 -#define RIFS_11N_TIME 2 - -#define WME_VER 1 -#define WME_SUBTYPE_PARAM_IE 1 -#define WME_TYPE 2 -#define WME_OUI "\x00\x50\xf2" - -#define AC_BE 0 -#define AC_BK 1 -#define AC_VI 2 -#define AC_VO 3 - -/* - * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft - * watchdog) it is not a wall clock and won't increment when driver is in "down" state - * this low resolution driver tick can be used for maintenance tasks such as phy - * calibration and scb update - */ - -/* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */ -#define BCMCFID(wlc, fid) wlc_bmac_write_shm((wlc)->hw, M_BCMC_FID, (fid)) - -#define WLC_WAR16165(wlc) (wlc->pub->sih->bustype == PCI_BUS && \ - (!AP_ENAB(wlc->pub)) && (wlc->war16165)) - -/* debug/trace */ -uint brcm_msg_level = -#if defined(BCMDBG) - LOG_ERROR_VAL; -#else - 0; -#endif /* BCMDBG */ - -/* Find basic rate for a given rate */ -#define WLC_BASIC_RATE(wlc, rspec) (IS_MCS(rspec) ? \ - (wlc)->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK].leg_ofdm] : \ - (wlc)->band->basic_rate[rspec & RSPEC_RATE_MASK]) - -#define FRAMETYPE(r, mimoframe) (IS_MCS(r) ? mimoframe : (IS_CCK(r) ? FT_CCK : FT_OFDM)) - -#define RFDISABLE_DEFAULT 10000000 /* rfdisable delay timer 500 ms, runs of ALP clock */ - -#define WLC_TEMPSENSE_PERIOD 10 /* 10 second timeout */ - -#define SCAN_IN_PROGRESS(x) 0 - -#define EPI_VERSION_NUM 0x054b0b00 - -#ifdef BCMDBG -/* pointer to most recently allocated wl/wlc */ -static struct wlc_info *wlc_info_dbg = (struct wlc_info *) (NULL); -#endif - -const u8 prio2fifo[NUMPRIO] = { - TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ - TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ - TX_AC_BK_FIFO, /* 2 -- AC_BK Background */ - TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */ - TX_AC_VI_FIFO, /* 4 CL AC_VI Video */ - TX_AC_VI_FIFO, /* 5 VI AC_VI Video */ - TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */ - TX_AC_VO_FIFO /* 7 NC AC_VO Voice */ -}; - -/* precedences numbers for wlc queues. These are twice as may levels as - * 802.1D priorities. - * Odd numbers are used for HI priority traffic at same precedence levels - * These constants are used ONLY by wlc_prio2prec_map. Do not use them elsewhere. - */ -#define _WLC_PREC_NONE 0 /* None = - */ -#define _WLC_PREC_BK 2 /* BK - Background */ -#define _WLC_PREC_BE 4 /* BE - Best-effort */ -#define _WLC_PREC_EE 6 /* EE - Excellent-effort */ -#define _WLC_PREC_CL 8 /* CL - Controlled Load */ -#define _WLC_PREC_VI 10 /* Vi - Video */ -#define _WLC_PREC_VO 12 /* Vo - Voice */ -#define _WLC_PREC_NC 14 /* NC - Network Control */ - -/* 802.1D Priority to precedence queue mapping */ -const u8 wlc_prio2prec_map[] = { - _WLC_PREC_BE, /* 0 BE - Best-effort */ - _WLC_PREC_BK, /* 1 BK - Background */ - _WLC_PREC_NONE, /* 2 None = - */ - _WLC_PREC_EE, /* 3 EE - Excellent-effort */ - _WLC_PREC_CL, /* 4 CL - Controlled Load */ - _WLC_PREC_VI, /* 5 Vi - Video */ - _WLC_PREC_VO, /* 6 Vo - Voice */ - _WLC_PREC_NC, /* 7 NC - Network Control */ -}; - -/* Sanity check for tx_prec_map and fifo synchup - * Either there are some packets pending for the fifo, else if fifo is empty then - * all the corresponding precmap bits should be set - */ -#define WLC_TX_FIFO_CHECK(wlc, fifo) (TXPKTPENDGET((wlc), (fifo)) || \ - (TXPKTPENDGET((wlc), (fifo)) == 0 && \ - ((wlc)->tx_prec_map & (wlc)->fifo2prec_map[(fifo)]) == \ - (wlc)->fifo2prec_map[(fifo)])) - -/* TX FIFO number to WME/802.1E Access Category */ -const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; - -/* WME/802.1E Access Category to TX FIFO number */ -static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; - -static bool in_send_q = false; - -/* Shared memory location index for various AC params */ -#define wme_shmemacindex(ac) wme_ac2fifo[ac] - -#ifdef BCMDBG -static const char *fifo_names[] = { - "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; -#else -static const char fifo_names[6][0]; -#endif - -static const u8 acbitmap2maxprio[] = { - PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK, - PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, - PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, - PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO -}; - -/* currently the best mechanism for determining SIFS is the band in use */ -#define SIFS(band) ((band)->bandtype == WLC_BAND_5G ? APHY_SIFS_TIME : BPHY_SIFS_TIME); - -/* value for # replay counters currently supported */ -#define WLC_REPLAY_CNTRS_VALUE WPA_CAP_16_REPLAY_CNTRS - -/* local prototypes */ -static u16 wlc_d11hdrs_mac80211(struct wlc_info *wlc, - struct ieee80211_hw *hw, - struct sk_buff *p, - struct scb *scb, uint frag, - uint nfrags, uint queue, - uint next_frag_len, - wsec_key_t *key, - ratespec_t rspec_override); -static void wlc_bss_default_init(struct wlc_info *wlc); -static void wlc_ucode_mac_upd(struct wlc_info *wlc); -static ratespec_t mac80211_wlc_set_nrate(struct wlc_info *wlc, - struct wlcband *cur_band, u32 int_val); -static void wlc_tx_prec_map_init(struct wlc_info *wlc); -static void wlc_watchdog(void *arg); -static void wlc_watchdog_by_timer(void *arg); -static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); -static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg); -static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc); - -/* send and receive */ -static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc); -static void wlc_txq_free(struct wlc_info *wlc, - struct wlc_txq_info *qi); -static void wlc_txflowcontrol_signal(struct wlc_info *wlc, - struct wlc_txq_info *qi, - bool on, int prio); -static void wlc_txflowcontrol_reset(struct wlc_info *wlc); -static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rate, - uint length, u8 *plcp); -static void wlc_compute_ofdm_plcp(ratespec_t rate, uint length, u8 *plcp); -static void wlc_compute_mimo_plcp(ratespec_t rate, uint length, u8 *plcp); -static u16 wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, - u8 preamble_type, uint next_frag_len); -static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh); -static void wlc_recvctl(struct wlc_info *wlc, - d11rxhdr_t *rxh, struct sk_buff *p); -static uint wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t rate, - u8 preamble_type, uint dur); -static uint wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rate, - u8 preamble_type); -static uint wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rate, - u8 preamble_type); -/* interrupt, up/down, band */ -static void wlc_setband(struct wlc_info *wlc, uint bandunit); -static chanspec_t wlc_init_chanspec(struct wlc_info *wlc); -static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec); -static void wlc_bsinit(struct wlc_info *wlc); -static int wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, - bool writeToShm); -static void wlc_radio_hwdisable_upd(struct wlc_info *wlc); -static bool wlc_radio_monitor_start(struct wlc_info *wlc); -static void wlc_radio_timer(void *arg); -static void wlc_radio_enable(struct wlc_info *wlc); -static void wlc_radio_upd(struct wlc_info *wlc); - -/* scan, association, BSS */ -static uint wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rate, - u8 preamble_type); -static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap); -static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val); -static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val); -static void wlc_war16165(struct wlc_info *wlc, bool tx); - -static void wlc_wme_retries_write(struct wlc_info *wlc); -static bool wlc_attach_stf_ant_init(struct wlc_info *wlc); -static uint wlc_attach_module(struct wlc_info *wlc); -static void wlc_detach_module(struct wlc_info *wlc); -static void wlc_timers_deinit(struct wlc_info *wlc); -static void wlc_down_led_upd(struct wlc_info *wlc); -static uint wlc_down_del_timer(struct wlc_info *wlc); -static void wlc_ofdm_rateset_war(struct wlc_info *wlc); -static int _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif); - -/* conditions under which the PM bit should be set in outgoing frames and STAY_AWAKE is meaningful - */ -bool wlc_ps_allowed(struct wlc_info *wlc) -{ - int idx; - struct wlc_bsscfg *cfg; - - /* disallow PS when one of the following global conditions meets */ - if (!wlc->pub->associated) - return false; - - /* disallow PS when one of these meets when not scanning */ - if (AP_ACTIVE(wlc) || wlc->monitor) - return false; - - FOREACH_AS_STA(wlc, idx, cfg) { - /* disallow PS when one of the following bsscfg specific conditions meets */ - if (!cfg->BSS || !WLC_PORTOPEN(cfg)) - return false; - - if (!cfg->dtim_programmed) - return false; - } - - return true; -} - -void wlc_reset(struct wlc_info *wlc) -{ - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - /* slurp up hw mac counters before core reset */ - wlc_statsupd(wlc); - - /* reset our snapshot of macstat counters */ - memset((char *)wlc->core->macstat_snapshot, 0, - sizeof(macstat_t)); - - wlc_bmac_reset(wlc->hw); -} - -void wlc_fatal_error(struct wlc_info *wlc) -{ - wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n", - wlc->pub->unit); - brcms_init(wlc->wl); -} - -/* Return the channel the driver should initialize during wlc_init. - * the channel may have to be changed from the currently configured channel - * if other configurations are in conflict (bandlocked, 11n mode disabled, - * invalid channel for current country, etc.) - */ -static chanspec_t wlc_init_chanspec(struct wlc_info *wlc) -{ - chanspec_t chanspec = - 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE | - WL_CHANSPEC_BAND_2G; - - return chanspec; -} - -struct scb global_scb; - -static void wlc_init_scb(struct wlc_info *wlc, struct scb *scb) -{ - int i; - scb->flags = SCB_WMECAP | SCB_HTCAP; - for (i = 0; i < NUMPRIO; i++) - scb->seqnum[i] = 0; -} - -void wlc_init(struct wlc_info *wlc) -{ - d11regs_t *regs; - chanspec_t chanspec; - int i; - struct wlc_bsscfg *bsscfg; - bool mute = false; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - regs = wlc->regs; - - /* This will happen if a big-hammer was executed. In that case, we want to go back - * to the channel that we were on and not new channel - */ - if (wlc->pub->associated) - chanspec = wlc->home_chanspec; - else - chanspec = wlc_init_chanspec(wlc); - - wlc_bmac_init(wlc->hw, chanspec, mute); - - /* update beacon listen interval */ - wlc_bcn_li_upd(wlc); - - /* the world is new again, so is our reported rate */ - wlc_reprate_init(wlc); - - /* write ethernet address to core */ - FOREACH_BSS(wlc, i, bsscfg) { - wlc_set_mac(bsscfg); - wlc_set_bssid(bsscfg); - } - - /* Update tsf_cfprep if associated and up */ - if (wlc->pub->associated) { - FOREACH_BSS(wlc, i, bsscfg) { - if (bsscfg->up) { - u32 bi; - - /* get beacon period and convert to uS */ - bi = bsscfg->current_bss->beacon_period << 10; - /* - * update since init path would reset - * to default value - */ - W_REG(®s->tsf_cfprep, - (bi << CFPREP_CBI_SHIFT)); - - /* Update maccontrol PM related bits */ - wlc_set_ps_ctrl(wlc); - - break; - } - } - } - - wlc_key_hw_init_all(wlc); - - wlc_bandinit_ordered(wlc, chanspec); - - wlc_init_scb(wlc, &global_scb); - - /* init probe response timeout */ - wlc_write_shm(wlc, M_PRS_MAXTIME, wlc->prb_resp_timeout); - - /* init max burst txop (framebursting) */ - wlc_write_shm(wlc, M_MBURST_TXOP, - (wlc-> - _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP)); - - /* initialize maximum allowed duty cycle */ - wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); - wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); - - /* Update some shared memory locations related to max AMPDU size allowed to received */ - wlc_ampdu_shm_upd(wlc->ampdu); - - /* band-specific inits */ - wlc_bsinit(wlc); - - /* Enable EDCF mode (while the MAC is suspended) */ - if (EDCF_ENAB(wlc->pub)) { - OR_REG(®s->ifs_ctl, IFS_USEEDCF); - wlc_edcf_setparams(wlc, false); - } - - /* Init precedence maps for empty FIFOs */ - wlc_tx_prec_map_init(wlc); - - /* read the ucode version if we have not yet done so */ - if (wlc->ucode_rev == 0) { - wlc->ucode_rev = - wlc_read_shm(wlc, M_BOM_REV_MAJOR) << NBITS(u16); - wlc->ucode_rev |= wlc_read_shm(wlc, M_BOM_REV_MINOR); - } - - /* ..now really unleash hell (allow the MAC out of suspend) */ - wlc_enable_mac(wlc); - - /* clear tx flow control */ - wlc_txflowcontrol_reset(wlc); - - /* clear tx data fifo suspends */ - wlc->tx_suspended = false; - - /* enable the RF Disable Delay timer */ - W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT); - - /* initialize mpc delay */ - wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; - - /* - * Initialize WME parameters; if they haven't been set by some other - * mechanism (IOVar, etc) then read them from the hardware. - */ - if (WLC_WME_RETRY_SHORT_GET(wlc, 0) == 0) { /* Uninitialized; read from HW */ - int ac; - - for (ac = 0; ac < AC_COUNT; ac++) { - wlc->wme_retries[ac] = - wlc_read_shm(wlc, M_AC_TXLMT_ADDR(ac)); - } - } -} - -void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc) -{ - wlc->bcnmisc_monitor = promisc; - wlc_mac_bcn_promisc(wlc); -} - -void wlc_mac_bcn_promisc(struct wlc_info *wlc) -{ - if ((AP_ENAB(wlc->pub) && (N_ENAB(wlc->pub) || wlc->band->gmode)) || - wlc->bcnmisc_ibss || wlc->bcnmisc_scan || wlc->bcnmisc_monitor) - wlc_mctrl(wlc, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC); - else - wlc_mctrl(wlc, MCTL_BCNS_PROMISC, 0); -} - -/* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */ -void wlc_mac_promisc(struct wlc_info *wlc) -{ - u32 promisc_bits = 0; - - /* promiscuous mode just sets MCTL_PROMISC - * Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit - * since all BSS data traffic is directed at the AP - */ - if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub)) - promisc_bits |= MCTL_PROMISC; - - /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL - * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is - * handled in wlc_mac_bcn_promisc() - */ - if (MONITOR_ENAB(wlc)) - promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL; - - wlc_mctrl(wlc, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits); -} - -/* push sw hps and wake state through hardware */ -void wlc_set_ps_ctrl(struct wlc_info *wlc) -{ - u32 v1, v2; - bool hps; - bool awake_before; - - hps = PS_ALLOWED(wlc); - - BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps); - - v1 = R_REG(&wlc->regs->maccontrol); - v2 = MCTL_WAKE; - if (hps) - v2 |= MCTL_HPS; - - wlc_mctrl(wlc, MCTL_WAKE | MCTL_HPS, v2); - - awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0)); - - if (!awake_before) - wlc_bmac_wait_for_wake(wlc->hw); - -} - -/* - * Write this BSS config's MAC address to core. - * Updates RXE match engine. - */ -int wlc_set_mac(struct wlc_bsscfg *cfg) -{ - int err = 0; - struct wlc_info *wlc = cfg->wlc; - - if (cfg == wlc->cfg) { - /* enter the MAC addr into the RXE match registers */ - wlc_set_addrmatch(wlc, RCM_MAC_OFFSET, cfg->cur_etheraddr); - } - - wlc_ampdu_macaddr_upd(wlc); - - return err; -} - -/* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl). - * Updates RXE match engine. - */ -void wlc_set_bssid(struct wlc_bsscfg *cfg) -{ - struct wlc_info *wlc = cfg->wlc; - - /* if primary config, we need to update BSSID in RXE match registers */ - if (cfg == wlc->cfg) { - wlc_set_addrmatch(wlc, RCM_BSSID_OFFSET, cfg->BSSID); - } -#ifdef SUPPORT_HWKEYS - else if (BSSCFG_STA(cfg) && cfg->BSS) { - wlc_rcmta_add_bssid(wlc, cfg); - } -#endif -} - -/* - * Suspend the the MAC and update the slot timing - * for standard 11b/g (20us slots) or shortslot 11g (9us slots). - */ -void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot) -{ - int idx; - struct wlc_bsscfg *cfg; - - /* use the override if it is set */ - if (wlc->shortslot_override != WLC_SHORTSLOT_AUTO) - shortslot = (wlc->shortslot_override == WLC_SHORTSLOT_ON); - - if (wlc->shortslot == shortslot) - return; - - wlc->shortslot = shortslot; - - /* update the capability based on current shortslot mode */ - FOREACH_BSS(wlc, idx, cfg) { - if (!cfg->associated) - continue; - cfg->current_bss->capability &= - ~WLAN_CAPABILITY_SHORT_SLOT_TIME; - if (wlc->shortslot) - cfg->current_bss->capability |= - WLAN_CAPABILITY_SHORT_SLOT_TIME; - } - - wlc_bmac_set_shortslot(wlc->hw, shortslot); -} - -static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc) -{ - u8 local; - s16 local_max; - - local = WLC_TXPWR_MAX; - if (wlc->pub->associated && - (brcmu_chspec_ctlchan(wlc->chanspec) == - brcmu_chspec_ctlchan(wlc->home_chanspec))) { - - /* get the local power constraint if we are on the AP's - * channel [802.11h, 7.3.2.13] - */ - /* Clamp the value between 0 and WLC_TXPWR_MAX w/o overflowing the target */ - local_max = - (wlc->txpwr_local_max - - wlc->txpwr_local_constraint) * WLC_TXPWR_DB_FACTOR; - if (local_max > 0 && local_max < WLC_TXPWR_MAX) - return (u8) local_max; - if (local_max < 0) - return 0; - } - - return local; -} - -/* propagate home chanspec to all bsscfgs in case bsscfg->current_bss->chanspec is referenced */ -void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec) -{ - if (wlc->home_chanspec != chanspec) { - int idx; - struct wlc_bsscfg *cfg; - - wlc->home_chanspec = chanspec; - - FOREACH_BSS(wlc, idx, cfg) { - if (!cfg->associated) - continue; - - cfg->current_bss->chanspec = chanspec; - } - - } -} - -static void wlc_set_phy_chanspec(struct wlc_info *wlc, chanspec_t chanspec) -{ - /* Save our copy of the chanspec */ - wlc->chanspec = chanspec; - - /* Set the chanspec and power limits for this locale after computing - * any 11h local tx power constraints. - */ - wlc_channel_set_chanspec(wlc->cmi, chanspec, - wlc_local_constraint_qdbm(wlc)); - - if (wlc->stf->ss_algosel_auto) - wlc_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel, - chanspec); - - wlc_stf_ss_update(wlc, wlc->band); - -} - -void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) -{ - uint bandunit; - bool switchband = false; - chanspec_t old_chanspec = wlc->chanspec; - - if (!wlc_valid_chanspec_db(wlc->cmi, chanspec)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n", - wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec)); - return; - } - - /* Switch bands if necessary */ - if (NBANDS(wlc) > 1) { - bandunit = CHSPEC_WLCBANDUNIT(chanspec); - if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) { - switchband = true; - if (wlc->bandlocked) { - wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d " - "band is locked!\n", - wlc->pub->unit, __func__, - CHSPEC_CHANNEL(chanspec)); - return; - } - /* BMAC_NOTE: should the setband call come after the wlc_bmac_chanspec() ? - * if the setband updates (wlc_bsinit) use low level calls to inspect and - * set state, the state inspected may be from the wrong band, or the - * following wlc_bmac_set_chanspec() may undo the work. - */ - wlc_setband(wlc, bandunit); - } - } - - /* sync up phy/radio chanspec */ - wlc_set_phy_chanspec(wlc, chanspec); - - /* init antenna selection */ - if (CHSPEC_WLC_BW(old_chanspec) != CHSPEC_WLC_BW(chanspec)) { - wlc_antsel_init(wlc->asi); - - /* Fix the hardware rateset based on bw. - * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz - */ - wlc_rateset_bw_mcs_filter(&wlc->band->hw_rateset, - wlc->band-> - mimo_cap_40 ? CHSPEC_WLC_BW(chanspec) - : 0); - } - - /* update some mac configuration since chanspec changed */ - wlc_ucode_mac_upd(wlc); -} - -ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) -{ - ratespec_t lowest_basic_rspec; - uint i; - - /* Use the lowest basic rate */ - lowest_basic_rspec = rs->rates[0] & WLC_RATE_MASK; - for (i = 0; i < rs->count; i++) { - if (rs->rates[i] & WLC_RATE_FLAG) { - lowest_basic_rspec = rs->rates[i] & WLC_RATE_MASK; - break; - } - } -#if NCONF - /* pick siso/cdd as default for OFDM (note no basic rate MCSs are supported yet) */ - if (IS_OFDM(lowest_basic_rspec)) { - lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); - } -#endif - - return lowest_basic_rspec; -} - -/* This function changes the phytxctl for beacon based on current beacon ratespec AND txant - * setting as per this table: - * ratespec CCK ant = wlc->stf->txant - * OFDM ant = 3 - */ -void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, ratespec_t bcn_rspec) -{ - u16 phyctl; - u16 phytxant = wlc->stf->phytxant; - u16 mask = PHY_TXC_ANT_MASK; - - /* for non-siso rates or default setting, use the available chains */ - if (WLC_PHY_11N_CAP(wlc->band)) { - phytxant = wlc_stf_phytxchain_sel(wlc, bcn_rspec); - } - - phyctl = wlc_read_shm(wlc, M_BCN_PCTLWD); - phyctl = (phyctl & ~mask) | phytxant; - wlc_write_shm(wlc, M_BCN_PCTLWD, phyctl); -} - -/* centralized protection config change function to simplify debugging, no consistency checking - * this should be called only on changes to avoid overhead in periodic function -*/ -void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val) -{ - BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val); - - switch (idx) { - case WLC_PROT_G_SPEC: - wlc->protection->_g = (bool) val; - break; - case WLC_PROT_G_OVR: - wlc->protection->g_override = (s8) val; - break; - case WLC_PROT_G_USER: - wlc->protection->gmode_user = (u8) val; - break; - case WLC_PROT_OVERLAP: - wlc->protection->overlap = (s8) val; - break; - case WLC_PROT_N_USER: - wlc->protection->nmode_user = (s8) val; - break; - case WLC_PROT_N_CFG: - wlc->protection->n_cfg = (s8) val; - break; - case WLC_PROT_N_CFG_OVR: - wlc->protection->n_cfg_override = (s8) val; - break; - case WLC_PROT_N_NONGF: - wlc->protection->nongf = (bool) val; - break; - case WLC_PROT_N_NONGF_OVR: - wlc->protection->nongf_override = (s8) val; - break; - case WLC_PROT_N_PAM_OVR: - wlc->protection->n_pam_override = (s8) val; - break; - case WLC_PROT_N_OBSS: - wlc->protection->n_obss = (bool) val; - break; - - default: - break; - } - -} - -static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val) -{ - wlc->ht_cap.cap_info &= ~(IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_SGI_40); - wlc->ht_cap.cap_info |= (val & WLC_N_SGI_20) ? - IEEE80211_HT_CAP_SGI_20 : 0; - wlc->ht_cap.cap_info |= (val & WLC_N_SGI_40) ? - IEEE80211_HT_CAP_SGI_40 : 0; - - if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } -} - -static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val) -{ - wlc->stf->ldpc = val; - - wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_LDPC_CODING; - if (wlc->stf->ldpc != OFF) - wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_LDPC_CODING; - - if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false)); - } -} - -/* - * ucode, hwmac update - * Channel dependent updates for ucode and hw - */ -static void wlc_ucode_mac_upd(struct wlc_info *wlc) -{ - /* enable or disable any active IBSSs depending on whether or not - * we are on the home channel - */ - if (wlc->home_chanspec == WLC_BAND_PI_RADIO_CHANSPEC) { - if (wlc->pub->associated) { - /* BMAC_NOTE: This is something that should be fixed in ucode inits. - * I think that the ucode inits set up the bcn templates and shm values - * with a bogus beacon. This should not be done in the inits. If ucode needs - * to set up a beacon for testing, the test routines should write it down, - * not expect the inits to populate a bogus beacon. - */ - if (WLC_PHY_11N_CAP(wlc->band)) { - wlc_write_shm(wlc, M_BCN_TXTSF_OFFSET, - wlc->band->bcntsfoff); - } - } - } else { - /* disable an active IBSS if we are not on the home channel */ - } - - /* update the various promisc bits */ - wlc_mac_bcn_promisc(wlc); - wlc_mac_promisc(wlc); -} - -static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec) -{ - wlc_rateset_t default_rateset; - uint parkband; - uint i, band_order[2]; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - /* - * We might have been bandlocked during down and the chip power-cycled (hibernate). - * figure out the right band to park on - */ - if (wlc->bandlocked || NBANDS(wlc) == 1) { - parkband = wlc->band->bandunit; /* updated in wlc_bandlock() */ - band_order[0] = band_order[1] = parkband; - } else { - /* park on the band of the specified chanspec */ - parkband = CHSPEC_WLCBANDUNIT(chanspec); - - /* order so that parkband initialize last */ - band_order[0] = parkband ^ 1; - band_order[1] = parkband; - } - - /* make each band operational, software state init */ - for (i = 0; i < NBANDS(wlc); i++) { - uint j = band_order[i]; - - wlc->band = wlc->bandstate[j]; - - wlc_default_rateset(wlc, &default_rateset); - - /* fill in hw_rate */ - wlc_rateset_filter(&default_rateset, &wlc->band->hw_rateset, - false, WLC_RATES_CCK_OFDM, WLC_RATE_MASK, - (bool) N_ENAB(wlc->pub)); - - /* init basic rate lookup */ - wlc_rate_lookup_init(wlc, &default_rateset); - } - - /* sync up phy/radio chanspec */ - wlc_set_phy_chanspec(wlc, chanspec); -} - -/* band-specific init */ -static void WLBANDINITFN(wlc_bsinit) (struct wlc_info *wlc) -{ - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", - wlc->pub->unit, wlc->band->bandunit); - - /* write ucode ACK/CTS rate table */ - wlc_set_ratetable(wlc); - - /* update some band specific mac configuration */ - wlc_ucode_mac_upd(wlc); - - /* init antenna selection */ - wlc_antsel_init(wlc->asi); - -} - -/* switch to and initialize new band */ -static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit) -{ - int idx; - struct wlc_bsscfg *cfg; - - wlc->band = wlc->bandstate[bandunit]; - - if (!wlc->pub->up) - return; - - /* wait for at least one beacon before entering sleeping state */ - FOREACH_AS_STA(wlc, idx, cfg) - cfg->PMawakebcn = true; - wlc_set_ps_ctrl(wlc); - - /* band-specific initializations */ - wlc_bsinit(wlc); -} - -/* Initialize a WME Parameter Info Element with default STA parameters from WMM Spec, Table 12 */ -void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe) -{ - static const wme_param_ie_t stadef = { - WME_OUI, - WME_TYPE, - WME_SUBTYPE_PARAM_IE, - WME_VER, - 0, - 0, - { - {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, - cpu_to_le16(EDCF_AC_BE_TXOP_STA)}, - {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, - cpu_to_le16(EDCF_AC_BK_TXOP_STA)}, - {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, - cpu_to_le16(EDCF_AC_VI_TXOP_STA)}, - {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, - cpu_to_le16(EDCF_AC_VO_TXOP_STA)} - } - }; - memcpy(pe, &stadef, sizeof(*pe)); -} - -void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, - const struct ieee80211_tx_queue_params *params, - bool suspend) -{ - int i; - shm_acparams_t acp_shm; - u16 *shm_entry; - - /* Only apply params if the core is out of reset and has clocks */ - if (!wlc->clk) { - wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit, - __func__); - return; - } - - do { - memset((char *)&acp_shm, 0, sizeof(shm_acparams_t)); - /* fill in shm ac params struct */ - acp_shm.txop = le16_to_cpu(params->txop); - /* convert from units of 32us to us for ucode */ - wlc->edcf_txop[aci & 0x3] = acp_shm.txop = - EDCF_TXOP2USEC(acp_shm.txop); - acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK); - - if (aci == AC_VI && acp_shm.txop == 0 - && acp_shm.aifs < EDCF_AIFSN_MAX) - acp_shm.aifs++; - - if (acp_shm.aifs < EDCF_AIFSN_MIN - || acp_shm.aifs > EDCF_AIFSN_MAX) { - wiphy_err(wlc->wiphy, "wl%d: wlc_edcf_setparams: bad " - "aifs %d\n", wlc->pub->unit, acp_shm.aifs); - continue; - } - - acp_shm.cwmin = params->cw_min; - acp_shm.cwmax = params->cw_max; - acp_shm.cwcur = acp_shm.cwmin; - acp_shm.bslots = - R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur; - acp_shm.reggap = acp_shm.bslots + acp_shm.aifs; - /* Indicate the new params to the ucode */ - acp_shm.status = wlc_read_shm(wlc, (M_EDCF_QINFO + - wme_shmemacindex(aci) * - M_EDCF_QLEN + - M_EDCF_STATUS_OFF)); - acp_shm.status |= WME_STATUS_NEWAC; - - /* Fill in shm acparam table */ - shm_entry = (u16 *) &acp_shm; - for (i = 0; i < (int)sizeof(shm_acparams_t); i += 2) - wlc_write_shm(wlc, - M_EDCF_QINFO + - wme_shmemacindex(aci) * M_EDCF_QLEN + i, - *shm_entry++); - - } while (0); - - if (suspend) - wlc_suspend_mac_and_wait(wlc); - - if (suspend) - wlc_enable_mac(wlc); - -} - -void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) -{ - u16 aci; - int i_ac; - edcf_acparam_t *edcf_acp; - - struct ieee80211_tx_queue_params txq_pars; - struct ieee80211_tx_queue_params *params = &txq_pars; - - /* - * AP uses AC params from wme_param_ie_ap. - * AP advertises AC params from wme_param_ie. - * STA uses AC params from wme_param_ie. - */ - - edcf_acp = (edcf_acparam_t *) &wlc->wme_param_ie.acparam[0]; - - for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) { - /* find out which ac this set of params applies to */ - aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT; - - /* fill in shm ac params struct */ - params->txop = edcf_acp->TXOP; - params->aifs = edcf_acp->ACI; - - /* CWmin = 2^(ECWmin) - 1 */ - params->cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK); - /* CWmax = 2^(ECWmax) - 1 */ - params->cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK) - >> EDCF_ECWMAX_SHIFT); - wlc_wme_setparams(wlc, aci, params, suspend); - } - - if (suspend) - wlc_suspend_mac_and_wait(wlc); - - if (AP_ENAB(wlc->pub) && WME_ENAB(wlc->pub)) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, false); - } - - if (suspend) - wlc_enable_mac(wlc); - -} - -bool wlc_timers_init(struct wlc_info *wlc, int unit) -{ - wlc->wdtimer = brcms_init_timer(wlc->wl, wlc_watchdog_by_timer, - wlc, "watchdog"); - if (!wlc->wdtimer) { - wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer " - "failed\n", unit); - goto fail; - } - - wlc->radio_timer = brcms_init_timer(wlc->wl, wlc_radio_timer, - wlc, "radio"); - if (!wlc->radio_timer) { - wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer " - "failed\n", unit); - goto fail; - } - - return true; - - fail: - return false; -} - -/* - * Initialize wlc_info default values ... - * may get overrides later in this function - */ -void wlc_info_init(struct wlc_info *wlc, int unit) -{ - int i; - /* Assume the device is there until proven otherwise */ - wlc->device_present = true; - - /* Save our copy of the chanspec */ - wlc->chanspec = CH20MHZ_CHSPEC(1); - - /* various 802.11g modes */ - wlc->shortslot = false; - wlc->shortslot_override = WLC_SHORTSLOT_AUTO; - - wlc_protection_upd(wlc, WLC_PROT_G_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_G_SPEC, false); - - wlc_protection_upd(wlc, WLC_PROT_N_CFG_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_N_CFG, WLC_N_PROTECTION_OFF); - wlc_protection_upd(wlc, WLC_PROT_N_NONGF_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_N_NONGF, false); - wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, AUTO); - - wlc_protection_upd(wlc, WLC_PROT_OVERLAP, WLC_PROTECTION_CTL_OVERLAP); - - /* 802.11g draft 4.0 NonERP elt advertisement */ - wlc->include_legacy_erp = true; - - wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF; - wlc->stf->txant = ANT_TX_DEF; - - wlc->prb_resp_timeout = WLC_PRB_RESP_TIMEOUT; - - wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN; - for (i = 0; i < NFIFO; i++) - wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN; - wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN; - - /* default rate fallback retry limits */ - wlc->SFBL = RETRY_SHORT_FB; - wlc->LFBL = RETRY_LONG_FB; - - /* default mac retry limits */ - wlc->SRL = RETRY_SHORT_DEF; - wlc->LRL = RETRY_LONG_DEF; - - /* Set flag to indicate that hw keys should be used when available. */ - wlc->wsec_swkeys = false; - - /* init the 4 static WEP default keys */ - for (i = 0; i < WSEC_MAX_DEFAULT_KEYS; i++) { - wlc->wsec_keys[i] = wlc->wsec_def_keys[i]; - wlc->wsec_keys[i]->idx = (u8) i; - } - - /* WME QoS mode is Auto by default */ - wlc->pub->_wme = AUTO; - -#ifdef BCMSDIODEV_ENABLED - wlc->pub->_priofc = true; /* enable priority flow control for sdio dongle */ -#endif - - wlc->pub->_ampdu = AMPDU_AGG_HOST; - wlc->pub->bcmerror = 0; - wlc->pub->_coex = ON; - - /* initialize mpc delay */ - wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; -} - -static bool wlc_state_bmac_sync(struct wlc_info *wlc) -{ - wlc_bmac_state_t state_bmac; - - if (wlc_bmac_state_get(wlc->hw, &state_bmac) != 0) - return false; - - wlc->machwcap = state_bmac.machwcap; - wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, - (s8) state_bmac.preamble_ovr); - - return true; -} - -static uint wlc_attach_module(struct wlc_info *wlc) -{ - uint err = 0; - uint unit; - unit = wlc->pub->unit; - - wlc->asi = wlc_antsel_attach(wlc); - if (wlc->asi == NULL) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_antsel_attach " - "failed\n", unit); - err = 44; - goto fail; - } - - wlc->ampdu = wlc_ampdu_attach(wlc); - if (wlc->ampdu == NULL) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_ampdu_attach " - "failed\n", unit); - err = 50; - goto fail; - } - - if ((wlc_stf_attach(wlc) != 0)) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_stf_attach " - "failed\n", unit); - err = 68; - goto fail; - } - fail: - return err; -} - -struct wlc_pub *wlc_pub(void *wlc) -{ - return ((struct wlc_info *) wlc)->pub; -} - -#define CHIP_SUPPORTS_11N(wlc) 1 - -/* - * The common driver entry routine. Error codes should be unique - */ -void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam, - uint *perr) -{ - struct wlc_info *wlc; - uint err = 0; - uint j; - struct wlc_pub *pub; - uint n_disabled; - - /* allocate struct wlc_info state and its substructures */ - wlc = (struct wlc_info *) wlc_attach_malloc(unit, &err, device); - if (wlc == NULL) - goto fail; - wlc->wiphy = wl->wiphy; - pub = wlc->pub; - -#if defined(BCMDBG) - wlc_info_dbg = wlc; -#endif - - wlc->band = wlc->bandstate[0]; - wlc->core = wlc->corestate; - wlc->wl = wl; - pub->unit = unit; - pub->_piomode = piomode; - wlc->bandinit_pending = false; - - /* populate struct wlc_info with default values */ - wlc_info_init(wlc, unit); - - /* update sta/ap related parameters */ - wlc_ap_upd(wlc); - - /* 11n_disable nvram */ - n_disabled = getintvar(pub->vars, "11n_disable"); - - /* - * low level attach steps(all hw accesses go - * inside, no more in rest of the attach) - */ - err = wlc_bmac_attach(wlc, vendor, device, unit, piomode, regsva, - bustype, btparam); - if (err) - goto fail; - - /* for some states, due to different info pointer(e,g, wlc, wlc_hw) or master/slave split, - * HIGH driver(both monolithic and HIGH_ONLY) needs to sync states FROM BMAC portion driver - */ - if (!wlc_state_bmac_sync(wlc)) { - err = 20; - goto fail; - } - - pub->phy_11ncapable = WLC_PHY_11N_CAP(wlc->band); - - /* propagate *vars* from BMAC driver to high driver */ - wlc_bmac_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size); - - - /* set maximum allowed duty cycle */ - wlc->tx_duty_cycle_ofdm = - (u16) getintvar(pub->vars, "tx_duty_cycle_ofdm"); - wlc->tx_duty_cycle_cck = - (u16) getintvar(pub->vars, "tx_duty_cycle_cck"); - - wlc_stf_phy_chain_calc(wlc); - - /* txchain 1: txant 0, txchain 2: txant 1 */ - if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) - wlc->stf->txant = wlc->stf->hw_txchain - 1; - - /* push to BMAC driver */ - wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain, - wlc->stf->hw_rxchain); - - /* pull up some info resulting from the low attach */ - { - int i; - for (i = 0; i < NFIFO; i++) - wlc->core->txavail[i] = wlc->hw->txavail[i]; - } - - wlc_bmac_hw_etheraddr(wlc->hw, wlc->perm_etheraddr); - - memcpy(&pub->cur_etheraddr, &wlc->perm_etheraddr, ETH_ALEN); - - for (j = 0; j < NBANDS(wlc); j++) { - /* Use band 1 for single band 11a */ - if (IS_SINGLEBAND_5G(wlc->deviceid)) - j = BAND_5G_INDEX; - - wlc->band = wlc->bandstate[j]; - - if (!wlc_attach_stf_ant_init(wlc)) { - err = 24; - goto fail; - } - - /* default contention windows size limits */ - wlc->band->CWmin = APHY_CWMIN; - wlc->band->CWmax = PHY_CWMAX; - - /* init gmode value */ - if (BAND_2G(wlc->band->bandtype)) { - wlc->band->gmode = GMODE_AUTO; - wlc_protection_upd(wlc, WLC_PROT_G_USER, - wlc->band->gmode); - } - - /* init _n_enab supported mode */ - if (WLC_PHY_11N_CAP(wlc->band) && CHIP_SUPPORTS_11N(wlc)) { - if (n_disabled & WLFEATURE_DISABLE_11N) { - pub->_n_enab = OFF; - wlc_protection_upd(wlc, WLC_PROT_N_USER, OFF); - } else { - pub->_n_enab = SUPPORT_11N; - wlc_protection_upd(wlc, WLC_PROT_N_USER, - ((pub->_n_enab == - SUPPORT_11N) ? WL_11N_2x2 : - WL_11N_3x3)); - } - } - - /* init per-band default rateset, depend on band->gmode */ - wlc_default_rateset(wlc, &wlc->band->defrateset); - - /* fill in hw_rateset (used early by WLC_SET_RATESET) */ - wlc_rateset_filter(&wlc->band->defrateset, - &wlc->band->hw_rateset, false, - WLC_RATES_CCK_OFDM, WLC_RATE_MASK, - (bool) N_ENAB(wlc->pub)); - } - - /* update antenna config due to wlc->stf->txant/txchain/ant_rx_ovr change */ - wlc_stf_phy_txant_upd(wlc); - - /* attach each modules */ - err = wlc_attach_module(wlc); - if (err != 0) - goto fail; - - if (!wlc_timers_init(wlc, unit)) { - wiphy_err(wl->wiphy, "wl%d: %s: wlc_init_timer failed\n", unit, - __func__); - err = 32; - goto fail; - } - - /* depend on rateset, gmode */ - wlc->cmi = wlc_channel_mgr_attach(wlc); - if (!wlc->cmi) { - wiphy_err(wl->wiphy, "wl%d: %s: wlc_channel_mgr_attach failed" - "\n", unit, __func__); - err = 33; - goto fail; - } - - /* init default when all parameters are ready, i.e. ->rateset */ - wlc_bss_default_init(wlc); - - /* - * Complete the wlc default state initializations.. - */ - - /* allocate our initial queue */ - wlc->pkt_queue = wlc_txq_alloc(wlc); - if (wlc->pkt_queue == NULL) { - wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n", - unit, __func__); - err = 100; - goto fail; - } - - wlc->bsscfg[0] = wlc->cfg; - wlc->cfg->_idx = 0; - wlc->cfg->wlc = wlc; - pub->txmaxpkts = MAXTXPKTS; - - wlc_wme_initparams_sta(wlc, &wlc->wme_param_ie); - - wlc->mimoft = FT_HT; - wlc->ht_cap.cap_info = HT_CAP; - if (HT_ENAB(wlc->pub)) - wlc->stf->ldpc = AUTO; - - wlc->mimo_40txbw = AUTO; - wlc->ofdm_40txbw = AUTO; - wlc->cck_40txbw = AUTO; - wlc_update_mimo_band_bwcap(wlc, WLC_N_BW_20IN2G_40IN5G); - - /* Set default values of SGI */ - if (WLC_SGI_CAP_PHY(wlc)) { - wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); - wlc->sgi_tx = AUTO; - } else if (WLCISSSLPNPHY(wlc->band)) { - wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); - wlc->sgi_tx = AUTO; - } else { - wlc_ht_update_sgi_rx(wlc, 0); - wlc->sgi_tx = OFF; - } - - /* *******nvram 11n config overrides Start ********* */ - - /* apply the sgi override from nvram conf */ - if (n_disabled & WLFEATURE_DISABLE_11N_SGI_TX) - wlc->sgi_tx = OFF; - - if (n_disabled & WLFEATURE_DISABLE_11N_SGI_RX) - wlc_ht_update_sgi_rx(wlc, 0); - - /* apply the stbc override from nvram conf */ - if (n_disabled & WLFEATURE_DISABLE_11N_STBC_TX) { - wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF; - wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; - wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; - } - if (n_disabled & WLFEATURE_DISABLE_11N_STBC_RX) - wlc_stf_stbc_rx_set(wlc, HT_CAP_RX_STBC_NO); - - /* apply the GF override from nvram conf */ - if (n_disabled & WLFEATURE_DISABLE_11N_GF) - wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_GRN_FLD; - - /* initialize radio_mpc_disable according to wlc->mpc */ - wlc_radio_mpc_upd(wlc); - - if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) { - if ((getintvar(wlc->pub->vars, "aa2g") == 7) || - (getintvar(wlc->pub->vars, "aa5g") == 7)) { - wlc_bmac_antsel_set(wlc->hw, 1); - } - } else { - wlc_bmac_antsel_set(wlc->hw, wlc->asi->antsel_avail); - } - - if (perr) - *perr = 0; - - return (void *)wlc; - - fail: - wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n", - unit, __func__, err); - if (wlc) - wlc_detach(wlc); - - if (perr) - *perr = err; - return NULL; -} - -static void wlc_attach_antgain_init(struct wlc_info *wlc) -{ - uint unit; - unit = wlc->pub->unit; - - if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) { - /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */ - wlc->band->antgain = 8; - } else if (wlc->band->antgain == -1) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" - " srom, using 2dB\n", unit, __func__); - wlc->band->antgain = 8; - } else { - s8 gain, fract; - /* Older sroms specified gain in whole dbm only. In order - * be able to specify qdbm granularity and remain backward compatible - * the whole dbms are now encoded in only low 6 bits and remaining qdbms - * are encoded in the hi 2 bits. 6 bit signed number ranges from - * -32 - 31. Examples: 0x1 = 1 db, - * 0xc1 = 1.75 db (1 + 3 quarters), - * 0x3f = -1 (-1 + 0 quarters), - * 0x7f = -.75 (-1 in low 6 bits + 1 quarters in hi 2 bits) = -3 qdbm. - * 0xbf = -.50 (-1 in low 6 bits + 2 quarters in hi 2 bits) = -2 qdbm. - */ - gain = wlc->band->antgain & 0x3f; - gain <<= 2; /* Sign extend */ - gain >>= 2; - fract = (wlc->band->antgain & 0xc0) >> 6; - wlc->band->antgain = 4 * gain + fract; - } -} - -static bool wlc_attach_stf_ant_init(struct wlc_info *wlc) -{ - int aa; - uint unit; - char *vars; - int bandtype; - - unit = wlc->pub->unit; - vars = wlc->pub->vars; - bandtype = wlc->band->bandtype; - - /* get antennas available */ - aa = (s8) getintvar(vars, (BAND_5G(bandtype) ? "aa5g" : "aa2g")); - if (aa == 0) - aa = (s8) getintvar(vars, - (BAND_5G(bandtype) ? "aa1" : "aa0")); - if ((aa < 1) || (aa > 15)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" - " srom (0x%x), using 3\n", unit, __func__, aa); - aa = 3; - } - - /* reset the defaults if we have a single antenna */ - if (aa == 1) { - wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0; - wlc->stf->txant = ANT_TX_FORCE_0; - } else if (aa == 2) { - wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1; - wlc->stf->txant = ANT_TX_FORCE_1; - } else { - } - - /* Compute Antenna Gain */ - wlc->band->antgain = - (s8) getintvar(vars, (BAND_5G(bandtype) ? "ag1" : "ag0")); - wlc_attach_antgain_init(wlc); - - return true; -} - - -static void wlc_timers_deinit(struct wlc_info *wlc) -{ - /* free timer state */ - if (wlc->wdtimer) { - brcms_free_timer(wlc->wl, wlc->wdtimer); - wlc->wdtimer = NULL; - } - if (wlc->radio_timer) { - brcms_free_timer(wlc->wl, wlc->radio_timer); - wlc->radio_timer = NULL; - } -} - -static void wlc_detach_module(struct wlc_info *wlc) -{ - if (wlc->asi) { - wlc_antsel_detach(wlc->asi); - wlc->asi = NULL; - } - - if (wlc->ampdu) { - wlc_ampdu_detach(wlc->ampdu); - wlc->ampdu = NULL; - } - - wlc_stf_detach(wlc); -} - -/* - * Return a count of the number of driver callbacks still pending. - * - * General policy is that wlc_detach can only dealloc/free software states. It can NOT - * touch hardware registers since the d11core may be in reset and clock may not be available. - * One exception is sb register access, which is possible if crystal is turned on - * After "down" state, driver should avoid software timer with the exception of radio_monitor. - */ -uint wlc_detach(struct wlc_info *wlc) -{ - uint callbacks = 0; - - if (wlc == NULL) - return 0; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - callbacks += wlc_bmac_detach(wlc); - - /* delete software timers */ - if (!wlc_radio_monitor_stop(wlc)) - callbacks++; - - wlc_channel_mgr_detach(wlc->cmi); - - wlc_timers_deinit(wlc); - - wlc_detach_module(wlc); - - - while (wlc->tx_queues != NULL) - wlc_txq_free(wlc, wlc->tx_queues); - - wlc_detach_mfree(wlc); - return callbacks; -} - -/* update state that depends on the current value of "ap" */ -void wlc_ap_upd(struct wlc_info *wlc) -{ - if (AP_ENAB(wlc->pub)) - wlc->PLCPHdr_override = WLC_PLCP_AUTO; /* AP: short not allowed, but not enforced */ - else - wlc->PLCPHdr_override = WLC_PLCP_SHORT; /* STA-BSS; short capable */ - - /* fixup mpc */ - wlc->mpc = true; -} - -/* read hwdisable state and propagate to wlc flag */ -static void wlc_radio_hwdisable_upd(struct wlc_info *wlc) -{ - if (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO || wlc->pub->hw_off) - return; - - if (wlc_bmac_radio_read_hwdisabled(wlc->hw)) { - mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); - } else { - mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); - } -} - -/* return true if Minimum Power Consumption should be entered, false otherwise */ -bool wlc_is_non_delay_mpc(struct wlc_info *wlc) -{ - return false; -} - -bool wlc_ismpc(struct wlc_info *wlc) -{ - return (wlc->mpc_delay_off == 0) && (wlc_is_non_delay_mpc(wlc)); -} - -void wlc_radio_mpc_upd(struct wlc_info *wlc) -{ - bool mpc_radio, radio_state; - - /* - * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled - * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio - * monitor also when WL_RADIO_MPC_DISABLE is the only reason that - * the radio is going down. - */ - if (!wlc->mpc) { - if (!wlc->pub->radio_disabled) - return; - mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); - wlc_radio_upd(wlc); - if (!wlc->pub->radio_disabled) - wlc_radio_monitor_stop(wlc); - return; - } - - /* - * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in wlc->pub->radio_disabled - * to go ON, always call radio_upd synchronously - * to go OFF, postpone radio_upd to later when context is safe(e.g. watchdog) - */ - radio_state = - (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF : - ON); - mpc_radio = (wlc_ismpc(wlc) == true) ? OFF : ON; - - if (radio_state == ON && mpc_radio == OFF) - wlc->mpc_delay_off = wlc->mpc_dlycnt; - else if (radio_state == OFF && mpc_radio == ON) { - mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); - wlc_radio_upd(wlc); - if (wlc->mpc_offcnt < WLC_MPC_THRESHOLD) { - wlc->mpc_dlycnt = WLC_MPC_MAX_DELAYCNT; - } else - wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; - wlc->mpc_dur += OSL_SYSUPTIME() - wlc->mpc_laston_ts; - } - /* Below logic is meant to capture the transition from mpc off to mpc on for reasons - * other than wlc->mpc_delay_off keeping the mpc off. In that case reset - * wlc->mpc_delay_off to wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off - */ - if ((wlc->prev_non_delay_mpc == false) && - (wlc_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) { - wlc->mpc_delay_off = wlc->mpc_dlycnt; - } - wlc->prev_non_delay_mpc = wlc_is_non_delay_mpc(wlc); -} - -/* - * centralized radio disable/enable function, - * invoke radio enable/disable after updating hwradio status - */ -static void wlc_radio_upd(struct wlc_info *wlc) -{ - if (wlc->pub->radio_disabled) { - wlc_radio_disable(wlc); - } else { - wlc_radio_enable(wlc); - } -} - -/* maintain LED behavior in down state */ -static void wlc_down_led_upd(struct wlc_info *wlc) -{ - /* maintain LEDs while in down state, turn on sbclk if not available yet */ - /* turn on sbclk if necessary */ - if (!AP_ENAB(wlc->pub)) { - wlc_pllreq(wlc, true, WLC_PLLREQ_FLIP); - - wlc_pllreq(wlc, false, WLC_PLLREQ_FLIP); - } -} - -/* update hwradio status and return it */ -bool wlc_check_radio_disabled(struct wlc_info *wlc) -{ - wlc_radio_hwdisable_upd(wlc); - - return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? true : false; -} - -void wlc_radio_disable(struct wlc_info *wlc) -{ - if (!wlc->pub->up) { - wlc_down_led_upd(wlc); - return; - } - - wlc_radio_monitor_start(wlc); - brcms_down(wlc->wl); -} - -static void wlc_radio_enable(struct wlc_info *wlc) -{ - if (wlc->pub->up) - return; - - if (DEVICEREMOVED(wlc)) - return; - - brcms_up(wlc->wl); -} - -/* periodical query hw radio button while driver is "down" */ -static void wlc_radio_timer(void *arg) -{ - struct wlc_info *wlc = (struct wlc_info *) arg; - - if (DEVICEREMOVED(wlc)) { - wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, - __func__); - brcms_down(wlc->wl); - return; - } - - /* cap mpc off count */ - if (wlc->mpc_offcnt < WLC_MPC_MAX_DELAYCNT) - wlc->mpc_offcnt++; - - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); -} - -static bool wlc_radio_monitor_start(struct wlc_info *wlc) -{ - /* Don't start the timer if HWRADIO feature is disabled */ - if (wlc->radio_monitor || (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO)) - return true; - - wlc->radio_monitor = true; - wlc_pllreq(wlc, true, WLC_PLLREQ_RADIO_MON); - brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, - true); - return true; -} - -bool wlc_radio_monitor_stop(struct wlc_info *wlc) -{ - if (!wlc->radio_monitor) - return true; - - wlc->radio_monitor = false; - wlc_pllreq(wlc, false, WLC_PLLREQ_RADIO_MON); - return brcms_del_timer(wlc->wl, wlc->radio_timer); -} - -static void wlc_watchdog_by_timer(void *arg) -{ - wlc_watchdog(arg); -} - -/* common watchdog code */ -static void wlc_watchdog(void *arg) -{ - struct wlc_info *wlc = (struct wlc_info *) arg; - int i; - struct wlc_bsscfg *cfg; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - if (!wlc->pub->up) - return; - - if (DEVICEREMOVED(wlc)) { - wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, - __func__); - brcms_down(wlc->wl); - return; - } - - /* increment second count */ - wlc->pub->now++; - - /* delay radio disable */ - if (wlc->mpc_delay_off) { - if (--wlc->mpc_delay_off == 0) { - mboolset(wlc->pub->radio_disabled, - WL_RADIO_MPC_DISABLE); - if (wlc->mpc && wlc_ismpc(wlc)) - wlc->mpc_offcnt = 0; - wlc->mpc_laston_ts = OSL_SYSUPTIME(); - } - } - - /* mpc sync */ - wlc_radio_mpc_upd(wlc); - /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */ - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); - /* if radio is disable, driver may be down, quit here */ - if (wlc->pub->radio_disabled) - return; - - wlc_bmac_watchdog(wlc); - - /* occasionally sample mac stat counters to detect 16-bit counter wrap */ - if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0) - wlc_statsupd(wlc); - - /* Manage TKIP countermeasures timers */ - FOREACH_BSS(wlc, i, cfg) { - if (cfg->tk_cm_dt) { - cfg->tk_cm_dt--; - } - if (cfg->tk_cm_bt) { - cfg->tk_cm_bt--; - } - } - - /* Call any registered watchdog handlers */ - for (i = 0; i < WLC_MAXMODULES; i++) { - if (wlc->modulecb[i].watchdog_fn) - wlc->modulecb[i].watchdog_fn(wlc->modulecb[i].hdl); - } - - if (WLCISNPHY(wlc->band) && !wlc->pub->tempsense_disable && - ((wlc->pub->now - wlc->tempsense_lasttime) >= - WLC_TEMPSENSE_PERIOD)) { - wlc->tempsense_lasttime = wlc->pub->now; - wlc_tempsense_upd(wlc); - } -} - -/* make interface operational */ -int wlc_up(struct wlc_info *wlc) -{ - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - /* HW is turned off so don't try to access it */ - if (wlc->pub->hw_off || DEVICEREMOVED(wlc)) - return -ENOMEDIUM; - - if (!wlc->pub->hw_up) { - wlc_bmac_hw_up(wlc->hw); - wlc->pub->hw_up = true; - } - - if ((wlc->pub->boardflags & BFL_FEM) - && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) { - if (wlc->pub->boardrev >= 0x1250 - && (wlc->pub->boardflags & BFL_FEM_BT)) { - wlc_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL, - MHF5_4313_GPIOCTRL, WLC_BAND_ALL); - } else { - wlc_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE, MHF4_EXTPA_ENABLE, - WLC_BAND_ALL); - } - } - - /* - * Need to read the hwradio status here to cover the case where the system - * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. - * if radio is disabled, abort up, lower power, start radio timer and return 0(for NDIS) - * don't call radio_update to avoid looping wlc_up. - * - * wlc_bmac_up_prep() returns either 0 or -BCME_RADIOOFF only - */ - if (!wlc->pub->radio_disabled) { - int status = wlc_bmac_up_prep(wlc->hw); - if (status == -ENOMEDIUM) { - if (!mboolisset - (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) { - int idx; - struct wlc_bsscfg *bsscfg; - mboolset(wlc->pub->radio_disabled, - WL_RADIO_HW_DISABLE); - - FOREACH_BSS(wlc, idx, bsscfg) { - if (!BSSCFG_STA(bsscfg) - || !bsscfg->enable || !bsscfg->BSS) - continue; - wiphy_err(wlc->wiphy, "wl%d.%d: wlc_up" - ": rfdisable -> " - "wlc_bsscfg_disable()\n", - wlc->pub->unit, idx); - } - } - } - } - - if (wlc->pub->radio_disabled) { - wlc_radio_monitor_start(wlc); - return 0; - } - - /* wlc_bmac_up_prep has done wlc_corereset(). so clk is on, set it */ - wlc->clk = true; - - wlc_radio_monitor_stop(wlc); - - /* Set EDCF hostflags */ - if (EDCF_ENAB(wlc->pub)) { - wlc_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, WLC_BAND_ALL); - } else { - wlc_mhf(wlc, MHF1, MHF1_EDCF, 0, WLC_BAND_ALL); - } - - if (WLC_WAR16165(wlc)) - wlc_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, - WLC_BAND_ALL); - - brcms_init(wlc->wl); - wlc->pub->up = true; - - if (wlc->bandinit_pending) { - wlc_suspend_mac_and_wait(wlc); - wlc_set_chanspec(wlc, wlc->default_bss->chanspec); - wlc->bandinit_pending = false; - wlc_enable_mac(wlc); - } - - wlc_bmac_up_finish(wlc->hw); - - /* other software states up after ISR is running */ - /* start APs that were to be brought up but are not up yet */ - /* if (AP_ENAB(wlc->pub)) wlc_restart_ap(wlc->ap); */ - - /* Program the TX wme params with the current settings */ - wlc_wme_retries_write(wlc); - - /* start one second watchdog timer */ - brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); - wlc->WDarmed = true; - - /* ensure antenna config is up to date */ - wlc_stf_phy_txant_upd(wlc); - /* ensure LDPC config is in sync */ - wlc_ht_update_ldpc(wlc, wlc->stf->ldpc); - - return 0; -} - -/* Initialize the base precedence map for dequeueing from txq based on WME settings */ -static void wlc_tx_prec_map_init(struct wlc_info *wlc) -{ - wlc->tx_prec_map = WLC_PREC_BMP_ALL; - memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16)); - - /* For non-WME, both fifos have overlapping MAXPRIO. So just disable all precedences - * if either is full. - */ - if (!EDCF_ENAB(wlc->pub)) { - wlc->fifo2prec_map[TX_DATA_FIFO] = WLC_PREC_BMP_ALL; - wlc->fifo2prec_map[TX_CTL_FIFO] = WLC_PREC_BMP_ALL; - } else { - wlc->fifo2prec_map[TX_AC_BK_FIFO] = WLC_PREC_BMP_AC_BK; - wlc->fifo2prec_map[TX_AC_BE_FIFO] = WLC_PREC_BMP_AC_BE; - wlc->fifo2prec_map[TX_AC_VI_FIFO] = WLC_PREC_BMP_AC_VI; - wlc->fifo2prec_map[TX_AC_VO_FIFO] = WLC_PREC_BMP_AC_VO; - } -} - -static uint wlc_down_del_timer(struct wlc_info *wlc) -{ - uint callbacks = 0; - - return callbacks; -} - -/* - * Mark the interface nonoperational, stop the software mechanisms, - * disable the hardware, free any transient buffer state. - * Return a count of the number of driver callbacks still pending. - */ -uint wlc_down(struct wlc_info *wlc) -{ - - uint callbacks = 0; - int i; - bool dev_gone = false; - struct wlc_txq_info *qi; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - /* check if we are already in the going down path */ - if (wlc->going_down) { - wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return" - "\n", wlc->pub->unit, __func__); - return 0; - } - if (!wlc->pub->up) - return callbacks; - - /* in between, mpc could try to bring down again.. */ - wlc->going_down = true; - - callbacks += wlc_bmac_down_prep(wlc->hw); - - dev_gone = DEVICEREMOVED(wlc); - - /* Call any registered down handlers */ - for (i = 0; i < WLC_MAXMODULES; i++) { - if (wlc->modulecb[i].down_fn) - callbacks += - wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl); - } - - /* cancel the watchdog timer */ - if (wlc->WDarmed) { - if (!brcms_del_timer(wlc->wl, wlc->wdtimer)) - callbacks++; - wlc->WDarmed = false; - } - /* cancel all other timers */ - callbacks += wlc_down_del_timer(wlc); - - wlc->pub->up = false; - - wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL); - - /* clear txq flow control */ - wlc_txflowcontrol_reset(wlc); - - /* flush tx queues */ - for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { - brcmu_pktq_flush(&qi->q, true, NULL, NULL); - } - - callbacks += wlc_bmac_down_finish(wlc->hw); - - /* wlc_bmac_down_finish has done wlc_coredisable(). so clk is off */ - wlc->clk = false; - - wlc->going_down = false; - return callbacks; -} - -/* Set the current gmode configuration */ -int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) -{ - int ret = 0; - uint i; - wlc_rateset_t rs; - /* Default to 54g Auto */ - s8 shortslot = WLC_SHORTSLOT_AUTO; /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ - bool shortslot_restrict = false; /* Restrict association to stations that support shortslot - */ - bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ - int preamble = WLC_PLCP_LONG; /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ - bool preamble_restrict = false; /* Restrict association to stations that support short - * preambles - */ - struct wlcband *band; - - /* if N-support is enabled, allow Gmode set as long as requested - * Gmode is not GMODE_LEGACY_B - */ - if (N_ENAB(wlc->pub) && gmode == GMODE_LEGACY_B) - return -ENOTSUPP; - - /* verify that we are dealing with 2G band and grab the band pointer */ - if (wlc->band->bandtype == WLC_BAND_2G) - band = wlc->band; - else if ((NBANDS(wlc) > 1) && - (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == WLC_BAND_2G)) - band = wlc->bandstate[OTHERBANDUNIT(wlc)]; - else - return -EINVAL; - - /* Legacy or bust when no OFDM is supported by regulatory */ - if ((wlc_channel_locale_flags_in_band(wlc->cmi, band->bandunit) & - WLC_NO_OFDM) && (gmode != GMODE_LEGACY_B)) - return -EINVAL; - - /* update configuration value */ - if (config == true) - wlc_protection_upd(wlc, WLC_PROT_G_USER, gmode); - - /* Clear supported rates filter */ - memset(&wlc->sup_rates_override, 0, sizeof(wlc_rateset_t)); - - /* Clear rateset override */ - memset(&rs, 0, sizeof(wlc_rateset_t)); - - switch (gmode) { - case GMODE_LEGACY_B: - shortslot = WLC_SHORTSLOT_OFF; - wlc_rateset_copy(&gphy_legacy_rates, &rs); - - break; - - case GMODE_LRS: - if (AP_ENAB(wlc->pub)) - wlc_rateset_copy(&cck_rates, &wlc->sup_rates_override); - break; - - case GMODE_AUTO: - /* Accept defaults */ - break; - - case GMODE_ONLY: - ofdm_basic = true; - preamble = WLC_PLCP_SHORT; - preamble_restrict = true; - break; - - case GMODE_PERFORMANCE: - if (AP_ENAB(wlc->pub)) /* Put all rates into the Supported Rates element */ - wlc_rateset_copy(&cck_ofdm_rates, - &wlc->sup_rates_override); - - shortslot = WLC_SHORTSLOT_ON; - shortslot_restrict = true; - ofdm_basic = true; - preamble = WLC_PLCP_SHORT; - preamble_restrict = true; - break; - - default: - /* Error */ - wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n", - wlc->pub->unit, __func__, gmode); - return -ENOTSUPP; - } - - /* - * If we are switching to gmode == GMODE_LEGACY_B, - * clean up rate info that may refer to OFDM rates. - */ - if ((gmode == GMODE_LEGACY_B) && (band->gmode != GMODE_LEGACY_B)) { - band->gmode = gmode; - if (band->rspec_override && !IS_CCK(band->rspec_override)) { - band->rspec_override = 0; - wlc_reprate_init(wlc); - } - if (band->mrspec_override && !IS_CCK(band->mrspec_override)) { - band->mrspec_override = 0; - } - } - - band->gmode = gmode; - - wlc->shortslot_override = shortslot; - - if (AP_ENAB(wlc->pub)) { - /* wlc->ap->shortslot_restrict = shortslot_restrict; */ - wlc->PLCPHdr_override = - (preamble != - WLC_PLCP_LONG) ? WLC_PLCP_SHORT : WLC_PLCP_AUTO; - } - - if ((AP_ENAB(wlc->pub) && preamble != WLC_PLCP_LONG) - || preamble == WLC_PLCP_SHORT) - wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_PREAMBLE; - else - wlc->default_bss->capability &= ~WLAN_CAPABILITY_SHORT_PREAMBLE; - - /* Update shortslot capability bit for AP and IBSS */ - if ((AP_ENAB(wlc->pub) && shortslot == WLC_SHORTSLOT_AUTO) || - shortslot == WLC_SHORTSLOT_ON) - wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME; - else - wlc->default_bss->capability &= - ~WLAN_CAPABILITY_SHORT_SLOT_TIME; - - /* Use the default 11g rateset */ - if (!rs.count) - wlc_rateset_copy(&cck_ofdm_rates, &rs); - - if (ofdm_basic) { - for (i = 0; i < rs.count; i++) { - if (rs.rates[i] == WLC_RATE_6M - || rs.rates[i] == WLC_RATE_12M - || rs.rates[i] == WLC_RATE_24M) - rs.rates[i] |= WLC_RATE_FLAG; - } - } - - /* Set default bss rateset */ - wlc->default_bss->rateset.count = rs.count; - memcpy(wlc->default_bss->rateset.rates, rs.rates, - sizeof(wlc->default_bss->rateset.rates)); - - return ret; -} - -static int wlc_nmode_validate(struct wlc_info *wlc, s32 nmode) -{ - int err = 0; - - switch (nmode) { - - case OFF: - break; - - case AUTO: - case WL_11N_2x2: - case WL_11N_3x3: - if (!(WLC_PHY_11N_CAP(wlc->band))) - err = -EINVAL; - break; - - default: - err = -EINVAL; - break; - } - - return err; -} - -int wlc_set_nmode(struct wlc_info *wlc, s32 nmode) -{ - uint i; - int err; - - err = wlc_nmode_validate(wlc, nmode); - if (err) - return err; - - switch (nmode) { - case OFF: - wlc->pub->_n_enab = OFF; - wlc->default_bss->flags &= ~WLC_BSS_HT; - /* delete the mcs rates from the default and hw ratesets */ - wlc_rateset_mcs_clear(&wlc->default_bss->rateset); - for (i = 0; i < NBANDS(wlc); i++) { - memset(wlc->bandstate[i]->hw_rateset.mcs, 0, - MCSSET_LEN); - if (IS_MCS(wlc->band->rspec_override)) { - wlc->bandstate[i]->rspec_override = 0; - wlc_reprate_init(wlc); - } - if (IS_MCS(wlc->band->mrspec_override)) - wlc->bandstate[i]->mrspec_override = 0; - } - break; - - case AUTO: - if (wlc->stf->txstreams == WL_11N_3x3) - nmode = WL_11N_3x3; - else - nmode = WL_11N_2x2; - case WL_11N_2x2: - case WL_11N_3x3: - /* force GMODE_AUTO if NMODE is ON */ - wlc_set_gmode(wlc, GMODE_AUTO, true); - if (nmode == WL_11N_3x3) - wlc->pub->_n_enab = SUPPORT_HT; - else - wlc->pub->_n_enab = SUPPORT_11N; - wlc->default_bss->flags |= WLC_BSS_HT; - /* add the mcs rates to the default and hw ratesets */ - wlc_rateset_mcs_build(&wlc->default_bss->rateset, - wlc->stf->txstreams); - for (i = 0; i < NBANDS(wlc); i++) - memcpy(wlc->bandstate[i]->hw_rateset.mcs, - wlc->default_bss->rateset.mcs, MCSSET_LEN); - break; - - default: - break; - } - - return err; -} - -static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) -{ - wlc_rateset_t rs, new; - uint bandunit; - - memcpy(&rs, rs_arg, sizeof(wlc_rateset_t)); - - /* check for bad count value */ - if ((rs.count == 0) || (rs.count > WLC_NUMRATES)) - return -EINVAL; - - /* try the current band */ - bandunit = wlc->band->bandunit; - memcpy(&new, &rs, sizeof(wlc_rateset_t)); - if (wlc_rate_hwrs_filter_sort_validate - (&new, &wlc->bandstate[bandunit]->hw_rateset, true, - wlc->stf->txstreams)) - goto good; - - /* try the other band */ - if (IS_MBAND_UNLOCKED(wlc)) { - bandunit = OTHERBANDUNIT(wlc); - memcpy(&new, &rs, sizeof(wlc_rateset_t)); - if (wlc_rate_hwrs_filter_sort_validate(&new, - &wlc-> - bandstate[bandunit]-> - hw_rateset, true, - wlc->stf->txstreams)) - goto good; - } - - return -EBADE; - - good: - /* apply new rateset */ - memcpy(&wlc->default_bss->rateset, &new, sizeof(wlc_rateset_t)); - memcpy(&wlc->bandstate[bandunit]->defrateset, &new, - sizeof(wlc_rateset_t)); - return 0; -} - -/* simplified integer set interface for common ioctl handler */ -int wlc_set(struct wlc_info *wlc, int cmd, int arg) -{ - return wlc_ioctl(wlc, cmd, (void *)&arg, sizeof(arg), NULL); -} - -/* simplified integer get interface for common ioctl handler */ -int wlc_get(struct wlc_info *wlc, int cmd, int *arg) -{ - return wlc_ioctl(wlc, cmd, arg, sizeof(int), NULL); -} - -static void wlc_ofdm_rateset_war(struct wlc_info *wlc) -{ - u8 r; - bool war = false; - - if (wlc->cfg->associated) - r = wlc->cfg->current_bss->rateset.rates[0]; - else - r = wlc->default_bss->rateset.rates[0]; - - wlc_phy_ofdm_rateset_war(wlc->band->pi, war); - - return; -} - -int -wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif) -{ - return _wlc_ioctl(wlc, cmd, arg, len, wlcif); -} - -/* common ioctl handler. return: 0=ok, -1=error, positive=particular error */ -static int -_wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif) -{ - int val, *pval; - bool bool_val; - int bcmerror; - d11regs_t *regs; - struct scb *nextscb; - bool ta_ok; - uint band; - struct wlc_bsscfg *bsscfg; - wlc_bss_info_t *current_bss; - - /* update bsscfg pointer */ - bsscfg = wlc->cfg; - current_bss = bsscfg->current_bss; - - /* initialize the following to get rid of compiler warning */ - nextscb = NULL; - ta_ok = false; - band = 0; - - /* If the device is turned off, then it's not "removed" */ - if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) { - wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, - __func__); - brcms_down(wlc->wl); - return -EBADE; - } - - /* default argument is generic integer */ - pval = arg ? (int *)arg:NULL; - - /* This will prevent the misaligned access */ - if (pval && (u32) len >= sizeof(val)) - memcpy(&val, pval, sizeof(val)); - else - val = 0; - - /* bool conversion to avoid duplication below */ - bool_val = val != 0; - bcmerror = 0; - regs = wlc->regs; - - if ((arg == NULL) || (len <= 0)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs arguments\n", - wlc->pub->unit, __func__, cmd); - bcmerror = -EINVAL; - goto done; - } - - switch (cmd) { - - case WLC_SET_CHANNEL:{ - chanspec_t chspec = CH20MHZ_CHSPEC(val); - - if (val < 0 || val > MAXCHANNEL) { - bcmerror = -EINVAL; - break; - } - - if (!wlc_valid_chanspec_db(wlc->cmi, chspec)) { - bcmerror = -EINVAL; - break; - } - - if (!wlc->pub->up && IS_MBAND_UNLOCKED(wlc)) { - if (wlc->band->bandunit != - CHSPEC_WLCBANDUNIT(chspec)) - wlc->bandinit_pending = true; - else - wlc->bandinit_pending = false; - } - - wlc->default_bss->chanspec = chspec; - /* wlc_BSSinit() will sanitize the rateset before using it.. */ - if (wlc->pub->up && - (WLC_BAND_PI_RADIO_CHANSPEC != chspec)) { - wlc_set_home_chanspec(wlc, chspec); - wlc_suspend_mac_and_wait(wlc); - wlc_set_chanspec(wlc, chspec); - wlc_enable_mac(wlc); - } - break; - } - - case WLC_SET_SRL: - if (val >= 1 && val <= RETRY_SHORT_MAX) { - int ac; - wlc->SRL = (u16) val; - - wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); - - for (ac = 0; ac < AC_COUNT; ac++) { - WLC_WME_RETRY_SHORT_SET(wlc, ac, wlc->SRL); - } - wlc_wme_retries_write(wlc); - } else - bcmerror = -EINVAL; - break; - - case WLC_SET_LRL: - if (val >= 1 && val <= 255) { - int ac; - wlc->LRL = (u16) val; - - wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); - - for (ac = 0; ac < AC_COUNT; ac++) { - WLC_WME_RETRY_LONG_SET(wlc, ac, wlc->LRL); - } - wlc_wme_retries_write(wlc); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_CURR_RATESET:{ - wl_rateset_t *ret_rs = (wl_rateset_t *) arg; - wlc_rateset_t *rs; - - if (wlc->pub->associated) - rs = ¤t_bss->rateset; - else - rs = &wlc->default_bss->rateset; - - if (len < (int)(rs->count + sizeof(rs->count))) { - bcmerror = -EOVERFLOW; - break; - } - - /* Copy only legacy rateset section */ - ret_rs->count = rs->count; - memcpy(&ret_rs->rates, &rs->rates, rs->count); - break; - } - - case WLC_SET_RATESET:{ - wlc_rateset_t rs; - wl_rateset_t *in_rs = (wl_rateset_t *) arg; - - if (len < (int)(in_rs->count + sizeof(in_rs->count))) { - bcmerror = -EOVERFLOW; - break; - } - - if (in_rs->count > WLC_NUMRATES) { - bcmerror = -ENOBUFS; - break; - } - - memset(&rs, 0, sizeof(wlc_rateset_t)); - - /* Copy only legacy rateset section */ - rs.count = in_rs->count; - memcpy(&rs.rates, &in_rs->rates, rs.count); - - /* merge rateset coming in with the current mcsset */ - if (N_ENAB(wlc->pub)) { - if (bsscfg->associated) - memcpy(rs.mcs, - ¤t_bss->rateset.mcs[0], - MCSSET_LEN); - else - memcpy(rs.mcs, - &wlc->default_bss->rateset.mcs[0], - MCSSET_LEN); - } - - bcmerror = wlc_set_rateset(wlc, &rs); - - if (!bcmerror) - wlc_ofdm_rateset_war(wlc); - - break; - } - - case WLC_SET_BCNPRD: - /* range [1, 0xffff] */ - if (val >= DOT11_MIN_BEACON_PERIOD - && val <= DOT11_MAX_BEACON_PERIOD) { - wlc->default_bss->beacon_period = (u16) val; - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_PHYLIST: - { - unsigned char *cp = arg; - if (len < 3) { - bcmerror = -EOVERFLOW; - break; - } - - if (WLCISNPHY(wlc->band)) { - *cp++ = 'n'; - } else if (WLCISLCNPHY(wlc->band)) { - *cp++ = 'c'; - } else if (WLCISSSLPNPHY(wlc->band)) { - *cp++ = 's'; - } - *cp = '\0'; - break; - } - - case WLC_SET_SHORTSLOT_OVERRIDE: - if ((val != WLC_SHORTSLOT_AUTO) && - (val != WLC_SHORTSLOT_OFF) && (val != WLC_SHORTSLOT_ON)) { - bcmerror = -EINVAL; - break; - } - - wlc->shortslot_override = (s8) val; - - /* shortslot is an 11g feature, so no more work if we are - * currently on the 5G band - */ - if (BAND_5G(wlc->band->bandtype)) - break; - - if (wlc->pub->up && wlc->pub->associated) { - /* let watchdog or beacon processing update shortslot */ - } else if (wlc->pub->up) { - /* unassociated shortslot is off */ - wlc_switch_shortslot(wlc, false); - } else { - /* driver is down, so just update the wlc_info value */ - if (wlc->shortslot_override == WLC_SHORTSLOT_AUTO) { - wlc->shortslot = false; - } else { - wlc->shortslot = - (wlc->shortslot_override == - WLC_SHORTSLOT_ON); - } - } - - break; - - } - done: - - if (bcmerror) - wlc->pub->bcmerror = bcmerror; - - return bcmerror; -} - -/* - * register watchdog and down handlers. - */ -int wlc_module_register(struct wlc_pub *pub, - const char *name, void *hdl, - watchdog_fn_t w_fn, down_fn_t d_fn) -{ - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; - int i; - - /* find an empty entry and just add, no duplication check! */ - for (i = 0; i < WLC_MAXMODULES; i++) { - if (wlc->modulecb[i].name[0] == '\0') { - strncpy(wlc->modulecb[i].name, name, - sizeof(wlc->modulecb[i].name) - 1); - wlc->modulecb[i].hdl = hdl; - wlc->modulecb[i].watchdog_fn = w_fn; - wlc->modulecb[i].down_fn = d_fn; - return 0; - } - } - - return -ENOSR; -} - -/* unregister module callbacks */ -int wlc_module_unregister(struct wlc_pub *pub, const char *name, void *hdl) -{ - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; - int i; - - if (wlc == NULL) - return -ENODATA; - - for (i = 0; i < WLC_MAXMODULES; i++) { - if (!strcmp(wlc->modulecb[i].name, name) && - (wlc->modulecb[i].hdl == hdl)) { - memset(&wlc->modulecb[i], 0, sizeof(struct modulecb)); - return 0; - } - } - - /* table not found! */ - return -ENODATA; -} - -/* Write WME tunable parameters for retransmit/max rate from wlc struct to ucode */ -static void wlc_wme_retries_write(struct wlc_info *wlc) -{ - int ac; - - /* Need clock to do this */ - if (!wlc->clk) - return; - - for (ac = 0; ac < AC_COUNT; ac++) { - wlc_write_shm(wlc, M_AC_TXLMT_ADDR(ac), wlc->wme_retries[ac]); - } -} - -#ifdef BCMDBG -static const char *supr_reason[] = { - "None", "PMQ Entry", "Flush request", - "Previous frag failure", "Channel mismatch", - "Lifetime Expiry", "Underflow" -}; - -static void wlc_print_txs_status(u16 s) -{ - printk(KERN_DEBUG "[15:12] %d frame attempts\n", - (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT); - printk(KERN_DEBUG " [11:8] %d rts attempts\n", - (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT); - printk(KERN_DEBUG " [7] %d PM mode indicated\n", - ((s & TX_STATUS_PMINDCTD) ? 1 : 0)); - printk(KERN_DEBUG " [6] %d intermediate status\n", - ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0)); - printk(KERN_DEBUG " [5] %d AMPDU\n", - (s & TX_STATUS_AMPDU) ? 1 : 0); - printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n", - ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT), - supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]); - printk(KERN_DEBUG " [1] %d acked\n", - ((s & TX_STATUS_ACK_RCV) ? 1 : 0)); -} -#endif /* BCMDBG */ - -void wlc_print_txstatus(tx_status_t *txs) -{ -#if defined(BCMDBG) - u16 s = txs->status; - u16 ackphyrxsh = txs->ackphyrxsh; - - printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n"); - - printk(KERN_DEBUG "FrameID: %04x ", txs->frameid); - printk(KERN_DEBUG "TxStatus: %04x", s); - printk(KERN_DEBUG "\n"); - - wlc_print_txs_status(s); - - printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime); - printk(KERN_DEBUG "Seq: %04x ", txs->sequence); - printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr); - printk(KERN_DEBUG "RxAckRSSI: %04x ", - (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT); - printk(KERN_DEBUG "RxAckSQ: %04x", - (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT); - printk(KERN_DEBUG "\n"); -#endif /* defined(BCMDBG) */ -} - -void wlc_statsupd(struct wlc_info *wlc) -{ - int i; - macstat_t macstats; -#ifdef BCMDBG - u16 delta; - u16 rxf0ovfl; - u16 txfunfl[NFIFO]; -#endif /* BCMDBG */ - - /* if driver down, make no sense to update stats */ - if (!wlc->pub->up) - return; - -#ifdef BCMDBG - /* save last rx fifo 0 overflow count */ - rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl; - - /* save last tx fifo underflow count */ - for (i = 0; i < NFIFO; i++) - txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i]; -#endif /* BCMDBG */ - - /* Read mac stats from contiguous shared memory */ - wlc_bmac_copyfrom_shm(wlc->hw, M_UCODE_MACSTAT, - &macstats, sizeof(macstat_t)); - -#ifdef BCMDBG - /* check for rx fifo 0 overflow */ - delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl); - if (delta) - wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n", - wlc->pub->unit, delta); - - /* check for tx fifo underflows */ - for (i = 0; i < NFIFO; i++) { - delta = - (u16) (wlc->core->macstat_snapshot->txfunfl[i] - - txfunfl[i]); - if (delta) - wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!" - "\n", wlc->pub->unit, delta, i); - } -#endif /* BCMDBG */ - - /* merge counters from dma module */ - for (i = 0; i < NFIFO; i++) { - if (wlc->hw->di[i]) { - dma_counterreset(wlc->hw->di[i]); - } - } -} - -bool wlc_chipmatch(u16 vendor, u16 device) -{ - if (vendor != PCI_VENDOR_ID_BROADCOM) { - pr_err("wlc_chipmatch: unknown vendor id %04x\n", vendor); - return false; - } - - if (device == BCM43224_D11N_ID_VEN1) - return true; - if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID)) - return true; - if (device == BCM4313_D11N2G_ID) - return true; - if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID)) - return true; - - pr_err("wlc_chipmatch: unknown device id %04x\n", device); - return false; -} - -#if defined(BCMDBG) -void wlc_print_txdesc(d11txh_t *txh) -{ - u16 mtcl = le16_to_cpu(txh->MacTxControlLow); - u16 mtch = le16_to_cpu(txh->MacTxControlHigh); - u16 mfc = le16_to_cpu(txh->MacFrameControl); - u16 tfest = le16_to_cpu(txh->TxFesTimeNormal); - u16 ptcw = le16_to_cpu(txh->PhyTxControlWord); - u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1); - u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr); - u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts); - u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts); - u16 mainrates = le16_to_cpu(txh->MainRates); - u16 xtraft = le16_to_cpu(txh->XtraFrameTypes); - u8 *iv = txh->IV; - u8 *ra = txh->TxFrameRA; - u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback); - u8 *rtspfb = txh->RTSPLCPFallback; - u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback); - u8 *fragpfb = txh->FragPLCPFallback; - u16 fragdfb = le16_to_cpu(txh->FragDurFallback); - u16 mmodelen = le16_to_cpu(txh->MModeLen); - u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen); - u16 tfid = le16_to_cpu(txh->TxFrameID); - u16 txs = le16_to_cpu(txh->TxStatus); - u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus); - u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT); - u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR); - u16 mmbyte = le16_to_cpu(txh->MinMBytes); - - u8 *rtsph = txh->RTSPhyHeader; - struct ieee80211_rts rts = txh->rts_frame; - char hexbuf[256]; - - /* add plcp header along with txh descriptor */ - printk(KERN_DEBUG "Raw TxDesc + plcp header:\n"); - print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, - txh, sizeof(d11txh_t) + 48); - - printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl); - printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch); - printk(KERN_DEBUG "FC: %04x ", mfc); - printk(KERN_DEBUG "FES Time: %04x\n", tfest); - printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw, - (ptcw & PHY_TXC_SHORT_HDR) ? " short" : ""); - printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1); - printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr); - printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts); - printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts); - printk(KERN_DEBUG "MainRates: %04x ", mainrates); - printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft); - printk(KERN_DEBUG "\n"); - - brcmu_format_hex(hexbuf, iv, sizeof(txh->IV)); - printk(KERN_DEBUG "SecIV: %s\n", hexbuf); - brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); - printk(KERN_DEBUG "RA: %s\n", hexbuf); - - printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb); - brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); - printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); - printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb); - brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); - printk(KERN_DEBUG "PLCP: %s ", hexbuf); - printk(KERN_DEBUG "DUR: %04x", fragdfb); - printk(KERN_DEBUG "\n"); - - printk(KERN_DEBUG "MModeLen: %04x ", mmodelen); - printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen); - - printk(KERN_DEBUG "FrameID: %04x\n", tfid); - printk(KERN_DEBUG "TxStatus: %04x\n", txs); - - printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu); - printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte); - printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f); - printk(KERN_DEBUG "MinByte: %04x\n", mmbyte); - - brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); - printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); - brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); - printk(KERN_DEBUG "RTS Frame: %s", hexbuf); - printk(KERN_DEBUG "\n"); -} -#endif /* defined(BCMDBG) */ - -#if defined(BCMDBG) -void wlc_print_rxh(d11rxhdr_t *rxh) -{ - u16 len = rxh->RxFrameSize; - u16 phystatus_0 = rxh->PhyRxStatus_0; - u16 phystatus_1 = rxh->PhyRxStatus_1; - u16 phystatus_2 = rxh->PhyRxStatus_2; - u16 phystatus_3 = rxh->PhyRxStatus_3; - u16 macstatus1 = rxh->RxStatus1; - u16 macstatus2 = rxh->RxStatus2; - char flagstr[64]; - char lenbuf[20]; - static const struct brcmu_bit_desc macstat_flags[] = { - {RXS_FCSERR, "FCSErr"}, - {RXS_RESPFRAMETX, "Reply"}, - {RXS_PBPRES, "PADDING"}, - {RXS_DECATMPT, "DeCr"}, - {RXS_DECERR, "DeCrErr"}, - {RXS_BCNSENT, "Bcn"}, - {0, NULL} - }; - - printk(KERN_DEBUG "Raw RxDesc:\n"); - print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, sizeof(d11rxhdr_t)); - - brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64); - - snprintf(lenbuf, sizeof(lenbuf), "0x%x", len); - - printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len, - (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : ""); - printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n", - phystatus_0, phystatus_1, phystatus_2, phystatus_3); - printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr); - printk(KERN_DEBUG "RXMACaggtype: %x\n", - (macstatus2 & RXS_AGGTYPE_MASK)); - printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime); -} -#endif /* defined(BCMDBG) */ - -static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate) -{ - return wlc_bmac_rate_shm_offset(wlc->hw, rate); -} - -/* Callback for device removed */ - -/* - * Attempts to queue a packet onto a multiple-precedence queue, - * if necessary evicting a lower precedence packet from the queue. - * - * 'prec' is the precedence number that has already been mapped - * from the packet priority. - * - * Returns true if packet consumed (queued), false if not. - */ -bool -wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, int prec) -{ - return wlc_prec_enq_head(wlc, q, pkt, prec, false); -} - -bool -wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, - int prec, bool head) -{ - struct sk_buff *p; - int eprec = -1; /* precedence to evict from */ - - /* Determine precedence from which to evict packet, if any */ - if (pktq_pfull(q, prec)) - eprec = prec; - else if (pktq_full(q)) { - p = brcmu_pktq_peek_tail(q, &eprec); - if (eprec > prec) { - wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d" - "\n", __func__, eprec, prec); - return false; - } - } - - /* Evict if needed */ - if (eprec >= 0) { - bool discard_oldest; - - discard_oldest = AC_BITMAP_TST(wlc->wme_dp, eprec); - - /* Refuse newer packet unless configured to discard oldest */ - if (eprec == prec && !discard_oldest) { - wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d" - "\n", __func__, prec); - return false; - } - - /* Evict packet according to discard policy */ - p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : - brcmu_pktq_pdeq_tail(q, eprec); - brcmu_pkt_buf_free_skb(p); - } - - /* Enqueue */ - if (head) - p = brcmu_pktq_penq_head(q, prec, pkt); - else - p = brcmu_pktq_penq(q, prec, pkt); - - return true; -} - -void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, - uint prec) -{ - struct wlc_info *wlc = (struct wlc_info *) ctx; - struct wlc_txq_info *qi = wlc->pkt_queue; /* Check me */ - struct pktq *q = &qi->q; - int prio; - - prio = sdu->priority; - - if (!wlc_prec_enq(wlc, q, sdu, prec)) { - if (!EDCF_ENAB(wlc->pub) - || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) - wiphy_err(wlc->wiphy, "wl%d: wlc_txq_enq: txq overflow" - "\n", wlc->pub->unit); - - /* - * XXX we might hit this condtion in case - * packet flooding from mac80211 stack - */ - brcmu_pkt_buf_free_skb(sdu); - } - - /* Check if flow control needs to be turned on after enqueuing the packet - * Don't turn on flow control if EDCF is enabled. Driver would make the decision on what - * to drop instead of relying on stack to make the right decision - */ - if (!EDCF_ENAB(wlc->pub) - || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { - if (pktq_len(q) >= wlc->pub->tunables->datahiwat) { - wlc_txflowcontrol(wlc, qi, ON, ALLPRIO); - } - } else if (wlc->pub->_priofc) { - if (pktq_plen(q, wlc_prio2prec_map[prio]) >= - wlc->pub->tunables->datahiwat) { - wlc_txflowcontrol(wlc, qi, ON, prio); - } - } -} - -bool -wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, - struct ieee80211_hw *hw) -{ - u8 prio; - uint fifo; - void *pkt; - struct scb *scb = &global_scb; - struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data); - - /* 802.11 standard requires management traffic to go at highest priority */ - prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority : - MAXPRIO; - fifo = prio2fifo[prio]; - pkt = sdu; - if (unlikely - (wlc_d11hdrs_mac80211(wlc, hw, pkt, scb, 0, 1, fifo, 0, NULL, 0))) - return -EINVAL; - wlc_txq_enq(wlc, scb, pkt, WLC_PRIO_TO_PREC(prio)); - wlc_send_q(wlc); - return 0; -} - -void wlc_send_q(struct wlc_info *wlc) -{ - struct sk_buff *pkt[DOT11_MAXNUMFRAGS]; - int prec; - u16 prec_map; - int err = 0, i, count; - uint fifo; - struct wlc_txq_info *qi = wlc->pkt_queue; - struct pktq *q = &qi->q; - struct ieee80211_tx_info *tx_info; - - if (in_send_q) - return; - else - in_send_q = true; - - prec_map = wlc->tx_prec_map; - - /* Send all the enq'd pkts that we can. - * Dequeue packets with precedence with empty HW fifo only - */ - while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) { - tx_info = IEEE80211_SKB_CB(pkt[0]); - if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - err = wlc_sendampdu(wlc->ampdu, qi, pkt, prec); - } else { - count = 1; - err = wlc_prep_pdu(wlc, pkt[0], &fifo); - if (!err) { - for (i = 0; i < count; i++) { - wlc_txfifo(wlc, fifo, pkt[i], true, 1); - } - } - } - - if (err == -EBUSY) { - brcmu_pktq_penq_head(q, prec, pkt[0]); - /* If send failed due to any other reason than a change in - * HW FIFO condition, quit. Otherwise, read the new prec_map! - */ - if (prec_map == wlc->tx_prec_map) - break; - prec_map = wlc->tx_prec_map; - } - } - - /* Check if flow control needs to be turned off after sending the packet */ - if (!EDCF_ENAB(wlc->pub) - || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { - if (wlc_txflowcontrol_prio_isset(wlc, qi, ALLPRIO) - && (pktq_len(q) < wlc->pub->tunables->datahiwat / 2)) { - wlc_txflowcontrol(wlc, qi, OFF, ALLPRIO); - } - } else if (wlc->pub->_priofc) { - int prio; - for (prio = MAXPRIO; prio >= 0; prio--) { - if (wlc_txflowcontrol_prio_isset(wlc, qi, prio) && - (pktq_plen(q, wlc_prio2prec_map[prio]) < - wlc->pub->tunables->datahiwat / 2)) { - wlc_txflowcontrol(wlc, qi, OFF, prio); - } - } - } - in_send_q = false; -} - -/* - * bcmc_fid_generate: - * Generate frame ID for a BCMC packet. The frag field is not used - * for MC frames so is used as part of the sequence number. - */ -static inline u16 -bcmc_fid_generate(struct wlc_info *wlc, struct wlc_bsscfg *bsscfg, - d11txh_t *txh) -{ - u16 frameid; - - frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK | - TXFID_QUEUE_MASK); - frameid |= - (((wlc-> - mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | - TX_BCMC_FIFO; - - return frameid; -} - -void -wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, bool commit, - s8 txpktpend) -{ - u16 frameid = INVALIDFID; - d11txh_t *txh; - - txh = (d11txh_t *) (p->data); - - /* When a BC/MC frame is being committed to the BCMC fifo via DMA (NOT PIO), update - * ucode or BSS info as appropriate. - */ - if (fifo == TX_BCMC_FIFO) { - frameid = le16_to_cpu(txh->TxFrameID); - - } - - if (WLC_WAR16165(wlc)) - wlc_war16165(wlc, true); - - - /* Bump up pending count for if not using rpc. If rpc is used, this will be handled - * in wlc_bmac_txfifo() - */ - if (commit) { - TXPKTPENDINC(wlc, fifo, txpktpend); - BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n", - txpktpend, TXPKTPENDGET(wlc, fifo)); - } - - /* Commit BCMC sequence number in the SHM frame ID location */ - if (frameid != INVALIDFID) - BCMCFID(wlc, frameid); - - if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) { - wiphy_err(wlc->wiphy, "wlc_txfifo: fatal, toss frames !!!\n"); - } -} - -void -wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rspec, uint length, u8 *plcp) -{ - if (IS_MCS(rspec)) { - wlc_compute_mimo_plcp(rspec, length, plcp); - } else if (IS_OFDM(rspec)) { - wlc_compute_ofdm_plcp(rspec, length, plcp); - } else { - wlc_compute_cck_plcp(wlc, rspec, length, plcp); - } - return; -} - -/* Rate: 802.11 rate code, length: PSDU length in octets */ -static void wlc_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) -{ - u8 mcs = (u8) (rspec & RSPEC_RATE_MASK); - plcp[0] = mcs; - if (RSPEC_IS40MHZ(rspec) || (mcs == 32)) - plcp[0] |= MIMO_PLCP_40MHZ; - WLC_SET_MIMO_PLCP_LEN(plcp, length); - plcp[3] = RSPEC_MIMOPLCP3(rspec); /* rspec already holds this byte */ - plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ - plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ - plcp[5] = 0; -} - -/* Rate: 802.11 rate code, length: PSDU length in octets */ -static void -wlc_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) -{ - u8 rate_signal; - u32 tmp = 0; - int rate = RSPEC2RATE(rspec); - - /* encode rate per 802.11a-1999 sec 17.3.4.1, with lsb transmitted first */ - rate_signal = rate_info[rate] & WLC_RATE_MASK; - memset(plcp, 0, D11_PHY_HDR_LEN); - D11A_PHY_HDR_SRATE((ofdm_phy_hdr_t *) plcp, rate_signal); - - tmp = (length & 0xfff) << 5; - plcp[2] |= (tmp >> 16) & 0xff; - plcp[1] |= (tmp >> 8) & 0xff; - plcp[0] |= tmp & 0xff; - - return; -} - -/* - * Compute PLCP, but only requires actual rate and length of pkt. - * Rate is given in the driver standard multiple of 500 kbps. - * le is set for 11 Mbps rate if necessary. - * Broken out for PRQ. - */ - -static void wlc_cck_plcp_set(struct wlc_info *wlc, int rate_500, uint length, - u8 *plcp) -{ - u16 usec = 0; - u8 le = 0; - - switch (rate_500) { - case WLC_RATE_1M: - usec = length << 3; - break; - case WLC_RATE_2M: - usec = length << 2; - break; - case WLC_RATE_5M5: - usec = (length << 4) / 11; - if ((length << 4) - (usec * 11) > 0) - usec++; - break; - case WLC_RATE_11M: - usec = (length << 3) / 11; - if ((length << 3) - (usec * 11) > 0) { - usec++; - if ((usec * 11) - (length << 3) >= 8) - le = D11B_PLCP_SIGNAL_LE; - } - break; - - default: - wiphy_err(wlc->wiphy, "wlc_cck_plcp_set: unsupported rate %d" - "\n", rate_500); - rate_500 = WLC_RATE_1M; - usec = length << 3; - break; - } - /* PLCP signal byte */ - plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */ - /* PLCP service byte */ - plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED); - /* PLCP length u16, little endian */ - plcp[2] = usec & 0xff; - plcp[3] = (usec >> 8) & 0xff; - /* PLCP CRC16 */ - plcp[4] = 0; - plcp[5] = 0; -} - -/* Rate: 802.11 rate code, length: PSDU length in octets */ -static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rspec, - uint length, u8 *plcp) -{ - int rate = RSPEC2RATE(rspec); - - wlc_cck_plcp_set(wlc, rate, length, plcp); -} - -/* wlc_compute_frame_dur() - * - * Calculate the 802.11 MAC header DUR field for MPDU - * DUR for a single frame = 1 SIFS + 1 ACK - * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time - * - * rate MPDU rate in unit of 500kbps - * next_frag_len next MPDU length in bytes - * preamble_type use short/GF or long/MM PLCP header - */ -static u16 -wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, u8 preamble_type, - uint next_frag_len) -{ - u16 dur, sifs; - - sifs = SIFS(wlc->band); - - dur = sifs; - dur += (u16) wlc_calc_ack_time(wlc, rate, preamble_type); - - if (next_frag_len) { - /* Double the current DUR to get 2 SIFS + 2 ACKs */ - dur *= 2; - /* add another SIFS and the frag time */ - dur += sifs; - dur += - (u16) wlc_calc_frame_time(wlc, rate, preamble_type, - next_frag_len); - } - return dur; -} - -/* wlc_compute_rtscts_dur() - * - * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame - * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK - * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK - * - * cts cts-to-self or rts/cts - * rts_rate rts or cts rate in unit of 500kbps - * rate next MPDU rate in unit of 500kbps - * frame_len next MPDU frame length in bytes - */ -u16 -wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, ratespec_t rts_rate, - ratespec_t frame_rate, u8 rts_preamble_type, - u8 frame_preamble_type, uint frame_len, bool ba) -{ - u16 dur, sifs; - - sifs = SIFS(wlc->band); - - if (!cts_only) { /* RTS/CTS */ - dur = 3 * sifs; - dur += - (u16) wlc_calc_cts_time(wlc, rts_rate, - rts_preamble_type); - } else { /* CTS-TO-SELF */ - dur = 2 * sifs; - } - - dur += - (u16) wlc_calc_frame_time(wlc, frame_rate, frame_preamble_type, - frame_len); - if (ba) - dur += - (u16) wlc_calc_ba_time(wlc, frame_rate, - WLC_SHORT_PREAMBLE); - else - dur += - (u16) wlc_calc_ack_time(wlc, frame_rate, - frame_preamble_type); - return dur; -} - -u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) -{ - u16 phyctl1 = 0; - u16 bw; - - if (WLCISLCNPHY(wlc->band)) { - bw = PHY_TXC1_BW_20MHZ; - } else { - bw = RSPEC_GET_BW(rspec); - /* 10Mhz is not supported yet */ - if (bw < PHY_TXC1_BW_20MHZ) { - wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: bw %d is " - "not supported yet, set to 20L\n", bw); - bw = PHY_TXC1_BW_20MHZ; - } - } - - if (IS_MCS(rspec)) { - uint mcs = rspec & RSPEC_RATE_MASK; - - /* bw, stf, coding-type is part of RSPEC_PHYTXBYTE2 returns */ - phyctl1 = RSPEC_PHYTXBYTE2(rspec); - /* set the upper byte of phyctl1 */ - phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8); - } else if (IS_CCK(rspec) && !WLCISLCNPHY(wlc->band) - && !WLCISSSLPNPHY(wlc->band)) { - /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ - /* Eventually MIMOPHY would also be converted to this format */ - /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ - phyctl1 = (bw | (RSPEC_STF(rspec) << PHY_TXC1_MODE_SHIFT)); - } else { /* legacy OFDM/CCK */ - s16 phycfg; - /* get the phyctl byte from rate phycfg table */ - phycfg = wlc_rate_legacy_phyctl(RSPEC2RATE(rspec)); - if (phycfg == -1) { - wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: wrong " - "legacy OFDM/CCK rate\n"); - phycfg = 0; - } - /* set the upper byte of phyctl1 */ - phyctl1 = - (bw | (phycfg << 8) | - (RSPEC_STF(rspec) << PHY_TXC1_MODE_SHIFT)); - } - return phyctl1; -} - -ratespec_t -wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, - u16 mimo_ctlchbw) -{ - ratespec_t rts_rspec = 0; - - if (use_rspec) { - /* use frame rate as rts rate */ - rts_rspec = rspec; - - } else if (wlc->band->gmode && wlc->protection->_g && !IS_CCK(rspec)) { - /* Use 11Mbps as the g protection RTS target rate and fallback. - * Use the WLC_BASIC_RATE() lookup to find the best basic rate under the - * target in case 11 Mbps is not Basic. - * 6 and 9 Mbps are not usually selected by rate selection, but even - * if the OFDM rate we are protecting is 6 or 9 Mbps, 11 is more robust. - */ - rts_rspec = WLC_BASIC_RATE(wlc, WLC_RATE_11M); - } else { - /* calculate RTS rate and fallback rate based on the frame rate - * RTS must be sent at a basic rate since it is a - * control frame, sec 9.6 of 802.11 spec - */ - rts_rspec = WLC_BASIC_RATE(wlc, rspec); - } - - if (WLC_PHY_11N_CAP(wlc->band)) { - /* set rts txbw to correct side band */ - rts_rspec &= ~RSPEC_BW_MASK; - - /* if rspec/rspec_fallback is 40MHz, then send RTS on both 20MHz channel - * (DUP), otherwise send RTS on control channel - */ - if (RSPEC_IS40MHZ(rspec) && !IS_CCK(rts_rspec)) - rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT); - else - rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT); - - /* pick siso/cdd as default for ofdm */ - if (IS_OFDM(rts_rspec)) { - rts_rspec &= ~RSPEC_STF_MASK; - rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); - } - } - return rts_rspec; -} - -/* - * Add d11txh_t, cck_phy_hdr_t. - * - * 'p' data must start with 802.11 MAC header - * 'p' must allow enough bytes of local headers to be "pushed" onto the packet - * - * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes) - * - */ -static u16 -wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, - struct sk_buff *p, struct scb *scb, uint frag, - uint nfrags, uint queue, uint next_frag_len, - wsec_key_t *key, ratespec_t rspec_override) -{ - struct ieee80211_hdr *h; - d11txh_t *txh; - u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN]; - int len, phylen, rts_phylen; - u16 mch, phyctl, xfts, mainrates; - u16 seq = 0, mcl = 0, status = 0, frameid = 0; - ratespec_t rspec[2] = { WLC_RATE_1M, WLC_RATE_1M }, rts_rspec[2] = { - WLC_RATE_1M, WLC_RATE_1M}; - bool use_rts = false; - bool use_cts = false; - bool use_rifs = false; - bool short_preamble[2] = { false, false }; - u8 preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; - u8 rts_preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; - u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN]; - struct ieee80211_rts *rts = NULL; - bool qos; - uint ac; - u32 rate_val[2]; - bool hwtkmic = false; - u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; -#define ANTCFG_NONE 0xFF - u8 antcfg = ANTCFG_NONE; - u8 fbantcfg = ANTCFG_NONE; - uint phyctl1_stf = 0; - u16 durid = 0; - struct ieee80211_tx_rate *txrate[2]; - int k; - struct ieee80211_tx_info *tx_info; - bool is_mcs[2]; - u16 mimo_txbw; - u8 mimo_preamble_type; - - /* locate 802.11 MAC header */ - h = (struct ieee80211_hdr *)(p->data); - qos = ieee80211_is_data_qos(h->frame_control); - - /* compute length of frame in bytes for use in PLCP computations */ - len = brcmu_pkttotlen(p); - phylen = len + FCS_LEN; - - /* If WEP enabled, add room in phylen for the additional bytes of - * ICV which MAC generates. We do NOT add the additional bytes to - * the packet itself, thus phylen = packet length + ICV_LEN + FCS_LEN - * in this case - */ - if (key) { - phylen += key->icv_len; - } - - /* Get tx_info */ - tx_info = IEEE80211_SKB_CB(p); - - /* add PLCP */ - plcp = skb_push(p, D11_PHY_HDR_LEN); - - /* add Broadcom tx descriptor header */ - txh = (d11txh_t *) skb_push(p, D11_TXH_LEN); - memset(txh, 0, D11_TXH_LEN); - - /* setup frameid */ - if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { - /* non-AP STA should never use BCMC queue */ - if (queue == TX_BCMC_FIFO) { - wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == " - "TX_BCMC!\n", WLCWLUNIT(wlc), __func__); - frameid = bcmc_fid_generate(wlc, NULL, txh); - } else { - /* Increment the counter for first fragment */ - if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) { - SCB_SEQNUM(scb, p->priority)++; - } - - /* extract fragment number from frame first */ - seq = le16_to_cpu(seq) & FRAGNUM_MASK; - seq |= (SCB_SEQNUM(scb, p->priority) << SEQNUM_SHIFT); - h->seq_ctrl = cpu_to_le16(seq); - - frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | - (queue & TXFID_QUEUE_MASK); - } - } - frameid |= queue & TXFID_QUEUE_MASK; - - /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */ - if (SCB_PS(scb) || ieee80211_is_beacon(h->frame_control)) - mcl |= TXC_IGNOREPMQ; - - txrate[0] = tx_info->control.rates; - txrate[1] = txrate[0] + 1; - - /* if rate control algorithm didn't give us a fallback rate, use the primary rate */ - if (txrate[1]->idx < 0) { - txrate[1] = txrate[0]; - } - - for (k = 0; k < hw->max_rates; k++) { - is_mcs[k] = - txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false; - if (!is_mcs[k]) { - if ((txrate[k]->idx >= 0) - && (txrate[k]->idx < - hw->wiphy->bands[tx_info->band]->n_bitrates)) { - rate_val[k] = - hw->wiphy->bands[tx_info->band]-> - bitrates[txrate[k]->idx].hw_value; - short_preamble[k] = - txrate[k]-> - flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ? - true : false; - } else { - rate_val[k] = WLC_RATE_1M; - } - } else { - rate_val[k] = txrate[k]->idx; - } - /* Currently only support same setting for primay and fallback rates. - * Unify flags for each rate into a single value for the frame - */ - use_rts |= - txrate[k]-> - flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false; - use_cts |= - txrate[k]-> - flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false; - - if (is_mcs[k]) - rate_val[k] |= NRATE_MCS_INUSE; - - rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band, rate_val[k]); - - /* (1) RATE: determine and validate primary rate and fallback rates */ - if (!RSPEC_ACTIVE(rspec[k])) { - rspec[k] = WLC_RATE_1M; - } else { - if (!is_multicast_ether_addr(h->addr1)) { - /* set tx antenna config */ - wlc_antsel_antcfg_get(wlc->asi, false, false, 0, - 0, &antcfg, &fbantcfg); - } - } - } - - phyctl1_stf = wlc->stf->ss_opmode; - - if (N_ENAB(wlc->pub)) { - for (k = 0; k < hw->max_rates; k++) { - /* apply siso/cdd to single stream mcs's or ofdm if rspec is auto selected */ - if (((IS_MCS(rspec[k]) && - IS_SINGLE_STREAM(rspec[k] & RSPEC_RATE_MASK)) || - IS_OFDM(rspec[k])) - && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY) - || !(rspec[k] & RSPEC_OVERRIDE))) { - rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK); - - /* For SISO MCS use STBC if possible */ - if (IS_MCS(rspec[k]) - && WLC_STF_SS_STBC_TX(wlc, scb)) { - u8 stc; - - stc = 1; /* Nss for single stream is always 1 */ - rspec[k] |= - (PHY_TXC1_MODE_STBC << - RSPEC_STF_SHIFT) | (stc << - RSPEC_STC_SHIFT); - } else - rspec[k] |= - (phyctl1_stf << RSPEC_STF_SHIFT); - } - - /* Is the phy configured to use 40MHZ frames? If so then pick the desired txbw */ - if (CHSPEC_WLC_BW(wlc->chanspec) == WLC_40_MHZ) { - /* default txbw is 20in40 SB */ - mimo_ctlchbw = mimo_txbw = - CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) - ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; - - if (IS_MCS(rspec[k])) { - /* mcs 32 must be 40b/w DUP */ - if ((rspec[k] & RSPEC_RATE_MASK) == 32) { - mimo_txbw = - PHY_TXC1_BW_40MHZ_DUP; - /* use override */ - } else if (wlc->mimo_40txbw != AUTO) - mimo_txbw = wlc->mimo_40txbw; - /* else check if dst is using 40 Mhz */ - else if (scb->flags & SCB_IS40) - mimo_txbw = PHY_TXC1_BW_40MHZ; - } else if (IS_OFDM(rspec[k])) { - if (wlc->ofdm_40txbw != AUTO) - mimo_txbw = wlc->ofdm_40txbw; - } else { - if (wlc->cck_40txbw != AUTO) - mimo_txbw = wlc->cck_40txbw; - } - } else { - /* mcs32 is 40 b/w only. - * This is possible for probe packets on a STA during SCAN - */ - if ((rspec[k] & RSPEC_RATE_MASK) == 32) { - /* mcs 0 */ - rspec[k] = RSPEC_MIMORATE; - } - mimo_txbw = PHY_TXC1_BW_20MHZ; - } - - /* Set channel width */ - rspec[k] &= ~RSPEC_BW_MASK; - if ((k == 0) || ((k > 0) && IS_MCS(rspec[k]))) - rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT); - else - rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT); - - /* Set Short GI */ -#ifdef NOSGIYET - if (IS_MCS(rspec[k]) - && (txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) - rspec[k] |= RSPEC_SHORT_GI; - else if (!(txrate[k]->flags & IEEE80211_TX_RC_SHORT_GI)) - rspec[k] &= ~RSPEC_SHORT_GI; -#else - rspec[k] &= ~RSPEC_SHORT_GI; -#endif - - mimo_preamble_type = WLC_MM_PREAMBLE; - if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD) - mimo_preamble_type = WLC_GF_PREAMBLE; - - if ((txrate[k]->flags & IEEE80211_TX_RC_MCS) - && (!IS_MCS(rspec[k]))) { - wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_" - "RC_MCS != IS_MCS(rspec)\n", - WLCWLUNIT(wlc), __func__); - } - - if (IS_MCS(rspec[k])) { - preamble_type[k] = mimo_preamble_type; - - /* if SGI is selected, then forced mm for single stream */ - if ((rspec[k] & RSPEC_SHORT_GI) - && IS_SINGLE_STREAM(rspec[k] & - RSPEC_RATE_MASK)) { - preamble_type[k] = WLC_MM_PREAMBLE; - } - } - - /* should be better conditionalized */ - if (!IS_MCS(rspec[0]) - && (tx_info->control.rates[0]. - flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)) - preamble_type[k] = WLC_SHORT_PREAMBLE; - } - } else { - for (k = 0; k < hw->max_rates; k++) { - /* Set ctrlchbw as 20Mhz */ - rspec[k] &= ~RSPEC_BW_MASK; - rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT); - - /* for nphy, stf of ofdm frames must follow policies */ - if (WLCISNPHY(wlc->band) && IS_OFDM(rspec[k])) { - rspec[k] &= ~RSPEC_STF_MASK; - rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT; - } - } - } - - /* Reset these for use with AMPDU's */ - txrate[0]->count = 0; - txrate[1]->count = 0; - - /* (2) PROTECTION, may change rspec */ - if ((ieee80211_is_data(h->frame_control) || - ieee80211_is_mgmt(h->frame_control)) && - (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1)) - use_rts = true; - - /* (3) PLCP: determine PLCP header and MAC duration, fill d11txh_t */ - wlc_compute_plcp(wlc, rspec[0], phylen, plcp); - wlc_compute_plcp(wlc, rspec[1], phylen, plcp_fallback); - memcpy(&txh->FragPLCPFallback, - plcp_fallback, sizeof(txh->FragPLCPFallback)); - - /* Length field now put in CCK FBR CRC field */ - if (IS_CCK(rspec[1])) { - txh->FragPLCPFallback[4] = phylen & 0xff; - txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8; - } - - /* MIMO-RATE: need validation ?? */ - mainrates = - IS_OFDM(rspec[0]) ? D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) plcp) : - plcp[0]; - - /* DUR field for main rate */ - if (!ieee80211_is_pspoll(h->frame_control) && - !is_multicast_ether_addr(h->addr1) && !use_rifs) { - durid = - wlc_compute_frame_dur(wlc, rspec[0], preamble_type[0], - next_frag_len); - h->duration_id = cpu_to_le16(durid); - } else if (use_rifs) { - /* NAV protect to end of next max packet size */ - durid = - (u16) wlc_calc_frame_time(wlc, rspec[0], - preamble_type[0], - DOT11_MAX_FRAG_LEN); - durid += RIFS_11N_TIME; - h->duration_id = cpu_to_le16(durid); - } - - /* DUR field for fallback rate */ - if (ieee80211_is_pspoll(h->frame_control)) - txh->FragDurFallback = h->duration_id; - else if (is_multicast_ether_addr(h->addr1) || use_rifs) - txh->FragDurFallback = 0; - else { - durid = wlc_compute_frame_dur(wlc, rspec[1], - preamble_type[1], next_frag_len); - txh->FragDurFallback = cpu_to_le16(durid); - } - - /* (4) MAC-HDR: MacTxControlLow */ - if (frag == 0) - mcl |= TXC_STARTMSDU; - - if (!is_multicast_ether_addr(h->addr1)) - mcl |= TXC_IMMEDACK; - - if (BAND_5G(wlc->band->bandtype)) - mcl |= TXC_FREQBAND_5G; - - if (CHSPEC_IS40(WLC_BAND_PI_RADIO_CHANSPEC)) - mcl |= TXC_BW_40; - - /* set AMIC bit if using hardware TKIP MIC */ - if (hwtkmic) - mcl |= TXC_AMIC; - - txh->MacTxControlLow = cpu_to_le16(mcl); - - /* MacTxControlHigh */ - mch = 0; - - /* Set fallback rate preamble type */ - if ((preamble_type[1] == WLC_SHORT_PREAMBLE) || - (preamble_type[1] == WLC_GF_PREAMBLE)) { - if (RSPEC2RATE(rspec[1]) != WLC_RATE_1M) - mch |= TXC_PREAMBLE_DATA_FB_SHORT; - } - - /* MacFrameControl */ - memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16)); - txh->TxFesTimeNormal = cpu_to_le16(0); - - txh->TxFesTimeFallback = cpu_to_le16(0); - - /* TxFrameRA */ - memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN); - - /* TxFrameID */ - txh->TxFrameID = cpu_to_le16(frameid); - - /* TxStatus, Note the case of recreating the first frag of a suppressed frame - * then we may need to reset the retry cnt's via the status reg - */ - txh->TxStatus = cpu_to_le16(status); - - /* extra fields for ucode AMPDU aggregation, the new fields are added to - * the END of previous structure so that it's compatible in driver. - */ - txh->MaxNMpdus = cpu_to_le16(0); - txh->MaxABytes_MRT = cpu_to_le16(0); - txh->MaxABytes_FBR = cpu_to_le16(0); - txh->MinMBytes = cpu_to_le16(0); - - /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration, furnish d11txh_t */ - /* RTS PLCP header and RTS frame */ - if (use_rts || use_cts) { - if (use_rts && use_cts) - use_cts = false; - - for (k = 0; k < 2; k++) { - rts_rspec[k] = wlc_rspec_to_rts_rspec(wlc, rspec[k], - false, - mimo_ctlchbw); - } - - if (!IS_OFDM(rts_rspec[0]) && - !((RSPEC2RATE(rts_rspec[0]) == WLC_RATE_1M) || - (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { - rts_preamble_type[0] = WLC_SHORT_PREAMBLE; - mch |= TXC_PREAMBLE_RTS_MAIN_SHORT; - } - - if (!IS_OFDM(rts_rspec[1]) && - !((RSPEC2RATE(rts_rspec[1]) == WLC_RATE_1M) || - (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { - rts_preamble_type[1] = WLC_SHORT_PREAMBLE; - mch |= TXC_PREAMBLE_RTS_FB_SHORT; - } - - /* RTS/CTS additions to MacTxControlLow */ - if (use_cts) { - txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS); - } else { - txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS); - txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME); - } - - /* RTS PLCP header */ - rts_plcp = txh->RTSPhyHeader; - if (use_cts) - rts_phylen = DOT11_CTS_LEN + FCS_LEN; - else - rts_phylen = DOT11_RTS_LEN + FCS_LEN; - - wlc_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp); - - /* fallback rate version of RTS PLCP header */ - wlc_compute_plcp(wlc, rts_rspec[1], rts_phylen, - rts_plcp_fallback); - memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback, - sizeof(txh->RTSPLCPFallback)); - - /* RTS frame fields... */ - rts = (struct ieee80211_rts *)&txh->rts_frame; - - durid = wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec[0], - rspec[0], rts_preamble_type[0], - preamble_type[0], phylen, false); - rts->duration = cpu_to_le16(durid); - /* fallback rate version of RTS DUR field */ - durid = wlc_compute_rtscts_dur(wlc, use_cts, - rts_rspec[1], rspec[1], - rts_preamble_type[1], - preamble_type[1], phylen, false); - txh->RTSDurFallback = cpu_to_le16(durid); - - if (use_cts) { - rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | - IEEE80211_STYPE_CTS); - - memcpy(&rts->ra, &h->addr2, ETH_ALEN); - } else { - rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | - IEEE80211_STYPE_RTS); - - memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN); - } - - /* mainrate - * low 8 bits: main frag rate/mcs, - * high 8 bits: rts/cts rate/mcs - */ - mainrates |= (IS_OFDM(rts_rspec[0]) ? - D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) rts_plcp) : - rts_plcp[0]) << 8; - } else { - memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN); - memset((char *)&txh->rts_frame, 0, - sizeof(struct ieee80211_rts)); - memset((char *)txh->RTSPLCPFallback, 0, - sizeof(txh->RTSPLCPFallback)); - txh->RTSDurFallback = 0; - } - -#ifdef SUPPORT_40MHZ - /* add null delimiter count */ - if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && IS_MCS(rspec)) { - txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = - wlc_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); - } -#endif - - /* Now that RTS/RTS FB preamble types are updated, write the final value */ - txh->MacTxControlHigh = cpu_to_le16(mch); - - /* MainRates (both the rts and frag plcp rates have been calculated now) */ - txh->MainRates = cpu_to_le16(mainrates); - - /* XtraFrameTypes */ - xfts = FRAMETYPE(rspec[1], wlc->mimoft); - xfts |= (FRAMETYPE(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT); - xfts |= (FRAMETYPE(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT); - xfts |= - CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC) << XFTS_CHANNEL_SHIFT; - txh->XtraFrameTypes = cpu_to_le16(xfts); - - /* PhyTxControlWord */ - phyctl = FRAMETYPE(rspec[0], wlc->mimoft); - if ((preamble_type[0] == WLC_SHORT_PREAMBLE) || - (preamble_type[0] == WLC_GF_PREAMBLE)) { - if (RSPEC2RATE(rspec[0]) != WLC_RATE_1M) - phyctl |= PHY_TXC_SHORT_HDR; - } - - /* phytxant is properly bit shifted */ - phyctl |= wlc_stf_d11hdrs_phyctl_txant(wlc, rspec[0]); - txh->PhyTxControlWord = cpu_to_le16(phyctl); - - /* PhyTxControlWord_1 */ - if (WLC_PHY_11N_CAP(wlc->band)) { - u16 phyctl1 = 0; - - phyctl1 = wlc_phytxctl1_calc(wlc, rspec[0]); - txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1); - phyctl1 = wlc_phytxctl1_calc(wlc, rspec[1]); - txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1); - - if (use_rts || use_cts) { - phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[0]); - txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1); - phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[1]); - txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1); - } - - /* - * For mcs frames, if mixedmode(overloaded with long preamble) is going to be set, - * fill in non-zero MModeLen and/or MModeFbrLen - * it will be unnecessary if they are separated - */ - if (IS_MCS(rspec[0]) && (preamble_type[0] == WLC_MM_PREAMBLE)) { - u16 mmodelen = - wlc_calc_lsig_len(wlc, rspec[0], phylen); - txh->MModeLen = cpu_to_le16(mmodelen); - } - - if (IS_MCS(rspec[1]) && (preamble_type[1] == WLC_MM_PREAMBLE)) { - u16 mmodefbrlen = - wlc_calc_lsig_len(wlc, rspec[1], phylen); - txh->MModeFbrLen = cpu_to_le16(mmodefbrlen); - } - } - - ac = skb_get_queue_mapping(p); - if (SCB_WME(scb) && qos && wlc->edcf_txop[ac]) { - uint frag_dur, dur, dur_fallback; - - /* WME: Update TXOP threshold */ - if ((!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) && (frag == 0)) { - frag_dur = - wlc_calc_frame_time(wlc, rspec[0], preamble_type[0], - phylen); - - if (rts) { - /* 1 RTS or CTS-to-self frame */ - dur = - wlc_calc_cts_time(wlc, rts_rspec[0], - rts_preamble_type[0]); - dur_fallback = - wlc_calc_cts_time(wlc, rts_rspec[1], - rts_preamble_type[1]); - /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */ - dur += le16_to_cpu(rts->duration); - dur_fallback += - le16_to_cpu(txh->RTSDurFallback); - } else if (use_rifs) { - dur = frag_dur; - dur_fallback = 0; - } else { - /* frame + SIFS + ACK */ - dur = frag_dur; - dur += - wlc_compute_frame_dur(wlc, rspec[0], - preamble_type[0], 0); - - dur_fallback = - wlc_calc_frame_time(wlc, rspec[1], - preamble_type[1], - phylen); - dur_fallback += - wlc_compute_frame_dur(wlc, rspec[1], - preamble_type[1], 0); - } - /* NEED to set TxFesTimeNormal (hard) */ - txh->TxFesTimeNormal = cpu_to_le16((u16) dur); - /* NEED to set fallback rate version of TxFesTimeNormal (hard) */ - txh->TxFesTimeFallback = - cpu_to_le16((u16) dur_fallback); - - /* update txop byte threshold (txop minus intraframe overhead) */ - if (wlc->edcf_txop[ac] >= (dur - frag_dur)) { - { - uint newfragthresh; - - newfragthresh = - wlc_calc_frame_len(wlc, rspec[0], - preamble_type[0], - (wlc-> - edcf_txop[ac] - - (dur - - frag_dur))); - /* range bound the fragthreshold */ - if (newfragthresh < DOT11_MIN_FRAG_LEN) - newfragthresh = - DOT11_MIN_FRAG_LEN; - else if (newfragthresh > - wlc->usr_fragthresh) - newfragthresh = - wlc->usr_fragthresh; - /* update the fragthresh and do txc update */ - if (wlc->fragthresh[queue] != - (u16) newfragthresh) { - wlc->fragthresh[queue] = - (u16) newfragthresh; - } - } - } else - wiphy_err(wlc->wiphy, "wl%d: %s txop invalid " - "for rate %d\n", - wlc->pub->unit, fifo_names[queue], - RSPEC2RATE(rspec[0])); - - if (dur > wlc->edcf_txop[ac]) - wiphy_err(wlc->wiphy, "wl%d: %s: %s txop " - "exceeded phylen %d/%d dur %d/%d\n", - wlc->pub->unit, __func__, - fifo_names[queue], - phylen, wlc->fragthresh[queue], - dur, wlc->edcf_txop[ac]); - } - } - - return 0; -} - -void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) -{ - struct wlc_bsscfg *cfg = wlc->cfg; - - if (!cfg->BSS) { - /* DirFrmQ is now valid...defer setting until end of ATIM window */ - wlc->qvalid |= MCMD_DIRFRMQVAL; - } -} - -static void wlc_war16165(struct wlc_info *wlc, bool tx) -{ - if (tx) { - /* the post-increment is used in STAY_AWAKE macro */ - if (wlc->txpend16165war++ == 0) - wlc_set_ps_ctrl(wlc); - } else { - wlc->txpend16165war--; - if (wlc->txpend16165war == 0) - wlc_set_ps_ctrl(wlc); - } -} - -/* process an individual tx_status_t */ -/* WLC_HIGH_API */ -bool -wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) -{ - struct sk_buff *p; - uint queue; - d11txh_t *txh; - struct scb *scb = NULL; - bool free_pdu; - int tx_rts, tx_frame_count, tx_rts_count; - uint totlen, supr_status; - bool lastframe; - struct ieee80211_hdr *h; - u16 mcl; - struct ieee80211_tx_info *tx_info; - struct ieee80211_tx_rate *txrate; - int i; - - (void)(frm_tx2); /* Compiler reference to avoid unused variable warning */ - - /* discard intermediate indications for ucode with one legitimate case: - * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent - * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts - * transmission count) - */ - if (!(txs->status & TX_STATUS_AMPDU) - && (txs->status & TX_STATUS_INTERMEDIATE)) { - wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n", - __func__); - return false; - } - - queue = txs->frameid & TXFID_QUEUE_MASK; - if (queue >= NFIFO) { - p = NULL; - goto fatal; - } - - p = GETNEXTTXP(wlc, queue); - if (WLC_WAR16165(wlc)) - wlc_war16165(wlc, false); - if (p == NULL) - goto fatal; - - txh = (d11txh_t *) (p->data); - mcl = le16_to_cpu(txh->MacTxControlLow); - - if (txs->phyerr) { - if (WL_ERROR_ON()) { - wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n", - txs->phyerr, txh->MainRates); - wlc_print_txdesc(txh); - } - wlc_print_txstatus(txs); - } - - if (txs->frameid != cpu_to_le16(txh->TxFrameID)) - goto fatal; - tx_info = IEEE80211_SKB_CB(p); - h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); - - if (tx_info->control.sta) - scb = (struct scb *)tx_info->control.sta->drv_priv; - - if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - wlc_ampdu_dotxstatus(wlc->ampdu, scb, p, txs); - return false; - } - - supr_status = txs->status & TX_STATUS_SUPR_MASK; - if (supr_status == TX_STATUS_SUPR_BADCH) - BCMMSG(wlc->wiphy, - "%s: Pkt tx suppressed, possibly channel %d\n", - __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec)); - - tx_rts = cpu_to_le16(txh->MacTxControlLow) & TXC_SENDRTS; - tx_frame_count = - (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT; - tx_rts_count = - (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT; - - lastframe = !ieee80211_has_morefrags(h->frame_control); - - if (!lastframe) { - wiphy_err(wlc->wiphy, "Not last frame!\n"); - } else { - u16 sfbl, lfbl; - ieee80211_tx_info_clear_status(tx_info); - if (queue < AC_COUNT) { - sfbl = WLC_WME_RETRY_SFB_GET(wlc, wme_fifo2ac[queue]); - lfbl = WLC_WME_RETRY_LFB_GET(wlc, wme_fifo2ac[queue]); - } else { - sfbl = wlc->SFBL; - lfbl = wlc->LFBL; - } - - txrate = tx_info->status.rates; - /* FIXME: this should use a combination of sfbl, lfbl depending on frame length and RTS setting */ - if ((tx_frame_count > sfbl) && (txrate[1].idx >= 0)) { - /* rate selection requested a fallback rate and we used it */ - txrate->count = lfbl; - txrate[1].count = tx_frame_count - lfbl; - } else { - /* rate selection did not request fallback rate, or we didn't need it */ - txrate->count = tx_frame_count; - /* rc80211_minstrel.c:minstrel_tx_status() expects unused rates to be marked with idx = -1 */ - txrate[1].idx = -1; - txrate[1].count = 0; - } - - /* clear the rest of the rates */ - for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) { - txrate[i].idx = -1; - txrate[i].count = 0; - } - - if (txs->status & TX_STATUS_ACK_RCV) - tx_info->flags |= IEEE80211_TX_STAT_ACK; - } - - totlen = brcmu_pkttotlen(p); - free_pdu = true; - - wlc_txfifo_complete(wlc, queue, 1); - - if (lastframe) { - p->next = NULL; - p->prev = NULL; - /* remove PLCP & Broadcom tx descriptor header */ - skb_pull(p, D11_PHY_HDR_LEN); - skb_pull(p, D11_TXH_LEN); - ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p); - } else { - wiphy_err(wlc->wiphy, "%s: Not last frame => not calling " - "tx_status\n", __func__); - } - - return false; - - fatal: - if (p) - brcmu_pkt_buf_free_skb(p); - - return true; - -} - -void -wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend) -{ - TXPKTPENDDEC(wlc, fifo, txpktpend); - BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend, - TXPKTPENDGET(wlc, fifo)); - - /* There is more room; mark precedences related to this FIFO sendable */ - WLC_TX_FIFO_ENAB(wlc, fifo); - - /* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */ - if (AP_ENAB(wlc->pub) && - !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { - wlc_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, WLC_BAND_AUTO); - } - - /* figure out which bsscfg is being worked on... */ -} - -/* Update beacon listen interval in shared memory */ -void wlc_bcn_li_upd(struct wlc_info *wlc) -{ - if (AP_ENAB(wlc->pub)) - return; - - /* wake up every DTIM is the default */ - if (wlc->bcn_li_dtim == 1) - wlc_write_shm(wlc, M_BCN_LI, 0); - else - wlc_write_shm(wlc, M_BCN_LI, - (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn); -} - -/* - * recover 64bit TSF value from the 16bit TSF value in the rx header - * given the assumption that the TSF passed in header is within 65ms - * of the current tsf. - * - * 6 5 4 4 3 2 1 - * 3.......6.......8.......0.......2.......4.......6.......8......0 - * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->| - * - * The RxTSFTime are the lowest 16 bits and provided by the ucode. The - * tsf_l is filled in by wlc_bmac_recv, which is done earlier in the - * receive call sequence after rx interrupt. Only the higher 16 bits - * are used. Finally, the tsf_h is read from the tsf register. - */ -static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh) -{ - u32 tsf_h, tsf_l; - u16 rx_tsf_0_15, rx_tsf_16_31; - - wlc_bmac_read_tsf(wlc->hw, &tsf_l, &tsf_h); - - rx_tsf_16_31 = (u16)(tsf_l >> 16); - rx_tsf_0_15 = rxh->rxhdr.RxTSFTime; - - /* - * a greater tsf time indicates the low 16 bits of - * tsf_l wrapped, so decrement the high 16 bits. - */ - if ((u16)tsf_l < rx_tsf_0_15) { - rx_tsf_16_31 -= 1; - if (rx_tsf_16_31 == 0xffff) - tsf_h -= 1; - } - - return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15); -} - -static void -prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, - struct ieee80211_rx_status *rx_status) -{ - wlc_d11rxhdr_t *wlc_rxh = (wlc_d11rxhdr_t *) rxh; - int preamble; - int channel; - ratespec_t rspec; - unsigned char *plcp; - - /* fill in TSF and flag its presence */ - rx_status->mactime = wlc_recover_tsf64(wlc, wlc_rxh); - rx_status->flag |= RX_FLAG_MACTIME_MPDU; - - channel = WLC_CHAN_CHANNEL(rxh->RxChan); - - if (channel > 14) { - rx_status->band = IEEE80211_BAND_5GHZ; - rx_status->freq = ieee80211_ofdm_chan_to_freq( - WF_CHAN_FACTOR_5_G/2, channel); - - } else { - rx_status->band = IEEE80211_BAND_2GHZ; - rx_status->freq = ieee80211_dsss_chan_to_freq(channel); - } - - rx_status->signal = wlc_rxh->rssi; /* signal */ - - /* noise */ - /* qual */ - rx_status->antenna = (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; /* ant */ - - plcp = p->data; - - rspec = wlc_compute_rspec(rxh, plcp); - if (IS_MCS(rspec)) { - rx_status->rate_idx = rspec & RSPEC_RATE_MASK; - rx_status->flag |= RX_FLAG_HT; - if (RSPEC_IS40MHZ(rspec)) - rx_status->flag |= RX_FLAG_40MHZ; - } else { - switch (RSPEC2RATE(rspec)) { - case WLC_RATE_1M: - rx_status->rate_idx = 0; - break; - case WLC_RATE_2M: - rx_status->rate_idx = 1; - break; - case WLC_RATE_5M5: - rx_status->rate_idx = 2; - break; - case WLC_RATE_11M: - rx_status->rate_idx = 3; - break; - case WLC_RATE_6M: - rx_status->rate_idx = 4; - break; - case WLC_RATE_9M: - rx_status->rate_idx = 5; - break; - case WLC_RATE_12M: - rx_status->rate_idx = 6; - break; - case WLC_RATE_18M: - rx_status->rate_idx = 7; - break; - case WLC_RATE_24M: - rx_status->rate_idx = 8; - break; - case WLC_RATE_36M: - rx_status->rate_idx = 9; - break; - case WLC_RATE_48M: - rx_status->rate_idx = 10; - break; - case WLC_RATE_54M: - rx_status->rate_idx = 11; - break; - default: - wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__); - } - - /* Determine short preamble and rate_idx */ - preamble = 0; - if (IS_CCK(rspec)) { - if (rxh->PhyRxStatus_0 & PRXS0_SHORTH) - rx_status->flag |= RX_FLAG_SHORTPRE; - } else if (IS_OFDM(rspec)) { - rx_status->flag |= RX_FLAG_SHORTPRE; - } else { - wiphy_err(wlc->wiphy, "%s: Unknown modulation\n", - __func__); - } - } - - if (PLCP3_ISSGI(plcp[3])) - rx_status->flag |= RX_FLAG_SHORT_GI; - - if (rxh->RxStatus1 & RXS_DECERR) { - rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC; - wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n", - __func__); - } - if (rxh->RxStatus1 & RXS_FCSERR) { - rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; - wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n", - __func__); - } -} - -static void -wlc_recvctl(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p) -{ - int len_mpdu; - struct ieee80211_rx_status rx_status; - - memset(&rx_status, 0, sizeof(rx_status)); - prep_mac80211_status(wlc, rxh, p, &rx_status); - - /* mac header+body length, exclude CRC and plcp header */ - len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN; - skb_pull(p, D11_PHY_HDR_LEN); - __skb_trim(p, len_mpdu); - - memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status)); - ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p); - return; -} - -/* Process received frames */ -/* - * Return true if more frames need to be processed. false otherwise. - * Param 'bound' indicates max. # frames to process before break out. - */ -/* WLC_HIGH_API */ -void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) -{ - d11rxhdr_t *rxh; - struct ieee80211_hdr *h; - uint len; - bool is_amsdu; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - /* frame starts with rxhdr */ - rxh = (d11rxhdr_t *) (p->data); - - /* strip off rxhdr */ - skb_pull(p, WL_HWRXOFF); - - /* fixup rx header endianness */ - rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize); - rxh->PhyRxStatus_0 = le16_to_cpu(rxh->PhyRxStatus_0); - rxh->PhyRxStatus_1 = le16_to_cpu(rxh->PhyRxStatus_1); - rxh->PhyRxStatus_2 = le16_to_cpu(rxh->PhyRxStatus_2); - rxh->PhyRxStatus_3 = le16_to_cpu(rxh->PhyRxStatus_3); - rxh->PhyRxStatus_4 = le16_to_cpu(rxh->PhyRxStatus_4); - rxh->PhyRxStatus_5 = le16_to_cpu(rxh->PhyRxStatus_5); - rxh->RxStatus1 = le16_to_cpu(rxh->RxStatus1); - rxh->RxStatus2 = le16_to_cpu(rxh->RxStatus2); - rxh->RxTSFTime = le16_to_cpu(rxh->RxTSFTime); - rxh->RxChan = le16_to_cpu(rxh->RxChan); - - /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */ - if (rxh->RxStatus1 & RXS_PBPRES) { - if (p->len < 2) { - wiphy_err(wlc->wiphy, "wl%d: wlc_recv: rcvd runt of " - "len %d\n", wlc->pub->unit, p->len); - goto toss; - } - skb_pull(p, 2); - } - - h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN); - len = p->len; - - if (rxh->RxStatus1 & RXS_FCSERR) { - if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) { - wiphy_err(wlc->wiphy, "FCSERR while scanning******* -" - " tossing\n"); - goto toss; - } else { - wiphy_err(wlc->wiphy, "RCSERR!!!\n"); - goto toss; - } - } - - /* check received pkt has at least frame control field */ - if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control)) { - goto toss; - } - - is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK; - - /* explicitly test bad src address to avoid sending bad deauth */ - if (!is_amsdu) { - /* CTS and ACK CTL frames are w/o a2 */ - - if (ieee80211_is_data(h->frame_control) || - ieee80211_is_mgmt(h->frame_control)) { - if ((is_zero_ether_addr(h->addr2) || - is_multicast_ether_addr(h->addr2))) { - wiphy_err(wlc->wiphy, "wl%d: %s: dropping a " - "frame with invalid src mac address," - " a2: %pM\n", - wlc->pub->unit, __func__, h->addr2); - goto toss; - } - } - } - - /* due to sheer numbers, toss out probe reqs for now */ - if (ieee80211_is_probe_req(h->frame_control)) - goto toss; - - if (is_amsdu) - goto toss; - - wlc_recvctl(wlc, rxh, p); - return; - - toss: - brcmu_pkt_buf_free_skb(p); -} - -/* calculate frame duration for Mixed-mode L-SIG spoofing, return - * number of bytes goes in the length field - * - * Formula given by HT PHY Spec v 1.13 - * len = 3(nsyms + nstream + 3) - 3 - */ -u16 -wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, uint mac_len) -{ - uint nsyms, len = 0, kNdps; - - BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n", - wlc->pub->unit, RSPEC2RATE(ratespec), mac_len); - - if (IS_MCS(ratespec)) { - uint mcs = ratespec & RSPEC_RATE_MASK; - /* MCS_TXS(mcs) returns num tx streams - 1 */ - int tot_streams = (MCS_TXS(mcs) + 1) + RSPEC_STC(ratespec); - - /* the payload duration calculation matches that of regular ofdm */ - /* 1000Ndbps = kbps * 4 */ - kNdps = - MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), - RSPEC_ISSGI(ratespec)) * 4; - - if (RSPEC_STC(ratespec) == 0) - /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ - nsyms = - CEIL((APHY_SERVICE_NBITS + 8 * mac_len + - APHY_TAIL_NBITS) * 1000, kNdps); - else - /* STBC needs to have even number of symbols */ - nsyms = - 2 * - CEIL((APHY_SERVICE_NBITS + 8 * mac_len + - APHY_TAIL_NBITS) * 1000, 2 * kNdps); - - nsyms += (tot_streams + 3); /* (+3) account for HT-SIG(2) and HT-STF(1) */ - /* 3 bytes/symbol @ legacy 6Mbps rate */ - len = (3 * nsyms) - 3; /* (-3) excluding service bits and tail bits */ - } - - return (u16) len; -} - -/* calculate frame duration of a given rate and length, return time in usec unit */ -uint -wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, - uint mac_len) -{ - uint nsyms, dur = 0, Ndps, kNdps; - uint rate = RSPEC2RATE(ratespec); - - if (rate == 0) { - wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n", - wlc->pub->unit); - rate = WLC_RATE_1M; - } - - BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n", - wlc->pub->unit, ratespec, preamble_type, mac_len); - - if (IS_MCS(ratespec)) { - uint mcs = ratespec & RSPEC_RATE_MASK; - int tot_streams = MCS_TXS(mcs) + RSPEC_STC(ratespec); - - dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); - if (preamble_type == WLC_MM_PREAMBLE) - dur += PREN_MM_EXT; - /* 1000Ndbps = kbps * 4 */ - kNdps = - MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), - RSPEC_ISSGI(ratespec)) * 4; - - if (RSPEC_STC(ratespec) == 0) - /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ - nsyms = - CEIL((APHY_SERVICE_NBITS + 8 * mac_len + - APHY_TAIL_NBITS) * 1000, kNdps); - else - /* STBC needs to have even number of symbols */ - nsyms = - 2 * - CEIL((APHY_SERVICE_NBITS + 8 * mac_len + - APHY_TAIL_NBITS) * 1000, 2 * kNdps); - - dur += APHY_SYMBOL_TIME * nsyms; - if (BAND_2G(wlc->band->bandtype)) - dur += DOT11_OFDM_SIGNAL_EXTENSION; - } else if (IS_OFDM(rate)) { - dur = APHY_PREAMBLE_TIME; - dur += APHY_SIGNAL_TIME; - /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ - Ndps = rate * 2; - /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ - nsyms = - CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS), - Ndps); - dur += APHY_SYMBOL_TIME * nsyms; - if (BAND_2G(wlc->band->bandtype)) - dur += DOT11_OFDM_SIGNAL_EXTENSION; - } else { - /* calc # bits * 2 so factor of 2 in rate (1/2 mbps) will divide out */ - mac_len = mac_len * 8 * 2; - /* calc ceiling of bits/rate = microseconds of air time */ - dur = (mac_len + rate - 1) / rate; - if (preamble_type & WLC_SHORT_PREAMBLE) - dur += BPHY_PLCP_SHORT_TIME; - else - dur += BPHY_PLCP_TIME; - } - return dur; -} - -/* The opposite of wlc_calc_frame_time */ -static uint -wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, - uint dur) -{ - uint nsyms, mac_len, Ndps, kNdps; - uint rate = RSPEC2RATE(ratespec); - - BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n", - wlc->pub->unit, ratespec, preamble_type, dur); - - if (IS_MCS(ratespec)) { - uint mcs = ratespec & RSPEC_RATE_MASK; - int tot_streams = MCS_TXS(mcs) + RSPEC_STC(ratespec); - dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); - /* payload calculation matches that of regular ofdm */ - if (BAND_2G(wlc->band->bandtype)) - dur -= DOT11_OFDM_SIGNAL_EXTENSION; - /* kNdbps = kbps * 4 */ - kNdps = - MCS_RATE(mcs, RSPEC_IS40MHZ(ratespec), - RSPEC_ISSGI(ratespec)) * 4; - nsyms = dur / APHY_SYMBOL_TIME; - mac_len = - ((nsyms * kNdps) - - ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000; - } else if (IS_OFDM(ratespec)) { - dur -= APHY_PREAMBLE_TIME; - dur -= APHY_SIGNAL_TIME; - /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ - Ndps = rate * 2; - nsyms = dur / APHY_SYMBOL_TIME; - mac_len = - ((nsyms * Ndps) - - (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8; - } else { - if (preamble_type & WLC_SHORT_PREAMBLE) - dur -= BPHY_PLCP_SHORT_TIME; - else - dur -= BPHY_PLCP_TIME; - mac_len = dur * rate; - /* divide out factor of 2 in rate (1/2 mbps) */ - mac_len = mac_len / 8 / 2; - } - return mac_len; -} - -static uint -wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) -{ - BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, " - "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); - /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than - * or equal to the rate of the immediately previous frame in the FES - */ - rspec = WLC_BASIC_RATE(wlc, rspec); - /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */ - return wlc_calc_frame_time(wlc, rspec, preamble_type, - (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN + - FCS_LEN)); -} - -static uint -wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) -{ - uint dur = 0; - - BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n", - wlc->pub->unit, rspec, preamble_type); - /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than - * or equal to the rate of the immediately previous frame in the FES - */ - rspec = WLC_BASIC_RATE(wlc, rspec); - /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */ - dur = - wlc_calc_frame_time(wlc, rspec, preamble_type, - (DOT11_ACK_LEN + FCS_LEN)); - return dur; -} - -static uint -wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) -{ - BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n", - wlc->pub->unit, rspec, preamble_type); - return wlc_calc_ack_time(wlc, rspec, preamble_type); -} - -/* derive wlc->band->basic_rate[] table from 'rateset' */ -void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) -{ - u8 rate; - u8 mandatory; - u8 cck_basic = 0; - u8 ofdm_basic = 0; - u8 *br = wlc->band->basic_rate; - uint i; - - /* incoming rates are in 500kbps units as in 802.11 Supported Rates */ - memset(br, 0, WLC_MAXRATE + 1); - - /* For each basic rate in the rates list, make an entry in the - * best basic lookup. - */ - for (i = 0; i < rateset->count; i++) { - /* only make an entry for a basic rate */ - if (!(rateset->rates[i] & WLC_RATE_FLAG)) - continue; - - /* mask off basic bit */ - rate = (rateset->rates[i] & WLC_RATE_MASK); - - if (rate > WLC_MAXRATE) { - wiphy_err(wlc->wiphy, "wlc_rate_lookup_init: invalid " - "rate 0x%X in rate set\n", - rateset->rates[i]); - continue; - } - - br[rate] = rate; - } - - /* The rate lookup table now has non-zero entries for each - * basic rate, equal to the basic rate: br[basicN] = basicN - * - * To look up the best basic rate corresponding to any - * particular rate, code can use the basic_rate table - * like this - * - * basic_rate = wlc->band->basic_rate[tx_rate] - * - * Make sure there is a best basic rate entry for - * every rate by walking up the table from low rates - * to high, filling in holes in the lookup table - */ - - for (i = 0; i < wlc->band->hw_rateset.count; i++) { - rate = wlc->band->hw_rateset.rates[i]; - - if (br[rate] != 0) { - /* This rate is a basic rate. - * Keep track of the best basic rate so far by - * modulation type. - */ - if (IS_OFDM(rate)) - ofdm_basic = rate; - else - cck_basic = rate; - - continue; - } - - /* This rate is not a basic rate so figure out the - * best basic rate less than this rate and fill in - * the hole in the table - */ - - br[rate] = IS_OFDM(rate) ? ofdm_basic : cck_basic; - - if (br[rate] != 0) - continue; - - if (IS_OFDM(rate)) { - /* In 11g and 11a, the OFDM mandatory rates are 6, 12, and 24 Mbps */ - if (rate >= WLC_RATE_24M) - mandatory = WLC_RATE_24M; - else if (rate >= WLC_RATE_12M) - mandatory = WLC_RATE_12M; - else - mandatory = WLC_RATE_6M; - } else { - /* In 11b, all the CCK rates are mandatory 1 - 11 Mbps */ - mandatory = rate; - } - - br[rate] = mandatory; - } -} - -static void wlc_write_rate_shm(struct wlc_info *wlc, u8 rate, u8 basic_rate) -{ - u8 phy_rate, index; - u8 basic_phy_rate, basic_index; - u16 dir_table, basic_table; - u16 basic_ptr; - - /* Shared memory address for the table we are reading */ - dir_table = IS_OFDM(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B; - - /* Shared memory address for the table we are writing */ - basic_table = IS_OFDM(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B; - - /* - * for a given rate, the LS-nibble of the PLCP SIGNAL field is - * the index into the rate table. - */ - phy_rate = rate_info[rate] & WLC_RATE_MASK; - basic_phy_rate = rate_info[basic_rate] & WLC_RATE_MASK; - index = phy_rate & 0xf; - basic_index = basic_phy_rate & 0xf; - - /* Find the SHM pointer to the ACK rate entry by looking in the - * Direct-map Table - */ - basic_ptr = wlc_read_shm(wlc, (dir_table + basic_index * 2)); - - /* Update the SHM BSS-basic-rate-set mapping table with the pointer - * to the correct basic rate for the given incoming rate - */ - wlc_write_shm(wlc, (basic_table + index * 2), basic_ptr); -} - -static const wlc_rateset_t *wlc_rateset_get_hwrs(struct wlc_info *wlc) -{ - const wlc_rateset_t *rs_dflt; - - if (WLC_PHY_11N_CAP(wlc->band)) { - if (BAND_5G(wlc->band->bandtype)) - rs_dflt = &ofdm_mimo_rates; - else - rs_dflt = &cck_ofdm_mimo_rates; - } else if (wlc->band->gmode) - rs_dflt = &cck_ofdm_rates; - else - rs_dflt = &cck_rates; - - return rs_dflt; -} - -void wlc_set_ratetable(struct wlc_info *wlc) -{ - const wlc_rateset_t *rs_dflt; - wlc_rateset_t rs; - u8 rate, basic_rate; - uint i; - - rs_dflt = wlc_rateset_get_hwrs(wlc); - - wlc_rateset_copy(rs_dflt, &rs); - wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); - - /* walk the phy rate table and update SHM basic rate lookup table */ - for (i = 0; i < rs.count; i++) { - rate = rs.rates[i] & WLC_RATE_MASK; - - /* for a given rate WLC_BASIC_RATE returns the rate at - * which a response ACK/CTS should be sent. - */ - basic_rate = WLC_BASIC_RATE(wlc, rate); - if (basic_rate == 0) { - /* This should only happen if we are using a - * restricted rateset. - */ - basic_rate = rs.rates[0] & WLC_RATE_MASK; - } - - wlc_write_rate_shm(wlc, rate, basic_rate); - } -} - -/* - * Return true if the specified rate is supported by the specified band. - * WLC_BAND_AUTO indicates the current band. - */ -bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rspec, int band, - bool verbose) -{ - wlc_rateset_t *hw_rateset; - uint i; - - if ((band == WLC_BAND_AUTO) || (band == wlc->band->bandtype)) { - hw_rateset = &wlc->band->hw_rateset; - } else if (NBANDS(wlc) > 1) { - hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset; - } else { - /* other band specified and we are a single band device */ - return false; - } - - /* check if this is a mimo rate */ - if (IS_MCS(rspec)) { - if (!VALID_MCS((rspec & RSPEC_RATE_MASK))) - goto error; - - return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK)); - } - - for (i = 0; i < hw_rateset->count; i++) - if (hw_rateset->rates[i] == RSPEC2RATE(rspec)) - return true; - error: - if (verbose) { - wiphy_err(wlc->wiphy, "wl%d: wlc_valid_rate: rate spec 0x%x " - "not in hw_rateset\n", wlc->pub->unit, rspec); - } - - return false; -} - -static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap) -{ - uint i; - struct wlcband *band; - - for (i = 0; i < NBANDS(wlc); i++) { - if (IS_SINGLEBAND_5G(wlc->deviceid)) - i = BAND_5G_INDEX; - band = wlc->bandstate[i]; - if (band->bandtype == WLC_BAND_5G) { - if ((bwcap == WLC_N_BW_40ALL) - || (bwcap == WLC_N_BW_20IN2G_40IN5G)) - band->mimo_cap_40 = true; - else - band->mimo_cap_40 = false; - } else { - if (bwcap == WLC_N_BW_40ALL) - band->mimo_cap_40 = true; - else - band->mimo_cap_40 = false; - } - } -} - -void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) -{ - const wlc_rateset_t *rs_dflt; - wlc_rateset_t rs; - u8 rate; - u16 entry_ptr; - u8 plcp[D11_PHY_HDR_LEN]; - u16 dur, sifs; - uint i; - - sifs = SIFS(wlc->band); - - rs_dflt = wlc_rateset_get_hwrs(wlc); - - wlc_rateset_copy(rs_dflt, &rs); - wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); - - /* walk the phy rate table and update MAC core SHM basic rate table entries */ - for (i = 0; i < rs.count; i++) { - rate = rs.rates[i] & WLC_RATE_MASK; - - entry_ptr = wlc_rate_shm_offset(wlc, rate); - - /* Calculate the Probe Response PLCP for the given rate */ - wlc_compute_plcp(wlc, rate, frame_len, plcp); - - /* Calculate the duration of the Probe Response frame plus SIFS for the MAC */ - dur = - (u16) wlc_calc_frame_time(wlc, rate, WLC_LONG_PREAMBLE, - frame_len); - dur += sifs; - - /* Update the SHM Rate Table entry Probe Response values */ - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS, - (u16) (plcp[0] + (plcp[1] << 8))); - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS + 2, - (u16) (plcp[2] + (plcp[3] << 8))); - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_DUR_POS, dur); - } -} - -/* Max buffering needed for beacon template/prb resp template is 142 bytes. - * - * PLCP header is 6 bytes. - * 802.11 A3 header is 24 bytes. - * Max beacon frame body template length is 112 bytes. - * Max probe resp frame body template length is 110 bytes. - * - * *len on input contains the max length of the packet available. - * - * The *len value is set to the number of bytes in buf used, and starts with the PLCP - * and included up to, but not including, the 4 byte FCS. - */ -static void -wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, - struct wlc_bsscfg *cfg, u16 *buf, int *len) -{ - static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; - cck_phy_hdr_t *plcp; - struct ieee80211_mgmt *h; - int hdr_len, body_len; - - if (MBSS_BCN_ENAB(cfg) && type == IEEE80211_STYPE_BEACON) - hdr_len = DOT11_MAC_HDR_LEN; - else - hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN; - body_len = *len - hdr_len; /* calc buffer size provided for frame body */ - - *len = hdr_len + body_len; /* return actual size */ - - /* format PHY and MAC headers */ - memset((char *)buf, 0, hdr_len); - - plcp = (cck_phy_hdr_t *) buf; - - /* PLCP for Probe Response frames are filled in from core's rate table */ - if (type == IEEE80211_STYPE_BEACON && !MBSS_BCN_ENAB(cfg)) { - /* fill in PLCP */ - wlc_compute_plcp(wlc, bcn_rspec, - (DOT11_MAC_HDR_LEN + body_len + FCS_LEN), - (u8 *) plcp); - - } - /* "Regular" and 16 MBSS but not for 4 MBSS */ - /* Update the phytxctl for the beacon based on the rspec */ - if (!SOFTBCN_ENAB(cfg)) - wlc_beacon_phytxctl_txant_upd(wlc, bcn_rspec); - - if (MBSS_BCN_ENAB(cfg) && type == IEEE80211_STYPE_BEACON) - h = (struct ieee80211_mgmt *)&plcp[0]; - else - h = (struct ieee80211_mgmt *)&plcp[1]; - - /* fill in 802.11 header */ - h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type); - - /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */ - /* A1 filled in by MAC for prb resp, broadcast for bcn */ - if (type == IEEE80211_STYPE_BEACON) - memcpy(&h->da, ðer_bcast, ETH_ALEN); - memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN); - memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN); - - /* SEQ filled in by MAC */ - - return; -} - -int wlc_get_header_len() -{ - return TXOFF; -} - -/* Update a beacon for a particular BSS - * For MBSS, this updates the software template and sets "latest" to the index of the - * template updated. - * Otherwise, it updates the hardware template. - */ -void wlc_bss_update_beacon(struct wlc_info *wlc, struct wlc_bsscfg *cfg) -{ - int len = BCN_TMPL_LEN; - - /* Clear the soft intmask */ - wlc->defmacintmask &= ~MI_BCNTPL; - - if (!cfg->up) { /* Only allow updates on an UP bss */ - return; - } - - /* Optimize: Some of if/else could be combined */ - if (!MBSS_BCN_ENAB(cfg) && HWBCN_ENAB(cfg)) { - /* Hardware beaconing for this config */ - u16 bcn[BCN_TMPL_LEN / 2]; - u32 both_valid = MCMD_BCN0VLD | MCMD_BCN1VLD; - d11regs_t *regs = wlc->regs; - - /* Check if both templates are in use, if so sched. an interrupt - * that will call back into this routine - */ - if ((R_REG(®s->maccommand) & both_valid) == both_valid) { - /* clear any previous status */ - W_REG(®s->macintstatus, MI_BCNTPL); - } - /* Check that after scheduling the interrupt both of the - * templates are still busy. if not clear the int. & remask - */ - if ((R_REG(®s->maccommand) & both_valid) == both_valid) { - wlc->defmacintmask |= MI_BCNTPL; - return; - } - - wlc->bcn_rspec = - wlc_lowest_basic_rspec(wlc, &cfg->current_bss->rateset); - /* update the template and ucode shm */ - wlc_bcn_prb_template(wlc, IEEE80211_STYPE_BEACON, - wlc->bcn_rspec, cfg, bcn, &len); - wlc_write_hw_bcntemplates(wlc, bcn, len, false); - } -} - -/* - * Update all beacons for the system. - */ -void wlc_update_beacon(struct wlc_info *wlc) -{ - int idx; - struct wlc_bsscfg *bsscfg; - - /* update AP or IBSS beacons */ - FOREACH_BSS(wlc, idx, bsscfg) { - if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) - wlc_bss_update_beacon(wlc, bsscfg); - } -} - -/* Write ssid into shared memory */ -void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg) -{ - u8 *ssidptr = cfg->SSID; - u16 base = M_SSID; - u8 ssidbuf[IEEE80211_MAX_SSID_LEN]; - - /* padding the ssid with zero and copy it into shm */ - memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN); - memcpy(ssidbuf, ssidptr, cfg->SSID_len); - - wlc_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN); - - if (!MBSS_BCN_ENAB(cfg)) - wlc_write_shm(wlc, M_SSIDLEN, (u16) cfg->SSID_len); -} - -void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend) -{ - int idx; - struct wlc_bsscfg *bsscfg; - - /* update AP or IBSS probe responses */ - FOREACH_BSS(wlc, idx, bsscfg) { - if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) - wlc_bss_update_probe_resp(wlc, bsscfg, suspend); - } -} - -void -wlc_bss_update_probe_resp(struct wlc_info *wlc, struct wlc_bsscfg *cfg, - bool suspend) -{ - u16 prb_resp[BCN_TMPL_LEN / 2]; - int len = BCN_TMPL_LEN; - - /* write the probe response to hardware, or save in the config structure */ - if (!MBSS_PRB_ENAB(cfg)) { - - /* create the probe response template */ - wlc_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0, cfg, - prb_resp, &len); - - if (suspend) - wlc_suspend_mac_and_wait(wlc); - - /* write the probe response into the template region */ - wlc_bmac_write_template_ram(wlc->hw, T_PRS_TPL_BASE, - (len + 3) & ~3, prb_resp); - - /* write the length of the probe response frame (+PLCP/-FCS) */ - wlc_write_shm(wlc, M_PRB_RESP_FRM_LEN, (u16) len); - - /* write the SSID and SSID length */ - wlc_shm_ssid_upd(wlc, cfg); - - /* - * Write PLCP headers and durations for probe response frames at all rates. - * Use the actual frame length covered by the PLCP header for the call to - * wlc_mod_prb_rsp_rate_table() by subtracting the PLCP len and adding the FCS. - */ - len += (-D11_PHY_HDR_LEN + FCS_LEN); - wlc_mod_prb_rsp_rate_table(wlc, (u16) len); - - if (suspend) - wlc_enable_mac(wlc); - } else { /* Generating probe resp in sw; update local template */ - /* error: No software probe response support without MBSS */ - } -} - -/* prepares pdu for transmission. returns BCM error codes */ -int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifop) -{ - uint fifo; - d11txh_t *txh; - struct ieee80211_hdr *h; - struct scb *scb; - - txh = (d11txh_t *) (pdu->data); - h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); - - /* get the pkt queue info. This was put at wlc_sendctl or wlc_send for PDU */ - fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK; - - scb = NULL; - - *fifop = fifo; - - /* return if insufficient dma resources */ - if (TXAVAIL(wlc, fifo) < MAX_DMA_SEGS) { - /* Mark precedences related to this FIFO, unsendable */ - WLC_TX_FIFO_CLEAR(wlc, fifo); - return -EBUSY; - } - return 0; -} - -/* init tx reported rate mechanism */ -void wlc_reprate_init(struct wlc_info *wlc) -{ - int i; - struct wlc_bsscfg *bsscfg; - - FOREACH_BSS(wlc, i, bsscfg) { - wlc_bsscfg_reprate_init(bsscfg); - } -} - -/* per bsscfg init tx reported rate mechanism */ -void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg) -{ - bsscfg->txrspecidx = 0; - memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec)); -} - -void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs) -{ - wlc_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype, - false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), - CHSPEC_WLC_BW(wlc->default_bss->chanspec), - wlc->stf->txstreams); -} - -static void wlc_bss_default_init(struct wlc_info *wlc) -{ - chanspec_t chanspec; - struct wlcband *band; - wlc_bss_info_t *bi = wlc->default_bss; - - /* init default and target BSS with some sane initial values */ - memset((char *)(bi), 0, sizeof(wlc_bss_info_t)); - bi->beacon_period = ISSIM_ENAB(wlc->pub->sih) ? BEACON_INTERVAL_DEF_QT : - BEACON_INTERVAL_DEFAULT; - bi->dtim_period = ISSIM_ENAB(wlc->pub->sih) ? DTIM_INTERVAL_DEF_QT : - DTIM_INTERVAL_DEFAULT; - - /* fill the default channel as the first valid channel - * starting from the 2G channels - */ - chanspec = CH20MHZ_CHSPEC(1); - wlc->home_chanspec = bi->chanspec = chanspec; - - /* find the band of our default channel */ - band = wlc->band; - if (NBANDS(wlc) > 1 && band->bandunit != CHSPEC_WLCBANDUNIT(chanspec)) - band = wlc->bandstate[OTHERBANDUNIT(wlc)]; - - /* init bss rates to the band specific default rate set */ - wlc_rateset_default(&bi->rateset, NULL, band->phytype, band->bandtype, - false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), - CHSPEC_WLC_BW(chanspec), wlc->stf->txstreams); - - if (N_ENAB(wlc->pub)) - bi->flags |= WLC_BSS_HT; -} - -static ratespec_t -mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, - u32 int_val) -{ - u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT; - u8 rate = int_val & NRATE_RATE_MASK; - ratespec_t rspec; - bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE); - bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT); - bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY) - == NRATE_OVERRIDE_MCS_ONLY); - int bcmerror = 0; - - if (!ismcs) { - return (ratespec_t) rate; - } - - /* validate the combination of rate/mcs/stf is allowed */ - if (N_ENAB(wlc->pub) && ismcs) { - /* mcs only allowed when nmode */ - if (stf > PHY_TXC1_MODE_SDM) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n", - WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - - /* mcs 32 is a special case, DUP mode 40 only */ - if (rate == 32) { - if (!CHSPEC_IS40(wlc->home_chanspec) || - ((stf != PHY_TXC1_MODE_SISO) - && (stf != PHY_TXC1_MODE_CDD))) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs " - "32\n", WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - /* mcs > 7 must use stf SDM */ - } else if (rate > HIGHEST_SINGLE_STREAM_MCS) { - /* mcs > 7 must use stf SDM */ - if (stf != PHY_TXC1_MODE_SDM) { - BCMMSG(wlc->wiphy, "wl%d: enabling " - "SDM mode for mcs %d\n", - WLCWLUNIT(wlc), rate); - stf = PHY_TXC1_MODE_SDM; - } - } else { - /* MCS 0-7 may use SISO, CDD, and for phy_rev >= 3 STBC */ - if ((stf > PHY_TXC1_MODE_STBC) || - (!WLC_STBC_CAP_PHY(wlc) - && (stf == PHY_TXC1_MODE_STBC))) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC" - "\n", WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - } - } else if (IS_OFDM(rate)) { - if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n", - WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - } else if (IS_CCK(rate)) { - if ((cur_band->bandtype != WLC_BAND_2G) - || (stf != PHY_TXC1_MODE_SISO)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n", - WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - } else { - wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n", - WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - /* make sure multiple antennae are available for non-siso rates */ - if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) { - wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO " - "request\n", WLCWLUNIT(wlc), __func__); - bcmerror = -EINVAL; - goto done; - } - - rspec = rate; - if (ismcs) { - rspec |= RSPEC_MIMORATE; - /* For STBC populate the STC field of the ratespec */ - if (stf == PHY_TXC1_MODE_STBC) { - u8 stc; - stc = 1; /* Nss for single stream is always 1 */ - rspec |= (stc << RSPEC_STC_SHIFT); - } - } - - rspec |= (stf << RSPEC_STF_SHIFT); - - if (override_mcs_only) - rspec |= RSPEC_OVERRIDE_MCS_ONLY; - - if (issgi) - rspec |= RSPEC_SHORT_GI; - - if ((rate != 0) - && !wlc_valid_rate(wlc, rspec, cur_band->bandtype, true)) { - return rate; - } - - return rspec; -done: - return rate; -} - -/* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */ -static int -wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, - bool writeToShm) -{ - int idle_busy_ratio_x_16 = 0; - uint offset = - isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM : - M_TX_IDLE_BUSY_RATIO_X_16_CCK; - if (duty_cycle > 100 || duty_cycle < 0) { - wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n", - wlc->pub->unit); - return -EINVAL; - } - if (duty_cycle) - idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle; - /* Only write to shared memory when wl is up */ - if (writeToShm) - wlc_write_shm(wlc, offset, (u16) idle_busy_ratio_x_16); - - if (isOFDM) - wlc->tx_duty_cycle_ofdm = (u16) duty_cycle; - else - wlc->tx_duty_cycle_cck = (u16) duty_cycle; - - return 0; -} - -/* Read a single u16 from shared memory. - * SHM 'offset' needs to be an even address - */ -u16 wlc_read_shm(struct wlc_info *wlc, uint offset) -{ - return wlc_bmac_read_shm(wlc->hw, offset); -} - -/* Write a single u16 to shared memory. - * SHM 'offset' needs to be an even address - */ -void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v) -{ - wlc_bmac_write_shm(wlc->hw, offset, v); -} - -/* Copy a buffer to shared memory. - * SHM 'offset' needs to be an even address and - * Buffer length 'len' must be an even number of bytes - */ -void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, int len) -{ - /* offset and len need to be even */ - if (len <= 0 || (offset & 1) || (len & 1)) - return; - - wlc_bmac_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL); - -} - -/* wrapper BMAC functions to for HIGH driver access */ -void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val) -{ - wlc_bmac_mctrl(wlc->hw, mask, val); -} - -void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, int bands) -{ - wlc_bmac_mhf(wlc->hw, idx, mask, val, bands); -} - -int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks) -{ - return wlc_bmac_xmtfifo_sz_get(wlc->hw, fifo, blocks); -} - -void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, - void *buf) -{ - wlc_bmac_write_template_ram(wlc->hw, offset, len, buf); -} - -void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, - bool both) -{ - wlc_bmac_write_hw_bcntemplates(wlc->hw, bcn, len, both); -} - -void -wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, - const u8 *addr) -{ - wlc_bmac_set_addrmatch(wlc->hw, match_reg_offset, addr); - if (match_reg_offset == RCM_BSSID_OFFSET) - memcpy(wlc->cfg->BSSID, addr, ETH_ALEN); -} - -void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit) -{ - wlc_bmac_pllreq(wlc->hw, set, req_bit); -} - -void wlc_reset_bmac_done(struct wlc_info *wlc) -{ -} - -/* check for the particular priority flow control bit being set */ -bool -wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, struct wlc_txq_info *q, - int prio) -{ - uint prio_mask; - - if (prio == ALLPRIO) { - prio_mask = TXQ_STOP_FOR_PRIOFC_MASK; - } else { - prio_mask = NBITVAL(prio); - } - - return (q->stopped & prio_mask) == prio_mask; -} - -/* propagate the flow control to all interfaces using the given tx queue */ -void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, int prio) -{ - uint prio_bits; - uint cur_bits; - - BCMMSG(wlc->wiphy, "flow control kicks in\n"); - - if (prio == ALLPRIO) { - prio_bits = TXQ_STOP_FOR_PRIOFC_MASK; - } else { - prio_bits = NBITVAL(prio); - } - - cur_bits = qi->stopped & prio_bits; - - /* Check for the case of no change and return early - * Otherwise update the bit and continue - */ - if (on) { - if (cur_bits == prio_bits) { - return; - } - mboolset(qi->stopped, prio_bits); - } else { - if (cur_bits == 0) { - return; - } - mboolclr(qi->stopped, prio_bits); - } - - /* If there is a flow control override we will not change the external - * flow control state. - */ - if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK) { - return; - } - - wlc_txflowcontrol_signal(wlc, qi, on, prio); -} - -void -wlc_txflowcontrol_override(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, uint override) -{ - uint prev_override; - - prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK); - - /* Update the flow control bits and do an early return if there is - * no change in the external flow control state. - */ - if (on) { - mboolset(qi->stopped, override); - /* if there was a previous override bit on, then setting this - * makes no difference. - */ - if (prev_override) { - return; - } - - wlc_txflowcontrol_signal(wlc, qi, ON, ALLPRIO); - } else { - mboolclr(qi->stopped, override); - /* clearing an override bit will only make a difference for - * flow control if it was the only bit set. For any other - * override setting, just return - */ - if (prev_override != override) { - return; - } - - if (qi->stopped == 0) { - wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); - } else { - int prio; - - for (prio = MAXPRIO; prio >= 0; prio--) { - if (!mboolisset(qi->stopped, NBITVAL(prio))) - wlc_txflowcontrol_signal(wlc, qi, OFF, - prio); - } - } - } -} - -static void wlc_txflowcontrol_reset(struct wlc_info *wlc) -{ - struct wlc_txq_info *qi; - - for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { - if (qi->stopped) { - wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); - qi->stopped = 0; - } - } -} - -static void -wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on, - int prio) -{ -#ifdef NON_FUNCTIONAL - /* wlcif_list is never filled so this function is not functional */ - struct wlc_if *wlcif; - - for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { - if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED) - brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); - } -#endif -} - -static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) -{ - struct wlc_txq_info *qi, *p; - - qi = kzalloc(sizeof(struct wlc_txq_info), GFP_ATOMIC); - if (qi != NULL) { - /* - * Have enough room for control packets along with HI watermark - * Also, add room to txq for total psq packets if all the SCBs - * leave PS mode. The watermark for flowcontrol to OS packets - * will remain the same - */ - brcmu_pktq_init(&qi->q, WLC_PREC_COUNT, - (2 * wlc->pub->tunables->datahiwat) + PKTQ_LEN_DEFAULT - + wlc->pub->psq_pkts_total); - - /* add this queue to the the global list */ - p = wlc->tx_queues; - if (p == NULL) { - wlc->tx_queues = qi; - } else { - while (p->next != NULL) - p = p->next; - p->next = qi; - } - } - return qi; -} - -static void wlc_txq_free(struct wlc_info *wlc, struct wlc_txq_info *qi) -{ - struct wlc_txq_info *p; - - if (qi == NULL) - return; - - /* remove the queue from the linked list */ - p = wlc->tx_queues; - if (p == qi) - wlc->tx_queues = p->next; - else { - while (p != NULL && p->next != qi) - p = p->next; - if (p != NULL) - p->next = p->next->next; - } - - kfree(qi); -} - -/* - * Flag 'scan in progress' to withhold dynamic phy calibration - */ -void wlc_scan_start(struct wlc_info *wlc) -{ - wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true); -} - -void wlc_scan_stop(struct wlc_info *wlc) -{ - wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false); -} - -void wlc_associate_upd(struct wlc_info *wlc, bool state) -{ - wlc->pub->associated = state; - wlc->cfg->associated = state; -} - -/* - * When a remote STA/AP is removed by Mac80211, or when it can no longer accept - * AMPDU traffic, packets pending in hardware have to be invalidated so that - * when later on hardware releases them, they can be handled appropriately. - */ -void wlc_inval_dma_pkts(struct wlc_hw_info *hw, - struct ieee80211_sta *sta, - void (*dma_callback_fn)) -{ - struct dma_pub *dmah; - int i; - for (i = 0; i < NFIFO; i++) { - dmah = hw->di[i]; - if (dmah != NULL) - dma_walk_packets(dmah, dma_callback_fn, sta); - } -} - -int wlc_get_curband(struct wlc_info *wlc) -{ - return wlc->band->bandunit; -} - -void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) -{ - /* flush packet queue when requested */ - if (drop) - brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); - - /* wait for queue and DMA fifos to run dry */ - while (!pktq_empty(&wlc->pkt_queue->q) || - TXPKTPENDTOT(wlc) > 0) { - brcms_msleep(wlc->wl, 1); - } -} - -int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int int_val) -{ - int err = 0; - - switch (par_id) { - case IOV_BCN_LI_BCN: - wlc->bcn_li_bcn = (u8) int_val; - if (wlc->pub->up) - wlc_bcn_li_upd(wlc); - break; - /* As long as override is false, this only sets the *user* - targets. User can twiddle this all he wants with no harm. - wlc_phy_txpower_set() explicitly sets override to false if - not internal or test. - */ - case IOV_QTXPOWER:{ - u8 qdbm; - bool override; - - /* Remove override bit and clip to max qdbm value */ - qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); - /* Extract override setting */ - override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; - err = - wlc_phy_txpower_set(wlc->band->pi, qdbm, override); - break; - } - case IOV_MPC: - wlc->mpc = (bool)int_val; - wlc_radio_mpc_upd(wlc); - break; - default: - err = -ENOTSUPP; - } - return err; -} - -int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr) -{ - int err = 0; - - switch (par_id) { - case IOV_BCN_LI_BCN: - *ret_int_ptr = wlc->bcn_li_bcn; - break; - case IOV_QTXPOWER: { - uint qdbm; - bool override; - - err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, - &override); - if (err != 0) - return err; - - /* Return qdbm units */ - *ret_int_ptr = - qdbm | (override ? WL_TXPWR_OVERRIDE : 0); - break; - } - case IOV_MPC: - *ret_int_ptr = (s32) wlc->mpc; - break; - default: - err = -ENOTSUPP; - } - return err; -} - -/* - * Search the name=value vars for a specific one and return its value. - * Returns NULL if not found. - */ -char *getvar(char *vars, const char *name) -{ - char *s; - int len; - - if (!name) - return NULL; - - len = strlen(name); - if (len == 0) - return NULL; - - /* first look in vars[] */ - for (s = vars; s && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - /* nothing found */ - return NULL; -} - -/* - * Search the vars for a specific one and return its value as - * an integer. Returns 0 if not found. - */ -int getintvar(char *vars, const char *name) -{ - char *val; - - val = getvar(vars, name); - if (val == NULL) - return 0; - - return simple_strtoul(val, NULL, 0); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/wlc_main.h deleted file mode 100644 index acba50b..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ /dev/null @@ -1,880 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_MAIN_H_ -#define _BRCM_MAIN_H_ - -#define MA_WINDOW_SZ 8 /* moving average window size */ -#define WL_HWRXOFF 38 /* chip rx buffer offset */ -#define INVCHANNEL 255 /* invalid channel */ -#define MAXCOREREV 28 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ -#define WLC_MAXMODULES 22 /* max # wlc_module_register() calls */ - -#define SEQNUM_SHIFT 4 -#define AMPDU_DELIMITER_LEN 4 -#define SEQNUM_MAX 0x1000 - -#define APHY_CWMIN 15 -#define PHY_CWMAX 1023 - -#define EDCF_AIFSN_MIN 1 -#define FRAGNUM_MASK 0xF - -#define WLC_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) - -/* Maximum wait time for a MAC suspend */ -#define WLC_MAX_MAC_SUSPEND 83000 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ - -/* Probe Response timeout - responses for probe requests older that this are tossed, zero to disable - */ -#define WLC_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */ - -/* transmit buffer max headroom for protocol headers */ -#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN) - -#define AC_COUNT 4 - -/* Macros for doing definition and get/set of bitfields - * Usage example, e.g. a three-bit field (bits 4-6): - * #define _M BITFIELD_MASK(3) - * #define _S 4 - * ... - * regval = R_REG(osh, ®s->regfoo); - * field = GFIELD(regval, ); - * regval = SFIELD(regval, , 1); - * W_REG(osh, ®s->regfoo, regval); - */ -#define BITFIELD_MASK(width) \ - (((unsigned)1 << (width)) - 1) -#define GFIELD(val, field) \ - (((val) >> field ## _S) & field ## _M) -#define SFIELD(val, field, bits) \ - (((val) & (~(field ## _M << field ## _S))) | \ - ((unsigned)(bits) << field ## _S)) - -/* For managing scan result lists */ -struct wlc_bss_list { - uint count; - bool beacon; /* set for beacon, cleared for probe response */ - wlc_bss_info_t *ptrs[MAXBSS]; -}; - -#define SW_TIMER_MAC_STAT_UPD 30 /* periodic MAC stats update */ - -/* Double check that unsupported cores are not enabled */ -#if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV) -#error "Configuration for D11CONF includes unsupported versions." -#endif /* Bad versions */ - -#define VALID_COREREV(corerev) CONF_HAS(D11CONF, corerev) - -/* values for shortslot_override */ -#define WLC_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ -#define WLC_SHORTSLOT_OFF 0 /* Turn off short slot */ -#define WLC_SHORTSLOT_ON 1 /* Turn on short slot */ - -/* value for short/long and mixmode/greenfield preamble */ - -#define WLC_LONG_PREAMBLE (0) -#define WLC_SHORT_PREAMBLE (1 << 0) -#define WLC_GF_PREAMBLE (1 << 1) -#define WLC_MM_PREAMBLE (1 << 2) -#define WLC_IS_MIMO_PREAMBLE(_pre) (((_pre) == WLC_GF_PREAMBLE) || ((_pre) == WLC_MM_PREAMBLE)) - -/* values for barker_preamble */ -#define WLC_BARKER_SHORT_ALLOWED 0 /* Short pre-amble allowed */ - -/* A fifo is full. Clear precedences related to that FIFO */ -#define WLC_TX_FIFO_CLEAR(wlc, fifo) ((wlc)->tx_prec_map &= ~(wlc)->fifo2prec_map[fifo]) - -/* Fifo is NOT full. Enable precedences for that FIFO */ -#define WLC_TX_FIFO_ENAB(wlc, fifo) ((wlc)->tx_prec_map |= (wlc)->fifo2prec_map[fifo]) - -/* TxFrameID */ -/* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */ -/* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */ -#define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */ -#define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */ -#define TXFID_SEQ_SHIFT 5 /* Number of bit shifts */ -#define TXFID_RATE_PROBE_MASK 0x8000 /* Bit 15 for rate probe */ -#define TXFID_RATE_MASK 0x0018 /* Mask for bits 3 and 4 */ -#define TXFID_RATE_SHIFT 3 /* Shift 3 bits for rate mask */ - -/* promote boardrev */ -#define BOARDREV_PROMOTABLE 0xFF /* from */ -#define BOARDREV_PROMOTED 1 /* to */ - -/* if wpa is in use then portopen is true when the group key is plumbed otherwise it is always true - */ -#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)) -#define WLC_SW_KEYS(wlc, bsscfg) ((((wlc)->wsec_swkeys) || \ - ((bsscfg)->wsec & WSEC_SWFLAG))) - -#define WLC_PORTOPEN(cfg) \ - (((cfg)->WPA_auth != WPA_AUTH_DISABLED && WSEC_ENABLED((cfg)->wsec)) ? \ - (cfg)->wsec_portopen : true) - -#define PS_ALLOWED(wlc) wlc_ps_allowed(wlc) - -#define DATA_BLOCK_TX_SUPR (1 << 4) - -/* 802.1D Priority to TX FIFO number for wme */ -extern const u8 prio2fifo[]; - -/* Ucode MCTL_WAKE override bits */ -#define WLC_WAKE_OVERRIDE_CLKCTL 0x01 -#define WLC_WAKE_OVERRIDE_PHYREG 0x02 -#define WLC_WAKE_OVERRIDE_MACSUSPEND 0x04 -#define WLC_WAKE_OVERRIDE_TXFIFO 0x08 -#define WLC_WAKE_OVERRIDE_FORCEFAST 0x10 - -/* stuff pulled in from wlc.c */ - -/* Interrupt bit error summary. Don't include I_RU: we refill DMA at other - * times; and if we run out, constant I_RU interrupts may cause lockup. We - * will still get error counts from rx0ovfl. - */ -#define I_ERRORS (I_PC | I_PD | I_DE | I_RO | I_XU) -/* default software intmasks */ -#define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */ -#define DEF_MACINTMASK (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \ - MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \ - MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP) - -#define RETRY_SHORT_DEF 7 /* Default Short retry Limit */ -#define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */ -#define RETRY_LONG_DEF 4 /* Default Long retry count */ -#define RETRY_SHORT_FB 3 /* Short retry count for fallback rate */ -#define RETRY_LONG_FB 2 /* Long retry count for fallback rate */ - -#define MAXTXPKTS 6 /* max # pkts pending */ - -/* frameburst */ -#define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */ -#define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */ - -/* Per-AC retry limit register definitions; uses bcmdefs.h bitfield macros */ -#define EDCF_SHORT_S 0 -#define EDCF_SFB_S 4 -#define EDCF_LONG_S 8 -#define EDCF_LFB_S 12 -#define EDCF_SHORT_M BITFIELD_MASK(4) -#define EDCF_SFB_M BITFIELD_MASK(4) -#define EDCF_LONG_M BITFIELD_MASK(4) -#define EDCF_LFB_M BITFIELD_MASK(4) - -#define NFIFO 6 /* # tx/rx fifopairs */ - -#define WLC_WME_RETRY_SHORT_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SHORT) -#define WLC_WME_RETRY_SFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SFB) -#define WLC_WME_RETRY_LONG_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LONG) -#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB) - -#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \ - (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val)) -#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \ - (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val)) -#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \ - (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val)) -#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \ - (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val)) - -/* PLL requests */ -#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */ -#define WLC_PLLREQ_RADIO_MON 0x2 /* hold pll for radio monitor register checking */ -#define WLC_PLLREQ_FLIP 0x4 /* hold/release pll for some short operation */ - -/* - * Macros to check if AP or STA is active. - * AP Active means more than just configured: driver and BSS are "up"; - * that is, we are beaconing/responding as an AP (aps_associated). - * STA Active similarly means the driver is up and a configured STA BSS - * is up: either associated (stas_associated) or trying. - * - * Macro definitions vary as per AP/STA ifdefs, allowing references to - * ifdef'd structure fields and constant values (0) for optimization. - * Make sure to enclose blocks of code such that any routines they - * reference can also be unused and optimized out by the linker. - */ -/* NOTE: References structure fields defined in wlc.h */ -#define AP_ACTIVE(wlc) (0) - -/* - * Detect Card removed. - * Even checking an sbconfig register read will not false trigger when the core is in reset. - * it breaks CF address mechanism. Accessing gphy phyversion will cause SB error if aphy - * is in reset on 4306B0-DB. Need a simple accessible reg with fixed 0/1 pattern - * (some platforms return all 0). - * If clocks are present, call the sb routine which will figure out if the device is removed. - */ -#define DEVICEREMOVED(wlc) \ - ((wlc->hw->clk) ? \ - ((R_REG(&wlc->hw->regs->maccontrol) & \ - (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN) : \ - (ai_deviceremoved(wlc->hw->sih))) - -#define WLCWLUNIT(wlc) ((wlc)->pub->unit) - -struct wlc_protection { - bool _g; /* use g spec protection, driver internal */ - s8 g_override; /* override for use of g spec protection */ - u8 gmode_user; /* user config gmode, operating band->gmode is different */ - s8 overlap; /* Overlap BSS/IBSS protection for both 11g and 11n */ - s8 nmode_user; /* user config nmode, operating pub->nmode is different */ - s8 n_cfg; /* use OFDM protection on MIMO frames */ - s8 n_cfg_override; /* override for use of N protection */ - bool nongf; /* non-GF present protection */ - s8 nongf_override; /* override for use of GF protection */ - s8 n_pam_override; /* override for preamble: MM or GF */ - bool n_obss; /* indicated OBSS Non-HT STA present */ -}; - -/* anything affects the single/dual streams/antenna operation */ -struct wlc_stf { - u8 hw_txchain; /* HW txchain bitmap cfg */ - u8 txchain; /* txchain bitmap being used */ - u8 txstreams; /* number of txchains being used */ - - u8 hw_rxchain; /* HW rxchain bitmap cfg */ - u8 rxchain; /* rxchain bitmap being used */ - u8 rxstreams; /* number of rxchains being used */ - - u8 ant_rx_ovr; /* rx antenna override */ - s8 txant; /* userTx antenna setting */ - u16 phytxant; /* phyTx antenna setting in txheader */ - - u8 ss_opmode; /* singlestream Operational mode, 0:siso; 1:cdd */ - bool ss_algosel_auto; /* if true, use wlc->stf->ss_algo_channel; */ - /* else use wlc->band->stf->ss_mode_band; */ - u16 ss_algo_channel; /* ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC */ - u8 no_cddstbc; /* stf override, 1: no CDD (or STBC) allowed */ - - u8 rxchain_restore_delay; /* delay time to restore default rxchain */ - - s8 ldpc; /* AUTO/ON/OFF ldpc cap supported */ - u8 txcore[MAX_STREAMS_SUPPORTED + 1]; /* bitmap of selected core for each Nsts */ - s8 spatial_policy; -}; - -#define WLC_STF_SS_STBC_TX(wlc, scb) \ - (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) || \ - (SCB_STBC_CAP((scb)) && \ - (wlc)->band->band_stf_stbc_tx == AUTO && \ - isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC)))) - -#define WLC_STBC_CAP_PHY(wlc) (WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) - -#define WLC_SGI_CAP_PHY(wlc) ((WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) || \ - WLCISLCNPHY(wlc->band)) - -#define WLC_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT) -#define WLC_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) >> RXS_CHAN_ID_SHIFT) -#define WLC_RX_CHANNEL(rxh) (WLC_CHAN_CHANNEL((rxh)->RxChan)) - -/* wlc_bss_info flag bit values */ -#define WLC_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */ - -/* Flags used in wlc_txq_info.stopped */ -#define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF /* per prio flow control bits */ -#define TXQ_STOP_FOR_PKT_DRAIN 0x00000100 /* stop txq enqueue for packet drain */ -#define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200 /* stop txq enqueue for ampdu flow control */ - -#define WLC_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */ -#define WLC_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */ - -/* - * core state (mac) - */ -struct wlccore { - uint coreidx; /* # sb enumerated core */ - - /* fifo */ - uint *txavail[NFIFO]; /* # tx descriptors available */ - s16 txpktpend[NFIFO]; /* tx admission control */ - - macstat_t *macstat_snapshot; /* mac hw prev read values */ -}; - -/* - * band state (phy+ana+radio) - */ -struct wlcband { - int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ - uint bandunit; /* bandstate[] index */ - - u16 phytype; /* phytype */ - u16 phyrev; - u16 radioid; - u16 radiorev; - wlc_phy_t *pi; /* pointer to phy specific information */ - bool abgphy_encore; - - u8 gmode; /* currently active gmode */ - - struct scb *hwrs_scb; /* permanent scb for hw rateset */ - - wlc_rateset_t defrateset; /* band-specific copy of default_bss.rateset */ - - ratespec_t rspec_override; /* 802.11 rate override */ - ratespec_t mrspec_override; /* multicast rate override */ - u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */ - s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */ - wlc_rateset_t hw_rateset; /* rates supported by chip (phy-specific) */ - u8 basic_rate[WLC_MAXRATE + 1]; /* basic rates indexed by rate */ - bool mimo_cap_40; /* 40 MHz cap enabled on this band */ - s8 antgain; /* antenna gain from srom */ - - u16 CWmin; /* The minimum size of contention window, in unit of aSlotTime */ - u16 CWmax; /* The maximum size of contention window, in unit of aSlotTime */ - u16 bcntsfoff; /* beacon tsf offset */ -}; - -/* tx completion callback takes 3 args */ -typedef void (*pkcb_fn_t) (struct wlc_info *wlc, uint txstatus, void *arg); - -struct pkt_cb { - pkcb_fn_t fn; /* function to call when tx frame completes */ - void *arg; /* void arg for fn */ - u8 nextidx; /* index of next call back if threading */ - bool entered; /* recursion check */ -}; - -/* module control blocks */ -struct modulecb { - char name[32]; /* module name : NULL indicates empty array member */ - const struct brcmu_iovar *iovars; /* iovar table */ - void *hdl; /* handle passed when handler 'doiovar' is called */ - watchdog_fn_t watchdog_fn; /* watchdog handler */ - iovar_fn_t iovar_fn; /* iovar handler */ - down_fn_t down_fn; /* down handler. Note: the int returned - * by the down function is a count of the - * number of timers that could not be - * freed. - */ -}; - -/* dump control blocks */ -struct dumpcb_s { - const char *name; /* dump name */ - dump_fn_t dump_fn; /* 'wl dump' handler */ - void *dump_fn_arg; - struct dumpcb_s *next; -}; - -struct edcf_acparam { - u8 ACI; - u8 ECW; - u16 TXOP; -} __attribute__((packed)); -typedef struct edcf_acparam edcf_acparam_t; - -struct wme_param_ie { - u8 oui[3]; - u8 type; - u8 subtype; - u8 version; - u8 qosinfo; - u8 rsvd; - edcf_acparam_t acparam[AC_COUNT]; -} __attribute__((packed)); -typedef struct wme_param_ie wme_param_ie_t; - -/* virtual interface */ -struct wlc_if { - struct wlc_if *next; - u8 type; /* WLC_IFTYPE_BSS or WLC_IFTYPE_WDS */ - u8 index; /* assigned in wl_add_if(), index of the wlif if any, - * not necessarily corresponding to bsscfg._idx or - * AID2PVBMAP(scb). - */ - u8 flags; /* flags for the interface */ - struct brcms_if *wlif; /* pointer to wlif */ - struct wlc_txq_info *qi; /* pointer to associated tx queue */ - union { - struct scb *scb; /* pointer to scb if WLC_IFTYPE_WDS */ - struct wlc_bsscfg *bsscfg; /* pointer to bsscfg if WLC_IFTYPE_BSS */ - } u; -}; - -/* flags for the interface, this interface is linked to a brcms_if */ -#define WLC_IF_LINKED 0x02 - -struct wlc_hwband { - int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ - uint bandunit; /* bandstate[] index */ - u16 mhfs[MHFMAX]; /* MHF array shadow */ - u8 bandhw_stf_ss_mode; /* HW configured STF type, 0:siso; 1:cdd */ - u16 CWmin; - u16 CWmax; - u32 core_flags; - - u16 phytype; /* phytype */ - u16 phyrev; - u16 radioid; - u16 radiorev; - wlc_phy_t *pi; /* pointer to phy specific information */ - bool abgphy_encore; -}; - -struct wlc_hw_info { - bool _piomode; /* true if pio mode */ - struct wlc_info *wlc; - - /* fifo */ - struct dma_pub *di[NFIFO]; /* dma handles, per fifo */ - - uint unit; /* device instance number */ - - /* version info */ - u16 vendorid; /* PCI vendor id */ - u16 deviceid; /* PCI device id */ - uint corerev; /* core revision */ - u8 sromrev; /* version # of the srom */ - u16 boardrev; /* version # of particular board */ - u32 boardflags; /* Board specific flags from srom */ - u32 boardflags2; /* More board flags if sromrev >= 4 */ - u32 machwcap; /* MAC capabilities */ - u32 machwcap_backup; /* backup of machwcap */ - u16 ucode_dbgsel; /* dbgsel for ucode debug(config gpio) */ - - struct si_pub *sih; /* SI handle (cookie for siutils calls) */ - char *vars; /* "environment" name=value */ - uint vars_size; /* size of vars, free vars on detach */ - d11regs_t *regs; /* pointer to device registers */ - void *physhim; /* phy shim layer handler */ - void *phy_sh; /* pointer to shared phy state */ - struct wlc_hwband *band;/* pointer to active per-band state */ - struct wlc_hwband *bandstate[MAXBANDS];/* band state per phy/radio */ - u16 bmac_phytxant; /* cache of high phytxant state */ - bool shortslot; /* currently using 11g ShortSlot timing */ - u16 SRL; /* 802.11 dot11ShortRetryLimit */ - u16 LRL; /* 802.11 dot11LongRetryLimit */ - u16 SFBL; /* Short Frame Rate Fallback Limit */ - u16 LFBL; /* Long Frame Rate Fallback Limit */ - - bool up; /* d11 hardware up and running */ - uint now; /* # elapsed seconds */ - uint _nbands; /* # bands supported */ - chanspec_t chanspec; /* bmac chanspec shadow */ - - uint *txavail[NFIFO]; /* # tx descriptors available */ - u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */ - - mbool pllreq; /* pll requests to keep PLL on */ - - u8 suspended_fifos; /* Which TX fifo to remain awake for */ - u32 maccontrol; /* Cached value of maccontrol */ - uint mac_suspend_depth; /* current depth of mac_suspend levels */ - u32 wake_override; /* Various conditions to force MAC to WAKE mode */ - u32 mute_override; /* Prevent ucode from sending beacons */ - u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */ - u32 led_gpio_mask; /* LED GPIO Mask */ - bool noreset; /* true= do not reset hw, used by WLC_OUT */ - bool forcefastclk; /* true if the h/w is forcing the use of fast clk */ - bool clk; /* core is out of reset and has clock */ - bool sbclk; /* sb has clock */ - struct bmac_pmq *bmac_pmq; /* bmac PM states derived from ucode PMQ */ - bool phyclk; /* phy is out of reset and has clock */ - bool dma_lpbk; /* core is in DMA loopback */ - - bool ucode_loaded; /* true after ucode downloaded */ - - - u8 hw_stf_ss_opmode; /* STF single stream operation mode */ - u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic - * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board - */ - u32 antsel_avail; /* - * put struct antsel_info here if more info is - * needed - */ -}; - -/* TX Queue information - * - * Each flow of traffic out of the device has a TX Queue with independent - * flow control. Several interfaces may be associated with a single TX Queue - * if they belong to the same flow of traffic from the device. For multi-channel - * operation there are independent TX Queues for each channel. - */ -struct wlc_txq_info { - struct wlc_txq_info *next; - struct pktq q; - uint stopped; /* tx flow control bits */ -}; - -/* - * Principal common (os-independent) software data structure. - */ -struct wlc_info { - struct wlc_pub *pub; /* pointer to wlc public state */ - struct brcms_info *wl; /* pointer to os-specific private state */ - d11regs_t *regs; /* pointer to device registers */ - - struct wlc_hw_info *hw; /* HW related state used primarily by BMAC */ - - /* clock */ - int clkreq_override; /* setting for clkreq for PCIE : Auto, 0, 1 */ - u16 fastpwrup_dly; /* time in us needed to bring up d11 fast clock */ - - /* interrupt */ - u32 macintstatus; /* bit channel between isr and dpc */ - u32 macintmask; /* sw runtime master macintmask value */ - u32 defmacintmask; /* default "on" macintmask value */ - - /* up and down */ - bool device_present; /* (removable) device is present */ - - bool clk; /* core is out of reset and has clock */ - - /* multiband */ - struct wlccore *core; /* pointer to active io core */ - struct wlcband *band; /* pointer to active per-band state */ - struct wlccore *corestate; /* per-core state (one per hw core) */ - /* per-band state (one per phy/radio): */ - struct wlcband *bandstate[MAXBANDS]; - - bool war16165; /* PCI slow clock 16165 war flag */ - - bool tx_suspended; /* data fifos need to remain suspended */ - - uint txpend16165war; - - /* packet queue */ - uint qvalid; /* DirFrmQValid and BcMcFrmQValid */ - - /* Regulatory power limits */ - s8 txpwr_local_max; /* regulatory local txpwr max */ - u8 txpwr_local_constraint; /* local power contraint in dB */ - - - struct ampdu_info *ampdu; /* ampdu module handler */ - struct antsel_info *asi; /* antsel module handler */ - wlc_cm_info_t *cmi; /* channel manager module handler */ - - uint vars_size; /* size of vars, free vars on detach */ - - u16 vendorid; /* PCI vendor id */ - u16 deviceid; /* PCI device id */ - uint ucode_rev; /* microcode revision */ - - u32 machwcap; /* MAC capabilities, BMAC shadow */ - - u8 perm_etheraddr[ETH_ALEN]; /* original sprom local ethernet address */ - - bool bandlocked; /* disable auto multi-band switching */ - bool bandinit_pending; /* track band init in auto band */ - - bool radio_monitor; /* radio timer is running */ - bool going_down; /* down path intermediate variable */ - - bool mpc; /* enable minimum power consumption */ - u8 mpc_dlycnt; /* # of watchdog cnt before turn disable radio */ - u8 mpc_offcnt; /* # of watchdog cnt that radio is disabled */ - u8 mpc_delay_off; /* delay radio disable by # of watchdog cnt */ - u8 prev_non_delay_mpc; /* prev state wlc_is_non_delay_mpc */ - - /* timer for watchdog routine */ - struct brcms_timer *wdtimer; - /* timer for hw radio button monitor routine */ - struct brcms_timer *radio_timer; - - /* promiscuous */ - bool monitor; /* monitor (MPDU sniffing) mode */ - bool bcnmisc_ibss; /* bcns promisc mode override for IBSS */ - bool bcnmisc_scan; /* bcns promisc mode override for scan */ - bool bcnmisc_monitor; /* bcns promisc mode override for monitor */ - - /* driver feature */ - bool _rifs; /* enable per-packet rifs */ - s8 sgi_tx; /* sgi tx */ - - /* AP-STA synchronization, power save */ - u8 bcn_li_bcn; /* beacon listen interval in # beacons */ - u8 bcn_li_dtim; /* beacon listen interval in # dtims */ - - bool WDarmed; /* watchdog timer is armed */ - u32 WDlast; /* last time wlc_watchdog() was called */ - - /* WME */ - ac_bitmap_t wme_dp; /* Discard (oldest first) policy per AC */ - u16 edcf_txop[AC_COUNT]; /* current txop for each ac */ - wme_param_ie_t wme_param_ie; /* WME parameter info element, which on STA - * contains parameters in use locally, and on - * AP contains parameters advertised to STA - * in beacons and assoc responses. - */ - u16 wme_retries[AC_COUNT]; /* per-AC retry limits */ - - u16 tx_prec_map; /* Precedence map based on HW FIFO space */ - u16 fifo2prec_map[NFIFO]; /* pointer to fifo2_prec map based on WME */ - - /* - * BSS Configurations set of BSS configurations, idx 0 is default and - * always valid - */ - struct wlc_bsscfg *bsscfg[WLC_MAXBSSCFG]; - struct wlc_bsscfg *cfg; /* the primary bsscfg (can be AP or STA) */ - - /* tx queue */ - struct wlc_txq_info *tx_queues; /* common TX Queue list */ - - /* security */ - wsec_key_t *wsec_keys[WSEC_MAX_KEYS]; /* dynamic key storage */ - wsec_key_t *wsec_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ - bool wsec_swkeys; /* indicates that all keys should be - * treated as sw keys (used for debugging) - */ - struct modulecb *modulecb; - - u8 mimoft; /* SIGN or 11N */ - s8 cck_40txbw; /* 11N, cck tx b/w override when in 40MHZ mode */ - s8 ofdm_40txbw; /* 11N, ofdm tx b/w override when in 40MHZ mode */ - s8 mimo_40txbw; /* 11N, mimo tx b/w override when in 40MHZ mode */ - /* HT CAP IE being advertised by this node: */ - struct ieee80211_ht_cap ht_cap; - - wlc_bss_info_t *default_bss; /* configured BSS parameters */ - - u16 mc_fid_counter; /* BC/MC FIFO frame ID counter */ - - char country_default[WLC_CNTRY_BUF_SZ]; /* saved country for leaving 802.11d - * auto-country mode - */ - char autocountry_default[WLC_CNTRY_BUF_SZ]; /* initial country for 802.11d - * auto-country mode - */ - u16 prb_resp_timeout; /* do not send prb resp if request older than this, - * 0 = disable - */ - - wlc_rateset_t sup_rates_override; /* use only these rates in 11g supported rates if - * specifed - */ - - chanspec_t home_chanspec; /* shared home chanspec */ - - /* PHY parameters */ - chanspec_t chanspec; /* target operational channel */ - u16 usr_fragthresh; /* user configured fragmentation threshold */ - u16 fragthresh[NFIFO]; /* per-fifo fragmentation thresholds */ - u16 RTSThresh; /* 802.11 dot11RTSThreshold */ - u16 SRL; /* 802.11 dot11ShortRetryLimit */ - u16 LRL; /* 802.11 dot11LongRetryLimit */ - u16 SFBL; /* Short Frame Rate Fallback Limit */ - u16 LFBL; /* Long Frame Rate Fallback Limit */ - - /* network config */ - bool shortslot; /* currently using 11g ShortSlot timing */ - s8 shortslot_override; /* 11g ShortSlot override */ - bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */ - - struct wlc_protection *protection; - s8 PLCPHdr_override; /* 802.11b Preamble Type override */ - - struct wlc_stf *stf; - - ratespec_t bcn_rspec; /* save bcn ratespec purpose */ - - uint tempsense_lasttime; - - u16 tx_duty_cycle_ofdm; /* maximum allowed duty cycle for OFDM */ - u16 tx_duty_cycle_cck; /* maximum allowed duty cycle for CCK */ - - u16 next_bsscfg_ID; - - struct wlc_txq_info *pkt_queue; /* txq for transmit packets */ - u32 mpc_dur; /* total time (ms) in mpc mode except for the - * portion since radio is turned off last time - */ - u32 mpc_laston_ts; /* timestamp (ms) when radio is turned off last - * time - */ - struct wiphy *wiphy; -}; - -/* antsel module specific state */ -struct antsel_info { - struct wlc_info *wlc; /* pointer to main wlc structure */ - struct wlc_pub *pub; /* pointer to public fn */ - u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic - * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board - */ - u8 antsel_antswitch; /* board level antenna switch type */ - bool antsel_avail; /* Ant selection availability (SROM based) */ - wlc_antselcfg_t antcfg_11n; /* antenna configuration */ - wlc_antselcfg_t antcfg_cur; /* current antenna config (auto) */ -}; - -#define CHANNEL_BANDUNIT(wlc, ch) (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX) -#define OTHERBANDUNIT(wlc) ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX)) - -#define IS_MBAND_UNLOCKED(wlc) \ - ((NBANDS(wlc) > 1) && !(wlc)->bandlocked) - -#define WLC_BAND_PI_RADIO_CHANSPEC wlc_phy_chanspec_get(wlc->band->pi) - -/* sum the individual fifo tx pending packet counts */ -#define TXPKTPENDTOT(wlc) ((wlc)->core->txpktpend[0] + (wlc)->core->txpktpend[1] + \ - (wlc)->core->txpktpend[2] + (wlc)->core->txpktpend[3]) -#define TXPKTPENDGET(wlc, fifo) ((wlc)->core->txpktpend[(fifo)]) -#define TXPKTPENDINC(wlc, fifo, val) ((wlc)->core->txpktpend[(fifo)] += (val)) -#define TXPKTPENDDEC(wlc, fifo, val) ((wlc)->core->txpktpend[(fifo)] -= (val)) -#define TXPKTPENDCLR(wlc, fifo) ((wlc)->core->txpktpend[(fifo)] = 0) -#define TXAVAIL(wlc, fifo) (*(wlc)->core->txavail[(fifo)]) -#define GETNEXTTXP(wlc, _queue) \ - dma_getnexttxp((wlc)->hw->di[(_queue)], DMA_RANGE_TRANSMITTED) - -#define WLC_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \ - ((len1 == len2) && !memcmp(ssid1, ssid2, len1)) - -extern void wlc_fatal_error(struct wlc_info *wlc); -extern void wlc_bmac_rpc_watchdog(struct wlc_info *wlc); -extern void wlc_recv(struct wlc_info *wlc, struct sk_buff *p); -extern bool wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2); -extern void wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, - bool commit, s8 txpktpend); -extern void wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend); -extern void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, - uint prec); -extern void wlc_info_init(struct wlc_info *wlc, int unit); -extern void wlc_print_txstatus(tx_status_t *txs); -extern int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks); -extern void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, - void *buf); -extern void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, - bool both); -extern void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit); -extern void wlc_reset_bmac_done(struct wlc_info *wlc); - -#if defined(BCMDBG) -extern void wlc_print_rxh(d11rxhdr_t *rxh); -extern void wlc_print_hdrs(struct wlc_info *wlc, const char *prefix, u8 *frame, - d11txh_t *txh, d11rxhdr_t *rxh, uint len); -extern void wlc_print_txdesc(d11txh_t *txh); -#else -#define wlc_print_txdesc(a) -#endif -#if defined(BCMDBG) -extern void wlc_print_dot11_mac_hdr(u8 *buf, int len); -#endif - -extern void wlc_setxband(struct wlc_hw_info *wlc_hw, uint bandunit); -extern void wlc_coredisable(struct wlc_hw_info *wlc_hw); - -extern bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rate, int band, - bool verbose); -extern void wlc_ap_upd(struct wlc_info *wlc); - -/* helper functions */ -extern void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg); -extern int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config); - -extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); -extern void wlc_mac_bcn_promisc(struct wlc_info *wlc); -extern void wlc_mac_promisc(struct wlc_info *wlc); -extern void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, int prio); -extern void wlc_txflowcontrol_override(struct wlc_info *wlc, - struct wlc_txq_info *qi, - bool on, uint override); -extern bool wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, - struct wlc_txq_info *qi, int prio); -extern void wlc_send_q(struct wlc_info *wlc); -extern int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifo); - -extern u16 wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, - uint mac_len); -extern ratespec_t wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, - bool use_rspec, u16 mimo_ctlchbw); -extern u16 wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, - ratespec_t rts_rate, ratespec_t frame_rate, - u8 rts_preamble_type, - u8 frame_preamble_type, uint frame_len, - bool ba); - -extern void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs); -extern void wlc_inval_dma_pkts(struct wlc_hw_info *hw, - struct ieee80211_sta *sta, - void (*dma_callback_fn)); - -#if defined(BCMDBG) -extern void wlc_dump_ie(struct wlc_info *wlc, struct brcmu_tlv *ie, - struct brcmu_strbuf *b); -#endif - -extern void wlc_reprate_init(struct wlc_info *wlc); -extern void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg); - -/* Shared memory access */ -extern void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v); -extern u16 wlc_read_shm(struct wlc_info *wlc, uint offset); -extern void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, - int len); - -extern void wlc_update_beacon(struct wlc_info *wlc); -extern void wlc_bss_update_beacon(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg); - -extern void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend); -extern void wlc_bss_update_probe_resp(struct wlc_info *wlc, - struct wlc_bsscfg *cfg, bool suspend); - -extern bool wlc_ismpc(struct wlc_info *wlc); -extern bool wlc_is_non_delay_mpc(struct wlc_info *wlc); -extern void wlc_radio_mpc_upd(struct wlc_info *wlc); -extern bool wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, - int prec); -extern bool wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, - struct sk_buff *pkt, int prec, bool head); -extern u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec); -extern void wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rate, uint length, - u8 *plcp); -extern uint wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, - u8 preamble_type, uint mac_len); - -extern void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec); - -extern bool wlc_timers_init(struct wlc_info *wlc, int unit); - -#if defined(BCMDBG) -extern void wlc_print_ies(struct wlc_info *wlc, u8 *ies, uint ies_len); -#endif - -extern int wlc_set_nmode(struct wlc_info *wlc, s32 nmode); -extern void wlc_mimops_action_ht_send(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg, - u8 mimops_mode); - -extern void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot); -extern void wlc_set_bssid(struct wlc_bsscfg *cfg); -extern void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend); - -extern void wlc_set_ratetable(struct wlc_info *wlc); -extern int wlc_set_mac(struct wlc_bsscfg *cfg); -extern void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, - ratespec_t bcn_rate); -extern void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len); -extern ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, - wlc_rateset_t *rs); -extern void wlc_radio_disable(struct wlc_info *wlc); -extern void wlc_bcn_li_upd(struct wlc_info *wlc); -extern void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec); -extern bool wlc_ps_allowed(struct wlc_info *wlc); -extern bool wlc_stay_awake(struct wlc_info *wlc); -extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe); - -#endif /* _BRCM_MAIN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c deleted file mode 100644 index 2745743..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/* - * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer. - * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY. - * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the - * access to wlc_hw pointer. - */ - -#include -#include - -#include -#include -#include -#include -#include -#include "bcmdma.h" -#include - -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "d11.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "bcmsrom.h" -#include "wlc_key.h" -#include "wlc_bmac.h" -#include "wlc_phy_hal.h" -#include "wlc_main.h" -#include "wlc_phy_shim.h" -#include "brcms_mac80211.h" - -/* PHY SHIM module specific state */ -struct wlc_phy_shim_info { - struct wlc_hw_info *wlc_hw; /* pointer to main wlc_hw structure */ - void *wlc; /* pointer to main wlc structure */ - void *wl; /* pointer to os-specific private state */ -}; - -wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, - void *wl, void *wlc) { - wlc_phy_shim_info_t *physhim = NULL; - - physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC); - if (!physhim) { - wiphy_err(wlc_hw->wlc->wiphy, - "wl%d: wlc_phy_shim_attach: out of mem\n", - wlc_hw->unit); - return NULL; - } - physhim->wlc_hw = wlc_hw; - physhim->wlc = wlc; - physhim->wl = wl; - - return physhim; -} - -void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim) -{ - kfree(physhim); -} - -struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, - void (*fn) (void *arg), void *arg, - const char *name) -{ - return (struct wlapi_timer *) - brcms_init_timer(physhim->wl, fn, arg, name); -} - -void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) -{ - brcms_free_timer(physhim->wl, (struct brcms_timer *)t); -} - -void -wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms, - int periodic) -{ - brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic); -} - -bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) -{ - return brcms_del_timer(physhim->wl, (struct brcms_timer *)t); -} - -void wlapi_intrson(wlc_phy_shim_info_t *physhim) -{ - brcms_intrson(physhim->wl); -} - -u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim) -{ - return brcms_intrsoff(physhim->wl); -} - -void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask) -{ - brcms_intrsrestore(physhim->wl, macintmask); -} - -void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v) -{ - wlc_bmac_write_shm(physhim->wlc_hw, offset, v); -} - -u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset) -{ - return wlc_bmac_read_shm(physhim->wlc_hw, offset); -} - -void -wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask, - u16 val, int bands) -{ - wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands); -} - -void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags) -{ - wlc_bmac_corereset(physhim->wlc_hw, flags); -} - -void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim) -{ - wlc_suspend_mac_and_wait(physhim->wlc); -} - -void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode) -{ - wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode); -} - -void wlapi_enable_mac(wlc_phy_shim_info_t *physhim) -{ - wlc_enable_mac(physhim->wlc); -} - -void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val) -{ - wlc_bmac_mctrl(physhim->wlc_hw, mask, val); -} - -void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim) -{ - wlc_bmac_phy_reset(physhim->wlc_hw); -} - -void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw) -{ - wlc_bmac_bw_set(physhim->wlc_hw, bw); -} - -u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim) -{ - return wlc_bmac_get_txant(physhim->wlc_hw); -} - -void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk) -{ - wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk); -} - -void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk) -{ - wlc_bmac_macphyclk_set(physhim->wlc_hw, clk); -} - -void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on) -{ - wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on); -} - -void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim) -{ - wlc_bmac_core_phypll_reset(physhim->wlc_hw); -} - -void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim) -{ - wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG); -} - -void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim) -{ - wlc_ucode_wake_override_clear(physhim->wlc_hw, - WLC_WAKE_OVERRIDE_PHYREG); -} - -void -wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset, - int len, void *buf) -{ - wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf); -} - -u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate) -{ - return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate); -} - -void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim) -{ -} - -void -wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf, - int len, u32 sel) -{ - wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel); -} - -void -wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf, - int l, u32 sel) -{ - wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h deleted file mode 100644 index 1677df2..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/* - * phy_shim.h: stuff defined in phy_shim.c and included only by the phy - */ - -#ifndef _BRCM_PHY_SHIM_H_ -#define _BRCM_PHY_SHIM_H_ - -#define RADAR_TYPE_NONE 0 /* Radar type None */ -#define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */ -#define RADAR_TYPE_ETSI_2 2 /* ETSI 2 Radar type */ -#define RADAR_TYPE_ETSI_3 3 /* ETSI 3 Radar type */ -#define RADAR_TYPE_ITU_E 4 /* ITU E Radar type */ -#define RADAR_TYPE_ITU_K 5 /* ITU K Radar type */ -#define RADAR_TYPE_UNCLASSIFIED 6 /* Unclassified Radar type */ -#define RADAR_TYPE_BIN5 7 /* long pulse radar type */ -#define RADAR_TYPE_STG2 8 /* staggered-2 radar */ -#define RADAR_TYPE_STG3 9 /* staggered-3 radar */ -#define RADAR_TYPE_FRA 10 /* French radar */ - -/* French radar pulse widths */ -#define FRA_T1_20MHZ 52770 -#define FRA_T2_20MHZ 61538 -#define FRA_T3_20MHZ 66002 -#define FRA_T1_40MHZ 105541 -#define FRA_T2_40MHZ 123077 -#define FRA_T3_40MHZ 132004 -#define FRA_ERR_20MHZ 60 -#define FRA_ERR_40MHZ 120 - -#define ANTSEL_NA 0 /* No boardlevel selection available */ -#define ANTSEL_2x4 1 /* 2x4 boardlevel selection available */ -#define ANTSEL_2x3 2 /* 2x3 CB2 boardlevel selection available */ - -/* Rx Antenna diversity control values */ -#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ -#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ -#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ -#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ -#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ -#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ - -#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ -#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ -#define WL_ANT_IDX_1 0 /* antenna index 1 */ -#define WL_ANT_IDX_2 1 /* antenna index 2 */ - -/* values for n_preamble_type */ -#define WLC_N_PREAMBLE_MIXEDMODE 0 -#define WLC_N_PREAMBLE_GF 1 -#define WLC_N_PREAMBLE_GF_BRCM 2 - -#define WL_TX_POWER_RATES_LEGACY 45 -#define WL_TX_POWER_MCS20_FIRST 12 -#define WL_TX_POWER_MCS20_NUM 16 -#define WL_TX_POWER_MCS40_FIRST 28 -#define WL_TX_POWER_MCS40_NUM 17 - - -#define WL_TX_POWER_RATES 101 -#define WL_TX_POWER_CCK_FIRST 0 -#define WL_TX_POWER_CCK_NUM 4 -#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM_NUM 8 -#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ -#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ -#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ -#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ -#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ -#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ -#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ -#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ -#define WL_TX_POWER_MCS_1_STREAM_NUM 8 -#define WL_TX_POWER_MCS_2_STREAM_NUM 8 -#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ -#define WL_TX_POWER_MCS_32_NUM 1 - -/* sslpnphy specifics */ -#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ - -/* tx_power_t.flags bits */ -#define WL_TX_POWER_F_ENABLED 1 -#define WL_TX_POWER_F_HW 2 -#define WL_TX_POWER_F_MIMO 4 -#define WL_TX_POWER_F_SISO 8 - -/* values to force tx/rx chain */ -#define WLC_N_TXRX_CHAIN0 0 -#define WLC_N_TXRX_CHAIN1 1 - -/* Forward declarations */ -struct wlc_hw_info; -typedef struct wlc_phy_shim_info wlc_phy_shim_info_t; - -extern wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, - void *wl, void *wlc); -extern void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim); - -/* PHY to WL utility functions */ -struct wlapi_timer; -extern struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, - void (*fn) (void *arg), void *arg, - const char *name); -extern void wlapi_free_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t); -extern void wlapi_add_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t, uint ms, int periodic); -extern bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t); -extern void wlapi_intrson(wlc_phy_shim_info_t *physhim); -extern u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim); -extern void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, - u32 macintmask); - -extern void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, - u16 v); -extern u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset); -extern void wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, - u16 mask, u16 val, int bands); -extern void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags); -extern void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim); -extern void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode); -extern void wlapi_enable_mac(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, - u32 val); -extern void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw); -extern void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk); -extern void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk); -extern void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on); -extern void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t * - physhim); -extern void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t * - physhim); -extern void wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int o, - int len, void *buf); -extern u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, - u8 rate); -extern void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim); -extern void wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint, - void *buf, int, u32 sel); -extern void wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint, - const void *buf, int, u32); - -extern void wlapi_high_update_phy_mode(wlc_phy_shim_info_t *physhim, - u32 phy_mode); -extern u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim); -#endif /* _BRCM_PHY_SHIM_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c deleted file mode 100644 index 720839b..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ /dev/null @@ -1,2397 +0,0 @@ -/* - * Copyright (c) 2011 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include -#include -#include - -#include -#include "wlc_types.h" -#include -#include -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_pmu.h" - -/* - * d11 slow to fast clock transition time in slow clock cycles - */ -#define D11SCC_SLOW2FAST_TRANSITION 2 - -/* - * external LPO crystal frequency - */ -#define EXT_ILP_HZ 32768 - -/* - * Duration for ILP clock frequency measurment in milliseconds - * - * remark: 1000 must be an integer multiple of this duration - */ -#define ILP_CALC_DUR 10 - -/* - * FVCO frequency - */ -#define FVCO_880 880000 /* 880MHz */ -#define FVCO_1760 1760000 /* 1760MHz */ -#define FVCO_1440 1440000 /* 1440MHz */ -#define FVCO_960 960000 /* 960MHz */ - -/* - * PMU crystal table indices for 1440MHz fvco - */ -#define PMU1_XTALTAB0_1440_12000K 0 -#define PMU1_XTALTAB0_1440_13000K 1 -#define PMU1_XTALTAB0_1440_14400K 2 -#define PMU1_XTALTAB0_1440_15360K 3 -#define PMU1_XTALTAB0_1440_16200K 4 -#define PMU1_XTALTAB0_1440_16800K 5 -#define PMU1_XTALTAB0_1440_19200K 6 -#define PMU1_XTALTAB0_1440_19800K 7 -#define PMU1_XTALTAB0_1440_20000K 8 -#define PMU1_XTALTAB0_1440_25000K 9 -#define PMU1_XTALTAB0_1440_26000K 10 -#define PMU1_XTALTAB0_1440_30000K 11 -#define PMU1_XTALTAB0_1440_37400K 12 -#define PMU1_XTALTAB0_1440_38400K 13 -#define PMU1_XTALTAB0_1440_40000K 14 -#define PMU1_XTALTAB0_1440_48000K 15 - -/* - * PMU crystal table indices for 960MHz fvco - */ -#define PMU1_XTALTAB0_960_12000K 0 -#define PMU1_XTALTAB0_960_13000K 1 -#define PMU1_XTALTAB0_960_14400K 2 -#define PMU1_XTALTAB0_960_15360K 3 -#define PMU1_XTALTAB0_960_16200K 4 -#define PMU1_XTALTAB0_960_16800K 5 -#define PMU1_XTALTAB0_960_19200K 6 -#define PMU1_XTALTAB0_960_19800K 7 -#define PMU1_XTALTAB0_960_20000K 8 -#define PMU1_XTALTAB0_960_25000K 9 -#define PMU1_XTALTAB0_960_26000K 10 -#define PMU1_XTALTAB0_960_30000K 11 -#define PMU1_XTALTAB0_960_37400K 12 -#define PMU1_XTALTAB0_960_38400K 13 -#define PMU1_XTALTAB0_960_40000K 14 -#define PMU1_XTALTAB0_960_48000K 15 - -/* - * PMU crystal table indices for 880MHz fvco - */ -#define PMU1_XTALTAB0_880_12000K 0 -#define PMU1_XTALTAB0_880_13000K 1 -#define PMU1_XTALTAB0_880_14400K 2 -#define PMU1_XTALTAB0_880_15360K 3 -#define PMU1_XTALTAB0_880_16200K 4 -#define PMU1_XTALTAB0_880_16800K 5 -#define PMU1_XTALTAB0_880_19200K 6 -#define PMU1_XTALTAB0_880_19800K 7 -#define PMU1_XTALTAB0_880_20000K 8 -#define PMU1_XTALTAB0_880_24000K 9 -#define PMU1_XTALTAB0_880_25000K 10 -#define PMU1_XTALTAB0_880_26000K 11 -#define PMU1_XTALTAB0_880_30000K 12 -#define PMU1_XTALTAB0_880_37400K 13 -#define PMU1_XTALTAB0_880_38400K 14 -#define PMU1_XTALTAB0_880_40000K 15 - -/* - * crystal frequency values - */ -#define XTAL_FREQ_24000MHZ 24000 -#define XTAL_FREQ_30000MHZ 30000 -#define XTAL_FREQ_37400MHZ 37400 -#define XTAL_FREQ_48000MHZ 48000 - -/* - * Resource dependancies mask change action - * - * @RES_DEPEND_SET: Override the dependancies mask - * @RES_DEPEND_ADD: Add to the dependancies mask - * @RES_DEPEND_REMOVE: Remove from the dependancies mask - */ -#define RES_DEPEND_SET 0 -#define RES_DEPEND_ADD 1 -#define RES_DEPEND_REMOVE -1 - -/* Fields in pmucontrol */ -#define PCTL_ILP_DIV_MASK 0xffff0000 -#define PCTL_ILP_DIV_SHIFT 16 -#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ -#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ -#define PCTL_HT_REQ_EN 0x00000100 -#define PCTL_ALP_REQ_EN 0x00000080 -#define PCTL_XTALFREQ_MASK 0x0000007c -#define PCTL_XTALFREQ_SHIFT 2 -#define PCTL_ILP_DIV_EN 0x00000002 -#define PCTL_LPO_SEL 0x00000001 - -/* Fields in clkstretch */ -#define CSTRETCH_HT 0xffff0000 -#define CSTRETCH_ALP 0x0000ffff - -/* d11 slow to fast clock transition time in slow clock cycles */ -#define D11SCC_SLOW2FAST_TRANSITION 2 - -/* ILP clock */ -#define ILP_CLOCK 32000 - -/* ALP clock on pre-PMU chips */ -#define ALP_CLOCK 20000000 - -/* HT clock */ -#define HT_CLOCK 80000000 - -#define OTPS_READY 0x00001000 - -/* pmustatus */ -#define PST_EXTLPOAVAIL 0x0100 -#define PST_WDRESET 0x0080 -#define PST_INTPEND 0x0040 -#define PST_SBCLKST 0x0030 -#define PST_SBCLKST_ILP 0x0010 -#define PST_SBCLKST_ALP 0x0020 -#define PST_SBCLKST_HT 0x0030 -#define PST_ALPAVAIL 0x0008 -#define PST_HTAVAIL 0x0004 -#define PST_RESINIT 0x0003 - -/* PMU Resource Request Timer registers */ -/* This is based on PmuRev0 */ -#define PRRT_TIME_MASK 0x03ff -#define PRRT_INTEN 0x0400 -#define PRRT_REQ_ACTIVE 0x0800 -#define PRRT_ALP_REQ 0x1000 -#define PRRT_HT_REQ 0x2000 - -/* PMU resource bit position */ -#define PMURES_BIT(bit) (1 << (bit)) - -/* PMU resource number limit */ -#define PMURES_MAX_RESNUM 30 - -/* PMU chip control0 register */ -#define PMU_CHIPCTL0 0 - -/* PMU chip control1 register */ -#define PMU_CHIPCTL1 1 -#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 - -#define PMU_CC1_IF_TYPE_MASK 0x00000030 -#define PMU_CC1_IF_TYPE_RMII 0x00000000 -#define PMU_CC1_IF_TYPE_MII 0x00000010 -#define PMU_CC1_IF_TYPE_RGMII 0x00000020 - -#define PMU_CC1_SW_TYPE_MASK 0x000000c0 -#define PMU_CC1_SW_TYPE_EPHY 0x00000000 -#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 -#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 -#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 - -/* PMU corerev and chip specific PLL controls. - * PMU_PLL_XX where is PMU corerev and is an arbitrary number - * to differentiate different PLLs controlled by the same PMU rev. - */ -/* pllcontrol registers */ -/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */ -#define PMU0_PLL0_PLLCTL0 0 -#define PMU0_PLL0_PC0_PDIV_MASK 1 -#define PMU0_PLL0_PC0_PDIV_FREQ 25000 -#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 -#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 -#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 - -/* PC0_DIV_ARM for PLLOUT_ARM */ -#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 -#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 -#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 -#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */ -#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 -#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 -#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 -#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 - -/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */ -#define PMU0_PLL0_PLLCTL1 1 -#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 -#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 -#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 -#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 -#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 - -/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */ -#define PMU0_PLL0_PLLCTL2 2 -#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf -#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 - -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ -#define PMU1_PLL0_PLLCTL0 0 -#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 -#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 -#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 -#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 - -/* mdiv */ -#define PMU1_PLL0_PLLCTL1 1 -#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff -#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 -#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 -#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 -#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 -#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 -#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 - -#define PMU1_PLL0_CHIPCTL0 0 -#define PMU1_PLL0_CHIPCTL1 1 -#define PMU1_PLL0_CHIPCTL2 2 - -#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 -#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) -#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) - -/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU1_PLL0_PLLCTL2 2 -#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff -#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 -#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 -#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 -#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 -#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */ -#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU1_PLL0_PLLCTL3 3 -#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU1_PLL0_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch */ -#define PMU1_PLL0_PLLCTL5 5 -#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 -#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 - -/* PMU rev 2 control words */ -#define PMU2_PHY_PLL_PLLCTL 4 -#define PMU2_SI_PLL_PLLCTL 10 - -/* PMU rev 2 */ -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch, refcomp_pwrdn, dly_ch, p1div, p2div, _bypass_sdmod */ -#define PMU2_PLL_PLLCTL0 0 -#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 -#define PMU2_PLL_PC0_P1DIV_SHIFT 20 -#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 -#define PMU2_PLL_PC0_P2DIV_SHIFT 24 - -/* mdiv */ -#define PMU2_PLL_PLLCTL1 1 -#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff -#define PMU2_PLL_PC1_M1DIV_SHIFT 0 -#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC1_M2DIV_SHIFT 8 -#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 -#define PMU2_PLL_PC1_M3DIV_SHIFT 16 -#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 -#define PMU2_PLL_PC1_M4DIV_SHIFT 24 - -/* mdiv, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU2_PLL_PLLCTL2 2 -#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff -#define PMU2_PLL_PC2_M5DIV_SHIFT 0 -#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC2_M6DIV_SHIFT 8 -#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 -#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU2_PLL_PLLCTL3 3 -#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU2_PLL_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch */ -#define PMU2_PLL_PLLCTL5 5 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 - -/* PMU rev 5 (& 6) */ -#define PMU5_PLL_P1P2_OFF 0 -#define PMU5_PLL_P1_MASK 0x0f000000 -#define PMU5_PLL_P1_SHIFT 24 -#define PMU5_PLL_P2_MASK 0x00f00000 -#define PMU5_PLL_P2_SHIFT 20 -#define PMU5_PLL_M14_OFF 1 -#define PMU5_PLL_MDIV_MASK 0x000000ff -#define PMU5_PLL_MDIV_WIDTH 8 -#define PMU5_PLL_NM5_OFF 2 -#define PMU5_PLL_NDIV_MASK 0xfff00000 -#define PMU5_PLL_NDIV_SHIFT 20 -#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 -#define PMU5_PLL_NDIV_MODE_SHIFT 17 -#define PMU5_PLL_FMAB_OFF 3 -#define PMU5_PLL_MRAT_MASK 0xf0000000 -#define PMU5_PLL_MRAT_SHIFT 28 -#define PMU5_PLL_ABRAT_MASK 0x08000000 -#define PMU5_PLL_ABRAT_SHIFT 27 -#define PMU5_PLL_FDIV_MASK 0x07ffffff -#define PMU5_PLL_PLLCTL_OFF 4 -#define PMU5_PLL_PCHI_OFF 5 -#define PMU5_PLL_PCHI_MASK 0x0000003f - -/* pmu XtalFreqRatio */ -#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF -#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 -#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 - -/* Divider allocation in 4716/47162/5356/5357 */ -#define PMU5_MAINPLL_CPU 1 -#define PMU5_MAINPLL_MEM 2 -#define PMU5_MAINPLL_SI 3 - -#define PMU7_PLL_PLLCTL7 7 -#define PMU7_PLL_PLLCTL8 8 -#define PMU7_PLL_PLLCTL11 11 - -/* PLL usage in 4716/47162 */ -#define PMU4716_MAINPLL_PLL0 12 - -/* PLL usage in 5356/5357 */ -#define PMU5356_MAINPLL_PLL0 0 -#define PMU5357_MAINPLL_PLL0 0 - -/* 4328 resources */ -#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */ -#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */ -#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */ -#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ -#define RES4328_ILP_REQUEST 4 /* 0x00010 */ -#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */ -#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */ -#define RES4328_ROM_SWITCH 7 /* 0x00080 */ -#define RES4328_PA_REF_LDO 8 /* 0x00100 */ -#define RES4328_RADIO_LDO 9 /* 0x00200 */ -#define RES4328_AFE_LDO 10 /* 0x00400 */ -#define RES4328_PLL_LDO 11 /* 0x00800 */ -#define RES4328_BG_FILTBYP 12 /* 0x01000 */ -#define RES4328_TX_FILTBYP 13 /* 0x02000 */ -#define RES4328_RX_FILTBYP 14 /* 0x04000 */ -#define RES4328_XTAL_PU 15 /* 0x08000 */ -#define RES4328_XTAL_EN 16 /* 0x10000 */ -#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */ -#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */ -#define RES4328_BB_PLL_PU 19 /* 0x80000 */ - -/* 4325 A0/A1 resources */ -#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */ -#define RES4325_CBUCK_BURST 1 /* 0x00000002 */ -#define RES4325_CBUCK_PWM 2 /* 0x00000004 */ -#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */ -#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */ -#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */ -#define RES4325_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4325_ABUCK_BURST 7 /* 0x00000080 */ -#define RES4325_ABUCK_PWM 8 /* 0x00000100 */ -#define RES4325_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4325_OTP_PU 10 /* 0x00000400 */ -#define RES4325_LNLDO3_PU 11 /* 0x00000800 */ -#define RES4325_LNLDO4_PU 12 /* 0x00001000 */ -#define RES4325_XTAL_PU 13 /* 0x00002000 */ -#define RES4325_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4325_HT_AVAIL 21 /* 0x00200000 */ - -/* 4325 B0/C0 resources */ -#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4325B0_CLDO_PU 4 /* 0x00000010 */ - -/* 4325 C1 resources */ -#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */ - -#define RES4329_RESERVED0 0 /* 0x00000001 */ -#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4329_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4329_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4329_CLDO_PU 4 /* 0x00000010 */ -#define RES4329_PALDO_PU 5 /* 0x00000020 */ -#define RES4329_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4329_RESERVED7 7 /* 0x00000080 */ -#define RES4329_RESERVED8 8 /* 0x00000100 */ -#define RES4329_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4329_OTP_PU 10 /* 0x00000400 */ -#define RES4329_RESERVED11 11 /* 0x00000800 */ -#define RES4329_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4329_XTAL_PU 13 /* 0x00002000 */ -#define RES4329_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4329_HT_AVAIL 21 /* 0x00200000 */ - -/* 4315 resources */ -#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4315_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4315_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4315_CLDO_PU 4 /* 0x00000010 */ -#define RES4315_PALDO_PU 5 /* 0x00000020 */ -#define RES4315_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4315_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4315_OTP_PU 10 /* 0x00000400 */ -#define RES4315_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4315_XTAL_PU 13 /* 0x00002000 */ -#define RES4315_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4315_HT_AVAIL 21 /* 0x00200000 */ - -/* 4319 resources */ -#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4319_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4319_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4319_CLDO_PU 4 /* 0x00000010 */ -#define RES4319_PALDO_PU 5 /* 0x00000020 */ -#define RES4319_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4319_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4319_OTP_PU 10 /* 0x00000400 */ -#define RES4319_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4319_XTAL_PU 13 /* 0x00002000 */ -#define RES4319_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4319_HT_AVAIL 21 /* 0x00200000 */ - -#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 -#define CCTL_4319USB_XTAL_SEL_SHIFT 19 -#define CCTL_4319USB_48MHZ_PLL_SEL 1 -#define CCTL_4319USB_24MHZ_PLL_SEL 2 - -/* PMU resources for 4336 */ -#define RES4336_CBUCK_LPOM 0 -#define RES4336_CBUCK_BURST 1 -#define RES4336_CBUCK_LP_PWM 2 -#define RES4336_CBUCK_PWM 3 -#define RES4336_CLDO_PU 4 -#define RES4336_DIS_INT_RESET_PD 5 -#define RES4336_ILP_REQUEST 6 -#define RES4336_LNLDO_PU 7 -#define RES4336_LDO3P3_PU 8 -#define RES4336_OTP_PU 9 -#define RES4336_XTAL_PU 10 -#define RES4336_ALP_AVAIL 11 -#define RES4336_RADIO_PU 12 -#define RES4336_BG_PU 13 -#define RES4336_VREG1p4_PU_PU 14 -#define RES4336_AFE_PWRSW_PU 15 -#define RES4336_RX_PWRSW_PU 16 -#define RES4336_TX_PWRSW_PU 17 -#define RES4336_BB_PWRSW_PU 18 -#define RES4336_SYNTH_PWRSW_PU 19 -#define RES4336_MISC_PWRSW_PU 20 -#define RES4336_LOGEN_PWRSW_PU 21 -#define RES4336_BBPLL_PWRSW_PU 22 -#define RES4336_MACPHY_CLKAVAIL 23 -#define RES4336_HT_AVAIL 24 -#define RES4336_RSVD 25 - -/* 4330 resources */ -#define RES4330_CBUCK_LPOM 0 -#define RES4330_CBUCK_BURST 1 -#define RES4330_CBUCK_LP_PWM 2 -#define RES4330_CBUCK_PWM 3 -#define RES4330_CLDO_PU 4 -#define RES4330_DIS_INT_RESET_PD 5 -#define RES4330_ILP_REQUEST 6 -#define RES4330_LNLDO_PU 7 -#define RES4330_LDO3P3_PU 8 -#define RES4330_OTP_PU 9 -#define RES4330_XTAL_PU 10 -#define RES4330_ALP_AVAIL 11 -#define RES4330_RADIO_PU 12 -#define RES4330_BG_PU 13 -#define RES4330_VREG1p4_PU_PU 14 -#define RES4330_AFE_PWRSW_PU 15 -#define RES4330_RX_PWRSW_PU 16 -#define RES4330_TX_PWRSW_PU 17 -#define RES4330_BB_PWRSW_PU 18 -#define RES4330_SYNTH_PWRSW_PU 19 -#define RES4330_MISC_PWRSW_PU 20 -#define RES4330_LOGEN_PWRSW_PU 21 -#define RES4330_BBPLL_PWRSW_PU 22 -#define RES4330_MACPHY_CLKAVAIL 23 -#define RES4330_HT_AVAIL 24 -#define RES4330_5gRX_PWRSW_PU 25 -#define RES4330_5gTX_PWRSW_PU 26 -#define RES4330_5g_LOGEN_PWRSW_PU 27 - -/* 4313 resources */ -#define RES4313_BB_PU_RSRC 0 -#define RES4313_ILP_REQ_RSRC 1 -#define RES4313_XTAL_PU_RSRC 2 -#define RES4313_ALP_AVAIL_RSRC 3 -#define RES4313_RADIO_PU_RSRC 4 -#define RES4313_BG_PU_RSRC 5 -#define RES4313_VREG1P4_PU_RSRC 6 -#define RES4313_AFE_PWRSW_RSRC 7 -#define RES4313_RX_PWRSW_RSRC 8 -#define RES4313_TX_PWRSW_RSRC 9 -#define RES4313_BB_PWRSW_RSRC 10 -#define RES4313_SYNTH_PWRSW_RSRC 11 -#define RES4313_MISC_PWRSW_RSRC 12 -#define RES4313_BB_PLL_PWRSW_RSRC 13 -#define RES4313_HT_AVAIL_RSRC 14 -#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 - -/* PMU resource up transition time in ILP cycles */ -#define PMURES_UP_TRANSITION 2 - -/* Setup resource up/down timers */ -typedef struct { - u8 resnum; - u16 updown; -} pmu_res_updown_t; - -/* Change resource dependancies masks */ -typedef struct { - u32 res_mask; /* resources (chip specific) */ - s8 action; /* action */ - u32 depend_mask; /* changes to the dependancies mask */ - /* action is taken when filter is NULL or return true: */ - bool(*filter) (struct si_pub *sih); -} pmu_res_depend_t; - -/* setup pll and query clock speed */ -typedef struct { - u16 fref; - u8 xf; - u8 p1div; - u8 p2div; - u8 ndiv_int; - u32 ndiv_frac; -} pmu1_xtaltab0_t; - -/* - * prototypes used in resource tables - */ -static bool si_pmu_res_depfltr_bb(struct si_pub *sih); -static bool si_pmu_res_depfltr_ncb(struct si_pub *sih); -static bool si_pmu_res_depfltr_paldo(struct si_pub *sih); -static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih); - -static const pmu_res_updown_t bcm4328a0_res_updown[] = { - { - RES4328_EXT_SWITCHER_PWM, 0x0101}, { - RES4328_BB_SWITCHER_PWM, 0x1f01}, { - RES4328_BB_SWITCHER_BURST, 0x010f}, { - RES4328_BB_EXT_SWITCHER_BURST, 0x0101}, { - RES4328_ILP_REQUEST, 0x0202}, { - RES4328_RADIO_SWITCHER_PWM, 0x0f01}, { - RES4328_RADIO_SWITCHER_BURST, 0x0f01}, { - RES4328_ROM_SWITCH, 0x0101}, { - RES4328_PA_REF_LDO, 0x0f01}, { - RES4328_RADIO_LDO, 0x0f01}, { - RES4328_AFE_LDO, 0x0f01}, { - RES4328_PLL_LDO, 0x0f01}, { - RES4328_BG_FILTBYP, 0x0101}, { - RES4328_TX_FILTBYP, 0x0101}, { - RES4328_RX_FILTBYP, 0x0101}, { - RES4328_XTAL_PU, 0x0101}, { - RES4328_XTAL_EN, 0xa001}, { - RES4328_BB_PLL_FILTBYP, 0x0101}, { - RES4328_RF_PLL_FILTBYP, 0x0101}, { - RES4328_BB_PLL_PU, 0x0701} -}; - -static const pmu_res_depend_t bcm4328a0_res_depend[] = { - /* Adjust ILP request resource not to force ext/BB switchers into burst mode */ - { - PMURES_BIT(RES4328_ILP_REQUEST), - RES_DEPEND_SET, - PMURES_BIT(RES4328_EXT_SWITCHER_PWM) | - PMURES_BIT(RES4328_BB_SWITCHER_PWM), NULL} -}; - -static const pmu_res_updown_t bcm4325a0_res_updown_qt[] = { - { - RES4325_HT_AVAIL, 0x0300}, { - RES4325_BBPLL_PWRSW_PU, 0x0101}, { - RES4325_RFPLL_PWRSW_PU, 0x0101}, { - RES4325_ALP_AVAIL, 0x0100}, { - RES4325_XTAL_PU, 0x1000}, { - RES4325_LNLDO1_PU, 0x0800}, { - RES4325_CLDO_CBUCK_PWM, 0x0101}, { - RES4325_CBUCK_PWM, 0x0803} -}; - -static const pmu_res_updown_t bcm4325a0_res_updown[] = { - { - RES4325_XTAL_PU, 0x1501} -}; - -static const pmu_res_depend_t bcm4325a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - remove BB BURST */ - { - PMURES_BIT(RES4325_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4325_BUCK_BOOST_BURST), NULL}, - /* Adjust ALP/HT Avail resource dependencies - bring up BB along if it is used. */ - { - PMURES_BIT(RES4325_ALP_AVAIL) | PMURES_BIT(RES4325_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4325_BUCK_BOOST_BURST) | - PMURES_BIT(RES4325_BUCK_BOOST_PWM), si_pmu_res_depfltr_bb}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4325_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4325_RX_PWRSW_PU) | - PMURES_BIT(RES4325_TX_PWRSW_PU) | - PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4325_AFE_PWRSW_PU), NULL}, - /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ - { - PMURES_BIT(RES4325_ILP_REQUEST) | - PMURES_BIT(RES4325_ABUCK_BURST) | - PMURES_BIT(RES4325_ABUCK_PWM) | - PMURES_BIT(RES4325_LNLDO1_PU) | - PMURES_BIT(RES4325C1_LNLDO2_PU) | - PMURES_BIT(RES4325_XTAL_PU) | - PMURES_BIT(RES4325_ALP_AVAIL) | - PMURES_BIT(RES4325_RX_PWRSW_PU) | - PMURES_BIT(RES4325_TX_PWRSW_PU) | - PMURES_BIT(RES4325_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4325_AFE_PWRSW_PU) | - PMURES_BIT(RES4325_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4325_HT_AVAIL), RES_DEPEND_REMOVE, - PMURES_BIT(RES4325B0_CBUCK_LPOM) | - PMURES_BIT(RES4325B0_CBUCK_BURST) | - PMURES_BIT(RES4325B0_CBUCK_PWM), si_pmu_res_depfltr_ncb} -}; - -static const pmu_res_updown_t bcm4315a0_res_updown_qt[] = { - { - RES4315_HT_AVAIL, 0x0101}, { - RES4315_XTAL_PU, 0x0100}, { - RES4315_LNLDO1_PU, 0x0100}, { - RES4315_PALDO_PU, 0x0100}, { - RES4315_CLDO_PU, 0x0100}, { - RES4315_CBUCK_PWM, 0x0100}, { - RES4315_CBUCK_BURST, 0x0100}, { - RES4315_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4315a0_res_updown[] = { - { - RES4315_XTAL_PU, 0x2501} -}; - -static const pmu_res_depend_t bcm4315a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - not need PALDO unless write */ - { - PMURES_BIT(RES4315_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_npaldo}, - /* Adjust ALP/HT Avail resource dependencies - bring up PALDO along if it is used. */ - { - PMURES_BIT(RES4315_ALP_AVAIL) | PMURES_BIT(RES4315_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_paldo}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4315_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4315_RX_PWRSW_PU) | - PMURES_BIT(RES4315_TX_PWRSW_PU) | - PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4315_AFE_PWRSW_PU), NULL}, - /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ - { - PMURES_BIT(RES4315_CLDO_PU) | PMURES_BIT(RES4315_ILP_REQUEST) | - PMURES_BIT(RES4315_LNLDO1_PU) | - PMURES_BIT(RES4315_OTP_PU) | - PMURES_BIT(RES4315_LNLDO2_PU) | - PMURES_BIT(RES4315_XTAL_PU) | - PMURES_BIT(RES4315_ALP_AVAIL) | - PMURES_BIT(RES4315_RX_PWRSW_PU) | - PMURES_BIT(RES4315_TX_PWRSW_PU) | - PMURES_BIT(RES4315_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4315_AFE_PWRSW_PU) | - PMURES_BIT(RES4315_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4315_HT_AVAIL), RES_DEPEND_REMOVE, - PMURES_BIT(RES4315_CBUCK_LPOM) | - PMURES_BIT(RES4315_CBUCK_BURST) | - PMURES_BIT(RES4315_CBUCK_PWM), si_pmu_res_depfltr_ncb} -}; - - /* 4329 specific. needs to come back this issue later */ -static const pmu_res_updown_t bcm4329_res_updown[] = { - { - RES4329_XTAL_PU, 0x1501} -}; - -static const pmu_res_depend_t bcm4329_res_depend[] = { - /* Adjust HT Avail resource dependencies */ - { - PMURES_BIT(RES4329_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4329_CBUCK_LPOM) | - PMURES_BIT(RES4329_CBUCK_BURST) | - PMURES_BIT(RES4329_CBUCK_PWM) | - PMURES_BIT(RES4329_CLDO_PU) | - PMURES_BIT(RES4329_PALDO_PU) | - PMURES_BIT(RES4329_LNLDO1_PU) | - PMURES_BIT(RES4329_XTAL_PU) | - PMURES_BIT(RES4329_ALP_AVAIL) | - PMURES_BIT(RES4329_RX_PWRSW_PU) | - PMURES_BIT(RES4329_TX_PWRSW_PU) | - PMURES_BIT(RES4329_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4329_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4329_AFE_PWRSW_PU) | - PMURES_BIT(RES4329_BBPLL_PWRSW_PU), NULL} -}; - -static const pmu_res_updown_t bcm4319a0_res_updown_qt[] = { - { - RES4319_HT_AVAIL, 0x0101}, { - RES4319_XTAL_PU, 0x0100}, { - RES4319_LNLDO1_PU, 0x0100}, { - RES4319_PALDO_PU, 0x0100}, { - RES4319_CLDO_PU, 0x0100}, { - RES4319_CBUCK_PWM, 0x0100}, { - RES4319_CBUCK_BURST, 0x0100}, { - RES4319_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4319a0_res_updown[] = { - { - RES4319_XTAL_PU, 0x3f01} -}; - -static const pmu_res_depend_t bcm4319a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - not need PALDO unless write */ - { - PMURES_BIT(RES4319_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_npaldo}, - /* Adjust HT Avail resource dependencies - bring up PALDO along if it is used. */ - { - PMURES_BIT(RES4319_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_paldo}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4319_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4319_RX_PWRSW_PU) | - PMURES_BIT(RES4319_TX_PWRSW_PU) | - PMURES_BIT(RES4319_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4319_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4319_AFE_PWRSW_PU), NULL} -}; - -static const pmu_res_updown_t bcm4336a0_res_updown_qt[] = { - { - RES4336_HT_AVAIL, 0x0101}, { - RES4336_XTAL_PU, 0x0100}, { - RES4336_CLDO_PU, 0x0100}, { - RES4336_CBUCK_PWM, 0x0100}, { - RES4336_CBUCK_BURST, 0x0100}, { - RES4336_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4336a0_res_updown[] = { - { - RES4336_HT_AVAIL, 0x0D01} -}; - -static const pmu_res_depend_t bcm4336a0_res_depend[] = { - /* Just a dummy entry for now */ - { - PMURES_BIT(RES4336_RSVD), RES_DEPEND_ADD, 0, NULL} -}; - -static const pmu_res_updown_t bcm4330a0_res_updown_qt[] = { - { - RES4330_HT_AVAIL, 0x0101}, { - RES4330_XTAL_PU, 0x0100}, { - RES4330_CLDO_PU, 0x0100}, { - RES4330_CBUCK_PWM, 0x0100}, { - RES4330_CBUCK_BURST, 0x0100}, { - RES4330_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4330a0_res_updown[] = { - { - RES4330_HT_AVAIL, 0x0e02} -}; - -static const pmu_res_depend_t bcm4330a0_res_depend[] = { - /* Just a dummy entry for now */ - { - PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL} -}; - -/* the following table is based on 1440Mhz fvco */ -static const pmu1_xtaltab0_t pmu1_xtaltab0_1440[] = { - { - 12000, 1, 1, 1, 0x78, 0x0}, { - 13000, 2, 1, 1, 0x6E, 0xC4EC4E}, { - 14400, 3, 1, 1, 0x64, 0x0}, { - 15360, 4, 1, 1, 0x5D, 0xC00000}, { - 16200, 5, 1, 1, 0x58, 0xE38E38}, { - 16800, 6, 1, 1, 0x55, 0xB6DB6D}, { - 19200, 7, 1, 1, 0x4B, 0}, { - 19800, 8, 1, 1, 0x48, 0xBA2E8B}, { - 20000, 9, 1, 1, 0x48, 0x0}, { - 25000, 10, 1, 1, 0x39, 0x999999}, { - 26000, 11, 1, 1, 0x37, 0x627627}, { - 30000, 12, 1, 1, 0x30, 0x0}, { - 37400, 13, 2, 1, 0x4D, 0x15E76}, { - 38400, 13, 2, 1, 0x4B, 0x0}, { - 40000, 14, 2, 1, 0x48, 0x0}, { - 48000, 15, 2, 1, 0x3c, 0x0}, { - 0, 0, 0, 0, 0, 0} -}; - -static const pmu1_xtaltab0_t pmu1_xtaltab0_960[] = { - { - 12000, 1, 1, 1, 0x50, 0x0}, { - 13000, 2, 1, 1, 0x49, 0xD89D89}, { - 14400, 3, 1, 1, 0x42, 0xAAAAAA}, { - 15360, 4, 1, 1, 0x3E, 0x800000}, { - 16200, 5, 1, 1, 0x39, 0x425ED0}, { - 16800, 6, 1, 1, 0x39, 0x249249}, { - 19200, 7, 1, 1, 0x32, 0x0}, { - 19800, 8, 1, 1, 0x30, 0x7C1F07}, { - 20000, 9, 1, 1, 0x30, 0x0}, { - 25000, 10, 1, 1, 0x26, 0x666666}, { - 26000, 11, 1, 1, 0x24, 0xEC4EC4}, { - 30000, 12, 1, 1, 0x20, 0x0}, { - 37400, 13, 2, 1, 0x33, 0x563EF9}, { - 38400, 14, 2, 1, 0x32, 0x0}, { - 40000, 15, 2, 1, 0x30, 0x0}, { - 48000, 16, 2, 1, 0x28, 0x0}, { - 0, 0, 0, 0, 0, 0} -}; - -static const pmu1_xtaltab0_t pmu1_xtaltab0_880_4329[] = { - { - 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { - 13000, 2, 1, 6, 0xb, 0x483483}, { - 14400, 3, 1, 10, 0xa, 0x1C71C7}, { - 15360, 4, 1, 5, 0xb, 0x755555}, { - 16200, 5, 1, 10, 0x5, 0x6E9E06}, { - 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { - 19200, 7, 1, 4, 0xb, 0x755555}, { - 19800, 8, 1, 11, 0x4, 0xA57EB}, { - 20000, 9, 1, 11, 0x4, 0x0}, { - 24000, 10, 3, 11, 0xa, 0x0}, { - 25000, 11, 5, 16, 0xb, 0x0}, { - 26000, 12, 1, 1, 0x21, 0xD89D89}, { - 30000, 13, 3, 8, 0xb, 0x0}, { - 37400, 14, 3, 1, 0x46, 0x969696}, { - 38400, 15, 1, 1, 0x16, 0xEAAAAA}, { - 40000, 16, 1, 2, 0xb, 0}, { - 0, 0, 0, 0, 0, 0} -}; - -/* the following table is based on 880Mhz fvco */ -static const pmu1_xtaltab0_t pmu1_xtaltab0_880[] = { - { - 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { - 13000, 2, 1, 6, 0xb, 0x483483}, { - 14400, 3, 1, 10, 0xa, 0x1C71C7}, { - 15360, 4, 1, 5, 0xb, 0x755555}, { - 16200, 5, 1, 10, 0x5, 0x6E9E06}, { - 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { - 19200, 7, 1, 4, 0xb, 0x755555}, { - 19800, 8, 1, 11, 0x4, 0xA57EB}, { - 20000, 9, 1, 11, 0x4, 0x0}, { - 24000, 10, 3, 11, 0xa, 0x0}, { - 25000, 11, 5, 16, 0xb, 0x0}, { - 26000, 12, 1, 2, 0x10, 0xEC4EC4}, { - 30000, 13, 3, 8, 0xb, 0x0}, { - 33600, 14, 1, 2, 0xd, 0x186186}, { - 38400, 15, 1, 2, 0xb, 0x755555}, { - 40000, 16, 1, 2, 0xb, 0}, { - 0, 0, 0, 0, 0, 0} -}; - -/* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ -static bool si_pmu_res_depfltr_bb(struct si_pub *sih) -{ - return (sih->boardflags & BFL_BUCKBOOST) != 0; -} - -/* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ -static bool si_pmu_res_depfltr_ncb(struct si_pub *sih) -{ - - return (sih->boardflags & BFL_NOCBUCK) != 0; -} - -/* true if the power topology uses the PALDO */ -static bool si_pmu_res_depfltr_paldo(struct si_pub *sih) -{ - return (sih->boardflags & BFL_PALDO) != 0; -} - -/* true if the power topology doesn't use the PALDO */ -static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih) -{ - return (sih->boardflags & BFL_PALDO) == 0; -} - -/* Return dependancies (direct or all/indirect) for the given resources */ -static u32 -si_pmu_res_deps(struct si_pub *sih, chipcregs_t *cc, u32 rsrcs, - bool all) -{ - u32 deps = 0; - u32 i; - - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(rsrcs & PMURES_BIT(i))) - continue; - W_REG(&cc->res_table_sel, i); - deps |= R_REG(&cc->res_dep_mask); - } - - return !all ? deps : (deps - ? (deps | - si_pmu_res_deps(sih, cc, deps, - true)) : 0); -} - -/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */ -static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax) -{ - u32 min_mask = 0, max_mask = 0; - uint rsrcs; - char *val; - - /* # resources */ - rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; - - /* determine min/max rsrc masks */ - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - /* ??? */ - break; - - case BCM4329_CHIP_ID: - /* 4329 spedific issue. Needs to come back this issue later */ - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4329_CBUCK_LPOM) | - PMURES_BIT(RES4329_CLDO_PU); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0x3ff63e; - break; - case BCM4319_CHIP_ID: - /* We only need a few resources to be kept on all the time */ - min_mask = PMURES_BIT(RES4319_CBUCK_LPOM) | - PMURES_BIT(RES4319_CLDO_PU); - - /* Allow everything else to be turned on upon requests */ - max_mask = ~(~0 << rsrcs); - break; - case BCM4336_CHIP_ID: - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4336_CBUCK_LPOM) | PMURES_BIT(RES4336_CLDO_PU) - | PMURES_BIT(RES4336_LDO3P3_PU) | PMURES_BIT(RES4336_OTP_PU) - | PMURES_BIT(RES4336_DIS_INT_RESET_PD); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0x1ffffff; - break; - - case BCM4330_CHIP_ID: - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4330_CBUCK_LPOM) | PMURES_BIT(RES4330_CLDO_PU) - | PMURES_BIT(RES4330_DIS_INT_RESET_PD) | - PMURES_BIT(RES4330_LDO3P3_PU) | PMURES_BIT(RES4330_OTP_PU); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0xfffffff; - break; - - case BCM4313_CHIP_ID: - min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) | - PMURES_BIT(RES4313_XTAL_PU_RSRC) | - PMURES_BIT(RES4313_ALP_AVAIL_RSRC) | - PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC); - max_mask = 0xffff; - break; - default: - break; - } - - /* Apply nvram override to min mask */ - val = getvar(NULL, "rmin"); - if (val != NULL) { - min_mask = (u32) simple_strtoul(val, NULL, 0); - } - /* Apply nvram override to max mask */ - val = getvar(NULL, "rmax"); - if (val != NULL) { - max_mask = (u32) simple_strtoul(val, NULL, 0); - } - - *pmin = min_mask; - *pmax = max_mask; -} - -/* Return up time in ILP cycles for the given resource. */ -static uint -si_pmu_res_uptime(struct si_pub *sih, chipcregs_t *cc, u8 rsrc) { - u32 deps; - uint up, i, dup, dmax; - u32 min_mask = 0, max_mask = 0; - - /* uptime of resource 'rsrc' */ - W_REG(&cc->res_table_sel, rsrc); - up = (R_REG(&cc->res_updn_timer) >> 8) & 0xff; - - /* direct dependancies of resource 'rsrc' */ - deps = si_pmu_res_deps(sih, cc, PMURES_BIT(rsrc), false); - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(deps & PMURES_BIT(i))) - continue; - deps &= ~si_pmu_res_deps(sih, cc, PMURES_BIT(i), true); - } - si_pmu_res_masks(sih, &min_mask, &max_mask); - deps &= ~min_mask; - - /* max uptime of direct dependancies */ - dmax = 0; - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(deps & PMURES_BIT(i))) - continue; - dup = si_pmu_res_uptime(sih, cc, (u8) i); - if (dmax < dup) - dmax = dup; - } - - return up + dmax + PMURES_UP_TRANSITION; -} - -static void -si_pmu_spuravoid_pllupdate(struct si_pub *sih, chipcregs_t *cc, u8 spuravoid) -{ - u32 tmp = 0; - u8 phypll_offset = 0; - u8 bcm5357_bcm43236_p1div[] = { 0x1, 0x5, 0x5 }; - u8 bcm5357_bcm43236_ndiv[] = { 0x30, 0xf6, 0xfc }; - - switch (sih->chip) { - case BCM5357_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - - /* - * BCM5357 needs to touch PLL1_PLLCTL[02], - * so offset PLL0_PLLCTL[02] by 6 - */ - phypll_offset = (sih->chip == BCM5357_CHIP_ID) ? 6 : 0; - - /* RMW only the P1 divider */ - W_REG(&cc->pllcontrol_addr, - PMU1_PLL0_PLLCTL0 + phypll_offset); - tmp = R_REG(&cc->pllcontrol_data); - tmp &= (~(PMU1_PLL0_PC0_P1DIV_MASK)); - tmp |= - (bcm5357_bcm43236_p1div[spuravoid] << - PMU1_PLL0_PC0_P1DIV_SHIFT); - W_REG(&cc->pllcontrol_data, tmp); - - /* RMW only the int feedback divider */ - W_REG(&cc->pllcontrol_addr, - PMU1_PLL0_PLLCTL2 + phypll_offset); - tmp = R_REG(&cc->pllcontrol_data); - tmp &= ~(PMU1_PLL0_PC2_NDIV_INT_MASK); - tmp |= - (bcm5357_bcm43236_ndiv[spuravoid]) << - PMU1_PLL0_PC2_NDIV_INT_SHIFT; - W_REG(&cc->pllcontrol_data, tmp); - - tmp = 1 << 10; - break; - - case BCM4331_CHIP_ID: - if (spuravoid == 2) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0FC00a08); - } else if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600a08); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - } - tmp = 1 << 10; - break; - - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM6362_CHIP_ID: - if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500010); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x000C0C06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x2001E920); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100010); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x000c0c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } - tmp = 1 << 10; - break; - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100008); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x0c000c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888855); - - tmp = 1 << 10; - break; - - case BCM4716_CHIP_ID: - case BCM4748_CHIP_ID: - case BCM47162_CHIP_ID: - if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500060); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x080C0C06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x2001E924); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100060); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x080c0c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } - - tmp = 3 << 9; - break; - - case BCM4319_CHIP_ID: - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100070); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x1014140a); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888854); - - if (spuravoid == 1) { - /* spur_avoid ON, so enable 41/82/164Mhz clock mode */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x05201828); - } else { - /* enable 40/80/160Mhz clock mode */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x05001828); - } - break; - case BCM4336_CHIP_ID: - /* Looks like these are only for default xtal freq 26MHz */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x02100020); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x0C0C0C0C); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x01240C0C); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x202C2820); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888825); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - if (spuravoid == 1) - W_REG(&cc->pllcontrol_data, 0x00EC4EC4); - else - W_REG(&cc->pllcontrol_data, 0x00762762); - - tmp = PCTL_PLL_PLLCTL_UPD; - break; - - default: - /* bail out */ - return; - } - - tmp |= R_REG(&cc->pmucontrol); - W_REG(&cc->pmucontrol, tmp); -} - -/* select default xtal frequency for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(struct si_pub *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Default to 38400Khz */ - return &pmu1_xtaltab0_880_4329[PMU1_XTALTAB0_880_38400K]; - case BCM4319_CHIP_ID: - /* Default to 30000Khz */ - return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_30000K]; - case BCM4336_CHIP_ID: - /* Default to 26000Khz */ - return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_26000K]; - case BCM4330_CHIP_ID: - /* Default to 37400Khz */ - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_37400K]; - else - return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_37400K]; - default: - break; - } - return NULL; -} - -/* select xtal table for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(struct si_pub *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - return pmu1_xtaltab0_880_4329; - case BCM4319_CHIP_ID: - return pmu1_xtaltab0_1440; - case BCM4336_CHIP_ID: - return pmu1_xtaltab0_960; - case BCM4330_CHIP_ID: - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return pmu1_xtaltab0_960; - else - return pmu1_xtaltab0_1440; - default: - break; - } - return NULL; -} - -/* query alp/xtal clock frequency */ -static u32 -si_pmu1_alpclk0(struct si_pub *sih, chipcregs_t *cc) -{ - const pmu1_xtaltab0_t *xt; - u32 xf; - - /* Find the frequency in the table */ - xf = (R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> - PCTL_XTALFREQ_SHIFT; - for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) - if (xt->xf == xf) - break; - /* Could not find it so assign a default value */ - if (xt == NULL || xt->fref == 0) - xt = si_pmu1_xtaldef0(sih); - return xt->fref * 1000; -} - -/* select default pll fvco for each chip */ -static u32 si_pmu1_pllfvco0(struct si_pub *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - return FVCO_880; - case BCM4319_CHIP_ID: - return FVCO_1440; - case BCM4336_CHIP_ID: - return FVCO_960; - case BCM4330_CHIP_ID: - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return FVCO_960; - else - return FVCO_1440; - default: - break; - } - return 0; -} - -static void si_pmu_set_4330_plldivs(struct si_pub *sih) -{ - u32 FVCO = si_pmu1_pllfvco0(sih) / 1000; - u32 m1div, m2div, m3div, m4div, m5div, m6div; - u32 pllc1, pllc2; - - m2div = m3div = m4div = m6div = FVCO / 80; - m5div = FVCO / 160; - - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - m1div = FVCO / 80; - else - m1div = FVCO / 90; - pllc1 = - (m1div << PMU1_PLL0_PC1_M1DIV_SHIFT) | (m2div << - PMU1_PLL0_PC1_M2DIV_SHIFT) | - (m3div << PMU1_PLL0_PC1_M3DIV_SHIFT) | (m4div << - PMU1_PLL0_PC1_M4DIV_SHIFT); - si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, ~0, pllc1); - - pllc2 = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, 0, 0); - pllc2 &= ~(PMU1_PLL0_PC2_M5DIV_MASK | PMU1_PLL0_PC2_M6DIV_MASK); - pllc2 |= - ((m5div << PMU1_PLL0_PC2_M5DIV_SHIFT) | - (m6div << PMU1_PLL0_PC2_M6DIV_SHIFT)); - si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL2, ~0, pllc2); -} - -/* Set up PLL registers in the PMU as per the crystal speed. - * XtalFreq field in pmucontrol register being 0 indicates the PLL - * is not programmed and the h/w default is assumed to work, in which - * case the xtal frequency is unknown to the s/w so we need to call - * si_pmu1_xtaldef0() wherever it is needed to return a default value. - */ -static void si_pmu1_pllinit0(struct si_pub *sih, chipcregs_t *cc, u32 xtal) -{ - const pmu1_xtaltab0_t *xt; - u32 tmp; - u32 buf_strength = 0; - u8 ndiv_mode = 1; - - /* Use h/w default PLL config */ - if (xtal == 0) { - return; - } - - /* Find the frequency in the table */ - for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) - if (xt->fref == xtal) - break; - - /* Check current PLL state, bail out if it has been programmed or - * we don't know how to program it. - */ - if (xt == NULL || xt->fref == 0) { - return; - } - /* for 4319 bootloader already programs the PLL but bootloader does not - * program the PLL4 and PLL5. So Skip this check for 4319 - */ - if ((((R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> - PCTL_XTALFREQ_SHIFT) == xt->xf) && - !((sih->chip == BCM4319_CHIP_ID) - || (sih->chip == BCM4330_CHIP_ID))) - return; - - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Change the BBPLL drive strength to 8 for all channels */ - buf_strength = 0x888888; - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4329_HT_AVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4329_HT_AVAIL))); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - if (xt->fref == 38400) - tmp = 0x200024C0; - else if (xt->fref == 37400) - tmp = 0x20004500; - else if (xt->fref == 26000) - tmp = 0x200024C0; - else - tmp = 0x200005C0; /* Chip Dflt Settings */ - W_REG(&cc->pllcontrol_data, tmp); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - tmp = - R_REG(&cc->pllcontrol_data) & PMU1_PLL0_PC5_CLK_DRV_MASK; - if ((xt->fref == 38400) || (xt->fref == 37400) - || (xt->fref == 26000)) - tmp |= 0x15; - else - tmp |= 0x25; /* Chip Dflt Settings */ - W_REG(&cc->pllcontrol_data, tmp); - break; - - case BCM4319_CHIP_ID: - /* Change the BBPLL drive strength to 2 for all channels */ - buf_strength = 0x222222; - - /* Make sure the PLL is off */ - /* WAR65104: Disable the HT_AVAIL resource first and then - * after a delay (more than downtime for HT_AVAIL) remove the - * BBPLL resource; backplane clock moves to ALP from HT. - */ - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4319_HT_AVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4319_HT_AVAIL))); - - udelay(100); - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); - - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - tmp = 0x200005c0; - W_REG(&cc->pllcontrol_data, tmp); - break; - - case BCM4336_CHIP_ID: - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4336_HT_AVAIL) | - PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4336_HT_AVAIL) | - PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - break; - - case BCM4330_CHIP_ID: - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4330_HT_AVAIL) | - PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4330_HT_AVAIL) | - PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - break; - - default: - break; - } - - /* Write p1div and p2div to pllcontrol[0] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - tmp = R_REG(&cc->pllcontrol_data) & - ~(PMU1_PLL0_PC0_P1DIV_MASK | PMU1_PLL0_PC0_P2DIV_MASK); - tmp |= - ((xt-> - p1div << PMU1_PLL0_PC0_P1DIV_SHIFT) & PMU1_PLL0_PC0_P1DIV_MASK) | - ((xt-> - p2div << PMU1_PLL0_PC0_P2DIV_SHIFT) & PMU1_PLL0_PC0_P2DIV_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - if ((sih->chip == BCM4330_CHIP_ID)) - si_pmu_set_4330_plldivs(sih); - - if ((sih->chip == BCM4329_CHIP_ID) - && (sih->chiprev == 0)) { - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - tmp = R_REG(&cc->pllcontrol_data); - tmp = tmp & (~DOT11MAC_880MHZ_CLK_DIVISOR_MASK); - tmp = tmp | DOT11MAC_880MHZ_CLK_DIVISOR_VAL; - W_REG(&cc->pllcontrol_data, tmp); - } - if ((sih->chip == BCM4319_CHIP_ID) || - (sih->chip == BCM4336_CHIP_ID) || - (sih->chip == BCM4330_CHIP_ID)) - ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MFB; - else - ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MASH; - - /* Write ndiv_int and ndiv_mode to pllcontrol[2] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - tmp = R_REG(&cc->pllcontrol_data) & - ~(PMU1_PLL0_PC2_NDIV_INT_MASK | PMU1_PLL0_PC2_NDIV_MODE_MASK); - tmp |= - ((xt-> - ndiv_int << PMU1_PLL0_PC2_NDIV_INT_SHIFT) & - PMU1_PLL0_PC2_NDIV_INT_MASK) | ((ndiv_mode << - PMU1_PLL0_PC2_NDIV_MODE_SHIFT) & - PMU1_PLL0_PC2_NDIV_MODE_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - /* Write ndiv_frac to pllcontrol[3] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - tmp = R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC3_NDIV_FRAC_MASK; - tmp |= ((xt->ndiv_frac << PMU1_PLL0_PC3_NDIV_FRAC_SHIFT) & - PMU1_PLL0_PC3_NDIV_FRAC_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - /* Write clock driving strength to pllcontrol[5] */ - if (buf_strength) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - tmp = - R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC5_CLK_DRV_MASK; - tmp |= (buf_strength << PMU1_PLL0_PC5_CLK_DRV_SHIFT); - W_REG(&cc->pllcontrol_data, tmp); - } - - /* to operate the 4319 usb in 24MHz/48MHz; chipcontrol[2][84:83] needs - * to be updated. - */ - if ((sih->chip == BCM4319_CHIP_ID) - && (xt->fref != XTAL_FREQ_30000MHZ)) { - W_REG(&cc->chipcontrol_addr, PMU1_PLL0_CHIPCTL2); - tmp = - R_REG(&cc->chipcontrol_data) & ~CCTL_4319USB_XTAL_SEL_MASK; - if (xt->fref == XTAL_FREQ_24000MHZ) { - tmp |= - (CCTL_4319USB_24MHZ_PLL_SEL << - CCTL_4319USB_XTAL_SEL_SHIFT); - } else if (xt->fref == XTAL_FREQ_48000MHZ) { - tmp |= - (CCTL_4319USB_48MHZ_PLL_SEL << - CCTL_4319USB_XTAL_SEL_SHIFT); - } - W_REG(&cc->chipcontrol_data, tmp); - } - - /* Flush deferred pll control registers writes */ - if (sih->pmurev >= 2) - OR_REG(&cc->pmucontrol, PCTL_PLL_PLLCTL_UPD); - - /* Write XtalFreq. Set the divisor also. */ - tmp = R_REG(&cc->pmucontrol) & - ~(PCTL_ILP_DIV_MASK | PCTL_XTALFREQ_MASK); - tmp |= (((((xt->fref + 127) / 128) - 1) << PCTL_ILP_DIV_SHIFT) & - PCTL_ILP_DIV_MASK) | - ((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK); - - if ((sih->chip == BCM4329_CHIP_ID) - && sih->chiprev == 0) { - /* clear the htstretch before clearing HTReqEn */ - AND_REG(&cc->clkstretch, ~CSTRETCH_HT); - tmp &= ~PCTL_HT_REQ_EN; - } - - W_REG(&cc->pmucontrol, tmp); -} - -u32 si_pmu_ilp_clock(struct si_pub *sih) -{ - static u32 ilpcycles_per_sec; - - if (ISSIM_ENAB(sih) || !PMUCTL_ENAB(sih)) - return ILP_CLOCK; - - if (ilpcycles_per_sec == 0) { - u32 start, end, delta; - u32 origidx = ai_coreidx(sih); - chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX); - start = R_REG(&cc->pmutimer); - mdelay(ILP_CALC_DUR); - end = R_REG(&cc->pmutimer); - delta = end - start; - ilpcycles_per_sec = delta * (1000 / ILP_CALC_DUR); - ai_setcoreidx(sih, origidx); - } - - return ilpcycles_per_sec; -} - -void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage) -{ - u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0; - u8 addr = 0; - - switch (sih->chip) { - case BCM4336_CHIP_ID: - switch (ldo) { - case SET_LDO_VOLTAGE_CLDO_PWM: - addr = 4; - rc_shift = 1; - mask = 0xf; - break; - case SET_LDO_VOLTAGE_CLDO_BURST: - addr = 4; - rc_shift = 5; - mask = 0xf; - break; - case SET_LDO_VOLTAGE_LNLDO1: - addr = 4; - rc_shift = 17; - mask = 0xf; - break; - default: - return; - } - break; - case BCM4330_CHIP_ID: - switch (ldo) { - case SET_LDO_VOLTAGE_CBUCK_PWM: - addr = 3; - rc_shift = 0; - mask = 0x1f; - break; - default: - return; - } - break; - default: - return; - } - - shift = sr_cntl_shift + rc_shift; - - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), - ~0, addr); - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_data), - mask << shift, (voltage & mask) << shift); -} - -u16 si_pmu_fast_pwrup_delay(struct si_pub *sih) -{ - uint delay = PMU_MAX_TRANSITION_DLY; - chipcregs_t *cc; - uint origidx; -#ifdef BCMDBG - char chn[8]; - chn[0] = 0; /* to suppress compile error */ -#endif - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - case BCM4313_CHIP_ID: - delay = ISSIM_ENAB(sih) ? 70 : 3700; - break; - case BCM4329_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4329_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - case BCM4319_CHIP_ID: - delay = ISSIM_ENAB(sih) ? 70 : 3700; - break; - case BCM4336_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4336_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - case BCM4330_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4330_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - default: - break; - } - /* Return to original core */ - ai_setcoreidx(sih, origidx); - - return (u16) delay; -} - -void si_pmu_sprom_enable(struct si_pub *sih, bool enable) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* Read/write a chipcontrol reg */ -u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), mask, val); -} - -/* Read/write a regcontrol reg */ -u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, regcontrol_data), mask, val); -} - -/* Read/write a pllcontrol reg */ -u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, pllcontrol_data), mask, val); -} - -/* PMU PLL update */ -void si_pmu_pllupd(struct si_pub *sih) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol), - PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); -} - -/* query alp/xtal clock frequency */ -u32 si_pmu_alp_clock(struct si_pub *sih) -{ - chipcregs_t *cc; - uint origidx; - u32 clock = ALP_CLOCK; - - /* bail out with default */ - if (!PMUCTL_ENAB(sih)) - return clock; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - case BCM4716_CHIP_ID: - case BCM4748_CHIP_ID: - case BCM47162_CHIP_ID: - case BCM4313_CHIP_ID: - case BCM5357_CHIP_ID: - /* always 20Mhz */ - clock = 20000 * 1000; - break; - case BCM4329_CHIP_ID: - case BCM4319_CHIP_ID: - case BCM4336_CHIP_ID: - case BCM4330_CHIP_ID: - - clock = si_pmu1_alpclk0(sih, cc); - break; - case BCM5356_CHIP_ID: - /* always 25Mhz */ - clock = 25000 * 1000; - break; - default: - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); - return clock; -} - -void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid) -{ - chipcregs_t *cc; - uint origidx, intr_val; - u32 tmp = 0; - - /* Remember original core before switch to chipc */ - cc = (chipcregs_t *) ai_switch_core(sih, CC_CORE_ID, &origidx, - &intr_val); - - /* force the HT off */ - if (sih->chip == BCM4336_CHIP_ID) { - tmp = R_REG(&cc->max_res_mask); - tmp &= ~RES4336_HT_AVAIL; - W_REG(&cc->max_res_mask, tmp); - /* wait for the ht to really go away */ - SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0), - 10000); - } - - /* update the pll changes */ - si_pmu_spuravoid_pllupdate(sih, cc, spuravoid); - - /* enable HT back on */ - if (sih->chip == BCM4336_CHIP_ID) { - tmp = R_REG(&cc->max_res_mask); - tmp |= RES4336_HT_AVAIL; - W_REG(&cc->max_res_mask, tmp); - } - - /* Return to original core */ - ai_restore_core(sih, origidx, intr_val); -} - -/* initialize PMU */ -void si_pmu_init(struct si_pub *sih) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - if (sih->pmurev == 1) - AND_REG(&cc->pmucontrol, ~PCTL_NOILP_ON_WAIT); - else if (sih->pmurev >= 2) - OR_REG(&cc->pmucontrol, PCTL_NOILP_ON_WAIT); - - if ((sih->chip == BCM4329_CHIP_ID) && (sih->chiprev == 2)) { - /* Fix for 4329b0 bad LPOM state. */ - W_REG(&cc->regcontrol_addr, 2); - OR_REG(&cc->regcontrol_data, 0x100); - - W_REG(&cc->regcontrol_addr, 3); - OR_REG(&cc->regcontrol_data, 0x4); - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU chip controls and other chip level stuff */ -void si_pmu_chip_init(struct si_pub *sih) -{ - uint origidx; - - /* Gate off SPROM clock and chip select signals */ - si_pmu_sprom_enable(sih, false); - - /* Remember original core */ - origidx = ai_coreidx(sih); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU switch/regulators */ -void si_pmu_swreg_init(struct si_pub *sih) -{ - switch (sih->chip) { - case BCM4336_CHIP_ID: - /* Reduce CLDO PWM output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_PWM, 0xe); - /* Reduce CLDO BURST output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_BURST, - 0xe); - /* Reduce LNLDO1 output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_LNLDO1, 0xe); - if (sih->chiprev == 0) - si_pmu_regcontrol(sih, 2, 0x400000, 0x400000); - break; - - case BCM4330_CHIP_ID: - /* CBUCK Voltage is 1.8 by default and set that to 1.5 */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CBUCK_PWM, 0); - break; - default: - break; - } -} - -/* initialize PLL */ -void si_pmu_pll_init(struct si_pub *sih, uint xtalfreq) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - if (xtalfreq == 0) - xtalfreq = 38400; - si_pmu1_pllinit0(sih, cc, xtalfreq); - break; - case BCM4313_CHIP_ID: - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - /* ??? */ - break; - case BCM4319_CHIP_ID: - case BCM4336_CHIP_ID: - case BCM4330_CHIP_ID: - si_pmu1_pllinit0(sih, cc, xtalfreq); - break; - default: - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU resources */ -void si_pmu_res_init(struct si_pub *sih) -{ - chipcregs_t *cc; - uint origidx; - const pmu_res_updown_t *pmu_res_updown_table = NULL; - uint pmu_res_updown_table_sz = 0; - const pmu_res_depend_t *pmu_res_depend_table = NULL; - uint pmu_res_depend_table_sz = 0; - u32 min_mask = 0, max_mask = 0; - char name[8], *val; - uint i, rsrcs; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = NULL; - pmu_res_updown_table_sz = 0; - } else { - pmu_res_updown_table = bcm4329_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4329_res_updown); - } - /* Optimize resources dependencies */ - pmu_res_depend_table = bcm4329_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4329_res_depend); - break; - - case BCM4319_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4319a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4319a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4319a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4319a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4319a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4319a0_res_depend); - break; - - case BCM4336_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4336a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4336a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4336a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4336a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4336a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4336a0_res_depend); - break; - - case BCM4330_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4330a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4330a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4330a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4330a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4330a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4330a0_res_depend); - break; - - default: - break; - } - - /* # resources */ - rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; - - /* Program up/down timers */ - while (pmu_res_updown_table_sz--) { - W_REG(&cc->res_table_sel, - pmu_res_updown_table[pmu_res_updown_table_sz].resnum); - W_REG(&cc->res_updn_timer, - pmu_res_updown_table[pmu_res_updown_table_sz].updown); - } - /* Apply nvram overrides to up/down timers */ - for (i = 0; i < rsrcs; i++) { - snprintf(name, sizeof(name), "r%dt", i); - val = getvar(NULL, name); - if (val == NULL) - continue; - W_REG(&cc->res_table_sel, (u32) i); - W_REG(&cc->res_updn_timer, - (u32) simple_strtoul(val, NULL, 0)); - } - - /* Program resource dependencies table */ - while (pmu_res_depend_table_sz--) { - if (pmu_res_depend_table[pmu_res_depend_table_sz].filter != NULL - && !(pmu_res_depend_table[pmu_res_depend_table_sz]. - filter) (sih)) - continue; - for (i = 0; i < rsrcs; i++) { - if ((pmu_res_depend_table[pmu_res_depend_table_sz]. - res_mask & PMURES_BIT(i)) == 0) - continue; - W_REG(&cc->res_table_sel, i); - switch (pmu_res_depend_table[pmu_res_depend_table_sz]. - action) { - case RES_DEPEND_SET: - W_REG(&cc->res_dep_mask, - pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - case RES_DEPEND_ADD: - OR_REG(&cc->res_dep_mask, - pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - case RES_DEPEND_REMOVE: - AND_REG(&cc->res_dep_mask, - ~pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - default: - break; - } - } - } - /* Apply nvram overrides to dependancies masks */ - for (i = 0; i < rsrcs; i++) { - snprintf(name, sizeof(name), "r%dd", i); - val = getvar(NULL, name); - if (val == NULL) - continue; - W_REG(&cc->res_table_sel, (u32) i); - W_REG(&cc->res_dep_mask, - (u32) simple_strtoul(val, NULL, 0)); - } - - /* Determine min/max rsrc masks */ - si_pmu_res_masks(sih, &min_mask, &max_mask); - - /* It is required to program max_mask first and then min_mask */ - - /* Program max resource mask */ - - if (max_mask) - W_REG(&cc->max_res_mask, max_mask); - - /* Program min resource mask */ - - if (min_mask) - W_REG(&cc->min_res_mask, min_mask); - - /* Add some delay; allow resources to come up and settle. */ - mdelay(2); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -u32 si_pmu_measure_alpclk(struct si_pub *sih) -{ - chipcregs_t *cc; - uint origidx; - u32 alp_khz; - - if (sih->pmurev < 10) - return 0; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) { - u32 ilp_ctr, alp_hz; - - /* - * Enable the reg to measure the freq, - * in case it was disabled before - */ - W_REG(&cc->pmu_xtalfreq, - 1U << PMU_XTALFREQ_REG_MEASURE_SHIFT); - - /* Delay for well over 4 ILP clocks */ - udelay(1000); - - /* Read the latched number of ALP ticks per 4 ILP ticks */ - ilp_ctr = - R_REG(&cc->pmu_xtalfreq) & PMU_XTALFREQ_REG_ILPCTR_MASK; - - /* - * Turn off the PMU_XTALFREQ_REG_MEASURE_SHIFT - * bit to save power - */ - W_REG(&cc->pmu_xtalfreq, 0); - - /* Calculate ALP frequency */ - alp_hz = (ilp_ctr * EXT_ILP_HZ) / 4; - - /* - * Round to nearest 100KHz, and at - * the same time convert to KHz - */ - alp_khz = (alp_hz + 50000) / 100000 * 100; - } else - alp_khz = 0; - - /* Return to original core */ - ai_setcoreidx(sih, origidx); - - return alp_khz; -} - -bool si_pmu_is_otp_powered(struct si_pub *sih) -{ - uint idx; - chipcregs_t *cc; - bool st; - - /* Remember original core before switch to chipc */ - idx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4329_OTP_PU)) - != 0; - break; - case BCM4319_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4319_OTP_PU)) - != 0; - break; - case BCM4336_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4336_OTP_PU)) - != 0; - break; - case BCM4330_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4330_OTP_PU)) - != 0; - break; - - /* These chip doesn't use PMU bit to power up/down OTP. OTP always on. - * Use OTP_INIT command to reset/refresh state. - */ - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43238_CHIP_ID: - st = true; - break; - default: - st = true; - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, idx); - return st; -} - -/* power up/down OTP through PMU resources */ -void si_pmu_otp_power(struct si_pub *sih, bool on) -{ - chipcregs_t *cc; - uint origidx; - u32 rsrcs = 0; /* rsrcs to turn on/off OTP power */ - - /* Don't do anything if OTP is disabled */ - if (ai_is_otp_disabled(sih)) - return; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - rsrcs = PMURES_BIT(RES4329_OTP_PU); - break; - case BCM4319_CHIP_ID: - rsrcs = PMURES_BIT(RES4319_OTP_PU); - break; - case BCM4336_CHIP_ID: - rsrcs = PMURES_BIT(RES4336_OTP_PU); - break; - case BCM4330_CHIP_ID: - rsrcs = PMURES_BIT(RES4330_OTP_PU); - break; - default: - break; - } - - if (rsrcs != 0) { - u32 otps; - - /* Figure out the dependancies (exclude min_res_mask) */ - u32 deps = si_pmu_res_deps(sih, cc, rsrcs, true); - u32 min_mask = 0, max_mask = 0; - si_pmu_res_masks(sih, &min_mask, &max_mask); - deps &= ~min_mask; - /* Turn on/off the power */ - if (on) { - OR_REG(&cc->min_res_mask, (rsrcs | deps)); - SPINWAIT(!(R_REG(&cc->res_state) & rsrcs), - PMU_MAX_TRANSITION_DLY); - } else { - AND_REG(&cc->min_res_mask, ~(rsrcs | deps)); - } - - SPINWAIT((((otps = R_REG(&cc->otpstatus)) & OTPS_READY) != - (on ? OTPS_READY : 0)), 100); - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h deleted file mode 100644 index eff8d5b..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - - -#ifndef _BRCM_PMU_H_ -#define _BRCM_PMU_H_ - -#include - -#include - -/* - * LDO selections used in si_pmu_set_ldo_voltage - */ -#define SET_LDO_VOLTAGE_LDO1 1 -#define SET_LDO_VOLTAGE_LDO2 2 -#define SET_LDO_VOLTAGE_LDO3 3 -#define SET_LDO_VOLTAGE_PAREF 4 -#define SET_LDO_VOLTAGE_CLDO_PWM 5 -#define SET_LDO_VOLTAGE_CLDO_BURST 6 -#define SET_LDO_VOLTAGE_CBUCK_PWM 7 -#define SET_LDO_VOLTAGE_CBUCK_BURST 8 -#define SET_LDO_VOLTAGE_LNLDO1 9 -#define SET_LDO_VOLTAGE_LNLDO2_SEL 10 - -extern void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage); -extern u16 si_pmu_fast_pwrup_delay(struct si_pub *sih); -extern void si_pmu_sprom_enable(struct si_pub *sih, bool enable); -extern u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_ilp_clock(struct si_pub *sih); -extern u32 si_pmu_alp_clock(struct si_pub *sih); -extern void si_pmu_pllupd(struct si_pub *sih); -extern void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid); -extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); -extern void si_pmu_init(struct si_pub *sih); -extern void si_pmu_chip_init(struct si_pub *sih); -extern void si_pmu_pll_init(struct si_pub *sih, u32 xtalfreq); -extern void si_pmu_res_init(struct si_pub *sih); -extern void si_pmu_swreg_init(struct si_pub *sih); -extern u32 si_pmu_measure_alpclk(struct si_pub *sih); -extern bool si_pmu_is_otp_powered(struct si_pub *sih); -extern void si_pmu_otp_power(struct si_pub *sih, bool on); - -#endif /* _BRCM_PMU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/wlc_pub.h deleted file mode 100644 index 20df964..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ /dev/null @@ -1,674 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_PUB_H_ -#define _BRCM_PUB_H_ - -#include "wlc_types.h" /* forward structure declarations */ -#include "brcmu_wifi.h" /* for chanspec_t */ - -#define WLC_NUMRATES 16 /* max # of rates in a rateset */ -#define MAXMULTILIST 32 /* max # multicast addresses */ -#define D11_PHY_HDR_LEN 6 /* Phy header length - 6 bytes */ - -/* phy types */ -#define PHY_TYPE_A 0 /* Phy type A */ -#define PHY_TYPE_G 2 /* Phy type G */ -#define PHY_TYPE_N 4 /* Phy type N */ -#define PHY_TYPE_LP 5 /* Phy type Low Power A/B/G */ -#define PHY_TYPE_SSN 6 /* Phy type Single Stream N */ -#define PHY_TYPE_LCN 8 /* Phy type Single Stream N */ -#define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */ -#define PHY_TYPE_HT 7 /* Phy type 3-Stream N */ - -/* bw */ -#define WLC_10_MHZ 10 /* 10Mhz nphy channel bandwidth */ -#define WLC_20_MHZ 20 /* 20Mhz nphy channel bandwidth */ -#define WLC_40_MHZ 40 /* 40Mhz nphy channel bandwidth */ - -#define CHSPEC_WLC_BW(chanspec) (CHSPEC_IS40(chanspec) ? WLC_40_MHZ : \ - CHSPEC_IS20(chanspec) ? WLC_20_MHZ : \ - WLC_10_MHZ) - -#define WLC_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */ -#define WLC_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */ -#define WLC_RSSI_VERY_LOW -80 /* Very low quality cutoffs */ -#define WLC_RSSI_LOW -70 /* Low quality cutoffs */ -#define WLC_RSSI_GOOD -68 /* Good quality cutoffs */ -#define WLC_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */ -#define WLC_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */ - -#define WLC_PHYTYPE(_x) (_x) /* macro to perform WLC PHY -> D11 PHY TYPE, currently 1:1 */ - -#define MA_WINDOW_SZ 8 /* moving average window size */ - -#define WLC_SNR_INVALID 0 /* invalid SNR value */ - -/* a large TX Power as an init value to factor out of min() calculations, - * keep low enough to fit in an s8, units are .25 dBm - */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ - -/* rate related definitions */ -#define WLC_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */ -#define WLC_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */ - -/* legacy rx Antenna diversity for SISO rates */ -#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ -#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ -#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ -#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ -#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ -#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ - -/* legacy rx Antenna diversity for SISO rates */ -#define ANT_TX_FORCE_0 0 /* Tx on antenna 0, "legacy term Main" */ -#define ANT_TX_FORCE_1 1 /* Tx on antenna 1, "legacy term Aux" */ -#define ANT_TX_LAST_RX 3 /* Tx on phy's last good Rx antenna */ -#define ANT_TX_DEF 3 /* driver's default tx antenna setting */ - -#define TXCORE_POLICY_ALL 0x1 /* use all available core for transmit */ - -/* Tx Chain values */ -#define TXCHAIN_DEF 0x1 /* def bitmap of txchain */ -#define TXCHAIN_DEF_NPHY 0x3 /* default bitmap of tx chains for nphy */ -#define TXCHAIN_DEF_HTPHY 0x7 /* default bitmap of tx chains for nphy */ -#define RXCHAIN_DEF 0x1 /* def bitmap of rxchain */ -#define RXCHAIN_DEF_NPHY 0x3 /* default bitmap of rx chains for nphy */ -#define RXCHAIN_DEF_HTPHY 0x7 /* default bitmap of rx chains for nphy */ -#define ANTSWITCH_NONE 0 /* no antenna switch */ -#define ANTSWITCH_TYPE_1 1 /* antenna switch on 4321CB2, 2of3 */ -#define ANTSWITCH_TYPE_2 2 /* antenna switch on 4321MPCI, 2of3 */ -#define ANTSWITCH_TYPE_3 3 /* antenna switch on 4322, 2of3 */ - -#define RXBUFSZ PKTBUFSZ -#ifndef AIDMAPSZ -#define AIDMAPSZ (roundup(MAXSCB, NBBY)/NBBY) /* aid bitmap size in bytes */ -#endif /* AIDMAPSZ */ - -#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ - -#define WL_SPURAVOID_OFF 0 -#define WL_SPURAVOID_ON1 1 -#define WL_SPURAVOID_ON2 2 - -struct ieee80211_tx_queue_params; - -typedef struct wlc_tunables { - int ntxd; /* size of tx descriptor table */ - int nrxd; /* size of rx descriptor table */ - int rxbufsz; /* size of rx buffers to post */ - int nrxbufpost; /* # of rx buffers to post */ - int maxscb; /* # of SCBs supported */ - int ampdunummpdu; /* max number of mpdu in an ampdu */ - int maxpktcb; /* max # of packet callbacks */ - int maxucodebss; /* max # of BSS handled in ucode bcn/prb */ - int maxucodebss4; /* max # of BSS handled in sw bcn/prb */ - int maxbss; /* max # of bss info elements in scan list */ - int datahiwat; /* data msg txq hiwat mark */ - int ampdudatahiwat; /* AMPDU msg txq hiwat mark */ - int rxbnd; /* max # of rx bufs to process before deferring to dpc */ - int txsbnd; /* max # tx status to process in wlc_txstatus() */ - int memreserved; /* memory reserved for BMAC's USB dma rx */ -} wlc_tunables_t; - -typedef struct wlc_rateset { - uint count; /* number of rates in rates[] */ - u8 rates[WLC_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ - u8 htphy_membership; /* HT PHY Membership */ - u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ -} wlc_rateset_t; - -struct rsn_parms { - u8 flags; /* misc booleans (e.g., supported) */ - u8 multicast; /* multicast cipher */ - u8 ucount; /* count of unicast ciphers */ - u8 unicast[4]; /* unicast ciphers */ - u8 acount; /* count of auth modes */ - u8 auth[4]; /* Authentication modes */ - u8 PAD[4]; /* padding for future growth */ -}; - -/* - * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. - */ -#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) - -#define RSN_FLAGS_SUPPORTED 0x1 /* Flag for rsn_params */ -#define RSN_FLAGS_PREAUTH 0x2 /* Flag for WPA2 rsn_params */ - -/* All the HT-specific default advertised capabilities (including AMPDU) - * should be grouped here at one place - */ -#define AMPDU_DEF_MPDU_DENSITY 6 /* default mpdu density (110 ==> 4us) */ - -/* defaults for the HT (MIMO) bss */ -#define HT_CAP (IEEE80211_HT_CAP_SM_PS |\ - IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD |\ - IEEE80211_HT_CAP_MAX_AMSDU | IEEE80211_HT_CAP_DSSSCCK40) - -/* wlc internal bss_info */ -typedef struct wlc_bss_info { - u8 BSSID[ETH_ALEN]; /* network BSSID */ - u16 flags; /* flags for internal attributes */ - u8 SSID_len; /* the length of SSID */ - u8 SSID[32]; /* SSID string */ - s16 RSSI; /* receive signal strength (in dBm) */ - s16 SNR; /* receive signal SNR in dB */ - u16 beacon_period; /* units are Kusec */ - u16 atim_window; /* units are Kusec */ - chanspec_t chanspec; /* Channel num, bw, ctrl_sb and band */ - s8 infra; /* 0=IBSS, 1=infrastructure, 2=unknown */ - wlc_rateset_t rateset; /* supported rates */ - u8 dtim_period; /* DTIM period */ - s8 phy_noise; /* noise right after tx (in dBm) */ - u16 capability; /* Capability information */ - u8 wme_qosinfo; /* QoS Info from WME IE; valid if WLC_BSS_WME flag set */ - struct rsn_parms wpa; - struct rsn_parms wpa2; - u16 qbss_load_aac; /* qbss load available admission capacity */ - /* qbss_load_chan_free <- (0xff - channel_utilization of qbss_load_ie_t) */ - u8 qbss_load_chan_free; /* indicates how free the channel is */ - u8 mcipher; /* multicast cipher */ - u8 wpacfg; /* wpa config index */ -} wlc_bss_info_t; - -/* forward declarations */ -struct wlc_if; - -/* wlc_ioctl error codes */ -#define WLC_ENOIOCTL 1 /* No such Ioctl */ -#define WLC_EINVAL 2 /* Invalid value */ -#define WLC_ETOOSMALL 3 /* Value too small */ -#define WLC_ETOOBIG 4 /* Value too big */ -#define WLC_ERANGE 5 /* Out of range */ -#define WLC_EDOWN 6 /* Down */ -#define WLC_EUP 7 /* Up */ -#define WLC_ENOMEM 8 /* No Memory */ -#define WLC_EBUSY 9 /* Busy */ - -/* IOVar flags for common error checks */ -#define IOVF_MFG (1<<3) /* flag for mfgtest iovars */ -#define IOVF_WHL (1<<4) /* value must be whole (0-max) */ -#define IOVF_NTRL (1<<5) /* value must be natural (1-max) */ - -#define IOVF_SET_UP (1<<6) /* set requires driver be up */ -#define IOVF_SET_DOWN (1<<7) /* set requires driver be down */ -#define IOVF_SET_CLK (1<<8) /* set requires core clock */ -#define IOVF_SET_BAND (1<<9) /* set requires fixed band */ - -#define IOVF_GET_UP (1<<10) /* get requires driver be up */ -#define IOVF_GET_DOWN (1<<11) /* get requires driver be down */ -#define IOVF_GET_CLK (1<<12) /* get requires core clock */ -#define IOVF_GET_BAND (1<<13) /* get requires fixed band */ -#define IOVF_OPEN_ALLOW (1<<14) /* set allowed iovar for opensrc */ - -/* watchdog down and dump callback function proto's */ -typedef int (*watchdog_fn_t) (void *handle); -typedef int (*down_fn_t) (void *handle); -typedef int (*dump_fn_t) (void *handle, struct brcmu_strbuf *b); - -/* IOVar handler - * - * handle - a pointer value registered with the function - * vi - iovar_info that was looked up - * actionid - action ID, calculated by IOV_GVAL() and IOV_SVAL() based on varid. - * name - the actual iovar name - * params/plen - parameters and length for a get, input only. - * arg/len - buffer and length for value to be set or retrieved, input or output. - * vsize - value size, valid for integer type only. - * wlcif - interface context (wlc_if pointer) - * - * All pointers may point into the same buffer. - */ -typedef int (*iovar_fn_t) (void *handle, const struct brcmu_iovar *vi, - u32 actionid, const char *name, void *params, - uint plen, void *arg, int alen, int vsize, - struct wlc_if *wlcif); - -#define MAC80211_PROMISC_BCNS (1 << 0) -#define MAC80211_SCAN (1 << 1) - -/* - * Public portion of "common" os-independent state structure. - * The wlc handle points at this. - */ -struct wlc_pub { - void *wlc; - - struct ieee80211_hw *ieee_hw; - struct scb *global_scb; - scb_ampdu_t *global_ampdu; - uint mac80211_state; - uint unit; /* device instance number */ - uint corerev; /* core revision */ - struct si_pub *sih; /* SI handle (cookie for siutils calls) */ - char *vars; /* "environment" name=value */ - bool up; /* interface up and running */ - bool hw_off; /* HW is off */ - wlc_tunables_t *tunables; /* tunables: ntxd, nrxd, maxscb, etc. */ - bool hw_up; /* one time hw up/down(from boot or hibernation) */ - bool _piomode; /* true if pio mode *//* BMAC_NOTE: NEED In both */ - uint _nbands; /* # bands supported */ - uint now; /* # elapsed seconds */ - - bool promisc; /* promiscuous destination address */ - bool delayed_down; /* down delayed */ - bool _ap; /* AP mode enabled */ - bool _apsta; /* simultaneous AP/STA mode enabled */ - bool _assoc_recreate; /* association recreation on up transitions */ - int _wme; /* WME QoS mode */ - u8 _mbss; /* MBSS mode on */ - bool allmulti; /* enable all multicasts */ - bool associated; /* true:part of [I]BSS, false: not */ - /* (union of stas_associated, aps_associated) */ - bool phytest_on; /* whether a PHY test is running */ - bool bf_preempt_4306; /* True to enable 'darwin' mode */ - bool _ampdu; /* ampdu enabled or not */ - bool _cac; /* 802.11e CAC enabled */ - u8 _n_enab; /* bitmap of 11N + HT support */ - bool _n_reqd; /* N support required for clients */ - - s8 _coex; /* 20/40 MHz BSS Management AUTO, ENAB, DISABLE */ - bool _priofc; /* Priority-based flowcontrol */ - - u8 cur_etheraddr[ETH_ALEN]; /* our local ethernet address */ - - u8 *multicast; /* ptr to list of multicast addresses */ - uint nmulticast; /* # enabled multicast addresses */ - - u32 wlfeatureflag; /* Flags to control sw features from registry */ - int psq_pkts_total; /* total num of ps pkts */ - - u16 txmaxpkts; /* max number of large pkts allowed to be pending */ - - /* s/w decryption counters */ - u32 swdecrypt; /* s/w decrypt attempts */ - - int bcmerror; /* last bcm error */ - - mbool radio_disabled; /* bit vector for radio disabled reasons */ - bool radio_active; /* radio on/off state */ - u16 roam_time_thresh; /* Max. # secs. of not hearing beacons - * before roaming. - */ - bool align_wd_tbtt; /* Align watchdog with tbtt indication - * handling. This flag is cleared by default - * and is set by per port code explicitly and - * you need to make sure the OSL_SYSUPTIME() - * is implemented properly in osl of that port - * when it enables this Power Save feature. - */ - - u16 boardrev; /* version # of particular board */ - u8 sromrev; /* version # of the srom */ - char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ - u32 boardflags; /* Board specific flags from srom */ - u32 boardflags2; /* More board flags if sromrev >= 4 */ - bool tempsense_disable; /* disable periodic tempsense check */ - bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */ - bool _ampdumac; /* mac assist ampdu enabled or not */ - - struct wl_cnt *_cnt; /* low-level counters in driver */ -}; - -/* wl_monitor rx status per packet */ -typedef struct wl_rxsts { - uint pkterror; /* error flags per pkt */ - uint phytype; /* 802.11 A/B/G ... */ - uint channel; /* channel */ - uint datarate; /* rate in 500kbps */ - uint antenna; /* antenna pkts received on */ - uint pktlength; /* pkt length minus bcm phy hdr */ - u32 mactime; /* time stamp from mac, count per 1us */ - uint sq; /* signal quality */ - s32 signal; /* in dbm */ - s32 noise; /* in dbm */ - uint preamble; /* Unknown, short, long */ - uint encoding; /* Unknown, CCK, PBCC, OFDM */ - uint nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */ - struct brcms_if *wlif; /* wl interface */ -} wl_rxsts_t; - -/* status per error RX pkt */ -#define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */ -#define WL_RXS_RUNT_ERROR 0x00000002 /* Runt packet */ -#define WL_RXS_ALIGN_ERROR 0x00000004 /* Misaligned packet */ -#define WL_RXS_OVERSIZE_ERROR 0x00000008 /* packet bigger than RX_LENGTH (usually 1518) */ -#define WL_RXS_WEP_ICV_ERROR 0x00000010 /* Integrity Check Value error */ -#define WL_RXS_WEP_ENCRYPTED 0x00000020 /* Encrypted with WEP */ -#define WL_RXS_PLCP_SHORT 0x00000040 /* Short PLCP error */ -#define WL_RXS_DECRYPT_ERR 0x00000080 /* Decryption error */ -#define WL_RXS_OTHER_ERR 0x80000000 /* Other errors */ - -/* phy type */ -#define WL_RXS_PHY_A 0x00000000 /* A phy type */ -#define WL_RXS_PHY_B 0x00000001 /* B phy type */ -#define WL_RXS_PHY_G 0x00000002 /* G phy type */ -#define WL_RXS_PHY_N 0x00000004 /* N phy type */ - -/* encoding */ -#define WL_RXS_ENCODING_CCK 0x00000000 /* CCK encoding */ -#define WL_RXS_ENCODING_OFDM 0x00000001 /* OFDM encoding */ - -/* preamble */ -#define WL_RXS_UNUSED_STUB 0x0 /* stub to match with wlc_ethereal.h */ -#define WL_RXS_PREAMBLE_SHORT 0x00000001 /* Short preamble */ -#define WL_RXS_PREAMBLE_LONG 0x00000002 /* Long preamble */ -#define WL_RXS_PREAMBLE_MIMO_MM 0x00000003 /* MIMO mixed mode preamble */ -#define WL_RXS_PREAMBLE_MIMO_GF 0x00000004 /* MIMO green field preamble */ - -#define WL_RXS_NFRM_AMPDU_FIRST 0x00000001 /* first MPDU in A-MPDU */ -#define WL_RXS_NFRM_AMPDU_SUB 0x00000002 /* subsequent MPDU(s) in A-MPDU */ -#define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */ -#define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */ - -enum wlc_par_id { - IOV_MPC = 1, - IOV_RTSTHRESH, - IOV_QTXPOWER, - IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */ -}; - -/* forward declare and use the struct notation so we don't have to - * have it defined if not necessary. - */ -struct wlc_info; -struct wlc_hw_info; -struct wlc_bsscfg; -struct wlc_if; - -/*********************************************** - * Feature-related macros to optimize out code * - * ********************************************* - */ - -/* AP Support (versus STA) */ -#define AP_ENAB(pub) (0) - -/* Macro to check if APSTA mode enabled */ -#define APSTA_ENAB(pub) (0) - -/* Some useful combinations */ -#define STA_ONLY(pub) (!AP_ENAB(pub)) -#define AP_ONLY(pub) (AP_ENAB(pub) && !APSTA_ENAB(pub)) - -#define ENAB_1x1 0x01 -#define ENAB_2x2 0x02 -#define ENAB_3x3 0x04 -#define ENAB_4x4 0x08 -#define SUPPORT_11N (ENAB_1x1|ENAB_2x2) -#define SUPPORT_HT (ENAB_1x1|ENAB_2x2|ENAB_3x3) -/* WL11N Support */ -#if ((defined(NCONF) && (NCONF != 0)) || (defined(LCNCONF) && (LCNCONF != 0)) || \ - (defined(HTCONF) && (HTCONF != 0)) || (defined(SSLPNCONF) && (SSLPNCONF != 0))) -#define N_ENAB(pub) ((pub)->_n_enab & SUPPORT_11N) -#define N_REQD(pub) ((pub)->_n_reqd) -#else -#define N_ENAB(pub) 0 -#define N_REQD(pub) 0 -#endif - -#if (defined(HTCONF) && (HTCONF != 0)) -#define HT_ENAB(pub) (((pub)->_n_enab & SUPPORT_HT) == SUPPORT_HT) -#else -#define HT_ENAB(pub) 0 -#endif - -#define AMPDU_AGG_HOST 1 -#define AMPDU_ENAB(pub) ((pub)->_ampdu) - -#define EDCF_ENAB(pub) (WME_ENAB(pub)) -#define QOS_ENAB(pub) (WME_ENAB(pub) || N_ENAB(pub)) - -#define MONITOR_ENAB(wlc) ((wlc)->monitor) - -#define PROMISC_ENAB(wlc) ((wlc)->promisc) - -#define WLC_PREC_COUNT 16 /* Max precedence level implemented */ - -/* pri is priority encoded in the packet. This maps the Packet priority to - * enqueue precedence as defined in wlc_prec_map - */ -extern const u8 wlc_prio2prec_map[]; -#define WLC_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7] - -/* This maps priority to one precedence higher - Used by PS-Poll response packets to - * simulate enqueue-at-head operation, but still maintain the order on the queue - */ -#define WLC_PRIO_TO_HI_PREC(pri) min(WLC_PRIO_TO_PREC(pri) + 1, WLC_PREC_COUNT - 1) - -extern const u8 wme_fifo2ac[]; -#define WME_PRIO2AC(prio) wme_fifo2ac[prio2fifo[(prio)]] - -/* Mask to describe all precedence levels */ -#define WLC_PREC_BMP_ALL MAXBITVAL(WLC_PREC_COUNT) - -/* Define a bitmap of precedences comprised by each AC */ -#define WLC_PREC_BMP_AC_BE (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_EE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_EE))) -#define WLC_PREC_BMP_AC_BK (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BK)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NONE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NONE))) -#define WLC_PREC_BMP_AC_VI (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_CL)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VI)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VI))) -#define WLC_PREC_BMP_AC_VO (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VO)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NC)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NC))) - -/* WME Support */ -#define WME_ENAB(pub) ((pub)->_wme != OFF) -#define WME_AUTO(wlc) ((wlc)->pub->_wme == AUTO) - -#define WLC_USE_COREFLAGS 0xffffffff /* invalid core flags, use the saved coreflags */ - - -/* network protection config */ -#define WLC_PROT_G_SPEC 1 /* SPEC g protection */ -#define WLC_PROT_G_OVR 2 /* SPEC g prot override */ -#define WLC_PROT_G_USER 3 /* gmode specified by user */ -#define WLC_PROT_OVERLAP 4 /* overlap */ -#define WLC_PROT_N_USER 10 /* nmode specified by user */ -#define WLC_PROT_N_CFG 11 /* n protection */ -#define WLC_PROT_N_CFG_OVR 12 /* n protection override */ -#define WLC_PROT_N_NONGF 13 /* non-GF protection */ -#define WLC_PROT_N_NONGF_OVR 14 /* non-GF protection override */ -#define WLC_PROT_N_PAM_OVR 15 /* n preamble override */ -#define WLC_PROT_N_OBSS 16 /* non-HT OBSS present */ - -/* - * 54g modes (basic bits may still be overridden) - * - * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 - * Preamble: Long - * Shortslot: Off - * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: Auto - * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 - * Extended Rateset: 6b, 9, 12b, 48 - * Preamble: Short required - * Shortslot: Auto - * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: On - * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 - * Preamble: Short required - * Shortslot: On and required - * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b - * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 - * Preamble: Long - * Shortslot: Auto - */ -#define GMODE_LEGACY_B 0 -#define GMODE_AUTO 1 -#define GMODE_ONLY 2 -#define GMODE_B_DEFERRED 3 -#define GMODE_PERFORMANCE 4 -#define GMODE_LRS 5 -#define GMODE_MAX 6 - -/* values for PLCPHdr_override */ -#define WLC_PLCP_AUTO -1 -#define WLC_PLCP_SHORT 0 -#define WLC_PLCP_LONG 1 - -/* values for g_protection_override and n_protection_override */ -#define WLC_PROTECTION_AUTO -1 -#define WLC_PROTECTION_OFF 0 -#define WLC_PROTECTION_ON 1 -#define WLC_PROTECTION_MMHDR_ONLY 2 -#define WLC_PROTECTION_CTS_ONLY 3 - -/* values for g_protection_control and n_protection_control */ -#define WLC_PROTECTION_CTL_OFF 0 -#define WLC_PROTECTION_CTL_LOCAL 1 -#define WLC_PROTECTION_CTL_OVERLAP 2 - -/* values for n_protection */ -#define WLC_N_PROTECTION_OFF 0 -#define WLC_N_PROTECTION_OPTIONAL 1 -#define WLC_N_PROTECTION_20IN40 2 -#define WLC_N_PROTECTION_MIXEDMODE 3 - -/* values for band specific 40MHz capabilities */ -#define WLC_N_BW_20ALL 0 -#define WLC_N_BW_40ALL 1 -#define WLC_N_BW_20IN2G_40IN5G 2 - -/* bitflags for SGI support (sgi_rx iovar) */ -#define WLC_N_SGI_20 0x01 -#define WLC_N_SGI_40 0x02 - -/* defines used by the nrate iovar */ -#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ -#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ -#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ -#define NRATE_STF_SHIFT 8 /* stf mode shift */ -#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ -#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ -#define NRATE_SGI_SHIFT 23 /* sgi mode */ -#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ -#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ - -#define NRATE_STF_SISO 0 /* stf mode SISO */ -#define NRATE_STF_CDD 1 /* stf mode CDD */ -#define NRATE_STF_STBC 2 /* stf mode STBC */ -#define NRATE_STF_SDM 3 /* stf mode SDM */ - -#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ - -#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ - -typedef struct { - u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ - u8 num_antcfg; /* number of available antenna configurations */ -} wlc_antselcfg_t; - -/* common functions for every port */ -extern void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, - uint unit, bool piomode, void *regsva, uint bustype, - void *btparam, uint *perr); -extern uint wlc_detach(struct wlc_info *wlc); -extern int wlc_up(struct wlc_info *wlc); -extern uint wlc_down(struct wlc_info *wlc); - -extern int wlc_set(struct wlc_info *wlc, int cmd, int arg); -extern int wlc_get(struct wlc_info *wlc, int cmd, int *arg); -extern bool wlc_chipmatch(u16 vendor, u16 device); -extern void wlc_init(struct wlc_info *wlc); -extern void wlc_reset(struct wlc_info *wlc); - -extern void wlc_intrson(struct wlc_info *wlc); -extern u32 wlc_intrsoff(struct wlc_info *wlc); -extern void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask); -extern bool wlc_intrsupd(struct wlc_info *wlc); -extern bool wlc_isr(struct wlc_info *wlc, bool *wantdpc); -extern bool wlc_dpc(struct wlc_info *wlc, bool bounded); -extern bool wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, - struct ieee80211_hw *hw); -extern int wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif); -extern bool wlc_aggregatable(struct wlc_info *wlc, u8 tid); - -/* helper functions */ -extern void wlc_statsupd(struct wlc_info *wlc); -extern void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val); -extern int wlc_get_header_len(void); -extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); -extern void wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, - const u8 *addr); -extern void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, - const struct ieee80211_tx_queue_params *arg, - bool suspend); -extern struct wlc_pub *wlc_pub(void *wlc); - -/* common functions for every port */ -extern void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, - int bands); -extern void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset); -extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs); - -struct ieee80211_sta; -extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta, - u16 tid); -extern int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val); -extern int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr); -extern char *getvar(char *vars, const char *name); -extern int getintvar(char *vars, const char *name); - -/* wlc_phy.c helper functions */ -extern void wlc_set_ps_ctrl(struct wlc_info *wlc); -extern void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val); - -extern int wlc_module_register(struct wlc_pub *pub, - const char *name, void *hdl, - watchdog_fn_t watchdog_fn, down_fn_t down_fn); -extern int wlc_module_unregister(struct wlc_pub *pub, const char *name, - void *hdl); -extern void wlc_suspend_mac_and_wait(struct wlc_info *wlc); -extern void wlc_enable_mac(struct wlc_info *wlc); -extern void wlc_associate_upd(struct wlc_info *wlc, bool state); -extern void wlc_scan_start(struct wlc_info *wlc); -extern void wlc_scan_stop(struct wlc_info *wlc); -extern int wlc_get_curband(struct wlc_info *wlc); -extern void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop); - -/* helper functions */ -extern bool wlc_check_radio_disabled(struct wlc_info *wlc); -extern bool wlc_radio_monitor_stop(struct wlc_info *wlc); - -#define MAXBANDS 2 /* Maximum #of bands */ -/* bandstate array indices */ -#define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */ -#define BAND_5G_INDEX 1 /* wlc->bandstate[x] index */ - -#define BAND_2G_NAME "2.4G" -#define BAND_5G_NAME "5G" - -/* BMAC RPC: 7 u32 params: pkttotlen, fifo, commit, fid, txpktpend, pktflag, rpc_id */ -#define WLC_RPCTX_PARAMS 32 - -#endif /* _BRCM_PUB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/wlc_rate.c deleted file mode 100644 index 3625c72..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ /dev/null @@ -1,496 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include -#include - -#include -#include -#include -#include "bcmdma.h" - -#include "wlc_types.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_rate.h" - -/* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */ -const u8 rate_info[WLC_MAXRATE + 1] = { - /* 0 1 2 3 4 5 6 7 8 9 */ -/* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00, -/* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00, -/* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, -/* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -/* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, -/* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c -}; - -/* rates are in units of Kbps */ -const mcs_info_t mcs_table[MCS_TABLE_SIZE] = { - /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */ - {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00, - WLC_RATE_6M}, - /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */ - {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08, - WLC_RATE_12M}, - /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */ - {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A, - WLC_RATE_18M}, - /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */ - {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10, - WLC_RATE_24M}, - /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */ - {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12, - WLC_RATE_36M}, - /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */ - {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19, - WLC_RATE_48M}, - /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */ - {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A, - WLC_RATE_54M}, - /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */ - {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C, - WLC_RATE_54M}, - /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */ - {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40, - WLC_RATE_6M}, - /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */ - {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48, - WLC_RATE_12M}, - /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */ - {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A, - WLC_RATE_18M}, - /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */ - {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50, - WLC_RATE_24M}, - /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */ - {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52, - WLC_RATE_36M}, - /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */ - {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59, - WLC_RATE_48M}, - /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */ - {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A, - WLC_RATE_54M}, - /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */ - {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C, - WLC_RATE_54M}, - /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */ - {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80, - WLC_RATE_6M}, - /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */ - {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88, - WLC_RATE_12M}, - /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */ - {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A, - WLC_RATE_18M}, - /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */ - {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90, - WLC_RATE_24M}, - /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */ - {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92, - WLC_RATE_36M}, - /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */ - {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99, - WLC_RATE_48M}, - /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */ - {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A, - WLC_RATE_54M}, - /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */ - {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B, - WLC_RATE_54M}, - /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */ - {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0, - WLC_RATE_6M}, - /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */ - {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8, - WLC_RATE_12M}, - /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */ - {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA, - WLC_RATE_18M}, - /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */ - {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0, - WLC_RATE_24M}, - /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */ - {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2, - WLC_RATE_36M}, - /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */ - {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9, - WLC_RATE_48M}, - /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */ - {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA, - WLC_RATE_54M}, - /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */ - {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB, - WLC_RATE_54M}, - /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */ - {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, WLC_RATE_6M}, -}; - -/* phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams - * Number of spatial streams: always 1 - * other fields: refer to table 78 of section 17.3.2.2 of the original .11a standard - */ -typedef struct legacy_phycfg { - u32 rate_ofdm; /* ofdm mac rate */ - u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ -} legacy_phycfg_t; - -#define LEGACY_PHYCFG_TABLE_SIZE 12 /* Number of legacy_rate_cfg entries in the table */ - -/* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ -/* Eventually MIMOPHY would also be converted to this format */ -/* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ -static const legacy_phycfg_t legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = { - {WLC_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */ - {WLC_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */ - {WLC_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */ - {WLC_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */ - {WLC_RATE_6M, 0x00}, /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */ - {WLC_RATE_9M, 0x02}, /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */ - {WLC_RATE_12M, 0x08}, /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */ - {WLC_RATE_18M, 0x0A}, /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */ - {WLC_RATE_24M, 0x10}, /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */ - {WLC_RATE_36M, 0x12}, /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */ - {WLC_RATE_48M, 0x19}, /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */ - {WLC_RATE_54M, 0x1A}, /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */ -}; - -/* Hardware rates (also encodes default basic rates) */ - -const wlc_rateset_t cck_ofdm_mimo_rates = { - 12, - { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ - 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, - 0x6c}, - 0x00, - {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t ofdm_mimo_rates = { - 8, - { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ - 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, - 0x00, - {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -/* Default ratesets that include MCS32 for 40BW channels */ -const wlc_rateset_t cck_ofdm_40bw_mimo_rates = { - 12, - { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ - 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, - 0x6c}, - 0x00, - {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t ofdm_40bw_mimo_rates = { - 8, - { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ - 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, - 0x00, - {0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t cck_ofdm_rates = { - 12, - { /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, 54 Mbps */ - 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60, - 0x6c}, - 0x00, - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t gphy_legacy_rates = { - 4, - { /* 1b, 2b, 5.5b, 11b Mbps */ - 0x82, 0x84, 0x8b, 0x96}, - 0x00, - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t ofdm_rates = { - 8, - { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ - 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c}, - 0x00, - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -const wlc_rateset_t cck_rates = { - 4, - { /* 1b, 2b, 5.5, 11 Mbps */ - 0x82, 0x84, 0x0b, 0x16}, - 0x00, - {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00} -}; - -static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate); - -/* check if rateset is valid. - * if check_brate is true, rateset without a basic rate is considered NOT valid. - */ -static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate) -{ - uint idx; - - if (!rs->count) - return false; - - if (!check_brate) - return true; - - /* error if no basic rates */ - for (idx = 0; idx < rs->count; idx++) { - if (rs->rates[idx] & WLC_RATE_FLAG) - return true; - } - return false; -} - -void wlc_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams) -{ - int i; - for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++) - rs->mcs[i] = 0; -} - -/* filter based on hardware rateset, and sort filtered rateset with basic bit(s) preserved, - * and check if resulting rateset is valid. -*/ -bool -wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, - const wlc_rateset_t *hw_rs, - bool check_brate, u8 txstreams) -{ - u8 rateset[WLC_MAXRATE + 1]; - u8 r; - uint count; - uint i; - - memset(rateset, 0, sizeof(rateset)); - count = rs->count; - - for (i = 0; i < count; i++) { - /* mask off "basic rate" bit, WLC_RATE_FLAG */ - r = (int)rs->rates[i] & WLC_RATE_MASK; - if ((r > WLC_MAXRATE) || (rate_info[r] == 0)) { - continue; - } - rateset[r] = rs->rates[i]; /* preserve basic bit! */ - } - - /* fill out the rates in order, looking at only supported rates */ - count = 0; - for (i = 0; i < hw_rs->count; i++) { - r = hw_rs->rates[i] & WLC_RATE_MASK; - if (rateset[r]) - rs->rates[count++] = rateset[r]; - } - - rs->count = count; - - /* only set the mcs rate bit if the equivalent hw mcs bit is set */ - for (i = 0; i < MCSSET_LEN; i++) - rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]); - - if (wlc_rateset_valid(rs, check_brate)) - return true; - else - return false; -} - -/* calculate the rate of a rx'd frame and return it as a ratespec */ -ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp) -{ - int phy_type; - ratespec_t rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT; - - phy_type = - ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT); - - if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) || - (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) { - switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) { - case PRXS0_CCK: - rspec = - CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); - break; - case PRXS0_OFDM: - rspec = - OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)-> - rlpt[0]); - break; - case PRXS0_PREN: - rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE; - if (plcp[0] & MIMO_PLCP_40MHZ) { - /* indicate rspec is for 40 MHz mode */ - rspec &= ~RSPEC_BW_MASK; - rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT); - } - break; - case PRXS0_STDN: - /* fallthru */ - default: - /* not supported, error condition */ - break; - } - if (PLCP3_ISSGI(plcp[3])) - rspec |= RSPEC_SHORT_GI; - } else - if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM)) - rspec = OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->rlpt[0]); - else - rspec = CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); - - return rspec; -} - -/* copy rateset src to dst as-is (no masking or sorting) */ -void wlc_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst) -{ - memcpy(dst, src, sizeof(wlc_rateset_t)); -} - -/* - * Copy and selectively filter one rateset to another. - * 'basic_only' means only copy basic rates. - * 'rates' indicates cck (11b) and ofdm rates combinations. - * - 0: cck and ofdm - * - 1: cck only - * - 2: ofdm only - * 'xmask' is the copy mask (typically 0x7f or 0xff). - */ -void -wlc_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only, - u8 rates, uint xmask, bool mcsallow) -{ - uint i; - uint r; - uint count; - - count = 0; - for (i = 0; i < src->count; i++) { - r = src->rates[i]; - if (basic_only && !(r & WLC_RATE_FLAG)) - continue; - if ((rates == WLC_RATES_CCK) && IS_OFDM((r & WLC_RATE_MASK))) - continue; - if ((rates == WLC_RATES_OFDM) && IS_CCK((r & WLC_RATE_MASK))) - continue; - dst->rates[count++] = r & xmask; - } - dst->count = count; - dst->htphy_membership = src->htphy_membership; - - if (mcsallow && rates != WLC_RATES_CCK) - memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN); - else - wlc_rateset_mcs_clear(dst); -} - -/* select rateset for a given phy_type and bandtype and filter it, sort it - * and fill rs_tgt with result - */ -void -wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, - uint phy_type, int bandtype, bool cck_only, uint rate_mask, - bool mcsallow, u8 bw, u8 txstreams) -{ - const wlc_rateset_t *rs_dflt; - wlc_rateset_t rs_sel; - if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) || - (PHYTYPE_IS(phy_type, PHY_TYPE_N)) || - (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) || - (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) { - if (BAND_5G(bandtype)) { - rs_dflt = (bw == WLC_20_MHZ ? - &ofdm_mimo_rates : &ofdm_40bw_mimo_rates); - } else { - rs_dflt = (bw == WLC_20_MHZ ? - &cck_ofdm_mimo_rates : - &cck_ofdm_40bw_mimo_rates); - } - } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) { - rs_dflt = (BAND_5G(bandtype)) ? &ofdm_rates : &cck_ofdm_rates; - } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) { - rs_dflt = &ofdm_rates; - } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) { - rs_dflt = &cck_ofdm_rates; - } else { - /* should not happen, error condition */ - rs_dflt = &cck_rates; /* force cck */ - } - - /* if hw rateset is not supplied, assign selected rateset to it */ - if (!rs_hw) - rs_hw = rs_dflt; - - wlc_rateset_copy(rs_dflt, &rs_sel); - wlc_rateset_mcs_upd(&rs_sel, txstreams); - wlc_rateset_filter(&rs_sel, rs_tgt, false, - cck_only ? WLC_RATES_CCK : WLC_RATES_CCK_OFDM, - rate_mask, mcsallow); - wlc_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false, - mcsallow ? txstreams : 1); -} - -s16 wlc_rate_legacy_phyctl(uint rate) -{ - uint i; - for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++) - if (rate == legacy_phycfg_table[i].rate_ofdm) - return legacy_phycfg_table[i].tx_phy_ctl3; - - return -1; -} - -void wlc_rateset_mcs_clear(wlc_rateset_t *rateset) -{ - uint i; - for (i = 0; i < MCSSET_LEN; i++) - rateset->mcs[i] = 0; -} - -void wlc_rateset_mcs_build(wlc_rateset_t *rateset, u8 txstreams) -{ - memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN); - wlc_rateset_mcs_upd(rateset, txstreams); -} - -/* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */ -void wlc_rateset_bw_mcs_filter(wlc_rateset_t *rateset, u8 bw) -{ - if (bw == WLC_40_MHZ) - setbit(rateset->mcs, 32); - else - clrbit(rateset->mcs, 32); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h b/drivers/staging/brcm80211/brcmsmac/wlc_rate.h deleted file mode 100644 index 5575e83..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _WLC_RATE_H_ -#define _WLC_RATE_H_ - -extern const u8 rate_info[]; -extern const struct wlc_rateset cck_ofdm_mimo_rates; -extern const struct wlc_rateset ofdm_mimo_rates; -extern const struct wlc_rateset cck_ofdm_rates; -extern const struct wlc_rateset ofdm_rates; -extern const struct wlc_rateset cck_rates; -extern const struct wlc_rateset gphy_legacy_rates; -extern const struct wlc_rateset wlc_lrs_rates; -extern const struct wlc_rateset rate_limit_1_2; - -typedef struct mcs_info { - u32 phy_rate_20; /* phy rate in kbps [20Mhz] */ - u32 phy_rate_40; /* phy rate in kbps [40Mhz] */ - u32 phy_rate_20_sgi; /* phy rate in kbps [20Mhz] with SGI */ - u32 phy_rate_40_sgi; /* phy rate in kbps [40Mhz] with SGI */ - u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ - u8 leg_ofdm; /* matching legacy ofdm rate in 500bkps */ -} mcs_info_t; - -#define WLC_MAXMCS 32 /* max valid mcs index */ -#define MCS_TABLE_SIZE 33 /* Number of mcs entries in the table */ -extern const mcs_info_t mcs_table[]; - -#define MCS_INVALID 0xFF -#define MCS_CR_MASK 0x07 /* Code Rate bit mask */ -#define MCS_MOD_MASK 0x38 /* Modulation bit shift */ -#define MCS_MOD_SHIFT 3 /* MOdulation bit shift */ -#define MCS_TXS_MASK 0xc0 /* num tx streams - 1 bit mask */ -#define MCS_TXS_SHIFT 6 /* num tx streams - 1 bit shift */ -#define MCS_CR(_mcs) (mcs_table[_mcs].tx_phy_ctl3 & MCS_CR_MASK) -#define MCS_MOD(_mcs) ((mcs_table[_mcs].tx_phy_ctl3 & MCS_MOD_MASK) >> MCS_MOD_SHIFT) -#define MCS_TXS(_mcs) ((mcs_table[_mcs].tx_phy_ctl3 & MCS_TXS_MASK) >> MCS_TXS_SHIFT) -#define MCS_RATE(_mcs, _is40, _sgi) (_sgi ? \ - (_is40 ? mcs_table[_mcs].phy_rate_40_sgi : mcs_table[_mcs].phy_rate_20_sgi) : \ - (_is40 ? mcs_table[_mcs].phy_rate_40 : mcs_table[_mcs].phy_rate_20)) -#define VALID_MCS(_mcs) ((_mcs < MCS_TABLE_SIZE)) - -/* Macro to use the rate_info table */ -#define WLC_RATE_MASK_FULL 0xff /* Rate value mask with basic rate flag */ - -#define WLC_RATE_500K_TO_BPS(rate) ((rate) * 500000) /* convert 500kbps to bps */ - -/* rate spec : holds rate and mode specific information required to generate a tx frame. */ -/* Legacy CCK and OFDM information is held in the same manner as was done in the past */ -/* (in the lower byte) the upper 3 bytes primarily hold MIMO specific information */ -typedef u32 ratespec_t; - -/* rate spec bit fields */ -#define RSPEC_RATE_MASK 0x0000007F /* Either 500Kbps units or MIMO MCS idx */ -#define RSPEC_MIMORATE 0x08000000 /* mimo MCS is stored in RSPEC_RATE_MASK */ -#define RSPEC_BW_MASK 0x00000700 /* mimo bw mask */ -#define RSPEC_BW_SHIFT 8 /* mimo bw shift */ -#define RSPEC_STF_MASK 0x00003800 /* mimo Space/Time/Frequency mode mask */ -#define RSPEC_STF_SHIFT 11 /* mimo Space/Time/Frequency mode shift */ -#define RSPEC_CT_MASK 0x0000C000 /* mimo coding type mask */ -#define RSPEC_CT_SHIFT 14 /* mimo coding type shift */ -#define RSPEC_STC_MASK 0x00300000 /* mimo num STC streams per PLCP defn. */ -#define RSPEC_STC_SHIFT 20 /* mimo num STC streams per PLCP defn. */ -#define RSPEC_LDPC_CODING 0x00400000 /* mimo bit indicates adv coding in use */ -#define RSPEC_SHORT_GI 0x00800000 /* mimo bit indicates short GI in use */ -#define RSPEC_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define RSPEC_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicates override rate only */ - -#define WLC_HTPHY 127 /* HT PHY Membership */ - -#define RSPEC_ACTIVE(rspec) (rspec & (RSPEC_RATE_MASK | RSPEC_MIMORATE)) -#define RSPEC2RATE(rspec) ((rspec & RSPEC_MIMORATE) ? \ - MCS_RATE((rspec & RSPEC_RATE_MASK), RSPEC_IS40MHZ(rspec), RSPEC_ISSGI(rspec)) : \ - (rspec & RSPEC_RATE_MASK)) -/* return rate in unit of 500Kbps -- for internal use in wlc_rate_sel.c */ -#define RSPEC2RATE500K(rspec) ((rspec & RSPEC_MIMORATE) ? \ - MCS_RATE((rspec & RSPEC_RATE_MASK), state->is40bw, RSPEC_ISSGI(rspec))/500 : \ - (rspec & RSPEC_RATE_MASK)) -#define CRSPEC2RATE500K(rspec) ((rspec & RSPEC_MIMORATE) ? \ - MCS_RATE((rspec & RSPEC_RATE_MASK), RSPEC_IS40MHZ(rspec), RSPEC_ISSGI(rspec))/500 :\ - (rspec & RSPEC_RATE_MASK)) - -#define RSPEC2KBPS(rspec) (IS_MCS(rspec) ? RSPEC2RATE(rspec) : RSPEC2RATE(rspec)*500) -#define RSPEC_PHYTXBYTE2(rspec) ((rspec & 0xff00) >> 8) -#define RSPEC_GET_BW(rspec) ((rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT) -#define RSPEC_IS40MHZ(rspec) ((((rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT) == \ - PHY_TXC1_BW_40MHZ) || (((rspec & RSPEC_BW_MASK) >> \ - RSPEC_BW_SHIFT) == PHY_TXC1_BW_40MHZ_DUP)) -#define RSPEC_ISSGI(rspec) ((rspec & RSPEC_SHORT_GI) == RSPEC_SHORT_GI) -#define RSPEC_MIMOPLCP3(rspec) ((rspec & 0xf00000) >> 16) -#define PLCP3_ISSGI(plcp) (plcp & (RSPEC_SHORT_GI >> 16)) -#define RSPEC_STC(rspec) ((rspec & RSPEC_STC_MASK) >> RSPEC_STC_SHIFT) -#define RSPEC_STF(rspec) ((rspec & RSPEC_STF_MASK) >> RSPEC_STF_SHIFT) -#define PLCP3_ISSTBC(plcp) ((plcp & (RSPEC_STC_MASK) >> 16) == 0x10) -#define PLCP3_STC_MASK 0x30 -#define PLCP3_STC_SHIFT 4 - -/* Rate info table; takes a legacy rate or ratespec_t */ -#define IS_MCS(r) (r & RSPEC_MIMORATE) -#define IS_OFDM(r) (!IS_MCS(r) && (rate_info[(r) & RSPEC_RATE_MASK] & WLC_RATE_FLAG)) -#define IS_CCK(r) (!IS_MCS(r) && ( \ - ((r) & WLC_RATE_MASK) == WLC_RATE_1M || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_2M || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_5M5 || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_11M)) -#define IS_SINGLE_STREAM(mcs) (((mcs) <= HIGHEST_SINGLE_STREAM_MCS) || ((mcs) == 32)) -#define CCK_RSPEC(cck) ((cck) & RSPEC_RATE_MASK) -#define OFDM_RSPEC(ofdm) (((ofdm) & RSPEC_RATE_MASK) |\ - (PHY_TXC1_MODE_CDD << RSPEC_STF_SHIFT)) -#define LEGACY_RSPEC(rate) (IS_CCK(rate) ? CCK_RSPEC(rate) : OFDM_RSPEC(rate)) - -#define MCS_RSPEC(mcs) (((mcs) & RSPEC_RATE_MASK) | RSPEC_MIMORATE | \ - (IS_SINGLE_STREAM(mcs) ? (PHY_TXC1_MODE_CDD << RSPEC_STF_SHIFT) : \ - (PHY_TXC1_MODE_SDM << RSPEC_STF_SHIFT))) - -/* Convert encoded rate value in plcp header to numerical rates in 500 KHz increments */ -extern const u8 ofdm_rate_lookup[]; -#define OFDM_PHY2MAC_RATE(rlpt) (ofdm_rate_lookup[rlpt & 0x7]) -#define CCK_PHY2MAC_RATE(signal) (signal/5) - -/* Rates specified in wlc_rateset_filter() */ -#define WLC_RATES_CCK_OFDM 0 -#define WLC_RATES_CCK 1 -#define WLC_RATES_OFDM 2 - -/* use the stuct form instead of typedef to fix dependency problems */ -struct wlc_rateset; - -/* sanitize, and sort a rateset with the basic bit(s) preserved, validate rateset */ -extern bool wlc_rate_hwrs_filter_sort_validate(struct wlc_rateset *rs, - const struct wlc_rateset *hw_rs, - bool check_brate, - u8 txstreams); -/* copy rateset src to dst as-is (no masking or sorting) */ -extern void wlc_rateset_copy(const struct wlc_rateset *src, - struct wlc_rateset *dst); - -/* would be nice to have these documented ... */ -extern ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp); - -extern void wlc_rateset_filter(struct wlc_rateset *src, struct wlc_rateset *dst, - bool basic_only, u8 rates, uint xmask, - bool mcsallow); -extern void wlc_rateset_default(struct wlc_rateset *rs_tgt, - const struct wlc_rateset *rs_hw, uint phy_type, - int bandtype, bool cck_only, uint rate_mask, - bool mcsallow, u8 bw, u8 txstreams); -extern s16 wlc_rate_legacy_phyctl(uint rate); - -extern void wlc_rateset_mcs_upd(struct wlc_rateset *rs, u8 txstreams); -extern void wlc_rateset_mcs_clear(struct wlc_rateset *rateset); -extern void wlc_rateset_mcs_build(struct wlc_rateset *rateset, u8 txstreams); -extern void wlc_rateset_bw_mcs_filter(struct wlc_rateset *rateset, u8 bw); - -#endif /* _WLC_RATE_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h b/drivers/staging/brcm80211/brcmsmac/wlc_scb.h deleted file mode 100644 index dcad9d0..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SCB_H_ -#define _BRCM_SCB_H_ - -#include /* for ETH_ALEN */ - -#define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ -/* structure to store per-tid state for the ampdu initiator */ -typedef struct scb_ampdu_tid_ini { - u32 magic; - u8 tx_in_transit; /* number of pending mpdus in transit in driver */ - u8 tid; /* initiator tid for easy lookup */ - u8 txretry[AMPDU_TX_BA_MAX_WSIZE]; /* tx retry count; indexed by seq modulo */ - struct scb *scb; /* backptr for easy lookup */ -} scb_ampdu_tid_ini_t; - -#define AMPDU_MAX_SCB_TID NUMPRIO - -typedef struct scb_ampdu { - struct scb *scb; /* back pointer for easy reference */ - u8 mpdu_density; /* mpdu density */ - u8 max_pdu; /* max pdus allowed in ampdu */ - u8 release; /* # of mpdus released at a time */ - u16 min_len; /* min mpdu len to support the density */ - u32 max_rxlen; /* max ampdu rcv length; 8k, 16k, 32k, 64k */ - struct pktq txq; /* sdu transmit queue pending aggregation */ - - /* This could easily be a ini[] pointer and we keep this info in wl itself instead - * of having mac80211 hold it for us. Also could be made dynamic per tid instead of - * static. - */ - scb_ampdu_tid_ini_t ini[AMPDU_MAX_SCB_TID]; /* initiator info - per tid (NUMPRIO) */ -} scb_ampdu_t; - -#define SCB_MAGIC 0xbeefcafe -#define INI_MAGIC 0xabcd1234 - -/* station control block - one per remote MAC address */ -struct scb { - u32 magic; - u32 flags; /* various bit flags as defined below */ - u32 flags2; /* various bit flags2 as defined below */ - u8 state; /* current state bitfield of auth/assoc process */ - u8 ea[ETH_ALEN]; /* station address */ - void *fragbuf[NUMPRIO]; /* defragmentation buffer per prio */ - uint fragresid[NUMPRIO]; /* #bytes unused in frag buffer per prio */ - - u16 seqctl[NUMPRIO]; /* seqctl of last received frame (for dups) */ - u16 seqctl_nonqos; /* seqctl of last received frame (for dups) for - * non-QoS data and management - */ - u16 seqnum[NUMPRIO]; /* WME: driver maintained sw seqnum per priority */ - - scb_ampdu_t scb_ampdu; /* AMPDU state including per tid info */ -}; - -/* scb flags */ -#define SCB_WMECAP 0x0040 /* may ONLY be set if WME_ENAB(wlc) */ -#define SCB_HTCAP 0x10000 /* HT (MIMO) capable device */ -#define SCB_IS40 0x80000 /* 40MHz capable */ -#define SCB_STBCCAP 0x40000000 /* STBC Capable */ -#define SCB_WME(a) ((a)->flags & SCB_WMECAP)/* implies WME_ENAB */ -#define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)]) -#define SCB_PS(a) NULL -#define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP) -#define SCB_AMPDU(a) true -#endif /* _BRCM_SCB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/wlc_stf.c deleted file mode 100644 index 697da28..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ /dev/null @@ -1,484 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include -#include - -#include -#include -#include -#include -#include "bcmdma.h" - -#include "wlc_types.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_bmac.h" -#include "wlc_stf.h" - -#define MIN_SPATIAL_EXPANSION 0 -#define MAX_SPATIAL_EXPANSION 1 - -#define WLC_STF_SS_STBC_RX(wlc) (WLCISNPHY(wlc->band) && \ - NREV_GT(wlc->band->phyrev, 3) && NREV_LE(wlc->band->phyrev, 6)) - -static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val); -static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 val); -static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val); -static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val); - -static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc); -static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); - -#define NSTS_1 1 -#define NSTS_2 2 -#define NSTS_3 3 -#define NSTS_4 4 -const u8 txcore_default[5] = { - (0), /* bitmap of the core enabled */ - (0x01), /* For Nsts = 1, enable core 1 */ - (0x03), /* For Nsts = 2, enable core 1 & 2 */ - (0x07), /* For Nsts = 3, enable core 1, 2 & 3 */ - (0x0f) /* For Nsts = 4, enable all cores */ -}; - -static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val) -{ - /* MIMOPHYs rev3-6 cannot receive STBC with only one rx core active */ - if (WLC_STF_SS_STBC_RX(wlc)) { - if ((wlc->stf->rxstreams == 1) && (val != HT_CAP_RX_STBC_NO)) - return; - } - - wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_RX_STBC; - wlc->ht_cap.cap_info |= (val << IEEE80211_HT_CAP_RX_STBC_SHIFT); - - if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } -} - -/* every WLC_TEMPSENSE_PERIOD seconds temperature check to decide whether to turn on/off txchain */ -void wlc_tempsense_upd(struct wlc_info *wlc) -{ - wlc_phy_t *pi = wlc->band->pi; - uint active_chains, txchain; - - /* Check if the chip is too hot. Disable one Tx chain, if it is */ - /* high 4 bits are for Rx chain, low 4 bits are for Tx chain */ - active_chains = wlc_phy_stf_chain_active_get(pi); - txchain = active_chains & 0xf; - - if (wlc->stf->txchain == wlc->stf->hw_txchain) { - if (txchain && (txchain < wlc->stf->hw_txchain)) { - /* turn off 1 tx chain */ - wlc_stf_txchain_set(wlc, txchain, true); - } - } else if (wlc->stf->txchain < wlc->stf->hw_txchain) { - if (txchain == wlc->stf->hw_txchain) { - /* turn back on txchain */ - wlc_stf_txchain_set(wlc, txchain, true); - } - } -} - -void -wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, u16 *ss_algo_channel, - chanspec_t chanspec) -{ - tx_power_t power; - u8 siso_mcs_id, cdd_mcs_id, stbc_mcs_id; - - /* Clear previous settings */ - *ss_algo_channel = 0; - - if (!wlc->pub->up) { - *ss_algo_channel = (u16) -1; - return; - } - - wlc_phy_txpower_get_current(wlc->band->pi, &power, - CHSPEC_CHANNEL(chanspec)); - - siso_mcs_id = (CHSPEC_IS40(chanspec)) ? - WL_TX_POWER_MCS40_SISO_FIRST : WL_TX_POWER_MCS20_SISO_FIRST; - cdd_mcs_id = (CHSPEC_IS40(chanspec)) ? - WL_TX_POWER_MCS40_CDD_FIRST : WL_TX_POWER_MCS20_CDD_FIRST; - stbc_mcs_id = (CHSPEC_IS40(chanspec)) ? - WL_TX_POWER_MCS40_STBC_FIRST : WL_TX_POWER_MCS20_STBC_FIRST; - - /* criteria to choose stf mode */ - - /* the "+3dbm (12 0.25db units)" is to account for the fact that with CDD, tx occurs - * on both chains - */ - if (power.target[siso_mcs_id] > (power.target[cdd_mcs_id] + 12)) - setbit(ss_algo_channel, PHY_TXC1_MODE_SISO); - else - setbit(ss_algo_channel, PHY_TXC1_MODE_CDD); - - /* STBC is ORed into to algo channel as STBC requires per-packet SCB capability check - * so cannot be default mode of operation. One of SISO, CDD have to be set - */ - if (power.target[siso_mcs_id] <= (power.target[stbc_mcs_id] + 12)) - setbit(ss_algo_channel, PHY_TXC1_MODE_STBC); -} - -static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val) -{ - if ((int_val != AUTO) && (int_val != OFF) && (int_val != ON)) { - return false; - } - - if ((int_val == ON) && (wlc->stf->txstreams == 1)) - return false; - - if ((int_val == OFF) || (wlc->stf->txstreams == 1) - || !WLC_STBC_CAP_PHY(wlc)) - wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; - else - wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_TX_STBC; - - wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = (s8) int_val; - wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = (s8) int_val; - - return true; -} - -bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val) -{ - if ((int_val != HT_CAP_RX_STBC_NO) - && (int_val != HT_CAP_RX_STBC_ONE_STREAM)) { - return false; - } - - if (WLC_STF_SS_STBC_RX(wlc)) { - if ((int_val != HT_CAP_RX_STBC_NO) - && (wlc->stf->rxstreams == 1)) - return false; - } - - wlc_stf_stbc_rx_ht_update(wlc, int_val); - return true; -} - -static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 core_mask) -{ - BCMMSG(wlc->wiphy, "wl%d: Nsts %d core_mask %x\n", - wlc->pub->unit, Nsts, core_mask); - - if (WLC_BITSCNT(core_mask) > wlc->stf->txstreams) { - core_mask = 0; - } - - if ((WLC_BITSCNT(core_mask) == wlc->stf->txstreams) && - ((core_mask & ~wlc->stf->txchain) - || !(core_mask & wlc->stf->txchain))) { - core_mask = wlc->stf->txchain; - } - - wlc->stf->txcore[Nsts] = core_mask; - /* Nsts = 1..4, txcore index = 1..4 */ - if (Nsts == 1) { - /* Needs to update beacon and ucode generated response - * frames when 1 stream core map changed - */ - wlc->stf->phytxant = core_mask << PHY_TXC_ANT_SHIFT; - wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); - if (wlc->clk) { - wlc_suspend_mac_and_wait(wlc); - wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); - wlc_enable_mac(wlc); - } - } - - return 0; -} - -static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val) -{ - int i; - u8 core_mask = 0; - - BCMMSG(wlc->wiphy, "wl%d: val %x\n", wlc->pub->unit, val); - - wlc->stf->spatial_policy = (s8) val; - for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) { - core_mask = (val == MAX_SPATIAL_EXPANSION) ? - wlc->stf->txchain : txcore_default[i]; - wlc_stf_txcore_set(wlc, (u8) i, core_mask); - } - return 0; -} - -int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force) -{ - u8 txchain = (u8) int_val; - u8 txstreams; - uint i; - - if (wlc->stf->txchain == txchain) - return 0; - - if ((txchain & ~wlc->stf->hw_txchain) - || !(txchain & wlc->stf->hw_txchain)) - return -EINVAL; - - /* if nrate override is configured to be non-SISO STF mode, reject reducing txchain to 1 */ - txstreams = (u8) WLC_BITSCNT(txchain); - if (txstreams > MAX_STREAMS_SUPPORTED) - return -EINVAL; - - if (txstreams == 1) { - for (i = 0; i < NBANDS(wlc); i++) - if ((RSPEC_STF(wlc->bandstate[i]->rspec_override) != - PHY_TXC1_MODE_SISO) - || (RSPEC_STF(wlc->bandstate[i]->mrspec_override) != - PHY_TXC1_MODE_SISO)) { - if (!force) - return -EBADE; - - /* over-write the override rspec */ - if (RSPEC_STF(wlc->bandstate[i]->rspec_override) - != PHY_TXC1_MODE_SISO) { - wlc->bandstate[i]->rspec_override = 0; - wiphy_err(wlc->wiphy, "%s(): temp " - "sense override non-SISO " - "rspec_override\n", - __func__); - } - if (RSPEC_STF - (wlc->bandstate[i]->mrspec_override) != - PHY_TXC1_MODE_SISO) { - wlc->bandstate[i]->mrspec_override = 0; - wiphy_err(wlc->wiphy, "%s(): temp " - "sense override non-SISO " - "mrspec_override\n", - __func__); - } - } - } - - wlc->stf->txchain = txchain; - wlc->stf->txstreams = txstreams; - wlc_stf_stbc_tx_set(wlc, wlc->band->band_stf_stbc_tx); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); - wlc->stf->txant = - (wlc->stf->txstreams == 1) ? ANT_TX_FORCE_0 : ANT_TX_DEF; - _wlc_stf_phy_txant_upd(wlc); - - wlc_phy_stf_chain_set(wlc->band->pi, wlc->stf->txchain, - wlc->stf->rxchain); - - for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) - wlc_stf_txcore_set(wlc, (u8) i, txcore_default[i]); - - return 0; -} - -/* update wlc->stf->ss_opmode which represents the operational stf_ss mode we're using */ -int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band) -{ - int ret_code = 0; - u8 prev_stf_ss; - u8 upd_stf_ss; - - prev_stf_ss = wlc->stf->ss_opmode; - - /* NOTE: opmode can only be SISO or CDD as STBC is decided on a per-packet basis */ - if (WLC_STBC_CAP_PHY(wlc) && - wlc->stf->ss_algosel_auto - && (wlc->stf->ss_algo_channel != (u16) -1)) { - upd_stf_ss = (wlc->stf->no_cddstbc || (wlc->stf->txstreams == 1) - || isset(&wlc->stf->ss_algo_channel, - PHY_TXC1_MODE_SISO)) ? PHY_TXC1_MODE_SISO - : PHY_TXC1_MODE_CDD; - } else { - if (wlc->band != band) - return ret_code; - upd_stf_ss = (wlc->stf->no_cddstbc - || (wlc->stf->txstreams == - 1)) ? PHY_TXC1_MODE_SISO : band-> - band_stf_ss_mode; - } - if (prev_stf_ss != upd_stf_ss) { - wlc->stf->ss_opmode = upd_stf_ss; - wlc_bmac_band_stf_ss_set(wlc->hw, upd_stf_ss); - } - - return ret_code; -} - -int wlc_stf_attach(struct wlc_info *wlc) -{ - wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_SISO; - wlc->bandstate[BAND_5G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_CDD; - - if (WLCISNPHY(wlc->band) && - (wlc_phy_txpower_hw_ctrl_get(wlc->band->pi) != PHY_TPC_HW_ON)) - wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = - PHY_TXC1_MODE_CDD; - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); - - wlc_stf_stbc_rx_ht_update(wlc, HT_CAP_RX_STBC_NO); - wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF; - wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; - - if (WLC_STBC_CAP_PHY(wlc)) { - wlc->stf->ss_algosel_auto = true; - wlc->stf->ss_algo_channel = (u16) -1; /* Init the default value */ - } - return 0; -} - -void wlc_stf_detach(struct wlc_info *wlc) -{ -} - -/* - * Centralized txant update function. call it whenever wlc->stf->txant and/or wlc->stf->txchain - * change - * - * Antennas are controlled by ucode indirectly, which drives PHY or GPIO to - * achieve various tx/rx antenna selection schemes - * - * legacy phy, bit 6 and bit 7 means antenna 0 and 1 respectively, bit6+bit7 means auto(last rx) - * for NREV<3, bit 6 and bit 7 means antenna 0 and 1 respectively, bit6+bit7 means last rx and - * do tx-antenna selection for SISO transmissions - * for NREV=3, bit 6 and bit _8_ means antenna 0 and 1 respectively, bit6+bit7 means last rx and - * do tx-antenna selection for SISO transmissions - * for NREV>=7, bit 6 and bit 7 mean antenna 0 and 1 respectively, nit6+bit7 means both cores active -*/ -static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc) -{ - s8 txant; - - txant = (s8) wlc->stf->txant; - if (WLC_PHY_11N_CAP(wlc->band)) { - if (txant == ANT_TX_FORCE_0) { - wlc->stf->phytxant = PHY_TXC_ANT_0; - } else if (txant == ANT_TX_FORCE_1) { - wlc->stf->phytxant = PHY_TXC_ANT_1; - - if (WLCISNPHY(wlc->band) && - NREV_GE(wlc->band->phyrev, 3) - && NREV_LT(wlc->band->phyrev, 7)) { - wlc->stf->phytxant = PHY_TXC_ANT_2; - } - } else { - if (WLCISLCNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) - wlc->stf->phytxant = PHY_TXC_LCNPHY_ANT_LAST; - else { - /* catch out of sync wlc->stf->txcore */ - WARN_ON(wlc->stf->txchain <= 0); - wlc->stf->phytxant = - wlc->stf->txchain << PHY_TXC_ANT_SHIFT; - } - } - } else { - if (txant == ANT_TX_FORCE_0) - wlc->stf->phytxant = PHY_TXC_OLD_ANT_0; - else if (txant == ANT_TX_FORCE_1) - wlc->stf->phytxant = PHY_TXC_OLD_ANT_1; - else - wlc->stf->phytxant = PHY_TXC_OLD_ANT_LAST; - } - - wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); -} - -void wlc_stf_phy_txant_upd(struct wlc_info *wlc) -{ - _wlc_stf_phy_txant_upd(wlc); -} - -void wlc_stf_phy_chain_calc(struct wlc_info *wlc) -{ - /* get available rx/tx chains */ - wlc->stf->hw_txchain = (u8) getintvar(wlc->pub->vars, "txchain"); - wlc->stf->hw_rxchain = (u8) getintvar(wlc->pub->vars, "rxchain"); - - /* these parameter are intended to be used for all PHY types */ - if (wlc->stf->hw_txchain == 0 || wlc->stf->hw_txchain == 0xf) { - if (WLCISNPHY(wlc->band)) { - wlc->stf->hw_txchain = TXCHAIN_DEF_NPHY; - } else { - wlc->stf->hw_txchain = TXCHAIN_DEF; - } - } - - wlc->stf->txchain = wlc->stf->hw_txchain; - wlc->stf->txstreams = (u8) WLC_BITSCNT(wlc->stf->hw_txchain); - - if (wlc->stf->hw_rxchain == 0 || wlc->stf->hw_rxchain == 0xf) { - if (WLCISNPHY(wlc->band)) { - wlc->stf->hw_rxchain = RXCHAIN_DEF_NPHY; - } else { - wlc->stf->hw_rxchain = RXCHAIN_DEF; - } - } - - wlc->stf->rxchain = wlc->stf->hw_rxchain; - wlc->stf->rxstreams = (u8) WLC_BITSCNT(wlc->stf->hw_rxchain); - - /* initialize the txcore table */ - memcpy(wlc->stf->txcore, txcore_default, sizeof(wlc->stf->txcore)); - - /* default spatial_policy */ - wlc->stf->spatial_policy = MIN_SPATIAL_EXPANSION; - wlc_stf_spatial_policy_set(wlc, MIN_SPATIAL_EXPANSION); -} - -static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) -{ - u16 phytxant = wlc->stf->phytxant; - - if (RSPEC_STF(rspec) != PHY_TXC1_MODE_SISO) { - phytxant = wlc->stf->txchain << PHY_TXC_ANT_SHIFT; - } else if (wlc->stf->txant == ANT_TX_DEF) - phytxant = wlc->stf->txchain << PHY_TXC_ANT_SHIFT; - phytxant &= PHY_TXC_ANT_MASK; - return phytxant; -} - -u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) -{ - return _wlc_stf_phytxchain_sel(wlc, rspec); -} - -u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec) -{ - u16 phytxant = wlc->stf->phytxant; - u16 mask = PHY_TXC_ANT_MASK; - - /* for non-siso rates or default setting, use the available chains */ - if (WLCISNPHY(wlc->band)) { - phytxant = _wlc_stf_phytxchain_sel(wlc, rspec); - mask = PHY_TXC_HTANT_MASK; - } - phytxant |= phytxant & mask; - return phytxant; -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h deleted file mode 100644 index 75e8205..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_STF_H_ -#define _BRCM_STF_H_ - -extern int wlc_stf_attach(struct wlc_info *wlc); -extern void wlc_stf_detach(struct wlc_info *wlc); - -extern void wlc_tempsense_upd(struct wlc_info *wlc); -extern void wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, - u16 *ss_algo_channel, - chanspec_t chanspec); -extern int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band); -extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); -extern int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force); -extern bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val); -extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); -extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc); -extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); -extern u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec); - -#endif /* _BRCM_STF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h deleted file mode 100644 index fa8d129..0000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_TYPES_H_ -#define _BRCM_TYPES_H_ - -/* Bus types */ -#define SI_BUS 0 /* SOC Interconnect */ -#define PCI_BUS 1 /* PCI target */ -#define SDIO_BUS 3 /* SDIO target */ -#define JTAG_BUS 4 /* JTAG */ -#define USB_BUS 5 /* USB (does not support R/W REG) */ -#define SPI_BUS 6 /* gSPI target */ -#define RPC_BUS 7 /* RPC target */ - -#define WL_CHAN_FREQ_RANGE_2G 0 -#define WL_CHAN_FREQ_RANGE_5GL 1 -#define WL_CHAN_FREQ_RANGE_5GM 2 -#define WL_CHAN_FREQ_RANGE_5GH 3 - -#define MAX_DMA_SEGS 4 - -#define BCMMSG(dev, fmt, args...) \ -do { \ - if (brcm_msg_level & LOG_TRACE_VAL) \ - wiphy_err(dev, "%s: " fmt, __func__, ##args); \ -} while (0) - -#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) - -/* register access macros */ -#ifndef __BIG_ENDIAN -#ifndef __mips__ -#define R_REG(r) \ - ({\ - sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)); \ - }) -#else /* __mips__ */ -#define R_REG(r) \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }) -#endif /* __mips__ */ - -#define W_REG(r, v) do { \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), (volatile u8*)(r)); break; \ - case sizeof(u16): \ - writew((u16)(v), (volatile u16*)(r)); break; \ - case sizeof(u32): \ - writel((u32)(v), (volatile u32*)(r)); break; \ - }; \ - } while (0) -#else /* __BIG_ENDIAN */ -#define R_REG(r) \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }) - -#define W_REG(r, v) do { \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), \ - (volatile u8*)((r)^3)); break; \ - case sizeof(u16): \ - writew((u16)(v), \ - (volatile u16*)((r)^2)); break; \ - case sizeof(u32): \ - writel((u32)(v), \ - (volatile u32*)(r)); break; \ - } \ - } while (0) -#endif /* __BIG_ENDIAN */ - -#ifdef __mips__ -/* - * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder - * transactions. As a fix, a read after write is performed on certain places - * in the code. Older chips and the newer 5357 family don't require this fix. - */ -#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) -#else -#define W_REG_FLUSH(r, v) W_REG((r), (v)) -#endif /* __mips__ */ - -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) - -#define SET_REG(r, mask, val) \ - W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - -/* forward declarations */ -struct sk_buff; -struct brcms_info; -struct wlc_info; -struct wlc_hw_info; -struct wlc_if; -struct brcms_if; -struct ampdu_info; -struct antsel_info; -struct bmac_pmq; -struct d11init; -struct dma_pub; -struct wlc_bsscfg; -struct brcmu_strbuf; -struct si_pub; - -/* brcm_msg_level is a bit vector with defs in bcmdefs.h */ -extern u32 brcm_msg_level; - -#endif /* _BRCM_TYPES_H_ */ diff --git a/drivers/staging/brcm80211/brcmutil/utils.c b/drivers/staging/brcm80211/brcmutil/utils.c index d259e26..ab11c4b 100644 --- a/drivers/staging/brcm80211/brcmutil/utils.c +++ b/drivers/staging/brcm80211/brcmutil/utils.c @@ -22,10 +22,10 @@ #include #include #include -#include +#include #include #include -#include +#include MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); diff --git a/drivers/staging/brcm80211/brcmutil/wifi.c b/drivers/staging/brcm80211/brcmutil/wifi.c index 2a3db0a..bacf345 100644 --- a/drivers/staging/brcm80211/brcmutil/wifi.c +++ b/drivers/staging/brcm80211/brcmutil/wifi.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/staging/brcm80211/include/aidmp.h b/drivers/staging/brcm80211/include/aidmp.h index 2c10177..d166af4 100644 --- a/drivers/staging/brcm80211/include/aidmp.h +++ b/drivers/staging/brcm80211/include/aidmp.h @@ -17,7 +17,7 @@ #ifndef _AIDMP_H #define _AIDMP_H -#include "bcmdefs.h" /* for PAD macro */ +#include "defs.h" /* for PAD macro */ /* Manufacturer Ids */ #define MFGID_ARM 0x43b diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h deleted file mode 100644 index 768df8d..0000000 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_DEFS_H_ -#define _BRCM_DEFS_H_ - -#define SI_BUS 0 -#define PCI_BUS 1 -#define PCMCIA_BUS 2 -#define SDIO_BUS 3 -#define JTAG_BUS 4 -#define USB_BUS 5 -#define SPI_BUS 6 - -#ifndef OFF -#define OFF 0 -#endif - -#ifndef ON -#define ON 1 /* ON = 1 */ -#endif - -#define AUTO (-1) /* Auto = -1 */ - -/* - * Priority definitions according 802.1D - */ -#define PRIO_8021D_NONE 2 -#define PRIO_8021D_BK 1 -#define PRIO_8021D_BE 0 -#define PRIO_8021D_EE 3 -#define PRIO_8021D_CL 4 -#define PRIO_8021D_VI 5 -#define PRIO_8021D_VO 6 -#define PRIO_8021D_NC 7 - -#define MAXPRIO 7 -#define NUMPRIO (MAXPRIO + 1) - -#define WL_NUMRATES 16 /* max # of rates in a rateset */ - -typedef struct wl_rateset { - u32 count; /* # rates in this set */ - u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ -} wl_rateset_t; - -#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ - -#define WLC_SET_CHANNEL 30 -#define WLC_SET_SRL 32 -#define WLC_SET_LRL 34 - -#define WLC_SET_RATESET 72 -#define WLC_SET_BCNPRD 76 -#define WLC_GET_CURR_RATESET 114 /* current rateset */ -#define WLC_GET_PHYLIST 180 - -/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ -#define WL_RADIO_SW_DISABLE (1<<0) -#define WL_RADIO_HW_DISABLE (1<<1) -#define WL_RADIO_MPC_DISABLE (1<<2) -#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ - -/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ -#define WL_TXPWR_OVERRIDE (1U<<31) - -/* band types */ -#define WLC_BAND_AUTO 0 /* auto-select */ -#define WLC_BAND_5G 1 /* 5 Ghz */ -#define WLC_BAND_2G 2 /* 2.4 Ghz */ -#define WLC_BAND_ALL 3 /* all bands */ - -/* Values for PM */ -#define PM_OFF 0 -#define PM_MAX 1 - -/* Message levels */ -#define LOG_ERROR_VAL 0x00000001 -#define LOG_TRACE_VAL 0x00000002 - -#define PM_OFF 0 -#define PM_MAX 1 -#define PM_FAST 2 - -/* - * Sonics Configuration Space Registers. - */ -#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -#endif /* _BRCM_DEFS_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmdevs.h b/drivers/staging/brcm80211/include/bcmdevs.h deleted file mode 100644 index b7aedac..0000000 --- a/drivers/staging/brcm80211/include/bcmdevs.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_HW_IDS_H_ -#define _BRCM_HW_IDS_H_ - -#define BCM4325_D11DUAL_ID 0x431b -#define BCM4325_D11G_ID 0x431c -#define BCM4325_D11A_ID 0x431d - -#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */ -#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */ -#define BCM4329_D11NDUAL_ID 0x432e - -#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */ -#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */ -#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ - -#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ -#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db */ - -#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ - -#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */ -#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */ - -#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */ - -/* Chip IDs */ -#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */ -#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */ - -#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */ -#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */ -#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */ -#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */ -#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */ -#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */ -#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */ -#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */ -#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */ -#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */ -#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ -#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ - -/* these are router chips */ -#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ -#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ -#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ -#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ -#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ - -/* Package IDs */ -#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ -#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ -#define BCM4717_PKG_ID 9 /* 4717 package id */ -#define BCM4718_PKG_ID 10 /* 4718 package id */ -#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ -#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ -#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ - -/* boardflags */ -#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ -#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ -#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ -#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ -#define BFL_NOPA 0x00010000 /* Board has no PA */ -#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ -#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ -#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ -#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ -#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ - -/* boardflags2 */ -#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ -#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ -#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ -#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ -#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ -#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ -#define BFL2_LEGACY 0x00000080 -#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ -#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ -#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ -#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ -#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ -#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ -#define BFL2_IPALVLSHIFT_3P3 0x00020000 -#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ -#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" - * Most drivers will turn it off without this flag - * to save power. - */ - -/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ -#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ -#define BOARD_GPIO_12 0x1000 /* gpio 12 */ -#define BOARD_GPIO_13 0x2000 /* gpio 13 */ - -#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ -#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ -#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ - -/* power control defines */ -#define PLL_DELAY 150 /* us pll on delay */ -#define FREF_DELAY 200 /* us fref change delay */ -#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ - -/* Reference board types */ -#define SPI_BOARD 0x0402 - -#endif /* _BRCM_HW_IDS_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmsdh.h b/drivers/staging/brcm80211/include/bcmsdh.h deleted file mode 100644 index db19533..0000000 --- a/drivers/staging/brcm80211/include/bcmsdh.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SDH_H_ -#define _BRCM_SDH_H_ - -#include -#define BCMSDH_ERROR_VAL 0x0001 /* Error */ -#define BCMSDH_INFO_VAL 0x0002 /* Info */ -extern const uint bcmsdh_msglevel; - -#ifdef BCMDBG -#define BCMSDH_ERROR(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_ERROR_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define BCMSDH_INFO(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_INFO_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#else /* BCMDBG */ -#define BCMSDH_ERROR(x) -#define BCMSDH_INFO(x) -#endif /* BCMDBG */ - -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 - -#define SDIOD_FBR_SIZE 0x100 - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 -#define SDIO_FUNC_ENABLE_2 0x04 - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 -#define SDIO_FUNC_READY_2 0x04 - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 -#define INTR_STATUS_FUNC2 0x4 - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_IOFUNCS 7 - -/* forward declarations */ -typedef struct bcmsdh_info bcmsdh_info_t; -typedef void (*bcmsdh_cb_fn_t) (void *); - -/* Attach and build an interface to the underlying SD host driver. - * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. - * - Returns the bcmsdh handle and virtual address base for register access. - * The returned handle should be used in all subsequent calls, but the bcmsh - * implementation may maintain a single "default" handle (e.g. the first or - * most recent one) to enable single-instance implementations to pass NULL. - */ -extern bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq); - -/* Detach - freeup resources allocated in attach */ -extern int bcmsdh_detach(void *sdh); - -/* Query if SD device interrupts are enabled */ -extern bool bcmsdh_intr_query(void *sdh); - -/* Enable/disable SD interrupt */ -extern int bcmsdh_intr_enable(void *sdh); -extern int bcmsdh_intr_disable(void *sdh); - -/* Register/deregister device interrupt handler. */ -extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); -extern int bcmsdh_intr_dereg(void *sdh); - -#if defined(DHD_DEBUG) -/* Query pending interrupt status from the host controller */ -extern bool bcmsdh_intr_pending(void *sdh); -#endif -extern int bcmsdh_claim_host_and_lock(void *sdh); -extern int bcmsdh_release_host_and_unlock(void *sdh); - -/* Register a callback to be called if and when bcmsdh detects - * device removal. No-op in the case of non-removable/hardwired devices. - */ -extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); - -/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). - * fn: function number - * addr: unmodified SDIO-space address - * data: data byte to write - * err: pointer to error code (or NULL) - */ -extern u8 bcmsdh_cfg_read(void *sdh, uint func, u32 addr, int *err); -extern void bcmsdh_cfg_write(void *sdh, uint func, u32 addr, u8 data, - int *err); - -/* Read/Write 4bytes from/to cfg space */ -extern u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, - int *err); -extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, - u32 data, int *err); - -/* Read CIS content for specified function. - * fn: function whose CIS is being requested (0 is common CIS) - * cis: pointer to memory location to place results - * length: number of bytes to read - * Internally, this routine uses the values from the cis base regs (0x9-0xB) - * to form an SDIO-space address to read the data from. - */ -extern int bcmsdh_cis_read(void *sdh, uint func, u8 *cis, uint length); - -/* Synchronous access to device (client) core registers via CMD53 to F1. - * addr: backplane address (i.e. >= regsva from attach) - * size: register width in bytes (2 or 4) - * data: data for register write - */ -extern u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size); -extern u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data); - -/* Indicate if last reg read/write failed */ -extern bool bcmsdh_regfail(void *sdh); - -/* Buffer transfer to/from device (client) core via cmd53. - * fn: function number - * addr: backplane address (i.e. >= regsva from attach) - * flags: backplane width, address increment, sync/async - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * pkt: pointer to packet associated with buf (if any) - * complete: callback function for command completion (async only) - * handle: handle for completion callback (first arg in callback) - * Returns 0 or error code. - * NOTE: Async operation is not currently supported. - */ -typedef void (*bcmsdh_cmplt_fn_t) (void *handle, int status, bool sync_waiting); -extern int bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); -extern int bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, struct sk_buff *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); - -/* Flags bits */ -#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ -#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ -#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ - -/* Pending (non-error) return code */ -#define BCME_PENDING 1 - -/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). - * rw: read or write (0/1) - * addr: direct SDIO address - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * Returns 0 or error code. - */ -extern int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, - uint nbytes); - -/* Issue an abort to the specified function */ -extern int bcmsdh_abort(void *sdh, uint fn); - -/* Start SDIO Host Controller communication */ -extern int bcmsdh_start(void *sdh, int stage); - -/* Stop SDIO Host Controller communication */ -extern int bcmsdh_stop(void *sdh); - -/* Returns the "Device ID" of target device on the SDIO bus. */ -extern int bcmsdh_query_device(void *sdh); - -/* Returns the number of IO functions reported by the device */ -extern uint bcmsdh_query_iofnum(void *sdh); - -/* Miscellaneous knob tweaker. */ -extern int bcmsdh_iovar_op(void *sdh, const char *name, - void *params, int plen, void *arg, int len, - bool set); - -/* Reset and reinitialize the device */ -extern int bcmsdh_reset(bcmsdh_info_t *sdh); - -/* helper functions */ - -extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - -/* callback functions */ -typedef struct { - /* attach to device */ - void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, - u16 func, uint bustype, void *regsva, void *param); - /* detach from device */ - void (*detach) (void *ch); -} bcmsdh_driver_t; - -/* platform specific/high level functions */ -extern int bcmsdh_register(bcmsdh_driver_t *driver); -extern void bcmsdh_unregister(void); -extern bool bcmsdh_chipmatch(u16 vendor, u16 device); -extern void bcmsdh_device_remove(void *sdh); - -/* Function to pass device-status bits to DHD. */ -extern u32 bcmsdh_get_dstatus(void *sdh); - -/* Function to return current window addr */ -extern u32 bcmsdh_cur_sbwad(void *sdh); - -/* Function to pass chipid and rev to lower layers for controlling pr's */ -extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); - -#endif /* _BRCM_SDH_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmsoc.h b/drivers/staging/brcm80211/include/bcmsoc.h deleted file mode 100644 index 89e6719..0000000 --- a/drivers/staging/brcm80211/include/bcmsoc.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SOC_H -#define _BRCM_SOC_H - -/* Include the soci specific files */ -#include - -/* - * SOC Interconnect Address Map. - * All regions may not exist on all chips. - */ -#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI_MEM_SZ (64 * 1024 * 1024) -#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ - -#ifdef SI_ENUM_BASE_VARIABLE -#define SI_ENUM_BASE (sii->pub.si_enum_base) -#else -#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ -#endif /* SI_ENUM_BASE_VARIABLE */ - -#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ -#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software - * convenience and could be changed if we - * make any larger chips - */ - -#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ -#define SI_FASTRAM_SWAPPED 0x19800000 - -#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ -#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ -#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ -#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ -#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ -#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ -#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ -#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ -#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ -#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ - -#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ -#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), low 32 bits - */ -#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ - -/* core codes */ -#define NODEV_CORE_ID 0x700 /* Invalid coreid */ -#define CC_CORE_ID 0x800 /* chipcommon core */ -#define ILINE20_CORE_ID 0x801 /* iline20 core */ -#define SRAM_CORE_ID 0x802 /* sram core */ -#define SDRAM_CORE_ID 0x803 /* sdram core */ -#define PCI_CORE_ID 0x804 /* pci core */ -#define MIPS_CORE_ID 0x805 /* mips core */ -#define ENET_CORE_ID 0x806 /* enet mac core */ -#define CODEC_CORE_ID 0x807 /* v90 codec core */ -#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ -#define ADSL_CORE_ID 0x809 /* ADSL core */ -#define ILINE100_CORE_ID 0x80a /* iline100 core */ -#define IPSEC_CORE_ID 0x80b /* ipsec core */ -#define UTOPIA_CORE_ID 0x80c /* utopia core */ -#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ -#define SOCRAM_CORE_ID 0x80e /* internal memory core */ -#define MEMC_CORE_ID 0x80f /* memc sdram core */ -#define OFDM_CORE_ID 0x810 /* OFDM phy core */ -#define EXTIF_CORE_ID 0x811 /* external interface core */ -#define D11_CORE_ID 0x812 /* 802.11 MAC core */ -#define APHY_CORE_ID 0x813 /* 802.11a phy core */ -#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ -#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ -#define MIPS33_CORE_ID 0x816 /* mips3302 core */ -#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ -#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ -#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ -#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ -#define SDIOH_CORE_ID 0x81b /* sdio host core */ -#define ROBO_CORE_ID 0x81c /* roboswitch core */ -#define ATA100_CORE_ID 0x81d /* parallel ATA core */ -#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ -#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ -#define PCIE_CORE_ID 0x820 /* pci express core */ -#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ -#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ -#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ -#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ -#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ -#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ -#define PMU_CORE_ID 0x827 /* PMU core */ -#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ -#define SDIOD_CORE_ID 0x829 /* SDIO device core */ -#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ -#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ -#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ -#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ -#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ -#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ -#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ -#define SC_CORE_ID 0x831 /* shared common core */ -#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ -#define SPIH_CORE_ID 0x833 /* SPI host core */ -#define I2S_CORE_ID 0x834 /* I2S core */ -#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ -#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ -#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ -#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all - * unused address ranges - */ - -/* There are TWO constants on all Broadcom chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ -#define SI_CC_IDX 0 - -/* SOC Interconnect types (aka chip types) */ -#define SOCI_AI 1 - -/* Common core control flags */ -#define SICF_BIST_EN 0x8000 -#define SICF_PME_EN 0x4000 -#define SICF_CORE_BITS 0x3ffc -#define SICF_FGC 0x0002 -#define SICF_CLOCK_EN 0x0001 - -/* Common core status flags */ -#define SISF_BIST_DONE 0x8000 -#define SISF_BIST_ERROR 0x4000 -#define SISF_GATED_CLK 0x2000 -#define SISF_DMA64 0x1000 -#define SISF_CORE_BITS 0x0fff - -/* A register that is common to all cores to - * communicate w/PMU regarding clock control. - */ -#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ - -/* clk_ctl_st register */ -#define CCS_FORCEALP 0x00000001 /* force ALP request */ -#define CCS_FORCEHT 0x00000002 /* force HT request */ -#define CCS_FORCEILP 0x00000004 /* force ILP request */ -#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ -#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ -#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ -#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ -#define CCS_ERSRC_REQ_SHIFT 8 -#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ -#define CCS_HTAVAIL 0x00020000 /* HT is available */ -#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ -#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ -#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ -#define CCS_ERSRC_STS_SHIFT 24 - -#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ -#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ - -/* Not really related to SOC Interconnect, but a couple of software - * conventions for the use the flash space: - */ - -/* Minimum amount of flash we support */ -#define FLASH_MIN 0x00020000 /* Minimum flash size */ - -/* A boot/binary may have an embedded block that describes its size */ -#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ -#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ -#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ -#define BISZ_TXTST_IDX 1 /* 1: text start */ -#define BISZ_TXTEND_IDX 2 /* 2: text end */ -#define BISZ_DATAST_IDX 3 /* 3: data start */ -#define BISZ_DATAEND_IDX 4 /* 4: data end */ -#define BISZ_BSSST_IDX 5 /* 5: bss start */ -#define BISZ_BSSEND_IDX 6 /* 6: bss end */ -#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ - -#endif /* _BRCM_SOC_H */ diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/include/bcmsrom.h deleted file mode 100644 index ee4f880..0000000 --- a/drivers/staging/brcm80211/include/bcmsrom.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SROM_H_ -#define _BRCM_SROM_H_ - -/* Prototypes */ -extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, - char **vars, uint *count); - -extern int srom_read(struct si_pub *sih, uint bus, void *curmap, - uint byteoff, uint nbytes, u16 *buf, bool check_crc); - -/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP - * and extract from it into name=value pairs - */ -extern int srom_parsecis(u8 **pcis, uint ciscnt, - char **vars, uint *count); -#endif /* _BRCM_SROM_H_ */ diff --git a/drivers/staging/brcm80211/include/brcm_hw_ids.h b/drivers/staging/brcm80211/include/brcm_hw_ids.h new file mode 100644 index 0000000..b7aedac --- /dev/null +++ b/drivers/staging/brcm80211/include/brcm_hw_ids.h @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_HW_IDS_H_ +#define _BRCM_HW_IDS_H_ + +#define BCM4325_D11DUAL_ID 0x431b +#define BCM4325_D11G_ID 0x431c +#define BCM4325_D11A_ID 0x431d + +#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */ +#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */ +#define BCM4329_D11NDUAL_ID 0x432e + +#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */ +#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */ +#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ + +#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ +#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db */ + +#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ + +#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */ +#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */ + +#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */ + +/* Chip IDs */ +#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */ +#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */ + +#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */ +#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */ +#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */ +#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */ +#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */ +#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */ +#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */ +#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */ +#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */ +#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */ +#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ +#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ + +/* these are router chips */ +#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ +#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ +#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ +#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ +#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ + +/* Package IDs */ +#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ +#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ +#define BCM4717_PKG_ID 9 /* 4717 package id */ +#define BCM4718_PKG_ID 10 /* 4718 package id */ +#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ +#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ +#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ + +/* boardflags */ +#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ +#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ +#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ +#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ +#define BFL_NOPA 0x00010000 /* Board has no PA */ +#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ +#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ +#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ +#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ +#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ + +/* boardflags2 */ +#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ +#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ +#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ +#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ +#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ +#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ +#define BFL2_LEGACY 0x00000080 +#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ +#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ +#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ +#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ +#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ +#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ +#define BFL2_IPALVLSHIFT_3P3 0x00020000 +#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ +#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" + * Most drivers will turn it off without this flag + * to save power. + */ + +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ +#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ +#define BOARD_GPIO_12 0x1000 /* gpio 12 */ +#define BOARD_GPIO_13 0x2000 /* gpio 13 */ + +#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ + +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ +#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ + +/* Reference board types */ +#define SPI_BOARD 0x0402 + +#endif /* _BRCM_HW_IDS_H_ */ diff --git a/drivers/staging/brcm80211/include/chipcommon.h b/drivers/staging/brcm80211/include/chipcommon.h index ee1130f..296582a 100644 --- a/drivers/staging/brcm80211/include/chipcommon.h +++ b/drivers/staging/brcm80211/include/chipcommon.h @@ -17,7 +17,7 @@ #ifndef _SBCHIPC_H #define _SBCHIPC_H -#include "bcmdefs.h" /* for PAD macro */ +#include "defs.h" /* for PAD macro */ typedef volatile struct { u32 chipid; /* 0x0 */ diff --git a/drivers/staging/brcm80211/include/defs.h b/drivers/staging/brcm80211/include/defs.h new file mode 100644 index 0000000..768df8d --- /dev/null +++ b/drivers/staging/brcm80211/include/defs.h @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_DEFS_H_ +#define _BRCM_DEFS_H_ + +#define SI_BUS 0 +#define PCI_BUS 1 +#define PCMCIA_BUS 2 +#define SDIO_BUS 3 +#define JTAG_BUS 4 +#define USB_BUS 5 +#define SPI_BUS 6 + +#ifndef OFF +#define OFF 0 +#endif + +#ifndef ON +#define ON 1 /* ON = 1 */ +#endif + +#define AUTO (-1) /* Auto = -1 */ + +/* + * Priority definitions according 802.1D + */ +#define PRIO_8021D_NONE 2 +#define PRIO_8021D_BK 1 +#define PRIO_8021D_BE 0 +#define PRIO_8021D_EE 3 +#define PRIO_8021D_CL 4 +#define PRIO_8021D_VI 5 +#define PRIO_8021D_VO 6 +#define PRIO_8021D_NC 7 + +#define MAXPRIO 7 +#define NUMPRIO (MAXPRIO + 1) + +#define WL_NUMRATES 16 /* max # of rates in a rateset */ + +typedef struct wl_rateset { + u32 count; /* # rates in this set */ + u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ +} wl_rateset_t; + +#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ + +#define WLC_SET_CHANNEL 30 +#define WLC_SET_SRL 32 +#define WLC_SET_LRL 34 + +#define WLC_SET_RATESET 72 +#define WLC_SET_BCNPRD 76 +#define WLC_GET_CURR_RATESET 114 /* current rateset */ +#define WLC_GET_PHYLIST 180 + +/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ +#define WL_RADIO_SW_DISABLE (1<<0) +#define WL_RADIO_HW_DISABLE (1<<1) +#define WL_RADIO_MPC_DISABLE (1<<2) +#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ + +/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ +#define WL_TXPWR_OVERRIDE (1U<<31) + +/* band types */ +#define WLC_BAND_AUTO 0 /* auto-select */ +#define WLC_BAND_5G 1 /* 5 Ghz */ +#define WLC_BAND_2G 2 /* 2.4 Ghz */ +#define WLC_BAND_ALL 3 /* all bands */ + +/* Values for PM */ +#define PM_OFF 0 +#define PM_MAX 1 + +/* Message levels */ +#define LOG_ERROR_VAL 0x00000001 +#define LOG_TRACE_VAL 0x00000002 + +#define PM_OFF 0 +#define PM_MAX 1 +#define PM_FAST 2 + +/* + * Sonics Configuration Space Registers. + */ +#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + +#endif /* _BRCM_DEFS_H_ */ diff --git a/drivers/staging/brcm80211/include/sdio_host.h b/drivers/staging/brcm80211/include/sdio_host.h new file mode 100644 index 0000000..db19533 --- /dev/null +++ b/drivers/staging/brcm80211/include/sdio_host.h @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SDH_H_ +#define _BRCM_SDH_H_ + +#include +#define BCMSDH_ERROR_VAL 0x0001 /* Error */ +#define BCMSDH_INFO_VAL 0x0002 /* Info */ +extern const uint bcmsdh_msglevel; + +#ifdef BCMDBG +#define BCMSDH_ERROR(x) \ + do { \ + if ((bcmsdh_msglevel & BCMSDH_ERROR_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define BCMSDH_INFO(x) \ + do { \ + if ((bcmsdh_msglevel & BCMSDH_INFO_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#else /* BCMDBG */ +#define BCMSDH_ERROR(x) +#define BCMSDH_INFO(x) +#endif /* BCMDBG */ + +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 + +#define SDIOD_FBR_SIZE 0x100 + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 +#define SDIO_FUNC_ENABLE_2 0x04 + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 +#define SDIO_FUNC_READY_2 0x04 + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 +#define INTR_STATUS_FUNC2 0x4 + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_IOFUNCS 7 + +/* forward declarations */ +typedef struct bcmsdh_info bcmsdh_info_t; +typedef void (*bcmsdh_cb_fn_t) (void *); + +/* Attach and build an interface to the underlying SD host driver. + * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. + * - Returns the bcmsdh handle and virtual address base for register access. + * The returned handle should be used in all subsequent calls, but the bcmsh + * implementation may maintain a single "default" handle (e.g. the first or + * most recent one) to enable single-instance implementations to pass NULL. + */ +extern bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq); + +/* Detach - freeup resources allocated in attach */ +extern int bcmsdh_detach(void *sdh); + +/* Query if SD device interrupts are enabled */ +extern bool bcmsdh_intr_query(void *sdh); + +/* Enable/disable SD interrupt */ +extern int bcmsdh_intr_enable(void *sdh); +extern int bcmsdh_intr_disable(void *sdh); + +/* Register/deregister device interrupt handler. */ +extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); +extern int bcmsdh_intr_dereg(void *sdh); + +#if defined(DHD_DEBUG) +/* Query pending interrupt status from the host controller */ +extern bool bcmsdh_intr_pending(void *sdh); +#endif +extern int bcmsdh_claim_host_and_lock(void *sdh); +extern int bcmsdh_release_host_and_unlock(void *sdh); + +/* Register a callback to be called if and when bcmsdh detects + * device removal. No-op in the case of non-removable/hardwired devices. + */ +extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); + +/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). + * fn: function number + * addr: unmodified SDIO-space address + * data: data byte to write + * err: pointer to error code (or NULL) + */ +extern u8 bcmsdh_cfg_read(void *sdh, uint func, u32 addr, int *err); +extern void bcmsdh_cfg_write(void *sdh, uint func, u32 addr, u8 data, + int *err); + +/* Read/Write 4bytes from/to cfg space */ +extern u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, + int *err); +extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, + u32 data, int *err); + +/* Read CIS content for specified function. + * fn: function whose CIS is being requested (0 is common CIS) + * cis: pointer to memory location to place results + * length: number of bytes to read + * Internally, this routine uses the values from the cis base regs (0x9-0xB) + * to form an SDIO-space address to read the data from. + */ +extern int bcmsdh_cis_read(void *sdh, uint func, u8 *cis, uint length); + +/* Synchronous access to device (client) core registers via CMD53 to F1. + * addr: backplane address (i.e. >= regsva from attach) + * size: register width in bytes (2 or 4) + * data: data for register write + */ +extern u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size); +extern u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data); + +/* Indicate if last reg read/write failed */ +extern bool bcmsdh_regfail(void *sdh); + +/* Buffer transfer to/from device (client) core via cmd53. + * fn: function number + * addr: backplane address (i.e. >= regsva from attach) + * flags: backplane width, address increment, sync/async + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * pkt: pointer to packet associated with buf (if any) + * complete: callback function for command completion (async only) + * handle: handle for completion callback (first arg in callback) + * Returns 0 or error code. + * NOTE: Async operation is not currently supported. + */ +typedef void (*bcmsdh_cmplt_fn_t) (void *handle, int status, bool sync_waiting); +extern int bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, + u8 *buf, uint nbytes, void *pkt, + bcmsdh_cmplt_fn_t complete, void *handle); +extern int bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, + u8 *buf, uint nbytes, struct sk_buff *pkt, + bcmsdh_cmplt_fn_t complete, void *handle); + +/* Flags bits */ +#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ +#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ +#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ + +/* Pending (non-error) return code */ +#define BCME_PENDING 1 + +/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). + * rw: read or write (0/1) + * addr: direct SDIO address + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * Returns 0 or error code. + */ +extern int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, + uint nbytes); + +/* Issue an abort to the specified function */ +extern int bcmsdh_abort(void *sdh, uint fn); + +/* Start SDIO Host Controller communication */ +extern int bcmsdh_start(void *sdh, int stage); + +/* Stop SDIO Host Controller communication */ +extern int bcmsdh_stop(void *sdh); + +/* Returns the "Device ID" of target device on the SDIO bus. */ +extern int bcmsdh_query_device(void *sdh); + +/* Returns the number of IO functions reported by the device */ +extern uint bcmsdh_query_iofnum(void *sdh); + +/* Miscellaneous knob tweaker. */ +extern int bcmsdh_iovar_op(void *sdh, const char *name, + void *params, int plen, void *arg, int len, + bool set); + +/* Reset and reinitialize the device */ +extern int bcmsdh_reset(bcmsdh_info_t *sdh); + +/* helper functions */ + +extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); + +/* callback functions */ +typedef struct { + /* attach to device */ + void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, + u16 func, uint bustype, void *regsva, void *param); + /* detach from device */ + void (*detach) (void *ch); +} bcmsdh_driver_t; + +/* platform specific/high level functions */ +extern int bcmsdh_register(bcmsdh_driver_t *driver); +extern void bcmsdh_unregister(void); +extern bool bcmsdh_chipmatch(u16 vendor, u16 device); +extern void bcmsdh_device_remove(void *sdh); + +/* Function to pass device-status bits to DHD. */ +extern u32 bcmsdh_get_dstatus(void *sdh); + +/* Function to return current window addr */ +extern u32 bcmsdh_cur_sbwad(void *sdh); + +/* Function to pass chipid and rev to lower layers for controlling pr's */ +extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); + +#endif /* _BRCM_SDH_H_ */ diff --git a/drivers/staging/brcm80211/include/soc.h b/drivers/staging/brcm80211/include/soc.h new file mode 100644 index 0000000..89e6719 --- /dev/null +++ b/drivers/staging/brcm80211/include/soc.h @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SOC_H +#define _BRCM_SOC_H + +/* Include the soci specific files */ +#include + +/* + * SOC Interconnect Address Map. + * All regions may not exist on all chips. + */ +#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ +#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ +#define SI_PCI_MEM_SZ (64 * 1024 * 1024) +#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ +#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ +#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ + +#ifdef SI_ENUM_BASE_VARIABLE +#define SI_ENUM_BASE (sii->pub.si_enum_base) +#else +#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ +#endif /* SI_ENUM_BASE_VARIABLE */ + +#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ +#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ +#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software + * convenience and could be changed if we + * make any larger chips + */ + +#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ +#define SI_FASTRAM_SWAPPED 0x19800000 + +#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ +#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ +#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ +#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ +#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ +#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ +#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ +#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ +#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ +#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ + +#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ +#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), low 32 bits + */ +#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), high 32 bits + */ + +/* core codes */ +#define NODEV_CORE_ID 0x700 /* Invalid coreid */ +#define CC_CORE_ID 0x800 /* chipcommon core */ +#define ILINE20_CORE_ID 0x801 /* iline20 core */ +#define SRAM_CORE_ID 0x802 /* sram core */ +#define SDRAM_CORE_ID 0x803 /* sdram core */ +#define PCI_CORE_ID 0x804 /* pci core */ +#define MIPS_CORE_ID 0x805 /* mips core */ +#define ENET_CORE_ID 0x806 /* enet mac core */ +#define CODEC_CORE_ID 0x807 /* v90 codec core */ +#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ +#define ADSL_CORE_ID 0x809 /* ADSL core */ +#define ILINE100_CORE_ID 0x80a /* iline100 core */ +#define IPSEC_CORE_ID 0x80b /* ipsec core */ +#define UTOPIA_CORE_ID 0x80c /* utopia core */ +#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ +#define SOCRAM_CORE_ID 0x80e /* internal memory core */ +#define MEMC_CORE_ID 0x80f /* memc sdram core */ +#define OFDM_CORE_ID 0x810 /* OFDM phy core */ +#define EXTIF_CORE_ID 0x811 /* external interface core */ +#define D11_CORE_ID 0x812 /* 802.11 MAC core */ +#define APHY_CORE_ID 0x813 /* 802.11a phy core */ +#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ +#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ +#define MIPS33_CORE_ID 0x816 /* mips3302 core */ +#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ +#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ +#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ +#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ +#define SDIOH_CORE_ID 0x81b /* sdio host core */ +#define ROBO_CORE_ID 0x81c /* roboswitch core */ +#define ATA100_CORE_ID 0x81d /* parallel ATA core */ +#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ +#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ +#define PCIE_CORE_ID 0x820 /* pci express core */ +#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ +#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ +#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ +#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ +#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ +#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ +#define PMU_CORE_ID 0x827 /* PMU core */ +#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ +#define SDIOD_CORE_ID 0x829 /* SDIO device core */ +#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ +#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ +#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ +#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ +#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ +#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ +#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ +#define SC_CORE_ID 0x831 /* shared common core */ +#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ +#define SPIH_CORE_ID 0x833 /* SPI host core */ +#define I2S_CORE_ID 0x834 /* I2S core */ +#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ +#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ +#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ +#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all + * unused address ranges + */ + +/* There are TWO constants on all Broadcom chips: SI_ENUM_BASE above, + * and chipcommon being the first core: + */ +#define SI_CC_IDX 0 + +/* SOC Interconnect types (aka chip types) */ +#define SOCI_AI 1 + +/* Common core control flags */ +#define SICF_BIST_EN 0x8000 +#define SICF_PME_EN 0x4000 +#define SICF_CORE_BITS 0x3ffc +#define SICF_FGC 0x0002 +#define SICF_CLOCK_EN 0x0001 + +/* Common core status flags */ +#define SISF_BIST_DONE 0x8000 +#define SISF_BIST_ERROR 0x4000 +#define SISF_GATED_CLK 0x2000 +#define SISF_DMA64 0x1000 +#define SISF_CORE_BITS 0x0fff + +/* A register that is common to all cores to + * communicate w/PMU regarding clock control. + */ +#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ + +/* clk_ctl_st register */ +#define CCS_FORCEALP 0x00000001 /* force ALP request */ +#define CCS_FORCEHT 0x00000002 /* force HT request */ +#define CCS_FORCEILP 0x00000004 /* force ILP request */ +#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ +#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ +#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ +#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ +#define CCS_ERSRC_REQ_SHIFT 8 +#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ +#define CCS_HTAVAIL 0x00020000 /* HT is available */ +#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ +#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ +#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ +#define CCS_ERSRC_STS_SHIFT 24 + +#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ +#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ + +/* Not really related to SOC Interconnect, but a couple of software + * conventions for the use the flash space: + */ + +/* Minimum amount of flash we support */ +#define FLASH_MIN 0x00020000 /* Minimum flash size */ + +/* A boot/binary may have an embedded block that describes its size */ +#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ +#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ +#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ +#define BISZ_TXTST_IDX 1 /* 1: text start */ +#define BISZ_TXTEND_IDX 2 /* 2: text end */ +#define BISZ_DATAST_IDX 3 /* 3: data start */ +#define BISZ_DATAEND_IDX 4 /* 4: data end */ +#define BISZ_BSSST_IDX 5 /* 5: bss start */ +#define BISZ_BSSEND_IDX 6 /* 6: bss end */ +#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ + +#endif /* _BRCM_SOC_H */ diff --git a/drivers/staging/brcm80211/include/srom.h b/drivers/staging/brcm80211/include/srom.h new file mode 100644 index 0000000..ee4f880 --- /dev/null +++ b/drivers/staging/brcm80211/include/srom.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SROM_H_ +#define _BRCM_SROM_H_ + +/* Prototypes */ +extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, + char **vars, uint *count); + +extern int srom_read(struct si_pub *sih, uint bus, void *curmap, + uint byteoff, uint nbytes, u16 *buf, bool check_crc); + +/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP + * and extract from it into name=value pairs + */ +extern int srom_parsecis(u8 **pcis, uint ciscnt, + char **vars, uint *count); +#endif /* _BRCM_SROM_H_ */ -- cgit v0.10.2 From 8955cafb4589dff70fe068bc1eff8c9395cf8cb2 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:00 +0200 Subject: staging: brcm80211: deleted header file include/aidmp.h Code cleanup. Merged used contents into brcmsmac/aiutils.c. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 1f87b32..071279a 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -166,6 +166,195 @@ (sih->chiprev == 0) && \ (sii->coreid[sii->curidx] == MIPS74K_CORE_ID)) +/* Manufacturer Ids */ +#define MFGID_ARM 0x43b +#define MFGID_BRCM 0x4bf +#define MFGID_MIPS 0x4a7 + +/* Enumeration ROM registers */ +#define ER_EROMENTRY 0x000 +#define ER_REMAPCONTROL 0xe00 +#define ER_REMAPSELECT 0xe04 +#define ER_MASTERSELECT 0xe10 +#define ER_ITCR 0xf00 +#define ER_ITIP 0xf04 + +/* Erom entries */ +#define ER_TAG 0xe +#define ER_TAG1 0x6 +#define ER_VALID 1 +#define ER_CI 0 +#define ER_MP 2 +#define ER_ADD 4 +#define ER_END 0xe +#define ER_BAD 0xffffffff + +/* EROM CompIdentA */ +#define CIA_MFG_MASK 0xfff00000 +#define CIA_MFG_SHIFT 20 +#define CIA_CID_MASK 0x000fff00 +#define CIA_CID_SHIFT 8 +#define CIA_CCL_MASK 0x000000f0 +#define CIA_CCL_SHIFT 4 + +/* EROM CompIdentB */ +#define CIB_REV_MASK 0xff000000 +#define CIB_REV_SHIFT 24 +#define CIB_NSW_MASK 0x00f80000 +#define CIB_NSW_SHIFT 19 +#define CIB_NMW_MASK 0x0007c000 +#define CIB_NMW_SHIFT 14 +#define CIB_NSP_MASK 0x00003e00 +#define CIB_NSP_SHIFT 9 +#define CIB_NMP_MASK 0x000001f0 +#define CIB_NMP_SHIFT 4 + +/* EROM AddrDesc */ +#define AD_ADDR_MASK 0xfffff000 +#define AD_SP_MASK 0x00000f00 +#define AD_SP_SHIFT 8 +#define AD_ST_MASK 0x000000c0 +#define AD_ST_SHIFT 6 +#define AD_ST_SLAVE 0x00000000 +#define AD_ST_BRIDGE 0x00000040 +#define AD_ST_SWRAP 0x00000080 +#define AD_ST_MWRAP 0x000000c0 +#define AD_SZ_MASK 0x00000030 +#define AD_SZ_SHIFT 4 +#define AD_SZ_4K 0x00000000 +#define AD_SZ_8K 0x00000010 +#define AD_SZ_16K 0x00000020 +#define AD_SZ_SZD 0x00000030 +#define AD_AG32 0x00000008 +#define AD_ADDR_ALIGN 0x00000fff +#define AD_SZ_BASE 0x00001000 /* 4KB */ + +/* EROM SizeDesc */ +#define SD_SZ_MASK 0xfffff000 +#define SD_SG32 0x00000008 +#define SD_SZ_ALIGN 0x00000fff + +/* resetctrl */ +#define AIRC_RESET 1 + +typedef volatile struct _aidmp { + u32 oobselina30; /* 0x000 */ + u32 oobselina74; /* 0x004 */ + u32 PAD[6]; + u32 oobselinb30; /* 0x020 */ + u32 oobselinb74; /* 0x024 */ + u32 PAD[6]; + u32 oobselinc30; /* 0x040 */ + u32 oobselinc74; /* 0x044 */ + u32 PAD[6]; + u32 oobselind30; /* 0x060 */ + u32 oobselind74; /* 0x064 */ + u32 PAD[38]; + u32 oobselouta30; /* 0x100 */ + u32 oobselouta74; /* 0x104 */ + u32 PAD[6]; + u32 oobseloutb30; /* 0x120 */ + u32 oobseloutb74; /* 0x124 */ + u32 PAD[6]; + u32 oobseloutc30; /* 0x140 */ + u32 oobseloutc74; /* 0x144 */ + u32 PAD[6]; + u32 oobseloutd30; /* 0x160 */ + u32 oobseloutd74; /* 0x164 */ + u32 PAD[38]; + u32 oobsynca; /* 0x200 */ + u32 oobseloutaen; /* 0x204 */ + u32 PAD[6]; + u32 oobsyncb; /* 0x220 */ + u32 oobseloutben; /* 0x224 */ + u32 PAD[6]; + u32 oobsyncc; /* 0x240 */ + u32 oobseloutcen; /* 0x244 */ + u32 PAD[6]; + u32 oobsyncd; /* 0x260 */ + u32 oobseloutden; /* 0x264 */ + u32 PAD[38]; + u32 oobaextwidth; /* 0x300 */ + u32 oobainwidth; /* 0x304 */ + u32 oobaoutwidth; /* 0x308 */ + u32 PAD[5]; + u32 oobbextwidth; /* 0x320 */ + u32 oobbinwidth; /* 0x324 */ + u32 oobboutwidth; /* 0x328 */ + u32 PAD[5]; + u32 oobcextwidth; /* 0x340 */ + u32 oobcinwidth; /* 0x344 */ + u32 oobcoutwidth; /* 0x348 */ + u32 PAD[5]; + u32 oobdextwidth; /* 0x360 */ + u32 oobdinwidth; /* 0x364 */ + u32 oobdoutwidth; /* 0x368 */ + u32 PAD[37]; + u32 ioctrlset; /* 0x400 */ + u32 ioctrlclear; /* 0x404 */ + u32 ioctrl; /* 0x408 */ + u32 PAD[61]; + u32 iostatus; /* 0x500 */ + u32 PAD[127]; + u32 ioctrlwidth; /* 0x700 */ + u32 iostatuswidth; /* 0x704 */ + u32 PAD[62]; + u32 resetctrl; /* 0x800 */ + u32 resetstatus; /* 0x804 */ + u32 resetreadid; /* 0x808 */ + u32 resetwriteid; /* 0x80c */ + u32 PAD[60]; + u32 errlogctrl; /* 0x900 */ + u32 errlogdone; /* 0x904 */ + u32 errlogstatus; /* 0x908 */ + u32 errlogaddrlo; /* 0x90c */ + u32 errlogaddrhi; /* 0x910 */ + u32 errlogid; /* 0x914 */ + u32 errloguser; /* 0x918 */ + u32 errlogflags; /* 0x91c */ + u32 PAD[56]; + u32 intstatus; /* 0xa00 */ + u32 PAD[127]; + u32 config; /* 0xe00 */ + u32 PAD[63]; + u32 itcr; /* 0xf00 */ + u32 PAD[3]; + u32 itipooba; /* 0xf10 */ + u32 itipoobb; /* 0xf14 */ + u32 itipoobc; /* 0xf18 */ + u32 itipoobd; /* 0xf1c */ + u32 PAD[4]; + u32 itipoobaout; /* 0xf30 */ + u32 itipoobbout; /* 0xf34 */ + u32 itipoobcout; /* 0xf38 */ + u32 itipoobdout; /* 0xf3c */ + u32 PAD[4]; + u32 itopooba; /* 0xf50 */ + u32 itopoobb; /* 0xf54 */ + u32 itopoobc; /* 0xf58 */ + u32 itopoobd; /* 0xf5c */ + u32 PAD[4]; + u32 itopoobain; /* 0xf70 */ + u32 itopoobbin; /* 0xf74 */ + u32 itopoobcin; /* 0xf78 */ + u32 itopoobdin; /* 0xf7c */ + u32 PAD[4]; + u32 itopreset; /* 0xf90 */ + u32 PAD[15]; + u32 peripherialid4; /* 0xfd0 */ + u32 peripherialid5; /* 0xfd4 */ + u32 peripherialid6; /* 0xfd8 */ + u32 peripherialid7; /* 0xfdc */ + u32 peripherialid0; /* 0xfe0 */ + u32 peripherialid1; /* 0xfe4 */ + u32 peripherialid2; /* 0xfe8 */ + u32 peripherialid3; /* 0xfec */ + u32 componentid0; /* 0xff0 */ + u32 componentid1; /* 0xff4 */ + u32 componentid2; /* 0xff8 */ + u32 componentid3; /* 0xffc */ +} aidmp_t; + /* EROM parsing */ static u32 diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index ad18b38..f8f5cc1 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -17,9 +17,6 @@ #ifndef _BRCM_AIUTILS_H_ #define _BRCM_AIUTILS_H_ -/* Include the soci specific files */ -#include - /* * SOC Interconnect Address Map. * All regions may not exist on all chips. diff --git a/drivers/staging/brcm80211/brcmsmac/scb.h b/drivers/staging/brcm80211/brcmsmac/scb.h index dcad9d0..edd471b 100644 --- a/drivers/staging/brcm80211/brcmsmac/scb.h +++ b/drivers/staging/brcm80211/brcmsmac/scb.h @@ -18,6 +18,7 @@ #define _BRCM_SCB_H_ #include /* for ETH_ALEN */ +#include #define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ /* structure to store per-tid state for the ampdu initiator */ diff --git a/drivers/staging/brcm80211/include/aidmp.h b/drivers/staging/brcm80211/include/aidmp.h deleted file mode 100644 index d166af4..0000000 --- a/drivers/staging/brcm80211/include/aidmp.h +++ /dev/null @@ -1,372 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _AIDMP_H -#define _AIDMP_H - -#include "defs.h" /* for PAD macro */ - -/* Manufacturer Ids */ -#define MFGID_ARM 0x43b -#define MFGID_BRCM 0x4bf -#define MFGID_MIPS 0x4a7 - -/* Component Classes */ -#define CC_SIM 0 -#define CC_EROM 1 -#define CC_CORESIGHT 9 -#define CC_VERIF 0xb -#define CC_OPTIMO 0xd -#define CC_GEN 0xe -#define CC_PRIMECELL 0xf - -/* Enumeration ROM registers */ -#define ER_EROMENTRY 0x000 -#define ER_REMAPCONTROL 0xe00 -#define ER_REMAPSELECT 0xe04 -#define ER_MASTERSELECT 0xe10 -#define ER_ITCR 0xf00 -#define ER_ITIP 0xf04 - -/* Erom entries */ -#define ER_TAG 0xe -#define ER_TAG1 0x6 -#define ER_VALID 1 -#define ER_CI 0 -#define ER_MP 2 -#define ER_ADD 4 -#define ER_END 0xe -#define ER_BAD 0xffffffff - -/* EROM CompIdentA */ -#define CIA_MFG_MASK 0xfff00000 -#define CIA_MFG_SHIFT 20 -#define CIA_CID_MASK 0x000fff00 -#define CIA_CID_SHIFT 8 -#define CIA_CCL_MASK 0x000000f0 -#define CIA_CCL_SHIFT 4 - -/* EROM CompIdentB */ -#define CIB_REV_MASK 0xff000000 -#define CIB_REV_SHIFT 24 -#define CIB_NSW_MASK 0x00f80000 -#define CIB_NSW_SHIFT 19 -#define CIB_NMW_MASK 0x0007c000 -#define CIB_NMW_SHIFT 14 -#define CIB_NSP_MASK 0x00003e00 -#define CIB_NSP_SHIFT 9 -#define CIB_NMP_MASK 0x000001f0 -#define CIB_NMP_SHIFT 4 - -/* EROM MasterPortDesc */ -#define MPD_MUI_MASK 0x0000ff00 -#define MPD_MUI_SHIFT 8 -#define MPD_MP_MASK 0x000000f0 -#define MPD_MP_SHIFT 4 - -/* EROM AddrDesc */ -#define AD_ADDR_MASK 0xfffff000 -#define AD_SP_MASK 0x00000f00 -#define AD_SP_SHIFT 8 -#define AD_ST_MASK 0x000000c0 -#define AD_ST_SHIFT 6 -#define AD_ST_SLAVE 0x00000000 -#define AD_ST_BRIDGE 0x00000040 -#define AD_ST_SWRAP 0x00000080 -#define AD_ST_MWRAP 0x000000c0 -#define AD_SZ_MASK 0x00000030 -#define AD_SZ_SHIFT 4 -#define AD_SZ_4K 0x00000000 -#define AD_SZ_8K 0x00000010 -#define AD_SZ_16K 0x00000020 -#define AD_SZ_SZD 0x00000030 -#define AD_AG32 0x00000008 -#define AD_ADDR_ALIGN 0x00000fff -#define AD_SZ_BASE 0x00001000 /* 4KB */ - -/* EROM SizeDesc */ -#define SD_SZ_MASK 0xfffff000 -#define SD_SG32 0x00000008 -#define SD_SZ_ALIGN 0x00000fff - -typedef volatile struct _aidmp { - u32 oobselina30; /* 0x000 */ - u32 oobselina74; /* 0x004 */ - u32 PAD[6]; - u32 oobselinb30; /* 0x020 */ - u32 oobselinb74; /* 0x024 */ - u32 PAD[6]; - u32 oobselinc30; /* 0x040 */ - u32 oobselinc74; /* 0x044 */ - u32 PAD[6]; - u32 oobselind30; /* 0x060 */ - u32 oobselind74; /* 0x064 */ - u32 PAD[38]; - u32 oobselouta30; /* 0x100 */ - u32 oobselouta74; /* 0x104 */ - u32 PAD[6]; - u32 oobseloutb30; /* 0x120 */ - u32 oobseloutb74; /* 0x124 */ - u32 PAD[6]; - u32 oobseloutc30; /* 0x140 */ - u32 oobseloutc74; /* 0x144 */ - u32 PAD[6]; - u32 oobseloutd30; /* 0x160 */ - u32 oobseloutd74; /* 0x164 */ - u32 PAD[38]; - u32 oobsynca; /* 0x200 */ - u32 oobseloutaen; /* 0x204 */ - u32 PAD[6]; - u32 oobsyncb; /* 0x220 */ - u32 oobseloutben; /* 0x224 */ - u32 PAD[6]; - u32 oobsyncc; /* 0x240 */ - u32 oobseloutcen; /* 0x244 */ - u32 PAD[6]; - u32 oobsyncd; /* 0x260 */ - u32 oobseloutden; /* 0x264 */ - u32 PAD[38]; - u32 oobaextwidth; /* 0x300 */ - u32 oobainwidth; /* 0x304 */ - u32 oobaoutwidth; /* 0x308 */ - u32 PAD[5]; - u32 oobbextwidth; /* 0x320 */ - u32 oobbinwidth; /* 0x324 */ - u32 oobboutwidth; /* 0x328 */ - u32 PAD[5]; - u32 oobcextwidth; /* 0x340 */ - u32 oobcinwidth; /* 0x344 */ - u32 oobcoutwidth; /* 0x348 */ - u32 PAD[5]; - u32 oobdextwidth; /* 0x360 */ - u32 oobdinwidth; /* 0x364 */ - u32 oobdoutwidth; /* 0x368 */ - u32 PAD[37]; - u32 ioctrlset; /* 0x400 */ - u32 ioctrlclear; /* 0x404 */ - u32 ioctrl; /* 0x408 */ - u32 PAD[61]; - u32 iostatus; /* 0x500 */ - u32 PAD[127]; - u32 ioctrlwidth; /* 0x700 */ - u32 iostatuswidth; /* 0x704 */ - u32 PAD[62]; - u32 resetctrl; /* 0x800 */ - u32 resetstatus; /* 0x804 */ - u32 resetreadid; /* 0x808 */ - u32 resetwriteid; /* 0x80c */ - u32 PAD[60]; - u32 errlogctrl; /* 0x900 */ - u32 errlogdone; /* 0x904 */ - u32 errlogstatus; /* 0x908 */ - u32 errlogaddrlo; /* 0x90c */ - u32 errlogaddrhi; /* 0x910 */ - u32 errlogid; /* 0x914 */ - u32 errloguser; /* 0x918 */ - u32 errlogflags; /* 0x91c */ - u32 PAD[56]; - u32 intstatus; /* 0xa00 */ - u32 PAD[127]; - u32 config; /* 0xe00 */ - u32 PAD[63]; - u32 itcr; /* 0xf00 */ - u32 PAD[3]; - u32 itipooba; /* 0xf10 */ - u32 itipoobb; /* 0xf14 */ - u32 itipoobc; /* 0xf18 */ - u32 itipoobd; /* 0xf1c */ - u32 PAD[4]; - u32 itipoobaout; /* 0xf30 */ - u32 itipoobbout; /* 0xf34 */ - u32 itipoobcout; /* 0xf38 */ - u32 itipoobdout; /* 0xf3c */ - u32 PAD[4]; - u32 itopooba; /* 0xf50 */ - u32 itopoobb; /* 0xf54 */ - u32 itopoobc; /* 0xf58 */ - u32 itopoobd; /* 0xf5c */ - u32 PAD[4]; - u32 itopoobain; /* 0xf70 */ - u32 itopoobbin; /* 0xf74 */ - u32 itopoobcin; /* 0xf78 */ - u32 itopoobdin; /* 0xf7c */ - u32 PAD[4]; - u32 itopreset; /* 0xf90 */ - u32 PAD[15]; - u32 peripherialid4; /* 0xfd0 */ - u32 peripherialid5; /* 0xfd4 */ - u32 peripherialid6; /* 0xfd8 */ - u32 peripherialid7; /* 0xfdc */ - u32 peripherialid0; /* 0xfe0 */ - u32 peripherialid1; /* 0xfe4 */ - u32 peripherialid2; /* 0xfe8 */ - u32 peripherialid3; /* 0xfec */ - u32 componentid0; /* 0xff0 */ - u32 componentid1; /* 0xff4 */ - u32 componentid2; /* 0xff8 */ - u32 componentid3; /* 0xffc */ -} aidmp_t; - -/* Out-of-band Router registers */ -#define OOB_BUSCONFIG 0x020 -#define OOB_STATUSA 0x100 -#define OOB_STATUSB 0x104 -#define OOB_STATUSC 0x108 -#define OOB_STATUSD 0x10c -#define OOB_ENABLEA0 0x200 -#define OOB_ENABLEA1 0x204 -#define OOB_ENABLEA2 0x208 -#define OOB_ENABLEA3 0x20c -#define OOB_ENABLEB0 0x280 -#define OOB_ENABLEB1 0x284 -#define OOB_ENABLEB2 0x288 -#define OOB_ENABLEB3 0x28c -#define OOB_ENABLEC0 0x300 -#define OOB_ENABLEC1 0x304 -#define OOB_ENABLEC2 0x308 -#define OOB_ENABLEC3 0x30c -#define OOB_ENABLED0 0x380 -#define OOB_ENABLED1 0x384 -#define OOB_ENABLED2 0x388 -#define OOB_ENABLED3 0x38c -#define OOB_ITCR 0xf00 -#define OOB_ITIPOOBA 0xf10 -#define OOB_ITIPOOBB 0xf14 -#define OOB_ITIPOOBC 0xf18 -#define OOB_ITIPOOBD 0xf1c -#define OOB_ITOPOOBA 0xf30 -#define OOB_ITOPOOBB 0xf34 -#define OOB_ITOPOOBC 0xf38 -#define OOB_ITOPOOBD 0xf3c - -/* DMP wrapper registers */ -#define AI_OOBSELINA30 0x000 -#define AI_OOBSELINA74 0x004 -#define AI_OOBSELINB30 0x020 -#define AI_OOBSELINB74 0x024 -#define AI_OOBSELINC30 0x040 -#define AI_OOBSELINC74 0x044 -#define AI_OOBSELIND30 0x060 -#define AI_OOBSELIND74 0x064 -#define AI_OOBSELOUTA30 0x100 -#define AI_OOBSELOUTA74 0x104 -#define AI_OOBSELOUTB30 0x120 -#define AI_OOBSELOUTB74 0x124 -#define AI_OOBSELOUTC30 0x140 -#define AI_OOBSELOUTC74 0x144 -#define AI_OOBSELOUTD30 0x160 -#define AI_OOBSELOUTD74 0x164 -#define AI_OOBSYNCA 0x200 -#define AI_OOBSELOUTAEN 0x204 -#define AI_OOBSYNCB 0x220 -#define AI_OOBSELOUTBEN 0x224 -#define AI_OOBSYNCC 0x240 -#define AI_OOBSELOUTCEN 0x244 -#define AI_OOBSYNCD 0x260 -#define AI_OOBSELOUTDEN 0x264 -#define AI_OOBAEXTWIDTH 0x300 -#define AI_OOBAINWIDTH 0x304 -#define AI_OOBAOUTWIDTH 0x308 -#define AI_OOBBEXTWIDTH 0x320 -#define AI_OOBBINWIDTH 0x324 -#define AI_OOBBOUTWIDTH 0x328 -#define AI_OOBCEXTWIDTH 0x340 -#define AI_OOBCINWIDTH 0x344 -#define AI_OOBCOUTWIDTH 0x348 -#define AI_OOBDEXTWIDTH 0x360 -#define AI_OOBDINWIDTH 0x364 -#define AI_OOBDOUTWIDTH 0x368 - -#if defined(__BIG_ENDIAN) && defined(BCMHND74K) -/* Selective swapped defines for those registers we need in - * big-endian code. - */ -#define AI_IOCTRLSET 0x404 -#define AI_IOCTRLCLEAR 0x400 -#define AI_IOCTRL 0x40c -#define AI_IOSTATUS 0x504 -#define AI_RESETCTRL 0x804 -#define AI_RESETSTATUS 0x800 - -#else /* !__BIG_ENDIAN || !BCMHND74K */ - -#define AI_IOCTRLSET 0x400 -#define AI_IOCTRLCLEAR 0x404 -#define AI_IOCTRL 0x408 -#define AI_IOSTATUS 0x500 -#define AI_RESETCTRL 0x800 -#define AI_RESETSTATUS 0x804 - -#endif /* __BIG_ENDIAN && BCMHND74K */ - -#define AI_IOCTRLWIDTH 0x700 -#define AI_IOSTATUSWIDTH 0x704 - -#define AI_RESETREADID 0x808 -#define AI_RESETWRITEID 0x80c -#define AI_ERRLOGCTRL 0xa00 -#define AI_ERRLOGDONE 0xa04 -#define AI_ERRLOGSTATUS 0xa08 -#define AI_ERRLOGADDRLO 0xa0c -#define AI_ERRLOGADDRHI 0xa10 -#define AI_ERRLOGID 0xa14 -#define AI_ERRLOGUSER 0xa18 -#define AI_ERRLOGFLAGS 0xa1c -#define AI_INTSTATUS 0xa00 -#define AI_CONFIG 0xe00 -#define AI_ITCR 0xf00 -#define AI_ITIPOOBA 0xf10 -#define AI_ITIPOOBB 0xf14 -#define AI_ITIPOOBC 0xf18 -#define AI_ITIPOOBD 0xf1c -#define AI_ITIPOOBAOUT 0xf30 -#define AI_ITIPOOBBOUT 0xf34 -#define AI_ITIPOOBCOUT 0xf38 -#define AI_ITIPOOBDOUT 0xf3c -#define AI_ITOPOOBA 0xf50 -#define AI_ITOPOOBB 0xf54 -#define AI_ITOPOOBC 0xf58 -#define AI_ITOPOOBD 0xf5c -#define AI_ITOPOOBAIN 0xf70 -#define AI_ITOPOOBBIN 0xf74 -#define AI_ITOPOOBCIN 0xf78 -#define AI_ITOPOOBDIN 0xf7c -#define AI_ITOPRESET 0xf90 -#define AI_PERIPHERIALID4 0xfd0 -#define AI_PERIPHERIALID5 0xfd4 -#define AI_PERIPHERIALID6 0xfd8 -#define AI_PERIPHERIALID7 0xfdc -#define AI_PERIPHERIALID0 0xfe0 -#define AI_PERIPHERIALID1 0xfe4 -#define AI_PERIPHERIALID2 0xfe8 -#define AI_PERIPHERIALID3 0xfec -#define AI_COMPONENTID0 0xff0 -#define AI_COMPONENTID1 0xff4 -#define AI_COMPONENTID2 0xff8 -#define AI_COMPONENTID3 0xffc - -/* resetctrl */ -#define AIRC_RESET 1 - -/* config */ -#define AICFG_OOB 0x00000020 -#define AICFG_IOS 0x00000010 -#define AICFG_IOC 0x00000008 -#define AICFG_TO 0x00000004 -#define AICFG_ERRL 0x00000002 -#define AICFG_RST 0x00000001 - -#endif /* _AIDMP_H */ diff --git a/drivers/staging/brcm80211/include/soc.h b/drivers/staging/brcm80211/include/soc.h index 89e6719..ccbd58f 100644 --- a/drivers/staging/brcm80211/include/soc.h +++ b/drivers/staging/brcm80211/include/soc.h @@ -17,9 +17,6 @@ #ifndef _BRCM_SOC_H #define _BRCM_SOC_H -/* Include the soci specific files */ -#include - /* * SOC Interconnect Address Map. * All regions may not exist on all chips. -- cgit v0.10.2 From c54f52f60a8e92d98b9df0579c93f73a8d382ca9 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:01 +0200 Subject: staging: brcm80211: cleaned include/brcm_hw_ids.h Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 071279a..7eabe90 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -234,6 +234,15 @@ #define SD_SG32 0x00000008 #define SD_SZ_ALIGN 0x00000fff +#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ + +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ +#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ + /* resetctrl */ #define AIRC_RESET 1 diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index f8f5cc1..b007fac 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -259,6 +259,23 @@ #define CST4330_CBUCK_POWER_OK 0x00004000 #define CST4330_BB_PLL_LOCKED 0x00008000 +/* Package IDs */ +#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ +#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ +#define BCM4717_PKG_ID 9 /* 4717 package id */ +#define BCM4718_PKG_ID 10 /* 4718 package id */ +#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ +#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ +#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ + +/* these are router chips */ +#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ +#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ +#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ +#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ +#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ + + #define SI_INFO(sih) ((si_info_t *)sih) #define GOODCOREADDR(x, b) \ diff --git a/drivers/staging/brcm80211/brcmsmac/types.h b/drivers/staging/brcm80211/brcmsmac/types.h index d15860b..526d3e3 100644 --- a/drivers/staging/brcm80211/brcmsmac/types.h +++ b/drivers/staging/brcm80211/brcmsmac/types.h @@ -33,6 +33,44 @@ #define MAX_DMA_SEGS 4 +/* boardflags */ +#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ +#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ +#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ +#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ +#define BFL_NOPA 0x00010000 /* Board has no PA */ +#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ +#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ +#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ +#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ +#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ + +/* boardflags2 */ +#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ +#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ +#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ +#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ +#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ +#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ +#define BFL2_LEGACY 0x00000080 +#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ +#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ +#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ +#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ +#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ +#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ +#define BFL2_IPALVLSHIFT_3P3 0x00020000 +#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ +#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" + * Most drivers will turn it off without this flag + * to save power. + */ + +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ +#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ +#define BOARD_GPIO_12 0x1000 /* gpio 12 */ +#define BOARD_GPIO_13 0x2000 /* gpio 13 */ + #define BCMMSG(dev, fmt, args...) \ do { \ if (brcm_msg_level & LOG_TRACE_VAL) \ diff --git a/drivers/staging/brcm80211/include/brcm_hw_ids.h b/drivers/staging/brcm80211/include/brcm_hw_ids.h index b7aedac..5fb17d5 100644 --- a/drivers/staging/brcm80211/include/brcm_hw_ids.h +++ b/drivers/staging/brcm80211/include/brcm_hw_ids.h @@ -56,70 +56,4 @@ #define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ #define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ -/* these are router chips */ -#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ -#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ -#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ -#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ -#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ - -/* Package IDs */ -#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ -#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ -#define BCM4717_PKG_ID 9 /* 4717 package id */ -#define BCM4718_PKG_ID 10 /* 4718 package id */ -#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ -#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ -#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ - -/* boardflags */ -#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ -#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ -#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ -#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ -#define BFL_NOPA 0x00010000 /* Board has no PA */ -#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ -#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ -#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ -#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ -#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ - -/* boardflags2 */ -#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ -#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ -#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ -#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ -#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ -#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ -#define BFL2_LEGACY 0x00000080 -#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ -#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ -#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ -#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ -#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ -#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ -#define BFL2_IPALVLSHIFT_3P3 0x00020000 -#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ -#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" - * Most drivers will turn it off without this flag - * to save power. - */ - -/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ -#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ -#define BOARD_GPIO_12 0x1000 /* gpio 12 */ -#define BOARD_GPIO_13 0x2000 /* gpio 13 */ - -#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ -#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ -#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ - -/* power control defines */ -#define PLL_DELAY 150 /* us pll on delay */ -#define FREF_DELAY 200 /* us fref change delay */ -#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ - -/* Reference board types */ -#define SPI_BOARD 0x0402 - #endif /* _BRCM_HW_IDS_H_ */ -- cgit v0.10.2 From c55a12234663125bf8c4183e27f1ca71bd19ca1e Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:02 +0200 Subject: staging: brcm80211: moved /include/sdio_host.h to /brcmfmac dir Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h index 53c3291..e9da1ce 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h @@ -17,6 +17,8 @@ #ifndef _sdio_api_h_ #define _sdio_api_h_ +#include "sdio_host.h" + #define SDIOH_API_RC_SUCCESS (0x00) #define SDIOH_API_RC_FAIL (0x01) #define SDIOH_API_SUCCESS(status) (status == 0) diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index d6e90d7..b3bdd48 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -25,8 +25,6 @@ #include #include -#include /* BRCM API for SDIO - clients (such as wl, dhd) */ #include /* common SDIO/controller interface */ #include /* BRCM sdio device core */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index 37cf61a..71ef23a 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -28,8 +28,8 @@ #include #include #include -#include #include +#include "sdio_host.h" #if defined(OOB_INTR_ONLY) #include diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index 03a5966..66e204b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include "sdio_host.h" #include /* bcmsdh to/from specific controller APIs */ #include /* ioctl/iovars */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c index 85ed095..9fc491d 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include "sdio_host.h" #include /* bcmsdh to/from specific controller APIs */ #include /* to get msglevel bit values */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 4f5ab69..330703b 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -23,9 +23,7 @@ #include #include #include -#include - -#include +#include "sdio_host.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/sdio_host.h b/drivers/staging/brcm80211/brcmfmac/sdio_host.h new file mode 100644 index 0000000..db19533 --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/sdio_host.h @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SDH_H_ +#define _BRCM_SDH_H_ + +#include +#define BCMSDH_ERROR_VAL 0x0001 /* Error */ +#define BCMSDH_INFO_VAL 0x0002 /* Info */ +extern const uint bcmsdh_msglevel; + +#ifdef BCMDBG +#define BCMSDH_ERROR(x) \ + do { \ + if ((bcmsdh_msglevel & BCMSDH_ERROR_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define BCMSDH_INFO(x) \ + do { \ + if ((bcmsdh_msglevel & BCMSDH_INFO_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#else /* BCMDBG */ +#define BCMSDH_ERROR(x) +#define BCMSDH_INFO(x) +#endif /* BCMDBG */ + +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 + +#define SDIOD_FBR_SIZE 0x100 + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 +#define SDIO_FUNC_ENABLE_2 0x04 + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 +#define SDIO_FUNC_READY_2 0x04 + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 +#define INTR_STATUS_FUNC2 0x4 + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_IOFUNCS 7 + +/* forward declarations */ +typedef struct bcmsdh_info bcmsdh_info_t; +typedef void (*bcmsdh_cb_fn_t) (void *); + +/* Attach and build an interface to the underlying SD host driver. + * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. + * - Returns the bcmsdh handle and virtual address base for register access. + * The returned handle should be used in all subsequent calls, but the bcmsh + * implementation may maintain a single "default" handle (e.g. the first or + * most recent one) to enable single-instance implementations to pass NULL. + */ +extern bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq); + +/* Detach - freeup resources allocated in attach */ +extern int bcmsdh_detach(void *sdh); + +/* Query if SD device interrupts are enabled */ +extern bool bcmsdh_intr_query(void *sdh); + +/* Enable/disable SD interrupt */ +extern int bcmsdh_intr_enable(void *sdh); +extern int bcmsdh_intr_disable(void *sdh); + +/* Register/deregister device interrupt handler. */ +extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); +extern int bcmsdh_intr_dereg(void *sdh); + +#if defined(DHD_DEBUG) +/* Query pending interrupt status from the host controller */ +extern bool bcmsdh_intr_pending(void *sdh); +#endif +extern int bcmsdh_claim_host_and_lock(void *sdh); +extern int bcmsdh_release_host_and_unlock(void *sdh); + +/* Register a callback to be called if and when bcmsdh detects + * device removal. No-op in the case of non-removable/hardwired devices. + */ +extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); + +/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). + * fn: function number + * addr: unmodified SDIO-space address + * data: data byte to write + * err: pointer to error code (or NULL) + */ +extern u8 bcmsdh_cfg_read(void *sdh, uint func, u32 addr, int *err); +extern void bcmsdh_cfg_write(void *sdh, uint func, u32 addr, u8 data, + int *err); + +/* Read/Write 4bytes from/to cfg space */ +extern u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, + int *err); +extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, + u32 data, int *err); + +/* Read CIS content for specified function. + * fn: function whose CIS is being requested (0 is common CIS) + * cis: pointer to memory location to place results + * length: number of bytes to read + * Internally, this routine uses the values from the cis base regs (0x9-0xB) + * to form an SDIO-space address to read the data from. + */ +extern int bcmsdh_cis_read(void *sdh, uint func, u8 *cis, uint length); + +/* Synchronous access to device (client) core registers via CMD53 to F1. + * addr: backplane address (i.e. >= regsva from attach) + * size: register width in bytes (2 or 4) + * data: data for register write + */ +extern u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size); +extern u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data); + +/* Indicate if last reg read/write failed */ +extern bool bcmsdh_regfail(void *sdh); + +/* Buffer transfer to/from device (client) core via cmd53. + * fn: function number + * addr: backplane address (i.e. >= regsva from attach) + * flags: backplane width, address increment, sync/async + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * pkt: pointer to packet associated with buf (if any) + * complete: callback function for command completion (async only) + * handle: handle for completion callback (first arg in callback) + * Returns 0 or error code. + * NOTE: Async operation is not currently supported. + */ +typedef void (*bcmsdh_cmplt_fn_t) (void *handle, int status, bool sync_waiting); +extern int bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, + u8 *buf, uint nbytes, void *pkt, + bcmsdh_cmplt_fn_t complete, void *handle); +extern int bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, + u8 *buf, uint nbytes, struct sk_buff *pkt, + bcmsdh_cmplt_fn_t complete, void *handle); + +/* Flags bits */ +#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ +#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ +#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ + +/* Pending (non-error) return code */ +#define BCME_PENDING 1 + +/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). + * rw: read or write (0/1) + * addr: direct SDIO address + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * Returns 0 or error code. + */ +extern int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, + uint nbytes); + +/* Issue an abort to the specified function */ +extern int bcmsdh_abort(void *sdh, uint fn); + +/* Start SDIO Host Controller communication */ +extern int bcmsdh_start(void *sdh, int stage); + +/* Stop SDIO Host Controller communication */ +extern int bcmsdh_stop(void *sdh); + +/* Returns the "Device ID" of target device on the SDIO bus. */ +extern int bcmsdh_query_device(void *sdh); + +/* Returns the number of IO functions reported by the device */ +extern uint bcmsdh_query_iofnum(void *sdh); + +/* Miscellaneous knob tweaker. */ +extern int bcmsdh_iovar_op(void *sdh, const char *name, + void *params, int plen, void *arg, int len, + bool set); + +/* Reset and reinitialize the device */ +extern int bcmsdh_reset(bcmsdh_info_t *sdh); + +/* helper functions */ + +extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); + +/* callback functions */ +typedef struct { + /* attach to device */ + void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, + u16 func, uint bustype, void *regsva, void *param); + /* detach from device */ + void (*detach) (void *ch); +} bcmsdh_driver_t; + +/* platform specific/high level functions */ +extern int bcmsdh_register(bcmsdh_driver_t *driver); +extern void bcmsdh_unregister(void); +extern bool bcmsdh_chipmatch(u16 vendor, u16 device); +extern void bcmsdh_device_remove(void *sdh); + +/* Function to pass device-status bits to DHD. */ +extern u32 bcmsdh_get_dstatus(void *sdh); + +/* Function to return current window addr */ +extern u32 bcmsdh_cur_sbwad(void *sdh); + +/* Function to pass chipid and rev to lower layers for controlling pr's */ +extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); + +#endif /* _BRCM_SDH_H_ */ diff --git a/drivers/staging/brcm80211/include/sdio_host.h b/drivers/staging/brcm80211/include/sdio_host.h deleted file mode 100644 index db19533..0000000 --- a/drivers/staging/brcm80211/include/sdio_host.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SDH_H_ -#define _BRCM_SDH_H_ - -#include -#define BCMSDH_ERROR_VAL 0x0001 /* Error */ -#define BCMSDH_INFO_VAL 0x0002 /* Info */ -extern const uint bcmsdh_msglevel; - -#ifdef BCMDBG -#define BCMSDH_ERROR(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_ERROR_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define BCMSDH_INFO(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_INFO_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#else /* BCMDBG */ -#define BCMSDH_ERROR(x) -#define BCMSDH_INFO(x) -#endif /* BCMDBG */ - -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 - -#define SDIOD_FBR_SIZE 0x100 - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 -#define SDIO_FUNC_ENABLE_2 0x04 - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 -#define SDIO_FUNC_READY_2 0x04 - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 -#define INTR_STATUS_FUNC2 0x4 - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_IOFUNCS 7 - -/* forward declarations */ -typedef struct bcmsdh_info bcmsdh_info_t; -typedef void (*bcmsdh_cb_fn_t) (void *); - -/* Attach and build an interface to the underlying SD host driver. - * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. - * - Returns the bcmsdh handle and virtual address base for register access. - * The returned handle should be used in all subsequent calls, but the bcmsh - * implementation may maintain a single "default" handle (e.g. the first or - * most recent one) to enable single-instance implementations to pass NULL. - */ -extern bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq); - -/* Detach - freeup resources allocated in attach */ -extern int bcmsdh_detach(void *sdh); - -/* Query if SD device interrupts are enabled */ -extern bool bcmsdh_intr_query(void *sdh); - -/* Enable/disable SD interrupt */ -extern int bcmsdh_intr_enable(void *sdh); -extern int bcmsdh_intr_disable(void *sdh); - -/* Register/deregister device interrupt handler. */ -extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); -extern int bcmsdh_intr_dereg(void *sdh); - -#if defined(DHD_DEBUG) -/* Query pending interrupt status from the host controller */ -extern bool bcmsdh_intr_pending(void *sdh); -#endif -extern int bcmsdh_claim_host_and_lock(void *sdh); -extern int bcmsdh_release_host_and_unlock(void *sdh); - -/* Register a callback to be called if and when bcmsdh detects - * device removal. No-op in the case of non-removable/hardwired devices. - */ -extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); - -/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). - * fn: function number - * addr: unmodified SDIO-space address - * data: data byte to write - * err: pointer to error code (or NULL) - */ -extern u8 bcmsdh_cfg_read(void *sdh, uint func, u32 addr, int *err); -extern void bcmsdh_cfg_write(void *sdh, uint func, u32 addr, u8 data, - int *err); - -/* Read/Write 4bytes from/to cfg space */ -extern u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, - int *err); -extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, - u32 data, int *err); - -/* Read CIS content for specified function. - * fn: function whose CIS is being requested (0 is common CIS) - * cis: pointer to memory location to place results - * length: number of bytes to read - * Internally, this routine uses the values from the cis base regs (0x9-0xB) - * to form an SDIO-space address to read the data from. - */ -extern int bcmsdh_cis_read(void *sdh, uint func, u8 *cis, uint length); - -/* Synchronous access to device (client) core registers via CMD53 to F1. - * addr: backplane address (i.e. >= regsva from attach) - * size: register width in bytes (2 or 4) - * data: data for register write - */ -extern u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size); -extern u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data); - -/* Indicate if last reg read/write failed */ -extern bool bcmsdh_regfail(void *sdh); - -/* Buffer transfer to/from device (client) core via cmd53. - * fn: function number - * addr: backplane address (i.e. >= regsva from attach) - * flags: backplane width, address increment, sync/async - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * pkt: pointer to packet associated with buf (if any) - * complete: callback function for command completion (async only) - * handle: handle for completion callback (first arg in callback) - * Returns 0 or error code. - * NOTE: Async operation is not currently supported. - */ -typedef void (*bcmsdh_cmplt_fn_t) (void *handle, int status, bool sync_waiting); -extern int bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); -extern int bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, struct sk_buff *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); - -/* Flags bits */ -#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ -#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ -#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ - -/* Pending (non-error) return code */ -#define BCME_PENDING 1 - -/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). - * rw: read or write (0/1) - * addr: direct SDIO address - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * Returns 0 or error code. - */ -extern int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, - uint nbytes); - -/* Issue an abort to the specified function */ -extern int bcmsdh_abort(void *sdh, uint fn); - -/* Start SDIO Host Controller communication */ -extern int bcmsdh_start(void *sdh, int stage); - -/* Stop SDIO Host Controller communication */ -extern int bcmsdh_stop(void *sdh); - -/* Returns the "Device ID" of target device on the SDIO bus. */ -extern int bcmsdh_query_device(void *sdh); - -/* Returns the number of IO functions reported by the device */ -extern uint bcmsdh_query_iofnum(void *sdh); - -/* Miscellaneous knob tweaker. */ -extern int bcmsdh_iovar_op(void *sdh, const char *name, - void *params, int plen, void *arg, int len, - bool set); - -/* Reset and reinitialize the device */ -extern int bcmsdh_reset(bcmsdh_info_t *sdh); - -/* helper functions */ - -extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - -/* callback functions */ -typedef struct { - /* attach to device */ - void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, - u16 func, uint bustype, void *regsva, void *param); - /* detach from device */ - void (*detach) (void *ch); -} bcmsdh_driver_t; - -/* platform specific/high level functions */ -extern int bcmsdh_register(bcmsdh_driver_t *driver); -extern void bcmsdh_unregister(void); -extern bool bcmsdh_chipmatch(u16 vendor, u16 device); -extern void bcmsdh_device_remove(void *sdh); - -/* Function to pass device-status bits to DHD. */ -extern u32 bcmsdh_get_dstatus(void *sdh); - -/* Function to return current window addr */ -extern u32 bcmsdh_cur_sbwad(void *sdh); - -/* Function to pass chipid and rev to lower layers for controlling pr's */ -extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); - -#endif /* _BRCM_SDH_H_ */ -- cgit v0.10.2 From 32b45065766b7421db2264a3ab7564c046a46d4d Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:03 +0200 Subject: staging: brcm80211: removed unused definitions from include/soc.h Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/include/soc.h b/drivers/staging/brcm80211/include/soc.h index ccbd58f..3e59377 100644 --- a/drivers/staging/brcm80211/include/soc.h +++ b/drivers/staging/brcm80211/include/soc.h @@ -17,54 +17,12 @@ #ifndef _BRCM_SOC_H #define _BRCM_SOC_H -/* - * SOC Interconnect Address Map. - * All regions may not exist on all chips. - */ -#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI_MEM_SZ (64 * 1024 * 1024) -#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ - #ifdef SI_ENUM_BASE_VARIABLE #define SI_ENUM_BASE (sii->pub.si_enum_base) #else #define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ #endif /* SI_ENUM_BASE_VARIABLE */ -#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ -#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software - * convenience and could be changed if we - * make any larger chips - */ - -#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ -#define SI_FASTRAM_SWAPPED 0x19800000 - -#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ -#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ -#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ -#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ -#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ -#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ -#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ -#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ -#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ -#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ - -#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ -#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), low 32 bits - */ -#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ - /* core codes */ #define NODEV_CORE_ID 0x700 /* Invalid coreid */ #define CC_CORE_ID 0x800 /* chipcommon core */ @@ -127,14 +85,6 @@ * unused address ranges */ -/* There are TWO constants on all Broadcom chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ -#define SI_CC_IDX 0 - -/* SOC Interconnect types (aka chip types) */ -#define SOCI_AI 1 - /* Common core control flags */ #define SICF_BIST_EN 0x8000 #define SICF_PME_EN 0x4000 @@ -142,54 +92,4 @@ #define SICF_FGC 0x0002 #define SICF_CLOCK_EN 0x0001 -/* Common core status flags */ -#define SISF_BIST_DONE 0x8000 -#define SISF_BIST_ERROR 0x4000 -#define SISF_GATED_CLK 0x2000 -#define SISF_DMA64 0x1000 -#define SISF_CORE_BITS 0x0fff - -/* A register that is common to all cores to - * communicate w/PMU regarding clock control. - */ -#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ - -/* clk_ctl_st register */ -#define CCS_FORCEALP 0x00000001 /* force ALP request */ -#define CCS_FORCEHT 0x00000002 /* force HT request */ -#define CCS_FORCEILP 0x00000004 /* force ILP request */ -#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ -#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ -#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ -#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ -#define CCS_ERSRC_REQ_SHIFT 8 -#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ -#define CCS_HTAVAIL 0x00020000 /* HT is available */ -#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ -#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ -#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ -#define CCS_ERSRC_STS_SHIFT 24 - -#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ -#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ - -/* Not really related to SOC Interconnect, but a couple of software - * conventions for the use the flash space: - */ - -/* Minimum amount of flash we support */ -#define FLASH_MIN 0x00020000 /* Minimum flash size */ - -/* A boot/binary may have an embedded block that describes its size */ -#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ -#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ -#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ -#define BISZ_TXTST_IDX 1 /* 1: text start */ -#define BISZ_TXTEND_IDX 2 /* 2: text end */ -#define BISZ_DATAST_IDX 3 /* 3: data start */ -#define BISZ_DATAEND_IDX 4 /* 4: data end */ -#define BISZ_BSSST_IDX 5 /* 5: bss start */ -#define BISZ_BSSEND_IDX 6 /* 6: bss end */ -#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ - #endif /* _BRCM_SOC_H */ -- cgit v0.10.2 From 383aab51ddddcb05600a9fed9913325243d478f8 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:04 +0200 Subject: staging: brcm80211: moved /include/srom.h into /brcmsmac dir Code cleanup. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index 7eabe90..fee8966 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -29,7 +29,7 @@ /* ********** from siutils.c *********** */ #include -#include +#include "srom.h" #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c index 365cae0..719df41 100644 --- a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c +++ b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include "srom.h" #include "otp.h" #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c index 759e68f..fc3d71d 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include "srom.h" #include "dma.h" #include "pmu.h" diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c index 3300015..8b891f4 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -40,7 +40,7 @@ #include "pub.h" #include "phy/phy_hal.h" #include "channel.h" -#include +#include "srom.h" #include "key.h" #include "bottom_mac.h" #include "phy_hal.h" diff --git a/drivers/staging/brcm80211/brcmsmac/srom.c b/drivers/staging/brcm80211/brcmsmac/srom.c index 5a7b434..17e0f2a 100644 --- a/drivers/staging/brcm80211/brcmsmac/srom.c +++ b/drivers/staging/brcm80211/brcmsmac/srom.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include "srom.h" #include "otp.h" #define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ diff --git a/drivers/staging/brcm80211/brcmsmac/srom.h b/drivers/staging/brcm80211/brcmsmac/srom.h new file mode 100644 index 0000000..ee4f880 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/srom.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SROM_H_ +#define _BRCM_SROM_H_ + +/* Prototypes */ +extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, + char **vars, uint *count); + +extern int srom_read(struct si_pub *sih, uint bus, void *curmap, + uint byteoff, uint nbytes, u16 *buf, bool check_crc); + +/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP + * and extract from it into name=value pairs + */ +extern int srom_parsecis(u8 **pcis, uint ciscnt, + char **vars, uint *count); +#endif /* _BRCM_SROM_H_ */ diff --git a/drivers/staging/brcm80211/include/srom.h b/drivers/staging/brcm80211/include/srom.h deleted file mode 100644 index ee4f880..0000000 --- a/drivers/staging/brcm80211/include/srom.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_SROM_H_ -#define _BRCM_SROM_H_ - -/* Prototypes */ -extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, - char **vars, uint *count); - -extern int srom_read(struct si_pub *sih, uint bus, void *curmap, - uint byteoff, uint nbytes, u16 *buf, bool check_crc); - -/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP - * and extract from it into name=value pairs - */ -extern int srom_parsecis(u8 **pcis, uint ciscnt, - char **vars, uint *count); -#endif /* _BRCM_SROM_H_ */ -- cgit v0.10.2 From b745b6bb468ee308ac3b9884fd80e71f2bd8315a Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:05 +0200 Subject: staging: brcm80211: deleted brcmsmac/cfg.h and brcmsmac/bsscfg.h Code cleanup. Moved used sections to other source files. Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/alloc.c b/drivers/staging/brcm80211/brcmsmac/alloc.c index 1758640..e5573bc 100644 --- a/drivers/staging/brcm80211/brcmsmac/alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/alloc.c @@ -23,13 +23,11 @@ #include "d11.h" #include "types.h" -#include "cfg.h" #include "scb.h" #include "pub.h" #include "key.h" #include "alloc.h" #include "rate.h" -#include "bsscfg.h" #include "phy/phy_hal.h" #include "channel.h" #include "main.h" diff --git a/drivers/staging/brcm80211/brcmsmac/ampdu.c b/drivers/staging/brcm80211/brcmsmac/ampdu.c index ab6c496..38662ab 100644 --- a/drivers/staging/brcm80211/brcmsmac/ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.c @@ -23,7 +23,6 @@ #include #include "types.h" -#include "cfg.h" #include "rate.h" #include "scb.h" #include "pub.h" diff --git a/drivers/staging/brcm80211/brcmsmac/antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c index 31bc7c4..fbe8e0b 100644 --- a/drivers/staging/brcm80211/brcmsmac/antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/antsel.c @@ -14,8 +14,6 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include - #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c index 719df41..da6a2a3 100644 --- a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c +++ b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c @@ -35,7 +35,6 @@ #include "types.h" #include "pmu.h" #include "d11.h" -#include "cfg.h" #include "rate.h" #include "scb.h" #include "pub.h" diff --git a/drivers/staging/brcm80211/brcmsmac/bsscfg.h b/drivers/staging/brcm80211/brcmsmac/bsscfg.h deleted file mode 100644 index 49c30cd..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bsscfg.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_BSSCFG_H_ -#define _BRCM_BSSCFG_H_ - -/* Check if a particular BSS config is AP or STA */ -#define BSSCFG_AP(cfg) (0) -#define BSSCFG_STA(cfg) (1) - -#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) - -#define NTXRATE 64 /* # tx MPDUs rate is reported for */ -#define MAXMACLIST 64 /* max # source MAC matches */ -#define BCN_TEMPLATE_COUNT 2 - -/* Iterator for "associated" STA bss configs: - (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */ -#define FOREACH_AS_STA(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated) - -/* As above for all non-NULL BSS configs */ -#define FOREACH_BSS(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx])) - -/* BSS configuration state */ -struct wlc_bsscfg { - struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */ - bool up; /* is this configuration up operational */ - bool enable; /* is this configuration enabled */ - bool associated; /* is BSS in ASSOCIATED state */ - bool BSS; /* infraustructure or adhac */ - bool dtim_programmed; - - u8 SSID_len; /* the length of SSID */ - u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ - struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ - s8 _idx; /* the index of this bsscfg, - * assigned at wlc_bsscfg_alloc() - */ - /* MAC filter */ - uint nmac; /* # of entries on maclist array */ - int macmode; /* allow/deny stations on maclist array */ - struct ether_addr *maclist; /* list of source MAC addrs to match */ - - /* security */ - u32 wsec; /* wireless security bitvec */ - s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ - s16 openshared; /* try Open auth first, then Shared Key */ - bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ - bool eap_restrict; /* restrict data until 802.1X auth succeeds */ - u16 WPA_auth; /* WPA: authenticated key management */ - bool wpa2_preauth; /* default is true, wpa_cap sets value */ - bool wsec_portopen; /* indicates keys are plumbed */ - wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ - int wsec_index; /* 0-3: default tx key, -1: not set */ - wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ - - /* TKIP countermeasures */ - bool tkip_countermeasures; /* flags TKIP no-assoc period */ - u32 tk_cm_dt; /* detect timer */ - u32 tk_cm_bt; /* blocking timer */ - u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ - bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ - - u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ - u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ - u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ - u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ - - u32 flags; /* WLC_BSSCFG flags; see below */ - - u8 *bcn; /* AP beacon */ - uint bcn_len; /* AP beacon length */ - bool ar_disassoc; /* disassociated in associated recreation */ - - int auth_atmptd; /* auth type (open/shared) attempted */ - - pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ - uint npmkid_cand; /* num PMKID candidates */ - pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ - uint npmkid; /* num cached PMKIDs */ - - wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */ - - /* PM states */ - bool PMawakebcn; /* bcn recvd during current waking state */ - bool PMpending; /* waiting for tx status with PM indicated set */ - bool priorPMstate; /* Detecting PM state transitions */ - bool PSpoll; /* whether there is an outstanding PS-Poll frame */ - - /* BSSID entry in RCMTA, use the wsec key management infrastructure to - * manage the RCMTA entries. - */ - wsec_key_t *rcmta; - - /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ - u16 ID; - - uint txrspecidx; /* index into tx rate circular buffer */ - ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ -}; - -#define WLC_BSSCFG_11N_DISABLE 0x1000 /* Do not advertise .11n IEs for this BSS */ -#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */ - -#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0) -#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0) - -/* Extend N_ENAB to per-BSS */ -#define BSS_N_ENAB(wlc, cfg) \ - (N_ENAB((wlc)->pub) && !((cfg)->flags & WLC_BSSCFG_11N_DISABLE)) - -#define MBSS_BCN_ENAB(cfg) 0 -#define MBSS_PRB_ENAB(cfg) 0 -#define SOFTBCN_ENAB(pub) (0) -#define SOFTPRB_ENAB(pub) (0) -#define wlc_bsscfg_tx_check(a) do { } while (0); - -#endif /* _BRCM_BSSCFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/cfg.h b/drivers/staging/brcm80211/brcmsmac/cfg.h deleted file mode 100644 index 534c536..0000000 --- a/drivers/staging/brcm80211/brcmsmac/cfg.h +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_CFG_H_ -#define _BRCM_CFG_H_ - -#define NBANDS(wlc) ((wlc)->pub->_nbands) -#define NBANDS_PUB(pub) ((pub)->_nbands) -#define NBANDS_HW(hw) ((hw)->_nbands) - -#define IS_SINGLEBAND_5G(device) 0 - -/* **** Core type/rev defaults **** */ -#define D11_DEFAULT 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 - * also need to update wlc.h MAXCOREREV - */ - -#define NPHY_DEFAULT 0x000001ff /* Supported nphy revs: - * 0 4321a0 - * 1 4321a1 - * 2 4321b0/b1/c0/c1 - * 3 4322a0 - * 4 4322a1 - * 5 4716a0 - * 6 43222a0, 43224a0 - * 7 43226a0 - * 8 5357a0, 43236a0 - */ - -#define LCNPHY_DEFAULT 0x00000007 /* Supported lcnphy revs: - * 0 4313a0, 4336a0, 4330a0 - * 1 - * 2 4330a0 - */ - -#define SSLPNPHY_DEFAULT 0x0000000f /* Supported sslpnphy revs: - * 0 4329a0/k0 - * 1 4329b0/4329C0 - * 2 4319a0 - * 3 5356a0 - */ - - -/* For undefined values, use defaults */ -#ifndef D11CONF -#define D11CONF D11_DEFAULT -#endif -#ifndef NCONF -#define NCONF NPHY_DEFAULT -#endif -#ifndef LCNCONF -#define LCNCONF LCNPHY_DEFAULT -#endif - -#ifndef SSLPNCONF -#define SSLPNCONF SSLPNPHY_DEFAULT -#endif - -/******************************************************************** - * Phy/Core Configuration. Defines macros to to check core phy/rev * - * compile-time configuration. Defines default core support. * - * ****************************************************************** - */ - -/* Basic macros to check a configuration bitmask */ - -#define CONF_HAS(config, val) ((config) & (1 << (val))) -#define CONF_MSK(config, mask) ((config) & (mask)) -#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) -#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) - -#define CONF_IS(config, val) ((config) == (1 << (val))) -#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) -#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) -#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) -#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) - -/* Wrappers for some of the above, specific to config constants */ - -#define NCONF_HAS(val) CONF_HAS(NCONF, val) -#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) -#define NCONF_IS(val) CONF_IS(NCONF, val) -#define NCONF_GE(val) CONF_GE(NCONF, val) -#define NCONF_GT(val) CONF_GT(NCONF, val) -#define NCONF_LT(val) CONF_LT(NCONF, val) -#define NCONF_LE(val) CONF_LE(NCONF, val) - -#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) -#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) -#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) -#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) -#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) -#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) -#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) - -#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) -#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) -#define D11CONF_IS(val) CONF_IS(D11CONF, val) -#define D11CONF_GE(val) CONF_GE(D11CONF, val) -#define D11CONF_GT(val) CONF_GT(D11CONF, val) -#define D11CONF_LT(val) CONF_LT(D11CONF, val) -#define D11CONF_LE(val) CONF_LE(D11CONF, val) - -#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) -#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) - -#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) -#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) -#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) -#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) -#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) - -#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) -#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) -#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) -#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) -#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) - -#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) -#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) -#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) -#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) -#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) - -#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) - -/* Finally, early-exit from switch case if anyone wants it... */ - -#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break -#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break - -#if (D11CONF ^ (D11CONF & D11_DEFAULT)) -#error "Unsupported MAC revision configured" -#endif -#if (NCONF ^ (NCONF & NPHY_DEFAULT)) -#error "Unsupported NPHY revision configured" -#endif -#if (LCNCONF ^ (LCNCONF & LCNPHY_DEFAULT)) -#error "Unsupported LPPHY revision configured" -#endif - -/* *** Consistency checks *** */ -#if !D11CONF -#error "No MAC revisions configured!" -#endif - -#if !NCONF && !LCNCONF && !SSLPNCONF -#error "No PHY configured!" -#endif - -/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ - -#define _PHYCONF_N (1 << PHY_TYPE_N) - -#if LCNCONF -#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) -#else -#define _PHYCONF_LCN 0 -#endif /* LCNCONF */ - -#if SSLPNCONF -#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) -#else -#define _PHYCONF_SSLPN 0 -#endif /* SSLPNCONF */ - -#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) - -/* Utility macro to identify 802.11n (HT) capable PHYs */ -#define PHYTYPE_11N_CAP(phytype) \ - (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ - PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ - PHYTYPE_IS(phytype, PHY_TYPE_SSN)) - -/* Last but not least: shorter wlc-specific var checks */ -#define WLCISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) -#define WLCISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) -#define WLCISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) - -#define WLC_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) - -/********************************************************************** - * ------------- End of Core phy/rev configuration. ----------------- * - * ******************************************************************** - */ - -/************************************************* - * Defaults for tunables (e.g. sizing constants) - * - * For each new tunable, add a member to the end - * of wlc_tunables_t in wlc_pub.h to enable - * runtime checks of tunable values. (Directly - * using the macros in code invalidates ROM code) - * - * *********************************************** - */ -#ifndef NTXD -#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ -#endif /* NTXD */ -#ifndef NRXD -#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ -#endif /* NRXD */ - -#ifndef NRXBUFPOST -#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ -#endif /* NRXBUFPOST */ - -#ifndef MAXSCB /* station control blocks in cache */ -#define MAXSCB 32 /* Maximum SCBs in cache for STA */ -#endif /* MAXSCB */ - -#ifndef AMPDU_NUM_MPDU -#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ -#endif /* AMPDU_NUM_MPDU */ - -#ifndef AMPDU_NUM_MPDU_3STREAMS -#define AMPDU_NUM_MPDU_3STREAMS 32 /* max allowed number of mpdus in an ampdu for 3+ streams */ -#endif /* AMPDU_NUM_MPDU_3STREAMS */ - -/* Count of packet callback structures. either of following - * 1. Set to the number of SCBs since a STA - * can queue up a rate callback for each IBSS STA it knows about, and an AP can - * queue up an "are you there?" Null Data callback for each associated STA - * 2. controlled by tunable config file - */ -#ifndef MAXPKTCB -#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ -#endif /* MAXPKTCB */ - -#ifndef CTFPOOLSZ -#define CTFPOOLSZ 128 -#endif /* CTFPOOLSZ */ - -/* NetBSD also needs to keep track of this */ -#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */ -#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */ -#ifndef WLC_MAXBSSCFG -#define WLC_MAXBSSCFG (1) /* max # BSS configs */ -#endif /* WLC_MAXBSSCFG */ - -#ifndef MAXBSS -#define MAXBSS 64 /* max # available networks */ -#endif /* MAXBSS */ - -#ifndef WLC_DATAHIWAT -#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */ -#endif /* WLC_DATAHIWAT */ - -#ifndef WLC_AMPDUDATAHIWAT -#define WLC_AMPDUDATAHIWAT 255 -#endif /* WLC_AMPDUDATAHIWAT */ - -/* bounded rx loops */ -#ifndef RXBND -#define RXBND 8 /* max # frames to process in wlc_recv() */ -#endif /* RXBND */ -#ifndef TXSBND -#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ -#endif /* TXSBND */ - -#define BAND_5G(bt) ((bt) == WLC_BAND_5G) -#define BAND_2G(bt) ((bt) == WLC_BAND_2G) - -#define WLBANDINITDATA(_data) _data -#define WLBANDINITFN(_fn) _fn - -#endif /* _BRCM_CFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c index 5dce267..ffeaedf 100644 --- a/drivers/staging/brcm80211/brcmsmac/channel.c +++ b/drivers/staging/brcm80211/brcmsmac/channel.c @@ -26,7 +26,6 @@ #include "types.h" #include "d11.h" -#include "cfg.h" #include "scb.h" #include "pub.h" #include "key.h" diff --git a/drivers/staging/brcm80211/brcmsmac/channel.h b/drivers/staging/brcm80211/brcmsmac/channel.h index f50a66e..3017839 100644 --- a/drivers/staging/brcm80211/brcmsmac/channel.h +++ b/drivers/staging/brcm80211/brcmsmac/channel.h @@ -19,6 +19,7 @@ #define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ + struct wlc_info; /* maxpwr mapping to 5GHz band channels: @@ -50,6 +51,12 @@ struct wlc_info; #define WLC_MAXPWR_TBL_SIZE 6 /* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */ #define WLC_MAXPWR_MIMO_TBL_SIZE 14 /* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */ +#define NBANDS(wlc) ((wlc)->pub->_nbands) +#define NBANDS_PUB(pub) ((pub)->_nbands) +#define NBANDS_HW(hw) ((hw)->_nbands) + +#define IS_SINGLEBAND_5G(device) 0 + /* locale channel and power info. */ typedef struct { u32 valid_channels; diff --git a/drivers/staging/brcm80211/brcmsmac/mac80211_if.c b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c index 1029392..e85a456 100644 --- a/drivers/staging/brcm80211/brcmsmac/mac80211_if.c +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c @@ -34,7 +34,6 @@ #include "phy/phy_int.h" #include "d11.h" #include "types.h" -#include "cfg.h" #include "key.h" #include "channel.h" #include "scb.h" diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c index fc3d71d..e2ea9b4 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -30,12 +30,10 @@ #include "pmu.h" #include "d11.h" #include "types.h" -#include "cfg.h" #include "rate.h" #include "scb.h" #include "pub.h" #include "key.h" -#include "bsscfg.h" #include "phy/phy_hal.h" #include "channel.h" #include "main.h" @@ -239,6 +237,18 @@ const u8 prio2fifo[NUMPRIO] = { #define _WLC_PREC_VO 12 /* Vo - Voice */ #define _WLC_PREC_NC 14 /* NC - Network Control */ +#define MAXMACLIST 64 /* max # source MAC matches */ +#define BCN_TEMPLATE_COUNT 2 + +#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */ + +#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0) +#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0) + +#define MBSS_BCN_ENAB(cfg) 0 +#define MBSS_PRB_ENAB(cfg) 0 +#define SOFTBCN_ENAB(pub) (0) + /* 802.1D Priority to precedence queue mapping */ const u8 wlc_prio2prec_map[] = { _WLC_PREC_BE, /* 0 BE - Best-effort */ @@ -251,6 +261,22 @@ const u8 wlc_prio2prec_map[] = { _WLC_PREC_NC, /* 7 NC - Network Control */ }; +/* Check if a particular BSS config is AP or STA */ +#define BSSCFG_AP(cfg) (0) +#define BSSCFG_STA(cfg) (1) +#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) + +/* Iterator for "associated" STA bss configs: + (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */ +#define FOREACH_AS_STA(wlc, idx, cfg) \ + for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ + if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated) + +/* As above for all non-NULL BSS configs */ +#define FOREACH_BSS(wlc, idx, cfg) \ + for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ + if ((cfg = (wlc)->bsscfg[idx])) + /* Sanity check for tx_prec_map and fifo synchup * Either there are some packets pending for the fifo, else if fifo is empty then * all the corresponding precmap bits should be set diff --git a/drivers/staging/brcm80211/brcmsmac/main.h b/drivers/staging/brcm80211/brcmsmac/main.h index f556faf..201c644 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.h +++ b/drivers/staging/brcm80211/brcmsmac/main.h @@ -33,6 +33,8 @@ #define EDCF_AIFSN_MIN 1 #define FRAGNUM_MASK 0xF +#define NTXRATE 64 /* # tx MPDUs rate is reported for */ + #define WLC_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) /* Maximum wait time for a MAC suspend */ @@ -719,6 +721,84 @@ struct antsel_info { wlc_antselcfg_t antcfg_cur; /* current antenna config (auto) */ }; +/* BSS configuration state */ +struct wlc_bsscfg { + struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */ + bool up; /* is this configuration up operational */ + bool enable; /* is this configuration enabled */ + bool associated; /* is BSS in ASSOCIATED state */ + bool BSS; /* infraustructure or adhac */ + bool dtim_programmed; + + u8 SSID_len; /* the length of SSID */ + u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ + struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ + s8 _idx; /* the index of this bsscfg, + * assigned at wlc_bsscfg_alloc() + */ + /* MAC filter */ + uint nmac; /* # of entries on maclist array */ + int macmode; /* allow/deny stations on maclist array */ + struct ether_addr *maclist; /* list of source MAC addrs to match */ + + /* security */ + u32 wsec; /* wireless security bitvec */ + s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ + s16 openshared; /* try Open auth first, then Shared Key */ + bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ + bool eap_restrict; /* restrict data until 802.1X auth succeeds */ + u16 WPA_auth; /* WPA: authenticated key management */ + bool wpa2_preauth; /* default is true, wpa_cap sets value */ + bool wsec_portopen; /* indicates keys are plumbed */ + wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ + int wsec_index; /* 0-3: default tx key, -1: not set */ + wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ + + /* TKIP countermeasures */ + bool tkip_countermeasures; /* flags TKIP no-assoc period */ + u32 tk_cm_dt; /* detect timer */ + u32 tk_cm_bt; /* blocking timer */ + u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ + bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ + + u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ + u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ + u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ + u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ + + u32 flags; /* WLC_BSSCFG flags; see below */ + + u8 *bcn; /* AP beacon */ + uint bcn_len; /* AP beacon length */ + bool ar_disassoc; /* disassociated in associated recreation */ + + int auth_atmptd; /* auth type (open/shared) attempted */ + + pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ + uint npmkid_cand; /* num PMKID candidates */ + pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ + uint npmkid; /* num cached PMKIDs */ + + wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */ + + /* PM states */ + bool PMawakebcn; /* bcn recvd during current waking state */ + bool PMpending; /* waiting for tx status with PM indicated set */ + bool priorPMstate; /* Detecting PM state transitions */ + bool PSpoll; /* whether there is an outstanding PS-Poll frame */ + + /* BSSID entry in RCMTA, use the wsec key management infrastructure to + * manage the RCMTA entries. + */ + wsec_key_t *rcmta; + + /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ + u16 ID; + + uint txrspecidx; /* index into tx rate circular buffer */ + ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ +}; + #define CHANNEL_BANDUNIT(wlc, ch) (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX) #define OTHERBANDUNIT(wlc) ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX)) diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c index c67bf8b..0185788 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c @@ -14,8 +14,6 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include - #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c index de301aad..84d50c2 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c index 0dc614a..e10f98d 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c index 8b891f4..d8dec65 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -33,7 +33,6 @@ #include #include "types.h" -#include "cfg.h" #include "d11.h" #include "rate.h" #include "scb.h" diff --git a/drivers/staging/brcm80211/brcmsmac/rate.c b/drivers/staging/brcm80211/brcmsmac/rate.c index 807c0f6..5162ec2 100644 --- a/drivers/staging/brcm80211/brcmsmac/rate.c +++ b/drivers/staging/brcm80211/brcmsmac/rate.c @@ -23,7 +23,6 @@ #include "types.h" #include "d11.h" -#include "cfg.h" #include "scb.h" #include "pub.h" #include "rate.h" diff --git a/drivers/staging/brcm80211/brcmsmac/stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c index a0abef3..9b0f335 100644 --- a/drivers/staging/brcm80211/brcmsmac/stf.c +++ b/drivers/staging/brcm80211/brcmsmac/stf.c @@ -25,7 +25,6 @@ #include "types.h" #include "d11.h" -#include "cfg.h" #include "rate.h" #include "scb.h" #include "pub.h" diff --git a/drivers/staging/brcm80211/brcmsmac/types.h b/drivers/staging/brcm80211/brcmsmac/types.h index 526d3e3..e907990 100644 --- a/drivers/staging/brcm80211/brcmsmac/types.h +++ b/drivers/staging/brcm80211/brcmsmac/types.h @@ -71,6 +71,176 @@ #define BOARD_GPIO_12 0x1000 /* gpio 12 */ #define BOARD_GPIO_13 0x2000 /* gpio 13 */ +/* **** Core type/rev defaults **** */ +#define D11CONF 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 + * also need to update wlc.h MAXCOREREV + */ + +#define NCONF 0x000001ff /* Supported nphy revs: + * 0 4321a0 + * 1 4321a1 + * 2 4321b0/b1/c0/c1 + * 3 4322a0 + * 4 4322a1 + * 5 4716a0 + * 6 43222a0, 43224a0 + * 7 43226a0 + * 8 5357a0, 43236a0 + */ + +#define LCNCONF 0x00000007 /* Supported lcnphy revs: + * 0 4313a0, 4336a0, 4330a0 + * 1 + * 2 4330a0 + */ + +#define SSLPNCONF 0x0000000f /* Supported sslpnphy revs: + * 0 4329a0/k0 + * 1 4329b0/4329C0 + * 2 4319a0 + * 3 5356a0 + */ + +/******************************************************************** + * Phy/Core Configuration. Defines macros to to check core phy/rev * + * compile-time configuration. Defines default core support. * + * ****************************************************************** + */ + +/* Basic macros to check a configuration bitmask */ + +#define CONF_HAS(config, val) ((config) & (1 << (val))) +#define CONF_MSK(config, mask) ((config) & (mask)) +#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) +#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) + +#define CONF_IS(config, val) ((config) == (1 << (val))) +#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) +#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) +#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) +#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) + +/* Wrappers for some of the above, specific to config constants */ + +#define NCONF_HAS(val) CONF_HAS(NCONF, val) +#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) +#define NCONF_IS(val) CONF_IS(NCONF, val) +#define NCONF_GE(val) CONF_GE(NCONF, val) +#define NCONF_GT(val) CONF_GT(NCONF, val) +#define NCONF_LT(val) CONF_LT(NCONF, val) +#define NCONF_LE(val) CONF_LE(NCONF, val) + +#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) +#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) +#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) +#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) +#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) +#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) +#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) + +#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) +#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) +#define D11CONF_IS(val) CONF_IS(D11CONF, val) +#define D11CONF_GE(val) CONF_GE(D11CONF, val) +#define D11CONF_GT(val) CONF_GT(D11CONF, val) +#define D11CONF_LT(val) CONF_LT(D11CONF, val) +#define D11CONF_LE(val) CONF_LE(D11CONF, val) + +#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) +#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) + +#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) +#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) +#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) +#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) +#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) + +#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) +#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) +#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) +#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) +#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) + +#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) +#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) +#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) +#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) +#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) + +#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) + +/* Finally, early-exit from switch case if anyone wants it... */ + +#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break +#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break + +/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ + +#define _PHYCONF_N (1 << PHY_TYPE_N) +#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) +#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) + +#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) + +/* Utility macro to identify 802.11n (HT) capable PHYs */ +#define PHYTYPE_11N_CAP(phytype) \ + (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ + PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ + PHYTYPE_IS(phytype, PHY_TYPE_SSN)) + +/* Last but not least: shorter wlc-specific var checks */ +#define WLCISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) +#define WLCISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) +#define WLCISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) + +#define WLC_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) + +/********************************************************************** + * ------------- End of Core phy/rev configuration. ----------------- * + * ******************************************************************** + */ + +/************************************************* + * Defaults for tunables (e.g. sizing constants) + * + * For each new tunable, add a member to the end + * of wlc_tunables_t in wlc_pub.h to enable + * runtime checks of tunable values. (Directly + * using the macros in code invalidates ROM code) + * + * *********************************************** + */ +#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ +#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ +#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ +#define MAXSCB 32 /* Maximum SCBs in cache for STA */ +#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ + +/* Count of packet callback structures. either of following + * 1. Set to the number of SCBs since a STA + * can queue up a rate callback for each IBSS STA it knows about, and an AP can + * queue up an "are you there?" Null Data callback for each associated STA + * 2. controlled by tunable config file + */ +#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ + +/* NetBSD also needs to keep track of this */ +#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */ +#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */ +#define WLC_MAXBSSCFG (1) /* max # BSS configs */ +#define MAXBSS 64 /* max # available networks */ +#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */ +#define WLC_AMPDUDATAHIWAT 255 + +/* bounded rx loops */ +#define RXBND 8 /* max # frames to process in wlc_recv() */ +#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ + +#define WLBANDINITFN(_fn) _fn + +#define BAND_5G(bt) ((bt) == WLC_BAND_5G) +#define BAND_2G(bt) ((bt) == WLC_BAND_2G) + #define BCMMSG(dev, fmt, args...) \ do { \ if (brcm_msg_level & LOG_TRACE_VAL) \ @@ -173,6 +343,7 @@ do { \ #define SET_REG(r, mask, val) \ W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + /* forward declarations */ struct sk_buff; struct brcms_info; -- cgit v0.10.2 From a9cfc9b0b5ce1e52a1486553a9dad82df0ef3755 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:06 +0200 Subject: staging: brcm80211: removed keys.h Code cleanup. Moved used definitions into main.h Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/alloc.c b/drivers/staging/brcm80211/brcmsmac/alloc.c index e5573bc..a884ae4 100644 --- a/drivers/staging/brcm80211/brcmsmac/alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/alloc.c @@ -25,7 +25,6 @@ #include "types.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "alloc.h" #include "rate.h" #include "phy/phy_hal.h" diff --git a/drivers/staging/brcm80211/brcmsmac/ampdu.c b/drivers/staging/brcm80211/brcmsmac/ampdu.c index 38662ab..7cf0018 100644 --- a/drivers/staging/brcm80211/brcmsmac/ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.c @@ -26,7 +26,6 @@ #include "rate.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "phy/phy_hal.h" #include "antsel.h" #include "channel.h" diff --git a/drivers/staging/brcm80211/brcmsmac/antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c index fbe8e0b..fdac211 100644 --- a/drivers/staging/brcm80211/brcmsmac/antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/antsel.c @@ -26,7 +26,6 @@ #include "d11.h" #include "rate.h" -#include "key.h" #include "scb.h" #include "pub.h" #include "phy/phy_hal.h" diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c index da6a2a3..8a99bb1 100644 --- a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c +++ b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c @@ -38,7 +38,6 @@ #include "rate.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "phy/phy_hal.h" #include "channel.h" #include "main.h" diff --git a/drivers/staging/brcm80211/brcmsmac/channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c index ffeaedf..b172320 100644 --- a/drivers/staging/brcm80211/brcmsmac/channel.c +++ b/drivers/staging/brcm80211/brcmsmac/channel.c @@ -28,7 +28,6 @@ #include "d11.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "phy/phy_hal.h" #include "bottom_mac.h" #include "rate.h" diff --git a/drivers/staging/brcm80211/brcmsmac/key.h b/drivers/staging/brcm80211/brcmsmac/key.h deleted file mode 100644 index ecfe969..0000000 --- a/drivers/staging/brcm80211/brcmsmac/key.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BRCM_KEY_H_ -#define _BRCM_KEY_H_ - -#include /* for ETH_ALEN */ - -struct scb; -struct wlc_info; -struct wlc_bsscfg; -/* Maximum # of keys that wl driver supports in S/W. - * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. - */ -#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ -#define WLC_DEFAULT_KEYS 4 /* Default # of keys */ - -#define WSEC_MAX_WOWL_KEYS 5 /* Max keys in WOWL mode (1 + 4 default keys) */ - -#define WPA2_GTK_MAX 3 - -/* -* Max # of keys currently supported: -* -* s/w keys if WSEC_SW(wlc->wsec). -* h/w keys otherwise. -*/ -#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS - -/* number of 802.11 default (non-paired, group keys) */ -#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ - -/* Max # of hardware keys supported */ -#define WLC_MAX_WSEC_HW_KEYS(wlc) WSEC_MAX_RCMTA_KEYS - -/* Max # of hardware TKIP MIC keys supported */ -#define WLC_MAX_TKMIC_HW_KEYS(wlc) (WSEC_MAX_TKMIC_ENGINE_KEYS) - -#define WSEC_HW_TKMIC_KEY(wlc, key, bsscfg) \ - ((((wlc)->machwcap & MCAP_TKIPMIC)) && \ - (key) && ((key)->algo == CRYPTO_ALGO_TKIP) && \ - !WSEC_SOFTKEY(wlc, key, bsscfg) && \ - WSEC_KEY_INDEX(wlc, key) >= WLC_DEFAULT_KEYS && \ - (WSEC_KEY_INDEX(wlc, key) < WSEC_MAX_TKMIC_ENGINE_KEYS)) - -/* index of key in key table */ -#define WSEC_KEY_INDEX(wlc, key) ((key)->idx) - -#define WSEC_SOFTKEY(wlc, key, bsscfg) (WLC_SW_KEYS(wlc, bsscfg) || \ - WSEC_KEY_INDEX(wlc, key) >= WLC_MAX_WSEC_HW_KEYS(wlc)) - -/* get a key, non-NULL only if key allocated and not clear */ -#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \ - (wlc)->wsec_keys[i] : NULL) - -#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : false) - -/* default key */ -#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \ - (struct wsec_key *)NULL:(bsscfg)->bss_def_keys[(bsscfg)->wsec_index]) - -/* Macros for key management in IBSS mode */ -#define WSEC_IBSS_MAX_PEERS 16 /* Max # of IBSS Peers */ -#define WSEC_IBSS_RCMTA_INDEX(idx) \ - (((idx - WSEC_MAX_DEFAULT_KEYS) % WSEC_IBSS_MAX_PEERS) + WSEC_MAX_DEFAULT_KEYS) - -/* contiguous # key slots for infrastructure mode STA */ -#define WSEC_BSS_STA_KEY_GROUP_SIZE 5 - -typedef struct wsec_iv { - u32 hi; /* upper 32 bits of IV */ - u16 lo; /* lower 16 bits of IV */ -} wsec_iv_t; - -#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ - -typedef struct wsec_key { - u8 ea[ETH_ALEN]; /* per station */ - u8 idx; /* key index in wsec_keys array */ - u8 id; /* key ID [0-3] */ - u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - u8 rcmta; /* rcmta entry index, same as idx by default */ - u16 flags; /* misc flags */ - u8 algo_hw; /* cache for hw register */ - u8 aes_mode; /* cache for hw register */ - s8 iv_len; /* IV length */ - s8 icv_len; /* ICV length */ - u32 len; /* key length..don't move this var */ - /* data is 4byte aligned */ - u8 data[WLAN_MAX_KEY_LEN]; /* key data */ - wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */ - wsec_iv_t txiv; /* Tx IV */ - -} wsec_key_t; - -#define broken_roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) - -/* For use with wsec_key_t.flags */ - -#define WSEC_BS_UPDATE (1 << 0) /* Indicates hw needs key update on BS switch */ -#define WSEC_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WSEC_TKIP_ERROR (1 << 2) /* Provoke deliberate MIC error */ -#define WSEC_REPLAY_ERROR (1 << 3) /* Provoke deliberate replay */ -#define WSEC_IBSS_PEER_GROUP_KEY (1 << 7) /* Flag: group key for a IBSS PEER */ -#define WSEC_ICV_ERROR (1 << 8) /* Provoke deliberate ICV error */ - -#define wlc_key_insert(a, b, c, d, e, f, g, h, i, j) (-EBADE) -#define wlc_key_update(a, b, c) do {} while (0) -#define wlc_key_remove(a, b, c) do {} while (0) -#define wlc_key_remove_all(a, b) do {} while (0) -#define wlc_key_delete(a, b, c) do {} while (0) -#define wlc_scb_key_delete(a, b) do {} while (0) -#define wlc_key_lookup(a, b, c, d, e) (NULL) -#define wlc_key_hw_init_all(a) do {} while (0) -#define wlc_key_hw_init(a, b, c) do {} while (0) -#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0) -#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0) -#define wlc_key_sw_wowl_create(a, b, c) (-EBADE) -#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0) -#define wlc_key_iv_init(a, b, c) do {} while (0) -#define wlc_key_set_error(a, b, c) (-EBADE) -#define wlc_key_dump_hw(a, b) (-EBADE) -#define wlc_key_dump_sw(a, b) (-EBADE) -#define wlc_key_defkeyflag(a) (0) -#define wlc_rcmta_add_bssid(a, b) do {} while (0) -#define wlc_rcmta_del_bssid(a, b) do {} while (0) -#define wlc_key_scb_delete(a, b) do {} while (0) - -#endif /* _BRCM_KEY_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/mac80211_if.c b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c index e85a456..78f8348 100644 --- a/drivers/staging/brcm80211/brcmsmac/mac80211_if.c +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c @@ -34,7 +34,6 @@ #include "phy/phy_int.h" #include "d11.h" #include "types.h" -#include "key.h" #include "channel.h" #include "scb.h" #include "pub.h" diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c index e2ea9b4..cfd04ca 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -33,7 +33,6 @@ #include "rate.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "phy/phy_hal.h" #include "channel.h" #include "main.h" @@ -521,8 +520,6 @@ void wlc_init(struct wlc_info *wlc) } } - wlc_key_hw_init_all(wlc); - wlc_bandinit_ordered(wlc, chanspec); wlc_init_scb(wlc, &global_scb); diff --git a/drivers/staging/brcm80211/brcmsmac/main.h b/drivers/staging/brcm80211/brcmsmac/main.h index 201c644..c41205a 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.h +++ b/drivers/staging/brcm80211/brcmsmac/main.h @@ -297,6 +297,49 @@ struct wlc_stf { #define WLC_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */ #define WLC_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */ +/* Maximum # of keys that wl driver supports in S/W. + * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. + */ +#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ +#define WLC_DEFAULT_KEYS 4 /* Default # of keys */ + +/* +* Max # of keys currently supported: +* +* s/w keys if WSEC_SW(wlc->wsec). +* h/w keys otherwise. +*/ +#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS + +/* number of 802.11 default (non-paired, group keys) */ +#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ + +typedef struct wsec_iv { + u32 hi; /* upper 32 bits of IV */ + u16 lo; /* lower 16 bits of IV */ +} wsec_iv_t; + +#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ + +typedef struct wsec_key { + u8 ea[ETH_ALEN]; /* per station */ + u8 idx; /* key index in wsec_keys array */ + u8 id; /* key ID [0-3] */ + u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + u8 rcmta; /* rcmta entry index, same as idx by default */ + u16 flags; /* misc flags */ + u8 algo_hw; /* cache for hw register */ + u8 aes_mode; /* cache for hw register */ + s8 iv_len; /* IV length */ + s8 icv_len; /* ICV length */ + u32 len; /* key length..don't move this var */ + /* data is 4byte aligned */ + u8 data[WLAN_MAX_KEY_LEN]; /* key data */ + wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */ + wsec_iv_t txiv; /* Tx IV */ + +} wsec_key_t; + /* * core state (mac) */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c index d8dec65..925edeb 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -40,7 +40,6 @@ #include "phy/phy_hal.h" #include "channel.h" #include "srom.h" -#include "key.h" #include "bottom_mac.h" #include "phy_hal.h" #include "main.h" diff --git a/drivers/staging/brcm80211/brcmsmac/stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c index 9b0f335..561aba8 100644 --- a/drivers/staging/brcm80211/brcmsmac/stf.c +++ b/drivers/staging/brcm80211/brcmsmac/stf.c @@ -28,7 +28,6 @@ #include "rate.h" #include "scb.h" #include "pub.h" -#include "key.h" #include "phy/phy_hal.h" #include "channel.h" #include "main.h" -- cgit v0.10.2 From 225fa52c2397605892477a53f388aa49ef7d8c5a Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:07 +0200 Subject: staging: brcm80211: renamed file Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index ee5c3f0..1ea3e0c 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -33,7 +33,7 @@ BRCMSMAC_OFILES := \ alloc.o \ ampdu.o \ antsel.o \ - bottom_mac.o \ + bmac.o \ channel.o \ main.o \ phy_shim.o \ diff --git a/drivers/staging/brcm80211/brcmsmac/antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c index fdac211..f967c592 100644 --- a/drivers/staging/brcm80211/brcmsmac/antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/antsel.c @@ -29,7 +29,7 @@ #include "scb.h" #include "pub.h" #include "phy/phy_hal.h" -#include "bottom_mac.h" +#include "bmac.h" #include "channel.h" #include "main.h" #include "antsel.h" diff --git a/drivers/staging/brcm80211/brcmsmac/bmac.c b/drivers/staging/brcm80211/brcmsmac/bmac.c new file mode 100644 index 0000000..417cf54 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bmac.c @@ -0,0 +1,3597 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include "srom.h" +#include "otp.h" +#include +#include +#include +#include "dma.h" + +#include "types.h" +#include "pmu.h" +#include "d11.h" +#include "rate.h" +#include "scb.h" +#include "pub.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "ucode_loader.h" +#include "antsel.h" +#include "alloc.h" +#include "bmac.h" +#include "mac80211_if.h" + +#define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ + +#define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */ +#define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us, default */ +#define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us, default */ +#define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */ + +#define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ + +#ifndef BMAC_DUP_TO_REMOVE +#define WLC_RM_WAIT_TX_SUSPEND 4 /* Wait Tx Suspend */ + +#define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ + +#endif /* BMAC_DUP_TO_REMOVE */ + +#define DMAREG(wlc_hw, direction, fifonum) \ + ((direction == DMA_TX) ? \ + (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ + (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) + +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 + +/* + * The following table lists the buffer memory allocated to xmt fifos in HW. + * the size is in units of 256bytes(one block), total size is HW dependent + * ucode has default fifo partition, sw can overwrite if necessary + * + * This is documented in twiki under the topic UcodeTxFifo. Please ensure + * the twiki is updated before making changes. + */ + +#define XMTFIFOTBL_STARTREV 20 /* Starting corerev for the fifo size table */ + +static u16 xmtfifo_sz[][NFIFO] = { + {20, 192, 192, 21, 17, 5}, /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ + {9, 58, 22, 14, 14, 5}, /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ + {20, 192, 192, 21, 17, 5}, /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ + {20, 192, 192, 21, 17, 5}, /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ + {9, 58, 22, 14, 14, 5}, /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ +}; + +static void wlc_clkctl_clk(struct wlc_hw_info *wlc, uint mode); +static void wlc_coreinit(struct wlc_info *wlc); + +/* used by wlc_wakeucode_init() */ +static void wlc_write_inits(struct wlc_hw_info *wlc_hw, + const struct d11init *inits); +static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], + const uint nbytes); +static void wlc_ucode_download(struct wlc_hw_info *wlc); +static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); + +/* used by wlc_dpc() */ +static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, + u32 s2); +static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); +static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); + +/* used by wlc_down() */ +static void wlc_flushqueues(struct wlc_info *wlc); + +static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs); +static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw); +static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw); +static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, + uint tx_fifo); +static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo); +static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo); + +/* Low Level Prototypes */ +static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want); +static u16 wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, + u32 sel); +static void wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, + u16 v, u32 sel); +static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk); +static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme); +static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw); +static void wlc_ucode_bsinit(struct wlc_hw_info *wlc_hw); +static bool wlc_validboardtype(struct wlc_hw_info *wlc); +static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw); +static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw); +static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw); +static void wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init); +static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw); +static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool want, mbool flags); +static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw); +static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw); +static u32 wlc_wlintrsoff(struct wlc_info *wlc); +static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask); +static void wlc_gpio_init(struct wlc_info *wlc); +static void wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, + int len); +static void wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, + int len); +static void wlc_bmac_bsinit(struct wlc_info *wlc, chanspec_t chanspec); +static u32 wlc_setband_inact(struct wlc_info *wlc, uint bandunit); +static void wlc_bmac_setband(struct wlc_hw_info *wlc_hw, uint bandunit, + chanspec_t chanspec); +static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, + bool shortslot); +static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw); +static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, + u8 rate); + +/* === Low Level functions === */ + +void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) +{ + wlc_hw->shortslot = shortslot; + + if (BAND_2G(wlc_bmac_bandtype(wlc_hw)) && wlc_hw->up) { + wlc_suspend_mac_and_wait(wlc_hw->wlc); + wlc_bmac_update_slot_timing(wlc_hw, shortslot); + wlc_enable_mac(wlc_hw->wlc); + } +} + +/* + * Update the slot timing for standard 11b/g (20us slots) + * or shortslot 11g (9us slots) + * The PSM needs to be suspended for this call. + */ +static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, + bool shortslot) +{ + d11regs_t *regs; + + regs = wlc_hw->regs; + + if (shortslot) { + /* 11g short slot: 11a timing */ + W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ + wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); + } else { + /* 11g long slot: 11b timing */ + W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ + wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); + } +} + +static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) +{ + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + /* init microcode host flags */ + wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs); + + /* do band-specific ucode IHR, SHM, and SCR inits */ + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11n0bsinitvals16); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } + } else { + if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11lcn0bsinitvals24); + } else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in" + " core rev %d\n", __func__, + wlc_hw->unit, wlc_hw->corerev); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +/* switch to new band but leave it inactive */ +static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintmask; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + wlc_bmac_core_phy_clk(wlc_hw, OFF); + + wlc_setxband(wlc_hw, bandunit); + + return macintmask; +} + +/* Process received frames */ +/* + * Return true if more frames need to be processed. false otherwise. + * Param 'bound' indicates max. # frames to process before break out. + */ +static bool +wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) +{ + struct sk_buff *p; + struct sk_buff *head = NULL; + struct sk_buff *tail = NULL; + uint n = 0; + uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; + wlc_d11rxhdr_t *wlc_rxhdr = NULL; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + /* gather received frames */ + while ((p = dma_rx(wlc_hw->di[fifo]))) { + + if (!tail) + head = tail = p; + else { + tail->prev = p; + tail = p; + } + + /* !give others some time to run! */ + if (++n >= bound_limit) + break; + } + + /* post more rbufs */ + dma_rxfill(wlc_hw->di[fifo]); + + /* process each frame */ + while ((p = head) != NULL) { + head = head->prev; + p->prev = NULL; + + wlc_rxhdr = (wlc_d11rxhdr_t *) p->data; + + /* compute the RSSI from d11rxhdr and record it in wlc_rxd11hr */ + wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); + + wlc_recv(wlc_hw->wlc, p); + } + + return n >= bound_limit; +} + +/* second-level interrupt processing + * Return true if another dpc needs to be re-scheduled. false otherwise. + * Param 'bounded' indicates if applicable loops should be bounded. + */ +bool wlc_dpc(struct wlc_info *wlc, bool bounded) +{ + u32 macintstatus; + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + bool fatal = false; + struct wiphy *wiphy = wlc->wiphy; + + if (DEVICEREMOVED(wlc)) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return false; + } + + /* grab and clear the saved software intstatus bits */ + macintstatus = wlc->macintstatus; + wlc->macintstatus = 0; + + BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", + wlc_hw->unit, macintstatus); + + WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ + + /* BCN template is available */ + /* ZZZ: Use AP_ACTIVE ? */ + if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) + && (macintstatus & MI_BCNTPL)) { + wlc_update_beacon(wlc); + } + + /* PMQ entry addition */ + if (macintstatus & MI_PMQ) { + } + + /* tx status */ + if (macintstatus & MI_TFS) { + if (wlc_bmac_txstatus(wlc->hw, bounded, &fatal)) + wlc->macintstatus |= MI_TFS; + if (fatal) { + wiphy_err(wiphy, "MI_TFS: fatal\n"); + goto fatal; + } + } + + if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) + wlc_tbtt(wlc, regs); + + /* ATIM window end */ + if (macintstatus & MI_ATIMWINEND) { + BCMMSG(wlc->wiphy, "end of ATIM window\n"); + OR_REG(®s->maccommand, wlc->qvalid); + wlc->qvalid = 0; + } + + /* received data or control frame, MI_DMAINT is indication of RX_FIFO interrupt */ + if (macintstatus & MI_DMAINT) { + if (wlc_bmac_recv(wlc_hw, RX_FIFO, bounded)) { + wlc->macintstatus |= MI_DMAINT; + } + } + + /* TX FIFO suspend/flush completion */ + if (macintstatus & MI_TXSTOP) { + if (wlc_bmac_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO)) { + /* wiphy_err(wiphy, "dpc: fifo_suspend_comlete\n"); */ + } + } + + /* noise sample collected */ + if (macintstatus & MI_BG_NOISE) { + wlc_phy_noise_sample_intr(wlc_hw->band->pi); + } + + if (macintstatus & MI_GP0) { + wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " + "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); + + printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", + __func__, wlc_hw->sih->chip, + wlc_hw->sih->chiprev); + /* big hammer */ + brcms_init(wlc->wl); + } + + /* gptimer timeout */ + if (macintstatus & MI_TO) { + W_REG(®s->gptimer, 0); + } + + if (macintstatus & MI_RFDISABLE) { + BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" + " RF Disable Input\n", wlc_hw->unit); + brcms_rfkill_set_hw_state(wlc->wl); + } + + /* send any enq'd tx packets. Just makes sure to jump start tx */ + if (!pktq_empty(&wlc->pkt_queue->q)) + wlc_send_q(wlc); + + /* it isn't done and needs to be resched if macintstatus is non-zero */ + return wlc->macintstatus != 0; + + fatal: + brcms_init(wlc->wl); + return wlc->macintstatus != 0; +} + +/* common low-level watchdog code */ +void wlc_bmac_watchdog(void *arg) +{ + struct wlc_info *wlc = (struct wlc_info *) arg; + struct wlc_hw_info *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return; + + /* increment second count */ + wlc_hw->now++; + + /* Check for FIFO error interrupts */ + wlc_bmac_fifoerrors(wlc_hw); + + /* make sure RX dma has buffers */ + dma_rxfill(wlc->hw->di[RX_FIFO]); + + wlc_phy_watchdog(wlc_hw->band->pi); +} + +void +wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute, struct txpwr_limits *txpwr) +{ + uint bandunit; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); + + wlc_hw->chanspec = chanspec; + + /* Switch bands if necessary */ + if (NBANDS_HW(wlc_hw) > 1) { + bandunit = CHSPEC_WLCBANDUNIT(chanspec); + if (wlc_hw->band->bandunit != bandunit) { + /* wlc_bmac_setband disables other bandunit, + * use light band switch if not up yet + */ + if (wlc_hw->up) { + wlc_phy_chanspec_radio_set(wlc_hw-> + bandstate[bandunit]-> + pi, chanspec); + wlc_bmac_setband(wlc_hw, bandunit, chanspec); + } else { + wlc_setxband(wlc_hw, bandunit); + } + } + } + + wlc_phy_initcal_enable(wlc_hw->band->pi, !mute); + + if (!wlc_hw->up) { + if (wlc_hw->clk) + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, + chanspec); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + } else { + wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); + wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); + + /* Update muting of the channel */ + wlc_bmac_mute(wlc_hw, mute, 0); + } +} + +int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, wlc_bmac_state_t *state) +{ + state->machwcap = wlc_hw->machwcap; + + return 0; +} + +static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) +{ + uint i; + char name[8]; + /* ucode host flag 2 needed for pio mode, independent of band and fifo */ + u16 pio_mhf2 = 0; + struct wlc_hw_info *wlc_hw = wlc->hw; + uint unit = wlc_hw->unit; + wlc_tunables_t *tune = wlc->pub->tunables; + struct wiphy *wiphy = wlc->wiphy; + + /* name and offsets for dma_attach */ + snprintf(name, sizeof(name), "wl%d", unit); + + if (wlc_hw->di[0] == 0) { /* Init FIFOs */ + uint addrwidth; + int dma_attach_err = 0; + /* Find out the DMA addressing capability and let OS know + * All the channels within one DMA core have 'common-minimum' same + * capability + */ + addrwidth = + dma_addrwidth(wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 0)); + + if (!wl_alloc_dma_resources(wlc_hw->wlc->wl, addrwidth)) { + wiphy_err(wiphy, "wl%d: wlc_attach: alloc_dma_" + "resources failed\n", unit); + return false; + } + + /* + * FIFO 0 + * TX: TX_AC_BK_FIFO (TX AC Background data packets) + * RX: RX_FIFO (RX data packets) + */ + wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, + (wme ? DMAREG(wlc_hw, DMA_TX, 0) : + NULL), DMAREG(wlc_hw, DMA_RX, 0), + (wme ? tune->ntxd : 0), tune->nrxd, + tune->rxbufsz, -1, tune->nrxbufpost, + WL_HWRXOFF, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[0]); + + /* + * FIFO 1 + * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) + * (legacy) TX_DATA_FIFO (TX data packets) + * RX: UNUSED + */ + wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 1), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[1]); + + /* + * FIFO 2 + * TX: TX_AC_VI_FIFO (TX AC Video data packets) + * RX: UNUSED + */ + wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 2), NULL, + tune->ntxd, 0, 0, -1, 0, 0, + &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[2]); + /* + * FIFO 3 + * TX: TX_AC_VO_FIFO (TX AC Voice data packets) + * (legacy) TX_CTL_FIFO (TX control & mgmt packets) + */ + wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, + DMAREG(wlc_hw, DMA_TX, 3), + NULL, tune->ntxd, 0, 0, -1, + 0, 0, &brcm_msg_level); + dma_attach_err |= (NULL == wlc_hw->di[3]); +/* Cleaner to leave this as if with AP defined */ + + if (dma_attach_err) { + wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" + "\n", unit); + return false; + } + + /* get pointer to dma engine tx flow control variable */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) + wlc_hw->txavail[i] = + (uint *) dma_getvar(wlc_hw->di[i], + "&txavail"); + } + + /* initial ucode host flags */ + wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); + + return true; +} + +static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) +{ + uint j; + + for (j = 0; j < NFIFO; j++) { + if (wlc_hw->di[j]) { + dma_detach(wlc_hw->di[j]); + wlc_hw->di[j] = NULL; + } + } +} + +/* low level attach + * run backplane attach, init nvram + * run phy attach + * initialize software state for each core and band + * put the whole chip in reset(driver down state), no clock + */ +int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, + bool piomode, void *regsva, uint bustype, void *btparam) +{ + struct wlc_hw_info *wlc_hw; + d11regs_t *regs; + char *macaddr = NULL; + char *vars; + uint err = 0; + uint j; + bool wme = false; + shared_phy_params_t sha_params; + struct wiphy *wiphy = wlc->wiphy; + + BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, + device); + + wme = true; + + wlc_hw = wlc->hw; + wlc_hw->wlc = wlc; + wlc_hw->unit = unit; + wlc_hw->band = wlc_hw->bandstate[0]; + wlc_hw->_piomode = piomode; + + /* populate struct wlc_hw_info with default values */ + wlc_bmac_info_init(wlc_hw); + + /* + * Do the hardware portion of the attach. + * Also initialize software state that depends on the particular hardware + * we are running. + */ + wlc_hw->sih = ai_attach((uint) device, regsva, bustype, btparam, + &wlc_hw->vars, &wlc_hw->vars_size); + if (wlc_hw->sih == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: si_attach failed\n", + unit); + err = 11; + goto fail; + } + vars = wlc_hw->vars; + + /* + * Get vendid/devid nvram overwrites, which could be different + * than those the BIOS recognizes for devices on PCMCIA_BUS, + * SDIO_BUS, and SROMless devices on PCI_BUS. + */ +#ifdef BCMBUSTYPE + bustype = BCMBUSTYPE; +#endif + if (bustype != SI_BUS) { + char *var; + + var = getvar(vars, "vendid"); + if (var) { + vendor = (u16) simple_strtoul(var, NULL, 0); + wiphy_err(wiphy, "Overriding vendor id = 0x%x\n", + vendor); + } + var = getvar(vars, "devid"); + if (var) { + u16 devid = (u16) simple_strtoul(var, NULL, 0); + if (devid != 0xffff) { + device = devid; + wiphy_err(wiphy, "Overriding device id = 0x%x" + "\n", device); + } + } + + /* verify again the device is supported */ + if (!wlc_chipmatch(vendor, device)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported " + "vendor/device (0x%x/0x%x)\n", + unit, vendor, device); + err = 12; + goto fail; + } + } + + wlc_hw->vendorid = vendor; + wlc_hw->deviceid = device; + + /* set bar0 window to point at D11 core */ + wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); + wlc_hw->corerev = ai_corerev(wlc_hw->sih); + + regs = wlc_hw->regs; + + wlc->regs = wlc_hw->regs; + + /* validate chip, chiprev and corerev */ + if (!wlc_isgoodchip(wlc_hw)) { + err = 13; + goto fail; + } + + /* initialize power control registers */ + ai_clkctl_init(wlc_hw->sih); + + /* request fastclock and force fastclock for the rest of attach + * bring the d11 core out of reset. + * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk is still false; + * But it will be called again inside wlc_corereset, after d11 is out of reset. + */ + wlc_clkctl_clk(wlc_hw, CLK_FAST); + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + if (!wlc_bmac_validate_chip_access(wlc_hw)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: validate_chip_access " + "failed\n", unit); + err = 14; + goto fail; + } + + /* get the board rev, used just below */ + j = getintvar(vars, "boardrev"); + /* promote srom boardrev of 0xFF to 1 */ + if (j == BOARDREV_PROMOTABLE) + j = BOARDREV_PROMOTED; + wlc_hw->boardrev = (u16) j; + if (!wlc_validboardtype(wlc_hw)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported Broadcom " + "board type (0x%x)" " or revision level (0x%x)\n", + unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); + err = 15; + goto fail; + } + wlc_hw->sromrev = (u8) getintvar(vars, "sromrev"); + wlc_hw->boardflags = (u32) getintvar(vars, "boardflags"); + wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); + + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED); + + if ((wlc_hw->sih->bustype == PCI_BUS) + && (ai_pci_war16165(wlc_hw->sih))) + wlc->war16165 = true; + + /* check device id(srom, nvram etc.) to set bands */ + if (wlc_hw->deviceid == BCM43224_D11N_ID || + wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { + /* Dualband boards */ + wlc_hw->_nbands = 2; + } else + wlc_hw->_nbands = 1; + + if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) + wlc_hw->_nbands = 1; + + /* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the + * init of these values + */ + wlc->vendorid = wlc_hw->vendorid; + wlc->deviceid = wlc_hw->deviceid; + wlc->pub->sih = wlc_hw->sih; + wlc->pub->corerev = wlc_hw->corerev; + wlc->pub->sromrev = wlc_hw->sromrev; + wlc->pub->boardrev = wlc_hw->boardrev; + wlc->pub->boardflags = wlc_hw->boardflags; + wlc->pub->boardflags2 = wlc_hw->boardflags2; + wlc->pub->_nbands = wlc_hw->_nbands; + + wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); + + if (wlc_hw->physhim == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_shim_attach " + "failed\n", unit); + err = 25; + goto fail; + } + + /* pass all the parameters to wlc_phy_shared_attach in one struct */ + sha_params.sih = wlc_hw->sih; + sha_params.physhim = wlc_hw->physhim; + sha_params.unit = unit; + sha_params.corerev = wlc_hw->corerev; + sha_params.vars = vars; + sha_params.vid = wlc_hw->vendorid; + sha_params.did = wlc_hw->deviceid; + sha_params.chip = wlc_hw->sih->chip; + sha_params.chiprev = wlc_hw->sih->chiprev; + sha_params.chippkg = wlc_hw->sih->chippkg; + sha_params.sromrev = wlc_hw->sromrev; + sha_params.boardtype = wlc_hw->sih->boardtype; + sha_params.boardrev = wlc_hw->boardrev; + sha_params.boardvendor = wlc_hw->sih->boardvendor; + sha_params.boardflags = wlc_hw->boardflags; + sha_params.boardflags2 = wlc_hw->boardflags2; + sha_params.bustype = wlc_hw->sih->bustype; + sha_params.buscorerev = wlc_hw->sih->buscorerev; + + /* alloc and save pointer to shared phy state area */ + wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); + if (!wlc_hw->phy_sh) { + err = 16; + goto fail; + } + + /* initialize software state for each core and band */ + for (j = 0; j < NBANDS_HW(wlc_hw); j++) { + /* + * band0 is always 2.4Ghz + * band1, if present, is 5Ghz + */ + + /* So if this is a single band 11a card, use band 1 */ + if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) + j = BAND_5G_INDEX; + + wlc_setxband(wlc_hw, j); + + wlc_hw->band->bandunit = j; + wlc_hw->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc->band->bandunit = j; + wlc->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc->core->coreidx = ai_coreidx(wlc_hw->sih); + + wlc_hw->machwcap = R_REG(®s->machwcap); + wlc_hw->machwcap_backup = wlc_hw->machwcap; + + /* init tx fifo size */ + wlc_hw->xmtfifo_sz = + xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; + + /* Get a phy for this band */ + wlc_hw->band->pi = wlc_phy_attach(wlc_hw->phy_sh, + (void *)regs, wlc_bmac_bandtype(wlc_hw), vars, + wlc->wiphy); + if (wlc_hw->band->pi == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_" + "attach failed\n", unit); + err = 17; + goto fail; + } + + wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); + + wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, + &wlc_hw->band->phyrev, + &wlc_hw->band->radioid, + &wlc_hw->band->radiorev); + wlc_hw->band->abgphy_encore = + wlc_phy_get_encore(wlc_hw->band->pi); + wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); + wlc_hw->band->core_flags = + wlc_phy_get_coreflags(wlc_hw->band->pi); + + /* verify good phy_type & supported phy revision */ + if (WLCISNPHY(wlc_hw->band)) { + if (NCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else if (WLCISLCNPHY(wlc_hw->band)) { + if (LCNCONF_HAS(wlc_hw->band->phyrev)) + goto good_phy; + else + goto bad_phy; + } else { + bad_phy: + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: unsupported " + "phy type/rev (%d/%d)\n", unit, + wlc_hw->band->phytype, wlc_hw->band->phyrev); + err = 18; + goto fail; + } + + good_phy: + /* BMAC_NOTE: wlc->band->pi should not be set below and should be done in the + * high level attach. However we can not make that change until all low level access + * is changed to wlc_hw->band->pi. Instead do the wlc->band->pi init below, keeping + * wlc_hw->band->pi as well for incremental update of low level fns, and cut over + * low only init when all fns updated. + */ + wlc->band->pi = wlc_hw->band->pi; + wlc->band->phytype = wlc_hw->band->phytype; + wlc->band->phyrev = wlc_hw->band->phyrev; + wlc->band->radioid = wlc_hw->band->radioid; + wlc->band->radiorev = wlc_hw->band->radiorev; + + /* default contention windows size limits */ + wlc_hw->band->CWmin = APHY_CWMIN; + wlc_hw->band->CWmax = PHY_CWMAX; + + if (!wlc_bmac_attach_dmapio(wlc, j, wme)) { + err = 19; + goto fail; + } + } + + /* disable core to match driver "down" state */ + wlc_coredisable(wlc_hw); + + /* Match driver "down" state */ + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + + /* register sb interrupt callback functions */ + ai_register_intr_callback(wlc_hw->sih, (void *)wlc_wlintrsoff, + (void *)wlc_wlintrsrestore, NULL, wlc); + + /* turn off pll and xtal to match driver "down" state */ + wlc_bmac_xtal(wlc_hw, OFF); + + /* ********************************************************************* + * The hardware is in the DOWN state at this point. D11 core + * or cores are in reset with clocks off, and the board PLLs + * are off if possible. + * + * Beyond this point, wlc->sbclk == false and chip registers + * should not be touched. + ********************************************************************* + */ + + /* init etheraddr state variables */ + macaddr = wlc_get_macaddr(wlc_hw); + if (macaddr == NULL) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: macaddr not found\n", + unit); + err = 21; + goto fail; + } + brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); + if (is_broadcast_ether_addr(wlc_hw->etheraddr) || + is_zero_ether_addr(wlc_hw->etheraddr)) { + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", + unit, macaddr); + err = 22; + goto fail; + } + + BCMMSG(wlc->wiphy, + "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", + wlc_hw->deviceid, wlc_hw->_nbands, + wlc_hw->sih->boardtype, macaddr); + + return err; + + fail: + wiphy_err(wiphy, "wl%d: wlc_bmac_attach: failed with err %d\n", unit, + err); + return err; +} + +/* + * Initialize wlc_info default values ... + * may get overrides later in this function + * BMAC_NOTES, move low out and resolve the dangling ones + */ +static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) +{ + struct wlc_info *wlc = wlc_hw->wlc; + + /* set default sw macintmask value */ + wlc->defmacintmask = DEF_MACINTMASK; + + /* various 802.11g modes */ + wlc_hw->shortslot = false; + + wlc_hw->SFBL = RETRY_SHORT_FB; + wlc_hw->LFBL = RETRY_LONG_FB; + + /* default mac retry limits */ + wlc_hw->SRL = RETRY_SHORT_DEF; + wlc_hw->LRL = RETRY_LONG_DEF; + wlc_hw->chanspec = CH20MHZ_CHSPEC(1); +} + +/* + * low level detach + */ +int wlc_bmac_detach(struct wlc_info *wlc) +{ + uint i; + struct wlc_hwband *band; + struct wlc_hw_info *wlc_hw = wlc->hw; + int callbacks; + + callbacks = 0; + + if (wlc_hw->sih) { + /* detach interrupt sync mechanism since interrupt is disabled and per-port + * interrupt object may has been freed. this must be done before sb core switch + */ + ai_deregister_intr_callback(wlc_hw->sih); + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_sleep(wlc_hw->sih); + } + + wlc_bmac_detach_dmapio(wlc_hw); + + band = wlc_hw->band; + for (i = 0; i < NBANDS_HW(wlc_hw); i++) { + if (band->pi) { + /* Detach this band's phy */ + wlc_phy_detach(band->pi); + band->pi = NULL; + } + band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; + } + + /* Free shared phy state */ + wlc_phy_shared_detach(wlc_hw->phy_sh); + + wlc_phy_shim_detach(wlc_hw->physhim); + + /* free vars */ + kfree(wlc_hw->vars); + wlc_hw->vars = NULL; + + if (wlc_hw->sih) { + ai_detach(wlc_hw->sih); + wlc_hw->sih = NULL; + } + + return callbacks; + +} + +void wlc_bmac_reset(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset the core */ + if (!DEVICEREMOVED(wlc_hw->wlc)) + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + /* purge the dma rings */ + wlc_flushqueues(wlc_hw->wlc); + + wlc_reset_bmac_done(wlc_hw->wlc); +} + +void +wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute) { + u32 macintmask; + bool fastclk; + struct wlc_info *wlc = wlc_hw->wlc; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* disable interrupts */ + macintmask = brcms_intrsoff(wlc->wl); + + /* set up the specified band and chanspec */ + wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); + wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); + + /* do one-time phy inits and calibration */ + wlc_phy_cal_init(wlc_hw->band->pi); + + /* core-specific initialization */ + wlc_coreinit(wlc); + + /* suspend the tx fifos and mute the phy for preism cac time */ + if (mute) + wlc_bmac_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); + + /* band-specific inits */ + wlc_bmac_bsinit(wlc, chanspec); + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended + * and wlc_enable_mac() will clear this override bit. + */ + mboolset(wlc_hw->wake_override, WLC_WAKE_OVERRIDE_MACSUSPEND); + + /* + * initialize mac_suspend_depth to 1 to match ucode initial suspended state + */ + wlc_hw->mac_suspend_depth = 1; + + /* restore the clk */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) +{ + uint coremask; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of wlc_up(). + */ + wlc_bmac_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* + * Configure pci/pcmcia here instead of in wlc_attach() + * to allow mfg hotswap: down, hotswap (chip power cycle), up. + */ + coremask = (1 << wlc_hw->wlc->core->coreidx); + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_setup(wlc_hw->sih, coremask); + + /* + * Need to read the hwradio status here to cover the case where the system + * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. + */ + if (wlc_bmac_radio_read_hwdisabled(wlc_hw)) { + /* put SB PCI in down state again */ + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + wlc_bmac_xtal(wlc_hw, OFF); + return -ENOMEDIUM; + } + + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_up(wlc_hw->sih); + + /* reset the d11 core */ + wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + + return 0; +} + +int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + wlc_hw->up = true; + wlc_phy_hw_state_upd(wlc_hw->band->pi, true); + + /* FULLY enable dynamic power control and d11 core interrupt */ + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_intrson(wlc_hw->wlc->wl); + return 0; +} + +int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) +{ + bool dev_gone; + uint callbacks = 0; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + /* disable interrupts */ + if (dev_gone) + wlc_hw->wlc->macintmask = 0; + else { + /* now disable interrupts */ + brcms_intrsoff(wlc_hw->wlc->wl); + + /* ensure we're running on the pll clock again */ + wlc_clkctl_clk(wlc_hw, CLK_FAST); + } + /* down phy at the last of this stage */ + callbacks += wlc_phy_down(wlc_hw->band->pi); + + return callbacks; +} + +int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) +{ + uint callbacks = 0; + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (!wlc_hw->up) + return callbacks; + + wlc_hw->up = false; + wlc_phy_hw_state_upd(wlc_hw->band->pi, false); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) { + wlc_hw->sbclk = false; + wlc_hw->clk = false; + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + + /* reclaim any posted packets */ + wlc_flushqueues(wlc_hw->wlc); + } else { + + /* Reset and disable the core */ + if (ai_iscoreup(wlc_hw->sih)) { + if (R_REG(&wlc_hw->regs->maccontrol) & + MCTL_EN_MAC) + wlc_suspend_mac_and_wait(wlc_hw->wlc); + callbacks += brcms_reset(wlc_hw->wlc->wl); + wlc_coredisable(wlc_hw); + } + + /* turn off primary xtal and pll */ + if (!wlc_hw->noreset) { + if (wlc_hw->sih->bustype == PCI_BUS) + ai_pci_down(wlc_hw->sih); + wlc_bmac_xtal(wlc_hw, OFF); + } + } + + return callbacks; +} + +void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw) +{ + /* delay before first read of ucode state */ + udelay(40); + + /* wait until ucode is no longer asleep */ + SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) == + DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); +} + +void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea) +{ + memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); +} + +static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw) +{ + return wlc_hw->band->bandtype; +} + +/* control chip clock to save power, enable dynamic clock or force fast clock */ +static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) +{ + if (PMUCTL_ENAB(wlc_hw->sih)) { + /* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane, + * but mac core will still run on ALP(not HT) when it enters powersave mode, + * which means the FCA bit may not be set. + * should wakeup mac if driver wants it to run on HT. + */ + + if (wlc_hw->clk) { + if (mode == CLK_FAST) { + OR_REG(&wlc_hw->regs->clk_ctl_st, + CCS_FORCEHT); + + udelay(64); + + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) == 0), + PMU_MAX_TRANSITION_DLY); + WARN_ON(!(R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL)); + } else { + if ((wlc_hw->sih->pmurev == 0) && + (R_REG + (&wlc_hw->regs-> + clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) + SPINWAIT(((R_REG + (&wlc_hw->regs-> + clk_ctl_st) & CCS_HTAVAIL) + == 0), + PMU_MAX_TRANSITION_DLY); + AND_REG(&wlc_hw->regs->clk_ctl_st, + ~CCS_FORCEHT); + } + } + wlc_hw->forcefastclk = (mode == CLK_FAST); + } else { + + /* old chips w/o PMU, force HT through cc, + * then use FCA to verify mac is running fast clock + */ + + wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); + + /* check fast clock is available (if core is not in reset) */ + if (wlc_hw->forcefastclk && wlc_hw->clk) + WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & + SISF_FCLKA)); + + /* keep the ucode wake bit on if forcefastclk is on + * since we do not want ucode to put us back to slow clock + * when it dozes for PM mode. + * Code below matches the wake override bit with current forcefastclk state + * Only setting bit in wake_override instead of waking ucode immediately + * since old code (wlc.c 1.4499) had this behavior. Older code set + * wlc->forcefastclk but only had the wake happen if the wakup_ucode work + * (protected by an up check) was executed just below. + */ + if (wlc_hw->forcefastclk) + mboolset(wlc_hw->wake_override, + WLC_WAKE_OVERRIDE_FORCEFAST); + else + mboolclr(wlc_hw->wake_override, + WLC_WAKE_OVERRIDE_FORCEFAST); + } +} + +/* set initial host flags value */ +static void +wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + + memset(mhfs, 0, MHFMAX * sizeof(u16)); + + mhfs[MHF2] |= mhf2_init; + + /* prohibit use of slowclock on multifunction boards */ + if (wlc_hw->boardflags & BFL_NOPLLDOWN) + mhfs[MHF1] |= MHF1_FORCEFASTCLK; + + if (WLCISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { + mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; + mhfs[MHF1] |= MHF1_IQSWAP_WAR; + } +} + +/* set or clear ucode host flag bits + * it has an optimization for no-change write + * it only writes through shared memory when the core has clock; + * pre-CLK changes should use wlc_write_mhf to get around the optimization + * + * + * bands values are: WLC_BAND_AUTO <--- Current band only + * WLC_BAND_5G <--- 5G band only + * WLC_BAND_2G <--- 2G band only + * WLC_BAND_ALL <--- All bands + */ +void +wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, + int bands) +{ + u16 save; + u16 addr[MHFMAX] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + struct wlc_hwband *band; + + if ((val & ~mask) || idx >= MHFMAX) + return; /* error condition */ + + switch (bands) { + /* Current band only or all bands, + * then set the band to current band + */ + case WLC_BAND_AUTO: + case WLC_BAND_ALL: + band = wlc_hw->band; + break; + case WLC_BAND_5G: + band = wlc_hw->bandstate[BAND_5G_INDEX]; + break; + case WLC_BAND_2G: + band = wlc_hw->bandstate[BAND_2G_INDEX]; + break; + default: + band = NULL; /* error condition */ + } + + if (band) { + save = band->mhfs[idx]; + band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; + + /* optimization: only write through if changed, and + * changed band is the current band + */ + if (wlc_hw->clk && (band->mhfs[idx] != save) + && (band == wlc_hw->band)) + wlc_bmac_write_shm(wlc_hw, addr[idx], + (u16) band->mhfs[idx]); + } + + if (bands == WLC_BAND_ALL) { + wlc_hw->bandstate[0]->mhfs[idx] = + (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; + wlc_hw->bandstate[1]->mhfs[idx] = + (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; + } +} + +u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) +{ + struct wlc_hwband *band; + + if (idx >= MHFMAX) + return 0; /* error condition */ + switch (bands) { + case WLC_BAND_AUTO: + band = wlc_hw->band; + break; + case WLC_BAND_5G: + band = wlc_hw->bandstate[BAND_5G_INDEX]; + break; + case WLC_BAND_2G: + band = wlc_hw->bandstate[BAND_2G_INDEX]; + break; + default: + band = NULL; /* error condition */ + } + + if (!band) + return 0; + + return band->mhfs[idx]; +} + +static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) +{ + u8 idx; + u16 addr[] = { + M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, + M_HOST_FLAGS5 + }; + + for (idx = 0; idx < MHFMAX; idx++) { + wlc_bmac_write_shm(wlc_hw, addr[idx], mhfs[idx]); + } +} + +/* set the maccontrol register to desired reset state and + * initialize the sw cache of the register + */ +static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw) +{ + /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ + wlc_hw->maccontrol = 0; + wlc_hw->suspended_fifos = 0; + wlc_hw->wake_override = 0; + wlc_hw->mute_override = 0; + wlc_bmac_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); +} + +/* set or clear maccontrol bits */ +void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) +{ + u32 maccontrol; + u32 new_maccontrol; + + if (val & ~mask) + return; /* error condition */ + maccontrol = wlc_hw->maccontrol; + new_maccontrol = (maccontrol & ~mask) | val; + + /* if the new maccontrol value is the same as the old, nothing to do */ + if (new_maccontrol == maccontrol) + return; + + /* something changed, cache the new value */ + wlc_hw->maccontrol = new_maccontrol; + + /* write the new values with overrides applied */ + wlc_mctrl_write(wlc_hw); +} + +/* write the software state of maccontrol and overrides to the maccontrol register */ +static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) +{ + u32 maccontrol = wlc_hw->maccontrol; + + /* OR in the wake bit if overridden */ + if (wlc_hw->wake_override) + maccontrol |= MCTL_WAKE; + + /* set AP and INFRA bits for mute if needed */ + if (wlc_hw->mute_override) { + maccontrol &= ~(MCTL_AP); + maccontrol |= MCTL_INFRA; + } + + W_REG(&wlc_hw->regs->maccontrol, maccontrol); +} + +void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) +{ + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { + mboolset(wlc_hw->wake_override, override_bit); + return; + } + + mboolset(wlc_hw->wake_override, override_bit); + + wlc_mctrl_write(wlc_hw); + wlc_bmac_wait_for_wake(wlc_hw); + + return; +} + +void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) +{ + mboolclr(wlc_hw->wake_override, override_bit); + + if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) + return; + + wlc_mctrl_write(wlc_hw); + + return; +} + +/* When driver needs ucode to stop beaconing, it has to make sure that + * MCTL_AP is clear and MCTL_INFRA is set + * Mode MCTL_AP MCTL_INFRA + * AP 1 1 + * STA 0 1 <--- This will ensure no beacons + * IBSS 0 0 + */ +static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) +{ + wlc_hw->mute_override = 1; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + wlc_mctrl_write(wlc_hw); + + return; +} + +/* Clear the override on AP and INFRA bits */ +static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) +{ + if (wlc_hw->mute_override == 0) + return; + + wlc_hw->mute_override = 0; + + /* if maccontrol already has AP == 0 and INFRA == 1 without this + * override, then there is no change to write + */ + if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) + return; + + wlc_mctrl_write(wlc_hw); +} + +/* + * Write a MAC address to the given match reg offset in the RXE match engine. + */ +void +wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, + const u8 *addr) +{ + d11regs_t *regs; + u16 mac_l; + u16 mac_m; + u16 mac_h; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: wlc_bmac_set_addrmatch\n", + wlc_hw->unit); + + regs = wlc_hw->regs; + mac_l = addr[0] | (addr[1] << 8); + mac_m = addr[2] | (addr[3] << 8); + mac_h = addr[4] | (addr[5] << 8); + + /* enter the MAC addr into the RXE match registers */ + W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); + W_REG(®s->rcm_mat_data, mac_l); + W_REG(®s->rcm_mat_data, mac_m); + W_REG(®s->rcm_mat_data, mac_h); + +} + +void +wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, + void *buf) +{ + d11regs_t *regs; + u32 word; + bool be_bit; + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + W_REG(®s->tplatewrptr, offset); + + /* if MCTL_BIGEND bit set in mac control register, + * the chip swaps data in fifo, as well as data in + * template ram + */ + be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; + + while (len > 0) { + memcpy(&word, buf, sizeof(u32)); + + if (be_bit) + word = cpu_to_be32(word); + else + word = cpu_to_le32(word); + + W_REG(®s->tplatewrdata, word); + + buf = (u8 *) buf + sizeof(u32); + len -= sizeof(u32); + } +} + +void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) +{ + wlc_hw->band->CWmin = newmin; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmin); +} + +void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) +{ + wlc_hw->band->CWmax = newmax; + + W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, newmax); +} + +void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) +{ + bool fastclk; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + wlc_phy_bw_state_set(wlc_hw->band->pi, bw); + + wlc_bmac_phy_reset(wlc_hw); + wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); + + /* restore the clk */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +static void +wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, int len) +{ + d11regs_t *regs = wlc_hw->regs; + + wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); + /* mark beacon0 valid */ + OR_REG(®s->maccommand, MCMD_BCN0VLD); +} + +static void +wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, int len) +{ + d11regs_t *regs = wlc_hw->regs; + + wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, + bcn); + /* write beacon length to SCR */ + wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); + /* mark beacon1 valid */ + OR_REG(®s->maccommand, MCMD_BCN1VLD); +} + +/* mac is assumed to be suspended at this point */ +void +wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, void *bcn, int len, + bool both) +{ + d11regs_t *regs = wlc_hw->regs; + + if (both) { + wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); + wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + } else { + /* bcn 0 */ + if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) + wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); + /* bcn 1 */ + else if (! + (R_REG(®s->maccommand) & MCMD_BCN1VLD)) + wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + } +} + +static void WLBANDINITFN(wlc_bmac_upd_synthpu) (struct wlc_hw_info *wlc_hw) +{ + u16 v; + struct wlc_info *wlc = wlc_hw->wlc; + /* update SYNTHPU_DLY */ + + if (WLCISLCNPHY(wlc->band)) { + v = SYNTHPU_DLY_LPPHY_US; + } else if (WLCISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { + v = SYNTHPU_DLY_NPHY_US; + } else { + v = SYNTHPU_DLY_BPHY_US; + } + + wlc_bmac_write_shm(wlc_hw, M_SYNTHPU_DLY, v); +} + +/* band-specific init */ +static void +WLBANDINITFN(wlc_bmac_bsinit) (struct wlc_info *wlc, chanspec_t chanspec) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + wlc_ucode_bsinit(wlc_hw); + + wlc_phy_init(wlc_hw->band->pi, chanspec); + + wlc_ucode_txant_set(wlc_hw); + + /* cwmin is band-specific, update hardware with value for current band */ + wlc_bmac_set_cwmin(wlc_hw, wlc_hw->band->CWmin); + wlc_bmac_set_cwmax(wlc_hw, wlc_hw->band->CWmax); + + wlc_bmac_update_slot_timing(wlc_hw, + BAND_5G(wlc_hw->band-> + bandtype) ? true : wlc_hw-> + shortslot); + + /* write phytype and phyvers */ + wlc_bmac_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); + wlc_bmac_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); + + /* initialize the txphyctl1 rate table since shmem is shared between bands */ + wlc_upd_ofdm_pctl1_table(wlc_hw); + + wlc_bmac_upd_synthpu(wlc_hw); +} + +static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); + + wlc_hw->phyclk = clk; + + if (OFF == clk) { /* clear gmode bit, put phy into reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), + (SICF_PRST | SICF_FGC)); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); + udelay(1); + + } else { /* take phy out of reset */ + + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); + udelay(1); + ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); + udelay(1); + + } +} + +/* Perform a soft reset of the PHY PLL */ +void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_addr), ~0, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 4); + udelay(1); + ai_corereg(wlc_hw->sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); + udelay(1); +} + +/* light way to turn on phy clock without reset for NPHY only + * refer to wlc_bmac_core_phy_clk for full version + */ +void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) +{ + /* support(necessary for NPHY and HYPHY) only */ + if (!WLCISNPHY(wlc_hw->band)) + return; + + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); + else + ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); + +} + +void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) +{ + if (ON == clk) + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); + else + ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); +} + +void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) +{ + wlc_phy_t *pih = wlc_hw->band->pi; + u32 phy_bw_clkbits; + bool phy_in_reset = false; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + if (pih == NULL) + return; + + phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); + + /* Specific reset sequence required for NPHY rev 3 and 4 */ + if (WLCISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && + NREV_LE(wlc_hw->band->phyrev, 4)) { + /* Set the PHY bandwidth */ + ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); + + udelay(1); + + /* Perform a soft reset of the PHY PLL */ + wlc_bmac_core_phypll_reset(wlc_hw); + + /* reset the PHY */ + ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), + (SICF_PRST | SICF_PCLKE)); + phy_in_reset = true; + } else { + + ai_core_cflags(wlc_hw->sih, + (SICF_PRST | SICF_PCLKE | SICF_BWMASK), + (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); + } + + udelay(2); + wlc_bmac_core_phy_clk(wlc_hw, ON); + + if (pih) + wlc_phy_anacore(pih, ON); +} + +/* switch to and initialize new band */ +static void +WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, + chanspec_t chanspec) { + struct wlc_info *wlc = wlc_hw->wlc; + u32 macintmask; + + /* Enable the d11 core before accessing it */ + if (!ai_iscoreup(wlc_hw->sih)) { + ai_core_reset(wlc_hw->sih, 0, 0); + wlc_mctrl_reset(wlc_hw); + } + + macintmask = wlc_setband_inact(wlc, bandunit); + + if (!wlc_hw->up) + return; + + wlc_bmac_core_phy_clk(wlc_hw, ON); + + /* band-specific initializations */ + wlc_bmac_bsinit(wlc, chanspec); + + /* + * If there are any pending software interrupt bits, + * then replace these with a harmless nonzero value + * so wlc_dpc() will re-enable interrupts when done. + */ + if (wlc->macintstatus) + wlc->macintstatus = MI_DMAINT; + + /* restore macintmask */ + brcms_intrsrestore(wlc->wl, macintmask); + + /* ucode should still be suspended.. */ + WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); +} + +/* low-level band switch utility routine */ +void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + bandunit); + + wlc_hw->band = wlc_hw->bandstate[bandunit]; + + /* BMAC_NOTE: until we eliminate need for wlc->band refs in low level code */ + wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; + + /* set gmode core flag */ + if (wlc_hw->sbclk && !wlc_hw->noreset) { + ai_core_cflags(wlc_hw->sih, SICF_GMODE, + ((bandunit == 0) ? SICF_GMODE : 0)); + } +} + +static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) +{ + + /* reject unsupported corerev */ + if (!VALID_COREREV(wlc_hw->corerev)) { + wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", + wlc_hw->corerev); + return false; + } + + return true; +} + +static bool wlc_validboardtype(struct wlc_hw_info *wlc_hw) +{ + bool goodboard = true; + uint boardrev = wlc_hw->boardrev; + + if (boardrev == 0) + goodboard = false; + else if (boardrev > 0xff) { + uint brt = (boardrev & 0xf000) >> 12; + uint b0 = (boardrev & 0xf00) >> 8; + uint b1 = (boardrev & 0xf0) >> 4; + uint b2 = boardrev & 0xf; + + if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) + || (b2 > 9)) + goodboard = false; + } + + if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) + return goodboard; + + return goodboard; +} + +static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) +{ + const char *varname = "macaddr"; + char *macaddr; + + /* If macaddr exists, use it (Sromrev4, CIS, ...). */ + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr != NULL) + return macaddr; + + if (NBANDS_HW(wlc_hw) > 1) + varname = "et1macaddr"; + else + varname = "il0macaddr"; + + macaddr = getvar(wlc_hw->vars, varname); + if (macaddr == NULL) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " + "getvar(%s) not found\n", wlc_hw->unit, varname); + } + + return macaddr; +} + +/* + * Return true if radio is disabled, otherwise false. + * hw radio disable signal is an external pin, users activate it asynchronously + * this function could be called when driver is down and w/o clock + * it operates on different registers depending on corerev and boardflag. + */ +bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) +{ + bool v, clk, xtal; + u32 resetbits = 0, flags = 0; + + xtal = wlc_hw->sbclk; + if (!xtal) + wlc_bmac_xtal(wlc_hw, ON); + + /* may need to take core out of reset first */ + clk = wlc_hw->clk; + if (!clk) { + /* + * mac no longer enables phyclk automatically when driver + * accesses phyreg throughput mac. This can be skipped since + * only mac reg is accessed below + */ + flags |= SICF_PCLKE; + + /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID) || + (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + wlc_hw->regs = + (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, + 0); + ai_core_reset(wlc_hw->sih, flags, resetbits); + wlc_mctrl_reset(wlc_hw); + } + + v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); + + /* put core back into reset */ + if (!clk) + ai_core_disable(wlc_hw->sih, 0); + + if (!xtal) + wlc_bmac_xtal(wlc_hw, OFF); + + return v; +} + +/* Initialize just the hardware when coming out of POR or S3/S5 system states */ +void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) +{ + if (wlc_hw->wlc->pub->hw_up) + return; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* + * Enable pll and xtal, initialize the power control registers, + * and force fastclock for the remainder of wlc_up(). + */ + wlc_bmac_xtal(wlc_hw, ON); + ai_clkctl_init(wlc_hw->sih); + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + if (wlc_hw->sih->bustype == PCI_BUS) { + ai_pci_fixcfg(wlc_hw->sih); + + /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID) || + (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + wlc_hw->regs = + (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, + 0); + } + + /* Inform phy that a POR reset has occurred so it does a complete phy init */ + wlc_phy_por_inform(wlc_hw->band->pi); + + wlc_hw->ucode_loaded = false; + wlc_hw->wlc->pub->hw_up = true; + + if ((wlc_hw->boardflags & BFL_FEM) + && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + if (! + (wlc_hw->boardrev >= 0x1250 + && (wlc_hw->boardflags & BFL_FEM_BT))) + ai_epa_4313war(wlc_hw->sih); + } +} + +static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) +{ + struct dma_pub *di = wlc_hw->di[fifo]; + return dma_rxreset(di); +} + +/* d11 core reset + * ensure fask clock during reset + * reset dma + * reset d11(out of reset) + * reset phy(out of reset) + * clear software macintstatus for fresh new start + * one testing hack wlc_hw->noreset will bypass the d11/phy reset + */ +void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) +{ + d11regs_t *regs; + uint i; + bool fastclk; + u32 resetbits = 0; + + if (flags == WLC_USE_COREFLAGS) + flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* request FAST clock if not on */ + fastclk = wlc_hw->forcefastclk; + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + /* reset the dma engines except first time thru */ + if (ai_iscoreup(wlc_hw->sih)) { + for (i = 0; i < NFIFO; i++) + if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " + "dma_txreset[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, i); + } + + if ((wlc_hw->di[RX_FIFO]) + && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) { + wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" + "[%d]: cannot stop dma\n", + wlc_hw->unit, __func__, RX_FIFO); + } + } + /* if noreset, just stop the psm and return */ + if (wlc_hw->noreset) { + wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ + wlc_bmac_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); + return; + } + + /* + * mac no longer enables phyclk automatically when driver accesses + * phyreg throughput mac, AND phy_reset is skipped at early stage when + * band->pi is invalid. need to enable PHY CLK + */ + flags |= SICF_PCLKE; + + /* reset the core + * In chips with PMU, the fastclk request goes through d11 core reg 0x1e0, which + * is cleared by the core_reset. have to re-request it. + * This adds some delay and we can optimize it by also requesting fastclk through + * chipcommon during this period if necessary. But that has to work coordinate + * with other driver like mips/arm since they may touch chipcommon as well. + */ + wlc_hw->clk = false; + ai_core_reset(wlc_hw->sih, flags, resetbits); + wlc_hw->clk = true; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); + + wlc_mctrl_reset(wlc_hw); + + if (PMUCTL_ENAB(wlc_hw->sih)) + wlc_clkctl_clk(wlc_hw, CLK_FAST); + + wlc_bmac_phy_reset(wlc_hw); + + /* turn on PHY_PLL */ + wlc_bmac_core_phypll_ctl(wlc_hw, true); + + /* clear sw intstatus */ + wlc_hw->wlc->macintstatus = 0; + + /* restore the clk setting */ + if (!fastclk) + wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); +} + +/* txfifo sizes needs to be modified(increased) since the newer cores + * have more memory. + */ +static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) +{ + d11regs_t *regs = wlc_hw->regs; + u16 fifo_nu; + u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; + u16 txfifo_def, txfifo_def1; + u16 txfifo_cmd; + + /* tx fifos start at TXFIFO_START_BLK from the Base address */ + txfifo_startblk = TXFIFO_START_BLK; + + /* sequence of operations: reset fifo, set fifo size, reset fifo */ + for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { + + txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; + txfifo_def = (txfifo_startblk & 0xff) | + (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); + txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | + ((((txfifo_endblk - + 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); + txfifo_cmd = + TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + W_REG(®s->xmtfifodef, txfifo_def); + W_REG(®s->xmtfifodef1, txfifo_def1); + + W_REG(®s->xmtfifocmd, txfifo_cmd); + + txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; + } + /* + * need to propagate to shm location to be in sync since ucode/hw won't + * do this + */ + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE0, + wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE1, + wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE2, + ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_AC_BK_FIFO])); + wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE3, + ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> + xmtfifo_sz[TX_BCMC_FIFO])); +} + +/* d11 core init + * reset PSM + * download ucode/PCM + * let ucode run to suspended + * download ucode inits + * config other core registers + * init dma + */ +static void wlc_coreinit(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs; + u32 sflags; + uint bcnint_us; + uint i = 0; + bool fifosz_fixup = false; + int err = 0; + u16 buf[NFIFO]; + struct wiphy *wiphy = wlc->wiphy; + + regs = wlc_hw->regs; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + /* reset PSM */ + wlc_bmac_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); + + wlc_ucode_download(wlc_hw); + /* + * FIFOSZ fixup. driver wants to controls the fifo allocation. + */ + fifosz_fixup = true; + + /* let the PSM run to the suspended state, set mode to BSS STA */ + W_REG(®s->macintstatus, -1); + wlc_bmac_mctrl(wlc_hw, ~0, + (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); + + /* wait for ucode to self-suspend after auto-init */ + SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), + 1000 * 1000); + if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) + wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" + "suspend!\n", wlc_hw->unit); + + wlc_gpio_init(wlc); + + sflags = ai_core_sflags(wlc_hw->sih, 0, 0); + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) + wlc_write_inits(wlc_hw, d11n0initvals16); + else + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_write_inits(wlc_hw, d11lcn0initvals24); + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" + " %d\n", __func__, wlc_hw->unit, + wlc_hw->corerev); + } + } else { + wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + + /* For old ucode, txfifo sizes needs to be modified(increased) */ + if (fifosz_fixup == true) { + wlc_corerev_fifofixup(wlc_hw); + } + + /* check txfifo allocations match between ucode and driver */ + buf[TX_AC_BE_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE0); + if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { + i = TX_AC_BE_FIFO; + err = -1; + } + buf[TX_AC_VI_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE1); + if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { + i = TX_AC_VI_FIFO; + err = -1; + } + buf[TX_AC_BK_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE2); + buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; + buf[TX_AC_BK_FIFO] &= 0xff; + if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { + i = TX_AC_BK_FIFO; + err = -1; + } + if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { + i = TX_AC_VO_FIFO; + err = -1; + } + buf[TX_BCMC_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE3); + buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; + buf[TX_BCMC_FIFO] &= 0xff; + if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { + i = TX_BCMC_FIFO; + err = -1; + } + if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { + i = TX_ATIM_FIFO; + err = -1; + } + if (err != 0) { + wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" + " driver size %d index %d\n", buf[i], + wlc_hw->xmtfifo_sz[i], i); + } + + /* make sure we can still talk to the mac */ + WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); + + /* band-specific inits done by wlc_bsinit() */ + + /* Set up frame burst size and antenna swap threshold init values */ + wlc_bmac_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); + wlc_bmac_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); + + /* enable one rx interrupt per received frame */ + W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); + + /* set the station mode (BSS STA) */ + wlc_bmac_mctrl(wlc_hw, + (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), + (MCTL_INFRA | MCTL_DISCARD_PMQ)); + + /* set up Beacon interval */ + bcnint_us = 0x8000 << 10; + W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); + W_REG(®s->tsf_cfpstart, bcnint_us); + W_REG(®s->macintstatus, MI_GP1); + + /* write interrupt mask */ + W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); + + /* allow the MAC to control the PHY clock (dynamic on/off) */ + wlc_bmac_macphyclk_set(wlc_hw, ON); + + /* program dynamic clock control fast powerup delay register */ + wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); + W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); + + /* tell the ucode the corerev */ + wlc_bmac_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); + + /* tell the ucode MAC capabilities */ + wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_L, + (u16) (wlc_hw->machwcap & 0xffff)); + wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_H, + (u16) ((wlc_hw-> + machwcap >> 16) & 0xffff)); + + /* write retry limits to SCR, this done after PSM init */ + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->SRL); + W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, wlc_hw->LRL); + + /* write rate fallback retry limits */ + wlc_bmac_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); + wlc_bmac_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); + + AND_REG(®s->ifs_ctl, 0x0FFF); + W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); + + /* dma initializations */ + wlc->txpend16165war = 0; + + /* init the tx dma engines */ + for (i = 0; i < NFIFO; i++) { + if (wlc_hw->di[i]) + dma_txinit(wlc_hw->di[i]); + } + + /* init the rx dma engine(s) and post receive buffers */ + dma_rxinit(wlc_hw->di[RX_FIFO]); + dma_rxfill(wlc_hw->di[RX_FIFO]); +} + +/* This function is used for changing the tsf frac register + * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz + * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz + * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz + * HTPHY Formula is 2^26/freq(MHz) e.g. + * For spuron2 - 126MHz -> 2^26/126 = 532610.0 + * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 + * For spuron: 123MHz -> 2^26/123 = 545600.5 + * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 + * For spur off: 120MHz -> 2^26/120 = 559240.5 + * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 + */ + +void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) +{ + d11regs_t *regs; + regs = wlc_hw->regs; + + if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { + if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x2082); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x5341); + W_REG(®s->tsf_clk_frac_h, 0x8); + } else { /* 120Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x8889); + W_REG(®s->tsf_clk_frac_h, 0x8); + } + } else if (WLCISLCNPHY(wlc_hw->band)) { + if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ + W_REG(®s->tsf_clk_frac_l, 0x7CE0); + W_REG(®s->tsf_clk_frac_h, 0xC); + } else { /* 80Mhz */ + W_REG(®s->tsf_clk_frac_l, 0xCCCD); + W_REG(®s->tsf_clk_frac_h, 0xC); + } + } +} + +/* Initialize GPIOs that are controlled by D11 core */ +static void wlc_gpio_init(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs; + u32 gc, gm; + + regs = wlc_hw->regs; + + /* use GPIO select 0 to get all gpio signals from the gpio out reg */ + wlc_bmac_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); + + /* + * Common GPIO setup: + * G0 = LED 0 = WLAN Activity + * G1 = LED 1 = WLAN 2.4 GHz Radio State + * G2 = LED 2 = WLAN 5 GHz Radio State + * G4 = radio disable input (HI enabled, LO disabled) + */ + + gc = gm = 0; + + /* Allocate GPIOs for mimo antenna diversity feature */ + if (wlc_hw->antsel_type == ANTSEL_2x3) { + /* Enable antenna diversity, use 2x3 mode */ + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, WLC_BAND_ALL); + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, + MHF3_ANTSEL_MODE, WLC_BAND_ALL); + + /* init superswitch control */ + wlc_phy_antsel_init(wlc_hw->band->pi, false); + + } else if (wlc_hw->antsel_type == ANTSEL_2x4) { + gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); + /* + * The board itself is powered by these GPIOs + * (when not sending pattern) so set them high + */ + OR_REG(®s->psm_gpio_oe, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + OR_REG(®s->psm_gpio_out, + (BOARD_GPIO_12 | BOARD_GPIO_13)); + + /* Enable antenna diversity, use 2x4 mode */ + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, WLC_BAND_ALL); + wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, + WLC_BAND_ALL); + + /* Configure the desired clock to be 4Mhz */ + wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV, + ANTSEL_CLKDIV_4MHZ); + } + + /* gpio 9 controls the PA. ucode is responsible for wiggling out and oe */ + if (wlc_hw->boardflags & BFL_PACTRL) + gm |= gc |= BOARD_GPIO_PACTRL; + + /* apply to gpiocontrol register */ + ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); +} + +static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) +{ + struct wlc_info *wlc; + wlc = wlc_hw->wlc; + + if (wlc_hw->ucode_loaded) + return; + + if (D11REV_IS(wlc_hw->corerev, 23)) { + if (WLCISNPHY(wlc_hw->band)) { + wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, + bcm43xx_16_mimosz); + wlc_hw->ucode_loaded = true; + } else + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } else if (D11REV_IS(wlc_hw->corerev, 24)) { + if (WLCISLCNPHY(wlc_hw->band)) { + wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, + bcm43xx_24_lcnsz); + wlc_hw->ucode_loaded = true; + } else { + wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " + "corerev %d\n", + __func__, wlc_hw->unit, wlc_hw->corerev); + } + } +} + +static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], + const uint nbytes) { + d11regs_t *regs = wlc_hw->regs; + uint i; + uint count; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + count = (nbytes / sizeof(u32)); + + W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); + (void)R_REG(®s->objaddr); + for (i = 0; i < count; i++) + W_REG(®s->objdata, ucode[i]); +} + +static void wlc_write_inits(struct wlc_hw_info *wlc_hw, + const struct d11init *inits) +{ + int i; + volatile u8 *base; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + base = (volatile u8 *)wlc_hw->regs; + + for (i = 0; inits[i].addr != 0xffff; i++) { + if (inits[i].size == 2) + W_REG((u16 *)(base + inits[i].addr), + inits[i].value); + else if (inits[i].size == 4) + W_REG((u32 *)(base + inits[i].addr), + inits[i].value); + } +} + +static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw) +{ + u16 phyctl; + u16 phytxant = wlc_hw->bmac_phytxant; + u16 mask = PHY_TXC_ANT_MASK; + + /* set the Probe Response frame phy control word */ + phyctl = wlc_bmac_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); + phyctl = (phyctl & ~mask) | phytxant; + wlc_bmac_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); + + /* set the Response (ACK/CTS) frame phy control word */ + phyctl = wlc_bmac_read_shm(wlc_hw, M_RSP_PCTLWD); + phyctl = (phyctl & ~mask) | phytxant; + wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); +} + +void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) +{ + /* update sw state */ + wlc_hw->bmac_phytxant = phytxant; + + /* push to ucode if up */ + if (!wlc_hw->up) + return; + wlc_ucode_txant_set(wlc_hw); + +} + +u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw) +{ + return (u16) wlc_hw->wlc->stf->txant; +} + +void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) +{ + wlc_hw->antsel_type = antsel_type; + + /* Update the antsel type for phy module to use */ + wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); +} + +void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) +{ + bool fatal = false; + uint unit; + uint intstatus, idx; + d11regs_t *regs = wlc_hw->regs; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + unit = wlc_hw->unit; + + for (idx = 0; idx < NFIFO; idx++) { + /* read intstatus register and ignore any non-error bits */ + intstatus = + R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; + if (!intstatus) + continue; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", + unit, idx, intstatus); + + if (intstatus & I_RO) { + wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " + "overflow\n", unit, idx); + fatal = true; + } + + if (intstatus & I_PC) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", + unit, idx); + fatal = true; + } + + if (intstatus & I_PD) { + wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, + idx); + fatal = true; + } + + if (intstatus & I_DE) { + wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " + "error\n", unit, idx); + fatal = true; + } + + if (intstatus & I_RU) { + wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " + "underflow\n", idx, unit); + } + + if (intstatus & I_XU) { + wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " + "underflow\n", idx, unit); + fatal = true; + } + + if (fatal) { + wlc_fatal_error(wlc_hw->wlc); /* big hammer */ + break; + } else + W_REG(®s->intctrlregs[idx].intstatus, + intstatus); + } +} + +void wlc_intrson(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + wlc->macintmask = wlc->defmacintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +/* callback for siutils.c, which has only wlc handler, no wl + * they both check up, not only because there is no need to off/restore d11 interrupt + * but also because per-port code may require sync with valid interrupt. + */ + +static u32 wlc_wlintrsoff(struct wlc_info *wlc) +{ + if (!wlc->hw->up) + return 0; + + return brcms_intrsoff(wlc->wl); +} + +static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) +{ + if (!wlc->hw->up) + return; + + brcms_intrsrestore(wlc->wl, macintmask); +} + +u32 wlc_intrsoff(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintmask; + + if (!wlc_hw->clk) + return 0; + + macintmask = wlc->macintmask; /* isr can still happen */ + + W_REG(&wlc_hw->regs->macintmask, 0); + (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ + udelay(1); /* ensure int line is no longer driven */ + wlc->macintmask = 0; + + /* return previous macintmask; resolve race between us and our isr */ + return wlc->macintstatus ? 0 : macintmask; +} + +void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + if (!wlc_hw->clk) + return; + + wlc->macintmask = macintmask; + W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); +} + +static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool on, mbool flags) +{ + u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; + + if (on) { + /* suspend tx fifos */ + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); + wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); + + /* zero the address match register so we do not send ACKs */ + wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + null_ether_addr); + } else { + /* resume tx fifos */ + if (!wlc_hw->wlc->tx_suspended) { + wlc_bmac_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); + } + wlc_bmac_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); + wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); + wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); + + /* Restore address */ + wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + wlc_hw->etheraddr); + } + + wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); + + if (on) + wlc_ucode_mute_override_set(wlc_hw); + else + wlc_ucode_mute_override_clear(wlc_hw); +} + +int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) +{ + if (fifo >= NFIFO) + return -EINVAL; + + *blocks = wlc_hw->xmtfifo_sz[fifo]; + + return 0; +} + +/* wlc_bmac_tx_fifo_suspended: + * Check the MAC's tx suspend status for a tx fifo. + * + * When the MAC acknowledges a tx suspend, it indicates that no more + * packets will be transmitted out the radio. This is independent of + * DMA channel suspension---the DMA may have finished suspending, or may still + * be pulling data into a tx fifo, by the time the MAC acks the suspend + * request. + */ +static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + /* check that a suspend has been requested and is no longer pending */ + + /* + * for DMA mode, the suspend request is set in xmtcontrol of the DMA engine, + * and the tx fifo suspend at the lower end of the MAC is acknowledged in the + * chnstatus register. + * The tx fifo suspend completion is independent of the DMA suspend completion and + * may be acked before or after the DMA is suspended. + */ + if (dma_txsuspended(wlc_hw->di[tx_fifo]) && + (R_REG(&wlc_hw->regs->chnstatus) & + (1 << tx_fifo)) == 0) + return true; + + return false; +} + +static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + u8 fifo = 1 << tx_fifo; + + /* Two clients of this code, 11h Quiet period and scanning. */ + + /* only suspend if not already suspended */ + if ((wlc_hw->suspended_fifos & fifo) == fifo) + return; + + /* force the core awake only if not already */ + if (wlc_hw->suspended_fifos == 0) + wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_TXFIFO); + + wlc_hw->suspended_fifos |= fifo; + + if (wlc_hw->di[tx_fifo]) { + /* Suspending AMPDU transmissions in the middle can cause underflow + * which may result in mismatch between ucode and driver + * so suspend the mac before suspending the FIFO + */ + if (WLC_PHY_11N_CAP(wlc_hw->band)) + wlc_suspend_mac_and_wait(wlc_hw->wlc); + + dma_txsuspend(wlc_hw->di[tx_fifo]); + + if (WLC_PHY_11N_CAP(wlc_hw->band)) + wlc_enable_mac(wlc_hw->wlc); + } +} + +static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) +{ + /* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done + * here for PIO otherwise the watchdog will catch the inconsistency and fire + */ + /* Two clients of this code, 11h Quiet period and scanning. */ + if (wlc_hw->di[tx_fifo]) + dma_txresume(wlc_hw->di[tx_fifo]); + + /* allow core to sleep again */ + if (wlc_hw->suspended_fifos == 0) + return; + else { + wlc_hw->suspended_fifos &= ~(1 << tx_fifo); + if (wlc_hw->suspended_fifos == 0) + wlc_ucode_wake_override_clear(wlc_hw, + WLC_WAKE_OVERRIDE_TXFIFO); + } +} + +/* + * Read and clear macintmask and macintstatus and intstatus registers. + * This routine should be called with interrupts off + * Return: + * -1 if DEVICEREMOVED(wlc) evaluates to true; + * 0 if the interrupt is not for us, or we are in some special cases; + * device interrupt status bits otherwise. + */ +static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 macintstatus; + + /* macintstatus includes a DMA interrupt summary bit */ + macintstatus = R_REG(®s->macintstatus); + + BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, + macintstatus); + + /* detect cardbus removed, in power down(suspend) and in reset */ + if (DEVICEREMOVED(wlc)) + return -1; + + /* DEVICEREMOVED succeeds even when the core is still resetting, + * handle that case here. + */ + if (macintstatus == 0xffffffff) + return 0; + + /* defer unsolicited interrupts */ + macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); + + /* if not for us */ + if (macintstatus == 0) + return 0; + + /* interrupts are already turned off for CFE build + * Caution: For CFE Turning off the interrupts again has some undesired + * consequences + */ + /* turn off the interrupts */ + W_REG(®s->macintmask, 0); + (void)R_REG(®s->macintmask); /* sync readback */ + wlc->macintmask = 0; + + /* clear device interrupts */ + W_REG(®s->macintstatus, macintstatus); + + /* MI_DMAINT is indication of non-zero intstatus */ + if (macintstatus & MI_DMAINT) { + /* + * only fifo interrupt enabled is I_RI in + * RX_FIFO. If MI_DMAINT is set, assume it + * is set and clear the interrupt. + */ + W_REG(®s->intctrlregs[RX_FIFO].intstatus, + DEF_RXINTMASK); + } + + return macintstatus; +} + +/* Update wlc->macintstatus and wlc->intstatus[]. */ +/* Return true if they are updated successfully. false otherwise */ +bool wlc_intrsupd(struct wlc_info *wlc) +{ + u32 macintstatus; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, false); + + /* device is removed */ + if (macintstatus == 0xffffffff) + return false; + + /* update interrupt status in software */ + wlc->macintstatus |= macintstatus; + + return true; +} + +/* + * First-level interrupt processing. + * Return true if this was our interrupt, false otherwise. + * *wantdpc will be set to true if further wlc_dpc() processing is required, + * false otherwise. + */ +bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + u32 macintstatus; + + *wantdpc = false; + + if (!wlc_hw->up || !wlc->macintmask) + return false; + + /* read and clear macintstatus and intstatus registers */ + macintstatus = wlc_intstatus(wlc, true); + + if (macintstatus == 0xffffffff) + wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" + " path\n"); + + /* it is not for us */ + if (macintstatus == 0) + return false; + + *wantdpc = true; + + /* save interrupt status bits */ + wlc->macintstatus = macintstatus; + + return true; + +} + +static bool +wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) +{ + /* discard intermediate indications for ucode with one legitimate case: + * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent + * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts + * transmission count) + */ + if (!(txs->status & TX_STATUS_AMPDU) + && (txs->status & TX_STATUS_INTERMEDIATE)) { + return false; + } + + return wlc_dotxstatus(wlc_hw->wlc, txs, s2); +} + +/* process tx completion events in BMAC + * Return true if more tx status need to be processed. false otherwise. + */ +static bool +wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) +{ + bool morepending = false; + struct wlc_info *wlc = wlc_hw->wlc; + d11regs_t *regs; + tx_status_t txstatus, *txs; + u32 s1, s2; + uint n = 0; + /* + * Param 'max_tx_num' indicates max. # tx status to process before + * break out. + */ + uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; + + BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); + + txs = &txstatus; + regs = wlc_hw->regs; + while (!(*fatal) + && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { + + if (s1 == 0xffffffff) { + wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", + wlc_hw->unit, __func__); + return morepending; + } + + s2 = R_REG(®s->frmtxstatus2); + + txs->status = s1 & TXS_STATUS_MASK; + txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; + txs->sequence = s2 & TXS_SEQ_MASK; + txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; + txs->lasttxtime = 0; + + *fatal = wlc_bmac_dotxstatus(wlc_hw, txs, s2); + + /* !give others some time to run! */ + if (++n >= max_tx_num) + break; + } + + if (*fatal) + return 0; + + if (n >= max_tx_num) + morepending = true; + + if (!pktq_empty(&wlc->pkt_queue->q)) + wlc_send_q(wlc); + + return morepending; +} + +void wlc_suspend_mac_and_wait(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 mc, mi; + struct wiphy *wiphy = wlc->wiphy; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc_hw->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth++; + if (wlc_hw->mac_suspend_depth > 1) + return; + + /* force the core awake */ + wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); + + mc = R_REG(®s->maccontrol); + + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(!(mc & MCTL_EN_MAC)); + + mi = R_REG(®s->macintstatus); + if (mi == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mi & MI_MACSSPNDD); + + wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0); + + SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), + WLC_MAX_MAC_SUSPEND); + + if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { + wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" + " and MI_MACSSPNDD is still not on.\n", + wlc_hw->unit, WLC_MAX_MAC_SUSPEND); + wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " + "psm_brc 0x%04x\n", wlc_hw->unit, + R_REG(®s->psmdebug), + R_REG(®s->phydebug), + R_REG(®s->psm_brc)); + } + + mc = R_REG(®s->maccontrol); + if (mc == 0xffffffff) { + wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, + __func__); + brcms_down(wlc->wl); + return; + } + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_PSM_RUN)); + WARN_ON(mc & MCTL_EN_MAC); +} + +void wlc_enable_mac(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + d11regs_t *regs = wlc_hw->regs; + u32 mc, mi; + + BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, + wlc->band->bandunit); + + /* + * Track overlapping suspend requests + */ + wlc_hw->mac_suspend_depth--; + if (wlc_hw->mac_suspend_depth > 0) + return; + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(mc & MCTL_EN_MAC); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); + W_REG(®s->macintstatus, MI_MACSSPNDD); + + mc = R_REG(®s->maccontrol); + WARN_ON(mc & MCTL_PSM_JMP_0); + WARN_ON(!(mc & MCTL_EN_MAC)); + WARN_ON(!(mc & MCTL_PSM_RUN)); + + mi = R_REG(®s->macintstatus); + WARN_ON(mi & MI_MACSSPNDD); + + wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); +} + +static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw) +{ + u8 rate; + u8 rates[8] = { + WLC_RATE_6M, WLC_RATE_9M, WLC_RATE_12M, WLC_RATE_18M, + WLC_RATE_24M, WLC_RATE_36M, WLC_RATE_48M, WLC_RATE_54M + }; + u16 entry_ptr; + u16 pctl1; + uint i; + + if (!WLC_PHY_11N_CAP(wlc_hw->band)) + return; + + /* walk the phy rate table and update the entries */ + for (i = 0; i < ARRAY_SIZE(rates); i++) { + rate = rates[i]; + + entry_ptr = wlc_bmac_ofdm_ratetable_offset(wlc_hw, rate); + + /* read the SHM Rate Table entry OFDM PCTL1 values */ + pctl1 = + wlc_bmac_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); + + /* modify the value */ + pctl1 &= ~PHY_TXC1_MODE_MASK; + pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); + + /* Update the SHM Rate Table entry OFDM PCTL1 values */ + wlc_bmac_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, + pctl1); + } +} + +static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) +{ + uint i; + u8 plcp_rate = 0; + struct plcp_signal_rate_lookup { + u8 rate; + u8 signal_rate; + }; + /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ + const struct plcp_signal_rate_lookup rate_lookup[] = { + {WLC_RATE_6M, 0xB}, + {WLC_RATE_9M, 0xF}, + {WLC_RATE_12M, 0xA}, + {WLC_RATE_18M, 0xE}, + {WLC_RATE_24M, 0x9}, + {WLC_RATE_36M, 0xD}, + {WLC_RATE_48M, 0x8}, + {WLC_RATE_54M, 0xC} + }; + + for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { + if (rate == rate_lookup[i].rate) { + plcp_rate = rate_lookup[i].signal_rate; + break; + } + } + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); +} + +void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode) +{ + wlc_hw->hw_stf_ss_opmode = stf_mode; + + if (wlc_hw->clk) + wlc_upd_ofdm_pctl1_table(wlc_hw); +} + +void +wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr) +{ + d11regs_t *regs = wlc_hw->regs; + + /* read the tsf timer low, then high to get an atomic read */ + *tsf_l_ptr = R_REG(®s->tsf_timerlow); + *tsf_h_ptr = R_REG(®s->tsf_timerhigh); + + return; +} + +static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) +{ + d11regs_t *regs; + u32 w, val; + struct wiphy *wiphy = wlc_hw->wlc->wiphy; + + BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); + + regs = wlc_hw->regs; + + /* Validate dchip register access */ + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + w = R_REG(®s->objdata); + + /* Can we write and read back a 32bit register? */ + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0xaa5555aa); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0xaa5555aa) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0xaa5555aa\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, (u32) 0x55aaaa55); + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + val = R_REG(®s->objdata); + if (val != (u32) 0x55aaaa55) { + wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " + "expected 0x55aaaa55\n", wlc_hw->unit, val); + return false; + } + + W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); + (void)R_REG(®s->objaddr); + W_REG(®s->objdata, w); + + /* clear CFPStart */ + W_REG(®s->tsf_cfpstart, 0); + + w = R_REG(®s->maccontrol); + if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && + (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { + wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " + "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, + (MCTL_IHR_EN | MCTL_WAKE), + (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); + return false; + } + + return true; +} + +#define PHYPLL_WAIT_US 100000 + +void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) +{ + d11regs_t *regs; + u32 tmp; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + tmp = 0; + regs = wlc_hw->regs; + + if (on) { + if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | + CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), + PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & (CCS_ERSRC_AVAIL_HT)) != + (CCS_ERSRC_AVAIL_HT)) { + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" + " PLL failed\n", __func__); + } + } else { + OR_REG(®s->clk_ctl_st, + (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); + SPINWAIT((R_REG(®s->clk_ctl_st) & + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL)) != + (CCS_ERSRC_AVAIL_D11PLL | + CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); + + tmp = R_REG(®s->clk_ctl_st); + if ((tmp & + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) + != + (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) { + wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " + "PHY PLL failed\n", __func__); + } + } + } else { + /* Since the PLL may be shared, other cores can still be requesting it; + * so we'll deassert the request but not wait for status to comply. + */ + AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); + tmp = R_REG(®s->clk_ctl_st); + } +} + +void wlc_coredisable(struct wlc_hw_info *wlc_hw) +{ + bool dev_gone; + + BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); + + dev_gone = DEVICEREMOVED(wlc_hw->wlc); + + if (dev_gone) + return; + + if (wlc_hw->noreset) + return; + + /* radio off */ + wlc_phy_switch_radio(wlc_hw->band->pi, OFF); + + /* turn off analog core */ + wlc_phy_anacore(wlc_hw->band->pi, OFF); + + /* turn off PHYPLL to save power */ + wlc_bmac_core_phypll_ctl(wlc_hw, false); + + /* No need to set wlc->pub->radio_active = OFF + * because this function needs down capability and + * radio_active is designed for BCMNODOWN. + */ + + /* remove gpio controls */ + if (wlc_hw->ucode_dbgsel) + ai_gpiocontrol(wlc_hw->sih, ~0, 0, GPIO_DRV_PRIORITY); + + wlc_hw->clk = false; + ai_core_disable(wlc_hw->sih, 0); + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); +} + +/* power both the pll and external oscillator on/off */ +static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) +{ + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); + + /* dont power down if plldown is false or we must poll hw radio disable */ + if (!want && wlc_hw->pllreq) + return; + + if (wlc_hw->sih) + ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); + + wlc_hw->sbclk = want; + if (!wlc_hw->sbclk) { + wlc_hw->clk = false; + if (wlc_hw->band && wlc_hw->band->pi) + wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); + } +} + +static void wlc_flushqueues(struct wlc_info *wlc) +{ + struct wlc_hw_info *wlc_hw = wlc->hw; + uint i; + + wlc->txpend16165war = 0; + + /* free any posted tx packets */ + for (i = 0; i < NFIFO; i++) + if (wlc_hw->di[i]) { + dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); + TXPKTPENDCLR(wlc, i); + BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); + } + + /* free any posted rx packets */ + dma_rxreclaim(wlc_hw->di[RX_FIFO]); +} + +u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset) +{ + return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); +} + +void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v) +{ + wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); +} + +static u16 +wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) +{ + d11regs_t *regs = wlc_hw->regs; + volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; + volatile u16 *objdata_hi = objdata_lo + 1; + u16 v; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) { + v = R_REG(objdata_hi); + } else { + v = R_REG(objdata_lo); + } + + return v; +} + +static void +wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) +{ + d11regs_t *regs = wlc_hw->regs; + volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; + volatile u16 *objdata_hi = objdata_lo + 1; + + W_REG(®s->objaddr, sel | (offset >> 2)); + (void)R_REG(®s->objaddr); + if (offset & 2) { + W_REG(objdata_hi, v); + } else { + W_REG(objdata_lo, v); + } +} + +/* Copy a buffer to shared memory of specified type . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, + int len, u32 sel) +{ + u16 v; + const u8 *p = (const u8 *)buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = p[i] | (p[i + 1] << 8); + wlc_bmac_write_objmem(wlc_hw, offset + i, v, sel); + } +} + +/* Copy a piece of shared memory of specified type to a buffer . + * SHM 'offset' needs to be an even address and + * Buffer length 'len' must be an even number of bytes + * 'sel' selects the type of memory + */ +void +wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, + int len, u32 sel) +{ + u16 v; + u8 *p = (u8 *) buf; + int i; + + if (len <= 0 || (offset & 1) || (len & 1)) + return; + + for (i = 0; i < len; i += 2) { + v = wlc_bmac_read_objmem(wlc_hw, offset + i, sel); + p[i] = v & 0xFF; + p[i + 1] = (v >> 8) & 0xFF; + } +} + +void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) +{ + BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", + wlc_hw->vars_size); + + *buf = wlc_hw->vars; + *len = wlc_hw->vars_size; +} + +void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) +{ + wlc_hw->SRL = SRL; + wlc_hw->LRL = LRL; + + /* write retry limit to SCR, shouldn't need to suspend */ + if (wlc_hw->up) { + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); + W_REG(&wlc_hw->regs->objaddr, + OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); + (void)R_REG(&wlc_hw->regs->objaddr); + W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); + } +} + +void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) +{ + if (set) { + if (mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolset(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (!wlc_hw->sbclk) { + wlc_bmac_xtal(wlc_hw, ON); + } + } + } else { + if (!mboolisset(wlc_hw->pllreq, req_bit)) + return; + + mboolclr(wlc_hw->pllreq, req_bit); + + if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (wlc_hw->sbclk) { + wlc_bmac_xtal(wlc_hw, OFF); + } + } + } + + return; +} + +u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) +{ + u16 table_ptr; + u8 phy_rate, index; + + /* get the phy specific rate encoding for the PLCP SIGNAL field */ + /* XXX4321 fixup needed ? */ + if (IS_OFDM(rate)) + table_ptr = M_RT_DIRMAP_A; + else + table_ptr = M_RT_DIRMAP_B; + + /* for a given rate, the LS-nibble of the PLCP SIGNAL field is + * the index into the rate table. + */ + phy_rate = rate_info[rate] & WLC_RATE_MASK; + index = phy_rate & 0xf; + + /* Find the SHM pointer to the rate table entry by looking in the + * Direct-map Table + */ + return 2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)); +} + +void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail) +{ + wlc_hw->antsel_avail = antsel_avail; +} diff --git a/drivers/staging/brcm80211/brcmsmac/bmac.h b/drivers/staging/brcm80211/brcmsmac/bmac.h new file mode 100644 index 0000000..af8af69 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bmac.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#ifndef _BRCM_BOTTOM_MAC_H_ +#define _BRCM_BOTTOM_MAC_H_ + +/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info) + driver */ +typedef struct wlc_bmac_state { + u32 machwcap; /* mac hw capibility */ + u32 preamble_ovr; /* preamble override */ +} wlc_bmac_state_t; + +enum { + IOV_BMAC_DIAG, + IOV_BMAC_SBGPIOTIMERVAL, + IOV_BMAC_SBGPIOOUT, + IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ + IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ + IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ + IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ + IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ + IOV_BMAC_OTPDUMP, + IOV_BMAC_OTPSTAT, + IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ + IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ + IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ + IOV_BMAC_PCIELCREG, /* PCIE LCREG */ + IOV_BMAC_SBGPIOTIMERMASK, + IOV_BMAC_RFDISABLEDLY, + IOV_BMAC_PCIEREG, /* PCIE REG */ + IOV_BMAC_PCICFGREG, /* PCI Config register */ + IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ + IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ + IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ + IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ + IOV_BMAC_DMALPBK, + IOV_BMAC_CCREG, + IOV_BMAC_COREREG, + IOV_BMAC_SDCIS, + IOV_BMAC_SDIO_DRIVE, + IOV_BMAC_OTPW, + IOV_BMAC_NVOTPW, + IOV_BMAC_SROM, + IOV_BMAC_SRCRC, + IOV_BMAC_CIS_SOURCE, + IOV_BMAC_CISVAR, + IOV_BMAC_OTPLOCK, + IOV_BMAC_OTP_CHIPID, + IOV_BMAC_CUSTOMVAR1, + IOV_BMAC_BOARDFLAGS, + IOV_BMAC_BOARDFLAGS2, + IOV_BMAC_WPSLED, + IOV_BMAC_NVRAM_SOURCE, + IOV_BMAC_OTP_RAW_READ, + IOV_BMAC_LAST +}; + +extern int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam); +extern int wlc_bmac_detach(struct wlc_info *wlc); +extern void wlc_bmac_watchdog(void *arg); + +/* up/down, reset, clk */ +extern void wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, + uint offset, const void *buf, int len, + u32 sel); +extern void wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, + void *buf, int len, u32 sel); +#define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len) \ + wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) +#define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len) \ + wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) + +extern void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on); +extern void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk); +extern void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk); +extern void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags); +extern void wlc_bmac_reset(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, + bool mute); +extern int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw); +extern int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode); + +/* chanspec, ucode interface */ +extern void wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, + chanspec_t chanspec, + bool mute, struct txpwr_limits *txpwr); + +extern int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, + uint *blocks); +extern void wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, + u16 val, int bands); +extern void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val); +extern u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands); +extern void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant); +extern u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, + u8 antsel_type); +extern int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, + wlc_bmac_state_t *state); +extern void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v); +extern u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset); +extern void wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, + int len, void *buf); +extern void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, + uint *len); + +extern void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, + u8 *ea); + +extern bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw); +extern void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot); +extern void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode); + +extern void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw); + +extern void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, + u32 override_bit); +extern void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, + u32 override_bit); + +extern void wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, + int match_reg_offset, + const u8 *addr); +extern void wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, + void *bcn, int len, bool both); + +extern void wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr); +extern void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin); +extern void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax); + +extern void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, + u16 LRL); + +extern void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw); + + +/* API for BMAC driver (e.g. wlc_phy.c etc) */ + +extern void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw); +extern void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, + mbool req_bit); +extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); +extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); +extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); + +#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c b/drivers/staging/brcm80211/brcmsmac/bottom_mac.c deleted file mode 100644 index 8a99bb1..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bottom_mac.c +++ /dev/null @@ -1,3597 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include "srom.h" -#include "otp.h" -#include -#include -#include -#include "dma.h" - -#include "types.h" -#include "pmu.h" -#include "d11.h" -#include "rate.h" -#include "scb.h" -#include "pub.h" -#include "phy/phy_hal.h" -#include "channel.h" -#include "main.h" -#include "ucode_loader.h" -#include "antsel.h" -#include "alloc.h" -#include "bottom_mac.h" -#include "mac80211_if.h" - -#define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ - -#define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */ -#define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us, default */ -#define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us, default */ -#define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */ - -#define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ - -#ifndef BMAC_DUP_TO_REMOVE -#define WLC_RM_WAIT_TX_SUSPEND 4 /* Wait Tx Suspend */ - -#define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ - -#endif /* BMAC_DUP_TO_REMOVE */ - -#define DMAREG(wlc_hw, direction, fifonum) \ - ((direction == DMA_TX) ? \ - (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ - (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) - -#define APHY_SLOT_TIME 9 -#define BPHY_SLOT_TIME 20 - -/* - * The following table lists the buffer memory allocated to xmt fifos in HW. - * the size is in units of 256bytes(one block), total size is HW dependent - * ucode has default fifo partition, sw can overwrite if necessary - * - * This is documented in twiki under the topic UcodeTxFifo. Please ensure - * the twiki is updated before making changes. - */ - -#define XMTFIFOTBL_STARTREV 20 /* Starting corerev for the fifo size table */ - -static u16 xmtfifo_sz[][NFIFO] = { - {20, 192, 192, 21, 17, 5}, /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ - {9, 58, 22, 14, 14, 5}, /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ - {20, 192, 192, 21, 17, 5}, /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ - {20, 192, 192, 21, 17, 5}, /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ - {9, 58, 22, 14, 14, 5}, /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ -}; - -static void wlc_clkctl_clk(struct wlc_hw_info *wlc, uint mode); -static void wlc_coreinit(struct wlc_info *wlc); - -/* used by wlc_wakeucode_init() */ -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, - const struct d11init *inits); -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], - const uint nbytes); -static void wlc_ucode_download(struct wlc_hw_info *wlc); -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); - -/* used by wlc_dpc() */ -static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, - u32 s2); -static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); -static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); - -/* used by wlc_down() */ -static void wlc_flushqueues(struct wlc_info *wlc); - -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs); -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw); -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, - uint tx_fifo); -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo); -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo); - -/* Low Level Prototypes */ -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want); -static u16 wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, - u32 sel); -static void wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, - u16 v, u32 sel); -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk); -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme); -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_bsinit(struct wlc_hw_info *wlc_hw); -static bool wlc_validboardtype(struct wlc_hw_info *wlc); -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw); -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw); -static void wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init); -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool want, mbool flags); -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw); -static u32 wlc_wlintrsoff(struct wlc_info *wlc); -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask); -static void wlc_gpio_init(struct wlc_info *wlc); -static void wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_bmac_bsinit(struct wlc_info *wlc, chanspec_t chanspec); -static u32 wlc_setband_inact(struct wlc_info *wlc, uint bandunit); -static void wlc_bmac_setband(struct wlc_hw_info *wlc_hw, uint bandunit, - chanspec_t chanspec); -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, - bool shortslot); -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw); -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, - u8 rate); - -/* === Low Level functions === */ - -void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) -{ - wlc_hw->shortslot = shortslot; - - if (BAND_2G(wlc_bmac_bandtype(wlc_hw)) && wlc_hw->up) { - wlc_suspend_mac_and_wait(wlc_hw->wlc); - wlc_bmac_update_slot_timing(wlc_hw, shortslot); - wlc_enable_mac(wlc_hw->wlc); - } -} - -/* - * Update the slot timing for standard 11b/g (20us slots) - * or shortslot 11g (9us slots) - * The PSM needs to be suspended for this call. - */ -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, - bool shortslot) -{ - d11regs_t *regs; - - regs = wlc_hw->regs; - - if (shortslot) { - /* 11g short slot: 11a timing */ - W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); - } else { - /* 11g long slot: 11b timing */ - W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); - } -} - -static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) -{ - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - /* init microcode host flags */ - wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs); - - /* do band-specific ucode IHR, SHM, and SCR inits */ - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11n0bsinitvals16); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } - } else { - if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0bsinitvals24); - } else - wiphy_err(wiphy, "%s: wl%d: unsupported phy in" - " core rev %d\n", __func__, - wlc_hw->unit, wlc_hw->corerev); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - } -} - -/* switch to new band but leave it inactive */ -static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintmask; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); - - /* disable interrupts */ - macintmask = brcms_intrsoff(wlc->wl); - - /* radio off */ - wlc_phy_switch_radio(wlc_hw->band->pi, OFF); - - wlc_bmac_core_phy_clk(wlc_hw, OFF); - - wlc_setxband(wlc_hw, bandunit); - - return macintmask; -} - -/* Process received frames */ -/* - * Return true if more frames need to be processed. false otherwise. - * Param 'bound' indicates max. # frames to process before break out. - */ -static bool -wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) -{ - struct sk_buff *p; - struct sk_buff *head = NULL; - struct sk_buff *tail = NULL; - uint n = 0; - uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; - wlc_d11rxhdr_t *wlc_rxhdr = NULL; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - /* gather received frames */ - while ((p = dma_rx(wlc_hw->di[fifo]))) { - - if (!tail) - head = tail = p; - else { - tail->prev = p; - tail = p; - } - - /* !give others some time to run! */ - if (++n >= bound_limit) - break; - } - - /* post more rbufs */ - dma_rxfill(wlc_hw->di[fifo]); - - /* process each frame */ - while ((p = head) != NULL) { - head = head->prev; - p->prev = NULL; - - wlc_rxhdr = (wlc_d11rxhdr_t *) p->data; - - /* compute the RSSI from d11rxhdr and record it in wlc_rxd11hr */ - wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); - - wlc_recv(wlc_hw->wlc, p); - } - - return n >= bound_limit; -} - -/* second-level interrupt processing - * Return true if another dpc needs to be re-scheduled. false otherwise. - * Param 'bounded' indicates if applicable loops should be bounded. - */ -bool wlc_dpc(struct wlc_info *wlc, bool bounded) -{ - u32 macintstatus; - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - bool fatal = false; - struct wiphy *wiphy = wlc->wiphy; - - if (DEVICEREMOVED(wlc)) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return false; - } - - /* grab and clear the saved software intstatus bits */ - macintstatus = wlc->macintstatus; - wlc->macintstatus = 0; - - BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", - wlc_hw->unit, macintstatus); - - WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ - - /* BCN template is available */ - /* ZZZ: Use AP_ACTIVE ? */ - if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) - && (macintstatus & MI_BCNTPL)) { - wlc_update_beacon(wlc); - } - - /* PMQ entry addition */ - if (macintstatus & MI_PMQ) { - } - - /* tx status */ - if (macintstatus & MI_TFS) { - if (wlc_bmac_txstatus(wlc->hw, bounded, &fatal)) - wlc->macintstatus |= MI_TFS; - if (fatal) { - wiphy_err(wiphy, "MI_TFS: fatal\n"); - goto fatal; - } - } - - if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) - wlc_tbtt(wlc, regs); - - /* ATIM window end */ - if (macintstatus & MI_ATIMWINEND) { - BCMMSG(wlc->wiphy, "end of ATIM window\n"); - OR_REG(®s->maccommand, wlc->qvalid); - wlc->qvalid = 0; - } - - /* received data or control frame, MI_DMAINT is indication of RX_FIFO interrupt */ - if (macintstatus & MI_DMAINT) { - if (wlc_bmac_recv(wlc_hw, RX_FIFO, bounded)) { - wlc->macintstatus |= MI_DMAINT; - } - } - - /* TX FIFO suspend/flush completion */ - if (macintstatus & MI_TXSTOP) { - if (wlc_bmac_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO)) { - /* wiphy_err(wiphy, "dpc: fifo_suspend_comlete\n"); */ - } - } - - /* noise sample collected */ - if (macintstatus & MI_BG_NOISE) { - wlc_phy_noise_sample_intr(wlc_hw->band->pi); - } - - if (macintstatus & MI_GP0) { - wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " - "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); - - printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", - __func__, wlc_hw->sih->chip, - wlc_hw->sih->chiprev); - /* big hammer */ - brcms_init(wlc->wl); - } - - /* gptimer timeout */ - if (macintstatus & MI_TO) { - W_REG(®s->gptimer, 0); - } - - if (macintstatus & MI_RFDISABLE) { - BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" - " RF Disable Input\n", wlc_hw->unit); - brcms_rfkill_set_hw_state(wlc->wl); - } - - /* send any enq'd tx packets. Just makes sure to jump start tx */ - if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); - - /* it isn't done and needs to be resched if macintstatus is non-zero */ - return wlc->macintstatus != 0; - - fatal: - brcms_init(wlc->wl); - return wlc->macintstatus != 0; -} - -/* common low-level watchdog code */ -void wlc_bmac_watchdog(void *arg) -{ - struct wlc_info *wlc = (struct wlc_info *) arg; - struct wlc_hw_info *wlc_hw = wlc->hw; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return; - - /* increment second count */ - wlc_hw->now++; - - /* Check for FIFO error interrupts */ - wlc_bmac_fifoerrors(wlc_hw); - - /* make sure RX dma has buffers */ - dma_rxfill(wlc->hw->di[RX_FIFO]); - - wlc_phy_watchdog(wlc_hw->band->pi); -} - -void -wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute, struct txpwr_limits *txpwr) -{ - uint bandunit; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); - - wlc_hw->chanspec = chanspec; - - /* Switch bands if necessary */ - if (NBANDS_HW(wlc_hw) > 1) { - bandunit = CHSPEC_WLCBANDUNIT(chanspec); - if (wlc_hw->band->bandunit != bandunit) { - /* wlc_bmac_setband disables other bandunit, - * use light band switch if not up yet - */ - if (wlc_hw->up) { - wlc_phy_chanspec_radio_set(wlc_hw-> - bandstate[bandunit]-> - pi, chanspec); - wlc_bmac_setband(wlc_hw, bandunit, chanspec); - } else { - wlc_setxband(wlc_hw, bandunit); - } - } - } - - wlc_phy_initcal_enable(wlc_hw->band->pi, !mute); - - if (!wlc_hw->up) { - if (wlc_hw->clk) - wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, - chanspec); - wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); - } else { - wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); - wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); - - /* Update muting of the channel */ - wlc_bmac_mute(wlc_hw, mute, 0); - } -} - -int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, wlc_bmac_state_t *state) -{ - state->machwcap = wlc_hw->machwcap; - - return 0; -} - -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) -{ - uint i; - char name[8]; - /* ucode host flag 2 needed for pio mode, independent of band and fifo */ - u16 pio_mhf2 = 0; - struct wlc_hw_info *wlc_hw = wlc->hw; - uint unit = wlc_hw->unit; - wlc_tunables_t *tune = wlc->pub->tunables; - struct wiphy *wiphy = wlc->wiphy; - - /* name and offsets for dma_attach */ - snprintf(name, sizeof(name), "wl%d", unit); - - if (wlc_hw->di[0] == 0) { /* Init FIFOs */ - uint addrwidth; - int dma_attach_err = 0; - /* Find out the DMA addressing capability and let OS know - * All the channels within one DMA core have 'common-minimum' same - * capability - */ - addrwidth = - dma_addrwidth(wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 0)); - - if (!wl_alloc_dma_resources(wlc_hw->wlc->wl, addrwidth)) { - wiphy_err(wiphy, "wl%d: wlc_attach: alloc_dma_" - "resources failed\n", unit); - return false; - } - - /* - * FIFO 0 - * TX: TX_AC_BK_FIFO (TX AC Background data packets) - * RX: RX_FIFO (RX data packets) - */ - wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, - (wme ? DMAREG(wlc_hw, DMA_TX, 0) : - NULL), DMAREG(wlc_hw, DMA_RX, 0), - (wme ? tune->ntxd : 0), tune->nrxd, - tune->rxbufsz, -1, tune->nrxbufpost, - WL_HWRXOFF, &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[0]); - - /* - * FIFO 1 - * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) - * (legacy) TX_DATA_FIFO (TX data packets) - * RX: UNUSED - */ - wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 1), NULL, - tune->ntxd, 0, 0, -1, 0, 0, - &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[1]); - - /* - * FIFO 2 - * TX: TX_AC_VI_FIFO (TX AC Video data packets) - * RX: UNUSED - */ - wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 2), NULL, - tune->ntxd, 0, 0, -1, 0, 0, - &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[2]); - /* - * FIFO 3 - * TX: TX_AC_VO_FIFO (TX AC Voice data packets) - * (legacy) TX_CTL_FIFO (TX control & mgmt packets) - */ - wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, - DMAREG(wlc_hw, DMA_TX, 3), - NULL, tune->ntxd, 0, 0, -1, - 0, 0, &brcm_msg_level); - dma_attach_err |= (NULL == wlc_hw->di[3]); -/* Cleaner to leave this as if with AP defined */ - - if (dma_attach_err) { - wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" - "\n", unit); - return false; - } - - /* get pointer to dma engine tx flow control variable */ - for (i = 0; i < NFIFO; i++) - if (wlc_hw->di[i]) - wlc_hw->txavail[i] = - (uint *) dma_getvar(wlc_hw->di[i], - "&txavail"); - } - - /* initial ucode host flags */ - wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); - - return true; -} - -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) -{ - uint j; - - for (j = 0; j < NFIFO; j++) { - if (wlc_hw->di[j]) { - dma_detach(wlc_hw->di[j]); - wlc_hw->di[j] = NULL; - } - } -} - -/* low level attach - * run backplane attach, init nvram - * run phy attach - * initialize software state for each core and band - * put the whole chip in reset(driver down state), no clock - */ -int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam) -{ - struct wlc_hw_info *wlc_hw; - d11regs_t *regs; - char *macaddr = NULL; - char *vars; - uint err = 0; - uint j; - bool wme = false; - shared_phy_params_t sha_params; - struct wiphy *wiphy = wlc->wiphy; - - BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, - device); - - wme = true; - - wlc_hw = wlc->hw; - wlc_hw->wlc = wlc; - wlc_hw->unit = unit; - wlc_hw->band = wlc_hw->bandstate[0]; - wlc_hw->_piomode = piomode; - - /* populate struct wlc_hw_info with default values */ - wlc_bmac_info_init(wlc_hw); - - /* - * Do the hardware portion of the attach. - * Also initialize software state that depends on the particular hardware - * we are running. - */ - wlc_hw->sih = ai_attach((uint) device, regsva, bustype, btparam, - &wlc_hw->vars, &wlc_hw->vars_size); - if (wlc_hw->sih == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: si_attach failed\n", - unit); - err = 11; - goto fail; - } - vars = wlc_hw->vars; - - /* - * Get vendid/devid nvram overwrites, which could be different - * than those the BIOS recognizes for devices on PCMCIA_BUS, - * SDIO_BUS, and SROMless devices on PCI_BUS. - */ -#ifdef BCMBUSTYPE - bustype = BCMBUSTYPE; -#endif - if (bustype != SI_BUS) { - char *var; - - var = getvar(vars, "vendid"); - if (var) { - vendor = (u16) simple_strtoul(var, NULL, 0); - wiphy_err(wiphy, "Overriding vendor id = 0x%x\n", - vendor); - } - var = getvar(vars, "devid"); - if (var) { - u16 devid = (u16) simple_strtoul(var, NULL, 0); - if (devid != 0xffff) { - device = devid; - wiphy_err(wiphy, "Overriding device id = 0x%x" - "\n", device); - } - } - - /* verify again the device is supported */ - if (!wlc_chipmatch(vendor, device)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported " - "vendor/device (0x%x/0x%x)\n", - unit, vendor, device); - err = 12; - goto fail; - } - } - - wlc_hw->vendorid = vendor; - wlc_hw->deviceid = device; - - /* set bar0 window to point at D11 core */ - wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); - wlc_hw->corerev = ai_corerev(wlc_hw->sih); - - regs = wlc_hw->regs; - - wlc->regs = wlc_hw->regs; - - /* validate chip, chiprev and corerev */ - if (!wlc_isgoodchip(wlc_hw)) { - err = 13; - goto fail; - } - - /* initialize power control registers */ - ai_clkctl_init(wlc_hw->sih); - - /* request fastclock and force fastclock for the rest of attach - * bring the d11 core out of reset. - * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk is still false; - * But it will be called again inside wlc_corereset, after d11 is out of reset. - */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - if (!wlc_bmac_validate_chip_access(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: validate_chip_access " - "failed\n", unit); - err = 14; - goto fail; - } - - /* get the board rev, used just below */ - j = getintvar(vars, "boardrev"); - /* promote srom boardrev of 0xFF to 1 */ - if (j == BOARDREV_PROMOTABLE) - j = BOARDREV_PROMOTED; - wlc_hw->boardrev = (u16) j; - if (!wlc_validboardtype(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported Broadcom " - "board type (0x%x)" " or revision level (0x%x)\n", - unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); - err = 15; - goto fail; - } - wlc_hw->sromrev = (u8) getintvar(vars, "sromrev"); - wlc_hw->boardflags = (u32) getintvar(vars, "boardflags"); - wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); - - if (wlc_hw->boardflags & BFL_NOPLLDOWN) - wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED); - - if ((wlc_hw->sih->bustype == PCI_BUS) - && (ai_pci_war16165(wlc_hw->sih))) - wlc->war16165 = true; - - /* check device id(srom, nvram etc.) to set bands */ - if (wlc_hw->deviceid == BCM43224_D11N_ID || - wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { - /* Dualband boards */ - wlc_hw->_nbands = 2; - } else - wlc_hw->_nbands = 1; - - if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) - wlc_hw->_nbands = 1; - - /* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the - * init of these values - */ - wlc->vendorid = wlc_hw->vendorid; - wlc->deviceid = wlc_hw->deviceid; - wlc->pub->sih = wlc_hw->sih; - wlc->pub->corerev = wlc_hw->corerev; - wlc->pub->sromrev = wlc_hw->sromrev; - wlc->pub->boardrev = wlc_hw->boardrev; - wlc->pub->boardflags = wlc_hw->boardflags; - wlc->pub->boardflags2 = wlc_hw->boardflags2; - wlc->pub->_nbands = wlc_hw->_nbands; - - wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); - - if (wlc_hw->physhim == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_shim_attach " - "failed\n", unit); - err = 25; - goto fail; - } - - /* pass all the parameters to wlc_phy_shared_attach in one struct */ - sha_params.sih = wlc_hw->sih; - sha_params.physhim = wlc_hw->physhim; - sha_params.unit = unit; - sha_params.corerev = wlc_hw->corerev; - sha_params.vars = vars; - sha_params.vid = wlc_hw->vendorid; - sha_params.did = wlc_hw->deviceid; - sha_params.chip = wlc_hw->sih->chip; - sha_params.chiprev = wlc_hw->sih->chiprev; - sha_params.chippkg = wlc_hw->sih->chippkg; - sha_params.sromrev = wlc_hw->sromrev; - sha_params.boardtype = wlc_hw->sih->boardtype; - sha_params.boardrev = wlc_hw->boardrev; - sha_params.boardvendor = wlc_hw->sih->boardvendor; - sha_params.boardflags = wlc_hw->boardflags; - sha_params.boardflags2 = wlc_hw->boardflags2; - sha_params.bustype = wlc_hw->sih->bustype; - sha_params.buscorerev = wlc_hw->sih->buscorerev; - - /* alloc and save pointer to shared phy state area */ - wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); - if (!wlc_hw->phy_sh) { - err = 16; - goto fail; - } - - /* initialize software state for each core and band */ - for (j = 0; j < NBANDS_HW(wlc_hw); j++) { - /* - * band0 is always 2.4Ghz - * band1, if present, is 5Ghz - */ - - /* So if this is a single band 11a card, use band 1 */ - if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) - j = BAND_5G_INDEX; - - wlc_setxband(wlc_hw, j); - - wlc_hw->band->bandunit = j; - wlc_hw->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; - wlc->band->bandunit = j; - wlc->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; - wlc->core->coreidx = ai_coreidx(wlc_hw->sih); - - wlc_hw->machwcap = R_REG(®s->machwcap); - wlc_hw->machwcap_backup = wlc_hw->machwcap; - - /* init tx fifo size */ - wlc_hw->xmtfifo_sz = - xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; - - /* Get a phy for this band */ - wlc_hw->band->pi = wlc_phy_attach(wlc_hw->phy_sh, - (void *)regs, wlc_bmac_bandtype(wlc_hw), vars, - wlc->wiphy); - if (wlc_hw->band->pi == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_" - "attach failed\n", unit); - err = 17; - goto fail; - } - - wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); - - wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, - &wlc_hw->band->phyrev, - &wlc_hw->band->radioid, - &wlc_hw->band->radiorev); - wlc_hw->band->abgphy_encore = - wlc_phy_get_encore(wlc_hw->band->pi); - wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); - wlc_hw->band->core_flags = - wlc_phy_get_coreflags(wlc_hw->band->pi); - - /* verify good phy_type & supported phy revision */ - if (WLCISNPHY(wlc_hw->band)) { - if (NCONF_HAS(wlc_hw->band->phyrev)) - goto good_phy; - else - goto bad_phy; - } else if (WLCISLCNPHY(wlc_hw->band)) { - if (LCNCONF_HAS(wlc_hw->band->phyrev)) - goto good_phy; - else - goto bad_phy; - } else { - bad_phy: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: unsupported " - "phy type/rev (%d/%d)\n", unit, - wlc_hw->band->phytype, wlc_hw->band->phyrev); - err = 18; - goto fail; - } - - good_phy: - /* BMAC_NOTE: wlc->band->pi should not be set below and should be done in the - * high level attach. However we can not make that change until all low level access - * is changed to wlc_hw->band->pi. Instead do the wlc->band->pi init below, keeping - * wlc_hw->band->pi as well for incremental update of low level fns, and cut over - * low only init when all fns updated. - */ - wlc->band->pi = wlc_hw->band->pi; - wlc->band->phytype = wlc_hw->band->phytype; - wlc->band->phyrev = wlc_hw->band->phyrev; - wlc->band->radioid = wlc_hw->band->radioid; - wlc->band->radiorev = wlc_hw->band->radiorev; - - /* default contention windows size limits */ - wlc_hw->band->CWmin = APHY_CWMIN; - wlc_hw->band->CWmax = PHY_CWMAX; - - if (!wlc_bmac_attach_dmapio(wlc, j, wme)) { - err = 19; - goto fail; - } - } - - /* disable core to match driver "down" state */ - wlc_coredisable(wlc_hw); - - /* Match driver "down" state */ - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - - /* register sb interrupt callback functions */ - ai_register_intr_callback(wlc_hw->sih, (void *)wlc_wlintrsoff, - (void *)wlc_wlintrsrestore, NULL, wlc); - - /* turn off pll and xtal to match driver "down" state */ - wlc_bmac_xtal(wlc_hw, OFF); - - /* ********************************************************************* - * The hardware is in the DOWN state at this point. D11 core - * or cores are in reset with clocks off, and the board PLLs - * are off if possible. - * - * Beyond this point, wlc->sbclk == false and chip registers - * should not be touched. - ********************************************************************* - */ - - /* init etheraddr state variables */ - macaddr = wlc_get_macaddr(wlc_hw); - if (macaddr == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: macaddr not found\n", - unit); - err = 21; - goto fail; - } - brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); - if (is_broadcast_ether_addr(wlc_hw->etheraddr) || - is_zero_ether_addr(wlc_hw->etheraddr)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", - unit, macaddr); - err = 22; - goto fail; - } - - BCMMSG(wlc->wiphy, - "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", - wlc_hw->deviceid, wlc_hw->_nbands, - wlc_hw->sih->boardtype, macaddr); - - return err; - - fail: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: failed with err %d\n", unit, - err); - return err; -} - -/* - * Initialize wlc_info default values ... - * may get overrides later in this function - * BMAC_NOTES, move low out and resolve the dangling ones - */ -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) -{ - struct wlc_info *wlc = wlc_hw->wlc; - - /* set default sw macintmask value */ - wlc->defmacintmask = DEF_MACINTMASK; - - /* various 802.11g modes */ - wlc_hw->shortslot = false; - - wlc_hw->SFBL = RETRY_SHORT_FB; - wlc_hw->LFBL = RETRY_LONG_FB; - - /* default mac retry limits */ - wlc_hw->SRL = RETRY_SHORT_DEF; - wlc_hw->LRL = RETRY_LONG_DEF; - wlc_hw->chanspec = CH20MHZ_CHSPEC(1); -} - -/* - * low level detach - */ -int wlc_bmac_detach(struct wlc_info *wlc) -{ - uint i; - struct wlc_hwband *band; - struct wlc_hw_info *wlc_hw = wlc->hw; - int callbacks; - - callbacks = 0; - - if (wlc_hw->sih) { - /* detach interrupt sync mechanism since interrupt is disabled and per-port - * interrupt object may has been freed. this must be done before sb core switch - */ - ai_deregister_intr_callback(wlc_hw->sih); - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_sleep(wlc_hw->sih); - } - - wlc_bmac_detach_dmapio(wlc_hw); - - band = wlc_hw->band; - for (i = 0; i < NBANDS_HW(wlc_hw); i++) { - if (band->pi) { - /* Detach this band's phy */ - wlc_phy_detach(band->pi); - band->pi = NULL; - } - band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; - } - - /* Free shared phy state */ - wlc_phy_shared_detach(wlc_hw->phy_sh); - - wlc_phy_shim_detach(wlc_hw->physhim); - - /* free vars */ - kfree(wlc_hw->vars); - wlc_hw->vars = NULL; - - if (wlc_hw->sih) { - ai_detach(wlc_hw->sih); - wlc_hw->sih = NULL; - } - - return callbacks; - -} - -void wlc_bmac_reset(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* reset the core */ - if (!DEVICEREMOVED(wlc_hw->wlc)) - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - /* purge the dma rings */ - wlc_flushqueues(wlc_hw->wlc); - - wlc_reset_bmac_done(wlc_hw->wlc); -} - -void -wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute) { - u32 macintmask; - bool fastclk; - struct wlc_info *wlc = wlc_hw->wlc; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* disable interrupts */ - macintmask = brcms_intrsoff(wlc->wl); - - /* set up the specified band and chanspec */ - wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); - wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); - - /* do one-time phy inits and calibration */ - wlc_phy_cal_init(wlc_hw->band->pi); - - /* core-specific initialization */ - wlc_coreinit(wlc); - - /* suspend the tx fifos and mute the phy for preism cac time */ - if (mute) - wlc_bmac_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); - - /* band-specific inits */ - wlc_bmac_bsinit(wlc, chanspec); - - /* restore macintmask */ - brcms_intrsrestore(wlc->wl, macintmask); - - /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended - * and wlc_enable_mac() will clear this override bit. - */ - mboolset(wlc_hw->wake_override, WLC_WAKE_OVERRIDE_MACSUSPEND); - - /* - * initialize mac_suspend_depth to 1 to match ucode initial suspended state - */ - wlc_hw->mac_suspend_depth = 1; - - /* restore the clk */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) -{ - uint coremask; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* - * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). - */ - wlc_bmac_xtal(wlc_hw, ON); - ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* - * Configure pci/pcmcia here instead of in wlc_attach() - * to allow mfg hotswap: down, hotswap (chip power cycle), up. - */ - coremask = (1 << wlc_hw->wlc->core->coreidx); - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_setup(wlc_hw->sih, coremask); - - /* - * Need to read the hwradio status here to cover the case where the system - * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. - */ - if (wlc_bmac_radio_read_hwdisabled(wlc_hw)) { - /* put SB PCI in down state again */ - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); - return -ENOMEDIUM; - } - - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_up(wlc_hw->sih); - - /* reset the d11 core */ - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); - - return 0; -} - -int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - wlc_hw->up = true; - wlc_phy_hw_state_upd(wlc_hw->band->pi, true); - - /* FULLY enable dynamic power control and d11 core interrupt */ - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); - brcms_intrson(wlc_hw->wlc->wl); - return 0; -} - -int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) -{ - bool dev_gone; - uint callbacks = 0; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return callbacks; - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - /* disable interrupts */ - if (dev_gone) - wlc_hw->wlc->macintmask = 0; - else { - /* now disable interrupts */ - brcms_intrsoff(wlc_hw->wlc->wl); - - /* ensure we're running on the pll clock again */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); - } - /* down phy at the last of this stage */ - callbacks += wlc_phy_down(wlc_hw->band->pi); - - return callbacks; -} - -int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) -{ - uint callbacks = 0; - bool dev_gone; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (!wlc_hw->up) - return callbacks; - - wlc_hw->up = false; - wlc_phy_hw_state_upd(wlc_hw->band->pi, false); - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - if (dev_gone) { - wlc_hw->sbclk = false; - wlc_hw->clk = false; - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); - - /* reclaim any posted packets */ - wlc_flushqueues(wlc_hw->wlc); - } else { - - /* Reset and disable the core */ - if (ai_iscoreup(wlc_hw->sih)) { - if (R_REG(&wlc_hw->regs->maccontrol) & - MCTL_EN_MAC) - wlc_suspend_mac_and_wait(wlc_hw->wlc); - callbacks += brcms_reset(wlc_hw->wlc->wl); - wlc_coredisable(wlc_hw); - } - - /* turn off primary xtal and pll */ - if (!wlc_hw->noreset) { - if (wlc_hw->sih->bustype == PCI_BUS) - ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); - } - } - - return callbacks; -} - -void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw) -{ - /* delay before first read of ucode state */ - udelay(40); - - /* wait until ucode is no longer asleep */ - SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) == - DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); -} - -void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea) -{ - memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); -} - -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw) -{ - return wlc_hw->band->bandtype; -} - -/* control chip clock to save power, enable dynamic clock or force fast clock */ -static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) -{ - if (PMUCTL_ENAB(wlc_hw->sih)) { - /* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane, - * but mac core will still run on ALP(not HT) when it enters powersave mode, - * which means the FCA bit may not be set. - * should wakeup mac if driver wants it to run on HT. - */ - - if (wlc_hw->clk) { - if (mode == CLK_FAST) { - OR_REG(&wlc_hw->regs->clk_ctl_st, - CCS_FORCEHT); - - udelay(64); - - SPINWAIT(((R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL) == 0), - PMU_MAX_TRANSITION_DLY); - WARN_ON(!(R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL)); - } else { - if ((wlc_hw->sih->pmurev == 0) && - (R_REG - (&wlc_hw->regs-> - clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) - SPINWAIT(((R_REG - (&wlc_hw->regs-> - clk_ctl_st) & CCS_HTAVAIL) - == 0), - PMU_MAX_TRANSITION_DLY); - AND_REG(&wlc_hw->regs->clk_ctl_st, - ~CCS_FORCEHT); - } - } - wlc_hw->forcefastclk = (mode == CLK_FAST); - } else { - - /* old chips w/o PMU, force HT through cc, - * then use FCA to verify mac is running fast clock - */ - - wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); - - /* check fast clock is available (if core is not in reset) */ - if (wlc_hw->forcefastclk && wlc_hw->clk) - WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & - SISF_FCLKA)); - - /* keep the ucode wake bit on if forcefastclk is on - * since we do not want ucode to put us back to slow clock - * when it dozes for PM mode. - * Code below matches the wake override bit with current forcefastclk state - * Only setting bit in wake_override instead of waking ucode immediately - * since old code (wlc.c 1.4499) had this behavior. Older code set - * wlc->forcefastclk but only had the wake happen if the wakup_ucode work - * (protected by an up check) was executed just below. - */ - if (wlc_hw->forcefastclk) - mboolset(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); - else - mboolclr(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); - } -} - -/* set initial host flags value */ -static void -wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - - memset(mhfs, 0, MHFMAX * sizeof(u16)); - - mhfs[MHF2] |= mhf2_init; - - /* prohibit use of slowclock on multifunction boards */ - if (wlc_hw->boardflags & BFL_NOPLLDOWN) - mhfs[MHF1] |= MHF1_FORCEFASTCLK; - - if (WLCISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { - mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; - mhfs[MHF1] |= MHF1_IQSWAP_WAR; - } -} - -/* set or clear ucode host flag bits - * it has an optimization for no-change write - * it only writes through shared memory when the core has clock; - * pre-CLK changes should use wlc_write_mhf to get around the optimization - * - * - * bands values are: WLC_BAND_AUTO <--- Current band only - * WLC_BAND_5G <--- 5G band only - * WLC_BAND_2G <--- 2G band only - * WLC_BAND_ALL <--- All bands - */ -void -wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, - int bands) -{ - u16 save; - u16 addr[MHFMAX] = { - M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, - M_HOST_FLAGS5 - }; - struct wlc_hwband *band; - - if ((val & ~mask) || idx >= MHFMAX) - return; /* error condition */ - - switch (bands) { - /* Current band only or all bands, - * then set the band to current band - */ - case WLC_BAND_AUTO: - case WLC_BAND_ALL: - band = wlc_hw->band; - break; - case WLC_BAND_5G: - band = wlc_hw->bandstate[BAND_5G_INDEX]; - break; - case WLC_BAND_2G: - band = wlc_hw->bandstate[BAND_2G_INDEX]; - break; - default: - band = NULL; /* error condition */ - } - - if (band) { - save = band->mhfs[idx]; - band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; - - /* optimization: only write through if changed, and - * changed band is the current band - */ - if (wlc_hw->clk && (band->mhfs[idx] != save) - && (band == wlc_hw->band)) - wlc_bmac_write_shm(wlc_hw, addr[idx], - (u16) band->mhfs[idx]); - } - - if (bands == WLC_BAND_ALL) { - wlc_hw->bandstate[0]->mhfs[idx] = - (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; - wlc_hw->bandstate[1]->mhfs[idx] = - (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; - } -} - -u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) -{ - struct wlc_hwband *band; - - if (idx >= MHFMAX) - return 0; /* error condition */ - switch (bands) { - case WLC_BAND_AUTO: - band = wlc_hw->band; - break; - case WLC_BAND_5G: - band = wlc_hw->bandstate[BAND_5G_INDEX]; - break; - case WLC_BAND_2G: - band = wlc_hw->bandstate[BAND_2G_INDEX]; - break; - default: - band = NULL; /* error condition */ - } - - if (!band) - return 0; - - return band->mhfs[idx]; -} - -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) -{ - u8 idx; - u16 addr[] = { - M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, - M_HOST_FLAGS5 - }; - - for (idx = 0; idx < MHFMAX; idx++) { - wlc_bmac_write_shm(wlc_hw, addr[idx], mhfs[idx]); - } -} - -/* set the maccontrol register to desired reset state and - * initialize the sw cache of the register - */ -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw) -{ - /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ - wlc_hw->maccontrol = 0; - wlc_hw->suspended_fifos = 0; - wlc_hw->wake_override = 0; - wlc_hw->mute_override = 0; - wlc_bmac_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); -} - -/* set or clear maccontrol bits */ -void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) -{ - u32 maccontrol; - u32 new_maccontrol; - - if (val & ~mask) - return; /* error condition */ - maccontrol = wlc_hw->maccontrol; - new_maccontrol = (maccontrol & ~mask) | val; - - /* if the new maccontrol value is the same as the old, nothing to do */ - if (new_maccontrol == maccontrol) - return; - - /* something changed, cache the new value */ - wlc_hw->maccontrol = new_maccontrol; - - /* write the new values with overrides applied */ - wlc_mctrl_write(wlc_hw); -} - -/* write the software state of maccontrol and overrides to the maccontrol register */ -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) -{ - u32 maccontrol = wlc_hw->maccontrol; - - /* OR in the wake bit if overridden */ - if (wlc_hw->wake_override) - maccontrol |= MCTL_WAKE; - - /* set AP and INFRA bits for mute if needed */ - if (wlc_hw->mute_override) { - maccontrol &= ~(MCTL_AP); - maccontrol |= MCTL_INFRA; - } - - W_REG(&wlc_hw->regs->maccontrol, maccontrol); -} - -void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) -{ - if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { - mboolset(wlc_hw->wake_override, override_bit); - return; - } - - mboolset(wlc_hw->wake_override, override_bit); - - wlc_mctrl_write(wlc_hw); - wlc_bmac_wait_for_wake(wlc_hw); - - return; -} - -void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) -{ - mboolclr(wlc_hw->wake_override, override_bit); - - if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) - return; - - wlc_mctrl_write(wlc_hw); - - return; -} - -/* When driver needs ucode to stop beaconing, it has to make sure that - * MCTL_AP is clear and MCTL_INFRA is set - * Mode MCTL_AP MCTL_INFRA - * AP 1 1 - * STA 0 1 <--- This will ensure no beacons - * IBSS 0 0 - */ -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) -{ - wlc_hw->mute_override = 1; - - /* if maccontrol already has AP == 0 and INFRA == 1 without this - * override, then there is no change to write - */ - if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) - return; - - wlc_mctrl_write(wlc_hw); - - return; -} - -/* Clear the override on AP and INFRA bits */ -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) -{ - if (wlc_hw->mute_override == 0) - return; - - wlc_hw->mute_override = 0; - - /* if maccontrol already has AP == 0 and INFRA == 1 without this - * override, then there is no change to write - */ - if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) - return; - - wlc_mctrl_write(wlc_hw); -} - -/* - * Write a MAC address to the given match reg offset in the RXE match engine. - */ -void -wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, - const u8 *addr) -{ - d11regs_t *regs; - u16 mac_l; - u16 mac_m; - u16 mac_h; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: wlc_bmac_set_addrmatch\n", - wlc_hw->unit); - - regs = wlc_hw->regs; - mac_l = addr[0] | (addr[1] << 8); - mac_m = addr[2] | (addr[3] << 8); - mac_h = addr[4] | (addr[5] << 8); - - /* enter the MAC addr into the RXE match registers */ - W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); - W_REG(®s->rcm_mat_data, mac_l); - W_REG(®s->rcm_mat_data, mac_m); - W_REG(®s->rcm_mat_data, mac_h); - -} - -void -wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, - void *buf) -{ - d11regs_t *regs; - u32 word; - bool be_bit; - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - W_REG(®s->tplatewrptr, offset); - - /* if MCTL_BIGEND bit set in mac control register, - * the chip swaps data in fifo, as well as data in - * template ram - */ - be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; - - while (len > 0) { - memcpy(&word, buf, sizeof(u32)); - - if (be_bit) - word = cpu_to_be32(word); - else - word = cpu_to_le32(word); - - W_REG(®s->tplatewrdata, word); - - buf = (u8 *) buf + sizeof(u32); - len -= sizeof(u32); - } -} - -void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) -{ - wlc_hw->band->CWmin = newmin; - - W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, newmin); -} - -void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) -{ - wlc_hw->band->CWmax = newmax; - - W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, newmax); -} - -void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) -{ - bool fastclk; - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - wlc_phy_bw_state_set(wlc_hw->band->pi, bw); - - wlc_bmac_phy_reset(wlc_hw); - wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); - - /* restore the clk */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -static void -wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, int len) -{ - d11regs_t *regs = wlc_hw->regs; - - wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, - bcn); - /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); - /* mark beacon0 valid */ - OR_REG(®s->maccommand, MCMD_BCN0VLD); -} - -static void -wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, int len) -{ - d11regs_t *regs = wlc_hw->regs; - - wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, - bcn); - /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); - /* mark beacon1 valid */ - OR_REG(®s->maccommand, MCMD_BCN1VLD); -} - -/* mac is assumed to be suspended at this point */ -void -wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, void *bcn, int len, - bool both) -{ - d11regs_t *regs = wlc_hw->regs; - - if (both) { - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); - } else { - /* bcn 0 */ - if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); - /* bcn 1 */ - else if (! - (R_REG(®s->maccommand) & MCMD_BCN1VLD)) - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); - } -} - -static void WLBANDINITFN(wlc_bmac_upd_synthpu) (struct wlc_hw_info *wlc_hw) -{ - u16 v; - struct wlc_info *wlc = wlc_hw->wlc; - /* update SYNTHPU_DLY */ - - if (WLCISLCNPHY(wlc->band)) { - v = SYNTHPU_DLY_LPPHY_US; - } else if (WLCISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { - v = SYNTHPU_DLY_NPHY_US; - } else { - v = SYNTHPU_DLY_BPHY_US; - } - - wlc_bmac_write_shm(wlc_hw, M_SYNTHPU_DLY, v); -} - -/* band-specific init */ -static void -WLBANDINITFN(wlc_bmac_bsinit) (struct wlc_info *wlc, chanspec_t chanspec) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc_hw->band->bandunit); - - wlc_ucode_bsinit(wlc_hw); - - wlc_phy_init(wlc_hw->band->pi, chanspec); - - wlc_ucode_txant_set(wlc_hw); - - /* cwmin is band-specific, update hardware with value for current band */ - wlc_bmac_set_cwmin(wlc_hw, wlc_hw->band->CWmin); - wlc_bmac_set_cwmax(wlc_hw, wlc_hw->band->CWmax); - - wlc_bmac_update_slot_timing(wlc_hw, - BAND_5G(wlc_hw->band-> - bandtype) ? true : wlc_hw-> - shortslot); - - /* write phytype and phyvers */ - wlc_bmac_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); - wlc_bmac_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); - - /* initialize the txphyctl1 rate table since shmem is shared between bands */ - wlc_upd_ofdm_pctl1_table(wlc_hw); - - wlc_bmac_upd_synthpu(wlc_hw); -} - -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); - - wlc_hw->phyclk = clk; - - if (OFF == clk) { /* clear gmode bit, put phy into reset */ - - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), - (SICF_PRST | SICF_FGC)); - udelay(1); - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); - udelay(1); - - } else { /* take phy out of reset */ - - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); - udelay(1); - ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); - udelay(1); - - } -} - -/* Perform a soft reset of the PHY PLL */ -void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, 0); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 4); - udelay(1); - ai_corereg(wlc_hw->sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), 0x4, 0); - udelay(1); -} - -/* light way to turn on phy clock without reset for NPHY only - * refer to wlc_bmac_core_phy_clk for full version - */ -void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) -{ - /* support(necessary for NPHY and HYPHY) only */ - if (!WLCISNPHY(wlc_hw->band)) - return; - - if (ON == clk) - ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); - else - ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); - -} - -void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) -{ - if (ON == clk) - ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); - else - ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); -} - -void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) -{ - wlc_phy_t *pih = wlc_hw->band->pi; - u32 phy_bw_clkbits; - bool phy_in_reset = false; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - if (pih == NULL) - return; - - phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); - - /* Specific reset sequence required for NPHY rev 3 and 4 */ - if (WLCISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && - NREV_LE(wlc_hw->band->phyrev, 4)) { - /* Set the PHY bandwidth */ - ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); - - udelay(1); - - /* Perform a soft reset of the PHY PLL */ - wlc_bmac_core_phypll_reset(wlc_hw); - - /* reset the PHY */ - ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), - (SICF_PRST | SICF_PCLKE)); - phy_in_reset = true; - } else { - - ai_core_cflags(wlc_hw->sih, - (SICF_PRST | SICF_PCLKE | SICF_BWMASK), - (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); - } - - udelay(2); - wlc_bmac_core_phy_clk(wlc_hw, ON); - - if (pih) - wlc_phy_anacore(pih, ON); -} - -/* switch to and initialize new band */ -static void -WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, - chanspec_t chanspec) { - struct wlc_info *wlc = wlc_hw->wlc; - u32 macintmask; - - /* Enable the d11 core before accessing it */ - if (!ai_iscoreup(wlc_hw->sih)) { - ai_core_reset(wlc_hw->sih, 0, 0); - wlc_mctrl_reset(wlc_hw); - } - - macintmask = wlc_setband_inact(wlc, bandunit); - - if (!wlc_hw->up) - return; - - wlc_bmac_core_phy_clk(wlc_hw, ON); - - /* band-specific initializations */ - wlc_bmac_bsinit(wlc, chanspec); - - /* - * If there are any pending software interrupt bits, - * then replace these with a harmless nonzero value - * so wlc_dpc() will re-enable interrupts when done. - */ - if (wlc->macintstatus) - wlc->macintstatus = MI_DMAINT; - - /* restore macintmask */ - brcms_intrsrestore(wlc->wl, macintmask); - - /* ucode should still be suspended.. */ - WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); -} - -/* low-level band switch utility routine */ -void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - bandunit); - - wlc_hw->band = wlc_hw->bandstate[bandunit]; - - /* BMAC_NOTE: until we eliminate need for wlc->band refs in low level code */ - wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; - - /* set gmode core flag */ - if (wlc_hw->sbclk && !wlc_hw->noreset) { - ai_core_cflags(wlc_hw->sih, SICF_GMODE, - ((bandunit == 0) ? SICF_GMODE : 0)); - } -} - -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) -{ - - /* reject unsupported corerev */ - if (!VALID_COREREV(wlc_hw->corerev)) { - wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", - wlc_hw->corerev); - return false; - } - - return true; -} - -static bool wlc_validboardtype(struct wlc_hw_info *wlc_hw) -{ - bool goodboard = true; - uint boardrev = wlc_hw->boardrev; - - if (boardrev == 0) - goodboard = false; - else if (boardrev > 0xff) { - uint brt = (boardrev & 0xf000) >> 12; - uint b0 = (boardrev & 0xf00) >> 8; - uint b1 = (boardrev & 0xf0) >> 4; - uint b2 = boardrev & 0xf; - - if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) - || (b2 > 9)) - goodboard = false; - } - - if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) - return goodboard; - - return goodboard; -} - -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) -{ - const char *varname = "macaddr"; - char *macaddr; - - /* If macaddr exists, use it (Sromrev4, CIS, ...). */ - macaddr = getvar(wlc_hw->vars, varname); - if (macaddr != NULL) - return macaddr; - - if (NBANDS_HW(wlc_hw) > 1) - varname = "et1macaddr"; - else - varname = "il0macaddr"; - - macaddr = getvar(wlc_hw->vars, varname); - if (macaddr == NULL) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " - "getvar(%s) not found\n", wlc_hw->unit, varname); - } - - return macaddr; -} - -/* - * Return true if radio is disabled, otherwise false. - * hw radio disable signal is an external pin, users activate it asynchronously - * this function could be called when driver is down and w/o clock - * it operates on different registers depending on corerev and boardflag. - */ -bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) -{ - bool v, clk, xtal; - u32 resetbits = 0, flags = 0; - - xtal = wlc_hw->sbclk; - if (!xtal) - wlc_bmac_xtal(wlc_hw, ON); - - /* may need to take core out of reset first */ - clk = wlc_hw->clk; - if (!clk) { - /* - * mac no longer enables phyclk automatically when driver - * accesses phyreg throughput mac. This can be skipped since - * only mac reg is accessed below - */ - flags |= SICF_PCLKE; - - /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) - wlc_hw->regs = - (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, - 0); - ai_core_reset(wlc_hw->sih, flags, resetbits); - wlc_mctrl_reset(wlc_hw); - } - - v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); - - /* put core back into reset */ - if (!clk) - ai_core_disable(wlc_hw->sih, 0); - - if (!xtal) - wlc_bmac_xtal(wlc_hw, OFF); - - return v; -} - -/* Initialize just the hardware when coming out of POR or S3/S5 system states */ -void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) -{ - if (wlc_hw->wlc->pub->hw_up) - return; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* - * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). - */ - wlc_bmac_xtal(wlc_hw, ON); - ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - if (wlc_hw->sih->bustype == PCI_BUS) { - ai_pci_fixcfg(wlc_hw->sih); - - /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) - wlc_hw->regs = - (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, - 0); - } - - /* Inform phy that a POR reset has occurred so it does a complete phy init */ - wlc_phy_por_inform(wlc_hw->band->pi); - - wlc_hw->ucode_loaded = false; - wlc_hw->wlc->pub->hw_up = true; - - if ((wlc_hw->boardflags & BFL_FEM) - && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { - if (! - (wlc_hw->boardrev >= 0x1250 - && (wlc_hw->boardflags & BFL_FEM_BT))) - ai_epa_4313war(wlc_hw->sih); - } -} - -static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) -{ - struct dma_pub *di = wlc_hw->di[fifo]; - return dma_rxreset(di); -} - -/* d11 core reset - * ensure fask clock during reset - * reset dma - * reset d11(out of reset) - * reset phy(out of reset) - * clear software macintstatus for fresh new start - * one testing hack wlc_hw->noreset will bypass the d11/phy reset - */ -void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) -{ - d11regs_t *regs; - uint i; - bool fastclk; - u32 resetbits = 0; - - if (flags == WLC_USE_COREFLAGS) - flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - - /* request FAST clock if not on */ - fastclk = wlc_hw->forcefastclk; - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - /* reset the dma engines except first time thru */ - if (ai_iscoreup(wlc_hw->sih)) { - for (i = 0; i < NFIFO; i++) - if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " - "dma_txreset[%d]: cannot stop dma\n", - wlc_hw->unit, __func__, i); - } - - if ((wlc_hw->di[RX_FIFO]) - && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) { - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" - "[%d]: cannot stop dma\n", - wlc_hw->unit, __func__, RX_FIFO); - } - } - /* if noreset, just stop the psm and return */ - if (wlc_hw->noreset) { - wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ - wlc_bmac_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); - return; - } - - /* - * mac no longer enables phyclk automatically when driver accesses - * phyreg throughput mac, AND phy_reset is skipped at early stage when - * band->pi is invalid. need to enable PHY CLK - */ - flags |= SICF_PCLKE; - - /* reset the core - * In chips with PMU, the fastclk request goes through d11 core reg 0x1e0, which - * is cleared by the core_reset. have to re-request it. - * This adds some delay and we can optimize it by also requesting fastclk through - * chipcommon during this period if necessary. But that has to work coordinate - * with other driver like mips/arm since they may touch chipcommon as well. - */ - wlc_hw->clk = false; - ai_core_reset(wlc_hw->sih, flags, resetbits); - wlc_hw->clk = true; - if (wlc_hw->band && wlc_hw->band->pi) - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); - - wlc_mctrl_reset(wlc_hw); - - if (PMUCTL_ENAB(wlc_hw->sih)) - wlc_clkctl_clk(wlc_hw, CLK_FAST); - - wlc_bmac_phy_reset(wlc_hw); - - /* turn on PHY_PLL */ - wlc_bmac_core_phypll_ctl(wlc_hw, true); - - /* clear sw intstatus */ - wlc_hw->wlc->macintstatus = 0; - - /* restore the clk setting */ - if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); -} - -/* txfifo sizes needs to be modified(increased) since the newer cores - * have more memory. - */ -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) -{ - d11regs_t *regs = wlc_hw->regs; - u16 fifo_nu; - u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; - u16 txfifo_def, txfifo_def1; - u16 txfifo_cmd; - - /* tx fifos start at TXFIFO_START_BLK from the Base address */ - txfifo_startblk = TXFIFO_START_BLK; - - /* sequence of operations: reset fifo, set fifo size, reset fifo */ - for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { - - txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; - txfifo_def = (txfifo_startblk & 0xff) | - (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); - txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | - ((((txfifo_endblk - - 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); - txfifo_cmd = - TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); - - W_REG(®s->xmtfifocmd, txfifo_cmd); - W_REG(®s->xmtfifodef, txfifo_def); - W_REG(®s->xmtfifodef1, txfifo_def1); - - W_REG(®s->xmtfifocmd, txfifo_cmd); - - txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; - } - /* - * need to propagate to shm location to be in sync since ucode/hw won't - * do this - */ - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE0, - wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE1, - wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE2, - ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> - xmtfifo_sz[TX_AC_BK_FIFO])); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE3, - ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> - xmtfifo_sz[TX_BCMC_FIFO])); -} - -/* d11 core init - * reset PSM - * download ucode/PCM - * let ucode run to suspended - * download ucode inits - * config other core registers - * init dma - */ -static void wlc_coreinit(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs; - u32 sflags; - uint bcnint_us; - uint i = 0; - bool fifosz_fixup = false; - int err = 0; - u16 buf[NFIFO]; - struct wiphy *wiphy = wlc->wiphy; - - regs = wlc_hw->regs; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - /* reset PSM */ - wlc_bmac_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); - - wlc_ucode_download(wlc_hw); - /* - * FIFOSZ fixup. driver wants to controls the fifo allocation. - */ - fifosz_fixup = true; - - /* let the PSM run to the suspended state, set mode to BSS STA */ - W_REG(®s->macintstatus, -1); - wlc_bmac_mctrl(wlc_hw, ~0, - (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); - - /* wait for ucode to self-suspend after auto-init */ - SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), - 1000 * 1000); - if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) - wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" - "suspend!\n", wlc_hw->unit); - - wlc_gpio_init(wlc); - - sflags = ai_core_sflags(wlc_hw->sih, 0, 0); - - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) - wlc_write_inits(wlc_hw, d11n0initvals16); - else - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0initvals24); - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" - " %d\n", __func__, wlc_hw->unit, - wlc_hw->corerev); - } - } else { - wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - - /* For old ucode, txfifo sizes needs to be modified(increased) */ - if (fifosz_fixup == true) { - wlc_corerev_fifofixup(wlc_hw); - } - - /* check txfifo allocations match between ucode and driver */ - buf[TX_AC_BE_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE0); - if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { - i = TX_AC_BE_FIFO; - err = -1; - } - buf[TX_AC_VI_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE1); - if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { - i = TX_AC_VI_FIFO; - err = -1; - } - buf[TX_AC_BK_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE2); - buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; - buf[TX_AC_BK_FIFO] &= 0xff; - if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { - i = TX_AC_BK_FIFO; - err = -1; - } - if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { - i = TX_AC_VO_FIFO; - err = -1; - } - buf[TX_BCMC_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE3); - buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; - buf[TX_BCMC_FIFO] &= 0xff; - if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { - i = TX_BCMC_FIFO; - err = -1; - } - if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { - i = TX_ATIM_FIFO; - err = -1; - } - if (err != 0) { - wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" - " driver size %d index %d\n", buf[i], - wlc_hw->xmtfifo_sz[i], i); - } - - /* make sure we can still talk to the mac */ - WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); - - /* band-specific inits done by wlc_bsinit() */ - - /* Set up frame burst size and antenna swap threshold init values */ - wlc_bmac_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); - wlc_bmac_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); - - /* enable one rx interrupt per received frame */ - W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); - - /* set the station mode (BSS STA) */ - wlc_bmac_mctrl(wlc_hw, - (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), - (MCTL_INFRA | MCTL_DISCARD_PMQ)); - - /* set up Beacon interval */ - bcnint_us = 0x8000 << 10; - W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); - W_REG(®s->tsf_cfpstart, bcnint_us); - W_REG(®s->macintstatus, MI_GP1); - - /* write interrupt mask */ - W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); - - /* allow the MAC to control the PHY clock (dynamic on/off) */ - wlc_bmac_macphyclk_set(wlc_hw, ON); - - /* program dynamic clock control fast powerup delay register */ - wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); - W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); - - /* tell the ucode the corerev */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); - - /* tell the ucode MAC capabilities */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_L, - (u16) (wlc_hw->machwcap & 0xffff)); - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_H, - (u16) ((wlc_hw-> - machwcap >> 16) & 0xffff)); - - /* write retry limits to SCR, this done after PSM init */ - W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, wlc_hw->SRL); - W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, wlc_hw->LRL); - - /* write rate fallback retry limits */ - wlc_bmac_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); - wlc_bmac_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); - - AND_REG(®s->ifs_ctl, 0x0FFF); - W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); - - /* dma initializations */ - wlc->txpend16165war = 0; - - /* init the tx dma engines */ - for (i = 0; i < NFIFO; i++) { - if (wlc_hw->di[i]) - dma_txinit(wlc_hw->di[i]); - } - - /* init the rx dma engine(s) and post receive buffers */ - dma_rxinit(wlc_hw->di[RX_FIFO]); - dma_rxfill(wlc_hw->di[RX_FIFO]); -} - -/* This function is used for changing the tsf frac register - * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz - * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz - * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz - * HTPHY Formula is 2^26/freq(MHz) e.g. - * For spuron2 - 126MHz -> 2^26/126 = 532610.0 - * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 - * For spuron: 123MHz -> 2^26/123 = 545600.5 - * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 - * For spur off: 120MHz -> 2^26/120 = 559240.5 - * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 - */ - -void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) -{ - d11regs_t *regs; - regs = wlc_hw->regs; - - if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { - if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x2082); - W_REG(®s->tsf_clk_frac_h, 0x8); - } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x5341); - W_REG(®s->tsf_clk_frac_h, 0x8); - } else { /* 120Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x8889); - W_REG(®s->tsf_clk_frac_h, 0x8); - } - } else if (WLCISLCNPHY(wlc_hw->band)) { - if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ - W_REG(®s->tsf_clk_frac_l, 0x7CE0); - W_REG(®s->tsf_clk_frac_h, 0xC); - } else { /* 80Mhz */ - W_REG(®s->tsf_clk_frac_l, 0xCCCD); - W_REG(®s->tsf_clk_frac_h, 0xC); - } - } -} - -/* Initialize GPIOs that are controlled by D11 core */ -static void wlc_gpio_init(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs; - u32 gc, gm; - - regs = wlc_hw->regs; - - /* use GPIO select 0 to get all gpio signals from the gpio out reg */ - wlc_bmac_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); - - /* - * Common GPIO setup: - * G0 = LED 0 = WLAN Activity - * G1 = LED 1 = WLAN 2.4 GHz Radio State - * G2 = LED 2 = WLAN 5 GHz Radio State - * G4 = radio disable input (HI enabled, LO disabled) - */ - - gc = gm = 0; - - /* Allocate GPIOs for mimo antenna diversity feature */ - if (wlc_hw->antsel_type == ANTSEL_2x3) { - /* Enable antenna diversity, use 2x3 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, - MHF3_ANTSEL_MODE, WLC_BAND_ALL); - - /* init superswitch control */ - wlc_phy_antsel_init(wlc_hw->band->pi, false); - - } else if (wlc_hw->antsel_type == ANTSEL_2x4) { - gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); - /* - * The board itself is powered by these GPIOs - * (when not sending pattern) so set them high - */ - OR_REG(®s->psm_gpio_oe, - (BOARD_GPIO_12 | BOARD_GPIO_13)); - OR_REG(®s->psm_gpio_out, - (BOARD_GPIO_12 | BOARD_GPIO_13)); - - /* Enable antenna diversity, use 2x4 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, - WLC_BAND_ALL); - - /* Configure the desired clock to be 4Mhz */ - wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV, - ANTSEL_CLKDIV_4MHZ); - } - - /* gpio 9 controls the PA. ucode is responsible for wiggling out and oe */ - if (wlc_hw->boardflags & BFL_PACTRL) - gm |= gc |= BOARD_GPIO_PACTRL; - - /* apply to gpiocontrol register */ - ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); -} - -static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) -{ - struct wlc_info *wlc; - wlc = wlc_hw->wlc; - - if (wlc_hw->ucode_loaded) - return; - - if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, - bcm43xx_16_mimosz); - wlc_hw->ucode_loaded = true; - } else - wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " - "corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, - bcm43xx_24_lcnsz); - wlc_hw->ucode_loaded = true; - } else { - wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " - "corerev %d\n", - __func__, wlc_hw->unit, wlc_hw->corerev); - } - } -} - -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], - const uint nbytes) { - d11regs_t *regs = wlc_hw->regs; - uint i; - uint count; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - count = (nbytes / sizeof(u32)); - - W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); - (void)R_REG(®s->objaddr); - for (i = 0; i < count; i++) - W_REG(®s->objdata, ucode[i]); -} - -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, - const struct d11init *inits) -{ - int i; - volatile u8 *base; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - base = (volatile u8 *)wlc_hw->regs; - - for (i = 0; inits[i].addr != 0xffff; i++) { - if (inits[i].size == 2) - W_REG((u16 *)(base + inits[i].addr), - inits[i].value); - else if (inits[i].size == 4) - W_REG((u32 *)(base + inits[i].addr), - inits[i].value); - } -} - -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw) -{ - u16 phyctl; - u16 phytxant = wlc_hw->bmac_phytxant; - u16 mask = PHY_TXC_ANT_MASK; - - /* set the Probe Response frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); - phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); - - /* set the Response (ACK/CTS) frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_RSP_PCTLWD); - phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); -} - -void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) -{ - /* update sw state */ - wlc_hw->bmac_phytxant = phytxant; - - /* push to ucode if up */ - if (!wlc_hw->up) - return; - wlc_ucode_txant_set(wlc_hw); - -} - -u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw) -{ - return (u16) wlc_hw->wlc->stf->txant; -} - -void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) -{ - wlc_hw->antsel_type = antsel_type; - - /* Update the antsel type for phy module to use */ - wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); -} - -void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) -{ - bool fatal = false; - uint unit; - uint intstatus, idx; - d11regs_t *regs = wlc_hw->regs; - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - unit = wlc_hw->unit; - - for (idx = 0; idx < NFIFO; idx++) { - /* read intstatus register and ignore any non-error bits */ - intstatus = - R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; - if (!intstatus) - continue; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", - unit, idx, intstatus); - - if (intstatus & I_RO) { - wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " - "overflow\n", unit, idx); - fatal = true; - } - - if (intstatus & I_PC) { - wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", - unit, idx); - fatal = true; - } - - if (intstatus & I_PD) { - wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, - idx); - fatal = true; - } - - if (intstatus & I_DE) { - wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " - "error\n", unit, idx); - fatal = true; - } - - if (intstatus & I_RU) { - wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " - "underflow\n", idx, unit); - } - - if (intstatus & I_XU) { - wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " - "underflow\n", idx, unit); - fatal = true; - } - - if (fatal) { - wlc_fatal_error(wlc_hw->wlc); /* big hammer */ - break; - } else - W_REG(®s->intctrlregs[idx].intstatus, - intstatus); - } -} - -void wlc_intrson(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - wlc->macintmask = wlc->defmacintmask; - W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); -} - -/* callback for siutils.c, which has only wlc handler, no wl - * they both check up, not only because there is no need to off/restore d11 interrupt - * but also because per-port code may require sync with valid interrupt. - */ - -static u32 wlc_wlintrsoff(struct wlc_info *wlc) -{ - if (!wlc->hw->up) - return 0; - - return brcms_intrsoff(wlc->wl); -} - -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) -{ - if (!wlc->hw->up) - return; - - brcms_intrsrestore(wlc->wl, macintmask); -} - -u32 wlc_intrsoff(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintmask; - - if (!wlc_hw->clk) - return 0; - - macintmask = wlc->macintmask; /* isr can still happen */ - - W_REG(&wlc_hw->regs->macintmask, 0); - (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ - udelay(1); /* ensure int line is no longer driven */ - wlc->macintmask = 0; - - /* return previous macintmask; resolve race between us and our isr */ - return wlc->macintstatus ? 0 : macintmask; -} - -void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - if (!wlc_hw->clk) - return; - - wlc->macintmask = macintmask; - W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); -} - -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool on, mbool flags) -{ - u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; - - if (on) { - /* suspend tx fifos */ - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); - - /* zero the address match register so we do not send ACKs */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, - null_ether_addr); - } else { - /* resume tx fifos */ - if (!wlc_hw->wlc->tx_suspended) { - wlc_bmac_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); - } - wlc_bmac_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); - - /* Restore address */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, - wlc_hw->etheraddr); - } - - wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); - - if (on) - wlc_ucode_mute_override_set(wlc_hw); - else - wlc_ucode_mute_override_clear(wlc_hw); -} - -int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) -{ - if (fifo >= NFIFO) - return -EINVAL; - - *blocks = wlc_hw->xmtfifo_sz[fifo]; - - return 0; -} - -/* wlc_bmac_tx_fifo_suspended: - * Check the MAC's tx suspend status for a tx fifo. - * - * When the MAC acknowledges a tx suspend, it indicates that no more - * packets will be transmitted out the radio. This is independent of - * DMA channel suspension---the DMA may have finished suspending, or may still - * be pulling data into a tx fifo, by the time the MAC acks the suspend - * request. - */ -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - /* check that a suspend has been requested and is no longer pending */ - - /* - * for DMA mode, the suspend request is set in xmtcontrol of the DMA engine, - * and the tx fifo suspend at the lower end of the MAC is acknowledged in the - * chnstatus register. - * The tx fifo suspend completion is independent of the DMA suspend completion and - * may be acked before or after the DMA is suspended. - */ - if (dma_txsuspended(wlc_hw->di[tx_fifo]) && - (R_REG(&wlc_hw->regs->chnstatus) & - (1 << tx_fifo)) == 0) - return true; - - return false; -} - -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - u8 fifo = 1 << tx_fifo; - - /* Two clients of this code, 11h Quiet period and scanning. */ - - /* only suspend if not already suspended */ - if ((wlc_hw->suspended_fifos & fifo) == fifo) - return; - - /* force the core awake only if not already */ - if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_TXFIFO); - - wlc_hw->suspended_fifos |= fifo; - - if (wlc_hw->di[tx_fifo]) { - /* Suspending AMPDU transmissions in the middle can cause underflow - * which may result in mismatch between ucode and driver - * so suspend the mac before suspending the FIFO - */ - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_suspend_mac_and_wait(wlc_hw->wlc); - - dma_txsuspend(wlc_hw->di[tx_fifo]); - - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_enable_mac(wlc_hw->wlc); - } -} - -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) -{ - /* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done - * here for PIO otherwise the watchdog will catch the inconsistency and fire - */ - /* Two clients of this code, 11h Quiet period and scanning. */ - if (wlc_hw->di[tx_fifo]) - dma_txresume(wlc_hw->di[tx_fifo]); - - /* allow core to sleep again */ - if (wlc_hw->suspended_fifos == 0) - return; - else { - wlc_hw->suspended_fifos &= ~(1 << tx_fifo); - if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_clear(wlc_hw, - WLC_WAKE_OVERRIDE_TXFIFO); - } -} - -/* - * Read and clear macintmask and macintstatus and intstatus registers. - * This routine should be called with interrupts off - * Return: - * -1 if DEVICEREMOVED(wlc) evaluates to true; - * 0 if the interrupt is not for us, or we are in some special cases; - * device interrupt status bits otherwise. - */ -static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 macintstatus; - - /* macintstatus includes a DMA interrupt summary bit */ - macintstatus = R_REG(®s->macintstatus); - - BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, - macintstatus); - - /* detect cardbus removed, in power down(suspend) and in reset */ - if (DEVICEREMOVED(wlc)) - return -1; - - /* DEVICEREMOVED succeeds even when the core is still resetting, - * handle that case here. - */ - if (macintstatus == 0xffffffff) - return 0; - - /* defer unsolicited interrupts */ - macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); - - /* if not for us */ - if (macintstatus == 0) - return 0; - - /* interrupts are already turned off for CFE build - * Caution: For CFE Turning off the interrupts again has some undesired - * consequences - */ - /* turn off the interrupts */ - W_REG(®s->macintmask, 0); - (void)R_REG(®s->macintmask); /* sync readback */ - wlc->macintmask = 0; - - /* clear device interrupts */ - W_REG(®s->macintstatus, macintstatus); - - /* MI_DMAINT is indication of non-zero intstatus */ - if (macintstatus & MI_DMAINT) { - /* - * only fifo interrupt enabled is I_RI in - * RX_FIFO. If MI_DMAINT is set, assume it - * is set and clear the interrupt. - */ - W_REG(®s->intctrlregs[RX_FIFO].intstatus, - DEF_RXINTMASK); - } - - return macintstatus; -} - -/* Update wlc->macintstatus and wlc->intstatus[]. */ -/* Return true if they are updated successfully. false otherwise */ -bool wlc_intrsupd(struct wlc_info *wlc) -{ - u32 macintstatus; - - /* read and clear macintstatus and intstatus registers */ - macintstatus = wlc_intstatus(wlc, false); - - /* device is removed */ - if (macintstatus == 0xffffffff) - return false; - - /* update interrupt status in software */ - wlc->macintstatus |= macintstatus; - - return true; -} - -/* - * First-level interrupt processing. - * Return true if this was our interrupt, false otherwise. - * *wantdpc will be set to true if further wlc_dpc() processing is required, - * false otherwise. - */ -bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - u32 macintstatus; - - *wantdpc = false; - - if (!wlc_hw->up || !wlc->macintmask) - return false; - - /* read and clear macintstatus and intstatus registers */ - macintstatus = wlc_intstatus(wlc, true); - - if (macintstatus == 0xffffffff) - wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" - " path\n"); - - /* it is not for us */ - if (macintstatus == 0) - return false; - - *wantdpc = true; - - /* save interrupt status bits */ - wlc->macintstatus = macintstatus; - - return true; - -} - -static bool -wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) -{ - /* discard intermediate indications for ucode with one legitimate case: - * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent - * tx of DATA failed. so it will start rts/cts from the beginning (resetting the rts - * transmission count) - */ - if (!(txs->status & TX_STATUS_AMPDU) - && (txs->status & TX_STATUS_INTERMEDIATE)) { - return false; - } - - return wlc_dotxstatus(wlc_hw->wlc, txs, s2); -} - -/* process tx completion events in BMAC - * Return true if more tx status need to be processed. false otherwise. - */ -static bool -wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) -{ - bool morepending = false; - struct wlc_info *wlc = wlc_hw->wlc; - d11regs_t *regs; - tx_status_t txstatus, *txs; - u32 s1, s2; - uint n = 0; - /* - * Param 'max_tx_num' indicates max. # tx status to process before - * break out. - */ - uint max_tx_num = bound ? wlc->pub->tunables->txsbnd : -1; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); - - txs = &txstatus; - regs = wlc_hw->regs; - while (!(*fatal) - && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { - - if (s1 == 0xffffffff) { - wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", - wlc_hw->unit, __func__); - return morepending; - } - - s2 = R_REG(®s->frmtxstatus2); - - txs->status = s1 & TXS_STATUS_MASK; - txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; - txs->sequence = s2 & TXS_SEQ_MASK; - txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; - txs->lasttxtime = 0; - - *fatal = wlc_bmac_dotxstatus(wlc_hw, txs, s2); - - /* !give others some time to run! */ - if (++n >= max_tx_num) - break; - } - - if (*fatal) - return 0; - - if (n >= max_tx_num) - morepending = true; - - if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); - - return morepending; -} - -void wlc_suspend_mac_and_wait(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 mc, mi; - struct wiphy *wiphy = wlc->wiphy; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc_hw->band->bandunit); - - /* - * Track overlapping suspend requests - */ - wlc_hw->mac_suspend_depth++; - if (wlc_hw->mac_suspend_depth > 1) - return; - - /* force the core awake */ - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); - - mc = R_REG(®s->maccontrol); - - if (mc == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_PSM_RUN)); - WARN_ON(!(mc & MCTL_EN_MAC)); - - mi = R_REG(®s->macintstatus); - if (mi == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mi & MI_MACSSPNDD); - - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0); - - SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), - WLC_MAX_MAC_SUSPEND); - - if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { - wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" - " and MI_MACSSPNDD is still not on.\n", - wlc_hw->unit, WLC_MAX_MAC_SUSPEND); - wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " - "psm_brc 0x%04x\n", wlc_hw->unit, - R_REG(®s->psmdebug), - R_REG(®s->phydebug), - R_REG(®s->psm_brc)); - } - - mc = R_REG(®s->maccontrol); - if (mc == 0xffffffff) { - wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, - __func__); - brcms_down(wlc->wl); - return; - } - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_PSM_RUN)); - WARN_ON(mc & MCTL_EN_MAC); -} - -void wlc_enable_mac(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - d11regs_t *regs = wlc_hw->regs; - u32 mc, mi; - - BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, - wlc->band->bandunit); - - /* - * Track overlapping suspend requests - */ - wlc_hw->mac_suspend_depth--; - if (wlc_hw->mac_suspend_depth > 0) - return; - - mc = R_REG(®s->maccontrol); - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(mc & MCTL_EN_MAC); - WARN_ON(!(mc & MCTL_PSM_RUN)); - - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); - W_REG(®s->macintstatus, MI_MACSSPNDD); - - mc = R_REG(®s->maccontrol); - WARN_ON(mc & MCTL_PSM_JMP_0); - WARN_ON(!(mc & MCTL_EN_MAC)); - WARN_ON(!(mc & MCTL_PSM_RUN)); - - mi = R_REG(®s->macintstatus); - WARN_ON(mi & MI_MACSSPNDD); - - wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); -} - -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw) -{ - u8 rate; - u8 rates[8] = { - WLC_RATE_6M, WLC_RATE_9M, WLC_RATE_12M, WLC_RATE_18M, - WLC_RATE_24M, WLC_RATE_36M, WLC_RATE_48M, WLC_RATE_54M - }; - u16 entry_ptr; - u16 pctl1; - uint i; - - if (!WLC_PHY_11N_CAP(wlc_hw->band)) - return; - - /* walk the phy rate table and update the entries */ - for (i = 0; i < ARRAY_SIZE(rates); i++) { - rate = rates[i]; - - entry_ptr = wlc_bmac_ofdm_ratetable_offset(wlc_hw, rate); - - /* read the SHM Rate Table entry OFDM PCTL1 values */ - pctl1 = - wlc_bmac_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); - - /* modify the value */ - pctl1 &= ~PHY_TXC1_MODE_MASK; - pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); - - /* Update the SHM Rate Table entry OFDM PCTL1 values */ - wlc_bmac_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, - pctl1); - } -} - -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) -{ - uint i; - u8 plcp_rate = 0; - struct plcp_signal_rate_lookup { - u8 rate; - u8 signal_rate; - }; - /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ - const struct plcp_signal_rate_lookup rate_lookup[] = { - {WLC_RATE_6M, 0xB}, - {WLC_RATE_9M, 0xF}, - {WLC_RATE_12M, 0xA}, - {WLC_RATE_18M, 0xE}, - {WLC_RATE_24M, 0x9}, - {WLC_RATE_36M, 0xD}, - {WLC_RATE_48M, 0x8}, - {WLC_RATE_54M, 0xC} - }; - - for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { - if (rate == rate_lookup[i].rate) { - plcp_rate = rate_lookup[i].signal_rate; - break; - } - } - - /* Find the SHM pointer to the rate table entry by looking in the - * Direct-map Table - */ - return 2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); -} - -void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode) -{ - wlc_hw->hw_stf_ss_opmode = stf_mode; - - if (wlc_hw->clk) - wlc_upd_ofdm_pctl1_table(wlc_hw); -} - -void -wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, - u32 *tsf_h_ptr) -{ - d11regs_t *regs = wlc_hw->regs; - - /* read the tsf timer low, then high to get an atomic read */ - *tsf_l_ptr = R_REG(®s->tsf_timerlow); - *tsf_h_ptr = R_REG(®s->tsf_timerhigh); - - return; -} - -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) -{ - d11regs_t *regs; - u32 w, val; - struct wiphy *wiphy = wlc_hw->wlc->wiphy; - - BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); - - regs = wlc_hw->regs; - - /* Validate dchip register access */ - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - w = R_REG(®s->objdata); - - /* Can we write and read back a 32bit register? */ - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, (u32) 0xaa5555aa); - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - val = R_REG(®s->objdata); - if (val != (u32) 0xaa5555aa) { - wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " - "expected 0xaa5555aa\n", wlc_hw->unit, val); - return false; - } - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, (u32) 0x55aaaa55); - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - val = R_REG(®s->objdata); - if (val != (u32) 0x55aaaa55) { - wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " - "expected 0x55aaaa55\n", wlc_hw->unit, val); - return false; - } - - W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); - (void)R_REG(®s->objaddr); - W_REG(®s->objdata, w); - - /* clear CFPStart */ - W_REG(®s->tsf_cfpstart, 0); - - w = R_REG(®s->maccontrol); - if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && - (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { - wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " - "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, - (MCTL_IHR_EN | MCTL_WAKE), - (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); - return false; - } - - return true; -} - -#define PHYPLL_WAIT_US 100000 - -void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) -{ - d11regs_t *regs; - u32 tmp; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - tmp = 0; - regs = wlc_hw->regs; - - if (on) { - if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { - OR_REG(®s->clk_ctl_st, - (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | - CCS_ERSRC_REQ_PHYPLL)); - SPINWAIT((R_REG(®s->clk_ctl_st) & - (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), - PHYPLL_WAIT_US); - - tmp = R_REG(®s->clk_ctl_st); - if ((tmp & (CCS_ERSRC_AVAIL_HT)) != - (CCS_ERSRC_AVAIL_HT)) { - wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" - " PLL failed\n", __func__); - } - } else { - OR_REG(®s->clk_ctl_st, - (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); - SPINWAIT((R_REG(®s->clk_ctl_st) & - (CCS_ERSRC_AVAIL_D11PLL | - CCS_ERSRC_AVAIL_PHYPLL)) != - (CCS_ERSRC_AVAIL_D11PLL | - CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); - - tmp = R_REG(®s->clk_ctl_st); - if ((tmp & - (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) - != - (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) { - wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " - "PHY PLL failed\n", __func__); - } - } - } else { - /* Since the PLL may be shared, other cores can still be requesting it; - * so we'll deassert the request but not wait for status to comply. - */ - AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); - tmp = R_REG(®s->clk_ctl_st); - } -} - -void wlc_coredisable(struct wlc_hw_info *wlc_hw) -{ - bool dev_gone; - - BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); - - dev_gone = DEVICEREMOVED(wlc_hw->wlc); - - if (dev_gone) - return; - - if (wlc_hw->noreset) - return; - - /* radio off */ - wlc_phy_switch_radio(wlc_hw->band->pi, OFF); - - /* turn off analog core */ - wlc_phy_anacore(wlc_hw->band->pi, OFF); - - /* turn off PHYPLL to save power */ - wlc_bmac_core_phypll_ctl(wlc_hw, false); - - /* No need to set wlc->pub->radio_active = OFF - * because this function needs down capability and - * radio_active is designed for BCMNODOWN. - */ - - /* remove gpio controls */ - if (wlc_hw->ucode_dbgsel) - ai_gpiocontrol(wlc_hw->sih, ~0, 0, GPIO_DRV_PRIORITY); - - wlc_hw->clk = false; - ai_core_disable(wlc_hw->sih, 0); - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); -} - -/* power both the pll and external oscillator on/off */ -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) -{ - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); - - /* dont power down if plldown is false or we must poll hw radio disable */ - if (!want && wlc_hw->pllreq) - return; - - if (wlc_hw->sih) - ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); - - wlc_hw->sbclk = want; - if (!wlc_hw->sbclk) { - wlc_hw->clk = false; - if (wlc_hw->band && wlc_hw->band->pi) - wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); - } -} - -static void wlc_flushqueues(struct wlc_info *wlc) -{ - struct wlc_hw_info *wlc_hw = wlc->hw; - uint i; - - wlc->txpend16165war = 0; - - /* free any posted tx packets */ - for (i = 0; i < NFIFO; i++) - if (wlc_hw->di[i]) { - dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); - TXPKTPENDCLR(wlc, i); - BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); - } - - /* free any posted rx packets */ - dma_rxreclaim(wlc_hw->di[RX_FIFO]); -} - -u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset) -{ - return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); -} - -void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v) -{ - wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); -} - -static u16 -wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) -{ - d11regs_t *regs = wlc_hw->regs; - volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; - volatile u16 *objdata_hi = objdata_lo + 1; - u16 v; - - W_REG(®s->objaddr, sel | (offset >> 2)); - (void)R_REG(®s->objaddr); - if (offset & 2) { - v = R_REG(objdata_hi); - } else { - v = R_REG(objdata_lo); - } - - return v; -} - -static void -wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) -{ - d11regs_t *regs = wlc_hw->regs; - volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; - volatile u16 *objdata_hi = objdata_lo + 1; - - W_REG(®s->objaddr, sel | (offset >> 2)); - (void)R_REG(®s->objaddr); - if (offset & 2) { - W_REG(objdata_hi, v); - } else { - W_REG(objdata_lo, v); - } -} - -/* Copy a buffer to shared memory of specified type . - * SHM 'offset' needs to be an even address and - * Buffer length 'len' must be an even number of bytes - * 'sel' selects the type of memory - */ -void -wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, - int len, u32 sel) -{ - u16 v; - const u8 *p = (const u8 *)buf; - int i; - - if (len <= 0 || (offset & 1) || (len & 1)) - return; - - for (i = 0; i < len; i += 2) { - v = p[i] | (p[i + 1] << 8); - wlc_bmac_write_objmem(wlc_hw, offset + i, v, sel); - } -} - -/* Copy a piece of shared memory of specified type to a buffer . - * SHM 'offset' needs to be an even address and - * Buffer length 'len' must be an even number of bytes - * 'sel' selects the type of memory - */ -void -wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, - int len, u32 sel) -{ - u16 v; - u8 *p = (u8 *) buf; - int i; - - if (len <= 0 || (offset & 1) || (len & 1)) - return; - - for (i = 0; i < len; i += 2) { - v = wlc_bmac_read_objmem(wlc_hw, offset + i, sel); - p[i] = v & 0xFF; - p[i + 1] = (v >> 8) & 0xFF; - } -} - -void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) -{ - BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", - wlc_hw->vars_size); - - *buf = wlc_hw->vars; - *len = wlc_hw->vars_size; -} - -void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) -{ - wlc_hw->SRL = SRL; - wlc_hw->LRL = LRL; - - /* write retry limit to SCR, shouldn't need to suspend */ - if (wlc_hw->up) { - W_REG(&wlc_hw->regs->objaddr, - OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); - W_REG(&wlc_hw->regs->objaddr, - OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); - (void)R_REG(&wlc_hw->regs->objaddr); - W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); - } -} - -void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) -{ - if (set) { - if (mboolisset(wlc_hw->pllreq, req_bit)) - return; - - mboolset(wlc_hw->pllreq, req_bit); - - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { - if (!wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, ON); - } - } - } else { - if (!mboolisset(wlc_hw->pllreq, req_bit)) - return; - - mboolclr(wlc_hw->pllreq, req_bit); - - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { - if (wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, OFF); - } - } - } - - return; -} - -u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) -{ - u16 table_ptr; - u8 phy_rate, index; - - /* get the phy specific rate encoding for the PLCP SIGNAL field */ - /* XXX4321 fixup needed ? */ - if (IS_OFDM(rate)) - table_ptr = M_RT_DIRMAP_A; - else - table_ptr = M_RT_DIRMAP_B; - - /* for a given rate, the LS-nibble of the PLCP SIGNAL field is - * the index into the rate table. - */ - phy_rate = rate_info[rate] & WLC_RATE_MASK; - index = phy_rate & 0xf; - - /* Find the SHM pointer to the rate table entry by looking in the - * Direct-map Table - */ - return 2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)); -} - -void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail) -{ - wlc_hw->antsel_avail = antsel_avail; -} diff --git a/drivers/staging/brcm80211/brcmsmac/bottom_mac.h b/drivers/staging/brcm80211/brcmsmac/bottom_mac.h deleted file mode 100644 index af8af69..0000000 --- a/drivers/staging/brcm80211/brcmsmac/bottom_mac.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _BRCM_BOTTOM_MAC_H_ -#define _BRCM_BOTTOM_MAC_H_ - -/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info) - driver */ -typedef struct wlc_bmac_state { - u32 machwcap; /* mac hw capibility */ - u32 preamble_ovr; /* preamble override */ -} wlc_bmac_state_t; - -enum { - IOV_BMAC_DIAG, - IOV_BMAC_SBGPIOTIMERVAL, - IOV_BMAC_SBGPIOOUT, - IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ - IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ - IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ - IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ - IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ - IOV_BMAC_OTPDUMP, - IOV_BMAC_OTPSTAT, - IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ - IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ - IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ - IOV_BMAC_PCIELCREG, /* PCIE LCREG */ - IOV_BMAC_SBGPIOTIMERMASK, - IOV_BMAC_RFDISABLEDLY, - IOV_BMAC_PCIEREG, /* PCIE REG */ - IOV_BMAC_PCICFGREG, /* PCI Config register */ - IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ - IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ - IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ - IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ - IOV_BMAC_DMALPBK, - IOV_BMAC_CCREG, - IOV_BMAC_COREREG, - IOV_BMAC_SDCIS, - IOV_BMAC_SDIO_DRIVE, - IOV_BMAC_OTPW, - IOV_BMAC_NVOTPW, - IOV_BMAC_SROM, - IOV_BMAC_SRCRC, - IOV_BMAC_CIS_SOURCE, - IOV_BMAC_CISVAR, - IOV_BMAC_OTPLOCK, - IOV_BMAC_OTP_CHIPID, - IOV_BMAC_CUSTOMVAR1, - IOV_BMAC_BOARDFLAGS, - IOV_BMAC_BOARDFLAGS2, - IOV_BMAC_WPSLED, - IOV_BMAC_NVRAM_SOURCE, - IOV_BMAC_OTP_RAW_READ, - IOV_BMAC_LAST -}; - -extern int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, - uint unit, bool piomode, void *regsva, uint bustype, - void *btparam); -extern int wlc_bmac_detach(struct wlc_info *wlc); -extern void wlc_bmac_watchdog(void *arg); - -/* up/down, reset, clk */ -extern void wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, - uint offset, const void *buf, int len, - u32 sel); -extern void wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, - void *buf, int len, u32 sel); -#define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) -#define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) - -extern void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on); -extern void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags); -extern void wlc_bmac_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute); -extern int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode); - -/* chanspec, ucode interface */ -extern void wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, - chanspec_t chanspec, - bool mute, struct txpwr_limits *txpwr); - -extern int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, - uint *blocks); -extern void wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, - u16 val, int bands); -extern void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val); -extern u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands); -extern void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant); -extern u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, - u8 antsel_type); -extern int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, - wlc_bmac_state_t *state); -extern void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v); -extern u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset); -extern void wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, - int len, void *buf); -extern void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, - uint *len); - -extern void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, - u8 *ea); - -extern bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot); -extern void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode); - -extern void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw); - -extern void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, - u32 override_bit); -extern void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, - u32 override_bit); - -extern void wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, - int match_reg_offset, - const u8 *addr); -extern void wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, - void *bcn, int len, bool both); - -extern void wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, - u32 *tsf_h_ptr); -extern void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin); -extern void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax); - -extern void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, - u16 LRL); - -extern void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw); - - -/* API for BMAC driver (e.g. wlc_phy.c etc) */ - -extern void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw); -extern void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, - mbool req_bit); -extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); -extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); -extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); - -#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c index b172320..9583140 100644 --- a/drivers/staging/brcm80211/brcmsmac/channel.c +++ b/drivers/staging/brcm80211/brcmsmac/channel.c @@ -29,7 +29,7 @@ #include "scb.h" #include "pub.h" #include "phy/phy_hal.h" -#include "bottom_mac.h" +#include "bmac.h" #include "rate.h" #include "channel.h" #include "main.h" diff --git a/drivers/staging/brcm80211/brcmsmac/main.c b/drivers/staging/brcm80211/brcmsmac/main.c index cfd04ca..3613900 100644 --- a/drivers/staging/brcm80211/brcmsmac/main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -36,7 +36,7 @@ #include "phy/phy_hal.h" #include "channel.h" #include "main.h" -#include "bottom_mac.h" +#include "bmac.h" #include "phy_hal.h" #include "antsel.h" #include "stf.h" diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c index 925edeb..d497573 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy_shim.c +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -40,7 +40,7 @@ #include "phy/phy_hal.h" #include "channel.h" #include "srom.h" -#include "bottom_mac.h" +#include "bmac.h" #include "phy_hal.h" #include "main.h" #include "phy_shim.h" diff --git a/drivers/staging/brcm80211/brcmsmac/stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c index 561aba8..5f98804 100644 --- a/drivers/staging/brcm80211/brcmsmac/stf.c +++ b/drivers/staging/brcm80211/brcmsmac/stf.c @@ -31,7 +31,7 @@ #include "phy/phy_hal.h" #include "channel.h" #include "main.h" -#include "bottom_mac.h" +#include "bmac.h" #include "stf.h" #define MIN_SPATIAL_EXPANSION 0 -- cgit v0.10.2 From 6741d8ec3c564d26871bec5a8b6f02bdecc41345 Mon Sep 17 00:00:00 2001 From: Roland Vossen Date: Wed, 1 Jun 2011 13:46:08 +0200 Subject: staging: brcm80211: updated TODO with current state of affairs Signed-off-by: Roland Vossen Reviewed-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/TODO b/drivers/staging/brcm80211/TODO index 2d9948d..94c792b 100644 --- a/drivers/staging/brcm80211/TODO +++ b/drivers/staging/brcm80211/TODO @@ -6,13 +6,13 @@ Bugs brcmfmac and brcmsmac ===================== - -- Remove unnecessary includes, move #includes from .h files into .c files. -- Absorb and delete header files that are included in only one .c file +- replace company specific acronym wlc_ +- Resolve all XXX, TODO, FIXME in code brcmfmac ===================== - +- Remove unnecessary includes, move #includes from .h files into .c files. +- Absorb and delete header files that are included in only one .c file - ASSERTS not allowed in mainline, replace by warning + error handling - Replace printk and WL_ERROR() with proper routines - Replace driver's proprietary ssb interface with generic kernel ssb module -- cgit v0.10.2 From b1956a81af0c23d65a4cafee9e39c52e4c6cadcc Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:45 -0700 Subject: staging: hv: remove unnecessary code in netvsc_probe(). netif_carrier_off() was called earlier in this function, and there is no other thread access this device yet. The status checking code is not necessary here. Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index 7b9c229..456d3df 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -364,17 +364,7 @@ static int netvsc_probe(struct hv_device *dev) return ret; } - /* - * If carrier is still off ie we did not get a link status callback, - * update it if necessary - */ - /* - * FIXME: We should use a atomic or test/set instead to avoid getting - * out of sync with the device's link status - */ - if (!netif_carrier_ok(net)) - if (!device_info.link_state) - netif_carrier_on(net); + netif_carrier_on(net); memcpy(net->dev_addr, device_info.mac_adr, ETH_ALEN); -- cgit v0.10.2 From ca06a22a4181cae9cc291ccdccc5e7188c51b67d Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:46 -0700 Subject: staging: hv: remove commented out code from netvsc_drv.c Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index 456d3df..e716d4d 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -156,9 +156,6 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net) /* Setup the rndis header */ packet->page_buf_cnt = num_pages; - /* TODO: Flush all write buffers/ memory fence ??? */ - /* wmb(); */ - /* Initialize it from the skb */ packet->total_data_buflen = skb->len; -- cgit v0.10.2 From df06bcff819555bf9aca38b2f8263920836fe851 Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:47 -0700 Subject: staging: hv: change rndis_filter_device_remove() to void return type rndis_filter_device_remove() always return 0, so change it to void return type. Also cleaned up the error checking in the caller. Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hyperv_net.h b/drivers/staging/hv/hyperv_net.h index 315097d..6226dd3 100644 --- a/drivers/staging/hv/hyperv_net.h +++ b/drivers/staging/hv/hyperv_net.h @@ -101,7 +101,7 @@ int rndis_filter_open(struct hv_device *dev); int rndis_filter_close(struct hv_device *dev); int rndis_filte_device_add(struct hv_device *dev, void *additional_info); -int rndis_filter_device_remove(struct hv_device *dev); +void rndis_filter_device_remove(struct hv_device *dev); int rndis_filter_receive(struct hv_device *dev, struct hv_netvsc_packet *pkt); diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index e716d4d..ad25433 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -387,7 +387,6 @@ static int netvsc_probe(struct hv_device *dev) static int netvsc_remove(struct hv_device *dev) { struct net_device *net = dev_get_drvdata(&dev->device); - int ret; if (net == NULL) { dev_err(&dev->device, "No net device to remove\n"); @@ -404,14 +403,10 @@ static int netvsc_remove(struct hv_device *dev) * Call to the vsc driver to let it know that the device is being * removed */ - ret = rndis_filter_device_remove(dev); - if (ret != 0) { - /* TODO: */ - netdev_err(net, "unable to remove vsc device (ret %d)\n", ret); - } + rndis_filter_device_remove(dev); free_netdev(net); - return ret; + return 0; } /* The one and only one */ diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/staging/hv/rndis_filter.c index 60ebdb1..572cec6 100644 --- a/drivers/staging/hv/rndis_filter.c +++ b/drivers/staging/hv/rndis_filter.c @@ -741,7 +741,7 @@ int rndis_filte_device_add(struct hv_device *dev, return ret; } -int rndis_filter_device_remove(struct hv_device *dev) +void rndis_filter_device_remove(struct hv_device *dev) { struct netvsc_device *net_dev = dev->ext; struct rndis_device *rndis_dev = net_dev->extension; @@ -753,8 +753,6 @@ int rndis_filter_device_remove(struct hv_device *dev) net_dev->extension = NULL; netvsc_device_remove(dev); - - return 0; } -- cgit v0.10.2 From 8d895aea8a87665d79d7acf9ddf38697073fb497 Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:48 -0700 Subject: staging: hv: remove commented out code in netvsc_remove() Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index ad25433..6a2f17d 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -395,7 +395,6 @@ static int netvsc_remove(struct hv_device *dev) /* Stop outbound asap */ netif_stop_queue(net); - /* netif_carrier_off(net); */ unregister_netdev(net); -- cgit v0.10.2 From bdbad576d572f0584a0b2f1596406c533034022c Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:49 -0700 Subject: staging: hv: fix typo in name rndis_filte_device_add() rename rndis_filte_device_add to rndis_filter_device_add Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hyperv_net.h b/drivers/staging/hv/hyperv_net.h index 6226dd3..cf762bd 100644 --- a/drivers/staging/hv/hyperv_net.h +++ b/drivers/staging/hv/hyperv_net.h @@ -99,7 +99,7 @@ int netvsc_recv_callback(struct hv_device *device_obj, int netvsc_initialize(struct hv_driver *drv); int rndis_filter_open(struct hv_device *dev); int rndis_filter_close(struct hv_device *dev); -int rndis_filte_device_add(struct hv_device *dev, +int rndis_filter_device_add(struct hv_device *dev, void *additional_info); void rndis_filter_device_remove(struct hv_device *dev); int rndis_filter_receive(struct hv_device *dev, diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index 6a2f17d..f510959 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -352,7 +352,7 @@ static int netvsc_probe(struct hv_device *dev) /* Notify the netvsc driver of the new device */ device_info.ring_size = ring_size; - ret = rndis_filte_device_add(dev, &device_info); + ret = rndis_filter_device_add(dev, &device_info); if (ret != 0) { free_netdev(net); dev_set_drvdata(&dev->device, NULL); diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/staging/hv/rndis_filter.c index 572cec6..b142aae 100644 --- a/drivers/staging/hv/rndis_filter.c +++ b/drivers/staging/hv/rndis_filter.c @@ -681,7 +681,7 @@ static int rndis_filter_close_device(struct rndis_device *dev) return ret; } -int rndis_filte_device_add(struct hv_device *dev, +int rndis_filter_device_add(struct hv_device *dev, void *additional_info) { int ret; -- cgit v0.10.2 From e931a2b8893ec1150b30380d68c453b33cce3137 Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Mon, 23 May 2011 09:03:50 -0700 Subject: staging: hv: removed commented out code from rndis_filter_receive() Signed-off-by: Haiyang Zhang Signed-off-by: K. Y. Srinivasan Signed-off-by: Abhishek Kane Signed-off-by: Hank Janssen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/staging/hv/rndis_filter.c index b142aae..5a5bf64 100644 --- a/drivers/staging/hv/rndis_filter.c +++ b/drivers/staging/hv/rndis_filter.c @@ -372,24 +372,6 @@ int rndis_filter_receive(struct hv_device *dev, pkt->page_buf[0].offset); /* Make sure we got a valid rndis message */ - /* - * FIXME: There seems to be a bug in set completion msg where its - * MessageLength is 16 bytes but the ByteCount field in the xfer page - * range shows 52 bytes - * */ -#if 0 - if (pkt->total_data_buflen != rndis_hdr->msg_len) { - kunmap_atomic(rndis_hdr - pkt->page_buf[0].offset, - KM_IRQ0); - - dev_err(&dev->device, "invalid rndis message? (expected %u " - "bytes got %u)...dropping this message!\n", - rndis_hdr->msg_len, - pkt->total_data_buflen); - return -1; - } -#endif - if ((rndis_hdr->ndis_msg_type != REMOTE_NDIS_PACKET_MSG) && (rndis_hdr->msg_len > sizeof(struct rndis_message))) { dev_err(&dev->device, "incoming rndis message buffer overflow " -- cgit v0.10.2 From a5923f5689e037ba0e8e10f3d5ea66463601f39b Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Wed, 25 May 2011 15:02:24 -0700 Subject: staging: hv: remove netvsc send buffer and related functions netvsc send buffer is not used, so remove it. Signed-off-by: Haiyang Zhang Signed-off-by: Hank Janssen Signed-off-by: K. Y. Srinivasan Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hyperv_net.h b/drivers/staging/hv/hyperv_net.h index cf762bd..27f987b 100644 --- a/drivers/staging/hv/hyperv_net.h +++ b/drivers/staging/hv/hyperv_net.h @@ -355,10 +355,6 @@ struct nvsp_message { /* #define NVSC_MIN_PROTOCOL_VERSION 1 */ /* #define NVSC_MAX_PROTOCOL_VERSION 1 */ -#define NETVSC_SEND_BUFFER_SIZE (64*1024) /* 64K */ -#define NETVSC_SEND_BUFFER_ID 0xface - - #define NETVSC_RECEIVE_BUFFER_SIZE (1024*1024) /* 1MB */ #define NETVSC_RECEIVE_BUFFER_ID 0xcafe @@ -383,12 +379,6 @@ struct netvsc_device { struct list_head recv_pkt_list; spinlock_t recv_pkt_list_lock; - /* Send buffer allocated by us but manages by NetVSP */ - void *send_buf; - u32 send_buf_size; - u32 send_buf_gpadl_handle; - u32 send_section_size; - /* Receive buffer allocated by us but manages by NetVSP */ void *recv_buf; u32 recv_buf_size; diff --git a/drivers/staging/hv/netvsc.c b/drivers/staging/hv/netvsc.c index 41cbb26..7b5bf0d 100644 --- a/drivers/staging/hv/netvsc.c +++ b/drivers/staging/hv/netvsc.c @@ -323,162 +323,6 @@ exit: return ret; } -static int netvsc_destroy_send_buf(struct netvsc_device *net_device) -{ - struct nvsp_message *revoke_packet; - int ret = 0; - - /* - * If we got a section count, it means we received a - * SendReceiveBufferComplete msg (ie sent - * NvspMessage1TypeSendReceiveBuffer msg) therefore, we need - * to send a revoke msg here - */ - if (net_device->send_section_size) { - /* Send the revoke send buffer */ - revoke_packet = &net_device->revoke_packet; - memset(revoke_packet, 0, sizeof(struct nvsp_message)); - - revoke_packet->hdr.msg_type = - NVSP_MSG1_TYPE_REVOKE_SEND_BUF; - revoke_packet->msg.v1_msg. - revoke_send_buf.id = NETVSC_SEND_BUFFER_ID; - - ret = vmbus_sendpacket(net_device->dev->channel, - revoke_packet, - sizeof(struct nvsp_message), - (unsigned long)revoke_packet, - VM_PKT_DATA_INBAND, 0); - /* - * If we failed here, we might as well return and have a leak - * rather than continue and a bugchk - */ - if (ret != 0) { - dev_err(&net_device->dev->device, "unable to send " - "revoke send buffer to netvsp"); - return -1; - } - } - - /* Teardown the gpadl on the vsp end */ - if (net_device->send_buf_gpadl_handle) { - ret = vmbus_teardown_gpadl(net_device->dev->channel, - net_device->send_buf_gpadl_handle); - - /* - * If we failed here, we might as well return and have a leak - * rather than continue and a bugchk - */ - if (ret != 0) { - dev_err(&net_device->dev->device, - "unable to teardown send buffer's gpadl"); - return -1; - } - net_device->send_buf_gpadl_handle = 0; - } - - if (net_device->send_buf) { - /* Free up the receive buffer */ - free_pages((unsigned long)net_device->send_buf, - get_order(net_device->send_buf_size)); - net_device->send_buf = NULL; - } - - return ret; -} - -static int netvsc_init_send_buf(struct hv_device *device) -{ - int ret = 0; - int t; - struct netvsc_device *net_device; - struct nvsp_message *init_packet; - - net_device = get_outbound_net_device(device); - if (!net_device) { - dev_err(&device->device, "unable to get net device..." - "device being destroyed?"); - return -1; - } - if (net_device->send_buf_size <= 0) { - ret = -EINVAL; - goto cleanup; - } - - net_device->send_buf = - (void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, - get_order(net_device->send_buf_size)); - if (!net_device->send_buf) { - dev_err(&device->device, "unable to allocate send " - "buffer of size %d", net_device->send_buf_size); - ret = -1; - goto cleanup; - } - - /* - * Establish the gpadl handle for this buffer on this - * channel. Note: This call uses the vmbus connection rather - * than the channel to establish the gpadl handle. - */ - ret = vmbus_establish_gpadl(device->channel, net_device->send_buf, - net_device->send_buf_size, - &net_device->send_buf_gpadl_handle); - if (ret != 0) { - dev_err(&device->device, "unable to establish send buffer's gpadl"); - goto cleanup; - } - - /* Notify the NetVsp of the gpadl handle */ - init_packet = &net_device->channel_init_pkt; - - memset(init_packet, 0, sizeof(struct nvsp_message)); - - init_packet->hdr.msg_type = NVSP_MSG1_TYPE_SEND_SEND_BUF; - init_packet->msg.v1_msg.send_recv_buf. - gpadl_handle = net_device->send_buf_gpadl_handle; - init_packet->msg.v1_msg.send_recv_buf.id = - NETVSC_SEND_BUFFER_ID; - - /* Send the gpadl notification request */ - ret = vmbus_sendpacket(device->channel, init_packet, - sizeof(struct nvsp_message), - (unsigned long)init_packet, - VM_PKT_DATA_INBAND, - VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); - if (ret != 0) { - dev_err(&device->device, - "unable to send receive buffer's gpadl to netvsp"); - goto cleanup; - } - - t = wait_for_completion_timeout(&net_device->channel_init_wait, HZ); - - BUG_ON(t == 0); - - /* Check the response */ - if (init_packet->msg.v1_msg. - send_send_buf_complete.status != NVSP_STAT_SUCCESS) { - dev_err(&device->device, "Unable to complete send buffer " - "initialzation with NetVsp - status %d", - init_packet->msg.v1_msg. - send_send_buf_complete.status); - ret = -1; - goto cleanup; - } - - net_device->send_section_size = init_packet-> - msg.v1_msg.send_send_buf_complete.section_size; - - goto exit; - -cleanup: - netvsc_destroy_send_buf(net_device); - -exit: - put_net_device(device); - return ret; -} - static int netvsc_connect_vsp(struct hv_device *device) { @@ -556,8 +400,6 @@ static int netvsc_connect_vsp(struct hv_device *device) /* Post the big receive buffer to NetVSP */ ret = netvsc_init_recv_buf(device); - if (ret == 0) - ret = netvsc_init_send_buf(device); cleanup: put_net_device(device); @@ -567,7 +409,6 @@ cleanup: static void netvsc_disconnect_vsp(struct netvsc_device *net_device) { netvsc_destroy_recv_buf(net_device); - netvsc_destroy_send_buf(net_device); } /* @@ -1099,8 +940,6 @@ int netvsc_device_add(struct hv_device *device, void *additional_info) net_device->recv_buf_size = NETVSC_RECEIVE_BUFFER_SIZE; spin_lock_init(&net_device->recv_pkt_list_lock); - net_device->send_buf_size = NETVSC_SEND_BUFFER_SIZE; - INIT_LIST_HEAD(&net_device->recv_pkt_list); for (i = 0; i < NETVSC_RECEIVE_PACKETLIST_COUNT; i++) { -- cgit v0.10.2 From 729a28495debadb0264c2c4906074c0692e0f29e Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Fri, 27 May 2011 06:21:54 -0700 Subject: staging: hv: convert DPRINT_DBG() to netdev_dbg() in dump_rndis_message() Signed-off-by: Haiyang Zhang Signed-off-by: Hank Janssen Signed-off-by: K. Y. Srinivasan Cc: Stephen Hemminger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/staging/hv/rndis_filter.c index 5a5bf64..5674a13 100644 --- a/drivers/staging/hv/rndis_filter.c +++ b/drivers/staging/hv/rndis_filter.c @@ -139,14 +139,17 @@ static void put_rndis_request(struct rndis_device *dev, kfree(req); } -static void dump_rndis_message(struct rndis_message *rndis_msg) +static void dump_rndis_message(struct hv_device *hv_dev, + struct rndis_message *rndis_msg) { + struct net_device *netdev = dev_get_drvdata(&hv_dev->device); + switch (rndis_msg->ndis_msg_type) { case REMOTE_NDIS_PACKET_MSG: - DPRINT_DBG(NETVSC, "REMOTE_NDIS_PACKET_MSG (len %u, " + netdev_dbg(netdev, "REMOTE_NDIS_PACKET_MSG (len %u, " "data offset %u data len %u, # oob %u, " "oob offset %u, oob len %u, pkt offset %u, " - "pkt len %u", + "pkt len %u\n", rndis_msg->msg_len, rndis_msg->msg.pkt.data_offset, rndis_msg->msg.pkt.data_len, @@ -158,10 +161,10 @@ static void dump_rndis_message(struct rndis_message *rndis_msg) break; case REMOTE_NDIS_INITIALIZE_CMPLT: - DPRINT_DBG(NETVSC, "REMOTE_NDIS_INITIALIZE_CMPLT " + netdev_dbg(netdev, "REMOTE_NDIS_INITIALIZE_CMPLT " "(len %u, id 0x%x, status 0x%x, major %d, minor %d, " "device flags %d, max xfer size 0x%x, max pkts %u, " - "pkt aligned %u)", + "pkt aligned %u)\n", rndis_msg->msg_len, rndis_msg->msg.init_complete.req_id, rndis_msg->msg.init_complete.status, @@ -176,9 +179,9 @@ static void dump_rndis_message(struct rndis_message *rndis_msg) break; case REMOTE_NDIS_QUERY_CMPLT: - DPRINT_DBG(NETVSC, "REMOTE_NDIS_QUERY_CMPLT " + netdev_dbg(netdev, "REMOTE_NDIS_QUERY_CMPLT " "(len %u, id 0x%x, status 0x%x, buf len %u, " - "buf offset %u)", + "buf offset %u)\n", rndis_msg->msg_len, rndis_msg->msg.query_complete.req_id, rndis_msg->msg.query_complete.status, @@ -189,16 +192,16 @@ static void dump_rndis_message(struct rndis_message *rndis_msg) break; case REMOTE_NDIS_SET_CMPLT: - DPRINT_DBG(NETVSC, - "REMOTE_NDIS_SET_CMPLT (len %u, id 0x%x, status 0x%x)", + netdev_dbg(netdev, + "REMOTE_NDIS_SET_CMPLT (len %u, id 0x%x, status 0x%x)\n", rndis_msg->msg_len, rndis_msg->msg.set_complete.req_id, rndis_msg->msg.set_complete.status); break; case REMOTE_NDIS_INDICATE_STATUS_MSG: - DPRINT_DBG(NETVSC, "REMOTE_NDIS_INDICATE_STATUS_MSG " - "(len %u, status 0x%x, buf len %u, buf offset %u)", + netdev_dbg(netdev, "REMOTE_NDIS_INDICATE_STATUS_MSG " + "(len %u, status 0x%x, buf len %u, buf offset %u)\n", rndis_msg->msg_len, rndis_msg->msg.indicate_status.status, rndis_msg->msg.indicate_status.status_buflen, @@ -206,7 +209,7 @@ static void dump_rndis_message(struct rndis_message *rndis_msg) break; default: - DPRINT_DBG(NETVSC, "0x%x (len %u)", + netdev_dbg(netdev, "0x%x (len %u)\n", rndis_msg->ndis_msg_type, rndis_msg->msg_len); break; @@ -387,7 +390,7 @@ int rndis_filter_receive(struct hv_device *dev, kunmap_atomic(rndis_hdr - pkt->page_buf[0].offset, KM_IRQ0); - dump_rndis_message(&rndis_msg); + dump_rndis_message(dev, &rndis_msg); switch (rndis_msg.ndis_msg_type) { case REMOTE_NDIS_PACKET_MSG: -- cgit v0.10.2 From 122a5f6410f49c28e901e4a911a110b675b8bd55 Mon Sep 17 00:00:00 2001 From: Haiyang Zhang Date: Fri, 27 May 2011 06:21:55 -0700 Subject: staging: hv: use delayed_work for netvsc_send_garp() Instead of sleeping in a scheduled work, we now use delayed_work for netvsc_send_garp(). Signed-off-by: Haiyang Zhang Signed-off-by: Hank Janssen Signed-off-by: K. Y. Srinivasan Cc: Stephen Hemminger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index f510959..33cab9c 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -46,7 +46,7 @@ struct net_device_context { /* point back to our device context */ struct hv_device *device_ctx; unsigned long avail; - struct work_struct work; + struct delayed_work dwork; }; @@ -217,7 +217,7 @@ void netvsc_linkstatus_callback(struct hv_device *device_obj, netif_wake_queue(net); netif_notify_peers(net); ndev_ctx = netdev_priv(net); - schedule_work(&ndev_ctx->work); + schedule_delayed_work(&ndev_ctx->dwork, msecs_to_jiffies(20)); } else { netif_carrier_off(net); netif_stop_queue(net); @@ -315,7 +315,7 @@ static const struct net_device_ops device_ops = { * Send GARP packet to network peers after migrations. * After Quick Migration, the network is not immediately operational in the * current context when receiving RNDIS_STATUS_MEDIA_CONNECT event. So, add - * another netif_notify_peers() into a scheduled work, otherwise GARP packet + * another netif_notify_peers() into a delayed work, otherwise GARP packet * will not be sent after quick migration, and cause network disconnection. */ static void netvsc_send_garp(struct work_struct *w) @@ -323,8 +323,7 @@ static void netvsc_send_garp(struct work_struct *w) struct net_device_context *ndev_ctx; struct net_device *net; - msleep(20); - ndev_ctx = container_of(w, struct net_device_context, work); + ndev_ctx = container_of(w, struct net_device_context, dwork.work); net = dev_get_drvdata(&ndev_ctx->device_ctx->device); netif_notify_peers(net); } @@ -348,7 +347,7 @@ static int netvsc_probe(struct hv_device *dev) net_device_ctx->device_ctx = dev; net_device_ctx->avail = ring_size; dev_set_drvdata(&dev->device, net); - INIT_WORK(&net_device_ctx->work, netvsc_send_garp); + INIT_DELAYED_WORK(&net_device_ctx->dwork, netvsc_send_garp); /* Notify the netvsc driver of the new device */ device_info.ring_size = ring_size; @@ -387,12 +386,16 @@ static int netvsc_probe(struct hv_device *dev) static int netvsc_remove(struct hv_device *dev) { struct net_device *net = dev_get_drvdata(&dev->device); + struct net_device_context *ndev_ctx; if (net == NULL) { dev_err(&dev->device, "No net device to remove\n"); return 0; } + ndev_ctx = netdev_priv(net); + cancel_delayed_work_sync(&ndev_ctx->dwork); + /* Stop outbound asap */ netif_stop_queue(net); -- cgit v0.10.2 From a1997c205e16536a3da93b3bb8fa1862c6cff1e7 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:25 -0700 Subject: Staging: hv: vmbus: In vmbus_child_driver_unregister() don't set the bus field to NULL As part of conforming to the Linux Driver Model, do not set the bus field to NULL when the driver un-registers. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index ec1d38c..51af6d8 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -631,7 +631,6 @@ void vmbus_child_driver_unregister(struct device_driver *drv) driver_unregister(drv); - drv->bus = NULL; } EXPORT_SYMBOL(vmbus_child_driver_unregister); -- cgit v0.10.2 From c63ba9e1e34c76b325e9eb1227994b310f9feeaa Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:26 -0700 Subject: Staging: hv: storvsc: Cleanup the exit function in storvsc_drv.c Get rid of unnecessary layering in the module exit path. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 942cc5f..e21f7e6 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -792,7 +792,7 @@ static int storvsc_drv_init(void) return ret; } -static void storvsc_drv_exit(void) +static void __exit storvsc_drv_exit(void) { vmbus_child_driver_unregister(&storvsc_drv.driver); } @@ -806,13 +806,8 @@ static int __init storvsc_init(void) return ret; } -static void __exit storvsc_exit(void) -{ - storvsc_drv_exit(); -} - MODULE_LICENSE("GPL"); MODULE_VERSION(HV_DRV_VERSION); MODULE_DESCRIPTION("Microsoft Hyper-V virtual storage driver"); module_init(storvsc_init); -module_exit(storvsc_exit); +module_exit(storvsc_drv_exit); -- cgit v0.10.2 From d9bbae8316989106c126849f0dfc71853ddc5d0d Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:27 -0700 Subject: Staging: hv: storvsc: Cleanup the module init function in storvsc_drv.c Get rid of unnecessary layering in the module init path. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index e21f7e6..33bce87 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -756,7 +756,7 @@ static struct hv_driver storvsc_drv = { /* * storvsc_drv_init - StorVsc driver initialization. */ -static int storvsc_drv_init(void) +static int __init storvsc_drv_init(void) { int ret; struct hv_driver *drv = &storvsc_drv; @@ -797,17 +797,8 @@ static void __exit storvsc_drv_exit(void) vmbus_child_driver_unregister(&storvsc_drv.driver); } -static int __init storvsc_init(void) -{ - int ret; - - DPRINT_INFO(STORVSC_DRV, "Storvsc initializing...."); - ret = storvsc_drv_init(); - return ret; -} - MODULE_LICENSE("GPL"); MODULE_VERSION(HV_DRV_VERSION); MODULE_DESCRIPTION("Microsoft Hyper-V virtual storage driver"); -module_init(storvsc_init); +module_init(storvsc_drv_init); module_exit(storvsc_drv_exit); -- cgit v0.10.2 From 2935a407e2173886457816e34c29b130f11198e5 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:28 -0700 Subject: Staging: hv: storvsc: Fix a bug in the storvsc_remove() function When the storvs driver unloads, we need to accomodate disk cache flushes. Re-order the code to permit this. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 33bce87..fd474d6 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -317,22 +317,20 @@ static int storvsc_remove(struct hv_device *dev) struct hv_host_device *host_dev = (struct hv_host_device *)host->hostdata; + DPRINT_INFO(STORVSC, "removing host adapter (%p)...", host); + scsi_remove_host(host); + + DPRINT_INFO(STORVSC, "releasing host adapter (%p)...", host); + scsi_host_put(host); /* * Call to the vsc driver to let it know that the device is being * removed */ storvsc_dev_remove(dev); - if (host_dev->request_pool) { kmem_cache_destroy(host_dev->request_pool); host_dev->request_pool = NULL; } - - DPRINT_INFO(STORVSC, "removing host adapter (%p)...", host); - scsi_remove_host(host); - - DPRINT_INFO(STORVSC, "releasing host adapter (%p)...", host); - scsi_host_put(host); return 0; } -- cgit v0.10.2 From d36b0a03420d0b0b96683bebbc5e7af16320b4bc Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:29 -0700 Subject: Staging: hv: storvsc: Cleanup some dated/unnecessary comments Cleanup some dated/unnecessary comments. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index fd474d6..499e1d7 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -308,9 +308,6 @@ static unsigned int copy_to_bounce_buffer(struct scatterlist *orig_sgl, } -/* - * storvsc_remove - Callback when our device is removed - */ static int storvsc_remove(struct hv_device *dev) { struct Scsi_Host *host = dev_get_drvdata(&dev->device); @@ -322,10 +319,7 @@ static int storvsc_remove(struct hv_device *dev) DPRINT_INFO(STORVSC, "releasing host adapter (%p)...", host); scsi_host_put(host); - /* - * Call to the vsc driver to let it know that the device is being - * removed - */ + storvsc_dev_remove(dev); if (host_dev->request_pool) { kmem_cache_destroy(host_dev->request_pool); @@ -423,7 +417,6 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) DPRINT_INFO(STORVSC_DRV, "sdev (%p) dev obj (%p) - host resetting...", scmnd->device, dev); - /* Invokes the vsc to reset the host/bus */ ret = storvsc_host_reset(dev); if (ret != 0) return ret; @@ -477,7 +470,6 @@ static void storvsc_commmand_completion(struct hv_storvsc_request *request) scmnd->host_scribble = NULL; scmnd->scsi_done = NULL; - /* !!DO NOT MODIFY the scmnd after this call */ scsi_done_fn(scmnd); kmem_cache_free(host_dev->request_pool, cmd_request); @@ -750,10 +742,6 @@ static struct hv_driver storvsc_drv = { .remove = storvsc_remove, }; - -/* - * storvsc_drv_init - StorVsc driver initialization. - */ static int __init storvsc_drv_init(void) { int ret; -- cgit v0.10.2 From 940861210faca66644035f30ed26cdbda557b9de Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:30 -0700 Subject: Staging: hv: stor: Get rid of unnecessary DPRINTs in stor vsc_drv.c Get rid of unnecessary DPRINTs in stor vsc_drv.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 499e1d7..73fbded 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -92,12 +92,8 @@ static int storvsc_device_configure(struct scsi_device *sdevice) scsi_adjust_queue_depth(sdevice, MSG_SIMPLE_TAG, STORVSC_MAX_IO_REQUESTS); - DPRINT_INFO(STORVSC_DRV, "sdev (%p) - setting max segment size to %ld", - sdevice, PAGE_SIZE); blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE); - DPRINT_INFO(STORVSC_DRV, "sdev (%p) - adding merge bio vec routine", - sdevice); blk_queue_merge_bvec(sdevice->request_queue, storvsc_merge_bvec); blk_queue_bounce_limit(sdevice->request_queue, BLK_BOUNCE_ANY); @@ -314,10 +310,8 @@ static int storvsc_remove(struct hv_device *dev) struct hv_host_device *host_dev = (struct hv_host_device *)host->hostdata; - DPRINT_INFO(STORVSC, "removing host adapter (%p)...", host); scsi_remove_host(host); - DPRINT_INFO(STORVSC, "releasing host adapter (%p)...", host); scsi_host_put(host); storvsc_dev_remove(dev); @@ -349,9 +343,6 @@ static int storvsc_get_chs(struct scsi_device *sdev, struct block_device * bdev, info[1] = sectors_pt; info[2] = (int)cylinders; - DPRINT_INFO(STORVSC_DRV, "CHS (%d, %d, %d)", (int)cylinders, heads, - sectors_pt); - return 0; } @@ -362,7 +353,6 @@ static int storvsc_host_reset(struct hv_device *device) struct vstor_packet *vstor_packet; int ret, t; - DPRINT_INFO(STORVSC, "resetting host adapter..."); stor_device = get_stor_device(device); if (!stor_device) @@ -391,7 +381,6 @@ static int storvsc_host_reset(struct hv_device *device) goto cleanup; } - DPRINT_INFO(STORVSC, "host adapter reset completed"); /* * At this point, all outstanding requests in the adapter @@ -414,16 +403,10 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) (struct hv_host_device *)scmnd->device->host->hostdata; struct hv_device *dev = host_dev->dev; - DPRINT_INFO(STORVSC_DRV, "sdev (%p) dev obj (%p) - host resetting...", - scmnd->device, dev); - ret = storvsc_host_reset(dev); if (ret != 0) return ret; - DPRINT_INFO(STORVSC_DRV, "sdev (%p) dev obj (%p) - host reseted", - scmnd->device, dev); - return ret; } @@ -500,8 +483,6 @@ static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd, cmd_request = (struct storvsc_cmd_request *)scmnd->host_scribble; - DPRINT_INFO(STORVSC_DRV, "retrying scmnd %p cmd_request %p", - scmnd, cmd_request); goto retry_request; } -- cgit v0.10.2 From 990f05e6cbad5c7af01b160b6d4158db9d20ca27 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:31 -0700 Subject: Staging: hv: stor: Rename the vriable gStorVscDeviceType in storvsc_drv.c Rename the vriable gStorVscDeviceType in storvsc_drv.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 73fbded..9e51356 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)"); static const char *driver_name = "storvsc"; /* {ba6163d9-04a1-4d29-b605-72e2ffb1dc7f} */ -static const struct hv_guid gStorVscDeviceType = { +static const struct hv_guid stor_vsci_device_type = { .data = { 0xd9, 0x63, 0x61, 0xba, 0xa1, 0x04, 0x29, 0x4d, 0xb6, 0x05, 0x72, 0xe2, 0xff, 0xb1, 0xdc, 0x7f @@ -742,7 +742,7 @@ static int __init storvsc_drv_init(void) sizeof(struct vstor_packet) + sizeof(u64), sizeof(u64))); - memcpy(&drv->dev_type, &gStorVscDeviceType, + memcpy(&drv->dev_type, &stor_vsci_device_type, sizeof(struct hv_guid)); if (max_outstanding_req_per_channel < -- cgit v0.10.2 From a838f9dcb9e5e6d61d91148fc269d7f378575834 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:32 -0700 Subject: Staging: hv: stor: Get rid of the unused initialization of the name field The name field of hv_driver is unused in storvsc_drv.c; get rid of it. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 9e51356..53e9ebd 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -749,7 +749,6 @@ static int __init storvsc_drv_init(void) STORVSC_MAX_IO_REQUESTS) return -1; - drv->name = driver_name; drv->driver.name = driver_name; -- cgit v0.10.2 From efb83a7f46386a2c07866e9b48275ec3bfe22895 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:33 -0700 Subject: Staging: hv: blk: Get rid of the unused initialization of the name field The name field of hv_driver is unused in blkvsc_drv.c; get rid of it. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c index 46daade..bcf562f 100644 --- a/drivers/staging/hv/blkvsc_drv.c +++ b/drivers/staging/hv/blkvsc_drv.c @@ -824,7 +824,6 @@ static int blkvsc_drv_init(void) BUILD_BUG_ON(sizeof(sector_t) != 8); memcpy(&drv->dev_type, &dev_type, sizeof(struct hv_guid)); - drv->name = drv_name; drv->driver.name = drv_name; /* The driver belongs to vmbus */ -- cgit v0.10.2 From 2aa05dcbfbc017ac99c15de8da9d6c840a3acd5b Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:34 -0700 Subject: Staging: hv: mouse: Get rid of the unused initialization of the name field The name field of hv_driver is unused in hv_mouse.c; get rid of it. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hv_mouse.c b/drivers/staging/hv/hv_mouse.c index 359e737..b191810 100644 --- a/drivers/staging/hv/hv_mouse.c +++ b/drivers/staging/hv/hv_mouse.c @@ -936,7 +936,6 @@ static int __init mousevsc_init(void) sizeof(struct hv_guid)); drv->driver.name = driver_name; - drv->name = driver_name; /* The driver belongs to vmbus */ vmbus_child_driver_register(&drv->driver); -- cgit v0.10.2 From 604a1eb0eb67c38e29f9efd8d20668904f93b50c Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:35 -0700 Subject: Staging: hv: vmbus: Don't free the channel when the channel is closed When the driver unloads, the device must persist. A channel represents the device and so we should not free the channel when the channel is closed as part of the driver unloading. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index f655e59..aca9ac8 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -552,7 +552,6 @@ void vmbus_close(struct vmbus_channel *channel) { struct vmbus_channel_close_channel *msg; struct vmbus_channel_msginfo *info; - unsigned long flags; int ret; /* Stop callback and cancel the timer asap */ @@ -591,19 +590,6 @@ void vmbus_close(struct vmbus_channel *channel) kfree(info); - /* - * If we are closing the channel during an error path in - * opening the channel, don't free the channel since the - * caller will free the channel - */ - - if (channel->state == CHANNEL_OPEN_STATE) { - spin_lock_irqsave(&vmbus_connection.channel_lock, flags); - list_del(&channel->listentry); - spin_unlock_irqrestore(&vmbus_connection.channel_lock, flags); - - free_channel(channel); - } } EXPORT_SYMBOL_GPL(vmbus_close); -- cgit v0.10.2 From 3e1edf6a6c0c4140bb6c22fe880d924f4d10b164 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:36 -0700 Subject: Staging: hv: storvsc: Add a DMI signature to support auto-loading To support auto-loading the storvsc driver, add a DMI signature. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 53e9ebd..2c6d2f2 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -723,6 +724,27 @@ static struct hv_driver storvsc_drv = { .remove = storvsc_remove, }; +/* + * We use a DMI table to determine if we should autoload this driver This is + * needed by distro tools to determine if the hyperv drivers should be + * installed and/or configured. We don't do anything else with the table, but + * it needs to be present. + */ + +static const struct dmi_system_id __initconst +hv_stor_dmi_table[] __maybe_unused = { + { + .ident = "Hyper-V", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"), + DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"), + }, + }, + { }, +}; +MODULE_DEVICE_TABLE(dmi, hv_stor_dmi_table); + static int __init storvsc_drv_init(void) { int ret; -- cgit v0.10.2 From 9aaa995e6af6ede7b06e3379d09ae70065c04d82 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:37 -0700 Subject: Staging: hv: vmbus: Change the signature of vmbus_bus_init() In preparation for making the vmbus driver an ACPI bus driver, change the signature of vmbus_bus_init() to accept the irq value. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 51af6d8..1b69339 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -528,7 +528,7 @@ static irqreturn_t vmbus_isr(int irq, void *dev_id) * - get the irq resource * - retrieve the channel offers */ -static int vmbus_bus_init(struct pci_dev *pdev) +static int vmbus_bus_init(int irq) { int ret; unsigned int vector; @@ -552,13 +552,13 @@ static int vmbus_bus_init(struct pci_dev *pdev) } /* Get the interrupt resource */ - ret = request_irq(pdev->irq, vmbus_isr, + ret = request_irq(irq, vmbus_isr, IRQF_SHARED | IRQF_SAMPLE_RANDOM, - driver_name, pdev); + driver_name, hv_pci_dev); if (ret != 0) { pr_err("Unable to request IRQ %d\n", - pdev->irq); + irq); bus_unregister(&hv_bus); @@ -566,7 +566,7 @@ static int vmbus_bus_init(struct pci_dev *pdev) goto cleanup; } - vector = IRQ0_VECTOR + pdev->irq; + vector = IRQ0_VECTOR + irq; /* * Notify the hypervisor of our irq and @@ -575,7 +575,7 @@ static int vmbus_bus_init(struct pci_dev *pdev) on_each_cpu(hv_synic_init, (void *)&vector, 1); ret = vmbus_connect(); if (ret) { - free_irq(pdev->irq, pdev); + free_irq(irq, hv_pci_dev); bus_unregister(&hv_bus); goto cleanup; } @@ -795,7 +795,7 @@ static int __devinit hv_pci_probe(struct pci_dev *pdev, if (pdev->irq == 0) pdev->irq = irq; - pci_probe_error = vmbus_bus_init(pdev); + pci_probe_error = vmbus_bus_init(pdev->irq); if (pci_probe_error) pci_disable_device(pdev); -- cgit v0.10.2 From 3d2de26762433dc7569b62ced95bde9b3189467f Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:38 -0700 Subject: Staging: hv: vmbus: Use the DSDT specified irq for vmbus DSDT specifies the irq value for the vmbus driver; use it unconditionally. This is an exclusive interrupt line dedicated for the vmbus driver. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 1b69339..5d7ecfd 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -552,9 +552,8 @@ static int vmbus_bus_init(int irq) } /* Get the interrupt resource */ - ret = request_irq(irq, vmbus_isr, - IRQF_SHARED | IRQF_SAMPLE_RANDOM, - driver_name, hv_pci_dev); + ret = request_irq(irq, vmbus_isr, IRQF_SAMPLE_RANDOM, + driver_name, hv_pci_dev); if (ret != 0) { pr_err("Unable to request IRQ %d\n", @@ -787,15 +786,7 @@ static int __devinit hv_pci_probe(struct pci_dev *pdev, if (pci_probe_error) goto probe_cleanup; - /* - * If the PCI sub-sytem did not assign us an - * irq, use the bios provided one. - */ - - if (pdev->irq == 0) - pdev->irq = irq; - - pci_probe_error = vmbus_bus_init(pdev->irq); + pci_probe_error = vmbus_bus_init(irq); if (pci_probe_error) pci_disable_device(pdev); -- cgit v0.10.2 From 607c1a11d0ca017d12134444c3cca4da1f6594f8 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:39 -0700 Subject: Staging: hv: vmbus: Make vmbus an acpi bus driver Now, make the vmbus driver an ACPI bus driver. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 5d7ecfd..176a8cd 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -39,7 +39,7 @@ #include "hyperv_vmbus.h" -static struct pci_dev *hv_pci_dev; +static struct acpi_device *hv_acpi_dev; static struct tasklet_struct msg_dpc; static struct tasklet_struct event_dpc; @@ -49,7 +49,6 @@ EXPORT_SYMBOL(vmbus_loglevel); /* (ALL_MODULES << 16 | DEBUG_LVL_ENTEREXIT); */ /* (((VMBUS | VMBUS_DRV)<<16) | DEBUG_LVL_ENTEREXIT); */ -static int pci_probe_error; static struct completion probe_event; static int irq; @@ -553,7 +552,7 @@ static int vmbus_bus_init(int irq) /* Get the interrupt resource */ ret = request_irq(irq, vmbus_isr, IRQF_SAMPLE_RANDOM, - driver_name, hv_pci_dev); + driver_name, hv_acpi_dev); if (ret != 0) { pr_err("Unable to request IRQ %d\n", @@ -574,7 +573,7 @@ static int vmbus_bus_init(int irq) on_each_cpu(hv_synic_init, (void *)&vector, 1); ret = vmbus_connect(); if (ret) { - free_irq(irq, hv_pci_dev); + free_irq(irq, hv_acpi_dev); bus_unregister(&hv_bus); goto cleanup; } @@ -674,7 +673,7 @@ int vmbus_child_device_register(struct hv_device *child_device_obj) /* The new device belongs to this bus */ child_device_obj->device.bus = &hv_bus; /* device->dev.bus; */ - child_device_obj->device.parent = &hv_pci_dev->dev; + child_device_obj->device.parent = &hv_acpi_dev->dev; child_device_obj->device.release = vmbus_device_release; /* @@ -731,6 +730,8 @@ static int vmbus_acpi_add(struct acpi_device *device) { acpi_status result; + hv_acpi_dev = device; + result = acpi_walk_resources(device->handle, METHOD_NAME__CRS, vmbus_walk_resources, &irq); @@ -777,25 +778,6 @@ static void vmbus_acpi_exit(void) } -static int __devinit hv_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - hv_pci_dev = pdev; - - pci_probe_error = pci_enable_device(pdev); - if (pci_probe_error) - goto probe_cleanup; - - pci_probe_error = vmbus_bus_init(irq); - - if (pci_probe_error) - pci_disable_device(pdev); - -probe_cleanup: - complete(&probe_event); - return pci_probe_error; -} - /* * We use a PCI table to determine if we should autoload this driver This is * needed by distro tools to determine if the hyperv drivers should be @@ -808,13 +790,7 @@ static const struct pci_device_id microsoft_hv_pci_table[] = { }; MODULE_DEVICE_TABLE(pci, microsoft_hv_pci_table); -static struct pci_driver hv_bus_driver = { - .name = "hv_bus", - .probe = hv_pci_probe, - .id_table = microsoft_hv_pci_table, -}; - -static int __init hv_pci_init(void) +static int __init hv_acpi_init(void) { int ret; @@ -835,21 +811,7 @@ static int __init hv_pci_init(void) return -ENODEV; } - vmbus_acpi_exit(); - init_completion(&probe_event); - ret = pci_register_driver(&hv_bus_driver); - if (ret) - return ret; - /* - * All the vmbus initialization occurs within the - * hv_pci_probe() function. Wait for hv_pci_probe() - * to complete. - */ - wait_for_completion(&probe_event); - - if (pci_probe_error) - pci_unregister_driver(&hv_bus_driver); - return pci_probe_error; + return vmbus_bus_init(irq); } @@ -857,4 +819,4 @@ MODULE_LICENSE("GPL"); MODULE_VERSION(HV_DRV_VERSION); module_param(vmbus_loglevel, int, S_IRUGO|S_IWUSR); -module_init(hv_pci_init); +module_init(hv_acpi_init); -- cgit v0.10.2 From 0246604ce0367b0c414cc77a05362308ef4ede54 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:40 -0700 Subject: Staging: hv: vmbus: Get rid of vmbus_acpi_init() by inlining the code Staging: hv: vmbus: Get rid of vmbus_acpi_init() by inlining the code. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 176a8cd..d799f42 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -758,18 +758,6 @@ static struct acpi_driver vmbus_acpi_driver = { }, }; -static int vmbus_acpi_init(void) -{ - int result; - - - result = acpi_bus_register_driver(&vmbus_acpi_driver); - if (result < 0) - return result; - - return 0; -} - static void vmbus_acpi_exit(void) { acpi_bus_unregister_driver(&vmbus_acpi_driver); @@ -800,7 +788,8 @@ static int __init hv_acpi_init(void) * Get irq resources first. */ - ret = vmbus_acpi_init(); + ret = acpi_bus_register_driver(&vmbus_acpi_driver); + if (ret) return ret; -- cgit v0.10.2 From 2da9e1d6d4ae4cde1ad6d9e365417aabf466c665 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:41 -0700 Subject: Staging: hv: vmbus: Get rid of vmbus_acpi_exit() by inlining the code Get rid of vmbus_acpi_exit() by inlining the code. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index d799f42..39cd277 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -758,14 +758,6 @@ static struct acpi_driver vmbus_acpi_driver = { }, }; -static void vmbus_acpi_exit(void) -{ - acpi_bus_unregister_driver(&vmbus_acpi_driver); - - return; -} - - /* * We use a PCI table to determine if we should autoload this driver This is * needed by distro tools to determine if the hyperv drivers should be @@ -796,7 +788,7 @@ static int __init hv_acpi_init(void) wait_for_completion(&probe_event); if (irq <= 0) { - vmbus_acpi_exit(); + acpi_bus_unregister_driver(&vmbus_acpi_driver); return -ENODEV; } -- cgit v0.10.2 From 9d7b18d1844fa0bd0f9c5da3c12c1315a3a465fd Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:42 -0700 Subject: Staging: hv: vmbus: Add the DSDT _HID name as well Add the DSDT _HID name as well, in addition to the _DDN name. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 39cd277..1a26252 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -746,6 +746,7 @@ static int vmbus_acpi_add(struct acpi_device *device) static const struct acpi_device_id vmbus_acpi_device_ids[] = { {"VMBUS", 0}, + {"VMBus", 0}, {"", 0}, }; MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids); -- cgit v0.10.2 From 3a4505897ccaf387f4befa8c0d308d994bcdbc37 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:43 -0700 Subject: Staging: hv: blkvsc: Fix bugs in the module unload path Fix bugs in the module unload path for the blkvsc driver. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c index bcf562f..a44fc76 100644 --- a/drivers/staging/hv/blkvsc_drv.c +++ b/drivers/staging/hv/blkvsc_drv.c @@ -518,22 +518,18 @@ static int blkvsc_remove(struct hv_device *dev) blkvsc_do_operation(blkdev, DO_FLUSH); - blk_cleanup_queue(blkdev->gd->queue); + if (blkdev->users == 0) { + del_gendisk(blkdev->gd); + put_disk(blkdev->gd); + blk_cleanup_queue(blkdev->gd->queue); - /* - * Call to the vsc driver to let it know that the device is being - * removed - */ - storvsc_dev_remove(dev); - - del_gendisk(blkdev->gd); + storvsc_dev_remove(blkdev->device_ctx); - kmem_cache_destroy(blkdev->request_pool); - - kfree(blkdev); + kmem_cache_destroy(blkdev->request_pool); + kfree(blkdev); + } return 0; - } static void blkvsc_shutdown(struct hv_device *dev) @@ -568,13 +564,23 @@ static int blkvsc_release(struct gendisk *disk, fmode_t mode) struct block_device_context *blkdev = disk->private_data; unsigned long flags; - if (blkdev->users == 1) { + spin_lock_irqsave(&blkdev->lock, flags); + + if ((--blkdev->users == 0) && (blkdev->shutting_down)) { + blk_stop_queue(blkdev->gd->queue); + spin_unlock_irqrestore(&blkdev->lock, flags); + blkvsc_do_operation(blkdev, DO_FLUSH); - } + del_gendisk(blkdev->gd); + put_disk(blkdev->gd); + blk_cleanup_queue(blkdev->gd->queue); - spin_lock_irqsave(&blkdev->lock, flags); - blkdev->users--; - spin_unlock_irqrestore(&blkdev->lock, flags); + storvsc_dev_remove(blkdev->device_ctx); + + kmem_cache_destroy(blkdev->request_pool); + kfree(blkdev); + } else + spin_unlock_irqrestore(&blkdev->lock, flags); return 0; } -- cgit v0.10.2 From 30c1edc63953acbb15ee2f08fedc07811de12f0b Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:44 -0700 Subject: Staging: hv: blkvsc: We don't support removable media; get rid of unnecessary state We don't support removable media; get rid of unnecessary state. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c index a44fc76..3612574 100644 --- a/drivers/staging/hv/blkvsc_drv.c +++ b/drivers/staging/hv/blkvsc_drv.c @@ -926,7 +926,6 @@ static int blkvsc_probe(struct hv_device *dev) else blkdev->gd->first_minor = 0; blkdev->gd->fops = &block_ops; - blkdev->gd->events = DISK_EVENT_MEDIA_CHANGE; blkdev->gd->private_data = blkdev; blkdev->gd->driverfs_dev = &(blkdev->device_ctx->device); sprintf(blkdev->gd->disk_name, "hd%c", 'a' + major_info.index); -- cgit v0.10.2 From 6a8ddc71b77b9f88a41a336dea383582f8eddbd6 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:45 -0700 Subject: Staging: hv: vmbus: Get rid of the timer based handling of channel events Get rid of the timer based handling of channel events. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index aca9ac8..a4bee81 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -889,7 +889,6 @@ void vmbus_onchannel_event(struct vmbus_channel *channel) channel->onchannel_callback(channel->channel_callback_context); - mod_timer(&channel->poll_timer, jiffies + usecs_to_jiffies(100)); } /* -- cgit v0.10.2 From 7259d82321814393bd59f667623130e44b6ed26b Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:46 -0700 Subject: Staging: hv: vmbus: Get rid of the call to dump channel state in channel event handler Get rid of the call to dump channel state in channel event handler. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index a4bee81..7854de2 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -885,7 +885,6 @@ EXPORT_SYMBOL_GPL(vmbus_recvpacket_raw); */ void vmbus_onchannel_event(struct vmbus_channel *channel) { - dump_vmbus_channel(channel); channel->onchannel_callback(channel->channel_callback_context); -- cgit v0.10.2 From df452fa120cfe0ac6aa4255425b303a9863e3cc1 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:47 -0700 Subject: Staging: hv: vmbus: Directly invoke the channel callback Now, directly invoke the channel callback. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c index 37bbf77..fc93bdf 100644 --- a/drivers/staging/hv/connection.c +++ b/drivers/staging/hv/connection.c @@ -262,7 +262,7 @@ static void process_chn_event(u32 relid) channel = relid2channel(relid); if (channel) { - vmbus_onchannel_event(channel); + channel->onchannel_callback(channel->channel_callback_context); } else { pr_err("channel not found for relid - %u\n", relid); } -- cgit v0.10.2 From d66434782cae2fa5ac905d1e2f6f6480126d30c0 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:48 -0700 Subject: Staging: hv: vmbus: Get rid of the unused wrapper - vmbus_onchannel_event() Now, get rid of the unused wrapper - vmbus_onchannel_event(). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 7854de2..334885d 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -881,16 +881,6 @@ int vmbus_recvpacket_raw(struct vmbus_channel *channel, void *buffer, EXPORT_SYMBOL_GPL(vmbus_recvpacket_raw); /* - * vmbus_onchannel_event - Channel event callback - */ -void vmbus_onchannel_event(struct vmbus_channel *channel) -{ - - channel->onchannel_callback(channel->channel_callback_context); - -} - -/* * vmbus_ontimer - Timer event callback */ void vmbus_ontimer(unsigned long data) diff --git a/drivers/staging/hv/hyperv.h b/drivers/staging/hv/hyperv.h index 3310e9b..e881cfe 100644 --- a/drivers/staging/hv/hyperv.h +++ b/drivers/staging/hv/hyperv.h @@ -691,7 +691,6 @@ extern int vmbus_recvpacket_raw(struct vmbus_channel *channel, u32 *buffer_actual_len, u64 *requestid); -extern void vmbus_onchannel_event(struct vmbus_channel *channel); extern void vmbus_get_debug_info(struct vmbus_channel *channel, struct vmbus_channel_debug_info *debug); -- cgit v0.10.2 From 0a62040eac5ec13e5ffca82e4d9a7dca888fa236 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:49 -0700 Subject: Staging: hv: vmbus: Get rid of unneeded calls to dump_vmbus_channel Get rid of unneeded calls to dump_vmbus_channel and get rid of the unused static function that dumps the channel. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 334885d..b6f8674 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -39,7 +39,6 @@ static int create_gpadl_header( u32 size, /* page-size multiple */ struct vmbus_channel_msginfo **msginfo, u32 *messagecount); -static void dump_vmbus_channel(struct vmbus_channel *channel); static void vmbus_setevent(struct vmbus_channel *channel); /* @@ -618,7 +617,6 @@ int vmbus_sendpacket(struct vmbus_channel *channel, const void *buffer, u64 aligned_data = 0; int ret; - dump_vmbus_channel(channel); /* Setup the descriptor */ desc.type = type; /* VmbusPacketTypeDataInBand; */ @@ -665,7 +663,6 @@ int vmbus_sendpacket_pagebuffer(struct vmbus_channel *channel, if (pagecount > MAX_PAGE_BUFFER_COUNT) return -EINVAL; - dump_vmbus_channel(channel); /* * Adjust the size down since vmbus_channel_packet_page_buffer is the @@ -725,7 +722,6 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel, u32 pfncount = NUM_PAGES_SPANNED(multi_pagebuffer->offset, multi_pagebuffer->len); - dump_vmbus_channel(channel); if ((pfncount < 0) || (pfncount > MAX_MULTIPAGE_BUFFER_COUNT)) return -EINVAL; @@ -891,12 +887,3 @@ void vmbus_ontimer(unsigned long data) channel->onchannel_callback(channel->channel_callback_context); } -/* - * dump_vmbus_channel- Dump vmbus channel info to the console - */ -static void dump_vmbus_channel(struct vmbus_channel *channel) -{ - DPRINT_DBG(VMBUS, "Channel (%d)", channel->offermsg.child_relid); - hv_dump_ring_info(&channel->outbound, "Outbound "); - hv_dump_ring_info(&channel->inbound, "Inbound "); -} -- cgit v0.10.2 From ac4accb2bd619380c2404f9064e91f48674c6eb8 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:50 -0700 Subject: Staging: hv: vmbus: Get rid of the poll timer in the channel state Since tis is not used anymore, get rid of the poll timer in the channel state. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index b6f8674..b91b369 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -555,7 +555,6 @@ void vmbus_close(struct vmbus_channel *channel) /* Stop callback and cancel the timer asap */ channel->onchannel_callback = NULL; - del_timer_sync(&channel->poll_timer); /* Send a closing message */ info = kmalloc(sizeof(*info) + diff --git a/drivers/staging/hv/channel_mgmt.c b/drivers/staging/hv/channel_mgmt.c index 957d61e..178e1c4 100644 --- a/drivers/staging/hv/channel_mgmt.c +++ b/drivers/staging/hv/channel_mgmt.c @@ -283,10 +283,6 @@ static struct vmbus_channel *alloc_channel(void) spin_lock_init(&channel->inbound_lock); - init_timer(&channel->poll_timer); - channel->poll_timer.data = (unsigned long)channel; - channel->poll_timer.function = vmbus_ontimer; - channel->controlwq = create_workqueue("hv_vmbus_ctl"); if (!channel->controlwq) { kfree(channel); @@ -315,7 +311,6 @@ static void release_channel(struct work_struct *work) */ void free_channel(struct vmbus_channel *channel) { - del_timer_sync(&channel->poll_timer); /* * We have to release the channel's workqueue/thread in the vmbus's diff --git a/drivers/staging/hv/hyperv.h b/drivers/staging/hv/hyperv.h index e881cfe..73c251e 100644 --- a/drivers/staging/hv/hyperv.h +++ b/drivers/staging/hv/hyperv.h @@ -528,7 +528,6 @@ struct vmbus_channel { struct hv_device *device_obj; - struct timer_list poll_timer; /* SA-111 workaround */ struct work_struct work; enum vmbus_channel_state state; -- cgit v0.10.2 From ef0d5b23022e207e9f367de52f4172daab3ac690 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:51 -0700 Subject: Staging: hv: vmbus: Fix the memory barrier in hv_ringbuffer_read() Use the correct barrier interface. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/ring_buffer.c b/drivers/staging/hv/ring_buffer.c index 3da3330..932af1a 100644 --- a/drivers/staging/hv/ring_buffer.c +++ b/drivers/staging/hv/ring_buffer.c @@ -513,7 +513,7 @@ int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info, void *buffer, /* Make sure all reads are done before we update the read index since */ /* the writer may start writing to the read area once the read index */ /*is updated */ - mb(); + smp_mb(); /* Update the read index */ hv_set_next_read_location(inring_info, next_read_location); -- cgit v0.10.2 From df2a4a711478f5fc28b3ac85f07e191591e31eb0 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:52 -0700 Subject: Staging: hv: vmbus: Introduce read dependency in hv_get_ringbuffer_availbytes() Introduce read dependency in hv_get_ringbuffer_availbytes(). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/ring_buffer.c b/drivers/staging/hv/ring_buffer.c index 932af1a..8b62553 100644 --- a/drivers/staging/hv/ring_buffer.c +++ b/drivers/staging/hv/ring_buffer.c @@ -50,6 +50,8 @@ hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi, { u32 read_loc, write_loc; + smp_read_barrier_depends(); + /* Capture the read/write indices before they changed */ read_loc = rbi->ring_buffer->read_index; write_loc = rbi->ring_buffer->write_index; -- cgit v0.10.2 From e690b5a9be26965543b7252492ed22052af960b6 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:53 -0700 Subject: Staging: hv: vmbus: Change the memory barrier in hv_ringbuffer_write() Use the correct memory barrier interface in Change the memory barrier in hv_ringbuffer_write(). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/ring_buffer.c b/drivers/staging/hv/ring_buffer.c index 8b62553..42f7672 100644 --- a/drivers/staging/hv/ring_buffer.c +++ b/drivers/staging/hv/ring_buffer.c @@ -413,7 +413,7 @@ int hv_ringbuffer_write(struct hv_ring_buffer_info *outring_info, sizeof(u64)); /* Make sure we flush all writes before updating the writeIndex */ - mb(); + smp_wmb(); /* Now, update the write location */ hv_set_next_write_location(outring_info, next_write_location); -- cgit v0.10.2 From 30fbee49b0715ff1eb1f91644983f2c35b9421d5 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:54 -0700 Subject: Staging: hv: vmbus: Get rid of the unused function vmbus_ontimer() Now, get rid of the unused function vmbus_ontimer(). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index b91b369..3e4422b 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -874,15 +874,3 @@ int vmbus_recvpacket_raw(struct vmbus_channel *channel, void *buffer, return 0; } EXPORT_SYMBOL_GPL(vmbus_recvpacket_raw); - -/* - * vmbus_ontimer - Timer event callback - */ -void vmbus_ontimer(unsigned long data) -{ - struct vmbus_channel *channel = (struct vmbus_channel *)data; - - if (channel->onchannel_callback) - channel->onchannel_callback(channel->channel_callback_context); -} - -- cgit v0.10.2 From bed9ba76546e8d0fbd7f7593e93d3423b03ea74c Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:55 -0700 Subject: Staging: hv: vmbus: Get rid of some dated comments in channel.c Get rid of some dated comments in channel.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 3e4422b..95b410f 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -633,7 +633,6 @@ int vmbus_sendpacket(struct vmbus_channel *channel, const void *buffer, ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3); - /* TODO: We should determine if this is optional */ if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound)) vmbus_setevent(channel); @@ -695,7 +694,6 @@ int vmbus_sendpacket_pagebuffer(struct vmbus_channel *channel, ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3); - /* TODO: We should determine if this is optional */ if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound)) vmbus_setevent(channel); @@ -758,7 +756,6 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel, ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3); - /* TODO: We should determine if this is optional */ if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound)) vmbus_setevent(channel); -- cgit v0.10.2 From f27df643d045c146f3233b67ad7d161d1aa1e730 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:56 -0700 Subject: Staging: hv: vmbus: Correct some dated comments in channel.c Correct some dated comments in channel.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 95b410f..043fe25 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -185,12 +185,12 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size, openMsg = (struct vmbus_channel_open_channel *)openInfo->msg; openMsg->header.msgtype = CHANNELMSG_OPENCHANNEL; - openMsg->openid = newchannel->offermsg.child_relid; /* FIXME */ + openMsg->openid = newchannel->offermsg.child_relid; openMsg->child_relid = newchannel->offermsg.child_relid; openMsg->ringbuffer_gpadlhandle = newchannel->ringbuffer_gpadlhandle; openMsg->downstream_ringbuffer_pageoffset = send_ringbuffer_size >> PAGE_SHIFT; - openMsg->server_contextarea_gpadlhandle = 0; /* TODO */ + openMsg->server_contextarea_gpadlhandle = 0; if (userdatalen > MAX_USER_DEFINED_BYTES) { err = -EINVAL; @@ -364,11 +364,11 @@ static int create_gpadl_header(void *kbuffer, u32 size, (struct vmbus_channel_gpadl_body *)msgbody->msg; /* - * FIXME: * Gpadl is u32 and we are using a pointer which could * be 64-bit + * This is governed by the guest/host protocol and + * so the hypervisor gurantees that this is ok. */ - /* gpadl_body->Gpadl = kbuffer; */ for (i = 0; i < pfncurr; i++) gpadl_body->pfn[i] = pfn + pfnsum + i; @@ -462,7 +462,6 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, if (msgcount > 1) { list_for_each(curr, &msginfo->submsglist) { - /* FIXME: should this use list_entry() instead ? */ submsginfo = (struct vmbus_channel_msginfo *)curr; gpadl_body = (struct vmbus_channel_gpadl_body *)submsginfo->msg; @@ -577,8 +576,6 @@ void vmbus_close(struct vmbus_channel *channel) vmbus_teardown_gpadl(channel, channel->ringbuffer_gpadlhandle); - /* TODO: Send a msg to release the childRelId */ - /* Cleanup the ring buffers for this channel */ hv_ringbuffer_cleanup(&channel->outbound); hv_ringbuffer_cleanup(&channel->inbound); -- cgit v0.10.2 From 7d7c75cd47e3850ad256c048f6e35e4a5cf8e1fd Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:57 -0700 Subject: Staging: hv: vmbus: Move the definition of struct vmbus_channel In preparation for embedding the state needed to close the channel, move the definition of struct vmbus_channel. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hyperv.h b/drivers/staging/hv/hyperv.h index 73c251e..93bbeab 100644 --- a/drivers/staging/hv/hyperv.h +++ b/drivers/staging/hv/hyperv.h @@ -523,45 +523,6 @@ enum vmbus_channel_state { CHANNEL_OPEN_STATE, }; -struct vmbus_channel { - struct list_head listentry; - - struct hv_device *device_obj; - - struct work_struct work; - - enum vmbus_channel_state state; - /* - * For util channels, stash the - * the service index for easy access. - */ - s8 util_index; - - struct vmbus_channel_offer_channel offermsg; - /* - * These are based on the OfferMsg.MonitorId. - * Save it here for easy access. - */ - u8 monitor_grp; - u8 monitor_bit; - - u32 ringbuffer_gpadlhandle; - - /* Allocated memory for ring buffer */ - void *ringbuffer_pages; - u32 ringbuffer_pagecount; - struct hv_ring_buffer_info outbound; /* send to parent */ - struct hv_ring_buffer_info inbound; /* receive from parent */ - spinlock_t inbound_lock; - struct workqueue_struct *controlwq; - - /* Channel callback are invoked in this workqueue context */ - /* HANDLE dataWorkQueue; */ - - void (*onchannel_callback)(void *context); - void *channel_callback_context; -}; - struct vmbus_channel_debug_info { u32 relid; enum vmbus_channel_state state; @@ -608,6 +569,44 @@ struct vmbus_channel_msginfo { unsigned char msg[0]; }; +struct vmbus_channel { + struct list_head listentry; + + struct hv_device *device_obj; + + struct work_struct work; + + enum vmbus_channel_state state; + /* + * For util channels, stash the + * the service index for easy access. + */ + s8 util_index; + + struct vmbus_channel_offer_channel offermsg; + /* + * These are based on the OfferMsg.MonitorId. + * Save it here for easy access. + */ + u8 monitor_grp; + u8 monitor_bit; + + u32 ringbuffer_gpadlhandle; + + /* Allocated memory for ring buffer */ + void *ringbuffer_pages; + u32 ringbuffer_pagecount; + struct hv_ring_buffer_info outbound; /* send to parent */ + struct hv_ring_buffer_info inbound; /* receive from parent */ + spinlock_t inbound_lock; + struct workqueue_struct *controlwq; + + /* Channel callback are invoked in this workqueue context */ + /* HANDLE dataWorkQueue; */ + + void (*onchannel_callback)(void *context); + void *channel_callback_context; +}; void free_channel(struct vmbus_channel *channel); -- cgit v0.10.2 From f9f1db832b6d04303f443a7f941367355844678a Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:58 -0700 Subject: Staging: hv: vmbus: Embed the state needed to close the channel Now, embed the state needed to close the channel - so we would not have to allocate memory in the channel close path. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hyperv.h b/drivers/staging/hv/hyperv.h index 93bbeab..1747a24 100644 --- a/drivers/staging/hv/hyperv.h +++ b/drivers/staging/hv/hyperv.h @@ -569,6 +569,11 @@ struct vmbus_channel_msginfo { unsigned char msg[0]; }; +struct vmbus_close_msg { + struct vmbus_channel_msginfo info; + struct vmbus_channel_close_channel msg; +}; + struct vmbus_channel { struct list_head listentry; @@ -601,6 +606,8 @@ struct vmbus_channel { spinlock_t inbound_lock; struct workqueue_struct *controlwq; + struct vmbus_close_msg close_msg; + /* Channel callback are invoked in this workqueue context */ /* HANDLE dataWorkQueue; */ -- cgit v0.10.2 From e9a27a9f9ef18826030f6d50efde0dc68b7d1be2 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:49:59 -0700 Subject: Staging: hv: vmbus: Use the newly introduced state in closing the channel Now, use the newly introduced state in closing the channel and eliminate a potential failure condition (that currently was not being handled correctly). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 043fe25..5a2a947 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -549,22 +549,15 @@ EXPORT_SYMBOL_GPL(vmbus_teardown_gpadl); void vmbus_close(struct vmbus_channel *channel) { struct vmbus_channel_close_channel *msg; - struct vmbus_channel_msginfo *info; int ret; /* Stop callback and cancel the timer asap */ channel->onchannel_callback = NULL; /* Send a closing message */ - info = kmalloc(sizeof(*info) + - sizeof(struct vmbus_channel_close_channel), GFP_KERNEL); - /* FIXME: can't do anything other than return here because the - * function is void */ - if (!info) - return; + msg = &channel->close_msg.msg; - msg = (struct vmbus_channel_close_channel *)info->msg; msg->header.msgtype = CHANNELMSG_CLOSECHANNEL; msg->child_relid = channel->offermsg.child_relid; @@ -583,7 +576,6 @@ void vmbus_close(struct vmbus_channel *channel) free_pages((unsigned long)channel->ringbuffer_pages, get_order(channel->ringbuffer_pagecount * PAGE_SIZE)); - kfree(info); } EXPORT_SYMBOL_GPL(vmbus_close); -- cgit v0.10.2 From db545da77b197f580fe73a0a21a0982dd2def8e3 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:00 -0700 Subject: Staging: hv: vmbus: Get rid of a dated comment in vmbus_drv.c Get rid of a dated comment in vmbus_drv.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 1a26252..bc74030 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -486,7 +486,6 @@ static int vmbus_on_isr(void) if (msg->header.message_type != HVMSG_NONE) ret |= 0x1; - /* TODO: Check if there are events to be process */ page_addr = hv_context.synic_event_page[cpu]; event = (union hv_synic_event_flags *)page_addr + VMBUS_MESSAGE_SINT; -- cgit v0.10.2 From c0e2490fd42b0676e1ecb2d4ba7a6d0ec21d557b Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:01 -0700 Subject: Staging: hv: vmbus: Get rid of an unused function in connection.c Get rid of an unused function in connection.c Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c index fc93bdf..7d7f1d5 100644 --- a/drivers/staging/hv/connection.c +++ b/drivers/staging/hv/connection.c @@ -185,44 +185,6 @@ cleanup: return ret; } -/* - * vmbus_disconnect - - * Sends a disconnect request on the partition service connection - */ -int vmbus_disconnect(void) -{ - int ret = 0; - struct vmbus_channel_message_header *msg; - - /* Make sure we are connected */ - if (vmbus_connection.conn_state != CONNECTED) - return -1; - - msg = kzalloc(sizeof(struct vmbus_channel_message_header), GFP_KERNEL); - if (!msg) - return -ENOMEM; - - msg->msgtype = CHANNELMSG_UNLOAD; - - ret = vmbus_post_msg(msg, - sizeof(struct vmbus_channel_message_header)); - if (ret != 0) - goto cleanup; - - free_pages((unsigned long)vmbus_connection.int_page, 0); - free_pages((unsigned long)vmbus_connection.monitor_pages, 1); - - /* TODO: iterate thru the msg list and free up */ - destroy_workqueue(vmbus_connection.work_queue); - - vmbus_connection.conn_state = DISCONNECTED; - - pr_info("hv_vmbus disconnected\n"); - -cleanup: - kfree(msg); - return ret; -} /* * relid2channel - Get the channel object given its diff --git a/drivers/staging/hv/hyperv_vmbus.h b/drivers/staging/hv/hyperv_vmbus.h index bf30a42..349ad80 100644 --- a/drivers/staging/hv/hyperv_vmbus.h +++ b/drivers/staging/hv/hyperv_vmbus.h @@ -619,8 +619,6 @@ struct vmbus_channel *relid2channel(u32 relid); int vmbus_connect(void); -int vmbus_disconnect(void); - int vmbus_post_msg(void *buffer, size_t buflen); int vmbus_set_event(u32 child_relid); -- cgit v0.10.2 From 3740652d98b25477f6959a17922435385776d7d2 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:02 -0700 Subject: Staging: hv: vmbus: Get rid of a dated comment in channel_mgmt.c Staging: hv: vmbus: Get rid of a dated comment in channel_mgmt.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel_mgmt.c b/drivers/staging/hv/channel_mgmt.c index 178e1c4..2d270ce 100644 --- a/drivers/staging/hv/channel_mgmt.c +++ b/drivers/staging/hv/channel_mgmt.c @@ -477,7 +477,6 @@ static void vmbus_onoffer(struct vmbus_channel_message_header *hdr) newchannel->monitor_grp = (u8)offer->monitorid / 32; newchannel->monitor_bit = (u8)offer->monitorid % 32; - /* TODO: Make sure the offer comes from our parent partition */ INIT_WORK(&newchannel->work, vmbus_process_offer); queue_work(newchannel->controlwq, &newchannel->work); } -- cgit v0.10.2 From e826f1d505d3a6bfc304addc7f83c7afcc31c830 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:03 -0700 Subject: Staging: hv: vmbus: Fix a memory barrier call in vmbus_drv.c Use the correct memory barrier call in vmbus_drv.c Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index bc74030..921ca9a 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -455,7 +455,7 @@ static void vmbus_on_msg_dpc(unsigned long data) * will not deliver any more messages since there is * no empty slot */ - mb(); + smp_mb(); if (msg->header.message_flags.msg_pending) { /* -- cgit v0.10.2 From e8e27047746d1977bf547f93e701765f5ce6ec5f Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:04 -0700 Subject: Staging: hv: vmbus: Rename local variables in vmbus_drv.c Rename local variables in vmbus_drv.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 921ca9a..17692ce 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -107,12 +107,12 @@ static ssize_t vmbus_show_device_attr(struct device *dev, struct device_attribute *dev_attr, char *buf) { - struct hv_device *device_ctx = device_to_hv_device(dev); + struct hv_device *hv_dev = device_to_hv_device(dev); struct hv_device_info device_info; memset(&device_info, 0, sizeof(struct hv_device_info)); - get_channel_info(device_ctx, &device_info); + get_channel_info(hv_dev, &device_info); if (!strcmp(dev_attr->attr.name, "class_id")) { return sprintf(buf, "{%02x%02x%02x%02x-%02x%02x-%02x%02x-" @@ -300,10 +300,10 @@ static int vmbus_match(struct device *device, struct device_driver *driver) { int match = 0; struct hv_driver *drv = drv_to_hv_drv(driver); - struct hv_device *device_ctx = device_to_hv_device(device); + struct hv_device *hv_dev = device_to_hv_device(device); /* We found our driver ? */ - if (memcmp(&device_ctx->dev_type, &drv->dev_type, + if (memcmp(&hv_dev->dev_type, &drv->dev_type, sizeof(struct hv_guid)) == 0) match = 1; @@ -387,9 +387,9 @@ static void vmbus_shutdown(struct device *child_device) */ static void vmbus_device_release(struct device *device) { - struct hv_device *device_ctx = device_to_hv_device(device); + struct hv_device *hv_dev = device_to_hv_device(device); - kfree(device_ctx); + kfree(hv_dev); } -- cgit v0.10.2 From 40961de3350b99cfa93cd80437cb39ec287f839a Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:05 -0700 Subject: Staging: hv: vmbus: Increase the timeout for some critical calls Increase the timeout for some critical calls. In testing we discovered that the current timeout of 1 second was insufficient under some conditions. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 5a2a947..69b5641 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -480,7 +480,7 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, } } - t = wait_for_completion_timeout(&msginfo->waitevent, HZ); + t = wait_for_completion_timeout(&msginfo->waitevent, 5*HZ); BUG_ON(t == 0); @@ -530,7 +530,7 @@ int vmbus_teardown_gpadl(struct vmbus_channel *channel, u32 gpadl_handle) sizeof(struct vmbus_channel_gpadl_teardown)); BUG_ON(ret != 0); - t = wait_for_completion_timeout(&info->waitevent, HZ); + t = wait_for_completion_timeout(&info->waitevent, 5*HZ); BUG_ON(t == 0); /* Received a torndown response */ -- cgit v0.10.2 From f38cf9ccd61d2acd5bc9121fabf2f6e77d74b885 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:06 -0700 Subject: Staging: hv: vmbus: Properly handle memory allocation failure in channel.c Properly handle memory allocation failure in channel.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 69b5641..1833f27 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -355,9 +355,24 @@ static int create_gpadl_header(void *kbuffer, u32 size, sizeof(struct vmbus_channel_gpadl_body) + pfncurr * sizeof(u64); msgbody = kzalloc(msgsize, GFP_KERNEL); - /* FIXME: we probably need to more if this fails */ - if (!msgbody) + + if (!msgbody) { + struct vmbus_channel_msginfo *pos = NULL; + struct vmbus_channel_msginfo *tmp = NULL; + /* + * Free up all the allocated messages. + */ + list_for_each_entry_safe(pos, tmp, + &msgheader->submsglist, + msglistentry) { + + list_del(&pos->msglistentry); + kfree(pos); + } + goto nomem; + } + msgbody->msgsize = msgsize; (*messagecount)++; gpadl_body = -- cgit v0.10.2 From 6de925b18936c1f756981ba70a7d9915888a355d Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:07 -0700 Subject: Staging: hv: vmbus: Cleanup some error codes in vmbus_drv.c Cleanup some error codes in vmbus_drv.c Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 17692ce..a3c99f1 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -329,7 +329,7 @@ static int vmbus_probe(struct device *child_device) } else { pr_err("probe not set for driver %s\n", dev_name(child_device)); - ret = -1; + ret = -ENODEV; } return ret; } @@ -352,7 +352,7 @@ static int vmbus_remove(struct device *child_device) } else { pr_err("remove not set for driver %s\n", dev_name(child_device)); - ret = -1; + ret = -ENODEV; } } -- cgit v0.10.2 From d6c1c5de4e77d75e251bf30d68c99b7feae82ea2 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:08 -0700 Subject: Staging: hv: vmbus: Cleanup error handling in vmbus_bus_init() Cleanup error handling in vmbus_bus_init(). Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index a3c99f1..be158be 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -535,7 +535,7 @@ static int vmbus_bus_init(int irq) ret = hv_init(); if (ret != 0) { pr_err("Unable to initialize the hypervisor - 0x%x\n", ret); - goto cleanup; + return ret; } /* Initialize the bus context */ @@ -544,10 +544,8 @@ static int vmbus_bus_init(int irq) /* Now, register the bus with LDM */ ret = bus_register(&hv_bus); - if (ret) { - ret = -1; - goto cleanup; - } + if (ret) + return ret; /* Get the interrupt resource */ ret = request_irq(irq, vmbus_isr, IRQF_SAMPLE_RANDOM, @@ -559,8 +557,7 @@ static int vmbus_bus_init(int irq) bus_unregister(&hv_bus); - ret = -1; - goto cleanup; + return ret; } vector = IRQ0_VECTOR + irq; @@ -574,14 +571,13 @@ static int vmbus_bus_init(int irq) if (ret) { free_irq(irq, hv_acpi_dev); bus_unregister(&hv_bus); - goto cleanup; + return ret; } vmbus_request_offers(); -cleanup: - return ret; + return 0; } /** -- cgit v0.10.2 From 39594abcd47da2f587804dff2fedbd7ada4670d0 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:09 -0700 Subject: Staging: hv: vmbus: Cleanup error codes in hv.c Cleanup error codes in hv.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/hv.c b/drivers/staging/hv/hv.c index a2cc091..824f816 100644 --- a/drivers/staging/hv/hv.c +++ b/drivers/staging/hv/hv.c @@ -277,11 +277,11 @@ u16 hv_post_message(union hv_connection_id connection_id, unsigned long addr; if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT) - return -1; + return -EMSGSIZE; addr = (unsigned long)kmalloc(sizeof(struct aligned_input), GFP_ATOMIC); if (!addr) - return -1; + return -ENOMEM; aligned_msg = (struct hv_input_post_message *) (ALIGN(addr, HV_HYPERCALL_PARAM_ALIGN)); -- cgit v0.10.2 From 3a7546d934ca210ebeb51b1bb5180a3774cee443 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:10 -0700 Subject: Staging: hv: vmbus: Cleanup error codes in connection.c Cleanup error codes in connection.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c index 7d7f1d5..7e15392 100644 --- a/drivers/staging/hv/connection.c +++ b/drivers/staging/hv/connection.c @@ -51,13 +51,13 @@ int vmbus_connect(void) /* Make sure we are not connecting or connected */ if (vmbus_connection.conn_state != DISCONNECTED) - return -1; + return -EISCONN; /* Initialize the vmbus connection */ vmbus_connection.conn_state = CONNECTING; vmbus_connection.work_queue = create_workqueue("hv_vmbus_con"); if (!vmbus_connection.work_queue) { - ret = -1; + ret = -ENOMEM; goto cleanup; } @@ -74,7 +74,7 @@ int vmbus_connect(void) vmbus_connection.int_page = (void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, 0); if (vmbus_connection.int_page == NULL) { - ret = -1; + ret = -ENOMEM; goto cleanup; } @@ -90,7 +90,7 @@ int vmbus_connect(void) vmbus_connection.monitor_pages = (void *)__get_free_pages((GFP_KERNEL|__GFP_ZERO), 1); if (vmbus_connection.monitor_pages == NULL) { - ret = -1; + ret = -ENOMEM; goto cleanup; } @@ -157,7 +157,7 @@ int vmbus_connect(void) pr_err("Unable to connect, " "Version %d not supported by Hyper-V\n", VMBUS_REVISION_NUMBER); - ret = -1; + ret = -ECONNREFUSED; goto cleanup; } -- cgit v0.10.2 From 926ae5262171b2b23c94bc5cbd8dbb9d32152419 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:11 -0700 Subject: Staging: hv: vmbus: Cleanup some error values in channel.c Cleanup some error values in channel.c. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 1833f27..21f1efc 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -811,7 +811,7 @@ int vmbus_recvpacket(struct vmbus_channel *channel, void *buffer, pr_err("Buffer too small - got %d needs %d\n", bufferlen, userlen); - return -1; + return -ETOOSMALL; } *requestid = desc.trans_id; -- cgit v0.10.2 From 00d760b057e0fb1e5fb515071af2cc87d15439f8 Mon Sep 17 00:00:00 2001 From: "K. Y. Srinivasan" Date: Mon, 6 Jun 2011 15:50:12 -0700 Subject: Staging: hv: vmbus: Change Cleanup to cleanup in channel.c Change the jump label Cleanup to cleanup. Signed-off-by: K. Y. Srinivasan Signed-off-by: Haiyang Zhang Signed-off-by: Abhishek Kane Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c index 21f1efc..cffca7c 100644 --- a/drivers/staging/hv/channel.c +++ b/drivers/staging/hv/channel.c @@ -209,7 +209,7 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size, sizeof(struct vmbus_channel_open_channel)); if (ret != 0) - goto Cleanup; + goto cleanup; t = wait_for_completion_timeout(&openInfo->waitevent, HZ); if (t == 0) { @@ -221,7 +221,7 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size, if (openInfo->response.open_result.status) err = openInfo->response.open_result.status; -Cleanup: +cleanup: spin_lock_irqsave(&vmbus_connection.channelmsg_lock, flags); list_del(&openInfo->msglistentry); spin_unlock_irqrestore(&vmbus_connection.channelmsg_lock, flags); @@ -472,7 +472,7 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, ret = vmbus_post_msg(gpadlmsg, msginfo->msgsize - sizeof(*msginfo)); if (ret != 0) - goto Cleanup; + goto cleanup; if (msgcount > 1) { list_for_each(curr, &msginfo->submsglist) { @@ -491,7 +491,7 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, submsginfo->msgsize - sizeof(*submsginfo)); if (ret != 0) - goto Cleanup; + goto cleanup; } } @@ -502,7 +502,7 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer, /* At this point, we received the gpadl created msg */ *gpadl_handle = gpadlmsg->gpadl; -Cleanup: +cleanup: spin_lock_irqsave(&vmbus_connection.channelmsg_lock, flags); list_del(&msginfo->msglistentry); spin_unlock_irqrestore(&vmbus_connection.channelmsg_lock, flags); -- cgit v0.10.2 From 87352760173082c2a774f83dc6fe826fdbf219c0 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:36:56 -0700 Subject: staging: usbip: remove unnecessary lines and extra return statements Also, fix a few alignment issues that were originally missed. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub.h b/drivers/staging/usbip/stub.h index 6592aa2..2cc596e 100644 --- a/drivers/staging/usbip/stub.h +++ b/drivers/staging/usbip/stub.h @@ -77,6 +77,7 @@ struct stub_unlink { }; #define BUSID_SIZE 20 + struct bus_id_priv { char name[BUSID_SIZE]; char status; diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c index 6e99ec8..e35d62c 100644 --- a/drivers/staging/usbip/stub_dev.c +++ b/drivers/staging/usbip/stub_dev.c @@ -207,10 +207,11 @@ static void stub_shutdown_connection(struct usbip_device *ud) if (ud->tcp_tx && !task_is_dead(ud->tcp_tx)) kthread_stop(ud->tcp_tx); - /* 2. close the socket */ /* - * tcp_socket is freed after threads are killed. - * So usbip_xmit do not touch NULL socket. + * 2. close the socket + * + * tcp_socket is freed after threads are killed so that usbip_xmit does + * not touch NULL socket. */ if (ud->tcp_socket) { sock_release(ud->tcp_socket); @@ -230,8 +231,8 @@ static void stub_shutdown_connection(struct usbip_device *ud) list_del(&unlink->list); kfree(unlink); } - list_for_each_entry_safe(unlink, tmp, - &sdev->unlink_free, list) { + list_for_each_entry_safe(unlink, tmp, &sdev->unlink_free, + list) { list_del(&unlink->list); kfree(unlink); } @@ -258,22 +259,17 @@ static void stub_device_reset(struct usbip_device *ud) /* try to reset the device */ ret = usb_reset_device(udev); - usb_unlock_device(udev); spin_lock(&ud->lock); if (ret) { dev_err(&udev->dev, "device reset\n"); ud->status = SDEV_ST_ERROR; - } else { dev_info(&udev->dev, "device reset\n"); ud->status = SDEV_ST_AVAILABLE; - } spin_unlock(&ud->lock); - - return; } static void stub_device_unusable(struct usbip_device *ud) @@ -375,7 +371,7 @@ static int stub_probe(struct usb_interface *interface, /* check we should claim or not by busid_table */ busid_priv = get_busid_priv(udev_busid); - if (!busid_priv || (busid_priv->status == STUB_BUSID_REMOV) || + if (!busid_priv || (busid_priv->status == STUB_BUSID_REMOV) || (busid_priv->status == STUB_BUSID_OTHER)) { dev_info(&interface->dev, "%s is not in match_busid table... " "skip!\n", udev_busid); @@ -420,7 +416,6 @@ static int stub_probe(struct usb_interface *interface, udev_busid); usb_set_intfdata(interface, NULL); busid_priv->interf_count--; - return err; } @@ -443,7 +438,6 @@ static int stub_probe(struct usb_interface *interface, /* set private data to usb_interface */ usb_set_intfdata(interface, sdev); busid_priv->interf_count++; - busid_priv->sdev = sdev; err = stub_add_files(&interface->dev); @@ -453,7 +447,6 @@ static int stub_probe(struct usb_interface *interface, usb_put_intf(interface); busid_priv->interf_count = 0; - busid_priv->sdev = NULL; stub_device_free(sdev); return err; diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index e9085d6..44671ee 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -25,9 +25,7 @@ #define DRIVER_AUTHOR "Takahiro Hirofuchi" #define DRIVER_DESC "USB/IP Host Driver" -/* stub_priv is allocated from stub_priv_cache */ struct kmem_cache *stub_priv_cache; - /* * busid_tables defines matching busids that usbip can grab. A user can change * dynamically what device is locally used and what device is exported to a @@ -42,7 +40,6 @@ int match_busid(const char *busid) int i; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) if (busid_table[i].name[0]) if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { @@ -50,7 +47,6 @@ int match_busid(const char *busid) spin_unlock(&busid_table_lock); return 0; } - spin_unlock(&busid_table_lock); return 1; @@ -61,7 +57,6 @@ struct bus_id_priv *get_busid_priv(const char *busid) int i; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) if (busid_table[i].name[0]) if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { @@ -69,7 +64,6 @@ struct bus_id_priv *get_busid_priv(const char *busid) spin_unlock(&busid_table_lock); return &(busid_table[i]); } - spin_unlock(&busid_table_lock); return NULL; @@ -81,15 +75,12 @@ static ssize_t show_match_busid(struct device_driver *drv, char *buf) char *out = buf; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) if (busid_table[i].name[0]) out += sprintf(out, "%s ", busid_table[i].name); - spin_unlock(&busid_table_lock); out += sprintf(out, "\n"); - return out - buf; } @@ -101,7 +92,6 @@ static int add_match_busid(char *busid) return 0; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) if (!busid_table[i].name[0]) { strncpy(busid_table[i].name, busid, BUSID_SIZE); @@ -111,7 +101,6 @@ static int add_match_busid(char *busid) spin_unlock(&busid_table_lock); return 0; } - spin_unlock(&busid_table_lock); return -1; @@ -122,7 +111,6 @@ int del_match_busid(char *busid) int i; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { /* found */ @@ -135,7 +123,6 @@ int del_match_busid(char *busid) spin_unlock(&busid_table_lock); return 0; } - spin_unlock(&busid_table_lock); return -1; diff --git a/drivers/staging/usbip/stub_tx.c b/drivers/staging/usbip/stub_tx.c index fda2bc9..1cbae44 100644 --- a/drivers/staging/usbip/stub_tx.c +++ b/drivers/staging/usbip/stub_tx.c @@ -97,13 +97,12 @@ void stub_complete(struct urb *urb) /* link a urb to the queue of tx. */ spin_lock_irqsave(&sdev->priv_lock, flags); - if (priv->unlinking) { stub_enqueue_ret_unlink(sdev, priv->seqnum, urb->status); stub_free_priv_and_urb(priv); - } else + } else { list_move_tail(&priv->list, &sdev->priv_tx); - + } spin_unlock_irqrestore(&sdev->priv_lock, flags); /* wake up tx_thread */ @@ -113,10 +112,10 @@ void stub_complete(struct urb *urb) static inline void setup_base_pdu(struct usbip_header_basic *base, __u32 command, __u32 seqnum) { - base->command = command; - base->seqnum = seqnum; - base->devid = 0; - base->ep = 0; + base->command = command; + base->seqnum = seqnum; + base->devid = 0; + base->ep = 0; base->direction = 0; } diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c index 433a3b6..954d90d 100644 --- a/drivers/staging/usbip/usbip_common.c +++ b/drivers/staging/usbip/usbip_common.c @@ -63,9 +63,9 @@ static void usbip_dump_buffer(char *buff, int bufflen) static void usbip_dump_pipe(unsigned int p) { unsigned char type = usb_pipetype(p); - unsigned char ep = usb_pipeendpoint(p); - unsigned char dev = usb_pipedevice(p); - unsigned char dir = usb_pipein(p); + unsigned char ep = usb_pipeendpoint(p); + unsigned char dev = usb_pipedevice(p); + unsigned char dir = usb_pipein(p); pr_debug("dev(%d) ep(%d) [%s] ", dev, ep, dir ? "IN" : "OUT"); @@ -334,8 +334,8 @@ void usbip_dump_header(struct usbip_header *pdu) EXPORT_SYMBOL_GPL(usbip_dump_header); /* Send/receive messages over TCP/IP. I refer drivers/block/nbd.c */ -int usbip_xmit(int send, struct socket *sock, char *buf, - int size, int msg_flags) +int usbip_xmit(int send, struct socket *sock, char *buf, int size, + int msg_flags) { int result; struct msghdr msg; @@ -628,8 +628,7 @@ void usbip_header_correct_endian(struct usbip_header *pdu, int send) EXPORT_SYMBOL_GPL(usbip_header_correct_endian); static void usbip_iso_pakcet_correct_endian( - struct usbip_iso_packet_descriptor *iso, - int send) + struct usbip_iso_packet_descriptor *iso, int send) { /* does not need all members. but copy all simply. */ if (send) { diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h index 4a641c5..83f8c1e 100644 --- a/drivers/staging/usbip/usbip_common.h +++ b/drivers/staging/usbip/usbip_common.h @@ -65,7 +65,7 @@ enum { #define usbip_dbg_flag_vhci_tx (usbip_debug_flag & usbip_debug_vhci_tx) #define usbip_dbg_flag_stub_rx (usbip_debug_flag & usbip_debug_stub_rx) #define usbip_dbg_flag_stub_tx (usbip_debug_flag & usbip_debug_stub_tx) -#define usbip_dbg_flag_vhci_sysfs (usbip_debug_flag & usbip_debug_vhci_sysfs) +#define usbip_dbg_flag_vhci_sysfs (usbip_debug_flag & usbip_debug_vhci_sysfs) extern unsigned long usbip_debug_flag; extern struct device_attribute dev_attr_usbip_debug; diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c index a76e8fa..5b94b80 100644 --- a/drivers/staging/usbip/vhci_hcd.c +++ b/drivers/staging/usbip/vhci_hcd.c @@ -344,9 +344,9 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, * */ if (dum->resuming && time_after(jiffies, dum->re_timeout)) { dum->port_status[rhport] |= - (1 << USB_PORT_FEAT_C_SUSPEND); + (1 << USB_PORT_FEAT_C_SUSPEND); dum->port_status[rhport] &= - ~(1 << USB_PORT_FEAT_SUSPEND); + ~(1 << USB_PORT_FEAT_SUSPEND); dum->resuming = 0; dum->re_timeout = 0; /* if (dum->driver && dum->driver->resume) { @@ -639,9 +639,7 @@ no_need_xmit: usb_hcd_unlink_urb_from_ep(hcd, urb); no_need_unlink: spin_unlock_irqrestore(&the_controller->lock, flags); - usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, urb->status); - return ret; } @@ -1033,9 +1031,8 @@ static int vhci_bus_resume(struct usb_hcd *hcd) hcd->state = HC_STATE_RUNNING; } spin_unlock_irq(&vhci->lock); - return rc; - return 0; + return rc; } #else diff --git a/drivers/staging/usbip/vhci_rx.c b/drivers/staging/usbip/vhci_rx.c index e42ce9d..09c44ab 100644 --- a/drivers/staging/usbip/vhci_rx.c +++ b/drivers/staging/usbip/vhci_rx.c @@ -179,8 +179,6 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev, } kfree(unlink); - - return; } static int vhci_priv_tx_empty(struct vhci_device *vdev) -- cgit v0.10.2 From efad25e9a34d25c1c2469aa81ae1418ca1f26942 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:36:57 -0700 Subject: staging: usbip: stub_main.c: reorder functions Reorder functions so sysfs_ops, show() and store(), are adjacent, and init_busid_table() is at the beginning of the file. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index 44671ee..0ca1462 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -35,6 +35,21 @@ struct kmem_cache *stub_priv_cache; static struct bus_id_priv busid_table[MAX_BUSID]; static spinlock_t busid_table_lock; +static void init_busid_table(void) +{ + int i; + + for (i = 0; i < MAX_BUSID; i++) { + memset(busid_table[i].name, 0, BUSID_SIZE); + busid_table[i].status = STUB_BUSID_OTHER; + busid_table[i].interf_count = 0; + busid_table[i].sdev = NULL; + busid_table[i].shutdown_busid = 0; + } + + spin_lock_init(&busid_table_lock); +} + int match_busid(const char *busid) { int i; @@ -69,21 +84,6 @@ struct bus_id_priv *get_busid_priv(const char *busid) return NULL; } -static ssize_t show_match_busid(struct device_driver *drv, char *buf) -{ - int i; - char *out = buf; - - spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) - if (busid_table[i].name[0]) - out += sprintf(out, "%s ", busid_table[i].name); - spin_unlock(&busid_table_lock); - - out += sprintf(out, "\n"); - return out - buf; -} - static int add_match_busid(char *busid) { int i; @@ -128,19 +128,19 @@ int del_match_busid(char *busid) return -1; } -static void init_busid_table(void) +static ssize_t show_match_busid(struct device_driver *drv, char *buf) { int i; + char *out = buf; - for (i = 0; i < MAX_BUSID; i++) { - memset(busid_table[i].name, 0, BUSID_SIZE); - busid_table[i].status = STUB_BUSID_OTHER; - busid_table[i].interf_count = 0; - busid_table[i].sdev = NULL; - busid_table[i].shutdown_busid = 0; - } + spin_lock(&busid_table_lock); + for (i = 0; i < MAX_BUSID; i++) + if (busid_table[i].name[0]) + out += sprintf(out, "%s ", busid_table[i].name); + spin_unlock(&busid_table_lock); - spin_lock_init(&busid_table_lock); + out += sprintf(out, "\n"); + return out - buf; } static ssize_t store_match_busid(struct device_driver *dev, const char *buf, -- cgit v0.10.2 From 41e02f011648b9b338d3dc1121eb3da9cfbf312c Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:36:58 -0700 Subject: staging: usbip: stub_main.c: code cleanup Remove match_find() and replace with get_busid_idx(); change get_busid_priv(), add_match_busid(), and del_match_busid() to use get_busid_idx(); and cleanup code in the other functions. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index 0ca1462..00398a6 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -50,82 +50,90 @@ static void init_busid_table(void) spin_lock_init(&busid_table_lock); } -int match_busid(const char *busid) +/* + * Find the index of the busid by name. + * Must be called with busid_table_lock held. + */ +static int get_busid_idx(const char *busid) { int i; + int idx = -1; - spin_lock(&busid_table_lock); for (i = 0; i < MAX_BUSID; i++) if (busid_table[i].name[0]) if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { - /* already registerd */ - spin_unlock(&busid_table_lock); - return 0; + idx = i; + break; } - spin_unlock(&busid_table_lock); - - return 1; + return idx; } struct bus_id_priv *get_busid_priv(const char *busid) { - int i; + int idx; + struct bus_id_priv *bid = NULL; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) - if (busid_table[i].name[0]) - if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { - /* already registerd */ - spin_unlock(&busid_table_lock); - return &(busid_table[i]); - } + idx = get_busid_idx(busid); + if (idx >= 0) + bid = &(busid_table[idx]); spin_unlock(&busid_table_lock); - return NULL; + return bid; } static int add_match_busid(char *busid) { int i; - - if (!match_busid(busid)) - return 0; + int ret = -1; spin_lock(&busid_table_lock); + /* already registered? */ + if (get_busid_idx(busid) >= 0) { + ret = 0; + goto out; + } + for (i = 0; i < MAX_BUSID; i++) if (!busid_table[i].name[0]) { strncpy(busid_table[i].name, busid, BUSID_SIZE); if ((busid_table[i].status != STUB_BUSID_ALLOC) && (busid_table[i].status != STUB_BUSID_REMOV)) busid_table[i].status = STUB_BUSID_ADDED; - spin_unlock(&busid_table_lock); - return 0; + ret = 0; + break; } + +out: spin_unlock(&busid_table_lock); - return -1; + return ret; } int del_match_busid(char *busid) { - int i; + int idx; + int ret = -1; spin_lock(&busid_table_lock); - for (i = 0; i < MAX_BUSID; i++) - if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) { - /* found */ - if (busid_table[i].status == STUB_BUSID_OTHER) - memset(busid_table[i].name, 0, BUSID_SIZE); - if ((busid_table[i].status != STUB_BUSID_OTHER) && - (busid_table[i].status != STUB_BUSID_ADDED)) { - busid_table[i].status = STUB_BUSID_REMOV; - } - spin_unlock(&busid_table_lock); - return 0; - } + idx = get_busid_idx(busid); + if (idx < 0) + goto out; + + /* found */ + ret = 0; + + if (busid_table[idx].status == STUB_BUSID_OTHER) + memset(busid_table[idx].name, 0, BUSID_SIZE); + + if ((busid_table[idx].status != STUB_BUSID_OTHER) && + (busid_table[idx].status != STUB_BUSID_ADDED)) + busid_table[idx].status = STUB_BUSID_REMOV; + +out: spin_unlock(&busid_table_lock); - return -1; + return ret; } static ssize_t show_match_busid(struct device_driver *drv, char *buf) @@ -138,8 +146,8 @@ static ssize_t show_match_busid(struct device_driver *drv, char *buf) if (busid_table[i].name[0]) out += sprintf(out, "%s ", busid_table[i].name); spin_unlock(&busid_table_lock); - out += sprintf(out, "\n"); + return out - buf; } @@ -162,23 +170,24 @@ static ssize_t store_match_busid(struct device_driver *dev, const char *buf, strncpy(busid, buf + 4, BUSID_SIZE); if (!strncmp(buf, "add ", 4)) { - if (add_match_busid(busid) < 0) + if (add_match_busid(busid) < 0) { return -ENOMEM; - else { + } else { pr_debug("add busid %s\n", busid); return count; } } else if (!strncmp(buf, "del ", 4)) { - if (del_match_busid(busid) < 0) + if (del_match_busid(busid) < 0) { return -ENODEV; - else { + } else { pr_debug("del busid %s\n", busid); return count; } - } else + } else { return -EINVAL; + } } -static DRIVER_ATTR(match_busid, S_IRUSR|S_IWUSR, show_match_busid, +static DRIVER_ATTR(match_busid, S_IRUSR | S_IWUSR, show_match_busid, store_match_busid); static struct stub_priv *stub_priv_pop_from_listhead(struct list_head *listhead) @@ -201,36 +210,30 @@ static struct stub_priv *stub_priv_pop(struct stub_device *sdev) spin_lock_irqsave(&sdev->priv_lock, flags); priv = stub_priv_pop_from_listhead(&sdev->priv_init); - if (priv) { - spin_unlock_irqrestore(&sdev->priv_lock, flags); - return priv; - } + if (priv) + goto done; priv = stub_priv_pop_from_listhead(&sdev->priv_tx); - if (priv) { - spin_unlock_irqrestore(&sdev->priv_lock, flags); - return priv; - } + if (priv) + goto done; priv = stub_priv_pop_from_listhead(&sdev->priv_free); - if (priv) { - spin_unlock_irqrestore(&sdev->priv_lock, flags); - return priv; - } +done: spin_unlock_irqrestore(&sdev->priv_lock, flags); - return NULL; + + return priv; } void stub_device_cleanup_urbs(struct stub_device *sdev) { struct stub_priv *priv; + struct urb *urb; dev_dbg(&sdev->udev->dev, "free sdev %p\n", sdev); while ((priv = stub_priv_pop(sdev))) { - struct urb *urb = priv->urb; - + urb = priv->urb; dev_dbg(&sdev->udev->dev, "free urb %p\n", urb); usb_kill_urb(urb); @@ -238,7 +241,6 @@ void stub_device_cleanup_urbs(struct stub_device *sdev) kfree(urb->transfer_buffer); kfree(urb->setup_packet); - usb_free_urb(urb); } } @@ -250,34 +252,31 @@ static int __init usb_stub_init(void) stub_priv_cache = kmem_cache_create("stub_priv", sizeof(struct stub_priv), 0, SLAB_HWCACHE_ALIGN, NULL); - if (!stub_priv_cache) { - pr_err("create stub_priv_cache error\n"); + pr_err("kmem_cache_create failed\n"); return -ENOMEM; } ret = usb_register(&stub_driver); - if (ret) { + if (ret < 0) { pr_err("usb_register failed %d\n", ret); - goto error_usb_register; + goto err_usb_register; } - pr_info(DRIVER_DESC " " USBIP_VERSION "\n"); - - init_busid_table(); - ret = driver_create_file(&stub_driver.drvwrap.driver, &driver_attr_match_busid); - - if (ret) { - pr_err("create driver sysfs\n"); - goto error_create_file; + if (ret < 0) { + pr_err("driver_create_file failed\n"); + goto err_create_file; } + init_busid_table(); + pr_info(DRIVER_DESC " v" USBIP_VERSION "\n"); return ret; -error_create_file: + +err_create_file: usb_deregister(&stub_driver); -error_usb_register: +err_usb_register: kmem_cache_destroy(stub_priv_cache); return ret; } -- cgit v0.10.2 From 27ed5da0b626680ddc1670e7b6cc106472ac14c4 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:36:59 -0700 Subject: staging: usbip: stub_main.c: rename init and exit functions Change the prefix of the __init and __exit functions to usbip_host_ to correspond with the modules name. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index 00398a6..53d6977 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -245,7 +245,7 @@ void stub_device_cleanup_urbs(struct stub_device *sdev) } } -static int __init usb_stub_init(void) +static int __init usbip_host_init(void) { int ret; @@ -281,7 +281,7 @@ err_usb_register: return ret; } -static void __exit usb_stub_exit(void) +static void __exit usbip_host_exit(void) { driver_remove_file(&stub_driver.drvwrap.driver, &driver_attr_match_busid); @@ -295,8 +295,8 @@ static void __exit usb_stub_exit(void) kmem_cache_destroy(stub_priv_cache); } -module_init(usb_stub_init); -module_exit(usb_stub_exit); +module_init(usbip_host_init); +module_exit(usbip_host_exit); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); -- cgit v0.10.2 From 7d4de89f1965ec21a8c0b8de0cfbdd57094a2686 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:00 -0700 Subject: staging: usbip: stub_main.c: use KMEM_CACHE macro Change kmem_cache_create() to the KMEM_CACHE() macro. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index 53d6977..45a0f5d 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -249,9 +249,8 @@ static int __init usbip_host_init(void) { int ret; - stub_priv_cache = kmem_cache_create("stub_priv", - sizeof(struct stub_priv), 0, - SLAB_HWCACHE_ALIGN, NULL); + stub_priv_cache = KMEM_CACHE(stub_priv, SLAB_HWCACHE_ALIGN); + if (!stub_priv_cache) { pr_err("kmem_cache_create failed\n"); return -ENOMEM; -- cgit v0.10.2 From 2282e1fb6b696b0fa3c08b6a9b3a94be84ef458b Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:01 -0700 Subject: staging: usbip: usbip_common.c: fix misspelled function name Change pakcet to packet in usbip_iso_packet_correct_endian(). Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c index 954d90d..b204e6f 100644 --- a/drivers/staging/usbip/usbip_common.c +++ b/drivers/staging/usbip/usbip_common.c @@ -627,7 +627,7 @@ void usbip_header_correct_endian(struct usbip_header *pdu, int send) } EXPORT_SYMBOL_GPL(usbip_header_correct_endian); -static void usbip_iso_pakcet_correct_endian( +static void usbip_iso_packet_correct_endian( struct usbip_iso_packet_descriptor *iso, int send) { /* does not need all members. but copy all simply. */ @@ -677,7 +677,7 @@ void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen) iso = buff + (i * sizeof(*iso)); usbip_pack_iso(iso, &urb->iso_frame_desc[i], 1); - usbip_iso_pakcet_correct_endian(iso, 1); + usbip_iso_packet_correct_endian(iso, 1); } *bufflen = size; @@ -728,7 +728,7 @@ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb) for (i = 0; i < np; i++) { iso = buff + (i * sizeof(*iso)); - usbip_iso_pakcet_correct_endian(iso, 0); + usbip_iso_packet_correct_endian(iso, 0); usbip_pack_iso(iso, &urb->iso_frame_desc[i], 0); total_length += urb->iso_frame_desc[i].actual_length; } -- cgit v0.10.2 From b7d27eadf8eff42efc6bdd5c41275c3708abb789 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:02 -0700 Subject: staging: usbip: usbip_common.h: reorganize and document request headers Document the request header structures; move #defines out of the structures; organize function declarations by source file; and move inline functions to the end of file. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h index 83f8c1e..074ac42 100644 --- a/drivers/staging/usbip/usbip_common.h +++ b/drivers/staging/usbip/usbip_common.h @@ -104,111 +104,110 @@ extern struct device_attribute dev_attr_usbip_debug; usbip_dbg_with_flag(usbip_debug_stub_tx, fmt , ##args) /* - * USB/IP request headers. - * Currently, we define 4 request types: + * USB/IP request headers * - * - CMD_SUBMIT transfers a USB request, corresponding to usb_submit_urb(). - * (client to server) - * - RET_RETURN transfers the result of CMD_SUBMIT. - * (server to client) - * - CMD_UNLINK transfers an unlink request of a pending USB request. + * Each request is transferred across the network to its counterpart, which + * facilitates the normal USB communication. The values contained in the headers + * are basically the same as in a URB. Currently, four request types are + * defined: + * + * - USBIP_CMD_SUBMIT: a USB request block, corresponds to usb_submit_urb() * (client to server) - * - RET_UNLINK transfers the result of CMD_UNLINK. + * + * - USBIP_RET_SUBMIT: the result of USBIP_CMD_SUBMIT * (server to client) * - * Note: The below request formats are based on the USB subsystem of Linux. Its - * details will be defined when other implementations come. + * - USBIP_CMD_UNLINK: an unlink request of a pending USBIP_CMD_SUBMIT, + * corresponds to usb_unlink_urb() + * (client to server) * + * - USBIP_RET_UNLINK: the result of USBIP_CMD_UNLINK + * (server to client) * */ +#define USBIP_CMD_SUBMIT 0x0001 +#define USBIP_RET_SUBMIT 0x0002 +#define USBIP_CMD_UNLINK 0x0003 +#define USBIP_RET_UNLINK 0x0004 -/* - * A basic header followed by other additional headers. +#define USBIP_DIR_IN 0x00 +#define USBIP_DIR_OUT 0x01 + +/** + * struct usbip_header_basic - data pertinent to every request + * @command: the usbip request type + * @seqnum: sequential number that identifies requests; incremented per + * connection + * @devid: specifies a remote USB device uniquely instead of busnum and devnum; + * in the stub driver, this value is ((busnum << 16) | devnum) + * @direction: direction of the transfer + * @ep: endpoint number */ struct usbip_header_basic { -#define USBIP_CMD_SUBMIT 0x0001 -#define USBIP_CMD_UNLINK 0x0002 -#define USBIP_RET_SUBMIT 0x0003 -#define USBIP_RET_UNLINK 0x0004 __u32 command; - - /* sequential number which identifies requests. - * incremented per connections */ __u32 seqnum; - - /* devid is used to specify a remote USB device uniquely instead - * of busnum and devnum in Linux. In the case of Linux stub_driver, - * this value is ((busnum << 16) | devnum) */ __u32 devid; - -#define USBIP_DIR_OUT 0 -#define USBIP_DIR_IN 1 __u32 direction; - __u32 ep; /* endpoint number */ + __u32 ep; } __packed; -/* - * An additional header for a CMD_SUBMIT packet. +/** + * struct usbip_header_cmd_submit - USBIP_CMD_SUBMIT packet header + * @transfer_flags: URB flags + * @transfer_buffer_length: the data size for (in) or (out) transfer + * @start_frame: initial frame for isochronous or interrupt transfers + * @number_of_packets: number of isochronous packets + * @interval: maximum time for the request on the server-side host controller + * @setup: setup data for a control request */ struct usbip_header_cmd_submit { - /* these values are basically the same as in a URB. */ - - /* the same in a URB. */ __u32 transfer_flags; - - /* set the following data size (out), - * or expected reading data size (in) */ __s32 transfer_buffer_length; /* it is difficult for usbip to sync frames (reserved only?) */ __s32 start_frame; - - /* the number of iso descriptors that follows this header */ __s32 number_of_packets; - - /* the maximum time within which this request works in a host - * controller of a server side */ __s32 interval; - /* set setup packet data for a CTRL request */ unsigned char setup[8]; } __packed; -/* - * An additional header for a RET_SUBMIT packet. +/** + * struct usbip_header_ret_submit - USBIP_RET_SUBMIT packet header + * @status: return status of a non-iso request + * @actual_length: number of bytes transferred + * @start_frame: initial frame for isochronous or interrupt transfers + * @number_of_packets: number of isochronous packets + * @error_count: number of errors for isochronous transfers */ struct usbip_header_ret_submit { __s32 status; - __s32 actual_length; /* returned data length */ - __s32 start_frame; /* ISO and INT */ - __s32 number_of_packets; /* ISO only */ - __s32 error_count; /* ISO only */ + __s32 actual_length; + __s32 start_frame; + __s32 number_of_packets; + __s32 error_count; } __packed; -/* - * An additional header for a CMD_UNLINK packet. +/** + * struct usbip_header_cmd_unlink - USBIP_CMD_UNLINK packet header + * @seqnum: the URB seqnum to unlink */ struct usbip_header_cmd_unlink { - __u32 seqnum; /* URB's seqnum that will be unlinked */ + __u32 seqnum; } __packed; -/* - * An additional header for a RET_UNLINK packet. +/** + * struct usbip_header_ret_unlink - USBIP_RET_UNLINK packet header + * @status: return status of the request */ struct usbip_header_ret_unlink { __s32 status; } __packed; -/* the same as usb_iso_packet_descriptor but packed for pdu */ -struct usbip_iso_packet_descriptor { - __u32 offset; - __u32 length; /* expected length */ - __u32 actual_length; - __u32 status; -} __packed; - -/* - * All usbip packets use a common header to keep code simple. +/** + * struct usbip_header - common header for all usbip packets + * @base: the basic header + * @u: packet type dependent header */ struct usbip_header { struct usbip_header_basic base; @@ -221,40 +220,15 @@ struct usbip_header { } u; } __packed; -int usbip_xmit(int, struct socket *, char *, int, int); -int usbip_sendmsg(struct socket *, struct msghdr *, int); - -static inline int interface_to_busnum(struct usb_interface *interface) -{ - struct usb_device *udev = interface_to_usbdev(interface); - return udev->bus->busnum; -} - -static inline int interface_to_devnum(struct usb_interface *interface) -{ - struct usb_device *udev = interface_to_usbdev(interface); - return udev->devnum; -} - -static inline int interface_to_infnum(struct usb_interface *interface) -{ - return interface->cur_altsetting->desc.bInterfaceNumber; -} - -#if 0 -int setnodelay(struct socket *); -int setquickack(struct socket *); -int setkeepalive(struct socket *socket); -void setreuse(struct socket *); -#endif - -struct socket *sockfd_to_socket(unsigned int); -int set_sockaddr(struct socket *socket, struct sockaddr_storage *ss); - -void usbip_dump_urb(struct urb *purb); -void usbip_dump_header(struct usbip_header *pdu); - -struct usbip_device; +/* + * This is the same as usb_iso_packet_descriptor but packed for pdu. + */ +struct usbip_iso_packet_descriptor { + __u32 offset; + __u32 length; /* expected length */ + __u32 actual_length; + __u32 status; +} __packed; enum usbip_side { USBIP_VHCI, @@ -277,20 +251,7 @@ enum usbip_status { VDEV_ST_ERROR }; -/* a common structure for stub_device and vhci_device */ -struct usbip_device { - enum usbip_side side; - enum usbip_status status; - - /* lock for status */ - spinlock_t lock; - - struct socket *tcp_socket; - - struct task_struct *tcp_rx; - struct task_struct *tcp_tx; - - /* event handler */ +/* event handler */ #define USBIP_EH_SHUTDOWN (1 << 0) #define USBIP_EH_BYE (1 << 1) #define USBIP_EH_RESET (1 << 2) @@ -307,6 +268,19 @@ struct usbip_device { #define VDEV_EVENT_ERROR_TCP (USBIP_EH_SHUTDOWN | USBIP_EH_RESET) #define VDEV_EVENT_ERROR_MALLOC (USBIP_EH_SHUTDOWN | USBIP_EH_UNUSABLE) +/* a common structure for stub_device and vhci_device */ +struct usbip_device { + enum usbip_side side; + enum usbip_status status; + + /* lock for status */ + spinlock_t lock; + + struct socket *tcp_socket; + + struct task_struct *tcp_rx; + struct task_struct *tcp_tx; + unsigned long event; struct task_struct *eh; wait_queue_head_t eh_waitq; @@ -318,17 +292,32 @@ struct usbip_device { } eh_ops; }; +#if 0 +int usbip_sendmsg(struct socket *, struct msghdr *, int); +int set_sockaddr(struct socket *socket, struct sockaddr_storage *ss); +int setnodelay(struct socket *); +int setquickack(struct socket *); +int setkeepalive(struct socket *socket); +void setreuse(struct socket *); +#endif + +/* usbip_common.c */ +void usbip_dump_urb(struct urb *purb); +void usbip_dump_header(struct usbip_header *pdu); + +int usbip_xmit(int send, struct socket *sock, char *buf, int size, + int msg_flags); +struct socket *sockfd_to_socket(unsigned int sockfd); + void usbip_pack_pdu(struct usbip_header *pdu, struct urb *urb, int cmd, int pack); - void usbip_header_correct_endian(struct usbip_header *pdu, int send); -/* some members of urb must be substituted before. */ -int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb); + +void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen); /* some members of urb must be substituted before. */ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb); -/* some members of urb must be substituted before. */ int usbip_pad_iso(struct usbip_device *ud, struct urb *urb); -void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen); +int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb); /* usbip_event.c */ int usbip_start_eh(struct usbip_device *ud); @@ -336,4 +325,21 @@ void usbip_stop_eh(struct usbip_device *ud); void usbip_event_add(struct usbip_device *ud, unsigned long event); int usbip_event_happened(struct usbip_device *ud); +static inline int interface_to_busnum(struct usb_interface *interface) +{ + struct usb_device *udev = interface_to_usbdev(interface); + return udev->bus->busnum; +} + +static inline int interface_to_devnum(struct usb_interface *interface) +{ + struct usb_device *udev = interface_to_usbdev(interface); + return udev->devnum; +} + +static inline int interface_to_infnum(struct usb_interface *interface) +{ + return interface->cur_altsetting->desc.bInterfaceNumber; +} + #endif /* __USBIP_COMMON_H */ -- cgit v0.10.2 From d012c2a5aca12abe1c7edc361447733861da9e95 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:03 -0700 Subject: staging: usbip: stub_dev.c: move stub_driver definition and update driver name Move the stub_driver definition to the end of file and, therefore, remove foward declarations. Update driver name to usbip-host. A few comments were slightly edited too. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c index e35d62c..e26b2ee 100644 --- a/drivers/staging/usbip/stub_dev.c +++ b/drivers/staging/usbip/stub_dev.c @@ -23,14 +23,10 @@ #include "usbip_common.h" #include "stub.h" -static int stub_probe(struct usb_interface *interface, - const struct usb_device_id *id); -static void stub_disconnect(struct usb_interface *interface); - /* * Define device IDs here if you want to explicitly limit exportable devices. - * In the most cases, wild card matching will be ok because driver binding can - * be changed dynamically by a userland program. + * In most cases, wildcard matching will be okay because driver binding can be + * changed dynamically by a userland program. */ static struct usb_device_id stub_table[] = { #if 0 @@ -54,16 +50,9 @@ static struct usb_device_id stub_table[] = { }; MODULE_DEVICE_TABLE(usb, stub_table); -struct usb_driver stub_driver = { - .name = "usbip", - .probe = stub_probe, - .disconnect = stub_disconnect, - .id_table = stub_table, -}; - /* - * usbip_status shows status of usbip as long as this driver is bound to the - * target device. + * usbip_status shows the status of usbip-host as long as this driver is bound + * to the target device. */ static ssize_t show_status(struct device *dev, struct device_attribute *attr, char *buf) @@ -423,7 +412,7 @@ static int stub_probe(struct usb_interface *interface, return 0; } - /* ok. this is my device. */ + /* ok, this is my device */ sdev = stub_device_alloc(udev, interface); if (!sdev) return -ENOMEM; @@ -534,3 +523,10 @@ static void stub_disconnect(struct usb_interface *interface) del_match_busid((char *)udev_busid); } } + +struct usb_driver stub_driver = { + .name = "usbip-host", + .probe = stub_probe, + .disconnect = stub_disconnect, + .id_table = stub_table, +}; -- cgit v0.10.2 From 4b93bb37bb53ca6d44600a94a1bd9af781a12f0d Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:04 -0700 Subject: staging: usbip: userspace: bind_driver.c: update kernel module name Change kernel module name to usbip-host. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/bind-driver.c b/drivers/staging/usbip/userspace/src/bind-driver.c index 201ffbb..dcc540a 100644 --- a/drivers/staging/usbip/userspace/src/bind-driver.c +++ b/drivers/staging/usbip/userspace/src/bind-driver.c @@ -27,7 +27,7 @@ static const struct option longopts[] = { {NULL, 0, NULL, 0} }; -static const char match_busid_path[] = "/sys/bus/usb/drivers/usbip/match_busid"; +static const char match_busid_path[] = "/sys/bus/usb/drivers/usbip-host/match_busid"; static void show_help(void) @@ -228,7 +228,7 @@ static int bind_to_usbip(char *busid) for (i = 0; i < ninterface; i++) { int ret; - ret = bind_interface(busid, configvalue, i, "usbip"); + ret = bind_interface(busid, configvalue, i, "usbip-host"); if (ret < 0) { g_warning("bind usbip at %s:%d.%d, failed", busid, configvalue, i); -- cgit v0.10.2 From 3028d0ae6c69318c11f67affb29411d30c0cb955 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:05 -0700 Subject: staging: usbip: usbip_common.c: rename init and exit functions Change the prefix of the __init and __exit functions to usbip_core_ to correspond with the modules name. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c index b204e6f..1be4dc1 100644 --- a/drivers/staging/usbip/usbip_common.c +++ b/drivers/staging/usbip/usbip_common.c @@ -838,19 +838,19 @@ int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb) } EXPORT_SYMBOL_GPL(usbip_recv_xbuff); -static int __init usbip_common_init(void) +static int __init usbip_core_init(void) { pr_info(DRIVER_DESC " v" USBIP_VERSION "\n"); return 0; } -static void __exit usbip_common_exit(void) +static void __exit usbip_core_exit(void) { return; } -module_init(usbip_common_init); -module_exit(usbip_common_exit); +module_init(usbip_core_init); +module_exit(usbip_core_exit); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); -- cgit v0.10.2 From 0392bbb6f6af31888570a24641158d9b51b07eb6 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 19 May 2011 21:37:06 -0700 Subject: staging: usbip: vhci_hcd.c: rename init and exit functions Change the prefix of the __init and __exit functions to vhci_hcd_ to correspond with the modules name. And change the suffix of the __exit function to exit instead of cleanup. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c index 5b94b80..359b464 100644 --- a/drivers/staging/usbip/vhci_hcd.c +++ b/drivers/staging/usbip/vhci_hcd.c @@ -1209,7 +1209,7 @@ static struct platform_device the_pdev = { }, }; -static int __init vhci_init(void) +static int __init vhci_hcd_init(void) { int ret; @@ -1233,14 +1233,14 @@ err_driver_register: return ret; } -static void __exit vhci_cleanup(void) +static void __exit vhci_hcd_exit(void) { platform_device_unregister(&the_pdev); platform_driver_unregister(&vhci_driver); } -module_init(vhci_init); -module_exit(vhci_cleanup); +module_init(vhci_hcd_init); +module_exit(vhci_hcd_exit); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); -- cgit v0.10.2 From 9ba422b346c9654ec78ee0a5b7c5db6e5d4c48dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A1rton=20N=C3=A9meth?= Date: Tue, 24 May 2011 23:19:18 +0200 Subject: usbip: simplify lock handling in valid_request() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The function calls spin_lock() and spin_unlock() should be in pair. This patch makes this pairing more clear for the reader of the code. Signed-off-by: Márton Németh Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_rx.c b/drivers/staging/usbip/stub_rx.c index a5c1fa1..e2cfedb 100644 --- a/drivers/staging/usbip/stub_rx.c +++ b/drivers/staging/usbip/stub_rx.c @@ -304,18 +304,18 @@ static int stub_recv_cmd_unlink(struct stub_device *sdev, static int valid_request(struct stub_device *sdev, struct usbip_header *pdu) { struct usbip_device *ud = &sdev->ud; + int valid = 0; if (pdu->base.devid == sdev->devid) { spin_lock(&ud->lock); if (ud->status == SDEV_ST_USED) { /* A request is valid. */ - spin_unlock(&ud->lock); - return 1; + valid = 1; } spin_unlock(&ud->lock); } - return 0; + return valid; } static struct stub_priv *stub_priv_alloc(struct stub_device *sdev, -- cgit v0.10.2 From 988e7520818c4e9ac6d4b195376a46bb24a0dd99 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A1rton=20N=C3=A9meth?= Date: Thu, 26 May 2011 09:24:45 +0200 Subject: usbip: remove check for negative values for an unsigned value MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The parameter rhport is unsigned so there is no need checking for negative values. This will remove the following warning message when compiling with "make W=1 ...": drivers/staging/usbip/vhci_sysfs.c: In function ‘valid_args’: drivers/staging/usbip/vhci_sysfs.c:138: warning: comparison of unsigned expression < 0 is always false Signed-off-by: Márton Németh Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c index d9736f9..7b6e4a9 100644 --- a/drivers/staging/usbip/vhci_sysfs.c +++ b/drivers/staging/usbip/vhci_sysfs.c @@ -135,7 +135,7 @@ static DEVICE_ATTR(detach, S_IWUSR, NULL, store_detach); static int valid_args(__u32 rhport, enum usb_device_speed speed) { /* check rhport */ - if ((rhport < 0) || (rhport >= VHCI_NPORTS)) { + if (rhport >= VHCI_NPORTS) { pr_err("port %u\n", rhport); return -EINVAL; } -- cgit v0.10.2 From 5a285cf5233b261a11b69f0ecd1c912df8a41163 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:08 -0700 Subject: staging: usbip: userspace: set kernel module names in one place Move kernel module name setting to usbip_common.h so that macros can be used instead of hard coding the names in multiple places. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index cc33643..0355604 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -8,10 +8,6 @@ #include "usbip.h" -/* kernel module name */ -static const char *usbip_stub_driver_name = "usbip-host"; - - struct usbip_stub_driver *stub_driver; static struct sysfs_driver *open_sysfs_stub_driver(void) @@ -31,11 +27,12 @@ static struct sysfs_driver *open_sysfs_stub_driver(void) snprintf(stub_driver_path, SYSFS_PATH_MAX, "%s/%s/usb/%s/%s", sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, - usbip_stub_driver_name); + USBIP_HOST_DRV_NAME); stub_driver = sysfs_open_driver_path(stub_driver_path); if (!stub_driver) { - err("usbip-core.ko and usbip-host.ko must be loaded"); + err(USBIP_CORE_MOD_NAME ".ko and " USBIP_HOST_DRV_NAME + ".ko must be loaded"); return NULL; } @@ -200,7 +197,8 @@ static int refresh_exported_devices(void) suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver); if (!suinf_list) { - printf("Bind usbip-host.ko to a usb device to be exportable!\n"); + info("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " + "exportable!\n"); goto bye; } diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index c254b54..2c58af5 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -26,7 +26,11 @@ #define VHCI_STATE_PATH "/var/run/vhci_hcd" #endif -//#include +/* kernel module names */ +#define USBIP_CORE_MOD_NAME "usbip-core" +#define USBIP_HOST_DRV_NAME "usbip-host" +#define USBIP_VHCI_DRV_NAME "vhci_hcd" + enum usb_device_speed { USB_SPEED_UNKNOWN = 0, /* enumerating */ USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */ diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index db43f8d..aa439c6 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -5,9 +5,6 @@ #include "usbip.h" - -static const char vhci_driver_name[] = "vhci_hcd"; - struct usbip_vhci_driver *vhci_driver; static struct usbip_imported_device *imported_device_init(struct usbip_imported_device *idev, char *busid) @@ -277,12 +274,13 @@ static int get_hc_busid(char *sysfs_mntpath, char *hc_busid) snprintf(sdriver_path, SYSFS_PATH_MAX, "%s/%s/platform/%s/%s", sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, - vhci_driver_name); + USBIP_VHCI_DRV_NAME); sdriver = sysfs_open_driver_path(sdriver_path); if (!sdriver) { info("%s is not found", sdriver_path); - info("load usbip-core.ko and vhci-hcd.ko !"); + info("please load " USBIP_CORE_MOD_NAME ".ko and " + USBIP_VHCI_DRV_NAME ".ko!"); return -1; } diff --git a/drivers/staging/usbip/userspace/src/bind-driver.c b/drivers/staging/usbip/userspace/src/bind-driver.c index dcc540a..1396ff9 100644 --- a/drivers/staging/usbip/userspace/src/bind-driver.c +++ b/drivers/staging/usbip/userspace/src/bind-driver.c @@ -3,13 +3,12 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#include "utils.h" - #define _GNU_SOURCE #include #include - +#include "usbip.h" +#include "utils.h" static const struct option longopts[] = { {"usbip", required_argument, NULL, 'u'}, @@ -27,9 +26,6 @@ static const struct option longopts[] = { {NULL, 0, NULL, 0} }; -static const char match_busid_path[] = "/sys/bus/usb/drivers/usbip-host/match_busid"; - - static void show_help(void) { printf("Usage: usbip_bind_driver [OPTION]\n"); @@ -51,6 +47,18 @@ static int modify_match_busid(char *busid, int add) int fd; int ret; char buff[BUS_ID_SIZE + 4]; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char match_busid_path[SYSFS_PATH_MAX]; + + ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (ret < 0) { + err("sysfs must be mounted"); + return -1; + } + + snprintf(match_busid_path, sizeof(match_busid_path), + "%s/%s/usb/%s/%s/match_busid", sysfs_mntpath, SYSFS_BUS_NAME, + SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME); /* BUS_IS_SIZE includes NULL termination? */ if (strnlen(busid, BUS_ID_SIZE) > BUS_ID_SIZE - 1) { @@ -228,7 +236,8 @@ static int bind_to_usbip(char *busid) for (i = 0; i < ninterface; i++) { int ret; - ret = bind_interface(busid, configvalue, i, "usbip-host"); + ret = bind_interface(busid, configvalue, i, + USBIP_HOST_DRV_NAME); if (ret < 0) { g_warning("bind usbip at %s:%d.%d, failed", busid, configvalue, i); -- cgit v0.10.2 From 7e485ee7f530bb8f5c02c2ae68d73ce7ee3dfad5 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:09 -0700 Subject: staging: usbip: userspace: change struct class_device to usbip_class_device Rename class_device struct to avoid confusion and change member names. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index aa439c6..9296f96 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -20,10 +20,12 @@ static struct usbip_imported_device *imported_device_init(struct usbip_imported_ sysfs_close_device(sudev); /* add class devices of this imported device */ - struct class_device *cdev; - dlist_for_each_data(vhci_driver->cdev_list, cdev, struct class_device) { - if (!strncmp(cdev->devpath, idev->udev.path, strlen(idev->udev.path))) { - struct class_device *new_cdev; + struct usbip_class_device *cdev; + dlist_for_each_data(vhci_driver->cdev_list, cdev, + struct usbip_class_device) { + if (!strncmp(cdev->dev_path, idev->udev.path, + strlen(idev->udev.path))) { + struct usbip_class_device *new_cdev; /* alloc and copy because dlist is linked from only one list */ new_cdev = calloc(1, sizeof(*new_cdev)); @@ -87,7 +89,7 @@ static int parse_status(char *value) idev->busnum = (devid >> 16); idev->devnum = (devid & 0x0000ffff); - idev->cdev_list = dlist_new(sizeof(struct class_device)); + idev->cdev_list = dlist_new(sizeof(struct usbip_class_device)); if (!idev->cdev_list) { err("init new device"); return -1; @@ -115,29 +117,29 @@ static int parse_status(char *value) static int check_usbip_device(struct sysfs_class_device *cdev) { - char clspath[SYSFS_PATH_MAX]; /* /sys/class/video4linux/video0/device */ - char devpath[SYSFS_PATH_MAX]; /* /sys/devices/platform/vhci_hcd/usb6/6-1:1.1 */ - + char class_path[SYSFS_PATH_MAX]; /* /sys/class/video4linux/video0/device */ + char dev_path[SYSFS_PATH_MAX]; /* /sys/devices/platform/vhci_hcd/usb6/6-1:1.1 */ int ret; + struct usbip_class_device *usbip_cdev; - snprintf(clspath, sizeof(clspath), "%s/device", cdev->path); + snprintf(class_path, sizeof(class_path), "%s/device", cdev->path); - ret = sysfs_get_link(clspath, devpath, SYSFS_PATH_MAX); - if (!ret) { - if (!strncmp(devpath, vhci_driver->hc_device->path, - strlen(vhci_driver->hc_device->path))) { + ret = sysfs_get_link(class_path, dev_path, sizeof(dev_path)); + if (ret == 0) { + if (!strncmp(dev_path, vhci_driver->hc_device->path, + strlen(vhci_driver->hc_device->path))) { /* found usbip device */ - struct class_device *cdev; - - cdev = calloc(1, sizeof(*cdev)); + usbip_cdev = calloc(1, sizeof(*usbip_cdev)); if (!cdev) { - err("calloc cdev"); + err("calloc usbip_cdev"); return -1; } - dlist_unshift(vhci_driver->cdev_list, (void*) cdev); - strncpy(cdev->clspath, clspath, sizeof(cdev->clspath)); - strncpy(cdev->devpath, devpath, sizeof(cdev->clspath)); - dbg(" found %s %s", clspath, devpath); + dlist_unshift(vhci_driver->cdev_list, usbip_cdev); + strncpy(usbip_cdev->class_path, class_path, + sizeof(usbip_cdev->class_path)); + strncpy(usbip_cdev->dev_path, dev_path, + sizeof(usbip_cdev->dev_path)); + dbg(" found %s %s", class_path, dev_path); } } @@ -341,7 +343,7 @@ int usbip_vhci_driver_open(void) info("%d ports available\n", vhci_driver->nports); - vhci_driver->cdev_list = dlist_new(sizeof(struct class_device)); + vhci_driver->cdev_list = dlist_new(sizeof(struct usbip_class_device)); if (!vhci_driver->cdev_list) goto err; @@ -400,7 +402,7 @@ int usbip_vhci_refresh_device_list(void) dlist_destroy(vhci_driver->idev[i].cdev_list); } - vhci_driver->cdev_list = dlist_new(sizeof(struct class_device)); + vhci_driver->cdev_list = dlist_new(sizeof(struct usbip_class_device)); if (!vhci_driver->cdev_list) goto err; diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h index cad8ad7..3af41c5 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h @@ -11,9 +11,9 @@ #define MAXNPORT 128 -struct class_device { - char clspath[SYSFS_PATH_MAX]; - char devpath[SYSFS_PATH_MAX]; +struct usbip_class_device { + char class_path[SYSFS_PATH_MAX]; + char dev_path[SYSFS_PATH_MAX]; }; struct usbip_imported_device { @@ -25,16 +25,19 @@ struct usbip_imported_device { uint8_t busnum; uint8_t devnum; - - struct dlist *cdev_list; /* list of class device */ + /* usbip_class_device list */ + struct dlist *cdev_list; struct usb_device udev; }; struct usbip_vhci_driver { char sysfs_mntpath[SYSFS_PATH_MAX]; - struct sysfs_device *hc_device; /* /sys/devices/platform/vhci_hcd */ - struct dlist *cdev_list; /* list of class device */ + /* /sys/devices/platform/vhci_hcd */ + struct sysfs_device *hc_device; + + /* usbip_class_device list */ + struct dlist *cdev_list; int nports; struct usbip_imported_device idev[MAXNPORT]; diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c index 01a5628..c73b355 100644 --- a/drivers/staging/usbip/userspace/src/usbip.c +++ b/drivers/staging/usbip/userspace/src/usbip.c @@ -174,12 +174,13 @@ int usbip_vhci_imported_device_dump(struct usbip_imported_device *idev) sysfs_close_device(suinf); /* show class device information */ - struct class_device *cdev; + struct usbip_class_device *cdev; - dlist_for_each_data(idev->cdev_list, cdev, struct class_device) { - int ifnum = get_interface_number(cdev->devpath); + dlist_for_each_data(idev->cdev_list, cdev, + struct usbip_class_device) { + int ifnum = get_interface_number(cdev->dev_path); if (ifnum == i) { - info(" %s", cdev->clspath); + info(" %s", cdev->class_path); } } } -- cgit v0.10.2 From 58058422f84523d8ab73b98753670dc9377e071a Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:10 -0700 Subject: staging: usbip: userspace: vhci_driver: parameterize path names Define a macro for the bus type and use libsysfs for class path. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index 9296f96..f2030b1 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -186,9 +186,20 @@ static int refresh_class_device_list(void) int ret; struct dlist *cname_list; char *cname; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char class_path[SYSFS_PATH_MAX]; + + ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (ret < 0) { + err("sysfs must be mounted"); + return -1; + } + + snprintf(class_path, sizeof(class_path), "%s/%s", sysfs_mntpath, + SYSFS_CLASS_NAME); /* search under /sys/class */ - cname_list = sysfs_open_directory_list("/sys/class"); + cname_list = sysfs_open_directory_list(class_path); if (!cname_list) { err("open class directory"); return -1; @@ -274,9 +285,9 @@ static int get_hc_busid(char *sysfs_mntpath, char *hc_busid) int found = 0; - snprintf(sdriver_path, SYSFS_PATH_MAX, "%s/%s/platform/%s/%s", - sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, - USBIP_VHCI_DRV_NAME); + snprintf(sdriver_path, SYSFS_PATH_MAX, "%s/%s/%s/%s/%s", sysfs_mntpath, + SYSFS_BUS_NAME, USBIP_VHCI_BUS_TYPE, SYSFS_DRIVERS_NAME, + USBIP_VHCI_DRV_NAME); sdriver = sysfs_open_driver_path(sdriver_path); if (!sdriver) { @@ -333,7 +344,8 @@ int usbip_vhci_driver_open(void) goto err; /* will be freed in usbip_driver_close() */ - vhci_driver->hc_device = sysfs_open_device("platform", hc_busid); + vhci_driver->hc_device = sysfs_open_device(USBIP_VHCI_BUS_TYPE, + hc_busid); if (!vhci_driver->hc_device) { err("get sysfs vhci_driver"); goto err; diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h index 3af41c5..3395586 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h @@ -7,7 +7,7 @@ #include "usbip.h" - +#define USBIP_VHCI_BUS_TYPE "platform" #define MAXNPORT 128 -- cgit v0.10.2 From e9837bbb3e694eef4c55c934ebf1f8a0399b142c Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:11 -0700 Subject: staging: usbip: userspace tools v1.0.0 The new and improved (well somewhat, with a ways to go) userspace utility. mfm:pts/8[~/tmp/userspace] May26 05:18:31 % ./src/usbip help usage: usbip [--debug] [version] [help] attach Attach a remote USB device detach Detach a remote USB device list List exported or local USB devices bind Bind device to usbip-host.ko unbind Unbind device from usbip-host.ko This first commit of the userspace `usbip' utility uses to same implementation as the old tools, `usbip' and `usbip_bind_driver'. Nothing significant has changed so compatibility with windows has _not_ been broken. However, the tools remain broken in many ways due to the old implementation. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac index e3afa15..e7d801b 100644 --- a/drivers/staging/usbip/userspace/configure.ac +++ b/drivers/staging/usbip/userspace/configure.ac @@ -1,8 +1,8 @@ dnl Process this file with autoconf to produce a configure script. AC_PREREQ(2.59) -AC_INIT([usbip], [0.1.8], [usbip-devel@lists.sourceforge.net]) -AC_DEFINE([USBIP_VERSION], [0x000106], [numeric version number]) +AC_INIT([usbip], [1.0.0], [usbip-devel@lists.sourceforge.net]) +AC_DEFINE([USBIP_VERSION], [0x00000100], [binary-coded decimal version number]) CURRENT=0 REVISION=1 diff --git a/drivers/staging/usbip/userspace/src/Makefile.am b/drivers/staging/usbip/userspace/src/Makefile.am index 05a7aa5..52741c8 100644 --- a/drivers/staging/usbip/userspace/src/Makefile.am +++ b/drivers/staging/usbip/userspace/src/Makefile.am @@ -2,9 +2,10 @@ AM_CPPFLAGS := -I$(top_srcdir)/libsrc -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"' AM_CFLAGS := @EXTRA_CFLAGS@ @PACKAGE_CFLAGS@ LDADD := $(top_srcdir)/libsrc/libusbip.la @PACKAGE_LIBS@ -sbin_PROGRAMS := usbip usbipd usbip_bind_driver +sbin_PROGRAMS := usbip usbipd -usbip_SOURCES := usbip.c usbip_network.c usbip_network.h -usbipd_SOURCES := usbipd.c usbip_network.c usbip_network.h -usbip_bind_driver_SOURCES := bind-driver.c utils.c utils.h \ - usbip_network.h usbip_network.c +usbip_SOURCES := usbip.c utils.c usbip_network.c \ + usbip_attach.c usbip_detach.c usbip_list.c \ + usbip_bind.c usbip_unbind.c + +usbipd_SOURCES := usbipd.c usbip_network.c diff --git a/drivers/staging/usbip/userspace/src/bind-driver.c b/drivers/staging/usbip/userspace/src/bind-driver.c deleted file mode 100644 index 1396ff9..0000000 --- a/drivers/staging/usbip/userspace/src/bind-driver.c +++ /dev/null @@ -1,652 +0,0 @@ -/* - * - * Copyright (C) 2005-2007 Takahiro Hirofuchi - */ - -#define _GNU_SOURCE -#include -#include - -#include "usbip.h" -#include "utils.h" - -static const struct option longopts[] = { - {"usbip", required_argument, NULL, 'u'}, - {"other", required_argument, NULL, 'o'}, - {"list", no_argument, NULL, 'l'}, - {"list2", no_argument, NULL, 'L'}, - {"help", no_argument, NULL, 'h'}, -#if 0 - {"allusbip", no_argument, NULL, 'a'}, - {"export-to", required_argument, NULL, 'e'}, - {"unexport", required_argument, NULL, 'x'}, - {"busid", required_argument, NULL, 'b'}, -#endif - - {NULL, 0, NULL, 0} -}; - -static void show_help(void) -{ - printf("Usage: usbip_bind_driver [OPTION]\n"); - printf("Change driver binding for USB/IP.\n"); - printf(" --usbip busid make a device exportable\n"); - printf(" --other busid use a device by a local driver\n"); - printf(" --list print usb devices and their drivers\n"); - printf(" --list2 print usb devices and their drivers in parseable mode\n"); -#if 0 - printf(" --allusbip make all devices exportable\n"); - printf(" --export-to host export the device to 'host'\n"); - printf(" --unexport host unexport a device previously exported to 'host'\n"); - printf(" --busid busid the busid used for --export-to\n"); -#endif -} - -static int modify_match_busid(char *busid, int add) -{ - int fd; - int ret; - char buff[BUS_ID_SIZE + 4]; - char sysfs_mntpath[SYSFS_PATH_MAX]; - char match_busid_path[SYSFS_PATH_MAX]; - - ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); - if (ret < 0) { - err("sysfs must be mounted"); - return -1; - } - - snprintf(match_busid_path, sizeof(match_busid_path), - "%s/%s/usb/%s/%s/match_busid", sysfs_mntpath, SYSFS_BUS_NAME, - SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME); - - /* BUS_IS_SIZE includes NULL termination? */ - if (strnlen(busid, BUS_ID_SIZE) > BUS_ID_SIZE - 1) { - g_warning("too long busid"); - return -1; - } - - fd = open(match_busid_path, O_WRONLY); - if (fd < 0) - return -1; - - if (add) - snprintf(buff, BUS_ID_SIZE + 4, "add %s", busid); - else - snprintf(buff, BUS_ID_SIZE + 4, "del %s", busid); - - g_debug("write \"%s\" to %s", buff, match_busid_path); - - ret = write(fd, buff, sizeof(buff)); - if (ret < 0) { - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -static const char unbind_path_format[] = "/sys/bus/usb/devices/%s/driver/unbind"; - -/* buggy driver may cause dead lock */ -static int unbind_interface_busid(char *busid) -{ - char unbind_path[PATH_MAX]; - int fd; - int ret; - - snprintf(unbind_path, sizeof(unbind_path), unbind_path_format, busid); - - fd = open(unbind_path, O_WRONLY); - if (fd < 0) { - g_warning("opening unbind_path failed: %d", fd); - return -1; - } - - ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); - if (ret < 0) { - g_warning("write to unbind_path failed: %d", ret); - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -static int unbind_interface(char *busid, int configvalue, int interface) -{ - char inf_busid[BUS_ID_SIZE]; - g_debug("unbinding interface"); - - snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); - - return unbind_interface_busid(inf_busid); -} - - -static const char bind_path_format[] = "/sys/bus/usb/drivers/%s/bind"; - -static int bind_interface_busid(char *busid, char *driver) -{ - char bind_path[PATH_MAX]; - int fd; - int ret; - - snprintf(bind_path, sizeof(bind_path), bind_path_format, driver); - - fd = open(bind_path, O_WRONLY); - if (fd < 0) - return -1; - - ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); - if (ret < 0) { - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -static int bind_interface(char *busid, int configvalue, int interface, char *driver) -{ - char inf_busid[BUS_ID_SIZE]; - - snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); - - return bind_interface_busid(inf_busid, driver); -} - -static int unbind(char *busid) -{ - int configvalue = 0; - int ninterface = 0; - int devclass = 0; - int i; - int failed = 0; - - configvalue = read_bConfigurationValue(busid); - ninterface = read_bNumInterfaces(busid); - devclass = read_bDeviceClass(busid); - - if (configvalue < 0 || ninterface < 0 || devclass < 0) { - g_warning("read config and ninf value, removed?"); - return -1; - } - - if (devclass == 0x09) { - g_message("skip unbinding of hub"); - return -1; - } - - for (i = 0; i < ninterface; i++) { - char driver[PATH_MAX]; - int ret; - - bzero(&driver, sizeof(driver)); - - getdriver(busid, configvalue, i, driver, PATH_MAX-1); - - g_debug(" %s:%d.%d -> %s ", busid, configvalue, i, driver); - - if (!strncmp("none", driver, PATH_MAX)) - continue; /* unbound interface */ - -#if 0 - if (!strncmp("usbip", driver, PATH_MAX)) - continue; /* already bound to usbip */ -#endif - - /* unbinding */ - ret = unbind_interface(busid, configvalue, i); - if (ret < 0) { - g_warning("unbind driver at %s:%d.%d failed", - busid, configvalue, i); - failed = 1; - } - } - - if (failed) - return -1; - else - return 0; -} - -/* call at unbound state */ -static int bind_to_usbip(char *busid) -{ - int configvalue = 0; - int ninterface = 0; - int i; - int failed = 0; - - configvalue = read_bConfigurationValue(busid); - ninterface = read_bNumInterfaces(busid); - - if (configvalue < 0 || ninterface < 0) { - g_warning("read config and ninf value, removed?"); - return -1; - } - - for (i = 0; i < ninterface; i++) { - int ret; - - ret = bind_interface(busid, configvalue, i, - USBIP_HOST_DRV_NAME); - if (ret < 0) { - g_warning("bind usbip at %s:%d.%d, failed", - busid, configvalue, i); - failed = 1; - /* need to contine binding at other interfaces */ - } - } - - if (failed) - return -1; - else - return 0; -} - - -static int use_device_by_usbip(char *busid) -{ - int ret; - - ret = unbind(busid); - if (ret < 0) { - g_warning("unbind drivers of %s, failed", busid); - return -1; - } - - ret = modify_match_busid(busid, 1); - if (ret < 0) { - g_warning("add %s to match_busid, failed", busid); - return -1; - } - - ret = bind_to_usbip(busid); - if (ret < 0) { - g_warning("bind usbip to %s, failed", busid); - modify_match_busid(busid, 0); - return -1; - } - - g_message("bind %s to usbip, complete!", busid); - - return 0; -} - - - -static int use_device_by_other(char *busid) -{ - int ret; - int config; - - /* read and write the same config value to kick probing */ - config = read_bConfigurationValue(busid); - if (config < 0) { - g_warning("read bConfigurationValue of %s, failed", busid); - return -1; - } - - ret = modify_match_busid(busid, 0); - if (ret < 0) { - g_warning("del %s to match_busid, failed", busid); - return -1; - } - - ret = write_bConfigurationValue(busid, config); - if (ret < 0) { - g_warning("read bConfigurationValue of %s, failed", busid); - return -1; - } - - g_message("bind %s to other drivers than usbip, complete!", busid); - - return 0; -} - - -#include -#include - -#include -#include -#include - - - -static int is_usb_device(char *busid) -{ - int ret; - - regex_t regex; - regmatch_t pmatch[1]; - - ret = regcomp(®ex, "^[0-9]+-[0-9]+(\\.[0-9]+)*$", REG_NOSUB|REG_EXTENDED); - if (ret < 0) - g_error("regcomp: %s\n", strerror(errno)); - - ret = regexec(®ex, busid, 0, pmatch, 0); - if (ret) - return 0; /* not matched */ - - return 1; -} - - -#include -static int show_devices(void) -{ - DIR *dir; - - dir = opendir("/sys/bus/usb/devices/"); - if (!dir) - g_error("opendir: %s", strerror(errno)); - - printf("List USB devices\n"); - for (;;) { - struct dirent *dirent; - char *busid; - - dirent = readdir(dir); - if (!dirent) - break; - - busid = dirent->d_name; - - if (is_usb_device(busid)) { - char name[100] = {'\0'}; - char driver[100] = {'\0'}; - int conf, ninf = 0; - int i; - - conf = read_bConfigurationValue(busid); - ninf = read_bNumInterfaces(busid); - - getdevicename(busid, name, sizeof(name)); - - printf(" - busid %s (%s)\n", busid, name); - - for (i = 0; i < ninf; i++) { - getdriver(busid, conf, i, driver, sizeof(driver)); - printf(" %s:%d.%d -> %s\n", busid, conf, i, driver); - } - printf("\n"); - } - } - - closedir(dir); - - return 0; -} - -static int show_devices2(void) -{ - DIR *dir; - - dir = opendir("/sys/bus/usb/devices/"); - if (!dir) - g_error("opendir: %s", strerror(errno)); - - for (;;) { - struct dirent *dirent; - char *busid; - - dirent = readdir(dir); - if (!dirent) - break; - - busid = dirent->d_name; - - if (is_usb_device(busid)) { - char name[100] = {'\0'}; - char driver[100] = {'\0'}; - int conf, ninf = 0; - int i; - - conf = read_bConfigurationValue(busid); - ninf = read_bNumInterfaces(busid); - - getdevicename(busid, name, sizeof(name)); - - printf("busid=%s#usbid=%s#", busid, name); - - for (i = 0; i < ninf; i++) { - getdriver(busid, conf, i, driver, sizeof(driver)); - printf("%s:%d.%d=%s#", busid, conf, i, driver); - } - printf("\n"); - } - } - - closedir(dir); - - return 0; -} - - -#if 0 -static int export_to(char *host, char *busid) { - - int ret; - - if( host == NULL ) { - printf( "no host given\n\n"); - show_help(); - return -1; - } - if( busid == NULL ) { - /* XXX print device list and ask for busnumber, if none is - * given */ - printf( "no busid given, use --busid switch\n\n"); - show_help(); - return -1; - } - - - ret = use_device_by_usbip(busid); - if( ret != 0 ) { - printf( "could not bind driver to usbip\n"); - return -1; - } - - printf( "DEBUG: exporting device '%s' to '%s'\n", busid, host ); - ret = export_busid_to_host(host, busid); /* usbip_export.[ch] */ - if( ret != 0 ) { - printf( "could not export device to host\n" ); - printf( " host: %s, device: %s\n", host, busid ); - use_device_by_other(busid); - return -1; - } - - return 0; -} - -static int unexport_from(char *host, char *busid) { - - int ret; - - if (!host || !busid) - g_error("no host or no busid\n"); - - g_message("unexport_from: host: '%s', busid: '%s'", host, busid); - - ret = unexport_busid_from_host(host, busid); /* usbip_export.[ch] */ - if( ret != 0 ) { - err( "could not unexport device from host\n" ); - err( " host: %s, device: %s\n", host, busid ); - } - - ret = use_device_by_other(busid); - if (ret < 0) - g_error("could not unbind device from usbip\n"); - - return 0; -} - - -static int allusbip(void) -{ - DIR *dir; - - dir = opendir("/sys/bus/usb/devices/"); - if (!dir) - g_error("opendir: %s", strerror(errno)); - - for (;;) { - struct dirent *dirent; - char *busid; - - dirent = readdir(dir); - if (!dirent) - break; - - busid = dirent->d_name; - - if (!is_usb_device(busid)) - continue; - - { - char name[PATH_MAX]; - int conf, ninf = 0; - int i; - int be_local = 0; - - conf = read_bConfigurationValue(busid); - ninf = read_bNumInterfaces(busid); - - getdevicename(busid, name, sizeof(name)); - - for (i = 0; i < ninf; i++) { - char driver[PATH_MAX]; - - getdriver(busid, conf, i, driver, sizeof(driver)); -#if 0 - if (strncmp(driver, "usbhid", 6) == 0 || strncmp(driver, "usb-storage", 11) == 0) { - be_local = 1; - break; - } -#endif - } - - if (be_local == 0) - use_device_by_usbip(busid); - } - } - - closedir(dir); - - return 0; -} -#endif - -int main(int argc, char **argv) -{ - char *busid = NULL; - char *remote_host __attribute__((unused)) = NULL; - - enum { - cmd_unknown = 0, - cmd_use_by_usbip, - cmd_use_by_other, - cmd_list, - cmd_list2, - cmd_allusbip, - cmd_export_to, - cmd_unexport, - cmd_help, - } cmd = cmd_unknown; - - if (geteuid() != 0) - g_warning("running non-root?"); - - for (;;) { - int c; - int index = 0; - - c = getopt_long(argc, argv, "u:o:hlLae:x:b:", longopts, &index); - if (c == -1) - break; - - switch (c) { - case 'u': - cmd = cmd_use_by_usbip; - busid = optarg; - break; - case 'o' : - cmd = cmd_use_by_other; - busid = optarg; - break; - case 'l' : - cmd = cmd_list; - break; - case 'L' : - cmd = cmd_list2; - break; - case 'a' : - cmd = cmd_allusbip; - break; - case 'b': - busid = optarg; - break; - case 'e': - cmd = cmd_export_to; - remote_host = optarg; - break; - case 'x': - cmd = cmd_unexport; - remote_host = optarg; - break; - case 'h': /* fallthrough */ - case '?': - cmd = cmd_help; - break; - default: - g_error("getopt"); - } - - //if (cmd) - // break; - } - - switch (cmd) { - case cmd_use_by_usbip: - use_device_by_usbip(busid); - break; - case cmd_use_by_other: - use_device_by_other(busid); - break; - case cmd_list: - show_devices(); - break; - case cmd_list2: - show_devices2(); - break; -#if 0 - case cmd_allusbip: - allusbip(); - break; - case cmd_export_to: - export_to(remote_host, busid); - break; - case cmd_unexport: - unexport_from(remote_host, busid); - break; -#endif - case cmd_help: /* fallthrough */ - case cmd_unknown: - show_help(); - break; - default: - g_error("NOT REACHED"); - } - - return 0; -} diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c index c73b355..8940cd0 100644 --- a/drivers/staging/usbip/userspace/src/usbip.c +++ b/drivers/staging/usbip/userspace/src/usbip.c @@ -1,724 +1,180 @@ /* + * command structure borrowed from udev + * (git://git.kernel.org/pub/scm/linux/hotplug/udev.git) * - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#ifdef HAVE_CONFIG_H -#include "../config.h" -#endif - -#include "usbip.h" -#include "usbip_network.h" -#include -#include -#include +#include #include -#include -#include - -static const char version[] = PACKAGE_STRING; - - -/* /sys/devices/platform/vhci_hcd/usb6/6-1/6-1:1.1 -> 1 */ -static int get_interface_number(char *path) -{ - char *c; - - c = strstr(path, vhci_driver->hc_device->bus_id); - if (!c) - return -1; /* hc exist? */ - c++; - /* -> usb6/6-1/6-1:1.1 */ - - c = strchr(c, '/'); - if (!c) - return -1; /* hc exist? */ - c++; - /* -> 6-1/6-1:1.1 */ - - c = strchr(c, '/'); - if (!c) - return -1; /* no interface path */ - c++; - /* -> 6-1:1.1 */ - - c = strchr(c, ':'); - if (!c) - return -1; /* no configuration? */ - c++; - /* -> 1.1 */ - - c = strchr(c, '.'); - if (!c) - return -1; /* no interface? */ - c++; - /* -> 1 */ - - - return atoi(c); -} - - -static struct sysfs_device *open_usb_interface(struct usb_device *udev, int i) -{ - struct sysfs_device *suinf; - char busid[SYSFS_BUS_ID_SIZE]; - - snprintf(busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", - udev->busid, udev->bConfigurationValue, i); - - suinf = sysfs_open_device("usb", busid); - if (!suinf) - err("sysfs_open_device %s", busid); - - return suinf; -} - - -#define MAX_BUFF 100 -static int record_connection(char *host, char *port, char *busid, int rhport) -{ - int fd; - char path[PATH_MAX+1]; - char buff[MAX_BUFF+1]; - int ret; - - mkdir(VHCI_STATE_PATH, 0700); - snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport); - - fd = open(path, O_WRONLY|O_CREAT|O_TRUNC, S_IRWXU); - if (fd < 0) - return -1; - - snprintf(buff, MAX_BUFF, "%s %s %s\n", - host, port, busid); - - ret = write(fd, buff, strlen(buff)); - if (ret != (ssize_t) strlen(buff)) { - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -static int read_record(int rhport, char *host, char *port, char *busid) -{ - FILE *file; - char path[PATH_MAX+1]; - - snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport); - - file = fopen(path, "r"); - if (!file) { - err("fopen"); - return -1; - } +#include - if (fscanf(file, "%s %s %s\n", host, port, busid) != 3) { - err("fscanf"); - fclose(file); - return -1; - } +#include "usbip_common.h" +#include "usbip.h" - fclose(file); +static int usbip_help(int argc, char *argv[]); +static int usbip_version(int argc, char *argv[]); - return 0; -} +static const char usbip_version_string[] = PACKAGE_STRING; +static const char usbip_usage_string[] = + "usbip [--debug] [version]\n" + " [help] \n"; -int usbip_vhci_imported_device_dump(struct usbip_imported_device *idev) +static void usbip_usage(void) { - char product_name[100]; - char host[NI_MAXHOST] = "unknown host"; - char serv[NI_MAXSERV] = "unknown port"; - char remote_busid[SYSFS_BUS_ID_SIZE]; - int ret; - - if (idev->status == VDEV_ST_NULL || idev->status == VDEV_ST_NOTASSIGNED) { - info("Port %02d: <%s>", idev->port, usbip_status_string(idev->status)); - return 0; - } - - ret = read_record(idev->port, host, serv, remote_busid); - if (ret) { - err("read_record"); - return -1; - } - - info("Port %02d: <%s> at %s", idev->port, - usbip_status_string(idev->status), usbip_speed_string(idev->udev.speed)); - - usbip_names_get_product(product_name, sizeof(product_name), - idev->udev.idVendor, idev->udev.idProduct); - - info(" %s", product_name); - - info("%10s -> usbip://%s:%s/%s (remote devid %08x (bus/dev %03d/%03d))", - idev->udev.busid, host, serv, remote_busid, - idev->devid, - idev->busnum, idev->devnum); - - for (int i=0; i < idev->udev.bNumInterfaces; i++) { - /* show interface information */ - struct sysfs_device *suinf; - - suinf = open_usb_interface(&idev->udev, i); - if (!suinf) - continue; - - info(" %6s used by %-17s", suinf->bus_id, suinf->driver_name); - sysfs_close_device(suinf); - - /* show class device information */ - struct usbip_class_device *cdev; - - dlist_for_each_data(idev->cdev_list, cdev, - struct usbip_class_device) { - int ifnum = get_interface_number(cdev->dev_path); - if (ifnum == i) { - info(" %s", cdev->class_path); - } - } - } - - return 0; + printf("usage: %s", usbip_usage_string); } +struct command { + const char *name; + int (*fn)(int argc, char *argv[]); + const char *help; + void (*usage)(void); +}; +static const struct command cmds[] = { + { + .name = "help", + .fn = usbip_help, + .help = NULL, + .usage = NULL + }, + { + .name = "version", + .fn = usbip_version, + .help = NULL, + .usage = NULL + }, + { + .name = "attach", + .fn = usbip_attach, + .help = "Attach a remote USB device", + .usage = usbip_attach_usage + }, + { + .name = "detach", + .fn = usbip_detach, + .help = "Detach a remote USB device", + .usage = usbip_detach_usage + }, + { + .name = "list", + .fn = usbip_list, + .help = "List exported or local USB devices", + .usage = usbip_list_usage + }, + { + .name = "bind", + .fn = usbip_bind, + .help = "Bind device to " USBIP_HOST_DRV_NAME ".ko", + .usage = usbip_bind_usage + }, + { + .name = "unbind", + .fn = usbip_unbind, + .help = "Unbind device from " USBIP_HOST_DRV_NAME ".ko", + .usage = usbip_unbind_usage + }, + { NULL, NULL, NULL, NULL } +}; - -static int query_exported_devices(int sockfd) +static int usbip_help(int argc, char *argv[]) { - int ret; - struct op_devlist_reply rep; - uint16_t code = OP_REP_DEVLIST; - - bzero(&rep, sizeof(rep)); - - ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); - if (ret < 0) { - err("send op_common"); - return -1; - } - - ret = usbip_recv_op_common(sockfd, &code); - if (ret < 0) { - err("recv op_common"); - return -1; - } - - ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep)); - if (ret < 0) { - err("recv op_devlist"); - return -1; - } - - PACK_OP_DEVLIST_REPLY(0, &rep); - dbg("exportable %d devices", rep.ndev); - - for (unsigned int i=0; i < rep.ndev; i++) { - char product_name[100]; - char class_name[100]; - struct usb_device udev; + const struct command *cmd; + int i; + int ret = 0; - bzero(&udev, sizeof(udev)); - - ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev)); - if (ret < 0) { - err("recv usb_device[%d]", i); - return -1; - } - pack_usb_device(0, &udev); - - usbip_names_get_product(product_name, sizeof(product_name), - udev.idVendor, udev.idProduct); - usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass, - udev.bDeviceSubClass, udev.bDeviceProtocol); - - info("%8s: %s", udev.busid, product_name); - info("%8s: %s", " ", udev.path); - info("%8s: %s", " ", class_name); - - for (int j=0; j < udev.bNumInterfaces; j++) { - struct usb_interface uinf; - - ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf)); - if (ret < 0) { - err("recv usb_interface[%d]", j); - return -1; + if (argc > 1 && argv++) { + for (i = 0; cmds[i].name != NULL; i++) + if (!strcmp(cmds[i].name, argv[0]) && cmds[i].usage) { + cmds[i].usage(); + goto done; } - - pack_usb_interface(0, &uinf); - usbip_names_get_class(class_name, sizeof(class_name), uinf.bInterfaceClass, - uinf.bInterfaceSubClass, uinf.bInterfaceProtocol); - - info("%8s: %2d - %s", " ", j, class_name); - } - - info(" "); - } - - return rep.ndev; -} - -static int import_device(int sockfd, struct usb_device *udev) -{ - int ret; - int port; - - ret = usbip_vhci_driver_open(); - if (ret < 0) { - err("open vhci_driver"); - return -1; - } - - port = usbip_vhci_get_free_port(); - if (port < 0) { - err("no free port"); - usbip_vhci_driver_close(); - return -1; - } - - ret = usbip_vhci_attach_device(port, sockfd, udev->busnum, - udev->devnum, udev->speed); - if (ret < 0) { - err("import device"); - usbip_vhci_driver_close(); - return -1; - } - - usbip_vhci_driver_close(); - - return port; -} - - -static int query_import_device(int sockfd, char *busid) -{ - int ret; - struct op_import_request request; - struct op_import_reply reply; - uint16_t code = OP_REP_IMPORT; - - bzero(&request, sizeof(request)); - bzero(&reply, sizeof(reply)); - - - /* send a request */ - ret = usbip_send_op_common(sockfd, OP_REQ_IMPORT, 0); - if (ret < 0) { - err("send op_common"); - return -1; - } - - strncpy(request.busid, busid, SYSFS_BUS_ID_SIZE-1); - - PACK_OP_IMPORT_REQUEST(0, &request); - - ret = usbip_send(sockfd, (void *) &request, sizeof(request)); - if (ret < 0) { - err("send op_import_request"); - return -1; + ret = -1; } - - /* recieve a reply */ - ret = usbip_recv_op_common(sockfd, &code); - if (ret < 0) { - err("recv op_common"); - return -1; - } - - ret = usbip_recv(sockfd, (void *) &reply, sizeof(reply)); - if (ret < 0) { - err("recv op_import_reply"); - return -1; - } - - PACK_OP_IMPORT_REPLY(0, &reply); - - - /* check the reply */ - if (strncmp(reply.udev.busid, busid, SYSFS_BUS_ID_SIZE)) { - err("recv different busid %s", reply.udev.busid); - return -1; - } - - - /* import a device */ - return import_device(sockfd, &reply.udev); -} - -static int attach_device(char *host, char *busid) -{ - int sockfd; - int ret; - int rhport; - - sockfd = tcp_connect(host, USBIP_PORT_STRING); - if (sockfd < 0) { - err("tcp connect"); - return -1; - } - - rhport = query_import_device(sockfd, busid); - if (rhport < 0) { - err("query"); - return -1; - } - - close(sockfd); - - ret = record_connection(host, USBIP_PORT_STRING, - busid, rhport); - if (ret < 0) { - err("record connection"); - return -1; - } - - return 0; -} - -static int detach_port(char *port) -{ - int ret; - uint8_t portnum; - - for (unsigned int i=0; i < strlen(port); i++) - if (!isdigit(port[i])) { - err("invalid port %s", port); - return -1; - } - - /* check max port */ - - portnum = atoi(port); - - ret = usbip_vhci_driver_open(); - if (ret < 0) { - err("open vhci_driver"); - return -1; - } - - ret = usbip_vhci_detach_device(portnum); - if (ret < 0) - return -1; - - usbip_vhci_driver_close(); - + usbip_usage(); + printf("\n"); + for (cmd = cmds; cmd->name != NULL; cmd++) + if (cmd->help != NULL) + printf(" %-10s %s\n", cmd->name, cmd->help); + printf("\n"); +done: return ret; } -static int show_exported_devices(char *host) +static int usbip_version(int argc, char *argv[]) { - int ret; - int sockfd; - - sockfd = tcp_connect(host, USBIP_PORT_STRING); - if (sockfd < 0) { - err("- %s failed", host); - return -1; - } - - info("- %s", host); - - ret = query_exported_devices(sockfd); - if (ret < 0) { - err("query"); - return -1; - } + (void) argc; + (void) argv; - close(sockfd); + printf("%s\n", usbip_version_string); return 0; } -static int attach_exported_devices(char *host, int sockfd) +static int run_command(const struct command *cmd, int argc, char *argv[]) { - int ret; - struct op_devlist_reply rep; - uint16_t code = OP_REP_DEVLIST; - - bzero(&rep, sizeof(rep)); - - ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); - if(ret < 0) { - err("send op_common"); - return -1; - } - - ret = usbip_recv_op_common(sockfd, &code); - if(ret < 0) { - err("recv op_common"); - return -1; - } - - ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep)); - if(ret < 0) { - err("recv op_devlist"); - return -1; - } - - PACK_OP_DEVLIST_REPLY(0, &rep); - dbg("exportable %d devices", rep.ndev); - - for(unsigned int i=0; i < rep.ndev; i++) { - char product_name[100]; - char class_name[100]; - struct usb_device udev; - - bzero(&udev, sizeof(udev)); - - ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev)); - if(ret < 0) { - err("recv usb_device[%d]", i); - return -1; - } - pack_usb_device(0, &udev); - - usbip_names_get_product(product_name, sizeof(product_name), - udev.idVendor, udev.idProduct); - usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass, - udev.bDeviceSubClass, udev.bDeviceProtocol); - - dbg("Attaching usb port %s from host %s on usbip, with deviceid: %s", udev.busid, host, product_name); - - for (int j=0; j < udev.bNumInterfaces; j++) { - struct usb_interface uinf; - - ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf)); - if (ret < 0) { - err("recv usb_interface[%d]", j); - return -1; - } - - pack_usb_interface(0, &uinf); - usbip_names_get_class(class_name, sizeof(class_name), uinf.bInterfaceClass, - uinf.bInterfaceSubClass, uinf.bInterfaceProtocol); - - dbg("interface %2d - %s", j, class_name); - } - - attach_device(host, udev.busid); - } - - return rep.ndev; -} - -static int attach_devices_all(char *host) -{ - int ret; - int sockfd; - - sockfd = tcp_connect(host, USBIP_PORT_STRING); - if(sockfd < 0) { - err("- %s failed", host); - return -1; - } - - info("- %s", host); - - ret = attach_exported_devices(host, sockfd); - if(ret < 0) { - err("query"); - return -1; - } - - close(sockfd); - return 0; -} - - -const char help_message[] = "\ -Usage: usbip [options] \n\ - -a, --attach [host] [bus_id] \n\ - Attach a remote USB device. \n\ - \n\ - -x, --attachall [host] \n\ - Attach all remote USB devices on the specific host. \n\ - \n\ - -d, --detach [ports] \n\ - Detach an imported USB device. \n\ - \n\ - -l, --list [hosts] \n\ - List exported USB devices. \n\ - \n\ - -p, --port \n\ - List virtual USB port status. \n\ - \n\ - -D, --debug \n\ - Print debugging information. \n\ - \n\ - -v, --version \n\ - Show version. \n\ - \n\ - -h, --help \n\ - Print this help. \n"; - -static void show_help(void) -{ - printf("%s", help_message); -} - -static int show_port_status(void) -{ - int ret; - struct usbip_imported_device *idev; - - ret = usbip_vhci_driver_open(); - if (ret < 0) - return ret; - - for (int i = 0; i < vhci_driver->nports; i++) { - idev = &vhci_driver->idev[i]; - - if (usbip_vhci_imported_device_dump(idev) < 0) - ret = -1; - } - - usbip_vhci_driver_close(); - - return ret; + dbg("running command: `%s'\n", cmd->name); + return cmd->fn(argc, argv); } -#define _GNU_SOURCE -#include -static const struct option longopts[] = { - {"attach", no_argument, NULL, 'a'}, - {"attachall", no_argument, NULL, 'x'}, - {"detach", no_argument, NULL, 'd'}, - {"port", no_argument, NULL, 'p'}, - {"list", no_argument, NULL, 'l'}, - {"version", no_argument, NULL, 'v'}, - {"help", no_argument, NULL, 'h'}, - {"debug", no_argument, NULL, 'D'}, - {"syslog", no_argument, NULL, 'S'}, - {NULL, 0, NULL, 0} -}; - int main(int argc, char *argv[]) { - int ret; - - enum { - cmd_attach = 1, - cmd_attachall, - cmd_detach, - cmd_port, - cmd_list, - cmd_help, - cmd_version - } cmd = 0; - - usbip_use_stderr = 1; - - if (geteuid() != 0) - g_warning("running non-root?"); - - ret = usbip_names_init(USBIDS_FILE); - if (ret) - notice("failed to open %s", USBIDS_FILE); + static const struct option opts[] = { + { "debug", no_argument, NULL, 'd' }, + { NULL, 0, NULL, 0 } + }; + char *cmd; + int opt; + int i, rc = -1; + opterr = 0; for (;;) { - int c; - int index = 0; - - c = getopt_long(argc, argv, "adplvhDSx", longopts, &index); + opt = getopt_long(argc, argv, "+d", opts, NULL); - if (c == -1) + if (opt == -1) break; - switch(c) { - case 'a': - if (!cmd) - cmd = cmd_attach; - else - cmd = cmd_help; - break; - case 'd': - if (!cmd) - cmd = cmd_detach; - else - cmd = cmd_help; - break; - case 'p': - if (!cmd) - cmd = cmd_port; - else cmd = cmd_help; - break; - case 'l': - if (!cmd) - cmd = cmd_list; - else - cmd = cmd_help; - break; - case 'v': - if (!cmd) - cmd = cmd_version; - else - cmd = cmd_help; - break; - case 'x': - if(!cmd) - cmd = cmd_attachall; - else - cmd = cmd_help; - break; - case 'h': - cmd = cmd_help; - break; - case 'D': - usbip_use_debug = 1; - break; - case 'S': - usbip_use_syslog = 1; - break; - case '?': - break; - - default: - err("getopt"); - } - } - - ret = 0; - switch(cmd) { - case cmd_attach: - if (optind == argc - 2) - ret = attach_device(argv[optind], argv[optind+1]); - else - show_help(); - break; - case cmd_detach: - while (optind < argc) - ret = detach_port(argv[optind++]); - break; - case cmd_port: - ret = show_port_status(); - break; - case cmd_list: - while (optind < argc) - ret = show_exported_devices(argv[optind++]); - break; - case cmd_attachall: - while(optind < argc) - ret = attach_devices_all(argv[optind++]); - break; - case cmd_version: - printf("%s\n", version); - break; - case cmd_help: - show_help(); + switch (opt) { + case 'd': + usbip_use_debug = 1; + usbip_use_stderr = 1; break; default: - show_help(); + goto err_out; + } } + cmd = argv[optind]; + if (cmd) { + for (i = 0; cmds[i].name != NULL; i++) + if (!strcmp(cmds[i].name, cmd)) { + argc -= optind; + argv += optind; + optind = 0; + rc = run_command(&cmds[i], argc, argv); + goto out; + } + } - usbip_names_free(); - - exit((ret == 0) ? EXIT_SUCCESS : EXIT_FAILURE); +err_out: + usbip_usage(); +out: + return (rc > -1 ? EXIT_SUCCESS : EXIT_FAILURE); } diff --git a/drivers/staging/usbip/userspace/src/usbip.h b/drivers/staging/usbip/userspace/src/usbip.h new file mode 100644 index 0000000..14d4a47 --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip.h @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __USBIP_H +#define __USBIP_H + +#ifdef HAVE_CONFIG_H +#include "../config.h" +#endif + +/* usbip commands */ +int usbip_attach(int argc, char *argv[]); +int usbip_detach(int argc, char *argv[]); +int usbip_list(int argc, char *argv[]); +int usbip_bind(int argc, char *argv[]); +int usbip_unbind(int argc, char *argv[]); + +void usbip_attach_usage(void); +void usbip_detach_usage(void); +void usbip_list_usage(void); +void usbip_bind_usage(void); +void usbip_unbind_usage(void); + +#endif /* __USBIP_H */ diff --git a/drivers/staging/usbip/userspace/src/usbip_attach.c b/drivers/staging/usbip/userspace/src/usbip_attach.c new file mode 100644 index 0000000..671d23c --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip_attach.c @@ -0,0 +1,228 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "vhci_driver.h" +#include "usbip_common.h" +#include "usbip_network.h" +#include "usbip.h" + +static const char usbip_attach_usage_string[] = + "usbip attach \n" + " -h, --host= The machine with exported USB devices\n" + " -b, --busid= Busid of the device on \n"; + +void usbip_attach_usage(void) +{ + printf("usage: %s", usbip_attach_usage_string); +} + +#define MAX_BUFF 100 +static int record_connection(char *host, char *port, char *busid, int rhport) +{ + int fd; + char path[PATH_MAX+1]; + char buff[MAX_BUFF+1]; + int ret; + + mkdir(VHCI_STATE_PATH, 0700); + + snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport); + + fd = open(path, O_WRONLY|O_CREAT|O_TRUNC, S_IRWXU); + if (fd < 0) + return -1; + + snprintf(buff, MAX_BUFF, "%s %s %s\n", + host, port, busid); + + ret = write(fd, buff, strlen(buff)); + if (ret != (ssize_t) strlen(buff)) { + close(fd); + return -1; + } + + close(fd); + + return 0; +} + +static int import_device(int sockfd, struct usb_device *udev) +{ + int rc; + int port; + + rc = usbip_vhci_driver_open(); + if (rc < 0) { + err("open vhci_driver"); + return -1; + } + + port = usbip_vhci_get_free_port(); + if (port < 0) { + err("no free port"); + usbip_vhci_driver_close(); + return -1; + } + + rc = usbip_vhci_attach_device(port, sockfd, udev->busnum, + udev->devnum, udev->speed); + if (rc < 0) { + err("import device"); + usbip_vhci_driver_close(); + return -1; + } + + usbip_vhci_driver_close(); + + return port; +} + +static int query_import_device(int sockfd, char *busid) +{ + int rc; + struct op_import_request request; + struct op_import_reply reply; + uint16_t code = OP_REP_IMPORT; + + memset(&request, 0, sizeof(request)); + memset(&reply, 0, sizeof(reply)); + + /* send a request */ + rc = usbip_send_op_common(sockfd, OP_REQ_IMPORT, 0); + if (rc < 0) { + err("send op_common"); + return -1; + } + + strncpy(request.busid, busid, SYSFS_BUS_ID_SIZE-1); + + PACK_OP_IMPORT_REQUEST(0, &request); + + rc = usbip_send(sockfd, (void *) &request, sizeof(request)); + if (rc < 0) { + err("send op_import_request"); + return -1; + } + + /* recieve a reply */ + rc = usbip_recv_op_common(sockfd, &code); + if (rc < 0) { + err("recv op_common"); + return -1; + } + + rc = usbip_recv(sockfd, (void *) &reply, sizeof(reply)); + if (rc < 0) { + err("recv op_import_reply"); + return -1; + } + + PACK_OP_IMPORT_REPLY(0, &reply); + + /* check the reply */ + if (strncmp(reply.udev.busid, busid, SYSFS_BUS_ID_SIZE)) { + err("recv different busid %s", reply.udev.busid); + return -1; + } + + /* import a device */ + return import_device(sockfd, &reply.udev); +} + +static int attach_device(char *host, char *busid) +{ + int sockfd; + int rc; + int rhport; + + sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING); + if (sockfd < 0) { + err("tcp connect"); + return -1; + } + + rhport = query_import_device(sockfd, busid); + if (rhport < 0) { + err("query"); + return -1; + } + + close(sockfd); + + rc = record_connection(host, USBIP_PORT_STRING, busid, rhport); + if (rc < 0) { + err("record connection"); + return -1; + } + + return 0; +} + +int usbip_attach(int argc, char *argv[]) +{ + static const struct option opts[] = { + { "host", required_argument, NULL, 'h' }, + { "busid", required_argument, NULL, 'b' }, + { NULL, 0, NULL, 0 } + }; + char *host = NULL; + char *busid = NULL; + int opt; + int ret = -1; + + for (;;) { + opt = getopt_long(argc, argv, "h:b:", opts, NULL); + + if (opt == -1) + break; + + switch (opt) { + case 'h': + host = optarg; + break; + case 'b': + busid = optarg; + break; + default: + goto err_out; + } + } + + if (!host || !busid) + goto err_out; + + ret = attach_device(host, busid); + goto out; + +err_out: + usbip_attach_usage(); +out: + return ret; +} diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c b/drivers/staging/usbip/userspace/src/usbip_bind.c new file mode 100644 index 0000000..26cfbad --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip_bind.c @@ -0,0 +1,261 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include +#include + +#include +#include +#include + +#include "usbip_common.h" +#include "utils.h" +#include "usbip.h" + +static const char usbip_bind_usage_string[] = + "usbip bind \n" + " -b, --busid= Bind " USBIP_HOST_DRV_NAME ".ko to device " + "on \n"; + +void usbip_bind_usage(void) +{ + printf("usage: %s", usbip_bind_usage_string); +} + +static const char unbind_path_format[] = "/sys/bus/usb/devices/%s/driver/unbind"; + +/* buggy driver may cause dead lock */ +static int unbind_interface_busid(char *busid) +{ + char unbind_path[SYSFS_PATH_MAX]; + int fd; + int ret; + + snprintf(unbind_path, sizeof(unbind_path), unbind_path_format, busid); + + fd = open(unbind_path, O_WRONLY); + if (fd < 0) { + dbg("opening unbind_path failed: %d", fd); + return -1; + } + + ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); + if (ret < 0) { + dbg("write to unbind_path failed: %d", ret); + close(fd); + return -1; + } + + close(fd); + + return 0; +} + +static int unbind_interface(char *busid, int configvalue, int interface) +{ + char inf_busid[BUS_ID_SIZE]; + dbg("unbinding interface"); + + snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); + + return unbind_interface_busid(inf_busid); +} + +static int unbind(char *busid) +{ + int configvalue = 0; + int ninterface = 0; + int devclass = 0; + int i; + int failed = 0; + + configvalue = read_bConfigurationValue(busid); + ninterface = read_bNumInterfaces(busid); + devclass = read_bDeviceClass(busid); + + if (configvalue < 0 || ninterface < 0 || devclass < 0) { + dbg("read config and ninf value, removed?"); + return -1; + } + + if (devclass == 0x09) { + dbg("skip unbinding of hub"); + return -1; + } + + for (i = 0; i < ninterface; i++) { + char driver[PATH_MAX]; + int ret; + + memset(&driver, 0, sizeof(driver)); + + getdriver(busid, configvalue, i, driver, PATH_MAX-1); + + dbg(" %s:%d.%d -> %s ", busid, configvalue, i, driver); + + if (!strncmp("none", driver, PATH_MAX)) + continue; /* unbound interface */ + +#if 0 + if (!strncmp("usbip", driver, PATH_MAX)) + continue; /* already bound to usbip */ +#endif + + /* unbinding */ + ret = unbind_interface(busid, configvalue, i); + if (ret < 0) { + dbg("unbind driver at %s:%d.%d failed", + busid, configvalue, i); + failed = 1; + } + } + + if (failed) + return -1; + else + return 0; +} + +static const char bind_path_format[] = "/sys/bus/usb/drivers/%s/bind"; + +static int bind_interface_busid(char *busid, char *driver) +{ + char bind_path[PATH_MAX]; + int fd; + int ret; + + snprintf(bind_path, sizeof(bind_path), bind_path_format, driver); + + fd = open(bind_path, O_WRONLY); + if (fd < 0) + return -1; + + ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); + if (ret < 0) { + close(fd); + return -1; + } + + close(fd); + + return 0; +} + +static int bind_interface(char *busid, int configvalue, int interface, char *driver) +{ + char inf_busid[BUS_ID_SIZE]; + + snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); + + return bind_interface_busid(inf_busid, driver); +} + +/* call at unbound state */ +static int bind_to_usbip(char *busid) +{ + int configvalue = 0; + int ninterface = 0; + int i; + int failed = 0; + + configvalue = read_bConfigurationValue(busid); + ninterface = read_bNumInterfaces(busid); + + if (configvalue < 0 || ninterface < 0) { + dbg("read config and ninf value, removed?"); + return -1; + } + + for (i = 0; i < ninterface; i++) { + int ret; + + ret = bind_interface(busid, configvalue, i, + USBIP_HOST_DRV_NAME); + if (ret < 0) { + dbg("bind usbip at %s:%d.%d, failed", + busid, configvalue, i); + failed = 1; + /* need to contine binding at other interfaces */ + } + } + + if (failed) + return -1; + else + return 0; +} + +static int use_device_by_usbip(char *busid) +{ + int ret; + + ret = unbind(busid); + if (ret < 0) { + dbg("unbind drivers of %s, failed", busid); + return -1; + } + + ret = modify_match_busid(busid, 1); + if (ret < 0) { + dbg("add %s to match_busid, failed", busid); + return -1; + } + + ret = bind_to_usbip(busid); + if (ret < 0) { + dbg("bind usbip to %s, failed", busid); + modify_match_busid(busid, 0); + return -1; + } + + dbg("bind %s complete!", busid); + + return 0; +} + +int usbip_bind(int argc, char *argv[]) +{ + static const struct option opts[] = { + { "busid", required_argument, NULL, 'b' }, + { NULL, 0, NULL, 0 } + }; + int opt; + int ret = -1; + + for (;;) { + opt = getopt_long(argc, argv, "b:", opts, NULL); + + if (opt == -1) + break; + + switch (opt) { + case 'b': + ret = use_device_by_usbip(optarg); + goto out; + default: + goto err_out; + } + } + +err_out: + usbip_bind_usage(); +out: + return ret; +} diff --git a/drivers/staging/usbip/userspace/src/usbip_detach.c b/drivers/staging/usbip/userspace/src/usbip_detach.c new file mode 100644 index 0000000..89bf3c1 --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip_detach.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "vhci_driver.h" +#include "usbip_common.h" +#include "usbip_network.h" +#include "usbip.h" + +static const char usbip_detach_usage_string[] = + "usbip detach \n" + " -p, --port= " USBIP_VHCI_DRV_NAME + " port the device is on\n"; + +void usbip_detach_usage(void) +{ + printf("usage: %s", usbip_detach_usage_string); +} + +static int detach_port(char *port) +{ + int ret; + uint8_t portnum; + + for (unsigned int i=0; i < strlen(port); i++) + if (!isdigit(port[i])) { + err("invalid port %s", port); + return -1; + } + + /* check max port */ + + portnum = atoi(port); + + ret = usbip_vhci_driver_open(); + if (ret < 0) { + err("open vhci_driver"); + return -1; + } + + ret = usbip_vhci_detach_device(portnum); + if (ret < 0) + return -1; + + usbip_vhci_driver_close(); + + return ret; +} + +int usbip_detach(int argc, char *argv[]) +{ + static const struct option opts[] = { + { "port", required_argument, NULL, 'p' }, + { NULL, 0, NULL, 0 } + }; + int opt; + int ret = -1; + + for (;;) { + opt = getopt_long(argc, argv, "p:", opts, NULL); + + if (opt == -1) + break; + + switch (opt) { + case 'p': + ret = detach_port(optarg); + goto out; + default: + goto err_out; + } + } + +err_out: + usbip_detach_usage(); +out: + return ret; +} diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c new file mode 100644 index 0000000..72236ae --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -0,0 +1,306 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "usbip_common.h" +#include "usbip_network.h" +#include "utils.h" +#include "usbip.h" + +static const char usbip_list_usage_string[] = + "usbip list [-p|--parsable] \n" + " -p, --parsable Parsable list format\n" + " -r, --remote= List the exported USB devices on \n" + " -l, --local List the local USB devices\n"; + +void usbip_list_usage(void) +{ + printf("usage: %s", usbip_list_usage_string); +} + +static int query_exported_devices(int sockfd) +{ + int ret; + struct op_devlist_reply rep; + uint16_t code = OP_REP_DEVLIST; + + memset(&rep, 0, sizeof(rep)); + + ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); + if (ret < 0) { + err("send op_common"); + return -1; + } + + ret = usbip_recv_op_common(sockfd, &code); + if (ret < 0) { + err("recv op_common"); + return -1; + } + + ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep)); + if (ret < 0) { + err("recv op_devlist"); + return -1; + } + + PACK_OP_DEVLIST_REPLY(0, &rep); + dbg("exportable %d devices", rep.ndev); + + for (unsigned int i=0; i < rep.ndev; i++) { + char product_name[100]; + char class_name[100]; + struct usb_device udev; + + memset(&udev, 0, sizeof(udev)); + + ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev)); + if (ret < 0) { + err("recv usb_device[%d]", i); + return -1; + } + pack_usb_device(0, &udev); + + usbip_names_get_product(product_name, sizeof(product_name), + udev.idVendor, udev.idProduct); + usbip_names_get_class(class_name, sizeof(class_name), + udev.bDeviceClass, udev.bDeviceSubClass, + udev.bDeviceProtocol); + + printf("%8s: %s\n", udev.busid, product_name); + printf("%8s: %s\n", " ", udev.path); + printf("%8s: %s\n", " ", class_name); + + for (int j=0; j < udev.bNumInterfaces; j++) { + struct usb_interface uinf; + + ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf)); + if (ret < 0) { + err("recv usb_interface[%d]", j); + return -1; + } + + pack_usb_interface(0, &uinf); + usbip_names_get_class(class_name, sizeof(class_name), + uinf.bInterfaceClass, + uinf.bInterfaceSubClass, + uinf.bInterfaceProtocol); + + printf("%8s: %2d - %s\n", " ", j, class_name); + } + + printf("\n"); + } + + return rep.ndev; +} + +static int show_exported_devices(char *host) +{ + int ret; + int sockfd; + + sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING); + if (sockfd < 0) { + err("unable to connect to %s port %s: %s\n", host, + USBIP_PORT_STRING, gai_strerror(sockfd)); + return -1; + } + dbg("connected to %s port %s\n", host, USBIP_PORT_STRING); + + printf("- %s\n", host); + + ret = query_exported_devices(sockfd); + if (ret < 0) { + err("query"); + return -1; + } + + close(sockfd); + return 0; +} + +static int is_usb_device(char *busid) +{ + int ret; + + regex_t regex; + regmatch_t pmatch[1]; + + ret = regcomp(®ex, "^[0-9]+-[0-9]+(\\.[0-9]+)*$", REG_NOSUB|REG_EXTENDED); + if (ret < 0) + err("regcomp: %s\n", strerror(errno)); + + ret = regexec(®ex, busid, 0, pmatch, 0); + if (ret) + return 0; /* not matched */ + + return 1; +} + +static int show_devices(void) +{ + DIR *dir; + + dir = opendir("/sys/bus/usb/devices/"); + if (!dir) + err("opendir: %s", strerror(errno)); + + printf("List USB devices\n"); + for (;;) { + struct dirent *dirent; + char *busid; + + dirent = readdir(dir); + if (!dirent) + break; + + busid = dirent->d_name; + + if (is_usb_device(busid)) { + char name[100] = {'\0'}; + char driver[100] = {'\0'}; + int conf, ninf = 0; + int i; + + conf = read_bConfigurationValue(busid); + ninf = read_bNumInterfaces(busid); + + getdevicename(busid, name, sizeof(name)); + + printf(" - busid %s (%s)\n", busid, name); + + for (i = 0; i < ninf; i++) { + getdriver(busid, conf, i, driver, + sizeof(driver)); + printf(" %s:%d.%d -> %s\n", busid, conf, + i, driver); + } + printf("\n"); + } + } + + closedir(dir); + + return 0; +} + +static int show_devices2(void) +{ + DIR *dir; + + dir = opendir("/sys/bus/usb/devices/"); + if (!dir) + err("opendir: %s", strerror(errno)); + + for (;;) { + struct dirent *dirent; + char *busid; + + dirent = readdir(dir); + if (!dirent) + break; + + busid = dirent->d_name; + + if (is_usb_device(busid)) { + char name[100] = {'\0'}; + char driver[100] = {'\0'}; + int conf, ninf = 0; + int i; + + conf = read_bConfigurationValue(busid); + ninf = read_bNumInterfaces(busid); + + getdevicename(busid, name, sizeof(name)); + + printf("busid=%s#usbid=%s#", busid, name); + + for (i = 0; i < ninf; i++) { + getdriver(busid, conf, i, driver, sizeof(driver)); + printf("%s:%d.%d=%s#", busid, conf, i, driver); + } + printf("\n"); + } + } + + closedir(dir); + + return 0; +} + +int usbip_list(int argc, char *argv[]) +{ + static const struct option opts[] = { + { "parsable", no_argument, NULL, 'p' }, + { "remote", required_argument, NULL, 'r' }, + { "local", no_argument, NULL, 'l' }, + { NULL, 0, NULL, 0 } + }; + bool is_parsable = false; + int opt; + int ret = -1; + + if (usbip_names_init(USBIDS_FILE)) + err("failed to open %s\n", USBIDS_FILE); + + for (;;) { + opt = getopt_long(argc, argv, "pr:l", opts, NULL); + + if (opt == -1) + break; + + switch (opt) { + case 'p': + is_parsable = true; + break; + case 'r': + ret = show_exported_devices(optarg); + goto out; + case 'l': + if (is_parsable) + ret = show_devices2(); + else + ret = show_devices(); + goto out; + default: + goto err_out; + } + } + +err_out: + usbip_list_usage(); +out: + usbip_names_free(); + + return ret; +} diff --git a/drivers/staging/usbip/userspace/src/usbip_unbind.c b/drivers/staging/usbip/userspace/src/usbip_unbind.c new file mode 100644 index 0000000..9978d38 --- /dev/null +++ b/drivers/staging/usbip/userspace/src/usbip_unbind.c @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include +#include + +#include "usbip_common.h" +#include "utils.h" +#include "usbip.h" + +static const char usbip_unbind_usage_string[] = + "usbip unbind \n" + " -b, --busid= Unbind " USBIP_HOST_DRV_NAME ".ko from " + "device on \n"; + +void usbip_unbind_usage(void) +{ + printf("usage: %s", usbip_unbind_usage_string); +} + +static int use_device_by_other(char *busid) +{ + int rc; + int config; + + /* read and write the same config value to kick probing */ + config = read_bConfigurationValue(busid); + if (config < 0) { + dbg("read bConfigurationValue of %s, failed", busid); + return -1; + } + + rc = modify_match_busid(busid, 0); + if (rc < 0) { + dbg("del %s to match_busid, failed", busid); + return -1; + } + + rc = write_bConfigurationValue(busid, config); + if (rc < 0) { + dbg("read bConfigurationValue of %s, failed", busid); + return -1; + } + + info("bind %s to other drivers than usbip, complete!", busid); + + return 0; +} + +int usbip_unbind(int argc, char *argv[]) +{ + static const struct option opts[] = { + { "busid", required_argument, NULL, 'b' }, + { NULL, 0, NULL, 0 } + }; + int opt; + int ret = -1; + + for (;;) { + opt = getopt_long(argc, argv, "b:", opts, NULL); + + if (opt == -1) + break; + + switch (opt) { + case 'b': + ret = use_device_by_other(optarg); + goto out; + default: + goto err_out; + } + } + +err_out: + usbip_unbind_usage(); +out: + return ret; +} diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 8f44108..6f91557 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -3,8 +3,61 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ +#include +#include +#include +#include +#include + +#include "usbip_common.h" #include "utils.h" +int modify_match_busid(char *busid, int add) +{ + int fd; + int ret; + char buff[BUS_ID_SIZE + 4]; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char match_busid_path[SYSFS_PATH_MAX]; + + ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (ret < 0) { + err("sysfs must be mounted"); + return -1; + } + + snprintf(match_busid_path, sizeof(match_busid_path), + "%s/%s/usb/%s/%s/match_busid", sysfs_mntpath, SYSFS_BUS_NAME, + SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME); + + /* BUS_IS_SIZE includes NULL termination? */ + if (strnlen(busid, BUS_ID_SIZE) > BUS_ID_SIZE - 1) { + dbg("busid is too long"); + return -1; + } + + fd = open(match_busid_path, O_WRONLY); + if (fd < 0) + return -1; + + if (add) + snprintf(buff, BUS_ID_SIZE + 4, "add %s", busid); + else + snprintf(buff, BUS_ID_SIZE + 4, "del %s", busid); + + dbg("write \"%s\" to %s", buff, match_busid_path); + + ret = write(fd, buff, sizeof(buff)); + if (ret < 0) { + close(fd); + return -1; + } + + close(fd); + + return 0; +} + int read_integer(char *path) { char buff[100]; @@ -36,7 +89,7 @@ int read_string(char *path, char *string, size_t len) int ret = 0; char *p; - bzero(string, len); + memset(string, 0, len); fd = open(path, O_RDONLY); if (fd < 0) { @@ -122,15 +175,16 @@ int getdriver(char *busid, int conf, int infnum, char *driver, size_t len) { char path[PATH_MAX]; char linkto[PATH_MAX]; + const char none[] = "none"; int ret; snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s:%d.%d/driver", busid, conf, infnum); /* readlink does not add NULL */ - bzero(linkto, sizeof(linkto)); + memset(linkto, 0, sizeof(linkto)); ret = readlink(path, linkto, sizeof(linkto)-1); if (ret < 0) { - strncpy(driver, "none", len); + strncpy(driver, none, len); return -1; } else { strncpy(driver, basename(linkto), len); diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h index 6c29ae9..423716d 100644 --- a/drivers/staging/usbip/userspace/src/utils.h +++ b/drivers/staging/usbip/userspace/src/utils.h @@ -25,6 +25,7 @@ /* Be sync to kernel header */ #define BUS_ID_SIZE 20 +int modify_match_busid(char *busid, int add); int read_string(char *path, char *, size_t len); int read_integer(char *path); int getdevicename(char *busid, char *name, size_t len); -- cgit v0.10.2 From d2c15e2580ac4ed73f0a25a69843d51211e9c620 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:12 -0700 Subject: staging: usbip: userspace: usbipd.c: add header into source file The old usbip.h header that was only used to masked what each source file needed has been changed. So some headers this file needed had to be added. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index ec9faac..ccc7dfd 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -7,6 +7,7 @@ #include "../config.h" #endif +#include #include #include #include @@ -23,16 +24,15 @@ #define _GNU_SOURCE #include +#include #include -#include "usbip.h" +#include "stub_driver.h" +#include "usbip_common.h" #include "usbip_network.h" -#include - static const char version[] = PACKAGE_STRING; - static int send_reply_devlist(int sockfd) { int ret; -- cgit v0.10.2 From 1e35d87d63c1cb954d3169b893898a12b746dadd Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 26 May 2011 06:17:13 -0700 Subject: staging: usbip: userspace: usbip_network: rename and cleanup function Rename tcp_connection to usbip_net_tcp_connection, which alludes to a usbip network library that will eventually follow. The implementation of this function has also been cleaned up. Headers had to be adjusted due to the elimination of the old usbip.h. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c index 01be3c7..ef93b02 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.c +++ b/drivers/staging/usbip/userspace/src/usbip_network.c @@ -3,6 +3,16 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ +#include +#include + +#include + +#include +#include +#include + +#include "usbip_common.h" #include "usbip_network.h" void pack_uint32_t(int pack, uint32_t *num) @@ -186,66 +196,49 @@ int usbip_set_keepalive(int sockfd) return ret; } -/* IPv6 Ready */ /* - * moved here from vhci_attach.c + * IPv6 Ready */ -int tcp_connect(char *hostname, char *service) +int usbip_net_tcp_connect(char *hostname, char *port) { - struct addrinfo hints, *res, *res0; + struct addrinfo hints, *res, *rp; int sockfd; - int err; - + int ret; memset(&hints, 0, sizeof(hints)); + hints.ai_family = AF_UNSPEC; hints.ai_socktype = SOCK_STREAM; /* get all possible addresses */ - err = getaddrinfo(hostname, service, &hints, &res0); - if (err) { - err("%s %s: %s", hostname, service, gai_strerror(err)); - return -1; + ret = getaddrinfo(hostname, port, &hints, &res); + if (ret < 0) { + dbg("getaddrinfo: %s port %s: %s", hostname, port, + gai_strerror(ret)); + return ret; } - /* try all the addresses */ - for (res = res0; res; res = res->ai_next) { - char hbuf[NI_MAXHOST], sbuf[NI_MAXSERV]; - - err = getnameinfo(res->ai_addr, res->ai_addrlen, - hbuf, sizeof(hbuf), sbuf, sizeof(sbuf), NI_NUMERICHOST | NI_NUMERICSERV); - if (err) { - err("%s %s: %s", hostname, service, gai_strerror(err)); - continue; - } - - dbg("trying %s port %s\n", hbuf, sbuf); - - sockfd = socket(res->ai_family, res->ai_socktype, res->ai_protocol); - if (sockfd < 0) { - err("socket"); + /* try the addresses */ + for (rp = res; rp; rp = rp->ai_next) { + sockfd = socket(rp->ai_family, rp->ai_socktype, + rp->ai_protocol); + if (sockfd < 0) continue; - } /* should set TCP_NODELAY for usbip */ usbip_set_nodelay(sockfd); - /* TODO: write code for heatbeat */ + /* TODO: write code for heartbeat */ usbip_set_keepalive(sockfd); - err = connect(sockfd, res->ai_addr, res->ai_addrlen); - if (err < 0) { - close(sockfd); - continue; - } + if (connect(sockfd, rp->ai_addr, rp->ai_addrlen) == 0) + break; - /* connected */ - dbg("connected to %s:%s", hbuf, sbuf); - freeaddrinfo(res0); - return sockfd; + close(sockfd); } + if (!rp) + return EAI_SYSTEM; - dbg("%s:%s, %s", hostname, service, "no destination to connect to"); - freeaddrinfo(res0); + freeaddrinfo(res); - return -1; + return sockfd; } diff --git a/drivers/staging/usbip/userspace/src/usbip_network.h b/drivers/staging/usbip/userspace/src/usbip_network.h index 1225466..82b0811 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.h +++ b/drivers/staging/usbip/userspace/src/usbip_network.h @@ -2,19 +2,20 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#ifndef _USBIP_NETWORK_H -#define _USBIP_NETWORK_H +#ifndef __USBIP_NETWORK_H +#define __USBIP_NETWORK_H -#include "usbip.h" -#include -#include -#include +#ifdef HAVE_CONFIG_H +#include "../config.h" +#endif +#include +#include -/* -------------------------------------------------- */ -/* Define Protocol Format */ -/* -------------------------------------------------- */ +#include +#define USBIP_PORT 3240 +#define USBIP_PORT_STRING "3240" /* ---------------------------------------------------------------------- */ /* Common header for all the kinds of PDUs. */ @@ -38,7 +39,6 @@ struct op_common { pack_uint32_t(pack, &(op_common)->status );\ } while (0) - /* ---------------------------------------------------------------------- */ /* Dummy Code */ #define OP_UNSPEC 0x00 @@ -60,7 +60,6 @@ struct op_devinfo_reply { struct usb_interface uinf[]; } __attribute__((packed)); - /* ---------------------------------------------------------------------- */ /* Import a remote USB device. */ #define OP_IMPORT 0x03 @@ -83,8 +82,6 @@ struct op_import_reply { pack_usb_device(pack, &(reply)->udev);\ } while (0) - - /* ---------------------------------------------------------------------- */ /* Export a USB device to a remote host. */ #define OP_EXPORT 0x06 @@ -128,8 +125,6 @@ struct op_unexport_reply { #define PACK_OP_UNEXPORT_REPLY(pack, reply) do {\ } while (0) - - /* ---------------------------------------------------------------------- */ /* Negotiate IPSec encryption key. (still not used) */ #define OP_CRYPKEY 0x04 @@ -172,11 +167,6 @@ struct op_devlist_reply_extra { pack_uint32_t(pack, &(reply)->ndev);\ } while (0) - -/* -------------------------------------------------- */ -/* Declare Prototype Function */ -/* -------------------------------------------------- */ - void pack_uint32_t(int pack, uint32_t *num); void pack_uint16_t(int pack, uint16_t *num); void pack_usb_device(int pack, struct usb_device *udev); @@ -190,9 +180,6 @@ int usbip_set_reuseaddr(int sockfd); int usbip_set_nodelay(int sockfd); int usbip_set_keepalive(int sockfd); -int tcp_connect(char *hostname, char *service); +int usbip_net_tcp_connect(char *hostname, char *port); -#define USBIP_PORT 3240 -#define USBIP_PORT_STRING "3240" - -#endif +#endif /* __USBIP_NETWORK_H */ -- cgit v0.10.2 From 69c685c7f5c50d5bc8c6b3e996d68495c7d3e09a Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 27 May 2011 11:25:59 +0800 Subject: staging: usbip: README: we need to document the protocol Document the protocol. Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/README b/drivers/staging/usbip/README index c11be57..41a2cf2 100644 --- a/drivers/staging/usbip/README +++ b/drivers/staging/usbip/README @@ -2,5 +2,6 @@ TODO: - more discussion about the protocol - testing - review of the userspace interface + - document the protocol Please send patches for this code to Greg Kroah-Hartman -- cgit v0.10.2 From acf51ab8ce3ed9e409c6c04eae1968affa8ae311 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 27 May 2011 11:26:00 +0800 Subject: Staging: usbip: vhci.h: remove FSF address Remove the FSF address from the comment header. Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci.h b/drivers/staging/usbip/vhci.h index d5bc8e7..3a1bacb 100644 --- a/drivers/staging/usbip/vhci.h +++ b/drivers/staging/usbip/vhci.h @@ -6,15 +6,6 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * - * This is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, - * USA. */ #include -- cgit v0.10.2 From a6d81814a5fe83c43539c0df8ed2d701911496c2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A1rton=20N=C3=A9meth?= Date: Fri, 27 May 2011 06:18:48 +0200 Subject: usbip: remove extra whitespace MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only one whitespace is enough after "return". Signed-off-by: Márton Németh Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c index 7b6e4a9..ecd52b6 100644 --- a/drivers/staging/usbip/vhci_sysfs.c +++ b/drivers/staging/usbip/vhci_sysfs.c @@ -192,7 +192,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr, /* check sockfd */ socket = sockfd_to_socket(sockfd); if (!socket) - return -EINVAL; + return -EINVAL; /* now need lock until setting vdev status as used */ -- cgit v0.10.2 From 950a4cd8fcc61ffc7bb8cd5890e80e7459e22597 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:10 -0700 Subject: staging: usbip: userspace: use memset instead of bzero bzero is and has been deprecated since POSIX.1-2001. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac index e7d801b..06fb95d 100644 --- a/drivers/staging/usbip/userspace/configure.ac +++ b/drivers/staging/usbip/userspace/configure.ac @@ -29,7 +29,7 @@ AC_PROG_MAKE_SET AC_HEADER_DIRENT AC_HEADER_STDC AC_CHECK_HEADERS([arpa/inet.h fcntl.h netdb.h netinet/in.h stdint.h stdlib.h dnl - string.h strings.h sys/socket.h syslog.h unistd.h]) + string.h sys/socket.h syslog.h unistd.h]) # Checks for typedefs, structures, and compiler characteristics. AC_TYPE_INT32_T @@ -41,7 +41,7 @@ AC_TYPE_UINT8_T # Checks for library functions. AC_FUNC_REALLOC -AC_CHECK_FUNCS([bzero memset mkdir regcomp socket strchr strerror strstr dnl +AC_CHECK_FUNCS([memset mkdir regcomp socket strchr strerror strstr dnl strtoul]) AC_CHECK_HEADER([sysfs/libsysfs.h], diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index 2c58af5..b38396f 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -12,7 +12,6 @@ #include #include #include -#include #include #include diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index f2030b1..386f63b 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -52,7 +52,7 @@ static int parse_status(char *value) for (int i = 0; i < vhci_driver->nports; i++) - bzero(&vhci_driver->idev[i], sizeof(struct usbip_imported_device)); + memset(&vhci_driver->idev[i], 0, sizeof(vhci_driver->idev[i])); /* skip a header line */ diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c index ef93b02..0e0de56 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.c +++ b/drivers/staging/usbip/userspace/src/usbip_network.c @@ -100,7 +100,7 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) int ret; struct op_common op_common; - bzero(&op_common, sizeof(op_common)); + memset(&op_common, 0, sizeof(op_common)); op_common.version = USBIP_VERSION; op_common.code = code; @@ -122,7 +122,7 @@ int usbip_recv_op_common(int sockfd, uint16_t *code) int ret; struct op_common op_common; - bzero(&op_common, sizeof(op_common)); + memset(&op_common, 0, sizeof(op_common)); ret = usbip_recv(sockfd, (void *) &op_common, sizeof(op_common)); if (ret < 0) { diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index ccc7dfd..12ff00b 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include @@ -100,7 +100,7 @@ static int recv_request_devlist(int sockfd) int ret; struct op_devlist_request req; - bzero(&req, sizeof(req)); + memset(&req, 0, sizeof(req)); ret = usbip_recv(sockfd, (void *) &req, sizeof(req)); if (ret < 0) { @@ -127,8 +127,8 @@ static int recv_request_import(int sockfd) int found = 0; int error = 0; - bzero(&req, sizeof(req)); - bzero(&reply, sizeof(reply)); + memset(&req, 0, sizeof(req)); + memset(&reply, 0, sizeof(reply)); ret = usbip_recv(sockfd, (void *) &req, sizeof(req)); if (ret < 0) { @@ -244,7 +244,7 @@ static struct addrinfo *my_getaddrinfo(char *host, int ai_family) int ret; struct addrinfo hints, *ai_head; - bzero(&hints, sizeof(hints)); + memset(&hints, 0, sizeof(hints)); hints.ai_family = ai_family; hints.ai_socktype = SOCK_STREAM; @@ -337,7 +337,7 @@ static int my_accept(int lsock) char host[NI_MAXHOST], port[NI_MAXSERV]; int ret; - bzero(&ss, sizeof(ss)); + memset(&ss, 0, sizeof(ss)); csock = accept(lsock, (struct sockaddr *) &ss, &len); if (csock < 0) { @@ -380,7 +380,7 @@ static void set_signal(void) { struct sigaction act; - bzero(&act, sizeof(act)); + memset(&act, 0, sizeof(act)); act.sa_handler = signal_handler; sigemptyset(&act.sa_mask); sigaction(SIGTERM, &act, NULL); diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 6f91557..35b05e4 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -64,7 +64,7 @@ int read_integer(char *path) int fd; int ret = 0; - bzero(buff, sizeof(buff)); + memset(buff, 0, sizeof(buff)); fd = open(path, O_RDONLY); if (fd < 0) -- cgit v0.10.2 From 4cbab52d18fc35e3c66f68e0382cd0815d31bb5f Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:11 -0700 Subject: staging: usbip: userspace: move header includes out utils.h The includes have been moved out of utils.h to their respective source files where they are suppose to be. An include guard is also added to utils.h Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c b/drivers/staging/usbip/userspace/src/usbip_bind.c index 26cfbad..9869db2 100644 --- a/drivers/staging/usbip/userspace/src/usbip_bind.c +++ b/drivers/staging/usbip/userspace/src/usbip_bind.c @@ -18,11 +18,12 @@ #include +#include #include #include -#include #include +#include #include #include "usbip_common.h" diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 35b05e4..6dbfdbd 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -4,9 +4,13 @@ */ #include + +#include +#include +#include + #include #include -#include #include #include "usbip_common.h" diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h index 423716d..36ee8d5 100644 --- a/drivers/staging/usbip/userspace/src/utils.h +++ b/drivers/staging/usbip/userspace/src/utils.h @@ -1,26 +1,7 @@ +#ifndef __UTILS_H +#define __UTILS_H -#ifdef HAVE_CONFIG_H -#include "../config.h" -#endif - -#define _GNU_SOURCE -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include #include -#include -#include - - /* Be sync to kernel header */ #define BUS_ID_SIZE 20 @@ -37,3 +18,5 @@ int write_bConfigurationValue(char *busid, int config); int read_bDeviceClass(char *busid); int readline(int sockfd, char *str, int strlen); int writeline(int sockfd, char *buff, int bufflen); + +#endif /* __UTILS_H */ -- cgit v0.10.2 From 3e4fda9f956d3e8f14e8cabc6dd4f1caa95981e4 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:12 -0700 Subject: staging: usbip: change the busid size Change busid size to correspond with SYSFS_BUS_ID_SIZE, which was already being used in most cases. This eliminates the need to define BUS_ID_SIZE in the userspace code. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub.h b/drivers/staging/usbip/stub.h index 2cc596e..132adc5 100644 --- a/drivers/staging/usbip/stub.h +++ b/drivers/staging/usbip/stub.h @@ -76,7 +76,8 @@ struct stub_unlink { __u32 status; }; -#define BUSID_SIZE 20 +/* same as SYSFS_BUS_ID_SIZE */ +#define BUSID_SIZE 32 struct bus_id_priv { char name[BUSID_SIZE]; diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c b/drivers/staging/usbip/userspace/src/usbip_bind.c index 9869db2..978b7aa 100644 --- a/drivers/staging/usbip/userspace/src/usbip_bind.c +++ b/drivers/staging/usbip/userspace/src/usbip_bind.c @@ -57,7 +57,7 @@ static int unbind_interface_busid(char *busid) return -1; } - ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); + ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE)); if (ret < 0) { dbg("write to unbind_path failed: %d", ret); close(fd); @@ -71,10 +71,11 @@ static int unbind_interface_busid(char *busid) static int unbind_interface(char *busid, int configvalue, int interface) { - char inf_busid[BUS_ID_SIZE]; + char inf_busid[SYSFS_BUS_ID_SIZE]; dbg("unbinding interface"); - snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); + snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, + interface); return unbind_interface_busid(inf_busid); } @@ -148,7 +149,7 @@ static int bind_interface_busid(char *busid, char *driver) if (fd < 0) return -1; - ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE)); + ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE)); if (ret < 0) { close(fd); return -1; @@ -161,9 +162,10 @@ static int bind_interface_busid(char *busid, char *driver) static int bind_interface(char *busid, int configvalue, int interface, char *driver) { - char inf_busid[BUS_ID_SIZE]; + char inf_busid[SYSFS_BUS_ID_SIZE]; - snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface); + snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, + interface); return bind_interface_busid(inf_busid, driver); } diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 6dbfdbd..1da1109 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -20,7 +20,7 @@ int modify_match_busid(char *busid, int add) { int fd; int ret; - char buff[BUS_ID_SIZE + 4]; + char buff[SYSFS_BUS_ID_SIZE + 4]; char sysfs_mntpath[SYSFS_PATH_MAX]; char match_busid_path[SYSFS_PATH_MAX]; @@ -35,7 +35,7 @@ int modify_match_busid(char *busid, int add) SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME); /* BUS_IS_SIZE includes NULL termination? */ - if (strnlen(busid, BUS_ID_SIZE) > BUS_ID_SIZE - 1) { + if (strnlen(busid, SYSFS_BUS_ID_SIZE) > SYSFS_BUS_ID_SIZE - 1) { dbg("busid is too long"); return -1; } @@ -45,9 +45,9 @@ int modify_match_busid(char *busid, int add) return -1; if (add) - snprintf(buff, BUS_ID_SIZE + 4, "add %s", busid); + snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "add %s", busid); else - snprintf(buff, BUS_ID_SIZE + 4, "del %s", busid); + snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "del %s", busid); dbg("write \"%s\" to %s", buff, match_busid_path); diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h index 36ee8d5..b50e95a 100644 --- a/drivers/staging/usbip/userspace/src/utils.h +++ b/drivers/staging/usbip/userspace/src/utils.h @@ -3,9 +3,6 @@ #include -/* Be sync to kernel header */ -#define BUS_ID_SIZE 20 - int modify_match_busid(char *busid, int add); int read_string(char *path, char *, size_t len); int read_integer(char *path); -- cgit v0.10.2 From 74ce259c670a6d468802c725570a16b0483a2ae8 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:13 -0700 Subject: staging: usbip: userspace: usbip_list.c: refactor local USB device listing Combines the different list display types for local devices into one function. Removes dependence on utils.h, which only exists as a way to circumvent libsysfs and will be removed. The devices are now sorted as an added benefit of this refactor. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 72236ae..4bbfae8 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -23,17 +23,15 @@ #include #include #include +#include #include -#include #include #include -#include #include #include "usbip_common.h" #include "usbip_network.h" -#include "utils.h" #include "usbip.h" static const char usbip_list_usage_string[] = @@ -149,113 +147,104 @@ static int show_exported_devices(char *host) return 0; } -static int is_usb_device(char *busid) +static void print_device(char *busid, char *vendor, char *product, + bool parsable) { - int ret; - - regex_t regex; - regmatch_t pmatch[1]; - - ret = regcomp(®ex, "^[0-9]+-[0-9]+(\\.[0-9]+)*$", REG_NOSUB|REG_EXTENDED); - if (ret < 0) - err("regcomp: %s\n", strerror(errno)); - - ret = regexec(®ex, busid, 0, pmatch, 0); - if (ret) - return 0; /* not matched */ - - return 1; + if (parsable) + printf("busid=%s#usbid=%.4s:%.4s#", busid, vendor, product); + else + printf(" - busid %s (%.4s:%.4s)\n", busid, vendor, product); } -static int show_devices(void) +static void print_interface(char *busid, char *driver, bool parsable) { - DIR *dir; - - dir = opendir("/sys/bus/usb/devices/"); - if (!dir) - err("opendir: %s", strerror(errno)); - - printf("List USB devices\n"); - for (;;) { - struct dirent *dirent; - char *busid; - - dirent = readdir(dir); - if (!dirent) - break; - - busid = dirent->d_name; - - if (is_usb_device(busid)) { - char name[100] = {'\0'}; - char driver[100] = {'\0'}; - int conf, ninf = 0; - int i; - - conf = read_bConfigurationValue(busid); - ninf = read_bNumInterfaces(busid); - - getdevicename(busid, name, sizeof(name)); - - printf(" - busid %s (%s)\n", busid, name); - - for (i = 0; i < ninf; i++) { - getdriver(busid, conf, i, driver, - sizeof(driver)); - printf(" %s:%d.%d -> %s\n", busid, conf, - i, driver); - } - printf("\n"); - } - } - - closedir(dir); - - return 0; + if (parsable) + printf("%s=%s#", busid, driver); + else + printf("%9s%s -> %s\n", "", busid, driver); } -static int show_devices2(void) +static int is_device(void *x) { - DIR *dir; + struct sysfs_attribute *devpath; + struct sysfs_device *dev = x; + int ret = 0; - dir = opendir("/sys/bus/usb/devices/"); - if (!dir) - err("opendir: %s", strerror(errno)); + devpath = sysfs_get_device_attr(dev, "devpath"); + if (devpath && *devpath->value != '0') + ret = 1; - for (;;) { - struct dirent *dirent; - char *busid; + return ret; +} - dirent = readdir(dir); - if (!dirent) - break; +static int devcmp(void *a, void *b) +{ + return strcmp(a, b); +} - busid = dirent->d_name; +static int list_devices(bool parsable) +{ + char bus_type[] = "usb"; + char busid[SYSFS_BUS_ID_SIZE]; + struct sysfs_bus *ubus; + struct sysfs_device *dev; + struct sysfs_device *intf; + struct sysfs_attribute *idVendor; + struct sysfs_attribute *idProduct; + struct sysfs_attribute *bConfValue; + struct sysfs_attribute *bNumIntfs; + struct dlist *devlist; + int i; + int ret = -1; - if (is_usb_device(busid)) { - char name[100] = {'\0'}; - char driver[100] = {'\0'}; - int conf, ninf = 0; - int i; + ubus = sysfs_open_bus(bus_type); + if (!ubus) { + err("sysfs_open_bus: %s", strerror(errno)); + return -1; + } - conf = read_bConfigurationValue(busid); - ninf = read_bNumInterfaces(busid); + devlist = sysfs_get_bus_devices(ubus); + if (!devlist) { + err("sysfs_get_bus_devices: %s", strerror(errno)); + goto err_out; + } - getdevicename(busid, name, sizeof(name)); + /* remove interfaces and root hubs from device list */ + dlist_filter_sort(devlist, is_device, devcmp); - printf("busid=%s#usbid=%s#", busid, name); + if (!parsable) { + printf("Local USB devices\n"); + printf("=================\n"); + } + dlist_for_each_data(devlist, dev, struct sysfs_device) { + idVendor = sysfs_get_device_attr(dev, "idVendor"); + idProduct = sysfs_get_device_attr(dev, "idProduct"); + bConfValue = sysfs_get_device_attr(dev, "bConfigurationValue"); + bNumIntfs = sysfs_get_device_attr(dev, "bNumInterfaces"); + if (!idVendor || !idProduct || !bConfValue || !bNumIntfs) + goto err_out; - for (i = 0; i < ninf; i++) { - getdriver(busid, conf, i, driver, sizeof(driver)); - printf("%s:%d.%d=%s#", busid, conf, i, driver); - } - printf("\n"); + print_device(dev->bus_id, idVendor->value, idProduct->value, + parsable); + + for (i = 0; i < atoi(bNumIntfs->value); i++) { + snprintf(busid, sizeof(busid), "%s:%.1s.%d", + dev->bus_id, bConfValue->value, i); + intf = sysfs_open_device(bus_type, busid); + if (!intf) + goto err_out; + print_interface(busid, intf->driver_name, parsable); + sysfs_close_device(intf); } + printf("\n"); } - closedir(dir); + ret = 0; - return 0; +err_out: + sysfs_close_bus(ubus); + + return ret; } int usbip_list(int argc, char *argv[]) @@ -266,12 +255,12 @@ int usbip_list(int argc, char *argv[]) { "local", no_argument, NULL, 'l' }, { NULL, 0, NULL, 0 } }; - bool is_parsable = false; + bool parsable = false; int opt; int ret = -1; if (usbip_names_init(USBIDS_FILE)) - err("failed to open %s\n", USBIDS_FILE); + err("failed to open %s", USBIDS_FILE); for (;;) { opt = getopt_long(argc, argv, "pr:l", opts, NULL); @@ -281,16 +270,13 @@ int usbip_list(int argc, char *argv[]) switch (opt) { case 'p': - is_parsable = true; + parsable = true; break; case 'r': ret = show_exported_devices(optarg); goto out; case 'l': - if (is_parsable) - ret = show_devices2(); - else - ret = show_devices(); + ret = list_devices(parsable); goto out; default: goto err_out; -- cgit v0.10.2 From 35dd0c2da61a584678a4a8425c174c7dbdd36e2b Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:14 -0700 Subject: staging: usbip: userspace: rename usbip device and interface Add prefix of usbip_ to internal usb device and interface to avoid confusion with the kernel types. This also identifies the types as being part of the usbip library. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index 0355604..4d4d171 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -43,7 +43,7 @@ static struct sysfs_driver *open_sysfs_stub_driver(void) #define SYSFS_OPEN_RETRIES 100 /* only the first interface value is true! */ -static int32_t read_attr_usbip_status(struct usb_device *udev) +static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) { char attrpath[SYSFS_PATH_MAX]; struct sysfs_attribute *attr; @@ -145,7 +145,8 @@ static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) goto err; /* reallocate buffer to include usb interface data */ - size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * sizeof(struct usb_interface); + size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * + sizeof(struct usbip_usb_interface); edev = (struct usbip_exported_device *) realloc(edev, size); if (!edev) { err("alloc device"); diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.h b/drivers/staging/usbip/userspace/libsrc/stub_driver.h index 3107d18..332ebc5 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.h @@ -19,8 +19,8 @@ struct usbip_exported_device { struct sysfs_device *sudev; int32_t status; - struct usb_device udev; - struct usb_interface uinf[]; + struct usbip_usb_device udev; + struct usbip_usb_interface uinf[]; }; diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.c b/drivers/staging/usbip/userspace/libsrc/usbip_common.c index a128a92..e9d0614 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.c +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.c @@ -64,7 +64,7 @@ const char *usbip_speed_string(int num) #define DBG_UINF_INTEGER(name)\ dbg("%-20s = %x", to_string(name), (int) uinf->name) -void dump_usb_interface(struct usb_interface *uinf) +void dump_usb_interface(struct usbip_usb_interface *uinf) { char buff[100]; usbip_names_get_class(buff, sizeof(buff), @@ -74,7 +74,7 @@ void dump_usb_interface(struct usb_interface *uinf) dbg("%-20s = %s", "Interface(C/SC/P)", buff); } -void dump_usb_device(struct usb_device *udev) +void dump_usb_device(struct usbip_usb_device *udev) { char buff[100]; @@ -181,7 +181,7 @@ err: do { (object)->name = (type) read_attr_value(dev, to_string(name), format); } while (0) -int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev) +int read_usb_device(struct sysfs_device *sdev, struct usbip_usb_device *udev) { uint32_t busnum, devnum; @@ -209,7 +209,8 @@ int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev) return 0; } -int read_usb_interface(struct usb_device *udev, int i, struct usb_interface *uinf) +int read_usb_interface(struct usbip_usb_device *udev, int i, + struct usbip_usb_interface *uinf) { char busid[SYSFS_BUS_ID_SIZE]; struct sysfs_device *sif; diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index b38396f..32b27ed 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -104,7 +104,7 @@ extern int usbip_use_debug ; #define BUG() do { err("sorry, it's a bug"); abort(); } while (0) -struct usb_interface { +struct usbip_usb_interface { uint8_t bInterfaceClass; uint8_t bInterfaceSubClass; uint8_t bInterfaceProtocol; @@ -113,7 +113,7 @@ struct usb_interface { -struct usb_device { +struct usbip_usb_device { char path[SYSFS_PATH_MAX]; char busid[SYSFS_BUS_ID_SIZE]; @@ -135,11 +135,12 @@ struct usb_device { #define to_string(s) #s -void dump_usb_interface(struct usb_interface *); -void dump_usb_device(struct usb_device *); -int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev); +void dump_usb_interface(struct usbip_usb_interface *); +void dump_usb_device(struct usbip_usb_device *); +int read_usb_device(struct sysfs_device *sdev, struct usbip_usb_device *udev); int read_attr_value(struct sysfs_device *dev, const char *name, const char *format); -int read_usb_interface(struct usb_device *udev, int i, struct usb_interface *uinf); +int read_usb_interface(struct usbip_usb_device *udev, int i, + struct usbip_usb_interface *uinf); const char *usbip_speed_string(int num); const char *usbip_status_string(int32_t status); diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h index 3395586..a2f7db1 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h @@ -27,7 +27,7 @@ struct usbip_imported_device { /* usbip_class_device list */ struct dlist *cdev_list; - struct usb_device udev; + struct usbip_usb_device udev; }; struct usbip_vhci_driver { diff --git a/drivers/staging/usbip/userspace/src/usbip_attach.c b/drivers/staging/usbip/userspace/src/usbip_attach.c index 671d23c..189238b 100644 --- a/drivers/staging/usbip/userspace/src/usbip_attach.c +++ b/drivers/staging/usbip/userspace/src/usbip_attach.c @@ -73,7 +73,7 @@ static int record_connection(char *host, char *port, char *busid, int rhport) return 0; } -static int import_device(int sockfd, struct usb_device *udev) +static int import_device(int sockfd, struct usbip_usb_device *udev) { int rc; int port; diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 4bbfae8..e69c457 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -77,13 +77,13 @@ static int query_exported_devices(int sockfd) for (unsigned int i=0; i < rep.ndev; i++) { char product_name[100]; char class_name[100]; - struct usb_device udev; + struct usbip_usb_device udev; memset(&udev, 0, sizeof(udev)); ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev)); if (ret < 0) { - err("recv usb_device[%d]", i); + err("recv usbip_usb_device[%d]", i); return -1; } pack_usb_device(0, &udev); @@ -99,11 +99,11 @@ static int query_exported_devices(int sockfd) printf("%8s: %s\n", " ", class_name); for (int j=0; j < udev.bNumInterfaces; j++) { - struct usb_interface uinf; + struct usbip_usb_interface uinf; ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf)); if (ret < 0) { - err("recv usb_interface[%d]", j); + err("recv usbip_usb_interface[%d]", j); return -1; } diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c index 0e0de56..26e95bd 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.c +++ b/drivers/staging/usbip/userspace/src/usbip_network.c @@ -4,10 +4,10 @@ */ #include -#include #include +#include #include #include #include @@ -39,7 +39,7 @@ void pack_uint16_t(int pack, uint16_t *num) *num = i; } -void pack_usb_device(int pack, struct usb_device *udev) +void pack_usb_device(int pack, struct usbip_usb_device *udev) { pack_uint32_t(pack, &udev->busnum); pack_uint32_t(pack, &udev->devnum); @@ -51,7 +51,7 @@ void pack_usb_device(int pack, struct usb_device *udev) } void pack_usb_interface(int pack __attribute__((unused)), - struct usb_interface *udev __attribute__((unused))) + struct usbip_usb_interface *udev __attribute__((unused))) { /* uint8_t members need nothing */ } @@ -102,15 +102,15 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) memset(&op_common, 0, sizeof(op_common)); - op_common.version = USBIP_VERSION; - op_common.code = code; - op_common.status = status; + op_common.version = USBIP_VERSION; + op_common.code = code; + op_common.status = status; PACK_OP_COMMON(1, &op_common); ret = usbip_send(sockfd, (void *) &op_common, sizeof(op_common)); if (ret < 0) { - err("send op_common"); + err("usbip_send has failed"); return -1; } @@ -126,7 +126,7 @@ int usbip_recv_op_common(int sockfd, uint16_t *code) ret = usbip_recv(sockfd, (void *) &op_common, sizeof(op_common)); if (ret < 0) { - err("recv op_common, %d", ret); + err("usbip_recv has failed ret=%d", ret); goto err; } diff --git a/drivers/staging/usbip/userspace/src/usbip_network.h b/drivers/staging/usbip/userspace/src/usbip_network.h index 82b0811..07274df 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.h +++ b/drivers/staging/usbip/userspace/src/usbip_network.h @@ -56,8 +56,8 @@ struct op_devinfo_request { } __attribute__((packed)); struct op_devinfo_reply { - struct usb_device udev; - struct usb_interface uinf[]; + struct usbip_usb_device udev; + struct usbip_usb_interface uinf[]; } __attribute__((packed)); /* ---------------------------------------------------------------------- */ @@ -71,8 +71,8 @@ struct op_import_request { } __attribute__((packed)); struct op_import_reply { - struct usb_device udev; -// struct usb_interface uinf[]; + struct usbip_usb_device udev; +// struct usbip_usb_interface uinf[]; } __attribute__((packed)); #define PACK_OP_IMPORT_REQUEST(pack, request) do {\ @@ -89,7 +89,7 @@ struct op_import_reply { #define OP_REP_EXPORT (OP_REPLY | OP_EXPORT) struct op_export_request { - struct usb_device udev; + struct usbip_usb_device udev; } __attribute__((packed)); struct op_export_reply { @@ -111,7 +111,7 @@ struct op_export_reply { #define OP_REP_UNEXPORT (OP_REPLY | OP_UNEXPORT) struct op_unexport_request { - struct usb_device udev; + struct usbip_usb_device udev; } __attribute__((packed)); struct op_unexport_reply { @@ -156,8 +156,8 @@ struct op_devlist_reply { } __attribute__((packed)); struct op_devlist_reply_extra { - struct usb_device udev; - struct usb_interface uinf[]; + struct usbip_usb_device udev; + struct usbip_usb_interface uinf[]; } __attribute__((packed)); #define PACK_OP_DEVLIST_REQUEST(pack, request) do {\ @@ -169,8 +169,8 @@ struct op_devlist_reply_extra { void pack_uint32_t(int pack, uint32_t *num); void pack_uint16_t(int pack, uint16_t *num); -void pack_usb_device(int pack, struct usb_device *udev); -void pack_usb_interface(int pack, struct usb_interface *uinf); +void pack_usb_device(int pack, struct usbip_usb_device *udev); +void pack_usb_interface(int pack, struct usbip_usb_interface *uinf); ssize_t usbip_recv(int sockfd, void *buff, size_t bufflen); ssize_t usbip_send(int sockfd, void *buff, size_t bufflen); diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index 12ff00b..332f9e6 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -64,7 +64,7 @@ static int send_reply_devlist(int sockfd) } dlist_for_each_data(stub_driver->edev_list, edev, struct usbip_exported_device) { - struct usb_device pdu_udev; + struct usbip_usb_device pdu_udev; dump_usb_device(&edev->udev); memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); @@ -77,7 +77,7 @@ static int send_reply_devlist(int sockfd) } for (int i=0; i < edev->udev.bNumInterfaces; i++) { - struct usb_interface pdu_uinf; + struct usbip_usb_interface pdu_uinf; dump_usb_interface(&edev->uinf[i]); memcpy(&pdu_uinf, &edev->uinf[i], sizeof(pdu_uinf)); @@ -167,7 +167,7 @@ static int recv_request_import(int sockfd) } if (!error) { - struct usb_device pdu_udev; + struct usbip_usb_device pdu_udev; memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); pack_usb_device(1, &pdu_udev); -- cgit v0.10.2 From 1109566469f7df817753939227e989c6395a7595 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:44:15 -0700 Subject: staging: usbip: userspace: usbip_list.c: cleanup exported device functions Rename functions and cleanup coding style. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index e69c457..03f6210 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -45,45 +45,43 @@ void usbip_list_usage(void) printf("usage: %s", usbip_list_usage_string); } -static int query_exported_devices(int sockfd) +static int get_exported_devices(int sockfd) { - int ret; + char product_name[100]; + char class_name[100]; struct op_devlist_reply rep; uint16_t code = OP_REP_DEVLIST; - - memset(&rep, 0, sizeof(rep)); - - ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); - if (ret < 0) { - err("send op_common"); + struct usbip_usb_device udev; + struct usbip_usb_interface uintf; + unsigned int i; + int j, rc; + + rc = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); + if (rc < 0) { + dbg("usbip_send_op_common"); return -1; } - ret = usbip_recv_op_common(sockfd, &code); - if (ret < 0) { - err("recv op_common"); + rc = usbip_recv_op_common(sockfd, &code); + if (rc < 0) { + dbg("usbip_recv_op_common"); return -1; } - ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep)); - if (ret < 0) { - err("recv op_devlist"); + memset(&rep, 0, sizeof(rep)); + rc = usbip_recv(sockfd, &rep, sizeof(rep)); + if (rc < 0) { + dbg("usbip_recv_op_devlist"); return -1; } - PACK_OP_DEVLIST_REPLY(0, &rep); - dbg("exportable %d devices", rep.ndev); - - for (unsigned int i=0; i < rep.ndev; i++) { - char product_name[100]; - char class_name[100]; - struct usbip_usb_device udev; + dbg("exportable devices: %d", rep.ndev); + for (i = 0; i < rep.ndev; i++) { memset(&udev, 0, sizeof(udev)); - - ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev)); - if (ret < 0) { - err("recv usbip_usb_device[%d]", i); + rc = usbip_recv(sockfd, &udev, sizeof(udev)); + if (rc < 0) { + dbg("usbip_recv: usbip_usb_device[%d]", i); return -1; } pack_usb_device(0, &udev); @@ -93,38 +91,34 @@ static int query_exported_devices(int sockfd) usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass, udev.bDeviceSubClass, udev.bDeviceProtocol); - printf("%8s: %s\n", udev.busid, product_name); - printf("%8s: %s\n", " ", udev.path); - printf("%8s: %s\n", " ", class_name); - - for (int j=0; j < udev.bNumInterfaces; j++) { - struct usbip_usb_interface uinf; + printf("%8s: %s\n", "", udev.path); + printf("%8s: %s\n", "", class_name); - ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf)); - if (ret < 0) { - err("recv usbip_usb_interface[%d]", j); + for (j = 0; j < udev.bNumInterfaces; j++) { + rc = usbip_recv(sockfd, &uintf, sizeof(uintf)); + if (rc < 0) { + dbg("usbip_recv: usbip_usb_interface[%d]", j); return -1; } + pack_usb_interface(0, &uintf); - pack_usb_interface(0, &uinf); usbip_names_get_class(class_name, sizeof(class_name), - uinf.bInterfaceClass, - uinf.bInterfaceSubClass, - uinf.bInterfaceProtocol); + uintf.bInterfaceClass, + uintf.bInterfaceSubClass, + uintf.bInterfaceProtocol); + printf("%8s: %2d - %s\n", "", j, class_name); - printf("%8s: %2d - %s\n", " ", j, class_name); } - printf("\n"); } - return rep.ndev; + return 0; } -static int show_exported_devices(char *host) +static int list_exported_devices(char *host) { - int ret; + int rc; int sockfd; sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING); @@ -134,16 +128,16 @@ static int show_exported_devices(char *host) return -1; } dbg("connected to %s port %s\n", host, USBIP_PORT_STRING); - printf("- %s\n", host); - ret = query_exported_devices(sockfd); - if (ret < 0) { - err("query"); + rc = get_exported_devices(sockfd); + if (rc < 0) { + dbg("get_exported_devices failed"); return -1; } close(sockfd); + return 0; } @@ -273,7 +267,7 @@ int usbip_list(int argc, char *argv[]) parsable = true; break; case 'r': - ret = show_exported_devices(optarg); + ret = list_exported_devices(optarg); goto out; case 'l': ret = list_devices(parsable); -- cgit v0.10.2 From 0a186be35963bd9bc4c148554188e927578115b0 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Fri, 27 May 2011 01:49:24 -0700 Subject: staging: usbip: stub_main.c: simplify busid_table initialization Set the whole structure to zero instead of individually setting each member, which simplifies the for loop. This was suggested by walter harms . Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c index 45a0f5d..a34249a 100644 --- a/drivers/staging/usbip/stub_main.c +++ b/drivers/staging/usbip/stub_main.c @@ -39,13 +39,9 @@ static void init_busid_table(void) { int i; - for (i = 0; i < MAX_BUSID; i++) { - memset(busid_table[i].name, 0, BUSID_SIZE); + memset(busid_table, 0, sizeof(busid_table)); + for (i = 0; i < MAX_BUSID; i++) busid_table[i].status = STUB_BUSID_OTHER; - busid_table[i].interf_count = 0; - busid_table[i].sdev = NULL; - busid_table[i].shutdown_busid = 0; - } spin_lock_init(&busid_table_lock); } -- cgit v0.10.2 From cf77acfca3ec3170a665c58b2712d275b8ab3860 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?M=C3=A1rton=20N=C3=A9meth?= Date: Mon, 30 May 2011 21:50:26 +0200 Subject: usbip: change dev_attr_group to constant MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The dev_attr_group variable is never changed and it is only passed to the second parameter of sysfs_create_group() and sysfs_remove_group() functions. These functions are defined in linux/sysfs.h: the second parameter is a pointer to const in both cases. Signed-off-by: Márton Németh Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci.h b/drivers/staging/usbip/vhci.h index 3a1bacb..71a586e 100644 --- a/drivers/staging/usbip/vhci.h +++ b/drivers/staging/usbip/vhci.h @@ -96,7 +96,7 @@ struct vhci_hcd { }; extern struct vhci_hcd *the_controller; -extern struct attribute_group dev_attr_group; +extern const struct attribute_group dev_attr_group; #define hardware (&the_controller->pdev.dev) /* vhci_hcd.c */ diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c index ecd52b6..0cd039b 100644 --- a/drivers/staging/usbip/vhci_sysfs.c +++ b/drivers/staging/usbip/vhci_sysfs.c @@ -239,6 +239,6 @@ static struct attribute *dev_attrs[] = { NULL, }; -struct attribute_group dev_attr_group = { +const struct attribute_group dev_attr_group = { .attrs = dev_attrs, }; -- cgit v0.10.2 From 5ad7b85b90e30eb5af4fbf6ce21907a2bd8934df Mon Sep 17 00:00:00 2001 From: Akshay Joshi Date: Mon, 6 Jun 2011 09:07:31 -0400 Subject: USBIP: Remove unnecessary whitespace before newline characters. In this file, in certain places, newline characters in pr_debug() calls had whitespace before them. This patch removes this extraneous whitespace. Signed-off-by: Akshay Joshi Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c index 1be4dc1..f4b53d1 100644 --- a/drivers/staging/usbip/usbip_common.c +++ b/drivers/staging/usbip/usbip_common.c @@ -204,7 +204,7 @@ static void usbip_dump_usb_ctrlrequest(struct usb_ctrlrequest *cmd) pr_debug("CLEAR_FEAT\n"); break; case USB_REQ_SET_FEATURE: - pr_debug("SET_FEAT \n"); + pr_debug("SET_FEAT\n"); break; case USB_REQ_SET_ADDRESS: pr_debug("SET_ADDRRS\n"); @@ -231,14 +231,14 @@ static void usbip_dump_usb_ctrlrequest(struct usb_ctrlrequest *cmd) pr_debug("SYNC_FRAME\n"); break; default: - pr_debug("REQ(%02X) \n", cmd->bRequest); + pr_debug("REQ(%02X)\n", cmd->bRequest); break; } usbip_dump_request_type(cmd->bRequestType); } else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_CLASS) { - pr_debug("CLASS \n"); + pr_debug("CLASS\n"); } else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_VENDOR) { - pr_debug("VENDOR \n"); + pr_debug("VENDOR\n"); } else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_RESERVED) { pr_debug("RESERVED\n"); } -- cgit v0.10.2 From 6e6938b6d3130305a5960c86b1a9b21e58cf6144 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 6 Jun 2010 10:38:15 -0600 Subject: writeback: introduce .tagged_writepages for the WB_SYNC_NONE sync stage sync(2) is performed in two stages: the WB_SYNC_NONE sync and the WB_SYNC_ALL sync. Identify the first stage with .tagged_writepages and do livelock prevention for it, too. Jan's commit f446daaea9 ("mm: implement writeback livelock avoidance using page tagging") is a partial fix in that it only fixed the WB_SYNC_ALL phase livelock. Although ext4 is tested to no longer livelock with commit f446daaea9, it may due to some "redirty_tail() after pages_skipped" effect which is by no means a guarantee for _all_ the file systems. Note that writeback_inodes_sb() is called by not only sync(), they are treated the same because the other callers also need livelock prevention. Impact: It changes the order in which pages/inodes are synced to disk. Now in the WB_SYNC_NONE stage, it won't proceed to write the next inode until finished with the current inode. Acked-by: Jan Kara CC: Dave Chinner Signed-off-by: Wu Fengguang diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c index a5763e3..8558b6c 100644 --- a/fs/ext4/inode.c +++ b/fs/ext4/inode.c @@ -2741,7 +2741,7 @@ static int write_cache_pages_da(struct address_space *mapping, index = wbc->range_start >> PAGE_CACHE_SHIFT; end = wbc->range_end >> PAGE_CACHE_SHIFT; - if (wbc->sync_mode == WB_SYNC_ALL) + if (wbc->sync_mode == WB_SYNC_ALL || wbc->tagged_writepages) tag = PAGECACHE_TAG_TOWRITE; else tag = PAGECACHE_TAG_DIRTY; @@ -2973,7 +2973,7 @@ static int ext4_da_writepages(struct address_space *mapping, } retry: - if (wbc->sync_mode == WB_SYNC_ALL) + if (wbc->sync_mode == WB_SYNC_ALL || wbc->tagged_writepages) tag_pages_for_writeback(mapping, index, end); while (!ret && wbc->nr_to_write > 0) { diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 0f015a0..5ed2ce9 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -36,6 +36,7 @@ struct wb_writeback_work { long nr_pages; struct super_block *sb; enum writeback_sync_modes sync_mode; + unsigned int tagged_writepages:1; unsigned int for_kupdate:1; unsigned int range_cyclic:1; unsigned int for_background:1; @@ -650,6 +651,7 @@ static long wb_writeback(struct bdi_writeback *wb, { struct writeback_control wbc = { .sync_mode = work->sync_mode, + .tagged_writepages = work->tagged_writepages, .older_than_this = NULL, .for_kupdate = work->for_kupdate, .for_background = work->for_background, @@ -657,7 +659,7 @@ static long wb_writeback(struct bdi_writeback *wb, }; unsigned long oldest_jif; long wrote = 0; - long write_chunk; + long write_chunk = MAX_WRITEBACK_PAGES; struct inode *inode; if (wbc.for_kupdate) { @@ -683,9 +685,7 @@ static long wb_writeback(struct bdi_writeback *wb, * (quickly) tag currently dirty pages * (maybe slowly) sync all tagged pages */ - if (wbc.sync_mode == WB_SYNC_NONE) - write_chunk = MAX_WRITEBACK_PAGES; - else + if (wbc.sync_mode == WB_SYNC_ALL || wbc.tagged_writepages) write_chunk = LONG_MAX; wbc.wb_start = jiffies; /* livelock avoidance */ @@ -1188,10 +1188,11 @@ void writeback_inodes_sb_nr(struct super_block *sb, unsigned long nr) { DECLARE_COMPLETION_ONSTACK(done); struct wb_writeback_work work = { - .sb = sb, - .sync_mode = WB_SYNC_NONE, - .done = &done, - .nr_pages = nr, + .sb = sb, + .sync_mode = WB_SYNC_NONE, + .tagged_writepages = 1, + .done = &done, + .nr_pages = nr, }; WARN_ON(!rwsem_is_locked(&sb->s_umount)); diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 17e7ccc..3f6542c 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -47,6 +47,7 @@ struct writeback_control { unsigned encountered_congestion:1; /* An output: a queue is full */ unsigned for_kupdate:1; /* A kupdate writeback */ unsigned for_background:1; /* A background writeback */ + unsigned tagged_writepages:1; /* tag-and-write to avoid livelock */ unsigned for_reclaim:1; /* Invoked from the page allocator */ unsigned range_cyclic:1; /* range_start is cyclic */ unsigned more_io:1; /* more io to be dispatched */ diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 31f6988..955fe35 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -892,12 +892,12 @@ int write_cache_pages(struct address_space *mapping, range_whole = 1; cycled = 1; /* ignore range_cyclic tests */ } - if (wbc->sync_mode == WB_SYNC_ALL) + if (wbc->sync_mode == WB_SYNC_ALL || wbc->tagged_writepages) tag = PAGECACHE_TAG_TOWRITE; else tag = PAGECACHE_TAG_DIRTY; retry: - if (wbc->sync_mode == WB_SYNC_ALL) + if (wbc->sync_mode == WB_SYNC_ALL || wbc->tagged_writepages) tag_pages_for_writeback(mapping, index, end); done_index = index; while (!done && (index <= end)) { -- cgit v0.10.2 From 94c3dcbb0b0cdfd82cedd21705424d8044edc42c Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 27 Apr 2011 19:05:21 -0600 Subject: writeback: update dirtied_when for synced inode to prevent livelock Explicitly update .dirtied_when on synced inodes, so that they are no longer considered for writeback in the next round. It can prevent both of the following livelock schemes: - while true; do echo data >> f; done - while true; do touch f; done (in theory) The exact livelock condition is, during sync(1): (1) no new inodes are dirtied (2) an inode being actively dirtied On (2), the inode will be tagged and synced with .nr_to_write=LONG_MAX. When finished, it will be redirty_tail()ed because it's still dirty and (.nr_to_write > 0). redirty_tail() won't update its ->dirtied_when on condition (1). The sync work will then revisit it on the next queue_io() and find it eligible again because its old ->dirtied_when predates the sync work start time. We'll do more aggressive "keep writeback as long as we wrote something" logic in wb_writeback(). The "use LONG_MAX .nr_to_write" trick in commit b9543dac5bbc ("writeback: avoid livelocking WB_SYNC_ALL writeback") will no longer be enough to stop sync livelock. Reviewed-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 5ed2ce9..fe190a8 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -419,6 +419,15 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) spin_lock(&inode->i_lock); inode->i_state &= ~I_SYNC; if (!(inode->i_state & I_FREEING)) { + /* + * Sync livelock prevention. Each inode is tagged and synced in + * one shot. If still dirty, it will be redirty_tail()'ed below. + * Update the dirty time to prevent enqueue and sync it again. + */ + if ((inode->i_state & I_DIRTY) && + (wbc->sync_mode == WB_SYNC_ALL || wbc->tagged_writepages)) + inode->dirtied_when = jiffies; + if (mapping_tagged(mapping, PAGECACHE_TAG_DIRTY)) { /* * We didn't write back all the pages. nfs_writepages() -- cgit v0.10.2 From cb9bd1159c5fe8995e151fa7df10fa19f8c119cc Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 21 Jul 2010 22:50:57 -0600 Subject: writeback: introduce writeback_control.inodes_written The flusher works on dirty inodes in batches, and may quit prematurely if the batch of inodes happen to be metadata-only dirtied: in this case wbc->nr_to_write won't be decreased at all, which stands for "no pages written" but also mis-interpreted as "no progress". So introduce writeback_control.inodes_written to count the inodes get cleaned from VFS POV. A non-zero value means there are some progress on writeback, in which case more writeback can be tried. Acked-by: Jan Kara Acked-by: Mel Gorman Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index fe190a8..e450429 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -464,6 +464,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) * No need to add it back to the LRU. */ list_del_init(&inode->i_wb_list); + wbc->inodes_written++; } } inode_sync_complete(inode); @@ -725,6 +726,7 @@ static long wb_writeback(struct bdi_writeback *wb, wbc.more_io = 0; wbc.nr_to_write = write_chunk; wbc.pages_skipped = 0; + wbc.inodes_written = 0; trace_wbc_writeback_start(&wbc, wb->bdi); if (work->sb) @@ -741,6 +743,8 @@ static long wb_writeback(struct bdi_writeback *wb, */ if (wbc.nr_to_write <= 0) continue; + if (wbc.inodes_written) + continue; /* * Didn't write everything and we don't have more IO, bail */ diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 3f6542c..7df9026 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -34,6 +34,7 @@ struct writeback_control { long nr_to_write; /* Write this many pages, and decrement this for each page written */ long pages_skipped; /* Pages which were not written */ + long inodes_written; /* # of inodes written (at least) */ /* * For a_ops->writepages(): is start or end are non-zero then this is -- cgit v0.10.2 From e6fb6da2e10682d477f2fdb749451d9fe5d168e8 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Thu, 22 Jul 2010 10:23:44 -0600 Subject: writeback: try more writeback as long as something was written writeback_inodes_wb()/__writeback_inodes_sb() are not aggressive in that they only populate possibly a subset of eligible inodes into b_io at entrance time. When the queued set of inodes are all synced, they just return, possibly with all queued inode pages written but still wbc.nr_to_write > 0. For kupdate and background writeback, there may be more eligible inodes sitting in b_dirty when the current set of b_io inodes are completed. So it is necessary to try another round of writeback as long as we made some progress in this round. When there are no more eligible inodes, no more inodes will be enqueued in queue_io(), hence nothing could/will be synced and we may safely bail. For example, imagine 100 inodes i0, i1, i2, ..., i90, i91, i99 At queue_io() time, i90-i99 happen to be expired and moved to s_io for IO. When finished successfully, if their total size is less than MAX_WRITEBACK_PAGES, nr_to_write will be > 0. Then wb_writeback() will quit the background work (w/o this patch) while it's still over background threshold. This will be a fairly normal/frequent case I guess. Now that we do tagged sync and update inode->dirtied_when after the sync, this change won't livelock sync(1). I actually tried to write 1 page per 1ms with this command write-and-fsync -n10000 -S 1000 -c 4096 /fs/test and do sync(1) at the same time. The sync completes quickly on ext4, xfs, btrfs. Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index e450429..271cf21 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -739,23 +739,23 @@ static long wb_writeback(struct bdi_writeback *wb, wrote += write_chunk - wbc.nr_to_write; /* - * If we consumed everything, see if we have more + * Did we write something? Try for more + * + * Dirty inodes are moved to b_io for writeback in batches. + * The completion of the current batch does not necessarily + * mean the overall work is done. So we keep looping as long + * as made some progress on cleaning pages or inodes. */ - if (wbc.nr_to_write <= 0) + if (wbc.nr_to_write < write_chunk) continue; if (wbc.inodes_written) continue; /* - * Didn't write everything and we don't have more IO, bail + * No more inodes for IO, bail */ if (!wbc.more_io) break; /* - * Did we write something? Try for more - */ - if (wbc.nr_to_write < write_chunk) - continue; - /* * Nothing written. Wait for some inode to * become available for writeback. Otherwise * we'll just busyloop. -- cgit v0.10.2 From ba9aa8399fda48510d80c2fed1afb8fedbe1bb41 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 21 Jul 2010 20:32:30 -0600 Subject: writeback: the kupdate expire timestamp should be a moving target Dynamically compute the dirty expire timestamp at queue_io() time. writeback_control.older_than_this used to be determined at entrance to the kupdate writeback work. This _static_ timestamp may go stale if the kupdate work runs on and on. The flusher may then stuck with some old busy inodes, never considering newly expired inodes thereafter. This has two possible problems: - It is unfair for a large dirty inode to delay (for a long time) the writeback of small dirty inodes. - As time goes by, the large and busy dirty inode may contain only _freshly_ dirtied pages. Ignoring newly expired dirty inodes risks delaying the expired dirty pages to the end of LRU lists, triggering the evil pageout(). Nevertheless this patch merely addresses part of the problem. v2: keep policy changes inside wb_writeback() and keep the wbc.older_than_this visibility as suggested by Dave. CC: Dave Chinner Acked-by: Jan Kara Acked-by: Mel Gorman Signed-off-by: Itaru Kitayama Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 271cf21..0adee78 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -672,11 +672,6 @@ static long wb_writeback(struct bdi_writeback *wb, long write_chunk = MAX_WRITEBACK_PAGES; struct inode *inode; - if (wbc.for_kupdate) { - wbc.older_than_this = &oldest_jif; - oldest_jif = jiffies - - msecs_to_jiffies(dirty_expire_interval * 10); - } if (!wbc.range_cyclic) { wbc.range_start = 0; wbc.range_end = LLONG_MAX; @@ -723,6 +718,12 @@ static long wb_writeback(struct bdi_writeback *wb, if (work->for_background && !over_bground_thresh()) break; + if (work->for_kupdate) { + oldest_jif = jiffies - + msecs_to_jiffies(dirty_expire_interval * 10); + wbc.older_than_this = &oldest_jif; + } + wbc.more_io = 0; wbc.nr_to_write = write_chunk; wbc.pages_skipped = 0; -- cgit v0.10.2 From 424b351fe1901fc909fd0ca4f21dab58f24c1aac Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 21 Jul 2010 20:11:53 -0600 Subject: writeback: refill b_io iff empty There is no point to carry different refill policies between for_kupdate and other type of works. Use a consistent "refill b_io iff empty" policy which can guarantee fairness in an easy to understand way. A b_io refill will setup a _fixed_ work set with all currently eligible inodes and start a new round of walk through b_io. The "fixed" work set means no new inodes will be added to the work set during the walk. Only when a complete walk over b_io is done, new inodes that are eligible at the time will be enqueued and the walk be started over. This procedure provides fairness among the inodes because it guarantees each inode to be synced once and only once at each round. So all inodes will be free from starvations. This change relies on wb_writeback() to keep retrying as long as we made some progress on cleaning some pages and/or inodes. Without that ability, the old logic on background works relies on aggressively queuing all eligible inodes into b_io at every time. But that's not a guarantee. The below test script completes a slightly faster now: 2.6.39-rc3 2.6.39-rc3-dyn-expire+ ------------------------------------------------ all elapsed 256.043 252.367 stddev 24.381 12.530 tar elapsed 30.097 28.808 dd elapsed 13.214 11.782 #!/bin/zsh cp /c/linux-2.6.38.3.tar.bz2 /dev/shm/ umount /dev/sda7 mkfs.xfs -f /dev/sda7 mount /dev/sda7 /fs echo 3 > /proc/sys/vm/drop_caches tic=$(cat /proc/uptime|cut -d' ' -f2) cd /fs time tar jxf /dev/shm/linux-2.6.38.3.tar.bz2 & time dd if=/dev/zero of=/fs/zero bs=1M count=1000 & wait sync tac=$(cat /proc/uptime|cut -d' ' -f2) echo elapsed: $((tac - tic)) It maintains roughly the same small vs. large file writeout shares, and offers large files better chances to be written in nice 4M chunks. Analyzes from Dave Chinner in great details: Let's say we have lots of inodes with 100 dirty pages being created, and one large writeback going on. We expire 8 new inodes for every 1024 pages we write back. With the old code, we do: b_more_io (large inode) -> b_io (1l) 8 newly expired inodes -> b_io (1l, 8s) writeback large inode 1024 pages -> b_more_io b_more_io (large inode) -> b_io (8s, 1l) 8 newly expired inodes -> b_io (8s, 1l, 8s) writeback 8 small inodes 800 pages 1 large inode 224 pages -> b_more_io b_more_io (large inode) -> b_io (8s, 1l) 8 newly expired inodes -> b_io (8s, 1l, 8s) ..... Your new code: b_more_io (large inode) -> b_io (1l) 8 newly expired inodes -> b_io (1l, 8s) writeback large inode 1024 pages -> b_more_io (b_io == 8s) writeback 8 small inodes 800 pages b_io empty: (1800 pages written) b_more_io (large inode) -> b_io (1l) 14 newly expired inodes -> b_io (1l, 14s) writeback large inode 1024 pages -> b_more_io (b_io == 14s) writeback 10 small inodes 1000 pages 1 small inode 24 pages -> b_more_io (1l, 1s(24)) writeback 5 small inodes 500 pages b_io empty: (2548 pages written) b_more_io (large inode) -> b_io (1l, 1s(24)) 20 newly expired inodes -> b_io (1l, 1s(24), 20s) ...... Rough progression of pages written at b_io refill: Old code: total large file % of writeback 1024 224 21.9% (fixed) New code: total large file % of writeback 1800 1024 ~55% 2550 1024 ~40% 3050 1024 ~33% 3500 1024 ~29% 3950 1024 ~26% 4250 1024 ~24% 4500 1024 ~22.7% 4700 1024 ~21.7% 4800 1024 ~21.3% 4800 1024 ~21.3% (pretty much steady state from here) Ok, so the steady state is reached with a similar percentage of writeback to the large file as the existing code. Ok, that's good, but providing some evidence that is doesn't change the shared of writeback to the large should be in the commit message ;) The other advantage to this is that we always write 1024 page chunks to the large file, rather than smaller "whatever remains" chunks. CC: Jan Kara Acked-by: Mel Gorman Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 0adee78..664acdb 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -589,7 +589,8 @@ void writeback_inodes_wb(struct bdi_writeback *wb, if (!wbc->wb_start) wbc->wb_start = jiffies; /* livelock avoidance */ spin_lock(&inode_wb_list_lock); - if (!wbc->for_kupdate || list_empty(&wb->b_io)) + + if (list_empty(&wb->b_io)) queue_io(wb, wbc->older_than_this); while (!list_empty(&wb->b_io)) { @@ -616,7 +617,7 @@ static void __writeback_inodes_sb(struct super_block *sb, WARN_ON(!rwsem_is_locked(&sb->s_umount)); spin_lock(&inode_wb_list_lock); - if (!wbc->for_kupdate || list_empty(&wb->b_io)) + if (list_empty(&wb->b_io)) queue_io(wb, wbc->older_than_this); writeback_sb_inodes(sb, wb, wbc, true); spin_unlock(&inode_wb_list_lock); -- cgit v0.10.2 From f758eeabeb96f878c860e8f110f94ec8820822a9 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Thu, 21 Apr 2011 18:19:44 -0600 Subject: writeback: split inode_wb_list_lock into bdi_writeback.list_lock Split the global inode_wb_list_lock into a per-bdi_writeback list_lock, as it's currently the most contended lock in the system for metadata heavy workloads. It won't help for single-filesystem workloads for which we'll need the I/O-less balance_dirty_pages, but at least we can dedicate a cpu to spinning on each bdi now for larger systems. Based on earlier patches from Nick Piggin and Dave Chinner. It reduces lock contentions to 1/4 in this test case: 10 HDD JBOD, 100 dd on each disk, XFS, 6GB ram lock_stat version 0.3 ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- class name con-bounces contentions waittime-min waittime-max waittime-total acq-bounces acquisitions holdtime-min holdtime-max holdtime-total ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- vanilla 2.6.39-rc3: inode_wb_list_lock: 42590 44433 0.12 147.74 144127.35 252274 886792 0.08 121.34 917211.23 ------------------ inode_wb_list_lock 2 [] bdev_inode_switch_bdi+0x29/0x85 inode_wb_list_lock 34 [] inode_wb_list_del+0x22/0x49 inode_wb_list_lock 12893 [] __mark_inode_dirty+0x170/0x1d0 inode_wb_list_lock 10702 [] writeback_single_inode+0x16d/0x20a ------------------ inode_wb_list_lock 2 [] bdev_inode_switch_bdi+0x29/0x85 inode_wb_list_lock 19 [] inode_wb_list_del+0x22/0x49 inode_wb_list_lock 5550 [] __mark_inode_dirty+0x170/0x1d0 inode_wb_list_lock 8511 [] writeback_sb_inodes+0x10f/0x157 2.6.39-rc3 + patch: &(&wb->list_lock)->rlock: 11383 11657 0.14 151.69 40429.51 90825 527918 0.11 145.90 556843.37 ------------------------ &(&wb->list_lock)->rlock 10 [] inode_wb_list_del+0x5f/0x86 &(&wb->list_lock)->rlock 1493 [] writeback_inodes_wb+0x3d/0x150 &(&wb->list_lock)->rlock 3652 [] writeback_sb_inodes+0x123/0x16f &(&wb->list_lock)->rlock 1412 [] writeback_single_inode+0x17f/0x223 ------------------------ &(&wb->list_lock)->rlock 3 [] bdi_lock_two+0x46/0x4b &(&wb->list_lock)->rlock 6 [] inode_wb_list_del+0x5f/0x86 &(&wb->list_lock)->rlock 2061 [] __mark_inode_dirty+0x173/0x1cf &(&wb->list_lock)->rlock 2629 [] writeback_sb_inodes+0x123/0x16f hughd@google.com: fix recursive lock when bdi_lock_two() is called with new the same as old akpm@linux-foundation.org: cleanup bdev_inode_switch_bdi() comment Signed-off-by: Christoph Hellwig Signed-off-by: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Wu Fengguang diff --git a/fs/block_dev.c b/fs/block_dev.c index 1a2421f..3c9a03e 100644 --- a/fs/block_dev.c +++ b/fs/block_dev.c @@ -44,24 +44,28 @@ inline struct block_device *I_BDEV(struct inode *inode) { return &BDEV_I(inode)->bdev; } - EXPORT_SYMBOL(I_BDEV); /* - * move the inode from it's current bdi to the a new bdi. if the inode is dirty - * we need to move it onto the dirty list of @dst so that the inode is always - * on the right list. + * Move the inode from its current bdi to a new bdi. If the inode is dirty we + * need to move it onto the dirty list of @dst so that the inode is always on + * the right list. */ static void bdev_inode_switch_bdi(struct inode *inode, struct backing_dev_info *dst) { - spin_lock(&inode_wb_list_lock); + struct backing_dev_info *old = inode->i_data.backing_dev_info; + + if (unlikely(dst == old)) /* deadlock avoidance */ + return; + bdi_lock_two(&old->wb, &dst->wb); spin_lock(&inode->i_lock); inode->i_data.backing_dev_info = dst; if (inode->i_state & I_DIRTY) list_move(&inode->i_wb_list, &dst->wb.b_dirty); spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&old->wb.list_lock); + spin_unlock(&dst->wb.list_lock); } static sector_t max_block(struct block_device *bdev) diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 664acdb..36a3091 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -181,12 +181,13 @@ void bdi_start_background_writeback(struct backing_dev_info *bdi) */ void inode_wb_list_del(struct inode *inode) { - spin_lock(&inode_wb_list_lock); + struct backing_dev_info *bdi = inode_to_bdi(inode); + + spin_lock(&bdi->wb.list_lock); list_del_init(&inode->i_wb_list); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&bdi->wb.list_lock); } - /* * Redirty an inode: set its when-it-was dirtied timestamp and move it to the * furthest end of its superblock's dirty-inode list. @@ -196,11 +197,9 @@ void inode_wb_list_del(struct inode *inode) * the case then the inode must have been redirtied while it was being written * out and we don't reset its dirtied_when. */ -static void redirty_tail(struct inode *inode) +static void redirty_tail(struct inode *inode, struct bdi_writeback *wb) { - struct bdi_writeback *wb = &inode_to_bdi(inode)->wb; - - assert_spin_locked(&inode_wb_list_lock); + assert_spin_locked(&wb->list_lock); if (!list_empty(&wb->b_dirty)) { struct inode *tail; @@ -214,11 +213,9 @@ static void redirty_tail(struct inode *inode) /* * requeue inode for re-scanning after bdi->b_io list is exhausted. */ -static void requeue_io(struct inode *inode) +static void requeue_io(struct inode *inode, struct bdi_writeback *wb) { - struct bdi_writeback *wb = &inode_to_bdi(inode)->wb; - - assert_spin_locked(&inode_wb_list_lock); + assert_spin_locked(&wb->list_lock); list_move(&inode->i_wb_list, &wb->b_more_io); } @@ -226,7 +223,7 @@ static void inode_sync_complete(struct inode *inode) { /* * Prevent speculative execution through - * spin_unlock(&inode_wb_list_lock); + * spin_unlock(&wb->list_lock); */ smp_mb(); @@ -302,7 +299,7 @@ static void move_expired_inodes(struct list_head *delaying_queue, */ static void queue_io(struct bdi_writeback *wb, unsigned long *older_than_this) { - assert_spin_locked(&inode_wb_list_lock); + assert_spin_locked(&wb->list_lock); list_splice_init(&wb->b_more_io, &wb->b_io); move_expired_inodes(&wb->b_dirty, &wb->b_io, older_than_this); } @@ -317,7 +314,8 @@ static int write_inode(struct inode *inode, struct writeback_control *wbc) /* * Wait for writeback on an inode to complete. */ -static void inode_wait_for_writeback(struct inode *inode) +static void inode_wait_for_writeback(struct inode *inode, + struct bdi_writeback *wb) { DEFINE_WAIT_BIT(wq, &inode->i_state, __I_SYNC); wait_queue_head_t *wqh; @@ -325,15 +323,15 @@ static void inode_wait_for_writeback(struct inode *inode) wqh = bit_waitqueue(&inode->i_state, __I_SYNC); while (inode->i_state & I_SYNC) { spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); __wait_on_bit(wqh, &wq, inode_wait, TASK_UNINTERRUPTIBLE); - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); spin_lock(&inode->i_lock); } } /* - * Write out an inode's dirty pages. Called under inode_wb_list_lock and + * Write out an inode's dirty pages. Called under wb->list_lock and * inode->i_lock. Either the caller has an active reference on the inode or * the inode has I_WILL_FREE set. * @@ -344,13 +342,14 @@ static void inode_wait_for_writeback(struct inode *inode) * livelocks, etc. */ static int -writeback_single_inode(struct inode *inode, struct writeback_control *wbc) +writeback_single_inode(struct inode *inode, struct bdi_writeback *wb, + struct writeback_control *wbc) { struct address_space *mapping = inode->i_mapping; unsigned dirty; int ret; - assert_spin_locked(&inode_wb_list_lock); + assert_spin_locked(&wb->list_lock); assert_spin_locked(&inode->i_lock); if (!atomic_read(&inode->i_count)) @@ -368,14 +367,14 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) * completed a full scan of b_io. */ if (wbc->sync_mode != WB_SYNC_ALL) { - requeue_io(inode); + requeue_io(inode, wb); return 0; } /* * It's a data-integrity sync. We must wait. */ - inode_wait_for_writeback(inode); + inode_wait_for_writeback(inode, wb); } BUG_ON(inode->i_state & I_SYNC); @@ -384,7 +383,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) inode->i_state |= I_SYNC; inode->i_state &= ~I_DIRTY_PAGES; spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); ret = do_writepages(mapping, wbc); @@ -415,7 +414,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) ret = err; } - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); spin_lock(&inode->i_lock); inode->i_state &= ~I_SYNC; if (!(inode->i_state & I_FREEING)) { @@ -438,7 +437,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) /* * slice used up: queue for next turn */ - requeue_io(inode); + requeue_io(inode, wb); } else { /* * Writeback blocked by something other than @@ -447,7 +446,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) * retrying writeback of the dirty page/inode * that cannot be performed immediately. */ - redirty_tail(inode); + redirty_tail(inode, wb); } } else if (inode->i_state & I_DIRTY) { /* @@ -456,7 +455,7 @@ writeback_single_inode(struct inode *inode, struct writeback_control *wbc) * submission or metadata updates after data IO * completion. */ - redirty_tail(inode); + redirty_tail(inode, wb); } else { /* * The inode is clean. At this point we either have @@ -521,7 +520,7 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, * superblock, move all inodes not belonging * to it back onto the dirty list. */ - redirty_tail(inode); + redirty_tail(inode, wb); continue; } @@ -541,7 +540,7 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, spin_lock(&inode->i_lock); if (inode->i_state & (I_NEW | I_FREEING | I_WILL_FREE)) { spin_unlock(&inode->i_lock); - requeue_io(inode); + requeue_io(inode, wb); continue; } @@ -557,19 +556,19 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, __iget(inode); pages_skipped = wbc->pages_skipped; - writeback_single_inode(inode, wbc); + writeback_single_inode(inode, wb, wbc); if (wbc->pages_skipped != pages_skipped) { /* * writeback is not making progress due to locked * buffers. Skip this inode for now. */ - redirty_tail(inode); + redirty_tail(inode, wb); } spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); iput(inode); cond_resched(); - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); if (wbc->nr_to_write <= 0) { wbc->more_io = 1; return 1; @@ -588,7 +587,7 @@ void writeback_inodes_wb(struct bdi_writeback *wb, if (!wbc->wb_start) wbc->wb_start = jiffies; /* livelock avoidance */ - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); if (list_empty(&wb->b_io)) queue_io(wb, wbc->older_than_this); @@ -598,7 +597,7 @@ void writeback_inodes_wb(struct bdi_writeback *wb, struct super_block *sb = inode->i_sb; if (!pin_sb_for_writeback(sb)) { - requeue_io(inode); + requeue_io(inode, wb); continue; } ret = writeback_sb_inodes(sb, wb, wbc, false); @@ -607,7 +606,7 @@ void writeback_inodes_wb(struct bdi_writeback *wb, if (ret) break; } - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); /* Leave any unwritten inodes on b_io */ } @@ -616,11 +615,11 @@ static void __writeback_inodes_sb(struct super_block *sb, { WARN_ON(!rwsem_is_locked(&sb->s_umount)); - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); if (list_empty(&wb->b_io)) queue_io(wb, wbc->older_than_this); writeback_sb_inodes(sb, wb, wbc, true); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); } /* @@ -762,15 +761,15 @@ static long wb_writeback(struct bdi_writeback *wb, * become available for writeback. Otherwise * we'll just busyloop. */ - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); if (!list_empty(&wb->b_more_io)) { inode = wb_inode(wb->b_more_io.prev); trace_wbc_writeback_wait(&wbc, wb->bdi); spin_lock(&inode->i_lock); - inode_wait_for_writeback(inode); + inode_wait_for_writeback(inode, wb); spin_unlock(&inode->i_lock); } - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); } return wrote; @@ -1104,10 +1103,10 @@ void __mark_inode_dirty(struct inode *inode, int flags) } spin_unlock(&inode->i_lock); - spin_lock(&inode_wb_list_lock); + spin_lock(&bdi->wb.list_lock); inode->dirtied_when = jiffies; list_move(&inode->i_wb_list, &bdi->wb.b_dirty); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&bdi->wb.list_lock); if (wakeup_bdi) bdi_wakeup_thread_delayed(bdi); @@ -1309,6 +1308,7 @@ EXPORT_SYMBOL(sync_inodes_sb); */ int write_inode_now(struct inode *inode, int sync) { + struct bdi_writeback *wb = &inode_to_bdi(inode)->wb; int ret; struct writeback_control wbc = { .nr_to_write = LONG_MAX, @@ -1321,11 +1321,11 @@ int write_inode_now(struct inode *inode, int sync) wbc.nr_to_write = 0; might_sleep(); - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); spin_lock(&inode->i_lock); - ret = writeback_single_inode(inode, &wbc); + ret = writeback_single_inode(inode, wb, &wbc); spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); if (sync) inode_sync_wait(inode); return ret; @@ -1345,13 +1345,14 @@ EXPORT_SYMBOL(write_inode_now); */ int sync_inode(struct inode *inode, struct writeback_control *wbc) { + struct bdi_writeback *wb = &inode_to_bdi(inode)->wb; int ret; - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); spin_lock(&inode->i_lock); - ret = writeback_single_inode(inode, wbc); + ret = writeback_single_inode(inode, wb, wbc); spin_unlock(&inode->i_lock); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); return ret; } EXPORT_SYMBOL(sync_inode); diff --git a/fs/inode.c b/fs/inode.c index 0f7e88a..4be128c 100644 --- a/fs/inode.c +++ b/fs/inode.c @@ -37,7 +37,7 @@ * inode_lru, inode->i_lru * inode_sb_list_lock protects: * sb->s_inodes, inode->i_sb_list - * inode_wb_list_lock protects: + * bdi->wb.list_lock protects: * bdi->wb.b_{dirty,io,more_io}, inode->i_wb_list * inode_hash_lock protects: * inode_hashtable, inode->i_hash @@ -48,7 +48,7 @@ * inode->i_lock * inode_lru_lock * - * inode_wb_list_lock + * bdi->wb.list_lock * inode->i_lock * * inode_hash_lock @@ -68,7 +68,6 @@ static LIST_HEAD(inode_lru); static DEFINE_SPINLOCK(inode_lru_lock); __cacheline_aligned_in_smp DEFINE_SPINLOCK(inode_sb_list_lock); -__cacheline_aligned_in_smp DEFINE_SPINLOCK(inode_wb_list_lock); /* * iprune_sem provides exclusion between the icache shrinking and the diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h index 96f4094..47feb2c 100644 --- a/include/linux/backing-dev.h +++ b/include/linux/backing-dev.h @@ -57,6 +57,7 @@ struct bdi_writeback { struct list_head b_dirty; /* dirty inodes */ struct list_head b_io; /* parked for writeback */ struct list_head b_more_io; /* parked for more writeback */ + spinlock_t list_lock; /* protects the b_* lists */ }; struct backing_dev_info { @@ -106,6 +107,7 @@ int bdi_writeback_thread(void *data); int bdi_has_dirty_io(struct backing_dev_info *bdi); void bdi_arm_supers_timer(void); void bdi_wakeup_thread_delayed(struct backing_dev_info *bdi); +void bdi_lock_two(struct bdi_writeback *wb1, struct bdi_writeback *wb2); extern spinlock_t bdi_lock; extern struct list_head bdi_list; diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 7df9026..c2d957f 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -9,8 +9,6 @@ struct backing_dev_info; -extern spinlock_t inode_wb_list_lock; - /* * fs/fs-writeback.c */ diff --git a/mm/backing-dev.c b/mm/backing-dev.c index f032e6e..5f6553e 100644 --- a/mm/backing-dev.c +++ b/mm/backing-dev.c @@ -45,6 +45,17 @@ static struct timer_list sync_supers_timer; static int bdi_sync_supers(void *); static void sync_supers_timer_fn(unsigned long); +void bdi_lock_two(struct bdi_writeback *wb1, struct bdi_writeback *wb2) +{ + if (wb1 < wb2) { + spin_lock(&wb1->list_lock); + spin_lock_nested(&wb2->list_lock, 1); + } else { + spin_lock(&wb2->list_lock); + spin_lock_nested(&wb1->list_lock, 1); + } +} + #ifdef CONFIG_DEBUG_FS #include #include @@ -67,14 +78,14 @@ static int bdi_debug_stats_show(struct seq_file *m, void *v) struct inode *inode; nr_dirty = nr_io = nr_more_io = 0; - spin_lock(&inode_wb_list_lock); + spin_lock(&wb->list_lock); list_for_each_entry(inode, &wb->b_dirty, i_wb_list) nr_dirty++; list_for_each_entry(inode, &wb->b_io, i_wb_list) nr_io++; list_for_each_entry(inode, &wb->b_more_io, i_wb_list) nr_more_io++; - spin_unlock(&inode_wb_list_lock); + spin_unlock(&wb->list_lock); global_dirty_limits(&background_thresh, &dirty_thresh); bdi_thresh = bdi_dirty_limit(bdi, dirty_thresh); @@ -628,6 +639,7 @@ static void bdi_wb_init(struct bdi_writeback *wb, struct backing_dev_info *bdi) INIT_LIST_HEAD(&wb->b_dirty); INIT_LIST_HEAD(&wb->b_io); INIT_LIST_HEAD(&wb->b_more_io); + spin_lock_init(&wb->list_lock); setup_timer(&wb->wakeup_timer, wakeup_timer_fn, (unsigned long)bdi); } @@ -676,11 +688,12 @@ void bdi_destroy(struct backing_dev_info *bdi) if (bdi_has_dirty_io(bdi)) { struct bdi_writeback *dst = &default_backing_dev_info.wb; - spin_lock(&inode_wb_list_lock); + bdi_lock_two(&bdi->wb, dst); list_splice(&bdi->wb.b_dirty, &dst->b_dirty); list_splice(&bdi->wb.b_io, &dst->b_io); list_splice(&bdi->wb.b_more_io, &dst->b_more_io); - spin_unlock(&inode_wb_list_lock); + spin_unlock(&bdi->wb.list_lock); + spin_unlock(&dst->list_lock); } bdi_unregister(bdi); diff --git a/mm/filemap.c b/mm/filemap.c index d7b1057..1e492c3 100644 --- a/mm/filemap.c +++ b/mm/filemap.c @@ -81,7 +81,7 @@ * ->i_mutex * ->i_alloc_sem (various) * - * inode_wb_list_lock + * bdi->wb.list_lock * sb_lock (fs/fs-writeback.c) * ->mapping->tree_lock (__sync_single_inode) * @@ -99,9 +99,9 @@ * ->zone.lru_lock (check_pte_range->isolate_lru_page) * ->private_lock (page_remove_rmap->set_page_dirty) * ->tree_lock (page_remove_rmap->set_page_dirty) - * inode_wb_list_lock (page_remove_rmap->set_page_dirty) + * bdi.wb->list_lock (page_remove_rmap->set_page_dirty) * ->inode->i_lock (page_remove_rmap->set_page_dirty) - * inode_wb_list_lock (zap_pte_range->set_page_dirty) + * bdi.wb->list_lock (zap_pte_range->set_page_dirty) * ->inode->i_lock (zap_pte_range->set_page_dirty) * ->private_lock (zap_pte_range->__set_page_dirty_buffers) * diff --git a/mm/rmap.c b/mm/rmap.c index 0eb463e..d04e36a 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -32,11 +32,11 @@ * mmlist_lock (in mmput, drain_mmlist and others) * mapping->private_lock (in __set_page_dirty_buffers) * inode->i_lock (in set_page_dirty's __mark_inode_dirty) - * inode_wb_list_lock (in set_page_dirty's __mark_inode_dirty) + * bdi.wb->list_lock (in set_page_dirty's __mark_inode_dirty) * sb_lock (within inode_lock in fs/fs-writeback.c) * mapping->tree_lock (widely used, in set_page_dirty, * in arch-dependent flush_dcache_mmap_lock, - * within inode_wb_list_lock in __sync_single_inode) + * within bdi.wb->list_lock in __sync_single_inode) * * (code doesn't rely on that order so it could be switched around) * ->tasklist_lock -- cgit v0.10.2 From e8dfc30582995ae12454cda517b17d6294175b07 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Thu, 21 Apr 2011 12:06:32 -0600 Subject: writeback: elevate queue_io() into wb_writeback() Code refactor for more logical code layout. No behavior change. - remove the mis-named __writeback_inodes_sb() - wb_writeback()/writeback_inodes_wb() will decide when to queue_io() before calling __writeback_inodes_wb() Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 36a3091..565b1fd 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -580,17 +580,13 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, return 1; } -void writeback_inodes_wb(struct bdi_writeback *wb, - struct writeback_control *wbc) +static void __writeback_inodes_wb(struct bdi_writeback *wb, + struct writeback_control *wbc) { int ret = 0; if (!wbc->wb_start) wbc->wb_start = jiffies; /* livelock avoidance */ - spin_lock(&wb->list_lock); - - if (list_empty(&wb->b_io)) - queue_io(wb, wbc->older_than_this); while (!list_empty(&wb->b_io)) { struct inode *inode = wb_inode(wb->b_io.prev); @@ -606,19 +602,16 @@ void writeback_inodes_wb(struct bdi_writeback *wb, if (ret) break; } - spin_unlock(&wb->list_lock); /* Leave any unwritten inodes on b_io */ } -static void __writeback_inodes_sb(struct super_block *sb, - struct bdi_writeback *wb, struct writeback_control *wbc) +void writeback_inodes_wb(struct bdi_writeback *wb, + struct writeback_control *wbc) { - WARN_ON(!rwsem_is_locked(&sb->s_umount)); - spin_lock(&wb->list_lock); if (list_empty(&wb->b_io)) queue_io(wb, wbc->older_than_this); - writeback_sb_inodes(sb, wb, wbc, true); + __writeback_inodes_wb(wb, wbc); spin_unlock(&wb->list_lock); } @@ -685,7 +678,7 @@ static long wb_writeback(struct bdi_writeback *wb, * The intended call sequence for WB_SYNC_ALL writeback is: * * wb_writeback() - * __writeback_inodes_sb() <== called only once + * writeback_sb_inodes() <== called only once * write_cache_pages() <== called once for each inode * (quickly) tag currently dirty pages * (maybe slowly) sync all tagged pages @@ -694,6 +687,7 @@ static long wb_writeback(struct bdi_writeback *wb, write_chunk = LONG_MAX; wbc.wb_start = jiffies; /* livelock avoidance */ + spin_lock(&wb->list_lock); for (;;) { /* * Stop writeback when nr_pages has been consumed @@ -730,10 +724,12 @@ static long wb_writeback(struct bdi_writeback *wb, wbc.inodes_written = 0; trace_wbc_writeback_start(&wbc, wb->bdi); + if (list_empty(&wb->b_io)) + queue_io(wb, wbc.older_than_this); if (work->sb) - __writeback_inodes_sb(work->sb, wb, &wbc); + writeback_sb_inodes(work->sb, wb, &wbc, true); else - writeback_inodes_wb(wb, &wbc); + __writeback_inodes_wb(wb, &wbc); trace_wbc_writeback_written(&wbc, wb->bdi); work->nr_pages -= write_chunk - wbc.nr_to_write; @@ -761,7 +757,6 @@ static long wb_writeback(struct bdi_writeback *wb, * become available for writeback. Otherwise * we'll just busyloop. */ - spin_lock(&wb->list_lock); if (!list_empty(&wb->b_more_io)) { inode = wb_inode(wb->b_more_io.prev); trace_wbc_writeback_wait(&wbc, wb->bdi); @@ -769,8 +764,8 @@ static long wb_writeback(struct bdi_writeback *wb, inode_wait_for_writeback(inode, wb); spin_unlock(&inode->i_lock); } - spin_unlock(&wb->list_lock); } + spin_unlock(&wb->list_lock); return wrote; } -- cgit v0.10.2 From e185dda89d69cde142b48059413a03561f41f78a Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sat, 23 Apr 2011 11:26:07 -0600 Subject: writeback: avoid extra sync work at enqueue time This removes writeback_control.wb_start and does more straightforward sync livelock prevention by setting .older_than_this to prevent extra inodes from being enqueued in the first place. Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 565b1fd..d0553f3 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -544,15 +544,6 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, continue; } - /* - * Was this inode dirtied after sync_sb_inodes was called? - * This keeps sync from extra jobs and livelock. - */ - if (inode_dirtied_after(inode, wbc->wb_start)) { - spin_unlock(&inode->i_lock); - return 1; - } - __iget(inode); pages_skipped = wbc->pages_skipped; @@ -585,9 +576,6 @@ static void __writeback_inodes_wb(struct bdi_writeback *wb, { int ret = 0; - if (!wbc->wb_start) - wbc->wb_start = jiffies; /* livelock avoidance */ - while (!list_empty(&wb->b_io)) { struct inode *inode = wb_inode(wb->b_io.prev); struct super_block *sb = inode->i_sb; @@ -686,7 +674,9 @@ static long wb_writeback(struct bdi_writeback *wb, if (wbc.sync_mode == WB_SYNC_ALL || wbc.tagged_writepages) write_chunk = LONG_MAX; - wbc.wb_start = jiffies; /* livelock avoidance */ + oldest_jif = jiffies; + wbc.older_than_this = &oldest_jif; + spin_lock(&wb->list_lock); for (;;) { /* diff --git a/include/linux/writeback.h b/include/linux/writeback.h index c2d957f..d8e96a4 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -26,9 +26,6 @@ struct writeback_control { enum writeback_sync_modes sync_mode; unsigned long *older_than_this; /* If !NULL, only write back inodes older than this */ - unsigned long wb_start; /* Time writeback_inodes_wb was - called. This is needed to avoid - extra jobs and livelock */ long nr_to_write; /* Write this many pages, and decrement this for each page written */ long pages_skipped; /* Pages which were not written */ -- cgit v0.10.2 From 6f7186562771ec9b629914df328048449ccddf4a Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 2 Mar 2011 17:14:34 -0600 Subject: writeback: add bdi_dirty_limit() kernel-doc Clarify the bdi_dirty_limit() comment. Acked-by: Peter Zijlstra Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 955fe35..b8be623 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -437,10 +437,17 @@ void global_dirty_limits(unsigned long *pbackground, unsigned long *pdirty) *pdirty = dirty; } -/* +/** * bdi_dirty_limit - @bdi's share of dirty throttling threshold + * @bdi: the backing_dev_info to query + * @dirty: global dirty limit in pages + * + * Returns @bdi's dirty limit in pages. The term "dirty" in the context of + * dirty balancing includes all PG_dirty, PG_writeback and NFS unstable pages. + * And the "limit" in the name is not seriously taken as hard limit in + * balance_dirty_pages(). * - * Allocate high/low dirty limits to fast/slow devices, in order to prevent + * It allocates high/low dirty limits to fast/slow devices, in order to prevent * - starving fast devices * - piling up dirty pages (that will take long time to sync) on slow devices * -- cgit v0.10.2 From 3efaf0faba6793cd91298c76315e15de59c13ae0 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Thu, 16 Dec 2010 22:22:00 -0600 Subject: writeback: skip balance_dirty_pages() for in-memory fs This avoids unnecessary checks and dirty throttling on tmpfs/ramfs. Notes about the tmpfs/ramfs behavior changes: As for 2.6.36 and older kernels, the tmpfs writes will sleep inside balance_dirty_pages() as long as we are over the (dirty+background)/2 global throttle threshold. This is because both the dirty pages and threshold will be 0 for tmpfs/ramfs. Hence this test will always evaluate to TRUE: dirty_exceeded = (bdi_nr_reclaimable + bdi_nr_writeback >= bdi_thresh) || (nr_reclaimable + nr_writeback >= dirty_thresh); For 2.6.37, someone complained that the current logic does not allow the users to set vm.dirty_ratio=0. So commit 4cbec4c8b9 changed the test to dirty_exceeded = (bdi_nr_reclaimable + bdi_nr_writeback > bdi_thresh) || (nr_reclaimable + nr_writeback > dirty_thresh); So 2.6.37 will behave differently for tmpfs/ramfs: it will never get throttled unless the global dirty threshold is exceeded (which is very unlikely to happen; once happen, will block many tasks). I'd say that the 2.6.36 behavior is very bad for tmpfs/ramfs. It means for a busy writing server, tmpfs write()s may get livelocked! The "inadvertent" throttling can hardly bring help to any workload because of its "either no throttling, or get throttled to death" property. So based on 2.6.37, this patch won't bring more noticeable changes. CC: Hugh Dickins Acked-by: Rik van Riel Acked-by: Peter Zijlstra Reviewed-by: Minchan Kim Signed-off-by: Wu Fengguang diff --git a/mm/page-writeback.c b/mm/page-writeback.c index b8be623..b2529f8 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -244,13 +244,8 @@ void task_dirty_inc(struct task_struct *tsk) static void bdi_writeout_fraction(struct backing_dev_info *bdi, long *numerator, long *denominator) { - if (bdi_cap_writeback_dirty(bdi)) { - prop_fraction_percpu(&vm_completions, &bdi->completions, + prop_fraction_percpu(&vm_completions, &bdi->completions, numerator, denominator); - } else { - *numerator = 0; - *denominator = 1; - } } static inline void task_dirties_fraction(struct task_struct *tsk, @@ -495,6 +490,9 @@ static void balance_dirty_pages(struct address_space *mapping, bool dirty_exceeded = false; struct backing_dev_info *bdi = mapping->backing_dev_info; + if (!bdi_cap_account_dirty(bdi)) + return; + for (;;) { struct writeback_control wbc = { .sync_mode = WB_SYNC_NONE, -- cgit v0.10.2 From b7a2441f9966fe3e1be960a876ab52e6029ea005 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 21 Jul 2010 22:19:51 -0600 Subject: writeback: remove writeback_control.more_io When wbc.more_io was first introduced, it indicates whether there are at least one superblock whose s_more_io contains more IO work. Now with the per-bdi writeback, it can be replaced with a simple b_more_io test. Acked-by: Jan Kara Acked-by: Mel Gorman Reviewed-by: Minchan Kim Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index d0553f3..f43c479 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -560,12 +560,8 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, iput(inode); cond_resched(); spin_lock(&wb->list_lock); - if (wbc->nr_to_write <= 0) { - wbc->more_io = 1; + if (wbc->nr_to_write <= 0) return 1; - } - if (!list_empty(&wb->b_more_io)) - wbc->more_io = 1; } /* b_io is empty */ return 1; @@ -708,7 +704,6 @@ static long wb_writeback(struct bdi_writeback *wb, wbc.older_than_this = &oldest_jif; } - wbc.more_io = 0; wbc.nr_to_write = write_chunk; wbc.pages_skipped = 0; wbc.inodes_written = 0; @@ -740,7 +735,7 @@ static long wb_writeback(struct bdi_writeback *wb, /* * No more inodes for IO, bail */ - if (!wbc.more_io) + if (list_empty(&wb->b_more_io)) break; /* * Nothing written. Wait for some inode to diff --git a/include/linux/writeback.h b/include/linux/writeback.h index d8e96a4..8797b20 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -46,7 +46,6 @@ struct writeback_control { unsigned tagged_writepages:1; /* tag-and-write to avoid livelock */ unsigned for_reclaim:1; /* Invoked from the page allocator */ unsigned range_cyclic:1; /* range_start is cyclic */ - unsigned more_io:1; /* more io to be dispatched */ }; /* diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h index e09592d..b225d0d 100644 --- a/include/trace/events/ext4.h +++ b/include/trace/events/ext4.h @@ -404,7 +404,6 @@ TRACE_EVENT(ext4_da_writepages_result, __field( int, pages_written ) __field( long, pages_skipped ) __field( int, sync_mode ) - __field( char, more_io ) __field( pgoff_t, writeback_index ) ), @@ -415,16 +414,15 @@ TRACE_EVENT(ext4_da_writepages_result, __entry->pages_written = pages_written; __entry->pages_skipped = wbc->pages_skipped; __entry->sync_mode = wbc->sync_mode; - __entry->more_io = wbc->more_io; __entry->writeback_index = inode->i_mapping->writeback_index; ), TP_printk("dev %d,%d ino %lu ret %d pages_written %d pages_skipped %ld " - " more_io %d sync_mode %d writeback_index %lu", + "sync_mode %d writeback_index %lu", MAJOR(__entry->dev), MINOR(__entry->dev), (unsigned long) __entry->ino, __entry->ret, __entry->pages_written, __entry->pages_skipped, - __entry->more_io, __entry->sync_mode, + __entry->sync_mode, (unsigned long) __entry->writeback_index) ); diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index 4e249b9..b2cfac5 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -101,7 +101,6 @@ DECLARE_EVENT_CLASS(wbc_class, __field(int, for_background) __field(int, for_reclaim) __field(int, range_cyclic) - __field(int, more_io) __field(unsigned long, older_than_this) __field(long, range_start) __field(long, range_end) @@ -116,7 +115,6 @@ DECLARE_EVENT_CLASS(wbc_class, __entry->for_background = wbc->for_background; __entry->for_reclaim = wbc->for_reclaim; __entry->range_cyclic = wbc->range_cyclic; - __entry->more_io = wbc->more_io; __entry->older_than_this = wbc->older_than_this ? *wbc->older_than_this : 0; __entry->range_start = (long)wbc->range_start; @@ -124,7 +122,7 @@ DECLARE_EVENT_CLASS(wbc_class, ), TP_printk("bdi %s: towrt=%ld skip=%ld mode=%d kupd=%d " - "bgrd=%d reclm=%d cyclic=%d more=%d older=0x%lx " + "bgrd=%d reclm=%d cyclic=%d older=0x%lx " "start=0x%lx end=0x%lx", __entry->name, __entry->nr_to_write, @@ -134,7 +132,6 @@ DECLARE_EVENT_CLASS(wbc_class, __entry->for_background, __entry->for_reclaim, __entry->range_cyclic, - __entry->more_io, __entry->older_than_this, __entry->range_start, __entry->range_end) -- cgit v0.10.2 From 846d5a091b0506b75489577cde27f39b37a192a4 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Thu, 5 May 2011 21:10:38 -0600 Subject: writeback: remove .nonblocking and .encountered_congestion Remove two unused struct writeback_control fields: .encountered_congestion (completely unused) .nonblocking (never set, checked/showed in XFS,NFS/btrfs) The .for_background check in nfs_write_inode() is also removed btw, as .for_background implies WB_SYNC_NONE. Reviewed-by: Jan Kara Proposed-by: Christoph Hellwig Signed-off-by: Wu Fengguang diff --git a/fs/nfs/write.c b/fs/nfs/write.c index e268e3b..dd6a6ce 100644 --- a/fs/nfs/write.c +++ b/fs/nfs/write.c @@ -1564,8 +1564,7 @@ int nfs_write_inode(struct inode *inode, struct writeback_control *wbc) int status; bool sync = true; - if (wbc->sync_mode == WB_SYNC_NONE || wbc->nonblocking || - wbc->for_background) + if (wbc->sync_mode == WB_SYNC_NONE) sync = false; status = pnfs_layoutcommit_inode(inode, sync); diff --git a/fs/xfs/linux-2.6/xfs_aops.c b/fs/xfs/linux-2.6/xfs_aops.c index 79ce38b..7559861 100644 --- a/fs/xfs/linux-2.6/xfs_aops.c +++ b/fs/xfs/linux-2.6/xfs_aops.c @@ -970,7 +970,7 @@ xfs_vm_writepage( offset = page_offset(page); type = IO_OVERWRITE; - if (wbc->sync_mode == WB_SYNC_NONE && wbc->nonblocking) + if (wbc->sync_mode == WB_SYNC_NONE) nonblocking = 1; do { diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 8797b20..2f1b512 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -39,8 +39,6 @@ struct writeback_control { loff_t range_start; loff_t range_end; - unsigned nonblocking:1; /* Don't get stuck on request queues */ - unsigned encountered_congestion:1; /* An output: a queue is full */ unsigned for_kupdate:1; /* A kupdate writeback */ unsigned for_background:1; /* A background writeback */ unsigned tagged_writepages:1; /* tag-and-write to avoid livelock */ diff --git a/include/trace/events/btrfs.h b/include/trace/events/btrfs.h index 4114129..b31702a 100644 --- a/include/trace/events/btrfs.h +++ b/include/trace/events/btrfs.h @@ -284,7 +284,6 @@ DECLARE_EVENT_CLASS(btrfs__writepage, __field( long, pages_skipped ) __field( loff_t, range_start ) __field( loff_t, range_end ) - __field( char, nonblocking ) __field( char, for_kupdate ) __field( char, for_reclaim ) __field( char, range_cyclic ) @@ -299,7 +298,6 @@ DECLARE_EVENT_CLASS(btrfs__writepage, __entry->pages_skipped = wbc->pages_skipped; __entry->range_start = wbc->range_start; __entry->range_end = wbc->range_end; - __entry->nonblocking = wbc->nonblocking; __entry->for_kupdate = wbc->for_kupdate; __entry->for_reclaim = wbc->for_reclaim; __entry->range_cyclic = wbc->range_cyclic; @@ -310,13 +308,13 @@ DECLARE_EVENT_CLASS(btrfs__writepage, TP_printk("root = %llu(%s), ino = %lu, page_index = %lu, " "nr_to_write = %ld, pages_skipped = %ld, range_start = %llu, " - "range_end = %llu, nonblocking = %d, for_kupdate = %d, " + "range_end = %llu, for_kupdate = %d, " "for_reclaim = %d, range_cyclic = %d, writeback_index = %lu", show_root_type(__entry->root_objectid), (unsigned long)__entry->ino, __entry->index, __entry->nr_to_write, __entry->pages_skipped, __entry->range_start, __entry->range_end, - __entry->nonblocking, __entry->for_kupdate, + __entry->for_kupdate, __entry->for_reclaim, __entry->range_cyclic, (unsigned long)__entry->writeback_index) ); -- cgit v0.10.2 From 251d6a471c831e22880b3c146bb4556ddfb1dc82 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 1 Dec 2010 17:33:37 -0600 Subject: writeback: trace event writeback_single_inode It is valuable to know how the dirty inodes are iterated and their IO size. "writeback_single_inode: bdi 8:0: ino=134246746 state=I_DIRTY_SYNC|I_SYNC age=414 index=0 to_write=1024 wrote=0" - "state" reflects inode->i_state at the end of writeback_single_inode() - "index" reflects mapping->writeback_index after the ->writepages() call - "to_write" is the wbc->nr_to_write at entrance of writeback_single_inode() - "wrote" is the number of pages actually written v2: add trace event writeback_single_inode_requeue as proposed by Dave. CC: Dave Chinner Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index f43c479..5185fad 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -346,6 +346,7 @@ writeback_single_inode(struct inode *inode, struct bdi_writeback *wb, struct writeback_control *wbc) { struct address_space *mapping = inode->i_mapping; + long nr_to_write = wbc->nr_to_write; unsigned dirty; int ret; @@ -368,6 +369,8 @@ writeback_single_inode(struct inode *inode, struct bdi_writeback *wb, */ if (wbc->sync_mode != WB_SYNC_ALL) { requeue_io(inode, wb); + trace_writeback_single_inode_requeue(inode, wbc, + nr_to_write); return 0; } @@ -467,6 +470,7 @@ writeback_single_inode(struct inode *inode, struct bdi_writeback *wb, } } inode_sync_complete(inode); + trace_writeback_single_inode(inode, wbc, nr_to_write); return ret; } diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index b2cfac5..898277b 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -8,6 +8,19 @@ #include #include +#define show_inode_state(state) \ + __print_flags(state, "|", \ + {I_DIRTY_SYNC, "I_DIRTY_SYNC"}, \ + {I_DIRTY_DATASYNC, "I_DIRTY_DATASYNC"}, \ + {I_DIRTY_PAGES, "I_DIRTY_PAGES"}, \ + {I_NEW, "I_NEW"}, \ + {I_WILL_FREE, "I_WILL_FREE"}, \ + {I_FREEING, "I_FREEING"}, \ + {I_CLEAR, "I_CLEAR"}, \ + {I_SYNC, "I_SYNC"}, \ + {I_REFERENCED, "I_REFERENCED"} \ + ) + struct wb_writeback_work; DECLARE_EVENT_CLASS(writeback_work_class, @@ -184,6 +197,63 @@ DEFINE_EVENT(writeback_congest_waited_template, writeback_wait_iff_congested, TP_ARGS(usec_timeout, usec_delayed) ); +DECLARE_EVENT_CLASS(writeback_single_inode_template, + + TP_PROTO(struct inode *inode, + struct writeback_control *wbc, + unsigned long nr_to_write + ), + + TP_ARGS(inode, wbc, nr_to_write), + + TP_STRUCT__entry( + __array(char, name, 32) + __field(unsigned long, ino) + __field(unsigned long, state) + __field(unsigned long, age) + __field(unsigned long, writeback_index) + __field(long, nr_to_write) + __field(unsigned long, wrote) + ), + + TP_fast_assign( + strncpy(__entry->name, + dev_name(inode->i_mapping->backing_dev_info->dev), 32); + __entry->ino = inode->i_ino; + __entry->state = inode->i_state; + __entry->age = (jiffies - inode->dirtied_when) * + 1000 / HZ; + __entry->writeback_index = inode->i_mapping->writeback_index; + __entry->nr_to_write = nr_to_write; + __entry->wrote = nr_to_write - wbc->nr_to_write; + ), + + TP_printk("bdi %s: ino=%lu state=%s age=%lu " + "index=%lu to_write=%ld wrote=%lu", + __entry->name, + __entry->ino, + show_inode_state(__entry->state), + __entry->age, + __entry->writeback_index, + __entry->nr_to_write, + __entry->wrote + ) +); + +DEFINE_EVENT(writeback_single_inode_template, writeback_single_inode_requeue, + TP_PROTO(struct inode *inode, + struct writeback_control *wbc, + unsigned long nr_to_write), + TP_ARGS(inode, wbc, nr_to_write) +); + +DEFINE_EVENT(writeback_single_inode_template, writeback_single_inode, + TP_PROTO(struct inode *inode, + struct writeback_control *wbc, + unsigned long nr_to_write), + TP_ARGS(inode, wbc, nr_to_write) +); + #endif /* _TRACE_WRITEBACK_H */ /* This part must be outside protection */ -- cgit v0.10.2 From e84d0a4f8e39a73003a6ec9a11b07702745f4c1f Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sat, 23 Apr 2011 12:27:27 -0600 Subject: writeback: trace event writeback_queue_io Note that it adds a little overheads to account the moved/enqueued inodes from b_dirty to b_io. The "moved" accounting may be later used to limit the number of inodes that can be moved in one shot, in order to keep spinlock hold time under control. Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 5185fad..6caa982 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -248,15 +248,16 @@ static bool inode_dirtied_after(struct inode *inode, unsigned long t) /* * Move expired dirty inodes from @delaying_queue to @dispatch_queue. */ -static void move_expired_inodes(struct list_head *delaying_queue, +static int move_expired_inodes(struct list_head *delaying_queue, struct list_head *dispatch_queue, - unsigned long *older_than_this) + unsigned long *older_than_this) { LIST_HEAD(tmp); struct list_head *pos, *node; struct super_block *sb = NULL; struct inode *inode; int do_sb_sort = 0; + int moved = 0; while (!list_empty(delaying_queue)) { inode = wb_inode(delaying_queue->prev); @@ -267,12 +268,13 @@ static void move_expired_inodes(struct list_head *delaying_queue, do_sb_sort = 1; sb = inode->i_sb; list_move(&inode->i_wb_list, &tmp); + moved++; } /* just one sb in list, splice to dispatch_queue and we're done */ if (!do_sb_sort) { list_splice(&tmp, dispatch_queue); - return; + goto out; } /* Move inodes from one superblock together */ @@ -284,6 +286,8 @@ static void move_expired_inodes(struct list_head *delaying_queue, list_move(&inode->i_wb_list, dispatch_queue); } } +out: + return moved; } /* @@ -299,9 +303,11 @@ static void move_expired_inodes(struct list_head *delaying_queue, */ static void queue_io(struct bdi_writeback *wb, unsigned long *older_than_this) { + int moved; assert_spin_locked(&wb->list_lock); list_splice_init(&wb->b_more_io, &wb->b_io); - move_expired_inodes(&wb->b_dirty, &wb->b_io, older_than_this); + moved = move_expired_inodes(&wb->b_dirty, &wb->b_io, older_than_this); + trace_writeback_queue_io(wb, older_than_this, moved); } static int write_inode(struct inode *inode, struct writeback_control *wbc) diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index 898277b..205d149 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -162,6 +162,31 @@ DEFINE_WBC_EVENT(wbc_balance_dirty_written); DEFINE_WBC_EVENT(wbc_balance_dirty_wait); DEFINE_WBC_EVENT(wbc_writepage); +TRACE_EVENT(writeback_queue_io, + TP_PROTO(struct bdi_writeback *wb, + unsigned long *older_than_this, + int moved), + TP_ARGS(wb, older_than_this, moved), + TP_STRUCT__entry( + __array(char, name, 32) + __field(unsigned long, older) + __field(long, age) + __field(int, moved) + ), + TP_fast_assign( + strncpy(__entry->name, dev_name(wb->bdi->dev), 32); + __entry->older = older_than_this ? *older_than_this : 0; + __entry->age = older_than_this ? + (jiffies - *older_than_this) * 1000 / HZ : -1; + __entry->moved = moved; + ), + TP_printk("bdi %s: older=%lu age=%ld enqueue=%d", + __entry->name, + __entry->older, /* older_than_this in jiffies */ + __entry->age, /* older_than_this in relative milliseconds */ + __entry->moved) +); + DECLARE_EVENT_CLASS(writeback_congest_waited_template, TP_PROTO(unsigned int usec_timeout, unsigned int usec_delayed), -- cgit v0.10.2 From 284d952968d60cca156ef0c5efa62592b72264cb Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 6 Jun 2011 17:12:49 -0700 Subject: drm/i915: Call intel_enable_plane from i9xx_crtc_mode_set (again) This change got placed in the ironlake path instead of the 9xx path during a recent code shuffle. Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 81a9059..aa43e7b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4687,6 +4687,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, I915_WRITE(DSPCNTR(plane), dspcntr); POSTING_READ(DSPCNTR(plane)); + intel_enable_plane(dev_priv, plane, pipe); ret = intel_pipe_set_base(crtc, x, y, old_fb); @@ -5217,8 +5218,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, I915_WRITE(DSPCNTR(plane), dspcntr); POSTING_READ(DSPCNTR(plane)); - if (!HAS_PCH_SPLIT(dev)) - intel_enable_plane(dev_priv, plane, pipe); ret = intel_pipe_set_base(crtc, x, y, old_fb); -- cgit v0.10.2 From e0318d85be66ff1ff55c4cbc832cb3ee9e669da8 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Wed, 1 Jun 2011 17:50:25 -0400 Subject: kbuild: add `baseprereq' On the same model as `basetarget', it represents the filename of first prerequisite with directory and extension stripped. Signed-off-by: Arnaud Lacombe diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index be39cd1..d897278 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -21,6 +21,10 @@ depfile = $(subst $(comma),_,$(dot-target).d) basetarget = $(basename $(notdir $@)) ### +# filename of first prerequisite with directory and extension stripped +baseprereq = $(basename $(notdir $<)) + +### # Escape single quote for use in echo statements escsq = $(subst $(squote),'\$(squote)',$1) -- cgit v0.10.2 From 7373f4f83c71d50f0aece6d94309ab7fde42180f Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 00:04:43 -0400 Subject: kbuild: add implicit rules for parser generation Cc: David Gibson Cc: Michal Marek Signed-off-by: Arnaud Lacombe diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 93b2b59..b0d0c7a 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -160,6 +160,44 @@ ld_flags = $(LDFLAGS) $(ldflags-y) modname-multi = $(sort $(foreach m,$(multi-used),\ $(if $(filter $(subst $(obj)/,,$*.o), $($(m:.o=-objs)) $($(m:.o=-y))),$(m:.o=)))) +ifdef REGENERATE_PARSERS + +# GPERF +# --------------------------------------------------------------------------- +quiet_cmd_gperf = GPERF $@ + cmd_gperf = gperf -t --output-file $@ -a -C -E -g -k 1,3,$$ -p -t $< + +$(src)/%.hash.c_shipped: $(src)/%.gperf + $(call cmd,gperf) + +# LEX +# --------------------------------------------------------------------------- +LEX_PREFIX = $(if $(LEX_PREFIX_${baseprereq}),$(LEX_PREFIX_${baseprereq}),yy) + +quiet_cmd_flex = LEX $@ + cmd_flex = flex -o$@ -L -P $(LEX_PREFIX) $< + +$(src)/%.lex.c_shipped: $(src)/%.l + $(call cmd,flex) + +# YACC +# --------------------------------------------------------------------------- +YACC_PREFIX = $(if $(YACC_PREFIX_${baseprereq}),$(YACC_PREFIX_${baseprereq}),yy) + +quiet_cmd_bison = YACC $@ + cmd_bison = bison -o$@ -t -l -p $(YACC_PREFIX) $< + +$(src)/%.tab.c_shipped: $(src)/%.y + $(call cmd,bison) + +quiet_cmd_bison_h = YACC $@ + cmd_bison_h = bison -o/dev/null --defines=$@ -t -l -p $(YACC_PREFIX) $< + +$(src)/%.tab.h_shipped: $(src)/%.y + $(call cmd,bison_h) + +endif + # Shipped files # =========================================================================== -- cgit v0.10.2 From 991d76c950f6c5323c37c33dcebf6b8aec009ff0 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Tue, 7 Jun 2011 13:09:28 -0400 Subject: kbuild: simplify the %_shipped rule This is needed to have make(1) correctly link the implicit rules which generate the _shipped file from the lexer/parser to the final file. Signed-off-by: Arnaud Lacombe diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index b0d0c7a..aeea84a 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -204,7 +204,7 @@ endif quiet_cmd_shipped = SHIPPED $@ cmd_shipped = cat $< > $@ -$(obj)/%:: $(src)/%_shipped +$(obj)/%: $(src)/%_shipped $(call cmd,shipped) # Commands useful for building a boot image -- cgit v0.10.2 From 45c47d966850e2727f913c92e4b6d1c2d586d6bd Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Wed, 4 May 2011 21:18:27 -0400 Subject: genksyms: pass hash and lookup functions name and target language though the input file Renaming hash and lookup functions on the command line would reduces its genericity. Use the .gperf file to pass this information. Do the same for the target language. Signed-off-by: Arnaud Lacombe diff --git a/scripts/genksyms/keywords.gperf b/scripts/genksyms/keywords.gperf index e6349ac..3e77a94 100644 --- a/scripts/genksyms/keywords.gperf +++ b/scripts/genksyms/keywords.gperf @@ -1,3 +1,6 @@ +%language=ANSI-C +%define hash-function-name is_reserved_hash +%define lookup-function-name is_reserved_word %{ struct resword; static const struct resword *is_reserved_word(register const char *str, register unsigned int len); -- cgit v0.10.2 From 6b19e7e49e6d4ce123c16a6b069916045cab9fa0 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Tue, 7 Jun 2011 18:09:02 -0400 Subject: genksyms: drop -Wno-uninitialized from HOSTCFLAGS_parse.tab.o Signed-off-by: Arnaud Lacombe diff --git a/scripts/genksyms/Makefile b/scripts/genksyms/Makefile index 13d03cf..5cdba24 100644 --- a/scripts/genksyms/Makefile +++ b/scripts/genksyms/Makefile @@ -5,7 +5,7 @@ always := $(hostprogs-y) genksyms-objs := genksyms.o parse.o lex.o # -I needed for generated C source (shipped source) -HOSTCFLAGS_parse.o := -Wno-uninitialized -I$(src) +HOSTCFLAGS_parse.tab.o := -I$(src) # dependencies on generated files need to be listed explicitly $(obj)/lex.o: $(obj)/parse.h $(obj)/keywords.c -- cgit v0.10.2 From 880f4499bb4f6883095965bdd3b9237d927e24d8 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 00:05:28 -0400 Subject: genksyms: migrate parser to implicit rules Signed-off-by: Arnaud Lacombe diff --git a/scripts/genksyms/.gitignore b/scripts/genksyms/.gitignore index be5cadb..86dc07a 100644 --- a/scripts/genksyms/.gitignore +++ b/scripts/genksyms/.gitignore @@ -1,4 +1,5 @@ -keywords.c -lex.c -parse.[ch] +*.hash.c +*.lex.c +*.tab.c +*.tab.h genksyms diff --git a/scripts/genksyms/Makefile b/scripts/genksyms/Makefile index 5cdba24..a551090 100644 --- a/scripts/genksyms/Makefile +++ b/scripts/genksyms/Makefile @@ -2,52 +2,12 @@ hostprogs-y := genksyms always := $(hostprogs-y) -genksyms-objs := genksyms.o parse.o lex.o +genksyms-objs := genksyms.o parse.tab.o lex.lex.o # -I needed for generated C source (shipped source) HOSTCFLAGS_parse.tab.o := -I$(src) +HOSTCFLAGS_lex.lex.o := -I$(src) # dependencies on generated files need to be listed explicitly -$(obj)/lex.o: $(obj)/parse.h $(obj)/keywords.c +$(obj)/lex.lex.o: $(obj)/keywords.hash.c $(obj)/parse.tab.h -# -I needed for generated C source (shipped source) -HOSTCFLAGS_lex.o := -I$(src) - -ifdef GENERATE_PARSER - -# gperf - -quiet_cmd_keywords.c = GPERF $@ - cmd_keywords.c = gperf -L ANSI-C -a -C -E -g -H is_reserved_hash \ - -k 1,3,$$ -N is_reserved_word -p -t $< > $@ - -$(obj)/keywords.c: $(obj)/keywords.gperf FORCE - $(call if_changed,keywords.c) - cp $@ $@_shipped - -# flex - -quiet_cmd_lex.c = FLEX $@ - cmd_lex.c = flex -o$@ -d $< - -$(obj)/lex.c: $(obj)/lex.l $(obj)/keywords.c FORCE - $(call if_changed,lex.c) - cp $@ $@_shipped - -# bison - -quiet_cmd_parse.c = BISON $@ - cmd_parse.c = bison -o$@ -dtv $(filter-out FORCE,$^) - -$(obj)/parse.c: $(obj)/parse.y FORCE - $(call if_changed,parse.c) - cp $@ $@_shipped - cp $(@:.c=.h) $(@:.c=.h)_shipped - -$(obj)/parse.h: $(obj)/parse.c ; - -clean-files += parse.output - -endif - -targets += keywords.c lex.c parse.c parse.h diff --git a/scripts/genksyms/lex.l b/scripts/genksyms/lex.l index e4ddd49..400ae06 100644 --- a/scripts/genksyms/lex.l +++ b/scripts/genksyms/lex.l @@ -29,7 +29,7 @@ #include #include "genksyms.h" -#include "parse.h" +#include "parse.tab.h" /* We've got a two-level lexer here. We let flex do basic tokenization and then we categorize those basic tokens in the second stage. */ @@ -94,7 +94,7 @@ MC_TOKEN ([~%^&*+=|<>/-]=)|(&&)|("||")|(->)|(<<)|(>>) /* Bring in the keyword recognizer. */ -#include "keywords.c" +#include "keywords.hash.c" /* Macros to append to our phrase collection list. */ -- cgit v0.10.2 From 58ef81c5cf147f35dfa248cffdfc60a415783690 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 01:52:59 -0400 Subject: genksym: regen parser Signed-off-by: Arnaud Lacombe diff --git a/scripts/genksyms/keywords.c_shipped b/scripts/genksyms/keywords.c_shipped deleted file mode 100644 index 8060e06..0000000 --- a/scripts/genksyms/keywords.c_shipped +++ /dev/null @@ -1,220 +0,0 @@ -/* ANSI-C code produced by gperf version 3.0.4 */ -/* Command-line: gperf -L ANSI-C -a -C -E -g -H is_reserved_hash -k '1,3,$' -N is_reserved_word -p -t scripts/genksyms/keywords.gperf */ - -#if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ - && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \ - && (')' == 41) && ('*' == 42) && ('+' == 43) && (',' == 44) \ - && ('-' == 45) && ('.' == 46) && ('/' == 47) && ('0' == 48) \ - && ('1' == 49) && ('2' == 50) && ('3' == 51) && ('4' == 52) \ - && ('5' == 53) && ('6' == 54) && ('7' == 55) && ('8' == 56) \ - && ('9' == 57) && (':' == 58) && (';' == 59) && ('<' == 60) \ - && ('=' == 61) && ('>' == 62) && ('?' == 63) && ('A' == 65) \ - && ('B' == 66) && ('C' == 67) && ('D' == 68) && ('E' == 69) \ - && ('F' == 70) && ('G' == 71) && ('H' == 72) && ('I' == 73) \ - && ('J' == 74) && ('K' == 75) && ('L' == 76) && ('M' == 77) \ - && ('N' == 78) && ('O' == 79) && ('P' == 80) && ('Q' == 81) \ - && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \ - && ('V' == 86) && ('W' == 87) && ('X' == 88) && ('Y' == 89) \ - && ('Z' == 90) && ('[' == 91) && ('\\' == 92) && (']' == 93) \ - && ('^' == 94) && ('_' == 95) && ('a' == 97) && ('b' == 98) \ - && ('c' == 99) && ('d' == 100) && ('e' == 101) && ('f' == 102) \ - && ('g' == 103) && ('h' == 104) && ('i' == 105) && ('j' == 106) \ - && ('k' == 107) && ('l' == 108) && ('m' == 109) && ('n' == 110) \ - && ('o' == 111) && ('p' == 112) && ('q' == 113) && ('r' == 114) \ - && ('s' == 115) && ('t' == 116) && ('u' == 117) && ('v' == 118) \ - && ('w' == 119) && ('x' == 120) && ('y' == 121) && ('z' == 122) \ - && ('{' == 123) && ('|' == 124) && ('}' == 125) && ('~' == 126)) -/* The character set is not based on ISO-646. */ -#error "gperf generated tables don't work with this execution character set. Please report a bug to ." -#endif - -#line 1 "scripts/genksyms/keywords.gperf" - -struct resword; -static const struct resword *is_reserved_word(register const char *str, register unsigned int len); -#line 5 "scripts/genksyms/keywords.gperf" -struct resword { const char *name; int token; }; -/* maximum key range = 64, duplicates = 0 */ - -#ifdef __GNUC__ -__inline -#else -#ifdef __cplusplus -inline -#endif -#endif -static unsigned int -is_reserved_hash (register const char *str, register unsigned int len) -{ - static const unsigned char asso_values[] = - { - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 0, - 67, 67, 67, 67, 67, 67, 15, 67, 67, 67, - 0, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 0, 67, 0, 67, 5, - 25, 20, 15, 30, 67, 15, 67, 67, 10, 0, - 10, 40, 20, 67, 10, 5, 0, 10, 15, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, - 67, 67, 67, 67, 67, 67 - }; - return len + asso_values[(unsigned char)str[2]] + asso_values[(unsigned char)str[0]] + asso_values[(unsigned char)str[len - 1]]; -} - -#ifdef __GNUC__ -__inline -#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ -__attribute__ ((__gnu_inline__)) -#endif -#endif -const struct resword * -is_reserved_word (register const char *str, register unsigned int len) -{ - enum - { - TOTAL_KEYWORDS = 45, - MIN_WORD_LENGTH = 3, - MAX_WORD_LENGTH = 24, - MIN_HASH_VALUE = 3, - MAX_HASH_VALUE = 66 - }; - - static const struct resword wordlist[] = - { - {""}, {""}, {""}, -#line 30 "scripts/genksyms/keywords.gperf" - {"asm", ASM_KEYW}, - {""}, -#line 12 "scripts/genksyms/keywords.gperf" - {"__asm", ASM_KEYW}, - {""}, -#line 13 "scripts/genksyms/keywords.gperf" - {"__asm__", ASM_KEYW}, - {""}, {""}, -#line 56 "scripts/genksyms/keywords.gperf" - {"__typeof__", TYPEOF_KEYW}, - {""}, -#line 16 "scripts/genksyms/keywords.gperf" - {"__const", CONST_KEYW}, -#line 15 "scripts/genksyms/keywords.gperf" - {"__attribute__", ATTRIBUTE_KEYW}, -#line 17 "scripts/genksyms/keywords.gperf" - {"__const__", CONST_KEYW}, -#line 22 "scripts/genksyms/keywords.gperf" - {"__signed__", SIGNED_KEYW}, -#line 48 "scripts/genksyms/keywords.gperf" - {"static", STATIC_KEYW}, - {""}, -#line 43 "scripts/genksyms/keywords.gperf" - {"int", INT_KEYW}, -#line 36 "scripts/genksyms/keywords.gperf" - {"char", CHAR_KEYW}, -#line 37 "scripts/genksyms/keywords.gperf" - {"const", CONST_KEYW}, -#line 49 "scripts/genksyms/keywords.gperf" - {"struct", STRUCT_KEYW}, -#line 28 "scripts/genksyms/keywords.gperf" - {"__restrict__", RESTRICT_KEYW}, -#line 29 "scripts/genksyms/keywords.gperf" - {"restrict", RESTRICT_KEYW}, -#line 9 "scripts/genksyms/keywords.gperf" - {"EXPORT_SYMBOL_GPL_FUTURE", EXPORT_SYMBOL_KEYW}, -#line 20 "scripts/genksyms/keywords.gperf" - {"__inline__", INLINE_KEYW}, - {""}, -#line 24 "scripts/genksyms/keywords.gperf" - {"__volatile__", VOLATILE_KEYW}, -#line 7 "scripts/genksyms/keywords.gperf" - {"EXPORT_SYMBOL", EXPORT_SYMBOL_KEYW}, -#line 27 "scripts/genksyms/keywords.gperf" - {"_restrict", RESTRICT_KEYW}, - {""}, -#line 14 "scripts/genksyms/keywords.gperf" - {"__attribute", ATTRIBUTE_KEYW}, -#line 8 "scripts/genksyms/keywords.gperf" - {"EXPORT_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, -#line 18 "scripts/genksyms/keywords.gperf" - {"__extension__", EXTENSION_KEYW}, -#line 39 "scripts/genksyms/keywords.gperf" - {"enum", ENUM_KEYW}, -#line 10 "scripts/genksyms/keywords.gperf" - {"EXPORT_UNUSED_SYMBOL", EXPORT_SYMBOL_KEYW}, -#line 40 "scripts/genksyms/keywords.gperf" - {"extern", EXTERN_KEYW}, - {""}, -#line 21 "scripts/genksyms/keywords.gperf" - {"__signed", SIGNED_KEYW}, -#line 11 "scripts/genksyms/keywords.gperf" - {"EXPORT_UNUSED_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, -#line 51 "scripts/genksyms/keywords.gperf" - {"union", UNION_KEYW}, -#line 55 "scripts/genksyms/keywords.gperf" - {"typeof", TYPEOF_KEYW}, -#line 50 "scripts/genksyms/keywords.gperf" - {"typedef", TYPEDEF_KEYW}, -#line 19 "scripts/genksyms/keywords.gperf" - {"__inline", INLINE_KEYW}, -#line 35 "scripts/genksyms/keywords.gperf" - {"auto", AUTO_KEYW}, -#line 23 "scripts/genksyms/keywords.gperf" - {"__volatile", VOLATILE_KEYW}, - {""}, {""}, -#line 52 "scripts/genksyms/keywords.gperf" - {"unsigned", UNSIGNED_KEYW}, - {""}, -#line 46 "scripts/genksyms/keywords.gperf" - {"short", SHORT_KEYW}, -#line 42 "scripts/genksyms/keywords.gperf" - {"inline", INLINE_KEYW}, - {""}, -#line 54 "scripts/genksyms/keywords.gperf" - {"volatile", VOLATILE_KEYW}, -#line 44 "scripts/genksyms/keywords.gperf" - {"long", LONG_KEYW}, -#line 26 "scripts/genksyms/keywords.gperf" - {"_Bool", BOOL_KEYW}, - {""}, {""}, -#line 45 "scripts/genksyms/keywords.gperf" - {"register", REGISTER_KEYW}, -#line 53 "scripts/genksyms/keywords.gperf" - {"void", VOID_KEYW}, -#line 41 "scripts/genksyms/keywords.gperf" - {"float", FLOAT_KEYW}, -#line 38 "scripts/genksyms/keywords.gperf" - {"double", DOUBLE_KEYW}, - {""}, {""}, {""}, {""}, -#line 47 "scripts/genksyms/keywords.gperf" - {"signed", SIGNED_KEYW} - }; - - if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) - { - register int key = is_reserved_hash (str, len); - - if (key <= MAX_HASH_VALUE && key >= 0) - { - register const char *s = wordlist[key].name; - - if (*str == *s && !strcmp (str + 1, s + 1)) - return &wordlist[key]; - } - } - return 0; -} diff --git a/scripts/genksyms/keywords.hash.c_shipped b/scripts/genksyms/keywords.hash.c_shipped new file mode 100644 index 0000000..8206260 --- /dev/null +++ b/scripts/genksyms/keywords.hash.c_shipped @@ -0,0 +1,220 @@ +/* ANSI-C code produced by gperf version 3.0.4 */ +/* Command-line: gperf -t --output-file scripts/genksyms/keywords.hash.c_shipped -a -C -E -g -k '1,3,$' -p -t scripts/genksyms/keywords.gperf */ + +#if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ + && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \ + && (')' == 41) && ('*' == 42) && ('+' == 43) && (',' == 44) \ + && ('-' == 45) && ('.' == 46) && ('/' == 47) && ('0' == 48) \ + && ('1' == 49) && ('2' == 50) && ('3' == 51) && ('4' == 52) \ + && ('5' == 53) && ('6' == 54) && ('7' == 55) && ('8' == 56) \ + && ('9' == 57) && (':' == 58) && (';' == 59) && ('<' == 60) \ + && ('=' == 61) && ('>' == 62) && ('?' == 63) && ('A' == 65) \ + && ('B' == 66) && ('C' == 67) && ('D' == 68) && ('E' == 69) \ + && ('F' == 70) && ('G' == 71) && ('H' == 72) && ('I' == 73) \ + && ('J' == 74) && ('K' == 75) && ('L' == 76) && ('M' == 77) \ + && ('N' == 78) && ('O' == 79) && ('P' == 80) && ('Q' == 81) \ + && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \ + && ('V' == 86) && ('W' == 87) && ('X' == 88) && ('Y' == 89) \ + && ('Z' == 90) && ('[' == 91) && ('\\' == 92) && (']' == 93) \ + && ('^' == 94) && ('_' == 95) && ('a' == 97) && ('b' == 98) \ + && ('c' == 99) && ('d' == 100) && ('e' == 101) && ('f' == 102) \ + && ('g' == 103) && ('h' == 104) && ('i' == 105) && ('j' == 106) \ + && ('k' == 107) && ('l' == 108) && ('m' == 109) && ('n' == 110) \ + && ('o' == 111) && ('p' == 112) && ('q' == 113) && ('r' == 114) \ + && ('s' == 115) && ('t' == 116) && ('u' == 117) && ('v' == 118) \ + && ('w' == 119) && ('x' == 120) && ('y' == 121) && ('z' == 122) \ + && ('{' == 123) && ('|' == 124) && ('}' == 125) && ('~' == 126)) +/* The character set is not based on ISO-646. */ +#error "gperf generated tables don't work with this execution character set. Please report a bug to ." +#endif + +#line 4 "scripts/genksyms/keywords.gperf" + +struct resword; +static const struct resword *is_reserved_word(register const char *str, register unsigned int len); +#line 8 "scripts/genksyms/keywords.gperf" +struct resword { const char *name; int token; }; +/* maximum key range = 64, duplicates = 0 */ + +#ifdef __GNUC__ +__inline +#else +#ifdef __cplusplus +inline +#endif +#endif +static unsigned int +is_reserved_hash (register const char *str, register unsigned int len) +{ + static const unsigned char asso_values[] = + { + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 0, + 67, 67, 67, 67, 67, 67, 15, 67, 67, 67, + 0, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 0, 67, 0, 67, 5, + 25, 20, 15, 30, 67, 15, 67, 67, 10, 0, + 10, 40, 20, 67, 10, 5, 0, 10, 15, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, + 67, 67, 67, 67, 67, 67 + }; + return len + asso_values[(unsigned char)str[2]] + asso_values[(unsigned char)str[0]] + asso_values[(unsigned char)str[len - 1]]; +} + +#ifdef __GNUC__ +__inline +#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ +__attribute__ ((__gnu_inline__)) +#endif +#endif +const struct resword * +is_reserved_word (register const char *str, register unsigned int len) +{ + enum + { + TOTAL_KEYWORDS = 45, + MIN_WORD_LENGTH = 3, + MAX_WORD_LENGTH = 24, + MIN_HASH_VALUE = 3, + MAX_HASH_VALUE = 66 + }; + + static const struct resword wordlist[] = + { + {""}, {""}, {""}, +#line 33 "scripts/genksyms/keywords.gperf" + {"asm", ASM_KEYW}, + {""}, +#line 15 "scripts/genksyms/keywords.gperf" + {"__asm", ASM_KEYW}, + {""}, +#line 16 "scripts/genksyms/keywords.gperf" + {"__asm__", ASM_KEYW}, + {""}, {""}, +#line 59 "scripts/genksyms/keywords.gperf" + {"__typeof__", TYPEOF_KEYW}, + {""}, +#line 19 "scripts/genksyms/keywords.gperf" + {"__const", CONST_KEYW}, +#line 18 "scripts/genksyms/keywords.gperf" + {"__attribute__", ATTRIBUTE_KEYW}, +#line 20 "scripts/genksyms/keywords.gperf" + {"__const__", CONST_KEYW}, +#line 25 "scripts/genksyms/keywords.gperf" + {"__signed__", SIGNED_KEYW}, +#line 51 "scripts/genksyms/keywords.gperf" + {"static", STATIC_KEYW}, + {""}, +#line 46 "scripts/genksyms/keywords.gperf" + {"int", INT_KEYW}, +#line 39 "scripts/genksyms/keywords.gperf" + {"char", CHAR_KEYW}, +#line 40 "scripts/genksyms/keywords.gperf" + {"const", CONST_KEYW}, +#line 52 "scripts/genksyms/keywords.gperf" + {"struct", STRUCT_KEYW}, +#line 31 "scripts/genksyms/keywords.gperf" + {"__restrict__", RESTRICT_KEYW}, +#line 32 "scripts/genksyms/keywords.gperf" + {"restrict", RESTRICT_KEYW}, +#line 12 "scripts/genksyms/keywords.gperf" + {"EXPORT_SYMBOL_GPL_FUTURE", EXPORT_SYMBOL_KEYW}, +#line 23 "scripts/genksyms/keywords.gperf" + {"__inline__", INLINE_KEYW}, + {""}, +#line 27 "scripts/genksyms/keywords.gperf" + {"__volatile__", VOLATILE_KEYW}, +#line 10 "scripts/genksyms/keywords.gperf" + {"EXPORT_SYMBOL", EXPORT_SYMBOL_KEYW}, +#line 30 "scripts/genksyms/keywords.gperf" + {"_restrict", RESTRICT_KEYW}, + {""}, +#line 17 "scripts/genksyms/keywords.gperf" + {"__attribute", ATTRIBUTE_KEYW}, +#line 11 "scripts/genksyms/keywords.gperf" + {"EXPORT_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, +#line 21 "scripts/genksyms/keywords.gperf" + {"__extension__", EXTENSION_KEYW}, +#line 42 "scripts/genksyms/keywords.gperf" + {"enum", ENUM_KEYW}, +#line 13 "scripts/genksyms/keywords.gperf" + {"EXPORT_UNUSED_SYMBOL", EXPORT_SYMBOL_KEYW}, +#line 43 "scripts/genksyms/keywords.gperf" + {"extern", EXTERN_KEYW}, + {""}, +#line 24 "scripts/genksyms/keywords.gperf" + {"__signed", SIGNED_KEYW}, +#line 14 "scripts/genksyms/keywords.gperf" + {"EXPORT_UNUSED_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, +#line 54 "scripts/genksyms/keywords.gperf" + {"union", UNION_KEYW}, +#line 58 "scripts/genksyms/keywords.gperf" + {"typeof", TYPEOF_KEYW}, +#line 53 "scripts/genksyms/keywords.gperf" + {"typedef", TYPEDEF_KEYW}, +#line 22 "scripts/genksyms/keywords.gperf" + {"__inline", INLINE_KEYW}, +#line 38 "scripts/genksyms/keywords.gperf" + {"auto", AUTO_KEYW}, +#line 26 "scripts/genksyms/keywords.gperf" + {"__volatile", VOLATILE_KEYW}, + {""}, {""}, +#line 55 "scripts/genksyms/keywords.gperf" + {"unsigned", UNSIGNED_KEYW}, + {""}, +#line 49 "scripts/genksyms/keywords.gperf" + {"short", SHORT_KEYW}, +#line 45 "scripts/genksyms/keywords.gperf" + {"inline", INLINE_KEYW}, + {""}, +#line 57 "scripts/genksyms/keywords.gperf" + {"volatile", VOLATILE_KEYW}, +#line 47 "scripts/genksyms/keywords.gperf" + {"long", LONG_KEYW}, +#line 29 "scripts/genksyms/keywords.gperf" + {"_Bool", BOOL_KEYW}, + {""}, {""}, +#line 48 "scripts/genksyms/keywords.gperf" + {"register", REGISTER_KEYW}, +#line 56 "scripts/genksyms/keywords.gperf" + {"void", VOID_KEYW}, +#line 44 "scripts/genksyms/keywords.gperf" + {"float", FLOAT_KEYW}, +#line 41 "scripts/genksyms/keywords.gperf" + {"double", DOUBLE_KEYW}, + {""}, {""}, {""}, {""}, +#line 50 "scripts/genksyms/keywords.gperf" + {"signed", SIGNED_KEYW} + }; + + if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) + { + register int key = is_reserved_hash (str, len); + + if (key <= MAX_HASH_VALUE && key >= 0) + { + register const char *s = wordlist[key].name; + + if (*str == *s && !strcmp (str + 1, s + 1)) + return &wordlist[key]; + } + } + return 0; +} diff --git a/scripts/genksyms/lex.c_shipped b/scripts/genksyms/lex.c_shipped deleted file mode 100644 index af49390..0000000 --- a/scripts/genksyms/lex.c_shipped +++ /dev/null @@ -1,2582 +0,0 @@ -#line 2 "scripts/genksyms/lex.c" - -#line 4 "scripts/genksyms/lex.c" - -#define YY_INT_ALIGNED short int - -/* A lexical scanner generated by flex */ - -/* %not-for-header */ - -/* %if-c-only */ -/* %if-not-reentrant */ - -/* %endif */ -/* %endif */ -/* %ok-for-header */ - -#define FLEX_SCANNER -#define YY_FLEX_MAJOR_VERSION 2 -#define YY_FLEX_MINOR_VERSION 5 -#define YY_FLEX_SUBMINOR_VERSION 35 -#if YY_FLEX_SUBMINOR_VERSION > 0 -#define FLEX_BETA -#endif - -/* %if-c++-only */ -/* %endif */ - -/* %if-c-only */ - -/* %endif */ - -/* %if-c-only */ - -/* %endif */ - -/* First, we deal with platform-specific or compiler-specific issues. */ - -/* begin standard C headers. */ -/* %if-c-only */ -#include -#include -#include -#include -/* %endif */ - -/* %if-tables-serialization */ -/* %endif */ -/* end standard C headers. */ - -/* %if-c-or-c++ */ -/* flex integer type definitions */ - -#ifndef FLEXINT_H -#define FLEXINT_H - -/* C99 systems have . Non-C99 systems may or may not. */ - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L - -/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, - * if you want the limit (max/min) macros for int types. - */ -#ifndef __STDC_LIMIT_MACROS -#define __STDC_LIMIT_MACROS 1 -#endif - -#include -typedef int8_t flex_int8_t; -typedef uint8_t flex_uint8_t; -typedef int16_t flex_int16_t; -typedef uint16_t flex_uint16_t; -typedef int32_t flex_int32_t; -typedef uint32_t flex_uint32_t; -#else -typedef signed char flex_int8_t; -typedef short int flex_int16_t; -typedef int flex_int32_t; -typedef unsigned char flex_uint8_t; -typedef unsigned short int flex_uint16_t; -typedef unsigned int flex_uint32_t; -#endif /* ! C99 */ - -/* Limits of integral types. */ -#ifndef INT8_MIN -#define INT8_MIN (-128) -#endif -#ifndef INT16_MIN -#define INT16_MIN (-32767-1) -#endif -#ifndef INT32_MIN -#define INT32_MIN (-2147483647-1) -#endif -#ifndef INT8_MAX -#define INT8_MAX (127) -#endif -#ifndef INT16_MAX -#define INT16_MAX (32767) -#endif -#ifndef INT32_MAX -#define INT32_MAX (2147483647) -#endif -#ifndef UINT8_MAX -#define UINT8_MAX (255U) -#endif -#ifndef UINT16_MAX -#define UINT16_MAX (65535U) -#endif -#ifndef UINT32_MAX -#define UINT32_MAX (4294967295U) -#endif - -#endif /* ! FLEXINT_H */ - -/* %endif */ - -/* %if-c++-only */ -/* %endif */ - -#ifdef __cplusplus - -/* The "const" storage-class-modifier is valid. */ -#define YY_USE_CONST - -#else /* ! __cplusplus */ - -/* C99 requires __STDC__ to be defined as 1. */ -#if defined (__STDC__) - -#define YY_USE_CONST - -#endif /* defined (__STDC__) */ -#endif /* ! __cplusplus */ - -#ifdef YY_USE_CONST -#define yyconst const -#else -#define yyconst -#endif - -/* %not-for-header */ - -/* Returned upon end-of-file. */ -#define YY_NULL 0 -/* %ok-for-header */ - -/* %not-for-header */ - -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. - */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) -/* %ok-for-header */ - -/* %if-reentrant */ -/* %endif */ - -/* %if-not-reentrant */ - -/* %endif */ - -/* Enter a start condition. This macro really ought to take a parameter, - * but we do it the disgusting crufty way forced on us by the ()-less - * definition of BEGIN. - */ -#define BEGIN (yy_start) = 1 + 2 * - -/* Translate the current start state into a value that can be later handed - * to BEGIN to return to the state. The YYSTATE alias is for lex - * compatibility. - */ -#define YY_START (((yy_start) - 1) / 2) -#define YYSTATE YY_START - -/* Action number for EOF rule of a given start state. */ -#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - -/* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE yyrestart(yyin ) - -#define YY_END_OF_BUFFER_CHAR 0 - -/* Size of default input buffer. */ -#ifndef YY_BUF_SIZE -#define YY_BUF_SIZE 16384 -#endif - -/* The state buf must be large enough to hold one state per character in the main buffer. - */ -#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) - -#ifndef YY_TYPEDEF_YY_BUFFER_STATE -#define YY_TYPEDEF_YY_BUFFER_STATE -typedef struct yy_buffer_state *YY_BUFFER_STATE; -#endif - -/* %if-not-reentrant */ -extern int yyleng; -/* %endif */ - -/* %if-c-only */ -/* %if-not-reentrant */ -extern FILE *yyin, *yyout; -/* %endif */ -/* %endif */ - -#define EOB_ACT_CONTINUE_SCAN 0 -#define EOB_ACT_END_OF_FILE 1 -#define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) - -/* Return all but the first "n" matched characters back to the input stream. */ -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up yytext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - *yy_cp = (yy_hold_char); \ - YY_RESTORE_YY_MORE_OFFSET \ - (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up yytext again */ \ - } \ - while ( 0 ) - -#define unput(c) yyunput( c, (yytext_ptr) ) - -#ifndef YY_TYPEDEF_YY_SIZE_T -#define YY_TYPEDEF_YY_SIZE_T -typedef size_t yy_size_t; -#endif - -#ifndef YY_STRUCT_YY_BUFFER_STATE -#define YY_STRUCT_YY_BUFFER_STATE -struct yy_buffer_state - { -/* %if-c-only */ - FILE *yy_input_file; -/* %endif */ - -/* %if-c++-only */ -/* %endif */ - - char *yy_ch_buf; /* input buffer */ - char *yy_buf_pos; /* current position in input buffer */ - - /* Size of input buffer in bytes, not including room for EOB - * characters. - */ - yy_size_t yy_buf_size; - - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ - int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to - * delete it. - */ - int yy_is_our_buffer; - - /* Whether this is an "interactive" input source; if so, and - * if we're using stdio for input, then we want to use getc() - * instead of fread(), to make sure we stop fetching input after - * each newline. - */ - int yy_is_interactive; - - /* Whether we're considered to be at the beginning of a line. - * If so, '^' rules will be active on the next match, otherwise - * not. - */ - int yy_at_bol; - - int yy_bs_lineno; /**< The line count. */ - int yy_bs_column; /**< The column count. */ - - /* Whether to try to fill the input buffer when we reach the - * end of it. - */ - int yy_fill_buffer; - - int yy_buffer_status; - -#define YY_BUFFER_NEW 0 -#define YY_BUFFER_NORMAL 1 - /* When an EOF's been seen but there's still some text to process - * then we mark the buffer as YY_EOF_PENDING, to indicate that we - * shouldn't try reading from the input source any more. We might - * still have a bunch of tokens to match, though, because of - * possible backing-up. - * - * When we actually see the EOF, we change the status to "new" - * (via yyrestart()), so that the user can continue scanning by - * just pointing yyin at a new input file. - */ -#define YY_BUFFER_EOF_PENDING 2 - - }; -#endif /* !YY_STRUCT_YY_BUFFER_STATE */ - -/* %if-c-only Standard (non-C++) definition */ -/* %not-for-header */ - -/* %if-not-reentrant */ - -/* Stack of input buffers. */ -static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ -static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ -static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ -/* %endif */ -/* %ok-for-header */ - -/* %endif */ - -/* We provide macros for accessing buffer states in case in the - * future we want to put the buffer states in a more general - * "scanner state". - * - * Returns the top of the stack, or NULL. - */ -#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ - ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ - : NULL) - -/* Same as previous macro, but useful when we know that the buffer stack is not - * NULL or when we need an lvalue. For internal use only. - */ -#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] - -/* %if-c-only Standard (non-C++) definition */ - -/* %if-not-reentrant */ -/* %not-for-header */ - -/* yy_hold_char holds the character lost when yytext is formed. */ -static char yy_hold_char; -static int yy_n_chars; /* number of characters read into yy_ch_buf */ -int yyleng; - -/* Points to current character in buffer. */ -static char *yy_c_buf_p = (char *) 0; -static int yy_init = 0; /* whether we need to initialize */ -static int yy_start = 0; /* start state number */ - -/* Flag which is used to allow yywrap()'s to do buffer switches - * instead of setting up a fresh yyin. A bit of a hack ... - */ -static int yy_did_buffer_switch_on_eof; -/* %ok-for-header */ - -/* %endif */ - -void yyrestart (FILE *input_file ); -void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); -void yy_delete_buffer (YY_BUFFER_STATE b ); -void yy_flush_buffer (YY_BUFFER_STATE b ); -void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); -void yypop_buffer_state (void ); - -static void yyensure_buffer_stack (void ); -static void yy_load_buffer_state (void ); -static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); - -#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) - -YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); - -/* %endif */ - -void *yyalloc (yy_size_t ); -void *yyrealloc (void *,yy_size_t ); -void yyfree (void * ); - -#define yy_new_buffer yy_create_buffer - -#define yy_set_interactive(is_interactive) \ - { \ - if ( ! YY_CURRENT_BUFFER ){ \ - yyensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ - } - -#define yy_set_bol(at_bol) \ - { \ - if ( ! YY_CURRENT_BUFFER ){\ - yyensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ - } - -#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) - -/* %% [1.0] yytext/yyin/yyout/yy_state_type/yylineno etc. def's & init go here */ -/* Begin user sect3 */ - -#define yywrap(n) 1 -#define YY_SKIP_YYWRAP - -#define FLEX_DEBUG - -typedef unsigned char YY_CHAR; - -FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; - -typedef int yy_state_type; - -extern int yylineno; - -int yylineno = 1; - -extern char *yytext; -#define yytext_ptr yytext - -/* %if-c-only Standard (non-C++) definition */ - -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yy_fatal_error (yyconst char msg[] ); - -/* %endif */ - -/* Done after the current pattern has been matched and before the - * corresponding action - sets up yytext. - */ -#define YY_DO_BEFORE_ACTION \ - (yytext_ptr) = yy_bp; \ -/* %% [2.0] code to fiddle yytext and yyleng for yymore() goes here \ */\ - yyleng = (size_t) (yy_cp - yy_bp); \ - (yy_hold_char) = *yy_cp; \ - *yy_cp = '\0'; \ -/* %% [3.0] code to copy yytext_ptr to yytext[] goes here, if %array \ */\ - (yy_c_buf_p) = yy_cp; - -/* %% [4.0] data tables for the DFA and the user's section 1 definitions go here */ -#define YY_NUM_RULES 13 -#define YY_END_OF_BUFFER 14 -/* This struct is not used in this scanner, - but its presence is necessary. */ -struct yy_trans_info - { - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; -static yyconst flex_int16_t yy_accept[73] = - { 0, - 0, 0, 14, 12, 4, 3, 12, 7, 12, 12, - 12, 12, 12, 9, 9, 12, 12, 7, 12, 12, - 4, 0, 5, 0, 7, 8, 0, 6, 0, 0, - 10, 10, 9, 0, 0, 9, 9, 0, 9, 0, - 0, 0, 0, 2, 0, 0, 11, 0, 10, 0, - 10, 9, 9, 0, 0, 0, 10, 10, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0 - } ; - -static yyconst flex_int32_t yy_ec[256] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 1, 5, 6, 7, 8, 9, 10, 1, - 1, 8, 11, 1, 12, 13, 8, 14, 15, 15, - 15, 15, 15, 15, 15, 16, 16, 1, 1, 17, - 18, 19, 1, 1, 20, 20, 20, 20, 21, 22, - 7, 7, 7, 7, 7, 23, 7, 7, 7, 7, - 7, 7, 7, 7, 24, 7, 7, 25, 7, 7, - 1, 26, 1, 8, 7, 1, 20, 20, 20, 20, - - 21, 22, 7, 7, 7, 7, 7, 27, 7, 7, - 7, 7, 7, 7, 7, 7, 24, 7, 7, 25, - 7, 7, 1, 28, 1, 8, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1 - } ; - -static yyconst flex_int32_t yy_meta[29] = - { 0, - 1, 1, 2, 1, 1, 1, 3, 1, 1, 1, - 4, 4, 5, 6, 6, 6, 1, 1, 1, 7, - 8, 7, 3, 3, 3, 1, 3, 1 - } ; - -static yyconst flex_int16_t yy_base[85] = - { 0, - 0, 145, 150, 266, 27, 266, 25, 0, 131, 23, - 23, 16, 23, 39, 31, 25, 39, 60, 22, 65, - 57, 43, 266, 0, 0, 266, 61, 266, 0, 128, - 74, 0, 113, 59, 62, 113, 52, 0, 0, 72, - 66, 110, 100, 266, 73, 74, 266, 70, 266, 90, - 103, 266, 84, 129, 108, 113, 143, 266, 107, 66, - 118, 137, 168, 120, 80, 91, 145, 143, 83, 41, - 266, 266, 190, 196, 204, 212, 220, 228, 232, 237, - 238, 243, 249, 257 - } ; - -static yyconst flex_int16_t yy_def[85] = - { 0, - 72, 1, 72, 72, 72, 72, 73, 74, 72, 72, - 75, 72, 72, 72, 14, 72, 72, 74, 72, 76, - 72, 73, 72, 77, 74, 72, 75, 72, 78, 72, - 72, 31, 14, 79, 80, 72, 72, 81, 15, 73, - 75, 76, 76, 72, 73, 75, 72, 82, 72, 72, - 72, 72, 81, 76, 54, 72, 72, 72, 76, 54, - 76, 76, 76, 54, 83, 76, 63, 83, 84, 84, - 72, 0, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 72, 72, 72 - } ; - -static yyconst flex_int16_t yy_nxt[295] = - { 0, - 4, 5, 6, 5, 7, 4, 8, 9, 10, 11, - 9, 12, 13, 14, 15, 15, 16, 9, 17, 8, - 8, 8, 18, 8, 8, 4, 8, 19, 21, 23, - 21, 26, 28, 26, 26, 30, 31, 31, 31, 26, - 26, 26, 26, 71, 39, 39, 39, 23, 29, 26, - 24, 32, 33, 33, 34, 72, 26, 26, 21, 35, - 21, 36, 37, 38, 40, 36, 43, 44, 24, 41, - 28, 32, 50, 50, 52, 28, 23, 23, 52, 35, - 56, 56, 44, 28, 42, 71, 29, 31, 31, 31, - 42, 29, 59, 44, 48, 49, 49, 24, 24, 29, - - 49, 43, 44, 51, 51, 51, 36, 37, 59, 44, - 36, 65, 44, 54, 55, 55, 51, 51, 51, 59, - 44, 64, 64, 64, 58, 58, 57, 57, 57, 58, - 59, 44, 42, 64, 64, 64, 52, 72, 59, 44, - 47, 66, 60, 60, 42, 44, 59, 69, 26, 72, - 20, 61, 62, 63, 72, 61, 57, 57, 57, 66, - 72, 72, 72, 66, 49, 49, 72, 61, 62, 49, - 44, 61, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 67, 67, 67, 72, 72, 72, 67, 67, 67, - 22, 22, 22, 22, 22, 22, 22, 22, 25, 72, - - 72, 25, 25, 25, 27, 27, 27, 27, 27, 27, - 27, 27, 42, 42, 42, 42, 42, 42, 42, 42, - 45, 72, 45, 45, 45, 45, 45, 45, 46, 72, - 46, 46, 46, 46, 46, 46, 34, 34, 72, 34, - 51, 72, 51, 53, 53, 53, 57, 72, 57, 68, - 68, 68, 68, 68, 68, 68, 68, 70, 70, 70, - 70, 70, 70, 70, 70, 3, 72, 72, 72, 72, - 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 72, 72, 72 - - } ; - -static yyconst flex_int16_t yy_chk[295] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 5, 7, - 5, 10, 11, 12, 12, 13, 13, 13, 13, 19, - 10, 16, 16, 70, 15, 15, 15, 22, 11, 19, - 7, 14, 14, 14, 14, 15, 17, 17, 21, 14, - 21, 14, 14, 14, 18, 14, 20, 20, 22, 18, - 27, 34, 35, 35, 37, 41, 40, 45, 37, 34, - 48, 48, 65, 46, 65, 69, 27, 31, 31, 31, - 60, 41, 66, 66, 31, 31, 31, 40, 45, 46, - - 31, 43, 43, 50, 50, 50, 53, 53, 59, 59, - 53, 59, 42, 43, 43, 43, 51, 51, 51, 61, - 61, 55, 55, 55, 51, 51, 56, 56, 56, 51, - 54, 54, 55, 64, 64, 64, 36, 33, 62, 62, - 30, 61, 54, 54, 64, 68, 67, 68, 9, 3, - 2, 54, 54, 54, 0, 54, 57, 57, 57, 62, - 0, 0, 0, 62, 57, 57, 0, 67, 67, 57, - 63, 67, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 63, 63, 63, 0, 0, 0, 63, 63, 63, - 73, 73, 73, 73, 73, 73, 73, 73, 74, 0, - - 0, 74, 74, 74, 75, 75, 75, 75, 75, 75, - 75, 75, 76, 76, 76, 76, 76, 76, 76, 76, - 77, 0, 77, 77, 77, 77, 77, 77, 78, 0, - 78, 78, 78, 78, 78, 78, 79, 79, 0, 79, - 80, 0, 80, 81, 81, 81, 82, 0, 82, 83, - 83, 83, 83, 83, 83, 83, 83, 84, 84, 84, - 84, 84, 84, 84, 84, 72, 72, 72, 72, 72, - 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, - 72, 72, 72, 72 - - } ; - -static yy_state_type yy_last_accepting_state; -static char *yy_last_accepting_cpos; - -extern int yy_flex_debug; -int yy_flex_debug = 1; - -static yyconst flex_int16_t yy_rule_linenum[13] = - { 0, - 67, 68, 69, 72, 75, 76, 77, 83, 84, 85, - 87, 90 - } ; - -/* The intent behind this definition is that it'll catch - * any uses of REJECT which flex missed. - */ -#define REJECT reject_used_but_not_detected -#define yymore() yymore_used_but_not_detected -#define YY_MORE_ADJ 0 -#define YY_RESTORE_YY_MORE_OFFSET -char *yytext; -#line 1 "scripts/genksyms/lex.l" -/* Lexical analysis for genksyms. - Copyright 1996, 1997 Linux International. - - New implementation contributed by Richard Henderson - Based on original work by Bjorn Ekwall - - Taken from Linux modutils 2.4.22. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the - Free Software Foundation; either version 2 of the License, or (at your - option) any later version. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#line 25 "scripts/genksyms/lex.l" - -#include -#include -#include -#include - -#include "genksyms.h" -#include "parse.h" - -/* We've got a two-level lexer here. We let flex do basic tokenization - and then we categorize those basic tokens in the second stage. */ -#define YY_DECL static int yylex1(void) - -/* We don't do multiple input files. */ -#define YY_NO_INPUT 1 -#line 668 "scripts/genksyms/lex.c" - -#define INITIAL 0 - -#ifndef YY_NO_UNISTD_H -/* Special case for "unistd.h", since it is non-ANSI. We include it way - * down here because we want the user's section 1 to have been scanned first. - * The user has a chance to override it with an option. - */ -/* %if-c-only */ -#include -/* %endif */ -/* %if-c++-only */ -/* %endif */ -#endif - -#ifndef YY_EXTRA_TYPE -#define YY_EXTRA_TYPE void * -#endif - -/* %if-c-only Reentrant structure and macros (non-C++). */ -/* %if-reentrant */ -/* %if-c-only */ - -static int yy_init_globals (void ); - -/* %endif */ -/* %if-reentrant */ -/* %endif */ -/* %endif End reentrant structures and macros. */ - -/* Accessor methods to globals. - These are made visible to non-reentrant scanners for convenience. */ - -int yylex_destroy (void ); - -int yyget_debug (void ); - -void yyset_debug (int debug_flag ); - -YY_EXTRA_TYPE yyget_extra (void ); - -void yyset_extra (YY_EXTRA_TYPE user_defined ); - -FILE *yyget_in (void ); - -void yyset_in (FILE * in_str ); - -FILE *yyget_out (void ); - -void yyset_out (FILE * out_str ); - -int yyget_leng (void ); - -char *yyget_text (void ); - -int yyget_lineno (void ); - -void yyset_lineno (int line_number ); - -/* %if-bison-bridge */ -/* %endif */ - -/* Macros after this point can all be overridden by user definitions in - * section 1. - */ - -#ifndef YY_SKIP_YYWRAP -#ifdef __cplusplus -extern "C" int yywrap (void ); -#else -extern int yywrap (void ); -#endif -#endif - -/* %not-for-header */ - - static void yyunput (int c,char *buf_ptr ); - -/* %ok-for-header */ - -/* %endif */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); -#endif - -#ifndef YY_NO_INPUT -/* %if-c-only Standard (non-C++) definition */ -/* %not-for-header */ - -#ifdef __cplusplus -static int yyinput (void ); -#else -static int input (void ); -#endif -/* %ok-for-header */ - -/* %endif */ -#endif - -/* %if-c-only */ - -/* %endif */ - -/* Amount of stuff to slurp up with each read. */ -#ifndef YY_READ_BUF_SIZE -#define YY_READ_BUF_SIZE 8192 -#endif - -/* Copy whatever the last rule matched to the standard output. */ -#ifndef ECHO -/* %if-c-only Standard (non-C++) definition */ -/* This used to be an fputs(), but since the string might contain NUL's, - * we now use fwrite(). - */ -#define ECHO fwrite( yytext, yyleng, 1, yyout ) -/* %endif */ -/* %if-c++-only C++ definition */ -/* %endif */ -#endif - -/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, - * is returned in "result". - */ -#ifndef YY_INPUT -#define YY_INPUT(buf,result,max_size) \ -/* %% [5.0] fread()/read() definition of YY_INPUT goes here unless we're doing C++ \ */\ - if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ - { \ - int c = '*'; \ - int n; \ - for ( n = 0; n < max_size && \ - (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ - buf[n] = (char) c; \ - if ( c == '\n' ) \ - buf[n++] = (char) c; \ - if ( c == EOF && ferror( yyin ) ) \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - result = n; \ - } \ - else \ - { \ - errno=0; \ - while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ - { \ - if( errno != EINTR) \ - { \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - break; \ - } \ - errno=0; \ - clearerr(yyin); \ - } \ - }\ -\ -/* %if-c++-only C++ definition \ */\ -/* %endif */ - -#endif - -/* No semi-colon after return; correct usage is to write "yyterminate();" - - * we don't want an extra ';' after the "return" because that will cause - * some compilers to complain about unreachable statements. - */ -#ifndef yyterminate -#define yyterminate() return YY_NULL -#endif - -/* Number of entries by which start-condition stack grows. */ -#ifndef YY_START_STACK_INCR -#define YY_START_STACK_INCR 25 -#endif - -/* Report a fatal error. */ -#ifndef YY_FATAL_ERROR -/* %if-c-only */ -#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -#endif - -/* %if-tables-serialization structures and prototypes */ -/* %not-for-header */ - -/* %ok-for-header */ - -/* %not-for-header */ - -/* %tables-yydmap generated elements */ -/* %endif */ -/* end tables serialization structures and prototypes */ - -/* %ok-for-header */ - -/* Default declaration of generated scanner - a define so the user can - * easily add parameters. - */ -#ifndef YY_DECL -#define YY_DECL_IS_OURS 1 -/* %if-c-only Standard (non-C++) definition */ - -extern int yylex (void); - -#define YY_DECL int yylex (void) -/* %endif */ -/* %if-c++-only C++ definition */ -/* %endif */ -#endif /* !YY_DECL */ - -/* Code executed at the beginning of each rule, after yytext and yyleng - * have been set up. - */ -#ifndef YY_USER_ACTION -#define YY_USER_ACTION -#endif - -/* Code executed at the end of each rule. */ -#ifndef YY_BREAK -#define YY_BREAK break; -#endif - -/* %% [6.0] YY_RULE_SETUP definition goes here */ -#define YY_RULE_SETUP \ - if ( yyleng > 0 ) \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \ - (yytext[yyleng - 1] == '\n'); \ - YY_USER_ACTION - -/* %not-for-header */ - -/** The main scanner function which does all the work. - */ -YY_DECL -{ - register yy_state_type yy_current_state; - register char *yy_cp, *yy_bp; - register int yy_act; - -/* %% [7.0] user's declarations go here */ -#line 63 "scripts/genksyms/lex.l" - - - - /* Keep track of our location in the original source files. */ -#line 918 "scripts/genksyms/lex.c" - - if ( !(yy_init) ) - { - (yy_init) = 1; - -#ifdef YY_USER_INIT - YY_USER_INIT; -#endif - - if ( ! (yy_start) ) - (yy_start) = 1; /* first start state */ - - if ( ! yyin ) -/* %if-c-only */ - yyin = stdin; -/* %endif */ -/* %if-c++-only */ -/* %endif */ - - if ( ! yyout ) -/* %if-c-only */ - yyout = stdout; -/* %endif */ -/* %if-c++-only */ -/* %endif */ - - if ( ! YY_CURRENT_BUFFER ) { - yyensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); - } - - yy_load_buffer_state( ); - } - - while ( 1 ) /* loops until end-of-file is reached */ - { -/* %% [8.0] yymore()-related code goes here */ - yy_cp = (yy_c_buf_p); - - /* Support of yytext. */ - *yy_cp = (yy_hold_char); - - /* yy_bp points to the position in yy_ch_buf of the start of - * the current run. - */ - yy_bp = yy_cp; - -/* %% [9.0] code to set up and find next match goes here */ - yy_current_state = (yy_start); - yy_current_state += YY_AT_BOL(); -yy_match: - do - { - register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 73 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - ++yy_cp; - } - while ( yy_base[yy_current_state] != 266 ); - -yy_find_action: -/* %% [10.0] code to find the action number goes here */ - yy_act = yy_accept[yy_current_state]; - if ( yy_act == 0 ) - { /* have to back up */ - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - yy_act = yy_accept[yy_current_state]; - } - - YY_DO_BEFORE_ACTION; - -/* %% [11.0] code for yylineno update goes here */ - -do_action: /* This label is used only to access EOF actions. */ - -/* %% [12.0] debug code goes here */ - if ( yy_flex_debug ) - { - if ( yy_act == 0 ) - fprintf( stderr, "--scanner backing up\n" ); - else if ( yy_act < 13 ) - fprintf( stderr, "--accepting rule at line %ld (\"%s\")\n", - (long)yy_rule_linenum[yy_act], yytext ); - else if ( yy_act == 13 ) - fprintf( stderr, "--accepting default rule (\"%s\")\n", - yytext ); - else if ( yy_act == 14 ) - fprintf( stderr, "--(end of buffer or a NUL)\n" ); - else - fprintf( stderr, "--EOF (start condition %d)\n", YY_START ); - } - - switch ( yy_act ) - { /* beginning of action switch */ -/* %% [13.0] actions go here */ - case 0: /* must back up */ - /* undo the effects of YY_DO_BEFORE_ACTION */ - *yy_cp = (yy_hold_char); - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - goto yy_find_action; - -case 1: -/* rule 1 can match eol */ -YY_RULE_SETUP -#line 67 "scripts/genksyms/lex.l" -return FILENAME; - YY_BREAK -case 2: -/* rule 2 can match eol */ -YY_RULE_SETUP -#line 68 "scripts/genksyms/lex.l" -cur_line++; - YY_BREAK -case 3: -/* rule 3 can match eol */ -YY_RULE_SETUP -#line 69 "scripts/genksyms/lex.l" -cur_line++; - YY_BREAK -/* Ignore all other whitespace. */ -case 4: -YY_RULE_SETUP -#line 72 "scripts/genksyms/lex.l" -; - YY_BREAK -case 5: -/* rule 5 can match eol */ -YY_RULE_SETUP -#line 75 "scripts/genksyms/lex.l" -return STRING; - YY_BREAK -case 6: -/* rule 6 can match eol */ -YY_RULE_SETUP -#line 76 "scripts/genksyms/lex.l" -return CHAR; - YY_BREAK -case 7: -YY_RULE_SETUP -#line 77 "scripts/genksyms/lex.l" -return IDENT; - YY_BREAK -/* The Pedant requires that the other C multi-character tokens be - recognized as tokens. We don't actually use them since we don't - parse expressions, but we do want whitespace to be arranged - around them properly. */ -case 8: -YY_RULE_SETUP -#line 83 "scripts/genksyms/lex.l" -return OTHER; - YY_BREAK -case 9: -YY_RULE_SETUP -#line 84 "scripts/genksyms/lex.l" -return INT; - YY_BREAK -case 10: -YY_RULE_SETUP -#line 85 "scripts/genksyms/lex.l" -return REAL; - YY_BREAK -case 11: -YY_RULE_SETUP -#line 87 "scripts/genksyms/lex.l" -return DOTS; - YY_BREAK -/* All other tokens are single characters. */ -case 12: -YY_RULE_SETUP -#line 90 "scripts/genksyms/lex.l" -return yytext[0]; - YY_BREAK -case 13: -YY_RULE_SETUP -#line 93 "scripts/genksyms/lex.l" -ECHO; - YY_BREAK -#line 1109 "scripts/genksyms/lex.c" -case YY_STATE_EOF(INITIAL): - yyterminate(); - - case YY_END_OF_BUFFER: - { - /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; - - /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = (yy_hold_char); - YY_RESTORE_YY_MORE_OFFSET - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) - { - /* We're scanning a new file or input source. It's - * possible that this happened because the user - * just pointed yyin at a new source and called - * yylex(). If so, then we have to assure - * consistency between YY_CURRENT_BUFFER and our - * globals. Here is the right place to do so, because - * this is the first action (other than possibly a - * back-up) that will match for the new input source. - */ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; - } - - /* Note that here we test for yy_c_buf_p "<=" to the position - * of the first EOB in the buffer, since yy_c_buf_p will - * already have been incremented past the NUL character - * (since all states make transitions on EOB to the - * end-of-buffer state). Contrast this with the test - * in input(). - */ - if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - { /* This was really a NUL. */ - yy_state_type yy_next_state; - - (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - /* Okay, we're now positioned to make the NUL - * transition. We couldn't have - * yy_get_previous_state() go ahead and do it - * for us because it doesn't know how to deal - * with the possibility of jamming (and we don't - * want to build jamming into it because then it - * will run more slowly). - */ - - yy_next_state = yy_try_NUL_trans( yy_current_state ); - - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - - if ( yy_next_state ) - { - /* Consume the NUL. */ - yy_cp = ++(yy_c_buf_p); - yy_current_state = yy_next_state; - goto yy_match; - } - - else - { -/* %% [14.0] code to do back-up for compressed tables and set up yy_cp goes here */ - yy_cp = (yy_c_buf_p); - goto yy_find_action; - } - } - - else switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_END_OF_FILE: - { - (yy_did_buffer_switch_on_eof) = 0; - - if ( yywrap( ) ) - { - /* Note: because we've taken care in - * yy_get_next_buffer() to have set up - * yytext, we can now set up - * yy_c_buf_p so that if some total - * hoser (like flex itself) wants to - * call the scanner after we return the - * YY_NULL, it'll still work - another - * YY_NULL will get returned. - */ - (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; - - yy_act = YY_STATE_EOF(YY_START); - goto do_action; - } - - else - { - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; - } - break; - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = - (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_match; - - case EOB_ACT_LAST_MATCH: - (yy_c_buf_p) = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_find_action; - } - break; - } - - default: - YY_FATAL_ERROR( - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ -} /* end of yylex */ -/* %ok-for-header */ - -/* %if-c++-only */ -/* %not-for-header */ - -/* %ok-for-header */ - -/* %endif */ - -/* yy_get_next_buffer - try to read in a new buffer - * - * Returns a code representing an action: - * EOB_ACT_LAST_MATCH - - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position - * EOB_ACT_END_OF_FILE - end of file - */ -/* %if-c-only */ -static int yy_get_next_buffer (void) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; - register char *source = (yytext_ptr); - register int number_to_move, i; - int ret_val; - - if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) - YY_FATAL_ERROR( - "fatal flex scanner internal error--end of buffer missed" ); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) - { /* Don't try to fill the buffer, so this is an EOF. */ - if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) - { - /* We matched a single character, the EOB, so - * treat this as a final EOF. - */ - return EOB_ACT_END_OF_FILE; - } - - else - { - /* We matched some text prior to the EOB, first - * process it. - */ - return EOB_ACT_LAST_MATCH; - } - } - - /* Try to read more data. */ - - /* First move last chars to start of buffer. */ - number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; - - for ( i = 0; i < number_to_move; ++i ) - *(dest++) = *(source++); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) - /* don't do the read, it's not guaranteed to return an EOF, - * just force an EOF - */ - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; - - else - { - int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = YY_CURRENT_BUFFER; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { - int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; - else - b->yy_buf_size *= 2; - - b->yy_ch_buf = (char *) - /* Include room in for 2 EOB chars. */ - yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); - } - else - /* Can't grow it, we don't own it. */ - b->yy_ch_buf = 0; - - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( - "fatal error - scanner input buffer overflow" ); - - (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - - num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - - number_to_move - 1; - - } - - if ( num_to_read > YY_READ_BUF_SIZE ) - num_to_read = YY_READ_BUF_SIZE; - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), - (yy_n_chars), (size_t) num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - if ( (yy_n_chars) == 0 ) - { - if ( number_to_move == YY_MORE_ADJ ) - { - ret_val = EOB_ACT_END_OF_FILE; - yyrestart(yyin ); - } - - else - { - ret_val = EOB_ACT_LAST_MATCH; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = - YY_BUFFER_EOF_PENDING; - } - } - - else - ret_val = EOB_ACT_CONTINUE_SCAN; - - if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { - /* Extend the array by 50%, plus the number we really need. */ - yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); - if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); - } - - (yy_n_chars) += number_to_move; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - - (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; - - return ret_val; -} - -/* yy_get_previous_state - get the state just before the EOB char was reached */ - -/* %if-c-only */ -/* %not-for-header */ - - static yy_state_type yy_get_previous_state (void) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - register yy_state_type yy_current_state; - register char *yy_cp; - -/* %% [15.0] code to get the start state into yy_current_state goes here */ - yy_current_state = (yy_start); - yy_current_state += YY_AT_BOL(); - - for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) - { -/* %% [16.0] code to find the next state goes here */ - register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 73 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - } - - return yy_current_state; -} - -/* yy_try_NUL_trans - try to make a transition on the NUL character - * - * synopsis - * next_state = yy_try_NUL_trans( current_state ); - */ -/* %if-c-only */ - static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - register int yy_is_jam; - /* %% [17.0] code to find the next state, and perhaps do backing up, goes here */ - register char *yy_cp = (yy_c_buf_p); - - register YY_CHAR yy_c = 1; - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 73 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - yy_is_jam = (yy_current_state == 72); - - return yy_is_jam ? 0 : yy_current_state; -} - -/* %if-c-only */ - - static void yyunput (int c, register char * yy_bp ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - register char *yy_cp; - - yy_cp = (yy_c_buf_p); - - /* undo effects of setting up yytext */ - *yy_cp = (yy_hold_char); - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - { /* need to shift things up to make room */ - /* +2 for EOB chars. */ - register int number_to_move = (yy_n_chars) + 2; - register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ - YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; - register char *source = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; - - while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - *--dest = *--source; - - yy_cp += (int) (dest - source); - yy_bp += (int) (dest - source); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - YY_FATAL_ERROR( "flex scanner push-back overflow" ); - } - - *--yy_cp = (char) c; - -/* %% [18.0] update yylineno here */ - - (yytext_ptr) = yy_bp; - (yy_hold_char) = *yy_cp; - (yy_c_buf_p) = yy_cp; -} -/* %if-c-only */ - -/* %endif */ - -/* %if-c-only */ -#ifndef YY_NO_INPUT -#ifdef __cplusplus - static int yyinput (void) -#else - static int input (void) -#endif - -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - int c; - - *(yy_c_buf_p) = (yy_hold_char); - - if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) - { - /* yy_c_buf_p now points to the character we want to return. - * If this occurs *before* the EOB characters, then it's a - * valid NUL; if not, then we've hit the end of the buffer. - */ - if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - /* This was really a NUL. */ - *(yy_c_buf_p) = '\0'; - - else - { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_LAST_MATCH: - /* This happens because yy_g_n_b() - * sees that we've accumulated a - * token and flags that we need to - * try matching the token before - * proceeding. But for input(), - * there's no matching to consider. - * So convert the EOB_ACT_LAST_MATCH - * to EOB_ACT_END_OF_FILE. - */ - - /* Reset buffer status. */ - yyrestart(yyin ); - - /*FALLTHROUGH*/ - - case EOB_ACT_END_OF_FILE: - { - if ( yywrap( ) ) - return EOF; - - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; -#ifdef __cplusplus - return yyinput(); -#else - return input(); -#endif - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = (yytext_ptr) + offset; - break; - } - } - } - - c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ - *(yy_c_buf_p) = '\0'; /* preserve yytext */ - (yy_hold_char) = *++(yy_c_buf_p); - -/* %% [19.0] update BOL and yylineno */ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n'); - - return c; -} -/* %if-c-only */ -#endif /* ifndef YY_NO_INPUT */ -/* %endif */ - -/** Immediately switch to a different input stream. - * @param input_file A readable stream. - * - * @note This function does not reset the start condition to @c INITIAL . - */ -/* %if-c-only */ - void yyrestart (FILE * input_file ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - - if ( ! YY_CURRENT_BUFFER ){ - yyensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); - } - - yy_init_buffer(YY_CURRENT_BUFFER,input_file ); - yy_load_buffer_state( ); -} - -/** Switch to a different input buffer. - * @param new_buffer The new input buffer. - * - */ -/* %if-c-only */ - void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - - /* TODO. We should be able to replace this entire function body - * with - * yypop_buffer_state(); - * yypush_buffer_state(new_buffer); - */ - yyensure_buffer_stack (); - if ( YY_CURRENT_BUFFER == new_buffer ) - return; - - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - YY_CURRENT_BUFFER_LVALUE = new_buffer; - yy_load_buffer_state( ); - - /* We don't actually know whether we did this switch during - * EOF (yywrap()) processing, but the only time this flag - * is looked at is after yywrap() is called, so it's safe - * to go ahead and always set it. - */ - (yy_did_buffer_switch_on_eof) = 1; -} - -/* %if-c-only */ -static void yy_load_buffer_state (void) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; - yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; - (yy_hold_char) = *(yy_c_buf_p); -} - -/** Allocate and initialize an input buffer state. - * @param file A readable stream. - * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. - * - * @return the allocated buffer state. - */ -/* %if-c-only */ - YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); - - b->yy_buf_size = size; - - /* yy_ch_buf has to be 2 characters longer than the size given because - * we need to put in 2 end-of-buffer characters. - */ - b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); - - b->yy_is_our_buffer = 1; - - yy_init_buffer(b,file ); - - return b; -} - -/** Destroy the buffer. - * @param b a buffer created with yy_create_buffer() - * - */ -/* %if-c-only */ - void yy_delete_buffer (YY_BUFFER_STATE b ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - - if ( ! b ) - return; - - if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ - YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; - - if ( b->yy_is_our_buffer ) - yyfree((void *) b->yy_ch_buf ); - - yyfree((void *) b ); -} - -/* %if-c-only */ - -#ifndef __cplusplus -extern int isatty (int ); -#endif /* __cplusplus */ - -/* %endif */ - -/* %if-c++-only */ -/* %endif */ - -/* Initializes or reinitializes a buffer. - * This function is sometimes called more than once on the same buffer, - * such as during a yyrestart() or at EOF. - */ -/* %if-c-only */ - static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ - -{ - int oerrno = errno; - - yy_flush_buffer(b ); - - b->yy_input_file = file; - b->yy_fill_buffer = 1; - - /* If b is the current buffer, then yy_init_buffer was _probably_ - * called from yyrestart() or through yy_get_next_buffer. - * In that case, we don't want to reset the lineno or column. - */ - if (b != YY_CURRENT_BUFFER){ - b->yy_bs_lineno = 1; - b->yy_bs_column = 0; - } - -/* %if-c-only */ - - b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; - -/* %endif */ -/* %if-c++-only */ -/* %endif */ - errno = oerrno; -} - -/** Discard all buffered characters. On the next scan, YY_INPUT will be called. - * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. - * - */ -/* %if-c-only */ - void yy_flush_buffer (YY_BUFFER_STATE b ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - if ( ! b ) - return; - - b->yy_n_chars = 0; - - /* We always need two end-of-buffer characters. The first causes - * a transition to the end-of-buffer state. The second causes - * a jam in that state. - */ - b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; - b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; - - b->yy_buf_pos = &b->yy_ch_buf[0]; - - b->yy_at_bol = 1; - b->yy_buffer_status = YY_BUFFER_NEW; - - if ( b == YY_CURRENT_BUFFER ) - yy_load_buffer_state( ); -} - -/* %if-c-or-c++ */ -/** Pushes the new state onto the stack. The new state becomes - * the current state. This function will allocate the stack - * if necessary. - * @param new_buffer The new state. - * - */ -/* %if-c-only */ -void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - if (new_buffer == NULL) - return; - - yyensure_buffer_stack(); - - /* This block is copied from yy_switch_to_buffer. */ - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - /* Only push if top exists. Otherwise, replace top. */ - if (YY_CURRENT_BUFFER) - (yy_buffer_stack_top)++; - YY_CURRENT_BUFFER_LVALUE = new_buffer; - - /* copied from yy_switch_to_buffer. */ - yy_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; -} -/* %endif */ - -/* %if-c-or-c++ */ -/** Removes and deletes the top of the stack, if present. - * The next element becomes the new top. - * - */ -/* %if-c-only */ -void yypop_buffer_state (void) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - if (!YY_CURRENT_BUFFER) - return; - - yy_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - if ((yy_buffer_stack_top) > 0) - --(yy_buffer_stack_top); - - if (YY_CURRENT_BUFFER) { - yy_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; - } -} -/* %endif */ - -/* %if-c-or-c++ */ -/* Allocates the stack if it does not exist. - * Guarantees space for at least one push. - */ -/* %if-c-only */ -static void yyensure_buffer_stack (void) -/* %endif */ -/* %if-c++-only */ -/* %endif */ -{ - int num_to_alloc; - - if (!(yy_buffer_stack)) { - - /* First allocation is just for 2 elements, since we don't know if this - * scanner will even need a stack. We use 2 instead of 1 to avoid an - * immediate realloc on the next call. - */ - num_to_alloc = 1; - (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc - (num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); - - memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - - (yy_buffer_stack_max) = num_to_alloc; - (yy_buffer_stack_top) = 0; - return; - } - - if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ - - /* Increase the buffer to prepare for a possible push. */ - int grow_size = 8 /* arbitrary grow size */; - - num_to_alloc = (yy_buffer_stack_max) + grow_size; - (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc - ((yy_buffer_stack), - num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); - - /* zero only the new slots.*/ - memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); - (yy_buffer_stack_max) = num_to_alloc; - } -} -/* %endif */ - -/* %if-c-only */ -/** Setup the input buffer state to scan directly from a user-specified character buffer. - * @param base the character buffer - * @param size the size in bytes of the character buffer - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) -{ - YY_BUFFER_STATE b; - - if ( size < 2 || - base[size-2] != YY_END_OF_BUFFER_CHAR || - base[size-1] != YY_END_OF_BUFFER_CHAR ) - /* They forgot to leave room for the EOB's. */ - return 0; - - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); - - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ - b->yy_buf_pos = b->yy_ch_buf = base; - b->yy_is_our_buffer = 0; - b->yy_input_file = 0; - b->yy_n_chars = b->yy_buf_size; - b->yy_is_interactive = 0; - b->yy_at_bol = 1; - b->yy_fill_buffer = 0; - b->yy_buffer_status = YY_BUFFER_NEW; - - yy_switch_to_buffer(b ); - - return b; -} -/* %endif */ - -/* %if-c-only */ -/** Setup the input buffer state to scan a string. The next call to yylex() will - * scan from a @e copy of @a str. - * @param yystr a NUL-terminated string to scan - * - * @return the newly allocated buffer state object. - * @note If you want to scan bytes that may contain NUL values, then use - * yy_scan_bytes() instead. - */ -YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) -{ - - return yy_scan_bytes(yystr,strlen(yystr) ); -} -/* %endif */ - -/* %if-c-only */ -/** Setup the input buffer state to scan the given bytes. The next call to yylex() will - * scan from a @e copy of @a bytes. - * @param bytes the byte buffer to scan - * @param len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) -{ - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; - int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = _yybytes_len + 2; - buf = (char *) yyalloc(n ); - if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); - - for ( i = 0; i < _yybytes_len; ++i ) - buf[i] = yybytes[i]; - - buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - - b = yy_scan_buffer(buf,n ); - if ( ! b ) - YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); - - /* It's okay to grow etc. this buffer, and we should throw it - * away when we're done. - */ - b->yy_is_our_buffer = 1; - - return b; -} -/* %endif */ - -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif - -/* %if-c-only */ -static void yy_fatal_error (yyconst char* msg ) -{ - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); -} -/* %endif */ -/* %if-c++-only */ -/* %endif */ - -/* Redefine yyless() so it works in section 3 code. */ - -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up yytext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - yytext[yyleng] = (yy_hold_char); \ - (yy_c_buf_p) = yytext + yyless_macro_arg; \ - (yy_hold_char) = *(yy_c_buf_p); \ - *(yy_c_buf_p) = '\0'; \ - yyleng = yyless_macro_arg; \ - } \ - while ( 0 ) - -/* Accessor methods (get/set functions) to struct members. */ - -/* %if-c-only */ -/* %if-reentrant */ -/* %endif */ - -/** Get the current line number. - * - */ -int yyget_lineno (void) -{ - - return yylineno; -} - -/** Get the input stream. - * - */ -FILE *yyget_in (void) -{ - return yyin; -} - -/** Get the output stream. - * - */ -FILE *yyget_out (void) -{ - return yyout; -} - -/** Get the length of the current token. - * - */ -int yyget_leng (void) -{ - return yyleng; -} - -/** Get the current token. - * - */ - -char *yyget_text (void) -{ - return yytext; -} - -/* %if-reentrant */ -/* %endif */ - -/** Set the current line number. - * @param line_number - * - */ -void yyset_lineno (int line_number ) -{ - - yylineno = line_number; -} - -/** Set the input stream. This does not discard the current - * input buffer. - * @param in_str A readable stream. - * - * @see yy_switch_to_buffer - */ -void yyset_in (FILE * in_str ) -{ - yyin = in_str ; -} - -void yyset_out (FILE * out_str ) -{ - yyout = out_str ; -} - -int yyget_debug (void) -{ - return yy_flex_debug; -} - -void yyset_debug (int bdebug ) -{ - yy_flex_debug = bdebug ; -} - -/* %endif */ - -/* %if-reentrant */ -/* %if-bison-bridge */ -/* %endif */ -/* %endif if-c-only */ - -/* %if-c-only */ -static int yy_init_globals (void) -{ - /* Initialization is the same as for the non-reentrant scanner. - * This function is called from yylex_destroy(), so don't allocate here. - */ - - (yy_buffer_stack) = 0; - (yy_buffer_stack_top) = 0; - (yy_buffer_stack_max) = 0; - (yy_c_buf_p) = (char *) 0; - (yy_init) = 0; - (yy_start) = 0; - -/* Defined in main.c */ -#ifdef YY_STDINIT - yyin = stdin; - yyout = stdout; -#else - yyin = (FILE *) 0; - yyout = (FILE *) 0; -#endif - - /* For future reference: Set errno on error, since we are called by - * yylex_init() - */ - return 0; -} -/* %endif */ - -/* %if-c-only SNIP! this currently causes conflicts with the c++ scanner */ -/* yylex_destroy is for both reentrant and non-reentrant scanners. */ -int yylex_destroy (void) -{ - - /* Pop the buffer stack, destroying each element. */ - while(YY_CURRENT_BUFFER){ - yy_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - yypop_buffer_state(); - } - - /* Destroy the stack itself. */ - yyfree((yy_buffer_stack) ); - (yy_buffer_stack) = NULL; - - /* Reset the globals. This is important in a non-reentrant scanner so the next time - * yylex() is called, initialization will occur. */ - yy_init_globals( ); - -/* %if-reentrant */ -/* %endif */ - return 0; -} -/* %endif */ - -/* - * Internal utility routines. - */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) -{ - register int i; - for ( i = 0; i < n; ++i ) - s1[i] = s2[i]; -} -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) -{ - register int n; - for ( n = 0; s[n]; ++n ) - ; - - return n; -} -#endif - -void *yyalloc (yy_size_t size ) -{ - return (void *) malloc( size ); -} - -void *yyrealloc (void * ptr, yy_size_t size ) -{ - /* The cast to (char *) in the following accommodates both - * implementations that use char* generic pointers, and those - * that use void* generic pointers. It works with the latter - * because both ANSI C and C++ allow castless assignment from - * any pointer type to void*, and deal with argument conversions - * as though doing an assignment. - */ - return (void *) realloc( (char *) ptr, size ); -} - -void yyfree (void * ptr ) -{ - free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ -} - -/* %if-tables-serialization definitions */ -/* %define-yytables The name for this specific scanner's tables. */ -#define YYTABLES_NAME "yytables" -/* %endif */ - -/* %ok-for-header */ - -#line 93 "scripts/genksyms/lex.l" - - - -/* Bring in the keyword recognizer. */ - -#include "keywords.c" - - -/* Macros to append to our phrase collection list. */ - -/* - * We mark any token, that that equals to a known enumerator, as - * SYM_ENUM_CONST. The parser will change this for struct and union tags later, - * the only problem is struct and union members: - * enum e { a, b }; struct s { int a, b; } - * but in this case, the only effect will be, that the ABI checksums become - * more volatile, which is acceptable. Also, such collisions are quite rare, - * so far it was only observed in include/linux/telephony.h. - */ -#define _APP(T,L) do { \ - cur_node = next_node; \ - next_node = xmalloc(sizeof(*next_node)); \ - next_node->next = cur_node; \ - cur_node->string = memcpy(xmalloc(L+1), T, L+1); \ - cur_node->tag = \ - find_symbol(cur_node->string, SYM_ENUM_CONST, 1)?\ - SYM_ENUM_CONST : SYM_NORMAL ; \ - } while (0) - -#define APP _APP(yytext, yyleng) - - -/* The second stage lexer. Here we incorporate knowledge of the state - of the parser to tailor the tokens that are returned. */ - -int -yylex(void) -{ - static enum { - ST_NOTSTARTED, ST_NORMAL, ST_ATTRIBUTE, ST_ASM, ST_BRACKET, ST_BRACE, - ST_EXPRESSION, ST_TABLE_1, ST_TABLE_2, ST_TABLE_3, ST_TABLE_4, - ST_TABLE_5, ST_TABLE_6 - } lexstate = ST_NOTSTARTED; - - static int suppress_type_lookup, dont_want_brace_phrase; - static struct string_list *next_node; - - int token, count = 0; - struct string_list *cur_node; - - if (lexstate == ST_NOTSTARTED) - { - next_node = xmalloc(sizeof(*next_node)); - next_node->next = NULL; - lexstate = ST_NORMAL; - } - -repeat: - token = yylex1(); - - if (token == 0) - return 0; - else if (token == FILENAME) - { - char *file, *e; - - /* Save the filename and line number for later error messages. */ - - if (cur_filename) - free(cur_filename); - - file = strchr(yytext, '\"')+1; - e = strchr(file, '\"'); - *e = '\0'; - cur_filename = memcpy(xmalloc(e-file+1), file, e-file+1); - cur_line = atoi(yytext+2); - - goto repeat; - } - - switch (lexstate) - { - case ST_NORMAL: - switch (token) - { - case IDENT: - APP; - { - const struct resword *r = is_reserved_word(yytext, yyleng); - if (r) - { - switch (token = r->token) - { - case ATTRIBUTE_KEYW: - lexstate = ST_ATTRIBUTE; - count = 0; - goto repeat; - case ASM_KEYW: - lexstate = ST_ASM; - count = 0; - goto repeat; - - case STRUCT_KEYW: - case UNION_KEYW: - case ENUM_KEYW: - dont_want_brace_phrase = 3; - suppress_type_lookup = 2; - goto fini; - - case EXPORT_SYMBOL_KEYW: - goto fini; - } - } - if (!suppress_type_lookup) - { - if (find_symbol(yytext, SYM_TYPEDEF, 1)) - token = TYPE; - } - } - break; - - case '[': - APP; - lexstate = ST_BRACKET; - count = 1; - goto repeat; - - case '{': - APP; - if (dont_want_brace_phrase) - break; - lexstate = ST_BRACE; - count = 1; - goto repeat; - - case '=': case ':': - APP; - lexstate = ST_EXPRESSION; - break; - - case DOTS: - default: - APP; - break; - } - break; - - case ST_ATTRIBUTE: - APP; - switch (token) - { - case '(': - ++count; - goto repeat; - case ')': - if (--count == 0) - { - lexstate = ST_NORMAL; - token = ATTRIBUTE_PHRASE; - break; - } - goto repeat; - default: - goto repeat; - } - break; - - case ST_ASM: - APP; - switch (token) - { - case '(': - ++count; - goto repeat; - case ')': - if (--count == 0) - { - lexstate = ST_NORMAL; - token = ASM_PHRASE; - break; - } - goto repeat; - default: - goto repeat; - } - break; - - case ST_BRACKET: - APP; - switch (token) - { - case '[': - ++count; - goto repeat; - case ']': - if (--count == 0) - { - lexstate = ST_NORMAL; - token = BRACKET_PHRASE; - break; - } - goto repeat; - default: - goto repeat; - } - break; - - case ST_BRACE: - APP; - switch (token) - { - case '{': - ++count; - goto repeat; - case '}': - if (--count == 0) - { - lexstate = ST_NORMAL; - token = BRACE_PHRASE; - break; - } - goto repeat; - default: - goto repeat; - } - break; - - case ST_EXPRESSION: - switch (token) - { - case '(': case '[': case '{': - ++count; - APP; - goto repeat; - case '}': - /* is this the last line of an enum declaration? */ - if (count == 0) - { - /* Put back the token we just read so's we can find it again - after registering the expression. */ - unput(token); - - lexstate = ST_NORMAL; - token = EXPRESSION_PHRASE; - break; - } - /* FALLTHRU */ - case ')': case ']': - --count; - APP; - goto repeat; - case ',': case ';': - if (count == 0) - { - /* Put back the token we just read so's we can find it again - after registering the expression. */ - unput(token); - - lexstate = ST_NORMAL; - token = EXPRESSION_PHRASE; - break; - } - APP; - goto repeat; - default: - APP; - goto repeat; - } - break; - - case ST_TABLE_1: - goto repeat; - - case ST_TABLE_2: - if (token == IDENT && yyleng == 1 && yytext[0] == 'X') - { - token = EXPORT_SYMBOL_KEYW; - lexstate = ST_TABLE_5; - APP; - break; - } - lexstate = ST_TABLE_6; - /* FALLTHRU */ - - case ST_TABLE_6: - switch (token) - { - case '{': case '[': case '(': - ++count; - break; - case '}': case ']': case ')': - --count; - break; - case ',': - if (count == 0) - lexstate = ST_TABLE_2; - break; - }; - goto repeat; - - case ST_TABLE_3: - goto repeat; - - case ST_TABLE_4: - if (token == ';') - lexstate = ST_NORMAL; - goto repeat; - - case ST_TABLE_5: - switch (token) - { - case ',': - token = ';'; - lexstate = ST_TABLE_2; - APP; - break; - default: - APP; - break; - } - break; - - default: - exit(1); - } -fini: - - if (suppress_type_lookup > 0) - --suppress_type_lookup; - if (dont_want_brace_phrase > 0) - --dont_want_brace_phrase; - - yylval = &next_node->next; - - return token; -} - diff --git a/scripts/genksyms/lex.lex.c_shipped b/scripts/genksyms/lex.lex.c_shipped new file mode 100644 index 0000000..c83cf60 --- /dev/null +++ b/scripts/genksyms/lex.lex.c_shipped @@ -0,0 +1,2237 @@ + +#line 3 "scripts/genksyms/lex.lex.c_shipped" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE yyrestart(yyin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +extern int yyleng; + +extern FILE *yyin, *yyout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up yytext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + int yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via yyrestart()), so that the user can continue scanning by + * just pointing yyin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when yytext is formed. */ +static char yy_hold_char; +static int yy_n_chars; /* number of characters read into yy_ch_buf */ +int yyleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow yywrap()'s to do buffer switches + * instead of setting up a fresh yyin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void yyrestart (FILE *input_file ); +void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); +void yy_delete_buffer (YY_BUFFER_STATE b ); +void yy_flush_buffer (YY_BUFFER_STATE b ); +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); +void yypop_buffer_state (void ); + +static void yyensure_buffer_stack (void ); +static void yy_load_buffer_state (void ); +static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); + +void *yyalloc (yy_size_t ); +void *yyrealloc (void *,yy_size_t ); +void yyfree (void * ); + +#define yy_new_buffer yy_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + yyensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + yy_create_buffer(yyin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +#define yywrap(n) 1 +#define YY_SKIP_YYWRAP + +typedef unsigned char YY_CHAR; + +FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; + +typedef int yy_state_type; + +extern int yylineno; + +int yylineno = 1; + +extern char *yytext; +#define yytext_ptr yytext + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up yytext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + yyleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 13 +#define YY_END_OF_BUFFER 14 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[73] = + { 0, + 0, 0, 14, 12, 4, 3, 12, 7, 12, 12, + 12, 12, 12, 9, 9, 12, 12, 7, 12, 12, + 4, 0, 5, 0, 7, 8, 0, 6, 0, 0, + 10, 10, 9, 0, 0, 9, 9, 0, 9, 0, + 0, 0, 0, 2, 0, 0, 11, 0, 10, 0, + 10, 9, 9, 0, 0, 0, 10, 10, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 1, 0 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 2, 1, 5, 6, 7, 8, 9, 10, 1, + 1, 8, 11, 1, 12, 13, 8, 14, 15, 15, + 15, 15, 15, 15, 15, 16, 16, 1, 1, 17, + 18, 19, 1, 1, 20, 20, 20, 20, 21, 22, + 7, 7, 7, 7, 7, 23, 7, 7, 7, 7, + 7, 7, 7, 7, 24, 7, 7, 25, 7, 7, + 1, 26, 1, 8, 7, 1, 20, 20, 20, 20, + + 21, 22, 7, 7, 7, 7, 7, 27, 7, 7, + 7, 7, 7, 7, 7, 7, 24, 7, 7, 25, + 7, 7, 1, 28, 1, 8, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +static yyconst flex_int32_t yy_meta[29] = + { 0, + 1, 1, 2, 1, 1, 1, 3, 1, 1, 1, + 4, 4, 5, 6, 6, 6, 1, 1, 1, 7, + 8, 7, 3, 3, 3, 1, 3, 1 + } ; + +static yyconst flex_int16_t yy_base[85] = + { 0, + 0, 145, 150, 266, 27, 266, 25, 0, 131, 23, + 23, 16, 23, 39, 31, 25, 39, 60, 22, 65, + 57, 43, 266, 0, 0, 266, 61, 266, 0, 128, + 74, 0, 113, 59, 62, 113, 52, 0, 0, 72, + 66, 110, 100, 266, 73, 74, 266, 70, 266, 90, + 103, 266, 84, 129, 108, 113, 143, 266, 107, 66, + 118, 137, 168, 120, 80, 91, 145, 143, 83, 41, + 266, 266, 190, 196, 204, 212, 220, 228, 232, 237, + 238, 243, 249, 257 + } ; + +static yyconst flex_int16_t yy_def[85] = + { 0, + 72, 1, 72, 72, 72, 72, 73, 74, 72, 72, + 75, 72, 72, 72, 14, 72, 72, 74, 72, 76, + 72, 73, 72, 77, 74, 72, 75, 72, 78, 72, + 72, 31, 14, 79, 80, 72, 72, 81, 15, 73, + 75, 76, 76, 72, 73, 75, 72, 82, 72, 72, + 72, 72, 81, 76, 54, 72, 72, 72, 76, 54, + 76, 76, 76, 54, 83, 76, 63, 83, 84, 84, + 72, 0, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 72, 72, 72 + } ; + +static yyconst flex_int16_t yy_nxt[295] = + { 0, + 4, 5, 6, 5, 7, 4, 8, 9, 10, 11, + 9, 12, 13, 14, 15, 15, 16, 9, 17, 8, + 8, 8, 18, 8, 8, 4, 8, 19, 21, 23, + 21, 26, 28, 26, 26, 30, 31, 31, 31, 26, + 26, 26, 26, 71, 39, 39, 39, 23, 29, 26, + 24, 32, 33, 33, 34, 72, 26, 26, 21, 35, + 21, 36, 37, 38, 40, 36, 43, 44, 24, 41, + 28, 32, 50, 50, 52, 28, 23, 23, 52, 35, + 56, 56, 44, 28, 42, 71, 29, 31, 31, 31, + 42, 29, 59, 44, 48, 49, 49, 24, 24, 29, + + 49, 43, 44, 51, 51, 51, 36, 37, 59, 44, + 36, 65, 44, 54, 55, 55, 51, 51, 51, 59, + 44, 64, 64, 64, 58, 58, 57, 57, 57, 58, + 59, 44, 42, 64, 64, 64, 52, 72, 59, 44, + 47, 66, 60, 60, 42, 44, 59, 69, 26, 72, + 20, 61, 62, 63, 72, 61, 57, 57, 57, 66, + 72, 72, 72, 66, 49, 49, 72, 61, 62, 49, + 44, 61, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 67, 67, 67, 72, 72, 72, 67, 67, 67, + 22, 22, 22, 22, 22, 22, 22, 22, 25, 72, + + 72, 25, 25, 25, 27, 27, 27, 27, 27, 27, + 27, 27, 42, 42, 42, 42, 42, 42, 42, 42, + 45, 72, 45, 45, 45, 45, 45, 45, 46, 72, + 46, 46, 46, 46, 46, 46, 34, 34, 72, 34, + 51, 72, 51, 53, 53, 53, 57, 72, 57, 68, + 68, 68, 68, 68, 68, 68, 68, 70, 70, 70, + 70, 70, 70, 70, 70, 3, 72, 72, 72, 72, + 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 72, 72, 72 + + } ; + +static yyconst flex_int16_t yy_chk[295] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 5, 7, + 5, 10, 11, 12, 12, 13, 13, 13, 13, 19, + 10, 16, 16, 70, 15, 15, 15, 22, 11, 19, + 7, 14, 14, 14, 14, 15, 17, 17, 21, 14, + 21, 14, 14, 14, 18, 14, 20, 20, 22, 18, + 27, 34, 35, 35, 37, 41, 40, 45, 37, 34, + 48, 48, 65, 46, 65, 69, 27, 31, 31, 31, + 60, 41, 66, 66, 31, 31, 31, 40, 45, 46, + + 31, 43, 43, 50, 50, 50, 53, 53, 59, 59, + 53, 59, 42, 43, 43, 43, 51, 51, 51, 61, + 61, 55, 55, 55, 51, 51, 56, 56, 56, 51, + 54, 54, 55, 64, 64, 64, 36, 33, 62, 62, + 30, 61, 54, 54, 64, 68, 67, 68, 9, 3, + 2, 54, 54, 54, 0, 54, 57, 57, 57, 62, + 0, 0, 0, 62, 57, 57, 0, 67, 67, 57, + 63, 67, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 63, 63, 63, 0, 0, 0, 63, 63, 63, + 73, 73, 73, 73, 73, 73, 73, 73, 74, 0, + + 0, 74, 74, 74, 75, 75, 75, 75, 75, 75, + 75, 75, 76, 76, 76, 76, 76, 76, 76, 76, + 77, 0, 77, 77, 77, 77, 77, 77, 78, 0, + 78, 78, 78, 78, 78, 78, 79, 79, 0, 79, + 80, 0, 80, 81, 81, 81, 82, 0, 82, 83, + 83, 83, 83, 83, 83, 83, 83, 84, 84, 84, + 84, 84, 84, 84, 84, 72, 72, 72, 72, 72, + 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 72, 72, 72, 72, 72, 72, 72, 72, 72, + 72, 72, 72, 72 + + } ; + +static yy_state_type yy_last_accepting_state; +static char *yy_last_accepting_cpos; + +extern int yy_flex_debug; +int yy_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *yytext; +/* Lexical analysis for genksyms. + Copyright 1996, 1997 Linux International. + + New implementation contributed by Richard Henderson + Based on original work by Bjorn Ekwall + + Taken from Linux modutils 2.4.22. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2 of the License, or (at your + option) any later version. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include +#include +#include +#include + +#include "genksyms.h" +#include "parse.tab.h" + +/* We've got a two-level lexer here. We let flex do basic tokenization + and then we categorize those basic tokens in the second stage. */ +#define YY_DECL static int yylex1(void) + +/* We don't do multiple input files. */ +#define YY_NO_INPUT 1 + +#define INITIAL 0 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int yylex_destroy (void ); + +int yyget_debug (void ); + +void yyset_debug (int debug_flag ); + +YY_EXTRA_TYPE yyget_extra (void ); + +void yyset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *yyget_in (void ); + +void yyset_in (FILE * in_str ); + +FILE *yyget_out (void ); + +void yyset_out (FILE * out_str ); + +int yyget_leng (void ); + +char *yyget_text (void ); + +int yyget_lineno (void ); + +void yyset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int yywrap (void ); +#else +extern int yywrap (void ); +#endif +#endif + + static void yyunput (int c,char *buf_ptr ); + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ + unsigned n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ + if ( c == '\n' ) \ + buf[n++] = (char) c; \ + if ( c == EOF && ferror( yyin ) ) \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + result = n; \ + } \ + else \ + { \ + errno=0; \ + while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(yyin); \ + } \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int yylex (void); + +#define YY_DECL int yylex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after yytext and yyleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + if ( yyleng > 0 ) \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \ + (yytext[yyleng - 1] == '\n'); \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + + /* Keep track of our location in the original source files. */ + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! yyin ) + yyin = stdin; + + if ( ! yyout ) + yyout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of yytext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); + yy_current_state += YY_AT_BOL(); +yy_match: + do + { + register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 73 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + ++yy_cp; + } + while ( yy_base[yy_current_state] != 266 ); + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + if ( yy_act == 0 ) + { /* have to back up */ + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + yy_act = yy_accept[yy_current_state]; + } + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ + case 0: /* must back up */ + /* undo the effects of YY_DO_BEFORE_ACTION */ + *yy_cp = (yy_hold_char); + yy_cp = (yy_last_accepting_cpos); + yy_current_state = (yy_last_accepting_state); + goto yy_find_action; + +case 1: +/* rule 1 can match eol */ +YY_RULE_SETUP +return FILENAME; + YY_BREAK +case 2: +/* rule 2 can match eol */ +YY_RULE_SETUP +cur_line++; + YY_BREAK +case 3: +/* rule 3 can match eol */ +YY_RULE_SETUP +cur_line++; + YY_BREAK +/* Ignore all other whitespace. */ +case 4: +YY_RULE_SETUP +; + YY_BREAK +case 5: +/* rule 5 can match eol */ +YY_RULE_SETUP +return STRING; + YY_BREAK +case 6: +/* rule 6 can match eol */ +YY_RULE_SETUP +return CHAR; + YY_BREAK +case 7: +YY_RULE_SETUP +return IDENT; + YY_BREAK +/* The Pedant requires that the other C multi-character tokens be + recognized as tokens. We don't actually use them since we don't + parse expressions, but we do want whitespace to be arranged + around them properly. */ +case 8: +YY_RULE_SETUP +return OTHER; + YY_BREAK +case 9: +YY_RULE_SETUP +return INT; + YY_BREAK +case 10: +YY_RULE_SETUP +return REAL; + YY_BREAK +case 11: +YY_RULE_SETUP +return DOTS; + YY_BREAK +/* All other tokens are single characters. */ +case 12: +YY_RULE_SETUP +return yytext[0]; + YY_BREAK +case 13: +YY_RULE_SETUP +ECHO; + YY_BREAK +case YY_STATE_EOF(INITIAL): + yyterminate(); + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed yyin at a new source and called + * yylex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( yywrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * yytext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of yylex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + int num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + int new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), (size_t) num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + yyrestart(yyin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + yy_current_state += YY_AT_BOL(); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 73 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + register char *yy_cp = (yy_c_buf_p); + + register YY_CHAR yy_c = 1; + if ( yy_accept[yy_current_state] ) + { + (yy_last_accepting_state) = yy_current_state; + (yy_last_accepting_cpos) = yy_cp; + } + while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) + { + yy_current_state = (int) yy_def[yy_current_state]; + if ( yy_current_state >= 73 ) + yy_c = yy_meta[(unsigned int) yy_c]; + } + yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; + yy_is_jam = (yy_current_state == 72); + + return yy_is_jam ? 0 : yy_current_state; +} + + static void yyunput (int c, register char * yy_bp ) +{ + register char *yy_cp; + + yy_cp = (yy_c_buf_p); + + /* undo effects of setting up yytext */ + *yy_cp = (yy_hold_char); + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + { /* need to shift things up to make room */ + /* +2 for EOB chars. */ + register int number_to_move = (yy_n_chars) + 2; + register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; + register char *source = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; + + while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + *--dest = *--source; + + yy_cp += (int) (dest - source); + yy_bp += (int) (dest - source); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + YY_FATAL_ERROR( "flex scanner push-back overflow" ); + } + + *--yy_cp = (char) c; + + (yytext_ptr) = yy_bp; + (yy_hold_char) = *yy_cp; + (yy_c_buf_p) = yy_cp; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + int offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + yyrestart(yyin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( yywrap( ) ) + return EOF; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve yytext */ + (yy_hold_char) = *++(yy_c_buf_p); + + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n'); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void yyrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + yyensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + yy_create_buffer(yyin,YY_BUF_SIZE ); + } + + yy_init_buffer(YY_CURRENT_BUFFER,input_file ); + yy_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * yypop_buffer_state(); + * yypush_buffer_state(new_buffer); + */ + yyensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + yy_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (yywrap()) processing, but the only time this flag + * is looked at is after yywrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void yy_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + yy_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with yy_create_buffer() + * + */ + void yy_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + yyfree((void *) b->yy_ch_buf ); + + yyfree((void *) b ); +} + +#ifndef __cplusplus +extern int isatty (int ); +#endif /* __cplusplus */ + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a yyrestart() or at EOF. + */ + static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + yy_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then yy_init_buffer was _probably_ + * called from yyrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void yy_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + yy_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + yyensure_buffer_stack(); + + /* This block is copied from yy_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from yy_switch_to_buffer. */ + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void yypop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + yy_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void yyensure_buffer_stack (void) +{ + int num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + yy_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to yylex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * yy_scan_bytes() instead. + */ +YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) +{ + + return yy_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n; + int i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) yyalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = yy_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up yytext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + yytext[yyleng] = (yy_hold_char); \ + (yy_c_buf_p) = yytext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + yyleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int yyget_lineno (void) +{ + + return yylineno; +} + +/** Get the input stream. + * + */ +FILE *yyget_in (void) +{ + return yyin; +} + +/** Get the output stream. + * + */ +FILE *yyget_out (void) +{ + return yyout; +} + +/** Get the length of the current token. + * + */ +int yyget_leng (void) +{ + return yyleng; +} + +/** Get the current token. + * + */ + +char *yyget_text (void) +{ + return yytext; +} + +/** Set the current line number. + * @param line_number + * + */ +void yyset_lineno (int line_number ) +{ + + yylineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see yy_switch_to_buffer + */ +void yyset_in (FILE * in_str ) +{ + yyin = in_str ; +} + +void yyset_out (FILE * out_str ) +{ + yyout = out_str ; +} + +int yyget_debug (void) +{ + return yy_flex_debug; +} + +void yyset_debug (int bdebug ) +{ + yy_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from yylex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + yyin = stdin; + yyout = stdout; +#else + yyin = (FILE *) 0; + yyout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * yylex_init() + */ + return 0; +} + +/* yylex_destroy is for both reentrant and non-reentrant scanners. */ +int yylex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + yy_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + yypop_buffer_state(); + } + + /* Destroy the stack itself. */ + yyfree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * yylex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *yyalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *yyrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void yyfree (void * ptr ) +{ + free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +/* Bring in the keyword recognizer. */ + +#include "keywords.hash.c" + +/* Macros to append to our phrase collection list. */ + +/* + * We mark any token, that that equals to a known enumerator, as + * SYM_ENUM_CONST. The parser will change this for struct and union tags later, + * the only problem is struct and union members: + * enum e { a, b }; struct s { int a, b; } + * but in this case, the only effect will be, that the ABI checksums become + * more volatile, which is acceptable. Also, such collisions are quite rare, + * so far it was only observed in include/linux/telephony.h. + */ +#define _APP(T,L) do { \ + cur_node = next_node; \ + next_node = xmalloc(sizeof(*next_node)); \ + next_node->next = cur_node; \ + cur_node->string = memcpy(xmalloc(L+1), T, L+1); \ + cur_node->tag = \ + find_symbol(cur_node->string, SYM_ENUM_CONST, 1)?\ + SYM_ENUM_CONST : SYM_NORMAL ; \ + } while (0) + +#define APP _APP(yytext, yyleng) + +/* The second stage lexer. Here we incorporate knowledge of the state + of the parser to tailor the tokens that are returned. */ + +int +yylex(void) +{ + static enum { + ST_NOTSTARTED, ST_NORMAL, ST_ATTRIBUTE, ST_ASM, ST_BRACKET, ST_BRACE, + ST_EXPRESSION, ST_TABLE_1, ST_TABLE_2, ST_TABLE_3, ST_TABLE_4, + ST_TABLE_5, ST_TABLE_6 + } lexstate = ST_NOTSTARTED; + + static int suppress_type_lookup, dont_want_brace_phrase; + static struct string_list *next_node; + + int token, count = 0; + struct string_list *cur_node; + + if (lexstate == ST_NOTSTARTED) + { + next_node = xmalloc(sizeof(*next_node)); + next_node->next = NULL; + lexstate = ST_NORMAL; + } + +repeat: + token = yylex1(); + + if (token == 0) + return 0; + else if (token == FILENAME) + { + char *file, *e; + + /* Save the filename and line number for later error messages. */ + + if (cur_filename) + free(cur_filename); + + file = strchr(yytext, '\"')+1; + e = strchr(file, '\"'); + *e = '\0'; + cur_filename = memcpy(xmalloc(e-file+1), file, e-file+1); + cur_line = atoi(yytext+2); + + goto repeat; + } + + switch (lexstate) + { + case ST_NORMAL: + switch (token) + { + case IDENT: + APP; + { + const struct resword *r = is_reserved_word(yytext, yyleng); + if (r) + { + switch (token = r->token) + { + case ATTRIBUTE_KEYW: + lexstate = ST_ATTRIBUTE; + count = 0; + goto repeat; + case ASM_KEYW: + lexstate = ST_ASM; + count = 0; + goto repeat; + + case STRUCT_KEYW: + case UNION_KEYW: + case ENUM_KEYW: + dont_want_brace_phrase = 3; + suppress_type_lookup = 2; + goto fini; + + case EXPORT_SYMBOL_KEYW: + goto fini; + } + } + if (!suppress_type_lookup) + { + if (find_symbol(yytext, SYM_TYPEDEF, 1)) + token = TYPE; + } + } + break; + + case '[': + APP; + lexstate = ST_BRACKET; + count = 1; + goto repeat; + + case '{': + APP; + if (dont_want_brace_phrase) + break; + lexstate = ST_BRACE; + count = 1; + goto repeat; + + case '=': case ':': + APP; + lexstate = ST_EXPRESSION; + break; + + case DOTS: + default: + APP; + break; + } + break; + + case ST_ATTRIBUTE: + APP; + switch (token) + { + case '(': + ++count; + goto repeat; + case ')': + if (--count == 0) + { + lexstate = ST_NORMAL; + token = ATTRIBUTE_PHRASE; + break; + } + goto repeat; + default: + goto repeat; + } + break; + + case ST_ASM: + APP; + switch (token) + { + case '(': + ++count; + goto repeat; + case ')': + if (--count == 0) + { + lexstate = ST_NORMAL; + token = ASM_PHRASE; + break; + } + goto repeat; + default: + goto repeat; + } + break; + + case ST_BRACKET: + APP; + switch (token) + { + case '[': + ++count; + goto repeat; + case ']': + if (--count == 0) + { + lexstate = ST_NORMAL; + token = BRACKET_PHRASE; + break; + } + goto repeat; + default: + goto repeat; + } + break; + + case ST_BRACE: + APP; + switch (token) + { + case '{': + ++count; + goto repeat; + case '}': + if (--count == 0) + { + lexstate = ST_NORMAL; + token = BRACE_PHRASE; + break; + } + goto repeat; + default: + goto repeat; + } + break; + + case ST_EXPRESSION: + switch (token) + { + case '(': case '[': case '{': + ++count; + APP; + goto repeat; + case '}': + /* is this the last line of an enum declaration? */ + if (count == 0) + { + /* Put back the token we just read so's we can find it again + after registering the expression. */ + unput(token); + + lexstate = ST_NORMAL; + token = EXPRESSION_PHRASE; + break; + } + /* FALLTHRU */ + case ')': case ']': + --count; + APP; + goto repeat; + case ',': case ';': + if (count == 0) + { + /* Put back the token we just read so's we can find it again + after registering the expression. */ + unput(token); + + lexstate = ST_NORMAL; + token = EXPRESSION_PHRASE; + break; + } + APP; + goto repeat; + default: + APP; + goto repeat; + } + break; + + case ST_TABLE_1: + goto repeat; + + case ST_TABLE_2: + if (token == IDENT && yyleng == 1 && yytext[0] == 'X') + { + token = EXPORT_SYMBOL_KEYW; + lexstate = ST_TABLE_5; + APP; + break; + } + lexstate = ST_TABLE_6; + /* FALLTHRU */ + + case ST_TABLE_6: + switch (token) + { + case '{': case '[': case '(': + ++count; + break; + case '}': case ']': case ')': + --count; + break; + case ',': + if (count == 0) + lexstate = ST_TABLE_2; + break; + }; + goto repeat; + + case ST_TABLE_3: + goto repeat; + + case ST_TABLE_4: + if (token == ';') + lexstate = ST_NORMAL; + goto repeat; + + case ST_TABLE_5: + switch (token) + { + case ',': + token = ';'; + lexstate = ST_TABLE_2; + APP; + break; + default: + APP; + break; + } + break; + + default: + exit(1); + } +fini: + + if (suppress_type_lookup > 0) + --suppress_type_lookup; + if (dont_want_brace_phrase > 0) + --dont_want_brace_phrase; + + yylval = &next_node->next; + + return token; +} + diff --git a/scripts/genksyms/parse.c_shipped b/scripts/genksyms/parse.c_shipped deleted file mode 100644 index 1a0b860..0000000 --- a/scripts/genksyms/parse.c_shipped +++ /dev/null @@ -1,2520 +0,0 @@ - -/* A Bison parser, made by GNU Bison 2.4.1. */ - -/* Skeleton implementation for Bison's Yacc-like parsers in C - - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . */ - -/* As a special exception, you may create a larger work that contains - part or all of the Bison parser skeleton and distribute that work - under terms of your choice, so long as that work isn't itself a - parser generator using the skeleton or a modified version thereof - as a parser skeleton. Alternatively, if you modify or redistribute - the parser skeleton itself, you may (at your option) remove this - special exception, which will cause the skeleton and the resulting - Bison output files to be licensed under the GNU General Public - License without this special exception. - - This special exception was added by the Free Software Foundation in - version 2.2 of Bison. */ - -/* C LALR(1) parser skeleton written by Richard Stallman, by - simplifying the original so-called "semantic" parser. */ - -/* All symbols defined below should begin with yy or YY, to avoid - infringing on user name space. This should be done even for local - variables, as they might otherwise be expanded by user macros. - There are some unavoidable exceptions within include files to - define necessary library symbols; they are noted "INFRINGES ON - USER NAME SPACE" below. */ - -/* Identify Bison output. */ -#define YYBISON 1 - -/* Bison version. */ -#define YYBISON_VERSION "2.4.1" - -/* Skeleton name. */ -#define YYSKELETON_NAME "yacc.c" - -/* Pure parsers. */ -#define YYPURE 0 - -/* Push parsers. */ -#define YYPUSH 0 - -/* Pull parsers. */ -#define YYPULL 1 - -/* Using locations. */ -#define YYLSP_NEEDED 0 - - - -/* Copy the first part of user declarations. */ - -/* Line 189 of yacc.c */ -#line 24 "scripts/genksyms/parse.y" - - -#include -#include -#include -#include "genksyms.h" - -static int is_typedef; -static int is_extern; -static char *current_name; -static struct string_list *decl_spec; - -static void yyerror(const char *); - -static inline void -remove_node(struct string_list **p) -{ - struct string_list *node = *p; - *p = node->next; - free_node(node); -} - -static inline void -remove_list(struct string_list **pb, struct string_list **pe) -{ - struct string_list *b = *pb, *e = *pe; - *pb = e; - free_list(b, e); -} - - - -/* Line 189 of yacc.c */ -#line 106 "scripts/genksyms/parse.c" - -/* Enabling traces. */ -#ifndef YYDEBUG -# define YYDEBUG 1 -#endif - -/* Enabling verbose error messages. */ -#ifdef YYERROR_VERBOSE -# undef YYERROR_VERBOSE -# define YYERROR_VERBOSE 1 -#else -# define YYERROR_VERBOSE 0 -#endif - -/* Enabling the token table. */ -#ifndef YYTOKEN_TABLE -# define YYTOKEN_TABLE 0 -#endif - - -/* Tokens. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - /* Put the tokens into the symbol table, so that GDB and other debuggers - know about them. */ - enum yytokentype { - ASM_KEYW = 258, - ATTRIBUTE_KEYW = 259, - AUTO_KEYW = 260, - BOOL_KEYW = 261, - CHAR_KEYW = 262, - CONST_KEYW = 263, - DOUBLE_KEYW = 264, - ENUM_KEYW = 265, - EXTERN_KEYW = 266, - EXTENSION_KEYW = 267, - FLOAT_KEYW = 268, - INLINE_KEYW = 269, - INT_KEYW = 270, - LONG_KEYW = 271, - REGISTER_KEYW = 272, - RESTRICT_KEYW = 273, - SHORT_KEYW = 274, - SIGNED_KEYW = 275, - STATIC_KEYW = 276, - STRUCT_KEYW = 277, - TYPEDEF_KEYW = 278, - UNION_KEYW = 279, - UNSIGNED_KEYW = 280, - VOID_KEYW = 281, - VOLATILE_KEYW = 282, - TYPEOF_KEYW = 283, - EXPORT_SYMBOL_KEYW = 284, - ASM_PHRASE = 285, - ATTRIBUTE_PHRASE = 286, - BRACE_PHRASE = 287, - BRACKET_PHRASE = 288, - EXPRESSION_PHRASE = 289, - CHAR = 290, - DOTS = 291, - IDENT = 292, - INT = 293, - REAL = 294, - STRING = 295, - TYPE = 296, - OTHER = 297, - FILENAME = 298 - }; -#endif - - - -#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED -typedef int YYSTYPE; -# define YYSTYPE_IS_TRIVIAL 1 -# define yystype YYSTYPE /* obsolescent; will be withdrawn */ -# define YYSTYPE_IS_DECLARED 1 -#endif - - -/* Copy the second part of user declarations. */ - - -/* Line 264 of yacc.c */ -#line 191 "scripts/genksyms/parse.c" - -#ifdef short -# undef short -#endif - -#ifdef YYTYPE_UINT8 -typedef YYTYPE_UINT8 yytype_uint8; -#else -typedef unsigned char yytype_uint8; -#endif - -#ifdef YYTYPE_INT8 -typedef YYTYPE_INT8 yytype_int8; -#elif (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -typedef signed char yytype_int8; -#else -typedef short int yytype_int8; -#endif - -#ifdef YYTYPE_UINT16 -typedef YYTYPE_UINT16 yytype_uint16; -#else -typedef unsigned short int yytype_uint16; -#endif - -#ifdef YYTYPE_INT16 -typedef YYTYPE_INT16 yytype_int16; -#else -typedef short int yytype_int16; -#endif - -#ifndef YYSIZE_T -# ifdef __SIZE_TYPE__ -# define YYSIZE_T __SIZE_TYPE__ -# elif defined size_t -# define YYSIZE_T size_t -# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -# include /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -# else -# define YYSIZE_T unsigned int -# endif -#endif - -#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) - -#ifndef YY_ -# if YYENABLE_NLS -# if ENABLE_NLS -# include /* INFRINGES ON USER NAME SPACE */ -# define YY_(msgid) dgettext ("bison-runtime", msgid) -# endif -# endif -# ifndef YY_ -# define YY_(msgid) msgid -# endif -#endif - -/* Suppress unused-variable warnings by "using" E. */ -#if ! defined lint || defined __GNUC__ -# define YYUSE(e) ((void) (e)) -#else -# define YYUSE(e) /* empty */ -#endif - -/* Identity function, used to suppress warnings about constant conditions. */ -#ifndef lint -# define YYID(n) (n) -#else -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static int -YYID (int yyi) -#else -static int -YYID (yyi) - int yyi; -#endif -{ - return yyi; -} -#endif - -#if ! defined yyoverflow || YYERROR_VERBOSE - -/* The parser invokes alloca or malloc; define the necessary symbols. */ - -# ifdef YYSTACK_USE_ALLOCA -# if YYSTACK_USE_ALLOCA -# ifdef __GNUC__ -# define YYSTACK_ALLOC __builtin_alloca -# elif defined __BUILTIN_VA_ARG_INCR -# include /* INFRINGES ON USER NAME SPACE */ -# elif defined _AIX -# define YYSTACK_ALLOC __alloca -# elif defined _MSC_VER -# include /* INFRINGES ON USER NAME SPACE */ -# define alloca _alloca -# else -# define YYSTACK_ALLOC alloca -# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -# include /* INFRINGES ON USER NAME SPACE */ -# ifndef _STDLIB_H -# define _STDLIB_H 1 -# endif -# endif -# endif -# endif -# endif - -# ifdef YYSTACK_ALLOC - /* Pacify GCC's `empty if-body' warning. */ -# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) -# ifndef YYSTACK_ALLOC_MAXIMUM - /* The OS might guarantee only one guard page at the bottom of the stack, - and a page size can be as small as 4096 bytes. So we cannot safely - invoke alloca (N) if N exceeds 4096. Use a slightly smaller number - to allow for a few compiler-allocated temporary stack slots. */ -# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ -# endif -# else -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# ifndef YYSTACK_ALLOC_MAXIMUM -# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM -# endif -# if (defined __cplusplus && ! defined _STDLIB_H \ - && ! ((defined YYMALLOC || defined malloc) \ - && (defined YYFREE || defined free))) -# include /* INFRINGES ON USER NAME SPACE */ -# ifndef _STDLIB_H -# define _STDLIB_H 1 -# endif -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifndef YYFREE -# define YYFREE free -# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -void free (void *); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# endif -#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ - - -#if (! defined yyoverflow \ - && (! defined __cplusplus \ - || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) - -/* A type that is properly aligned for any stack member. */ -union yyalloc -{ - yytype_int16 yyss_alloc; - YYSTYPE yyvs_alloc; -}; - -/* The size of the maximum gap between one aligned stack and the next. */ -# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) - -/* The size of an array large to enough to hold all stacks, each with - N elements. */ -# define YYSTACK_BYTES(N) \ - ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ - + YYSTACK_GAP_MAXIMUM) - -/* Copy COUNT objects from FROM to TO. The source and destination do - not overlap. */ -# ifndef YYCOPY -# if defined __GNUC__ && 1 < __GNUC__ -# define YYCOPY(To, From, Count) \ - __builtin_memcpy (To, From, (Count) * sizeof (*(From))) -# else -# define YYCOPY(To, From, Count) \ - do \ - { \ - YYSIZE_T yyi; \ - for (yyi = 0; yyi < (Count); yyi++) \ - (To)[yyi] = (From)[yyi]; \ - } \ - while (YYID (0)) -# endif -# endif - -/* Relocate STACK from its old location to the new one. The - local variables YYSIZE and YYSTACKSIZE give the old and new number of - elements in the stack, and YYPTR gives the new location of the - stack. Advance YYPTR to a properly aligned location for the next - stack. */ -# define YYSTACK_RELOCATE(Stack_alloc, Stack) \ - do \ - { \ - YYSIZE_T yynewbytes; \ - YYCOPY (&yyptr->Stack_alloc, Stack, yysize); \ - Stack = &yyptr->Stack_alloc; \ - yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ - yyptr += yynewbytes / sizeof (*yyptr); \ - } \ - while (YYID (0)) - -#endif - -/* YYFINAL -- State number of the termination state. */ -#define YYFINAL 4 -/* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 532 - -/* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 53 -/* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 49 -/* YYNRULES -- Number of rules. */ -#define YYNRULES 132 -/* YYNRULES -- Number of states. */ -#define YYNSTATES 188 - -/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ -#define YYUNDEFTOK 2 -#define YYMAXUTOK 298 - -#define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) - -/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ -static const yytype_uint8 yytranslate[] = -{ - 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 47, 49, 48, 2, 46, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 52, 44, - 2, 50, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 51, 2, 45, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40, 41, 42, 43 -}; - -#if YYDEBUG -/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in - YYRHS. */ -static const yytype_uint16 yyprhs[] = -{ - 0, 0, 3, 5, 8, 9, 12, 13, 18, 19, - 23, 25, 27, 29, 31, 34, 37, 41, 42, 44, - 46, 50, 55, 56, 58, 60, 63, 65, 67, 69, - 71, 73, 75, 77, 79, 81, 87, 92, 95, 98, - 101, 105, 109, 113, 116, 119, 122, 124, 126, 128, - 130, 132, 134, 136, 138, 140, 142, 144, 147, 148, - 150, 152, 155, 157, 159, 161, 163, 166, 168, 170, - 175, 180, 183, 187, 191, 194, 196, 198, 200, 205, - 210, 213, 217, 221, 224, 226, 230, 231, 233, 235, - 239, 242, 245, 247, 248, 250, 252, 257, 262, 265, - 269, 273, 277, 278, 280, 283, 287, 291, 292, 294, - 296, 299, 303, 306, 307, 309, 311, 315, 318, 321, - 323, 326, 327, 330, 334, 339, 341, 345, 347, 351, - 354, 355, 357 -}; - -/* YYRHS -- A `-1'-separated list of the rules' RHS. */ -static const yytype_int8 yyrhs[] = -{ - 54, 0, -1, 55, -1, 54, 55, -1, -1, 56, - 57, -1, -1, 12, 23, 58, 60, -1, -1, 23, - 59, 60, -1, 60, -1, 84, -1, 99, -1, 101, - -1, 1, 44, -1, 1, 45, -1, 64, 61, 44, - -1, -1, 62, -1, 63, -1, 62, 46, 63, -1, - 74, 100, 95, 85, -1, -1, 65, -1, 66, -1, - 65, 66, -1, 67, -1, 68, -1, 5, -1, 17, - -1, 21, -1, 11, -1, 14, -1, 69, -1, 73, - -1, 28, 47, 65, 48, 49, -1, 28, 47, 65, - 49, -1, 22, 37, -1, 24, 37, -1, 10, 37, - -1, 22, 37, 87, -1, 24, 37, 87, -1, 10, - 37, 96, -1, 10, 96, -1, 22, 87, -1, 24, - 87, -1, 7, -1, 19, -1, 15, -1, 16, -1, - 20, -1, 25, -1, 13, -1, 9, -1, 26, -1, - 6, -1, 41, -1, 48, 71, -1, -1, 72, -1, - 73, -1, 72, 73, -1, 8, -1, 27, -1, 31, - -1, 18, -1, 70, 74, -1, 75, -1, 37, -1, - 75, 47, 78, 49, -1, 75, 47, 1, 49, -1, - 75, 33, -1, 47, 74, 49, -1, 47, 1, 49, - -1, 70, 76, -1, 77, -1, 37, -1, 41, -1, - 77, 47, 78, 49, -1, 77, 47, 1, 49, -1, - 77, 33, -1, 47, 76, 49, -1, 47, 1, 49, - -1, 79, 36, -1, 79, -1, 80, 46, 36, -1, - -1, 80, -1, 81, -1, 80, 46, 81, -1, 65, - 82, -1, 70, 82, -1, 83, -1, -1, 37, -1, - 41, -1, 83, 47, 78, 49, -1, 83, 47, 1, - 49, -1, 83, 33, -1, 47, 82, 49, -1, 47, - 1, 49, -1, 64, 74, 32, -1, -1, 86, -1, - 50, 34, -1, 51, 88, 45, -1, 51, 1, 45, - -1, -1, 89, -1, 90, -1, 89, 90, -1, 64, - 91, 44, -1, 1, 44, -1, -1, 92, -1, 93, - -1, 92, 46, 93, -1, 76, 95, -1, 37, 94, - -1, 94, -1, 52, 34, -1, -1, 95, 31, -1, - 51, 97, 45, -1, 51, 97, 46, 45, -1, 98, - -1, 97, 46, 98, -1, 37, -1, 37, 50, 34, - -1, 30, 44, -1, -1, 30, -1, 29, 47, 37, - 49, 44, -1 -}; - -/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ -static const yytype_uint16 yyrline[] = -{ - 0, 104, 104, 105, 109, 109, 115, 115, 117, 117, - 119, 120, 121, 122, 123, 124, 128, 142, 143, 147, - 155, 168, 174, 175, 179, 180, 184, 190, 194, 195, - 196, 197, 198, 202, 203, 204, 205, 209, 211, 213, - 217, 224, 231, 241, 244, 245, 249, 250, 251, 252, - 253, 254, 255, 256, 257, 258, 259, 263, 268, 269, - 273, 274, 278, 278, 278, 279, 287, 288, 292, 301, - 303, 305, 307, 309, 316, 317, 321, 322, 323, 325, - 327, 329, 331, 336, 337, 338, 342, 343, 347, 348, - 353, 358, 360, 364, 365, 373, 377, 379, 381, 383, - 385, 390, 399, 400, 405, 410, 411, 415, 416, 420, - 421, 425, 427, 432, 433, 437, 438, 442, 443, 444, - 448, 452, 453, 457, 458, 462, 463, 466, 471, 479, - 483, 484, 488 -}; -#endif - -#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE -/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. - First, the terminals, then, starting at YYNTOKENS, nonterminals. */ -static const char *const yytname[] = -{ - "$end", "error", "$undefined", "ASM_KEYW", "ATTRIBUTE_KEYW", - "AUTO_KEYW", "BOOL_KEYW", "CHAR_KEYW", "CONST_KEYW", "DOUBLE_KEYW", - "ENUM_KEYW", "EXTERN_KEYW", "EXTENSION_KEYW", "FLOAT_KEYW", - "INLINE_KEYW", "INT_KEYW", "LONG_KEYW", "REGISTER_KEYW", "RESTRICT_KEYW", - "SHORT_KEYW", "SIGNED_KEYW", "STATIC_KEYW", "STRUCT_KEYW", - "TYPEDEF_KEYW", "UNION_KEYW", "UNSIGNED_KEYW", "VOID_KEYW", - "VOLATILE_KEYW", "TYPEOF_KEYW", "EXPORT_SYMBOL_KEYW", "ASM_PHRASE", - "ATTRIBUTE_PHRASE", "BRACE_PHRASE", "BRACKET_PHRASE", - "EXPRESSION_PHRASE", "CHAR", "DOTS", "IDENT", "INT", "REAL", "STRING", - "TYPE", "OTHER", "FILENAME", "';'", "'}'", "','", "'('", "'*'", "')'", - "'='", "'{'", "':'", "$accept", "declaration_seq", "declaration", "$@1", - "declaration1", "$@2", "$@3", "simple_declaration", - "init_declarator_list_opt", "init_declarator_list", "init_declarator", - "decl_specifier_seq_opt", "decl_specifier_seq", "decl_specifier", - "storage_class_specifier", "type_specifier", "simple_type_specifier", - "ptr_operator", "cvar_qualifier_seq_opt", "cvar_qualifier_seq", - "cvar_qualifier", "declarator", "direct_declarator", "nested_declarator", - "direct_nested_declarator", "parameter_declaration_clause", - "parameter_declaration_list_opt", "parameter_declaration_list", - "parameter_declaration", "m_abstract_declarator", - "direct_m_abstract_declarator", "function_definition", "initializer_opt", - "initializer", "class_body", "member_specification_opt", - "member_specification", "member_declaration", - "member_declarator_list_opt", "member_declarator_list", - "member_declarator", "member_bitfield_declarator", "attribute_opt", - "enum_body", "enumerator_list", "enumerator", "asm_definition", - "asm_phrase_opt", "export_definition", 0 -}; -#endif - -# ifdef YYPRINT -/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to - token YYLEX-NUM. */ -static const yytype_uint16 yytoknum[] = -{ - 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, - 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, - 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, - 295, 296, 297, 298, 59, 125, 44, 40, 42, 41, - 61, 123, 58 -}; -# endif - -/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ -static const yytype_uint8 yyr1[] = -{ - 0, 53, 54, 54, 56, 55, 58, 57, 59, 57, - 57, 57, 57, 57, 57, 57, 60, 61, 61, 62, - 62, 63, 64, 64, 65, 65, 66, 66, 67, 67, - 67, 67, 67, 68, 68, 68, 68, 68, 68, 68, - 68, 68, 68, 68, 68, 68, 69, 69, 69, 69, - 69, 69, 69, 69, 69, 69, 69, 70, 71, 71, - 72, 72, 73, 73, 73, 73, 74, 74, 75, 75, - 75, 75, 75, 75, 76, 76, 77, 77, 77, 77, - 77, 77, 77, 78, 78, 78, 79, 79, 80, 80, - 81, 82, 82, 83, 83, 83, 83, 83, 83, 83, - 83, 84, 85, 85, 86, 87, 87, 88, 88, 89, - 89, 90, 90, 91, 91, 92, 92, 93, 93, 93, - 94, 95, 95, 96, 96, 97, 97, 98, 98, 99, - 100, 100, 101 -}; - -/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ -static const yytype_uint8 yyr2[] = -{ - 0, 2, 1, 2, 0, 2, 0, 4, 0, 3, - 1, 1, 1, 1, 2, 2, 3, 0, 1, 1, - 3, 4, 0, 1, 1, 2, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 5, 4, 2, 2, 2, - 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 2, 0, 1, - 1, 2, 1, 1, 1, 1, 2, 1, 1, 4, - 4, 2, 3, 3, 2, 1, 1, 1, 4, 4, - 2, 3, 3, 2, 1, 3, 0, 1, 1, 3, - 2, 2, 1, 0, 1, 1, 4, 4, 2, 3, - 3, 3, 0, 1, 2, 3, 3, 0, 1, 1, - 2, 3, 2, 0, 1, 1, 3, 2, 2, 1, - 2, 0, 2, 3, 4, 1, 3, 1, 3, 2, - 0, 1, 5 -}; - -/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state - STATE-NUM when YYTABLE doesn't specify something else to do. Zero - means the default is an error. */ -static const yytype_uint8 yydefact[] = -{ - 4, 4, 2, 0, 1, 3, 0, 28, 55, 46, - 62, 53, 0, 31, 0, 52, 32, 48, 49, 29, - 65, 47, 50, 30, 0, 8, 0, 51, 54, 63, - 0, 0, 0, 64, 56, 5, 10, 17, 23, 24, - 26, 27, 33, 34, 11, 12, 13, 14, 15, 39, - 0, 43, 6, 37, 0, 44, 22, 38, 45, 0, - 0, 129, 68, 0, 58, 0, 18, 19, 0, 130, - 67, 25, 42, 127, 0, 125, 22, 40, 0, 113, - 0, 0, 109, 9, 17, 41, 0, 0, 0, 0, - 57, 59, 60, 16, 0, 66, 131, 101, 121, 71, - 0, 0, 123, 0, 7, 112, 106, 76, 77, 0, - 0, 0, 121, 75, 0, 114, 115, 119, 105, 0, - 110, 130, 0, 36, 0, 73, 72, 61, 20, 102, - 0, 93, 0, 84, 87, 88, 128, 124, 126, 118, - 0, 76, 0, 120, 74, 117, 80, 0, 111, 0, - 35, 132, 122, 0, 21, 103, 70, 94, 56, 0, - 93, 90, 92, 69, 83, 0, 82, 81, 0, 0, - 116, 104, 0, 95, 0, 91, 98, 0, 85, 89, - 79, 78, 100, 99, 0, 0, 97, 96 -}; - -/* YYDEFGOTO[NTERM-NUM]. */ -static const yytype_int16 yydefgoto[] = -{ - -1, 1, 2, 3, 35, 76, 56, 36, 65, 66, - 67, 79, 38, 39, 40, 41, 42, 68, 90, 91, - 43, 121, 70, 112, 113, 132, 133, 134, 135, 161, - 162, 44, 154, 155, 55, 80, 81, 82, 114, 115, - 116, 117, 129, 51, 74, 75, 45, 98, 46 -}; - -/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing - STATE-NUM. */ -#define YYPACT_NINF -135 -static const yytype_int16 yypact[] = -{ - -135, 20, -135, 321, -135, -135, 30, -135, -135, -135, - -135, -135, -28, -135, 2, -135, -135, -135, -135, -135, - -135, -135, -135, -135, -6, -135, 9, -135, -135, -135, - -5, 15, -17, -135, -135, -135, -135, 18, 491, -135, - -135, -135, -135, -135, -135, -135, -135, -135, -135, -22, - 31, -135, -135, 19, 106, -135, 491, 19, -135, 491, - 50, -135, -135, 11, -3, 51, 57, -135, 18, -14, - 14, -135, -135, 48, 46, -135, 491, -135, 33, 32, - 59, 154, -135, -135, 18, -135, 365, 56, 60, 61, - -135, -3, -135, -135, 18, -135, -135, -135, -135, -135, - 202, 74, -135, -23, -135, -135, -135, 77, -135, 16, - 101, 49, -135, 34, 92, 93, -135, -135, -135, 94, - -135, 110, 95, -135, 97, -135, -135, -135, -135, -20, - 96, 410, 99, 113, 100, -135, -135, -135, -135, -135, - 103, -135, 107, -135, -135, 111, -135, 239, -135, 32, - -135, -135, -135, 123, -135, -135, -135, -135, -135, 3, - 52, -135, 38, -135, -135, 454, -135, -135, 117, 128, - -135, -135, 134, -135, 135, -135, -135, 276, -135, -135, - -135, -135, -135, -135, 137, 138, -135, -135 -}; - -/* YYPGOTO[NTERM-NUM]. */ -static const yytype_int16 yypgoto[] = -{ - -135, -135, 187, -135, -135, -135, -135, -50, -135, -135, - 98, 0, -59, -37, -135, -135, -135, -77, -135, -135, - -54, -30, -135, -90, -135, -134, -135, -135, 24, -58, - -135, -135, -135, -135, -18, -135, -135, 109, -135, -135, - 44, 87, 84, 148, -135, 102, -135, -135, -135 -}; - -/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If - positive, shift that token. If negative, reduce the rule which - number is the opposite. If zero, do what YYDEFACT says. - If YYTABLE_NINF, syntax error. */ -#define YYTABLE_NINF -109 -static const yytype_int16 yytable[] = -{ - 86, 71, 111, 37, 172, 10, 83, 69, 58, 49, - 92, 152, 88, 169, 73, 20, 96, 140, 97, 142, - 4, 144, 137, 50, 29, 52, 104, 61, 33, 50, - 153, 53, 111, 89, 111, 77, -93, 127, 95, 85, - 157, 131, 59, 185, 173, 54, 57, 99, 62, 71, - 159, 64, -93, 141, 160, 62, 84, 108, 63, 64, - 54, 100, 60, 109, 64, 63, 64, 146, 73, 107, - 54, 176, 111, 108, 47, 48, 84, 105, 106, 109, - 64, 147, 160, 160, 110, 177, 141, 87, 131, 157, - 108, 102, 103, 173, 71, 93, 109, 64, 101, 159, - 64, 174, 175, 94, 118, 124, 131, 78, 136, 125, - 126, 7, 8, 9, 10, 11, 12, 13, 131, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 110, - 26, 27, 28, 29, 30, 143, 148, 33, 105, 149, - 96, 151, 152, -22, 150, 156, 165, 34, 163, 164, - -22, -107, 166, -22, -22, 119, 167, 171, -22, 7, - 8, 9, 10, 11, 12, 13, 180, 15, 16, 17, - 18, 19, 20, 21, 22, 23, 24, 181, 26, 27, - 28, 29, 30, 182, 183, 33, 186, 187, 5, 179, - 120, -22, 128, 170, 139, 34, 145, 72, -22, -108, - 0, -22, -22, 130, 0, 138, -22, 7, 8, 9, - 10, 11, 12, 13, 0, 15, 16, 17, 18, 19, - 20, 21, 22, 23, 24, 0, 26, 27, 28, 29, - 30, 0, 0, 33, 0, 0, 0, 0, -86, 0, - 168, 0, 0, 34, 7, 8, 9, 10, 11, 12, - 13, -86, 15, 16, 17, 18, 19, 20, 21, 22, - 23, 24, 0, 26, 27, 28, 29, 30, 0, 0, - 33, 0, 0, 0, 0, -86, 0, 184, 0, 0, - 34, 7, 8, 9, 10, 11, 12, 13, -86, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 0, - 26, 27, 28, 29, 30, 0, 0, 33, 0, 0, - 0, 0, -86, 0, 0, 0, 0, 34, 0, 0, - 0, 0, 6, 0, 0, -86, 7, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, - 31, 32, 33, 0, 0, 0, 0, 0, -22, 0, - 0, 0, 34, 0, 0, -22, 0, 0, -22, -22, - 7, 8, 9, 10, 11, 12, 13, 0, 15, 16, - 17, 18, 19, 20, 21, 22, 23, 24, 0, 26, - 27, 28, 29, 30, 0, 0, 33, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, - 0, 0, 0, 122, 123, 7, 8, 9, 10, 11, - 12, 13, 0, 15, 16, 17, 18, 19, 20, 21, - 22, 23, 24, 0, 26, 27, 28, 29, 30, 0, - 0, 33, 0, 0, 0, 0, 0, 157, 0, 0, - 0, 158, 0, 0, 0, 0, 0, 159, 64, 7, - 8, 9, 10, 11, 12, 13, 0, 15, 16, 17, - 18, 19, 20, 21, 22, 23, 24, 0, 26, 27, - 28, 29, 30, 0, 0, 33, 0, 0, 0, 0, - 178, 0, 0, 0, 0, 34, 7, 8, 9, 10, - 11, 12, 13, 0, 15, 16, 17, 18, 19, 20, - 21, 22, 23, 24, 0, 26, 27, 28, 29, 30, - 0, 0, 33, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 34 -}; - -static const yytype_int16 yycheck[] = -{ - 59, 38, 79, 3, 1, 8, 56, 37, 26, 37, - 64, 31, 1, 147, 37, 18, 30, 1, 32, 109, - 0, 111, 45, 51, 27, 23, 76, 44, 31, 51, - 50, 37, 109, 63, 111, 53, 33, 91, 68, 57, - 37, 100, 47, 177, 41, 51, 37, 33, 37, 86, - 47, 48, 49, 37, 131, 37, 56, 41, 47, 48, - 51, 47, 47, 47, 48, 47, 48, 33, 37, 37, - 51, 33, 149, 41, 44, 45, 76, 44, 45, 47, - 48, 47, 159, 160, 52, 47, 37, 37, 147, 37, - 41, 45, 46, 41, 131, 44, 47, 48, 50, 47, - 48, 159, 160, 46, 45, 49, 165, 1, 34, 49, - 49, 5, 6, 7, 8, 9, 10, 11, 177, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, 52, - 24, 25, 26, 27, 28, 34, 44, 31, 44, 46, - 30, 44, 31, 37, 49, 49, 46, 41, 49, 36, - 44, 45, 49, 47, 48, 1, 49, 34, 52, 5, - 6, 7, 8, 9, 10, 11, 49, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, 49, 24, 25, - 26, 27, 28, 49, 49, 31, 49, 49, 1, 165, - 81, 37, 94, 149, 107, 41, 112, 49, 44, 45, - -1, 47, 48, 1, -1, 103, 52, 5, 6, 7, - 8, 9, 10, 11, -1, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, -1, 24, 25, 26, 27, - 28, -1, -1, 31, -1, -1, -1, -1, 36, -1, - 1, -1, -1, 41, 5, 6, 7, 8, 9, 10, - 11, 49, 13, 14, 15, 16, 17, 18, 19, 20, - 21, 22, -1, 24, 25, 26, 27, 28, -1, -1, - 31, -1, -1, -1, -1, 36, -1, 1, -1, -1, - 41, 5, 6, 7, 8, 9, 10, 11, 49, 13, - 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, - 24, 25, 26, 27, 28, -1, -1, 31, -1, -1, - -1, -1, 36, -1, -1, -1, -1, 41, -1, -1, - -1, -1, 1, -1, -1, 49, 5, 6, 7, 8, - 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, - 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, - 29, 30, 31, -1, -1, -1, -1, -1, 37, -1, - -1, -1, 41, -1, -1, 44, -1, -1, 47, 48, - 5, 6, 7, 8, 9, 10, 11, -1, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22, -1, 24, - 25, 26, 27, 28, -1, -1, 31, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 41, -1, -1, -1, - -1, -1, -1, 48, 49, 5, 6, 7, 8, 9, - 10, 11, -1, 13, 14, 15, 16, 17, 18, 19, - 20, 21, 22, -1, 24, 25, 26, 27, 28, -1, - -1, 31, -1, -1, -1, -1, -1, 37, -1, -1, - -1, 41, -1, -1, -1, -1, -1, 47, 48, 5, - 6, 7, 8, 9, 10, 11, -1, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, -1, 24, 25, - 26, 27, 28, -1, -1, 31, -1, -1, -1, -1, - 36, -1, -1, -1, -1, 41, 5, 6, 7, 8, - 9, 10, 11, -1, 13, 14, 15, 16, 17, 18, - 19, 20, 21, 22, -1, 24, 25, 26, 27, 28, - -1, -1, 31, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 41 -}; - -/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing - symbol of state STATE-NUM. */ -static const yytype_uint8 yystos[] = -{ - 0, 54, 55, 56, 0, 55, 1, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, - 28, 29, 30, 31, 41, 57, 60, 64, 65, 66, - 67, 68, 69, 73, 84, 99, 101, 44, 45, 37, - 51, 96, 23, 37, 51, 87, 59, 37, 87, 47, - 47, 44, 37, 47, 48, 61, 62, 63, 70, 74, - 75, 66, 96, 37, 97, 98, 58, 87, 1, 64, - 88, 89, 90, 60, 64, 87, 65, 37, 1, 74, - 71, 72, 73, 44, 46, 74, 30, 32, 100, 33, - 47, 50, 45, 46, 60, 44, 45, 37, 41, 47, - 52, 70, 76, 77, 91, 92, 93, 94, 45, 1, - 90, 74, 48, 49, 49, 49, 49, 73, 63, 95, - 1, 65, 78, 79, 80, 81, 34, 45, 98, 94, - 1, 37, 76, 34, 76, 95, 33, 47, 44, 46, - 49, 44, 31, 50, 85, 86, 49, 37, 41, 47, - 70, 82, 83, 49, 36, 46, 49, 49, 1, 78, - 93, 34, 1, 41, 82, 82, 33, 47, 36, 81, - 49, 49, 49, 49, 1, 78, 49, 49 -}; - -#define yyerrok (yyerrstatus = 0) -#define yyclearin (yychar = YYEMPTY) -#define YYEMPTY (-2) -#define YYEOF 0 - -#define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrorlab - - -/* Like YYERROR except do call yyerror. This remains here temporarily - to ease the transition to the new meaning of YYERROR, for GCC. - Once GCC version 2 has supplanted version 1, this can go. */ - -#define YYFAIL goto yyerrlab - -#define YYRECOVERING() (!!yyerrstatus) - -#define YYBACKUP(Token, Value) \ -do \ - if (yychar == YYEMPTY && yylen == 1) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - yytoken = YYTRANSLATE (yychar); \ - YYPOPSTACK (1); \ - goto yybackup; \ - } \ - else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ - YYERROR; \ - } \ -while (YYID (0)) - - -#define YYTERROR 1 -#define YYERRCODE 256 - - -/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. - If N is 0, then set CURRENT to the empty location which ends - the previous symbol: RHS[0] (always defined). */ - -#define YYRHSLOC(Rhs, K) ((Rhs)[K]) -#ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - do \ - if (YYID (N)) \ - { \ - (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC (Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC (Rhs, 0).last_column; \ - } \ - while (YYID (0)) -#endif - - -/* YY_LOCATION_PRINT -- Print the location on the stream. - This macro was not mandated originally: define only if we know - we won't break user code: when these are the locations we know. */ - -#ifndef YY_LOCATION_PRINT -# if YYLTYPE_IS_TRIVIAL -# define YY_LOCATION_PRINT(File, Loc) \ - fprintf (File, "%d.%d-%d.%d", \ - (Loc).first_line, (Loc).first_column, \ - (Loc).last_line, (Loc).last_column) -# else -# define YY_LOCATION_PRINT(File, Loc) ((void) 0) -# endif -#endif - - -/* YYLEX -- calling `yylex' with the right arguments. */ - -#ifdef YYLEX_PARAM -# define YYLEX yylex (YYLEX_PARAM) -#else -# define YYLEX yylex () -#endif - -/* Enable debugging if requested. */ -#if YYDEBUG - -# ifndef YYFPRINTF -# include /* INFRINGES ON USER NAME SPACE */ -# define YYFPRINTF fprintf -# endif - -# define YYDPRINTF(Args) \ -do { \ - if (yydebug) \ - YYFPRINTF Args; \ -} while (YYID (0)) - -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ -do { \ - if (yydebug) \ - { \ - YYFPRINTF (stderr, "%s ", Title); \ - yy_symbol_print (stderr, \ - Type, Value); \ - YYFPRINTF (stderr, "\n"); \ - } \ -} while (YYID (0)) - - -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ - -/*ARGSUSED*/ -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static void -yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) -#else -static void -yy_symbol_value_print (yyoutput, yytype, yyvaluep) - FILE *yyoutput; - int yytype; - YYSTYPE const * const yyvaluep; -#endif -{ - if (!yyvaluep) - return; -# ifdef YYPRINT - if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# else - YYUSE (yyoutput); -# endif - switch (yytype) - { - default: - break; - } -} - - -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ - -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static void -yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) -#else -static void -yy_symbol_print (yyoutput, yytype, yyvaluep) - FILE *yyoutput; - int yytype; - YYSTYPE const * const yyvaluep; -#endif -{ - if (yytype < YYNTOKENS) - YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); - else - YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); - - yy_symbol_value_print (yyoutput, yytype, yyvaluep); - YYFPRINTF (yyoutput, ")"); -} - -/*------------------------------------------------------------------. -| yy_stack_print -- Print the state stack from its BOTTOM up to its | -| TOP (included). | -`------------------------------------------------------------------*/ - -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static void -yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop) -#else -static void -yy_stack_print (yybottom, yytop) - yytype_int16 *yybottom; - yytype_int16 *yytop; -#endif -{ - YYFPRINTF (stderr, "Stack now"); - for (; yybottom <= yytop; yybottom++) - { - int yybot = *yybottom; - YYFPRINTF (stderr, " %d", yybot); - } - YYFPRINTF (stderr, "\n"); -} - -# define YY_STACK_PRINT(Bottom, Top) \ -do { \ - if (yydebug) \ - yy_stack_print ((Bottom), (Top)); \ -} while (YYID (0)) - - -/*------------------------------------------------. -| Report that the YYRULE is going to be reduced. | -`------------------------------------------------*/ - -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static void -yy_reduce_print (YYSTYPE *yyvsp, int yyrule) -#else -static void -yy_reduce_print (yyvsp, yyrule) - YYSTYPE *yyvsp; - int yyrule; -#endif -{ - int yynrhs = yyr2[yyrule]; - int yyi; - unsigned long int yylno = yyrline[yyrule]; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", - yyrule - 1, yylno); - /* The symbols being reduced. */ - for (yyi = 0; yyi < yynrhs; yyi++) - { - YYFPRINTF (stderr, " $%d = ", yyi + 1); - yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], - &(yyvsp[(yyi + 1) - (yynrhs)]) - ); - YYFPRINTF (stderr, "\n"); - } -} - -# define YY_REDUCE_PRINT(Rule) \ -do { \ - if (yydebug) \ - yy_reduce_print (yyvsp, Rule); \ -} while (YYID (0)) - -/* Nonzero means print parse trace. It is left uninitialized so that - multiple parsers can coexist. */ -int yydebug; -#else /* !YYDEBUG */ -# define YYDPRINTF(Args) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) -# define YY_STACK_PRINT(Bottom, Top) -# define YY_REDUCE_PRINT(Rule) -#endif /* !YYDEBUG */ - - -/* YYINITDEPTH -- initial size of the parser's stacks. */ -#ifndef YYINITDEPTH -# define YYINITDEPTH 200 -#endif - -/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only - if the built-in stack extension method is used). - - Do not make this value too large; the results are undefined if - YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) - evaluated with infinite-precision integer arithmetic. */ - -#ifndef YYMAXDEPTH -# define YYMAXDEPTH 10000 -#endif - - - -#if YYERROR_VERBOSE - -# ifndef yystrlen -# if defined __GLIBC__ && defined _STRING_H -# define yystrlen strlen -# else -/* Return the length of YYSTR. */ -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static YYSIZE_T -yystrlen (const char *yystr) -#else -static YYSIZE_T -yystrlen (yystr) - const char *yystr; -#endif -{ - YYSIZE_T yylen; - for (yylen = 0; yystr[yylen]; yylen++) - continue; - return yylen; -} -# endif -# endif - -# ifndef yystpcpy -# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE -# define yystpcpy stpcpy -# else -/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in - YYDEST. */ -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static char * -yystpcpy (char *yydest, const char *yysrc) -#else -static char * -yystpcpy (yydest, yysrc) - char *yydest; - const char *yysrc; -#endif -{ - char *yyd = yydest; - const char *yys = yysrc; - - while ((*yyd++ = *yys++) != '\0') - continue; - - return yyd - 1; -} -# endif -# endif - -# ifndef yytnamerr -/* Copy to YYRES the contents of YYSTR after stripping away unnecessary - quotes and backslashes, so that it's suitable for yyerror. The - heuristic is that double-quoting is unnecessary unless the string - contains an apostrophe, a comma, or backslash (other than - backslash-backslash). YYSTR is taken from yytname. If YYRES is - null, do not copy; instead, return the length of what the result - would have been. */ -static YYSIZE_T -yytnamerr (char *yyres, const char *yystr) -{ - if (*yystr == '"') - { - YYSIZE_T yyn = 0; - char const *yyp = yystr; - - for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; - - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; - - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } - do_not_strip_quotes: ; - } - - if (! yyres) - return yystrlen (yystr); - - return yystpcpy (yyres, yystr) - yyres; -} -# endif - -/* Copy into YYRESULT an error message about the unexpected token - YYCHAR while in state YYSTATE. Return the number of bytes copied, - including the terminating null byte. If YYRESULT is null, do not - copy anything; just return the number of bytes that would be - copied. As a special case, return 0 if an ordinary "syntax error" - message will do. Return YYSIZE_MAXIMUM if overflow occurs during - size calculation. */ -static YYSIZE_T -yysyntax_error (char *yyresult, int yystate, int yychar) -{ - int yyn = yypact[yystate]; - - if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) - return 0; - else - { - int yytype = YYTRANSLATE (yychar); - YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); - YYSIZE_T yysize = yysize0; - YYSIZE_T yysize1; - int yysize_overflow = 0; - enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; - char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; - int yyx; - -# if 0 - /* This is so xgettext sees the translatable formats that are - constructed on the fly. */ - YY_("syntax error, unexpected %s"); - YY_("syntax error, unexpected %s, expecting %s"); - YY_("syntax error, unexpected %s, expecting %s or %s"); - YY_("syntax error, unexpected %s, expecting %s or %s or %s"); - YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); -# endif - char *yyfmt; - char const *yyf; - static char const yyunexpected[] = "syntax error, unexpected %s"; - static char const yyexpecting[] = ", expecting %s"; - static char const yyor[] = " or %s"; - char yyformat[sizeof yyunexpected - + sizeof yyexpecting - 1 - + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) - * (sizeof yyor - 1))]; - char const *yyprefix = yyexpecting; - - /* Start YYX at -YYN if negative to avoid negative indexes in - YYCHECK. */ - int yyxbegin = yyn < 0 ? -yyn : 0; - - /* Stay within bounds of both yycheck and yytname. */ - int yychecklim = YYLAST - yyn + 1; - int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; - int yycount = 1; - - yyarg[0] = yytname[yytype]; - yyfmt = yystpcpy (yyformat, yyunexpected); - - for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) - { - if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) - { - yycount = 1; - yysize = yysize0; - yyformat[sizeof yyunexpected - 1] = '\0'; - break; - } - yyarg[yycount++] = yytname[yyx]; - yysize1 = yysize + yytnamerr (0, yytname[yyx]); - yysize_overflow |= (yysize1 < yysize); - yysize = yysize1; - yyfmt = yystpcpy (yyfmt, yyprefix); - yyprefix = yyor; - } - - yyf = YY_(yyformat); - yysize1 = yysize + yystrlen (yyf); - yysize_overflow |= (yysize1 < yysize); - yysize = yysize1; - - if (yysize_overflow) - return YYSIZE_MAXIMUM; - - if (yyresult) - { - /* Avoid sprintf, as that infringes on the user's name space. - Don't have undefined behavior even if the translation - produced a string with the wrong number of "%s"s. */ - char *yyp = yyresult; - int yyi = 0; - while ((*yyp = *yyf) != '\0') - { - if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) - { - yyp += yytnamerr (yyp, yyarg[yyi++]); - yyf += 2; - } - else - { - yyp++; - yyf++; - } - } - } - return yysize; - } -} -#endif /* YYERROR_VERBOSE */ - - -/*-----------------------------------------------. -| Release the memory associated to this symbol. | -`-----------------------------------------------*/ - -/*ARGSUSED*/ -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -static void -yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) -#else -static void -yydestruct (yymsg, yytype, yyvaluep) - const char *yymsg; - int yytype; - YYSTYPE *yyvaluep; -#endif -{ - YYUSE (yyvaluep); - - if (!yymsg) - yymsg = "Deleting"; - YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); - - switch (yytype) - { - - default: - break; - } -} - -/* Prevent warnings from -Wmissing-prototypes. */ -#ifdef YYPARSE_PARAM -#if defined __STDC__ || defined __cplusplus -int yyparse (void *YYPARSE_PARAM); -#else -int yyparse (); -#endif -#else /* ! YYPARSE_PARAM */ -#if defined __STDC__ || defined __cplusplus -int yyparse (void); -#else -int yyparse (); -#endif -#endif /* ! YYPARSE_PARAM */ - - -/* The lookahead symbol. */ -int yychar; - -/* The semantic value of the lookahead symbol. */ -YYSTYPE yylval; - -/* Number of syntax errors so far. */ -int yynerrs; - - - -/*-------------------------. -| yyparse or yypush_parse. | -`-------------------------*/ - -#ifdef YYPARSE_PARAM -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -int -yyparse (void *YYPARSE_PARAM) -#else -int -yyparse (YYPARSE_PARAM) - void *YYPARSE_PARAM; -#endif -#else /* ! YYPARSE_PARAM */ -#if (defined __STDC__ || defined __C99__FUNC__ \ - || defined __cplusplus || defined _MSC_VER) -int -yyparse (void) -#else -int -yyparse () - -#endif -#endif -{ - - - int yystate; - /* Number of tokens to shift before error messages enabled. */ - int yyerrstatus; - - /* The stacks and their tools: - `yyss': related to states. - `yyvs': related to semantic values. - - Refer to the stacks thru separate pointers, to allow yyoverflow - to reallocate them elsewhere. */ - - /* The state stack. */ - yytype_int16 yyssa[YYINITDEPTH]; - yytype_int16 *yyss; - yytype_int16 *yyssp; - - /* The semantic value stack. */ - YYSTYPE yyvsa[YYINITDEPTH]; - YYSTYPE *yyvs; - YYSTYPE *yyvsp; - - YYSIZE_T yystacksize; - - int yyn; - int yyresult; - /* Lookahead token as an internal (translated) token number. */ - int yytoken; - /* The variables used to return semantic value and location from the - action routines. */ - YYSTYPE yyval; - -#if YYERROR_VERBOSE - /* Buffer for error messages, and its allocated size. */ - char yymsgbuf[128]; - char *yymsg = yymsgbuf; - YYSIZE_T yymsg_alloc = sizeof yymsgbuf; -#endif - -#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) - - /* The number of symbols on the RHS of the reduced rule. - Keep to zero when no symbol should be popped. */ - int yylen = 0; - - yytoken = 0; - yyss = yyssa; - yyvs = yyvsa; - yystacksize = YYINITDEPTH; - - YYDPRINTF ((stderr, "Starting parse\n")); - - yystate = 0; - yyerrstatus = 0; - yynerrs = 0; - yychar = YYEMPTY; /* Cause a token to be read. */ - - /* Initialize stack pointers. - Waste one element of value and location stack - so that they stay on the same level as the state stack. - The wasted elements are never initialized. */ - yyssp = yyss; - yyvsp = yyvs; - - goto yysetstate; - -/*------------------------------------------------------------. -| yynewstate -- Push a new state, which is found in yystate. | -`------------------------------------------------------------*/ - yynewstate: - /* In all cases, when you get here, the value and location stacks - have just been pushed. So pushing a state here evens the stacks. */ - yyssp++; - - yysetstate: - *yyssp = yystate; - - if (yyss + yystacksize - 1 <= yyssp) - { - /* Get the current used size of the three stacks, in elements. */ - YYSIZE_T yysize = yyssp - yyss + 1; - -#ifdef yyoverflow - { - /* Give user a chance to reallocate the stack. Use copies of - these so that the &'s don't force the real ones into - memory. */ - YYSTYPE *yyvs1 = yyvs; - yytype_int16 *yyss1 = yyss; - - /* Each stack pointer address is followed by the size of the - data in use in that stack, in bytes. This used to be a - conditional around just the two extra args, but that might - be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), - &yyss1, yysize * sizeof (*yyssp), - &yyvs1, yysize * sizeof (*yyvsp), - &yystacksize); - - yyss = yyss1; - yyvs = yyvs1; - } -#else /* no yyoverflow */ -# ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; -# else - /* Extend the stack our own way. */ - if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; - yystacksize *= 2; - if (YYMAXDEPTH < yystacksize) - yystacksize = YYMAXDEPTH; - - { - yytype_int16 *yyss1 = yyss; - union yyalloc *yyptr = - (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); - if (! yyptr) - goto yyexhaustedlab; - YYSTACK_RELOCATE (yyss_alloc, yyss); - YYSTACK_RELOCATE (yyvs_alloc, yyvs); -# undef YYSTACK_RELOCATE - if (yyss1 != yyssa) - YYSTACK_FREE (yyss1); - } -# endif -#endif /* no yyoverflow */ - - yyssp = yyss + yysize - 1; - yyvsp = yyvs + yysize - 1; - - YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); - - if (yyss + yystacksize - 1 <= yyssp) - YYABORT; - } - - YYDPRINTF ((stderr, "Entering state %d\n", yystate)); - - if (yystate == YYFINAL) - YYACCEPT; - - goto yybackup; - -/*-----------. -| yybackup. | -`-----------*/ -yybackup: - - /* Do appropriate processing given the current state. Read a - lookahead token if we need one and don't already have one. */ - - /* First try to decide what to do without reference to lookahead token. */ - yyn = yypact[yystate]; - if (yyn == YYPACT_NINF) - goto yydefault; - - /* Not known => get a lookahead token if don't already have one. */ - - /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ - if (yychar == YYEMPTY) - { - YYDPRINTF ((stderr, "Reading a token: ")); - yychar = YYLEX; - } - - if (yychar <= YYEOF) - { - yychar = yytoken = YYEOF; - YYDPRINTF ((stderr, "Now at end of input.\n")); - } - else - { - yytoken = YYTRANSLATE (yychar); - YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); - } - - /* If the proper action on seeing token YYTOKEN is to reduce or to - detect an error, take that action. */ - yyn += yytoken; - if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) - goto yydefault; - yyn = yytable[yyn]; - if (yyn <= 0) - { - if (yyn == 0 || yyn == YYTABLE_NINF) - goto yyerrlab; - yyn = -yyn; - goto yyreduce; - } - - /* Count tokens shifted since error; after three, turn off error - status. */ - if (yyerrstatus) - yyerrstatus--; - - /* Shift the lookahead token. */ - YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); - - /* Discard the shifted token. */ - yychar = YYEMPTY; - - yystate = yyn; - *++yyvsp = yylval; - - goto yynewstate; - - -/*-----------------------------------------------------------. -| yydefault -- do the default action for the current state. | -`-----------------------------------------------------------*/ -yydefault: - yyn = yydefact[yystate]; - if (yyn == 0) - goto yyerrlab; - goto yyreduce; - - -/*-----------------------------. -| yyreduce -- Do a reduction. | -`-----------------------------*/ -yyreduce: - /* yyn is the number of a rule to reduce with. */ - yylen = yyr2[yyn]; - - /* If YYLEN is nonzero, implement the default value of the action: - `$$ = $1'. - - Otherwise, the following line sets YYVAL to garbage. - This behavior is undocumented and Bison - users should not rely upon it. Assigning to YYVAL - unconditionally makes the parser a bit smaller, and it avoids a - GCC warning that YYVAL may be used uninitialized. */ - yyval = yyvsp[1-yylen]; - - - YY_REDUCE_PRINT (yyn); - switch (yyn) - { - case 4: - -/* Line 1455 of yacc.c */ -#line 109 "scripts/genksyms/parse.y" - { is_typedef = 0; is_extern = 0; current_name = NULL; decl_spec = NULL; ;} - break; - - case 5: - -/* Line 1455 of yacc.c */ -#line 111 "scripts/genksyms/parse.y" - { free_list(*(yyvsp[(2) - (2)]), NULL); *(yyvsp[(2) - (2)]) = NULL; ;} - break; - - case 6: - -/* Line 1455 of yacc.c */ -#line 115 "scripts/genksyms/parse.y" - { is_typedef = 1; ;} - break; - - case 7: - -/* Line 1455 of yacc.c */ -#line 116 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 8: - -/* Line 1455 of yacc.c */ -#line 117 "scripts/genksyms/parse.y" - { is_typedef = 1; ;} - break; - - case 9: - -/* Line 1455 of yacc.c */ -#line 118 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 14: - -/* Line 1455 of yacc.c */ -#line 123 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 15: - -/* Line 1455 of yacc.c */ -#line 124 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 16: - -/* Line 1455 of yacc.c */ -#line 129 "scripts/genksyms/parse.y" - { if (current_name) { - struct string_list *decl = (*(yyvsp[(3) - (3)]))->next; - (*(yyvsp[(3) - (3)]))->next = NULL; - add_symbol(current_name, - is_typedef ? SYM_TYPEDEF : SYM_NORMAL, - decl, is_extern); - current_name = NULL; - } - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 17: - -/* Line 1455 of yacc.c */ -#line 142 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 19: - -/* Line 1455 of yacc.c */ -#line 148 "scripts/genksyms/parse.y" - { struct string_list *decl = *(yyvsp[(1) - (1)]); - *(yyvsp[(1) - (1)]) = NULL; - add_symbol(current_name, - is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern); - current_name = NULL; - (yyval) = (yyvsp[(1) - (1)]); - ;} - break; - - case 20: - -/* Line 1455 of yacc.c */ -#line 156 "scripts/genksyms/parse.y" - { struct string_list *decl = *(yyvsp[(3) - (3)]); - *(yyvsp[(3) - (3)]) = NULL; - free_list(*(yyvsp[(2) - (3)]), NULL); - *(yyvsp[(2) - (3)]) = decl_spec; - add_symbol(current_name, - is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern); - current_name = NULL; - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 21: - -/* Line 1455 of yacc.c */ -#line 169 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]) ? (yyvsp[(4) - (4)]) : (yyvsp[(3) - (4)]) ? (yyvsp[(3) - (4)]) : (yyvsp[(2) - (4)]) ? (yyvsp[(2) - (4)]) : (yyvsp[(1) - (4)]); ;} - break; - - case 22: - -/* Line 1455 of yacc.c */ -#line 174 "scripts/genksyms/parse.y" - { decl_spec = NULL; ;} - break; - - case 24: - -/* Line 1455 of yacc.c */ -#line 179 "scripts/genksyms/parse.y" - { decl_spec = *(yyvsp[(1) - (1)]); ;} - break; - - case 25: - -/* Line 1455 of yacc.c */ -#line 180 "scripts/genksyms/parse.y" - { decl_spec = *(yyvsp[(2) - (2)]); ;} - break; - - case 26: - -/* Line 1455 of yacc.c */ -#line 185 "scripts/genksyms/parse.y" - { /* Version 2 checksumming ignores storage class, as that - is really irrelevant to the linkage. */ - remove_node((yyvsp[(1) - (1)])); - (yyval) = (yyvsp[(1) - (1)]); - ;} - break; - - case 31: - -/* Line 1455 of yacc.c */ -#line 197 "scripts/genksyms/parse.y" - { is_extern = 1; (yyval) = (yyvsp[(1) - (1)]); ;} - break; - - case 32: - -/* Line 1455 of yacc.c */ -#line 198 "scripts/genksyms/parse.y" - { is_extern = 0; (yyval) = (yyvsp[(1) - (1)]); ;} - break; - - case 37: - -/* Line 1455 of yacc.c */ -#line 210 "scripts/genksyms/parse.y" - { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_STRUCT; (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 38: - -/* Line 1455 of yacc.c */ -#line 212 "scripts/genksyms/parse.y" - { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_UNION; (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 39: - -/* Line 1455 of yacc.c */ -#line 214 "scripts/genksyms/parse.y" - { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_ENUM; (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 40: - -/* Line 1455 of yacc.c */ -#line 218 "scripts/genksyms/parse.y" - { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; - r = copy_node(i); r->tag = SYM_STRUCT; - r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; - add_symbol(i->string, SYM_STRUCT, s, is_extern); - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 41: - -/* Line 1455 of yacc.c */ -#line 225 "scripts/genksyms/parse.y" - { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; - r = copy_node(i); r->tag = SYM_UNION; - r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; - add_symbol(i->string, SYM_UNION, s, is_extern); - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 42: - -/* Line 1455 of yacc.c */ -#line 232 "scripts/genksyms/parse.y" - { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; - r = copy_node(i); r->tag = SYM_ENUM; - r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; - add_symbol(i->string, SYM_ENUM, s, is_extern); - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 43: - -/* Line 1455 of yacc.c */ -#line 242 "scripts/genksyms/parse.y" - { add_symbol(NULL, SYM_ENUM, NULL, 0); (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 44: - -/* Line 1455 of yacc.c */ -#line 244 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 45: - -/* Line 1455 of yacc.c */ -#line 245 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 56: - -/* Line 1455 of yacc.c */ -#line 259 "scripts/genksyms/parse.y" - { (*(yyvsp[(1) - (1)]))->tag = SYM_TYPEDEF; (yyval) = (yyvsp[(1) - (1)]); ;} - break; - - case 57: - -/* Line 1455 of yacc.c */ -#line 264 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} - break; - - case 58: - -/* Line 1455 of yacc.c */ -#line 268 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 61: - -/* Line 1455 of yacc.c */ -#line 274 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 65: - -/* Line 1455 of yacc.c */ -#line 280 "scripts/genksyms/parse.y" - { /* restrict has no effect in prototypes so ignore it */ - remove_node((yyvsp[(1) - (1)])); - (yyval) = (yyvsp[(1) - (1)]); - ;} - break; - - case 66: - -/* Line 1455 of yacc.c */ -#line 287 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 68: - -/* Line 1455 of yacc.c */ -#line 293 "scripts/genksyms/parse.y" - { if (current_name != NULL) { - error_with_pos("unexpected second declaration name"); - YYERROR; - } else { - current_name = (*(yyvsp[(1) - (1)]))->string; - (yyval) = (yyvsp[(1) - (1)]); - } - ;} - break; - - case 69: - -/* Line 1455 of yacc.c */ -#line 302 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 70: - -/* Line 1455 of yacc.c */ -#line 304 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 71: - -/* Line 1455 of yacc.c */ -#line 306 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 72: - -/* Line 1455 of yacc.c */ -#line 308 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 73: - -/* Line 1455 of yacc.c */ -#line 310 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 74: - -/* Line 1455 of yacc.c */ -#line 316 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 78: - -/* Line 1455 of yacc.c */ -#line 324 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 79: - -/* Line 1455 of yacc.c */ -#line 326 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 80: - -/* Line 1455 of yacc.c */ -#line 328 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 81: - -/* Line 1455 of yacc.c */ -#line 330 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 82: - -/* Line 1455 of yacc.c */ -#line 332 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 83: - -/* Line 1455 of yacc.c */ -#line 336 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 85: - -/* Line 1455 of yacc.c */ -#line 338 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 86: - -/* Line 1455 of yacc.c */ -#line 342 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 89: - -/* Line 1455 of yacc.c */ -#line 349 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 90: - -/* Line 1455 of yacc.c */ -#line 354 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} - break; - - case 91: - -/* Line 1455 of yacc.c */ -#line 359 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} - break; - - case 93: - -/* Line 1455 of yacc.c */ -#line 364 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 94: - -/* Line 1455 of yacc.c */ -#line 366 "scripts/genksyms/parse.y" - { /* For version 2 checksums, we don't want to remember - private parameter names. */ - remove_node((yyvsp[(1) - (1)])); - (yyval) = (yyvsp[(1) - (1)]); - ;} - break; - - case 95: - -/* Line 1455 of yacc.c */ -#line 374 "scripts/genksyms/parse.y" - { remove_node((yyvsp[(1) - (1)])); - (yyval) = (yyvsp[(1) - (1)]); - ;} - break; - - case 96: - -/* Line 1455 of yacc.c */ -#line 378 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 97: - -/* Line 1455 of yacc.c */ -#line 380 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 98: - -/* Line 1455 of yacc.c */ -#line 382 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 99: - -/* Line 1455 of yacc.c */ -#line 384 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 100: - -/* Line 1455 of yacc.c */ -#line 386 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 101: - -/* Line 1455 of yacc.c */ -#line 391 "scripts/genksyms/parse.y" - { struct string_list *decl = *(yyvsp[(2) - (3)]); - *(yyvsp[(2) - (3)]) = NULL; - add_symbol(current_name, SYM_NORMAL, decl, is_extern); - (yyval) = (yyvsp[(3) - (3)]); - ;} - break; - - case 102: - -/* Line 1455 of yacc.c */ -#line 399 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 104: - -/* Line 1455 of yacc.c */ -#line 406 "scripts/genksyms/parse.y" - { remove_list((yyvsp[(2) - (2)]), &(*(yyvsp[(1) - (2)]))->next); (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 105: - -/* Line 1455 of yacc.c */ -#line 410 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 106: - -/* Line 1455 of yacc.c */ -#line 411 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 107: - -/* Line 1455 of yacc.c */ -#line 415 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 110: - -/* Line 1455 of yacc.c */ -#line 421 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 111: - -/* Line 1455 of yacc.c */ -#line 426 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 112: - -/* Line 1455 of yacc.c */ -#line 428 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 113: - -/* Line 1455 of yacc.c */ -#line 432 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 116: - -/* Line 1455 of yacc.c */ -#line 438 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 117: - -/* Line 1455 of yacc.c */ -#line 442 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} - break; - - case 118: - -/* Line 1455 of yacc.c */ -#line 443 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 120: - -/* Line 1455 of yacc.c */ -#line 448 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 121: - -/* Line 1455 of yacc.c */ -#line 452 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 123: - -/* Line 1455 of yacc.c */ -#line 457 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(3) - (3)]); ;} - break; - - case 124: - -/* Line 1455 of yacc.c */ -#line 458 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(4) - (4)]); ;} - break; - - case 127: - -/* Line 1455 of yacc.c */ -#line 467 "scripts/genksyms/parse.y" - { - const char *name = strdup((*(yyvsp[(1) - (1)]))->string); - add_symbol(name, SYM_ENUM_CONST, NULL, 0); - ;} - break; - - case 128: - -/* Line 1455 of yacc.c */ -#line 472 "scripts/genksyms/parse.y" - { - const char *name = strdup((*(yyvsp[(1) - (3)]))->string); - struct string_list *expr = copy_list_range(*(yyvsp[(3) - (3)]), *(yyvsp[(2) - (3)])); - add_symbol(name, SYM_ENUM_CONST, expr, 0); - ;} - break; - - case 129: - -/* Line 1455 of yacc.c */ -#line 479 "scripts/genksyms/parse.y" - { (yyval) = (yyvsp[(2) - (2)]); ;} - break; - - case 130: - -/* Line 1455 of yacc.c */ -#line 483 "scripts/genksyms/parse.y" - { (yyval) = NULL; ;} - break; - - case 132: - -/* Line 1455 of yacc.c */ -#line 489 "scripts/genksyms/parse.y" - { export_symbol((*(yyvsp[(3) - (5)]))->string); (yyval) = (yyvsp[(5) - (5)]); ;} - break; - - - -/* Line 1455 of yacc.c */ -#line 2301 "scripts/genksyms/parse.c" - default: break; - } - YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); - - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - - *++yyvsp = yyval; - - /* Now `shift' the result of the reduction. Determine what state - that goes to, based on the state we popped back to and the rule - number reduced by. */ - - yyn = yyr1[yyn]; - - yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; - if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) - yystate = yytable[yystate]; - else - yystate = yydefgoto[yyn - YYNTOKENS]; - - goto yynewstate; - - -/*------------------------------------. -| yyerrlab -- here on detecting error | -`------------------------------------*/ -yyerrlab: - /* If not already recovering from an error, report this error. */ - if (!yyerrstatus) - { - ++yynerrs; -#if ! YYERROR_VERBOSE - yyerror (YY_("syntax error")); -#else - { - YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); - if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) - { - YYSIZE_T yyalloc = 2 * yysize; - if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) - yyalloc = YYSTACK_ALLOC_MAXIMUM; - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); - yymsg = (char *) YYSTACK_ALLOC (yyalloc); - if (yymsg) - yymsg_alloc = yyalloc; - else - { - yymsg = yymsgbuf; - yymsg_alloc = sizeof yymsgbuf; - } - } - - if (0 < yysize && yysize <= yymsg_alloc) - { - (void) yysyntax_error (yymsg, yystate, yychar); - yyerror (yymsg); - } - else - { - yyerror (YY_("syntax error")); - if (yysize != 0) - goto yyexhaustedlab; - } - } -#endif - } - - - - if (yyerrstatus == 3) - { - /* If just tried and failed to reuse lookahead token after an - error, discard it. */ - - if (yychar <= YYEOF) - { - /* Return failure if at end of input. */ - if (yychar == YYEOF) - YYABORT; - } - else - { - yydestruct ("Error: discarding", - yytoken, &yylval); - yychar = YYEMPTY; - } - } - - /* Else will try to reuse lookahead token after shifting the error - token. */ - goto yyerrlab1; - - -/*---------------------------------------------------. -| yyerrorlab -- error raised explicitly by YYERROR. | -`---------------------------------------------------*/ -yyerrorlab: - - /* Pacify compilers like GCC when the user code never invokes - YYERROR and the label yyerrorlab therefore never appears in user - code. */ - if (/*CONSTCOND*/ 0) - goto yyerrorlab; - - /* Do not reclaim the symbols of the rule which action triggered - this YYERROR. */ - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - yystate = *yyssp; - goto yyerrlab1; - - -/*-------------------------------------------------------------. -| yyerrlab1 -- common code for both syntax error and YYERROR. | -`-------------------------------------------------------------*/ -yyerrlab1: - yyerrstatus = 3; /* Each real token shifted decrements this. */ - - for (;;) - { - yyn = yypact[yystate]; - if (yyn != YYPACT_NINF) - { - yyn += YYTERROR; - if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) - { - yyn = yytable[yyn]; - if (0 < yyn) - break; - } - } - - /* Pop the current state because it cannot handle the error token. */ - if (yyssp == yyss) - YYABORT; - - - yydestruct ("Error: popping", - yystos[yystate], yyvsp); - YYPOPSTACK (1); - yystate = *yyssp; - YY_STACK_PRINT (yyss, yyssp); - } - - *++yyvsp = yylval; - - - /* Shift the error token. */ - YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); - - yystate = yyn; - goto yynewstate; - - -/*-------------------------------------. -| yyacceptlab -- YYACCEPT comes here. | -`-------------------------------------*/ -yyacceptlab: - yyresult = 0; - goto yyreturn; - -/*-----------------------------------. -| yyabortlab -- YYABORT comes here. | -`-----------------------------------*/ -yyabortlab: - yyresult = 1; - goto yyreturn; - -#if !defined(yyoverflow) || YYERROR_VERBOSE -/*-------------------------------------------------. -| yyexhaustedlab -- memory exhaustion comes here. | -`-------------------------------------------------*/ -yyexhaustedlab: - yyerror (YY_("memory exhausted")); - yyresult = 2; - /* Fall through. */ -#endif - -yyreturn: - if (yychar != YYEMPTY) - yydestruct ("Cleanup: discarding lookahead", - yytoken, &yylval); - /* Do not reclaim the symbols of the rule which action triggered - this YYABORT or YYACCEPT. */ - YYPOPSTACK (yylen); - YY_STACK_PRINT (yyss, yyssp); - while (yyssp != yyss) - { - yydestruct ("Cleanup: popping", - yystos[*yyssp], yyvsp); - YYPOPSTACK (1); - } -#ifndef yyoverflow - if (yyss != yyssa) - YYSTACK_FREE (yyss); -#endif -#if YYERROR_VERBOSE - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); -#endif - /* Make sure YYID is used. */ - return YYID (yyresult); -} - - - -/* Line 1675 of yacc.c */ -#line 493 "scripts/genksyms/parse.y" - - -static void -yyerror(const char *e) -{ - error_with_pos("%s", e); -} - diff --git a/scripts/genksyms/parse.h_shipped b/scripts/genksyms/parse.h_shipped deleted file mode 100644 index 5175236..0000000 --- a/scripts/genksyms/parse.h_shipped +++ /dev/null @@ -1,97 +0,0 @@ - -/* A Bison parser, made by GNU Bison 2.4.1. */ - -/* Skeleton interface for Bison's Yacc-like parsers in C - - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . */ - -/* As a special exception, you may create a larger work that contains - part or all of the Bison parser skeleton and distribute that work - under terms of your choice, so long as that work isn't itself a - parser generator using the skeleton or a modified version thereof - as a parser skeleton. Alternatively, if you modify or redistribute - the parser skeleton itself, you may (at your option) remove this - special exception, which will cause the skeleton and the resulting - Bison output files to be licensed under the GNU General Public - License without this special exception. - - This special exception was added by the Free Software Foundation in - version 2.2 of Bison. */ - - -/* Tokens. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - /* Put the tokens into the symbol table, so that GDB and other debuggers - know about them. */ - enum yytokentype { - ASM_KEYW = 258, - ATTRIBUTE_KEYW = 259, - AUTO_KEYW = 260, - BOOL_KEYW = 261, - CHAR_KEYW = 262, - CONST_KEYW = 263, - DOUBLE_KEYW = 264, - ENUM_KEYW = 265, - EXTERN_KEYW = 266, - EXTENSION_KEYW = 267, - FLOAT_KEYW = 268, - INLINE_KEYW = 269, - INT_KEYW = 270, - LONG_KEYW = 271, - REGISTER_KEYW = 272, - RESTRICT_KEYW = 273, - SHORT_KEYW = 274, - SIGNED_KEYW = 275, - STATIC_KEYW = 276, - STRUCT_KEYW = 277, - TYPEDEF_KEYW = 278, - UNION_KEYW = 279, - UNSIGNED_KEYW = 280, - VOID_KEYW = 281, - VOLATILE_KEYW = 282, - TYPEOF_KEYW = 283, - EXPORT_SYMBOL_KEYW = 284, - ASM_PHRASE = 285, - ATTRIBUTE_PHRASE = 286, - BRACE_PHRASE = 287, - BRACKET_PHRASE = 288, - EXPRESSION_PHRASE = 289, - CHAR = 290, - DOTS = 291, - IDENT = 292, - INT = 293, - REAL = 294, - STRING = 295, - TYPE = 296, - OTHER = 297, - FILENAME = 298 - }; -#endif - - - -#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED -typedef int YYSTYPE; -# define YYSTYPE_IS_TRIVIAL 1 -# define yystype YYSTYPE /* obsolescent; will be withdrawn */ -# define YYSTYPE_IS_DECLARED 1 -#endif - -extern YYSTYPE yylval; - - diff --git a/scripts/genksyms/parse.tab.c_shipped b/scripts/genksyms/parse.tab.c_shipped new file mode 100644 index 0000000..61d4a5d --- /dev/null +++ b/scripts/genksyms/parse.tab.c_shipped @@ -0,0 +1,2354 @@ +/* A Bison parser, made by GNU Bison 2.4.3. */ + +/* Skeleton implementation for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2009, 2010 Free Software Foundation, Inc. + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + +/* C LALR(1) parser skeleton written by Richard Stallman, by + simplifying the original so-called "semantic" parser. */ + +/* All symbols defined below should begin with yy or YY, to avoid + infringing on user name space. This should be done even for local + variables, as they might otherwise be expanded by user macros. + There are some unavoidable exceptions within include files to + define necessary library symbols; they are noted "INFRINGES ON + USER NAME SPACE" below. */ + +/* Identify Bison output. */ +#define YYBISON 1 + +/* Bison version. */ +#define YYBISON_VERSION "2.4.3" + +/* Skeleton name. */ +#define YYSKELETON_NAME "yacc.c" + +/* Pure parsers. */ +#define YYPURE 0 + +/* Push parsers. */ +#define YYPUSH 0 + +/* Pull parsers. */ +#define YYPULL 1 + +/* Using locations. */ +#define YYLSP_NEEDED 0 + + + +/* Copy the first part of user declarations. */ + + + +#include +#include +#include +#include "genksyms.h" + +static int is_typedef; +static int is_extern; +static char *current_name; +static struct string_list *decl_spec; + +static void yyerror(const char *); + +static inline void +remove_node(struct string_list **p) +{ + struct string_list *node = *p; + *p = node->next; + free_node(node); +} + +static inline void +remove_list(struct string_list **pb, struct string_list **pe) +{ + struct string_list *b = *pb, *e = *pe; + *pb = e; + free_list(b, e); +} + + + + +/* Enabling traces. */ +#ifndef YYDEBUG +# define YYDEBUG 1 +#endif + +/* Enabling verbose error messages. */ +#ifdef YYERROR_VERBOSE +# undef YYERROR_VERBOSE +# define YYERROR_VERBOSE 1 +#else +# define YYERROR_VERBOSE 0 +#endif + +/* Enabling the token table. */ +#ifndef YYTOKEN_TABLE +# define YYTOKEN_TABLE 0 +#endif + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + ASM_KEYW = 258, + ATTRIBUTE_KEYW = 259, + AUTO_KEYW = 260, + BOOL_KEYW = 261, + CHAR_KEYW = 262, + CONST_KEYW = 263, + DOUBLE_KEYW = 264, + ENUM_KEYW = 265, + EXTERN_KEYW = 266, + EXTENSION_KEYW = 267, + FLOAT_KEYW = 268, + INLINE_KEYW = 269, + INT_KEYW = 270, + LONG_KEYW = 271, + REGISTER_KEYW = 272, + RESTRICT_KEYW = 273, + SHORT_KEYW = 274, + SIGNED_KEYW = 275, + STATIC_KEYW = 276, + STRUCT_KEYW = 277, + TYPEDEF_KEYW = 278, + UNION_KEYW = 279, + UNSIGNED_KEYW = 280, + VOID_KEYW = 281, + VOLATILE_KEYW = 282, + TYPEOF_KEYW = 283, + EXPORT_SYMBOL_KEYW = 284, + ASM_PHRASE = 285, + ATTRIBUTE_PHRASE = 286, + BRACE_PHRASE = 287, + BRACKET_PHRASE = 288, + EXPRESSION_PHRASE = 289, + CHAR = 290, + DOTS = 291, + IDENT = 292, + INT = 293, + REAL = 294, + STRING = 295, + TYPE = 296, + OTHER = 297, + FILENAME = 298 + }; +#endif + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef int YYSTYPE; +# define YYSTYPE_IS_TRIVIAL 1 +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +#endif + + +/* Copy the second part of user declarations. */ + + + +#ifdef short +# undef short +#endif + +#ifdef YYTYPE_UINT8 +typedef YYTYPE_UINT8 yytype_uint8; +#else +typedef unsigned char yytype_uint8; +#endif + +#ifdef YYTYPE_INT8 +typedef YYTYPE_INT8 yytype_int8; +#elif (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +typedef signed char yytype_int8; +#else +typedef short int yytype_int8; +#endif + +#ifdef YYTYPE_UINT16 +typedef YYTYPE_UINT16 yytype_uint16; +#else +typedef unsigned short int yytype_uint16; +#endif + +#ifdef YYTYPE_INT16 +typedef YYTYPE_INT16 yytype_int16; +#else +typedef short int yytype_int16; +#endif + +#ifndef YYSIZE_T +# ifdef __SIZE_TYPE__ +# define YYSIZE_T __SIZE_TYPE__ +# elif defined size_t +# define YYSIZE_T size_t +# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# define YYSIZE_T size_t +# else +# define YYSIZE_T unsigned int +# endif +#endif + +#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) + +#ifndef YY_ +# if defined YYENABLE_NLS && YYENABLE_NLS +# if ENABLE_NLS +# include /* INFRINGES ON USER NAME SPACE */ +# define YY_(msgid) dgettext ("bison-runtime", msgid) +# endif +# endif +# ifndef YY_ +# define YY_(msgid) msgid +# endif +#endif + +/* Suppress unused-variable warnings by "using" E. */ +#if ! defined lint || defined __GNUC__ +# define YYUSE(e) ((void) (e)) +#else +# define YYUSE(e) /* empty */ +#endif + +/* Identity function, used to suppress warnings about constant conditions. */ +#ifndef lint +# define YYID(n) (n) +#else +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static int +YYID (int yyi) +#else +static int +YYID (yyi) + int yyi; +#endif +{ + return yyi; +} +#endif + +#if ! defined yyoverflow || YYERROR_VERBOSE + +/* The parser invokes alloca or malloc; define the necessary symbols. */ + +# ifdef YYSTACK_USE_ALLOCA +# if YYSTACK_USE_ALLOCA +# ifdef __GNUC__ +# define YYSTACK_ALLOC __builtin_alloca +# elif defined __BUILTIN_VA_ARG_INCR +# include /* INFRINGES ON USER NAME SPACE */ +# elif defined _AIX +# define YYSTACK_ALLOC __alloca +# elif defined _MSC_VER +# include /* INFRINGES ON USER NAME SPACE */ +# define alloca _alloca +# else +# define YYSTACK_ALLOC alloca +# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# endif +# endif +# endif + +# ifdef YYSTACK_ALLOC + /* Pacify GCC's `empty if-body' warning. */ +# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) +# ifndef YYSTACK_ALLOC_MAXIMUM + /* The OS might guarantee only one guard page at the bottom of the stack, + and a page size can be as small as 4096 bytes. So we cannot safely + invoke alloca (N) if N exceeds 4096. Use a slightly smaller number + to allow for a few compiler-allocated temporary stack slots. */ +# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ +# endif +# else +# define YYSTACK_ALLOC YYMALLOC +# define YYSTACK_FREE YYFREE +# ifndef YYSTACK_ALLOC_MAXIMUM +# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM +# endif +# if (defined __cplusplus && ! defined _STDLIB_H \ + && ! ((defined YYMALLOC || defined malloc) \ + && (defined YYFREE || defined free))) +# include /* INFRINGES ON USER NAME SPACE */ +# ifndef _STDLIB_H +# define _STDLIB_H 1 +# endif +# endif +# ifndef YYMALLOC +# define YYMALLOC malloc +# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# ifndef YYFREE +# define YYFREE free +# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +void free (void *); /* INFRINGES ON USER NAME SPACE */ +# endif +# endif +# endif +#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ + + +#if (! defined yyoverflow \ + && (! defined __cplusplus \ + || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) + +/* A type that is properly aligned for any stack member. */ +union yyalloc +{ + yytype_int16 yyss_alloc; + YYSTYPE yyvs_alloc; +}; + +/* The size of the maximum gap between one aligned stack and the next. */ +# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) + +/* The size of an array large to enough to hold all stacks, each with + N elements. */ +# define YYSTACK_BYTES(N) \ + ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ + + YYSTACK_GAP_MAXIMUM) + +/* Copy COUNT objects from FROM to TO. The source and destination do + not overlap. */ +# ifndef YYCOPY +# if defined __GNUC__ && 1 < __GNUC__ +# define YYCOPY(To, From, Count) \ + __builtin_memcpy (To, From, (Count) * sizeof (*(From))) +# else +# define YYCOPY(To, From, Count) \ + do \ + { \ + YYSIZE_T yyi; \ + for (yyi = 0; yyi < (Count); yyi++) \ + (To)[yyi] = (From)[yyi]; \ + } \ + while (YYID (0)) +# endif +# endif + +/* Relocate STACK from its old location to the new one. The + local variables YYSIZE and YYSTACKSIZE give the old and new number of + elements in the stack, and YYPTR gives the new location of the + stack. Advance YYPTR to a properly aligned location for the next + stack. */ +# define YYSTACK_RELOCATE(Stack_alloc, Stack) \ + do \ + { \ + YYSIZE_T yynewbytes; \ + YYCOPY (&yyptr->Stack_alloc, Stack, yysize); \ + Stack = &yyptr->Stack_alloc; \ + yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ + yyptr += yynewbytes / sizeof (*yyptr); \ + } \ + while (YYID (0)) + +#endif + +/* YYFINAL -- State number of the termination state. */ +#define YYFINAL 4 +/* YYLAST -- Last index in YYTABLE. */ +#define YYLAST 532 + +/* YYNTOKENS -- Number of terminals. */ +#define YYNTOKENS 53 +/* YYNNTS -- Number of nonterminals. */ +#define YYNNTS 49 +/* YYNRULES -- Number of rules. */ +#define YYNRULES 132 +/* YYNRULES -- Number of states. */ +#define YYNSTATES 188 + +/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ +#define YYUNDEFTOK 2 +#define YYMAXUTOK 298 + +#define YYTRANSLATE(YYX) \ + ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) + +/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ +static const yytype_uint8 yytranslate[] = +{ + 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 47, 49, 48, 2, 46, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 52, 44, + 2, 50, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 51, 2, 45, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 41, 42, 43 +}; + +#if YYDEBUG +/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in + YYRHS. */ +static const yytype_uint16 yyprhs[] = +{ + 0, 0, 3, 5, 8, 9, 12, 13, 18, 19, + 23, 25, 27, 29, 31, 34, 37, 41, 42, 44, + 46, 50, 55, 56, 58, 60, 63, 65, 67, 69, + 71, 73, 75, 77, 79, 81, 87, 92, 95, 98, + 101, 105, 109, 113, 116, 119, 122, 124, 126, 128, + 130, 132, 134, 136, 138, 140, 142, 144, 147, 148, + 150, 152, 155, 157, 159, 161, 163, 166, 168, 170, + 175, 180, 183, 187, 191, 194, 196, 198, 200, 205, + 210, 213, 217, 221, 224, 226, 230, 231, 233, 235, + 239, 242, 245, 247, 248, 250, 252, 257, 262, 265, + 269, 273, 277, 278, 280, 283, 287, 291, 292, 294, + 296, 299, 303, 306, 307, 309, 311, 315, 318, 321, + 323, 326, 327, 330, 334, 339, 341, 345, 347, 351, + 354, 355, 357 +}; + +/* YYRHS -- A `-1'-separated list of the rules' RHS. */ +static const yytype_int8 yyrhs[] = +{ + 54, 0, -1, 55, -1, 54, 55, -1, -1, 56, + 57, -1, -1, 12, 23, 58, 60, -1, -1, 23, + 59, 60, -1, 60, -1, 84, -1, 99, -1, 101, + -1, 1, 44, -1, 1, 45, -1, 64, 61, 44, + -1, -1, 62, -1, 63, -1, 62, 46, 63, -1, + 74, 100, 95, 85, -1, -1, 65, -1, 66, -1, + 65, 66, -1, 67, -1, 68, -1, 5, -1, 17, + -1, 21, -1, 11, -1, 14, -1, 69, -1, 73, + -1, 28, 47, 65, 48, 49, -1, 28, 47, 65, + 49, -1, 22, 37, -1, 24, 37, -1, 10, 37, + -1, 22, 37, 87, -1, 24, 37, 87, -1, 10, + 37, 96, -1, 10, 96, -1, 22, 87, -1, 24, + 87, -1, 7, -1, 19, -1, 15, -1, 16, -1, + 20, -1, 25, -1, 13, -1, 9, -1, 26, -1, + 6, -1, 41, -1, 48, 71, -1, -1, 72, -1, + 73, -1, 72, 73, -1, 8, -1, 27, -1, 31, + -1, 18, -1, 70, 74, -1, 75, -1, 37, -1, + 75, 47, 78, 49, -1, 75, 47, 1, 49, -1, + 75, 33, -1, 47, 74, 49, -1, 47, 1, 49, + -1, 70, 76, -1, 77, -1, 37, -1, 41, -1, + 77, 47, 78, 49, -1, 77, 47, 1, 49, -1, + 77, 33, -1, 47, 76, 49, -1, 47, 1, 49, + -1, 79, 36, -1, 79, -1, 80, 46, 36, -1, + -1, 80, -1, 81, -1, 80, 46, 81, -1, 65, + 82, -1, 70, 82, -1, 83, -1, -1, 37, -1, + 41, -1, 83, 47, 78, 49, -1, 83, 47, 1, + 49, -1, 83, 33, -1, 47, 82, 49, -1, 47, + 1, 49, -1, 64, 74, 32, -1, -1, 86, -1, + 50, 34, -1, 51, 88, 45, -1, 51, 1, 45, + -1, -1, 89, -1, 90, -1, 89, 90, -1, 64, + 91, 44, -1, 1, 44, -1, -1, 92, -1, 93, + -1, 92, 46, 93, -1, 76, 95, -1, 37, 94, + -1, 94, -1, 52, 34, -1, -1, 95, 31, -1, + 51, 97, 45, -1, 51, 97, 46, 45, -1, 98, + -1, 97, 46, 98, -1, 37, -1, 37, 50, 34, + -1, 30, 44, -1, -1, 30, -1, 29, 47, 37, + 49, 44, -1 +}; + +/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ +static const yytype_uint16 yyrline[] = +{ + 0, 104, 104, 105, 109, 109, 115, 115, 117, 117, + 119, 120, 121, 122, 123, 124, 128, 142, 143, 147, + 155, 168, 174, 175, 179, 180, 184, 190, 194, 195, + 196, 197, 198, 202, 203, 204, 205, 209, 211, 213, + 217, 224, 231, 241, 244, 245, 249, 250, 251, 252, + 253, 254, 255, 256, 257, 258, 259, 263, 268, 269, + 273, 274, 278, 278, 278, 279, 287, 288, 292, 301, + 303, 305, 307, 309, 316, 317, 321, 322, 323, 325, + 327, 329, 331, 336, 337, 338, 342, 343, 347, 348, + 353, 358, 360, 364, 365, 373, 377, 379, 381, 383, + 385, 390, 399, 400, 405, 410, 411, 415, 416, 420, + 421, 425, 427, 432, 433, 437, 438, 442, 443, 444, + 448, 452, 453, 457, 458, 462, 463, 466, 471, 479, + 483, 484, 488 +}; +#endif + +#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE +/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. + First, the terminals, then, starting at YYNTOKENS, nonterminals. */ +static const char *const yytname[] = +{ + "$end", "error", "$undefined", "ASM_KEYW", "ATTRIBUTE_KEYW", + "AUTO_KEYW", "BOOL_KEYW", "CHAR_KEYW", "CONST_KEYW", "DOUBLE_KEYW", + "ENUM_KEYW", "EXTERN_KEYW", "EXTENSION_KEYW", "FLOAT_KEYW", + "INLINE_KEYW", "INT_KEYW", "LONG_KEYW", "REGISTER_KEYW", "RESTRICT_KEYW", + "SHORT_KEYW", "SIGNED_KEYW", "STATIC_KEYW", "STRUCT_KEYW", + "TYPEDEF_KEYW", "UNION_KEYW", "UNSIGNED_KEYW", "VOID_KEYW", + "VOLATILE_KEYW", "TYPEOF_KEYW", "EXPORT_SYMBOL_KEYW", "ASM_PHRASE", + "ATTRIBUTE_PHRASE", "BRACE_PHRASE", "BRACKET_PHRASE", + "EXPRESSION_PHRASE", "CHAR", "DOTS", "IDENT", "INT", "REAL", "STRING", + "TYPE", "OTHER", "FILENAME", "';'", "'}'", "','", "'('", "'*'", "')'", + "'='", "'{'", "':'", "$accept", "declaration_seq", "declaration", "$@1", + "declaration1", "$@2", "$@3", "simple_declaration", + "init_declarator_list_opt", "init_declarator_list", "init_declarator", + "decl_specifier_seq_opt", "decl_specifier_seq", "decl_specifier", + "storage_class_specifier", "type_specifier", "simple_type_specifier", + "ptr_operator", "cvar_qualifier_seq_opt", "cvar_qualifier_seq", + "cvar_qualifier", "declarator", "direct_declarator", "nested_declarator", + "direct_nested_declarator", "parameter_declaration_clause", + "parameter_declaration_list_opt", "parameter_declaration_list", + "parameter_declaration", "m_abstract_declarator", + "direct_m_abstract_declarator", "function_definition", "initializer_opt", + "initializer", "class_body", "member_specification_opt", + "member_specification", "member_declaration", + "member_declarator_list_opt", "member_declarator_list", + "member_declarator", "member_bitfield_declarator", "attribute_opt", + "enum_body", "enumerator_list", "enumerator", "asm_definition", + "asm_phrase_opt", "export_definition", 0 +}; +#endif + +# ifdef YYPRINT +/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to + token YYLEX-NUM. */ +static const yytype_uint16 yytoknum[] = +{ + 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, + 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, + 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, + 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, + 295, 296, 297, 298, 59, 125, 44, 40, 42, 41, + 61, 123, 58 +}; +# endif + +/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ +static const yytype_uint8 yyr1[] = +{ + 0, 53, 54, 54, 56, 55, 58, 57, 59, 57, + 57, 57, 57, 57, 57, 57, 60, 61, 61, 62, + 62, 63, 64, 64, 65, 65, 66, 66, 67, 67, + 67, 67, 67, 68, 68, 68, 68, 68, 68, 68, + 68, 68, 68, 68, 68, 68, 69, 69, 69, 69, + 69, 69, 69, 69, 69, 69, 69, 70, 71, 71, + 72, 72, 73, 73, 73, 73, 74, 74, 75, 75, + 75, 75, 75, 75, 76, 76, 77, 77, 77, 77, + 77, 77, 77, 78, 78, 78, 79, 79, 80, 80, + 81, 82, 82, 83, 83, 83, 83, 83, 83, 83, + 83, 84, 85, 85, 86, 87, 87, 88, 88, 89, + 89, 90, 90, 91, 91, 92, 92, 93, 93, 93, + 94, 95, 95, 96, 96, 97, 97, 98, 98, 99, + 100, 100, 101 +}; + +/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ +static const yytype_uint8 yyr2[] = +{ + 0, 2, 1, 2, 0, 2, 0, 4, 0, 3, + 1, 1, 1, 1, 2, 2, 3, 0, 1, 1, + 3, 4, 0, 1, 1, 2, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 5, 4, 2, 2, 2, + 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 2, 0, 1, + 1, 2, 1, 1, 1, 1, 2, 1, 1, 4, + 4, 2, 3, 3, 2, 1, 1, 1, 4, 4, + 2, 3, 3, 2, 1, 3, 0, 1, 1, 3, + 2, 2, 1, 0, 1, 1, 4, 4, 2, 3, + 3, 3, 0, 1, 2, 3, 3, 0, 1, 1, + 2, 3, 2, 0, 1, 1, 3, 2, 2, 1, + 2, 0, 2, 3, 4, 1, 3, 1, 3, 2, + 0, 1, 5 +}; + +/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state + STATE-NUM when YYTABLE doesn't specify something else to do. Zero + means the default is an error. */ +static const yytype_uint8 yydefact[] = +{ + 4, 4, 2, 0, 1, 3, 0, 28, 55, 46, + 62, 53, 0, 31, 0, 52, 32, 48, 49, 29, + 65, 47, 50, 30, 0, 8, 0, 51, 54, 63, + 0, 0, 0, 64, 56, 5, 10, 17, 23, 24, + 26, 27, 33, 34, 11, 12, 13, 14, 15, 39, + 0, 43, 6, 37, 0, 44, 22, 38, 45, 0, + 0, 129, 68, 0, 58, 0, 18, 19, 0, 130, + 67, 25, 42, 127, 0, 125, 22, 40, 0, 113, + 0, 0, 109, 9, 17, 41, 0, 0, 0, 0, + 57, 59, 60, 16, 0, 66, 131, 101, 121, 71, + 0, 0, 123, 0, 7, 112, 106, 76, 77, 0, + 0, 0, 121, 75, 0, 114, 115, 119, 105, 0, + 110, 130, 0, 36, 0, 73, 72, 61, 20, 102, + 0, 93, 0, 84, 87, 88, 128, 124, 126, 118, + 0, 76, 0, 120, 74, 117, 80, 0, 111, 0, + 35, 132, 122, 0, 21, 103, 70, 94, 56, 0, + 93, 90, 92, 69, 83, 0, 82, 81, 0, 0, + 116, 104, 0, 95, 0, 91, 98, 0, 85, 89, + 79, 78, 100, 99, 0, 0, 97, 96 +}; + +/* YYDEFGOTO[NTERM-NUM]. */ +static const yytype_int16 yydefgoto[] = +{ + -1, 1, 2, 3, 35, 76, 56, 36, 65, 66, + 67, 79, 38, 39, 40, 41, 42, 68, 90, 91, + 43, 121, 70, 112, 113, 132, 133, 134, 135, 161, + 162, 44, 154, 155, 55, 80, 81, 82, 114, 115, + 116, 117, 129, 51, 74, 75, 45, 98, 46 +}; + +/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing + STATE-NUM. */ +#define YYPACT_NINF -135 +static const yytype_int16 yypact[] = +{ + -135, 20, -135, 321, -135, -135, 30, -135, -135, -135, + -135, -135, -28, -135, 2, -135, -135, -135, -135, -135, + -135, -135, -135, -135, -6, -135, 9, -135, -135, -135, + -5, 15, -17, -135, -135, -135, -135, 18, 491, -135, + -135, -135, -135, -135, -135, -135, -135, -135, -135, -22, + 31, -135, -135, 19, 106, -135, 491, 19, -135, 491, + 50, -135, -135, 11, -3, 51, 57, -135, 18, -14, + 14, -135, -135, 48, 46, -135, 491, -135, 33, 32, + 59, 154, -135, -135, 18, -135, 365, 56, 60, 61, + -135, -3, -135, -135, 18, -135, -135, -135, -135, -135, + 202, 74, -135, -23, -135, -135, -135, 77, -135, 16, + 101, 49, -135, 34, 92, 93, -135, -135, -135, 94, + -135, 110, 95, -135, 97, -135, -135, -135, -135, -20, + 96, 410, 99, 113, 100, -135, -135, -135, -135, -135, + 103, -135, 107, -135, -135, 111, -135, 239, -135, 32, + -135, -135, -135, 123, -135, -135, -135, -135, -135, 3, + 52, -135, 38, -135, -135, 454, -135, -135, 117, 128, + -135, -135, 134, -135, 135, -135, -135, 276, -135, -135, + -135, -135, -135, -135, 137, 138, -135, -135 +}; + +/* YYPGOTO[NTERM-NUM]. */ +static const yytype_int16 yypgoto[] = +{ + -135, -135, 187, -135, -135, -135, -135, -50, -135, -135, + 98, 0, -59, -37, -135, -135, -135, -77, -135, -135, + -54, -30, -135, -90, -135, -134, -135, -135, 24, -58, + -135, -135, -135, -135, -18, -135, -135, 109, -135, -135, + 44, 87, 84, 148, -135, 102, -135, -135, -135 +}; + +/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If + positive, shift that token. If negative, reduce the rule which + number is the opposite. If zero, do what YYDEFACT says. + If YYTABLE_NINF, syntax error. */ +#define YYTABLE_NINF -109 +static const yytype_int16 yytable[] = +{ + 86, 71, 111, 37, 172, 10, 83, 69, 58, 49, + 92, 152, 88, 169, 73, 20, 96, 140, 97, 142, + 4, 144, 137, 50, 29, 52, 104, 61, 33, 50, + 153, 53, 111, 89, 111, 77, -93, 127, 95, 85, + 157, 131, 59, 185, 173, 54, 57, 99, 62, 71, + 159, 64, -93, 141, 160, 62, 84, 108, 63, 64, + 54, 100, 60, 109, 64, 63, 64, 146, 73, 107, + 54, 176, 111, 108, 47, 48, 84, 105, 106, 109, + 64, 147, 160, 160, 110, 177, 141, 87, 131, 157, + 108, 102, 103, 173, 71, 93, 109, 64, 101, 159, + 64, 174, 175, 94, 118, 124, 131, 78, 136, 125, + 126, 7, 8, 9, 10, 11, 12, 13, 131, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 110, + 26, 27, 28, 29, 30, 143, 148, 33, 105, 149, + 96, 151, 152, -22, 150, 156, 165, 34, 163, 164, + -22, -107, 166, -22, -22, 119, 167, 171, -22, 7, + 8, 9, 10, 11, 12, 13, 180, 15, 16, 17, + 18, 19, 20, 21, 22, 23, 24, 181, 26, 27, + 28, 29, 30, 182, 183, 33, 186, 187, 5, 179, + 120, -22, 128, 170, 139, 34, 145, 72, -22, -108, + 0, -22, -22, 130, 0, 138, -22, 7, 8, 9, + 10, 11, 12, 13, 0, 15, 16, 17, 18, 19, + 20, 21, 22, 23, 24, 0, 26, 27, 28, 29, + 30, 0, 0, 33, 0, 0, 0, 0, -86, 0, + 168, 0, 0, 34, 7, 8, 9, 10, 11, 12, + 13, -86, 15, 16, 17, 18, 19, 20, 21, 22, + 23, 24, 0, 26, 27, 28, 29, 30, 0, 0, + 33, 0, 0, 0, 0, -86, 0, 184, 0, 0, + 34, 7, 8, 9, 10, 11, 12, 13, -86, 15, + 16, 17, 18, 19, 20, 21, 22, 23, 24, 0, + 26, 27, 28, 29, 30, 0, 0, 33, 0, 0, + 0, 0, -86, 0, 0, 0, 0, 34, 0, 0, + 0, 0, 6, 0, 0, -86, 7, 8, 9, 10, + 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 0, 0, 0, 0, 0, -22, 0, + 0, 0, 34, 0, 0, -22, 0, 0, -22, -22, + 7, 8, 9, 10, 11, 12, 13, 0, 15, 16, + 17, 18, 19, 20, 21, 22, 23, 24, 0, 26, + 27, 28, 29, 30, 0, 0, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, + 0, 0, 0, 122, 123, 7, 8, 9, 10, 11, + 12, 13, 0, 15, 16, 17, 18, 19, 20, 21, + 22, 23, 24, 0, 26, 27, 28, 29, 30, 0, + 0, 33, 0, 0, 0, 0, 0, 157, 0, 0, + 0, 158, 0, 0, 0, 0, 0, 159, 64, 7, + 8, 9, 10, 11, 12, 13, 0, 15, 16, 17, + 18, 19, 20, 21, 22, 23, 24, 0, 26, 27, + 28, 29, 30, 0, 0, 33, 0, 0, 0, 0, + 178, 0, 0, 0, 0, 34, 7, 8, 9, 10, + 11, 12, 13, 0, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 0, 26, 27, 28, 29, 30, + 0, 0, 33, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 34 +}; + +static const yytype_int16 yycheck[] = +{ + 59, 38, 79, 3, 1, 8, 56, 37, 26, 37, + 64, 31, 1, 147, 37, 18, 30, 1, 32, 109, + 0, 111, 45, 51, 27, 23, 76, 44, 31, 51, + 50, 37, 109, 63, 111, 53, 33, 91, 68, 57, + 37, 100, 47, 177, 41, 51, 37, 33, 37, 86, + 47, 48, 49, 37, 131, 37, 56, 41, 47, 48, + 51, 47, 47, 47, 48, 47, 48, 33, 37, 37, + 51, 33, 149, 41, 44, 45, 76, 44, 45, 47, + 48, 47, 159, 160, 52, 47, 37, 37, 147, 37, + 41, 45, 46, 41, 131, 44, 47, 48, 50, 47, + 48, 159, 160, 46, 45, 49, 165, 1, 34, 49, + 49, 5, 6, 7, 8, 9, 10, 11, 177, 13, + 14, 15, 16, 17, 18, 19, 20, 21, 22, 52, + 24, 25, 26, 27, 28, 34, 44, 31, 44, 46, + 30, 44, 31, 37, 49, 49, 46, 41, 49, 36, + 44, 45, 49, 47, 48, 1, 49, 34, 52, 5, + 6, 7, 8, 9, 10, 11, 49, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, 49, 24, 25, + 26, 27, 28, 49, 49, 31, 49, 49, 1, 165, + 81, 37, 94, 149, 107, 41, 112, 49, 44, 45, + -1, 47, 48, 1, -1, 103, 52, 5, 6, 7, + 8, 9, 10, 11, -1, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, -1, 24, 25, 26, 27, + 28, -1, -1, 31, -1, -1, -1, -1, 36, -1, + 1, -1, -1, 41, 5, 6, 7, 8, 9, 10, + 11, 49, 13, 14, 15, 16, 17, 18, 19, 20, + 21, 22, -1, 24, 25, 26, 27, 28, -1, -1, + 31, -1, -1, -1, -1, 36, -1, 1, -1, -1, + 41, 5, 6, 7, 8, 9, 10, 11, 49, 13, + 14, 15, 16, 17, 18, 19, 20, 21, 22, -1, + 24, 25, 26, 27, 28, -1, -1, 31, -1, -1, + -1, -1, 36, -1, -1, -1, -1, 41, -1, -1, + -1, -1, 1, -1, -1, 49, 5, 6, 7, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, + 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, + 29, 30, 31, -1, -1, -1, -1, -1, 37, -1, + -1, -1, 41, -1, -1, 44, -1, -1, 47, 48, + 5, 6, 7, 8, 9, 10, 11, -1, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, -1, 24, + 25, 26, 27, 28, -1, -1, 31, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 41, -1, -1, -1, + -1, -1, -1, 48, 49, 5, 6, 7, 8, 9, + 10, 11, -1, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, -1, 24, 25, 26, 27, 28, -1, + -1, 31, -1, -1, -1, -1, -1, 37, -1, -1, + -1, 41, -1, -1, -1, -1, -1, 47, 48, 5, + 6, 7, 8, 9, 10, 11, -1, 13, 14, 15, + 16, 17, 18, 19, 20, 21, 22, -1, 24, 25, + 26, 27, 28, -1, -1, 31, -1, -1, -1, -1, + 36, -1, -1, -1, -1, 41, 5, 6, 7, 8, + 9, 10, 11, -1, 13, 14, 15, 16, 17, 18, + 19, 20, 21, 22, -1, 24, 25, 26, 27, 28, + -1, -1, 31, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 41 +}; + +/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing + symbol of state STATE-NUM. */ +static const yytype_uint8 yystos[] = +{ + 0, 54, 55, 56, 0, 55, 1, 5, 6, 7, + 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 41, 57, 60, 64, 65, 66, + 67, 68, 69, 73, 84, 99, 101, 44, 45, 37, + 51, 96, 23, 37, 51, 87, 59, 37, 87, 47, + 47, 44, 37, 47, 48, 61, 62, 63, 70, 74, + 75, 66, 96, 37, 97, 98, 58, 87, 1, 64, + 88, 89, 90, 60, 64, 87, 65, 37, 1, 74, + 71, 72, 73, 44, 46, 74, 30, 32, 100, 33, + 47, 50, 45, 46, 60, 44, 45, 37, 41, 47, + 52, 70, 76, 77, 91, 92, 93, 94, 45, 1, + 90, 74, 48, 49, 49, 49, 49, 73, 63, 95, + 1, 65, 78, 79, 80, 81, 34, 45, 98, 94, + 1, 37, 76, 34, 76, 95, 33, 47, 44, 46, + 49, 44, 31, 50, 85, 86, 49, 37, 41, 47, + 70, 82, 83, 49, 36, 46, 49, 49, 1, 78, + 93, 34, 1, 41, 82, 82, 33, 47, 36, 81, + 49, 49, 49, 49, 1, 78, 49, 49 +}; + +#define yyerrok (yyerrstatus = 0) +#define yyclearin (yychar = YYEMPTY) +#define YYEMPTY (-2) +#define YYEOF 0 + +#define YYACCEPT goto yyacceptlab +#define YYABORT goto yyabortlab +#define YYERROR goto yyerrorlab + + +/* Like YYERROR except do call yyerror. This remains here temporarily + to ease the transition to the new meaning of YYERROR, for GCC. + Once GCC version 2 has supplanted version 1, this can go. However, + YYFAIL appears to be in use. Nevertheless, it is formally deprecated + in Bison 2.4.2's NEWS entry, where a plan to phase it out is + discussed. */ + +#define YYFAIL goto yyerrlab +#if defined YYFAIL + /* This is here to suppress warnings from the GCC cpp's + -Wunused-macros. Normally we don't worry about that warning, but + some users do, and we want to make it easy for users to remove + YYFAIL uses, which will produce warnings from Bison 2.5. */ +#endif + +#define YYRECOVERING() (!!yyerrstatus) + +#define YYBACKUP(Token, Value) \ +do \ + if (yychar == YYEMPTY && yylen == 1) \ + { \ + yychar = (Token); \ + yylval = (Value); \ + yytoken = YYTRANSLATE (yychar); \ + YYPOPSTACK (1); \ + goto yybackup; \ + } \ + else \ + { \ + yyerror (YY_("syntax error: cannot back up")); \ + YYERROR; \ + } \ +while (YYID (0)) + + +#define YYTERROR 1 +#define YYERRCODE 256 + + +/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. + If N is 0, then set CURRENT to the empty location which ends + the previous symbol: RHS[0] (always defined). */ + +#define YYRHSLOC(Rhs, K) ((Rhs)[K]) +#ifndef YYLLOC_DEFAULT +# define YYLLOC_DEFAULT(Current, Rhs, N) \ + do \ + if (YYID (N)) \ + { \ + (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC (Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC (Rhs, 0).last_column; \ + } \ + while (YYID (0)) +#endif + + +/* YY_LOCATION_PRINT -- Print the location on the stream. + This macro was not mandated originally: define only if we know + we won't break user code: when these are the locations we know. */ + +#ifndef YY_LOCATION_PRINT +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL +# define YY_LOCATION_PRINT(File, Loc) \ + fprintf (File, "%d.%d-%d.%d", \ + (Loc).first_line, (Loc).first_column, \ + (Loc).last_line, (Loc).last_column) +# else +# define YY_LOCATION_PRINT(File, Loc) ((void) 0) +# endif +#endif + + +/* YYLEX -- calling `yylex' with the right arguments. */ + +#ifdef YYLEX_PARAM +# define YYLEX yylex (YYLEX_PARAM) +#else +# define YYLEX yylex () +#endif + +/* Enable debugging if requested. */ +#if YYDEBUG + +# ifndef YYFPRINTF +# include /* INFRINGES ON USER NAME SPACE */ +# define YYFPRINTF fprintf +# endif + +# define YYDPRINTF(Args) \ +do { \ + if (yydebug) \ + YYFPRINTF Args; \ +} while (YYID (0)) + +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ +do { \ + if (yydebug) \ + { \ + YYFPRINTF (stderr, "%s ", Title); \ + yy_symbol_print (stderr, \ + Type, Value); \ + YYFPRINTF (stderr, "\n"); \ + } \ +} while (YYID (0)) + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_value_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (!yyvaluep) + return; +# ifdef YYPRINT + if (yytype < YYNTOKENS) + YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); +# else + YYUSE (yyoutput); +# endif + switch (yytype) + { + default: + break; + } +} + + +/*--------------------------------. +| Print this symbol on YYOUTPUT. | +`--------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) +#else +static void +yy_symbol_print (yyoutput, yytype, yyvaluep) + FILE *yyoutput; + int yytype; + YYSTYPE const * const yyvaluep; +#endif +{ + if (yytype < YYNTOKENS) + YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); + else + YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); + + yy_symbol_value_print (yyoutput, yytype, yyvaluep); + YYFPRINTF (yyoutput, ")"); +} + +/*------------------------------------------------------------------. +| yy_stack_print -- Print the state stack from its BOTTOM up to its | +| TOP (included). | +`------------------------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop) +#else +static void +yy_stack_print (yybottom, yytop) + yytype_int16 *yybottom; + yytype_int16 *yytop; +#endif +{ + YYFPRINTF (stderr, "Stack now"); + for (; yybottom <= yytop; yybottom++) + { + int yybot = *yybottom; + YYFPRINTF (stderr, " %d", yybot); + } + YYFPRINTF (stderr, "\n"); +} + +# define YY_STACK_PRINT(Bottom, Top) \ +do { \ + if (yydebug) \ + yy_stack_print ((Bottom), (Top)); \ +} while (YYID (0)) + + +/*------------------------------------------------. +| Report that the YYRULE is going to be reduced. | +`------------------------------------------------*/ + +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yy_reduce_print (YYSTYPE *yyvsp, int yyrule) +#else +static void +yy_reduce_print (yyvsp, yyrule) + YYSTYPE *yyvsp; + int yyrule; +#endif +{ + int yynrhs = yyr2[yyrule]; + int yyi; + unsigned long int yylno = yyrline[yyrule]; + YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", + yyrule - 1, yylno); + /* The symbols being reduced. */ + for (yyi = 0; yyi < yynrhs; yyi++) + { + YYFPRINTF (stderr, " $%d = ", yyi + 1); + yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], + &(yyvsp[(yyi + 1) - (yynrhs)]) + ); + YYFPRINTF (stderr, "\n"); + } +} + +# define YY_REDUCE_PRINT(Rule) \ +do { \ + if (yydebug) \ + yy_reduce_print (yyvsp, Rule); \ +} while (YYID (0)) + +/* Nonzero means print parse trace. It is left uninitialized so that + multiple parsers can coexist. */ +int yydebug; +#else /* !YYDEBUG */ +# define YYDPRINTF(Args) +# define YY_SYMBOL_PRINT(Title, Type, Value, Location) +# define YY_STACK_PRINT(Bottom, Top) +# define YY_REDUCE_PRINT(Rule) +#endif /* !YYDEBUG */ + + +/* YYINITDEPTH -- initial size of the parser's stacks. */ +#ifndef YYINITDEPTH +# define YYINITDEPTH 200 +#endif + +/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only + if the built-in stack extension method is used). + + Do not make this value too large; the results are undefined if + YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) + evaluated with infinite-precision integer arithmetic. */ + +#ifndef YYMAXDEPTH +# define YYMAXDEPTH 10000 +#endif + + + +#if YYERROR_VERBOSE + +# ifndef yystrlen +# if defined __GLIBC__ && defined _STRING_H +# define yystrlen strlen +# else +/* Return the length of YYSTR. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static YYSIZE_T +yystrlen (const char *yystr) +#else +static YYSIZE_T +yystrlen (yystr) + const char *yystr; +#endif +{ + YYSIZE_T yylen; + for (yylen = 0; yystr[yylen]; yylen++) + continue; + return yylen; +} +# endif +# endif + +# ifndef yystpcpy +# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE +# define yystpcpy stpcpy +# else +/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in + YYDEST. */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static char * +yystpcpy (char *yydest, const char *yysrc) +#else +static char * +yystpcpy (yydest, yysrc) + char *yydest; + const char *yysrc; +#endif +{ + char *yyd = yydest; + const char *yys = yysrc; + + while ((*yyd++ = *yys++) != '\0') + continue; + + return yyd - 1; +} +# endif +# endif + +# ifndef yytnamerr +/* Copy to YYRES the contents of YYSTR after stripping away unnecessary + quotes and backslashes, so that it's suitable for yyerror. The + heuristic is that double-quoting is unnecessary unless the string + contains an apostrophe, a comma, or backslash (other than + backslash-backslash). YYSTR is taken from yytname. If YYRES is + null, do not copy; instead, return the length of what the result + would have been. */ +static YYSIZE_T +yytnamerr (char *yyres, const char *yystr) +{ + if (*yystr == '"') + { + YYSIZE_T yyn = 0; + char const *yyp = yystr; + + for (;;) + switch (*++yyp) + { + case '\'': + case ',': + goto do_not_strip_quotes; + + case '\\': + if (*++yyp != '\\') + goto do_not_strip_quotes; + /* Fall through. */ + default: + if (yyres) + yyres[yyn] = *yyp; + yyn++; + break; + + case '"': + if (yyres) + yyres[yyn] = '\0'; + return yyn; + } + do_not_strip_quotes: ; + } + + if (! yyres) + return yystrlen (yystr); + + return yystpcpy (yyres, yystr) - yyres; +} +# endif + +/* Copy into YYRESULT an error message about the unexpected token + YYCHAR while in state YYSTATE. Return the number of bytes copied, + including the terminating null byte. If YYRESULT is null, do not + copy anything; just return the number of bytes that would be + copied. As a special case, return 0 if an ordinary "syntax error" + message will do. Return YYSIZE_MAXIMUM if overflow occurs during + size calculation. */ +static YYSIZE_T +yysyntax_error (char *yyresult, int yystate, int yychar) +{ + int yyn = yypact[yystate]; + + if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) + return 0; + else + { + int yytype = YYTRANSLATE (yychar); + YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); + YYSIZE_T yysize = yysize0; + YYSIZE_T yysize1; + int yysize_overflow = 0; + enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; + char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; + int yyx; + +# if 0 + /* This is so xgettext sees the translatable formats that are + constructed on the fly. */ + YY_("syntax error, unexpected %s"); + YY_("syntax error, unexpected %s, expecting %s"); + YY_("syntax error, unexpected %s, expecting %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s"); + YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); +# endif + char *yyfmt; + char const *yyf; + static char const yyunexpected[] = "syntax error, unexpected %s"; + static char const yyexpecting[] = ", expecting %s"; + static char const yyor[] = " or %s"; + char yyformat[sizeof yyunexpected + + sizeof yyexpecting - 1 + + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) + * (sizeof yyor - 1))]; + char const *yyprefix = yyexpecting; + + /* Start YYX at -YYN if negative to avoid negative indexes in + YYCHECK. */ + int yyxbegin = yyn < 0 ? -yyn : 0; + + /* Stay within bounds of both yycheck and yytname. */ + int yychecklim = YYLAST - yyn + 1; + int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; + int yycount = 1; + + yyarg[0] = yytname[yytype]; + yyfmt = yystpcpy (yyformat, yyunexpected); + + for (yyx = yyxbegin; yyx < yyxend; ++yyx) + if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) + { + if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) + { + yycount = 1; + yysize = yysize0; + yyformat[sizeof yyunexpected - 1] = '\0'; + break; + } + yyarg[yycount++] = yytname[yyx]; + yysize1 = yysize + yytnamerr (0, yytname[yyx]); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + yyfmt = yystpcpy (yyfmt, yyprefix); + yyprefix = yyor; + } + + yyf = YY_(yyformat); + yysize1 = yysize + yystrlen (yyf); + yysize_overflow |= (yysize1 < yysize); + yysize = yysize1; + + if (yysize_overflow) + return YYSIZE_MAXIMUM; + + if (yyresult) + { + /* Avoid sprintf, as that infringes on the user's name space. + Don't have undefined behavior even if the translation + produced a string with the wrong number of "%s"s. */ + char *yyp = yyresult; + int yyi = 0; + while ((*yyp = *yyf) != '\0') + { + if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) + { + yyp += yytnamerr (yyp, yyarg[yyi++]); + yyf += 2; + } + else + { + yyp++; + yyf++; + } + } + } + return yysize; + } +} +#endif /* YYERROR_VERBOSE */ + + +/*-----------------------------------------------. +| Release the memory associated to this symbol. | +`-----------------------------------------------*/ + +/*ARGSUSED*/ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +static void +yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) +#else +static void +yydestruct (yymsg, yytype, yyvaluep) + const char *yymsg; + int yytype; + YYSTYPE *yyvaluep; +#endif +{ + YYUSE (yyvaluep); + + if (!yymsg) + yymsg = "Deleting"; + YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); + + switch (yytype) + { + + default: + break; + } +} + +/* Prevent warnings from -Wmissing-prototypes. */ +#ifdef YYPARSE_PARAM +#if defined __STDC__ || defined __cplusplus +int yyparse (void *YYPARSE_PARAM); +#else +int yyparse (); +#endif +#else /* ! YYPARSE_PARAM */ +#if defined __STDC__ || defined __cplusplus +int yyparse (void); +#else +int yyparse (); +#endif +#endif /* ! YYPARSE_PARAM */ + + +/* The lookahead symbol. */ +int yychar; + +/* The semantic value of the lookahead symbol. */ +YYSTYPE yylval; + +/* Number of syntax errors so far. */ +int yynerrs; + + + +/*-------------------------. +| yyparse or yypush_parse. | +`-------------------------*/ + +#ifdef YYPARSE_PARAM +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void *YYPARSE_PARAM) +#else +int +yyparse (YYPARSE_PARAM) + void *YYPARSE_PARAM; +#endif +#else /* ! YYPARSE_PARAM */ +#if (defined __STDC__ || defined __C99__FUNC__ \ + || defined __cplusplus || defined _MSC_VER) +int +yyparse (void) +#else +int +yyparse () + +#endif +#endif +{ + + + int yystate; + /* Number of tokens to shift before error messages enabled. */ + int yyerrstatus; + + /* The stacks and their tools: + `yyss': related to states. + `yyvs': related to semantic values. + + Refer to the stacks thru separate pointers, to allow yyoverflow + to reallocate them elsewhere. */ + + /* The state stack. */ + yytype_int16 yyssa[YYINITDEPTH]; + yytype_int16 *yyss; + yytype_int16 *yyssp; + + /* The semantic value stack. */ + YYSTYPE yyvsa[YYINITDEPTH]; + YYSTYPE *yyvs; + YYSTYPE *yyvsp; + + YYSIZE_T yystacksize; + + int yyn; + int yyresult; + /* Lookahead token as an internal (translated) token number. */ + int yytoken; + /* The variables used to return semantic value and location from the + action routines. */ + YYSTYPE yyval; + +#if YYERROR_VERBOSE + /* Buffer for error messages, and its allocated size. */ + char yymsgbuf[128]; + char *yymsg = yymsgbuf; + YYSIZE_T yymsg_alloc = sizeof yymsgbuf; +#endif + +#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) + + /* The number of symbols on the RHS of the reduced rule. + Keep to zero when no symbol should be popped. */ + int yylen = 0; + + yytoken = 0; + yyss = yyssa; + yyvs = yyvsa; + yystacksize = YYINITDEPTH; + + YYDPRINTF ((stderr, "Starting parse\n")); + + yystate = 0; + yyerrstatus = 0; + yynerrs = 0; + yychar = YYEMPTY; /* Cause a token to be read. */ + + /* Initialize stack pointers. + Waste one element of value and location stack + so that they stay on the same level as the state stack. + The wasted elements are never initialized. */ + yyssp = yyss; + yyvsp = yyvs; + + goto yysetstate; + +/*------------------------------------------------------------. +| yynewstate -- Push a new state, which is found in yystate. | +`------------------------------------------------------------*/ + yynewstate: + /* In all cases, when you get here, the value and location stacks + have just been pushed. So pushing a state here evens the stacks. */ + yyssp++; + + yysetstate: + *yyssp = yystate; + + if (yyss + yystacksize - 1 <= yyssp) + { + /* Get the current used size of the three stacks, in elements. */ + YYSIZE_T yysize = yyssp - yyss + 1; + +#ifdef yyoverflow + { + /* Give user a chance to reallocate the stack. Use copies of + these so that the &'s don't force the real ones into + memory. */ + YYSTYPE *yyvs1 = yyvs; + yytype_int16 *yyss1 = yyss; + + /* Each stack pointer address is followed by the size of the + data in use in that stack, in bytes. This used to be a + conditional around just the two extra args, but that might + be undefined if yyoverflow is a macro. */ + yyoverflow (YY_("memory exhausted"), + &yyss1, yysize * sizeof (*yyssp), + &yyvs1, yysize * sizeof (*yyvsp), + &yystacksize); + + yyss = yyss1; + yyvs = yyvs1; + } +#else /* no yyoverflow */ +# ifndef YYSTACK_RELOCATE + goto yyexhaustedlab; +# else + /* Extend the stack our own way. */ + if (YYMAXDEPTH <= yystacksize) + goto yyexhaustedlab; + yystacksize *= 2; + if (YYMAXDEPTH < yystacksize) + yystacksize = YYMAXDEPTH; + + { + yytype_int16 *yyss1 = yyss; + union yyalloc *yyptr = + (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); + if (! yyptr) + goto yyexhaustedlab; + YYSTACK_RELOCATE (yyss_alloc, yyss); + YYSTACK_RELOCATE (yyvs_alloc, yyvs); +# undef YYSTACK_RELOCATE + if (yyss1 != yyssa) + YYSTACK_FREE (yyss1); + } +# endif +#endif /* no yyoverflow */ + + yyssp = yyss + yysize - 1; + yyvsp = yyvs + yysize - 1; + + YYDPRINTF ((stderr, "Stack size increased to %lu\n", + (unsigned long int) yystacksize)); + + if (yyss + yystacksize - 1 <= yyssp) + YYABORT; + } + + YYDPRINTF ((stderr, "Entering state %d\n", yystate)); + + if (yystate == YYFINAL) + YYACCEPT; + + goto yybackup; + +/*-----------. +| yybackup. | +`-----------*/ +yybackup: + + /* Do appropriate processing given the current state. Read a + lookahead token if we need one and don't already have one. */ + + /* First try to decide what to do without reference to lookahead token. */ + yyn = yypact[yystate]; + if (yyn == YYPACT_NINF) + goto yydefault; + + /* Not known => get a lookahead token if don't already have one. */ + + /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ + if (yychar == YYEMPTY) + { + YYDPRINTF ((stderr, "Reading a token: ")); + yychar = YYLEX; + } + + if (yychar <= YYEOF) + { + yychar = yytoken = YYEOF; + YYDPRINTF ((stderr, "Now at end of input.\n")); + } + else + { + yytoken = YYTRANSLATE (yychar); + YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); + } + + /* If the proper action on seeing token YYTOKEN is to reduce or to + detect an error, take that action. */ + yyn += yytoken; + if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) + goto yydefault; + yyn = yytable[yyn]; + if (yyn <= 0) + { + if (yyn == 0 || yyn == YYTABLE_NINF) + goto yyerrlab; + yyn = -yyn; + goto yyreduce; + } + + /* Count tokens shifted since error; after three, turn off error + status. */ + if (yyerrstatus) + yyerrstatus--; + + /* Shift the lookahead token. */ + YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); + + /* Discard the shifted token. */ + yychar = YYEMPTY; + + yystate = yyn; + *++yyvsp = yylval; + + goto yynewstate; + + +/*-----------------------------------------------------------. +| yydefault -- do the default action for the current state. | +`-----------------------------------------------------------*/ +yydefault: + yyn = yydefact[yystate]; + if (yyn == 0) + goto yyerrlab; + goto yyreduce; + + +/*-----------------------------. +| yyreduce -- Do a reduction. | +`-----------------------------*/ +yyreduce: + /* yyn is the number of a rule to reduce with. */ + yylen = yyr2[yyn]; + + /* If YYLEN is nonzero, implement the default value of the action: + `$$ = $1'. + + Otherwise, the following line sets YYVAL to garbage. + This behavior is undocumented and Bison + users should not rely upon it. Assigning to YYVAL + unconditionally makes the parser a bit smaller, and it avoids a + GCC warning that YYVAL may be used uninitialized. */ + yyval = yyvsp[1-yylen]; + + + YY_REDUCE_PRINT (yyn); + switch (yyn) + { + case 4: + + { is_typedef = 0; is_extern = 0; current_name = NULL; decl_spec = NULL; ;} + break; + + case 5: + + { free_list(*(yyvsp[(2) - (2)]), NULL); *(yyvsp[(2) - (2)]) = NULL; ;} + break; + + case 6: + + { is_typedef = 1; ;} + break; + + case 7: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 8: + + { is_typedef = 1; ;} + break; + + case 9: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 14: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 15: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 16: + + { if (current_name) { + struct string_list *decl = (*(yyvsp[(3) - (3)]))->next; + (*(yyvsp[(3) - (3)]))->next = NULL; + add_symbol(current_name, + is_typedef ? SYM_TYPEDEF : SYM_NORMAL, + decl, is_extern); + current_name = NULL; + } + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 17: + + { (yyval) = NULL; ;} + break; + + case 19: + + { struct string_list *decl = *(yyvsp[(1) - (1)]); + *(yyvsp[(1) - (1)]) = NULL; + add_symbol(current_name, + is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern); + current_name = NULL; + (yyval) = (yyvsp[(1) - (1)]); + ;} + break; + + case 20: + + { struct string_list *decl = *(yyvsp[(3) - (3)]); + *(yyvsp[(3) - (3)]) = NULL; + free_list(*(yyvsp[(2) - (3)]), NULL); + *(yyvsp[(2) - (3)]) = decl_spec; + add_symbol(current_name, + is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern); + current_name = NULL; + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 21: + + { (yyval) = (yyvsp[(4) - (4)]) ? (yyvsp[(4) - (4)]) : (yyvsp[(3) - (4)]) ? (yyvsp[(3) - (4)]) : (yyvsp[(2) - (4)]) ? (yyvsp[(2) - (4)]) : (yyvsp[(1) - (4)]); ;} + break; + + case 22: + + { decl_spec = NULL; ;} + break; + + case 24: + + { decl_spec = *(yyvsp[(1) - (1)]); ;} + break; + + case 25: + + { decl_spec = *(yyvsp[(2) - (2)]); ;} + break; + + case 26: + + { /* Version 2 checksumming ignores storage class, as that + is really irrelevant to the linkage. */ + remove_node((yyvsp[(1) - (1)])); + (yyval) = (yyvsp[(1) - (1)]); + ;} + break; + + case 31: + + { is_extern = 1; (yyval) = (yyvsp[(1) - (1)]); ;} + break; + + case 32: + + { is_extern = 0; (yyval) = (yyvsp[(1) - (1)]); ;} + break; + + case 37: + + { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_STRUCT; (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 38: + + { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_UNION; (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 39: + + { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_ENUM; (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 40: + + { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; + r = copy_node(i); r->tag = SYM_STRUCT; + r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; + add_symbol(i->string, SYM_STRUCT, s, is_extern); + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 41: + + { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; + r = copy_node(i); r->tag = SYM_UNION; + r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; + add_symbol(i->string, SYM_UNION, s, is_extern); + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 42: + + { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r; + r = copy_node(i); r->tag = SYM_ENUM; + r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL; + add_symbol(i->string, SYM_ENUM, s, is_extern); + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 43: + + { add_symbol(NULL, SYM_ENUM, NULL, 0); (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 44: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 45: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 56: + + { (*(yyvsp[(1) - (1)]))->tag = SYM_TYPEDEF; (yyval) = (yyvsp[(1) - (1)]); ;} + break; + + case 57: + + { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} + break; + + case 58: + + { (yyval) = NULL; ;} + break; + + case 61: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 65: + + { /* restrict has no effect in prototypes so ignore it */ + remove_node((yyvsp[(1) - (1)])); + (yyval) = (yyvsp[(1) - (1)]); + ;} + break; + + case 66: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 68: + + { if (current_name != NULL) { + error_with_pos("unexpected second declaration name"); + YYERROR; + } else { + current_name = (*(yyvsp[(1) - (1)]))->string; + (yyval) = (yyvsp[(1) - (1)]); + } + ;} + break; + + case 69: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 70: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 71: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 72: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 73: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 74: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 78: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 79: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 80: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 81: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 82: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 83: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 85: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 86: + + { (yyval) = NULL; ;} + break; + + case 89: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 90: + + { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} + break; + + case 91: + + { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} + break; + + case 93: + + { (yyval) = NULL; ;} + break; + + case 94: + + { /* For version 2 checksums, we don't want to remember + private parameter names. */ + remove_node((yyvsp[(1) - (1)])); + (yyval) = (yyvsp[(1) - (1)]); + ;} + break; + + case 95: + + { remove_node((yyvsp[(1) - (1)])); + (yyval) = (yyvsp[(1) - (1)]); + ;} + break; + + case 96: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 97: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 98: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 99: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 100: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 101: + + { struct string_list *decl = *(yyvsp[(2) - (3)]); + *(yyvsp[(2) - (3)]) = NULL; + add_symbol(current_name, SYM_NORMAL, decl, is_extern); + (yyval) = (yyvsp[(3) - (3)]); + ;} + break; + + case 102: + + { (yyval) = NULL; ;} + break; + + case 104: + + { remove_list((yyvsp[(2) - (2)]), &(*(yyvsp[(1) - (2)]))->next); (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 105: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 106: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 107: + + { (yyval) = NULL; ;} + break; + + case 110: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 111: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 112: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 113: + + { (yyval) = NULL; ;} + break; + + case 116: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 117: + + { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;} + break; + + case 118: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 120: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 121: + + { (yyval) = NULL; ;} + break; + + case 123: + + { (yyval) = (yyvsp[(3) - (3)]); ;} + break; + + case 124: + + { (yyval) = (yyvsp[(4) - (4)]); ;} + break; + + case 127: + + { + const char *name = strdup((*(yyvsp[(1) - (1)]))->string); + add_symbol(name, SYM_ENUM_CONST, NULL, 0); + ;} + break; + + case 128: + + { + const char *name = strdup((*(yyvsp[(1) - (3)]))->string); + struct string_list *expr = copy_list_range(*(yyvsp[(3) - (3)]), *(yyvsp[(2) - (3)])); + add_symbol(name, SYM_ENUM_CONST, expr, 0); + ;} + break; + + case 129: + + { (yyval) = (yyvsp[(2) - (2)]); ;} + break; + + case 130: + + { (yyval) = NULL; ;} + break; + + case 132: + + { export_symbol((*(yyvsp[(3) - (5)]))->string); (yyval) = (yyvsp[(5) - (5)]); ;} + break; + + + + default: break; + } + YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); + + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + + *++yyvsp = yyval; + + /* Now `shift' the result of the reduction. Determine what state + that goes to, based on the state we popped back to and the rule + number reduced by. */ + + yyn = yyr1[yyn]; + + yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; + if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) + yystate = yytable[yystate]; + else + yystate = yydefgoto[yyn - YYNTOKENS]; + + goto yynewstate; + + +/*------------------------------------. +| yyerrlab -- here on detecting error | +`------------------------------------*/ +yyerrlab: + /* If not already recovering from an error, report this error. */ + if (!yyerrstatus) + { + ++yynerrs; +#if ! YYERROR_VERBOSE + yyerror (YY_("syntax error")); +#else + { + YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); + if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) + { + YYSIZE_T yyalloc = 2 * yysize; + if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) + yyalloc = YYSTACK_ALLOC_MAXIMUM; + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); + yymsg = (char *) YYSTACK_ALLOC (yyalloc); + if (yymsg) + yymsg_alloc = yyalloc; + else + { + yymsg = yymsgbuf; + yymsg_alloc = sizeof yymsgbuf; + } + } + + if (0 < yysize && yysize <= yymsg_alloc) + { + (void) yysyntax_error (yymsg, yystate, yychar); + yyerror (yymsg); + } + else + { + yyerror (YY_("syntax error")); + if (yysize != 0) + goto yyexhaustedlab; + } + } +#endif + } + + + + if (yyerrstatus == 3) + { + /* If just tried and failed to reuse lookahead token after an + error, discard it. */ + + if (yychar <= YYEOF) + { + /* Return failure if at end of input. */ + if (yychar == YYEOF) + YYABORT; + } + else + { + yydestruct ("Error: discarding", + yytoken, &yylval); + yychar = YYEMPTY; + } + } + + /* Else will try to reuse lookahead token after shifting the error + token. */ + goto yyerrlab1; + + +/*---------------------------------------------------. +| yyerrorlab -- error raised explicitly by YYERROR. | +`---------------------------------------------------*/ +yyerrorlab: + + /* Pacify compilers like GCC when the user code never invokes + YYERROR and the label yyerrorlab therefore never appears in user + code. */ + if (/*CONSTCOND*/ 0) + goto yyerrorlab; + + /* Do not reclaim the symbols of the rule which action triggered + this YYERROR. */ + YYPOPSTACK (yylen); + yylen = 0; + YY_STACK_PRINT (yyss, yyssp); + yystate = *yyssp; + goto yyerrlab1; + + +/*-------------------------------------------------------------. +| yyerrlab1 -- common code for both syntax error and YYERROR. | +`-------------------------------------------------------------*/ +yyerrlab1: + yyerrstatus = 3; /* Each real token shifted decrements this. */ + + for (;;) + { + yyn = yypact[yystate]; + if (yyn != YYPACT_NINF) + { + yyn += YYTERROR; + if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) + { + yyn = yytable[yyn]; + if (0 < yyn) + break; + } + } + + /* Pop the current state because it cannot handle the error token. */ + if (yyssp == yyss) + YYABORT; + + + yydestruct ("Error: popping", + yystos[yystate], yyvsp); + YYPOPSTACK (1); + yystate = *yyssp; + YY_STACK_PRINT (yyss, yyssp); + } + + *++yyvsp = yylval; + + + /* Shift the error token. */ + YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); + + yystate = yyn; + goto yynewstate; + + +/*-------------------------------------. +| yyacceptlab -- YYACCEPT comes here. | +`-------------------------------------*/ +yyacceptlab: + yyresult = 0; + goto yyreturn; + +/*-----------------------------------. +| yyabortlab -- YYABORT comes here. | +`-----------------------------------*/ +yyabortlab: + yyresult = 1; + goto yyreturn; + +#if !defined(yyoverflow) || YYERROR_VERBOSE +/*-------------------------------------------------. +| yyexhaustedlab -- memory exhaustion comes here. | +`-------------------------------------------------*/ +yyexhaustedlab: + yyerror (YY_("memory exhausted")); + yyresult = 2; + /* Fall through. */ +#endif + +yyreturn: + if (yychar != YYEMPTY) + yydestruct ("Cleanup: discarding lookahead", + yytoken, &yylval); + /* Do not reclaim the symbols of the rule which action triggered + this YYABORT or YYACCEPT. */ + YYPOPSTACK (yylen); + YY_STACK_PRINT (yyss, yyssp); + while (yyssp != yyss) + { + yydestruct ("Cleanup: popping", + yystos[*yyssp], yyvsp); + YYPOPSTACK (1); + } +#ifndef yyoverflow + if (yyss != yyssa) + YYSTACK_FREE (yyss); +#endif +#if YYERROR_VERBOSE + if (yymsg != yymsgbuf) + YYSTACK_FREE (yymsg); +#endif + /* Make sure YYID is used. */ + return YYID (yyresult); +} + + + + + +static void +yyerror(const char *e) +{ + error_with_pos("%s", e); +} + diff --git a/scripts/genksyms/parse.tab.h_shipped b/scripts/genksyms/parse.tab.h_shipped new file mode 100644 index 0000000..350c2b4 --- /dev/null +++ b/scripts/genksyms/parse.tab.h_shipped @@ -0,0 +1,96 @@ +/* A Bison parser, made by GNU Bison 2.4.3. */ + +/* Skeleton interface for Bison's Yacc-like parsers in C + + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2009, 2010 Free Software Foundation, Inc. + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* As a special exception, you may create a larger work that contains + part or all of the Bison parser skeleton and distribute that work + under terms of your choice, so long as that work isn't itself a + parser generator using the skeleton or a modified version thereof + as a parser skeleton. Alternatively, if you modify or redistribute + the parser skeleton itself, you may (at your option) remove this + special exception, which will cause the skeleton and the resulting + Bison output files to be licensed under the GNU General Public + License without this special exception. + + This special exception was added by the Free Software Foundation in + version 2.2 of Bison. */ + + +/* Tokens. */ +#ifndef YYTOKENTYPE +# define YYTOKENTYPE + /* Put the tokens into the symbol table, so that GDB and other debuggers + know about them. */ + enum yytokentype { + ASM_KEYW = 258, + ATTRIBUTE_KEYW = 259, + AUTO_KEYW = 260, + BOOL_KEYW = 261, + CHAR_KEYW = 262, + CONST_KEYW = 263, + DOUBLE_KEYW = 264, + ENUM_KEYW = 265, + EXTERN_KEYW = 266, + EXTENSION_KEYW = 267, + FLOAT_KEYW = 268, + INLINE_KEYW = 269, + INT_KEYW = 270, + LONG_KEYW = 271, + REGISTER_KEYW = 272, + RESTRICT_KEYW = 273, + SHORT_KEYW = 274, + SIGNED_KEYW = 275, + STATIC_KEYW = 276, + STRUCT_KEYW = 277, + TYPEDEF_KEYW = 278, + UNION_KEYW = 279, + UNSIGNED_KEYW = 280, + VOID_KEYW = 281, + VOLATILE_KEYW = 282, + TYPEOF_KEYW = 283, + EXPORT_SYMBOL_KEYW = 284, + ASM_PHRASE = 285, + ATTRIBUTE_PHRASE = 286, + BRACE_PHRASE = 287, + BRACKET_PHRASE = 288, + EXPRESSION_PHRASE = 289, + CHAR = 290, + DOTS = 291, + IDENT = 292, + INT = 293, + REAL = 294, + STRING = 295, + TYPE = 296, + OTHER = 297, + FILENAME = 298 + }; +#endif + + + +#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED +typedef int YYSTYPE; +# define YYSTYPE_IS_TRIVIAL 1 +# define yystype YYSTYPE /* obsolescent; will be withdrawn */ +# define YYSTYPE_IS_DECLARED 1 +#endif + +extern YYSTYPE yylval; + + -- cgit v0.10.2 From 61f956f576031bea270ea54b10411ebb1e172b1b Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Wed, 4 May 2011 21:14:44 -0400 Subject: kconfig: constify `kconf_id_lookup' Signed-off-by: Arnaud Lacombe diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index faa9a47..bde4529 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -356,7 +356,7 @@ lex.%.c: %.l cp $@ $@_shipped %.hash.c: %.gperf - gperf < $< > $@ + gperf -C < $< > $@ cp $@ $@_shipped endif diff --git a/scripts/kconfig/zconf.gperf b/scripts/kconfig/zconf.gperf index c9e690e..f14ab41 100644 --- a/scripts/kconfig/zconf.gperf +++ b/scripts/kconfig/zconf.gperf @@ -9,7 +9,7 @@ struct kconf_id; -static struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); +static const struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); %% mainmenu, T_MAINMENU, TF_COMMAND diff --git a/scripts/kconfig/zconf.l b/scripts/kconfig/zconf.l index b22f884..98aad53 100644 --- a/scripts/kconfig/zconf.l +++ b/scripts/kconfig/zconf.l @@ -96,7 +96,7 @@ n [A-Za-z0-9_] { {n}+ { - struct kconf_id *id = kconf_id_lookup(yytext, yyleng); + const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); BEGIN(PARAM); current_pos.file = current_file; current_pos.lineno = current_file->lineno; @@ -132,7 +132,7 @@ n [A-Za-z0-9_] \n BEGIN(INITIAL); current_file->lineno++; return T_EOL; --- /* ignore */ ({n}|[-/.])+ { - struct kconf_id *id = kconf_id_lookup(yytext, yyleng); + const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); if (id && id->flags & TF_PARAM) { zconflval.id = id; return id->token; diff --git a/scripts/kconfig/zconf.y b/scripts/kconfig/zconf.y index 49fb4ab..98c5716 100644 --- a/scripts/kconfig/zconf.y +++ b/scripts/kconfig/zconf.y @@ -25,7 +25,7 @@ extern int zconflex(void); static void zconfprint(const char *err, ...); static void zconf_error(const char *err, ...); static void zconferror(const char *err); -static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken); +static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken); struct symbol *symbol_hash[SYMBOL_HASHSIZE]; @@ -45,7 +45,7 @@ static struct menu *current_menu, *current_entry; struct symbol *symbol; struct expr *expr; struct menu *menu; - struct kconf_id *id; + const struct kconf_id *id; } %token T_MAINMENU @@ -229,7 +229,7 @@ symbol_option_list: /* empty */ | symbol_option_list T_WORD symbol_option_arg { - struct kconf_id *id = kconf_id_lookup($2, strlen($2)); + const struct kconf_id *id = kconf_id_lookup($2, strlen($2)); if (id && id->flags & TF_OPTION) menu_add_option(id->token, $3); else @@ -545,7 +545,7 @@ static const char *zconf_tokenname(int token) return ""; } -static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken) +static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken) { if (id->token != endtoken) { zconf_error("unexpected '%s' within %s block", -- cgit v0.10.2 From b96a0d0c78c878db6e6b5c02587ba69973e22d41 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 02:08:18 -0400 Subject: kconfig: kill no longer needed reference to YYDEBUG Signed-off-by: Arnaud Lacombe diff --git a/scripts/kconfig/lkc.h b/scripts/kconfig/lkc.h index febf0c9..f34a0a9 100644 --- a/scripts/kconfig/lkc.h +++ b/scripts/kconfig/lkc.h @@ -68,9 +68,7 @@ struct kconf_id { enum symbol_type stype; }; -#ifdef YYDEBUG extern int zconfdebug; -#endif int zconfparse(void); void zconfdump(FILE *out); diff --git a/scripts/kconfig/zconf.y b/scripts/kconfig/zconf.y index 98c5716..377d04d 100644 --- a/scripts/kconfig/zconf.y +++ b/scripts/kconfig/zconf.y @@ -31,10 +31,6 @@ struct symbol *symbol_hash[SYMBOL_HASHSIZE]; static struct menu *current_menu, *current_entry; -#define YYDEBUG 0 -#if YYDEBUG -#define YYERROR_VERBOSE -#endif %} %expect 30 @@ -503,10 +499,8 @@ void conf_parse(const char *name) modules_sym->flags |= SYMBOL_AUTO; rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL); -#if YYDEBUG if (getenv("ZCONF_DEBUG")) zconfdebug = 1; -#endif zconfparse(); if (zconfnerrs) exit(1); @@ -590,9 +584,7 @@ static void zconf_error(const char *err, ...) static void zconferror(const char *err) { -#if YYDEBUG fprintf(stderr, "%s:%d: %s\n", zconf_curname(), zconf_lineno() + 1, err); -#endif } static void print_quoted_string(FILE *out, const char *str) -- cgit v0.10.2 From 674eed8a6ac9d10b4ee08f497dbe20d75bfa863d Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Tue, 7 Jun 2011 13:34:05 -0400 Subject: kconfig/zconf.l: do not ask to generate backup This avoids the creation of a top-level `lex.backup' when the lexer gets re-generated. Signed-off-by: Arnaud Lacombe diff --git a/scripts/kconfig/zconf.l b/scripts/kconfig/zconf.l index 98aad53..ddee5fc 100644 --- a/scripts/kconfig/zconf.l +++ b/scripts/kconfig/zconf.l @@ -1,5 +1,5 @@ -%option backup nostdinit noyywrap never-interactive full ecs -%option 8bit backup nodefault perf-report perf-report +%option nostdinit noyywrap never-interactive full ecs +%option 8bit nodefault perf-report perf-report %option noinput %x COMMAND HELP STRING PARAM %{ -- cgit v0.10.2 From 378dbb2cf5cb51e41e51b115af8b3ecef086e6ff Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 02:08:52 -0400 Subject: kconfig: migrate parser to implicit rules Signed-off-by: Arnaud Lacombe diff --git a/scripts/kconfig/.gitignore b/scripts/kconfig/.gitignore index 624f650..ee120d4 100644 --- a/scripts/kconfig/.gitignore +++ b/scripts/kconfig/.gitignore @@ -2,7 +2,7 @@ # Generated files # config* -lex.*.c +*.lex.c *.tab.c *.tab.h zconf.hash.c diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index bde4529..ee3f4fa 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -223,6 +223,9 @@ HOST_EXTRACFLAGS += $(shell $(CONFIG_SHELL) $(srctree)/$(src)/check.sh $(HOSTCC) HOSTCFLAGS_lex.zconf.o := -I$(src) HOSTCFLAGS_zconf.tab.o := -I$(src) +LEX_PREFIX_zconf := zconf +YACC_PREFIX_zconf := zconf + HOSTLOADLIBES_qconf = $(KC_QT_LIBS) -ldl HOSTCXXFLAGS_qconf.o = $(KC_QT_CFLAGS) -D LKC_DIRECT_LINK @@ -335,28 +338,3 @@ $(obj)/gconf.glade.h: $(obj)/gconf.glade $(Q)intltool-extract --type=gettext/glade --srcdir=$(srctree) \ $(obj)/gconf.glade -### -# The following requires flex/bison/gperf -# By default we use the _shipped versions, uncomment the following line if -# you are modifying the flex/bison src. -# LKC_GENPARSER := 1 - -ifdef LKC_GENPARSER - -$(obj)/zconf.tab.c: $(src)/zconf.y -$(obj)/lex.zconf.c: $(src)/zconf.l -$(obj)/zconf.hash.c: $(src)/zconf.gperf - -%.tab.c: %.y - bison -l -b $* -p $(notdir $*) $< - cp $@ $@_shipped - -lex.%.c: %.l - flex -L -P$(notdir $*) -o$@ $< - cp $@ $@_shipped - -%.hash.c: %.gperf - gperf -C < $< > $@ - cp $@ $@_shipped - -endif diff --git a/scripts/kconfig/zconf.y b/scripts/kconfig/zconf.y index 377d04d..c38cc5a 100644 --- a/scripts/kconfig/zconf.y +++ b/scripts/kconfig/zconf.y @@ -733,7 +733,7 @@ void zconfdump(FILE *out) } } -#include "lex.zconf.c" +#include "zconf.lex.c" #include "util.c" #include "confdata.c" #include "expr.c" -- cgit v0.10.2 From 2f76b358f9fba35821fa97f0873ec55be88187dc Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 01:08:19 -0400 Subject: kconfig: regen parser Signed-off-by: Arnaud Lacombe diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index ee3f4fa..0b4276c 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -204,7 +204,7 @@ ifeq ($(gconf-target),1) endif clean-files := lkc_defs.h qconf.moc .tmp_qtcheck .tmp_gtkcheck -clean-files += zconf.tab.c lex.zconf.c zconf.hash.c gconf.glade.h +clean-files += zconf.tab.c zconf.lex.c zconf.hash.c gconf.glade.h clean-files += mconf qconf gconf nconf clean-files += config.pot linux.pot @@ -220,7 +220,7 @@ always := dochecklxdialog HOST_EXTRACFLAGS += $(shell $(CONFIG_SHELL) $(srctree)/$(src)/check.sh $(HOSTCC) $(HOSTCFLAGS)) # generated files seem to need this to find local include files -HOSTCFLAGS_lex.zconf.o := -I$(src) +HOSTCFLAGS_zconf.lex.o := -I$(src) HOSTCFLAGS_zconf.tab.o := -I$(src) LEX_PREFIX_zconf := zconf @@ -319,7 +319,7 @@ $(obj)/.tmp_gtkcheck: fi endif -$(obj)/zconf.tab.o: $(obj)/lex.zconf.c $(obj)/zconf.hash.c +$(obj)/zconf.tab.o: $(obj)/zconf.lex.c $(obj)/zconf.hash.c $(obj)/kconfig_load.o: $(obj)/lkc_defs.h diff --git a/scripts/kconfig/lex.zconf.c_shipped b/scripts/kconfig/lex.zconf.c_shipped deleted file mode 100644 index d918291..0000000 --- a/scripts/kconfig/lex.zconf.c_shipped +++ /dev/null @@ -1,2435 +0,0 @@ - -#line 3 "scripts/kconfig/lex.zconf.c" - -#define YY_INT_ALIGNED short int - -/* A lexical scanner generated by flex */ - -#define yy_create_buffer zconf_create_buffer -#define yy_delete_buffer zconf_delete_buffer -#define yy_flex_debug zconf_flex_debug -#define yy_init_buffer zconf_init_buffer -#define yy_flush_buffer zconf_flush_buffer -#define yy_load_buffer_state zconf_load_buffer_state -#define yy_switch_to_buffer zconf_switch_to_buffer -#define yyin zconfin -#define yyleng zconfleng -#define yylex zconflex -#define yylineno zconflineno -#define yyout zconfout -#define yyrestart zconfrestart -#define yytext zconftext -#define yywrap zconfwrap -#define yyalloc zconfalloc -#define yyrealloc zconfrealloc -#define yyfree zconffree - -#define FLEX_SCANNER -#define YY_FLEX_MAJOR_VERSION 2 -#define YY_FLEX_MINOR_VERSION 5 -#define YY_FLEX_SUBMINOR_VERSION 35 -#if YY_FLEX_SUBMINOR_VERSION > 0 -#define FLEX_BETA -#endif - -/* First, we deal with platform-specific or compiler-specific issues. */ - -/* begin standard C headers. */ -#include -#include -#include -#include - -/* end standard C headers. */ - -/* flex integer type definitions */ - -#ifndef FLEXINT_H -#define FLEXINT_H - -/* C99 systems have . Non-C99 systems may or may not. */ - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L - -/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, - * if you want the limit (max/min) macros for int types. - */ -#ifndef __STDC_LIMIT_MACROS -#define __STDC_LIMIT_MACROS 1 -#endif - -#include -typedef int8_t flex_int8_t; -typedef uint8_t flex_uint8_t; -typedef int16_t flex_int16_t; -typedef uint16_t flex_uint16_t; -typedef int32_t flex_int32_t; -typedef uint32_t flex_uint32_t; -#else -typedef signed char flex_int8_t; -typedef short int flex_int16_t; -typedef int flex_int32_t; -typedef unsigned char flex_uint8_t; -typedef unsigned short int flex_uint16_t; -typedef unsigned int flex_uint32_t; - -/* Limits of integral types. */ -#ifndef INT8_MIN -#define INT8_MIN (-128) -#endif -#ifndef INT16_MIN -#define INT16_MIN (-32767-1) -#endif -#ifndef INT32_MIN -#define INT32_MIN (-2147483647-1) -#endif -#ifndef INT8_MAX -#define INT8_MAX (127) -#endif -#ifndef INT16_MAX -#define INT16_MAX (32767) -#endif -#ifndef INT32_MAX -#define INT32_MAX (2147483647) -#endif -#ifndef UINT8_MAX -#define UINT8_MAX (255U) -#endif -#ifndef UINT16_MAX -#define UINT16_MAX (65535U) -#endif -#ifndef UINT32_MAX -#define UINT32_MAX (4294967295U) -#endif - -#endif /* ! C99 */ - -#endif /* ! FLEXINT_H */ - -#ifdef __cplusplus - -/* The "const" storage-class-modifier is valid. */ -#define YY_USE_CONST - -#else /* ! __cplusplus */ - -/* C99 requires __STDC__ to be defined as 1. */ -#if defined (__STDC__) - -#define YY_USE_CONST - -#endif /* defined (__STDC__) */ -#endif /* ! __cplusplus */ - -#ifdef YY_USE_CONST -#define yyconst const -#else -#define yyconst -#endif - -/* Returned upon end-of-file. */ -#define YY_NULL 0 - -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. - */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) - -/* Enter a start condition. This macro really ought to take a parameter, - * but we do it the disgusting crufty way forced on us by the ()-less - * definition of BEGIN. - */ -#define BEGIN (yy_start) = 1 + 2 * - -/* Translate the current start state into a value that can be later handed - * to BEGIN to return to the state. The YYSTATE alias is for lex - * compatibility. - */ -#define YY_START (((yy_start) - 1) / 2) -#define YYSTATE YY_START - -/* Action number for EOF rule of a given start state. */ -#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - -/* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE zconfrestart(zconfin ) - -#define YY_END_OF_BUFFER_CHAR 0 - -/* Size of default input buffer. */ -#ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else -#define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ -#endif - -/* The state buf must be large enough to hold one state per character in the main buffer. - */ -#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) - -#ifndef YY_TYPEDEF_YY_BUFFER_STATE -#define YY_TYPEDEF_YY_BUFFER_STATE -typedef struct yy_buffer_state *YY_BUFFER_STATE; -#endif - -extern int zconfleng; - -extern FILE *zconfin, *zconfout; - -#define EOB_ACT_CONTINUE_SCAN 0 -#define EOB_ACT_END_OF_FILE 1 -#define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) - -/* Return all but the first "n" matched characters back to the input stream. */ -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - *yy_cp = (yy_hold_char); \ - YY_RESTORE_YY_MORE_OFFSET \ - (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up zconftext again */ \ - } \ - while ( 0 ) - -#define unput(c) yyunput( c, (yytext_ptr) ) - -#ifndef YY_TYPEDEF_YY_SIZE_T -#define YY_TYPEDEF_YY_SIZE_T -typedef size_t yy_size_t; -#endif - -#ifndef YY_STRUCT_YY_BUFFER_STATE -#define YY_STRUCT_YY_BUFFER_STATE -struct yy_buffer_state - { - FILE *yy_input_file; - - char *yy_ch_buf; /* input buffer */ - char *yy_buf_pos; /* current position in input buffer */ - - /* Size of input buffer in bytes, not including room for EOB - * characters. - */ - yy_size_t yy_buf_size; - - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ - int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to - * delete it. - */ - int yy_is_our_buffer; - - /* Whether this is an "interactive" input source; if so, and - * if we're using stdio for input, then we want to use getc() - * instead of fread(), to make sure we stop fetching input after - * each newline. - */ - int yy_is_interactive; - - /* Whether we're considered to be at the beginning of a line. - * If so, '^' rules will be active on the next match, otherwise - * not. - */ - int yy_at_bol; - - int yy_bs_lineno; /**< The line count. */ - int yy_bs_column; /**< The column count. */ - - /* Whether to try to fill the input buffer when we reach the - * end of it. - */ - int yy_fill_buffer; - - int yy_buffer_status; - -#define YY_BUFFER_NEW 0 -#define YY_BUFFER_NORMAL 1 - /* When an EOF's been seen but there's still some text to process - * then we mark the buffer as YY_EOF_PENDING, to indicate that we - * shouldn't try reading from the input source any more. We might - * still have a bunch of tokens to match, though, because of - * possible backing-up. - * - * When we actually see the EOF, we change the status to "new" - * (via zconfrestart()), so that the user can continue scanning by - * just pointing zconfin at a new input file. - */ -#define YY_BUFFER_EOF_PENDING 2 - - }; -#endif /* !YY_STRUCT_YY_BUFFER_STATE */ - -/* Stack of input buffers. */ -static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ -static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ -static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ - -/* We provide macros for accessing buffer states in case in the - * future we want to put the buffer states in a more general - * "scanner state". - * - * Returns the top of the stack, or NULL. - */ -#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ - ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ - : NULL) - -/* Same as previous macro, but useful when we know that the buffer stack is not - * NULL or when we need an lvalue. For internal use only. - */ -#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] - -/* yy_hold_char holds the character lost when zconftext is formed. */ -static char yy_hold_char; -static int yy_n_chars; /* number of characters read into yy_ch_buf */ -int zconfleng; - -/* Points to current character in buffer. */ -static char *yy_c_buf_p = (char *) 0; -static int yy_init = 0; /* whether we need to initialize */ -static int yy_start = 0; /* start state number */ - -/* Flag which is used to allow zconfwrap()'s to do buffer switches - * instead of setting up a fresh zconfin. A bit of a hack ... - */ -static int yy_did_buffer_switch_on_eof; - -void zconfrestart (FILE *input_file ); -void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size ); -void zconf_delete_buffer (YY_BUFFER_STATE b ); -void zconf_flush_buffer (YY_BUFFER_STATE b ); -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ); -void zconfpop_buffer_state (void ); - -static void zconfensure_buffer_stack (void ); -static void zconf_load_buffer_state (void ); -static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file ); - -#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER ) - -YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,int len ); - -void *zconfalloc (yy_size_t ); -void *zconfrealloc (void *,yy_size_t ); -void zconffree (void * ); - -#define yy_new_buffer zconf_create_buffer - -#define yy_set_interactive(is_interactive) \ - { \ - if ( ! YY_CURRENT_BUFFER ){ \ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ - } - -#define yy_set_bol(at_bol) \ - { \ - if ( ! YY_CURRENT_BUFFER ){\ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ - } - -#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) - -/* Begin user sect3 */ - -#define zconfwrap(n) 1 -#define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; - -FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0; - -typedef int yy_state_type; - -extern int zconflineno; - -int zconflineno = 1; - -extern char *zconftext; -#define yytext_ptr zconftext -static yyconst flex_int16_t yy_nxt[][17] = - { - { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 18, 16, 16, 16 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 18, 16, 16, 16 - - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, - 33, 34, 35, 35, 36, 37, 38 - - }, - - { - 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, - 33, 34, 35, 35, 36, 37, 38 - }, - - { - -11, -11, -11, -11, -11, -11, -11, -11, -11, -11, - -11, -11, -11, -11, -11, -11, -11 - }, - - { - 11, -12, -12, -12, -12, -12, -12, -12, -12, -12, - -12, -12, -12, -12, -12, -12, -12 - }, - - { - 11, -13, 39, 40, -13, -13, 41, -13, -13, -13, - -13, -13, -13, -13, -13, -13, -13 - }, - - { - 11, -14, -14, -14, -14, -14, -14, -14, -14, -14, - -14, -14, -14, -14, -14, -14, -14 - - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, -16, -16, -16, -16, -16, -16, -16, -16, -16, - -16, -16, -16, -16, -16, -16, -16 - }, - - { - 11, -17, -17, -17, -17, -17, -17, -17, -17, -17, - -17, -17, -17, -17, -17, -17, -17 - }, - - { - 11, -18, -18, -18, -18, -18, -18, -18, -18, -18, - -18, -18, -18, 44, -18, -18, -18 - }, - - { - 11, 45, 45, -19, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 45, 45, 45, 45 - - }, - - { - 11, -20, 46, 47, -20, -20, -20, -20, -20, -20, - -20, -20, -20, -20, -20, -20, -20 - }, - - { - 11, 48, -21, -21, 48, 48, 48, 48, 48, 48, - 48, 48, 48, 48, 48, 48, 48 - }, - - { - 11, 49, 49, 50, 49, -22, 49, 49, -22, 49, - 49, 49, 49, 49, 49, -22, 49 - }, - - { - 11, -23, -23, -23, -23, -23, -23, -23, -23, -23, - -23, -23, -23, -23, -23, -23, -23 - }, - - { - 11, -24, -24, -24, -24, -24, -24, -24, -24, -24, - -24, -24, -24, -24, -24, -24, -24 - - }, - - { - 11, 51, 51, 52, 51, 51, 51, 51, 51, 51, - 51, 51, 51, 51, 51, 51, 51 - }, - - { - 11, -26, -26, -26, -26, -26, -26, -26, -26, -26, - -26, -26, -26, -26, -26, -26, -26 - }, - - { - 11, -27, -27, -27, -27, -27, -27, -27, -27, -27, - -27, -27, -27, -27, -27, -27, -27 - }, - - { - 11, -28, -28, -28, -28, -28, -28, -28, -28, -28, - -28, -28, -28, -28, 53, -28, -28 - }, - - { - 11, -29, -29, -29, -29, -29, -29, -29, -29, -29, - -29, -29, -29, -29, -29, -29, -29 - - }, - - { - 11, 54, 54, -30, 54, 54, 54, 54, 54, 54, - 54, 54, 54, 54, 54, 54, 54 - }, - - { - 11, -31, -31, -31, -31, -31, -31, 55, -31, -31, - -31, -31, -31, -31, -31, -31, -31 - }, - - { - 11, -32, -32, -32, -32, -32, -32, -32, -32, -32, - -32, -32, -32, -32, -32, -32, -32 - }, - - { - 11, -33, -33, -33, -33, -33, -33, -33, -33, -33, - -33, -33, -33, -33, -33, -33, -33 - }, - - { - 11, -34, -34, -34, -34, -34, -34, -34, -34, -34, - -34, 56, 57, 57, -34, -34, -34 - - }, - - { - 11, -35, -35, -35, -35, -35, -35, -35, -35, -35, - -35, 57, 57, 57, -35, -35, -35 - }, - - { - 11, -36, -36, -36, -36, -36, -36, -36, -36, -36, - -36, -36, -36, -36, -36, -36, -36 - }, - - { - 11, -37, -37, 58, -37, -37, -37, -37, -37, -37, - -37, -37, -37, -37, -37, -37, -37 - }, - - { - 11, -38, -38, -38, -38, -38, -38, -38, -38, -38, - -38, -38, -38, -38, -38, -38, 59 - }, - - { - 11, -39, 39, 40, -39, -39, 41, -39, -39, -39, - -39, -39, -39, -39, -39, -39, -39 - - }, - - { - 11, -40, -40, -40, -40, -40, -40, -40, -40, -40, - -40, -40, -40, -40, -40, -40, -40 - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, -43, -43, -43, -43, -43, -43, -43, -43, -43, - -43, -43, -43, -43, -43, -43, -43 - }, - - { - 11, -44, -44, -44, -44, -44, -44, -44, -44, -44, - -44, -44, -44, 44, -44, -44, -44 - - }, - - { - 11, 45, 45, -45, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 45, 45, 45, 45 - }, - - { - 11, -46, 46, 47, -46, -46, -46, -46, -46, -46, - -46, -46, -46, -46, -46, -46, -46 - }, - - { - 11, 48, -47, -47, 48, 48, 48, 48, 48, 48, - 48, 48, 48, 48, 48, 48, 48 - }, - - { - 11, -48, -48, -48, -48, -48, -48, -48, -48, -48, - -48, -48, -48, -48, -48, -48, -48 - }, - - { - 11, 49, 49, 50, 49, -49, 49, 49, -49, 49, - 49, 49, 49, 49, 49, -49, 49 - - }, - - { - 11, -50, -50, -50, -50, -50, -50, -50, -50, -50, - -50, -50, -50, -50, -50, -50, -50 - }, - - { - 11, -51, -51, 52, -51, -51, -51, -51, -51, -51, - -51, -51, -51, -51, -51, -51, -51 - }, - - { - 11, -52, -52, -52, -52, -52, -52, -52, -52, -52, - -52, -52, -52, -52, -52, -52, -52 - }, - - { - 11, -53, -53, -53, -53, -53, -53, -53, -53, -53, - -53, -53, -53, -53, -53, -53, -53 - }, - - { - 11, 54, 54, -54, 54, 54, 54, 54, 54, 54, - 54, 54, 54, 54, 54, 54, 54 - - }, - - { - 11, -55, -55, -55, -55, -55, -55, -55, -55, -55, - -55, -55, -55, -55, -55, -55, -55 - }, - - { - 11, -56, -56, -56, -56, -56, -56, -56, -56, -56, - -56, 60, 57, 57, -56, -56, -56 - }, - - { - 11, -57, -57, -57, -57, -57, -57, -57, -57, -57, - -57, 57, 57, 57, -57, -57, -57 - }, - - { - 11, -58, -58, -58, -58, -58, -58, -58, -58, -58, - -58, -58, -58, -58, -58, -58, -58 - }, - - { - 11, -59, -59, -59, -59, -59, -59, -59, -59, -59, - -59, -59, -59, -59, -59, -59, -59 - - }, - - { - 11, -60, -60, -60, -60, -60, -60, -60, -60, -60, - -60, 57, 57, 57, -60, -60, -60 - }, - - } ; - -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yy_fatal_error (yyconst char msg[] ); - -/* Done after the current pattern has been matched and before the - * corresponding action - sets up zconftext. - */ -#define YY_DO_BEFORE_ACTION \ - (yytext_ptr) = yy_bp; \ - zconfleng = (size_t) (yy_cp - yy_bp); \ - (yy_hold_char) = *yy_cp; \ - *yy_cp = '\0'; \ - (yy_c_buf_p) = yy_cp; - -#define YY_NUM_RULES 33 -#define YY_END_OF_BUFFER 34 -/* This struct is not used in this scanner, - but its presence is necessary. */ -struct yy_trans_info - { - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; -static yyconst flex_int16_t yy_accept[61] = - { 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 34, 5, 4, 2, 3, 7, 8, 6, 32, 29, - 31, 24, 28, 27, 26, 22, 17, 13, 16, 20, - 22, 11, 12, 19, 19, 14, 22, 22, 4, 2, - 3, 3, 1, 6, 32, 29, 31, 30, 24, 23, - 26, 25, 15, 20, 9, 19, 19, 21, 10, 18 - } ; - -static yyconst flex_int32_t yy_ec[256] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 4, 5, 6, 1, 1, 7, 8, 9, - 10, 1, 1, 1, 11, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, - 14, 1, 1, 1, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 1, 15, 1, 1, 13, 1, 13, 13, 13, 13, - - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 1, 16, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1 - } ; - -extern int zconf_flex_debug; -int zconf_flex_debug = 0; - -/* The intent behind this definition is that it'll catch - * any uses of REJECT which flex missed. - */ -#define REJECT reject_used_but_not_detected -#define yymore() yymore_used_but_not_detected -#define YY_MORE_ADJ 0 -#define YY_RESTORE_YY_MORE_OFFSET -char *zconftext; -#define YY_NO_INPUT 1 - -/* - * Copyright (C) 2002 Roman Zippel - * Released under the terms of the GNU GPL v2.0. - */ - -#include -#include -#include -#include -#include - -#define LKC_DIRECT_LINK -#include "lkc.h" - -#define START_STRSIZE 16 - -static struct { - struct file *file; - int lineno; -} current_pos; - -static char *text; -static int text_size, text_asize; - -struct buffer { - struct buffer *parent; - YY_BUFFER_STATE state; -}; - -struct buffer *current_buf; - -static int last_ts, first_ts; - -static void zconf_endhelp(void); -static void zconf_endfile(void); - -static void new_string(void) -{ - text = malloc(START_STRSIZE); - text_asize = START_STRSIZE; - text_size = 0; - *text = 0; -} - -static void append_string(const char *str, int size) -{ - int new_size = text_size + size + 1; - if (new_size > text_asize) { - new_size += START_STRSIZE - 1; - new_size &= -START_STRSIZE; - text = realloc(text, new_size); - text_asize = new_size; - } - memcpy(text + text_size, str, size); - text_size += size; - text[text_size] = 0; -} - -static void alloc_string(const char *str, int size) -{ - text = malloc(size + 1); - memcpy(text, str, size); - text[size] = 0; -} - -#define INITIAL 0 -#define COMMAND 1 -#define HELP 2 -#define STRING 3 -#define PARAM 4 - -#ifndef YY_NO_UNISTD_H -/* Special case for "unistd.h", since it is non-ANSI. We include it way - * down here because we want the user's section 1 to have been scanned first. - * The user has a chance to override it with an option. - */ -#include -#endif - -#ifndef YY_EXTRA_TYPE -#define YY_EXTRA_TYPE void * -#endif - -static int yy_init_globals (void ); - -/* Accessor methods to globals. - These are made visible to non-reentrant scanners for convenience. */ - -int zconflex_destroy (void ); - -int zconfget_debug (void ); - -void zconfset_debug (int debug_flag ); - -YY_EXTRA_TYPE zconfget_extra (void ); - -void zconfset_extra (YY_EXTRA_TYPE user_defined ); - -FILE *zconfget_in (void ); - -void zconfset_in (FILE * in_str ); - -FILE *zconfget_out (void ); - -void zconfset_out (FILE * out_str ); - -int zconfget_leng (void ); - -char *zconfget_text (void ); - -int zconfget_lineno (void ); - -void zconfset_lineno (int line_number ); - -/* Macros after this point can all be overridden by user definitions in - * section 1. - */ - -#ifndef YY_SKIP_YYWRAP -#ifdef __cplusplus -extern "C" int zconfwrap (void ); -#else -extern int zconfwrap (void ); -#endif -#endif - - static void yyunput (int c,char *buf_ptr ); - -#ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); -#endif - -#ifndef YY_NO_INPUT - -#ifdef __cplusplus -static int yyinput (void ); -#else -static int input (void ); -#endif - -#endif - -/* Amount of stuff to slurp up with each read. */ -#ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else -#define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ -#endif - -/* Copy whatever the last rule matched to the standard output. */ -#ifndef ECHO -/* This used to be an fputs(), but since the string might contain NUL's, - * we now use fwrite(). - */ -#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0) -#endif - -/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, - * is returned in "result". - */ -#ifndef YY_INPUT -#define YY_INPUT(buf,result,max_size) \ - errno=0; \ - while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \ - { \ - if( errno != EINTR) \ - { \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - break; \ - } \ - errno=0; \ - clearerr(zconfin); \ - }\ -\ - -#endif - -/* No semi-colon after return; correct usage is to write "yyterminate();" - - * we don't want an extra ';' after the "return" because that will cause - * some compilers to complain about unreachable statements. - */ -#ifndef yyterminate -#define yyterminate() return YY_NULL -#endif - -/* Number of entries by which start-condition stack grows. */ -#ifndef YY_START_STACK_INCR -#define YY_START_STACK_INCR 25 -#endif - -/* Report a fatal error. */ -#ifndef YY_FATAL_ERROR -#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) -#endif - -/* end tables serialization structures and prototypes */ - -/* Default declaration of generated scanner - a define so the user can - * easily add parameters. - */ -#ifndef YY_DECL -#define YY_DECL_IS_OURS 1 - -extern int zconflex (void); - -#define YY_DECL int zconflex (void) -#endif /* !YY_DECL */ - -/* Code executed at the beginning of each rule, after zconftext and zconfleng - * have been set up. - */ -#ifndef YY_USER_ACTION -#define YY_USER_ACTION -#endif - -/* Code executed at the end of each rule. */ -#ifndef YY_BREAK -#define YY_BREAK break; -#endif - -#define YY_RULE_SETUP \ - YY_USER_ACTION - -/** The main scanner function which does all the work. - */ -YY_DECL -{ - register yy_state_type yy_current_state; - register char *yy_cp, *yy_bp; - register int yy_act; - - int str = 0; - int ts, i; - - if ( !(yy_init) ) - { - (yy_init) = 1; - -#ifdef YY_USER_INIT - YY_USER_INIT; -#endif - - if ( ! (yy_start) ) - (yy_start) = 1; /* first start state */ - - if ( ! zconfin ) - zconfin = stdin; - - if ( ! zconfout ) - zconfout = stdout; - - if ( ! YY_CURRENT_BUFFER ) { - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_load_buffer_state( ); - } - - while ( 1 ) /* loops until end-of-file is reached */ - { - yy_cp = (yy_c_buf_p); - - /* Support of zconftext. */ - *yy_cp = (yy_hold_char); - - /* yy_bp points to the position in yy_ch_buf of the start of - * the current run. - */ - yy_bp = yy_cp; - - yy_current_state = (yy_start); -yy_match: - while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)] ]) > 0 ) - ++yy_cp; - - yy_current_state = -yy_current_state; - -yy_find_action: - yy_act = yy_accept[yy_current_state]; - - YY_DO_BEFORE_ACTION; - -do_action: /* This label is used only to access EOF actions. */ - - switch ( yy_act ) - { /* beginning of action switch */ -case 1: -/* rule 1 can match eol */ -case 2: -/* rule 2 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - return T_EOL; -} - YY_BREAK -case 3: -YY_RULE_SETUP - - YY_BREAK -case 4: -YY_RULE_SETUP -{ - BEGIN(COMMAND); -} - YY_BREAK -case 5: -YY_RULE_SETUP -{ - unput(zconftext[0]); - BEGIN(COMMAND); -} - YY_BREAK - -case 6: -YY_RULE_SETUP -{ - struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - BEGIN(PARAM); - current_pos.file = current_file; - current_pos.lineno = current_file->lineno; - if (id && id->flags & TF_COMMAND) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 7: -YY_RULE_SETUP - - YY_BREAK -case 8: -/* rule 8 can match eol */ -YY_RULE_SETUP -{ - BEGIN(INITIAL); - current_file->lineno++; - return T_EOL; - } - YY_BREAK - -case 9: -YY_RULE_SETUP -return T_AND; - YY_BREAK -case 10: -YY_RULE_SETUP -return T_OR; - YY_BREAK -case 11: -YY_RULE_SETUP -return T_OPEN_PAREN; - YY_BREAK -case 12: -YY_RULE_SETUP -return T_CLOSE_PAREN; - YY_BREAK -case 13: -YY_RULE_SETUP -return T_NOT; - YY_BREAK -case 14: -YY_RULE_SETUP -return T_EQUAL; - YY_BREAK -case 15: -YY_RULE_SETUP -return T_UNEQUAL; - YY_BREAK -case 16: -YY_RULE_SETUP -{ - str = zconftext[0]; - new_string(); - BEGIN(STRING); - } - YY_BREAK -case 17: -/* rule 17 can match eol */ -YY_RULE_SETUP -BEGIN(INITIAL); current_file->lineno++; return T_EOL; - YY_BREAK -case 18: -YY_RULE_SETUP -/* ignore */ - YY_BREAK -case 19: -YY_RULE_SETUP -{ - struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - if (id && id->flags & TF_PARAM) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 20: -YY_RULE_SETUP -/* comment */ - YY_BREAK -case 21: -/* rule 21 can match eol */ -YY_RULE_SETUP -current_file->lineno++; - YY_BREAK -case 22: -YY_RULE_SETUP - - YY_BREAK -case YY_STATE_EOF(PARAM): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 23: -/* rule 23 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 24: -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - } - YY_BREAK -case 25: -/* rule 25 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 26: -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - } - YY_BREAK -case 27: -YY_RULE_SETUP -{ - if (str == zconftext[0]) { - BEGIN(PARAM); - zconflval.string = text; - return T_WORD_QUOTE; - } else - append_string(zconftext, 1); - } - YY_BREAK -case 28: -/* rule 28 can match eol */ -YY_RULE_SETUP -{ - printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); - current_file->lineno++; - BEGIN(INITIAL); - return T_EOL; - } - YY_BREAK -case YY_STATE_EOF(STRING): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 29: -YY_RULE_SETUP -{ - ts = 0; - for (i = 0; i < zconfleng; i++) { - if (zconftext[i] == '\t') - ts = (ts & ~7) + 8; - else - ts++; - } - last_ts = ts; - if (first_ts) { - if (ts < first_ts) { - zconf_endhelp(); - return T_HELPTEXT; - } - ts -= first_ts; - while (ts > 8) { - append_string(" ", 8); - ts -= 8; - } - append_string(" ", ts); - } - } - YY_BREAK -case 30: -/* rule 30 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - current_file->lineno++; - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK -case 31: -/* rule 31 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - append_string("\n", 1); - } - YY_BREAK -case 32: -YY_RULE_SETUP -{ - while (zconfleng) { - if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t')) - break; - zconfleng--; - } - append_string(zconftext, zconfleng); - if (!first_ts) - first_ts = last_ts; - } - YY_BREAK -case YY_STATE_EOF(HELP): -{ - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK - -case YY_STATE_EOF(INITIAL): -case YY_STATE_EOF(COMMAND): -{ - if (current_file) { - zconf_endfile(); - return T_EOL; - } - fclose(zconfin); - yyterminate(); -} - YY_BREAK -case 33: -YY_RULE_SETUP -YY_FATAL_ERROR( "flex scanner jammed" ); - YY_BREAK - - case YY_END_OF_BUFFER: - { - /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; - - /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = (yy_hold_char); - YY_RESTORE_YY_MORE_OFFSET - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) - { - /* We're scanning a new file or input source. It's - * possible that this happened because the user - * just pointed zconfin at a new source and called - * zconflex(). If so, then we have to assure - * consistency between YY_CURRENT_BUFFER and our - * globals. Here is the right place to do so, because - * this is the first action (other than possibly a - * back-up) that will match for the new input source. - */ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; - } - - /* Note that here we test for yy_c_buf_p "<=" to the position - * of the first EOB in the buffer, since yy_c_buf_p will - * already have been incremented past the NUL character - * (since all states make transitions on EOB to the - * end-of-buffer state). Contrast this with the test - * in input(). - */ - if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - { /* This was really a NUL. */ - yy_state_type yy_next_state; - - (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - /* Okay, we're now positioned to make the NUL - * transition. We couldn't have - * yy_get_previous_state() go ahead and do it - * for us because it doesn't know how to deal - * with the possibility of jamming (and we don't - * want to build jamming into it because then it - * will run more slowly). - */ - - yy_next_state = yy_try_NUL_trans( yy_current_state ); - - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - - if ( yy_next_state ) - { - /* Consume the NUL. */ - yy_cp = ++(yy_c_buf_p); - yy_current_state = yy_next_state; - goto yy_match; - } - - else - { - yy_cp = (yy_c_buf_p); - goto yy_find_action; - } - } - - else switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_END_OF_FILE: - { - (yy_did_buffer_switch_on_eof) = 0; - - if ( zconfwrap( ) ) - { - /* Note: because we've taken care in - * yy_get_next_buffer() to have set up - * zconftext, we can now set up - * yy_c_buf_p so that if some total - * hoser (like flex itself) wants to - * call the scanner after we return the - * YY_NULL, it'll still work - another - * YY_NULL will get returned. - */ - (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; - - yy_act = YY_STATE_EOF(YY_START); - goto do_action; - } - - else - { - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; - } - break; - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = - (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_match; - - case EOB_ACT_LAST_MATCH: - (yy_c_buf_p) = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_find_action; - } - break; - } - - default: - YY_FATAL_ERROR( - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ -} /* end of zconflex */ - -/* yy_get_next_buffer - try to read in a new buffer - * - * Returns a code representing an action: - * EOB_ACT_LAST_MATCH - - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position - * EOB_ACT_END_OF_FILE - end of file - */ -static int yy_get_next_buffer (void) -{ - register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; - register char *source = (yytext_ptr); - register int number_to_move, i; - int ret_val; - - if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) - YY_FATAL_ERROR( - "fatal flex scanner internal error--end of buffer missed" ); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) - { /* Don't try to fill the buffer, so this is an EOF. */ - if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) - { - /* We matched a single character, the EOB, so - * treat this as a final EOF. - */ - return EOB_ACT_END_OF_FILE; - } - - else - { - /* We matched some text prior to the EOB, first - * process it. - */ - return EOB_ACT_LAST_MATCH; - } - } - - /* Try to read more data. */ - - /* First move last chars to start of buffer. */ - number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; - - for ( i = 0; i < number_to_move; ++i ) - *(dest++) = *(source++); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) - /* don't do the read, it's not guaranteed to return an EOF, - * just force an EOF - */ - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; - - else - { - int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = YY_CURRENT_BUFFER; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { - int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; - else - b->yy_buf_size *= 2; - - b->yy_ch_buf = (char *) - /* Include room in for 2 EOB chars. */ - zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); - } - else - /* Can't grow it, we don't own it. */ - b->yy_ch_buf = 0; - - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( - "fatal error - scanner input buffer overflow" ); - - (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - - num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - - number_to_move - 1; - - } - - if ( num_to_read > YY_READ_BUF_SIZE ) - num_to_read = YY_READ_BUF_SIZE; - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), - (yy_n_chars), (size_t) num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - if ( (yy_n_chars) == 0 ) - { - if ( number_to_move == YY_MORE_ADJ ) - { - ret_val = EOB_ACT_END_OF_FILE; - zconfrestart(zconfin ); - } - - else - { - ret_val = EOB_ACT_LAST_MATCH; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = - YY_BUFFER_EOF_PENDING; - } - } - - else - ret_val = EOB_ACT_CONTINUE_SCAN; - - if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { - /* Extend the array by 50%, plus the number we really need. */ - yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); - if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); - } - - (yy_n_chars) += number_to_move; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - - (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; - - return ret_val; -} - -/* yy_get_previous_state - get the state just before the EOB char was reached */ - - static yy_state_type yy_get_previous_state (void) -{ - register yy_state_type yy_current_state; - register char *yy_cp; - - yy_current_state = (yy_start); - - for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) - { - yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)]; - } - - return yy_current_state; -} - -/* yy_try_NUL_trans - try to make a transition on the NUL character - * - * synopsis - * next_state = yy_try_NUL_trans( current_state ); - */ - static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) -{ - register int yy_is_jam; - - yy_current_state = yy_nxt[yy_current_state][1]; - yy_is_jam = (yy_current_state <= 0); - - return yy_is_jam ? 0 : yy_current_state; -} - - static void yyunput (int c, register char * yy_bp ) -{ - register char *yy_cp; - - yy_cp = (yy_c_buf_p); - - /* undo effects of setting up zconftext */ - *yy_cp = (yy_hold_char); - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - { /* need to shift things up to make room */ - /* +2 for EOB chars. */ - register int number_to_move = (yy_n_chars) + 2; - register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ - YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; - register char *source = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; - - while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - *--dest = *--source; - - yy_cp += (int) (dest - source); - yy_bp += (int) (dest - source); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - YY_FATAL_ERROR( "flex scanner push-back overflow" ); - } - - *--yy_cp = (char) c; - - (yytext_ptr) = yy_bp; - (yy_hold_char) = *yy_cp; - (yy_c_buf_p) = yy_cp; -} - -#ifndef YY_NO_INPUT -#ifdef __cplusplus - static int yyinput (void) -#else - static int input (void) -#endif - -{ - int c; - - *(yy_c_buf_p) = (yy_hold_char); - - if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) - { - /* yy_c_buf_p now points to the character we want to return. - * If this occurs *before* the EOB characters, then it's a - * valid NUL; if not, then we've hit the end of the buffer. - */ - if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - /* This was really a NUL. */ - *(yy_c_buf_p) = '\0'; - - else - { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_LAST_MATCH: - /* This happens because yy_g_n_b() - * sees that we've accumulated a - * token and flags that we need to - * try matching the token before - * proceeding. But for input(), - * there's no matching to consider. - * So convert the EOB_ACT_LAST_MATCH - * to EOB_ACT_END_OF_FILE. - */ - - /* Reset buffer status. */ - zconfrestart(zconfin ); - - /*FALLTHROUGH*/ - - case EOB_ACT_END_OF_FILE: - { - if ( zconfwrap( ) ) - return EOF; - - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; -#ifdef __cplusplus - return yyinput(); -#else - return input(); -#endif - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = (yytext_ptr) + offset; - break; - } - } - } - - c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ - *(yy_c_buf_p) = '\0'; /* preserve zconftext */ - (yy_hold_char) = *++(yy_c_buf_p); - - return c; -} -#endif /* ifndef YY_NO_INPUT */ - -/** Immediately switch to a different input stream. - * @param input_file A readable stream. - * - * @note This function does not reset the start condition to @c INITIAL . - */ - void zconfrestart (FILE * input_file ) -{ - - if ( ! YY_CURRENT_BUFFER ){ - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_init_buffer(YY_CURRENT_BUFFER,input_file ); - zconf_load_buffer_state( ); -} - -/** Switch to a different input buffer. - * @param new_buffer The new input buffer. - * - */ - void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ) -{ - - /* TODO. We should be able to replace this entire function body - * with - * zconfpop_buffer_state(); - * zconfpush_buffer_state(new_buffer); - */ - zconfensure_buffer_stack (); - if ( YY_CURRENT_BUFFER == new_buffer ) - return; - - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - YY_CURRENT_BUFFER_LVALUE = new_buffer; - zconf_load_buffer_state( ); - - /* We don't actually know whether we did this switch during - * EOF (zconfwrap()) processing, but the only time this flag - * is looked at is after zconfwrap() is called, so it's safe - * to go ahead and always set it. - */ - (yy_did_buffer_switch_on_eof) = 1; -} - -static void zconf_load_buffer_state (void) -{ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; - zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; - (yy_hold_char) = *(yy_c_buf_p); -} - -/** Allocate and initialize an input buffer state. - * @param file A readable stream. - * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. - * - * @return the allocated buffer state. - */ - YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size ) -{ - YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_buf_size = size; - - /* yy_ch_buf has to be 2 characters longer than the size given because - * we need to put in 2 end-of-buffer characters. - */ - b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2 ); - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_is_our_buffer = 1; - - zconf_init_buffer(b,file ); - - return b; -} - -/** Destroy the buffer. - * @param b a buffer created with zconf_create_buffer() - * - */ - void zconf_delete_buffer (YY_BUFFER_STATE b ) -{ - - if ( ! b ) - return; - - if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ - YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; - - if ( b->yy_is_our_buffer ) - zconffree((void *) b->yy_ch_buf ); - - zconffree((void *) b ); -} - -/* Initializes or reinitializes a buffer. - * This function is sometimes called more than once on the same buffer, - * such as during a zconfrestart() or at EOF. - */ - static void zconf_init_buffer (YY_BUFFER_STATE b, FILE * file ) - -{ - int oerrno = errno; - - zconf_flush_buffer(b ); - - b->yy_input_file = file; - b->yy_fill_buffer = 1; - - /* If b is the current buffer, then zconf_init_buffer was _probably_ - * called from zconfrestart() or through yy_get_next_buffer. - * In that case, we don't want to reset the lineno or column. - */ - if (b != YY_CURRENT_BUFFER){ - b->yy_bs_lineno = 1; - b->yy_bs_column = 0; - } - - b->yy_is_interactive = 0; - - errno = oerrno; -} - -/** Discard all buffered characters. On the next scan, YY_INPUT will be called. - * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. - * - */ - void zconf_flush_buffer (YY_BUFFER_STATE b ) -{ - if ( ! b ) - return; - - b->yy_n_chars = 0; - - /* We always need two end-of-buffer characters. The first causes - * a transition to the end-of-buffer state. The second causes - * a jam in that state. - */ - b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; - b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; - - b->yy_buf_pos = &b->yy_ch_buf[0]; - - b->yy_at_bol = 1; - b->yy_buffer_status = YY_BUFFER_NEW; - - if ( b == YY_CURRENT_BUFFER ) - zconf_load_buffer_state( ); -} - -/** Pushes the new state onto the stack. The new state becomes - * the current state. This function will allocate the stack - * if necessary. - * @param new_buffer The new state. - * - */ -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ) -{ - if (new_buffer == NULL) - return; - - zconfensure_buffer_stack(); - - /* This block is copied from zconf_switch_to_buffer. */ - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - /* Only push if top exists. Otherwise, replace top. */ - if (YY_CURRENT_BUFFER) - (yy_buffer_stack_top)++; - YY_CURRENT_BUFFER_LVALUE = new_buffer; - - /* copied from zconf_switch_to_buffer. */ - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; -} - -/** Removes and deletes the top of the stack, if present. - * The next element becomes the new top. - * - */ -void zconfpop_buffer_state (void) -{ - if (!YY_CURRENT_BUFFER) - return; - - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - if ((yy_buffer_stack_top) > 0) - --(yy_buffer_stack_top); - - if (YY_CURRENT_BUFFER) { - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; - } -} - -/* Allocates the stack if it does not exist. - * Guarantees space for at least one push. - */ -static void zconfensure_buffer_stack (void) -{ - int num_to_alloc; - - if (!(yy_buffer_stack)) { - - /* First allocation is just for 2 elements, since we don't know if this - * scanner will even need a stack. We use 2 instead of 1 to avoid an - * immediate realloc on the next call. - */ - num_to_alloc = 1; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc - (num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - - (yy_buffer_stack_max) = num_to_alloc; - (yy_buffer_stack_top) = 0; - return; - } - - if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ - - /* Increase the buffer to prepare for a possible push. */ - int grow_size = 8 /* arbitrary grow size */; - - num_to_alloc = (yy_buffer_stack_max) + grow_size; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc - ((yy_buffer_stack), - num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - /* zero only the new slots.*/ - memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); - (yy_buffer_stack_max) = num_to_alloc; - } -} - -/** Setup the input buffer state to scan directly from a user-specified character buffer. - * @param base the character buffer - * @param size the size in bytes of the character buffer - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size ) -{ - YY_BUFFER_STATE b; - - if ( size < 2 || - base[size-2] != YY_END_OF_BUFFER_CHAR || - base[size-1] != YY_END_OF_BUFFER_CHAR ) - /* They forgot to leave room for the EOB's. */ - return 0; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" ); - - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ - b->yy_buf_pos = b->yy_ch_buf = base; - b->yy_is_our_buffer = 0; - b->yy_input_file = 0; - b->yy_n_chars = b->yy_buf_size; - b->yy_is_interactive = 0; - b->yy_at_bol = 1; - b->yy_fill_buffer = 0; - b->yy_buffer_status = YY_BUFFER_NEW; - - zconf_switch_to_buffer(b ); - - return b; -} - -/** Setup the input buffer state to scan a string. The next call to zconflex() will - * scan from a @e copy of @a str. - * @param yystr a NUL-terminated string to scan - * - * @return the newly allocated buffer state object. - * @note If you want to scan bytes that may contain NUL values, then use - * zconf_scan_bytes() instead. - */ -YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr ) -{ - - return zconf_scan_bytes(yystr,strlen(yystr) ); -} - -/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will - * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len ) -{ - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; - int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = _yybytes_len + 2; - buf = (char *) zconfalloc(n ); - if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" ); - - for ( i = 0; i < _yybytes_len; ++i ) - buf[i] = yybytes[i]; - - buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - - b = zconf_scan_buffer(buf,n ); - if ( ! b ) - YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" ); - - /* It's okay to grow etc. this buffer, and we should throw it - * away when we're done. - */ - b->yy_is_our_buffer = 1; - - return b; -} - -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif - -static void yy_fatal_error (yyconst char* msg ) -{ - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); -} - -/* Redefine yyless() so it works in section 3 code. */ - -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - zconftext[zconfleng] = (yy_hold_char); \ - (yy_c_buf_p) = zconftext + yyless_macro_arg; \ - (yy_hold_char) = *(yy_c_buf_p); \ - *(yy_c_buf_p) = '\0'; \ - zconfleng = yyless_macro_arg; \ - } \ - while ( 0 ) - -/* Accessor methods (get/set functions) to struct members. */ - -/** Get the current line number. - * - */ -int zconfget_lineno (void) -{ - - return zconflineno; -} - -/** Get the input stream. - * - */ -FILE *zconfget_in (void) -{ - return zconfin; -} - -/** Get the output stream. - * - */ -FILE *zconfget_out (void) -{ - return zconfout; -} - -/** Get the length of the current token. - * - */ -int zconfget_leng (void) -{ - return zconfleng; -} - -/** Get the current token. - * - */ - -char *zconfget_text (void) -{ - return zconftext; -} - -/** Set the current line number. - * @param line_number - * - */ -void zconfset_lineno (int line_number ) -{ - - zconflineno = line_number; -} - -/** Set the input stream. This does not discard the current - * input buffer. - * @param in_str A readable stream. - * - * @see zconf_switch_to_buffer - */ -void zconfset_in (FILE * in_str ) -{ - zconfin = in_str ; -} - -void zconfset_out (FILE * out_str ) -{ - zconfout = out_str ; -} - -int zconfget_debug (void) -{ - return zconf_flex_debug; -} - -void zconfset_debug (int bdebug ) -{ - zconf_flex_debug = bdebug ; -} - -static int yy_init_globals (void) -{ - /* Initialization is the same as for the non-reentrant scanner. - * This function is called from zconflex_destroy(), so don't allocate here. - */ - - (yy_buffer_stack) = 0; - (yy_buffer_stack_top) = 0; - (yy_buffer_stack_max) = 0; - (yy_c_buf_p) = (char *) 0; - (yy_init) = 0; - (yy_start) = 0; - -/* Defined in main.c */ -#ifdef YY_STDINIT - zconfin = stdin; - zconfout = stdout; -#else - zconfin = (FILE *) 0; - zconfout = (FILE *) 0; -#endif - - /* For future reference: Set errno on error, since we are called by - * zconflex_init() - */ - return 0; -} - -/* zconflex_destroy is for both reentrant and non-reentrant scanners. */ -int zconflex_destroy (void) -{ - - /* Pop the buffer stack, destroying each element. */ - while(YY_CURRENT_BUFFER){ - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - zconfpop_buffer_state(); - } - - /* Destroy the stack itself. */ - zconffree((yy_buffer_stack) ); - (yy_buffer_stack) = NULL; - - /* Reset the globals. This is important in a non-reentrant scanner so the next time - * zconflex() is called, initialization will occur. */ - yy_init_globals( ); - - return 0; -} - -/* - * Internal utility routines. - */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) -{ - register int i; - for ( i = 0; i < n; ++i ) - s1[i] = s2[i]; -} -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) -{ - register int n; - for ( n = 0; s[n]; ++n ) - ; - - return n; -} -#endif - -void *zconfalloc (yy_size_t size ) -{ - return (void *) malloc( size ); -} - -void *zconfrealloc (void * ptr, yy_size_t size ) -{ - /* The cast to (char *) in the following accommodates both - * implementations that use char* generic pointers, and those - * that use void* generic pointers. It works with the latter - * because both ANSI C and C++ allow castless assignment from - * any pointer type to void*, and deal with argument conversions - * as though doing an assignment. - */ - return (void *) realloc( (char *) ptr, size ); -} - -void zconffree (void * ptr ) -{ - free( (char *) ptr ); /* see zconfrealloc() for (char *) cast */ -} - -#define YYTABLES_NAME "yytables" - -void zconf_starthelp(void) -{ - new_string(); - last_ts = first_ts = 0; - BEGIN(HELP); -} - -static void zconf_endhelp(void) -{ - zconflval.string = text; - BEGIN(INITIAL); -} - -/* - * Try to open specified file with following names: - * ./name - * $(srctree)/name - * The latter is used when srctree is separate from objtree - * when compiling the kernel. - * Return NULL if file is not found. - */ -FILE *zconf_fopen(const char *name) -{ - char *env, fullname[PATH_MAX+1]; - FILE *f; - - f = fopen(name, "r"); - if (!f && name != NULL && name[0] != '/') { - env = getenv(SRCTREE); - if (env) { - sprintf(fullname, "%s/%s", env, name); - f = fopen(fullname, "r"); - } - } - return f; -} - -void zconf_initscan(const char *name) -{ - zconfin = zconf_fopen(name); - if (!zconfin) { - printf("can't find file %s\n", name); - exit(1); - } - - current_buf = malloc(sizeof(*current_buf)); - memset(current_buf, 0, sizeof(*current_buf)); - - current_file = file_lookup(name); - current_file->lineno = 1; -} - -void zconf_nextfile(const char *name) -{ - struct file *iter; - struct file *file = file_lookup(name); - struct buffer *buf = malloc(sizeof(*buf)); - memset(buf, 0, sizeof(*buf)); - - current_buf->state = YY_CURRENT_BUFFER; - zconfin = zconf_fopen(file->name); - if (!zconfin) { - printf("%s:%d: can't open file \"%s\"\n", - zconf_curname(), zconf_lineno(), file->name); - exit(1); - } - zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE)); - buf->parent = current_buf; - current_buf = buf; - - for (iter = current_file->parent; iter; iter = iter->parent ) { - if (!strcmp(current_file->name,iter->name) ) { - printf("%s:%d: recursive inclusion detected. " - "Inclusion path:\n current file : '%s'\n", - zconf_curname(), zconf_lineno(), - zconf_curname()); - iter = current_file->parent; - while (iter && \ - strcmp(iter->name,current_file->name)) { - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno-1); - iter = iter->parent; - } - if (iter) - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno+1); - exit(1); - } - } - file->lineno = 1; - file->parent = current_file; - current_file = file; -} - -static void zconf_endfile(void) -{ - struct buffer *parent; - - current_file = current_file->parent; - - parent = current_buf->parent; - if (parent) { - fclose(zconfin); - zconf_delete_buffer(YY_CURRENT_BUFFER); - zconf_switch_to_buffer(parent->state); - } - free(current_buf); - current_buf = parent; -} - -int zconf_lineno(void) -{ - return current_pos.lineno; -} - -const char *zconf_curname(void) -{ - return current_pos.file ? current_pos.file->name : ""; -} - diff --git a/scripts/kconfig/zconf.hash.c_shipped b/scripts/kconfig/zconf.hash.c_shipped index 4055d5d..40df000 100644 --- a/scripts/kconfig/zconf.hash.c_shipped +++ b/scripts/kconfig/zconf.hash.c_shipped @@ -1,6 +1,5 @@ -/* ANSI-C code produced by gperf version 3.0.3 */ -/* Command-line: gperf */ -/* Computed positions: -k'1,3' */ +/* ANSI-C code produced by gperf version 3.0.4 */ +/* Command-line: gperf -t --output-file scripts/kconfig/zconf.hash.c_shipped -a -C -E -g -k '1,3,$' -p -t scripts/kconfig/zconf.gperf */ #if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \ @@ -29,10 +28,11 @@ #error "gperf generated tables don't work with this execution character set. Please report a bug to ." #endif +#line 10 "scripts/kconfig/zconf.gperf" struct kconf_id; -static struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); -/* maximum key range = 50, duplicates = 0 */ +static const struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); +/* maximum key range = 71, duplicates = 0 */ #ifdef __GNUC__ __inline @@ -44,34 +44,34 @@ inline static unsigned int kconf_id_hash (register const char *str, register unsigned int len) { - static unsigned char asso_values[] = + static const unsigned char asso_values[] = { - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 40, 5, - 0, 0, 5, 52, 0, 20, 52, 52, 10, 20, - 5, 0, 35, 52, 0, 30, 0, 15, 0, 52, - 15, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 52, 52, 52, 52 + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 25, 25, + 0, 0, 0, 5, 0, 0, 73, 73, 5, 0, + 10, 5, 45, 73, 20, 20, 0, 15, 15, 73, + 20, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, + 73, 73, 73, 73, 73, 73 }; register int hval = len; @@ -85,87 +85,87 @@ kconf_id_hash (register const char *str, register unsigned int len) hval += asso_values[(unsigned char)str[0]]; break; } - return hval; + return hval + asso_values[(unsigned char)str[len - 1]]; } struct kconf_id_strings_t { - char kconf_id_strings_str2[sizeof("on")]; - char kconf_id_strings_str3[sizeof("env")]; + char kconf_id_strings_str2[sizeof("if")]; + char kconf_id_strings_str3[sizeof("int")]; char kconf_id_strings_str5[sizeof("endif")]; - char kconf_id_strings_str6[sizeof("option")]; - char kconf_id_strings_str7[sizeof("endmenu")]; - char kconf_id_strings_str8[sizeof("optional")]; + char kconf_id_strings_str7[sizeof("default")]; + char kconf_id_strings_str8[sizeof("tristate")]; char kconf_id_strings_str9[sizeof("endchoice")]; - char kconf_id_strings_str10[sizeof("range")]; - char kconf_id_strings_str11[sizeof("choice")]; - char kconf_id_strings_str12[sizeof("default")]; + char kconf_id_strings_str12[sizeof("def_tristate")]; char kconf_id_strings_str13[sizeof("def_bool")]; - char kconf_id_strings_str14[sizeof("help")]; - char kconf_id_strings_str16[sizeof("config")]; - char kconf_id_strings_str17[sizeof("def_tristate")]; - char kconf_id_strings_str18[sizeof("hex")]; - char kconf_id_strings_str19[sizeof("defconfig_list")]; - char kconf_id_strings_str22[sizeof("if")]; - char kconf_id_strings_str23[sizeof("int")]; + char kconf_id_strings_str14[sizeof("defconfig_list")]; + char kconf_id_strings_str17[sizeof("on")]; + char kconf_id_strings_str18[sizeof("optional")]; + char kconf_id_strings_str21[sizeof("option")]; + char kconf_id_strings_str22[sizeof("endmenu")]; + char kconf_id_strings_str23[sizeof("mainmenu")]; + char kconf_id_strings_str25[sizeof("menuconfig")]; char kconf_id_strings_str27[sizeof("modules")]; - char kconf_id_strings_str28[sizeof("tristate")]; char kconf_id_strings_str29[sizeof("menu")]; + char kconf_id_strings_str31[sizeof("select")]; char kconf_id_strings_str32[sizeof("comment")]; - char kconf_id_strings_str35[sizeof("menuconfig")]; - char kconf_id_strings_str36[sizeof("string")]; - char kconf_id_strings_str37[sizeof("visible")]; - char kconf_id_strings_str41[sizeof("prompt")]; - char kconf_id_strings_str42[sizeof("depends")]; - char kconf_id_strings_str44[sizeof("bool")]; - char kconf_id_strings_str46[sizeof("select")]; + char kconf_id_strings_str33[sizeof("env")]; + char kconf_id_strings_str35[sizeof("range")]; + char kconf_id_strings_str36[sizeof("choice")]; + char kconf_id_strings_str39[sizeof("bool")]; + char kconf_id_strings_str41[sizeof("source")]; + char kconf_id_strings_str42[sizeof("visible")]; + char kconf_id_strings_str43[sizeof("hex")]; + char kconf_id_strings_str46[sizeof("config")]; char kconf_id_strings_str47[sizeof("boolean")]; - char kconf_id_strings_str48[sizeof("mainmenu")]; - char kconf_id_strings_str51[sizeof("source")]; + char kconf_id_strings_str51[sizeof("string")]; + char kconf_id_strings_str54[sizeof("help")]; + char kconf_id_strings_str56[sizeof("prompt")]; + char kconf_id_strings_str72[sizeof("depends")]; }; -static struct kconf_id_strings_t kconf_id_strings_contents = +static const struct kconf_id_strings_t kconf_id_strings_contents = { - "on", - "env", + "if", + "int", "endif", - "option", - "endmenu", - "optional", - "endchoice", - "range", - "choice", "default", - "def_bool", - "help", - "config", + "tristate", + "endchoice", "def_tristate", - "hex", + "def_bool", "defconfig_list", - "if", - "int", + "on", + "optional", + "option", + "endmenu", + "mainmenu", + "menuconfig", "modules", - "tristate", "menu", + "select", "comment", - "menuconfig", - "string", - "visible", - "prompt", - "depends", + "env", + "range", + "choice", "bool", - "select", + "source", + "visible", + "hex", + "config", "boolean", - "mainmenu", - "source" + "string", + "help", + "prompt", + "depends" }; #define kconf_id_strings ((const char *) &kconf_id_strings_contents) #ifdef __GNUC__ __inline -#ifdef __GNUC_STDC_INLINE__ +#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ __attribute__ ((__gnu_inline__)) #endif #endif -struct kconf_id * +const struct kconf_id * kconf_id_lookup (register const char *str, register unsigned int len) { enum @@ -174,54 +174,94 @@ kconf_id_lookup (register const char *str, register unsigned int len) MIN_WORD_LENGTH = 2, MAX_WORD_LENGTH = 14, MIN_HASH_VALUE = 2, - MAX_HASH_VALUE = 51 + MAX_HASH_VALUE = 72 }; - static struct kconf_id wordlist[] = + static const struct kconf_id wordlist[] = { {-1}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str2, T_ON, TF_PARAM}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str3, T_OPT_ENV, TF_OPTION}, +#line 25 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str2, T_IF, TF_COMMAND|TF_PARAM}, +#line 36 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str3, T_TYPE, TF_COMMAND, S_INT}, {-1}, +#line 26 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str5, T_ENDIF, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str6, T_OPTION, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str7, T_ENDMENU, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str8, T_OPTIONAL, TF_COMMAND}, + {-1}, +#line 29 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str7, T_DEFAULT, TF_COMMAND, S_UNKNOWN}, +#line 31 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str8, T_TYPE, TF_COMMAND, S_TRISTATE}, +#line 20 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str9, T_ENDCHOICE, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str10, T_RANGE, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str11, T_CHOICE, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str12, T_DEFAULT, TF_COMMAND, S_UNKNOWN}, + {-1}, {-1}, +#line 32 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str12, T_DEFAULT, TF_COMMAND, S_TRISTATE}, +#line 35 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str13, T_DEFAULT, TF_COMMAND, S_BOOLEAN}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str14, T_HELP, TF_COMMAND}, - {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str16, T_CONFIG, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str17, T_DEFAULT, TF_COMMAND, S_TRISTATE}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str18, T_TYPE, TF_COMMAND, S_HEX}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str19, T_OPT_DEFCONFIG_LIST,TF_OPTION}, +#line 45 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str14, T_OPT_DEFCONFIG_LIST,TF_OPTION}, {-1}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str22, T_IF, TF_COMMAND|TF_PARAM}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str23, T_TYPE, TF_COMMAND, S_INT}, - {-1}, {-1}, {-1}, +#line 43 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str17, T_ON, TF_PARAM}, +#line 28 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str18, T_OPTIONAL, TF_COMMAND}, + {-1}, {-1}, +#line 42 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str21, T_OPTION, TF_COMMAND}, +#line 17 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str22, T_ENDMENU, TF_COMMAND}, +#line 15 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str23, T_MAINMENU, TF_COMMAND}, + {-1}, +#line 23 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str25, T_MENUCONFIG, TF_COMMAND}, + {-1}, +#line 44 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str27, T_OPT_MODULES, TF_OPTION}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str28, T_TYPE, TF_COMMAND, S_TRISTATE}, + {-1}, +#line 16 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str29, T_MENU, TF_COMMAND}, - {-1}, {-1}, + {-1}, +#line 39 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str31, T_SELECT, TF_COMMAND}, +#line 21 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str32, T_COMMENT, TF_COMMAND}, - {-1}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str35, T_MENUCONFIG, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str36, T_TYPE, TF_COMMAND, S_STRING}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str37, T_VISIBLE, TF_COMMAND}, - {-1}, {-1}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str41, T_PROMPT, TF_COMMAND}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str42, T_DEPENDS, TF_COMMAND}, +#line 46 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str33, T_OPT_ENV, TF_OPTION}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str44, T_TYPE, TF_COMMAND, S_BOOLEAN}, +#line 40 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str35, T_RANGE, TF_COMMAND}, +#line 19 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str36, T_CHOICE, TF_COMMAND}, + {-1}, {-1}, +#line 33 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str39, T_TYPE, TF_COMMAND, S_BOOLEAN}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str46, T_SELECT, TF_COMMAND}, +#line 18 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str41, T_SOURCE, TF_COMMAND}, +#line 41 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str42, T_VISIBLE, TF_COMMAND}, +#line 37 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str43, T_TYPE, TF_COMMAND, S_HEX}, + {-1}, {-1}, +#line 22 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str46, T_CONFIG, TF_COMMAND}, +#line 34 "scripts/kconfig/zconf.gperf" {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str47, T_TYPE, TF_COMMAND, S_BOOLEAN}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str48, T_MAINMENU, TF_COMMAND}, + {-1}, {-1}, {-1}, +#line 38 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str51, T_TYPE, TF_COMMAND, S_STRING}, {-1}, {-1}, - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str51, T_SOURCE, TF_COMMAND} +#line 24 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str54, T_HELP, TF_COMMAND}, + {-1}, +#line 30 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str56, T_PROMPT, TF_COMMAND}, + {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, + {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, +#line 27 "scripts/kconfig/zconf.gperf" + {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str72, T_DEPENDS, TF_COMMAND} }; if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) @@ -242,4 +282,5 @@ kconf_id_lookup (register const char *str, register unsigned int len) } return 0; } +#line 47 "scripts/kconfig/zconf.gperf" diff --git a/scripts/kconfig/zconf.lex.c_shipped b/scripts/kconfig/zconf.lex.c_shipped new file mode 100644 index 0000000..906c099 --- /dev/null +++ b/scripts/kconfig/zconf.lex.c_shipped @@ -0,0 +1,2421 @@ + +#line 3 "scripts/kconfig/zconf.lex.c_shipped" + +#define YY_INT_ALIGNED short int + +/* A lexical scanner generated by flex */ + +#define yy_create_buffer zconf_create_buffer +#define yy_delete_buffer zconf_delete_buffer +#define yy_flex_debug zconf_flex_debug +#define yy_init_buffer zconf_init_buffer +#define yy_flush_buffer zconf_flush_buffer +#define yy_load_buffer_state zconf_load_buffer_state +#define yy_switch_to_buffer zconf_switch_to_buffer +#define yyin zconfin +#define yyleng zconfleng +#define yylex zconflex +#define yylineno zconflineno +#define yyout zconfout +#define yyrestart zconfrestart +#define yytext zconftext +#define yywrap zconfwrap +#define yyalloc zconfalloc +#define yyrealloc zconfrealloc +#define yyfree zconffree + +#define FLEX_SCANNER +#define YY_FLEX_MAJOR_VERSION 2 +#define YY_FLEX_MINOR_VERSION 5 +#define YY_FLEX_SUBMINOR_VERSION 35 +#if YY_FLEX_SUBMINOR_VERSION > 0 +#define FLEX_BETA +#endif + +/* First, we deal with platform-specific or compiler-specific issues. */ + +/* begin standard C headers. */ +#include +#include +#include +#include + +/* end standard C headers. */ + +/* flex integer type definitions */ + +#ifndef FLEXINT_H +#define FLEXINT_H + +/* C99 systems have . Non-C99 systems may or may not. */ + +#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + +/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, + * if you want the limit (max/min) macros for int types. + */ +#ifndef __STDC_LIMIT_MACROS +#define __STDC_LIMIT_MACROS 1 +#endif + +#include +typedef int8_t flex_int8_t; +typedef uint8_t flex_uint8_t; +typedef int16_t flex_int16_t; +typedef uint16_t flex_uint16_t; +typedef int32_t flex_int32_t; +typedef uint32_t flex_uint32_t; +#else +typedef signed char flex_int8_t; +typedef short int flex_int16_t; +typedef int flex_int32_t; +typedef unsigned char flex_uint8_t; +typedef unsigned short int flex_uint16_t; +typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ + +/* Limits of integral types. */ +#ifndef INT8_MIN +#define INT8_MIN (-128) +#endif +#ifndef INT16_MIN +#define INT16_MIN (-32767-1) +#endif +#ifndef INT32_MIN +#define INT32_MIN (-2147483647-1) +#endif +#ifndef INT8_MAX +#define INT8_MAX (127) +#endif +#ifndef INT16_MAX +#define INT16_MAX (32767) +#endif +#ifndef INT32_MAX +#define INT32_MAX (2147483647) +#endif +#ifndef UINT8_MAX +#define UINT8_MAX (255U) +#endif +#ifndef UINT16_MAX +#define UINT16_MAX (65535U) +#endif +#ifndef UINT32_MAX +#define UINT32_MAX (4294967295U) +#endif + +#endif /* ! FLEXINT_H */ + +#ifdef __cplusplus + +/* The "const" storage-class-modifier is valid. */ +#define YY_USE_CONST + +#else /* ! __cplusplus */ + +/* C99 requires __STDC__ to be defined as 1. */ +#if defined (__STDC__) + +#define YY_USE_CONST + +#endif /* defined (__STDC__) */ +#endif /* ! __cplusplus */ + +#ifdef YY_USE_CONST +#define yyconst const +#else +#define yyconst +#endif + +/* Returned upon end-of-file. */ +#define YY_NULL 0 + +/* Promotes a possibly negative, possibly signed char to an unsigned + * integer for use as an array index. If the signed char is negative, + * we want to instead treat it as an 8-bit unsigned char, hence the + * double cast. + */ +#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) + +/* Enter a start condition. This macro really ought to take a parameter, + * but we do it the disgusting crufty way forced on us by the ()-less + * definition of BEGIN. + */ +#define BEGIN (yy_start) = 1 + 2 * + +/* Translate the current start state into a value that can be later handed + * to BEGIN to return to the state. The YYSTATE alias is for lex + * compatibility. + */ +#define YY_START (((yy_start) - 1) / 2) +#define YYSTATE YY_START + +/* Action number for EOF rule of a given start state. */ +#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) + +/* Special action meaning "start processing a new file". */ +#define YY_NEW_FILE zconfrestart(zconfin ) + +#define YY_END_OF_BUFFER_CHAR 0 + +/* Size of default input buffer. */ +#ifndef YY_BUF_SIZE +#define YY_BUF_SIZE 16384 +#endif + +/* The state buf must be large enough to hold one state per character in the main buffer. + */ +#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) + +#ifndef YY_TYPEDEF_YY_BUFFER_STATE +#define YY_TYPEDEF_YY_BUFFER_STATE +typedef struct yy_buffer_state *YY_BUFFER_STATE; +#endif + +extern int zconfleng; + +extern FILE *zconfin, *zconfout; + +#define EOB_ACT_CONTINUE_SCAN 0 +#define EOB_ACT_END_OF_FILE 1 +#define EOB_ACT_LAST_MATCH 2 + + #define YY_LESS_LINENO(n) + +/* Return all but the first "n" matched characters back to the input stream. */ +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up zconftext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + *yy_cp = (yy_hold_char); \ + YY_RESTORE_YY_MORE_OFFSET \ + (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ + YY_DO_BEFORE_ACTION; /* set up zconftext again */ \ + } \ + while ( 0 ) + +#define unput(c) yyunput( c, (yytext_ptr) ) + +#ifndef YY_TYPEDEF_YY_SIZE_T +#define YY_TYPEDEF_YY_SIZE_T +typedef size_t yy_size_t; +#endif + +#ifndef YY_STRUCT_YY_BUFFER_STATE +#define YY_STRUCT_YY_BUFFER_STATE +struct yy_buffer_state + { + FILE *yy_input_file; + + char *yy_ch_buf; /* input buffer */ + char *yy_buf_pos; /* current position in input buffer */ + + /* Size of input buffer in bytes, not including room for EOB + * characters. + */ + yy_size_t yy_buf_size; + + /* Number of characters read into yy_ch_buf, not including EOB + * characters. + */ + int yy_n_chars; + + /* Whether we "own" the buffer - i.e., we know we created it, + * and can realloc() it to grow it, and should free() it to + * delete it. + */ + int yy_is_our_buffer; + + /* Whether this is an "interactive" input source; if so, and + * if we're using stdio for input, then we want to use getc() + * instead of fread(), to make sure we stop fetching input after + * each newline. + */ + int yy_is_interactive; + + /* Whether we're considered to be at the beginning of a line. + * If so, '^' rules will be active on the next match, otherwise + * not. + */ + int yy_at_bol; + + int yy_bs_lineno; /**< The line count. */ + int yy_bs_column; /**< The column count. */ + + /* Whether to try to fill the input buffer when we reach the + * end of it. + */ + int yy_fill_buffer; + + int yy_buffer_status; + +#define YY_BUFFER_NEW 0 +#define YY_BUFFER_NORMAL 1 + /* When an EOF's been seen but there's still some text to process + * then we mark the buffer as YY_EOF_PENDING, to indicate that we + * shouldn't try reading from the input source any more. We might + * still have a bunch of tokens to match, though, because of + * possible backing-up. + * + * When we actually see the EOF, we change the status to "new" + * (via zconfrestart()), so that the user can continue scanning by + * just pointing zconfin at a new input file. + */ +#define YY_BUFFER_EOF_PENDING 2 + + }; +#endif /* !YY_STRUCT_YY_BUFFER_STATE */ + +/* Stack of input buffers. */ +static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ +static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ +static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ + +/* We provide macros for accessing buffer states in case in the + * future we want to put the buffer states in a more general + * "scanner state". + * + * Returns the top of the stack, or NULL. + */ +#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ + ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ + : NULL) + +/* Same as previous macro, but useful when we know that the buffer stack is not + * NULL or when we need an lvalue. For internal use only. + */ +#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] + +/* yy_hold_char holds the character lost when zconftext is formed. */ +static char yy_hold_char; +static int yy_n_chars; /* number of characters read into yy_ch_buf */ +int zconfleng; + +/* Points to current character in buffer. */ +static char *yy_c_buf_p = (char *) 0; +static int yy_init = 0; /* whether we need to initialize */ +static int yy_start = 0; /* start state number */ + +/* Flag which is used to allow zconfwrap()'s to do buffer switches + * instead of setting up a fresh zconfin. A bit of a hack ... + */ +static int yy_did_buffer_switch_on_eof; + +void zconfrestart (FILE *input_file ); +void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ); +YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size ); +void zconf_delete_buffer (YY_BUFFER_STATE b ); +void zconf_flush_buffer (YY_BUFFER_STATE b ); +void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ); +void zconfpop_buffer_state (void ); + +static void zconfensure_buffer_stack (void ); +static void zconf_load_buffer_state (void ); +static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file ); + +#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER ) + +YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size ); +YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str ); +YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,int len ); + +void *zconfalloc (yy_size_t ); +void *zconfrealloc (void *,yy_size_t ); +void zconffree (void * ); + +#define yy_new_buffer zconf_create_buffer + +#define yy_set_interactive(is_interactive) \ + { \ + if ( ! YY_CURRENT_BUFFER ){ \ + zconfensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ + } + +#define yy_set_bol(at_bol) \ + { \ + if ( ! YY_CURRENT_BUFFER ){\ + zconfensure_buffer_stack (); \ + YY_CURRENT_BUFFER_LVALUE = \ + zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ + } \ + YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ + } + +#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) + +/* Begin user sect3 */ + +#define zconfwrap(n) 1 +#define YY_SKIP_YYWRAP + +typedef unsigned char YY_CHAR; + +FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0; + +typedef int yy_state_type; + +extern int zconflineno; + +int zconflineno = 1; + +extern char *zconftext; +#define yytext_ptr zconftext +static yyconst flex_int16_t yy_nxt[][17] = + { + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 + }, + + { + 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, + 12, 12, 12, 12, 12, 12, 12 + }, + + { + 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, + 12, 12, 12, 12, 12, 12, 12 + }, + + { + 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 18, 16, 16, 16 + }, + + { + 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 18, 16, 16, 16 + + }, + + { + 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, + 19, 19, 19, 19, 19, 19, 19 + }, + + { + 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, + 19, 19, 19, 19, 19, 19, 19 + }, + + { + 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, + 22, 22, 22, 22, 22, 25, 22 + }, + + { + 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, + 22, 22, 22, 22, 22, 25, 22 + }, + + { + 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, + 33, 34, 35, 35, 36, 37, 38 + + }, + + { + 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, + 33, 34, 35, 35, 36, 37, 38 + }, + + { + -11, -11, -11, -11, -11, -11, -11, -11, -11, -11, + -11, -11, -11, -11, -11, -11, -11 + }, + + { + 11, -12, -12, -12, -12, -12, -12, -12, -12, -12, + -12, -12, -12, -12, -12, -12, -12 + }, + + { + 11, -13, 39, 40, -13, -13, 41, -13, -13, -13, + -13, -13, -13, -13, -13, -13, -13 + }, + + { + 11, -14, -14, -14, -14, -14, -14, -14, -14, -14, + -14, -14, -14, -14, -14, -14, -14 + + }, + + { + 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42 + }, + + { + 11, -16, -16, -16, -16, -16, -16, -16, -16, -16, + -16, -16, -16, -16, -16, -16, -16 + }, + + { + 11, -17, -17, -17, -17, -17, -17, -17, -17, -17, + -17, -17, -17, -17, -17, -17, -17 + }, + + { + 11, -18, -18, -18, -18, -18, -18, -18, -18, -18, + -18, -18, -18, 44, -18, -18, -18 + }, + + { + 11, 45, 45, -19, 45, 45, 45, 45, 45, 45, + 45, 45, 45, 45, 45, 45, 45 + + }, + + { + 11, -20, 46, 47, -20, -20, -20, -20, -20, -20, + -20, -20, -20, -20, -20, -20, -20 + }, + + { + 11, 48, -21, -21, 48, 48, 48, 48, 48, 48, + 48, 48, 48, 48, 48, 48, 48 + }, + + { + 11, 49, 49, 50, 49, -22, 49, 49, -22, 49, + 49, 49, 49, 49, 49, -22, 49 + }, + + { + 11, -23, -23, -23, -23, -23, -23, -23, -23, -23, + -23, -23, -23, -23, -23, -23, -23 + }, + + { + 11, -24, -24, -24, -24, -24, -24, -24, -24, -24, + -24, -24, -24, -24, -24, -24, -24 + + }, + + { + 11, 51, 51, 52, 51, 51, 51, 51, 51, 51, + 51, 51, 51, 51, 51, 51, 51 + }, + + { + 11, -26, -26, -26, -26, -26, -26, -26, -26, -26, + -26, -26, -26, -26, -26, -26, -26 + }, + + { + 11, -27, -27, -27, -27, -27, -27, -27, -27, -27, + -27, -27, -27, -27, -27, -27, -27 + }, + + { + 11, -28, -28, -28, -28, -28, -28, -28, -28, -28, + -28, -28, -28, -28, 53, -28, -28 + }, + + { + 11, -29, -29, -29, -29, -29, -29, -29, -29, -29, + -29, -29, -29, -29, -29, -29, -29 + + }, + + { + 11, 54, 54, -30, 54, 54, 54, 54, 54, 54, + 54, 54, 54, 54, 54, 54, 54 + }, + + { + 11, -31, -31, -31, -31, -31, -31, 55, -31, -31, + -31, -31, -31, -31, -31, -31, -31 + }, + + { + 11, -32, -32, -32, -32, -32, -32, -32, -32, -32, + -32, -32, -32, -32, -32, -32, -32 + }, + + { + 11, -33, -33, -33, -33, -33, -33, -33, -33, -33, + -33, -33, -33, -33, -33, -33, -33 + }, + + { + 11, -34, -34, -34, -34, -34, -34, -34, -34, -34, + -34, 56, 57, 57, -34, -34, -34 + + }, + + { + 11, -35, -35, -35, -35, -35, -35, -35, -35, -35, + -35, 57, 57, 57, -35, -35, -35 + }, + + { + 11, -36, -36, -36, -36, -36, -36, -36, -36, -36, + -36, -36, -36, -36, -36, -36, -36 + }, + + { + 11, -37, -37, 58, -37, -37, -37, -37, -37, -37, + -37, -37, -37, -37, -37, -37, -37 + }, + + { + 11, -38, -38, -38, -38, -38, -38, -38, -38, -38, + -38, -38, -38, -38, -38, -38, 59 + }, + + { + 11, -39, 39, 40, -39, -39, 41, -39, -39, -39, + -39, -39, -39, -39, -39, -39, -39 + + }, + + { + 11, -40, -40, -40, -40, -40, -40, -40, -40, -40, + -40, -40, -40, -40, -40, -40, -40 + }, + + { + 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42 + }, + + { + 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, + 42, 42, 42, 42, 42, 42, 42 + }, + + { + 11, -43, -43, -43, -43, -43, -43, -43, -43, -43, + -43, -43, -43, -43, -43, -43, -43 + }, + + { + 11, -44, -44, -44, -44, -44, -44, -44, -44, -44, + -44, -44, -44, 44, -44, -44, -44 + + }, + + { + 11, 45, 45, -45, 45, 45, 45, 45, 45, 45, + 45, 45, 45, 45, 45, 45, 45 + }, + + { + 11, -46, 46, 47, -46, -46, -46, -46, -46, -46, + -46, -46, -46, -46, -46, -46, -46 + }, + + { + 11, 48, -47, -47, 48, 48, 48, 48, 48, 48, + 48, 48, 48, 48, 48, 48, 48 + }, + + { + 11, -48, -48, -48, -48, -48, -48, -48, -48, -48, + -48, -48, -48, -48, -48, -48, -48 + }, + + { + 11, 49, 49, 50, 49, -49, 49, 49, -49, 49, + 49, 49, 49, 49, 49, -49, 49 + + }, + + { + 11, -50, -50, -50, -50, -50, -50, -50, -50, -50, + -50, -50, -50, -50, -50, -50, -50 + }, + + { + 11, -51, -51, 52, -51, -51, -51, -51, -51, -51, + -51, -51, -51, -51, -51, -51, -51 + }, + + { + 11, -52, -52, -52, -52, -52, -52, -52, -52, -52, + -52, -52, -52, -52, -52, -52, -52 + }, + + { + 11, -53, -53, -53, -53, -53, -53, -53, -53, -53, + -53, -53, -53, -53, -53, -53, -53 + }, + + { + 11, 54, 54, -54, 54, 54, 54, 54, 54, 54, + 54, 54, 54, 54, 54, 54, 54 + + }, + + { + 11, -55, -55, -55, -55, -55, -55, -55, -55, -55, + -55, -55, -55, -55, -55, -55, -55 + }, + + { + 11, -56, -56, -56, -56, -56, -56, -56, -56, -56, + -56, 60, 57, 57, -56, -56, -56 + }, + + { + 11, -57, -57, -57, -57, -57, -57, -57, -57, -57, + -57, 57, 57, 57, -57, -57, -57 + }, + + { + 11, -58, -58, -58, -58, -58, -58, -58, -58, -58, + -58, -58, -58, -58, -58, -58, -58 + }, + + { + 11, -59, -59, -59, -59, -59, -59, -59, -59, -59, + -59, -59, -59, -59, -59, -59, -59 + + }, + + { + 11, -60, -60, -60, -60, -60, -60, -60, -60, -60, + -60, 57, 57, 57, -60, -60, -60 + }, + + } ; + +static yy_state_type yy_get_previous_state (void ); +static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); +static int yy_get_next_buffer (void ); +static void yy_fatal_error (yyconst char msg[] ); + +/* Done after the current pattern has been matched and before the + * corresponding action - sets up zconftext. + */ +#define YY_DO_BEFORE_ACTION \ + (yytext_ptr) = yy_bp; \ + zconfleng = (size_t) (yy_cp - yy_bp); \ + (yy_hold_char) = *yy_cp; \ + *yy_cp = '\0'; \ + (yy_c_buf_p) = yy_cp; + +#define YY_NUM_RULES 33 +#define YY_END_OF_BUFFER 34 +/* This struct is not used in this scanner, + but its presence is necessary. */ +struct yy_trans_info + { + flex_int32_t yy_verify; + flex_int32_t yy_nxt; + }; +static yyconst flex_int16_t yy_accept[61] = + { 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 34, 5, 4, 2, 3, 7, 8, 6, 32, 29, + 31, 24, 28, 27, 26, 22, 17, 13, 16, 20, + 22, 11, 12, 19, 19, 14, 22, 22, 4, 2, + 3, 3, 1, 6, 32, 29, 31, 30, 24, 23, + 26, 25, 15, 20, 9, 19, 19, 21, 10, 18 + } ; + +static yyconst flex_int32_t yy_ec[256] = + { 0, + 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 2, 4, 5, 6, 1, 1, 7, 8, 9, + 10, 1, 1, 1, 11, 12, 12, 13, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, + 14, 1, 1, 1, 13, 13, 13, 13, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 1, 15, 1, 1, 13, 1, 13, 13, 13, 13, + + 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 13, 1, 16, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1 + } ; + +extern int zconf_flex_debug; +int zconf_flex_debug = 0; + +/* The intent behind this definition is that it'll catch + * any uses of REJECT which flex missed. + */ +#define REJECT reject_used_but_not_detected +#define yymore() yymore_used_but_not_detected +#define YY_MORE_ADJ 0 +#define YY_RESTORE_YY_MORE_OFFSET +char *zconftext; +#define YY_NO_INPUT 1 + +/* + * Copyright (C) 2002 Roman Zippel + * Released under the terms of the GNU GPL v2.0. + */ + +#include +#include +#include +#include +#include + +#define LKC_DIRECT_LINK +#include "lkc.h" + +#define START_STRSIZE 16 + +static struct { + struct file *file; + int lineno; +} current_pos; + +static char *text; +static int text_size, text_asize; + +struct buffer { + struct buffer *parent; + YY_BUFFER_STATE state; +}; + +struct buffer *current_buf; + +static int last_ts, first_ts; + +static void zconf_endhelp(void); +static void zconf_endfile(void); + +static void new_string(void) +{ + text = malloc(START_STRSIZE); + text_asize = START_STRSIZE; + text_size = 0; + *text = 0; +} + +static void append_string(const char *str, int size) +{ + int new_size = text_size + size + 1; + if (new_size > text_asize) { + new_size += START_STRSIZE - 1; + new_size &= -START_STRSIZE; + text = realloc(text, new_size); + text_asize = new_size; + } + memcpy(text + text_size, str, size); + text_size += size; + text[text_size] = 0; +} + +static void alloc_string(const char *str, int size) +{ + text = malloc(size + 1); + memcpy(text, str, size); + text[size] = 0; +} + +#define INITIAL 0 +#define COMMAND 1 +#define HELP 2 +#define STRING 3 +#define PARAM 4 + +#ifndef YY_NO_UNISTD_H +/* Special case for "unistd.h", since it is non-ANSI. We include it way + * down here because we want the user's section 1 to have been scanned first. + * The user has a chance to override it with an option. + */ +#include +#endif + +#ifndef YY_EXTRA_TYPE +#define YY_EXTRA_TYPE void * +#endif + +static int yy_init_globals (void ); + +/* Accessor methods to globals. + These are made visible to non-reentrant scanners for convenience. */ + +int zconflex_destroy (void ); + +int zconfget_debug (void ); + +void zconfset_debug (int debug_flag ); + +YY_EXTRA_TYPE zconfget_extra (void ); + +void zconfset_extra (YY_EXTRA_TYPE user_defined ); + +FILE *zconfget_in (void ); + +void zconfset_in (FILE * in_str ); + +FILE *zconfget_out (void ); + +void zconfset_out (FILE * out_str ); + +int zconfget_leng (void ); + +char *zconfget_text (void ); + +int zconfget_lineno (void ); + +void zconfset_lineno (int line_number ); + +/* Macros after this point can all be overridden by user definitions in + * section 1. + */ + +#ifndef YY_SKIP_YYWRAP +#ifdef __cplusplus +extern "C" int zconfwrap (void ); +#else +extern int zconfwrap (void ); +#endif +#endif + + static void yyunput (int c,char *buf_ptr ); + +#ifndef yytext_ptr +static void yy_flex_strncpy (char *,yyconst char *,int ); +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * ); +#endif + +#ifndef YY_NO_INPUT + +#ifdef __cplusplus +static int yyinput (void ); +#else +static int input (void ); +#endif + +#endif + +/* Amount of stuff to slurp up with each read. */ +#ifndef YY_READ_BUF_SIZE +#define YY_READ_BUF_SIZE 8192 +#endif + +/* Copy whatever the last rule matched to the standard output. */ +#ifndef ECHO +/* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0) +#endif + +/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, + * is returned in "result". + */ +#ifndef YY_INPUT +#define YY_INPUT(buf,result,max_size) \ + errno=0; \ + while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \ + { \ + if( errno != EINTR) \ + { \ + YY_FATAL_ERROR( "input in flex scanner failed" ); \ + break; \ + } \ + errno=0; \ + clearerr(zconfin); \ + }\ +\ + +#endif + +/* No semi-colon after return; correct usage is to write "yyterminate();" - + * we don't want an extra ';' after the "return" because that will cause + * some compilers to complain about unreachable statements. + */ +#ifndef yyterminate +#define yyterminate() return YY_NULL +#endif + +/* Number of entries by which start-condition stack grows. */ +#ifndef YY_START_STACK_INCR +#define YY_START_STACK_INCR 25 +#endif + +/* Report a fatal error. */ +#ifndef YY_FATAL_ERROR +#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) +#endif + +/* end tables serialization structures and prototypes */ + +/* Default declaration of generated scanner - a define so the user can + * easily add parameters. + */ +#ifndef YY_DECL +#define YY_DECL_IS_OURS 1 + +extern int zconflex (void); + +#define YY_DECL int zconflex (void) +#endif /* !YY_DECL */ + +/* Code executed at the beginning of each rule, after zconftext and zconfleng + * have been set up. + */ +#ifndef YY_USER_ACTION +#define YY_USER_ACTION +#endif + +/* Code executed at the end of each rule. */ +#ifndef YY_BREAK +#define YY_BREAK break; +#endif + +#define YY_RULE_SETUP \ + YY_USER_ACTION + +/** The main scanner function which does all the work. + */ +YY_DECL +{ + register yy_state_type yy_current_state; + register char *yy_cp, *yy_bp; + register int yy_act; + + int str = 0; + int ts, i; + + if ( !(yy_init) ) + { + (yy_init) = 1; + +#ifdef YY_USER_INIT + YY_USER_INIT; +#endif + + if ( ! (yy_start) ) + (yy_start) = 1; /* first start state */ + + if ( ! zconfin ) + zconfin = stdin; + + if ( ! zconfout ) + zconfout = stdout; + + if ( ! YY_CURRENT_BUFFER ) { + zconfensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + zconf_create_buffer(zconfin,YY_BUF_SIZE ); + } + + zconf_load_buffer_state( ); + } + + while ( 1 ) /* loops until end-of-file is reached */ + { + yy_cp = (yy_c_buf_p); + + /* Support of zconftext. */ + *yy_cp = (yy_hold_char); + + /* yy_bp points to the position in yy_ch_buf of the start of + * the current run. + */ + yy_bp = yy_cp; + + yy_current_state = (yy_start); +yy_match: + while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)] ]) > 0 ) + ++yy_cp; + + yy_current_state = -yy_current_state; + +yy_find_action: + yy_act = yy_accept[yy_current_state]; + + YY_DO_BEFORE_ACTION; + +do_action: /* This label is used only to access EOF actions. */ + + switch ( yy_act ) + { /* beginning of action switch */ +case 1: +/* rule 1 can match eol */ +case 2: +/* rule 2 can match eol */ +YY_RULE_SETUP +{ + current_file->lineno++; + return T_EOL; +} + YY_BREAK +case 3: +YY_RULE_SETUP + + YY_BREAK +case 4: +YY_RULE_SETUP +{ + BEGIN(COMMAND); +} + YY_BREAK +case 5: +YY_RULE_SETUP +{ + unput(zconftext[0]); + BEGIN(COMMAND); +} + YY_BREAK + +case 6: +YY_RULE_SETUP +{ + const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); + BEGIN(PARAM); + current_pos.file = current_file; + current_pos.lineno = current_file->lineno; + if (id && id->flags & TF_COMMAND) { + zconflval.id = id; + return id->token; + } + alloc_string(zconftext, zconfleng); + zconflval.string = text; + return T_WORD; + } + YY_BREAK +case 7: +YY_RULE_SETUP + + YY_BREAK +case 8: +/* rule 8 can match eol */ +YY_RULE_SETUP +{ + BEGIN(INITIAL); + current_file->lineno++; + return T_EOL; + } + YY_BREAK + +case 9: +YY_RULE_SETUP +return T_AND; + YY_BREAK +case 10: +YY_RULE_SETUP +return T_OR; + YY_BREAK +case 11: +YY_RULE_SETUP +return T_OPEN_PAREN; + YY_BREAK +case 12: +YY_RULE_SETUP +return T_CLOSE_PAREN; + YY_BREAK +case 13: +YY_RULE_SETUP +return T_NOT; + YY_BREAK +case 14: +YY_RULE_SETUP +return T_EQUAL; + YY_BREAK +case 15: +YY_RULE_SETUP +return T_UNEQUAL; + YY_BREAK +case 16: +YY_RULE_SETUP +{ + str = zconftext[0]; + new_string(); + BEGIN(STRING); + } + YY_BREAK +case 17: +/* rule 17 can match eol */ +YY_RULE_SETUP +BEGIN(INITIAL); current_file->lineno++; return T_EOL; + YY_BREAK +case 18: +YY_RULE_SETUP +/* ignore */ + YY_BREAK +case 19: +YY_RULE_SETUP +{ + const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); + if (id && id->flags & TF_PARAM) { + zconflval.id = id; + return id->token; + } + alloc_string(zconftext, zconfleng); + zconflval.string = text; + return T_WORD; + } + YY_BREAK +case 20: +YY_RULE_SETUP +/* comment */ + YY_BREAK +case 21: +/* rule 21 can match eol */ +YY_RULE_SETUP +current_file->lineno++; + YY_BREAK +case 22: +YY_RULE_SETUP + + YY_BREAK +case YY_STATE_EOF(PARAM): +{ + BEGIN(INITIAL); + } + YY_BREAK + +case 23: +/* rule 23 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ +YY_RULE_SETUP +{ + append_string(zconftext, zconfleng); + zconflval.string = text; + return T_WORD_QUOTE; + } + YY_BREAK +case 24: +YY_RULE_SETUP +{ + append_string(zconftext, zconfleng); + } + YY_BREAK +case 25: +/* rule 25 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ +YY_RULE_SETUP +{ + append_string(zconftext + 1, zconfleng - 1); + zconflval.string = text; + return T_WORD_QUOTE; + } + YY_BREAK +case 26: +YY_RULE_SETUP +{ + append_string(zconftext + 1, zconfleng - 1); + } + YY_BREAK +case 27: +YY_RULE_SETUP +{ + if (str == zconftext[0]) { + BEGIN(PARAM); + zconflval.string = text; + return T_WORD_QUOTE; + } else + append_string(zconftext, 1); + } + YY_BREAK +case 28: +/* rule 28 can match eol */ +YY_RULE_SETUP +{ + printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); + current_file->lineno++; + BEGIN(INITIAL); + return T_EOL; + } + YY_BREAK +case YY_STATE_EOF(STRING): +{ + BEGIN(INITIAL); + } + YY_BREAK + +case 29: +YY_RULE_SETUP +{ + ts = 0; + for (i = 0; i < zconfleng; i++) { + if (zconftext[i] == '\t') + ts = (ts & ~7) + 8; + else + ts++; + } + last_ts = ts; + if (first_ts) { + if (ts < first_ts) { + zconf_endhelp(); + return T_HELPTEXT; + } + ts -= first_ts; + while (ts > 8) { + append_string(" ", 8); + ts -= 8; + } + append_string(" ", ts); + } + } + YY_BREAK +case 30: +/* rule 30 can match eol */ +*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ +(yy_c_buf_p) = yy_cp -= 1; +YY_DO_BEFORE_ACTION; /* set up zconftext again */ +YY_RULE_SETUP +{ + current_file->lineno++; + zconf_endhelp(); + return T_HELPTEXT; + } + YY_BREAK +case 31: +/* rule 31 can match eol */ +YY_RULE_SETUP +{ + current_file->lineno++; + append_string("\n", 1); + } + YY_BREAK +case 32: +YY_RULE_SETUP +{ + while (zconfleng) { + if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t')) + break; + zconfleng--; + } + append_string(zconftext, zconfleng); + if (!first_ts) + first_ts = last_ts; + } + YY_BREAK +case YY_STATE_EOF(HELP): +{ + zconf_endhelp(); + return T_HELPTEXT; + } + YY_BREAK + +case YY_STATE_EOF(INITIAL): +case YY_STATE_EOF(COMMAND): +{ + if (current_file) { + zconf_endfile(); + return T_EOL; + } + fclose(zconfin); + yyterminate(); +} + YY_BREAK +case 33: +YY_RULE_SETUP +YY_FATAL_ERROR( "flex scanner jammed" ); + YY_BREAK + + case YY_END_OF_BUFFER: + { + /* Amount of text matched not including the EOB char. */ + int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; + + /* Undo the effects of YY_DO_BEFORE_ACTION. */ + *yy_cp = (yy_hold_char); + YY_RESTORE_YY_MORE_OFFSET + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) + { + /* We're scanning a new file or input source. It's + * possible that this happened because the user + * just pointed zconfin at a new source and called + * zconflex(). If so, then we have to assure + * consistency between YY_CURRENT_BUFFER and our + * globals. Here is the right place to do so, because + * this is the first action (other than possibly a + * back-up) that will match for the new input source. + */ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; + } + + /* Note that here we test for yy_c_buf_p "<=" to the position + * of the first EOB in the buffer, since yy_c_buf_p will + * already have been incremented past the NUL character + * (since all states make transitions on EOB to the + * end-of-buffer state). Contrast this with the test + * in input(). + */ + if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + { /* This was really a NUL. */ + yy_state_type yy_next_state; + + (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + /* Okay, we're now positioned to make the NUL + * transition. We couldn't have + * yy_get_previous_state() go ahead and do it + * for us because it doesn't know how to deal + * with the possibility of jamming (and we don't + * want to build jamming into it because then it + * will run more slowly). + */ + + yy_next_state = yy_try_NUL_trans( yy_current_state ); + + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + + if ( yy_next_state ) + { + /* Consume the NUL. */ + yy_cp = ++(yy_c_buf_p); + yy_current_state = yy_next_state; + goto yy_match; + } + + else + { + yy_cp = (yy_c_buf_p); + goto yy_find_action; + } + } + + else switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_END_OF_FILE: + { + (yy_did_buffer_switch_on_eof) = 0; + + if ( zconfwrap( ) ) + { + /* Note: because we've taken care in + * yy_get_next_buffer() to have set up + * zconftext, we can now set up + * yy_c_buf_p so that if some total + * hoser (like flex itself) wants to + * call the scanner after we return the + * YY_NULL, it'll still work - another + * YY_NULL will get returned. + */ + (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; + + yy_act = YY_STATE_EOF(YY_START); + goto do_action; + } + + else + { + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; + } + break; + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = + (yytext_ptr) + yy_amount_of_matched_text; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_match; + + case EOB_ACT_LAST_MATCH: + (yy_c_buf_p) = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; + + yy_current_state = yy_get_previous_state( ); + + yy_cp = (yy_c_buf_p); + yy_bp = (yytext_ptr) + YY_MORE_ADJ; + goto yy_find_action; + } + break; + } + + default: + YY_FATAL_ERROR( + "fatal flex scanner internal error--no action found" ); + } /* end of action switch */ + } /* end of scanning one token */ +} /* end of zconflex */ + +/* yy_get_next_buffer - try to read in a new buffer + * + * Returns a code representing an action: + * EOB_ACT_LAST_MATCH - + * EOB_ACT_CONTINUE_SCAN - continue scanning from current position + * EOB_ACT_END_OF_FILE - end of file + */ +static int yy_get_next_buffer (void) +{ + register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; + register char *source = (yytext_ptr); + register int number_to_move, i; + int ret_val; + + if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) + YY_FATAL_ERROR( + "fatal flex scanner internal error--end of buffer missed" ); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) + { /* Don't try to fill the buffer, so this is an EOF. */ + if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) + { + /* We matched a single character, the EOB, so + * treat this as a final EOF. + */ + return EOB_ACT_END_OF_FILE; + } + + else + { + /* We matched some text prior to the EOB, first + * process it. + */ + return EOB_ACT_LAST_MATCH; + } + } + + /* Try to read more data. */ + + /* First move last chars to start of buffer. */ + number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; + + for ( i = 0; i < number_to_move; ++i ) + *(dest++) = *(source++); + + if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) + /* don't do the read, it's not guaranteed to return an EOF, + * just force an EOF + */ + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; + + else + { + int num_to_read = + YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; + + while ( num_to_read <= 0 ) + { /* Not enough room in the buffer - grow it. */ + + /* just a shorter name for the current buffer */ + YY_BUFFER_STATE b = YY_CURRENT_BUFFER; + + int yy_c_buf_p_offset = + (int) ((yy_c_buf_p) - b->yy_ch_buf); + + if ( b->yy_is_our_buffer ) + { + int new_size = b->yy_buf_size * 2; + + if ( new_size <= 0 ) + b->yy_buf_size += b->yy_buf_size / 8; + else + b->yy_buf_size *= 2; + + b->yy_ch_buf = (char *) + /* Include room in for 2 EOB chars. */ + zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); + } + else + /* Can't grow it, we don't own it. */ + b->yy_ch_buf = 0; + + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( + "fatal error - scanner input buffer overflow" ); + + (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; + + num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - + number_to_move - 1; + + } + + if ( num_to_read > YY_READ_BUF_SIZE ) + num_to_read = YY_READ_BUF_SIZE; + + /* Read in more data. */ + YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), + (yy_n_chars), (size_t) num_to_read ); + + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + if ( (yy_n_chars) == 0 ) + { + if ( number_to_move == YY_MORE_ADJ ) + { + ret_val = EOB_ACT_END_OF_FILE; + zconfrestart(zconfin ); + } + + else + { + ret_val = EOB_ACT_LAST_MATCH; + YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = + YY_BUFFER_EOF_PENDING; + } + } + + else + ret_val = EOB_ACT_CONTINUE_SCAN; + + if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + /* Extend the array by 50%, plus the number we really need. */ + yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); + if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); + } + + (yy_n_chars) += number_to_move; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; + + (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; + + return ret_val; +} + +/* yy_get_previous_state - get the state just before the EOB char was reached */ + + static yy_state_type yy_get_previous_state (void) +{ + register yy_state_type yy_current_state; + register char *yy_cp; + + yy_current_state = (yy_start); + + for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) + { + yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)]; + } + + return yy_current_state; +} + +/* yy_try_NUL_trans - try to make a transition on the NUL character + * + * synopsis + * next_state = yy_try_NUL_trans( current_state ); + */ + static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) +{ + register int yy_is_jam; + + yy_current_state = yy_nxt[yy_current_state][1]; + yy_is_jam = (yy_current_state <= 0); + + return yy_is_jam ? 0 : yy_current_state; +} + + static void yyunput (int c, register char * yy_bp ) +{ + register char *yy_cp; + + yy_cp = (yy_c_buf_p); + + /* undo effects of setting up zconftext */ + *yy_cp = (yy_hold_char); + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + { /* need to shift things up to make room */ + /* +2 for EOB chars. */ + register int number_to_move = (yy_n_chars) + 2; + register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ + YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; + register char *source = + &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; + + while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) + *--dest = *--source; + + yy_cp += (int) (dest - source); + yy_bp += (int) (dest - source); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; + + if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) + YY_FATAL_ERROR( "flex scanner push-back overflow" ); + } + + *--yy_cp = (char) c; + + (yytext_ptr) = yy_bp; + (yy_hold_char) = *yy_cp; + (yy_c_buf_p) = yy_cp; +} + +#ifndef YY_NO_INPUT +#ifdef __cplusplus + static int yyinput (void) +#else + static int input (void) +#endif + +{ + int c; + + *(yy_c_buf_p) = (yy_hold_char); + + if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) + { + /* yy_c_buf_p now points to the character we want to return. + * If this occurs *before* the EOB characters, then it's a + * valid NUL; if not, then we've hit the end of the buffer. + */ + if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) + /* This was really a NUL. */ + *(yy_c_buf_p) = '\0'; + + else + { /* need more input */ + int offset = (yy_c_buf_p) - (yytext_ptr); + ++(yy_c_buf_p); + + switch ( yy_get_next_buffer( ) ) + { + case EOB_ACT_LAST_MATCH: + /* This happens because yy_g_n_b() + * sees that we've accumulated a + * token and flags that we need to + * try matching the token before + * proceeding. But for input(), + * there's no matching to consider. + * So convert the EOB_ACT_LAST_MATCH + * to EOB_ACT_END_OF_FILE. + */ + + /* Reset buffer status. */ + zconfrestart(zconfin ); + + /*FALLTHROUGH*/ + + case EOB_ACT_END_OF_FILE: + { + if ( zconfwrap( ) ) + return EOF; + + if ( ! (yy_did_buffer_switch_on_eof) ) + YY_NEW_FILE; +#ifdef __cplusplus + return yyinput(); +#else + return input(); +#endif + } + + case EOB_ACT_CONTINUE_SCAN: + (yy_c_buf_p) = (yytext_ptr) + offset; + break; + } + } + } + + c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ + *(yy_c_buf_p) = '\0'; /* preserve zconftext */ + (yy_hold_char) = *++(yy_c_buf_p); + + return c; +} +#endif /* ifndef YY_NO_INPUT */ + +/** Immediately switch to a different input stream. + * @param input_file A readable stream. + * + * @note This function does not reset the start condition to @c INITIAL . + */ + void zconfrestart (FILE * input_file ) +{ + + if ( ! YY_CURRENT_BUFFER ){ + zconfensure_buffer_stack (); + YY_CURRENT_BUFFER_LVALUE = + zconf_create_buffer(zconfin,YY_BUF_SIZE ); + } + + zconf_init_buffer(YY_CURRENT_BUFFER,input_file ); + zconf_load_buffer_state( ); +} + +/** Switch to a different input buffer. + * @param new_buffer The new input buffer. + * + */ + void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ) +{ + + /* TODO. We should be able to replace this entire function body + * with + * zconfpop_buffer_state(); + * zconfpush_buffer_state(new_buffer); + */ + zconfensure_buffer_stack (); + if ( YY_CURRENT_BUFFER == new_buffer ) + return; + + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + YY_CURRENT_BUFFER_LVALUE = new_buffer; + zconf_load_buffer_state( ); + + /* We don't actually know whether we did this switch during + * EOF (zconfwrap()) processing, but the only time this flag + * is looked at is after zconfwrap() is called, so it's safe + * to go ahead and always set it. + */ + (yy_did_buffer_switch_on_eof) = 1; +} + +static void zconf_load_buffer_state (void) +{ + (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; + (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; + zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; + (yy_hold_char) = *(yy_c_buf_p); +} + +/** Allocate and initialize an input buffer state. + * @param file A readable stream. + * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. + * + * @return the allocated buffer state. + */ + YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size ) +{ + YY_BUFFER_STATE b; + + b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); + + b->yy_buf_size = size; + + /* yy_ch_buf has to be 2 characters longer than the size given because + * we need to put in 2 end-of-buffer characters. + */ + b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2 ); + if ( ! b->yy_ch_buf ) + YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); + + b->yy_is_our_buffer = 1; + + zconf_init_buffer(b,file ); + + return b; +} + +/** Destroy the buffer. + * @param b a buffer created with zconf_create_buffer() + * + */ + void zconf_delete_buffer (YY_BUFFER_STATE b ) +{ + + if ( ! b ) + return; + + if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ + YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; + + if ( b->yy_is_our_buffer ) + zconffree((void *) b->yy_ch_buf ); + + zconffree((void *) b ); +} + +/* Initializes or reinitializes a buffer. + * This function is sometimes called more than once on the same buffer, + * such as during a zconfrestart() or at EOF. + */ + static void zconf_init_buffer (YY_BUFFER_STATE b, FILE * file ) + +{ + int oerrno = errno; + + zconf_flush_buffer(b ); + + b->yy_input_file = file; + b->yy_fill_buffer = 1; + + /* If b is the current buffer, then zconf_init_buffer was _probably_ + * called from zconfrestart() or through yy_get_next_buffer. + * In that case, we don't want to reset the lineno or column. + */ + if (b != YY_CURRENT_BUFFER){ + b->yy_bs_lineno = 1; + b->yy_bs_column = 0; + } + + b->yy_is_interactive = 0; + + errno = oerrno; +} + +/** Discard all buffered characters. On the next scan, YY_INPUT will be called. + * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. + * + */ + void zconf_flush_buffer (YY_BUFFER_STATE b ) +{ + if ( ! b ) + return; + + b->yy_n_chars = 0; + + /* We always need two end-of-buffer characters. The first causes + * a transition to the end-of-buffer state. The second causes + * a jam in that state. + */ + b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; + b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; + + b->yy_buf_pos = &b->yy_ch_buf[0]; + + b->yy_at_bol = 1; + b->yy_buffer_status = YY_BUFFER_NEW; + + if ( b == YY_CURRENT_BUFFER ) + zconf_load_buffer_state( ); +} + +/** Pushes the new state onto the stack. The new state becomes + * the current state. This function will allocate the stack + * if necessary. + * @param new_buffer The new state. + * + */ +void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ) +{ + if (new_buffer == NULL) + return; + + zconfensure_buffer_stack(); + + /* This block is copied from zconf_switch_to_buffer. */ + if ( YY_CURRENT_BUFFER ) + { + /* Flush out information for old buffer. */ + *(yy_c_buf_p) = (yy_hold_char); + YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); + YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); + } + + /* Only push if top exists. Otherwise, replace top. */ + if (YY_CURRENT_BUFFER) + (yy_buffer_stack_top)++; + YY_CURRENT_BUFFER_LVALUE = new_buffer; + + /* copied from zconf_switch_to_buffer. */ + zconf_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; +} + +/** Removes and deletes the top of the stack, if present. + * The next element becomes the new top. + * + */ +void zconfpop_buffer_state (void) +{ + if (!YY_CURRENT_BUFFER) + return; + + zconf_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + if ((yy_buffer_stack_top) > 0) + --(yy_buffer_stack_top); + + if (YY_CURRENT_BUFFER) { + zconf_load_buffer_state( ); + (yy_did_buffer_switch_on_eof) = 1; + } +} + +/* Allocates the stack if it does not exist. + * Guarantees space for at least one push. + */ +static void zconfensure_buffer_stack (void) +{ + int num_to_alloc; + + if (!(yy_buffer_stack)) { + + /* First allocation is just for 2 elements, since we don't know if this + * scanner will even need a stack. We use 2 instead of 1 to avoid an + * immediate realloc on the next call. + */ + num_to_alloc = 1; + (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc + (num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); + + memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); + + (yy_buffer_stack_max) = num_to_alloc; + (yy_buffer_stack_top) = 0; + return; + } + + if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ + + /* Increase the buffer to prepare for a possible push. */ + int grow_size = 8 /* arbitrary grow size */; + + num_to_alloc = (yy_buffer_stack_max) + grow_size; + (yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc + ((yy_buffer_stack), + num_to_alloc * sizeof(struct yy_buffer_state*) + ); + if ( ! (yy_buffer_stack) ) + YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); + + /* zero only the new slots.*/ + memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); + (yy_buffer_stack_max) = num_to_alloc; + } +} + +/** Setup the input buffer state to scan directly from a user-specified character buffer. + * @param base the character buffer + * @param size the size in bytes of the character buffer + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size ) +{ + YY_BUFFER_STATE b; + + if ( size < 2 || + base[size-2] != YY_END_OF_BUFFER_CHAR || + base[size-1] != YY_END_OF_BUFFER_CHAR ) + /* They forgot to leave room for the EOB's. */ + return 0; + + b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); + if ( ! b ) + YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" ); + + b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_pos = b->yy_ch_buf = base; + b->yy_is_our_buffer = 0; + b->yy_input_file = 0; + b->yy_n_chars = b->yy_buf_size; + b->yy_is_interactive = 0; + b->yy_at_bol = 1; + b->yy_fill_buffer = 0; + b->yy_buffer_status = YY_BUFFER_NEW; + + zconf_switch_to_buffer(b ); + + return b; +} + +/** Setup the input buffer state to scan a string. The next call to zconflex() will + * scan from a @e copy of @a str. + * @param yystr a NUL-terminated string to scan + * + * @return the newly allocated buffer state object. + * @note If you want to scan bytes that may contain NUL values, then use + * zconf_scan_bytes() instead. + */ +YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr ) +{ + + return zconf_scan_bytes(yystr,strlen(yystr) ); +} + +/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will + * scan from a @e copy of @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len ) +{ + YY_BUFFER_STATE b; + char *buf; + yy_size_t n; + int i; + + /* Get memory for full buffer, including space for trailing EOB's. */ + n = _yybytes_len + 2; + buf = (char *) zconfalloc(n ); + if ( ! buf ) + YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" ); + + for ( i = 0; i < _yybytes_len; ++i ) + buf[i] = yybytes[i]; + + buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; + + b = zconf_scan_buffer(buf,n ); + if ( ! b ) + YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" ); + + /* It's okay to grow etc. this buffer, and we should throw it + * away when we're done. + */ + b->yy_is_our_buffer = 1; + + return b; +} + +#ifndef YY_EXIT_FAILURE +#define YY_EXIT_FAILURE 2 +#endif + +static void yy_fatal_error (yyconst char* msg ) +{ + (void) fprintf( stderr, "%s\n", msg ); + exit( YY_EXIT_FAILURE ); +} + +/* Redefine yyless() so it works in section 3 code. */ + +#undef yyless +#define yyless(n) \ + do \ + { \ + /* Undo effects of setting up zconftext. */ \ + int yyless_macro_arg = (n); \ + YY_LESS_LINENO(yyless_macro_arg);\ + zconftext[zconfleng] = (yy_hold_char); \ + (yy_c_buf_p) = zconftext + yyless_macro_arg; \ + (yy_hold_char) = *(yy_c_buf_p); \ + *(yy_c_buf_p) = '\0'; \ + zconfleng = yyless_macro_arg; \ + } \ + while ( 0 ) + +/* Accessor methods (get/set functions) to struct members. */ + +/** Get the current line number. + * + */ +int zconfget_lineno (void) +{ + + return zconflineno; +} + +/** Get the input stream. + * + */ +FILE *zconfget_in (void) +{ + return zconfin; +} + +/** Get the output stream. + * + */ +FILE *zconfget_out (void) +{ + return zconfout; +} + +/** Get the length of the current token. + * + */ +int zconfget_leng (void) +{ + return zconfleng; +} + +/** Get the current token. + * + */ + +char *zconfget_text (void) +{ + return zconftext; +} + +/** Set the current line number. + * @param line_number + * + */ +void zconfset_lineno (int line_number ) +{ + + zconflineno = line_number; +} + +/** Set the input stream. This does not discard the current + * input buffer. + * @param in_str A readable stream. + * + * @see zconf_switch_to_buffer + */ +void zconfset_in (FILE * in_str ) +{ + zconfin = in_str ; +} + +void zconfset_out (FILE * out_str ) +{ + zconfout = out_str ; +} + +int zconfget_debug (void) +{ + return zconf_flex_debug; +} + +void zconfset_debug (int bdebug ) +{ + zconf_flex_debug = bdebug ; +} + +static int yy_init_globals (void) +{ + /* Initialization is the same as for the non-reentrant scanner. + * This function is called from zconflex_destroy(), so don't allocate here. + */ + + (yy_buffer_stack) = 0; + (yy_buffer_stack_top) = 0; + (yy_buffer_stack_max) = 0; + (yy_c_buf_p) = (char *) 0; + (yy_init) = 0; + (yy_start) = 0; + +/* Defined in main.c */ +#ifdef YY_STDINIT + zconfin = stdin; + zconfout = stdout; +#else + zconfin = (FILE *) 0; + zconfout = (FILE *) 0; +#endif + + /* For future reference: Set errno on error, since we are called by + * zconflex_init() + */ + return 0; +} + +/* zconflex_destroy is for both reentrant and non-reentrant scanners. */ +int zconflex_destroy (void) +{ + + /* Pop the buffer stack, destroying each element. */ + while(YY_CURRENT_BUFFER){ + zconf_delete_buffer(YY_CURRENT_BUFFER ); + YY_CURRENT_BUFFER_LVALUE = NULL; + zconfpop_buffer_state(); + } + + /* Destroy the stack itself. */ + zconffree((yy_buffer_stack) ); + (yy_buffer_stack) = NULL; + + /* Reset the globals. This is important in a non-reentrant scanner so the next time + * zconflex() is called, initialization will occur. */ + yy_init_globals( ); + + return 0; +} + +/* + * Internal utility routines. + */ + +#ifndef yytext_ptr +static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) +{ + register int i; + for ( i = 0; i < n; ++i ) + s1[i] = s2[i]; +} +#endif + +#ifdef YY_NEED_STRLEN +static int yy_flex_strlen (yyconst char * s ) +{ + register int n; + for ( n = 0; s[n]; ++n ) + ; + + return n; +} +#endif + +void *zconfalloc (yy_size_t size ) +{ + return (void *) malloc( size ); +} + +void *zconfrealloc (void * ptr, yy_size_t size ) +{ + /* The cast to (char *) in the following accommodates both + * implementations that use char* generic pointers, and those + * that use void* generic pointers. It works with the latter + * because both ANSI C and C++ allow castless assignment from + * any pointer type to void*, and deal with argument conversions + * as though doing an assignment. + */ + return (void *) realloc( (char *) ptr, size ); +} + +void zconffree (void * ptr ) +{ + free( (char *) ptr ); /* see zconfrealloc() for (char *) cast */ +} + +#define YYTABLES_NAME "yytables" + +void zconf_starthelp(void) +{ + new_string(); + last_ts = first_ts = 0; + BEGIN(HELP); +} + +static void zconf_endhelp(void) +{ + zconflval.string = text; + BEGIN(INITIAL); +} + +/* + * Try to open specified file with following names: + * ./name + * $(srctree)/name + * The latter is used when srctree is separate from objtree + * when compiling the kernel. + * Return NULL if file is not found. + */ +FILE *zconf_fopen(const char *name) +{ + char *env, fullname[PATH_MAX+1]; + FILE *f; + + f = fopen(name, "r"); + if (!f && name != NULL && name[0] != '/') { + env = getenv(SRCTREE); + if (env) { + sprintf(fullname, "%s/%s", env, name); + f = fopen(fullname, "r"); + } + } + return f; +} + +void zconf_initscan(const char *name) +{ + zconfin = zconf_fopen(name); + if (!zconfin) { + printf("can't find file %s\n", name); + exit(1); + } + + current_buf = malloc(sizeof(*current_buf)); + memset(current_buf, 0, sizeof(*current_buf)); + + current_file = file_lookup(name); + current_file->lineno = 1; +} + +void zconf_nextfile(const char *name) +{ + struct file *iter; + struct file *file = file_lookup(name); + struct buffer *buf = malloc(sizeof(*buf)); + memset(buf, 0, sizeof(*buf)); + + current_buf->state = YY_CURRENT_BUFFER; + zconfin = zconf_fopen(file->name); + if (!zconfin) { + printf("%s:%d: can't open file \"%s\"\n", + zconf_curname(), zconf_lineno(), file->name); + exit(1); + } + zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE)); + buf->parent = current_buf; + current_buf = buf; + + for (iter = current_file->parent; iter; iter = iter->parent ) { + if (!strcmp(current_file->name,iter->name) ) { + printf("%s:%d: recursive inclusion detected. " + "Inclusion path:\n current file : '%s'\n", + zconf_curname(), zconf_lineno(), + zconf_curname()); + iter = current_file->parent; + while (iter && \ + strcmp(iter->name,current_file->name)) { + printf(" included from: '%s:%d'\n", + iter->name, iter->lineno-1); + iter = iter->parent; + } + if (iter) + printf(" included from: '%s:%d'\n", + iter->name, iter->lineno+1); + exit(1); + } + } + file->lineno = 1; + file->parent = current_file; + current_file = file; +} + +static void zconf_endfile(void) +{ + struct buffer *parent; + + current_file = current_file->parent; + + parent = current_buf->parent; + if (parent) { + fclose(zconfin); + zconf_delete_buffer(YY_CURRENT_BUFFER); + zconf_switch_to_buffer(parent->state); + } + free(current_buf); + current_buf = parent; +} + +int zconf_lineno(void) +{ + return current_pos.lineno; +} + +const char *zconf_curname(void) +{ + return current_pos.file ? current_pos.file->name : ""; +} + diff --git a/scripts/kconfig/zconf.tab.c_shipped b/scripts/kconfig/zconf.tab.c_shipped index 4c5495e..211e1a2 100644 --- a/scripts/kconfig/zconf.tab.c_shipped +++ b/scripts/kconfig/zconf.tab.c_shipped @@ -1,10 +1,9 @@ - -/* A Bison parser, made by GNU Bison 2.4.1. */ +/* A Bison parser, made by GNU Bison 2.4.3. */ /* Skeleton implementation for Bison's Yacc-like parsers in C - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2009, 2010 Free Software Foundation, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -46,7 +45,7 @@ #define YYBISON 1 /* Bison version. */ -#define YYBISON_VERSION "2.4.1" +#define YYBISON_VERSION "2.4.3" /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -102,22 +101,18 @@ extern int zconflex(void); static void zconfprint(const char *err, ...); static void zconf_error(const char *err, ...); static void zconferror(const char *err); -static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken); +static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken); struct symbol *symbol_hash[SYMBOL_HASHSIZE]; static struct menu *current_menu, *current_entry; -#define YYDEBUG 0 -#if YYDEBUG -#define YYERROR_VERBOSE -#endif /* Enabling traces. */ #ifndef YYDEBUG -# define YYDEBUG 0 +# define YYDEBUG 1 #endif /* Enabling verbose error messages. */ @@ -188,7 +183,7 @@ typedef union YYSTYPE struct symbol *symbol; struct expr *expr; struct menu *menu; - struct kconf_id *id; + const struct kconf_id *id; @@ -255,7 +250,7 @@ typedef short int yytype_int16; #define YYSIZE_MAXIMUM ((YYSIZE_T) -1) #ifndef YY_ -# if YYENABLE_NLS +# if defined YYENABLE_NLS && YYENABLE_NLS # if ENABLE_NLS # include /* INFRINGES ON USER NAME SPACE */ # define YY_(msgid) dgettext ("bison-runtime", msgid) @@ -535,18 +530,18 @@ static const yytype_int8 yyrhs[] = /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ static const yytype_uint16 yyrline[] = { - 0, 108, 108, 108, 110, 110, 112, 114, 115, 116, - 117, 118, 119, 123, 127, 127, 127, 127, 127, 127, - 127, 127, 131, 132, 133, 134, 135, 136, 140, 141, - 147, 155, 161, 169, 179, 181, 182, 183, 184, 185, - 186, 189, 197, 203, 213, 219, 225, 228, 230, 241, - 242, 247, 256, 261, 269, 272, 274, 275, 276, 277, - 278, 281, 287, 298, 304, 314, 316, 321, 329, 337, - 340, 342, 343, 344, 349, 356, 363, 368, 376, 379, - 381, 382, 383, 386, 394, 401, 408, 414, 421, 423, - 424, 425, 428, 436, 438, 439, 442, 449, 451, 456, - 457, 460, 461, 462, 466, 467, 470, 471, 474, 475, - 476, 477, 478, 479, 480, 483, 484, 487, 488 + 0, 104, 104, 104, 106, 106, 108, 110, 111, 112, + 113, 114, 115, 119, 123, 123, 123, 123, 123, 123, + 123, 123, 127, 128, 129, 130, 131, 132, 136, 137, + 143, 151, 157, 165, 175, 177, 178, 179, 180, 181, + 182, 185, 193, 199, 209, 215, 221, 224, 226, 237, + 238, 243, 252, 257, 265, 268, 270, 271, 272, 273, + 274, 277, 283, 294, 300, 310, 312, 317, 325, 333, + 336, 338, 339, 340, 345, 352, 359, 364, 372, 375, + 377, 378, 379, 382, 390, 397, 404, 410, 417, 419, + 420, 421, 424, 432, 434, 435, 438, 445, 447, 452, + 453, 456, 457, 458, 462, 463, 466, 467, 470, 471, + 472, 473, 474, 475, 476, 479, 480, 483, 484 }; #endif @@ -806,9 +801,18 @@ static const yytype_uint8 yystos[] = /* Like YYERROR except do call yyerror. This remains here temporarily to ease the transition to the new meaning of YYERROR, for GCC. - Once GCC version 2 has supplanted version 1, this can go. */ + Once GCC version 2 has supplanted version 1, this can go. However, + YYFAIL appears to be in use. Nevertheless, it is formally deprecated + in Bison 2.4.2's NEWS entry, where a plan to phase it out is + discussed. */ #define YYFAIL goto yyerrlab +#if defined YYFAIL + /* This is here to suppress warnings from the GCC cpp's + -Wunused-macros. Normally we don't worry about that warning, but + some users do, and we want to make it easy for users to remove + YYFAIL uses, which will produce warnings from Bison 2.5. */ +#endif #define YYRECOVERING() (!!yyerrstatus) @@ -865,7 +869,7 @@ while (YYID (0)) we won't break user code: when these are the locations we know. */ #ifndef YY_LOCATION_PRINT -# if YYLTYPE_IS_TRIVIAL +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL # define YY_LOCATION_PRINT(File, Loc) \ fprintf (File, "%d.%d-%d.%d", \ (Loc).first_line, (Loc).first_column, \ @@ -1753,7 +1757,7 @@ yyreduce: case 48: { - struct kconf_id *id = kconf_id_lookup((yyvsp[(2) - (3)].string), strlen((yyvsp[(2) - (3)].string))); + const struct kconf_id *id = kconf_id_lookup((yyvsp[(2) - (3)].string), strlen((yyvsp[(2) - (3)].string))); if (id && id->flags & TF_OPTION) menu_add_option(id->token, (yyvsp[(3) - (3)].string)); else @@ -2258,10 +2262,8 @@ void conf_parse(const char *name) modules_sym->flags |= SYMBOL_AUTO; rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL); -#if YYDEBUG if (getenv("ZCONF_DEBUG")) zconfdebug = 1; -#endif zconfparse(); if (zconfnerrs) exit(1); @@ -2300,7 +2302,7 @@ static const char *zconf_tokenname(int token) return ""; } -static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken) +static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken) { if (id->token != endtoken) { zconf_error("unexpected '%s' within %s block", @@ -2345,9 +2347,7 @@ static void zconf_error(const char *err, ...) static void zconferror(const char *err) { -#if YYDEBUG fprintf(stderr, "%s:%d: %s\n", zconf_curname(), zconf_lineno() + 1, err); -#endif } static void print_quoted_string(FILE *out, const char *str) @@ -2496,7 +2496,7 @@ void zconfdump(FILE *out) } } -#include "lex.zconf.c" +#include "zconf.lex.c" #include "util.c" #include "confdata.c" #include "expr.c" -- cgit v0.10.2 From 95abef888a3173539c0f12d0c1055e6eb6ffbc89 Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 03:17:20 -0400 Subject: dtc: migrate parser to implicit rules Cc: David Gibson Signed-off-by: Arnaud Lacombe diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile index 04a31c1..6d1c6bb 100644 --- a/scripts/dtc/Makefile +++ b/scripts/dtc/Makefile @@ -25,31 +25,5 @@ HOSTCFLAGS_dtc-lexer.lex.o := $(HOSTCFLAGS_DTC) HOSTCFLAGS_dtc-parser.tab.o := $(HOSTCFLAGS_DTC) # dependencies on generated files need to be listed explicitly -$(obj)/dtc-parser.tab.o: $(obj)/dtc-parser.tab.c $(obj)/dtc-parser.tab.h -$(obj)/dtc-lexer.lex.o: $(obj)/dtc-lexer.lex.c $(obj)/dtc-parser.tab.h +$(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h -targets += dtc-parser.tab.c dtc-lexer.lex.c - -clean-files += dtc-parser.tab.h - -# GENERATE_PARSER := 1 # Uncomment to rebuild flex/bison output - -ifdef GENERATE_PARSER - -BISON = bison -FLEX = flex - -quiet_cmd_bison = BISON $@ - cmd_bison = $(BISON) -o$@ -d $<; cp $@ $@_shipped -quiet_cmd_flex = FLEX $@ - cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped - -$(obj)/dtc-parser.tab.c: $(src)/dtc-parser.y FORCE - $(call if_changed,bison) - -$(obj)/dtc-parser.tab.h: $(obj)/dtc-parser.tab.c - -$(obj)/dtc-lexer.lex.c: $(src)/dtc-lexer.l FORCE - $(call if_changed,flex) - -endif -- cgit v0.10.2 From edfc86aadad371b76d95b11d0bc8eb36c2376d1e Mon Sep 17 00:00:00 2001 From: Arnaud Lacombe Date: Mon, 23 May 2011 03:01:31 -0400 Subject: dtc: regen parser Cc: David Gibson Signed-off-by: Arnaud Lacombe diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped index 50c4420..8bbe128 100644 --- a/scripts/dtc/dtc-lexer.lex.c_shipped +++ b/scripts/dtc/dtc-lexer.lex.c_shipped @@ -1,6 +1,5 @@ -#line 2 "dtc-lexer.lex.c" -#line 4 "dtc-lexer.lex.c" +#line 3 "scripts/dtc/dtc-lexer.lex.c_shipped" #define YY_INT_ALIGNED short int @@ -54,6 +53,7 @@ typedef int flex_int32_t; typedef unsigned char flex_uint8_t; typedef unsigned short int flex_uint16_t; typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ /* Limits of integral types. */ #ifndef INT8_MIN @@ -84,8 +84,6 @@ typedef unsigned int flex_uint32_t; #define UINT32_MAX (4294967295U) #endif -#endif /* ! C99 */ - #endif /* ! FLEXINT_H */ #ifdef __cplusplus @@ -142,15 +140,7 @@ typedef unsigned int flex_uint32_t; /* Size of default input buffer. */ #ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else #define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ #endif /* The state buf must be large enough to hold one state per character in the main buffer. @@ -550,7 +540,6 @@ int yy_flex_debug = 0; #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "dtc-lexer.l" /* * (C) Copyright David Gibson , IBM Corporation. 2005. * @@ -572,10 +561,6 @@ char *yytext; */ #define YY_NO_INPUT 1 - - - -#line 37 "dtc-lexer.l" #include "dtc.h" #include "srcpos.h" #include "dtc-parser.tab.h" @@ -603,7 +588,6 @@ static int dts_version = 1; static void push_input_file(const char *filename); static int pop_input_file(void); -#line 607 "dtc-lexer.lex.c" #define INITIAL 0 #define INCLUDE 1 @@ -686,12 +670,7 @@ static int input (void ); /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else #define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ #endif /* Copy whatever the last rule matched to the standard output. */ @@ -710,7 +689,7 @@ static int input (void ); if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ - size_t n; \ + unsigned n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ @@ -792,10 +771,6 @@ YY_DECL register char *yy_cp, *yy_bp; register int yy_act; -#line 66 "dtc-lexer.l" - -#line 798 "dtc-lexer.lex.c" - if ( !(yy_init) ) { (yy_init) = 1; @@ -876,7 +851,6 @@ do_action: /* This label is used only to access EOF actions. */ case 1: /* rule 1 can match eol */ YY_RULE_SETUP -#line 67 "dtc-lexer.l" { char *name = strchr(yytext, '\"') + 1; yytext[yyleng-1] = '\0'; @@ -888,7 +862,6 @@ case YY_STATE_EOF(INCLUDE): case YY_STATE_EOF(BYTESTRING): case YY_STATE_EOF(PROPNODENAME): case YY_STATE_EOF(V1): -#line 73 "dtc-lexer.l" { if (!pop_input_file()) { yyterminate(); @@ -898,7 +871,6 @@ case YY_STATE_EOF(V1): case 2: /* rule 2 can match eol */ YY_RULE_SETUP -#line 79 "dtc-lexer.l" { DPRINT("String: %s\n", yytext); yylval.data = data_copy_escape_string(yytext+1, @@ -908,7 +880,6 @@ YY_RULE_SETUP YY_BREAK case 3: YY_RULE_SETUP -#line 86 "dtc-lexer.l" { DPRINT("Keyword: /dts-v1/\n"); dts_version = 1; @@ -918,7 +889,6 @@ YY_RULE_SETUP YY_BREAK case 4: YY_RULE_SETUP -#line 93 "dtc-lexer.l" { DPRINT("Keyword: /memreserve/\n"); BEGIN_DEFAULT(); @@ -927,7 +897,6 @@ YY_RULE_SETUP YY_BREAK case 5: YY_RULE_SETUP -#line 99 "dtc-lexer.l" { DPRINT("Label: %s\n", yytext); yylval.labelref = xstrdup(yytext); @@ -937,7 +906,6 @@ YY_RULE_SETUP YY_BREAK case 6: YY_RULE_SETUP -#line 106 "dtc-lexer.l" { yylval.literal = xstrdup(yytext); DPRINT("Literal: '%s'\n", yylval.literal); @@ -946,7 +914,6 @@ YY_RULE_SETUP YY_BREAK case 7: YY_RULE_SETUP -#line 112 "dtc-lexer.l" { /* label reference */ DPRINT("Ref: %s\n", yytext+1); yylval.labelref = xstrdup(yytext+1); @@ -955,7 +922,6 @@ YY_RULE_SETUP YY_BREAK case 8: YY_RULE_SETUP -#line 118 "dtc-lexer.l" { /* new-style path reference */ yytext[yyleng-1] = '\0'; DPRINT("Ref: %s\n", yytext+2); @@ -965,7 +931,6 @@ YY_RULE_SETUP YY_BREAK case 9: YY_RULE_SETUP -#line 125 "dtc-lexer.l" { yylval.byte = strtol(yytext, NULL, 16); DPRINT("Byte: %02x\n", (int)yylval.byte); @@ -974,7 +939,6 @@ YY_RULE_SETUP YY_BREAK case 10: YY_RULE_SETUP -#line 131 "dtc-lexer.l" { DPRINT("/BYTESTRING\n"); BEGIN_DEFAULT(); @@ -983,7 +947,6 @@ YY_RULE_SETUP YY_BREAK case 11: YY_RULE_SETUP -#line 137 "dtc-lexer.l" { DPRINT("PropNodeName: %s\n", yytext); yylval.propnodename = xstrdup(yytext); @@ -993,7 +956,6 @@ YY_RULE_SETUP YY_BREAK case 12: YY_RULE_SETUP -#line 144 "dtc-lexer.l" { DPRINT("Binary Include\n"); return DT_INCBIN; @@ -1002,24 +964,20 @@ YY_RULE_SETUP case 13: /* rule 13 can match eol */ YY_RULE_SETUP -#line 149 "dtc-lexer.l" /* eat whitespace */ YY_BREAK case 14: /* rule 14 can match eol */ YY_RULE_SETUP -#line 150 "dtc-lexer.l" /* eat C-style comments */ YY_BREAK case 15: /* rule 15 can match eol */ YY_RULE_SETUP -#line 151 "dtc-lexer.l" /* eat C++-style comments */ YY_BREAK case 16: YY_RULE_SETUP -#line 153 "dtc-lexer.l" { DPRINT("Char: %c (\\x%02x)\n", yytext[0], (unsigned)yytext[0]); @@ -1037,10 +995,8 @@ YY_RULE_SETUP YY_BREAK case 17: YY_RULE_SETUP -#line 168 "dtc-lexer.l" ECHO; YY_BREAK -#line 1044 "dtc-lexer.lex.c" case YY_END_OF_BUFFER: { @@ -1756,8 +1712,8 @@ YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) /** Setup the input buffer state to scan the given bytes. The next call to yylex() will * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. * * @return the newly allocated buffer state object. */ @@ -1996,10 +1952,6 @@ void yyfree (void * ptr ) #define YYTABLES_NAME "yytables" -#line 168 "dtc-lexer.l" - - - static void push_input_file(const char *filename) { assert(filename); @@ -2011,7 +1963,6 @@ static void push_input_file(const char *filename) yypush_buffer_state(yy_create_buffer(yyin,YY_BUF_SIZE)); } - static int pop_input_file(void) { if (srcfile_pop() == 0) diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped index 9be2eea..b05921e 100644 --- a/scripts/dtc/dtc-parser.tab.c_shipped +++ b/scripts/dtc/dtc-parser.tab.c_shipped @@ -1,10 +1,9 @@ - -/* A Bison parser, made by GNU Bison 2.4.1. */ +/* A Bison parser, made by GNU Bison 2.4.3. */ /* Skeleton implementation for Bison's Yacc-like parsers in C - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2009, 2010 Free Software Foundation, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -46,7 +45,7 @@ #define YYBISON 1 /* Bison version. */ -#define YYBISON_VERSION "2.4.1" +#define YYBISON_VERSION "2.4.3" /* Skeleton name. */ #define YYSKELETON_NAME "yacc.c" @@ -67,8 +66,6 @@ /* Copy the first part of user declarations. */ -/* Line 189 of yacc.c */ -#line 21 "dtc-parser.y" #include @@ -87,12 +84,10 @@ extern int treesource_error; static unsigned long long eval_literal(const char *s, int base, int bits); -/* Line 189 of yacc.c */ -#line 92 "dtc-parser.tab.c" /* Enabling traces. */ #ifndef YYDEBUG -# define YYDEBUG 0 +# define YYDEBUG 1 #endif /* Enabling verbose error messages. */ @@ -134,8 +129,6 @@ static unsigned long long eval_literal(const char *s, int base, int bits); typedef union YYSTYPE { -/* Line 214 of yacc.c */ -#line 39 "dtc-parser.y" char *propnodename; char *literal; @@ -154,8 +147,6 @@ typedef union YYSTYPE -/* Line 214 of yacc.c */ -#line 159 "dtc-parser.tab.c" } YYSTYPE; # define YYSTYPE_IS_TRIVIAL 1 # define yystype YYSTYPE /* obsolescent; will be withdrawn */ @@ -166,8 +157,6 @@ typedef union YYSTYPE /* Copy the second part of user declarations. */ -/* Line 264 of yacc.c */ -#line 171 "dtc-parser.tab.c" #ifdef short # undef short @@ -217,7 +206,7 @@ typedef short int yytype_int16; #define YYSIZE_MAXIMUM ((YYSIZE_T) -1) #ifndef YY_ -# if YYENABLE_NLS +# if defined YYENABLE_NLS && YYENABLE_NLS # if ENABLE_NLS # include /* INFRINGES ON USER NAME SPACE */ # define YY_(msgid) dgettext ("bison-runtime", msgid) @@ -607,9 +596,18 @@ static const yytype_uint8 yystos[] = /* Like YYERROR except do call yyerror. This remains here temporarily to ease the transition to the new meaning of YYERROR, for GCC. - Once GCC version 2 has supplanted version 1, this can go. */ + Once GCC version 2 has supplanted version 1, this can go. However, + YYFAIL appears to be in use. Nevertheless, it is formally deprecated + in Bison 2.4.2's NEWS entry, where a plan to phase it out is + discussed. */ #define YYFAIL goto yyerrlab +#if defined YYFAIL + /* This is here to suppress warnings from the GCC cpp's + -Wunused-macros. Normally we don't worry about that warning, but + some users do, and we want to make it easy for users to remove + YYFAIL uses, which will produce warnings from Bison 2.5. */ +#endif #define YYRECOVERING() (!!yyerrstatus) @@ -666,7 +664,7 @@ while (YYID (0)) we won't break user code: when these are the locations we know. */ #ifndef YY_LOCATION_PRINT -# if YYLTYPE_IS_TRIVIAL +# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL # define YY_LOCATION_PRINT(File, Loc) \ fprintf (File, "%d.%d-%d.%d", \ (Loc).first_line, (Loc).first_column, \ @@ -1405,8 +1403,6 @@ yyreduce: { case 2: -/* Line 1455 of yacc.c */ -#line 87 "dtc-parser.y" { the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node), guess_boot_cpuid((yyvsp[(4) - (4)].node))); @@ -1415,8 +1411,6 @@ yyreduce: case 3: -/* Line 1455 of yacc.c */ -#line 95 "dtc-parser.y" { (yyval.re) = NULL; ;} @@ -1424,8 +1418,6 @@ yyreduce: case 4: -/* Line 1455 of yacc.c */ -#line 99 "dtc-parser.y" { (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re)); ;} @@ -1433,8 +1425,6 @@ yyreduce: case 5: -/* Line 1455 of yacc.c */ -#line 106 "dtc-parser.y" { (yyval.re) = build_reserve_entry((yyvsp[(2) - (4)].addr), (yyvsp[(3) - (4)].addr)); ;} @@ -1442,8 +1432,6 @@ yyreduce: case 6: -/* Line 1455 of yacc.c */ -#line 110 "dtc-parser.y" { add_label(&(yyvsp[(2) - (2)].re)->labels, (yyvsp[(1) - (2)].labelref)); (yyval.re) = (yyvsp[(2) - (2)].re); @@ -1452,8 +1440,6 @@ yyreduce: case 7: -/* Line 1455 of yacc.c */ -#line 118 "dtc-parser.y" { (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64); ;} @@ -1461,8 +1447,6 @@ yyreduce: case 8: -/* Line 1455 of yacc.c */ -#line 125 "dtc-parser.y" { (yyval.node) = name_node((yyvsp[(2) - (2)].node), ""); ;} @@ -1470,8 +1454,6 @@ yyreduce: case 9: -/* Line 1455 of yacc.c */ -#line 129 "dtc-parser.y" { (yyval.node) = merge_nodes((yyvsp[(1) - (3)].node), (yyvsp[(3) - (3)].node)); ;} @@ -1479,8 +1461,6 @@ yyreduce: case 10: -/* Line 1455 of yacc.c */ -#line 133 "dtc-parser.y" { struct node *target = get_node_by_ref((yyvsp[(1) - (3)].node), (yyvsp[(2) - (3)].labelref)); @@ -1494,8 +1474,6 @@ yyreduce: case 11: -/* Line 1455 of yacc.c */ -#line 146 "dtc-parser.y" { (yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist)); ;} @@ -1503,8 +1481,6 @@ yyreduce: case 12: -/* Line 1455 of yacc.c */ -#line 153 "dtc-parser.y" { (yyval.proplist) = NULL; ;} @@ -1512,8 +1488,6 @@ yyreduce: case 13: -/* Line 1455 of yacc.c */ -#line 157 "dtc-parser.y" { (yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist)); ;} @@ -1521,8 +1495,6 @@ yyreduce: case 14: -/* Line 1455 of yacc.c */ -#line 164 "dtc-parser.y" { (yyval.prop) = build_property((yyvsp[(1) - (4)].propnodename), (yyvsp[(3) - (4)].data)); ;} @@ -1530,8 +1502,6 @@ yyreduce: case 15: -/* Line 1455 of yacc.c */ -#line 168 "dtc-parser.y" { (yyval.prop) = build_property((yyvsp[(1) - (2)].propnodename), empty_data); ;} @@ -1539,8 +1509,6 @@ yyreduce: case 16: -/* Line 1455 of yacc.c */ -#line 172 "dtc-parser.y" { add_label(&(yyvsp[(2) - (2)].prop)->labels, (yyvsp[(1) - (2)].labelref)); (yyval.prop) = (yyvsp[(2) - (2)].prop); @@ -1549,8 +1517,6 @@ yyreduce: case 17: -/* Line 1455 of yacc.c */ -#line 180 "dtc-parser.y" { (yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data)); ;} @@ -1558,8 +1524,6 @@ yyreduce: case 18: -/* Line 1455 of yacc.c */ -#line 184 "dtc-parser.y" { (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); ;} @@ -1567,8 +1531,6 @@ yyreduce: case 19: -/* Line 1455 of yacc.c */ -#line 188 "dtc-parser.y" { (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); ;} @@ -1576,8 +1538,6 @@ yyreduce: case 20: -/* Line 1455 of yacc.c */ -#line 192 "dtc-parser.y" { (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref)); ;} @@ -1585,8 +1545,6 @@ yyreduce: case 21: -/* Line 1455 of yacc.c */ -#line 196 "dtc-parser.y" { FILE *f = srcfile_relative_open((yyvsp[(4) - (9)].data).val, NULL); struct data d; @@ -1607,8 +1565,6 @@ yyreduce: case 22: -/* Line 1455 of yacc.c */ -#line 213 "dtc-parser.y" { FILE *f = srcfile_relative_open((yyvsp[(4) - (5)].data).val, NULL); struct data d = empty_data; @@ -1622,8 +1578,6 @@ yyreduce: case 23: -/* Line 1455 of yacc.c */ -#line 223 "dtc-parser.y" { (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); ;} @@ -1631,8 +1585,6 @@ yyreduce: case 24: -/* Line 1455 of yacc.c */ -#line 230 "dtc-parser.y" { (yyval.data) = empty_data; ;} @@ -1640,8 +1592,6 @@ yyreduce: case 25: -/* Line 1455 of yacc.c */ -#line 234 "dtc-parser.y" { (yyval.data) = (yyvsp[(1) - (2)].data); ;} @@ -1649,8 +1599,6 @@ yyreduce: case 26: -/* Line 1455 of yacc.c */ -#line 238 "dtc-parser.y" { (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); ;} @@ -1658,8 +1606,6 @@ yyreduce: case 27: -/* Line 1455 of yacc.c */ -#line 245 "dtc-parser.y" { (yyval.data) = empty_data; ;} @@ -1667,8 +1613,6 @@ yyreduce: case 28: -/* Line 1455 of yacc.c */ -#line 249 "dtc-parser.y" { (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell)); ;} @@ -1676,8 +1620,6 @@ yyreduce: case 29: -/* Line 1455 of yacc.c */ -#line 253 "dtc-parser.y" { (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE, (yyvsp[(2) - (2)].labelref)), -1); @@ -1686,8 +1628,6 @@ yyreduce: case 30: -/* Line 1455 of yacc.c */ -#line 258 "dtc-parser.y" { (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); ;} @@ -1695,8 +1635,6 @@ yyreduce: case 31: -/* Line 1455 of yacc.c */ -#line 265 "dtc-parser.y" { (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32); ;} @@ -1704,8 +1642,6 @@ yyreduce: case 32: -/* Line 1455 of yacc.c */ -#line 272 "dtc-parser.y" { (yyval.data) = empty_data; ;} @@ -1713,8 +1649,6 @@ yyreduce: case 33: -/* Line 1455 of yacc.c */ -#line 276 "dtc-parser.y" { (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte)); ;} @@ -1722,8 +1656,6 @@ yyreduce: case 34: -/* Line 1455 of yacc.c */ -#line 280 "dtc-parser.y" { (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); ;} @@ -1731,8 +1663,6 @@ yyreduce: case 35: -/* Line 1455 of yacc.c */ -#line 287 "dtc-parser.y" { (yyval.nodelist) = NULL; ;} @@ -1740,8 +1670,6 @@ yyreduce: case 36: -/* Line 1455 of yacc.c */ -#line 291 "dtc-parser.y" { (yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist)); ;} @@ -1749,8 +1677,6 @@ yyreduce: case 37: -/* Line 1455 of yacc.c */ -#line 295 "dtc-parser.y" { print_error("syntax error: properties must precede subnodes"); YYERROR; @@ -1759,8 +1685,6 @@ yyreduce: case 38: -/* Line 1455 of yacc.c */ -#line 303 "dtc-parser.y" { (yyval.node) = name_node((yyvsp[(2) - (2)].node), (yyvsp[(1) - (2)].propnodename)); ;} @@ -1768,8 +1692,6 @@ yyreduce: case 39: -/* Line 1455 of yacc.c */ -#line 307 "dtc-parser.y" { add_label(&(yyvsp[(2) - (2)].node)->labels, (yyvsp[(1) - (2)].labelref)); (yyval.node) = (yyvsp[(2) - (2)].node); @@ -1778,8 +1700,6 @@ yyreduce: -/* Line 1455 of yacc.c */ -#line 1783 "dtc-parser.tab.c" default: break; } YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); @@ -1990,8 +1910,6 @@ yyreturn: -/* Line 1675 of yacc.c */ -#line 313 "dtc-parser.y" void print_error(char const *fmt, ...) diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped index 95c9547..4ee682b 100644 --- a/scripts/dtc/dtc-parser.tab.h_shipped +++ b/scripts/dtc/dtc-parser.tab.h_shipped @@ -1,10 +1,9 @@ - -/* A Bison parser, made by GNU Bison 2.4.1. */ +/* A Bison parser, made by GNU Bison 2.4.3. */ /* Skeleton interface for Bison's Yacc-like parsers in C - Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2009, 2010 Free Software Foundation, Inc. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -58,8 +57,6 @@ typedef union YYSTYPE { -/* Line 1676 of yacc.c */ -#line 39 "dtc-parser.y" char *propnodename; char *literal; @@ -78,8 +75,6 @@ typedef union YYSTYPE -/* Line 1676 of yacc.c */ -#line 83 "dtc-parser.tab.h" } YYSTYPE; # define YYSTYPE_IS_TRIVIAL 1 # define yystype YYSTYPE /* obsolescent; will be withdrawn */ -- cgit v0.10.2 From a8198eea156df47e0e843ac5c7d4c8774e121c42 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 13 Apr 2011 22:04:09 +0100 Subject: drm/i915: Introduce i915_gem_object_finish_gpu() ... reincarnated from i915_gem_object_flush_gpu(). The semantic difference is that after calling finish_gpu() the object no longer resides in any GPU domain, and so will cause the GPU caches to be invalidated if it is ever used again. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f63ee16..4d1a8ae 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1190,7 +1190,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj); int __must_check i915_gem_object_set_domain(struct drm_i915_gem_object *obj, uint32_t read_domains, uint32_t write_domain); -int __must_check i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj); +int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj); int __must_check i915_gem_init_ringbuffer(struct drm_device *dev); void i915_gem_cleanup_ringbuffer(struct drm_device *dev); void i915_gem_do_init(struct drm_device *dev, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 12d3257..6291dcd 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2165,23 +2165,29 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj) return -EINVAL; } + ret = i915_gem_object_finish_gpu(obj); + if (ret == -ERESTARTSYS) + return ret; + /* Continue on if we fail due to EIO, the GPU is hung so we + * should be safe and we need to cleanup or else we might + * cause memory corruption through use-after-free. + */ + /* blow away mappings if mapped through GTT */ i915_gem_release_mmap(obj); /* Move the object to the CPU domain to ensure that * any possible CPU writes while it's not in the GTT - * are flushed when we go to remap it. This will - * also ensure that all pending GPU writes are finished - * before we unbind. + * are flushed when we go to remap it. */ - ret = i915_gem_object_set_to_cpu_domain(obj, 1); + if (ret == 0) + ret = i915_gem_object_set_to_cpu_domain(obj, 1); if (ret == -ERESTARTSYS) return ret; - /* Continue on if we fail due to EIO, the GPU is hung so we - * should be safe and we need to cleanup or else we might - * cause memory corruption through use-after-free. - */ if (ret) { + /* In the event of a disaster, abandon all caches and + * hope for the best. + */ i915_gem_clflush_object(obj); obj->base.read_domains = obj->base.write_domain = I915_GEM_DOMAIN_CPU; } @@ -3045,11 +3051,11 @@ i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, } int -i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj) +i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj) { int ret; - if (!obj->active) + if ((obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0) return 0; if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) { @@ -3058,6 +3064,9 @@ i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj) return ret; } + /* Ensure that we invalidate the GPU's caches and TLBs. */ + obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS; + return i915_gem_object_wait_rendering(obj); } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index aa43e7b..e32fb89 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1971,7 +1971,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, * This should only fail upon a hung GPU, in which case we * can safely continue. */ - ret = i915_gem_object_flush_gpu(obj); + ret = i915_gem_object_finish_gpu(obj); (void) ret; } -- cgit v0.10.2 From 408093d2a1724ea4c8518bd2bfee166132a6cbfa Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 9 Jun 2011 12:13:08 -0700 Subject: Staging: comedi: drivers.c: fix PAGE_KERNEL_NOCACHE issue Not all arches have PAGE_KERNEL_NOCACHE, so use the "normal" PAGE_KERNEL on those that do not have it. Reported-by: Stephen Rothwell Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index 6d60e91..db1fd63 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c @@ -502,7 +502,11 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s, } if (i == n_pages) { async->prealloc_buf = +#ifdef PAGE_KERNEL_NOCACHE vmap(pages, n_pages, VM_MAP, PAGE_KERNEL_NOCACHE); +#else + vmap(pages, n_pages, VM_MAP, PAGE_KERNEL); +#endif } vfree(pages); -- cgit v0.10.2 From 845d131e2b363717d8ac8db2c6b4417de8cf10b5 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 9 Jun 2011 12:20:28 -0700 Subject: Staging: comedi: add #include to a bunch of drivers On some arches the function virt_to_bus() wasn't being pulled in due to include chains being different. So, as we are explicitly calling this function, explicitly include the proper header file so all will build properly. Reported-by: Stephen Rothwell Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c index 6cf19ed..6fb7594 100644 --- a/drivers/staging/comedi/drivers/addi-data/addi_common.c +++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c @@ -58,8 +58,8 @@ You should also find the complete GPL in the COPYING file accompanying this sour #include #include #include +#include #include "../../comedidev.h" -#include #if defined(CONFIG_APCI_1710) || defined(CONFIG_APCI_3200) || defined(CONFIG_APCI_3300) #include #endif diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c index 08b71d9..f17654e 100644 --- a/drivers/staging/comedi/drivers/adl_pci9118.c +++ b/drivers/staging/comedi/drivers/adl_pci9118.c @@ -67,6 +67,7 @@ Configuration options: #include #include #include +#include #include "amcc_s5933.h" #include "8253.h" diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c index 60c2b12..9fc28bf 100644 --- a/drivers/staging/comedi/drivers/das1800.c +++ b/drivers/staging/comedi/drivers/das1800.c @@ -102,6 +102,7 @@ TODO: #include #include +#include #include "../comedidev.h" #include diff --git a/drivers/staging/comedi/drivers/dt282x.c b/drivers/staging/comedi/drivers/dt282x.c index 8cea9dc..95ebc26 100644 --- a/drivers/staging/comedi/drivers/dt282x.c +++ b/drivers/staging/comedi/drivers/dt282x.c @@ -61,6 +61,7 @@ Notes: #include #include #include +#include #include #include "comedi_fc.h" diff --git a/drivers/staging/comedi/drivers/ni_at_a2150.c b/drivers/staging/comedi/drivers/ni_at_a2150.c index c192b71..32e675e 100644 --- a/drivers/staging/comedi/drivers/ni_at_a2150.c +++ b/drivers/staging/comedi/drivers/ni_at_a2150.c @@ -69,6 +69,7 @@ TRIG_WAKE_EOS #include "../comedidev.h" #include +#include #include #include "8253.h" diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c index ab8f370..f82e732 100644 --- a/drivers/staging/comedi/drivers/ni_labpc.c +++ b/drivers/staging/comedi/drivers/ni_labpc.c @@ -78,6 +78,7 @@ NI manuals: #include #include +#include #include "../comedidev.h" #include diff --git a/drivers/staging/comedi/drivers/pcl812.c b/drivers/staging/comedi/drivers/pcl812.c index 09ff472..6fc7464 100644 --- a/drivers/staging/comedi/drivers/pcl812.c +++ b/drivers/staging/comedi/drivers/pcl812.c @@ -114,6 +114,7 @@ #include #include +#include #include #include "8253.h" diff --git a/drivers/staging/comedi/drivers/pcl816.c b/drivers/staging/comedi/drivers/pcl816.c index 8f3fc6e..0b9bee3 100644 --- a/drivers/staging/comedi/drivers/pcl816.c +++ b/drivers/staging/comedi/drivers/pcl816.c @@ -38,6 +38,7 @@ Configuration Options: #include #include #include +#include #include #include "8253.h" diff --git a/drivers/staging/comedi/drivers/pcl818.c b/drivers/staging/comedi/drivers/pcl818.c index 8933e50..b45a9bd 100644 --- a/drivers/staging/comedi/drivers/pcl818.c +++ b/drivers/staging/comedi/drivers/pcl818.c @@ -104,6 +104,7 @@ A word or two about DMA. Driver support DMA operations at two ways: #include #include #include +#include #include #include "8253.h" -- cgit v0.10.2 From c773298788598a26e325bc2639877c76818943e3 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 9 Jun 2011 13:16:13 -0700 Subject: Staging: brcm80211: disable drivers for PPC platforms Right now, bad things happen if you try to build these drivers for the PPC platform as it seems that the code only has been tested and built on the MIPS big endian platform. So disable it on the PPC32 and PPC64 platforms for now, hopefully this will be resolved in the future as I'm sure someone will want to use these chips with that platform someday. Reported-by: Stephen Rothwell Cc: Henry Ptasinski Cc: Brett Rudley Cc: Roland Vossen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/Kconfig b/drivers/staging/brcm80211/Kconfig index f4cf9b2..2d1a29b 100644 --- a/drivers/staging/brcm80211/Kconfig +++ b/drivers/staging/brcm80211/Kconfig @@ -7,6 +7,7 @@ config BRCMSMAC default n depends on PCI depends on WLAN && MAC80211 + depends on !PPC64 && !PPC32 select BRCMUTIL select FW_LOADER select CRC_CCITT @@ -20,6 +21,7 @@ config BRCMFMAC default n depends on MMC depends on WLAN && CFG80211 + depends on !PPC64 && !PPC32 select BRCMUTIL select FW_LOADER select WIRELESS_EXT -- cgit v0.10.2 From b5ffc9bc38a4766d586c3aca6830ed2bd6952e5b Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 13 Apr 2011 22:06:03 +0100 Subject: drm/i915: Introduce i915_gem_object_finish_gtt() Like its siblings finish_gpu(), this function clears the object from the GTT domain forcing it to be trigger a domain invalidation should we ever need to use via the GTT again. Note that the most important side-effect of finishing the GTT domain (aside from clearing the tracking read/write domains) is that it imposes an memory barrier so that all accesses are complete before it returns, which is important if you intend to be modifying translation tables shortly afterwards. The second most important side-effect is that it tears down the GTT mappings forcing a page-fault and invalidation on next user access to the object. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6291dcd..e78a7ef 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2149,6 +2149,30 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj) return 0; } +static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj) +{ + u32 old_write_domain, old_read_domains; + + if ((obj->base.read_domains & I915_GEM_DOMAIN_GTT) == 0) + return; + + /* Act a barrier for all accesses through the GTT */ + mb(); + + /* Force a pagefault for domain tracking on next user access */ + i915_gem_release_mmap(obj); + + old_read_domains = obj->base.read_domains; + old_write_domain = obj->base.write_domain; + + obj->base.read_domains &= ~I915_GEM_DOMAIN_GTT; + obj->base.write_domain &= ~I915_GEM_DOMAIN_GTT; + + trace_i915_gem_object_change_domain(obj, + old_read_domains, + old_write_domain); +} + /** * Unbinds an object from the GTT aperture. */ @@ -2173,8 +2197,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj) * cause memory corruption through use-after-free. */ - /* blow away mappings if mapped through GTT */ - i915_gem_release_mmap(obj); + i915_gem_object_finish_gtt(obj); /* Move the object to the CPU domain to ensure that * any possible CPU writes while it's not in the GTT -- cgit v0.10.2 From d5bd144959e639443f387c34989cec7c9efff091 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 14 Apr 2011 06:48:26 +0100 Subject: drm/i915/gtt: Split out i915_gem_gtt_rebind_object() ... in preparation for changing the cache level (and thus the flags upon the PTEs) dynamically. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index e46b645..837033c 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -29,6 +29,9 @@ #include "i915_trace.h" #include "intel_drv.h" +static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level); + /* XXX kill agp_type! */ static unsigned int cache_level_to_agp_type(struct drm_device *dev, enum i915_cache_level cache_level) @@ -59,24 +62,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE); list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) { - unsigned int agp_type = - cache_level_to_agp_type(dev, obj->cache_level); - i915_gem_clflush_object(obj); - - if (dev_priv->mm.gtt->needs_dmar) { - BUG_ON(!obj->sg_list); - - intel_gtt_insert_sg_entries(obj->sg_list, - obj->num_sg, - obj->gtt_space->start >> PAGE_SHIFT, - agp_type); - } else - intel_gtt_insert_pages(obj->gtt_space->start - >> PAGE_SHIFT, - obj->base.size >> PAGE_SHIFT, - obj->pages, - agp_type); + i915_gem_gtt_rebind_object(obj, obj->cache_level); } intel_gtt_chipset_flush(); @@ -110,6 +97,27 @@ int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj) return 0; } +static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level) +{ + struct drm_device *dev = obj->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + unsigned int agp_type = cache_level_to_agp_type(dev, cache_level); + + if (dev_priv->mm.gtt->needs_dmar) { + BUG_ON(!obj->sg_list); + + intel_gtt_insert_sg_entries(obj->sg_list, + obj->num_sg, + obj->gtt_space->start >> PAGE_SHIFT, + agp_type); + } else + intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT, + obj->base.size >> PAGE_SHIFT, + obj->pages, + agp_type); +} + void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj) { intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT, -- cgit v0.10.2 From e4ffd173a1c2f96b43127c2537dd99d89e759bba Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Mon, 4 Apr 2011 09:44:39 +0100 Subject: drm/i915: Add an interface to dynamically change the cache level [anholt v2: Don't forget that when going from cached to uncached, we haven't been tracking the write domain from the CPU perspective, since we haven't needed it for GPU coherency.] [ickle v3: We also need to make sure we relinquish any fences on older chipsets and clear the GTT for sane domain tracking.] Signed-off-by: Chris Wilson Signed-off-by: Eric Anholt Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4d1a8ae..e552aa6 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1223,9 +1223,14 @@ void i915_gem_release(struct drm_device *dev, struct drm_file *file); uint32_t i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj); +int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level); + /* i915_gem_gtt.c */ void i915_gem_restore_gtt_mappings(struct drm_device *dev); int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj); +void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level); void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj); /* i915_gem_evict.c */ diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e78a7ef..e691507 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3034,6 +3034,66 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write) return 0; } +int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level) +{ + int ret; + + if (obj->cache_level == cache_level) + return 0; + + if (obj->pin_count) { + DRM_DEBUG("can not change the cache level of pinned objects\n"); + return -EBUSY; + } + + if (obj->gtt_space) { + ret = i915_gem_object_finish_gpu(obj); + if (ret) + return ret; + + i915_gem_object_finish_gtt(obj); + + /* Before SandyBridge, you could not use tiling or fence + * registers with snooped memory, so relinquish any fences + * currently pointing to our region in the aperture. + */ + if (INTEL_INFO(obj->base.dev)->gen < 6) { + ret = i915_gem_object_put_fence(obj); + if (ret) + return ret; + } + + i915_gem_gtt_rebind_object(obj, cache_level); + } + + if (cache_level == I915_CACHE_NONE) { + u32 old_read_domains, old_write_domain; + + /* If we're coming from LLC cached, then we haven't + * actually been tracking whether the data is in the + * CPU cache or not, since we only allow one bit set + * in obj->write_domain and have been skipping the clflushes. + * Just set it to the CPU cache for now. + */ + WARN_ON(obj->base.write_domain & ~I915_GEM_DOMAIN_CPU); + WARN_ON(obj->base.read_domains & ~I915_GEM_DOMAIN_CPU); + + old_read_domains = obj->base.read_domains; + old_write_domain = obj->base.write_domain; + + obj->base.read_domains = I915_GEM_DOMAIN_CPU; + obj->base.write_domain = I915_GEM_DOMAIN_CPU; + + trace_i915_gem_object_change_domain(obj, + old_read_domains, + old_write_domain); + } + + obj->cache_level = cache_level; + return 0; +} + /* * Prepare buffer for display plane. Use uninterruptible for possible flush * wait, as in modesetting process we're not supposed to be interrupted. diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 837033c..7a709cd 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -29,9 +29,6 @@ #include "i915_trace.h" #include "intel_drv.h" -static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, - enum i915_cache_level cache_level); - /* XXX kill agp_type! */ static unsigned int cache_level_to_agp_type(struct drm_device *dev, enum i915_cache_level cache_level) @@ -97,8 +94,8 @@ int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj) return 0; } -static void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, - enum i915_cache_level cache_level) +void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj, + enum i915_cache_level cache_level) { struct drm_device *dev = obj->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 95c4b14..e961568 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -236,7 +236,8 @@ init_pipe_control(struct intel_ring_buffer *ring) ret = -ENOMEM; goto err; } - obj->cache_level = I915_CACHE_LLC; + + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); ret = i915_gem_object_pin(obj, 4096, true); if (ret) @@ -776,7 +777,8 @@ static int init_status_page(struct intel_ring_buffer *ring) ret = -ENOMEM; goto err; } - obj->cache_level = I915_CACHE_LLC; + + i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); ret = i915_gem_object_pin(obj, 4096, true); if (ret != 0) { -- cgit v0.10.2 From c411964209508e32cf36f6512ed339996751f55f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Tue, 29 Mar 2011 16:59:51 -0700 Subject: drm/i915: Mark the cursor and the overlay as being part of the display planes Signed-off-by: Chris Wilson Signed-off-by: Eric Anholt Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e32fb89..f79863a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5440,7 +5440,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail_locked; } - ret = i915_gem_object_set_to_gtt_domain(obj, 0); + ret = i915_gem_object_set_to_display_plane(obj, NULL); if (ret) { DRM_ERROR("failed to move cursor bo into the GTT\n"); goto fail_unpin; diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index a670c00..e0903c5 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -777,7 +777,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret != 0) return ret; - ret = i915_gem_object_set_to_gtt_domain(new_bo, 0); + ret = i915_gem_object_set_to_display_plane(new_bo, NULL); if (ret != 0) goto out_unpin; -- cgit v0.10.2 From 2da3b9b940e2a18147422c54ed8b29d01e1ade88 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 14 Apr 2011 09:41:17 +0100 Subject: drm/i915: Combine pinning with setting to the display plane We need to perform a few operations in order to move the object into the display plane (where it can be accessed coherently by the display engine) that are important for future safety to forbid whilst pinned. As a result, we want to need to perform some of the operations before pinning, but some are required once we have been bound into the GTT. So combine the pinning performed by all the callers with set_to_display_plane(), so this complication is contained within the single function. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e552aa6..8a9fd91 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1209,7 +1209,8 @@ int __must_check i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write); int __must_check -i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, +i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, + u32 alignment, struct intel_ring_buffer *pipelined); int i915_gem_attach_phys_object(struct drm_device *dev, struct drm_i915_gem_object *obj, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e691507..8a439f0 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3095,40 +3095,55 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, } /* - * Prepare buffer for display plane. Use uninterruptible for possible flush - * wait, as in modesetting process we're not supposed to be interrupted. + * Prepare buffer for display plane (scanout, cursors, etc). + * Can be called from an uninterruptible phase (modesetting) and allows + * any flushes to be pipelined (for pageflips). + * + * For the display plane, we want to be in the GTT but out of any write + * domains. So in many ways this looks like set_to_gtt_domain() apart from the + * ability to pipeline the waits, pinning and any additional subtleties + * that may differentiate the display plane from ordinary buffers. */ int -i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, +i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, + u32 alignment, struct intel_ring_buffer *pipelined) { - uint32_t old_read_domains; + u32 old_read_domains, old_write_domain; int ret; - /* Not valid to be called on unbound objects. */ - if (obj->gtt_space == NULL) - return -EINVAL; - ret = i915_gem_object_flush_gpu_write_domain(obj); if (ret) return ret; - - /* Currently, we are always called from an non-interruptible context. */ if (pipelined != obj->ring) { ret = i915_gem_object_wait_rendering(obj); if (ret) return ret; } + /* As the user may map the buffer once pinned in the display plane + * (e.g. libkms for the bootup splash), we have to ensure that we + * always use map_and_fenceable for all scanout buffers. + */ + ret = i915_gem_object_pin(obj, alignment, true); + if (ret) + return ret; + i915_gem_object_flush_cpu_write_domain(obj); + old_write_domain = obj->base.write_domain; old_read_domains = obj->base.read_domains; + + /* It should now be out of any other write domains, and we can update + * the domain values for our changes. + */ + BUG_ON((obj->base.write_domain & ~I915_GEM_DOMAIN_GTT) != 0); obj->base.read_domains |= I915_GEM_DOMAIN_GTT; trace_i915_gem_object_change_domain(obj, old_read_domains, - obj->base.write_domain); + old_write_domain); return 0; } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f79863a..86a3ec1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1812,14 +1812,10 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, } dev_priv->mm.interruptible = false; - ret = i915_gem_object_pin(obj, alignment, true); + ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined); if (ret) goto err_interruptible; - ret = i915_gem_object_set_to_display_plane(obj, pipelined); - if (ret) - goto err_unpin; - /* Install a fence for tiled scan-out. Pre-i965 always needs a * fence, whereas 965+ only requires a fence if using * framebuffer compression. For simplicity, we always install @@ -5434,21 +5430,15 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail_locked; } - ret = i915_gem_object_pin(obj, PAGE_SIZE, true); - if (ret) { - DRM_ERROR("failed to pin cursor bo\n"); - goto fail_locked; - } - - ret = i915_gem_object_set_to_display_plane(obj, NULL); + ret = i915_gem_object_pin_to_display_plane(obj, 0, NULL); if (ret) { DRM_ERROR("failed to move cursor bo into the GTT\n"); - goto fail_unpin; + goto fail_locked; } ret = i915_gem_object_put_fence(obj); if (ret) { - DRM_ERROR("failed to move cursor bo into the GTT\n"); + DRM_ERROR("failed to release fence for cursor"); goto fail_unpin; } diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index e0903c5..fcf6fcb 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -773,14 +773,10 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret != 0) return ret; - ret = i915_gem_object_pin(new_bo, PAGE_SIZE, true); + ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL); if (ret != 0) return ret; - ret = i915_gem_object_set_to_display_plane(new_bo, NULL); - if (ret != 0) - goto out_unpin; - ret = i915_gem_object_put_fence(new_bo); if (ret) goto out_unpin; -- cgit v0.10.2 From a7ef0640d984e265393a76aa08a09febd3e7ce34 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 29 Mar 2011 16:59:54 -0700 Subject: drm/i915: Use the uncached domain for the display planes The simplest and common method for ensuring scanout coherency on all chipsets is to mark the scanout buffers as uncached (and for userspace to remember to flush the render cache every so often). We can improve upon this for later generations by marking scanout objects as GFDT and only flush those cachelines when required. However, we start simple. [v2: Move the set to uncached above the clflush. Otherwise, we'd skip the clflush and try to scan out data that was still sitting in the cache.] Signed-off-by: Eric Anholt Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8a439f0..fb05383 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3122,6 +3122,19 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, return ret; } + /* The display engine is not coherent with the LLC cache on gen6. As + * a result, we make sure that the pinning that is about to occur is + * done with uncached PTEs. This is lowest common denominator for all + * chipsets. + * + * However for gen6+, we could do better by using the GFDT bit instead + * of uncaching, which would allow us to flush all the LLC-cached data + * with that bit in the PTE to main memory with just one PIPE_CONTROL. + */ + ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE); + if (ret) + return ret; + /* As the user may map the buffer once pinned in the display plane * (e.g. libkms for the bootup splash), we have to ensure that we * always use map_and_fenceable for all scanout buffers. -- cgit v0.10.2 From a18711120764dd96ed2ee6a4d436c448542bad77 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 29 Mar 2011 16:59:55 -0700 Subject: drm/i915: Use the LLC mode on gen6 for everything but display. Improves full-screen openarena on my laptop 20.3% +/- 4.0% (n=3) Improves 800x600 nexuiz on my laptop 12.3% +/- 0.1% (n=3) We have more room to improve with doing LLC caching for display using GFDT, and in doing LLC+MLC caching, but this was an easy performance win and incremental improvement toward those two. Signed-off-by: Eric Anholt Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index fb05383..cb1f61d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3700,7 +3700,23 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev, obj->base.write_domain = I915_GEM_DOMAIN_CPU; obj->base.read_domains = I915_GEM_DOMAIN_CPU; - obj->cache_level = I915_CACHE_NONE; + if (IS_GEN6(dev)) { + /* On Gen6, we can have the GPU use the LLC (the CPU + * cache) for about a 10% performance improvement + * compared to uncached. Graphics requests other than + * display scanout are coherent with the CPU in + * accessing this cache. This means in this mode we + * don't need to clflush on the CPU side, and on the + * GPU side we only need to flush internal caches to + * get data visible to the CPU. + * + * However, we maintain the display planes as UC, and so + * need to rebind when first used as such. + */ + obj->cache_level = I915_CACHE_LLC; + } else + obj->cache_level = I915_CACHE_NONE; + obj->base.driver_private = NULL; obj->fence_reg = I915_FENCE_REG_NONE; INIT_LIST_HEAD(&obj->mm_list); -- cgit v0.10.2 From 140a1ef2f91a00e1d25f0878c193abdc25bf6ebe Mon Sep 17 00:00:00 2001 From: Michael Witten Date: Fri, 10 Jun 2011 03:57:26 +0000 Subject: mm Kconfig typo: cleancacne -> cleancache Signed-off-by: Michael Witten Signed-off-by: Jiri Kosina diff --git a/mm/Kconfig b/mm/Kconfig index 8ca47a5..f2f1ca1 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -356,7 +356,7 @@ config CLEANCACHE for clean pages that the kernel's pageframe replacement algorithm (PFRA) would like to keep around, but can't since there isn't enough memory. So when the PFRA "evicts" a page, it first attempts to use - cleancacne code to put the data contained in that page into + cleancache code to put the data contained in that page into "transcendent memory", memory that is not directly accessible or addressable by the kernel and is of unknown and possibly time-varying size. And when a cleancache-enabled -- cgit v0.10.2 From 28f65c11f2ffb3957259dece647a24f8ad2e241b Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Thu, 9 Jun 2011 09:13:32 -0700 Subject: treewide: Convert uses of struct resource to resource_size(ptr) Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: Joe Perches Signed-off-by: Jiri Kosina diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index c11af1e..a07b0e7 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c @@ -193,7 +193,7 @@ static int __devinit scoop_probe(struct platform_device *pdev) spin_lock_init(&devptr->scoop_lock); inf = pdev->dev.platform_data; - devptr->base = ioremap(mem->start, mem->end - mem->start + 1); + devptr->base = ioremap(mem->start, resource_size(mem)); if (!devptr->base) { ret = -ENOMEM; diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 3eb4538..14dd666 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -525,7 +525,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) if (ARRAY_SIZE(lcdc_resources) > 2) { void __iomem *fb; struct resource *fb_res = &lcdc_resources[2]; - size_t fb_len = fb_res->end - fb_res->start + 1; + size_t fb_len = resource_size(fb_res); fb = ioremap(fb_res->start, fb_len); if (fb) { diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index a560439..f27c7d2 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -129,12 +129,12 @@ static void __init mv78xx0_pcie_preinit(void) struct pcie_port *pp = pcie_port + i; mv78xx0_setup_pcie_io_win(win++, pp->res[0].start, - pp->res[0].end - pp->res[0].start + 1, - pp->maj, pp->min); + resource_size(&pp->res[0]), + pp->maj, pp->min); mv78xx0_setup_pcie_mem_win(win++, pp->res[1].start, - pp->res[1].end - pp->res[1].start + 1, - pp->maj, pp->min); + resource_size(&pp->res[1]), + pp->maj, pp->min); } } diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 513d6ab..399c89f 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -1791,7 +1791,7 @@ static void __init u300_assign_physmem(void) 0 == res->start) { res->start = curr_start; res->end += curr_start; - curr_start += (res->end - res->start + 1); + curr_start += resource_size(res); printk(KERN_INFO "core.c: Mapping RAM " \ "%#x-%#x to device %s:%s\n", diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 7a61ef8..761c3c9 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) goto err_free_clk; } - r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); + r = request_mem_region(r->start, resource_size(r), pdev->name); if (r == NULL) { dev_err(&pdev->dev, "failed to request memory resource\n"); ret = -EBUSY; goto err_free_clk; } - pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); + pwm->mmio_base = ioremap(r->start, resource_size(r)); if (pwm->mmio_base == NULL) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; @@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) return 0; err_free_mem: - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); err_free_clk: clk_put(pwm->clk); err_free: @@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev) iounmap(pwm->mmio_base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); clk_put(pwm->clk); diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c index 54f5edd..e1cbc72 100644 --- a/arch/arm/plat-s5p/sysmmu.c +++ b/arch/arm/plat-s5p/sysmmu.c @@ -232,8 +232,8 @@ static int s5p_sysmmu_probe(struct platform_device *pdev) goto err_res; } - mem = request_mem_region(res->start, - ((res->end) - (res->start)) + 1, pdev->name); + mem = request_mem_region(res->start, resource_size(res), + pdev->name); if (!mem) { dev_err(dev, "Failed to request the memory region of %s.\n", sysmmu_ips_name[i]); @@ -241,7 +241,7 @@ static int s5p_sysmmu_probe(struct platform_device *pdev) goto err_res; } - sysmmusfrs[i] = ioremap(res->start, res->end - res->start + 1); + sysmmusfrs[i] = ioremap(res->start, resource_size(res)); if (!sysmmusfrs[i]) { dev_err(dev, "Failed to ioremap() for %s.\n", sysmmu_ips_name[i]); diff --git a/arch/arm/plat-samsung/pm-check.c b/arch/arm/plat-samsung/pm-check.c index 6b733fa..3cbd626 100644 --- a/arch/arm/plat-samsung/pm-check.c +++ b/arch/arm/plat-samsung/pm-check.c @@ -72,7 +72,7 @@ static void s3c_pm_run_sysram(run_fn_t fn, u32 *arg) static u32 *s3c_pm_countram(struct resource *res, u32 *val) { - u32 size = (u32)(res->end - res->start)+1; + u32 size = (u32)resource_size(res); size += CHECK_CHUNKSIZE-1; size /= CHECK_CHUNKSIZE; diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c index bb0974c..b4247f4 100644 --- a/arch/avr32/kernel/setup.c +++ b/arch/avr32/kernel/setup.c @@ -444,7 +444,7 @@ static unsigned long __init find_bootmap_pfn(const struct resource *mem) { unsigned long bootmap_pages, bootmap_len; - unsigned long node_pages = PFN_UP(mem->end - mem->start + 1); + unsigned long node_pages = PFN_UP(resource_size(mem)); unsigned long bootmap_start; bootmap_pages = bootmem_bootmap_pages(node_pages); @@ -541,10 +541,10 @@ static void __init setup_bootmem(void) */ if (res->start >= PFN_PHYS(first_pfn) && res->end < PFN_PHYS(max_pfn)) - reserve_bootmem_node( - NODE_DATA(node), res->start, - res->end - res->start + 1, - BOOTMEM_DEFAULT); + reserve_bootmem_node(NODE_DATA(node), + res->start, + resource_size(res), + BOOTMEM_DEFAULT); } node_set_online(node); diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c index fbc2aea..cfb298d 100644 --- a/arch/avr32/mach-at32ap/extint.c +++ b/arch/avr32/mach-at32ap/extint.c @@ -204,7 +204,7 @@ static int __init eic_probe(struct platform_device *pdev) } eic->first_irq = EIM_IRQ_BASE + 32 * pdev->id; - eic->regs = ioremap(regs->start, regs->end - regs->start + 1); + eic->regs = ioremap(regs->start, resource_size(regs)); if (!eic->regs) { dev_dbg(&pdev->dev, "failed to map regs\n"); goto err_ioremap; diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c index f7672d3..f66245e 100644 --- a/arch/avr32/mach-at32ap/hsmc.c +++ b/arch/avr32/mach-at32ap/hsmc.c @@ -245,7 +245,7 @@ static int hsmc_probe(struct platform_device *pdev) hsmc->pclk = pclk; hsmc->mck = mck; - hsmc->regs = ioremap(regs->start, regs->end - regs->start + 1); + hsmc->regs = ioremap(regs->start, resource_size(regs)); if (!hsmc->regs) goto out_disable_clocks; diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c index 3e36461..6c70043 100644 --- a/arch/avr32/mach-at32ap/intc.c +++ b/arch/avr32/mach-at32ap/intc.c @@ -107,7 +107,7 @@ void __init init_IRQ(void) clk_enable(pclk); - intc0.regs = ioremap(regs->start, regs->end - regs->start + 1); + intc0.regs = ioremap(regs->start, resource_size(regs)); if (!intc0.regs) { printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n", (unsigned long)regs->start); diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c index 2e0aa85..9b39dea 100644 --- a/arch/avr32/mach-at32ap/pio.c +++ b/arch/avr32/mach-at32ap/pio.c @@ -461,7 +461,7 @@ void __init at32_init_pio(struct platform_device *pdev) clk_enable(pio->clk); pio->pdev = pdev; - pio->regs = ioremap(regs->start, regs->end - regs->start + 1); + pio->regs = ioremap(regs->start, resource_size(regs)); /* start with irqs disabled and acked */ pio_writel(pio, IDR, ~0UL); diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 5359906..dd3fae0 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -89,7 +89,7 @@ void pcibios_free_controller(struct pci_controller *phb) static resource_size_t pcibios_io_size(const struct pci_controller *hose) { - return hose->io_resource.end - hose->io_resource.start + 1; + return resource_size(&hose->io_resource); } int pcibios_vaddr_is_ioport(void __iomem *address) diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c index f31218e..764362c 100644 --- a/arch/mips/pci/pci-rc32434.c +++ b/arch/mips/pci/pci-rc32434.c @@ -215,7 +215,7 @@ static int __init rc32434_pci_init(void) rc32434_pcibridge_init(); io_map_base = ioremap(rc32434_res_pci_io1.start, - rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1); + resource_size(&rcrc32434_res_pci_io1)); if (!io_map_base) return -ENOMEM; diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c index 5652571..444b8d8 100644 --- a/arch/mips/pci/pci-vr41xx.c +++ b/arch/mips/pci/pci-vr41xx.c @@ -305,7 +305,7 @@ static int __init vr41xx_pciu_init(void) struct resource *res = vr41xx_pci_controller.io_resource; master = setup->master_io; io_map_base = ioremap(master->bus_base_address, - res->end - res->start + 1); + resource_size(res)); if (!io_map_base) return -EBUSY; diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c index e56fa61..bce1872 100644 --- a/arch/mips/powertv/asic/asic_devices.c +++ b/arch/mips/powertv/asic/asic_devices.c @@ -394,23 +394,21 @@ void __init platform_alloc_bootmem(void) /* Loop through looking for resources that want a particular address */ for (i = 0; gp_resources[i].flags != 0; i++) { - int size = gp_resources[i].end - gp_resources[i].start + 1; + int size = resource_size(&gp_resources[i]); if ((gp_resources[i].start != 0) && ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { reserve_bootmem(dma_to_phys(gp_resources[i].start), size, 0); - total += gp_resources[i].end - - gp_resources[i].start + 1; + total += resource_size(&gp_resources[i]); pr_info("reserve resource %s at %08x (%u bytes)\n", gp_resources[i].name, gp_resources[i].start, - gp_resources[i].end - - gp_resources[i].start + 1); + resource_size(&gp_resources[i])); } } /* Loop through assigning addresses for those that are left */ for (i = 0; gp_resources[i].flags != 0; i++) { - int size = gp_resources[i].end - gp_resources[i].start + 1; + int size = resource_size(&gp_resources[i]); if ((gp_resources[i].start == 0) && ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { void *mem = alloc_bootmem_pages(size); diff --git a/arch/powerpc/include/asm/macio.h b/arch/powerpc/include/asm/macio.h index 7ab82c8..27af7f8 100644 --- a/arch/powerpc/include/asm/macio.h +++ b/arch/powerpc/include/asm/macio.h @@ -76,7 +76,7 @@ static inline unsigned long macio_resource_len(struct macio_dev *dev, int resour struct resource *res = &dev->resource[resource_no]; if (res->start == 0 || res->end == 0 || res->end < res->start) return 0; - return res->end - res->start + 1; + return resource_size(res); } extern int macio_enable_devres(struct macio_dev *dev); diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index 7ee50f0..6658a15 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c @@ -126,7 +126,7 @@ void __init reserve_crashkernel(void) /* We might have got these values via the command line or the * device tree, either way sanitise them now. */ - crash_size = crashk_res.end - crashk_res.start + 1; + crash_size = resource_size(&crashk_res); #ifndef CONFIG_RELOCATABLE if (crashk_res.start != KDUMP_KERNELBASE) @@ -222,7 +222,7 @@ static void __init export_crashk_values(struct device_node *node) if (crashk_res.start != 0) { prom_add_property(node, &crashk_base_prop); - crashk_size = crashk_res.end - crashk_res.start + 1; + crashk_size = resource_size(&crashk_res); prom_add_property(node, &crashk_size_prop); } } diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 893af2a9..3764e37 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -107,7 +107,7 @@ static resource_size_t pcibios_io_size(const struct pci_controller *hose) #ifdef CONFIG_PPC64 return hose->pci_io_size; #else - return hose->io_resource.end - hose->io_resource.start + 1; + return resource_size(&hose->io_resource); #endif } diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c index da110bd..5f5e693 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c @@ -264,7 +264,7 @@ mpc52xx_pci_setup(struct pci_controller *hose, (unsigned long long)res->flags); out_be32(&pci_regs->iw0btar, MPC52xx_PCI_IWBTAR_TRANSLATION(res->start, res->start, - res->end - res->start + 1)); + resource_size(res))); iwcr0 = MPC52xx_PCI_IWCR_ENABLE | MPC52xx_PCI_IWCR_MEM; if (res->flags & IORESOURCE_PREFETCH) iwcr0 |= MPC52xx_PCI_IWCR_READ_MULTI; @@ -278,7 +278,7 @@ mpc52xx_pci_setup(struct pci_controller *hose, res->start, res->end, res->flags); out_be32(&pci_regs->iw1btar, MPC52xx_PCI_IWBTAR_TRANSLATION(res->start, res->start, - res->end - res->start + 1)); + resource_size(res))); iwcr1 = MPC52xx_PCI_IWCR_ENABLE | MPC52xx_PCI_IWCR_MEM; if (res->flags & IORESOURCE_PREFETCH) iwcr1 |= MPC52xx_PCI_IWCR_READ_MULTI; @@ -300,7 +300,7 @@ mpc52xx_pci_setup(struct pci_controller *hose, out_be32(&pci_regs->iw2btar, MPC52xx_PCI_IWBTAR_TRANSLATION(hose->io_base_phys, res->start, - res->end - res->start + 1)); + resource_size(res))); iwcr2 = MPC52xx_PCI_IWCR_ENABLE | MPC52xx_PCI_IWCR_IO; /* Set all the IWCR fields at once; they're in the same reg */ @@ -402,7 +402,7 @@ mpc52xx_add_bridge(struct device_node *node) hose->ops = &mpc52xx_pci_ops; - pci_regs = ioremap(rsrc.start, rsrc.end - rsrc.start + 1); + pci_regs = ioremap(rsrc.start, resource_size(&rsrc)); if (!pci_regs) return -ENOMEM; diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c index a2b9b9e..f8fa2fc 100644 --- a/arch/powerpc/platforms/83xx/km83xx.c +++ b/arch/powerpc/platforms/83xx/km83xx.c @@ -101,7 +101,7 @@ static void __init mpc83xx_km_setup_arch(void) __func__); return; } - base = ioremap(res.start, res.end - res.start + 1); + base = ioremap(res.start, resource_size(&res)); /* * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2) diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index ec0b401b..93e60f1 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c @@ -68,7 +68,7 @@ static void __init mpc832x_sys_setup_arch(void) struct resource res; of_address_to_resource(np, 0, &res); - bcsr_regs = ioremap(res.start, res.end - res.start +1); + bcsr_regs = ioremap(res.start, resource_size(&res)); of_node_put(np); } diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index d0a634b..c1b1dc5 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c @@ -53,7 +53,7 @@ static int mpc834xemds_usb_cfg(void) struct resource res; of_address_to_resource(np, 0, &res); - bcsr_regs = ioremap(res.start, res.end - res.start + 1); + bcsr_regs = ioremap(res.start, resource_size(&res)); of_node_put(np); } if (!bcsr_regs) diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index 09e9d6f..81c052b 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -76,7 +76,7 @@ static void __init mpc836x_mds_setup_arch(void) struct resource res; of_address_to_resource(np, 0, &res); - bcsr_regs = ioremap(res.start, res.end - res.start +1); + bcsr_regs = ioremap(res.start, resource_size(&res)); of_node_put(np); } diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c index 2c64164..1ad748b 100644 --- a/arch/powerpc/platforms/83xx/usb.c +++ b/arch/powerpc/platforms/83xx/usb.c @@ -171,7 +171,7 @@ int mpc831x_usb_cfg(void) of_node_put(np); return ret; } - usb_regs = ioremap(res.start, res.end - res.start + 1); + usb_regs = ioremap(res.start, resource_size(&res)); /* Using on-chip PHY */ if (prop && (!strcmp(prop, "utmi_wide") || diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c index d2dfd46..09ced72 100644 --- a/arch/powerpc/platforms/85xx/sbc8560.c +++ b/arch/powerpc/platforms/85xx/sbc8560.c @@ -285,7 +285,7 @@ static int __init sbc8560_bdrstcr_init(void) printk(KERN_INFO "sbc8560: Found BRSTCR at i/o 0x%x\n", res.start); - brstcr = ioremap(res.start, res.end - res.start); + brstcr = ioremap(res.start, resource_size(&res)); if(!brstcr) printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n"); diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 0125604..a9dc5e7 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c @@ -123,7 +123,7 @@ static void xes_mpc85xx_fixups(void) continue; } - l2_base = ioremap(r[0].start, r[0].end - r[0].start + 1); + l2_base = ioremap(r[0].start, resource_size(&r[0])); xes_mpc85xx_configure_l2(l2_base); } diff --git a/arch/powerpc/platforms/cell/celleb_scc_epci.c b/arch/powerpc/platforms/cell/celleb_scc_epci.c index 05b0db3..844c0fa 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_epci.c +++ b/arch/powerpc/platforms/cell/celleb_scc_epci.c @@ -393,19 +393,19 @@ static int __init celleb_setup_epci(struct device_node *node, if (of_address_to_resource(node, 0, &r)) goto error; - hose->cfg_addr = ioremap(r.start, (r.end - r.start + 1)); + hose->cfg_addr = ioremap(r.start, resource_size(&r)); if (!hose->cfg_addr) goto error; pr_debug("EPCI: cfg_addr map 0x%016llx->0x%016lx + 0x%016llx\n", - r.start, (unsigned long)hose->cfg_addr, (r.end - r.start + 1)); + r.start, (unsigned long)hose->cfg_addr, resource_size(&r)); if (of_address_to_resource(node, 2, &r)) goto error; - hose->cfg_data = ioremap(r.start, (r.end - r.start + 1)); + hose->cfg_data = ioremap(r.start, resource_size(&r)); if (!hose->cfg_data) goto error; pr_debug("EPCI: cfg_data map 0x%016llx->0x%016lx + 0x%016llx\n", - r.start, (unsigned long)hose->cfg_data, (r.end - r.start + 1)); + r.start, (unsigned long)hose->cfg_data, resource_size(&r)); hose->ops = &celleb_epci_ops; celleb_epci_init(hose); diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c index a881bbe..ae790ac 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c +++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c @@ -494,7 +494,7 @@ static __init int celleb_setup_pciex(struct device_node *node, pr_err("PCIEXC:Failed to get config resource.\n"); return 1; } - phb->cfg_addr = ioremap(r.start, r.end - r.start + 1); + phb->cfg_addr = ioremap(r.start, resource_size(&r)); if (!phb->cfg_addr) { pr_err("PCIEXC:Failed to remap SMMIO region.\n"); return 1; diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c index f465d47..4e5c914 100644 --- a/arch/powerpc/platforms/cell/spu_manage.c +++ b/arch/powerpc/platforms/cell/spu_manage.c @@ -222,7 +222,7 @@ static int spu_map_resource(struct spu *spu, int nr, return ret; if (phys) *phys = resource.start; - len = resource.end - resource.start + 1; + len = resource_size(&resource); *virt = ioremap(resource.start, len); if (!*virt) return -EINVAL; diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index 8f67a39..3f65443 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c @@ -142,7 +142,7 @@ hydra_init(void) return 0; } of_node_put(np); - Hydra = ioremap(r.start, r.end-r.start); + Hydra = ioremap(r.start, resource_size(&r)); printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start); printk("Hydra Feature_Control was %x", in_le32(&Hydra->Feature_Control)); diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index 321a9b3..756123b 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c @@ -576,7 +576,7 @@ int pasemi_dma_init(void) res.start = 0xfd800000; res.end = res.start + 0x1000; } - dma_status = __ioremap(res.start, res.end-res.start, 0); + dma_status = __ioremap(res.start, resource_size(&res), 0); pci_dev_put(iob_pdev); for (i = 0; i < MAX_TXCH; i++) diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c index b1cdcf9..695443b 100644 --- a/arch/powerpc/platforms/powermac/nvram.c +++ b/arch/powerpc/platforms/powermac/nvram.c @@ -580,10 +580,10 @@ int __init pmac_nvram_init(void) /* Try to obtain an address */ if (of_address_to_resource(dp, 0, &r1) == 0) { nvram_naddrs = 1; - s1 = (r1.end - r1.start) + 1; + s1 = resource_size(&r1); if (of_address_to_resource(dp, 1, &r2) == 0) { nvram_naddrs = 2; - s2 = (r2.end - r2.start) + 1; + s2 = resource_size(&r2); } } diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index f33e08d..4d4eba3 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c @@ -838,8 +838,7 @@ static void __init setup_u3_ht(struct pci_controller* hose) * into cfg_addr */ hose->cfg_data = ioremap(cfg_res.start, 0x02000000); - hose->cfg_addr = ioremap(self_res.start, - self_res.end - self_res.start + 1); + hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res)); /* * /ht node doesn't expose a "ranges" property, we read the register @@ -1323,8 +1322,7 @@ static void fixup_u4_pcie(struct pci_dev* dev) */ if (r->start >= 0xf0000000 && r->start < 0xf3000000) continue; - if (!region || (r->end - r->start) > - (region->end - region->start)) + if (!region || resource_size(r) > resource_size(region)) region = r; } /* Nothing found, bail */ diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c index 48211ca..11c9fce 100644 --- a/arch/powerpc/platforms/powermac/time.c +++ b/arch/powerpc/platforms/powermac/time.c @@ -274,7 +274,7 @@ int __init via_calibrate_decr(void) return 0; } of_node_put(vias); - via = ioremap(rsrc.start, rsrc.end - rsrc.start + 1); + via = ioremap(rsrc.start, resource_size(&rsrc)); if (via == NULL) { printk(KERN_ERR "Failed to map VIA for timer calibration !\n"); return 0; diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c index bd0d540..265f0f0 100644 --- a/arch/powerpc/sysdev/axonram.c +++ b/arch/powerpc/sysdev/axonram.c @@ -203,7 +203,7 @@ static int axon_ram_probe(struct platform_device *device) goto failed; } - bank->size = resource.end - resource.start + 1; + bank->size = resource_size(&resource); if (bank->size == 0) { dev_err(&device->dev, "No DDR2 memory found for %s%d\n", diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 350787c..5d7d59a 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -148,7 +148,7 @@ unsigned int cpm_pic_init(void) if (ret) goto end; - cpic_reg = ioremap(res.start, res.end - res.start + 1); + cpic_reg = ioremap(res.start, resource_size(&res)); if (cpic_reg == NULL) goto end; diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index 2b69aa0..d55d0ad 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c @@ -115,7 +115,7 @@ int cpm_muram_init(void) max = r.end; rh_attach_region(&cpm_muram_info, r.start - muram_pbase, - r.end - r.start + 1); + resource_size(&r)); } muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1); diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c index 8e9e06a7c..4f2680f 100644 --- a/arch/powerpc/sysdev/dart_iommu.c +++ b/arch/powerpc/sysdev/dart_iommu.c @@ -239,7 +239,7 @@ static int __init dart_init(struct device_node *dart_node) DARTMAP_RPNMASK); /* Map in DART registers */ - dart = ioremap(r.start, r.end - r.start + 1); + dart = ioremap(r.start, resource_size(&r)); if (dart == NULL) panic("DART: Cannot map registers!"); diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 92e7833..419a772 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -349,7 +349,7 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev) goto error_out; } - msi->msi_regs = ioremap(res.start, res.end - res.start + 1); + msi->msi_regs = ioremap(res.start, resource_size(&res)); if (!msi->msi_regs) { dev_err(&dev->dev, "ioremap problem failed\n"); goto error_out; diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 68ca929..ba5cb3fa 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -64,7 +64,7 @@ static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, { resource_size_t pci_addr = res->start - offset; resource_size_t phys_addr = res->start; - resource_size_t size = res->end - res->start + 1; + resource_size_t size = resource_size(res); u32 flags = 0x80044000; /* enable & mem R/W */ unsigned int i; @@ -108,7 +108,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose, char *name = hose->dn->full_name; pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", - (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1); + (u64)rsrc->start, (u64)resource_size(rsrc)); if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) { win_idx = 2; @@ -116,7 +116,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose, end_idx = 3; } - pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1); + pci = ioremap(rsrc->start, resource_size(rsrc)); if (!pci) { dev_err(hose->parent, "Unable to map ATMU registers\n"); return; @@ -153,9 +153,9 @@ static void __init setup_pci_atmu(struct pci_controller *hose, } else { pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, " "phy base 0x%016llx.\n", - (u64)hose->io_resource.start, - (u64)hose->io_resource.end - (u64)hose->io_resource.start + 1, - (u64)hose->io_base_phys); + (u64)hose->io_resource.start, + (u64)resource_size(&hose->io_resource), + (u64)hose->io_base_phys); out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12)); out_be32(&pci->pow[j].potear, 0); out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12)); diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 5b206a2..9585338 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -1523,7 +1523,7 @@ int fsl_rio_setup(struct platform_device *dev) port->priv = priv; port->phys_efptr = 0x100; - priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); + priv->regs_win = ioremap(regs.start, resource_size(®s)); rio_regs_win = priv->regs_win; /* Probe the master port phy type */ diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 7367d17..95da897 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -736,7 +736,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) return NULL; } - ipic->regs = ioremap(res.start, res.end - res.start + 1); + ipic->regs = ioremap(res.start, resource_size(&res)); ipic->irqhost->host_data = ipic; diff --git a/arch/powerpc/sysdev/mmio_nvram.c b/arch/powerpc/sysdev/mmio_nvram.c index ddc877a..69f5814 100644 --- a/arch/powerpc/sysdev/mmio_nvram.c +++ b/arch/powerpc/sysdev/mmio_nvram.c @@ -129,7 +129,7 @@ int __init mmio_nvram_init(void) goto out; } nvram_addr = r.start; - mmio_nvram_len = r.end - r.start + 1; + mmio_nvram_len = resource_size(&r); if ( (!mmio_nvram_len) || (!nvram_addr) ) { printk(KERN_WARNING "nvram: address or length is 0\n"); ret = -EIO; diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 20924f2..22e48e2d 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c @@ -166,7 +166,7 @@ int mpc8xx_pic_init(void) if (ret) goto out; - siu_reg = ioremap(res.start, res.end - res.start + 1); + siu_reg = ioremap(res.start, resource_size(&res)); if (siu_reg == NULL) { ret = -EINVAL; goto out; diff --git a/arch/powerpc/sysdev/mv64x60_udbg.c b/arch/powerpc/sysdev/mv64x60_udbg.c index 2792dc8..50a8138 100644 --- a/arch/powerpc/sysdev/mv64x60_udbg.c +++ b/arch/powerpc/sysdev/mv64x60_udbg.c @@ -125,11 +125,11 @@ static void mv64x60_udbg_init(void) of_node_put(np); - mpsc_base = ioremap(r[0].start, r[0].end - r[0].start + 1); + mpsc_base = ioremap(r[0].start, resource_size(&r[0])); if (!mpsc_base) return; - mpsc_intr_cause = ioremap(r[1].start, r[1].end - r[1].start + 1); + mpsc_intr_cause = ioremap(r[1].start, resource_size(&r[1])); if (!mpsc_intr_cause) { iounmap(mpsc_base); return; diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 156aa7d..deda60a 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -265,7 +265,7 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose, if (ppc4xx_setup_one_pci_PMM(hose, reg, res->start, res->start - hose->pci_mem_offset, - res->end + 1 - res->start, + resource_size(res), res->flags, j) == 0) { j++; @@ -290,7 +290,7 @@ static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose, void __iomem *reg, const struct resource *res) { - resource_size_t size = res->end - res->start + 1; + resource_size_t size = resource_size(res); u32 sa; /* Calculate window size */ @@ -349,7 +349,7 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np) bus_range = of_get_property(np, "bus-range", NULL); /* Map registers */ - reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start); + reg = ioremap(rsrc_reg.start, resource_size(&rsrc_reg)); if (reg == NULL) { printk(KERN_ERR "%s: Can't map registers !", np->full_name); goto fail; @@ -465,7 +465,7 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose, if (ppc4xx_setup_one_pcix_POM(hose, reg, res->start, res->start - hose->pci_mem_offset, - res->end + 1 - res->start, + resource_size(res), res->flags, j) == 0) { j++; @@ -492,7 +492,7 @@ static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose, int big_pim, int enable_msi_hole) { - resource_size_t size = res->end - res->start + 1; + resource_size_t size = resource_size(res); u32 sa; /* RAM is always at 0 */ @@ -555,7 +555,7 @@ static void __init ppc4xx_probe_pcix_bridge(struct device_node *np) bus_range = of_get_property(np, "bus-range", NULL); /* Map registers */ - reg = ioremap(rsrc_reg.start, rsrc_reg.end + 1 - rsrc_reg.start); + reg = ioremap(rsrc_reg.start, resource_size(&rsrc_reg)); if (reg == NULL) { printk(KERN_ERR "%s: Can't map registers !", np->full_name); goto fail; @@ -1604,7 +1604,7 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port, if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, res->start, res->start - hose->pci_mem_offset, - res->end + 1 - res->start, + resource_size(res), res->flags, j) == 0) { j++; @@ -1639,7 +1639,7 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port, void __iomem *mbase, struct resource *res) { - resource_size_t size = res->end - res->start + 1; + resource_size_t size = resource_size(res); u64 sa; if (port->endpoint) { diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index b2acda0..18e75ca 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -347,7 +347,7 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, return; } - qe_ic->regs = ioremap(res.start, res.end - res.start + 1); + qe_ic->regs = ioremap(res.start, resource_size(&res)); qe_ic->irqhost->host_data = qe_ic; qe_ic->hc_irq = qe_ic_irq_chip; diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 77e4934..fd1a6c3 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c @@ -41,7 +41,7 @@ int par_io_init(struct device_node *np) ret = of_address_to_resource(np, 0, &res); if (ret) return ret; - par_io = ioremap(res.start, res.end - res.start + 1); + par_io = ioremap(res.start, resource_size(&res)); num_ports = of_get_property(np, "num-ports", NULL); if (num_ports) diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c index 1f15ad4..039a782 100644 --- a/arch/powerpc/sysdev/xics/icp-native.c +++ b/arch/powerpc/sysdev/xics/icp-native.c @@ -247,7 +247,7 @@ static int __init icp_native_init_one_node(struct device_node *np, return -1; } - if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start)) + if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r))) return -1; (*indx)++; diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c index 32c385e..0f62f46 100644 --- a/arch/sh/kernel/io_trapped.c +++ b/arch/sh/kernel/io_trapped.c @@ -58,7 +58,7 @@ int register_trapped_io(struct trapped_io *tiop) for (k = 0; k < tiop->num_resources; k++) { res = tiop->resource + k; - len += roundup((res->end - res->start) + 1, PAGE_SIZE); + len += roundup(resource_size(res), PAGE_SIZE); flags |= res->flags; } @@ -85,7 +85,7 @@ int register_trapped_io(struct trapped_io *tiop) (unsigned long)(tiop->virt_base + len), res->flags & IORESOURCE_IO ? "io" : "mmio", (unsigned long)res->start); - len += roundup((res->end - res->start) + 1, PAGE_SIZE); + len += roundup(resource_size(res), PAGE_SIZE); } tiop->magic = IO_TRAPPED_MAGIC; @@ -128,7 +128,7 @@ void __iomem *match_trapped_io_handler(struct list_head *list, return tiop->virt_base + voffs; } - len = (res->end - res->start) + 1; + len = resource_size(res); voffs += roundup(len, PAGE_SIZE); } } @@ -173,7 +173,7 @@ static unsigned long lookup_address(struct trapped_io *tiop, for (k = 0; k < tiop->num_resources; k++) { res = tiop->resource + k; - len = roundup((res->end - res->start) + 1, PAGE_SIZE); + len = roundup(resource_size(res), PAGE_SIZE); if (address < (vaddr + len)) return res->start + (address - vaddr); vaddr += len; diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c index e2a3af3..c5a33f0 100644 --- a/arch/sh/kernel/machine_kexec.c +++ b/arch/sh/kernel/machine_kexec.c @@ -170,7 +170,7 @@ void __init reserve_crashkernel(void) if (crashk_res.end == crashk_res.start) goto disable; - crash_size = PAGE_ALIGN(crashk_res.end - crashk_res.start + 1); + crash_size = PAGE_ALIGN(resource_size(&crashk_res)); if (!crashk_res.start) { unsigned long max = memblock_end_of_DRAM() - memory_limit; crashk_res.start = __memblock_alloc_base(crash_size, PAGE_SIZE, max); diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index 1c9c80a..6ffccd6 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c @@ -228,7 +228,7 @@ _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) } pa &= PAGE_MASK; - sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1); + sparc_mapiorange(bus, pa, res->start, resource_size(res)); return (void __iomem *)(unsigned long)(res->start + offset); } @@ -240,7 +240,7 @@ static void _sparc_free_io(struct resource *res) { unsigned long plen; - plen = res->end - res->start + 1; + plen = resource_size(res); BUG_ON((plen & (PAGE_SIZE-1)) != 0); sparc_unmapiorange(res->start, plen); release_resource(res); @@ -331,9 +331,9 @@ static void sbus_free_coherent(struct device *dev, size_t n, void *p, } n = PAGE_ALIGN(n); - if ((res->end-res->start)+1 != n) { + if (resource_size(res) != n) { printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", - (long)((res->end-res->start)+1), n); + (long)resource_size(res), n); return; } @@ -504,9 +504,9 @@ static void pci32_free_coherent(struct device *dev, size_t n, void *p, } n = PAGE_ALIGN(n); - if ((res->end-res->start)+1 != n) { + if (resource_size(res) != n) { printk("pci_free_consistent: region 0x%lx asked 0x%lx\n", - (long)((res->end-res->start)+1), (long)n); + (long)resource_size(res), (long)n); return; } diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 713dc91..2d1453d 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -820,11 +820,9 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc unsigned long space_size, user_offset, user_size; if (mmap_state == pci_mmap_io) { - space_size = (pbm->io_space.end - - pbm->io_space.start) + 1; + space_size = resource_size(&pbm->io_space); } else { - space_size = (pbm->mem_space.end - - pbm->mem_space.start) + 1; + space_size = resource_size(&pbm->mem_space); } /* Make sure the request is in range. */ diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index 6cdc9ba..5f85d8b 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c @@ -553,8 +553,7 @@ static void __init setup_bootmem_allocator(void) #ifdef CONFIG_KEXEC if (crashk_res.start != crashk_res.end) - reserve_bootmem(crashk_res.start, - crashk_res.end - crashk_res.start + 1, 0); + reserve_bootmem(crashk_res.start, resource_size(&crashk_res), 0); #endif } diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index e8c33a3..726494b 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -1553,7 +1553,7 @@ static void __init calgary_fixup_one_tce_space(struct pci_dev *dev) continue; /* cover the whole region */ - npages = (r->end - r->start) >> PAGE_SHIFT; + npages = resource_size(r) >> PAGE_SHIFT; npages++; iommu_range_reserve(tbl, r->start, npages); diff --git a/arch/x86/kernel/probe_roms.c b/arch/x86/kernel/probe_roms.c index ba0a4cc..6322803 100644 --- a/arch/x86/kernel/probe_roms.c +++ b/arch/x86/kernel/probe_roms.c @@ -234,7 +234,7 @@ void __init probe_roms(void) /* check for extension rom (ignore length byte!) */ rom = isa_bus_to_virt(extension_rom_resource.start); if (romsignature(rom)) { - length = extension_rom_resource.end - extension_rom_resource.start + 1; + length = resource_size(&extension_rom_resource); if (romchecksum(rom, length)) { request_resource(&iomem_resource, &extension_rom_resource); upper = extension_rom_resource.start; diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c index cf39bc0..0c68823 100644 --- a/drivers/char/bsr.c +++ b/drivers/char/bsr.c @@ -212,7 +212,7 @@ static int bsr_add_node(struct device_node *bn) cur->bsr_minor = i + total_bsr_devs; cur->bsr_addr = res.start; - cur->bsr_len = res.end - res.start + 1; + cur->bsr_len = resource_size(&res); cur->bsr_bytes = bsr_bytes[i]; cur->bsr_stride = bsr_stride[i]; cur->bsr_dev = MKDEV(bsr_major, i + total_bsr_devs); diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c index 39ccdea..e90e1c7 100644 --- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c +++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c @@ -621,7 +621,7 @@ static int __devinit hwicap_setup(struct device *dev, int id, drvdata->mem_start = regs_res->start; drvdata->mem_end = regs_res->end; - drvdata->mem_size = regs_res->end - regs_res->start + 1; + drvdata->mem_size = resource_size(regs_res); if (!request_mem_region(drvdata->mem_start, drvdata->mem_size, DRIVER_NAME)) { diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 954e334..06f9f27 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c @@ -1304,8 +1304,7 @@ static int mv_xor_shared_probe(struct platform_device *pdev) if (!res) return -ENODEV; - msp->xor_base = devm_ioremap(&pdev->dev, res->start, - res->end - res->start + 1); + msp->xor_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (!msp->xor_base) return -EBUSY; @@ -1314,7 +1313,7 @@ static int mv_xor_shared_probe(struct platform_device *pdev) return -ENODEV; msp->xor_high_base = devm_ioremap(&pdev->dev, res->start, - res->end - res->start + 1); + resource_size(res)); if (!msp->xor_high_base) return -EBUSY; diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index db1df59..9a6a274 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -140,7 +140,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) if (of_node_to_nid(np) != priv->node) continue; csrow->first_page = r.start >> PAGE_SHIFT; - csrow->nr_pages = (r.end - r.start + 1) >> PAGE_SHIFT; + csrow->nr_pages = resource_size(&r) >> PAGE_SHIFT; csrow->last_page = csrow->first_page + csrow->nr_pages - 1; csrow->mtype = MEM_XDR; csrow->edac_mode = EDAC_SECDED; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 38ab8e2..11e1a5d 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -538,15 +538,15 @@ static int __devinit mpc85xx_l2_err_probe(struct platform_device *op) /* we only need the error registers */ r.start += 0xe00; - if (!devm_request_mem_region(&op->dev, r.start, - r.end - r.start + 1, pdata->name)) { + if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), + pdata->name)) { printk(KERN_ERR "%s: Error while requesting mem region\n", __func__); res = -EBUSY; goto err; } - pdata->l2_vbase = devm_ioremap(&op->dev, r.start, r.end - r.start + 1); + pdata->l2_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); if (!pdata->l2_vbase) { printk(KERN_ERR "%s: Unable to setup L2 err regs\n", __func__); res = -ENOMEM; @@ -987,15 +987,15 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) goto err; } - if (!devm_request_mem_region(&op->dev, r.start, - r.end - r.start + 1, pdata->name)) { + if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), + pdata->name)) { printk(KERN_ERR "%s: Error while requesting mem region\n", __func__); res = -EBUSY; goto err; } - pdata->mc_vbase = devm_ioremap(&op->dev, r.start, r.end - r.start + 1); + pdata->mc_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); if (!pdata->mc_vbase) { printk(KERN_ERR "%s: Unable to setup MC err regs\n", __func__); res = -ENOMEM; diff --git a/drivers/gpio/gpio-u300.c b/drivers/gpio/gpio-u300.c index d927901..1a86fef 100644 --- a/drivers/gpio/gpio-u300.c +++ b/drivers/gpio/gpio-u300.c @@ -581,8 +581,8 @@ static int __init gpio_probe(struct platform_device *pdev) if (!memres) goto err_no_resource; - if (request_mem_region(memres->start, memres->end - memres->start, "GPIO Controller") - == NULL) { + if (!request_mem_region(memres->start, resource_size(memres), + "GPIO Controller")) { err = -ENODEV; goto err_no_ioregion; } @@ -640,7 +640,7 @@ static int __init gpio_probe(struct platform_device *pdev) free_irq(gpio_ports[i].irq, &gpio_ports[i]); iounmap(virtbase); err_no_ioremap: - release_mem_region(memres->start, memres->end - memres->start); + release_mem_region(memres->start, resource_size(memres)); err_no_ioregion: err_no_resource: clk_disable(clk); @@ -660,7 +660,7 @@ static int __exit gpio_remove(struct platform_device *pdev) for (i = 0 ; i < U300_GPIO_NUM_PORTS; i++) free_irq(gpio_ports[i].irq, &gpio_ports[i]); iounmap(virtbase); - release_mem_region(memres->start, memres->end - memres->start); + release_mem_region(memres->start, resource_size(memres)); clk_disable(clk); clk_put(clk); return 0; diff --git a/drivers/ide/palm_bk3710.c b/drivers/ide/palm_bk3710.c index 9e8f4e1..712c790 100644 --- a/drivers/ide/palm_bk3710.c +++ b/drivers/ide/palm_bk3710.c @@ -342,7 +342,7 @@ static int __init palm_bk3710_probe(struct platform_device *pdev) return -ENODEV; } - mem_size = mem->end - mem->start + 1; + mem_size = resource_size(mem); if (request_mem_region(mem->start, mem_size, "palm_bk3710") == NULL) { printk(KERN_ERR "failed to request memory region\n"); return -EBUSY; diff --git a/drivers/ide/tx4939ide.c b/drivers/ide/tx4939ide.c index bed3e39..71c2319 100644 --- a/drivers/ide/tx4939ide.c +++ b/drivers/ide/tx4939ide.c @@ -551,10 +551,10 @@ static int __init tx4939ide_probe(struct platform_device *pdev) return -ENODEV; if (!devm_request_mem_region(&pdev->dev, res->start, - res->end - res->start + 1, "tx4938ide")) + resource_size(res), "tx4938ide")) return -EBUSY; mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, - res->end - res->start + 1); + resource_size(res)); if (!mapbase) return -EBUSY; memset(&hw, 0, sizeof(hw)); diff --git a/drivers/input/serio/sa1111ps2.c b/drivers/input/serio/sa1111ps2.c index d55874e..44fc8b4 100644 --- a/drivers/input/serio/sa1111ps2.c +++ b/drivers/input/serio/sa1111ps2.c @@ -300,8 +300,7 @@ static int __devinit ps2_probe(struct sa1111_dev *dev) out: sa1111_disable_device(ps2if->dev); - release_mem_region(dev->res.start, - dev->res.end - dev->res.start + 1); + release_mem_region(dev->res.start, resource_size(&dev->res)); free: sa1111_set_drvdata(dev, NULL); kfree(ps2if); @@ -317,8 +316,7 @@ static int __devexit ps2_remove(struct sa1111_dev *dev) struct ps2if *ps2if = sa1111_get_drvdata(dev); serio_unregister_port(ps2if->io); - release_mem_region(dev->res.start, - dev->res.end - dev->res.start + 1); + release_mem_region(dev->res.start, resource_size(&dev->res)); sa1111_set_drvdata(dev, NULL); kfree(ps2if); diff --git a/drivers/media/video/davinci/vpif.c b/drivers/media/video/davinci/vpif.c index 9f3bfc1..af96802 100644 --- a/drivers/media/video/davinci/vpif.c +++ b/drivers/media/video/davinci/vpif.c @@ -422,7 +422,7 @@ static int __init vpif_probe(struct platform_device *pdev) if (!res) return -ENOENT; - res_len = res->end - res->start + 1; + res_len = resource_size(res); res = request_mem_region(res->start, res_len, res->name); if (!res) diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c index f6626e8..69b60ba 100644 --- a/drivers/media/video/omap24xxcam.c +++ b/drivers/media/video/omap24xxcam.c @@ -1768,14 +1768,13 @@ static int __devinit omap24xxcam_probe(struct platform_device *pdev) dev_err(cam->dev, "no mem resource?\n"); goto err; } - if (!request_mem_region(mem->start, (mem->end - mem->start) + 1, - pdev->name)) { + if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) { dev_err(cam->dev, "cannot reserve camera register I/O region\n"); goto err; } cam->mmio_base_phys = mem->start; - cam->mmio_size = (mem->end - mem->start) + 1; + cam->mmio_size = resource_size(mem); /* map the region */ cam->mmio_base = (unsigned long) diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c index 090d2a3..a8c08f3 100644 --- a/drivers/message/i2o/iop.c +++ b/drivers/message/i2o/iop.c @@ -681,11 +681,11 @@ static int i2o_iop_systab_set(struct i2o_controller *c) if (root && allocate_resource(root, res, sb->desired_mem_size, sb->desired_mem_size, sb->desired_mem_size, 1 << 20, /* Unspecified, so use 1Mb and play safe */ NULL, NULL) >= 0) { c->mem_alloc = 1; - sb->current_mem_size = 1 + res->end - res->start; + sb->current_mem_size = resource_size(res); sb->current_mem_base = res->start; osm_info("%s: allocated %llu bytes of PCI memory at " "0x%016llX.\n", c->name, - (unsigned long long)(1 + res->end - res->start), + (unsigned long long)resource_size(res), (unsigned long long)res->start); } } @@ -703,11 +703,11 @@ static int i2o_iop_systab_set(struct i2o_controller *c) if (root && allocate_resource(root, res, sb->desired_io_size, sb->desired_io_size, sb->desired_io_size, 1 << 20, /* Unspecified, so use 1Mb and play safe */ NULL, NULL) >= 0) { c->io_alloc = 1; - sb->current_io_size = 1 + res->end - res->start; + sb->current_io_size = resource_size(res); sb->current_mem_base = res->start; osm_info("%s: allocated %llu bytes of PCI I/O at " "0x%016llX.\n", c->name, - (unsigned long long)(1 + res->end - res->start), + (unsigned long long)resource_size(res), (unsigned long long)res->start); } } diff --git a/drivers/mfd/tc6387xb.c b/drivers/mfd/tc6387xb.c index ad715bf..71bc835 100644 --- a/drivers/mfd/tc6387xb.c +++ b/drivers/mfd/tc6387xb.c @@ -177,7 +177,7 @@ static int __devinit tc6387xb_probe(struct platform_device *dev) if (ret) goto err_resource; - tc6387xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); + tc6387xb->scr = ioremap(rscr->start, resource_size(rscr)); if (!tc6387xb->scr) { ret = -ENOMEM; goto err_ioremap; diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c index 4afffe6..769a4e8 100644 --- a/drivers/misc/atmel-ssc.c +++ b/drivers/misc/atmel-ssc.c @@ -95,7 +95,7 @@ static int __init ssc_probe(struct platform_device *pdev) } ssc->pdev = pdev; - ssc->regs = ioremap(regs->start, regs->end - regs->start + 1); + ssc->regs = ioremap(regs->start, resource_size(regs)); if (!ssc->regs) { dev_dbg(&pdev->dev, "ioremap failed\n"); retval = -EINVAL; diff --git a/drivers/misc/atmel_pwm.c b/drivers/misc/atmel_pwm.c index 0f3fb4f..28f5aaa 100644 --- a/drivers/misc/atmel_pwm.c +++ b/drivers/misc/atmel_pwm.c @@ -329,7 +329,7 @@ static int __init pwm_probe(struct platform_device *pdev) p->pdev = pdev; p->mask = *mp; p->irq = irq; - p->base = ioremap(r->start, r->end - r->start + 1); + p->base = ioremap(r->start, resource_size(r)); if (!p->base) goto fail; p->clk = clk_get(&pdev->dev, "pwm_clk"); diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 66dcddb..2a069f9 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -1595,7 +1595,7 @@ static int dw_mci_probe(struct platform_device *pdev) INIT_LIST_HEAD(&host->queue); ret = -ENOMEM; - host->regs = ioremap(regs->start, regs->end - regs->start + 1); + host->regs = ioremap(regs->start, resource_size(regs)); if (!host->regs) goto err_freehost; diff --git a/drivers/mtd/maps/bfin-async-flash.c b/drivers/mtd/maps/bfin-async-flash.c index d4297a9..67815ee 100644 --- a/drivers/mtd/maps/bfin-async-flash.c +++ b/drivers/mtd/maps/bfin-async-flash.c @@ -142,7 +142,7 @@ static int __devinit bfin_flash_probe(struct platform_device *pdev) state->map.write = bfin_flash_write; state->map.copy_to = bfin_flash_copy_to; state->map.bankwidth = pdata->width; - state->map.size = memory->end - memory->start + 1; + state->map.size = resource_size(memory); state->map.virt = (void __iomem *)memory->start; state->map.phys = memory->start; state->map.map_priv_1 = (unsigned long)state; diff --git a/drivers/mtd/maps/ixp2000.c b/drivers/mtd/maps/ixp2000.c index c00b917..1594a80 100644 --- a/drivers/mtd/maps/ixp2000.c +++ b/drivers/mtd/maps/ixp2000.c @@ -155,7 +155,7 @@ static int ixp2000_flash_probe(struct platform_device *dev) if (!plat) return -ENODEV; - window_size = dev->resource->end - dev->resource->start + 1; + window_size = resource_size(dev->resource); dev_info(&dev->dev, "Probe of IXP2000 flash(%d banks x %dMiB)\n", ixp_data->nr_banks, ((u32)window_size >> 20)); @@ -194,16 +194,17 @@ static int ixp2000_flash_probe(struct platform_device *dev) info->map.copy_to = ixp2000_flash_copy_to; info->res = request_mem_region(dev->resource->start, - dev->resource->end - dev->resource->start + 1, - dev_name(&dev->dev)); + resource_size(dev->resource), + dev_name(&dev->dev)); if (!info->res) { dev_err(&dev->dev, "Could not reserve memory region\n"); err = -ENOMEM; goto Error; } - info->map.map_priv_1 = (unsigned long) ioremap(dev->resource->start, - dev->resource->end - dev->resource->start + 1); + info->map.map_priv_1 = + (unsigned long)ioremap(dev->resource->start, + resource_size(dev->resource)); if (!info->map.map_priv_1) { dev_err(&dev->dev, "Failed to ioremap flash region\n"); err = -EIO; diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index f59d62f..7ae137d 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c @@ -70,7 +70,7 @@ static int __devinit pxa2xx_flash_probe(struct platform_device *pdev) info->map.name = (char *) flash->name; info->map.bankwidth = flash->width; info->map.phys = res->start; - info->map.size = res->end - res->start + 1; + info->map.size = resource_size(res); info->parts = flash->parts; info->nr_parts = flash->nr_parts; diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index b300705..d4ba1f2 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -513,7 +513,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) host->io_phys = (dma_addr_t)mem->start; - host->io_base = ioremap(mem->start, mem->end - mem->start + 1); + host->io_base = ioremap(mem->start, resource_size(mem)); if (host->io_base == NULL) { printk(KERN_ERR "atmel_nand: ioremap failed\n"); res = -EIO; @@ -547,7 +547,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) if (no_ecc) nand_chip->ecc.mode = NAND_ECC_NONE; if (hard_ecc && regs) { - host->ecc = ioremap(regs->start, regs->end - regs->start + 1); + host->ecc = ioremap(regs->start, resource_size(regs)); if (host->ecc == NULL) { printk(KERN_ERR "atmel_nand: ioremap failed\n"); res = -EIO; diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c index 9ec2807..8c569e4 100644 --- a/drivers/mtd/nand/bcm_umi_nand.c +++ b/drivers/mtd/nand/bcm_umi_nand.c @@ -380,7 +380,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev) return -ENXIO; /* map physical address */ - bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1); + bcm_umi_io_base = ioremap(r->start, resource_size(r)); if (!bcm_umi_io_base) { printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n"); diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c index 2f7c930..eb1fbac 100644 --- a/drivers/mtd/nand/mpc5121_nfc.c +++ b/drivers/mtd/nand/mpc5121_nfc.c @@ -713,7 +713,7 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op) } regs_paddr = res.start; - regs_size = res.end - res.start + 1; + regs_size = resource_size(&res); if (!devm_request_mem_region(dev, regs_paddr, regs_size, DRV_NAME)) { dev_err(dev, "Error requesting memory region!\n"); diff --git a/drivers/net/bcm63xx_enet.c b/drivers/net/bcm63xx_enet.c index f1573d4..85045cd 100644 --- a/drivers/net/bcm63xx_enet.c +++ b/drivers/net/bcm63xx_enet.c @@ -1646,7 +1646,7 @@ static int __devinit bcm_enet_probe(struct platform_device *pdev) if (ret) goto out; - iomem_size = res_mem->end - res_mem->start + 1; + iomem_size = resource_size(res_mem); if (!request_mem_region(res_mem->start, iomem_size, "bcm63xx_enet")) { ret = -EBUSY; goto out; @@ -1861,7 +1861,7 @@ static int __devexit bcm_enet_remove(struct platform_device *pdev) /* release device resources */ iounmap(priv->base); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); /* disable hw block clocks */ if (priv->phy_clk) { @@ -1897,7 +1897,7 @@ static int __devinit bcm_enet_shared_probe(struct platform_device *pdev) if (!res) return -ENODEV; - iomem_size = res->end - res->start + 1; + iomem_size = resource_size(res); if (!request_mem_region(res->start, iomem_size, "bcm63xx_enet_dma")) return -EBUSY; @@ -1915,7 +1915,7 @@ static int __devexit bcm_enet_shared_remove(struct platform_device *pdev) iounmap(bcm_enet_shared_base); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); return 0; } diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c index 60a49e5..f76e88e 100644 --- a/drivers/net/can/softing/softing_main.c +++ b/drivers/net/can/softing/softing_main.c @@ -799,7 +799,7 @@ static __devinit int softing_pdev_probe(struct platform_device *pdev) if (!pres) goto platform_resource_failed; card->dpram_phys = pres->start; - card->dpram_size = pres->end - pres->start + 1; + card->dpram_size = resource_size(pres); card->dpram = ioremap_nocache(card->dpram_phys, card->dpram_size); if (!card->dpram) { dev_alert(&card->pdev->dev, "dpram ioremap failed\n"); diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index dcc4a17..c35ba5f 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -1821,7 +1821,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev) } priv->emac_base_phys = res->start + pdata->ctrl_reg_offset; - size = res->end - res->start + 1; + size = resource_size(res); if (!request_mem_region(res->start, size, ndev->name)) { dev_err(&pdev->dev, "failed request_mem_region() for regs\n"); rc = -ENXIO; @@ -1926,7 +1926,7 @@ no_irq_res: cpdma_ctlr_destroy(priv->dma); no_dma: res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); iounmap(priv->remap_addr); probe_quit: @@ -1960,7 +1960,7 @@ static int __devexit davinci_emac_remove(struct platform_device *pdev) cpdma_chan_destroy(priv->rxchan); cpdma_ctlr_destroy(priv->dma); - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); unregister_netdev(ndev); iounmap(priv->remap_addr); diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c index a83dd31..15e4a71 100644 --- a/drivers/net/ethoc.c +++ b/drivers/net/ethoc.c @@ -965,7 +965,7 @@ static int __devinit ethoc_probe(struct platform_device *pdev) priv = netdev_priv(netdev); priv->netdev = netdev; priv->dma_alloc = 0; - priv->io_region_size = mmio->end - mmio->start + 1; + priv->io_region_size = resource_size(mmio); priv->iobase = devm_ioremap_nocache(&pdev->dev, netdev->base_addr, resource_size(mmio)); diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c index 9f81b1a..fe57eee 100644 --- a/drivers/net/fec_mpc52xx.c +++ b/drivers/net/fec_mpc52xx.c @@ -867,10 +867,11 @@ static int __devinit mpc52xx_fec_probe(struct platform_device *op) "Error while parsing device node resource\n" ); goto err_netdev; } - if ((mem.end - mem.start + 1) < sizeof(struct mpc52xx_fec)) { + if (resource_size(&mem) < sizeof(struct mpc52xx_fec)) { printk(KERN_ERR DRIVER_NAME - " - invalid resource size (%lx < %x), check mpc52xx_devices.c\n", - (unsigned long)(mem.end - mem.start + 1), sizeof(struct mpc52xx_fec)); + " - invalid resource size (%lx < %x), check mpc52xx_devices.c\n", + (unsigned long)resource_size(&mem), + sizeof(struct mpc52xx_fec)); rv = -EINVAL; goto err_netdev; } diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c index ad29754..b09270b 100644 --- a/drivers/net/fs_enet/mii-bitbang.c +++ b/drivers/net/fs_enet/mii-bitbang.c @@ -120,7 +120,7 @@ static int __devinit fs_mii_bitbang_init(struct mii_bus *bus, if (ret) return ret; - if (res.end - res.start < 13) + if (resource_size(&res) <= 13) return -ENODEV; /* This should really encode the pin number as well, but all @@ -139,7 +139,7 @@ static int __devinit fs_mii_bitbang_init(struct mii_bus *bus, return -ENODEV; mdc_pin = *data; - bitbang->dir = ioremap(res.start, res.end - res.start + 1); + bitbang->dir = ioremap(res.start, resource_size(&res)); if (!bitbang->dir) return -ENOMEM; diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c index 6a2e150..e0e9d6c 100644 --- a/drivers/net/fs_enet/mii-fec.c +++ b/drivers/net/fs_enet/mii-fec.c @@ -136,7 +136,7 @@ static int __devinit fs_enet_mdio_probe(struct platform_device *ofdev) snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start); - fec->fecp = ioremap(res.start, res.end - res.start + 1); + fec->fecp = ioremap(res.start, resource_size(&res)); if (!fec->fecp) goto out_fec; diff --git a/drivers/net/gianfar_ptp.c b/drivers/net/gianfar_ptp.c index d8e1753..1c97861 100644 --- a/drivers/net/gianfar_ptp.c +++ b/drivers/net/gianfar_ptp.c @@ -491,7 +491,7 @@ static int gianfar_ptp_probe(struct platform_device *dev) spin_lock_init(&etsects->lock); etsects->regs = ioremap(etsects->rsrc->start, - 1 + etsects->rsrc->end - etsects->rsrc->start); + resource_size(etsects->rsrc)); if (!etsects->regs) { pr_err("ioremap ptp registers failed\n"); goto no_ioremap; diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index 079450f..725399e 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c @@ -2770,7 +2770,7 @@ static int __devinit emac_probe(struct platform_device *ofdev) } // TODO : request_mem_region dev->emacp = ioremap(dev->rsrc_regs.start, - dev->rsrc_regs.end - dev->rsrc_regs.start + 1); + resource_size(&dev->rsrc_regs)); if (dev->emacp == NULL) { printk(KERN_ERR "%s: Can't map device registers!\n", np->full_name); diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 6c6a028..27125cd 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -1169,7 +1169,7 @@ static int __init macb_probe(struct platform_device *pdev) clk_enable(bp->hclk); #endif - bp->regs = ioremap(regs->start, regs->end - regs->start + 1); + bp->regs = ioremap(regs->start, resource_size(regs)); if (!bp->regs) { dev_err(&pdev->dev, "failed to map registers, aborting.\n"); err = -ENOMEM; diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index a5d9b1c..b756482 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c @@ -2593,7 +2593,7 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) if (msp == NULL) goto out; - msp->base = ioremap(res->start, res->end - res->start + 1); + msp->base = ioremap(res->start, resource_size(res)); if (msp->base == NULL) goto out_free; diff --git a/drivers/net/pxa168_eth.c b/drivers/net/pxa168_eth.c index 89f7540..df1292e 100644 --- a/drivers/net/pxa168_eth.c +++ b/drivers/net/pxa168_eth.c @@ -1502,7 +1502,7 @@ static int pxa168_eth_probe(struct platform_device *pdev) err = -ENODEV; goto err_netdev; } - pep->base = ioremap(res->start, res->end - res->start + 1); + pep->base = ioremap(res->start, resource_size(res)); if (pep->base == NULL) { err = -ENOMEM; goto err_netdev; diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c index 68d5042..ea65f7e 100644 --- a/drivers/net/sb1250-mac.c +++ b/drivers/net/sb1250-mac.c @@ -2597,7 +2597,7 @@ static int __devinit sbmac_probe(struct platform_device *pldev) res = platform_get_resource(pldev, IORESOURCE_MEM, 0); BUG_ON(!res); - sbm_base = ioremap_nocache(res->start, res->end - res->start + 1); + sbm_base = ioremap_nocache(res->start, resource_size(res)); if (!sbm_base) { printk(KERN_ERR "%s: unable to map device registers\n", dev_name(&pldev->dev)); diff --git a/drivers/parport/parport_ax88796.c b/drivers/parport/parport_ax88796.c index 2c5ac2b..844f613 100644 --- a/drivers/parport/parport_ax88796.c +++ b/drivers/parport/parport_ax88796.c @@ -293,7 +293,7 @@ static int parport_ax88796_probe(struct platform_device *pdev) goto exit_mem; } - size = (res->end - res->start) + 1; + size = resource_size(res); spacing = size / 3; dd->io = request_mem_region(res->start, size, pdev->name); diff --git a/drivers/pci/hotplug/shpchp_sysfs.c b/drivers/pci/hotplug/shpchp_sysfs.c index 071b7dc..efa30da 100644 --- a/drivers/pci/hotplug/shpchp_sysfs.c +++ b/drivers/pci/hotplug/shpchp_sysfs.c @@ -50,29 +50,26 @@ static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, cha pci_bus_for_each_resource(bus, res, index) { if (res && (res->flags & IORESOURCE_MEM) && !(res->flags & IORESOURCE_PREFETCH)) { - out += sprintf(out, "start = %8.8llx, " - "length = %8.8llx\n", - (unsigned long long)res->start, - (unsigned long long)(res->end - res->start)); + out += sprintf(out, "start = %8.8llx, length = %8.8llx\n", + (unsigned long long)res->start, + (unsigned long long)resource_size(res)); } } out += sprintf(out, "Free resources: prefetchable memory\n"); pci_bus_for_each_resource(bus, res, index) { if (res && (res->flags & IORESOURCE_MEM) && (res->flags & IORESOURCE_PREFETCH)) { - out += sprintf(out, "start = %8.8llx, " - "length = %8.8llx\n", - (unsigned long long)res->start, - (unsigned long long)(res->end - res->start)); + out += sprintf(out, "start = %8.8llx, length = %8.8llx\n", + (unsigned long long)res->start, + (unsigned long long)resource_size(res)); } } out += sprintf(out, "Free resources: IO\n"); pci_bus_for_each_resource(bus, res, index) { if (res && (res->flags & IORESOURCE_IO)) { - out += sprintf(out, "start = %8.8llx, " - "length = %8.8llx\n", - (unsigned long long)res->start, - (unsigned long long)(res->end - res->start)); + out += sprintf(out, "start = %8.8llx, length = %8.8llx\n", + (unsigned long long)res->start, + (unsigned long long)resource_size(res)); } } out += sprintf(out, "Free resources: bus numbers\n"); diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c index fb33fa4..4902206 100644 --- a/drivers/pcmcia/at91_cf.c +++ b/drivers/pcmcia/at91_cf.c @@ -283,8 +283,7 @@ static int __init at91_cf_probe(struct platform_device *pdev) } /* reserve chip-select regions */ - if (!request_mem_region(io->start, io->end + 1 - io->start, - driver_name)) { + if (!request_mem_region(io->start, resource_size(io), driver_name)) { status = -ENXIO; goto fail1; } @@ -308,7 +307,7 @@ static int __init at91_cf_probe(struct platform_device *pdev) return 0; fail2: - release_mem_region(io->start, io->end + 1 - io->start); + release_mem_region(io->start, resource_size(io)); fail1: if (cf->socket.io_offset) iounmap((void __iomem *) cf->socket.io_offset); @@ -339,7 +338,7 @@ static int __exit at91_cf_remove(struct platform_device *pdev) struct resource *io = cf->socket.io[0].res; pcmcia_unregister_socket(&cf->socket); - release_mem_region(io->start, io->end + 1 - io->start); + release_mem_region(io->start, resource_size(io)); iounmap((void __iomem *) cf->socket.io_offset); if (board->irq_pin) { free_irq(board->irq_pin, cf); diff --git a/drivers/pcmcia/electra_cf.c b/drivers/pcmcia/electra_cf.c index 6defd4a..06ad3e5 100644 --- a/drivers/pcmcia/electra_cf.c +++ b/drivers/pcmcia/electra_cf.c @@ -209,9 +209,9 @@ static int __devinit electra_cf_probe(struct platform_device *ofdev) cf->ofdev = ofdev; cf->mem_phys = mem.start; - cf->mem_size = PAGE_ALIGN(mem.end - mem.start); + cf->mem_size = PAGE_ALIGN(resource_size(&mem)); cf->mem_base = ioremap(cf->mem_phys, cf->mem_size); - cf->io_size = PAGE_ALIGN(io.end - io.start); + cf->io_size = PAGE_ALIGN(resource_size(&io)); area = __get_vm_area(cf->io_size, 0, PHB_IO_BASE, PHB_IO_END); if (area == NULL) diff --git a/drivers/pcmcia/rsrc_iodyn.c b/drivers/pcmcia/rsrc_iodyn.c index 523eb69..f53c237 100644 --- a/drivers/pcmcia/rsrc_iodyn.c +++ b/drivers/pcmcia/rsrc_iodyn.c @@ -135,7 +135,7 @@ static int iodyn_find_io(struct pcmcia_socket *s, unsigned int attr, try = res->end + 1; if ((*base == 0) || (*base == try)) { if (adjust_resource(s->io[i].res, res->start, - res->end - res->start + num + 1)) + resource_size(res) + num)) continue; *base = try; s->io[i].InUse += num; @@ -147,8 +147,8 @@ static int iodyn_find_io(struct pcmcia_socket *s, unsigned int attr, try = res->start - num; if ((*base == 0) || (*base == try)) { if (adjust_resource(s->io[i].res, - res->start - num, - res->end - res->start + num + 1)) + res->start - num, + resource_size(res) + num)) continue; *base = try; s->io[i].InUse += num; diff --git a/drivers/pcmcia/rsrc_nonstatic.c b/drivers/pcmcia/rsrc_nonstatic.c index b187555..9da9656 100644 --- a/drivers/pcmcia/rsrc_nonstatic.c +++ b/drivers/pcmcia/rsrc_nonstatic.c @@ -770,7 +770,7 @@ static int nonstatic_find_io(struct pcmcia_socket *s, unsigned int attr, res->end + num); if (!ret) { ret = adjust_resource(s->io[i].res, res->start, - res->end - res->start + num + 1); + resource_size(res) + num); if (ret) continue; *base = try; @@ -788,8 +788,8 @@ static int nonstatic_find_io(struct pcmcia_socket *s, unsigned int attr, res->end); if (!ret) { ret = adjust_resource(s->io[i].res, - res->start - num, - res->end - res->start + num + 1); + res->start - num, + resource_size(res) + num); if (ret) continue; *base = try; diff --git a/drivers/pnp/pnpacpi/rsparser.c b/drivers/pnp/pnpacpi/rsparser.c index 100e4d9..1a6937d9 100644 --- a/drivers/pnp/pnpacpi/rsparser.c +++ b/drivers/pnp/pnpacpi/rsparser.c @@ -1018,7 +1018,7 @@ static void pnpacpi_encode_io(struct pnp_dev *dev, io->minimum = p->start; io->maximum = p->end; io->alignment = 0; /* Correct? */ - io->address_length = p->end - p->start + 1; + io->address_length = resource_size(p); } else { io->minimum = 0; io->address_length = 0; @@ -1036,7 +1036,7 @@ static void pnpacpi_encode_fixed_io(struct pnp_dev *dev, if (pnp_resource_enabled(p)) { fixed_io->address = p->start; - fixed_io->address_length = p->end - p->start + 1; + fixed_io->address_length = resource_size(p); } else { fixed_io->address = 0; fixed_io->address_length = 0; @@ -1059,7 +1059,7 @@ static void pnpacpi_encode_mem24(struct pnp_dev *dev, memory24->minimum = p->start; memory24->maximum = p->end; memory24->alignment = 0; - memory24->address_length = p->end - p->start + 1; + memory24->address_length = resource_size(p); } else { memory24->minimum = 0; memory24->address_length = 0; @@ -1083,7 +1083,7 @@ static void pnpacpi_encode_mem32(struct pnp_dev *dev, memory32->minimum = p->start; memory32->maximum = p->end; memory32->alignment = 0; - memory32->address_length = p->end - p->start + 1; + memory32->address_length = resource_size(p); } else { memory32->minimum = 0; memory32->alignment = 0; @@ -1106,7 +1106,7 @@ static void pnpacpi_encode_fixed_mem32(struct pnp_dev *dev, p->flags & IORESOURCE_MEM_WRITEABLE ? ACPI_READ_WRITE_MEMORY : ACPI_READ_ONLY_MEMORY; fixed_memory32->address = p->start; - fixed_memory32->address_length = p->end - p->start + 1; + fixed_memory32->address_length = resource_size(p); } else { fixed_memory32->address = 0; fixed_memory32->address_length = 0; diff --git a/drivers/pnp/pnpbios/rsparser.c b/drivers/pnp/pnpbios/rsparser.c index cb1f47b..cca2f9f 100644 --- a/drivers/pnp/pnpbios/rsparser.c +++ b/drivers/pnp/pnpbios/rsparser.c @@ -505,7 +505,7 @@ static void pnpbios_encode_mem(struct pnp_dev *dev, unsigned char *p, if (pnp_resource_enabled(res)) { base = res->start; - len = res->end - res->start + 1; + len = resource_size(res); } else { base = 0; len = 0; @@ -529,7 +529,7 @@ static void pnpbios_encode_mem32(struct pnp_dev *dev, unsigned char *p, if (pnp_resource_enabled(res)) { base = res->start; - len = res->end - res->start + 1; + len = resource_size(res); } else { base = 0; len = 0; @@ -559,7 +559,7 @@ static void pnpbios_encode_fixed_mem32(struct pnp_dev *dev, unsigned char *p, if (pnp_resource_enabled(res)) { base = res->start; - len = res->end - res->start + 1; + len = resource_size(res); } else { base = 0; len = 0; @@ -617,7 +617,7 @@ static void pnpbios_encode_port(struct pnp_dev *dev, unsigned char *p, if (pnp_resource_enabled(res)) { base = res->start; - len = res->end - res->start + 1; + len = resource_size(res); } else { base = 0; len = 0; @@ -636,11 +636,11 @@ static void pnpbios_encode_fixed_port(struct pnp_dev *dev, unsigned char *p, struct resource *res) { unsigned long base = res->start; - unsigned long len = res->end - res->start + 1; + unsigned long len = resource_size(res); if (pnp_resource_enabled(res)) { base = res->start; - len = res->end - res->start + 1; + len = resource_size(res); } else { base = 0; len = 0; diff --git a/drivers/rtc/rtc-at32ap700x.c b/drivers/rtc/rtc-at32ap700x.c index e725d51..8dd0830 100644 --- a/drivers/rtc/rtc-at32ap700x.c +++ b/drivers/rtc/rtc-at32ap700x.c @@ -223,7 +223,7 @@ static int __init at32_rtc_probe(struct platform_device *pdev) } rtc->irq = irq; - rtc->regs = ioremap(regs->start, regs->end - regs->start + 1); + rtc->regs = ioremap(regs->start, resource_size(regs)); if (!rtc->regs) { ret = -ENOMEM; dev_dbg(&pdev->dev, "could not map I/O memory\n"); diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c index 911e75c..05beb6c 100644 --- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c @@ -606,7 +606,7 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) * (needing ioremap etc), not i/o space resources like this ... */ ports = request_region(ports->start, - ports->end + 1 - ports->start, + resource_size(ports), driver_name); if (!ports) { dev_dbg(dev, "i/o registers already in use\n"); @@ -750,7 +750,7 @@ cleanup1: cmos_rtc.dev = NULL; rtc_device_unregister(cmos_rtc.rtc); cleanup0: - release_region(ports->start, ports->end + 1 - ports->start); + release_region(ports->start, resource_size(ports)); return retval; } @@ -779,7 +779,7 @@ static void __exit cmos_do_remove(struct device *dev) cmos->rtc = NULL; ports = cmos->iomem; - release_region(ports->start, ports->end + 1 - ports->start); + release_region(ports->start, resource_size(ports)); cmos->iomem = NULL; cmos->dev = NULL; diff --git a/drivers/rtc/rtc-ds1286.c b/drivers/rtc/rtc-ds1286.c index 47e681d..68e6caf 100644 --- a/drivers/rtc/rtc-ds1286.c +++ b/drivers/rtc/rtc-ds1286.c @@ -343,7 +343,7 @@ static int __devinit ds1286_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->size = res->end - res->start + 1; + priv->size = resource_size(res); if (!request_mem_region(res->start, priv->size, pdev->name)) { ret = -EBUSY; goto out; diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c index fbabc77..568ad30 100644 --- a/drivers/rtc/rtc-ds1511.c +++ b/drivers/rtc/rtc-ds1511.c @@ -490,7 +490,7 @@ ds1511_rtc_probe(struct platform_device *pdev) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; - pdata->size = res->end - res->start + 1; + pdata->size = resource_size(res); if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size, pdev->name)) return -EBUSY; diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c index 042630c..d84a448d 100644 --- a/drivers/rtc/rtc-ds1742.c +++ b/drivers/rtc/rtc-ds1742.c @@ -173,7 +173,7 @@ static int __devinit ds1742_rtc_probe(struct platform_device *pdev) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; - pdata->size = res->end - res->start + 1; + pdata->size = resource_size(res); if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size, pdev->name)) return -EBUSY; diff --git a/drivers/rtc/rtc-m48t35.c b/drivers/rtc/rtc-m48t35.c index 7410875..8e2a24e 100644 --- a/drivers/rtc/rtc-m48t35.c +++ b/drivers/rtc/rtc-m48t35.c @@ -154,7 +154,7 @@ static int __devinit m48t35_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->size = res->end - res->start + 1; + priv->size = resource_size(res); /* * kludge: remove the #ifndef after ioc3 resource * conflicts are resolved diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c index 3978f4c..2836538 100644 --- a/drivers/rtc/rtc-m48t59.c +++ b/drivers/rtc/rtc-m48t59.c @@ -433,7 +433,7 @@ static int __devinit m48t59_rtc_probe(struct platform_device *pdev) if (!m48t59->ioaddr) { /* ioaddr not mapped externally */ - m48t59->ioaddr = ioremap(res->start, res->end - res->start + 1); + m48t59->ioaddr = ioremap(res->start, resource_size(res)); if (!m48t59->ioaddr) goto out; } diff --git a/drivers/rtc/rtc-mrst.c b/drivers/rtc/rtc-mrst.c index 0cec565..d335448 100644 --- a/drivers/rtc/rtc-mrst.c +++ b/drivers/rtc/rtc-mrst.c @@ -332,9 +332,8 @@ vrtc_mrst_do_probe(struct device *dev, struct resource *iomem, int rtc_irq) if (!iomem) return -ENODEV; - iomem = request_mem_region(iomem->start, - iomem->end + 1 - iomem->start, - driver_name); + iomem = request_mem_region(iomem->start, resource_size(iomem), + driver_name); if (!iomem) { dev_dbg(dev, "i/o mem already in use.\n"); return -EBUSY; diff --git a/drivers/rtc/rtc-puv3.c b/drivers/rtc/rtc-puv3.c index 46f14b8..b3eba3c 100644 --- a/drivers/rtc/rtc-puv3.c +++ b/drivers/rtc/rtc-puv3.c @@ -267,9 +267,8 @@ static int puv3_rtc_probe(struct platform_device *pdev) return -ENOENT; } - puv3_rtc_mem = request_mem_region(res->start, - res->end-res->start+1, - pdev->name); + puv3_rtc_mem = request_mem_region(res->start, resource_size(res), + pdev->name); if (puv3_rtc_mem == NULL) { dev_err(&pdev->dev, "failed to reserve memory region\n"); diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 16512ec..2a65e85 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -455,8 +455,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) return -ENOENT; } - s3c_rtc_mem = request_mem_region(res->start, - res->end-res->start+1, + s3c_rtc_mem = request_mem_region(res->start, resource_size(res), pdev->name); if (s3c_rtc_mem == NULL) { @@ -465,7 +464,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) goto err_nores; } - s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); + s3c_rtc_base = ioremap(res->start, resource_size(res)); if (s3c_rtc_base == NULL) { dev_err(&pdev->dev, "failed ioremap()\n"); ret = -EINVAL; diff --git a/drivers/staging/generic_serial/ser_a2232.c b/drivers/staging/generic_serial/ser_a2232.c index 3f47c2e..0c08e1c 100644 --- a/drivers/staging/generic_serial/ser_a2232.c +++ b/drivers/staging/generic_serial/ser_a2232.c @@ -746,7 +746,8 @@ static int __init a2232board_init(void) zd_a2232[nr_a2232] = z; boardaddr = ZTWO_VADDR( z->resource.start ); - printk("Board is located at address 0x%x, size is 0x%x.\n", boardaddr, (unsigned int) ((z->resource.end+1) - (z->resource.start))); + printk("Board is located at address 0x%x, size is 0x%x\n", + boardaddr, (unsigned int)resource_size(&z->resource)); mem = (volatile struct a2232memory *) boardaddr; diff --git a/drivers/staging/gma500/psb_gtt.c b/drivers/staging/gma500/psb_gtt.c index 74c5a65..280f9d4 100644 --- a/drivers/staging/gma500/psb_gtt.c +++ b/drivers/staging/gma500/psb_gtt.c @@ -80,7 +80,7 @@ static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r) { struct drm_psb_private *dev_priv = dev->dev_private; u32 *gtt_slot, pte; - int numpages = (r->resource.end + 1 - r->resource.start) >> PAGE_SHIFT; + int numpages = resource_size(&r->resource) >> PAGE_SHIFT; struct page **pages; int i; @@ -121,7 +121,7 @@ static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r) { struct drm_psb_private *dev_priv = dev->dev_private; u32 *gtt_slot, pte; - int numpages = (r->resource.end + 1 - r->resource.start) >> PAGE_SHIFT; + int numpages = resource_size(&r->resource) >> PAGE_SHIFT; int i; WARN_ON(r->stolen); @@ -149,7 +149,7 @@ static int psb_gtt_attach_pages(struct gtt_range *gt) struct address_space *mapping; int i; struct page *p; - int pages = (gt->resource.end + 1 - gt->resource.start) >> PAGE_SHIFT; + int pages = resource_size(>->resource) >> PAGE_SHIFT; WARN_ON(gt->pages); @@ -191,7 +191,7 @@ err: static void psb_gtt_detach_pages(struct gtt_range *gt) { int i; - int pages = (gt->resource.end + 1 - gt->resource.start) >> PAGE_SHIFT; + int pages = resource_size(>->resource) >> PAGE_SHIFT; for (i = 0; i < pages; i++) { /* FIXME: do we need to force dirty */ diff --git a/drivers/tty/serial/bfin_5xx.c b/drivers/tty/serial/bfin_5xx.c index 9b1ff2b..ff69791 100644 --- a/drivers/tty/serial/bfin_5xx.c +++ b/drivers/tty/serial/bfin_5xx.c @@ -1304,8 +1304,7 @@ static int bfin_serial_probe(struct platform_device *pdev) goto out_error_free_peripherals; } - uart->port.membase = ioremap(res->start, - res->end - res->start); + uart->port.membase = ioremap(res->start, resource_size(res)); if (!uart->port.membase) { dev_err(&pdev->dev, "Cannot map uart IO\n"); ret = -ENXIO; @@ -1483,7 +1482,7 @@ static int bfin_earlyprintk_probe(struct platform_device *pdev) } bfin_earlyprintk_port.port.membase = ioremap(res->start, - res->end - res->start); + resource_size(res)); if (!bfin_earlyprintk_port.port.membase) { dev_err(&pdev->dev, "Cannot map uart IO\n"); ret = -ENXIO; diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index a544731..22fe801 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -954,7 +954,7 @@ static void imx_release_port(struct uart_port *port) struct resource *mmres; mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(mmres->start, mmres->end - mmres->start + 1); + release_mem_region(mmres->start, resource_size(mmres)); } /* @@ -970,8 +970,7 @@ static int imx_request_port(struct uart_port *port) if (!mmres) return -ENODEV; - ret = request_mem_region(mmres->start, mmres->end - mmres->start + 1, - "imx-uart"); + ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart"); return ret ? 0 : -EBUSY; } diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c index 84db732..8e07517 100644 --- a/drivers/tty/serial/m32r_sio.c +++ b/drivers/tty/serial/m32r_sio.c @@ -892,7 +892,7 @@ static int m32r_sio_request_port(struct uart_port *port) * If we have a mapbase, then request that as well. */ if (ret == 0 && up->port.flags & UPF_IOREMAP) { - int size = res->end - res->start + 1; + int size = resource_size(res); up->port.membase = ioremap(up->port.mapbase, size); if (!up->port.membase) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 47cadf4..c37df8d 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -1241,8 +1241,8 @@ static int serial_omap_probe(struct platform_device *pdev) return -ENODEV; } - if (!request_mem_region(mem->start, (mem->end - mem->start) + 1, - pdev->dev.driver->name)) { + if (!request_mem_region(mem->start, resource_size(mem), + pdev->dev.driver->name)) { dev_err(&pdev->dev, "memory region already claimed\n"); return -EBUSY; } @@ -1308,7 +1308,7 @@ err: dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", pdev->id, __func__, ret); do_release_region: - release_mem_region(mem->start, (mem->end - mem->start) + 1); + release_mem_region(mem->start, resource_size(mem)); return ret; } diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c index 4302e6e..531931c 100644 --- a/drivers/tty/serial/pxa.c +++ b/drivers/tty/serial/pxa.c @@ -803,7 +803,7 @@ static int serial_pxa_probe(struct platform_device *dev) break; } - sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1); + sport->port.membase = ioremap(mmres->start, resource_size(mmres)); if (!sport->port.membase) { ret = -ENOMEM; goto err_clk; diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c index 92aa545..ad0f8f5 100644 --- a/drivers/tty/serial/sunsu.c +++ b/drivers/tty/serial/sunsu.c @@ -1435,7 +1435,7 @@ static int __devinit su_probe(struct platform_device *op) rp = &op->resource[0]; up->port.mapbase = rp->start; - up->reg_size = (rp->end - rp->start) + 1; + up->reg_size = resource_size(rp); up->port.membase = of_ioremap(rp, 0, up->reg_size, "su"); if (!up->port.membase) { if (type != SU_PORT_PORT) diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c index 37fc4e3..026cb9e 100644 --- a/drivers/tty/serial/vt8500_serial.c +++ b/drivers/tty/serial/vt8500_serial.c @@ -573,8 +573,7 @@ static int __init vt8500_serial_probe(struct platform_device *pdev) snprintf(vt8500_port->name, sizeof(vt8500_port->name), "VT8500 UART%d", pdev->id); - vt8500_port->uart.membase = ioremap(mmres->start, - mmres->end - mmres->start + 1); + vt8500_port->uart.membase = ioremap(mmres->start, resource_size(mmres)); if (!vt8500_port->uart.membase) { ret = -ENOMEM; goto err; diff --git a/drivers/uio/uio_pdrv.c b/drivers/uio/uio_pdrv.c index 7d3e469..bdc3db9 100644 --- a/drivers/uio/uio_pdrv.c +++ b/drivers/uio/uio_pdrv.c @@ -58,7 +58,7 @@ static int uio_pdrv_probe(struct platform_device *pdev) uiomem->memtype = UIO_MEM_PHYS; uiomem->addr = r->start; - uiomem->size = r->end - r->start + 1; + uiomem->size = resource_size(r); ++uiomem; } diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c index 0f424af..31e799d 100644 --- a/drivers/uio/uio_pdrv_genirq.c +++ b/drivers/uio/uio_pdrv_genirq.c @@ -137,7 +137,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) uiomem->memtype = UIO_MEM_PHYS; uiomem->addr = r->start; - uiomem->size = r->end - r->start + 1; + uiomem->size = resource_size(r); ++uiomem; } diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index db1a659..f045c89 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -272,7 +272,7 @@ static void usba_init_debugfs(struct usba_udc *udc) regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); - regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; + regs->d_inode->i_size = resource_size(regs_resource); udc->debugfs_regs = regs; usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c index 2cd9a60..9c8e56f 100644 --- a/drivers/usb/gadget/fsl_udc_core.c +++ b/drivers/usb/gadget/fsl_udc_core.c @@ -2445,7 +2445,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev) } if (pdata->operating_mode == FSL_USB2_DR_DEVICE) { - if (!request_mem_region(res->start, res->end - res->start + 1, + if (!request_mem_region(res->start, resource_size(res), driver_name)) { ERR("request mem region for %s failed\n", pdev->name); ret = -EBUSY; @@ -2593,7 +2593,7 @@ err_iounmap_noclk: iounmap(dr_regs); err_release_mem_region: if (pdata->operating_mode == FSL_USB2_DR_DEVICE) - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); err_kfree: kfree(udc_controller); udc_controller = NULL; @@ -2628,7 +2628,7 @@ static int __exit fsl_udc_remove(struct platform_device *pdev) free_irq(udc_controller->irq, udc_controller); iounmap(dr_regs); if (pdata->operating_mode == FSL_USB2_DR_DEVICE) - release_mem_region(res->start, res->end - res->start + 1); + release_mem_region(res->start, resource_size(res)); device_unregister(&udc_controller->gadget.dev); /* free udc --wait for the release() finished */ diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c index 98cc8a1..eab3d70 100644 --- a/drivers/usb/host/ehci-ath79.c +++ b/drivers/usb/host/ehci-ath79.c @@ -146,7 +146,7 @@ static int ehci_ath79_probe(struct platform_device *pdev) return -ENOMEM; hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { dev_dbg(&pdev->dev, "controller already in use\n"); diff --git a/drivers/usb/host/ehci-cns3xxx.c b/drivers/usb/host/ehci-cns3xxx.c index d41745c..6536abd 100644 --- a/drivers/usb/host/ehci-cns3xxx.c +++ b/drivers/usb/host/ehci-cns3xxx.c @@ -107,7 +107,7 @@ static int cns3xxx_ehci_probe(struct platform_device *pdev) } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, driver->description)) { diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index f380bf9..34a3140 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -100,7 +100,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, goto err2; } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, driver->description)) { dev_dbg(&pdev->dev, "controller already in use\n"); diff --git a/drivers/usb/host/ehci-grlib.c b/drivers/usb/host/ehci-grlib.c index 93b230d..fdfd8c5 100644 --- a/drivers/usb/host/ehci-grlib.c +++ b/drivers/usb/host/ehci-grlib.c @@ -130,7 +130,7 @@ static int __devinit ehci_hcd_grlib_probe(struct platform_device *op) return -ENOMEM; hcd->rsrc_start = res.start; - hcd->rsrc_len = res.end - res.start + 1; + hcd->rsrc_len = resource_size(&res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/ehci-ixp4xx.c b/drivers/usb/host/ehci-ixp4xx.c index 50e600d..c4460f3 100644 --- a/drivers/usb/host/ehci-ixp4xx.c +++ b/drivers/usb/host/ehci-ixp4xx.c @@ -100,7 +100,7 @@ static int ixp4xx_ehci_probe(struct platform_device *pdev) goto fail_request_resource; } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, driver->description)) { diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c index ff55757..c3ba3ed 100644 --- a/drivers/usb/host/ehci-octeon.c +++ b/drivers/usb/host/ehci-octeon.c @@ -124,7 +124,7 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev) return -ENOMEM; hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = res_mem->end - res_mem->start + 1; + hcd->rsrc_len = resource_size(res_mem); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, OCTEON_EHCI_HCD_NAME)) { diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c index cd69099..e8d54de 100644 --- a/drivers/usb/host/ehci-pmcmsp.c +++ b/drivers/usb/host/ehci-pmcmsp.c @@ -124,7 +124,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (res == NULL) return -ENOMEM; - res_len = res->end - res->start + 1; + res_len = resource_size(res); if (!request_mem_region(res->start, res_len, "mab regs")) return -EBUSY; @@ -140,7 +140,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) retval = -ENOMEM; goto err2; } - res_len = res->end - res->start + 1; + res_len = resource_size(res); if (!request_mem_region(res->start, res_len, "usbid regs")) { retval = -EBUSY; goto err2; @@ -154,13 +154,13 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) return 0; err3: res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - res_len = res->end - res->start + 1; + res_len = resource_size(res); release_mem_region(res->start, res_len); err2: iounmap(dev->mab_regs); err1: res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - res_len = res->end - res->start + 1; + res_len = resource_size(res); release_mem_region(res->start, res_len); dev_err(&pdev->dev, "Failed to map non-EHCI regs.\n"); return retval; @@ -194,7 +194,7 @@ int usb_hcd_msp_probe(const struct hc_driver *driver, goto err1; } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, dev->name)) { retval = -EBUSY; goto err1; diff --git a/drivers/usb/host/ehci-ppc-of.c b/drivers/usb/host/ehci-ppc-of.c index 8552db6..41d11fe 100644 --- a/drivers/usb/host/ehci-ppc-of.c +++ b/drivers/usb/host/ehci-ppc-of.c @@ -130,7 +130,7 @@ static int __devinit ehci_hcd_ppc_of_probe(struct platform_device *op) return -ENOMEM; hcd->rsrc_start = res.start; - hcd->rsrc_len = res.end - res.start + 1; + hcd->rsrc_len = resource_size(&res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c index 52a027a..d661cf7 100644 --- a/drivers/usb/host/ehci-w90x900.c +++ b/drivers/usb/host/ehci-w90x900.c @@ -41,7 +41,7 @@ static int __devinit usb_w90x900_probe(const struct hc_driver *driver, } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { retval = -EBUSY; diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c index a64d6d6..32793ce 100644 --- a/drivers/usb/host/ehci-xilinx-of.c +++ b/drivers/usb/host/ehci-xilinx-of.c @@ -174,7 +174,7 @@ static int __devinit ehci_hcd_xilinx_of_probe(struct platform_device *op) return -ENOMEM; hcd->rsrc_start = res.start; - hcd->rsrc_len = res.end - res.start + 1; + hcd->rsrc_len = resource_size(&res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c index 19223c7..572ea53 100644 --- a/drivers/usb/host/fhci-hcd.c +++ b/drivers/usb/host/fhci-hcd.c @@ -605,7 +605,7 @@ static int __devinit of_fhci_probe(struct platform_device *ofdev) goto err_regs; } - hcd->regs = ioremap(usb_regs.start, usb_regs.end - usb_regs.start + 1); + hcd->regs = ioremap(usb_regs.start, resource_size(&usb_regs)); if (!hcd->regs) { dev_err(dev, "could not ioremap regs\n"); ret = -ENOMEM; diff --git a/drivers/usb/host/ohci-ath79.c b/drivers/usb/host/ohci-ath79.c index ffea3e7..c620c50 100644 --- a/drivers/usb/host/ohci-ath79.c +++ b/drivers/usb/host/ohci-ath79.c @@ -93,8 +93,8 @@ static int ohci_ath79_probe(struct platform_device *pdev) ret = -ENODEV; goto err_put_hcd; } - hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_start = res->start; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { dev_dbg(&pdev->dev, "controller already in use\n"); diff --git a/drivers/usb/host/ohci-cns3xxx.c b/drivers/usb/host/ohci-cns3xxx.c index f05ef87..5a00a1e 100644 --- a/drivers/usb/host/ohci-cns3xxx.c +++ b/drivers/usb/host/ohci-cns3xxx.c @@ -100,7 +100,7 @@ static int cns3xxx_ohci_probe(struct platform_device *pdev) goto err1; } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, driver->description)) { diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c index d22fb4d..6aca2c4 100644 --- a/drivers/usb/host/ohci-da8xx.c +++ b/drivers/usb/host/ohci-da8xx.c @@ -322,7 +322,7 @@ static int usb_hcd_da8xx_probe(const struct hc_driver *driver, goto err2; } hcd->rsrc_start = mem->start; - hcd->rsrc_len = mem->end - mem->start + 1; + hcd->rsrc_len = resource_size(mem); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { dev_dbg(&pdev->dev, "request_mem_region failed\n"); diff --git a/drivers/usb/host/ohci-octeon.c b/drivers/usb/host/ohci-octeon.c index e4ddfaf..d8b4564 100644 --- a/drivers/usb/host/ohci-octeon.c +++ b/drivers/usb/host/ohci-octeon.c @@ -135,7 +135,7 @@ static int ohci_octeon_drv_probe(struct platform_device *pdev) return -ENOMEM; hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = res_mem->end - res_mem->start + 1; + hcd->rsrc_len = resource_size(res_mem); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, OCTEON_OHCI_HCD_NAME)) { diff --git a/drivers/usb/host/ohci-ppc-of.c b/drivers/usb/host/ohci-ppc-of.c index 1ca1821..0c12f4e 100644 --- a/drivers/usb/host/ohci-ppc-of.c +++ b/drivers/usb/host/ohci-ppc-of.c @@ -110,7 +110,7 @@ static int __devinit ohci_hcd_ppc_of_probe(struct platform_device *op) return -ENOMEM; hcd->rsrc_start = res.start; - hcd->rsrc_len = res.end - res.start + 1; + hcd->rsrc_len = resource_size(&res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/ohci-ppc-soc.c b/drivers/usb/host/ohci-ppc-soc.c index 89e670e..c0f595c 100644 --- a/drivers/usb/host/ohci-ppc-soc.c +++ b/drivers/usb/host/ohci-ppc-soc.c @@ -56,7 +56,7 @@ static int usb_hcd_ppc_soc_probe(const struct hc_driver *driver, if (!hcd) return -ENOMEM; hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { pr_debug("%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c index d8eb3bd..4204d972 100644 --- a/drivers/usb/host/ohci-sa1111.c +++ b/drivers/usb/host/ohci-sa1111.c @@ -131,7 +131,7 @@ int usb_hcd_sa1111_probe (const struct hc_driver *driver, if (!hcd) return -ENOMEM; hcd->rsrc_start = dev->res.start; - hcd->rsrc_len = dev->res.end - dev->res.start + 1; + hcd->rsrc_len = resource_size(&dev->res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { dbg("request_mem_region failed"); diff --git a/drivers/usb/host/ohci-sm501.c b/drivers/usb/host/ohci-sm501.c index 041d30f30..78918ca 100644 --- a/drivers/usb/host/ohci-sm501.c +++ b/drivers/usb/host/ohci-sm501.c @@ -103,8 +103,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) goto err0; } - if (!request_mem_region(mem->start, mem->end - mem->start + 1, - pdev->name)) { + if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) { dev_err(dev, "request_mem_region failed\n"); retval = -EBUSY; goto err0; @@ -126,7 +125,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) if (!dma_declare_coherent_memory(dev, mem->start, mem->start - mem->parent->start, - (mem->end - mem->start) + 1, + resource_size(mem), DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) { dev_err(dev, "cannot declare coherent memory\n"); @@ -149,7 +148,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) } hcd->rsrc_start = res->start; - hcd->rsrc_len = res->end - res->start + 1; + hcd->rsrc_len = resource_size(res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, pdev->name)) { dev_err(dev, "request_mem_region failed\n"); @@ -185,7 +184,7 @@ err3: err2: dma_release_declared_memory(dev); err1: - release_mem_region(mem->start, mem->end - mem->start + 1); + release_mem_region(mem->start, resource_size(mem)); err0: return retval; } @@ -201,7 +200,7 @@ static int ohci_hcd_sm501_drv_remove(struct platform_device *pdev) dma_release_declared_memory(&pdev->dev); mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (mem) - release_mem_region(mem->start, mem->end - mem->start + 1); + release_mem_region(mem->start, resource_size(mem)); /* mask interrupts and disable power */ diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c index 3558491..57ad127 100644 --- a/drivers/usb/host/ohci-tmio.c +++ b/drivers/usb/host/ohci-tmio.c @@ -208,13 +208,13 @@ static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev) } hcd->rsrc_start = regs->start; - hcd->rsrc_len = regs->end - regs->start + 1; + hcd->rsrc_len = resource_size(regs); tmio = hcd_to_tmio(hcd); spin_lock_init(&tmio->lock); - tmio->ccr = ioremap(config->start, config->end - config->start + 1); + tmio->ccr = ioremap(config->start, resource_size(config)); if (!tmio->ccr) { ret = -ENOMEM; goto err_ioremap_ccr; @@ -228,7 +228,7 @@ static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev) if (!dma_declare_coherent_memory(&dev->dev, sram->start, sram->start, - sram->end - sram->start + 1, + resource_size(sram), DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) { ret = -EBUSY; goto err_dma_declare; diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c index 5fbe997..dcd8898 100644 --- a/drivers/usb/host/oxu210hp-hcd.c +++ b/drivers/usb/host/oxu210hp-hcd.c @@ -3828,7 +3828,7 @@ static int oxu_drv_probe(struct platform_device *pdev) return -ENODEV; } memstart = res->start; - memlen = res->end - res->start + 1; + memlen = resource_size(res); dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen); if (!request_mem_region(memstart, memlen, oxu_hc_driver.description)) { diff --git a/drivers/usb/host/uhci-grlib.c b/drivers/usb/host/uhci-grlib.c index d01c1e2..f7a6213 100644 --- a/drivers/usb/host/uhci-grlib.c +++ b/drivers/usb/host/uhci-grlib.c @@ -111,7 +111,7 @@ static int __devinit uhci_hcd_grlib_probe(struct platform_device *op) return -ENOMEM; hcd->rsrc_start = res.start; - hcd->rsrc_len = res.end - res.start + 1; + hcd->rsrc_len = resource_size(&res); if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); diff --git a/drivers/usb/host/whci/init.c b/drivers/usb/host/whci/init.c index f7582e8..d3e13b6 100644 --- a/drivers/usb/host/whci/init.c +++ b/drivers/usb/host/whci/init.c @@ -178,7 +178,7 @@ void whc_clean_up(struct whc *whc) if (whc->qset_pool) dma_pool_destroy(whc->qset_pool); - len = whc->umc->resource.end - whc->umc->resource.start + 1; + len = resource_size(&whc->umc->resource); if (whc->base) iounmap(whc->base); if (whc->base_phys) diff --git a/drivers/uwb/whc-rc.c b/drivers/uwb/whc-rc.c index 70a004a..3ae3c70 100644 --- a/drivers/uwb/whc-rc.c +++ b/drivers/uwb/whc-rc.c @@ -222,7 +222,7 @@ int whcrc_setup_rc_umc(struct whcrc *whcrc) struct umc_dev *umc_dev = whcrc->umc_dev; whcrc->area = umc_dev->resource.start; - whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1; + whcrc->rc_len = resource_size(&umc_dev->resource); result = -EBUSY; if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) { dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n", diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 4484c72..817ab60 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -906,7 +906,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) if (map) { /* use a pre-allocated memory buffer */ info->fix.smem_start = map->start; - info->fix.smem_len = map->end - map->start + 1; + info->fix.smem_len = resource_size(map); if (!request_mem_region(info->fix.smem_start, info->fix.smem_len, pdev->name)) { ret = -EBUSY; @@ -932,7 +932,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) /* LCDC registers */ info->fix.mmio_start = regs->start; - info->fix.mmio_len = regs->end - regs->start + 1; + info->fix.mmio_len = resource_size(regs); if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len, pdev->name)) { diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c index ebb893c..ad41f50 100644 --- a/drivers/video/aty/atyfb_base.c +++ b/drivers/video/aty/atyfb_base.c @@ -3460,9 +3460,10 @@ static int __devinit atyfb_setup_generic(struct pci_dev *pdev, raddr = addr + 0x7ff000UL; rrp = &pdev->resource[2]; - if ((rrp->flags & IORESOURCE_MEM) && request_mem_region(rrp->start, rrp->end - rrp->start + 1, "atyfb")) { + if ((rrp->flags & IORESOURCE_MEM) && + request_mem_region(rrp->start, resource_size(rrp), "atyfb")) { par->aux_start = rrp->start; - par->aux_size = rrp->end - rrp->start + 1; + par->aux_size = resource_size(rrp); raddr = rrp->start; PRINTKI("using auxiliary register aperture\n"); } @@ -3552,7 +3553,7 @@ static int __devinit atyfb_pci_probe(struct pci_dev *pdev, /* Reserve space */ res_start = rp->start; - res_size = rp->end - rp->start + 1; + res_size = resource_size(rp); if (!request_mem_region(res_start, res_size, "atyfb")) return -EBUSY; diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index 34b2fc47..01a8fde 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -486,7 +486,7 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev) } au1100fb_fix.mmio_start = regs_res->start; - au1100fb_fix.mmio_len = regs_res->end - regs_res->start + 1; + au1100fb_fix.mmio_len = resource_size(regs_res); if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len, DRIVER_NAME)) { diff --git a/drivers/video/cobalt_lcdfb.c b/drivers/video/cobalt_lcdfb.c index 42fe155..e027643 100644 --- a/drivers/video/cobalt_lcdfb.c +++ b/drivers/video/cobalt_lcdfb.c @@ -303,7 +303,7 @@ static int __devinit cobalt_lcdfb_probe(struct platform_device *dev) return -EBUSY; } - info->screen_size = res->end - res->start + 1; + info->screen_size = resource_size(res); info->screen_base = ioremap(res->start, info->screen_size); info->fbops = &cobalt_lcd_fbops; info->fix = cobalt_lcdfb_fix; diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c index c225dcc..9075bea5 100644 --- a/drivers/video/controlfb.c +++ b/drivers/video/controlfb.c @@ -709,11 +709,11 @@ static int __init control_of_init(struct device_node *dp) /* Map in frame buffer and registers */ p->fb_orig_base = fb_res.start; - p->fb_orig_size = fb_res.end - fb_res.start + 1; + p->fb_orig_size = resource_size(&fb_res); /* use the big-endian aperture (??) */ p->frame_buffer_phys = fb_res.start + 0x800000; p->control_regs_phys = reg_res.start; - p->control_regs_size = reg_res.end - reg_res.start + 1; + p->control_regs_size = resource_size(®_res); if (!p->fb_orig_base || !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) { diff --git a/drivers/video/mb862xx/mb862xxfbdrv.c b/drivers/video/mb862xx/mb862xxfbdrv.c index f70bd63..ee1de3e 100644 --- a/drivers/video/mb862xx/mb862xxfbdrv.c +++ b/drivers/video/mb862xx/mb862xxfbdrv.c @@ -697,7 +697,7 @@ static int __devinit of_platform_mb862xx_probe(struct platform_device *ofdev) goto fbrel; } - res_size = 1 + res.end - res.start; + res_size = resource_size(&res); par->res = request_mem_region(res.start, res_size, DRV_NAME); if (par->res == NULL) { dev_err(dev, "Cannot claim framebuffer/mmio\n"); @@ -787,7 +787,7 @@ static int __devexit of_platform_mb862xx_remove(struct platform_device *ofdev) { struct fb_info *fbi = dev_get_drvdata(&ofdev->dev); struct mb862xxfb_par *par = fbi->par; - resource_size_t res_size = 1 + par->res->end - par->res->start; + resource_size_t res_size = resource_size(par->res); unsigned long reg; dev_dbg(fbi->dev, "%s release\n", fbi->fix.id); diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c index c3636d5..243d16f 100644 --- a/drivers/video/msm/mdp.c +++ b/drivers/video/msm/mdp.c @@ -406,8 +406,7 @@ int mdp_probe(struct platform_device *pdev) goto error_get_irq; } - mdp->base = ioremap(resource->start, - resource->end - resource->start); + mdp->base = ioremap(resource->start, resource_size(resource)); if (mdp->base == 0) { printk(KERN_ERR "msmfb: cannot allocate mdp regs!\n"); ret = -ENOMEM; diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c index ec35130..c6e3b4f 100644 --- a/drivers/video/msm/msm_fb.c +++ b/drivers/video/msm/msm_fb.c @@ -525,10 +525,9 @@ static int setup_fbmem(struct msmfb_info *msmfb, struct platform_device *pdev) return -ENOMEM; } fb->fix.smem_start = resource->start; - fb->fix.smem_len = resource->end - resource->start; - fbram = ioremap(resource->start, - resource->end - resource->start); - if (fbram == 0) { + fb->fix.smem_len = resource_size(resource); + fbram = ioremap(resource->start, resource_size(resource)); + if (fbram == NULL) { printk(KERN_ERR "msmfb: cannot allocate fbram!\n"); return -ENOMEM; } diff --git a/drivers/video/nuc900fb.c b/drivers/video/nuc900fb.c index f838d9e..0fff597 100644 --- a/drivers/video/nuc900fb.c +++ b/drivers/video/nuc900fb.c @@ -551,7 +551,7 @@ static int __devinit nuc900fb_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - size = (res->end - res->start) + 1; + size = resource_size(res); fbi->mem = request_mem_region(res->start, size, pdev->name); if (fbi->mem == NULL) { dev_err(&pdev->dev, "failed to alloc memory region\n"); diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c index ef532d9..f27ae16 100644 --- a/drivers/video/platinumfb.c +++ b/drivers/video/platinumfb.c @@ -567,7 +567,7 @@ static int __devinit platinumfb_probe(struct platform_device* odev) * northbridge and that can fail. Only request framebuffer */ if (!request_mem_region(pinfo->rsrc_fb.start, - pinfo->rsrc_fb.end - pinfo->rsrc_fb.start + 1, + resource_size(&pinfo->rsrc_fb), "platinumfb framebuffer")) { printk(KERN_ERR "platinumfb: Can't request framebuffer !\n"); framebuffer_release(info); @@ -658,8 +658,7 @@ static int __devexit platinumfb_remove(struct platform_device* odev) iounmap(pinfo->cmap_regs); release_mem_region(pinfo->rsrc_fb.start, - pinfo->rsrc_fb.end - - pinfo->rsrc_fb.start + 1); + resource_size(&pinfo->rsrc_fb)); release_mem_region(pinfo->cmap_regs_phys, 0x1000); diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c index bb95ec5..18ead6f 100644 --- a/drivers/video/pxa168fb.c +++ b/drivers/video/pxa168fb.c @@ -662,7 +662,7 @@ static int __devinit pxa168fb_probe(struct platform_device *pdev) info->fix.ypanstep = 0; info->fix.ywrapstep = 0; info->fix.mmio_start = res->start; - info->fix.mmio_len = res->end - res->start + 1; + info->fix.mmio_len = resource_size(res); info->fix.accel = FB_ACCEL_NONE; info->fbops = &pxa168fb_ops; info->pseudo_palette = fbi->pseudo_palette; diff --git a/include/linux/dio.h b/include/linux/dio.h index b2dd31c..2cc0fd0 100644 --- a/include/linux/dio.h +++ b/include/linux/dio.h @@ -254,7 +254,7 @@ static inline struct dio_driver *dio_dev_driver(const struct dio_dev *d) #define dio_resource_start(d) ((d)->resource.start) #define dio_resource_end(d) ((d)->resource.end) -#define dio_resource_len(d) ((d)->resource.end-(d)->resource.start+1) +#define dio_resource_len(d) (resource_size(&(d)->resource)) #define dio_resource_flags(d) ((d)->resource.flags) #define dio_request_device(d, name) \ diff --git a/include/linux/pnp.h b/include/linux/pnp.h index 1bc1338..195aafc 100644 --- a/include/linux/pnp.h +++ b/include/linux/pnp.h @@ -50,7 +50,7 @@ static inline resource_size_t pnp_resource_len(struct resource *res) { if (res->start == 0 && res->end == 0) return 0; - return res->end - res->start + 1; + return resource_size(res); } diff --git a/include/linux/zorro.h b/include/linux/zorro.h index 7bf9db5..dff4202 100644 --- a/include/linux/zorro.h +++ b/include/linux/zorro.h @@ -187,7 +187,7 @@ extern struct zorro_dev *zorro_find_device(zorro_id id, #define zorro_resource_start(z) ((z)->resource.start) #define zorro_resource_end(z) ((z)->resource.end) -#define zorro_resource_len(z) ((z)->resource.end-(z)->resource.start+1) +#define zorro_resource_len(z) (resource_size(&(z)->resource)) #define zorro_resource_flags(z) ((z)->resource.flags) #define zorro_request_device(z, name) \ diff --git a/kernel/kexec.c b/kernel/kexec.c index 8d814cb..296fbc8 100644 --- a/kernel/kexec.c +++ b/kernel/kexec.c @@ -1095,7 +1095,7 @@ size_t crash_get_memory_size(void) size_t size = 0; mutex_lock(&kexec_mutex); if (crashk_res.end != crashk_res.start) - size = crashk_res.end - crashk_res.start + 1; + size = resource_size(&crashk_res); mutex_unlock(&kexec_mutex); return size; } diff --git a/sound/aoa/soundbus/i2sbus/core.c b/sound/aoa/soundbus/i2sbus/core.c index 3ff8cc5..0106583 100644 --- a/sound/aoa/soundbus/i2sbus/core.c +++ b/sound/aoa/soundbus/i2sbus/core.c @@ -262,8 +262,7 @@ static int i2sbus_add_dev(struct macio_dev *macio, */ dev->allocated_resource[i] = request_mem_region(dev->resources[i].start, - dev->resources[i].end - - dev->resources[i].start + 1, + resource_size(&dev->resources[i]), dev->rnames[i]); if (!dev->allocated_resource[i]) { printk(KERN_ERR "i2sbus: failed to claim resource %d!\n", i); @@ -272,19 +271,19 @@ static int i2sbus_add_dev(struct macio_dev *macio, } r = &dev->resources[aoa_resource_i2smmio]; - rlen = r->end - r->start + 1; + rlen = resource_size(r); if (rlen < sizeof(struct i2s_interface_regs)) goto err; dev->intfregs = ioremap(r->start, rlen); r = &dev->resources[aoa_resource_txdbdma]; - rlen = r->end - r->start + 1; + rlen = resource_size(r); if (rlen < sizeof(struct dbdma_regs)) goto err; dev->out.dbdma = ioremap(r->start, rlen); r = &dev->resources[aoa_resource_rxdbdma]; - rlen = r->end - r->start + 1; + rlen = resource_size(r); if (rlen < sizeof(struct dbdma_regs)) goto err; dev->in.dbdma = ioremap(r->start, rlen); diff --git a/sound/atmel/abdac.c b/sound/atmel/abdac.c index 6e24091..30468b3 100644 --- a/sound/atmel/abdac.c +++ b/sound/atmel/abdac.c @@ -448,7 +448,7 @@ static int __devinit atmel_abdac_probe(struct platform_device *pdev) goto out_free_card; } - dac->regs = ioremap(regs->start, regs->end - regs->start + 1); + dac->regs = ioremap(regs->start, resource_size(regs)); if (!dac->regs) { dev_dbg(&pdev->dev, "could not remap register memory\n"); goto out_free_card; diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c index b310702..41b901b 100644 --- a/sound/atmel/ac97c.c +++ b/sound/atmel/ac97c.c @@ -971,7 +971,7 @@ static int __devinit atmel_ac97c_probe(struct platform_device *pdev) chip->card = card; chip->pclk = pclk; chip->pdev = pdev; - chip->regs = ioremap(regs->start, regs->end - regs->start + 1); + chip->regs = ioremap(regs->start, resource_size(regs)); if (!chip->regs) { dev_dbg(&pdev->dev, "could not remap register memory\n"); diff --git a/sound/ppc/pmac.c b/sound/ppc/pmac.c index 3ecbd67..ab96cde 100644 --- a/sound/ppc/pmac.c +++ b/sound/ppc/pmac.c @@ -881,8 +881,7 @@ static int snd_pmac_free(struct snd_pmac *chip) for (i = 0; i < 3; i++) { if (chip->requested & (1 << i)) release_mem_region(chip->rsrc[i].start, - chip->rsrc[i].end - - chip->rsrc[i].start + 1); + resource_size(&chip->rsrc[i])); } } @@ -1228,8 +1227,7 @@ int __devinit snd_pmac_new(struct snd_card *card, struct snd_pmac **chip_return) goto __error; } if (request_mem_region(chip->rsrc[i].start, - chip->rsrc[i].end - - chip->rsrc[i].start + 1, + resource_size(&chip->rsrc[i]), rnames[i]) == NULL) { printk(KERN_ERR "snd: can't request rsrc " " %d (%s: %pR)\n", @@ -1254,8 +1252,7 @@ int __devinit snd_pmac_new(struct snd_card *card, struct snd_pmac **chip_return) goto __error; } if (request_mem_region(chip->rsrc[i].start, - chip->rsrc[i].end - - chip->rsrc[i].start + 1, + resource_size(&chip->rsrc[i]), rnames[i]) == NULL) { printk(KERN_ERR "snd: can't request rsrc " " %d (%s: %pR)\n", diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 313e0cc..6a882aa 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -678,7 +678,7 @@ static int __devinit fsl_ssi_probe(struct platform_device *pdev) kfree(ssi_private); return ret; } - ssi_private->ssi = ioremap(res.start, 1 + res.end - res.start); + ssi_private->ssi = ioremap(res.start, resource_size(&res)); ssi_private->ssi_phys = res.start; ssi_private->irq = irq_of_parse_and_map(np, 0); diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c index fff695c..8602314 100644 --- a/sound/soc/fsl/mpc5200_dma.c +++ b/sound/soc/fsl/mpc5200_dma.c @@ -384,7 +384,7 @@ static int mpc5200_hpcd_probe(struct of_device *op) dev_err(&op->dev, "Missing reg property\n"); return -ENODEV; } - regs = ioremap(res.start, 1 + res.end - res.start); + regs = ioremap(res.start, resource_size(&res)); if (!regs) { dev_err(&op->dev, "Could not map registers\n"); return -ENODEV; -- cgit v0.10.2 From c443453c6dc88576db540acc6ef40e1d2869e394 Mon Sep 17 00:00:00 2001 From: Andrew Murray Date: Thu, 9 Jun 2011 22:40:10 +0100 Subject: bootgraph.pl: relax timing information requirements This patch removes the assumption of the bootgraph.pl script that the timing information reported by PRINTK_TIME will contain at least one entry with a time of less than 100 seconds. Not all boards correctly reset the system timer and in many cases the inital times reported by PRINTK_TIME is high. When this occurs the bootchart.pl script fails to give any useful output. This patch sets the $firsttime variable to the largest value expected by PRINTK_TIME Signed-off-by: Andrew Murray Acked-by: Arjan van de Ven Signed-off-by: Jiri Kosina diff --git a/scripts/bootgraph.pl b/scripts/bootgraph.pl index 12caa82..b78fca9 100644 --- a/scripts/bootgraph.pl +++ b/scripts/bootgraph.pl @@ -44,7 +44,7 @@ my %end; my %type; my $done = 0; my $maxtime = 0; -my $firsttime = 100; +my $firsttime = 99999; my $count = 0; my %pids; my %pidctr; -- cgit v0.10.2 From 4d0d98b60eba726e0a4f3e6617628b070c444707 Mon Sep 17 00:00:00 2001 From: Wanlong Gao Date: Mon, 13 Jun 2011 10:45:38 +0200 Subject: block:fix the comment error in blkdev.h There is not a function rq_init but blk_rq_init in block/blk-core.c. Signed-off-by: Wanlong Gao Signed-off-by: Jens Axboe diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index ae9091a..4ce6e68 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -73,7 +73,7 @@ enum rq_cmd_type_bits { /* * try to put the fields that are referenced together in the same cacheline. - * if you modify this structure, be sure to check block/blk-core.c:rq_init() + * if you modify this structure, be sure to check block/blk-core.c:blk_rq_init() * as well! */ struct request { -- cgit v0.10.2 From 9f5e486550456587348e2048eecda5bee778250a Mon Sep 17 00:00:00 2001 From: Wanlong Gao Date: Mon, 13 Jun 2011 10:45:43 +0200 Subject: block:remove some spare spaces in genhd.c Remove the end-of-line spaces in genhd.c. Signed-off-by: Wanlong Gao Signed-off-by: Jens Axboe diff --git a/block/genhd.c b/block/genhd.c index 95822ae..ed3fe82 100644 --- a/block/genhd.c +++ b/block/genhd.c @@ -602,7 +602,7 @@ void add_disk(struct gendisk *disk) disk->major = MAJOR(devt); disk->first_minor = MINOR(devt); - /* Register BDI before referencing it from bdev */ + /* Register BDI before referencing it from bdev */ bdi = &disk->queue->backing_dev_info; bdi_register_dev(bdi, disk_devt(disk)); @@ -1148,7 +1148,7 @@ static int diskstats_show(struct seq_file *seqf, void *v) "wsect wuse running use aveq" "\n\n"); */ - + disk_part_iter_init(&piter, gp, DISK_PITER_INCL_EMPTY_PART0); while ((hd = disk_part_iter_next(&piter))) { cpu = part_stat_lock(); @@ -1172,7 +1172,7 @@ static int diskstats_show(struct seq_file *seqf, void *v) ); } disk_part_iter_exit(&piter); - + return 0; } -- cgit v0.10.2 From dd7740933842202fccaa9ebcba6bce0507b3f6d6 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Mon, 13 Jun 2011 11:47:24 +0200 Subject: fs/partitions/check.c: make local symbols static The symbols part_ro_show, part_alignment_offset_show, and part_discard_alignment_show are not used outside this file and should be marked static. Signed-off-by: H Hartley Sweeten Cc: Yasuaki Ishimatsu Cc: Alexey Dobriyan Acked-by: Tejun Heo Signed-off-by: Jens Axboe diff --git a/fs/partitions/check.c b/fs/partitions/check.c index f82e762..0ead435 100644 --- a/fs/partitions/check.c +++ b/fs/partitions/check.c @@ -237,22 +237,22 @@ ssize_t part_size_show(struct device *dev, return sprintf(buf, "%llu\n",(unsigned long long)p->nr_sects); } -ssize_t part_ro_show(struct device *dev, - struct device_attribute *attr, char *buf) +static ssize_t part_ro_show(struct device *dev, + struct device_attribute *attr, char *buf) { struct hd_struct *p = dev_to_part(dev); return sprintf(buf, "%d\n", p->policy ? 1 : 0); } -ssize_t part_alignment_offset_show(struct device *dev, - struct device_attribute *attr, char *buf) +static ssize_t part_alignment_offset_show(struct device *dev, + struct device_attribute *attr, char *buf) { struct hd_struct *p = dev_to_part(dev); return sprintf(buf, "%llu\n", (unsigned long long)p->alignment_offset); } -ssize_t part_discard_alignment_show(struct device *dev, - struct device_attribute *attr, char *buf) +static ssize_t part_discard_alignment_show(struct device *dev, + struct device_attribute *attr, char *buf) { struct hd_struct *p = dev_to_part(dev); struct gendisk *disk = dev_to_disk(dev); -- cgit v0.10.2 From 25eb650a690b95cb0e2cf0c3b03f4900a59e0135 Mon Sep 17 00:00:00 2001 From: Wanlong Gao Date: Mon, 13 Jun 2011 17:53:53 +0800 Subject: doc: fix wrong arch/i386 references Change all "arch/i386" to "arch/x86" in Documentaion/, since the directory has changed. Also update the files which have changed their filename in the meantime accordingly. Signed-off-by: Wanlong Gao [jkosina@suse.cz: reword changelog] Signed-off-by: Jiri Kosina diff --git a/Documentation/RCU/NMI-RCU.txt b/Documentation/RCU/NMI-RCU.txt index a8536cb..bf82851 100644 --- a/Documentation/RCU/NMI-RCU.txt +++ b/Documentation/RCU/NMI-RCU.txt @@ -5,8 +5,8 @@ Although RCU is usually used to protect read-mostly data structures, it is possible to use RCU to provide dynamic non-maskable interrupt handlers, as well as dynamic irq handlers. This document describes how to do this, drawing loosely from Zwane Mwaikambo's NMI-timer -work in "arch/i386/oprofile/nmi_timer_int.c" and in -"arch/i386/kernel/traps.c". +work in "arch/x86/oprofile/nmi_timer_int.c" and in +"arch/x86/kernel/traps.c". The relevant pieces of code are listed below, each followed by a brief explanation. diff --git a/Documentation/blockdev/README.DAC960 b/Documentation/blockdev/README.DAC960 index 0e8f618..bd85fb9 100644 --- a/Documentation/blockdev/README.DAC960 +++ b/Documentation/blockdev/README.DAC960 @@ -214,7 +214,7 @@ replacing "/usr/src" with wherever you keep your Linux kernel source tree: make config make bzImage (or zImage) -Then install "arch/i386/boot/bzImage" or "arch/i386/boot/zImage" as your +Then install "arch/x86/boot/bzImage" or "arch/x86/boot/zImage" as your standard kernel, run lilo if appropriate, and reboot. To create the necessary devices in /dev, the "make_rd" script included in diff --git a/Documentation/blockdev/ramdisk.txt b/Documentation/blockdev/ramdisk.txt index 6c820ba..fa72e97 100644 --- a/Documentation/blockdev/ramdisk.txt +++ b/Documentation/blockdev/ramdisk.txt @@ -64,9 +64,9 @@ the RAM disk dynamically grows as data is being written into it, a size field is not required. Bits 11 to 13 are not currently used and may as well be zero. These numbers are no magical secrets, as seen below: -./arch/i386/kernel/setup.c:#define RAMDISK_IMAGE_START_MASK 0x07FF -./arch/i386/kernel/setup.c:#define RAMDISK_PROMPT_FLAG 0x8000 -./arch/i386/kernel/setup.c:#define RAMDISK_LOAD_FLAG 0x4000 +./arch/x86/kernel/setup.c:#define RAMDISK_IMAGE_START_MASK 0x07FF +./arch/x86/kernel/setup.c:#define RAMDISK_PROMPT_FLAG 0x8000 +./arch/x86/kernel/setup.c:#define RAMDISK_LOAD_FLAG 0x4000 Consider a typical two floppy disk setup, where you will have the kernel on disk one, and have already put a RAM disk image onto disk #2. @@ -85,7 +85,7 @@ The command line equivalent is: "prompt_ramdisk=1" Putting that together gives 2^15 + 2^14 + 0 = 49152 for an rdev word. So to create disk one of the set, you would do: - /usr/src/linux# cat arch/i386/boot/zImage > /dev/fd0 + /usr/src/linux# cat arch/x86/boot/zImage > /dev/fd0 /usr/src/linux# rdev /dev/fd0 /dev/fd0 /usr/src/linux# rdev -r /dev/fd0 49152 diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt index 6c30e930..c436096 100644 --- a/Documentation/cpu-freq/cpu-drivers.txt +++ b/Documentation/cpu-freq/cpu-drivers.txt @@ -168,7 +168,7 @@ in-chipset dynamic frequency switching to policy->min, the upper limit to policy->max, and -if supported- select a performance-oriented setting when policy->policy is CPUFREQ_POLICY_PERFORMANCE, and a powersaving-oriented setting when CPUFREQ_POLICY_POWERSAVE. Also check -the reference implementation in arch/i386/kernel/cpu/cpufreq/longrun.c +the reference implementation in drivers/cpufreq/longrun.c diff --git a/Documentation/filesystems/nfs/nfsroot.txt b/Documentation/filesystems/nfs/nfsroot.txt index 90c71c6..ffdd9d8 100644 --- a/Documentation/filesystems/nfs/nfsroot.txt +++ b/Documentation/filesystems/nfs/nfsroot.txt @@ -226,7 +226,7 @@ They depend on various facilities being available: cdrecord. e.g. - cdrecord dev=ATAPI:1,0,0 arch/i386/boot/image.iso + cdrecord dev=ATAPI:1,0,0 arch/x86/boot/image.iso For more information on isolinux, including how to create bootdisks for prebuilt kernels, see http://syslinux.zytor.com/ diff --git a/Documentation/isdn/README.HiSax b/Documentation/isdn/README.HiSax index 99e87a6..b1a573cf 100644 --- a/Documentation/isdn/README.HiSax +++ b/Documentation/isdn/README.HiSax @@ -506,7 +506,7 @@ to e.g. the Internet: make clean; make zImage; make modules; make modules_install 2. Install the new kernel - cp /usr/src/linux/arch/i386/boot/zImage /etc/kernel/linux.isdn + cp /usr/src/linux/arch/x86/boot/zImage /etc/kernel/linux.isdn vi /etc/lilo.conf lilo diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt index 47435e5..f47cdef 100644 --- a/Documentation/kbuild/makefiles.txt +++ b/Documentation/kbuild/makefiles.txt @@ -441,7 +441,7 @@ more details, with real examples. specified if first option are not supported. Example: - #arch/i386/kernel/Makefile + #arch/x86/kernel/Makefile vsyscall-flags += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) In the above example, vsyscall-flags will be assigned the option @@ -460,7 +460,7 @@ more details, with real examples. supported to use an optional second option. Example: - #arch/i386/Makefile + #arch/x86/Makefile cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586) In the above example, cflags-y will be assigned the option @@ -522,7 +522,7 @@ more details, with real examples. even though the option was accepted by gcc. Example: - #arch/i386/Makefile + #arch/x86/Makefile cflags-y += $(shell \ if [ $(call cc-version) -ge 0300 ] ; then \ echo "-mregparm=3"; fi ;) @@ -802,7 +802,7 @@ but in the architecture makefiles where the kbuild infrastructure is not sufficient this sometimes needs to be explicit. Example: - #arch/i386/boot/Makefile + #arch/x86/boot/Makefile subdir- := compressed/ The above assignment instructs kbuild to descend down in the @@ -812,12 +812,12 @@ To support the clean infrastructure in the Makefiles that builds the final bootimage there is an optional target named archclean: Example: - #arch/i386/Makefile + #arch/x86/Makefile archclean: - $(Q)$(MAKE) $(clean)=arch/i386/boot + $(Q)$(MAKE) $(clean)=arch/x86/boot -When "make clean" is executed, make will descend down in arch/i386/boot, -and clean as usual. The Makefile located in arch/i386/boot/ may use +When "make clean" is executed, make will descend down in arch/x86/boot, +and clean as usual. The Makefile located in arch/x86/boot/ may use the subdir- trick to descend further down. Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is @@ -882,7 +882,7 @@ When kbuild executes, the following steps are followed (roughly): LDFLAGS_vmlinux uses the LDFLAGS_$@ support. Example: - #arch/i386/Makefile + #arch/x86/Makefile LDFLAGS_vmlinux := -e stext OBJCOPYFLAGS objcopy flags @@ -920,14 +920,14 @@ When kbuild executes, the following steps are followed (roughly): Often, the KBUILD_CFLAGS variable depends on the configuration. Example: - #arch/i386/Makefile + #arch/x86/Makefile cflags-$(CONFIG_M386) += -march=i386 KBUILD_CFLAGS += $(cflags-y) Many arch Makefiles dynamically run the target C compiler to probe supported options: - #arch/i386/Makefile + #arch/x86/Makefile ... cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\ @@ -1038,8 +1038,8 @@ When kbuild executes, the following steps are followed (roughly): into the arch/$(ARCH)/boot/Makefile. Example: - #arch/i386/Makefile - boot := arch/i386/boot + #arch/x86/Makefile + boot := arch/x86/boot bzImage: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ @@ -1051,7 +1051,7 @@ When kbuild executes, the following steps are followed (roughly): To support this, $(archhelp) must be defined. Example: - #arch/i386/Makefile + #arch/x86/Makefile define archhelp echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)' endif @@ -1065,7 +1065,7 @@ When kbuild executes, the following steps are followed (roughly): from vmlinux. Example: - #arch/i386/Makefile + #arch/x86/Makefile all: bzImage When "make" is executed without arguments, bzImage will be built. @@ -1083,7 +1083,7 @@ When kbuild executes, the following steps are followed (roughly): 2) kbuild knows what files to delete during "make clean" Example: - #arch/i386/kernel/Makefile + #arch/x86/kernel/Makefile extra-y := head.o init_task.o In this example, extra-y is used to list object files that @@ -1133,7 +1133,7 @@ When kbuild executes, the following steps are followed (roughly): Compress target. Use maximum compression to compress target. Example: - #arch/i386/boot/Makefile + #arch/x86/boot/Makefile LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext @@ -1193,7 +1193,7 @@ When kbuild executes, the following steps are followed (roughly): When updating the $(obj)/bzImage target, the line - BUILD arch/i386/boot/bzImage + BUILD arch/x86/boot/bzImage will be displayed with "make KBUILD_VERBOSE=0". @@ -1207,7 +1207,7 @@ When kbuild executes, the following steps are followed (roughly): kbuild knows .lds files and includes a rule *lds.S -> *lds. Example: - #arch/i386/kernel/Makefile + #arch/x86/kernel/Makefile always := vmlinux.lds #Makefile diff --git a/Documentation/magic-number.txt b/Documentation/magic-number.txt index 4b12abc..abf481f 100644 --- a/Documentation/magic-number.txt +++ b/Documentation/magic-number.txt @@ -66,7 +66,7 @@ MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h RISCOM8_MAGIC 0x0907 riscom_port drivers/char/riscom8.h SPECIALIX_MAGIC 0x0907 specialix_port drivers/char/specialix_io8.h HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c -APM_BIOS_MAGIC 0x4101 apm_user arch/i386/kernel/apm.c +APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h DB_MAGIC 0x4442 fc_info drivers/net/iph5526_novram.c DL_MAGIC 0x444d fc_info drivers/net/iph5526_novram.c diff --git a/Documentation/mca.txt b/Documentation/mca.txt index 510375d..dfd130c 100644 --- a/Documentation/mca.txt +++ b/Documentation/mca.txt @@ -11,7 +11,7 @@ Adapter Detection The ideal MCA adapter detection is done through the use of the Programmable Option Select registers. Generic functions for doing -this have been added in include/linux/mca.h and arch/i386/kernel/mca.c. +this have been added in include/linux/mca.h and arch/x86/kernel/mca_32.c. Everything needed to detect adapters and read (and write) configuration information is there. A number of MCA-specific drivers already use this. The typical probe code looks like the following: @@ -81,7 +81,7 @@ more people use shared IRQs on PCI machines. In general, an interrupt must be acknowledged not only at the ICU (which is done automagically by the kernel), but at the device level. In particular, IRQ 0 must be reset after a timer interrupt (now done in -arch/i386/kernel/time.c) or the first timer interrupt hangs the system. +arch/x86/kernel/time.c) or the first timer interrupt hangs the system. There were also problems with the 1.3.x floppy drivers, but that seems to have been fixed. diff --git a/Documentation/scheduler/sched-arch.txt b/Documentation/scheduler/sched-arch.txt index d43dbcb..28aa107 100644 --- a/Documentation/scheduler/sched-arch.txt +++ b/Documentation/scheduler/sched-arch.txt @@ -66,7 +66,7 @@ Your cpu_idle routines need to obey the following rules: barrier issued (followed by a test of need_resched with interrupts disabled, as explained in 3). -arch/i386/kernel/process.c has examples of both polling and +arch/x86/kernel/process.c has examples of both polling and sleeping idle functions. diff --git a/Documentation/scsi/BusLogic.txt b/Documentation/scsi/BusLogic.txt index d7fbc94..48e982c 100644 --- a/Documentation/scsi/BusLogic.txt +++ b/Documentation/scsi/BusLogic.txt @@ -553,7 +553,7 @@ replacing "/usr/src" with wherever you keep your Linux kernel source tree: make config make zImage -Then install "arch/i386/boot/zImage" as your standard kernel, run lilo if +Then install "arch/x86/boot/zImage" as your standard kernel, run lilo if appropriate, and reboot. diff --git a/Documentation/serial/computone.txt b/Documentation/serial/computone.txt index c57ea47..60a6f65 100644 --- a/Documentation/serial/computone.txt +++ b/Documentation/serial/computone.txt @@ -87,7 +87,7 @@ c) Set address on ISA cards then: edit /usr/src/linux/drivers/char/ip2.c (Optional - may be specified on kernel command line now) d) Run "make zImage" or whatever target you prefer. -e) mv /usr/src/linux/arch/i386/boot/zImage to /boot. +e) mv /usr/src/linux/arch/x86/boot/zImage to /boot. f) Add new config for this kernel into /etc/lilo.conf, run "lilo" or copy to a floppy disk and boot from that floppy disk. g) Reboot using this kernel diff --git a/Documentation/zh_CN/magic-number.txt b/Documentation/zh_CN/magic-number.txt index 4c4ce85..c278f41 100644 --- a/Documentation/zh_CN/magic-number.txt +++ b/Documentation/zh_CN/magic-number.txt @@ -66,7 +66,7 @@ MKISS_DRIVER_MAGIC 0x04bf mkiss_channel drivers/net/mkiss.h RISCOM8_MAGIC 0x0907 riscom_port drivers/char/riscom8.h SPECIALIX_MAGIC 0x0907 specialix_port drivers/char/specialix_io8.h HDLC_MAGIC 0x239e n_hdlc drivers/char/n_hdlc.c -APM_BIOS_MAGIC 0x4101 apm_user arch/i386/kernel/apm.c +APM_BIOS_MAGIC 0x4101 apm_user arch/x86/kernel/apm_32.c CYCLADES_MAGIC 0x4359 cyclades_port include/linux/cyclades.h DB_MAGIC 0x4442 fc_info drivers/net/iph5526_novram.c DL_MAGIC 0x444d fc_info drivers/net/iph5526_novram.c -- cgit v0.10.2 From cd4f1d536c2b2221d5a80399698d39717bf40077 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:26:27 -0400 Subject: ktest: Notify reason to break out of monitoring boot Different timeouts can cause the ktest monitor to break out of the loop. It becomes annoying that one does not know the reason why it exited the monitor loop. Display the cause of the reason why the loop was exited. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index cef28e6..b96d381 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -841,12 +841,20 @@ sub monitor { if ($booted) { $line = wait_for_input($monitor_fp, $booted_timeout); + if (!defined($line)) { + my $s = $booted_timeout == 1 ? "" : "s"; + doprint "Successful boot found: break after $booted_timeout second$s\n"; + last; + } } else { $line = wait_for_input($monitor_fp); + if (!defined($line)) { + my $s = $timeout == 1 ? "" : "s"; + doprint "Timed out after $timeout second$s\n"; + last; + } } - last if (!defined($line)); - doprint $line; print DMESG $line; -- cgit v0.10.2 From f1a5b96219e3483ab519bed9bb04cc8fadf74816 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:30:00 -0400 Subject: ktest: Add detection of triple faults When a triple fault happens in a test, no call trace nor panic is displayed. Instead, the system reboots to the good kernel. Since the good kernel may display a boot prompt that matches the success string, ktest may think that the test succeeded, when it did not. Detecting triple faults is tricky because it is hard to generalize what a reboot looks like. The best that we can come up with for now is to examine the Linux banner. If we detect that the Linux banner matches the test we want to test, then look to see if we hit another Linux banner with a different kernel is booted. This can be assumed to be a triple fault. We can't just check for two Linux banners because things like early printk may cause the Linux banner to be displayed twice. Checking for different kernel versions should be the safe bet. If this for some reason detects a false triple boot. A new ktest config option is also created: DETECT_TRIPLE_FAULT This can be set to 0 to disable this checking. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index b96d381..a8e1826e 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -41,6 +41,7 @@ $default{"CLEAR_LOG"} = 0; $default{"BISECT_MANUAL"} = 0; $default{"BISECT_SKIP"} = 1; $default{"SUCCESS_LINE"} = "login:"; +$default{"DETECT_TRIPLE_FAULT"} = 1; $default{"BOOTED_TIMEOUT"} = 1; $default{"DIE_ON_FAILURE"} = 1; $default{"SSH_EXEC"} = "ssh \$SSH_USER\@\$MACHINE \$SSH_COMMAND"; @@ -101,6 +102,7 @@ my $patchcheck_sleep_time; my $store_failures; my $timeout; my $booted_timeout; +my $detect_triplefault; my $console; my $success_line; my $stop_after_success; @@ -836,6 +838,7 @@ sub monitor { my $failure_start; my $monitor_start = time; my $done = 0; + my $version_found = 0; while (!$done) { @@ -904,6 +907,22 @@ sub monitor { $bug = 1; } + # Detect triple faults by testing the banner + if ($full_line =~ /\bLinux version (\S+).*\n/) { + if ($1 eq $version) { + $version_found = 1; + } elsif ($version_found && $detect_triplefault) { + # We already booted into the kernel we are testing, + # but now we booted into another kernel? + # Consider this a triple fault. + doprint "Aleady booted in Linux kernel $version, but now\n"; + doprint "we booted into Linux kernel $1.\n"; + doprint "Assuming that this is a triple fault.\n"; + doprint "To disable this: set DETECT_TRIPLE_FAULT to 0\n"; + last; + } + } + if ($line =~ /\n/) { $full_line = ""; } @@ -2159,6 +2178,7 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { $timeout = set_test_option("TIMEOUT", $i); $booted_timeout = set_test_option("BOOTED_TIMEOUT", $i); $console = set_test_option("CONSOLE", $i); + $detect_triplefault = set_test_option("DETECT_TRIPLE_FAULT", $i); $success_line = set_test_option("SUCCESS_LINE", $i); $stop_after_success = set_test_option("STOP_AFTER_SUCCESS", $i); $stop_after_failure = set_test_option("STOP_AFTER_FAILURE", $i); diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index 48cbcc80..c2c072e 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -518,6 +518,16 @@ # The variables SSH_USER and MACHINE are defined. #REBOOT = ssh $SSH_USER@$MACHINE reboot +# The way triple faults are detected is by testing the kernel +# banner. If the kernel banner for the kernel we are testing is +# found, and then later a kernel banner for another kernel version +# is found, it is considered that we encountered a triple fault, +# and there is no panic or callback, but simply a reboot. +# To disable this (because it did a false positive) set the following +# to 0. +# (default 1) +#DETECT_TRIPLE_FAULT = 0 + #### Per test run options #### # The following options are only allowed in TEST_START sections. # They are ignored in the DEFAULTS sections. -- cgit v0.10.2 From 30f75da5ff475f1f455c0b009f3c06767963c54f Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:35:35 -0400 Subject: ktest: Add CONFIG_BISECT_GOOD option Currently the config_bisect compares the min config with the CONFIG_BISECT config. There may be another config that we know is good that we want to ignore configs on. By passing in this config it will ignore the options that are set in the good config. Note: This only ignores the config, it does not (yet) handle options that are different between the two configs. If the good config has "SLAB" set and the bad config has "SLUB" it will not find the bug if the bug had to do with changing these two options. This is something that I intend to implement in the future. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index a8e1826e..dbc02de 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -88,6 +88,7 @@ my $bisect_bad = ""; my $reverse_bisect; my $bisect_manual; my $bisect_skip; +my $config_bisect_good; my $in_patchcheck = 0; my $run_test; my $redirect; @@ -1745,6 +1746,10 @@ sub config_bisect { my $tmpconfig = "$tmpdir/use_config"; + if (defined($config_bisect_good)) { + process_config_ignore $config_bisect_good; + } + # Make the file with the bad config and the min config if (defined($minconfig)) { # read the min config for things to ignore @@ -2174,6 +2179,7 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { $patchcheck_sleep_time = set_test_option("PATCHCHECK_SLEEP_TIME", $i); $bisect_manual = set_test_option("BISECT_MANUAL", $i); $bisect_skip = set_test_option("BISECT_SKIP", $i); + $config_bisect_good = set_test_option("CONFIG_BISECT_GOOD", $i); $store_failures = set_test_option("STORE_FAILURES", $i); $timeout = set_test_option("TIMEOUT", $i); $booted_timeout = set_test_option("BOOTED_TIMEOUT", $i); diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index c2c072e..be531c2 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -749,13 +749,18 @@ # boot - bad builds but fails to boot # test - bad boots but fails a test # -# CONFIG_BISECT is the config that failed to boot -# -# If BISECT_MANUAL is set, it will pause between iterations. -# This is useful to use just ktest.pl just for the config bisect. -# If you set it to build, it will run the bisect and you can -# control what happens in between iterations. It will ask you if -# the test succeeded or not and continue the config bisect. +# CONFIG_BISECT is the config that failed to boot +# +# If BISECT_MANUAL is set, it will pause between iterations. +# This is useful to use just ktest.pl just for the config bisect. +# If you set it to build, it will run the bisect and you can +# control what happens in between iterations. It will ask you if +# the test succeeded or not and continue the config bisect. +# +# CONFIG_BISECT_GOOD (optional) +# If you have a good config to start with, then you +# can specify it with CONFIG_BISECT_GOOD. Otherwise +# the MIN_CONFIG is the base. # # Example: # TEST_START -- cgit v0.10.2 From 9064af5206c26ce0d47621fef216b0c43d65d693 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:38:48 -0400 Subject: ktest: Add TEST_NAME option Searching through several tests, it gets confusing which test result is for which test. By adding the TEST_NAME option, the user can tell which test result belongs to which test. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index dbc02de..579569f 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -101,6 +101,7 @@ my $sleep_time; my $bisect_sleep_time; my $patchcheck_sleep_time; my $store_failures; +my $test_name; my $timeout; my $booted_timeout; my $detect_triplefault; @@ -620,9 +621,15 @@ sub fail { end_monitor; } + my $name = ""; + + if (defined($test_name)) { + $name = " ($test_name)"; + } + doprint "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\n"; doprint "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\n"; - doprint "KTEST RESULT: TEST $i Failed: ", @_, "\n"; + doprint "KTEST RESULT: TEST $i$name Failed: ", @_, "\n"; doprint "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\n"; doprint "%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\n"; @@ -1130,9 +1137,15 @@ sub success { $successes++; + my $name = ""; + + if (defined($test_name)) { + $name = " ($test_name)"; + } + doprint "\n\n*******************************************\n"; doprint "*******************************************\n"; - doprint "KTEST RESULT: TEST $i SUCCESS!!!! **\n"; + doprint "KTEST RESULT: TEST $i$name SUCCESS!!!! **\n"; doprint "*******************************************\n"; doprint "*******************************************\n"; @@ -2181,6 +2194,7 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { $bisect_skip = set_test_option("BISECT_SKIP", $i); $config_bisect_good = set_test_option("CONFIG_BISECT_GOOD", $i); $store_failures = set_test_option("STORE_FAILURES", $i); + $test_name = set_test_option("TEST_NAME", $i); $timeout = set_test_option("TIMEOUT", $i); $booted_timeout = set_test_option("BOOTED_TIMEOUT", $i); $console = set_test_option("CONSOLE", $i); diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index be531c2..0e5f764 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -545,6 +545,12 @@ # all preceding tests until a new CHECKOUT is set. # # +# TEST_NAME = name +# +# If you want the test to have a name that is displayed in +# the test result banner at the end of the test, then use this +# option. This is useful to search for the RESULT keyword and +# not have to translate a test number to a test in the config. # # For TEST_TYPE = patchcheck # -- cgit v0.10.2 From fcb3f16a4f4bf4e667ae4c68b1d5401824058efb Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:40:58 -0400 Subject: ktest: Implement our own force min config Using the build KCONFIG_ALLCONFIG environment variable to force the min config may not always work properly. Since ktest is written in perl, it is trivial to read and replace the current config with the configs specified by the min config. Now the min config (and add configs) are read by perl and before a make is done, these configs in the .config file are replaced by the version in the min config. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 579569f..aa442a9 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -119,6 +119,7 @@ my $successes = 0; my %entered_configs; my %config_help; my %variable; +my %force_config; $config_help{"MACHINE"} = << "EOF" The machine hostname that you will test. @@ -1044,21 +1045,69 @@ sub check_buildlog { return 1; } +sub apply_min_config { + my $outconfig = "$output_config.new"; + + # Read the config file and remove anything that + # is in the force_config hash (from minconfig and others) + # then add the force config back. + + doprint "Applying minimum configurations into $output_config.new\n"; + + open (OUT, ">$outconfig") or + dodie "Can't create $outconfig"; + + if (-f $output_config) { + open (IN, $output_config) or + dodie "Failed to open $output_config"; + while () { + if (/^(# )?(CONFIG_[^\s=]*)/) { + next if (defined($force_config{$2})); + } + print OUT; + } + close IN; + } + foreach my $config (keys %force_config) { + print OUT "$force_config{$config}\n"; + } + close OUT; + + run_command "mv $outconfig $output_config"; +} + sub make_oldconfig { - my ($defconfig) = @_; - if (!run_command "$defconfig $make oldnoconfig") { + apply_min_config; + + if (!run_command "$make oldnoconfig") { # Perhaps oldnoconfig doesn't exist in this version of the kernel # try a yes '' | oldconfig doprint "oldnoconfig failed, trying yes '' | make oldconfig\n"; - run_command "yes '' | $defconfig $make oldconfig" or + run_command "yes '' | $make oldconfig" or dodie "failed make config oldconfig"; } } +# read a config file and use this to force new configs. +sub load_force_config { + my ($config) = @_; + + open(IN, $config) or + dodie "failed to read $config"; + while () { + chomp; + if (/^(CONFIG[^\s=]*)(\s*=.*)/) { + $force_config{$1} = $_; + } elsif (/^# (CONFIG_\S*) is not set/) { + $force_config{$1} = $_; + } + } + close IN; +} + sub build { my ($type) = @_; - my $defconfig = ""; unlink $buildlog; @@ -1098,15 +1147,15 @@ sub build { close(OUT); if (defined($minconfig)) { - $defconfig = "KCONFIG_ALLCONFIG=$minconfig"; + load_force_config($minconfig); } - if ($type eq "oldnoconfig") { - make_oldconfig $defconfig; - } else { - run_command "$defconfig $make $type" or + if ($type ne "oldnoconfig") { + run_command "$make $type" or dodie "failed make config"; } + # Run old config regardless, to enforce min configurations + make_oldconfig; $redirect = "$buildlog"; if (!run_command "$make $build_options") { @@ -1587,7 +1636,7 @@ sub create_config { close(OUT); # exit; - make_oldconfig ""; + make_oldconfig; } sub compare_configs { @@ -1778,9 +1827,8 @@ sub config_bisect { dodie "failed to append $addconfig"; } - my $defconfig = ""; if (-f $tmpconfig) { - $defconfig = "KCONFIG_ALLCONFIG=$tmpconfig"; + load_force_config($tmpconfig); process_config_ignore $tmpconfig; } @@ -1801,7 +1849,7 @@ sub config_bisect { close(IN); # Now run oldconfig with the minconfig (and addconfigs) - make_oldconfig $defconfig; + make_oldconfig; # check to see what we lost (or gained) open (IN, $output_config) -- cgit v0.10.2 From ecaf8e521324d5a7f85976bb8689e248b8d3a2f6 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 10:48:10 -0400 Subject: ktest: Have wait on stdio honor bug timeout After a bug is found, the STOP_AFTER_FAILURE timeout is used to determine how much output should be printed before breaking out of the monitor loop. This is to get things like call traces and enough infromation about the bug to help determine what caused it. The STOP_AFTER_FAILURE is usually much shorter than the TIMEOUT that is used to determine when to quit after no more stdio is given. But since the stdio read uses a wait on I/O, the STOP_AFTER_FAILURE is only checked after we get something from I/O. But if the I/O does not return any more data, we wait the TIMEOUT period instead, even though we already triggered a bug report. The wait on I/O should honor the STOP_AFTER_FAILURE time if a bug has been found. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index aa442a9..1e1fe835 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -851,7 +851,16 @@ sub monitor { while (!$done) { - if ($booted) { + if ($bug && defined($stop_after_failure) && + $stop_after_failure >= 0) { + my $time = $stop_after_failure - (time - $failure_start); + $line = wait_for_input($monitor_fp, $time); + if (!defined($line)) { + doprint "bug timed out after $booted_timeout seconds\n"; + doprint "Test forced to stop after $stop_after_failure seconds after failure\n"; + last; + } + } elsif ($booted) { $line = wait_for_input($monitor_fp, $booted_timeout); if (!defined($line)) { my $s = $booted_timeout == 1 ? "" : "s"; -- cgit v0.10.2 From 23715c3c9a31dd34c8c2f27086a9562e35da423b Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 11:03:34 -0400 Subject: ktest: Have LOG_FILE evaluate options as well The LOG_FILE variable needs to evaluate the $ options as well. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 1e1fe835..83dcfaf 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -478,6 +478,69 @@ sub read_config { } } +sub __eval_option { + my ($option, $i) = @_; + + # Add space to evaluate the character before $ + $option = " $option"; + my $retval = ""; + + while ($option =~ /(.*?[^\\])\$\{(.*?)\}(.*)/) { + my $start = $1; + my $var = $2; + my $end = $3; + + # Append beginning of line + $retval = "$retval$start"; + + # If the iteration option OPT[$i] exists, then use that. + # otherwise see if the default OPT (without [$i]) exists. + + my $o = "$var\[$i\]"; + + if (defined($opt{$o})) { + $o = $opt{$o}; + $retval = "$retval$o"; + } elsif (defined($opt{$var})) { + $o = $opt{$var}; + $retval = "$retval$o"; + } else { + $retval = "$retval\$\{$var\}"; + } + + $option = $end; + } + + $retval = "$retval$option"; + + $retval =~ s/^ //; + + return $retval; +} + +sub eval_option { + my ($option, $i) = @_; + + my $prev = ""; + + # Since an option can evaluate to another option, + # keep iterating until we do not evaluate any more + # options. + my $r = 0; + while ($prev ne $option) { + # Check for recursive evaluations. + # 100 deep should be more than enough. + if ($r++ > 100) { + die "Over 100 evaluations accurred with $option\n" . + "Check for recursive variables\n"; + } + $prev = $option; + $option = __eval_option($option, $i); + } + + return $option; +} + sub _logit { if (defined($opt{"LOG_FILE"})) { open(OUT, ">> $opt{LOG_FILE}") or die "Can't write to $opt{LOG_FILE}"; @@ -2079,6 +2142,10 @@ EOF } read_config $ktest_config; +if (defined($opt{"LOG_FILE"})) { + $opt{"LOG_FILE"} = eval_option($opt{"LOG_FILE"}, -1); +} + # Append any configs entered in manually to the config file. my @new_configs = keys %entered_configs; if ($#new_configs >= 0) { @@ -2147,70 +2214,13 @@ sub __set_test_option { return undef; } -sub eval_option { - my ($option, $i) = @_; - - # Add space to evaluate the character before $ - $option = " $option"; - my $retval = ""; - - while ($option =~ /(.*?[^\\])\$\{(.*?)\}(.*)/) { - my $start = $1; - my $var = $2; - my $end = $3; - - # Append beginning of line - $retval = "$retval$start"; - - # If the iteration option OPT[$i] exists, then use that. - # otherwise see if the default OPT (without [$i]) exists. - - my $o = "$var\[$i\]"; - - if (defined($opt{$o})) { - $o = $opt{$o}; - $retval = "$retval$o"; - } elsif (defined($opt{$var})) { - $o = $opt{$var}; - $retval = "$retval$o"; - } else { - $retval = "$retval\$\{$var\}"; - } - - $option = $end; - } - - $retval = "$retval$option"; - - $retval =~ s/^ //; - - return $retval; -} - sub set_test_option { my ($name, $i) = @_; my $option = __set_test_option($name, $i); return $option if (!defined($option)); - my $prev = ""; - - # Since an option can evaluate to another option, - # keep iterating until we do not evaluate any more - # options. - my $r = 0; - while ($prev ne $option) { - # Check for recursive evaluations. - # 100 deep should be more than enough. - if ($r++ > 100) { - die "Over 100 evaluations accurred with $name\n" . - "Check for recursive variables\n"; - } - $prev = $option; - $option = eval_option($option, $i); - } - - return $option; + return eval_option($option, $i); } # First we need to do is the builds -- cgit v0.10.2 From db05cfefce6e6120267974345599760b1d653439 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 13 Jun 2011 11:09:22 -0400 Subject: ktest: Allow initrd processing without modules defined When a config is set with CONFIG_MODULES=n, it does not mean that the kernel does not need an initrd to boot. For systems that depend on LVM and such, an initrd must run first. If POST_INSTALL is defined, then run the post install regardless if modules are needed or not. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 83dcfaf..fb46e12 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -1031,6 +1031,16 @@ sub monitor { return 1; } +sub do_post_install { + + return if (!defined($post_install)); + + my $cp_post_install = $post_install; + $cp_post_install =~ s/\$KERNEL_VERSION/$version/g; + run_command "$cp_post_install" or + dodie "Failed to run post install"; +} + sub install { run_scp "$outputdir/$build_target", "$target_image" or @@ -1050,6 +1060,7 @@ sub install { close(IN); if (!$install_mods) { + do_post_install; doprint "No modules needed\n"; return; } @@ -1077,12 +1088,7 @@ sub install { run_ssh "rm -f /tmp/$modtar"; - return if (!defined($post_install)); - - my $cp_post_install = $post_install; - $cp_post_install =~ s/\$KERNEL_VERSION/$version/g; - run_command "$cp_post_install" or - dodie "Failed to run post install"; + do_post_install; } sub check_buildlog { -- cgit v0.10.2 From fd16d263194aa6b50b215eb593a567b59d744d6e Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Mon, 13 Jun 2011 10:42:49 +0200 Subject: block: Add __attribute__((format(printf...) and fix fallout Use the compiler to verify format strings and arguments. Fix fallout. Signed-off-by: Joe Perches Signed-off-by: Jens Axboe diff --git a/block/blk-throttle.c b/block/blk-throttle.c index a62be8d..3689f83 100644 --- a/block/blk-throttle.c +++ b/block/blk-throttle.c @@ -927,7 +927,7 @@ static int throtl_dispatch(struct request_queue *q) bio_list_init(&bio_list_on_stack); - throtl_log(td, "dispatch nr_queued=%lu read=%u write=%u", + throtl_log(td, "dispatch nr_queued=%d read=%u write=%u", total_nr_queued(td), td->nr_queued[READ], td->nr_queued[WRITE]); @@ -1204,7 +1204,7 @@ int blk_throtl_bio(struct request_queue *q, struct bio **biop) } queue_bio: - throtl_log_tg(td, tg, "[%c] bio. bdisp=%u sz=%u bps=%llu" + throtl_log_tg(td, tg, "[%c] bio. bdisp=%llu sz=%u bps=%llu" " iodisp=%u iops=%u queued=%d/%d", rw == READ ? 'R' : 'W', tg->bytes_disp[rw], bio->bi_size, tg->bps[rw], diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 2b2d7a9..3d403a1 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -988,9 +988,10 @@ static void cfq_group_served(struct cfq_data *cfqd, struct cfq_group *cfqg, cfq_log_cfqg(cfqd, cfqg, "served: vt=%llu min_vt=%llu", cfqg->vdisktime, st->min_vdisktime); - cfq_log_cfqq(cfqq->cfqd, cfqq, "sl_used=%u disp=%u charge=%u iops=%u" - " sect=%u", used_sl, cfqq->slice_dispatch, charge, - iops_mode(cfqd), cfqq->nr_sectors); + cfq_log_cfqq(cfqq->cfqd, cfqq, + "sl_used=%u disp=%u charge=%u iops=%u sect=%lu", + used_sl, cfqq->slice_dispatch, charge, + iops_mode(cfqd), cfqq->nr_sectors); cfq_blkiocg_update_timeslice_used(&cfqg->blkg, used_sl, unaccounted_sl); cfq_blkiocg_set_start_empty_time(&cfqg->blkg); @@ -2018,8 +2019,8 @@ static void cfq_arm_slice_timer(struct cfq_data *cfqd) */ if (sample_valid(cic->ttime_samples) && (cfqq->slice_end - jiffies < cic->ttime_mean)) { - cfq_log_cfqq(cfqd, cfqq, "Not idling. think_time:%d", - cic->ttime_mean); + cfq_log_cfqq(cfqd, cfqq, "Not idling. think_time:%lu", + cic->ttime_mean); return; } diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h index b22fb0d..8c7c2de 100644 --- a/include/linux/blktrace_api.h +++ b/include/linux/blktrace_api.h @@ -169,7 +169,8 @@ extern void blk_trace_shutdown(struct request_queue *); extern int do_blk_trace_setup(struct request_queue *q, char *name, dev_t dev, struct block_device *bdev, struct blk_user_trace_setup *buts); -extern void __trace_note_message(struct blk_trace *, const char *fmt, ...); +extern __attribute__((format(printf, 2, 3))) +void __trace_note_message(struct blk_trace *, const char *fmt, ...); /** * blk_add_trace_msg - Add a (simple) message to the blktrace stream -- cgit v0.10.2 From d2f31a5fd60d168b00fc4f7617b68a1287b21e90 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Mon, 13 Jun 2011 20:19:27 +0200 Subject: blk-throttle: Make total_nr_queued unsigned The total of two unsigned values should also be unsigned. Update throtl_log output to unsigned. Update total_nr_queued test to non-zero to be the same as the other total_nr_queued tests. Signed-off-by: Joe Perches Acked-by: Vivek Goyal Signed-off-by: Jens Axboe diff --git a/block/blk-throttle.c b/block/blk-throttle.c index 3689f83..f6a7941 100644 --- a/block/blk-throttle.c +++ b/block/blk-throttle.c @@ -142,9 +142,9 @@ static inline struct throtl_grp *tg_of_blkg(struct blkio_group *blkg) return NULL; } -static inline int total_nr_queued(struct throtl_data *td) +static inline unsigned int total_nr_queued(struct throtl_data *td) { - return (td->nr_queued[0] + td->nr_queued[1]); + return td->nr_queued[0] + td->nr_queued[1]; } static inline struct throtl_grp *throtl_ref_get_tg(struct throtl_grp *tg) @@ -927,7 +927,7 @@ static int throtl_dispatch(struct request_queue *q) bio_list_init(&bio_list_on_stack); - throtl_log(td, "dispatch nr_queued=%d read=%u write=%u", + throtl_log(td, "dispatch nr_queued=%u read=%u write=%u", total_nr_queued(td), td->nr_queued[READ], td->nr_queued[WRITE]); @@ -970,7 +970,7 @@ throtl_schedule_delayed_work(struct throtl_data *td, unsigned long delay) struct delayed_work *dwork = &td->throtl_work; /* schedule work if limits changed even if no bio is queued */ - if (total_nr_queued(td) > 0 || td->limits_changed) { + if (total_nr_queued(td) || td->limits_changed) { /* * We might have a work scheduled to be executed in future. * Cancel that and schedule a new one. -- cgit v0.10.2 From 323c9dd26b6176fd7f16bcf3202df708c419b20c Mon Sep 17 00:00:00 2001 From: Jiri Kosina Date: Tue, 14 Jun 2011 10:40:40 +0200 Subject: trivial: don't touch fsi_ssl.c with ioremap fixes This is a partial revert of 28f65c11f2ff ("treewide: Convert uses of struct resource to resource_size(ptr)") as the code is rewritten in the sound tree and thus the change is obsolete. Reported-by: Stephen Rothwell Signed-off-by: Jiri Kosina diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 6a882aa..313e0cc 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -678,7 +678,7 @@ static int __devinit fsl_ssi_probe(struct platform_device *pdev) kfree(ssi_private); return ret; } - ssi_private->ssi = ioremap(res.start, resource_size(&res)); + ssi_private->ssi = ioremap(res.start, 1 + res.end - res.start); ssi_private->ssi_phys = res.start; ssi_private->irq = irq_of_parse_and_map(np, 0); -- cgit v0.10.2 From 786b01a8c1db0c0decca55d660a2a3ebd7cfb26b Mon Sep 17 00:00:00 2001 From: Oleg Drokin Date: Mon, 6 Jun 2011 18:57:07 +0000 Subject: cleanup regulator supply definitions in mach-omap2 to use REGULATOR_SUPPLY arrays. CC: Mark Brown CC: Mike Rapoport CC: Nishant Kamat CC: Steve Sakoman CC: Felipe Balbi CC: Santosh Shilimkar CC: peter.barada@logicpd.com Signed-off-by: Oleg Drokin Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 63de2d3..39a8062 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -333,16 +333,11 @@ static struct omap2_hsmmc_info mmc[] = { }; static struct regulator_consumer_supply sdp4430_vaux_supply[] = { - { - .supply = "vmmc", - .dev_name = "omap_hsmmc.1", - }, + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), }; + static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { - { - .supply = "vmmc", - .dev_name = "omap_hsmmc.0", - }, + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; static int omap4_twl6030_hsmmc_late_init(struct device *dev) @@ -399,7 +394,7 @@ static struct regulator_init_data sdp4430_vaux1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, + .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply), .consumer_supplies = sdp4430_vaux_supply, }; diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 77456de..e7bf32d 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -337,19 +337,21 @@ static void __init cm_t35_init_display(void) } } -static struct regulator_consumer_supply cm_t35_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply cm_t35_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply cm_t35_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply cm_t35_vdac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply cm_t35_vdac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; -static struct regulator_consumer_supply cm_t35_vdvi_supply = - REGULATOR_SUPPLY("vdvi", "omapdss"); +static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { + REGULATOR_SUPPLY("vdvi", "omapdss"), +}; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ static struct regulator_init_data cm_t35_vmmc1 = { @@ -362,8 +364,8 @@ static struct regulator_init_data cm_t35_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &cm_t35_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply), + .consumer_supplies = cm_t35_vmmc1_supply, }; /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ @@ -377,8 +379,8 @@ static struct regulator_init_data cm_t35_vsim = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &cm_t35_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply), + .consumer_supplies = cm_t35_vsim_supply, }; /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ @@ -391,8 +393,8 @@ static struct regulator_init_data cm_t35_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &cm_t35_vdac_supply, + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), + .consumer_supplies = cm_t35_vdac_supply, }; /* VPLL2 for digital video outputs */ @@ -406,8 +408,8 @@ static struct regulator_init_data cm_t35_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &cm_t35_vdvi_supply, + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), + .consumer_supplies = cm_t35_vdvi_supply, }; static struct twl4030_usb_data cm_t35_usb_data = { diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 34956ec..ead9c1d 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -130,13 +130,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) gpio_set_value_cansleep(dssdev->reset_gpio, 0); } -static struct regulator_consumer_supply devkit8000_vmmc1_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); - +static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), +}; /* ads7846 on SPI */ -static struct regulator_consumer_supply devkit8000_vio_supply = - REGULATOR_SUPPLY("vcc", "spi2.0"); +static struct regulator_consumer_supply devkit8000_vio_supply[] = { + REGULATOR_SUPPLY("vcc", "spi2.0"), +}; static struct panel_generic_dpi_data lcd_panel = { .name = "generic", @@ -186,8 +187,9 @@ static struct omap_dss_board_info devkit8000_dss_data = { .default_device = &devkit8000_lcd_device, }; -static struct regulator_consumer_supply devkit8000_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; static uint32_t board_keymap[] = { KEY(0, 0, KEY_1), @@ -284,8 +286,8 @@ static struct regulator_init_data devkit8000_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &devkit8000_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), + .consumer_supplies = devkit8000_vmmc1_supply, }; /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ @@ -298,8 +300,8 @@ static struct regulator_init_data devkit8000_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &devkit8000_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), + .consumer_supplies = devkit8000_vdda_dac_supply, }; /* VPLL1 for digital video outputs */ @@ -327,8 +329,8 @@ static struct regulator_init_data devkit8000_vio = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &devkit8000_vio_supply, + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), + .consumer_supplies = devkit8000_vio_supply, }; static struct twl4030_usb_data devkit8000_usb_data = { diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 0c1bfca..84d2846 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void) static inline void __init igep2_init_smsc911x(void) { } #endif -static struct regulator_consumer_supply igep_vmmc1_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); +static struct regulator_consumer_supply igep_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), +}; /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ static struct regulator_init_data igep_vmmc1 = { @@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &igep_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), + .consumer_supplies = igep_vmmc1_supply, }; -static struct regulator_consumer_supply igep_vio_supply = - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); +static struct regulator_consumer_supply igep_vio_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), +}; static struct regulator_init_data igep_vio = { .constraints = { @@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &igep_vio_supply, + .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), + .consumer_supplies = igep_vio_supply, }; -static struct regulator_consumer_supply igep_vmmc2_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); +static struct regulator_consumer_supply igep_vmmc2_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), +}; static struct regulator_init_data igep_vmmc2 = { .constraints = { .valid_modes_mask = REGULATOR_MODE_NORMAL, .always_on = 1, }, - .num_consumer_supplies = 1, - .consumer_supplies = &igep_vmmc2_supply, + .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), + .consumer_supplies = igep_vmmc2_supply, }; static struct fixed_voltage_config igep_vwlan = { diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index f7d6038..069bc9f 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -213,8 +213,8 @@ static struct twl4030_madc_platform_data ldp_madc_data = { .irq_line = 1, }; -static struct regulator_consumer_supply ldp_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply ldp_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ @@ -228,8 +228,8 @@ static struct regulator_init_data ldp_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &ldp_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply), + .consumer_supplies = ldp_vmmc1_supply, }; /* ads7846 on SPI */ diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 7f21d24..4cf7c19 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -210,8 +210,9 @@ static struct omap_dss_board_info beagle_dss_data = { .default_device = &beagle_dvi_device, }; -static struct regulator_consumer_supply beagle_vdac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply beagle_vdac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; static struct regulator_consumer_supply beagle_vdvi_supplies[] = { REGULATOR_SUPPLY("vdds_dsi", "omapdss"), @@ -239,12 +240,12 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static struct regulator_consumer_supply beagle_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply beagle_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply beagle_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply beagle_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; static struct gpio_led gpio_leds[]; @@ -336,8 +337,8 @@ static struct regulator_init_data beagle_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &beagle_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply), + .consumer_supplies = beagle_vmmc1_supply, }; /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ @@ -351,8 +352,8 @@ static struct regulator_init_data beagle_vsim = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &beagle_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply), + .consumer_supplies = beagle_vsim_supply, }; /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ @@ -365,8 +366,8 @@ static struct regulator_init_data beagle_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &beagle_vdac_supply, + .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), + .consumer_supplies = beagle_vdac_supply, }; /* VPLL2 for digital video outputs */ diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index b4d4346..fc7a23a 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = { .default_device = &omap3_evm_lcd_device, }; -static struct regulator_consumer_supply omap3evm_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply omap3evm_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply omap3evm_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ @@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3evm_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply), + .consumer_supplies = omap3evm_vmmc1_supply, }; /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ @@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3evm_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply), + .consumer_supplies = omap3evm_vsim_supply, }; static struct omap2_hsmmc_info mmc[] = { @@ -449,8 +449,9 @@ static struct twl4030_codec_data omap3evm_codec_data = { .audio = &omap3evm_audio_data, }; -static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; /* VDAC for DSS driving S-Video */ static struct regulator_init_data omap3_evm_vdac = { @@ -463,8 +464,8 @@ static struct regulator_init_data omap3_evm_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3_evm_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), + .consumer_supplies = omap3_evm_vdda_dac_supply, }; /* VPLL2 for digital video outputs */ @@ -488,8 +489,9 @@ static struct regulator_init_data omap3_evm_vpll2 = { }; /* ads7846 on SPI */ -static struct regulator_consumer_supply omap3evm_vio_supply = - REGULATOR_SUPPLY("vcc", "spi1.0"); +static struct regulator_consumer_supply omap3evm_vio_supply[] = { + REGULATOR_SUPPLY("vcc", "spi1.0"), +}; /* VIO for ads7846 */ static struct regulator_init_data omap3evm_vio = { @@ -502,8 +504,8 @@ static struct regulator_init_data omap3evm_vio = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3evm_vio_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply), + .consumer_supplies = omap3evm_vio_supply, }; #ifdef CONFIG_WL12XX_PLATFORM_DATA @@ -511,16 +513,17 @@ static struct regulator_init_data omap3evm_vio = { #define OMAP3EVM_WLAN_PMENA_GPIO (150) #define OMAP3EVM_WLAN_IRQ_GPIO (149) -static struct regulator_consumer_supply omap3evm_vmmc2_supply = +static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); +}; /* VMMC2 for driving the WL12xx module */ static struct regulator_init_data omap3evm_vmmc2 = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3evm_vmmc2_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);, + .consumer_supplies = omap3evm_vmmc2_supply, }; static struct fixed_voltage_config omap3evm_vwlan = { diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 60d9be4..ec18435 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -55,8 +55,8 @@ #define OMAP3_TORPEDO_MMC_GPIO_CD 127 #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 -static struct regulator_consumer_supply omap3logic_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ @@ -71,8 +71,8 @@ static struct regulator_init_data omap3logic_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3logic_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply), + .consumer_supplies = omap3logic_vmmc1_supply, }; static struct twl4030_gpio_platform_data omap3logic_gpio_data = { diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 2a0bb48..e95bba2 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -319,17 +319,21 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { .setup = omap3pandora_twl_gpio_setup, }; -static struct regulator_consumer_supply pandora_vmmc1_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); +static struct regulator_consumer_supply pandora_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), +}; -static struct regulator_consumer_supply pandora_vmmc2_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); +static struct regulator_consumer_supply pandora_vmmc2_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1") +}; -static struct regulator_consumer_supply pandora_vmmc3_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); +static struct regulator_consumer_supply pandora_vmmc3_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), +}; -static struct regulator_consumer_supply pandora_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; static struct regulator_consumer_supply pandora_vdds_supplies[] = { REGULATOR_SUPPLY("vdds_sdi", "omapdss"), @@ -337,11 +341,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = { REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), }; -static struct regulator_consumer_supply pandora_vcc_lcd_supply = - REGULATOR_SUPPLY("vcc", "display0"); +static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = { + REGULATOR_SUPPLY("vcc", "display0"), +}; -static struct regulator_consumer_supply pandora_usb_phy_supply = - REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"); +static struct regulator_consumer_supply pandora_usb_phy_supply[] = { + REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), +}; /* ads7846 on SPI and 2 nub controllers on I2C */ static struct regulator_consumer_supply pandora_vaux4_supplies[] = { @@ -350,8 +356,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = { REGULATOR_SUPPLY("vcc", "3-0067"), }; -static struct regulator_consumer_supply pandora_adac_supply = - REGULATOR_SUPPLY("vcc", "soc-audio"); +static struct regulator_consumer_supply pandora_adac_supply[] = { + REGULATOR_SUPPLY("vcc", "soc-audio"), +}; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ static struct regulator_init_data pandora_vmmc1 = { @@ -364,8 +371,8 @@ static struct regulator_init_data pandora_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc1_supply), + .consumer_supplies = pandora_vmmc1_supply, }; /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */ @@ -379,8 +386,8 @@ static struct regulator_init_data pandora_vmmc2 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_vmmc2_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc2_supply), + .consumer_supplies = pandora_vmmc2_supply, }; /* VDAC for DSS driving S-Video */ @@ -394,8 +401,8 @@ static struct regulator_init_data pandora_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), + .consumer_supplies = pandora_vdda_dac_supply, }; /* VPLL2 for digital video outputs */ @@ -424,8 +431,8 @@ static struct regulator_init_data pandora_vaux1 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_vcc_lcd_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_vcc_lcd_supply), + .consumer_supplies = pandora_vcc_lcd_supply, }; /* VAUX2 for USB host PHY */ @@ -439,8 +446,8 @@ static struct regulator_init_data pandora_vaux2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_usb_phy_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_usb_phy_supply), + .consumer_supplies = pandora_usb_phy_supply, }; /* VAUX4 for ads7846 and nubs */ @@ -469,8 +476,8 @@ static struct regulator_init_data pandora_vsim = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_adac_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply), + .consumer_supplies = pandora_adac_supply, }; /* Fixed regulator internal to Wifi module */ @@ -478,8 +485,8 @@ static struct regulator_init_data pandora_vmmc3 = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &pandora_vmmc3_supply, + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc3_supply), + .consumer_supplies = pandora_vmmc3_supply, }; static struct fixed_voltage_config pandora_vwlan = { diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 0c108a2..99be540 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -206,12 +206,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = { .default_device = &omap3_stalker_dvi_device, }; -static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply omap3stalker_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ @@ -224,8 +224,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3stalker_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply), + .consumer_supplies = omap3stalker_vmmc1_supply, }; /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ @@ -238,8 +238,8 @@ static struct regulator_init_data omap3stalker_vsim = { .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3stalker_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply), + .consumer_supplies = omap3stalker_vsim_supply, }; static struct omap2_hsmmc_info mmc[] = { @@ -403,8 +403,9 @@ static struct twl4030_codec_data omap3stalker_codec_data = { .audio = &omap3stalker_audio_data, }; -static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; /* VDAC for DSS driving S-Video */ static struct regulator_init_data omap3_stalker_vdac = { @@ -417,8 +418,8 @@ static struct regulator_init_data omap3_stalker_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3_stalker_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), + .consumer_supplies = omap3_stalker_vdda_dac_supply, }; /* VPLL2 for digital video outputs */ diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 5f649fa..ab5c37d 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -114,12 +114,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct regulator_consumer_supply touchbook_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply touchbook_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply touchbook_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; static struct gpio_led gpio_leds[]; @@ -167,14 +167,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = { .setup = touchbook_twl_gpio_setup, }; -static struct regulator_consumer_supply touchbook_vdac_supply = { +static struct regulator_consumer_supply touchbook_vdac_supply[] = { +{ .supply = "vdac", .dev = &omap3_touchbook_lcd_device.dev, +}, }; -static struct regulator_consumer_supply touchbook_vdvi_supply = { +static struct regulator_consumer_supply touchbook_vdvi_supply[] = { +{ .supply = "vdvi", .dev = &omap3_touchbook_lcd_device.dev, +}, }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ @@ -188,8 +192,8 @@ static struct regulator_init_data touchbook_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &touchbook_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply), + .consumer_supplies = touchbook_vmmc1_supply, }; /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ @@ -203,8 +207,8 @@ static struct regulator_init_data touchbook_vsim = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &touchbook_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply), + .consumer_supplies = touchbook_vsim_supply, }; /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ @@ -217,8 +221,8 @@ static struct regulator_init_data touchbook_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &touchbook_vdac_supply, + .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), + .consumer_supplies = touchbook_vdac_supply, }; /* VPLL2 for digital video outputs */ @@ -232,8 +236,8 @@ static struct regulator_init_data touchbook_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &touchbook_vdvi_supply, + .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), + .consumer_supplies = touchbook_vdvi_supply, }; static struct twl4030_usb_data touchbook_usb_data = { diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 0cfe200..6d2372b 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -183,23 +183,19 @@ static struct omap2_hsmmc_info mmc[] = { }; static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { - { - .supply = "vmmc", - .dev_name = "omap_hsmmc.0", - }, + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply omap4_panda_vmmc5_supply = { - .supply = "vmmc", - .dev_name = "omap_hsmmc.4", +static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), }; static struct regulator_init_data panda_vmmc5 = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap4_panda_vmmc5_supply, + .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply), + .consumer_supplies = omap4_panda_vmmc5_supply, }; static struct fixed_voltage_config panda_vwlan = { @@ -312,7 +308,7 @@ static struct regulator_init_data omap4_panda_vmmc = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, + .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), .consumer_supplies = omap4_panda_vmmc_supply, }; diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 175e1ab..30c7556 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -74,15 +74,16 @@ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) /* fixed regulator for ads7846 */ -static struct regulator_consumer_supply ads7846_supply = - REGULATOR_SUPPLY("vcc", "spi1.0"); +static struct regulator_consumer_supply ads7846_supply[] = { + REGULATOR_SUPPLY("vcc", "spi1.0"), +}; static struct regulator_init_data vads7846_regulator = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &ads7846_supply, + .num_consumer_supplies = ARRAY_SIZE(ads7846_supply), + .consumer_supplies = ads7846_supply, }; static struct fixed_voltage_config vads7846 = { @@ -264,8 +265,9 @@ static struct omap_dss_board_info overo_dss_data = { .default_device = &overo_dvi_device, }; -static struct regulator_consumer_supply overo_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply overo_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { REGULATOR_SUPPLY("vdds_dsi", "omapdss"), @@ -319,8 +321,8 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static struct regulator_consumer_supply overo_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply overo_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) @@ -447,8 +449,8 @@ static struct regulator_init_data overo_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &overo_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply), + .consumer_supplies = overo_vmmc1_supply, }; /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ @@ -461,8 +463,8 @@ static struct regulator_init_data overo_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &overo_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), + .consumer_supplies = overo_vdda_dac_supply, }; /* VPLL2 for digital video outputs */ diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 9903667..5e559dd 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -358,14 +358,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = { {} /* Terminator */ }; -static struct regulator_consumer_supply rx51_vmmc1_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); +static struct regulator_consumer_supply rx51_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), +}; -static struct regulator_consumer_supply rx51_vaux3_supply = - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); +static struct regulator_consumer_supply rx51_vaux3_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), +}; -static struct regulator_consumer_supply rx51_vsim_supply = - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); +static struct regulator_consumer_supply rx51_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), +}; static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { /* tlv320aic3x analog supplies */ @@ -452,8 +455,8 @@ static struct regulator_init_data rx51_vaux3_mmc = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &rx51_vaux3_supply, + .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), + .consumer_supplies = rx51_vaux3_supply, }; static struct regulator_init_data rx51_vaux4 = { @@ -479,8 +482,8 @@ static struct regulator_init_data rx51_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &rx51_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), + .consumer_supplies = rx51_vmmc1_supply, }; static struct regulator_init_data rx51_vmmc2 = { @@ -511,8 +514,8 @@ static struct regulator_init_data rx51_vsim = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &rx51_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), + .consumer_supplies = rx51_vsim_supply, }; static struct regulator_init_data rx51_vdac = { @@ -526,7 +529,7 @@ static struct regulator_init_data rx51_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, + .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), .consumer_supplies = rx51_vdac_supply, }; diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 118c6f5..cb012e1 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = { .rep = 1, }; -static struct regulator_consumer_supply zoom_vmmc1_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply zoom_vmmc1_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply zoom_vsim_supply = { - .supply = "vmmc_aux", +static struct regulator_consumer_supply zoom_vsim_supply[] = { + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), }; -static struct regulator_consumer_supply zoom_vmmc2_supply = { - .supply = "vmmc", +static struct regulator_consumer_supply zoom_vmmc2_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), }; -static struct regulator_consumer_supply zoom_vmmc3_supply = { - .supply = "vmmc", - .dev_name = "omap_hsmmc.2", +static struct regulator_consumer_supply zoom_vmmc3_supply[] = { + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), }; /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ @@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vmmc1_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply), + .consumer_supplies = zoom_vmmc1_supply, }; /* VMMC2 for MMC2 card */ @@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vmmc2_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply), + .consumer_supplies = zoom_vmmc2_supply, }; /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ @@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = { | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vsim_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply), + .consumer_supplies = zoom_vsim_supply, }; static struct regulator_init_data zoom_vmmc3 = { .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vmmc3_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply), + .consumer_supplies = zoom_vmmc3_supply, }; static struct fixed_voltage_config zoom_vwlan = { @@ -232,8 +231,9 @@ static struct regulator_consumer_supply zoom_vpll2_supplies[] = { REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), }; -static struct regulator_consumer_supply zoom_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); +static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), +}; static struct regulator_init_data zoom_vpll2 = { .constraints = { @@ -257,8 +257,8 @@ static struct regulator_init_data zoom_vdac = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vdda_dac_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), + .consumer_supplies = zoom_vdda_dac_supply, }; static int zoom_twl_gpio_setup(struct device *dev, -- cgit v0.10.2 From fd4a0286cecd3b1e15771e02bc36bd8494a4a1d8 Mon Sep 17 00:00:00 2001 From: Oleg Drokin Date: Mon, 6 Jun 2011 18:57:08 +0000 Subject: Remove old-style supply.dev assignments common in hsmmc init CC: Mark Brown CC: Mike Rapoport CC: Nishant Kamat CC: Steve Sakoman CC: Felipe Balbi Signed-off-by: Oleg Drokin Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index e7bf32d..ceb581e 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -483,10 +483,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - cm_t35_vmmc1_supply.dev = mmc[0].dev; - cm_t35_vsim_supply.dev = mmc[0].dev; - return 0; } diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 069bc9f..2d7e0ae 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -341,8 +341,6 @@ static void __init omap_ldp_init(void) ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - ldp_vmmc1_supply.dev = mmc[0].dev; } MACHINE_START(OMAP_LDP, "OMAP LDP board") diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 4cf7c19..8ef0e19 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -268,10 +268,6 @@ static int beagle_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - beagle_vmmc1_supply.dev = mmc[0].dev; - beagle_vsim_supply.dev = mmc[0].dev; - /* * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active * high / others active low) diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index fc7a23a..e2202dd 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - omap3evm_vmmc1_supply.dev = mmc[0].dev; - omap3evm_vsim_supply.dev = mmc[0].dev; - /* * Most GPIOs are for USB OTG. Some are mostly sent to * the P2 connector; notably LEDA for the LCD backlight. diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index ec18435..eaefb59 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -130,8 +130,6 @@ static void __init board_mmc_init(void) } omap2_hsmmc_init(board_mmc_info); - /* link regulators to MMC adapters */ - omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev; } static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 99be540..63d12a3 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -321,10 +321,6 @@ omap3stalker_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - omap3stalker_vmmc1_supply.dev = mmc[0].dev; - omap3stalker_vsim_supply.dev = mmc[0].dev; - /* * Most GPIOs are for USB OTG. Some are mostly sent to * the P2 connector; notably LEDA for the LCD backlight. diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index ab5c37d..c80e2c3 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -137,10 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - touchbook_vmmc1_supply.dev = mmc[0].dev; - touchbook_vsim_supply.dev = mmc[0].dev; - /* REVISIT: need ehci-omap hooks for external VBUS * power switch and overcurrent detect */ diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 30c7556..031a9a6 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -417,8 +417,6 @@ static int overo_twl_gpio_setup(struct device *dev, { omap2_hsmmc_init(mmc); - overo_vmmc1_supply.dev = mmc[0].dev; - #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index cb012e1..8495f82 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -270,13 +270,6 @@ static int zoom_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters ... we "know" the - * regulators will be set up only *after* we return. - */ - zoom_vmmc1_supply.dev = mmc[0].dev; - zoom_vsim_supply.dev = mmc[0].dev; - zoom_vmmc2_supply.dev = mmc[1].dev; - ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable"); if (ret) -- cgit v0.10.2 From 08e6c611123ab499757e4133df7ddc0875c0dccf Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 9 Jun 2011 16:48:25 +0900 Subject: usb: renesas_usbhs: fixup connection fail Sometimes the connection fail happen on renesas_usbhs. This patch fix it up. Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 46e247a..aa591b6 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -462,8 +462,11 @@ static int usbhsg_ep_enable(struct usb_ep *ep, * if it already have pipe, * nothing to do */ - if (uep->pipe) + if (uep->pipe) { + usbhs_pipe_clear(uep->pipe); + usbhs_pipe_clear_sequence(uep->pipe); return 0; + } pipe = usbhs_pipe_malloc(priv, desc); if (pipe) { diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c index d0ae846..1b14cae 100644 --- a/drivers/usb/renesas_usbhs/pipe.c +++ b/drivers/usb/renesas_usbhs/pipe.c @@ -500,6 +500,12 @@ void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe) usbhsp_pipectrl_set(pipe, SQCLR, SQCLR); } +void usbhs_pipe_clear(struct usbhs_pipe *pipe) +{ + usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); + usbhsp_pipectrl_set(pipe, ACLRM, 0); +} + static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type) { struct usbhs_pipe *pos, *pipe; @@ -568,8 +574,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, INIT_LIST_HEAD(&pipe->list); /* pipe force init */ - usbhsp_pipectrl_set(pipe, ACLRM, ACLRM); - usbhsp_pipectrl_set(pipe, ACLRM, 0); + usbhs_pipe_clear(pipe); } info->done = done; diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h index 35e1004..41534cb 100644 --- a/drivers/usb/renesas_usbhs/pipe.h +++ b/drivers/usb/renesas_usbhs/pipe.h @@ -87,6 +87,7 @@ void usbhs_pipe_init(struct usbhs_priv *priv, int (*dma_map_ctrl)(struct usbhs_pkt *pkt, int map)); int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe); void usbhs_pipe_clear_sequence(struct usbhs_pipe *pipe); +void usbhs_pipe_clear(struct usbhs_pipe *pipe); int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe); void usbhs_pipe_enable(struct usbhs_pipe *pipe); void usbhs_pipe_disable(struct usbhs_pipe *pipe); -- cgit v0.10.2 From 0bd6c1a38f57127eeb9444ed74cf5b65f36f563c Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:39:31 -0400 Subject: ktest: Add POST/PRE_BUILD options There are some cases that a patch may be needed to apply to the kernel in patchcheck or bisect tests. Adding a PRE_BUILD option to apply the patch and POST_BUILD to remove it, allows for this to be done easily. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index fb46e12..d0e1de6 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -63,6 +63,10 @@ my $output_config; my $test_type; my $build_type; my $build_options; +my $pre_build; +my $post_build; +my $pre_build_die; +my $post_build_die; my $reboot_type; my $reboot_script; my $power_cycle; @@ -1189,6 +1193,14 @@ sub build { unlink $buildlog; + if (defined($pre_build)) { + my $ret = run_command $pre_build; + if (!$ret && defined($pre_build_die) && + $pre_build_die) { + dodie "failed to pre_build\n"; + } + } + if ($type =~ /^useconfig:(.*)/) { run_command "cp $1 $output_config" or dodie "could not copy $1 to .config"; @@ -1236,13 +1248,22 @@ sub build { make_oldconfig; $redirect = "$buildlog"; - if (!run_command "$make $build_options") { - undef $redirect; + my $build_ret = run_command "$make $build_options"; + undef $redirect; + + if (defined($post_build)) { + my $ret = run_command $post_build; + if (!$ret && defined($post_build_die) && + $post_build_die) { + dodie "failed to post_build\n"; + } + } + + if (!$build_ret) { # bisect may need this to pass return 0 if ($in_bisect); fail "failed build" and return 0; } - undef $redirect; return 1; } @@ -2244,6 +2265,10 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { $test_type = set_test_option("TEST_TYPE", $i); $build_type = set_test_option("BUILD_TYPE", $i); $build_options = set_test_option("BUILD_OPTIONS", $i); + $pre_build = set_test_option("PRE_BUILD", $i); + $post_build = set_test_option("POST_BUILD", $i); + $pre_build_die = set_test_option("PRE_BUILD_DIE", $i); + $post_build_die = set_test_option("POST_BUILD_DIE", $i); $power_cycle = set_test_option("POWER_CYCLE", $i); $reboot = set_test_option("REBOOT", $i); $noclean = set_test_option("BUILD_NOCLEAN", $i); diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index 0e5f764..1092e47 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -293,6 +293,38 @@ # or on some systems: #POST_INSTALL = ssh user@target /sbin/dracut -f /boot/initramfs-test.img $KERNEL_VERSION +# If there is a script that you require to run before the build is done +# you can specify it with PRE_BUILD. +# +# One example may be if you must add a temporary patch to the build to +# fix a unrelated bug to perform a patchcheck test. This will apply the +# patch before each build that is made. Use the POST_BUILD to do a git reset --hard +# to remove the patch. +# +# (default undef) +#PRE_BUILD = cd ${BUILD_DIR} && patch -p1 < /tmp/temp.patch + +# To specify if the test should fail if the PRE_BUILD fails, +# PRE_BUILD_DIE needs to be set to 1. Otherwise the PRE_BUILD +# result is ignored. +# (default 0) +# PRE_BUILD_DIE = 1 + +# If there is a script that should run after the build is done +# you can specify it with POST_BUILD. +# +# As the example in PRE_BUILD, POST_BUILD can be used to reset modifications +# made by the PRE_BUILD. +# +# (default undef) +#POST_BUILD = cd ${BUILD_DIR} && git reset --hard + +# To specify if the test should fail if the POST_BUILD fails, +# POST_BUILD_DIE needs to be set to 1. Otherwise the POST_BUILD +# result is ignored. +# (default 0) +#POST_BUILD_DIE = 1 + # Way to reboot the box to the test kernel. # Only valid options so far are "grub" and "script" # (default grub) -- cgit v0.10.2 From 4892063043282229c1296d86a2f86989ef30a97c Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:42:19 -0400 Subject: ktest: Have the testing tmp dir include machine name As multiple tests may be executed by the same server, have the test machine name add uniqueness to the value of the temp directory. Otherwise the temp directories may overwrite each other's tests. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index d0e1de6..24286ce 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -27,7 +27,7 @@ $default{"TEST_TYPE"} = "test"; $default{"BUILD_TYPE"} = "randconfig"; $default{"MAKE_CMD"} = "make"; $default{"TIMEOUT"} = 120; -$default{"TMP_DIR"} = "/tmp/ktest"; +$default{"TMP_DIR"} = "/tmp/ktest/\${MACHINE}"; $default{"SLEEP_TIME"} = 60; # sleep time between tests $default{"BUILD_NOCLEAN"} = 0; $default{"REBOOT_ON_ERROR"} = 0; diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index 1092e47..e2d8d83 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -392,8 +392,8 @@ #ADD_CONFIG = /home/test/config-broken # The location on the host where to write temp files -# (default /tmp/ktest) -#TMP_DIR = /tmp/ktest +# (default /tmp/ktest/${MACHINE}) +#TMP_DIR = /tmp/ktest/${MACHINE} # Optional log file to write the status (recommended) # Note, this is a DEFAULT section only option. -- cgit v0.10.2 From e7b13441895fd0f95c34a004eed364524cca71cb Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:44:36 -0400 Subject: ktest: Fix tar extracting of modules to target The tar command to create the module directory is cjf, but the extraction only had xf. This works on most versions of tar, but some versions of tar require xjf for extraction as well. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 24286ce..5b35fa0 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -1087,7 +1087,7 @@ sub install { unlink "$tmpdir/$modtar"; - run_ssh "'(cd / && tar xf /tmp/$modtar)'" or + run_ssh "'(cd / && tar xjf /tmp/$modtar)'" or dodie "failed to tar modules"; run_ssh "rm -f /tmp/$modtar"; -- cgit v0.10.2 From 1990207d538885e678f374e3e79f454c2e6c7383 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:46:25 -0400 Subject: ktest: Add IGNORE_WARNINGS to ignore warnings in some patches Doing a patchcheck test, there may be warnings that gcc produces which may be OK, and the test should not fail on that commit. By adding a IGNORE_WARNINGS option to list a space delimited SHA1s that are ignored lets the user avoid having the test fail on certain commits. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 5b35fa0..5924f14 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -104,6 +104,7 @@ my $monitor_cnt = 0; my $sleep_time; my $bisect_sleep_time; my $patchcheck_sleep_time; +my $ignore_warnings; my $store_failures; my $test_name; my $timeout; @@ -2074,6 +2075,13 @@ sub patchcheck { @list = reverse @list; my $save_clean = $noclean; + my %ignored_warnings; + + if (defined($ignore_warnings)) { + foreach my $sha1 (split /\s+/, $ignore_warnings) { + $ignored_warnings{$sha1} = 1; + } + } $in_patchcheck = 1; foreach my $item (@list) { @@ -2100,7 +2108,10 @@ sub patchcheck { build "oldconfig" or return 0; } - check_buildlog $sha1 or return 0; + + if (!defined($ignored_warnings{$sha1})) { + check_buildlog $sha1 or return 0; + } next if ($type eq "build"); @@ -2288,6 +2299,7 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { $sleep_time = set_test_option("SLEEP_TIME", $i); $bisect_sleep_time = set_test_option("BISECT_SLEEP_TIME", $i); $patchcheck_sleep_time = set_test_option("PATCHCHECK_SLEEP_TIME", $i); + $ignore_warnings = set_test_option("IGNORE_WARNINGS", $i); $bisect_manual = set_test_option("BISECT_MANUAL", $i); $bisect_skip = set_test_option("BISECT_SKIP", $i); $config_bisect_good = set_test_option("CONFIG_BISECT_GOOD", $i); diff --git a/tools/testing/ktest/sample.conf b/tools/testing/ktest/sample.conf index e2d8d83..82c966c 100644 --- a/tools/testing/ktest/sample.conf +++ b/tools/testing/ktest/sample.conf @@ -604,7 +604,12 @@ # build, boot, test. # # Note, the build test will look for warnings, if a warning occurred -# in a file that a commit touches, the build will fail. +# in a file that a commit touches, the build will fail, unless +# IGNORE_WARNINGS is set for the given commit's sha1 +# +# IGNORE_WARNINGS can be used to disable the failure of patchcheck +# on a particuler commit (SHA1). You can add more than one commit +# by adding a list of SHA1s that are space delimited. # # If BUILD_NOCLEAN is set, then make mrproper will not be run on # any of the builds, just like all other TEST_TYPE tests. But @@ -619,6 +624,7 @@ # PATCHCHECK_TYPE = boot # PATCHCHECK_START = 747e94ae3d1b4c9bf5380e569f614eb9040b79e7 # PATCHCHECK_END = HEAD~2 +# IGNORE_WARNINGS = 42f9c6b69b54946ffc0515f57d01dc7f5c0e4712 0c17ca2c7187f431d8ffc79e81addc730f33d128 # # # -- cgit v0.10.2 From ddf607e5f853ae172e81e6051e1e12e24ea8a3c6 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:49:13 -0400 Subject: ktest: Add helper function to avoid duplicate code Several places had the following code: get_grub_index; get_version; install; start_monitor; return monitor; Creating a function "start_monitor_and_boot()" replaces these mulitple uses with a single call. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 5924f14..099ceee 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -1096,6 +1096,23 @@ sub install { do_post_install; } +sub get_version { + # get the release name + doprint "$make kernelrelease ... "; + $version = `$make kernelrelease | tail -1`; + chomp($version); + doprint "$version\n"; +} + +sub start_monitor_and_boot { + get_grub_index; + get_version; + install; + + start_monitor; + return monitor; +} + sub check_buildlog { my ($patch) = @_; @@ -1307,14 +1324,6 @@ sub success { } } -sub get_version { - # get the release name - doprint "$make kernelrelease ... "; - $version = `$make kernelrelease | tail -1`; - chomp($version); - doprint "$version\n"; -} - sub answer_bisect { for (;;) { doprint "Pass or fail? [p/f]"; @@ -1479,12 +1488,7 @@ sub run_bisect_test { dodie "Failed on build" if $failed; # Now boot the box - get_grub_index; - get_version; - install; - - start_monitor; - monitor or $failed = 1; + start_monitor_and_boot or $failed = 1; if ($type ne "boot") { if ($failed && $bisect_skip) { @@ -2115,14 +2119,9 @@ sub patchcheck { next if ($type eq "build"); - get_grub_index; - get_version; - install; - my $failed = 0; - start_monitor; - monitor or $failed = 1; + start_monitor_and_boot or $failed = 1; if (!$failed && $type ne "boot"){ do_run_test or $failed = 1; @@ -2393,13 +2392,8 @@ for (my $i = 1; $i <= $opt{"NUM_TESTS"}; $i++) { } if ($test_type ne "build") { - get_grub_index; - get_version; - install; - my $failed = 0; - start_monitor; - monitor or $failed = 1;; + start_monitor_and_boot or $failed = 1; if (!$failed && $test_type ne "boot" && defined($run_test)) { do_run_test or $failed = 1; -- cgit v0.10.2 From 0df213ca31f43faf0b1d6c7108e190ff198b42d3 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Tue, 14 Jun 2011 20:51:37 -0400 Subject: ktest: Require one TEST_START in config file There has been too many times that I put in one too many SKIP TEST_STARTs and start the test with the default randconfig by accident that I added this to have ktest ask the user for which test they want to run if no TEST_START is specified. Now if I accidently start the test with all TEST_STARTs skipped, ktest asks what test do I want to run, and I now have a chance to kill it before it does a make mrproper on my build directory. Signed-off-by: Steven Rostedt diff --git a/tools/testing/ktest/ktest.pl b/tools/testing/ktest/ktest.pl index 099ceee..6166f3a 100755 --- a/tools/testing/ktest/ktest.pl +++ b/tools/testing/ktest/ktest.pl @@ -345,6 +345,7 @@ sub read_config { my $num_tests_set = 0; my $skip = 0; my $rest; + my $test_case = 0; while () { @@ -370,6 +371,7 @@ sub read_config { $rest = $1; $skip = 1; } else { + $test_case = 1; $skip = 0; } @@ -474,6 +476,15 @@ sub read_config { # make sure we have all mandatory configs get_ktest_configs; + # was a test specified? + if (!$test_case) { + print "No test case specified.\n"; + print "What test case would you like to run?\n"; + my $ans = ; + chomp $ans; + $default{"TEST_TYPE"} = $ans; + } + # set any defaults foreach my $default (keys %default) { -- cgit v0.10.2 From 664a51a81f6ba39db30cd7b7de61577ca0b2d20d Mon Sep 17 00:00:00 2001 From: Alan Stern Date: Wed, 15 Jun 2011 16:31:37 -0400 Subject: USB: deprecate g_file_storage This patch (as1471) deprecates the File-backed Storage Driver and schedules its replacement for the 3.8 kernel release (about two years from now). Users are advised to switch to the Mass Storage Gadget instead. Signed-off-by: Alan Stern Signed-off-by: Greg Kroah-Hartman diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index 1a9446b..21f331d 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -600,3 +600,10 @@ Why: Superseded by the UVCIOC_CTRL_QUERY ioctl. Who: Laurent Pinchart ---------------------------- + +What: g_file_storage driver +When: 3.8 +Why: This driver has been superseded by g_mass_storage. +Who: Alan Stern + +---------------------------- diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 9468adb..22e43ff 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -877,7 +877,7 @@ config USB_FUNCTIONFS_GENERIC no Ethernet interface. config USB_FILE_STORAGE - tristate "File-backed Storage Gadget" + tristate "File-backed Storage Gadget (DEPRECATED)" depends on BLOCK help The File-backed Storage Gadget acts as a USB Mass Storage @@ -888,6 +888,9 @@ config USB_FILE_STORAGE Say "y" to link the driver statically, or "m" to build a dynamically linked module called "g_file_storage". + NOTE: This driver is deprecated. Its replacement is the + Mass Storage Gadget. + config USB_FILE_STORAGE_TEST bool "File-backed Storage Gadget testing version" depends on USB_FILE_STORAGE @@ -907,14 +910,11 @@ config USB_MASS_STORAGE device (in much the same way as the "loop" device driver), specified as a module parameter or sysfs option. - This is heavily based on File-backed Storage Gadget and in most - cases you will want to use FSG instead. This gadget is mostly - here to test the functionality of the Mass Storage Function - which may be used with composite framework. + This driver is an updated replacement for the deprecated + File-backed Storage Gadget (g_file_storage). Say "y" to link the driver statically, or "m" to build - a dynamically linked module called "g_mass_storage". If unsure, - consider File-backed Storage Gadget. + a dynamically linked module called "g_mass_storage". config USB_G_SERIAL tristate "Serial Gadget (with CDC ACM and CDC OBEX support)" diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c index 0360f56..83bee30 100644 --- a/drivers/usb/gadget/file_storage.c +++ b/drivers/usb/gadget/file_storage.c @@ -3486,6 +3486,8 @@ static int __init fsg_bind(struct usb_gadget *gadget) } INFO(fsg, DRIVER_DESC ", version: " DRIVER_VERSION "\n"); + INFO(fsg, "NOTE: This driver is deprecated. " + "Consider using g_mass_storage instead.\n"); INFO(fsg, "Number of LUNs=%d\n", fsg->nluns); pathbuf = kmalloc(PATH_MAX, GFP_KERNEL); -- cgit v0.10.2 From df0a92c20652d70da70e5e4d08736cc485eaf1ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Thu, 16 Jun 2011 00:17:46 +0200 Subject: scripts/gcc-goto.sh: fix a typo ("suport") MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jonathan Neuschäfer Signed-off-by: Jiri Kosina diff --git a/scripts/gcc-goto.sh b/scripts/gcc-goto.sh index 520d16b..98cffcb9 100644 --- a/scripts/gcc-goto.sh +++ b/scripts/gcc-goto.sh @@ -1,5 +1,5 @@ #!/bin/sh -# Test for gcc 'asm goto' suport +# Test for gcc 'asm goto' support # Copyright (C) 2010, Jason Baron echo "int main(void) { entry: asm goto (\"\"::::entry); return 0; }" | $@ -x c - -c -o /dev/null >/dev/null 2>&1 && echo "y" -- cgit v0.10.2 From 1c5454eed85af71df9c01ab923e0c1b841b2e99b Mon Sep 17 00:00:00 2001 From: Ryan Mallon Date: Wed, 15 Jun 2011 14:45:36 +1000 Subject: Change Ryan Mallon's email address across the kernel I no longer work at Bluewater Systems. Update my email address accordingly. I have deleted my email address from C files rather than change it. This was suggested by several people, since the commit from my new email address will cause scripts/get_maintainer.pl to function properly. I have not added the .mailmap entry as suggested by Joe because I think it is no longer necessary if I touch all the files which had my name in them. Signed-off-by: Ryan Mallon Cc: Andre Renaud Cc: H Hartley Sweeten Cc: Russell King Cc: Nicolas Ferre Cc: Andrew Victor Cc: David Woodhouse Cc: Anton Vorontsov Cc: Paul Mundt Cc: Liam Girdwood Cc: Mark Brown Cc: Alan Cox Cc: Joe Perches Cc: Jesper Juhl Cc: Andrew Morton Cc: trivial@kernel.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/MAINTAINERS b/MAINTAINERS index bbe49d8..8552948 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -683,7 +683,7 @@ T: git git://git.infradead.org/users/cbou/linux-cns3xxx.git ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE M: Hartley Sweeten -M: Ryan Mallon +M: Ryan Mallon L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/mach-ep93xx/ diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 3eb0a11..6010ce1 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -4,7 +4,7 @@ * Copyright (C) 2010 Bluewater System Ltd * * Author: Andre Renaud - * Author: Ryan Mallon + * Author: Ryan Mallon * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/arm/mach-ep93xx/dma-m2p.c b/arch/arm/mach-ep93xx/dma-m2p.c index a696d35..1e036dd 100644 --- a/arch/arm/mach-ep93xx/dma-m2p.c +++ b/arch/arm/mach-ep93xx/dma-m2p.c @@ -5,7 +5,7 @@ * Copyright (C) 2006 Lennert Buytenhek * Copyright (C) 2006 Applied Data Systems * - * Copyright (C) 2009 Ryan Mallon + * Copyright (C) 2009 Ryan Mallon * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 415dce3..1a0f852 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -3,7 +3,7 @@ * * Generic EP93xx GPIO handling * - * Copyright (c) 2008 Ryan Mallon + * Copyright (c) 2008 Ryan Mallon * * Based on code originally from: * linux/arch/arm/mach-ep93xx/core.c diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c index d96dc1c..8392e95 100644 --- a/arch/arm/mach-ep93xx/simone.c +++ b/arch/arm/mach-ep93xx/simone.c @@ -2,7 +2,7 @@ * arch/arm/mach-ep93xx/simone.c * Simplemachines Sim.One support. * - * Copyright (C) 2010 Ryan Mallon + * Copyright (C) 2010 Ryan Mallon * * Based on the 2.6.24.7 support: * Copyright (C) 2009 Simplemachines @@ -65,7 +65,7 @@ static void __init simone_init_machine(void) } MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") -/* Maintainer: Ryan Mallon */ +/* Maintainer: Ryan Mallon */ .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index ac601fe..2e9c614 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c @@ -3,7 +3,7 @@ * Bluewater Systems Snapper CL15 system module * * Copyright (C) 2009 Bluewater Systems Ltd - * Author: Ryan Mallon + * Author: Ryan Mallon * * NAND code adapted from driver by: * Andre Renaud @@ -162,7 +162,7 @@ static void __init snappercl15_init_machine(void) } MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") - /* Maintainer: Ryan Mallon */ + /* Maintainer: Ryan Mallon */ .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/drivers/mtd/devices/sst25l.c b/drivers/mtd/devices/sst25l.c index 1e2c430..83e80c6 100644 --- a/drivers/mtd/devices/sst25l.c +++ b/drivers/mtd/devices/sst25l.c @@ -5,7 +5,7 @@ * * Copyright © 2009 Bluewater Systems Ltd * Author: Andre Renaud - * Author: Ryan Mallon + * Author: Ryan Mallon * * Based on m25p80.c * @@ -498,5 +498,5 @@ module_exit(sst25l_exit); MODULE_DESCRIPTION("MTD SPI driver for SST25L Flash chips"); MODULE_AUTHOR("Andre Renaud , " - "Ryan Mallon "); + "Ryan Mallon"); MODULE_LICENSE("GPL"); diff --git a/drivers/power/ds2782_battery.c b/drivers/power/ds2782_battery.c index 4d2dc4f..bfbce5d 100644 --- a/drivers/power/ds2782_battery.c +++ b/drivers/power/ds2782_battery.c @@ -3,7 +3,7 @@ * * Copyright (C) 2009 Bluewater Systems Ltd * - * Author: Ryan Mallon + * Author: Ryan Mallon * * DS2786 added by Yulia Vilensky * @@ -416,6 +416,6 @@ static void __exit ds278x_exit(void) } module_exit(ds278x_exit); -MODULE_AUTHOR("Ryan Mallon "); +MODULE_AUTHOR("Ryan Mallon"); MODULE_DESCRIPTION("Maxim/Dallas DS2782 Stand-Alone Fuel Gauage IC driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/ep93xx-fb.c index cbdb1bd..40e5f17 100644 --- a/drivers/video/ep93xx-fb.c +++ b/drivers/video/ep93xx-fb.c @@ -4,7 +4,7 @@ * Framebuffer support for the EP93xx series. * * Copyright (C) 2007 Bluewater Systems Ltd - * Author: Ryan Mallon + * Author: Ryan Mallon * * Copyright (c) 2009 H Hartley Sweeten * @@ -644,6 +644,6 @@ module_exit(ep93xxfb_exit); MODULE_DESCRIPTION("EP93XX Framebuffer Driver"); MODULE_ALIAS("platform:ep93xx-fb"); -MODULE_AUTHOR("Ryan Mallon , " +MODULE_AUTHOR("Ryan Mallon, " "H Hartley Sweeten + * Copyright (C) 2010 Ryan Mallon * * Based on the original driver by: * Copyright (C) 2007 Chase Douglas @@ -477,6 +477,6 @@ module_init(ep93xx_i2s_init); module_exit(ep93xx_i2s_exit); MODULE_ALIAS("platform:ep93xx-i2s"); -MODULE_AUTHOR("Ryan Mallon "); +MODULE_AUTHOR("Ryan Mallon"); MODULE_DESCRIPTION("EP93XX I2S driver"); MODULE_LICENSE("GPL"); diff --git a/sound/soc/ep93xx/ep93xx-pcm.c b/sound/soc/ep93xx/ep93xx-pcm.c index a456e49..d009c179 100644 --- a/sound/soc/ep93xx/ep93xx-pcm.c +++ b/sound/soc/ep93xx/ep93xx-pcm.c @@ -5,7 +5,7 @@ * Copyright (C) 2006 Applied Data Systems * * Rewritten for the SoC audio subsystem (Based on PXA2xx code): - * Copyright (c) 2008 Ryan Mallon + * Copyright (c) 2008 Ryan Mallon * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -333,6 +333,6 @@ static void __exit ep93xx_soc_platform_exit(void) module_init(ep93xx_soc_platform_init); module_exit(ep93xx_soc_platform_exit); -MODULE_AUTHOR("Ryan Mallon "); +MODULE_AUTHOR("Ryan Mallon"); MODULE_DESCRIPTION("EP93xx ALSA PCM interface"); MODULE_LICENSE("GPL"); diff --git a/sound/soc/ep93xx/snappercl15.c b/sound/soc/ep93xx/snappercl15.c index dfe1d7f..c8aa8a5 100644 --- a/sound/soc/ep93xx/snappercl15.c +++ b/sound/soc/ep93xx/snappercl15.c @@ -2,7 +2,7 @@ * snappercl15.c -- SoC audio for Bluewater Systems Snapper CL15 module * * Copyright (C) 2008 Bluewater Systems Ltd - * Author: Ryan Mallon + * Author: Ryan Mallon * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -140,7 +140,7 @@ static void __exit snappercl15_exit(void) module_init(snappercl15_init); module_exit(snappercl15_exit); -MODULE_AUTHOR("Ryan Mallon "); +MODULE_AUTHOR("Ryan Mallon"); MODULE_DESCRIPTION("ALSA SoC Snapper CL15"); MODULE_LICENSE("GPL"); -- cgit v0.10.2 From 741e3a89dee8a17aa9373975d51f130a65e1683d Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 17 May 2011 03:51:26 -0700 Subject: omap: Use separate init_irq functions to avoid cpu_is_omap tests early This allows us to remove cpu_is_omap calls from init_irq functions. There should not be any need for cpu_is_omap calls as at this point. During the timer init we only care about SoC generation, and not about subrevisions. The main reason for the patch is that we want to initialize only minimal omap specific code from the init_early call. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index de88c92..17ed757 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value) static void __init ams_delta_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static struct map_desc ams_delta_io_desc[] __initdata = { diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 87f173d..eaff305 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -329,7 +329,7 @@ static void __init omap_fsample_init(void) static void __init omap_fsample_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } /* Only FPGA needs to be mapped here. All others are done with ioremap */ diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 23f4ab9..3fd6b40 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -31,7 +31,7 @@ static void __init omap_generic_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } /* assume no Mini-AB port */ diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index ba3bd09..8147b04 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { static void __init h2_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static struct omap_usb_config h2_usb_config __initdata = { diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index ac48677..1b448f6 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -439,7 +439,7 @@ static void __init h3_init(void) static void __init h3_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static void __init h3_map_io(void) diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index ba05a51..1bd4d8e 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void) { printk(KERN_INFO "htcherald_init_irq.\n"); omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } MACHINE_START(HERALD, "HTC Herald") diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2d9b8cb..5926b0c 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void) static void __init innovator_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } #ifdef CONFIG_ARCH_OMAP15XX diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index cfd0849..e3cf21d 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void) omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static const unsigned int nokia770_keymap[] = { diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index e68dfde..1e7823d 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -282,7 +282,7 @@ static void __init osk_init_cf(void) static void __init osk_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static struct omap_usb_config osk_usb_config __initdata = { diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index c9d38f4..8b6a881 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -62,7 +62,7 @@ static void __init omap_palmte_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static const unsigned int palmte_keymap[] = { diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index f04f2d3..f2de43d 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = { static void __init omap_palmtt_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static struct omap_usb_config palmtt_usb_config __initdata = { diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 45f01d2..6665d2d 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -61,7 +61,7 @@ static void __init omap_palmz71_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static const unsigned int palmz71_keymap[] = { diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 3c8ee84..7f019e5 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void) static void __init omap_perseus2_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc omap_perseus2_io_desc[] __initdata = { diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 0ad781d..24f0f7b 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -411,7 +411,7 @@ static void __init omap_sx1_init(void) static void __init omap_sx1_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } /*----------------------------------------*/ diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 65d2420..98826e2 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = { static void __init voiceblue_init_irq(void) { omap1_init_common_hw(); - omap_init_irq(); + omap1_init_irq(); } static void __init voiceblue_map_io(void) diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 5d3da7a..e2b9c90 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = { .irq_set_wake = omap_wake_irq, }; -void __init omap_init_irq(void) +void __init omap1_init_irq(void) { int i, j; diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 5de6eac..45cabc5 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .reserve = omap_reserve, .map_io = omap_2430sdp_map_io, .init_early = omap_2430sdp_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = omap_2430sdp_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 5dac974..85b207f 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap_3430sdp_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap_3430sdp_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index a5933cc..2ec2d76 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap_sdp_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap_sdp_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 5e438a7..0bed0a4 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = am3517_crane_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = am3517_crane_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 63af417..0db0fb8 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = am3517_evm_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = am3517_evm_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index b124bdf..93576c8 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") .reserve = omap_reserve, .map_io = omap_apollon_map_io, .init_early = omap_apollon_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = omap_apollon_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 77456de..2940d64 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -646,7 +646,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = cm_t35_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = cm_t35_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index c3a9fd3..8f15222 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -304,7 +304,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = cm_t3517_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = cm_t3517_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 34956ec..00f6cb6 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -438,7 +438,7 @@ static void __init devkit8000_init_early(void) static void __init devkit8000_init_irq(void) { - omap_init_irq(); + omap3_init_irq(); #ifdef CONFIG_OMAP_32K_TIMER omap2_gp_clockevent_set_gptimer(12); #endif diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 73e3c31..ccd503a 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") .reserve = omap_reserve, .map_io = omap_generic_map_io, .init_early = omap_generic_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = omap_generic_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index bac7933..2e16d6c 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void) static void __init omap_h4_init_irq(void) { - omap_init_irq(); + omap2_init_irq(); } static struct at24_platform_data m24c01 = { diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 0c1bfca..359b765 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -703,7 +703,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = igep_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = igep_init, .timer = &omap_timer, MACHINE_END @@ -713,7 +713,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = igep_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = igep_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index f7d6038..a054f54 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -350,7 +350,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap_ldp_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap_ldp_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 8d74318..9c791a2 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -699,7 +699,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .reserve = omap_reserve, .map_io = n8x0_map_io, .init_early = n8x0_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap_timer, MACHINE_END @@ -709,7 +709,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .reserve = omap_reserve, .map_io = n8x0_map_io, .init_early = n8x0_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap_timer, MACHINE_END @@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .reserve = omap_reserve, .map_io = n8x0_map_io, .init_early = n8x0_init_early, - .init_irq = omap_init_irq, + .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 7f21d24..4560055 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -486,7 +486,7 @@ static void __init omap3_beagle_init_early(void) static void __init omap3_beagle_init_irq(void) { - omap_init_irq(); + omap3_init_irq(); #ifdef CONFIG_OMAP_32K_TIMER omap2_gp_clockevent_set_gptimer(12); #endif diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index b4d4346..79d5362 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -740,7 +740,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3_evm_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_evm_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 60d9be4..739fdfc 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -215,7 +215,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap3logic_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3logic_init, .timer = &omap_timer, MACHINE_END @@ -224,7 +224,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap3logic_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3logic_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 2a0bb48..7b4e139 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -642,7 +642,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3pandora_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3pandora_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 0c108a2..0161626 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -494,7 +494,7 @@ static void __init omap3_stalker_init_early(void) static void __init omap3_stalker_init_irq(void) { - omap_init_irq(); + omap3_init_irq(); #ifdef CONFIG_OMAP_32K_TIMER omap2_gp_clockevent_set_gptimer(12); #endif diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 5f649fa..3cc5531 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -371,7 +371,7 @@ static void __init omap3_touchbook_init_early(void) static void __init omap3_touchbook_init_irq(void) { - omap_init_irq(); + omap3_init_irq(); #ifdef CONFIG_OMAP_32K_TIMER omap2_gp_clockevent_set_gptimer(12); #endif diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 175e1ab..9c9f20c 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = overo_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = overo_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 42d10b1..9c3d115 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .reserve = omap_reserve, .map_io = rm680_map_io, .init_early = rm680_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = rm680_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index fec4cac..ee35e4e 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .reserve = rx51_reserve, .map_io = rx51_map_io, .init_early = rx51_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = rx51_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 09fa7bf..713c20f 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -33,11 +33,6 @@ static void __init ti8168_init_early(void) omap2_init_common_devices(NULL, NULL); } -static void __init ti8168_evm_init_irq(void) -{ - omap_init_irq(); -} - static void __init ti8168_evm_init(void) { omap_serial_init(); @@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") .boot_params = 0x80000100, .map_io = ti8168_evm_map_io, .init_early = ti8168_init_early, - .init_irq = ti8168_evm_init_irq, + .init_irq = ti816x_init_irq, .timer = &omap_timer, .init_machine = ti8168_evm_init, MACHINE_END diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 4b133d7..97a3f0b 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap_zoom_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, .timer = &omap_timer, MACHINE_END @@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap_zoom_init_early, - .init_irq = omap_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, .timer = &omap_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 441e79d..2ce1ce6 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } +/* See irq.c, omap4-common.c and entry-macro.S */ void __iomem *omap_irq_base; -/* - * Initialize asm_irq_base for entry-macro.S - */ -static inline void omap_irq_base_init(void) -{ - if (cpu_is_omap24xx()) - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); - else if (cpu_is_omap34xx()) - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE); - else if (cpu_is_omap44xx()) - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); - else - pr_err("Could not initialize omap_irq_base\n"); -} - void __init omap2_init_common_infrastructure(void) { u8 postsetup_state; @@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, _omap2_init_reprogram_sdrc(); } - omap_irq_base_init(); } /* diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3af2b7a..3a12f75 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) IRQ_NOREQUEST | IRQ_NOPROBE, 0); } -void __init omap_init_irq(void) +static void __init omap_init_irq(u32 base, int nr_irqs) { unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i, j; + omap_irq_base = ioremap(base, SZ_4K); + if (WARN_ON(!omap_irq_base)) + return; + for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { - unsigned long base = 0; struct omap_irq_bank *bank = irq_banks + i; - if (cpu_is_omap24xx()) - base = OMAP24XX_IC_BASE; - else if (cpu_is_omap34xx()) - base = OMAP34XX_IC_BASE; - - BUG_ON(!base); - - if (cpu_is_ti816x()) - bank->nr_irqs = 128; + bank->nr_irqs = nr_irqs; /* Static mapping, never released */ bank->base_reg = ioremap(base, SZ_4K); @@ -181,6 +176,21 @@ void __init omap_init_irq(void) nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); } +void __init omap2_init_irq(void) +{ + omap_init_irq(OMAP24XX_IC_BASE, 96); +} + +void __init omap3_init_irq(void) +{ + omap_init_irq(OMAP34XX_IC_BASE, 96); +} + +void __init ti816x_init_irq(void) +{ + omap_init_irq(OMAP34XX_IC_BASE, 128); +} + #ifdef CONFIG_ARCH_OMAP3 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 9ef8c29..35ac3e5 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -19,6 +19,8 @@ #include #include +#include + #include #include @@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr; void __init gic_init_irq(void) { - void __iomem *gic_cpu_base; - /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); BUG_ON(!gic_dist_base_addr); /* Static mapping, never released */ - gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); - BUG_ON(!gic_cpu_base); + omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); + BUG_ON(!omap_irq_base); - gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); + gic_init(0, 29, gic_dist_base_addr, omap_irq_base); } #ifdef CONFIG_CACHE_L2X0 diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 5a25098..c884320 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -428,7 +428,11 @@ #define INTCPS_NR_IRQS 96 #ifndef __ASSEMBLY__ -extern void omap_init_irq(void); +extern void __iomem *omap_irq_base; +void omap1_init_irq(void); +void omap2_init_irq(void); +void omap3_init_irq(void); +void ti816x_init_irq(void); extern int omap_irq_pending(void); void omap_intc_save_context(void); void omap_intc_restore_context(void); -- cgit v0.10.2 From f0f3ca8d967462dafb815412b14ca3339b9817a6 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Wed, 15 Jun 2011 11:53:13 +0200 Subject: docproc: cleanup brace placement The placement of the opening brace "{" after 'if' statements in scripts/docproc.c is inconsistent. Most are placed on the same line as the 'if' statement itself as per CodingStyle, but a few are not. This patch cleans up the inconsistency. We save a few source lines and the file then uses the same style throughout, which is nice. Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/scripts/docproc.c b/scripts/docproc.c index 98dec87..4cfdc17 100644 --- a/scripts/docproc.c +++ b/scripts/docproc.c @@ -205,8 +205,7 @@ static void find_export_symbols(char * filename) PATH_MAX - strlen(real_filename)); sym = add_new_file(filename); fp = fopen(real_filename, "r"); - if (fp == NULL) - { + if (fp == NULL) { fprintf(stderr, "docproc: "); perror(real_filename); exit(1); @@ -487,8 +486,7 @@ static void parse_file(FILE *infile) default: defaultline(line); } - } - else { + } else { defaultline(line); } } @@ -519,8 +517,7 @@ int main(int argc, char *argv[]) exit(2); } - if (strcmp("doc", argv[1]) == 0) - { + if (strcmp("doc", argv[1]) == 0) { /* Need to do this in two passes. * First pass is used to collect all symbols exported * in the various files; @@ -556,9 +553,7 @@ int main(int argc, char *argv[]) fprintf(stderr, "Warning: didn't use docs for %s\n", all_list[i]); } - } - else if (strcmp("depend", argv[1]) == 0) - { + } else if (strcmp("depend", argv[1]) == 0) { /* Create first part of dependency chain * file.tmpl */ printf("%s\t", argv[2]); @@ -571,9 +566,7 @@ int main(int argc, char *argv[]) findall = adddep; parse_file(infile); printf("\n"); - } - else - { + } else { fprintf(stderr, "Unknown option: %s\n", argv[1]); exit(1); } -- cgit v0.10.2 From 32d206eb5637d8cf73d9c70f7680de2a7193ce8b Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 19 May 2011 20:09:28 +0000 Subject: powerpc/book3e: Clarify HW table walk enable/disable message Before if we didn't support or enable HW table walk we'd get a messaage like: MMU: Book3E Page Tables Disabled Which is a bit misleading. Now it will say: MMU: Book3E HW tablewalk not supported Signed-off-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c index 0bdad3a..5693499 100644 --- a/arch/powerpc/mm/tlb_nohash.c +++ b/arch/powerpc/mm/tlb_nohash.c @@ -473,8 +473,8 @@ static void setup_mmu_htw(void) (unsigned long)&exc_instruction_tlb_miss_htw_book3e, 0); book3e_htw_enabled = 1; } - pr_info("MMU: Book3E Page Tables %s\n", - book3e_htw_enabled ? "Enabled" : "Disabled"); + pr_info("MMU: Book3E HW tablewalk %s\n", + book3e_htw_enabled ? "enabled" : "not supported"); } /* -- cgit v0.10.2 From 7ac87abb8166b99584149fcfb2efef5773a078e9 Mon Sep 17 00:00:00 2001 From: Matt Evans Date: Wed, 25 May 2011 18:09:12 +0000 Subject: powerpc: Fix early boot accounting of CPUs smp_release_cpus() waits for all cpus (including the bootcpu) due to an off-by-one count on boot_cpu_count (which is all CPUs). This patch replaces that with spinning_secondaries (which is all secondary CPUs). Signed-off-by: Matt Evans Signed-off-by: Benjamin Herrenschmidt diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index 11eb404..b2a4c2d 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h @@ -30,7 +30,7 @@ #include extern int boot_cpuid; -extern int boot_cpu_count; +extern int spinning_secondaries; extern void cpu_die(void); diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index ba50409..3564c49 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -255,7 +255,7 @@ generic_secondary_common_init: mtctr r23 bctrl -3: LOAD_REG_ADDR(r3, boot_cpu_count) /* Decrement boot_cpu_count */ +3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */ lwarx r4,0,r3 subi r4,r4,1 stwcx. r4,0,r3 diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index f2c906b..534c503 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -69,6 +69,7 @@ unsigned long tce_alloc_start, tce_alloc_end; u64 ppc64_rma_size; #endif static phys_addr_t first_memblock_size; +static int __initdata boot_cpu_count; static int __init early_parse_mem(char *p) { @@ -748,6 +749,13 @@ void __init early_init_devtree(void *params) */ of_scan_flat_dt(early_init_dt_scan_cpus, NULL); +#if defined(CONFIG_SMP) && defined(CONFIG_PPC64) + /* We'll later wait for secondaries to check in; there are + * NCPUS-1 non-boot CPUs :-) + */ + spinning_secondaries = boot_cpu_count - 1; +#endif + DBG(" <- early_init_devtree()\n"); } diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 620d792..1d2fbc9 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c @@ -48,7 +48,6 @@ extern void bootx_init(unsigned long r4, unsigned long phys); int boot_cpuid = -1; EXPORT_SYMBOL_GPL(boot_cpuid); -int __initdata boot_cpu_count; int boot_cpuid_phys; int smp_hw_index[NR_CPUS]; diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index a88bf27..0576919 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -73,7 +73,7 @@ #endif int boot_cpuid = 0; -int __initdata boot_cpu_count; +int __initdata spinning_secondaries; u64 ppc64_pft_size; /* Pick defaults since we might want to patch instructions @@ -253,11 +253,11 @@ void smp_release_cpus(void) for (i = 0; i < 100000; i++) { mb(); HMT_low(); - if (boot_cpu_count == 0) + if (spinning_secondaries == 0) break; udelay(1); } - DBG("boot_cpu_count = %d\n", boot_cpu_count); + DBG("spinning_secondaries = %d\n", spinning_secondaries); DBG(" <- smp_release_cpus()\n"); } -- cgit v0.10.2 From 4ca9d7856c101f4b1d2c7d3f2ad2fcce8e9a20ae Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Fri, 17 Jun 2011 15:14:23 +0200 Subject: ARM: remove duplicate include from arch/arm/mach-dove/common.c Jesper Juhl pointed out there is a redundant include of linux/serial_8250.h. However it turns out both are redundant. This patch removes them both. Reported-by: Jesper Juhl Signed-off-by: Andrew Lunn Reviewed-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 5ed51b8..83dce85 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -13,11 +13,9 @@ #include #include #include -#include #include #include #include -#include #include #include #include -- cgit v0.10.2 From 36715cef0770b7e2547892b7c3197fc024274630 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sat, 11 Jun 2011 17:53:57 -0600 Subject: writeback: skip tmpfs early in balance_dirty_pages_ratelimited_nr() This helps prevent tmpfs dirtiers from skewing the per-cpu bdp_ratelimits. Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/mm/page-writeback.c b/mm/page-writeback.c index b2529f8..1965d05 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -490,9 +490,6 @@ static void balance_dirty_pages(struct address_space *mapping, bool dirty_exceeded = false; struct backing_dev_info *bdi = mapping->backing_dev_info; - if (!bdi_cap_account_dirty(bdi)) - return; - for (;;) { struct writeback_control wbc = { .sync_mode = WB_SYNC_NONE, @@ -631,9 +628,13 @@ static DEFINE_PER_CPU(unsigned long, bdp_ratelimits) = 0; void balance_dirty_pages_ratelimited_nr(struct address_space *mapping, unsigned long nr_pages_dirtied) { + struct backing_dev_info *bdi = mapping->backing_dev_info; unsigned long ratelimit; unsigned long *p; + if (!bdi_cap_account_dirty(bdi)) + return; + ratelimit = ratelimit_pages; if (mapping->backing_dev_info->dirty_exceeded) ratelimit = 8; -- cgit v0.10.2 From 9ca980dce523760ce04a798470d36fd5aa596b78 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Wed, 25 May 2011 23:34:12 +0000 Subject: powerpc: Avoid extra indirect function call in sending IPIs On many platforms (including pSeries), smp_ops->message_pass is always smp_muxed_ipi_message_pass. This changes arch/powerpc/kernel/smp.c so that if smp_ops->message_pass is NULL, it calls smp_muxed_ipi_message_pass directly. This means that a platform doesn't need to set both .message_pass and .cause_ipi, only one of them. It is a slight performance improvement in that it gets rid of an indirect function call at the expense of a predictable conditional branch. Signed-off-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 8ebc670..2975f64 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -238,15 +238,25 @@ irqreturn_t smp_ipi_demux(void) } #endif /* CONFIG_PPC_SMP_MUXED_IPI */ +static inline void do_message_pass(int cpu, int msg) +{ + if (smp_ops->message_pass) + smp_ops->message_pass(cpu, msg); +#ifdef CONFIG_PPC_SMP_MUXED_IPI + else + smp_muxed_ipi_message_pass(cpu, msg); +#endif +} + void smp_send_reschedule(int cpu) { if (likely(smp_ops)) - smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); + do_message_pass(cpu, PPC_MSG_RESCHEDULE); } void arch_send_call_function_single_ipi(int cpu) { - smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); + do_message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); } void arch_send_call_function_ipi_mask(const struct cpumask *mask) @@ -254,7 +264,7 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask) unsigned int cpu; for_each_cpu(cpu, mask) - smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION); + do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); } #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) @@ -268,7 +278,7 @@ void smp_send_debugger_break(void) for_each_online_cpu(cpu) if (cpu != me) - smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); + do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); } #endif diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index d6a93a10..8eef8d2 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c @@ -236,7 +236,7 @@ void __init mpc85xx_smp_init(void) } if (cpu_has_feature(CPU_FTR_DBELL)) { - smp_85xx_ops.message_pass = smp_muxed_ipi_message_pass; + /* .message_pass defaults to smp_muxed_ipi_message_pass */ smp_85xx_ops.cause_ipi = doorbell_cause_ipi; } diff --git a/arch/powerpc/platforms/iseries/smp.c b/arch/powerpc/platforms/iseries/smp.c index e3265ad..2df48c2 100644 --- a/arch/powerpc/platforms/iseries/smp.c +++ b/arch/powerpc/platforms/iseries/smp.c @@ -75,7 +75,7 @@ static void __devinit smp_iSeries_setup_cpu(int nr) } static struct smp_ops_t iSeries_smp_ops = { - .message_pass = smp_muxed_ipi_message_pass, + .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ .cause_ipi = smp_iSeries_cause_ipi, .probe = smp_iSeries_probe, .kick_cpu = smp_iSeries_kick_cpu, diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index db092d7..d15fca3 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c @@ -447,7 +447,7 @@ void __init smp_psurge_give_timebase(void) /* PowerSurge-style Macs */ struct smp_ops_t psurge_smp_ops = { - .message_pass = smp_muxed_ipi_message_pass, + .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ .cause_ipi = smp_psurge_cause_ipi, .probe = smp_psurge_probe, .kick_cpu = smp_psurge_kick_cpu, diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index fbffd7e..84dafd3 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c @@ -207,7 +207,7 @@ static struct smp_ops_t pSeries_mpic_smp_ops = { }; static struct smp_ops_t pSeries_xics_smp_ops = { - .message_pass = smp_muxed_ipi_message_pass, + .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */ .probe = xics_smp_probe, .kick_cpu = smp_pSeries_kick_cpu, diff --git a/arch/powerpc/platforms/wsp/smp.c b/arch/powerpc/platforms/wsp/smp.c index 9d20fa9..71bd105 100644 --- a/arch/powerpc/platforms/wsp/smp.c +++ b/arch/powerpc/platforms/wsp/smp.c @@ -75,7 +75,7 @@ static int __init smp_a2_probe(void) } static struct smp_ops_t a2_smp_ops = { - .message_pass = smp_muxed_ipi_message_pass, + .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ .cause_ipi = doorbell_cause_ipi, .probe = smp_a2_probe, .kick_cpu = smp_a2_kick_cpu, -- cgit v0.10.2 From 77ef4899f80e6335e9f0b2a7487017643de006da Mon Sep 17 00:00:00 2001 From: Dmitry Eremin-Solenikov Date: Mon, 30 May 2011 01:56:09 +0000 Subject: powerpc/mpic: Support compiling with DEBUG enabled Support compilation of mpic.c with DEBUG defined, as now we have irq_desc and not irq number. Signed-off-by: Dmitry Eremin-Solenikov Signed-off-by: Benjamin Herrenschmidt diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 3a8de5b..3f995dc 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -848,7 +848,7 @@ static void mpic_unmask_tm(struct irq_data *d) struct mpic *mpic = mpic_from_irq_data(d); unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0]; - DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, irq, src); + DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, d->irq, src); mpic_tm_write(src, mpic_tm_read(src) & ~MPIC_VECPRI_MASK); mpic_tm_read(src); } -- cgit v0.10.2 From b6935f8cd915cf11c5222cab5ecc6a45adb2270c Mon Sep 17 00:00:00 2001 From: Christian Kujau Date: Tue, 31 May 2011 15:22:05 +0000 Subject: Document powerpc udbg-immortal Back in 2006 the "udbg-immortal" kernel option has been introduced: > commit 3b5e905ee3bd23e9311951890aba57a0dbc81ca4 > Author: Benjamin Herrenschmidt > Date: Wed Jun 7 12:06:20 2006 +1000 > > [PATCH] powerpc: Add udbg-immortal kernel option ...but I could not find it documented anywhere in the sources. This patch adds it to Documentation/kernel-parameters.txt. Signed-off-by: Christian Kujau Signed-off-by: Benjamin Herrenschmidt diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index fd248a31..960c321 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2524,6 +2524,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. ,,,,,,, See also Documentation/input/joystick-parport.txt + udbg-immortal [PPC] When debugging early kernel crashes that + happen after console_init() and before a proper + console driver takes over, this boot options might + help "seeing" what's going on. + uhash_entries= [KNL,NET] Set number of hash buckets for UDP/UDP-Lite connections -- cgit v0.10.2 From dc28518f7d7dfd93cd44edb44f9b8e961f5a5c1b Mon Sep 17 00:00:00 2001 From: Michael Neuling Date: Sun, 5 Jun 2011 16:48:47 +0000 Subject: powerpc: Fix doorbell type shift doorbell type is defined as bits 32:36 so should be shifted by 63-36 = 27 rather than 28. We never noticed this bug as we've only every used type PPC_DBELL = 0. Signed-off-by: Michael Neuling Acked-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h index 9c70d0c..efa74ac 100644 --- a/arch/powerpc/include/asm/dbell.h +++ b/arch/powerpc/include/asm/dbell.h @@ -18,7 +18,7 @@ #include #define PPC_DBELL_MSG_BRDCAST (0x04000000) -#define PPC_DBELL_TYPE(x) (((x) & 0xf) << 28) +#define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36)) enum ppc_dbell { PPC_DBELL = 0, /* doorbell */ PPC_DBELL_CRIT = 1, /* critical doorbell */ -- cgit v0.10.2 From e74984e46e899c22137a385869fb4f3ae756e3df Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 29 Mar 2011 15:54:48 -0700 Subject: omap: Set separate timer init functions to avoid cpu_is_omap tests This is needed for the following patches so we can initialize the rest of the hardware timers later on. As with the init_irq calls, there's no need to do cpu_is_omap calls during the timer init as we only care about the major omap generation. This means that we can initialize the sys_timer with the .timer entries alone. Note that for now we just set stubs for the various sys_timer entries that will get populated in a later patch. The following patches will also remove the omap_dm_timer_init calls and change the init for the rest of the hardware timers to happen with an arch_initcall. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 17ed757..f1ac7fb 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") .reserve = omap_reserve, .init_irq = ams_delta_init_irq, .init_machine = ams_delta_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END EXPORT_SYMBOL(ams_delta_latch1_write); diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index eaff305..a6b1bea 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") .reserve = omap_reserve, .init_irq = omap_fsample_init_irq, .init_machine = omap_fsample_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 3fd6b40..04fc356 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") .reserve = omap_reserve, .init_irq = omap_generic_init_irq, .init_machine = omap_generic_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 8147b04..cb7fb1a 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2") .reserve = omap_reserve, .init_irq = h2_init_irq, .init_machine = h2_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 1b448f6..31f3487 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") .reserve = omap_reserve, .init_irq = h3_init_irq, .init_machine = h3_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 1bd4d8e..36e06ea 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald") .reserve = omap_reserve, .init_irq = htcherald_init_irq, .init_machine = htcherald_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 5926b0c..0b1ba46 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") .reserve = omap_reserve, .init_irq = innovator_init_irq, .init_machine = innovator_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index e3cf21d..5469ce2 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770") .reserve = omap_reserve, .init_irq = omap_nokia770_init_irq, .init_machine = omap_nokia770_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 1e7823d..b08a213 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") .reserve = omap_reserve, .init_irq = osk_init_irq, .init_machine = osk_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 8b6a881..459cb6b 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") .reserve = omap_reserve, .init_irq = omap_palmte_init_irq, .init_machine = omap_palmte_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index f2de43d..b214f45 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") .reserve = omap_reserve, .init_irq = omap_palmtt_init_irq, .init_machine = omap_palmtt_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 6665d2d..9b0ea48 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") .reserve = omap_reserve, .init_irq = omap_palmz71_init_irq, .init_machine = omap_palmz71_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 7f019e5..67acd41 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") .reserve = omap_reserve, .init_irq = omap_perseus2_init_irq, .init_machine = omap_perseus2_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 24f0f7b..9c3b7c5 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") .reserve = omap_reserve, .init_irq = omap_sx1_init_irq, .init_machine = omap_sx1_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 98826e2..036edc0e 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") .reserve = omap_reserve, .init_irq = voiceblue_init_irq, .init_machine = voiceblue_init, - .timer = &omap_timer, + .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 03e1e10..a183777 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void) * Timer initialization * --------------------------------------------------------------------------- */ -static void __init omap_timer_init(void) +static void __init omap1_timer_init(void) { if (omap_32k_timer_usable()) { preferred_sched_clock_init(1); @@ -307,6 +307,6 @@ static void __init omap_timer_init(void) } } -struct sys_timer omap_timer = { - .init = omap_timer_init, +struct sys_timer omap1_timer = { + .init = omap1_timer_init, }; diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 45cabc5..2028464 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -262,5 +262,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .init_early = omap_2430sdp_init_early, .init_irq = omap2_init_irq, .init_machine = omap_2430sdp_init, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 85b207f..12fae21 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -806,5 +806,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .init_early = omap_3430sdp_init_early, .init_irq = omap3_init_irq, .init_machine = omap_3430sdp_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 2ec2d76..e4f37b5 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -221,5 +221,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .init_early = omap_sdp_init_early, .init_irq = omap3_init_irq, .init_machine = omap_sdp_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 63de2d3..128efb50 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -773,5 +773,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") .init_early = omap_4430sdp_init_early, .init_irq = gic_init_irq, .init_machine = omap_4430sdp_init, - .timer = &omap_timer, + .timer = &omap4_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 0bed0a4..5f2b55f 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -106,5 +106,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .init_early = am3517_crane_init_early, .init_irq = omap3_init_irq, .init_machine = am3517_crane_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 0db0fb8..f3006c3 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -496,5 +496,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .init_early = am3517_evm_init_early, .init_irq = omap3_init_irq, .init_machine = am3517_evm_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 93576c8..7021170 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -356,5 +356,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") .init_early = omap_apollon_init_early, .init_irq = omap2_init_irq, .init_machine = omap_apollon_init, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 2940d64..8b49dc2 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -648,5 +648,5 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .init_early = cm_t35_init_early, .init_irq = omap3_init_irq, .init_machine = cm_t35_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 8f15222..aa67240 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -306,5 +306,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .init_early = cm_t3517_init_early, .init_irq = omap3_init_irq, .init_machine = cm_t3517_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 00f6cb6..671aaea 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -707,5 +707,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .init_early = devkit8000_init_early, .init_irq = devkit8000_init_irq, .init_machine = devkit8000_init, - .timer = &omap_timer, + .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index ccd503a..c6ecf60 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") .init_early = omap_generic_init_early, .init_irq = omap2_init_irq, .init_machine = omap_generic_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 2e16d6c..45de2b3 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .init_early = omap_h4_init_early, .init_irq = omap_h4_init_irq, .init_machine = omap_h4_init, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 359b765..381a27c 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -705,7 +705,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") .init_early = igep_init_early, .init_irq = omap3_init_irq, .init_machine = igep_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END MACHINE_START(IGEP0030, "IGEP OMAP3 module") @@ -715,5 +715,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") .init_early = igep_init_early, .init_irq = omap3_init_irq, .init_machine = igep_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index a054f54..75ebc99 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -352,5 +352,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .init_early = omap_ldp_init_early, .init_irq = omap3_init_irq, .init_machine = omap_ldp_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 9c791a2..e11f0c5 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -701,7 +701,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .init_early = n8x0_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") @@ -711,7 +711,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .init_early = n8x0_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") @@ -721,5 +721,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .init_early = n8x0_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, - .timer = &omap_timer, + .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 4560055..3d41654 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -599,5 +599,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .init_early = omap3_beagle_init_early, .init_irq = omap3_beagle_init_irq, .init_machine = omap3_beagle_init, - .timer = &omap_timer, + .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 79d5362..7cbcf60 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -742,5 +742,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") .init_early = omap3_evm_init_early, .init_irq = omap3_init_irq, .init_machine = omap3_evm_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 739fdfc..693eba1 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -217,7 +217,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .init_early = omap3logic_init_early, .init_irq = omap3_init_irq, .init_machine = omap3logic_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") @@ -226,5 +226,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .init_early = omap3logic_init_early, .init_irq = omap3_init_irq, .init_machine = omap3logic_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 7b4e139..ff0be83 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -644,5 +644,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .init_early = omap3pandora_init_early, .init_irq = omap3_init_irq, .init_machine = omap3pandora_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 0161626..96fec1f 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -560,5 +560,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .init_early = omap3_stalker_init_early, .init_irq = omap3_stalker_init_irq, .init_machine = omap3_stalker_init, - .timer = &omap_timer, + .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 3cc5531..9447bc0 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -449,5 +449,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .init_early = omap3_touchbook_init_early, .init_irq = omap3_touchbook_init_irq, .init_machine = omap3_touchbook_init, - .timer = &omap_timer, + .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 0cfe200..e76fe98 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -716,5 +716,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") .init_early = omap4_panda_init_early, .init_irq = gic_init_irq, .init_machine = omap4_panda_init, - .timer = &omap_timer, + .timer = &omap4_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 9c9f20c..d06248f 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -617,5 +617,5 @@ MACHINE_START(OVERO, "Gumstix Overo") .init_early = overo_init_early, .init_irq = omap3_init_irq, .init_machine = overo_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 9c3d115..54dceb1 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -165,5 +165,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .init_early = rm680_init_early, .init_irq = omap3_init_irq, .init_machine = rm680_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index ee35e4e..5ea142f 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -162,5 +162,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .init_early = rx51_init_early, .init_irq = omap3_init_irq, .init_machine = rx51_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 713c20f..a85d5b0 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -52,6 +52,6 @@ MACHINE_START(TI8168EVM, "ti8168evm") .map_io = ti8168_evm_map_io, .init_early = ti8168_init_early, .init_irq = ti816x_init_irq, - .timer = &omap_timer, + .timer = &omap3_timer, .init_machine = ti8168_evm_init, MACHINE_END diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 97a3f0b..8a98c3c 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -139,7 +139,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .init_early = omap_zoom_init_early, .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") @@ -149,5 +149,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .init_early = omap_zoom_init_early, .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, - .timer = &omap_timer, + .timer = &omap3_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 3b9cf85..a0d8e83 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -247,20 +247,41 @@ static void __init omap2_gp_clocksource_init(void) } #endif -static void __init omap2_gp_timer_init(void) +#define OMAP_SYS_TIMER_INIT(name) \ +static void __init omap##name##_timer_init(void) \ +{ \ + omap_dm_timer_init(); \ + omap2_gp_clockevent_init(); \ + omap2_gp_clocksource_init(); \ +} + +#define OMAP_SYS_TIMER(name) \ +struct sys_timer omap##name##_timer = { \ + .init = omap##name##_timer_init, \ +}; + +#ifdef CONFIG_ARCH_OMAP2 +OMAP_SYS_TIMER_INIT(2) +OMAP_SYS_TIMER(2) +#endif + +#ifdef CONFIG_ARCH_OMAP3 +OMAP_SYS_TIMER_INIT(3) +OMAP_SYS_TIMER(3) +OMAP_SYS_TIMER_INIT(3_secure) +OMAP_SYS_TIMER(3_secure) +#endif + +#ifdef CONFIG_ARCH_OMAP4 +static void __init omap4_timer_init(void) { #ifdef CONFIG_LOCAL_TIMERS - if (cpu_is_omap44xx()) { - twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); - BUG_ON(!twd_base); - } + twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); + BUG_ON(!twd_base); #endif omap_dm_timer_init(); - omap2_gp_clockevent_init(); omap2_gp_clocksource_init(); } - -struct sys_timer omap_timer = { - .init = omap2_gp_timer_init, -}; +OMAP_SYS_TIMER(4) +#endif diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 5288130..4564cc6 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -34,7 +34,11 @@ struct sys_timer; extern void omap_map_common_io(void); -extern struct sys_timer omap_timer; +extern struct sys_timer omap1_timer; +extern struct sys_timer omap2_timer; +extern struct sys_timer omap3_timer; +extern struct sys_timer omap3_secure_timer; +extern struct sys_timer omap4_timer; extern bool omap_32k_timer_init(void); extern int __init omap_init_clocksource_32k(void); extern unsigned long long notrace omap_32k_sched_clock(void); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index d6c70d2..330bd17 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -57,7 +57,6 @@ #define OMAP_TIMER_IP_VERSION_1 0x1 struct omap_dm_timer; extern struct omap_dm_timer *gptimer_wakeup; -extern struct sys_timer omap_timer; struct clk; int omap_dm_timer_init(void); -- cgit v0.10.2 From ec97489d199b3dcfc44042ccf89b37a264d14565 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 29 Mar 2011 15:54:48 -0700 Subject: omap: Move dmtimer defines to dmtimer.h These will be needed when dmtimer platform init code gets split for omap1 and omap2+. These will also be needed for separate sys_timer init and driver init for the rest of the hardware timers in the following patches. No functional changes. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index ee9f6eb..dfdc3b2 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -41,127 +41,6 @@ #include #include -/* register offsets */ -#define _OMAP_TIMER_ID_OFFSET 0x00 -#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 -#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 -#define _OMAP_TIMER_STAT_OFFSET 0x18 -#define _OMAP_TIMER_INT_EN_OFFSET 0x1c -#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 -#define _OMAP_TIMER_CTRL_OFFSET 0x24 -#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) -#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) -#define OMAP_TIMER_CTRL_PT (1 << 12) -#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) -#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) -#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) -#define OMAP_TIMER_CTRL_SCPWM (1 << 7) -#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ -#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ -#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ -#define OMAP_TIMER_CTRL_POSTED (1 << 2) -#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ -#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ -#define _OMAP_TIMER_COUNTER_OFFSET 0x28 -#define _OMAP_TIMER_LOAD_OFFSET 0x2c -#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 -#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 -#define WP_NONE 0 /* no write pending bit */ -#define WP_TCLR (1 << 0) -#define WP_TCRR (1 << 1) -#define WP_TLDR (1 << 2) -#define WP_TTGR (1 << 3) -#define WP_TMAR (1 << 4) -#define WP_TPIR (1 << 5) -#define WP_TNIR (1 << 6) -#define WP_TCVR (1 << 7) -#define WP_TOCR (1 << 8) -#define WP_TOWR (1 << 9) -#define _OMAP_TIMER_MATCH_OFFSET 0x38 -#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c -#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 -#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ -#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ -#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ -#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ -#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ -#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ - -/* register offsets with the write pending bit encoded */ -#define WPSHIFT 16 - -#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ - | (WP_TCLR << WPSHIFT)) - -#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ - | (WP_TCRR << WPSHIFT)) - -#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ - | (WP_TLDR << WPSHIFT)) - -#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ - | (WP_TTGR << WPSHIFT)) - -#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ - | (WP_TMAR << WPSHIFT)) - -#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ - | (WP_TPIR << WPSHIFT)) - -#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ - | (WP_TNIR << WPSHIFT)) - -#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ - | (WP_TCVR << WPSHIFT)) - -#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ - (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) - -#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ - (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) - -struct omap_dm_timer { - unsigned long phys_base; - int irq; -#ifdef CONFIG_ARCH_OMAP2PLUS - struct clk *iclk, *fclk; -#endif - void __iomem *io_base; - unsigned reserved:1; - unsigned enabled:1; - unsigned posted:1; -}; - static int dm_timer_count; #ifdef CONFIG_ARCH_OMAP1 diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 330bd17..3203105 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -92,5 +92,130 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value int omap_dm_timers_active(void); +/* + * Do not use the defines below, they are not needed. They should be only + * used by dmtimer.c and sys_timer related code. + */ + +/* register offsets */ +#define _OMAP_TIMER_ID_OFFSET 0x00 +#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 +#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 +#define _OMAP_TIMER_STAT_OFFSET 0x18 +#define _OMAP_TIMER_INT_EN_OFFSET 0x1c +#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 +#define _OMAP_TIMER_CTRL_OFFSET 0x24 +#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) +#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) +#define OMAP_TIMER_CTRL_PT (1 << 12) +#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) +#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) +#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) +#define OMAP_TIMER_CTRL_SCPWM (1 << 7) +#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ +#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ +#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ +#define OMAP_TIMER_CTRL_POSTED (1 << 2) +#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ +#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ +#define _OMAP_TIMER_COUNTER_OFFSET 0x28 +#define _OMAP_TIMER_LOAD_OFFSET 0x2c +#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 +#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 +#define WP_NONE 0 /* no write pending bit */ +#define WP_TCLR (1 << 0) +#define WP_TCRR (1 << 1) +#define WP_TLDR (1 << 2) +#define WP_TTGR (1 << 3) +#define WP_TMAR (1 << 4) +#define WP_TPIR (1 << 5) +#define WP_TNIR (1 << 6) +#define WP_TCVR (1 << 7) +#define WP_TOCR (1 << 8) +#define WP_TOWR (1 << 9) +#define _OMAP_TIMER_MATCH_OFFSET 0x38 +#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c +#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 +#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ +#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ +#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ +#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ +#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ +#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ + +/* register offsets with the write pending bit encoded */ +#define WPSHIFT 16 + +#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ + | (WP_TCLR << WPSHIFT)) + +#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ + | (WP_TCRR << WPSHIFT)) + +#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ + | (WP_TLDR << WPSHIFT)) + +#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ + | (WP_TTGR << WPSHIFT)) + +#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ + | (WP_TMAR << WPSHIFT)) + +#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ + | (WP_NONE << WPSHIFT)) + +#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ + | (WP_TPIR << WPSHIFT)) + +#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ + | (WP_TNIR << WPSHIFT)) + +#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ + | (WP_TCVR << WPSHIFT)) + +#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ + (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) + +#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ + (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) + +struct omap_dm_timer { + unsigned long phys_base; + int irq; +#ifdef CONFIG_ARCH_OMAP2PLUS + struct clk *iclk, *fclk; +#endif + void __iomem *io_base; + unsigned reserved:1; + unsigned enabled:1; + unsigned posted:1; +}; #endif /* __ASM_ARCH_DMTIMER_H */ -- cgit v0.10.2 From caf64f2fdc48472995d40656eb1a75524c464447 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 29 Mar 2011 15:54:48 -0700 Subject: omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index dfdc3b2..7c5cb4e 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock; */ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) { - if (timer->posted) - while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) - & (reg >> WPSHIFT)) - cpu_relax(); - return readl(timer->io_base + (reg & 0xff)); + return __omap_dm_timer_read(timer->io_base, reg, timer->posted); } /* @@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, u32 value) { - if (timer->posted) - while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) - & (reg >> WPSHIFT)) - cpu_relax(); - writel(value, timer->io_base + (reg & 0xff)); + __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); } static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) @@ -209,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) static void omap_dm_timer_reset(struct omap_dm_timer *timer) { - u32 l; + int autoidle = 0, wakeup = 0; if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); @@ -217,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) } omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); - l |= 0x02 << 3; /* Set to smart-idle mode */ - l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ - /* Enable autoidle on OMAP2 / OMAP3 */ if (cpu_is_omap24xx() || cpu_is_omap34xx()) - l |= 0x1 << 0; + autoidle = 1; /* * Enable wake-up on OMAP2 CPUs. */ if (cpu_class_is_omap2()) - l |= 1 << 2; - omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); + wakeup = 1; - /* Match hardware reset default of posted mode */ - omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, - OMAP_TIMER_CTRL_POSTED); + __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); timer->posted = 1; } -static void omap_dm_timer_prepare(struct omap_dm_timer *timer) +void omap_dm_timer_prepare(struct omap_dm_timer *timer) { omap_dm_timer_enable(timer); omap_dm_timer_reset(timer); @@ -410,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); void omap_dm_timer_stop(struct omap_dm_timer *timer) { - u32 l; + unsigned long rate = 0; - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - if (l & OMAP_TIMER_CTRL_ST) { - l &= ~0x1; - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); #ifdef CONFIG_ARCH_OMAP2PLUS - /* Readback to make sure write has completed */ - omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); - /* - * Wait for functional clock period x 3.5 to make sure that - * timer is stopped - */ - udelay(3500000 / clk_get_rate(timer->fclk) + 1); + rate = clk_get_rate(timer->fclk); #endif - } - /* Ack possibly pending interrupt */ - omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, - OMAP_TIMER_INT_OVERFLOW); + + __omap_dm_timer_stop(timer->io_base, timer->posted, rate); } EXPORT_SYMBOL_GPL(omap_dm_timer_stop); @@ -451,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { - int ret = -EINVAL; - if (source < 0 || source >= 3) return -EINVAL; - clk_disable(timer->fclk); - ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); - clk_enable(timer->fclk); - - /* - * When the functional clock disappears, too quick writes seem - * to cause an abort. XXX Is this still necessary? - */ - __delay(300000); - - return ret; + return __omap_dm_timer_set_source(timer->fclk, + dm_source_clocks[source]); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); @@ -504,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, } l |= OMAP_TIMER_CTRL_ST; - omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); @@ -558,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); - omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value); + __omap_dm_timer_int_enable(timer->io_base, value); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); @@ -575,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { - omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); + __omap_dm_timer_write_status(timer->io_base, value); } EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) { - unsigned int l; - - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); - - return l; + return __omap_dm_timer_read_counter(timer->io_base, timer->posted); } EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 3203105..54664a7 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -32,6 +32,9 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ +#include +#include + #ifndef __ASM_ARCH_DMTIMER_H #define __ASM_ARCH_DMTIMER_H @@ -218,4 +221,120 @@ struct omap_dm_timer { unsigned posted:1; }; +void omap_dm_timer_prepare(struct omap_dm_timer *timer); + +static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, + int posted) +{ + if (posted) + while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) + & (reg >> WPSHIFT)) + cpu_relax(); + + return __raw_readl(base + (reg & 0xff)); +} + +static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val, + int posted) +{ + if (posted) + while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) + & (reg >> WPSHIFT)) + cpu_relax(); + + __raw_writel(val, base + (reg & 0xff)); +} + +/* Assumes the source clock has been set by caller */ +static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, + int wakeup) +{ + u32 l; + + l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0); + l |= 0x02 << 3; /* Set to smart-idle mode */ + l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ + + if (autoidle) + l |= 0x1 << 0; + + if (wakeup) + l |= 1 << 2; + + __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0); + + /* Match hardware reset default of posted mode */ + __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG, + OMAP_TIMER_CTRL_POSTED, 0); +} + +static inline int __omap_dm_timer_set_source(struct clk *timer_fck, + struct clk *parent) +{ + int ret; + + clk_disable(timer_fck); + ret = clk_set_parent(timer_fck, parent); + clk_enable(timer_fck); + + /* + * When the functional clock disappears, too quick writes seem + * to cause an abort. XXX Is this still necessary? + */ + __delay(300000); + + return ret; +} + +static inline void __omap_dm_timer_stop(void __iomem *base, int posted, + unsigned long rate) +{ + u32 l; + + l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); + if (l & OMAP_TIMER_CTRL_ST) { + l &= ~0x1; + __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted); +#ifdef CONFIG_ARCH_OMAP2PLUS + /* Readback to make sure write has completed */ + __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); + /* + * Wait for functional clock period x 3.5 to make sure that + * timer is stopped + */ + udelay(3500000 / rate + 1); +#endif + } + + /* Ack possibly pending interrupt */ + __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, + OMAP_TIMER_INT_OVERFLOW, 0); +} + +static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl, + unsigned int load, int posted) +{ + __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted); + __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted); +} + +static inline void __omap_dm_timer_int_enable(void __iomem *base, + unsigned int value) +{ + __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0); + __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0); +} + +static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base, + int posted) +{ + return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted); +} + +static inline void __omap_dm_timer_write_status(void __iomem *base, + unsigned int value) +{ + __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0); +} + #endif /* __ASM_ARCH_DMTIMER_H */ -- cgit v0.10.2 From aa56188998942dfd1d6d85484c87f79268508bba Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 29 Mar 2011 15:54:48 -0700 Subject: omap2+: Use dmtimer macros for clockevent This patch makes timer-gp.c to use only a subset of dmtimer functions without the need to initialize dmtimer code early. Also note that now with the inline functions, timer_set_next_event becomes more efficient in the lines of assembly code. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index a0d8e83..62c0d5c 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -45,10 +45,33 @@ #include "timer-gp.h" +/* Parent clocks, eventually these will come from the clock framework */ + +#define OMAP2_MPU_SOURCE "sys_ck" +#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE +#define OMAP4_MPU_SOURCE "sys_clkin_ck" +#define OMAP2_32K_SOURCE "func_32k_ck" +#define OMAP3_32K_SOURCE "omap_32k_fck" +#define OMAP4_32K_SOURCE "sys_32k_ck" + +#ifdef CONFIG_OMAP_32K_TIMER +#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE +#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE +#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE +#define OMAP3_SECURE_TIMER 12 +#else +#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE +#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE +#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE +#define OMAP3_SECURE_TIMER 1 +#endif /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ #define MAX_GPTIMER_ID 12 +/* Clockevent code */ + +static struct omap_dm_timer clkev; static struct omap_dm_timer *gptimer; static struct clock_event_device clockevent_gpt; static u8 __initdata gptimer_id = 1; @@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup; static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { - struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; struct clock_event_device *evt = &clockevent_gpt; - omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); + __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); evt->event_handler(evt); return IRQ_HANDLED; @@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = { static int omap2_gp_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { - omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles); + __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, + 0xffffffff - cycles, 1); return 0; } @@ -85,13 +108,18 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, { u32 period; - omap_dm_timer_stop(gptimer); + __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; + period = clkev.rate / HZ; period -= 1; - omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); + /* Looks like we need to first set the load value separately */ + __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, + 0xffffffff - period, 1); + __omap_dm_timer_load_start(clkev.io_base, + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, + 0xffffffff - period, 1); break; case CLOCK_EVT_MODE_ONESHOT: break; @@ -130,43 +158,89 @@ int __init omap2_gp_clockevent_set_gptimer(u8 id) return 0; } -static void __init omap2_gp_clockevent_init(void) +static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, + int gptimer_id, + const char *fck_source) { - u32 tick_rate; - int src; - char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */ + char name[10]; /* 10 = sizeof("gptXX_Xck0") */ + struct omap_hwmod *oh; + size_t size; + int res = 0; + + sprintf(name, "timer%d", gptimer_id); + omap_hwmod_setup_one(name); + oh = omap_hwmod_lookup(name); + if (!oh) + return -ENODEV; + + timer->irq = oh->mpu_irqs[0].irq; + timer->phys_base = oh->slaves[0]->addr->pa_start; + size = oh->slaves[0]->addr->pa_end - timer->phys_base; + + /* Static mapping, never released */ + timer->io_base = ioremap(timer->phys_base, size); + if (!timer->io_base) + return -ENXIO; + + /* After the dmtimer is using hwmod these clocks won't be needed */ + sprintf(name, "gpt%d_fck", gptimer_id); + timer->fclk = clk_get(NULL, name); + if (IS_ERR(timer->fclk)) + return -ENODEV; + + sprintf(name, "gpt%d_ick", gptimer_id); + timer->iclk = clk_get(NULL, name); + if (IS_ERR(timer->iclk)) { + clk_put(timer->fclk); + return -ENODEV; + } - inited = 1; + omap_hwmod_enable(oh); + + if (gptimer_id != 12) { + struct clk *src; + + src = clk_get(NULL, fck_source); + if (IS_ERR(src)) { + res = -EINVAL; + } else { + res = __omap_dm_timer_set_source(timer->fclk, src); + if (IS_ERR_VALUE(res)) + pr_warning("%s: timer%i cannot set source\n", + __func__, gptimer_id); + clk_put(src); + } + } + __omap_dm_timer_reset(timer->io_base, 1, 1); + timer->posted = 1; + + timer->rate = clk_get_rate(timer->fclk); - sprintf(clockevent_hwmod_name, "timer%d", gptimer_id); - omap_hwmod_setup_one(clockevent_hwmod_name); + timer->reserved = 1; gptimer = omap_dm_timer_request_specific(gptimer_id); BUG_ON(gptimer == NULL); gptimer_wakeup = gptimer; -#if defined(CONFIG_OMAP_32K_TIMER) - src = OMAP_TIMER_SRC_32_KHZ; -#else - src = OMAP_TIMER_SRC_SYS_CLK; - WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " - "secure 32KiHz clock source\n"); -#endif + return res; +} - if (gptimer_id != 12) - WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)), - "timer-gp: omap_dm_timer_set_source() failed\n"); +static void __init omap2_gp_clockevent_init(int gptimer_id, + const char *fck_source) +{ + int res; - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); + inited = 1; - pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", - gptimer_id, tick_rate); + res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); + BUG_ON(res); omap2_gp_timer_irq.dev_id = (void *)gptimer; - setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); - omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); + setup_irq(clkev.irq, &omap2_gp_timer_irq); - clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, + __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); + + clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, clockevent_gpt.shift); clockevent_gpt.max_delta_ns = clockevent_delta2ns(0xffffffff, &clockevent_gpt); @@ -176,6 +250,9 @@ static void __init omap2_gp_clockevent_init(void) clockevent_gpt.cpumask = cpumask_of(0); clockevents_register_device(&clockevent_gpt); + + pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", + gptimer_id, clkev.rate); } /* Clocksource code */ @@ -247,11 +324,11 @@ static void __init omap2_gp_clocksource_init(void) } #endif -#define OMAP_SYS_TIMER_INIT(name) \ +#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ static void __init omap##name##_timer_init(void) \ { \ omap_dm_timer_init(); \ - omap2_gp_clockevent_init(); \ + omap2_gp_clockevent_init((clkev_nr), clkev_src); \ omap2_gp_clocksource_init(); \ } @@ -261,14 +338,14 @@ struct sys_timer omap##name##_timer = { \ }; #ifdef CONFIG_ARCH_OMAP2 -OMAP_SYS_TIMER_INIT(2) +OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) OMAP_SYS_TIMER(2) #endif #ifdef CONFIG_ARCH_OMAP3 -OMAP_SYS_TIMER_INIT(3) +OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) OMAP_SYS_TIMER(3) -OMAP_SYS_TIMER_INIT(3_secure) +OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE) OMAP_SYS_TIMER(3_secure) #endif @@ -280,7 +357,7 @@ static void __init omap4_timer_init(void) BUG_ON(!twd_base); #endif omap_dm_timer_init(); - omap2_gp_clockevent_init(); + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); omap2_gp_clocksource_init(); } OMAP_SYS_TIMER(4) diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 54664a7..dd8b3ff 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -216,6 +216,7 @@ struct omap_dm_timer { struct clk *iclk, *fclk; #endif void __iomem *io_base; + unsigned long rate; unsigned reserved:1; unsigned enabled:1; unsigned posted:1; -- cgit v0.10.2 From 98e182a26bbbf5575457622337684ef61493e864 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 29 Mar 2011 15:54:49 -0700 Subject: omap2+: Remove gptimer_wakeup for now This removes the support for setting the wake-up timer for debugging. Later on we can reserve gptimer1 for PM code only and have similar functionality. Signed-off-by: Tony Lindgren Reviewed-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index a5a83b3..c56d1d4 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -31,7 +31,6 @@ #include #include "powerdomain.h" #include "clockdomain.h" -#include #include #include "cm2xxx_3xxx.h" @@ -41,8 +40,6 @@ int omap2_pm_debug; u32 enable_off_mode; u32 sleep_while_idle; -u32 wakeup_timer_seconds; -u32 wakeup_timer_milliseconds; #define DUMP_PRM_MOD_REG(mod, reg) \ regs[reg_count].name = #mod "." #reg; \ @@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); } -void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) -{ - u32 tick_rate, cycles; - - if (!seconds && !milliseconds) - return; - - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); - cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; - omap_dm_timer_stop(gptimer_wakeup); - omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); - - pr_info("PM: Resume timer in %u.%03u secs" - " (%d ticks at %d ticks/sec.)\n", - seconds, milliseconds, cycles, tick_rate); -} - #ifdef CONFIG_DEBUG_FS #include #include @@ -576,9 +556,6 @@ static int option_set(void *data, u64 val) { u32 *option = data; - if (option == &wakeup_timer_milliseconds && val >= 1000) - return -EINVAL; - *option = val; if (option == &enable_off_mode) { @@ -641,11 +618,6 @@ static int __init pm_dbg_init(void) &enable_off_mode, &pm_dbg_option_fops); (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, &sleep_while_idle, &pm_dbg_option_fops); - (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, - &wakeup_timer_seconds, &pm_dbg_option_fops); - (void) debugfs_create_file("wakeup_timer_milliseconds", - S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, - &pm_dbg_option_fops); pm_dbg_init_done = 1; return 0; diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 45bcfce..c3a367e 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); -extern u32 wakeup_timer_seconds; -extern u32 wakeup_timer_milliseconds; -extern struct omap_dm_timer *gptimer_wakeup; - #ifdef CONFIG_PM_DEBUG extern void omap2_pm_dump(int mode, int resume, unsigned int us); -extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); extern int omap2_pm_debug; extern u32 enable_off_mode; extern u32 sleep_while_idle; #else #define omap2_pm_dump(mode, resume, us) do {} while (0); -#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0); #define omap2_pm_debug 0 #define enable_off_mode 0 #define sleep_while_idle 0 diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index c155c9d..4cb636a 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -534,10 +534,6 @@ static int omap3_pm_suspend(void) struct power_state *pwrst; int state, ret = 0; - if (wakeup_timer_seconds || wakeup_timer_milliseconds) - omap2_pm_wakeup_on_timer(wakeup_timer_seconds, - wakeup_timer_milliseconds); - /* Read current next_pwrsts */ list_for_each_entry(pwrst, &pwrst_list, node) pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 62c0d5c..578e9df 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -72,11 +72,9 @@ /* Clockevent code */ static struct omap_dm_timer clkev; -static struct omap_dm_timer *gptimer; static struct clock_event_device clockevent_gpt; static u8 __initdata gptimer_id = 1; static u8 __initdata inited; -struct omap_dm_timer *gptimer_wakeup; static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { @@ -218,10 +216,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, timer->reserved = 1; - gptimer = omap_dm_timer_request_specific(gptimer_id); - BUG_ON(gptimer == NULL); - gptimer_wakeup = gptimer; - return res; } @@ -235,7 +229,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); BUG_ON(res); - omap2_gp_timer_irq.dev_id = (void *)gptimer; + omap2_gp_timer_irq.dev_id = (void *)&clkev; setup_irq(clkev.irq, &omap2_gp_timer_irq); __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index dd8b3ff..8adcb18 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -59,7 +59,6 @@ */ #define OMAP_TIMER_IP_VERSION_1 0x1 struct omap_dm_timer; -extern struct omap_dm_timer *gptimer_wakeup; struct clk; int omap_dm_timer_init(void); -- cgit v0.10.2 From 80ceb057135ad77f513277f3bcd04b885501877a Mon Sep 17 00:00:00 2001 From: Namhyung Kim Date: Mon, 20 Jun 2011 13:27:44 +0200 Subject: bsg: fix bsg_poll() to return POLLOUT properly POLLOUT should be returned only if bd->queued_cmds < bd->max_queue so that bsg_alloc_command() can proceed. Signed-off-by: Namhyung Kim Acked-by: FUJITA Tomonori Signed-off-by: Jens Axboe diff --git a/block/bsg.c b/block/bsg.c index 0c8b64a..c4f49e2 100644 --- a/block/bsg.c +++ b/block/bsg.c @@ -878,7 +878,7 @@ static unsigned int bsg_poll(struct file *file, poll_table *wait) spin_lock_irq(&bd->lock); if (!list_empty(&bd->done_list)) mask |= POLLIN | POLLRDNORM; - if (bd->queued_cmds >= bd->max_queue) + if (bd->queued_cmds < bd->max_queue) mask |= POLLOUT; spin_unlock_irq(&bd->lock); -- cgit v0.10.2 From 44194e3e88fcfe77a2a6e2333847d4f27816259a Mon Sep 17 00:00:00 2001 From: Namhyung Kim Date: Mon, 20 Jun 2011 13:27:44 +0200 Subject: bsg: remove unnecessary conditional expressions Second condition in OR always implies first condition is false thus bytes_read in the second is not needed. The same goes to bytes_written. Signed-off-by: Namhyung Kim Acked-by: FUJITA Tomonori Signed-off-by: Jens Axboe diff --git a/block/bsg.c b/block/bsg.c index c4f49e2..b7e42ad 100644 --- a/block/bsg.c +++ b/block/bsg.c @@ -606,7 +606,7 @@ bsg_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) ret = __bsg_read(buf, count, bd, NULL, &bytes_read); *ppos = bytes_read; - if (!bytes_read || (bytes_read && err_block_err(ret))) + if (!bytes_read || err_block_err(ret)) bytes_read = ret; return bytes_read; @@ -686,7 +686,7 @@ bsg_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) /* * return bytes written on non-fatal errors */ - if (!bytes_written || (bytes_written && err_block_err(ret))) + if (!bytes_written || err_block_err(ret)) bytes_written = ret; dprintk("%s: returning %Zd\n", bd->name, bytes_written); -- cgit v0.10.2 From 2b727c6300b49352f80f63704bb50c256949e95e Mon Sep 17 00:00:00 2001 From: Namhyung Kim Date: Mon, 20 Jun 2011 13:27:45 +0200 Subject: bsg: fix address space warning from sparse copy_from/to_user() and blk_rq_map_user() want __user pointer. This patch fixes following warnings from sparse: CHECK block/bsg.c block/bsg.c:185:38: warning: incorrect type in argument 2 (different address spaces) block/bsg.c:185:38: expected void const [noderef] *from block/bsg.c:185:38: got void * block/bsg.c:295:58: warning: incorrect type in argument 4 (different address spaces) block/bsg.c:295:58: expected void [noderef] * block/bsg.c:295:58: got void *[assigned] dxferp block/bsg.c:311:52: warning: incorrect type in argument 4 (different address spaces) block/bsg.c:311:52: expected void [noderef] * block/bsg.c:311:52: got void *[assigned] dxferp block/bsg.c:448:37: warning: incorrect type in argument 1 (different address spaces) block/bsg.c:448:37: expected void [noderef] *dst block/bsg.c:448:37: got void * Signed-off-by: Namhyung Kim Acked-by: FUJITA Tomonori Signed-off-by: Jens Axboe diff --git a/block/bsg.c b/block/bsg.c index b7e42ad..702f131 100644 --- a/block/bsg.c +++ b/block/bsg.c @@ -182,7 +182,7 @@ static int blk_fill_sgv4_hdr_rq(struct request_queue *q, struct request *rq, return -ENOMEM; } - if (copy_from_user(rq->cmd, (void *)(unsigned long)hdr->request, + if (copy_from_user(rq->cmd, (void __user *)(unsigned long)hdr->request, hdr->request_len)) return -EFAULT; @@ -249,7 +249,7 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm, struct request *rq, *next_rq = NULL; int ret, rw; unsigned int dxfer_len; - void *dxferp = NULL; + void __user *dxferp = NULL; struct bsg_class_device *bcd = &q->bsg_dev; /* if the LLD has been removed then the bsg_unregister_queue will @@ -291,7 +291,7 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm, rq->next_rq = next_rq; next_rq->cmd_type = rq->cmd_type; - dxferp = (void*)(unsigned long)hdr->din_xferp; + dxferp = (void __user *)(unsigned long)hdr->din_xferp; ret = blk_rq_map_user(q, next_rq, NULL, dxferp, hdr->din_xfer_len, GFP_KERNEL); if (ret) @@ -300,10 +300,10 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm, if (hdr->dout_xfer_len) { dxfer_len = hdr->dout_xfer_len; - dxferp = (void*)(unsigned long)hdr->dout_xferp; + dxferp = (void __user *)(unsigned long)hdr->dout_xferp; } else if (hdr->din_xfer_len) { dxfer_len = hdr->din_xfer_len; - dxferp = (void*)(unsigned long)hdr->din_xferp; + dxferp = (void __user *)(unsigned long)hdr->din_xferp; } else dxfer_len = 0; @@ -445,7 +445,7 @@ static int blk_complete_sgv4_hdr_rq(struct request *rq, struct sg_io_v4 *hdr, int len = min_t(unsigned int, hdr->max_response_len, rq->sense_len); - ret = copy_to_user((void*)(unsigned long)hdr->response, + ret = copy_to_user((void __user *)(unsigned long)hdr->response, rq->sense, len); if (!ret) hdr->response_len = len; -- cgit v0.10.2 From 1816315b10862277a961a70ec394b6607983041d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Sun, 19 Jun 2011 11:50:22 +0200 Subject: stop_machine.h: "disables preeempt" -> "disables preemption" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the noun instead of a misspelled verb. Signed-off-by: Jonathan Neuschäfer Signed-off-by: Jiri Kosina diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h index 092dc9b..2d3f0b1b 100644 --- a/include/linux/stop_machine.h +++ b/include/linux/stop_machine.h @@ -94,7 +94,7 @@ static inline int try_stop_cpus(const struct cpumask *cpumask, * stop_machine "Bogolock": stop the entire machine, disable * interrupts. This is a very heavy lock, which is equivalent to * grabbing every spinlock (and more). So the "read" side to such a - * lock is anything which disables preeempt. + * lock is anything which disables preemption. */ #if defined(CONFIG_STOP_MACHINE) && defined(CONFIG_SMP) -- cgit v0.10.2 From e44ba033c5654dbfda53461c9b1f7dd9bd1d198f Mon Sep 17 00:00:00 2001 From: Vitaliy Ivanov Date: Mon, 20 Jun 2011 16:08:07 +0200 Subject: treewide: remove duplicate includes Many stupid corrections of duplicated includes based on the output of scripts/checkincludes.pl. Signed-off-by: Vitaliy Ivanov Signed-off-by: Jiri Kosina diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 2c126bb..a5eeb62 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c index 7b82c34..44a3677 100644 --- a/arch/mips/lantiq/devices.c +++ b/arch/mips/lantiq/devices.c @@ -15,11 +15,9 @@ #include #include #include -#include #include #include #include -#include #include #include diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c index e09e789..d0e32ab 100644 --- a/arch/mips/lantiq/xway/devices.c +++ b/arch/mips/lantiq/xway/devices.c @@ -16,11 +16,9 @@ #include #include #include -#include #include #include #include -#include #include #include diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index fbffd7e..cd70be5 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c @@ -44,7 +44,6 @@ #include #include #include -#include #include #include "plpar_wrappers.h" diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S index 5faa1b1..cf8ec3a 100644 --- a/arch/s390/kvm/sie64a.S +++ b/arch/s390/kvm/sie64a.S @@ -14,7 +14,6 @@ #include #include #include -#include #include #include diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c index 5995e9b..0c2d94b 100644 --- a/arch/s390/oprofile/init.c +++ b/arch/s390/oprofile/init.c @@ -13,8 +13,6 @@ #include #include #include -#include -#include #include #include "../../../drivers/oprofile/oprof.h" diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index bd14bb4..9b9f012 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -22,7 +22,6 @@ #include "mmu.h" #include "x86.h" #include "kvm_cache_regs.h" -#include "x86.h" #include #include diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h index 5b0c18c..82d4e38 100644 --- a/arch/xtensa/include/asm/uaccess.h +++ b/arch/xtensa/include/asm/uaccess.h @@ -17,6 +17,7 @@ #define _XTENSA_UACCESS_H #include +#include #define VERIFY_READ 0 #define VERIFY_WRITE 1 @@ -26,7 +27,6 @@ #include #include #include -#include /* * These assembly macros mirror the C macros that follow below. They @@ -157,7 +157,6 @@ #else /* __ASSEMBLY__ not defined */ #include -#include /* * The fs value determines whether argument validity checking should diff --git a/drivers/gpio/ab8500-gpio.c b/drivers/gpio/ab8500-gpio.c index 970053c..ed795e6 100644 --- a/drivers/gpio/ab8500-gpio.c +++ b/drivers/gpio/ab8500-gpio.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c index e25cbb4..40680f2b 100644 --- a/drivers/gpu/drm/nouveau/nv50_graph.c +++ b/drivers/gpu/drm/nouveau/nv50_graph.c @@ -31,7 +31,6 @@ #include "nouveau_grctx.h" #include "nouveau_dma.h" #include "nouveau_vm.h" -#include "nouveau_ramht.h" #include "nv50_evo.h" struct nv50_graph_engine { diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c index e716b93..cd0c44e 100644 --- a/drivers/media/rc/ite-cir.c +++ b/drivers/media/rc/ite-cir.c @@ -42,7 +42,6 @@ #include #include #include -#include #include "ite-cir.h" diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c index d71a390..e1ae565 100644 --- a/drivers/media/video/m5mols/m5mols_capture.c +++ b/drivers/media/video/m5mols/m5mols_capture.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/media/video/videobuf2-memops.c b/drivers/media/video/videobuf2-memops.c index 5370a3a..b03c3ae 100644 --- a/drivers/media/video/videobuf2-memops.c +++ b/drivers/media/video/videobuf2-memops.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c index 7e5cc0b..ff21291 100644 --- a/drivers/net/can/c_can/c_can.c +++ b/drivers/net/can/c_can/c_can.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c index cc90824..0b07156 100644 --- a/drivers/net/can/c_can/c_can_platform.c +++ b/drivers/net/can/c_can/c_can_platform.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index ab59300..70f018d 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c @@ -66,15 +66,14 @@ #include #include #include +#include #ifdef CONFIG_SPARC #include -#include #endif #ifdef CONFIG_PPC_PMAC #include -#include #include #include #endif diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c index ea99827..45dd20c 100644 --- a/drivers/net/wireless/ath/ath5k/ahb.c +++ b/drivers/net/wireless/ath/ath5k/ahb.c @@ -24,7 +24,6 @@ #include "debug.h" #include "base.h" #include "reg.h" -#include "debug.h" /* return bus cachesize in 4B word units */ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz) diff --git a/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h b/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h index 22453b0..11dc39c 100644 --- a/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h +++ b/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h @@ -52,7 +52,6 @@ #include "aggr_recv_api.h" #include #include -#include #include #include "ar6000_api.h" #ifdef CONFIG_HOST_TCMD_SUPPORT diff --git a/drivers/staging/bcm/headers.h b/drivers/staging/bcm/headers.h index 1148e5e..8fe8d2b 100644 --- a/drivers/staging/bcm/headers.h +++ b/drivers/staging/bcm/headers.h @@ -20,25 +20,23 @@ #include #include #include -#include #include #include #include - #include #include -#include #include #include #include #include #include #include -#include #include #include #include #include +#include +#include #include "Typedefs.h" #include "Version.h" @@ -61,7 +59,6 @@ #include "Queue.h" #include "vendorspecificextn.h" - #include "InterfaceMacros.h" #include "InterfaceAdapter.h" #include "InterfaceIsr.h" diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index a71c6f8..8cbfeae 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -26,7 +26,6 @@ #include BCMEMBEDIMAGE #endif /* BCMEMBEDIMAGE */ -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h index 996033c..d4bcc1e 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h @@ -18,7 +18,6 @@ #define _wl_cfg80211_h_ #include -#include #include #include diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c index 15e1b05..ab843bc 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c @@ -19,21 +19,16 @@ #include #include #include - #include - #include #include +#include #include #include #include -#include -typedef const struct si_pub si_t; -#include -#include -#include +typedef const struct si_pub si_t; #define WL_ERROR(fmt, args...) printk(fmt, ##args) #define WL_TRACE(fmt, args...) no_printk(fmt, ##args) diff --git a/drivers/staging/gma500/psb_2d.c b/drivers/staging/gma500/psb_2d.c index 0bd834c..3aee8fc 100644 --- a/drivers/staging/gma500/psb_2d.c +++ b/drivers/staging/gma500/psb_2d.c @@ -38,7 +38,6 @@ #include "psb_drv.h" #include "psb_reg.h" -#include "psb_drv.h" #include "psb_fb.h" void psb_spank(struct drm_psb_private *dev_priv) diff --git a/drivers/staging/hv/hv_mouse.c b/drivers/staging/hv/hv_mouse.c index 359e737..b3324d6 100644 --- a/drivers/staging/hv/hv_mouse.c +++ b/drivers/staging/hv/hv_mouse.c @@ -24,7 +24,6 @@ #include #include #include -#include #include "hyperv.h" diff --git a/drivers/staging/hv/tools/hv_kvp_daemon.c b/drivers/staging/hv/tools/hv_kvp_daemon.c index 33f0f1c..a4a407f 100644 --- a/drivers/staging/hv/tools/hv_kvp_daemon.c +++ b/drivers/staging/hv/tools/hv_kvp_daemon.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c index 1a94364..72258e8 100644 --- a/drivers/staging/nvec/nvec.c +++ b/drivers/staging/nvec/nvec.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include "nvec.h" diff --git a/drivers/staging/rtl8712/drv_types.h b/drivers/staging/rtl8712/drv_types.h index 3bb66dc..4f380a6 100644 --- a/drivers/staging/rtl8712/drv_types.h +++ b/drivers/staging/rtl8712/drv_types.h @@ -29,7 +29,6 @@ struct qos_priv { #include "rtl871x_ht.h" #include "rtl871x_cmd.h" -#include "wlan_bssdef.h" #include "rtl871x_xmit.h" #include "rtl871x_recv.h" #include "rtl871x_security.h" diff --git a/drivers/staging/rtl8712/osdep_service.h b/drivers/staging/rtl8712/osdep_service.h index 3d3f73c..505395c 100644 --- a/drivers/staging/rtl8712/osdep_service.h +++ b/drivers/staging/rtl8712/osdep_service.h @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c index 52342c1..848b4c5 100644 --- a/drivers/staging/sep/sep_driver.c +++ b/drivers/staging/sep/sep_driver.c @@ -50,7 +50,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h index 6c29ae9..991f662 100644 --- a/drivers/staging/usbip/userspace/src/utils.h +++ b/drivers/staging/usbip/userspace/src/utils.h @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h index 6426ea6..1e9212f 100644 --- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h +++ b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h @@ -315,5 +315,5 @@ void cy_as_hal_set_ep_dma_mode(uint8_t ep, bool sg_xfer_enabled); /* moved to staging location #include */ -#include "../../../../../../../include/linux/westbridge/cyas_cplus_start.h" +#include "../../../../../../../include/linux/westbridge/cyas_cplus_end.h" #endif diff --git a/drivers/staging/westbridge/astoria/gadget/cyasgadget.h b/drivers/staging/westbridge/astoria/gadget/cyasgadget.h index e01cea7..668e03f 100644 --- a/drivers/staging/westbridge/astoria/gadget/cyasgadget.h +++ b/drivers/staging/westbridge/astoria/gadget/cyasgadget.h @@ -54,19 +54,15 @@ #include #include #include +#include +#include #include "../include/linux/westbridge/cyastoria.h" #include "../include/linux/westbridge/cyashal.h" #include "../include/linux/westbridge/cyasdevice.h" #include "cyasgadget_ioctl.h" -#include -#include - /*char driver defines, revisit*/ -#include -#include -#include #include /* everything... */ #include /* error codes */ #include /* size_t */ diff --git a/drivers/target/loopback/tcm_loop.c b/drivers/target/loopback/tcm_loop.c index dee2a2c..ee95903 100644 --- a/drivers/target/loopback/tcm_loop.c +++ b/drivers/target/loopback/tcm_loop.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include diff --git a/drivers/target/tcm_fc/tfc_cmd.c b/drivers/target/tcm_fc/tfc_cmd.c index c056a11..7c22062 100644 --- a/drivers/target/tcm_fc/tfc_cmd.c +++ b/drivers/target/tcm_fc/tfc_cmd.c @@ -45,7 +45,6 @@ #include #include #include -#include #include #include diff --git a/drivers/target/tcm_fc/tfc_conf.c b/drivers/target/tcm_fc/tfc_conf.c index 84e868c..d963d90 100644 --- a/drivers/target/tcm_fc/tfc_conf.c +++ b/drivers/target/tcm_fc/tfc_conf.c @@ -48,7 +48,6 @@ #include #include #include -#include #include #include "tcm_fc.h" diff --git a/drivers/target/tcm_fc/tfc_io.c b/drivers/target/tcm_fc/tfc_io.c index 4c3c0ef..b4433be 100644 --- a/drivers/target/tcm_fc/tfc_io.c +++ b/drivers/target/tcm_fc/tfc_io.c @@ -53,7 +53,6 @@ #include #include #include -#include #include #include "tcm_fc.h" diff --git a/drivers/target/tcm_fc/tfc_sess.c b/drivers/target/tcm_fc/tfc_sess.c index a3bd57f..65d8ea0 100644 --- a/drivers/target/tcm_fc/tfc_sess.c +++ b/drivers/target/tcm_fc/tfc_sess.c @@ -46,10 +46,8 @@ #include #include #include -#include #include -#include #include "tcm_fc.h" static void ft_sess_delete_all(struct ft_tport *); diff --git a/drivers/usb/otg/otg_fsm.c b/drivers/usb/otg/otg_fsm.c index b0cc422..0911738 100644 --- a/drivers/usb/otg/otg_fsm.c +++ b/drivers/usb/otg/otg_fsm.c @@ -28,7 +28,6 @@ #include #include #include -#include #include "otg_fsm.h" diff --git a/drivers/video/udlfb.c b/drivers/video/udlfb.c index 52b0f3e..14b152a 100644 --- a/drivers/video/udlfb.c +++ b/drivers/video/udlfb.c @@ -29,7 +29,6 @@ #include #include #include -#include #include

'. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/Makefile.am b/drivers/staging/usbip/userspace/Makefile.am index 83f51b8..4b66cbe 100644 --- a/drivers/staging/usbip/userspace/Makefile.am +++ b/drivers/staging/usbip/userspace/Makefile.am @@ -4,8 +4,3 @@ include_HEADERS := $(addprefix libsrc/, \ usbip.h usbip_common.h vhci_driver.h stub_driver.h) dist_man_MANS := $(addprefix doc/, usbip.8 usbipd.8 usbip_bind_driver.8) - -if INSTALL_USBIDS -pkgdata_DATA := usb.ids -EXTRA_DIST := $(pkgdata_DATA) -endif diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac index 06fb95d..39e4a47 100644 --- a/drivers/staging/usbip/userspace/configure.ac +++ b/drivers/staging/usbip/userspace/configure.ac @@ -85,26 +85,12 @@ AC_ARG_WITH([tcp-wrappers], [AC_MSG_RESULT([no]); LIBS="$saved_LIBS"])]) # Sets directory containing usb.ids. -USBIDS_DIR='${datadir}/usbip' AC_ARG_WITH([usbids-dir], [AS_HELP_STRING([--with-usbids-dir=DIR], - [where usb.ids is found (default ${datadir}/usbip)])], - [USBIDS_DIR=$withval]) + [where usb.ids is found (default /usr/share/hwdata/)])], + [USBIDS_DIR=$withval], [USBIDS_DIR="/usr/share/hwdata/"]) AC_SUBST([USBIDS_DIR]) -dnl FIXME: when disabled, empty directry is created -usbids=install -AC_ARG_ENABLE([usbids-install], - [AS_HELP_STRING([--enable-usbids-install], - [install usb.ids (default)])], - [AS_CASE([$enableval], - [yes], [usbids=install], - [no], [usbids=notinstall], - [AC_MSG_ERROR( - [bad value ${enableval} for --enable-usbids-install])] - )]) -AM_CONDITIONAL([INSTALL_USBIDS], [test x$usbids = xinstall]) - GLIB2_REQUIRED=2.6.0 PKG_CHECK_MODULES([PACKAGE], [glib-2.0 >= $GLIB2_REQUIRED]) AC_SUBST([PACKAGE_CFLAGS]) diff --git a/drivers/staging/usbip/userspace/usb.ids b/drivers/staging/usbip/userspace/usb.ids deleted file mode 100644 index b1f8744..0000000 --- a/drivers/staging/usbip/userspace/usb.ids +++ /dev/null @@ -1,13209 +0,0 @@ -# -# List of USB ID's -# -# Maintained by Stephen J. Gowdy -# If you have any new entries, send them to the maintainer. -# Send entries as patches (diff -u old new). -# The latest version can be obtained from -# http://www.linux-usb.org/usb.ids -# -# $Id: usb.ids,v 1.346 2008/04/23 13:51:46 gowdy Exp $ -# - -# Vendors, devices and interfaces. Please keep sorted. - -# Syntax: -# vendor vendor_name -# device device_name <-- single tab -# interface interface_name <-- two tabs - -0001 Fry's Electronics -0002 Ingram -0003 Club Mac -0004 Nebraska Furniture Mart -0145 Unknown - 0112 Card Reader -0204 Chipsbank Microelectronics Co., Ltd - 6025 CBM2080 Flash drive controller - 6026 CBM1180 Flash drive controller -02ad HUMAX Co., Ltd. - 138c PVR Mass Storage -0386 LTS - 0001 PSX for USB Converter -03e8 EndPoints, Inc. - 0004 SE401 WebCam - 0008 101 Ethernet [klsi] - 0015 USB ATAPI Enclosure - 2123 SiPix StyleCam Deluxe - 8004 Aox 99001 -03e9 Thesys Microelectronics -03ea Data Broadcasting Corp. -03eb Atmel Corp. - 2002 Mass Storage Device - 2015 at90usbkey sample firmware (HID keyboard) - 2018 at90usbkey sample firmware (CDC ACM) - 2019 stk525 sample firmware (microphone) - 201c at90usbkey sample firmware (HID mouse) - 201d at90usbkey sample firmware (HID generic) - 2022 at90usbkey sample firmware (composite device) - 2103 JTAG ICE mkII - 2104 AVR ISP mkII - 2107 AVR Dragon - 2ffb at90usb AVR DFU bootloader - 2ffd at89c5130/c5131 DFU bootloader - 2fff at89c5132/c51snd1c DFU bootloader - 3301 at43301 4-port Hub - 3312 4-port Hub - 5601 at76c510 Prism-II 802.11b Access Point - 5603 Cisco 7920 WiFi IP Phone - 6124 at91sam SAMBA bootloader - 7603 at76c503a D-Link DWL-120 802.11b Adapter - 7604 FastVNET - 7605 at76c503a 802.11b Adapter - 7606 at76c505 802.11b Adapter - 7611 at76c510 rfmd2948 802.11b Access Point - 7613 WL-1130 USB - 7614 AT76c505a Wireless Adapter -03ec Iwatsu America, Inc. -03ed Mitel Corp. -03ee Mitsumi - 0000 CD-R/RW Drive - 2501 eHome Infrared Receiver - 2502 eHome Infrared Receiver - 5609 Japanese Keyboard - 641f WIF-0402C Bluetooth Adapter - 6438 Bluetooth Device - 6440 WML-C52APR Bluetooth Adapter - 6901 SmartDisk FDD - 6902 Floppy Disk Drive - 7500 CD-R/RW - ffff Dongle with BlueCore in DFU mode -03f0 Hewlett-Packard - 0004 DeskJet 895c - 0011 OfficeJet G55 - 0012 DeskJet 1125C Printer Port - 0024 KU-0316 Keyboard - 0101 ScanJet 4100c - 0102 PhotoSmart S20 - 0104 DeskJet 880c/970c - 0105 ScanJet 4200c - 0107 CD-Writer Plus - 010c Multimedia Keyboard Hub - 0111 G55xi Printer/Scanner/Copier - 0117 LaserJet 3200 - 011c hn210w 802.11b Adapter - 011d Integrated Bluetooth Module - 0121 HP49g+ Calculator - 0122 HID Internet Keyboard - 0201 ScanJet 6200c - 0202 PhotoSmart S20 - 0204 DeskJet 815c - 0205 ScanJet 3300c - 0207 CD-Writer Plus 8200e - 020c Multimedia Keyboard - 0211 OfficeJet G85 - 0212 DeskJet 1220C - 0217 LaserJet 2200 - 0218 APOLLO P2500/2600 - 2624 Pole Display (HP522 2 x 20 Line Display) - 0304 DeskJet 810c/812c - 0305 ScanJet 4300c - 0307 CD-Writer+ CD-4e - 0311 OfficeJet G85xi - 0312 Color Inkjet CP1700 - 0314 designjet 30/130 series - 0317 LaserJet 1200 - 0401 ScanJet 5200c - 0404 DeskJet 830c/832c - 0405 ScanJet 3400cse - 0411 OfficeJet G95 - 0412 Printing Support - 0417 LaserJet 1200 series - 0504 DeskJet 885c - 0505 ScanJet 2100c - 0507 DVD+RW - 050c 5219 Wireless Keyboard - 0511 OfficeJet K60 - 0512 DeckJet 450 - 0517 LaserJet 1000 - 051d integrated module with Bluetooth wireless technology. - 0601 ScanJet 6300c - 0604 DeskJet 840c - 0605 ScanJet 2200c - 0611 OfficeJet K60xi - 0612 business inkjet 3000 - 0624 Bluetooth Dongle - 0701 ScanJet 5300c/5370c - 0704 DeskJet 825c - 0705 ScanJet 4400c - 0711 OfficeJet K80 - 0712 DeskJet 1180c - 0714 Printing Support - 0801 ScanJet 7400c - 0804 DeskJet 816c - 0805 HP4470C - 0811 OfficeJet K80xi - 0817 LaserJet 3300 - 0901 ScanJet 2300c - 0904 DeskJet 845c - 0912 Printing Support - 0917 LaserJet 3330 - 0924 Modular Smartcard Keyboard - 0a01 ScanJet 2400c - 0a17 color LaserJet 3700 - 0b01 Scanjet 82x0C - 0b17 Laserjet 2300d - 0c17 LaserJet 1010 - 0c24 Bluetooth Dongle - 0d12 Officejet 9100 series - 0d17 LaserJet 1012 - 0e17 LaserJet 1015 - 0f11 OfficeJet V40 - 0f12 Printing Support - 0f17 LaserJet 1150 - 1001 Photo Scanner 1000 - 1002 photosmart 140 series - 1004 DeskJet 970c/970cse - 1005 ScanJet 5400c - 1011 OfficeJet V40xi - 1016 Jornada 548 / iPAQ HW6515 Pocket PC - 1017 LaserJet 1300 - 1024 Smart Card Keyboard - 1102 photosmart 240 series - 1104 DeskJet 959c - 1105 ScanJet 5470c - 1111 officejet v60 - 1116 Jornada 568 Pocket PC - 1117 LaserJet 1300n - 1151 PSC-750xi Printer/Scanner/Copier - 1202 Photosmart 320 Series - 1204 DeskJet 930c - 1205 ScanJet 4500C/5550C - 1211 officejet v60xi - 1217 LaserJet 2300L - 1302 Photosmart 370 Series - 1305 ScanJet 4570c - 1311 OfficeJet V30 - 1312 Deskjet 460 - 1317 LaserJet 1005 - 1405 Scanjet 3670 - 1411 PSC 750 - 1424 f2105 Monitor Hub - 1502 Photosmart 420 Series - 1504 DeskJet 920c - 1511 PSC 750xi - 1512 Printing Support - 1517 color LaserJet 3500 - 1524 Smart Card Keyboard - KR - 1602 Photosmart 330 Series - 1604 DeskJet 940c - 1605 ScanJet 5530C Photosmart - 1611 psc 780 - 1617 LaserJet 3015 - 161d Wireless Rechargeable Optical Mouse (HID) - 1624 Smart Card Keyboard - JP - 1702 Photosmart 380 Series - 1704 deskjet 948C - 1705 ScanJet 5590 - 1711 psc 780xi - 1712 Printing Support - 1717 LaserJet 3020 - 171d Wireless (Bluetooth + WLAN) Interface [Integrated Module] - 1801 Inkjet P-2000U - 1802 Photosmart 470 Series - 1804 deskjet 916C - 1805 ScanJet 7650 - 1811 PSC 720 - 1817 LaserJet 3030 - 181d integrated module with Bluetooth 2.0 wireless technology. - 1902 Photosmart A430 series - 1904 DeskJet 3820 - 1911 OfficeJet V45 - 1917 LaserJet 3380 - 1a02 Photosmart A510 series - 1a11 officejet 5100 series - 1a17 color LaserJet 4650 - 1b02 Photosmart A610 series - 1b04 deskjet 3810 - 1b05 ScanJet 4850C/4890C - 1c02 Photosmart A710 series - 1c17 Color LaserJet 2550l - 1d02 Photosmart A310 series - 1d17 LaserJet 1320 - 1e02 Photosmart A320 Printer series - 1e11 PSC-950 - 1e17 LaserJet 1160 series - 1f02 Photosmart A440 Printer series - 1f11 PSC 920 - 1f12 Officejet Pro K5300 - 1f17 color LaserJet 5550 - 2001 Floppy - 2002 Hub - 2004 DeskJet 640c - 2005 ScanJet 3570c - 2012 Officejet Pro K5400 - 2102 photosmart 7345 - 2104 DeskJet 630c - 2112 Officejet Pro L7500 - 2202 photosmart 7600 series - 2205 ScanJet 3500c - 2212 Officejet Pro L7600 - 2217 color LaserJet 9500 MFP - 2302 photosmart 7600 series - 2304 DeskJet 656c - 2305 ScanJet 3970c - 2311 officejet d series - 2312 Officejet Pro L7700 - 2317 LaserJet 4350 - 2402 photosmart 7700 series - 2405 ScanJet 4070 Photosmart - 2417 LaserJet 4250 - 2424 LP1965 19" Monitor Hub - 2502 photosmart 7700 series - 2505 ScanJet 3770 - 2512 Officejet Pro L7300 - 2517 LaserJet 2410 - 2524 LP3065 30" Monitor Hub - 2602 Photosmart A520 series - 2605 ScanJet 3800c - 2611 officejet 7100 series - 2617 Color LaserJet 2820 Series - 2702 Photosmart A620 series - 2704 Deskjet 915 - 2717 Color LaserJet 2830 - 2811 PSC-2100 - 2817 Color LaserJet 2840 - 2902 Photosmart A820 series - 2911 PSC 2200 - 2917 LaserJet 2420 - 2a11 PSC 2150 series - 2a17 LaserJet 2430 - 2b11 PSC 2170 series - 2b17 LaserJet 1020 - 2c17 Printing Support - 2d11 OfficeJet 6110 - 2d17 Printing Support - 2e11 PSC 1000 - 2e17 Printing Support - 2f11 PSC 1200 - 2f17 EWS 2605dn - 3002 photosmart P1000 - 3004 deskjet 980c - 3005 ScanJet 4670v - 3011 PSC 1100 series - 3017 Printing Support - 3102 PhotoSmart P1100 Printer w/ Card Reader - 3104 DeskJet 960c - 3111 officejet 4100 series - 3117 EWS 2605dtn - 3202 photosmart 1215 - 3211 officejet 4105 series - 3217 LaserJet 3050 - 3302 photosmart 1218 - 3304 DeskJet 990c - 3317 LaserJet 3052 - 3402 photosmart 1115 - 3404 DeskJet 6122 - 3417 LaserJet 3055 - 3502 photosmart 230 - 3504 DeskJet 6127c - 3511 PSC 2300 - 3517 LaserJet 3390 - 3602 photosmart 1315 - 3611 PSC 2410 Photosmart - 3617 EWS 2605 - 3711 PSC 2500 - 3717 EWS UPD - 3802 photosmart 100 - 3817 LaserJet P2015 Series - 3902 photosmart 130 - 3a02 photosmart 7150 - 3a11 OfficeJet 5500 series - 3a17 Printing Support - 3b02 photosmart 7150~ - 3b11 PSC 1300 series - 3b17 LaserJet M1005 MFP - 3c02 PhotoSmart 7350 - 3c11 PSC 1358 - 3c17 EWS UPD - 3d02 photosmart 7350~ - 3d11 OfficeJet 4215 - 3e02 photosmart 7550 - 3f02 photosmart 7550~ - 3f11 PSC-1315/PSC-1317 - 4002 PhotoSmart 720 / PhotoSmart 935 (storage) - 4004 cp1160 - 4102 PhotoSmart 618 - 4105 ScanJet 4370 - 4111 Officejet 7200 series - 4117 Printing Support - 4202 PhotoSmart 812 - 4205 Scanjet G3010 - 4211 Officejet 7300 series - 4217 EWS CM1015 - 4302 PhotoSmart 850 (ptp) - 4311 Officejet 7400 series - 4317 Color LaserJet CM1017 - 4402 PhotoSmart 935 (ptp) - 4417 EWS UPD - 4502 PhotoSmart 945 (PTP mode) - 4505 ScanJet G4010 - 4511 Photosmart 2600 - 4517 EWS UPD - 4605 ScanJet G4050 - 4611 Photosmart 2700 - 4811 PSC 1600 - 4911 PSC 2350 - 4b11 Officejet 6200 - 4c11 PSC 1500 series - 4c17 EWS UPD - 4d11 PSC 1400 - 4d17 EWS UPD - 4e11 Photosmart 2570 series - 4f11 Officejet 5600 (USBHUB) - 5004 DeskJet 995c - 5011 Photosmart 3100 Series - 5017 EWS UPD - 5111 Photosmart 3200 Series - 5211 Photosmart 3300 Series - 5311 Officejet 6300 - 5411 Officejet 4300 - 5511 Deskjet F300 series - 5611 PhotoSmart C3180 - 5617 LaserJet M1120 MFP - 5711 Photosmart C4100 series - 5717 LaserJet M1120n MFP - 5811 Photosmart C5100 series - 5817 LaserJet M1319f MFP - 5911 PhotoSmart C6180 - 5a11 Photosmart C7100 series - 5b11 Officejet J2100 Series - 5c11 Photosmart C4200 Printer series - 5d11 Photosmart C5200 series - 5e11 Photosmart D7400 series - 6004 DeskJet 5550 - 6102 Hewlett Packard Digital Camera - 6104 DeskJet 5650c - 6117 color LaserJet 3550 - 6202 PhotoSmart 215 - 6204 DeskJet 5150c - 6217 Color LaserJet 4700 - 6302 PhotoSmart 318/612 - 6317 Color LaserJet 4730mfp - 6402 PhotoSmart 715 (ptp) - 6411 Photosmart C8100 series - 6417 LaserJet 5200 - 6502 PhotoSmart 120 (ptp) - 6511 Photosmart C7200 series - 6602 PhotoSmart 320 - 6611 Photosmart C4380 series - 6617 LaserJet 5200L - 6702 PhotoSmart 720 (ptp) - 6717 Color LaserJet 3000 - 6802 PhotoSmart 620 (ptp) - 6811 Photosmart D5300 series - 6817 Color LaserJet 3800 - 6911 Photosmart D7200 series - 6917 Color LaserJet 3600 - 6a02 PhotoSmart 735 (ptp) - 6a11 Photosmart C6200 series - 6a17 LaserJet 4240 - 6b02 PhotoSmart R707 (PTP mode) - 6c17 Color LaserJet 4610 - 6f17 Color LaserJet CP6015 series - 7004 DeskJet 3320c - 7102 PhotoSmart 635 (PTP mode) - 7104 DeskJet 3420c - 7117 CM8060 Color MFP with Edgeline Technology - 7202 PhotoSmart 43x (ptp) - 7204 DeskJet 36xx - 7217 LaserJet M5035 MFP - 7302 PhotoSmart M307 (PTP mode) - 7304 DeskJet 35xx - 7317 LaserJet P3005 - 7404 Printing Support - 7417 LaserJet M4345 MFP - 7504 Printing Support - 7517 LaserJet M3035 MFP - 7604 Deskjet 3940 - 7617 LaserJet P3004 - 7702 PhotoSmart R817 (PTP mode) - 7704 Deskjet D4100 - 7717 CM8050 Color MFP with Edgeline Technology - 7804 Deskjet D1360 - 7817 Color LaserJet CP3505 - 7917 LaserJet M5025 MFP - 7a02 PhotoSmart M415 (PTP mode) - 7a17 LaserJet M3027 MFP - 7b02 PhotoSmart M23 (PTP mode) - 7b17 Color LaserJet CP4005 - 7c17 Color LaserJet CM6040 Series - 7d04 Deskjet F2100 Printer series - 7d17 Color LaserJet CM4730 MFP - 7e04 Deskjet F4100 Printer series - 8017 LaserJet P4515 - 8104 Printing Support - 8117 LaserJet P4015 - 811c Ethernet HN210E - 8204 Printing Support - 8217 LaserJet P4014 - 8317 LaserJet M9050 MFP - 8404 Deskjet 6800 Series - 8417 LaserJet M9040 MFP - 8504 Deskjet 6600 Series - 8604 Deskjet 5440 - 8704 deskjet 5900 series - 8804 Deskjet 6980 Series - 8904 Deskjet 6940 Series - 9002 Photosmart M437 - 9102 Photosmart M537 - 9302 Photosmart R930 series - 9402 Photosmart R837 - 9502 Photosmart R840 series - 9602 Photosmart M730 series - 9702 Photosmart R740 series - 9802 Photosmart Mz60 series - 9902 Photosmart M630 series - 9a02 Photosmart E330 series - 9b02 Photosmart M540 series - 9c02 Photosmart M440 series - a004 DeskJet 5850c - b002 photosmart 7200 series - b102 photosmart 7200 series - b202 photosmart 7600 series - b302 photosmart 7600 series - b402 photosmart 7700 series - b502 photosmart 7700 series - b602 photosmart 7900 series - b702 photosmart 7900 series - b802 Photosmart 7400 Series - b902 Photosmart 7800 Series - ba02 Photosmart 8100 Series - bb02 Photosmart 8400 Series - bc02 Photosmart 8700 Series - bd02 Photosmart Pro B9100 series - bef4 NEC Picty760 - c002 Photosmart 7800 Series - c102 Photosmart 8000 Series - c202 Photosmart 8200 Series - c302 Deskjet D2300 - c402 Photosmart D5100 series - c502 Photosmart D6100 series - c602 Photosmart D7100 series - c702 Photosmart D7300 series - c802 Photosmart D5060 Printer - d104 Bluetooth Dongle - efbe NEC Picty900 - f0be NEC Picty920 - f1be NEC Picty800 -03f1 Genoa Technology -03f2 Oak Technology, Inc. -03f3 Adaptec, Inc. - 0020 AWN-8020 WLAN - 0080 AVC-1100 Audio Capture - 0083 AVC-2200 Device - 0087 AVC-2210 Loader - 0088 AVC-2210 Device - 008b AVC-2310 Loader - 008c AVC-2310 Device - 0094 eHome Infrared Receiver - 009b AVC-1410 GameBridge TV NTSC - 2000 USBXchange - 2001 USBXchange Adapter - 2002 USB2-Xchange - 2003 USB2-Xchange Adapter - adcc Composite Device Support -03f4 Diebold, Inc. -03f5 Siemens Electromechanical -03f8 Epson Imaging Technology Center -03f9 KeyTronic Corp. - 0100 Keyboard - 0101 Keyboard - 0102 Keyboard Mouse -03fb OPTi, Inc. -03fc Elitegroup Computer Systems -03fd Xilinx, Inc. -03fe Farallon Comunications -0400 National Semiconductor Corp. - 0807 Bluetooth Dongle - 080a Bluetooth Device - 1000 Mustek BearPaw 1200 Scanner - 1001 Mustek BearPaw 2400 Scanner - 1237 Hub - a000 Smart Display Reference Device - c35b Printing Support -0401 National Registry, Inc. -0402 ALi Corp. - 5462 M5462 IDE Controller - 5602 Video Camera Controller - 5603 USB 2.0 Q-tec Webcam 300 - 5621 USB 2.0 Storage Device - 5623 VistaScan Astra 3600 - 5627 Welland ME-740PS USB2 3.5" Power Saving Enclosure - 5632 USB 2.0 Host-to-Host Link - 5635 USB 2.0 Flash Card Reader - 5636 USB 2.0 Storage Device - 5637 M5637 IDE Controller -0403 Future Technology Devices International, Ltd - 0000 H4SMK 7 Port Hub - 0232 Serial Converter - 6001 FT232 USB-Serial (UART) IC - 6007 Serial Converter - 6008 Serial Converter - 6009 Serial Converter - 6010 FT2232C Dual USB-UART/FIFO IC - 8040 4 Port Hub - 8070 7 Port Hub - 8370 7 Port Hub - 8371 PS/2 Keyboard And Mouse - 8372 FT8U100AX Serial Port - c630 lcd2usb interface - c7d0 RR-CirKits LocoBuffer-USB - cc48 product FTDI TACTRIX_OPENPORT_13M 0xcc48 OpenPort 1.3 Mitsubishi - cc49 product FTDI TACTRIX_OPENPORT_13S 0xcc49 OpenPort 1.3 Subaru - cc4a product FTDI TACTRIX_OPENPORT_13U 0xcc4a OpenPort 1.3 Universal - d010 SCS PTC-IIusb - d011 SCS Position-Tracker/TNC - d012 SCS DRAGON 1 - d013 SCS DRAGON 1 - d6f8 UNI Black BOX - e700 Elster Unicom III Optical Probe - e888 Expert ISDN Control USB - e889 USB-RS232 OptoBridge - e88a Expert mouseCLOCK USB II - e88b Precision Clock MSF USB - e88c Expert mouseCLOCK USB II HBG - ea90 Eclo 1-Wire Adapter - f208 Papenmeier Braille-Display - f680 Suunto Sports Instrument - f918 Ant8 Logic Probe - fa00 Matrix Orbital USB Serial - fa01 Matrix Orbital MX2 or MX3 - fa02 Matrix Orbital MX4 or MX5 - fa03 Matrix Orbital VK/LK202 Family - fa04 Matrix Orbital VK/LK204 Family - fc08 Crystalfontz CFA-632 USB LCD - fc09 Crystalfontz CFA-634 USB LCD - fc0b Crystalfontz CFA-633 USB LCD - fc0c Crystalfontz CFA-631 USB LCD - fc0d Crystalfontz CFA-635 USB LCD - fc82 SEMC DSS-20 SyncStation - fd48 ShipModul MiniPlex-4xUSB NMEA Multiplexer - ff08 ToolHouse LoopBack Adapter - ff18 Logbook Bus - ff19 Logbook Bus - ff1a Logbook Bus - ff1b Logbook Bus - ff1c Logbook Bus - ff1d Logbook Bus - ff1e Logbook Bus - ff1f Logbook Bus -0404 NCR Corp. - 0202 78XX Scanner - 0203 78XX Scanner - Embedded System - 0310 K590 Printer, Self-Service - 0311 7167 Printer, Receipt/Slip - 0312 7197 Printer Receipt - 0320 5932-USB Keyboard - 0321 5953-USB Dynakey - 0322 5932-USB Enhanced Keyboard - 0323 5932-USB Enhanced Keyboard, Flash-Recovery/Download - 0324 5953-USB Enhanced Dynakey - 0325 5953-USB Enhanced Dynakey Flash-Recovery/Download - 0328 K016: USB-MSR ISO 3-track MSR: POS Standard (See HID pages) - 0329 K018: USB-MSR JIS 2-Track MSR: POS Standard - 032a K016: USB-MSR ISO 3-Track MSR: HID Keyboard Mode - 032b K016/K018: USB-MSR Flash-Recovery/Download -0405 Synopsys, Inc. -0406 Fujitsu-ICL Computers -0407 Fujitsu Personal Systems, Inc. -0408 Quanta Computer, Inc. -0409 NEC Corp. - 0011 PC98 Series Layout Keyboard Mouse - 0012 ATerm IT75DSU ISDN TA - 0014 Japanese Keyboard - 0019 109 Japanese Keyboard with Bus-Powered Hub - 001a PC98 Series Layout Keyboard with Bus-Powered Hub - 0025 Mini Keyboard with Bus-Powered Hub - 0027 MultiSync Monitor - 002c Clik!-USB Drive - 0034 109 Japanese Keyboard with One-touch start buttons - 003f Wireless Keyboard with One-touch start buttons - 0040 Floppy - 004e SuperScript 1400 Series - 004f Wireless Keyboard with One-touch start buttons - 0058 HighSpeed Hub - 0059 HighSpeed Hub - 005a HighSpeed Hub - 006a Conceptronic USB Harddisk Box - 0081 SuperScript 1400 Series - 0082 SuperScript 1400 Series - 0094 Japanese Keyboard with One-touch start buttons - 0095 Japanese Keyboard - 00a9 AtermIT21L 128K Support Standard - 00aa AtermITX72 128K Support Standard - 00ab AtermITX62 128K Support Standard - 00ac AtermIT42 128K Support Standard - 00ae INSMATEV70G-MAX Standard - 00af AtermITX70 128K Support Standard - 00b0 AtermITX80 128K Support Standard - 00b2 AtermITX80D 128K Support Standard - 00c0 Wireless Remocon - 00f7 Smart Display PK-SD10 - 011d e228 Mobile Phone - 0203 HID Audio Controls - 55aa Hub - 55ab Hub [iMac/iTouch kbd] - 8010 Intellibase Hub - 8011 Intellibase Hub - efbe P!cty 900 [HP DJ] - f0be P!cty 920 [HP DJ 812c] -040a Kodak Co. - 0001 DVC-323 - 0002 DVC-325 - 0100 DC-220 - 0110 DC-260 - 0111 DC-265 - 0112 DC-290 - 0120 DC-240 - 0121 DC-240 (PTP firmware) - 0130 DC-280 - 0131 DC-5000 - 0132 DC-3400 - 0140 DC-4800 - 0160 DC4800 - 0170 DX3900 - 0200 Digital Camera - 0300 EZ-200 - 0400 MC3 - 0402 Digital Camera - 0403 Z7590 - 0500 DX3500 - 0510 DX3600 - 0525 DX3215 - 0530 DX3700 - 0535 EasyShare CX4230 Camera - 0540 LS420 - 0550 DX4900 - 0555 DX4330 - 0560 CX4200 - 0565 CX4210 - 0566 CX4300 - 0567 LS753 - 0568 LS443 - 0569 LS663 - 0570 DX6340 - 0571 CX6330 - 0572 DX6440 - 0573 CX6230 - 0574 CX6200 - 0575 DX6490 - 0576 DX4530 - 0577 DX7630 - 0578 CX7300/CX7310 - 0579 CX7220 - 057a CX7330 - 057b CX7430 - 057c CX7530 - 057d DX7440 - 057e C300 - 057f DX7590 - 0580 Z730 - 0581 Digital Camera - 0582 Digital Camera - 0583 Digital Camera - 0584 CX6445 - 0585 Digital Camera - 0586 CX7525 - 0587 Digital Camera - 0588 Digital Camera - 0589 EasyShare C360 - 058a C310 - 058b Digital Camera - 058c C330 - 058d C340 - 058e V530 - 058f V550 - 0590 Digital Camera - 0591 Digital Camera - 0592 Digital Camera - 0593 Digital Camera - 0594 Digital Camera - 0595 Digital Camera - 0596 Digital Camera - 0597 Digital Camera - 0598 Digital Camera - 0599 Digital Camera - 059a Digital Camera - 059b Digital Camera - 059c Digital Camera - 059d Digital Camera - 059e Digital Camera - 059f Digital Camera - 05a0 Digital Camera - 05a1 Digital Camera - 05a2 Digital Camera - 05a3 Digital Camera - 05a4 Digital Camera - 05a5 Digital Camera - 05a6 Digital Camera - 05a7 Digital Camera - 05a8 Digital Camera - 05a9 Digital Camera - 05aa Digital Camera - 05ab Digital Camera - 05ac Digital Camera - 05ad Digital Camera - 05ae Digital Camera - 05af Digital Camera - 05b0 Digital Camera - 05b1 Digital Camera - 05b2 Digital Camera - 05b3 EasyShare Z710 Camera - 05b4 Digital Camera - 05b5 Digital Camera - 05b6 Digital Camera - 05b7 Digital Camera - 05b8 Digital Camera - 05b9 Digital Camera - 05ba Digital Camera - 05bb Digital Camera - 05bc Digital Camera - 05bd Digital Camera - 05be Digital Camera - 05bf Digital Camera - 05c0 Digital Camera - 05c1 Digital Camera - 05c2 Digital Camera - 05c3 Digital Camera - 05c4 Digital Camera - 05c5 Digital Camera - 4000 InkJet Color Printer - 410d EasyShare G600 Printer Dock - 5010 Wireless Adapter - 5012 DBT-220 Bluetooth Adapter - 6001 i30 - 6002 i40 - 6003 i50 - 6004 i60 - 6005 i80 -040b Weltrend Semiconductor - 6510 Weltrend Bar Code Reader - 6520 XBOX Xploder -040c VTech Computers, Ltd -040d VIA Technologies, Inc. - 3184 VNT VT6656 USB-802.11 Wireless LAN Adapter - 6205 USB 2.0 Card Reader -040e MCCI -040f Echo Speech Corp. -0411 MelCo., Inc. - 0001 LUA-TX Ethernet [pegasus] - 0005 LUA-TX Ethernet - 0006 WLI-USB-L11 Wireless LAN Adapter - 0009 LUA2-TX Ethernet - 000b WLI-USB-L11G-WR Wireless LAN Adapter - 000d WLI-USB-L11G Wireless LAN Adapter - 0012 LUA-KTX Ethernet - 0013 USB2-IDE Adapter - 0016 WLI-USB-S11 802.11b Adapter - 0018 USB2-IDE Adapter - 001c USB-IDE Bridge: DUB-PxxG - 0027 WLI-USB-KS11G 802.11b Adapter - 003d LUA-U2-KTX Ethernet - 0044 WLI-USB-KB11 Wireless LAN Adapter - 004d WLI-USB-B11 Wireless LAN Adapter - 0050 WLI2-USB2-G54 Wireless LAN Adapter - 005e WLI-U2-KG54-YB WLAN - 0065 Python2 WDM Encoder - 0066 WLI-U2-KG54 WLAN - 0067 WLI-U2-KG54-AI WLAN - 008b Nintendo Wi-Fi - 0091 WLI-U2-KAMG54 Wireless LAN Adapter - 0092 WLI-U2-KAMG54 Bootloader - 0097 WLI-U2-KG54-BB - 00a9 WLI-U2-AMG54HP Wireless LAN Adapter - 00aa WLI-U2-AMG54HP Bootloader - 00b3 PC-OP-RS1 RemoteStation - 00ca 802.11n Network Adapter - 00cb WLI-U2-G300N 802.11n Adapter - 00d8 WLI-U2-SG54HP - 00d9 WLI-U2-G54HP - 00da WLI-U2-KG54L -0412 Award Software International -0413 Leadtek Research, Inc. - 1310 WinFast TV - NTSC + FM - 1311 WinFast TV - NTSC + MTS + FM - 1312 WinFast TV - PAL BG + FM - 1313 WinFast TV - PAL BG+TXT + FM - 1314 WinFast TV Audio - PHP PAL I - 1315 WinFast TV Audio - PHP PAL I+TXT - 1316 WinFast TV Audio - PHP PAL DK - 1317 WinFast TV Audio - PHP PAL DK+TXT - 1318 WinFast TV - PAL I/DK + FM - 1319 WinFast TV - PAL N + FM - 131a WinFast TV Audio - PHP SECAM LL - 131b WinFast TV Audio - PHP SECAM LL+TXT - 131c WinFast TV Audio - PHP SECAM DK - 131d WinFast TV - SECAM DK + TXT + FM - 131e WinFast TV - NTSC Japan + FM - 1320 WinFast TV - NTSC - 1321 WinFast TV - NTSC + MTS - 1322 WinFast TV - PAL BG - 1323 WinFast TV - PAL BG+TXT - 1324 WinFast TV Audio - PHP PAL I - 1325 WinFast TV Audio - PHP PAL I+TXT - 1326 WinFast TV Audio - PHP PAL DK - 1327 WinFast TV Audio - PHP PAL DK+TXT - 1328 WinFast TV - PAL I/DK - 1329 WinFast TV - PAL N - 132a WinFast TV Audio - PHP SECAM LL - 132b WinFast TV Audio - PHP SECAM LL+TXT - 132c WinFast TV Audio - PHP SECAM DK - 132d WinFast TV - SECAM DK + TXT - 132e WinFast TV - NTSC Japan - 6023 EMP Audio Device - 6024 WinFast PalmTop/Novo TV Video - 6025 WinFast DTV Dongle (cold state) - 6026 WinFast DTV Dongle (warm state) - 6125 WinFast DTV Dongle - 6126 WinFast DTV Dongle BDA Driver - 6f00 WinFast DTV Dongle (STK7700P based) -0414 Giga-Byte Technology Co., Ltd -0416 Winbond Electronics Corp. - 0035 W89C35 802.11bg WLAN Adapter - 0101 Hub - 0961 AVL Flash Card Reader - 3810 Smart Card Controller - 3811 Generic Controller - Single interface - 3812 Smart Card Controller_2Interface - 3813 Panel Display - 5518 4-Port Hub - 551a PC Sync Keypad - 551b PC Async Keypad - 551c Sync Tenkey - 551d Async Tenkey - 551e Keyboard - 551f Keyboard w/ Sys and Media - 5521 Keyboard - 6481 16-bit Scanner - 7721 Memory Stick Reader/Writer - 7722 Memory Stick Reader/Writer - 7723 SD Card Reader -0417 Symbios Logic -0418 AST Research -0419 Samsung Info. Systems America, Inc. - 0001 IrDA Remote Controller - 3001 Xerox P1202 Laser Printer - 3003 Olivetti PG L12L - 3201 Docuprint P8ex - 3404 SCX-5x12 Series - 3406 MFP 830 Series - 3407 ML-912 - 3601 InkJet Color Printer - 3602 InkJet Color Printer - 4602 Remote NDIS Network Device - 8001 Hub - 8002 SyncMaster 757DFX HID Device -041a Phoenix Technologies, Ltd -041b d'TV -041d S3, Inc. -041e Creative Technology, Ltd - 1002 Nomad II - 1003 Blaster GamePad Cobra - 1050 GamePad Cobra - 3000 SoundBlaster Extigy - 3002 SB External Composite Device - 3010 SoundBlaster MP3+ - 3014 SB External Composite Device - 3015 Sound Blaster Digital Music LX - 3020 SoundBlaster Audigy 2 NX - 3030 SB External Composite Device - 3040 SoundBlaster Live! 24-bit External SB0490 - 3060 Sound Blaster Audigy 2 ZS External - 3061 SoundBlaster Audigy 2 ZS Video Editor - 3090 Sound Blaster Digital Music SX - 3f02 E-Mu 0202 - 3f04 E-Mu 0404 - 4003 VideoBlaster WebCam Go Plus [W9967CF] - 4004 Nomad II MG - 4005 WebCam Blaster Go ES - 4007 Go Mini - 400a PC-Cam 300 - 400b PC-Cam 600 - 400c WebCam 5 [pwc] - 400d WebCam PD1001 - 400f PC-CAM 550 (Composite) - 4011 WebCam PRO eX - 4012 PC-CAM350 - 4013 PC-Cam 750 - 4015 CardCam Value - 4016 CardCam - 4017 WebCam Mobile - 4018 WebCam Vista - 4019 Audio Device - 401c WebCam NX [PD1110] - 401d WebCam NX Ultra - 401e WebCam NX Pro - 401f Webcam Notebook - 4020 WebCam NX - 4021 WebCam NX Ultra - 4022 WebCam NX Pro - 4028 Vista Plus cam [VF0090] - 402f DC-CAM 3000Z - 4034 WebCam Instant - 4035 WebCam Instant - 4036 Webcam Live!/Live! Pro - 4037 WebCam Live! - 4038 ORITE CCD Webcam(PC370R) - 4039 WebCam Live! Effects - 403a WebCam NX Pro 2 - 403c WebCam Live! Ultra - 403d WebCam Notebook Ultra - 403e WebCam Vista Plus - 4041 WebCam Live! Motion - 4045 Live! Cam Voice - 4049 Live! Cam Voice - 4051 Live! Cam Notebook Pro - 4052 Live! Cam Vista IM - 4053 Live! Cam Video IM - 4054 Live! Cam Video IM - 4055 Live! Cam Video IM Pro - 4056 Live! Cam Video IM Pro - 4057 Live! Cam Optia - 4058 Live! Cam Optia AF - 4068 WebCam Live! Notebook - 4100 Nomad Jukebox 2 - 4101 Nomad Jukebox 3 - 4102 NOMAD MuVo^2 - 4106 Nomad MuVo - 4107 NOMAD MuVo - 4108 Nomad Jukebox Zen - 4109 Nomad Jukebox Zen NX - 410b Nomad Jukebox Zen USB 2.0 - 410c Nomad MuVo NX - 410f NOMAD MuVo^2 (Flash) - 4110 Nomad Jukebox Zen Xtra - 4111 Dell Digital Jukebox - 4116 MuVo^2 - 4117 Nomad MuVo TX - 411b Zen Touch - 411c Nomad MuVo USB 2.0 - 411d Zen - 411e Zen Micro - 4123 Zen Portable Media Center - 4124 MuVo^2 FM (uHDD) - 4126 Dell DJ (2nd gen) - 4127 Dell DJ - 4128 NOMAD Jukebox Zen Xtra (mtp) - 412b MuVo N200 with FM radio - 4130 Zen Micro (mtp) - 4131 Zen Touch (mtp) - 4133 Mass Storage Device - 4134 Zen Neeon - 4136 Zen Sleek - 4137 Zen Sleek (mtp) - 4139 Zen Nano Plus - 413c Zen MicroPhoto - 4151 Zen Vision:M (mtp) - 4155 Zen Stone plus - 500f Broadband Blaster 8012U-V - 5015 TECOM Bluetooth Device - ffff WebCam Live! Ultra -041f LCS Telegraphics -0420 Chips and Technologies - 1307 Celly SIM Card Reader -0421 Nokia Mobile Phones - 0018 6288 GSM Smartphone - 0019 6288 GSM Smartphone (imaging mode) - 001a 6288 GSM Smartphone (file transfer mode) - 0024 5610 XpressMusic (Storage mode) - 0025 5610 XpressMusic (PC-Suite mode) - 0028 5610 XpressMusic (Imaging mode) - 0096 N810 Internet Tablet - 0103 ADL Flashing Engine AVALON Parent - 0104 ADL Re-Flashing Engine Parent - 0105 E-61 (Firmware update mode) - 0106 ROM Parent - 0400 7600 Phone Parent - 0401 6650 GSM Phone - 0402 6255 Phone Parent - 0404 5510 - 0405 9500 GSM Communicator - 0407 Music Player HDR-1(tm) - 040b N-Gage GSM Phone - 040d 6620 Phone Parent - 040e 6651 Phone Parent - 040f 6230 GSM Phone - 0410 6630 Imaging Smartphone - 0411 7610 Phone Parent - 0413 6260 Phone Parent - 0414 7370 - 0415 9300 GSM Smartphone - 0416 6170 Phone Parent - 0417 7270 Phone Parent - 0418 E-70 (PC-Suite mode) - 0419 E-60 (PC-Suite mode) - 041a 9500 GSM Communicator (RNDIS) - 041b 9300 GSM Smartphone (RNDIS) - 041c 7710 Phone Parent - 041d 6670 Phone Parent - 041e 6680 - 041f 6235 Phone Parent - 0421 3230 Phone Parent - 0422 6681 Phone Parent - 0423 6682 Phone Parent - 0428 6230i Modem - 0429 6230i MultiMedia Card - 0431 770 Internet Tablet - 0432 N90 Phone Parent - 0435 E-70 (IP Passthrough/RNDIS mode) - 0436 E-60 (IP Passthrough/RNDIS mode) - 0437 6265 Phone Parent - 043a N70 USB Phone Parent - 043b 3155 Phone Parent - 043c 6155 Phone Parent - 043d 6270 Phone Parent - 0443 N70 Phone Parent - 044c NM850iG Phone Parent - 044d E-61 (PC Suite mode) - 044e E-61 (Data Exchange mode) - 044f E-61 (IP Passthrough/RNDIS mode) - 0453 9300 Phone Parent - 0456 6111 Phone Parent - 045a 6280 Phone Parent - 045d 6282 Phone Parent - 046e 6110 Navigator - 0485 MTP Device - 04c3 N800 Internet Tablet - 04ce E90 Communicator (PC-Suite mode) - 04cf E90 Communicator (Storage mode) - 04f9 6300 (PC-Suite mode) - 0600 Digital Pen SU-1B - 0800 Connectivity Cable DKU-5 - 0801 Data Cable DKU-6 - 0802 CA-42 Phone Parent -0422 ADI Systems, Inc. -0423 Computer Access Technology Corp. - 000a NetMate Ethernet - 000c NetMate2 Ethernet - 000d USB Chief Analyzer - 0100 Generic Universal Protocol Analyzer - 0101 UPA USBTracer - 0200 Generic 10K Universal Protocol Analyzer - 020a PETracer ML - 0300 Generic Universal Protocol Analyzer - 0301 2500H Tracer Trainer - 030a PETracer x1 - 1237 Andromeda Hub -0424 Standard Microsystems Corp. - 0001 Integrated Hub - 0acd Sitecom Internal Multi Memory reader/writer MD-005 - 0fdc Floppy - 10cd Sitecom Internal Multi Memory reader/writer MD-005 - 2020 USB Hub - 20cd Sitecom Internal Multi Memory reader/writer MD-005 - 20fc 6-in-1 Card Reader - 2228 9-in-2 Card Reader - 223a 8-in-1 Card Reader - 2503 USB 2.0 Hub - 2504 USB 2.0 Hub - 2524 USB MultiSwitch Hub -0425 Motorola Semiconductors HK, Ltd - 0101 G-Tech Wireless Mouse & Keyboard -0426 Integrated Device Technology, Inc. - 0426 WDM Driver -0427 Motorola Electronics Taiwan, Ltd -0428 Advanced Gravis Computer Tech, Ltd - 4001 GamePad Pro -0429 Cirrus Logic -042a Ericsson Austrian, AG -042b Intel Corp. - 9316 8x931Hx Customer Hub -042c Innovative Semiconductors, Inc. -042d Micronics -042e Acer, Inc. - 0380 MP3 Player -042f Molex, Inc. -0430 Sun Microsystems, Inc. - 0002 109 Keyboard - 0005 Type 6 Keyboard - 000a 109 Japanese Keyboard - 000b 109 Japanese Keyboard - 0082 109 Japanese Keyboard - 0083 109 Japanese Keyboard - 0100 3-button Mouse - 36ba Bus Powered Hub -0431 Itac Systems, Inc. - 0100 Mouse-Trak 3-button Track Ball -0432 Unisys Corp. -0433 Alps Electric, Inc. - 1101 IBM Game Controller - abab Keyboard -0434 Samsung Info. Systems America, Inc. -0435 Hyundai Electronics America -0436 Taugagreining HF - 0005 CameraMate (DPCM_USB) -0437 Framatome Connectors USA -0438 Advanced Micro Devices, Inc. -0439 Voice Technologies Group -043d Lexmark International, Inc. - 0001 Laser Printer - 0002 Optra E310 Printer - 0003 Laser Printer - 0004 Laser Printer - 0005 Laser Printer - 0006 Laser Printer - 0007 Laser Printer - 0008 Inkjet Color Printer - 0009 Optra S2450 Printer - 000a Laser Printer - 000b Inkjet Color Printer - 000c Optra E312 Printer - 000d Laser Printer - 000e Laser Printer - 000f Laser Printer - 0010 Laser Printer - 0011 Laser Printer - 0012 Inkjet Color Printer - 0013 Inkjet Color Printer - 0014 InkJet Color Printer - 0015 InkJet Color Printer - 0016 Z12 Color Jetprinter - 0017 Z32 printer - 0018 Z52 Printer - 0019 Forms Printer - 001a Z65 Printer - 001b InkJet Photo Printer - 001c Kodak Personal Picture Maker 200 Printer - 001d InkJet Color Printer - 001e InkJet Photo Printer - 001f Kodak Personal Picture Maker 200 Card Reader - 0020 Z51 Printer - 0021 Z33 Printer - 0022 InkJet Color Printer - 0023 Laser Printer - 0024 Laser Printer - 0025 InkJet Color Printer - 0026 InkJet Color Printer - 0027 InkJet Color Printer - 0028 InkJet Color Printer - 0029 Scan Print Copy - 002a Scan Print Copy - 002b Scan Print Copy - 002c Scan Print Copy - 002d X70/X73 Scan/Print/Copy - 002e Scan Print Copy - 002f Scan Print Copy - 0030 Scan Print Copy - 0031 Scan Print Copy - 0032 Scan Print Copy - 0033 Scan Print Copy - 0034 Scan Print Copy - 0035 Scan Print Copy - 0036 Scan Print Copy - 0037 Scan Print Copy - 0038 Scan Print Copy - 0039 Scan Print Copy - 003a Scan Print Copy - 003b Scan Print Copy - 003c Scan Print Copy - 003d X83 Scan/Print/Copy - 003e Scan Print Copy - 003f Scan Print Copy - 0040 Scan Print Copy - 0041 Scan Print Copy - 0042 Scan Print Copy - 0043 Scan Print Copy - 0044 Scan Print Copy - 0045 Scan Print Copy - 0046 Scan Print Copy - 0047 Scan Print Copy - 0048 Scan Print Copy - 0049 Scan Print Copy - 004a Scan Print Copy - 004b Scan Print Copy - 004c Scan Print Copy - 004d Laser Printer - 004e Laser Printer - 004f InkJet Color Printer - 0050 InkJet Color Printer - 0051 Laser Printer - 0052 Laser Printer - 0053 InkJet Color Printer - 0054 InkJet Color Printer - 0057 Z35 Printer - 0058 Laser Printer - 005a X63 - 005c InkJet Color Printer - 0060 X74/X75 Scanner - 0061 X74 Hub - 0065 X5130 - 0069 X74/X75 Printer - 006d X125 - 0072 X6170 Printer - 0073 InkJet Color Printer - 0078 InkJet Color Printer - 0079 InkJet Color Printer - 007a Generic Hub - 007b InkJet Color Printer - 007c Lexmark X1110/X1130/X1140/X1150/X1170/X1180/X1185 - 007d Photo 3150 - 008a 4200 Series - 008b InkJet Color Printer - 008c to CF/SM/SD/MS Card Reader - 008e InkJet Color Printer - 008f X422 - 0093 X5250 - 0095 E220 Printer - 0096 2200 Series - 0097 P6250 - 0098 7100 Series - 009e P910 Series Human Interface Device - 009f InkJet Color Printer - 00a9 IBM Infoprint 1410 MFP - 00ab InkJet Color Printer - 00b2 3300 Series - 00b8 7300 Series - 00b9 8300 Series - 00ba InkJet Color Printer - 00bb 2300 Series - 00bd Printing Support - 00be Printing Support - 00bf Printing Support - 00c0 6300 Series - 00c1 4300 Series - 00c7 Printing Support - 00c8 Printing Support - 00c9 Printing Support - 00cb Printing Support - 00d0 9300 Series - 00d3 X340 Scanner - 00d4 X342n Scanner - 00d5 Printing Support - 00d6 X340 Scanner - 00e8 X642e - 00e9 2400 Series - 00f6 3400 Series - 00f7 InkJet Color Printer - 00ff InkJet Color Printer - 010b 2500 Series - 010d 3500-4500 Series - 010f 6500 Series - 4303 Xerox WorkCentre Pro 412 -043e LG Electronics USA, Inc. - 42bd Flatron 795FT Plus Monitor - 4a4d Flatron 915FT Plus Monitor - 7001 MF-PD100 Soul Digital MP3 Player - 7013 MP3 Player - 8484 LPC-U30 Webcam II - 8585 LPC-UC35 Webcam - 8888 Electronics VCS Camera II(LPC-U20) - 9800 Remote Control Receiver_iMON - 9803 eHome Infrared Receiver - 9804 DMB Receiver Control - 9c01 LGE Sync -043f RadiSys Corp. -0440 Eizo Nanao Corp. -0441 Winbond Systems Lab. - 1456 Hub -0442 Ericsson, Inc. - abba Bluetooth Device -0443 Gateway, Inc. - 000e Multimedia Keyboard - 002e Millennium Keyboard -0445 Lucent Technologies, Inc. -0446 NMB Technologies Corp. - 6781 Keyboard with PS/2 Mouse Port - 6782 Keyboard -0447 Momentum Microsystems -044a Shamrock Tech. Co., Ltd -044b WSI -044c CCL/ITRI -044d Siemens Nixdorf AG -044e Alps Electric Co., Ltd - 1104 Japanese Keyboard - 2002 MD-5500 Printer - 2014 Bluetooth Device - 3001 UGTZ4 Bluetooth - 3002 Bluetooth Device - 3003 Bluetooth Device - 3004 Bluetooth Adapter - 3005 Integrated Bluetooth Device - 3006 Bluetooth Adapter - 3007 GlidePoint PS/2 TouchPad - 300c Bluetooth Controller (ALPS/UGPZ6) - 300d Bluetooth Controller (ALPS/UGPZ6) - ffff Compaq Bluetooth Multiport Module -044f ThrustMaster, Inc. - 0400 HOTAS Cougar - a003 Rage 3D Game Pad - a01b PK-GP301 Driving Wheel - a0a0 Top Gun Joystick - a0a1 Top Gun Joystick (rev2) - a0a3 Fusion Digital GamePad - a201 PK-GP201 PlayStick - b203 360 Modena Pro Wheel - b300 Firestorm Dual Power - b304 Firestorm Dual Power - b307 vibrating Upad - b603 force feedback Wheel - b605 force feedback Racing Wheel - b700 Tacticalboard -0450 DFI, Inc. -0451 Texas Instruments, Inc. - 1234 Bluetooth Device - 1428 Hub - 1446 TUSB2040/2070 Hub - 2036 TUSB2036 Hub - 2046 TUSB2046 Hub - 2077 TUSB2077 Hub - 3410 TUSB3410 Microcontroller - 3f02 SMC WSKP100 Wi-Fi Phone - 5409 Frontier Labs NEX IA+ Digital Audio Player - 6000 AU5 ADSL Modem (pre-reenum) - 6001 AU5 ADSL Modem - 6060 RNDIS/BeWAN ADSL2+ - 6070 RNDIS/BeWAN ADSL2+ - 625f Trekstor USB-Stick 12 CS-D 12 GB - dbc0 Device Bay Controller - e001 GraphLink - e004 TI-89 Titanium Calculator - e008 TI-84 Plus Silver Calculator - f430 MSP-FET430UIF JTAG Tool - ffff Bluetooth Device -0452 Mitsubishi Electronics America, Inc. - 0021 HID Monitor Controls - 0050 Diamond Pro 900u CRT Monitor - 0051 Integrated Hub -0453 CMD Technology - 6781 NMB Keyboard - 6783 Chicony Composite Keyboard -0454 Vobis Microcomputer AG -0455 Telematics International, Inc. -0456 Analog Devices, Inc. -0457 Silicon Integrated Systems Corp. - 0150 Super Talent 1GB Flash Drive - 0151 Super Flash 1GB / GXT 64MB Flash Drive - 0162 SiS162 usb Wireless LAN Adapter - 0163 802.11 Wireless LAN Adapter - 5401 Wireless Adapter RO80211GS-USB -0458 KYE Systems Corp. (Mouse Systems) - 0001 Mouse - 0002 Genius NetMouse Pro - 0003 Genius NetScroll+ - 0006 Easy Mouse+ USB(USB\Vid_0458&Pid;_0006) Mouse - 000b NetMouse Wheel(P+U) - 000c TACOMA Fingerprint V1.06.01 - 000e VideoCAM Web - 0013 TACOMA Fingerprint Mouse V1.06.01 - 001a Genius WebScroll+ - 0036 Pocket Mouse LE - 004c Slimstar Pro Keyboard - 0056 Ergo 300 Mouse - 0057 Enhanced Gaming Device - 0059 Enhanced Laser Device - 005a Enhanced Device - 005b Enhanced Device - 005c Enhanced Laser Gaming Device - 005d Enhanced Device - 0061 Bluetooth Dongle - 0083 Bluetooth Dongle - 0100 EasyPen Tablet - 0101 CueCat - 1001 Joystick - 1002 Game Pad - 1003 Genius VideoCam - 1004 Flight2000 F-23 Joystick - 100a Aashima Technology Trust Sight Fighter Vibration Feedback Joystick - 2001 ColorPage-Vivid Pro Scanner - 2004 ColorPage-HR6 V1 Scanner - 2005 ColorPage-HR6/Vivid3 - 2007 ColorPage-HR6 V2 Scanner - 2008 ColorPage-HR6 V2 Scanner - 2009 ColorPage-HR6A Scanner - 2011 ColorPage-Vivid3x Scanner - 2012 Plustek Scanner - 2013 ColorPage-HR7 Scanner - 2014 ColorPage-Vivid4 - 2015 ColorPage-HR7LE Scanner - 2016 ColorPage-HR6X Scanner - 2017 ColorPage-Vivid3xe - 2018 ColorPage-HR7X - 2019 ColorPage-HR6X Slim - 201a ColorPage-Vivid4xe - 201b ColorPage-Vivid4x - 201c ColorPage-HR8 - 201d ColorPage-Vivid 1200 X - 201e ColorPage-Slim 1200 - 201f ColorPage-Vivid 1200 XE - 2020 ColorPage-Slim 1200 USB2 - 2021 ColorPage-SF600 - 301d Genius MaxFire MiniPad - 6001 GF3000F Ethernet Adapter - 7004 VideoCAM Express - 7007 VideoCAM Web - 7009 G-Shot G312 Still Camera Device - 700c VideoCAM Web V3 - 700d G-Shot G511 Composite Device - 700f VideoCAM Web V4 - 7012 WebCAM USB2.0 - 7014 VideoCAM Live V3 - 701c G-Shot G512 Still Camera - 7020 Sim 321C -0459 Adobe Systems, Inc. -045a SONICblue, Inc. - 07da Supra Express 56K modem - 0b4a SupraMax 2890 56K Modem [Lucent Atlas] - 0b68 SupraMax 56K Modem - 5001 Rio 600 MP3 Player - 5002 Rio 800 MP3 Player - 5003 Nike Psa/Play MP3 Player - 5005 Rio S10 MP3 Player - 5006 Rio S50 MP3 Player - 5007 Rio S35 MP3 Player - 5008 Rio 900 MP3 Player - 5009 Rio S30 MP3 Player - 500d Fuse MP3 Player - 500e Chiba MP3 Player - 500f Cali MP3 Player - 5010 Rio S11 MP3 Player - 501c Virgin MPF-1000 - 501d Rio Fuse - 501e Rio Chiba - 501f Rio Cali - 503f Cali256 MP3 Player - 5202 Rio Riot MP3 Player - 5210 Rio Karma Music Player - 5220 Rio Nitrus MP3 Player - 5221 Rio Eigen -045b Hitachi, Ltd -045d Nortel Networks, Ltd -045e Microsoft Corp. - 0007 SideWinder Game Pad - 0008 SideWinder Precision Pro - 0009 IntelliMouse - 000b Natural Keyboard Elite - 000e SideWinder® Freestyle Pro - 0014 Digital Sound System 80 - 001a SideWinder Precision Racing Wheel - 001b SideWinder Force Feedback 2 Joystick - 001c Internet Keyboard Pro - 001d Natural Keyboard Pro - 001e IntelliMouse Explorer - 0023 Trackball Optical - 0024 Trackball Explorer - 0025 IntelliEye Mouse - 0026 SideWinder GamePad Pro - 0027 SideWinder PnP GamePad - 0028 SideWinder Dual Strike - 0029 IntelliMouse Optical - 002b Internet Keyboard Pro - 002d Internet Keyboard - 002f Integrated Hub - 0033 Sidewinder Strategic Commander - 0034 SideWinder Force Feedback Wheel - 0038 SideWinder Precision 2 - 0039 IntelliMouse Optical - 003b SideWinder Game Voice - 003c SideWinder Joystick - 0040 Wheel Mouse Optical - 0047 IntelliMouse Explorer 3.0 - 0048 Office Keyboard 1.0A - 0053 Optical Mouse - 0059 Wireless IntelliMouse Explorer - 005c Office Keyboard (106/109) - 005f Wireless MultiMedia Keyboard - 0061 Wireless MultiMedia Keyboard (106/109) - 0063 Wireless Natural MultiMedia Keyboard - 0065 Wireless Natural MultiMedia Keyboard (106/109) - 006a Wireless Optical Mouse (IntelliPoint) - 006d eHome Remote Control Keyboard keys - 006e MN510 802.11b Adapter - 006f Smart Display Reference Device - 0070 Wireless MultiMedia Keyboard - 0071 Wireless MultiMedia Keyboard (106/109) - 0072 Wireless Natural MultiMedia Keyboard - 0073 Wireless Natural MultiMedia Keyboard (106/109) - 007a 10/100 USB NIC - 007d Notebook Optical Mouse - 007e Wireless Transceiver for Bluetooth - 0080 Digital Media Pro Keyboard - 0083 Basic Optical Mouse - 0084 Basic Optical Mouse - 008a Wireless Keyboard and Mouse - 008b Dual Receiver Wireless Mouse (IntelliPoint) - 008c Wireless Intellimouse Explorer 2.0 - 0095 IntelliMouse Explorer 4.0 (IntelliPoint) - 009c Wireless Transceiver for Bluetooth 2.0 - 00a0 eHome Infrared Receiver - 00b0 Digital Media Pro Keyboard - 00b9 Wireless Optical Mouse 3.0 - 00bb Fingerprint Reader - 00bc Fingerprint Reader - 00bd Fingerprint Reader - 00c2 Wireless Adapter MN-710 - 00c9 MTP Device - 00ce Generic PPC Flash device - 00d1 Optical Mouse with Tilt Wheel - 00da eHome Infrared Receiver - 00db Natural Ergonomic Keyboard 4000 V1.0 - 00e1 Wireless Laser Mouse 6000 Reciever - 00f4 LifeCam VX-6000. - 00f5 LifeCam VX-3000. - 00f7 LifeCam VX-1000. - 00f8 LifeCam NX-6000. - 0202 Xbox Controller - 0280 XBox Device - 0284 Xbox DVD Playback Kit - 0285 Xbox Controller S - 0288 Xbox Controller S Hub - 0289 Xbox Controller S - 028b Xbox360 DVD Emulator - 028d Xbox360 Memory Unit 64MB - 028e Xbox360 Controller - 028f Xbox360 Wireless Controller - 0290 Xbox360 Performance Pipe (PIX) - 0292 Xbox360 Wireless Networking Adapter - 029c Xbox360 HD-DVD Drive - 029d Xbox360 HD-DVD Drive - 029e Xbox360 HD-DVD Memory Unit - 0400 Windows Powered Pocket PC 2002 - 0401 Windows Powered Pocket PC 2002 - 0402 Windows Powered Pocket PC 2002 - 0403 Windows Powered Pocket PC 2002 - 0404 Windows Powered Pocket PC 2002 - 0405 Windows Powered Pocket PC 2002 - 0406 Windows Powered Pocket PC 2002 - 0407 Windows Powered Pocket PC 2002 - 0408 Windows Powered Pocket PC 2002 - 0409 Windows Powered Pocket PC 2002 - 040a Windows Powered Pocket PC 2002 - 040b Windows Powered Pocket PC 2002 - 040c Windows Powered Pocket PC 2002 - 040d Windows Powered Pocket PC 2002 - 040e Windows Powered Pocket PC 2002 - 040f Windows Powered Pocket PC 2002 - 0410 Windows Powered Pocket PC 2002 - 0411 Windows Powered Pocket PC 2002 - 0412 Windows Powered Pocket PC 2002 - 0413 Windows Powered Pocket PC 2002 - 0414 Windows Powered Pocket PC 2002 - 0415 Windows Powered Pocket PC 2002 - 0416 Windows Powered Pocket PC 2002 - 0417 Windows Powered Pocket PC 2002 - 0432 Windows Powered Pocket PC 2003 - 0433 Windows Powered Pocket PC 2003 - 0434 Windows Powered Pocket PC 2003 - 0435 Windows Powered Pocket PC 2003 - 0436 Windows Powered Pocket PC 2003 - 0437 Windows Powered Pocket PC 2003 - 0438 Windows Powered Pocket PC 2003 - 0439 Windows Powered Pocket PC 2003 - 043a Windows Powered Pocket PC 2003 - 043b Windows Powered Pocket PC 2003 - 043c Windows Powered Pocket PC 2003 - 043d Becker Traffic Assist Highspeed 7934 - 043e Windows Powered Pocket PC 2003 - 043f Windows Powered Pocket PC 2003 - 0440 Windows Powered Pocket PC 2003 - 0441 Windows Powered Pocket PC 2003 - 0442 Windows Powered Pocket PC 2003 - 0443 Windows Powered Pocket PC 2003 - 0444 Windows Powered Pocket PC 2003 - 0445 Windows Powered Pocket PC 2003 - 0446 Windows Powered Pocket PC 2003 - 0447 Windows Powered Pocket PC 2003 - 0448 Windows Powered Pocket PC 2003 - 0449 Windows Powered Pocket PC 2003 - 044a Windows Powered Pocket PC 2003 - 044b Windows Powered Pocket PC 2003 - 044c Windows Powered Pocket PC 2003 - 044d Windows Powered Pocket PC 2003 - 044e Windows Powered Pocket PC 2003 - 044f Windows Powered Pocket PC 2003 - 0450 Windows Powered Pocket PC 2003 - 0451 Windows Powered Pocket PC 2003 - 0452 Windows Powered Pocket PC 2003 - 0453 Windows Powered Pocket PC 2003 - 0454 Windows Powered Pocket PC 2003 - 0455 Windows Powered Pocket PC 2003 - 0456 Windows Powered Pocket PC 2003 - 0457 Windows Powered Pocket PC 2003 - 0458 Windows Powered Pocket PC 2003 - 0459 Windows Powered Pocket PC 2003 - 045a Windows Powered Pocket PC 2003 - 045b Windows Powered Pocket PC 2003 - 045c Windows Powered Pocket PC 2003 - 045d Windows Powered Pocket PC 2003 - 045e Windows Powered Pocket PC 2003 - 045f Windows Powered Pocket PC 2003 - 0460 Windows Powered Pocket PC 2003 - 0461 Windows Powered Pocket PC 2003 - 0462 Windows Powered Pocket PC 2003 - 0463 Windows Powered Pocket PC 2003 - 0464 Windows Powered Pocket PC 2003 - 0465 Windows Powered Pocket PC 2003 - 0466 Windows Powered Pocket PC 2003 - 0467 Windows Powered Pocket PC 2003 - 0468 Windows Powered Pocket PC 2003 - 0469 Windows Powered Pocket PC 2003 - 046a Windows Powered Pocket PC 2003 - 046b Windows Powered Pocket PC 2003 - 046c Windows Powered Pocket PC 2003 - 046d Windows Powered Pocket PC 2003 - 046e Windows Powered Pocket PC 2003 - 046f Windows Powered Pocket PC 2003 - 0470 Windows Powered Pocket PC 2003 - 0471 Windows Powered Pocket PC 2003 - 0472 Windows Powered Pocket PC 2003 - 0473 Windows Powered Pocket PC 2003 - 0474 Windows Powered Pocket PC 2003 - 0475 Windows Powered Pocket PC 2003 - 0476 Windows Powered Pocket PC 2003 - 0477 Windows Powered Pocket PC 2003 - 0478 Windows Powered Pocket PC 2003 - 0479 Windows Powered Pocket PC 2003 - 047a Windows Powered Pocket PC 2003 - 047b Windows Powered Pocket PC 2003 - 04c8 Windows Powered Smartphone 2002 - 04c9 Windows Powered Smartphone 2002 - 04ca Windows Powered Smartphone 2002 - 04cb Windows Powered Smartphone 2002 - 04cc Windows Powered Smartphone 2002 - 04cd Windows Powered Smartphone 2002 - 04ce Windows Powered Smartphone 2002 - 04d7 Windows Powered Smartphone 2003 - 04d8 Windows Powered Smartphone 2003 - 04d9 Windows Powered Smartphone 2003 - 04da Windows Powered Smartphone 2003 - 04db Windows Powered Smartphone 2003 - 04dc Windows Powered Smartphone 2003 - 04dd Windows Powered Smartphone 2003 - 04de Windows Powered Smartphone 2003 - 04df Windows Powered Smartphone 2003 - 04e0 Windows Powered Smartphone 2003 - 04e1 Windows Powered Smartphone 2003 - 04e2 Windows Powered Smartphone 2003 - 04e3 Windows Powered Smartphone 2003 - 04e4 Windows Powered Smartphone 2003 - 04e5 Windows Powered Smartphone 2003 - 04e6 Windows Powered Smartphone 2003 - 04e7 Windows Powered Smartphone 2003 - 04e8 Windows Powered Smartphone 2003 - 04e9 Windows Powered Smartphone 2003 - 04ea Windows Powered Smartphone 2003 - 0708 Transceiver v 3.0 for Bluetooth - 070a Charon Bluetooth Dongle (DFU) - 930a ISOUSB.SYS Intel 82930 Isochronous IO Test Board - fff8 Keyboard -0460 Ace Cad Enterprise Co., Ltd -0461 Primax Electronics, Ltd - 0300 G2-300 Scanner - 0301 G2E-300 Scanner - 0302 G2-300 #2 Scanner - 0303 G2E-300 #2 Scanner - 0340 Colorado 9600 Scanner - 0341 Colorado 600u Scanner - 0345 Visioneer 6200 Scanner - 0346 Memorex Maxx 6136u Scanner - 0347 Primascan Colorado 2600u/Visioneer 4400 Scanner - 0360 Colorado 19200 Scanner - 0361 Colorado 1200u Scanner - 0363 VistaScan Astra 3600(ENG) - 0364 LG Electronics Scanworks 600U Scanner - 0365 VistaScan Astra 3600(ENG) - 0366 6400 - 0367 VistaScan Astra 3600(ENG) - 0371 Visioneer Onetouch 8920 Scanner - 0374 UMAX Astra 2500 - 0375 VistaScan Astra 3600(ENG) - 0377 Medion MD 5345 Scanner - 0378 VistaScan Astra 3600(ENG) - 037b Medion MD 6190 Scanner - 037c VistaScan Astra 3600(ENG) - 0380 G2-600 Scanner - 0381 ReadyScan 636i Scanner - 0382 G2-600 #2 Scanner - 0383 G2E-600 Scanner - 038a UMAX Astra 3000/3600 - 038b Xerox 2400 Onetouch - 038c UMAX Astra 4100 - 0392 Medion/Lifetec/Tevion/Cytron MD 6190 - 03a8 9420M - 0813 IBM UltraPort Camera - 0815 Micro Innovations WebCam - 0819 Fujifilm IX-30 Camera [webcam mode] - 081a Fujifilm IX-30 Camera [storage mode] - 081c Elitegroup ECS-C11 Camera - 081d Elitegroup ECS-C11 Storage - 0a00 Web Cam 320 - 4d01 Comfort Keyboard - 4d02 Mouse-in-a-Box - 4d03 Kensington Mouse-in-a-box - 4d04 Mouse - 4d06 Balless Mouse (HID) - 4d2a PoPo Elixir Mouse (HID) - 4d2b Wireless Laser Mini Mouse (HID) - 4d2c PoPo Mini Pointer Mouse (HID) - 4d2e Optical Mobile Mouse (HID) -0463 MGE UPS Systems - 0001 UPS - ffff UPS -0464 AMP/Tycoelectronics Corp. -0467 AT&T Paradyne -0468 Wieson Technologies Co., Ltd -046a Cherry GmbH - 0001 My3000 Keyboard - 0003 My3000 Hub - 0004 CyBoard Keyboard - 0005 XX33 SmartCard Reader Keyboard - 0010 SmartBoard XX44 - 0023 Cymotion Master Linux Keyboard - 002d SmartTerminal XX44 - 003e SmartTerminal ST-2xxx -046b American Megatrends, Inc. - 0001 Keyboard - 0101 PS/2 Keyboard, Mouse & Joystick Ports - 0301 USB 1.0 Hub - 0500 Serial & Parallel Ports -046c Toshiba Corp., Digital Media Equipment -046d Logitech, Inc. - 0082 Acer Aspire 5672 Webcam - 0200 WingMan Extreme Joystick - 0203 M2452 Keyboard - 0301 M4848 Mouse - 0401 HP PageScan - 0402 NEC PageScan - 040f Logitech/Storm PageScan - 0430 Mic (Cordless) - 0801 QuickCam Home - 0810 QuickCam Pro - 0820 QuickCam VC - 0830 QuickClip - 0840 QuickCam Express - 0850 QuickCam Web - 0870 QuickCam Express - 0890 QuickCam Traveler - 0892 OrbiCam - 0894 CrystalCam - 0895 QuickCam for Dell Notebooks - 0896 OrbiCam - 0897 QuickCam for Dell Notebooks - 0899 QuickCam for Dell Notebooks - 08a0 QuickCam IM - 08a1 QuickCam IM with sound - 08a2 Labtec WebCam Pro - 08a3 QuickCam QuickCam Chat - 08a6 QuickCam IM - 08a7 QuickCam Image - 08a9 Notebook Deluxe - 08aa Labtec Notebooks - 08ac QuickCam Cool - 08ad QuickCam Communicate STX - 08ae Quickcam for Notebooks - 08af QuickCam Easy/Cool - 08b0 QuickCam 3000 Pro [pwc] - 08b1 QuickCam Notebook Pro - 08b2 QuickCam Pro 4000 - 08b3 QuickCam Zoom - 08b4 QuickCam Zoom - 08b5 QuickCam Sphere - 08b9 QuickCam IM - 08bd Microphone (Pro 4000) - 08c0 QuickCam Pro 3000 - 08c1 QuickCam Fusion - 08c2 QuickCam PTZ - 08c3 Camera (Notebooks Pro) - 08c5 QuickCam Pro 5000 - 08c6 QuickCam for DELL Notebooks - 08c9 QuickCam Ultra Vision - 08ca Mic (Fusion) - 08cb Mic (Notebooks Pro) - 08cc Mic (PTZ) - 08ce QuickCam Pro 5000 - 08cf QuickCam UpdateMe - 08d0 QuickCam Express - 08d7 QuickCam Communicate STX - 08d8 QuickCam for Notebook Deluxe - 08d9 QuickCam IM/Connect - 08da QuickCam Messanger - 08dd QuickCam for Notebooks - 08e0 QuickCam Express - 08e1 Labtec WebCam - 08f0 QuickCam Messenger - 08f1 QuickCam Express - 08f2 Microphone (Messenger) - 08f3 QuickCam Express - 08f4 Labtec WebCam - 08f5 QuickCam Messenger Communicate - 08f6 Quickcam Messenger Plus - 0900 ClickSmart 310 - 0901 ClickSmart 510 - 0903 ClickSmart 820 - 0905 ClickSmart 820 - 0910 QuickCam Cordless - 0920 QuickCam Express - 0921 Labtec WebCam - 0922 QuickCam Live - 0928 Quickcam Express - 0929 Labtec WebCam Pro - 092a QuickCam for Notebooks - 092b Labtec WebCam Plus - 092c QuickCam Chat - 092d QuickCam Express / Go - 092e QuickCam Chat - 092f QuickCam Express Plus - 0950 Pocket Camera - 0960 ClickSmart 420 - 0970 Pocket750 - 0990 QuickCam Pro 9000 - 0991 QuickCam Pro for Notebooks - 0992 QuickCam Communicate Deluxe - 0994 QuickCam Orbit/Sphere AF - 09b0 OrbiCam - 09c0 QuickCam for Dell Notebooks Mic - 09c1 QuickCam Deluxe for Notebooks - 0a01 USB Headset - 0a02 Premium Stereo USB Headset 350 - 0a03 Logitech USB Microphone - 0a04 V20 portable speakers (USB powered) - 0b02 BT Mini-Receiver (HID proxy mode) - 8801 Video Camera - b305 BT Mini-Receiver - bfe4 Premium Optical Wheel Mouse - c000 N43 [Pilot Mouse] - c001 N48/M-BB48 [FirstMouse Plus] - c002 M-BA47 [MouseMan Plus] - c003 MouseMan - c004 WingMan Gaming Mouse - c005 WingMan Gaming Wheel Mouse - c00b MouseMan Wheel - c00c Optical Wheel Mouse - c00d MouseMan Wheel+ - c00e M-BJ58/M-BJ69 Optical Wheel Mouse - c00f MouseMan Traveler/Mobile - c011 Optical MouseMan - c012 Mouseman Dual Optical - c014 Corded Workstation Mouse - c015 Corded Workstation Mouse - c016 M-UV69a/HP M-UV96 Optical Wheel Mouse - c018 Optical Wheel Mouse - c019 Optical Tilt Wheel Mouse - c01a M-BQ85 Optical Wheel Mouse - c01b MX310 Optical Mouse - c01c Optical Mouse - c01d MX510 Optical Mouse - c01e MX518 Optical Mouse - c024 MX300 Optical Mouse - c025 MX500 Optical Mouse - c030 iFeel Mouse - c031 iFeel Mouse+ - c032 MouseMan iFeel - c033 iFeel MouseMan+ - c034 MouseMan Optical - c035 Mouse - c036 Mouse - c037 Mouse - c038 Mouse - c03d M-BT69a Pilot Optical Mouse - c03e Premium Optical Wheel Mouse - c03f UltraX Optical Mouse - c040 Corded Tilt-Wheel Mouse - c043 MX320 Laser Mouse - c044 LX3 Optical Mouse - c045 Optical Mouse - c046 RX1000 Laser Mouse - c047 Laser Mouse - c049 G5 Laser Mouse - c050 RX 250 Optical Mouse - c051 G3 (MX518) Optical Mouse - c053 Laser Mouse - c101 UltraX Media Remote - c201 WingMan Extreme Joystick with Throttle - c202 WingMan Formula - c207 WingMan Extreme Digital 3D - c208 WingMan Gamepad Extreme - c209 WingMan Gamepad - c20a WingMan RumblePad - c20b WingMan Action Pad - c20c WingMan Precision - c20d WingMan Attack 2 - c20e WingMan Formula GP - c211 iTouch Cordless Reciever - c212 WingMan Extreme Digital 3D - c213 J-UH16 (Freedom 2.4 Cordless Joystick) - c214 ATK3 (Attack III Joystick) - c215 Extreme 3D Pro - c216 Dual Action Gamepad - c218 Logitech RumblePad 2 USB - c219 Cordless RumblePad 2 - c21a Precision Gamepad - c221 G15 Keyboard / Keyboard - c222 G15 Keyboard / LCD - c223 G15 Keyboard / USB Hub - c281 WingMan Force - c283 WingMan Force 3D - c285 WingMan Strike Force 3D - c286 Force 3D Pro - c291 WingMan Formula Force - c293 WingMan Formula Force GP - c294 Driving Force - c295 Momo Force Steering Wheel - c298 Driving Force Pro - c2a0 Wingman Force Feedback Mouse - c2a1 WingMan Force Feedback Mouse - c301 iTouch Keyboard - c302 iTouch Pro Keyboard - c303 iTouch Keyboard - c305 Internet Keyboard - c307 Internet Keyboard - c308 Internet Navigator Keyboard - c309 Internet Keyboard - c30a iTouch Composite - c30c Internet Keys (X) - c30d Internet Keys - c30e UltraX Keys (X) - c30f Logicool HID-Compliant Keyboard (106 key) - c315 Classic New Touch Keyboard - c316 HID-Compliant Keyboard - c401 TrackMan Marble Wheel - c402 Marble Mouse (2-button) - c403 Turbo TrackMan Marble FX - c404 TrackMan Wheel - c408 Marble Mouse (4-button) - c501 Cordless Mouse Receiver - c502 Cordless Mouse & iTouch Keys - c503 Cordless Mouse+Keyboard Receiver - c504 Cordless Mouse+Keyboard Receiver - c505 Cordless Mouse+Keyboard Receiver - c506 MX-700 Cordless Mouse Receiver - c508 Cordless Trackball - c509 Cordless Keyboard - c50a Cordless Mouse - c50b Cordless Desktop Optical - c50d Cordless Mouse - c50e MX-1000 Cordless Mouse Receiver - c510 Cordless Mouse - c512 LX-700 Cordless Desktop Receiver - c513 MX3000 Cordless Desktop Receiver - c514 Cordless Mouse - c517 LX710 Cordless Desktop Laser - c518 MX610 Laser Cordless Mouse - c51a MX Revolution/G7 Cordless Mouse - c521 MX620 Laser Cordless Mouse - c625 3Dconnexion Space Pilot 3D Mouse - c626 3DConnexion Space Navigator 3D Mouse - c627 3DConnexion Space Explorer 3D Mouse - c702 Cordless Presenter - c703 Elite Keyboard Y-RP20 + Mouse MX900 (Bluetooth) - c707 Bluetooth wireless hub - c708 Bluetooth wireless hub - c709 BT Mini-Receiver (HCI mode) - c70a MX5000 Cordless Desktop - c70b BT Mini-Receiver (HID proxy mode) - c70c BT Mini-Receiver (HID proxy mode) - c70d Bluetooth wireless hub - c70e MX1000 Bluetooth Laser Mouse - c70f Bluetooth wireless hub - c712 Bluetooth wireless hub - c715 Bluetooth wireless hub - c71a Bluetooth wireless hub - c71d Bluetooth wireless hub - c720 Bluetooth wireless hub - ca03 MOMO Racing - ca04 Formula Vibration Feedback Wheel - d001 QuickCam Pro -046e Behavior Tech. Computer Corp. - 0100 Keyboard - 3001 Mass Storage Device - 3002 Mass Storage Device - 3003 Mass Storage Device - 3005 Mass Storage Device - 3008 Mass Storage Device - 5250 KeyMaestro Multimedia Keyboard - 5273 KeyMaestro Multimedia Keyboard - 5308 KeyMaestro Keyboard - 5408 KeyMaestro Multimedia Keyboard/Hub - 5720 Smart Card Reader - 6782 BTC 7932 mouse+keyboard -046f Crystal Semiconductor -0471 Philips - 0101 DSS350 Digital Speaker System - 0104 DSS330 Digital Speaker System [uda1321] - 0105 UDA1321 - 0160 MP3 Player - 0161 MP3 Player - 0201 Hub - 0222 Creative Nomad Jukebox - 0302 PCA645VC WebCam [pwc] - 0303 PCA646VC WebCam [pwc] - 0304 Askey VC010 WebCam [pwc] - 0307 PCVC675K WebCam [pwc] - 0308 PCVC680K WebCam [pwc] - 030b PC VGA Camera (Vesta Fun) - 030c PCVC690K WebCam [pwc] - 0310 PCVC730K WebCam [pwc] - 0311 PCVC740K ToUcam Pro [pwc] - 0312 PCVC750K WebCam [pwc] - 0314 DMVC 1000K - 0316 DMVC 2000K Video Capture - 0321 FunCam - 0325 SPC 200NC PC Camera - 0326 SPC 300NC PC Camera - 0327 WebCam SPC 6000 NC (WebCam w/ mic) - 0329 ORITE CCD Webcam(PC370R) - 0401 Semiconductors CICT Keyboard - 0402 PS/2 Mouse on Semiconductors CICT Keyboard - 0406 15 inch Detachable Monitor - 0407 10 inch Mobile Monitor - 0471 Digital Speaker System - 0601 OVU1020 IR Dongle (Kbd+Mouse) - 0602 ATI Remote Wonder II Input Device - 0603 ATI Remote Wonder II Controller - 0608 eHome Infrared Receiver - 060a TSU9600 Remote Control - 060e RF Dongle - 0619 TSU9400 Remote Control - 0700 Semiconductors CICT Hub - 0701 150P1 TFT Display - 0809 AVNET Bluetooth Device - 0811 JR24 CDRW - 0815 eHome Infrared Receiver - 1120 Creative Rhomba MP3 player - 1125 Nike psa[128max Player - 1137 HDD065 MP3 player - 1201 Arima Bluetooth Device - 1230 Wireless Adapter 11g - 1232 SNU6500 Wireless Adapter - 1233 Wireless Adapter Bootloader Download - 1236 SNU5600 - 1237 TalkTalk SNU5630NS/05 Wireless Adapter - 1552 ISP 1581 Hi-Speed USB MPEG2 Encoder Reference Kit - 1801 Diva MP3 player - 200a Wireless Network Adapter - 200f 802.11n Wireless Adapter - 485d Senselock SenseIV v2.x -0472 Chicony Electronics Co., Ltd - 0065 PFU-65 Keyboard -0473 Sanyo Information Business Co., Ltd -0474 Sanyo Electric Co., Ltd - 0110 Digital Voice Recorder R200 - 0217 Xacti J2 - 022f C5 Digital Media Camera (mass storage mode) - 0230 C5 Digital Media Camera (PictBridge mode) - 0231 C5 Digital Media Camera (PC control mode) - 0401 Optical Drive - 0701 SCP-4900 Cellphone - 071f Usb Com Port Enumerator -0475 Relisys/Teco Information System - 0100 NEC Petiscan - 0103 Eclipse 1200U/Episode - 0210 Scorpio Ultra 3 -0476 AESP -0477 Seagate Technology, Inc. -0478 Connectix Corp. - 0001 QuickCam - 0002 QuickClip - 0003 QuickCam Pro -0479 Advanced Peripheral Laboratories -047a Semtech Corp. - 0004 ScreenCoder UR7HCTS2-USB -047b Silitek Corp. - 0001 Keyboard - 0002 Keyboard and Mouse - 00f9 SK-1789u Keyboard - 0101 BlueTooth Keyboard and Mouse - 020b SK-3105 SmartCard Reader - 050e Internet Compact Keyboard - 1000 Trust Office Scan USB 19200 - 1002 HP ScanJet 4300c Parallel Port -047c Dell Computer Corp. -047d Kensington - 1001 Mouse*in*a*Box - 1002 Expert Mouse Pro - 1003 Orbit TrackBall - 1004 MouseWorks - 1005 TurboBall - 1006 TurboRing - 1009 Orbit TrackBall for Mac - 1012 PocketMouse - 1013 Mouse*in*a*Box Optical Pro - 1014 Expert Mouse Pro Wireless - 1015 Expert Mouse - 1016 ADB/USB Orbit - 1018 Studio Mouse - 101d Mouse*in*a*Box Optical Pro - 101e Studio Mouse Wireless - 101f PocketMouse Pro - 1020 Expert Mouse Trackball - 1021 Expert Mouse Wireless - 1022 Orbit Optical - 1023 Pocket Mouse Pro Wireless - 1024 PocketMouse - 1025 Mouse*in*a*Box Optical Elite Wireless - 1026 Pocket Mouse Pro - 1027 StudioMouse - 1028 StudioMouse Wireless - 1029 Mouse*in*a*Box Optical Elite - 102a Mouse*in*a*Box Optical - 102b PocketMouse - 102c Iridio - 102d Pilot Optical - 102e Pilot Optical Pro - 102f Pilot Optical Pro Wireless - 104a PilotMouse Mini Retractable - 105d PocketMouse Bluetooth - 105e Bluetooth EDR Dongle - 1061 PocketMouse Grip - 1062 PocketMouse Max - 1063 PocketMouse Max Wireless - 1064 PocketMouse 2.0 Wireless - 1065 PocketMouse 2.0 - 1066 PocketMouse Max Glow - 1067 ValueMouse - 1068 ValueOpt White - 1069 ValueOpt Black - 106a PilotMouse Laser Wireless Mini - 106b PilotMouse Laser - 3 Button - 106c PilotMouse Laser - Gaming - 106d PilotMouse Laser - Wired - 106e PilotMouse Micro Laser - 1070 ValueOpt Travel - 1071 ValueOpt RF TX - 1072 PocketMouse Colour - 1073 PilotMouse Laser - 6 Button - 1074 PilotMouse Laser Wireless Mini - 1075 SlimBlade Presenter Media Mouse - 1076 SlimBlade Media Mouse - 1077 SlimBlade Presenter Mouse - 1152 Bluetooth EDR Dongle - 2002 Optical Elite Wireless - 2010 Wireless Presentation Remote - 2021 PilotBoard Wireless - 2030 PilotBoard Wireless - 2034 SlimBlade Media Notebook Set - 4003 Gravis Xterminator Digital Gamepad - 4005 Gravis Eliminator GamePad Pro - 4006 Gravis Eliminator AfterShock - 4007 Gravis Xterminator Force - 4008 Gravis Destroyer TiltPad - 5001 Cabo I Camera - 5002 VideoCam CABO II - 5003 VideoCam -047e Agere Systems, Inc. (Lucent) - 0300 ORiNOCO Card - 1001 USS720 Parallel Port - 2892 Systems Soft Modem - bad1 Lucent 56k Modem - f101 Atlas Modem -047f Plantronics, Inc. - 0101 Bulk Driver - 0301 Bulk Driver - 0ca1 USB DSP v4 Audio Interface -0480 Toshiba America Info. Systems, Inc. - 0001 InTouch Module - 0004 InTouch Module - 0011 InTouch Module - 0014 InTouch Module -0481 Zenith Data Systems -0482 Kyocera Corp. - 000e FS-1020D Printer - 0100 Finecam S3x - 0101 Finecam S4 - 0103 Finecam S5 - 0105 Finecam L3 - 0106 Finecam - 0107 Digital Camera Device - 0108 Digital Camera Device - 0203 AH-K3001V - 0204 iBurst Terminal -0483 SGS Thomson Microelectronics - 0137 BeWAN ADSL USB ST (blue or green) - 1307 Cytronix 6in1 card reader - 163d Cool Icam Digi-MP3 - 2015 TouchChip® Fingerprint Reader - 2016 Fingerprint Reader - 2017 Biometric Smart Card Reader - 2018 BioSimKey - 2302 Portable Flash Device (PFD) - 4810 ISDN adapter - 481d BT Digital Access adapter - 5000 ST Micro Bluetooth Device - 5001 ST Micro Bluetooth Device - 7270 ST Micro Serial Bridge - 7554 56k SoftModem - ff10 Swann ST56 Modem -0484 Specialix -0485 Nokia Monitors -0486 ASUS Computers, Inc. -0487 Stewart Connector -0488 Cirque Corp. -0489 Foxconn / Hon Hai - 0502 SmartMedia Card Reader Firmware Loader - 0503 SmartMedia Card Reader -048a S-MOS Systems, Inc. -048c Alps Electric Ireland, Ltd -048d Integrated Technology Express, Inc. -048f Eicon Tech. -0490 United Microelectronics Corp. -0491 Capetronic - 0003 Taxan Monitor Control -0492 Samsung SemiConductor, Inc. -0493 MAG Technology Co., Ltd -0495 ESS Technology, Inc. -0496 Micron Electronics -0497 Smile International -0498 Capetronic (Kaohsiung) Corp. -0499 Yamaha Corp. - 1000 UX256 MIDI I/F - 1001 MU1000 - 1002 MU2000 - 1003 MU500 - 1004 UW500 - 1005 MOTIF6 - 1006 MOTIF7 - 1007 MOTIF8 - 1008 UX96 MIDI I/F - 1009 UX16 MIDI I/F - 100a EOS BX - 100c UC-MX - 100d UC-KX - 100e S08 - 100f CLP-150 - 1010 CLP-170 - 1011 P-250 - 1012 TYROS - 1013 PF-500 - 1014 S90 - 1015 MOTIF-R - 1016 MDP-5 - 1017 CVP-204 - 1018 CVP-206 - 1019 CVP-208 - 101a CVP-210 - 101b PSR-1100 - 101c PSR-2100 - 101d CLP-175 - 101e PSR-K1 - 101f EZ-J24 - 1020 EZ-250i - 1021 MOTIF ES 6 - 1022 MOTIF ES 7 - 1023 MOTIF ES 8 - 1024 CVP-301 - 1025 CVP-303 - 1026 CVP-305 - 1027 CVP-307 - 1028 CVP-309 - 1029 CVP-309GP - 102a PSR-1500 - 102b PSR-3000 - 102e ELS-01/01C - 1030 PSR-295/293 - 1031 DGX-205/203 - 1032 DGX-305 - 1033 DGX-505 - 2000 DGP-7 - 2001 DGP-5 - 3001 YST-MS55D USB Speaker - 4000 NetVolante RTA54i Broadband&ISDN Router - 4001 NetVolante RTW65b Broadband Wireless Router - 4002 NetVolante RTW65i Broadband&ISDN Wireless Router - 4004 NetVolante RTA55i Broadband VoIP Router - 5000 CS1D - 5001 DSP1D - 5002 DME32 - 5003 DM2000 - 5004 02R96 - 5005 ACU16-C - 5006 NHB32-C - 5007 DM1000 - 5008 01V96 - 5009 SPX2000 - 500a PM5D - 500b DME64N - 500c DME24N - 6001 CRW2200UX Lightspeed 2 External CD-RW Drive - 7000 DTX - 7010 UB99 -049a Gandalf Technologies, Ltd -049b Curtis Computer Products -049c Acer Advanced Labs, Inc. - 0002 Keyboard (???) -049d VLSI Technology -049f Compaq Computer Corp. - 0002 InkJet Color Printer - 0003 iPAQ PocketPC - 000e Internet Keyboard - 0012 InkJet Color Printer - 0018 PA-1/PA-2 MP3 Player - 0019 InkJet Color Printer - 001a S4 100 Scanner - 001e IJ650 Inkjet Printer - 001f WL215 Adapter - 0021 S200 Scanner - 0027 Bluetooth Multiport Module by Compaq - 002a 1400P Inkjet Printer - 002b A3000 - 002c Lexmark X125 - 0032 802.11b Adapter [ipaq h5400] - 0033 802.11b Adapter [orinoco] - 0036 Bluetooth Multiport Module - 0051 KU-0133 Easy Access Interner Keyboard - 0076 Wireless LAN MultiPort W200 - 0080 GPRS Multiport - 0086 Bluetooth Device - 504a Personal Jukebox PJB100 - 505a Linux-USB "CDC Subset" Device, or Itsy (experimental) - 8511 iPAQ Networking 10/100 Ethernet [pegasus2] -04a0 Digital Equipment Corp. -04a1 SystemSoft Corp. - fff0 Telex Composite Device -04a2 FirePower Systems -04a3 Trident Microsystems, Inc. -04a4 Hitachi, Ltd - 0004 DVD-CAM DZ-MV100A Camcorder - 001e DVDCAM USB HS Interface -04a5 Acer Peripherals Inc. (now BenQ Corp.) - 0001 Keyboard - 0002 API Ergo K/B - 0003 API Generic K/B Mouse - 12a6 AcerScan C310U - 1a20 Prisa 310U - 1a2a Prisa 620U - 2022 Prisa 320U/340U - 2040 Prisa 620UT - 205e ScanPrisa 640BU - 2060 Prisa 620U+/640U - 207e Prisa 640BU - 209e ScanPrisa 640BT - 20ae S2W 3000U - 20b0 S2W 3300U/4300U - 20be Prisa 640BT - 20c0 Prisa 1240UT - 20de S2W 4300U+ - 20f8 Benq 5000 - 20fc Benq 5000 - 20fe SW2 5300U - 2137 Benq 5150/5250 - 2202 Benq 7400UT - 3003 Benq WebCam - 3008 Benq 1500 - 300a Benq 3410 - 300c Benq 1016 - 3019 Benq DC C40 - 4000 P30 Composite Device - 6001 Mass Storage Device - 6002 Mass Storage Device - 6003 ATA/ATAPI Adapter - 6004 Mass Storage Device - 6005 Mass Storage Device - 6006 Mass Storage Device - 6007 Mass Storage Device - 6008 Mass Storage Device - 6009 Mass Storage Device - 600a Mass Storage Device - 600b Mass Storage Device - 600c Mass Storage Device - 600d Mass Storage Device - 600e Mass Storage Device - 600f Mass Storage Device - 6010 Mass Storage Device - 6011 Mass Storage Device - 6012 Mass Storage Device - 6013 Mass Storage Device - 6014 Mass Storage Device - 6015 Mass Storage Device - 6125 MP3 Player - 6180 MP3 Player - 6200 MP3 Player - 7500 Hi-Speed Mass Storage Device - 9000 AWL300 Wireless Adapter - 9001 AWL400 Wireless Adapter - 9213 Kbd Hub -04a6 Nokia Display Products - 00b9 Audio - 0180 Hub Type P - 0181 HID Monitor Controls -04a7 Visioneer - 0100 StrobePro - 0101 Strobe Pro Scanner (1.01) - 0102 StrobePro Scanner - 0211 OneTouch 7600 Scanner - 0221 OneTouch 5300 Scanner - 0223 OneTouch 8200 - 0224 OneTouch 4800 USB/Microtek Scanport 3000 - 0225 VistaScan Astra 3600(ENG) - 0226 OneTouch 5300 USB - 0229 OneTouch 7100 - 022a OneTouch 6600 - 022c OneTouch 9000/9020 - 0231 6100 Scanner - 0311 6200 EPP/USB Scanner - 0321 OneTouch 8100 EPP/USB Scanner - 0331 OneTouch 8600 EPP/USB Scanner - 0341 6400 - 0361 VistaScan Astra 3600(ENG) - 0362 OneTouch 9320 - 0371 OneTouch 8700/8920 - 0380 OneTouch 7700 - 0382 Photo Port 7700 - 0390 9650 - 03a0 Xerox 4800 One Touch - 0410 OneTouch Pro 8800/8820 - 0421 9450 USB - 0423 9750 Scanner - 0424 Strobe XP 450 - 0425 Strobe XP 100 - 0426 Strobe XP 200 - 0427 Strobe XP 100 - 0444 OneTouch 7300 - 0445 CardReader 100 - 0446 Xerox DocuMate 510 - 0447 XEROX DocuMate 520 - 0448 XEROX DocuMate 250 - 0449 Xerox DocuMate 252 - 044a Xerox 6400 - 044c Xerox DocuMate 262 - 0474 Strobe XP 300 - 0475 Xerox DocuMate 272 - 0478 Strobe XP 220 - 0479 Strobe XP 470 - 047a 9450 - 047b 9650 - 047d 9420 - 0480 9520 - 048f Strobe XP 470 - 0491 Strobe XP 450 - 0493 9750 - 0494 Strobe XP 120 - 0497 Patriot 430 - 0498 Patriot 680 - 0499 Patriot 780 - 049b Strobe XP 100 - 04a0 7400 -04a8 Multivideo Labs, Inc. - 0101 Hub - 0303 Peripheral Switch - 0404 Peripheral Switch -04a9 Canon, Inc. - 1005 BJ Printer Hub - 1035 PD Printer Storage - 1050 BJC-8200 - 1051 BJC-3000 Color Printer - 1052 BJC-6100 - 1053 BJC-6200 - 1054 BJC-6500 - 1055 BJC-85 - 1056 BJC-2110 Color Printer - 1057 LR1 - 105a BJC-55 - 105b S600 Printer - 105c S400 - 105d S450 Printer - 105e S800 - 1062 S500 Printer - 1063 S4500 - 1064 S300 Printer - 1065 S100 - 1066 S630 - 1067 S900 - 1068 S9000 - 1069 S820 - 106a S200 Printer - 106b S520 Printer - 106d S750 Printer - 106e S820D - 1070 S530D - 1072 I850 Printer - 1073 I550 Printer - 1074 S330 Printer - 1076 i70 - 1077 i950 - 107a S830D - 107b i320 - 107c i470D - 107d i9100 - 107e i450 - 107f i860 - 1082 i350 - 1084 i250 - 1085 i255 - 1086 i560 - 1088 i965 - 108a i455 - 108b i900D - 108c i475D - 108d PIXMA iP2000 - 108f i80 - 1090 i9900 Photo Printer - 1091 PIXMA iP1500 - 1093 PIXMA iP4000 - 1094 PIXMA iP3000x Printer - 1095 PIXMA iP6000D - 1097 PIXMA iP5000 - 1098 PIXMA iP1000 - 1099 PIXMA iP8500 - 109c PIXMA iP4000R - 109d iP90 - 10a0 PIXMA iP1600 Printer - 10a2 iP4200 - 10a4 iP5200R - 10a5 iP5200 - 10a7 iP6210D - 10a8 iP6220D - 10a9 iP6600D - 10b6 PIXMA iP4300 Printer - 1404 W6400PG - 1405 W8400PG - 150f BIJ2350 PCL - 1510 BIJ1350 PCL - 1512 BIJ1350D PCL - 1601 DR-2080C Scanner - 1607 DR-6080 Scanner - 1700 PIXMA MP110 Scanner - 1701 PIXMA MP130 Scanner - 1702 MP410 Composite - 1703 MP430 Composite - 1704 MP330 Composite - 1706 PIXMA MP750 Scanner - 1707 PIXMA MP780 Scanner - 1708 PIXMA MP760 Scanner - 1709 PIXMA MP150 Scanner - 170a PIXMA MP170 Scanner - 170b PIXMA MP450 Scanner - 170c PIXMA MP500 Scanner - 170d PIXMA MP800 Scanner - 170e MP800R - 1710 MP950 - 1712 MP530 - 1713 PIXMA MP830 Scanner - 1714 MP160 - 1715 MP180 Storage - 1716 MP460 Composite - 1717 MP510 - 1718 MP600 Storage - 171a MP810 Storage - 171b MP960 - 1721 MP210 ser - 1723 MP470 ser - 1725 MP610 ser - 1726 MP970 ser - 1727 MX300 ser - 1728 MX310 ser - 1729 MX700 ser - 172b MP140 ser - 2200 CanoScan LiDE 25 - 2201 CanoScan FB320U - 2202 CanoScan FB620U - 2204 CanoScan FB630U - 2205 CanoScan FB1210U - 2206 CanoScan N650U/N656U - 2207 CanoScan 1220U - 2208 CanoScan D660U - 220a CanoScan D2400UF - 220b CanoScan D646U - 220c CanoScan D1250U2 - 220d CanoScan N670U/N676U/LiDE 20 - 220e CanoScan N1240U/LiDE 30 - 220f CanoScan 8000F - 2210 CanoScan 9900F - 2212 CanoScan 5000F - 2213 CanoScan LiDE 50/LiDE 35/LiDE 40 - 2214 CanoScan LiDE 80 - 2215 CanoScan 3000/3000F/3000ex - 2216 CanoScan 3200F - 2217 CanoScan 5200F - 2219 CanoScan 9950F - 221b CanoScan 4200F - 221c CanoScan LiDE 60 - 221e CanoScan 8400F - 221f CanoScan LiDE 500F - 2220 CanoScan LIDE 25 - 2225 CanoScan LiDE 70 - 2228 CanoScan 4400F - 2602 MultiPASS C555 - 2603 MultiPASS C755 - 260a CAPT Printer - 260e LBP-2000 - 2610 MPC600F - 2611 SmartBase MPC400 - 2612 MultiPASS C855 - 2617 CAPT Printer - 261a iR1600 - 261b iR1610 - 261c iC2300 - 261f MPC200 Printer - 2621 iR2000 - 2622 iR2010 - 2623 FAX-B180C - 2629 FAXPHONE L75 - 262b LaserShot LBP-1120 Printer - 262d iR C3200 - 262f MultiPASS MP730 - 2630 MultiPASS MP700 - 2631 LASER CLASS 700 - 2632 FAX-L2000 - 2635 MPC190 - 2637 iR C6800 - 2638 iR C3100 - 263c Smartbase MP360 - 263d MP370 - 263e MP390 FAX - 263f MP375 - 2646 MF5530 Scanner Device V1.9.1 - 2647 MF5550 Composite - 264e MF5630 - 264f MF5650 (FAX) - 2650 iR 6800C EUR - 2651 iR 3100C EUR - 2655 FP-L170/MF350/L380/L398 - 2659 MF8100 - 265b CAPT Printer - 265c iR C3220 - 265d MF5730 - 265e MF5750 - 265f MF5770 - 2660 MF3110 - 2663 iR3570/iR4570 - 2664 iR2270/iR2870 - 2665 iR C2620 - 2666 iR C5800 - 2667 iR85PLUS - 2669 iR105PLUS - 266a CAPT Device - 266b iR8070 - 266c iR9070 - 266d iR 5800C EUR - 266e CAPT Device - 266f iR2230 - 2670 iR3530 - 2671 iR5570/iR6570 - 2672 iR C3170 - 2673 iR 3170C EUR - 2674 L120 - 2675 iR2830 - 2676 CAPT Device - 2677 iR C2570 - 2678 iR 2570C EUR - 2679 CAPT Device - 267a iR2016 - 267b iR2020 - 267d MF7100 Series - 2684 MF3200 Series - 2687 iR4530 - 2688 LBP3460 - 268c iR C6870 - 268d iR 6870C EUR - 268e iR C5870 - 268f iR 5870C EUR - 2691 iR7105 - 26a3 MF4100 Series - 26b5 MF4200 Series - 3041 PowerShot S10 - 3042 CanoScan FS4000US Film Scanner - 3043 PowerShot S20 - 3044 EOS D30 - 3045 PowerShot S100 - 3046 IXY Digital - 3047 Digital IXUS - 3048 PowerShot G1 - 3049 PowerShot Pro90 IS - 304a CP-10 - 304b IXY Digital 300 - 304c PowerShot S300 - 304d Digital IXUS 300 - 304e PowerShot A20 - 304f PowerShot A10 - 3050 PowerShot unknown 1 - 3051 PowerShot S110 - 3052 Digital IXUS V - 3055 PowerShot G2 - 3056 PowerShot S40 - 3057 PowerShot S30 - 3058 PowerShot A40 - 3059 PowerShot A30 - 305b ZR45MC Digital Camcorder - 305c PowerShot unknown 2 - 3060 EOS D60 - 3061 PowerShot A100 - 3062 PowerShot A200 - 3063 CP-100 - 3065 PowerShot S200 - 3066 Digital IXUS 330 - 3067 MV550i Digital Video Camera - 3069 PowerShot G3 - 306a Digital unknown 3 - 306b MVX2i Digital Video Camera - 306c PowerShot S45 - 306d PowerShot S45 PtP Mode - 306e PowerShot G3 (normal mode) - 306f PowerShot G3 (ptp) - 3070 PowerShot S230 - 3071 PowerShot S230 (ptp) - 3072 PowerShot SD100 / Digital IXUS II (ptp) - 3073 PowerShot A70 (ptp) - 3074 PowerShot A60 (ptp) - 3075 IXUS 400 Camera - 3076 PowerShot A300 - 3077 PowerShot S50 - 3078 ZR70MC Digital Camcorder - 307a MV650i (normal mode) - 307b MV630i Digital Video Camera - 307c MV630i (normal mode) - 307d CP-300 - 307f Optura 20 - 3080 MVX150i (normal mode) / Optura 20 (normal mode) - 3081 Optura 10 - 3082 MVX100i / Optura 10 - 3083 EOS 10D - 3084 EOS 300D / EOS Digital Rebel - 3085 PowerShot G5 - 3087 Elura 50 (PTP mode) - 3088 Elura 50 (normal mode) - 308d MVX3i - 308e FV M1 (normal mode) / MVX 3i (normal mode) / Optura Xi (normal mode) - 3093 Optura 300 - 3096 IXY DV M2 (normal mode) / MVX 10i (normal mode) - 3099 EOS 300D (ptp) - 309a PowerShot A80 - 309b Digital IXUS (ptp) - 309c PowerShot S1 IS - 309d Camera - 309f Camera - 30a0 Camera - 30a1 Camera - 30a2 Camera - 30a8 Elura 60E/Optura 40 (ptp) - 30a9 MVX25i (normal mode) / Optura 40 (normal mode) - 30b1 PowerShot S70 (normal mode) / PowerShot S70 (PTP mode) - 30b2 PowerShot S60 (normal mode) / PowerShot S60 (PTP mode) - 30b3 PowerShot G6 (normal mode) / PowerShot G6 (PTP mode) - 30b4 PowerShot S500 - 30b5 PowerShot A75 - 30b6 Digital IXUS II2 / Digital IXUS II2 (PTP mode) / PowerShot SD110 (PTP mode) / PowerShot SD110 Digital ELPH - 30b7 PowerShot A400 / PowerShot A400 (PTP mode) - 30b8 PowerShot A310 / PowerShot A310 (PTP mode) - 30b9 Powershot A85 - 30ba PowerShot S410 Digital Elph - 30bb PowerShot A95 - 30bd CP-220 - 30be CP-330 - 30bf Digital IXUS 40 - 30c0 Digital IXUS 30 (PTP mode) / PowerShot SD200 (PTP mode) - 30c1 Digital IXUS 50 (normal mode) / IXY Digital 55 (normal mode) / PowerShot A520 (PTP mode) / PowerShot SD400 (normal mode) - 30c2 PowerShot A510 (normal mode) / PowerShot A510 (PTP mode) - 30c4 Digital IXUS i5 (normal mode) / IXY Digital L2 (normal mode) / PowerShot SD20 (normal mode) - 30ea EOS 1D Mark II (PTP mode) - 30eb EOS 20D - 30ec EOS 20D (ptp) - 30ee EOS 350D - 30ef EOS 350D (ptp) - 30f0 PowerShot S2 IS (PTP mode) - 30f2 Digital IXUS 700 (normal mode) / Digital IXUS 700 (PTP mode) / IXY Digital 600 (normal mode) / PowerShot SD500 (normal mode) / PowerShot SD500 (PTP mode) - 30f6 SELPHY CP400 - 30f8 Powershot A430 - 30f9 PowerShot A410 (PTP mode) - 30fc PowerShot A620 (PTP mode) - 30fd PowerShot A610 (normal mode)/PowerShot A610 (PTP mode) - 30ff Digital IXUS 55 (PTP mode)/PowerShot SD450 (PTP mode) - 310b SELPHY CP600 - 310e Digital IXUS 50 (PTP mode) - 3116 Digital IXUS 750 (PTP mode) - 3117 PowerShot A700 - 3138 PowerShot A710 IS - 315a PowerShot G9 - 3176 PowerShot A590 - 31ff Digital IXUS 55 -04aa DaeWoo Telecom, Ltd -04ab Chromatic Research -04ac Micro Audiometrics Corp. -04ad Dooin Electronics - 2501 Bluetooth Device -04af Winnov L.P. -04b0 Nikon Corp. - 0102 Coolpix 990 - 0103 Coolpix 880 - 0104 Coolpix 995 - 0106 Coolpix 775 - 0107 Coolpix 5000 - 0108 Coolpix 2500 - 0109 Coolpix 2500 (ptp) - 010a Coolpix 4500 - 010b Coolpix 4500 (ptp) - 010d Coolpix 5700 (ptp) - 010e Coolpix 4300 (storage) - 010f Coolpix 4300 (ptp) - 0110 Coolpix 3500 (Sierra Mode) - 0111 Coolpix 3500 (ptp) - 0112 Coolpix 885 (ptp) - 0113 Coolpix 5000 (ptp) - 0114 Coolpix 3100 (storage) - 0115 Coolpix 3100 (ptp) - 0117 Coolpix 2100 (ptp) - 0119 Coolpix 5400 (ptp) - 011d Coolpix 3700 (ptp) - 0121 Coolpix 3200 (ptp) - 0122 Coolpix 2200 (ptp) - 0126 Coolpix 8800 - 0129 Coolpix 4800 (ptp) - 012c Coolpix 4100 (storage) - 012d Coolpix 4100 (ptp) - 012e Coolpix 5600 (ptp) - 0130 Coolpix 4600 (ptp) - 0135 Coolpix 5900 (ptp) - 0136 Coolpix 7900 (storage) - 0137 Coolpix 7900 (ptp) - 0141 Coolpix P2 (storage) - 0142 Coolpix P2 (ptp) - 0163 Coolpix P5100 (ptp) - 0169 Coolpix P50 (ptp) - 0202 Coolpix SQ (ptp) - 0203 Coolpix 4200 (mass storage mode) - 0204 Coolpix 4200 (ptp) - 0205 Coolpix 5200 (storage) - 0206 Coolpix 5200 (ptp) - 0301 Coolpix 2000 (storage) - 0302 Coolpix 2000 (ptp) - 0402 DSC D100 (ptp) - 0403 D2H (mass storage mode) - 0404 D2H SLR (ptp) - 0405 D70 (mass storage mode) - 0406 DSC D70 (ptp) - 0408 D2X SLR (ptp) - 0409 D50 digital camera - 040a D50 (ptp) - 040c D2Hs - 040e DSC D70s (ptp) - 0413 D40 (mass storage mode) - 4000 Coolscan LS 40 ED - 4001 LS 50 ED/Coolscan V ED - 4002 Super Coolscan LS-5000 ED -04b1 Pan International -04b3 IBM Corp. - 3003 Rapid Access III Keyboard - 3004 Media Access Pro Keyboard - 300a Rapid Access IIIe Keyboard - 3016 UltraNav Keyboard Hub - 3018 UltraNav Keyboard - 301b SK-8815 Keyboard - 301c Enhanced Performance Keyboard - 3020 Enhanced Performance Keyboard - 3100 NetVista Mouse - 3103 ScrollPoint Pro Mouse - 3104 ScrollPoint Wireless Mouse - 3105 ScrollPoint Optical (HID) - 3107 ThinkPad 800dpi Optical Travel Mouse - 3108 800dpi Optical Mouse w/ Scroll Point - 3109 Optical ScrollPoint Pro Mouse - 310b Red Wheel Mouse - 4427 Portable CD ROM - 4482 Serial Converter - 4525 Double sided CRT - 4550 NVRAM (128 KB) - 4554 Cash Drawer - 4580 Hub w/ NVRAM - 4581 4800-2xx Hub w/ Cash Drawer - 4604 Keyboard w/ Card Reader - 4671 4820 LCD w/ MSR/KB -04b4 Cypress Semiconductor Corp. - 0000 Dacal DC-101 CD Library - 0001 Mouse - 0002 CY7C63x0x Thermometer - 0101 Keyboard/Hub - 0102 Keyboard with APM - 0130 MyIRC Remote Receiver - 0bad MetaGeek Wi-Spy - 1002 CY7C63001 R100 FM Radio - 1006 Human Interface Device - 4381 SCAPS USC-1 Scanner Controller - 4611 Storage Adapter FX2 (CY) - 4616 Flash Disk (TPP) - 5500 HID->COM RS232 Adapter - 6370 ViewMate Desktop Mouse CC2201 - 6560 CY7C65640 USB-2.0 "TetraHub" - 6830 CY7C68300A EZ-USB AT2 USB 2.0 to ATA/ATAPI - 6831 Storage Adapter ISD-300LP (CY) - 7417 Wireless PC Lock - 8613 CY7C68013 EZ-USB FX2 USB 2.0 Development Kit - 8614 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - cc04 Centor USB RACIA-ALVAR USB PORT - cc06 Centor-P RACIA-ALVAR USB PORT - d5d5 CY7C63x0x Zoltrix Z-Boxer GamePad - f000 CY30700 Licorice evaluation board -04b5 ROHM LSI Systems USA, LLC -04b6 Hint Corp. -04b7 Compal Electronics, Inc. -04b8 Seiko Epson Corp. - 0001 Stylus Color 740 / Photo 750 - 0002 ISD Smart Cable for Mac - 0003 ISD Smart Cable - 0004 Printer - 0005 Stylus D88+ - 0006 Printer - 0007 Printer - 0101 Perfection 636 - 0102 GT-2200 - 0103 Perfection 610 - 0104 Perfection 1200 - 0105 StylusScan 2000 - 0106 Stylus Scan 2500 - 0107 Expression 1600U - 0109 Expression 1640 XL - 010a Perfection 1640SU - 010b Perfection 1240 - 010c Perfection 640 - 010e Perfection 1680 - 010f Perfection 1250 - 0110 Perfection 1650 - 0112 Perfection 2450 - 0114 Perfection 660 - 0116 Perfection 3170 (GT-9400) - 0118 Perfection 4180 (GF-F600) - 0119 Perfection 4490 Photo - 011a 1000 ICS - 011b Perfection 2400 Photo - 011c Perfection 3200 - 011d Perfection 1260 Photo - 011e Perfection 1660 Photo - 011f Perfection 1670 - 0120 Perfection 1270 scanner - 0121 Perfection 2480 Photo - 0122 Perfection 3590 scanner - 0126 GT-15000 (ES-7000) - 0128 Perfection 4870 (GT-X700) - 0129 Expression 10000XL (ES-10000G) - 012a Perfection 4990 Photo scanner - 012b GT-2500 (ES-H300) - 012c Perfection V350 (GT-F700) - 012d Perfection V10/V100 (GT-S600/F650) - 012f Perfection V350 (GT-F700) - 0202 Receipt Printer M129C - 0401 CP 800 Digital Camera - 0402 PhotoPC 850z - 0403 PhotoPC 3000z - 0509 JVC PIX-MC10 - 0601 Stylus Photo 875DC Card Reader - 0602 Stylus Photo 895 Card Reader - 0801 Stylus CX5200/CX5400/CX6600 - 0802 Stylus CX3200 - 0803 Printer (Composite Device) - 0804 Storage Device - 0805 Stylus CX6400 - 0806 Stylus Photo RX600/610 - 0807 Stylus Photo RX500/510 - 0808 Stylus CX5200 - 0809 Storage Device - 080a Storage Device - 080c ME100 - 080d Stylus CX4500/4600 - 080e CX-3500/3600/3650 MFP - 080f Stylus Photo RX425 scanner - 0810 Stylus Photo RX700 (PM-A900) - 0811 Stylus Photo RX620 all-in-one - 0812 MFP Composite Device - 0813 Stylus CX6500/6600 - 0814 (PM-A700) - 0815 AcuLaser CX11 (LP-A500) - 0816 Printer (Composite Device) - 0817 (LP-M5500) - 0818 Stylus CX3700/CX3800/DX3800 - 0819 Stylus CX4700/CX4800/DX4800 (PX-A750) - 081a Stylus Photo RX520/RX530 (PM-A750) - 081b MFP Composite Device - 081c Stylus Photo RX640/RX650 (PM-A890) - 081d (PM-A950) - 081e MFP Composite Device - 081f Stylus CX7700/7800 - 0820 CX4200 MP scanner - 0821 MFP Composite Device - 0822 Storage Device - 0823 MFP Composite Device - 0824 Storage Device - 0825 MFP Composite Device - 0826 Storage Device - 0827 Stylus Photo RX560/580/590 (PM-A820) - 0828 (PM-A970) - 0829 (PM-T990) - 082a (PM-A920) - 082b Stylus DX5050 - 082c Storage Device - 082d Storage Device - 082e 0x082e DX-60x0 MFP scanner - 082f Stylus DX4050 - 0830 Stylus CX2800/CX2900/ME200 - 0831 MFP Composite Device - 0832 MFP Composite Device - 0833 (LP-M5600) - 0834 MFP Composite Device - 0835 AcuLaser CX21 - 0836 MFP Composite Device - 0837 MFP Composite Device - 0838 CX7300/CX7400/DX7400 - 0839 CX8300/CX8400/DX8400 - 083a CX9300F/CX9400Fax/DX9400F - 083b MFP Composite Device - 083c MFP Composite Device - 083d MFP Composite Device - 083e MFP Composite Device - 083f Stylus DX4450 -04b9 Rainbow Technologies, Inc. - 0300 SafeNet USB SuperPro/UltraPro - 1000 iKey 1000 Token - 1001 iKey 1200 Token - 1002 iKey Token - 1003 iKey Token - 1004 iKey Token - 1005 iKey Token - 1006 iKey Token - 1200 iKey 2000 Token - 1201 iKey Token - 1202 iKey 2032 Token - 1203 iKey Token - 1204 iKey Token - 1205 iKey Token - 1206 iKey Token - 1300 iKey 3000 Token - 1301 iKey 3000 - 1302 iKey Token - 1303 iKey Token - 1304 iKey Token - 1305 iKey Token - 1306 iKey Token -04ba Toucan Systems, Ltd -04bb I-O Data Device, Inc. - 0101 USB2-IDE/ATAPI Bridge Adapter - 0201 USB2-IDE/ATAPI Bridge Adapter - 0204 DVD Multi-plus unit iU-CD2 - 0206 DVD Multi-plus unit DVR-UEH8 - 0301 Storage Device - 0314 USB-SSMRW SD-card - 0319 USB2-IDE/ATAPI Bridge Adapter - 031a USB2-IDE/ATAPI Bridge Adapter - 031b USB2-IDE/ATAPI Bridge Adapter - 031e USB-SDRW SD-card - 0502 Nogatech Live! (BT) - 0901 USB ETT - 0904 ET/TX Ethernet [pegasus] - 0913 ET/TX-S Ethernet [pegasus2] - 0919 USB WN-B11 - 0922 IOData AirPort WN-B11/USBS 802.11b - 0930 ETG-US2 - 0937 WN-WAG/USL Wireless LAN Adapter - 0938 WN-G54/USL Wireless LAN Adapter - 0a03 Serial USB-RSAQ1 - 0a07 USB2-iCN Adapter - 0a08 USB2-iCN Adapter - 0c01 FM-10 Pro Disk -04bd Toshiba Electronics Taiwan Corp. -04be Telia Research AB -04bf TDK Corp. - 0100 MediaReader CF - 0115 USB-PDC Adapter UPA9664 - 0116 USB-cdmaOne Adapter UCA1464 - 0117 USB-PHS Adapter UHA6400 - 0118 USB-PHS Adapter UPA6400 - 0135 MediaReader Dual - 0202 73S1121F Smart Card Reader- - 0309 Bluetooth USB dongle - 030a IBM Bluetooth Ultraport Module - 030b Bluetooth Device - 030c Ultraport Bluetooth Device - 0310 Integrated Bluetooth - 0311 Integrated Bluetooth Device - 0317 Bluetooth UltraPort Module from IBM - 0318 IBM Integrated Bluetooth - 0319 Bluetooth Adapter - 0320 Bluetooth Adapter - 0321 Bluetooth Device - 0a28 INDI AV-IN Device -04c1 U.S. Robotics (3Com) - 0020 56K Voice Pro - 0022 56K Voice Pro - 007e ISDN TA - 0082 OfficeConnect Analog Modem - 008f Pro ISDN TA - 0097 OfficeConnect Analog - 009d HomeConnect WebCam [vicam] - 00a9 ISDN Pro TA-U - 00b9 HomeConnect IDSL Modem - 3021 56k Voice FaxModem Pro -04c2 Methode Electronics Far East PTE, Ltd -04c3 Maxi Switch, Inc. - 1102 Mouse - 2102 Mouse -04c4 Lockheed Martin Energy Research -04c5 Fujitsu, Ltd - 1029 fi-4010c Scanner - 1033 fi-4110CU - 1041 fi-4120c Scanner - 1042 fi-4220c Scanner - 105b AH-F401U Air H device - 1096 fi-5110EOX - 1097 fi-5110C - 10ae fi-4120C2 - 10af fi-4220C2 - 10e0 fi-5120c Scanner - 10e1 fi-5220C - 10e7 fi-5900C - 10fe S500 -04c6 Toshiba America Electronic Components -04c7 Micro Macro Technologies -04c8 Konica Corp. - 0720 Digital Color Camera - 0721 e-miniD Camera - 0722 e-mini - 0723 KD-200Z Camera - 0726 KD-310Z Camera - 0728 Revio C2 Mass Storage Device - 0729 Revio C2 Digital Camera - 072c Revio KD20M - 072d Revio KD410Z -04ca Lite-On Technology Corp. - 1766 HID Monitor Controls - 9304 Hub -04cb Fuji Photo Film Co., Ltd - 0100 FinePix 30i/40i/50i, A101/201, 1300/2200, 1400/2400/2600/2800/4500/4700/4800/4900/6800/6900 Zoom - 0103 FinePix NX-500/NX-700 printer - 0104 FinePix A101, 2600/2800/4800/6800 Zoom (PC CAM) - 0108 FinePix F601 Zoom (DSC) - 0109 FinePix F601 Zoom (PC CAM) - 010a FinePix S602 (Pro) Zoom (DSC) - 010b FinePix S602 (Pro) Zoom (PC CAM) - 010d FinePix Digital Camera 020531 - 010e FinePix F402 Zoom (DSC) - 010f FinePix F402 Zoom (PC CAM) - 0110 FinePix M603 Zoom (DSC) - 0111 FinePix M603 Zoom (PC CAM) - 0112 FinePix A202, A200 Zoom (DSC) - 0113 FinePix A202, A200 Zoom (PC CAM) - 0114 FinePix F401 Zoom (DSC) - 0115 FinePix F401 Zoom (PC CAM) - 0116 FinePix A203 Zoom (DSC) - 0117 FinePix A203 Zoom (PC CAM) - 0118 FinePix A303 Zoom (DSC) - 0119 FinePix A303 Zoom (PC CAM) - 011a FinePix S304/3800 Zoom (DSC) - 011b FinePix S304/3800 Zoom (PC CAM) - 011c FinePix A204/2650 Zoom (DSC) - 011d FinePix A204/2650 Zoom (PC CAM) - 0120 FinePix F700 Zoom (DSC) - 0121 FinePix F700 Zoom (PC CAM) - 0122 FinePix F410 Zoom (DSC) - 0123 FinePix F410 Zoom (PC CAM) - 0124 FinePix A310 Zoom (DSC) - 0125 FinePix A310 Zoom (PC CAM) - 0126 FinePix A210 Zoom (DSC) - 0127 FinePix A210 Zoom (PC CAM) - 0128 FinePix A205(S) Zoom (DSC) - 0129 FinePix A205(S) Zoom (PC CAM) - 012a FinePix F610 Zoom (DSC) - 012b FinePix Digital Camera 030513 - 012c FinePix S7000 Zoom (DSC) - 012d FinePix S7000 Zoom (PC CAM) - 012f FinePix Digital Camera 030731 - 0130 FinePix S5000 Zoom (DSC) - 0131 FinePix S5000 Zoom (PC CAM) - 013b FinePix Digital Camera 030722 - 013c FinePix S3000 Zoom (DSC) - 013d FinePix S3000 Zoom (PC CAM) - 013e FinePix F420 Zoom (DSC) - 013f FinePix F420 Zoom (PC CAM) - 0142 FinePix S7000 Zoom (PTP) - 0148 FinePix A330 Zoom (DSC) - 0149 FinePix A330 Zoom (UVC) - 014a FinePix A330 Zoom (PTP) - 014b FinePix A340 Zoom (DSC) - 0159 FinePix F710 Zoom (DSC) - 0165 FinePix S3500 Zoom (DSC) - 0168 FinePix E500 Zoom (DSC) - 0169 FinePix E500 Zoom (UVC) - 016b FinePix E510 Zoom (DSC) - 016c FinePix E510 Zoom (PC CAM) - 016e FinePix S5500 Zoom (DSC) - 016f FinePix S5500 Zoom (UVC) - 0171 FinePix E550 Zoom (DSC) - 0172 FinePix E550 Zoom (PTP) - 0177 FinePix F10 (DSC) - 0179 Finepix F10 (PTP) - 0186 FinePix S5200/S5600 Zoom (DSC) - 0188 FinePix S5200/S5600 Zoom (PTP) - 018e FinePix S9500 Zoom (DSC) - 018f FinePix S9500 Zoom (PTP) - 0192 FinePix E900 Zoom (DSC) - 0193 FinePix E900 Zoom (PTP) - 019b FinePix F30 (PTP) - 01bf FinePix F6000fd/S6500fd Zoom (PTP) - 01c0 FinePix F20 (PTP) - 01c1 FinePix F31fd (PTP) - 01c4 FinePix S5700 Zoom (PTP) - 01c5 FinePix F40fd (PTP) - 01c6 FinePix A820 Zoom (PTP) - 01d2 FinePix A800 Zoom (PTP) - 01d5 FinePix F47 (PTP) -04cc Philips Semiconductors - 1122 Hub - 1521 USB 2.0 Hub - 8116 Camera -04cd Tatung Co. Of America -04ce ScanLogic Corp. - 0002 SL11R-IDE IDE Bridge - 0100 USB2PRN Printer Class - 0300 Phantom 336CX - C3 scanner - 04ce SL11DEMO, VID: 0x4ce, PID: 0x4ce - 07d1 SL11R, VID: 0x4ce, PID: 0x07D1 -04cf Myson Century, Inc. - 0800 MTP800 Mass Storage Device - 8810 CS8810 Mass Storage Device - 8811 CS8811 Mass Storage Device - 8813 CS8813 Mass Storage Device - 8818 USB2.0 to ATAPI Bridge Controller -04d0 Digi International -04d1 ITT Canon -04d2 Altec Lansing Technologies - 0070 ADA70 Speakers - 0305 Non-Compliant Audio Device - 0311 ADA-310 Speakers - 2060 Claritel-i750 - vp - ff05 ADA-305 Speakers - ff47 Lansing HID Audio Controls - ff49 Lansing HID Audio Controls -04d3 VidUS, Inc. -04d4 LSI Logic, Inc. -04d5 Forte Technologies, Inc. -04d6 Mentor Graphics -04d7 Oki Semiconductor - 1be4 Bluetooth Device -04d8 Microchip Technology, Inc. - 0002 USB-LCD 2x20 - 8000 In-Circuit Debugger - 8001 ICD2 in-circuit debugger -04d9 Holtek Semiconductor, Inc. - 1203 MC Industries Keyboard -04da Panasonic (Matsushita) - 0901 LS-120 Camera - 0b01 CD-R/RW Drive - 0b03 SuperDisk 240MB - 0d01 CD-R Drive KXL-840AN - 0d09 CD-R Drive KXL-RW32AN - 0d0a CD-R Drive KXL-CB20AN - 0d0d CDRCB03 - 0d0e DVD-ROM & CD-R/RW - 0f40 Printer - 1500 MFSUSB Driver - 1b00 MultiMediaCard - 2121 EB-VS6 - 2317 DVC USB-SERIAL Driver for WinXP - 2319 NV-GS15 (webcam mode) - 231d DVC Web Camera Device - 231e DVC DV Stream Device - 2372 Lumix DMC-FZ10 Camera - 2374 DMC-FZ20 -04db Hypertec Pty, Ltd -04dc Huan Hsin Holdings, Ltd -04dd Sharp Corp. - 13a6 MFC2000 - 6006 AL-1216 - 6007 AL-1045 - 6008 AL-1255 - 6009 AL-1530CS - 600a AL-1540CS - 600b AL-1456 - 600c AL-1555 - 600d AL-1225 - 600e AL-1551CS - 600f AR-122E - 6010 AR-152E - 6011 AR-157E - 6012 SN-1045 - 6013 SN-1255 - 6014 SN-1456 - 6015 SN-1555 - 6016 AR-153E - 6017 AR-122E N - 6018 AR-153E N - 6019 AR-152E N - 601a AR-157E N - 601b AL-1217 - 601c AL-1226 - 601d AR-123E - 7002 DVC Ver.1.0 - 7004 VE-CG40U Digital Still Camera - 7005 VE-CG30 Digital Still Camera - 7007 VL-Z7S Digital Camcorder - 8004 Zaurus SL-5000D/SL-5500 PDA - 8005 Zaurus A-300 - 8006 Zaurus SL-B500/SL-5600 PDA - 8007 Zaurus C-700 PDA - 9014 IM-DR80 Portable NetMD Player - 9031 Zaurus C-750/C-760/C-860/SL-C3000 PDA - 9032 Zaurus SL-6000 - 903a GSM GPRS - 9050 Zaurus C-860 PDA - 9056 Viewcam Z - 9073 AM-900 - 9074 GSM GPRS - 90a9 Sharp Composite - 90d0 USB-to-Serial Comm. Port - 90f2 Sharp 3G GSM USB Control - 9120 WS004SH - 9122 WS007SH - 9123 W-ZERO3 ES Smartphone - 91a3 922SH Internet Machine -04de MindShare, Inc. -04df Interlink Electronics -04e1 Iiyama North America, Inc. - 0201 Monitor Hub -04e2 Exar Corp. -04e3 Zilog, Inc. -04e4 ACC Microelectronics -04e5 Promise Technology -04e6 SCM Microsystems, Inc. - 0001 E-USB ATA Bridge - 0002 eUSCSI SCSI Bridge - 0003 eUSB SmartMedia Card Reader - 0005 eUSB SmartMedia/CompactFlash Card Reader - 0006 eUSB SmartMedia Card Reader - 0007 Hifd - 0009 eUSB ATA/ATAPI Adapter - 000a eUSB CompactFlash Adapter - 000b eUSCSI Bridge - 000c eUSCSI Bridge - 000d Dazzle MS - 0012 Dazzle SD/MMC - 0101 eUSB ATA Bridge - 0311 Dazzle DM-CF - 0312 Dazzle DM-SD/MMC - 0313 Dazzle SM - 0314 Dazzle MS - 0322 e-Film Reader-5 - 0325 eUSB ORCA Quad Reader - 0327 Digital Media Reader - 03fe DMHS2 DFU Adapter - 0406 eUSB SmartDM Reader - 04e6 eUSB DFU Adapter - 04e7 STCII DFU Adapter - 04e8 eUSBDM DFU Adapter - 04e9 DM-E DFU Adapter - 0500 Veridicom 5thSense Fingerprint Sensor and eUSB SmartCard - 0701 DCS200 Loader Device - 0702 DVD Creation Station 200 - 0703 DVC100 Loader Device - 0704 Digital Video Creator 100 - 1001 SCR300 Smart Card Reader - 1010 USBAT-2 CompactFlash Card Reader - 1014 e-Film Reader-3 - 1020 USBAT ATA/ATAPI Adapter - 2007 RSA SecurID ComboReader - 2009 Citibank Smart Card Reader - 200a Reflex v.2 Smart Card Reader - 200d STR391 Reader - 5111 SCR331-DI SmartCard Reader - 5113 SCR333 SmartCard Reader - 5114 SCR331-DI SmartCard Reader - 5115 SCR335 SmartCard Reader - 5116 SCR331-LC1 SmartCard Reader - 5117 SCR3320 - Smart Card Reader - 5118 Expresscard SIM Card Reader - 5119 SCR3340 - ExpressCard54 Smart Card Reader - 511b SmartCard Reader - 511d SCR3311 Smart Card Reader - 5120 SCR331-DI SmartCard Reader - 5121 SDI010 Smart Card Reader - 5151 SCR338 Keyboard Smart Card Reader - 5410 SCR35xx Smart Card Reader - e000 SCRx31 Reader - e001 SCR331 SmartCard Reader - e003 SPR532 PinPad SmartCard Reader -04e7 Elo TouchSystems - 0001 TouchScreen - 0002 Touchmonitor Interface 2600 Rev 2 - 0004 4000U CarrollTouch® Touchmonitor Interface - 0007 2500U IntelliTouch® Touchmonitor Interface - 0008 3000U AccuTouch® Touchmonitor Interface - 0009 4000U CarrollTouch® Touchmonitor Interface - 0020 Touchscreen Interface (2700) - 0021 Touchmonitor Interface - 0030 4500U CarrollTouch® Touchmonitor Interface - 0032 Touchmonitor Interface - 0033 Touchmonitor Interface - 0041 5010 Surface Capacitive Touchmonitor Interface - 0042 Touchmonitor Interface - 0050 2216 AccuTouch® Touchmonitor Interface - 0071 Touchmonitor Interface - 0072 Touchmonitor Interface - 0081 Touchmonitor Interface - 0082 Touchmonitor Interface - 00ff Touchmonitor Interface -04e8 Samsung Electronics Co., Ltd - 0110 Connect3D Flash Drive - 0111 Connect3D Flash Drive - 1003 MP3 Player and Recorder - 1006 SDC-200Z - 3004 ML-4600 - 3005 Docuprint P1210 - 3008 ML-6060 laser printer - 300c ML-1210 Printer - 300e Laser Printer - 3104 ML-3550N - 3226 Laser Printer - 3228 Laser Printer - 322a Laser Printer - 322c Laser Printer - 3230 ML-1440 - 3232 Laser Printer - 3236 ML-1450 - 3238 ML-1430 - 323a ML-1710 Printer - 323b Phaser 3130 - 323c Laser Printer - 323d Phaser 3120 - 323e Laser Printer - 3240 Laser Printer - 3242 Laser Printer - 3248 Color Laser Printer - 324a Laser Printer - 324c ML-1740 Printer - 324d Phaser 3121 - 325f Phaser 3425 Laser Printer - 3260 CLP-510 Color Laser Printer - 3268 ML-1610 Mono Laser Printer - 326c ML-2010P Mono Laser Printer - 3409 SCX-4216F Scanner - 340c SCX-5x15 Series - 340d SCX-6x20 Series - 340e MFP 560 Series - 340f Printing Support - 3412 SCX-4x20 Series - 3413 SCX-4100 Scanner - 3415 Composite Device - 3419 Composite Device - 341a Printing Support - 341b SCX-4200 Series - 341c Composite Device - 341d Composite Device - 341f Composite Device - 3420 Composite Device - 3605 InkJet Color Printer - 3606 InkJet Color Printer - 3609 InkJet Color Printer - 3902 InkJet Color Printer - 3903 Xerox WorkCentre XK50cx - 390f InkJet Color Printer - 3911 SCX-1020 Series - 5000 YP-MF Series - 5001 YP-100 - 5002 YP-30 - 5003 YP-700 - 5004 YP-30 - 5005 YP-300 - 5006 YP-750 - 500d MP3 Player - 5010 MP3 Player - 5011 YP-780 - 5013 YP-60 - 5015 yepp upgrade - 501b MP3 Player - 503b YP-U1 MP3 Player - 5050 YP-U2 MP3 Player - 507d YP-U3 MP3 Player - 508b YP-S5 MP3 Player - 5a00 YP-NEU - 5a01 YP-NDU - 5a03 Yepp MP3 Player - 5a04 YP-800 - 5a08 YP-90 - 5a0f MTP Device - 5b01 Memory Stick Reader/Writer - 5b02 Memory Stick Reader/Writer - 5b03 Memory Stick Reader/Writer - 5b04 Memory Stick Reader/Writer - 5b05 Memory Stick Reader/Writer - 5b11 SEW-2001u Card - 5f00 NEXiO Sync - 5f01 NEXiO Sync - 5f02 NEXiO Sync - 5f03 NEXiO Sync - 5f04 NEXiO Sync - 6601 Z100 Mobile Phone - 6611 MITs Sync - 6613 MITs Sync - 6615 MITs Sync - 6617 MITs Sync - 6619 MITs Sync - 661b MITs Sync - 661e Handheld - 6620 Handheld - 6622 Handheld - 6624 Handheld - 662e MITs Sync - 6630 MITs Sync - 6632 MITs Sync - 663f SGH-E720/SGH-E840 - 6640 Usb Modem Enumerator - 7011 SEW-2003U Card - 7021 Bluetooth Device - 7061 eHome Infrared Receiver - 7081 Human Interface Device - 8001 Handheld - e020 SERI E02 SCOM 6200 UMTS Phone - e021 SERI E02 SCOM 6200 Virtual UARTs - e022 SERI E02 SCOM 6200 Flash Load Disk - ff30 SG_iMON -04e9 PC-Tel, Inc. -04ea Brooktree Corp. -04eb Northstar Systems, Inc. -04ec Tokyo Electron Device, Ltd -04ed Annabooks -04ef Pacific Electronic International, Inc. -04f0 Daewoo Electronics Co., Ltd -04f1 Victor Company of Japan, Ltd - 0001 GC-QX3 Digital Still Camera - 0004 GR-DVL815U Digital Video Camera - 0006 DV Camera Storage - 0008 GZ-MG30AA/MC500E Digital Video Camera - 0009 GR-DX25EK Digital Video Camera - 000a GR-D72 Digital Video Camera - 3008 MP-PRX1 Ethernet -04f2 Chicony Electronics Co., Ltd - 0001 KU-8933 Keyboard - 0002 NT68P81 Keyboard - 0110 KU-2971 Keyboard - 0111 KU-9908 Keyboard - 0112 KU-8933 Keyboard with PS/2 Mouse port - 0116 KU-2971 German Keyboard - 0403 KU-0420 keyboard - a001 E-Video DC-100 Camera - a120 ORITE CCD Webcam(PC370R) - a121 ORITE CCD Webcam(PC370R) - a122 ORITE CCD Webcam(PC370R) - a123 ORITE CCD Webcam(PC370R) - a124 ORITE CCD Webcam(PC370R) - a133 Gateway Webcam - a204 DSC WIA Device (1300) - a208 DSC WIA Device (2320) - a209 Labtec DC-2320 - a20a DSC WIA Device (3310) - a20c DSC WIA Device (3320) - a210 Audio Device - b009 Integrated Camera - b010 Integrated Camera - b012 1.3 MPixel UVC webcam - b018 Video Device - b022 Camera - b025 Camera - b027 Gateway Webcam - b028 VGA UVC WebCam -04f3 Elan Microelectronics Corp. - 0210 AM-400 Hama Optical Mouse -04f4 Harting Elektronik, Inc. -04f5 Fujitsu-ICL Systems, Inc. -04f6 Norand Corp. -04f7 Newnex Technology Corp. -04f8 FuturePlus Systems -04f9 Brother Industries, Ltd - 0002 HL-1050 Laser Printer - 0005 Printer - 0006 HL-1240 Laser Printer - 0007 HL-1250 Laser Printer - 0008 HL-1270 Laser Printer - 0009 Printer - 000a P2500 Series - 000b Printer - 000c Printer - 000d HL-1440 Laser Printer - 000e HL-1450 series - 000f HL-1470N series - 0010 Printer - 0011 Printer - 0012 Printer - 0013 Printer - 0014 Printer - 0015 Printer - 0016 Printer - 0017 Printer - 0018 Printer - 001c Printer - 001e Printer - 0020 HL-5130 series - 0021 HL-5140 series - 0022 HL-5150D series - 0023 HL-5170DN series - 0024 Printer - 0025 Printer - 0027 HL-2030 Laser Printer - 0028 Printer - 0029 Printer - 002a Printer - 002b Printer - 002c Printer - 002d Printer - 0100 MFC8600/9650 Series - 0101 MFC9600/9870 Series - 0102 MFC9750/1200 Series - 0104 MFC-8300J - 0105 MFC-9600J - 0106 MFC-7300C - 0107 MFC-7400C - 0108 MFC-9200C - 0109 MFC-830 - 010a MFC-840 - 010b MFC-860 - 010c MFC-7400J - 010d MFC-9200J - 010e MFC3100C Scanner - 010f MFC 5100C - 0110 MFC4800 Scanner - 0111 MFC 6800 - 0112 DCP1000 Port(FaxModem) - 0113 MFC-8500 - 0114 MFC9700 Port(FaxModem) - 0115 MFC9800 Scanner - 0116 DCP1400 Scanner - 0119 MFC-9660 - 011b MFC-9880 - 011c MFC-9760 - 011d MFC-9070 - 011e MFC-9180 - 011f MFC-9160 - 0120 MFC580 Port(FaxModem) - 0121 MFC-590 - 0122 MFC-5100J - 0129 Imagistics 2500 (MFC-8640D clone) - 012f FAX-4750e - 0132 MFC-5200C RemovableDisk - 0135 MFC-100 Scanner - 0136 MFC-150CL Scanner - 013c MFC-890 Port - 013d MFC-5200J Printer - 013e MFC-4420C RemovableDisk - 013f MFC-4820C RemovableDisk - 0140 DCP-8020 - 0141 DCP-8025D - 0142 MFC-8420 - 0143 MFC-8820D - 0144 DCP-4020C RemovableDisk - 0146 MFC-3220C - 0147 FAX-1820C Printer - 0148 MFC-3320CN Printer - 0149 FAX-1920CN Printer - 014a MFC-3420C - 014b MFC-3820CN - 014d FAX-1815C Printer - 014e MFC-8820J - 0150 MFC-8220 Port(FaxModem) - 0151 MFC-8210J - 0157 MFC-3420J Printer - 0158 MFC-3820JN Port(FaxModem) - 015d MFC Composite Device - 015e DCP-8045D - 015f MFC-8440 - 0160 MFC-8840D - 0161 MFC-210C - 0162 MFC-420CN Remote Setup Port - 0163 MFC-410CN RemovableDisk - 0165 MFC-620CN - 0166 MFC-610CLN RemovableDisk - 0168 MFC-620CLN - 0169 DCP-110C RemovableDisk - 016b DCP-310CN RemovableDisk - 016c FAX-2440C Printer - 016d MFC-5440CN - 016e MFC-5840CN Remote Setup Port - 0170 FAX-1840C Printer - 0171 FAX-1835C Printer - 0172 FAX-1940CN Printer - 0173 MFC-3240C Remote Setup Port - 0174 MFC-3340CN RemovableDisk - 017b Imagistics sx2100 - 0180 MFC-7420 - 0181 MFC-7820N Port(FaxModem) - 0182 Composite Device - 0183 DCP-7020 - 0184 DCP-7025 Printer - 0185 MFC-7220 Printer - 0186 Composite Device - 0187 FAX-2820 Printer - 0188 FAX-2920 Printer - 018a MFC-9420CN - 018c DCP-115C - 018d DCP-116C - 018e DCP-117C - 018f DCP-118C - 0190 DCP-120C - 0191 DCP-315CN - 0192 DCP-340CW - 0193 MFC-215C - 0194 MFC-425CN - 0195 MFC-820CW Remote Setup Port - 0196 MFC-820CN Remote Setup Port - 0197 MFC-640CW - 019a MFC-840CLN Remote Setup Port - 01a2 MFC-8640D - 01a3 Composite Device - 01a4 DCP-8065DN Printer - 01a5 MFC-8460N Port(FaxModem) - 01a6 MFC-8860DN Port(FaxModem) - 01a7 MFC-8870DW Printer - 01a8 DCP-130C - 01a9 DCP-330C - 01aa DCP-540CN - 01ab MFC-240C - 01ae DCP-750CW RemovableDisk - 01af MFC-440CN - 01b0 MFC-660CN - 01b1 MFC-665CW Remote Setup Port - 01b2 MFC-845CW Remote Setup Port - 01b4 MFC-460CN Remote Setup Port - 01b5 MFC-630CD - 01b6 MFC-850CDN - 01b7 MFC-5460CN Remote Setup Port - 01b8 MFC-5860CN - 01ba MFC-3360C - 01bd MFC-8660DN - 01be DCP-750CN RemovableDisk - 01bf MFC-860CDN Remote Setup Port - 01c0 DCP-128C - 01c1 DCP-129C - 01c2 DCP-131C - 01c3 DCP-329C - 01c4 DCP-331C - 01c5 MFC-239C - 01ca MFC-9440CN Remote Setup Port - 01ce DCP-135C - 01cf DCP-150C - 01d0 DCP-350C - 01d1 DCP-560CN - 01d4 MFC-230C - 01d5 MFC-235C - 01d6 MFC-260C - 01df DCP-155C - 01e0 MFC-265C - 01e1 DCP-153C - 01e2 DCP-157C - 01e3 DCP-353C - 01e4 DCP-357C - 1000 Printer - 1002 Printer - 2002 PTUSB Printing - 2004 PT-2300/2310 p-Touch Laber Printer - 2015 QL-500 P-touch label printer - 2100 Card Reader Writer -04fa Dallas Semiconductor - 2490 DS1490F 2-in-1 Fob, 1-Wire adapter - 4201 DS4201 Audio DAC -04fb Biostar Microtech International Corp. -04fc Sunplus Technology Co., Ltd - 0003 CM1092 Optical Scroller Mouse - 0013 ViewMate Desktop Mouse CC2201 - 0015 ViewMate Desktop Mouse CC2201 - 0232 Fingerprint - 0561 Flexcam 100 - 1533 Mass Storage - 504a SPCA504a Digital Camera - 504b Aiptek, 1.3 mega PockerCam - 5330 Digitrex 2110 - 5331 Vivitar Vivicam 10 - 5720 Card Reader Driver - 7333 Finet Technology Palmpix DC-85 - 757a Aiptek, MP315 MP3 Player - ffff PureDigital Ritz Disposable -04fd Soliton Systems, K.K. - 0003 Smart Card Reader II -04fe PFU, Ltd -04ff E-CMOS Corp. -0500 Siam United Hi-Tech - 0001 DART Keyboard Mouse - 0002 DART-2 Keyboard -0501 Fujikura DDK, Ltd -0502 Acer, Inc. - 0001 Handheld - 0736 Handheld - 15b1 PDA n311 - 1631 c10 Series - 1632 c20 Series - 16e1 n10 Handheld Sync - 16e2 n20 Pocket PC Sync - 16e3 n30 Handheld Sync - d001 Divio NW801/DVC-V6+ Digital Camera -0503 Hitachi America, Ltd -0504 Hayes Microcomputer Products -0506 3Com Corp. - 009d HomeConnect Camera - 00a0 3CREB96 Bluetooth Adapter - 00a1 Bluetooth Device - 00a2 Bluetooth Device - 00df 3Com Home Connect lite - 0100 HomeConnect ADSL Modem Driver - 03e8 3C19250 Ethernet [klsi] - 0a01 3CRSHEW696 Wireless Adapter - 0a11 3CRWE254G72 802.11g Adapter - 11f8 HomeConnect 3C460 - 2922 HomeConnect Cable Modem External with - 3021 U.S.Robotics 56000 Voice FaxModem Pro - 4601 3C460B 10/100 Ethernet Adapter - f002 3CP4218 ADSL Modem (pre-init) - f003 3CP4218 ADSL Modem - f100 3CP4218 ADSL Modem (pre-init) -0507 Hosiden Corp. - 0011 Konami ParaParaParadise Controller -0508 Clarion Co., Ltd -0509 Aztech Systems, Ltd - 0801 ADSL Modem - 0802 ADSL Modem (RFC1483) - 0806 DSL Modem - 080f Binatone ADSL500 Modem Network Interface - 0812 Pirelli ADSL Modem Network Interface -050a Cinch Connectors -050b Cable System International -050c InnoMedia, Inc. -050d Belkin Components - 0004 Direct Connect - 0012 F8T012 Bluetooth Adapter - 0013 F8T013 Bluetooth Adapter - 0050 F5D6050 802.11b Wireless Adapter - 0081 F8T001v2 Bluetooth - 0083 Bluetooth Device - 0084 F8T003v2 Bluetooth - 0102 Flip KVM - 0103 F5U103 Serial Adapter [etek] - 0106 VideoBus II Adapter, Video - 0108 F1DE108B KVM - 0109 F5U109/F5U409 PDA Adapter - 0115 SCSI Adapter - 0119 F5U120-PC Dual PS/2 Ports - 0121 F5D5050 100Mbps Ethernet - 0122 Ethernet Adapter - 0131 Bluetooth Device with trace filter - 0201 Peripheral Switch - 0208 USBView II Video Adapter [nt1004] - 0210 F5U228 Hi-Speed USB 2.0 DVD Creator - 0211 F5U211 USB 2.0 15-in-1 Media Reader & Writer - 0224 F5U224 USB 2.0 4-Port Hub - 0234 F5U234 USB 2.0 4-Port Hub - 0237 F5U237 USB 2.0 7-Port Hub - 0240 F5U240 USB 2.0 CF Card Reader - 0257 F5U257 Serial - 0409 F5U409 Serial - 0551 F6C550-AVR UPS - 0802 Nostromo n40 Gamepad - 0803 Nostromo 1745 GamePad - 0805 Nostromo N50 GamePad - 0815 Nostromo n52 HID SpeedPad Mouse Wheel - 0826 ErgoFit Wireless Optical Mouse (HID) - 0980 HID UPS Battery - 1202 F5U120-PC Parallel Printer Port - 1203 F5U120-PC Serial Port - 258a F5U258 Host to Host cable - 3101 F1DF102U/F1DG102U Flip Hub - 3201 F1DF102U/F1DG102U Flip KVM - 4050 ZD1211B - 5055 F5D5055 - 6051 11Mbps Wireless Network Adapter - 7050 F5D7050 ver 1000 WiFi - 7051 F5D7051 54g USB Network Adapter - 705a F5D7050A Wireless Adapter - 705b Wireless G Adapter - 705c F5D7050 v4000 Wireless Adapter - 905b F5D9050 ver 3 Wireless Adapter - 905c Wireless G Plus MIMO Network Adapter -050e Neon Technology, Inc. -050f KC Technology, Inc. - 0001 Hub - 0003 KC82C160S Hub - 0180 KC-180 IrDA Dongle - 0190 KC2190 USB Host-to-Host cable -0510 Sejin Electron, Inc. - 0001 Keyboard - 1000 Keyboard with PS/2 Mouse Port - e001 Mouse -0511 N'Able (DataBook) Technologies, Inc. -0512 Hualon Microelectronics Corp. -0513 digital-X, Inc. -0514 FCI Electronics -0515 ACTC -0516 Longwell Electronics -0517 Butterfly Communications -0518 EzKEY Corp. - 0001 USB to PS2 Adaptor v1.09 - 0002 EZ-9900C Keyboard -0519 Star Micronics Co., Ltd - c002 Xlive Bluetooth XBM-100S MP3 Player -051a WYSE Technology - a005 Smart Display Version 9973 -051b Silicon Graphics -051c Shuttle, Inc. - c001 eHome Infrared Receiver - c002 eHome Infrared Receiver -051d American Power Conversion - 0001 UPS - 0002 Uninterruptible Power Supply - 0003 UPS -051e Scientific Atlanta, Inc. -051f IO Systems (Elite Electronics), Inc. -0520 Taiwan Semiconductor Manufacturing Co. -0521 Airborn Connectors -0522 Advanced Connectek, Inc. -0523 ATEN GmbH -0524 Sola Electronics -0525 Netchip Technology, Inc. - 100d RFMD Bluetooth Device - 1080 NET1080 USB-USB Bridge - a140 USB Clik! 40 - a141 (OME) PocketZip 40 MP3 Player Driver - a220 GVC Bluetooth Wireless Adapter - a4a0 Linux-USB "Gadget Zero" - a4a1 Linux-USB Ethernet Gadget - a4a2 Linux-USB Ethernet/RNDIS Gadget - a4a3 Linux-USB user-mode isochronous source/sink - a4a4 Linux-USB user-mode bulk source/sink - a4a5 Linux-USB File Storage Gadget - a4a6 Linux-USB Serial Gadget - a4a7 Linux-USB Serial Gadget (CDC ACM mode) - a4a8 Linux-USB Printer Gadget -0526 Temic MHS S.A. -0527 ALTRA -0528 ATI Technologies, Inc. - 7561 TV Wonder - 7562 TV Wonder, Edition (FN5) - 7563 TV Wonder, Edition (FI) - 7564 TV Wonder, Edition (FQ) - 7565 TV Wonder, Edition (NTSC+) - 7566 TV Wonder, Edition (FN5) - 7567 TV Wonder, Edition (FI) - 7568 TV Wonder, Edition (FQ) - 7569 Live! Pro (A) - 756a Live! Pro Audio (O) -0529 Aladdin Knowledge Systems - 0001 HASP v0.06 - 030b eToken R1 v3.1.3.x - 0313 eToken R1 v3.2.3.x - 031b eToken R1 v3.3.3.x - 0323 eToken R1 v3.4.3.x - 0412 eToken R2 v2.2.4.x - 041a eToken R2 v2.2.4.x - 0422 eToken R2 v2.4.4.x - 042a eToken R2 v2.5.4.x - 050c eToken Pro v4.1.5.x - 0514 eToken Pro v4.2.5.4 - 0600 eToken Pro 64k (4.2) -052a Crescent Heart Software -052b Tekom Technologies, Inc. - 0102 Ca508A HP1020 Camera v.1.3.1.6 - 0801 Yakumo MegaImage 37 - 1512 Yakumo MegaImage IV - 1513 Aosta CX100 WebCam - 1514 Aosta CX100 WebCam Storage - 1905 Yakumo MegaImage 47 - 1911 Yakumo MegaImage 47 SL - 2202 WDM Still Image Capture - 2203 Sound Vision Stream Driver - 3a06 DigiLife DDV-5120A - d001 P35U Camera Capture -052c Canon Information Systems, Inc. -052d Avid Electronics Corp. -052e Standard Microsystems Corp. -052f Unicore Software, Inc. -0530 American Microsystems, Inc. -0531 Wacom Technology Corp. -0532 Systech Corp. -0533 Alcatel Mobile Phones -0534 Motorola, Inc. -0535 LIH TZU Electric Co., Ltd -0536 Hand Held Products (Welch Allyn, Inc.) - 01a0 PDT -0537 Inventec Corp. -0538 Caldera International, Inc. (SCO) -0539 Shyh Shiun Terminals Co., Ltd -053a Preh Werke GmbH & Co. KG -053b Global Village Communication -053c Institut of Microelectronic & Mechatronic Systems -053d Silicon Architect -053e Mobility Electronics -053f Synopsys, Inc. -0540 UniAccess AB - 0101 Panache Surf ISDN TA -0541 Sirf Technology, Inc. -0543 ViewSonic Corp. - 00fe G773 Monitor Hub - 00ff P815 Monitor Hub - 0bf2 airpanel V150 Wireless Smart Display - 0bf3 airpanel V110 Wireless Smart Display - 0ed9 Color Pocket PC V35 - 0f01 airsync Wi-Fi Wireless Adapter - 1527 Color Pocket PC V36 - 1529 Color Pocket PC V37 - 152b Color Pocket PC V38 - 152e Pocket PC - 1921 Communicator Pocket PC - 1922 Smartphone - 1923 Pocket PC V30 - 1a11 Wireless 802.11g Adapter - 1e60 TA310 - ATSC/NTSC/PAL Driver(PCM4) - 4153 ViewSonic G773 Control (?) -0544 Cristie Electronics, Ltd -0545 Xirlink, Inc. - 7333 Trution Web Camera - 8002 IBM NetCamera - 8009 Veo PC Camera - 800c Veo StingRay - 800d Veo PC Camera - 8080 IBM C-It WebCam - 808a Veo PC Camera - 808b Veo PC Camera - 808d Veo PC Camera - 810a Veo Advanced Connect WebCam - 810b Veo PC Camera - 810c Veo PC Camera - 8135 Veo Mobile/Advanced Web Camera - 813a Veo PC Camera - 813b Veo PC Camera - 813c Veo Mobile/Advanced Web Camera - 8333 Veo Stingray/Connect Web Camera - 888c eVision 123 digital camera - 888d eVision 123 digital camera -0546 Polaroid Corp. - 0daf PDC 2300Z - 1bed PDC 1320 Camera - 3097 PDC 310 - 3187 Digital Cam - dccf Sound Vision Stream Driver -0547 Anchor Chips, Inc. - 0001 ICSI Bluetooth Device - 1002 Python2 WDM Encoder - 2131 AN2131 EZUSB Microcontroller - 2235 AN2235 EZUSB-FX Microcontroller - 2710 EZ-Link Loader (EZLNKLDR.SYS) - 2720 AN2720 USB-USB Bridge - 2727 Xircom PGUNET USB-USB Bridge - 2750 EZ-Link (EZLNKUSB.SYS) - 2810 Cypress USB ATAPI Bridge - 7777 Bluetooth Device - 9999 AN2131 uninitialized (?) -0548 Tyan Computer Corp. - 1005 EZ Cart II GameBoy Flash Programmer -0549 Pixera Corp. -054a Fujitsu Microelectronics, Inc. -054b New Media Corp. -054c Sony Corp. - 0001 HUB - 0002 Standard HUB - 0010 DSC-S30/S70/S75/F505V/F505/FD92/W1 Cybershot/Mavica Digital Camera - 0014 Nogatech USBVision (SY) - 0022 Storage Adapter V2 (TPP) - 0023 CD Writer - 0024 Mavica CD-1000 Camera - 0025 NW-MS7 Walkman MemoryStick Reader - 002b Portable USB Harddrive V2 - 002c USB Floppy Disk Drive - 002d MSAC-US1 MemoryStick Reader - 002e Sony HandyCam MemoryStick Reader - 0030 Storage Adapter V2 (TPP) - 0032 MemoryStick MSC-U01 Reader - 0035 Network Walkman (E) - 0036 Net MD - 0037 MG Memory Stick Reader/Writer - 0038 Clie PEG-S300/D PalmOS PDA - 0039 Network Walkman (MS) - 003c VAIO-MX LCD Control - 0045 Digital Imaging Video - 0046 Network Walkman - 004a Memory Stick Hi-Fi System - 004b Memory Stick Reader/Writer - 004e DSC-xxx (ptp) - 0056 MG Memory Stick Reader/Writer - 0058 Clie PEG-N7x0C PalmOS PDA Mass Storage - 0066 Clie PEG-N7x0C/PEG-T425 PalmOS PDA Serial - 0069 Memorystick MSC-U03 Reader - 006d Clie PEG-T425 PDA Mass Storage - 006f Network Walkman (EV) - 0073 Storage CRX1750U - 0075 Net MD - 0076 Storage Adapter ACR-U20 - 007c Net MD - 007f IC Recorder (MS) - 0080 Net MD - 0081 Net MD - 0084 Net MD - 0085 Net MD - 0086 Net MD - 008b Micro Vault 64M Mass Storage - 0095 Sony Clie s360 - 0099 Clie NR70 PDA Mass Storage - 009a Clie NR70 PDA Serial - 00ab Visual Communication Camera (PCGA-UVC10) - 00af DPP-EX Series Digital Photo Printer - 00bf IC Recorder (S) - 00c0 Handycam DCR-30 - 00c6 Net MD - 00c7 Net MD - 00c8 MZ-N710 Minidisc Walkman - 00c9 Net MD - 00ca MZ-DN430 Minidisc Walkman - 00cb MSAC-US20 Memory Stick Reader - 00da Sony Clie nx60 - 00e8 Network Walkman (MS) - 00e9 Handheld - 00eb Net MD - 0101 Net MD - 0103 IC Recorder (ST) - 0105 Micro Vault Hub - 0107 VCC-U01 Visual Communication Camera - 0110 Digital Imaging Video - 0113 Net MD - 0116 IC Recorder (P) - 0144 Clie PEG-TH55 PDA - 0147 Visual Communication Camera (PCGA-UVC11) - 014c Aiwa AM-NX9 Net MD Music Recorder MDLP - 014d Memory Stick Reader/Writer - 0154 Eyetoy Audio Device - 015f IC Recorder (BM) - 0169 Clie PEG-TJ35 PDA Serial - 016a Clie PEG-TJ35 PDA Mass Storage - 016b Mobile HDD - 016d IC Recorder (SX) - 016e DPP-EX50 Digital Photo Printer - 0171 Fingerprint Sensor 3500 - 017e Net MD - 017f Hi-MD WALKMAN - 0180 Net MD - 0181 Hi-MD WALKMAN - 0182 Net MD - 0183 Hi-MD WALKMAN - 0184 Net MD - 0185 Hi-MD WALKMAN - 0186 Net MD - 0187 Hi-MD WALKMAN - 0188 Net MD - 018a Net MD - 018b Hi-MD SOUND GATE - 019e Micro Vault 1.0G Mass Storage - 01ad ATRAC HDD PA - 01bd MRW62E Multi-Card Reader/Writer - 01c3 NW-E55 Network Walkman - 01c6 MEMORY P-AUDIO - 01c7 Printing Support - 01d0 DVD+RW External Drive DRU-700A - 01d5 IC RECORDER - 01de VRD-VC10 [Video Capture] - 01e9 Net MD - 01ea Hi-MD WALKMAN - 01ee IC RECORDER - 01fa Sony IC Recorder (P) - 01fb NW-E405 Network Walkman - 020f Device - 0210 ATRAC HDD PA - 0219 Net MD - 021a Hi-MD WALKMAN - 021b Net MD - 021c Hi-MD WALKMAN - 021d Net MD - 0227 Printing Support - 022c Net MD - 022d Hi-MD AUDIO - 0233 ATRAC HDD PA - 0236 Mobile HDD - 023b DVD+RW External Drive DRU-800UL - 023c Net MD - 023d Hi-MD WALKMAN - 0243 MicroVault Flash Drive - 0257 IFU-WLM2 USB Wireless LAN Module (Wireless Mode) - 0258 IFU-WLM2 USB Wireless LAN Module (Memory Mode) - 0259 IC RECORDER - 0267 Tachikoma Device - 0268 Batoh Device - 0269 HDD WALKMAN - 026a HDD WALKMAN - 0271 IC Recorder (P) - 027c NETWORK WALKMAN - 027e SONY Communicator - 027f IC RECORDER - 0286 Net MD - 0287 Hi-MD WALKMAN - 029b PRS-500 eBook reader - 02ae PlayStation 3 Memory Card Adaptor - 02af Handycam DCR-DVD306E - 02c4 Device - 02d2 PSP -054d Try Corp. -054e Proside Corp. -054f WYSE Technology Taiwan -0550 Fuji Xerox Co., Ltd - 0002 InkJet Color Printer - 0004 InkJet Color Printer - 0005 InkJet Color Printer -0551 CompuTrend Systems, Inc. -0552 Philips Monitors -0553 STMicroelectronics Imaging Division (VLSI Vision) - 0001 TerraCAM - 0002 CPiA WebCam - 0100 STV0672 Camera - 0140 Video Camera - 0150 CDE CAM 100 - 0151 Digital Blue QX5 Microscope - 0200 Dual-mode Camera0 - 0201 Dual-mode Camera1 - 0202 Aiptek PenCam 1 - 0674 Multi-mode Camera - 0679 NMS Video Camera (Webcam) - 1002 Che-ez! Splash -0554 Dictaphone Corp. -0555 ANAM S&T Co., Ltd -0556 Asahi Kasei Microsystems Co., Ltd - 0001 AK5370 I/F A/D Converter -0557 ATEN International Co., Ltd - 2001 UC-1284 Printer Port - 2002 10Mbps Ethernet [klsi] - 2004 UC-100KM PS/2 Mouse and Keyboard adapter - 2006 UC-1284B Printer Port - 2007 UC-110T 100Mbps Ethernet [pegasus] - 2008 UC-232A Serial Port [pl2303] - 2009 UC-210T Ethernet - 2202 CS124U Miniview II KVM Switch - 2600 IDE Bridge - 4000 DSB-650 10Mbps Ethernet [klsi] - 7000 Hub -0558 Truevision, Inc. -0559 Cadence Design Systems, Inc. -055a Kenwood USA -055b KnowledgeTek, Inc. -055c Proton Electronic Ind. -055d Samsung Electro-Mechanics Co. - 0001 Keyboard - 0bb1 Bluetooth Device - 1030 Optical Wheel Mouse (OMS3CB/OMGB30) - 1031 Optical Wheel Mouse (OMA3CB/OMGI30) - 1040 Mouse HID Device - 1050 E-Mail Optical Wheel Mouse (OMS3CE) - 1080 Optical Wheel Mouse (OMS3CH) - 2020 Floppy Disk Drive - 6780 Keyboard V1 - 6781 Keyboard Mouse - 8001 E.M. Hub - 9000 AnyCam [pwc] - 9001 MPC-C30 AnyCam Premium for Notebooks [pwc] - a010 WLAN Adapter(SWL-2300) - a011 Boot Device - a012 WLAN Adapter(SWL-2300) - a013 WLAN Adapter(SWL-2350) - a230 Boot Device - b000 11Mbps WLAN Mini Adapter - b230 Netopia 802.11b WLAN Adapter - b231 LG Wireless LAN 11b Adapter -055e CTX Opto-Electronics Corp. -055f Mustek Systems, Inc. - 0001 ScanExpress 1200 CU - 0002 ScanExpress 600 CU - 0003 ScanExpress 1200 USB - 0006 ScanExpress 1200 UB - 0007 ScanExpress 1200 USB Plus - 0008 ScanExpress 1200 CU Plus - 0010 BearPaw 1200F - 0210 ScanExpress A3 USB - 0218 BearPaw 2400 TA - 0219 BearPaw 2400 TA Plus - 021a BearPaw 2448 TA Plus - 021c BearPaw 1200 CU Plus - 021d BearPaw 2400 CU Plus - 021e BearPaw 1200 TA/CS - 021f SNAPSCAN e22 - 0400 BearPaw 2400 TA Pro - 0401 P 3600 A3 Pro - 0408 BearPaw 2448 CU Pro - 0873 ScanExpress 600 USB - 1000 BearPaw 4800 TA Pro - a350 gSmart 350 - a800 MDC 800 Camera - b500 MDC 3000 Camera - c005 PC CAM 300A - c200 gSmart 300 - c220 gSmart mini - c360 Mustek DV 4000 - c420 gSmart mini 2 - c440 Mustek DV 3000 - c520 gSmart mini 3 - c530 Mustek Gsmart LCD 2 - c631 MDC-4000 - c650 Mustek MDC5500Z - d001 WCam 300 - d003 PC CAM 300A - d004 PC CAM 300A -0560 Interface Corp. -0561 Oasis Design, Inc. -0562 Telex Communications, Inc. - 0001 Enhanced Microphone - 0002 Telex Microphone -0563 Immersion Corp. -0564 Chinon Industries, Inc. -0565 Peracom Networks, Inc. - 0001 Serial Port [etek] - 0002 Enet Ethernet [klsi] - 0003 @Home Networks Ethernet [klsi] - 0005 Enet2 Ethernet [klsi] - 0041 Peracom Remote NDIS Ethernet Adapter -0566 Monterey International Corp. - 0110 ViewMate Desktop Mouse CC2201 - 1001 ViewMate Desktop Mouse CC2201 - 1002 ViewMate Desktop Mouse CC2201 - 1003 ViewMate Desktop Mouse CC2201 - 1004 ViewMate Desktop Mouse CC2201 - 1005 ViewMate Desktop Mouse CC2201 - 1006 ViewMate Desktop Mouse CC2201 - 1007 ViewMate Desktop Mouse CC2201 - 2800 MIC K/B - 2801 MIC K/B Mouse - 2802 Kbd Hub -0567 Xyratex International, Ltd -0568 Quartz Ingenierie -0569 SegaSoft -056a Wacom Co., Ltd - 0000 PenPartner - 0001 PenPartner 4x5 - 0002 PenPartner 6x8 - 0010 Graphire - 0011 Graphire 2 - 0013 Graphire 3 4x5 - 0020 Intuos 4x5 - 0021 Intuos 6x8 - 0022 Intuos 9x12 - 0023 Intuos 12x12 - 0024 Intuos 12x18 - 0030 PL400 - 0031 PL500 - 0032 PL600 - 0034 PL550 - 0035 PL800 - 0041 Intuos2 4x5 - 0042 Intuos 2 6x8 - 0043 Intuos 2 - 0044 Intuos2 12x12 - 0045 Intuos2 12x18 - 0400 PenPartner 4x5 - 4850 PenPartner 6x8 -056b Decicon, Inc. -056c eTEK Labs - 0006 KwikLink Host-Host Connector - 8007 Kwik232 Serial Port - 8100 KwikLink Host-Host Connector - 8101 KwikLink USB-USB Bridge -056d EIZO Corp. - 0000 Hub - 0001 Monitor - 0002 HID Monitor Controls - 0003 Device Bay Controller -056e Elecom Co., Ltd - 0002 29UO Mouse - 200c LD-USB/TX - 4002 Laneed 100Mbps Ethernet LD-USB/TX [pegasus] - 4005 LD-USBL/TX - 400b LD-USB/TX - 4010 LD-USB20 - 5003 UC-SGT - 5004 UC-SGT - abc1 LD-USB/TX -056f Korea Data Systems Co., Ltd - cd00 CDM-751 CD organizer -0570 Epson America -0571 Interex, Inc. - 0002 echoFX InterView Lite -0572 Conexant Systems (Rockwell), Inc. - 0001 Ezcam II WebCam - 0002 Ezcam II WebCam - 0040 Wondereye CP-115 WebCam - 0041 WebCam Notebook - 0042 WebCam Notebook - 1232 V.90 modem - 1234 Typhoon Redfun Modem V90 56k - 1252 HCF V90 Data Fax Voice Modem - 1253 Zoom V.92 Faxmodem - 1300 SoftK56 Data Fax Voice CARP - 1301 Modem Enumerator - 2000 SoftGate 802.11 Adapter - 2002 SoftGate 802.11 Adapter - 8390 WinFast PalmTop/Novo TV Video - 8392 WinFast PalmTop/Novo TV Video - cafe AccessRunner ADSL Modem - cb00 E-Tech ADSL Modem v2 - cb01 GeekADSL Promax Q31 ADSL Modem - cb06 StarModem Network Interface -0573 Zoran Co. Personal Media Division (Nogatech) - 0003 USBGear USBG-V1 - 0400 D-Link V100 - 0600 Dazzle USBVision (1006) - 1300 leadtek USBVision (1006) - 2000 X10 va10a Wireless Camera - 2001 Dazzle EmMe (2001) - 2101 Zoran Co. PMD (Nogatech) AV-grabber Manhattan - 2d00 Osprey 50 - 2d01 Hauppauge USB-Live Model 600 - 3000 Dazzle MicroCam (NTSC) - 3001 Dazzle MicroCam (PAL) - 4000 Nogatech TV! (NTSC) - 4001 Nogatech TV! (PAL) - 4002 Nogatech TV! (PAL-I-) - 4003 Nogatech TV! (MF-) - 4008 Nogatech TV! (NTSC) (T) - 4009 Nogatech TV! (PAL) (T) - 4010 Nogatech TV! (NTSC) (A) - 4100 USB-TV FM (NTSC) - 4110 PNY USB-TV (NTSC) FM - 4400 Nogatech TV! Pro (NTSC) - 4401 Nogatech TV! Pro (PAL) - 4450 PixelView PlayTv-USB PRO (PAL) FM - 4451 Nogatech TV! Pro (PAL+) - 4452 Nogatech TV! Pro (PAL-I+) - 4500 Nogatech TV! Pro (NTSC) - 4501 Nogatech TV! Pro (PAL) - 4550 ZTV ZT-721 2.4GHz USB A/V Receiver - 4551 Dazzle TV! Pro Audio (P+) - 4d00 Hauppauge WinTV-USB USA - 4d01 Hauppauge WinTV-USB - 4d02 Hauppauge WinTV-USB UK - 4d03 Hauppauge WinTV-USB France - 4d04 Hauppauge WinTV (PAL D/K) - 4d10 Hauppauge WinTV-USB with FM USA radio - 4d11 Hauppauge WinTV-USB (PAL) with FM radio - 4d12 Hauppauge WinTV-USB UK with FM Radio - 4d14 Hauppauge WinTV (PAL D/K FM) - 4d20 Hauppauge WinTV-USB II (PAL) with FM radio - 4d21 Hauppauge WinTV-USB II (PAL) - 4d22 Hauppauge WinTV-USB II (PAL) Model 566 - 4d23 Hauppauge WinTV-USB France 4D23 - 4d24 Hauppauge WinTV Pro (PAL D/K) - 4d25 Hauppauge WinTV-USB Model 40209 rev B234 - 4d26 Hauppauge WinTV-USB Model 40209 rev B243 - 4d27 Hauppauge WinTV-USB Model 40204 Rev B281 - 4d28 Hauppauge WinTV-USB Model 40204 rev B283 - 4d29 Hauppauge WinTV-USB Model 40205 rev B298 - 4d2a Hauppague WinTV-USB Model 602 Rev B285 - 4d2b Hauppague WinTV-USB Model 602 Rev B282 - 4d2c Hauppauge WinTV Pro (PAL/SECAM) - 4d30 Hauppauge WinTV-USB FM Model 40211 Rev B123 - 4d31 Hauppauge WinTV-USB III (PAL) with FM radio Model 568 - 4d32 Hauppauge WinTV-USB III (PAL) FM Model 573 - 4d34 Hauppauge WinTV Pro (PAL D/K FM) - 4d35 Hauppauge WinTV-USB III (PAL) FM Model 597 - 4d36 Hauppauge WinTV Pro (PAL B/G FM) - 4d37 Hauppauge WinTV-USB Model 40219 rev E189 - 4d38 Hauppauge WinTV Pro (NTSC FM) -0574 City University of Hong Kong -0575 Philips Creative Display Solutions -0576 BAFO/Quality Computer Accessories -0577 ELSA -0578 Intrinsix Corp. -0579 GVC Corp. -057a Samsung Electronics America -057b Y-E Data, Inc. - 0000 FlashBuster-U Floppy - 0001 Tri-Media Reader Floppy - 0006 Tri-Media Reader Card Reader - 0010 Memory Stick Reader Writer - 0020 HEXA Media Drive 6-in-1 Card Reader Writer - 0030 Memory Card Viewer (TV) -057c AVM GmbH - 0b00 ISDN-Controller B1 Family - 0c00 ISDN-Controller FRITZ!Card - 1000 ISDN-Controller FRITZ!Card v2.0 - 1900 ISDN-Controller FRITZ!Card v2.1 - 2000 ISDN-Connector FRITZ!X - 2200 BlueFRITZ! - 2300 Teledat X130 DSL - 2800 ISDN-Connector TA - 3200 Teledat X130 DSL - 3500 FRITZ!Card DSL SL - 3701 FRITZ!Box SL - 3702 FRITZ!Box - 3800 BlueFRITZ! Bluetooth Stick - 3a00 FRITZ!Box Fon - 3c00 FRITZ!Box WLAN - 3d00 Fritz!Box - 3e01 FRITZ!Box (Annex A) - 4001 FRITZ!Box Fon (Annex A) - 4101 FRITZ!Box WLAN (Annex A) - 4201 FRITZ!Box Fon WLAN (Annex A) - 4601 Eumex 5520PC (WinXP/2000) - 4602 Eumex 400 (WinXP/2000) - 4701 AVM FRITZ!Box Fon ata - 5401 Eumex 300 IP - 5601 AVM FRITZ!WLAN Stick - 6201 WLAN USB v1.1 - 62ff WLAN USB v1.1 [no firmware] -057d Shark Multimedia, Inc. -057e Nintendo Co., Ltd - 0306 Wii Remote Controller RVL-003 -057f QuickShot, Ltd - 6238 USB StrikePad -0580 Denron, Inc. -0581 Racal Data Group -0582 Roland Corp. - 0000 UA-100 - 0002 UM-4/MPU-64 MIDI Interface - 0003 SoundCanvas SC-8850 - 0004 U-8 - 0005 Edirol UM-2 MIDI Adapter - 0007 SoundCanvas SC-8820 - 0008 PC-300 - 0009 Edirol UM-1SX MIDI Adapter - 000b SK-500 - 000c SC-D70 - 0010 EDIROL UA-5 - 0011 Edirol UA-5 Sound Capture - 0012 XV-5050 - 0013 XV-5050 - 0014 EDIROL UM-880 MIDI I/F (native) - 0015 EDIROL UM-880 MIDI I/F (generic) - 0016 EDIROL SD-90 - 0017 EDIROL SD-90 - 001b MMP-2 - 001c MMP-2 - 001d V-SYNTH - 001e V-SYNTH - 0023 EDIROL UM-550 - 0024 EDIROL UM-550 - 0025 EDIROL UA-20 - 0026 EDIROL UA-20 - 0027 EDIROL SD-20 - 0028 EDIROL SD-20 - 0029 EDIROL SD-80 - 002a EDIROL SD-80 - 002b EDIROL UA-700 - 002c EDIROL UA-700 - 002d XV-2020 Synthesizer - 002e XV-2020 Synthesizer - 002f VariOS - 0030 VariOS - 0033 EDIROL PCR - 0034 EDIROL PCR - 0037 Digital Piano - 0038 Digital Piano - 003b BOSS GS-10 - 003c BOSS GS-10 - 0040 GI-20 - 0041 GI-20 - 0042 RS-70 - 0043 RS-70 - 0044 EDIROL UA-1000 - 0047 EDIROL UR-80 WAVE - 0048 EDIROL UR-80 MIDI - 0049 EDIROL UR-80 WAVE - 004a EDIROL UR-80 MIDI - 004b EDIROL M-100FX - 004c EDIROL PCR-A WAVE - 004d EDIROL PCR-A MIDI - 004e EDIROL PCR-A WAVE - 004f EDIROL PCR-A MIDI - 0050 EDIROL UA-3FX - 0052 EDIROL UM-1SX - 0054 Digital Piano - 0060 EXR Series - 0064 EDIROL PCR-1 WAVE - 0065 EDIROL PCR-1 MIDI - 0066 EDIROL PCR-1 WAVE - 0067 EDIROL PCR-1 MIDI - 006a SP-606 - 006b SP-606 - 006d FANTOM-X - 006e FANTOM-X - 0073 EDIROL UA-25 - 0074 EDIROL UA-25 - 0075 BOSS DR-880 - 0076 BOSS DR-880 - 007a RD - 007b RD - 007d EDIROL UA-101 - 0080 G-70 - 0081 G-70 - 008b EDIROL PC-50 - 008c EDIROL PC-50 - 008d EDIROL UA-101 USB1 - 0092 EDIROL PC-80 WAVE - 0093 EDIROL PC-80 MIDI - 0096 EDIROL UA-1EX - 009a EDIROL UM-3EX - 009d EDIROL UM-1 - 00a2 Digital Piano - 00a3 EDIROL UA-4FX - 00a6 Juno-G - 00ad SH-201 - 00c4 EDIROL M-16DX -0583 Padix Co., Ltd (Rockfire) - 2030 RM-203 USB Nest [mode 1] - 2031 RM-203 USB Nest [mode 2] - 2032 RM-203 USB Nest [mode 3] - 2033 RM-203 USB Nest [mode 4] - 2050 PX-205 PSX Bridge - 3050 QF-305u Gamepad - 688f QF-688uv Windstorm Pro Joystick - 7070 QF-707u Bazooka Joystick -0584 RATOC System, Inc. - 0008 Fujifilm MemoryCard ReaderWriter - b000 REX-USB60 -0585 FlashPoint Technology, Inc. - 0001 Digital Camera - 0002 Digital Camera - 0003 Digital Camera - 0004 Digital Camera - 0005 Digital Camera - 0006 Digital Camera - 0007 Digital Camera - 0008 Digital Camera - 0009 Digital Camera - 000a Digital Camera - 000b Digital Camera - 000c Digital Camera - 000d Digital Camera - 000e Digital Camera - 000f Digital Camera -0586 ZyXEL Communications Corp. - 1000 Omni NET Modem / ISDN TA - 1500 Omni 56K Plus - 2011 Scorpion-980N keyboard - 3304 LAN Modem - 330a ADSL Modem Interface - 330e USB Broadband ADSL Modem Rev 1.10 - 3400 ZyAIR B-220 IEEE 802.11b Adapter - 3401 ZyAIR G-220 - 3402 (ZD1211)IEEE 802.11b+g Adapter - 3407 G-200 v2 - 3409 AG-225H - 340a M-202 - 340f G-220 v2 - 3410 Wi-Fi Wireless LAN Adapter - 3412 Wi-Fi Wireless LAN Adapter - 3413 AG-225H v2 802.11a/g Wi-Fi Finder & Adapter - 3415 G-210H 802.11g Wireless Adapter -0587 America Kotobuki Electronics Industries, Inc. -0588 Sapien Design -0589 Victron -058a Nohau Corp. -058b Infineon Technologies -058c In Focus Systems - 0007 Flash - 0008 LP130 - 000a LP530 - 0010 Projector - 0011 Projector - 0012 Projector - 0013 Projector - 0014 Projector - 0015 Projector - 0016 Projector - 0017 Projector - 0018 Projector - 0019 Projector - 001a Projector - 001b Projector - 001c Projector - 001d Projector - 001e Projector - 001f Projector -058d Micrel Semiconductor -058e Tripath Technology, Inc. -058f Alcor Micro Corp. - 2412 SCard R/W CSR-145 - 2802 Monterey Keyboard - 5492 Hub - 6232 Hi-Speed 16-in-1 Flash Card Reader/Writer - 6360 Multimedia Card Reader - 6361 Multimedia Card Reader - 6362 Hi-Speed 21-in-1 Flash Card Reader/Writer (Internal/External) - 6377 Multimedia Card Reader - 6386 Memory Card - 6387 Transcend JetFlash Flash Drive - 6390 USB 2.0-IDE bridge - 9213 MacAlly Kbd Hub - 9215 AU9814 Hub - 9254 Hub - 9310 Mass Storage (UID4/5A & UID7A) - 9320 Micro Storage Driver for Win98 - 9321 Micro Storage Driver for Win98 - 9330 SD Reader - 9331 Micro Storage Driver for Win98 - 9340 Delkin eFilm Reader-32 - 9350 Delkin eFilm Reader-32 - 9360 8-in-1 Media Card Reader - 9361 Multimedia Card Reader - 9368 Multimedia Card Reader - 9380 Flash drive - 9382 Acer/Sweex Flash drive - 9410 Keyboard - 9472 Keyboard Hub - 9510 ChunghwaTL USB02 Smartcard Reader - 9520 EMV Certified Smart Card Reader - 9720 USB-Serial Adapter -0590 Omron Corp. - 0004 Cable Modem - 000b MR56SVS - 0028 HJ-720IT Pedometer -0591 Questra Consulting -0592 Powerware Corp. - 0002 UPS (X-Slot) -0593 Incite -0594 Princeton Graphic Systems -0595 Zoran Microelectronics, Ltd - 1001 Digitrex DSC-1300/DSC-2100 (mass storage mode) - 4343 Digital Camera EX-20 DSC -0596 MicroTouch Systems, Inc. - 0001 Touchscreen - 0002 Touch Screen Controller -0597 Trisignal Communications -0598 Niigata Canotec Co., Inc. -0599 Brilliance Semiconductor, Inc. -059a Spectrum Signal Processing, Inc. -059b Iomega Corp. - 0001 Zip 100 (Type 1) - 000b Zip 100 (Type 2) - 0021 Win98 Disk Controller - 0030 Zip 250 (Ver 1) - 0031 Zip 100 (Type 3) - 0032 Zip 250 (Ver 2) - 0034 Zip 100 Driver - 0037 Zip 750 MB - 0040 SCSI Bridge - 0042 Rev 70 GB - 0050 Zip CD 650 Writer - 0053 CDRW55292EXT CD-RW External Drive - 0057 Mass Storage Device - 005d Mass Storage Device - 005f Mass Storage Device - 0060 PCMCIA PocketZip Dock - 0061 Varo PocketZip 40 MP3 Player - 006d HipZip MP3 Player - 007c Ultra Max USB/1394 - 00db FotoShow Zip 250 Driver - 0150 Mass Storage Device - 015d Super DVD Writer - 0173 Hi-Speed USB-to-IDE Bridge Controller - 0174 Hi-Speed USB-to-IDE Bridge Controller - 0176 Hi-Speed USB-to-IDE Bridge Controller - 0177 Hi-Speed USB-to-IDE Bridge Controller - 0178 Hi-Speed USB-to-IDE Bridge Controller - 0179 Hi-Speed USB-to-IDE Bridge Controller - 017a HDD - 017b HDD/1394A - 017c HDD/1394B - 0251 Optical - 0252 Optical - 1052 DVD+RW External Drive -059c A-Trend Technology Co., Ltd -059d Advanced Input Devices -059e Intelligent Instrumentation -059f LaCie, Ltd - 0201 StudioDrive USB2 - 0202 StudioDrive USB2 - 0203 StudioDrive USB2 - 0211 PocketDrive - 0212 PocketDrive - 0213 PocketDrive USB2 - 0323 LaCie d2 Drive USB2 - 0641 Mobile Hard Drive - 1010 Desktop Hard Drive - a601 HardDrive - a602 CD R/W -05a0 Vetronix Corp. -05a1 USC Corp. -05a2 Fuji Film Microdevices Co., Ltd -05a3 ARC International -05a4 Ortek Technology, Inc. - 9720 Keyboard Mouse - 9722 Keyboard - 9731 MCK-600W/MCK-800USB Keyboard -05a5 Sampo Technology Corp. -05a6 Cisco Systems, Inc. - 0001 CVA124 Cable Voice Adapter (WDM) - 0002 CVA122 Cable Voice Adapter (WDM) - 0003 CVA124E Cable Voice Adapter (WDM) - 0004 CVA122E Cable Voice Adapter (WDM) -05a7 Bose Corp. -05a8 Spacetec IMC Corp. -05a9 OmniVision Technologies, Inc. - 0511 OV511 WebCam - 0518 OV518 WebCam - 0519 OV519 Microphone - 1550 VEHO Filmscanner - 2800 SuperCAM - 4519 Webcam Classic - 8519 OV519 WebCam - a511 OV511+ WebCam - a518 D-Link DSB-C310 WebCam -05aa Utilux South China, Ltd -05ab In-System Design - 0002 Parallel Port - 0030 Storage Adapter V2 (TPP) - 0031 ATA Bridge - 0060 USB 2.0 ATA Bridge - 0061 Storage Adapter V3 (TPP-I) - 0101 Storage Adapter (TPP) - 0130 Compact Flash and Microdrive Reader (TPP) - 0200 USS725 ATA Bridge - 0201 Storage Adapter (TPP) - 0202 ATA Bridge - 0300 Portable Hard Drive (TPP) - 0301 Portable Hard Drive V2 - 0350 Portable Hard Drive (TPP) - 0351 Portable Hard Drive V2 - 081a ATA Bridge - 0cda ATA Bridge for CD-R/RW - 1001 BAYI Printer Class Support - 5700 Storage Adapter V2 (TPP) - 5701 USB Storage Adapter V2 - 5901 Smart Board (TPP) - 5a01 ATI Storage Adapter (TPP) - 5d01 DataBook Adapter (TPP) -05ac Apple, Inc. - 0201 USB Keyboard [Alps or Logitech, M2452] - 0202 Keyboard [ALPS] - 0205 Extended Keyboard [Mitsumi] - 0206 Extended Keyboard [Mitsumi] - 020b Pro Keyboard [Mitsumi, A1048/US layout] - 020c Extended Keyboard [Mitsumi] - 020d Pro Keyboard [Mitsumi, A1048/JIS layout] - 020e Internal Keyboard/Trackpad - 020f Internal Keyboard/Trackpad - 021b Internal Keyboard/Trackpad - 0220 Aluminum Keyboard - 0221 Keyboard (Aluminium) (ISO) - 0229 Internal Keyboard/Trackpad (MacBook Pro) (ANSI) - 022a Internal Keyboard/Trackpad (MacBook Pro) (ISO) - 022b Internal Keyboard/Trackpad (MacBook Pro) (JIS) - 0301 USB Mouse [Mitsumi, M4848] - 0302 Optical Mouse [Fujitsu] - 0304 Optical USB Mouse [Mitsumi] - 0306 Optical USB Mouse [Fujitsu] - 1000 Bluetooth HCI MacBookPro (HID mode) - 1001 Keyboard Hub [ALPS] - 1002 Extended Keyboard Hub [Mitsumi] - 1003 Hub in Pro Keyboard [Mitsumi, A1048] - 1006 Hub in Aluminum Keyboard - 1101 Speakers - 1201 3G iPod - 1202 iPod 2G - 1203 iPod 4.Gen Grayscale 40G - 1204 iPod [Photo] - 1205 iPod Mini 1.Gen/2.Gen - 1206 iPod '06' - 1207 iPod '07' - 1208 iPod '08' - 1209 iPod Video - 120a iPod Nano - 1260 iPod Nano 2.Gen - 1261 iPod Classic - 1300 iPod Shuffle - 1301 iPod Shuffle 2.Gen - 8202 HCF V.90 Data/Fax Modem - 8203 Bluetooth HCI - 8204 Bluetooth HCI [Bluetooth 2.0 + EDR, build-in] - 8205 Bluetooth HCI MacBookPro - 8206 Bluetooth USB Host Controller - 8240 IR Receiver [build-in] - 8300 Built-in iSight (no firmware loaded) - 8501 Built-in iSight [Micron] - 912f Hub in 30" Cinema Display - 9221 30" Cinema Display - ffff Bluetooth in DFU mode - Driver -05ad Y.C. Cable U.S.A., Inc. -05ae Synopsys, Inc. -05af Jing-Mold Enterprise Co., Ltd - 0821 IDE to - 9167 KB 9151B - 678 - 9267 KB 9251B - 678 Mouse -05b0 Fountain Technologies, Inc. -05b1 First International Computer, Inc. - 1389 Bluetooth Wireless Adapter -05b4 LG Semicon Co., Ltd - 4857 M-Any DAH-210 - 6001 Digisette DUO-MP3 AR-100 -05b5 Dialogic Corp. -05b6 Proxima Corp. -05b7 Medianix Semiconductor, Inc. -05b8 Agiler, Inc. - 3002 Scroll Mouse -05b9 Philips Research Laboratories -05ba DigitalPersona, Inc. -05bb Grey Cell Systems -05bc 3G Green Green Globe Co., Ltd - 0004 Trackball -05bd RAFI GmbH & Co. KG -05be Tyco Electronics (Raychem) -05bf S & S Research -05c0 Keil Software -05c1 Kawasaki Microelectronics, Inc. -05c2 Media Phonics (Suisse) S.A. -05c5 Digi International, Inc. - 0002 AccelePort USB 2 - 0004 AccelePort USB 4 - 0008 AccelePort USB 8 -05c6 Qualcomm, Inc. - 3100 CDMA Wireless Modem/Phone - 3196 CDMA Wireless Modem - 3197 CDMA Wireless Modem/Phone -05c7 Qtronix Corp. - 0113 PC Line Mouse - 1001 Lynx Mouse - 2001 Keyboard - 2011 SCorpius Keyboard - 6001 Ten-Keypad -05c8 Cheng Uei Precision Industry Co., Ltd (Foxlink) -05c9 Semtech Corp. -05ca Ricoh Co., Ltd - 0101 RDC-5300 Camera - 0325 Caplio GX (ptp) - 032d Caplio GX 8 (ptp) - 032f Caplio R3 (ptp) - 03a1 IS200e - 0403 Printing Support - 0405 Type 101 - 0406 Type 102 - 1830 Visual Communication Camera VGP-VCC2 - 1835 Visual Communication Camera VGP-VCC5 - 1870 Webcam 1000 - 2201 RDC-7 Camera - 2202 Caplio RR30 - 2203 Caplio 300G - 2204 Caplio G3 - 2205 Caplio RR30 / Medion MD 6126 Camera - 2206 Konica DG-3Z - 2207 Caplio Pro G3 - 2208 Caplio G4 - 2209 Caplio 400G wide - 220a KONICA MINOLTA DG-4Wide - 220b Caplio RX - 220c Caplio GX - 220d Caplio R1/RZ1 - 220e Sea & Sea 5000G - 220f Rollei dr5 / Rollei dr5 (PTP mode) - 2211 Caplio R1S - 2212 Caplio R1v Camera - 2213 Caplio R2 - 2214 Caplio GX 8 - 2215 DSC 725 - 2216 Caplio R3 - 2222 RDC-i500 -05cb PowerVision Technologies, Inc. - 1483 PV8630 interface (scanners, webcams) -05cc ELSA AG - 2100 MicroLink ISDN Office - 2219 MicroLink ISDN - 2265 MicroLink 56k - 2267 MicroLink 56k (V.250) - 2280 MicroLink 56k Fun - 3000 Micolink USB2Ethernet [pegasus] - 3100 AirLancer USB-11 - 3363 MicroLink ADSL Fun -05cd Silicom, Ltd -05ce sci-worx GmbH -05cf Sung Forn Co., Ltd -05d0 GE Medical Systems Lunar -05d1 Brainboxes, Ltd - 0003 Bluetooth Adapter BL-554 -05d2 Wave Systems Corp. -05d3 Tohoku Ricoh Co., Ltd -05d5 Super Gate Technology Co., Ltd -05d6 Philips Semiconductors, CICT -05d7 Thomas & Betts Corp. - 0099 10Mbps Ethernet [klsi] -05d8 Ultima Electronics Corp. - 4001 Artec Ultima 2000 - 4002 Artec Ultima 2000 (GT6801 based)/Lifetec LT9385/ScanMagic 1200 UB Plus Scanner - 4003 Artec E+ 48U - 4004 Artec E+ Pro - 4005 MEM48U - 4006 TRUST EASY WEBSCAN 19200 - 4007 TRUST 240H EASY WEBSCAN GOLD - 4008 Trust Easy Webscan 19200 - 4009 Umax Astraslim - 4013 IT Scan 1200 - 8105 Artec T1 USB TVBOX (cold) - 8106 Artec T1 USB TVBOX (warm) - 8107 Artec T1 USB TVBOX with AN2235 (cold) - 8108 Artec T1 USB TVBOX with AN2235 (warm) - 8109 Artec T1 USB2.0 TVBOX (cold -05d9 Axiohm Transaction Solutions - a225 A225 Printer - a758 A758 Printer - a794 A794 Printer -05da Microtek International, Inc. - 0091 ScanMaker X6u - 0093 ScanMaker V6USL - 0094 Phantom 336CX/C3 - 0099 ScanMaker X6/X6U - 009a Phantom C6 - 00a0 Phantom 336CX/C3 (#2) - 00a3 ScanMaker V6USL - 00ac ScanMaker V6UL - 00b6 ScanMaker V6UPL - 00ef ScanMaker V6UPL - 1006 Jenoptik JD350 entrance - 1011 NHJ Che-ez! Kiss Digital Camera - 1018 Digital Dream Enigma 1.3 - 1020 Digital Dream l'espion xtra - 1025 Take-it Still Camera Device - 1026 Take-it - 1043 Take-It 1300 DSC Bulk Driver - 1045 Take-it D1 - 1047 Take-it Camera Composite Device - 1048 Take-it Q3 - 1049 3M Still Camera Device - 1051 Camcorder Series - 1052 Mass Storage Device - 1053 Take-it DV Composite Device - 1054 Mass Storage Device - 1055 Digital Camera Series(536) - 1056 Mass Storage Device - 1057 Take-it DSC Camera Device(536) - 1058 Mass Storage Device - 1059 Camcorder DSC Series - 1060 Microtek Take-it MV500 - 2007 ArtixScan DI 1210 - 200c 1394_USB2 Scanner - 200e ArtixScan DI 810 - 2017 UF ICE Scanner - 201c 4800 Scanner - 201d ArtixScan DI 1610 - 201f 4800 Scanner-ICE - 202e ArtixScan DI 2020 - 208b ScanMaker 6800 - 208f ArtixScan DI 2010 - 209e ScanMaker 4700LP - 20a7 ScanMaker 5600 - 20b0 ScanMaker X12USL - 20b1 ScanMaker 8700 - 20b4 ScanMaker 4700 - 20bd ScanMaker 5700 - 20c9 ScanMaker 6700 - 20d2 Microtek ArtixScan 1800f - 20d6 PS4000 - 20de ScanMaker 9800XL - 20e0 ScanMaker 9700XL - 20ed ScanMaker 4700 - 20ee Micortek ScanMaker X12USL - 3008 Scanner - 300a 4800 ICE Scanner - 300b 4800 Scanner - 300f MiniScan C5 - 3020 4800dpi Scanner - 3021 1200dpi Scanner - 3022 Scanner 4800dpi - 3023 USB1200II Scanner - 30c1 USB600 Scanner - 30ce ScanMaker 3800 - 30cf ScanMaker 4800 - 30d4 USB1200 Scanner - 30d8 Scanner - 30d9 USB2400 Scanner - 30e4 ScanMaker 4100 - 30e5 USB3200 Scanner - 30e6 ScanMaker i320 - 40b3 ScanMaker 3600 - 40b8 ScanMaker 3700 - 40c7 ScanMaker 4600 - 40ca ScanMaker 3600 - 40cb ScanMaker 3700 - 40dd ScanMaker 3750i - 40ff ScanMaker 3600 - 5003 Goya - 5013 3200 Scanner - 80a3 ScanMaker V6USL (#2) - 80ac ScanMaker V6UL/SpicyU -05db Sun Corp. (Suntac?) - 0003 SUNTAC U-Cable type D2 - 0005 SUNTAC U-Cable type P1 - 0009 SUNTAC Slipper U - 000a SUNTAC Ir-Trinity - 000b SUNTAC U-Cable type A3 - 0011 SUNTAC U-Cable type A4 -05dc Lexar Media, Inc. - 0001 jumpSHOT CompactFlash Reader - 0002 JumpShot - 0003 JumpShot - 0080 Jumpdrive Secure 64MB - 0081 RBC Compact Flash Drive - 00a7 JumpDrive Impact - 0100 JumpDrive PRO - 0200 JumpDrive 2.0 Pro - 0300 Jumpdrive Geysr - 0301 JumpDrive Classic - 0302 JD Micro - 0303 JD Micro Pro - 0304 JD Secure II - 0310 JumpDrive - 0311 JumpDrive Classic - 0312 JD Micro - 0313 JD Micro Pro - 0320 JumpDrive - 0321 JD Micro - 0322 JD Micro Pro - 0323 UFC - 0330 JumpDrive Expression - 0340 JumpDrive TAD - 0350 Express Card - 0400 UFDC - 0401 UFDC - 0403 Locked B Device - 0405 Locked C Device - 0407 Locked D Device - 0409 Locked E Device - 040b Locked F Device - 040d Locked G Device - 040f Locked H Device - 0410 JumpDrive - 0411 JumpDrive - 0413 Locked J Device - 0415 Locked K Device - 0417 Locked L Device - 0419 Locked M Device - 041b Locked N Device - 041d Locked O Device - 041f Locked P Device - 0420 JumpDrive - 0421 JumpDrive - 0423 Locked R Device - 0425 Locked S Device - 0427 Locked T Device - 0429 Locked U Device - 042b Locked V Device - 042d Locked W Device - 042f Locked X Device - 0431 Locked Y Device - 0433 Locked Z Device - 4d02 MP3 Player - 4d12 MP3 Player - a300 JumpDrive2 - a400 JumpDrive trade; Pro 40-501 - a410 JumpDrive 128MB/256MB - a411 JumpDrive Traveler - a420 JumpDrive Pro - a421 JumpDrive Pro II - a422 JumpDrive Micro Pro - a430 JumpDrive Secure - a431 JumpDrive Secure II - a432 JumpDrive Classic - a440 JumpDrive Lightning - a450 JumpDrive TouchGuard - a460 JD Mercury - a501 JumpDrive Classic - a510 JumpDrive Sport - a530 JumpDrive Expression - a531 JumpDrive Secure II - a560 JumpDrive FireFly - a701 JumpDrive FireFly - b002 USB CF Reader - b018 Multi-Card Reader -05dd Delta Electronics, Inc. - ff31 AWU-120 - ff32 FriendlyNET AeroLAN AL2011 - ff35 PCW 100 - Wireless 802.11b Adapter - ff91 2Wire PC Port Phoneline 10Mbps Adapter -05df Silicon Vision, Inc. -05e0 Symbol Technologies - 0700 Bar Code Scanner (CS1504) - 0800 Spectrum24 Wireless LAN Adapter - 1200 DS6608 Bar Code Scanner - 1900 SNAPI Imaging Device - 2000 MC3090 Rugged Mobile Computer - 200d MC70 Rugged Mobile Computer -05e1 Syntek Semiconductor Co., Ltd - 0500 DC-112X - 0501 WebCam, Chipset DC-1125 similar to 174f:a311 - Asus F2F, F2J, F3J, F3T, G1, Z53JA - 0890 STK011 Camera - 0892 STK013 Camera - 0895 STK016 Camera - 0896 STK017 Camera -05e2 ElecVision, Inc. -05e3 Genesys Logic, Inc. - 000a Keyboard with PS/2 Port - 000b Mouse - 0100 Nintendo Game Boy Advance SP - 0120 Pacific Image Electronics PrimeFilm 1800u slide/negative scanner - 0131 CF/SM Reader/Writer - 0142 Multiple Slides Scanner-3600 - 0143 Multiple Frames Film Scanner-36series - 0180 Plustek Scanner - 0182 Wize Media 1000 - 0189 ScanJet 4600 series - 018a Xerox 6400 - 0300 GLUSB98PT Parallel Port - 0301 USB2LPT Cable Release2 - 0406 Hub - 0501 GL620USB Host-Host interface - 0502 GL620USB GeneLink USB-USB Bridge - 0504 HID Keyboard Filter - 0604 USB 1.1 Hub - 0605 USB 2.0 Hub [ednet] - 0606 USB 2.0 Hub / D-Link DUB-H4 USB 2.0 Hub - 0608 USB-2.0 4-Port HUB - 0660 USB 2.0 Hub - 0700 SIIG US2256 CompactFlash Card Reader - 0701 USB 2.0 IDE Adapter - 0702 USB 2.0 IDE Adapter - 0703 Card Reader - 0704 Card Reader - 0705 Card Reader - 0706 Card Reader - 0707 Card Reader - 0708 Card Reader - 0709 Card Reader - 070a Pen Flash - 070b DMHS1B Rev 3 DFU Adapter - 070e X-PRO CR20xA USB 2.0 Internal Card Reader - 070f Pen Flash - 0710 USB 2.0 33-in-1 Card Reader - 0711 Card Reader - 0712 Delkin Mass Storage Device - 0715 USB 2.0 microSD Reader - 0760 USB 2.0 Card Reader/Writer - 0761 Genesys Mass Storage Device - 0780 USBFS DFU Adapter - 07a0 Pen Flash - 0927 Card Reader - 1205 Afilias Optical Mouse H3003 - a700 Pen Flash - f102 VX7012 TV Box - f103 VX7012 TV Box - f104 VX7012 TV Box - fd21 3M TL20 Temperature Logger - fe00 Razer Mouse -05e4 Red Wing Corp. -05e5 Fuji Electric Co., Ltd -05e6 Keithley Instruments -05e8 ICC, Inc. -05e9 Kawasaki LSI - 0008 KL5KUSB101B Ethernet [klsi] - 0009 Sony 10Mbps Ethernet [pegasus] - 000c USB-to-RS-232 - 000d USB-to-RS-232 - 0014 RS-232 J104 - 0040 Ethernet Adapter - 2008 Ethernet Adapter -05eb FFC, Ltd -05ec COM21, Inc. -05ee Cytechinfo Inc. -05ef AVB, Inc. [anko?] - 020a Top Shot Pegasus Joystick - 8884 Mag Turbo Force Wheel - 8888 Top Shot Force Feedback Racing Wheel -05f0 Canopus Co., Ltd - 0101 DA-Port DAC -05f1 Compass Communications -05f2 Dexin Corp., Ltd - 0010 AQ Mouse -05f3 PI Engineering, Inc. - 0007 Kinesis Advantage PRO MPC/USB Keyboard - 0081 Kinesis Integrated Hub - 020b PS2 Adapter - 0232 X-Keys Switch Interface, Programming Mode - 0261 X-Keys Switch Interface, SPLAT Mode - 0264 X-Keys Switch Interface, Composite Mode -05f5 Unixtar Technology, Inc. -05f6 AOC International -05f7 RFC Distribution(s) PTE, Ltd -05f9 PSC Scanning, Inc. -05fa Siemens Telecommunications Systems, Ltd - 3301 Keyboard with PS/2 Mouse Port - 3302 Keyboard - 3303 Keyboard with PS/2 Mouse Port -05fc Harman Multimedia - 7849 Harman/Kardon SoundSticks -05fd InterAct, Inc. - 0239 SV-239 HammerHead Digital - 0251 Raider Pro - 0253 ProPad 8 Digital - 0286 SV-286 Cyclone Digital - 262a 3dfx HammerHead FX - 262f HammerHead Fx - daae Game Shark -05fe Chic Technology Corp. - 0001 Mouse - 0003 Cypress USB Mouse - 0005 Viewmaster 4D Browser Mouse - 0007 Twinhead Mouse - 0009 Inland Pro 4500/5000 Mouse - 0011 Browser Mouse - 1010 Optical Wireless -05ff LeCroy Corp. -0600 Barco Display Systems -0601 Jazz Hipster Corp. - 0003 Internet Security Co., Ltd. SecureKey -0602 Vista Imaging, Inc. - 1001 ViCam WebCam -0603 Novatek Microelectronics Corp. - 00f1 Keyboard - 6871 Mouse -0604 Jean Co., Ltd -0605 Anchor C&C Co., Ltd -0606 Royal Information Electronics Co., Ltd -0607 Bridge Information Co., Ltd -0608 Genrad Ads -0609 SMK Manufacturing, Inc. - 031d eHome Infrared Receiver - 0322 eHome Infrared Receiver - ff12 SMK Bluetooth Device -060a Worthington Data Solutions, Inc. -060b Solid Year - 0001 MacAlly Keyboard - 1006 Japanese Keyboard - 260U - 2101 Keyboard - 5811 ACK-571U Wireless Keyboard - 5903 Japanese Keyboard - 595U - 6001 SolidTek USB 2p HUB - 6002 SolidTek USB Keyboard - 6003 Japanese Keyboard - 600HM - a001 Maxwell Compact Pc PM3 -060c EEH Datalink GmbH -060d Auctor Corp. -060e Transmonde Technologies, Inc. -060f Joinsoon Electronics Mfg. Co., Ltd -0610 Costar Electronics, Inc. -0611 Totoku Electric Co., Ltd -0613 TransAct Technologies, Inc. -0614 Bio-Rad Laboratories -0615 Quabbin Wire & Cable Co., Inc. -0616 Future Techno Designs PVT, Ltd -0617 Swiss Federal Insitute of Technology -0618 MacAlly - 0101 Mouse -0619 Seiko Instruments, Inc. - 0101 SLP-100 Driver - 0102 SLP-200 Driver - 0103 SLP-100N Driver - 0104 SLP-200N Driver - 0105 SLP-240 Driver -061a Veridicom International, Inc. - 0110 5thSense Fingerprint Sensor - 0200 FPS200 Fingerprint Sensor - 8200 VKI-A Fingerprint Sensor/Flash Storage (dumb) - 9200 VKI-B Fingerprint Sensor/Flash Storage (smart) -061b Promptus Communications, Inc. -061c Act Labs, Ltd -061d Quatech, Inc. -061e Nissei Electric Co. - 0001 nissei 128DE-USB - - 0010 nissei 128DE-PNA - -0620 Alaris, Inc. - 0004 QuickVideo weeCam - 0007 QuickVideo weeCam - 000a QuickVideo weeCam - 000b QuickVideo weeCam -0621 ODU-Steckverbindungssysteme GmbH & Co. KG -0622 Iotech, Inc. -0623 Littelfuse, Inc. -0624 Avocent Corp. -0625 TiMedia Technology Co., Ltd -0626 Nippon Systems Development Co., Ltd -0627 Adomax Technology Co., Ltd -0628 Tasking Software, Inc. -0629 Zida Technologies, Ltd -062a Creative Labs - 0000 Optical mouse - 0001 Notebook Optical Mouse - 0201 Defender Office Keyboard (K7310) S Zodiak KM-9010 - 9003 VoIP Conference Hub (A16GH) - 9004 USR9602 USB Internet Mini Phone -062b Greatlink Electronics Taiwan, Ltd -062c Institute for Information Industry -062d Taiwan Tai-Hao Enterprises Co., Ltd -062e Mainsuper Enterprises Co., Ltd -062f Sin Sheng Terminal & Machine, Inc. -0631 JUJO Electronics Corp. -0633 Cyrix Corp. -0634 Micron Technology, Inc. -0635 Methode Electronics, Inc. -0636 Sierra Imaging, Inc. - 0003 Vivicam 35Xx -0638 Avision, Inc. - 0268 iVina 1200U Scanner - 026a Minolta Dimage Scan Dual II - 0a10 iVina FB1600/UMAX Astra 4500 - 0a13 AV600U - 0a16 SC-215 - 0a30 UMAX Astra 6700 Scanner - 0a41 Avision AM3000/MF3000 Series - 0f01 fi-4010CU - 4004 Minolta Dimage Scan Elite II -0639 Chrontel, Inc. -063a Techwin Corp. -063b Taugagreining HF -063c Yamaichi Electronics Co., Ltd (Sakura) -063d Fong Kai Industrial Co., Ltd -063e RealMedia Technology, Inc. -063f New Technology Cable, Ltd -0640 Hitex Development Tools -0641 Woods Industries, Inc. -0642 VIA Medical Corp. -0644 TEAC Corp. - 0000 Floppy - 1000 CD-ROM Drive - 800d TASCAM Portastudio DP-01FX - d001 CD-R/RW Unit - d002 CD-R/RW Unit - d010 CD-RW/DVD Unit -0645 Who? Vision Systems, Inc. -0646 UMAX -0647 Acton Research Corp. - 0100 ARC SpectraPro UV/VIS/IR Monochromator/Spectrograph - 0101 ARC AM-VM Mono Airpath/Vacuum Monochromator/Spectrograph - 0102 ARC Inspectrum Mono - 0103 ARC Filterwheel - 03e9 Inspectrum 128x1024 F VIS Spectrograph - 03ea Inspectrum 256x1024 F VIS Spectrograph - 03eb Inspectrum 128x1024 B VIS Spectrograph - 03ec Inspectrum 256x1024 B VIS Spectrograph -0648 Inside Out Networks -0649 Weli Science Co., Ltd -064b White Mountain DSP, Inc. -064c Ji-Haw Industrial Co., Ltd -064d TriTech Microelectronics, Ltd -064e Suyin Corp. -064f WIBU-Systems AG - 0bd7 BOX/U - 0bd8 BOX/RU -0650 Dynapro Systems -0651 Likom Technology Sdn. Bhd. -0652 Stargate Solutions, Inc. -0653 CNF, Inc. -0654 Granite Microsystems, Inc. - 0005 Device Bay Controller - 0006 Hub - 0007 Device Bay Controller - 0016 Hub -0655 Space Shuttle Hi-Tech Co., Ltd -0656 Glory Mark Electronic, Ltd -0657 Tekcon Electronics Corp. -0658 Sigma Designs, Inc. -0659 Aethra -065a Optoelectronics Co., Ltd - 0001 Barcode scanner -065b Tracewell Systems -065e Silicon Graphics -065f Good Way Technology Co., Ltd & GWC technology Inc. -0660 TSAY-E (BVI) International, Inc. -0661 Hamamatsu Photonics K.K. -0662 Kansai Electric Co., Ltd -0663 Topmax Electronic Co., Ltd - 0103 CobraPad -0667 Aiwa Co., Ltd - 0fa1 TD-U8000 Tape Drive -0668 WordWand -0669 Oce' Printing Systems GmbH -066a Total Technologies, Ltd -066b Linksys, Inc. - 0105 SCM eUSB SmartMedia Card Reader - 010a Melco MCR-U2 SmartMedia / CompactFlash Reader - 200c USB10TX - 2202 USB10TX Ethernet [pegasus] - 2203 USB100TX Ethernet [pegasus] - 2204 USB100TX HomePNA Ethernet [pegasus] - 2206 USB Ethernet [pegasus] - 2207 HomeLink Phoneline 10M Network Adapter - 2211 WUSB11 802.11b Adapter - 2212 WUSB11v2.5 802.11b Adapter - 2213 WUSB12v1.1 802.11b Adapter - 2219 Instant Wireless Network Adapter - 400b USB10TX -066d Entrega, Inc. -066e Acer Semiconductor America, Inc. -066f SigmaTel, Inc. - 003b MP3 Player - 003e MP3 Player - 003f MP3 Player - 0040 MP3 Player - 0041 MP3 Player - 0042 MP3 Player - 0043 MP3 Player - 004b A-Max PA11 MP3 Player - 3400 STMP3400 D-Major MP3 Player - 3410 STMP3410 D-Major MP3 Player - 3500 Player Recovery Device - 4200 STIr4200 IrDA Bridge - 4210 STIr4210 IrDA Bridge - 8000 MSCN MP3 Player - 8001 SigmaTel MSCN Audio Player - 8004 MSCNMMC MP3 Player - 8008 i-Bead 100 MP3 Player - 8020 MP3 Player - 8034 MP3 Player - 8036 MP3 Player - 8038 MP3 Player - 8056 MP3 Player - 8060 MP3 Player - 8066 MP3 Player - 807e MP3 Player - 8092 MP3 Player - 8096 MP3 Player - 809a MP3 Player - 80aa MP3 Player - 80ac MP3 Player - 80b8 MP3 Player - 80ba MP3 Player - 80bc MP3 Player - 80bf MP3 Player - 80c5 MP3 Player - 80c8 MP3 Player - 80ca MP3 Player - 80cc MP3 Player - 8104 MP3 Player - 8106 MP3 Player - 8108 MP3 Player - 810a MP3 Player - 810c MP3 Player - 8122 MP3 Player - 8124 MP3 Player - 8126 MP3 Player - 8128 MP3 Player - 8134 MP3 Player - 8136 MP3 Player - 8138 MP3 Player - 813a MP3 Player - 813e MP3 Player - 8140 MP3 Player - 8142 MP3 Player - 8144 MP3 Player - 8146 MP3 Player - 8148 MP3 Player - 814c MP3 Player - 8201 MP3 Player - 8202 Jens of Sweden / I-BEAD 150M/150H MP3 player - 8203 MP3 Player - 8204 MP3 Player - 8205 MP3 Player - 8206 Digital MP3 Music Player - 8207 MP3 Player - 8208 MP3 Player - 8209 MP3 Player - 820a MP3 Player - 820b MP3 Player - 820c MP3 Player - 820d MP3 Player - 820e MP3 Player - 820f MP3 Player - 8210 MP3 Player - 8211 MP3 Player - 8212 MP3 Player - 8213 MP3 Player - 8214 MP3 Player - 8215 MP3 Player - 8216 MP3 Player - 8217 MP3 Player - 8218 MP3 Player - 8219 MP3 Player - 821a MP3 Player - 821b MP3 Player - 821c MP3 Player - 821d MP3 Player - 821e MP3 Player - 821f MP3 Player - 8220 MP3 Player - 8221 MP3 Player - 8222 MP3 Player - 8223 MP3 Player - 8224 MP3 Player - 8225 MP3 Player - 8226 MP3 Player - 8227 MP3 Player - 8228 MP3 Player - 8229 MP3 Player - 8230 MP3 Player - 9000 MP3 Player - 9001 MP3 Player - 9002 MP3 Player -0672 Labtec, Inc. - 1041 LCS1040 Speaker System - 5000 SpaceBall 4000 FLX -0673 HCL - 5000 Keyboard -0674 Key Mouse Electronic Enterprise Co., Ltd -0675 Draytech - 0110 Vigor 128 ISDN TA - 0550 Vigor550 -0676 Teles AG -0677 Aiwa Co., Ltd - 07d5 TM-ED1285(USB) - 0fa1 TD-U8000 Tape Drive -0678 ACard Technology Corp. -067b Prolific Technology, Inc. - 0000 PL2301 USB-USB Bridge - 0001 PL2302 USB-USB Bridge - 04bb PL2303 Serial (IODATA USB-RSAQ2) - 0610 Onext EG210U MODEM - 0611 AlDiga AL-11U Quad-band GSM/GPRS/EDGE modem - 2303 PL2303 Serial Port - 2305 PL2305 Parallel Port - 2307 PL2307 USB-ATAPI4 Bridge - 2313 FITEL PHS U Cable Adaptor - 2315 Flash Disk Embedded Hub - 2316 Flash Disk Security Device - 2317 Mass Storage Device - 2501 PL2501 USB-USB Bridge (USB 2.0) - 2507 PL2507 Hi-speed USB to IDE bridge controller - 2515 Flash Disk Embedded Hub - 2517 Flash Disk Mass Storage Device - 25a1 PL25A1 Host-Host Bridge - 3400 Hi-Speed Flash Disk with TruePrint AES3400 - 3500 Hi-Speed Flash Disk with TruePrint AES3500 - 3507 PL3507 ATAPI6 Bridge - aaa0 Prolific Pharos - aaa2 PL2303 Serial Adapter (IODATA USB-RSAQ3) -067c Efficient Networks, Inc. - 1001 Siemens SpeedStream 100MBps Ethernet - 1022 Siemens SpeedStream 1022 802.11b Adapter - 1023 SpeedStream Wireless - 4020 SpeedStream 4020 ATM/ADSL Installer - 4031 Efficient ADSL Modem - 4032 SpeedStream 4031 ATM/ADSL Installer - 4033 SpeedStream 4031 ATM/ADSL Installer - 4060 Alcatel Speedstream 4060 ADSL Modem - 4062 Efficient Networks 4060 Loader - 5667 Efficient Networks Virtual Bus for ADSL Modem - c031 SpeedStream 4031 ATM/ADSL Installer - c032 SpeedStream 4031 ATM/ADSL Installer - c033 SpeedStream 4031 ATM/ADSL Installer - c060 SpeedStream 4060 Miniport ATM/ADSL Adapter - d667 Efficient Networks Virtual Bus for ADSL Modem - e240 Speedstream Ethernet Adapter E240 - e540 Speedstream Ethernet Adapter E240 -067d Hohner Corp. -067e Intermec - 1001 Mobile Computer -067f Virata, Ltd - 4552 DSL-200 ADSL Modem - 6542 DSL Modem - 6549 DSL Modem - 7541 DSL Modem -0680 Realtek Semiconductor Corp., CPP Div. (Avance Logic) - 0002 Arowana Optical Wheel Mouse MSOP-01 -0681 Siemens Information and Communication Products - 0001 Dect Base - 0002 Gigaset 3075 Passive ISDN - 0005 ID-Mouse with Fingerprint Reader - 0012 I-Gate 802.11b Adapter - 001b WLL013 - 0022 Gigaset SX353 ISDN - 002b A-100-I ADSL Modem - 002e ADSL Router_S-141 - 0034 GSM module MC35/ES75 USB Modem - 3c06 54g USB Network Adapter -0682 Victor Company of Japan, Ltd -0684 Actiontec Electronics, Inc. -0686 Minolta Co., Ltd - 2001 PagePro 4110W - 3001 PagePro 4100 - 3006 PagePro 1250W - 302e Develop D 1650iD PCL - 3034 Develop D 2050iD PCL - 4001 Dimage 2300 - 4003 Dimage 2330 Zoom Camera - 4004 Scan Elite II - 4005 Minolta DiMAGE E201 Mass Storage Device - 4006 Dimage 7 Camera - 4007 Dimage S304 Camera - 4008 Dimage 5 Camera - 4009 Dimage X Camera - 400a Dimage S404 Camera - 400b Dimage 7i Camera - 400c Dimage F100 Camera - 400d Scan Dual III - 400e Dimage 5400 - 400f Dimage 7Hi Camera - 4010 Dimage Xi Camera - 4011 Dimage F300 Camera - 4012 Dimage F200 Camera - 4014 Dimage S414 Camera - 4015 Dimage XT Camera [storage] - 4016 Dimage XT Camera [remote mode] - 4017 Dimage E223 - 4018 Dimage Z1 Camera - 401a Dimage A1 Camera - 401c Dimage X20 Camera - 401e Dimage E323 Camera -068a Pertech, Inc. -068b Potrans International, Inc. -068e CH Products, Inc. - 00e2 HFX OEM Joystick - 00f1 Pro Throttle - 00f2 Flight Sim Pedals - 00f3 Fighterstick - 00ff Flight Sim Yoke - 0500 GameStick 3D - 0501 CH Pro Pedals - 0504 F-16 Combat Stick -0690 Golden Bridge Electech, Inc. -0693 Hagiwara Sys-Com Co., Ltd - 0002 FlashGate SmartMedia Card Reader - 0003 FlashGate CompactFlash Card Reader - 0005 FlashGate - 0006 SM PCCard R/W and SPD - 0007 FlashGate ME (Authenticated) - 000a SDCard/MMC Reader/Writer -0694 Lego Group - 0001 Mindstorms Tower -0698 Chuntex (CTX) - 1786 1300ex Monitor - 9999 VLxxxx Monitor+Hub -0699 Tektronix, Inc. -069a Askey Computer Corp. - 0001 VC010 WebCam [pwc] - 0303 Cable Modem - 0311 ADSL Router Remote NDIS Device - 0318 Remote NDIS Device - 0319 220V Remote NDIS Device - 0320 IEEE 802.11b Wireless LAN Card - 0321 Dynalink WLL013 / Compex WLU11A 802.11b Adapter - 0402 Scientific Atlanta WebSTAR 100 & 200 series Cable Modem - 0811 BT Virtual Bus for Helium - 0821 BT Voyager 1010 802.11b Adapter - 4402 Scientific Atlanta WebSTAR 2000 series Cable Modem - 4403 Scientific Atlanta WebSTAR 300 series Cable Modem - 4501 Scientific-Atlanta WebSTAR 2000 series Cable Modem -069b Thomson, Inc. - 0704 DCM245 Cable Modem - 070c MP3 Player - 070d MP3 Player - 070e MP3 Player - 070f RCA Lyra RD1071 MP3 Player - 2220 RCA Kazoo RD1000 MP3 Player - 300a RCA Lyra MP3 Player - 3012 MP3 Player - 3013 MP3 Player - 5557 RCA CDS6300 -069d Hughes Network Systems (HNS) - 0001 Satellite Receiver Device - 0002 Satellite Device -069e Marx - 0005 CryptoBox v1.2 -069f Allied Data Technologies BV - 0010 Tornado Speakerphone FaxModem 56.0 - 0011 Tornado Speakerphone FaxModem 56.0 - 1000 ADT VvBus for CopperJet -06a2 Topro Technology, Inc. -06a3 Saitek PLC - 0006 Cyborg Gold Joystick - 0109 P880 Pad - 0160 ST290 Pro - 0200 Xbox Adrenalin Hub - 0241 Xbox Adrenalin Gamepad - 0255 X52 Flight Controller - 040b P990 Dual Analog Pad - 040c P2900 Wireless Pad - 0422 ST90 Joystick - 0460 ST290 Pro Flight Stick - 0463 ST290 - 0464 Cyborg Evo - 0471 Cyborg Graphite Stick - 0501 R100 Sports Wheel - 0502 ST200 Stick - 0506 R220 Digital Wheel - 051e Cyborg Digital II Stick - 052d P750 Gamepad - 053c X45 Flight Controller - 053f X36F Flightstick - 056c P2000 Tilt Pad - 056f P2000 Tilt Pad - 05d2 PC Dash 2 - 075c X52 Flight Controller - 0805 R440 Force Wheel - 1003 GM2 Action Pad - 1009 Action Pad - 100a SP550 Pad and Joystick Combo - 100b SP550 Pad - 1509 P3000 Wireless Pad - 1589 P3000 Wireless Pad - 2541 X45 Flight Controller - 3509 P3000 RF GamePad - 353e Cyborg Evo Wireless - 3589 P3000 Wireless Pad - 35be Cyborg Evo - 5509 P3000 Wireless Pad - 8000 Gamers' Keyboard - 801e Cyborg 3D Digital Stick II - 8021 Eclipse II Keyboard - 802d P750 Pad - 803f X36 Flight Controller - 806f P2000 Tilt Pad - 80c0 Pro Gamer Command Unit - a502 Gaming Mouse - ff04 R440 Force Wheel - ff0c Cyborg Force Rumble Pad - ff0d P2600 Rumble Force Pad - ff12 Cyborg 3D Force Stick - ff17 ST 330 Rumble Force Stick - ff52 Cyborg 3D Rumble Force Joystick - ffb5 Cyborg Evo Force Joystick -06a4 Xiamen Doowell Electron Co., Ltd -06a5 Divio - 0000 Typhoon Webcam 100k [nw8000] - d001 ProLink DS3303u WebCam - d800 Chicony TwinkleCam - d820 Wize Media 1000 -06a7 MicroStore, Inc. -06a8 Topaz Systems, Inc. - 0042 SignatureGem 1X5 Pad - 0043 SignatureGem 1X5-HID Pad -06a9 Westell - 0005 WireSpeed Dual Connect Modem - 0006 WireSpeed Dual Connect Modem - 000a WireSpeed Dual Connect Modem - 000b WireSpeed Dual Connect Modem - 000e 802.11g Adapter -06aa Sysgration, Ltd -06ac Fujitsu Laboratories of America, Inc. -06ad Greatland Electronics Taiwan, Ltd -06ae Professional Multimedia Testing Centre -06af Harting, Inc. of North America -06b8 Pixela Corp. -06b9 Alcatel Telecom - 0121 SpeedTouch 121g Wireless Dongle - 2001 SPEED TOUCH Card - 4061 SpeedTouch ISDN or ADSL Modem - a5a5 DynaMiTe Modem -06ba Smooth Cord & Connector Co., Ltd -06bb EDA, Inc. -06bc Oki Data Corp. -06bd AGFA-Gevaert NV - 0001 SnapScan 1212U - 0002 SnapScan 1236U - 0100 SnapScan Touch - 0101 SNAPSCAN ELITE - 0200 ScanMaker 8700 - 02bf DUOSCAN f40 - 0400 CL30 - 0401 Mass Storage - 0403 ePhoto CL18 Camera - 0404 ePhoto CL20 Camera - 2061 SnapScan 1212U (?) - 208d Snapscan e40 - 208f SnapScan e50 - 2091 SnapScan e20 - 2093 SnapScan e10 - 2095 SnapScan e25 - 2097 SnapScan e26 - 20fd SnapScan e52 - 20ff SnapScan e42 -06be AME Optimedia Technology Co., Ltd - 1005 Dazzle DPVM! (1005) - d001 P35U Camera Capture -06bf Leoco Corp. -06c2 Phidgets Inc. (formerly GLAB) - 0030 PhidgetRFID - 0038 4-Motor PhidgetServo v3.0 - 0039 1-Motor PhidgetServo v3.0 - 003a 8-Motor PhidgetAvancedServo - 0040 PhidgetInterface Kit 0-0-4 - 0044 PhidgetInterface Kit 0-16-16 - 0045 PhidgetInterface Kit 8-8-8 - 0048 PhidgetStepper (Under Development) - 0049 PhidgetTextLED Ver 1.0 - 004a PhidgetLED Ver 1.0 - 004b PhidgetEncoder Ver 1.0 - 0051 PhidgetInterface Kit 0-5-7 (Custom) - 0052 PhidgetTextLCD - 0053 PhidgetInterfaceKit 0-8-8 - 0058 PhidgetMotorControl Ver 1.0 - 0070 PhidgetTemperatureSensor Ver 1.0 - 0071 PhidgetAccelerometer Ver 1.0 - 0072 PhidgetWeightSensor Ver 1.0 - 0073 PhidgetHumiditySensor - 0074 PhidgetPHSensor - 0075 PhidgetGyroscope -06c4 Bizlink International Corp. -06c5 Hagenuk, GmbH -06c6 Infowave Software, Inc. -06c8 SIIG, Inc. -06c9 Taxan (Europe), Ltd - 0005 Monitor Control - 0007 Monitor Control - 0009 Monitor Control -06ca Newer Technology, Inc. -06cb Synaptics, Inc. - 0001 HID Device - 0002 HID Device - 0003 HID Device - 0005 Touchpad/FPS - 0006 HID Device - 0007 HID Device - 0008 HID Device - 0009 Composite TouchPad and TrackPoint - 000e HID Device - 0010 Composite Human Interface Device - 0013 Human Interface Device -06cc Terayon Communication Systems - 0101 Cable Modem - 0102 Cable Modem - 0103 Cable Modem - 0104 Cable Modem - 0304 Cable Modem -06cd Keyspan - 0101 USA-28 PDA [no firmware] - 0102 USA-28X PDA [no firmware] - 0103 USA-19 PDA [no firmware] - 0104 PDA [prerenum] - 0105 USA-18X PDA [no firmware] - 0106 USA-19W PDA [no firmware] - 0107 USA-19 PDA - 0108 USA-19W PDA - 0109 USA-49W serial adapter [no firmware] - 010a USA-49W serial adapter - 010b USA-19Qi serial adapter [no firmware] - 010c USA-19Qi serial adapter - 010d USA-19Q serial Adapter (no firmware) - 010e USA-19Q serial Adapter - 010f USA-28 PDA - 0110 USA-28Xb PDA - 0111 USA-18 serial Adapter - 0112 USA-18X PDA - 0113 USA-28Xb PDA [no firmware] - 0114 USA-28Xa PDA [no firmware] - 0115 USA-28Xa PDA - 0116 USA-18XA serial Adapter (no firmware) - 0117 USA-18XA serial Adapter - 0118 USA-19QW PDA [no firmware] - 0119 USA-19QW PDA - 011a USA-49Wlc serial adapter [no firmware] - 011b MPR Serial Preloader (MPRQI) - 011c MPR Serial (MPRQI) - 011d MPR Serial Preloader (MPRQ) - 011e MPR Serial (MPRQ) - 0121 USA-19hs serial adapter - 012a USA-49Wlc serial adapter - 0201 Digital Media Remote - 0202 UIA-11 remote control -06cf SpheronVR AG - 1010 PanoCam 10 - 1012 PanoCam 12/12X -06d0 LapLink, Inc. - 0622 LapLink Gold USB-USB Bridge [net1080] -06d1 Daewoo Electronics Co., Ltd -06d3 Mitsubishi Electric Corp. - 0380 CP8000D Port - 0381 CP770D Port - 0385 CP900D Port - 0387 CP980D Port - 038b CP3020D Port - 038c CP900DW(ID) Port - 0393 CP9500D/DW Port - 0394 CP9000D/DW Port - 03a1 CP9550D/DW Port -06d4 Cisco Systems -06d5 Toshiba - 4000 Japanese Keyboard -06d6 Aashima Technology B.V. - 002d Trust PowerC@m 350FT - 002e Trust PowerC@m 350FS - 0030 Trust 710 LCD POWERC@M ZOOM - MSD - 0031 Trust 710 LCD POWERC@M ZOOM - 003a Trust PowerC@m 770Z - 003c Trust 910z PowerC@m - 003f Trust 735S POWERC@M ZOOM, WDM DSC Bulk Driver - 0050 Trust 738AV LCD PV Digital Camera - 0062 TRUST 782AV LCD P. V. Video Capture - 0066 TRUST Digital PCTV and Movie Editor - 006b TRUST AUDIO VIDEO EDITOR -06d7 Network Computing Devices (NCD) -06d8 Technical Marketing Research, Inc. -06da Phoenixtec Power Co., Ltd - 0002 UPS -06db Paradyne -06dc Foxlink Image Technology Co., Ltd - 0012 Scan 1200c Scanner - 0014 Prolink Winscan Pro 2448U -06de Heisei Electronics Co., Ltd -06e0 Multi-Tech Systems, Inc. - f101 MT5634ZBA-USB MultiModemUSB (old firmware) - f103 MT5634MU MultiMobileUSB - f104 MT5634ZBA-USB MultiModemUSB (new firmware) - f107 MT5634ZBA-USB-V92 MultiModemUSB -06e1 ADS Technologies, Inc. - 0008 UBS-10BT Ethernet [klsi] - 0009 UBS-10BT Ethernet - 0833 Mass Storage Device - a160 Instant Video-To-Go RDX-160 (no firmware) - a161 Instant Video-To-Go RDX-160 - a190 Instand VCD Capture - a191 Instant VideoXpress - a337 Mini DigitalTV - a701 DVD Xpress - b337 Mini DigitalTV - b701 DVD Xpress B -06e4 Alcatel Microelectronics -06e6 Tiger Jet Network, Inc. - 0200 Internet Phone - 0201 Internet Phone - 0202 Composite Device - 0203 Internet Phone - 0210 Composite Device - 0211 Internet Phone - 0212 Internet Phone - 031c Internet Phone - 031d Internet Phone - 031e Internet Phone - 3200 Composite Device - 3201 Internet Phone - 3202 Composite Device - 3203 Composite Device - 7200 Composite Device - 7210 Composite Device - 7250 Composite Device - 825c Internet Phone - 831c Internet Phone - 831d Composite Device - 831e Composite Device - b200 Composite Device - b201 Composite Device - b202 Internet Phone - b210 Internet Phone - b211 Composite Device - b212 Composite Device - b250 Composite Device - b251 Internet Phone - b252 Internet Phone - c200 Internet Phone - c201 Internet Phone - c202 Composite Device - c203 Internet Phone - c210 Personal PhoneGateway - c211 Personal PhoneGateway - c212 Personal PhoneGateway - c213 PPG Device - c25c Composite Device - c290 PPG Device - c291 PPG Device - c292 PPG Device - c293 Personal PhoneGateway - c31c Composite Device - c39c Personal PhoneGateway - c39d PPG Device - c39e PPG Device - c39f PPG Device - c700 Internet Phone - c701 Internet Phone - c702 Composite Device - c703 Internet Phone - c710 VoIP Combo Device - c711 VoIP Combo - c712 VoIP Combo Device - c713 VoIP Combo Device - cf00 Composite Device - cf01 Internet Phone - cf02 Internet Phone - cf03 Composite Device - d210 Personal PhoneGateway - d211 PPG Device - d212 PPG Device - d213 Personal PhoneGateway - d700 Composite Device - d701 Composite Device - d702 Internet Phone - d703 Composite Device - d710 VoIP Combo - d711 VoIP Combo Device - d712 VoIP Combo - d713 VoIP Combo - df00 Composite Device - df01 Composite Device - df02 Internet Phone - df03 Internet Phone - f200 Internet Phone - f201 Internet Phone - f202 Composite Device - f203 Composite Device - f210 Internet Phone - f250 Composite Device - f252 Internet Phone - f310 Internet Phone - f350 Composite Device -06ea Sirius Technologies - 0001 NetCom Roadster II 56k - 0002 Roadster II 56k -06eb PC Expert Tech. Co., Ltd -06ef I.A.C. Geometrische Ingenieurs B.V. -06f0 T.N.C Industrial Co., Ltd - de01 DualCam Video Camera - de02 DualCam Still Camera -06f1 Opcode Systems, Inc. - a011 SonicPort - a021 SonicPort Optical -06f2 Emine Technology Co. - 0011 KVM Switch Keyboard -06f6 Wintrend Technology Co., Ltd -06f7 Wailly Technology Ltd - 0003 USB->Din 4 Adaptor -06f8 Guillemot Corp. - a300 Dual Analog Leader GamePad - b000 Hercules DJ Console - c000 Hercules Muse Pocket - d002 Hercules DJ Console - e000 HWGUSB2-54 WLAN - e010 HWGUSB2-54-LB - e020 HWGUSB2-54V2-AP -06fa HSD S.r.L -06fc Motorola Semiconductor Products Sector -06fd Boston Acoustics - 0101 Audio Device - 0102 Audio Device - 0201 2-piece Audio Device -06fe Gallant Computer, Inc. -0701 Supercomal Wire & Cable SDN. BHD. -0703 Bvtech Industry, Inc. -0705 NKK Corp. -0706 Ariel Corp. -0707 Standard Microsystems Corp. - 0100 2202 Ethernet [klsi] - 0200 2202 Ethernet [pegasus] - 0201 EZ Connect USB Ethernet - ee04 SMCWUSB32 802.11b Wireless LAN Card - ee06 EZ-Connect 802.11g Adapter - ee13 EZ-Connect 802.11g Adapter -0708 Putercom Co., Ltd - 047e USB-1284 BRIDGE -0709 Silicon Systems, Ltd (SSL) -070a Oki Electric Industry Co., Ltd - 4002 Bluetooth Device - 4003 Bluetooth Device -070d Comoss Electronic Co., Ltd -070e Excel Cell Electronic Co., Ltd -0710 Connect Tech, Inc. - 0001 WhiteHeat (fake ID) - 8001 WhiteHeat -0711 Magic Control Technology Corp. - 0100 Hub - 0180 IRXpress Infrared Device - 0181 IRXpress Infrared Device - 0200 BAY-3U1S1P Serial Port - 0210 MCT1S Serial Port - 0230 MCT-232 Serial Port - 0231 PS/2 Mouse Port - 0232 Serial On Port - 0240 PS/2 to USB Converter - 0300 BAY-3U1S1P Parallel Port - 0302 Parallel Port - 0900 SVGA Adapter -0713 Interval Research Corp. -0714 NewMotion, Inc. - 0003 ADB to USB convertor -0717 ZNK Corp. -0718 Imation Corp. - 0002 SuperDisk 120MB - 0003 SuperDisk 120MB (Authenticated) - 0060 Flash Drive - 0061 Flash Drive - 0062 Flash Drive - 0063 Swivel Flash Drive - 0064 Flash Drive - 0065 Flash Drive - 0066 Flash Drive - 0067 Flash Drive - 0068 Flash Drive - 0084 USB Flash Drive Mini -0719 Tremon Enterprises Co., Ltd -071b Domain Technologies, Inc. - 0002 DTI-56362-USB Digital Interface Unit - 0101 Audio4-USB DSP Data Acquisition Unit - 0201 Audio4-5410 DSP Data Acquisition Unit - 0301 SB-USB JTAG Emulator -071c Xionics Document Technologies, Inc. -071d Eicon Networks Corp. - 1000 Diva ISDN TA - 1003 Diva - 2000 Teledat Surf -071e Ariston Technologies -0723 Centillium Communications Corp. - 0002 Palladia 300/400 Adsl Modem -0726 Vanguard International Semiconductor-America -0729 Amitm - 1000 USC-1000 Serial Port -072e Sunix Co., Ltd -072f Advanced Card Systems, Ltd - 0001 AC1030-based SmartCard Reader - 0008 ACR 80 Smart Card Reader - 1000 PLDT Drive - 1001 PLDT Drive - 8002 AET63 BioTRUSTKey - 8003 ACR120 - 8103 ACR120 - 9000 ACR38 AC1038-based Smart Card Reader - 90cc ACR38 SmartCard Reader - 90cf ACR38 SAM Smart Card Reader - 90d0 PertoSmart EMV - Card Reader -0731 Susteen, Inc. - 0528 SonyEricsson DCU-11 Cable -0732 Goldfull Electronics & Telecommunications Corp. -0733 ViewQuest Technologies, Inc. - 0101 Digital Video Camera - 0110 VQ110 - 0401 CS330 WebCam - 0402 M-318B WebCam - 0430 Intel Pro Share WebCam - 0630 VQ630 Dual Mode Digital Camera(Bulk) - 0631 Hercules Dualpix - 0780 Smart Cam Deluxe(composite) - 1310 Epsilon 1.3/Jenoptik JD C1.3/UMAX AstraPix 470 - 1311 Digital Dream Epsilon 1.3 - 2211 Jenoptik -0734 Lasat Communications A/S - 0001 560V Modem - 0002 Lasat 560V Modem - 043a DVS Audio -0735 Asuscom Network - 2100 ISDN Adapter - 2101 ISDN Adapter - 6694 ISDN Adapter - c541 ISDN TA 280 -0736 Lorom Industrial Co., Ltd -0738 Mad Catz, Inc. - 4507 XBox Device - 4516 XBox Device - 4520 XBox Device - 4526 XBox Device - 4536 XBox Device - 4540 XBox Device - 4556 XBox Device - 4566 XBox Device - 4576 XBox Device - 4586 XBox Device - 4588 XBox Device -073a Chaplet Systems, Inc. -073b Suncom Technologies -073d Eutron S.p.a. - 0005 Crypto Token - 0007 CryptoIdentity CCID - 0025 SmartKey 3 - 0c00 Pocket Reader - 0d00 StarSign Bio Token 3.0 EU -073c Industrial Electronic Engineers, Inc. - 0305 Pole Display (PC305-3415 2 x 20 Line Display) - 0322 Pole Display (PC322-3415 2 x 20 Line Display) - 0324 Pole Display (LB324-USB 4 x 20 Line Display) - 0330 Pole Display (P330-3415 2 x 20 Line Display) - 0450 Pole Display (L450-USB Graphic Line Display) - 0505 Pole Display (SPC505-3415 2 x 20 Line Display) - 0522 Pole Display (SPC522-3415 2 x 20 Line Display) - 0624 Pole Display (SP324-3415 2 x 20 Line Display) -073e NEC, Inc. - 0301 Game Pad -0745 Syntech Information Co., Ltd -0746 Onkyo Corp. - 5500 SE-U55 Audio Device -0747 Labway Corp. -0748 Strong Man Enterprise Co., Ltd -0749 EVer Electronics Corp. -074a Ming Fortune Industry Co., Ltd -074b Polestar Tech. Corp. -074c C-C-C Group PLC -074d Micronas GmbH - 3553 Composite USB-Device - 3554 Composite USB-Device - 3556 Composite USB-Device -074e Digital Stream Corp. - 0001 PS/2 Adapter - 0002 PS/2 Adapter -0755 Aureal Semiconductor -0757 Network Technologies, Inc. -075b Sophisticated Circuits, Inc. - 0001 Kick-off! Watchdog -0763 Midiman - 0115 KeyRig 25 - 0117 Trigger Finger - 0119 MidAir - 0150 M-Audio Uno - 0160 M-Audio 1x1 - 0192 M-Audio Keystation 88es - 0193 ProKeys 88 - 0194 ProKeys 88sx - 0195 Oxygen 8 v2 - 0196 Oxygen 49 - 0197 Oxygen 61 - 0198 Axiom 25 - 0199 Axiom 49 - 019a Axiom 61 - 019b KeyRig 49 - 019c KeyStudio - 1001 MidiSport 2x2 - 1002 MidiSport 2x2 - 1003 MidiSport 2x2 - 1010 MidiSport 1x1 - 1011 MidiSport 1x1 - 1014 M-Audio Keystation Loader - 1015 M-Audio Keystation - 1020 Midisport 4x4 - 1021 MidiSport 4x4 - 1030 Midisport 8x8 - 1031 MidiSport 8x8/s Loader - 1033 MidiSport 8x8/s - 1040 M-Audio MidiSport 2x4 Loader - 1041 M-Audio MidiSport 2x4 - 2001 M Audio Quattro - 2002 M Audio Duo - 2003 M Audio AudioPhile - 2004 M-Audio MobilePre - 2006 M-Audio Transit - 2007 M-Audio Sonica Theater - 2008 M-Audio Ozone - 200d M-Audio OmniStudio - 200f M-Audio MobilePre - 2010 M-Audio Fast Track - 2013 M-Audio JamLab - 2015 M-Audio RunTime DFU - 2016 M-Audio RunTime DFU - 2019 M-Audio Ozone Academic - 201a M-Audio Micro - 201b M-Audio RunTime DFU - 201d M-Audio Producer - 2080 M-Audio RunTime DFU - 2081 M-Audio RunTime DFU - 2803 M-Audio Audiophile DFU - 2804 M-Audio MobilePre DFU - 2806 M-Audio Transit DFU - 2815 M-Audio DFU - 2816 M-Audio DFU - 281b M-Audio DFU - 2880 M-Audio DFU - 2881 M-Audio DFU -0764 Cyber Power System, Inc. - 0005 Cyber Power UPS - 0501 CP1500 AVR UPS -0765 X-Rite, Inc. -0766 Jess-Link Products Co., Ltd -0767 Tokheim Corp. -0768 Camtel Technology Corp. - 0006 Camtel Technology USB TV Genie Pro FM Model TVB330 - 0023 eHome Infrared Receiver -0769 Surecom Technology Corp. - 11f2 EP-9001-g 802.11g 54M WLAN Adapter - 11f3 RT2570 - 11f7 802.11g 54M WLAN Adapter - 31f3 RT2573 -076a Smart Technology Enablers, Inc. -076b OmniKey AG - 0596 CardMan 2020 - 1021 CardMan 1021 - 1221 CardMan 1221 - 1784 CardMan 6020 - 3021 CardMan 3121 - 3610 CardMan 3620 - 3621 CardMan 3621 - 3821 CardMan 3821 - 4321 CardMan 4321 - 5121 CardMan 5121 - 5125 CardMan 5125 - 6622 CardMan 6121 - a011 CCID Smart Card Reader Keyboard - a021 CCID Smart Card Reader - a022 CardMan Smart@Link - c000 CardMan 3x21 CS - c001 CardMan 5121 CS -076c Partner Tech -076d Denso Corp. -076e Kuan Tech Enterprise Co., Ltd -076f Jhen Vei Electronic Co., Ltd -0770 Welch Allyn, Inc - Medical Division -0774 AmTRAN Technology Co., Ltd -0775 Longshine Electronics Corp. -0776 Inalways Corp. -0777 Comda Enterprise Corp. -0778 Volex, Inc. -0779 Fairchild Semiconductor -077a Sankyo Seiki Mfg. Co., Ltd -077b Linksys - 08be BEFCMU10 v4 Cable Modem - 2219 WUSB11 V2.6 802.11b Adapter - 2226 USB200M 100baseTX Adapter -077c Forward Electronics Co., Ltd - 0005 NEC Keyboard -077d Griffin Technology - 0223 IMic Audio In/Out - 0405 iMate, ADB Adapter - 0410 PowerMate - 041a PowerWave - 07af iMic - 627a Radio SHARK -077f Well Excellent & Most Corp. -0781 SanDisk Corp. - 0001 SDDR-05a ImageMate CompactFlash Reader - 0002 SDDR-31 ImageMate II CompactFlash Reader - 0005 SDDR-05b (CF II) ImageMate CompactFlash Reader - 0100 ImageMate SDDR-12 - 0200 SDDR-09 (SSFDC) ImageMate SmartMedia Reader [eusb] - 0400 SecureMate SD/MMC Reader - 0621 SDDR-86 Imagemate 6-in-1 Reader - 0720 Sansa C200 series in recovery mode - 0729 Sansa E200 series in recovery mode - 0810 SDDR-75 ImageMate CF-SM Reader - 0830 ImageMate CF/MMC/SD Reader - 1234 Cruzer Mini Flash Drive - 5150 SDCZ2 Cruzer Mini Flash Drive (thin) - 5151 Cruzer Micro 256/512MB Flash Drive - 5153 Cruzer USB-Flash-Drive - 5406 Cruzer Micro 1/4GB Flash Drive - 5408 Cruzer Titanium U3 - 6100 Ultra II SD Plus 2GB - 7100 Cruzer Mini - 7101 Pen Flash - 7102 Cruzer Mini - 7103 Cruzer Mini - 7104 Cruzer Micro Mini 256MB Flash Drive - 7105 Cruzer Mini - 7106 Cruzer Mini - 7112 Cruzer Micro 128MB Flash Drive - 7113 Cruzer Micro 256MB Flash Drive - 7114 Cruzer Mini - 7115 Cruzer Mini - 7420 Sansa E200 series (mtp) - 7421 Sansa E200 series - 7432 Sansa Clip (mtp) - 7433 Sansa Clip (msc) - 7450 Sansa C250 - 7451 Sansa C240 - 7480 Sansa Connect - 7481 Sansa Connect (in recovery mode) - 8181 Pen Flash - 8183 Hi-Speed Mass Storage Device - 8185 SDCZ2 Cruzer Mini Flash Drive (older, thick) - 8888 Card Reader - 8889 SDDR-88 Imagemate 8-in-1 Reader - 8919 Card Reader - 8989 ImageMate 12-in-1 Reader - 9191 ImageMate CF - 9219 Card Reader - 9292 ImageMate CF Reader/Writer - 9393 ImageMate SD-MMC - 9595 ImageMate xD-SM - 9797 ImageMate MS-PRO - 9919 Card Reader - 9999 SDDR-99 5-in-1 Reader - a7e8 SDDR-113 MicroMate SDHC Reader - b2b3 SDDR-103 MobileMate SD+ Reader -0782 Trackerball -0783 C3PO - 0003 LTC31 SmartCard Reader -0784 Vivitar, Inc. - 0100 Vivicam 2655 - 1310 Vivicam 3305 - 1688 Vivicam 3665 - 1689 Gateway DC-M42/Labtec DC-505/Vivitar Vivicam 3705 - 2620 AOL Photocam Plus - 2888 Polaroid DC700 - 3330 Nytec ND-3200 Camera - 4300 Traveler D1 - 5260 Werlisa Sport PX 100 / JVC GC-A33 Camera - 5300 Pretec dc530 -0785 NTT-ME - 0001 MN128mini-V ISDN TA - 0003 MN128mini-J ISDN TA -0789 Logitec Corp. - 0026 LHD Device - 0033 DVD Multi-plus unit LDR-H443SU2 - 0063 LDR Device - 0064 LDR-R Device - 00b3 DVD Multi-plus unit LDR-H443U2 - 010c Realtek RTL8187 Wireless 802.11g 54Mbps Network Adapter -078b Happ Controls, Inc. - 0010 Driving UGCI - 0020 Flying UGCI - 0030 Fighting UGCI -078c GTCO/CalComp - 0400 Digitizer (Whiteboard) -078e Brincom, Inc. -0790 Pro-Image Manufacturing Co., Ltd -0791 Copartner Wire and Cable Mfg. Corp. -0792 Axis Communications AB -0793 Wha Yu Industrial Co., Ltd -0794 ABL Electronics Corp. -0795 RealChip, Inc. -0796 Certicom Corp. -0797 Grandtech Semiconductor Corp. - 6801 Flatbed Scanner - 6802 InkJet Color Printer - 8001 SmartCam - 801a Typhoon StyloCam - 801c Meade Binoculars/Camera - 8901 ScanHex SX-35a - 8909 ScanHex SX-35b - 8911 ScanHex SX-35c -0798 Optelec - 0001 Braille Voyager -079b Sagem - 0027 USB-Serial Controller - 004a XG-760A - 004b Wi-Fi 11g adapter - 0056 Agfa AP1100 Photo Printer - 0062 XG-76NA -079d Alfadata Computer Corp. - 0201 GamePort Adapter -07a1 Digicom S.p.A. - d952 Palladio USB V.92 Modem -07a2 National Technical Systems -07a3 Onnto Corp. -07a4 Be, Inc. -07a6 ADMtek, Inc. - 07c2 AN986A Ethernet - 0986 AN986 Pegasus Ethernet - 8266 Infineon WildCard-USB Wireless LAN Adapter - 8511 ADM8511 Pegasus II Ethernet - 8513 AN8513 Ethernet - 8515 AN8515 Ethernet -07aa Corega K.K. - 0001 Ether USB-T Ethernet [klsi] - 0004 FEther USB-TX Ethernet [pegasus] - 000c WirelessLAN USB-11 - 000d FEther USB-TXS - 0012 Stick-11 802.11b Adapter - 0017 FEther USB2-TX - 001a ULUSB-11 Key - 002f CG-WLUSB2GNL - 7613 Stick-11 V2 802.11b Adapter - 9601 FEther USB-TXC -07ab Freecom Technologies - fc01 IDE bridge - fc02 Cable II USB-2 - fc03 USB2-IDE IDE bridge - fcf8 Freecom Classic SL Network Drive -07af Microtech - 0004 SCSI-DB25 SCSI Bridge [shuttle] - 0005 SCSI-HD50 SCSI Bridge [shuttle] - 0006 CameraMate SmartMedia and CompactFlash Card Reader [eusb/shuttle] - fc01 Freecom USB-IDE -07b0 Trust Technologies - 0001 ISDN TA - 0002 ISDN TA128 Plus - 0003 ISDN TA128 Deluxe - 0005 ISDN TA128 SE - 0006 ISDN TA128 CE - 0007 ISDN TA - 0008 ISDN TA -07b1 IMP, Inc. -07b2 Motorola BCS, Inc. - 0100 SURFboard Voice over IP Cable Modem - 0900 SURFboard Gateway - 0950 SURFboard SBG950 Gateway - 1000 SURFboard SBG1000 Gateway - 4100 SurfBoard SB4100 Cable Modem - 4200 SurfBoard SB4200 Cable Modem - 4210 SurfBoard 4210 Cable Modem - 4220 SURFboard SB4220 Cable Modem - 4500 CG4500 Communications Gateway - 450b CG4501 Communications Gateway - 450e CG4500E Communications Gateway - 5100 SurfBoard SB5100 Cable Modem - 5101 SurfBoard SB5101 Cable Modem - 5120 SurfBoard SB5120 Cable Modem (RNDIS) - 7030 Wireless Adapter WU830G -07b3 Plustek, Inc. - 0001 OpticPro 1212U Scanner - 0003 Scanner - 0010 OpticPro U12 Scanner - 0011 OpticPro U24 Scanner - 0013 OpticPro UT12 Scanner - 0014 Scanner - 0015 OpticPro U24 Scanner - 0017 OpticPro UT12/16/24 Scanner - 0204 Scanner - 0400 OpticPro 1248U Scanner - 0401 OpticPro 1248U Scanner #2 - 0403 OpticPro U16B Scanner - 0404 Scanner - 0405 A8 Namecard-s Controller - 0406 A8 Namecard-D Controller - 0410 Scanner - 0412 Scanner - 0800 OpticPro ST48 Scanner - 0c03 OpticPro ST64+ Scanner -07b4 Olympus Optical Co., Ltd - 0100 Camedia C-2100/C-3000 Ultra Zoom Camera - 0102 Camedia E-10/C-220/C-50 Camera - 0105 Camedia C-310Z/C-700/C-750UZ/C-755/C-765UZ/C-3040/C-4000/C-5050Z/D-560/C-3020Z Zoom Camera - 0109 C-370Z/D-535Z/X-450 - 0112 MAUSB-100 xD Card Reader - 0113 Mju 500 - 0114 C-350Z Camera - 0118 Mju Mini Digital/Mju Digital 500 Camera - 0184 P-S100 port - 0203 Digital Voice Recorder DW-90 - 0206 Digital Voice Recorder DS-330 - 0207 Digital Voice Recorder & Camera W-10 - 0209 Digital Voice Recorder DM-20 - 020d Digital Voice Recorder VN-240PC -07b5 Mega World International, Ltd - 0017 Joystick - 0213 Thrustmaster Firestorm Digital 3 Gamepad - 9902 GamePad -07b6 Marubun Corp. -07b7 TIME Interconnect, Ltd -07b8 D-Link Corp. - 110c XX1 - 1201 IEEE 802.11b Adapter - 200c XX2 - 2573 Wireless LAN Card - 4000 DU-E10 Ethernet [klsi] - 4002 DU-E100 Ethernet [pegasus] - 4003 1/10/100 Ethernet Adapter - 4004 XX4 - 4007 XX5 - 400b XX6 - 400c XX7 - 401a RTL8151 - 4102 USB 1.1 10/100M Fast Ethernet Adapter - 4104 XX9 - 420a UF200 Ethernet - 6001 WL54 - a001 Wireless Network Adapter - abc1 DU-E10 Ethernet [pegasus] - b000 BWU613 - b02a AboCom Bluetooth Device - b02b Bluetooth dongle - b02c BCM92045DG-Flash with trace filter - b02d BCM92045DG-Flash with trace filter - b02e BCM92045DG-Flash with trace filter - b030 BCM92045DG-Flash with trace filter - b031 BCM92045DG-Flash with trace filter - b032 BCM92045DG-Flash with trace filter - b033 BCM92045DG-Flash with trace filter - b21a 802.11g Wireless Adapter - b21b HWU54DM - b21c RT2573 - b21d RT2573 - b21e RT2573 - b21f WUG2700 - d011 MP3 Player - e001 Mass Storage Device - e002 Mass Storage Device - e003 Mass Storage Device - e004 Mass Storage Device - e005 Mass Storage Device - e006 Mass Storage Device - e007 Mass Storage Device - e008 Mass Storage Device - e009 Mass Storage Device - e00a Mass Storage Device - e4f0 Card Reader Driver - f101 DSB-560 Modem [atlas] -07bc Canon Computer Systems, Inc. -07bd Webgear, Inc. -07be Veridicom -07c0 Code Mercenaries Hard- und Software GmbH - 1121 The Claw - 1500 IO-Warrior 40 - 1501 IO-Warrior 24 - 1502 IO-Warrior 48 - 1503 IO-Warrior 28 -07c1 Keisokugiken - 0068 HKS-0200 USBDAQ -07c4 Datafab Systems, Inc. - 0102 USB to LS120 - 0103 USB to IDE - 1234 USB to ATAPI - a000 CompactFlash Card Reader - a001 CompactFlash & SmartMedia Card Reader [eusb] - a002 Disk Drive - a003 Datafab-based Reader - a004 USB to MMC Class Drive - a005 CompactFlash & SmartMedia Card Reader - a006 SmartMedia Card Reader - a007 Memory Stick Class Drive - a103 MDSM-B reader - a107 USB to Memory Stick (LC1) Drive - a109 LC1 CompactFlash & SmartMedia Card Reader - a10b USB to CF+MS(LC1) - a200 DF-UT-06 Hama MMC/SD Reader - a400 CompactFlash & Microdrive Reader - a600 Card Reader - ad01 Mass Storage Device - ae01 Mass Storage Device - af01 Mass Storage Device - b000 USB to CF(LC1) - b001 USB to CF+PCMCIA - b004 MMC/SD Reader - b006 USB to PCMCIA - b00a USB to CF+SD Drive(LC1) - b00b USB to Memory Stick(LC1) -07c5 APG Cash Drawer -07c6 ShareWave, Inc. -07c7 Powertech Industrial Co., Ltd -07c8 B.U.G., Inc. - 0202 MN128-SOHO PAL -07c9 Allied Telesyn International - b100 AT-USB100 -07ca AVerMedia Technologies, Inc. - 0002 AVerTV PVR USB/EZMaker Pro Device - 0026 AVerTV - 1228 MPEG-2 Capture Device (M038) - e880 MPEG-2 Capture Device (E880) - e882 MPEG-2 Capture Device (E882) -07cb Kingmax Technology, Inc. -07cc Carry Computer Eng., Co., Ltd - 0000 CF Card Reader - 0001 Reader (UICSE) - 0002 Reader (UIS) - 0003 SM Card Reader - 0004 SM/CF/PCMCIA Card Reader - 0005 Reader (UISA2SE) - 0006 SM/CF/PCMCIA Card Reader - 0007 Reader (UISA6SE) - 000c SM/CF Card Reader - 000d SM/CF Card Reader - 000e Reader (UISDA) - 000f Reader (UICLIK) - 0010 Reader (UISMA) - 0012 Reader (UISC6SE-FLASH) - 0014 Litronic Fortezza Reader - 0030 Mass Storage (UISDMC12S) - 0040 Mass Storage (UISDMC13S) - 0100 Reader (UID) - 0101 Reader (UIM) - 0102 Reader (UISDMA) - 0103 Reader (UISDMC) - 0104 Reader (UISDM) - 0200 6-in-1 Card Reader - 0201 Mass Storage (UISDMC1S & UISDMC3S) - 0202 Mass Storage (UISDMC5S) - 0203 Mass Storage (UISMC5S) - 0204 Mass Storage (UIM4/5S & UIM7S) - 0205 Mass Storage (UIS4/5S & UIS7S) - 0206 Mass Storage (UISDMC10S & UISDMC11S) - 0207 Mass Storage (UPIDMA) - 0208 Mass Storage (UCFC II) - 0210 Mass Storage (UPIXXA) - 0213 Mass Storage (UPIDA) - 0214 Mass Storage (UPIMA) - 0215 Mass Storage (UPISA) - 0217 Mass Storage (UPISDMA) - 0223 Mass Storage (UCIDA) - 0224 Mass Storage (UCIMA) - 0225 Mass Storage (UIS7S) - 0227 Mass Storage (UCIDMA) - 0234 Mass Storage (UIM7S) - 0235 Mass Storage (UIS4S-S) - 0237 Velper (UISDMC4S) - 0300 6-in-1 Card Reader - 0301 6-in-1 Card Reader - 0303 Mass Storage (UID10W) - 0304 Mass Storage (UIM10W) - 0305 Mass Storage (UIS10W) - 0308 Mass Storage (UIC10W) - 0309 Mass Storage (UISC3W) - 0310 Mass Storage (UISDMA2W) - 0311 Mass Storage (UISDMC14W) - 0320 Mass Storage (UISDMC4W) - 0321 Mass Storage (UISDMC37W) - 0330 WINTERREADER Reader - 0350 9-in-1 Card Reader - 0500 Mass Storage - 0501 Mass Storage -07cd Elektor - 0001 USBuart Serial Port -07cf Casio Computer Co., Ltd - 1001 QV-8000SX/5700/3000EX Digicam; Exilim EX-M20 - 1003 Exilim EX-S500 - 1004 Exilim EX-Z120 - 1011 USB-CASIO PC CAMERA - 2002 E-125 Cassiopeia Pocket PC - 3801 WMP-1 MP3-Watch - 4001 Label Printer KL-P1000 - 4007 CW50 Device - 4104 Cw75 Device - 4107 CW-L300 Device - 4500 LV-20 Digital Camera - 6801 PL-40R - 6802 MIDI Keyboard -07d0 Dazzle - 0001 Digital Video Creator I - 0002 Global Village VideoFX Grabber - 0003 Fusion Model DVC-50 Rev 1 (NTSC) - 0004 DVC-800 (PAL) Grabber - 0005 Fusion Video and Audio Ports - 0006 DVC 150 Loader Device - 0007 DVC 150 - 0327 Fusion Digital Media Reader - 1001 DM-FLEX DFU Adapter - 1002 DMHS2 DFU Adapter - 1102 CF Reader/Writer - 1103 SD Reader/Writer - 1104 SM Reader/Writer - 1105 MS Reader/Writer - 1106 xD/SM Reader/Writer - 1202 MultiSlot Reader/Writer - 2000 FX2 DFU Adapter - 2001 eUSB CompactFlash Reader - 4100 Kingsun SF-620 Infrared Adapter - 4959 Kingsun KS-959 Infrared Adapter -07d1 D-Link System - 13ec VvBus for Helium 2xx - 13ed VvBus for Helium 2xx - 13f1 DSL-302G Modem - 13f2 DSL-502G Router - 3a07 WUA-2340 Adapter - 3a08 predator Bootloader Download - 3a0d DWA-120 Wireless 108G Adapter - 3b01 AirPlus G DWL-G122 Wireless Adapter - 3b10 RangeBooster N Adapter - 3b11 Wireless N Adapter DWA-130 - 3c03 DWL-G122 802.11g Adapter [ralink rt73] - 3c04 WUA-1340 - 3c05 EH103 Wireless G Adapter - 3c07 Wireless G DWA-110 Adapter - 3c09 DWA-140 802.11n Adapter [ralink rt2870] - 5100 Remote NDIS Device - f101 DBT-122 Bluetooth - fc01 DBT-120 Bluetooth Adapter -07d2 Aptio Products, Inc. -07d3 Cyberdata Corp. -07d7 GCC Technologies, Inc. -07da Arasan Chip Systems -07de Diamond Multimedia - 2820 VC500 Video Capture Dongle -07df David Electronics Co., Ltd -07e1 Ambient Technologies, Inc. - 5201 V.90 Modem -07e2 Elmeg GmbH & Co., Ltd -07e3 Planex Communications, Inc. -07e4 Movado Enterprise Co., Ltd - 0967 SCard R/W CSR-145 - 0968 SCard R/W CSR-145 -07e5 QPS, Inc. - 05c2 IDE-to-USB2.0 PCA - 5c01 Que! CDRW -07e6 Allied Cable Corp. -07e7 Mirvo Toys, Inc. -07e8 Labsystems -07ea Iwatsu Electric Co., Ltd -07eb Double-H Technology Co., Ltd -07ec Taiyo Electric Wire & Cable Co., Ltd -07ee Torex Retail (formerly Logware) - 0002 Cash Drawer I/F -07ef STSN - 0001 Internet Access Device -07f6 Circuit Assembly Corp. -07f7 Century Corp. - 0005 ScanLogic/Century Corporation uATA - 011e Century USB Disk Enclosure -07f9 Dotop Technology, Inc. -07fa Draytek - 0778 miniVigor 128 ISDN TA - 1012 BeWAN ADSL USB ST (grey) - a904 BeWAN ADSL - a905 BeWAN ADSL ST -07fd Mark of the Unicorn - 0000 FastLane MIDI Interface - 0001 FastLane Quad MIDI Interface - 0002 MOTU Audio for 64 bit -0801 Mag-Tek - 0002 Mini Swipe Reader -0802 Mako Technologies, LLC -0803 Zoom Telephonics, Inc. - 1300 V92 Faxmodem - 4310 Wireless-G - 5241 Cable Modem - 5551 DSL Modem - 9700 2986L FaxModem - 9800 Cable Modem - a312 Wireless-G -0809 Genicom Technology, Inc. -080a Evermuch Technology Co., Ltd -080c Datalogic S.p.A. - 0300 Gryphon D120 Barcode Scanner - 0400 Gryphon D120 Barcode Scanner - 0500 Gryphon D120 Barcode Scanner - 0600 Gryphon M100 Barcode Scanner -080d Teco Image Systems Co., Ltd - 0102 Hercules Scan@home 48 - 0104 3.2Slim - 0110 UMAX AstraSlim 1200 Scanner -0810 Personal Communication Systems, Inc. -0813 Mattel, Inc. - 0001 Intel Play QX3 Microscope - 0002 Dual Mode Camera Plus -081a MG Logic - 1000 Duo Pen Tablet -081b Indigita Corp. - 0600 Storage Adapter - 0601 Storage Adapter -081c Mipsys -081e AlphaSmart, Inc. - df00 Handheld -0822 Reudo Corp. - 2001 IRXpress Infrared Device -0825 GC Protronics -0826 Data Transit -0827 BroadLogic, Inc. -0828 Sato Corp. -0829 DirecTV Broadband, Inc. (Telocity) -082d Handspring - 0100 Visor - 0200 Treo - 0300 Treo 600 - 0400 Handheld - 0500 Handheld - 0600 Handheld -0830 Palm, Inc. - 0001 m500 - 0002 m505 - 0003 m515 - 0004 Handheld - 0005 Handheld - 0006 Handheld - 0010 Handheld - 0011 Handheld - 0012 Handheld - 0013 Handheld - 0014 Handheld - 0020 i705 - 0021 Handheld - 0022 Handheld - 0023 Handheld - 0024 Handheld - 0030 Handheld - 0031 Tungsten W - 0032 Handheld - 0033 Handheld - 0034 Handheld - 0040 m125 - 0041 Handheld - 0042 Handheld - 0043 Handheld - 0044 Handheld - 0050 m130 - 0051 Handheld - 0052 Handheld - 0053 Handheld - 0054 Handheld - 0060 Tungsten C/E/T/T2/T3 / Zire 71 - 0061 Lifedrive / Treo 650/680 / Tunsten E2/T5/TX / Zire 21/31/72 / Z22 - 0062 Handheld - 0063 Handheld - 0064 Handheld - 0070 Zire - 0071 Handheld - 0072 Handheld - 0080 Serial Adapter [for Palm III] - 0081 Handheld - 0082 Handheld -0832 Kouwell Electronics Corp. - 5850 Cable -0833 Sourcenext Corp. - 012e KeikaiDenwa 8 with charger - 039f KeikaiDenwa 8 -0835 Action Star Enterprise Co., Ltd -0839 Samsung Techwin Co., Ltd - 0005 Digimax Camera - 0008 Digimax 230 Camera - 0009 Digimax 340 - 000a Digimax 410 - 000e Digimax 360 - 0010 Digimax 300 - 1003 Digimax 210SE - 1005 Digimax 220 - 1009 Digimax V4 - 1012 6500 Document Camera - 1058 S730 Camera - 1542 Digimax 50 Duo - 3000 Digimax 35 MP3 -083a Accton Technology Corp. - 1046 10/100 Ethernet [pegasus] - 1060 HomeLine Adapter - 1f4d SMC8013WG Broadband Remote NDIS Device - 3046 10/100 Series Adapter - 3060 1/10/100 Adapter - 3501 2664W - 3502 WN3501D Wireless Adapter - 3503 T-Sinus 111 Wireless Adapter - 4501 T-Sinus 154data - 4505 SMCWUSB-G - 5046 SpeedStream 10/100 Ethernet [pegasus] - 5501 Wireless Adapter 11g - 6500 Cable Modem - 6618 802.11n Wireless Adapter - 7522 802.11N Wireless Adapter - a618 SMC EZ Connect N Draft 11n Wireless Adapter - b004 CPWUE001 USB/Ethernet Adapter - b522 EZ Connect N Draft 11n Wireless USB2.0 Adapter - bb01 BlueExpert Bluetooth Device - c003 802.11b Wireless Adapter - c501 Zoom Wireless-G - c561 802.11a/g Wireless Adapter - e501 ZD1211B - f501 802.11g Wireless Adapter - f502 802.11g Wireless Adapter -083f Global Village - b100 TelePort V.90 Fax/Modem -0840 Argosy Research, Inc. - 0060 Storage Adapter Bridge Module -0841 Rioport.com, Inc. - 0001 Rio 500 -0844 Welland Industrial Co., Ltd -0846 NetGear, Inc. - 1001 EA101 Ethernet [klsi] - 1002 Ethernet - 1020 Ethernet 10/100, USB1.1 - 1040 USB 2.0 Ethernet - 4110 MA111 WiFi (v1) - 4200 WG121 WiFi (v1) - 4210 WG121 WiFi (v2) - 4220 WG111 WiFi (v1) - 4230 MA111 WiFi (v2) - 4240 WG111 WiFi (v2) - 4260 WG111v3 802.11g Adapter [realtek RTL8187B] - 4300 WG111U - 4301 WG111U (no firmware) - 6a00 WG111 WiFi (v2) - 7100 WN121T Wireless Adapter - 9000 RangeMax NEXT Wireless-N Adapter WN111 - a001 PA101 Phoneline10X Adapter -084d Minton Optic Industry Co., Inc. - 0001 Jenoptik JD800i - 0003 S-Cam F5 Digital Camera - 0011 Argus DC3500 Digital Camera - 0014 Praktica DC 32 - 0019 Praktica DPix3000 - 0025 Praktica DC 60 - 1001 ScanHex SX-35d -084e KB Gear - 0001 KBGear JamCam - 1002 Pablo Tablet -084f Empeg - 0001 Empeg-Car Mark I/II Player -0850 Fast Point Technologies, Inc. -0851 Macronix International Co., Ltd - 1542 SiPix Blink - 1543 Maxell WS30 Slim Digital Camera - a168 MXIC -0852 CSEM -0853 Topre Corporation - 0100 HHKB Professional -0854 ActiveWire, Inc. - 0100 I/O Board - 0101 I/O Board, rev1 -0856 B&B Electronics - ac01 uLinks USOTL4 RS422/485 Adapter -0858 Hitachi Maxell, Ltd - 3102 Bluetooth Device - ffff Maxell module with BlueCore in DFU mode -0859 Minolta Systems Laboratory, Inc. -085a Xircom - 0001 Portstation Dual Serial Port - 0003 Portstation Paraller Port - 0008 Ethernet - 0009 Ethernet - 000b Portstation Dual PS/2 Port - 0021 1 port to Serial Converter - 0022 Parallel Port - 0023 2 port to Serial Converter - 0024 Parallel Port - 0027 1 port to Serial Converter - 0028 PortGear to SCSI Converter - 0032 PortStation SCSI Module - 003c Bluetooth Adapter - 0299 Colorvision, Inc. Monitor Spyder - 8021 1 port to Serial - 8023 2 port to Serial - 8027 PGSDB9 Serial Port -085c ColorVision, Inc. - 0200 Monitor Spyder -0862 Teletrol Systems, Inc. -0863 Filanet Corp. -0864 NetGear, Inc. - 4100 MA101 802.11b Adapter - 4102 MA101 802.11b Adapter -0867 Data Translation, Inc. - 9812 ECON Data acquisition unit - 9816 DT9816 ECON data acquisition module - 9836 DT9836 data acquisition card -086a Emagic Soft- und Hardware GmbH - 0001 Unitor8 - 0002 AMT8 - 0003 MT4 -086c DeTeWe - Deutsche Telephonwerke AG & Co. - 1001 Eumex 504PC ISDN TA - 1002 Eumex 504PC (FlashLoad) - 1003 TA33 ISDN TA - 1004 TA33 (FlashLoad) - 1005 Eumex 604PC HomeNet - 1006 Eumex 604PC HomeNet (FlashLoad) - 1007 Eumex 704PC DSL - 1008 Eumex 704PC DSL (FlashLoad) - 1009 Eumex 724PC DSL - 100a Eumex 724PC DSL (FlashLoad) - 100b OpenCom 30 - 100c OpenCom 30 (FlashLoad) - 100d BeeTel Home 100 - 100e BeeTel Home 100 (FlashLoad) - 1011 USB2DECT - 1012 USB2DECT (FlashLoad) - 1013 Eumex 704PC LAN - 1014 Eumex 704PC LAN (FlashLoad) - 1021 OpenCom 40 - 1022 OpenCom 40 (FlashLoad) - 1023 OpenCom 45 - 1024 OpenCom 45 (FlashLoad) - 1025 Sinus 61 data - 1029 dect BOX - 102c Eumex 604PC HomeNet [FlashLoad] - 1030 Eumex 704PC DSL [FlashLoad] - 1032 OpenCom 40 [FlashLoad] - 1033 OpenCom 30 plus - 1034 OpenCom 30 plus (FlashLoad) - 1055 Eumex 220 ISDN TA - 2000 OpenCom 1000 -086e System TALKS, Inc. - 1920 SGC-X2UL -086f MEC IMEX, Inc. -0870 Metricom - 0001 Ricochet GS -0871 SanDisk, Inc. - 0001 SDDR-01 Compact Flash Reader - 0002 SDDR-31 Compact Flash Reader - 0005 SDDR-05 Compact Flash Reader -0873 Xpeed, Inc. -0874 A-Tec Subsystem, Inc. -0879 Comtrol Corp. -087c Adesso/Kbtek America, Inc. -087d Jaton Corp. - 5704 Ethernet -087e Fujitsu Computer Products of America -087f Virtual IP Group, Inc. -0880 APT Technologies, Inc. -0883 Recording Industry Association of America (RIAA) -0885 Boca Research, Inc. -0886 XAC Automation Corp. - 0630 Intel PC Camera CS630 -0887 Hannstar Electronics Corp. -088b MassWorks, Inc. - 4944 MassWorks ID-75 TouchScreen -0892 DioGraphy, Inc. - 0101 Smartdio Reader/Writer -089c United Technologies Research Cntr. -089d Icron Technologies Corp. -089e NST Co., Ltd -089f Primex Aerospace Co. -08a5 e9, Inc. -08a8 Andrea Electronics -08ae Macally (Mace Group, Inc.) -08b4 Sorenson Vision, Inc. -08b8 J. Gordon Electronic Design, Inc. - 01f4 USBSIMM1 -08b9 RadioShack Corp. (Tandy) -08bb Texas Instruments Japan - 2702 Speakers - 2900 PCM2900 Audio Codec - 2904 PCM2904 Audio Codec -08bd Citizen Watch Co., Ltd - 1100 X1-USB Floppy -08c3 Precise Biometrics - 0001 100 SC - 0002 100 A - 0003 100 SC BioKeyboard - 0006 100 A BioKeyboard - 0100 100 MC ISP - 0101 100 MC FingerPrint and SmartCard Reader - 0300 100 AX - 0400 100 SC - 0401 150 MC - 0402 200 MC FingerPrint and SmartCard Reader - 0404 100 SC Upgrade - 0405 150 MC Upgrade - 0406 100 MC Upgrade -08c4 Proxim, Inc. - 02f2 Farallon Home Phoneline Adapter -08c7 Key Nice Enterprise Co., Ltd -08c8 2Wire, Inc. -08c9 Nippon Telegraph and Telephone Corp. -08ca Aiptek International, Inc. - 0010 Tablet - 0020 APT-6000U Tablet - 0021 APT-2 Tablet - 0022 Tablet - 0023 Tablet - 0024 Tablet - 0100 Pen Drive - 0102 DualCam - 0103 Pocket DV Digital Camera - 0104 Pocket DVII - 0105 Mega DV(Disk) - 0106 Pocket DV3100+ - 0107 Pocket DV 3100 - 0109 Nisis DV4 Digital Camera - 010a Trust 738AV LCD PV Mass Storage - 0111 PenCam VGA Plus - 2008 Mini PenCam 2 - 2010 Pocket CAM 3 Mega (webcam) - 2011 Pocket CAM 3 Mega (storage) - 2018 Pencam SD 2 - 2024 Pocket DV3500 - 2042 DV 5100M Composite Device - 2043 DV 5100M(Disk) -08cd Jue Hsun Ind. Corp. -08ce Long Well Electronics Corp. -08cf Productivity Enhancement Products -08d1 smartBridges, Inc. - 0001 smartNIC Ethernet [catc] - 0003 smartNIC 2 PnP Ethernet -08d3 Virtual Ink -08d4 Fujitsu Siemens Computers - 0009 SCR SmartCard Reader -08d9 Increment P Corp. -08dd Billionton Systems, Inc. - 0112 Wireless LAN Adapter - 0113 Wireless LAN Adapter - 0986 USB-100N Ethernet [pegasus] - 0987 USBLP-100 HomePNA Ethernet [pegasus] - 0988 USBEL-100 Ethernet [pegasus] - 1986 10/100 LAN Adapter - 2103 DVB-T TV-Tuner Card-R - 8511 USBE-100 Ethernet [pegasus2] - 90ff USB2AR Ethernet -08de ??? - 7a01 802.11b Adapter -08df Spyrus, Inc. - 0001 Rosetta Token V1 - 0002 Rosetta Token V2 - 0003 Rosetta Token V3 - 0a00 Lynks Interface -08e3 Olitec, Inc. - 0002 USB-RS232 Bridge - 0100 Interface ADSL - 0101 Interface ADSL - 0102 ADSL - 0301 RNIS -08e4 Pioneer Corp. -08e5 Litronic -08e6 Gemplus - 0001 GemPC-Touch 430 - 0430 GemPC430 SmartCard Reader - 0432 GemPC432 SmartCard Reader - 0435 GemPC435 SmartCard Reader - 0437 GemPC433 SL SmartCard Reader - 1359 UA SECURE STORAGE TOKEN - 2202 Gem e-Seal Pro Token - 3437 GemPC Twin SmartCard Reader - 3438 GemPC Key SmartCard Reader - 3478 PinPad Smart Card Reader - 4433 GemPC433-Swap - 5501 GemProx-PU Contactless Smart Card Reader - ace0 UA HYBRID TOKEN -08e7 Pan-International Wire & Cable -08e8 Integrated Memory Logic -08e9 Extended Systems, Inc. - 0100 XTNDAccess IrDA Dongle -08ea Ericsson, Inc., Blue Ridge Labs - 00c9 ADSL Modem HM120dp Loader - 00ca ADSL WAN Modem HM120dp - 00ce HM230d Virtual Bus for Helium - abba USB Driver for Bluetooth Wireless Technology - abbb Bluetooth Device in DFU State -08ec M-Systems Flash Disk Pioneers - 0001 TravelDrive 2C - 0002 TravelDrive 2C - 0005 TravelDrive 2C - 0008 TravelDrive 2C - 0010 DiskOnKey - 0011 DiskOnKey - 0012 TravelDrive 2C - 0014 TravelDrive 2C - 0015 Kingston DataTraveler ELITE - 0016 Kingston DataTraveler U3 - 0020 TravelDrive - 0021 TravelDrive - 0022 TravelDrive - 0023 TravelDrive - 0024 TravelDrive - 0025 TravelDrive - 0026 TravelDrive - 0027 TravelDrive - 0028 TravelDrive - 0029 TravelDrive - 0030 TravelDrive - 0822 TravelDrive 2C - 0832 Hi-Speed Mass Storage Device - 0998 Kingston Data Traveler2.0 Disk Driver - 0999 Kingston Data Traveler2.0 Disk Driver - 1000 TravelDrive 2C - 2000 TravelDrive 2C - 2038 TravelDrive - 2039 TravelDrive - 204a TravelDrive - 204b TravelDrive -08ee CCSI/Hesso -08f0 Corex Technologies -08f1 CTI Electronics Corp. -08f5 SysTec Co., Ltd -08f6 Logic 3 International, Ltd -08f7 Vernier - 0001 LabPro - 0002 EasyTemp -08f8 Keen Top International Enterprise Co., Ltd -08f9 Wipro Technologies -08fa Caere -08fb Socket Communications -08fc Sicon Cable Technology Co., Ltd -08fd Digianswer A/S - 0001 Bluetooth Device -08ff AuthenTec, Inc. - 1600 AES1600 - 1610 AES1600 - 2500 AES2501 - 2501 AES2501 - 2502 AES2501 - 2503 AES2501 - 2504 AES2501 - 2505 AES2501 - 2506 AES2501 - 2507 AES2501 - 2508 AES2501 - 2509 AES2501 - 250a AES2501 - 250b AES2501 - 250c AES2501 - 250d AES2501 - 250e AES2501 - 250f AES2501 - 2510 AES2510 - 2580 AES2501 Fingerprint Sensor - 2588 AES2501 - 2589 AES2501 - 258a AES2501 - 258b AES2501 - 258c AES2501 - 258d AES2501 - 258e AES2501 - 258f AES2501 - 3400 AES3400 TruePrint Sensor - 3401 AES3400 Sensor - 3402 AES3400 Sensor - 3403 AES3400 Sensor - 3404 AES3400 TruePrint Sensor - 3405 AES3400 TruePrint Sensor - 3406 AES3400 TruePrint Sensor - 3407 AES3400 TruePrint Sensor - 4902 BioMV with TruePrint AES3500 - 4903 BioMV with TruePrint AES3400 - 5500 AES4000 - 5501 AES4000 TruePrint Sensor - 5503 AES4000 TruePrint Sensor - 5505 AES4000 TruePrint Sensor - 5507 AES4000 TruePrint Sensor - 55ff AES4000 TruePrint Sensor. - 5700 AES3500 Fingerprint Reader - 5701 AES3500 TruePrint Sensor - 5702 AES3500 TruePrint Sensor - 5703 AES3500 TruePrint Sensor - 5704 AES3500-BZ TruePrint Sensor - 5705 AES3500-BZ TruePrint Sensor - 5706 AES3500-BZ TruePrint Sensor - 5707 AES3500-BZ TruePrint Sensor - 5710 AES3500 TruePrint Sensor - 5711 AES3500 TruePrint Sensor - 5712 AES3500 TruePrint Sensor - 5713 AES3500 TruePrint Sensor - 5714 AES3500-BZ TruePrint Sensor - 5715 AES3500-BZ TruePrint Sensor - 5716 AES3500-BZ TruePrint Sensor - 5717 AES3500-BZ TruePrint Sensor - 5730 AES3500 TruePrint Sensor - 5731 AES3500 TruePrint Sensor - 5732 AES3500 TruePrint Sensor - 5733 AES3500 TruePrint Sensor - 5734 AES3500-BZ TruePrint Sensor - 5735 AES3500-BZ TruePrint Sensor - 5736 AES3500-BZ TruePrint Sensor - 5737 AES3500-BZ TruePrint Sensor - afe3 FingerLoc Sensor Module (Anchor) - afe4 FingerLoc Sensor Module (Anchor) - afe5 FingerLoc Sensor Module (Anchor) - afe6 FingerLoc Sensor Module (Anchor) - fffd AES2510 Sensor (USB Emulator) - ffff Sensor (Emulator) -0900 Pinnacle Systems, Inc. -0901 VST Technologies - 0001 Hard Drive Adapter (TPP) - 0002 SigmaDrive Adapter (TPP) -0906 Faraday Technology Corp. -0909 Audio-Technica Corp. -090a Trumpion Microelectronics, Inc. - 1001 T33520 USB Flash Card Controller - 1100 Comotron C3310 MP3 player - 1200 MP3 player - 1540 Digitex Container Flash Disk -090b Neurosmith -090c Feiya Technology Corp. - 1000 Memory Bar - 1132 5-in-1 Card Reader -090d Multiport Computer Vertriebs GmbH -090e Shining Technology, Inc. -090f Fujitsu Devices, Inc. -0910 Alation Systems, Inc. -0911 Philips Speech Processing - 2512 SpeechMike Pro -0912 Voquette, Inc. -0915 GlobeSpan, Inc. - 0001 DSL Modem - 0002 ADSL ATM Modem - 0005 LAN Modem - 2000 802.11 Adapter - 2002 802.11 Adapter - 8000 ADSL LAN Modem - 8005 DSL-302G Modem - 8101 ADSL WAN Modem - 8102 DSL-200 ADSL Modem - 8103 DSL-200 ADSL Modem - 8104 DSL-200 Modem - 8400 DSL Modem - 8401 DSL Modem - 8402 DSL Modem - 8500 DSL Modem - 8501 DSL Modem -0917 SmartDisk Corp. - 0001 eFilm Reader-11 SM/CF - 0002 eFilm Reader-11 SM - 0003 eFilm Reader-11 CF - 0200 FireFly - 0201 FireLite - 0202 STORAGE ADAPTER (FirePower) - 0204 FlashTrax Storage - 0205 STORAGE ADAPTER (CrossFire) - 0206 FireFly 20G HDD - 0207 FireLite - 020f STORAGE ADAPTER (FireLite) - da01 eFilm Reader-11 Test - ffff eFilm Reader-11 (Class/PDR) -0919 Tiger Electronics - 0100 Fast Flicks Digital Camera -091e Garmin International - 0003 GPSmap (various models) - 0004 Garmin iQue 3600 - 0200 Data Card Programmer (install) - 1200 Data Card Programmer -0920 Echelon Co. - 7500 Network Interface -0921 GoHubs, Inc. - 1001 GoCOM232 Serial -0922 Dymo-CoStar Corp. - 0007 LabelWriter 330 - 0009 LabelWriter 310 -0923 IC Media Corp. - 010f SIIG MobileCam -0924 Xerox - 23dd DocuPrint M760 (X760_USB) - 3d5b Phaser 6115MFP TWAIN Scanner - 420f WorkCentre PE220 Series - 421f M20 Scanner - 423b Printing Support - ffef WorkCenter M15 - fffb DocuPrint M750 (X750_USB) -0925 Lakeview Research - 8101 Phidgets, Inc., 1-Motor PhidgetServo v2.0 - 8104 Phidgets, Inc., 4-Motor PhidgetServo v2.0 - 8800 WiseGroup Ltd, MP-8800 Quad Joypad - 8866 WiseGroup Ltd, MP-8866 Dual Joypad -0927 Summus, Ltd -0928 Oxford Semiconductor, Ltd -0929 American Biometric Co. -092a Toshiba Information & Industrial Sys. And Services -092b Sena Technologies, Inc. -092f Northern Embedded Science/CAVNEX - 0004 JTAG-4 - 0005 JTAG-5 -0930 Toshiba Corp. - 0009 Gigabeat F/X (HDD audio player) - 000c Gigabeat F (mtp) - 0010 Gigabeat S (mtp) - 0301 PCX1100U Cable Modem (WDM) - 0302 PCX2000 Cable Modem (WDM) - 0305 Cable Modem PCX3000 - 0307 Cable Modem PCX2500 - 0308 PCX2200 Cable Modem (WDM) - 0309 PCX5000 Cable Modem (WDM) - 030b Cable Modem PCX2600 - 0501 Bluetooth Controller - 0502 Integrated Bluetooth - 0503 Bluetooth Controller - 0505 Integrated Bluetooth - 0506 Integrated Bluetooth - 0507 Bluetooth Adapter - 0508 Integrated Bluetooth HCI - 0509 BT EDR Dongle - 0706 PocketPC e740 - 0707 Pocket PC e330 Series - 0708 Pocket PC e350 Series - 0709 Pocket PC e750 Series - 070a Pocket PC e400 Series - 070b Pocket PC e800 Series - 1300 Wireless Broadband (CDMA EV-DO) SM-Bus Minicard Status Port - 1301 Wireless Broadband (CDMA EV-DO) Minicard Status Port - 1302 Wireless Broadband (3G HSDPA) SM-Bus Minicard Status Port - 1303 Wireless Broadband (3G HSDPA) Minicard Status Port - 1308 Broadband (3G HSDPA) SM-Bus Minicard Diagnostics Port - 642f TravelDrive - 6506 TravelDrive 2C - 6507 TravelDrive 2C - 6508 TravelDrive 2C - 6509 TravelDrive 2C - 6510 TravelDrive 2C - 6517 TravelDrive 2C - 6518 TravelDrive 2C - 6519 Kingston DataTraveler 2.0 USB Stick - 651a TravelDrive 2C - 651b TravelDrive 2C - 651c TravelDrive 2C - 651d TravelDrive 2C - 651e TravelDrive 2C - 651f TravelDrive 2C - 6520 TravelDrive 2C - 6521 TravelDrive 2C - 6522 TravelDrive 2C - 6523 TravelDrive - 6524 TravelDrive - 6525 TravelDrive - 6526 TravelDrive - 6527 TravelDrive - 6528 TravelDrive - 6529 TravelDrive - 652a TravelDrive - 652b TravelDrive - 652c TravelDrive - 652d TravelDrive - 652f TravelDrive - 6530 TravelDrive - 6531 TravelDrive - 6532 256M USB Stick - 6533 512M USB Stick - 6534 TravelDrive - 653c Kingston DataTraveler 2.0 USB Stick (512M) - 653d Kingston DataTraveler 2.0 USB Stick (1GB) - 653e USB Flash Memory - 6540 TransMemory USB Flash Memory -0931 Harmonic Data Systems, Ltd -0932 Crescentec Corp. - 0300 VideoAdvantage - 0302 Syntek DC-112X - 0320 VideoAdvantage - 1100 Video Enhamcement Device - 1112 Veo Web Camera - a311 Video Enhancement Device -0933 Quantum Corp. -0934 Netcom Systems -0939 Lumberg, Inc. -093a Pixart Imaging, Inc. - 0007 CMOS 100K-R Rev. 1.90 - 010e Digital camera, CD302N/Elta Medi@ digi-cam/HE-501A - 010f Argus DC-1610/DC-1620/Emprex PCD3600/Philips P44417B keychain camera/Precision Mini,Model HA513A/Vivitar Vivicam 55 - 2460 Q-TEC WEBCAM 100 - 2468 Cammaestro 2.5DU/X-EYE/Orite SC-120/ICGear TravelCam/Easy Snap Snake Eye WebCam - 2470 SoC PC-Camera - 2471 SoC PC-Camera - 2500 USB Optical Mouse - 2600 Typhoon Easycam USB 330K (newer)/Typhoon Easycam USB 2.0 VGA 1.3M/Sansun SN-508 - 2601 SPC 610NC Laptop Camera -093b Plextor Corp. - 0010 Storage Adapter - 0011 PlexWriter 40/12/40U - 0042 PX-712UF DVD RW - a002 ConvertX M402U XLOADER - a003 ConvertX AV100U A/V Capture Audio - a004 ConvertX TV402U XLOADER - a005 KWorld EMP Audio Device - a102 ConvertX M402U A/V Capture - a104 ConvertX PX-TV402U/NA -093c Intrepid Control Systems, Inc. - 0601 ValueCAN - 0701 NeoVI Blue vehicle bus interface -093d InnoSync, Inc. -093e J.S.T. Mfg. Co., Ltd -093f Olympia Telecom Vertriebs GmbH -0940 Japan Storage Battery Co., Ltd -0941 Photobit Corp. -0942 i2Go.com, LLC -0943 HCL Technologies India Private, Ltd -0944 KORG, Inc. -0945 Pasco Scientific -0948 Kronauer music in digital - 0301 USB Pro (24/48) - 0302 USB Pro (24/96 playback) - 0303 USB Pro (24/96 record) - 0304 USB Pro (16/48) - 1105 USB One -094b Linkup Systems Corp. -094d Cable Television Laboratories -094f Yano - 0101 U640MO-03 - 05fc METALWEAR-HDD -0951 Kingston Technology - 0008 Ethernet - 000a KNU101TX 100baseTX Ethernet - 1600 Data Traveler II Pen Drive - 1601 Data Traveler II+ Pen Drive - 1602 Data Traveler Mini - 1603 Data Traveler 1GB/2GB Pen Drive -0954 RPM Systems Corp. -0955 NVidia Corp. -0956 BSquare Corp. -0957 Agilent Technologies, Inc. - 0200 E-Video DC-350 Camera - 0202 E-Video DC-350 Camera -0958 CompuLink Research, Inc. -0959 Cologne Chip AG - 2bd0 Intelligent ISDN (Ver. 3.60.04) -095a Portsmith - 3003 Express Ethernet -095b Medialogic Corp. -095c K-Tec Electronics -095d Polycom, Inc. - 0001 Polycom ViaVideo -0967 Acer (??) - 0204 WarpLink 802.11b Adapter -0968 Catalyst Enterprises, Inc. -096e Feitian Technologies, Inc. - 0802 ePass2000 (G&D STARCOS SPK 2.4) -0971 Gretag-Macbeth AG -0973 Schlumberger - 0001 e-gate Smart Card -0974 Datagraphix, a business unit of Anacomp -0975 OL'E Communications, Inc. -0976 Adirondack Wire & Cable -0977 Lightsurf Technologies -0978 Beckhoff GmbH -0979 Jeilin Technology Corp., Ltd - 0224 JL2005A Toy Camera - 0226 JL2005A Toy Camera -097a Minds At Work LLC - 0001 Digital Wallet -097b Knudsen Engineering, Ltd -097c Marunix Co., Ltd -097d Rosun Technologies, Inc. -097f Barun Electronics Co., Ltd -0981 Oak Technology, Ltd -0984 Apricorn - 0200 Hard Drive Storage (TPP) -0985 cab Produkttechnik GmbH & Co KG - 00a3 A3/200 or A3/300 Label Printer -0986 Matsushita Electric Works, Ltd. -098c Vitana Corp. -098d INDesign -098e Integrated Intellectual Property, Inc. -098f Kenwood TMI Corp. -0993 Gemstar eBook Group, Ltd - 0001 REB1100 eBook Reader - 0002 eBook -0996 Integrated Telecom Express, Inc. -099a Zippy Technology Corp. - 610c EL-610 Super Mini Electron luminescent Keyboard -09a3 PairGain Technologies -09a4 Contech Research, Inc. -09a5 VCON Telecommunications -09a6 Poinchips - 8001 Mass Storage Device -09a7 Data Transmission Network Corp. -09a8 Lin Shiung Enterprise Co., Ltd -09a9 Smart Card Technologies Co., Ltd -09aa Intersil Corp. - 1000 Prism GT 802.11b/g Adapter - 3642 Prism 2.x 802.11b Adapter -09ab Japan Cash Machine Co., Ltd. -09ae Tripp Lite -09b2 Franklin Electronic Publishers, Inc. - 0001 eBookman Palm Computer -09b3 Altius Solutions, Inc. -09b4 MDS Telephone Systems -09b5 Celltrix Technology Co., Ltd -09bc Grundig - 0002 MPaxx MP150 MP3 Player -09be MySmart.Com - 0001 MySmartPad -09bf Auerswald GmbH & Co. KG - 00c0 COMpact 2104 ISDN PBX - 00db COMpact 4410/2206 ISDN ISDN - 00f1 COMfort System Telephones -09c1 Arris Interactive LLC - 1337 TOUCHSTONE DEVICE -09c2 Nisca Corp. -09c3 ActivCard, Inc. - 0007 Reader V2 - 0008 SmartCard Reader -09c4 ACTiSYS Corp. - 0011 ACT-IR2000U IrDA Dongle -09c5 Memory Corp. -09cc Workbit Corp. - 0404 BAFO USB-ATA/ATAPI Bridge Controller -09cd Psion Dacom Home Networks, Ltd -09ce City Electronics, Ltd -09cf Electronics Testing Center, Taiwan -09d1 NeoMagic, Inc. -09d2 Vreelin Engineering, Inc. -09d3 Com One - 0001 ISDN TA -09d7 Novatel Wireless - 0100 NovAtel FlexPack GPS receiver -09d9 KRF Tech, Ltd -09da A4 Tech Co., Ltd - 0006 Optical Mouse WOP-35 / Trust 450L Optical Mouse - 000a Port Mouse - 0018 Trust Human Interface Device - 001a Wireless Mouse & RXM-15 Receiver - 002a Wireless Optical Mouse NB-30 -09db Measurement Computing Corp. - 0075 MiniLab 1008 - 0076 PMD-1024 - 007a PMD-1208LS - 0081 USB-1616FS - 0088 USB-1616FS internal hub -09dc Aimex Corp. -09dd Fellowes, Inc. -09df Addonics Technologies Corp. -09e1 Intellon Corp. - 5121 MicroLink dLAN -09e5 Jo-Dan International, Inc. -09e6 Silutia, Inc. -09e7 Real 3D, Inc. -09e8 AKAI Professional M.I. Corp. -09e9 Chen-Source, Inc. -09eb IM Networks, Inc. - 4331 iRhythm Tuner Remote -09ef Xitel - 0101 MD-Port DG2 MiniDisc Interface -09f5 AresCom - 0168 Network Adapter - 0188 LAN Adapter - 0850 Adapter -09f6 RocketChips, Inc. -09f7 Edu-Science (H.K.), Ltd -09f8 SoftConnex Technologies, Inc. -09f9 Bay Associates -09fa Mtek Vision -09fb Altera -09ff Gain Technology Corp. -0a00 Liquid Audio -0a01 ViA, Inc. -0a07 Ontrak Control Systems Inc. - 0064 ADU100 Data Acquisition Interface - 00c8 ADU200 Relay I/O Interface - 00d0 ADU208 Data Acquisition Interface -0a0b Cybex Computer Products Co. -0a11 Xentec, Inc. -0a12 Cambridge Silicon Radio, Ltd - 0001 Bluetooth Dongle (HCI mode) - 0002 Frontline Test Equipment Bluetooth Device - 0003 Nanosira - 0004 Nanosira WHQL Reference Radio - 0005 Nanosira-Multimedia - 0006 Nanosira-Multimedia WHQL Reference Radio - 0007 Nanosira3-ROM - 0008 Nanosira3-ROM - 0009 Nanosira4-EDR WHQL Reference Radio - 000a Nanosira4-EDR-ROM - 000b Nanosira5-ROM - 0043 Bluetooth Device - 0100 Casira with BlueCore2-External Module - 0101 Casira with BlueCore2-Flash Module - 0102 Casira with BlueCore3-Multimedia Module - 0103 Casira with BlueCore3-Flash Module - 0104 Casira with BlueCore4-External Module - 0105 Casira with BlueCore4-Multimedia Module - 1000 Bluetooth Dongle (HID proxy mode) - 1010 Bluetooth Device - 1011 Bluetooth Device - 1012 Bluetooth Device - ffff USB Bluetooth Device in DFU State -0a13 Telebyte, Inc. -0a14 Spacelabs Medical, Inc. -0a15 Scalar Corp. -0a16 Trek Technology (S) PTE, Ltd - 1111 ThumbDrive - 8888 IBM USB Memory Key - 9988 Trek2000 TD-G2 -0a17 Pentax Corp. - 0004 Pentax Optio 330 - 0006 Pentax Optio S - 0007 Pentax Optio 550 - 0009 Pentax Optio 33WR - 000a Pentax Optio 555 - 000c Pentax Optio 43WR (mass storage mode) - 000d Pentax Optio 43WR - 0015 Pentax Optio S40/S5i - 003b Pentax Optio 50 (mass storage mode) - 003d Pentax Optio S55 - 0043 Pentax *ist DL - 0047 Pentax Optio S60 - 0052 Optio 60 Digital Camera - 006e Pentax K10D - 0070 Pentax K100D - 1001 EI2000 Camera powered by Digita! -0a18 Heidelberger Druckmaschinen AG -0a19 Hua Geng Technologies, Inc. -0a21 Medtronic Physio Control Corp. -0a22 Century Semiconductor USA, Inc. -0a2c AK-Modul-Bus Computer GmbH - 0008 GPIO Ports -0a34 TG3 Electronics, Inc. - 0110 Deck 82-key backlit keyboard -0a39 Gilat Satellite Networks, Ltd -0a3a PentaMedia Co., Ltd - 0163 KN-W510U 1.0 Wireless LAN Adapter -0a3c NTT DoCoMo, Inc. -0a3d Varo Vision -0a3f Swissonic AG -0a43 Boca Systems, Inc. -0a46 Davicom Semiconductor, Inc. - 0268 ST268 - 9601 DM9601 To Fast Ethernet Adapter -0a47 Hirose Electric -0a48 I/O Interconnect - 3233 Multimedia Card Reader - 3239 Multimedia Card Reader - 3258 Dane Elec zMate SD Reader - 3259 Dane Elec zMate CF Reader - 5000 MediaGear xD-SM - 500a Mass Storage Device - 500f Mass Storage Device - 5010 Mass Storage Device - 5011 Mass Storage Device - 5014 Mass Storage Device - 5020 Mass Storage Device - 5021 Mass Storage Device - 5022 Mass Storage Device - 5023 Mass Storage Device - 5024 Mass Storage Device - 5025 Mass Storage Device -0a4b Fujitsu Media Devices, Ltd -0a4c Computex Co., Ltd -0a4d Evolution Electronics, Ltd - 0064 MK-225 Driver - 0065 MK-225C Driver - 0066 MK-225C Driver - 0067 MK-425C Driver - 0078 MK-37 Driver - 0079 MK-37C Driver - 007a MK-37C Driver - 008c TerraTec MIDI MASTER - 008d MK-249C Driver - 008e MK-249C MIDI Keyboard - 008f MK-449C Driver - 0090 Keystation 49e Driver - 0091 Keystation 61es Driver - 00a0 MK-361 Driver - 00a1 MK-361C Driver - 00a2 MK-361C Driver - 00a3 MK-461C MIDI Keyboard - 00b5 Keystation Pro 88 Driver - 00d2 E-Keys Driver - 00f0 UC-16 Driver - 00f1 X-Session Driver - 00f5 UC-33e MIDI Controller -0a4e Steinberg Soft-und Hardware GmbH -0a4f Litton Systems, Inc. -0a50 Mimaki Engineering Co., Ltd -0a51 Sony Electronics, Inc. -0a52 Jebsee Electronics Co., Ltd -0a53 Portable Peripheral Co., Ltd - 1000 Scanner - 2000 Q-Scan A6 Scanner - 2001 Q-Scan A6 Scanner - 2013 Media Drive A6 Scanner - 2014 Media Drive A6 Scanner - 2015 BizCardReader 600C - 2016 BizCardReader 600C - 202a Scanshell-CSSN - 3000 Q-Scan A8 Scanner - 3002 Q-Scan A8 Reader - 3015 BizCardReader 300G - 5001 BizCardReader 900C -0a5a Electronics For Imaging, Inc. -0a5b EAsics NV -0a5c Broadcom Corp. - 0201 iLine10(tm) Network Adapter - 2000 Bluetooth Device - 2009 Bluetooth Controller - 200a Bluetooth dongle - 200f Bluetooth Controller - 201d Bluetooth Device - 201e IBM Integrated Bluetooth IV - 2020 Bluetooth Dongle - 2033 BCM2033 Bluetooth - 2035 BCM2035 Bluetooth - 2038 Blutonium Device - 2039 Bluetooth Device - 2045 Bluetooth Controller - 2046 Bluetooth Device - 2047 Bluetooth Device - 205e Bluetooth Device - 2100 Bluetooth 2.0+eDR dongle - 2101 A-Link BlueUsbA2 Bluetooth - 2102 ANYCOM Blue USB-200/250 - 2110 Bluetooth Controller - 2111 ANYCOM Blue USB-UHE 200/250 - 2120 2045 Bluetooth 2.0 USB-UHE Device with trace filter - 2121 BCM2210 Bluetooth - 2122 Bluetooth 2.0+EDR dongle - 2130 2045 Bluetooth 2.0 USB-UHE Device with trace filter - 2131 2045 Bluetooth 2.0 Device with trace filter - 6300 Pirelli Remote NDIS Device -0a5d Diatrend Corp. -0a5f Zebra - 0009 LP2844 Printer - 930a Printer -0a62 MPMan - 0010 MPMan MP-F40 MP3 Player -0a66 ClearCube Technology -0a67 Medeli Electronics Co., Ltd -0a68 Comaide Corp. -0a69 Chroma ate, Inc. -0a6b Green House Co., Ltd - 0001 Compact Flash R/W with MP3 player -0a6c Integrated Circuit Systems, Inc. -0a6d UPS Manufacturing -0a6e Benwin -0a6f Core Technology, Inc. - 0400 Xanboo -0a70 International Game Technology -0a72 Sanwa Denshi -0a7d NSTL, Inc. -0a7e Octagon Systems Corp. -0a80 Rexon Technology Corp., Ltd -0a81 Chesen Electronics Corp. - 0101 Keyboard - 0103 Keyboard - 0203 Mouse - 0205 PS/2 Keyboard+Mouse Adapter -0a82 Syscan - 4600 TravelScan 460/464 -0a83 NextComm, Inc. -0a84 Maui Innovative Peripherals -0a85 Idexx Labs -0a86 NITGen Co., Ltd -0a8d Picturetel -0a8e Japan Aviation Electronics Industry, Ltd - 2011 Filter Driver For JAE XMC R/W -0a90 Candy Technology Co., Ltd -0a91 Globlink Technology, Inc. - 3801 Targus PAKP003 Mouse -0a92 EGO SYStems, Inc. - 0011 SYS WaveTerminal U2A - 0021 GIGAPort - 0031 GIGAPortAG - 0053 AudioTrak Optoplay - 0061 Waveterminal U24 - 0071 MAYA EX7 - 0091 Maya 44 - 00b1 MAYA EX5 - 1000 MIDI Mate - 1010 RoMI/O - 1020 M4U - 1030 M8U - 1090 KeyControl49 - 10a0 KeyControl25 -0a93 C Technologies AB - 0002 C-Pen 10 - 0005 MyPen Light - 000d Input Pen - 0010 C-Pen 20 -0a94 Intersense -0aa3 Lava Computer Mfg., Inc. -0aa4 Develco Elektronik -0aa5 First International Digital - 0002 irock! 500 Series - 0801 MP3 Player -0aa6 Perception Digital, Ltd - 0101 Hercules Jukebox - 1501 Store 'n' Go HD Drive -0aa7 Wincor Nixdorf International GmbH - 0100 POS Keyboard, TA58P-USB - 0101 POS Keyboard, TA85P-USB - 0102 POS Keyboard, TA59-USB - 0103 POS Keyboard, TA60-USB - 0104 SNIkey Keyboard, SNIKey-KB-USB - 0200 Operator Display, BA63-USB - 0201 Operator Display, BA66-USB - 0202 Operator Display & Scanner, XiCheck-BA63 - 0203 Operator Display & Scanner, XiCheck-BA66 - 0204 Graphics Operator Display, BA63GV - 0300 POS Printer (printer class mode), TH210 - 0301 POS Printer (native mode), TH210 - 0302 POS Printer (printer class mode), TH220 - 0303 POS Printer (native mode), TH220 - 0304 POS Printer, TH230 - 0305 Lottery Printer, XiPrintPlus - 0306 POS Printer (printer class mode), TH320 - 0307 POS Printer (native mode), TH320 - 0308 POS Printer (printer class mode), TH420 - 0309 POS Printer (native mode), TH420 - 030a POS Printer, TH200B - 0400 Lottery Scanner, Xiscan S - 0401 Lottery Scanner, Xiscan 3 - 4304 Banking Printer TP07 -0aa8 TriGem Computer, Inc. - 0060 TG 11Mbps WLAN Mini Adapter - 1001 DreamComboM4100 - 3002 InkJet Color Printer - 8001 TG_iMON - 8002 TG_KLOSS - a001 TG_X2 - a002 TGVFD_KLOSS - ffda iMON_VFD -0aa9 Baromtec Co. - f01b Medion MD 6242 MP3 Player -0aaa Japan CBM Corp. -0aab Vision Shape Europe SA -0aac iCompression, Inc. -0aad Rohde & Schwarz GmbH & Co. KG -0aae NEC infrontia Corp. (Nitsuko) -0aaf Digitalway Co., Ltd -0ab0 Arrow Strong Electronics Co., Ltd -0aba Ellisys - 8001 USB Tracker 110 Protocol Analyzer -0abe Stereo-Link - 0101 SL1200 DAC -0ac3 Sanyo Semiconductor Company Micro -0ac4 Leco Corp. -0ac5 I & C Corp. -0ac6 Singing Electrons, Inc. -0ac7 Panwest Corp. -0ac8 Z-Star Microelectronics Corp. - 0301 Web Camera - 0302 ZC0302 WebCam - 0321 USB 2.0 Webcam - 0323 Luxya WC-1200 USB 2.0 Webcam - 301b ZC0301 WebCam - 303b ZC0303 WebCam - 305b ZC0305 WebCam - 307b USB 1.1 WebCam - c002 Visual Communication Camera VGP-VCC1 -0ac9 Micro Solutions, Inc. - 0000 Backpack CD-ReWriter - 0001 BACKPACK 2 Cable - 0010 BACKPACK - 0011 Backpack 40GB Hard Drive - 0110 BACKPACK - 0111 BackPack - 1234 BACKPACK -0aca OPEN Networks Ltd - 1060 OPEN NT1 Plus II -0acc Koga Electronics Co. -0acd ID Tech - 0401 ID TECH Spectrum III Hybrid Smartcard Reader -0ace ZyDAS - 1201 802.11b WiFi - 1211 802.11b/g USB2 WiFi - 1215 WLA-54L WiFi - 1608 ONMI FAXMODEM 56K UNO (ZyXEL) -0acf Intoto, Inc. -0ad0 Intellix Corp. -0ad1 Remotec Technology, Ltd -0ad2 Service & Quality Technology Co., Ltd -0ae3 Allion Computer, Inc. -0ae4 Taito Corp. -0ae7 Neodym Systems, Inc. -0ae8 System Support Co., Ltd -0ae9 North Shore Circuit Design L.L.P. -0aea SciEssence, LLC -0aeb TTP Communications, Ltd -0aec Neodio Technologies Corp. - 2101 SmartMedia Card Reader - 2102 CompactFlash Card Reader - 2103 MMC/SD Card Reader - 2104 MemoryStick Card Reader - 2201 SmartMedia+CompactFlash Card Reader - 2202 SmartMedia+MMC/SD Card Reader - 2203 SmartMedia+MemoryStick Card Reader - 2204 CompactFlash+MMC/SD Card Reader - 2205 CompactFlash+MemoryStick Card Reader - 2206 MMC/SD+MemoryStick Card Reader - 2301 SmartMedia+CompactFlash+MMC/SD Card Reader - 2302 SmartMedia+CompactFlash+MemoryStick Card Reader - 2303 SmartMedia+MMC/SD+MemoryStick Card Reader - 2304 CompactFlash+MMC/SD+MemoryStick Card Reader - 3016 MMC/SD+Memory Stick Card Reader - 3050 ND3050 8-in-1 Card Reader - 3060 1.1 FS Card Reader - 3101 MMC/SD Card Reader - 3102 MemoryStick Card Reader - 3201 MMC/SD+MemoryStick Card Reader - 3216 HS Card Reader - 3260 7-in-1 Card Reader - 5010 ND5010 Card Reader -0af0 Option - 5000 UMTS Card - 6000 GlobeTrotter 3G datacard - 6300 GT 3G Quad UMTS/GPRS Card - 6600 GlobeTrotter 3G+ datacard -0af6 Silver I Co., Ltd -0af7 B2C2, Inc. - 0101 Digital TV USB Receiver (DVB-S/T/C / ATSC) -0af9 Hama, Inc. - 0010 USB SightCam 100 - 0011 Micro Innovations IC50C WebCam -0afc Zaptronix Ltd -0afd Tateno Dennou, Inc. -0afe Cummins Engine Co. -0aff Jump Zone Network Products, Inc. -0b00 INGENICO -0b05 ASUSTek Computer, Inc. - 1101 Mass Storage (UISDMC4S) - 1706 WL-167G 802.11g Adapter [ralink] - 1707 WL-167g Wireless Adapter - 1708 Mass Storage Device - 170b Mass Storage Device - 170c WL-159g - 170d 802.11b/g Wireless Network Adapter - 1712 BT-183 Bluetooth 2.0+EDR adapter - 1715 2045 Bluetooth 2.0 Device with trace filter - 1716 Bluetooth Device - 171b A9T wireless - 171c 802.11b/g Wireless Network Adapter - 1723 WL-167G v2 802.11g Adapter [ralink] - 1724 RT2573 - 1726 Laptop OLED Display - 172a ASUS 802.11n Network Adapter - 172b 802.11n Network Adapter - 1731 ASUS 802.11n Network Adapter - 1732 802.11n Network Adapter - 173c BT-183 Bluetooth 2.0 - 1742 802.11n Network Adapter - 6101 Cable Modem - 620a Remote NDIS Device -0b0c Todos Data System AB - 0009 Todos Argos Mini II Smart Card Reader -0b0e GN Netcom -0b0f AVID Technology -0b10 Pcally -0b11 I Tech Solutions Co., Ltd -0b1e Electronic Warfare Assoc., Inc. (EWA) -0b1f Insyde Software Corp. -0b20 TransDimension, Inc. -0b21 Yokogawa Electric Corp. -0b22 Japan System Development Co., Ltd -0b23 Pan-Asia Electronics Co., Ltd -0b24 Link Evolution Corp. -0b27 Ritek Corp. -0b28 Kenwood Corp. -0b2c Village Center, Inc. -0b30 PNY Technologies, Inc. - 0006 SM Media-Shuttle Card Reader -0b33 Contour Design, Inc. - 0020 ShuttleXpress -0b37 Hitachi ULSI Systems Co., Ltd -0b39 Omnidirectional Control Technology, Inc. - 0109 USB TO Ethernet - 0421 Serial - 0801 USB-Parallel Bridge - 0901 OCT To Fast Ethernet Converter - 0c03 LAN DOCK Serial Converter -0b3a IPaxess -0b3b Tekram Technology Co., Ltd - 0163 TL-WN320G 1.0 WLAN Adapter - 1601 Allnet 0193 802.11b Adapter - 1602 ZyXEL ZyAIR B200 802.11b Adapter - 1612 AIR.Mate 2@net 802.11b Adapter - 1613 802.11b Wireless LAN Adapter - 1620 Allnet USB 2.0 Wireless Network Adapter - 1630 QuickWLAN - 5630 ZD1211 - 6630 ZD1211 -0b3c Olivetti Techcenter - a010 Simple_Way Printer/Scanner/Copier -0b3e Kikusui Electronics Corp. -0b41 Hal Corp. - 0011 Crossam2+USB IR commander -0b43 Play.com, Inc. - 0003 PS2 Controller Converter -0b47 Sportbug.com, Inc. -0b48 TechnoTrend AG - 1003 Technotrend/Hauppauge USB-Nova - 1004 TT-PCline - 1005 Technotrend/Hauppauge USB-Nova - 1006 Technotrend/Hauppauge DEC3000-s - 1007 TT-micro plus Device - 1008 Technotrend/Hauppauge DEC2000-t - 1009 Technotrend/Hauppauge DEC2540-t -0b49 ASCII Corp. - 064f Trance Vibrator -0b4b Pine Corp. Ltd. - 0100 D'music MP3 Player -0b4d Graphtec America, Inc. - 110a Graphtec CC200-20 -0b4e Musical Electronics, Ltd - 6500 MP3 Player - 8028 MP3 Player - 8920 MP3 Player -0b50 Dumpries Co., Ltd -0b51 Comfort Keyboard Co. - 0020 Comfort Keyboard -0b52 Colorado MicroDisplay, Inc. -0b54 Sinbon Electronics Co., Ltd -0b56 TYI Systems, Ltd -0b57 Beijing HanwangTechnology Co., Ltd -0b59 Lake Communications, Ltd -0b5a Corel Corp. -0b5f Green Electronics Co., Ltd -0b60 Nsine, Ltd -0b61 NEC Viewtechnology, Ltd -0b62 Orange Micro, Inc. - 000b Bluetooth Device - 0059 iBOT2 WebCam -0b63 ADLink Technology, Inc. -0b64 Wonderful Wire Cable Co., Ltd -0b65 Expert Magnetics Corp. -0b69 CacheVision -0b6a Maxim Integrated Products -0b6f Nagano Japan Radio Co., Ltd -0b70 PortalPlayer, Inc. - 00ba iRiver H10 20GB -0b71 SHIN-EI Sangyo Co., Ltd -0b72 Embedded Wireless Technology Co., Ltd -0b73 Computone Corp. -0b75 Roland DG Corp. -0b79 Sunrise Telecom, Inc. -0b7a Zeevo, Inc. - 07d0 Bluetooth Dongle -0b7b Taiko Denki Co., Ltd -0b7c ITRAN Communications, Ltd -0b7d Astrodesign, Inc. -0b84 Rextron Technology, Inc. -0b85 Elkat Electronics, Sdn., Bhd. -0b86 Exputer Systems, Inc. - 5100 XMC5100 Zippy Drive - 5110 XMC5110 Flash Drive - 5200 XMC5200 Zippy Drive - 5201 XMC5200 Zippy Drive - 5202 XMC5200 Zippy Drive - 5280 XMC5280 Storage Drive - fff0 ISP5200 Debugger -0b87 Plus-One I & T, Inc. -0b88 Sigma Koki Co., Ltd, Technology Center -0b89 Advanced Digital Broadcast, Ltd -0b95 ASIX Electronics Corp. - 1720 10/100 Ethernet - 1780 AX88178 - 7720 AX88772 -0b96 Sewon Telecom -0b97 O2 Micro, Inc. - 7732 Smart Card Reader - 7761 Oz776 1.1 Hub - 7762 Oz776 SmartCard Reader - 7772 OZ776 CCID Smartcard Reader -0b98 Playmates Toys, Inc. -0b99 Audio International, Inc. -0b9b Dipl.-Ing. Stefan Kunde - 4012 Reflex RC-controller Interface -0b9d Softprotec Co. -0b9f Chippo Technologies -0baf U.S. Robotics - 00e5 USR6000 - 00eb USR1120 802.11b Adapter - 00ec 56K Faxmodem - 00f1 SureConnect ADSL ATM Adapter - 00f2 SureConnect ADSL Loader - 00f5 SureConnect ADSL ATM Adapter - 00f6 SureConnect ADSL Loader - 00f7 SureConnect ADSL ATM Adapter - 00f8 SureConnect ADSL Loader - 00f9 SureConnect ADSL ATM Adapter - 00fa SureConnect ADSL Loader - 00fb SureConnect ADSL Ethernet/USB Router - 0118 U5 802.11g Adapter - 011b Wireless MAXg Adapter - 0121 USR5423 WLAN - 6112 FaxModem Model 5633 -0bb0 Concord Camera Corp. - 0100 Sound Vision Stream - 5007 3340z/Rollei DC3100 -0bb1 Infinilink Corp. -0bb2 Ambit Microsystems Corp. - 0302 WLAN - 6098 USB Cable Modem -0bb3 Ofuji Technology -0bb4 High Tech Computer Corp. - 00ce mmO2 XDA GSM/GPRS Pocket PC - 00cf SPV C500 Smart Phone - 0a01 PocketPC Sync - 0a02 Himalaya GSM/GPRS Pocket PC - 0a03 PocketPC Sync - 0a04 PocketPC Sync - 0a05 PocketPC Sync - 0a06 PocketPC Sync - 0a07 Magician PocketPC SmartPhone / O2 XDA - 0a08 PocketPC Sync - 0a09 PocketPC Sync - 0a0a PocketPC Sync - 0a0b PocketPC Sync - 0a0c PocketPC Sync - 0a0d PocketPC Sync - 0a0e PocketPC Sync - 0a0f PocketPC Sync - 0a10 PocketPC Sync - 0a11 PocketPC Sync - 0a12 PocketPC Sync - 0a13 PocketPC Sync - 0a14 PocketPC Sync - 0a15 PocketPC Sync - 0a16 PocketPC Sync - 0a17 PocketPC Sync - 0a18 PocketPC Sync - 0a19 PocketPC Sync - 0a1a PocketPC Sync - 0a1b PocketPC Sync - 0a1c PocketPC Sync - 0a1d PocketPC Sync - 0a1e PocketPC Sync - 0a1f PocketPC Sync - 0a20 PocketPC Sync - 0a21 PocketPC Sync - 0a22 PocketPC Sync - 0a23 PocketPC Sync - 0a24 PocketPC Sync - 0a25 PocketPC Sync - 0a26 PocketPC Sync - 0a27 PocketPC Sync - 0a28 PocketPC Sync - 0a29 PocketPC Sync - 0a2a PocketPC Sync - 0a2b PocketPC Sync - 0a2c PocketPC Sync - 0a2d PocketPC Sync - 0a2e PocketPC Sync - 0a2f PocketPC Sync - 0a30 PocketPC Sync - 0a31 PocketPC Sync - 0a32 PocketPC Sync - 0a33 PocketPC Sync - 0a34 PocketPC Sync - 0a35 PocketPC Sync - 0a36 PocketPC Sync - 0a37 PocketPC Sync - 0a38 PocketPC Sync - 0a39 PocketPC Sync - 0a3a PocketPC Sync - 0a3b PocketPC Sync - 0a3c PocketPC Sync - 0a3d PocketPC Sync - 0a3e PocketPC Sync - 0a3f PocketPC Sync - 0a40 PocketPC Sync - 0a41 PocketPC Sync - 0a42 PocketPC Sync - 0a43 PocketPC Sync - 0a44 PocketPC Sync - 0a45 PocketPC Sync - 0a46 PocketPC Sync - 0a47 PocketPC Sync - 0a48 PocketPC Sync - 0a49 PocketPC Sync - 0a4a PocketPC Sync - 0a4b PocketPC Sync - 0a4c PocketPC Sync - 0a4d PocketPC Sync - 0a4e PocketPC Sync - 0a4f PocketPC Sync - 0a50 HTC SmartPhone Sync - 0a51 SPV C400 / T-Mobile SDA GSM/GPRS Pocket PC - 0a52 SmartPhone Sync - 0a53 SmartPhone Sync - 0a54 SmartPhone Sync - 0a55 SmartPhone Sync - 0a56 SmartPhone Sync - 0a57 SmartPhone Sync - 0a58 SmartPhone Sync - 0a59 SmartPhone Sync - 0a5a SmartPhone Sync - 0a5b SmartPhone Sync - 0a5c SmartPhone Sync - 0a5d SmartPhone Sync - 0a5e SmartPhone Sync - 0a5f SmartPhone Sync - 0a60 SmartPhone Sync - 0a61 SmartPhone Sync - 0a62 SmartPhone Sync - 0a63 SmartPhone Sync - 0a64 SmartPhone Sync - 0a65 SmartPhone Sync - 0a66 SmartPhone Sync - 0a67 SmartPhone Sync - 0a68 SmartPhone Sync - 0a69 SmartPhone Sync - 0a6a SmartPhone Sync - 0a6b SmartPhone Sync - 0a6c SmartPhone Sync - 0a6d SmartPhone Sync - 0a6e SmartPhone Sync - 0a6f SmartPhone Sync - 0a70 SmartPhone Sync - 0a71 SmartPhone Sync - 0a72 SmartPhone Sync - 0a73 SmartPhone Sync - 0a74 SmartPhone Sync - 0a75 SmartPhone Sync - 0a76 SmartPhone Sync - 0a77 SmartPhone Sync - 0a78 SmartPhone Sync - 0a79 SmartPhone Sync - 0a7a SmartPhone Sync - 0a7b SmartPhone Sync - 0a7c SmartPhone Sync - 0a7d SmartPhone Sync - 0a7e SmartPhone Sync - 0a7f SmartPhone Sync - 0a80 SmartPhone Sync - 0a81 SmartPhone Sync - 0a82 SmartPhone Sync - 0a83 SmartPhone Sync - 0a84 SmartPhone Sync - 0a85 SmartPhone Sync - 0a86 SmartPhone Sync - 0a87 SmartPhone Sync - 0a88 SmartPhone Sync - 0a89 SmartPhone Sync - 0a8a SmartPhone Sync - 0a8b SmartPhone Sync - 0a8c SmartPhone Sync - 0a8d SmartPhone Sync - 0a8e SmartPhone Sync - 0a8f SmartPhone Sync - 0a90 SmartPhone Sync - 0a91 SmartPhone Sync - 0a92 SmartPhone Sync - 0a93 SmartPhone Sync - 0a94 SmartPhone Sync - 0a95 SmartPhone Sync - 0a96 SmartPhone Sync - 0a97 SmartPhone Sync - 0a98 SmartPhone Sync - 0a99 SmartPhone Sync - 0a9a SmartPhone Sync - 0a9b SmartPhone Sync - 0a9c SmartPhone Sync - 0a9d SmartPhone Sync - 0a9e SmartPhone Sync - 0a9f SmartPhone Sync - 0b04 Hermes / TyTN / T-Mobile MDA Vario II / O2 Xda Trion - 0b06 Athena / Advantage x7500 / Dopod U1000 / T-Mobile AMEO - 0b0c Elf / Touch / P3450 / T-Mobile MDA Touch / O2 Xda Nova / Dopod S1 - 0bce Vario MDA -0bb5 Murata Manufacturing Co., Ltd -0bb6 Network Alchemy -0bb7 Joytech Computer Co., Ltd -0bb8 Hitachi Semiconductor and Devices Sales Co., Ltd -0bb9 Eiger M&C Co., Ltd -0bba ZAccess Systems -0bbb General Meters Corp. -0bbc Assistive Technology, Inc. -0bbd System Connection, Inc. -0bc0 Knilink Technology, Inc. -0bc1 Fuw Yng Electronics Co., Ltd -0bc2 Seagate RSS LLC - 2000 Storage Adapter V3 (TPP) -0bc3 IPWireless, Inc. -0bc4 Microcube Corp. -0bc5 JCN Co., Ltd -0bc6 ExWAY, Inc. -0bc7 X10 Wireless Technology, Inc. - 0001 ActiveHome (ACPI-compliant) - 0002 Firecracker Interface (ACPI-compliant) - 0003 VGA Video Sender (ACPI-compliant) - 0004 X10 Receiver - 0005 Wireless Transceiver (ACPI-compliant) - 0006 Wireless Transceiver (ACPI-compliant) - 0007 Wireless Transceiver (ACPI-compliant) - 0008 Wireless Transceiver (ACPI-compliant) - 0009 Wireless Transceiver (ACPI-compliant) - 000a Wireless Transceiver (ACPI-compliant) - 000b Transceiver (ACPI-compliant) - 000c Transceiver (ACPI-compliant) - 000d Transceiver (ACPI-compliant) - 000e Transceiver (ACPI-compliant) - 000f Transceiver (ACPI-compliant) -0bc8 Telmax Communications -0bc9 ECI Telecom, Ltd -0bca Startek Engineering, Inc. -0bcb Perfect Technic Enterprise Co., Ltd -0bd7 Andrew Pargeter & Associates - a021 Amptek DP4 multichannel signal analyzer -0bda Realtek Semiconductor Corp. - 0103 USB 2.0 Card Reader - 0104 Mass Storage Device - 0106 Mass Storage Device - 0107 Mass Storage Device - 0108 Mass Storage Device - 0111 Card Reader - 0113 Mass Storage Device - 0115 Mass Storage Device - 0116 Mass Storage Device - 0117 Mass Storage Device - 0118 Mass Storage Device - 0151 Mass Stroage Device - 0152 Mass Stroage Device - 0153 Mass Stroage Device - 0156 Mass Stroage Device - 0157 Mass Stroage Device - 0158 Mass Stroage Device - 0161 Mass Stroage Device - 0168 Mass Stroage Device - 0169 Mass Stroage Device - 0171 Mass Stroage Device - 0176 Mass Stroage Device - 0178 Mass Stroage Device - 2831 2831U Device - 8150 RTL8150 Fast Ethernet Adapter - 8151 RTL8151 Adapteon Business Mobile Networks BV - 8187 RTL8187 Wireless Adapter - 8189 RTL8187B Wireless 802.11g 54Mbps Network Adapter - 8197 RTL8187B Wireless Adapter -0bdb Ericsson Business Mobile Networks BV - 1000 BV Bluetooth Device - 1002 Bluetooth Device 1.2 -0bdc Y Media Corp. -0bdd Orange PCS -0be2 Kanda Tsushin Kogyo Co., Ltd -0be3 TOYO Corp. -0be4 Elka International, Ltd -0be5 DOME imaging systems, Inc. -0be6 Dong Guan Humen Wonderful Wire Cable Factory -0bee LTK Industries, Ltd -0bef Way2Call Communications -0bf0 Pace Micro Technology PLC -0bf1 Intracom S.A. - 0001 netMod Driver Ver 2.4.17 (CAPI) - 0002 netMod Driver Ver 2.4 (CAPI) - 0003 netMod Driver Ver 2.4 (CAPI) -0bf2 Konexx -0bf6 Addonics Technologies, Inc. - 0103 Storage Device - 1234 Storage Device - a000 Cable 205 (TPP) - a001 Cable 205 - a002 IDE Bridge -0bf7 Sunny Giken, Inc. -0bf8 Fujitsu Siemens Computers - 1001 Fujitsu Pocket Loox 600 PDA -0c04 MOTO Development Group, Inc. -0c05 Appian Graphics -0c06 Hasbro Games, Inc. -0c07 Infinite Data Storage, Ltd -0c08 Agate - 0378 Q 16MB Storage Device -0c09 Comjet Information System - a5a5 Litto Version USB2.0 -0c0a Highpoint Technologies, Inc. -0c0b Dura Micro, Inc. (Acomdata) - 27cb 6-in-1 Flash Reader and Writer - 27d7 Multi Memory reader/writer MD-005 - 27da Multi Memory reader/writer MD-005 - 27dc Multi Memory reader/writer MD-005 - 27e7 3,5'' HDD case MD-231 - 27ee 3,5'' HDD case MD-231 - 2814 3,5'' HDD case MD-231 - 2815 3,5'' HDD case MD-231 - 281d 3,5'' HDD case MD-231 - a109 CF/SM Reader and Writer - a10c SD/MS Reader and Writer - b001 USB 2.0 Mass Storage IDE adapter - b004 MMC/SD Reader and Writer -0c12 Zeroplus - 0005 PSX Vibration Feedback Converter - 8809 Red Octane Ignition Xbox DDR Pad -0c15 Iris Graphics -0c16 Gyration, Inc. - 0080 eHome Infrared Receiver - 0081 eHome Infrared Receiver -0c17 Cyberboard A/S -0c18 SynerTek Korea, Inc. -0c19 cyberPIXIE, Inc. -0c1a Silicon Motion, Inc. -0c1b MIPS Technologies -0c1c Hang Zhou Silan Electronics Co., Ltd -0c22 Tally Printer Corp. -0c23 Lernout + Hauspie -0c24 Taiyo Yuden - 0001 Bluetooth Adaptor - 0002 Bluetooth Device2 - 0005 Bluetooth Device(BC04-External) - 000b Bluetooth Device(BC04-External) - 000c Bluetooth Adaptor - 000e Bluetooth Device(BC04-External) - 000f Bluetooth Driver (V2.0+EDR) - 0010 Bluetooth Device(BC04-External) - 0012 Bluetooth Device(BC04-External) - 0018 Bluetooth Device(BC04-External) - 0019 Bluetooth Device - 0c24 Bluetooth Device(SAMPLE) - ffff Bluetooth module with BlueCore in DFU mode -0c25 Sampo Corp. - 0310 Scream Cam -0c27 RFIDeas, Inc - 3bfa pcProx Card Reader -0c2e Metro - 0200 Metrologic Scanner -0c35 Eagletron, Inc. -0c36 E Ink Corp. -0c37 e.Digital -0c38 Der An Electric Wire & Cable Co., Ltd -0c39 IFR -0c3a Furui Precise Component (Kunshan) Co., Ltd -0c3b Komatsu, Ltd -0c3c Radius Co., Ltd -0c3d Innocom, Inc. -0c3e Nextcell, Inc. -0c44 Motorola iDEN - 0021 iDEN P2k0 Device - 0022 iDEN P2k1 Device - 03a2 iDEN Smartphone -0c45 Microdia - 1020 Mass Storage Reader - 1028 Mass Storage Reader - 1030 Mass Storage Reader - 1031 Sonix Mass Storage Device - 1032 Mass Storage Reader - 1033 Sonix Mass Storage Device - 1034 Mass Storage Reader - 1035 Mass Storage Reader - 1036 Mass Storage Reader - 1037 Sonix Mass Storage Device - 1050 CF Card Reader - 1058 HDD Reader - 1060 iFlash SM-Direct Card Reader - 1061 Mass Storage Reader - 1062 Mass Storage Reader - 1063 Sonix Mass Storage Device - 1064 Mass Storage Reader - 1065 Mass Storage Reader - 1066 Mass Storage Reader - 1067 Mass Storage Reader - 1158 A56AK - 184c VoIP Phone - 6001 Genius VideoCAM NB - 6005 Sweex Mini WebCam - 6007 VideoCAM Eye - 6009 VideoCAM ExpressII - 600d TwinkleCam USB camera - 6011 PC Camera (SN9C102) - 6019 PC Camera (SN9C102) - 6024 VideoCAM ExpressII - 6025 VideoCAM ExpressII - 6028 Typhoon Easycam USB 330K (older) - 6029 Triplex i-mini PC Camera - 602a Meade ETX-105EC Camera - 602b VideoCAM NB 300 - 602c Clas Ohlson TWC-30XOP WebCam - 602d VideoCAM ExpressII - 602e VideoCAM Messenger - 6030 VideoCAM ExpressII - 603f VideoCAM ExpressII - 6040 CCD PC Camera (PC390A) - 606a CCD PC Camera (PC390A) - 607a CCD PC Camera (PC390A) - 607b Win2 PC Camera - 607c CCD PC Camera (PC390A) - 607e CCD PC Camera (PC390A) - 6080 Audio (Microphone) - 6082 VideoCAM Look - 6083 VideoCAM Look - 608c VideoCAM Look - 608e VideoCAM Look - 608f VideoCAM Look - 60a8 VideoCAM Look - 60aa VideoCAM Look - 60ab PC Camera - 60af VideoCAM Look - 60b0 Genius VideoCam Look - 60c0 PC Camera with Mic (SN9C105) - 60c8 Win2 PC Camera - 60cc Composite Device - 60ec Composite Device - 60ef Win2 PC Camera - 60fa PC Camera with Mic (SN9C105) - 60fb Composite Device - 60fc PC Camera with Mic (SN9C105) - 60fe Audio (Microphone) - 6108 Win2 PC Camera - 6122 PC Camera (SN9C110) - 6123 PC Camera (SN9C110) - 612a PC Camera (SN9C110) - 612c PC Camera (SN9C110) - 612e PC Camera (SN9C110) - 612f PC Camera (SN9C110) - 6130 PC Camera (SN9C120) - 6138 Win2 PC Camera - 613a PC Camera (SN9C120) - 613b Win2 PC Camera - 613c PC Camera (SN9C120) - 613e PC Camera (SN9C120) - 6240 PC Camera (SN9C201) - 6242 PC Camera (SN9C201) - 6243 PC Camera (SN9C201) - 6248 PC Camera (SN9C201) - 624b PC Camera (SN9C201) - 624c PC Camera (SN9C201) - 624e PC Camera (SN9C201) - 624f PC Camera (SN9C201) - 6260 PC Camera (SN9C201) - 6270 U-CAM PC Camera NE878 - 627a PC Camera (SN9C201) - 627b PC Camera (SN9C201) - 627c PC Camera (SN9C201) - 627f PC Camera (SN9C201) - 6280 Composite Device - 6282 Audio (Microphone) - 6283 Audio (Microphone) - 6288 Audio (Microphone) - 628a Composite Device - 628b PC Camera (SN9C202) - 628c PC Camera (SN9C202) - 628e Composite Device - 628f Composite Device - 62a0 Audio (Microphone) - 62b0 Audio (Microphone) - 62ba PC Camera (SN9C202) - 62bb PC Camera (SN9C202) - 62bc Composite Device - 62c0 Pavilion Webcam - 8000 DC31VC - 8006 Dual Mode Camera (8006 VGA) - 800a Vivitar Vivicam3350B -0c46 WaveRider Communications, Inc. -0c4b Reiner SCT Kartensysteme GmbH - 0100 cyberJack e-com/pinpad - 0300 cyberJack pinpad(a) -0c52 Sealevel Systems, Inc. - 2101 Serial Converter -0c53 ViewPLUS, Inc. -0c54 Glory, Ltd -0c55 Spectrum Digital, Inc. - 0510 Spectrum Digital XDS510 JTAG Debugger - 0540 SPI540 - 5416 TMS320C5416 DSK - 6416 TMS320C6416 DDB -0c56 Billion Bright, Ltd -0c57 Imaginative Design Operation Co., Ltd -0c58 Vidar Systems Corp. -0c59 Dong Guan Shinko Wire Co., Ltd -0c5a TRS International Mfg., Inc. -0c5e Xytronix Research & Design -0c62 Chant Sincere Co., Ltd -0c63 Toko, Inc. -0c64 Signality System Engineering Co., Ltd -0c65 Eminence Enterprise Co., Ltd -0c66 Rexon Electronics Corp. -0c67 Concept Telecom, Ltd -0c70 MCT Elektronikladen - 0000 USB08 Development board -0c74 Optronic Laboratories Inc. - 0002 OL 700-30 Goniometer -0c76 JMTek, LLC. - 0001 Mass Storage Controller - 0002 Mass Storage Controller - 0003 USBdisk - 0004 Mass Storage Controller - 0005 Transcend USB Flash disk - 0006 Transcend JetFlash - 0007 Mass Storage Device -0c77 Sipix Group, Ltd - 1001 SiPix Web2 - 1002 SiPix SC2100 - 1010 SiPix Snap - 1011 SiPix Blink 2 - 1015 SiPix CAMeleon -0c78 Detto Corp. -0c79 NuConnex Technologies Pte., Ltd -0c7a Wing-Span Enterprise Co., Ltd -0c86 NDA Technologies, Inc. -0c88 Kyocera Wireless Corp. - 0021 Handheld - 17da Qualcomm Kyocera CDMA Technologies MSM -0c89 Honda Tsushin Kogyo Co., Ltd -0c8a Pathway Connectivity, Inc. -0c8b Wavefly Corp. -0c8c Coactive Networks -0c8d Tempo -0c8e Cesscom Co., Ltd - 6000 Luxian Series -0c8f Applied Microsystems -0c98 Berkshire Products, Inc. - 1140 USB PC Watchdog -0c99 Innochips Co., Ltd -0c9a Hanwool Robotics Corp. -0c9b Jobin Yvon, Inc. -0c9d SemTek - 0170 3873 Manual Insert card reader -0ca2 Zyfer -0ca3 Sega Corp. -0ca4 ST&T Instrument Corp. -0ca5 BAE Systems Canada, Inc. -0ca6 Castles Technology Co., Ltd - 0010 EZUSB PC/SC Smart Card Reader - 0050 EZ220PU Reader Controller - 1077 Bludrive Family Smart Card Reader - 107e Reader Controller - 2010 myPad110 PC/SC Smart Card Reader -0ca7 Information Systems Laboratories -0cad Motorola CGISS - 9001 PowerPad Pocket PC Device -0cae Ascom Business Systems, Ltd -0caf Buslink - 2507 Hi-Speed USB-to-IDE Bridge Controller - 2515 Flash Disk Embedded Hub - 2516 Flash Disk Security Device - 2517 Flash Disk Mass Storage Device - 25c7 Hi-Speed USB-to-IDE Bridge Controller - 3a00 Hard Drive - 3a20 Mass Storage Device - 3acd Mass Storage Device -0cb0 Flying Pig Systems -0cb1 Innovonics, Inc. -0cb6 Celestix Networks, Pte., Ltd -0cb7 Singatron Enterprise Co., Ltd -0cb8 Opticis Co., Ltd -0cba Trust Electronic (Shanghai) Co., Ltd -0cbb Shanghai Darong Electronics Co., Ltd -0cbc Palmax Technology Co., Ltd - 0101 Pocket PC P6C - 0201 Personal Digital Assistant - 0301 Personal Digital Assistant P6M+ - 0401 Pocket PC -0cbd Pentel Co., Ltd (Electronics Equipment Div.) -0cbe Keryx Technologies, Inc. -0cbf Union Genius Computer Co., Ltd -0cc0 Kuon Yi Industrial Corp. -0cc1 Given Imaging, Ltd -0cc2 Timex Corp. -0cc3 Rimage Corp. -0cc4 emsys GmbH -0cc5 Sendo -0cc6 Intermagic Corp. -0cc7 Kontron Medical AG -0cc8 Technotools Corp. -0cc9 BroadMAX Technologies, Inc. -0cca Amphenol -0ccb SKNet Co., Ltd -0ccc Domex Technology Corp. -0ccd TerraTec Electronic GmbH - 0012 PHASE 26 - 0013 PHASE 26 - 0014 PHASE 26 - 0015 Flash Update for TerraTec PHASE 26 - 0021 Cameo Grabster 200 - 0023 Mystify Claw - 0028 Aureon 5.1 MkII - 0032 MIDI HUBBLE - 0035 Miditech Play'n Roll - 0036 Cinergy 250 Audio - 0037 Cinergy 250 Audio - 0038 Cinergy T^2 DVB-T Receiver - 0039 Grabster AV 400 - 003b Cinergy 400 - 003c Grabster AV 250 - 0042 Cinergy Hybrid T XS - 0043 Cinergy T XS - 004e Cinergy T XS - 004f Cinergy Analog XS - 005c Cinergy T² - 0069 Cinergy T XE DVB-T Receiver -0cd4 Bang Olufsen - 0101 BeolinkPC2 -0cd7 NewChip S.r.l. -0cd8 JS Digitech, Inc. - 2007 Smart Card Reader/JSTU-9700 -0cd9 Hitachi Shin Din Cable, Ltd -0cde Z-Com - 0001 M4Y-750 - 0002 XI-725/726 Prism2.5 802.11b Adapter - 0003 Sagem 802.11b Dongle - 0004 Sagem 802.11b Dongle - 0005 XI-735 Prism3 802.11b Adapter - 0006 Medion 40900 802.11b Adapter - 0008 Sitecom Wireless Network Adapter 100G+ WL-125 - 0009 (ZD1211)IEEE 802.11b+g Adapter - 0011 ZD1211 - 0012 AR5523 - 0013 AR5523 driver (no firmware) - 0014 NB 802.11g Wireless LAN Adapter(3887A) - 0015 Zoom Wireless-G - 0016 NB 802.11g Wireless LAN Adapter(3887A) - 0018 NB 802.11a/b/g Wireless LAN Adapter(3887A) - 001a ZD1211B - 001c 802.11b/g Wireless Network Adapter - 0020 Wi-Fi Wireless LAN Adapter - 0022 802.11b/g/n Wireless Network Adapter -0ce9 pico Technology - 1001 PicoScope3204 -0cf1 e-Conn Electronic Co., Ltd -0cf2 ENE Technology, Inc. -0cf3 Atheros Communications, Inc. - 0001 AR5523 - 0002 AR5523 (no firmware) - 0003 AR5523 - 0004 AR5523 (no firmware) - 0005 AR5523 - 0006 AR5523 (no firmware) -0cf4 Fomtex Corp. -0cf5 Cellink Co., Ltd -0cf6 Compucable Corp. -0cf7 ishoni Networks -0cf8 Clarisys, Inc. - 0750 Claritel-i750 - vp -0cf9 Central System Research Co., Ltd -0cfa Inviso, Inc. -0cfc Minolta-QMS, Inc. -0cff SAFA MEDIA Co., Ltd. - 0320 SR-380N -0d06 telos EDV Systementwicklung GmbH -0d08 UTStarcom - 0602 DV007 [serial] - 0603 DV007 [storage] -0d0b Contemporary Controls -0d0c Astron Electronics Co., Ltd -0d0d MKNet Corp. -0d0e Hybrid Networks, Inc. -0d0f Feng Shin Cable Co., Ltd -0d10 Elastic Networks - 0001 StormPort (WDM) -0d11 Maspro Denkoh Corp. -0d12 Hansol Electronics, Inc. -0d13 BMF Corp. -0d14 Array Comm, Inc. -0d15 OnStream b.v. -0d16 Hi-Touch Imaging Technologies Co., Ltd - 0001 PhotoShuttle - 0002 Photo Printer 730 series - 0004 Photo Printer 63xPL/PS - 0100 Photo Printer 63xPL/PS - 0102 Photo Printer 64xPS - 0103 Photo Printer 730 series - 0104 Photo Printer 63xPL/PS - 0105 Photo Printer 64xPS - 0200 Photo Printer 64xDL -0d17 NALTEC, Inc. -0d18 coaXmedia -0d19 Hank Connection Industrial Co., Ltd -0d32 Leo Hui Electric Wire & Cable Co., Ltd -0d33 AirSpeak, Inc. -0d34 Rearden Steel Technologies -0d35 Dah Kun Co., Ltd -0d3a Posiflex Technologies, Inc. -0d3c Sri Cable Technology, Ltd -0d3d Tangtop Technology Co., Ltd - 0001 HID Keyboard -0d3e Fitcom, inc. -0d3f MTS Systems Corp. -0d40 Ascor, Inc. -0d41 Ta Yun Terminals Industrial Co., Ltd -0d42 Full Der Co., Ltd -0d46 Kobil Systems GmbH - 2012 KAAN Standard Plus (Smartcard reader) - 3003 mIDentity Light / KAAN SIM III - 4000 mIDentity (mass storage) - 4001 mIDentity Basic/Classic (composite device) - 4081 mIDentity Basic/Classic (installationless) -0d49 Maxtor - 3000 Drive - 3010 3000LE Drive - 3100 Hi-Speed USB-IDE Bridge Controller - 5000 5000XT Drive - 5010 5000LE Drive - 5020 Mobile Hard Disk Drive - 7000 OneTouch - 7010 OneTouch -0d4a NF Corp. -0d4b Grape Systems, Inc. -0d4c Tedas AG -0d4d Coherent, Inc. -0d4e Agere Systems Netherland BV - 047a WLAN Card - 1000 Wireless Card Model 0801 - 1001 Wireless Card Model 0802 -0d4f EADS Airbus France -0d50 Cleware GmbH - 0011 USB-Temp2 Thermometer -0d51 Volex (Asia) Pte., Ltd -0d53 HMI Co., Ltd -0d54 Holon Corp. -0d55 ASKA Technologies, Inc. -0d56 AVLAB Technology, Inc. -0d57 Solomon Microtech, Ltd -0d5c Belkin - a002 F5D6050 802.11b Adapter -0d5e Myacom, Ltd - 2346 BT Digital Access adapter -0d5f CSI, Inc. -0d60 IVL Technologies, Ltd -0d61 Meilu Electronics (Shenzhen) Co., Ltd -0d62 Darfon Electronics Corp. - 0003 Smartcard Reader - 0004 Filter Driver - 0306 M530 Mouse - 0800 Magic Wheel - 2021 AM805 Keyboard - 2026 TECOM Bluetooth Device - a100 Benq Mouse -0d63 Fritz Gegauf AG -0d64 DXG Technology Corp. - 0105 Dual Mode Digital Camera 1.3M - 0107 Horus MT-409 Camera - 0108 Dual Mode Digital Camera - 0202 Dual Mode Video Camera Device - 0303 DXG-305V Camera - 1001 SiPix Stylecam/UMAX AstraPix 320s - 1002 Fashion Cam 01 Dual-Mode DSC (Video Camera) - 1003 Fashion Cam Dual-Mode DSC (Controller) - 1021 D-Link DSC 350F - 1208 Dual Mode Still Camera Device - 2208 Mass Storage - 3105 Dual Mode Digital Camera Disk - 3108 Digicam Mass Storage Device -0d65 KMJP Co., Ltd -0d66 TMT -0d67 Advanet, Inc. -0d68 Super Link Electronics Co., Ltd -0d69 NSI -0d6a Megapower International Corp. -0d6b And-Or Logic -0d70 Try Computer Co., Ltd -0d71 Hirakawa Hewtech Corp. -0d72 Winmate Communication, Inc. -0d73 Hit's Communications, Inc. -0d76 MFP Korea, Inc. -0d77 Power Sentry/Newpoint -0d78 Japan Distributor Corp. -0d7a MARX Datentechnik GmbH -0d7b Wellco Technology Co., Ltd -0d7c Taiwan Line Tek Electronic Co., Ltd -0d7d Phison Electronics Corp. - 0100 PS1001/1011/1006/1026 Flash Disk - 0110 Gigabyte FlexDrive - 0120 Disk Pro 64MB - 0124 GIGABYTE Disk - 0240 I/O-Magic/Transcend 6-in-1 Card Reader - 110e NEC uPD720121/130 USB-ATA/ATAPI Bridge - 1240 Apacer 6-in-1 Card Reader 2.0 - 1270 Wolverine SixPac 6000 - 1300 Flash Disk - 1320 PS2031 Flash Disk - 1400 Attache 256MB USB 2.0 Flash Drive - 1420 PS2044 Pen Drive - 1470 Vosonic X's-Drive II+ VP2160 - 1900 USB Thumb Drive -0d7e American Computer & Digital Components - 2507 Hi-Speed USB-to-IDE Bridge Controller - 2517 Hi-Speed Mass Storage Device - 25c7 Hi-Speed USB-to-IDE Bridge Controller -0d7f Essential Reality LLC -0d80 H.R. Silvine Electronics, Inc. -0d81 TechnoVision -0d83 Think Outside, Inc. -0d89 Oz Software -0d8a King Jim Co., Ltd - 0101 TEPRA PRO -0d8b Ascom Telecommunications, Ltd -0d8c C-Media Electronics, Inc. - 0001 Audio Device - 0002 Composite Device - 0003 Sound Device - 0006 Storm HP-USB500 5.1 Headset - 000c Audio Adapter - 000d Composite Device - 000e Audio Adapter (Planet UP-100, Genius G-Talk) - 0102 CM106 Like Sound Device - 0103 Turtle Beach Audio Advantage Micro - 0201 CM6501 - 5000 Mass Storage Controller - 5200 Mass Storage Controller(0D8C,5200) - b213 USB Phone CM109 (aka CT2000,VPT1000) -0d8d Promotion & Display Technology, Ltd - 0234 V-234 Composite Device - 0550 V-550 Composite Device - 0551 V-551 Composite Device - 0552 V-552 Composite Device - 0651 V-651 Composite Device - 0652 V-652 Composite Device - 0653 V-653 Composite Device - 0654 V-654 Composite Device - 0655 V-655 Composite Device - 0656 V-656 Composite Device - 0657 V-657 Composite Device - 0658 V-658 Composite Device - 0659 V-659 Composite Device - 0660 V-660 Composite Device - 0661 V-661 Composite Device - 0662 V-662 Composite Device - 0850 V-850 Composite Device - 0851 V-851 Composite Device - 0852 V-852 Composite Device - 0901 V-901 Composite Device - 0902 V-902 Composite Device - 0903 V-903 Composite Device - 4754 Voyager DMP Composite Device - bb00 Bloomberg Composite Device - bb01 Bloomberg Composite Device - bb02 Bloomberg Composite Device - bb03 Bloomberg Composite Device - bb04 Bloomberg Composite Device - bb05 Bloomberg Composite Device - fffe Global Tuner Composite Device - ffff Voyager DMP Composite Device -0d8e Global Sun Technology, Inc. - 0163 802.11g 54 Mbps Wireless Dongle - 1621 802.11b Wireless Adapter - 3762 802.11g Wireless Mini adapter - 3763 802.11g Wireless dongle - 7100 802.11b Adapter - 7110 WL-210 - 7801 AR5523 - 7802 AR5523 (no firmware) - 7811 AR5523 - 7812 AR5523 (no firmware) - 7a01 PRISM25 802.11b Adapter -0d8f Pitney Bowes -0d90 Sure-Fire Electrical Corp. -0d96 Skanhex Technology, Inc. - 0000 Jenoptik JD350 video - 3300 SX330z Camera - 4100 SX410z Camera - 4102 MD 9700 Camera - 4104 Jenoptik JD-4100z3s - 410a Medion 9801/Novatech SX-410z - 5200 SX-520z Camera -0d97 Santa Barbara Instrument Group - 0001 SBIG Astronomy Camera (without firmware) - 0101 SBIG Astronomy Camera (with firmware) -0d98 Mars Semiconductor Corp. - 0300 Avaya Wireless Card -0d99 Trazer Technologies, Inc. -0d9a RTX Telecom AS - 0001 Bluetooth Device -0d9b Tat Shing Electrical Co. -0d9c Chee Chen Hi-Technology Co., Ltd -0d9d Sanwa Supply, Inc. -0d9e Avaya - 0300 Wireless Card -0d9f Powercom Co., Ltd -0da0 Danger Research -0da1 Suzhou Peter's Precise Industrial Co., Ltd -0da2 Land Instruments International, Ltd -0da3 Nippon Electro-Sensory Devices Corp. -0da4 Polar Electro OY - 0001 Interface -0da7 IOGear, Inc. -0da8 softDSP Co., Ltd - 0001 SDS 200A Oscilloscope -0dab Cubig Group - 0100 DVR/CVR-M140 MP3 Player -0dad Westover Scientific -0db0 Micro Star International - 1020 PC2PC WLAN Card - 1967 Bluetooth Dongle - 4011 Medion Flash XL V2.0 Card Reader - 4600 802.11b/g Turbo Wireless Adapter - 5501 Mass Storage Device - 5502 Mass Storage Device - 5513 MP3 Player - 5515 MP3 Player - 5516 MP3 Player - 6823 UB11B/MS-6823 802.11b Wi-Fi adapter - 6826 IEEE 802.11g Wireless Network Adapter - 6855 Bluetooth Device - 6861 MSI-6861 802.11g WiFi adapter - 6865 RT2570 - 6869 RT2570 - 6874 RT2573 - 6877 RT2573 - 6881 Bluetooth Class I EDR Device - 688a Bluetooth Class I EDR Device - 6970 Bluetooth adapter - 697a Bluetooth Dongle - 6982 Medion Flash XL Card Reader - a861 RT2573 - a874 RT2573 - a970 Bluetooth dongle - a97a Bluetooth EDR Device - b970 Bluetooth EDR Device - b97a Bluetooth EDR Device -0db1 Wen Te Electronics Co., Ltd -0db2 Shian Hwi Plug Parts, Plastic Factory -0db3 Tekram Technology Co., Ltd -0db4 Chung Fu Chen Yeh Enterprise Corp. -0db7 ELCON Systemtechnik - 0002 Goldpfeil P-LAN -0dbe Jiuh Shiuh Precision Industry Co., Ltd -0dbf Quik Tech Solutions - 0002 SmartDongle Security Key - 0200 HDD Storage Solution - 021b USB-2.0 IDE Adapter - 0300 Storage Adapter - 0333 Storage Adapter - 0707 ZIV Drive -0dc0 Great Notions -0dc1 Tamagawa Seiki Co., Ltd -0dc3 Athena Smartcard Solutions, Inc. - 0801 ASEDrive III - 0802 ASEDrive IIIe - 1104 ASEDrive IIIe KB - 1701 ASEKey - 1702 ASEKey -0dc4 Macpower Peripherals, Ltd - 0040 Mass Storage Device - 0041 Mass Storage Device - 0042 Mass Storage Device - 0101 Hi-Speed Mass Storage Device -0dc5 SDK Co., Ltd -0dc6 Precision Squared Technology Corp. -0dc7 First Cable Line, Inc. -0dcd NetworkFab Corp. - 0001 Remote Interface Adapter - 0002 High Bandwidth Codec -0dd0 Access Solutions - 1002 Triple Talk Speech Synthesizer -0dd1 Contek Electronics Co., Ltd -0dd2 Power Quotient International Co., Ltd - 0003 Mass Storage (P) -0dd3 MediaQ -0dd4 Custom Engineering SPA -0dd5 California Micro Devices -0dd7 Kocom Co., Ltd -0dd8 Netac Technology Co., Ltd - 1060 USB-CF-Card - e007 OnlyDisk U222 Pendrive -0dd9 HighSpeed Surfing -0dda Integrated Circuit Solution, Inc. - 0001 Multi-Card Reader 6in1 - 0002 Multi-Card Reader 7in1 - 0003 Flash Disk - 0005 Internal Multi-Card Reader 6in1 - 0008 SD single card reader - 0009 MS single card reader - 000a MS+SD Dual Card Reader - 000b SM single card reader - 0101 All-In-One Card Reader - 0102 All-In-One Card Reader - 0301 MP3 Player - 0302 Multi-Card MP3 Player - 1001 Multi-Flash Disk - 2001 Multi-Card Reader - 2002 Q018 default PID - 2003 Multi-Card Reader - 2005 Datalux DLX-1611 16in1 Card Reader - 2006 All-In-One Card Reader - 2007 USB to ATAPI bridge - 2008 All-In-One Card Reader - 2013 SD/MS Combo Card Reader - 2014 SD/MS Single Card Reader - 2023 card reader SD/MS DEMO board with ICSI brand name (MaskROM version) - 2024 card reader SD/MS DEMO board with Generic brand name (MaskROM version) - 2026 USB2.0 Card Reader - 2027 USB 2.0 Card Reader - 2315 UFD MP3 player (model 2) - 2318 UFD MP3 player (model 1) - 2321 UFD MP3 player -0ddb Tamarack, Inc. -0ddd Datelink Technology Co., Ltd -0dde Ubicom, Inc. -0de0 BD Consumer Healthcare -0dea UTECH Electronic (D.G.) Co., Ltd. -0ded Novasonics -0dee Lifetime Memory Products - 4010 Storage Adapter -0def Full Rise Electronic Co., Ltd -0df6 Sitecom Europe B.V. - 0001 C-Media VOIP Device - 0004 Bluetooth 2.0 Adapter 100m - 0007 Bluetooth 2.0 Adapter 10m - 000b Bluetooth 2.0.USB Adapter DFU - 000d WL-168 Wireless Network Adapter 54g - 0017 WL-182 - 0019 Bluetooth 2.0 adapter 10m CN-512v2 001 - 001a Bluetooth 2.0 adapter 100m CN-521v2 001 - 061c LN-028 - 21f4 44 St Bluetooth Device - 2200 Sitecom bluetooth2.0 class 2 dongle CN-512 - 2208 Sitecom bluetooth2.0 class 2 dongle CN-520 - 2209 Sitecom bluetooth2.0 class 1 dongle CN-521 - 9071 zd1211 802.11g Adapter - 9075 ZD1211B - 90ac WL-172 - 9712 WL-113 rev 2 -0df7 Mobile Action Technology, Inc. - 0620 MA-620 Infrared Adapter - 0700 MA-700 Bluetooth Adapter - 0720 MA-720 Bluetooth Adapter - 0722 Bluetooth Dongle - 0800 Data Cable - 0820 Data Cable - 1800 Generic Card Reader - 1802 Card Reader -0dfa Toyo Communication Equipment Co., Ltd -0dfc GeneralTouch Technology Co., Ltd - 0001 Touchscreen -0e03 Nippon Systemware Co., Ltd -0e08 Winbest Technology Co., Ltd -0e0c Gesytec - 0101 LonUSB LonTalk Network Adapter -0e16 JMTek, LLC -0e17 Walex Electronic, Ltd -0e1b Crewave -0e21 Cowon Systems, Inc. - 0300 iAudio CW200 - 0400 MP3 Player - 0510 iAudio X5 - 0513 iAudio X5, side USB port - 0520 iAudio M5 - 0700 iAudio U3 -0e22 Symbian Ltd. -0e23 Liou Yuane Enterprise Co., Ltd -0e25 VinChip Systems, Inc. -0e26 J-Phone East Co., Ltd -0e30 HeartMath LLC -0e34 Micro Computer Control Corp. -0e35 3Pea Technologies, Inc. -0e36 TiePie engineering - 0008 Handyscope HS3 - 0009 Handyscope HS3 (br) - 000a Handyscope HS4 - 000b Handyscope HS4 (br) - 000e Handyscope HS4 Diff - 000f Handyscope HS4 Diff (br) - 0010 Handyscope HS2 - 0018 Handyprobe HP2 - 0042 TiePieSCOPE HS801 - 00fd USB To Parallel adapter - 00fe USB To Parallel adapter -0e38 Stratitec, Inc. -0e39 Smart Modular Technologies, Inc. - 0137 Bluetooth Device -0e3a Neostar Technology Co., Ltd - 1100 CW-1100 Wireless Network Adapter -0e3b Mansella, Ltd -0e41 Line6, Inc. - 4250 BassPODxt - 4252 BassPODxt Pro - 4642 BassPODxt Live - 4650 PODxt Live - 4750 GuitarPort - 5044 PODxt - 5050 PODxt Pro - 534d SeaMonkey -0e44 Sun-Riseful Technology Co., Ltd. -0e48 Julia Corp., Ltd - 0100 CardPro SmartCard Reader -0e4a Shenzhen Bao Hing Electric Wire & Cable Mfr. Co. -0e4c Radica Games, Ltd -0e55 Speed Dragon Multimedia, Ltd - 110b MS3303H USB-to-Serial Bridge -0e56 Kingston Technology Company, Inc. - 6021 K-PEX 100 -0e5a Active Co., Ltd -0e5b Union Power Information Industrial Co., Ltd -0e5c Bitland Information Technology Co., Ltd - 6118 LCD Device - 6119 remote receive and control device - 6441 C-Media Sound Device -0e5d Neltron Industrial Co., Ltd -0e66 Hawking - 400b UF100 10/100 Network Adapter - 400c UF100 Ethernet [pegasus2] -0e67 Fossil, Inc. - 0002 Wrist PDA -0e6a Megawin Technology Co., Ltd -0e70 Tokyo Electronic Industry Co., Ltd -0e72 Hsi-Chin Electronics Co., Ltd -0e75 TVS Electronics, Ltd -0e79 Archos, Inc. - 1106 Pocket Medai Assistant - PMA400 -0e7b On-Tech Industry Co., Ltd -0e7e Gmate, Inc. - 0001 Yopy 3000 PDA - 1001 YP3X00 PDA -0e82 Ching Tai Electric Wire & Cable Co., Ltd -0e83 Shin An Wire & Cable Co. -0e8c Well Force Electronic Co., Ltd -0e8d MediaTek Inc. -0e8f GreenAsia Inc. - 0012 Joystick -0e90 WiebeTech, LLC - 0100 Storage Adapter V1 -0e91 VTech Engineering Canada, Ltd -0e92 C's Glory Enterprise Co., Ltd -0e93 eM Technics Co., Ltd -0e95 Future Technology Co., Ltd -0e96 Aplux Communications, Ltd - c001 TRUST 380 USB2 SPACEC@M -0e97 Fingerworks, Inc. -0e98 Advanced Analogic Technologies, Inc. -0e99 Parallel Dice Co., Ltd -0e9a TA HSING Industries, Ltd -0e9b ADTEC Corp. -0e9c Streamzap, Inc. - 0000 Streamzap Remote Control -0e9f Tamura Corp. -0ea0 Ours Technology, Inc. - 2126 7-in-1 Card Reader - 2168 Transcend JetFlash 2.0 / Astone USB Drive - 6803 OTI-6803 Flash Disk - 6808 OTI-6808 Flash Disk - 6828 OTI-6828 Flash Disk -0ea6 Nihon Computer Co., Ltd -0ea7 MSL Enterprises Corp. -0ea8 CenDyne, Inc. -0ead Humax Co., Ltd -0eb0 NovaTech - 9020 NovaTech NV-902W - 9021 RT2573 -0eb1 WIS Technologies, Inc. - 6666 WinFast WalkieTV TV Loader - 6668 WinFast WalkieTV TV Loader - 7007 WinFast WalkieTV WDM Capture -0eb2 Y-S Electronic Co., Ltd -0eb3 Saint Technology Corp. -0eb7 Endor AG -0ebe VWeb Corp. -0ebf Omega Technology of Taiwan, Inc. -0ec0 LHI Technology (China) Co., Ltd -0ec1 Abit Computer Corp. -0ec2 Sweetray Industrial, Ltd -0ec3 Axell Co., Ltd -0ec4 Ballracing Developments, Ltd -0ec5 GT Information System Co., Ltd -0ec6 InnoVISION Multimedia, Ltd -0ec7 Theta Link Corp. - 1008 So., Show 301 Digital Camera -0ecd Lite-On IT Corp. - 1400 CD\RW 40X -0ece TaiSol Electronics Co., Ltd -0ecf Phogenix Imaging, LLC -0ed1 WinMaxGroup - 6660 USB Flash Disk 64M-C - 6680 USB Flash Disk 64M-B - 7634 MP3 Player -0ed2 Kyoto Micro Computer Co., Ltd -0ed3 Wing-Tech Enterprise Co., Ltd -0ed5 Fiberbyte - e000 USB-inSync Device - f000 Fiberbyte USB-inSync Device - f201 Fiberbyte USB-inSync DAQ-2500X -0eda Noriake Itron Corp. -0edf e-MDT Co., Ltd - 2060 FID irock! 100 Series -0ee0 Shima Seiki Mfg., Ltd -0ee1 Sarotech Co., Ltd -0ee2 AMI Semiconductor, Inc. -0ee3 ComTrue Technology Corp. - 1000 Image Tank 1.5 -0ee4 Sunrich Technology, Ltd -0eee Digital Stream Technology, Inc. - 8810 Mass Storage Drive -0eef D-WAV Scientific Co., Ltd - 0001 eGalax TouchScreen - 0002 Touchscreen Controller(Professional) -0ef0 Hitachi Cable, Ltd -0ef1 Aichi Micro Intelligent Corp. -0ef2 I/O Magic Corp. -0ef3 Lynn Products, Inc. -0ef4 DSI Datotech -0ef5 PointChips - 2202 Flash Disk - 2366 Flash Disk -0ef6 Yield Microelectronics Corp. -0ef7 SM Tech Co., Ltd (Tulip) -0efd Oasis Semiconductor -0efe Wem Technology, Inc. -0f06 Visual Frontier Enterprise Co., Ltd -0f08 CSL Wire & Plug (Shen Zhen) Co. -0f0c CAS Corp. -0f0d Hori Co., Ltd -0f0e Energy Full Corp. -0f12 Mars Engineering Corp. -0f13 Acetek Technology Co., Ltd -0f19 Oracom Co., Ltd -0f1b Onset Computer Corp. -0f1c Funai Electric Co., Ltd -0f1d Iwill Corp. -0f21 IOI Technology Corp. -0f22 Senior Industries, Inc. -0f23 Leader Tech Manufacturer Co., Ltd -0f24 Flex-P Industries, Snd., Bhd. -0f2d ViPower, Inc. -0f2e Geniality Maple Technology Co., Ltd -0f2f Priva Design Services -0f30 Jess Technology Co., Ltd - 001c PS3 Guitar Controller Dongle - 0110 10-Button Joypad -0f31 Chrysalis Development -0f32 YFC-BonEagle Electric Co., Ltd -0f37 Kokuyo Co., Ltd -0f38 Nien-Yi Industrial Corp. -0f3d Airprime, Incorporated - 0112 CDMA 1xEVDO PC Card, PC 5220 -0f41 RDC Semiconductor Co., Ltd -0f42 Nital Consulting Services, Inc. -0f44 Polhemus - ef11 Patriot (firmware not loaded) - ef12 Patriot - ff11 Liberty (firmware not loaded) - ff12 Liberty -0f4b St. John Technology Co., Ltd -0f4c WorldWide Cable Opto Corp. -0f4d Microtune, Inc. - 1000 Bluetooth Dongle -0f4e Freedom Scientific -0f52 Wing Key Electrical Co., Ltd -0f53 Dongguan White Horse Cable Factory, Ltd -0f54 Kawai Musical Instruments Mfg. Co., Ltd -0f55 AmbiCom, Inc. -0f5c Prairiecomm, Inc. -0f5d NewAge International, LLC - 9455 Compact Drive -0f5f Key Technology Corp. -0f60 NTK, Ltd -0f61 Varian, Inc. -0f62 Acrox Technologies Co., Ltd - 1001 Targus Mini Trackball Optical Mouse -0f68 Kobe Steel, Ltd -0f69 Dionex Corp. -0f6a Vibren Technologies, Inc. -0f6e INTELLIGENT SYSTEMS - 0100 GameBoy Color Emulator - 0201 GameBoy Advance Flash Gang Writer - 0202 GameBoy Advance Capture - 0300 Gamecube DOL Viewer - 0400 NDS Emulator - 0401 NDS UIC - 0402 NDS Writer - 0403 NDS Capture - 0404 NDS Emulator (Lite) -0f73 DFI -0f7c DQ Technology, Inc. -0f7d NetBotz, Inc. -0f7e Fluke Corp. -0f88 VTech Holdings, Ltd - 3012 RT2570 - 3014 ZD1211B -0f8b Yazaki Corp. -0f8c Young Generation International Corp. -0f8d Uniwill Computer Corp. -0f8e Kingnet Technology Co., Ltd -0f8f Soma Networks -0f97 CviLux Corp. -0f98 CyberBank Corp. -0f9c Hyun Won, Inc. - 0301 M-Any Premium DAH-610 MP3/WMA Player - 0332 mobiBLU DAH-1200 MP3/Ogg Player -0f9e Lucent Technologies -0fa3 Starconn Electronic Co., Ltd -0fa4 ATL Technology -0fa5 Sotec Co., Ltd -0fa7 Epox Computer Co., Ltd -0fa8 Logic Controls, Inc. -0faf Winpoint Electronic Corp. -0fb0 Haurtian Wire & Cable Co., Ltd -0fb1 Inclose Design, Inc. -0fb2 Juan-Chern Industrial Co., Ltd -0fb8 Wistron Corp. - 0002 eHome Infrared Receiver -0fb9 AACom Corp. -0fba San Shing Electronics Co., Ltd -0fbb Bitwise Systems, Inc. -0fc1 Mitac Internatinal Corp. -0fc2 Plug and Jack Industrial, Inc. -0fc5 Delcom Engineering - 1222 I/O Development Board -0fc6 Dataplus Supplies, Inc. -0fca Research In Motion, Ltd. - 0001 Blackberry Handheld -0fce Sony Ericsson Mobile Communications AB - 1010 WMC Modem - d008 V800-Vodafone 802SE WMC Modem - d016 K750i Phone - d017 K608i Phone - d019 VDC EGPRS Modem - d025 520 WMC Data Modem - d038 W850i Phone - d041 K510i Phone - d042 W810i Phone - d046 K610i Phone -0fcf Dynastream Innovations, Inc. -0fd0 Tulip Computers B.V. -0fd1 Giant Electronics Ltd. -0fd4 Tenovis GmbH & Co., KG -0fd5 Direct Access Technology, Inc. -0fdc Micro Plus -0fe4 IN-Tech Electronics, Ltd -0fe5 Greenconn (U.S.A.), Inc. -0fe9 DVICO - db00 FusionHDTV DVB-T (MT352+LgZ201) (uninitialized) - db01 FusionHDTV DVB-T (MT352+LgZ201) (initialized) - db10 FusionHDTV DVB-T (MT352+Thomson7579) (uninitialized) - db11 FusionHDTV DVB-T (MT352+Thomson7579) (initialized) -0fea United Computer Accessories -0feb CRS Electronic Co., Ltd -0fec UMC Electronics Co., Ltd -0fed Access Co., Ltd -0fee Xsido Corp. -0fef MJ Research, Inc. -0ff6 Core Valley Co., Ltd -0ff7 CHI SHING Computer Accessories Co., Ltd -0fff Aopen, Inc. -1000 Speed Tech Corp. -1001 Ritronics Components (S) Pte., Ltd -1003 Sigma Corp. - 0100 Sigma SD10 -1004 LG Electronics, Inc. - 1fae U8120 3G Cellphone - 6000 VX4400/VX6000 Cellphone - 6005 T5100 - 6800 CDMA Modem - 7000 LG LDP-7024D(LD)USB -1005 Apacer Technology, Inc. - 1001 MP3 Player - 1004 MP3 Player - 1006 MP3 Player - b113 Handy Steno 2.0/HT203 - b223 CD-RW + 6 in 1 Card Reader Digital Storage / Converter -1006 iRiver, Ltd. - 3001 iHP-100 - 3002 iHP-120/140 MP3 Player - 3003 H320/H340 - 3004 H340 (mtp) -1009 Emuzed, Inc. - 000e eHome Infrared Receiver - 0013 Angel MPEG Device - 0015 Lumanate Wave PAL SECAM DVBT Device - 0016 Lumanate Wave NTSC/ATSC Combo Device -100a AV Chaseway, Ltd - 2402 MP3 Player - 2404 MP3 Player - 2405 MP3 Player - 2406 MP3 Player - a0c0 MP3 Player -100b Chou Chin Industrial Co., Ltd -100d Netopia, Inc. - 3342 Cayman 3352 DSL Modem - 3382 3380 Series Network Interface - cb01 Cayman 3341 Ethernet DSL Router -1010 Fukuda Denshi Co., Ltd -1011 Mobile Media Tech. - 0001 AccFast Mp3 -1012 SDKM Fibres, Wires & Cables Berhad -1013 TST-Touchless Sensor Technology AG -1014 Densitron Technologies PLC -1015 Softronics Pty., Ltd -1016 Xiamen Hung's Enterprise Co., Ltd -1017 Speedy Industrial Supplies, Pte., Ltd -1019 Elitegroup Computer Systems (ECS) - 0c55 USB Flash Reader, Desknote UCR-61S2B -1020 Labtec - 000a Wireless Optical Mouse -1022 Shinko Shoji Co., Ltd -1025 Hyper-Paltek - 005e USB DVB-T device - 005f USB DVB-T device - 0300 MP3 Player - 0350 MP3 Player -1026 Newly Corp. -1027 Time Domain -1028 Inovys Corp. -1029 Atlantic Coast Telesys -102a Ramos Technology Co., Ltd -102b Infotronic America, Inc. -102c Etoms Electronics Corp. - 6251 Q-Cam -102d Winic Corp. -1031 Comax Technology, Inc. -1032 C-One Technology Corp. -1033 Nucam Corp. - 0068 3,5'' HDD case MD-231 -1038 Ideazon, Inc. - 0100 Zboard -1039 devolo AG - 2140 dsl+ 1100 duo -103d Stanton - 0100 ScratchAmp - 0101 ScratchAmp -1043 iCreate Technologies Corp. - 160f Wireless Network Adapter - 4901 AV-836 Video Capture Device - 8006 Flash Disk 32-256 MB -1044 Chu Yuen Enterprise Co., Ltd - 7001 U7000 TV tuner device - 8001 GN-54G - 8002 GN-BR402W - 8003 GN-WLBM101 - 8004 GN-WLBZ101 802.11b Adapter - 8005 GN-WLBZ201 802.11b Adapter - 8006 GN-WBZB-M 802.11b Adapter - 8007 GN-WBKG - 8008 GN-WB01GS - 800a GN-WI05GS - 800b GN-WB30N 802.11n WLAN Card -1046 Winbond Electronics Corp. [hex] - 8901 Bluetooth Device - 9967 W9967CF/W9968CF WebCam IC -1048 Targus Group International -104c AMCO TEC International, Inc. -1053 Immanuel Electronics Co., Ltd -1054 BMS International Beheer N.V. - 5004 DSL 7420 Loader - 5005 DSL 7420 LAN Modem -1055 Complex Micro Interconnection Co., Ltd -1056 Hsin Chen Ent Co., Ltd -1057 ON Semiconductor -1058 Western Digital Technologies, Inc. - 0200 Firewire USB Combo - 0400 External HDD - 0500 hub - 0702 Passport External HDD - 0901 MyBook External HDD - 1001 External Hard Disk -1059 Giesecke & Devrient GmbH - 000b StarSign Bio Token 3.0 -105c Hong Ji Electric Wire & Cable (Dongguan) Co., Ltd -105d Delkin Devices, Inc. -105e Valence Semiconductor Design, Ltd -105f Chin Shong Enterprise Co., Ltd -1060 Easthome Industrial Co., Ltd -1063 Motorola Electronics Taiwan, Ltd [hex] - 1555 MC141555 Hub - 4100 SB4100 USB Cable Modem -1065 CCYU Technology - 0020 USB-DVR2 Dev Board - 2136 EasyDisk ED1064 -106a Loyal Legend, Ltd -106c Curitel Communications, Inc. - 1101 CDMA 2000 1xRTT USB modem (HX-550C) - 1102 Packet Service - 1103 Packet Service Diagnostic Serial Port (WDM) - 1104 Packet Service Diagnostic Serial Port (WDM) - 1105 Composite Device - 1106 Packet Service Diagnostic Serial Port (WDM) - 1301 Composite Device - 1302 Packet Service Diagnostic Serial Port (WDM) - 1303 Packet Service - 1304 Packet Service - 1401 Composite Device - 1402 Packet Service - 1403 Packet Service Diagnostic Serial Port (WDM) - 1501 Packet Service - 1502 Packet Service Diagnostic Serial Port (WDM) - 1503 Packet Service - 1601 Packet Service - 1602 Packet Service Diagnostic Serial Port (WDM) - 1603 Packet Service - 2101 AudioVox 8900 Cell Phone - 2102 Packet Service - 2103 Packet Service Diagnostic Serial Port (WDM) - 2301 Packet Service - 2302 Packet Service Diagnostic Serial Port (WDM) - 2303 Packet Service - 2401 Packet Service Diagnostic Serial Port (WDM) - 2402 Packet Service - 2403 Packet Service Diagnostic Serial Port (WDM) - 2501 Packet Service - 2502 Packet Service Diagnostic Serial Port (WDM) - 2503 Packet Service - 2601 Packet Service - 2602 Packet Service Diagnostic Serial Port (WDM) - 2603 Packet Service - 3701 Broadband Wireless modem - 3702 Pantech PX-500 - 3eb4 Packet Service Diagnostic Serial Port (WDM) - 4101 Packet Service Diagnostic Serial Port (WDM) - 4102 Packet Service - 4301 Composite Device - 4302 Packet Service Diagnostic Serial Port (WDM) - 4401 Composite Device - 4402 Packet Service - 4501 Packet Service - 4502 Packet Service Diagnostic Serial Port (WDM) - 4601 Composite Device - 4602 Packet Service Diagnostic Serial Port (WDM) - 5101 Packet Service - 5102 Packet Service Diagnostic Serial Port (WDM) - 5301 Packet Service Diagnostic Serial Port (WDM) - 5302 Packet Service - 5401 Packet Service - 5402 Packet Service Diagnostic Serial Port (WDM) - 5501 Packet Service Diagnostic Serial Port (WDM) - 5502 Packet Service - 5601 Packet Service Diagnostic Serial Port (WDM) - 5602 Packet Service - 7101 Composite Device - 7102 Packet Service - a000 Packet Service - a001 Packet Service Diagnostic Serial Port (WDM) - c100 Packet Service - c200 Packet Service - c500 Packet Service Diagnostic Serial Port (WDM) - e200 Packet Service -106d San Chieh Manufacturing, Ltd -106e ConectL -106f Money Controls -1076 GCT Semiconductor, Inc. - 0031 Bluetooth Device - 0032 Bluetooth Device -107d Arlec Australia, Ltd -107e Midoriya Electric Co., Ltd -107f KidzMouse, Inc. -1082 Shin-Etsukaken Co., Ltd -1083 Canon Electronics, Inc. -1084 Pantech Co., Ltd -108a Chloride Power Protection -108b Grand-tek Technology Co., Ltd -108c Robert Bosch GmbH -108e Lotes Co., Ltd. -1099 Surface Optics Corp. -109a DATASOFT Systems GmbH -109f eSOL Co., Ltd - 3163 Trigem Mobile SmartDisplay84 - 3164 Trigem Mobile SmartDisplay121 -10a0 Hirotech, Inc. -10a3 Mitsubishi Materials Corp. -10a9 SK Teletech Co., Ltd -10aa Cables To Go -10ab USI Co., Ltd - 1002 Bluetooth Device - 1003 BC02-EXT in DFU - 1005 Bluetooth Adptr - 1006 BC04-EXT in DFU - 10c5 Sony-Ericsson / Samsung DataCable -10ac Honeywell, Inc. -10ae Princeton Technology Corp. -10af Liebert Corp. - 0000 UPS - 0001 PowerSure PSA UPS - 0002 PowerSure PST UPS - 0003 PowerSure PSP UPS - 0004 PowerSure PSI UPS - 0005 UPStation GXT 2U UPS - 0006 UPStation GXT UPS - 0007 Nfinity Power Systems UPS - 0008 PowerSure Interactive UPS -10b5 Comodo (PLX?) - 9060 Test Board -10b8 DiBcom - 0bb8 DiBcom USB DVB-T reference design (MOD300) (cold) - 0bb9 DiBcom USB DVB-T reference design (MOD300) (warm) - 0bc6 DiBcom USB2.0 DVB-T reference design (MOD3000P) (cold) - 0bc7 DiBcom USB2.0 DVB-T reference design (MOD3000P) (warm) -10bb TM Technology, Inc. -10bc Dinging Technology Co., Ltd -10bd TMT Technology, Inc. - 1427 Ethernet -10bf SmartHome - 0001 SmartHome PowerLinc -10c4 Cygnal Integrated Products, Inc. - 0002 F32x USBXpress Device - 80a9 CP210x to UART Bridge Controller - 80ca ATM2400 Sensor Device - ea60 CP210x Composite Device -10c5 Sanei Electric, Inc. -10c6 Intec, Inc. -10cb Eratech -10cc GBM Connector Co., Ltd - 1101 MP3 Player -10cd Kycon, Inc. -10ce Silicon Labs - ea6a MobiData EDGE USB Modem -10cf Velleman Components, Inc. - 5500 8055 Experiment Interface Board (address=0) - 5501 8055 Experiment Interface Board (address=1) - 5502 8055 Experiment Interface Board (address=2) - 5503 8055 Experiment Interface Board (address=3) -10d1 Hottinger Baldwin Measurement - 0101 USB-Module for Spider8, CP32 - 0202 CP22 - Communication Processor - 0301 CP42 - Communication Processor -10d4 Man Boon Manufactory, Ltd -10d5 Uni Class Technology Co., Ltd -10d6 Actions Semiconductor Co., Ltd - 1000 MP3 Player - 1100 MPMan MP-Ki 128 MP3 Player/Recorder - 1101 D-Wave 2GB MP4 Player - 8888 ADFU Device - ff51 ADFU Device -10de Authenex, Inc. -10df In-Win Development, Inc. -10e0 Post-Op Video, Inc. -10e1 CablePlus, Ltd -10e2 Nada Electronics, Ltd -10ec Vast Technologies, Inc. -10f5 Turtle Beach - 0200 Audio Advantage Roadie -10fb Pictos Technologies, Inc. -10fd Anubis Electronics, Ltd - 804d Typhoon Webshot II Webcam [zc0301] - 8050 FlyCAM-USB 300 XP2 - de00 WinFast WalkieTV WDM Capture Driver. -1100 VirTouch, Ltd - 0001 VTPlayer VTP-1 Braille Mouse -1101 EasyPass Industrial Co., Ltd - 0001 FSK Electronics Super GSM Reader -1108 Brightcom Technologies, Ltd -1110 Analog Devices Canada, Ltd (Allied Telesyn) - 5c01 Huawei MT-882 Remote NDIS Network Device - 6489 ADSL ETH/USB RTR - 9000 ADSL LAN Adapter - 9001 ADSL Loader - 900f AT-AR215 DSL Modem - 9010 AT-AR215 DSL Modem - 9021 ADSL WAN Adapter - 9022 ADSL Loader - 9023 ADSL WAN Adapter - 9024 ADSL Loader - 9031 ADSL LAN Adapter - 9032 ADSL Loader -1111 Pandora International Ltd. - 8888 Evolution Device -1112 YM ELECTRIC CO., Ltd -1113 Medion AG -111e VSO Electric Co., Ltd -112e Master Hill Electric Wire and Cable Co., Ltd -112f Cellon International, Inc. -1130 Tenx Technology, Inc. - f211 USB audio headset -1131 Integrated System Solution Corp. - 1001 KY-BT100 Bluetooth Adapter - 1002 Bluetooth Device - 1003 Bluetooth Device - 1004 Bluetooth Device -1132 Toshiba Corp., Digital Media Equipment [hex] - 4331 PDR-M4/M5/M70 Digital Camera - 4332 PDR-M60 Digital Camera - 4333 PDR-M2300/PDR-M700 - 4334 PDR-M65 - 4335 PDR-M61 - 4337 PDR-M11 - 4338 PDR-M25 -113c Arin Tech Co., Ltd -113d Mapower Electronics Co., Ltd -1141 V One Multimedia, Pte., Ltd -1142 CyberScan Technologies, Inc. -1145 Japan Radio Company - 0001 AirH PHONE AH-J3001V/J3002V -1146 Shimane SANYO Electric Co., Ltd. -1147 Ever Great Electric Wire and Cable Co., Ltd -114b Sphairon Access Systems GmbH - 0110 Turbolink UB801R WLAN USB Adapter -114c Tinius Olsen Testing Machine Co., Inc. -114d Alpha Imaging Technology Corp. -115b Salix Technology Co., Ltd. -1162 Secugen Corp. -1163 DeLorme Publishing, Inc. - 0100 Earthmate GPS -1164 YUAN High-Tech Development Co., Ltd - 0300 ELSAVISION 460D - 0601 Analog TV Tuner - 0900 TigerBird BMP837 USB2.0 WDM Encoder - 0bc7 Digital TV Tuner -1165 Telson Electronics Co., Ltd -1166 Bantam Interactive Technologies -1167 Salient Systems Corp. -1168 BizConn International Corp. -116e Gigastorage Corp. -116f Silicon 10 Technology Corp. -1175 Shengyih Steel Mold Co., Ltd -117d Santa Electronic, Inc. -117e JNC, Inc. -1182 Venture Corp., Ltd -1183 Compaq Computer Corp. [hex] (Digital Dream ??) - 0001 DigitalDream l'espion XS - 19c7 ISDN TA - 4008 56k FaxModem - 504a PJB-100 Personal Jukebox -1184 Kyocera Elco Corp. -1188 Bloomberg L.P. -1189 Acer Communications & Multimedia - 0893 EP-1427X-2 Ethernet Adapter -118f You Yang Technology Co., Ltd -1190 Tripace -1191 Loyalty Founder Enterprise Co., Ltd -1196 Yankee Robotics, LLC - 0010 Trifid Camera without code - 0011 Trifid Camera -1197 Technoimagia Co., Ltd -1198 StarShine Technology Corp. -1199 Sierra Wireless, Inc. - 0019 AC595U - 0021 AC597E - 0110 Composite Device - 0112 CDMA 1xEVDO PC Card, AirCard 580 - 0120 AC595U - 0218 MC5720 Wireless Modem - 6467 MP Series Network Adapter - 6468 MP Series Network Adapter - 6469 MP Series Network Adapter - 6802 MC8755 Device - 6803 MC8765 Device - 6804 MC8755 Device - 6805 MC8765 Device - 6812 MC8775 Device - 6820 AC875 Device - 6832 MC8780 Device - 6833 MC8781 Device - 683a MC8785 Device - 6850 AirCard 880 Device - 6851 AirCard 881 Device - 6852 AirCard 880E Device - 6853 AirCard 881E Device - 6854 AirCard 885 Device - 6870 MC8780 Device - 6871 MC8781 Device -119a ZHAN QI Technology Co., Ltd -119b ruwido austria GmbH - 0400 Infrared Keyboard V2.01 -11a0 Chipcon AS - eb11 CC2400EB 2.0 ZigBee Sniffer -11a3 Technovas Co., Ltd - 8031 MP3 Player - 8032 MP3 Player -11aa GlobalMedia Group, LLC - 1518 iREZ K2 -11ab Exito Electronics Co., Ltd -11b0 ATECH FLASH TECHNOLOGY -11db Topfield Co., Ltd. - 1000 PVR - 1100 PVR -11e6 K.I. Technology Co. Ltd. -11f5 Siemens AG (?) - 0001 SX1 - 0003 Mobile phone USB cable - 0004 X75 -11f6 Prolific - 2001 Willcom WSIM -11f7 Alcatel (?) - 02df TD10 Mobile phone USB cable -1209 InterBiometrics - 1001 USB Hub - 1002 USB Relais - 1003 IBSecureCam-P - 1004 IBSecureCam-O - 1005 IBSecureCam-N -120e Hudson Soft Co., Ltd -121e Jungsoft Co., Ltd - 3403 Muzio JM250 Audio Player -1223 SKYCABLE ENTERPRISE. CO., LTD. -1230 Chipidea-Microelectronica, S.A. -1235 Novation EMS - 0001 ReMOTE Audio/XStation - 0002 Speedio - 4661 ReMOTE25 -1241 Belkin - 1111 Mouse - 1122 Typhoon Stream Optical Mouse USB+PS/2 - 1155 PS2/USB Browser Combo Mouse - 1166 MI-2150 Trust Mouse - 1177 F8E842-DL Mouse - 1503 Keyboard -124a AirVast - 4017 PC-Chips 802.11b Adapter -124b Nyko (Honey Bee) - 4d01 Airflo EX Joystick -125f A-DATA Technology Co., Ltd. -1264 Covidien Energy-based Devices -1267 Logic3 / SpectraVideo plc - 0103 G-720 Keyboard - 0201 A4Tech SWOP-3 Mouse - a001 JP260 PC Game Pad - c002 Wireless Optical Mouse -126c Aristocrat Technologies -126d Bel Stewart -126e Strobe Data, Inc. -126f TwinMOS - 1325 Mobile Disk - 2168 Mobile Disk III - a006 G240 -1275 Xaxero Marine Software Engineering, Ltd. - 0002 WeatherFax 2000 Demodulator - 0080 SkyEye Weather Satellite Receiver -1286 Marvell Semiconductor, Inc. - 8001 BLOB boot loader firmware -1292 Innomedia - 0258 Creative Labs VoIP Blaster -1293 Belkin Components [hex] - 0002 F5U002 Parallel Port [uss720] - 2101 104-key keyboard -1294 RISO KAGAKU CORP. -129b CyberTAN Technology - 1666 TG54USB -12a7 Trendchip Technologies Corp. -12ab Honey Bee Electronic International Ltd. -12ba Licensed by Sony Computer Entertainment America - 0200 Harmonix Guitar for PlayStation(R)3 - 0210 Harmonix Drum Kit for PlayStation(R)3 -12d1 Huawei Technologies Co., Ltd. - 1001 E620 USB Modem - 1003 E220 HSDPA Modem / E270 HSDPA/HSUPA Modem -12d2 LINE TECH INDUSTRIAL CO., LTD. -12d7 BETTER WIRE FACTORY CO., LTD. -12ef Tapwave, Inc. - 0100 Tapwave Handheld [Tapwave Zodiac] -12f5 Dynamic System Electronics Corp. -12f7 Memorex Products, Inc. - 1a00 TD Classic 003B - 1e23 TravelDrive 2007 Flash Drive -12fd AIN Comm. Technology Co., Ltd - 1001 AWU2000b 802.11b Stick -1307 Transcend Information, Inc. - 0163 512MB USB Flash Drive - 1169 TS2GJF210 JetFlash 210 2GB -1310 Roper - 0001 Class 1 Bluetooth Dongle -1312 ICS Electronics -131d Natural Point - 0155 TrackIR 3 Pro Head Tracker -132b Konica Minolta - 0000 Dimage A2 Camera - 0001 Minolta DiMAGE A2 (ptp) - 0003 Dimage Xg Camera - 0006 Dimage Z2 Camera - 0007 Minolta DiMAGE Z2 (PictBridge mode) - 0008 Dimage X21 Camera - 000a Dimage Scan Dual IV - 000b Dimage Z10 Camera - 000d Dimage X50 Camera [storage?] - 000f Dimage X50 Camera [p2p?] - 0010 Dimage G600 Camera - 0012 Dimage Scan Elite5400 2 - 0013 Dimage X31 Camera - 0015 Dimage G530 Camera - 0017 Dimage Z3 Camera - 0018 Minolta DiMAGE Z3 (PictBridge mode) - 0019 Dimage A200 Camera - 0021 Dimage Z5 Camera - 0022 Minolta DiMAGE Z5 (PictBridge mode) -1342 Mobility - 0200 EasiDock 200 Hub - 0201 EasiDock 200 Keyboard and Mouse Port - 0202 EasiDock 200 Serial Port - 0203 EasiDock 200 Printer Port - 0204 Ethernet - 0304 EasiDock Ethernet -1348 Katsuragawa Electric Co., Ltd. -134e Digby's Bitpile, Inc. DBA D Bit -136b STEC -1370 Swissbit - 6828 Victorinox Flash Drive -1371 Dick Smith Electronics - 9022 RT2573 - 9032 C-Net CWD-854 rev F -1376 Vimtron Electronics Co., Ltd. -1385 Netgear, Inc - 4250 WG111T - 4251 WG111T (no firmware) - 5f00 WPN111 RangeMax(TM) Wireless USB 2.0 Adapter - 5f01 WPN111 (no firmware) -138e Jungo LTD - 9000 Raisonance S.A. STM32 ARM evaluation board -1390 TOMTOM B.V. -1395 Sennheiser Communications - 3556 USB Headset -1398 Q-tec - 2103 USB 2.0 Storage Device -13ad Baltech - 9999 Card reader -13b0 PerkinElmer Optoelectronics - 000a Alesis Photon X25 MIDI Controller -13b1 Linksys - 000b WUSB11 v4.0 802.11b Adapter - 000d WUSB54G Wireless Adapter - 0011 WUSB54GP v4.0 802.11g Adapter - 0018 USB200M 10/100 Ethernet Adapter - 001a HU200TS Wireless Adapter - 0020 WUSB54GC 802.11g Adapter [ralink rt73] - 0023 WUSB54GR - 0024 WUSBF54G v1.1 802.11g Adapter w/ Wi-Fi Finder -13b3 Nippon Dics Co., Ltd. -13be Ricoh Printing Systems, Ltd. -13ca JyeTai Precision Industrial Co., Ltd. -13cf Wisair Ltd. -13d1 A-Max Technology Macao Commercial Offshore Co. Ltd. -13d2 Shark Multimedia - 0400 Pocket Ethernet [klsi] -13d3 IMC Networks - 3201 VisionDTV USB-Ter/HAMA USB DVB-T device cold - 3202 VisionDTV USB-Ter/HAMA USB DVB-T device warm - 3203 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - 3204 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - 3205 DNTV Live! Tiny USB2 BDA (No Remote) - 3206 DNTV Live! Tiny USB2 BDA (No Remote) - 3207 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - 3208 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - 3209 DTV-DVB UDST7022BDA DVB-S Box(Without HID) - 3211 DTV-DVB Hybrid Analog/Capture / Pinnacle PCTV 310e - 3212 DTV-DVB UDTT704C - DVBT/NTSC/PAL Driver(PCM4) - 3213 DTV-DVB UDTT704D - DVBT/NTSC/PAL Driver (PCM4) - 3214 DTV-DVB UDTT704F -(MiniCard) DVBT/NTSC/PAL Driver(Without HID) - 3215 DTV-DVB UDAT7240 - ATSC/NTSC/PAL Driver(PCM4) - 3216 DTV-DVB UDTT 7047-USB 2.0 DVB-T Driver - 3217 Digital-TV Receiver. - 3219 DTV-DVB UDTT7049 - DVB-T Driver(Without HID) - 3220 DTV-DVB UDTT 7047M-USB 2.0 DVB-T Driver - 3223 DNTV Live! Tiny USB2 BDA (No Remote) - 3224 DNTV Live! Tiny USB2 BDA (No Remote) - 3226 DigitalNow TinyTwin DVB-T Receiver - 3236 DTV-DVB UDTT 7047A-USB 2.0 DVB-T Driver - 3237 DTV-DVB UDTT 704J - dual DVB-T Driver - 3239 DTV-DVB UDTT704D - DVBT/NTSC/PAL Driver(Without HID) - 3240 DTV-DVB UDXTTM6010 - A/D Driver(Without HID) - 3241 DTV-DVB UDXTTM6010 - A/D Driver(Without HID) - 3242 DTV-DVB UDAT7240LP - ATSC/NTSC/PAL Driver(Without HID) - 3243 DTV-DVB UDXTTM6010 - A/D Driver(Without HID) - 3244 DTV-DVB UDTT 7047Z-USB 2.0 DVB-T Driver - 3247 802.11 n/g/b Wireless LAN Adapter - 7020 DTV-DVB UDST7020BDA DVB-S Box(DVBS for MCE2005) - 7022 DTV-DVB UDST7022BDA DVB-S Box(Without HID) -13dc ALEREON, INC. -13dd i.Tech Dynamic Limited -13e1 Kaibo Wire & Cable (Shenzhen) Co., Ltd. -13e5 Rane - 0001 SL-1 -13e6 TechnoScope Co., Ltd. -13fd Initio Corporation -13fe Kingston Technology Company Inc. - 1a00 512MB/1GB Flash Drive - 1a23 512MB Flash Drive - 1d00 DataTraveler 2.0 1GB/4GB Flash Drive / Patriot Xporter 4GB Flash Drive - 1f00 DataTraveler 2.0 4GB Flash Drive -1400 Axxion Group Corp. -1402 Bowe Bell & Howell -1403 Sitronix - 0001 Digital Photo Frame -140e Telechips, Inc. -1410 Novatel Wireless - 1110 Merlin S620 - 1120 Merlin EX720 - 1130 Merlin S720 - 1400 Merlin U740 - 2110 Ovation U720/MCD3000 - 4100 U727 -1415 Nam Tai E&E Products Ltd. or OmniVision Technologies, Inc. - 0000 Sony SingStar USBMIC - 2000 Sony Playstation Eye -1419 ABILITY ENTERPRISE CO., LTD. -1429 Vega Technologies Industrial (Austria) Co. -1430 RedOctane -1431 Pertech Resources, Inc. -1435 Wistron NeWeb - 0711 UR055G - 0826 AR5523 - 0827 AR5523 (no firmware) - 0828 AR5523 - 0829 AR5523 (no firmware) -1436 Denali Software, Inc. -143c Altek Corporation -1453 Radio Shack - 4026 26-183 Serial Cable -1456 Extending Wire & Cable Co., Ltd. -1457 First International Computer, Inc. - 5117 OpenMoko Neo1973 kernel usbnet (g_ether, CDC Ethernet) mode - 5118 OpenMoko Neo1973 Debug board (V2+) - 5119 OpenMoko Neo1973 u-boot cdc_acm serial port - 5120 OpenMoko Neo1973 u-boot usbtty generic serial - 5121 OpenMoko Neo1973 kernel mass storage (g_storage) mode - 5122 OpenMoko Neo1973 kernel cdc_ether USB network - 5123 OpenMoko Neo1973 internal USB CSR4 module - 5124 OpenMoko Neo1973 Bluetooth Device ID service -1461 Staccato Communications -1462 Micro Star International - 5512 MegaStick-1 Flash Stick -1472 Huawei-3Com - 0009 Aolynk WUB320g -147a Formosa Industrial Computing, Inc. - e015 eHome Infrared Receiver - e016 eHome Infrared Receiver -147f Hama GmbH & Co., KG -1484 Elsa AG [hex] - 1746 Ecomo 19H99 Monitor - 7616 Elsa Hub -1485 Silicom - 0001 U2E - 0002 Psion Gold Port Ethernet -1487 DSP Group, Ltd. -148e EVATRONIX SA -148f Ralink Technology, Corp. - 1706 RT2500USB Wireless Adapter - 2570 802.11g WiFi - 2573 RT2501USB Wireless Adapter - 2671 RT2601USB Wireless Adapter - 9020 RT2500USB Wireless Adapter - 9021 RT2501USB Wireless Adapter -1497 Panstrong Company Ltd. -149a Imagination Technologies - 2107 DBX1 DSP core -14aa AVerMedia (again) or C&E - 0001 Avermedia AverTV DVBT USB1.1 (cold) - 0002 Avermedia AverTV DVBT USB1.1 (warm) - 0201 AVermedia/Yakumo/Hama/Typhoon DVB-T USB2.0 (cold) - 0221 AVermedia DVBT Tuner Dongle - 0301 AVermedia/Yakumo/Hama/Typhoon DVB-T USB2.0 (warm) -14ad CTK Corporation -14ae Printronix Inc. -14af ATP Electronics Inc. -14b0 StarTech.com Ltd. -14b2 Atheros Communications Inc - 3a93 USB WLAN Device - 3c02 C54RU WLAN - 3c22 C54RU -14c0 Rockwell Automation, Inc. -14c2 Gemlight Computer, Ltd - 0250 Storage Adapter V2 - 0350 Storage Adapter V2 -14cd Super Top - 6600 USB 2.0 IDE DEVICE -14d8 JAMER INDUSTRIES CO., LTD. -14dd Raritan Computer, Inc. -14e5 SAIN Information & Communications Co., Ltd. -14ea Planex Communications - ab10 GW-US54GZ - ab11 GU-1000T - ab13 GW-US54Mini -14ed Shure Inc. -1500 Ellisys -1501 Pine-Tum Enterprise Co., Ltd. -1513 Hypercom -1516 CompUSA - 8628 128M Pen Drive -1518 Cheshire Engineering Corp. - 0001 HDReye High Dynamic Range Camera - 0002 HDReye (before firmware loads) -1520 Bitwire Corp. -1524 ENE Technology Inc - 6680 UTS 6680 -1527 Silicon Portals - 0200 YAP Phone (no firmware) - 0201 YAP Phone -1529 UBIQUAM Co., Ltd. - 3100 CDMA 1xRTT USB Modem (U-100/105/200/300/520) -152d JMicron Technology Corp. / JMicron USA Technology Corp. - 2338 JM20337 Hi-Speed USB to SATA & PATA Combo Bridge -152e LG (HLDS) - e001 GSA-5120D DVD-RW -1532 Razer USA, Ltd - 0001 RZ01-020300 Optical Mouse [Diamondback] - 0003 Krait Mouse - 0007 DeathAdder Mouse - 0102 Tarantula Keyboard -1546 U-Blox AG -154b PNY - 0010 USB 2.0 Flash Drive -154d ConnectCounty Holdings Berhad -154e D&M Holdings, Inc. (Denon/Marantz) - 3000 Marantz RC9001 Remote Control -1554 Prolink Microsystems Corp. -1557 OQO - 0002 model 01 WiFi interface - 0003 model 01 Bluetooth interface - 7720 model 01+ Ethernet - 8150 model 01 Ethernet interface -1568 Sunf Pu Technology Co., Ltd -156f Quantum Corporation -1570 ALLTOP TECHNOLOGY CO., LTD. -157b Ketron SRL -157e TRENDnet - 3006 TEW-444UB EU - 3007 TEW-444UB EU (no firmware) - 300a TEW-429UB 802.11g Adapter with HotSpot Detector - 300b TEW-429UB - 300d TEW-429UB C1 - 3204 ALL0298 v2 - 3205 AR5523 - 3206 AR5523 (no firmware) -1582 Fiberline - 6003 WL-430U -1587 SMA Technologie AG -158d Oakley Inc. -1598 Kunshan Guoji Electronics Co., Ltd. -15a2 Freescale Semiconductor, Inc. -15a8 Teams Power Limited -15aa Gearway Electronics (Dong Guan) Co., Ltd. -15ba Olimex Ltd. - 0003 OpenOCD JTAG - 0004 OpenOCD JTAG TINY -15c2 SoundGraph Inc. - ffdc iMON PAD Remote Controller -15c6 Laboratoires MXM - 1000 DigistimSP (cold) - 1001 DigistimSP (warm) - 1002 DigimapSP USB (cold) - 1003 DigimapSP USB (warm) -15c9 D-Box Technologies -15ca Textech International Ltd. - 00c3 Mini Optical Mouse -15d5 Coulomb Electronics Ltd. -15dc Hynix Semiconductor Inc. -15e0 Seong Ji Industrial Co., Ltd. -15e1 RSA - 2007 RSA SecurID (R) Authenticator -15e8 SohoWare - 9100 NUB100 Ethernet [pegasus] - 9110 10/100 USB Ethernet -15e9 Pacific Digital Corp. - 04ce MemoryFrame MF-570 - 1968 MemoryFrame MF-570 - 1969 Digital Frame -15ec Belcarra Technologies Corp. -15f4 HanfTek - 0001 HanfTek UMT-010 USB2.0 DVB-T (cold) - 0025 HanfTek UMT-010 USB2.0 DVB-T (warm) -1604 Tascam - 8000 US-428 Audio/Midi Controller (without fw) - 8001 US-428 Audio/Midi Controller - 8004 US-224 Audio/Midi Controller (without fw) - 8005 US-224 Audio/Midi Controller - 8006 US-122 Audio/Midi Interface (without fw) - 8007 US-122 Audio/Midi Interface -1606 Umax [hex] - 0002 Astra 1236U Scanner - 0010 Astra 1220U - 0030 Astra 2000U - 0050 Scanner - 0060 Astra 3400U - 0130 Astra 2100U - 0160 Astra 5400U - 0230 Astra 2200/2200SU - 0350 Astra 4800/4850 Scanner - 1030 Astra 4000U - 1220 Genesys Logic Scanner Controller NT5.0 - 2010 AstraCam Digital Camera - 2020 AstraCam 1000 - 2030 AstraCam 1800 Digital Camera -1608 Inside Out Networks [hex] - 0001 EdgePort/4 Serial Port - 0002 Edgeport/8 - 0003 Rapidport/4 - 0004 Edgeport/4 - 0005 Edgeport/2 - 0006 Edgeport/4i - 0007 Edgeport/2i - 0008 Edgeport/8 - 000c Edgeport/421 - 000d Edgeport/21 - 000e Edgeport/4 - 000f Edgeport/8 - 0010 Edgeport/2 - 0011 Edgeport/4 - 0012 Edgeport/416 - 0014 Edgeport/8i - 0018 Edgeport/412 - 0019 Edgeport/412 - 001a Edgeport/2+2i - 0101 Edgeport/4 - 0105 Edgeport/2 - 0106 Edgeport/4i - 0107 Edgeport/2i - 010c Edgeport/421 - 010d Edgeport/21 - 0110 Edgeport/2 - 0111 Edgeport/4 - 0112 Edgeport/416 - 0114 Edgeport/8i - 0201 Edgeport/4 - 0203 Rapidport/4 - 0204 Edgeport/4 - 0205 Edgeport/2 - 0206 Edgeport/4i - 0207 Edgeport/2i - 020c Edgeport/421 - 020d Edgeport/21 - 020e Edgeport/4 - 020f Edgeport/8 - 0210 Edgeport/2 - 0211 Edgeport/4 - 0212 Edgeport/416 - 0214 Edgeport/8i - 0215 Edgeport/1 - 0216 EPOS/44 - 0217 Edgeport/42 - 021a Edgeport/2+2i - 021b Edgeport/2c - 021c Edgeport/221c - 021d Edgeport/22c - 021e Edgeport/21c - 021f Edgeport/62 - 0240 Edgeport/1 - 0241 Edgeport/1i - 0242 Edgeport/4s - 0243 Edgeport/8s - 0244 Edgeport/8 - 0245 Edgeport/22c - 0301 Watchport/P - 0302 Watchport/M - 0303 Watchport/W - 0304 Watchport/T - 0305 Watchport/H - 0306 Watchport/E - 0307 Watchport/L - 0308 Watchport/R - 0309 Watchport/A - 030a Watchport/D - 030b Watchport/D - 030c Power Management Port - 030e Power Management Port - 030f Watchport/G - 0310 Watchport/Tc - 0311 Watchport/Hc - 1403 MultiTech Systems MT4X56 Modem - 1a17 Agilent Technologies (E6473) -1619 L & K Precision Technology Co., Ltd. -1621 Wionics Research -1628 Stonestreet One, Inc. -162a Airgo Networks Inc. -162f WiQuest Communications, Inc. -1631 Good Way Technology - 6200 GWUSB2E - c019 RT2573 -1645 Entrega [hex] - 0001 1S Serial Port - 0002 2S Serial Port - 0003 1S25 Serial Port - 0004 4S Serial Port - 0005 E45 Ethernet [klsi] - 0006 Parallel Port - 0007 U1-SC25 SCSI - 0008 Ethernet - 0016 Bi-directional to Parallel Printer Converter - 0080 1 port to Serial Converter - 0081 1 port to Serial Converter - 0093 1S9 Serial Port - 8000 EZ-USB - 8001 1 port to Serial - 8002 2x Serial Port - 8003 1 port to Serial - 8004 2U4S serial/usb hub - 8005 Ethernet - 8080 1 port to Serial - 8081 1 port to Serial - 8093 PortGear Serial Port -164a ChipX -1657 Struck Innovative Systeme GmbH - 3150 SIS3150 USB2.0 to VME interface -1660 Creatix Polymedia GmbH -1668 Actiontec Electronics, Inc. [hex] - 0009 Gateway - 0333 Modem - 0358 InternetPhoneWizard - 0405 Gateway - 0408 Prism2.5 802.11b Adapter - 0413 Gateway - 0421 Prism2.5 802.11b Adapter - 0441 IBM Integrated Bluetooth II - 0500 BTM200B BlueTooth Adapter - 1050 802.11g Wireless Mini adapter - 1441 IBM Integrated Bluetooth II - 2441 BMDC-2 IBM Bluetooth III w.56k - 3441 IBM Integrated Bluetooth III - 6010 Gateway - 6097 802.11b Wireless Adapter - 6106 ROPEX FreeLan 802.11b - 7605 UAT1 Wireless Ethernet Adapter -1669 PiKRON Ltd. [hex] - 1001 uLan2USB Converter - PS1 protocol -1679 Total Phase - 2001 Beagle USB 12 Protocol Analyzer -1682 Maxwise Production Enterprise Ltd. -1684 Godspeed Computer Corp. -1686 ZOOM Corporation - 0045 H4 Digital Recorder -1687 Kingmax Digital Inc. -168c Atheros Communications - 0001 AR5523 - 0002 AR5523 (no firmware) -1690 Askey Computer Corp. [hex] - 0101 Creative Modem Blaster DE5670 - 0102 CDC Modem Board - 0103 Askey 1456 VQE-R3 Modem [conexant] - 0104 HCF V90 Data Fax RTAD Modem - 0107 HCF V.90 Data,Fax,RTAD Modem - 0109 Askey MagicXpress V.90 Pocket Modem [conexant] - 0203 Voyager ADSL Modem Loader - 0204 Voyager ADSL Modem - 0205 DSL Modem - 0206 GlobeSpan ADSL WAN Modem - 0208 DSL Modem - 0209 Voyager 100 ADSL Modem - 0211 Globespan Virata ADSL LAN Modem - 0212 DSL Modem - 0213 HM121d DSL Modem - 0214 HM121d DSL Modem - 0215 Voyager 105 ADSL Modem - 0701 WLAN - 0710 SMCWUSBT-G - 0711 SMCWUSBT-G (no firmware) - 0712 AR5523 - 0713 AR5523 (no firmware) - 0715 Voyager 1055 Laptop Adapter - 0722 RT2573 - 0726 Wi-Fi Wireless LAN Adapter - 0901 Voyager 205 ADSL Router -1696 Hitachi Video and Information System, Inc. -1697 VTec Test, Inc. -16a5 Shenzhen Zhengerya Cable Co., Ltd. -16ab Global Sun Technology - 7801 AR5523 - 7802 AR5523 (no firmware) - 7811 AR5523 - 7812 AR5523 (no firmware) -16ac Dongguan ChingLung Wire & Cable Co., Ltd. -16c0 VOTI - 03e8 free for internal lab use 1000 - 03e9 free for internal lab use 1001 - 03ea free for internal lab use 1002 - 03eb free for internal lab use 1003 - 03ec free for internal lab use 1004 - 03ed free for internal lab use 1005 - 03ee free for internal lab use 1006 - 03ef free for internal lab use 1007 - 03f0 free for internal lab use 1008 - 03f1 free for internal lab use 1009 - 076b OpenPCD 13.56MHz RFID Reader - 076c OpenPICC 13.56MHz RFID Simulator (native) - 08ac OpenBeacon USB stick -16cc silex technology, Inc. -16d3 Frontline Test Equipment, Inc. -16d5 AnyDATA Corporation - 6501 CDMA 2000 1xRTT/EV-DO USB Modem -16d8 CMOTECH Co., Ltd. - 5141 CMOTECH CDMA Technologies USB modem - 5543 CDMA 2000 1xRTT/1xEVDO USB modem - 6280 CMOTECH CDMA Technologies USB modem -16df King Billion Electronics Co., Ltd. -16f5 Futurelogic Inc. -1706 BlueView Technologies, Inc. -1707 ARTIMI -170b Swissonic - 0011 MIDI-USB 1x1 -170d Avnera -1733 Cellink Technology Co., Ltd - 0101 RF Wireless Optical Mouse OP-701 -1736 CANON IMAGING SYSTEM TECHNOLOGIES INC. -1737 Linksys - 0039 USB1000 -1740 Senao - 2000 NUB-8301 -1743 General Atomics -174c ASMedia Technology Inc. -174f Syntek - 5a35 1.3MPixel Web Cam - Asus G1s - 6a31 Web Cam - Asus A8J, F3S, F5R, VX2S, V1S - 6a33 Web Cam - Asus F3SA, F9J, F9S - 6a51 2.0MPixel Web Cam - Asus Z96J, Z96S, S96S - 6a54 Web Cam - 6d51 2.0Mpixel Web Cam - Eurocom D900C - 8a12 0.3MPixel Web Cam - Packard Bell MX37-T-003 - a311 1.3MPixel Web Cam - Asus A3A, A6J, A6K, A6M, A6R, A6T, A6V, A7T, A7sv, A7U - a312 1.3MPixel Web Cam - a821 Web Cam - Packard Bell BU45, PB Easynote MX66-208W - aa11 Web Cam -1759 LucidPort Technology, Inc. -1772 System Level Solutions, Inc. -1781 Multiple Vendors - 083e MetaGeek Wi-Spy - 0938 Iguanaworks USB IR Transceiver -1782 Spreadtrum Communications Inc. -1784 TopSeed Technology Corp. -1788 ShenZhen Litkconn Technology Co., Ltd. -1796 Printrex, Inc. -1797 JALCO CO., LTD. -17a5 Advanced Connection Technology Inc. -17a7 MICOMSOFT CO., LTD. -17b3 Grey Innovation - 0004 Linux-USB Midi Gadget -17c3 Singim International Corp. -17cc Native Instruments - 0815 Audio Kontrol 1 - 1940 RigKontrol3 - 1969 RigKontrol2 - 1978 Audio 8 DJ - 4711 Kore Controller - 4712 Kore Controller 2 -17cf Hip Hing Cable & Plug Mfy. Ltd. -17d0 Sanford L.P. -17d3 Korea Techtron Co., Ltd. -17e9 Newnham Research - 0051 USB VGA Adaptor -17eb Cornice, Inc. -17ef Lenovo - 3815 ChipsBnk 2GB USB Stick -17f5 K.K. Rocky -17f6 Unicomp, Inc -1822 Twinhan - 3201 VisionDTV USB-Ter/HAMA USB DVB-T device cold - 3202 VisionDTV USB-Ter/HAMA USB DVB-T device warm -1831 Gwo Jinn Industries Co., Ltd. -1832 Huizhou Shenghua Industrial Co., Ltd. -1854 Memory Devices Ltd. -185b Compro - d000 Compro Videomate DVB-U2000 - DVB-T USB cold - d001 Compro Videomate DVB-U2000 - DVB-T USB warm -1861 Tech Technology Industrial Company -1862 Teridian Semiconductor Corp. -1871 Aveo Technology Corp. -1894 Topseed - 5632 Atek Tote Remote - 5641 TSAM-004 Presentation Remote -1897 Evertop Wire Cable Co. -18b6 Mikkon Technology Limited -18b7 Zotek Electronic Co., Ltd. -18c5 AMIT - 0002 CG-WLUSB2GO -18d5 Starline International Group Limited -18d9 Kaba - 01xy LEGIC advant desktop reader -18e3 Fitipower Integrated Technology Inc -18e8 Qcom - 6196 RT2573 - 6229 RT2573 -18ea Matrox Graphics, Inc. - 0002 DualHead2Go [Analog Edition] - 0004 TripleHead2Go [Digital Edition] -18fd FineArch Inc. -190d Motorola GSG -1914 Alco Digital Devices Limited -1915 Linksys - 2233 WUSB11 v2.8 802.11b Adapter - 2234 WUSB54G 802.11g Adapter -192f Avago Technologies, Pte. -1930 Shenzhen Xianhe Technology Co., Ltd. -1931 Ningbo Broad Telecommunication Co., Ltd. -1949 Lab126 -1951 Hyperstone AG -1953 Ironkey Inc. -1954 Radiient Technologies -195d Itron Technology iONE - 7002 Libra-Q11 IR remote - 7006 Libra-Q26 / 1.0 Remote - 7777 Scorpius wireless keyboard -1967 CASIO HITACHI Mobile Communications Co., Ltd. -196b Wispro Technology Inc. -1970 Dane-Elec Corp. USA -1975 Dongguan Guneetal Wire & Cable Co., Ltd. -1976 Chipsbrand Microelectronics (HK) Co., Ltd. -1977 T-Logic - 0111 TL203 MP3 Player and Voice Recorder -1989 Nuconn Technology Corp. -198f Beceem Communications Inc. -1990 Acron Precision Industrial Co., Ltd. -1995 Trillium Technology Pty. Ltd. - 3202 REC-ADPT-USB (recorder) - 3203 REC-A-ADPT-USB (recorder) -199e The Imaging Source Europe GmbH -199f Benica Corporation -19a8 Biforst Technology Inc. -19af S Life - 6611 Celestia VoIP Phone -19b5 B & W Group -19b6 Infotech Logistic, LLC -19ca Mindtribe - 0001 Sandio 3D HID Mouse -19cf Parrot SA -19e1 WeiDuan Electronic Accessory (S.Z.) Co., Ltd. -19e8 Industrial Technology Research Institute -19ef Pak Heng Technology (Shenzhen) Co., Ltd. -19ff Best Buy - 0201 Rocketfish Wireless 2.4G Laser Mouse -1a08 Bellwood International, Inc. -1a0a USB-IF non-workshop - badd USB OTG Compliance test device -1a12 KES Co., Ltd. -1a25 Amphenol East Asia Ltd. -1a2a Seagate Branded Solutions -1a36 Biwin Technology Ltd. -1a40 TERMINUS TECHNOLOGY INC. -1a41 Action Electronics Co., Ltd. -1a4a Silicon Image -1a4b SafeBoot International B.V. -1a61 Abbott Diabetes Care -1a6a Spansion Inc. -1a6d SamYoung Electronics Co., Ltd -1a6e Global Unichip Corp. -1a6f Sagem Orga GmbH -1a79 Bayer Health Care LLC -1a7b Lumberg Connect GmbH & Co. KG -1a89 Dynalith Systems Co., Ltd. -1a8b SGS Taiwan Ltd. -1a98 Leica Camera AG -1aa4 Data Drive Thru, Inc. -1aa5 UBeacon Technologies, Inc. -1aa6 eFortune Technology Corp. -1acb Salcomp Plc -1ad1 Desay Wire Co., Ltd. -1ae4 ic-design Reinhard Gottinger GmbH -1aed High Top Precision Electronic Co., Ltd. -1aef Conntech Electronic (Suzhou) Corporation -1b04 Meilhaus Electronic GmBH - 0630 ME-630 - 0940 ME-94 - 0950 ME-95 - 0960 ME-96 - 1000 ME-1000 - 100a ME-1000 - 100b ME-1000 - 1400 ME-1400 - 140a ME-1400A - 140b ME-1400B - 140c ME-1400C - 140d ME-1400D - 140e ME-1400E - 14ea ME-1400EA - 14eb ME-1400EB - 1604 ME-1600/4U - 1608 ME-1600/8U - 160c ME-1600/12U - 160f ME-1600/16U - 168f ME-1600/16U8I - 4610 ME-4610 - 4650 ME-4650 - 4660 ME-4660 - 4661 ME-4660I - 4662 ME-4660 - 4663 ME-4660I - 4670 ME-4670 - 4671 ME-4670I - 4672 ME-4670S - 4673 ME-4670IS - 4680 ME-4680 - 4681 ME-4680I - 4682 ME-4680S - 4683 ME-4680IS - 6004 ME-6000/4 - 6008 ME-6000/8 - 600f ME-6000/16 - 6014 ME-6000I/4 - 6018 ME-6000I/8 - 601f ME-6000I/16 - 6034 ME-6000ISLE/4 - 6038 ME-6000ISLE/8 - 603f ME-6000ISLE/16 - 6044 ME-6000/4/DIO - 6048 ME-6000/8/DIO - 604f ME-6000/16/DIO - 6054 ME-6000I/4/DIO - 6058 ME-6000I/8/DIO - 605f ME-6000I/16/DIO - 6074 ME-6000ISLE/4/DIO - 6078 ME-6000ISLE/8/DIO - 607f ME-6000ISLE/16/DIO - 6104 ME-6100/4 - 6108 ME-6100/8 - 610f ME-6100/16 - 6114 ME-6100I/4 - 6118 ME-6100I/8 - 611f ME-6100I/16 - 6134 ME-6100ISLE/4 - 6138 ME-6100ISLE/8 - 613f ME-6100ISLE/16 - 6144 ME-6100/4/DIO - 6148 ME-6100/8/DIO - 614f ME-6100/16/DIO - 6154 ME-6100I/4/DIO - 6158 ME-6100I/8/DIO - 615f ME-6100I/16/DIO - 6174 ME-6100ISLE/4/DIO - 6178 ME-6100ISLE/8/DIO - 617f ME-6100ISLE/16/DIO - 6259 ME-6200I/9/DIO - 6359 ME-6300I/9/DIO - 810a ME-8100A - 810b ME-8100B - 820a ME-8200A - 820b ME-8200B -1b20 MStar Semiconductor, Inc. -1b22 WiLinx Corp. -1b26 Cellex Power Products, Inc. -1b27 Current Electronics Inc. -1b28 NAVIsis Inc. -1b32 Ugobe Life Forms, Inc. -1b36 ViXS Systems, Inc. -1b3f Generalplus Technology Inc. -1b47 Energizer Holdings, Inc. - 0001 CHUSB Duo Charger (NiMH AA/AAA USB smart charger) -1b48 Plastron Precision Co., Ltd. -1b59 K.S. Terminals Inc. -1b5a Chao Zhou Kai Yuan Electric Co., Ltd. -1b65 The Hong Kong Standards and Testing Centre Ltd. -1b72 ATERGI TECHNOLOGY CO., LTD. -1b76 Legend Silicon Corp. -1b86 Dongguan Guanshang Electronics Co., Ltd. -1b88 ShenMing Electron (Dong Guan) Co., Ltd. -1b8c Altium Limited -1b8d e-MOVE Technology Co., Ltd. -1b8e Amlogic, Inc. -1b8f MA LABS, Inc. -1b98 YMax Communications Corp. -1b99 Shenzhen Yuanchuan Electronic -1ba1 JINQ CHERN ENTERPRISE CO., LTD. -1ba2 Lite Metals & Plastic (Shenzhen) Co., Ltd. -1ba4 Ember Corporation - 0001 InSight USB Link -1ba8 China Telecommunication Technology Labs -1bad Harmonix Music - 0002 Harmonix Guitar for Xbox 360 - 0003 Harmonix Drum Kit for Xbox 360 -1bbb T & A Mobile Phones -1bc4 Ford Motor Co. -1bc5 AVIXE Technology (China) Ltd. -1bce Contac Cable Industrial Limited -1bcf Sunplus Innovation Technology Inc. -1bd0 Hangzhou Riyue Electronic Co., Ltd. -1bde P-TWO INDUSTRIES, INC. -1bef Shenzhen Tongyuan Network-Communication Cables Co., Ltd -1bf0 RealVision Inc. -1bf5 Extranet Systems Inc. -1bf6 Orient Semiconductor Electronics, Ltd. -1bfd TouchPack - 1688 Resistive Touch Screen -1c02 Kreton Corporation -1c04 QNAP System Inc. -1c0d Relm Wireless -1c10 Lanterra Industrial Co., Ltd. -1c13 ALECTRONIC LIMITED -1c1a Datel Electronics Ltd. -1c1b Volkswagen of America, Inc. -1c1f Goldvish S.A. -1c20 Fuji Electric Device Technology Co., Ltd. -1c21 ADDMM LLC -1c22 ZHONGSHAN CHIANG YU ELECTRIC CO., LTD. -1c26 Shanghai Haiying Electronics Co., Ltd. -1c27 HuiYang D & S Cable Co., Ltd. -1c31 LS Cable Ltd. -1c37 Authorizer Technologies, Inc. -1c3d NONIN MEDICAL INC. -1c3e Wep Peripherals -1c49 Cherng Weei Technology Corp. -1c6b Philips & Lite-ON Digital Solutions Corporation -1c6c Skydigital Inc. -1c77 Kaetat Industrial Co., Ltd. -1c78 Datascope Corp. -1c79 Unigen Corporation -1c7a LighTuning Technology Inc. -1c7b LUXSHARE PRECISION INDUSTRY (SHENZHEN) CO., LTD. -1c87 2N TELEKOMUNIKACE a.s. -1c88 Somagic, Inc. -1c89 HONGKONG WEIDIDA ELECTRON LIMITED -1c8e ASTRON INTERNATIONAL CORP. -1c98 ALPINE ELECTRONICS, INC. -1ca0 ACCARIO Inc. -1cb3 Aces Electronic Co., Ltd. -1cb4 OPEX CORPORATION -1cbe Luminary Micro Inc. -1cbf FORTAT SKYMARK INDUSTRIAL COMPANY -1cc0 PlantSense -1cca NextWave Broadband Inc. -1ccd Bodatong Technology (Shenzhen) Co., Ltd. -1cd4 adp corporation -1cd5 Firecomms Ltd. -1cd6 Antonio Precise Products Manufactory Ltd. -1cde Telecommunications Technology Association (TTA) -1cdf WonTen Technology Co., Ltd. -1ce0 EDIMAX TECHNOLOGY CO., LTD. -1ce1 Amphenol KAE -1cfc ANDES TECHNOLOGY CORPORATION -1cfd Flextronics Digital Design Japan, LTD. -1d08 NINGBO HENTEK DRAGON ELECTRONICS CO., LTD. -1d09 TechFaith Wireless Technology Limited -1d0a Johnson Controls, Inc. The Automotive Business Unit -1d0b HAN HUA CABLE & WIRE TECHNOLOGY (J.X.) CO., LTD. -1d14 ALPHA-SAT TECHNOLOGY LIMITED -1d1f Diostech Co., Ltd. -1d20 SAMTACK INC. -1d50 OpenMoko, Inc. -1d5b Smartronix, Inc. -1d6b Linux Foundation - 0001 1.1 root hub - 0002 2.0 root hub - 0003 3.0 root hub -1ebb NuCORE Technology, Inc. -2001 D-Link Corp. [hex] - 0001 DWL-120 WIRELESS ADAPTER - 0201 DHN-120 10Mb Home Phoneline Adapter - 1a00 10/100 Ethernet - 200c 10/100 Ethernet - 3200 DWL-120 802.11b (Atmel RFMD503A) [usbvnetr] - 3500 Elitegroup Computer Systems WLAN card WL-162 - 3700 DWL-122 802.11b - 3701 DWL-G120 Spinnaker 802.11b - 3702 DWL-120 rev F - 3703 DWL-122 802.11b - 3704 DWL-G122 802.11g rev. A2 - 3705 AirPlus G DWL-G120 Wireless Adapter(rev.C) - 3761 IEEE 802.11g USB2.0 Wireless Network Adapter-PN - 3a00 DWL-AG132 - 3a01 DWL-AG132 (no firmware) - 3a02 DWL-G132 - 3a03 DWL-G132 (no firmware) - 3a04 DWL-AG122 - 3a05 DWL-AG122 (no firmware) - 3a80 AirPlus Xtreme G DWL-G132 Wireless Adapter - 3a81 predator Bootloader Download - 3a82 AirPremier AG DWL-AG132 Wireless Adapter - 3a83 predator Bootloader Download - 3b00 AirPlus DWL-120+ Wireless Adapter - 3b01 WLAN Boot Device - 3c00 DWL-G122 802.11g rev. B1 [ralink] - 3c01 AirPlus AG DWL-AG122 Wireless Adapter - 3c02 AirPlus G DWL-G122 Wireless Adapter - 3c05 DUB-E100 Fast Ethernet [asix] - 4000 DSB-650C Ethernet [klsi] - 4001 DSB-650TX Ethernet [pegasus] - 4002 DSB-650TX Ethernet [pegasus] - 4003 DSB-650TX-PNA Ethernet [pegasus] - 400b 10/100 Ethernet - 4102 10/100 Ethernet - 5100 DSL-200 ADSL ATM Modem - 5102 DSL-200 ADSL Loader - 5b00 Remote NDIS Network Device - 9414 Cable Modem - 9b00 Broadband Cable Modem Remote NDIS Device - abc1 DSB-650 Ethernet [pegasus] - f013 DLink 7 port USB2.0 Hub - f10d Accent Communications Modem - f110 DUB-AV300 A/V Capture - f111 DBT-122 Bluetooth adapter - f112 DUB-T210 Audio Device - f116 Formosa 2 - f117 Formosa 3 - f118 Formosa 4 -2019 PLANEX - 3220 GW-US11S WLAN - 5303 GW-US54GXS - ab01 GW-US54HP - ab50 GW-US54Mini2 - c002 GW-US54SG - c007 GW-US54GZL - ed02 GW-USMM -2040 Hauppauge - 6502 WinTV HVR-900 - 6503 WinTV HVR-930 - 7050 Nova-T Stick - 9300 WinTV NOVA-T USB2 (cold) - 9301 WinTV NOVA-T USB2 (warm) -2101 ActionStar - 0201 SIIG 4-to-2 Printer Switch -2162 Creative (?) - 2031 Network Blaster Wireless Adapter - 500c DE5771 Modem Blaster - 8001 Broadxent BritePort DSL Bridge 8010U -2222 MacAlly - 0004 iWebKey Keyboard - 4050 AirStick joystick -2233 RadioShack Corporation - 6323 USB Electronic Scale -22b8 Motorola PCS - 0001 Wally 2.2 chipset - 0002 Wally 2.4 chipset - 0005 V.60c/V.60i GSM Phone - 0850 Bluetooth Device - 1001 Patriot 1.0 (GSM) chipset - 1002 Patriot 2.0 chipset - 1005 T280e GSM/GPRS Phone - 1101 Patriot 1.0 (TDMA) chipset - 1801 Rainbow chipset flash - 2035 Bluetooth Device - 2805 GSM Modem - 2821 T720 GSM Phone - 2822 V.120e GSM Phone - 2823 Flash Interface - 2a01 MSM6050 chipset - 2a02 CDMA modem - 2a03 MSM6050 chipset flash - 2a21 V710 GSM Phone (P2K) - 2a22 V710 GSM Phone (AT) - 2a23 MSM6100 chipset flash - 2a41 MSM6300 chipset - 2a42 Usb Modem - 2a43 MSM6300 chipset flash - 2a61 E815 GSM Phone (P2K) - 2a62 E815 GSM Phone (AT) - 2a63 MSM6500 chipset flash - 2a81 MSM6025 chipset - 2a83 MSM6025 chipset flash - 2ac1 MSM6100 chipset - 2ac3 MSM6100 chipset flash - 3001 A835/E1000 GSM Phone (P2K) - 3002 A835/E1000 GSM Phone (AT) - 3801 C350L/C450 (P2K) - 3802 C330/C350L/C450/EZX GSM Phone (AT) - 3803 Neptune LT chipset flash - 4001 OMAP 1.0 chipset - 4002 A920/A925 UMTS Phone - 4003 OMAP 1.0 chipset flash - 4008 OMAP 1.0 chipset RDL - 4204 MPx200 Smartphone - 4214 MPc GSM - 4224 MPx220 Smartphone - 4234 MPc CDMA - 4244 MPx100 Smartphone - 4801 Neptune LTS chipset - 4803 Neptune LTS chipset flash - 4810 Triplet GSM Phone (storage) - 4901 Triplet GSM Phone (P2K) - 4902 Triplet GSM Phone (AT) - 4903 Neptune LTE chipset flash - 4a01 Neptune LTX chipset - 4a03 Neptune LTX chipset flash - 4a32 L6-imode Phone - 5801 Neptune ULS chipset - 5803 Neptune ULS chipset flash - 5901 Neptune VLT chipset - 5903 Neptune VLT chipset flash - 6001 Dalhart EZX - 6003 Dalhart flash - 6004 EZX GSM Phone (CDC Net) - 6008 Dalhart RDL - 6009 EZX GSM Phone (P2K) - 600a Dalhart EZX config 17 - 600b Dalhart EZX config 18 - 600c EZX GSM Phone (USBLAN) - 6021 JUIX chipset - 6023 JUIX chipset flash - 6026 Flash RAM Downloader/miniOS - 6027 USBLAN - 604c EZX GSM Phone (Storage) - 6101 Talon integrated chipset - 6401 Argon chipset - 6403 Argon chipset flash - 6415 ROKR Z6 (MTP mode) - 6604 Washington CDMA Phone - 6631 CDC Modem -22b9 eTurboTouch Technology, Inc. -22ba Technology Innovation Holdings, Ltd -2304 Pinnacle Systems, Inc. [hex] - 0109 Studio PCTV USB (SECAM) - 0110 Studio PCTV USB (PAL) - 0111 Miro PCTV USB - 0112 Studio PCTV USB (NTSC) with FM radio - 0201 Systems MovieBox Device - 0204 MovieBox USB_B - 0205 DVC 150B - 0206 Systems MovieBox Deluxe Device - 0207 Dazzle DVC90 Video Device - 0208 Studio PCTV USB2 - 020e PCTV 200e - 020f PCTV 400e BDA Device - 0210 Studio PCTV USB (PAL) with FM radio - 0212 Studio PCTV USB (NTSC) - 0213 500-USB Device - 0214 Studio PCTV USB (PAL) with FM radio - 0216 PCTV 60e - 0219 PCTV 260e - 021a Dazzle DVC100 Audio Device - 021b Dazzle DVC130/DVC170 - 021d Dazzle DVC130 - 021e Dazzle DVC170 - 021f PCTV Sat HDTV Pro BDA Device - 0222 PCTV Sat Pro BDA Device - 0223 DazzleTV Sat BDA Device - 0226 PCTV 330e - 0227 PCTV for Mac, HD Stick - 0228 PCTV DVB-T Flash Stick - 022a PCTV 160e - 022b PCTV 71e - 0232 PCTV 170e - 0300 Studio Linx Video input cable (NTSC) - 0301 Studio Linx Video input cable (PAL) - 0302 Dazzle DVC120 - 0419 PCTV Bungee USB (PAL) with FM radio - 061d PCTV Deluxe (NTSC) Device - 061e PCTV Deluxe (PAL) Device -2318 Shining Technologies, Inc. [hex] - 0011 CitiDISK Jr. IDE Enclosure -2375 Digit@lway, Inc. - 0001 Digital Audio Player -2406 SANHO Digital Electronics Co., Ltd. - 6688 PD7X Portable Storage -2478 Tripp-Lite - 2008 U209-000-R Serial Port -2632 TwinMOS - 3209 7-in-1 Card Reader -2650 Electronics For Imaging, Inc. [hex] -2730 Citizen - 200f CT-S310 Label printer -2735 DigitalWay - 0003 MPIO 1.5GB Hard Disc Drive -2770 NHJ, Ltd - 0a01 ScanJet 4600 series - 905c Che-Ez Snap SNAP-U/Digigr8/Soundstar TDC-35 - 9060 A130 - 9120 Che-ez! Snap / iClick Tiny VGA Digital Camera - 9130 TCG 501 - 913c Argus DC-1730 - 9150 Mini Cam - 9153 iClick 5X - 915d Cyberpix S-210S / Little Tikes My Real Digital Camera - 930b CCD Webcam(PC370R) - 930c CCD Webcam(PC370R) -2899 Toptronic Industrial Co., Ltd -2c02 Planex Communications - 14ea GW-US11H WLAN -2fb2 Fujitsu, Ltd -3125 Eagletron - 0001 TrackerPod Camera Stand -3176 Whanam Electronics Co., Ltd -3275 VidzMedia Pte Ltd - 4fb1 MonsterTV P2H -3334 AEI - 1701 Fast Ethernet -3340 Yakumo - 043a Mio A701 DigiWalker PPCPhone - 0e3a Pocket PC 300 GPS SL / Typhoon MyGuide 3500 - a0a3 deltaX 5 BT (D) PDA -3504 Micro Star - f110 Security Key -3538 Power Quotient International Co., Ltd - 0001 Travel Flash - 0015 Mass Storge Device - 0022 Hi-Speed Mass Storage Device - 0042 Cool Drive U339 Flash Disk -3579 DIVA - 6901 Media Reader -3636 InVibro -3838 WEM - 0001 5-in-1 Card Reader -3923 National Instruments Corp. - 12c0 DAQPad-6020E - 12d0 DAQPad-6507 - 12e0 NI 4350 - 12f0 NI 5102 - 1750 DAQPad-6508 - 17b0 USB-ISA-Bridge - 1820 DAQPad-6020E (68 pin I/O) - 1830 DAQPad-6020E (BNC) - 1f00 DAQPad-6024E - 1f10 DAQPad-6024E - 1f20 DAQPad-6025E - 1f30 DAQPad-6025E - 1f40 DAQPad-6036E - 1f50 DAQPad-6036E - 2f80 DAQPad-6052E - 2f90 DAQPad-6052E - 703c USB-485 RS485 Cable - 7254 NI MIO (data acquisition card) firmware updater - 729e USB-6251 (OEM) data acquisition card -40bb I-O Data - 0a09 USB2.0-SCSI Bridge USB2-SC -4101 i-rocks - 1301 IR-2510 usb phone -4102 iRiver, Ltd. - 1001 iFP-100 series mp3 player - 1003 iFP-300 series mp3 player - 1005 iFP-500 series mp3 player - 1007 iFP-700 series mp3/ogg vorbis player - 1008 iFP-800 series mp3/ogg vorbis player - 100a iFP-1000 series mp3/ogg vorbis player - 1014 T20 series mp3/ogg vorbis player (ums firmware) - 1101 iFP-100 series mp3 player (ums firmware) - 1103 iFP-300 series mp3 player (ums firmware) - 1105 iFP-500 series mp3 player (ums firmware) - 1113 T10 (alternate) - 1117 T10 - 1119 T30 series mp3/ogg/wma player - 2002 H10 6GB - 2101 H10 20GB (mtp) - 2102 H10 5GB (mtp) - 2105 H10 5/6GB (mtp) -413c Dell Computer Corp. - 0058 Port Replicator - 1001 Keyboard Hub - 1002 Keyboard Hub - 2001 Keyboard HID Support - 2002 SK-8125 Keyboard - 2003 Keyboard - 2005 RT7D50 Keyboard - 2100 SK-3106 Keyboard - 2101 SmartCard Reader Keyboard - 2500 DRAC4 Remote Access Card - 3010 Optical Wheel Mouse - 3200 Mouse - 4001 Axim X5 - 4002 Axim X3 - 4003 Axim X30 - 4004 Axim Sync - 4005 Axim Sync - 4006 Axim Sync - 4007 Axim Sync - 4008 Axim Sync - 4009 Axim Sync - 4011 Axim X51v - 5103 AIO Printer A940 - 5105 AIO Printer A920 - 5107 AIO Printer A960 - 5109 Photo AIO Printer 922 - 5110 Photo AIO Printer 962 - 5111 Photo AIO Printer 942 - 5112 Photo AIO Printer 924 - 5113 Photo AIO Printer 944 - 5114 Photo AIO Printer 964 - 5115 Photo AIO Printer 926 - 5116 AIO Printer 946 - 5117 Photo AIO Printer 966 - 5118 AIO 810 - 5124 Laser MFP 1815 - 5128 Photo AIO 928 - 5200 Laser Printer - 5202 Printing Support - 5203 Printing Support - 5210 Printing Support - 5211 Printing Support - 5220 Laser MFP 1600n - 5225 Printing Support - 5226 Printing Support - 5300 Laser Printer - 5400 Laser Printer - 5401 Laser Printer - 5601 Laser Printer 3100cn - 5602 Laser Printer 3000cn - 5631 Laser Printer 5100cn - 5905 Printing Support - 8000 BC02 Bluetooth USB Adapter - 8010 TrueMobile Bluetooth Module in - 8100 TrueMobile 1180 802.11b Adapter - 8102 TrueMobile 1300 USB2.0 WLAN Card - 8103 Wireless 350 Bluetooth - 8104 Wireless 1450 Dual-band (802.11a/b/g) USB2.0 Adapter - 8105 U2 in HID - Driver - 8106 Wireless 350 Bluetooth Internal Card in - 8110 Wireless 3xx Bluetooth Internal Card - 8111 Wireless 3xx Bluetooth Internal Card in - 8114 Wireless 5700 Mobile Broadband (CDMA EV-DO) Minicard Modem - 8115 Wireless 5500 Mobile Broadband (3G HSDPA) Minicard Modem - 8116 Wireless 5505 Mobile Broadband (3G HSDPA) Minicard Modem - 8117 Wireless 5700 Mobile Broadband (CDMA EV-DO) Expresscard Modem - 8118 Wireless 5510 Mobile Broadband (3G HSDPA) Expresscard Status Port - 8120 Bluetooth adapter - 8121 Eastfold in HID - 8122 Eastfold in DFU - 8123 eHome Infrared Receiver - 8124 eHome Infrared Receiver - 8126 Wireless 355 Bluetooth - 8127 Wireless 355 Module with Bluetooth 2.0 + EDR Technology. - 8128 Wireless 5700-Sprint Mobile Broadband (CDMA EV-DO) Mini-Card Status Port - 8129 Wireless 5700-Telus Mobile Broadband (CDMA EV-DO) Mini-Card Status Port - 8131 Wireless 360 Bluetooth 2.0 + EDR module. - 8133 Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port - 8134 Wireless 5720 Sprint Mobile Broadband (EVDO Rev-A) Minicard Status Port - 8135 Wireless 5720 TELUS Mobile Broadband (EVDO Rev-A) Minicard Diagnostics Port - 8136 Wireless 5520 Cingular Mobile Broadband (3G HSDPA) Minicard Diagnostics Port - 8137 Wireless 5520 Voda L Mobile Broadband (3G HSDPA) Minicard Status Port - 8138 Wireless 5520 Voda I Mobile Broadband (3G HSDPA) Minicard EAP-SIM Port - 8140 Wireless 360 Bluetooth - 8142 Mobile 360 in DFU - 8501 Bluetooth Adapter - a001 Hub - a005 Internal 2.0 Hub - a700 Hub (in 1905FP LCD Monitor) -4146 USBest Technology - 9281 Iomega Micro Mini 128MB Flash Drive - ba01 Intuix Flash Drive -4242 USB Design by Example - 4201 Buttons and Lights HID device - 4220 Echo 1 Camera -4348 WinChipHead - 5523 USB->RS 232 adapter with Prolifec PL 2303 chipset - 5537 13.56Mhz RFID Card Reader and Writer - 5584 CH34x printer adapter cable -4572 Shuttle, Inc. - 4572 Shuttle PN31 Remote -4586 Panram - 1026 Crystal Bar Flash Drive -4670 EMS Production - 9394 Game Cube USB Memory Adaptor 64M -4752 Miditech - 0011 Midistart-2 -4766 Aceeca - 0001 MEZ1000 RDA -4855 Memorex - 7288 Ultra Traveldrive 160G 2.5" HDD -5032 Grandtec - 0bb8 Grandtec USB1.1 DVB-T (cold) - 0bb9 Grandtec USB1.1 DVB-T (warm) - 0fa0 Grandtec USB1.1 DVB-T (cold) - 0fa1 Grandtec USB1.1 DVB-T (warm) -5041 Linksys (?) - 2234 WUSB54G 802.11g Adapter -5173 Sweex - 1809 ZD1211 -5345 Owon - 1234 PDS6062T Oscilloscope -544d Transmeta Corp. -5543 UC-Logic Technology Corp. - 0002 SuperPen WP3325U Tablet - 0003 Genius MousePen 4x3 Tablet/Aquila L1 Tablet - 0004 Genius MousePen 5x4 Tablet - 0005 Genius MousePen 8x6 Tablet - 0041 Genius PenSketch 6x8 Tablet - 0042 Genius PenSketch 12x9 Tablet -55aa OnSpec Electronic, Inc. - 0015 Hard Drive - 0102 SuperDisk - 0103 IDE Hard Drive - 0201 DDI to Reader-19 - 1234 ATAPI Bridge - a103 Sandisk SDDR-55 SmartMedia Card Reader - b000 USB to CompactFlash Card Reader - b004 OnSpec MMC/SD Reader/Writer - b00b USB to Memory Stick Card Reader - b00c USB to SmartMedia Card Reader - b012 Mitsumi FA402M 8-in-2 Card Reader - b200 Compact Flash Reader - b204 MMC/ SD Reader - b207 Memory Stick Reader -5986 Acer, Inc - 0102 Crystal Eye webcam -5a57 Zinwell - 0260 RT2570 -6189 Sitecom - 182d USB 2.0 Ethernet - 2068 USB to serial cable (v2) -6253 TwinHan Technology Co., Ltd - 0100 Ir reciver f. remote control -636c CoreLogic, Inc. -6547 Arkmicro Technologies Inc. - 0232 ARK3116 Serial -6666 Prototype product Vendor ID - 0667 WiseGroup Smart Joy PSX, PS-PC Smart JoyPad - 2667 JCOP BlueZ Smartcard reader - 8804 WiseGroup SuperJoy Box 5 -6891 3Com - a727 3CRUSB10075 -6993 Freshtel - b001 FT-102 VoIP USB Phone -6a75 Shanghai Jujo Electronics Co., Ltd -7104 CME (Central Music Co.) - 2202 UF5/UF6/UF7/UF8 MIDI Master Keyboard -8086 Intel Corp. - 0001 AnyPoint (TM) Home Network 1.6 Mbps Wireless Adapter - 0100 Personal Audio Player 3000 - 0101 Personal Audio Player 3000 - 0110 Easy PC Camera - 0120 PC Camera CS120 - 0200 AnyPoint(TM) Wireless II Network 11Mbps Adapter - 0431 Intel Pro Video PC Camera - 0510 Digital Movie Creator - 0630 Pocket PC Camera - 0780 CS780 Microphone Input - 07d3 BLOB boot loader firmware - 0dad Cherry MiniatureCard Keyboard - 1010 AnyPoint(TM) Home Network 10 Mbps Phoneline Adapter - 110a Bluetooth Controller from (Ericsson P4A) - 110b Bluetooth Controller from (Intel/CSR) - 1110 PRO/Wireless LAN Module - 1111 PRO/Wireless 2011B 802.11b Adapter - 1134 Hollister Mobile Monitor - 1234 Prototype Reader/Writer - 3100 PRO/DSL 3220 Modem - WAN - 3101 PRO/DSL 3220 Modem - 3240 AnyPoint® 3240 Modem - WAN - 3241 AnyPoint® 3240 Modem - 8602 Miniature Card Slot - 9303 Intel 8x930Hx Hub - 9890 82930 Test Board - beef SCM Miniature Card Reader/Writer - c013 Wireless HID Station - f001 XScale PXA27x Bulverde flash -8341 EGO Systems, Inc. - 2000 Flashdisk -9016 Sitecom - 182d WL-022 -9710 MosChip Semiconductor - 7703 MCS7703 Serial Port Adapter - 7705 Printer cable - 7715 Printer cable - 7780 MS7780 4Mbps Fast IRDA Adapter - 7830 MCS7830 Ethernet -a727 3Com - 6893 AR5523 - 6895 AR5523 - 6897 AR5523 -c251 Keil Software, Inc. - 2710 ULink -eb1a eMPIA Technology, Inc. - 17de KWorld V-Stream XPERT DTV - DVB-T USB cold - 17df KWorld V-Stream XPERT DTV - DVB-T USB warm - 2710 SilverCrest WebCam - 2750 ECS Elitegroup G220 integrated webcam - 2800 Terratec Cinergy 200 - 2801 GrabBeeX+ Video Encoder -f003 Hewlett Packard - 6002 PhotoSmart C500 - -# List of known device classes, subclasses and protocols - -# Syntax: -# C class class_name -# subclass subclass_name <-- single tab -# protocol protocol_name <-- two tabs - -C 00 (Defined at Interface level) -C 01 Audio - 01 Control Device - 02 Streaming - 03 MIDI Streaming -C 02 Communications - 01 Direct Line - 02 Abstract (modem) - 00 None - 01 AT-commands (v.25ter) - 02 AT-commands (PCCA101) - 03 AT-commands (PCCA101 + wakeup) - 04 AT-commands (GSM) - 05 AT-commands (3G) - 06 AT-commands (CDMA) - fe Defined by command set descriptor - ff Vendor Specific (MSFT RNDIS?) - 03 Telephone - 04 Multi-Channel - 05 CAPI Control - 06 Ethernet Networking - 07 ATM Networking - 08 Wireless Handset Control - 09 Device Management - 0a Mobile Direct Line - 0b OBEX - 0c Ethernet Emulation - 07 Ethernet Emulation (EEM) -C 03 Human Interface Device - 00 No Subclass - 00 None - 01 Keyboard - 02 Mouse - 01 Boot Interface Subclass - 00 None - 01 Keyboard - 02 Mouse -C 05 Physical Interface Device -C 06 Imaging - 01 Still Image Capture - 01 Picture Transfer Protocol (PIMA 15470) -C 07 Printer - 01 Printer - 00 Reserved/Undefined - 01 Unidirectional - 02 Bidirectional - 03 IEEE 1284.4 compatible bidirectional - ff Vendor Specific -C 08 Mass Storage - 01 RBC (typically Flash) - 00 Control/Bulk/Interrupt - 01 Control/Bulk - 50 Bulk (Zip) - 02 SFF-8020i, MMC-2 (ATAPI) - 03 QIC-157 - 04 Floppy (UFI) - 00 Control/Bulk/Interrupt - 01 Control/Bulk - 50 Bulk (Zip) - 05 SFF-8070i - 06 SCSI - 00 Control/Bulk/Interrupt - 01 Control/Bulk - 50 Bulk (Zip) -C 09 Hub - 00 Unused - 00 Full speed (or root) hub - 01 Single TT - 02 TT per port -C 0a CDC Data - 00 Unused - 30 I.430 ISDN BRI - 31 HDLC - 32 Transparent - 50 Q.921M - 51 Q.921 - 52 Q.921TM - 90 V.42bis - 91 Q.932 EuroISDN - 92 V.120 V.24 rate ISDN - 93 CAPI 2.0 - fd Host Based Driver - fe CDC PUF - ff Vendor specific -C 0b Chip/SmartCard -C 0d Content Security -C 0e Video - 00 Undefined - 01 Video Control - 02 Video Streaming - 03 Video Interface Collection -C dc Diagnostic - 01 Reprogrammable Diagnostics - 01 USB2 Compliance -C e0 Wireless - 01 Radio Frequency - 01 Bluetooth - 02 Ultra WideBand Radio Control - 03 RNDIS - 02 Wireless USB Wire Adapter - 01 Host Wire Adapter Control/Data Streaming - 02 Device Wire Adapter Control/Data Streaming - 03 Device Wire Adapter Isochronous Streaming -C ef Miscellaneous Device - 01 ? - 01 Microsoft ActiveSync - 02 Palm Sync - 02 ? - 01 Interface Association - 02 Wire Adapter Multifunction Peripheral - 03 ? - 01 Cable Based Association -C fe Application Specific Interface - 01 Device Firmware Update - 02 IRDA Bridge - 03 Test and Measurement - 01 TMC - 02 USB488 -C ff Vendor Specific Class - ff Vendor Specific Subclass - ff Vendor Specific Protocol - -# List of Audio Class Terminal Types - -# Syntax: -# AT terminal_type terminal_type_name - -AT 0100 USB Undefined -AT 0101 USB Streaming -AT 01ff USB Vendor Specific -AT 0200 Input Undefined -AT 0201 Microphone -AT 0202 Desktop Microphone -AT 0203 Personal Microphone -AT 0204 Omni-directional Microphone -AT 0205 Microphone Array -AT 0206 Processing Microphone Array -AT 0300 Output Undefined -AT 0301 Speaker -AT 0302 Headphones -AT 0303 Head Mounted Display Audio -AT 0304 Desktop Speaker -AT 0305 Room Speaker -AT 0306 Communication Speaker -AT 0307 Low Frequency Effects Speaker -AT 0400 Bidirectional Undefined -AT 0401 Handset -AT 0402 Headset -AT 0403 Speakerphone, no echo reduction -AT 0404 Echo-suppressing speakerphone -AT 0405 Echo-canceling speakerphone -AT 0500 Telephony Undefined -AT 0501 Phone line -AT 0502 Telephone -AT 0503 Down Line Phone -AT 0600 External Undefined -AT 0601 Analog Connector -AT 0602 Digital Audio Interface -AT 0603 Line Connector -AT 0604 Legacy Audio Connector -AT 0605 SPDIF interface -AT 0606 1394 DA stream -AT 0607 1394 DV stream soundtrack -AT 0700 Embedded Undefined -AT 0701 Level Calibration Noise Source -AT 0702 Equalization Noise -AT 0703 CD Player -AT 0704 DAT -AT 0705 DCC -AT 0706 MiniDisc -AT 0707 Analog Tape -AT 0708 Phonograph -AT 0709 VCR Audio -AT 070a Video Disc Audio -AT 070b DVD Audio -AT 070c TV Tuner Audio -AT 070d Satellite Receiver Audio -AT 070e Cable Tuner Audio -AT 070f DSS Audio -AT 0710 Radio Receiver -AT 0711 Radio Transmitter -AT 0712 Multitrack Recorder -AT 0713 Synthesizer - -# List of HID Descriptor Types - -# Syntax: -# HID descriptor_type descriptor_type_name - -HID 21 HID -HID 22 Report -HID 23 Physical - -# List of HID Descriptor Item Types -# Note: 2 bits LSB encode data length following - -# Syntax: -# R item_type item_type_name - -# Main Items -R 80 Input -R 90 Output -R b0 Feature -R a0 Collection -R c0 End Collection - -# Global Items -R 04 Usage Page -R 14 Logical Minimum -R 24 Logical Maximum -R 34 Physical Minimum -R 44 Physical Maximum -R 54 Unit Exponent -R 64 Unit -R 74 Report Size -R 84 Report ID -R 94 Report Count -R a4 Push -R b4 Pop - -# Local Items -R 08 Usage -R 18 Usage Minimum -R 28 Usage Maximum -R 38 Designator Index -R 48 Designator Minimum -R 58 Designator Maximum -R 78 String Index -R 88 String Minimum -R 98 String Maximum -R a8 Delimiter - -# List of Physical Descriptor Bias Types - -# Syntax: -# BIAS item_type item_type_name - -BIAS 0 Not Applicable -BIAS 1 Right Hand -BIAS 2 Left Hand -BIAS 3 Both Hands -BIAS 4 Either Hand - -# List of Physical Descriptor Item Types - -# Syntax: -# PHY item_type item_type_name - -PHY 00 None -PHY 01 Hand -PHY 02 Eyeball -PHY 03 Eyebrow -PHY 04 Eyelid -PHY 05 Ear -PHY 06 Nose -PHY 07 Mouth -PHY 08 Upper Lip -PHY 09 Lower Lip -PHY 0a Jaw -PHY 0b Neck -PHY 0c Upper Arm -PHY 0d Elbow -PHY 0e Forearm -PHY 0f Wrist -PHY 10 Palm -PHY 11 Thumb -PHY 12 Index Finger -PHY 13 Middle Finger -PHY 14 Ring Finger -PHY 15 Little Finger -PHY 16 Head -PHY 17 Shoulder -PHY 18 Hip -PHY 19 Waist -PHY 1a Thigh -PHY 1b Knee -PHY 1c calf -PHY 1d Ankle -PHY 1e Foot -PHY 1f Heel -PHY 20 Ball of Foot -PHY 21 Big Toe -PHY 22 Second Toe -PHY 23 Third Toe -PHY 24 Fourth Toe -PHY 25 Fifth Toe -PHY 26 Brow -PHY 27 Cheek - -# List of HID Usages - -# Syntax: -# HUT hi _usage_page hid_usage_page_name -# hid_usage hid_usage_name - -HUT 00 Undefined -HUT 01 Generic Desktop Controls - 000 Undefined - 001 Pointer - 002 Mouse - 004 Joystick - 005 Gamepad - 006 Keyboard - 007 Keypad - 008 Multi-Axis Controller - 030 Direction-X - 031 Direction-Y - 032 Direction-Z - 033 Rotate-X - 034 Rotate-Y - 035 Rotate-Z - 036 Slider - 037 Dial - 038 Wheel - 039 Hat Switch - 03a Counted Buffer - 03b Byte Count - 03c Motion Wakeup - 03d Start - 03e Select - 040 Vector-X - 041 Vector-Y - 042 Vector-Z - 043 Vector-X relative Body - 044 Vector-Y relative Body - 045 Vector-Z relative Body - 046 Vector - 080 System Control - 081 System Power Down - 082 System Sleep - 083 System Wake Up - 084 System Context Menu - 085 System Main Menu - 086 System App Menu - 087 System Menu Help - 088 System Menu Exit - 089 System Menu Select - 08a System Menu Right - 08b System Menu Left - 08c System Menu Up - 08d System Menu Down - 090 Direction Pad Up - 091 Direction Pad Down - 092 Direction Pad Right - 093 Direction Pad Left -HUT 02 Simulation Controls - 000 Undefined - 001 Flight Simulation Device - 002 Automobile Simulation Device - 003 Tank Simulation Device - 004 Spaceship Simulation Device - 005 Submarine Simulation Device - 006 Sailing Simulation Device - 007 Motorcycle Simulation Device - 008 Sports Simulation Device - 009 Airplane Simualtion Device - 00a Helicopter Simulation Device - 00b Magic Carpet Simulation Device - 00c Bicycle Simulation Device - 020 Flight Control Stick - 021 Flight Stick - 022 Cyclic Control - 023 Cyclic Trim - 024 Flight Yoke - 025 Track Control - 0b0 Aileron - 0b1 Aileron Trim - 0b2 Anti-Torque Control - 0b3 Autopilot Enable - 0b4 Chaff Release - 0b5 Collective Control - 0b6 Dive Break - 0b7 Electronic Countermeasures - 0b8 Elevator - 0b9 Elevator Trim - 0ba Rudder - 0bb Throttle - 0bc Flight COmmunications - 0bd Flare Release - 0be Landing Gear - 0bf Toe Break - 0c0 Trigger - 0c1 Weapon Arm - 0c2 Weapons Select - 0c3 Wing Flaps - 0c4 Accelerator - 0c5 Brake - 0c6 Clutch - 0c7 Shifter - 0c8 Steering - 0c9 Turret Direction - 0ca Barrel Elevation - 0cb Drive Plane - 0cc Ballast - 0cd Bicylce Crank - 0ce Handle Bars - 0cf Front Brake - 0d0 Rear Brake -HUT 03 VR Controls - 000 Unidentified - 001 Belt - 002 Body Suit - 003 Flexor - 004 Glove - 005 Head Tracker - 006 Head Mounted Display - 007 Hand Tracker - 008 Oculometer - 009 Vest - 00a Animatronic Device - 020 Stereo Enable - 021 Display Enable -HUT 04 Sport Controls - 000 Unidentified - 001 Baseball Bat - 002 Golf Club - 003 Rowing Machine - 004 Treadmill - 030 Oar - 031 Slope - 032 Rate - 033 Stick Speed - 034 Stick Face Angle - 035 Stick Heel/Toe - 036 Stick Follow Through - 047 Stick Temp - 038 Stick Type - 039 Stick Height - 050 Putter - 051 1 Iron - 052 2 Iron - 053 3 Iron - 054 4 Iron - 055 5 Iron - 056 6 Iron - 057 7 Iron - 058 8 Iron - 059 9 Iron - 05a 10 Iron - 05b 11 Iron - 05c Sand Wedge - 05d Loft Wedge - 05e Power Wedge - 05f 1 Wood - 060 3 Wood - 061 5 Wood - 062 7 Wood - 063 9 Wood -HUT 05 Game Controls - 000 Undefined - 001 3D Game Controller - 002 Pinball Device - 003 Gun Device - 020 Point Of View - 021 Turn Right/Left - 022 Pitch Right/Left - 023 Roll Forward/Backward - 024 Move Right/Left - 025 Move Forward/Backward - 026 Move Up/Down - 027 Lean Right/Left - 028 Lean Forward/Backward - 029 Height of POV - 02a Flipper - 02b Secondary Flipper - 02c Bump - 02d New Game - 02e Shoot Ball - 02f Player - 030 Gun Bolt - 031 Gun Clip - 032 Gun Selector - 033 Gun Single Shot - 034 Gun Burst - 035 Gun Automatic - 036 Gun Safety - 037 Gamepad Fire/Jump - 038 Gamepad Fun - 039 Gamepad Trigger -HUT 07 Keyboard - 000 No Event - 001 Keyboard ErrorRollOver - 002 Keyboard POSTfail - 003 Keyboard Error Undefined - 004 A - 005 B - 006 C - 007 D - 008 E - 009 F - 00a G - 00b H - 00c I - 00d J - 00e K - 00f L - 010 M - 011 N - 012 O - 013 P - 014 Q - 015 R - 016 S - 017 T - 018 U - 019 V - 01a W - 01b X - 01c Y - 01d Z - 01e 1 and ! (One and Exclamation) - 01f 2 and @ (2 and at) - 020 3 and # (3 and Hash) - 021 4 and $ (4 and Dollar Sign) - 022 5 and % (5 and Percent Sign) - 023 6 and ^ (6 and circumflex) - 024 7 and & (Seven and Ampersand) - 025 8 and * (Eight and asterisk) - 026 9 and ( (Nine and Parenthesis Left) - 027 0 and ) (Zero and Parenthesis Right) - 028 Return (Enter) - 029 Escape - 02a Delete (Backspace) - 02b Tab - 02c Space Bar - 02d - and _ (Minus and underscore) - 02e = and + (Equal and Plus) - 02f [ and { (Bracket and Braces Left) - 030 ] and } (Bracket and Braces Right) - 031 \ and | (Backslash and Bar) - 032 # and ~ (Hash and Tilde, Non-US Keyboard near right shift) - 033 ; and : (Semicolon and Colon) - 034 ´ and " (Accent Acute and Double Quotes) - 035 ` and ~ (Accent Grace and Tilde) - 036 , and < (Comma and Less) - 037 . and > (Period and Greater) - 038 / and ? (Slash and Question Mark) - 039 Caps Lock - 03a F1 - 03b F2 - 03c F3 - 03d F4 - 03e F5 - 03f F6 - 040 F7 - 041 F8 - 042 F9 - 043 F10 - 044 F11 - 045 F12 - 046 Print Screen - 047 Scroll Lock - 048 Pause - 049 Insert - 04a Home - 04b Page Up - 04c Delete Forward (without Changing Position) - 04d End - 04e Page Down - 04f Right Arrow - 050 Left Arrow - 051 Down Arrow - 052 Up Arrow - 053 Num Lock and Clear - 054 Keypad / (Division Sign) - 055 Keypad * (Multiplication Sign) - 056 Keypad - (Subtraction Sign) - 057 Keypad + (Addition Sign) - 058 Keypad Enter - 059 Keypad 1 and END - 05a Keypad 2 and Down Arrow - 05b Keypad 3 and Page Down - 05c Keypad 4 and Left Arrow - 05d Keypad 5 (Tactilei Raised) - 05f Keypad 6 and Right Arrow - 060 Keypad 7 and Home - 061 Keypad 8 and Up Arrow - 062 Keypad 8 and Page Up - 063 Keypad . (decimal delimiter) and Delete - 064 \ and | (Backslash and Bar, UK and Non-US Keyboard near left shift) - 065 Keyboard Application (Windows Key for Win95 or Compose) - 066 Power (not a key) - 067 Keypad = (Equal Sign) - 068 F13 - 069 F14 - 06a F15 - 06b F16 - 06c F17 - 06d F18 - 06e F19 - 06f F20 - 070 F21 - 071 F22 - 072 F23 - 073 F24 - 074 Execute - 075 Help - 076 Menu - 077 Select - 078 Stop - 079 Again - 07a Undo - 07b Cut - 07c Copy - 07d Paste - 07e Find - 07f Mute - 080 Volume Up - 081 Volume Down - 082 Locking Caps Lock - 083 Locking Num Lock - 084 Locking Scroll Lock - 085 Keypad Comma - 086 Keypad Equal Sign (AS/400) - 087 International 1 (PC98) - 088 International 2 (PC98) - 089 International 3 (PC98) - 08a International 4 (PC98) - 08b International 5 (PC98) - 08c International 6 (PC98) - 08d International 7 (Toggle Single/Double Byte Mode) - 08e International 8 - 08f International 9 - 090 LANG 1 (Hangul/English Toggle, Korea) - 091 LANG 2 (Hanja Conversion, Korea) - 092 LANG 3 (Katakana, Japan) - 093 LANG 4 (Hiragana, Japan) - 094 LANG 5 (Zenkaku/Hankaku, Japan) - 095 LANG 6 - 096 LANG 7 - 097 LANG 8 - 098 LANG 9 - 099 Alternate Erase - 09a SysReq/Attention - 09b Cancel - 09c Clear - 09d Prior - 09e Return - 09f Separator - 0a0 Out - 0a1 Open - 0a2 Clear/Again - 0a3 CrSel/Props - 0a4 ExSel - 0e0 Control Left - 0e1 Shift Left - 0e2 Alt Left - 0e3 GUI Left - 0e4 Control Right - 0e5 Shift Right - 0e6 Alt Rigth - 0e7 GUI Right -HUT 08 LEDs - 000 Undefined - 001 NumLock - 002 CapsLock - 003 Scroll Lock - 004 Compose - 005 Kana - 006 Power - 007 Shift - 008 Do not disturb - 009 Mute - 00a Tone Enabke - 00b High Cut Filter - 00c Low Cut Filter - 00d Equalizer Enable - 00e Sound Field ON - 00f Surround On - 010 Repeat - 011 Stereo - 012 Sampling Rate Detect - 013 Spinning - 014 CAV - 015 CLV - 016 Recording Format Detect - 017 Off-Hook - 018 Ring - 019 Message Waiting - 01a Data Mode - 01b Battery Operation - 01c Battery OK - 01d Battery Low - 01e Speaker - 01f Head Set - 020 Hold - 021 Microphone - 022 Coverage - 023 Night Mode - 024 Send Calls - 025 Call Pickup - 026 Conference - 027 Stand-by - 028 Camera On - 029 Camera Off - 02a On-Line - 02b Off-Line - 02c Busy - 02d Ready - 02e Paper-Out - 02f Paper-Jam - 030 Remote - 031 Forward - 032 Reverse - 033 Stop - 034 Rewind - 035 Fast Forward - 036 Play - 037 Pause - 038 Record - 039 Error - 03a Usage Selected Indicator - 03b Usage In Use Indicator - 03c Usage Multi Indicator - 03d Indicator On - 03e Indicator Flash - 03f Indicator Slow Blink - 040 Indicator Fast Blink - 041 Indicator Off - 042 Flash On Time - 043 Slow Blink On Time - 044 Slow Blink Off Time - 045 Fast Blink On Time - 046 Fast Blink Off Time - 047 Usage Color Indicator - 048 Indicator Red - 049 Indicator Green - 04a Indicator Amber - 04b Generic Indicator - 04c System Suspend - 04d External Power Connected -HUT 09 Buttons - 000 No Button Pressed - 001 Button 1 (Primary) - 002 Button 2 (Secondary) - 003 Button 3 (Tertiary) - 004 Button 4 - 005 Button 5 -HUT 0a Ordinal - 001 Instance 1 - 002 Instance 2 - 003 Instance 3 -HUT 0b Telephony - 000 Unassigned - 001 Phone - 002 Answering Machine - 003 Message Controls - 004 Handset - 005 Headset - 006 Telephony Key Pad - 007 Programmable Button - 020 Hook Switch - 021 Flash - 022 Feature - 023 Hold - 024 Redial - 025 Transfer - 026 Drop - 027 Park - 028 Forward Calls - 029 Alternate Function - 02a Line - 02b Speaker Phone - 02c Conference - 02d Ring Enable - 02e Ring Select - 02f Phone Mute - 030 Caller ID - 050 Speed Dial - 051 Store Number - 052 Recall Number - 053 Phone Directory - 070 Voice Mail - 071 Screen Calls - 072 Do Not Disturb - 073 Message - 074 Answer On/Offf - 090 Inside Dial Tone - 091 Outside Dial Tone - 092 Inside Ring Tone - 093 Outside Ring Tone - 094 Priority Ring Tone - 095 Inside Ringback - 096 Priority Ringback - 097 Line Busy Tone - 098 Recorder Tone - 099 Call Waiting Tone - 09a Confirmation Tone 1 - 09b Confirmation Tone 2 - 09c Tones Off - 09d Outside Ringback - 0b0 Key 1 - 0b1 Key 2 - 0b3 Key 3 - 0b4 Key 4 - 0b5 Key 5 - 0b6 Key 6 - 0b7 Key 7 - 0b8 Key 8 - 0b9 Key 9 - 0ba Key Star - 0bb Key Pound - 0bc Key A - 0bd Key B - 0be Key C - 0bf Key D -HUT 0c Consumer - 000 Unassigned - 001 Consumer Control - 002 Numeric Key Pad - 003 Programmable Buttons - 020 +10 - 021 +100 - 022 AM/PM - 030 Power - 031 Reset - 032 Sleep - 033 Sleep After - 034 Sleep Mode - 035 Illumination - 036 Function Buttons - 040 Menu - 041 Menu Pick - 042 Menu Up - 043 Menu Down - 044 Menu Left - 045 Menu Right - 046 Menu Escape - 047 Menu Value Increase - 048 Menu Value Decrease - 060 Data on Screen - 061 Closed Caption - 062 Closed Caption Select - 063 VCR/TV - 064 Broadcast Mode - 065 Snapshot - 066 Still - 080 Selection - 081 Assign Selection - 082 Mode Step - 083 Recall Last - 084 Enter Channel - 085 Order Movie - 086 Channel - 087 Media Selection - 088 Media Select Computer - 089 Media Select TV - 08a Media Select WWW - 08b Media Select DVD - 08c Media Select Telephone - 08d Media Select Program Guide - 08e Media Select Video Phone - 08f Media Select Games - 090 Media Select Messages - 091 Media Select CD - 092 Media Select VCR - 093 Media Select Tuner - 094 Quit - 095 Help - 096 Media Select Tape - 097 Media Select Cable - 098 Media Select Satellite - 099 Media Select Security - 09a Media Select Home - 09b Media Select Call - 09c Channel Increment - 09d Channel Decrement - 09e Media Select SAP - 0a0 VCR Plus - 0a1 Once - 0a2 Daily - 0a3 Weekly - 0a4 Monthly - 0b0 Play - 0b1 Pause - 0b2 Record - 0b3 Fast Forward - 0b4 Rewind - 0b5 Scan Next Track - 0b6 Scan Previous Track - 0b7 Stop - 0b8 Eject - 0b9 Random Play - 0ba Select Disc - 0bb Enter Disc - 0bc Repeat - 0bd Tracking - 0be Track Normal - 0bf Slow Tracking - 0c0 Frame Forward - 0c1 Frame Back - 0c2 Mark - 0c3 Clear Mark - 0c4 Repeat from Mark - 0c5 Return to Mark - 0c6 Search Mark Forward - 0c7 Search Mark Backward - 0c8 Counter Reset - 0c9 Show Counter - 0ca Tracking Increment - 0cb Tracking Decrement - 0cc Stop/Eject - 0cd Play/Pause - 0ce Play/Skip - 0e0 Volume - 0e1 Balance - 0e2 Mute - 0e3 Bass - 0e4 Treble - 0e5 Bass Boost - 0e6 Surround Mode - 0e7 Loudness - 0e8 MPX - 0e9 Volume Increment - 0ea Volume Decrement - 0f0 Speed Select - 0f1 Playback Speed - 0f2 Standard Play - 0f3 Long Play - 0f4 Extended Play - 0f5 Slow - 100 Fan Enable - 101 Fan Speed - 102 Light Enable - 103 Light Illumination Level - 104 Climate Control Enable - 105 Room Temperature - 106 Security Enable - 107 Fire Alarm - 108 Police Alarm - 150 Balance Right - 151 Balance Left - 152 Bass Increment - 153 Bass Decrement - 154 Treble Increment - 155 Treble Decrement - 160 Speaker System - 161 Channel Left - 162 Channel Right - 163 Channel Center - 164 Channel Front - 165 Channel Center Front - 166 Channel Side - 167 Channel Surround - 168 Channel Low Frequency Enhancement - 169 Channel Top - 16a Channel Unknown - 170 Sub-Channel - 171 Sub-Channel Increment - 172 Sub-Channel Decrement - 173 Alternative Audio Increment - 174 Alternative Audio Decrement - 180 Application Launch Buttons - 181 AL Launch Button Configuration Tool - 182 AL Launch Button Configuration - 183 AL Consumer Control Configuration - 184 AL Word Processor - 185 AL Text Editor - 186 AL Spreadsheet - 187 AL Graphics Editor - 188 AL Presentation App - 189 AL Database App - 18a AL Email Reader - 18b AL Newsreader - 18c AL Voicemail - 18d AL Contacts/Address Book - 18e AL Calendar/Schedule - 18f AL Task/Project Manager - 190 AL Log/Jounal/Timecard - 191 AL Checkbook/Finance - 192 AL Calculator - 193 AL A/V Capture/Playback - 194 AL Local Machine Browser - 195 AL LAN/Wan Browser - 196 AL Internet Browser - 197 AL Remote Networking/ISP Connect - 198 AL Network Conference - 199 AL Network Chat - 19a AL Telephony/Dialer - 19b AL Logon - 19c AL Logoff - 19d AL Logon/Logoff - 19e AL Terminal Local/Screensaver - 19f AL Control Panel - 1a0 AL Command Line Processor/Run - 1a1 AL Process/Task Manager - 1a2 AL Select Task/Application - 1a3 AL Next Task/Application - 1a4 AL Previous Task/Application - 1a5 AL Preemptive Halt Task/Application - 200 Generic GUI Application Controls - 201 AC New - 202 AC Open - 203 AC CLose - 204 AC Exit - 205 AC Maximize - 206 AC Minimize - 207 AC Save - 208 AC Print - 209 AC Properties - 21a AC Undo - 21b AC Copy - 21c AC Cut - 21d AC Paste - 21e AC Select All - 21f AC Find - 220 AC Find and Replace - 221 AC Search - 222 AC Go To - 223 AC Home - 224 AC Back - 225 AC Forward - 226 AC Stop - 227 AC Refresh - 228 AC Previous Link - 229 AC Next Link - 22b AC History - 22c AC Subscriptions - 22d AC Zoom In - 22e AC Zoom Out - 22f AC Zoom - 230 AC Full Screen View - 231 AC Normal View - 232 AC View Toggle - 233 AC Scroll Up - 234 AC Scroll Down - 235 AC Scroll - 236 AC Pan Left - 237 AC Pan Right - 238 AC Pan - 239 AC New Window - 23a AC Tile Horizontally - 23b AC Tile Vertically - 23c AC Format -HUT 0d Digitizer - 000 Undefined - 001 Digitizer - 002 Pen - 003 Light Pen - 004 Touch Screen - 005 Touch Pad - 006 White Board - 007 Coordinate Measuring Machine - 008 3D Digitizer - 009 Stereo Plotter - 00a Articulated Arm - 00b Armature - 00c Multiple Point Digitizer - 00d Free Space Wand - 020 Stylus - 021 Puck - 022 Finger - 030 Tip Pressure - 031 Barrel Pressure - 032 In Range - 033 Touch - 034 Untouch - 035 Tap - 036 Quality - 037 Data Valid - 038 Transducer Index - 039 Tablet Function Keys - 03a Program Change Keys - 03b Battery Strength - 03c Invert - 03d X Tilt - 03e Y Tilt - 03f Azimuth - 040 Altitude - 041 Twist - 042 Tip Switch - 043 Secondary Tip Switch - 044 Barrel Switch - 045 Eraser - 046 Tablet Pick -HUT 0f PID Page - 000 Undefined - 001 Physical Interface Device - 020 Normal - 021 Set Effect Report - 022 Effect Block Index - 023 Parameter Block Offset - 024 ROM Flag - 025 Effect Type - 026 ET Constant Force - 027 ET Ramp - 028 ET Custom Force Data - 030 ET Square - 031 ET Sine - 032 ET Triangle - 033 ET Sawtooth Up - 034 ET Sawtooth Down - 040 ET Spring - 041 ET Damper - 042 ET Inertia - 043 ET Friction - 050 Duration - 051 Sample Period - 052 Gain - 053 Trigger Button - 054 Trigger Repeat Interval - 055 Axes Enable - 056 Direction Enable - 057 Direction - 058 Type Specific Block Offset - 059 Block Type - 05A Set Envelope Report - 05B Attack Level - 05C Attack Time - 05D Fade Level - 05E Fade Time - 05F Set Condition Report - 060 CP Offset - 061 Positive Coefficient - 062 Negative Coefficient - 063 Positive Saturation - 064 Negative Saturation - 065 Dead Band - 066 Download Force Sample - 067 Isoch Custom Force Enable - 068 Custom Force Data Report - 069 Custom Force Data - 06A Custom Force Vendor Defined Data - 06B Set Custom Force Report - 06C Custom Force Data Offset - 06D Sample Count - 06E Set Periodic Report - 06F Offset - 070 Magnitude - 071 Phase - 072 Period - 073 Set Constant Force Report - 074 Set Ramp Force Report - 075 Ramp Start - 076 Ramp End - 077 Effect Operation Report - 078 Effect Operation - 079 Op Effect Start - 07A Op Effect Start Solo - 07B Op Effect Stop - 07C Loop Count - 07D Device Gain Report - 07E Device Gain - 07F PID Pool Report - 080 RAM Pool Size - 081 ROM Pool Size - 082 ROM Effect Block Count - 083 Simultaneous Effects Max - 084 Pool Alignment - 085 PID Pool Move Report - 086 Move Source - 087 Move Destination - 088 Move Length - 089 PID Block Load Report - 08B Block Load Status - 08C Block Load Success - 08D Block Load Full - 08E Block Load Error - 08F Block Handle - 090 PID Block Free Report - 091 Type Specific Block Handle - 092 PID State Report - 094 Effect Playing - 095 PID Device Control Report - 096 PID Device Control - 097 DC Enable Actuators - 098 DC Disable Actuators - 099 DC Stop All Effects - 09A DC Device Reset - 09B DC Device Pause - 09C DC Device Continue - 09F Device Paused - 0A0 Actuators Enabled - 0A4 Safety Switch - 0A5 Actuator Override Switch - 0A6 Actuator Power - 0A7 Start Delay - 0A8 Parameter Block Size - 0A9 Device Managed Pool - 0AA Shared Parameter Blocks - 0AB Create New Effect Report - 0AC RAM Pool Available -HUT 10 Unicode -HUT 14 Alphanumeric Display - 000 Undefined - 001 Alphanumeric Display - 020 Display Attributes Report - 021 ASCII Character Set - 022 Data Read Back - 023 Font Read Back - 024 Display Control Report - 025 Clear Display - 026 Display Enable - 027 Screen Saver Delay - 028 Screen Saver Enable - 029 Vertical Scroll - 02a Horizontal Scroll - 02b Character Report - 02c Display Data - 02d Display Status - 02e Stat Not Ready - 02f Stat Ready - 030 Err Not a loadable Character - 031 Err Font Data Cannot Be Read - 032 Cursur Position Report - 033 Row - 034 Column - 035 Rows - 036 Columns - 037 Cursor Pixel Positioning - 038 Cursor Mode - 039 Cursor Enable - 03a Cursor Blink - 03b Font Report - 03c Font Data - 03d Character Width - 03e Character Height - 03f Character Spacing Horizontal - 040 Character Spacing Vertical - 041 Unicode Character Set -HUT 80 USB Monitor - 001 Monitor Control - 002 EDID Information - 003 VDIF Information - 004 VESA Version -HUT 81 USB Monitor Enumerated Values -HUT 82 Monitor VESA Virtual Controls - 001 Degauss - 010 Brightness - 012 Contrast - 016 Red Video Gain - 018 Green Video Gain - 01a Blue Video Gain - 01c Focus - 020 Horizontal Position - 022 Horizontal Size - 024 Horizontal Pincushion - 026 Horizontal Pincushion Balance - 028 Horizontal Misconvergence - 02a Horizontal Linearity - 02c Horizontal Linearity Balance - 030 Vertical Position - 032 Vertical Size - 034 Vertical Pincushion - 036 Vertical Pincushion Balance - 038 Vertical Misconvergence - 03a Vertical Linearity - 03c Vertical Linearity Balance - 040 Parallelogram Balance (Key Distortion) - 042 Trapezoidal Distortion (Key) - 044 Tilt (Rotation) - 046 Top Corner Distortion Control - 048 Top Corner Distortion Balance - 04a Bottom Corner Distortion Control - 04c Bottom Corner Distortion Balance - 056 Horizontal Moire - 058 Vertical Moire - 05e Input Level Select - 060 Input Source Select - 06c Red Video Black Level - 06e Green Video Black Level - 070 Blue Video Black Level - 0a2 Auto Size Center - 0a4 Polarity Horizontal Sychronization - 0a6 Polarity Vertical Synchronization - 0aa Screen Orientation - 0ac Horizontal Frequency in Hz - 0ae Vertical Frequency in 0.1 Hz - 0b0 Settings - 0ca On Screen Display (OSD) - 0d4 Stereo Mode -HUT 84 Power Device Page - 000 Undefined - 001 iName - 002 Present Status - 003 Changed Status - 004 UPS - 005 Power Supply - 010 Battery System - 011 Battery System ID - 012 Battery - 013 Battery ID - 014 Charger - 015 Charger ID - 016 Power Converter - 017 Power Converter ID - 018 Outlet System - 019 Outlet System ID - 01a Input - 01b Input ID - 01c Output - 01d Output ID - 01e Flow - 01f Flow ID - 020 Outlet - 021 Outlet ID - 022 Gang - 023 Gang ID - 024 Power Summary - 025 Power Summary ID - 030 Voltage - 031 Current - 032 Frequency - 033 Apparent Power - 034 Active Power - 035 Percent Load - 036 Temperature - 037 Humidity - 038 Bad Count - 040 Config Voltage - 041 Config Current - 042 Config Frequency - 043 Config Apparent Power - 044 Config Active Power - 045 Config Percent Load - 046 Config Temperature - 047 Config Humidity - 050 Switch On Control - 051 Switch Off Control - 052 Toggle Control - 053 Low Voltage Transfer - 054 High Voltage Transfer - 055 Delay Before Reboot - 056 Delay Before Startup - 057 Delay Before Shutdown - 058 Test - 059 Module Reset - 05a Audible Alarm Control - 060 Present - 061 Good - 062 Internal Failure - 063 Voltage out of range - 064 Frequency out of range - 065 Overload - 066 Over Charged - 067 Over Temperature - 068 Shutdown Requested - 069 Shutdown Imminent - 06a Reserved - 06b Switch On/Off - 06c Switchable - 06d Used - 06e Boost - 06f Buck - 070 Initialized - 071 Tested - 072 Awaiting Power - 073 Communication Lost - 0fd iManufacturer - 0fe iProduct - 0ff iSerialNumber -HUT 85 Battery System Page - 000 Undefined - 001 SMB Battery Mode - 002 SMB Battery Status - 003 SMB Alarm Warning - 004 SMB Charger Mode - 005 SMB Charger Status - 006 SMB Charger Spec Info - 007 SMB Selector State - 008 SMB Selector Presets - 009 SMB Selector Info - 010 Optional Mfg. Function 1 - 011 Optional Mfg. Function 2 - 012 Optional Mfg. Function 3 - 013 Optional Mfg. Function 4 - 014 Optional Mfg. Function 5 - 015 Connection to SMBus - 016 Output Connection - 017 Charger Connection - 018 Battery Insertion - 019 Use Next - 01a OK to use - 01b Battery Supported - 01c SelectorRevision - 01d Charging Indicator - 028 Manufacturer Access - 029 Remaining Capacity Limit - 02a Remaining Time Limit - 02b At Rate - 02c Capacity Mode - 02d Broadcast To Charger - 02e Primary Battery - 02f Charge Controller - 040 Terminate Charge - 041 Terminate Discharge - 042 Below Remaining Capacity Limit - 043 Remaining Time Limit Expired - 044 Charging - 045 Discharging - 046 Fully Charged - 047 Fully Discharged - 048 Conditioning Flag - 049 At Rate OK - 04a SMB Error Code - 04b Need Replacement - 060 At Rate Time To Full - 061 At Rate Time To Empty - 062 Average Current - 063 Max Error - 064 Relative State Of Charge - 065 Absolute State Of Charge - 066 Remaining Capacity - 067 Full Charge Capacity - 068 Run Time To Empty - 069 Average Time To Empty - 06a Average Time To Full - 06b Cycle Count - 080 Batt. Pack Model Level - 081 Internal Charge Controller - 082 Primary Battery Support - 083 Design Capacity - 084 Specification Info - 085 Manufacturer Date - 086 Serial Number - 087 iManufacturerName - 088 iDeviceName - 089 iDeviceChemistry - 08a Manufacturer Data - 08b Rechargeable - 08c Warning Capacity Limit - 08d Capacity Granularity 1 - 08e Capacity Granularity 2 - 08f iOEMInformation - 0c0 Inhibit Charge - 0c1 Enable Polling - 0c2 Reset To Zero - 0d0 AC Present - 0d1 Battery Present - 0d2 Power Fail - 0d3 Alarm Inhibited - 0d4 Thermistor Under Range - 0d5 Thermistor Hot - 0d6 Thermistor Cold - 0d7 Thermistor Over Range - 0d8 Voltage Out Of Range - 0d9 Current Out Of Range - 0da Current Not Regulated - 0db Voltage Not Regulated - 0dc Master Mode - 0f0 Charger Selector Support - 0f1 Charger Spec - 0f2 Level 2 - 0f3 Level 3 -HUT 86 Power Pages -HUT 87 Power Pages -HUT 8c Bar Code Scanner Page (POS) -HUT 8d Scale Page (POS) -HUT 90 Camera Control Page -HUT 91 Arcade Control Page -HUT f0 Cash Device - 0f1 Cash Drawer - 0f2 Cash Drawer Number - 0f3 Cash Drawer Set - 0f4 Cash Drawer Status -HUT ff Vendor Specific - -# List of Languages - -# Syntax: -# L language_id language_name -# dialect_id dialect_name - -L 0001 Arabic - 01 Saudi Arabia - 02 Iraq - 03 Egypt - 04 Libya - 05 Algeria - 06 Morocco - 07 Tunesia - 08 Oman - 09 Yemen - 0a Syria - 0b Jordan - 0c Lebanon - 0d Kuwait - 0e U.A.E - 0f Bahrain - 10 Qatar -L 0002 Bulgarian -L 0003 Catalan -L 0004 Chinese - 01 Traditional - 02 Simplified - 03 Hongkong SAR, PRC - 04 Singapore - 05 Macau SAR -L 0005 Czech -L 0006 Danish -L 0007 German - 01 German - 02 Swiss - 03 Austrian - 04 Luxembourg - 05 Liechtenstein -L 0008 Greek -L 0009 English - 01 US - 02 UK - 03 Australian - 04 Canadian - 05 New Zealand - 06 Ireland - 07 South Africa - 08 Jamaica - 09 Carribean - 0a Belize - 0b Trinidad - 0c Zimbabwe - 0d Philippines -L 000a Spanish - 01 Castilian - 02 Mexican - 03 Modern - 04 Guatemala - 05 Costa Rica - 06 Panama - 07 Dominican Republic - 08 Venzuela - 09 Colombia - 0a Peru - 0b Argentina - 0c Ecuador - 0d Chile - 0e Uruguay - 0f Paraguay - 10 Bolivia - 11 El Salvador - 12 Honduras - 13 Nicaragua - 14 Puerto Rico -L 000b Finnish -L 000c French - 01 French - 02 Belgian - 03 Canadian - 04 Swiss - 05 Luxembourg - 06 Monaco -L 000d Hebrew -L 000e Hungarian -L 000f Idelandic -L 0010 Italian - 01 Italian - 02 Swiss -L 0011 Japanese -L 0012 Korean - 01 Korean -L 0013 Dutch - 01 Dutch - 02 Belgian -L 0014 Norwegian - 01 Bokmal - 02 Nynorsk -L 0015 Polish -L 0016 Portuguese - 01 Portuguese - 02 Brazilian -L 0017 forgotten -L 0018 Romanian -L 0019 Russian -L 001a Serbian - 01 Croatian - 02 Latin - 03 Cyrillic -L 001b Slovak -L 001c Albanian -L 001d Swedish - 01 Swedish - 02 Finland -L 001e Thai -L 001f Turkish -L 0020 Urdu - 01 Pakistan - 02 India -L 0021 Indonesian -L 0022 Ukrainian -L 0023 Belarusian -L 0024 Slovenian -L 0025 Estonian -L 0026 Latvian -L 0027 Lithuanian - 01 Lithuanian -L 0028 forgotten -L 0029 Farsi -L 002a Vietnamese -L 002b Armenian -L 002c Azeri - 01 Cyrillic - 02 Latin -L 002d Basque -L 002e forgotten -L 002f Macedonian -L 0036 Afrikaans -L 0037 Georgian -L 0038 Faeroese -L 0039 Hindi -L 003e Malay - 01 Malaysia - 02 Brunei Darassalam -L 003f Kazak -L 0041 Awahili -L 0043 Uzbek - 01 Latin - 02 Cyrillic -L 0044 Tatar -L 0045 Bengali -L 0046 Punjabi -L 0047 Gujarati -L 0048 Oriya -L 0049 Tamil -L 004a Telugu -L 004b Kannada -L 004c Malayalam -L 004d Assamese -L 004e Marathi -L 004f Sanskrit -L 0057 Konkani -L 0058 Manipuri -L 0059 Sindhi -L 0060 Kashmiri - 02 India -L 0061 Nepali - 02 India - -# HID Descriptor bCountryCode -# HID Specification 1.11 (2001-06-27) page 23 -# -# Syntax: -# HCC country_code keymap_type - -HCC 00 Not supported -HCC 01 Arabic -HCC 02 Belgian -HCC 03 Canadian-Bilingual -HCC 04 Canadian-French -HCC 05 Czech Republic -HCC 06 Danish -HCC 07 Finnish -HCC 08 French -HCC 09 German -HCC 10 Greek -HCC 11 Hebrew -HCC 12 Hungary -HCC 13 International (ISO) -HCC 14 Italian -HCC 15 Japan (Katakana) -HCC 16 Korean -HCC 17 Latin American -HCC 18 Netherlands/Dutch -HCC 19 Norwegian -HCC 20 Persian (Farsi) -HCC 21 Poland -HCC 22 Portuguese -HCC 23 Russia -HCC 24 Slovakia -HCC 25 Spanish -HCC 26 Swedish -HCC 27 Swiss/French -HCC 28 Swiss/German -HCC 29 Switzerland -HCC 30 Taiwan -HCC 31 Turkish-Q -HCC 32 UK -HCC 33 US -HCC 34 Yugoslavia -HCC 35 Turkish-F - -# List of Video Class Terminal Types - -# Syntax: -# VT terminal_type terminal_type_name - -VT 0100 USB Vendor Specific -VT 0101 USB Streaming -VT 0200 Input Vendor Specific -VT 0201 Camera Sensor -VT 0202 Sequential Media -VT 0300 Output Vendor Specific -VT 0301 Generic Display -VT 0302 Sequential Media -VT 0400 External Vendor Specific -VT 0401 Composite Video -VT 0402 S-Video -VT 0403 Component Video -- cgit v0.10.2 From e8323b834d70957def39b4460e57ccd51159ce11 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 16 Jun 2011 02:24:58 -0700 Subject: staging: usbip: userspace: add name to AUTHORS Add myself to the AUTHORS file. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/AUTHORS b/drivers/staging/usbip/userspace/AUTHORS index 2f73e65..a27ea8d 100644 --- a/drivers/staging/usbip/userspace/AUTHORS +++ b/drivers/staging/usbip/userspace/AUTHORS @@ -1,2 +1,3 @@ Takahiro Hirofuchi Robert Leibl +matt mooney -- cgit v0.10.2 From 89415218adaf4b0dba562b79169c2980717541c6 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 16 Jun 2011 02:24:59 -0700 Subject: staging: usbip: userspace: cleanup README Update examples to correspond with the new usbip-utils; edit grammar; and cleanup format for consistency. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/README b/drivers/staging/usbip/userspace/README index 2ee84b9..aafab102 100644 --- a/drivers/staging/usbip/userspace/README +++ b/drivers/staging/usbip/userspace/README @@ -1,19 +1,19 @@ -# vim:tw=78:ts=4:expandtab:ai:sw=4 # # README for usbip-utils # -# Copyright (C) 2005-2008 Takahiro Hirofuchi +# Copyright (C) 2011 matt mooney +# 2005-2008 Takahiro Hirofuchi [Requirements] - USB/IP device drivers - Its source code is included under $(top)/drivers/. + Found in the staging directory of the Linux kernel. - sysfsutils >= 2.0.0 - sysfsutils library + sysfsutils library - libwrap0-dev - tcp wrapper library + tcp wrapper library - gcc >= 4.0 @@ -21,195 +21,178 @@ - libtool, automake >= 1.9, autoconf >= 2.5.0, pkg-config + [Install] - 0. Skip here if you see a configure script. - $ ./autogen.sh + 0. Generate configuration scripts. + $ ./autogen.sh + + 1. Compile & install the userspace utilities. + $ ./configure [--with-tcp-wrappers=no] [--with-usbids-dir=] + $ make install - 1. Compile & install. - $ ./configure - $ make install + 2. Compile & install USB/IP drivers. - 2. Compile & install USB/IP drivers if not yet. [Usage] - server:# (Attach your USB device physically.) + server:# (Physically attach your USB device.) server:# insmod usbip-core.ko server:# insmod usbip-host.ko - - It was formerly named as stub.ko. server:# usbipd -D - - Start usbip daemon. + - Start usbip daemon. - server:# usbip_bind_driver --list - - List driver assignments for usb devices. - - server:# usbip_bind_driver --usbip 1-2 - - Bind usbip-host.ko to the device of busid 1-2. - - A usb device 1-2 is now exportable to other hosts! - - Use 'usbip_bind_driver --other 1-2' when you want to shutdown exporting - and use the device locally. + server:# usbip list -l + - List driver assignments for USB devices. + server:# usbip bind --busid 1-2 + - Bind usbip-host.ko to the device with busid 1-2. + - The USB device 1-2 is now exportable to other hosts! + - Use `usbip unbind --busid 1-2' to stop exporting the device. client:# insmod usbip-core.ko client:# insmod vhci-hcd.ko - - It was formerly named as vhci.ko. - client:# usbip --list server - - List exportable usb devices on the server. + client:# usbip list --remote + - List exported USB devices on the . + + client:# usbip attach --host --busid 1-2 + - Connect the remote USB device. - client:# usbip --attach server 1-2 - - Connect the remote USB device. + client:# usbip port + - Show virtual port status. - client:# usbip --port - - Show virtual port status. + client:# usbip detach --port + - Detach the USB device. - client:# usbip --detach 0 - - Detach the usb device. +[Example] +--------------------------- + SERVER SIDE +--------------------------- +Physically attach your USB devices to this host. -[Output Example] --------------------------------------------------------------------------------------------------------- -- SERVER SIDE (physically attach your USB devices to this host) ---------------------------------------- --------------------------------------------------------------------------------------------------------- -trois:# insmod (somewhere)/usbip-core.ko -trois:# insmod (somewhere)/usbip-host.ko -trois:# usbipd -D + trois:# insmod path/to/usbip-core.ko + trois:# insmod path/to/usbip-host.ko + trois:# usbipd -D --------------------------------------------------------------------------------------------------------- -In another terminal, let's look up what usb devices are physically attached to -this host. We can see a usb storage device of busid 3-3.2 is now bound to -usb-storage driver. To export this device, we first mark the device as -"exportable"; the device is bound to usbip driver. Please remember you can not -export a usb hub. +In another terminal, let's look up what USB devices are physically +attached to this host. - trois:# usbip_bind_driver --list - List USB devices - - busid 3-3.2 (04bb:0206) - 3-3.2:1.0 -> usb-storage + trois:# usbip_bind_driver --list + Local USB devices + ================= + - busid 1-1 (05a9:a511) + 1-1:1.0 -> ov511 - - busid 3-3.1 (08bb:2702) - 3-3.1:1.0 -> snd-usb-audio - 3-3.1:1.1 -> snd-usb-audio + - busid 3-2 (0711:0902) + 3-2:1.0 -> none - - busid 3-3 (0409:0058) - 3-3:1.0 -> hub + - busid 3-3.1 (08bb:2702) + 3-3.1:1.0 -> snd-usb-audio + 3-3.1:1.1 -> snd-usb-audio - - busid 3-2 (0711:0902) - 3-2:1.0 -> none + - busid 3-3.2 (04bb:0206) + 3-3.2:1.0 -> usb-storage - - busid 1-1 (05a9:a511) - 1-1:1.0 -> ov511 + - busid 3-3 (0409:0058) + 3-3:1.0 -> hub - - busid 4-1 (046d:08b2) - 4-1:1.0 -> none - 4-1:1.1 -> none - 4-1:1.2 -> none + - busid 4-1 (046d:08b2) + 4-1:1.0 -> none + 4-1:1.1 -> none + 4-1:1.2 -> none - - busid 5-2 (058f:9254) - 5-2:1.0 -> hub + - busid 5-2 (058f:9254) + 5-2:1.0 -> hub --------------------------------------------------------------------------------------------------------- -Mark the device of busid 3-3.2 as exportable. +A USB storage device of busid 3-3.2 is now bound to the usb-storage +driver. To export this device, we first mark the device as +"exportable"; the device is bound to the usbip-host driver. Please +remember you can not export a USB hub. - trois:# usbip_bind_driver --usbip 3-3.2 - ** (process:24621): DEBUG: 3-3.2:1.0 -> none - ** (process:24621): DEBUG: write "add 3-3.2" to /sys/bus/usb/drivers/usbip/match_busid - ** Message: bind 3-3.2 to usbip, complete! +Mark the device of busid 3-3.2 as exportable: - trois:# usbip_bind_driver --list - List USB devices - - busid 3-3.2 (04bb:0206) - 3-3.2:1.0 -> usbip - (snip) + trois:# usbip --debug bind --busid 3-3.2 + ... + usbip dbg: utils.c: 52 (modify_match_busid) write "add 3-3.2" to... + usbip dbg: usbip_bind.c: 231 (use_device_by_usbip) bind 3-3.2 complete! -Iterate the above operation for other devices if you like. + trois:# usbip list -l + Local USB devices + ================= + ... + - busid 3-3.2 (04bb:0206) + 3-3.2:1.0 -> usbip-host + ... --------------------------------------------------------------------------------------------------------- -- CLIENT SIDE ------------------------------------------------------------------------------------------ --------------------------------------------------------------------------------------------------------- -First, let's list available remote devices which are marked as exportable in -the server host. +--------------------------- + CLIENT SIDE +--------------------------- +First, let's list available remote devices that are marked as +exportable on the host. - deux:# insmod (somewhere)/usbip-core.ko - deux:# insmod (somewhere)/vhci_hcd.ko + deux:# insmod path/to/usbip-core.ko + deux:# insmod path/to/vhci-hcd.ko - deux:# usbip --list 10.0.0.3 - - 10.0.0.3 - 1-1: Prolific Technology, Inc. : unknown product (067b:3507) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Mass Storage / SCSI / Bulk (Zip) (08/06/50) + deux:# usbip list --remote 10.0.0.3 + - 10.0.0.3 + 1-1: Prolific Technology, Inc. : unknown product (067b:3507) + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Mass Storage / SCSI / Bulk (Zip) (08/06/50) 1-2.2.1: Apple Computer, Inc. : unknown product (05ac:0203) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Human Interface Devices / Boot Interface Subclass / Keyboard (03/01/01) + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Human Interface Devices / Boot Interface Subclass / Keyboard (03/01/01) 1-2.2.3: OmniVision Technologies, Inc. : OV511+ WebCam (05a9:a511) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.3 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Vendor Specific Class / unknown subclass / unknown protocol (ff/00/00) - - 3-1: Logitech, Inc. : QuickCam Pro 4000 (046d:08b2) - : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.0/usb3/3-1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Data / unknown subclass / unknown protocol (0a/ff/00) - : 1 - Audio / Control Device / unknown protocol (01/01/00) - : 2 - Audio / Streaming / unknown protocol (01/02/00) - - 4-1: Logitech, Inc. : QuickCam Express (046d:0870) - : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.1/usb4/4-1 - : Vendor Specific Class / Vendor Specific Subclass / Vendor Specific Protocol (ff/ff/ff) - : 0 - Vendor Specific Class / Vendor Specific Subclass / Vendor Specific Protocol (ff/ff/ff) - - 4-2: Texas Instruments Japan : unknown product (08bb:2702) - : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.1/usb4/4-2 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Audio / Control Device / unknown protocol (01/01/00) - : 1 - Audio / Streaming / unknown protocol (01/02/00) - --------------------------------------------------------------------------------------------------------- -Attach a remote usb device! - - deux:# usbip --attach 10.0.0.3 1-1 - port 0 attached - --------------------------------------------------------------------------------------------------------- -Show what devices are attached to this client. - - deux:# usbip --port - Port 00: at Full Speed(12Mbps) - Prolific Technology, Inc. : unknown product (067b:3507) - 6-1 -> usbip://10.0.0.3:3240/1-1 (remote bus/dev 001/004) - 6-1:1.0 used by usb-storage - /sys/class/scsi_device/0:0:0:0/device - /sys/class/scsi_host/host0/device - /sys/block/sda/device - --------------------------------------------------------------------------------------------------------- -Detach the imported device. - - deux:# usbip --detach 0 - port 0 detached - --------------------------------------------------------------------------------------------------------- - - -[Check List] - - See Debug Tips in the project wiki. - - http://usbip.wiki.sourceforge.net/how-to-debug-usbip + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.3 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Vendor Specific Class / unknown subclass / unknown protocol (ff/00/00) + + 3-1: Logitech, Inc. : QuickCam Pro 4000 (046d:08b2) + : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.0/usb3/3-1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Data / unknown subclass / unknown protocol (0a/ff/00) + : 1 - Audio / Control Device / unknown protocol (01/01/00) + : 2 - Audio / Streaming / unknown protocol (01/02/00) + +Attach a remote USB device: + + deux:# usbip attach --host 10.0.0.3 --busid 1-1 + port 0 attached + +Show the devices attached to this client: + + deux:# usbip port + Port 00: at Full Speed(12Mbps) + Prolific Technology, Inc. : unknown product (067b:3507) + 6-1 -> usbip://10.0.0.3:3240/1-1 (remote bus/dev 001/004) + 6-1:1.0 used by usb-storage + /sys/class/scsi_device/0:0:0:0/device + /sys/class/scsi_host/host0/device + /sys/block/sda/device + +Detach the imported device: + + deux:# usbip detach --port 0 + port 0 detached + + +[Checklist] + - See 'Debug Tips' on the project wiki. + - http://usbip.wiki.sourceforge.net/how-to-debug-usbip - usbip-host.ko must be bound to the target device. - - See /proc/bus/usb/devices and find "Driver=..." lines of the device. + - See /proc/bus/usb/devices and find "Driver=..." lines of the device. - Shutdown firewall. - - usbip now uses TCP port 3240. + - usbip now uses TCP port 3240. - Disable SELinux. - - If possible, compile your kernel with CONFIG_USB_DEBUG flag and try - again. - - Check your kernel and daemon messages. - ex. /var/log/{messages, kern.log, daemon.log, syslog} + - If possible, compile your kernel with CONFIG_USB_DEBUG flag and try again. + - Check the kernel and daemon messages. [Contact] - Mailing List: usbip-devel _at_ lists.sourceforge.net + Mailing List: linux-usb@vger.kernel.org -- cgit v0.10.2 From ffac362e71ddc849d555b9a9726831b97b09288b Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Fri, 24 Jun 2011 17:02:27 -0500 Subject: staging: rtl8187se: Fix big-endian warning When compiling the rtl8187se driver from staging on a big-endian architecture, the following warning results: CC [M] drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.o drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c: In function 'ieee80211_probe_resp': drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c:824: warning: value computed is not used The warning is due to misuse of cpu_to_le16(). Signed-off-by: Larry Finger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c index f06c311..52a7386 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c @@ -820,7 +820,7 @@ static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *d cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS); if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT)) - cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT)); + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT); crypt = ieee->crypt[ieee->tx_keyidx]; -- cgit v0.10.2 From 4046dabb7992580da6ee6cadb938d15627e7676e Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Fri, 24 Jun 2011 17:02:54 -0500 Subject: staging: rtl8192e: Fix big-endian warning When compiling the rtl8192e driver from staging on a big-endian architecture, the following warning results: CC [M] drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.o drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c: In function 'ieee80211_probe_resp': drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c:781: warning: value computed is not used The warning is due to misuse of cpu_to_le16(). Signed-off-by: Larry Finger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c index 45e3cc1..60e9a09 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c @@ -777,7 +777,7 @@ static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *d cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); //add short preamble here if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT)) - cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT)); + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT); crypt = ieee->crypt[ieee->tx_keyidx]; if (encrypt) -- cgit v0.10.2 From 20a45d6629743c1836e6f402eeba5befe9f22971 Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Fri, 24 Jun 2011 17:03:12 -0500 Subject: staging: rtl8192u: Fix big-endian warning When compiling the rtl8192u driver from staging on a big-endian architecture, the following warning results: CC [M] drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.o drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c: In function 'ieee80211_probe_resp': drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c:780: warning: value computed is not used The warning is due to misuse of cpu_to_le16(). Signed-off-by: Larry Finger Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c index 2fb4072..b00eb0e 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c @@ -776,7 +776,7 @@ static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *d cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); //add short preamble here if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT)) - cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT)); + beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT); crypt = ieee->crypt[ieee->tx_keyidx]; if (encrypt) -- cgit v0.10.2 From 9a20542fd252162673f3db6f62090688cc1baa72 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:31 -0700 Subject: staging: usbip: userspace: update cleanup.sh Modify $FILES to account for the new directory layout. Also, sort the list of files within the variable to make it human-readable. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/cleanup.sh b/drivers/staging/usbip/userspace/cleanup.sh index da2f89b..955c3cc 100755 --- a/drivers/staging/usbip/userspace/cleanup.sh +++ b/drivers/staging/usbip/userspace/cleanup.sh @@ -1,10 +1,12 @@ -#!/bin/sh -x - +#!/bin/sh if [ -r Makefile ]; then make distclean fi -FILES="configure cscope.out Makefile.in depcomp compile config.guess config.sub config.h.in~ config.log config.status ltmain.sh libtool config.h.in autom4te.cache missing aclocal.m4 install-sh cmd/Makefile.in lib/Makefile.in Makefile lib/Makefile cmd/Makefile" +FILES="aclocal.m4 autom4te.cache compile config.guess config.h.in config.log \ + config.status config.sub configure cscope.out depcomp install-sh \ + libsrc/Makefile libsrc/Makefile.in libtool ltmain.sh Makefile \ + Makefile.in missing src/Makefile src/Makefile.in" -rm -Rf $FILES +rm -vRf $FILES -- cgit v0.10.2 From 213fd4adcea93964f24376b6b82435d5495632a8 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:32 -0700 Subject: staging: usbip: userspace: usbip_common.h: cleanup log macros Provide better abstraction for easier modification, and align the macros for readability. Remove notice() because it is not used. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index 32b27ed..090b7c5 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -58,51 +58,49 @@ extern int usbip_use_syslog; extern int usbip_use_stderr; extern int usbip_use_debug ; -#define err(fmt, args...) do { \ - if (usbip_use_syslog) { \ - syslog(LOG_ERR, "usbip err: %13s:%4d (%-12s) " fmt "\n", \ - __FILE__, __LINE__, __FUNCTION__, ##args); \ - } \ - if (usbip_use_stderr) { \ - fprintf(stderr, "usbip err: %13s:%4d (%-12s) " fmt "\n", \ - __FILE__, __LINE__, __FUNCTION__, ##args); \ - } \ -} while (0) - -#define notice(fmt, args...) do { \ - if (usbip_use_syslog) { \ - syslog(LOG_DEBUG, "usbip: " fmt, ##args); \ - } \ - if (usbip_use_stderr) { \ - fprintf(stderr, "usbip: " fmt "\n", ##args); \ - } \ -} while (0) - -#define info(fmt, args...) do { \ - if (usbip_use_syslog) { \ - syslog(LOG_DEBUG, fmt, ##args); \ - } \ - if (usbip_use_stderr) { \ - fprintf(stderr, fmt "\n", ##args); \ - } \ -} while (0) - -#define dbg(fmt, args...) do { \ - if (usbip_use_debug) { \ - if (usbip_use_syslog) { \ - syslog(LOG_DEBUG, "usbip dbg: %13s:%4d (%-12s) " fmt, \ - __FILE__, __LINE__, __FUNCTION__, ##args); \ - } \ - if (usbip_use_stderr) { \ - fprintf(stderr, "usbip dbg: %13s:%4d (%-12s) " fmt "\n", \ - __FILE__, __LINE__, __FUNCTION__, ##args); \ - } \ - } \ -} while (0) - - -#define BUG() do { err("sorry, it's a bug"); abort(); } while (0) - +#define PROGNAME "usbip" + +#define pr_fmt(fmt) "%s: %s: " fmt "\n", PROGNAME +#define dbg_fmt(fmt) pr_fmt("%s:%d:[%s] " fmt), "debug", \ + __FILE__, __LINE__, __FUNCTION__ + +#define err(fmt, args...) \ + do { \ + if (usbip_use_syslog) { \ + syslog(LOG_ERR, pr_fmt(fmt), "error", ##args); \ + } \ + if (usbip_use_stderr) { \ + fprintf(stderr, pr_fmt(fmt), "error", ##args); \ + } \ + } while (0) + +#define info(fmt, args...) \ + do { \ + if (usbip_use_syslog) { \ + syslog(LOG_INFO, pr_fmt(fmt), "info", ##args); \ + } \ + if (usbip_use_stderr) { \ + fprintf(stderr, pr_fmt(fmt), "info", ##args); \ + } \ + } while (0) + +#define dbg(fmt, args...) \ + do { \ + if (usbip_use_debug) { \ + if (usbip_use_syslog) { \ + syslog(LOG_DEBUG, dbg_fmt(fmt), ##args); \ + } \ + if (usbip_use_stderr) { \ + fprintf(stderr, dbg_fmt(fmt), ##args); \ + } \ + } \ + } while (0) + +#define BUG() \ + do { \ + err("sorry, it's a bug!"); \ + abort(); \ + } while (0) struct usbip_usb_interface { uint8_t bInterfaceClass; -- cgit v0.10.2 From 93e18e0ece647ace11a7cdfea4ae895077190f17 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:33 -0700 Subject: staging: usbip: userspace: usbip_common.h: move enums Relocate enums to follow logging macros. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index 090b7c5..7dadb21 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -30,30 +30,6 @@ #define USBIP_HOST_DRV_NAME "usbip-host" #define USBIP_VHCI_DRV_NAME "vhci_hcd" -enum usb_device_speed { - USB_SPEED_UNKNOWN = 0, /* enumerating */ - USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */ - USB_SPEED_HIGH, /* usb 2.0 */ - USB_SPEED_VARIABLE /* wireless (usb 2.5) */ -}; - -/* FIXME: how to sync with drivers/usbip_common.h ? */ -enum usbip_device_status{ - /* sdev is available. */ - SDEV_ST_AVAILABLE = 0x01, - /* sdev is now used. */ - SDEV_ST_USED, - /* sdev is unusable because of a fatal error. */ - SDEV_ST_ERROR, - - /* vdev does not connect a remote device. */ - VDEV_ST_NULL, - /* vdev is used, but the USB address is not assigned yet */ - VDEV_ST_NOTASSIGNED, - VDEV_ST_USED, - VDEV_ST_ERROR -}; - extern int usbip_use_syslog; extern int usbip_use_stderr; extern int usbip_use_debug ; @@ -102,6 +78,30 @@ extern int usbip_use_debug ; abort(); \ } while (0) +enum usb_device_speed { + USB_SPEED_UNKNOWN = 0, /* enumerating */ + USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */ + USB_SPEED_HIGH, /* usb 2.0 */ + USB_SPEED_VARIABLE /* wireless (usb 2.5) */ +}; + +/* FIXME: how to sync with drivers/usbip_common.h ? */ +enum usbip_device_status{ + /* sdev is available. */ + SDEV_ST_AVAILABLE = 0x01, + /* sdev is now used. */ + SDEV_ST_USED, + /* sdev is unusable because of a fatal error. */ + SDEV_ST_ERROR, + + /* vdev does not connect a remote device. */ + VDEV_ST_NULL, + /* vdev is used, but the USB address is not assigned yet */ + VDEV_ST_NOTASSIGNED, + VDEV_ST_USED, + VDEV_ST_ERROR +}; + struct usbip_usb_interface { uint8_t bInterfaceClass; uint8_t bInterfaceSubClass; @@ -109,8 +109,6 @@ struct usbip_usb_interface { uint8_t padding; /* alignment */ } __attribute__((packed)); - - struct usbip_usb_device { char path[SYSFS_PATH_MAX]; char busid[SYSFS_BUS_ID_SIZE]; -- cgit v0.10.2 From 4fd83e84d5069a17a00cbc345cfc045c00e4b7dc Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:34 -0700 Subject: staging: usbip: userspace: usbip_common.h: fixup header includes Remove unnecessary headers from the file, and add the now missing headers into the files that actually need them. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index 4d4d171..6a1272d 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -4,6 +4,8 @@ #include #include + +#include #include #include "usbip.h" diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h index 7dadb21..eedefbd 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h @@ -2,20 +2,18 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#ifndef _USBIP_COMMON_H -#define _USBIP_COMMON_H +#ifndef __USBIP_COMMON_H +#define __USBIP_COMMON_H + +#include -#include #include -#include -#include #include -#include #include +#include -#include -#include -#include +#include +#include #ifndef USBIDS_FILE #define USBIDS_FILE "/usr/share/hwdata/usb.ids" @@ -146,4 +144,4 @@ void usbip_names_free(void); void usbip_names_get_product(char *buff, size_t size, uint16_t vendor, uint16_t product); void usbip_names_get_class(char *buff, size_t size, uint8_t class, uint8_t subclass, uint8_t protocol); -#endif +#endif /* __USBIP_COMMON_H */ diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 1da1109..2a25cec 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -6,6 +6,7 @@ #include #include +#include #include #include -- cgit v0.10.2 From f2fb62b371703e70593780ad40333c2e21030df8 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:35 -0700 Subject: staging: usbip: userspace: libsrc: set program name for logging Set the program name to "libusbip" to identify that the message is from the library code. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index 6a1272d..b62f6b2 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -10,6 +10,9 @@ #include "usbip.h" +#undef PROGNAME +#define PROGNAME "libusbip" + struct usbip_stub_driver *stub_driver; static struct sysfs_driver *open_sysfs_stub_driver(void) diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.c b/drivers/staging/usbip/userspace/libsrc/usbip_common.c index e9d0614..6ac4361 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.c +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.c @@ -5,6 +5,9 @@ #include "usbip.h" #include "names.h" +#undef PROGNAME +#define PROGNAME "libusbip" + int usbip_use_syslog = 0; int usbip_use_stderr = 0; int usbip_use_debug = 0; diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index 386f63b..f10121c 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -5,6 +5,9 @@ #include "usbip.h" +#undef PROGNAME +#define PROGNAME "libusbip" + struct usbip_vhci_driver *vhci_driver; static struct usbip_imported_device *imported_device_init(struct usbip_imported_device *idev, char *busid) -- cgit v0.10.2 From c93be5b178ca7f3f4599da7a26a5828ab36aafb4 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:36 -0700 Subject: staging: usbip: userspace: usbip.c: add log option Add option for logging with syslog, and default to use stderr for error and info messages. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c index 8940cd0..cdfe4c2 100644 --- a/drivers/staging/usbip/userspace/src/usbip.c +++ b/drivers/staging/usbip/userspace/src/usbip.c @@ -23,6 +23,7 @@ #include #include +#include #include "usbip_common.h" #include "usbip.h" @@ -33,7 +34,7 @@ static int usbip_version(int argc, char *argv[]); static const char usbip_version_string[] = PACKAGE_STRING; static const char usbip_usage_string[] = - "usbip [--debug] [version]\n" + "usbip [--debug] [--log] [version]\n" " [help] \n"; static void usbip_usage(void) @@ -138,12 +139,15 @@ int main(int argc, char *argv[]) { static const struct option opts[] = { { "debug", no_argument, NULL, 'd' }, - { NULL, 0, NULL, 0 } + { "log", no_argument, NULL, 'l' }, + { NULL, 0, NULL, 0 } }; + char *cmd; int opt; int i, rc = -1; + usbip_use_stderr = 1; opterr = 0; for (;;) { opt = getopt_long(argc, argv, "+d", opts, NULL); @@ -154,7 +158,10 @@ int main(int argc, char *argv[]) switch (opt) { case 'd': usbip_use_debug = 1; - usbip_use_stderr = 1; + break; + case 'l': + usbip_use_syslog = 1; + openlog("", LOG_PID, LOG_USER); break; default: goto err_out; -- cgit v0.10.2 From 099f79fa5a02c909ca1a621768fe454b664a7efa Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:37 -0700 Subject: staging: usbip: userspace: libsrc: remove usbip.h Remove the library version of usbip.h because its sole purpose was to include other headers, which is bad practice. Also modify include guards for consistency. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/Makefile.am b/drivers/staging/usbip/userspace/Makefile.am index 4b66cbe..d557fe9 100644 --- a/drivers/staging/usbip/userspace/Makefile.am +++ b/drivers/staging/usbip/userspace/Makefile.am @@ -1,6 +1,6 @@ SUBDIRS := libsrc src includedir := @includedir@/usbip include_HEADERS := $(addprefix libsrc/, \ - usbip.h usbip_common.h vhci_driver.h stub_driver.h) + usbip_common.h vhci_driver.h stub_driver.h) dist_man_MANS := $(addprefix doc/, usbip.8 usbipd.8 usbip_bind_driver.8) diff --git a/drivers/staging/usbip/userspace/libsrc/Makefile.am b/drivers/staging/usbip/userspace/libsrc/Makefile.am index 77ecf6b..6696aa7 100644 --- a/drivers/staging/usbip/userspace/libsrc/Makefile.am +++ b/drivers/staging/usbip/userspace/libsrc/Makefile.am @@ -3,5 +3,5 @@ libusbip_la_CFLAGS := @EXTRA_CFLAGS@ libusbip_la_LDFLAGS := -version-info @LIBUSBIP_VERSION@ lib_LTLIBRARIES := libusbip.la -libusbip_la_SOURCES := names.c names.h stub_driver.c stub_driver.h usbip.h \ +libusbip_la_SOURCES := names.c names.h stub_driver.c stub_driver.h \ usbip_common.c usbip_common.h vhci_driver.c vhci_driver.h diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index b62f6b2..0f9593b 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -8,7 +8,8 @@ #include #include -#include "usbip.h" +#include "usbip_common.h" +#include "stub_driver.h" #undef PROGNAME #define PROGNAME "libusbip" diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.h b/drivers/staging/usbip/userspace/libsrc/stub_driver.h index 332ebc5..9eaf92c 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.h @@ -2,11 +2,11 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#ifndef _USBIP_STUB_DRIVER_H -#define _USBIP_STUB_DRIVER_H - -#include "usbip.h" +#ifndef __USBIP_STUB_DRIVER_H +#define __USBIP_STUB_DRIVER_H +#include +#include "usbip_common.h" struct usbip_stub_driver { int ndevs; @@ -33,4 +33,5 @@ int usbip_stub_refresh_device_list(void); int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd); struct usbip_exported_device *usbip_stub_get_device(int num); -#endif + +#endif /* __USBIP_STUB_DRIVER_H */ diff --git a/drivers/staging/usbip/userspace/libsrc/usbip.h b/drivers/staging/usbip/userspace/libsrc/usbip.h deleted file mode 100644 index 7cb8e6f..0000000 --- a/drivers/staging/usbip/userspace/libsrc/usbip.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (C) 2005-2007 Takahiro Hirofuchi - */ - -#ifndef _USBIP_H -#define _USBIP_H - -#ifdef HAVE_CONFIG_H -#include "../config.h" -#endif - -#include "usbip_common.h" -#include "stub_driver.h" -#include "vhci_driver.h" -#ifdef DMALLOC -#include -#endif - -#endif diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.c b/drivers/staging/usbip/userspace/libsrc/usbip_common.c index 6ac4361..e0ec23f 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.c +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.c @@ -2,7 +2,7 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#include "usbip.h" +#include "usbip_common.h" #include "names.h" #undef PROGNAME diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index f10121c..e663fab 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -2,8 +2,8 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ - -#include "usbip.h" +#include "usbip_common.h" +#include "vhci_driver.h" #undef PROGNAME #define PROGNAME "libusbip" diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h index a2f7db1..89949aa 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h @@ -2,13 +2,15 @@ * Copyright (C) 2005-2007 Takahiro Hirofuchi */ -#ifndef _VHCI_DRIVER_H -#define _VHCI_DRIVER_H +#ifndef __VHCI_DRIVER_H +#define __VHCI_DRIVER_H -#include "usbip.h" +#include +#include -#define USBIP_VHCI_BUS_TYPE "platform" +#include "usbip_common.h" +#define USBIP_VHCI_BUS_TYPE "platform" #define MAXNPORT 128 struct usbip_class_device { @@ -61,4 +63,5 @@ int usbip_vhci_attach_device(uint8_t port, int sockfd, uint8_t busnum, uint8_t devnum, uint32_t speed); int usbip_vhci_detach_device(uint8_t port); -#endif + +#endif /* __VHCI_DRIVER_H */ -- cgit v0.10.2 From 25567a3979ed5c6056608f9c0d7574f319283c12 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:38 -0700 Subject: staging: usbip: userspace: libsrc: change all output messages to debug The library should not be displaying random messages intermixed with those from the programs that use them. So, instead, change all of the output from the library to debug only, and allow the programs to decide what to tell the user. This also changes the messages to use the same form, which makes understanding them easier. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c index 0f9593b..604aed1 100644 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c @@ -27,7 +27,7 @@ static struct sysfs_driver *open_sysfs_stub_driver(void) ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); if (ret < 0) { - err("sysfs must be mounted"); + dbg("sysfs_get_mnt_path failed"); return NULL; } @@ -37,8 +37,7 @@ static struct sysfs_driver *open_sysfs_stub_driver(void) stub_driver = sysfs_open_driver_path(stub_driver_path); if (!stub_driver) { - err(USBIP_CORE_MOD_NAME ".ko and " USBIP_HOST_DRV_NAME - ".ko must be loaded"); + dbg("sysfs_open_driver_path failed"); return NULL; } @@ -82,7 +81,7 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) break; if (errno != ENOENT) { - err("error stat'ing %s", attrpath); + dbg("stat failed: %s", attrpath); return -1; } @@ -91,21 +90,21 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) } if (retries == 0) - err("usbip_status not ready after %d retries", - SYSFS_OPEN_RETRIES); + dbg("usbip_status not ready after %d retries", + SYSFS_OPEN_RETRIES); else if (retries < SYSFS_OPEN_RETRIES) - info("warning: usbip_status ready after %d retries", - SYSFS_OPEN_RETRIES - retries); + dbg("warning: usbip_status ready after %d retries", + SYSFS_OPEN_RETRIES - retries); attr = sysfs_open_attribute(attrpath); if (!attr) { - err("open %s", attrpath); + dbg("sysfs_open_attribute failed: %s", attrpath); return -1; } ret = sysfs_read_attribute(attr); if (ret) { - err("read %s", attrpath); + dbg("sysfs_read_attribute failed: %s", attrpath); sysfs_close_attribute(attr); return -1; } @@ -134,13 +133,13 @@ static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) edev = (struct usbip_exported_device *) calloc(1, sizeof(*edev)); if (!edev) { - err("alloc device"); + dbg("calloc failed"); return NULL; } edev->sudev = sysfs_open_device_path(sdevpath); if (!edev->sudev) { - err("open %s", sdevpath); + dbg("sysfs_open_device_path failed: %s", sdevpath); goto err; } @@ -155,7 +154,7 @@ static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) sizeof(struct usbip_usb_interface); edev = (struct usbip_exported_device *) realloc(edev, size); if (!edev) { - err("alloc device"); + dbg("realloc failed"); goto err; } @@ -204,8 +203,8 @@ static int refresh_exported_devices(void) suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver); if (!suinf_list) { - info("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " - "exportable!\n"); + dbg("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " + "exportable!\n"); goto bye; } @@ -215,7 +214,7 @@ static int refresh_exported_devices(void) /* get usb device of this usb interface */ sudev = sysfs_get_device_parent(suinf); if (!sudev) { - err("get parent dev of %s", suinf->name); + dbg("sysfs_get_device_parent failed: %s", suinf->name); continue; } @@ -229,7 +228,7 @@ static int refresh_exported_devices(void) edev = usbip_exported_device_new(sudev->path); if (!edev) { - err("usbip_exported_device new"); + dbg("usbip_exported_device_new failed"); continue; } @@ -257,7 +256,7 @@ int usbip_stub_refresh_device_list(void) stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), usbip_exported_device_delete); if (!stub_driver->edev_list) { - err("alloc dlist"); + dbg("dlist_new_with_delete failed"); return -1; } @@ -275,7 +274,7 @@ int usbip_stub_driver_open(void) stub_driver = (struct usbip_stub_driver *) calloc(1, sizeof(*stub_driver)); if (!stub_driver) { - err("alloc stub_driver"); + dbg("calloc failed"); return -1; } @@ -284,7 +283,7 @@ int usbip_stub_driver_open(void) stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), usbip_exported_device_delete); if (!stub_driver->edev_list) { - err("alloc dlist"); + dbg("dlist_new_with_delete failed"); goto err; } @@ -334,16 +333,16 @@ int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd) if (edev->status != SDEV_ST_AVAILABLE) { - info("device not available, %s", edev->udev.busid); + dbg("device not available: %s", edev->udev.busid); switch( edev->status ) { case SDEV_ST_ERROR: - info(" status SDEV_ST_ERROR"); + dbg("status SDEV_ST_ERROR"); break; case SDEV_ST_USED: - info(" status SDEV_ST_USED"); + dbg("status SDEV_ST_USED"); break; default: - info(" status unknown: 0x%x", edev->status); + dbg("status unknown: 0x%x", edev->status); } return -1; } @@ -357,21 +356,21 @@ int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd) attr = sysfs_open_attribute(attrpath); if (!attr) { - err("open %s", attrpath); + dbg("sysfs_open_attribute failed: %s", attrpath); return -1; } snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd); dbg("write: %s", sockfd_buff); - ret = sysfs_write_attribute(attr, sockfd_buff, strlen(sockfd_buff)); if (ret < 0) { - err("write sockfd %s to %s", sockfd_buff, attrpath); + dbg("sysfs_write_attribute failed: sockfd %s to %s", + sockfd_buff, attrpath); goto err_write_sockfd; } - info("connect %s", edev->udev.busid); + dbg("connect: %s", edev->udev.busid); err_write_sockfd: sysfs_close_attribute(attr); diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.c b/drivers/staging/usbip/userspace/libsrc/usbip_common.c index e0ec23f..154b4b1 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_common.c +++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.c @@ -120,19 +120,19 @@ int read_attr_value(struct sysfs_device *dev, const char *name, const char *form attr = sysfs_open_attribute(attrpath); if (!attr) { - err("open attr %s", attrpath); + dbg("sysfs_open_attribute failed: %s", attrpath); return 0; } ret = sysfs_read_attribute(attr); if (ret < 0) { - err("read attr"); + dbg("sysfs_read_attribute failed"); goto err; } ret = sscanf(attr->value, format, &num); if (ret < 1) { - err("sscanf"); + dbg("sscanf failed"); goto err; } @@ -154,19 +154,19 @@ int read_attr_speed(struct sysfs_device *dev) attr = sysfs_open_attribute(attrpath); if (!attr) { - err("open attr"); + dbg("sysfs_open_attribute failed: %s", attrpath); return 0; } ret = sysfs_read_attribute(attr); if (ret < 0) { - err("read attr"); + dbg("sysfs_read_attribute failed"); goto err; } ret = sscanf(attr->value, "%s\n", speed); if (ret < 1) { - err("sscanf"); + dbg("sscanf failed"); goto err; } err: @@ -222,7 +222,7 @@ int read_usb_interface(struct usbip_usb_device *udev, int i, sif = sysfs_open_device("usb", busid); if (!sif) { - err("open sif of %s", busid); + dbg("sysfs_open_device(\"usb\", \"%s\") failed", busid); return -1; } diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c index e663fab..abbc285 100644 --- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c @@ -16,7 +16,7 @@ static struct usbip_imported_device *imported_device_init(struct usbip_imported_ sudev = sysfs_open_device("usb", busid); if (!sudev) { - err("sysfs_open_device %s", busid); + dbg("sysfs_open_device failed: %s", busid); goto err; } read_usb_device(sudev, &idev->udev); @@ -71,7 +71,7 @@ static int parse_status(char *value) &devid, &socket, lbusid); if (ret < 5) { - err("scanf %d", ret); + dbg("sscanf failed: %d", ret); BUG(); } @@ -94,14 +94,14 @@ static int parse_status(char *value) idev->cdev_list = dlist_new(sizeof(struct usbip_class_device)); if (!idev->cdev_list) { - err("init new device"); + dbg("dlist_new failed"); return -1; } if (idev->status != VDEV_ST_NULL && idev->status != VDEV_ST_NOTASSIGNED) { idev = imported_device_init(idev, lbusid); if (!idev) { - err("init new device"); + dbg("imported_device_init failed"); return -1; } } @@ -134,7 +134,7 @@ static int check_usbip_device(struct sysfs_class_device *cdev) /* found usbip device */ usbip_cdev = calloc(1, sizeof(*usbip_cdev)); if (!cdev) { - err("calloc usbip_cdev"); + dbg("calloc failed"); return -1; } dlist_unshift(vhci_driver->cdev_list, usbip_cdev); @@ -142,7 +142,7 @@ static int check_usbip_device(struct sysfs_class_device *cdev) sizeof(usbip_cdev->class_path)); strncpy(usbip_cdev->dev_path, dev_path, sizeof(usbip_cdev->dev_path)); - dbg(" found %s %s", class_path, dev_path); + dbg("found: %s %s", class_path, dev_path); } } @@ -159,11 +159,11 @@ static int search_class_for_usbip_device(char *cname) class = sysfs_open_class(cname); if (!class) { - err("open class"); + dbg("sysfs_open_class failed"); return -1; } - dbg("class %s", class->name); + dbg("class: %s", class->name); cdev_list = sysfs_get_class_devices(class); if (!cdev_list) @@ -171,7 +171,7 @@ static int search_class_for_usbip_device(char *cname) goto out; dlist_for_each_data(cdev_list, cdev, struct sysfs_class_device) { - dbg(" cdev %s", cdev->name); + dbg("cdev: %s", cdev->name); ret = check_usbip_device(cdev); if (ret < 0) goto out; @@ -194,7 +194,7 @@ static int refresh_class_device_list(void) ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); if (ret < 0) { - err("sysfs must be mounted"); + dbg("sysfs_get_mnt_path failed"); return -1; } @@ -204,7 +204,7 @@ static int refresh_class_device_list(void) /* search under /sys/class */ cname_list = sysfs_open_directory_list(class_path); if (!cname_list) { - err("open class directory"); + dbg("sysfs_open_directory failed"); return -1; } @@ -234,45 +234,42 @@ static int refresh_imported_device_list(void) attr_status = sysfs_get_device_attr(vhci_driver->hc_device, "status"); if (!attr_status) { - err("get attr %s of %s", "status", vhci_driver->hc_device->name); + dbg("sysfs_get_device_attr(\"status\") failed: %s", + vhci_driver->hc_device->name); return -1; } - dbg("name %s, path %s, len %d, method %d\n", attr_status->name, - attr_status->path, attr_status->len, attr_status->method); - - dbg("%s", attr_status->value); + dbg("name: %s path: %s len: %d method: %d value: %s", + attr_status->name, attr_status->path, attr_status->len, + attr_status->method, attr_status->value); return parse_status(attr_status->value); } static int get_nports(void) { + char *c; int nports = 0; struct sysfs_attribute *attr_status; attr_status = sysfs_get_device_attr(vhci_driver->hc_device, "status"); if (!attr_status) { - err("get attr %s of %s", "status", vhci_driver->hc_device->name); + dbg("sysfs_get_device_attr(\"status\") failed: %s", + vhci_driver->hc_device->name); return -1; } - dbg("name %s, path %s, len %d, method %d\n", attr_status->name, - attr_status->path, attr_status->len, attr_status->method); - - dbg("%s", attr_status->value); + dbg("name: %s path: %s len: %d method: %d value: %s", + attr_status->name, attr_status->path, attr_status->len, + attr_status->method, attr_status->value); - { - char *c; - - /* skip a header line */ - c = strchr(attr_status->value, '\n') + 1; + /* skip a header line */ + c = strchr(attr_status->value, '\n') + 1; - while (*c != '\0') { - /* go to the next line */ - c = strchr(c, '\n') + 1; - nports += 1; - } + while (*c != '\0') { + /* go to the next line */ + c = strchr(c, '\n') + 1; + nports += 1; } return nports; @@ -294,15 +291,15 @@ static int get_hc_busid(char *sysfs_mntpath, char *hc_busid) sdriver = sysfs_open_driver_path(sdriver_path); if (!sdriver) { - info("%s is not found", sdriver_path); - info("please load " USBIP_CORE_MOD_NAME ".ko and " - USBIP_VHCI_DRV_NAME ".ko!"); + dbg("sysfs_open_driver_path failed: %s", sdriver_path); + dbg("make sure " USBIP_CORE_MOD_NAME ".ko and " + USBIP_VHCI_DRV_NAME ".ko are loaded!"); return -1; } hc_devs = sysfs_get_driver_devices(sdriver); if (!hc_devs) { - err("get hc list"); + dbg("sysfs_get_driver failed"); goto err; } @@ -318,7 +315,7 @@ err: if (found) return 0; - err("not found usbip hc"); + dbg("%s not found", hc_busid); return -1; } @@ -332,13 +329,13 @@ int usbip_vhci_driver_open(void) vhci_driver = (struct usbip_vhci_driver *) calloc(1, sizeof(*vhci_driver)); if (!vhci_driver) { - err("alloc vhci_driver"); + dbg("calloc failed"); return -1; } ret = sysfs_get_mnt_path(vhci_driver->sysfs_mntpath, SYSFS_PATH_MAX); if (ret < 0) { - err("sysfs must be mounted"); + dbg("sysfs_get_mnt_path failed"); goto err; } @@ -350,13 +347,13 @@ int usbip_vhci_driver_open(void) vhci_driver->hc_device = sysfs_open_device(USBIP_VHCI_BUS_TYPE, hc_busid); if (!vhci_driver->hc_device) { - err("get sysfs vhci_driver"); + dbg("sysfs_open_device failed"); goto err; } vhci_driver->nports = get_nports(); - info("%d ports available\n", vhci_driver->nports); + dbg("available ports: %d", vhci_driver->nports); vhci_driver->cdev_list = dlist_new(sizeof(struct usbip_class_device)); if (!vhci_driver->cdev_list) @@ -437,7 +434,7 @@ err: dlist_destroy(vhci_driver->idev[i].cdev_list); } - err("refresh device list"); + dbg("failed to refresh device list"); return -1; } @@ -460,7 +457,8 @@ int usbip_vhci_attach_device2(uint8_t port, int sockfd, uint32_t devid, attr_attach = sysfs_get_device_attr(vhci_driver->hc_device, "attach"); if (!attr_attach) { - err("get attach"); + dbg("sysfs_get_device_attr(\"attach\") failed: %s", + vhci_driver->hc_device->name); return -1; } @@ -470,11 +468,11 @@ int usbip_vhci_attach_device2(uint8_t port, int sockfd, uint32_t devid, ret = sysfs_write_attribute(attr_attach, buff, strlen(buff)); if (ret < 0) { - err("write to attach failed"); + dbg("sysfs_write_attribute failed"); return -1; } - info("port %d attached", port); + dbg("attached port: %d", port); return 0; } @@ -501,21 +499,21 @@ int usbip_vhci_detach_device(uint8_t port) attr_detach = sysfs_get_device_attr(vhci_driver->hc_device, "detach"); if (!attr_detach) { - err("get detach"); + dbg("sysfs_get_device_attr(\"detach\") failed: %s", + vhci_driver->hc_device->name); return -1; } snprintf(buff, sizeof(buff), "%u", port); - dbg("writing to detach"); dbg("writing: %s", buff); ret = sysfs_write_attribute(attr_detach, buff, strlen(buff)); if (ret < 0) { - err("write to detach failed"); + dbg("sysfs_write_attribute failed"); return -1; } - info("port %d detached", port); + dbg("detached port: %d", port); return 0; } -- cgit v0.10.2 From 4737d7e3321a2f1e8804ceee3f938eff09593c0a Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:39 -0700 Subject: staging: usbip: userspace: usbip: modify command failure When a bad option is given, display a message stating such and output usage. When a bad command is given, output command help. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c index cdfe4c2..583b179 100644 --- a/drivers/staging/usbip/userspace/src/usbip.c +++ b/drivers/staging/usbip/userspace/src/usbip.c @@ -125,13 +125,13 @@ static int usbip_version(int argc, char *argv[]) (void) argc; (void) argv; - printf("%s\n", usbip_version_string); + printf(PROGNAME " (%s)\n", usbip_version_string); return 0; } static int run_command(const struct command *cmd, int argc, char *argv[]) { - dbg("running command: `%s'\n", cmd->name); + dbg("running command: `%s'", cmd->name); return cmd->fn(argc, argv); } @@ -163,8 +163,11 @@ int main(int argc, char *argv[]) usbip_use_syslog = 1; openlog("", LOG_PID, LOG_USER); break; + case '?': + printf("usbip: invalid option\n"); default: - goto err_out; + usbip_usage(); + goto out; } } @@ -180,8 +183,8 @@ int main(int argc, char *argv[]) } } -err_out: - usbip_usage(); + /* invalid command */ + usbip_help(0, NULL); out: return (rc > -1 ? EXIT_SUCCESS : EXIT_FAILURE); } -- cgit v0.10.2 From 42685d577f569a0c06b35cf0739fcb20bfe9acd8 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:40 -0700 Subject: staging: usbip: userspace: utils: remove libsysfs circumvention Removes all of the helper functions that used a lot of hard-coded values intead of libsysfs. Most of these functions were unused anyway. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 2a25cec..9b31c78 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -62,253 +62,3 @@ int modify_match_busid(char *busid, int add) return 0; } - -int read_integer(char *path) -{ - char buff[100]; - int fd; - int ret = 0; - - memset(buff, 0, sizeof(buff)); - - fd = open(path, O_RDONLY); - if (fd < 0) - return -1; - - ret = read(fd, buff, sizeof(buff)); - if (ret < 0) { - close(fd); - return -1; - } - - sscanf(buff, "%d", &ret); - - close(fd); - - return ret; -} - -int read_string(char *path, char *string, size_t len) -{ - int fd; - int ret = 0; - char *p; - - memset(string, 0, len); - - fd = open(path, O_RDONLY); - if (fd < 0) { - string = NULL; - return -1; - } - - ret = read(fd, string, len-1); - if (ret < 0) { - string = NULL; - close(fd); - return -1; - } - - p = strchr(string, '\n'); - *p = '\0'; - - close(fd); - - return 0; -} - -int write_integer(char *path, int value) -{ - int fd; - int ret; - char buff[100]; - - snprintf(buff, sizeof(buff), "%d", value); - - fd = open(path, O_WRONLY); - if (fd < 0) - return -1; - - ret = write(fd, buff, strlen(buff)); - if (ret < 0) { - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -int read_bConfigurationValue(char *busid) -{ - char path[PATH_MAX]; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/bConfigurationValue", busid); - - return read_integer(path); -} - -int write_bConfigurationValue(char *busid, int config) -{ - char path[PATH_MAX]; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/bConfigurationValue", busid); - - return write_integer(path, config); -} - -int read_bNumInterfaces(char *busid) -{ - char path[PATH_MAX]; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/bNumInterfaces", busid); - - return read_integer(path); -} - -int read_bDeviceClass(char *busid) -{ - char path[PATH_MAX]; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/bDeviceClass", busid); - - return read_integer(path); -} - -int getdriver(char *busid, int conf, int infnum, char *driver, size_t len) -{ - char path[PATH_MAX]; - char linkto[PATH_MAX]; - const char none[] = "none"; - int ret; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s:%d.%d/driver", busid, conf, infnum); - - /* readlink does not add NULL */ - memset(linkto, 0, sizeof(linkto)); - ret = readlink(path, linkto, sizeof(linkto)-1); - if (ret < 0) { - strncpy(driver, none, len); - return -1; - } else { - strncpy(driver, basename(linkto), len); - return 0; - } -} - -int getdevicename(char *busid, char *name, size_t len) -{ - char path[PATH_MAX]; - char idProduct[10], idVendor[10]; - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/idVendor", busid); - read_string(path, idVendor, sizeof(idVendor)); - - snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s/idProduct", busid); - read_string(path, idProduct, sizeof(idProduct)); - - if (!idVendor[0] || !idProduct[0]) - return -1; - - snprintf(name, len, "%s:%s", idVendor, idProduct); - - return 0; -} - -#define MAXLINE 100 - -/* if this cannot read a whole line, return -1 */ -int readline(int sockfd, char *buff, int bufflen) -{ - int ret; - char c; - int index = 0; - - - while (index < bufflen) { - ret = read(sockfd, &c, sizeof(c)); - if (ret < 0 && errno == EINTR) - continue; - if (ret <= 0) { - return -1; - } - - buff[index] = c; - - if ( index > 0 && buff[index-1] == '\r' && buff[index] == '\n') { - /* end of line */ - buff[index-1] = '\0'; /* get rid of delimitor */ - return index; - } else - index++; - } - - return -1; -} - -#if 0 -int writeline(int sockfd, char *str, int strlen) -{ - int ret; - int index = 0; - int len; - char buff[MAXLINE]; - - if (strlen + 3 > MAXLINE) - return -1; - - strncpy(buff, str, strlen); - buff[strlen+1] = '\r'; - buff[strlen+2] = '\n'; - buff[strlen+3] = '\0'; - - len = strlen + 3; - - while (len > 0) { - ret = write(sockfd, buff+index, len); - if (ret <= 0) { - return -1; - } - - len -= ret; - index += ret; - } - - return index; -} -#endif - -int writeline(int sockfd, char *str, int strlen) -{ - int ret; - int index = 0; - int len; - char buff[MAXLINE]; - - len = strnlen(str, strlen); - - if (strlen + 2 > MAXLINE) - return -1; - - memcpy(buff, str, strlen); - buff[strlen] = '\r'; - buff[strlen+1] = '\n'; /* strlen+1 <= MAXLINE-1 */ - - len = strlen + 2; - - while (len > 0) { - ret = write(sockfd, buff+index, len); - if (ret < 0 && errno == EINTR) - continue; - if (ret <= 0) { - return -1; - } - - len -= ret; - index += ret; - } - - return index; -} - diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h index b50e95a..fdcb14d 100644 --- a/drivers/staging/usbip/userspace/src/utils.h +++ b/drivers/staging/usbip/userspace/src/utils.h @@ -1,19 +1,24 @@ +/* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + #ifndef __UTILS_H #define __UTILS_H -#include - int modify_match_busid(char *busid, int add); -int read_string(char *path, char *, size_t len); -int read_integer(char *path); -int getdevicename(char *busid, char *name, size_t len); -int getdriver(char *busid, int conf, int infnum, char *driver, size_t len); -int read_bNumInterfaces(char *busid); -int read_bConfigurationValue(char *busid); -int write_integer(char *path, int value); -int write_bConfigurationValue(char *busid, int config); -int read_bDeviceClass(char *busid); -int readline(int sockfd, char *str, int strlen); -int writeline(int sockfd, char *buff, int bufflen); #endif /* __UTILS_H */ -- cgit v0.10.2 From 30f0554659d277e126c1194b8c1edf5dc6e56914 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:41 -0700 Subject: staging: usbip: userspace: utils.c: rewrite modify_match_busid Rewrite the function to use libsysfs. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c index 9b31c78..2d4966e 100644 --- a/drivers/staging/usbip/userspace/src/utils.c +++ b/drivers/staging/usbip/userspace/src/utils.c @@ -1,64 +1,76 @@ /* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi * - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ #include -#include #include #include #include -#include -#include -#include - #include "usbip_common.h" #include "utils.h" int modify_match_busid(char *busid, int add) { - int fd; - int ret; + char bus_type[] = "usb"; + char attr_name[] = "match_busid"; char buff[SYSFS_BUS_ID_SIZE + 4]; char sysfs_mntpath[SYSFS_PATH_MAX]; - char match_busid_path[SYSFS_PATH_MAX]; + char match_busid_attr_path[SYSFS_PATH_MAX]; + struct sysfs_attribute *match_busid_attr; + int rc, ret = 0; - ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); - if (ret < 0) { - err("sysfs must be mounted"); + if (strnlen(busid, SYSFS_BUS_ID_SIZE) > SYSFS_BUS_ID_SIZE - 1) { + dbg("busid is too long"); return -1; } - snprintf(match_busid_path, sizeof(match_busid_path), - "%s/%s/usb/%s/%s/match_busid", sysfs_mntpath, SYSFS_BUS_NAME, - SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME); - - /* BUS_IS_SIZE includes NULL termination? */ - if (strnlen(busid, SYSFS_BUS_ID_SIZE) > SYSFS_BUS_ID_SIZE - 1) { - dbg("busid is too long"); + rc = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (rc < 0) { + err("sysfs must be mounted: %s", strerror(errno)); return -1; } - fd = open(match_busid_path, O_WRONLY); - if (fd < 0) + snprintf(match_busid_attr_path, sizeof(match_busid_attr_path), + "%s/%s/%s/%s/%s/%s", sysfs_mntpath, SYSFS_BUS_NAME, bus_type, + SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME, attr_name); + + match_busid_attr = sysfs_open_attribute(match_busid_attr_path); + if (!match_busid_attr) { + dbg("problem getting match_busid attribute: %s", + strerror(errno)); return -1; + } if (add) snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "add %s", busid); else snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "del %s", busid); - dbg("write \"%s\" to %s", buff, match_busid_path); + dbg("write \"%s\" to %s", buff, match_busid_attr->path); - ret = write(fd, buff, sizeof(buff)); - if (ret < 0) { - close(fd); - return -1; + rc = sysfs_write_attribute(match_busid_attr, buff, sizeof(buff)); + if (rc < 0) { + dbg("failed to write match_busid: %s", strerror(errno)); + ret = -1; } - close(fd); + sysfs_close_attribute(match_busid_attr); - return 0; + return ret; } -- cgit v0.10.2 From 06c465f5d2286749b3a90d29f67c2e5e7e1bd0f9 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:42 -0700 Subject: staging: usbip: userspace: usbip_bind.c: major rewrite of the implementation Rewrite functions in terms of libsysfs, which eliminates a lot of helper functions simplifying the file layout. Now, the two processes taking place here, an unbind of the old driver and a bind of usbip-host, are single functions and have been renamed along with the controlling function. A check to see if the device is already bound to usbip-host is now included. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c b/drivers/staging/usbip/userspace/src/usbip_bind.c index 978b7aa..9ecaf6e 100644 --- a/drivers/staging/usbip/userspace/src/usbip_bind.c +++ b/drivers/staging/usbip/userspace/src/usbip_bind.c @@ -18,18 +18,23 @@ #include -#include +#include #include +#include #include -#include #include -#include #include "usbip_common.h" #include "utils.h" #include "usbip.h" +enum unbind_status { + UNBIND_ST_OK, + UNBIND_ST_USBIP_HOST, + UNBIND_ST_FAILED +}; + static const char usbip_bind_usage_string[] = "usbip bind \n" " -b, --busid= Bind " USBIP_HOST_DRV_NAME ".ko to device " @@ -40,195 +45,202 @@ void usbip_bind_usage(void) printf("usage: %s", usbip_bind_usage_string); } -static const char unbind_path_format[] = "/sys/bus/usb/devices/%s/driver/unbind"; - -/* buggy driver may cause dead lock */ -static int unbind_interface_busid(char *busid) +/* call at unbound state */ +static int bind_usbip(char *busid) { - char unbind_path[SYSFS_PATH_MAX]; - int fd; - int ret; - - snprintf(unbind_path, sizeof(unbind_path), unbind_path_format, busid); - - fd = open(unbind_path, O_WRONLY); - if (fd < 0) { - dbg("opening unbind_path failed: %d", fd); + char bus_type[] = "usb"; + char attr_name[] = "bind"; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char bind_attr_path[SYSFS_PATH_MAX]; + char intf_busid[SYSFS_BUS_ID_SIZE]; + struct sysfs_device *busid_dev; + struct sysfs_attribute *bind_attr; + struct sysfs_attribute *bConfValue; + struct sysfs_attribute *bNumIntfs; + int i, failed = 0; + int rc, ret = -1; + + rc = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (rc < 0) { + err("sysfs must be mounted: %s", strerror(errno)); return -1; } - ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE)); - if (ret < 0) { - dbg("write to unbind_path failed: %d", ret); - close(fd); - return -1; - } - - close(fd); - - return 0; -} - -static int unbind_interface(char *busid, int configvalue, int interface) -{ - char inf_busid[SYSFS_BUS_ID_SIZE]; - dbg("unbinding interface"); - - snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, - interface); + snprintf(bind_attr_path, sizeof(bind_attr_path), "%s/%s/%s/%s/%s/%s", + sysfs_mntpath, SYSFS_BUS_NAME, bus_type, SYSFS_DRIVERS_NAME, + USBIP_HOST_DRV_NAME, attr_name); - return unbind_interface_busid(inf_busid); -} - -static int unbind(char *busid) -{ - int configvalue = 0; - int ninterface = 0; - int devclass = 0; - int i; - int failed = 0; - - configvalue = read_bConfigurationValue(busid); - ninterface = read_bNumInterfaces(busid); - devclass = read_bDeviceClass(busid); - - if (configvalue < 0 || ninterface < 0 || devclass < 0) { - dbg("read config and ninf value, removed?"); + bind_attr = sysfs_open_attribute(bind_attr_path); + if (!bind_attr) { + dbg("problem getting bind attribute: %s", strerror(errno)); return -1; } - if (devclass == 0x09) { - dbg("skip unbinding of hub"); - return -1; + busid_dev = sysfs_open_device(bus_type, busid); + if (!busid_dev) { + dbg("sysfs_open_device %s failed: %s", busid, strerror(errno)); + goto err_close_bind_attr; } - for (i = 0; i < ninterface; i++) { - char driver[PATH_MAX]; - int ret; - - memset(&driver, 0, sizeof(driver)); - - getdriver(busid, configvalue, i, driver, PATH_MAX-1); + bConfValue = sysfs_get_device_attr(busid_dev, "bConfigurationValue"); + bNumIntfs = sysfs_get_device_attr(busid_dev, "bNumInterfaces"); - dbg(" %s:%d.%d -> %s ", busid, configvalue, i, driver); - - if (!strncmp("none", driver, PATH_MAX)) - continue; /* unbound interface */ + if (!bConfValue || !bNumIntfs) { + dbg("problem getting device attributes: %s", + strerror(errno)); + goto err_close_busid_dev; + } -#if 0 - if (!strncmp("usbip", driver, PATH_MAX)) - continue; /* already bound to usbip */ -#endif + for (i = 0; i < atoi(bNumIntfs->value); i++) { + snprintf(intf_busid, SYSFS_BUS_ID_SIZE, "%s:%.1s.%d", busid, + bConfValue->value, i); - /* unbinding */ - ret = unbind_interface(busid, configvalue, i); - if (ret < 0) { - dbg("unbind driver at %s:%d.%d failed", - busid, configvalue, i); + rc = sysfs_write_attribute(bind_attr, intf_busid, + SYSFS_BUS_ID_SIZE); + if (rc < 0) { + dbg("bind driver at %s failed", intf_busid); failed = 1; } } - if (failed) - return -1; - else - return 0; -} - -static const char bind_path_format[] = "/sys/bus/usb/drivers/%s/bind"; + if (!failed) + ret = 0; -static int bind_interface_busid(char *busid, char *driver) -{ - char bind_path[PATH_MAX]; - int fd; - int ret; +err_close_busid_dev: + sysfs_close_device(busid_dev); +err_close_bind_attr: + sysfs_close_attribute(bind_attr); - snprintf(bind_path, sizeof(bind_path), bind_path_format, driver); + return ret; +} - fd = open(bind_path, O_WRONLY); - if (fd < 0) +/* buggy driver may cause dead lock */ +static int unbind_other(char *busid) +{ + char bus_type[] = "usb"; + char intf_busid[SYSFS_BUS_ID_SIZE]; + struct sysfs_device *busid_dev; + struct sysfs_device *intf_dev; + struct sysfs_driver *intf_drv; + struct sysfs_attribute *unbind_attr; + struct sysfs_attribute *bConfValue; + struct sysfs_attribute *bDevClass; + struct sysfs_attribute *bNumIntfs; + int i, rc; + enum unbind_status status = UNBIND_ST_OK; + + busid_dev = sysfs_open_device(bus_type, busid); + if (!busid_dev) { + dbg("sysfs_open_device %s failed: %s", busid, strerror(errno)); return -1; + } - ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE)); - if (ret < 0) { - close(fd); - return -1; + bConfValue = sysfs_get_device_attr(busid_dev, "bConfigurationValue"); + bDevClass = sysfs_get_device_attr(busid_dev, "bDeviceClass"); + bNumIntfs = sysfs_get_device_attr(busid_dev, "bNumInterfaces"); + if (!bConfValue || !bDevClass || !bNumIntfs) { + dbg("problem getting device attributes: %s", + strerror(errno)); + goto err_close_busid_dev; } - close(fd); + if (!strncmp(bDevClass->value, "09", bDevClass->len)) { + dbg("skip unbinding of hub"); + goto err_close_busid_dev; + } - return 0; -} + for (i = 0; i < atoi(bNumIntfs->value); i++) { + snprintf(intf_busid, SYSFS_BUS_ID_SIZE, "%s:%.1s.%d", busid, + bConfValue->value, i); + intf_dev = sysfs_open_device(bus_type, intf_busid); + if (!intf_dev) { + dbg("could not open interface device: %s", + strerror(errno)); + goto err_close_busid_dev; + } -static int bind_interface(char *busid, int configvalue, int interface, char *driver) -{ - char inf_busid[SYSFS_BUS_ID_SIZE]; + dbg("%s -> %s", intf_dev->name, intf_dev->driver_name); - snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, - interface); + if (!strncmp("unknown", intf_dev->driver_name, SYSFS_NAME_LEN)) + /* unbound interface */ + continue; - return bind_interface_busid(inf_busid, driver); -} + if (!strncmp(USBIP_HOST_DRV_NAME, intf_dev->driver_name, + SYSFS_NAME_LEN)) { + /* already bound to usbip-host */ + status = UNBIND_ST_USBIP_HOST; + continue; + } -/* call at unbound state */ -static int bind_to_usbip(char *busid) -{ - int configvalue = 0; - int ninterface = 0; - int i; - int failed = 0; + /* unbinding */ + intf_drv = sysfs_open_driver(bus_type, intf_dev->driver_name); + if (!intf_drv) { + dbg("could not open interface driver on %s: %s", + intf_dev->name, strerror(errno)); + goto err_close_intf_dev; + } - configvalue = read_bConfigurationValue(busid); - ninterface = read_bNumInterfaces(busid); + unbind_attr = sysfs_get_driver_attr(intf_drv, "unbind"); + if (!unbind_attr) { + dbg("problem getting interface driver attribute: %s", + strerror(errno)); + goto err_close_intf_drv; + } - if (configvalue < 0 || ninterface < 0) { - dbg("read config and ninf value, removed?"); - return -1; + rc = sysfs_write_attribute(unbind_attr, intf_dev->bus_id, + SYSFS_BUS_ID_SIZE); + if (rc < 0) { + /* NOTE: why keep unbinding other interfaces? */ + dbg("unbind driver at %s failed", intf_dev->bus_id); + status = UNBIND_ST_FAILED; + } + + sysfs_close_driver(intf_drv); + sysfs_close_device(intf_dev); } - for (i = 0; i < ninterface; i++) { - int ret; + goto out; - ret = bind_interface(busid, configvalue, i, - USBIP_HOST_DRV_NAME); - if (ret < 0) { - dbg("bind usbip at %s:%d.%d, failed", - busid, configvalue, i); - failed = 1; - /* need to contine binding at other interfaces */ - } - } +err_close_intf_drv: + sysfs_close_driver(intf_drv); +err_close_intf_dev: + sysfs_close_device(intf_dev); +err_close_busid_dev: + status = UNBIND_ST_FAILED; +out: + sysfs_close_device(busid_dev); - if (failed) - return -1; - else - return 0; + return status; } -static int use_device_by_usbip(char *busid) +static int bind_device(char *busid) { - int ret; + int rc; - ret = unbind(busid); - if (ret < 0) { - dbg("unbind drivers of %s, failed", busid); + rc = unbind_other(busid); + if (rc == UNBIND_ST_FAILED) { + err("could not unbind driver from device on busid %s", busid); + return -1; + } else if (rc == UNBIND_ST_USBIP_HOST) { + err("device on busid %s is already bound to %s", busid, + USBIP_HOST_DRV_NAME); return -1; } - ret = modify_match_busid(busid, 1); - if (ret < 0) { - dbg("add %s to match_busid, failed", busid); + rc = modify_match_busid(busid, 1); + if (rc < 0) { + err("unable to bind device on %s", busid); return -1; } - ret = bind_to_usbip(busid); - if (ret < 0) { - dbg("bind usbip to %s, failed", busid); + rc = bind_usbip(busid); + if (rc < 0) { + err("could not bind device to %s", USBIP_HOST_DRV_NAME); modify_match_busid(busid, 0); return -1; } - dbg("bind %s complete!", busid); + printf("bind device on busid %s: complete\n", busid); return 0; } @@ -237,8 +249,9 @@ int usbip_bind(int argc, char *argv[]) { static const struct option opts[] = { { "busid", required_argument, NULL, 'b' }, - { NULL, 0, NULL, 0 } + { NULL, 0, NULL, 0 } }; + int opt; int ret = -1; @@ -250,7 +263,7 @@ int usbip_bind(int argc, char *argv[]) switch (opt) { case 'b': - ret = use_device_by_usbip(optarg); + ret = bind_device(optarg); goto out; default: goto err_out; -- cgit v0.10.2 From 9cda5704115d1611b408d8bd0e6e9dfd8a3617cb Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:43 -0700 Subject: staging: usbip: userspace: usbip_unbind.c: implement using libsysfs Modify unbind to use libsysfs, and include a check to verify that the device is actually using usbip-host before proceeding. The output messages have been changed to be consistent with `usbip bind'. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_unbind.c b/drivers/staging/usbip/userspace/src/usbip_unbind.c index 9978d38..d5a9ab6 100644 --- a/drivers/staging/usbip/userspace/src/usbip_unbind.c +++ b/drivers/staging/usbip/userspace/src/usbip_unbind.c @@ -16,10 +16,13 @@ * along with this program. If not, see . */ +#include + +#include #include +#include #include -#include #include "usbip_common.h" #include "utils.h" @@ -35,41 +38,129 @@ void usbip_unbind_usage(void) printf("usage: %s", usbip_unbind_usage_string); } -static int use_device_by_other(char *busid) +static int unbind_device(char *busid) { - int rc; - int config; + char bus_type[] = "usb"; + struct sysfs_driver *usbip_host_drv; + struct sysfs_device *dev; + struct dlist *devlist; + int verified = 0; + int rc, ret = -1; + + char attr_name[] = "bConfigurationValue"; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char busid_attr_path[SYSFS_PATH_MAX]; + struct sysfs_attribute *busid_attr; + char *val = NULL; + int len; + + /* verify the busid device is using usbip-host */ + usbip_host_drv = sysfs_open_driver(bus_type, USBIP_HOST_DRV_NAME); + if (!usbip_host_drv) { + err("could not open %s driver: %s", USBIP_HOST_DRV_NAME, + strerror(errno)); + return -1; + } + + devlist = sysfs_get_driver_devices(usbip_host_drv); + if (!devlist) { + err("%s is not in use by any devices", USBIP_HOST_DRV_NAME); + goto err_close_usbip_host_drv; + } + + dlist_for_each_data(devlist, dev, struct sysfs_device) { + if (!strncmp(busid, dev->name, strlen(busid)) && + !strncmp(dev->driver_name, USBIP_HOST_DRV_NAME, + strlen(USBIP_HOST_DRV_NAME))) { + verified = 1; + break; + } + } + + if (!verified) { + err("device on busid %s is not using %s", busid, + USBIP_HOST_DRV_NAME); + goto err_close_usbip_host_drv; + } + + /* + * NOTE: A read and write of an attribute value of the device busid + * refers to must be done to start probing. That way a rebind of the + * default driver for the device occurs. + * + * This seems very hackish and adds a lot of pointless code. I think it + * should be done in the kernel by the driver after del_match_busid is + * finished! + */ + + rc = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (rc < 0) { + err("sysfs must be mounted: %s", strerror(errno)); + return -1; + } - /* read and write the same config value to kick probing */ - config = read_bConfigurationValue(busid); - if (config < 0) { - dbg("read bConfigurationValue of %s, failed", busid); + snprintf(busid_attr_path, sizeof(busid_attr_path), "%s/%s/%s/%s/%s/%s", + sysfs_mntpath, SYSFS_BUS_NAME, bus_type, SYSFS_DEVICES_NAME, + busid, attr_name); + + /* read a device attribute */ + busid_attr = sysfs_open_attribute(busid_attr_path); + if (!busid_attr) { + err("could not open %s/%s: %s", busid, attr_name, + strerror(errno)); return -1; } + if (sysfs_read_attribute(busid_attr) < 0) { + err("problem reading attribute: %s", strerror(errno)); + goto err_out; + } + + len = busid_attr->len; + val = malloc(len); + *val = *busid_attr->value; + sysfs_close_attribute(busid_attr); + + /* notify driver of unbind */ rc = modify_match_busid(busid, 0); if (rc < 0) { - dbg("del %s to match_busid, failed", busid); + err("unable to unbind device on %s", busid); + goto err_out; + } + + /* write the device attribute */ + busid_attr = sysfs_open_attribute(busid_attr_path); + if (!busid_attr) { + err("could not open %s/%s: %s", busid, attr_name, + strerror(errno)); return -1; } - rc = write_bConfigurationValue(busid, config); + rc = sysfs_write_attribute(busid_attr, val, len); if (rc < 0) { - dbg("read bConfigurationValue of %s, failed", busid); - return -1; + err("problem writing attribute: %s", strerror(errno)); + goto err_out; } + sysfs_close_attribute(busid_attr); + + ret = 0; + printf("unbind device on busid %s: complete\n", busid); - info("bind %s to other drivers than usbip, complete!", busid); +err_out: + free(val); +err_close_usbip_host_drv: + sysfs_close_driver(usbip_host_drv); - return 0; + return ret; } int usbip_unbind(int argc, char *argv[]) { static const struct option opts[] = { { "busid", required_argument, NULL, 'b' }, - { NULL, 0, NULL, 0 } + { NULL, 0, NULL, 0 } }; + int opt; int ret = -1; @@ -81,7 +172,7 @@ int usbip_unbind(int argc, char *argv[]) switch (opt) { case 'b': - ret = use_device_by_other(optarg); + ret = unbind_device(optarg); goto out; default: goto err_out; -- cgit v0.10.2 From 622dde8105488e4dfee94cc352c3b7d78f7cc495 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:44 -0700 Subject: staging: usbip: userspace: usbip list: edit output messages Edit dbg and normal output messages for consistency and better feedback. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 03f6210..afff469 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -49,7 +49,7 @@ static int get_exported_devices(int sockfd) { char product_name[100]; char class_name[100]; - struct op_devlist_reply rep; + struct op_devlist_reply reply; uint16_t code = OP_REP_DEVLIST; struct usbip_usb_device udev; struct usbip_usb_interface uintf; @@ -58,30 +58,30 @@ static int get_exported_devices(int sockfd) rc = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); if (rc < 0) { - dbg("usbip_send_op_common"); + dbg("usbip_send_op_common failed"); return -1; } rc = usbip_recv_op_common(sockfd, &code); if (rc < 0) { - dbg("usbip_recv_op_common"); + dbg("usbip_recv_op_common failed"); return -1; } - memset(&rep, 0, sizeof(rep)); - rc = usbip_recv(sockfd, &rep, sizeof(rep)); + memset(&reply, 0, sizeof(reply)); + rc = usbip_recv(sockfd, &reply, sizeof(reply)); if (rc < 0) { - dbg("usbip_recv_op_devlist"); + dbg("usbip_recv_op_devlist failed"); return -1; } - PACK_OP_DEVLIST_REPLY(0, &rep); - dbg("exportable devices: %d", rep.ndev); + PACK_OP_DEVLIST_REPLY(0, &reply); + dbg("exportable devices: %d\n", reply.ndev); - for (i = 0; i < rep.ndev; i++) { + for (i = 0; i < reply.ndev; i++) { memset(&udev, 0, sizeof(udev)); rc = usbip_recv(sockfd, &udev, sizeof(udev)); if (rc < 0) { - dbg("usbip_recv: usbip_usb_device[%d]", i); + dbg("usbip_recv failed: usbip_usb_device[%d]", i); return -1; } pack_usb_device(0, &udev); @@ -98,7 +98,7 @@ static int get_exported_devices(int sockfd) for (j = 0; j < udev.bNumInterfaces; j++) { rc = usbip_recv(sockfd, &uintf, sizeof(uintf)); if (rc < 0) { - dbg("usbip_recv: usbip_usb_interface[%d]", j); + dbg("usbip_recv failed: usbip_usb_intf[%d]", j); return -1; } pack_usb_interface(0, &uintf); @@ -108,7 +108,6 @@ static int get_exported_devices(int sockfd) uintf.bInterfaceSubClass, uintf.bInterfaceProtocol); printf("%8s: %2d - %s\n", "", j, class_name); - } printf("\n"); } @@ -123,16 +122,19 @@ static int list_exported_devices(char *host) sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING); if (sockfd < 0) { - err("unable to connect to %s port %s: %s\n", host, + err("could not connect to %s:%s: %s", host, USBIP_PORT_STRING, gai_strerror(sockfd)); return -1; } - dbg("connected to %s port %s\n", host, USBIP_PORT_STRING); - printf("- %s\n", host); + dbg("connected to %s:%s", host, USBIP_PORT_STRING); + + printf("Exportable USB devices\n"); + printf("======================\n"); + printf(" - %s\n", host); rc = get_exported_devices(sockfd); if (rc < 0) { - dbg("get_exported_devices failed"); + err("failed to get device list from %s", host); return -1; } @@ -193,13 +195,14 @@ static int list_devices(bool parsable) ubus = sysfs_open_bus(bus_type); if (!ubus) { - err("sysfs_open_bus: %s", strerror(errno)); + err("could not open %s bus: %s", bus_type, strerror(errno)); return -1; } devlist = sysfs_get_bus_devices(ubus); if (!devlist) { - err("sysfs_get_bus_devices: %s", strerror(errno)); + err("could not get %s bus devices: %s", bus_type, + strerror(errno)); goto err_out; } @@ -215,8 +218,11 @@ static int list_devices(bool parsable) idProduct = sysfs_get_device_attr(dev, "idProduct"); bConfValue = sysfs_get_device_attr(dev, "bConfigurationValue"); bNumIntfs = sysfs_get_device_attr(dev, "bNumInterfaces"); - if (!idVendor || !idProduct || !bConfValue || !bNumIntfs) + if (!idVendor || !idProduct || !bConfValue || !bNumIntfs) { + err("problem getting device attributes: %s", + strerror(errno)); goto err_out; + } print_device(dev->bus_id, idVendor->value, idProduct->value, parsable); @@ -225,8 +231,11 @@ static int list_devices(bool parsable) snprintf(busid, sizeof(busid), "%s:%.1s.%d", dev->bus_id, bConfValue->value, i); intf = sysfs_open_device(bus_type, busid); - if (!intf) + if (!intf) { + err("could not open device interface: %s", + strerror(errno)); goto err_out; + } print_interface(busid, intf->driver_name, parsable); sysfs_close_device(intf); } @@ -244,11 +253,12 @@ err_out: int usbip_list(int argc, char *argv[]) { static const struct option opts[] = { - { "parsable", no_argument, NULL, 'p' }, - { "remote", required_argument, NULL, 'r' }, - { "local", no_argument, NULL, 'l' }, - { NULL, 0, NULL, 0 } + { "parsable", no_argument, NULL, 'p' }, + { "remote", required_argument, NULL, 'r' }, + { "local", no_argument, NULL, 'l' }, + { NULL, 0, NULL, 0 } }; + bool parsable = false; int opt; int ret = -1; -- cgit v0.10.2 From b9d65b1dd30abdb585e6750e4edfc8ce3b3ab28a Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:45 -0700 Subject: staging: usbip: userspace: usbip list: move output header Delay the printing of the output header until the list is received from the remote host. This allows notification that the host does not have any exportable devices. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index afff469..973bf8c 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -45,7 +45,7 @@ void usbip_list_usage(void) printf("usage: %s", usbip_list_usage_string); } -static int get_exported_devices(int sockfd) +static int get_exported_devices(char *host, int sockfd) { char product_name[100]; char class_name[100]; @@ -77,6 +77,15 @@ static int get_exported_devices(int sockfd) PACK_OP_DEVLIST_REPLY(0, &reply); dbg("exportable devices: %d\n", reply.ndev); + if (reply.ndev == 0) { + info("no exportable devices found on %s", host); + return 0; + } + + printf("Exportable USB devices\n"); + printf("======================\n"); + printf(" - %s\n", host); + for (i = 0; i < reply.ndev; i++) { memset(&udev, 0, sizeof(udev)); rc = usbip_recv(sockfd, &udev, sizeof(udev)); @@ -128,11 +137,7 @@ static int list_exported_devices(char *host) } dbg("connected to %s:%s", host, USBIP_PORT_STRING); - printf("Exportable USB devices\n"); - printf("======================\n"); - printf(" - %s\n", host); - - rc = get_exported_devices(sockfd); + rc = get_exported_devices(host, sockfd); if (rc < 0) { err("failed to get device list from %s", host); return -1; -- cgit v0.10.2 From a16941aef197e46146f222639be7b08d15739e97 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:46 -0700 Subject: staging: usbip: userspace: rename stub driver files Rename stub_driver.? to usbip_host_driver.? Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/Makefile.am b/drivers/staging/usbip/userspace/Makefile.am index d557fe9..fbdeef3 100644 --- a/drivers/staging/usbip/userspace/Makefile.am +++ b/drivers/staging/usbip/userspace/Makefile.am @@ -1,6 +1,6 @@ SUBDIRS := libsrc src includedir := @includedir@/usbip include_HEADERS := $(addprefix libsrc/, \ - usbip_common.h vhci_driver.h stub_driver.h) + usbip_common.h vhci_driver.h usbip_host_driver.h) dist_man_MANS := $(addprefix doc/, usbip.8 usbipd.8 usbip_bind_driver.8) diff --git a/drivers/staging/usbip/userspace/libsrc/Makefile.am b/drivers/staging/usbip/userspace/libsrc/Makefile.am index 6696aa7..9b663a4 100644 --- a/drivers/staging/usbip/userspace/libsrc/Makefile.am +++ b/drivers/staging/usbip/userspace/libsrc/Makefile.am @@ -3,5 +3,5 @@ libusbip_la_CFLAGS := @EXTRA_CFLAGS@ libusbip_la_LDFLAGS := -version-info @LIBUSBIP_VERSION@ lib_LTLIBRARIES := libusbip.la -libusbip_la_SOURCES := names.c names.h stub_driver.c stub_driver.h \ +libusbip_la_SOURCES := names.c names.h usbip_host_driver.c usbip_host_driver.h \ usbip_common.c usbip_common.h vhci_driver.c vhci_driver.h diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c deleted file mode 100644 index 604aed1..0000000 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * Copyright (C) 2005-2007 Takahiro Hirofuchi - */ - -#include -#include - -#include -#include - -#include "usbip_common.h" -#include "stub_driver.h" - -#undef PROGNAME -#define PROGNAME "libusbip" - -struct usbip_stub_driver *stub_driver; - -static struct sysfs_driver *open_sysfs_stub_driver(void) -{ - int ret; - - char sysfs_mntpath[SYSFS_PATH_MAX]; - char stub_driver_path[SYSFS_PATH_MAX]; - struct sysfs_driver *stub_driver; - - - ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); - if (ret < 0) { - dbg("sysfs_get_mnt_path failed"); - return NULL; - } - - snprintf(stub_driver_path, SYSFS_PATH_MAX, "%s/%s/usb/%s/%s", - sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, - USBIP_HOST_DRV_NAME); - - stub_driver = sysfs_open_driver_path(stub_driver_path); - if (!stub_driver) { - dbg("sysfs_open_driver_path failed"); - return NULL; - } - - return stub_driver; -} - - -#define SYSFS_OPEN_RETRIES 100 - -/* only the first interface value is true! */ -static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) -{ - char attrpath[SYSFS_PATH_MAX]; - struct sysfs_attribute *attr; - int value = 0; - int ret; - struct stat s; - int retries = SYSFS_OPEN_RETRIES; - - /* This access is racy! - * - * Just after detach, our driver removes the sysfs - * files and recreates them. - * - * We may try and fail to open the usbip_status of - * an exported device in the (short) window where - * it has been removed and not yet recreated. - * - * This is a bug in the interface. Nothing we can do - * except work around it here by polling for the sysfs - * usbip_status to reappear. - */ - - snprintf(attrpath, SYSFS_PATH_MAX, "%s/%s:%d.%d/usbip_status", - udev->path, udev->busid, - udev->bConfigurationValue, - 0); - - while (retries > 0) { - if (stat(attrpath, &s) == 0) - break; - - if (errno != ENOENT) { - dbg("stat failed: %s", attrpath); - return -1; - } - - usleep(10000); /* 10ms */ - retries--; - } - - if (retries == 0) - dbg("usbip_status not ready after %d retries", - SYSFS_OPEN_RETRIES); - else if (retries < SYSFS_OPEN_RETRIES) - dbg("warning: usbip_status ready after %d retries", - SYSFS_OPEN_RETRIES - retries); - - attr = sysfs_open_attribute(attrpath); - if (!attr) { - dbg("sysfs_open_attribute failed: %s", attrpath); - return -1; - } - - ret = sysfs_read_attribute(attr); - if (ret) { - dbg("sysfs_read_attribute failed: %s", attrpath); - sysfs_close_attribute(attr); - return -1; - } - - value = atoi(attr->value); - - sysfs_close_attribute(attr); - - return value; -} - - -static void usbip_exported_device_delete(void *dev) -{ - struct usbip_exported_device *edev = - (struct usbip_exported_device *) dev; - - sysfs_close_device(edev->sudev); - free(dev); -} - - -static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) -{ - struct usbip_exported_device *edev = NULL; - - edev = (struct usbip_exported_device *) calloc(1, sizeof(*edev)); - if (!edev) { - dbg("calloc failed"); - return NULL; - } - - edev->sudev = sysfs_open_device_path(sdevpath); - if (!edev->sudev) { - dbg("sysfs_open_device_path failed: %s", sdevpath); - goto err; - } - - read_usb_device(edev->sudev, &edev->udev); - - edev->status = read_attr_usbip_status(&edev->udev); - if (edev->status < 0) - goto err; - - /* reallocate buffer to include usb interface data */ - size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * - sizeof(struct usbip_usb_interface); - edev = (struct usbip_exported_device *) realloc(edev, size); - if (!edev) { - dbg("realloc failed"); - goto err; - } - - for (int i=0; i < edev->udev.bNumInterfaces; i++) - read_usb_interface(&edev->udev, i, &edev->uinf[i]); - - return edev; - -err: - if (edev && edev->sudev) - sysfs_close_device(edev->sudev); - if (edev) - free(edev); - return NULL; -} - - -static int check_new(struct dlist *dlist, struct sysfs_device *target) -{ - struct sysfs_device *dev; - - dlist_for_each_data(dlist, dev, struct sysfs_device) { - if (!strncmp(dev->bus_id, target->bus_id, SYSFS_BUS_ID_SIZE)) - /* found. not new */ - return 0; - } - - return 1; -} - -static void delete_nothing(void *dev __attribute__((unused))) -{ - /* do not delete anything. but, its container will be deleted. */ -} - -static int refresh_exported_devices(void) -{ - struct sysfs_device *suinf; /* sysfs_device of usb_interface */ - struct dlist *suinf_list; - - struct sysfs_device *sudev; /* sysfs_device of usb_device */ - struct dlist *sudev_list; - - - sudev_list = dlist_new_with_delete(sizeof(struct sysfs_device), delete_nothing); - - suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver); - if (!suinf_list) { - dbg("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " - "exportable!\n"); - goto bye; - } - - /* collect unique USB devices (not interfaces) */ - dlist_for_each_data(suinf_list, suinf, struct sysfs_device) { - - /* get usb device of this usb interface */ - sudev = sysfs_get_device_parent(suinf); - if (!sudev) { - dbg("sysfs_get_device_parent failed: %s", suinf->name); - continue; - } - - if (check_new(sudev_list, sudev)) { - dlist_unshift(sudev_list, sudev); - } - } - - dlist_for_each_data(sudev_list, sudev, struct sysfs_device) { - struct usbip_exported_device *edev; - - edev = usbip_exported_device_new(sudev->path); - if (!edev) { - dbg("usbip_exported_device_new failed"); - continue; - } - - dlist_unshift(stub_driver->edev_list, (void *) edev); - stub_driver->ndevs++; - } - - - dlist_destroy(sudev_list); - -bye: - - return 0; -} - -int usbip_stub_refresh_device_list(void) -{ - int ret; - - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); - - stub_driver->ndevs = 0; - - stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), - usbip_exported_device_delete); - if (!stub_driver->edev_list) { - dbg("dlist_new_with_delete failed"); - return -1; - } - - ret = refresh_exported_devices(); - if (ret < 0) - return ret; - - return 0; -} - -int usbip_stub_driver_open(void) -{ - int ret; - - - stub_driver = (struct usbip_stub_driver *) calloc(1, sizeof(*stub_driver)); - if (!stub_driver) { - dbg("calloc failed"); - return -1; - } - - stub_driver->ndevs = 0; - - stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), - usbip_exported_device_delete); - if (!stub_driver->edev_list) { - dbg("dlist_new_with_delete failed"); - goto err; - } - - stub_driver->sysfs_driver = open_sysfs_stub_driver(); - if (!stub_driver->sysfs_driver) - goto err; - - ret = refresh_exported_devices(); - if (ret < 0) - goto err; - - return 0; - - -err: - if (stub_driver->sysfs_driver) - sysfs_close_driver(stub_driver->sysfs_driver); - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); - free(stub_driver); - - stub_driver = NULL; - return -1; -} - - -void usbip_stub_driver_close(void) -{ - if (!stub_driver) - return; - - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); - if (stub_driver->sysfs_driver) - sysfs_close_driver(stub_driver->sysfs_driver); - free(stub_driver); - - stub_driver = NULL; -} - -int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd) -{ - char attrpath[SYSFS_PATH_MAX]; - struct sysfs_attribute *attr; - char sockfd_buff[30]; - int ret; - - - if (edev->status != SDEV_ST_AVAILABLE) { - dbg("device not available: %s", edev->udev.busid); - switch( edev->status ) { - case SDEV_ST_ERROR: - dbg("status SDEV_ST_ERROR"); - break; - case SDEV_ST_USED: - dbg("status SDEV_ST_USED"); - break; - default: - dbg("status unknown: 0x%x", edev->status); - } - return -1; - } - - /* only the first interface is true */ - snprintf(attrpath, sizeof(attrpath), "%s/%s:%d.%d/%s", - edev->udev.path, - edev->udev.busid, - edev->udev.bConfigurationValue, 0, - "usbip_sockfd"); - - attr = sysfs_open_attribute(attrpath); - if (!attr) { - dbg("sysfs_open_attribute failed: %s", attrpath); - return -1; - } - - snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd); - - dbg("write: %s", sockfd_buff); - ret = sysfs_write_attribute(attr, sockfd_buff, strlen(sockfd_buff)); - if (ret < 0) { - dbg("sysfs_write_attribute failed: sockfd %s to %s", - sockfd_buff, attrpath); - goto err_write_sockfd; - } - - dbg("connect: %s", edev->udev.busid); - -err_write_sockfd: - sysfs_close_attribute(attr); - - return ret; -} - -struct usbip_exported_device *usbip_stub_get_device(int num) -{ - struct usbip_exported_device *edev; - struct dlist *dlist = stub_driver->edev_list; - int count = 0; - - dlist_for_each_data(dlist, edev, struct usbip_exported_device) { - if (num == count) - return edev; - else - count++ ; - } - - return NULL; -} diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.h b/drivers/staging/usbip/userspace/libsrc/stub_driver.h deleted file mode 100644 index 9eaf92c..0000000 --- a/drivers/staging/usbip/userspace/libsrc/stub_driver.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2005-2007 Takahiro Hirofuchi - */ - -#ifndef __USBIP_STUB_DRIVER_H -#define __USBIP_STUB_DRIVER_H - -#include -#include "usbip_common.h" - -struct usbip_stub_driver { - int ndevs; - struct sysfs_driver *sysfs_driver; - - struct dlist *edev_list; /* list of exported device */ -}; - -struct usbip_exported_device { - struct sysfs_device *sudev; - - int32_t status; - struct usbip_usb_device udev; - struct usbip_usb_interface uinf[]; -}; - - -extern struct usbip_stub_driver *stub_driver; - -int usbip_stub_driver_open(void); -void usbip_stub_driver_close(void); - -int usbip_stub_refresh_device_list(void); -int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd); - -struct usbip_exported_device *usbip_stub_get_device(int num); - -#endif /* __USBIP_STUB_DRIVER_H */ diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c new file mode 100644 index 0000000..604aed1 --- /dev/null +++ b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c @@ -0,0 +1,395 @@ +/* + * Copyright (C) 2005-2007 Takahiro Hirofuchi + */ + +#include +#include + +#include +#include + +#include "usbip_common.h" +#include "stub_driver.h" + +#undef PROGNAME +#define PROGNAME "libusbip" + +struct usbip_stub_driver *stub_driver; + +static struct sysfs_driver *open_sysfs_stub_driver(void) +{ + int ret; + + char sysfs_mntpath[SYSFS_PATH_MAX]; + char stub_driver_path[SYSFS_PATH_MAX]; + struct sysfs_driver *stub_driver; + + + ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (ret < 0) { + dbg("sysfs_get_mnt_path failed"); + return NULL; + } + + snprintf(stub_driver_path, SYSFS_PATH_MAX, "%s/%s/usb/%s/%s", + sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, + USBIP_HOST_DRV_NAME); + + stub_driver = sysfs_open_driver_path(stub_driver_path); + if (!stub_driver) { + dbg("sysfs_open_driver_path failed"); + return NULL; + } + + return stub_driver; +} + + +#define SYSFS_OPEN_RETRIES 100 + +/* only the first interface value is true! */ +static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) +{ + char attrpath[SYSFS_PATH_MAX]; + struct sysfs_attribute *attr; + int value = 0; + int ret; + struct stat s; + int retries = SYSFS_OPEN_RETRIES; + + /* This access is racy! + * + * Just after detach, our driver removes the sysfs + * files and recreates them. + * + * We may try and fail to open the usbip_status of + * an exported device in the (short) window where + * it has been removed and not yet recreated. + * + * This is a bug in the interface. Nothing we can do + * except work around it here by polling for the sysfs + * usbip_status to reappear. + */ + + snprintf(attrpath, SYSFS_PATH_MAX, "%s/%s:%d.%d/usbip_status", + udev->path, udev->busid, + udev->bConfigurationValue, + 0); + + while (retries > 0) { + if (stat(attrpath, &s) == 0) + break; + + if (errno != ENOENT) { + dbg("stat failed: %s", attrpath); + return -1; + } + + usleep(10000); /* 10ms */ + retries--; + } + + if (retries == 0) + dbg("usbip_status not ready after %d retries", + SYSFS_OPEN_RETRIES); + else if (retries < SYSFS_OPEN_RETRIES) + dbg("warning: usbip_status ready after %d retries", + SYSFS_OPEN_RETRIES - retries); + + attr = sysfs_open_attribute(attrpath); + if (!attr) { + dbg("sysfs_open_attribute failed: %s", attrpath); + return -1; + } + + ret = sysfs_read_attribute(attr); + if (ret) { + dbg("sysfs_read_attribute failed: %s", attrpath); + sysfs_close_attribute(attr); + return -1; + } + + value = atoi(attr->value); + + sysfs_close_attribute(attr); + + return value; +} + + +static void usbip_exported_device_delete(void *dev) +{ + struct usbip_exported_device *edev = + (struct usbip_exported_device *) dev; + + sysfs_close_device(edev->sudev); + free(dev); +} + + +static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) +{ + struct usbip_exported_device *edev = NULL; + + edev = (struct usbip_exported_device *) calloc(1, sizeof(*edev)); + if (!edev) { + dbg("calloc failed"); + return NULL; + } + + edev->sudev = sysfs_open_device_path(sdevpath); + if (!edev->sudev) { + dbg("sysfs_open_device_path failed: %s", sdevpath); + goto err; + } + + read_usb_device(edev->sudev, &edev->udev); + + edev->status = read_attr_usbip_status(&edev->udev); + if (edev->status < 0) + goto err; + + /* reallocate buffer to include usb interface data */ + size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * + sizeof(struct usbip_usb_interface); + edev = (struct usbip_exported_device *) realloc(edev, size); + if (!edev) { + dbg("realloc failed"); + goto err; + } + + for (int i=0; i < edev->udev.bNumInterfaces; i++) + read_usb_interface(&edev->udev, i, &edev->uinf[i]); + + return edev; + +err: + if (edev && edev->sudev) + sysfs_close_device(edev->sudev); + if (edev) + free(edev); + return NULL; +} + + +static int check_new(struct dlist *dlist, struct sysfs_device *target) +{ + struct sysfs_device *dev; + + dlist_for_each_data(dlist, dev, struct sysfs_device) { + if (!strncmp(dev->bus_id, target->bus_id, SYSFS_BUS_ID_SIZE)) + /* found. not new */ + return 0; + } + + return 1; +} + +static void delete_nothing(void *dev __attribute__((unused))) +{ + /* do not delete anything. but, its container will be deleted. */ +} + +static int refresh_exported_devices(void) +{ + struct sysfs_device *suinf; /* sysfs_device of usb_interface */ + struct dlist *suinf_list; + + struct sysfs_device *sudev; /* sysfs_device of usb_device */ + struct dlist *sudev_list; + + + sudev_list = dlist_new_with_delete(sizeof(struct sysfs_device), delete_nothing); + + suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver); + if (!suinf_list) { + dbg("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " + "exportable!\n"); + goto bye; + } + + /* collect unique USB devices (not interfaces) */ + dlist_for_each_data(suinf_list, suinf, struct sysfs_device) { + + /* get usb device of this usb interface */ + sudev = sysfs_get_device_parent(suinf); + if (!sudev) { + dbg("sysfs_get_device_parent failed: %s", suinf->name); + continue; + } + + if (check_new(sudev_list, sudev)) { + dlist_unshift(sudev_list, sudev); + } + } + + dlist_for_each_data(sudev_list, sudev, struct sysfs_device) { + struct usbip_exported_device *edev; + + edev = usbip_exported_device_new(sudev->path); + if (!edev) { + dbg("usbip_exported_device_new failed"); + continue; + } + + dlist_unshift(stub_driver->edev_list, (void *) edev); + stub_driver->ndevs++; + } + + + dlist_destroy(sudev_list); + +bye: + + return 0; +} + +int usbip_stub_refresh_device_list(void) +{ + int ret; + + if (stub_driver->edev_list) + dlist_destroy(stub_driver->edev_list); + + stub_driver->ndevs = 0; + + stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), + usbip_exported_device_delete); + if (!stub_driver->edev_list) { + dbg("dlist_new_with_delete failed"); + return -1; + } + + ret = refresh_exported_devices(); + if (ret < 0) + return ret; + + return 0; +} + +int usbip_stub_driver_open(void) +{ + int ret; + + + stub_driver = (struct usbip_stub_driver *) calloc(1, sizeof(*stub_driver)); + if (!stub_driver) { + dbg("calloc failed"); + return -1; + } + + stub_driver->ndevs = 0; + + stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), + usbip_exported_device_delete); + if (!stub_driver->edev_list) { + dbg("dlist_new_with_delete failed"); + goto err; + } + + stub_driver->sysfs_driver = open_sysfs_stub_driver(); + if (!stub_driver->sysfs_driver) + goto err; + + ret = refresh_exported_devices(); + if (ret < 0) + goto err; + + return 0; + + +err: + if (stub_driver->sysfs_driver) + sysfs_close_driver(stub_driver->sysfs_driver); + if (stub_driver->edev_list) + dlist_destroy(stub_driver->edev_list); + free(stub_driver); + + stub_driver = NULL; + return -1; +} + + +void usbip_stub_driver_close(void) +{ + if (!stub_driver) + return; + + if (stub_driver->edev_list) + dlist_destroy(stub_driver->edev_list); + if (stub_driver->sysfs_driver) + sysfs_close_driver(stub_driver->sysfs_driver); + free(stub_driver); + + stub_driver = NULL; +} + +int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd) +{ + char attrpath[SYSFS_PATH_MAX]; + struct sysfs_attribute *attr; + char sockfd_buff[30]; + int ret; + + + if (edev->status != SDEV_ST_AVAILABLE) { + dbg("device not available: %s", edev->udev.busid); + switch( edev->status ) { + case SDEV_ST_ERROR: + dbg("status SDEV_ST_ERROR"); + break; + case SDEV_ST_USED: + dbg("status SDEV_ST_USED"); + break; + default: + dbg("status unknown: 0x%x", edev->status); + } + return -1; + } + + /* only the first interface is true */ + snprintf(attrpath, sizeof(attrpath), "%s/%s:%d.%d/%s", + edev->udev.path, + edev->udev.busid, + edev->udev.bConfigurationValue, 0, + "usbip_sockfd"); + + attr = sysfs_open_attribute(attrpath); + if (!attr) { + dbg("sysfs_open_attribute failed: %s", attrpath); + return -1; + } + + snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd); + + dbg("write: %s", sockfd_buff); + ret = sysfs_write_attribute(attr, sockfd_buff, strlen(sockfd_buff)); + if (ret < 0) { + dbg("sysfs_write_attribute failed: sockfd %s to %s", + sockfd_buff, attrpath); + goto err_write_sockfd; + } + + dbg("connect: %s", edev->udev.busid); + +err_write_sockfd: + sysfs_close_attribute(attr); + + return ret; +} + +struct usbip_exported_device *usbip_stub_get_device(int num) +{ + struct usbip_exported_device *edev; + struct dlist *dlist = stub_driver->edev_list; + int count = 0; + + dlist_for_each_data(dlist, edev, struct usbip_exported_device) { + if (num == count) + return edev; + else + count++ ; + } + + return NULL; +} diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h new file mode 100644 index 0000000..9eaf92c --- /dev/null +++ b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2005-2007 Takahiro Hirofuchi + */ + +#ifndef __USBIP_STUB_DRIVER_H +#define __USBIP_STUB_DRIVER_H + +#include +#include "usbip_common.h" + +struct usbip_stub_driver { + int ndevs; + struct sysfs_driver *sysfs_driver; + + struct dlist *edev_list; /* list of exported device */ +}; + +struct usbip_exported_device { + struct sysfs_device *sudev; + + int32_t status; + struct usbip_usb_device udev; + struct usbip_usb_interface uinf[]; +}; + + +extern struct usbip_stub_driver *stub_driver; + +int usbip_stub_driver_open(void); +void usbip_stub_driver_close(void); + +int usbip_stub_refresh_device_list(void); +int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd); + +struct usbip_exported_device *usbip_stub_get_device(int num); + +#endif /* __USBIP_STUB_DRIVER_H */ -- cgit v0.10.2 From 756d6726f855b07413540031a210286c42d937bd Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:47 -0700 Subject: staging: usbip: userspace: usbip_host: update function and variable names Officially change stub_driver to usbip_host_driver. And, reorganize usbip_host_driver.c while also cleaning up coding style. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c index 604aed1..71a449c 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c +++ b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c @@ -1,5 +1,19 @@ /* - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ #include @@ -9,41 +23,12 @@ #include #include "usbip_common.h" -#include "stub_driver.h" +#include "usbip_host_driver.h" #undef PROGNAME #define PROGNAME "libusbip" -struct usbip_stub_driver *stub_driver; - -static struct sysfs_driver *open_sysfs_stub_driver(void) -{ - int ret; - - char sysfs_mntpath[SYSFS_PATH_MAX]; - char stub_driver_path[SYSFS_PATH_MAX]; - struct sysfs_driver *stub_driver; - - - ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); - if (ret < 0) { - dbg("sysfs_get_mnt_path failed"); - return NULL; - } - - snprintf(stub_driver_path, SYSFS_PATH_MAX, "%s/%s/usb/%s/%s", - sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME, - USBIP_HOST_DRV_NAME); - - stub_driver = sysfs_open_driver_path(stub_driver_path); - if (!stub_driver) { - dbg("sysfs_open_driver_path failed"); - return NULL; - } - - return stub_driver; -} - +struct usbip_host_driver *host_driver; #define SYSFS_OPEN_RETRIES 100 @@ -53,7 +38,7 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) char attrpath[SYSFS_PATH_MAX]; struct sysfs_attribute *attr; int value = 0; - int ret; + int rc; struct stat s; int retries = SYSFS_OPEN_RETRIES; @@ -72,9 +57,7 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) */ snprintf(attrpath, SYSFS_PATH_MAX, "%s/%s:%d.%d/usbip_status", - udev->path, udev->busid, - udev->bConfigurationValue, - 0); + udev->path, udev->busid, udev->bConfigurationValue, 0); while (retries > 0) { if (stat(attrpath, &s) == 0) @@ -102,8 +85,8 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) return -1; } - ret = sysfs_read_attribute(attr); - if (ret) { + rc = sysfs_read_attribute(attr); + if (rc) { dbg("sysfs_read_attribute failed: %s", attrpath); sysfs_close_attribute(attr); return -1; @@ -116,22 +99,13 @@ static int32_t read_attr_usbip_status(struct usbip_usb_device *udev) return value; } - -static void usbip_exported_device_delete(void *dev) -{ - struct usbip_exported_device *edev = - (struct usbip_exported_device *) dev; - - sysfs_close_device(edev->sudev); - free(dev); -} - - static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) { struct usbip_exported_device *edev = NULL; + size_t size; + int i; - edev = (struct usbip_exported_device *) calloc(1, sizeof(*edev)); + edev = calloc(1, sizeof(*edev)); if (!edev) { dbg("calloc failed"); return NULL; @@ -150,223 +124,255 @@ static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath) goto err; /* reallocate buffer to include usb interface data */ - size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * + size = sizeof(*edev) + edev->udev.bNumInterfaces * sizeof(struct usbip_usb_interface); - edev = (struct usbip_exported_device *) realloc(edev, size); + + edev = realloc(edev, size); if (!edev) { dbg("realloc failed"); goto err; } - for (int i=0; i < edev->udev.bNumInterfaces; i++) + for (i = 0; i < edev->udev.bNumInterfaces; i++) read_usb_interface(&edev->udev, i, &edev->uinf[i]); return edev; - err: if (edev && edev->sudev) sysfs_close_device(edev->sudev); if (edev) free(edev); + return NULL; } - static int check_new(struct dlist *dlist, struct sysfs_device *target) { struct sysfs_device *dev; dlist_for_each_data(dlist, dev, struct sysfs_device) { if (!strncmp(dev->bus_id, target->bus_id, SYSFS_BUS_ID_SIZE)) - /* found. not new */ + /* device found and is not new */ return 0; } - return 1; } -static void delete_nothing(void *dev __attribute__((unused))) +static void delete_nothing(void *unused_data) { - /* do not delete anything. but, its container will be deleted. */ + /* + * NOTE: Do not delete anything, but the container will be deleted. + */ + (void) unused_data; } static int refresh_exported_devices(void) { - struct sysfs_device *suinf; /* sysfs_device of usb_interface */ - struct dlist *suinf_list; - - struct sysfs_device *sudev; /* sysfs_device of usb_device */ + /* sysfs_device of usb_interface */ + struct sysfs_device *suintf; + struct dlist *suintf_list; + /* sysfs_device of usb_device */ + struct sysfs_device *sudev; struct dlist *sudev_list; + struct usbip_exported_device *edev; + sudev_list = dlist_new_with_delete(sizeof(struct sysfs_device), + delete_nothing); - sudev_list = dlist_new_with_delete(sizeof(struct sysfs_device), delete_nothing); - - suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver); - if (!suinf_list) { + suintf_list = sysfs_get_driver_devices(host_driver->sysfs_driver); + if (!suintf_list) { + /* + * Not an error condition. There are simply no devices bound to + * the driver yet. + */ dbg("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be " - "exportable!\n"); - goto bye; + "exportable!"); + return 0; } /* collect unique USB devices (not interfaces) */ - dlist_for_each_data(suinf_list, suinf, struct sysfs_device) { - + dlist_for_each_data(suintf_list, suintf, struct sysfs_device) { /* get usb device of this usb interface */ - sudev = sysfs_get_device_parent(suinf); + sudev = sysfs_get_device_parent(suintf); if (!sudev) { - dbg("sysfs_get_device_parent failed: %s", suinf->name); + dbg("sysfs_get_device_parent failed: %s", suintf->name); continue; } if (check_new(sudev_list, sudev)) { + /* insert item at head of list */ dlist_unshift(sudev_list, sudev); } } dlist_for_each_data(sudev_list, sudev, struct sysfs_device) { - struct usbip_exported_device *edev; - edev = usbip_exported_device_new(sudev->path); if (!edev) { dbg("usbip_exported_device_new failed"); continue; } - dlist_unshift(stub_driver->edev_list, (void *) edev); - stub_driver->ndevs++; + dlist_unshift(host_driver->edev_list, edev); + host_driver->ndevs++; } - dlist_destroy(sudev_list); -bye: - return 0; } -int usbip_stub_refresh_device_list(void) +static struct sysfs_driver *open_sysfs_host_driver(void) { - int ret; + char bus_type[] = "usb"; + char sysfs_mntpath[SYSFS_PATH_MAX]; + char host_drv_path[SYSFS_PATH_MAX]; + struct sysfs_driver *host_drv; + int rc; - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); + rc = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX); + if (rc < 0) { + dbg("sysfs_get_mnt_path failed"); + return NULL; + } - stub_driver->ndevs = 0; + snprintf(host_drv_path, SYSFS_PATH_MAX, "%s/%s/%s/%s/%s", + sysfs_mntpath, SYSFS_BUS_NAME, bus_type, SYSFS_DRIVERS_NAME, + USBIP_HOST_DRV_NAME); - stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), - usbip_exported_device_delete); - if (!stub_driver->edev_list) { - dbg("dlist_new_with_delete failed"); - return -1; + host_drv = sysfs_open_driver_path(host_drv_path); + if (!host_drv) { + dbg("sysfs_open_driver_path failed"); + return NULL; } - ret = refresh_exported_devices(); - if (ret < 0) - return ret; - - return 0; + return host_drv; } -int usbip_stub_driver_open(void) +static void usbip_exported_device_delete(void *dev) { - int ret; + struct usbip_exported_device *edev = dev; + sysfs_close_device(edev->sudev); + free(dev); +} +int usbip_host_driver_open(void) +{ + int rc; - stub_driver = (struct usbip_stub_driver *) calloc(1, sizeof(*stub_driver)); - if (!stub_driver) { + host_driver = calloc(1, sizeof(*host_driver)); + if (!host_driver) { dbg("calloc failed"); return -1; } - stub_driver->ndevs = 0; - - stub_driver->edev_list = dlist_new_with_delete(sizeof(struct usbip_exported_device), - usbip_exported_device_delete); - if (!stub_driver->edev_list) { + host_driver->ndevs = 0; + host_driver->edev_list = + dlist_new_with_delete(sizeof(struct usbip_exported_device), + usbip_exported_device_delete); + if (!host_driver->edev_list) { dbg("dlist_new_with_delete failed"); - goto err; + goto err_free_host_driver; } - stub_driver->sysfs_driver = open_sysfs_stub_driver(); - if (!stub_driver->sysfs_driver) - goto err; + host_driver->sysfs_driver = open_sysfs_host_driver(); + if (!host_driver->sysfs_driver) + goto err_destroy_edev_list; - ret = refresh_exported_devices(); - if (ret < 0) - goto err; + rc = refresh_exported_devices(); + if (rc < 0) + goto err_close_sysfs_driver; return 0; +err_close_sysfs_driver: + sysfs_close_driver(host_driver->sysfs_driver); +err_destroy_edev_list: + dlist_destroy(host_driver->edev_list); +err_free_host_driver: + free(host_driver); + host_driver = NULL; -err: - if (stub_driver->sysfs_driver) - sysfs_close_driver(stub_driver->sysfs_driver); - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); - free(stub_driver); - - stub_driver = NULL; return -1; } - -void usbip_stub_driver_close(void) +void usbip_host_driver_close(void) { - if (!stub_driver) + if (!host_driver) return; - if (stub_driver->edev_list) - dlist_destroy(stub_driver->edev_list); - if (stub_driver->sysfs_driver) - sysfs_close_driver(stub_driver->sysfs_driver); - free(stub_driver); + if (host_driver->edev_list) + dlist_destroy(host_driver->edev_list); + if (host_driver->sysfs_driver) + sysfs_close_driver(host_driver->sysfs_driver); - stub_driver = NULL; + free(host_driver); + host_driver = NULL; } -int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd) +int usbip_host_refresh_device_list(void) { - char attrpath[SYSFS_PATH_MAX]; + int rc; + + if (host_driver->edev_list) + dlist_destroy(host_driver->edev_list); + + host_driver->ndevs = 0; + host_driver->edev_list = + dlist_new_with_delete(sizeof(struct usbip_exported_device), + usbip_exported_device_delete); + if (!host_driver->edev_list) { + dbg("dlist_new_with_delete failed"); + return -1; + } + + rc = refresh_exported_devices(); + if (rc < 0) + return -1; + + return 0; +} + +int usbip_host_export_device(struct usbip_exported_device *edev, int sockfd) +{ + char attr_name[] = "usbip_sockfd"; + char attr_path[SYSFS_PATH_MAX]; struct sysfs_attribute *attr; char sockfd_buff[30]; int ret; - if (edev->status != SDEV_ST_AVAILABLE) { dbg("device not available: %s", edev->udev.busid); - switch( edev->status ) { - case SDEV_ST_ERROR: - dbg("status SDEV_ST_ERROR"); - break; - case SDEV_ST_USED: - dbg("status SDEV_ST_USED"); - break; - default: - dbg("status unknown: 0x%x", edev->status); + switch (edev->status) { + case SDEV_ST_ERROR: + dbg("status SDEV_ST_ERROR"); + break; + case SDEV_ST_USED: + dbg("status SDEV_ST_USED"); + break; + default: + dbg("status unknown: 0x%x", edev->status); } return -1; } /* only the first interface is true */ - snprintf(attrpath, sizeof(attrpath), "%s/%s:%d.%d/%s", - edev->udev.path, - edev->udev.busid, - edev->udev.bConfigurationValue, 0, - "usbip_sockfd"); + snprintf(attr_path, sizeof(attr_path), "%s/%s:%d.%d/%s", + edev->udev.path, edev->udev.busid, + edev->udev.bConfigurationValue, 0, attr_name); - attr = sysfs_open_attribute(attrpath); + attr = sysfs_open_attribute(attr_path); if (!attr) { - dbg("sysfs_open_attribute failed: %s", attrpath); + dbg("sysfs_open_attribute failed: %s", attr_path); return -1; } snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd); - dbg("write: %s", sockfd_buff); + ret = sysfs_write_attribute(attr, sockfd_buff, strlen(sockfd_buff)); if (ret < 0) { - dbg("sysfs_write_attribute failed: sockfd %s to %s", - sockfd_buff, attrpath); + dbg("sysfs_write_attribute failed: sockfd %s to %s", + sockfd_buff, attr_path); goto err_write_sockfd; } @@ -378,17 +384,17 @@ err_write_sockfd: return ret; } -struct usbip_exported_device *usbip_stub_get_device(int num) +struct usbip_exported_device *usbip_host_get_device(int num) { struct usbip_exported_device *edev; - struct dlist *dlist = stub_driver->edev_list; - int count = 0; + struct dlist *dlist = host_driver->edev_list; + int cnt = 0; dlist_for_each_data(dlist, edev, struct usbip_exported_device) { - if (num == count) + if (num == cnt) return edev; else - count++ ; + cnt++; } return NULL; diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h index 9eaf92c..34fd14c 100644 --- a/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h +++ b/drivers/staging/usbip/userspace/libsrc/usbip_host_driver.h @@ -1,37 +1,48 @@ /* - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ -#ifndef __USBIP_STUB_DRIVER_H -#define __USBIP_STUB_DRIVER_H +#ifndef __USBIP_HOST_DRIVER_H +#define __USBIP_HOST_DRIVER_H #include #include "usbip_common.h" -struct usbip_stub_driver { +struct usbip_host_driver { int ndevs; struct sysfs_driver *sysfs_driver; - - struct dlist *edev_list; /* list of exported device */ + /* list of exported device */ + struct dlist *edev_list; }; struct usbip_exported_device { struct sysfs_device *sudev; - int32_t status; - struct usbip_usb_device udev; + struct usbip_usb_device udev; struct usbip_usb_interface uinf[]; }; +extern struct usbip_host_driver *host_driver; -extern struct usbip_stub_driver *stub_driver; - -int usbip_stub_driver_open(void); -void usbip_stub_driver_close(void); - -int usbip_stub_refresh_device_list(void); -int usbip_stub_export_device(struct usbip_exported_device *edev, int sockfd); +int usbip_host_driver_open(void); +void usbip_host_driver_close(void); -struct usbip_exported_device *usbip_stub_get_device(int num); +int usbip_host_refresh_device_list(void); +int usbip_host_export_device(struct usbip_exported_device *edev, int sockfd); +struct usbip_exported_device *usbip_host_get_device(int num); -#endif /* __USBIP_STUB_DRIVER_H */ +#endif /* __USBIP_HOST_DRIVER_H */ -- cgit v0.10.2 From fb5ca8131c4c94745a42d618701392bc74fd22a7 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:49 -0700 Subject: staging: usbip: userspace: usbip_network.c: coding style cleanup Change messges to debug, and fix a few coding style issues. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c index 26e95bd..a3833ff 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.c +++ b/drivers/staging/usbip/userspace/src/usbip_network.c @@ -1,6 +1,19 @@ /* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi * - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ #include @@ -56,17 +69,15 @@ void pack_usb_interface(int pack __attribute__((unused)), /* uint8_t members need nothing */ } - static ssize_t usbip_xmit(int sockfd, void *buff, size_t bufflen, int sending) { + ssize_t nbytes; ssize_t total = 0; if (!bufflen) return 0; do { - ssize_t nbytes; - if (sending) nbytes = send(sockfd, buff, bufflen, 0); else @@ -75,13 +86,12 @@ static ssize_t usbip_xmit(int sockfd, void *buff, size_t bufflen, int sending) if (nbytes <= 0) return -1; - buff = (void *) ((intptr_t) buff + nbytes); + buff = (void *)((intptr_t) buff + nbytes); bufflen -= nbytes; total += nbytes; } while (bufflen > 0); - return total; } @@ -97,8 +107,8 @@ ssize_t usbip_send(int sockfd, void *buff, size_t bufflen) int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) { - int ret; struct op_common op_common; + int rc; memset(&op_common, 0, sizeof(op_common)); @@ -108,9 +118,9 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) PACK_OP_COMMON(1, &op_common); - ret = usbip_send(sockfd, (void *) &op_common, sizeof(op_common)); - if (ret < 0) { - err("usbip_send has failed"); + rc = usbip_send(sockfd, &op_common, sizeof(op_common)); + if (rc < 0) { + dbg("usbip_send failed: %d", rc); return -1; } @@ -119,36 +129,38 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) int usbip_recv_op_common(int sockfd, uint16_t *code) { - int ret; struct op_common op_common; + int rc; memset(&op_common, 0, sizeof(op_common)); - ret = usbip_recv(sockfd, (void *) &op_common, sizeof(op_common)); - if (ret < 0) { - err("usbip_recv has failed ret=%d", ret); + rc = usbip_recv(sockfd, &op_common, sizeof(op_common)); + if (rc < 0) { + dbg("usbip_recv failed: %d", rc); goto err; } PACK_OP_COMMON(0, &op_common); if (op_common.version != USBIP_VERSION) { - err("version mismatch, %d %d", op_common.version, USBIP_VERSION); + dbg("version mismatch: %d %d", op_common.version, + USBIP_VERSION); goto err; } - switch(*code) { - case OP_UNSPEC: - break; - default: - if (op_common.code != *code) { - info("unexpected pdu %d for %d", op_common.code, *code); - goto err; - } + switch (*code) { + case OP_UNSPEC: + break; + default: + if (op_common.code != *code) { + dbg("unexpected pdu %#0x for %#0x", op_common.code, + *code); + goto err; + } } if (op_common.status != ST_OK) { - info("request failed at peer, %d", op_common.status); + dbg("request failed at peer: %d", op_common.status); goto err; } @@ -159,7 +171,6 @@ err: return -1; } - int usbip_set_reuseaddr(int sockfd) { const int val = 1; @@ -167,7 +178,7 @@ int usbip_set_reuseaddr(int sockfd) ret = setsockopt(sockfd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val)); if (ret < 0) - err("setsockopt SO_REUSEADDR"); + dbg("setsockopt: SO_REUSEADDR"); return ret; } @@ -179,7 +190,7 @@ int usbip_set_nodelay(int sockfd) ret = setsockopt(sockfd, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val)); if (ret < 0) - err("setsockopt TCP_NODELAY"); + dbg("setsockopt: TCP_NODELAY"); return ret; } @@ -191,7 +202,7 @@ int usbip_set_keepalive(int sockfd) ret = setsockopt(sockfd, SOL_SOCKET, SO_KEEPALIVE, &val, sizeof(val)); if (ret < 0) - err("setsockopt SO_KEEPALIVE"); + dbg("setsockopt: SO_KEEPALIVE"); return ret; } @@ -199,7 +210,7 @@ int usbip_set_keepalive(int sockfd) /* * IPv6 Ready */ -int usbip_net_tcp_connect(char *hostname, char *port) +int usbip_net_tcp_connect(char *hostname, char *service) { struct addrinfo hints, *res, *rp; int sockfd; @@ -210,9 +221,9 @@ int usbip_net_tcp_connect(char *hostname, char *port) hints.ai_socktype = SOCK_STREAM; /* get all possible addresses */ - ret = getaddrinfo(hostname, port, &hints, &res); + ret = getaddrinfo(hostname, service, &hints, &res); if (ret < 0) { - dbg("getaddrinfo: %s port %s: %s", hostname, port, + dbg("getaddrinfo: %s service %s: %s", hostname, service, gai_strerror(ret)); return ret; } -- cgit v0.10.2 From c88f9906c36de61a59a99e109ff04d5b0a4a29d1 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Sun, 19 Jun 2011 22:44:52 -0700 Subject: staging: usbip: userspace: configure.ac: change package data Change package name to usbip-utils, email address to linux-usb, and bump minor version number. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac index 39e4a47..89fefd5 100644 --- a/drivers/staging/usbip/userspace/configure.ac +++ b/drivers/staging/usbip/userspace/configure.ac @@ -1,7 +1,7 @@ dnl Process this file with autoconf to produce a configure script. AC_PREREQ(2.59) -AC_INIT([usbip], [1.0.0], [usbip-devel@lists.sourceforge.net]) +AC_INIT([usbip-utils], [1.1.0], [linux-usb@vger.kernel.org]) AC_DEFINE([USBIP_VERSION], [0x00000100], [binary-coded decimal version number]) CURRENT=0 -- cgit v0.10.2 From 8547d4cc2b616e4f1dafebe2c673fc986422b506 Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Fri, 24 Jun 2011 15:48:47 +0200 Subject: Staging: usbip: vhci-hcd: Do not kill already dead RX/TX kthread When unbinding a device on the host which was still attached on the client, I got a NULL pointer dereference on the client. This turned out to be due to kthread_stop() being called on an already dead kthread. Here is how I was able to reproduce the problem: server:# usbip bind -b 1-2 client:# usbip attach -h server -b 1-2 server:# usbip unbind -b 1-2 This patch fixes the problem by checking the kthread before attempting to kill it, as it is done on the opposite side in stub_shutdown_connection(). Signed-off-by: Tobias Klauser Cc: stable Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c index 878b5bf..2ee97e2 100644 --- a/drivers/staging/usbip/vhci_hcd.c +++ b/drivers/staging/usbip/vhci_hcd.c @@ -860,9 +860,9 @@ static void vhci_shutdown_connection(struct usbip_device *ud) } /* kill threads related to this sdev, if v.c. exists */ - if (vdev->ud.tcp_rx) + if (vdev->ud.tcp_rx && !task_is_dead(vdev->ud.tcp_rx)) kthread_stop(vdev->ud.tcp_rx); - if (vdev->ud.tcp_tx) + if (vdev->ud.tcp_tx && !task_is_dead(vdev->ud.tcp_tx)) kthread_stop(vdev->ud.tcp_tx); pr_info("stop threads\n"); -- cgit v0.10.2 From 1aee199cadc0807184c34f2063c795821517f588 Mon Sep 17 00:00:00 2001 From: Arjan Mels Date: Thu, 30 Jun 2011 22:18:18 +0200 Subject: drivers/staging/usbip: bugfix prevent driver unbind regression in linux-next Fix regression problem in linux-next: post_reset and pre_reset are no longer included in linux-next while they are in linux-3.0rc5. Signed-off-by: Arjan Mels Cc: usbip-devel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c index e26b2ee..fce22f2 100644 --- a/drivers/staging/usbip/stub_dev.c +++ b/drivers/staging/usbip/stub_dev.c @@ -524,9 +524,28 @@ static void stub_disconnect(struct usb_interface *interface) } } +/* + * Presence of pre_reset and post_reset prevents the driver from being unbound + * when the device is being reset + */ + +int stub_pre_reset(struct usb_interface *interface) +{ + dev_dbg(&interface->dev, "pre_reset\n"); + return 0; +} + +int stub_post_reset(struct usb_interface *interface) +{ + dev_dbg(&interface->dev, "post_reset\n"); + return 0; +} + struct usb_driver stub_driver = { .name = "usbip-host", .probe = stub_probe, .disconnect = stub_disconnect, .id_table = stub_table, -}; + .pre_reset = stub_pre_reset, + .post_reset = stub_post_reset, + }; -- cgit v0.10.2 From 6977a271d45951b8e7ed5eb8caf659fbd69ee365 Mon Sep 17 00:00:00 2001 From: Kalle Valo Date: Thu, 30 Jun 2011 11:43:54 +0300 Subject: staging: ath6kl: implement testmode rx command Add new testmode command for retrieving rx reports from firmware. Signed-off-by: Kalle Valo Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/ath6kl/os/linux/cfg80211.c b/drivers/staging/ath6kl/os/linux/cfg80211.c index 441ae04..5fdda4a 100644 --- a/drivers/staging/ath6kl/os/linux/cfg80211.c +++ b/drivers/staging/ath6kl/os/linux/cfg80211.c @@ -1472,6 +1472,7 @@ enum ar6k_testmode_attr { enum ar6k_testmode_cmd { AR6K_TM_CMD_TCMD = 0, + AR6K_TM_CMD_RX_REPORT = 1, }; #define AR6K_TM_DATA_MAX_LEN 5000 @@ -1482,11 +1483,88 @@ static const struct nla_policy ar6k_testmode_policy[AR6K_TM_ATTR_MAX + 1] = { .len = AR6K_TM_DATA_MAX_LEN }, }; +void ar6000_testmode_rx_report_event(struct ar6_softc *ar, void *buf, + int buf_len) +{ + if (down_interruptible(&ar->arSem)) + return; + + kfree(ar->tcmd_rx_report); + + ar->tcmd_rx_report = kmemdup(buf, buf_len, GFP_KERNEL); + ar->tcmd_rx_report_len = buf_len; + + up(&ar->arSem); + + wake_up(&arEvent); +} + +static int ar6000_testmode_rx_report(struct ar6_softc *ar, void *buf, + int buf_len, struct sk_buff *skb) +{ + int ret = 0; + long left; + + if (down_interruptible(&ar->arSem)) + return -ERESTARTSYS; + + if (ar->arWmiReady == false) { + ret = -EIO; + goto out; + } + + if (ar->bIsDestroyProgress) { + ret = -EBUSY; + goto out; + } + + WARN_ON(ar->tcmd_rx_report != NULL); + WARN_ON(ar->tcmd_rx_report_len > 0); + + if (wmi_test_cmd(ar->arWmi, buf, buf_len) < 0) { + up(&ar->arSem); + return -EIO; + } + + left = wait_event_interruptible_timeout(arEvent, + ar->tcmd_rx_report != NULL, + wmitimeout * HZ); + + if (left == 0) { + ret = -ETIMEDOUT; + goto out; + } else if (left < 0) { + ret = left; + goto out; + } + + if (ar->tcmd_rx_report == NULL || ar->tcmd_rx_report_len == 0) { + ret = -EINVAL; + goto out; + } + + NLA_PUT(skb, AR6K_TM_ATTR_DATA, ar->tcmd_rx_report_len, + ar->tcmd_rx_report); + + kfree(ar->tcmd_rx_report); + ar->tcmd_rx_report = NULL; + +out: + up(&ar->arSem); + + return ret; + +nla_put_failure: + ret = -ENOBUFS; + goto out; +} + static int ar6k_testmode_cmd(struct wiphy *wiphy, void *data, int len) { struct ar6_softc *ar = wiphy_priv(wiphy); struct nlattr *tb[AR6K_TM_ATTR_MAX + 1]; - int err, buf_len; + int err, buf_len, reply_len; + struct sk_buff *skb; void *buf; err = nla_parse(tb, AR6K_TM_ATTR_MAX, data, len, @@ -1510,6 +1588,25 @@ static int ar6k_testmode_cmd(struct wiphy *wiphy, void *data, int len) return 0; break; + case AR6K_TM_CMD_RX_REPORT: + if (!tb[AR6K_TM_ATTR_DATA]) + return -EINVAL; + + buf = nla_data(tb[AR6K_TM_ATTR_DATA]); + buf_len = nla_len(tb[AR6K_TM_ATTR_DATA]); + + reply_len = nla_total_size(AR6K_TM_DATA_MAX_LEN); + skb = cfg80211_testmode_alloc_reply_skb(wiphy, reply_len); + if (!skb) + return -ENOMEM; + + err = ar6000_testmode_rx_report(ar, buf, buf_len, skb); + if (err < 0) { + kfree_skb(skb); + return err; + } + + return cfg80211_testmode_reply(skb); default: return -EOPNOTSUPP; } diff --git a/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h b/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h index 2911ea0..05cc774 100644 --- a/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h +++ b/drivers/staging/ath6kl/os/linux/include/ar6000_drv.h @@ -546,15 +546,9 @@ struct ar6_softc { s8 arMaxRetries; u8 arPhyCapability; #ifdef CONFIG_HOST_TCMD_SUPPORT - u8 tcmdRxReport; - u32 tcmdRxTotalPkt; - s32 tcmdRxRssi; - u32 tcmdPm; u32 arTargetMode; - u32 tcmdRxcrcErrPkt; - u32 tcmdRxsecErrPkt; - u16 tcmdRateCnt[TCMD_MAX_RATES]; - u16 tcmdRateCntShortGuard[TCMD_MAX_RATES]; + void *tcmd_rx_report; + int tcmd_rx_report_len; #endif AR6000_WLAN_STATE arWlanState; struct ar_node_mapping arNodeMap[MAX_NODE_NUM]; diff --git a/drivers/staging/ath6kl/os/linux/include/cfg80211.h b/drivers/staging/ath6kl/os/linux/include/cfg80211.h index 1a6ae97..d525320 100644 --- a/drivers/staging/ath6kl/os/linux/include/cfg80211.h +++ b/drivers/staging/ath6kl/os/linux/include/cfg80211.h @@ -41,6 +41,17 @@ void ar6k_cfg80211_disconnect_event(struct ar6_softc *ar, u8 reason, void ar6k_cfg80211_tkip_micerr_event(struct ar6_softc *ar, u8 keyid, bool ismcast); +#ifdef CONFIG_NL80211_TESTMODE +void ar6000_testmode_rx_report_event(struct ar6_softc *ar, void *buf, + int buf_len); +#else +static inline void ar6000_testmode_rx_report_event(struct ar6_softc *ar, + void *buf, int buf_len) +{ +} +#endif + + #endif /* _AR6K_CFG80211_H_ */ diff --git a/drivers/staging/ath6kl/wmi/wmi.c b/drivers/staging/ath6kl/wmi/wmi.c index 4a17f99..c7b5e5c 100644 --- a/drivers/staging/ath6kl/wmi/wmi.c +++ b/drivers/staging/ath6kl/wmi/wmi.c @@ -41,6 +41,7 @@ #include "a_debug.h" #include "dbglog_api.h" #include "roaming.h" +#include "cfg80211.h" #define ATH_DEBUG_WMI ATH_DEBUG_MAKE_MODULE_MASK(0) @@ -4465,10 +4466,9 @@ wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, int tspecCompliance) static int wmi_tcmd_test_report_rx(struct wmi_t *wmip, u8 *datap, int len) { + ar6000_testmode_rx_report_event(wmip->wmi_devt, datap, len); - A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG)); - - return 0; + return 0; } #endif /* CONFIG_HOST_TCMD_SUPPORT*/ -- cgit v0.10.2 From 857f727674f45157ec9a5d788c8954d9f082acb7 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 30 Jun 2011 08:31:59 +0200 Subject: staging: ste_rmi4: remove cross-dependent platform data The ux500 machine was actually defining platform data for the staging driver ste_rmi4, which is not OK. Let us instead define some __weak platform data in the machine so that the staging driver can override it at compile-time and we can thus have the driver self-contained in staging. Reported-by: Axel Lin Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c index d8a8734..8ce46c0 100644 --- a/arch/arm/mach-ux500/board-mop500-u8500uib.c +++ b/arch/arm/mach-ux500/board-mop500-u8500uib.c @@ -12,34 +12,14 @@ #include #include #include -#include <../drivers/staging/ste_rmi4/synaptics_i2c_rmi4.h> #include #include #include "board-mop500.h" -/* - * Synaptics RMI4 touchscreen interface on the U8500 UIB - */ - -/* - * Descriptor structure. - * Describes the number of i2c devices on the bus that speak RMI. - */ -static struct synaptics_rmi4_platform_data rmi4_i2c_dev_platformdata = { - .irq_number = NOMADIK_GPIO_TO_IRQ(84), - .irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED), - .x_flip = false, - .y_flip = true, - .regulator_en = false, -}; - -static struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = { - { - I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B), - .platform_data = &rmi4_i2c_dev_platformdata, - }, +/* Dummy data that can be overridden by staging driver */ +struct i2c_board_info __initdata __weak mop500_i2c3_devices_u8500[] = { }; /* diff --git a/drivers/staging/ste_rmi4/Makefile b/drivers/staging/ste_rmi4/Makefile index 6cce2ed..176f469 100644 --- a/drivers/staging/ste_rmi4/Makefile +++ b/drivers/staging/ste_rmi4/Makefile @@ -2,3 +2,4 @@ # Makefile for the RMI4 touchscreen driver. # obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += synaptics_i2c_rmi4.o +obj-$(CONFIG_MACH_U8500) += board-mop500-u8500uib-rmi4.o diff --git a/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c b/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c new file mode 100644 index 0000000..a272e48 --- /dev/null +++ b/drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c @@ -0,0 +1,32 @@ +/* + * Some platform data for the RMI4 touchscreen that will override the __weak + * platform data in the Ux500 machine if this driver is activated. + */ +#include +#include +#include +#include +#include +#include "synaptics_i2c_rmi4.h" + +/* + * Synaptics RMI4 touchscreen interface on the U8500 UIB + */ + +/* + * Descriptor structure. + * Describes the number of i2c devices on the bus that speak RMI. + */ +static struct synaptics_rmi4_platform_data rmi4_i2c_dev_platformdata = { + .irq_number = NOMADIK_GPIO_TO_IRQ(84), + .irq_type = (IRQF_TRIGGER_FALLING | IRQF_SHARED), + .x_flip = false, + .y_flip = true, +}; + +struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = { + { + I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B), + .platform_data = &rmi4_i2c_dev_platformdata, + }, +}; -- cgit v0.10.2 From 03bda05d9ced3a80b2265d9da611c6670840abc7 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Wed, 29 Jun 2011 22:50:48 +0300 Subject: Staging: iio: some uninitialized variable bugs There were some uninitialized variable warnings in iio. Two of these came from the recent changes to how the private data was allocated in 83f0422dc6a16 "staging:iio:accel:sca3000: allocate state in iio_dev and use iio_priv to access." drivers/staging/iio/accel/sca3000_core.c: In function 'sca3000_probe': drivers/staging/iio/accel/sca3000_core.c:1137:9: warning: 'st' may be used uninitialized in this function drivers/staging/iio/adc/ad7291.c: In function 'ad7291_probe': drivers/staging/iio/adc/ad7291.c:805:15: warning: 'chip' may be used uninitialized in this function drivers/staging/iio/dac/ad5624r_spi.c: In function 'ad5624r_probe': drivers/staging/iio/dac/ad5624r_spi.c:228:24: warning: 'st' may be used uninitialized in this function Signed-off-by: Dan Carpenter Acked-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/accel/sca3000_core.c b/drivers/staging/iio/accel/sca3000_core.c index 4313f73..603f5bc 100644 --- a/drivers/staging/iio/accel/sca3000_core.c +++ b/drivers/staging/iio/accel/sca3000_core.c @@ -1133,6 +1133,7 @@ static int __devinit sca3000_probe(struct spi_device *spi) goto error_ret; } + st = iio_priv(indio_dev); spi_set_drvdata(spi, indio_dev); st->us = spi; mutex_init(&st->lock); diff --git a/drivers/staging/iio/adc/ad7291.c b/drivers/staging/iio/adc/ad7291.c index f024026..96cbb17 100644 --- a/drivers/staging/iio/adc/ad7291.c +++ b/drivers/staging/iio/adc/ad7291.c @@ -799,6 +799,7 @@ static int __devinit ad7291_probe(struct i2c_client *client, ret = -ENOMEM; goto error_ret; } + chip = iio_priv(indio_dev); /* this is only used for device removal purposes */ i2c_set_clientdata(client, indio_dev); diff --git a/drivers/staging/iio/dac/ad5624r_spi.c b/drivers/staging/iio/dac/ad5624r_spi.c index 0175cc06..a5b3776 100644 --- a/drivers/staging/iio/dac/ad5624r_spi.c +++ b/drivers/staging/iio/dac/ad5624r_spi.c @@ -276,7 +276,7 @@ error_free_dev: iio_free_device(indio_dev); error_disable_reg: if (!IS_ERR(reg)) - regulator_disable(st->reg); + regulator_disable(reg); error_put_reg: if (!IS_ERR(reg)) regulator_put(reg); -- cgit v0.10.2 From 6d1ad0f8aa9d3caf6e3f26ad39b43c687abd9c82 Mon Sep 17 00:00:00 2001 From: Bryan Freed Date: Tue, 28 Jun 2011 16:46:33 -0700 Subject: staging: iio: light sensor: Add a calibscale file to the isl29018 light sensor driver. Defaulting to 1, this gives a way to amplify the lux value before being reduced by the programmed adc_bit shift. Only support whole numbers right now. When this driver is converted to the new IIO_CHAN framework, it will be easy to support the framework's pseudo float. Add illuminance0_calibscale documentation to sysfs-bus-iio-light. Signed-off-by: Bryan Freed Acked-by: Rhyland Klein Acked-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-light b/drivers/staging/iio/Documentation/sysfs-bus-iio-light index 21d2774..edbf470 100644 --- a/drivers/staging/iio/Documentation/sysfs-bus-iio-light +++ b/drivers/staging/iio/Documentation/sysfs-bus-iio-light @@ -75,3 +75,11 @@ KernelVersion: 2.6.37 Contact: linux-iio@vger.kernel.org Description: This property gets/sets the sensors ADC analog integration time. + +What: /sys/bus/iio/devices/device[n]/illuminance0_calibscale +KernelVersion: 2.6.37 +Contact: linux-iio@vger.kernel.org +Description: + Hardware or software applied calibration scale factor assumed + to account for attenuation due to industrial design (glass + filters or aperture holes). diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c index fc5712a..cc6d718 100644 --- a/drivers/staging/iio/light/isl29018.c +++ b/drivers/staging/iio/light/isl29018.c @@ -56,6 +56,7 @@ struct isl29018_chip { struct i2c_client *client; struct mutex lock; + unsigned int lux_scale; unsigned int range; unsigned int adc_bit; int prox_scheme; @@ -165,7 +166,7 @@ static int isl29018_read_lux(struct i2c_client *client, int *lux) if (lux_data < 0) return lux_data; - *lux = (lux_data * chip->range) >> chip->adc_bit; + *lux = (lux_data * chip->range * chip->lux_scale) >> chip->adc_bit; return 0; } @@ -263,6 +264,34 @@ static ssize_t get_sensor_data(struct device *dev, char *buf, int mode) } /* Sysfs interface */ +/* lux_scale */ +static ssize_t show_lux_scale(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct isl29018_chip *chip = indio_dev->dev_data; + + return sprintf(buf, "%d\n", chip->lux_scale); +} + +static ssize_t store_lux_scale(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct isl29018_chip *chip = indio_dev->dev_data; + unsigned long lval; + + lval = simple_strtoul(buf, NULL, 10); + if (lval == 0) + return -EINVAL; + + mutex_lock(&chip->lock); + chip->lux_scale = lval; + mutex_unlock(&chip->lock); + + return count; +} + /* range */ static ssize_t show_range(struct device *dev, struct device_attribute *attr, char *buf) @@ -411,6 +440,8 @@ static IIO_DEVICE_ATTR(proximity_on_chip_ambient_infrared_supression, show_prox_infrared_supression, store_prox_infrared_supression, 0); static IIO_DEVICE_ATTR(illuminance0_input, S_IRUGO, show_lux, NULL, 0); +static IIO_DEVICE_ATTR(illuminance0_calibscale, S_IRUGO | S_IWUSR, + show_lux_scale, store_lux_scale, 0); static IIO_DEVICE_ATTR(intensity_infrared_raw, S_IRUGO, show_ir, NULL, 0); static IIO_DEVICE_ATTR(proximity_raw, S_IRUGO, show_proxim_ir, NULL, 0); @@ -423,6 +454,7 @@ static struct attribute *isl29018_attributes[] = { ISL29018_CONST_ATTR(adc_resolution_available), ISL29018_DEV_ATTR(proximity_on_chip_ambient_infrared_supression), ISL29018_DEV_ATTR(illuminance0_input), + ISL29018_DEV_ATTR(illuminance0_calibscale), ISL29018_DEV_ATTR(intensity_infrared_raw), ISL29018_DEV_ATTR(proximity_raw), NULL @@ -479,6 +511,7 @@ static int __devinit isl29018_probe(struct i2c_client *client, mutex_init(&chip->lock); + chip->lux_scale = 1; chip->range = 1000; chip->adc_bit = 16; -- cgit v0.10.2 From 7bcf302ff151da6559261bc73e8b9d1ae31cc0bb Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Fri, 1 Jul 2011 11:13:36 +0100 Subject: staging:iio:gyro:adis16260 fix missing num_channels setup. Signed-off-by: Jonathan Cameron Cc: stable [3.0] Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/gyro/adis16260_core.c b/drivers/staging/iio/gyro/adis16260_core.c index 801c820..05797f4 100644 --- a/drivers/staging/iio/gyro/adis16260_core.c +++ b/drivers/staging/iio/gyro/adis16260_core.c @@ -615,7 +615,7 @@ static int __devinit adis16260_probe(struct spi_device *spi) } else indio_dev->channels = adis16260_channels_x; - + indio_dev->num_channels = ARRAY_SIZE(adis16260_channels_x); indio_dev->modes = INDIO_DIRECT_MODE; ret = adis16260_configure_ring(indio_dev); -- cgit v0.10.2 From 85ee35e50d9d416cbe76e8af2b216e1760241400 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Thu, 30 Jun 2011 12:01:31 +0300 Subject: Staging: iio: release locks on error paths There are a couple places here where we should have called mutex_unlock() before returning. Signed-off-by: Dan Carpenter Acked-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/accel/adis16201_core.c b/drivers/staging/iio/accel/adis16201_core.c index cbc59c5..2fd01ae 100644 --- a/drivers/staging/iio/accel/adis16201_core.c +++ b/drivers/staging/iio/accel/adis16201_core.c @@ -305,13 +305,17 @@ static int adis16201_read_raw(struct iio_dev *indio_dev, mutex_lock(&indio_dev->mlock); addr = adis16201_addresses[chan->address][0]; ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16); - if (ret) + if (ret) { + mutex_unlock(&indio_dev->mlock); return ret; + } if (val16 & ADIS16201_ERROR_ACTIVE) { ret = adis16201_check_status(indio_dev); - if (ret) + if (ret) { + mutex_unlock(&indio_dev->mlock); return ret; + } } val16 = val16 & ((1 << chan->scan_type.realbits) - 1); if (chan->scan_type.sign == 's') -- cgit v0.10.2 From 49184c5d33c151c3e774406aaa0fc47a9ed0d6b8 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Sun, 3 Jul 2011 16:38:20 +1200 Subject: drivers: staging: bcm: sort: kill handrolled bubblesort Replaced the handrolled bubblesort with the kernel's sort() function. Makes things considerably smaller & clearer. Signed-off-by: Chris Forbes Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/bcm/sort.c b/drivers/staging/bcm/sort.c index fc5d07a..63c966a 100644 --- a/drivers/staging/bcm/sort.c +++ b/drivers/staging/bcm/sort.c @@ -1,4 +1,5 @@ #include "headers.h" +#include /* * File Name: sort.c @@ -10,54 +11,42 @@ * Copyright (c) 2007 Beceem Communications Pvt. Ltd */ +static int compare_packet_info(void const *a, void const *b) +{ + PacketInfo const *pa = a; + PacketInfo const *pb = b; + + if (!pa->bValid || !pb->bValid) + return 0; + + return pa->u8TrafficPriority - pb->u8TrafficPriority; +} + VOID SortPackInfo(PMINI_ADAPTER Adapter) { - UINT nIndex1; - UINT nIndex2; - - BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "<======="); - - for(nIndex1 = 0; nIndex1 < NO_OF_QUEUES -2 ; nIndex1++) - { - for(nIndex2 = nIndex1 + 1 ; nIndex2 < NO_OF_QUEUES -1 ; nIndex2++) - { - if(Adapter->PackInfo[nIndex1].bValid && Adapter->PackInfo[nIndex2].bValid) - { - if(Adapter->PackInfo[nIndex2].u8TrafficPriority < - Adapter->PackInfo[nIndex1].u8TrafficPriority) - { - PacketInfo stTemppackInfo = Adapter->PackInfo[nIndex2]; - Adapter->PackInfo[nIndex2] = Adapter->PackInfo[nIndex1]; - Adapter->PackInfo[nIndex1] = stTemppackInfo; - - } - } - } - } + BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, + DBG_LVL_ALL, "<======="); + + sort(Adapter->PackInfo, NO_OF_QUEUES, sizeof(PacketInfo), + compare_packet_info, NULL); +} + +static int compare_classifiers(void const *a, void const *b) +{ + S_CLASSIFIER_RULE const *pa = a; + S_CLASSIFIER_RULE const *pb = b; + + if (!pa->bUsed || !pb->bUsed) + return 0; + + return pa->u8ClassifierRulePriority - pb->u8ClassifierRulePriority; } VOID SortClassifiers(PMINI_ADAPTER Adapter) { - UINT nIndex1; - UINT nIndex2; - - BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CONN_MSG, DBG_LVL_ALL, "<======="); - - for(nIndex1 = 0; nIndex1 < MAX_CLASSIFIERS -1 ; nIndex1++) - { - for(nIndex2 = nIndex1 + 1 ; nIndex2 < MAX_CLASSIFIERS ; nIndex2++) - { - if(Adapter->astClassifierTable[nIndex1].bUsed && Adapter->astClassifierTable[nIndex2].bUsed) - { - if(Adapter->astClassifierTable[nIndex2].u8ClassifierRulePriority < - Adapter->astClassifierTable[nIndex1].u8ClassifierRulePriority) - { - S_CLASSIFIER_RULE stTempClassifierRule = Adapter->astClassifierTable[nIndex2]; - Adapter->astClassifierTable[nIndex2] = Adapter->astClassifierTable[nIndex1]; - Adapter->astClassifierTable[nIndex1] = stTempClassifierRule; - - } - } - } - } + BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CONN_MSG, + DBG_LVL_ALL, "<======="); + + sort(Adapter->astClassifierTable, MAX_CLASSIFIERS, + sizeof(S_CLASSIFIER_RULE), compare_classifiers, NULL); } -- cgit v0.10.2 From 30c5007e143135ad252d4cdd8a5d78748845b746 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Fri, 1 Jul 2011 21:55:38 +1200 Subject: drivers: staging: echo: Fix coding style issues. Fixed coding style issues as flagged by checkpatch.pl Signed-off-by: Chris Forbes Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/echo/echo.c b/drivers/staging/echo/echo.c index c0adae1..afbf544 100644 --- a/drivers/staging/echo/echo.c +++ b/drivers/staging/echo/echo.c @@ -276,7 +276,6 @@ error_oom: kfree(ec); return NULL; } - EXPORT_SYMBOL_GPL(oslec_create); void oslec_free(struct oslec_state *ec) @@ -290,14 +289,12 @@ void oslec_free(struct oslec_state *ec) kfree(ec->snapshot); kfree(ec); } - EXPORT_SYMBOL_GPL(oslec_free); void oslec_adaption_mode(struct oslec_state *ec, int adaption_mode) { ec->adaption_mode = adaption_mode; } - EXPORT_SYMBOL_GPL(oslec_adaption_mode); void oslec_flush(struct oslec_state *ec) @@ -324,14 +321,12 @@ void oslec_flush(struct oslec_state *ec) ec->curr_pos = ec->taps - 1; ec->Pstates = 0; } - EXPORT_SYMBOL_GPL(oslec_flush); void oslec_snapshot(struct oslec_state *ec) { memcpy(ec->snapshot, ec->fir_taps16[0], ec->taps * sizeof(int16_t)); } - EXPORT_SYMBOL_GPL(oslec_snapshot); /* Dual Path Echo Canceller */ @@ -406,7 +401,7 @@ int16_t oslec_update(struct oslec_state *ec, int16_t tx, int16_t rx) /* efficient "out with the old and in with the new" algorithm so we don't have to recalculate over the whole block of samples. */ - new = (int)tx *(int)tx; + new = (int)tx * (int)tx; old = (int)ec->fir_state.history[ec->fir_state.curr_pos] * (int)ec->fir_state.history[ec->fir_state.curr_pos]; ec->Pstates += @@ -603,7 +598,6 @@ int16_t oslec_update(struct oslec_state *ec, int16_t tx, int16_t rx) return (int16_t) ec->clean_nlp << 1; } - EXPORT_SYMBOL_GPL(oslec_update); /* This function is separated from the echo canceller is it is usually called @@ -628,7 +622,7 @@ EXPORT_SYMBOL_GPL(oslec_update); giving very clean DC removal. */ -int16_t oslec_hpf_tx(struct oslec_state * ec, int16_t tx) +int16_t oslec_hpf_tx(struct oslec_state *ec, int16_t tx) { int tmp, tmp1; @@ -657,7 +651,6 @@ int16_t oslec_hpf_tx(struct oslec_state * ec, int16_t tx) return tx; } - EXPORT_SYMBOL_GPL(oslec_hpf_tx); MODULE_LICENSE("GPL"); -- cgit v0.10.2 From 0c6fce5eb6a9866674dcf6c26913d0908a119ba3 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Thu, 19 May 2011 16:52:11 +0530 Subject: davinci: psc.h: clean up indentation done using spaces psc.h has indentation using spaces at a number of places. Fix this by indenting using tabs instead. Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index a47e6f2..1110fdd 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -30,47 +30,47 @@ #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 /* Power and Sleep Controller (PSC) Domains */ -#define DAVINCI_GPSC_ARMDOMAIN 0 -#define DAVINCI_GPSC_DSPDOMAIN 1 +#define DAVINCI_GPSC_ARMDOMAIN 0 +#define DAVINCI_GPSC_DSPDOMAIN 1 -#define DAVINCI_LPSC_VPSSMSTR 0 -#define DAVINCI_LPSC_VPSSSLV 1 -#define DAVINCI_LPSC_TPCC 2 -#define DAVINCI_LPSC_TPTC0 3 -#define DAVINCI_LPSC_TPTC1 4 -#define DAVINCI_LPSC_EMAC 5 -#define DAVINCI_LPSC_EMAC_WRAPPER 6 -#define DAVINCI_LPSC_USB 9 -#define DAVINCI_LPSC_ATA 10 -#define DAVINCI_LPSC_VLYNQ 11 -#define DAVINCI_LPSC_UHPI 12 -#define DAVINCI_LPSC_DDR_EMIF 13 -#define DAVINCI_LPSC_AEMIF 14 -#define DAVINCI_LPSC_MMC_SD 15 -#define DAVINCI_LPSC_McBSP 17 -#define DAVINCI_LPSC_I2C 18 -#define DAVINCI_LPSC_UART0 19 -#define DAVINCI_LPSC_UART1 20 -#define DAVINCI_LPSC_UART2 21 -#define DAVINCI_LPSC_SPI 22 -#define DAVINCI_LPSC_PWM0 23 -#define DAVINCI_LPSC_PWM1 24 -#define DAVINCI_LPSC_PWM2 25 -#define DAVINCI_LPSC_GPIO 26 -#define DAVINCI_LPSC_TIMER0 27 -#define DAVINCI_LPSC_TIMER1 28 -#define DAVINCI_LPSC_TIMER2 29 -#define DAVINCI_LPSC_SYSTEM_SUBSYS 30 -#define DAVINCI_LPSC_ARM 31 -#define DAVINCI_LPSC_SCR2 32 -#define DAVINCI_LPSC_SCR3 33 -#define DAVINCI_LPSC_SCR4 34 -#define DAVINCI_LPSC_CROSSBAR 35 -#define DAVINCI_LPSC_CFG27 36 -#define DAVINCI_LPSC_CFG3 37 -#define DAVINCI_LPSC_CFG5 38 -#define DAVINCI_LPSC_GEM 39 -#define DAVINCI_LPSC_IMCOP 40 +#define DAVINCI_LPSC_VPSSMSTR 0 +#define DAVINCI_LPSC_VPSSSLV 1 +#define DAVINCI_LPSC_TPCC 2 +#define DAVINCI_LPSC_TPTC0 3 +#define DAVINCI_LPSC_TPTC1 4 +#define DAVINCI_LPSC_EMAC 5 +#define DAVINCI_LPSC_EMAC_WRAPPER 6 +#define DAVINCI_LPSC_USB 9 +#define DAVINCI_LPSC_ATA 10 +#define DAVINCI_LPSC_VLYNQ 11 +#define DAVINCI_LPSC_UHPI 12 +#define DAVINCI_LPSC_DDR_EMIF 13 +#define DAVINCI_LPSC_AEMIF 14 +#define DAVINCI_LPSC_MMC_SD 15 +#define DAVINCI_LPSC_McBSP 17 +#define DAVINCI_LPSC_I2C 18 +#define DAVINCI_LPSC_UART0 19 +#define DAVINCI_LPSC_UART1 20 +#define DAVINCI_LPSC_UART2 21 +#define DAVINCI_LPSC_SPI 22 +#define DAVINCI_LPSC_PWM0 23 +#define DAVINCI_LPSC_PWM1 24 +#define DAVINCI_LPSC_PWM2 25 +#define DAVINCI_LPSC_GPIO 26 +#define DAVINCI_LPSC_TIMER0 27 +#define DAVINCI_LPSC_TIMER1 28 +#define DAVINCI_LPSC_TIMER2 29 +#define DAVINCI_LPSC_SYSTEM_SUBSYS 30 +#define DAVINCI_LPSC_ARM 31 +#define DAVINCI_LPSC_SCR2 32 +#define DAVINCI_LPSC_SCR3 33 +#define DAVINCI_LPSC_SCR4 34 +#define DAVINCI_LPSC_CROSSBAR 35 +#define DAVINCI_LPSC_CFG27 36 +#define DAVINCI_LPSC_CFG3 37 +#define DAVINCI_LPSC_CFG5 38 +#define DAVINCI_LPSC_GEM 39 +#define DAVINCI_LPSC_IMCOP 40 #define DM355_LPSC_TIMER3 5 #define DM355_LPSC_SPI1 6 @@ -102,39 +102,39 @@ /* * LPSC Assignments */ -#define DM646X_LPSC_ARM 0 -#define DM646X_LPSC_C64X_CPU 1 -#define DM646X_LPSC_HDVICP0 2 -#define DM646X_LPSC_HDVICP1 3 -#define DM646X_LPSC_TPCC 4 -#define DM646X_LPSC_TPTC0 5 -#define DM646X_LPSC_TPTC1 6 -#define DM646X_LPSC_TPTC2 7 -#define DM646X_LPSC_TPTC3 8 -#define DM646X_LPSC_PCI 13 -#define DM646X_LPSC_EMAC 14 -#define DM646X_LPSC_VDCE 15 -#define DM646X_LPSC_VPSSMSTR 16 -#define DM646X_LPSC_VPSSSLV 17 -#define DM646X_LPSC_TSIF0 18 -#define DM646X_LPSC_TSIF1 19 -#define DM646X_LPSC_DDR_EMIF 20 -#define DM646X_LPSC_AEMIF 21 -#define DM646X_LPSC_McASP0 22 -#define DM646X_LPSC_McASP1 23 -#define DM646X_LPSC_CRGEN0 24 -#define DM646X_LPSC_CRGEN1 25 -#define DM646X_LPSC_UART0 26 -#define DM646X_LPSC_UART1 27 -#define DM646X_LPSC_UART2 28 -#define DM646X_LPSC_PWM0 29 -#define DM646X_LPSC_PWM1 30 -#define DM646X_LPSC_I2C 31 -#define DM646X_LPSC_SPI 32 -#define DM646X_LPSC_GPIO 33 -#define DM646X_LPSC_TIMER0 34 -#define DM646X_LPSC_TIMER1 35 -#define DM646X_LPSC_ARM_INTC 45 +#define DM646X_LPSC_ARM 0 +#define DM646X_LPSC_C64X_CPU 1 +#define DM646X_LPSC_HDVICP0 2 +#define DM646X_LPSC_HDVICP1 3 +#define DM646X_LPSC_TPCC 4 +#define DM646X_LPSC_TPTC0 5 +#define DM646X_LPSC_TPTC1 6 +#define DM646X_LPSC_TPTC2 7 +#define DM646X_LPSC_TPTC3 8 +#define DM646X_LPSC_PCI 13 +#define DM646X_LPSC_EMAC 14 +#define DM646X_LPSC_VDCE 15 +#define DM646X_LPSC_VPSSMSTR 16 +#define DM646X_LPSC_VPSSSLV 17 +#define DM646X_LPSC_TSIF0 18 +#define DM646X_LPSC_TSIF1 19 +#define DM646X_LPSC_DDR_EMIF 20 +#define DM646X_LPSC_AEMIF 21 +#define DM646X_LPSC_McASP0 22 +#define DM646X_LPSC_McASP1 23 +#define DM646X_LPSC_CRGEN0 24 +#define DM646X_LPSC_CRGEN1 25 +#define DM646X_LPSC_UART0 26 +#define DM646X_LPSC_UART1 27 +#define DM646X_LPSC_UART2 28 +#define DM646X_LPSC_PWM0 29 +#define DM646X_LPSC_PWM1 30 +#define DM646X_LPSC_I2C 31 +#define DM646X_LPSC_SPI 32 +#define DM646X_LPSC_GPIO 33 +#define DM646X_LPSC_TIMER0 34 +#define DM646X_LPSC_TIMER1 35 +#define DM646X_LPSC_ARM_INTC 45 /* PSC0 defines */ #define DA8XX_LPSC0_TPCC 0 @@ -243,7 +243,7 @@ #define PSC_STATE_DISABLE 2 #define PSC_STATE_ENABLE 3 -#define MDSTAT_STATE_MASK 0x1f +#define MDSTAT_STATE_MASK 0x1f #ifndef __ASSEMBLER__ -- cgit v0.10.2 From 56e580d7783ba49a50ccc1b1f3130e5ed2dc52e7 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Tue, 14 Jun 2011 15:33:20 +0000 Subject: davinci: dm6467/T EVM: fix setting up of reference clock rate The DM6467 and DM6467T EVMs use different reference clock frequencies. This difference is currently supported by having the SoC code call a public board routine which sets up the reference clock frequency. This does not scale as more boards are added. Instead, use the clk_set_rate() API to setup the reference clock frequency to a different value from the board file. Suggested-by: Kevin Hilman Signed-off-by: Sekhar Nori Acked-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index f6ac9ba..9db9838 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -719,9 +719,15 @@ static void __init cdce_clk_init(void) } } +#define DM6467T_EVM_REF_FREQ 33000000 + static void __init davinci_map_io(void) { dm646x_init(); + + if (machine_is_davinci_dm6467tevm()) + davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ); + cdce_clk_init(); } @@ -785,17 +791,6 @@ static __init void evm_init(void) soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID; } -#define DM646X_EVM_REF_FREQ 27000000 -#define DM6467T_EVM_REF_FREQ 33000000 - -void __init dm646x_board_setup_refclk(struct clk *clk) -{ - if (machine_is_davinci_dm6467tevm()) - clk->rate = DM6467T_EVM_REF_FREQ; - else - clk->rate = DM646X_EVM_REF_FREQ; -} - MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") .boot_params = (0x80000100), .map_io = davinci_map_io, diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index e4e3af1..ae65319 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -368,6 +368,12 @@ static unsigned long clk_leafclk_recalc(struct clk *clk) return clk->parent->rate; } +int davinci_simple_set_rate(struct clk *clk, unsigned long rate) +{ + clk->rate = rate; + return 0; +} + static unsigned long clk_pllclk_recalc(struct clk *clk) { u32 ctrl, mult = 1, prediv = 1, postdiv = 1; @@ -506,6 +512,38 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, } EXPORT_SYMBOL(davinci_set_pllrate); +/** + * davinci_set_refclk_rate() - Set the reference clock rate + * @rate: The new rate. + * + * Sets the reference clock rate to a given value. This will most likely + * result in the entire clock tree getting updated. + * + * This is used to support boards which use a reference clock different + * than that used by default in .c file. The reference clock rate + * should be updated early in the boot process; ideally soon after the + * clock tree has been initialized once with the default reference clock + * rate (davinci_common_init()). + * + * Returns 0 on success, error otherwise. + */ +int davinci_set_refclk_rate(unsigned long rate) +{ + struct clk *refclk; + + refclk = clk_get(NULL, "ref"); + if (IS_ERR(refclk)) { + pr_err("%s: failed to get reference clock.\n", __func__); + return PTR_ERR(refclk); + } + + clk_set_rate(refclk, rate); + + clk_put(refclk); + + return 0; +} + int __init davinci_clk_init(struct clk_lookup *clocks) { struct clk_lookup *c; diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 0dd2203..50b2482 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -123,6 +123,8 @@ int davinci_clk_init(struct clk_lookup *clocks); int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, unsigned int mult, unsigned int postdiv); int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); +int davinci_set_refclk_rate(unsigned long rate); +int davinci_simple_set_rate(struct clk *clk, unsigned long rate); extern struct platform_device davinci_wdt_device; extern void davinci_watchdog_reset(struct platform_device *); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 1e0f809..46739c9 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -42,6 +42,7 @@ /* * Device specific clocks */ +#define DM646X_REF_FREQ 27000000 #define DM646X_AUX_FREQ 24000000 static struct pll_data pll1_data = { @@ -56,6 +57,8 @@ static struct pll_data pll2_data = { static struct clk ref_clk = { .name = "ref_clk", + .rate = DM646X_REF_FREQ, + .set_rate = davinci_simple_set_rate, }; static struct clk aux_clkin = { @@ -901,7 +904,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv) void __init dm646x_init(void) { - dm646x_board_setup_refclk(&ref_clk); davinci_common_init(&davinci_soc_info_dm646x); } diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 7a27f3f..2a00fe5 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h @@ -15,7 +15,6 @@ #include #include #include -#include #include #define DM646X_EMAC_BASE (0x01C80000) @@ -31,7 +30,6 @@ void __init dm646x_init(void); void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); -void __init dm646x_board_setup_refclk(struct clk *clk); int __init dm646x_init_edma(struct edma_rsv_info *rsv); void dm646x_video_init(void); -- cgit v0.10.2 From e8e30b8ded0f6fcc8ae63e2918e7353b76bdfa4b Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Wed, 6 Jul 2011 15:02:49 +1000 Subject: staging: use of tasklets requires including interrupt.h The implicit include of linux/interrupt.h is being removed from netdevice.h. Signed-off-by: Stephen Rothwell Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index 722d4c7..7fa95b6 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include -- cgit v0.10.2 From 7104b5df5b2e53ef864e94556c1b3f63f6a56b70 Mon Sep 17 00:00:00 2001 From: David Chang Date: Wed, 6 Jul 2011 14:52:19 +0800 Subject: staging: usbip: userspace: usbipd.c: fix userspace build error When build userspace code, got the following error message: make[2]: Entering directory `/usr/src/staging-2.6/drivers/staging/usbip/userspace/src' CC usbip.o ... CCLD usbip CC usbipd.o usbipd.c:30:25: fatal error: stub_driver.h: No such file or directory compilation terminated. make[2]: *** [usbipd.o] Error 1 make[2]: Leaving directory `/usr/src/staging-2.6/drivers/staging/usbip/userspace/src' make[1]: *** [all-recursive] Error 1 make[1]: Leaving directory `/usr/src/staging-2.6/drivers/staging/usbip/userspace' make: *** [all] Error 2 Due to commit 756d6726 and a16941ae, stub_driver had been changed into host_driver, so update header filename and functions name to fix these build errors Signed-off-by: David Chang CC: Joe Perches Cc: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index 521b44e..ef92f3b 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -27,7 +27,7 @@ #include #include -#include "stub_driver.h" +#include "usbip_host_driver.h" #include "usbip_common.h" #include "usbip_network.h" @@ -43,7 +43,7 @@ static int send_reply_devlist(int sockfd) reply.ndev = 0; /* how many devices are exported ? */ - dlist_for_each_data(stub_driver->edev_list, edev, struct usbip_exported_device) { + dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { reply.ndev += 1; } @@ -63,7 +63,7 @@ static int send_reply_devlist(int sockfd) return ret; } - dlist_for_each_data(stub_driver->edev_list, edev, struct usbip_exported_device) { + dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { struct usbip_usb_device pdu_udev; dump_usb_device(&edev->udev); @@ -138,7 +138,7 @@ static int recv_request_import(int sockfd) PACK_OP_IMPORT_REQUEST(0, &req); - dlist_for_each_data(stub_driver->edev_list, edev, struct usbip_exported_device) { + dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { if (!strncmp(req.busid, edev->udev.busid, SYSFS_BUS_ID_SIZE)) { dbg("found requested device %s", req.busid); found = 1; @@ -151,7 +151,7 @@ static int recv_request_import(int sockfd) usbip_set_nodelay(sockfd); /* export_device needs a TCP/IP socket descriptor */ - ret = usbip_stub_export_device(edev, sockfd); + ret = usbip_host_export_device(edev, sockfd); if (ret < 0) error = 1; } else { @@ -197,7 +197,7 @@ static int recv_pdu(int sockfd) } - ret = usbip_stub_refresh_device_list(); + ret = usbip_host_refresh_device_list(); if (ret < 0) return -1; @@ -431,7 +431,7 @@ static void do_standalone_mode(gboolean daemonize) if (ret) err("open usb.ids"); - ret = usbip_stub_driver_open(); + ret = usbip_host_driver_open(); if (ret < 0) g_error("driver open failed"); @@ -471,7 +471,7 @@ static void do_standalone_mode(gboolean daemonize) freeaddrinfo(ai_head); usbip_names_free(); - usbip_stub_driver_close(); + usbip_host_driver_close(); return; } -- cgit v0.10.2 From 0435f9337f051db77b4eaf02eee83e7a29f3474a Mon Sep 17 00:00:00 2001 From: Pavel Roskin Date: Wed, 6 Jul 2011 10:15:44 -0400 Subject: staging: comedi: remove COMEDI_DEVICE_CREATE macro, expand all callers This is no longer needed as the code is now in the main kernel tree. Signed-off-by: Pavel Roskin Cc: Frank Mori Hess Cc: Ian Abbott Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index 419976b..e90e3cc 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -2175,9 +2175,8 @@ int comedi_alloc_board_minor(struct device *hardware_device) return -EBUSY; } info->device->minor = i; - csdev = COMEDI_DEVICE_CREATE(comedi_class, NULL, - MKDEV(COMEDI_MAJOR, i), NULL, - hardware_device, "comedi%i", i); + csdev = device_create(comedi_class, hardware_device, + MKDEV(COMEDI_MAJOR, i), NULL, "comedi%i", i); if (!IS_ERR(csdev)) info->device->class_dev = csdev; dev_set_drvdata(csdev, info); @@ -2276,10 +2275,9 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev, return -EBUSY; } s->minor = i; - csdev = COMEDI_DEVICE_CREATE(comedi_class, dev->class_dev, - MKDEV(COMEDI_MAJOR, i), NULL, NULL, - "comedi%i_subd%i", dev->minor, - (int)(s - dev->subdevices)); + csdev = device_create(comedi_class, dev->class_dev, + MKDEV(COMEDI_MAJOR, i), NULL, "comedi%i_subd%i", + dev->minor, (int)(s - dev->subdevices)); if (!IS_ERR(csdev)) s->class_dev = csdev; dev_set_drvdata(csdev, info); diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h index 68aa917..7a0d4bc 100644 --- a/drivers/staging/comedi/comedidev.h +++ b/drivers/staging/comedi/comedidev.h @@ -61,9 +61,6 @@ #define COMEDI_NUM_BOARD_MINORS 0x30 #define COMEDI_FIRST_SUBDEVICE_MINOR COMEDI_NUM_BOARD_MINORS -#define COMEDI_DEVICE_CREATE(cs, parent, devt, drvdata, device, fmt...) \ - device_create(cs, ((parent) ? (parent) : (device)), devt, drvdata, fmt) - struct comedi_subdevice { struct comedi_device *device; int type; -- cgit v0.10.2 From 8d54297b90831b6e87e62ad910f833b8666094c8 Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Tue, 28 Jun 2011 15:10:51 +0000 Subject: davinci: da850: add a .set_rate method to ref_clk This patch allows setting the input clock frequency of the SoC from the board specific code using the davinci_set_refclk_rate function. Suggested-by: Kevin Hilman Signed-off-by: Christian Riesch Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 133aac4..4e22b8d 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -58,6 +58,7 @@ static struct pll_data pll0_data = { static struct clk ref_clk = { .name = "ref_clk", .rate = DA850_REF_FREQ, + .set_rate = davinci_simple_set_rate, }; static struct clk pll0_clk = { -- cgit v0.10.2 From 0f79960391a5a1e3679956024e18aeeb0369ac44 Mon Sep 17 00:00:00 2001 From: Mike Snitzer Date: Wed, 6 Jul 2011 21:30:50 +0200 Subject: block: eliminate potential for infinite loop in blkdev_issue_discard Due to the recently identified overflow in read_capacity_16() it was possible for max_discard_sectors to be zero but still have discards enabled on the associated device's queue. Eliminate the possibility for blkdev_issue_discard to infinitely loop. Interestingly this issue wasn't identified until a device, whose discard_granularity was 0 due to read_capacity_16 overflow, was consumed by blk_stack_limits() to construct limits for a higher-level DM multipath device. The multipath device's resulting limits never had the discard limits stacked because blk_stack_limits() will only do so if the bottom device's discard_granularity != 0. This resulted in the multipath device's limits.max_discard_sectors being 0. Signed-off-by: Mike Snitzer Signed-off-by: Jens Axboe diff --git a/block/blk-lib.c b/block/blk-lib.c index 78e627e..64974b1 100644 --- a/block/blk-lib.c +++ b/block/blk-lib.c @@ -59,7 +59,10 @@ int blkdev_issue_discard(struct block_device *bdev, sector_t sector, * granularity */ max_discard_sectors = min(q->limits.max_discard_sectors, UINT_MAX >> 9); - if (q->limits.discard_granularity) { + if (!unlikely(!max_discard_sectors)) { + /* Avoid infinite loop below. Being cautious never hurts. */ + return -EOPNOTSUPP; + } else if (q->limits.discard_granularity) { unsigned int disc_sects = q->limits.discard_granularity >> 9; max_discard_sectors &= ~(disc_sects - 1); -- cgit v0.10.2 From f70d8ef4745349000dc599b6873a8b866289c694 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:08 +0100 Subject: x86, olpc: Add missing elements to device tree In response to new device tree code in the kernel, OLPC will start using it for probing of certain devices. However, some firmware fixes are needed to put the devicetree into a usable state. Retain compatibility with old firmware by fixing up the device tree at boot-time if it does not contain the new nodes/properties that we need for probing. This is the same approach taken on PPC platforms. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-2-git-send-email-dsd@laptop.org Acked-by: Grant Likely Acked-by: Andres Salomon Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: H. Peter Anvin diff --git a/arch/x86/platform/olpc/olpc_dt.c b/arch/x86/platform/olpc/olpc_dt.c index d39f63d..d6ee929 100644 --- a/arch/x86/platform/olpc/olpc_dt.c +++ b/arch/x86/platform/olpc/olpc_dt.c @@ -165,6 +165,107 @@ static struct of_pdt_ops prom_olpc_ops __initdata = { .pkg2path = olpc_dt_pkg2path, }; +static phandle __init olpc_dt_finddevice(const char *path) +{ + phandle node; + const void *args[] = { path }; + void *res[] = { &node }; + + if (olpc_ofw("finddevice", args, res)) { + pr_err("olpc_dt: finddevice failed!\n"); + return 0; + } + + if ((s32) node == -1) + return 0; + + return node; +} + +static int __init olpc_dt_interpret(const char *words) +{ + int result; + const void *args[] = { words }; + void *res[] = { &result }; + + if (olpc_ofw("interpret", args, res)) { + pr_err("olpc_dt: interpret failed!\n"); + return -1; + } + + return result; +} + +/* + * Extract board revision directly from OFW device tree. + * We can't use olpc_platform_info because that hasn't been set up yet. + */ +static u32 __init olpc_dt_get_board_revision(void) +{ + phandle node; + __be32 rev; + int r; + + node = olpc_dt_finddevice("/"); + if (!node) + return 0; + + r = olpc_dt_getproperty(node, "board-revision-int", + (char *) &rev, sizeof(rev)); + if (r < 0) + return 0; + + return be32_to_cpu(rev); +} + +void __init olpc_dt_fixup(void) +{ + int r; + char buf[64]; + phandle node; + u32 board_rev; + + node = olpc_dt_finddevice("/battery@0"); + if (!node) + return; + + /* + * If the battery node has a compatible property, we are running a new + * enough firmware and don't have fixups to make. + */ + r = olpc_dt_getproperty(node, "compatible", buf, sizeof(buf)); + if (r > 0) + return; + + pr_info("PROM DT: Old firmware detected, applying fixes\n"); + + /* Add olpc,xo1-battery compatible marker to battery node */ + olpc_dt_interpret("\" /battery@0\" find-device" + " \" olpc,xo1-battery\" +compatible" + " device-end"); + + board_rev = olpc_dt_get_board_revision(); + if (!board_rev) + return; + + if (board_rev >= olpc_board_pre(0xd0)) { + /* XO-1.5: add dcon device */ + olpc_dt_interpret("\" /pci/display@1\" find-device" + " new-device" + " \" dcon\" device-name \" olpc,xo1-dcon\" +compatible" + " finish-device device-end"); + } else { + /* XO-1: add dcon device, mark RTC as olpc,xo1-rtc */ + olpc_dt_interpret("\" /pci/display@1,1\" find-device" + " new-device" + " \" dcon\" device-name \" olpc,xo1-dcon\" +compatible" + " finish-device device-end" + " \" /rtc\" find-device" + " \" olpc,xo1-rtc\" +compatible" + " device-end"); + } +} + void __init olpc_dt_build_devicetree(void) { phandle root; @@ -172,6 +273,8 @@ void __init olpc_dt_build_devicetree(void) if (!olpc_ofw_is_installed()) return; + olpc_dt_fixup(); + root = olpc_dt_getsibling(0); if (!root) { pr_err("PROM: unable to get root node from OFW!\n"); -- cgit v0.10.2 From 7a0d4fcf6d4b80b30503fd2701eeef1883e11404 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:09 +0100 Subject: x86, olpc: Move CS5536-related constants to cs5535.h Move these definitions into the relevant header file. This was requested in the review of the upcoming XO-1 suspend/resume code. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-3-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/platform/olpc/olpc-xo1.c b/arch/x86/platform/olpc/olpc-xo1.c index ab81fb2..a63e948 100644 --- a/arch/x86/platform/olpc/olpc-xo1.c +++ b/arch/x86/platform/olpc/olpc-xo1.c @@ -12,6 +12,7 @@ * (at your option) any later version. */ +#include #include #include #include @@ -22,17 +23,6 @@ #define DRV_NAME "olpc-xo1" -/* PMC registers (PMS block) */ -#define PM_SCLK 0x10 -#define PM_IN_SLPCTL 0x20 -#define PM_WKXD 0x34 -#define PM_WKD 0x30 -#define PM_SSC 0x54 - -/* PM registers (ACPI block) */ -#define PM1_CNT 0x08 -#define PM_GPE0_STS 0x18 - static unsigned long acpi_base; static unsigned long pms_base; @@ -41,17 +31,17 @@ static void xo1_power_off(void) printk(KERN_INFO "OLPC XO-1 power off sequence...\n"); /* Enable all of these controls with 0 delay */ - outl(0x40000000, pms_base + PM_SCLK); - outl(0x40000000, pms_base + PM_IN_SLPCTL); - outl(0x40000000, pms_base + PM_WKXD); - outl(0x40000000, pms_base + PM_WKD); + outl(0x40000000, pms_base + CS5536_PM_SCLK); + outl(0x40000000, pms_base + CS5536_PM_IN_SLPCTL); + outl(0x40000000, pms_base + CS5536_PM_WKXD); + outl(0x40000000, pms_base + CS5536_PM_WKD); /* Clear status bits (possibly unnecessary) */ - outl(0x0002ffff, pms_base + PM_SSC); - outl(0xffffffff, acpi_base + PM_GPE0_STS); + outl(0x0002ffff, pms_base + CS5536_PM_SSC); + outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); /* Write SLP_EN bit to start the machinery */ - outl(0x00002000, acpi_base + PM1_CNT); + outl(0x00002000, acpi_base + CS5536_PM1_CNT); } static int __devinit olpc_xo1_probe(struct platform_device *pdev) diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index 6fe2114..e46b8b0 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -49,6 +49,27 @@ #define LBAR_ACPI_SIZE 0x40 #define LBAR_PMS_SIZE 0x80 +/* + * PMC registers (PMS block) + * It is only safe to access these registers as dword accesses. + * See CS5536 Specification Update erratas 17 & 18 + */ +#define CS5536_PM_SCLK 0x10 +#define CS5536_PM_IN_SLPCTL 0x20 +#define CS5536_PM_WKXD 0x34 +#define CS5536_PM_WKD 0x30 +#define CS5536_PM_SSC 0x54 + +/* + * PM registers (ACPI block) + * It is only safe to access these registers as dword accesses. + * See CS5536 Specification Update erratas 17 & 18 + */ +#define CS5536_PM1_STS 0x00 +#define CS5536_PM1_EN 0x02 +#define CS5536_PM1_CNT 0x08 +#define CS5536_PM_GPE0_STS 0x18 + /* VSA2 magic values */ #define VSA_VRC_INDEX 0xAC1C #define VSA_VRC_DATA 0xAC1E -- cgit v0.10.2 From a3128588b3c6be634a9013a375903e0b55668f0a Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:10 +0100 Subject: x86, olpc: Rename olpc-xo1 to olpc-xo1-pm Based on earlier review comments, we'll no longer try to stick all of our XO-1 goodies in a single driver. We'll split it into a power management driver, and an EC/SCI driver. As a first step, rename olpc-xo1 to olpc-xo1-pm, and make it builtin instead of modular. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-4-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index da34972..29615ee 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2073,11 +2073,12 @@ config OLPC Add support for detecting the unique features of the OLPC XO hardware. -config OLPC_XO1 - tristate "OLPC XO-1 support" +config OLPC_XO1_PM + bool "OLPC XO-1 Power Management" depends on OLPC && MFD_CS5535 + select MFD_CORE ---help--- - Add support for non-essential features of the OLPC XO-1 laptop. + Add support for poweroff of the OLPC XO-1 laptop. endif # X86_32 diff --git a/arch/x86/platform/olpc/Makefile b/arch/x86/platform/olpc/Makefile index 81c5e21..cd25038 100644 --- a/arch/x86/platform/olpc/Makefile +++ b/arch/x86/platform/olpc/Makefile @@ -1,2 +1,2 @@ obj-$(CONFIG_OLPC) += olpc.o olpc_ofw.o olpc_dt.o -obj-$(CONFIG_OLPC_XO1) += olpc-xo1.o +obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c new file mode 100644 index 0000000..a2a59d3 --- /dev/null +++ b/arch/x86/platform/olpc/olpc-xo1-pm.c @@ -0,0 +1,123 @@ +/* + * Support for power management features of the OLPC XO-1 laptop + * + * Copyright (C) 2010 Andres Salomon + * Copyright (C) 2010 One Laptop per Child + * Copyright (C) 2006 Red Hat, Inc. + * Copyright (C) 2006 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include +#include + +#define DRV_NAME "olpc-xo1-pm" + +static unsigned long acpi_base; +static unsigned long pms_base; + +static void xo1_power_off(void) +{ + printk(KERN_INFO "OLPC XO-1 power off sequence...\n"); + + /* Enable all of these controls with 0 delay */ + outl(0x40000000, pms_base + CS5536_PM_SCLK); + outl(0x40000000, pms_base + CS5536_PM_IN_SLPCTL); + outl(0x40000000, pms_base + CS5536_PM_WKXD); + outl(0x40000000, pms_base + CS5536_PM_WKD); + + /* Clear status bits (possibly unnecessary) */ + outl(0x0002ffff, pms_base + CS5536_PM_SSC); + outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); + + /* Write SLP_EN bit to start the machinery */ + outl(0x00002000, acpi_base + CS5536_PM1_CNT); +} + +static int __devinit xo1_pm_probe(struct platform_device *pdev) +{ + struct resource *res; + int err; + + /* don't run on non-XOs */ + if (!machine_is_olpc()) + return -ENODEV; + + err = mfd_cell_enable(pdev); + if (err) + return err; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (!res) { + dev_err(&pdev->dev, "can't fetch device resource info\n"); + return -EIO; + } + if (strcmp(pdev->name, "cs5535-pms") == 0) + pms_base = res->start; + else if (strcmp(pdev->name, "olpc-xo1-pm-acpi") == 0) + acpi_base = res->start; + + /* If we have both addresses, we can override the poweroff hook */ + if (pms_base && acpi_base) { + pm_power_off = xo1_power_off; + printk(KERN_INFO "OLPC XO-1 support registered\n"); + } + + return 0; +} + +static int __devexit xo1_pm_remove(struct platform_device *pdev) +{ + mfd_cell_disable(pdev); + + if (strcmp(pdev->name, "cs5535-pms") == 0) + pms_base = 0; + else if (strcmp(pdev->name, "olpc-xo1-pm-acpi") == 0) + acpi_base = 0; + + pm_power_off = NULL; + return 0; +} + +static struct platform_driver cs5535_pms_driver = { + .driver = { + .name = "cs5535-pms", + .owner = THIS_MODULE, + }, + .probe = xo1_pm_probe, + .remove = __devexit_p(xo1_pm_remove), +}; + +static struct platform_driver cs5535_acpi_driver = { + .driver = { + .name = "olpc-xo1-pm-acpi", + .owner = THIS_MODULE, + }, + .probe = xo1_pm_probe, + .remove = __devexit_p(xo1_pm_remove), +}; + +static int __init xo1_pm_init(void) +{ + int r; + + r = platform_driver_register(&cs5535_pms_driver); + if (r) + return r; + + r = platform_driver_register(&cs5535_acpi_driver); + if (r) + platform_driver_unregister(&cs5535_pms_driver); + + return r; +} +arch_initcall(xo1_pm_init); diff --git a/arch/x86/platform/olpc/olpc-xo1.c b/arch/x86/platform/olpc/olpc-xo1.c deleted file mode 100644 index a63e948..0000000 --- a/arch/x86/platform/olpc/olpc-xo1.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Support for features of the OLPC XO-1 laptop - * - * Copyright (C) 2010 Andres Salomon - * Copyright (C) 2010 One Laptop per Child - * Copyright (C) 2006 Red Hat, Inc. - * Copyright (C) 2006 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#define DRV_NAME "olpc-xo1" - -static unsigned long acpi_base; -static unsigned long pms_base; - -static void xo1_power_off(void) -{ - printk(KERN_INFO "OLPC XO-1 power off sequence...\n"); - - /* Enable all of these controls with 0 delay */ - outl(0x40000000, pms_base + CS5536_PM_SCLK); - outl(0x40000000, pms_base + CS5536_PM_IN_SLPCTL); - outl(0x40000000, pms_base + CS5536_PM_WKXD); - outl(0x40000000, pms_base + CS5536_PM_WKD); - - /* Clear status bits (possibly unnecessary) */ - outl(0x0002ffff, pms_base + CS5536_PM_SSC); - outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); - - /* Write SLP_EN bit to start the machinery */ - outl(0x00002000, acpi_base + CS5536_PM1_CNT); -} - -static int __devinit olpc_xo1_probe(struct platform_device *pdev) -{ - struct resource *res; - int err; - - /* don't run on non-XOs */ - if (!machine_is_olpc()) - return -ENODEV; - - err = mfd_cell_enable(pdev); - if (err) - return err; - - res = platform_get_resource(pdev, IORESOURCE_IO, 0); - if (!res) { - dev_err(&pdev->dev, "can't fetch device resource info\n"); - return -EIO; - } - if (strcmp(pdev->name, "cs5535-pms") == 0) - pms_base = res->start; - else if (strcmp(pdev->name, "olpc-xo1-pm-acpi") == 0) - acpi_base = res->start; - - /* If we have both addresses, we can override the poweroff hook */ - if (pms_base && acpi_base) { - pm_power_off = xo1_power_off; - printk(KERN_INFO "OLPC XO-1 support registered\n"); - } - - return 0; -} - -static int __devexit olpc_xo1_remove(struct platform_device *pdev) -{ - mfd_cell_disable(pdev); - - if (strcmp(pdev->name, "cs5535-pms") == 0) - pms_base = 0; - else if (strcmp(pdev->name, "olpc-xo1-pm-acpi") == 0) - acpi_base = 0; - - pm_power_off = NULL; - return 0; -} - -static struct platform_driver cs5535_pms_drv = { - .driver = { - .name = "cs5535-pms", - .owner = THIS_MODULE, - }, - .probe = olpc_xo1_probe, - .remove = __devexit_p(olpc_xo1_remove), -}; - -static struct platform_driver cs5535_acpi_drv = { - .driver = { - .name = "olpc-xo1-pm-acpi", - .owner = THIS_MODULE, - }, - .probe = olpc_xo1_probe, - .remove = __devexit_p(olpc_xo1_remove), -}; - -static int __init olpc_xo1_init(void) -{ - int r; - - r = platform_driver_register(&cs5535_pms_drv); - if (r) - return r; - - r = platform_driver_register(&cs5535_acpi_drv); - if (r) - platform_driver_unregister(&cs5535_pms_drv); - - return r; -} - -static void __exit olpc_xo1_exit(void) -{ - platform_driver_unregister(&cs5535_acpi_drv); - platform_driver_unregister(&cs5535_pms_drv); -} - -MODULE_AUTHOR("Daniel Drake "); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:cs5535-pms"); - -module_init(olpc_xo1_init); -module_exit(olpc_xo1_exit); -- cgit v0.10.2 From 97c4cb71c18fe045a763ff6681a8ebbbbbec0b2b Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:11 +0100 Subject: x86, olpc: Add XO-1 suspend/resume support Add code needed for basic suspend/resume of the XO-1 laptop. Based on earlier work by Jordan Crouse, Andres Salomon, and others. This patch incorporates all earlier feedback from Thomas Gleixner. To clarify a certain point (now more obvious in the code itself): On resume, OpenFirmware returns execution to Linux in protected mode with a kernel-compatible GDT already set up. The changes and simplifications suggested have all been included. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-5-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 29615ee..f473151 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2075,10 +2075,10 @@ config OLPC config OLPC_XO1_PM bool "OLPC XO-1 Power Management" - depends on OLPC && MFD_CS5535 + depends on OLPC && MFD_CS5535 && PM_SLEEP select MFD_CORE ---help--- - Add support for poweroff of the OLPC XO-1 laptop. + Add support for poweroff and suspend of the OLPC XO-1 laptop. endif # X86_32 diff --git a/arch/x86/include/asm/olpc.h b/arch/x86/include/asm/olpc.h index 5ca6801..10ea595 100644 --- a/arch/x86/include/asm/olpc.h +++ b/arch/x86/include/asm/olpc.h @@ -76,6 +76,12 @@ static inline int olpc_has_dcon(void) #endif +#ifdef CONFIG_OLPC_XO1_PM +extern void do_olpc_suspend_lowlevel(void); +extern void olpc_xo1_pm_wakeup_set(u16 value); +extern void olpc_xo1_pm_wakeup_clear(u16 value); +#endif + extern int pci_olpc_init(void); /* EC related functions */ @@ -88,9 +94,12 @@ extern int olpc_ec_mask_unset(uint8_t bits); /* EC commands */ -#define EC_FIRMWARE_REV 0x08 -#define EC_WLAN_ENTER_RESET 0x35 -#define EC_WLAN_LEAVE_RESET 0x25 +#define EC_FIRMWARE_REV 0x08 +#define EC_WAKE_UP_WLAN 0x24 +#define EC_WLAN_LEAVE_RESET 0x25 +#define EC_SET_SCI_INHIBIT 0x32 +#define EC_SET_SCI_INHIBIT_RELEASE 0x34 +#define EC_WLAN_ENTER_RESET 0x35 /* SCI source values */ diff --git a/arch/x86/platform/olpc/Makefile b/arch/x86/platform/olpc/Makefile index cd25038..1ae7bed 100644 --- a/arch/x86/platform/olpc/Makefile +++ b/arch/x86/platform/olpc/Makefile @@ -1,2 +1,2 @@ obj-$(CONFIG_OLPC) += olpc.o olpc_ofw.o olpc_dt.o -obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o +obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o xo1-wakeup.o diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c index a2a59d3..6f3855a 100644 --- a/arch/x86/platform/olpc/olpc-xo1-pm.c +++ b/arch/x86/platform/olpc/olpc-xo1-pm.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -25,6 +26,85 @@ static unsigned long acpi_base; static unsigned long pms_base; +static u16 wakeup_mask = CS5536_PM_PWRBTN; + +static struct { + unsigned long address; + unsigned short segment; +} ofw_bios_entry = { 0xF0000 + PAGE_OFFSET, __KERNEL_CS }; + +/* Set bits in the wakeup mask */ +void olpc_xo1_pm_wakeup_set(u16 value) +{ + wakeup_mask |= value; +} +EXPORT_SYMBOL_GPL(olpc_xo1_pm_wakeup_set); + +/* Clear bits in the wakeup mask */ +void olpc_xo1_pm_wakeup_clear(u16 value) +{ + wakeup_mask &= ~value; +} +EXPORT_SYMBOL_GPL(olpc_xo1_pm_wakeup_clear); + +static int xo1_power_state_enter(suspend_state_t pm_state) +{ + unsigned long saved_sci_mask; + int r; + + /* Only STR is supported */ + if (pm_state != PM_SUSPEND_MEM) + return -EINVAL; + + r = olpc_ec_cmd(EC_SET_SCI_INHIBIT, NULL, 0, NULL, 0); + if (r) + return r; + + /* + * Save SCI mask (this gets lost since PM1_EN is used as a mask for + * wakeup events, which is not necessarily the same event set) + */ + saved_sci_mask = inl(acpi_base + CS5536_PM1_STS); + saved_sci_mask &= 0xffff0000; + + /* Save CPU state */ + do_olpc_suspend_lowlevel(); + + /* Resume path starts here */ + + /* Restore SCI mask (using dword access to CS5536_PM1_EN) */ + outl(saved_sci_mask, acpi_base + CS5536_PM1_STS); + + /* Tell the EC to stop inhibiting SCIs */ + olpc_ec_cmd(EC_SET_SCI_INHIBIT_RELEASE, NULL, 0, NULL, 0); + + /* + * Tell the wireless module to restart USB communication. + * Must be done twice. + */ + olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0); + olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0); + + return 0; +} + +asmlinkage int xo1_do_sleep(u8 sleep_state) +{ + void *pgd_addr = __va(read_cr3()); + + /* Program wakeup mask (using dword access to CS5536_PM1_EN) */ + outl(wakeup_mask << 16, acpi_base + CS5536_PM1_STS); + + __asm__("movl %0,%%eax" : : "r" (pgd_addr)); + __asm__("call *(%%edi); cld" + : : "D" (&ofw_bios_entry)); + __asm__("movb $0x34, %al\n\t" + "outb %al, $0x70\n\t" + "movb $0x30, %al\n\t" + "outb %al, $0x71\n\t"); + return 0; +} + static void xo1_power_off(void) { printk(KERN_INFO "OLPC XO-1 power off sequence...\n"); @@ -43,6 +123,17 @@ static void xo1_power_off(void) outl(0x00002000, acpi_base + CS5536_PM1_CNT); } +static int xo1_power_state_valid(suspend_state_t pm_state) +{ + /* suspend-to-RAM only */ + return pm_state == PM_SUSPEND_MEM; +} + +static const struct platform_suspend_ops xo1_suspend_ops = { + .valid = xo1_power_state_valid, + .enter = xo1_power_state_enter, +}; + static int __devinit xo1_pm_probe(struct platform_device *pdev) { struct resource *res; @@ -68,6 +159,7 @@ static int __devinit xo1_pm_probe(struct platform_device *pdev) /* If we have both addresses, we can override the poweroff hook */ if (pms_base && acpi_base) { + suspend_set_ops(&xo1_suspend_ops); pm_power_off = xo1_power_off; printk(KERN_INFO "OLPC XO-1 support registered\n"); } diff --git a/arch/x86/platform/olpc/xo1-wakeup.S b/arch/x86/platform/olpc/xo1-wakeup.S new file mode 100644 index 0000000..948deb2 --- /dev/null +++ b/arch/x86/platform/olpc/xo1-wakeup.S @@ -0,0 +1,124 @@ +.text +#include +#include +#include +#include + + .macro writepost,value + movb $0x34, %al + outb %al, $0x70 + movb $\value, %al + outb %al, $0x71 + .endm + +wakeup_start: + # OFW lands us here, running in protected mode, with a + # kernel-compatible GDT already setup. + + # Clear any dangerous flags + pushl $0 + popfl + + writepost 0x31 + + # Set up %cr3 + movl $initial_page_table - __PAGE_OFFSET, %eax + movl %eax, %cr3 + + movl saved_cr4, %eax + movl %eax, %cr4 + + movl saved_cr0, %eax + movl %eax, %cr0 + + # Control registers were modified, pipeline resync is needed + jmp 1f +1: + + movw $__KERNEL_DS, %ax + movw %ax, %ss + movw %ax, %ds + movw %ax, %es + movw %ax, %fs + movw %ax, %gs + + lgdt saved_gdt + lidt saved_idt + lldt saved_ldt + ljmp $(__KERNEL_CS),$1f +1: + movl %cr3, %eax + movl %eax, %cr3 + wbinvd + + # Go back to the return point + jmp ret_point + +save_registers: + sgdt saved_gdt + sidt saved_idt + sldt saved_ldt + + pushl %edx + movl %cr4, %edx + movl %edx, saved_cr4 + + movl %cr0, %edx + movl %edx, saved_cr0 + + popl %edx + + movl %ebx, saved_context_ebx + movl %ebp, saved_context_ebp + movl %esi, saved_context_esi + movl %edi, saved_context_edi + + pushfl + popl saved_context_eflags + + ret + +restore_registers: + movl saved_context_ebp, %ebp + movl saved_context_ebx, %ebx + movl saved_context_esi, %esi + movl saved_context_edi, %edi + + pushl saved_context_eflags + popfl + + ret + +ENTRY(do_olpc_suspend_lowlevel) + call save_processor_state + call save_registers + + # This is the stack context we want to remember + movl %esp, saved_context_esp + + pushl $3 + call xo1_do_sleep + + jmp wakeup_start + .p2align 4,,7 +ret_point: + movl saved_context_esp, %esp + + writepost 0x32 + + call restore_registers + call restore_processor_state + ret + +.data +saved_gdt: .long 0,0 +saved_idt: .long 0,0 +saved_ldt: .long 0 +saved_cr4: .long 0 +saved_cr0: .long 0 +saved_context_esp: .long 0 +saved_context_edi: .long 0 +saved_context_esi: .long 0 +saved_context_ebx: .long 0 +saved_context_ebp: .long 0 +saved_context_eflags: .long 0 diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index e46b8b0..2facf16 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -70,6 +70,9 @@ #define CS5536_PM1_CNT 0x08 #define CS5536_PM_GPE0_STS 0x18 +/* CS5536_PM1_EN bits */ +#define CS5536_PM_PWRBTN (1 << 8) + /* VSA2 magic values */ #define VSA_VRC_INDEX 0xAC1C #define VSA_VRC_DATA 0xAC1E -- cgit v0.10.2 From 7feda8e9f35ebb0e9f90e03acb02280bc137f784 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:12 +0100 Subject: x86, olpc: Add XO-1 SCI driver and power button control The System Control Interrupt is used in the OLPC XO-1 to control various features of the laptop. Add the driver base and the power button functionality. This driver can't be built as a module, because functionality added in future patches means that some drivers need to know at boot-time whether SCI-based functionality is available. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-6-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f473151..66b7b9d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2080,6 +2080,15 @@ config OLPC_XO1_PM ---help--- Add support for poweroff and suspend of the OLPC XO-1 laptop. +config OLPC_XO1_SCI + bool "OLPC XO-1 SCI extras" + depends on OLPC && OLPC_XO1_PM + select GPIO_CS5535 + select MFD_CORE + ---help--- + Add support for SCI-based features of the OLPC XO-1 laptop: + - Power button + endif # X86_32 config AMD_NB diff --git a/arch/x86/platform/olpc/Makefile b/arch/x86/platform/olpc/Makefile index 1ae7bed..1ec5ade 100644 --- a/arch/x86/platform/olpc/Makefile +++ b/arch/x86/platform/olpc/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_OLPC) += olpc.o olpc_ofw.o olpc_dt.o obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o xo1-wakeup.o +obj-$(CONFIG_OLPC_XO1_SCI) += olpc-xo1-sci.o diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c new file mode 100644 index 0000000..8fbf961 --- /dev/null +++ b/arch/x86/platform/olpc/olpc-xo1-sci.c @@ -0,0 +1,191 @@ +/* + * Support for OLPC XO-1 System Control Interrupts (SCI) + * + * Copyright (C) 2010 One Laptop per Child + * Copyright (C) 2006 Red Hat, Inc. + * Copyright (C) 2006 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DRV_NAME "olpc-xo1-sci" +#define PFX DRV_NAME ": " + +static unsigned long acpi_base; +static struct input_dev *power_button_idev; +static int sci_irq; + +static irqreturn_t xo1_sci_intr(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + u32 sts; + u32 gpe; + + sts = inl(acpi_base + CS5536_PM1_STS); + outl(sts | 0xffff, acpi_base + CS5536_PM1_STS); + + gpe = inl(acpi_base + CS5536_PM_GPE0_STS); + outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); + + dev_dbg(&pdev->dev, "sts %x gpe %x\n", sts, gpe); + + if (sts & CS5536_PWRBTN_FLAG && !(sts & CS5536_WAK_FLAG)) { + input_report_key(power_button_idev, KEY_POWER, 1); + input_sync(power_button_idev); + input_report_key(power_button_idev, KEY_POWER, 0); + input_sync(power_button_idev); + } + + return IRQ_HANDLED; +} + +static int xo1_sci_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (device_may_wakeup(&power_button_idev->dev)) + olpc_xo1_pm_wakeup_set(CS5536_PM_PWRBTN); + else + olpc_xo1_pm_wakeup_clear(CS5536_PM_PWRBTN); + return 0; +} + +static int __devinit setup_sci_interrupt(struct platform_device *pdev) +{ + u32 lo, hi; + u32 sts; + int r; + + rdmsr(0x51400020, lo, hi); + sci_irq = (lo >> 20) & 15; + + if (sci_irq) { + dev_info(&pdev->dev, "SCI is mapped to IRQ %d\n", sci_irq); + } else { + /* Zero means masked */ + dev_info(&pdev->dev, "SCI unmapped. Mapping to IRQ 3\n"); + sci_irq = 3; + lo |= 0x00300000; + wrmsrl(0x51400020, lo); + } + + /* Select level triggered in PIC */ + if (sci_irq < 8) { + lo = inb(CS5536_PIC_INT_SEL1); + lo |= 1 << sci_irq; + outb(lo, CS5536_PIC_INT_SEL1); + } else { + lo = inb(CS5536_PIC_INT_SEL2); + lo |= 1 << (sci_irq - 8); + outb(lo, CS5536_PIC_INT_SEL2); + } + + /* Enable SCI from power button, and clear pending interrupts */ + sts = inl(acpi_base + CS5536_PM1_STS); + outl((CS5536_PM_PWRBTN << 16) | 0xffff, acpi_base + CS5536_PM1_STS); + + r = request_irq(sci_irq, xo1_sci_intr, 0, DRV_NAME, pdev); + if (r) + dev_err(&pdev->dev, "can't request interrupt\n"); + + return r; +} + +static int __devinit setup_power_button(struct platform_device *pdev) +{ + int r; + + power_button_idev = input_allocate_device(); + if (!power_button_idev) + return -ENOMEM; + + power_button_idev->name = "Power Button"; + power_button_idev->phys = DRV_NAME "/input0"; + set_bit(EV_KEY, power_button_idev->evbit); + set_bit(KEY_POWER, power_button_idev->keybit); + + power_button_idev->dev.parent = &pdev->dev; + device_init_wakeup(&power_button_idev->dev, 1); + + r = input_register_device(power_button_idev); + if (r) { + dev_err(&pdev->dev, "failed to register power button: %d\n", r); + input_free_device(power_button_idev); + } + + return r; +} + +static void free_power_button(void) +{ + input_unregister_device(power_button_idev); + input_free_device(power_button_idev); +} + +static int __devinit xo1_sci_probe(struct platform_device *pdev) +{ + struct resource *res; + int r; + + /* don't run on non-XOs */ + if (!machine_is_olpc()) + return -ENODEV; + + r = mfd_cell_enable(pdev); + if (r) + return r; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (!res) { + dev_err(&pdev->dev, "can't fetch device resource info\n"); + return -EIO; + } + acpi_base = res->start; + + r = setup_power_button(pdev); + if (r) + return r; + + r = setup_sci_interrupt(pdev); + if (r) + free_power_button(); + + return r; +} + +static int __devexit xo1_sci_remove(struct platform_device *pdev) +{ + mfd_cell_disable(pdev); + free_irq(sci_irq, pdev); + free_power_button(); + acpi_base = 0; + return 0; +} + +static struct platform_driver xo1_sci_driver = { + .driver = { + .name = "olpc-xo1-sci-acpi", + }, + .probe = xo1_sci_probe, + .remove = __devexit_p(xo1_sci_remove), + .suspend = xo1_sci_suspend, +}; + +static int __init xo1_sci_init(void) +{ + return platform_driver_register(&xo1_sci_driver); +} +arch_initcall(xo1_sci_init); diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index 2facf16..6f78235 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -43,6 +43,10 @@ #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 #define MSR_GX_MSR_PADSEL 0xC0002011 +/* PIC registers */ +#define CS5536_PIC_INT_SEL1 0x4d0 +#define CS5536_PIC_INT_SEL2 0x4d1 + /* resource sizes */ #define LBAR_GPIO_SIZE 0xFF #define LBAR_MFGPT_SIZE 0x40 @@ -70,6 +74,10 @@ #define CS5536_PM1_CNT 0x08 #define CS5536_PM_GPE0_STS 0x18 +/* CS5536_PM1_STS bits */ +#define CS5536_WAK_FLAG (1 << 15) +#define CS5536_PWRBTN_FLAG (1 << 8) + /* CS5536_PM1_EN bits */ #define CS5536_PM_PWRBTN (1 << 8) -- cgit v0.10.2 From bc4ecd5a5efc2435e6debfb7b279a15ae96697fd Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:13 +0100 Subject: x86, olpc: EC SCI wakeup mask functionality Update the EC SCI masks with recent additions. Add functions to query SCI events and set the wakeup mask, to be used by followup patches. Add functions to tweak an event mask used to select certain EC events as a system wakeup source. Also add a function to determine if EC wakeup functionality is available, as this depends on child drivers (different for each laptop model) to configure the SCI interrupt. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-7-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/include/asm/olpc.h b/arch/x86/include/asm/olpc.h index 10ea595..0e56d01 100644 --- a/arch/x86/include/asm/olpc.h +++ b/arch/x86/include/asm/olpc.h @@ -13,6 +13,7 @@ struct olpc_platform_t { #define OLPC_F_PRESENT 0x01 #define OLPC_F_DCON 0x02 +#define OLPC_F_EC_WIDE_SCI 0x04 #ifdef CONFIG_OLPC @@ -62,6 +63,13 @@ static inline int olpc_board_at_least(uint32_t rev) return olpc_platform_info.boardrev >= rev; } +extern void olpc_ec_wakeup_set(u16 value); +extern void olpc_ec_wakeup_clear(u16 value); +extern bool olpc_ec_wakeup_available(void); + +extern int olpc_ec_mask_write(u16 bits); +extern int olpc_ec_sci_query(u16 *sci_value); + #else static inline int machine_is_olpc(void) @@ -74,6 +82,14 @@ static inline int olpc_has_dcon(void) return 0; } +static inline void olpc_ec_wakeup_set(u16 value) { } +static inline void olpc_ec_wakeup_clear(u16 value) { } + +static inline bool olpc_ec_wakeup_available(void) +{ + return false; +} + #endif #ifdef CONFIG_OLPC_XO1_PM @@ -89,17 +105,18 @@ extern int pci_olpc_init(void); extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen, unsigned char *outbuf, size_t outlen); -extern int olpc_ec_mask_set(uint8_t bits); -extern int olpc_ec_mask_unset(uint8_t bits); - /* EC commands */ #define EC_FIRMWARE_REV 0x08 +#define EC_WRITE_SCI_MASK 0x1b #define EC_WAKE_UP_WLAN 0x24 #define EC_WLAN_LEAVE_RESET 0x25 #define EC_SET_SCI_INHIBIT 0x32 #define EC_SET_SCI_INHIBIT_RELEASE 0x34 #define EC_WLAN_ENTER_RESET 0x35 +#define EC_WRITE_EXT_SCI_MASK 0x38 +#define EC_SCI_QUERY 0x84 +#define EC_EXT_SCI_QUERY 0x85 /* SCI source values */ @@ -108,10 +125,12 @@ extern int olpc_ec_mask_unset(uint8_t bits); #define EC_SCI_SRC_BATTERY 0x02 #define EC_SCI_SRC_BATSOC 0x04 #define EC_SCI_SRC_BATERR 0x08 -#define EC_SCI_SRC_EBOOK 0x10 -#define EC_SCI_SRC_WLAN 0x20 +#define EC_SCI_SRC_EBOOK 0x10 /* XO-1 only */ +#define EC_SCI_SRC_WLAN 0x20 /* XO-1 only */ #define EC_SCI_SRC_ACPWR 0x40 -#define EC_SCI_SRC_ALL 0x7F +#define EC_SCI_SRC_BATCRIT 0x80 +#define EC_SCI_SRC_GPWAKE 0x100 /* XO-1.5 only */ +#define EC_SCI_SRC_ALL 0x1FF /* GPIO assignments */ diff --git a/arch/x86/platform/olpc/olpc.c b/arch/x86/platform/olpc/olpc.c index 0060fd5..72fd041 100644 --- a/arch/x86/platform/olpc/olpc.c +++ b/arch/x86/platform/olpc/olpc.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,9 @@ EXPORT_SYMBOL_GPL(olpc_platform_info); static DEFINE_SPINLOCK(ec_lock); +/* EC event mask to be applied during suspend (defining wakeup sources). */ +static u16 ec_wakeup_mask; + /* what the timeout *should* be (in ms) */ #define EC_BASE_TIMEOUT 20 @@ -188,6 +192,79 @@ err: } EXPORT_SYMBOL_GPL(olpc_ec_cmd); +void olpc_ec_wakeup_set(u16 value) +{ + ec_wakeup_mask |= value; +} +EXPORT_SYMBOL_GPL(olpc_ec_wakeup_set); + +void olpc_ec_wakeup_clear(u16 value) +{ + ec_wakeup_mask &= ~value; +} +EXPORT_SYMBOL_GPL(olpc_ec_wakeup_clear); + +/* + * Returns true if the compile and runtime configurations allow for EC events + * to wake the system. + */ +bool olpc_ec_wakeup_available(void) +{ + if (!machine_is_olpc()) + return false; + + /* + * XO-1 EC wakeups are available when olpc-xo1-sci driver is + * compiled in + */ +#ifdef CONFIG_OLPC_XO1_SCI + if (olpc_platform_info.boardrev < olpc_board_pre(0xd0)) /* XO-1 */ + return true; +#endif + + return false; +} +EXPORT_SYMBOL_GPL(olpc_ec_wakeup_available); + +int olpc_ec_mask_write(u16 bits) +{ + if (olpc_platform_info.flags & OLPC_F_EC_WIDE_SCI) { + __be16 ec_word = cpu_to_be16(bits); + return olpc_ec_cmd(EC_WRITE_EXT_SCI_MASK, (void *) &ec_word, 2, + NULL, 0); + } else { + unsigned char ec_byte = bits & 0xff; + return olpc_ec_cmd(EC_WRITE_SCI_MASK, &ec_byte, 1, NULL, 0); + } +} +EXPORT_SYMBOL_GPL(olpc_ec_mask_write); + +int olpc_ec_sci_query(u16 *sci_value) +{ + int ret; + + if (olpc_platform_info.flags & OLPC_F_EC_WIDE_SCI) { + __be16 ec_word; + ret = olpc_ec_cmd(EC_EXT_SCI_QUERY, + NULL, 0, (void *) &ec_word, 2); + if (ret == 0) + *sci_value = be16_to_cpu(ec_word); + } else { + unsigned char ec_byte; + ret = olpc_ec_cmd(EC_SCI_QUERY, NULL, 0, &ec_byte, 1); + if (ret == 0) + *sci_value = ec_byte; + } + + return ret; +} +EXPORT_SYMBOL_GPL(olpc_ec_sci_query); + +static int olpc_ec_suspend(void) +{ + return olpc_ec_mask_write(ec_wakeup_mask); +} + static bool __init check_ofw_architecture(struct device_node *root) { const char *olpc_arch; @@ -242,6 +319,10 @@ static int __init add_xo1_platform_devices(void) return 0; } +static struct syscore_ops olpc_syscore_ops = { + .suspend = olpc_ec_suspend, +}; + static int __init olpc_init(void) { int r = 0; @@ -266,6 +347,9 @@ static int __init olpc_init(void) !cs5535_has_vsa2()) x86_init.pci.arch_init = pci_olpc_init; #endif + /* EC version 0x5f adds support for wide SCI mask */ + if (olpc_platform_info.ecver >= 0x5f) + olpc_platform_info.flags |= OLPC_F_EC_WIDE_SCI; printk(KERN_INFO "OLPC board revision %s%X (EC=%x)\n", ((olpc_platform_info.boardrev & 0xf) < 8) ? "pre" : "", @@ -278,6 +362,8 @@ static int __init olpc_init(void) return r; } + register_syscore_ops(&olpc_syscore_ops); + return 0; } -- cgit v0.10.2 From 7bc74b3df73776fe06f3df9fafd2d2698e6ca28a Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:14 +0100 Subject: x86, olpc-xo1-sci: Add GPE handler and ebook switch functionality The EC in the OLPC XO-1 delivers GPE events to provide various notifications. Add the basic code for GPE/EC event processing and enable the ebook switch, which can be used as a wakeup source. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-8-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 66b7b9d..8888910 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2087,7 +2087,9 @@ config OLPC_XO1_SCI select MFD_CORE ---help--- Add support for SCI-based features of the OLPC XO-1 laptop: + - EC-driven system wakeups - Power button + - Ebook switch endif # X86_32 diff --git a/arch/x86/include/asm/olpc.h b/arch/x86/include/asm/olpc.h index 0e56d01..87bdbca 100644 --- a/arch/x86/include/asm/olpc.h +++ b/arch/x86/include/asm/olpc.h @@ -111,6 +111,7 @@ extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen, #define EC_WRITE_SCI_MASK 0x1b #define EC_WAKE_UP_WLAN 0x24 #define EC_WLAN_LEAVE_RESET 0x25 +#define EC_READ_EB_MODE 0x2a #define EC_SET_SCI_INHIBIT 0x32 #define EC_SET_SCI_INHIBIT_RELEASE 0x34 #define EC_WLAN_ENTER_RESET 0x35 @@ -144,7 +145,7 @@ extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen, #define OLPC_GPIO_SMB_CLK 14 #define OLPC_GPIO_SMB_DATA 15 #define OLPC_GPIO_WORKAUX geode_gpio(24) -#define OLPC_GPIO_LID geode_gpio(26) -#define OLPC_GPIO_ECSCI geode_gpio(27) +#define OLPC_GPIO_LID 26 +#define OLPC_GPIO_ECSCI 27 #endif /* _ASM_X86_OLPC_H */ diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c index 8fbf961..63f5050 100644 --- a/arch/x86/platform/olpc/olpc-xo1-sci.c +++ b/arch/x86/platform/olpc/olpc-xo1-sci.c @@ -12,12 +12,15 @@ */ #include +#include +#include #include #include #include #include #include #include +#include #include #include @@ -28,8 +31,60 @@ static unsigned long acpi_base; static struct input_dev *power_button_idev; +static struct input_dev *ebook_switch_idev; + static int sci_irq; +/* Report current ebook switch state through input layer */ +static void send_ebook_state(void) +{ + unsigned char state; + + if (olpc_ec_cmd(EC_READ_EB_MODE, NULL, 0, &state, 1)) { + pr_err(PFX "failed to get ebook state\n"); + return; + } + + input_report_switch(ebook_switch_idev, SW_TABLET_MODE, state); + input_sync(ebook_switch_idev); +} + +/* + * Process all items in the EC's SCI queue. + * + * This is handled in a workqueue because olpc_ec_cmd can be slow (and + * can even timeout). + * + * If propagate_events is false, the queue is drained without events being + * generated for the interrupts. + */ +static void process_sci_queue(bool propagate_events) +{ + int r; + u16 data; + + do { + r = olpc_ec_sci_query(&data); + if (r || !data) + break; + + pr_debug(PFX "SCI 0x%x received\n", data); + + if (data == EC_SCI_SRC_EBOOK && propagate_events) + send_ebook_state(); + } while (data); + + if (r) + pr_err(PFX "Failed to clear SCI queue"); +} + +static void process_sci_queue_work(struct work_struct *work) +{ + process_sci_queue(true); +} + +static DECLARE_WORK(sci_work, process_sci_queue_work); + static irqreturn_t xo1_sci_intr(int irq, void *dev_id) { struct platform_device *pdev = dev_id; @@ -51,6 +106,11 @@ static irqreturn_t xo1_sci_intr(int irq, void *dev_id) input_sync(power_button_idev); } + if (gpe & CS5536_GPIOM7_PME_FLAG) { /* EC GPIO */ + cs5535_gpio_set(OLPC_GPIO_ECSCI, GPIO_NEGATIVE_EDGE_STS); + schedule_work(&sci_work); + } + return IRQ_HANDLED; } @@ -60,6 +120,19 @@ static int xo1_sci_suspend(struct platform_device *pdev, pm_message_t state) olpc_xo1_pm_wakeup_set(CS5536_PM_PWRBTN); else olpc_xo1_pm_wakeup_clear(CS5536_PM_PWRBTN); + + if (device_may_wakeup(&ebook_switch_idev->dev)) + olpc_ec_wakeup_set(EC_SCI_SRC_EBOOK); + else + olpc_ec_wakeup_clear(EC_SCI_SRC_EBOOK); + + return 0; +} + +static int xo1_sci_resume(struct platform_device *pdev) +{ + /* Enable all EC events */ + olpc_ec_mask_write(EC_SCI_SRC_ALL); return 0; } @@ -104,6 +177,50 @@ static int __devinit setup_sci_interrupt(struct platform_device *pdev) return r; } +static int __devinit setup_ec_sci(void) +{ + int r; + + r = gpio_request(OLPC_GPIO_ECSCI, "OLPC-ECSCI"); + if (r) + return r; + + gpio_direction_input(OLPC_GPIO_ECSCI); + + /* Clear pending EC SCI events */ + cs5535_gpio_set(OLPC_GPIO_ECSCI, GPIO_NEGATIVE_EDGE_STS); + cs5535_gpio_set(OLPC_GPIO_ECSCI, GPIO_POSITIVE_EDGE_STS); + + /* + * Enable EC SCI events, and map them to both a PME and the SCI + * interrupt. + * + * Ordinarily, in addition to functioning as GPIOs, Geode GPIOs can + * be mapped to regular interrupts *or* Geode-specific Power + * Management Events (PMEs) - events that bring the system out of + * suspend. In this case, we want both of those things - the system + * wakeup, *and* the ability to get an interrupt when an event occurs. + * + * To achieve this, we map the GPIO to a PME, and then we use one + * of the many generic knobs on the CS5535 PIC to additionally map the + * PME to the regular SCI interrupt line. + */ + cs5535_gpio_set(OLPC_GPIO_ECSCI, GPIO_EVENTS_ENABLE); + + /* Set the SCI to cause a PME event on group 7 */ + cs5535_gpio_setup_event(OLPC_GPIO_ECSCI, 7, 1); + + /* And have group 7 also fire the SCI interrupt */ + cs5535_pic_unreqz_select_high(7, sci_irq); + + return 0; +} + +static void free_ec_sci(void) +{ + gpio_free(OLPC_GPIO_ECSCI); +} + static int __devinit setup_power_button(struct platform_device *pdev) { int r; @@ -135,6 +252,37 @@ static void free_power_button(void) input_free_device(power_button_idev); } +static int __devinit setup_ebook_switch(struct platform_device *pdev) +{ + int r; + + ebook_switch_idev = input_allocate_device(); + if (!ebook_switch_idev) + return -ENOMEM; + + ebook_switch_idev->name = "EBook Switch"; + ebook_switch_idev->phys = DRV_NAME "/input1"; + set_bit(EV_SW, ebook_switch_idev->evbit); + set_bit(SW_TABLET_MODE, ebook_switch_idev->swbit); + + ebook_switch_idev->dev.parent = &pdev->dev; + device_set_wakeup_capable(&ebook_switch_idev->dev, true); + + r = input_register_device(ebook_switch_idev); + if (r) { + dev_err(&pdev->dev, "failed to register ebook switch: %d\n", r); + input_free_device(ebook_switch_idev); + } + + return r; +} + +static void free_ebook_switch(void) +{ + input_unregister_device(ebook_switch_idev); + input_free_device(ebook_switch_idev); +} + static int __devinit xo1_sci_probe(struct platform_device *pdev) { struct resource *res; @@ -159,10 +307,39 @@ static int __devinit xo1_sci_probe(struct platform_device *pdev) if (r) return r; + r = setup_ebook_switch(pdev); + if (r) + goto err_ebook; + + r = setup_ec_sci(); + if (r) + goto err_ecsci; + + /* Enable PME generation for EC-generated events */ + outl(CS5536_GPIOM7_PME_EN, acpi_base + CS5536_PM_GPE0_EN); + + /* Clear pending events */ + outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); + process_sci_queue(false); + + /* Initial sync */ + send_ebook_state(); + r = setup_sci_interrupt(pdev); if (r) - free_power_button(); + goto err_sci; + /* Enable all EC events */ + olpc_ec_mask_write(EC_SCI_SRC_ALL); + + return r; + +err_sci: + free_ec_sci(); +err_ecsci: + free_ebook_switch(); +err_ebook: + free_power_button(); return r; } @@ -170,6 +347,9 @@ static int __devexit xo1_sci_remove(struct platform_device *pdev) { mfd_cell_disable(pdev); free_irq(sci_irq, pdev); + cancel_work_sync(&sci_work); + free_ec_sci(); + free_ebook_switch(); free_power_button(); acpi_base = 0; return 0; @@ -182,6 +362,7 @@ static struct platform_driver xo1_sci_driver = { .probe = xo1_sci_probe, .remove = __devexit_p(xo1_sci_remove), .suspend = xo1_sci_suspend, + .resume = xo1_sci_resume, }; static int __init xo1_sci_init(void) diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index 6f78235..d7e9a7f 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -11,6 +11,8 @@ #ifndef _CS5535_H #define _CS5535_H +#include + /* MSRs */ #define MSR_GLIU_P2D_RO0 0x10000029 @@ -43,6 +45,18 @@ #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 #define MSR_GX_MSR_PADSEL 0xC0002011 +static inline int cs5535_pic_unreqz_select_high(unsigned int group, + unsigned int irq) +{ + uint32_t lo, hi; + + rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi); + lo &= ~(0xF << (group * 4)); + lo |= (irq & 0xF) << (group * 4); + wrmsr(MSR_PIC_ZSEL_HIGH, lo, hi); + return 0; +} + /* PIC registers */ #define CS5536_PIC_INT_SEL1 0x4d0 #define CS5536_PIC_INT_SEL2 0x4d1 @@ -73,6 +87,7 @@ #define CS5536_PM1_EN 0x02 #define CS5536_PM1_CNT 0x08 #define CS5536_PM_GPE0_STS 0x18 +#define CS5536_PM_GPE0_EN 0x1c /* CS5536_PM1_STS bits */ #define CS5536_WAK_FLAG (1 << 15) @@ -81,6 +96,13 @@ /* CS5536_PM1_EN bits */ #define CS5536_PM_PWRBTN (1 << 8) +/* CS5536_PM_GPE0_STS bits */ +#define CS5536_GPIOM7_PME_FLAG (1 << 31) +#define CS5536_GPIOM6_PME_FLAG (1 << 30) + +/* CS5536_PM_GPE0_EN bits */ +#define CS5536_GPIOM7_PME_EN (1 << 31) + /* VSA2 magic values */ #define VSA_VRC_INDEX 0xAC1C #define VSA_VRC_DATA 0xAC1E -- cgit v0.10.2 From 2cf2baea103f0a3d68b0f989d28df66f16dbc834 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:15 +0100 Subject: x86, olpc-xo1-sci: Add lid switch functionality Configure the XO-1's lid switch GPIO to trigger an SCI interrupt, and correctly expose this input device which can be used as a wakeup source. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-9-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 8888910..350ccbb 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2090,6 +2090,7 @@ config OLPC_XO1_SCI - EC-driven system wakeups - Power button - Ebook switch + - Lid switch endif # X86_32 diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c index 63f5050..ad0670b 100644 --- a/arch/x86/platform/olpc/olpc-xo1-sci.c +++ b/arch/x86/platform/olpc/olpc-xo1-sci.c @@ -32,9 +32,26 @@ static unsigned long acpi_base; static struct input_dev *power_button_idev; static struct input_dev *ebook_switch_idev; +static struct input_dev *lid_switch_idev; static int sci_irq; +static bool lid_open; +static bool lid_inverted; +static int lid_wake_mode; + +enum lid_wake_modes { + LID_WAKE_ALWAYS, + LID_WAKE_OPEN, + LID_WAKE_CLOSE, +}; + +static const char * const lid_wake_mode_names[] = { + [LID_WAKE_ALWAYS] = "always", + [LID_WAKE_OPEN] = "open", + [LID_WAKE_CLOSE] = "close", +}; + /* Report current ebook switch state through input layer */ static void send_ebook_state(void) { @@ -49,6 +66,70 @@ static void send_ebook_state(void) input_sync(ebook_switch_idev); } +static void flip_lid_inverter(void) +{ + /* gpio is high; invert so we'll get l->h event interrupt */ + if (lid_inverted) + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_INPUT_INVERT); + else + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_INPUT_INVERT); + lid_inverted = !lid_inverted; +} + +static void detect_lid_state(void) +{ + /* + * the edge detector hookup on the gpio inputs on the geode is + * odd, to say the least. See http://dev.laptop.org/ticket/5703 + * for details, but in a nutshell: we don't use the edge + * detectors. instead, we make use of an anomoly: with the both + * edge detectors turned off, we still get an edge event on a + * positive edge transition. to take advantage of this, we use the + * front-end inverter to ensure that that's the edge we're always + * going to see next. + */ + + int state; + + state = cs5535_gpio_isset(OLPC_GPIO_LID, GPIO_READ_BACK); + lid_open = !state ^ !lid_inverted; /* x ^^ y */ + if (!state) + return; + + flip_lid_inverter(); +} + +/* Report current lid switch state through input layer */ +static void send_lid_state(void) +{ + input_report_switch(lid_switch_idev, SW_LID, !lid_open); + input_sync(lid_switch_idev); +} + +static ssize_t lid_wake_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + const char *mode = lid_wake_mode_names[lid_wake_mode]; + return sprintf(buf, "%s\n", mode); +} +static ssize_t lid_wake_mode_set(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int i; + for (i = 0; i < ARRAY_SIZE(lid_wake_mode_names); i++) { + const char *mode = lid_wake_mode_names[i]; + if (strlen(mode) != count || strncasecmp(mode, buf, count)) + continue; + + lid_wake_mode = i; + return count; + } + return -EINVAL; +} +static DEVICE_ATTR(lid_wake_mode, S_IWUSR | S_IRUGO, lid_wake_mode_show, + lid_wake_mode_set); + /* * Process all items in the EC's SCI queue. * @@ -111,6 +192,11 @@ static irqreturn_t xo1_sci_intr(int irq, void *dev_id) schedule_work(&sci_work); } + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_NEGATIVE_EDGE_STS); + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_POSITIVE_EDGE_STS); + detect_lid_state(); + send_lid_state(); + return IRQ_HANDLED; } @@ -126,11 +212,32 @@ static int xo1_sci_suspend(struct platform_device *pdev, pm_message_t state) else olpc_ec_wakeup_clear(EC_SCI_SRC_EBOOK); + if (!device_may_wakeup(&lid_switch_idev->dev)) { + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_EVENTS_ENABLE); + } else if ((lid_open && lid_wake_mode == LID_WAKE_OPEN) || + (!lid_open && lid_wake_mode == LID_WAKE_CLOSE)) { + flip_lid_inverter(); + + /* we may have just caused an event */ + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_NEGATIVE_EDGE_STS); + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_POSITIVE_EDGE_STS); + + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_EVENTS_ENABLE); + } + return 0; } static int xo1_sci_resume(struct platform_device *pdev) { + /* + * We don't know what may have happened while we were asleep. + * Reestablish our lid setup so we're sure to catch all transitions. + */ + detect_lid_state(); + send_lid_state(); + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_EVENTS_ENABLE); + /* Enable all EC events */ olpc_ec_mask_write(EC_SCI_SRC_ALL); return 0; @@ -221,6 +328,43 @@ static void free_ec_sci(void) gpio_free(OLPC_GPIO_ECSCI); } +static int __devinit setup_lid_events(void) +{ + int r; + + r = gpio_request(OLPC_GPIO_LID, "OLPC-LID"); + if (r) + return r; + + gpio_direction_input(OLPC_GPIO_LID); + + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_INPUT_INVERT); + lid_inverted = 0; + + /* Clear edge detection and event enable for now */ + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_EVENTS_ENABLE); + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_NEGATIVE_EDGE_EN); + cs5535_gpio_clear(OLPC_GPIO_LID, GPIO_POSITIVE_EDGE_EN); + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_NEGATIVE_EDGE_STS); + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_POSITIVE_EDGE_STS); + + /* Set the LID to cause an PME event on group 6 */ + cs5535_gpio_setup_event(OLPC_GPIO_LID, 6, 1); + + /* Set PME group 6 to fire the SCI interrupt */ + cs5535_gpio_set_irq(6, sci_irq); + + /* Enable the event */ + cs5535_gpio_set(OLPC_GPIO_LID, GPIO_EVENTS_ENABLE); + + return 0; +} + +static void free_lid_events(void) +{ + gpio_free(OLPC_GPIO_LID); +} + static int __devinit setup_power_button(struct platform_device *pdev) { int r; @@ -283,6 +427,50 @@ static void free_ebook_switch(void) input_free_device(ebook_switch_idev); } +static int __devinit setup_lid_switch(struct platform_device *pdev) +{ + int r; + + lid_switch_idev = input_allocate_device(); + if (!lid_switch_idev) + return -ENOMEM; + + lid_switch_idev->name = "Lid Switch"; + lid_switch_idev->phys = DRV_NAME "/input2"; + set_bit(EV_SW, lid_switch_idev->evbit); + set_bit(SW_LID, lid_switch_idev->swbit); + + lid_switch_idev->dev.parent = &pdev->dev; + device_set_wakeup_capable(&lid_switch_idev->dev, true); + + r = input_register_device(lid_switch_idev); + if (r) { + dev_err(&pdev->dev, "failed to register lid switch: %d\n", r); + goto err_register; + } + + r = device_create_file(&lid_switch_idev->dev, &dev_attr_lid_wake_mode); + if (r) { + dev_err(&pdev->dev, "failed to create wake mode attr: %d\n", r); + goto err_create_attr; + } + + return 0; + +err_create_attr: + input_unregister_device(lid_switch_idev); +err_register: + input_free_device(lid_switch_idev); + return r; +} + +static void free_lid_switch(void) +{ + device_remove_file(&lid_switch_idev->dev, &dev_attr_lid_wake_mode); + input_unregister_device(lid_switch_idev); + input_free_device(lid_switch_idev); +} + static int __devinit xo1_sci_probe(struct platform_device *pdev) { struct resource *res; @@ -311,12 +499,21 @@ static int __devinit xo1_sci_probe(struct platform_device *pdev) if (r) goto err_ebook; + r = setup_lid_switch(pdev); + if (r) + goto err_lid; + + r = setup_lid_events(); + if (r) + goto err_lidevt; + r = setup_ec_sci(); if (r) goto err_ecsci; /* Enable PME generation for EC-generated events */ - outl(CS5536_GPIOM7_PME_EN, acpi_base + CS5536_PM_GPE0_EN); + outl(CS5536_GPIOM6_PME_EN | CS5536_GPIOM7_PME_EN, + acpi_base + CS5536_PM_GPE0_EN); /* Clear pending events */ outl(0xffffffff, acpi_base + CS5536_PM_GPE0_STS); @@ -324,6 +521,8 @@ static int __devinit xo1_sci_probe(struct platform_device *pdev) /* Initial sync */ send_ebook_state(); + detect_lid_state(); + send_lid_state(); r = setup_sci_interrupt(pdev); if (r) @@ -337,6 +536,10 @@ static int __devinit xo1_sci_probe(struct platform_device *pdev) err_sci: free_ec_sci(); err_ecsci: + free_lid_events(); +err_lidevt: + free_lid_switch(); +err_lid: free_ebook_switch(); err_ebook: free_power_button(); @@ -349,6 +552,8 @@ static int __devexit xo1_sci_remove(struct platform_device *pdev) free_irq(sci_irq, pdev); cancel_work_sync(&sci_work); free_ec_sci(); + free_lid_events(); + free_lid_switch(); free_ebook_switch(); free_power_button(); acpi_base = 0; diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index d7e9a7f..72954c6 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -102,6 +102,7 @@ static inline int cs5535_pic_unreqz_select_high(unsigned int group, /* CS5536_PM_GPE0_EN bits */ #define CS5536_GPIOM7_PME_EN (1 << 31) +#define CS5536_GPIOM6_PME_EN (1 << 30) /* VSA2 magic values */ #define VSA_VRC_INDEX 0xAC1C -- cgit v0.10.2 From e1040ac693bac19eaeafbd6c5fd24d9429b5eeb8 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:16 +0100 Subject: x86, olpc-xo1-sci: Propagate power supply/battery events EC events indicate change in AC power connectivity, battery state of charge, battery error, battery presence, etc. Send notifications to the power supply subsystem when changes are detected. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-10-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 350ccbb..a6aefbb 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2082,7 +2082,7 @@ config OLPC_XO1_PM config OLPC_XO1_SCI bool "OLPC XO-1 SCI extras" - depends on OLPC && OLPC_XO1_PM + depends on OLPC && OLPC_XO1_PM && POWER_SUPPLY select GPIO_CS5535 select MFD_CORE ---help--- @@ -2091,6 +2091,8 @@ config OLPC_XO1_SCI - Power button - Ebook switch - Lid switch + - AC adapter status updates + - Battery status updates endif # X86_32 diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c index ad0670b..1d4c783 100644 --- a/arch/x86/platform/olpc/olpc-xo1-sci.c +++ b/arch/x86/platform/olpc/olpc-xo1-sci.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -52,6 +53,26 @@ static const char * const lid_wake_mode_names[] = { [LID_WAKE_CLOSE] = "close", }; +static void battery_status_changed(void) +{ + struct power_supply *psy = power_supply_get_by_name("olpc-battery"); + + if (psy) { + power_supply_changed(psy); + put_device(psy->dev); + } +} + +static void ac_status_changed(void) +{ + struct power_supply *psy = power_supply_get_by_name("olpc-ac"); + + if (psy) { + power_supply_changed(psy); + put_device(psy->dev); + } +} + /* Report current ebook switch state through input layer */ static void send_ebook_state(void) { @@ -151,6 +172,18 @@ static void process_sci_queue(bool propagate_events) pr_debug(PFX "SCI 0x%x received\n", data); + switch (data) { + case EC_SCI_SRC_BATERR: + case EC_SCI_SRC_BATSOC: + case EC_SCI_SRC_BATTERY: + case EC_SCI_SRC_BATCRIT: + battery_status_changed(); + break; + case EC_SCI_SRC_ACPWR: + ac_status_changed(); + break; + } + if (data == EC_SCI_SRC_EBOOK && propagate_events) send_ebook_state(); } while (data); @@ -240,6 +273,10 @@ static int xo1_sci_resume(struct platform_device *pdev) /* Enable all EC events */ olpc_ec_mask_write(EC_SCI_SRC_ALL); + + /* Power/battery status might have changed too */ + battery_status_changed(); + ac_status_changed(); return 0; } -- cgit v0.10.2 From cfee95977bea090ae5ec4fd442ebd381792d46c4 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:17 +0100 Subject: x86, olpc: Add XO-1 RTC driver Add a driver to configure the XO-1 RTC via CS5536 MSRs, to be used as a system wakeup source via olpc-xo1-pm. Device detection is based on finding the relevant device tree node. Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-11-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Acked-by: Grant Likely Reviewed-by: Sebastian Andrzej Siewior Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: H. Peter Anvin diff --git a/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt b/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt new file mode 100644 index 0000000..a2891ce --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt @@ -0,0 +1,5 @@ +OLPC XO-1 RTC +~~~~~~~~~~~~~ + +Required properties: + - compatible : "olpc,xo1-rtc" diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a6aefbb..0a9d573 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2080,6 +2080,13 @@ config OLPC_XO1_PM ---help--- Add support for poweroff and suspend of the OLPC XO-1 laptop. +config OLPC_XO1_RTC + bool "OLPC XO-1 Real Time Clock" + depends on OLPC_XO1_PM && RTC_DRV_CMOS + ---help--- + Add support for the XO-1 real time clock, which can be used as a + programmable wakeup source. + config OLPC_XO1_SCI bool "OLPC XO-1 SCI extras" depends on OLPC && OLPC_XO1_PM && POWER_SUPPLY diff --git a/arch/x86/platform/olpc/Makefile b/arch/x86/platform/olpc/Makefile index 1ec5ade..8922b9b 100644 --- a/arch/x86/platform/olpc/Makefile +++ b/arch/x86/platform/olpc/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_OLPC) += olpc.o olpc_ofw.o olpc_dt.o obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o xo1-wakeup.o +obj-$(CONFIG_OLPC_XO1_RTC) += olpc-xo1-rtc.o obj-$(CONFIG_OLPC_XO1_SCI) += olpc-xo1-sci.o diff --git a/arch/x86/platform/olpc/olpc-xo1-rtc.c b/arch/x86/platform/olpc/olpc-xo1-rtc.c new file mode 100644 index 0000000..a2b4efd --- /dev/null +++ b/arch/x86/platform/olpc/olpc-xo1-rtc.c @@ -0,0 +1,81 @@ +/* + * Support for OLPC XO-1 Real Time Clock (RTC) + * + * Copyright (C) 2011 One Laptop per Child + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include +#include + +static void rtc_wake_on(struct device *dev) +{ + olpc_xo1_pm_wakeup_set(CS5536_PM_RTC); +} + +static void rtc_wake_off(struct device *dev) +{ + olpc_xo1_pm_wakeup_clear(CS5536_PM_RTC); +} + +static struct resource rtc_platform_resource[] = { + [0] = { + .start = RTC_PORT(0), + .end = RTC_PORT(1), + .flags = IORESOURCE_IO, + }, + [1] = { + .start = RTC_IRQ, + .end = RTC_IRQ, + .flags = IORESOURCE_IRQ, + } +}; + +static struct cmos_rtc_board_info rtc_info = { + .rtc_day_alarm = 0, + .rtc_mon_alarm = 0, + .rtc_century = 0, + .wake_on = rtc_wake_on, + .wake_off = rtc_wake_off, +}; + +static struct platform_device xo1_rtc_device = { + .name = "rtc_cmos", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_platform_resource), + .dev.platform_data = &rtc_info, + .resource = rtc_platform_resource, +}; + +static int __init xo1_rtc_init(void) +{ + int r; + struct device_node *node; + + node = of_find_compatible_node(NULL, NULL, "olpc,xo1-rtc"); + if (!node) + return 0; + of_node_put(node); + + pr_info("olpc-xo1-rtc: Initializing OLPC XO-1 RTC\n"); + rdmsrl(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm); + rdmsrl(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm); + rdmsrl(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century); + + r = platform_device_register(&xo1_rtc_device); + if (r) + return r; + + device_init_wakeup(&xo1_rtc_device.dev, 1); + return 0; +} +arch_initcall(xo1_rtc_init); diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index 72954c6..c077aec 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h @@ -40,6 +40,10 @@ #define MSR_MFGPT_NR 0x51400029 #define MSR_MFGPT_SETUP 0x5140002B +#define MSR_RTC_DOMA_OFFSET 0x51400055 +#define MSR_RTC_MONA_OFFSET 0x51400056 +#define MSR_RTC_CEN_OFFSET 0x51400057 + #define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */ #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 @@ -95,6 +99,7 @@ static inline int cs5535_pic_unreqz_select_high(unsigned int group, /* CS5536_PM1_EN bits */ #define CS5536_PM_PWRBTN (1 << 8) +#define CS5536_PM_RTC (1 << 10) /* CS5536_PM_GPE0_STS bits */ #define CS5536_GPIOM7_PME_FLAG (1 << 31) -- cgit v0.10.2 From a0f30f592d2d81e28f3ed7fea7f03246b0d55b75 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Sat, 25 Jun 2011 17:34:18 +0100 Subject: x86, olpc: Add XO-1.5 SCI driver Add a driver for the ACPI-based EC event interface found on the OLPC XO-1.5 laptop. This enables notification of battery/AC power events, and enables various devices to be used as wakeup sources through regular ACPI mechanisms. This driver can't be built as a module, because some drivers need to know at boot-time if SCI-based functionality is available via olpc_ec_wakeup_available(). Signed-off-by: Daniel Drake Link: http://lkml.kernel.org/r/1309019658-1712-12-git-send-email-dsd@laptop.org Acked-by: Andres Salomon Signed-off-by: H. Peter Anvin diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 0a9d573..8af5ba8 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2101,6 +2101,15 @@ config OLPC_XO1_SCI - AC adapter status updates - Battery status updates +config OLPC_XO15_SCI + bool "OLPC XO-1.5 SCI extras" + depends on OLPC && ACPI && POWER_SUPPLY + ---help--- + Add support for SCI-based features of the OLPC XO-1.5 laptop: + - EC-driven system wakeups + - AC adapter status updates + - Battery status updates + endif # X86_32 config AMD_NB diff --git a/arch/x86/platform/olpc/Makefile b/arch/x86/platform/olpc/Makefile index 8922b9b..fd332c5 100644 --- a/arch/x86/platform/olpc/Makefile +++ b/arch/x86/platform/olpc/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_OLPC) += olpc.o olpc_ofw.o olpc_dt.o obj-$(CONFIG_OLPC_XO1_PM) += olpc-xo1-pm.o xo1-wakeup.o obj-$(CONFIG_OLPC_XO1_RTC) += olpc-xo1-rtc.o obj-$(CONFIG_OLPC_XO1_SCI) += olpc-xo1-sci.o +obj-$(CONFIG_OLPC_XO15_SCI) += olpc-xo15-sci.o diff --git a/arch/x86/platform/olpc/olpc-xo15-sci.c b/arch/x86/platform/olpc/olpc-xo15-sci.c new file mode 100644 index 0000000..a5990eb --- /dev/null +++ b/arch/x86/platform/olpc/olpc-xo15-sci.c @@ -0,0 +1,168 @@ +/* + * Support for OLPC XO-1.5 System Control Interrupts (SCI) + * + * Copyright (C) 2009-2010 One Laptop per Child + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include +#include +#include + +#define DRV_NAME "olpc-xo15-sci" +#define PFX DRV_NAME ": " +#define XO15_SCI_CLASS DRV_NAME +#define XO15_SCI_DEVICE_NAME "OLPC XO-1.5 SCI" + +static unsigned long xo15_sci_gpe; + +static void battery_status_changed(void) +{ + struct power_supply *psy = power_supply_get_by_name("olpc-battery"); + + if (psy) { + power_supply_changed(psy); + put_device(psy->dev); + } +} + +static void ac_status_changed(void) +{ + struct power_supply *psy = power_supply_get_by_name("olpc-ac"); + + if (psy) { + power_supply_changed(psy); + put_device(psy->dev); + } +} + +static void process_sci_queue(void) +{ + u16 data; + int r; + + do { + r = olpc_ec_sci_query(&data); + if (r || !data) + break; + + pr_debug(PFX "SCI 0x%x received\n", data); + + switch (data) { + case EC_SCI_SRC_BATERR: + case EC_SCI_SRC_BATSOC: + case EC_SCI_SRC_BATTERY: + case EC_SCI_SRC_BATCRIT: + battery_status_changed(); + break; + case EC_SCI_SRC_ACPWR: + ac_status_changed(); + break; + } + } while (data); + + if (r) + pr_err(PFX "Failed to clear SCI queue"); +} + +static void process_sci_queue_work(struct work_struct *work) +{ + process_sci_queue(); +} + +static DECLARE_WORK(sci_work, process_sci_queue_work); + +static u32 xo15_sci_gpe_handler(acpi_handle gpe_device, u32 gpe, void *context) +{ + schedule_work(&sci_work); + return ACPI_INTERRUPT_HANDLED | ACPI_REENABLE_GPE; +} + +static int xo15_sci_add(struct acpi_device *device) +{ + unsigned long long tmp; + acpi_status status; + + if (!device) + return -EINVAL; + + strcpy(acpi_device_name(device), XO15_SCI_DEVICE_NAME); + strcpy(acpi_device_class(device), XO15_SCI_CLASS); + + /* Get GPE bit assignment (EC events). */ + status = acpi_evaluate_integer(device->handle, "_GPE", NULL, &tmp); + if (ACPI_FAILURE(status)) + return -EINVAL; + + xo15_sci_gpe = tmp; + status = acpi_install_gpe_handler(NULL, xo15_sci_gpe, + ACPI_GPE_EDGE_TRIGGERED, + xo15_sci_gpe_handler, device); + if (ACPI_FAILURE(status)) + return -ENODEV; + + dev_info(&device->dev, "Initialized, GPE = 0x%lx\n", xo15_sci_gpe); + + /* Flush queue, and enable all SCI events */ + process_sci_queue(); + olpc_ec_mask_write(EC_SCI_SRC_ALL); + + acpi_enable_gpe(NULL, xo15_sci_gpe); + + /* Enable wake-on-EC */ + if (device->wakeup.flags.valid) + device_set_wakeup_enable(&device->dev, true); + + return 0; +} + +static int xo15_sci_remove(struct acpi_device *device, int type) +{ + acpi_disable_gpe(NULL, xo15_sci_gpe); + acpi_remove_gpe_handler(NULL, xo15_sci_gpe, xo15_sci_gpe_handler); + cancel_work_sync(&sci_work); + return 0; +} + +static int xo15_sci_resume(struct acpi_device *device) +{ + /* Enable all EC events */ + olpc_ec_mask_write(EC_SCI_SRC_ALL); + + /* Power/battery status might have changed */ + battery_status_changed(); + ac_status_changed(); + + return 0; +} + +static const struct acpi_device_id xo15_sci_device_ids[] = { + {"XO15EC", 0}, + {"", 0}, +}; + +static struct acpi_driver xo15_sci_drv = { + .name = DRV_NAME, + .class = XO15_SCI_CLASS, + .ids = xo15_sci_device_ids, + .ops = { + .add = xo15_sci_add, + .remove = xo15_sci_remove, + .resume = xo15_sci_resume, + }, +}; + +static int __init xo15_sci_init(void) +{ + return acpi_bus_register_driver(&xo15_sci_drv); +} +device_initcall(xo15_sci_init); diff --git a/arch/x86/platform/olpc/olpc.c b/arch/x86/platform/olpc/olpc.c index 72fd041..8b9940e 100644 --- a/arch/x86/platform/olpc/olpc.c +++ b/arch/x86/platform/olpc/olpc.c @@ -222,6 +222,15 @@ bool olpc_ec_wakeup_available(void) return true; #endif + /* + * XO-1.5 EC wakeups are available when olpc-xo15-sci driver is + * compiled in + */ +#ifdef CONFIG_OLPC_XO15_SCI + if (olpc_platform_info.boardrev >= olpc_board_pre(0xd0)) /* XO-1.5 */ + return true; +#endif + return false; } EXPORT_SYMBOL_GPL(olpc_ec_wakeup_available); -- cgit v0.10.2 From 8eb26942ae6eea7976273e554ab7c4fb2a128e17 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 6 Jul 2011 16:34:27 -0700 Subject: Staging: msm: delete the driver It doesn't build anymore, no one is working on it, and, according to the developers, there's a different one that is working and in the real part of the kernel already. Acked-by: David Brown Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index a85c11a..3ae60a5 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -118,8 +118,6 @@ source "drivers/staging/cxt1e1/Kconfig" source "drivers/staging/xgifb/Kconfig" -source "drivers/staging/msm/Kconfig" - source "drivers/staging/lirc/Kconfig" source "drivers/staging/easycap/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index c02689c..9290ba1 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -51,7 +51,6 @@ obj-$(CONFIG_VIDEO_DT3155) += dt3155v4l/ obj-$(CONFIG_CRYSTALHD) += crystalhd/ obj-$(CONFIG_CXT1E1) += cxt1e1/ obj-$(CONFIG_FB_XGI) += xgifb/ -obj-$(CONFIG_MSM_STAGING) += msm/ obj-$(CONFIG_EASYCAP) += easycap/ obj-$(CONFIG_SOLO6X10) += solo6x10/ obj-$(CONFIG_TIDSPBRIDGE) += tidspbridge/ diff --git a/drivers/staging/msm/Kconfig b/drivers/staging/msm/Kconfig deleted file mode 100644 index c5309ee..0000000 --- a/drivers/staging/msm/Kconfig +++ /dev/null @@ -1,124 +0,0 @@ -config MSM_STAGING - tristate "MSM Frame Buffer Support" - depends on FB && ARCH_MSM && !FB_MSM - select FB_BACKLIGHT if FB_MSM_BACKLIGHT - select NEW_LEDS - select LEDS_CLASS - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - ---help--- - Support for MSM Framebuffer. - -if MSM_STAGING - -config FB_MSM_LCDC_HW - bool - default n - -choice - prompt "MDP HW version" - default FB_MSM_MDP31 - -config FB_MSM_MDP31 - select FB_MSM_LCDC_HW - bool "MDP HW ver3.1" - ---help--- - Support for MSM MDP HW revision 3.1 - Say Y here if this is msm8x50 variant platform. -endchoice - -config FB_MSM_LCDC - bool - default n - -config FB_MSM_TVOUT - bool - default n - -config FB_MSM_LCDC_PANEL - bool - select FB_MSM_LCDC - default n - -config FB_MSM_LCDC_PRISM_WVGA - bool - select FB_MSM_LCDC_PANEL - default n - -config FB_MSM_LCDC_ST15_WXGA - bool - select FB_MSM_LCDC_PANEL - default n - -choice - prompt "LCD Panel" - default FB_MSM_LCDC_ST15_PANEL - -config FB_MSM_LCDC_PRISM_WVGA_PANEL - depends on FB_MSM_LCDC_HW - bool "LCDC Prism WVGA Panel" - select FB_MSM_LCDC_PRISM_WVGA - ---help--- - Support for LCDC Prism WVGA (800x480) panel - - -config FB_MSM_LCDC_ST15_PANEL - depends on FB_MSM_LCDC_HW - bool "LCDC ST1.5 Panel" - select FB_MSM_LCDC_ST15_WXGA - ---help--- - Support for ST1.5 WXGA (1366x768) panel - -config FB_MSM_PANEL_NONE - bool "NONE" - ---help--- - This will disable LCD panel -endchoice - -choice - prompt "Secondary LCD Panel" - depends on FB_MSM_MDP31 - default FB_MSM_SECONDARY_PANEL_NONE - -config FB_MSM_SECONDARY_PANEL_NONE - bool "NONE" - ---help--- - No secondary panel -endchoice - -config FB_MSM_TVOUT_NTSC - bool - select FB_MSM_TVOUT - default n - -config FB_MSM_TVOUT_PAL - bool - select FB_MSM_TVOUT - default n - -choice - depends on (FB_MSM_MDP22 || FB_MSM_MDP31) - prompt "TVOut Region" - default FB_MSM_TVOUT_NTSC_M - -config FB_MSM_TVOUT_NTSC_M - bool "NTSC M" - select FB_MSM_TVOUT_NTSC - ---help--- - Support for NTSC M region (North American and Korea) - -config FB_MSM_TVOUT_NONE - bool "NONE" - ---help--- - This will disable TV Out functionality. -endchoice - -config PMEM_KERNEL_SIZE - int "PMEM for kernel components (in MB)" - default 2 - depends on ARCH_QSD8X50 - help - Configures the amount of PMEM for use by kernel components - (in MB; minimum 2MB) -endif diff --git a/drivers/staging/msm/Makefile b/drivers/staging/msm/Makefile deleted file mode 100644 index 07a89ec..0000000 --- a/drivers/staging/msm/Makefile +++ /dev/null @@ -1,88 +0,0 @@ -obj-y := msm_fb.o staging-devices.o memory.o - -obj-$(CONFIG_FB_MSM_LOGO) += logo.o -obj-$(CONFIG_FB_BACKLIGHT) += msm_fb_bl.o - -# MDP -obj-y += mdp.o - -ifeq ($(CONFIG_FB_MSM_MDP40),y) -obj-y += mdp4_util.o -obj-$(CONFIG_DEBUG_FS) += mdp4_debugfs.o -else -obj-y += mdp_hw_init.o -obj-y += mdp_ppp.o -ifeq ($(CONFIG_FB_MSM_MDP31),y) -obj-y += mdp_ppp_v31.o -obj-$(CONFIG_MDP_PPP_ASYNC_OP) += mdp_ppp_dq.o -else -obj-y += mdp_ppp_v20.o -endif -endif - -ifeq ($(CONFIG_FB_MSM_OVERLAY),y) -obj-y += mdp4_overlay.o -obj-y += mdp4_overlay_lcdc.o -obj-y += mdp4_overlay_mddi.o -else -obj-y += mdp_dma_lcdc.o -endif - -obj-y += mdp_dma.o -obj-y += mdp_dma_s.o -obj-y += mdp_vsync.o -obj-y += mdp_cursor.o -obj-y += mdp_dma_tv.o - -# EBI2 -obj-$(CONFIG_FB_MSM_EBI2) += ebi2_lcd.o - -# LCDC -obj-$(CONFIG_FB_MSM_LCDC) += lcdc.o - -# MDDI -msm_mddi-y := mddi.o mddihost.o mddihosti.o -obj-$(CONFIG_FB_MSM_MDDI) += msm_mddi.o - -# External MDDI -msm_mddi_ext-y := mddihost_e.o mddi_ext.o -obj-$(CONFIG_FB_MSM_EXTMDDI) += msm_mddi_ext.o - -# TVEnc -obj-$(CONFIG_FB_MSM_TVOUT) += tvenc.o - -# MSM FB Panel -obj-y += msm_fb_panel.o -obj-$(CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF) += ebi2_tmd20.o -obj-$(CONFIG_FB_MSM_EBI2_TMD_QVGA_EPSON_QCIF) += ebi2_l2f.o - -ifeq ($(CONFIG_FB_MSM_MDDI_AUTO_DETECT),y) -obj-y += mddi_prism.o -obj-y += mddi_toshiba.o -obj-y += mddi_toshiba_vga.o -obj-y += mddi_toshiba_wvga_pt.o -obj-y += mddi_sharp.o -else -obj-$(CONFIG_FB_MSM_MDDI_PRISM_WVGA) += mddi_prism.o -obj-$(CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON) += mddi_toshiba.o -obj-$(CONFIG_FB_MSM_MDDI_TOSHIBA_COMMON_VGA) += mddi_toshiba_vga.o -obj-$(CONFIG_FB_MSM_MDDI_TOSHIBA_WVGA_PORTRAIT) += mddi_toshiba_wvga_pt.o -obj-$(CONFIG_FB_MSM_MDDI_SHARP_QVGA_128x128) += mddi_sharp.o -endif - -obj-$(CONFIG_FB_MSM_LCDC_PANEL) += lcdc_panel.o -obj-$(CONFIG_FB_MSM_LCDC_PRISM_WVGA) += lcdc_prism.o -obj-$(CONFIG_FB_MSM_LCDC_EXTERNAL_WXGA) += lcdc_external.o -obj-$(CONFIG_FB_MSM_LCDC_GORDON_VGA) += lcdc_gordon.o -obj-$(CONFIG_FB_MSM_LCDC_TOSHIBA_WVGA_PT) += lcdc_toshiba_wvga_pt.o -obj-$(CONFIG_FB_MSM_LCDC_SHARP_WVGA_PT) += lcdc_sharp_wvga_pt.o -obj-$(CONFIG_FB_MSM_LCDC_ST15_WXGA) += lcdc_st15.o -obj-$(CONFIG_FB_MSM_HDMI_SII_EXTERNAL_720P) += hdmi_sii9022.o - -obj-$(CONFIG_FB_MSM_TVOUT_NTSC) += tv_ntsc.o -obj-$(CONFIG_FB_MSM_TVOUT_PAL) += tv_pal.o - -obj-$(CONFIG_FB_MSM_EXTMDDI_SVGA) += mddi_ext_lcd.o - -clean: - rm *.o .*cmd diff --git a/drivers/staging/msm/TODO b/drivers/staging/msm/TODO deleted file mode 100644 index 05107a7..0000000 --- a/drivers/staging/msm/TODO +++ /dev/null @@ -1,3 +0,0 @@ -- Merge this code with the existing MSM framebuffer -- General style clean ups. - diff --git a/drivers/staging/msm/ebi2_l2f.c b/drivers/staging/msm/ebi2_l2f.c deleted file mode 100644 index 5bfea28..0000000 --- a/drivers/staging/msm/ebi2_l2f.c +++ /dev/null @@ -1,569 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include - -/* The following are for MSM5100 on Gator -*/ -#ifdef FEATURE_PM1000 -#include "pm1000.h" -#endif /* FEATURE_PM1000 */ -/* The following are for MSM6050 on Bambi -*/ -#ifdef FEATURE_PMIC_LCDKBD_LED_DRIVER -#include "pm.h" -#endif /* FEATURE_PMIC_LCDKBD_LED_DRIVER */ - -#ifdef DISP_DEVICE_18BPP -#undef DISP_DEVICE_18BPP -#define DISP_DEVICE_16BPP -#endif - -#define QCIF_WIDTH 176 -#define QCIF_HEIGHT 220 - -static void *DISP_CMD_PORT; -static void *DISP_DATA_PORT; - -#define DISP_CMD_DISON 0xaf -#define DISP_CMD_DISOFF 0xae -#define DISP_CMD_DISNOR 0xa6 -#define DISP_CMD_DISINV 0xa7 -#define DISP_CMD_DISCTL 0xca -#define DISP_CMD_GCP64 0xcb -#define DISP_CMD_GCP16 0xcc -#define DISP_CMD_GSSET 0xcd -#define DISP_GS_2 0x02 -#define DISP_GS_16 0x01 -#define DISP_GS_64 0x00 -#define DISP_CMD_SLPIN 0x95 -#define DISP_CMD_SLPOUT 0x94 -#define DISP_CMD_SD_PSET 0x75 -#define DISP_CMD_MD_PSET 0x76 -#define DISP_CMD_SD_CSET 0x15 -#define DISP_CMD_MD_CSET 0x16 -#define DISP_CMD_DATCTL 0xbc -#define DISP_DATCTL_666 0x08 -#define DISP_DATCTL_565 0x28 -#define DISP_DATCTL_444 0x38 -#define DISP_CMD_RAMWR 0x5c -#define DISP_CMD_RAMRD 0x5d -#define DISP_CMD_PTLIN 0xa8 -#define DISP_CMD_PTLOUT 0xa9 -#define DISP_CMD_ASCSET 0xaa -#define DISP_CMD_SCSTART 0xab -#define DISP_CMD_VOLCTL 0xc6 -#define DISP_VOLCTL_TONE 0x80 -#define DISP_CMD_NOp 0x25 -#define DISP_CMD_OSSEL 0xd0 -#define DISP_CMD_3500KSET 0xd1 -#define DISP_CMD_3500KEND 0xd2 -#define DISP_CMD_14MSET 0xd3 -#define DISP_CMD_14MEND 0xd4 - -#define DISP_CMD_OUT(cmd) outpw(DISP_CMD_PORT, cmd); - -#define DISP_DATA_OUT(data) outpw(DISP_DATA_PORT, data); - -#define DISP_DATA_IN() inpw(DISP_DATA_PORT); - -/* Epson device column number starts at 2 -*/ -#define DISP_SET_RECT(ulhc_row, lrhc_row, ulhc_col, lrhc_col) \ - DISP_CMD_OUT(DISP_CMD_SD_PSET) \ - DISP_DATA_OUT((ulhc_row) & 0xFF) \ - DISP_DATA_OUT((ulhc_row) >> 8) \ - DISP_DATA_OUT((lrhc_row) & 0xFF) \ - DISP_DATA_OUT((lrhc_row) >> 8) \ - DISP_CMD_OUT(DISP_CMD_SD_CSET) \ - DISP_DATA_OUT(((ulhc_col)+2) & 0xFF) \ - DISP_DATA_OUT(((ulhc_col)+2) >> 8) \ - DISP_DATA_OUT(((lrhc_col)+2) & 0xFF) \ - DISP_DATA_OUT(((lrhc_col)+2) >> 8) - -#define DISP_MIN_CONTRAST 0 -#define DISP_MAX_CONTRAST 127 -#define DISP_DEFAULT_CONTRAST 80 - -#define DISP_MIN_BACKLIGHT 0 -#define DISP_MAX_BACKLIGHT 15 -#define DISP_DEFAULT_BACKLIGHT 2 - -#define WAIT_SEC(sec) mdelay((sec)/1000) - -static word disp_area_start_row; -static word disp_area_end_row; -static byte disp_contrast = DISP_DEFAULT_CONTRAST; -static boolean disp_powered_up; -static boolean disp_initialized = FALSE; -/* For some reason the contrast set at init time is not good. Need to do - * it again - */ -static boolean display_on = FALSE; -static void epsonQcif_disp_init(struct platform_device *pdev); -static void epsonQcif_disp_set_contrast(word contrast); -static void epsonQcif_disp_set_display_area(word start_row, word end_row); -static int epsonQcif_disp_off(struct platform_device *pdev); -static int epsonQcif_disp_on(struct platform_device *pdev); -static void epsonQcif_disp_set_rect(int x, int y, int xres, int yres); - -volatile word databack; -static void epsonQcif_disp_init(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - int i; - - if (disp_initialized) - return; - - mfd = platform_get_drvdata(pdev); - - DISP_CMD_PORT = mfd->cmd_port; - DISP_DATA_PORT = mfd->data_port; - - /* Sleep in */ - DISP_CMD_OUT(DISP_CMD_SLPIN); - - /* Display off */ - DISP_CMD_OUT(DISP_CMD_DISOFF); - - /* Display normal */ - DISP_CMD_OUT(DISP_CMD_DISNOR); - - /* Set data mode */ - DISP_CMD_OUT(DISP_CMD_DATCTL); - DISP_DATA_OUT(DISP_DATCTL_565); - - /* Set display timing */ - DISP_CMD_OUT(DISP_CMD_DISCTL); - DISP_DATA_OUT(0x1c); /* p1 */ - DISP_DATA_OUT(0x02); /* p1 */ - DISP_DATA_OUT(0x82); /* p2 */ - DISP_DATA_OUT(0x00); /* p3 */ - DISP_DATA_OUT(0x00); /* p4 */ - DISP_DATA_OUT(0xe0); /* p5 */ - DISP_DATA_OUT(0x00); /* p5 */ - DISP_DATA_OUT(0xdc); /* p6 */ - DISP_DATA_OUT(0x00); /* p6 */ - DISP_DATA_OUT(0x02); /* p7 */ - DISP_DATA_OUT(0x00); /* p8 */ - - /* Set 64 gray scale level */ - DISP_CMD_OUT(DISP_CMD_GCP64); - DISP_DATA_OUT(0x08); /* p01 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x2a); /* p02 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x4e); /* p03 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x6b); /* p04 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x88); /* p05 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0xa3); /* p06 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0xba); /* p07 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0xd1); /* p08 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0xe5); /* p09 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0xf3); /* p10 */ - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x03); /* p11 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x13); /* p12 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x22); /* p13 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x2f); /* p14 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x3b); /* p15 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x46); /* p16 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x51); /* p17 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x5b); /* p18 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x64); /* p19 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x6c); /* p20 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x74); /* p21 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x7c); /* p22 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x83); /* p23 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x8a); /* p24 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x91); /* p25 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x98); /* p26 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x9f); /* p27 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xa6); /* p28 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xac); /* p29 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xb2); /* p30 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xb7); /* p31 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xbc); /* p32 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xc1); /* p33 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xc6); /* p34 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xcb); /* p35 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xd0); /* p36 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xd4); /* p37 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xd8); /* p38 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xdc); /* p39 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xe0); /* p40 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xe4); /* p41 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xe8); /* p42 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xec); /* p43 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xf0); /* p44 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xf4); /* p45 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xf8); /* p46 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xfb); /* p47 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xfe); /* p48 */ - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0x01); /* p49 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x03); /* p50 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x05); /* p51 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x07); /* p52 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x09); /* p53 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x0b); /* p54 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x0d); /* p55 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x0f); /* p56 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x11); /* p57 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x13); /* p58 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x15); /* p59 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x17); /* p60 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x19); /* p61 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x1b); /* p62 */ - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x1c); /* p63 */ - DISP_DATA_OUT(0x02); - - /* Set 16 gray scale level */ - DISP_CMD_OUT(DISP_CMD_GCP16); - DISP_DATA_OUT(0x1a); /* p01 */ - DISP_DATA_OUT(0x32); /* p02 */ - DISP_DATA_OUT(0x42); /* p03 */ - DISP_DATA_OUT(0x4c); /* p04 */ - DISP_DATA_OUT(0x58); /* p05 */ - DISP_DATA_OUT(0x5f); /* p06 */ - DISP_DATA_OUT(0x66); /* p07 */ - DISP_DATA_OUT(0x6b); /* p08 */ - DISP_DATA_OUT(0x70); /* p09 */ - DISP_DATA_OUT(0x74); /* p10 */ - DISP_DATA_OUT(0x78); /* p11 */ - DISP_DATA_OUT(0x7b); /* p12 */ - DISP_DATA_OUT(0x7e); /* p13 */ - DISP_DATA_OUT(0x80); /* p14 */ - DISP_DATA_OUT(0x82); /* p15 */ - - /* Set DSP column */ - DISP_CMD_OUT(DISP_CMD_MD_CSET); - DISP_DATA_OUT(0xff); - DISP_DATA_OUT(0x03); - DISP_DATA_OUT(0xff); - DISP_DATA_OUT(0x03); - - /* Set DSP page */ - DISP_CMD_OUT(DISP_CMD_MD_PSET); - DISP_DATA_OUT(0xff); - DISP_DATA_OUT(0x01); - DISP_DATA_OUT(0xff); - DISP_DATA_OUT(0x01); - - /* Set ARM column */ - DISP_CMD_OUT(DISP_CMD_SD_CSET); - DISP_DATA_OUT(0x02); - DISP_DATA_OUT(0x00); - DISP_DATA_OUT((QCIF_WIDTH + 1) & 0xFF); - DISP_DATA_OUT((QCIF_WIDTH + 1) >> 8); - - /* Set ARM page */ - DISP_CMD_OUT(DISP_CMD_SD_PSET); - DISP_DATA_OUT(0x00); - DISP_DATA_OUT(0x00); - DISP_DATA_OUT((QCIF_HEIGHT - 1) & 0xFF); - DISP_DATA_OUT((QCIF_HEIGHT - 1) >> 8); - - /* Set 64 gray scales */ - DISP_CMD_OUT(DISP_CMD_GSSET); - DISP_DATA_OUT(DISP_GS_64); - - DISP_CMD_OUT(DISP_CMD_OSSEL); - DISP_DATA_OUT(0); - - /* Sleep out */ - DISP_CMD_OUT(DISP_CMD_SLPOUT); - - WAIT_SEC(40000); - - /* Initialize power IC */ - DISP_CMD_OUT(DISP_CMD_VOLCTL); - DISP_DATA_OUT(DISP_VOLCTL_TONE); - - WAIT_SEC(40000); - - /* Set electronic volume, d'xx */ - DISP_CMD_OUT(DISP_CMD_VOLCTL); - DISP_DATA_OUT(DISP_DEFAULT_CONTRAST); /* value from 0 to 127 */ - - /* Initialize display data */ - DISP_SET_RECT(0, (QCIF_HEIGHT - 1), 0, (QCIF_WIDTH - 1)); - DISP_CMD_OUT(DISP_CMD_RAMWR); - for (i = 0; i < QCIF_HEIGHT * QCIF_WIDTH; i++) - DISP_DATA_OUT(0xffff); - - DISP_CMD_OUT(DISP_CMD_RAMRD); - databack = DISP_DATA_IN(); - databack = DISP_DATA_IN(); - databack = DISP_DATA_IN(); - databack = DISP_DATA_IN(); - - WAIT_SEC(80000); - - DISP_CMD_OUT(DISP_CMD_DISON); - - disp_area_start_row = 0; - disp_area_end_row = QCIF_HEIGHT - 1; - disp_powered_up = TRUE; - disp_initialized = TRUE; - epsonQcif_disp_set_display_area(0, QCIF_HEIGHT - 1); - display_on = TRUE; -} - -static void epsonQcif_disp_set_rect(int x, int y, int xres, int yres) -{ - if (!disp_initialized) - return; - - DISP_SET_RECT(y, y + yres - 1, x, x + xres - 1); - DISP_CMD_OUT(DISP_CMD_RAMWR); -} - -static void epsonQcif_disp_set_display_area(word start_row, word end_row) -{ - if (!disp_initialized) - return; - - if ((start_row == disp_area_start_row) - && (end_row == disp_area_end_row)) - return; - disp_area_start_row = start_row; - disp_area_end_row = end_row; - - /* Range checking - */ - if (end_row >= QCIF_HEIGHT) - end_row = QCIF_HEIGHT - 1; - if (start_row > end_row) - start_row = end_row; - - /* When display is not the full screen, gray scale is set to - ** 2; otherwise it is set to 64. - */ - if ((start_row == 0) && (end_row == (QCIF_HEIGHT - 1))) { - /* The whole screen */ - DISP_CMD_OUT(DISP_CMD_PTLOUT); - WAIT_SEC(10000); - DISP_CMD_OUT(DISP_CMD_DISOFF); - WAIT_SEC(100000); - DISP_CMD_OUT(DISP_CMD_GSSET); - DISP_DATA_OUT(DISP_GS_64); - WAIT_SEC(100000); - DISP_CMD_OUT(DISP_CMD_DISON); - } else { - /* partial screen */ - DISP_CMD_OUT(DISP_CMD_PTLIN); - DISP_DATA_OUT(start_row); - DISP_DATA_OUT(start_row >> 8); - DISP_DATA_OUT(end_row); - DISP_DATA_OUT(end_row >> 8); - DISP_CMD_OUT(DISP_CMD_GSSET); - DISP_DATA_OUT(DISP_GS_2); - } -} - -static int epsonQcif_disp_off(struct platform_device *pdev) -{ - if (!disp_initialized) - epsonQcif_disp_init(pdev); - - if (display_on) { - DISP_CMD_OUT(DISP_CMD_DISOFF); - DISP_CMD_OUT(DISP_CMD_SLPIN); - display_on = FALSE; - } - - return 0; -} - -static int epsonQcif_disp_on(struct platform_device *pdev) -{ - if (!disp_initialized) - epsonQcif_disp_init(pdev); - - if (!display_on) { - DISP_CMD_OUT(DISP_CMD_SLPOUT); - WAIT_SEC(40000); - DISP_CMD_OUT(DISP_CMD_DISON); - epsonQcif_disp_set_contrast(disp_contrast); - display_on = TRUE; - } - - return 0; -} - -static void epsonQcif_disp_set_contrast(word contrast) -{ - if (!disp_initialized) - return; - - /* Initialize power IC, d'24 */ - DISP_CMD_OUT(DISP_CMD_VOLCTL); - DISP_DATA_OUT(DISP_VOLCTL_TONE); - - WAIT_SEC(40000); - - /* Set electronic volume, d'xx */ - DISP_CMD_OUT(DISP_CMD_VOLCTL); - if (contrast > 127) - contrast = 127; - DISP_DATA_OUT(contrast); /* value from 0 to 127 */ - disp_contrast = (byte) contrast; -} /* End disp_set_contrast */ - -static void epsonQcif_disp_clear_screen_area( - word start_row, word end_row, word start_column, word end_column) { - int32 i; - - /* Clear the display screen */ - DISP_SET_RECT(start_row, end_row, start_column, end_column); - DISP_CMD_OUT(DISP_CMD_RAMWR); - i = (end_row - start_row + 1) * (end_column - start_column + 1); - for (; i > 0; i--) - DISP_DATA_OUT(0xffff); -} - -static int __init epsonQcif_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = epsonQcif_probe, - .driver = { - .name = "ebi2_epson_qcif", - }, -}; - -static struct msm_fb_panel_data epsonQcif_panel_data = { - .on = epsonQcif_disp_on, - .off = epsonQcif_disp_off, - .set_rect = epsonQcif_disp_set_rect, -}; - -static struct platform_device this_device = { - .name = "ebi2_epson_qcif", - .id = 0, - .dev = { - .platform_data = &epsonQcif_panel_data, - } -}; - -static int __init epsonQcif_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - - ret = platform_driver_register(&this_driver); - if (!ret) { - pinfo = &epsonQcif_panel_data.panel_info; - pinfo->xres = QCIF_WIDTH; - pinfo->yres = QCIF_HEIGHT; - pinfo->type = EBI2_PANEL; - pinfo->pdest = DISPLAY_2; - pinfo->wait_cycle = 0x808000; - pinfo->bpp = 16; - pinfo->fb_num = 2; - pinfo->lcd.vsync_enable = FALSE; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(epsonQcif_init); diff --git a/drivers/staging/msm/ebi2_lcd.c b/drivers/staging/msm/ebi2_lcd.c deleted file mode 100644 index 4834b7b..0000000 --- a/drivers/staging/msm/ebi2_lcd.c +++ /dev/null @@ -1,249 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" - -static int ebi2_lcd_probe(struct platform_device *pdev); -static int ebi2_lcd_remove(struct platform_device *pdev); - -static struct platform_driver ebi2_lcd_driver = { - .probe = ebi2_lcd_probe, - .remove = ebi2_lcd_remove, - .suspend = NULL, - .suspend_late = NULL, - .resume_early = NULL, - .resume = NULL, - .shutdown = NULL, - .driver = { - .name = "ebi2_lcd", - }, -}; - -static void *ebi2_base; -static void *ebi2_lcd_cfg0; -static void *ebi2_lcd_cfg1; -static void __iomem *lcd01_base; -static void __iomem *lcd02_base; -static int ebi2_lcd_resource_initialized; - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; - -static int ebi2_lcd_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct platform_device *mdp_dev = NULL; - struct msm_fb_panel_data *pdata = NULL; - int rc, i; - - if (pdev->id == 0) { - for (i = 0; i < pdev->num_resources; i++) { - if (!strncmp(pdev->resource[i].name, "base", 4)) { - ebi2_base = ioremap(pdev->resource[i].start, - pdev->resource[i].end - - pdev->resource[i].start + 1); - if (!ebi2_base) { - printk(KERN_ERR - "ebi2_base ioremap failed!\n"); - return -ENOMEM; - } - ebi2_lcd_cfg0 = (void *)(ebi2_base + 0x20); - ebi2_lcd_cfg1 = (void *)(ebi2_base + 0x24); - } else if (!strncmp(pdev->resource[i].name, - "lcd01", 5)) { - lcd01_base = ioremap(pdev->resource[i].start, - pdev->resource[i].end - - pdev->resource[i].start + 1); - if (!lcd01_base) { - printk(KERN_ERR - "lcd01_base ioremap failed!\n"); - return -ENOMEM; - } - } else if (!strncmp(pdev->resource[i].name, - "lcd02", 5)) { - lcd02_base = ioremap(pdev->resource[i].start, - pdev->resource[i].end - - pdev->resource[i].start + 1); - if (!lcd02_base) { - printk(KERN_ERR - "lcd02_base ioremap failed!\n"); - return -ENOMEM; - } - } - } - ebi2_lcd_resource_initialized = 1; - return 0; - } - - if (!ebi2_lcd_resource_initialized) - return -EPERM; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - if (ebi2_base == NULL) - return -ENOMEM; - - mdp_dev = platform_device_alloc("mdp", pdev->id); - if (!mdp_dev) - return -ENOMEM; - - /* link to the latest pdev */ - mfd->pdev = mdp_dev; - mfd->dest = DISPLAY_LCD; - - /* add panel data */ - if (platform_device_add_data - (mdp_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "ebi2_lcd_probe: platform_device_add_data failed!\n"); - platform_device_put(mdp_dev); - return -ENOMEM; - } - - /* data chain */ - pdata = mdp_dev->dev.platform_data; - pdata->on = panel_next_on; - pdata->off = panel_next_off; - pdata->next = pdev; - - /* get/set panel specific fb info */ - mfd->panel_info = pdata->panel_info; - - if (mfd->panel_info.bpp == 24) - mfd->fb_imgType = MDP_RGB_888; - else - mfd->fb_imgType = MDP_RGB_565; - - /* config msm ebi2 lcd register */ - if (mfd->panel_info.pdest == DISPLAY_1) { - outp32(ebi2_base, - (inp32(ebi2_base) & (~(EBI2_PRIM_LCD_CLR))) | - EBI2_PRIM_LCD_SEL); - /* - * current design has one set of cfg0/1 register to control - * both EBI2 channels. so, we're using the PRIM channel to - * configure both. - */ - outp32(ebi2_lcd_cfg0, mfd->panel_info.wait_cycle); - if (mfd->panel_info.bpp == 18) - outp32(ebi2_lcd_cfg1, 0x01000000); - else - outp32(ebi2_lcd_cfg1, 0x0); - } else { -#ifdef DEBUG_EBI2_LCD - /* - * confliting with QCOM SURF FPGA CS. - * OEM should enable below for their CS mapping - */ - outp32(ebi2_base, (inp32(ebi2_base)&(~(EBI2_SECD_LCD_CLR))) - |EBI2_SECD_LCD_SEL); -#endif - } - - /* - * map cs (chip select) address - */ - if (mfd->panel_info.pdest == DISPLAY_1) { - mfd->cmd_port = lcd01_base; - mfd->data_port = - (void *)((uint32) mfd->cmd_port + EBI2_PRIM_LCD_RS_PIN); - mfd->data_port_phys = - (void *)(LCD_PRIM_BASE_PHYS + EBI2_PRIM_LCD_RS_PIN); - } else { - mfd->cmd_port = lcd01_base; - mfd->data_port = - (void *)((uint32) mfd->cmd_port + EBI2_SECD_LCD_RS_PIN); - mfd->data_port_phys = - (void *)(LCD_SECD_BASE_PHYS + EBI2_SECD_LCD_RS_PIN); - } - - /* - * set driver data - */ - platform_set_drvdata(mdp_dev, mfd); - - /* - * register in mdp driver - */ - rc = platform_device_add(mdp_dev); - if (rc) { - goto ebi2_lcd_probe_err; - } - - pdev_list[pdev_list_cnt++] = pdev; - return 0; - - ebi2_lcd_probe_err: - platform_device_put(mdp_dev); - return rc; -} - -static int ebi2_lcd_remove(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return 0; - - if (mfd->key != MFD_KEY) - return 0; - - iounmap(mfd->cmd_port); - - return 0; -} - -static int ebi2_lcd_register_driver(void) -{ - return platform_driver_register(&ebi2_lcd_driver); -} - -static int __init ebi2_lcd_driver_init(void) -{ - return ebi2_lcd_register_driver(); -} - -module_init(ebi2_lcd_driver_init); diff --git a/drivers/staging/msm/ebi2_tmd20.c b/drivers/staging/msm/ebi2_tmd20.c deleted file mode 100644 index d7d667a..0000000 --- a/drivers/staging/msm/ebi2_tmd20.c +++ /dev/null @@ -1,1122 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include - -/* #define TMD20QVGA_LCD_18BPP */ -#define QVGA_WIDTH 240 -#define QVGA_HEIGHT 320 - -#ifdef TMD20QVGA_LCD_18BPP -#define DISP_QVGA_18BPP(x) ((((x)<<2) & 0x3FC00)|(( (x)<<1)& 0x1FE)) -#define DISP_REG(name) uint32 register_##name; -#define OUTPORT(x, y) outpdw(x, y) -#define INPORT(x) inpdw(x) -#else -#define DISP_QVGA_18BPP(x) (x) -#define DISP_REG(name) uint16 register_##name; -#define OUTPORT(x, y) outpw(x, y) -#define INPORT(x) intpw(x) -#endif - -static void *DISP_CMD_PORT; -static void *DISP_DATA_PORT; - -#define DISP_RNTI 0x10 - -#define DISP_CMD_OUT(cmd) OUTPORT(DISP_CMD_PORT, DISP_QVGA_18BPP(cmd)) -#define DISP_DATA_OUT(data) OUTPORT(DISP_DATA_PORT, data) -#define DISP_DATA_IN() INPORT(DISP_DATA_PORT) - -#if (defined(TMD20QVGA_LCD_18BPP)) -#define DISP_DATA_OUT_16TO18BPP(x) \ - DISP_DATA_OUT((((x)&0xf800)<<2|((x)&0x80000)>>3) \ - | (((x)&0x7e0)<<1) \ - | (((x)&0x1F)<<1|((x)&0x10)>>4)) -#else -#define DISP_DATA_OUT_16TO18BPP(x) \ - DISP_DATA_OUT(x) -#endif - -#define DISP_WRITE_OUT(addr, data) \ - register_##addr = DISP_QVGA_18BPP(data); \ - DISP_CMD_OUT(addr); \ - DISP_DATA_OUT(register_##addr); - -#define DISP_UPDATE_VALUE(addr, bitmask, data) \ - DISP_WRITE_OUT(##addr, (register_##addr & ~(bitmask)) | (data)); - -#define DISP_VAL_IF(bitvalue, bitmask) \ - ((bitvalue) ? (bitmask) : 0) - -/* QVGA = 256 x 320 */ -/* actual display is 240 x 320...offset by 0x10 */ -#define DISP_ROW_COL_TO_ADDR(row, col) ((row) * 0x100 + col) -#define DISP_SET_RECT(ulhc_row, lrhc_row, ulhc_col, lrhc_col) \ - { \ - DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_1_ADDR, (ulhc_col) + tmd20qvga_panel_offset); \ - DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_2_ADDR, (lrhc_col) + tmd20qvga_panel_offset); \ - DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_1_ADDR, (ulhc_row)); \ - DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_2_ADDR, (lrhc_row)); \ - DISP_WRITE_OUT(DISP_RAM_ADDR_SET_1_ADDR, (ulhc_col) + tmd20qvga_panel_offset); \ - DISP_WRITE_OUT(DISP_RAM_ADDR_SET_2_ADDR, (ulhc_row)); \ - } - -#define WAIT_MSEC(msec) mdelay(msec) - -/* - * TMD QVGA Address - */ -/* Display Control */ -#define DISP_START_OSCILLATION_ADDR 0x000 -DISP_REG(DISP_START_OSCILLATION_ADDR) -#define DISP_DRIVER_OUTPUT_CTL_ADDR 0x001 - DISP_REG(DISP_DRIVER_OUTPUT_CTL_ADDR) -#define DISP_LCD_DRIVING_SIG_ADDR 0x002 - DISP_REG(DISP_LCD_DRIVING_SIG_ADDR) -#define DISP_ENTRY_MODE_ADDR 0x003 - DISP_REG(DISP_ENTRY_MODE_ADDR) -#define DISP_DISPLAY_CTL_1_ADDR 0x007 - DISP_REG(DISP_DISPLAY_CTL_1_ADDR) -#define DISP_DISPLAY_CTL_2_ADDR 0x008 - DISP_REG(DISP_DISPLAY_CTL_2_ADDR) - -/* DISPLAY MODE 0x009 partial display not supported */ -#define DISP_POWER_SUPPLY_INTF_ADDR 0x00A - DISP_REG(DISP_POWER_SUPPLY_INTF_ADDR) - -/* DISPLAY MODE 0x00B xZoom feature is not supported */ -#define DISP_EXT_DISPLAY_CTL_1_ADDR 0x00C - DISP_REG(DISP_EXT_DISPLAY_CTL_1_ADDR) - -#define DISP_FRAME_CYCLE_CTL_ADDR 0x00D - DISP_REG(DISP_FRAME_CYCLE_CTL_ADDR) - -#define DISP_EXT_DISPLAY_CTL_2_ADDR 0x00E - DISP_REG(DISP_EXT_DISPLAY_CTL_2_ADDR) - -#define DISP_EXT_DISPLAY_CTL_3_ADDR 0x00F - DISP_REG(DISP_EXT_DISPLAY_CTL_3_ADDR) - -#define DISP_LTPS_CTL_1_ADDR 0x012 - DISP_REG(DISP_LTPS_CTL_1_ADDR) -#define DISP_LTPS_CTL_2_ADDR 0x013 - DISP_REG(DISP_LTPS_CTL_2_ADDR) -#define DISP_LTPS_CTL_3_ADDR 0x014 - DISP_REG(DISP_LTPS_CTL_3_ADDR) -#define DISP_LTPS_CTL_4_ADDR 0x018 - DISP_REG(DISP_LTPS_CTL_4_ADDR) -#define DISP_LTPS_CTL_5_ADDR 0x019 - DISP_REG(DISP_LTPS_CTL_5_ADDR) -#define DISP_LTPS_CTL_6_ADDR 0x01A - DISP_REG(DISP_LTPS_CTL_6_ADDR) -#define DISP_AMP_SETTING_ADDR 0x01C - DISP_REG(DISP_AMP_SETTING_ADDR) -#define DISP_MODE_SETTING_ADDR 0x01D - DISP_REG(DISP_MODE_SETTING_ADDR) -#define DISP_POFF_LN_SETTING_ADDR 0x01E - DISP_REG(DISP_POFF_LN_SETTING_ADDR) -/* Power Contol */ -#define DISP_POWER_CTL_1_ADDR 0x100 - DISP_REG(DISP_POWER_CTL_1_ADDR) -#define DISP_POWER_CTL_2_ADDR 0x101 - DISP_REG(DISP_POWER_CTL_2_ADDR) -#define DISP_POWER_CTL_3_ADDR 0x102 - DISP_REG(DISP_POWER_CTL_3_ADDR) -#define DISP_POWER_CTL_4_ADDR 0x103 - DISP_REG(DISP_POWER_CTL_4_ADDR) -#define DISP_POWER_CTL_5_ADDR 0x104 - DISP_REG(DISP_POWER_CTL_5_ADDR) -#define DISP_POWER_CTL_6_ADDR 0x105 - DISP_REG(DISP_POWER_CTL_6_ADDR) -#define DISP_POWER_CTL_7_ADDR 0x106 - DISP_REG(DISP_POWER_CTL_7_ADDR) -/* RAM Access */ -#define DISP_RAM_ADDR_SET_1_ADDR 0x200 - DISP_REG(DISP_RAM_ADDR_SET_1_ADDR) -#define DISP_RAM_ADDR_SET_2_ADDR 0x201 - DISP_REG(DISP_RAM_ADDR_SET_2_ADDR) -#define DISP_CMD_RAMRD DISP_CMD_RAMWR -#define DISP_CMD_RAMWR 0x202 - DISP_REG(DISP_CMD_RAMWR) -#define DISP_RAM_DATA_MASK_1_ADDR 0x203 - DISP_REG(DISP_RAM_DATA_MASK_1_ADDR) -#define DISP_RAM_DATA_MASK_2_ADDR 0x204 - DISP_REG(DISP_RAM_DATA_MASK_2_ADDR) -/* Gamma Control, Contrast, Gray Scale Setting */ -#define DISP_GAMMA_CONTROL_1_ADDR 0x300 - DISP_REG(DISP_GAMMA_CONTROL_1_ADDR) -#define DISP_GAMMA_CONTROL_2_ADDR 0x301 - DISP_REG(DISP_GAMMA_CONTROL_2_ADDR) -#define DISP_GAMMA_CONTROL_3_ADDR 0x302 - DISP_REG(DISP_GAMMA_CONTROL_3_ADDR) -#define DISP_GAMMA_CONTROL_4_ADDR 0x303 - DISP_REG(DISP_GAMMA_CONTROL_4_ADDR) -#define DISP_GAMMA_CONTROL_5_ADDR 0x304 - DISP_REG(DISP_GAMMA_CONTROL_5_ADDR) -/* Coordinate Control */ -#define DISP_VERT_SCROLL_CTL_1_ADDR 0x400 - DISP_REG(DISP_VERT_SCROLL_CTL_1_ADDR) -#define DISP_VERT_SCROLL_CTL_2_ADDR 0x401 - DISP_REG(DISP_VERT_SCROLL_CTL_2_ADDR) -#define DISP_SCREEN_1_DRV_POS_1_ADDR 0x402 - DISP_REG(DISP_SCREEN_1_DRV_POS_1_ADDR) -#define DISP_SCREEN_1_DRV_POS_2_ADDR 0x403 - DISP_REG(DISP_SCREEN_1_DRV_POS_2_ADDR) -#define DISP_SCREEN_2_DRV_POS_1_ADDR 0x404 - DISP_REG(DISP_SCREEN_2_DRV_POS_1_ADDR) -#define DISP_SCREEN_2_DRV_POS_2_ADDR 0x405 - DISP_REG(DISP_SCREEN_2_DRV_POS_2_ADDR) -#define DISP_HORZ_RAM_ADDR_POS_1_ADDR 0x406 - DISP_REG(DISP_HORZ_RAM_ADDR_POS_1_ADDR) -#define DISP_HORZ_RAM_ADDR_POS_2_ADDR 0x407 - DISP_REG(DISP_HORZ_RAM_ADDR_POS_2_ADDR) -#define DISP_VERT_RAM_ADDR_POS_1_ADDR 0x408 - DISP_REG(DISP_VERT_RAM_ADDR_POS_1_ADDR) -#define DISP_VERT_RAM_ADDR_POS_2_ADDR 0x409 - DISP_REG(DISP_VERT_RAM_ADDR_POS_2_ADDR) -#define DISP_TMD_700_ADDR 0x700 /* 0x700 */ - DISP_REG(DISP_TMD_700_ADDR) -#define DISP_TMD_015_ADDR 0x015 /* 0x700 */ - DISP_REG(DISP_TMD_015_ADDR) -#define DISP_TMD_305_ADDR 0x305 /* 0x700 */ - DISP_REG(DISP_TMD_305_ADDR) - -/* - * TMD QVGA Bit Definations - */ - -#define DISP_BIT_IB15 0x8000 -#define DISP_BIT_IB14 0x4000 -#define DISP_BIT_IB13 0x2000 -#define DISP_BIT_IB12 0x1000 -#define DISP_BIT_IB11 0x0800 -#define DISP_BIT_IB10 0x0400 -#define DISP_BIT_IB09 0x0200 -#define DISP_BIT_IB08 0x0100 -#define DISP_BIT_IB07 0x0080 -#define DISP_BIT_IB06 0x0040 -#define DISP_BIT_IB05 0x0020 -#define DISP_BIT_IB04 0x0010 -#define DISP_BIT_IB03 0x0008 -#define DISP_BIT_IB02 0x0004 -#define DISP_BIT_IB01 0x0002 -#define DISP_BIT_IB00 0x0001 -/* - * Display Control - * DISP_START_OSCILLATION_ADDR Start Oscillation - * DISP_DRIVER_OUTPUT_CTL_ADDR Driver Output Control - */ -#define DISP_BITMASK_SS DISP_BIT_IB08 -#define DISP_BITMASK_NL5 DISP_BIT_IB05 -#define DISP_BITMASK_NL4 DISP_BIT_IB04 -#define DISP_BITMASK_NL3 DISP_BIT_IB03 -#define DISP_BITMASK_NL2 DISP_BIT_IB02 -#define DISP_BITMASK_NL1 DISP_BIT_IB01 -#define DISP_BITMASK_NL0 DISP_BIT_IB00 -/* DISP_LCD_DRIVING_SIG_ADDR LCD Driving Signal Setting */ -#define DISP_BITMASK_BC DISP_BIT_IB09 -/* DISP_ENTRY_MODE_ADDR Entry Mode */ -#define DISP_BITMASK_TRI DISP_BIT_IB15 -#define DISP_BITMASK_DFM1 DISP_BIT_IB14 -#define DISP_BITMASK_DFM0 DISP_BIT_IB13 -#define DISP_BITMASK_BGR DISP_BIT_IB12 -#define DISP_BITMASK_HWM0 DISP_BIT_IB08 -#define DISP_BITMASK_ID1 DISP_BIT_IB05 -#define DISP_BITMASK_ID0 DISP_BIT_IB04 -#define DISP_BITMASK_AM DISP_BIT_IB03 -/* DISP_DISPLAY_CTL_1_ADDR Display Control (1) */ -#define DISP_BITMASK_COL1 DISP_BIT_IB15 -#define DISP_BITMASK_COL0 DISP_BIT_IB14 -#define DISP_BITMASK_VLE2 DISP_BIT_IB10 -#define DISP_BITMASK_VLE1 DISP_BIT_IB09 -#define DISP_BITMASK_SPT DISP_BIT_IB08 -#define DISP_BITMASK_PT1 DISP_BIT_IB07 -#define DISP_BITMASK_PT0 DISP_BIT_IB06 -#define DISP_BITMASK_REV DISP_BIT_IB02 -/* DISP_DISPLAY_CTL_2_ADDR Display Control (2) */ -#define DISP_BITMASK_FP3 DISP_BIT_IB11 -#define DISP_BITMASK_FP2 DISP_BIT_IB10 -#define DISP_BITMASK_FP1 DISP_BIT_IB09 -#define DISP_BITMASK_FP0 DISP_BIT_IB08 -#define DISP_BITMASK_BP3 DISP_BIT_IB03 -#define DISP_BITMASK_BP2 DISP_BIT_IB02 -#define DISP_BITMASK_BP1 DISP_BIT_IB01 -#define DISP_BITMASK_BP0 DISP_BIT_IB00 -/* DISP_POWER_SUPPLY_INTF_ADDR Power Supply IC Interface Control */ -#define DISP_BITMASK_CSE DISP_BIT_IB12 -#define DISP_BITMASK_TE DISP_BIT_IB08 -#define DISP_BITMASK_IX3 DISP_BIT_IB03 -#define DISP_BITMASK_IX2 DISP_BIT_IB02 -#define DISP_BITMASK_IX1 DISP_BIT_IB01 -#define DISP_BITMASK_IX0 DISP_BIT_IB00 -/* DISP_EXT_DISPLAY_CTL_1_ADDR External Display Interface Control (1) */ -#define DISP_BITMASK_RM DISP_BIT_IB08 -#define DISP_BITMASK_DM1 DISP_BIT_IB05 -#define DISP_BITMASK_DM0 DISP_BIT_IB04 -#define DISP_BITMASK_RIM1 DISP_BIT_IB01 -#define DISP_BITMASK_RIM0 DISP_BIT_IB00 -/* DISP_FRAME_CYCLE_CTL_ADDR Frame Frequency Adjustment Control */ -#define DISP_BITMASK_DIVI1 DISP_BIT_IB09 -#define DISP_BITMASK_DIVI0 DISP_BIT_IB08 -#define DISP_BITMASK_RTNI4 DISP_BIT_IB04 -#define DISP_BITMASK_RTNI3 DISP_BIT_IB03 -#define DISP_BITMASK_RTNI2 DISP_BIT_IB02 -#define DISP_BITMASK_RTNI1 DISP_BIT_IB01 -#define DISP_BITMASK_RTNI0 DISP_BIT_IB00 -/* DISP_EXT_DISPLAY_CTL_2_ADDR External Display Interface Control (2) */ -#define DISP_BITMASK_DIVE1 DISP_BIT_IB09 -#define DISP_BITMASK_DIVE0 DISP_BIT_IB08 -#define DISP_BITMASK_RTNE7 DISP_BIT_IB07 -#define DISP_BITMASK_RTNE6 DISP_BIT_IB06 -#define DISP_BITMASK_RTNE5 DISP_BIT_IB05 -#define DISP_BITMASK_RTNE4 DISP_BIT_IB04 -#define DISP_BITMASK_RTNE3 DISP_BIT_IB03 -#define DISP_BITMASK_RTNE2 DISP_BIT_IB02 -#define DISP_BITMASK_RTNE1 DISP_BIT_IB01 -#define DISP_BITMASK_RTNE0 DISP_BIT_IB00 -/* DISP_EXT_DISPLAY_CTL_3_ADDR External Display Interface Control (3) */ -#define DISP_BITMASK_VSPL DISP_BIT_IB04 -#define DISP_BITMASK_HSPL DISP_BIT_IB03 -#define DISP_BITMASK_VPL DISP_BIT_IB02 -#define DISP_BITMASK_EPL DISP_BIT_IB01 -#define DISP_BITMASK_DPL DISP_BIT_IB00 -/* DISP_LTPS_CTL_1_ADDR LTPS Interface Control (1) */ -#define DISP_BITMASK_CLWI3 DISP_BIT_IB11 -#define DISP_BITMASK_CLWI2 DISP_BIT_IB10 -#define DISP_BITMASK_CLWI1 DISP_BIT_IB09 -#define DISP_BITMASK_CLWI0 DISP_BIT_IB08 -#define DISP_BITMASK_CLTI1 DISP_BIT_IB01 -#define DISP_BITMASK_CLTI0 DISP_BIT_IB00 -/* DISP_LTPS_CTL_2_ADDR LTPS Interface Control (2) */ -#define DISP_BITMASK_OEVBI1 DISP_BIT_IB09 -#define DISP_BITMASK_OEVBI0 DISP_BIT_IB08 -#define DISP_BITMASK_OEVFI1 DISP_BIT_IB01 -#define DISP_BITMASK_OEVFI0 DISP_BIT_IB00 -/* DISP_LTPS_CTL_3_ADDR LTPS Interface Control (3) */ -#define DISP_BITMASK_SHI1 DISP_BIT_IB01 -#define DISP_BITMASK_SHI0 DISP_BIT_IB00 -/* DISP_LTPS_CTL_4_ADDR LTPS Interface Control (4) */ -#define DISP_BITMASK_CLWE5 DISP_BIT_IB13 -#define DISP_BITMASK_CLWE4 DISP_BIT_IB12 -#define DISP_BITMASK_CLWE3 DISP_BIT_IB11 -#define DISP_BITMASK_CLWE2 DISP_BIT_IB10 -#define DISP_BITMASK_CLWE1 DISP_BIT_IB09 -#define DISP_BITMASK_CLWE0 DISP_BIT_IB08 -#define DISP_BITMASK_CLTE3 DISP_BIT_IB03 -#define DISP_BITMASK_CLTE2 DISP_BIT_IB02 -#define DISP_BITMASK_CLTE1 DISP_BIT_IB01 -#define DISP_BITMASK_CLTE0 DISP_BIT_IB00 -/* DISP_LTPS_CTL_5_ADDR LTPS Interface Control (5) */ -#define DISP_BITMASK_OEVBE3 DISP_BIT_IB11 -#define DISP_BITMASK_OEVBE2 DISP_BIT_IB10 -#define DISP_BITMASK_OEVBE1 DISP_BIT_IB09 -#define DISP_BITMASK_OEVBE0 DISP_BIT_IB08 -#define DISP_BITMASK_OEVFE3 DISP_BIT_IB03 -#define DISP_BITMASK_OEVFE2 DISP_BIT_IB02 -#define DISP_BITMASK_OEVFE1 DISP_BIT_IB01 -#define DISP_BITMASK_OEVFE0 DISP_BIT_IB00 -/* DISP_LTPS_CTL_6_ADDR LTPS Interface Control (6) */ -#define DISP_BITMASK_SHE3 DISP_BIT_IB03 -#define DISP_BITMASK_SHE2 DISP_BIT_IB02 -#define DISP_BITMASK_SHE1 DISP_BIT_IB01 -#define DISP_BITMASK_SHE0 DISP_BIT_IB00 -/* DISP_AMP_SETTING_ADDR Amplify Setting */ -#define DISP_BITMASK_ABSW1 DISP_BIT_IB01 -#define DISP_BITMASK_ABSW0 DISP_BIT_IB00 -/* DISP_MODE_SETTING_ADDR Mode Setting */ -#define DISP_BITMASK_DSTB DISP_BIT_IB02 -#define DISP_BITMASK_STB DISP_BIT_IB00 -/* DISP_POFF_LN_SETTING_ADDR Power Off Line Setting */ -#define DISP_BITMASK_POFH3 DISP_BIT_IB03 -#define DISP_BITMASK_POFH2 DISP_BIT_IB02 -#define DISP_BITMASK_POFH1 DISP_BIT_IB01 -#define DISP_BITMASK_POFH0 DISP_BIT_IB00 - -/* Power Contol */ -/* DISP_POWER_CTL_1_ADDR Power Control (1) */ -#define DISP_BITMASK_PO DISP_BIT_IB11 -#define DISP_BITMASK_VCD DISP_BIT_IB09 -#define DISP_BITMASK_VSC DISP_BIT_IB08 -#define DISP_BITMASK_CON DISP_BIT_IB07 -#define DISP_BITMASK_ASW1 DISP_BIT_IB06 -#define DISP_BITMASK_ASW0 DISP_BIT_IB05 -#define DISP_BITMASK_OEV DISP_BIT_IB04 -#define DISP_BITMASK_OEVE DISP_BIT_IB03 -#define DISP_BITMASK_FR DISP_BIT_IB02 -#define DISP_BITMASK_D1 DISP_BIT_IB01 -#define DISP_BITMASK_D0 DISP_BIT_IB00 -/* DISP_POWER_CTL_2_ADDR Power Control (2) */ -#define DISP_BITMASK_DC4 DISP_BIT_IB15 -#define DISP_BITMASK_DC3 DISP_BIT_IB14 -#define DISP_BITMASK_SAP2 DISP_BIT_IB13 -#define DISP_BITMASK_SAP1 DISP_BIT_IB12 -#define DISP_BITMASK_SAP0 DISP_BIT_IB11 -#define DISP_BITMASK_BT2 DISP_BIT_IB10 -#define DISP_BITMASK_BT1 DISP_BIT_IB09 -#define DISP_BITMASK_BT0 DISP_BIT_IB08 -#define DISP_BITMASK_DC2 DISP_BIT_IB07 -#define DISP_BITMASK_DC1 DISP_BIT_IB06 -#define DISP_BITMASK_DC0 DISP_BIT_IB05 -#define DISP_BITMASK_AP2 DISP_BIT_IB04 -#define DISP_BITMASK_AP1 DISP_BIT_IB03 -#define DISP_BITMASK_AP0 DISP_BIT_IB02 -/* DISP_POWER_CTL_3_ADDR Power Control (3) */ -#define DISP_BITMASK_VGL4 DISP_BIT_IB10 -#define DISP_BITMASK_VGL3 DISP_BIT_IB09 -#define DISP_BITMASK_VGL2 DISP_BIT_IB08 -#define DISP_BITMASK_VGL1 DISP_BIT_IB07 -#define DISP_BITMASK_VGL0 DISP_BIT_IB06 -#define DISP_BITMASK_VGH4 DISP_BIT_IB04 -#define DISP_BITMASK_VGH3 DISP_BIT_IB03 -#define DISP_BITMASK_VGH2 DISP_BIT_IB02 -#define DISP_BITMASK_VGH1 DISP_BIT_IB01 -#define DISP_BITMASK_VGH0 DISP_BIT_IB00 -/* DISP_POWER_CTL_4_ADDR Power Control (4) */ -#define DISP_BITMASK_VC2 DISP_BIT_IB02 -#define DISP_BITMASK_VC1 DISP_BIT_IB01 -#define DISP_BITMASK_VC0 DISP_BIT_IB00 -/* DISP_POWER_CTL_5_ADDR Power Control (5) */ -#define DISP_BITMASK_VRL3 DISP_BIT_IB11 -#define DISP_BITMASK_VRL2 DISP_BIT_IB10 -#define DISP_BITMASK_VRL1 DISP_BIT_IB09 -#define DISP_BITMASK_VRL0 DISP_BIT_IB08 -#define DISP_BITMASK_PON DISP_BIT_IB04 -#define DISP_BITMASK_VRH3 DISP_BIT_IB03 -#define DISP_BITMASK_VRH2 DISP_BIT_IB02 -#define DISP_BITMASK_VRH1 DISP_BIT_IB01 -#define DISP_BITMASK_VRH0 DISP_BIT_IB00 -/* DISP_POWER_CTL_6_ADDR Power Control (6) */ -#define DISP_BITMASK_VCOMG DISP_BIT_IB13 -#define DISP_BITMASK_VDV4 DISP_BIT_IB12 -#define DISP_BITMASK_VDV3 DISP_BIT_IB11 -#define DISP_BITMASK_VDV2 DISP_BIT_IB10 -#define DISP_BITMASK_VDV1 DISP_BIT_IB09 -#define DISP_BITMASK_VDV0 DISP_BIT_IB08 -#define DISP_BITMASK_VCM4 DISP_BIT_IB04 -#define DISP_BITMASK_VCM3 DISP_BIT_IB03 -#define DISP_BITMASK_VCM2 DISP_BIT_IB02 -#define DISP_BITMASK_VCM1 DISP_BIT_IB01 -#define DISP_BITMASK_VCM0 DISP_BIT_IB00 -/* RAM Access */ -/* DISP_RAM_ADDR_SET_1_ADDR RAM Address Set (1) */ -#define DISP_BITMASK_AD7 DISP_BIT_IB07 -#define DISP_BITMASK_AD6 DISP_BIT_IB06 -#define DISP_BITMASK_AD5 DISP_BIT_IB05 -#define DISP_BITMASK_AD4 DISP_BIT_IB04 -#define DISP_BITMASK_AD3 DISP_BIT_IB03 -#define DISP_BITMASK_AD2 DISP_BIT_IB02 -#define DISP_BITMASK_AD1 DISP_BIT_IB01 -#define DISP_BITMASK_AD0 DISP_BIT_IB00 -/* DISP_RAM_ADDR_SET_2_ADDR RAM Address Set (2) */ -#define DISP_BITMASK_AD16 DISP_BIT_IB08 -#define DISP_BITMASK_AD15 DISP_BIT_IB07 -#define DISP_BITMASK_AD14 DISP_BIT_IB06 -#define DISP_BITMASK_AD13 DISP_BIT_IB05 -#define DISP_BITMASK_AD12 DISP_BIT_IB04 -#define DISP_BITMASK_AD11 DISP_BIT_IB03 -#define DISP_BITMASK_AD10 DISP_BIT_IB02 -#define DISP_BITMASK_AD9 DISP_BIT_IB01 -#define DISP_BITMASK_AD8 DISP_BIT_IB00 -/* - * DISP_CMD_RAMWR RAM Data Read/Write - * Use Data Bit Configuration - */ -/* DISP_RAM_DATA_MASK_1_ADDR RAM Write Data Mask (1) */ -#define DISP_BITMASK_WM11 DISP_BIT_IB13 -#define DISP_BITMASK_WM10 DISP_BIT_IB12 -#define DISP_BITMASK_WM9 DISP_BIT_IB11 -#define DISP_BITMASK_WM8 DISP_BIT_IB10 -#define DISP_BITMASK_WM7 DISP_BIT_IB09 -#define DISP_BITMASK_WM6 DISP_BIT_IB08 -#define DISP_BITMASK_WM5 DISP_BIT_IB05 -#define DISP_BITMASK_WM4 DISP_BIT_IB04 -#define DISP_BITMASK_WM3 DISP_BIT_IB03 -#define DISP_BITMASK_WM2 DISP_BIT_IB02 -#define DISP_BITMASK_WM1 DISP_BIT_IB01 -#define DISP_BITMASK_WM0 DISP_BIT_IB00 -/* DISP_RAM_DATA_MASK_2_ADDR RAM Write Data Mask (2) */ -#define DISP_BITMASK_WM17 DISP_BIT_IB05 -#define DISP_BITMASK_WM16 DISP_BIT_IB04 -#define DISP_BITMASK_WM15 DISP_BIT_IB03 -#define DISP_BITMASK_WM14 DISP_BIT_IB02 -#define DISP_BITMASK_WM13 DISP_BIT_IB01 -#define DISP_BITMASK_WM12 DISP_BIT_IB00 -/*Gamma Control */ -/* DISP_GAMMA_CONTROL_1_ADDR Gamma Control (1) */ -#define DISP_BITMASK_PKP12 DISP_BIT_IB10 -#define DISP_BITMASK_PKP11 DISP_BIT_IB08 -#define DISP_BITMASK_PKP10 DISP_BIT_IB09 -#define DISP_BITMASK_PKP02 DISP_BIT_IB02 -#define DISP_BITMASK_PKP01 DISP_BIT_IB01 -#define DISP_BITMASK_PKP00 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_2_ADDR Gamma Control (2) */ -#define DISP_BITMASK_PKP32 DISP_BIT_IB10 -#define DISP_BITMASK_PKP31 DISP_BIT_IB09 -#define DISP_BITMASK_PKP30 DISP_BIT_IB08 -#define DISP_BITMASK_PKP22 DISP_BIT_IB02 -#define DISP_BITMASK_PKP21 DISP_BIT_IB01 -#define DISP_BITMASK_PKP20 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_3_ADDR Gamma Control (3) */ -#define DISP_BITMASK_PKP52 DISP_BIT_IB10 -#define DISP_BITMASK_PKP51 DISP_BIT_IB09 -#define DISP_BITMASK_PKP50 DISP_BIT_IB08 -#define DISP_BITMASK_PKP42 DISP_BIT_IB02 -#define DISP_BITMASK_PKP41 DISP_BIT_IB01 -#define DISP_BITMASK_PKP40 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_4_ADDR Gamma Control (4) */ -#define DISP_BITMASK_PRP12 DISP_BIT_IB10 -#define DISP_BITMASK_PRP11 DISP_BIT_IB08 -#define DISP_BITMASK_PRP10 DISP_BIT_IB09 -#define DISP_BITMASK_PRP02 DISP_BIT_IB02 -#define DISP_BITMASK_PRP01 DISP_BIT_IB01 -#define DISP_BITMASK_PRP00 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_5_ADDR Gamma Control (5) */ -#define DISP_BITMASK_VRP14 DISP_BIT_IB12 -#define DISP_BITMASK_VRP13 DISP_BIT_IB11 -#define DISP_BITMASK_VRP12 DISP_BIT_IB10 -#define DISP_BITMASK_VRP11 DISP_BIT_IB08 -#define DISP_BITMASK_VRP10 DISP_BIT_IB09 -#define DISP_BITMASK_VRP03 DISP_BIT_IB03 -#define DISP_BITMASK_VRP02 DISP_BIT_IB02 -#define DISP_BITMASK_VRP01 DISP_BIT_IB01 -#define DISP_BITMASK_VRP00 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_6_ADDR Gamma Control (6) */ -#define DISP_BITMASK_PKN12 DISP_BIT_IB10 -#define DISP_BITMASK_PKN11 DISP_BIT_IB08 -#define DISP_BITMASK_PKN10 DISP_BIT_IB09 -#define DISP_BITMASK_PKN02 DISP_BIT_IB02 -#define DISP_BITMASK_PKN01 DISP_BIT_IB01 -#define DISP_BITMASK_PKN00 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_7_ADDR Gamma Control (7) */ -#define DISP_BITMASK_PKN32 DISP_BIT_IB10 -#define DISP_BITMASK_PKN31 DISP_BIT_IB08 -#define DISP_BITMASK_PKN30 DISP_BIT_IB09 -#define DISP_BITMASK_PKN22 DISP_BIT_IB02 -#define DISP_BITMASK_PKN21 DISP_BIT_IB01 -#define DISP_BITMASK_PKN20 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_8_ADDR Gamma Control (8) */ -#define DISP_BITMASK_PKN52 DISP_BIT_IB10 -#define DISP_BITMASK_PKN51 DISP_BIT_IB08 -#define DISP_BITMASK_PKN50 DISP_BIT_IB09 -#define DISP_BITMASK_PKN42 DISP_BIT_IB02 -#define DISP_BITMASK_PKN41 DISP_BIT_IB01 -#define DISP_BITMASK_PKN40 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_9_ADDR Gamma Control (9) */ -#define DISP_BITMASK_PRN12 DISP_BIT_IB10 -#define DISP_BITMASK_PRN11 DISP_BIT_IB08 -#define DISP_BITMASK_PRN10 DISP_BIT_IB09 -#define DISP_BITMASK_PRN02 DISP_BIT_IB02 -#define DISP_BITMASK_PRN01 DISP_BIT_IB01 -#define DISP_BITMASK_PRN00 DISP_BIT_IB00 -/* DISP_GAMMA_CONTROL_10_ADDR Gamma Control (10) */ -#define DISP_BITMASK_VRN14 DISP_BIT_IB12 -#define DISP_BITMASK_VRN13 DISP_BIT_IB11 -#define DISP_BITMASK_VRN12 DISP_BIT_IB10 -#define DISP_BITMASK_VRN11 DISP_BIT_IB08 -#define DISP_BITMASK_VRN10 DISP_BIT_IB09 -#define DISP_BITMASK_VRN03 DISP_BIT_IB03 -#define DISP_BITMASK_VRN02 DISP_BIT_IB02 -#define DISP_BITMASK_VRN01 DISP_BIT_IB01 -#define DISP_BITMASK_VRN00 DISP_BIT_IB00 -/* Coordinate Control */ -/* DISP_VERT_SCROLL_CTL_1_ADDR Vertical Scroll Control (1) */ -#define DISP_BITMASK_VL18 DISP_BIT_IB08 -#define DISP_BITMASK_VL17 DISP_BIT_IB07 -#define DISP_BITMASK_VL16 DISP_BIT_IB06 -#define DISP_BITMASK_VL15 DISP_BIT_IB05 -#define DISP_BITMASK_VL14 DISP_BIT_IB04 -#define DISP_BITMASK_VL13 DISP_BIT_IB03 -#define DISP_BITMASK_VL12 DISP_BIT_IB02 -#define DISP_BITMASK_VL11 DISP_BIT_IB01 -#define DISP_BITMASK_VL10 DISP_BIT_IB00 -/* DISP_VERT_SCROLL_CTL_2_ADDR Vertical Scroll Control (2) */ -#define DISP_BITMASK_VL28 DISP_BIT_IB08 -#define DISP_BITMASK_VL27 DISP_BIT_IB07 -#define DISP_BITMASK_VL26 DISP_BIT_IB06 -#define DISP_BITMASK_VL25 DISP_BIT_IB05 -#define DISP_BITMASK_VL24 DISP_BIT_IB04 -#define DISP_BITMASK_VL23 DISP_BIT_IB03 -#define DISP_BITMASK_VL22 DISP_BIT_IB02 -#define DISP_BITMASK_VL21 DISP_BIT_IB01 -#define DISP_BITMASK_VL20 DISP_BIT_IB00 -/* DISP_SCREEN_1_DRV_POS_1_ADDR First Screen Driving Position (1) */ -#define DISP_BITMASK_SS18 DISP_BIT_IB08 -#define DISP_BITMASK_SS17 DISP_BIT_IB07 -#define DISP_BITMASK_SS16 DISP_BIT_IB06 -#define DISP_BITMASK_SS15 DISP_BIT_IB05 -#define DISP_BITMASK_SS14 DISP_BIT_IB04 -#define DISP_BITMASK_SS13 DISP_BIT_IB03 -#define DISP_BITMASK_SS12 DISP_BIT_IB02 -#define DISP_BITMASK_SS11 DISP_BIT_IB01 -#define DISP_BITMASK_SS10 DISP_BIT_IB00 -/* DISP_SCREEN_1_DRV_POS_2_ADDR First Screen Driving Position (2) */ -#define DISP_BITMASK_SE18 DISP_BIT_IB08 -#define DISP_BITMASK_SE17 DISP_BIT_IB07 -#define DISP_BITMASK_SE16 DISP_BIT_IB06 -#define DISP_BITMASK_SE15 DISP_BIT_IB05 -#define DISP_BITMASK_SE14 DISP_BIT_IB04 -#define DISP_BITMASK_SE13 DISP_BIT_IB03 -#define DISP_BITMASK_SE12 DISP_BIT_IB02 -#define DISP_BITMASK_SE11 DISP_BIT_IB01 -#define DISP_BITMASK_SE10 DISP_BIT_IB00 -/* DISP_SCREEN_2_DRV_POS_1_ADDR Second Screen Driving Position (1) */ -#define DISP_BITMASK_SS28 DISP_BIT_IB08 -#define DISP_BITMASK_SS27 DISP_BIT_IB07 -#define DISP_BITMASK_SS26 DISP_BIT_IB06 -#define DISP_BITMASK_SS25 DISP_BIT_IB05 -#define DISP_BITMASK_SS24 DISP_BIT_IB04 -#define DISP_BITMASK_SS23 DISP_BIT_IB03 -#define DISP_BITMASK_SS22 DISP_BIT_IB02 -#define DISP_BITMASK_SS21 DISP_BIT_IB01 -#define DISP_BITMASK_SS20 DISP_BIT_IB00 -/* DISP_SCREEN_3_DRV_POS_2_ADDR Second Screen Driving Position (2) */ -#define DISP_BITMASK_SE28 DISP_BIT_IB08 -#define DISP_BITMASK_SE27 DISP_BIT_IB07 -#define DISP_BITMASK_SE26 DISP_BIT_IB06 -#define DISP_BITMASK_SE25 DISP_BIT_IB05 -#define DISP_BITMASK_SE24 DISP_BIT_IB04 -#define DISP_BITMASK_SE23 DISP_BIT_IB03 -#define DISP_BITMASK_SE22 DISP_BIT_IB02 -#define DISP_BITMASK_SE21 DISP_BIT_IB01 -#define DISP_BITMASK_SE20 DISP_BIT_IB00 -/* DISP_HORZ_RAM_ADDR_POS_1_ADDR Horizontal RAM Address Position (1) */ -#define DISP_BITMASK_HSA7 DISP_BIT_IB07 -#define DISP_BITMASK_HSA6 DISP_BIT_IB06 -#define DISP_BITMASK_HSA5 DISP_BIT_IB05 -#define DISP_BITMASK_HSA4 DISP_BIT_IB04 -#define DISP_BITMASK_HSA3 DISP_BIT_IB03 -#define DISP_BITMASK_HSA2 DISP_BIT_IB02 -#define DISP_BITMASK_HSA1 DISP_BIT_IB01 -#define DISP_BITMASK_HSA0 DISP_BIT_IB00 -/* DISP_HORZ_RAM_ADDR_POS_2_ADDR Horizontal RAM Address Position (2) */ -#define DISP_BITMASK_HEA7 DISP_BIT_IB07 -#define DISP_BITMASK_HEA6 DISP_BIT_IB06 -#define DISP_BITMASK_HEA5 DISP_BIT_IB05 -#define DISP_BITMASK_HEA4 DISP_BIT_IB04 -#define DISP_BITMASK_HEA3 DISP_BIT_IB03 -#define DISP_BITMASK_HEA2 DISP_BIT_IB02 -#define DISP_BITMASK_HEA1 DISP_BIT_IB01 -#define DISP_BITMASK_HEA0 DISP_BIT_IB00 -/* DISP_VERT_RAM_ADDR_POS_1_ADDR Vertical RAM Address Position (1) */ -#define DISP_BITMASK_VSA8 DISP_BIT_IB08 -#define DISP_BITMASK_VSA7 DISP_BIT_IB07 -#define DISP_BITMASK_VSA6 DISP_BIT_IB06 -#define DISP_BITMASK_VSA5 DISP_BIT_IB05 -#define DISP_BITMASK_VSA4 DISP_BIT_IB04 -#define DISP_BITMASK_VSA3 DISP_BIT_IB03 -#define DISP_BITMASK_VSA2 DISP_BIT_IB02 -#define DISP_BITMASK_VSA1 DISP_BIT_IB01 -#define DISP_BITMASK_VSA0 DISP_BIT_IB00 -/* DISP_VERT_RAM_ADDR_POS_2_ADDR Vertical RAM Address Position (2) */ -#define DISP_BITMASK_VEA8 DISP_BIT_IB08 -#define DISP_BITMASK_VEA7 DISP_BIT_IB07 -#define DISP_BITMASK_VEA6 DISP_BIT_IB06 -#define DISP_BITMASK_VEA5 DISP_BIT_IB05 -#define DISP_BITMASK_VEA4 DISP_BIT_IB04 -#define DISP_BITMASK_VEA3 DISP_BIT_IB03 -#define DISP_BITMASK_VEA2 DISP_BIT_IB02 -#define DISP_BITMASK_VEA1 DISP_BIT_IB01 -#define DISP_BITMASK_VEA0 DISP_BIT_IB00 -static word disp_area_start_row; -static word disp_area_end_row; -static boolean disp_initialized = FALSE; -/* For some reason the contrast set at init time is not good. Need to do -* it again -*/ -static boolean display_on = FALSE; - -static uint32 tmd20qvga_lcd_rev; -uint16 tmd20qvga_panel_offset; - -#ifdef DISP_DEVICE_8BPP -static word convert_8_to_16_tbl[256] = { - 0x0000, 0x2000, 0x4000, 0x6000, 0x8000, 0xA000, 0xC000, 0xE000, - 0x0100, 0x2100, 0x4100, 0x6100, 0x8100, 0xA100, 0xC100, 0xE100, - 0x0200, 0x2200, 0x4200, 0x6200, 0x8200, 0xA200, 0xC200, 0xE200, - 0x0300, 0x2300, 0x4300, 0x6300, 0x8300, 0xA300, 0xC300, 0xE300, - 0x0400, 0x2400, 0x4400, 0x6400, 0x8400, 0xA400, 0xC400, 0xE400, - 0x0500, 0x2500, 0x4500, 0x6500, 0x8500, 0xA500, 0xC500, 0xE500, - 0x0600, 0x2600, 0x4600, 0x6600, 0x8600, 0xA600, 0xC600, 0xE600, - 0x0700, 0x2700, 0x4700, 0x6700, 0x8700, 0xA700, 0xC700, 0xE700, - 0x0008, 0x2008, 0x4008, 0x6008, 0x8008, 0xA008, 0xC008, 0xE008, - 0x0108, 0x2108, 0x4108, 0x6108, 0x8108, 0xA108, 0xC108, 0xE108, - 0x0208, 0x2208, 0x4208, 0x6208, 0x8208, 0xA208, 0xC208, 0xE208, - 0x0308, 0x2308, 0x4308, 0x6308, 0x8308, 0xA308, 0xC308, 0xE308, - 0x0408, 0x2408, 0x4408, 0x6408, 0x8408, 0xA408, 0xC408, 0xE408, - 0x0508, 0x2508, 0x4508, 0x6508, 0x8508, 0xA508, 0xC508, 0xE508, - 0x0608, 0x2608, 0x4608, 0x6608, 0x8608, 0xA608, 0xC608, 0xE608, - 0x0708, 0x2708, 0x4708, 0x6708, 0x8708, 0xA708, 0xC708, 0xE708, - 0x0010, 0x2010, 0x4010, 0x6010, 0x8010, 0xA010, 0xC010, 0xE010, - 0x0110, 0x2110, 0x4110, 0x6110, 0x8110, 0xA110, 0xC110, 0xE110, - 0x0210, 0x2210, 0x4210, 0x6210, 0x8210, 0xA210, 0xC210, 0xE210, - 0x0310, 0x2310, 0x4310, 0x6310, 0x8310, 0xA310, 0xC310, 0xE310, - 0x0410, 0x2410, 0x4410, 0x6410, 0x8410, 0xA410, 0xC410, 0xE410, - 0x0510, 0x2510, 0x4510, 0x6510, 0x8510, 0xA510, 0xC510, 0xE510, - 0x0610, 0x2610, 0x4610, 0x6610, 0x8610, 0xA610, 0xC610, 0xE610, - 0x0710, 0x2710, 0x4710, 0x6710, 0x8710, 0xA710, 0xC710, 0xE710, - 0x0018, 0x2018, 0x4018, 0x6018, 0x8018, 0xA018, 0xC018, 0xE018, - 0x0118, 0x2118, 0x4118, 0x6118, 0x8118, 0xA118, 0xC118, 0xE118, - 0x0218, 0x2218, 0x4218, 0x6218, 0x8218, 0xA218, 0xC218, 0xE218, - 0x0318, 0x2318, 0x4318, 0x6318, 0x8318, 0xA318, 0xC318, 0xE318, - 0x0418, 0x2418, 0x4418, 0x6418, 0x8418, 0xA418, 0xC418, 0xE418, - 0x0518, 0x2518, 0x4518, 0x6518, 0x8518, 0xA518, 0xC518, 0xE518, - 0x0618, 0x2618, 0x4618, 0x6618, 0x8618, 0xA618, 0xC618, 0xE618, - 0x0718, 0x2718, 0x4718, 0x6718, 0x8718, 0xA718, 0xC718, 0xE718 -}; -#endif /* DISP_DEVICE_8BPP */ - -static void tmd20qvga_disp_set_rect(int x, int y, int xres, int yres); -static void tmd20qvga_disp_init(struct platform_device *pdev); -static void tmd20qvga_disp_set_contrast(void); -static void tmd20qvga_disp_set_display_area(word start_row, word end_row); -static int tmd20qvga_disp_off(struct platform_device *pdev); -static int tmd20qvga_disp_on(struct platform_device *pdev); -static void tmd20qvga_set_revId(int); - -/* future use */ -void tmd20qvga_disp_clear_screen_area(word start_row, word end_row, - word start_column, word end_column); - -static void tmd20qvga_set_revId(int id) -{ - - tmd20qvga_lcd_rev = id; - - if (tmd20qvga_lcd_rev == 1) - tmd20qvga_panel_offset = 0x10; - else - tmd20qvga_panel_offset = 0; -} - -static void tmd20qvga_disp_init(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - if (disp_initialized) - return; - - mfd = platform_get_drvdata(pdev); - - DISP_CMD_PORT = mfd->cmd_port; - DISP_DATA_PORT = mfd->data_port; - -#ifdef TMD20QVGA_LCD_18BPP - tmd20qvga_set_revId(2); -#else - tmd20qvga_set_revId(1); -#endif - - disp_initialized = TRUE; - tmd20qvga_disp_set_contrast(); - tmd20qvga_disp_set_display_area(0, QVGA_HEIGHT - 1); -} - -static void tmd20qvga_disp_set_rect(int x, int y, int xres, int yres) -{ - if (!disp_initialized) - return; - - DISP_SET_RECT(y, y + yres - 1, x, x + xres - 1); - - DISP_CMD_OUT(DISP_CMD_RAMWR); -} - -static void tmd20qvga_disp_set_display_area(word start_row, word end_row) -{ - word start_driving = start_row; - word end_driving = end_row; - - if (!disp_initialized) - return; - - /* Range checking - */ - if (end_driving >= QVGA_HEIGHT) - end_driving = QVGA_HEIGHT - 1; - if (start_driving > end_driving) { - /* Probably Backwards Switch */ - start_driving = end_driving; - end_driving = start_row; /* Has not changed */ - if (end_driving >= QVGA_HEIGHT) - end_driving = QVGA_HEIGHT - 1; - } - - if ((start_driving == disp_area_start_row) - && (end_driving == disp_area_end_row)) - return; - - disp_area_start_row = start_driving; - disp_area_end_row = end_driving; - - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR, - DISP_VAL_IF(start_driving & 0x100, - DISP_BITMASK_SS18) | - DISP_VAL_IF(start_driving & 0x080, - DISP_BITMASK_SS17) | - DISP_VAL_IF(start_driving & 0x040, - DISP_BITMASK_SS16) | - DISP_VAL_IF(start_driving & 0x020, - DISP_BITMASK_SS15) | - DISP_VAL_IF(start_driving & 0x010, - DISP_BITMASK_SS14) | - DISP_VAL_IF(start_driving & 0x008, - DISP_BITMASK_SS13) | - DISP_VAL_IF(start_driving & 0x004, - DISP_BITMASK_SS12) | - DISP_VAL_IF(start_driving & 0x002, - DISP_BITMASK_SS11) | - DISP_VAL_IF(start_driving & 0x001, DISP_BITMASK_SS10)); - - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR, - DISP_VAL_IF(end_driving & 0x100, DISP_BITMASK_SE18) | - DISP_VAL_IF(end_driving & 0x080, DISP_BITMASK_SE17) | - DISP_VAL_IF(end_driving & 0x040, DISP_BITMASK_SE16) | - DISP_VAL_IF(end_driving & 0x020, DISP_BITMASK_SE15) | - DISP_VAL_IF(end_driving & 0x010, DISP_BITMASK_SE14) | - DISP_VAL_IF(end_driving & 0x008, DISP_BITMASK_SE13) | - DISP_VAL_IF(end_driving & 0x004, DISP_BITMASK_SE12) | - DISP_VAL_IF(end_driving & 0x002, DISP_BITMASK_SE11) | - DISP_VAL_IF(end_driving & 0x001, DISP_BITMASK_SE10)); -} - -static int tmd20qvga_disp_off(struct platform_device *pdev) -{ - if (!disp_initialized) - tmd20qvga_disp_init(pdev); - - if (display_on) { - if (tmd20qvga_lcd_rev == 2) { - DISP_WRITE_OUT(DISP_POFF_LN_SETTING_ADDR, 0x000A); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xFFEE); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xF812); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xE811); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xC011); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x4011); - WAIT_MSEC(20); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0010); - - } else { - DISP_WRITE_OUT(DISP_POFF_LN_SETTING_ADDR, 0x000F); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BFE); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BED); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(40); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x00CD); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(20); - DISP_WRITE_OUT(DISP_START_OSCILLATION_ADDR, 0x0); - } - - DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0004); - DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0000); - - display_on = FALSE; - } - - return 0; -} - -static int tmd20qvga_disp_on(struct platform_device *pdev) -{ - if (!disp_initialized) - tmd20qvga_disp_init(pdev); - - if (!display_on) { - /* Deep Stand-by -> Stand-by */ - DISP_CMD_OUT(DISP_START_OSCILLATION_ADDR); - WAIT_MSEC(1); - DISP_CMD_OUT(DISP_START_OSCILLATION_ADDR); - WAIT_MSEC(1); - DISP_CMD_OUT(DISP_START_OSCILLATION_ADDR); - WAIT_MSEC(1); - - /* OFF -> Deep Stan-By -> Stand-by */ - /* let's change the state from "Stand-by" to "Sleep" */ - DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0005); - WAIT_MSEC(1); - - /* Sleep -> Displaying */ - DISP_WRITE_OUT(DISP_START_OSCILLATION_ADDR, 0x0001); - DISP_WRITE_OUT(DISP_DRIVER_OUTPUT_CTL_ADDR, 0x0127); - DISP_WRITE_OUT(DISP_LCD_DRIVING_SIG_ADDR, 0x200); - /* fast write mode */ - DISP_WRITE_OUT(DISP_ENTRY_MODE_ADDR, 0x0130); - if (tmd20qvga_lcd_rev == 2) - DISP_WRITE_OUT(DISP_TMD_700_ADDR, 0x0003); - /* back porch = 14 + front porch = 2 --> 16 lines */ - if (tmd20qvga_lcd_rev == 2) { -#ifdef TMD20QVGA_LCD_18BPP - /* 256k color */ - DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x0000); -#else - /* 65k color */ - DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x4000); -#endif - DISP_WRITE_OUT(DISP_DISPLAY_CTL_2_ADDR, 0x0302); - } else { -#ifdef TMD20QVGA_LCD_18BPP - /* 256k color */ - DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x0004); -#else - /* 65k color */ - DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x4004); -#endif - DISP_WRITE_OUT(DISP_DISPLAY_CTL_2_ADDR, 0x020E); - } - /* 16 bit one transfer */ - if (tmd20qvga_lcd_rev == 2) { - DISP_WRITE_OUT(DISP_EXT_DISPLAY_CTL_1_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_FRAME_CYCLE_CTL_ADDR, 0x0010); - DISP_WRITE_OUT(DISP_LTPS_CTL_1_ADDR, 0x0302); - DISP_WRITE_OUT(DISP_LTPS_CTL_2_ADDR, 0x0102); - DISP_WRITE_OUT(DISP_LTPS_CTL_3_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_TMD_015_ADDR, 0x2000); - - DISP_WRITE_OUT(DISP_AMP_SETTING_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0304); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0403); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0101); - DISP_WRITE_OUT(DISP_TMD_305_ADDR, 0); - - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR, 0x013F); - - DISP_WRITE_OUT(DISP_POWER_CTL_3_ADDR, 0x077D); - - DISP_WRITE_OUT(DISP_POWER_CTL_4_ADDR, 0x0005); - DISP_WRITE_OUT(DISP_POWER_CTL_5_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_POWER_CTL_6_ADDR, 0x0015); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xC010); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x0001); - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xFFFE); - WAIT_MSEC(60); - } else { - DISP_WRITE_OUT(DISP_EXT_DISPLAY_CTL_1_ADDR, 0x0001); - DISP_WRITE_OUT(DISP_FRAME_CYCLE_CTL_ADDR, 0x0010); - DISP_WRITE_OUT(DISP_LTPS_CTL_1_ADDR, 0x0301); - DISP_WRITE_OUT(DISP_LTPS_CTL_2_ADDR, 0x0001); - DISP_WRITE_OUT(DISP_LTPS_CTL_3_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_AMP_SETTING_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0507); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0405); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0607); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0502); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0301); - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR, 0x013F); - DISP_WRITE_OUT(DISP_POWER_CTL_3_ADDR, 0x0795); - - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0102); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_4_ADDR, 0x0450); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0103); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_5_ADDR, 0x0008); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0104); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_6_ADDR, 0x0C00); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0105); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_7_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0106); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0801); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(1); - - DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x001F); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0101); - WAIT_MSEC(60); - - DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x009F); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0101); - WAIT_MSEC(10); - - DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_1_ADDR, 0x0010); - DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_2_ADDR, 0x00FF); - DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_1_ADDR, 0x0000); - DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_2_ADDR, 0x013F); - /* RAM starts at address 0x10 */ - DISP_WRITE_OUT(DISP_RAM_ADDR_SET_1_ADDR, 0x0010); - DISP_WRITE_OUT(DISP_RAM_ADDR_SET_2_ADDR, 0x0000); - - /* lcd controller uses internal clock, not ext. vsync */ - DISP_CMD_OUT(DISP_CMD_RAMWR); - - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0881); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(40); - - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BE1); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - WAIT_MSEC(40); - - DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BFF); - DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100); - } - display_on = TRUE; - } - - return 0; -} - -static void tmd20qvga_disp_set_contrast(void) -{ -#if (defined(TMD20QVGA_LCD_18BPP)) - - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0302); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0403); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0F07); - -#else - int newcontrast = 0x46; - - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403); - - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, - DISP_VAL_IF(newcontrast & 0x0001, DISP_BITMASK_PKP20) | - DISP_VAL_IF(newcontrast & 0x0002, DISP_BITMASK_PKP21) | - DISP_VAL_IF(newcontrast & 0x0004, DISP_BITMASK_PKP22) | - DISP_VAL_IF(newcontrast & 0x0010, DISP_BITMASK_PKP30) | - DISP_VAL_IF(newcontrast & 0x0020, DISP_BITMASK_PKP31) | - DISP_VAL_IF(newcontrast & 0x0040, DISP_BITMASK_PKP32)); - - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, - DISP_VAL_IF(newcontrast & 0x0010, DISP_BITMASK_PKP40) | - DISP_VAL_IF(newcontrast & 0x0020, DISP_BITMASK_PKP41) | - DISP_VAL_IF(newcontrast & 0x0040, DISP_BITMASK_PKP42) | - DISP_VAL_IF(newcontrast & 0x0001, DISP_BITMASK_PKP50) | - DISP_VAL_IF(newcontrast & 0x0002, DISP_BITMASK_PKP51) | - DISP_VAL_IF(newcontrast & 0x0004, DISP_BITMASK_PKP52)); - - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303); - DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0F07); - -#endif /* defined(TMD20QVGA_LCD_18BPP) */ - -} /* End disp_set_contrast */ - -void tmd20qvga_disp_clear_screen_area - (word start_row, word end_row, word start_column, word end_column) { - int32 i; - - /* Clear the display screen */ - DISP_SET_RECT(start_row, end_row, start_column, end_column); - DISP_CMD_OUT(DISP_CMD_RAMWR); - i = (end_row - start_row + 1) * (end_column - start_column + 1); - for (; i > 0; i--) - DISP_DATA_OUT_16TO18BPP(0x0); -} - -static int __init tmd20qvga_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = tmd20qvga_probe, - .driver = { - .name = "ebi2_tmd_qvga", - }, -}; - -static struct msm_fb_panel_data tmd20qvga_panel_data = { - .on = tmd20qvga_disp_on, - .off = tmd20qvga_disp_off, - .set_rect = tmd20qvga_disp_set_rect, -}; - -static struct platform_device this_device = { - .name = "ebi2_tmd_qvga", - .id = 0, - .dev = { - .platform_data = &tmd20qvga_panel_data, - } -}; - -static int __init tmd20qvga_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - - ret = platform_driver_register(&this_driver); - if (!ret) { - pinfo = &tmd20qvga_panel_data.panel_info; - pinfo->xres = 240; - pinfo->yres = 320; - pinfo->type = EBI2_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->wait_cycle = 0x808000; -#ifdef TMD20QVGA_LCD_18BPP - pinfo->bpp = 18; -#else - pinfo->bpp = 16; -#endif - pinfo->fb_num = 2; - pinfo->lcd.vsync_enable = TRUE; - pinfo->lcd.refx100 = 6000; - pinfo->lcd.v_back_porch = 16; - pinfo->lcd.v_front_porch = 4; - pinfo->lcd.v_pulse_width = 0; - pinfo->lcd.hw_vsync_mode = FALSE; - pinfo->lcd.vsync_notifier_period = 0; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(tmd20qvga_init); diff --git a/drivers/staging/msm/hdmi_sii9022.c b/drivers/staging/msm/hdmi_sii9022.c deleted file mode 100644 index 6b82b56..0000000 --- a/drivers/staging/msm/hdmi_sii9022.c +++ /dev/null @@ -1,248 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include "msm_fb.h" - -#define DEVICE_NAME "sii9022" -#define SII9022_DEVICE_ID 0xB0 - -struct sii9022_i2c_addr_data{ - u8 addr; - u8 data; -}; - -/* video mode data */ -static u8 video_mode_data[] = { - 0x00, - 0xF9, 0x1C, 0x70, 0x17, 0x72, 0x06, 0xEE, 0x02, -}; - -static u8 avi_io_format[] = { - 0x09, - 0x00, 0x00, -}; - -/* power state */ -static struct sii9022_i2c_addr_data regset0[] = { - { 0x60, 0x04 }, - { 0x63, 0x00 }, - { 0x1E, 0x00 }, -}; - -static u8 video_infoframe[] = { - 0x0C, - 0xF0, 0x00, 0x68, 0x00, 0x04, 0x00, 0x19, 0x00, - 0xE9, 0x02, 0x04, 0x01, 0x04, 0x06, -}; - -/* configure audio */ -static struct sii9022_i2c_addr_data regset1[] = { - { 0x26, 0x90 }, - { 0x20, 0x90 }, - { 0x1F, 0x80 }, - { 0x26, 0x80 }, - { 0x24, 0x02 }, - { 0x25, 0x0B }, - { 0xBC, 0x02 }, - { 0xBD, 0x24 }, - { 0xBE, 0x02 }, -}; - -/* enable audio */ -static u8 misc_infoframe[] = { - 0xBF, - 0xC2, 0x84, 0x01, 0x0A, 0x6F, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; - -/* set HDMI, active */ -static struct sii9022_i2c_addr_data regset2[] = { - { 0x1A, 0x01 }, - { 0x3D, 0x00 }, -}; - -static int send_i2c_data(struct i2c_client *client, - struct sii9022_i2c_addr_data *regset, - int size) -{ - int i; - int rc = 0; - - for (i = 0; i < size; i++) { - rc = i2c_smbus_write_byte_data( - client, - regset[i].addr, regset[i].data); - if (rc) - break; - } - return rc; -} - -static int hdmi_sii_enable(struct i2c_client *client) -{ - int rc; - int retries = 10; - int count; - - rc = i2c_smbus_write_byte_data(client, 0xC7, 0x00); - if (rc) - goto enable_exit; - - do { - msleep(1); - rc = i2c_smbus_read_byte_data(client, 0x1B); - } while ((rc != SII9022_DEVICE_ID) && retries--); - - if (rc != SII9022_DEVICE_ID) - return -ENODEV; - - rc = i2c_smbus_write_byte_data(client, 0x1A, 0x11); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(video_mode_data); - rc = i2c_master_send(client, video_mode_data, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = i2c_smbus_write_byte_data(client, 0x08, 0x20); - if (rc) - goto enable_exit; - count = ARRAY_SIZE(avi_io_format); - rc = i2c_master_send(client, avi_io_format, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset0, ARRAY_SIZE(regset0)); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(video_infoframe); - rc = i2c_master_send(client, video_infoframe, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset1, ARRAY_SIZE(regset1)); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(misc_infoframe); - rc = i2c_master_send(client, misc_infoframe, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset2, ARRAY_SIZE(regset2)); - if (rc) - goto enable_exit; - - return 0; -enable_exit: - printk(KERN_ERR "%s: exited rc=%d\n", __func__, rc); - return rc; -} - -static const struct i2c_device_id hmdi_sii_id[] = { - { DEVICE_NAME, 0 }, - { } -}; - -static int hdmi_sii_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - int rc; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE | I2C_FUNC_I2C)) - return -ENODEV; - rc = hdmi_sii_enable(client); - return rc; -} - - -static struct i2c_driver hdmi_sii_i2c_driver = { - .driver = { - .name = DEVICE_NAME, - .owner = THIS_MODULE, - }, - .probe = hdmi_sii_probe, - .remove = __exit_p(hdmi_sii_remove), - .id_table = hmdi_sii_id, -}; - -static int __init hdmi_sii_init(void) -{ - int ret; - struct msm_panel_info pinfo; - - if (msm_fb_detect_client("hdmi_sii9022")) - return 0; - - pinfo.xres = 1280; - pinfo.yres = 720; - pinfo.type = HDMI_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.wait_cycle = 0; - pinfo.bpp = 24; - pinfo.fb_num = 2; - pinfo.clk_rate = 74250000; - - pinfo.lcdc.h_back_porch = 124; - pinfo.lcdc.h_front_porch = 110; - pinfo.lcdc.h_pulse_width = 136; - pinfo.lcdc.v_back_porch = 19; - pinfo.lcdc.v_front_porch = 5; - pinfo.lcdc.v_pulse_width = 6; - pinfo.lcdc.border_clr = 0; - pinfo.lcdc.underflow_clr = 0xff; - pinfo.lcdc.hsync_skew = 0; - - ret = lcdc_device_register(&pinfo); - if (ret) { - printk(KERN_ERR "%s: failed to register device\n", __func__); - goto init_exit; - } - - ret = i2c_add_driver(&hdmi_sii_i2c_driver); - if (ret) - printk(KERN_ERR "%s: failed to add i2c driver\n", __func__); - -init_exit: - return ret; -} - -static void __exit hdmi_sii_exit(void) -{ - i2c_del_driver(&hdmi_sii_i2c_driver); -} - -module_init(hdmi_sii_init); -module_exit(hdmi_sii_exit); -MODULE_LICENSE("GPL v2"); -MODULE_VERSION("0.1"); -MODULE_AUTHOR("Qualcomm Innovation Center, Inc."); -MODULE_DESCRIPTION("SiI9022 HDMI driver"); -MODULE_ALIAS("platform:hdmi-sii9022"); diff --git a/drivers/staging/msm/lcdc.c b/drivers/staging/msm/lcdc.c deleted file mode 100644 index 8183394..0000000 --- a/drivers/staging/msm/lcdc.c +++ /dev/null @@ -1,239 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" - -static int lcdc_probe(struct platform_device *pdev); -static int lcdc_remove(struct platform_device *pdev); - -static int lcdc_off(struct platform_device *pdev); -static int lcdc_on(struct platform_device *pdev); - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; - -static struct clk *mdp_lcdc_pclk_clk; -static struct clk *mdp_lcdc_pad_pclk_clk; - -int mdp_lcdc_pclk_clk_rate; -int mdp_lcdc_pad_pclk_clk_rate; - -static struct platform_driver lcdc_driver = { - .probe = lcdc_probe, - .remove = lcdc_remove, - .suspend = NULL, - .resume = NULL, - .shutdown = NULL, - .driver = { - .name = "lcdc", - }, -}; - -static struct lcdc_platform_data *lcdc_pdata; - -static int lcdc_off(struct platform_device *pdev) -{ - int ret = 0; - - ret = panel_next_off(pdev); - - clk_disable(mdp_lcdc_pclk_clk); - clk_disable(mdp_lcdc_pad_pclk_clk); - - if (lcdc_pdata && lcdc_pdata->lcdc_power_save) - lcdc_pdata->lcdc_power_save(0); - - if (lcdc_pdata && lcdc_pdata->lcdc_gpio_config) - ret = lcdc_pdata->lcdc_gpio_config(0); - -// pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ , "lcdc", -// PM_QOS_DEFAULT_VALUE); - - return ret; -} - -static int lcdc_on(struct platform_device *pdev) -{ - int ret = 0; - struct msm_fb_data_type *mfd; - unsigned long panel_pixclock_freq , pm_qos_freq; - - mfd = platform_get_drvdata(pdev); - panel_pixclock_freq = mfd->fbi->var.pixclock; - - if (panel_pixclock_freq > 58000000) - /* pm_qos_freq should be in Khz */ - pm_qos_freq = panel_pixclock_freq / 1000 ; - else - pm_qos_freq = 58000; - -// pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ , "lcdc", -// pm_qos_freq); - mfd = platform_get_drvdata(pdev); - - clk_enable(mdp_lcdc_pclk_clk); - clk_enable(mdp_lcdc_pad_pclk_clk); - - if (lcdc_pdata && lcdc_pdata->lcdc_power_save) - lcdc_pdata->lcdc_power_save(1); - if (lcdc_pdata && lcdc_pdata->lcdc_gpio_config) - ret = lcdc_pdata->lcdc_gpio_config(1); - - clk_set_rate(mdp_lcdc_pclk_clk, mfd->fbi->var.pixclock); - clk_set_rate(mdp_lcdc_pad_pclk_clk, mfd->fbi->var.pixclock); - mdp_lcdc_pclk_clk_rate = clk_get_rate(mdp_lcdc_pclk_clk); - mdp_lcdc_pad_pclk_clk_rate = clk_get_rate(mdp_lcdc_pad_pclk_clk); - - ret = panel_next_on(pdev); - return ret; -} - -static int lcdc_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct fb_info *fbi; - struct platform_device *mdp_dev = NULL; - struct msm_fb_panel_data *pdata = NULL; - int rc; - - if (pdev->id == 0) { - lcdc_pdata = pdev->dev.platform_data; - return 0; - } - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - mdp_dev = platform_device_alloc("mdp", pdev->id); - if (!mdp_dev) - return -ENOMEM; - - /* - * link to the latest pdev - */ - mfd->pdev = mdp_dev; - mfd->dest = DISPLAY_LCDC; - - /* - * alloc panel device data - */ - if (platform_device_add_data - (mdp_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "lcdc_probe: platform_device_add_data failed!\n"); - platform_device_put(mdp_dev); - return -ENOMEM; - } - /* - * data chain - */ - pdata = (struct msm_fb_panel_data *)mdp_dev->dev.platform_data; - pdata->on = lcdc_on; - pdata->off = lcdc_off; - pdata->next = pdev; - - /* - * get/set panel specific fb info - */ - mfd->panel_info = pdata->panel_info; - mfd->fb_imgType = MDP_RGB_565; - - fbi = mfd->fbi; - fbi->var.pixclock = mfd->panel_info.clk_rate; - fbi->var.left_margin = mfd->panel_info.lcdc.h_back_porch; - fbi->var.right_margin = mfd->panel_info.lcdc.h_front_porch; - fbi->var.upper_margin = mfd->panel_info.lcdc.v_back_porch; - fbi->var.lower_margin = mfd->panel_info.lcdc.v_front_porch; - fbi->var.hsync_len = mfd->panel_info.lcdc.h_pulse_width; - fbi->var.vsync_len = mfd->panel_info.lcdc.v_pulse_width; - - /* - * set driver data - */ - platform_set_drvdata(mdp_dev, mfd); - - /* - * register in mdp driver - */ - rc = platform_device_add(mdp_dev); - if (rc) - goto lcdc_probe_err; - - pdev_list[pdev_list_cnt++] = pdev; - return 0; - -lcdc_probe_err: - platform_device_put(mdp_dev); - return rc; -} - -static int lcdc_remove(struct platform_device *pdev) -{ -// pm_qos_remove_requirement(PM_QOS_SYSTEM_BUS_FREQ , "lcdc"); - return 0; -} - -static int lcdc_register_driver(void) -{ - return platform_driver_register(&lcdc_driver); -} - -static int __init lcdc_driver_init(void) -{ - mdp_lcdc_pclk_clk = clk_get(NULL, "mdp_lcdc_pclk_clk"); - if (IS_ERR(mdp_lcdc_pclk_clk)) { - printk(KERN_ERR "error: can't get mdp_lcdc_pclk_clk!\n"); - return PTR_ERR(mdp_lcdc_pclk_clk); - } - mdp_lcdc_pad_pclk_clk = clk_get(NULL, "mdp_lcdc_pad_pclk_clk"); - if (IS_ERR(mdp_lcdc_pad_pclk_clk)) { - printk(KERN_ERR "error: can't get mdp_lcdc_pad_pclk_clk!\n"); - return PTR_ERR(mdp_lcdc_pad_pclk_clk); - } -// pm_qos_add_requirement(PM_QOS_SYSTEM_BUS_FREQ , "lcdc", -// PM_QOS_DEFAULT_VALUE); - return lcdc_register_driver(); -} - -module_init(lcdc_driver_init); diff --git a/drivers/staging/msm/lcdc_external.c b/drivers/staging/msm/lcdc_external.c deleted file mode 100644 index 45ff785..0000000 --- a/drivers/staging/msm/lcdc_external.c +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" - -static int __init lcdc_external_init(void) -{ - int ret; - struct msm_panel_info pinfo; - - if (msm_fb_detect_client("lcdc_external")) - return 0; - - pinfo.xres = 1280; - pinfo.yres = 720; - pinfo.type = LCDC_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.wait_cycle = 0; - pinfo.bpp = 24; - pinfo.fb_num = 2; - pinfo.clk_rate = 74250000; - - pinfo.lcdc.h_back_porch = 124; - pinfo.lcdc.h_front_porch = 110; - pinfo.lcdc.h_pulse_width = 136; - pinfo.lcdc.v_back_porch = 19; - pinfo.lcdc.v_front_porch = 5; - pinfo.lcdc.v_pulse_width = 6; - pinfo.lcdc.border_clr = 0; /* blk */ - pinfo.lcdc.underflow_clr = 0xff; /* blue */ - pinfo.lcdc.hsync_skew = 0; - - ret = lcdc_device_register(&pinfo); - if (ret) - printk(KERN_ERR "%s: failed to register device!\n", __func__); - - return ret; -} - -module_init(lcdc_external_init); diff --git a/drivers/staging/msm/lcdc_gordon.c b/drivers/staging/msm/lcdc_gordon.c deleted file mode 100644 index 399ec8c..0000000 --- a/drivers/staging/msm/lcdc_gordon.c +++ /dev/null @@ -1,446 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include "msm_fb.h" - -/* registers */ -#define GORDON_REG_NOP 0x00 -#define GORDON_REG_IMGCTL1 0x10 -#define GORDON_REG_IMGCTL2 0x11 -#define GORDON_REG_IMGSET1 0x12 -#define GORDON_REG_IMGSET2 0x13 -#define GORDON_REG_IVBP1 0x14 -#define GORDON_REG_IHBP1 0x15 -#define GORDON_REG_IVNUM1 0x16 -#define GORDON_REG_IHNUM1 0x17 -#define GORDON_REG_IVBP2 0x18 -#define GORDON_REG_IHBP2 0x19 -#define GORDON_REG_IVNUM2 0x1A -#define GORDON_REG_IHNUM2 0x1B -#define GORDON_REG_LCDIFCTL1 0x30 -#define GORDON_REG_VALTRAN 0x31 -#define GORDON_REG_AVCTL 0x33 -#define GORDON_REG_LCDIFCTL2 0x34 -#define GORDON_REG_LCDIFCTL3 0x35 -#define GORDON_REG_LCDIFSET1 0x36 -#define GORDON_REG_PCCTL 0x3C -#define GORDON_REG_TPARAM1 0x40 -#define GORDON_REG_TLCDIF1 0x41 -#define GORDON_REG_TSSPB_ST1 0x42 -#define GORDON_REG_TSSPB_ED1 0x43 -#define GORDON_REG_TSCK_ST1 0x44 -#define GORDON_REG_TSCK_WD1 0x45 -#define GORDON_REG_TGSPB_VST1 0x46 -#define GORDON_REG_TGSPB_VED1 0x47 -#define GORDON_REG_TGSPB_CH1 0x48 -#define GORDON_REG_TGCK_ST1 0x49 -#define GORDON_REG_TGCK_ED1 0x4A -#define GORDON_REG_TPCTL_ST1 0x4B -#define GORDON_REG_TPCTL_ED1 0x4C -#define GORDON_REG_TPCHG_ED1 0x4D -#define GORDON_REG_TCOM_CH1 0x4E -#define GORDON_REG_THBP1 0x4F -#define GORDON_REG_TPHCTL1 0x50 -#define GORDON_REG_EVPH1 0x51 -#define GORDON_REG_EVPL1 0x52 -#define GORDON_REG_EVNH1 0x53 -#define GORDON_REG_EVNL1 0x54 -#define GORDON_REG_TBIAS1 0x55 -#define GORDON_REG_TPARAM2 0x56 -#define GORDON_REG_TLCDIF2 0x57 -#define GORDON_REG_TSSPB_ST2 0x58 -#define GORDON_REG_TSSPB_ED2 0x59 -#define GORDON_REG_TSCK_ST2 0x5A -#define GORDON_REG_TSCK_WD2 0x5B -#define GORDON_REG_TGSPB_VST2 0x5C -#define GORDON_REG_TGSPB_VED2 0x5D -#define GORDON_REG_TGSPB_CH2 0x5E -#define GORDON_REG_TGCK_ST2 0x5F -#define GORDON_REG_TGCK_ED2 0x60 -#define GORDON_REG_TPCTL_ST2 0x61 -#define GORDON_REG_TPCTL_ED2 0x62 -#define GORDON_REG_TPCHG_ED2 0x63 -#define GORDON_REG_TCOM_CH2 0x64 -#define GORDON_REG_THBP2 0x65 -#define GORDON_REG_TPHCTL2 0x66 -#define GORDON_REG_POWCTL 0x80 - -static int lcdc_gordon_panel_off(struct platform_device *pdev); - -static int spi_cs; -static int spi_sclk; -static int spi_sdo; -static int spi_sdi; -static int spi_dac; -static unsigned char bit_shift[8] = { (1 << 7), /* MSB */ - (1 << 6), - (1 << 5), - (1 << 4), - (1 << 3), - (1 << 2), - (1 << 1), - (1 << 0) /* LSB */ -}; - -struct gordon_state_type{ - boolean disp_initialized; - boolean display_on; - boolean disp_powered_up; -}; - -static struct gordon_state_type gordon_state = { 0 }; -static struct msm_panel_common_pdata *lcdc_gordon_pdata; - -static void serigo(uint16 reg, uint8 data) -{ - unsigned int tx_val = ((0x00FF & reg) << 8) | data; - unsigned char i, val = 0; - - /* Enable the Chip Select */ - gpio_set_value(spi_cs, 1); - udelay(33); - - /* Transmit it in two parts, Higher Byte first, then Lower Byte */ - val = (unsigned char)((tx_val & 0xFF00) >> 8); - - /* Clock should be Low before entering ! */ - for (i = 0; i < 8; i++) { - /* #1: Drive the Data (High or Low) */ - if (val & bit_shift[i]) - gpio_set_value(spi_sdi, 1); - else - gpio_set_value(spi_sdi, 0); - - /* #2: Drive the Clk High and then Low */ - udelay(33); - gpio_set_value(spi_sclk, 1); - udelay(33); - gpio_set_value(spi_sclk, 0); - } - - /* Idle state of SDO (MOSI) is Low */ - gpio_set_value(spi_sdi, 0); - /* ..then Lower Byte */ - val = (uint8) (tx_val & 0x00FF); - /* Before we enter here the Clock should be Low ! */ - - for (i = 0; i < 8; i++) { - /* #1: Drive the Data (High or Low) */ - if (val & bit_shift[i]) - gpio_set_value(spi_sdi, 1); - else - gpio_set_value(spi_sdi, 0); - - /* #2: Drive the Clk High and then Low */ - udelay(33); - - gpio_set_value(spi_sclk, 1); - udelay(33); - gpio_set_value(spi_sclk, 0); - } - - /* Idle state of SDO (MOSI) is Low */ - gpio_set_value(spi_sdi, 0); - - /* Now Disable the Chip Select */ - udelay(33); - gpio_set_value(spi_cs, 0); -} - -static void spi_init(void) -{ - /* Setting the Default GPIO's */ - spi_sclk = *(lcdc_gordon_pdata->gpio_num); - spi_cs = *(lcdc_gordon_pdata->gpio_num + 1); - spi_sdi = *(lcdc_gordon_pdata->gpio_num + 2); - spi_sdo = *(lcdc_gordon_pdata->gpio_num + 3); - - /* Set the output so that we dont disturb the slave device */ - gpio_set_value(spi_sclk, 0); - gpio_set_value(spi_sdi, 0); - - /* Set the Chip Select De-asserted */ - gpio_set_value(spi_cs, 0); - -} - -static void gordon_disp_powerup(void) -{ - if (!gordon_state.disp_powered_up && !gordon_state.display_on) { - /* Reset the hardware first */ - /* Include DAC power up implementation here */ - gordon_state.disp_powered_up = TRUE; - } -} - -static void gordon_init(void) -{ - /* Image interface settings */ - serigo(GORDON_REG_IMGCTL2, 0x00); - serigo(GORDON_REG_IMGSET1, 0x00); - - /* Exchange the RGB signal for J510(Softbank mobile) */ - serigo(GORDON_REG_IMGSET2, 0x12); - serigo(GORDON_REG_LCDIFSET1, 0x00); - - /* Pre-charge settings */ - serigo(GORDON_REG_PCCTL, 0x09); - serigo(GORDON_REG_LCDIFCTL2, 0x7B); - - mdelay(1); -} - -static void gordon_disp_on(void) -{ - if (gordon_state.disp_powered_up && !gordon_state.display_on) { - gordon_init(); - mdelay(20); - /* gordon_dispmode setting */ - serigo(GORDON_REG_TPARAM1, 0x30); - serigo(GORDON_REG_TLCDIF1, 0x00); - serigo(GORDON_REG_TSSPB_ST1, 0x8B); - serigo(GORDON_REG_TSSPB_ED1, 0x93); - serigo(GORDON_REG_TSCK_ST1, 0x88); - serigo(GORDON_REG_TSCK_WD1, 0x00); - serigo(GORDON_REG_TGSPB_VST1, 0x01); - serigo(GORDON_REG_TGSPB_VED1, 0x02); - serigo(GORDON_REG_TGSPB_CH1, 0x5E); - serigo(GORDON_REG_TGCK_ST1, 0x80); - serigo(GORDON_REG_TGCK_ED1, 0x3C); - serigo(GORDON_REG_TPCTL_ST1, 0x50); - serigo(GORDON_REG_TPCTL_ED1, 0x74); - serigo(GORDON_REG_TPCHG_ED1, 0x78); - serigo(GORDON_REG_TCOM_CH1, 0x50); - serigo(GORDON_REG_THBP1, 0x84); - serigo(GORDON_REG_TPHCTL1, 0x00); - serigo(GORDON_REG_EVPH1, 0x70); - serigo(GORDON_REG_EVPL1, 0x64); - serigo(GORDON_REG_EVNH1, 0x56); - serigo(GORDON_REG_EVNL1, 0x48); - serigo(GORDON_REG_TBIAS1, 0x88); - - /* QVGA settings */ - serigo(GORDON_REG_TPARAM2, 0x28); - serigo(GORDON_REG_TLCDIF2, 0x14); - serigo(GORDON_REG_TSSPB_ST2, 0x49); - serigo(GORDON_REG_TSSPB_ED2, 0x4B); - serigo(GORDON_REG_TSCK_ST2, 0x4A); - serigo(GORDON_REG_TSCK_WD2, 0x02); - serigo(GORDON_REG_TGSPB_VST2, 0x02); - serigo(GORDON_REG_TGSPB_VED2, 0x03); - serigo(GORDON_REG_TGSPB_CH2, 0x2F); - serigo(GORDON_REG_TGCK_ST2, 0x40); - serigo(GORDON_REG_TGCK_ED2, 0x1E); - serigo(GORDON_REG_TPCTL_ST2, 0x2C); - serigo(GORDON_REG_TPCTL_ED2, 0x3A); - serigo(GORDON_REG_TPCHG_ED2, 0x3C); - serigo(GORDON_REG_TCOM_CH2, 0x28); - serigo(GORDON_REG_THBP2, 0x4D); - serigo(GORDON_REG_TPHCTL2, 0x1A); - - /* VGA settings */ - serigo(GORDON_REG_IVBP1, 0x02); - serigo(GORDON_REG_IHBP1, 0x90); - serigo(GORDON_REG_IVNUM1, 0xA0); - serigo(GORDON_REG_IHNUM1, 0x78); - - /* QVGA settings */ - serigo(GORDON_REG_IVBP2, 0x02); - serigo(GORDON_REG_IHBP2, 0x48); - serigo(GORDON_REG_IVNUM2, 0x50); - serigo(GORDON_REG_IHNUM2, 0x3C); - - /* Gordon Charge pump settings and ON */ - serigo(GORDON_REG_POWCTL, 0x03); - mdelay(15); - serigo(GORDON_REG_POWCTL, 0x07); - mdelay(15); - - serigo(GORDON_REG_POWCTL, 0x0F); - mdelay(15); - - serigo(GORDON_REG_AVCTL, 0x03); - mdelay(15); - - serigo(GORDON_REG_POWCTL, 0x1F); - mdelay(15); - - serigo(GORDON_REG_POWCTL, 0x5F); - mdelay(15); - - serigo(GORDON_REG_POWCTL, 0x7F); - mdelay(15); - - serigo(GORDON_REG_LCDIFCTL1, 0x02); - mdelay(15); - - serigo(GORDON_REG_IMGCTL1, 0x00); - mdelay(15); - - serigo(GORDON_REG_LCDIFCTL3, 0x00); - mdelay(15); - - serigo(GORDON_REG_VALTRAN, 0x01); - mdelay(15); - - serigo(GORDON_REG_LCDIFCTL1, 0x03); - mdelay(1); - gordon_state.display_on = TRUE; - } -} - -static int lcdc_gordon_panel_on(struct platform_device *pdev) -{ - if (!gordon_state.disp_initialized) { - /* Configure reset GPIO that drives DAC */ - lcdc_gordon_pdata->panel_config_gpio(1); - spi_dac = *(lcdc_gordon_pdata->gpio_num + 4); - gpio_set_value(spi_dac, 0); - udelay(15); - gpio_set_value(spi_dac, 1); - spi_init(); /* LCD needs SPI */ - gordon_disp_powerup(); - gordon_disp_on(); - gordon_state.disp_initialized = TRUE; - } - return 0; -} - -static int lcdc_gordon_panel_off(struct platform_device *pdev) -{ - if (gordon_state.disp_powered_up && gordon_state.display_on) { - serigo(GORDON_REG_LCDIFCTL2, 0x7B); - serigo(GORDON_REG_VALTRAN, 0x01); - serigo(GORDON_REG_LCDIFCTL1, 0x02); - serigo(GORDON_REG_LCDIFCTL3, 0x01); - mdelay(20); - serigo(GORDON_REG_VALTRAN, 0x01); - serigo(GORDON_REG_IMGCTL1, 0x01); - serigo(GORDON_REG_LCDIFCTL1, 0x00); - mdelay(20); - - serigo(GORDON_REG_POWCTL, 0x1F); - mdelay(40); - - serigo(GORDON_REG_POWCTL, 0x07); - mdelay(40); - - serigo(GORDON_REG_POWCTL, 0x03); - mdelay(40); - - serigo(GORDON_REG_POWCTL, 0x00); - mdelay(40); - lcdc_gordon_pdata->panel_config_gpio(0); - gordon_state.display_on = FALSE; - gordon_state.disp_initialized = FALSE; - } - return 0; -} - -static void lcdc_gordon_set_backlight(struct msm_fb_data_type *mfd) -{ - int bl_level = mfd->bl_level; - - if (bl_level <= 1) { - /* keep back light OFF */ - serigo(GORDON_REG_LCDIFCTL2, 0x0B); - udelay(15); - serigo(GORDON_REG_VALTRAN, 0x01); - } else { - /* keep back light ON */ - serigo(GORDON_REG_LCDIFCTL2, 0x7B); - udelay(15); - serigo(GORDON_REG_VALTRAN, 0x01); - } -} - -static int __init gordon_probe(struct platform_device *pdev) -{ - if (pdev->id == 0) { - lcdc_gordon_pdata = pdev->dev.platform_data; - return 0; - } - msm_fb_add_device(pdev); - return 0; -} - -static struct platform_driver this_driver = { - .probe = gordon_probe, - .driver = { - .name = "lcdc_gordon_vga", - }, -}; - -static struct msm_fb_panel_data gordon_panel_data = { - .on = lcdc_gordon_panel_on, - .off = lcdc_gordon_panel_off, - .set_backlight = lcdc_gordon_set_backlight, -}; - -static struct platform_device this_device = { - .name = "lcdc_gordon_vga", - .id = 1, - .dev = { - .platform_data = &gordon_panel_data, - } -}; - -static int __init lcdc_gordon_panel_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - -#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM - if (msm_fb_detect_client("lcdc_gordon_vga")) - return 0; -#endif - ret = platform_driver_register(&this_driver); - if (ret) - return ret; - - pinfo = &gordon_panel_data.panel_info; - pinfo->xres = 480; - pinfo->yres = 640; - pinfo->type = LCDC_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->wait_cycle = 0; - pinfo->bpp = 24; - pinfo->fb_num = 2; - pinfo->clk_rate = 24500000; - pinfo->bl_max = 4; - pinfo->bl_min = 1; - - pinfo->lcdc.h_back_porch = 84; - pinfo->lcdc.h_front_porch = 33; - pinfo->lcdc.h_pulse_width = 60; - pinfo->lcdc.v_back_porch = 0; - pinfo->lcdc.v_front_porch = 2; - pinfo->lcdc.v_pulse_width = 2; - pinfo->lcdc.border_clr = 0; /* blk */ - pinfo->lcdc.underflow_clr = 0xff; /* blue */ - pinfo->lcdc.hsync_skew = 0; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - - return ret; -} - -module_init(lcdc_gordon_panel_init); diff --git a/drivers/staging/msm/lcdc_panel.c b/drivers/staging/msm/lcdc_panel.c deleted file mode 100644 index b40974e..0000000 --- a/drivers/staging/msm/lcdc_panel.c +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" - -static int lcdc_panel_on(struct platform_device *pdev) -{ - return 0; -} - -static int lcdc_panel_off(struct platform_device *pdev) -{ - return 0; -} - -static int __init lcdc_panel_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = lcdc_panel_probe, - .driver = { - .name = "lcdc_panel", - }, -}; - -static struct msm_fb_panel_data lcdc_panel_data = { - .on = lcdc_panel_on, - .off = lcdc_panel_off, -}; - -static int lcdc_dev_id; - -int lcdc_device_register(struct msm_panel_info *pinfo) -{ - struct platform_device *pdev = NULL; - int ret; - - pdev = platform_device_alloc("lcdc_panel", ++lcdc_dev_id); - if (!pdev) - return -ENOMEM; - - lcdc_panel_data.panel_info = *pinfo; - ret = platform_device_add_data(pdev, &lcdc_panel_data, - sizeof(lcdc_panel_data)); - if (ret) { - printk(KERN_ERR - "%s: platform_device_add_data failed!\n", __func__); - goto err_device_put; - } - - ret = platform_device_add(pdev); - if (ret) { - printk(KERN_ERR - "%s: platform_device_register failed!\n", __func__); - goto err_device_put; - } - - return 0; - -err_device_put: - platform_device_put(pdev); - return ret; -} - -static int __init lcdc_panel_init(void) -{ - return platform_driver_register(&this_driver); -} - -module_init(lcdc_panel_init); diff --git a/drivers/staging/msm/lcdc_prism.c b/drivers/staging/msm/lcdc_prism.c deleted file mode 100644 index d102c98..0000000 --- a/drivers/staging/msm/lcdc_prism.c +++ /dev/null @@ -1,64 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" - -#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM -#include "mddihosti.h" -#endif - -static int __init lcdc_prism_init(void) -{ - int ret; - struct msm_panel_info pinfo; - -#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM - ret = msm_fb_detect_client("lcdc_prism_wvga"); - if (ret == -ENODEV) - return 0; - - if (ret && (mddi_get_client_id() != 0)) - return 0; -#endif - - pinfo.xres = 800; - pinfo.yres = 480; - pinfo.type = LCDC_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.wait_cycle = 0; - pinfo.bpp = 24; - pinfo.fb_num = 2; - pinfo.clk_rate = 38460000; - - pinfo.lcdc.h_back_porch = 21; - pinfo.lcdc.h_front_porch = 81; - pinfo.lcdc.h_pulse_width = 60; - pinfo.lcdc.v_back_porch = 18; - pinfo.lcdc.v_front_porch = 27; - pinfo.lcdc.v_pulse_width = 2; - pinfo.lcdc.border_clr = 0; /* blk */ - pinfo.lcdc.underflow_clr = 0xff; /* blue */ - pinfo.lcdc.hsync_skew = 0; - - ret = lcdc_device_register(&pinfo); - if (ret) - printk(KERN_ERR "%s: failed to register device!\n", __func__); - - return ret; -} - -module_init(lcdc_prism_init); diff --git a/drivers/staging/msm/lcdc_sharp_wvga_pt.c b/drivers/staging/msm/lcdc_sharp_wvga_pt.c deleted file mode 100644 index 1f08cf9..0000000 --- a/drivers/staging/msm/lcdc_sharp_wvga_pt.c +++ /dev/null @@ -1,290 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#ifdef CONFIG_ARCH_MSM7X30 -#include -#endif -#include -#include "msm_fb.h" - -static int lcdc_sharp_panel_off(struct platform_device *pdev); - -static int spi_cs; -static int spi_sclk; -static int spi_mosi; -static int spi_miso; -static unsigned char bit_shift[8] = { (1 << 7), /* MSB */ - (1 << 6), - (1 << 5), - (1 << 4), - (1 << 3), - (1 << 2), - (1 << 1), - (1 << 0) /* LSB */ -}; - -struct sharp_state_type { - boolean disp_initialized; - boolean display_on; - boolean disp_powered_up; -}; - -struct sharp_spi_data { - u8 addr; - u8 data; -}; - -static struct sharp_spi_data init_sequence[] = { - { 15, 0x01 }, - { 5, 0x01 }, - { 7, 0x10 }, - { 9, 0x1E }, - { 10, 0x04 }, - { 17, 0xFF }, - { 21, 0x8A }, - { 22, 0x00 }, - { 23, 0x82 }, - { 24, 0x24 }, - { 25, 0x22 }, - { 26, 0x6D }, - { 27, 0xEB }, - { 28, 0xB9 }, - { 29, 0x3A }, - { 49, 0x1A }, - { 50, 0x16 }, - { 51, 0x05 }, - { 55, 0x7F }, - { 56, 0x15 }, - { 57, 0x7B }, - { 60, 0x05 }, - { 61, 0x0C }, - { 62, 0x80 }, - { 63, 0x00 }, - { 92, 0x90 }, - { 97, 0x01 }, - { 98, 0xFF }, - { 113, 0x11 }, - { 114, 0x02 }, - { 115, 0x08 }, - { 123, 0xAB }, - { 124, 0x04 }, - { 6, 0x02 }, - { 133, 0x00 }, - { 134, 0xFE }, - { 135, 0x22 }, - { 136, 0x0B }, - { 137, 0xFF }, - { 138, 0x0F }, - { 139, 0x00 }, - { 140, 0xFE }, - { 141, 0x22 }, - { 142, 0x0B }, - { 143, 0xFF }, - { 144, 0x0F }, - { 145, 0x00 }, - { 146, 0xFE }, - { 147, 0x22 }, - { 148, 0x0B }, - { 149, 0xFF }, - { 150, 0x0F }, - { 202, 0x30 }, - { 30, 0x01 }, - { 4, 0x01 }, - { 31, 0x41 }, -}; - -static struct sharp_state_type sharp_state = { 0 }; -static struct msm_panel_common_pdata *lcdc_sharp_pdata; - -static void sharp_spi_write_byte(u8 val) -{ - int i; - - /* Clock should be Low before entering */ - for (i = 0; i < 8; i++) { - /* #1: Drive the Data (High or Low) */ - if (val & bit_shift[i]) - gpio_set_value(spi_mosi, 1); - else - gpio_set_value(spi_mosi, 0); - - /* #2: Drive the Clk High and then Low */ - gpio_set_value(spi_sclk, 1); - gpio_set_value(spi_sclk, 0); - } -} - -static void serigo(u8 reg, u8 data) -{ - /* Enable the Chip Select - low */ - gpio_set_value(spi_cs, 0); - udelay(1); - - /* Transmit register address first, then data */ - sharp_spi_write_byte(reg); - - /* Idle state of MOSI is Low */ - gpio_set_value(spi_mosi, 0); - udelay(1); - sharp_spi_write_byte(data); - - gpio_set_value(spi_mosi, 0); - gpio_set_value(spi_cs, 1); -} - -static void sharp_spi_init(void) -{ - spi_sclk = *(lcdc_sharp_pdata->gpio_num); - spi_cs = *(lcdc_sharp_pdata->gpio_num + 1); - spi_mosi = *(lcdc_sharp_pdata->gpio_num + 2); - spi_miso = *(lcdc_sharp_pdata->gpio_num + 3); - - /* Set the output so that we don't disturb the slave device */ - gpio_set_value(spi_sclk, 0); - gpio_set_value(spi_mosi, 0); - - /* Set the Chip Select deasserted (active low) */ - gpio_set_value(spi_cs, 1); -} - -static void sharp_disp_powerup(void) -{ - if (!sharp_state.disp_powered_up && !sharp_state.display_on) - sharp_state.disp_powered_up = TRUE; -} - -static void sharp_disp_on(void) -{ - int i; - - if (sharp_state.disp_powered_up && !sharp_state.display_on) { - for (i = 0; i < ARRAY_SIZE(init_sequence); i++) { - serigo(init_sequence[i].addr, - init_sequence[i].data); - } - mdelay(10); - serigo(31, 0xC1); - mdelay(10); - serigo(31, 0xD9); - serigo(31, 0xDF); - - sharp_state.display_on = TRUE; - } -} - -static int lcdc_sharp_panel_on(struct platform_device *pdev) -{ - if (!sharp_state.disp_initialized) { - lcdc_sharp_pdata->panel_config_gpio(1); - sharp_spi_init(); - sharp_disp_powerup(); - sharp_disp_on(); - sharp_state.disp_initialized = TRUE; - } - return 0; -} - -static int lcdc_sharp_panel_off(struct platform_device *pdev) -{ - if (sharp_state.disp_powered_up && sharp_state.display_on) { - serigo(4, 0x00); - mdelay(40); - serigo(31, 0xC1); - mdelay(40); - serigo(31, 0x00); - mdelay(100); - sharp_state.display_on = FALSE; - sharp_state.disp_initialized = FALSE; - } - return 0; -} - -static int __init sharp_probe(struct platform_device *pdev) -{ - if (pdev->id == 0) { - lcdc_sharp_pdata = pdev->dev.platform_data; - return 0; - } - msm_fb_add_device(pdev); - return 0; -} - -static struct platform_driver this_driver = { - .probe = sharp_probe, - .driver = { - .name = "lcdc_sharp_wvga", - }, -}; - -static struct msm_fb_panel_data sharp_panel_data = { - .on = lcdc_sharp_panel_on, - .off = lcdc_sharp_panel_off, -}; - -static struct platform_device this_device = { - .name = "lcdc_sharp_wvga", - .id = 1, - .dev = { - .platform_data = &sharp_panel_data, - } -}; - -static int __init lcdc_sharp_panel_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - if (msm_fb_detect_client("lcdc_sharp_wvga_pt")) - return 0; -#endif - - ret = platform_driver_register(&this_driver); - if (ret) - return ret; - - pinfo = &sharp_panel_data.panel_info; - pinfo->xres = 480; - pinfo->yres = 800; - pinfo->type = LCDC_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->wait_cycle = 0; - pinfo->bpp = 18; - pinfo->fb_num = 2; - pinfo->clk_rate = 24500000; - pinfo->bl_max = 4; - pinfo->bl_min = 1; - - pinfo->lcdc.h_back_porch = 20; - pinfo->lcdc.h_front_porch = 10; - pinfo->lcdc.h_pulse_width = 10; - pinfo->lcdc.v_back_porch = 2; - pinfo->lcdc.v_front_porch = 2; - pinfo->lcdc.v_pulse_width = 2; - pinfo->lcdc.border_clr = 0; - pinfo->lcdc.underflow_clr = 0xff; - pinfo->lcdc.hsync_skew = 0; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - - return ret; -} - -module_init(lcdc_sharp_panel_init); diff --git a/drivers/staging/msm/lcdc_st15.c b/drivers/staging/msm/lcdc_st15.c deleted file mode 100644 index fed8278..0000000 --- a/drivers/staging/msm/lcdc_st15.c +++ /dev/null @@ -1,237 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include "msm_fb.h" - -#define DEVICE_NAME "sii9022" -#define SII9022_DEVICE_ID 0xB0 - -struct sii9022_i2c_addr_data{ - u8 addr; - u8 data; -}; - -/* video mode data */ -static u8 video_mode_data[] = { - 0x00, - 0xF9, 0x1C, 0x70, 0x17, 0x72, 0x06, 0xEE, 0x02, -}; - -static u8 avi_io_format[] = { - 0x09, - 0x00, 0x00, -}; - -/* power state */ -static struct sii9022_i2c_addr_data regset0[] = { - { 0x60, 0x04 }, - { 0x63, 0x00 }, - { 0x1E, 0x00 }, -}; - -static u8 video_infoframe[] = { - 0x0C, - 0xF0, 0x00, 0x68, 0x00, 0x04, 0x00, 0x19, 0x00, - 0xE9, 0x02, 0x04, 0x01, 0x04, 0x06, -}; - -/* configure audio */ -static struct sii9022_i2c_addr_data regset1[] = { - { 0x26, 0x90 }, - { 0x20, 0x90 }, - { 0x1F, 0x80 }, - { 0x26, 0x80 }, - { 0x24, 0x02 }, - { 0x25, 0x0B }, - { 0xBC, 0x02 }, - { 0xBD, 0x24 }, - { 0xBE, 0x02 }, -}; - -/* enable audio */ -static u8 misc_infoframe[] = { - 0xBF, - 0xC2, 0x84, 0x01, 0x0A, 0x6F, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; - -/* set HDMI, active */ -static struct sii9022_i2c_addr_data regset2[] = { - { 0x1A, 0x01 }, - { 0x3D, 0x00 }, -}; - -static int send_i2c_data(struct i2c_client *client, - struct sii9022_i2c_addr_data *regset, - int size) -{ - int i; - int rc = 0; - - for (i = 0; i < size; i++) { - rc = i2c_smbus_write_byte_data( - client, - regset[i].addr, regset[i].data); - if (rc) - break; - } - return rc; -} - -static int hdmi_sii_enable(struct i2c_client *client) -{ - int rc; - int retries = 10; - int count; - - rc = i2c_smbus_write_byte_data(client, 0xC7, 0x00); - if (rc) - goto enable_exit; - - do { - msleep(1); - rc = i2c_smbus_read_byte_data(client, 0x1B); - } while ((rc != SII9022_DEVICE_ID) && retries--); - - if (rc != SII9022_DEVICE_ID) - return -ENODEV; - - rc = i2c_smbus_write_byte_data(client, 0x1A, 0x11); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(video_mode_data); - rc = i2c_master_send(client, video_mode_data, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = i2c_smbus_write_byte_data(client, 0x08, 0x20); - if (rc) - goto enable_exit; - count = ARRAY_SIZE(avi_io_format); - rc = i2c_master_send(client, avi_io_format, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset0, ARRAY_SIZE(regset0)); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(video_infoframe); - rc = i2c_master_send(client, video_infoframe, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset1, ARRAY_SIZE(regset1)); - if (rc) - goto enable_exit; - - count = ARRAY_SIZE(misc_infoframe); - rc = i2c_master_send(client, misc_infoframe, count); - if (rc != count) { - rc = -EIO; - goto enable_exit; - } - - rc = send_i2c_data(client, regset2, ARRAY_SIZE(regset2)); - if (rc) - goto enable_exit; - - return 0; -enable_exit: - printk(KERN_ERR "%s: exited rc=%d\n", __func__, rc); - return rc; -} - -static const struct i2c_device_id hmdi_sii_id[] = { - { DEVICE_NAME, 0 }, - { } -}; - -static int hdmi_sii_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - int rc; - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE | I2C_FUNC_I2C)) - return -ENODEV; - rc = hdmi_sii_enable(client); - return rc; -} - - -static struct i2c_driver hdmi_sii_i2c_driver = { - .driver = { - .name = DEVICE_NAME, - .owner = THIS_MODULE, - }, - .probe = hdmi_sii_probe, - .remove = __exit_p(hdmi_sii_remove), - .id_table = hmdi_sii_id, -}; - -static int __init lcdc_st15_init(void) -{ - int ret; - struct msm_panel_info pinfo; - - if (msm_fb_detect_client("lcdc_st15")) - return 0; - - pinfo.xres = 1366; - pinfo.yres = 768; - pinfo.type = LCDC_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.wait_cycle = 0; - pinfo.bpp = 24; - pinfo.fb_num = 2; - pinfo.clk_rate = 74250000; - - pinfo.lcdc.h_back_porch = 120; - pinfo.lcdc.h_front_porch = 20; - pinfo.lcdc.h_pulse_width = 40; - pinfo.lcdc.v_back_porch = 25; - pinfo.lcdc.v_front_porch = 1; - pinfo.lcdc.v_pulse_width = 7; - pinfo.lcdc.border_clr = 0; /* blk */ - pinfo.lcdc.underflow_clr = 0xff; /* blue */ - pinfo.lcdc.hsync_skew = 0; - - ret = lcdc_device_register(&pinfo); - if (ret) { - printk(KERN_ERR "%s: failed to register device!\n", __func__); - goto init_exit; - } - - ret = i2c_add_driver(&hdmi_sii_i2c_driver); - if (ret) - printk(KERN_ERR "%s: failed to add i2c driver\n", __func__); - -init_exit: - return ret; -} - -module_init(lcdc_st15_init); diff --git a/drivers/staging/msm/lcdc_toshiba_wvga_pt.c b/drivers/staging/msm/lcdc_toshiba_wvga_pt.c deleted file mode 100644 index edba78a..0000000 --- a/drivers/staging/msm/lcdc_toshiba_wvga_pt.c +++ /dev/null @@ -1,374 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include "msm_fb.h" - -#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM -#include "mddihosti.h" -#endif - -static int spi_cs; -static int spi_sclk; -static int spi_mosi; -static int spi_miso; - -struct toshiba_state_type{ - boolean disp_initialized; - boolean display_on; - boolean disp_powered_up; -}; - -static struct toshiba_state_type toshiba_state = { 0 }; -static struct msm_panel_common_pdata *lcdc_toshiba_pdata; - -static void toshiba_spi_write_byte(char dc, uint8 data) -{ - uint32 bit; - int bnum; - - gpio_set_value(spi_sclk, 0); /* clk low */ - /* dc: 0 for command, 1 for parameter */ - gpio_set_value(spi_mosi, dc); - udelay(1); /* at least 20 ns */ - gpio_set_value(spi_sclk, 1); /* clk high */ - udelay(1); /* at least 20 ns */ - bnum = 8; /* 8 data bits */ - bit = 0x80; - while (bnum) { - gpio_set_value(spi_sclk, 0); /* clk low */ - if (data & bit) - gpio_set_value(spi_mosi, 1); - else - gpio_set_value(spi_mosi, 0); - udelay(1); - gpio_set_value(spi_sclk, 1); /* clk high */ - udelay(1); - bit >>= 1; - bnum--; - } -} - -static void toshiba_spi_write(char cmd, uint32 data, int num) -{ - char *bp; - - gpio_set_value(spi_cs, 1); /* cs high */ - - /* command byte first */ - toshiba_spi_write_byte(0, cmd); - - /* followed by parameter bytes */ - if (num) { - bp = (char *)&data; - bp += (num - 1); - while (num) { - toshiba_spi_write_byte(1, *bp); - num--; - bp--; - } - } - - gpio_set_value(spi_cs, 0); /* cs low */ - udelay(1); -} - -void toshiba_spi_read_bytes(char cmd, uint32 *data, int num) -{ - uint32 dbit, bits; - int bnum; - - gpio_set_value(spi_cs, 1); /* cs high */ - - /* command byte first */ - toshiba_spi_write_byte(0, cmd); - - if (num > 1) { - /* extra dc bit */ - gpio_set_value(spi_sclk, 0); /* clk low */ - udelay(1); - dbit = gpio_get_value(spi_miso);/* dc bit */ - udelay(1); - gpio_set_value(spi_sclk, 1); /* clk high */ - } - - /* followed by data bytes */ - bnum = num * 8; /* number of bits */ - bits = 0; - while (bnum) { - bits <<= 1; - gpio_set_value(spi_sclk, 0); /* clk low */ - udelay(1); - dbit = gpio_get_value(spi_miso); - udelay(1); - gpio_set_value(spi_sclk, 1); /* clk high */ - bits |= dbit; - bnum--; - } - - *data = bits; - - udelay(1); - gpio_set_value(spi_cs, 0); /* cs low */ - udelay(1); -} - -static void spi_pin_assign(void) -{ - /* Setting the Default GPIO's */ - spi_sclk = *(lcdc_toshiba_pdata->gpio_num); - spi_cs = *(lcdc_toshiba_pdata->gpio_num + 1); - spi_mosi = *(lcdc_toshiba_pdata->gpio_num + 2); - spi_miso = *(lcdc_toshiba_pdata->gpio_num + 3); -} - -static void toshiba_disp_powerup(void) -{ - if (!toshiba_state.disp_powered_up && !toshiba_state.display_on) { - /* Reset the hardware first */ - /* Include DAC power up implementation here */ - toshiba_state.disp_powered_up = TRUE; - } -} - -static void toshiba_disp_on(void) -{ - uint32 data; - - gpio_set_value(spi_cs, 0); /* low */ - gpio_set_value(spi_sclk, 1); /* high */ - gpio_set_value(spi_mosi, 0); - gpio_set_value(spi_miso, 0); - - if (toshiba_state.disp_powered_up && !toshiba_state.display_on) { - toshiba_spi_write(0, 0, 0); - mdelay(7); - toshiba_spi_write(0, 0, 0); - mdelay(7); - toshiba_spi_write(0, 0, 0); - mdelay(7); - toshiba_spi_write(0xba, 0x11, 1); - toshiba_spi_write(0x36, 0x00, 1); - mdelay(1); - toshiba_spi_write(0x3a, 0x60, 1); - toshiba_spi_write(0xb1, 0x5d, 1); - mdelay(1); - toshiba_spi_write(0xb2, 0x33, 1); - toshiba_spi_write(0xb3, 0x22, 1); - mdelay(1); - toshiba_spi_write(0xb4, 0x02, 1); - toshiba_spi_write(0xb5, 0x1e, 1); /* vcs -- adjust brightness */ - mdelay(1); - toshiba_spi_write(0xb6, 0x27, 1); - toshiba_spi_write(0xb7, 0x03, 1); - mdelay(1); - toshiba_spi_write(0xb9, 0x24, 1); - toshiba_spi_write(0xbd, 0xa1, 1); - mdelay(1); - toshiba_spi_write(0xbb, 0x00, 1); - toshiba_spi_write(0xbf, 0x01, 1); - mdelay(1); - toshiba_spi_write(0xbe, 0x00, 1); - toshiba_spi_write(0xc0, 0x11, 1); - mdelay(1); - toshiba_spi_write(0xc1, 0x11, 1); - toshiba_spi_write(0xc2, 0x11, 1); - mdelay(1); - toshiba_spi_write(0xc3, 0x3232, 2); - mdelay(1); - toshiba_spi_write(0xc4, 0x3232, 2); - mdelay(1); - toshiba_spi_write(0xc5, 0x3232, 2); - mdelay(1); - toshiba_spi_write(0xc6, 0x3232, 2); - mdelay(1); - toshiba_spi_write(0xc7, 0x6445, 2); - mdelay(1); - toshiba_spi_write(0xc8, 0x44, 1); - toshiba_spi_write(0xc9, 0x52, 1); - mdelay(1); - toshiba_spi_write(0xca, 0x00, 1); - mdelay(1); - toshiba_spi_write(0xec, 0x02a4, 2); /* 0x02a4 */ - mdelay(1); - toshiba_spi_write(0xcf, 0x01, 1); - mdelay(1); - toshiba_spi_write(0xd0, 0xc003, 2); /* c003 */ - mdelay(1); - toshiba_spi_write(0xd1, 0x01, 1); - mdelay(1); - toshiba_spi_write(0xd2, 0x0028, 2); - mdelay(1); - toshiba_spi_write(0xd3, 0x0028, 2); - mdelay(1); - toshiba_spi_write(0xd4, 0x26a4, 2); - mdelay(1); - toshiba_spi_write(0xd5, 0x20, 1); - mdelay(1); - toshiba_spi_write(0xef, 0x3200, 2); - mdelay(32); - toshiba_spi_write(0xbc, 0x80, 1); /* wvga pass through */ - toshiba_spi_write(0x3b, 0x00, 1); - mdelay(1); - toshiba_spi_write(0xb0, 0x16, 1); - mdelay(1); - toshiba_spi_write(0xb8, 0xfff5, 2); - mdelay(1); - toshiba_spi_write(0x11, 0, 0); - mdelay(5); - toshiba_spi_write(0x29, 0, 0); - mdelay(5); - toshiba_state.display_on = TRUE; - } - - data = 0; - toshiba_spi_read_bytes(0x04, &data, 3); - printk(KERN_INFO "toshiba_disp_on: id=%x\n", data); - -} - -static int lcdc_toshiba_panel_on(struct platform_device *pdev) -{ - if (!toshiba_state.disp_initialized) { - /* Configure reset GPIO that drives DAC */ - if (lcdc_toshiba_pdata->panel_config_gpio) - lcdc_toshiba_pdata->panel_config_gpio(1); - toshiba_disp_powerup(); - toshiba_disp_on(); - toshiba_state.disp_initialized = TRUE; - } - return 0; -} - -static int lcdc_toshiba_panel_off(struct platform_device *pdev) -{ - if (toshiba_state.disp_powered_up && toshiba_state.display_on) { - /* Main panel power off (Deep standby in) */ - - toshiba_spi_write(0x28, 0, 0); /* display off */ - mdelay(1); - toshiba_spi_write(0xb8, 0x8002, 2); /* output control */ - mdelay(1); - toshiba_spi_write(0x10, 0x00, 1); /* sleep mode in */ - mdelay(85); /* wait 85 msec */ - toshiba_spi_write(0xb0, 0x00, 1); /* deep standby in */ - mdelay(1); - if (lcdc_toshiba_pdata->panel_config_gpio) - lcdc_toshiba_pdata->panel_config_gpio(0); - toshiba_state.display_on = FALSE; - toshiba_state.disp_initialized = FALSE; - } - return 0; -} - -static void lcdc_toshiba_set_backlight(struct msm_fb_data_type *mfd) -{ - int bl_level; - int ret = -EPERM; - - bl_level = mfd->bl_level; - ret = pmic_set_led_intensity(LED_LCD, bl_level); - - if (ret) - printk(KERN_WARNING "%s: can't set lcd backlight!\n", - __func__); -} - -static int __init toshiba_probe(struct platform_device *pdev) -{ - if (pdev->id == 0) { - lcdc_toshiba_pdata = pdev->dev.platform_data; - spi_pin_assign(); - return 0; - } - msm_fb_add_device(pdev); - return 0; -} - -static struct platform_driver this_driver = { - .probe = toshiba_probe, - .driver = { - .name = "lcdc_toshiba_wvga", - }, -}; - -static struct msm_fb_panel_data toshiba_panel_data = { - .on = lcdc_toshiba_panel_on, - .off = lcdc_toshiba_panel_off, - .set_backlight = lcdc_toshiba_set_backlight, -}; - -static struct platform_device this_device = { - .name = "lcdc_toshiba_wvga", - .id = 1, - .dev = { - .platform_data = &toshiba_panel_data, - } -}; - -static int __init lcdc_toshiba_panel_init(void) -{ - int ret; - struct msm_panel_info *pinfo; -#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM - if (mddi_get_client_id() != 0) - return 0; - - ret = msm_fb_detect_client("lcdc_toshiba_wvga_pt"); - if (ret) - return 0; - -#endif - - ret = platform_driver_register(&this_driver); - if (ret) - return ret; - - pinfo = &toshiba_panel_data.panel_info; - pinfo->xres = 480; - pinfo->yres = 800; - pinfo->type = LCDC_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->wait_cycle = 0; - pinfo->bpp = 18; - pinfo->fb_num = 2; - /* 30Mhz mdp_lcdc_pclk and mdp_lcdc_pad_pcl */ - pinfo->clk_rate = 27648000; - pinfo->bl_max = 15; - pinfo->bl_min = 1; - - pinfo->lcdc.h_back_porch = 184; /* hsw = 8 + hbp=184 */ - pinfo->lcdc.h_front_porch = 4; - pinfo->lcdc.h_pulse_width = 8; - pinfo->lcdc.v_back_porch = 2; /* vsw=1 + vbp = 2 */ - pinfo->lcdc.v_front_porch = 3; - pinfo->lcdc.v_pulse_width = 1; - pinfo->lcdc.border_clr = 0; /* blk */ - pinfo->lcdc.underflow_clr = 0xff; /* blue */ - pinfo->lcdc.hsync_skew = 0; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - - return ret; -} - -device_initcall(lcdc_toshiba_panel_init); diff --git a/drivers/staging/msm/logo.c b/drivers/staging/msm/logo.c deleted file mode 100644 index 7272765..0000000 --- a/drivers/staging/msm/logo.c +++ /dev/null @@ -1,98 +0,0 @@ -/* drivers/video/msm/logo.c - * - * Show Logo in RLE 565 format - * - * Copyright (C) 2008 Google Incorporated - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#include -#include -#include -#include -#include -#include - -#include -#include - -#define fb_width(fb) ((fb)->var.xres) -#define fb_height(fb) ((fb)->var.yres) -#define fb_size(fb) ((fb)->var.xres * (fb)->var.yres * 2) - -static void memset16(void *_ptr, unsigned short val, unsigned count) -{ - unsigned short *ptr = _ptr; - count >>= 1; - while (count--) - *ptr++ = val; -} - -/* 565RLE image format: [count(2 bytes), rle(2 bytes)] */ -int load_565rle_image(char *filename) -{ - struct fb_info *info; - int fd, err = 0; - unsigned count, max; - unsigned short *data, *bits, *ptr; - - info = registered_fb[0]; - if (!info) { - printk(KERN_WARNING "%s: Can not access framebuffer\n", - __func__); - return -ENODEV; - } - - fd = sys_open(filename, O_RDONLY, 0); - if (fd < 0) { - printk(KERN_WARNING "%s: Can not open %s\n", - __func__, filename); - return -ENOENT; - } - count = (unsigned)sys_lseek(fd, (off_t)0, 2); - if (count == 0) { - sys_close(fd); - err = -EIO; - goto err_logo_close_file; - } - sys_lseek(fd, (off_t)0, 0); - data = kmalloc(count, GFP_KERNEL); - if (!data) { - printk(KERN_WARNING "%s: Can not alloc data\n", __func__); - err = -ENOMEM; - goto err_logo_close_file; - } - if ((unsigned)sys_read(fd, (char *)data, count) != count) { - err = -EIO; - goto err_logo_free_data; - } - - max = fb_width(info) * fb_height(info); - ptr = data; - bits = (unsigned short *)(info->screen_base); - while (count > 3) { - unsigned n = ptr[0]; - if (n > max) - break; - memset16(bits, ptr[1], n << 1); - bits += n; - max -= n; - ptr += 2; - count -= 4; - } - -err_logo_free_data: - kfree(data); -err_logo_close_file: - sys_close(fd); - return err; -} -EXPORT_SYMBOL(load_565rle_image); diff --git a/drivers/staging/msm/mddi.c b/drivers/staging/msm/mddi.c deleted file mode 100644 index 132eb1a..0000000 --- a/drivers/staging/msm/mddi.c +++ /dev/null @@ -1,375 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "mddihosti.h" -#include "mddihost.h" -#include -#include - -static int mddi_probe(struct platform_device *pdev); -static int mddi_remove(struct platform_device *pdev); - -static int mddi_off(struct platform_device *pdev); -static int mddi_on(struct platform_device *pdev); - -static int mddi_suspend(struct platform_device *pdev, pm_message_t state); -static int mddi_resume(struct platform_device *pdev); - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void mddi_early_suspend(struct early_suspend *h); -static void mddi_early_resume(struct early_suspend *h); -#endif - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; -static struct clk *mddi_clk; -static struct clk *mddi_pclk; -static struct mddi_platform_data *mddi_pdata; - -static struct platform_driver mddi_driver = { - .probe = mddi_probe, - .remove = mddi_remove, -#ifndef CONFIG_HAS_EARLYSUSPEND -#ifdef CONFIG_PM - .suspend = mddi_suspend, - .resume = mddi_resume, -#endif -#endif - .suspend_late = NULL, - .resume_early = NULL, - .shutdown = NULL, - .driver = { - .name = "mddi", - }, -}; - -extern int int_mddi_pri_flag; - -static int mddi_off(struct platform_device *pdev) -{ - int ret = 0; - - ret = panel_next_off(pdev); - - if (mddi_pdata && mddi_pdata->mddi_power_save) - mddi_pdata->mddi_power_save(0); - - return ret; -} - -static int mddi_on(struct platform_device *pdev) -{ - int ret = 0; - u32 clk_rate; - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - if (mddi_pdata && mddi_pdata->mddi_power_save) - mddi_pdata->mddi_power_save(1); - - clk_rate = mfd->fbi->var.pixclock; - clk_rate = min(clk_rate, mfd->panel_info.clk_max); - - if (mddi_pdata && - mddi_pdata->mddi_sel_clk && - mddi_pdata->mddi_sel_clk(&clk_rate)) - printk(KERN_ERR - "%s: can't select mddi io clk targate rate = %d\n", - __func__, clk_rate); - - if (clk_set_min_rate(mddi_clk, clk_rate) < 0) - printk(KERN_ERR "%s: clk_set_min_rate failed\n", - __func__); - - ret = panel_next_on(pdev); - - return ret; -} - -static int mddi_resource_initialized; - -static int mddi_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct platform_device *mdp_dev = NULL; - struct msm_fb_panel_data *pdata = NULL; - int rc; - resource_size_t size ; - u32 clk_rate; - - if ((pdev->id == 0) && (pdev->num_resources >= 0)) { - mddi_pdata = pdev->dev.platform_data; - - size = resource_size(&pdev->resource[0]); - msm_pmdh_base = ioremap(pdev->resource[0].start, size); - - MSM_FB_INFO("primary mddi base phy_addr = 0x%x virt = 0x%x\n", - pdev->resource[0].start, (int) msm_pmdh_base); - - if (unlikely(!msm_pmdh_base)) - return -ENOMEM; - - if (mddi_pdata && mddi_pdata->mddi_power_save) - mddi_pdata->mddi_power_save(1); - - mddi_resource_initialized = 1; - return 0; - } - - if (!mddi_resource_initialized) - return -EPERM; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - mdp_dev = platform_device_alloc("mdp", pdev->id); - if (!mdp_dev) - return -ENOMEM; - - /* - * link to the latest pdev - */ - mfd->pdev = mdp_dev; - mfd->dest = DISPLAY_LCD; - - /* - * alloc panel device data - */ - if (platform_device_add_data - (mdp_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "mddi_probe: platform_device_add_data failed!\n"); - platform_device_put(mdp_dev); - return -ENOMEM; - } - /* - * data chain - */ - pdata = mdp_dev->dev.platform_data; - pdata->on = mddi_on; - pdata->off = mddi_off; - pdata->next = pdev; - - /* - * get/set panel specific fb info - */ - mfd->panel_info = pdata->panel_info; - mfd->fb_imgType = MDP_RGB_565; - - clk_rate = mfd->panel_info.clk_max; - if (mddi_pdata && - mddi_pdata->mddi_sel_clk && - mddi_pdata->mddi_sel_clk(&clk_rate)) - printk(KERN_ERR - "%s: can't select mddi io clk targate rate = %d\n", - __func__, clk_rate); - - if (clk_set_max_rate(mddi_clk, clk_rate) < 0) - printk(KERN_ERR "%s: clk_set_max_rate failed\n", __func__); - mfd->panel_info.clk_rate = mfd->panel_info.clk_min; - - /* - * set driver data - */ - platform_set_drvdata(mdp_dev, mfd); - - /* - * register in mdp driver - */ - rc = platform_device_add(mdp_dev); - if (rc) - goto mddi_probe_err; - - pdev_list[pdev_list_cnt++] = pdev; - -#ifdef CONFIG_HAS_EARLYSUSPEND - mfd->mddi_early_suspend.level = EARLY_SUSPEND_LEVEL_DISABLE_FB; - mfd->mddi_early_suspend.suspend = mddi_early_suspend; - mfd->mddi_early_suspend.resume = mddi_early_resume; - register_early_suspend(&mfd->mddi_early_suspend); -#endif - - return 0; - -mddi_probe_err: - platform_device_put(mdp_dev); - return rc; -} - -static int mddi_pad_ctrl; -static int mddi_power_locked; -static int mddi_is_in_suspend; - -void mddi_disable(int lock) -{ - mddi_host_type host_idx = MDDI_HOST_PRIM; - - if (mddi_power_locked) - return; - - if (lock) - mddi_power_locked = 1; - - if (mddi_host_timer.function) - del_timer_sync(&mddi_host_timer); - - mddi_pad_ctrl = mddi_host_reg_in(PAD_CTL); - mddi_host_reg_out(PAD_CTL, 0x0); - - if (clk_set_min_rate(mddi_clk, 0) < 0) - printk(KERN_ERR "%s: clk_set_min_rate failed\n", __func__); - - clk_disable(mddi_clk); - if (mddi_pclk) - clk_disable(mddi_pclk); - disable_irq(INT_MDDI_PRI); - - if (mddi_pdata && mddi_pdata->mddi_power_save) - mddi_pdata->mddi_power_save(0); -} - -static int mddi_suspend(struct platform_device *pdev, pm_message_t state) -{ - if (mddi_is_in_suspend) - return 0; - - mddi_is_in_suspend = 1; - mddi_disable(0); - return 0; -} - -static int mddi_resume(struct platform_device *pdev) -{ - mddi_host_type host_idx = MDDI_HOST_PRIM; - - if (!mddi_is_in_suspend) - return 0; - - mddi_is_in_suspend = 0; - - if (mddi_power_locked) - return 0; - - enable_irq(INT_MDDI_PRI); - clk_enable(mddi_clk); - if (mddi_pclk) - clk_enable(mddi_pclk); - mddi_host_reg_out(PAD_CTL, mddi_pad_ctrl); - - if (mddi_host_timer.function) - mddi_host_timer_service(0); - - return 0; -} - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void mddi_early_suspend(struct early_suspend *h) -{ - pm_message_t state; - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - mddi_early_suspend); - - state.event = PM_EVENT_SUSPEND; - mddi_suspend(mfd->pdev, state); -} - -static void mddi_early_resume(struct early_suspend *h) -{ - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - mddi_early_suspend); - mddi_resume(mfd->pdev); -} -#endif - -static int mddi_remove(struct platform_device *pdev) -{ - if (mddi_host_timer.function) - del_timer_sync(&mddi_host_timer); - - iounmap(msm_pmdh_base); - - return 0; -} - -static int mddi_register_driver(void) -{ - return platform_driver_register(&mddi_driver); -} - -static int __init mddi_driver_init(void) -{ - int ret; - - mddi_clk = clk_get(NULL, "mddi_clk"); - if (IS_ERR(mddi_clk)) { - printk(KERN_ERR "can't find mddi_clk \n"); - return PTR_ERR(mddi_clk); - } - clk_enable(mddi_clk); - - mddi_pclk = clk_get(NULL, "mddi_pclk"); - if (IS_ERR(mddi_pclk)) - mddi_pclk = NULL; - else - clk_enable(mddi_pclk); - - ret = mddi_register_driver(); - if (ret) { - clk_disable(mddi_clk); - clk_put(mddi_clk); - if (mddi_pclk) { - clk_disable(mddi_pclk); - clk_put(mddi_pclk); - } - printk(KERN_ERR "mddi_register_driver() failed!\n"); - return ret; - } - - mddi_init(); - - return ret; -} - -module_init(mddi_driver_init); diff --git a/drivers/staging/msm/mddi_ext.c b/drivers/staging/msm/mddi_ext.c deleted file mode 100644 index c0c168c7..0000000 --- a/drivers/staging/msm/mddi_ext.c +++ /dev/null @@ -1,320 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "mddihosti.h" - -static int mddi_ext_probe(struct platform_device *pdev); -static int mddi_ext_remove(struct platform_device *pdev); - -static int mddi_ext_off(struct platform_device *pdev); -static int mddi_ext_on(struct platform_device *pdev); - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; - -static int mddi_ext_suspend(struct platform_device *pdev, pm_message_t state); -static int mddi_ext_resume(struct platform_device *pdev); - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void mddi_ext_early_suspend(struct early_suspend *h); -static void mddi_ext_early_resume(struct early_suspend *h); -#endif - -static struct platform_driver mddi_ext_driver = { - .probe = mddi_ext_probe, - .remove = mddi_ext_remove, -#ifndef CONFIG_HAS_EARLYSUSPEND -#ifdef CONFIG_PM - .suspend = mddi_ext_suspend, - .resume = mddi_ext_resume, -#endif -#endif - .resume_early = NULL, - .resume = NULL, - .shutdown = NULL, - .driver = { - .name = "mddi_ext", - }, -}; - -static struct clk *mddi_ext_clk; -static struct mddi_platform_data *mddi_ext_pdata; - -extern int int_mddi_ext_flag; - -static int mddi_ext_off(struct platform_device *pdev) -{ - int ret = 0; - - ret = panel_next_off(pdev); - mddi_host_stop_ext_display(); - - return ret; -} - -static int mddi_ext_on(struct platform_device *pdev) -{ - int ret = 0; - u32 clk_rate; - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - clk_rate = mfd->fbi->var.pixclock; - clk_rate = min(clk_rate, mfd->panel_info.clk_max); - - if (mddi_ext_pdata && - mddi_ext_pdata->mddi_sel_clk && - mddi_ext_pdata->mddi_sel_clk(&clk_rate)) - printk(KERN_ERR - "%s: can't select mddi io clk targate rate = %d\n", - __func__, clk_rate); - - if (clk_set_min_rate(mddi_ext_clk, clk_rate) < 0) - printk(KERN_ERR "%s: clk_set_min_rate failed\n", - __func__); - - mddi_host_start_ext_display(); - ret = panel_next_on(pdev); - - return ret; -} - -static int mddi_ext_resource_initialized; - -static int mddi_ext_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct platform_device *mdp_dev = NULL; - struct msm_fb_panel_data *pdata = NULL; - int rc; - resource_size_t size ; - u32 clk_rate; - - if ((pdev->id == 0) && (pdev->num_resources >= 0)) { - mddi_ext_pdata = pdev->dev.platform_data; - - size = resource_size(&pdev->resource[0]); - msm_emdh_base = ioremap(pdev->resource[0].start, size); - - MSM_FB_INFO("external mddi base address = 0x%x\n", - pdev->resource[0].start); - - if (unlikely(!msm_emdh_base)) - return -ENOMEM; - - mddi_ext_resource_initialized = 1; - return 0; - } - - if (!mddi_ext_resource_initialized) - return -EPERM; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - mdp_dev = platform_device_alloc("mdp", pdev->id); - if (!mdp_dev) - return -ENOMEM; - - /* - * link to the latest pdev - */ - mfd->pdev = mdp_dev; - mfd->dest = DISPLAY_EXT_MDDI; - - /* - * alloc panel device data - */ - if (platform_device_add_data - (mdp_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "mddi_ext_probe: platform_device_add_data failed!\n"); - platform_device_put(mdp_dev); - return -ENOMEM; - } - /* - * data chain - */ - pdata = mdp_dev->dev.platform_data; - pdata->on = mddi_ext_on; - pdata->off = mddi_ext_off; - pdata->next = pdev; - - /* - * get/set panel specific fb info - */ - mfd->panel_info = pdata->panel_info; - mfd->fb_imgType = MDP_RGB_565; - - clk_rate = mfd->panel_info.clk_max; - if (mddi_ext_pdata && - mddi_ext_pdata->mddi_sel_clk && - mddi_ext_pdata->mddi_sel_clk(&clk_rate)) - printk(KERN_ERR - "%s: can't select mddi io clk targate rate = %d\n", - __func__, clk_rate); - - if (clk_set_max_rate(mddi_ext_clk, clk_rate) < 0) - printk(KERN_ERR "%s: clk_set_max_rate failed\n", __func__); - mfd->panel_info.clk_rate = mfd->panel_info.clk_min; - - /* - * set driver data - */ - platform_set_drvdata(mdp_dev, mfd); - - /* - * register in mdp driver - */ - rc = platform_device_add(mdp_dev); - if (rc) - goto mddi_ext_probe_err; - - pdev_list[pdev_list_cnt++] = pdev; - -#ifdef CONFIG_HAS_EARLYSUSPEND - mfd->mddi_ext_early_suspend.level = EARLY_SUSPEND_LEVEL_DISABLE_FB; - mfd->mddi_ext_early_suspend.suspend = mddi_ext_early_suspend; - mfd->mddi_ext_early_suspend.resume = mddi_ext_early_resume; - register_early_suspend(&mfd->mddi_ext_early_suspend); -#endif - - return 0; - -mddi_ext_probe_err: - platform_device_put(mdp_dev); - return rc; -} - -static int mddi_ext_is_in_suspend; - -static int mddi_ext_suspend(struct platform_device *pdev, pm_message_t state) -{ - if (mddi_ext_is_in_suspend) - return 0; - - mddi_ext_is_in_suspend = 1; - - if (clk_set_min_rate(mddi_ext_clk, 0) < 0) - printk(KERN_ERR "%s: clk_set_min_rate failed\n", __func__); - - clk_disable(mddi_ext_clk); - disable_irq(INT_MDDI_EXT); - - return 0; -} - -static int mddi_ext_resume(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - if (!mddi_ext_is_in_suspend) - return 0; - - mddi_ext_is_in_suspend = 0; - enable_irq(INT_MDDI_EXT); - - clk_enable(mddi_ext_clk); - - return 0; -} - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void mddi_ext_early_suspend(struct early_suspend *h) -{ - pm_message_t state; - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - mddi_ext_early_suspend); - - state.event = PM_EVENT_SUSPEND; - mddi_ext_suspend(mfd->pdev, state); -} - -static void mddi_ext_early_resume(struct early_suspend *h) -{ - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - mddi_ext_early_suspend); - mddi_ext_resume(mfd->pdev); -} -#endif - -static int mddi_ext_remove(struct platform_device *pdev) -{ - iounmap(msm_emdh_base); - return 0; -} - -static int mddi_ext_register_driver(void) -{ - return platform_driver_register(&mddi_ext_driver); -} - -static int __init mddi_ext_driver_init(void) -{ - int ret; - - mddi_ext_clk = clk_get(NULL, "emdh_clk"); - if (IS_ERR(mddi_ext_clk)) { - printk(KERN_ERR "can't find emdh_clk\n"); - return PTR_ERR(mddi_ext_clk); - } - clk_enable(mddi_ext_clk); - - ret = mddi_ext_register_driver(); - if (ret) { - clk_disable(mddi_ext_clk); - clk_put(mddi_ext_clk); - printk(KERN_ERR "mddi_ext_register_driver() failed!\n"); - return ret; - } - mddi_init(); - - return ret; -} - -module_init(mddi_ext_driver_init); diff --git a/drivers/staging/msm/mddi_ext_lcd.c b/drivers/staging/msm/mddi_ext_lcd.c deleted file mode 100644 index 502e80d..0000000 --- a/drivers/staging/msm/mddi_ext_lcd.c +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" - -static int mddi_ext_lcd_on(struct platform_device *pdev); -static int mddi_ext_lcd_off(struct platform_device *pdev); - -static int mddi_ext_lcd_on(struct platform_device *pdev) -{ - return 0; -} - -static int mddi_ext_lcd_off(struct platform_device *pdev) -{ - return 0; -} - -static int __init mddi_ext_lcd_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = mddi_ext_lcd_probe, - .driver = { - .name = "extmddi_svga", - }, -}; - -static struct msm_fb_panel_data mddi_ext_lcd_panel_data = { - .panel_info.xres = 800, - .panel_info.yres = 600, - .panel_info.type = EXT_MDDI_PANEL, - .panel_info.pdest = DISPLAY_1, - .panel_info.wait_cycle = 0, - .panel_info.bpp = 18, - .panel_info.fb_num = 2, - .panel_info.clk_rate = 122880000, - .panel_info.clk_min = 120000000, - .panel_info.clk_max = 125000000, - .on = mddi_ext_lcd_on, - .off = mddi_ext_lcd_off, -}; - -static struct platform_device this_device = { - .name = "extmddi_svga", - .id = 0, - .dev = { - .platform_data = &mddi_ext_lcd_panel_data, - } -}; - -static int __init mddi_ext_lcd_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - - ret = platform_driver_register(&this_driver); - if (!ret) { - pinfo = &mddi_ext_lcd_panel_data.panel_info; - pinfo->lcd.vsync_enable = FALSE; - pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(mddi_ext_lcd_init); diff --git a/drivers/staging/msm/mddi_prism.c b/drivers/staging/msm/mddi_prism.c deleted file mode 100644 index 489d404..0000000 --- a/drivers/staging/msm/mddi_prism.c +++ /dev/null @@ -1,114 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" - -static int prism_lcd_on(struct platform_device *pdev); -static int prism_lcd_off(struct platform_device *pdev); - -static int prism_lcd_on(struct platform_device *pdev) -{ - /* Set the MDP pixel data attributes for Primary Display */ - mddi_host_write_pix_attr_reg(0x00C3); - - return 0; -} - -static int prism_lcd_off(struct platform_device *pdev) -{ - return 0; -} - -static int __init prism_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = prism_probe, - .driver = { - .name = "mddi_prism_wvga", - }, -}; - -static struct msm_fb_panel_data prism_panel_data = { - .on = prism_lcd_on, - .off = prism_lcd_off, -}; - -static struct platform_device this_device = { - .name = "mddi_prism_wvga", - .id = 0, - .dev = { - .platform_data = &prism_panel_data, - } -}; - -static int __init prism_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - u32 id; - - ret = msm_fb_detect_client("mddi_prism_wvga"); - if (ret == -ENODEV) - return 0; - - if (ret) { - id = mddi_get_client_id(); - - if (((id >> 16) != 0x4474) || ((id & 0xffff) == 0x8960)) - return 0; - } -#endif - ret = platform_driver_register(&this_driver); - if (!ret) { - pinfo = &prism_panel_data.panel_info; - pinfo->xres = 800; - pinfo->yres = 480; - pinfo->type = MDDI_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; - pinfo->wait_cycle = 0; - pinfo->bpp = 18; - pinfo->fb_num = 2; - pinfo->clk_rate = 153600000; - pinfo->clk_min = 150000000; - pinfo->clk_max = 160000000; - pinfo->lcd.vsync_enable = TRUE; - pinfo->lcd.refx100 = 6050; - pinfo->lcd.v_back_porch = 23; - pinfo->lcd.v_front_porch = 20; - pinfo->lcd.v_pulse_width = 105; - pinfo->lcd.hw_vsync_mode = TRUE; - pinfo->lcd.vsync_notifier_period = 0; - - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(prism_init); diff --git a/drivers/staging/msm/mddi_sharp.c b/drivers/staging/msm/mddi_sharp.c deleted file mode 100644 index 1da1be4..0000000 --- a/drivers/staging/msm/mddi_sharp.c +++ /dev/null @@ -1,892 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" - -#define SHARP_QVGA_PRIM 1 -#define SHARP_128X128_SECD 2 - -extern uint32 mddi_host_core_version; -static boolean mddi_debug_prim_wait = FALSE; -static boolean mddi_sharp_vsync_wake = TRUE; -static boolean mddi_sharp_monitor_refresh_value = TRUE; -static boolean mddi_sharp_report_refresh_measurements = FALSE; -static uint32 mddi_sharp_rows_per_second = 13830; /* 5200000/376 */ -static uint32 mddi_sharp_rows_per_refresh = 338; -static uint32 mddi_sharp_usecs_per_refresh = 24440; /* (376+338)/5200000 */ -static boolean mddi_sharp_debug_60hz_refresh = FALSE; - -extern mddi_gpio_info_type mddi_gpio; -extern boolean mddi_vsync_detect_enabled; -static msm_fb_vsync_handler_type mddi_sharp_vsync_handler; -static void *mddi_sharp_vsync_handler_arg; -static uint16 mddi_sharp_vsync_attempts; - -static void mddi_sharp_prim_lcd_init(void); -static void mddi_sharp_sub_lcd_init(void); -static void mddi_sharp_lcd_set_backlight(struct msm_fb_data_type *mfd); -static void mddi_sharp_vsync_set_handler(msm_fb_vsync_handler_type handler, - void *); -static void mddi_sharp_lcd_vsync_detected(boolean detected); -static struct msm_panel_common_pdata *mddi_sharp_pdata; - -#define REG_SYSCTL 0x0000 -#define REG_INTR 0x0006 -#define REG_CLKCNF 0x000C -#define REG_CLKDIV1 0x000E -#define REG_CLKDIV2 0x0010 - -#define REG_GIOD 0x0040 -#define REG_GIOA 0x0042 - -#define REG_AGM 0x010A -#define REG_FLFT 0x0110 -#define REG_FRGT 0x0112 -#define REG_FTOP 0x0114 -#define REG_FBTM 0x0116 -#define REG_FSTRX 0x0118 -#define REG_FSTRY 0x011A -#define REG_VRAM 0x0202 -#define REG_SSDCTL 0x0330 -#define REG_SSD0 0x0332 -#define REG_PSTCTL1 0x0400 -#define REG_PSTCTL2 0x0402 -#define REG_PTGCTL 0x042A -#define REG_PTHP 0x042C -#define REG_PTHB 0x042E -#define REG_PTHW 0x0430 -#define REG_PTHF 0x0432 -#define REG_PTVP 0x0434 -#define REG_PTVB 0x0436 -#define REG_PTVW 0x0438 -#define REG_PTVF 0x043A -#define REG_VBLKS 0x0458 -#define REG_VBLKE 0x045A -#define REG_SUBCTL 0x0700 -#define REG_SUBTCMD 0x0702 -#define REG_SUBTCMDD 0x0704 -#define REG_REVBYTE 0x0A02 -#define REG_REVCNT 0x0A04 -#define REG_REVATTR 0x0A06 -#define REG_REVFMT 0x0A08 - -#define SHARP_SUB_UNKNOWN 0xffffffff -#define SHARP_SUB_HYNIX 1 -#define SHARP_SUB_ROHM 2 - -static uint32 sharp_subpanel_type = SHARP_SUB_UNKNOWN; - -static void sub_through_write(int sub_rs, uint32 sub_data) -{ - mddi_queue_register_write(REG_SUBTCMDD, sub_data, FALSE, 0); - - /* CS=1,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x000e | sub_rs, FALSE, 0); - - /* CS=0,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0006 | sub_rs, FALSE, 0); - - /* CS=0,RD=1,WE=0,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0004 | sub_rs, FALSE, 0); - - /* CS=0,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0006 | sub_rs, FALSE, 0); - - /* CS=1,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x000e | sub_rs, TRUE, 0); -} - -static uint32 sub_through_read(int sub_rs) -{ - uint32 sub_data; - - /* CS=1,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x000e | sub_rs, FALSE, 0); - - /* CS=0,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0006 | sub_rs, FALSE, 0); - - /* CS=0,RD=1,WE=0,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0002 | sub_rs, TRUE, 0); - - mddi_queue_register_read(REG_SUBTCMDD, &sub_data, TRUE, 0); - - /* CS=0,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x0006 | sub_rs, FALSE, 0); - - /* CS=1,RD=1,WE=1,RS=sub_rs */ - mddi_queue_register_write(REG_SUBTCMD, 0x000e | sub_rs, TRUE, 0); - - return sub_data; -} - -static void serigo(uint32 ssd) -{ - uint32 ssdctl; - - mddi_queue_register_read(REG_SSDCTL, &ssdctl, TRUE, 0); - ssdctl = ((ssdctl & 0xE7) | 0x02); - - mddi_queue_register_write(REG_SSD0, ssd, FALSE, 0); - mddi_queue_register_write(REG_SSDCTL, ssdctl, TRUE, 0); - - do { - mddi_queue_register_read(REG_SSDCTL, &ssdctl, TRUE, 0); - } while ((ssdctl & 0x0002) != 0); - - if (mddi_debug_prim_wait) - mddi_wait(2); -} - -static void mddi_sharp_lcd_powerdown(void) -{ - serigo(0x0131); - serigo(0x0300); - mddi_wait(40); - serigo(0x0135); - mddi_wait(20); - serigo(0x2122); - mddi_wait(20); - serigo(0x0201); - mddi_wait(20); - serigo(0x2100); - mddi_wait(20); - serigo(0x2000); - mddi_wait(20); - - mddi_queue_register_write(REG_PSTCTL1, 0x1, TRUE, 0); - mddi_wait(100); - mddi_queue_register_write(REG_PSTCTL1, 0x0, TRUE, 0); - mddi_wait(2); - mddi_queue_register_write(REG_SYSCTL, 0x1, TRUE, 0); - mddi_wait(2); - mddi_queue_register_write(REG_CLKDIV1, 0x3, TRUE, 0); - mddi_wait(2); - mddi_queue_register_write(REG_SSDCTL, 0x0000, TRUE, 0); /* SSDRESET */ - mddi_queue_register_write(REG_SYSCTL, 0x0, TRUE, 0); - mddi_wait(2); -} - -static void mddi_sharp_lcd_set_backlight(struct msm_fb_data_type *mfd) -{ - uint32 regdata; - int32 level; - int max = mfd->panel_info.bl_max; - int min = mfd->panel_info.bl_min; - - if (mddi_sharp_pdata && mddi_sharp_pdata->backlight_level) { - level = mddi_sharp_pdata->backlight_level(mfd->bl_level, - max, - min); - - if (level < 0) - return; - - /* use Rodem GPIO(2:0) to give 8 levels of backlight (7-0) */ - /* Set lower 3 GPIOs as Outputs (set to 0) */ - mddi_queue_register_read(REG_GIOA, ®data, TRUE, 0); - mddi_queue_register_write(REG_GIOA, regdata & 0xfff8, TRUE, 0); - - /* Set lower 3 GPIOs as level */ - mddi_queue_register_read(REG_GIOD, ®data, TRUE, 0); - mddi_queue_register_write(REG_GIOD, - (regdata & 0xfff8) | (0x07 & level), TRUE, 0); - } -} - -static void mddi_sharp_prim_lcd_init(void) -{ - mddi_queue_register_write(REG_SYSCTL, 0x4000, TRUE, 0); - mddi_wait(1); - mddi_queue_register_write(REG_SYSCTL, 0x0000, TRUE, 0); - mddi_wait(5); - mddi_queue_register_write(REG_SYSCTL, 0x0001, FALSE, 0); - mddi_queue_register_write(REG_CLKDIV1, 0x000b, FALSE, 0); - - /* new reg write below */ - if (mddi_sharp_debug_60hz_refresh) - mddi_queue_register_write(REG_CLKCNF, 0x070d, FALSE, 0); - else - mddi_queue_register_write(REG_CLKCNF, 0x0708, FALSE, 0); - - mddi_queue_register_write(REG_SYSCTL, 0x0201, FALSE, 0); - mddi_queue_register_write(REG_PTGCTL, 0x0010, FALSE, 0); - mddi_queue_register_write(REG_PTHP, 4, FALSE, 0); - mddi_queue_register_write(REG_PTHB, 40, FALSE, 0); - mddi_queue_register_write(REG_PTHW, 240, FALSE, 0); - if (mddi_sharp_debug_60hz_refresh) - mddi_queue_register_write(REG_PTHF, 12, FALSE, 0); - else - mddi_queue_register_write(REG_PTHF, 92, FALSE, 0); - - mddi_wait(1); - - mddi_queue_register_write(REG_PTVP, 1, FALSE, 0); - mddi_queue_register_write(REG_PTVB, 2, FALSE, 0); - mddi_queue_register_write(REG_PTVW, 320, FALSE, 0); - mddi_queue_register_write(REG_PTVF, 15, FALSE, 0); - - mddi_wait(1); - - /* vram_color set REG_AGM???? */ - mddi_queue_register_write(REG_AGM, 0x0000, TRUE, 0); - - mddi_queue_register_write(REG_SSDCTL, 0x0000, FALSE, 0); - mddi_queue_register_write(REG_SSDCTL, 0x0001, TRUE, 0); - mddi_wait(1); - mddi_queue_register_write(REG_PSTCTL1, 0x0001, TRUE, 0); - mddi_wait(10); - - serigo(0x0701); - /* software reset */ - mddi_wait(1); - /* Wait over 50us */ - - serigo(0x0400); - /* DCLK~ACHSYNC~ACVSYNC polarity setting */ - serigo(0x2900); - /* EEPROM start read address setting */ - serigo(0x2606); - /* EEPROM start read register setting */ - mddi_wait(20); - /* Wait over 20ms */ - - serigo(0x0503); - /* Horizontal timing setting */ - serigo(0x062C); - /* Veritical timing setting */ - serigo(0x2001); - /* power initialize setting(VDC2) */ - mddi_wait(20); - /* Wait over 20ms */ - - serigo(0x2120); - /* Initialize power setting(CPS) */ - mddi_wait(20); - /* Wait over 20ms */ - - serigo(0x2130); - /* Initialize power setting(CPS) */ - mddi_wait(20); - /* Wait over 20ms */ - - serigo(0x2132); - /* Initialize power setting(CPS) */ - mddi_wait(10); - /* Wait over 10ms */ - - serigo(0x2133); - /* Initialize power setting(CPS) */ - mddi_wait(20); - /* Wait over 20ms */ - - serigo(0x0200); - /* Panel initialize release(INIT) */ - mddi_wait(1); - /* Wait over 1ms */ - - serigo(0x0131); - /* Panel setting(CPS) */ - mddi_wait(1); - /* Wait over 1ms */ - - mddi_queue_register_write(REG_PSTCTL1, 0x0003, TRUE, 0); - - /* if (FFA LCD is upside down) -> serigo(0x0100); */ - serigo(0x0130); - - /* Black mask release(display ON) */ - mddi_wait(1); - /* Wait over 1ms */ - - if (mddi_sharp_vsync_wake) { - mddi_queue_register_write(REG_VBLKS, 0x1001, TRUE, 0); - mddi_queue_register_write(REG_VBLKE, 0x1002, TRUE, 0); - } - - /* Set the MDP pixel data attributes for Primary Display */ - mddi_host_write_pix_attr_reg(0x00C3); - return; - -} - -void mddi_sharp_sub_lcd_init(void) -{ - - mddi_queue_register_write(REG_SYSCTL, 0x4000, FALSE, 0); - mddi_queue_register_write(REG_SYSCTL, 0x0000, TRUE, 0); - mddi_wait(100); - - mddi_queue_register_write(REG_SYSCTL, 0x0001, FALSE, 0); - mddi_queue_register_write(REG_CLKDIV1, 0x000b, FALSE, 0); - mddi_queue_register_write(REG_CLKCNF, 0x0708, FALSE, 0); - mddi_queue_register_write(REG_SYSCTL, 0x0201, FALSE, 0); - mddi_queue_register_write(REG_PTGCTL, 0x0010, FALSE, 0); - mddi_queue_register_write(REG_PTHP, 4, FALSE, 0); - mddi_queue_register_write(REG_PTHB, 40, FALSE, 0); - mddi_queue_register_write(REG_PTHW, 128, FALSE, 0); - mddi_queue_register_write(REG_PTHF, 92, FALSE, 0); - mddi_queue_register_write(REG_PTVP, 1, FALSE, 0); - mddi_queue_register_write(REG_PTVB, 2, FALSE, 0); - mddi_queue_register_write(REG_PTVW, 128, FALSE, 0); - mddi_queue_register_write(REG_PTVF, 15, FALSE, 0); - - /* Now the sub display..... */ - /* Reset High */ - mddi_queue_register_write(REG_SUBCTL, 0x0200, FALSE, 0); - /* CS=1,RD=1,WE=1,RS=1 */ - mddi_queue_register_write(REG_SUBTCMD, 0x000f, TRUE, 0); - mddi_wait(1); - /* Wait 5us */ - - if (sharp_subpanel_type == SHARP_SUB_UNKNOWN) { - uint32 data; - - sub_through_write(1, 0x05); - sub_through_write(1, 0x6A); - sub_through_write(1, 0x1D); - sub_through_write(1, 0x05); - data = sub_through_read(1); - if (data == 0x6A) { - sharp_subpanel_type = SHARP_SUB_HYNIX; - } else { - sub_through_write(0, 0x36); - sub_through_write(1, 0xA8); - sub_through_write(0, 0x09); - data = sub_through_read(1); - data = sub_through_read(1); - if (data == 0x54) { - sub_through_write(0, 0x36); - sub_through_write(1, 0x00); - sharp_subpanel_type = SHARP_SUB_ROHM; - } - } - } - - if (sharp_subpanel_type == SHARP_SUB_HYNIX) { - sub_through_write(1, 0x00); /* Display setting 1 */ - sub_through_write(1, 0x04); - sub_through_write(1, 0x01); - sub_through_write(1, 0x05); - sub_through_write(1, 0x0280); - sub_through_write(1, 0x0301); - sub_through_write(1, 0x0402); - sub_through_write(1, 0x0500); - sub_through_write(1, 0x0681); - sub_through_write(1, 0x077F); - sub_through_write(1, 0x08C0); - sub_through_write(1, 0x0905); - sub_through_write(1, 0x0A02); - sub_through_write(1, 0x0B00); - sub_through_write(1, 0x0C00); - sub_through_write(1, 0x0D00); - sub_through_write(1, 0x0E00); - sub_through_write(1, 0x0F00); - - sub_through_write(1, 0x100B); /* Display setting 2 */ - sub_through_write(1, 0x1103); - sub_through_write(1, 0x1237); - sub_through_write(1, 0x1300); - sub_through_write(1, 0x1400); - sub_through_write(1, 0x1500); - sub_through_write(1, 0x1605); - sub_through_write(1, 0x1700); - sub_through_write(1, 0x1800); - sub_through_write(1, 0x192E); - sub_through_write(1, 0x1A00); - sub_through_write(1, 0x1B00); - sub_through_write(1, 0x1C00); - - sub_through_write(1, 0x151A); /* Power setting */ - - sub_through_write(1, 0x2002); /* Gradation Palette setting */ - sub_through_write(1, 0x2107); - sub_through_write(1, 0x220C); - sub_through_write(1, 0x2310); - sub_through_write(1, 0x2414); - sub_through_write(1, 0x2518); - sub_through_write(1, 0x261C); - sub_through_write(1, 0x2720); - sub_through_write(1, 0x2824); - sub_through_write(1, 0x2928); - sub_through_write(1, 0x2A2B); - sub_through_write(1, 0x2B2E); - sub_through_write(1, 0x2C31); - sub_through_write(1, 0x2D34); - sub_through_write(1, 0x2E37); - sub_through_write(1, 0x2F3A); - sub_through_write(1, 0x303C); - sub_through_write(1, 0x313E); - sub_through_write(1, 0x323F); - sub_through_write(1, 0x3340); - sub_through_write(1, 0x3441); - sub_through_write(1, 0x3543); - sub_through_write(1, 0x3646); - sub_through_write(1, 0x3749); - sub_through_write(1, 0x384C); - sub_through_write(1, 0x394F); - sub_through_write(1, 0x3A52); - sub_through_write(1, 0x3B59); - sub_through_write(1, 0x3C60); - sub_through_write(1, 0x3D67); - sub_through_write(1, 0x3E6E); - sub_through_write(1, 0x3F7F); - sub_through_write(1, 0x4001); - sub_through_write(1, 0x4107); - sub_through_write(1, 0x420C); - sub_through_write(1, 0x4310); - sub_through_write(1, 0x4414); - sub_through_write(1, 0x4518); - sub_through_write(1, 0x461C); - sub_through_write(1, 0x4720); - sub_through_write(1, 0x4824); - sub_through_write(1, 0x4928); - sub_through_write(1, 0x4A2B); - sub_through_write(1, 0x4B2E); - sub_through_write(1, 0x4C31); - sub_through_write(1, 0x4D34); - sub_through_write(1, 0x4E37); - sub_through_write(1, 0x4F3A); - sub_through_write(1, 0x503C); - sub_through_write(1, 0x513E); - sub_through_write(1, 0x523F); - sub_through_write(1, 0x5340); - sub_through_write(1, 0x5441); - sub_through_write(1, 0x5543); - sub_through_write(1, 0x5646); - sub_through_write(1, 0x5749); - sub_through_write(1, 0x584C); - sub_through_write(1, 0x594F); - sub_through_write(1, 0x5A52); - sub_through_write(1, 0x5B59); - sub_through_write(1, 0x5C60); - sub_through_write(1, 0x5D67); - sub_through_write(1, 0x5E6E); - sub_through_write(1, 0x5F7E); - sub_through_write(1, 0x6000); - sub_through_write(1, 0x6107); - sub_through_write(1, 0x620C); - sub_through_write(1, 0x6310); - sub_through_write(1, 0x6414); - sub_through_write(1, 0x6518); - sub_through_write(1, 0x661C); - sub_through_write(1, 0x6720); - sub_through_write(1, 0x6824); - sub_through_write(1, 0x6928); - sub_through_write(1, 0x6A2B); - sub_through_write(1, 0x6B2E); - sub_through_write(1, 0x6C31); - sub_through_write(1, 0x6D34); - sub_through_write(1, 0x6E37); - sub_through_write(1, 0x6F3A); - sub_through_write(1, 0x703C); - sub_through_write(1, 0x713E); - sub_through_write(1, 0x723F); - sub_through_write(1, 0x7340); - sub_through_write(1, 0x7441); - sub_through_write(1, 0x7543); - sub_through_write(1, 0x7646); - sub_through_write(1, 0x7749); - sub_through_write(1, 0x784C); - sub_through_write(1, 0x794F); - sub_through_write(1, 0x7A52); - sub_through_write(1, 0x7B59); - sub_through_write(1, 0x7C60); - sub_through_write(1, 0x7D67); - sub_through_write(1, 0x7E6E); - sub_through_write(1, 0x7F7D); - - sub_through_write(1, 0x1851); /* Display on */ - - mddi_queue_register_write(REG_AGM, 0x0000, TRUE, 0); - - /* 1 pixel / 1 post clock */ - mddi_queue_register_write(REG_CLKDIV2, 0x3b00, FALSE, 0); - - /* SUB LCD select */ - mddi_queue_register_write(REG_PSTCTL2, 0x0080, FALSE, 0); - - /* RS=0,command initiate number=0,select master mode */ - mddi_queue_register_write(REG_SUBCTL, 0x0202, FALSE, 0); - - /* Sub LCD Data transform start */ - mddi_queue_register_write(REG_PSTCTL1, 0x0003, FALSE, 0); - - } else if (sharp_subpanel_type == SHARP_SUB_ROHM) { - - sub_through_write(0, 0x01); /* Display setting */ - sub_through_write(1, 0x00); - - mddi_wait(1); - /* Wait 100us <----- ******* Update 2005/01/24 */ - - sub_through_write(0, 0xB6); - sub_through_write(1, 0x0C); - sub_through_write(1, 0x4A); - sub_through_write(1, 0x20); - sub_through_write(0, 0x3A); - sub_through_write(1, 0x05); - sub_through_write(0, 0xB7); - sub_through_write(1, 0x01); - sub_through_write(0, 0xBA); - sub_through_write(1, 0x20); - sub_through_write(1, 0x02); - sub_through_write(0, 0x25); - sub_through_write(1, 0x4F); - sub_through_write(0, 0xBB); - sub_through_write(1, 0x00); - sub_through_write(0, 0x36); - sub_through_write(1, 0x00); - sub_through_write(0, 0xB1); - sub_through_write(1, 0x05); - sub_through_write(0, 0xBE); - sub_through_write(1, 0x80); - sub_through_write(0, 0x26); - sub_through_write(1, 0x01); - sub_through_write(0, 0x2A); - sub_through_write(1, 0x02); - sub_through_write(1, 0x81); - sub_through_write(0, 0x2B); - sub_through_write(1, 0x00); - sub_through_write(1, 0x7F); - - sub_through_write(0, 0x2C); - sub_through_write(0, 0x11); /* Sleep mode off */ - - mddi_wait(1); - /* Wait 100 ms <----- ******* Update 2005/01/24 */ - - sub_through_write(0, 0x29); /* Display on */ - sub_through_write(0, 0xB3); - sub_through_write(1, 0x20); - sub_through_write(1, 0xAA); - sub_through_write(1, 0xA0); - sub_through_write(1, 0x20); - sub_through_write(1, 0x30); - sub_through_write(1, 0xA6); - sub_through_write(1, 0xFF); - sub_through_write(1, 0x9A); - sub_through_write(1, 0x9F); - sub_through_write(1, 0xAF); - sub_through_write(1, 0xBC); - sub_through_write(1, 0xCF); - sub_through_write(1, 0xDF); - sub_through_write(1, 0x20); - sub_through_write(1, 0x9C); - sub_through_write(1, 0x8A); - - sub_through_write(0, 0x002C); /* Display on */ - - /* 1 pixel / 2 post clock */ - mddi_queue_register_write(REG_CLKDIV2, 0x7b00, FALSE, 0); - - /* SUB LCD select */ - mddi_queue_register_write(REG_PSTCTL2, 0x0080, FALSE, 0); - - /* RS=1,command initiate number=0,select master mode */ - mddi_queue_register_write(REG_SUBCTL, 0x0242, FALSE, 0); - - /* Sub LCD Data transform start */ - mddi_queue_register_write(REG_PSTCTL1, 0x0003, FALSE, 0); - - } - - /* Set the MDP pixel data attributes for Sub Display */ - mddi_host_write_pix_attr_reg(0x00C0); -} - -void mddi_sharp_lcd_vsync_detected(boolean detected) -{ - /* static timetick_type start_time = 0; */ - static struct timeval start_time; - static boolean first_time = TRUE; - /* uint32 mdp_cnt_val = 0; */ - /* timetick_type elapsed_us; */ - struct timeval now; - uint32 elapsed_us; - uint32 num_vsyncs; - - if ((detected) || (mddi_sharp_vsync_attempts > 5)) { - if ((detected) && (mddi_sharp_monitor_refresh_value)) { - /* if (start_time != 0) */ - if (!first_time) { - jiffies_to_timeval(jiffies, &now); - elapsed_us = - (now.tv_sec - start_time.tv_sec) * 1000000 + - now.tv_usec - start_time.tv_usec; - /* - * LCD is configured for a refresh every usecs, - * so to determine the number of vsyncs that - * have occurred since the last measurement add - * half that to the time difference and divide - * by the refresh rate. - */ - num_vsyncs = (elapsed_us + - (mddi_sharp_usecs_per_refresh >> - 1)) / - mddi_sharp_usecs_per_refresh; - /* - * LCD is configured for * hsyncs (rows) per - * refresh cycle. Calculate new rows_per_second - * value based upon these new measurements. - * MDP can update with this new value. - */ - mddi_sharp_rows_per_second = - (mddi_sharp_rows_per_refresh * 1000 * - num_vsyncs) / (elapsed_us / 1000); - } - /* start_time = timetick_get(); */ - first_time = FALSE; - jiffies_to_timeval(jiffies, &start_time); - if (mddi_sharp_report_refresh_measurements) { - /* mdp_cnt_val = MDP_LINE_COUNT; */ - } - } - /* if detected = TRUE, client initiated wakeup was detected */ - if (mddi_sharp_vsync_handler != NULL) { - (*mddi_sharp_vsync_handler) - (mddi_sharp_vsync_handler_arg); - mddi_sharp_vsync_handler = NULL; - } - mddi_vsync_detect_enabled = FALSE; - mddi_sharp_vsync_attempts = 0; - /* need to clear this vsync wakeup */ - if (!mddi_queue_register_write_int(REG_INTR, 0x0000)) { - MDDI_MSG_ERR("Vsync interrupt clear failed!\n"); - } - if (!detected) { - /* give up after 5 failed attempts but show error */ - MDDI_MSG_NOTICE("Vsync detection failed!\n"); - } else if ((mddi_sharp_monitor_refresh_value) && - (mddi_sharp_report_refresh_measurements)) { - MDDI_MSG_NOTICE(" Lines Per Second=%d!\n", - mddi_sharp_rows_per_second); - } - } else - /* if detected = FALSE, we woke up from hibernation, but did not - * detect client initiated wakeup. - */ - mddi_sharp_vsync_attempts++; -} - -/* ISR to be executed */ -void mddi_sharp_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg) -{ - boolean error = FALSE; - unsigned long flags; - - /* Disable interrupts */ - spin_lock_irqsave(&mddi_host_spin_lock, flags); - /* INTLOCK(); */ - - if (mddi_sharp_vsync_handler != NULL) - error = TRUE; - - /* Register the handler for this particular GROUP interrupt source */ - mddi_sharp_vsync_handler = handler; - mddi_sharp_vsync_handler_arg = arg; - - /* Restore interrupts */ - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - /* INTFREE(); */ - - if (error) - MDDI_MSG_ERR("MDDI: Previous Vsync handler never called\n"); - - /* Enable the vsync wakeup */ - mddi_queue_register_write(REG_INTR, 0x8100, FALSE, 0); - - mddi_sharp_vsync_attempts = 1; - mddi_vsync_detect_enabled = TRUE; -} /* mddi_sharp_vsync_set_handler */ - -static int mddi_sharp_lcd_on(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (mfd->panel.id == SHARP_QVGA_PRIM) - mddi_sharp_prim_lcd_init(); - else - mddi_sharp_sub_lcd_init(); - - return 0; -} - -static int mddi_sharp_lcd_off(struct platform_device *pdev) -{ - mddi_sharp_lcd_powerdown(); - return 0; -} - -static int __init mddi_sharp_probe(struct platform_device *pdev) -{ - if (pdev->id == 0) { - mddi_sharp_pdata = pdev->dev.platform_data; - return 0; - } - - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = mddi_sharp_probe, - .driver = { - .name = "mddi_sharp_qvga", - }, -}; - -static struct msm_fb_panel_data mddi_sharp_panel_data0 = { - .on = mddi_sharp_lcd_on, - .off = mddi_sharp_lcd_off, - .set_backlight = mddi_sharp_lcd_set_backlight, - .set_vsync_notifier = mddi_sharp_vsync_set_handler, -}; - -static struct platform_device this_device_0 = { - .name = "mddi_sharp_qvga", - .id = SHARP_QVGA_PRIM, - .dev = { - .platform_data = &mddi_sharp_panel_data0, - } -}; - -static struct msm_fb_panel_data mddi_sharp_panel_data1 = { - .on = mddi_sharp_lcd_on, - .off = mddi_sharp_lcd_off, -}; - -static struct platform_device this_device_1 = { - .name = "mddi_sharp_qvga", - .id = SHARP_128X128_SECD, - .dev = { - .platform_data = &mddi_sharp_panel_data1, - } -}; - -static int __init mddi_sharp_init(void) -{ - int ret; - struct msm_panel_info *pinfo; - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - u32 id; - - ret = msm_fb_detect_client("mddi_sharp_qvga"); - if (ret == -ENODEV) - return 0; - - if (ret) { - id = mddi_get_client_id(); - - if (((id >> 16) != 0x0) || ((id & 0xffff) != 0x8835)) - return 0; - } -#endif - if (mddi_host_core_version > 8) { - /* can use faster refresh with newer hw revisions */ - mddi_sharp_debug_60hz_refresh = TRUE; - - /* Timing variables for tracking vsync */ - /* dot_clock = 6.00MHz - * horizontal count = 296 - * vertical count = 338 - * refresh rate = 6000000/(296+338) = 60Hz - */ - mddi_sharp_rows_per_second = 20270; /* 6000000/296 */ - mddi_sharp_rows_per_refresh = 338; - mddi_sharp_usecs_per_refresh = 16674; /* (296+338)/6000000 */ - } else { - /* Timing variables for tracking vsync */ - /* dot_clock = 5.20MHz - * horizontal count = 376 - * vertical count = 338 - * refresh rate = 5200000/(376+338) = 41Hz - */ - mddi_sharp_rows_per_second = 13830; /* 5200000/376 */ - mddi_sharp_rows_per_refresh = 338; - mddi_sharp_usecs_per_refresh = 24440; /* (376+338)/5200000 */ - } - - ret = platform_driver_register(&this_driver); - if (!ret) { - pinfo = &mddi_sharp_panel_data0.panel_info; - pinfo->xres = 240; - pinfo->yres = 320; - pinfo->type = MDDI_PANEL; - pinfo->pdest = DISPLAY_1; - pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; - pinfo->wait_cycle = 0; - pinfo->bpp = 18; - pinfo->fb_num = 2; - pinfo->clk_rate = 122880000; - pinfo->clk_min = 120000000; - pinfo->clk_max = 125000000; - pinfo->lcd.vsync_enable = TRUE; - pinfo->lcd.refx100 = - (mddi_sharp_rows_per_second * 100) / - mddi_sharp_rows_per_refresh; - pinfo->lcd.v_back_porch = 12; - pinfo->lcd.v_front_porch = 6; - pinfo->lcd.v_pulse_width = 0; - pinfo->lcd.hw_vsync_mode = FALSE; - pinfo->lcd.vsync_notifier_period = (1 * HZ); - pinfo->bl_max = 7; - pinfo->bl_min = 1; - - ret = platform_device_register(&this_device_0); - if (ret) - platform_driver_unregister(&this_driver); - - pinfo = &mddi_sharp_panel_data1.panel_info; - pinfo->xres = 128; - pinfo->yres = 128; - pinfo->type = MDDI_PANEL; - pinfo->pdest = DISPLAY_2; - pinfo->mddi.vdopkt = 0x400; - pinfo->wait_cycle = 0; - pinfo->bpp = 18; - pinfo->clk_rate = 122880000; - pinfo->clk_min = 120000000; - pinfo->clk_max = 125000000; - pinfo->fb_num = 2; - - ret = platform_device_register(&this_device_1); - if (ret) { - platform_device_unregister(&this_device_0); - platform_driver_unregister(&this_driver); - } - } - - if (!ret) - mddi_lcd.vsync_detected = mddi_sharp_lcd_vsync_detected; - - return ret; -} - -module_init(mddi_sharp_init); diff --git a/drivers/staging/msm/mddi_toshiba.c b/drivers/staging/msm/mddi_toshiba.c deleted file mode 100644 index e96342d..0000000 --- a/drivers/staging/msm/mddi_toshiba.c +++ /dev/null @@ -1,1741 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" -#include "mddi_toshiba.h" - -#define TM_GET_DID(id) ((id) & 0xff) -#define TM_GET_PID(id) (((id) & 0xff00)>>8) - -#define MDDI_CLIENT_CORE_BASE 0x108000 -#define LCD_CONTROL_BLOCK_BASE 0x110000 -#define SPI_BLOCK_BASE 0x120000 -#define PWM_BLOCK_BASE 0x140000 -#define SYSTEM_BLOCK1_BASE 0x160000 - -#define TTBUSSEL (MDDI_CLIENT_CORE_BASE|0x18) -#define DPSET0 (MDDI_CLIENT_CORE_BASE|0x1C) -#define DPSET1 (MDDI_CLIENT_CORE_BASE|0x20) -#define DPSUS (MDDI_CLIENT_CORE_BASE|0x24) -#define DPRUN (MDDI_CLIENT_CORE_BASE|0x28) -#define SYSCKENA (MDDI_CLIENT_CORE_BASE|0x2C) - -#define BITMAP0 (MDDI_CLIENT_CORE_BASE|0x44) -#define BITMAP1 (MDDI_CLIENT_CORE_BASE|0x48) -#define BITMAP2 (MDDI_CLIENT_CORE_BASE|0x4C) -#define BITMAP3 (MDDI_CLIENT_CORE_BASE|0x50) -#define BITMAP4 (MDDI_CLIENT_CORE_BASE|0x54) - -#define SRST (LCD_CONTROL_BLOCK_BASE|0x00) -#define PORT_ENB (LCD_CONTROL_BLOCK_BASE|0x04) -#define START (LCD_CONTROL_BLOCK_BASE|0x08) -#define PORT (LCD_CONTROL_BLOCK_BASE|0x0C) - -#define INTFLG (LCD_CONTROL_BLOCK_BASE|0x18) -#define INTMSK (LCD_CONTROL_BLOCK_BASE|0x1C) -#define MPLFBUF (LCD_CONTROL_BLOCK_BASE|0x20) - -#define PXL (LCD_CONTROL_BLOCK_BASE|0x30) -#define HCYCLE (LCD_CONTROL_BLOCK_BASE|0x34) -#define HSW (LCD_CONTROL_BLOCK_BASE|0x38) -#define HDE_START (LCD_CONTROL_BLOCK_BASE|0x3C) -#define HDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x40) -#define VCYCLE (LCD_CONTROL_BLOCK_BASE|0x44) -#define VSW (LCD_CONTROL_BLOCK_BASE|0x48) -#define VDE_START (LCD_CONTROL_BLOCK_BASE|0x4C) -#define VDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x50) -#define WAKEUP (LCD_CONTROL_BLOCK_BASE|0x54) -#define REGENB (LCD_CONTROL_BLOCK_BASE|0x5C) -#define VSYNIF (LCD_CONTROL_BLOCK_BASE|0x60) -#define WRSTB (LCD_CONTROL_BLOCK_BASE|0x64) -#define RDSTB (LCD_CONTROL_BLOCK_BASE|0x68) -#define ASY_DATA (LCD_CONTROL_BLOCK_BASE|0x6C) -#define ASY_DATB (LCD_CONTROL_BLOCK_BASE|0x70) -#define ASY_DATC (LCD_CONTROL_BLOCK_BASE|0x74) -#define ASY_DATD (LCD_CONTROL_BLOCK_BASE|0x78) -#define ASY_DATE (LCD_CONTROL_BLOCK_BASE|0x7C) -#define ASY_DATF (LCD_CONTROL_BLOCK_BASE|0x80) -#define ASY_DATG (LCD_CONTROL_BLOCK_BASE|0x84) -#define ASY_DATH (LCD_CONTROL_BLOCK_BASE|0x88) -#define ASY_CMDSET (LCD_CONTROL_BLOCK_BASE|0x8C) -#define MONI (LCD_CONTROL_BLOCK_BASE|0xB0) -#define VPOS (LCD_CONTROL_BLOCK_BASE|0xC0) - -#define SSICTL (SPI_BLOCK_BASE|0x00) -#define SSITIME (SPI_BLOCK_BASE|0x04) -#define SSITX (SPI_BLOCK_BASE|0x08) -#define SSIINTS (SPI_BLOCK_BASE|0x14) - -#define TIMER0LOAD (PWM_BLOCK_BASE|0x00) -#define TIMER0CTRL (PWM_BLOCK_BASE|0x08) -#define PWM0OFF (PWM_BLOCK_BASE|0x1C) -#define TIMER1LOAD (PWM_BLOCK_BASE|0x20) -#define TIMER1CTRL (PWM_BLOCK_BASE|0x28) -#define PWM1OFF (PWM_BLOCK_BASE|0x3C) -#define TIMER2LOAD (PWM_BLOCK_BASE|0x40) -#define TIMER2CTRL (PWM_BLOCK_BASE|0x48) -#define PWM2OFF (PWM_BLOCK_BASE|0x5C) -#define PWMCR (PWM_BLOCK_BASE|0x68) - -#define GPIOIS (GPIO_BLOCK_BASE|0x08) -#define GPIOIEV (GPIO_BLOCK_BASE|0x10) -#define GPIOIC (GPIO_BLOCK_BASE|0x20) - -#define WKREQ (SYSTEM_BLOCK1_BASE|0x00) -#define CLKENB (SYSTEM_BLOCK1_BASE|0x04) -#define DRAMPWR (SYSTEM_BLOCK1_BASE|0x08) -#define INTMASK (SYSTEM_BLOCK1_BASE|0x0C) -#define CNT_DIS (SYSTEM_BLOCK1_BASE|0x10) - -typedef enum { - TOSHIBA_STATE_OFF, - TOSHIBA_STATE_PRIM_SEC_STANDBY, - TOSHIBA_STATE_PRIM_SEC_READY, - TOSHIBA_STATE_PRIM_NORMAL_MODE, - TOSHIBA_STATE_SEC_NORMAL_MODE -} mddi_toshiba_state_t; - -static uint32 mddi_toshiba_curr_vpos; -static boolean mddi_toshiba_monitor_refresh_value = FALSE; -static boolean mddi_toshiba_report_refresh_measurements = FALSE; - -boolean mddi_toshiba_61Hz_refresh = TRUE; - -/* Modifications to timing to increase refresh rate to > 60Hz. - * 20MHz dot clock. - * 646 total rows. - * 506 total columns. - * refresh rate = 61.19Hz - */ -static uint32 mddi_toshiba_rows_per_second = 39526; -static uint32 mddi_toshiba_usecs_per_refresh = 16344; -static uint32 mddi_toshiba_rows_per_refresh = 646; -extern boolean mddi_vsync_detect_enabled; - -static msm_fb_vsync_handler_type mddi_toshiba_vsync_handler; -static void *mddi_toshiba_vsync_handler_arg; -static uint16 mddi_toshiba_vsync_attempts; - -static mddi_toshiba_state_t toshiba_state = TOSHIBA_STATE_OFF; - -static struct msm_panel_common_pdata *mddi_toshiba_pdata; - -static int mddi_toshiba_lcd_on(struct platform_device *pdev); -static int mddi_toshiba_lcd_off(struct platform_device *pdev); - -static void mddi_toshiba_state_transition(mddi_toshiba_state_t a, - mddi_toshiba_state_t b) -{ - if (toshiba_state != a) { - MDDI_MSG_ERR("toshiba state trans. (%d->%d) found %d\n", a, b, - toshiba_state); - } - toshiba_state = b; -} - -#define GORDON_REG_IMGCTL1 0x10 /* Image interface control 1 */ -#define GORDON_REG_IMGCTL2 0x11 /* Image interface control 2 */ -#define GORDON_REG_IMGSET1 0x12 /* Image interface settings 1 */ -#define GORDON_REG_IMGSET2 0x13 /* Image interface settings 2 */ -#define GORDON_REG_IVBP1 0x14 /* DM0: Vert back porch */ -#define GORDON_REG_IHBP1 0x15 /* DM0: Horiz back porch */ -#define GORDON_REG_IVNUM1 0x16 /* DM0: Num of vert lines */ -#define GORDON_REG_IHNUM1 0x17 /* DM0: Num of pixels per line */ -#define GORDON_REG_IVBP2 0x18 /* DM1: Vert back porch */ -#define GORDON_REG_IHBP2 0x19 /* DM1: Horiz back porch */ -#define GORDON_REG_IVNUM2 0x1A /* DM1: Num of vert lines */ -#define GORDON_REG_IHNUM2 0x1B /* DM1: Num of pixels per line */ -#define GORDON_REG_LCDIFCTL1 0x30 /* LCD interface control 1 */ -#define GORDON_REG_VALTRAN 0x31 /* LCD IF ctl: VALTRAN sync flag */ -#define GORDON_REG_AVCTL 0x33 -#define GORDON_REG_LCDIFCTL2 0x34 /* LCD interface control 2 */ -#define GORDON_REG_LCDIFCTL3 0x35 /* LCD interface control 3 */ -#define GORDON_REG_LCDIFSET1 0x36 /* LCD interface settings 1 */ -#define GORDON_REG_PCCTL 0x3C -#define GORDON_REG_TPARAM1 0x40 -#define GORDON_REG_TLCDIF1 0x41 -#define GORDON_REG_TSSPB_ST1 0x42 -#define GORDON_REG_TSSPB_ED1 0x43 -#define GORDON_REG_TSCK_ST1 0x44 -#define GORDON_REG_TSCK_WD1 0x45 -#define GORDON_REG_TGSPB_VST1 0x46 -#define GORDON_REG_TGSPB_VED1 0x47 -#define GORDON_REG_TGSPB_CH1 0x48 -#define GORDON_REG_TGCK_ST1 0x49 -#define GORDON_REG_TGCK_ED1 0x4A -#define GORDON_REG_TPCTL_ST1 0x4B -#define GORDON_REG_TPCTL_ED1 0x4C -#define GORDON_REG_TPCHG_ED1 0x4D -#define GORDON_REG_TCOM_CH1 0x4E -#define GORDON_REG_THBP1 0x4F -#define GORDON_REG_TPHCTL1 0x50 -#define GORDON_REG_EVPH1 0x51 -#define GORDON_REG_EVPL1 0x52 -#define GORDON_REG_EVNH1 0x53 -#define GORDON_REG_EVNL1 0x54 -#define GORDON_REG_TBIAS1 0x55 -#define GORDON_REG_TPARAM2 0x56 -#define GORDON_REG_TLCDIF2 0x57 -#define GORDON_REG_TSSPB_ST2 0x58 -#define GORDON_REG_TSSPB_ED2 0x59 -#define GORDON_REG_TSCK_ST2 0x5A -#define GORDON_REG_TSCK_WD2 0x5B -#define GORDON_REG_TGSPB_VST2 0x5C -#define GORDON_REG_TGSPB_VED2 0x5D -#define GORDON_REG_TGSPB_CH2 0x5E -#define GORDON_REG_TGCK_ST2 0x5F -#define GORDON_REG_TGCK_ED2 0x60 -#define GORDON_REG_TPCTL_ST2 0x61 -#define GORDON_REG_TPCTL_ED2 0x62 -#define GORDON_REG_TPCHG_ED2 0x63 -#define GORDON_REG_TCOM_CH2 0x64 -#define GORDON_REG_THBP2 0x65 -#define GORDON_REG_TPHCTL2 0x66 -#define GORDON_REG_EVPH2 0x67 -#define GORDON_REG_EVPL2 0x68 -#define GORDON_REG_EVNH2 0x69 -#define GORDON_REG_EVNL2 0x6A -#define GORDON_REG_TBIAS2 0x6B -#define GORDON_REG_POWCTL 0x80 -#define GORDON_REG_POWOSC1 0x81 -#define GORDON_REG_POWOSC2 0x82 -#define GORDON_REG_POWSET 0x83 -#define GORDON_REG_POWTRM1 0x85 -#define GORDON_REG_POWTRM2 0x86 -#define GORDON_REG_POWTRM3 0x87 -#define GORDON_REG_POWTRMSEL 0x88 -#define GORDON_REG_POWHIZ 0x89 - -void serigo(uint16 reg, uint8 data) -{ - uint32 mddi_val = 0; - mddi_queue_register_read(SSIINTS, &mddi_val, TRUE, 0); - if (mddi_val & (1 << 8)) - mddi_wait(1); - /* No De-assert of CS and send 2 bytes */ - mddi_val = 0x90000 | ((0x00FF & reg) << 8) | data; - mddi_queue_register_write(SSITX, mddi_val, TRUE, 0); -} - -void gordon_init(void) -{ - /* Image interface settings ***/ - serigo(GORDON_REG_IMGCTL2, 0x00); - serigo(GORDON_REG_IMGSET1, 0x01); - - /* Exchange the RGB signal for J510(Softbank mobile) */ - serigo(GORDON_REG_IMGSET2, 0x12); - serigo(GORDON_REG_LCDIFSET1, 0x00); - mddi_wait(2); - - /* Pre-charge settings */ - serigo(GORDON_REG_PCCTL, 0x09); - serigo(GORDON_REG_LCDIFCTL2, 0x1B); - mddi_wait(1); -} - -void gordon_disp_on(void) -{ - /*gordon_dispmode setting */ - /*VGA settings */ - serigo(GORDON_REG_TPARAM1, 0x30); - serigo(GORDON_REG_TLCDIF1, 0x00); - serigo(GORDON_REG_TSSPB_ST1, 0x8B); - serigo(GORDON_REG_TSSPB_ED1, 0x93); - mddi_wait(2); - serigo(GORDON_REG_TSCK_ST1, 0x88); - serigo(GORDON_REG_TSCK_WD1, 0x00); - serigo(GORDON_REG_TGSPB_VST1, 0x01); - serigo(GORDON_REG_TGSPB_VED1, 0x02); - mddi_wait(2); - serigo(GORDON_REG_TGSPB_CH1, 0x5E); - serigo(GORDON_REG_TGCK_ST1, 0x80); - serigo(GORDON_REG_TGCK_ED1, 0x3C); - serigo(GORDON_REG_TPCTL_ST1, 0x50); - mddi_wait(2); - serigo(GORDON_REG_TPCTL_ED1, 0x74); - serigo(GORDON_REG_TPCHG_ED1, 0x78); - serigo(GORDON_REG_TCOM_CH1, 0x50); - serigo(GORDON_REG_THBP1, 0x84); - mddi_wait(2); - serigo(GORDON_REG_TPHCTL1, 0x00); - serigo(GORDON_REG_EVPH1, 0x70); - serigo(GORDON_REG_EVPL1, 0x64); - serigo(GORDON_REG_EVNH1, 0x56); - mddi_wait(2); - serigo(GORDON_REG_EVNL1, 0x48); - serigo(GORDON_REG_TBIAS1, 0x88); - mddi_wait(2); - serigo(GORDON_REG_TPARAM2, 0x28); - serigo(GORDON_REG_TLCDIF2, 0x14); - serigo(GORDON_REG_TSSPB_ST2, 0x49); - serigo(GORDON_REG_TSSPB_ED2, 0x4B); - mddi_wait(2); - serigo(GORDON_REG_TSCK_ST2, 0x4A); - serigo(GORDON_REG_TSCK_WD2, 0x02); - serigo(GORDON_REG_TGSPB_VST2, 0x02); - serigo(GORDON_REG_TGSPB_VED2, 0x03); - mddi_wait(2); - serigo(GORDON_REG_TGSPB_CH2, 0x2F); - serigo(GORDON_REG_TGCK_ST2, 0x40); - serigo(GORDON_REG_TGCK_ED2, 0x1E); - serigo(GORDON_REG_TPCTL_ST2, 0x2C); - mddi_wait(2); - serigo(GORDON_REG_TPCTL_ED2, 0x3A); - serigo(GORDON_REG_TPCHG_ED2, 0x3C); - serigo(GORDON_REG_TCOM_CH2, 0x28); - serigo(GORDON_REG_THBP2, 0x4D); - mddi_wait(2); - serigo(GORDON_REG_TPHCTL2, 0x1A); - mddi_wait(2); - serigo(GORDON_REG_IVBP1, 0x02); - serigo(GORDON_REG_IHBP1, 0x90); - serigo(GORDON_REG_IVNUM1, 0xA0); - serigo(GORDON_REG_IHNUM1, 0x78); - mddi_wait(2); - serigo(GORDON_REG_IVBP2, 0x02); - serigo(GORDON_REG_IHBP2, 0x48); - serigo(GORDON_REG_IVNUM2, 0x50); - serigo(GORDON_REG_IHNUM2, 0x3C); - mddi_wait(2); - serigo(GORDON_REG_POWCTL, 0x03); - mddi_wait(15); - serigo(GORDON_REG_POWCTL, 0x07); - mddi_wait(15); - serigo(GORDON_REG_POWCTL, 0x0F); - mddi_wait(15); - serigo(GORDON_REG_AVCTL, 0x03); - mddi_wait(15); - serigo(GORDON_REG_POWCTL, 0x1F); - mddi_wait(15); - serigo(GORDON_REG_POWCTL, 0x5F); - mddi_wait(15); - serigo(GORDON_REG_POWCTL, 0x7F); - mddi_wait(15); - serigo(GORDON_REG_LCDIFCTL1, 0x02); - mddi_wait(15); - serigo(GORDON_REG_IMGCTL1, 0x00); - mddi_wait(15); - serigo(GORDON_REG_LCDIFCTL3, 0x00); - mddi_wait(15); - serigo(GORDON_REG_VALTRAN, 0x01); - mddi_wait(15); - serigo(GORDON_REG_LCDIFCTL1, 0x03); - serigo(GORDON_REG_LCDIFCTL1, 0x03); - mddi_wait(1); -} - -void gordon_disp_off(void) -{ - serigo(GORDON_REG_LCDIFCTL2, 0x7B); - serigo(GORDON_REG_VALTRAN, 0x01); - serigo(GORDON_REG_LCDIFCTL1, 0x02); - serigo(GORDON_REG_LCDIFCTL3, 0x01); - mddi_wait(20); - serigo(GORDON_REG_VALTRAN, 0x01); - serigo(GORDON_REG_IMGCTL1, 0x01); - serigo(GORDON_REG_LCDIFCTL1, 0x00); - mddi_wait(20); - serigo(GORDON_REG_POWCTL, 0x1F); - mddi_wait(40); - serigo(GORDON_REG_POWCTL, 0x07); - mddi_wait(40); - serigo(GORDON_REG_POWCTL, 0x03); - mddi_wait(40); - serigo(GORDON_REG_POWCTL, 0x00); - mddi_wait(40); -} - -void gordon_disp_init(void) -{ - gordon_init(); - mddi_wait(20); - gordon_disp_on(); -} - -static void toshiba_common_initial_setup(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) { - write_client_reg(DPSET0 , 0x4bec0066, TRUE); - write_client_reg(DPSET1 , 0x00000113, TRUE); - write_client_reg(DPSUS , 0x00000000, TRUE); - write_client_reg(DPRUN , 0x00000001, TRUE); - mddi_wait(5); - write_client_reg(SYSCKENA , 0x00000001, TRUE); - write_client_reg(CLKENB , 0x0000a0e9, TRUE); - - write_client_reg(GPIODATA , 0x03FF0000, TRUE); - write_client_reg(GPIODIR , 0x0000024D, TRUE); - write_client_reg(GPIOSEL , 0x00000173, TRUE); - write_client_reg(GPIOPC , 0x03C300C0, TRUE); - write_client_reg(WKREQ , 0x00000000, TRUE); - write_client_reg(GPIOIS , 0x00000000, TRUE); - write_client_reg(GPIOIEV , 0x00000001, TRUE); - write_client_reg(GPIOIC , 0x000003FF, TRUE); - write_client_reg(GPIODATA , 0x00040004, TRUE); - - write_client_reg(GPIODATA , 0x00080008, TRUE); - write_client_reg(DRAMPWR , 0x00000001, TRUE); - write_client_reg(CLKENB , 0x0000a0eb, TRUE); - write_client_reg(PWMCR , 0x00000000, TRUE); - mddi_wait(1); - - write_client_reg(SSICTL , 0x00060399, TRUE); - write_client_reg(SSITIME , 0x00000100, TRUE); - write_client_reg(CNT_DIS , 0x00000002, TRUE); - write_client_reg(SSICTL , 0x0006039b, TRUE); - - write_client_reg(SSITX , 0x00000000, TRUE); - mddi_wait(7); - write_client_reg(SSITX , 0x00000000, TRUE); - mddi_wait(7); - write_client_reg(SSITX , 0x00000000, TRUE); - mddi_wait(7); - - write_client_reg(SSITX , 0x000800BA, TRUE); - write_client_reg(SSITX , 0x00000111, TRUE); - write_client_reg(SSITX , 0x00080036, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x0008003A, TRUE); - write_client_reg(SSITX , 0x00000160, TRUE); - write_client_reg(SSITX , 0x000800B1, TRUE); - write_client_reg(SSITX , 0x0000015D, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B2, TRUE); - write_client_reg(SSITX , 0x00000133, TRUE); - write_client_reg(SSITX , 0x000800B3, TRUE); - write_client_reg(SSITX , 0x00000122, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B4, TRUE); - write_client_reg(SSITX , 0x00000102, TRUE); - write_client_reg(SSITX , 0x000800B5, TRUE); - write_client_reg(SSITX , 0x0000011E, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B6, TRUE); - write_client_reg(SSITX , 0x00000127, TRUE); - write_client_reg(SSITX , 0x000800B7, TRUE); - write_client_reg(SSITX , 0x00000103, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B9, TRUE); - write_client_reg(SSITX , 0x00000124, TRUE); - write_client_reg(SSITX , 0x000800BD, TRUE); - write_client_reg(SSITX , 0x000001A1, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800BB, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - write_client_reg(SSITX , 0x000800BF, TRUE); - write_client_reg(SSITX , 0x00000101, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800BE, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - write_client_reg(SSITX , 0x000800C0, TRUE); - write_client_reg(SSITX , 0x00000111, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C1, TRUE); - write_client_reg(SSITX , 0x00000111, TRUE); - write_client_reg(SSITX , 0x000800C2, TRUE); - write_client_reg(SSITX , 0x00000111, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C3, TRUE); - write_client_reg(SSITX , 0x00080132, TRUE); - write_client_reg(SSITX , 0x00000132, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C4, TRUE); - write_client_reg(SSITX , 0x00080132, TRUE); - write_client_reg(SSITX , 0x00000132, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C5, TRUE); - write_client_reg(SSITX , 0x00080132, TRUE); - write_client_reg(SSITX , 0x00000132, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C6, TRUE); - write_client_reg(SSITX , 0x00080132, TRUE); - write_client_reg(SSITX , 0x00000132, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C7, TRUE); - write_client_reg(SSITX , 0x00080164, TRUE); - write_client_reg(SSITX , 0x00000145, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800C8, TRUE); - write_client_reg(SSITX , 0x00000144, TRUE); - write_client_reg(SSITX , 0x000800C9, TRUE); - write_client_reg(SSITX , 0x00000152, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800CA, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800EC, TRUE); - write_client_reg(SSITX , 0x00080101, TRUE); - write_client_reg(SSITX , 0x000001FC, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800CF, TRUE); - write_client_reg(SSITX , 0x00000101, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D0, TRUE); - write_client_reg(SSITX , 0x00080110, TRUE); - write_client_reg(SSITX , 0x00000104, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D1, TRUE); - write_client_reg(SSITX , 0x00000101, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D2, TRUE); - write_client_reg(SSITX , 0x00080100, TRUE); - write_client_reg(SSITX , 0x00000128, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D3, TRUE); - write_client_reg(SSITX , 0x00080100, TRUE); - write_client_reg(SSITX , 0x00000128, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D4, TRUE); - write_client_reg(SSITX , 0x00080126, TRUE); - write_client_reg(SSITX , 0x000001A4, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800D5, TRUE); - write_client_reg(SSITX , 0x00000120, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800EF, TRUE); - write_client_reg(SSITX , 0x00080132, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - mddi_wait(1); - - write_client_reg(BITMAP0 , 0x032001E0, TRUE); - write_client_reg(BITMAP1 , 0x032001E0, TRUE); - write_client_reg(BITMAP2 , 0x014000F0, TRUE); - write_client_reg(BITMAP3 , 0x014000F0, TRUE); - write_client_reg(BITMAP4 , 0x014000F0, TRUE); - write_client_reg(CLKENB , 0x0000A1EB, TRUE); - write_client_reg(PORT_ENB , 0x00000001, TRUE); - write_client_reg(PORT , 0x00000004, TRUE); - write_client_reg(PXL , 0x00000002, TRUE); - write_client_reg(MPLFBUF , 0x00000000, TRUE); - write_client_reg(HCYCLE , 0x000000FD, TRUE); - write_client_reg(HSW , 0x00000003, TRUE); - write_client_reg(HDE_START , 0x00000007, TRUE); - write_client_reg(HDE_SIZE , 0x000000EF, TRUE); - write_client_reg(VCYCLE , 0x00000325, TRUE); - write_client_reg(VSW , 0x00000001, TRUE); - write_client_reg(VDE_START , 0x00000003, TRUE); - write_client_reg(VDE_SIZE , 0x0000031F, TRUE); - write_client_reg(START , 0x00000001, TRUE); - mddi_wait(32); - write_client_reg(SSITX , 0x000800BC, TRUE); - write_client_reg(SSITX , 0x00000180, TRUE); - write_client_reg(SSITX , 0x0008003B, TRUE); - write_client_reg(SSITX , 0x00000100, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B0, TRUE); - write_client_reg(SSITX , 0x00000116, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x000800B8, TRUE); - write_client_reg(SSITX , 0x000801FF, TRUE); - write_client_reg(SSITX , 0x000001F5, TRUE); - mddi_wait(1); - write_client_reg(SSITX , 0x00000011, TRUE); - mddi_wait(5); - write_client_reg(SSITX , 0x00000029, TRUE); - return; - } - - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) { - write_client_reg(DPSET0, 0x4BEC0066, TRUE); - write_client_reg(DPSET1, 0x00000113, TRUE); - write_client_reg(DPSUS, 0x00000000, TRUE); - write_client_reg(DPRUN, 0x00000001, TRUE); - mddi_wait(14); - write_client_reg(SYSCKENA, 0x00000001, TRUE); - write_client_reg(CLKENB, 0x000000EF, TRUE); - write_client_reg(GPIO_BLOCK_BASE, 0x03FF0000, TRUE); - write_client_reg(GPIODIR, 0x0000024D, TRUE); - write_client_reg(SYSTEM_BLOCK2_BASE, 0x00000173, TRUE); - write_client_reg(GPIOPC, 0x03C300C0, TRUE); - write_client_reg(SYSTEM_BLOCK1_BASE, 0x00000000, TRUE); - write_client_reg(GPIOIS, 0x00000000, TRUE); - write_client_reg(GPIOIEV, 0x00000001, TRUE); - write_client_reg(GPIOIC, 0x000003FF, TRUE); - write_client_reg(GPIO_BLOCK_BASE, 0x00060006, TRUE); - write_client_reg(GPIO_BLOCK_BASE, 0x00080008, TRUE); - write_client_reg(GPIO_BLOCK_BASE, 0x02000200, TRUE); - write_client_reg(DRAMPWR, 0x00000001, TRUE); - write_client_reg(TIMER0CTRL, 0x00000060, TRUE); - write_client_reg(PWM_BLOCK_BASE, 0x00001388, TRUE); - write_client_reg(PWM0OFF, 0x00001387, TRUE); - write_client_reg(TIMER1CTRL, 0x00000060, TRUE); - write_client_reg(TIMER1LOAD, 0x00001388, TRUE); - write_client_reg(PWM1OFF, 0x00001387, TRUE); - write_client_reg(TIMER0CTRL, 0x000000E0, TRUE); - write_client_reg(TIMER1CTRL, 0x000000E0, TRUE); - write_client_reg(PWMCR, 0x00000003, TRUE); - mddi_wait(1); - write_client_reg(SPI_BLOCK_BASE, 0x00063111, TRUE); - write_client_reg(SSITIME, 0x00000100, TRUE); - write_client_reg(SPI_BLOCK_BASE, 0x00063113, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(CLKENB, 0x0000A1EF, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(WRSTB, 0x0000003F, TRUE); - write_client_reg(RDSTB, 0x00000432, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000000, TRUE); - write_client_reg(ASY_DATB, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(10); - write_client_reg(ASY_DATA, 0x80000000, TRUE); - write_client_reg(ASY_DATB, 0x80000000, TRUE); - write_client_reg(ASY_DATC, 0x80000000, TRUE); - write_client_reg(ASY_DATD, 0x80000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000009, TRUE); - write_client_reg(ASY_CMDSET, 0x00000008, TRUE); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(20); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - - write_client_reg(VSYNIF, 0x00000001, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - } else { - write_client_reg(DPSET0, 0x4BEC0066, TRUE); - write_client_reg(DPSET1, 0x00000113, TRUE); - write_client_reg(DPSUS, 0x00000000, TRUE); - write_client_reg(DPRUN, 0x00000001, TRUE); - mddi_wait(14); - write_client_reg(SYSCKENA, 0x00000001, TRUE); - write_client_reg(CLKENB, 0x000000EF, TRUE); - write_client_reg(GPIODATA, 0x03FF0000, TRUE); - write_client_reg(GPIODIR, 0x0000024D, TRUE); - write_client_reg(GPIOSEL, 0x00000173, TRUE); - write_client_reg(GPIOPC, 0x03C300C0, TRUE); - write_client_reg(WKREQ, 0x00000000, TRUE); - write_client_reg(GPIOIS, 0x00000000, TRUE); - write_client_reg(GPIOIEV, 0x00000001, TRUE); - write_client_reg(GPIOIC, 0x000003FF, TRUE); - write_client_reg(GPIODATA, 0x00060006, TRUE); - write_client_reg(GPIODATA, 0x00080008, TRUE); - write_client_reg(GPIODATA, 0x02000200, TRUE); - - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA) { - mddi_wait(400); - write_client_reg(DRAMPWR, 0x00000001, TRUE); - - write_client_reg(CNT_DIS, 0x00000002, TRUE); - write_client_reg(BITMAP0, 0x01E00320, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - write_client_reg(PORT, 0x00000004, TRUE); - write_client_reg(PXL, 0x0000003A, TRUE); - write_client_reg(MPLFBUF, 0x00000000, TRUE); - write_client_reg(HCYCLE, 0x00000253, TRUE); - write_client_reg(HSW, 0x00000003, TRUE); - write_client_reg(HDE_START, 0x00000017, TRUE); - write_client_reg(HDE_SIZE, 0x0000018F, TRUE); - write_client_reg(VCYCLE, 0x000001FF, TRUE); - write_client_reg(VSW, 0x00000001, TRUE); - write_client_reg(VDE_START, 0x00000003, TRUE); - write_client_reg(VDE_SIZE, 0x000001DF, TRUE); - write_client_reg(START, 0x00000001, TRUE); - mddi_wait(1); - write_client_reg(TIMER0CTRL, 0x00000060, TRUE); - write_client_reg(TIMER0LOAD, 0x00001388, TRUE); - write_client_reg(TIMER1CTRL, 0x00000060, TRUE); - write_client_reg(TIMER1LOAD, 0x00001388, TRUE); - write_client_reg(PWM1OFF, 0x00000087, TRUE); - } else { - write_client_reg(DRAMPWR, 0x00000001, TRUE); - write_client_reg(TIMER0CTRL, 0x00000060, TRUE); - write_client_reg(TIMER0LOAD, 0x00001388, TRUE); - write_client_reg(TIMER1CTRL, 0x00000060, TRUE); - write_client_reg(TIMER1LOAD, 0x00001388, TRUE); - write_client_reg(PWM1OFF, 0x00001387, TRUE); - } - - write_client_reg(TIMER0CTRL, 0x000000E0, TRUE); - write_client_reg(TIMER1CTRL, 0x000000E0, TRUE); - write_client_reg(PWMCR, 0x00000003, TRUE); - mddi_wait(1); - write_client_reg(SSICTL, 0x00000799, TRUE); - write_client_reg(SSITIME, 0x00000100, TRUE); - write_client_reg(SSICTL, 0x0000079b, TRUE); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000000, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x000800BA, TRUE); - write_client_reg(SSITX, 0x00000111, TRUE); - write_client_reg(SSITX, 0x00080036, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800BB, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - write_client_reg(SSITX, 0x0008003A, TRUE); - write_client_reg(SSITX, 0x00000160, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800BF, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - write_client_reg(SSITX, 0x000800B1, TRUE); - write_client_reg(SSITX, 0x0000015D, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800B2, TRUE); - write_client_reg(SSITX, 0x00000133, TRUE); - write_client_reg(SSITX, 0x000800B3, TRUE); - write_client_reg(SSITX, 0x00000122, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800B4, TRUE); - write_client_reg(SSITX, 0x00000102, TRUE); - write_client_reg(SSITX, 0x000800B5, TRUE); - write_client_reg(SSITX, 0x0000011F, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800B6, TRUE); - write_client_reg(SSITX, 0x00000128, TRUE); - write_client_reg(SSITX, 0x000800B7, TRUE); - write_client_reg(SSITX, 0x00000103, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800B9, TRUE); - write_client_reg(SSITX, 0x00000120, TRUE); - write_client_reg(SSITX, 0x000800BD, TRUE); - write_client_reg(SSITX, 0x00000102, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800BE, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - write_client_reg(SSITX, 0x000800C0, TRUE); - write_client_reg(SSITX, 0x00000111, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C1, TRUE); - write_client_reg(SSITX, 0x00000111, TRUE); - write_client_reg(SSITX, 0x000800C2, TRUE); - write_client_reg(SSITX, 0x00000111, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C3, TRUE); - write_client_reg(SSITX, 0x0008010A, TRUE); - write_client_reg(SSITX, 0x0000010A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C4, TRUE); - write_client_reg(SSITX, 0x00080160, TRUE); - write_client_reg(SSITX, 0x00000160, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C5, TRUE); - write_client_reg(SSITX, 0x00080160, TRUE); - write_client_reg(SSITX, 0x00000160, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C6, TRUE); - write_client_reg(SSITX, 0x00080160, TRUE); - write_client_reg(SSITX, 0x00000160, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C7, TRUE); - write_client_reg(SSITX, 0x00080133, TRUE); - write_client_reg(SSITX, 0x00000143, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800C8, TRUE); - write_client_reg(SSITX, 0x00000144, TRUE); - write_client_reg(SSITX, 0x000800C9, TRUE); - write_client_reg(SSITX, 0x00000133, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800CA, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800EC, TRUE); - write_client_reg(SSITX, 0x00080102, TRUE); - write_client_reg(SSITX, 0x00000118, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800CF, TRUE); - write_client_reg(SSITX, 0x00000101, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D0, TRUE); - write_client_reg(SSITX, 0x00080110, TRUE); - write_client_reg(SSITX, 0x00000104, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D1, TRUE); - write_client_reg(SSITX, 0x00000101, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D2, TRUE); - write_client_reg(SSITX, 0x00080100, TRUE); - write_client_reg(SSITX, 0x0000013A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D3, TRUE); - write_client_reg(SSITX, 0x00080100, TRUE); - write_client_reg(SSITX, 0x0000013A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D4, TRUE); - write_client_reg(SSITX, 0x00080124, TRUE); - write_client_reg(SSITX, 0x0000016E, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x000800D5, TRUE); - write_client_reg(SSITX, 0x00000124, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800ED, TRUE); - write_client_reg(SSITX, 0x00080101, TRUE); - write_client_reg(SSITX, 0x0000010A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D6, TRUE); - write_client_reg(SSITX, 0x00000101, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D7, TRUE); - write_client_reg(SSITX, 0x00080110, TRUE); - write_client_reg(SSITX, 0x0000010A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D8, TRUE); - write_client_reg(SSITX, 0x00000101, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800D9, TRUE); - write_client_reg(SSITX, 0x00080100, TRUE); - write_client_reg(SSITX, 0x00000114, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800DE, TRUE); - write_client_reg(SSITX, 0x00080100, TRUE); - write_client_reg(SSITX, 0x00000114, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800DF, TRUE); - write_client_reg(SSITX, 0x00080112, TRUE); - write_client_reg(SSITX, 0x0000013F, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E0, TRUE); - write_client_reg(SSITX, 0x0000010B, TRUE); - write_client_reg(SSITX, 0x000800E2, TRUE); - write_client_reg(SSITX, 0x00000101, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E3, TRUE); - write_client_reg(SSITX, 0x00000136, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E4, TRUE); - write_client_reg(SSITX, 0x00080100, TRUE); - write_client_reg(SSITX, 0x00000103, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E5, TRUE); - write_client_reg(SSITX, 0x00080102, TRUE); - write_client_reg(SSITX, 0x00000104, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E6, TRUE); - write_client_reg(SSITX, 0x00000103, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E7, TRUE); - write_client_reg(SSITX, 0x00080104, TRUE); - write_client_reg(SSITX, 0x0000010A, TRUE); - mddi_wait(2); - write_client_reg(SSITX, 0x000800E8, TRUE); - write_client_reg(SSITX, 0x00000104, TRUE); - write_client_reg(CLKENB, 0x000001EF, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(WRSTB, 0x0000003F, TRUE); - write_client_reg(RDSTB, 0x00000432, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000000, TRUE); - write_client_reg(ASY_DATB, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(10); - write_client_reg(ASY_DATA, 0x80000000, TRUE); - write_client_reg(ASY_DATB, 0x80000000, TRUE); - write_client_reg(ASY_DATC, 0x80000000, TRUE); - write_client_reg(ASY_DATD, 0x80000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000009, TRUE); - write_client_reg(ASY_CMDSET, 0x00000008, TRUE); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(20); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - write_client_reg(VSYNIF, 0x00000001, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - } - - mddi_toshiba_state_transition(TOSHIBA_STATE_PRIM_SEC_STANDBY, - TOSHIBA_STATE_PRIM_SEC_READY); -} - -static void toshiba_prim_start(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) { - write_client_reg(BITMAP1, 0x01E000F0, TRUE); - write_client_reg(BITMAP2, 0x01E000F0, TRUE); - write_client_reg(BITMAP3, 0x01E000F0, TRUE); - write_client_reg(BITMAP4, 0x00DC00B0, TRUE); - write_client_reg(CLKENB, 0x000001EF, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - write_client_reg(PORT, 0x00000016, TRUE); - write_client_reg(PXL, 0x00000002, TRUE); - write_client_reg(MPLFBUF, 0x00000000, TRUE); - write_client_reg(HCYCLE, 0x00000185, TRUE); - write_client_reg(HSW, 0x00000018, TRUE); - write_client_reg(HDE_START, 0x0000004A, TRUE); - write_client_reg(HDE_SIZE, 0x000000EF, TRUE); - write_client_reg(VCYCLE, 0x0000028E, TRUE); - write_client_reg(VSW, 0x00000004, TRUE); - write_client_reg(VDE_START, 0x00000009, TRUE); - write_client_reg(VDE_SIZE, 0x0000027F, TRUE); - write_client_reg(START, 0x00000001, TRUE); - write_client_reg(SYSTEM_BLOCK1_BASE, 0x00000002, TRUE); - } else{ - - write_client_reg(VSYNIF, 0x00000001, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - write_client_reg(BITMAP1, 0x01E000F0, TRUE); - write_client_reg(BITMAP2, 0x01E000F0, TRUE); - write_client_reg(BITMAP3, 0x01E000F0, TRUE); - write_client_reg(BITMAP4, 0x00DC00B0, TRUE); - write_client_reg(CLKENB, 0x000001EF, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - write_client_reg(PORT, 0x00000004, TRUE); - write_client_reg(PXL, 0x00000002, TRUE); - write_client_reg(MPLFBUF, 0x00000000, TRUE); - - if (mddi_toshiba_61Hz_refresh) { - write_client_reg(HCYCLE, 0x000000FC, TRUE); - mddi_toshiba_rows_per_second = 39526; - mddi_toshiba_rows_per_refresh = 646; - mddi_toshiba_usecs_per_refresh = 16344; - } else { - write_client_reg(HCYCLE, 0x0000010b, TRUE); - mddi_toshiba_rows_per_second = 37313; - mddi_toshiba_rows_per_refresh = 646; - mddi_toshiba_usecs_per_refresh = 17313; - } - - write_client_reg(HSW, 0x00000003, TRUE); - write_client_reg(HDE_START, 0x00000007, TRUE); - write_client_reg(HDE_SIZE, 0x000000EF, TRUE); - write_client_reg(VCYCLE, 0x00000285, TRUE); - write_client_reg(VSW, 0x00000001, TRUE); - write_client_reg(VDE_START, 0x00000003, TRUE); - write_client_reg(VDE_SIZE, 0x0000027F, TRUE); - write_client_reg(START, 0x00000001, TRUE); - mddi_wait(10); - write_client_reg(SSITX, 0x000800BC, TRUE); - write_client_reg(SSITX, 0x00000180, TRUE); - write_client_reg(SSITX, 0x0008003B, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x000800B0, TRUE); - write_client_reg(SSITX, 0x00000116, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x000800B8, TRUE); - write_client_reg(SSITX, 0x000801FF, TRUE); - write_client_reg(SSITX, 0x000001F5, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x00000011, TRUE); - write_client_reg(SSITX, 0x00000029, TRUE); - write_client_reg(WKREQ, 0x00000000, TRUE); - write_client_reg(WAKEUP, 0x00000000, TRUE); - write_client_reg(INTMSK, 0x00000001, TRUE); - } - - mddi_toshiba_state_transition(TOSHIBA_STATE_PRIM_SEC_READY, - TOSHIBA_STATE_PRIM_NORMAL_MODE); -} - -static void toshiba_sec_start(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(CLKENB, 0x000011EF, TRUE); - write_client_reg(BITMAP0, 0x028001E0, TRUE); - write_client_reg(BITMAP1, 0x00000000, TRUE); - write_client_reg(BITMAP2, 0x00000000, TRUE); - write_client_reg(BITMAP3, 0x00000000, TRUE); - write_client_reg(BITMAP4, 0x00DC00B0, TRUE); - write_client_reg(PORT, 0x00000000, TRUE); - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(MPLFBUF, 0x00000004, TRUE); - write_client_reg(HCYCLE, 0x0000006B, TRUE); - write_client_reg(HSW, 0x00000003, TRUE); - write_client_reg(HDE_START, 0x00000007, TRUE); - write_client_reg(HDE_SIZE, 0x00000057, TRUE); - write_client_reg(VCYCLE, 0x000000E6, TRUE); - write_client_reg(VSW, 0x00000001, TRUE); - write_client_reg(VDE_START, 0x00000003, TRUE); - write_client_reg(VDE_SIZE, 0x000000DB, TRUE); - write_client_reg(ASY_DATA, 0x80000001, TRUE); - write_client_reg(ASY_DATB, 0x0000011B, TRUE); - write_client_reg(ASY_DATC, 0x80000002, TRUE); - write_client_reg(ASY_DATD, 0x00000700, TRUE); - write_client_reg(ASY_DATE, 0x80000003, TRUE); - write_client_reg(ASY_DATF, 0x00000230, TRUE); - write_client_reg(ASY_DATG, 0x80000008, TRUE); - write_client_reg(ASY_DATH, 0x00000402, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000009, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_DATC, 0x8000000B, TRUE); - write_client_reg(ASY_DATD, 0x00000000, TRUE); - write_client_reg(ASY_DATE, 0x8000000C, TRUE); - write_client_reg(ASY_DATF, 0x00000000, TRUE); - write_client_reg(ASY_DATG, 0x8000000D, TRUE); - write_client_reg(ASY_DATH, 0x00000409, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x8000000E, TRUE); - write_client_reg(ASY_DATB, 0x00000409, TRUE); - write_client_reg(ASY_DATC, 0x80000030, TRUE); - write_client_reg(ASY_DATD, 0x00000000, TRUE); - write_client_reg(ASY_DATE, 0x80000031, TRUE); - write_client_reg(ASY_DATF, 0x00000100, TRUE); - write_client_reg(ASY_DATG, 0x80000032, TRUE); - write_client_reg(ASY_DATH, 0x00000104, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000033, TRUE); - write_client_reg(ASY_DATB, 0x00000400, TRUE); - write_client_reg(ASY_DATC, 0x80000034, TRUE); - write_client_reg(ASY_DATD, 0x00000306, TRUE); - write_client_reg(ASY_DATE, 0x80000035, TRUE); - write_client_reg(ASY_DATF, 0x00000706, TRUE); - write_client_reg(ASY_DATG, 0x80000036, TRUE); - write_client_reg(ASY_DATH, 0x00000707, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000037, TRUE); - write_client_reg(ASY_DATB, 0x00000004, TRUE); - write_client_reg(ASY_DATC, 0x80000038, TRUE); - write_client_reg(ASY_DATD, 0x00000000, TRUE); - write_client_reg(ASY_DATE, 0x80000039, TRUE); - write_client_reg(ASY_DATF, 0x00000000, TRUE); - write_client_reg(ASY_DATG, 0x8000003A, TRUE); - write_client_reg(ASY_DATH, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000044, TRUE); - write_client_reg(ASY_DATB, 0x0000AF00, TRUE); - write_client_reg(ASY_DATC, 0x80000045, TRUE); - write_client_reg(ASY_DATD, 0x0000DB00, TRUE); - write_client_reg(ASY_DATE, 0x08000042, TRUE); - write_client_reg(ASY_DATF, 0x0000DB00, TRUE); - write_client_reg(ASY_DATG, 0x80000021, TRUE); - write_client_reg(ASY_DATH, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(PXL, 0x0000000C, TRUE); - write_client_reg(VSYNIF, 0x00000001, TRUE); - write_client_reg(ASY_DATA, 0x80000022, TRUE); - write_client_reg(ASY_CMDSET, 0x00000003, TRUE); - write_client_reg(START, 0x00000001, TRUE); - mddi_wait(60); - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000050, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_DATC, 0x80000051, TRUE); - write_client_reg(ASY_DATD, 0x00000E00, TRUE); - write_client_reg(ASY_DATE, 0x80000052, TRUE); - write_client_reg(ASY_DATF, 0x00000D01, TRUE); - write_client_reg(ASY_DATG, 0x80000053, TRUE); - write_client_reg(ASY_DATH, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - write_client_reg(ASY_DATA, 0x80000058, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_DATC, 0x8000005A, TRUE); - write_client_reg(ASY_DATD, 0x00000E01, TRUE); - write_client_reg(ASY_CMDSET, 0x00000009, TRUE); - write_client_reg(ASY_CMDSET, 0x00000008, TRUE); - write_client_reg(ASY_DATA, 0x80000011, TRUE); - write_client_reg(ASY_DATB, 0x00000812, TRUE); - write_client_reg(ASY_DATC, 0x80000012, TRUE); - write_client_reg(ASY_DATD, 0x00000003, TRUE); - write_client_reg(ASY_DATE, 0x80000013, TRUE); - write_client_reg(ASY_DATF, 0x00000909, TRUE); - write_client_reg(ASY_DATG, 0x80000010, TRUE); - write_client_reg(ASY_DATH, 0x00000040, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - mddi_wait(40); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000340, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(60); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00003340, TRUE); - write_client_reg(ASY_DATC, 0x80000007, TRUE); - write_client_reg(ASY_DATD, 0x00004007, TRUE); - write_client_reg(ASY_CMDSET, 0x00000009, TRUE); - write_client_reg(ASY_CMDSET, 0x00000008, TRUE); - mddi_wait(1); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004017, TRUE); - write_client_reg(ASY_DATC, 0x8000005B, TRUE); - write_client_reg(ASY_DATD, 0x00000000, TRUE); - write_client_reg(ASY_DATE, 0x80000059, TRUE); - write_client_reg(ASY_DATF, 0x00000011, TRUE); - write_client_reg(ASY_CMDSET, 0x0000000D, TRUE); - write_client_reg(ASY_CMDSET, 0x0000000C, TRUE); - mddi_wait(20); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - /* LTPS I/F control */ - write_client_reg(ASY_DATB, 0x00000019, TRUE); - /* Direct cmd transfer enable */ - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - /* Direct cmd transfer disable */ - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(20); - /* Index setting of SUB LCDD */ - write_client_reg(ASY_DATA, 0x80000059, TRUE); - /* LTPS I/F control */ - write_client_reg(ASY_DATB, 0x00000079, TRUE); - /* Direct cmd transfer enable */ - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - /* Direct cmd transfer disable */ - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(20); - /* Index setting of SUB LCDD */ - write_client_reg(ASY_DATA, 0x80000059, TRUE); - /* LTPS I/F control */ - write_client_reg(ASY_DATB, 0x000003FD, TRUE); - /* Direct cmd transfer enable */ - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - /* Direct cmd transfer disable */ - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(20); - mddi_toshiba_state_transition(TOSHIBA_STATE_PRIM_SEC_READY, - TOSHIBA_STATE_SEC_NORMAL_MODE); -} - -static void toshiba_prim_lcd_off(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) { - gordon_disp_off(); - } else{ - - /* Main panel power off (Deep standby in) */ - write_client_reg(SSITX, 0x000800BC, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - write_client_reg(SSITX, 0x00000028, TRUE); - mddi_wait(1); - write_client_reg(SSITX, 0x000800B8, TRUE); - write_client_reg(SSITX, 0x00000180, TRUE); - write_client_reg(SSITX, 0x00000102, TRUE); - write_client_reg(SSITX, 0x00000010, TRUE); - } - write_client_reg(PORT, 0x00000003, TRUE); - write_client_reg(REGENB, 0x00000001, TRUE); - mddi_wait(1); - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(REGENB, 0x00000001, TRUE); - mddi_wait(3); - if (TM_GET_PID(mfd->panel.id) != LCD_SHARP_2P4_VGA) { - write_client_reg(SSITX, 0x000800B0, TRUE); - write_client_reg(SSITX, 0x00000100, TRUE); - } - mddi_toshiba_state_transition(TOSHIBA_STATE_PRIM_NORMAL_MODE, - TOSHIBA_STATE_PRIM_SEC_STANDBY); -} - -static void toshiba_sec_lcd_off(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004016, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000019, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x0000000B, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000002, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(4); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000300, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(4); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004004, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(PORT, 0x00000000, TRUE); - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(VSYNIF, 0x00000001, TRUE); - write_client_reg(PORT_ENB, 0x00000001, TRUE); - write_client_reg(REGENB, 0x00000001, TRUE); - mddi_toshiba_state_transition(TOSHIBA_STATE_SEC_NORMAL_MODE, - TOSHIBA_STATE_PRIM_SEC_STANDBY); -} - -static void toshiba_sec_cont_update_start(struct msm_fb_data_type *mfd) -{ - - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(INTMASK, 0x00000001, TRUE); - write_client_reg(TTBUSSEL, 0x0000000B, TRUE); - write_client_reg(MONI, 0x00000008, TRUE); - write_client_reg(CLKENB, 0x000000EF, TRUE); - write_client_reg(CLKENB, 0x000010EF, TRUE); - write_client_reg(CLKENB, 0x000011EF, TRUE); - write_client_reg(BITMAP4, 0x00DC00B0, TRUE); - write_client_reg(HCYCLE, 0x0000006B, TRUE); - write_client_reg(HSW, 0x00000003, TRUE); - write_client_reg(HDE_START, 0x00000002, TRUE); - write_client_reg(HDE_SIZE, 0x00000057, TRUE); - write_client_reg(VCYCLE, 0x000000E6, TRUE); - write_client_reg(VSW, 0x00000001, TRUE); - write_client_reg(VDE_START, 0x00000003, TRUE); - write_client_reg(VDE_SIZE, 0x000000DB, TRUE); - write_client_reg(WRSTB, 0x00000015, TRUE); - write_client_reg(MPLFBUF, 0x00000004, TRUE); - write_client_reg(ASY_DATA, 0x80000021, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_DATC, 0x80000022, TRUE); - write_client_reg(ASY_CMDSET, 0x00000007, TRUE); - write_client_reg(PXL, 0x00000089, TRUE); - write_client_reg(VSYNIF, 0x00000001, TRUE); - mddi_wait(2); -} - -static void toshiba_sec_cont_update_stop(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - mddi_wait(3); - write_client_reg(SRST, 0x00000002, TRUE); - mddi_wait(3); - write_client_reg(SRST, 0x00000003, TRUE); -} - -static void toshiba_sec_backlight_on(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(TIMER0CTRL, 0x00000060, TRUE); - write_client_reg(TIMER0LOAD, 0x00001388, TRUE); - write_client_reg(PWM0OFF, 0x00000001, TRUE); - write_client_reg(TIMER1CTRL, 0x00000060, TRUE); - write_client_reg(TIMER1LOAD, 0x00001388, TRUE); - write_client_reg(PWM1OFF, 0x00001387, TRUE); - write_client_reg(TIMER0CTRL, 0x000000E0, TRUE); - write_client_reg(TIMER1CTRL, 0x000000E0, TRUE); - write_client_reg(PWMCR, 0x00000003, TRUE); -} - -static void toshiba_sec_sleep_in(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004016, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000019, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x0000000B, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000002, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(4); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000300, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(4); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000000, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004004, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(PORT, 0x00000000, TRUE); - write_client_reg(PXL, 0x00000000, TRUE); - write_client_reg(START, 0x00000000, TRUE); - write_client_reg(REGENB, 0x00000001, TRUE); - /* Sleep in sequence */ - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000302, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); -} - -static void toshiba_sec_sleep_out(struct msm_fb_data_type *mfd) -{ - if (TM_GET_PID(mfd->panel.id) == LCD_TOSHIBA_2P4_WVGA_PT) - return; - - write_client_reg(VSYNIF, 0x00000000, TRUE); - write_client_reg(PORT_ENB, 0x00000002, TRUE); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000300, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - /* Display ON sequence */ - write_client_reg(ASY_DATA, 0x80000011, TRUE); - write_client_reg(ASY_DATB, 0x00000812, TRUE); - write_client_reg(ASY_DATC, 0x80000012, TRUE); - write_client_reg(ASY_DATD, 0x00000003, TRUE); - write_client_reg(ASY_DATE, 0x80000013, TRUE); - write_client_reg(ASY_DATF, 0x00000909, TRUE); - write_client_reg(ASY_DATG, 0x80000010, TRUE); - write_client_reg(ASY_DATH, 0x00000040, TRUE); - write_client_reg(ASY_CMDSET, 0x00000001, TRUE); - write_client_reg(ASY_CMDSET, 0x00000000, TRUE); - mddi_wait(4); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00000340, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(6); - write_client_reg(ASY_DATA, 0x80000010, TRUE); - write_client_reg(ASY_DATB, 0x00003340, TRUE); - write_client_reg(ASY_DATC, 0x80000007, TRUE); - write_client_reg(ASY_DATD, 0x00004007, TRUE); - write_client_reg(ASY_CMDSET, 0x00000009, TRUE); - write_client_reg(ASY_CMDSET, 0x00000008, TRUE); - mddi_wait(1); - write_client_reg(ASY_DATA, 0x80000007, TRUE); - write_client_reg(ASY_DATB, 0x00004017, TRUE); - write_client_reg(ASY_DATC, 0x8000005B, TRUE); - write_client_reg(ASY_DATD, 0x00000000, TRUE); - write_client_reg(ASY_DATE, 0x80000059, TRUE); - write_client_reg(ASY_DATF, 0x00000011, TRUE); - write_client_reg(ASY_CMDSET, 0x0000000D, TRUE); - write_client_reg(ASY_CMDSET, 0x0000000C, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000019, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x00000079, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); - write_client_reg(ASY_DATA, 0x80000059, TRUE); - write_client_reg(ASY_DATB, 0x000003FD, TRUE); - write_client_reg(ASY_CMDSET, 0x00000005, TRUE); - write_client_reg(ASY_CMDSET, 0x00000004, TRUE); - mddi_wait(2); -} - -static void mddi_toshiba_lcd_set_backlight(struct msm_fb_data_type *mfd) -{ - int32 level; - int ret = -EPERM; - int max = mfd->panel_info.bl_max; - int min = mfd->panel_info.bl_min; - - if (mddi_toshiba_pdata && mddi_toshiba_pdata->pmic_backlight) { - ret = mddi_toshiba_pdata->pmic_backlight(mfd->bl_level); - if (!ret) - return; - } - - if (ret && mddi_toshiba_pdata && mddi_toshiba_pdata->backlight_level) { - level = mddi_toshiba_pdata->backlight_level(mfd->bl_level, - max, min); - - if (level < 0) - return; - - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) - write_client_reg(TIMER0LOAD, 0x00001388, TRUE); - } else { - if (!max) - level = 0; - else - level = (mfd->bl_level * 4999) / max; - } - - write_client_reg(PWM0OFF, level, TRUE); -} - -static void mddi_toshiba_vsync_set_handler(msm_fb_vsync_handler_type handler, /* ISR to be executed */ - void *arg) -{ - boolean error = FALSE; - unsigned long flags; - - /* Disable interrupts */ - spin_lock_irqsave(&mddi_host_spin_lock, flags); - /* INTLOCK(); */ - - if (mddi_toshiba_vsync_handler != NULL) { - error = TRUE; - } else { - /* Register the handler for this particular GROUP interrupt source */ - mddi_toshiba_vsync_handler = handler; - mddi_toshiba_vsync_handler_arg = arg; - } - - /* Restore interrupts */ - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - /* MDDI_INTFREE(); */ - if (error) { - MDDI_MSG_ERR("MDDI: Previous Vsync handler never called\n"); - } else { - /* Enable the vsync wakeup */ - mddi_queue_register_write(INTMSK, 0x0000, FALSE, 0); - - mddi_toshiba_vsync_attempts = 1; - mddi_vsync_detect_enabled = TRUE; - } -} /* mddi_toshiba_vsync_set_handler */ - -static void mddi_toshiba_lcd_vsync_detected(boolean detected) -{ - /* static timetick_type start_time = 0; */ - static struct timeval start_time; - static boolean first_time = TRUE; - /* uint32 mdp_cnt_val = 0; */ - /* timetick_type elapsed_us; */ - struct timeval now; - uint32 elapsed_us; - uint32 num_vsyncs; - - if ((detected) || (mddi_toshiba_vsync_attempts > 5)) { - if ((detected) && (mddi_toshiba_monitor_refresh_value)) { - /* if (start_time != 0) */ - if (!first_time) { - jiffies_to_timeval(jiffies, &now); - elapsed_us = - (now.tv_sec - start_time.tv_sec) * 1000000 + - now.tv_usec - start_time.tv_usec; - /* - * LCD is configured for a refresh every usecs, - * so to determine the number of vsyncs that - * have occurred since the last measurement - * add half that to the time difference and - * divide by the refresh rate. - */ - num_vsyncs = (elapsed_us + - (mddi_toshiba_usecs_per_refresh >> - 1)) / - mddi_toshiba_usecs_per_refresh; - /* - * LCD is configured for * hsyncs (rows) per - * refresh cycle. Calculate new rows_per_second - * value based upon these new measurements. - * MDP can update with this new value. - */ - mddi_toshiba_rows_per_second = - (mddi_toshiba_rows_per_refresh * 1000 * - num_vsyncs) / (elapsed_us / 1000); - } - /* start_time = timetick_get(); */ - first_time = FALSE; - jiffies_to_timeval(jiffies, &start_time); - if (mddi_toshiba_report_refresh_measurements) { - (void)mddi_queue_register_read_int(VPOS, - &mddi_toshiba_curr_vpos); - /* mdp_cnt_val = MDP_LINE_COUNT; */ - } - } - /* if detected = TRUE, client initiated wakeup was detected */ - if (mddi_toshiba_vsync_handler != NULL) { - (*mddi_toshiba_vsync_handler) - (mddi_toshiba_vsync_handler_arg); - mddi_toshiba_vsync_handler = NULL; - } - mddi_vsync_detect_enabled = FALSE; - mddi_toshiba_vsync_attempts = 0; - /* need to disable the interrupt wakeup */ - if (!mddi_queue_register_write_int(INTMSK, 0x0001)) - MDDI_MSG_ERR("Vsync interrupt disable failed!\n"); - if (!detected) { - /* give up after 5 failed attempts but show error */ - MDDI_MSG_NOTICE("Vsync detection failed!\n"); - } else if ((mddi_toshiba_monitor_refresh_value) && - (mddi_toshiba_report_refresh_measurements)) { - MDDI_MSG_NOTICE(" Last Line Counter=%d!\n", - mddi_toshiba_curr_vpos); - /* MDDI_MSG_NOTICE(" MDP Line Counter=%d!\n",mdp_cnt_val); */ - MDDI_MSG_NOTICE(" Lines Per Second=%d!\n", - mddi_toshiba_rows_per_second); - } - /* clear the interrupt */ - if (!mddi_queue_register_write_int(INTFLG, 0x0001)) - MDDI_MSG_ERR("Vsync interrupt clear failed!\n"); - } else { - /* if detected = FALSE, we woke up from hibernation, but did not - * detect client initiated wakeup. - */ - mddi_toshiba_vsync_attempts++; - } -} - -static void mddi_toshiba_prim_init(struct msm_fb_data_type *mfd) -{ - - switch (toshiba_state) { - case TOSHIBA_STATE_PRIM_SEC_READY: - break; - case TOSHIBA_STATE_OFF: - toshiba_state = TOSHIBA_STATE_PRIM_SEC_STANDBY; - toshiba_common_initial_setup(mfd); - break; - case TOSHIBA_STATE_PRIM_SEC_STANDBY: - toshiba_common_initial_setup(mfd); - break; - case TOSHIBA_STATE_SEC_NORMAL_MODE: - toshiba_sec_cont_update_stop(mfd); - toshiba_sec_sleep_in(mfd); - toshiba_sec_sleep_out(mfd); - toshiba_sec_lcd_off(mfd); - toshiba_common_initial_setup(mfd); - break; - default: - MDDI_MSG_ERR("mddi_toshiba_prim_init from state %d\n", - toshiba_state); - } - - toshiba_prim_start(mfd); - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) - gordon_disp_init(); - mddi_host_write_pix_attr_reg(0x00C3); -} - -static void mddi_toshiba_sec_init(struct msm_fb_data_type *mfd) -{ - - switch (toshiba_state) { - case TOSHIBA_STATE_PRIM_SEC_READY: - break; - case TOSHIBA_STATE_PRIM_SEC_STANDBY: - toshiba_common_initial_setup(mfd); - break; - case TOSHIBA_STATE_PRIM_NORMAL_MODE: - toshiba_prim_lcd_off(mfd); - toshiba_common_initial_setup(mfd); - break; - default: - MDDI_MSG_ERR("mddi_toshiba_sec_init from state %d\n", - toshiba_state); - } - - toshiba_sec_start(mfd); - toshiba_sec_backlight_on(mfd); - toshiba_sec_cont_update_start(mfd); - mddi_host_write_pix_attr_reg(0x0400); -} - -static void mddi_toshiba_lcd_powerdown(struct msm_fb_data_type *mfd) -{ - switch (toshiba_state) { - case TOSHIBA_STATE_PRIM_SEC_READY: - mddi_toshiba_prim_init(mfd); - mddi_toshiba_lcd_powerdown(mfd); - return; - case TOSHIBA_STATE_PRIM_SEC_STANDBY: - break; - case TOSHIBA_STATE_PRIM_NORMAL_MODE: - toshiba_prim_lcd_off(mfd); - break; - case TOSHIBA_STATE_SEC_NORMAL_MODE: - toshiba_sec_cont_update_stop(mfd); - toshiba_sec_sleep_in(mfd); - toshiba_sec_sleep_out(mfd); - toshiba_sec_lcd_off(mfd); - break; - default: - MDDI_MSG_ERR("mddi_toshiba_lcd_powerdown from state %d\n", - toshiba_state); - } -} - -static int mddi_sharpgordon_firsttime = 1; - -static int mddi_toshiba_lcd_on(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - mfd = platform_get_drvdata(pdev); - if (!mfd) - return -ENODEV; - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (TM_GET_DID(mfd->panel.id) == TOSHIBA_VGA_PRIM) - mddi_toshiba_prim_init(mfd); - else - mddi_toshiba_sec_init(mfd); - if (TM_GET_PID(mfd->panel.id) == LCD_SHARP_2P4_VGA) { - if (mddi_sharpgordon_firsttime) { - mddi_sharpgordon_firsttime = 0; - write_client_reg(REGENB, 0x00000001, TRUE); - } - } - return 0; -} - -static int mddi_toshiba_lcd_off(struct platform_device *pdev) -{ - mddi_toshiba_lcd_powerdown(platform_get_drvdata(pdev)); - return 0; -} - -static int __init mddi_toshiba_lcd_probe(struct platform_device *pdev) -{ - if (pdev->id == 0) { - mddi_toshiba_pdata = pdev->dev.platform_data; - return 0; - } - - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = mddi_toshiba_lcd_probe, - .driver = { - .name = "mddi_toshiba", - }, -}; - -static struct msm_fb_panel_data toshiba_panel_data = { - .on = mddi_toshiba_lcd_on, - .off = mddi_toshiba_lcd_off, -}; - -static int ch_used[3]; - -int mddi_toshiba_device_register(struct msm_panel_info *pinfo, - u32 channel, u32 panel) -{ - struct platform_device *pdev = NULL; - int ret; - - if ((channel >= 3) || ch_used[channel]) - return -ENODEV; - - if ((channel != TOSHIBA_VGA_PRIM) && - mddi_toshiba_pdata && mddi_toshiba_pdata->panel_num) - if (mddi_toshiba_pdata->panel_num() < 2) - return -ENODEV; - - ch_used[channel] = TRUE; - - pdev = platform_device_alloc("mddi_toshiba", (panel << 8)|channel); - if (!pdev) - return -ENOMEM; - - if (channel == TOSHIBA_VGA_PRIM) { - toshiba_panel_data.set_backlight = - mddi_toshiba_lcd_set_backlight; - - if (pinfo->lcd.vsync_enable) { - toshiba_panel_data.set_vsync_notifier = - mddi_toshiba_vsync_set_handler; - mddi_lcd.vsync_detected = - mddi_toshiba_lcd_vsync_detected; - } - } else { - toshiba_panel_data.set_backlight = NULL; - toshiba_panel_data.set_vsync_notifier = NULL; - } - - toshiba_panel_data.panel_info = *pinfo; - - ret = platform_device_add_data(pdev, &toshiba_panel_data, - sizeof(toshiba_panel_data)); - if (ret) { - printk(KERN_ERR - "%s: platform_device_add_data failed!\n", __func__); - goto err_device_put; - } - - ret = platform_device_add(pdev); - if (ret) { - printk(KERN_ERR - "%s: platform_device_register failed!\n", __func__); - goto err_device_put; - } - - return 0; - -err_device_put: - platform_device_put(pdev); - return ret; -} - -static int __init mddi_toshiba_lcd_init(void) -{ - return platform_driver_register(&this_driver); -} - -module_init(mddi_toshiba_lcd_init); diff --git a/drivers/staging/msm/mddi_toshiba.h b/drivers/staging/msm/mddi_toshiba.h deleted file mode 100644 index cbeea0a..0000000 --- a/drivers/staging/msm/mddi_toshiba.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MDDI_TOSHIBA_H -#define MDDI_TOSHIBA_H - -#define TOSHIBA_VGA_PRIM 1 -#define TOSHIBA_VGA_SECD 2 - -#define LCD_TOSHIBA_2P4_VGA 0 -#define LCD_TOSHIBA_2P4_WVGA 1 -#define LCD_TOSHIBA_2P4_WVGA_PT 2 -#define LCD_SHARP_2P4_VGA 3 - -#define GPIO_BLOCK_BASE 0x150000 -#define SYSTEM_BLOCK2_BASE 0x170000 - -#define GPIODIR (GPIO_BLOCK_BASE|0x04) -#define GPIOSEL (SYSTEM_BLOCK2_BASE|0x00) -#define GPIOPC (GPIO_BLOCK_BASE|0x28) -#define GPIODATA (GPIO_BLOCK_BASE|0x00) - -#define write_client_reg(__X, __Y, __Z) {\ - mddi_queue_register_write(__X, __Y, TRUE, 0);\ -} - -#endif /* MDDI_TOSHIBA_H */ diff --git a/drivers/staging/msm/mddi_toshiba_vga.c b/drivers/staging/msm/mddi_toshiba_vga.c deleted file mode 100644 index 7e61d3a..0000000 --- a/drivers/staging/msm/mddi_toshiba_vga.c +++ /dev/null @@ -1,136 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" -#include "mddi_toshiba.h" - -static uint32 read_client_reg(uint32 addr) -{ - uint32 val; - mddi_queue_register_read(addr, &val, TRUE, 0); - return val; -} - -static uint32 toshiba_lcd_gpio_read(void) -{ - uint32 val; - - write_client_reg(GPIODIR, 0x0000000C, TRUE); - write_client_reg(GPIOSEL, 0x00000000, TRUE); - write_client_reg(GPIOSEL, 0x00000000, TRUE); - write_client_reg(GPIOPC, 0x03CF00C0, TRUE); - val = read_client_reg(GPIODATA) & 0x2C0; - - return val; -} - -static u32 mddi_toshiba_panel_detect(void) -{ - mddi_host_type host_idx = MDDI_HOST_PRIM; - uint32 lcd_gpio; - u32 mddi_toshiba_lcd = LCD_TOSHIBA_2P4_VGA; - - /* Toshiba display requires larger drive_lo value */ - mddi_host_reg_out(DRIVE_LO, 0x0050); - - lcd_gpio = toshiba_lcd_gpio_read(); - switch (lcd_gpio) { - case 0x0080: - mddi_toshiba_lcd = LCD_SHARP_2P4_VGA; - break; - - case 0x00C0: - default: - mddi_toshiba_lcd = LCD_TOSHIBA_2P4_VGA; - break; - } - - return mddi_toshiba_lcd; -} - -static int __init mddi_toshiba_vga_init(void) -{ - int ret; - struct msm_panel_info pinfo; - u32 panel; - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - u32 id; - - ret = msm_fb_detect_client("mddi_toshiba_vga"); - if (ret == -ENODEV) - return 0; - - if (ret) { - id = mddi_get_client_id(); - if ((id >> 16) != 0xD263) - return 0; - } -#endif - - panel = mddi_toshiba_panel_detect(); - - pinfo.xres = 480; - pinfo.yres = 640; - pinfo.type = MDDI_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; - pinfo.wait_cycle = 0; - pinfo.bpp = 18; - pinfo.lcd.vsync_enable = TRUE; - pinfo.lcd.refx100 = 6118; - pinfo.lcd.v_back_porch = 6; - pinfo.lcd.v_front_porch = 0; - pinfo.lcd.v_pulse_width = 0; - pinfo.lcd.hw_vsync_mode = FALSE; - pinfo.lcd.vsync_notifier_period = (1 * HZ); - pinfo.bl_max = 99; - pinfo.bl_min = 1; - pinfo.clk_rate = 122880000; - pinfo.clk_min = 120000000; - pinfo.clk_max = 200000000; - pinfo.fb_num = 2; - - ret = mddi_toshiba_device_register(&pinfo, TOSHIBA_VGA_PRIM, panel); - if (ret) { - printk(KERN_ERR "%s: failed to register device!\n", __func__); - return ret; - } - - pinfo.xres = 176; - pinfo.yres = 220; - pinfo.type = MDDI_PANEL; - pinfo.pdest = DISPLAY_2; - pinfo.mddi.vdopkt = 0x400; - pinfo.wait_cycle = 0; - pinfo.bpp = 18; - pinfo.clk_rate = 122880000; - pinfo.clk_min = 120000000; - pinfo.clk_max = 200000000; - pinfo.fb_num = 2; - - ret = mddi_toshiba_device_register(&pinfo, TOSHIBA_VGA_SECD, panel); - if (ret) - printk(KERN_WARNING - "%s: failed to register device!\n", __func__); - - return ret; -} - -module_init(mddi_toshiba_vga_init); diff --git a/drivers/staging/msm/mddi_toshiba_wvga_pt.c b/drivers/staging/msm/mddi_toshiba_wvga_pt.c deleted file mode 100644 index fc7d4e0..0000000 --- a/drivers/staging/msm/mddi_toshiba_wvga_pt.c +++ /dev/null @@ -1,64 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" -#include "mddi_toshiba.h" - -static int __init mddi_toshiba_wvga_pt_init(void) -{ - int ret; - struct msm_panel_info pinfo; -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - uint id; - - ret = msm_fb_detect_client("mddi_toshiba_wvga_pt"); - if (ret == -ENODEV) - return 0; - - if (ret) { - id = mddi_get_client_id(); - if (id != 0xd2638722) - return 0; - } -#endif - - pinfo.xres = 480; - pinfo.yres = 800; - pinfo.type = MDDI_PANEL; - pinfo.pdest = DISPLAY_1; - pinfo.mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR; - pinfo.wait_cycle = 0; - pinfo.bpp = 18; - pinfo.lcd.vsync_enable = FALSE; - pinfo.bl_max = 15; - pinfo.bl_min = 1; - pinfo.clk_rate = 192000000; - pinfo.clk_min = 190000000; - pinfo.clk_max = 200000000; - pinfo.fb_num = 2; - - ret = mddi_toshiba_device_register(&pinfo, TOSHIBA_VGA_PRIM, - LCD_TOSHIBA_2P4_WVGA_PT); - if (ret) - printk(KERN_ERR "%s: failed to register device!\n", __func__); - - return ret; -} - -module_init(mddi_toshiba_wvga_pt_init); diff --git a/drivers/staging/msm/mddihost.c b/drivers/staging/msm/mddihost.c deleted file mode 100644 index 58a86d5..0000000 --- a/drivers/staging/msm/mddihost.c +++ /dev/null @@ -1,377 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" - -#include -#include - -struct semaphore mddi_host_mutex; - -struct clk *mddi_io_clk; -static boolean mddi_host_powered = FALSE; -static boolean mddi_host_initialized = FALSE; -extern uint32 *mddi_reg_read_value_ptr; - -mddi_lcd_func_type mddi_lcd; - -extern mddi_client_capability_type mddi_client_capability_pkt; - -#ifdef FEATURE_MDDI_HITACHI -extern void mddi_hitachi_window_adjust(uint16 x1, - uint16 x2, uint16 y1, uint16 y2); -#endif - -extern void mddi_toshiba_lcd_init(void); - -#ifdef FEATURE_MDDI_S6D0142 -extern void mddi_s6d0142_lcd_init(void); -extern void mddi_s6d0142_window_adjust(uint16 x1, - uint16 x2, - uint16 y1, - uint16 y2, - mddi_llist_done_cb_type done_cb); -#endif - -void mddi_init(void) -{ - if (mddi_host_initialized) - return; - - mddi_host_initialized = TRUE; - - sema_init(&mddi_host_mutex, 1); - - if (!mddi_host_powered) { - down(&mddi_host_mutex); - mddi_host_init(MDDI_HOST_PRIM); - mddi_host_powered = TRUE; - up(&mddi_host_mutex); - mdelay(10); - } -} - -int mddi_host_register_read(uint32 reg_addr, - uint32 *reg_value_ptr, boolean wait, mddi_host_type host) { - mddi_linked_list_type *curr_llist_ptr; - mddi_register_access_packet_type *regacc_pkt_ptr; - uint16 curr_llist_idx; - int ret = 0; - - if (in_interrupt()) - MDDI_MSG_CRIT("Called from ISR context\n"); - - if (!mddi_host_powered) { - MDDI_MSG_ERR("MDDI powered down!\n"); - mddi_init(); - } - - down(&mddi_host_mutex); - - mddi_reg_read_value_ptr = reg_value_ptr; - curr_llist_idx = mddi_get_reg_read_llist_item(host, TRUE); - if (curr_llist_idx == UNASSIGNED_INDEX) { - up(&mddi_host_mutex); - - /* need to change this to some sort of wait */ - MDDI_MSG_ERR("Attempting to queue up more than 1 reg read\n"); - return -EINVAL; - } - - curr_llist_ptr = &llist_extern[host][curr_llist_idx]; - curr_llist_ptr->link_controller_flags = 0x11; - curr_llist_ptr->packet_header_count = 14; - curr_llist_ptr->packet_data_count = 0; - - curr_llist_ptr->next_packet_pointer = NULL; - curr_llist_ptr->packet_data_pointer = NULL; - curr_llist_ptr->reserved = 0; - - regacc_pkt_ptr = &curr_llist_ptr->packet_header.register_pkt; - - regacc_pkt_ptr->packet_length = curr_llist_ptr->packet_header_count; - regacc_pkt_ptr->packet_type = 146; /* register access packet */ - regacc_pkt_ptr->bClient_ID = 0; - regacc_pkt_ptr->read_write_info = 0x8001; - regacc_pkt_ptr->register_address = reg_addr; - - /* now adjust pointers */ - mddi_queue_forward_packets(curr_llist_idx, curr_llist_idx, wait, - NULL, host); - /* need to check if we can write the pointer or not */ - - up(&mddi_host_mutex); - - if (wait) { - int wait_ret; - - mddi_linked_list_notify_type *llist_notify_ptr; - llist_notify_ptr = &llist_extern_notify[host][curr_llist_idx]; - wait_ret = wait_for_completion_timeout( - &(llist_notify_ptr->done_comp), 5 * HZ); - - if (wait_ret <= 0) - ret = -EBUSY; - - if (wait_ret < 0) - printk(KERN_ERR "%s: failed to wait for completion!\n", - __func__); - else if (!wait_ret) - printk(KERN_ERR "%s: Timed out waiting!\n", __func__); - } - - MDDI_MSG_DEBUG("Reg Read value=0x%x\n", *reg_value_ptr); - - return ret; -} /* mddi_host_register_read */ - -int mddi_host_register_write(uint32 reg_addr, - uint32 reg_val, enum mddi_data_packet_size_type packet_size, - boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host) { - mddi_linked_list_type *curr_llist_ptr; - mddi_linked_list_type *curr_llist_dma_ptr; - mddi_register_access_packet_type *regacc_pkt_ptr; - uint16 curr_llist_idx; - int ret = 0; - - if (in_interrupt()) - MDDI_MSG_CRIT("Called from ISR context\n"); - - if (!mddi_host_powered) { - MDDI_MSG_ERR("MDDI powered down!\n"); - mddi_init(); - } - - down(&mddi_host_mutex); - - curr_llist_idx = mddi_get_next_free_llist_item(host, TRUE); - curr_llist_ptr = &llist_extern[host][curr_llist_idx]; - curr_llist_dma_ptr = &llist_dma_extern[host][curr_llist_idx]; - - curr_llist_ptr->link_controller_flags = 1; - curr_llist_ptr->packet_header_count = 14; - curr_llist_ptr->packet_data_count = 4; - - curr_llist_ptr->next_packet_pointer = NULL; - curr_llist_ptr->reserved = 0; - - regacc_pkt_ptr = &curr_llist_ptr->packet_header.register_pkt; - - regacc_pkt_ptr->packet_length = curr_llist_ptr->packet_header_count + - (uint16)packet_size; - regacc_pkt_ptr->packet_type = 146; /* register access packet */ - regacc_pkt_ptr->bClient_ID = 0; - regacc_pkt_ptr->read_write_info = 0x0001; - regacc_pkt_ptr->register_address = reg_addr; - regacc_pkt_ptr->register_data_list = reg_val; - - MDDI_MSG_DEBUG("Reg Access write reg=0x%x, value=0x%x\n", - regacc_pkt_ptr->register_address, - regacc_pkt_ptr->register_data_list); - - regacc_pkt_ptr = &curr_llist_dma_ptr->packet_header.register_pkt; - curr_llist_ptr->packet_data_pointer = - (void *)(®acc_pkt_ptr->register_data_list); - - /* now adjust pointers */ - mddi_queue_forward_packets(curr_llist_idx, curr_llist_idx, wait, - done_cb, host); - - up(&mddi_host_mutex); - - if (wait) { - int wait_ret; - - mddi_linked_list_notify_type *llist_notify_ptr; - llist_notify_ptr = &llist_extern_notify[host][curr_llist_idx]; - wait_ret = wait_for_completion_timeout( - &(llist_notify_ptr->done_comp), 5 * HZ); - - if (wait_ret <= 0) - ret = -EBUSY; - - if (wait_ret < 0) - printk(KERN_ERR "%s: failed to wait for completion!\n", - __func__); - else if (!wait_ret) - printk(KERN_ERR "%s: Timed out waiting!\n", __func__); - } - - return ret; -} /* mddi_host_register_write */ - -boolean mddi_host_register_read_int - (uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host) { - mddi_linked_list_type *curr_llist_ptr; - mddi_register_access_packet_type *regacc_pkt_ptr; - uint16 curr_llist_idx; - - if (!in_interrupt()) - MDDI_MSG_CRIT("Called from TASK context\n"); - - if (!mddi_host_powered) { - MDDI_MSG_ERR("MDDI powered down!\n"); - return FALSE; - } - - if (down_trylock(&mddi_host_mutex) != 0) - return FALSE; - - mddi_reg_read_value_ptr = reg_value_ptr; - curr_llist_idx = mddi_get_reg_read_llist_item(host, FALSE); - if (curr_llist_idx == UNASSIGNED_INDEX) { - up(&mddi_host_mutex); - return FALSE; - } - - curr_llist_ptr = &llist_extern[host][curr_llist_idx]; - curr_llist_ptr->link_controller_flags = 0x11; - curr_llist_ptr->packet_header_count = 14; - curr_llist_ptr->packet_data_count = 0; - - curr_llist_ptr->next_packet_pointer = NULL; - curr_llist_ptr->packet_data_pointer = NULL; - curr_llist_ptr->reserved = 0; - - regacc_pkt_ptr = &curr_llist_ptr->packet_header.register_pkt; - - regacc_pkt_ptr->packet_length = curr_llist_ptr->packet_header_count; - regacc_pkt_ptr->packet_type = 146; /* register access packet */ - regacc_pkt_ptr->bClient_ID = 0; - regacc_pkt_ptr->read_write_info = 0x8001; - regacc_pkt_ptr->register_address = reg_addr; - - /* now adjust pointers */ - mddi_queue_forward_packets(curr_llist_idx, curr_llist_idx, FALSE, - NULL, host); - /* need to check if we can write the pointer or not */ - - up(&mddi_host_mutex); - - return TRUE; - -} /* mddi_host_register_read */ - -boolean mddi_host_register_write_int - (uint32 reg_addr, - uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host) { - mddi_linked_list_type *curr_llist_ptr; - mddi_linked_list_type *curr_llist_dma_ptr; - mddi_register_access_packet_type *regacc_pkt_ptr; - uint16 curr_llist_idx; - - if (!in_interrupt()) - MDDI_MSG_CRIT("Called from TASK context\n"); - - if (!mddi_host_powered) { - MDDI_MSG_ERR("MDDI powered down!\n"); - return FALSE; - } - - if (down_trylock(&mddi_host_mutex) != 0) - return FALSE; - - curr_llist_idx = mddi_get_next_free_llist_item(host, FALSE); - if (curr_llist_idx == UNASSIGNED_INDEX) { - up(&mddi_host_mutex); - return FALSE; - } - - curr_llist_ptr = &llist_extern[host][curr_llist_idx]; - curr_llist_dma_ptr = &llist_dma_extern[host][curr_llist_idx]; - - curr_llist_ptr->link_controller_flags = 1; - curr_llist_ptr->packet_header_count = 14; - curr_llist_ptr->packet_data_count = 4; - - curr_llist_ptr->next_packet_pointer = NULL; - curr_llist_ptr->reserved = 0; - - regacc_pkt_ptr = &curr_llist_ptr->packet_header.register_pkt; - - regacc_pkt_ptr->packet_length = curr_llist_ptr->packet_header_count + 4; - regacc_pkt_ptr->packet_type = 146; /* register access packet */ - regacc_pkt_ptr->bClient_ID = 0; - regacc_pkt_ptr->read_write_info = 0x0001; - regacc_pkt_ptr->register_address = reg_addr; - regacc_pkt_ptr->register_data_list = reg_val; - - regacc_pkt_ptr = &curr_llist_dma_ptr->packet_header.register_pkt; - curr_llist_ptr->packet_data_pointer = - (void *)(&(regacc_pkt_ptr->register_data_list)); - - /* now adjust pointers */ - mddi_queue_forward_packets(curr_llist_idx, curr_llist_idx, FALSE, - done_cb, host); - up(&mddi_host_mutex); - - return TRUE; - -} /* mddi_host_register_write */ - -void mddi_wait(uint16 time_ms) -{ - mdelay(time_ms); -} - -void mddi_client_lcd_vsync_detected(boolean detected) -{ - if (mddi_lcd.vsync_detected) - (*mddi_lcd.vsync_detected) (detected); -} - -/* extended version of function includes done callback */ -void mddi_window_adjust_ext(struct msm_fb_data_type *mfd, - uint16 x1, - uint16 x2, - uint16 y1, - uint16 y2, mddi_llist_done_cb_type done_cb) -{ -#ifdef FEATURE_MDDI_HITACHI - if (mfd->panel.id == HITACHI) - mddi_hitachi_window_adjust(x1, x2, y1, y2); -#elif defined(FEATURE_MDDI_S6D0142) - if (mfd->panel.id == MDDI_LCD_S6D0142) - mddi_s6d0142_window_adjust(x1, x2, y1, y2, done_cb); -#else - /* Do nothing then... except avoid lint/compiler warnings */ - (void)x1; - (void)x2; - (void)y1; - (void)y2; - (void)done_cb; -#endif -} - -void mddi_window_adjust(struct msm_fb_data_type *mfd, - uint16 x1, uint16 x2, uint16 y1, uint16 y2) -{ - mddi_window_adjust_ext(mfd, x1, x2, y1, y2, NULL); -} diff --git a/drivers/staging/msm/mddihost.h b/drivers/staging/msm/mddihost.h deleted file mode 100644 index d7b785c..0000000 --- a/drivers/staging/msm/mddihost.h +++ /dev/null @@ -1,207 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MDDIHOST_H -#define MDDIHOST_H - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "msm_fb_panel.h" - -#undef FEATURE_MDDI_MC4 -#undef FEATURE_MDDI_S6D0142 -#undef FEATURE_MDDI_HITACHI -#define FEATURE_MDDI_SHARP -#define FEATURE_MDDI_TOSHIBA -#undef FEATURE_MDDI_E751 -#define FEATURE_MDDI_CORONA -#define FEATURE_MDDI_PRISM - -#define T_MSM7500 - -typedef enum { - format_16bpp, - format_18bpp, - format_24bpp -} mddi_video_format; - -typedef enum { - MDDI_LCD_NONE = 0, - MDDI_LCD_MC4, - MDDI_LCD_S6D0142, - MDDI_LCD_SHARP, - MDDI_LCD_E751, - MDDI_LCD_CORONA, - MDDI_LCD_HITACHI, - MDDI_LCD_TOSHIBA, - MDDI_LCD_PRISM, - MDDI_LCD_TP2, - MDDI_NUM_LCD_TYPES, - MDDI_LCD_DEFAULT = MDDI_LCD_TOSHIBA -} mddi_lcd_type; - -typedef enum { - MDDI_HOST_PRIM = 0, - MDDI_HOST_EXT, - MDDI_NUM_HOST_CORES -} mddi_host_type; - -typedef enum { - MDDI_DRIVER_RESET, /* host core registers have not been written. */ - MDDI_DRIVER_DISABLED, /* registers written, interrupts disabled. */ - MDDI_DRIVER_ENABLED /* registers written, interrupts enabled. */ -} mddi_host_driver_state_type; - -typedef enum { - MDDI_GPIO_INT_0 = 0, - MDDI_GPIO_INT_1, - MDDI_GPIO_INT_2, - MDDI_GPIO_INT_3, - MDDI_GPIO_INT_4, - MDDI_GPIO_INT_5, - MDDI_GPIO_INT_6, - MDDI_GPIO_INT_7, - MDDI_GPIO_INT_8, - MDDI_GPIO_INT_9, - MDDI_GPIO_INT_10, - MDDI_GPIO_INT_11, - MDDI_GPIO_INT_12, - MDDI_GPIO_INT_13, - MDDI_GPIO_INT_14, - MDDI_GPIO_INT_15, - MDDI_GPIO_NUM_INTS -} mddi_gpio_int_type; - -enum mddi_data_packet_size_type { - MDDI_DATA_PACKET_4_BYTES = 4, - MDDI_DATA_PACKET_8_BYTES = 8, - MDDI_DATA_PACKET_12_BYTES = 12, - MDDI_DATA_PACKET_16_BYTES = 16, - MDDI_DATA_PACKET_24_BYTES = 24 -}; - -typedef struct { - uint32 addr; - uint32 value; -} mddi_reg_write_type; - -boolean mddi_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg); - -typedef void (*mddi_llist_done_cb_type) (void); - -typedef void (*mddi_rev_handler_type) (void *); - -boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type); - -#define MDDI_DEFAULT_PRIM_PIX_ATTR 0xC3 -#define MDDI_DEFAULT_SECD_PIX_ATTR 0xC0 - -typedef int gpio_int_polarity_type; -typedef int gpio_int_handler_type; - -typedef struct { - void (*vsync_detected) (boolean); -} mddi_lcd_func_type; - -extern mddi_lcd_func_type mddi_lcd; -void mddi_init(void); - -void mddi_powerdown(void); - -void mddi_host_start_ext_display(void); -void mddi_host_stop_ext_display(void); - -extern spinlock_t mddi_host_spin_lock; -#ifdef T_MSM7500 -void mddi_reset(void); -#ifdef FEATURE_DUAL_PROC_MODEM_DISPLAY -void mddi_host_switch_proc_control(boolean on); -#endif -#endif -void mddi_host_exit_power_collapse(void); - -void mddi_queue_splash_screen - (void *buf_ptr, - boolean clear_area, - int16 src_width, - int16 src_starting_row, - int16 src_starting_column, - int16 num_of_rows, - int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column); - -void mddi_queue_image - (void *buf_ptr, - uint8 stereo_video, - boolean clear_area, - int16 src_width, - int16 src_starting_row, - int16 src_starting_column, - int16 num_of_rows, - int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column); - -int mddi_host_register_read - (uint32 reg_addr, - uint32 *reg_value_ptr, boolean wait, mddi_host_type host_idx); -int mddi_host_register_write - (uint32 reg_addr, uint32 reg_val, - enum mddi_data_packet_size_type packet_size, - boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host); -boolean mddi_host_register_write_int - (uint32 reg_addr, - uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host); -boolean mddi_host_register_read_int - (uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host_idx); -void mddi_queue_register_write_static - (uint32 reg_addr, - uint32 reg_val, boolean wait, mddi_llist_done_cb_type done_cb); -void mddi_queue_static_window_adjust - (const mddi_reg_write_type *reg_write, - uint16 num_writes, mddi_llist_done_cb_type done_cb); - -#define mddi_queue_register_read(reg, val_ptr, wait, sig) \ - mddi_host_register_read(reg, val_ptr, wait, MDDI_HOST_PRIM) -#define mddi_queue_register_write(reg, val, wait, sig) \ - mddi_host_register_write(reg, val, MDDI_DATA_PACKET_4_BYTES,\ - wait, NULL, MDDI_HOST_PRIM) -#define mddi_queue_register_write_extn(reg, val, pkt_size, wait, sig) \ - mddi_host_register_write(reg, val, pkt_size, \ - wait, NULL, MDDI_HOST_PRIM) -#define mddi_queue_register_write_int(reg, val) \ - mddi_host_register_write_int(reg, val, NULL, MDDI_HOST_PRIM) -#define mddi_queue_register_read_int(reg, val_ptr) \ - mddi_host_register_read_int(reg, val_ptr, MDDI_HOST_PRIM) -#define mddi_queue_register_writes(reg_ptr, val, wait, sig) \ - mddi_host_register_writes(reg_ptr, val, wait, sig, MDDI_HOST_PRIM) - -void mddi_wait(uint16 time_ms); -void mddi_assign_max_pkt_dimensions(uint16 image_cols, - uint16 image_rows, - uint16 bpp, - uint16 *max_cols, uint16 * max_rows); -uint16 mddi_assign_pkt_height(uint16 pkt_width, uint16 pkt_height, uint16 bpp); -void mddi_queue_reverse_encapsulation(boolean wait); -void mddi_disable(int lock); -#endif /* MDDIHOST_H */ diff --git a/drivers/staging/msm/mddihost_e.c b/drivers/staging/msm/mddihost_e.c deleted file mode 100644 index 7de5eda..0000000 --- a/drivers/staging/msm/mddihost_e.c +++ /dev/null @@ -1,63 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "mddihost.h" -#include "mddihosti.h" - -#include -#include - -extern struct semaphore mddi_host_mutex; -static boolean mddi_host_ext_powered = FALSE; - -void mddi_host_start_ext_display(void) -{ - down(&mddi_host_mutex); - - if (!mddi_host_ext_powered) { - mddi_host_init(MDDI_HOST_EXT); - - mddi_host_ext_powered = TRUE; - } - - up(&mddi_host_mutex); -} - -void mddi_host_stop_ext_display(void) -{ - down(&mddi_host_mutex); - - if (mddi_host_ext_powered) { - mddi_host_powerdown(MDDI_HOST_EXT); - - mddi_host_ext_powered = FALSE; - } - - up(&mddi_host_mutex); -} diff --git a/drivers/staging/msm/mddihosti.c b/drivers/staging/msm/mddihosti.c deleted file mode 100644 index f9d6e91..0000000 --- a/drivers/staging/msm/mddihosti.c +++ /dev/null @@ -1,2239 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb_panel.h" -#include "mddihost.h" -#include "mddihosti.h" - -#define FEATURE_MDDI_UNDERRUN_RECOVERY -#ifndef FEATURE_MDDI_DISABLE_REVERSE -static void mddi_read_rev_packet(byte *data_ptr); -#endif - -struct timer_list mddi_host_timer; - -#define MDDI_DEFAULT_TIMER_LENGTH 5000 /* 5 seconds */ -uint32 mddi_rtd_frequency = 60000; /* send RTD every 60 seconds */ -uint32 mddi_client_status_frequency = 60000; /* get status pkt every 60 secs */ - -boolean mddi_vsync_detect_enabled = FALSE; -mddi_gpio_info_type mddi_gpio; - -uint32 mddi_host_core_version; -boolean mddi_debug_log_statistics = FALSE; -/* #define FEATURE_MDDI_HOST_ENABLE_EARLY_HIBERNATION */ -/* default to TRUE in case MDP does not vote */ -static boolean mddi_host_mdp_active_flag = TRUE; -static uint32 mddi_log_stats_counter; -uint32 mddi_log_stats_frequency = 4000; - -#define MDDI_DEFAULT_REV_PKT_SIZE 0x20 - -#ifndef FEATURE_MDDI_DISABLE_REVERSE -static boolean mddi_rev_ptr_workaround = TRUE; -static uint32 mddi_reg_read_retry; -static uint32 mddi_reg_read_retry_max = 20; -static boolean mddi_enable_reg_read_retry = TRUE; -static boolean mddi_enable_reg_read_retry_once = FALSE; - -#define MDDI_MAX_REV_PKT_SIZE 0x60 - -#define MDDI_CLIENT_CAPABILITY_REV_PKT_SIZE 0x60 - -#define MDDI_VIDEO_REV_PKT_SIZE 0x40 -#define MDDI_REV_BUFFER_SIZE MDDI_MAX_REV_PKT_SIZE -static byte rev_packet_data[MDDI_MAX_REV_PKT_SIZE]; -#endif /* FEATURE_MDDI_DISABLE_REVERSE */ -/* leave these variables so graphics will compile */ - -#define MDDI_MAX_REV_DATA_SIZE 128 -/*lint -d__align(x) */ -boolean mddi_debug_clear_rev_data = TRUE; - -uint32 *mddi_reg_read_value_ptr; - -mddi_client_capability_type mddi_client_capability_pkt; -static boolean mddi_client_capability_request = FALSE; - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - -#define MAX_MDDI_REV_HANDLERS 2 -#define INVALID_PKT_TYPE 0xFFFF - -typedef struct { - mddi_rev_handler_type handler; /* ISR to be executed */ - uint16 pkt_type; -} mddi_rev_pkt_handler_type; -static mddi_rev_pkt_handler_type mddi_rev_pkt_handler[MAX_MDDI_REV_HANDLERS] = - { {NULL, INVALID_PKT_TYPE}, {NULL, INVALID_PKT_TYPE} }; - -static boolean mddi_rev_encap_user_request = FALSE; -static mddi_linked_list_notify_type mddi_rev_user; - -spinlock_t mddi_host_spin_lock; -extern uint32 mdp_in_processing; -#endif - -typedef enum { - MDDI_REV_IDLE -#ifndef FEATURE_MDDI_DISABLE_REVERSE - , MDDI_REV_REG_READ_ISSUED, - MDDI_REV_REG_READ_SENT, - MDDI_REV_ENCAP_ISSUED, - MDDI_REV_STATUS_REQ_ISSUED, - MDDI_REV_CLIENT_CAP_ISSUED -#endif -} mddi_rev_link_state_type; - -typedef enum { - MDDI_LINK_DISABLED, - MDDI_LINK_HIBERNATING, - MDDI_LINK_ACTIVATING, - MDDI_LINK_ACTIVE -} mddi_host_link_state_type; - -typedef struct { - uint32 count; - uint32 in_count; - uint32 disp_req_count; - uint32 state_change_count; - uint32 ll_done_count; - uint32 rev_avail_count; - uint32 error_count; - uint32 rev_encap_count; - uint32 llist_ptr_write_1; - uint32 llist_ptr_write_2; -} mddi_host_int_type; - -typedef struct { - uint32 fwd_crc_count; - uint32 rev_crc_count; - uint32 pri_underflow; - uint32 sec_underflow; - uint32 rev_overflow; - uint32 pri_overwrite; - uint32 sec_overwrite; - uint32 rev_overwrite; - uint32 dma_failure; - uint32 rtd_failure; - uint32 reg_read_failure; -#ifdef FEATURE_MDDI_UNDERRUN_RECOVERY - uint32 pri_underrun_detected; -#endif -} mddi_host_stat_type; - -typedef struct { - uint32 rtd_cnt; - uint32 rev_enc_cnt; - uint32 vid_cnt; - uint32 reg_acc_cnt; - uint32 cli_stat_cnt; - uint32 cli_cap_cnt; - uint32 reg_read_cnt; - uint32 link_active_cnt; - uint32 link_hibernate_cnt; - uint32 vsync_response_cnt; - uint32 fwd_crc_cnt; - uint32 rev_crc_cnt; -} mddi_log_params_struct_type; - -typedef struct { - uint32 rtd_value; - uint32 rtd_counter; - uint32 client_status_cnt; - boolean rev_ptr_written; - uint8 *rev_ptr_start; - uint8 *rev_ptr_curr; - uint32 mddi_rev_ptr_write_val; - dma_addr_t rev_data_dma_addr; - uint16 rev_pkt_size; - mddi_rev_link_state_type rev_state; - mddi_host_link_state_type link_state; - mddi_host_driver_state_type driver_state; - boolean disable_hibernation; - uint32 saved_int_reg; - uint32 saved_int_en; - mddi_linked_list_type *llist_ptr; - dma_addr_t llist_dma_addr; - mddi_linked_list_type *llist_dma_ptr; - uint32 *rev_data_buf; - struct completion mddi_llist_avail_comp; - boolean mddi_waiting_for_llist_avail; - mddi_host_int_type int_type; - mddi_host_stat_type stats; - mddi_log_params_struct_type log_parms; - mddi_llist_info_type llist_info; - mddi_linked_list_notify_type llist_notify[MDDI_MAX_NUM_LLIST_ITEMS]; -} mddi_host_cntl_type; - -static mddi_host_type mddi_curr_host = MDDI_HOST_PRIM; -static mddi_host_cntl_type mhctl[MDDI_NUM_HOST_CORES]; -mddi_linked_list_type *llist_extern[MDDI_NUM_HOST_CORES]; -mddi_linked_list_type *llist_dma_extern[MDDI_NUM_HOST_CORES]; -mddi_linked_list_notify_type *llist_extern_notify[MDDI_NUM_HOST_CORES]; -static mddi_log_params_struct_type prev_parms[MDDI_NUM_HOST_CORES]; - -extern uint32 mdp_total_vdopkts; - -static boolean mddi_host_io_clock_on = FALSE; -static boolean mddi_host_hclk_on = FALSE; - -int int_mddi_pri_flag = FALSE; -int int_mddi_ext_flag = FALSE; - -static void mddi_report_errors(uint32 int_reg) -{ - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if (int_reg & MDDI_INT_PRI_UNDERFLOW) { - pmhctl->stats.pri_underflow++; - MDDI_MSG_ERR("!!! MDDI Primary Underflow !!!\n"); - } - if (int_reg & MDDI_INT_SEC_UNDERFLOW) { - pmhctl->stats.sec_underflow++; - MDDI_MSG_ERR("!!! MDDI Secondary Underflow !!!\n"); - } -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (int_reg & MDDI_INT_REV_OVERFLOW) { - pmhctl->stats.rev_overflow++; - MDDI_MSG_ERR("!!! MDDI Reverse Overflow !!!\n"); - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - mddi_host_reg_out(REV_PTR, pmhctl->mddi_rev_ptr_write_val); - - } - if (int_reg & MDDI_INT_CRC_ERROR) - MDDI_MSG_ERR("!!! MDDI Reverse CRC Error !!!\n"); -#endif - if (int_reg & MDDI_INT_PRI_OVERWRITE) { - pmhctl->stats.pri_overwrite++; - MDDI_MSG_ERR("!!! MDDI Primary Overwrite !!!\n"); - } - if (int_reg & MDDI_INT_SEC_OVERWRITE) { - pmhctl->stats.sec_overwrite++; - MDDI_MSG_ERR("!!! MDDI Secondary Overwrite !!!\n"); - } -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (int_reg & MDDI_INT_REV_OVERWRITE) { - pmhctl->stats.rev_overwrite++; - /* This will show up normally and is not a problem */ - MDDI_MSG_DEBUG("MDDI Reverse Overwrite!\n"); - } - if (int_reg & MDDI_INT_RTD_FAILURE) { - mddi_host_reg_outm(INTEN, MDDI_INT_RTD_FAILURE, 0); - pmhctl->stats.rtd_failure++; - MDDI_MSG_ERR("!!! MDDI RTD Failure !!!\n"); - } -#endif - if (int_reg & MDDI_INT_DMA_FAILURE) { - pmhctl->stats.dma_failure++; - MDDI_MSG_ERR("!!! MDDI DMA Abort !!!\n"); - } -} - -static void mddi_host_enable_io_clock(void) -{ - if (!MDDI_HOST_IS_IO_CLOCK_ON) - MDDI_HOST_ENABLE_IO_CLOCK; -} - -static void mddi_host_enable_hclk(void) -{ - - if (!MDDI_HOST_IS_HCLK_ON) - MDDI_HOST_ENABLE_HCLK; -} - -static void mddi_host_disable_io_clock(void) -{ -#ifndef FEATURE_MDDI_HOST_IO_CLOCK_CONTROL_DISABLE - if (MDDI_HOST_IS_IO_CLOCK_ON) - MDDI_HOST_DISABLE_IO_CLOCK; -#endif -} - -static void mddi_host_disable_hclk(void) -{ -#ifndef FEATURE_MDDI_HOST_HCLK_CONTROL_DISABLE - if (MDDI_HOST_IS_HCLK_ON) - MDDI_HOST_DISABLE_HCLK; -#endif -} - -static void mddi_vote_to_sleep(mddi_host_type host_idx, boolean sleep) -{ - uint16 vote_mask; - - if (host_idx == MDDI_HOST_PRIM) - vote_mask = 0x01; - else - vote_mask = 0x02; -} - -static void mddi_report_state_change(uint32 int_reg) -{ - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if ((pmhctl->saved_int_reg & MDDI_INT_IN_HIBERNATION) && - (pmhctl->saved_int_reg & MDDI_INT_LINK_ACTIVE)) { - /* recover from condition where the io_clock was turned off by the - clock driver during a transition to hibernation. The io_clock - disable is to prevent MDP/MDDI underruns when changing ARM - clock speeds. In the process of halting the ARM, the hclk - divider needs to be set to 1. When it is set to 1, there is - a small time (usecs) when hclk is off or slow, and this can - cause an underrun. To prevent the underrun, clock driver turns - off the MDDI io_clock before making the change. */ - mddi_host_reg_out(CMD, MDDI_CMD_POWERUP); - } - - if (int_reg & MDDI_INT_LINK_ACTIVE) { - pmhctl->link_state = MDDI_LINK_ACTIVE; - pmhctl->log_parms.link_active_cnt++; - pmhctl->rtd_value = mddi_host_reg_in(RTD_VAL); - MDDI_MSG_DEBUG("!!! MDDI Active RTD:0x%x!!!\n", - pmhctl->rtd_value); - /* now interrupt on hibernation */ - mddi_host_reg_outm(INTEN, - (MDDI_INT_IN_HIBERNATION | - MDDI_INT_LINK_ACTIVE), - MDDI_INT_IN_HIBERNATION); - -#ifdef DEBUG_MDDIHOSTI - /* if gpio interrupt is enabled, start polling at fastest - * registered rate - */ - if (mddi_gpio.polling_enabled) { - timer_reg(&mddi_gpio_poll_timer, - mddi_gpio_poll_timer_cb, 0, mddi_gpio.polling_interval, 0); - } -#endif -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (mddi_rev_ptr_workaround) { - /* HW CR: need to reset reverse register stuff */ - pmhctl->rev_ptr_written = FALSE; - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - } -#endif - /* vote on sleep */ - mddi_vote_to_sleep(host_idx, FALSE); - - if (host_idx == MDDI_HOST_PRIM) { - if (mddi_vsync_detect_enabled) { - /* - * Indicate to client specific code that vsync - * was enabled, but we did not detect a client - * intiated wakeup. The client specific - * handler can either reassert vsync detection, - * or treat this as a valid vsync. - */ - mddi_client_lcd_vsync_detected(FALSE); - pmhctl->log_parms.vsync_response_cnt++; - } - } - } - if (int_reg & MDDI_INT_IN_HIBERNATION) { - pmhctl->link_state = MDDI_LINK_HIBERNATING; - pmhctl->log_parms.link_hibernate_cnt++; - MDDI_MSG_DEBUG("!!! MDDI Hibernating !!!\n"); - /* now interrupt on link_active */ -#ifdef FEATURE_MDDI_DISABLE_REVERSE - mddi_host_reg_outm(INTEN, - (MDDI_INT_MDDI_IN | - MDDI_INT_IN_HIBERNATION | - MDDI_INT_LINK_ACTIVE), - MDDI_INT_LINK_ACTIVE); -#else - mddi_host_reg_outm(INTEN, - (MDDI_INT_MDDI_IN | - MDDI_INT_IN_HIBERNATION | - MDDI_INT_LINK_ACTIVE), - (MDDI_INT_MDDI_IN | MDDI_INT_LINK_ACTIVE)); - - pmhctl->rtd_counter = mddi_rtd_frequency; - - if (pmhctl->rev_state != MDDI_REV_IDLE) { - /* a rev_encap will not wake up the link, so we do that here */ - pmhctl->link_state = MDDI_LINK_ACTIVATING; - mddi_host_reg_out(CMD, MDDI_CMD_LINK_ACTIVE); - } -#endif - - if (pmhctl->disable_hibernation) { - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE); - mddi_host_reg_out(CMD, MDDI_CMD_LINK_ACTIVE); - pmhctl->link_state = MDDI_LINK_ACTIVATING; - } -#ifdef FEATURE_MDDI_UNDERRUN_RECOVERY - if ((pmhctl->llist_info.transmitting_start_idx != - UNASSIGNED_INDEX) - && - ((pmhctl-> - saved_int_reg & (MDDI_INT_PRI_LINK_LIST_DONE | - MDDI_INT_PRI_PTR_READ)) == - MDDI_INT_PRI_PTR_READ)) { - mddi_linked_list_type *llist_dma; - llist_dma = pmhctl->llist_dma_ptr; - /* - * All indications are that we have not received a - * linked list done interrupt, due to an underrun - * condition. Recovery attempt is to send again. - */ - dma_coherent_pre_ops(); - /* Write to primary pointer register again */ - mddi_host_reg_out(PRI_PTR, - &llist_dma[pmhctl->llist_info. - transmitting_start_idx]); - pmhctl->stats.pri_underrun_detected++; - } -#endif - - /* vote on sleep */ - if (pmhctl->link_state == MDDI_LINK_HIBERNATING) { - mddi_vote_to_sleep(host_idx, TRUE); - } - -#ifdef DEBUG_MDDIHOSTI - /* need to stop polling timer */ - if (mddi_gpio.polling_enabled) { - (void) timer_clr(&mddi_gpio_poll_timer, T_NONE); - } -#endif - } -} - -void mddi_host_timer_service(unsigned long data) -{ -#ifndef FEATURE_MDDI_DISABLE_REVERSE - unsigned long flags; -#endif - mddi_host_type host_idx; - mddi_host_cntl_type *pmhctl; - - unsigned long time_ms = MDDI_DEFAULT_TIMER_LENGTH; - init_timer(&mddi_host_timer); - mddi_host_timer.function = mddi_host_timer_service; - mddi_host_timer.data = 0; - - mddi_host_timer.expires = jiffies + ((time_ms * HZ) / 1000); - add_timer(&mddi_host_timer); - - for (host_idx = MDDI_HOST_PRIM; host_idx < MDDI_NUM_HOST_CORES; - host_idx++) { - pmhctl = &(mhctl[host_idx]); - mddi_log_stats_counter += (uint32) time_ms; -#ifndef FEATURE_MDDI_DISABLE_REVERSE - pmhctl->rtd_counter += (uint32) time_ms; - pmhctl->client_status_cnt += (uint32) time_ms; - - if (host_idx == MDDI_HOST_PRIM) { - if (pmhctl->client_status_cnt >= - mddi_client_status_frequency) { - if ((pmhctl->link_state == - MDDI_LINK_HIBERNATING) - && (pmhctl->client_status_cnt > - mddi_client_status_frequency)) { - /* - * special case where we are hibernating - * and mddi_host_isr is not firing, so - * kick the link so that the status can - * be retrieved - */ - - /* need to wake up link before issuing - * rev encap command - */ - MDDI_MSG_INFO("wake up link!\n"); - spin_lock_irqsave(&mddi_host_spin_lock, - flags); - mddi_host_enable_hclk(); - mddi_host_enable_io_clock(); - pmhctl->link_state = - MDDI_LINK_ACTIVATING; - mddi_host_reg_out(CMD, - MDDI_CMD_LINK_ACTIVE); - spin_unlock_irqrestore - (&mddi_host_spin_lock, flags); - } else - if ((pmhctl->link_state == MDDI_LINK_ACTIVE) - && pmhctl->disable_hibernation) { - /* - * special case where we have disabled - * hibernation and mddi_host_isr - * is not firing, so enable interrupt - * for no pkts pending, which will - * generate an interrupt - */ - MDDI_MSG_INFO("kick isr!\n"); - spin_lock_irqsave(&mddi_host_spin_lock, - flags); - mddi_host_enable_hclk(); - mddi_host_reg_outm(INTEN, - MDDI_INT_NO_CMD_PKTS_PEND, - MDDI_INT_NO_CMD_PKTS_PEND); - spin_unlock_irqrestore - (&mddi_host_spin_lock, flags); - } - } - } -#endif /* #ifndef FEATURE_MDDI_DISABLE_REVERSE */ - } - - /* Check if logging is turned on */ - for (host_idx = MDDI_HOST_PRIM; host_idx < MDDI_NUM_HOST_CORES; - host_idx++) { - mddi_log_params_struct_type *prev_ptr = &(prev_parms[host_idx]); - pmhctl = &(mhctl[host_idx]); - - if (mddi_debug_log_statistics) { - - /* get video pkt count from MDP, since MDDI sw cannot know this */ - pmhctl->log_parms.vid_cnt = mdp_total_vdopkts; - - if (mddi_log_stats_counter >= mddi_log_stats_frequency) { - /* mddi_log_stats_counter = 0; */ - if (mddi_debug_log_statistics) { - MDDI_MSG_NOTICE - ("MDDI Statistics since last report:\n"); - MDDI_MSG_NOTICE(" Packets sent:\n"); - MDDI_MSG_NOTICE - (" %d RTD packet(s)\n", - pmhctl->log_parms.rtd_cnt - - prev_ptr->rtd_cnt); - if (prev_ptr->rtd_cnt != - pmhctl->log_parms.rtd_cnt) { - unsigned long flags; - spin_lock_irqsave - (&mddi_host_spin_lock, - flags); - mddi_host_enable_hclk(); - pmhctl->rtd_value = - mddi_host_reg_in(RTD_VAL); - spin_unlock_irqrestore - (&mddi_host_spin_lock, - flags); - MDDI_MSG_NOTICE - (" RTD value=%d\n", - pmhctl->rtd_value); - } - MDDI_MSG_NOTICE - (" %d VIDEO packets\n", - pmhctl->log_parms.vid_cnt - - prev_ptr->vid_cnt); - MDDI_MSG_NOTICE - (" %d Register Access packets\n", - pmhctl->log_parms.reg_acc_cnt - - prev_ptr->reg_acc_cnt); - MDDI_MSG_NOTICE - (" %d Reverse Encapsulation packet(s)\n", - pmhctl->log_parms.rev_enc_cnt - - prev_ptr->rev_enc_cnt); - if (prev_ptr->rev_enc_cnt != - pmhctl->log_parms.rev_enc_cnt) { - /* report # of reverse CRC errors */ - MDDI_MSG_NOTICE - (" %d reverse CRC errors detected\n", - pmhctl->log_parms. - rev_crc_cnt - - prev_ptr->rev_crc_cnt); - } - MDDI_MSG_NOTICE - (" Packets received:\n"); - MDDI_MSG_NOTICE - (" %d Client Status packets", - pmhctl->log_parms.cli_stat_cnt - - prev_ptr->cli_stat_cnt); - if (prev_ptr->cli_stat_cnt != - pmhctl->log_parms.cli_stat_cnt) { - MDDI_MSG_NOTICE - (" %d forward CRC errors reported\n", - pmhctl->log_parms. - fwd_crc_cnt - - prev_ptr->fwd_crc_cnt); - } - MDDI_MSG_NOTICE - (" %d Register Access Read packets\n", - pmhctl->log_parms.reg_read_cnt - - prev_ptr->reg_read_cnt); - - if (pmhctl->link_state == - MDDI_LINK_ACTIVE) { - MDDI_MSG_NOTICE - (" Current Link Status: Active\n"); - } else - if ((pmhctl->link_state == - MDDI_LINK_HIBERNATING) - || (pmhctl->link_state == - MDDI_LINK_ACTIVATING)) { - MDDI_MSG_NOTICE - (" Current Link Status: Hibernation\n"); - } else { - MDDI_MSG_NOTICE - (" Current Link Status: Inactive\n"); - } - MDDI_MSG_NOTICE - (" Active state entered %d times\n", - pmhctl->log_parms.link_active_cnt - - prev_ptr->link_active_cnt); - MDDI_MSG_NOTICE - (" Hibernation state entered %d times\n", - pmhctl->log_parms. - link_hibernate_cnt - - prev_ptr->link_hibernate_cnt); - } - } - prev_parms[host_idx] = pmhctl->log_parms; - } - } - if (mddi_log_stats_counter >= mddi_log_stats_frequency) - mddi_log_stats_counter = 0; - - return; -} /* mddi_host_timer_cb */ - -static void mddi_process_link_list_done(void) -{ - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - /* normal forward linked list packet(s) were sent */ - if (pmhctl->llist_info.transmitting_start_idx == UNASSIGNED_INDEX) { - MDDI_MSG_ERR("**** getting LL done, but no list ****\n"); - } else { - uint16 idx; - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (pmhctl->rev_state == MDDI_REV_REG_READ_ISSUED) { - /* special case where a register read packet was sent */ - pmhctl->rev_state = MDDI_REV_REG_READ_SENT; - if (pmhctl->llist_info.reg_read_idx == UNASSIGNED_INDEX) { - MDDI_MSG_ERR - ("**** getting LL done, but no list ****\n"); - } - } -#endif - for (idx = pmhctl->llist_info.transmitting_start_idx;;) { - uint16 next_idx = pmhctl->llist_notify[idx].next_idx; - /* with reg read we don't release the waiting tcb until after - * the reverse encapsulation has completed. - */ - if (idx != pmhctl->llist_info.reg_read_idx) { - /* notify task that may be waiting on this completion */ - if (pmhctl->llist_notify[idx].waiting) { - complete(& - (pmhctl->llist_notify[idx]. - done_comp)); - } - if (pmhctl->llist_notify[idx].done_cb != NULL) { - (*(pmhctl->llist_notify[idx].done_cb)) - (); - } - - pmhctl->llist_notify[idx].in_use = FALSE; - pmhctl->llist_notify[idx].waiting = FALSE; - pmhctl->llist_notify[idx].done_cb = NULL; - if (idx < MDDI_NUM_DYNAMIC_LLIST_ITEMS) { - /* static LLIST items are configured only once */ - pmhctl->llist_notify[idx].next_idx = - UNASSIGNED_INDEX; - } - /* - * currently, all linked list packets are - * register access, so we can increment the - * counter for that packet type here. - */ - pmhctl->log_parms.reg_acc_cnt++; - } - if (idx == pmhctl->llist_info.transmitting_end_idx) - break; - idx = next_idx; - if (idx == UNASSIGNED_INDEX) - MDDI_MSG_CRIT("MDDI linked list corruption!\n"); - } - - pmhctl->llist_info.transmitting_start_idx = UNASSIGNED_INDEX; - pmhctl->llist_info.transmitting_end_idx = UNASSIGNED_INDEX; - - if (pmhctl->mddi_waiting_for_llist_avail) { - if (! - (pmhctl-> - llist_notify[pmhctl->llist_info.next_free_idx]. - in_use)) { - pmhctl->mddi_waiting_for_llist_avail = FALSE; - complete(&(pmhctl->mddi_llist_avail_comp)); - } - } - } - - /* Turn off MDDI_INT_PRI_LINK_LIST_DONE interrupt */ - mddi_host_reg_outm(INTEN, MDDI_INT_PRI_LINK_LIST_DONE, 0); - -} - -static void mddi_queue_forward_linked_list(void) -{ - uint16 first_pkt_index; - mddi_linked_list_type *llist_dma; - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - llist_dma = pmhctl->llist_dma_ptr; - - first_pkt_index = UNASSIGNED_INDEX; - - if (pmhctl->llist_info.transmitting_start_idx == UNASSIGNED_INDEX) { -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (pmhctl->llist_info.reg_read_waiting) { - if (pmhctl->rev_state == MDDI_REV_IDLE) { - /* - * we have a register read to send and - * can send it now - */ - pmhctl->rev_state = MDDI_REV_REG_READ_ISSUED; - mddi_reg_read_retry = 0; - first_pkt_index = - pmhctl->llist_info.waiting_start_idx; - pmhctl->llist_info.reg_read_waiting = FALSE; - } - } else -#endif - { - /* - * not register read to worry about, go ahead and write - * anything that may be on the waiting list. - */ - first_pkt_index = pmhctl->llist_info.waiting_start_idx; - } - } - - if (first_pkt_index != UNASSIGNED_INDEX) { - pmhctl->llist_info.transmitting_start_idx = - pmhctl->llist_info.waiting_start_idx; - pmhctl->llist_info.transmitting_end_idx = - pmhctl->llist_info.waiting_end_idx; - pmhctl->llist_info.waiting_start_idx = UNASSIGNED_INDEX; - pmhctl->llist_info.waiting_end_idx = UNASSIGNED_INDEX; - - /* write to the primary pointer register */ - MDDI_MSG_DEBUG("MDDI writing primary ptr with idx=%d\n", - first_pkt_index); - - pmhctl->int_type.llist_ptr_write_2++; - - dma_coherent_pre_ops(); - mddi_host_reg_out(PRI_PTR, &llist_dma[first_pkt_index]); - - /* enable interrupt when complete */ - mddi_host_reg_outm(INTEN, MDDI_INT_PRI_LINK_LIST_DONE, - MDDI_INT_PRI_LINK_LIST_DONE); - - } - -} - -#ifndef FEATURE_MDDI_DISABLE_REVERSE -static void mddi_read_rev_packet(byte *data_ptr) -{ - uint16 i, length; - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - uint8 *rev_ptr_overflow = - (pmhctl->rev_ptr_start + MDDI_REV_BUFFER_SIZE); - - /* first determine the length and handle invalid lengths */ - length = *pmhctl->rev_ptr_curr++; - if (pmhctl->rev_ptr_curr >= rev_ptr_overflow) - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - length |= ((*pmhctl->rev_ptr_curr++) << 8); - if (pmhctl->rev_ptr_curr >= rev_ptr_overflow) - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - if (length > (pmhctl->rev_pkt_size - 2)) { - MDDI_MSG_ERR("Invalid rev pkt length %d\n", length); - /* rev_pkt_size should always be <= rev_ptr_size so limit to packet size */ - length = pmhctl->rev_pkt_size - 2; - } - - /* If the data pointer is NULL, just increment the pmhctl->rev_ptr_curr. - * Loop around if necessary. Don't bother reading the data. - */ - if (data_ptr == NULL) { - pmhctl->rev_ptr_curr += length; - if (pmhctl->rev_ptr_curr >= rev_ptr_overflow) - pmhctl->rev_ptr_curr -= MDDI_REV_BUFFER_SIZE; - return; - } - - data_ptr[0] = length & 0x0ff; - data_ptr[1] = length >> 8; - data_ptr += 2; - /* copy the data to data_ptr byte-at-a-time */ - for (i = 0; (i < length) && (pmhctl->rev_ptr_curr < rev_ptr_overflow); - i++) - *data_ptr++ = *pmhctl->rev_ptr_curr++; - if (pmhctl->rev_ptr_curr >= rev_ptr_overflow) - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - for (; (i < length) && (pmhctl->rev_ptr_curr < rev_ptr_overflow); i++) - *data_ptr++ = *pmhctl->rev_ptr_curr++; -} - -static void mddi_process_rev_packets(void) -{ - uint32 rev_packet_count; - word i; - uint32 crc_errors; - boolean mddi_reg_read_successful = FALSE; - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - pmhctl->log_parms.rev_enc_cnt++; - if ((pmhctl->rev_state != MDDI_REV_ENCAP_ISSUED) && - (pmhctl->rev_state != MDDI_REV_STATUS_REQ_ISSUED) && - (pmhctl->rev_state != MDDI_REV_CLIENT_CAP_ISSUED)) { - MDDI_MSG_ERR("Wrong state %d for reverse int\n", - pmhctl->rev_state); - } - /* Turn off MDDI_INT_REV_AVAIL interrupt */ - mddi_host_reg_outm(INTEN, MDDI_INT_REV_DATA_AVAIL, 0); - - /* Clear rev data avail int */ - mddi_host_reg_out(INT, MDDI_INT_REV_DATA_AVAIL); - - /* Get Number of packets */ - rev_packet_count = mddi_host_reg_in(REV_PKT_CNT); - -#ifndef T_MSM7500 - /* Clear out rev packet counter */ - mddi_host_reg_out(REV_PKT_CNT, 0x0000); -#endif - -#if defined(CONFIG_FB_MSM_MDP31) || defined(CONFIG_FB_MSM_MDP40) - if ((pmhctl->rev_state == MDDI_REV_CLIENT_CAP_ISSUED) && - (rev_packet_count > 0) && - (mddi_host_core_version == 0x28 || - mddi_host_core_version == 0x30)) { - - uint32 int_reg; - uint32 max_count = 0; - - mddi_host_reg_out(REV_PTR, pmhctl->mddi_rev_ptr_write_val); - int_reg = mddi_host_reg_in(INT); - while ((int_reg & 0x100000) == 0) { - udelay(3); - int_reg = mddi_host_reg_in(INT); - if (++max_count > 100) - break; - } - } -#endif - - /* Get CRC error count */ - crc_errors = mddi_host_reg_in(REV_CRC_ERR); - if (crc_errors != 0) { - pmhctl->log_parms.rev_crc_cnt += crc_errors; - pmhctl->stats.rev_crc_count += crc_errors; - MDDI_MSG_ERR("!!! MDDI %d Reverse CRC Error(s) !!!\n", - crc_errors); -#ifndef T_MSM7500 - /* Clear CRC error count */ - mddi_host_reg_out(REV_CRC_ERR, 0x0000); -#endif - /* also issue an RTD to attempt recovery */ - pmhctl->rtd_counter = mddi_rtd_frequency; - } - - pmhctl->rtd_value = mddi_host_reg_in(RTD_VAL); - - MDDI_MSG_DEBUG("MDDI rev pkt cnt=%d, ptr=0x%x, RTD:0x%x\n", - rev_packet_count, - pmhctl->rev_ptr_curr - pmhctl->rev_ptr_start, - pmhctl->rtd_value); - - if (rev_packet_count >= 1) { - mddi_invalidate_cache_lines((uint32 *) pmhctl->rev_ptr_start, - MDDI_REV_BUFFER_SIZE); - } - /* order the reads */ - dma_coherent_post_ops(); - for (i = 0; i < rev_packet_count; i++) { - mddi_rev_packet_type *rev_pkt_ptr; - - mddi_read_rev_packet(rev_packet_data); - - rev_pkt_ptr = (mddi_rev_packet_type *) rev_packet_data; - - if (rev_pkt_ptr->packet_length > pmhctl->rev_pkt_size) { - MDDI_MSG_ERR("!!!invalid packet size: %d\n", - rev_pkt_ptr->packet_length); - } - - MDDI_MSG_DEBUG("MDDI rev pkt 0x%x size 0x%x\n", - rev_pkt_ptr->packet_type, - rev_pkt_ptr->packet_length); - - /* Do whatever you want to do with the data based on the packet type */ - switch (rev_pkt_ptr->packet_type) { - case 66: /* Client Capability */ - { - mddi_client_capability_type - *client_capability_pkt_ptr; - - client_capability_pkt_ptr = - (mddi_client_capability_type *) - rev_packet_data; - MDDI_MSG_NOTICE - ("Client Capability: Week=%d, Year=%d\n", - client_capability_pkt_ptr-> - Week_of_Manufacture, - client_capability_pkt_ptr-> - Year_of_Manufacture); - memcpy((void *)&mddi_client_capability_pkt, - (void *)rev_packet_data, - sizeof(mddi_client_capability_type)); - pmhctl->log_parms.cli_cap_cnt++; - } - break; - - case 70: /* Display Status */ - { - mddi_client_status_type *client_status_pkt_ptr; - - client_status_pkt_ptr = - (mddi_client_status_type *) rev_packet_data; - if ((client_status_pkt_ptr->crc_error_count != - 0) - || (client_status_pkt_ptr-> - reverse_link_request != 0)) { - MDDI_MSG_ERR - ("Client Status: RevReq=%d, CrcErr=%d\n", - client_status_pkt_ptr-> - reverse_link_request, - client_status_pkt_ptr-> - crc_error_count); - } else { - MDDI_MSG_DEBUG - ("Client Status: RevReq=%d, CrcErr=%d\n", - client_status_pkt_ptr-> - reverse_link_request, - client_status_pkt_ptr-> - crc_error_count); - } - pmhctl->log_parms.fwd_crc_cnt += - client_status_pkt_ptr->crc_error_count; - pmhctl->stats.fwd_crc_count += - client_status_pkt_ptr->crc_error_count; - pmhctl->log_parms.cli_stat_cnt++; - } - break; - - case 146: /* register access packet */ - { - mddi_register_access_packet_type - * regacc_pkt_ptr; - - regacc_pkt_ptr = - (mddi_register_access_packet_type *) - rev_packet_data; - - MDDI_MSG_DEBUG - ("Reg Acc parse reg=0x%x, value=0x%x\n", - regacc_pkt_ptr->register_address, - regacc_pkt_ptr->register_data_list); - - /* Copy register value to location passed in */ - if (mddi_reg_read_value_ptr) { -#if defined(T_MSM6280) && !defined(T_MSM7200) - /* only least significant 16 bits are valid with 6280 */ - *mddi_reg_read_value_ptr = - regacc_pkt_ptr-> - register_data_list & 0x0000ffff; -#else - *mddi_reg_read_value_ptr = - regacc_pkt_ptr->register_data_list; -#endif - mddi_reg_read_successful = TRUE; - mddi_reg_read_value_ptr = NULL; - } - -#ifdef DEBUG_MDDIHOSTI - if ((mddi_gpio.polling_enabled) && - (regacc_pkt_ptr->register_address == - mddi_gpio.polling_reg)) { - /* - * ToDo: need to call Linux GPIO call - * here... - */ - mddi_client_lcd_gpio_poll( - regacc_pkt_ptr->register_data_list); - } -#endif - pmhctl->log_parms.reg_read_cnt++; - } - break; - - default: /* any other packet */ - { - uint16 hdlr; - - for (hdlr = 0; hdlr < MAX_MDDI_REV_HANDLERS; - hdlr++) { - if (mddi_rev_pkt_handler[hdlr]. - pkt_type == - rev_pkt_ptr->packet_type) { - (* - (mddi_rev_pkt_handler[hdlr]. - handler)) (rev_pkt_ptr); - /* pmhctl->rev_state = MDDI_REV_IDLE; */ - break; - } - } - if (hdlr >= MAX_MDDI_REV_HANDLERS) - MDDI_MSG_ERR("MDDI unknown rev pkt\n"); - } - break; - } - } - if ((pmhctl->rev_ptr_curr + pmhctl->rev_pkt_size) >= - (pmhctl->rev_ptr_start + MDDI_REV_BUFFER_SIZE)) { - pmhctl->rev_ptr_written = FALSE; - } - - if (pmhctl->rev_state == MDDI_REV_ENCAP_ISSUED) { - pmhctl->rev_state = MDDI_REV_IDLE; - if (mddi_rev_user.waiting) { - mddi_rev_user.waiting = FALSE; - complete(&(mddi_rev_user.done_comp)); - } else if (pmhctl->llist_info.reg_read_idx == UNASSIGNED_INDEX) { - MDDI_MSG_ERR - ("Reverse Encap state, but no reg read in progress\n"); - } else { - if ((!mddi_reg_read_successful) && - (mddi_reg_read_retry < mddi_reg_read_retry_max) && - (mddi_enable_reg_read_retry)) { - /* - * There is a race condition that can happen - * where the reverse encapsulation message is - * sent out by the MDDI host before the register - * read packet is sent. As a work-around for - * that problem we issue the reverse - * encapsulation one more time before giving up. - */ - if (mddi_enable_reg_read_retry_once) - mddi_reg_read_retry = - mddi_reg_read_retry_max; - pmhctl->rev_state = MDDI_REV_REG_READ_SENT; - pmhctl->stats.reg_read_failure++; - } else { - uint16 reg_read_idx = - pmhctl->llist_info.reg_read_idx; - - mddi_reg_read_retry = 0; - if (pmhctl->llist_notify[reg_read_idx].waiting) { - complete(& - (pmhctl-> - llist_notify[reg_read_idx]. - done_comp)); - } - pmhctl->llist_info.reg_read_idx = - UNASSIGNED_INDEX; - if (pmhctl->llist_notify[reg_read_idx]. - done_cb != NULL) { - (* - (pmhctl->llist_notify[reg_read_idx]. - done_cb)) (); - } - pmhctl->llist_notify[reg_read_idx].next_idx = - UNASSIGNED_INDEX; - pmhctl->llist_notify[reg_read_idx].in_use = - FALSE; - pmhctl->llist_notify[reg_read_idx].waiting = - FALSE; - pmhctl->llist_notify[reg_read_idx].done_cb = - NULL; - if (!mddi_reg_read_successful) - pmhctl->stats.reg_read_failure++; - } - } - } else if (pmhctl->rev_state == MDDI_REV_CLIENT_CAP_ISSUED) { -#if defined(CONFIG_FB_MSM_MDP31) || defined(CONFIG_FB_MSM_MDP40) - if (mddi_host_core_version == 0x28 || - mddi_host_core_version == 0x30) { - mddi_host_reg_out(FIFO_ALLOC, 0x00); - pmhctl->rev_ptr_written = TRUE; - mddi_host_reg_out(REV_PTR, - pmhctl->mddi_rev_ptr_write_val); - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; - mddi_host_reg_out(CMD, 0xC00); - } -#endif - - if (mddi_rev_user.waiting) { - mddi_rev_user.waiting = FALSE; - complete(&(mddi_rev_user.done_comp)); - } - pmhctl->rev_state = MDDI_REV_IDLE; - } else { - pmhctl->rev_state = MDDI_REV_IDLE; - } - - /* pmhctl->rev_state = MDDI_REV_IDLE; */ - - /* Re-enable interrupt */ - mddi_host_reg_outm(INTEN, MDDI_INT_REV_DATA_AVAIL, - MDDI_INT_REV_DATA_AVAIL); - -} - -static void mddi_issue_reverse_encapsulation(void) -{ - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - /* Only issue a reverse encapsulation packet if: - * 1) another reverse is not in progress (MDDI_REV_IDLE). - * 2) a register read has been sent (MDDI_REV_REG_READ_SENT). - * 3) forward is not in progress, because of a hw bug in client that - * causes forward crc errors on packet immediately after rev encap. - */ - if (((pmhctl->rev_state == MDDI_REV_IDLE) || - (pmhctl->rev_state == MDDI_REV_REG_READ_SENT)) && - (pmhctl->llist_info.transmitting_start_idx == UNASSIGNED_INDEX) && - (!mdp_in_processing)) { - uint32 mddi_command = MDDI_CMD_SEND_REV_ENCAP; - - if ((pmhctl->rev_state == MDDI_REV_REG_READ_SENT) || - (mddi_rev_encap_user_request == TRUE)) { - mddi_host_enable_io_clock(); - if (pmhctl->link_state == MDDI_LINK_HIBERNATING) { - /* need to wake up link before issuing rev encap command */ - MDDI_MSG_DEBUG("wake up link!\n"); - pmhctl->link_state = MDDI_LINK_ACTIVATING; - mddi_host_reg_out(CMD, MDDI_CMD_LINK_ACTIVE); - } else { - if (pmhctl->rtd_counter >= mddi_rtd_frequency) { - MDDI_MSG_DEBUG - ("mddi sending RTD command!\n"); - mddi_host_reg_out(CMD, - MDDI_CMD_SEND_RTD); - pmhctl->rtd_counter = 0; - pmhctl->log_parms.rtd_cnt++; - } - if (pmhctl->rev_state != MDDI_REV_REG_READ_SENT) { - /* this is generic reverse request by user, so - * reset the waiting flag. */ - mddi_rev_encap_user_request = FALSE; - } - /* link is active so send reverse encap to get register read results */ - pmhctl->rev_state = MDDI_REV_ENCAP_ISSUED; - mddi_command = MDDI_CMD_SEND_REV_ENCAP; - MDDI_MSG_DEBUG("sending rev encap!\n"); - } - } else - if ((pmhctl->client_status_cnt >= - mddi_client_status_frequency) - || mddi_client_capability_request) { - mddi_host_enable_io_clock(); - if (pmhctl->link_state == MDDI_LINK_HIBERNATING) { - /* only wake up the link if it client status is overdue */ - if ((pmhctl->client_status_cnt >= - (mddi_client_status_frequency * 2)) - || mddi_client_capability_request) { - /* need to wake up link before issuing rev encap command */ - MDDI_MSG_DEBUG("wake up link!\n"); - pmhctl->link_state = - MDDI_LINK_ACTIVATING; - mddi_host_reg_out(CMD, - MDDI_CMD_LINK_ACTIVE); - } - } else { - if (pmhctl->rtd_counter >= mddi_rtd_frequency) { - MDDI_MSG_DEBUG - ("mddi sending RTD command!\n"); - mddi_host_reg_out(CMD, - MDDI_CMD_SEND_RTD); - pmhctl->rtd_counter = 0; - pmhctl->log_parms.rtd_cnt++; - } - /* periodically get client status */ - MDDI_MSG_DEBUG - ("mddi sending rev enc! (get status)\n"); - if (mddi_client_capability_request) { - pmhctl->rev_state = - MDDI_REV_CLIENT_CAP_ISSUED; - mddi_command = MDDI_CMD_GET_CLIENT_CAP; - mddi_client_capability_request = FALSE; - } else { - pmhctl->rev_state = - MDDI_REV_STATUS_REQ_ISSUED; - pmhctl->client_status_cnt = 0; - mddi_command = - MDDI_CMD_GET_CLIENT_STATUS; - } - } - } - if ((pmhctl->rev_state == MDDI_REV_ENCAP_ISSUED) || - (pmhctl->rev_state == MDDI_REV_STATUS_REQ_ISSUED) || - (pmhctl->rev_state == MDDI_REV_CLIENT_CAP_ISSUED)) { - pmhctl->int_type.rev_encap_count++; -#if defined(T_MSM6280) && !defined(T_MSM7200) - mddi_rev_pointer_written = TRUE; - mddi_host_reg_out(REV_PTR, mddi_rev_ptr_write_val); - mddi_rev_ptr_curr = mddi_rev_ptr_start; - /* force new rev ptr command */ - mddi_host_reg_out(CMD, 0xC00); -#else - if (!pmhctl->rev_ptr_written) { - MDDI_MSG_DEBUG("writing reverse pointer!\n"); - pmhctl->rev_ptr_written = TRUE; -#if defined(CONFIG_FB_MSM_MDP31) || defined(CONFIG_FB_MSM_MDP40) - if ((pmhctl->rev_state == - MDDI_REV_CLIENT_CAP_ISSUED) && - (mddi_host_core_version == 0x28 || - mddi_host_core_version == 0x30)) { - pmhctl->rev_ptr_written = FALSE; - mddi_host_reg_out(FIFO_ALLOC, 0x02); - } else - mddi_host_reg_out(REV_PTR, - pmhctl-> - mddi_rev_ptr_write_val); -#else - mddi_host_reg_out(REV_PTR, - pmhctl-> - mddi_rev_ptr_write_val); -#endif - } -#endif - if (mddi_debug_clear_rev_data) { - uint16 i; - for (i = 0; i < MDDI_MAX_REV_DATA_SIZE / 4; i++) - pmhctl->rev_data_buf[i] = 0xdddddddd; - /* clean cache */ - mddi_flush_cache_lines(pmhctl->rev_data_buf, - MDDI_MAX_REV_DATA_SIZE); - } - - /* send reverse encapsulation to get needed data */ - mddi_host_reg_out(CMD, mddi_command); - } - } - -} - -static void mddi_process_client_initiated_wakeup(void) -{ - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - /* Disable MDDI_INT Interrupt, we detect client initiated wakeup one - * time for each entry into hibernation */ - mddi_host_reg_outm(INTEN, MDDI_INT_MDDI_IN, 0); - - if (host_idx == MDDI_HOST_PRIM) { - if (mddi_vsync_detect_enabled) { - mddi_host_enable_io_clock(); -#ifndef MDDI_HOST_DISP_LISTEN - /* issue command to bring up link */ - /* need to do this to clear the vsync condition */ - if (pmhctl->link_state == MDDI_LINK_HIBERNATING) { - pmhctl->link_state = MDDI_LINK_ACTIVATING; - mddi_host_reg_out(CMD, MDDI_CMD_LINK_ACTIVE); - } -#endif - /* - * Indicate to client specific code that vsync was - * enabled, and we did not detect a client initiated - * wakeup. The client specific handler can clear the - * condition if necessary to prevent subsequent - * client initiated wakeups. - */ - mddi_client_lcd_vsync_detected(TRUE); - pmhctl->log_parms.vsync_response_cnt++; - MDDI_MSG_NOTICE("MDDI_INT_IN condition\n"); - - } - } - - if (mddi_gpio.polling_enabled) { - mddi_host_enable_io_clock(); - /* check interrupt status now */ - (void)mddi_queue_register_read_int(mddi_gpio.polling_reg, - &mddi_gpio.polling_val); - } -} -#endif /* FEATURE_MDDI_DISABLE_REVERSE */ - -static void mddi_host_isr(void) -{ - uint32 int_reg, int_en; -#ifndef FEATURE_MDDI_DISABLE_REVERSE - uint32 status_reg; -#endif - mddi_host_type host_idx = mddi_curr_host; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if (!MDDI_HOST_IS_HCLK_ON) { - MDDI_HOST_ENABLE_HCLK; - MDDI_MSG_DEBUG("HCLK disabled, but isr is firing\n"); - } - int_reg = mddi_host_reg_in(INT); - int_en = mddi_host_reg_in(INTEN); - pmhctl->saved_int_reg = int_reg; - pmhctl->saved_int_en = int_en; - int_reg = int_reg & int_en; - pmhctl->int_type.count++; - - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - status_reg = mddi_host_reg_in(STAT); - - if ((int_reg & MDDI_INT_MDDI_IN) || - ((int_en & MDDI_INT_MDDI_IN) && - ((int_reg == 0) || (status_reg & MDDI_STAT_CLIENT_WAKEUP_REQ)))) { - /* - * The MDDI_IN condition will clear itself, and so it is - * possible that MDDI_IN was the reason for the isr firing, - * even though the interrupt register does not have the - * MDDI_IN bit set. To check if this was the case we need to - * look at the status register bit that signifies a client - * initiated wakeup. If the status register bit is set, as well - * as the MDDI_IN interrupt enabled, then we treat this as a - * client initiated wakeup. - */ - if (int_reg & MDDI_INT_MDDI_IN) - pmhctl->int_type.in_count++; - mddi_process_client_initiated_wakeup(); - } -#endif - - if (int_reg & MDDI_INT_LINK_STATE_CHANGES) { - pmhctl->int_type.state_change_count++; - mddi_report_state_change(int_reg); - } - - if (int_reg & MDDI_INT_PRI_LINK_LIST_DONE) { - pmhctl->int_type.ll_done_count++; - mddi_process_link_list_done(); - } -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (int_reg & MDDI_INT_REV_DATA_AVAIL) { - pmhctl->int_type.rev_avail_count++; - mddi_process_rev_packets(); - } -#endif - - if (int_reg & MDDI_INT_ERROR_CONDITIONS) { - pmhctl->int_type.error_count++; - mddi_report_errors(int_reg); - - mddi_host_reg_out(INT, int_reg & MDDI_INT_ERROR_CONDITIONS); - } -#ifndef FEATURE_MDDI_DISABLE_REVERSE - mddi_issue_reverse_encapsulation(); - - if ((pmhctl->rev_state != MDDI_REV_ENCAP_ISSUED) && - (pmhctl->rev_state != MDDI_REV_STATUS_REQ_ISSUED)) -#endif - /* don't want simultaneous reverse and forward with Eagle */ - mddi_queue_forward_linked_list(); - - if (int_reg & MDDI_INT_NO_CMD_PKTS_PEND) { - /* this interrupt is used to kick the isr when hibernation is disabled */ - mddi_host_reg_outm(INTEN, MDDI_INT_NO_CMD_PKTS_PEND, 0); - } - - if ((!mddi_host_mdp_active_flag) && - (!mddi_vsync_detect_enabled) && - (pmhctl->llist_info.transmitting_start_idx == UNASSIGNED_INDEX) && - (pmhctl->llist_info.waiting_start_idx == UNASSIGNED_INDEX) && - (pmhctl->rev_state == MDDI_REV_IDLE)) { - if (pmhctl->link_state == MDDI_LINK_HIBERNATING) { - mddi_host_disable_io_clock(); - mddi_host_disable_hclk(); - } -#ifdef FEATURE_MDDI_HOST_ENABLE_EARLY_HIBERNATION - else if ((pmhctl->link_state == MDDI_LINK_ACTIVE) && - (!pmhctl->disable_hibernation)) { - mddi_host_reg_out(CMD, MDDI_CMD_POWERDOWN); - } -#endif - } -} - -static void mddi_host_isr_primary(void) -{ - mddi_curr_host = MDDI_HOST_PRIM; - mddi_host_isr(); -} - -irqreturn_t mddi_pmdh_isr_proxy(int irq, void *ptr) -{ - mddi_host_isr_primary(); - return IRQ_HANDLED; -} - -static void mddi_host_isr_external(void) -{ - mddi_curr_host = MDDI_HOST_EXT; - mddi_host_isr(); - mddi_curr_host = MDDI_HOST_PRIM; -} - -irqreturn_t mddi_emdh_isr_proxy(int irq, void *ptr) -{ - mddi_host_isr_external(); - return IRQ_HANDLED; -} - -static void mddi_host_initialize_registers(mddi_host_type host_idx) -{ - uint32 pad_reg_val; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if (pmhctl->driver_state == MDDI_DRIVER_ENABLED) - return; - - /* turn on HCLK to MDDI host core */ - mddi_host_enable_hclk(); - - /* MDDI Reset command */ - mddi_host_reg_out(CMD, MDDI_CMD_RESET); - - /* Version register (= 0x01) */ - mddi_host_reg_out(VERSION, 0x0001); - - /* Bytes per subframe register */ - mddi_host_reg_out(BPS, MDDI_HOST_BYTES_PER_SUBFRAME); - - /* Subframes per media frames register (= 0x03) */ - mddi_host_reg_out(SPM, 0x0003); - - /* Turn Around 1 register (= 0x05) */ - mddi_host_reg_out(TA1_LEN, 0x0005); - - /* Turn Around 2 register (= 0x0C) */ - mddi_host_reg_out(TA2_LEN, MDDI_HOST_TA2_LEN); - - /* Drive hi register (= 0x96) */ - mddi_host_reg_out(DRIVE_HI, 0x0096); - - /* Drive lo register (= 0x32) */ - mddi_host_reg_out(DRIVE_LO, 0x0032); - - /* Display wakeup count register (= 0x3c) */ - mddi_host_reg_out(DISP_WAKE, 0x003c); - - /* Reverse Rate Divisor register (= 0x2) */ - mddi_host_reg_out(REV_RATE_DIV, MDDI_HOST_REV_RATE_DIV); - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - /* Reverse Pointer Size */ - mddi_host_reg_out(REV_SIZE, MDDI_REV_BUFFER_SIZE); - - /* Rev Encap Size */ - mddi_host_reg_out(REV_ENCAP_SZ, pmhctl->rev_pkt_size); -#endif - - /* Periodic Rev Encap */ - /* don't send periodically */ - mddi_host_reg_out(CMD, MDDI_CMD_PERIODIC_REV_ENCAP); - - pad_reg_val = mddi_host_reg_in(PAD_CTL); - if (pad_reg_val == 0) { - /* If we are turning on band gap, need to wait 5us before turning - * on the rest of the PAD */ - mddi_host_reg_out(PAD_CTL, 0x08000); - udelay(5); - } -#ifdef T_MSM7200 - /* Recommendation from PAD hw team */ - mddi_host_reg_out(PAD_CTL, 0xa850a); -#else - /* Recommendation from PAD hw team */ - mddi_host_reg_out(PAD_CTL, 0xa850f); -#endif - -#if defined(CONFIG_FB_MSM_MDP31) || defined(CONFIG_FB_MSM_MDP40) - mddi_host_reg_out(PAD_IO_CTL, 0x00320000); - mddi_host_reg_out(PAD_CAL, 0x00220020); -#endif - - mddi_host_core_version = mddi_host_reg_inm(CORE_VER, 0xffff); - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (mddi_host_core_version >= 8) - mddi_rev_ptr_workaround = FALSE; - pmhctl->rev_ptr_curr = pmhctl->rev_ptr_start; -#endif - - if ((mddi_host_core_version > 8) && (mddi_host_core_version < 0x19)) - mddi_host_reg_out(TEST, 0x2); - - /* Need an even number for counts */ - mddi_host_reg_out(DRIVER_START_CNT, 0x60006); - -#ifndef T_MSM7500 - /* Setup defaults for MDP related register */ - mddi_host_reg_out(MDP_VID_FMT_DES, 0x5666); - mddi_host_reg_out(MDP_VID_PIX_ATTR, 0x00C3); - mddi_host_reg_out(MDP_VID_CLIENTID, 0); -#endif - - /* automatically hibernate after 1 empty subframe */ - if (pmhctl->disable_hibernation) - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE); - else - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE | 1); - - /* Bring up link if display (client) requests it */ -#ifdef MDDI_HOST_DISP_LISTEN - mddi_host_reg_out(CMD, MDDI_CMD_DISP_LISTEN); -#else - mddi_host_reg_out(CMD, MDDI_CMD_DISP_IGNORE); -#endif - -} - -void mddi_host_configure_interrupts(mddi_host_type host_idx, boolean enable) -{ - unsigned long flags; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - spin_lock_irqsave(&mddi_host_spin_lock, flags); - - /* turn on HCLK to MDDI host core if it has been disabled */ - mddi_host_enable_hclk(); - /* Clear MDDI Interrupt enable reg */ - mddi_host_reg_out(INTEN, 0); - - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - if (enable) { - pmhctl->driver_state = MDDI_DRIVER_ENABLED; - - if (host_idx == MDDI_HOST_PRIM) { - if (request_irq - (INT_MDDI_PRI, mddi_pmdh_isr_proxy, IRQF_DISABLED, - "PMDH", 0) != 0) - printk(KERN_ERR - "a mddi: unable to request_irq\n"); - else - int_mddi_pri_flag = TRUE; - } else { - if (request_irq - (INT_MDDI_EXT, mddi_emdh_isr_proxy, IRQF_DISABLED, - "EMDH", 0) != 0) - printk(KERN_ERR - "b mddi: unable to request_irq\n"); - else - int_mddi_ext_flag = TRUE; - } - - /* Set MDDI Interrupt enable reg -- Enable Reverse data avail */ -#ifdef FEATURE_MDDI_DISABLE_REVERSE - mddi_host_reg_out(INTEN, - MDDI_INT_ERROR_CONDITIONS | - MDDI_INT_LINK_STATE_CHANGES); -#else - /* Reverse Pointer register */ - pmhctl->rev_ptr_written = FALSE; - - mddi_host_reg_out(INTEN, - MDDI_INT_REV_DATA_AVAIL | - MDDI_INT_ERROR_CONDITIONS | - MDDI_INT_LINK_STATE_CHANGES); - pmhctl->rtd_counter = mddi_rtd_frequency; - pmhctl->client_status_cnt = 0; -#endif - } else { - if (pmhctl->driver_state == MDDI_DRIVER_ENABLED) - pmhctl->driver_state = MDDI_DRIVER_DISABLED; - } - -} - -static void mddi_host_powerup(mddi_host_type host_idx) -{ - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if (pmhctl->link_state != MDDI_LINK_DISABLED) - return; - - /* enable IO_CLK and hclk to MDDI host core */ - mddi_host_enable_io_clock(); - - mddi_host_initialize_registers(host_idx); - mddi_host_configure_interrupts(host_idx, TRUE); - - pmhctl->link_state = MDDI_LINK_ACTIVATING; - - /* Link activate command */ - mddi_host_reg_out(CMD, MDDI_CMD_LINK_ACTIVE); - -#ifdef CLKRGM_MDDI_IO_CLOCK_IN_MHZ - MDDI_MSG_NOTICE("MDDI Host: Activating Link %d Mbps\n", - CLKRGM_MDDI_IO_CLOCK_IN_MHZ * 2); -#else - MDDI_MSG_NOTICE("MDDI Host: Activating Link\n"); -#endif - - /* Initialize the timer */ - if (host_idx == MDDI_HOST_PRIM) - mddi_host_timer_service(0); -} - -void mddi_host_init(mddi_host_type host_idx) -/* Write out the MDDI configuration registers */ -{ - static boolean initialized = FALSE; - mddi_host_cntl_type *pmhctl; - - if (host_idx >= MDDI_NUM_HOST_CORES) { - MDDI_MSG_ERR("Invalid host core index\n"); - return; - } - - if (!initialized) { - uint16 idx; - mddi_host_type host; - for (host = MDDI_HOST_PRIM; host < MDDI_NUM_HOST_CORES; host++) { - pmhctl = &(mhctl[host]); - initialized = TRUE; - - pmhctl->llist_ptr = - dma_alloc_coherent(NULL, MDDI_LLIST_POOL_SIZE, - &(pmhctl->llist_dma_addr), - GFP_KERNEL); - pmhctl->llist_dma_ptr = - (mddi_linked_list_type *) (void *)pmhctl-> - llist_dma_addr; -#ifdef FEATURE_MDDI_DISABLE_REVERSE - pmhctl->rev_data_buf = NULL; - if (pmhctl->llist_ptr == NULL) -#else - mddi_rev_user.waiting = FALSE; - init_completion(&(mddi_rev_user.done_comp)); - pmhctl->rev_data_buf = - dma_alloc_coherent(NULL, MDDI_MAX_REV_DATA_SIZE, - &(pmhctl->rev_data_dma_addr), - GFP_KERNEL); - if ((pmhctl->llist_ptr == NULL) - || (pmhctl->rev_data_buf == NULL)) -#endif - { - MDDI_MSG_CRIT - ("unable to alloc non-cached memory\n"); - } - llist_extern[host] = pmhctl->llist_ptr; - llist_dma_extern[host] = pmhctl->llist_dma_ptr; - llist_extern_notify[host] = pmhctl->llist_notify; - - for (idx = 0; idx < UNASSIGNED_INDEX; idx++) { - init_completion(& - (pmhctl->llist_notify[idx]. - done_comp)); - } - init_completion(&(pmhctl->mddi_llist_avail_comp)); - spin_lock_init(&mddi_host_spin_lock); - pmhctl->mddi_waiting_for_llist_avail = FALSE; - pmhctl->mddi_rev_ptr_write_val = - (uint32) (void *)(pmhctl->rev_data_dma_addr); - pmhctl->rev_ptr_start = (void *)pmhctl->rev_data_buf; - - pmhctl->rev_pkt_size = MDDI_DEFAULT_REV_PKT_SIZE; - pmhctl->rev_state = MDDI_REV_IDLE; -#ifdef IMAGE_MODEM_PROC - /* assume hibernation state is last state from APPS proc, so that - * we don't reinitialize the host core */ - pmhctl->link_state = MDDI_LINK_HIBERNATING; -#else - pmhctl->link_state = MDDI_LINK_DISABLED; -#endif - pmhctl->driver_state = MDDI_DRIVER_DISABLED; - pmhctl->disable_hibernation = FALSE; - - /* initialize llist variables */ - pmhctl->llist_info.transmitting_start_idx = - UNASSIGNED_INDEX; - pmhctl->llist_info.transmitting_end_idx = - UNASSIGNED_INDEX; - pmhctl->llist_info.waiting_start_idx = UNASSIGNED_INDEX; - pmhctl->llist_info.waiting_end_idx = UNASSIGNED_INDEX; - pmhctl->llist_info.reg_read_idx = UNASSIGNED_INDEX; - pmhctl->llist_info.next_free_idx = - MDDI_FIRST_DYNAMIC_LLIST_IDX; - pmhctl->llist_info.reg_read_waiting = FALSE; - - mddi_vsync_detect_enabled = FALSE; - mddi_gpio.polling_enabled = FALSE; - - pmhctl->int_type.count = 0; - pmhctl->int_type.in_count = 0; - pmhctl->int_type.disp_req_count = 0; - pmhctl->int_type.state_change_count = 0; - pmhctl->int_type.ll_done_count = 0; - pmhctl->int_type.rev_avail_count = 0; - pmhctl->int_type.error_count = 0; - pmhctl->int_type.rev_encap_count = 0; - pmhctl->int_type.llist_ptr_write_1 = 0; - pmhctl->int_type.llist_ptr_write_2 = 0; - - pmhctl->stats.fwd_crc_count = 0; - pmhctl->stats.rev_crc_count = 0; - pmhctl->stats.pri_underflow = 0; - pmhctl->stats.sec_underflow = 0; - pmhctl->stats.rev_overflow = 0; - pmhctl->stats.pri_overwrite = 0; - pmhctl->stats.sec_overwrite = 0; - pmhctl->stats.rev_overwrite = 0; - pmhctl->stats.dma_failure = 0; - pmhctl->stats.rtd_failure = 0; - pmhctl->stats.reg_read_failure = 0; -#ifdef FEATURE_MDDI_UNDERRUN_RECOVERY - pmhctl->stats.pri_underrun_detected = 0; -#endif - - pmhctl->log_parms.rtd_cnt = 0; - pmhctl->log_parms.rev_enc_cnt = 0; - pmhctl->log_parms.vid_cnt = 0; - pmhctl->log_parms.reg_acc_cnt = 0; - pmhctl->log_parms.cli_stat_cnt = 0; - pmhctl->log_parms.cli_cap_cnt = 0; - pmhctl->log_parms.reg_read_cnt = 0; - pmhctl->log_parms.link_active_cnt = 0; - pmhctl->log_parms.link_hibernate_cnt = 0; - pmhctl->log_parms.fwd_crc_cnt = 0; - pmhctl->log_parms.rev_crc_cnt = 0; - pmhctl->log_parms.vsync_response_cnt = 0; - - prev_parms[host_idx] = pmhctl->log_parms; - mddi_client_capability_pkt.packet_length = 0; - } - -#ifndef T_MSM7500 - /* tell clock driver we are user of this PLL */ - MDDI_HOST_ENABLE_IO_CLOCK; -#endif - } - - mddi_host_powerup(host_idx); - pmhctl = &(mhctl[host_idx]); -} - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT -static uint32 mddi_client_id; - -uint32 mddi_get_client_id(void) -{ - -#ifndef FEATURE_MDDI_DISABLE_REVERSE - mddi_host_type host_idx = MDDI_HOST_PRIM; - static boolean client_detection_try = FALSE; - mddi_host_cntl_type *pmhctl; - unsigned long flags; - uint16 saved_rev_pkt_size; - - if (!client_detection_try) { - /* Toshiba display requires larger drive_lo value */ - mddi_host_reg_out(DRIVE_LO, 0x0050); - - pmhctl = &(mhctl[MDDI_HOST_PRIM]); - - saved_rev_pkt_size = pmhctl->rev_pkt_size; - - /* Increase Rev Encap Size */ - pmhctl->rev_pkt_size = MDDI_CLIENT_CAPABILITY_REV_PKT_SIZE; - mddi_host_reg_out(REV_ENCAP_SZ, pmhctl->rev_pkt_size); - - /* disable hibernation temporarily */ - if (!pmhctl->disable_hibernation) - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE); - - mddi_rev_user.waiting = TRUE; - INIT_COMPLETION(mddi_rev_user.done_comp); - - spin_lock_irqsave(&mddi_host_spin_lock, flags); - - /* turn on clock(s), if they have been disabled */ - mddi_host_enable_hclk(); - mddi_host_enable_io_clock(); - - mddi_client_capability_request = TRUE; - - if (pmhctl->rev_state == MDDI_REV_IDLE) { - /* attempt to send the reverse encapsulation now */ - mddi_issue_reverse_encapsulation(); - } - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - wait_for_completion_killable(&(mddi_rev_user.done_comp)); - - /* Set Rev Encap Size back to its original value */ - pmhctl->rev_pkt_size = saved_rev_pkt_size; - mddi_host_reg_out(REV_ENCAP_SZ, pmhctl->rev_pkt_size); - - /* reenable auto-hibernate */ - if (!pmhctl->disable_hibernation) - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE | 1); - - mddi_host_reg_out(DRIVE_LO, 0x0032); - client_detection_try = TRUE; - - mddi_client_id = (mddi_client_capability_pkt.Mfr_Name<<16) | - mddi_client_capability_pkt.Product_Code; - - if (!mddi_client_id) - mddi_disable(1); - } - -#if 0 - switch (mddi_client_capability_pkt.Mfr_Name) { - case 0x4474: - if ((mddi_client_capability_pkt.Product_Code != 0x8960) && - (target == DISPLAY_1)) { - ret = PRISM_WVGA; - } - break; - - case 0xD263: - if (target == DISPLAY_1) - ret = TOSHIBA_VGA_PRIM; - else if (target == DISPLAY_2) - ret = TOSHIBA_QCIF_SECD; - break; - - case 0: - if (mddi_client_capability_pkt.Product_Code == 0x8835) { - if (target == DISPLAY_1) - ret = SHARP_QVGA_PRIM; - else if (target == DISPLAY_2) - ret = SHARP_128x128_SECD; - } - break; - - default: - break; - } - - if ((!client_detection_try) && (ret != TOSHIBA_VGA_PRIM) - && (ret != TOSHIBA_QCIF_SECD)) { - /* Not a Toshiba display, so change drive_lo back to default value */ - mddi_host_reg_out(DRIVE_LO, 0x0032); - } -#endif - -#endif - - return mddi_client_id; -} -#endif - -void mddi_host_powerdown(mddi_host_type host_idx) -{ - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if (host_idx >= MDDI_NUM_HOST_CORES) { - MDDI_MSG_ERR("Invalid host core index\n"); - return; - } - - if (pmhctl->driver_state == MDDI_DRIVER_RESET) { - return; - } - - if (host_idx == MDDI_HOST_PRIM) { - /* disable timer */ - del_timer(&mddi_host_timer); - } - - mddi_host_configure_interrupts(host_idx, FALSE); - - /* turn on HCLK to MDDI host core if it has been disabled */ - mddi_host_enable_hclk(); - - /* MDDI Reset command */ - mddi_host_reg_out(CMD, MDDI_CMD_RESET); - - /* Pad Control Register */ - mddi_host_reg_out(PAD_CTL, 0x0); - - /* disable IO_CLK and hclk to MDDI host core */ - mddi_host_disable_io_clock(); - mddi_host_disable_hclk(); - - pmhctl->link_state = MDDI_LINK_DISABLED; - pmhctl->driver_state = MDDI_DRIVER_RESET; - - MDDI_MSG_NOTICE("MDDI Host: Disabling Link\n"); - -} - -uint16 mddi_get_next_free_llist_item(mddi_host_type host_idx, boolean wait) -{ - unsigned long flags; - uint16 ret_idx; - boolean forced_wait = FALSE; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - ret_idx = pmhctl->llist_info.next_free_idx; - - pmhctl->llist_info.next_free_idx++; - if (pmhctl->llist_info.next_free_idx >= MDDI_NUM_DYNAMIC_LLIST_ITEMS) - pmhctl->llist_info.next_free_idx = MDDI_FIRST_DYNAMIC_LLIST_IDX; - spin_lock_irqsave(&mddi_host_spin_lock, flags); - if (pmhctl->llist_notify[ret_idx].in_use) { - if (!wait) { - pmhctl->llist_info.next_free_idx = ret_idx; - ret_idx = UNASSIGNED_INDEX; - } else { - forced_wait = TRUE; - INIT_COMPLETION(pmhctl->mddi_llist_avail_comp); - } - } - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - if (forced_wait) { - wait_for_completion_killable(& - (pmhctl-> - mddi_llist_avail_comp)); - MDDI_MSG_ERR("task waiting on mddi llist item\n"); - } - - if (ret_idx != UNASSIGNED_INDEX) { - pmhctl->llist_notify[ret_idx].waiting = FALSE; - pmhctl->llist_notify[ret_idx].done_cb = NULL; - pmhctl->llist_notify[ret_idx].in_use = TRUE; - pmhctl->llist_notify[ret_idx].next_idx = UNASSIGNED_INDEX; - } - - return ret_idx; -} - -uint16 mddi_get_reg_read_llist_item(mddi_host_type host_idx, boolean wait) -{ -#ifdef FEATURE_MDDI_DISABLE_REVERSE - MDDI_MSG_CRIT("No reverse link available\n"); - (void)wait; - return FALSE; -#else - unsigned long flags; - uint16 ret_idx; - boolean error = FALSE; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - spin_lock_irqsave(&mddi_host_spin_lock, flags); - if (pmhctl->llist_info.reg_read_idx != UNASSIGNED_INDEX) { - /* need to block here or is this an error condition? */ - error = TRUE; - ret_idx = UNASSIGNED_INDEX; - } - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - if (!error) { - ret_idx = pmhctl->llist_info.reg_read_idx = - mddi_get_next_free_llist_item(host_idx, wait); - /* clear the reg_read_waiting flag */ - pmhctl->llist_info.reg_read_waiting = FALSE; - } - - if (error) - MDDI_MSG_ERR("***** Reg read still in progress! ****\n"); - return ret_idx; -#endif - -} - -void mddi_queue_forward_packets(uint16 first_llist_idx, - uint16 last_llist_idx, - boolean wait, - mddi_llist_done_cb_type llist_done_cb, - mddi_host_type host_idx) -{ - unsigned long flags; - mddi_linked_list_type *llist; - mddi_linked_list_type *llist_dma; - mddi_host_cntl_type *pmhctl = &(mhctl[host_idx]); - - if ((first_llist_idx >= UNASSIGNED_INDEX) || - (last_llist_idx >= UNASSIGNED_INDEX)) { - MDDI_MSG_ERR("MDDI queueing invalid linked list\n"); - return; - } - - if (pmhctl->link_state == MDDI_LINK_DISABLED) - MDDI_MSG_CRIT("MDDI host powered down!\n"); - - llist = pmhctl->llist_ptr; - llist_dma = pmhctl->llist_dma_ptr; - - /* clean cache so MDDI host can read data */ - memory_barrier(); - - pmhctl->llist_notify[last_llist_idx].waiting = wait; - if (wait) - INIT_COMPLETION(pmhctl->llist_notify[last_llist_idx].done_comp); - pmhctl->llist_notify[last_llist_idx].done_cb = llist_done_cb; - - spin_lock_irqsave(&mddi_host_spin_lock, flags); - - if ((pmhctl->llist_info.transmitting_start_idx == UNASSIGNED_INDEX) && - (pmhctl->llist_info.waiting_start_idx == UNASSIGNED_INDEX) && - (pmhctl->rev_state == MDDI_REV_IDLE)) { - /* no packets are currently transmitting */ -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (first_llist_idx == pmhctl->llist_info.reg_read_idx) { - /* This is the special case where the packet is a register read. */ - pmhctl->rev_state = MDDI_REV_REG_READ_ISSUED; - mddi_reg_read_retry = 0; - /* mddi_rev_reg_read_attempt = 1; */ - } -#endif - /* assign transmitting index values */ - pmhctl->llist_info.transmitting_start_idx = first_llist_idx; - pmhctl->llist_info.transmitting_end_idx = last_llist_idx; - - /* turn on clock(s), if they have been disabled */ - mddi_host_enable_hclk(); - mddi_host_enable_io_clock(); - pmhctl->int_type.llist_ptr_write_1++; - /* Write to primary pointer register */ - dma_coherent_pre_ops(); - mddi_host_reg_out(PRI_PTR, &llist_dma[first_llist_idx]); - - /* enable interrupt when complete */ - mddi_host_reg_outm(INTEN, MDDI_INT_PRI_LINK_LIST_DONE, - MDDI_INT_PRI_LINK_LIST_DONE); - - } else if (pmhctl->llist_info.waiting_start_idx == UNASSIGNED_INDEX) { -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (first_llist_idx == pmhctl->llist_info.reg_read_idx) { - /* - * we have a register read to send but need to wait - * for current reverse activity to end or there are - * packets currently transmitting - */ - /* mddi_rev_reg_read_attempt = 0; */ - pmhctl->llist_info.reg_read_waiting = TRUE; - } -#endif - - /* assign waiting index values */ - pmhctl->llist_info.waiting_start_idx = first_llist_idx; - pmhctl->llist_info.waiting_end_idx = last_llist_idx; - } else { - uint16 prev_end_idx = pmhctl->llist_info.waiting_end_idx; -#ifndef FEATURE_MDDI_DISABLE_REVERSE - if (first_llist_idx == pmhctl->llist_info.reg_read_idx) { - /* - * we have a register read to send but need to wait - * for current reverse activity to end or there are - * packets currently transmitting - */ - /* mddi_rev_reg_read_attempt = 0; */ - pmhctl->llist_info.reg_read_waiting = TRUE; - } -#endif - - llist = pmhctl->llist_ptr; - - /* clear end flag in previous last packet */ - llist[prev_end_idx].link_controller_flags = 0; - pmhctl->llist_notify[prev_end_idx].next_idx = first_llist_idx; - - /* set the next_packet_pointer of the previous last packet */ - llist[prev_end_idx].next_packet_pointer = - (void *)(&llist_dma[first_llist_idx]); - - /* clean cache so MDDI host can read data */ - memory_barrier(); - - /* assign new waiting last index value */ - pmhctl->llist_info.waiting_end_idx = last_llist_idx; - } - - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - -} - -void mddi_host_write_pix_attr_reg(uint32 value) -{ - (void)value; -} - -void mddi_queue_reverse_encapsulation(boolean wait) -{ -#ifdef FEATURE_MDDI_DISABLE_REVERSE - MDDI_MSG_CRIT("No reverse link available\n"); - (void)wait; -#else - unsigned long flags; - boolean error = FALSE; - mddi_host_type host_idx = MDDI_HOST_PRIM; - mddi_host_cntl_type *pmhctl = &(mhctl[MDDI_HOST_PRIM]); - - spin_lock_irqsave(&mddi_host_spin_lock, flags); - - /* turn on clock(s), if they have been disabled */ - mddi_host_enable_hclk(); - mddi_host_enable_io_clock(); - - if (wait) { - if (!mddi_rev_user.waiting) { - mddi_rev_user.waiting = TRUE; - INIT_COMPLETION(mddi_rev_user.done_comp); - } else - error = TRUE; - } - mddi_rev_encap_user_request = TRUE; - - if (pmhctl->rev_state == MDDI_REV_IDLE) { - /* attempt to send the reverse encapsulation now */ - mddi_host_type orig_host_idx = mddi_curr_host; - mddi_curr_host = host_idx; - mddi_issue_reverse_encapsulation(); - mddi_curr_host = orig_host_idx; - } - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - if (error) { - MDDI_MSG_ERR("Reverse Encap request already in progress\n"); - } else if (wait) - wait_for_completion_killable(&(mddi_rev_user.done_comp)); -#endif -} - -/* ISR to be executed */ -boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type) -{ -#ifdef FEATURE_MDDI_DISABLE_REVERSE - MDDI_MSG_CRIT("No reverse link available\n"); - (void)handler; - (void)pkt_type; - return (FALSE); -#else - unsigned long flags; - uint16 hdlr; - boolean handler_set = FALSE; - boolean overwrite = FALSE; - mddi_host_type host_idx = MDDI_HOST_PRIM; - mddi_host_cntl_type *pmhctl = &(mhctl[MDDI_HOST_PRIM]); - - /* Disable interrupts */ - spin_lock_irqsave(&mddi_host_spin_lock, flags); - - for (hdlr = 0; hdlr < MAX_MDDI_REV_HANDLERS; hdlr++) { - if (mddi_rev_pkt_handler[hdlr].pkt_type == pkt_type) { - mddi_rev_pkt_handler[hdlr].handler = handler; - if (handler == NULL) { - /* clearing handler from table */ - mddi_rev_pkt_handler[hdlr].pkt_type = - INVALID_PKT_TYPE; - handler_set = TRUE; - if (pkt_type == 0x10) { /* video stream packet */ - /* ensure HCLK on to MDDI host core before register write */ - mddi_host_enable_hclk(); - /* No longer getting video, so reset rev encap size to default */ - pmhctl->rev_pkt_size = - MDDI_DEFAULT_REV_PKT_SIZE; - mddi_host_reg_out(REV_ENCAP_SZ, - pmhctl->rev_pkt_size); - } - } else { - /* already a handler for this packet */ - overwrite = TRUE; - } - break; - } - } - if ((hdlr >= MAX_MDDI_REV_HANDLERS) && (handler != NULL)) { - /* assigning new handler */ - for (hdlr = 0; hdlr < MAX_MDDI_REV_HANDLERS; hdlr++) { - if (mddi_rev_pkt_handler[hdlr].pkt_type == - INVALID_PKT_TYPE) { - if ((pkt_type == 0x10) && /* video stream packet */ - (pmhctl->rev_pkt_size < - MDDI_VIDEO_REV_PKT_SIZE)) { - /* ensure HCLK on to MDDI host core before register write */ - mddi_host_enable_hclk(); - /* Increase Rev Encap Size */ - pmhctl->rev_pkt_size = - MDDI_VIDEO_REV_PKT_SIZE; - mddi_host_reg_out(REV_ENCAP_SZ, - pmhctl->rev_pkt_size); - } - mddi_rev_pkt_handler[hdlr].handler = handler; - mddi_rev_pkt_handler[hdlr].pkt_type = pkt_type; - handler_set = TRUE; - break; - } - } - } - - /* Restore interrupts */ - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - - if (overwrite) - MDDI_MSG_ERR("Overwriting previous rev packet handler\n"); - - return handler_set; - -#endif -} /* mddi_set_rev_handler */ - -void mddi_host_disable_hibernation(boolean disable) -{ - mddi_host_type host_idx = MDDI_HOST_PRIM; - mddi_host_cntl_type *pmhctl = &(mhctl[MDDI_HOST_PRIM]); - - if (disable) { - pmhctl->disable_hibernation = TRUE; - /* hibernation will be turned off by isr next time it is entered */ - } else { - if (pmhctl->disable_hibernation) { - unsigned long flags; - spin_lock_irqsave(&mddi_host_spin_lock, flags); - if (!MDDI_HOST_IS_HCLK_ON) - MDDI_HOST_ENABLE_HCLK; - mddi_host_reg_out(CMD, MDDI_CMD_HIBERNATE | 1); - spin_unlock_irqrestore(&mddi_host_spin_lock, flags); - pmhctl->disable_hibernation = FALSE; - } - } -} - -void mddi_mhctl_remove(mddi_host_type host_idx) -{ - mddi_host_cntl_type *pmhctl; - - pmhctl = &(mhctl[host_idx]); - - dma_free_coherent(NULL, MDDI_LLIST_POOL_SIZE, (void *)pmhctl->llist_ptr, - pmhctl->llist_dma_addr); - - dma_free_coherent(NULL, MDDI_MAX_REV_DATA_SIZE, - (void *)pmhctl->rev_data_buf, - pmhctl->rev_data_dma_addr); -} diff --git a/drivers/staging/msm/mddihosti.h b/drivers/staging/msm/mddihosti.h deleted file mode 100644 index 79eb399..0000000 --- a/drivers/staging/msm/mddihosti.h +++ /dev/null @@ -1,531 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MDDIHOSTI_H -#define MDDIHOSTI_H - -#include "msm_fb.h" -#include "mddihost.h" -#include - -/* Register offsets in MDDI, applies to both msm_pmdh_base and - * (u32)msm_emdh_base. */ -#define MDDI_CMD 0x0000 -#define MDDI_VERSION 0x0004 -#define MDDI_PRI_PTR 0x0008 -#define MDDI_BPS 0x0010 -#define MDDI_SPM 0x0014 -#define MDDI_INT 0x0018 -#define MDDI_INTEN 0x001c -#define MDDI_REV_PTR 0x0020 -#define MDDI_REV_SIZE 0x0024 -#define MDDI_STAT 0x0028 -#define MDDI_REV_RATE_DIV 0x002c -#define MDDI_REV_CRC_ERR 0x0030 -#define MDDI_TA1_LEN 0x0034 -#define MDDI_TA2_LEN 0x0038 -#define MDDI_TEST 0x0040 -#define MDDI_REV_PKT_CNT 0x0044 -#define MDDI_DRIVE_HI 0x0048 -#define MDDI_DRIVE_LO 0x004c -#define MDDI_DISP_WAKE 0x0050 -#define MDDI_REV_ENCAP_SZ 0x0054 -#define MDDI_RTD_VAL 0x0058 -#define MDDI_PAD_CTL 0x0068 -#define MDDI_DRIVER_START_CNT 0x006c -#define MDDI_CORE_VER 0x008c -#define MDDI_FIFO_ALLOC 0x0090 -#define MDDI_PAD_IO_CTL 0x00a0 -#define MDDI_PAD_CAL 0x00a4 - -extern u32 mddi_msg_level; - -/* No longer need to write to clear these registers */ -#define xxxx_mddi_host_reg_outm(reg, mask, val) \ -do { \ - if (host_idx == MDDI_HOST_PRIM) \ - mddi_host_reg_outm_pmdh(reg, mask, val); \ - else \ - mddi_host_reg_outm_emdh(reg, mask, val); \ -} while (0) - -#define mddi_host_reg_outm(reg, mask, val) \ -do { \ - unsigned long __addr; \ - if (host_idx == MDDI_HOST_PRIM) \ - __addr = (u32)msm_pmdh_base + MDDI_##reg; \ - else \ - __addr = (u32)msm_emdh_base + MDDI_##reg; \ - writel((readl(__addr) & ~(mask)) | ((val) & (mask)), __addr); \ -} while (0) - -#define xxxx_mddi_host_reg_out(reg, val) \ -do { \ - if (host_idx == MDDI_HOST_PRIM) \ - mddi_host_reg_out_pmdh(reg, val); \ - else \ - mddi_host_reg_out_emdh(reg, val); \ - } while (0) - -#define mddi_host_reg_out(reg, val) \ -do { \ - if (host_idx == MDDI_HOST_PRIM) \ - writel(val, (u32)msm_pmdh_base + MDDI_##reg); \ - else \ - writel(val, (u32)msm_emdh_base + MDDI_##reg); \ -} while (0) - -#define xxxx_mddi_host_reg_in(reg) \ - ((host_idx) ? \ - mddi_host_reg_in_emdh(reg) : mddi_host_reg_in_pmdh(reg)); - -#define mddi_host_reg_in(reg) \ -((host_idx) ? \ - readl((u32)msm_emdh_base + MDDI_##reg) : \ - readl((u32)msm_pmdh_base + MDDI_##reg)) \ - -#define xxxx_mddi_host_reg_inm(reg, mask) \ - ((host_idx) ? \ - mddi_host_reg_inm_emdh(reg, mask) : \ - mddi_host_reg_inm_pmdh(reg, mask);) - -#define mddi_host_reg_inm(reg, mask) \ -((host_idx) ? \ - readl((u32)msm_emdh_base + MDDI_##reg) & (mask) : \ - readl((u32)msm_pmdh_base + MDDI_##reg) & (mask)) \ - -/* Using non-cacheable pmem, so do nothing */ -#define mddi_invalidate_cache_lines(addr_start, num_bytes) -/* - * Using non-cacheable pmem, so do nothing with cache - * but, ensure write goes out to memory - */ -#define mddi_flush_cache_lines(addr_start, num_bytes) \ - (void) addr_start; \ - (void) num_bytes; \ - memory_barrier() - -/* Since this translates to Remote Procedure Calls to check on clock status -* just use a local variable to keep track of io_clock */ -#define MDDI_HOST_IS_IO_CLOCK_ON mddi_host_io_clock_on -#define MDDI_HOST_ENABLE_IO_CLOCK -#define MDDI_HOST_DISABLE_IO_CLOCK -#define MDDI_HOST_IS_HCLK_ON mddi_host_hclk_on -#define MDDI_HOST_ENABLE_HCLK -#define MDDI_HOST_DISABLE_HCLK -#define FEATURE_MDDI_HOST_IO_CLOCK_CONTROL_DISABLE -#define FEATURE_MDDI_HOST_HCLK_CONTROL_DISABLE - -#define TRAMP_MDDI_HOST_ISR TRAMP_MDDI_PRI_ISR -#define TRAMP_MDDI_HOST_EXT_ISR TRAMP_MDDI_EXT_ISR -#define MDP_LINE_COUNT_BMSK 0x3ff -#define MDP_SYNC_STATUS 0x000c -#define MDP_LINE_COUNT \ -(readl(msm_mdp_base + MDP_SYNC_STATUS) & MDP_LINE_COUNT_BMSK) - -/* MDP sends 256 pixel packets, so lower value hibernates more without -* significantly increasing latency of waiting for next subframe */ -#define MDDI_HOST_BYTES_PER_SUBFRAME 0x3C00 - -#if defined(CONFIG_FB_MSM_MDP31) || defined(CONFIG_FB_MSM_MDP40) -#define MDDI_HOST_TA2_LEN 0x001a -#define MDDI_HOST_REV_RATE_DIV 0x0004 -#else -#define MDDI_HOST_TA2_LEN 0x000c -#define MDDI_HOST_REV_RATE_DIV 0x0002 -#endif - -#define MDDI_MSG_EMERG(msg, ...) \ - if (mddi_msg_level > 0) \ - printk(KERN_EMERG msg, ## __VA_ARGS__); -#define MDDI_MSG_ALERT(msg, ...) \ - if (mddi_msg_level > 1) \ - printk(KERN_ALERT msg, ## __VA_ARGS__); -#define MDDI_MSG_CRIT(msg, ...) \ - if (mddi_msg_level > 2) \ - printk(KERN_CRIT msg, ## __VA_ARGS__); -#define MDDI_MSG_ERR(msg, ...) \ - if (mddi_msg_level > 3) \ - printk(KERN_ERR msg, ## __VA_ARGS__); -#define MDDI_MSG_WARNING(msg, ...) \ - if (mddi_msg_level > 4) \ - printk(KERN_WARNING msg, ## __VA_ARGS__); -#define MDDI_MSG_NOTICE(msg, ...) \ - if (mddi_msg_level > 5) \ - printk(KERN_NOTICE msg, ## __VA_ARGS__); -#define MDDI_MSG_INFO(msg, ...) \ - if (mddi_msg_level > 6) \ - printk(KERN_INFO msg, ## __VA_ARGS__); -#define MDDI_MSG_DEBUG(msg, ...) \ - if (mddi_msg_level > 7) \ - printk(KERN_DEBUG msg, ## __VA_ARGS__); - -#define GCC_PACKED __attribute__((packed)) -typedef struct GCC_PACKED { - uint16 packet_length; - /* total # of bytes in the packet not including - the packet_length field. */ - - uint16 packet_type; - /* A Packet Type of 70 identifies the packet as - a Client status Packet. */ - - uint16 bClient_ID; - /* This field is reserved for future use and shall - be set to zero. */ - -} mddi_rev_packet_type; - -typedef struct GCC_PACKED { - uint16 packet_length; - /* total # of bytes in the packet not including - the packet_length field. */ - - uint16 packet_type; - /* A Packet Type of 70 identifies the packet as - a Client status Packet. */ - - uint16 bClient_ID; - /* This field is reserved for future use and shall - be set to zero. */ - - uint16 reverse_link_request; - /* 16 bit unsigned integer with number of bytes client - needs in the * reverse encapsulation message - to transmit data. */ - - uint8 crc_error_count; - uint8 capability_change; - uint16 graphics_busy_flags; - - uint16 parameter_CRC; - /* 16-bit CRC of all the bytes in the packet - including Packet Length. */ - -} mddi_client_status_type; - -typedef struct GCC_PACKED { - uint16 packet_length; - /* total # of bytes in the packet not including - the packet_length field. */ - - uint16 packet_type; - /* A Packet Type of 66 identifies the packet as - a Client Capability Packet. */ - - uint16 bClient_ID; - /* This field is reserved for future use and - shall be set to zero. */ - - uint16 Protocol_Version; - uint16 Minimum_Protocol_Version; - uint16 Data_Rate_Capability; - uint8 Interface_Type_Capability; - uint8 Number_of_Alt_Displays; - uint16 PostCal_Data_Rate; - uint16 Bitmap_Width; - uint16 Bitmap_Height; - uint16 Display_Window_Width; - uint16 Display_Window_Height; - uint32 Color_Map_Size; - uint16 Color_Map_RGB_Width; - uint16 RGB_Capability; - uint8 Monochrome_Capability; - uint8 Reserved_1; - uint16 Y_Cb_Cr_Capability; - uint16 Bayer_Capability; - uint16 Alpha_Cursor_Image_Planes; - uint32 Client_Feature_Capability_Indicators; - uint8 Maximum_Video_Frame_Rate_Capability; - uint8 Minimum_Video_Frame_Rate_Capability; - uint16 Minimum_Sub_frame_Rate; - uint16 Audio_Buffer_Depth; - uint16 Audio_Channel_Capability; - uint16 Audio_Sample_Rate_Capability; - uint8 Audio_Sample_Resolution; - uint8 Mic_Audio_Sample_Resolution; - uint16 Mic_Sample_Rate_Capability; - uint8 Keyboard_Data_Format; - uint8 pointing_device_data_format; - uint16 content_protection_type; - uint16 Mfr_Name; - uint16 Product_Code; - uint16 Reserved_3; - uint32 Serial_Number; - uint8 Week_of_Manufacture; - uint8 Year_of_Manufacture; - - uint16 parameter_CRC; - /* 16-bit CRC of all the bytes in the packet including Packet Length. */ - -} mddi_client_capability_type; - -typedef struct GCC_PACKED { - uint16 packet_length; - /* total # of bytes in the packet not including the packet_length field. */ - - uint16 packet_type; - /* A Packet Type of 16 identifies the packet as a Video Stream Packet. */ - - uint16 bClient_ID; - /* This field is reserved for future use and shall be set to zero. */ - - uint16 video_data_format_descriptor; - /* format of each pixel in the Pixel Data in the present stream in the - * present packet. - * If bits [15:13] = 000 monochrome - * If bits [15:13] = 001 color pixels (palette). - * If bits [15:13] = 010 color pixels in raw RGB - * If bits [15:13] = 011 data in 4:2:2 Y Cb Cr format - * If bits [15:13] = 100 Bayer pixels - */ - - uint16 pixel_data_attributes; - /* interpreted as follows: - * Bits [1:0] = 11 pixel data is displayed to both eyes - * Bits [1:0] = 10 pixel data is routed to the left eye only. - * Bits [1:0] = 01 pixel data is routed to the right eye only. - * Bits [1:0] = 00 pixel data is routed to the alternate display. - * Bit 2 is 0 Pixel Data is in the standard progressive format. - * Bit 2 is 1 Pixel Data is in interlace format. - * Bit 3 is 0 Pixel Data is in the standard progressive format. - * Bit 3 is 1 Pixel Data is in alternate pixel format. - * Bit 4 is 0 Pixel Data is to or from the display frame buffer. - * Bit 4 is 1 Pixel Data is to or from the camera. - * Bit 5 is 0 pixel data contains the next consecutive row of pixels. - * Bit 5 is 1 X Left Edge, Y Top Edge, X Right Edge, Y Bottom Edge, - * X Start, and Y Start parameters are not defined and - * shall be ignored by the client. - * Bits [7:6] = 01 Pixel data is written to the offline image buffer. - * Bits [7:6] = 00 Pixel data is written to the buffer to refresh display. - * Bits [7:6] = 11 Pixel data is written to all image buffers. - * Bits [7:6] = 10 Invalid. Reserved for future use. - * Bits 8 through 11 alternate display number. - * Bits 12 through 14 are reserved for future use and shall be set to zero. - * Bit 15 is 1 the row of pixels is the last row of pixels in a frame. - */ - - uint16 x_left_edge; - uint16 y_top_edge; - /* X,Y coordinate of the top left edge of the screen window */ - - uint16 x_right_edge; - uint16 y_bottom_edge; - /* X,Y coordinate of the bottom right edge of the window being updated. */ - - uint16 x_start; - uint16 y_start; - /* (X Start, Y Start) is the first pixel in the Pixel Data field below. */ - - uint16 pixel_count; - /* number of pixels in the Pixel Data field below. */ - - uint16 parameter_CRC; - /* 16-bit CRC of all bytes from the Packet Length to the Pixel Count. */ - - uint16 reserved; - /* 16-bit variable to make structure align on 4 byte boundary */ - -} mddi_video_stream_packet_type; - -typedef struct GCC_PACKED { - uint16 packet_length; - /* total # of bytes in the packet not including the packet_length field. */ - - uint16 packet_type; - /* A Packet Type of 146 identifies the packet as a Register Access Packet. */ - - uint16 bClient_ID; - /* This field is reserved for future use and shall be set to zero. */ - - uint16 read_write_info; - /* Bits 13:0 a 14-bit unsigned integer that specifies the number of - * 32-bit Register Data List items to be transferred in the - * Register Data List field. - * Bits[15:14] = 00 Write to register(s); - * Bits[15:14] = 10 Read from register(s); - * Bits[15:14] = 11 Response to a Read. - * Bits[15:14] = 01 this value is reserved for future use. */ - - uint32 register_address; - /* the register address that is to be written to or read from. */ - - uint16 parameter_CRC; - /* 16-bit CRC of all bytes from the Packet Length to the Register Address. */ - - uint32 register_data_list; - /* list of 4-byte register data values for/from client registers */ - -} mddi_register_access_packet_type; - -typedef union GCC_PACKED { - mddi_video_stream_packet_type video_pkt; - mddi_register_access_packet_type register_pkt; - /* add 48 byte pad to ensure 64 byte llist struct, that can be - * manipulated easily with cache */ - uint32 alignment_pad[12]; /* 48 bytes */ -} mddi_packet_header_type; - -typedef struct GCC_PACKED mddi_host_llist_struct { - uint16 link_controller_flags; - uint16 packet_header_count; - uint16 packet_data_count; - void *packet_data_pointer; - struct mddi_host_llist_struct *next_packet_pointer; - uint16 reserved; - mddi_packet_header_type packet_header; -} mddi_linked_list_type; - -typedef struct { - struct completion done_comp; - mddi_llist_done_cb_type done_cb; - uint16 next_idx; - boolean waiting; - boolean in_use; -} mddi_linked_list_notify_type; - -#define MDDI_LLIST_POOL_SIZE 0x1000 -#define MDDI_MAX_NUM_LLIST_ITEMS (MDDI_LLIST_POOL_SIZE / \ - sizeof(mddi_linked_list_type)) -#define UNASSIGNED_INDEX MDDI_MAX_NUM_LLIST_ITEMS -#define MDDI_FIRST_DYNAMIC_LLIST_IDX 0 - -/* Static llist items can be used for applications that frequently send - * the same set of packets using the linked list interface. */ -/* Here we configure for 6 static linked list items: - * The 1st is used for a the adaptive backlight setting. - * and the remaining 5 are used for sending window adjustments for - * MDDI clients that need windowing info sent separate from video - * packets. */ -#define MDDI_NUM_STATIC_ABL_ITEMS 1 -#define MDDI_NUM_STATIC_WINDOW_ITEMS 5 -#define MDDI_NUM_STATIC_LLIST_ITEMS (MDDI_NUM_STATIC_ABL_ITEMS + \ - MDDI_NUM_STATIC_WINDOW_ITEMS) -#define MDDI_NUM_DYNAMIC_LLIST_ITEMS (MDDI_MAX_NUM_LLIST_ITEMS - \ - MDDI_NUM_STATIC_LLIST_ITEMS) - -#define MDDI_FIRST_STATIC_LLIST_IDX MDDI_NUM_DYNAMIC_LLIST_ITEMS -#define MDDI_FIRST_STATIC_ABL_IDX MDDI_FIRST_STATIC_LLIST_IDX -#define MDDI_FIRST_STATIC_WINDOW_IDX (MDDI_FIRST_STATIC_LLIST_IDX + \ - MDDI_NUM_STATIC_ABL_ITEMS) - -/* GPIO registers */ -#define VSYNC_WAKEUP_REG 0x80 -#define GPIO_REG 0x81 -#define GPIO_OUTPUT_REG 0x82 -#define GPIO_INTERRUPT_REG 0x83 -#define GPIO_INTERRUPT_ENABLE_REG 0x84 -#define GPIO_POLARITY_REG 0x85 - -/* Interrupt Bits */ -#define MDDI_INT_PRI_PTR_READ 0x0001 -#define MDDI_INT_SEC_PTR_READ 0x0002 -#define MDDI_INT_REV_DATA_AVAIL 0x0004 -#define MDDI_INT_DISP_REQ 0x0008 -#define MDDI_INT_PRI_UNDERFLOW 0x0010 -#define MDDI_INT_SEC_UNDERFLOW 0x0020 -#define MDDI_INT_REV_OVERFLOW 0x0040 -#define MDDI_INT_CRC_ERROR 0x0080 -#define MDDI_INT_MDDI_IN 0x0100 -#define MDDI_INT_PRI_OVERWRITE 0x0200 -#define MDDI_INT_SEC_OVERWRITE 0x0400 -#define MDDI_INT_REV_OVERWRITE 0x0800 -#define MDDI_INT_DMA_FAILURE 0x1000 -#define MDDI_INT_LINK_ACTIVE 0x2000 -#define MDDI_INT_IN_HIBERNATION 0x4000 -#define MDDI_INT_PRI_LINK_LIST_DONE 0x8000 -#define MDDI_INT_SEC_LINK_LIST_DONE 0x10000 -#define MDDI_INT_NO_CMD_PKTS_PEND 0x20000 -#define MDDI_INT_RTD_FAILURE 0x40000 - -#define MDDI_INT_ERROR_CONDITIONS ( \ - MDDI_INT_PRI_UNDERFLOW | MDDI_INT_SEC_UNDERFLOW | \ - MDDI_INT_REV_OVERFLOW | MDDI_INT_CRC_ERROR | \ - MDDI_INT_PRI_OVERWRITE | MDDI_INT_SEC_OVERWRITE | \ - MDDI_INT_RTD_FAILURE | \ - MDDI_INT_REV_OVERWRITE | MDDI_INT_DMA_FAILURE) - -#define MDDI_INT_LINK_STATE_CHANGES ( \ - MDDI_INT_LINK_ACTIVE | MDDI_INT_IN_HIBERNATION) - -/* Status Bits */ -#define MDDI_STAT_LINK_ACTIVE 0x0001 -#define MDDI_STAT_NEW_REV_PTR 0x0002 -#define MDDI_STAT_NEW_PRI_PTR 0x0004 -#define MDDI_STAT_NEW_SEC_PTR 0x0008 -#define MDDI_STAT_IN_HIBERNATION 0x0010 -#define MDDI_STAT_PRI_LINK_LIST_DONE 0x0020 -#define MDDI_STAT_SEC_LINK_LIST_DONE 0x0040 -#define MDDI_STAT_PENDING_TIMING_PKT 0x0080 -#define MDDI_STAT_PENDING_REV_ENCAP 0x0100 -#define MDDI_STAT_PENDING_POWERDOWN 0x0200 -#define MDDI_STAT_RTD_MEAS_FAIL 0x0800 -#define MDDI_STAT_CLIENT_WAKEUP_REQ 0x1000 - -/* Command Bits */ -#define MDDI_CMD_POWERDOWN 0x0100 -#define MDDI_CMD_POWERUP 0x0200 -#define MDDI_CMD_HIBERNATE 0x0300 -#define MDDI_CMD_RESET 0x0400 -#define MDDI_CMD_DISP_IGNORE 0x0501 -#define MDDI_CMD_DISP_LISTEN 0x0500 -#define MDDI_CMD_SEND_REV_ENCAP 0x0600 -#define MDDI_CMD_GET_CLIENT_CAP 0x0601 -#define MDDI_CMD_GET_CLIENT_STATUS 0x0602 -#define MDDI_CMD_SEND_RTD 0x0700 -#define MDDI_CMD_LINK_ACTIVE 0x0900 -#define MDDI_CMD_PERIODIC_REV_ENCAP 0x0A00 - -extern void mddi_host_init(mddi_host_type host); -extern void mddi_host_powerdown(mddi_host_type host); -extern uint16 mddi_get_next_free_llist_item(mddi_host_type host, boolean wait); -extern uint16 mddi_get_reg_read_llist_item(mddi_host_type host, boolean wait); -extern void mddi_queue_forward_packets(uint16 first_llist_idx, - uint16 last_llist_idx, - boolean wait, - mddi_llist_done_cb_type llist_done_cb, - mddi_host_type host); - -extern void mddi_host_write_pix_attr_reg(uint32 value); -extern void mddi_client_lcd_gpio_poll(uint32 poll_reg_val); -extern void mddi_client_lcd_vsync_detected(boolean detected); -extern void mddi_host_disable_hibernation(boolean disable); - -extern mddi_linked_list_type *llist_extern[]; -extern mddi_linked_list_type *llist_dma_extern[]; -extern mddi_linked_list_notify_type *llist_extern_notify[]; -extern struct timer_list mddi_host_timer; - -typedef struct { - uint16 transmitting_start_idx; - uint16 transmitting_end_idx; - uint16 waiting_start_idx; - uint16 waiting_end_idx; - uint16 reg_read_idx; - uint16 next_free_idx; - boolean reg_read_waiting; -} mddi_llist_info_type; - -extern mddi_llist_info_type mddi_llist; - -#define MDDI_GPIO_DEFAULT_POLLING_INTERVAL 200 -typedef struct { - uint32 polling_reg; - uint32 polling_val; - uint32 polling_interval; - boolean polling_enabled; -} mddi_gpio_info_type; - -uint32 mddi_get_client_id(void); -void mddi_mhctl_remove(mddi_host_type host_idx); -void mddi_host_timer_service(unsigned long data); -#endif /* MDDIHOSTI_H */ diff --git a/drivers/staging/msm/mdp.c b/drivers/staging/msm/mdp.c deleted file mode 100644 index 58cb404..0000000 --- a/drivers/staging/msm/mdp.c +++ /dev/null @@ -1,1113 +0,0 @@ -/* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" -#ifdef CONFIG_FB_MSM_MDP40 -#include "mdp4.h" -#endif - -static struct clk *mdp_clk; -static struct clk *mdp_pclk; - -struct completion mdp_ppp_comp; -struct semaphore mdp_ppp_mutex; -struct semaphore mdp_pipe_ctrl_mutex; - -unsigned long mdp_timer_duration = (HZ); /* 1 sec */ -/* unsigned long mdp_mdp_timer_duration=0; */ - -boolean mdp_ppp_waiting = FALSE; -uint32 mdp_tv_underflow_cnt; -uint32 mdp_lcdc_underflow_cnt; - -boolean mdp_current_clk_on = FALSE; -boolean mdp_is_in_isr = FALSE; - -/* - * legacy mdp_in_processing is only for DMA2-MDDI - * this applies to DMA2 block only - */ -uint32 mdp_in_processing = FALSE; - -#ifdef CONFIG_FB_MSM_MDP40 -uint32 mdp_intr_mask = MDP4_ANY_INTR_MASK; -#else -uint32 mdp_intr_mask = MDP_ANY_INTR_MASK; -#endif - -MDP_BLOCK_TYPE mdp_debug[MDP_MAX_BLOCK]; - -int32 mdp_block_power_cnt[MDP_MAX_BLOCK]; - -spinlock_t mdp_spin_lock; -struct workqueue_struct *mdp_dma_wq; /*mdp dma wq */ -struct workqueue_struct *mdp_vsync_wq; /*mdp vsync wq */ - -static struct workqueue_struct *mdp_pipe_ctrl_wq; /* mdp mdp pipe ctrl wq */ -static struct delayed_work mdp_pipe_ctrl_worker; - -#ifdef CONFIG_FB_MSM_MDP40 -struct mdp_dma_data dma2_data; -struct mdp_dma_data dma_s_data; -struct mdp_dma_data dma_e_data; -#else -static struct mdp_dma_data dma2_data; -static struct mdp_dma_data dma_s_data; -static struct mdp_dma_data dma_e_data; -#endif -static struct mdp_dma_data dma3_data; - -extern ktime_t mdp_dma2_last_update_time; - -extern uint32 mdp_dma2_update_time_in_usec; -extern int mdp_lcd_rd_cnt_offset_slow; -extern int mdp_lcd_rd_cnt_offset_fast; -extern int mdp_usec_diff_threshold; - -#ifdef CONFIG_FB_MSM_LCDC -extern int mdp_lcdc_pclk_clk_rate; -extern int mdp_lcdc_pad_pclk_clk_rate; -extern int first_pixel_start_x; -extern int first_pixel_start_y; -#endif - -#ifdef MSM_FB_ENABLE_DBGFS -struct dentry *mdp_dir; -#endif - -#if defined(CONFIG_PM) && !defined(CONFIG_HAS_EARLYSUSPEND) -static int mdp_suspend(struct platform_device *pdev, pm_message_t state); -#else -#define mdp_suspend NULL -#endif - -struct timeval mdp_dma2_timeval; -struct timeval mdp_ppp_timeval; - -#ifdef CONFIG_HAS_EARLYSUSPEND -static struct early_suspend early_suspend; -#endif - -#ifndef CONFIG_FB_MSM_MDP22 -DEFINE_MUTEX(mdp_lut_push_sem); -static int mdp_lut_i; -static int mdp_lut_hw_update(struct fb_cmap *cmap) -{ - int i; - u16 *c[3]; - u16 r, g, b; - - c[0] = cmap->green; - c[1] = cmap->blue; - c[2] = cmap->red; - - for (i = 0; i < cmap->len; i++) { - if (copy_from_user(&r, cmap->red++, sizeof(r)) || - copy_from_user(&g, cmap->green++, sizeof(g)) || - copy_from_user(&b, cmap->blue++, sizeof(b))) - return -EFAULT; - -#ifdef CONFIG_FB_MSM_MDP40 - MDP_OUTP(MDP_BASE + 0x94800 + -#else - MDP_OUTP(MDP_BASE + 0x93800 + -#endif - (0x400*mdp_lut_i) + cmap->start*4 + i*4, - ((g & 0xff) | - ((b & 0xff) << 8) | - ((r & 0xff) << 16))); - } - - return 0; -} - -static int mdp_lut_push; -static int mdp_lut_push_i; -static int mdp_lut_update_nonlcdc(struct fb_info *info, struct fb_cmap *cmap) -{ - int ret; - - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - ret = mdp_lut_hw_update(cmap); - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - if (ret) - return ret; - - mutex_lock(&mdp_lut_push_sem); - mdp_lut_push = 1; - mdp_lut_push_i = mdp_lut_i; - mutex_unlock(&mdp_lut_push_sem); - - mdp_lut_i = (mdp_lut_i + 1)%2; - - return 0; -} - -static int mdp_lut_update_lcdc(struct fb_info *info, struct fb_cmap *cmap) -{ - int ret; - - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - ret = mdp_lut_hw_update(cmap); - - if (ret) { - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - return ret; - } - - MDP_OUTP(MDP_BASE + 0x90070, (mdp_lut_i << 10) | 0x17); - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - mdp_lut_i = (mdp_lut_i + 1)%2; - - return 0; -} - -#define MDP_HIST_MAX_BIN 32 -static __u32 mdp_hist_r[MDP_HIST_MAX_BIN]; -static __u32 mdp_hist_g[MDP_HIST_MAX_BIN]; -static __u32 mdp_hist_b[MDP_HIST_MAX_BIN]; - -#ifdef CONFIG_FB_MSM_MDP40 -struct mdp_histogram mdp_hist; -struct completion mdp_hist_comp; -#else -static struct mdp_histogram mdp_hist; -static struct completion mdp_hist_comp; -#endif - -static int mdp_do_histogram(struct fb_info *info, struct mdp_histogram *hist) -{ - int ret = 0; - - if (!hist->frame_cnt || (hist->bin_cnt == 0) || - (hist->bin_cnt > MDP_HIST_MAX_BIN)) - return -EINVAL; - - INIT_COMPLETION(mdp_hist_comp); - - mdp_hist.bin_cnt = hist->bin_cnt; - mdp_hist.r = (hist->r) ? mdp_hist_r : 0; - mdp_hist.g = (hist->g) ? mdp_hist_g : 0; - mdp_hist.b = (hist->b) ? mdp_hist_b : 0; - -#ifdef CONFIG_FB_MSM_MDP40 - MDP_OUTP(MDP_BASE + 0x95004, hist->frame_cnt); - MDP_OUTP(MDP_BASE + 0x95000, 1); -#else - MDP_OUTP(MDP_BASE + 0x94004, hist->frame_cnt); - MDP_OUTP(MDP_BASE + 0x94000, 1); -#endif - wait_for_completion_killable(&mdp_hist_comp); - - if (hist->r) { - ret = copy_to_user(hist->r, mdp_hist.r, hist->bin_cnt*4); - if (ret) - goto hist_err; - } - if (hist->g) { - ret = copy_to_user(hist->g, mdp_hist.g, hist->bin_cnt*4); - if (ret) - goto hist_err; - } - if (hist->b) { - ret = copy_to_user(hist->b, mdp_hist.b, hist->bin_cnt*4); - if (ret) - goto hist_err; - } - return 0; - -hist_err: - printk(KERN_ERR "%s: invalid hist buffer\n", __func__); - return ret; -} -#endif - -/* Returns < 0 on error, 0 on timeout, or > 0 on successful wait */ - -int mdp_ppp_pipe_wait(void) -{ - int ret = 1; - - /* wait 5 seconds for the operation to complete before declaring - the MDP hung */ - - if (mdp_ppp_waiting == TRUE) { - ret = wait_for_completion_interruptible_timeout(&mdp_ppp_comp, - 5 * HZ); - - if (!ret) - printk(KERN_ERR "%s: Timed out waiting for the MDP.\n", - __func__); - } - - return ret; -} - -static DEFINE_SPINLOCK(mdp_lock); -static int mdp_irq_mask; -static int mdp_irq_enabled; - -void mdp_enable_irq(uint32 term) -{ - unsigned long irq_flags; - - spin_lock_irqsave(&mdp_lock, irq_flags); - if (mdp_irq_mask & term) { - printk(KERN_ERR "MDP IRQ term-0x%x is already set\n", term); - } else { - mdp_irq_mask |= term; - if (mdp_irq_mask && !mdp_irq_enabled) { - mdp_irq_enabled = 1; - enable_irq(INT_MDP); - } - } - spin_unlock_irqrestore(&mdp_lock, irq_flags); -} - -void mdp_disable_irq(uint32 term) -{ - unsigned long irq_flags; - - spin_lock_irqsave(&mdp_lock, irq_flags); - if (!(mdp_irq_mask & term)) { - printk(KERN_ERR "MDP IRQ term-0x%x is not set\n", term); - } else { - mdp_irq_mask &= ~term; - if (!mdp_irq_mask && mdp_irq_enabled) { - mdp_irq_enabled = 0; - disable_irq(INT_MDP); - } - } - spin_unlock_irqrestore(&mdp_lock, irq_flags); -} - -void mdp_disable_irq_nolock(uint32 term) -{ - - if (!(mdp_irq_mask & term)) { - printk(KERN_ERR "MDP IRQ term-0x%x is not set\n", term); - } else { - mdp_irq_mask &= ~term; - if (!mdp_irq_mask && mdp_irq_enabled) { - mdp_irq_enabled = 0; - disable_irq(INT_MDP); - } - } -} - -void mdp_pipe_kickoff(uint32 term, struct msm_fb_data_type *mfd) -{ - - dmb(); /* memory barrier */ - - /* kick off PPP engine */ - if (term == MDP_PPP_TERM) { - if (mdp_debug[MDP_PPP_BLOCK]) - jiffies_to_timeval(jiffies, &mdp_ppp_timeval); - - /* let's turn on PPP block */ - mdp_pipe_ctrl(MDP_PPP_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - mdp_enable_irq(term); - INIT_COMPLETION(mdp_ppp_comp); - mdp_ppp_waiting = TRUE; - outpdw(MDP_BASE + 0x30, 0x1000); - wait_for_completion_killable(&mdp_ppp_comp); - mdp_disable_irq(term); - - if (mdp_debug[MDP_PPP_BLOCK]) { - struct timeval now; - - jiffies_to_timeval(jiffies, &now); - mdp_ppp_timeval.tv_usec = - now.tv_usec - mdp_ppp_timeval.tv_usec; - MSM_FB_INFO("MDP-PPP: %d\n", - (int)mdp_ppp_timeval.tv_usec); - } - } else if (term == MDP_DMA2_TERM) { - if (mdp_debug[MDP_DMA2_BLOCK]) { - MSM_FB_INFO("MDP-DMA2: %d\n", - (int)mdp_dma2_timeval.tv_usec); - jiffies_to_timeval(jiffies, &mdp_dma2_timeval); - } - /* DMA update timestamp */ - mdp_dma2_last_update_time = ktime_get_real(); - /* let's turn on DMA2 block */ -#if 0 - mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_ON, FALSE); -#endif -#ifdef CONFIG_FB_MSM_MDP22 - outpdw(MDP_CMD_DEBUG_ACCESS_BASE + 0x0044, 0x0);/* start DMA */ -#else - if (mdp_lut_push) { - mutex_lock(&mdp_lut_push_sem); - mdp_lut_push = 0; - MDP_OUTP(MDP_BASE + 0x90070, - (mdp_lut_push_i << 10) | 0x17); - mutex_unlock(&mdp_lut_push_sem); - } -#ifdef CONFIG_FB_MSM_MDP40 - outpdw(MDP_BASE + 0x000c, 0x0); /* start DMA */ -#else - outpdw(MDP_BASE + 0x0044, 0x0); /* start DMA */ -#endif -#endif -#ifdef CONFIG_FB_MSM_MDP40 - } else if (term == MDP_DMA_S_TERM) { - mdp_pipe_ctrl(MDP_DMA_S_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - outpdw(MDP_BASE + 0x0010, 0x0); /* start DMA */ - } else if (term == MDP_DMA_E_TERM) { - mdp_pipe_ctrl(MDP_DMA_E_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - outpdw(MDP_BASE + 0x0014, 0x0); /* start DMA */ - } else if (term == MDP_OVERLAY0_TERM) { - mdp_pipe_ctrl(MDP_OVERLAY0_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - outpdw(MDP_BASE + 0x0004, 0); - } else if (term == MDP_OVERLAY1_TERM) { - mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - outpdw(MDP_BASE + 0x0008, 0); - } -#else - } else if (term == MDP_DMA_S_TERM) { - mdp_pipe_ctrl(MDP_DMA_S_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - outpdw(MDP_BASE + 0x0048, 0x0); /* start DMA */ - } -#endif -} - -static void mdp_pipe_ctrl_workqueue_handler(struct work_struct *work) -{ - mdp_pipe_ctrl(MDP_MASTER_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); -} - -void mdp_pipe_ctrl(MDP_BLOCK_TYPE block, MDP_BLOCK_POWER_STATE state, - boolean isr) -{ - boolean mdp_all_blocks_off = TRUE; - int i; - unsigned long flag; - - spin_lock_irqsave(&mdp_spin_lock, flag); - if (MDP_BLOCK_POWER_ON == state) { - mdp_block_power_cnt[block]++; - - if (MDP_DMA2_BLOCK == block) - mdp_in_processing = TRUE; - } else { - mdp_block_power_cnt[block]--; - - if (mdp_block_power_cnt[block] < 0) { - /* - * Master has to serve a request to power off MDP always - * It also has a timer to power off. So, in case of - * timer expires first and DMA2 finishes later, - * master has to power off two times - * There shouldn't be multiple power-off request for - * other blocks - */ - if (block != MDP_MASTER_BLOCK) { - MSM_FB_INFO("mdp_block_power_cnt[block=%d] \ - multiple power-off request\n", block); - } - mdp_block_power_cnt[block] = 0; - } - - if (MDP_DMA2_BLOCK == block) - mdp_in_processing = FALSE; - } - spin_unlock_irqrestore(&mdp_spin_lock, flag); - - /* - * If it's in isr, we send our request to workqueue. - * Otherwise, processing happens in the current context - */ - if (isr) { - /* checking all blocks power state */ - for (i = 0; i < MDP_MAX_BLOCK; i++) { - if (mdp_block_power_cnt[i] > 0) - mdp_all_blocks_off = FALSE; - } - - if ((mdp_all_blocks_off) && (mdp_current_clk_on)) { - /* send workqueue to turn off mdp power */ - queue_delayed_work(mdp_pipe_ctrl_wq, - &mdp_pipe_ctrl_worker, - mdp_timer_duration); - } - } else { - down(&mdp_pipe_ctrl_mutex); - /* checking all blocks power state */ - for (i = 0; i < MDP_MAX_BLOCK; i++) { - if (mdp_block_power_cnt[i] > 0) - mdp_all_blocks_off = FALSE; - } - - /* - * find out whether a delayable work item is currently - * pending - */ - - if (delayed_work_pending(&mdp_pipe_ctrl_worker)) { - /* - * try to cancel the current work if it fails to - * stop (which means del_timer can't delete it - * from the list, it's about to expire and run), - * we have to let it run. queue_delayed_work won't - * accept the next job which is same as - * queue_delayed_work(mdp_timer_duration = 0) - */ - cancel_delayed_work(&mdp_pipe_ctrl_worker); - } - - if ((mdp_all_blocks_off) && (mdp_current_clk_on)) { - if (block == MDP_MASTER_BLOCK) { - mdp_current_clk_on = FALSE; - /* turn off MDP clks */ - if (mdp_clk != NULL) { - clk_disable(mdp_clk); - MSM_FB_DEBUG("MDP CLK OFF\n"); - } - if (mdp_pclk != NULL) { - clk_disable(mdp_pclk); - MSM_FB_DEBUG("MDP PCLK OFF\n"); - } - } else { - /* send workqueue to turn off mdp power */ - queue_delayed_work(mdp_pipe_ctrl_wq, - &mdp_pipe_ctrl_worker, - mdp_timer_duration); - } - } else if ((!mdp_all_blocks_off) && (!mdp_current_clk_on)) { - mdp_current_clk_on = TRUE; - /* turn on MDP clks */ - if (mdp_clk != NULL) { - clk_enable(mdp_clk); - MSM_FB_DEBUG("MDP CLK ON\n"); - } - if (mdp_pclk != NULL) { - clk_enable(mdp_pclk); - MSM_FB_DEBUG("MDP PCLK ON\n"); - } - } - up(&mdp_pipe_ctrl_mutex); - } -} - -#ifndef CONFIG_FB_MSM_MDP40 -irqreturn_t mdp_isr(int irq, void *ptr) -{ - uint32 mdp_interrupt = 0; - struct mdp_dma_data *dma; - - mdp_is_in_isr = TRUE; - do { - mdp_interrupt = inp32(MDP_INTR_STATUS); - outp32(MDP_INTR_CLEAR, mdp_interrupt); - - mdp_interrupt &= mdp_intr_mask; - - if (mdp_interrupt & TV_ENC_UNDERRUN) { - mdp_interrupt &= ~(TV_ENC_UNDERRUN); - mdp_tv_underflow_cnt++; - } - - if (!mdp_interrupt) - break; - - /* DMA3 TV-Out Start */ - if (mdp_interrupt & TV_OUT_DMA3_START) { - /* let's disable TV out interrupt */ - mdp_intr_mask &= ~TV_OUT_DMA3_START; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - - dma = &dma3_data; - if (dma->waiting) { - dma->waiting = FALSE; - complete(&dma->comp); - } - } -#ifndef CONFIG_FB_MSM_MDP22 - if (mdp_interrupt & MDP_HIST_DONE) { - outp32(MDP_BASE + 0x94018, 0x3); - outp32(MDP_INTR_CLEAR, MDP_HIST_DONE); - if (mdp_hist.r) - memcpy(mdp_hist.r, MDP_BASE + 0x94100, - mdp_hist.bin_cnt*4); - if (mdp_hist.g) - memcpy(mdp_hist.g, MDP_BASE + 0x94200, - mdp_hist.bin_cnt*4); - if (mdp_hist.b) - memcpy(mdp_hist.b, MDP_BASE + 0x94300, - mdp_hist.bin_cnt*4); - complete(&mdp_hist_comp); - } - - /* LCDC UnderFlow */ - if (mdp_interrupt & LCDC_UNDERFLOW) { - mdp_lcdc_underflow_cnt++; - } - /* LCDC Frame Start */ - if (mdp_interrupt & LCDC_FRAME_START) { - /* let's disable LCDC interrupt */ - mdp_intr_mask &= ~LCDC_FRAME_START; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - - dma = &dma2_data; - if (dma->waiting) { - dma->waiting = FALSE; - complete(&dma->comp); - } - } - - /* DMA2 LCD-Out Complete */ - if (mdp_interrupt & MDP_DMA_S_DONE) { - dma = &dma_s_data; - dma->busy = FALSE; - mdp_pipe_ctrl(MDP_DMA_S_BLOCK, MDP_BLOCK_POWER_OFF, - TRUE); - complete(&dma->comp); - } -#endif - - /* DMA2 LCD-Out Complete */ - if (mdp_interrupt & MDP_DMA_P_DONE) { - struct timeval now; - ktime_t now_k; - - now_k = ktime_get_real(); - mdp_dma2_last_update_time.tv.sec = - now_k.tv.sec - mdp_dma2_last_update_time.tv.sec; - mdp_dma2_last_update_time.tv.nsec = - now_k.tv.nsec - mdp_dma2_last_update_time.tv.nsec; - - if (mdp_debug[MDP_DMA2_BLOCK]) { - jiffies_to_timeval(jiffies, &now); - mdp_dma2_timeval.tv_usec = - now.tv_usec - mdp_dma2_timeval.tv_usec; - } - - dma = &dma2_data; - dma->busy = FALSE; - mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF, - TRUE); - complete(&dma->comp); - } - /* PPP Complete */ - if (mdp_interrupt & MDP_PPP_DONE) { -#ifdef CONFIG_MDP_PPP_ASYNC_OP - mdp_ppp_djob_done(); -#else - mdp_pipe_ctrl(MDP_PPP_BLOCK, - MDP_BLOCK_POWER_OFF, TRUE); - if (mdp_ppp_waiting) { - mdp_ppp_waiting = FALSE; - complete(&mdp_ppp_comp); - } -#endif - } - } while (1); - - mdp_is_in_isr = FALSE; - - return IRQ_HANDLED; -} -#endif - -static void mdp_drv_init(void) -{ - int i; - - for (i = 0; i < MDP_MAX_BLOCK; i++) { - mdp_debug[i] = 0; - } - - /* initialize spin lock and workqueue */ - spin_lock_init(&mdp_spin_lock); - mdp_dma_wq = create_singlethread_workqueue("mdp_dma_wq"); - mdp_vsync_wq = create_singlethread_workqueue("mdp_vsync_wq"); - mdp_pipe_ctrl_wq = create_singlethread_workqueue("mdp_pipe_ctrl_wq"); - INIT_DELAYED_WORK(&mdp_pipe_ctrl_worker, - mdp_pipe_ctrl_workqueue_handler); -#ifdef CONFIG_MDP_PPP_ASYNC_OP - mdp_ppp_dq_init(); -#endif - - /* initialize semaphore */ - init_completion(&mdp_ppp_comp); - sema_init(&mdp_ppp_mutex, 1); - sema_init(&mdp_pipe_ctrl_mutex, 1); - - dma2_data.busy = FALSE; - dma2_data.waiting = FALSE; - init_completion(&dma2_data.comp); - sema_init(&dma2_data.mutex, 1); - mutex_init(&dma2_data.ov_mutex); - - dma3_data.busy = FALSE; - dma3_data.waiting = FALSE; - init_completion(&dma3_data.comp); - sema_init(&dma3_data.mutex, 1); - - dma_s_data.busy = FALSE; - dma_s_data.waiting = FALSE; - init_completion(&dma_s_data.comp); - sema_init(&dma_s_data.mutex, 1); - - dma_e_data.busy = FALSE; - dma_e_data.waiting = FALSE; - init_completion(&dma_e_data.comp); - -#ifndef CONFIG_FB_MSM_MDP22 - init_completion(&mdp_hist_comp); -#endif - - /* initializing mdp power block counter to 0 */ - for (i = 0; i < MDP_MAX_BLOCK; i++) { - mdp_block_power_cnt[i] = 0; - } - -#ifdef MSM_FB_ENABLE_DBGFS - { - struct dentry *root; - char sub_name[] = "mdp"; - - root = msm_fb_get_debugfs_root(); - if (root != NULL) { - mdp_dir = debugfs_create_dir(sub_name, root); - - if (mdp_dir) { - msm_fb_debugfs_file_create(mdp_dir, - "dma2_update_time_in_usec", - (u32 *) &mdp_dma2_update_time_in_usec); - msm_fb_debugfs_file_create(mdp_dir, - "vs_rdcnt_slow", - (u32 *) &mdp_lcd_rd_cnt_offset_slow); - msm_fb_debugfs_file_create(mdp_dir, - "vs_rdcnt_fast", - (u32 *) &mdp_lcd_rd_cnt_offset_fast); - msm_fb_debugfs_file_create(mdp_dir, - "mdp_usec_diff_threshold", - (u32 *) &mdp_usec_diff_threshold); - msm_fb_debugfs_file_create(mdp_dir, - "mdp_current_clk_on", - (u32 *) &mdp_current_clk_on); -#ifdef CONFIG_FB_MSM_LCDC - msm_fb_debugfs_file_create(mdp_dir, - "lcdc_start_x", - (u32 *) &first_pixel_start_x); - msm_fb_debugfs_file_create(mdp_dir, - "lcdc_start_y", - (u32 *) &first_pixel_start_y); - msm_fb_debugfs_file_create(mdp_dir, - "mdp_lcdc_pclk_clk_rate", - (u32 *) &mdp_lcdc_pclk_clk_rate); - msm_fb_debugfs_file_create(mdp_dir, - "mdp_lcdc_pad_pclk_clk_rate", - (u32 *) &mdp_lcdc_pad_pclk_clk_rate); -#endif - } - } - } -#endif -} - -static int mdp_probe(struct platform_device *pdev); -static int mdp_remove(struct platform_device *pdev); - -static struct platform_driver mdp_driver = { - .probe = mdp_probe, - .remove = mdp_remove, -#ifndef CONFIG_HAS_EARLYSUSPEND - .suspend = mdp_suspend, - .resume = NULL, -#endif - .shutdown = NULL, - .driver = { - /* - * Driver name must match the device name added in - * platform.c. - */ - .name = "mdp", - }, -}; - -static int mdp_off(struct platform_device *pdev) -{ - int ret = 0; - -#ifdef MDP_HW_VSYNC - struct msm_fb_data_type *mfd = platform_get_drvdata(pdev); -#endif - - ret = panel_next_off(pdev); - -#ifdef MDP_HW_VSYNC - mdp_hw_vsync_clk_disable(mfd); -#endif - - return ret; -} - -static int mdp_on(struct platform_device *pdev) -{ -#ifdef MDP_HW_VSYNC - struct msm_fb_data_type *mfd = platform_get_drvdata(pdev); -#endif - - int ret = 0; - -#ifdef MDP_HW_VSYNC - mdp_hw_vsync_clk_enable(mfd); -#endif - - ret = panel_next_on(pdev); - - return ret; -} - -static int mdp_irq_clk_setup(void) -{ - int ret; - -#ifdef CONFIG_FB_MSM_MDP40 - ret = request_irq(INT_MDP, mdp4_isr, IRQF_DISABLED, "MDP", 0); -#else - ret = request_irq(INT_MDP, mdp_isr, IRQF_DISABLED, "MDP", 0); -#endif - if (ret) { - printk(KERN_ERR "mdp request_irq() failed!\n"); - return ret; - } - disable_irq(INT_MDP); - - mdp_clk = clk_get(NULL, "mdp_clk"); - - if (IS_ERR(mdp_clk)) { - ret = PTR_ERR(mdp_clk); - printk(KERN_ERR "can't get mdp_clk error:%d!\n", ret); - free_irq(INT_MDP, 0); - return ret; - } - - mdp_pclk = clk_get(NULL, "mdp_pclk"); - if (IS_ERR(mdp_pclk)) - mdp_pclk = NULL; - - -#ifdef CONFIG_FB_MSM_MDP40 - /* - * mdp_clk should greater than mdp_pclk always - */ - clk_set_rate(mdp_clk, 122880000); /* 122.88 Mhz */ - printk(KERN_INFO "mdp_clk: mdp_clk=%d mdp_pclk=%d\n", - (int)clk_get_rate(mdp_clk), (int)clk_get_rate(mdp_pclk)); -#endif - - return 0; -} - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; -static int mdp_resource_initialized; -static struct msm_panel_common_pdata *mdp_pdata; - -static int mdp_probe(struct platform_device *pdev) -{ - struct platform_device *msm_fb_dev = NULL; - struct msm_fb_data_type *mfd; - struct msm_fb_panel_data *pdata = NULL; - int rc; - resource_size_t size ; -#ifdef CONFIG_FB_MSM_MDP40 - int intf, if_no; -#else - unsigned long flag; -#endif - - if ((pdev->id == 0) && (pdev->num_resources > 0)) { - mdp_pdata = pdev->dev.platform_data; - - size = resource_size(&pdev->resource[0]); - msm_mdp_base = ioremap(pdev->resource[0].start, size); - - MSM_FB_INFO("MDP HW Base phy_Address = 0x%x virt = 0x%x\n", - (int)pdev->resource[0].start, (int)msm_mdp_base); - - if (unlikely(!msm_mdp_base)) - return -ENOMEM; - - printk("irq clk setup\n"); - rc = mdp_irq_clk_setup(); - printk("irq clk setup done\n"); - if (rc) - return rc; - - /* initializing mdp hw */ -#ifdef CONFIG_FB_MSM_MDP40 - mdp4_hw_init(); -#else - mdp_hw_init(); -#endif - - mdp_resource_initialized = 1; - return 0; - } - - if (!mdp_resource_initialized) - return -EPERM; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - msm_fb_dev = platform_device_alloc("msm_fb", pdev->id); - if (!msm_fb_dev) - return -ENOMEM; - - /* link to the latest pdev */ - mfd->pdev = msm_fb_dev; - - /* add panel data */ - if (platform_device_add_data - (msm_fb_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "mdp_probe: platform_device_add_data failed!\n"); - rc = -ENOMEM; - goto mdp_probe_err; - } - /* data chain */ - pdata = msm_fb_dev->dev.platform_data; - pdata->on = mdp_on; - pdata->off = mdp_off; - pdata->next = pdev; - - switch (mfd->panel.type) { - case EXT_MDDI_PANEL: - case MDDI_PANEL: - case EBI2_PANEL: - INIT_WORK(&mfd->dma_update_worker, - mdp_lcd_update_workqueue_handler); - INIT_WORK(&mfd->vsync_resync_worker, - mdp_vsync_resync_workqueue_handler); - mfd->hw_refresh = FALSE; - - if (mfd->panel.type == EXT_MDDI_PANEL) { - /* 15 fps -> 66 msec */ - mfd->refresh_timer_duration = (66 * HZ / 1000); - } else { - /* 24 fps -> 42 msec */ - mfd->refresh_timer_duration = (42 * HZ / 1000); - } - -#ifdef CONFIG_FB_MSM_MDP22 - mfd->dma_fnc = mdp_dma2_update; - mfd->dma = &dma2_data; -#else - if (mfd->panel_info.pdest == DISPLAY_1) { -#ifdef CONFIG_FB_MSM_OVERLAY - mfd->dma_fnc = mdp4_mddi_overlay; -#else - mfd->dma_fnc = mdp_dma2_update; -#endif - mfd->dma = &dma2_data; - mfd->lut_update = mdp_lut_update_nonlcdc; - mfd->do_histogram = mdp_do_histogram; - } else { - mfd->dma_fnc = mdp_dma_s_update; - mfd->dma = &dma_s_data; - } -#endif - if (mdp_pdata) - mfd->vsync_gpio = mdp_pdata->gpio; - else - mfd->vsync_gpio = -1; - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == EBI2_PANEL) - intf = EBI2_INTF; - else - intf = MDDI_INTF; - - if (mfd->panel_info.pdest == DISPLAY_1) - if_no = PRIMARY_INTF_SEL; - else - if_no = SECONDARY_INTF_SEL; - - mdp4_display_intf_sel(if_no, intf); -#endif - mdp_config_vsync(mfd); - break; - - case HDMI_PANEL: - case LCDC_PANEL: - pdata->on = mdp_lcdc_on; - pdata->off = mdp_lcdc_off; - mfd->hw_refresh = TRUE; - mfd->cursor_update = mdp_hw_cursor_update; -#ifndef CONFIG_FB_MSM_MDP22 - mfd->lut_update = mdp_lut_update_lcdc; - mfd->do_histogram = mdp_do_histogram; -#endif -#ifdef CONFIG_FB_MSM_OVERLAY - mfd->dma_fnc = mdp4_lcdc_overlay; -#else - mfd->dma_fnc = mdp_lcdc_update; -#endif - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == HDMI_PANEL) { - mfd->dma = &dma_e_data; - mdp4_display_intf_sel(EXTERNAL_INTF_SEL, LCDC_RGB_INTF); - } else { - mfd->dma = &dma2_data; - mdp4_display_intf_sel(PRIMARY_INTF_SEL, LCDC_RGB_INTF); - } -#else - mfd->dma = &dma2_data; - spin_lock_irqsave(&mdp_spin_lock, flag); - mdp_intr_mask &= ~MDP_DMA_P_DONE; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - spin_unlock_irqrestore(&mdp_spin_lock, flag); -#endif - break; - - case TV_PANEL: - pdata->on = mdp_dma3_on; - pdata->off = mdp_dma3_off; - mfd->hw_refresh = TRUE; - mfd->dma_fnc = mdp_dma3_update; - mfd->dma = &dma3_data; - break; - - default: - printk(KERN_ERR "mdp_probe: unknown device type!\n"); - rc = -ENODEV; - goto mdp_probe_err; - } - - /* set driver data */ - platform_set_drvdata(msm_fb_dev, mfd); - - rc = platform_device_add(msm_fb_dev); - if (rc) { - goto mdp_probe_err; - } - - pdev_list[pdev_list_cnt++] = pdev; - return 0; - - mdp_probe_err: - platform_device_put(msm_fb_dev); - return rc; -} - -static void mdp_suspend_sub(void) -{ - /* cancel pipe ctrl worker */ - cancel_delayed_work(&mdp_pipe_ctrl_worker); - - /* for workder can't be cancelled... */ - flush_workqueue(mdp_pipe_ctrl_wq); - - /* let's wait for PPP completion */ - while (mdp_block_power_cnt[MDP_PPP_BLOCK] > 0) ; - - /* try to power down */ - mdp_pipe_ctrl(MDP_MASTER_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); -} - -#if defined(CONFIG_PM) && !defined(CONFIG_HAS_EARLYSUSPEND) -static int mdp_suspend(struct platform_device *pdev, pm_message_t state) -{ - mdp_suspend_sub(); - return 0; -} -#endif - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void mdp_early_suspend(struct early_suspend *h) -{ - mdp_suspend_sub(); -} -#endif - -static int mdp_remove(struct platform_device *pdev) -{ - iounmap(msm_mdp_base); - return 0; -} - -static int mdp_register_driver(void) -{ -#ifdef CONFIG_HAS_EARLYSUSPEND - early_suspend.level = EARLY_SUSPEND_LEVEL_DISABLE_FB - 1; - early_suspend.suspend = mdp_early_suspend; - register_early_suspend(&early_suspend); -#endif - - return platform_driver_register(&mdp_driver); -} - -static int __init mdp_driver_init(void) -{ - int ret; - - mdp_drv_init(); - - ret = mdp_register_driver(); - if (ret) { - printk(KERN_ERR "mdp_register_driver() failed!\n"); - return ret; - } - -#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_FB_MSM_MDP40) - mdp4_debugfs_init(); -#endif - - return 0; - -} - -module_init(mdp_driver_init); diff --git a/drivers/staging/msm/mdp.h b/drivers/staging/msm/mdp.h deleted file mode 100644 index 44b1147..0000000 --- a/drivers/staging/msm/mdp.h +++ /dev/null @@ -1,679 +0,0 @@ -/* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MDP_H -#define MDP_H - -#include -#include -#include -#include -#include -#include -#include -#include "msm_mdp.h" - -#include -#include - -#include -#include - -#include "msm_fb_panel.h" - -#ifdef CONFIG_MDP_PPP_ASYNC_OP -#include "mdp_ppp_dq.h" -#endif - -#ifdef BIT -#undef BIT -#endif - -#define BIT(x) (1<<(x)) - -#define MDPOP_NOP 0 -#define MDPOP_LR BIT(0) /* left to right flip */ -#define MDPOP_UD BIT(1) /* up and down flip */ -#define MDPOP_ROT90 BIT(2) /* rotate image to 90 degree */ -#define MDPOP_ROT180 (MDPOP_UD|MDPOP_LR) -#define MDPOP_ROT270 (MDPOP_ROT90|MDPOP_UD|MDPOP_LR) -#define MDPOP_ASCALE BIT(7) -#define MDPOP_ALPHAB BIT(8) /* enable alpha blending */ -#define MDPOP_TRANSP BIT(9) /* enable transparency */ -#define MDPOP_DITHER BIT(10) /* enable dither */ -#define MDPOP_SHARPENING BIT(11) /* enable sharpening */ -#define MDPOP_BLUR BIT(12) /* enable blur */ -#define MDPOP_FG_PM_ALPHA BIT(13) - -struct mdp_table_entry { - uint32_t reg; - uint32_t val; -}; - -extern struct mdp_ccs mdp_ccs_yuv2rgb ; -extern struct mdp_ccs mdp_ccs_rgb2yuv ; - -/* - * MDP Image Structure - */ -typedef struct mdpImg_ { - uint32 imgType; /* Image type */ - uint32 *bmy_addr; /* bitmap or y addr */ - uint32 *cbcr_addr; /* cbcr addr */ - uint32 width; /* image width */ - uint32 mdpOp; /* image opertion (rotation,flip up/down, alpha/tp) */ - uint32 tpVal; /* transparency color */ - uint32 alpha; /* alpha percentage 0%(0x0) ~ 100%(0x100) */ - int sp_value; /* sharpening strength */ -} MDPIMG; - -#ifdef CONFIG_MDP_PPP_ASYNC_OP -#define MDP_OUTP(addr, data) mdp_ppp_outdw((uint32_t)(addr), \ - (uint32_t)(data)) -#else -#define MDP_OUTP(addr, data) outpdw((addr), (data)) -#endif - -#define MDP_KTIME2USEC(kt) (kt.tv.sec*1000000 + kt.tv.nsec/1000) - -#define MDP_BASE msm_mdp_base - -typedef enum { - MDP_BC_SCALE_POINT2_POINT4, - MDP_BC_SCALE_POINT4_POINT6, - MDP_BC_SCALE_POINT6_POINT8, - MDP_BC_SCALE_POINT8_1, - MDP_BC_SCALE_UP, - MDP_PR_SCALE_POINT2_POINT4, - MDP_PR_SCALE_POINT4_POINT6, - MDP_PR_SCALE_POINT6_POINT8, - MDP_PR_SCALE_POINT8_1, - MDP_PR_SCALE_UP, - MDP_SCALE_BLUR, - MDP_INIT_SCALE -} MDP_SCALE_MODE; - -typedef enum { - MDP_BLOCK_POWER_OFF, - MDP_BLOCK_POWER_ON -} MDP_BLOCK_POWER_STATE; - -typedef enum { - MDP_MASTER_BLOCK, - MDP_CMD_BLOCK, - MDP_PPP_BLOCK, - MDP_DMA2_BLOCK, - MDP_DMA3_BLOCK, - MDP_DMA_S_BLOCK, - MDP_DMA_E_BLOCK, - MDP_OVERLAY0_BLOCK, - MDP_OVERLAY1_BLOCK, - MDP_MAX_BLOCK -} MDP_BLOCK_TYPE; - -/* Let's keep Q Factor power of 2 for optimization */ -#define MDP_SCALE_Q_FACTOR 512 - -#ifdef CONFIG_FB_MSM_MDP31 -#define MDP_MAX_X_SCALE_FACTOR (MDP_SCALE_Q_FACTOR*8) -#define MDP_MIN_X_SCALE_FACTOR (MDP_SCALE_Q_FACTOR/8) -#define MDP_MAX_Y_SCALE_FACTOR (MDP_SCALE_Q_FACTOR*8) -#define MDP_MIN_Y_SCALE_FACTOR (MDP_SCALE_Q_FACTOR/8) -#else -#define MDP_MAX_X_SCALE_FACTOR (MDP_SCALE_Q_FACTOR*4) -#define MDP_MIN_X_SCALE_FACTOR (MDP_SCALE_Q_FACTOR/4) -#define MDP_MAX_Y_SCALE_FACTOR (MDP_SCALE_Q_FACTOR*4) -#define MDP_MIN_Y_SCALE_FACTOR (MDP_SCALE_Q_FACTOR/4) -#endif - -/* SHIM Q Factor */ -#define PHI_Q_FACTOR 29 -#define PQF_PLUS_5 (PHI_Q_FACTOR + 5) /* due to 32 phases */ -#define PQF_PLUS_4 (PHI_Q_FACTOR + 4) -#define PQF_PLUS_2 (PHI_Q_FACTOR + 2) /* to get 4.0 */ -#define PQF_MINUS_2 (PHI_Q_FACTOR - 2) /* to get 0.25 */ -#define PQF_PLUS_5_PLUS_2 (PQF_PLUS_5 + 2) -#define PQF_PLUS_5_MINUS_2 (PQF_PLUS_5 - 2) - -#define MDP_CONVTP(tpVal) (((tpVal&0xF800)<<8)|((tpVal&0x7E0)<<5)|((tpVal&0x1F)<<3)) - -#define MDPOP_ROTATION (MDPOP_ROT90|MDPOP_LR|MDPOP_UD) -#define MDP_CHKBIT(val, bit) ((bit) == ((val) & (bit))) - -/* overlay interface API defines */ -typedef enum { - MORE_IBUF, - FINAL_IBUF, - COMPLETE_IBUF -} MDP_IBUF_STATE; - -struct mdp_dirty_region { - __u32 xoffset; /* source origin in the x-axis */ - __u32 yoffset; /* source origin in the y-axis */ - __u32 width; /* number of pixels in the x-axis */ - __u32 height; /* number of pixels in the y-axis */ -}; - -/* - * MDP extended data types - */ -typedef struct mdp_roi_s { - uint32 x; - uint32 y; - uint32 width; - uint32 height; - int32 lcd_x; - int32 lcd_y; - uint32 dst_width; - uint32 dst_height; -} MDP_ROI; - -typedef struct mdp_ibuf_s { - uint8 *buf; - uint32 bpp; - uint32 ibuf_type; - uint32 ibuf_width; - uint32 ibuf_height; - - MDP_ROI roi; - MDPIMG mdpImg; - - int32 dma_x; - int32 dma_y; - uint32 dma_w; - uint32 dma_h; - - uint32 vsync_enable; - uint32 visible_swapped; -} MDPIBUF; - -struct mdp_dma_data { - boolean busy; - boolean waiting; - struct mutex ov_mutex; - struct semaphore mutex; - struct completion comp; -}; - -#define MDP_CMD_DEBUG_ACCESS_BASE (MDP_BASE+0x10000) - -#define MDP_DMA2_TERM 0x1 -#define MDP_DMA3_TERM 0x2 -#define MDP_PPP_TERM 0x4 -#define MDP_DMA_S_TERM 0x8 -#ifdef CONFIG_FB_MSM_MDP40 -#define MDP_DMA_E_TERM 0x10 -#define MDP_OVERLAY0_TERM 0x20 -#define MDP_OVERLAY1_TERM 0x40 -#endif - -#define ACTIVE_START_X_EN BIT(31) -#define ACTIVE_START_Y_EN BIT(31) -#define ACTIVE_HIGH 0 -#define ACTIVE_LOW 1 -#define MDP_DMA_S_DONE BIT(2) -#define LCDC_FRAME_START BIT(15) -#define LCDC_UNDERFLOW BIT(16) - -#ifdef CONFIG_FB_MSM_MDP22 -#define MDP_DMA_P_DONE BIT(2) -#else -#define MDP_DMA_P_DONE BIT(14) -#endif - -#define MDP_PPP_DONE BIT(0) -#define TV_OUT_DMA3_DONE BIT(6) -#define TV_ENC_UNDERRUN BIT(7) -#define TV_OUT_DMA3_START BIT(13) -#define MDP_HIST_DONE BIT(20) - -#ifdef CONFIG_FB_MSM_MDP22 -#define MDP_ANY_INTR_MASK (MDP_PPP_DONE| \ - MDP_DMA_P_DONE| \ - TV_ENC_UNDERRUN) -#else -#define MDP_ANY_INTR_MASK (MDP_PPP_DONE| \ - MDP_DMA_P_DONE| \ - MDP_DMA_S_DONE| \ - LCDC_UNDERFLOW| \ - MDP_HIST_DONE| \ - TV_ENC_UNDERRUN) -#endif - -#define MDP_TOP_LUMA 16 -#define MDP_TOP_CHROMA 0 -#define MDP_BOTTOM_LUMA 19 -#define MDP_BOTTOM_CHROMA 3 -#define MDP_LEFT_LUMA 22 -#define MDP_LEFT_CHROMA 6 -#define MDP_RIGHT_LUMA 25 -#define MDP_RIGHT_CHROMA 9 - -#define CLR_G 0x0 -#define CLR_B 0x1 -#define CLR_R 0x2 -#define CLR_ALPHA 0x3 - -#define CLR_Y CLR_G -#define CLR_CB CLR_B -#define CLR_CR CLR_R - -/* from lsb to msb */ -#define MDP_GET_PACK_PATTERN(a,x,y,z,bit) (((a)<<(bit*3))|((x)<<(bit*2))|((y)< -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - - -#define MDP4_DEBUG_BUF 128 - - -static char mdp4_debug_buf[MDP4_DEBUG_BUF]; -static ulong mdp4_debug_offset; -static ulong mdp4_base_addr; - -static int mdp4_offset_set(void *data, u64 val) -{ - mdp4_debug_offset = (int)val; - return 0; -} - -static int mdp4_offset_get(void *data, u64 *val) -{ - *val = (u64)mdp4_debug_offset; - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE( - mdp4_offset_fops, - mdp4_offset_get, - mdp4_offset_set, - "%llx\n"); - - -static int mdp4_debugfs_release(struct inode *inode, struct file *file) -{ - return 0; -} - -static ssize_t mdp4_debugfs_write( - struct file *file, - const char __user *buff, - size_t count, - loff_t *ppos) -{ - int cnt; - unsigned int data; - - printk(KERN_INFO "%s: offset=%d count=%d *ppos=%d\n", - __func__, (int)mdp4_debug_offset, (int)count, (int)*ppos); - - if (count > sizeof(mdp4_debug_buf)) - return -EFAULT; - - if (copy_from_user(mdp4_debug_buf, buff, count)) - return -EFAULT; - - - mdp4_debug_buf[count] = 0; /* end of string */ - - cnt = sscanf(mdp4_debug_buf, "%x", &data); - if (cnt < 1) { - printk(KERN_ERR "%s: sscanf failed cnt=%d" , __func__, cnt); - return -EINVAL; - } - - writel(&data, mdp4_base_addr + mdp4_debug_offset); - - return 0; -} - -static ssize_t mdp4_debugfs_read( - struct file *file, - char __user *buff, - size_t count, - loff_t *ppos) -{ - int len = 0; - unsigned int data; - - printk(KERN_INFO "%s: offset=%d count=%d *ppos=%d\n", - __func__, (int)mdp4_debug_offset, (int)count, (int)*ppos); - - if (*ppos) - return 0; /* the end */ - - data = readl(mdp4_base_addr + mdp4_debug_offset); - - len = snprintf(mdp4_debug_buf, 4, "%x\n", data); - - if (len > 0) { - if (len > count) - len = count; - if (copy_to_user(buff, mdp4_debug_buf, len)) - return -EFAULT; - } - - printk(KERN_INFO "%s: len=%d\n", __func__, len); - - if (len < 0) - return 0; - - *ppos += len; /* increase offset */ - - return len; -} - -static const struct file_operations mdp4_debugfs_fops = { - .open = nonseekable_open, - .release = mdp4_debugfs_release, - .read = mdp4_debugfs_read, - .write = mdp4_debugfs_write, - .llseek = no_llseek, -}; - -int mdp4_debugfs_init(void) -{ - struct dentry *dent = debugfs_create_dir("mdp4", NULL); - - if (IS_ERR(dent)) { - printk(KERN_ERR "%s(%d): debugfs_create_dir fail, error %ld\n", - __FILE__, __LINE__, PTR_ERR(dent)); - return -1; - } - - if (debugfs_create_file("offset", 0644, dent, 0, &mdp4_offset_fops) - == NULL) { - printk(KERN_ERR "%s(%d): debugfs_create_file: offset fail\n", - __FILE__, __LINE__); - return -1; - } - - if (debugfs_create_file("regs", 0644, dent, 0, &mdp4_debugfs_fops) - == NULL) { - printk(KERN_ERR "%s(%d): debugfs_create_file: regs fail\n", - __FILE__, __LINE__); - return -1; - } - - mdp4_debug_offset = 0; - mdp4_base_addr = (ulong) msm_mdp_base; /* defined at msm_fb_def.h */ - - return 0; -} diff --git a/drivers/staging/msm/mdp4_overlay.c b/drivers/staging/msm/mdp4_overlay.c deleted file mode 100644 index b9acf52..0000000 --- a/drivers/staging/msm/mdp4_overlay.c +++ /dev/null @@ -1,1259 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "android_pmem.h" -#include -#include -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - - -struct mdp4_overlay_ctrl { - struct mdp4_overlay_pipe plist[MDP4_MAX_OVERLAY_PIPE]; - struct mdp4_overlay_pipe *stage[MDP4_MAX_MIXER][MDP4_MAX_STAGE]; -} mdp4_overlay_db; - -static struct mdp4_overlay_ctrl *ctrl = &mdp4_overlay_db; - - -void mdp4_overlay_dmap_cfg(struct msm_fb_data_type *mfd, int lcdc) -{ - uint32 dma2_cfg_reg; - - dma2_cfg_reg = DMA_DITHER_EN; - - if (mfd->fb_imgType == MDP_BGR_565) - dma2_cfg_reg |= DMA_PACK_PATTERN_BGR; - else - dma2_cfg_reg |= DMA_PACK_PATTERN_RGB; - - - if (mfd->panel_info.bpp == 18) { - dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */ - DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS; - } else if (mfd->panel_info.bpp == 16) { - dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */ - DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS; - } else { - dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */ - DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS; - } - - if (lcdc) - dma2_cfg_reg |= DMA_PACK_ALIGN_MSB; - - /* dma2 config register */ - MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg); - -} - -void mdp4_overlay_dmap_xy(struct mdp4_overlay_pipe *pipe) -{ - - /* dma_p source */ - MDP_OUTP(MDP_BASE + 0x90004, - (pipe->src_height << 16 | pipe->src_width)); - MDP_OUTP(MDP_BASE + 0x90008, pipe->srcp0_addr); - MDP_OUTP(MDP_BASE + 0x9000c, pipe->srcp0_ystride); - - /* dma_p dest */ - MDP_OUTP(MDP_BASE + 0x90010, (pipe->dst_y << 16 | pipe->dst_x)); -} - -#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000 -#define MDP4_VG_PHASE_STEP_SHIFT 29 - -static int mdp4_leading_0(uint32 num) -{ - uint32 bit = 0x80000000; - int i; - - for (i = 0; i < 32; i++) { - if (bit & num) - return i; - bit >>= 1; - } - - return i; -} - -static uint32 mdp4_scale_phase_step(int f_num, uint32 src, uint32 dst) -{ - uint32 val; - int n; - - n = mdp4_leading_0(src); - if (n > f_num) - n = f_num; - val = src << n; /* maximum to reduce lose of resolution */ - val /= dst; - if (n < f_num) { - n = f_num - n; - val <<= n; - } - - return val; -} - -static void mdp4_scale_setup(struct mdp4_overlay_pipe *pipe) -{ - - pipe->phasex_step = MDP4_VG_PHASE_STEP_DEFAULT; - pipe->phasey_step = MDP4_VG_PHASE_STEP_DEFAULT; - - if (pipe->dst_h && pipe->src_h != pipe->dst_h) { - if (pipe->dst_h >= pipe->src_h * 8) /* too much */ - return; - pipe->op_mode |= MDP4_OP_SCALEY_EN; - - if (pipe->pipe_type == OVERLAY_TYPE_VG) { - if (pipe->dst_h <= (pipe->src_h / 4)) - pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE; - else - pipe->op_mode |= MDP4_OP_SCALEY_FIR; - } - - pipe->phasey_step = mdp4_scale_phase_step(29, - pipe->src_h, pipe->dst_h); - } - - if (pipe->dst_w && pipe->src_w != pipe->dst_w) { - if (pipe->dst_w >= pipe->src_w * 8) /* too much */ - return; - pipe->op_mode |= MDP4_OP_SCALEX_EN; - - if (pipe->pipe_type == OVERLAY_TYPE_VG) { - if (pipe->dst_w <= (pipe->src_w / 4)) - pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE; - else - pipe->op_mode |= MDP4_OP_SCALEY_FIR; - } - - pipe->phasex_step = mdp4_scale_phase_step(29, - pipe->src_w, pipe->dst_w); - } -} - -void mdp4_overlay_rgb_setup(struct mdp4_overlay_pipe *pipe) -{ - char *rgb_base; - uint32 src_size, src_xy, dst_size, dst_xy; - uint32 format, pattern; - - rgb_base = MDP_BASE + MDP4_RGB_BASE; - rgb_base += (MDP4_RGB_OFF * pipe->pipe_num); - - src_size = ((pipe->src_h << 16) | pipe->src_w); - src_xy = ((pipe->src_y << 16) | pipe->src_x); - dst_size = ((pipe->dst_h << 16) | pipe->dst_w); - dst_xy = ((pipe->dst_y << 16) | pipe->dst_x); - - format = mdp4_overlay_format(pipe); - pattern = mdp4_overlay_unpack_pattern(pipe); - - pipe->op_mode |= MDP4_OP_IGC_LUT_EN; - - mdp4_scale_setup(pipe); - - outpdw(rgb_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */ - outpdw(rgb_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */ - outpdw(rgb_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */ - outpdw(rgb_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */ - - outpdw(rgb_base + 0x0010, pipe->srcp0_addr); - outpdw(rgb_base + 0x0040, pipe->srcp0_ystride); - - outpdw(rgb_base + 0x0050, format);/* MDP_RGB_SRC_FORMAT */ - outpdw(rgb_base + 0x0054, pattern);/* MDP_RGB_SRC_UNPACK_PATTERN */ - outpdw(rgb_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */ - outpdw(rgb_base + 0x005c, pipe->phasex_step); - outpdw(rgb_base + 0x0060, pipe->phasey_step); - - /* 16 bytes-burst x 3 req <= 48 bytes */ - outpdw(rgb_base + 0x1004, 0xc2); /* MDP_RGB_FETCH_CFG */ -} - -void mdp4_overlay_vg_setup(struct mdp4_overlay_pipe *pipe) -{ - char *vg_base; - uint32 frame_size, src_size, src_xy, dst_size, dst_xy; - uint32 format, pattern; - - vg_base = MDP_BASE + MDP4_VIDEO_BASE; - vg_base += (MDP4_VIDEO_OFF * pipe->pipe_num); - - frame_size = ((pipe->src_height << 16) | pipe->src_width); - src_size = ((pipe->src_h << 16) | pipe->src_w); - src_xy = ((pipe->src_y << 16) | pipe->src_x); - dst_size = ((pipe->dst_h << 16) | pipe->dst_w); - dst_xy = ((pipe->dst_y << 16) | pipe->dst_x); - - format = mdp4_overlay_format(pipe); - pattern = mdp4_overlay_unpack_pattern(pipe); - - pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR | - MDP4_OP_IGC_LUT_EN); - - mdp4_scale_setup(pipe); - - outpdw(vg_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */ - outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */ - outpdw(vg_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */ - outpdw(vg_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */ - outpdw(vg_base + 0x0048, frame_size); /* TILE frame size */ - - /* luma component plane */ - outpdw(vg_base + 0x0010, pipe->srcp0_addr); - - /* chroma component plane */ - outpdw(vg_base + 0x0014, pipe->srcp1_addr); - - outpdw(vg_base + 0x0040, - pipe->srcp1_ystride << 16 | pipe->srcp0_ystride); - - outpdw(vg_base + 0x0050, format); /* MDP_RGB_SRC_FORMAT */ - outpdw(vg_base + 0x0054, pattern); /* MDP_RGB_SRC_UNPACK_PATTERN */ - outpdw(vg_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */ - outpdw(vg_base + 0x005c, pipe->phasex_step); - outpdw(vg_base + 0x0060, pipe->phasey_step); - - if (pipe->op_mode & MDP4_OP_DITHER_EN) { - outpdw(vg_base + 0x0068, - pipe->r_bit << 4 | pipe->b_bit << 2 | pipe->g_bit); - } - - /* 16 bytes-burst x 3 req <= 48 bytes */ - outpdw(vg_base + 0x1004, 0xc2); /* MDP_VG_FETCH_CFG */ -} - -int mdp4_overlay_format2type(uint32 format) -{ - switch (format) { - case MDP_RGB_565: - case MDP_RGB_888: - case MDP_BGR_565: - case MDP_ARGB_8888: - case MDP_RGBA_8888: - case MDP_BGRA_8888: - return OVERLAY_TYPE_RGB; - case MDP_YCRYCB_H2V1: - case MDP_Y_CRCB_H2V1: - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V2: - case MDP_Y_CBCR_H2V2: - case MDP_Y_CBCR_H2V2_TILE: - case MDP_Y_CRCB_H2V2_TILE: - return OVERLAY_TYPE_VG; - default: - return -ERANGE; - } - -} - -#define C3_ALPHA 3 /* alpha */ -#define C2_R_Cr 2 /* R/Cr */ -#define C1_B_Cb 1 /* B/Cb */ -#define C0_G_Y 0 /* G/luma */ - -int mdp4_overlay_format2pipe(struct mdp4_overlay_pipe *pipe) -{ - switch (pipe->src_format) { - case MDP_RGB_565: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 0; - pipe->r_bit = 1; /* R, 5 bits */ - pipe->b_bit = 1; /* B, 5 bits */ - pipe->g_bit = 2; /* G, 6 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 2; - pipe->element2 = C2_R_Cr; /* R */ - pipe->element1 = C0_G_Y; /* G */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->bpp = 2; /* 2 bpp */ - break; - case MDP_RGB_888: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 0; - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 2; - pipe->element2 = C2_R_Cr; /* R */ - pipe->element1 = C0_G_Y; /* G */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->bpp = 3; /* 3 bpp */ - break; - case MDP_BGR_565: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 0; - pipe->r_bit = 1; /* R, 5 bits */ - pipe->b_bit = 1; /* B, 5 bits */ - pipe->g_bit = 2; /* G, 6 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 2; - pipe->element2 = C1_B_Cb; /* B */ - pipe->element1 = C0_G_Y; /* G */ - pipe->element0 = C2_R_Cr; /* R */ - pipe->bpp = 2; /* 2 bpp */ - break; - case MDP_ARGB_8888: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 3; /* alpha, 4 bits */ - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 1; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 3; - pipe->element3 = C3_ALPHA; /* alpha */ - pipe->element2 = C2_R_Cr; /* R */ - pipe->element1 = C0_G_Y; /* G */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->bpp = 4; /* 4 bpp */ - break; - case MDP_RGBA_8888: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 3; /* alpha, 4 bits */ - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 1; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 3; - pipe->element3 = C2_R_Cr; /* R */ - pipe->element2 = C0_G_Y; /* G */ - pipe->element1 = C1_B_Cb; /* B */ - pipe->element0 = C3_ALPHA; /* alpha */ - pipe->bpp = 4; /* 4 bpp */ - break; - case MDP_BGRA_8888: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 3; /* alpha, 4 bits */ - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 1; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 3; - pipe->element3 = C1_B_Cb; /* B */ - pipe->element2 = C0_G_Y; /* G */ - pipe->element1 = C2_R_Cr; /* R */ - pipe->element0 = C3_ALPHA; /* alpha */ - pipe->bpp = 4; /* 4 bpp */ - break; - case MDP_YCRYCB_H2V1: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED; - pipe->a_bit = 0; /* alpha, 4 bits */ - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 3; - pipe->element3 = C0_G_Y; /* G */ - pipe->element2 = C2_R_Cr; /* R */ - pipe->element1 = C0_G_Y; /* G */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->bpp = 2; /* 2 bpp */ - pipe->chroma_sample = MDP4_CHROMA_H2V1; - break; - case MDP_Y_CRCB_H2V1: - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V2: - case MDP_Y_CBCR_H2V2: - pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR; - pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR; - pipe->a_bit = 0; - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 1; /* 2 */ - pipe->element3 = C0_G_Y; /* not used */ - pipe->element2 = C0_G_Y; /* not used */ - if (pipe->src_format == MDP_Y_CRCB_H2V1) { - pipe->element1 = C2_R_Cr; /* R */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->chroma_sample = MDP4_CHROMA_H2V1; - } else if (pipe->src_format == MDP_Y_CBCR_H2V1) { - pipe->element1 = C1_B_Cb; /* B */ - pipe->element0 = C2_R_Cr; /* R */ - pipe->chroma_sample = MDP4_CHROMA_H2V1; - } else if (pipe->src_format == MDP_Y_CRCB_H2V2) { - pipe->element1 = C2_R_Cr; /* R */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->chroma_sample = MDP4_CHROMA_420; - } else if (pipe->src_format == MDP_Y_CBCR_H2V2) { - pipe->element1 = C1_B_Cb; /* B */ - pipe->element0 = C2_R_Cr; /* R */ - pipe->chroma_sample = MDP4_CHROMA_420; - } - pipe->bpp = 2; /* 2 bpp */ - break; - case MDP_Y_CBCR_H2V2_TILE: - case MDP_Y_CRCB_H2V2_TILE: - pipe->frame_format = MDP4_FRAME_FORMAT_VIDEO_SUPERTILE; - pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR; - pipe->a_bit = 0; - pipe->r_bit = 3; /* R, 8 bits */ - pipe->b_bit = 3; /* B, 8 bits */ - pipe->g_bit = 3; /* G, 8 bits */ - pipe->alpha_enable = 0; - pipe->unpack_tight = 1; - pipe->unpack_align_msb = 0; - pipe->unpack_count = 1; /* 2 */ - pipe->element3 = C0_G_Y; /* not used */ - pipe->element2 = C0_G_Y; /* not used */ - if (pipe->src_format == MDP_Y_CRCB_H2V2_TILE) { - pipe->element1 = C2_R_Cr; /* R */ - pipe->element0 = C1_B_Cb; /* B */ - pipe->chroma_sample = MDP4_CHROMA_420; - } else if (pipe->src_format == MDP_Y_CBCR_H2V2_TILE) { - pipe->element1 = C1_B_Cb; /* B */ - pipe->element0 = C2_R_Cr; /* R */ - pipe->chroma_sample = MDP4_CHROMA_420; - } - pipe->bpp = 2; /* 2 bpp */ - break; - default: - /* not likely */ - return -ERANGE; - } - - return 0; -} - -/* - * color_key_convert: output with 12 bits color key - */ -static uint32 color_key_convert(int start, int num, uint32 color) -{ - - uint32 data; - - data = (color >> start) & ((1 << num) - 1); - - if (num == 5) - data = (data << 7) + (data << 2) + (data >> 3); - else if (num == 6) - data = (data << 6) + data; - else /* 8 bits */ - data = (data << 4) + (data >> 4); - - return data; - -} - -void transp_color_key(int format, uint32 transp, - uint32 *c0, uint32 *c1, uint32 *c2) -{ - int b_start, g_start, r_start; - int b_num, g_num, r_num; - - switch (format) { - case MDP_RGB_565: - b_start = 0; - g_start = 5; - r_start = 11; - r_num = 5; - g_num = 6; - b_num = 5; - break; - case MDP_RGB_888: - case MDP_XRGB_8888: - case MDP_ARGB_8888: - b_start = 0; - g_start = 8; - r_start = 16; - r_num = 8; - g_num = 8; - b_num = 8; - break; - case MDP_BGR_565: - b_start = 11; - g_start = 5; - r_start = 0; - r_num = 5; - g_num = 6; - b_num = 5; - break; - case MDP_Y_CBCR_H2V2: - case MDP_Y_CBCR_H2V1: - b_start = 8; - g_start = 16; - r_start = 0; - r_num = 8; - g_num = 8; - b_num = 8; - break; - case MDP_Y_CRCB_H2V2: - case MDP_Y_CRCB_H2V1: - b_start = 0; - g_start = 16; - r_start = 8; - r_num = 8; - g_num = 8; - b_num = 8; - break; - default: - b_start = 0; - g_start = 8; - r_start = 16; - r_num = 8; - g_num = 8; - b_num = 8; - break; - } - - *c0 = color_key_convert(g_start, g_num, transp); - *c1 = color_key_convert(b_start, b_num, transp); - *c2 = color_key_convert(r_start, r_num, transp); -} - -uint32 mdp4_overlay_format(struct mdp4_overlay_pipe *pipe) -{ - uint32 format; - - format = 0; - - if (pipe->solid_fill) - format |= MDP4_FORMAT_SOLID_FILL; - - if (pipe->unpack_align_msb) - format |= MDP4_FORMAT_UNPACK_ALIGN_MSB; - - if (pipe->unpack_tight) - format |= MDP4_FORMAT_UNPACK_TIGHT; - - if (pipe->alpha_enable) - format |= MDP4_FORMAT_ALPHA_ENABLE; - - format |= (pipe->unpack_count << 13); - format |= ((pipe->bpp - 1) << 9); - format |= (pipe->a_bit << 6); - format |= (pipe->r_bit << 4); - format |= (pipe->b_bit << 2); - format |= pipe->g_bit; - - format |= (pipe->frame_format << 29); - - if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) { - /* video/graphic */ - format |= (pipe->fetch_plane << 19); - format |= (pipe->chroma_site << 28); - format |= (pipe->chroma_sample << 26); - } - - return format; -} - -uint32 mdp4_overlay_unpack_pattern(struct mdp4_overlay_pipe *pipe) -{ - return (pipe->element3 << 24) | (pipe->element2 << 16) | - (pipe->element1 << 8) | pipe->element0; -} - -void mdp4_overlayproc_cfg(struct mdp4_overlay_pipe *pipe) -{ - uint32 data; - char *overlay_base; - - if (pipe->mixer_num == MDP4_MIXER1) - overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */ - else - overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */ - - /* MDP_OVERLAYPROC_CFG */ - outpdw(overlay_base + 0x0004, 0x01); /* directout */ - data = pipe->src_height; - data <<= 16; - data |= pipe->src_width; - outpdw(overlay_base + 0x0008, data); /* ROI, height + width */ - outpdw(overlay_base + 0x000c, pipe->srcp0_addr); - outpdw(overlay_base + 0x0010, pipe->srcp0_ystride); - outpdw(overlay_base + 0x0014, 0x4); /* GC_LUT_EN, 888 */ -} - -int mdp4_overlay_active(int mixer) -{ - uint32 data, mask, i; - int p1, p2; - - data = inpdw(MDP_BASE + 0x10100); - p1 = 0; - p2 = 0; - for (i = 0; i < 8; i++) { - mask = data & 0x0f; - if (mask) { - if (mask <= 4) - p1++; - else - p2++; - } - data >>= 4; - } - - if (mixer) - return p2; - else - return p1; -} - -void mdp4_mixer_stage_up(struct mdp4_overlay_pipe *pipe) -{ - uint32 data, mask, snum, stage, mixer; - - stage = pipe->mixer_stage; - mixer = pipe->mixer_num; - - /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */ - data = inpdw(MDP_BASE + 0x10100); - - if (mixer == MDP4_MIXER1) - stage += 8; - - if (pipe->pipe_type == OVERLAY_TYPE_VG) {/* VG1 and VG2 */ - snum = 0; - snum += (4 * pipe->pipe_num); - } else { - snum = 8; - snum += (4 * pipe->pipe_num); /* RGB1 and RGB2 */ - } - - mask = 0x0f; - mask <<= snum; - stage <<= snum; - data &= ~mask; /* clear old bits */ - - data |= stage; - - outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */ - - data = inpdw(MDP_BASE + 0x10100); - - ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = pipe; /* keep it */ -} - -void mdp4_mixer_stage_down(struct mdp4_overlay_pipe *pipe) -{ - uint32 data, mask, snum, stage, mixer; - - stage = pipe->mixer_stage; - mixer = pipe->mixer_num; - - if (pipe != ctrl->stage[mixer][stage]) /* not running */ - return; - - /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */ - data = inpdw(MDP_BASE + 0x10100); - - if (mixer == MDP4_MIXER1) - stage += 8; - - if (pipe->pipe_type == OVERLAY_TYPE_VG) {/* VG1 and VG2 */ - snum = 0; - snum += (4 * pipe->pipe_num); - } else { - snum = 8; - snum += (4 * pipe->pipe_num); /* RGB1 and RGB2 */ - } - - mask = 0x0f; - mask <<= snum; - data &= ~mask; /* clear old bits */ - - outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */ - - data = inpdw(MDP_BASE + 0x10100); - - ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL; /* clear it */ -} - -void mdp4_mixer_blend_setup(struct mdp4_overlay_pipe *pipe) -{ - unsigned char *overlay_base; - uint32 c0, c1, c2, blend_op; - int off; - - if (pipe->mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */ - overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */ - else - overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */ - - /* stage 0 to stage 2 */ - off = 0x20 * (pipe->mixer_stage - MDP4_MIXER_STAGE0); - - blend_op = 0; - if (pipe->alpha_enable) /* ARGB */ - blend_op = MDP4_BLEND_FG_ALPHA_FG_PIXEL | - MDP4_BLEND_BG_ALPHA_FG_PIXEL; - else - blend_op = (MDP4_BLEND_BG_ALPHA_BG_CONST | - MDP4_BLEND_FG_ALPHA_FG_CONST); - - - if (pipe->alpha_enable == 0) { /* not ARGB */ - if (pipe->is_fg) { - outpdw(overlay_base + off + 0x108, pipe->alpha); - outpdw(overlay_base + off + 0x10c, 0xff - pipe->alpha); - } else { - outpdw(overlay_base + off + 0x108, 0xff - pipe->alpha); - outpdw(overlay_base + off + 0x10c, pipe->alpha); - } - } - - if (pipe->transp != MDP_TRANSP_NOP) { - transp_color_key(pipe->src_format, pipe->transp, &c0, &c1, &c2); - if (pipe->is_fg) { - blend_op |= MDP4_BLEND_FG_TRANSP_EN; /* Fg blocked */ - /* lower limit */ - if (c0 > 0x10) - c0 -= 0x10; - if (c1 > 0x10) - c1 -= 0x10; - if (c2 > 0x10) - c2 -= 0x10; - outpdw(overlay_base + off + 0x110, - (c1 << 16 | c0));/* low */ - outpdw(overlay_base + off + 0x114, c2);/* low */ - /* upper limit */ - if ((c0 + 0x20) < 0x0fff) - c0 += 0x20; - else - c0 = 0x0fff; - if ((c1 + 0x20) < 0x0fff) - c1 += 0x20; - else - c1 = 0x0fff; - if ((c2 + 0x20) < 0x0fff) - c2 += 0x20; - else - c2 = 0x0fff; - outpdw(overlay_base + off + 0x118, - (c1 << 16 | c0));/* high */ - outpdw(overlay_base + off + 0x11c, c2);/* high */ - } else { - blend_op |= MDP4_BLEND_BG_TRANSP_EN; /* bg blocked */ - /* lower limit */ - if (c0 > 0x10) - c0 -= 0x10; - if (c1 > 0x10) - c1 -= 0x10; - if (c2 > 0x10) - c2 -= 0x10; - outpdw(overlay_base + 0x180, - (c1 << 16 | c0));/* low */ - outpdw(overlay_base + 0x184, c2);/* low */ - /* upper limit */ - if ((c0 + 0x20) < 0x0fff) - c0 += 0x20; - else - c0 = 0x0fff; - if ((c1 + 0x20) < 0x0fff) - c1 += 0x20; - else - c1 = 0x0fff; - if ((c2 + 0x20) < 0x0fff) - c2 += 0x20; - else - c2 = 0x0fff; - outpdw(overlay_base + 0x188, - (c1 << 16 | c0));/* high */ - outpdw(overlay_base + 0x18c, c2);/* high */ - } - } - outpdw(overlay_base + off + 0x104, blend_op); -} - -void mdp4_overlay_reg_flush(struct mdp4_overlay_pipe *pipe, int all) -{ - uint32 bits = 0; - - if (pipe->mixer_num == MDP4_MIXER1) - bits |= 0x02; - else - bits |= 0x01; - - if (all) { - if (pipe->pipe_type == OVERLAY_TYPE_RGB) { - if (pipe->pipe_num == OVERLAY_PIPE_RGB2) - bits |= 0x20; - else - bits |= 0x10; - } else { - if (pipe->pipe_num == OVERLAY_PIPE_VG2) - bits |= 0x08; - else - bits |= 0x04; - } - } - - outpdw(MDP_BASE + 0x18000, bits); /* MDP_OVERLAY_REG_FLUSH */ - - while (inpdw(MDP_BASE + 0x18000) & bits) /* self clear when complete */ - ; -} - -struct mdp4_overlay_pipe *mdp4_overlay_ndx2pipe(int ndx) -{ - struct mdp4_overlay_pipe *pipe; - - if (ndx == 0 || ndx >= MDP4_MAX_OVERLAY_PIPE) - return NULL; - - pipe = &ctrl->plist[ndx - 1]; /* ndx start from 1 */ - - if (pipe->pipe_ndx == 0) - return NULL; - - return pipe; -} - -struct mdp4_overlay_pipe *mdp4_overlay_pipe_alloc(void) -{ - int i; - struct mdp4_overlay_pipe *pipe; - - pipe = &ctrl->plist[0]; - for (i = 0; i < MDP4_MAX_OVERLAY_PIPE; i++) { - if (pipe->pipe_ndx == 0) { - pipe->pipe_ndx = i + 1; /* start from 1 */ - init_completion(&pipe->comp); - printk(KERN_INFO "mdp4_overlay_pipe_alloc: pipe=%p ndx=%d\n", - pipe, pipe->pipe_ndx); - return pipe; - } - pipe++; - } - - return NULL; -} - - -void mdp4_overlay_pipe_free(struct mdp4_overlay_pipe *pipe) -{ - printk(KERN_INFO "mdp4_overlay_pipe_free: pipe=%p ndx=%d\n", - pipe, pipe->pipe_ndx); - memset(pipe, 0, sizeof(*pipe)); -} - -static int get_pipe_num(int ptype, int stage) -{ - if (ptype == OVERLAY_TYPE_RGB) { - if (stage == MDP4_MIXER_STAGE_BASE) - return OVERLAY_PIPE_RGB1; - else - return OVERLAY_PIPE_RGB2; - } else { - if (stage == MDP4_MIXER_STAGE0) - return OVERLAY_PIPE_VG1; - else - return OVERLAY_PIPE_VG2; - } -} - -int mdp4_overlay_req_check(uint32 id, uint32 z_order, uint32 mixer) -{ - struct mdp4_overlay_pipe *pipe; - - pipe = ctrl->stage[mixer][z_order]; - - if (pipe == NULL) - return 0; - - if (pipe->pipe_ndx == id) /* same req, recycle */ - return 0; - - return -EPERM; -} - -static int mdp4_overlay_req2pipe(struct mdp_overlay *req, int mixer, - struct mdp4_overlay_pipe **ppipe) -{ - struct mdp4_overlay_pipe *pipe; - int ret, ptype; - - if (mixer >= MDP4_MAX_MIXER) { - printk(KERN_ERR "mpd_overlay_req2pipe: mixer out of range!\n"); - return -ERANGE; - } - - if (req->z_order < 0 || req->z_order > 2) { - printk(KERN_ERR "mpd_overlay_req2pipe: z_order=%d out of range!\n", - req->z_order); - return -ERANGE; - } - - if (req->src_rect.h == 0 || req->src_rect.w == 0) { - printk(KERN_ERR "mpd_overlay_req2pipe: src img of zero size!\n"); - return -EINVAL; - } - - ret = mdp4_overlay_req_check(req->id, req->z_order, mixer); - if (ret < 0) - return ret; - - ptype = mdp4_overlay_format2type(req->src.format); - if (ptype < 0) - return ptype; - - if (req->id == MSMFB_NEW_REQUEST) /* new request */ - pipe = mdp4_overlay_pipe_alloc(); - else - pipe = mdp4_overlay_ndx2pipe(req->id); - - if (pipe == NULL) - return -ENOMEM; - - pipe->src_format = req->src.format; - ret = mdp4_overlay_format2pipe(pipe); - - if (ret < 0) - return ret; - - /* - * base layer == 1, reserved for frame buffer - * zorder 0 == stage 0 == 2 - * zorder 1 == stage 1 == 3 - * zorder 2 == stage 2 == 4 - */ - if (req->id == MSMFB_NEW_REQUEST) { /* new request */ - pipe->mixer_stage = req->z_order + MDP4_MIXER_STAGE0; - pipe->pipe_type = ptype; - pipe->pipe_num = get_pipe_num(ptype, pipe->mixer_stage); - printk(KERN_INFO "mpd4_overlay_req2pipe: zorder=%d pipe_num=%d\n", - req->z_order, pipe->pipe_num); - } - - pipe->src_width = req->src.width & 0x07ff; /* source img width */ - pipe->src_height = req->src.height & 0x07ff; /* source img height */ - pipe->src_h = req->src_rect.h & 0x07ff; - pipe->src_w = req->src_rect.w & 0x07ff; - pipe->src_y = req->src_rect.y & 0x07ff; - pipe->src_x = req->src_rect.x & 0x07ff; - pipe->dst_h = req->dst_rect.h & 0x07ff; - pipe->dst_w = req->dst_rect.w & 0x07ff; - pipe->dst_y = req->dst_rect.y & 0x07ff; - pipe->dst_x = req->dst_rect.x & 0x07ff; - - if (req->flags & MDP_FLIP_LR) - pipe->op_mode |= MDP4_OP_FLIP_LR; - - if (req->flags & MDP_FLIP_UD) - pipe->op_mode |= MDP4_OP_FLIP_UD; - - if (req->flags & MDP_DITHER) - pipe->op_mode |= MDP4_OP_DITHER_EN; - - if (req->flags & MDP_DEINTERLACE) - pipe->op_mode |= MDP4_OP_DEINT_ODD_REF; - - pipe->is_fg = req->is_fg;/* control alpha and color key */ - - pipe->alpha = req->alpha & 0x0ff; - - pipe->transp = req->transp_mask; - - *ppipe = pipe; - - return 0; -} - -int get_img(struct msmfb_data *img, struct fb_info *info, - unsigned long *start, unsigned long *len, struct file **pp_file) -{ - int put_needed, ret = 0; - struct file *file; -#ifdef CONFIG_ANDROID_PMEM - unsigned long vstart; -#endif - -#ifdef CONFIG_ANDROID_PMEM - if (!get_pmem_file(img->memory_id, start, &vstart, len, pp_file)) - return 0; -#endif - file = fget_light(img->memory_id, &put_needed); - if (file == NULL) - return -1; - - if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) { - *start = info->fix.smem_start; - *len = info->fix.smem_len; - *pp_file = file; - } else { - ret = -1; - fput_light(file, put_needed); - } - return ret; -} -int mdp4_overlay_get(struct fb_info *info, struct mdp_overlay *req) -{ - struct mdp4_overlay_pipe *pipe; - - pipe = mdp4_overlay_ndx2pipe(req->id); - if (pipe == NULL) - return -ENODEV; - - *req = pipe->req_data; - - return 0; -} - -int mdp4_overlay_set(struct fb_info *info, struct mdp_overlay *req) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - int ret, mixer; - struct mdp4_overlay_pipe *pipe; - int lcdc; - - if (mfd == NULL) - return -ENODEV; - - if (req->src.format == MDP_FB_FORMAT) - req->src.format = mfd->fb_imgType; - - if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) - return -EINTR; - - mixer = info->node; /* minor number of char device */ - - ret = mdp4_overlay_req2pipe(req, mixer, &pipe); - if (ret < 0) { - mutex_unlock(&mfd->dma->ov_mutex); - return ret; - } - - lcdc = inpdw(MDP_BASE + 0xc0000); - - if (lcdc == 0) { /* mddi */ - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - } - - /* return id back to user */ - req->id = pipe->pipe_ndx; /* pipe_ndx start from 1 */ - pipe->req_data = *req; /* keep original req */ - - mutex_unlock(&mfd->dma->ov_mutex); - - return 0; -} - -int mdp4_overlay_unset(struct fb_info *info, int ndx) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - struct mdp4_overlay_pipe *pipe; - int lcdc; - - if (mfd == NULL) - return -ENODEV; - - if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) - return -EINTR; - - pipe = mdp4_overlay_ndx2pipe(ndx); - - if (pipe == NULL) { - mutex_unlock(&mfd->dma->ov_mutex); - return -ENODEV; - } - - lcdc = inpdw(MDP_BASE + 0xc0000); - - mdp4_mixer_stage_down(pipe); - - if (lcdc == 0) { /* mddi */ - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - } - - if (lcdc) /* LCDC mode */ - mdp4_overlay_reg_flush(pipe, 0); - - mdp4_overlay_pipe_free(pipe); - - if (lcdc == 0) { /* mddi */ - mdp4_mddi_overlay_restore(); - } - - mutex_unlock(&mfd->dma->ov_mutex); - - return 0; -} - -struct tile_desc { - uint32 width; /* tile's width */ - uint32 height; /* tile's height */ - uint32 row_tile_w; /* tiles per row's width */ - uint32 row_tile_h; /* tiles per row's height */ -}; - -void tile_samsung(struct tile_desc *tp) -{ - /* - * each row of samsung tile consists of two tiles in height - * and two tiles in width which means width should align to - * 64 x 2 bytes and height should align to 32 x 2 bytes. - * video decoder generate two tiles in width and one tile - * in height which ends up height align to 32 X 1 bytes. - */ - tp->width = 64; /* 64 bytes */ - tp->row_tile_w = 2; /* 2 tiles per row's width */ - tp->height = 32; /* 32 bytes */ - tp->row_tile_h = 1; /* 1 tiles per row's height */ -} - -uint32 tile_mem_size(struct mdp4_overlay_pipe *pipe, struct tile_desc *tp) -{ - uint32 tile_w, tile_h; - uint32 row_num_w, row_num_h; - - - tile_w = tp->width * tp->row_tile_w; - tile_h = tp->height * tp->row_tile_h; - - row_num_w = (pipe->src_width + tile_w - 1) / tile_w; - row_num_h = (pipe->src_height + tile_h - 1) / tile_h; - - return row_num_w * row_num_h * tile_w * tile_h; -} - -int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req, - struct file **pp_src_file) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - struct msmfb_data *img; - struct mdp4_overlay_pipe *pipe; - ulong start, addr; - ulong len = 0; - struct file *p_src_file = 0; - int lcdc; - - if (mfd == NULL) - return -ENODEV; - - pipe = mdp4_overlay_ndx2pipe(req->id); - if (pipe == NULL) - return -ENODEV; - - if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) - return -EINTR; - - img = &req->data; - get_img(img, info, &start, &len, &p_src_file); - if (len == 0) { - mutex_unlock(&mfd->dma->ov_mutex); - printk(KERN_ERR "mdp_overlay_play: could not retrieve" - " image from memory\n"); - return -1; - } - *pp_src_file = p_src_file; - - addr = start + img->offset; - pipe->srcp0_addr = addr; - pipe->srcp0_ystride = pipe->src_width * pipe->bpp; - - if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) { - if (pipe->frame_format == MDP4_FRAME_FORMAT_VIDEO_SUPERTILE) { - struct tile_desc tile; - - tile_samsung(&tile); - pipe->srcp1_addr = addr + tile_mem_size(pipe, &tile); - } else - pipe->srcp1_addr = addr + - pipe->src_width * pipe->src_height; - - pipe->srcp0_ystride = pipe->src_width; - pipe->srcp1_ystride = pipe->src_width; - } - - lcdc = inpdw(MDP_BASE + 0xc0000); - lcdc &= 0x01; /* LCDC mode */ - - if (pipe->pipe_type == OVERLAY_TYPE_VG) - mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */ - else - mdp4_overlay_rgb_setup(pipe); /* rgb pipe */ - - mdp4_mixer_blend_setup(pipe); - mdp4_mixer_stage_up(pipe); - - if (lcdc) { /* LCDC mode */ - mdp4_overlay_reg_flush(pipe, 1); - } - - if (lcdc) { /* LCDC mode */ - if (pipe->mixer_stage != MDP4_MIXER_STAGE_BASE) { /* done */ - mutex_unlock(&mfd->dma->ov_mutex); - return 0; - } - } - - if (lcdc == 0) { /* MDDI mode */ -#ifdef MDP4_NONBLOCKING - if (mfd->panel_power_on) -#else - if (!mfd->dma->busy && mfd->panel_power_on) -#endif - mdp4_mddi_overlay_kickoff(mfd, pipe); - } - - mutex_unlock(&mfd->dma->ov_mutex); - - return 0; -} diff --git a/drivers/staging/msm/mdp4_overlay_lcdc.c b/drivers/staging/msm/mdp4_overlay_lcdc.c deleted file mode 100644 index a6ab8ec..0000000 --- a/drivers/staging/msm/mdp4_overlay_lcdc.c +++ /dev/null @@ -1,313 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - -#ifdef CONFIG_FB_MSM_MDP40 -#define LCDC_BASE 0xC0000 -#else -#define LCDC_BASE 0xE0000 -#endif - -int first_pixel_start_x; -int first_pixel_start_y; - -static struct mdp4_overlay_pipe *lcdc_pipe; - -int mdp_lcdc_on(struct platform_device *pdev) -{ - int lcdc_width; - int lcdc_height; - int lcdc_bpp; - int lcdc_border_clr; - int lcdc_underflow_clr; - int lcdc_hsync_skew; - - int hsync_period; - int hsync_ctrl; - int vsync_period; - int display_hctl; - int display_v_start; - int display_v_end; - int active_hctl; - int active_h_start; - int active_h_end; - int active_v_start; - int active_v_end; - int ctrl_polarity; - int h_back_porch; - int h_front_porch; - int v_back_porch; - int v_front_porch; - int hsync_pulse_width; - int vsync_pulse_width; - int hsync_polarity; - int vsync_polarity; - int data_en_polarity; - int hsync_start_x; - int hsync_end_x; - uint8 *buf; - int bpp, ptype; - uint32 format; - struct fb_info *fbi; - struct fb_var_screeninfo *var; - struct msm_fb_data_type *mfd; - struct mdp4_overlay_pipe *pipe; - int ret; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - fbi = mfd->fbi; - var = &fbi->var; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + - fbi->var.yoffset * fbi->fix.line_length; - - if (bpp == 2) - format = MDP_RGB_565; - else if (bpp == 3) - format = MDP_RGB_888; - else - format = MDP_ARGB_8888; - - - if (lcdc_pipe == NULL) { - ptype = mdp4_overlay_format2type(format); - pipe = mdp4_overlay_pipe_alloc(); - pipe->pipe_type = ptype; - /* use RGB1 pipe */ - pipe->pipe_num = OVERLAY_PIPE_RGB1; - pipe->mixer_stage = MDP4_MIXER_STAGE_BASE; - pipe->mixer_num = MDP4_MIXER0; - pipe->src_format = format; - mdp4_overlay_format2pipe(pipe); - - lcdc_pipe = pipe; /* keep it */ - } else { - pipe = lcdc_pipe; - } - - pipe->src_height = fbi->var.yres; - pipe->src_width = fbi->var.xres; - pipe->src_h = fbi->var.yres; - pipe->src_w = fbi->var.xres; - pipe->src_y = 0; - pipe->src_x = 0; - pipe->srcp0_addr = (uint32) buf; - pipe->srcp0_ystride = fbi->fix.line_length; - - mdp4_overlay_dmap_xy(pipe); - mdp4_overlay_dmap_cfg(mfd, 1); - - mdp4_overlay_rgb_setup(pipe); - - mdp4_mixer_stage_up(pipe); - - mdp4_overlayproc_cfg(pipe); - - /* - * LCDC timing setting - */ - h_back_porch = var->left_margin; - h_front_porch = var->right_margin; - v_back_porch = var->upper_margin; - v_front_porch = var->lower_margin; - hsync_pulse_width = var->hsync_len; - vsync_pulse_width = var->vsync_len; - lcdc_border_clr = mfd->panel_info.lcdc.border_clr; - lcdc_underflow_clr = mfd->panel_info.lcdc.underflow_clr; - lcdc_hsync_skew = mfd->panel_info.lcdc.hsync_skew; - - lcdc_width = mfd->panel_info.xres; - lcdc_height = mfd->panel_info.yres; - lcdc_bpp = mfd->panel_info.bpp; - - hsync_period = - hsync_pulse_width + h_back_porch + lcdc_width + h_front_porch; - hsync_ctrl = (hsync_period << 16) | hsync_pulse_width; - hsync_start_x = hsync_pulse_width + h_back_porch; - hsync_end_x = hsync_period - h_front_porch - 1; - display_hctl = (hsync_end_x << 16) | hsync_start_x; - - vsync_period = - (vsync_pulse_width + v_back_porch + lcdc_height + - v_front_porch) * hsync_period; - display_v_start = - (vsync_pulse_width + v_back_porch) * hsync_period + lcdc_hsync_skew; - display_v_end = - vsync_period - (v_front_porch * hsync_period) + lcdc_hsync_skew - 1; - - if (lcdc_width != var->xres) { - active_h_start = hsync_start_x + first_pixel_start_x; - active_h_end = active_h_start + var->xres - 1; - active_hctl = - ACTIVE_START_X_EN | (active_h_end << 16) | active_h_start; - } else { - active_hctl = 0; - } - - if (lcdc_height != var->yres) { - active_v_start = - display_v_start + first_pixel_start_y * hsync_period; - active_v_end = active_v_start + (var->yres) * hsync_period - 1; - active_v_start |= ACTIVE_START_Y_EN; - } else { - active_v_start = 0; - active_v_end = 0; - } - - -#ifdef CONFIG_FB_MSM_MDP40 - hsync_polarity = 1; - vsync_polarity = 1; - lcdc_underflow_clr |= 0x80000000; /* enable recovery */ -#else - hsync_polarity = 0; - vsync_polarity = 0; -#endif - data_en_polarity = 0; - - ctrl_polarity = - (data_en_polarity << 2) | (vsync_polarity << 1) | (hsync_polarity); - - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x4, hsync_ctrl); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x8, vsync_period); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0xc, vsync_pulse_width * hsync_period); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x10, display_hctl); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x14, display_v_start); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x18, display_v_end); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x28, lcdc_border_clr); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x2c, lcdc_underflow_clr); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x30, lcdc_hsync_skew); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x38, ctrl_polarity); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x1c, active_hctl); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x20, active_v_start); - MDP_OUTP(MDP_BASE + LCDC_BASE + 0x24, active_v_end); - - ret = panel_next_on(pdev); - if (ret == 0) { - /* enable LCDC block */ - MDP_OUTP(MDP_BASE + LCDC_BASE, 1); - mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - } - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - return ret; -} - -int mdp_lcdc_off(struct platform_device *pdev) -{ - int ret = 0; - struct mdp4_overlay_pipe *pipe; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - MDP_OUTP(MDP_BASE + LCDC_BASE, 0); - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - ret = panel_next_off(pdev); - - /* delay to make sure the last frame finishes */ - mdelay(100); - - /* dis-engage rgb0 from mixer */ - pipe = lcdc_pipe; - mdp4_mixer_stage_down(pipe); - - return ret; -} - -/* - * mdp4_overlay0_done_lcdc: called from isr - */ -void mdp4_overlay0_done_lcdc() -{ - complete(&lcdc_pipe->comp); -} - -void mdp4_lcdc_overlay(struct msm_fb_data_type *mfd) -{ - struct fb_info *fbi = mfd->fbi; - uint8 *buf; - int bpp; - unsigned long flag; - struct mdp4_overlay_pipe *pipe; - - if (!mfd->panel_power_on) - return; - - /* no need to power on cmd block since it's lcdc mode */ - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + - fbi->var.yoffset * fbi->fix.line_length; - - mutex_lock(&mfd->dma->ov_mutex); - - pipe = lcdc_pipe; - pipe->srcp0_addr = (uint32) buf; - mdp4_overlay_rgb_setup(pipe); - mdp4_overlay_reg_flush(pipe, 1); /* rgb1 and mixer0 */ - - /* enable irq */ - spin_lock_irqsave(&mdp_spin_lock, flag); - mdp_enable_irq(MDP_OVERLAY0_TERM); - INIT_COMPLETION(lcdc_pipe->comp); - mfd->dma->waiting = TRUE; - outp32(MDP_INTR_CLEAR, INTR_OVERLAY0_DONE); - mdp_intr_mask |= INTR_OVERLAY0_DONE; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - spin_unlock_irqrestore(&mdp_spin_lock, flag); - wait_for_completion_killable(&lcdc_pipe->comp); - mdp_disable_irq(MDP_OVERLAY0_TERM); - - mutex_unlock(&mfd->dma->ov_mutex); -} diff --git a/drivers/staging/msm/mdp4_overlay_mddi.c b/drivers/staging/msm/mdp4_overlay_mddi.c deleted file mode 100644 index be1b287..0000000 --- a/drivers/staging/msm/mdp4_overlay_mddi.c +++ /dev/null @@ -1,254 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - -static struct mdp4_overlay_pipe *mddi_pipe; -static struct mdp4_overlay_pipe *pending_pipe; -static struct msm_fb_data_type *mddi_mfd; - -#define WHOLESCREEN - -void mdp4_overlay_update_lcd(struct msm_fb_data_type *mfd) -{ - MDPIBUF *iBuf = &mfd->ibuf; - uint8 *src; - int bpp, ptype; - uint32 format; - uint32 mddi_ld_param; - uint16 mddi_vdo_packet_reg; - struct mdp4_overlay_pipe *pipe; - - if (mfd->key != MFD_KEY) - return; - - mddi_mfd = mfd; /* keep it */ - - bpp = iBuf->bpp; - - if (bpp == 2) - format = MDP_RGB_565; - else if (bpp == 3) - format = MDP_RGB_888; - else - format = MDP_ARGB_8888; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - if (mddi_pipe == NULL) { - ptype = mdp4_overlay_format2type(format); - pipe = mdp4_overlay_pipe_alloc(); - pipe->pipe_type = ptype; - /* use RGB1 pipe */ - pipe->pipe_num = OVERLAY_PIPE_RGB1; - pipe->mixer_num = MDP4_MIXER0; - pipe->src_format = format; - mdp4_overlay_format2pipe(pipe); - - mddi_pipe = pipe; /* keep it */ - - mddi_ld_param = 0; - mddi_vdo_packet_reg = mfd->panel_info.mddi.vdopkt; - - if (mfd->panel_info.type == MDDI_PANEL) { - if (mfd->panel_info.pdest == DISPLAY_1) - mddi_ld_param = 0; - else - mddi_ld_param = 1; - } else { - mddi_ld_param = 2; - } - - MDP_OUTP(MDP_BASE + 0x00090, mddi_ld_param); - MDP_OUTP(MDP_BASE + 0x00094, - (MDDI_VDO_PACKET_DESC << 16) | mddi_vdo_packet_reg); - } else { - pipe = mddi_pipe; - } - - - src = (uint8 *) iBuf->buf; - -#ifdef WHOLESCREEN - { - struct fb_info *fbi; - - fbi = mfd->fbi; - pipe->src_height = fbi->var.yres; - pipe->src_width = fbi->var.xres; - pipe->src_h = fbi->var.yres; - pipe->src_w = fbi->var.xres; - pipe->src_y = 0; - pipe->src_x = 0; - pipe->dst_h = fbi->var.yres; - pipe->dst_w = fbi->var.xres; - pipe->dst_y = 0; - pipe->dst_x = 0; - pipe->srcp0_addr = (uint32)src; - pipe->srcp0_ystride = fbi->var.xres_virtual * bpp; - } - -#else - if (mdp4_overlay_active(MDP4_MIXER0)) { - struct fb_info *fbi; - - fbi = mfd->fbi; - pipe->src_height = fbi->var.yres; - pipe->src_width = fbi->var.xres; - pipe->src_h = fbi->var.yres; - pipe->src_w = fbi->var.xres; - pipe->src_y = 0; - pipe->src_x = 0; - pipe->dst_h = fbi->var.yres; - pipe->dst_w = fbi->var.xres; - pipe->dst_y = 0; - pipe->dst_x = 0; - pipe->srcp0_addr = (uint32) src; - pipe->srcp0_ystride = fbi->var.xres_virtual * bpp; - } else { - /* starting input address */ - src += (iBuf->dma_x + iBuf->dma_y * iBuf->ibuf_width) * bpp; - - pipe->src_height = iBuf->dma_h; - pipe->src_width = iBuf->dma_w; - pipe->src_h = iBuf->dma_h; - pipe->src_w = iBuf->dma_w; - pipe->src_y = 0; - pipe->src_x = 0; - pipe->dst_h = iBuf->dma_h; - pipe->dst_w = iBuf->dma_w; - pipe->dst_y = iBuf->dma_y; - pipe->dst_x = iBuf->dma_x; - pipe->srcp0_addr = (uint32) src; - pipe->srcp0_ystride = iBuf->ibuf_width * bpp; - } -#endif - - pipe->mixer_stage = MDP4_MIXER_STAGE_BASE; - - mdp4_overlay_rgb_setup(pipe); - - mdp4_mixer_stage_up(pipe); - - mdp4_overlayproc_cfg(pipe); - - mdp4_overlay_dmap_xy(pipe); - - mdp4_overlay_dmap_cfg(mfd, 0); - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - -} - -/* - * mdp4_overlay0_done_mddi: called from isr - */ -void mdp4_overlay0_done_mddi() -{ - if (pending_pipe) - complete(&pending_pipe->comp); -} - -void mdp4_mddi_overlay_restore(void) -{ - /* mutex holded by caller */ - mdp4_overlay_update_lcd(mddi_mfd); - mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe); -} - -void mdp4_mddi_overlay_kickoff(struct msm_fb_data_type *mfd, - struct mdp4_overlay_pipe *pipe) -{ -#ifdef MDP4_NONBLOCKING - unsigned long flag; - - spin_lock_irqsave(&mdp_spin_lock, flag); - if (mfd->dma->busy == TRUE) { - INIT_COMPLETION(pipe->comp); - pending_pipe = pipe; - } - spin_unlock_irqrestore(&mdp_spin_lock, flag); - - if (pending_pipe != NULL) { - /* wait until DMA finishes the current job */ - wait_for_completion_killable(&pipe->comp); - pending_pipe = NULL; - } - down(&mfd->sem); - mdp_enable_irq(MDP_OVERLAY0_TERM); - mfd->dma->busy = TRUE; - /* start OVERLAY pipe */ - mdp_pipe_kickoff(MDP_OVERLAY0_TERM, mfd); - up(&mfd->sem); -#else - down(&mfd->sem); - mdp_enable_irq(MDP_OVERLAY0_TERM); - mfd->dma->busy = TRUE; - INIT_COMPLETION(pipe->comp); - pending_pipe = pipe; - - /* start OVERLAY pipe */ - mdp_pipe_kickoff(MDP_OVERLAY0_TERM, mfd); - up(&mfd->sem); - - /* wait until DMA finishes the current job */ - wait_for_completion_killable(&pipe->comp); - mdp_disable_irq(MDP_OVERLAY0_TERM); -#endif - -} - -void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) -{ - mutex_lock(&mfd->dma->ov_mutex); - - if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) { - mdp4_overlay_update_lcd(mfd); - - mdp4_mddi_overlay_kickoff(mfd, mddi_pipe); - - /* signal if pan function is waiting for the update completion */ - if (mfd->pan_waiting) { - mfd->pan_waiting = FALSE; - complete(&mfd->pan_comp); - } - } - - mutex_unlock(&mfd->dma->ov_mutex); -} diff --git a/drivers/staging/msm/mdp4_util.c b/drivers/staging/msm/mdp4_util.c deleted file mode 100644 index fd97f52..0000000 --- a/drivers/staging/msm/mdp4_util.c +++ /dev/null @@ -1,1686 +0,0 @@ - -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - -void mdp4_sw_reset(ulong bits) -{ - bits &= 0x1f; /* 5 bits */ - outpdw(MDP_BASE + 0x001c, bits); /* MDP_SW_RESET */ - - while (inpdw(MDP_BASE + 0x001c) & bits) /* self clear when complete */ - ; - MSM_FB_INFO("mdp4_sw_reset: 0x%x\n", (int)bits); -} - -void mdp4_overlay_cfg(int overlayer, int blt_mode, int refresh, int direct_out) -{ - ulong bits = 0; - - if (blt_mode) - bits |= (1 << 3); - refresh &= 0x03; /* 2 bites */ - bits |= (refresh << 1); - direct_out &= 0x01; - bits |= direct_out; - - if (overlayer == MDP4_MIXER0) - outpdw(MDP_BASE + 0x10004, bits); /* MDP_OVERLAY0_CFG */ - else - outpdw(MDP_BASE + 0x18004, bits); /* MDP_OVERLAY1_CFG */ - - MSM_FB_INFO("mdp4_overlay_cfg: 0x%x\n", (int)inpdw(MDP_BASE + 0x10004)); -} - -void mdp4_display_intf_sel(int output, ulong intf) -{ - ulong bits, mask; - - bits = inpdw(MDP_BASE + 0x0038); /* MDP_DISP_INTF_SEL */ - - mask = 0x03; /* 2 bits */ - intf &= 0x03; /* 2 bits */ - - switch (output) { - case EXTERNAL_INTF_SEL: - intf <<= 4; - mask <<= 4; - break; - case SECONDARY_INTF_SEL: - intf &= 0x02; /* only MDDI and EBI2 support */ - intf <<= 2; - mask <<= 2; - break; - default: - break; - } - - - bits &= ~mask; - bits |= intf; - - outpdw(MDP_BASE + 0x0038, bits); /* MDP_DISP_INTF_SEL */ - - MSM_FB_INFO("mdp4_display_intf_sel: 0x%x\n", (int)inpdw(MDP_BASE + 0x0038)); -} - -unsigned long mdp4_display_status(void) -{ - return inpdw(MDP_BASE + 0x0018) & 0x3ff; /* MDP_DISPLAY_STATUS */ -} - -void mdp4_ebi2_lcd_setup(int lcd, ulong base, int ystride) -{ - /* always use memory map */ - ystride &= 0x01fff; /* 13 bits */ - if (lcd == EBI2_LCD0) { - outpdw(MDP_BASE + 0x0060, base);/* MDP_EBI2_LCD0 */ - outpdw(MDP_BASE + 0x0068, ystride);/* MDP_EBI2_LCD0_YSTRIDE */ - } else { - outpdw(MDP_BASE + 0x0064, base);/* MDP_EBI2_LCD1 */ - outpdw(MDP_BASE + 0x006c, ystride);/* MDP_EBI2_LCD1_YSTRIDE */ - } -} - -void mdp4_mddi_setup(int mddi, unsigned long id) -{ - ulong bits; - - if (mddi == MDDI_EXTERNAL_SET) - bits = 0x02; - else if (mddi == MDDI_SECONDARY_SET) - bits = 0x01; - else - bits = 0; /* PRIMARY_SET */ - - id <<= 16; - - bits |= id; - - outpdw(MDP_BASE + 0x0090, bits); /* MDP_MDDI_PARAM_WR_SEL */ -} - -int mdp_ppp_blit(struct fb_info *info, struct mdp_blit_req *req, - struct file **pp_src_file, struct file **pp_dst_file) -{ - - /* not implemented yet */ - return -1; -} - -void mdp4_hw_init(void) -{ - ulong bits; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - -#ifdef MDP4_ERROR - /* - * Issue software reset on DMA_P will casue DMA_P dma engine stall - * on LCDC mode. However DMA_P does not stall at MDDI mode. - * This need further investigation. - */ - mdp4_sw_reset(0x17); -#endif - - mdp4_clear_lcdc(); - - mdp4_mixer_blend_init(0); - mdp4_mixer_blend_init(1); - mdp4_vg_qseed_init(0); - mdp4_vg_qseed_init(1); - mdp4_vg_csc_mv_setup(0); - mdp4_vg_csc_mv_setup(1); - mdp4_vg_csc_pre_bv_setup(0); - mdp4_vg_csc_pre_bv_setup(1); - mdp4_vg_csc_post_bv_setup(0); - mdp4_vg_csc_post_bv_setup(1); - mdp4_vg_csc_pre_lv_setup(0); - mdp4_vg_csc_pre_lv_setup(1); - mdp4_vg_csc_post_lv_setup(0); - mdp4_vg_csc_post_lv_setup(1); - - mdp4_mixer_gc_lut_setup(0); - mdp4_mixer_gc_lut_setup(1); - - mdp4_vg_igc_lut_setup(0); - mdp4_vg_igc_lut_setup(1); - - mdp4_rgb_igc_lut_setup(0); - mdp4_rgb_igc_lut_setup(1); - - outp32(MDP_EBI2_PORTMAP_MODE, 0x3); - - /* system interrupts */ - - bits = mdp_intr_mask; - outpdw(MDP_BASE + 0x0050, bits);/* enable specififed interrupts */ - - /* histogram */ - MDP_OUTP(MDP_BASE + 0x95010, 1); /* auto clear HIST */ - - /* enable histogram interrupts */ - outpdw(MDP_BASE + 0x9501c, INTR_HIST_DONE); - - /* For the max read pending cmd config below, if the MDP clock */ - /* is less than the AXI clock, then we must use 3 pending */ - /* pending requests. Otherwise, we should use 8 pending requests. */ - /* In the future we should do this detection automatically. */ - - /* max read pending cmd config */ - outpdw(MDP_BASE + 0x004c, 0x02222); /* 3 pending requests */ - - /* dma_p fetch config */ - outpdw(MDP_BASE + 0x91004, 0x27); /* burst size of 8 */ - -#ifndef CONFIG_FB_MSM_OVERLAY - /* both REFRESH_MODE and DIRECT_OUT are ignored at BLT mode */ - mdp4_overlay_cfg(MDP4_MIXER0, OVERLAY_MODE_BLT, 0, 0); - mdp4_overlay_cfg(MDP4_MIXER1, OVERLAY_MODE_BLT, 0, 0); -#endif - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); -} - - -void mdp4_clear_lcdc(void) -{ - uint32 bits; - - bits = inpdw(MDP_BASE + 0xc0000); - if (bits & 0x01) /* enabled already */ - return; - - outpdw(MDP_BASE + 0xc0004, 0); /* vsync ctrl out */ - outpdw(MDP_BASE + 0xc0008, 0); /* vsync period */ - outpdw(MDP_BASE + 0xc000c, 0); /* vsync pusle width */ - outpdw(MDP_BASE + 0xc0010, 0); /* lcdc display HCTL */ - outpdw(MDP_BASE + 0xc0014, 0); /* lcdc display v start */ - outpdw(MDP_BASE + 0xc0018, 0); /* lcdc display v end */ - outpdw(MDP_BASE + 0xc001c, 0); /* lcdc active hctl */ - outpdw(MDP_BASE + 0xc0020, 0); /* lcdc active v start */ - outpdw(MDP_BASE + 0xc0024, 0); /* lcdc active v end */ - outpdw(MDP_BASE + 0xc0028, 0); /* lcdc board color */ - outpdw(MDP_BASE + 0xc002c, 0); /* lcdc underflow ctrl */ - outpdw(MDP_BASE + 0xc0030, 0); /* lcdc hsync skew */ - outpdw(MDP_BASE + 0xc0034, 0); /* lcdc test ctl */ - outpdw(MDP_BASE + 0xc0038, 0); /* lcdc ctl polarity */ -} - -static struct mdp_dma_data overlay1_data; -static int intr_dma_p; -static int intr_dma_s; -static int intr_dma_e; -static int intr_overlay0; -static int intr_overlay1; - -irqreturn_t mdp4_isr(int irq, void *ptr) -{ - uint32 isr, mask, lcdc; - struct mdp_dma_data *dma; - - mdp_is_in_isr = TRUE; - - while (1) { - isr = inpdw(MDP_INTR_STATUS); - if (isr == 0) - break; - - mask = inpdw(MDP_INTR_ENABLE); - outpdw(MDP_INTR_CLEAR, isr); - - isr &= mask; - - if (unlikely(isr == 0)) - break; - - if (isr & INTR_DMA_P_DONE) { - intr_dma_p++; - lcdc = inpdw(MDP_BASE + 0xc0000); - dma = &dma2_data; - if (lcdc & 0x01) { /* LCDC enable */ - /* disable LCDC interrupt */ - mdp_intr_mask &= ~INTR_DMA_P_DONE; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - dma->waiting = FALSE; - } else { - dma->busy = FALSE; - mdp_pipe_ctrl(MDP_DMA2_BLOCK, - MDP_BLOCK_POWER_OFF, TRUE); - } - complete(&dma->comp); - } - if (isr & INTR_DMA_S_DONE) { - intr_dma_s++; - dma = &dma_s_data; - dma->busy = FALSE; - mdp_pipe_ctrl(MDP_DMA_S_BLOCK, - MDP_BLOCK_POWER_OFF, TRUE); - complete(&dma->comp); - } - if (isr & INTR_DMA_E_DONE) { - intr_dma_e++; - dma = &dma_e_data; - mdp_intr_mask &= ~INTR_DMA_E_DONE; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - dma->busy = FALSE; - - if (dma->waiting) { - dma->waiting = FALSE; - complete(&dma->comp); - } - } - if (isr & INTR_OVERLAY0_DONE) { - intr_overlay0++; - lcdc = inpdw(MDP_BASE + 0xc0000); - dma = &dma2_data; - if (lcdc & 0x01) { /* LCDC enable */ - /* disable LCDC interrupt */ - mdp_intr_mask &= ~INTR_OVERLAY0_DONE; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - dma->waiting = FALSE; - mdp4_overlay0_done_lcdc(); - } else { /* MDDI */ - dma->busy = FALSE; -#ifdef MDP4_NONBLOCKING - mdp_disable_irq_nolock(MDP_OVERLAY0_TERM); -#endif - mdp_pipe_ctrl(MDP_OVERLAY0_BLOCK, - MDP_BLOCK_POWER_OFF, TRUE); - mdp4_overlay0_done_mddi(); - } - } - if (isr & INTR_OVERLAY1_DONE) { - intr_overlay1++; - dma = &overlay1_data; - dma->busy = FALSE; - mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, - MDP_BLOCK_POWER_OFF, TRUE); - complete(&dma->comp); - } - if (isr & INTR_DMA_P_HISTOGRAM) { - isr = inpdw(MDP_DMA_P_HIST_INTR_STATUS); - mask = inpdw(MDP_DMA_P_HIST_INTR_ENABLE); - outpdw(MDP_DMA_P_HIST_INTR_CLEAR, isr); - isr &= mask; - if (isr & INTR_HIST_DONE) { - if (mdp_hist.r) - memcpy(mdp_hist.r, MDP_BASE + 0x95100, - mdp_hist.bin_cnt*4); - if (mdp_hist.g) - memcpy(mdp_hist.g, MDP_BASE + 0x95200, - mdp_hist.bin_cnt*4); - if (mdp_hist.b) - memcpy(mdp_hist.b, MDP_BASE + 0x95300, - mdp_hist.bin_cnt*4); - complete(&mdp_hist_comp); - } - } - } - - mdp_is_in_isr = FALSE; - - return IRQ_HANDLED; -} - - -/* - * QSEED tables - */ - -static uint32 vg_qseed_table0[] = { - 0x5556aaff, 0x00000000, 0x00000000, 0x00000000 -}; - -static uint32 vg_qseed_table1[] = { - 0x76543210, 0xfedcba98 -}; - -static uint32 vg_qseed_table2[] = { - 0x02000000, 0x00000000, 0x02060ff2, 0x00000008, - 0x02090fe4, 0x00000013, 0x020a0fd9, 0x0ffc0021, - 0x02080fce, 0x0ffa0030, 0x02030fc5, 0x0ff60042, - 0x01fd0fbe, 0x0ff10054, 0x01f50fb6, 0x0fed0068, - 0x01e90fb1, 0x0fe60080, 0x01dc0fae, 0x0fe10095, - 0x01ca0fae, 0x0fda00ae, 0x01b70fad, 0x0fd600c6, - 0x01a40fad, 0x0fcf00e0, 0x018f0faf, 0x0fc800fa, - 0x01780fb1, 0x0fc30114, 0x015f0fb5, 0x0fbf012d, - 0x01490fb7, 0x0fb70149, 0x012d0fbf, 0x0fb5015f, - 0x01140fc3, 0x0fb10178, 0x00fa0fc8, 0x0faf018f, - 0x00e00fcf, 0x0fad01a4, 0x00c60fd6, 0x0fad01b7, - 0x00ae0fda, 0x0fae01ca, 0x00950fe1, 0x0fae01dc, - 0x00800fe6, 0x0fb101e9, 0x00680fed, 0x0fb601f5, - 0x00540ff1, 0x0fbe01fd, 0x00420ff6, 0x0fc50203, - 0x00300ffa, 0x0fce0208, 0x00210ffc, 0x0fd9020a, - 0x00130000, 0x0fe40209, 0x00080000, 0x0ff20206, - 0x02000000, 0x00000000, 0x02040ff2, 0x0000000a, - 0x02040fe4, 0x00000018, 0x02010fda, 0x0ffc0029, - 0x01fc0fcf, 0x0ffa003b, 0x01f30fc7, 0x0ff60050, - 0x01e90fc0, 0x0ff20065, 0x01dc0fba, 0x0fee007c, - 0x01cc0fb6, 0x0fe80096, 0x01ba0fb4, 0x0fe400ae, - 0x01a70fb4, 0x0fdd00c8, 0x018f0fb5, 0x0fda00e2, - 0x017a0fb5, 0x0fd400fd, 0x01630fb8, 0x0fce0117, - 0x014c0fba, 0x0fca0130, 0x01320fbf, 0x0fc70148, - 0x011b0fc1, 0x0fc10163, 0x01010fc8, 0x0fc00177, - 0x00e90fcd, 0x0fbd018d, 0x00d10fd1, 0x0fbc01a2, - 0x00ba0fd7, 0x0fbb01b4, 0x00a30fdd, 0x0fbc01c4, - 0x008e0fe1, 0x0fbd01d4, 0x00790fe7, 0x0fbe01e2, - 0x00670feb, 0x0fc001ee, 0x00540ff1, 0x0fc501f6, - 0x00430ff4, 0x0fcb01fe, 0x00340ff8, 0x0fd10203, - 0x00260ffb, 0x0fd80207, 0x001a0ffd, 0x0fe10208, - 0x000f0000, 0x0fea0207, 0x00060000, 0x0ff50205, - 0x02000000, 0x00000000, 0x02020ff2, 0x0000000c, - 0x02000fe4, 0x0000001c, 0x01fa0fda, 0x0ffc0030, - 0x01f10fd0, 0x0ffa0045, 0x01e50fc8, 0x0ff6005d, - 0x01d60fc3, 0x0ff30074, 0x01c60fbd, 0x0fef008e, - 0x01b30fba, 0x0fe900aa, 0x019e0fb9, 0x0fe500c4, - 0x01870fba, 0x0fe000df, 0x016f0fbb, 0x0fdd00f9, - 0x01580fbc, 0x0fd80114, 0x01400fbf, 0x0fd3012e, - 0x01280fc2, 0x0fd00146, 0x010f0fc6, 0x0fce015d, - 0x00f90fc9, 0x0fc90175, 0x00e00fcf, 0x0fc90188, - 0x00ca0fd4, 0x0fc6019c, 0x00b40fd8, 0x0fc601ae, - 0x009f0fdd, 0x0fc501bf, 0x008b0fe3, 0x0fc601cc, - 0x00780fe6, 0x0fc701db, 0x00660feb, 0x0fc801e7, - 0x00560fef, 0x0fcb01f0, 0x00460ff3, 0x0fcf01f8, - 0x00380ff6, 0x0fd401fe, 0x002c0ff9, 0x0fd90202, - 0x00200ffc, 0x0fdf0205, 0x00160ffe, 0x0fe60206, - 0x000c0000, 0x0fed0207, 0x00050000, 0x0ff70204, - 0x02000000, 0x00000000, 0x01fe0ff3, 0x0000000f, - 0x01f60fe5, 0x00000025, 0x01ea0fdb, 0x0ffd003e, - 0x01db0fd2, 0x0ffb0058, 0x01c80fcc, 0x0ff70075, - 0x01b50fc7, 0x0ff40090, 0x01a00fc3, 0x0ff000ad, - 0x01880fc1, 0x0feb00cc, 0x01700fc1, 0x0fe800e7, - 0x01550fc3, 0x0fe40104, 0x013b0fc5, 0x0fe2011e, - 0x01240fc6, 0x0fde0138, 0x010c0fca, 0x0fda0150, - 0x00f40fcd, 0x0fd90166, 0x00dd0fd1, 0x0fd7017b, - 0x00c80fd4, 0x0fd40190, 0x00b20fd9, 0x0fd401a1, - 0x009f0fdd, 0x0fd301b1, 0x008c0fe1, 0x0fd301c0, - 0x007b0fe5, 0x0fd301cd, 0x006a0fea, 0x0fd401d8, - 0x005c0fec, 0x0fd501e3, 0x004d0ff0, 0x0fd601ed, - 0x00410ff3, 0x0fd801f4, 0x00340ff7, 0x0fdb01fa, - 0x002a0ff9, 0x0fdf01fe, 0x00200ffb, 0x0fe30202, - 0x00180ffd, 0x0fe70204, 0x00100ffe, 0x0fed0205, - 0x00090000, 0x0ff20205, 0x00040000, 0x0ff90203, - 0x02000000, 0x00000000, 0x02050ff5, 0x00000006, - 0x02070fea, 0x0000000f, 0x02080fe1, 0x0ffd001a, - 0x02070fd8, 0x0ffb0026, 0x02030fd1, 0x0ff80034, - 0x01fe0fcb, 0x0ff40043, 0x01f60fc5, 0x0ff10054, - 0x01ee0fc0, 0x0feb0067, 0x01e20fbe, 0x0fe70079, - 0x01d40fbd, 0x0fe1008e, 0x01c40fbc, 0x0fdd00a3, - 0x01b40fbb, 0x0fd700ba, 0x01a20fbc, 0x0fd100d1, - 0x018d0fbd, 0x0fcd00e9, 0x01770fc0, 0x0fc80101, - 0x01630fc1, 0x0fc1011b, 0x01480fc7, 0x0fbf0132, - 0x01300fca, 0x0fba014c, 0x01170fce, 0x0fb80163, - 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0x002e0ffd, 0x0fe801ed, 0x00200ffe, 0x0fed01f5, - 0x00130000, 0x0ff201fb, 0x00080000, 0x0ff901ff, - 0x02000000, 0x00000000, 0x02060ff2, 0x00000008, - 0x02090fe4, 0x00000013, 0x020a0fd9, 0x0ffc0021, - 0x02080fce, 0x0ffa0030, 0x02030fc5, 0x0ff60042, - 0x01fd0fbe, 0x0ff10054, 0x01f50fb6, 0x0fed0068, - 0x01e90fb1, 0x0fe60080, 0x01dc0fae, 0x0fe10095, - 0x01ca0fae, 0x0fda00ae, 0x01b70fad, 0x0fd600c6, - 0x01a40fad, 0x0fcf00e0, 0x018f0faf, 0x0fc800fa, - 0x01780fb1, 0x0fc30114, 0x015f0fb5, 0x0fbf012d, - 0x01490fb7, 0x0fb70149, 0x012d0fbf, 0x0fb5015f, - 0x01140fc3, 0x0fb10178, 0x00fa0fc8, 0x0faf018f, - 0x00e00fcf, 0x0fad01a4, 0x00c60fd6, 0x0fad01b7, - 0x00ae0fda, 0x0fae01ca, 0x00950fe1, 0x0fae01dc, - 0x00800fe6, 0x0fb101e9, 0x00680fed, 0x0fb601f5, - 0x00540ff1, 0x0fbe01fd, 0x00420ff6, 0x0fc50203, - 0x00300ffa, 0x0fce0208, 0x00210ffc, 0x0fd9020a, - 0x00130000, 0x0fe40209, 0x00080000, 0x0ff20206, - 0x02000000, 0x00000000, 0x02040ff2, 0x0000000a, - 0x02040fe4, 0x00000018, 0x02010fda, 0x0ffc0029, - 0x01fc0fcf, 0x0ffa003b, 0x01f30fc7, 0x0ff60050, - 0x01e90fc0, 0x0ff20065, 0x01dc0fba, 0x0fee007c, - 0x01cc0fb6, 0x0fe80096, 0x01ba0fb4, 0x0fe400ae, - 0x01a70fb4, 0x0fdd00c8, 0x018f0fb5, 0x0fda00e2, - 0x017a0fb5, 0x0fd400fd, 0x01630fb8, 0x0fce0117, - 0x014c0fba, 0x0fca0130, 0x01320fbf, 0x0fc70148, - 0x011b0fc1, 0x0fc10163, 0x01010fc8, 0x0fc00177, - 0x00e90fcd, 0x0fbd018d, 0x00d10fd1, 0x0fbc01a2, - 0x00ba0fd7, 0x0fbb01b4, 0x00a30fdd, 0x0fbc01c4, - 0x008e0fe1, 0x0fbd01d4, 0x00790fe7, 0x0fbe01e2, - 0x00670feb, 0x0fc001ee, 0x00540ff1, 0x0fc501f6, - 0x00430ff4, 0x0fcb01fe, 0x00340ff8, 0x0fd10203, - 0x00260ffb, 0x0fd80207, 0x001a0ffd, 0x0fe10208, - 0x000f0000, 0x0fea0207, 0x00060000, 0x0ff50205, - 0x02000000, 0x00000000, 0x02020ff2, 0x0000000c, - 0x02000fe4, 0x0000001c, 0x01fa0fda, 0x0ffc0030, - 0x01f10fd0, 0x0ffa0045, 0x01e50fc8, 0x0ff6005d, - 0x01d60fc3, 0x0ff30074, 0x01c60fbd, 0x0fef008e, - 0x01b30fba, 0x0fe900aa, 0x019e0fb9, 0x0fe500c4, - 0x01870fba, 0x0fe000df, 0x016f0fbb, 0x0fdd00f9, - 0x01580fbc, 0x0fd80114, 0x01400fbf, 0x0fd3012e, - 0x01280fc2, 0x0fd00146, 0x010f0fc6, 0x0fce015d, - 0x00f90fc9, 0x0fc90175, 0x00e00fcf, 0x0fc90188, - 0x00ca0fd4, 0x0fc6019c, 0x00b40fd8, 0x0fc601ae, - 0x009f0fdd, 0x0fc501bf, 0x008b0fe3, 0x0fc601cc, - 0x00780fe6, 0x0fc701db, 0x00660feb, 0x0fc801e7, - 0x00560fef, 0x0fcb01f0, 0x00460ff3, 0x0fcf01f8, - 0x00380ff6, 0x0fd401fe, 0x002c0ff9, 0x0fd90202, - 0x00200ffc, 0x0fdf0205, 0x00160ffe, 0x0fe60206, - 0x000c0000, 0x0fed0207, 0x00050000, 0x0ff70204, - 0x02000000, 0x00000000, 0x01fe0ff3, 0x0000000f, - 0x01f60fe5, 0x00000025, 0x01ea0fdb, 0x0ffd003e, - 0x01db0fd2, 0x0ffb0058, 0x01c80fcc, 0x0ff70075, - 0x01b50fc7, 0x0ff40090, 0x01a00fc3, 0x0ff000ad, - 0x01880fc1, 0x0feb00cc, 0x01700fc1, 0x0fe800e7, - 0x01550fc3, 0x0fe40104, 0x013b0fc5, 0x0fe2011e, - 0x01240fc6, 0x0fde0138, 0x010c0fca, 0x0fda0150, - 0x00f40fcd, 0x0fd90166, 0x00dd0fd1, 0x0fd7017b, - 0x00c80fd4, 0x0fd40190, 0x00b20fd9, 0x0fd401a1, - 0x009f0fdd, 0x0fd301b1, 0x008c0fe1, 0x0fd301c0, - 0x007b0fe5, 0x0fd301cd, 0x006a0fea, 0x0fd401d8, - 0x005c0fec, 0x0fd501e3, 0x004d0ff0, 0x0fd601ed, - 0x00410ff3, 0x0fd801f4, 0x00340ff7, 0x0fdb01fa, - 0x002a0ff9, 0x0fdf01fe, 0x00200ffb, 0x0fe30202, - 0x00180ffd, 0x0fe70204, 0x00100ffe, 0x0fed0205, - 0x00090000, 0x0ff20205, 0x00040000, 0x0ff90203, - 0x02000000, 0x00000000, 0x02050ff5, 0x00000006, - 0x02070fea, 0x0000000f, 0x02080fe1, 0x0ffd001a, - 0x02070fd8, 0x0ffb0026, 0x02030fd1, 0x0ff80034, - 0x01fe0fcb, 0x0ff40043, 0x01f60fc5, 0x0ff10054, - 0x01ee0fc0, 0x0feb0067, 0x01e20fbe, 0x0fe70079, - 0x01d40fbd, 0x0fe1008e, 0x01c40fbc, 0x0fdd00a3, - 0x01b40fbb, 0x0fd700ba, 0x01a20fbc, 0x0fd100d1, - 0x018d0fbd, 0x0fcd00e9, 0x01770fc0, 0x0fc80101, - 0x01630fc1, 0x0fc1011b, 0x01480fc7, 0x0fbf0132, - 0x01300fca, 0x0fba014c, 0x01170fce, 0x0fb80163, - 0x00fd0fd4, 0x0fb5017a, 0x00e20fda, 0x0fb5018f, - 0x00c80fdd, 0x0fb401a7, 0x00ae0fe4, 0x0fb401ba, - 0x00960fe8, 0x0fb601cc, 0x007c0fee, 0x0fba01dc, - 0x00650ff2, 0x0fc001e9, 0x00500ff6, 0x0fc701f3, - 0x003b0ffa, 0x0fcf01fc, 0x00290ffc, 0x0fda0201, - 0x00180000, 0x0fe40204, 0x000a0000, 0x0ff20204, - 0x02000000, 0x00000000, 0x02030ff5, 0x00000008, - 0x02030fea, 0x00000013, 0x02020fe1, 0x0ffd0020, - 0x01fc0fd9, 0x0ffc002f, 0x01f60fd2, 0x0ff80040, - 0x01ed0fcd, 0x0ff50051, 0x01e30fc7, 0x0ff10065, - 0x01d70fc3, 0x0fec007a, 0x01c60fc2, 0x0fe9008f, - 0x01b60fc1, 0x0fe300a6, 0x01a20fc1, 0x0fe000bd, - 0x018f0fc1, 0x0fdb00d5, 0x017b0fc2, 0x0fd500ee, - 0x01640fc4, 0x0fd20106, 0x014d0fc8, 0x0fce011d, - 0x01370fc9, 0x0fc90137, 0x011d0fce, 0x0fc8014d, - 0x01060fd2, 0x0fc40164, 0x00ee0fd5, 0x0fc2017b, - 0x00d50fdb, 0x0fc1018f, 0x00bd0fe0, 0x0fc101a2, - 0x00a60fe3, 0x0fc101b6, 0x008f0fe9, 0x0fc201c6, - 0x007a0fec, 0x0fc301d7, 0x00650ff1, 0x0fc701e3, - 0x00510ff5, 0x0fcd01ed, 0x00400ff8, 0x0fd201f6, - 0x002f0ffc, 0x0fd901fc, 0x00200ffd, 0x0fe10202, - 0x00130000, 0x0fea0203, 0x00080000, 0x0ff50203, - 0x02000000, 0x00000000, 0x02020ff5, 0x00000009, - 0x01ff0fea, 0x00000017, 0x01fb0fe2, 0x0ffd0026, - 0x01f30fda, 0x0ffc0037, 0x01ea0fd3, 0x0ff8004b, - 0x01df0fce, 0x0ff5005e, 0x01d10fc9, 0x0ff20074, - 0x01c10fc6, 0x0fed008c, 0x01ae0fc5, 0x0fea00a3, - 0x019b0fc5, 0x0fe500bb, 0x01850fc6, 0x0fe200d3, - 0x01700fc6, 0x0fde00ec, 0x015a0fc8, 0x0fd90105, - 0x01430fca, 0x0fd6011d, 0x012b0fcd, 0x0fd30135, - 0x01150fcf, 0x0fcf014d, 0x00fc0fd4, 0x0fce0162, - 0x00e50fd8, 0x0fcc0177, 0x00cf0fdb, 0x0fca018c, - 0x00b80fe0, 0x0fc9019f, 0x00a20fe5, 0x0fca01af, - 0x008e0fe8, 0x0fcb01bf, 0x00790fec, 0x0fcb01d0, - 0x00670fef, 0x0fcd01dd, 0x00550ff4, 0x0fd001e7, - 0x00440ff7, 0x0fd501f0, 0x00350ffa, 0x0fda01f7, - 0x00270ffc, 0x0fdf01fe, 0x001b0ffe, 0x0fe70200, - 0x00100000, 0x0fee0202, 0x00060000, 0x0ff70203, - 0x02000000, 0x00000000, 0x01ff0ff5, 0x0000000c, - 0x01f80fea, 0x0000001e, 0x01ef0fe2, 0x0ffd0032, - 0x01e20fdb, 0x0ffc0047, 0x01d30fd5, 0x0ff9005f, - 0x01c20fd1, 0x0ff60077, 0x01b00fcd, 0x0ff30090, - 0x019b0fcb, 0x0fef00ab, 0x01850fcb, 0x0fec00c4, - 0x016e0fcc, 0x0fe800de, 0x01550fcd, 0x0fe600f8, - 0x013f0fce, 0x0fe20111, 0x01280fd0, 0x0fdf0129, - 0x01110fd2, 0x0fdd0140, 0x00f90fd6, 0x0fdb0156, - 0x00e40fd8, 0x0fd8016c, 0x00cd0fdd, 0x0fd8017e, - 0x00b80fe0, 0x0fd60192, 0x00a40fe3, 0x0fd601a3, - 0x00910fe7, 0x0fd501b3, 0x007f0feb, 0x0fd601c0, - 0x006e0fed, 0x0fd701ce, 0x005d0ff1, 0x0fd701db, - 0x004f0ff3, 0x0fd901e5, 0x00400ff7, 0x0fdc01ed, - 0x00330ff9, 0x0fe001f4, 0x00280ffb, 0x0fe301fa, - 0x001d0ffd, 0x0fe801fe, 0x00140ffe, 0x0fed0201, - 0x000c0000, 0x0ff20202, 0x00050000, 0x0ff90202, - 0x02000000, 0x00000000, 0x02040ff7, 0x00000005, - 0x02070fed, 0x0000000c, 0x02060fe6, 0x0ffe0016, - 0x02050fdf, 0x0ffc0020, 0x02020fd9, 0x0ff9002c, - 0x01fe0fd4, 0x0ff60038, 0x01f80fcf, 0x0ff30046, - 0x01f00fcb, 0x0fef0056, 0x01e70fc8, 0x0feb0066, - 0x01db0fc7, 0x0fe60078, 0x01cc0fc6, 0x0fe3008b, - 0x01bf0fc5, 0x0fdd009f, 0x01ae0fc6, 0x0fd800b4, - 0x019c0fc6, 0x0fd400ca, 0x01880fc9, 0x0fcf00e0, - 0x01750fc9, 0x0fc900f9, 0x015d0fce, 0x0fc6010f, - 0x01460fd0, 0x0fc20128, 0x012e0fd3, 0x0fbf0140, - 0x01140fd8, 0x0fbc0158, 0x00f90fdd, 0x0fbb016f, - 0x00df0fe0, 0x0fba0187, 0x00c40fe5, 0x0fb9019e, - 0x00aa0fe9, 0x0fba01b3, 0x008e0fef, 0x0fbd01c6, - 0x00740ff3, 0x0fc301d6, 0x005d0ff6, 0x0fc801e5, - 0x00450ffa, 0x0fd001f1, 0x00300ffc, 0x0fda01fa, - 0x001c0000, 0x0fe40200, 0x000c0000, 0x0ff20202, - 0x02000000, 0x00000000, 0x02030ff7, 0x00000006, - 0x02020fee, 0x00000010, 0x02000fe7, 0x0ffe001b, - 0x01fe0fdf, 0x0ffc0027, 0x01f70fda, 0x0ffa0035, - 0x01f00fd5, 0x0ff70044, 0x01e70fd0, 0x0ff40055, - 0x01dd0fcd, 0x0fef0067, 0x01d00fcb, 0x0fec0079, - 0x01bf0fcb, 0x0fe8008e, 0x01af0fca, 0x0fe500a2, - 0x019f0fc9, 0x0fe000b8, 0x018c0fca, 0x0fdb00cf, - 0x01770fcc, 0x0fd800e5, 0x01620fce, 0x0fd400fc, - 0x014d0fcf, 0x0fcf0115, 0x01350fd3, 0x0fcd012b, - 0x011d0fd6, 0x0fca0143, 0x01050fd9, 0x0fc8015a, - 0x00ec0fde, 0x0fc60170, 0x00d30fe2, 0x0fc60185, - 0x00bb0fe5, 0x0fc5019b, 0x00a30fea, 0x0fc501ae, - 0x008c0fed, 0x0fc601c1, 0x00740ff2, 0x0fc901d1, - 0x005e0ff5, 0x0fce01df, 0x004b0ff8, 0x0fd301ea, - 0x00370ffc, 0x0fda01f3, 0x00260ffd, 0x0fe201fb, - 0x00170000, 0x0fea01ff, 0x00090000, 0x0ff50202, - 0x02000000, 0x00000000, 0x02010ff7, 0x00000008, - 0x01ff0fee, 0x00000013, 0x01fb0fe7, 0x0ffe0020, - 0x01f60fe0, 0x0ffc002e, 0x01ed0fda, 0x0ffa003f, - 0x01e40fd6, 0x0ff7004f, 0x01d80fd2, 0x0ff40062, - 0x01ca0fcf, 0x0ff00077, 0x01bb0fcd, 0x0fed008b, - 0x01a90fcd, 0x0fe900a1, 0x01960fcd, 0x0fe600b7, - 0x01830fcd, 0x0fe200ce, 0x016d0fcf, 0x0fde00e6, - 0x01580fd0, 0x0fdb00fd, 0x01410fd3, 0x0fd80114, - 0x012c0fd4, 0x0fd4012c, 0x01140fd8, 0x0fd30141, - 0x00fd0fdb, 0x0fd00158, 0x00e60fde, 0x0fcf016d, - 0x00ce0fe2, 0x0fcd0183, 0x00b70fe6, 0x0fcd0196, - 0x00a10fe9, 0x0fcd01a9, 0x008b0fed, 0x0fcd01bb, - 0x00770ff0, 0x0fcf01ca, 0x00620ff4, 0x0fd201d8, - 0x004f0ff7, 0x0fd601e4, 0x003f0ffa, 0x0fda01ed, - 0x002e0ffc, 0x0fe001f6, 0x00200ffe, 0x0fe701fb, - 0x00130000, 0x0fee01ff, 0x00080000, 0x0ff70201, - 0x02000000, 0x00000000, 0x01ff0ff7, 0x0000000a, - 0x01f90fee, 0x00000019, 0x01f10fe7, 0x0ffe002a, - 0x01e60fe1, 0x0ffd003c, 0x01d90fdc, 0x0ffa0051, - 0x01cc0fd8, 0x0ff70065, 0x01bb0fd5, 0x0ff5007b, - 0x01a80fd3, 0x0ff10094, 0x01950fd2, 0x0fef00aa, - 0x01800fd2, 0x0feb00c3, 0x016a0fd3, 0x0fe900da, - 0x01540fd3, 0x0fe600f3, 0x013f0fd5, 0x0fe2010a, - 0x01280fd7, 0x0fe00121, 0x01100fda, 0x0fde0138, - 0x00fb0fdb, 0x0fdb014f, 0x00e40fdf, 0x0fdb0162, - 0x00ce0fe2, 0x0fd90177, 0x00b90fe4, 0x0fd8018b, - 0x00a50fe8, 0x0fd8019b, 0x00910fec, 0x0fd801ab, - 0x007e0fee, 0x0fd801bc, 0x006c0ff2, 0x0fd901c9, - 0x005c0ff4, 0x0fda01d6, 0x004b0ff7, 0x0fdd01e1, - 0x003c0ff9, 0x0fe001eb, 0x002f0ffb, 0x0fe401f2, - 0x00230ffd, 0x0fe801f8, 0x00180ffe, 0x0fed01fd, - 0x000e0000, 0x0ff20200, 0x00060000, 0x0ff90201, - 0x02000000, 0x00000000, 0x02030ff9, 0x00000004, - 0x02050ff2, 0x00000009, 0x02050fed, 0x0ffe0010, - 0x02040fe7, 0x0ffd0018, 0x02020fe3, 0x0ffb0020, - 0x01fe0fdf, 0x0ff9002a, 0x01fa0fdb, 0x0ff70034, - 0x01f40fd8, 0x0ff30041, 0x01ed0fd6, 0x0ff0004d, - 0x01e30fd5, 0x0fec005c, 0x01d80fd4, 0x0fea006a, - 0x01cd0fd3, 0x0fe5007b, 0x01c00fd3, 0x0fe1008c, - 0x01b10fd3, 0x0fdd009f, 0x01a10fd4, 0x0fd900b2, - 0x01900fd4, 0x0fd400c8, 0x017b0fd7, 0x0fd100dd, - 0x01660fd9, 0x0fcd00f4, 0x01500fda, 0x0fca010c, - 0x01380fde, 0x0fc60124, 0x011e0fe2, 0x0fc5013b, - 0x01040fe4, 0x0fc30155, 0x00e70fe8, 0x0fc10170, - 0x00cc0feb, 0x0fc10188, 0x00ad0ff0, 0x0fc301a0, - 0x00900ff4, 0x0fc701b5, 0x00750ff7, 0x0fcc01c8, - 0x00580ffb, 0x0fd201db, 0x003e0ffd, 0x0fdb01ea, - 0x00250000, 0x0fe501f6, 0x000f0000, 0x0ff301fe, - 0x02000000, 0x00000000, 0x02020ff9, 0x00000005, - 0x02020ff2, 0x0000000c, 0x02010fed, 0x0ffe0014, - 0x01fe0fe8, 0x0ffd001d, 0x01fa0fe3, 0x0ffb0028, - 0x01f40fe0, 0x0ff90033, 0x01ed0fdc, 0x0ff70040, - 0x01e50fd9, 0x0ff3004f, 0x01db0fd7, 0x0ff1005d, - 0x01ce0fd7, 0x0fed006e, 0x01c00fd6, 0x0feb007f, - 0x01b30fd5, 0x0fe70091, 0x01a30fd6, 0x0fe300a4, - 0x01920fd6, 0x0fe000b8, 0x017e0fd8, 0x0fdd00cd, - 0x016c0fd8, 0x0fd800e4, 0x01560fdb, 0x0fd600f9, - 0x01400fdd, 0x0fd20111, 0x01290fdf, 0x0fd00128, - 0x01110fe2, 0x0fce013f, 0x00f80fe6, 0x0fcd0155, - 0x00de0fe8, 0x0fcc016e, 0x00c40fec, 0x0fcb0185, - 0x00ab0fef, 0x0fcb019b, 0x00900ff3, 0x0fcd01b0, - 0x00770ff6, 0x0fd101c2, 0x005f0ff9, 0x0fd501d3, - 0x00470ffc, 0x0fdb01e2, 0x00320ffd, 0x0fe201ef, - 0x001e0000, 0x0fea01f8, 0x000c0000, 0x0ff501ff, - 0x02000000, 0x00000000, 0x02010ff9, 0x00000006, - 0x02000ff2, 0x0000000e, 0x01fd0fed, 0x0ffe0018, - 0x01f80fe8, 0x0ffd0023, 0x01f20fe4, 0x0ffb002f, - 0x01eb0fe0, 0x0ff9003c, 0x01e10fdd, 0x0ff7004b, - 0x01d60fda, 0x0ff4005c, 0x01c90fd9, 0x0ff2006c, - 0x01bc0fd8, 0x0fee007e, 0x01ab0fd8, 0x0fec0091, - 0x019b0fd8, 0x0fe800a5, 0x018b0fd8, 0x0fe400b9, - 0x01770fd9, 0x0fe200ce, 0x01620fdb, 0x0fdf00e4, - 0x014f0fdb, 0x0fdb00fb, 0x01380fde, 0x0fda0110, - 0x01210fe0, 0x0fd70128, 0x010a0fe2, 0x0fd5013f, - 0x00f30fe6, 0x0fd30154, 0x00da0fe9, 0x0fd3016a, - 0x00c30feb, 0x0fd20180, 0x00aa0fef, 0x0fd20195, - 0x00940ff1, 0x0fd301a8, 0x007b0ff5, 0x0fd501bb, - 0x00650ff7, 0x0fd801cc, 0x00510ffa, 0x0fdc01d9, - 0x003c0ffd, 0x0fe101e6, 0x002a0ffe, 0x0fe701f1, - 0x00190000, 0x0fee01f9, 0x000a0000, 0x0ff701ff, - 0x02000000, 0x00000000, 0x01ff0ff9, 0x00000008, - 0x01fb0ff2, 0x00000013, 0x01f50fed, 0x0ffe0020, - 0x01ed0fe8, 0x0ffd002e, 0x01e30fe4, 0x0ffb003e, - 0x01d80fe1, 0x0ff9004e, 0x01cb0fde, 0x0ff70060, - 0x01bc0fdc, 0x0ff40074, 0x01ac0fdb, 0x0ff20087, - 0x019a0fdb, 0x0fef009c, 0x01870fdb, 0x0fed00b1, - 0x01740fdb, 0x0fea00c7, 0x01600fdc, 0x0fe700dd, - 0x014b0fdd, 0x0fe500f3, 0x01350fdf, 0x0fe30109, - 0x01200fe0, 0x0fe00120, 0x01090fe3, 0x0fdf0135, - 0x00f30fe5, 0x0fdd014b, 0x00dd0fe7, 0x0fdc0160, - 0x00c70fea, 0x0fdb0174, 0x00b10fed, 0x0fdb0187, - 0x009c0fef, 0x0fdb019a, 0x00870ff2, 0x0fdb01ac, - 0x00740ff4, 0x0fdc01bc, 0x00600ff7, 0x0fde01cb, - 0x004e0ff9, 0x0fe101d8, 0x003e0ffb, 0x0fe401e3, - 0x002e0ffd, 0x0fe801ed, 0x00200ffe, 0x0fed01f5, - 0x00130000, 0x0ff201fb, 0x00080000, 0x0ff901ff -}; - - -#define MDP4_QSEED_TABLE0_OFF 0x8100 -#define MDP4_QSEED_TABLE1_OFF 0x8200 -#define MDP4_QSEED_TABLE2_OFF 0x9000 - -void mdp4_vg_qseed_init(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_QSEED_TABLE0_OFF); - for (i = 0; i < (sizeof(vg_qseed_table0) / sizeof(uint32)); i++) { - outpdw(off, vg_qseed_table0[i]); - off++; - } - - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_QSEED_TABLE1_OFF); - for (i = 0; i < (sizeof(vg_qseed_table1) / sizeof(uint32)); i++) { - outpdw(off, vg_qseed_table1[i]); - off++; - } - - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_QSEED_TABLE2_OFF); - for (i = 0; i < (sizeof(vg_qseed_table2) / sizeof(uint32)); i++) { - outpdw(off, vg_qseed_table2[i]); - off++; - } - -} - -void mdp4_mixer_blend_init(mixer_num) -{ - unsigned char *overlay_base; - int off; - - if (mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */ - overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */ - else - overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */ - - /* stage 0 to stage 2 */ - off = 0; - outpdw(overlay_base + off + 0x104, 0x010); - outpdw(overlay_base + off + 0x108, 0xff);/* FG */ - outpdw(overlay_base + off + 0x10c, 0x00);/* BG */ - - off += 0x20; - outpdw(overlay_base + off + 0x104, 0x010); - outpdw(overlay_base + off + 0x108, 0xff);/* FG */ - outpdw(overlay_base + off + 0x10c, 0x00);/* BG */ - - off += 0x20; - outpdw(overlay_base + off + 0x104, 0x010); - outpdw(overlay_base + off + 0x108, 0xff);/* FG */ - outpdw(overlay_base + off + 0x10c, 0x00);/* BG */ -} - - -static uint32 csc_matrix_tab[9] = { - 0x0254, 0x0000, 0x0331, - 0x0254, 0xff37, 0xfe60, - 0x0254, 0x0409, 0x0000 -}; - -static uint32 csc_pre_bv_tab[3] = {0xfff0, 0xff80, 0xff80 }; -static uint32 csc_post_bv_tab[3] = {0, 0, 0 }; - -static uint32 csc_pre_lv_tab[6] = {0, 0xff, 0, 0xff, 0, 0xff }; -static uint32 csc_post_lv_tab[6] = {0, 0xff, 0, 0xff, 0, 0xff }; - -#define MDP4_CSC_MV_OFF 0x4400 -#define MDP4_CSC_PRE_BV_OFF 0x4500 -#define MDP4_CSC_POST_BV_OFF 0x4580 -#define MDP4_CSC_PRE_LV_OFF 0x4600 -#define MDP4_CSC_POST_LV_OFF 0x4680 - -void mdp4_vg_csc_mv_setup(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_CSC_MV_OFF); - for (i = 0; i < 9; i++) { - outpdw(off, csc_matrix_tab[i]); - off++; - } -} - -void mdp4_vg_csc_pre_bv_setup(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_CSC_PRE_BV_OFF); - for (i = 0; i < 3; i++) { - outpdw(off, csc_pre_bv_tab[i]); - off++; - } -} - -void mdp4_vg_csc_post_bv_setup(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_CSC_POST_BV_OFF); - for (i = 0; i < 3; i++) { - outpdw(off, csc_post_bv_tab[i]); - off++; - } -} - -void mdp4_vg_csc_pre_lv_setup(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_CSC_PRE_LV_OFF); - - for (i = 0; i < 6; i++) { - outpdw(off, csc_pre_lv_tab[i]); - off++; - } -} - -void mdp4_vg_csc_post_lv_setup(int vp_num) -{ - uint32 *off; - int i, voff; - - voff = MDP4_VIDEO_OFF * vp_num; - off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff + - MDP4_CSC_POST_LV_OFF); - - for (i = 0; i < 6; i++) { - outpdw(off, csc_post_lv_tab[i]); - off++; - } -} - -char gc_lut[] = { - 0x0, 0x1, 0x2, 0x2, 0x3, 0x4, 0x5, 0x6, - 0x6, 0x7, 0x8, 0x9, 0xA, 0xA, 0xB, 0xC, - 0xD, 0xD, 0xE, 0xF, 0xF, 0x10, 0x10, 0x11, - 0x12, 0x12, 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, - 0x16, 0x16, 0x17, 0x17, 0x17, 0x18, 0x18, 0x19, - 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B, 0x1C, - 0x1C, 0x1D, 0x1D, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, - 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, - 0x22, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, - 0x24, 0x24, 0x25, 0x25, 0x25, 0x25, 0x26, 0x26, - 0x26, 0x26, 0x27, 0x27, 0x27, 0x28, 0x28, 0x28, - 0x28, 0x29, 0x29, 0x29, 0x29, 0x2A, 0x2A, 0x2A, - 0x2A, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2C, 0x2C, - 0x2C, 0x2C, 0x2D, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, - 0x2E, 0x2E, 0x2E, 0x2F, 0x2F, 0x2F, 0x2F, 0x30, - 0x30, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x31, - 0x31, 0x32, 0x32, 0x32, 0x32, 0x32, 0x33, 0x33, - 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x34, 0x34, - 0x35, 0x35, 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, - 0x36, 0x36, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, - 0x38, 0x38, 0x38, 0x38, 0x38, 0x39, 0x39, 0x39, - 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3A, 0x3A, 0x3A, - 0x3A, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3B, 0x3C, - 0x3C, 0x3C, 0x3C, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D, - 0x3D, 0x3D, 0x3D, 0x3E, 0x3E, 0x3E, 0x3E, 0x3E, - 0x3E, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x40, - 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x41, 0x41, - 0x41, 0x41, 0x41, 0x41, 0x42, 0x42, 0x42, 0x42, - 0x42, 0x42, 0x42, 0x43, 0x43, 0x43, 0x43, 0x43, - 0x43, 0x43, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, - 0x44, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, - 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x47, - 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x48, 0x48, - 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0xF6, 0xF6, 0xF6, 0xF6, 0xF6, 0xF6, 0xF6, 0xF6, - 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, - 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, - 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, - 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, 0xF7, - 0xF7, 0xF7, 0xF7, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, - 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, - 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, - 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, - 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF8, 0xF9, 0xF9, - 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, - 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, - 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, - 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, 0xF9, - 0xF9, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, - 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, - 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, - 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, - 0xFA, 0xFA, 0xFA, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, - 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, - 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, - 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, - 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, 0xFB, - 0xFB, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, - 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, - 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, - 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, - 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFD, 0xFD, 0xFD, - 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, - 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, - 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, - 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, 0xFD, - 0xFD, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, - 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, - 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, - 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, - 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -}; - -void mdp4_mixer_gc_lut_setup(int mixer_num) -{ - unsigned char *base; - uint32 data; - char val; - int i, off; - - if (mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */ - base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */ - else - base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */ - - base += 0x4000; /* GC_LUT offset */ - - off = 0; - for (i = 0; i < 4096; i++) { - val = gc_lut[i]; - data = (val << 16 | val << 8 | val); /* R, B, and G are same */ - outpdw(base + off, data); - off += 4; - } -} - -uint32 igc_video_lut[] = { /* non linear */ - 0x0, 0x1, 0x2, 0x4, 0x5, 0x6, 0x7, 0x9, - 0xA, 0xB, 0xC, 0xE, 0xF, 0x10, 0x12, 0x14, - 0x15, 0x17, 0x19, 0x1B, 0x1D, 0x1F, 0x21, 0x23, - 0x25, 0x28, 0x2A, 0x2D, 0x30, 0x32, 0x35, 0x38, - 0x3B, 0x3E, 0x42, 0x45, 0x48, 0x4C, 0x4F, 0x53, - 0x57, 0x5B, 0x5F, 0x63, 0x67, 0x6B, 0x70, 0x74, - 0x79, 0x7E, 0x83, 0x88, 0x8D, 0x92, 0x97, 0x9C, - 0xA2, 0xA8, 0xAD, 0xB3, 0xB9, 0xBF, 0xC5, 0xCC, - 0xD2, 0xD8, 0xDF, 0xE6, 0xED, 0xF4, 0xFB, 0x102, - 0x109, 0x111, 0x118, 0x120, 0x128, 0x130, 0x138, 0x140, - 0x149, 0x151, 0x15A, 0x162, 0x16B, 0x174, 0x17D, 0x186, - 0x190, 0x199, 0x1A3, 0x1AC, 0x1B6, 0x1C0, 0x1CA, 0x1D5, - 0x1DF, 0x1EA, 0x1F4, 0x1FF, 0x20A, 0x215, 0x220, 0x22B, - 0x237, 0x242, 0x24E, 0x25A, 0x266, 0x272, 0x27F, 0x28B, - 0x298, 0x2A4, 0x2B1, 0x2BE, 0x2CB, 0x2D8, 0x2E6, 0x2F3, - 0x301, 0x30F, 0x31D, 0x32B, 0x339, 0x348, 0x356, 0x365, - 0x374, 0x383, 0x392, 0x3A1, 0x3B1, 0x3C0, 0x3D0, 0x3E0, - 0x3F0, 0x400, 0x411, 0x421, 0x432, 0x443, 0x454, 0x465, - 0x476, 0x487, 0x499, 0x4AB, 0x4BD, 0x4CF, 0x4E1, 0x4F3, - 0x506, 0x518, 0x52B, 0x53E, 0x551, 0x565, 0x578, 0x58C, - 0x5A0, 0x5B3, 0x5C8, 0x5DC, 0x5F0, 0x605, 0x61A, 0x62E, - 0x643, 0x659, 0x66E, 0x684, 0x699, 0x6AF, 0x6C5, 0x6DB, - 0x6F2, 0x708, 0x71F, 0x736, 0x74D, 0x764, 0x77C, 0x793, - 0x7AB, 0x7C3, 0x7DB, 0x7F3, 0x80B, 0x824, 0x83D, 0x855, - 0x86F, 0x888, 0x8A1, 0x8BB, 0x8D4, 0x8EE, 0x908, 0x923, - 0x93D, 0x958, 0x973, 0x98E, 0x9A9, 0x9C4, 0x9DF, 0x9FB, - 0xA17, 0xA33, 0xA4F, 0xA6C, 0xA88, 0xAA5, 0xAC2, 0xADF, - 0xAFC, 0xB19, 0xB37, 0xB55, 0xB73, 0xB91, 0xBAF, 0xBCE, - 0xBEC, 0xC0B, 0xC2A, 0xC4A, 0xC69, 0xC89, 0xCA8, 0xCC8, - 0xCE8, 0xD09, 0xD29, 0xD4A, 0xD6B, 0xD8C, 0xDAD, 0xDCF, - 0xDF0, 0xE12, 0xE34, 0xE56, 0xE79, 0xE9B, 0xEBE, 0xEE1, - 0xF04, 0xF27, 0xF4B, 0xF6E, 0xF92, 0xFB6, 0xFDB, 0xFFF, -}; - -void mdp4_vg_igc_lut_setup(int vp_num) -{ - unsigned char *base; - int i, voff, off; - uint32 data, val; - - voff = MDP4_VIDEO_OFF * vp_num; - base = MDP_BASE + MDP4_VIDEO_BASE + voff + 0x5000; - - off = 0; - for (i = 0; i < 256; i++) { - val = igc_video_lut[i]; - data = (val << 16 | val); /* color 0 and 1 */ - outpdw(base + off, data); - outpdw(base + off + 0x800, val); /* color 2 */ - off += 4; - } -} - -uint32 igc_rgb_lut[] = { /* linear */ - 0x0, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, - 0x80, 0x91, 0xA1, 0xB1, 0xC1, 0xD1, 0xE1, 0xF1, - 0x101, 0x111, 0x121, 0x131, 0x141, 0x151, 0x161, 0x171, - 0x181, 0x191, 0x1A2, 0x1B2, 0x1C2, 0x1D2, 0x1E2, 0x1F2, - 0x202, 0x212, 0x222, 0x232, 0x242, 0x252, 0x262, 0x272, - 0x282, 0x292, 0x2A2, 0x2B3, 0x2C3, 0x2D3, 0x2E3, 0x2F3, - 0x303, 0x313, 0x323, 0x333, 0x343, 0x353, 0x363, 0x373, - 0x383, 0x393, 0x3A3, 0x3B3, 0x3C4, 0x3D4, 0x3E4, 0x3F4, - 0x404, 0x414, 0x424, 0x434, 0x444, 0x454, 0x464, 0x474, - 0x484, 0x494, 0x4A4, 0x4B4, 0x4C4, 0x4D5, 0x4E5, 0x4F5, - 0x505, 0x515, 0x525, 0x535, 0x545, 0x555, 0x565, 0x575, - 0x585, 0x595, 0x5A5, 0x5B5, 0x5C5, 0x5D5, 0x5E6, 0x5F6, - 0x606, 0x616, 0x626, 0x636, 0x646, 0x656, 0x666, 0x676, - 0x686, 0x696, 0x6A6, 0x6B6, 0x6C6, 0x6D6, 0x6E6, 0x6F7, - 0x707, 0x717, 0x727, 0x737, 0x747, 0x757, 0x767, 0x777, - 0x787, 0x797, 0x7A7, 0x7B7, 0x7C7, 0x7D7, 0x7E7, 0x7F7, - 0x808, 0x818, 0x828, 0x838, 0x848, 0x858, 0x868, 0x878, - 0x888, 0x898, 0x8A8, 0x8B8, 0x8C8, 0x8D8, 0x8E8, 0x8F8, - 0x908, 0x919, 0x929, 0x939, 0x949, 0x959, 0x969, 0x979, - 0x989, 0x999, 0x9A9, 0x9B9, 0x9C9, 0x9D9, 0x9E9, 0x9F9, - 0xA09, 0xA19, 0xA2A, 0xA3A, 0xA4A, 0xA5A, 0xA6A, 0xA7A, - 0xA8A, 0xA9A, 0xAAA, 0xABA, 0xACA, 0xADA, 0xAEA, 0xAFA, - 0xB0A, 0xB1A, 0xB2A, 0xB3B, 0xB4B, 0xB5B, 0xB6B, 0xB7B, - 0xB8B, 0xB9B, 0xBAB, 0xBBB, 0xBCB, 0xBDB, 0xBEB, 0xBFB, - 0xC0B, 0xC1B, 0xC2B, 0xC3B, 0xC4C, 0xC5C, 0xC6C, 0xC7C, - 0xC8C, 0xC9C, 0xCAC, 0xCBC, 0xCCC, 0xCDC, 0xCEC, 0xCFC, - 0xD0C, 0xD1C, 0xD2C, 0xD3C, 0xD4C, 0xD5D, 0xD6D, 0xD7D, - 0xD8D, 0xD9D, 0xDAD, 0xDBD, 0xDCD, 0xDDD, 0xDED, 0xDFD, - 0xE0D, 0xE1D, 0xE2D, 0xE3D, 0xE4D, 0xE5D, 0xE6E, 0xE7E, - 0xE8E, 0xE9E, 0xEAE, 0xEBE, 0xECE, 0xEDE, 0xEEE, 0xEFE, - 0xF0E, 0xF1E, 0xF2E, 0xF3E, 0xF4E, 0xF5E, 0xF6E, 0xF7F, - 0xF8F, 0xF9F, 0xFAF, 0xFBF, 0xFCF, 0xFDF, 0xFEF, 0xFFF, -}; - -void mdp4_rgb_igc_lut_setup(int num) -{ - unsigned char *base; - int i, voff, off; - uint32 data, val; - - voff = MDP4_RGB_OFF * num; - base = MDP_BASE + MDP4_RGB_BASE + voff + 0x5000; - - off = 0; - for (i = 0; i < 256; i++) { - val = igc_rgb_lut[i]; - data = (val << 16 | val); /* color 0 and 1 */ - outpdw(base + off, data); - outpdw(base + off + 0x800, val); /* color 2 */ - off += 4; - } -} diff --git a/drivers/staging/msm/mdp_cursor.c b/drivers/staging/msm/mdp_cursor.c deleted file mode 100644 index 7d28f30..0000000 --- a/drivers/staging/msm/mdp_cursor.c +++ /dev/null @@ -1,104 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" - -static int cursor_enabled; - -int mdp_hw_cursor_update(struct fb_info *info, struct fb_cursor *cursor) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - struct fb_image *img = &cursor->image; - int calpha_en, transp_en; - int alpha; - int ret = 0; - - if ((img->width > MDP_CURSOR_WIDTH) || - (img->height > MDP_CURSOR_HEIGHT) || - (img->depth != 32)) - return -EINVAL; - - if (cursor->set & FB_CUR_SETPOS) - MDP_OUTP(MDP_BASE + 0x9004c, (img->dy << 16) | img->dx); - - if (cursor->set & FB_CUR_SETIMAGE) { - ret = copy_from_user(mfd->cursor_buf, img->data, - img->width*img->height*4); - if (ret) - return ret; - - if (img->bg_color == 0xffffffff) - transp_en = 0; - else - transp_en = 1; - - alpha = (img->fg_color & 0xff000000) >> 24; - - if (alpha) - calpha_en = 0x2; /* xrgb */ - else - calpha_en = 0x1; /* argb */ - - MDP_OUTP(MDP_BASE + 0x90044, (img->height << 16) | img->width); - MDP_OUTP(MDP_BASE + 0x90048, mfd->cursor_buf_phys); - /* order the writes the cursor_buf before updating the - * hardware */ -// dma_coherent_pre_ops(); - MDP_OUTP(MDP_BASE + 0x90060, - (transp_en << 3) | (calpha_en << 1) | - (inp32(MDP_BASE + 0x90060) & 0x1)); -#ifdef CONFIG_FB_MSM_MDP40 - MDP_OUTP(MDP_BASE + 0x90064, (alpha << 24)); - MDP_OUTP(MDP_BASE + 0x90068, (0xffffff & img->bg_color)); - MDP_OUTP(MDP_BASE + 0x9006C, (0xffffff & img->bg_color)); -#else - MDP_OUTP(MDP_BASE + 0x90064, - (alpha << 24) | (0xffffff & img->bg_color)); - MDP_OUTP(MDP_BASE + 0x90068, 0); -#endif - } - - if ((cursor->enable) && (!cursor_enabled)) { - cursor_enabled = 1; - MDP_OUTP(MDP_BASE + 0x90060, inp32(MDP_BASE + 0x90060) | 0x1); - } else if ((!cursor->enable) && (cursor_enabled)) { - cursor_enabled = 0; - MDP_OUTP(MDP_BASE + 0x90060, - inp32(MDP_BASE + 0x90060) & (~0x1)); - } - - return 0; -} diff --git a/drivers/staging/msm/mdp_dma.c b/drivers/staging/msm/mdp_dma.c deleted file mode 100644 index 639918b..0000000 --- a/drivers/staging/msm/mdp_dma.c +++ /dev/null @@ -1,561 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mddihost.h" - -static uint32 mdp_last_dma2_update_width; -static uint32 mdp_last_dma2_update_height; -static uint32 mdp_curr_dma2_update_width; -static uint32 mdp_curr_dma2_update_height; - -ktime_t mdp_dma2_last_update_time = { 0 }; - -int mdp_lcd_rd_cnt_offset_slow = 20; -int mdp_lcd_rd_cnt_offset_fast = 20; -int mdp_vsync_usec_wait_line_too_short = 5; -uint32 mdp_dma2_update_time_in_usec; -uint32 mdp_total_vdopkts; - -extern u32 msm_fb_debug_enabled; -extern struct workqueue_struct *mdp_dma_wq; - -int vsync_start_y_adjust = 4; - -static void mdp_dma2_update_lcd(struct msm_fb_data_type *mfd) -{ - MDPIBUF *iBuf = &mfd->ibuf; - int mddi_dest = FALSE; - uint32 outBpp = iBuf->bpp; - uint32 dma2_cfg_reg; - uint8 *src; - uint32 mddi_ld_param; - uint16 mddi_vdo_packet_reg; - struct msm_fb_panel_data *pdata = - (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - uint32 ystride = mfd->fbi->fix.line_length; - - dma2_cfg_reg = DMA_PACK_TIGHT | DMA_PACK_ALIGN_LSB | - DMA_OUT_SEL_AHB | DMA_IBUF_NONCONTIGUOUS; - -#ifdef CONFIG_FB_MSM_MDP30 - /* - * Software workaround: On 7x25/7x27, the MDP will not - * respond if dma_w is 1 pixel. Set the update width to - * 2 pixels and adjust the x offset if needed. - */ - if (iBuf->dma_w == 1) { - iBuf->dma_w = 2; - if (iBuf->dma_x == (iBuf->ibuf_width - 2)) - iBuf->dma_x--; - } -#endif - - if (mfd->fb_imgType == MDP_BGR_565) - dma2_cfg_reg |= DMA_PACK_PATTERN_BGR; - else - dma2_cfg_reg |= DMA_PACK_PATTERN_RGB; - - if (outBpp == 4) - dma2_cfg_reg |= DMA_IBUF_C3ALPHA_EN; - - if (outBpp == 2) - dma2_cfg_reg |= DMA_IBUF_FORMAT_RGB565; - - mddi_ld_param = 0; - mddi_vdo_packet_reg = mfd->panel_info.mddi.vdopkt; - - if ((mfd->panel_info.type == MDDI_PANEL) || - (mfd->panel_info.type == EXT_MDDI_PANEL)) { - dma2_cfg_reg |= DMA_OUT_SEL_MDDI; - mddi_dest = TRUE; - - if (mfd->panel_info.type == MDDI_PANEL) { - mdp_total_vdopkts++; - if (mfd->panel_info.pdest == DISPLAY_1) { - dma2_cfg_reg |= DMA_MDDI_DMAOUT_LCD_SEL_PRIMARY; - mddi_ld_param = 0; -#ifdef MDDI_HOST_WINDOW_WORKAROUND - mddi_window_adjust(mfd, iBuf->dma_x, - iBuf->dma_w - 1, iBuf->dma_y, - iBuf->dma_h - 1); -#endif - } else { - dma2_cfg_reg |= - DMA_MDDI_DMAOUT_LCD_SEL_SECONDARY; - mddi_ld_param = 1; -#ifdef MDDI_HOST_WINDOW_WORKAROUND - mddi_window_adjust(mfd, iBuf->dma_x, - iBuf->dma_w - 1, iBuf->dma_y, - iBuf->dma_h - 1); -#endif - } - } else { - dma2_cfg_reg |= DMA_MDDI_DMAOUT_LCD_SEL_EXTERNAL; - mddi_ld_param = 2; - } - } else { - if (mfd->panel_info.pdest == DISPLAY_1) { - dma2_cfg_reg |= DMA_AHBM_LCD_SEL_PRIMARY; - outp32(MDP_EBI2_LCD0, mfd->data_port_phys); - } else { - dma2_cfg_reg |= DMA_AHBM_LCD_SEL_SECONDARY; - outp32(MDP_EBI2_LCD1, mfd->data_port_phys); - } - } - - dma2_cfg_reg |= DMA_DITHER_EN; - - src = (uint8 *) iBuf->buf; - /* starting input address */ - src += iBuf->dma_x * outBpp + iBuf->dma_y * ystride; - - mdp_curr_dma2_update_width = iBuf->dma_w; - mdp_curr_dma2_update_height = iBuf->dma_h; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - -#ifdef CONFIG_FB_MSM_MDP22 - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0184, - (iBuf->dma_h << 16 | iBuf->dma_w)); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0188, src); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x018C, ystride); -#else - MDP_OUTP(MDP_BASE + 0x90004, (iBuf->dma_h << 16 | iBuf->dma_w)); - MDP_OUTP(MDP_BASE + 0x90008, src); - MDP_OUTP(MDP_BASE + 0x9000c, ystride); -#endif - - if (mfd->panel_info.bpp == 18) { - dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */ - DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS; - } else { - dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */ - DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS; - } - - if (mddi_dest) { -#ifdef CONFIG_FB_MSM_MDP22 - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0194, - (iBuf->dma_y << 16) | iBuf->dma_x); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a0, mddi_ld_param); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a4, - (MDDI_VDO_PACKET_DESC << 16) | mddi_vdo_packet_reg); -#else - MDP_OUTP(MDP_BASE + 0x90010, (iBuf->dma_y << 16) | iBuf->dma_x); - MDP_OUTP(MDP_BASE + 0x00090, mddi_ld_param); - MDP_OUTP(MDP_BASE + 0x00094, - (MDDI_VDO_PACKET_DESC << 16) | mddi_vdo_packet_reg); -#endif - } else { - /* setting EBI2 LCDC write window */ - pdata->set_rect(iBuf->dma_x, iBuf->dma_y, iBuf->dma_w, - iBuf->dma_h); - } - - /* dma2 config register */ -#ifdef MDP_HW_VSYNC - MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg); - - if ((mfd->use_mdp_vsync) && - (mfd->ibuf.vsync_enable) && (mfd->panel_info.lcd.vsync_enable)) { - uint32 start_y; - - if (vsync_start_y_adjust <= iBuf->dma_y) - start_y = iBuf->dma_y - vsync_start_y_adjust; - else - start_y = - (mfd->total_lcd_lines - 1) - (vsync_start_y_adjust - - iBuf->dma_y); - - /* - * MDP VSYNC clock must be On by now so, we don't have to - * re-enable it - */ - MDP_OUTP(MDP_BASE + 0x210, start_y); - MDP_OUTP(MDP_BASE + 0x20c, 1); /* enable prim vsync */ - } else { - MDP_OUTP(MDP_BASE + 0x20c, 0); /* disable prim vsync */ - } -#else -#ifdef CONFIG_FB_MSM_MDP22 - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0180, dma2_cfg_reg); -#else - MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg); -#endif -#endif /* MDP_HW_VSYNC */ - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); -} - -static ktime_t vt = { 0 }; -int mdp_usec_diff_threshold = 100; -int mdp_expected_usec_wait; - -enum hrtimer_restart mdp_dma2_vsync_hrtimer_handler(struct hrtimer *ht) -{ - struct msm_fb_data_type *mfd = NULL; - - mfd = container_of(ht, struct msm_fb_data_type, dma_hrtimer); - - mdp_pipe_kickoff(MDP_DMA2_TERM, mfd); - - if (msm_fb_debug_enabled) { - ktime_t t; - int usec_diff; - int actual_wait; - - t = ktime_get_real(); - - actual_wait = - (t.tv.sec - vt.tv.sec) * 1000000 + (t.tv.nsec - - vt.tv.nsec) / 1000; - usec_diff = actual_wait - mdp_expected_usec_wait; - - if ((mdp_usec_diff_threshold < usec_diff) || (usec_diff < 0)) - MSM_FB_DEBUG - ("HRT Diff = %d usec Exp=%d usec Act=%d usec\n", - usec_diff, mdp_expected_usec_wait, actual_wait); - } - - return HRTIMER_NORESTART; -} - -static void mdp_dma_schedule(struct msm_fb_data_type *mfd, uint32 term) -{ - /* - * dma2 configure VSYNC block - * vsync supported on Primary LCD only for now - */ - int32 mdp_lcd_rd_cnt; - uint32 usec_wait_time; - uint32 start_y; - - /* - * ToDo: if we can move HRT timer callback to workqueue, we can - * move DMA2 power on under mdp_pipe_kickoff(). - * This will save a power for hrt time wait. - * However if the latency for context switch (hrt irq -> workqueue) - * is too big, we will miss the vsync timing. - */ - if (term == MDP_DMA2_TERM) - mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - mdp_dma2_update_time_in_usec = - MDP_KTIME2USEC(mdp_dma2_last_update_time); - - if ((!mfd->ibuf.vsync_enable) || (!mfd->panel_info.lcd.vsync_enable) - || (mfd->use_mdp_vsync)) { - mdp_pipe_kickoff(term, mfd); - return; - } - /* SW vsync logic starts here */ - - /* get current rd counter */ - mdp_lcd_rd_cnt = mdp_get_lcd_line_counter(mfd); - if (mdp_dma2_update_time_in_usec != 0) { - uint32 num, den; - - /* - * roi width boundary calculation to know the size of pixel - * width that MDP can send faster or slower than LCD read - * pointer - */ - - num = mdp_last_dma2_update_width * mdp_last_dma2_update_height; - den = - (((mfd->panel_info.lcd.refx100 * mfd->total_lcd_lines) / - 1000) * (mdp_dma2_update_time_in_usec / 100)) / 1000; - - if (den == 0) - mfd->vsync_width_boundary[mdp_last_dma2_update_width] = - mfd->panel_info.xres + 1; - else - mfd->vsync_width_boundary[mdp_last_dma2_update_width] = - (int)(num / den); - } - - if (mfd->vsync_width_boundary[mdp_last_dma2_update_width] > - mdp_curr_dma2_update_width) { - /* MDP wrp is faster than LCD rdp */ - mdp_lcd_rd_cnt += mdp_lcd_rd_cnt_offset_fast; - } else { - /* MDP wrp is slower than LCD rdp */ - mdp_lcd_rd_cnt -= mdp_lcd_rd_cnt_offset_slow; - } - - if (mdp_lcd_rd_cnt < 0) - mdp_lcd_rd_cnt = mfd->total_lcd_lines + mdp_lcd_rd_cnt; - else if (mdp_lcd_rd_cnt > mfd->total_lcd_lines) - mdp_lcd_rd_cnt = mdp_lcd_rd_cnt - mfd->total_lcd_lines - 1; - - /* get wrt pointer position */ - start_y = mfd->ibuf.dma_y; - - /* measure line difference between start_y and rd counter */ - if (start_y > mdp_lcd_rd_cnt) { - /* - * *100 for lcd_ref_hzx100 was already multiplied by 100 - * *1000000 is for usec conversion - */ - - if ((start_y - mdp_lcd_rd_cnt) <= - mdp_vsync_usec_wait_line_too_short) - usec_wait_time = 0; - else - usec_wait_time = - ((start_y - - mdp_lcd_rd_cnt) * 1000000) / - ((mfd->total_lcd_lines * - mfd->panel_info.lcd.refx100) / 100); - } else { - if ((start_y + (mfd->total_lcd_lines - mdp_lcd_rd_cnt)) <= - mdp_vsync_usec_wait_line_too_short) - usec_wait_time = 0; - else - usec_wait_time = - ((start_y + - (mfd->total_lcd_lines - - mdp_lcd_rd_cnt)) * 1000000) / - ((mfd->total_lcd_lines * - mfd->panel_info.lcd.refx100) / 100); - } - - mdp_last_dma2_update_width = mdp_curr_dma2_update_width; - mdp_last_dma2_update_height = mdp_curr_dma2_update_height; - - if (usec_wait_time == 0) { - mdp_pipe_kickoff(term, mfd); - } else { - ktime_t wait_time; - - wait_time.tv.sec = 0; - wait_time.tv.nsec = usec_wait_time * 1000; - - if (msm_fb_debug_enabled) { - vt = ktime_get_real(); - mdp_expected_usec_wait = usec_wait_time; - } - hrtimer_start(&mfd->dma_hrtimer, wait_time, HRTIMER_MODE_REL); - } -} - -#ifdef MDDI_HOST_WINDOW_WORKAROUND -void mdp_dma2_update(struct msm_fb_data_type *mfd) -{ - MDPIBUF *iBuf; - uint32 upper_height; - - if (mfd->panel.type == EXT_MDDI_PANEL) { - mdp_dma2_update_sub(mfd); - return; - } - - iBuf = &mfd->ibuf; - - upper_height = - (uint32) mddi_assign_pkt_height((uint16) iBuf->dma_w, - (uint16) iBuf->dma_h, 18); - - if (upper_height >= iBuf->dma_h) { - mdp_dma2_update_sub(mfd); - } else { - MDPIBUF lower_height; - - /* sending the upper region first */ - lower_height = iBuf->dma_h - upper_height; - iBuf->dma_h = upper_height; - mdp_dma2_update_sub(mfd); - - /* sending the lower region second */ - iBuf->dma_h = lower_height; - iBuf->dma_y += lower_height; - iBuf->vsync_enable = FALSE; - mdp_dma2_update_sub(mfd); - } -} - -void mdp_dma2_update_sub(struct msm_fb_data_type *mfd) -#else -void mdp_dma2_update(struct msm_fb_data_type *mfd) -#endif -{ - down(&mfd->dma->mutex); - if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) { - down(&mfd->sem); - mfd->ibuf_flushed = TRUE; - mdp_dma2_update_lcd(mfd); - - mdp_enable_irq(MDP_DMA2_TERM); - mfd->dma->busy = TRUE; - INIT_COMPLETION(mfd->dma->comp); - - /* schedule DMA to start */ - mdp_dma_schedule(mfd, MDP_DMA2_TERM); - up(&mfd->sem); - - /* wait until DMA finishes the current job */ - wait_for_completion_killable(&mfd->dma->comp); - mdp_disable_irq(MDP_DMA2_TERM); - - /* signal if pan function is waiting for the update completion */ - if (mfd->pan_waiting) { - mfd->pan_waiting = FALSE; - complete(&mfd->pan_comp); - } - } - up(&mfd->dma->mutex); -} - -void mdp_lcd_update_workqueue_handler(struct work_struct *work) -{ - struct msm_fb_data_type *mfd = NULL; - - mfd = container_of(work, struct msm_fb_data_type, dma_update_worker); - if (mfd) - mfd->dma_fnc(mfd); -} - -void mdp_set_dma_pan_info(struct fb_info *info, struct mdp_dirty_region *dirty, - boolean sync) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - MDPIBUF *iBuf; - int bpp = info->var.bits_per_pixel / 8; - - down(&mfd->sem); - iBuf = &mfd->ibuf; - iBuf->buf = (uint8 *) info->fix.smem_start; - iBuf->buf += info->var.xoffset * bpp + - info->var.yoffset * info->fix.line_length; - - iBuf->ibuf_width = info->var.xres_virtual; - iBuf->bpp = bpp; - - iBuf->vsync_enable = sync; - - if (dirty) { - /* - * ToDo: dirty region check inside var.xoffset+xres - * <-> var.yoffset+yres - */ - iBuf->dma_x = dirty->xoffset % info->var.xres; - iBuf->dma_y = dirty->yoffset % info->var.yres; - iBuf->dma_w = dirty->width; - iBuf->dma_h = dirty->height; - } else { - iBuf->dma_x = 0; - iBuf->dma_y = 0; - iBuf->dma_w = info->var.xres; - iBuf->dma_h = info->var.yres; - } - mfd->ibuf_flushed = FALSE; - up(&mfd->sem); -} - -void mdp_set_offset_info(struct fb_info *info, uint32 addr, uint32 sync) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - MDPIBUF *iBuf; - - int bpp = info->var.bits_per_pixel / 8; - - down(&mfd->sem); - iBuf = &mfd->ibuf; - iBuf->ibuf_width = info->var.xres_virtual; - iBuf->bpp = bpp; - iBuf->vsync_enable = sync; - iBuf->dma_x = 0; - iBuf->dma_y = 0; - iBuf->dma_w = info->var.xres; - iBuf->dma_h = info->var.yres; - iBuf->buf = (uint8 *) addr; - - mfd->ibuf_flushed = FALSE; - up(&mfd->sem); -} - -void mdp_dma_pan_update(struct fb_info *info) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - MDPIBUF *iBuf; - - iBuf = &mfd->ibuf; - - if (mfd->sw_currently_refreshing) { - /* we need to wait for the pending update */ - mfd->pan_waiting = TRUE; - if (!mfd->ibuf_flushed) { - wait_for_completion_killable(&mfd->pan_comp); - } - /* waiting for this update to complete */ - mfd->pan_waiting = TRUE; - wait_for_completion_killable(&mfd->pan_comp); - } else - mfd->dma_fnc(mfd); -} - -void mdp_refresh_screen(unsigned long data) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)data; - - if ((mfd->sw_currently_refreshing) && (mfd->sw_refreshing_enable)) { - init_timer(&mfd->refresh_timer); - mfd->refresh_timer.function = mdp_refresh_screen; - mfd->refresh_timer.data = data; - - if (mfd->dma->busy) - /* come back in 1 msec */ - mfd->refresh_timer.expires = jiffies + (HZ / 1000); - else - mfd->refresh_timer.expires = - jiffies + mfd->refresh_timer_duration; - - add_timer(&mfd->refresh_timer); - - if (!mfd->dma->busy) { - if (!queue_work(mdp_dma_wq, &mfd->dma_update_worker)) { - MSM_FB_DEBUG("mdp_dma: can't queue_work! -> \ - MDP/MDDI/LCD clock speed needs to be increased\n"); - } - } - } else { - if (!mfd->hw_refresh) - complete(&mfd->refresher_comp); - } -} diff --git a/drivers/staging/msm/mdp_dma_lcdc.c b/drivers/staging/msm/mdp_dma_lcdc.c deleted file mode 100644 index b57fa1a..0000000 --- a/drivers/staging/msm/mdp_dma_lcdc.c +++ /dev/null @@ -1,379 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mdp4.h" - -#ifdef CONFIG_FB_MSM_MDP40 -#define LCDC_BASE 0xC0000 -#define DTV_BASE 0xD0000 -#define DMA_E_BASE 0xB0000 -#else -#define LCDC_BASE 0xE0000 -#endif - -#define DMA_P_BASE 0x90000 - -extern spinlock_t mdp_spin_lock; -#ifndef CONFIG_FB_MSM_MDP40 -extern uint32 mdp_intr_mask; -#endif - -int first_pixel_start_x; -int first_pixel_start_y; - -int mdp_lcdc_on(struct platform_device *pdev) -{ - int lcdc_width; - int lcdc_height; - int lcdc_bpp; - int lcdc_border_clr; - int lcdc_underflow_clr; - int lcdc_hsync_skew; - - int hsync_period; - int hsync_ctrl; - int vsync_period; - int display_hctl; - int display_v_start; - int display_v_end; - int active_hctl; - int active_h_start; - int active_h_end; - int active_v_start; - int active_v_end; - int ctrl_polarity; - int h_back_porch; - int h_front_porch; - int v_back_porch; - int v_front_porch; - int hsync_pulse_width; - int vsync_pulse_width; - int hsync_polarity; - int vsync_polarity; - int data_en_polarity; - int hsync_start_x; - int hsync_end_x; - uint8 *buf; - int bpp; - uint32 dma2_cfg_reg; - struct fb_info *fbi; - struct fb_var_screeninfo *var; - struct msm_fb_data_type *mfd; - uint32 dma_base; - uint32 timer_base = LCDC_BASE; - uint32 block = MDP_DMA2_BLOCK; - int ret; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - fbi = mfd->fbi; - var = &fbi->var; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + fbi->var.yoffset * fbi->fix.line_length; - - dma2_cfg_reg = DMA_PACK_ALIGN_LSB | DMA_DITHER_EN | DMA_OUT_SEL_LCDC; - - if (mfd->fb_imgType == MDP_BGR_565) - dma2_cfg_reg |= DMA_PACK_PATTERN_BGR; - else - dma2_cfg_reg |= DMA_PACK_PATTERN_RGB; - - if (bpp == 2) - dma2_cfg_reg |= DMA_IBUF_FORMAT_RGB565; - else if (bpp == 3) - dma2_cfg_reg |= DMA_IBUF_FORMAT_RGB888; - else - dma2_cfg_reg |= DMA_IBUF_FORMAT_xRGB8888_OR_ARGB8888; - - switch (mfd->panel_info.bpp) { - case 24: - dma2_cfg_reg |= DMA_DSTC0G_8BITS | - DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS; - break; - - case 18: - dma2_cfg_reg |= DMA_DSTC0G_6BITS | - DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS; - break; - - case 16: - dma2_cfg_reg |= DMA_DSTC0G_6BITS | - DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS; - break; - - default: - printk(KERN_ERR "mdp lcdc can't support format %d bpp!\n", - mfd->panel_info.bpp); - return -ENODEV; - } - - /* DMA register config */ - - dma_base = DMA_P_BASE; - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == HDMI_PANEL) - dma_base = DMA_E_BASE; -#endif - - /* starting address */ - MDP_OUTP(MDP_BASE + dma_base + 0x8, (uint32) buf); - /* active window width and height */ - MDP_OUTP(MDP_BASE + dma_base + 0x4, ((fbi->var.yres) << 16) | - (fbi->var.xres)); - /* buffer ystride */ - MDP_OUTP(MDP_BASE + dma_base + 0xc, fbi->fix.line_length); - /* x/y coordinate = always 0 for lcdc */ - MDP_OUTP(MDP_BASE + dma_base + 0x10, 0); - /* dma config */ - MDP_OUTP(MDP_BASE + dma_base, dma2_cfg_reg); - - /* - * LCDC timing setting - */ - h_back_porch = var->left_margin; - h_front_porch = var->right_margin; - v_back_porch = var->upper_margin; - v_front_porch = var->lower_margin; - hsync_pulse_width = var->hsync_len; - vsync_pulse_width = var->vsync_len; - lcdc_border_clr = mfd->panel_info.lcdc.border_clr; - lcdc_underflow_clr = mfd->panel_info.lcdc.underflow_clr; - lcdc_hsync_skew = mfd->panel_info.lcdc.hsync_skew; - - lcdc_width = mfd->panel_info.xres; - lcdc_height = mfd->panel_info.yres; - lcdc_bpp = mfd->panel_info.bpp; - - hsync_period = - hsync_pulse_width + h_back_porch + lcdc_width + h_front_porch; - hsync_ctrl = (hsync_period << 16) | hsync_pulse_width; - hsync_start_x = hsync_pulse_width + h_back_porch; - hsync_end_x = hsync_period - h_front_porch - 1; - display_hctl = (hsync_end_x << 16) | hsync_start_x; - - vsync_period = - (vsync_pulse_width + v_back_porch + lcdc_height + - v_front_porch) * hsync_period; - display_v_start = - (vsync_pulse_width + v_back_porch) * hsync_period + lcdc_hsync_skew; - display_v_end = - vsync_period - (v_front_porch * hsync_period) + lcdc_hsync_skew - 1; - - if (lcdc_width != var->xres) { - active_h_start = hsync_start_x + first_pixel_start_x; - active_h_end = active_h_start + var->xres - 1; - active_hctl = - ACTIVE_START_X_EN | (active_h_end << 16) | active_h_start; - } else { - active_hctl = 0; - } - - if (lcdc_height != var->yres) { - active_v_start = - display_v_start + first_pixel_start_y * hsync_period; - active_v_end = active_v_start + (var->yres) * hsync_period - 1; - active_v_start |= ACTIVE_START_Y_EN; - } else { - active_v_start = 0; - active_v_end = 0; - } - - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == HDMI_PANEL) { - block = MDP_DMA_E_BLOCK; - timer_base = DTV_BASE; - hsync_polarity = 0; - vsync_polarity = 0; - } else { - hsync_polarity = 1; - vsync_polarity = 1; - } - - lcdc_underflow_clr |= 0x80000000; /* enable recovery */ -#else - hsync_polarity = 0; - vsync_polarity = 0; -#endif - data_en_polarity = 0; - - ctrl_polarity = - (data_en_polarity << 2) | (vsync_polarity << 1) | (hsync_polarity); - - MDP_OUTP(MDP_BASE + timer_base + 0x4, hsync_ctrl); - MDP_OUTP(MDP_BASE + timer_base + 0x8, vsync_period); - MDP_OUTP(MDP_BASE + timer_base + 0xc, vsync_pulse_width * hsync_period); - if (timer_base == LCDC_BASE) { - MDP_OUTP(MDP_BASE + timer_base + 0x10, display_hctl); - MDP_OUTP(MDP_BASE + timer_base + 0x14, display_v_start); - MDP_OUTP(MDP_BASE + timer_base + 0x18, display_v_end); - MDP_OUTP(MDP_BASE + timer_base + 0x28, lcdc_border_clr); - MDP_OUTP(MDP_BASE + timer_base + 0x2c, lcdc_underflow_clr); - MDP_OUTP(MDP_BASE + timer_base + 0x30, lcdc_hsync_skew); - MDP_OUTP(MDP_BASE + timer_base + 0x38, ctrl_polarity); - MDP_OUTP(MDP_BASE + timer_base + 0x1c, active_hctl); - MDP_OUTP(MDP_BASE + timer_base + 0x20, active_v_start); - MDP_OUTP(MDP_BASE + timer_base + 0x24, active_v_end); - } else { - MDP_OUTP(MDP_BASE + timer_base + 0x18, display_hctl); - MDP_OUTP(MDP_BASE + timer_base + 0x1c, display_v_start); - MDP_OUTP(MDP_BASE + timer_base + 0x20, display_v_end); - MDP_OUTP(MDP_BASE + timer_base + 0x40, lcdc_border_clr); - MDP_OUTP(MDP_BASE + timer_base + 0x44, lcdc_underflow_clr); - MDP_OUTP(MDP_BASE + timer_base + 0x48, lcdc_hsync_skew); - MDP_OUTP(MDP_BASE + timer_base + 0x50, ctrl_polarity); - MDP_OUTP(MDP_BASE + timer_base + 0x2c, active_hctl); - MDP_OUTP(MDP_BASE + timer_base + 0x30, active_v_start); - MDP_OUTP(MDP_BASE + timer_base + 0x38, active_v_end); - } - - ret = panel_next_on(pdev); - if (ret == 0) { - /* enable LCDC block */ - MDP_OUTP(MDP_BASE + timer_base, 1); - mdp_pipe_ctrl(block, MDP_BLOCK_POWER_ON, FALSE); - } - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - return ret; -} - -int mdp_lcdc_off(struct platform_device *pdev) -{ - int ret = 0; - struct msm_fb_data_type *mfd; - uint32 timer_base = LCDC_BASE; - uint32 block = MDP_DMA2_BLOCK; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == HDMI_PANEL) { - block = MDP_DMA_E_BLOCK; - timer_base = DTV_BASE; - } -#endif - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - MDP_OUTP(MDP_BASE + timer_base, 0); - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - mdp_pipe_ctrl(block, MDP_BLOCK_POWER_OFF, FALSE); - - ret = panel_next_off(pdev); - - /* delay to make sure the last frame finishes */ - mdelay(100); - - return ret; -} - -void mdp_lcdc_update(struct msm_fb_data_type *mfd) -{ - struct fb_info *fbi = mfd->fbi; - uint8 *buf; - int bpp; - unsigned long flag; - uint32 dma_base; - int irq_block = MDP_DMA2_TERM; -#ifdef CONFIG_FB_MSM_MDP40 - int intr = INTR_DMA_P_DONE; -#endif - - if (!mfd->panel_power_on) - return; - - /* no need to power on cmd block since it's lcdc mode */ - - if (!mfd->ibuf.visible_swapped) { - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + - fbi->var.yoffset * fbi->fix.line_length; - } else { - /* we've done something to update the pointer. */ - bpp = mfd->ibuf.bpp; - buf = mfd->ibuf.buf; - } - - dma_base = DMA_P_BASE; - -#ifdef CONFIG_FB_MSM_MDP40 - if (mfd->panel.type == HDMI_PANEL) { - intr = INTR_DMA_E_DONE; - irq_block = MDP_DMA_E_TERM; - dma_base = DMA_E_BASE; - } -#endif - - /* starting address */ - MDP_OUTP(MDP_BASE + dma_base + 0x8, (uint32) buf); - - /* enable LCDC irq */ - spin_lock_irqsave(&mdp_spin_lock, flag); - mdp_enable_irq(irq_block); - INIT_COMPLETION(mfd->dma->comp); - mfd->dma->waiting = TRUE; -#ifdef CONFIG_FB_MSM_MDP40 - outp32(MDP_INTR_CLEAR, intr); - mdp_intr_mask |= intr; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); -#else - outp32(MDP_INTR_CLEAR, LCDC_FRAME_START); - mdp_intr_mask |= LCDC_FRAME_START; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); -#endif - spin_unlock_irqrestore(&mdp_spin_lock, flag); - - if (mfd->ibuf.vsync_enable) - wait_for_completion_killable(&mfd->dma->comp); - mdp_disable_irq(irq_block); -} diff --git a/drivers/staging/msm/mdp_dma_s.c b/drivers/staging/msm/mdp_dma_s.c deleted file mode 100644 index 0c34a10..0000000 --- a/drivers/staging/msm/mdp_dma_s.c +++ /dev/null @@ -1,139 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" - -static void mdp_dma_s_update_lcd(struct msm_fb_data_type *mfd) -{ - MDPIBUF *iBuf = &mfd->ibuf; - int mddi_dest = FALSE; - uint32 outBpp = iBuf->bpp; - uint32 dma_s_cfg_reg; - uint8 *src; - struct msm_fb_panel_data *pdata = - (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - - dma_s_cfg_reg = DMA_PACK_TIGHT | DMA_PACK_ALIGN_LSB | - DMA_OUT_SEL_AHB | DMA_IBUF_NONCONTIGUOUS; - - if (mfd->fb_imgType == MDP_BGR_565) - dma_s_cfg_reg |= DMA_PACK_PATTERN_BGR; - else - dma_s_cfg_reg |= DMA_PACK_PATTERN_RGB; - - if (outBpp == 4) - dma_s_cfg_reg |= DMA_IBUF_C3ALPHA_EN; - - if (outBpp == 2) - dma_s_cfg_reg |= DMA_IBUF_FORMAT_RGB565; - - if (mfd->panel_info.pdest != DISPLAY_2) { - printk(KERN_ERR "error: non-secondary type through dma_s!\n"); - return; - } - - if (mfd->panel_info.type == MDDI_PANEL) { - dma_s_cfg_reg |= DMA_OUT_SEL_MDDI; - mddi_dest = TRUE; - } else { - dma_s_cfg_reg |= DMA_AHBM_LCD_SEL_SECONDARY; - outp32(MDP_EBI2_LCD1, mfd->data_port_phys); - } - - dma_s_cfg_reg |= DMA_DITHER_EN; - - src = (uint8 *) iBuf->buf; - /* starting input address */ - src += (iBuf->dma_x + iBuf->dma_y * iBuf->ibuf_width) * outBpp; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - /* PIXELSIZE */ - MDP_OUTP(MDP_BASE + 0xa0004, (iBuf->dma_h << 16 | iBuf->dma_w)); - MDP_OUTP(MDP_BASE + 0xa0008, src); /* ibuf address */ - MDP_OUTP(MDP_BASE + 0xa000c, iBuf->ibuf_width * outBpp);/* ystride */ - - if (mfd->panel_info.bpp == 18) { - dma_s_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */ - DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS; - } else { - dma_s_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */ - DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS; - } - - if (mddi_dest) { - MDP_OUTP(MDP_BASE + 0xa0010, (iBuf->dma_y << 16) | iBuf->dma_x); - MDP_OUTP(MDP_BASE + 0x00090, 1); - MDP_OUTP(MDP_BASE + 0x00094, - (MDDI_VDO_PACKET_DESC << 16) | - mfd->panel_info.mddi.vdopkt); - } else { - /* setting LCDC write window */ - pdata->set_rect(iBuf->dma_x, iBuf->dma_y, iBuf->dma_w, - iBuf->dma_h); - } - - MDP_OUTP(MDP_BASE + 0xa0000, dma_s_cfg_reg); - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - mdp_pipe_kickoff(MDP_DMA_S_TERM, mfd); -} - -void mdp_dma_s_update(struct msm_fb_data_type *mfd) -{ - down(&mfd->dma->mutex); - if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) { - down(&mfd->sem); - mdp_enable_irq(MDP_DMA_S_TERM); - mfd->dma->busy = TRUE; - INIT_COMPLETION(mfd->dma->comp); - mfd->ibuf_flushed = TRUE; - mdp_dma_s_update_lcd(mfd); - up(&mfd->sem); - - /* wait until DMA finishes the current job */ - wait_for_completion_killable(&mfd->dma->comp); - mdp_disable_irq(MDP_DMA_S_TERM); - - /* signal if pan function is waiting for the update completion */ - if (mfd->pan_waiting) { - mfd->pan_waiting = FALSE; - complete(&mfd->pan_comp); - } - } - up(&mfd->dma->mutex); -} diff --git a/drivers/staging/msm/mdp_dma_tv.c b/drivers/staging/msm/mdp_dma_tv.c deleted file mode 100644 index 70989fb..0000000 --- a/drivers/staging/msm/mdp_dma_tv.c +++ /dev/null @@ -1,142 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -#include "mdp.h" -#include "msm_fb.h" - -extern spinlock_t mdp_spin_lock; -extern uint32 mdp_intr_mask; - -int mdp_dma3_on(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct fb_info *fbi; - uint8 *buf; - int bpp; - int ret = 0; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - fbi = mfd->fbi; - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + - fbi->var.yoffset * fbi->fix.line_length; - - /* starting address[31..8] of Video frame buffer is CS0 */ - MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3); - - mdp_pipe_ctrl(MDP_DMA3_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - MDP_OUTP(MDP_BASE + 0xC0004, 0x4c60674); /* flicker filter enabled */ - MDP_OUTP(MDP_BASE + 0xC0010, 0x20); /* sobel treshold */ - - MDP_OUTP(MDP_BASE + 0xC0018, 0xeb0010); /* Y Max, Y min */ - MDP_OUTP(MDP_BASE + 0xC001C, 0xf00010); /* Cb Max, Cb min */ - MDP_OUTP(MDP_BASE + 0xC0020, 0xf00010); /* Cb Max, Cb min */ - - MDP_OUTP(MDP_BASE + 0xC000C, 0x67686970); /* add a few chars for CC */ - MDP_OUTP(MDP_BASE + 0xC0000, 0x1); /* MDP tv out enable */ - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - ret = panel_next_on(pdev); - - return ret; -} - -int mdp_dma3_off(struct platform_device *pdev) -{ - int ret = 0; - - ret = panel_next_off(pdev); - if (ret) - return ret; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - MDP_OUTP(MDP_BASE + 0xC0000, 0x0); - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - mdp_pipe_ctrl(MDP_DMA3_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - /* delay to make sure the last frame finishes */ - mdelay(100); - - return ret; -} - -void mdp_dma3_update(struct msm_fb_data_type *mfd) -{ - struct fb_info *fbi = mfd->fbi; - uint8 *buf; - int bpp; - unsigned long flag; - - if (!mfd->panel_power_on) - return; - - /* no need to power on cmd block since dma3 is running */ - bpp = fbi->var.bits_per_pixel / 8; - buf = (uint8 *) fbi->fix.smem_start; - buf += fbi->var.xoffset * bpp + - fbi->var.yoffset * fbi->fix.line_length; - MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3); - - spin_lock_irqsave(&mdp_spin_lock, flag); - mdp_enable_irq(MDP_DMA3_TERM); - INIT_COMPLETION(mfd->dma->comp); - mfd->dma->waiting = TRUE; - - outp32(MDP_INTR_CLEAR, TV_OUT_DMA3_START); - mdp_intr_mask |= TV_OUT_DMA3_START; - outp32(MDP_INTR_ENABLE, mdp_intr_mask); - spin_unlock_irqrestore(&mdp_spin_lock, flag); - - wait_for_completion_killable(&mfd->dma->comp); - mdp_disable_irq(MDP_DMA3_TERM); -} diff --git a/drivers/staging/msm/mdp_hw_init.c b/drivers/staging/msm/mdp_hw_init.c deleted file mode 100644 index 807362a..0000000 --- a/drivers/staging/msm/mdp_hw_init.c +++ /dev/null @@ -1,720 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "mdp.h" - -/* mdp primary csc limit vector */ -uint32 mdp_plv[] = { 0x10, 0xeb, 0x10, 0xf0 }; - -/* Color Coefficient matrix for YUV -> RGB */ -struct mdp_ccs mdp_ccs_yuv2rgb = { - MDP_CCS_YUV2RGB, - { - 0x254, - 0x000, - 0x331, - 0x254, - 0xff38, - 0xfe61, - 0x254, - 0x409, - 0x000, - }, - { -#ifdef CONFIG_FB_MSM_MDP31 - 0x1f0, - 0x180, - 0x180 -#else - 0x10, - 0x80, - 0x80 -#endif - } -}; - -/* Color Coefficient matrix for RGB -> YUV */ -struct mdp_ccs mdp_ccs_rgb2yuv = { - MDP_CCS_RGB2YUV, - { - 0x83, - 0x102, - 0x32, - 0xffb5, - 0xff6c, - 0xe1, - 0xe1, - 0xff45, - 0xffdc, - }, -#ifdef CONFIG_FB_MSM_MDP31 - { - 0x10, - 0x80, - 0x80 - } -#endif -}; - -static void mdp_load_lut_param(void) -{ - outpdw(MDP_BASE + 0x40800, 0x0); - outpdw(MDP_BASE + 0x40804, 0x151515); - outpdw(MDP_BASE + 0x40808, 0x1d1d1d); - outpdw(MDP_BASE + 0x4080c, 0x232323); - outpdw(MDP_BASE + 0x40810, 0x272727); - outpdw(MDP_BASE + 0x40814, 0x2b2b2b); - outpdw(MDP_BASE + 0x40818, 0x2f2f2f); - outpdw(MDP_BASE + 0x4081c, 0x333333); - outpdw(MDP_BASE + 0x40820, 0x363636); - outpdw(MDP_BASE + 0x40824, 0x393939); - outpdw(MDP_BASE + 0x40828, 0x3b3b3b); - outpdw(MDP_BASE + 0x4082c, 0x3e3e3e); - outpdw(MDP_BASE + 0x40830, 0x404040); - outpdw(MDP_BASE + 0x40834, 0x434343); - outpdw(MDP_BASE + 0x40838, 0x454545); - outpdw(MDP_BASE + 0x4083c, 0x474747); - outpdw(MDP_BASE + 0x40840, 0x494949); - outpdw(MDP_BASE + 0x40844, 0x4b4b4b); - outpdw(MDP_BASE + 0x40848, 0x4d4d4d); - outpdw(MDP_BASE + 0x4084c, 0x4f4f4f); - outpdw(MDP_BASE + 0x40850, 0x515151); - outpdw(MDP_BASE + 0x40854, 0x535353); - outpdw(MDP_BASE + 0x40858, 0x555555); - outpdw(MDP_BASE + 0x4085c, 0x565656); - outpdw(MDP_BASE + 0x40860, 0x585858); - outpdw(MDP_BASE + 0x40864, 0x5a5a5a); - outpdw(MDP_BASE + 0x40868, 0x5b5b5b); - outpdw(MDP_BASE + 0x4086c, 0x5d5d5d); - outpdw(MDP_BASE + 0x40870, 0x5e5e5e); - outpdw(MDP_BASE + 0x40874, 0x606060); - outpdw(MDP_BASE + 0x40878, 0x616161); - outpdw(MDP_BASE + 0x4087c, 0x636363); - outpdw(MDP_BASE + 0x40880, 0x646464); - outpdw(MDP_BASE + 0x40884, 0x666666); - outpdw(MDP_BASE + 0x40888, 0x676767); - outpdw(MDP_BASE + 0x4088c, 0x686868); - outpdw(MDP_BASE + 0x40890, 0x6a6a6a); - outpdw(MDP_BASE + 0x40894, 0x6b6b6b); - outpdw(MDP_BASE + 0x40898, 0x6c6c6c); - outpdw(MDP_BASE + 0x4089c, 0x6e6e6e); - outpdw(MDP_BASE + 0x408a0, 0x6f6f6f); - outpdw(MDP_BASE + 0x408a4, 0x707070); - outpdw(MDP_BASE + 0x408a8, 0x717171); - outpdw(MDP_BASE + 0x408ac, 0x727272); - outpdw(MDP_BASE + 0x408b0, 0x747474); - outpdw(MDP_BASE + 0x408b4, 0x757575); - outpdw(MDP_BASE + 0x408b8, 0x767676); - outpdw(MDP_BASE + 0x408bc, 0x777777); - outpdw(MDP_BASE + 0x408c0, 0x787878); - outpdw(MDP_BASE + 0x408c4, 0x797979); - outpdw(MDP_BASE + 0x408c8, 0x7a7a7a); - outpdw(MDP_BASE + 0x408cc, 0x7c7c7c); - outpdw(MDP_BASE + 0x408d0, 0x7d7d7d); - outpdw(MDP_BASE + 0x408d4, 0x7e7e7e); - outpdw(MDP_BASE + 0x408d8, 0x7f7f7f); - outpdw(MDP_BASE + 0x408dc, 0x808080); - outpdw(MDP_BASE + 0x408e0, 0x818181); - outpdw(MDP_BASE + 0x408e4, 0x828282); - outpdw(MDP_BASE + 0x408e8, 0x838383); - outpdw(MDP_BASE + 0x408ec, 0x848484); - outpdw(MDP_BASE + 0x408f0, 0x858585); - outpdw(MDP_BASE + 0x408f4, 0x868686); - outpdw(MDP_BASE + 0x408f8, 0x878787); - outpdw(MDP_BASE + 0x408fc, 0x888888); - outpdw(MDP_BASE + 0x40900, 0x898989); - outpdw(MDP_BASE + 0x40904, 0x8a8a8a); - outpdw(MDP_BASE + 0x40908, 0x8b8b8b); - outpdw(MDP_BASE + 0x4090c, 0x8c8c8c); - outpdw(MDP_BASE + 0x40910, 0x8d8d8d); - outpdw(MDP_BASE + 0x40914, 0x8e8e8e); - outpdw(MDP_BASE + 0x40918, 0x8f8f8f); - outpdw(MDP_BASE + 0x4091c, 0x8f8f8f); - outpdw(MDP_BASE + 0x40920, 0x909090); - outpdw(MDP_BASE + 0x40924, 0x919191); - outpdw(MDP_BASE + 0x40928, 0x929292); - outpdw(MDP_BASE + 0x4092c, 0x939393); - outpdw(MDP_BASE + 0x40930, 0x949494); - outpdw(MDP_BASE + 0x40934, 0x959595); - outpdw(MDP_BASE + 0x40938, 0x969696); - outpdw(MDP_BASE + 0x4093c, 0x969696); - outpdw(MDP_BASE + 0x40940, 0x979797); - outpdw(MDP_BASE + 0x40944, 0x989898); - outpdw(MDP_BASE + 0x40948, 0x999999); - outpdw(MDP_BASE + 0x4094c, 0x9a9a9a); - outpdw(MDP_BASE + 0x40950, 0x9b9b9b); - outpdw(MDP_BASE + 0x40954, 0x9c9c9c); - outpdw(MDP_BASE + 0x40958, 0x9c9c9c); - outpdw(MDP_BASE + 0x4095c, 0x9d9d9d); - outpdw(MDP_BASE + 0x40960, 0x9e9e9e); - outpdw(MDP_BASE + 0x40964, 0x9f9f9f); - outpdw(MDP_BASE + 0x40968, 0xa0a0a0); - outpdw(MDP_BASE + 0x4096c, 0xa0a0a0); - outpdw(MDP_BASE + 0x40970, 0xa1a1a1); - outpdw(MDP_BASE + 0x40974, 0xa2a2a2); - outpdw(MDP_BASE + 0x40978, 0xa3a3a3); - outpdw(MDP_BASE + 0x4097c, 0xa4a4a4); - outpdw(MDP_BASE + 0x40980, 0xa4a4a4); - outpdw(MDP_BASE + 0x40984, 0xa5a5a5); - outpdw(MDP_BASE + 0x40988, 0xa6a6a6); - outpdw(MDP_BASE + 0x4098c, 0xa7a7a7); - outpdw(MDP_BASE + 0x40990, 0xa7a7a7); - outpdw(MDP_BASE + 0x40994, 0xa8a8a8); - outpdw(MDP_BASE + 0x40998, 0xa9a9a9); - outpdw(MDP_BASE + 0x4099c, 0xaaaaaa); - outpdw(MDP_BASE + 0x409a0, 0xaaaaaa); - outpdw(MDP_BASE + 0x409a4, 0xababab); - outpdw(MDP_BASE + 0x409a8, 0xacacac); - outpdw(MDP_BASE + 0x409ac, 0xadadad); - outpdw(MDP_BASE + 0x409b0, 0xadadad); - outpdw(MDP_BASE + 0x409b4, 0xaeaeae); - outpdw(MDP_BASE + 0x409b8, 0xafafaf); - outpdw(MDP_BASE + 0x409bc, 0xafafaf); - outpdw(MDP_BASE + 0x409c0, 0xb0b0b0); - outpdw(MDP_BASE + 0x409c4, 0xb1b1b1); - outpdw(MDP_BASE + 0x409c8, 0xb2b2b2); - outpdw(MDP_BASE + 0x409cc, 0xb2b2b2); - outpdw(MDP_BASE + 0x409d0, 0xb3b3b3); - outpdw(MDP_BASE + 0x409d4, 0xb4b4b4); - outpdw(MDP_BASE + 0x409d8, 0xb4b4b4); - outpdw(MDP_BASE + 0x409dc, 0xb5b5b5); - outpdw(MDP_BASE + 0x409e0, 0xb6b6b6); - outpdw(MDP_BASE + 0x409e4, 0xb6b6b6); - outpdw(MDP_BASE + 0x409e8, 0xb7b7b7); - outpdw(MDP_BASE + 0x409ec, 0xb8b8b8); - outpdw(MDP_BASE + 0x409f0, 0xb8b8b8); - outpdw(MDP_BASE + 0x409f4, 0xb9b9b9); - outpdw(MDP_BASE + 0x409f8, 0xbababa); - outpdw(MDP_BASE + 0x409fc, 0xbababa); - outpdw(MDP_BASE + 0x40a00, 0xbbbbbb); - outpdw(MDP_BASE + 0x40a04, 0xbcbcbc); - outpdw(MDP_BASE + 0x40a08, 0xbcbcbc); - outpdw(MDP_BASE + 0x40a0c, 0xbdbdbd); - outpdw(MDP_BASE + 0x40a10, 0xbebebe); - outpdw(MDP_BASE + 0x40a14, 0xbebebe); - outpdw(MDP_BASE + 0x40a18, 0xbfbfbf); - outpdw(MDP_BASE + 0x40a1c, 0xc0c0c0); - outpdw(MDP_BASE + 0x40a20, 0xc0c0c0); - outpdw(MDP_BASE + 0x40a24, 0xc1c1c1); - outpdw(MDP_BASE + 0x40a28, 0xc1c1c1); - outpdw(MDP_BASE + 0x40a2c, 0xc2c2c2); - outpdw(MDP_BASE + 0x40a30, 0xc3c3c3); - outpdw(MDP_BASE + 0x40a34, 0xc3c3c3); - outpdw(MDP_BASE + 0x40a38, 0xc4c4c4); - outpdw(MDP_BASE + 0x40a3c, 0xc5c5c5); - outpdw(MDP_BASE + 0x40a40, 0xc5c5c5); - outpdw(MDP_BASE + 0x40a44, 0xc6c6c6); - outpdw(MDP_BASE + 0x40a48, 0xc6c6c6); - outpdw(MDP_BASE + 0x40a4c, 0xc7c7c7); - outpdw(MDP_BASE + 0x40a50, 0xc8c8c8); - outpdw(MDP_BASE + 0x40a54, 0xc8c8c8); - outpdw(MDP_BASE + 0x40a58, 0xc9c9c9); - outpdw(MDP_BASE + 0x40a5c, 0xc9c9c9); - outpdw(MDP_BASE + 0x40a60, 0xcacaca); - outpdw(MDP_BASE + 0x40a64, 0xcbcbcb); - outpdw(MDP_BASE + 0x40a68, 0xcbcbcb); - outpdw(MDP_BASE + 0x40a6c, 0xcccccc); - outpdw(MDP_BASE + 0x40a70, 0xcccccc); - outpdw(MDP_BASE + 0x40a74, 0xcdcdcd); - outpdw(MDP_BASE + 0x40a78, 0xcecece); - outpdw(MDP_BASE + 0x40a7c, 0xcecece); - outpdw(MDP_BASE + 0x40a80, 0xcfcfcf); - outpdw(MDP_BASE + 0x40a84, 0xcfcfcf); - outpdw(MDP_BASE + 0x40a88, 0xd0d0d0); - outpdw(MDP_BASE + 0x40a8c, 0xd0d0d0); - outpdw(MDP_BASE + 0x40a90, 0xd1d1d1); - outpdw(MDP_BASE + 0x40a94, 0xd2d2d2); - outpdw(MDP_BASE + 0x40a98, 0xd2d2d2); - outpdw(MDP_BASE + 0x40a9c, 0xd3d3d3); - outpdw(MDP_BASE + 0x40aa0, 0xd3d3d3); - outpdw(MDP_BASE + 0x40aa4, 0xd4d4d4); - outpdw(MDP_BASE + 0x40aa8, 0xd4d4d4); - outpdw(MDP_BASE + 0x40aac, 0xd5d5d5); - outpdw(MDP_BASE + 0x40ab0, 0xd6d6d6); - outpdw(MDP_BASE + 0x40ab4, 0xd6d6d6); - outpdw(MDP_BASE + 0x40ab8, 0xd7d7d7); - outpdw(MDP_BASE + 0x40abc, 0xd7d7d7); - outpdw(MDP_BASE + 0x40ac0, 0xd8d8d8); - outpdw(MDP_BASE + 0x40ac4, 0xd8d8d8); - outpdw(MDP_BASE + 0x40ac8, 0xd9d9d9); - outpdw(MDP_BASE + 0x40acc, 0xd9d9d9); - outpdw(MDP_BASE + 0x40ad0, 0xdadada); - outpdw(MDP_BASE + 0x40ad4, 0xdbdbdb); - outpdw(MDP_BASE + 0x40ad8, 0xdbdbdb); - outpdw(MDP_BASE + 0x40adc, 0xdcdcdc); - outpdw(MDP_BASE + 0x40ae0, 0xdcdcdc); - outpdw(MDP_BASE + 0x40ae4, 0xdddddd); - outpdw(MDP_BASE + 0x40ae8, 0xdddddd); - outpdw(MDP_BASE + 0x40aec, 0xdedede); - outpdw(MDP_BASE + 0x40af0, 0xdedede); - outpdw(MDP_BASE + 0x40af4, 0xdfdfdf); - outpdw(MDP_BASE + 0x40af8, 0xdfdfdf); - outpdw(MDP_BASE + 0x40afc, 0xe0e0e0); - outpdw(MDP_BASE + 0x40b00, 0xe0e0e0); - outpdw(MDP_BASE + 0x40b04, 0xe1e1e1); - outpdw(MDP_BASE + 0x40b08, 0xe1e1e1); - outpdw(MDP_BASE + 0x40b0c, 0xe2e2e2); - outpdw(MDP_BASE + 0x40b10, 0xe3e3e3); - outpdw(MDP_BASE + 0x40b14, 0xe3e3e3); - outpdw(MDP_BASE + 0x40b18, 0xe4e4e4); - outpdw(MDP_BASE + 0x40b1c, 0xe4e4e4); - outpdw(MDP_BASE + 0x40b20, 0xe5e5e5); - outpdw(MDP_BASE + 0x40b24, 0xe5e5e5); - outpdw(MDP_BASE + 0x40b28, 0xe6e6e6); - outpdw(MDP_BASE + 0x40b2c, 0xe6e6e6); - outpdw(MDP_BASE + 0x40b30, 0xe7e7e7); - outpdw(MDP_BASE + 0x40b34, 0xe7e7e7); - outpdw(MDP_BASE + 0x40b38, 0xe8e8e8); - outpdw(MDP_BASE + 0x40b3c, 0xe8e8e8); - outpdw(MDP_BASE + 0x40b40, 0xe9e9e9); - outpdw(MDP_BASE + 0x40b44, 0xe9e9e9); - outpdw(MDP_BASE + 0x40b48, 0xeaeaea); - outpdw(MDP_BASE + 0x40b4c, 0xeaeaea); - outpdw(MDP_BASE + 0x40b50, 0xebebeb); - outpdw(MDP_BASE + 0x40b54, 0xebebeb); - outpdw(MDP_BASE + 0x40b58, 0xececec); - outpdw(MDP_BASE + 0x40b5c, 0xececec); - outpdw(MDP_BASE + 0x40b60, 0xededed); - outpdw(MDP_BASE + 0x40b64, 0xededed); - outpdw(MDP_BASE + 0x40b68, 0xeeeeee); - outpdw(MDP_BASE + 0x40b6c, 0xeeeeee); - outpdw(MDP_BASE + 0x40b70, 0xefefef); - outpdw(MDP_BASE + 0x40b74, 0xefefef); - outpdw(MDP_BASE + 0x40b78, 0xf0f0f0); - outpdw(MDP_BASE + 0x40b7c, 0xf0f0f0); - outpdw(MDP_BASE + 0x40b80, 0xf1f1f1); - outpdw(MDP_BASE + 0x40b84, 0xf1f1f1); - outpdw(MDP_BASE + 0x40b88, 0xf2f2f2); - outpdw(MDP_BASE + 0x40b8c, 0xf2f2f2); - outpdw(MDP_BASE + 0x40b90, 0xf2f2f2); - outpdw(MDP_BASE + 0x40b94, 0xf3f3f3); - outpdw(MDP_BASE + 0x40b98, 0xf3f3f3); - outpdw(MDP_BASE + 0x40b9c, 0xf4f4f4); - outpdw(MDP_BASE + 0x40ba0, 0xf4f4f4); - outpdw(MDP_BASE + 0x40ba4, 0xf5f5f5); - outpdw(MDP_BASE + 0x40ba8, 0xf5f5f5); - outpdw(MDP_BASE + 0x40bac, 0xf6f6f6); - outpdw(MDP_BASE + 0x40bb0, 0xf6f6f6); - outpdw(MDP_BASE + 0x40bb4, 0xf7f7f7); - outpdw(MDP_BASE + 0x40bb8, 0xf7f7f7); - outpdw(MDP_BASE + 0x40bbc, 0xf8f8f8); - outpdw(MDP_BASE + 0x40bc0, 0xf8f8f8); - outpdw(MDP_BASE + 0x40bc4, 0xf9f9f9); - outpdw(MDP_BASE + 0x40bc8, 0xf9f9f9); - outpdw(MDP_BASE + 0x40bcc, 0xfafafa); - outpdw(MDP_BASE + 0x40bd0, 0xfafafa); - outpdw(MDP_BASE + 0x40bd4, 0xfafafa); - outpdw(MDP_BASE + 0x40bd8, 0xfbfbfb); - outpdw(MDP_BASE + 0x40bdc, 0xfbfbfb); - outpdw(MDP_BASE + 0x40be0, 0xfcfcfc); - outpdw(MDP_BASE + 0x40be4, 0xfcfcfc); - outpdw(MDP_BASE + 0x40be8, 0xfdfdfd); - outpdw(MDP_BASE + 0x40bec, 0xfdfdfd); - outpdw(MDP_BASE + 0x40bf0, 0xfefefe); - outpdw(MDP_BASE + 0x40bf4, 0xfefefe); - outpdw(MDP_BASE + 0x40bf8, 0xffffff); - outpdw(MDP_BASE + 0x40bfc, 0xffffff); - outpdw(MDP_BASE + 0x40c00, 0x0); - outpdw(MDP_BASE + 0x40c04, 0x0); - outpdw(MDP_BASE + 0x40c08, 0x0); - outpdw(MDP_BASE + 0x40c0c, 0x0); - outpdw(MDP_BASE + 0x40c10, 0x0); - outpdw(MDP_BASE + 0x40c14, 0x0); - outpdw(MDP_BASE + 0x40c18, 0x0); - outpdw(MDP_BASE + 0x40c1c, 0x0); - outpdw(MDP_BASE + 0x40c20, 0x0); - outpdw(MDP_BASE + 0x40c24, 0x0); - outpdw(MDP_BASE + 0x40c28, 0x0); - outpdw(MDP_BASE + 0x40c2c, 0x0); - outpdw(MDP_BASE + 0x40c30, 0x0); - outpdw(MDP_BASE + 0x40c34, 0x0); - outpdw(MDP_BASE + 0x40c38, 0x0); - outpdw(MDP_BASE + 0x40c3c, 0x0); - outpdw(MDP_BASE + 0x40c40, 0x10101); - outpdw(MDP_BASE + 0x40c44, 0x10101); - outpdw(MDP_BASE + 0x40c48, 0x10101); - outpdw(MDP_BASE + 0x40c4c, 0x10101); - outpdw(MDP_BASE + 0x40c50, 0x10101); - outpdw(MDP_BASE + 0x40c54, 0x10101); - outpdw(MDP_BASE + 0x40c58, 0x10101); - outpdw(MDP_BASE + 0x40c5c, 0x10101); - outpdw(MDP_BASE + 0x40c60, 0x10101); - outpdw(MDP_BASE + 0x40c64, 0x10101); - outpdw(MDP_BASE + 0x40c68, 0x20202); - outpdw(MDP_BASE + 0x40c6c, 0x20202); - outpdw(MDP_BASE + 0x40c70, 0x20202); - outpdw(MDP_BASE + 0x40c74, 0x20202); - outpdw(MDP_BASE + 0x40c78, 0x20202); - outpdw(MDP_BASE + 0x40c7c, 0x20202); - outpdw(MDP_BASE + 0x40c80, 0x30303); - outpdw(MDP_BASE + 0x40c84, 0x30303); - outpdw(MDP_BASE + 0x40c88, 0x30303); - outpdw(MDP_BASE + 0x40c8c, 0x30303); - outpdw(MDP_BASE + 0x40c90, 0x30303); - outpdw(MDP_BASE + 0x40c94, 0x40404); - outpdw(MDP_BASE + 0x40c98, 0x40404); - outpdw(MDP_BASE + 0x40c9c, 0x40404); - outpdw(MDP_BASE + 0x40ca0, 0x40404); - outpdw(MDP_BASE + 0x40ca4, 0x40404); - outpdw(MDP_BASE + 0x40ca8, 0x50505); - outpdw(MDP_BASE + 0x40cac, 0x50505); - outpdw(MDP_BASE + 0x40cb0, 0x50505); - outpdw(MDP_BASE + 0x40cb4, 0x50505); - outpdw(MDP_BASE + 0x40cb8, 0x60606); - outpdw(MDP_BASE + 0x40cbc, 0x60606); - outpdw(MDP_BASE + 0x40cc0, 0x60606); - outpdw(MDP_BASE + 0x40cc4, 0x70707); - outpdw(MDP_BASE + 0x40cc8, 0x70707); - outpdw(MDP_BASE + 0x40ccc, 0x70707); - outpdw(MDP_BASE + 0x40cd0, 0x70707); - outpdw(MDP_BASE + 0x40cd4, 0x80808); - outpdw(MDP_BASE + 0x40cd8, 0x80808); - outpdw(MDP_BASE + 0x40cdc, 0x80808); - outpdw(MDP_BASE + 0x40ce0, 0x90909); - outpdw(MDP_BASE + 0x40ce4, 0x90909); - outpdw(MDP_BASE + 0x40ce8, 0xa0a0a); - outpdw(MDP_BASE + 0x40cec, 0xa0a0a); - outpdw(MDP_BASE + 0x40cf0, 0xa0a0a); - outpdw(MDP_BASE + 0x40cf4, 0xb0b0b); - outpdw(MDP_BASE + 0x40cf8, 0xb0b0b); - outpdw(MDP_BASE + 0x40cfc, 0xb0b0b); - outpdw(MDP_BASE + 0x40d00, 0xc0c0c); - outpdw(MDP_BASE + 0x40d04, 0xc0c0c); - outpdw(MDP_BASE + 0x40d08, 0xd0d0d); - outpdw(MDP_BASE + 0x40d0c, 0xd0d0d); - outpdw(MDP_BASE + 0x40d10, 0xe0e0e); - outpdw(MDP_BASE + 0x40d14, 0xe0e0e); - outpdw(MDP_BASE + 0x40d18, 0xe0e0e); - outpdw(MDP_BASE + 0x40d1c, 0xf0f0f); - outpdw(MDP_BASE + 0x40d20, 0xf0f0f); - outpdw(MDP_BASE + 0x40d24, 0x101010); - outpdw(MDP_BASE + 0x40d28, 0x101010); - outpdw(MDP_BASE + 0x40d2c, 0x111111); - outpdw(MDP_BASE + 0x40d30, 0x111111); - outpdw(MDP_BASE + 0x40d34, 0x121212); - outpdw(MDP_BASE + 0x40d38, 0x121212); - outpdw(MDP_BASE + 0x40d3c, 0x131313); - outpdw(MDP_BASE + 0x40d40, 0x131313); - outpdw(MDP_BASE + 0x40d44, 0x141414); - outpdw(MDP_BASE + 0x40d48, 0x151515); - outpdw(MDP_BASE + 0x40d4c, 0x151515); - outpdw(MDP_BASE + 0x40d50, 0x161616); - outpdw(MDP_BASE + 0x40d54, 0x161616); - outpdw(MDP_BASE + 0x40d58, 0x171717); - outpdw(MDP_BASE + 0x40d5c, 0x171717); - outpdw(MDP_BASE + 0x40d60, 0x181818); - outpdw(MDP_BASE + 0x40d64, 0x191919); - outpdw(MDP_BASE + 0x40d68, 0x191919); - outpdw(MDP_BASE + 0x40d6c, 0x1a1a1a); - outpdw(MDP_BASE + 0x40d70, 0x1b1b1b); - outpdw(MDP_BASE + 0x40d74, 0x1b1b1b); - outpdw(MDP_BASE + 0x40d78, 0x1c1c1c); - outpdw(MDP_BASE + 0x40d7c, 0x1c1c1c); - outpdw(MDP_BASE + 0x40d80, 0x1d1d1d); - outpdw(MDP_BASE + 0x40d84, 0x1e1e1e); - outpdw(MDP_BASE + 0x40d88, 0x1f1f1f); - outpdw(MDP_BASE + 0x40d8c, 0x1f1f1f); - outpdw(MDP_BASE + 0x40d90, 0x202020); - outpdw(MDP_BASE + 0x40d94, 0x212121); - outpdw(MDP_BASE + 0x40d98, 0x212121); - outpdw(MDP_BASE + 0x40d9c, 0x222222); - outpdw(MDP_BASE + 0x40da0, 0x232323); - outpdw(MDP_BASE + 0x40da4, 0x242424); - outpdw(MDP_BASE + 0x40da8, 0x242424); - outpdw(MDP_BASE + 0x40dac, 0x252525); - outpdw(MDP_BASE + 0x40db0, 0x262626); - outpdw(MDP_BASE + 0x40db4, 0x272727); - outpdw(MDP_BASE + 0x40db8, 0x272727); - outpdw(MDP_BASE + 0x40dbc, 0x282828); - outpdw(MDP_BASE + 0x40dc0, 0x292929); - outpdw(MDP_BASE + 0x40dc4, 0x2a2a2a); - outpdw(MDP_BASE + 0x40dc8, 0x2b2b2b); - outpdw(MDP_BASE + 0x40dcc, 0x2c2c2c); - outpdw(MDP_BASE + 0x40dd0, 0x2c2c2c); - outpdw(MDP_BASE + 0x40dd4, 0x2d2d2d); - outpdw(MDP_BASE + 0x40dd8, 0x2e2e2e); - outpdw(MDP_BASE + 0x40ddc, 0x2f2f2f); - outpdw(MDP_BASE + 0x40de0, 0x303030); - outpdw(MDP_BASE + 0x40de4, 0x313131); - outpdw(MDP_BASE + 0x40de8, 0x323232); - outpdw(MDP_BASE + 0x40dec, 0x333333); - outpdw(MDP_BASE + 0x40df0, 0x333333); - outpdw(MDP_BASE + 0x40df4, 0x343434); - outpdw(MDP_BASE + 0x40df8, 0x353535); - outpdw(MDP_BASE + 0x40dfc, 0x363636); - outpdw(MDP_BASE + 0x40e00, 0x373737); - outpdw(MDP_BASE + 0x40e04, 0x383838); - outpdw(MDP_BASE + 0x40e08, 0x393939); - outpdw(MDP_BASE + 0x40e0c, 0x3a3a3a); - outpdw(MDP_BASE + 0x40e10, 0x3b3b3b); - outpdw(MDP_BASE + 0x40e14, 0x3c3c3c); - outpdw(MDP_BASE + 0x40e18, 0x3d3d3d); - outpdw(MDP_BASE + 0x40e1c, 0x3e3e3e); - outpdw(MDP_BASE + 0x40e20, 0x3f3f3f); - outpdw(MDP_BASE + 0x40e24, 0x404040); - outpdw(MDP_BASE + 0x40e28, 0x414141); - outpdw(MDP_BASE + 0x40e2c, 0x424242); - outpdw(MDP_BASE + 0x40e30, 0x434343); - outpdw(MDP_BASE + 0x40e34, 0x444444); - outpdw(MDP_BASE + 0x40e38, 0x464646); - outpdw(MDP_BASE + 0x40e3c, 0x474747); - outpdw(MDP_BASE + 0x40e40, 0x484848); - outpdw(MDP_BASE + 0x40e44, 0x494949); - outpdw(MDP_BASE + 0x40e48, 0x4a4a4a); - outpdw(MDP_BASE + 0x40e4c, 0x4b4b4b); - outpdw(MDP_BASE + 0x40e50, 0x4c4c4c); - outpdw(MDP_BASE + 0x40e54, 0x4d4d4d); - outpdw(MDP_BASE + 0x40e58, 0x4f4f4f); - outpdw(MDP_BASE + 0x40e5c, 0x505050); - outpdw(MDP_BASE + 0x40e60, 0x515151); - outpdw(MDP_BASE + 0x40e64, 0x525252); - outpdw(MDP_BASE + 0x40e68, 0x535353); - outpdw(MDP_BASE + 0x40e6c, 0x545454); - outpdw(MDP_BASE + 0x40e70, 0x565656); - outpdw(MDP_BASE + 0x40e74, 0x575757); - outpdw(MDP_BASE + 0x40e78, 0x585858); - outpdw(MDP_BASE + 0x40e7c, 0x595959); - outpdw(MDP_BASE + 0x40e80, 0x5b5b5b); - outpdw(MDP_BASE + 0x40e84, 0x5c5c5c); - outpdw(MDP_BASE + 0x40e88, 0x5d5d5d); - outpdw(MDP_BASE + 0x40e8c, 0x5e5e5e); - outpdw(MDP_BASE + 0x40e90, 0x606060); - outpdw(MDP_BASE + 0x40e94, 0x616161); - outpdw(MDP_BASE + 0x40e98, 0x626262); - outpdw(MDP_BASE + 0x40e9c, 0x646464); - outpdw(MDP_BASE + 0x40ea0, 0x656565); - outpdw(MDP_BASE + 0x40ea4, 0x666666); - outpdw(MDP_BASE + 0x40ea8, 0x686868); - outpdw(MDP_BASE + 0x40eac, 0x696969); - outpdw(MDP_BASE + 0x40eb0, 0x6a6a6a); - outpdw(MDP_BASE + 0x40eb4, 0x6c6c6c); - outpdw(MDP_BASE + 0x40eb8, 0x6d6d6d); - outpdw(MDP_BASE + 0x40ebc, 0x6f6f6f); - outpdw(MDP_BASE + 0x40ec0, 0x707070); - outpdw(MDP_BASE + 0x40ec4, 0x717171); - outpdw(MDP_BASE + 0x40ec8, 0x737373); - outpdw(MDP_BASE + 0x40ecc, 0x747474); - outpdw(MDP_BASE + 0x40ed0, 0x767676); - outpdw(MDP_BASE + 0x40ed4, 0x777777); - outpdw(MDP_BASE + 0x40ed8, 0x797979); - outpdw(MDP_BASE + 0x40edc, 0x7a7a7a); - outpdw(MDP_BASE + 0x40ee0, 0x7c7c7c); - outpdw(MDP_BASE + 0x40ee4, 0x7d7d7d); - outpdw(MDP_BASE + 0x40ee8, 0x7f7f7f); - outpdw(MDP_BASE + 0x40eec, 0x808080); - outpdw(MDP_BASE + 0x40ef0, 0x828282); - outpdw(MDP_BASE + 0x40ef4, 0x838383); - outpdw(MDP_BASE + 0x40ef8, 0x858585); - outpdw(MDP_BASE + 0x40efc, 0x868686); - outpdw(MDP_BASE + 0x40f00, 0x888888); - outpdw(MDP_BASE + 0x40f04, 0x898989); - outpdw(MDP_BASE + 0x40f08, 0x8b8b8b); - outpdw(MDP_BASE + 0x40f0c, 0x8d8d8d); - outpdw(MDP_BASE + 0x40f10, 0x8e8e8e); - outpdw(MDP_BASE + 0x40f14, 0x909090); - outpdw(MDP_BASE + 0x40f18, 0x919191); - outpdw(MDP_BASE + 0x40f1c, 0x939393); - outpdw(MDP_BASE + 0x40f20, 0x959595); - outpdw(MDP_BASE + 0x40f24, 0x969696); - outpdw(MDP_BASE + 0x40f28, 0x989898); - outpdw(MDP_BASE + 0x40f2c, 0x9a9a9a); - outpdw(MDP_BASE + 0x40f30, 0x9b9b9b); - outpdw(MDP_BASE + 0x40f34, 0x9d9d9d); - outpdw(MDP_BASE + 0x40f38, 0x9f9f9f); - outpdw(MDP_BASE + 0x40f3c, 0xa1a1a1); - outpdw(MDP_BASE + 0x40f40, 0xa2a2a2); - outpdw(MDP_BASE + 0x40f44, 0xa4a4a4); - outpdw(MDP_BASE + 0x40f48, 0xa6a6a6); - outpdw(MDP_BASE + 0x40f4c, 0xa7a7a7); - outpdw(MDP_BASE + 0x40f50, 0xa9a9a9); - outpdw(MDP_BASE + 0x40f54, 0xababab); - outpdw(MDP_BASE + 0x40f58, 0xadadad); - outpdw(MDP_BASE + 0x40f5c, 0xafafaf); - outpdw(MDP_BASE + 0x40f60, 0xb0b0b0); - outpdw(MDP_BASE + 0x40f64, 0xb2b2b2); - outpdw(MDP_BASE + 0x40f68, 0xb4b4b4); - outpdw(MDP_BASE + 0x40f6c, 0xb6b6b6); - outpdw(MDP_BASE + 0x40f70, 0xb8b8b8); - outpdw(MDP_BASE + 0x40f74, 0xbababa); - outpdw(MDP_BASE + 0x40f78, 0xbbbbbb); - outpdw(MDP_BASE + 0x40f7c, 0xbdbdbd); - outpdw(MDP_BASE + 0x40f80, 0xbfbfbf); - outpdw(MDP_BASE + 0x40f84, 0xc1c1c1); - outpdw(MDP_BASE + 0x40f88, 0xc3c3c3); - outpdw(MDP_BASE + 0x40f8c, 0xc5c5c5); - outpdw(MDP_BASE + 0x40f90, 0xc7c7c7); - outpdw(MDP_BASE + 0x40f94, 0xc9c9c9); - outpdw(MDP_BASE + 0x40f98, 0xcbcbcb); - outpdw(MDP_BASE + 0x40f9c, 0xcdcdcd); - outpdw(MDP_BASE + 0x40fa0, 0xcfcfcf); - outpdw(MDP_BASE + 0x40fa4, 0xd1d1d1); - outpdw(MDP_BASE + 0x40fa8, 0xd3d3d3); - outpdw(MDP_BASE + 0x40fac, 0xd5d5d5); - outpdw(MDP_BASE + 0x40fb0, 0xd7d7d7); - outpdw(MDP_BASE + 0x40fb4, 0xd9d9d9); - outpdw(MDP_BASE + 0x40fb8, 0xdbdbdb); - outpdw(MDP_BASE + 0x40fbc, 0xdddddd); - outpdw(MDP_BASE + 0x40fc0, 0xdfdfdf); - outpdw(MDP_BASE + 0x40fc4, 0xe1e1e1); - outpdw(MDP_BASE + 0x40fc8, 0xe3e3e3); - outpdw(MDP_BASE + 0x40fcc, 0xe5e5e5); - outpdw(MDP_BASE + 0x40fd0, 0xe7e7e7); - outpdw(MDP_BASE + 0x40fd4, 0xe9e9e9); - outpdw(MDP_BASE + 0x40fd8, 0xebebeb); - outpdw(MDP_BASE + 0x40fdc, 0xeeeeee); - outpdw(MDP_BASE + 0x40fe0, 0xf0f0f0); - outpdw(MDP_BASE + 0x40fe4, 0xf2f2f2); - outpdw(MDP_BASE + 0x40fe8, 0xf4f4f4); - outpdw(MDP_BASE + 0x40fec, 0xf6f6f6); - outpdw(MDP_BASE + 0x40ff0, 0xf8f8f8); - outpdw(MDP_BASE + 0x40ff4, 0xfbfbfb); - outpdw(MDP_BASE + 0x40ff8, 0xfdfdfd); - outpdw(MDP_BASE + 0x40ffc, 0xffffff); -} - -#define IRQ_EN_1__MDP_IRQ___M 0x00000800 - -void mdp_hw_init(void) -{ - int i; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - /* debug interface write access */ - outpdw(MDP_BASE + 0x60, 1); - - outp32(MDP_INTR_ENABLE, MDP_ANY_INTR_MASK); - outp32(MDP_EBI2_PORTMAP_MODE, 0x3); - outpdw(MDP_CMD_DEBUG_ACCESS_BASE + 0x01f8, 0x0); - outpdw(MDP_CMD_DEBUG_ACCESS_BASE + 0x01fc, 0x0); - outpdw(MDP_BASE + 0x60, 0x1); - mdp_load_lut_param(); - - /* - * clear up unused fg/main registers - */ - /* comp.plane 2&3 ystride */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0120, 0x0); - /* unpacked pattern */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x012c, 0x0); - /* unpacked pattern */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0130, 0x0); - /* unpacked pattern */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0134, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0158, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x15c, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0160, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0170, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0174, 0x0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x017c, 0x0); - - /* comp.plane 2 */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0114, 0x0); - /* comp.plane 3 */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0118, 0x0); - - /* clear up unused bg registers */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01c8, 0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01d0, 0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01dc, 0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01e0, 0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01e4, 0); - -#ifndef CONFIG_FB_MSM_MDP22 - MDP_OUTP(MDP_BASE + 0xE0000, 0); - MDP_OUTP(MDP_BASE + 0x100, 0xffffffff); - MDP_OUTP(MDP_BASE + 0x90070, 0); - MDP_OUTP(MDP_BASE + 0x94010, 1); - MDP_OUTP(MDP_BASE + 0x9401c, 2); -#endif - - /* - * limit vector - * pre gets applied before color matrix conversion - * post is after ccs - */ - writel(mdp_plv[0], MDP_CSC_PRE_LV1n(0)); - writel(mdp_plv[1], MDP_CSC_PRE_LV1n(1)); - writel(mdp_plv[2], MDP_CSC_PRE_LV1n(2)); - writel(mdp_plv[3], MDP_CSC_PRE_LV1n(3)); - -#ifdef CONFIG_FB_MSM_MDP31 - writel(mdp_plv[2], MDP_CSC_PRE_LV1n(4)); - writel(mdp_plv[3], MDP_CSC_PRE_LV1n(5)); - - writel(0, MDP_CSC_POST_LV1n(0)); - writel(0xff, MDP_CSC_POST_LV1n(1)); - writel(0, MDP_CSC_POST_LV1n(2)); - writel(0xff, MDP_CSC_POST_LV1n(3)); - writel(0, MDP_CSC_POST_LV1n(4)); - writel(0xff, MDP_CSC_POST_LV1n(5)); - - writel(0, MDP_CSC_PRE_LV2n(0)); - writel(0xff, MDP_CSC_PRE_LV2n(1)); - writel(0, MDP_CSC_PRE_LV2n(2)); - writel(0xff, MDP_CSC_PRE_LV2n(3)); - writel(0, MDP_CSC_PRE_LV2n(4)); - writel(0xff, MDP_CSC_PRE_LV2n(5)); - - writel(mdp_plv[0], MDP_CSC_POST_LV2n(0)); - writel(mdp_plv[1], MDP_CSC_POST_LV2n(1)); - writel(mdp_plv[2], MDP_CSC_POST_LV2n(2)); - writel(mdp_plv[3], MDP_CSC_POST_LV2n(3)); - writel(mdp_plv[2], MDP_CSC_POST_LV2n(4)); - writel(mdp_plv[3], MDP_CSC_POST_LV2n(5)); -#endif - - /* primary forward matrix */ - for (i = 0; i < MDP_CCS_SIZE; i++) - writel(mdp_ccs_rgb2yuv.ccs[i], MDP_CSC_PFMVn(i)); - -#ifdef CONFIG_FB_MSM_MDP31 - for (i = 0; i < MDP_BV_SIZE; i++) - writel(mdp_ccs_rgb2yuv.bv[i], MDP_CSC_POST_BV2n(i)); - - writel(0, MDP_CSC_PRE_BV2n(0)); - writel(0, MDP_CSC_PRE_BV2n(1)); - writel(0, MDP_CSC_PRE_BV2n(2)); -#endif - /* primary reverse matrix */ - for (i = 0; i < MDP_CCS_SIZE; i++) - writel(mdp_ccs_yuv2rgb.ccs[i], MDP_CSC_PRMVn(i)); - - for (i = 0; i < MDP_BV_SIZE; i++) - writel(mdp_ccs_yuv2rgb.bv[i], MDP_CSC_PRE_BV1n(i)); - -#ifdef CONFIG_FB_MSM_MDP31 - writel(0, MDP_CSC_POST_BV1n(0)); - writel(0, MDP_CSC_POST_BV1n(1)); - writel(0, MDP_CSC_POST_BV1n(2)); - - outpdw(MDP_BASE + 0x30010, 0x03e0); - outpdw(MDP_BASE + 0x30014, 0x0360); - outpdw(MDP_BASE + 0x30018, 0x0120); - outpdw(MDP_BASE + 0x3001c, 0x0140); -#endif - mdp_init_scale_table(); - -#ifndef CONFIG_FB_MSM_MDP31 - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0104, - ((16 << 6) << 16) | (16) << 6); -#endif - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); -} \ No newline at end of file diff --git a/drivers/staging/msm/mdp_ppp.c b/drivers/staging/msm/mdp_ppp.c deleted file mode 100644 index 01b372f..0000000 --- a/drivers/staging/msm/mdp_ppp.c +++ /dev/null @@ -1,1502 +0,0 @@ -/* drivers/video/msm/src/drv/mdp/mdp_ppp.c - * - * Copyright (C) 2007 Google Incorporated - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" - -#define MDP_IS_IMGTYPE_BAD(x) (((x) >= MDP_IMGTYPE_LIMIT) && \ - (((x) < MDP_IMGTYPE2_START) || \ - ((x) >= MDP_IMGTYPE_LIMIT2))) - -static uint32_t bytes_per_pixel[] = { - [MDP_RGB_565] = 2, - [MDP_RGB_888] = 3, - [MDP_XRGB_8888] = 4, - [MDP_ARGB_8888] = 4, - [MDP_RGBA_8888] = 4, - [MDP_BGRA_8888] = 4, - [MDP_Y_CBCR_H2V1] = 1, - [MDP_Y_CBCR_H2V2] = 1, - [MDP_Y_CRCB_H2V1] = 1, - [MDP_Y_CRCB_H2V2] = 1, - [MDP_YCRYCB_H2V1] = 2, - [MDP_BGR_565] = 2 -}; - -extern uint32 mdp_plv[]; -extern struct semaphore mdp_ppp_mutex; - -uint32_t mdp_get_bytes_per_pixel(uint32_t format) -{ - uint32_t bpp = 0; - if (format < ARRAY_SIZE(bytes_per_pixel)) - bpp = bytes_per_pixel[format]; - - BUG_ON(!bpp); - return bpp; -} - -static uint32 mdp_conv_matx_rgb2yuv(uint32 input_pixel, - uint16 *matrix_and_bias_vector, - uint32 *clamp_vector, - uint32 *look_up_table) -{ - uint8 input_C2, input_C0, input_C1; - uint32 output; - int32 comp_C2, comp_C1, comp_C0, temp; - int32 temp1, temp2, temp3; - int32 matrix[9]; - int32 bias_vector[3]; - int32 Y_low_limit, Y_high_limit, C_low_limit, C_high_limit; - int32 i; - uint32 _is_lookup_table_enabled; - - input_C2 = (input_pixel >> 16) & 0xFF; - input_C1 = (input_pixel >> 8) & 0xFF; - input_C0 = (input_pixel >> 0) & 0xFF; - - comp_C0 = input_C0; - comp_C1 = input_C1; - comp_C2 = input_C2; - - for (i = 0; i < 9; i++) - matrix[i] = - ((int32) (((int32) matrix_and_bias_vector[i]) << 20)) >> 20; - - bias_vector[0] = (int32) (matrix_and_bias_vector[9] & 0xFF); - bias_vector[1] = (int32) (matrix_and_bias_vector[10] & 0xFF); - bias_vector[2] = (int32) (matrix_and_bias_vector[11] & 0xFF); - - Y_low_limit = (int32) clamp_vector[0]; - Y_high_limit = (int32) clamp_vector[1]; - C_low_limit = (int32) clamp_vector[2]; - C_high_limit = (int32) clamp_vector[3]; - - if (look_up_table == 0) /* check for NULL point */ - _is_lookup_table_enabled = 0; - else - _is_lookup_table_enabled = 1; - - if (_is_lookup_table_enabled == 1) { - comp_C2 = (look_up_table[comp_C2] >> 16) & 0xFF; - comp_C1 = (look_up_table[comp_C1] >> 8) & 0xFF; - comp_C0 = (look_up_table[comp_C0] >> 0) & 0xFF; - } - /* - * Color Conversion - * reorder input colors - */ - temp = comp_C2; - comp_C2 = comp_C1; - comp_C1 = comp_C0; - comp_C0 = temp; - - /* matrix multiplication */ - temp1 = comp_C0 * matrix[0] + comp_C1 * matrix[1] + comp_C2 * matrix[2]; - temp2 = comp_C0 * matrix[3] + comp_C1 * matrix[4] + comp_C2 * matrix[5]; - temp3 = comp_C0 * matrix[6] + comp_C1 * matrix[7] + comp_C2 * matrix[8]; - - comp_C0 = temp1 + 0x100; - comp_C1 = temp2 + 0x100; - comp_C2 = temp3 + 0x100; - - /* take interger part */ - comp_C0 >>= 9; - comp_C1 >>= 9; - comp_C2 >>= 9; - - /* post bias (+) */ - comp_C0 += bias_vector[0]; - comp_C1 += bias_vector[1]; - comp_C2 += bias_vector[2]; - - /* limit pixel to 8-bit */ - if (comp_C0 < 0) - comp_C0 = 0; - - if (comp_C0 > 255) - comp_C0 = 255; - - if (comp_C1 < 0) - comp_C1 = 0; - - if (comp_C1 > 255) - comp_C1 = 255; - - if (comp_C2 < 0) - comp_C2 = 0; - - if (comp_C2 > 255) - comp_C2 = 255; - - /* clamp */ - if (comp_C0 < Y_low_limit) - comp_C0 = Y_low_limit; - - if (comp_C0 > Y_high_limit) - comp_C0 = Y_high_limit; - - if (comp_C1 < C_low_limit) - comp_C1 = C_low_limit; - - if (comp_C1 > C_high_limit) - comp_C1 = C_high_limit; - - if (comp_C2 < C_low_limit) - comp_C2 = C_low_limit; - - if (comp_C2 > C_high_limit) - comp_C2 = C_high_limit; - - output = (comp_C2 << 16) | (comp_C1 << 8) | comp_C0; - return output; -} - -uint32 mdp_conv_matx_yuv2rgb(uint32 input_pixel, - uint16 *matrix_and_bias_vector, - uint32 *clamp_vector, uint32 *look_up_table) -{ - uint8 input_C2, input_C0, input_C1; - uint32 output; - int32 comp_C2, comp_C1, comp_C0, temp; - int32 temp1, temp2, temp3; - int32 matrix[9]; - int32 bias_vector[3]; - int32 Y_low_limit, Y_high_limit, C_low_limit, C_high_limit; - int32 i; - uint32 _is_lookup_table_enabled; - - input_C2 = (input_pixel >> 16) & 0xFF; - input_C1 = (input_pixel >> 8) & 0xFF; - input_C0 = (input_pixel >> 0) & 0xFF; - - comp_C0 = input_C0; - comp_C1 = input_C1; - comp_C2 = input_C2; - - for (i = 0; i < 9; i++) - matrix[i] = - ((int32) (((int32) matrix_and_bias_vector[i]) << 20)) >> 20; - - bias_vector[0] = (int32) (matrix_and_bias_vector[9] & 0xFF); - bias_vector[1] = (int32) (matrix_and_bias_vector[10] & 0xFF); - bias_vector[2] = (int32) (matrix_and_bias_vector[11] & 0xFF); - - Y_low_limit = (int32) clamp_vector[0]; - Y_high_limit = (int32) clamp_vector[1]; - C_low_limit = (int32) clamp_vector[2]; - C_high_limit = (int32) clamp_vector[3]; - - if (look_up_table == 0) /* check for NULL point */ - _is_lookup_table_enabled = 0; - else - _is_lookup_table_enabled = 1; - - /* clamp */ - if (comp_C0 < Y_low_limit) - comp_C0 = Y_low_limit; - - if (comp_C0 > Y_high_limit) - comp_C0 = Y_high_limit; - - if (comp_C1 < C_low_limit) - comp_C1 = C_low_limit; - - if (comp_C1 > C_high_limit) - comp_C1 = C_high_limit; - - if (comp_C2 < C_low_limit) - comp_C2 = C_low_limit; - - if (comp_C2 > C_high_limit) - comp_C2 = C_high_limit; - - /* - * Color Conversion - * pre bias (-) - */ - comp_C0 -= bias_vector[0]; - comp_C1 -= bias_vector[1]; - comp_C2 -= bias_vector[2]; - - /* matrix multiplication */ - temp1 = comp_C0 * matrix[0] + comp_C1 * matrix[1] + comp_C2 * matrix[2]; - temp2 = comp_C0 * matrix[3] + comp_C1 * matrix[4] + comp_C2 * matrix[5]; - temp3 = comp_C0 * matrix[6] + comp_C1 * matrix[7] + comp_C2 * matrix[8]; - - comp_C0 = temp1 + 0x100; - comp_C1 = temp2 + 0x100; - comp_C2 = temp3 + 0x100; - - /* take interger part */ - comp_C0 >>= 9; - comp_C1 >>= 9; - comp_C2 >>= 9; - - /* reorder output colors */ - temp = comp_C0; - comp_C0 = comp_C1; - comp_C1 = comp_C2; - comp_C2 = temp; - - /* limit pixel to 8-bit */ - if (comp_C0 < 0) - comp_C0 = 0; - - if (comp_C0 > 255) - comp_C0 = 255; - - if (comp_C1 < 0) - comp_C1 = 0; - - if (comp_C1 > 255) - comp_C1 = 255; - - if (comp_C2 < 0) - comp_C2 = 0; - - if (comp_C2 > 255) - comp_C2 = 255; - - /* Look-up table */ - if (_is_lookup_table_enabled == 1) { - comp_C2 = (look_up_table[comp_C2] >> 16) & 0xFF; - comp_C1 = (look_up_table[comp_C1] >> 8) & 0xFF; - comp_C0 = (look_up_table[comp_C0] >> 0) & 0xFF; - } - - output = (comp_C2 << 16) | (comp_C1 << 8) | comp_C0; - return output; -} - -static uint32 mdp_calc_tpval(MDPIMG *mdpImg) -{ - uint32 tpVal; - uint8 plane_tp; - - tpVal = 0; - if ((mdpImg->imgType == MDP_RGB_565) - || (mdpImg->imgType == MDP_BGR_565)) { - /* - * transparent color conversion into 24 bpp - * - * C2R_8BIT - * left shift the entire bit and or it with the upper most bits - */ - plane_tp = (uint8) ((mdpImg->tpVal & 0xF800) >> 11); - tpVal |= ((plane_tp << 3) | ((plane_tp & 0x1C) >> 2)) << 16; - - /* C1B_8BIT */ - plane_tp = (uint8) (mdpImg->tpVal & 0x1F); - tpVal |= ((plane_tp << 3) | ((plane_tp & 0x1C) >> 2)) << 8; - - /* C0G_8BIT */ - plane_tp = (uint8) ((mdpImg->tpVal & 0x7E0) >> 5); - tpVal |= ((plane_tp << 2) | ((plane_tp & 0x30) >> 4)); - } else { - /* 24bit RGB to RBG conversion */ - - tpVal = (mdpImg->tpVal & 0xFF00) >> 8; - tpVal |= (mdpImg->tpVal & 0xFF) << 8; - tpVal |= (mdpImg->tpVal & 0xFF0000); - } - - return tpVal; -} - -static uint8 *mdp_get_chroma_addr(MDPIBUF *iBuf) -{ - uint8 *dest1; - - dest1 = NULL; - switch (iBuf->ibuf_type) { - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - dest1 = (uint8 *) iBuf->buf; - dest1 += iBuf->ibuf_width * iBuf->ibuf_height * iBuf->bpp; - break; - - default: - break; - } - - return dest1; -} - -static void mdp_ppp_setbg(MDPIBUF *iBuf) -{ - uint8 *bg0_addr; - uint8 *bg1_addr; - uint32 bg0_ystride, bg1_ystride; - uint32 ppp_src_cfg_reg, unpack_pattern; - int v_slice, h_slice; - - v_slice = h_slice = 1; - bg0_addr = (uint8 *) iBuf->buf; - bg1_addr = mdp_get_chroma_addr(iBuf); - - bg0_ystride = iBuf->ibuf_width * iBuf->bpp; - bg1_ystride = iBuf->ibuf_width * iBuf->bpp; - - switch (iBuf->ibuf_type) { - case MDP_BGR_565: - case MDP_RGB_565: - /* 888 = 3bytes - * RGB = 3Components - * RGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_5BITS | PPP_SRC_C0G_6BITS | - PPP_SRC_C1B_5BITS | PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_3COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_INTERLVD; - - if (iBuf->ibuf_type == MDP_RGB_565) - unpack_pattern = - MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - else - unpack_pattern = - MDP_GET_PACK_PATTERN(0, CLR_B, CLR_G, CLR_R, 8); - break; - - case MDP_RGB_888: - /* - * 888 = 3bytes - * RGB = 3Components - * RGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | PPP_SRC_BPP_INTERLVD_3BYTES | - PPP_SRC_INTERLVD_3COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | PPP_SRC_FETCH_PLANES_INTERLVD; - - unpack_pattern = - MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - break; - - case MDP_BGRA_8888: - case MDP_RGBA_8888: - case MDP_ARGB_8888: - case MDP_XRGB_8888: - /* - * 8888 = 4bytes - * ARGB = 4Components - * ARGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | PPP_SRC_C3A_8BITS | PPP_SRC_C3_ALPHA_EN | - PPP_SRC_BPP_INTERLVD_4BYTES | PPP_SRC_INTERLVD_4COMPONENTS | - PPP_SRC_UNPACK_TIGHT | PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_INTERLVD; - - if (iBuf->ibuf_type == MDP_BGRA_8888) - unpack_pattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - else if (iBuf->ibuf_type == MDP_RGBA_8888) - unpack_pattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G, CLR_R, - 8); - else - unpack_pattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - break; - - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | - PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | - PPP_SRC_C3A_8BITS | - PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_2COMPONENTS | - PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | PPP_SRC_FETCH_PLANES_PSEUDOPLNR; - - if (iBuf->ibuf_type == MDP_Y_CBCR_H2V1) - unpack_pattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - else - unpack_pattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - v_slice = h_slice = 2; - break; - - case MDP_YCRYCB_H2V1: - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | - PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | - PPP_SRC_C3A_8BITS | - PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_4COMPONENTS | - PPP_SRC_UNPACK_TIGHT | PPP_SRC_UNPACK_ALIGN_LSB; - - unpack_pattern = - MDP_GET_PACK_PATTERN(CLR_Y, CLR_CR, CLR_Y, CLR_CB, 8); - h_slice = 2; - break; - - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | - PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | - PPP_SRC_C3A_8BITS | - PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_2COMPONENTS | - PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | PPP_SRC_FETCH_PLANES_PSEUDOPLNR; - - if (iBuf->ibuf_type == MDP_Y_CBCR_H2V1) - unpack_pattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - else - unpack_pattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - h_slice = 2; - break; - - default: - return; - } - - /* starting input address adjustment */ - mdp_adjust_start_addr(&bg0_addr, &bg1_addr, v_slice, h_slice, - iBuf->roi.lcd_x, iBuf->roi.lcd_y, - iBuf->ibuf_width, iBuf->ibuf_height, iBuf->bpp, - iBuf, 1); - - /* - * 0x01c0: background plane 0 addr - * 0x01c4: background plane 1 addr - * 0x01c8: background plane 2 addr - * 0x01cc: bg y stride for plane 0 and 1 - * 0x01d0: bg y stride for plane 2 - * 0x01d4: bg src PPP config - * 0x01d8: unpack pattern - */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01c0, bg0_addr); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01c4, bg1_addr); - - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01cc, - (bg1_ystride << 16) | bg0_ystride); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01d4, ppp_src_cfg_reg); - - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01d8, unpack_pattern); -} - -#define IS_PSEUDOPLNR(img) ((img == MDP_Y_CRCB_H2V2) | \ - (img == MDP_Y_CBCR_H2V2) | \ - (img == MDP_Y_CRCB_H2V1) | \ - (img == MDP_Y_CBCR_H2V1)) - -#define IMG_LEN(rect_h, w, rect_w, bpp) (((rect_h) * w) * bpp) - -#define Y_TO_CRCB_RATIO(format) \ - ((format == MDP_Y_CBCR_H2V2 || format == MDP_Y_CRCB_H2V2) ? 2 :\ - (format == MDP_Y_CBCR_H2V1 || format == MDP_Y_CRCB_H2V1) ? 1 : 1) - -static void get_len(struct mdp_img *img, struct mdp_rect *rect, uint32_t bpp, - uint32_t *len0, uint32_t *len1) -{ - *len0 = IMG_LEN(rect->h, img->width, rect->w, bpp); - if (IS_PSEUDOPLNR(img->format)) - *len1 = *len0/Y_TO_CRCB_RATIO(img->format); - else - *len1 = 0; -} - -static void flush_imgs(struct mdp_blit_req *req, int src_bpp, int dst_bpp, - struct file *p_src_file, struct file *p_dst_file) -{ -#ifdef CONFIG_ANDROID_PMEM - uint32_t src0_len, src1_len, dst0_len, dst1_len; - - /* flush src images to memory before dma to mdp */ - get_len(&req->src, &req->src_rect, src_bpp, - &src0_len, &src1_len); - - flush_pmem_file(p_src_file, - req->src.offset, src0_len); - - if (IS_PSEUDOPLNR(req->src.format)) - flush_pmem_file(p_src_file, - req->src.offset + src0_len, src1_len); - - get_len(&req->dst, &req->dst_rect, dst_bpp, &dst0_len, &dst1_len); - flush_pmem_file(p_dst_file, req->dst.offset, dst0_len); - - if (IS_PSEUDOPLNR(req->dst.format)) - flush_pmem_file(p_dst_file, - req->dst.offset + dst0_len, dst1_len); -#endif -} - -static void mdp_start_ppp(struct msm_fb_data_type *mfd, MDPIBUF *iBuf, -struct mdp_blit_req *req, struct file *p_src_file, struct file *p_dst_file) -{ - uint8 *src0, *src1; - uint8 *dest0, *dest1; - uint16 inpBpp; - uint32 dest0_ystride; - uint32 src_width; - uint32 src_height; - uint32 src0_ystride; - uint32 dst_roi_width; - uint32 dst_roi_height; - uint32 ppp_src_cfg_reg, ppp_operation_reg, ppp_dst_cfg_reg; - uint32 alpha, tpVal; - uint32 packPattern; - uint32 dst_packPattern; - boolean inputRGB, outputRGB, pseudoplanr_output; - int sv_slice, sh_slice; - int dv_slice, dh_slice; - boolean perPixelAlpha = FALSE; - boolean ppp_lookUp_enable = FALSE; - - sv_slice = sh_slice = dv_slice = dh_slice = 1; - alpha = tpVal = 0; - src_width = iBuf->mdpImg.width; - src_height = iBuf->roi.y + iBuf->roi.height; - src1 = NULL; - dest1 = NULL; - - inputRGB = outputRGB = TRUE; - pseudoplanr_output = FALSE; - ppp_operation_reg = 0; - ppp_dst_cfg_reg = 0; - ppp_src_cfg_reg = 0; - - /* Wait for the pipe to clear */ - do { } while (mdp_ppp_pipe_wait() <= 0); - - /* - * destination config - */ - switch (iBuf->ibuf_type) { - case MDP_RGB_888: - dst_packPattern = - MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - ppp_dst_cfg_reg = - PPP_DST_C0G_8BIT | PPP_DST_C1B_8BIT | PPP_DST_C2R_8BIT | - PPP_DST_PACKET_CNT_INTERLVD_3ELEM | PPP_DST_PACK_TIGHT | - PPP_DST_PACK_ALIGN_LSB | PPP_DST_OUT_SEL_AXI | - PPP_DST_BPP_3BYTES | PPP_DST_PLANE_INTERLVD; - break; - - case MDP_XRGB_8888: - case MDP_ARGB_8888: - case MDP_RGBA_8888: - if (iBuf->ibuf_type == MDP_BGRA_8888) - dst_packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - else if (iBuf->ibuf_type == MDP_RGBA_8888) - dst_packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G, CLR_R, - 8); - else - dst_packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - - ppp_dst_cfg_reg = PPP_DST_C0G_8BIT | - PPP_DST_C1B_8BIT | - PPP_DST_C2R_8BIT | - PPP_DST_C3A_8BIT | - PPP_DST_C3ALPHA_EN | - PPP_DST_PACKET_CNT_INTERLVD_4ELEM | - PPP_DST_PACK_TIGHT | - PPP_DST_PACK_ALIGN_LSB | - PPP_DST_OUT_SEL_AXI | - PPP_DST_BPP_4BYTES | PPP_DST_PLANE_INTERLVD; - break; - - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - if (iBuf->ibuf_type == MDP_Y_CBCR_H2V2) - dst_packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - else - dst_packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - - ppp_dst_cfg_reg = PPP_DST_C2R_8BIT | - PPP_DST_C0G_8BIT | - PPP_DST_C1B_8BIT | - PPP_DST_C3A_8BIT | - PPP_DST_PACKET_CNT_INTERLVD_2ELEM | - PPP_DST_PACK_TIGHT | - PPP_DST_PACK_ALIGN_LSB | - PPP_DST_OUT_SEL_AXI | PPP_DST_BPP_2BYTES; - - ppp_operation_reg |= PPP_OP_DST_CHROMA_420; - outputRGB = FALSE; - pseudoplanr_output = TRUE; - /* - * vertically (y direction) and horizontally (x direction) - * sample reduction by 2 - */ - - /* - * H2V2(YUV420) Cosite - * - * Y Y Y Y - * CbCr CbCr - * Y Y Y Y - * Y Y Y Y - * CbCr CbCr - * Y Y Y Y - */ - dv_slice = dh_slice = 2; - - /* (x,y) and (width,height) must be even numbern */ - iBuf->roi.lcd_x = (iBuf->roi.lcd_x / 2) * 2; - iBuf->roi.dst_width = (iBuf->roi.dst_width / 2) * 2; - iBuf->roi.x = (iBuf->roi.x / 2) * 2; - iBuf->roi.width = (iBuf->roi.width / 2) * 2; - - iBuf->roi.lcd_y = (iBuf->roi.lcd_y / 2) * 2; - iBuf->roi.dst_height = (iBuf->roi.dst_height / 2) * 2; - iBuf->roi.y = (iBuf->roi.y / 2) * 2; - iBuf->roi.height = (iBuf->roi.height / 2) * 2; - break; - - case MDP_YCRYCB_H2V1: - dst_packPattern = - MDP_GET_PACK_PATTERN(CLR_Y, CLR_CR, CLR_Y, CLR_CB, 8); - ppp_dst_cfg_reg = - PPP_DST_C2R_8BIT | PPP_DST_C0G_8BIT | PPP_DST_C1B_8BIT | - PPP_DST_C3A_8BIT | PPP_DST_PACKET_CNT_INTERLVD_4ELEM | - PPP_DST_PACK_TIGHT | PPP_DST_PACK_ALIGN_LSB | - PPP_DST_OUT_SEL_AXI | PPP_DST_BPP_2BYTES | - PPP_DST_PLANE_INTERLVD; - - ppp_operation_reg |= PPP_OP_DST_CHROMA_H2V1; - outputRGB = FALSE; - /* - * horizontally (x direction) sample reduction by 2 - * - * H2V1(YUV422) Cosite - * - * YCbCr Y YCbCr Y - * YCbCr Y YCbCr Y - * YCbCr Y YCbCr Y - * YCbCr Y YCbCr Y - */ - dh_slice = 2; - - /* - * if it's TV-Out/MDP_YCRYCB_H2V1, let's go through the - * preloaded gamma setting of 2.2 when the content is - * non-linear ppp_lookUp_enable = TRUE; - */ - - /* x and width must be even number */ - iBuf->roi.lcd_x = (iBuf->roi.lcd_x / 2) * 2; - iBuf->roi.dst_width = (iBuf->roi.dst_width / 2) * 2; - iBuf->roi.x = (iBuf->roi.x / 2) * 2; - iBuf->roi.width = (iBuf->roi.width / 2) * 2; - break; - - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - if (iBuf->ibuf_type == MDP_Y_CBCR_H2V1) - dst_packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - else - dst_packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - - ppp_dst_cfg_reg = PPP_DST_C2R_8BIT | - PPP_DST_C0G_8BIT | - PPP_DST_C1B_8BIT | - PPP_DST_C3A_8BIT | - PPP_DST_PACKET_CNT_INTERLVD_2ELEM | - PPP_DST_PACK_TIGHT | - PPP_DST_PACK_ALIGN_LSB | - PPP_DST_OUT_SEL_AXI | PPP_DST_BPP_2BYTES; - - ppp_operation_reg |= PPP_OP_DST_CHROMA_H2V1; - outputRGB = FALSE; - pseudoplanr_output = TRUE; - /* horizontally (x direction) sample reduction by 2 */ - dh_slice = 2; - - /* x and width must be even number */ - iBuf->roi.lcd_x = (iBuf->roi.lcd_x / 2) * 2; - iBuf->roi.dst_width = (iBuf->roi.dst_width / 2) * 2; - iBuf->roi.x = (iBuf->roi.x / 2) * 2; - iBuf->roi.width = (iBuf->roi.width / 2) * 2; - break; - - case MDP_BGR_565: - case MDP_RGB_565: - default: - if (iBuf->ibuf_type == MDP_RGB_565) - dst_packPattern = - MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - else - dst_packPattern = - MDP_GET_PACK_PATTERN(0, CLR_B, CLR_G, CLR_R, 8); - - ppp_dst_cfg_reg = PPP_DST_C0G_6BIT | - PPP_DST_C1B_5BIT | - PPP_DST_C2R_5BIT | - PPP_DST_PACKET_CNT_INTERLVD_3ELEM | - PPP_DST_PACK_TIGHT | - PPP_DST_PACK_ALIGN_LSB | - PPP_DST_OUT_SEL_AXI | - PPP_DST_BPP_2BYTES | PPP_DST_PLANE_INTERLVD; - break; - } - - /* source config */ - switch (iBuf->mdpImg.imgType) { - case MDP_RGB_888: - inpBpp = 3; - /* - * 565 = 2bytes - * RGB = 3Components - * RGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | PPP_SRC_BPP_INTERLVD_3BYTES | - PPP_SRC_INTERLVD_3COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_INTERLVD; - - packPattern = MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - - ppp_operation_reg |= PPP_OP_COLOR_SPACE_RGB | - PPP_OP_SRC_CHROMA_RGB | PPP_OP_DST_CHROMA_RGB; - break; - - case MDP_BGRA_8888: - case MDP_RGBA_8888: - case MDP_ARGB_8888: - perPixelAlpha = TRUE; - case MDP_XRGB_8888: - inpBpp = 4; - /* - * 8888 = 4bytes - * ARGB = 4Components - * ARGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | PPP_SRC_C3A_8BITS | - PPP_SRC_C3_ALPHA_EN | PPP_SRC_BPP_INTERLVD_4BYTES | - PPP_SRC_INTERLVD_4COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_INTERLVD; - - if (iBuf->mdpImg.imgType == MDP_BGRA_8888) - packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - else if (iBuf->mdpImg.imgType == MDP_RGBA_8888) - packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G, CLR_R, - 8); - else - packPattern = - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, - 8); - - ppp_operation_reg |= PPP_OP_COLOR_SPACE_RGB | - PPP_OP_SRC_CHROMA_RGB | PPP_OP_DST_CHROMA_RGB; - break; - - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - inpBpp = 1; - src1 = (uint8 *) iBuf->mdpImg.cbcr_addr; - - /* - * CbCr = 2bytes - * CbCr = 2Components - * Y+CbCr - */ - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_2COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_PSEUDOPLNR; - - if (iBuf->mdpImg.imgType == MDP_Y_CRCB_H2V2) - packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - else - packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - - ppp_operation_reg |= PPP_OP_COLOR_SPACE_YCBCR | - PPP_OP_SRC_CHROMA_420 | - PPP_OP_SRC_CHROMA_COSITE | - PPP_OP_DST_CHROMA_RGB | PPP_OP_DST_CHROMA_COSITE; - - inputRGB = FALSE; - sh_slice = sv_slice = 2; - break; - - case MDP_YCRYCB_H2V1: - inpBpp = 2; - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | - PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | - PPP_SRC_C3A_8BITS | - PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_4COMPONENTS | - PPP_SRC_UNPACK_TIGHT | PPP_SRC_UNPACK_ALIGN_LSB; - - packPattern = - MDP_GET_PACK_PATTERN(CLR_Y, CLR_CR, CLR_Y, CLR_CB, 8); - - ppp_operation_reg |= PPP_OP_SRC_CHROMA_H2V1 | - PPP_OP_SRC_CHROMA_COSITE | PPP_OP_DST_CHROMA_COSITE; - - /* - * if it's TV-Out/MDP_YCRYCB_H2V1, let's go through the - * preloaded inverse gamma setting of 2.2 since they're - * symetric when the content is non-linear - * ppp_lookUp_enable = TRUE; - */ - - /* x and width must be even number */ - iBuf->roi.lcd_x = (iBuf->roi.lcd_x / 2) * 2; - iBuf->roi.dst_width = (iBuf->roi.dst_width / 2) * 2; - iBuf->roi.x = (iBuf->roi.x / 2) * 2; - iBuf->roi.width = (iBuf->roi.width / 2) * 2; - - inputRGB = FALSE; - sh_slice = 2; - break; - - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - inpBpp = 1; - src1 = (uint8 *) iBuf->mdpImg.cbcr_addr; - - ppp_src_cfg_reg = PPP_SRC_C2R_8BITS | - PPP_SRC_C0G_8BITS | - PPP_SRC_C1B_8BITS | - PPP_SRC_C3A_8BITS | - PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_2COMPONENTS | - PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | PPP_SRC_FETCH_PLANES_PSEUDOPLNR; - - if (iBuf->mdpImg.imgType == MDP_Y_CBCR_H2V1) - packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8); - else - packPattern = - MDP_GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8); - - ppp_operation_reg |= PPP_OP_SRC_CHROMA_H2V1 | - PPP_OP_SRC_CHROMA_COSITE | PPP_OP_DST_CHROMA_COSITE; - inputRGB = FALSE; - sh_slice = 2; - break; - - case MDP_BGR_565: - case MDP_RGB_565: - default: - inpBpp = 2; - /* - * 565 = 2bytes - * RGB = 3Components - * RGB interleaved - */ - ppp_src_cfg_reg = PPP_SRC_C2R_5BITS | PPP_SRC_C0G_6BITS | - PPP_SRC_C1B_5BITS | PPP_SRC_BPP_INTERLVD_2BYTES | - PPP_SRC_INTERLVD_3COMPONENTS | PPP_SRC_UNPACK_TIGHT | - PPP_SRC_UNPACK_ALIGN_LSB | - PPP_SRC_FETCH_PLANES_INTERLVD; - - if (iBuf->mdpImg.imgType == MDP_RGB_565) - packPattern = - MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8); - else - packPattern = - MDP_GET_PACK_PATTERN(0, CLR_B, CLR_G, CLR_R, 8); - - ppp_operation_reg |= PPP_OP_COLOR_SPACE_RGB | - PPP_OP_SRC_CHROMA_RGB | PPP_OP_DST_CHROMA_RGB; - break; - - } - - if (pseudoplanr_output) - ppp_dst_cfg_reg |= PPP_DST_PLANE_PSEUDOPLN; - - /* YCbCr to RGB color conversion flag */ - if ((!inputRGB) && (outputRGB)) { - ppp_operation_reg |= PPP_OP_CONVERT_YCBCR2RGB | - PPP_OP_CONVERT_ON; - - /* - * primary/secondary is sort of misleading term...but - * in mdp2.2/3.0 we only use primary matrix (forward/rev) - * in mdp3.1 we use set1(prim) and set2(secd) - */ -#ifdef CONFIG_FB_MSM_MDP31 - ppp_operation_reg |= PPP_OP_CONVERT_MATRIX_SECONDARY | - PPP_OP_DST_RGB; - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0240, 0); -#endif - - if (ppp_lookUp_enable) { - ppp_operation_reg |= PPP_OP_LUT_C0_ON | - PPP_OP_LUT_C1_ON | PPP_OP_LUT_C2_ON; - } - } - /* RGB to YCbCr color conversion flag */ - if ((inputRGB) && (!outputRGB)) { - ppp_operation_reg |= PPP_OP_CONVERT_RGB2YCBCR | - PPP_OP_CONVERT_ON; - -#ifdef CONFIG_FB_MSM_MDP31 - ppp_operation_reg |= PPP_OP_CONVERT_MATRIX_PRIMARY | - PPP_OP_DST_YCBCR; - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0240, 0x1e); -#endif - - if (ppp_lookUp_enable) { - ppp_operation_reg |= PPP_OP_LUT_C0_ON | - PPP_OP_LUT_C1_ON | PPP_OP_LUT_C2_ON; - } - } - /* YCbCr to YCbCr color conversion flag */ - if ((!inputRGB) && (!outputRGB)) { - if ((ppp_lookUp_enable) && - (iBuf->mdpImg.imgType != iBuf->ibuf_type)) { - ppp_operation_reg |= PPP_OP_LUT_C0_ON; - } - } - - ppp_src_cfg_reg |= (iBuf->roi.x % 2) ? PPP_SRC_BPP_ROI_ODD_X : 0; - ppp_src_cfg_reg |= (iBuf->roi.y % 2) ? PPP_SRC_BPP_ROI_ODD_Y : 0; - - if (req->flags & MDP_DEINTERLACE) - ppp_operation_reg |= PPP_OP_DEINT_EN; - - /* Dither at DMA side only since iBuf format is RGB888 */ - if (iBuf->mdpImg.mdpOp & MDPOP_DITHER) - ppp_operation_reg |= PPP_OP_DITHER_EN; - - if (iBuf->mdpImg.mdpOp & MDPOP_ROTATION) { - ppp_operation_reg |= PPP_OP_ROT_ON; - - if (iBuf->mdpImg.mdpOp & MDPOP_ROT90) { - ppp_operation_reg |= PPP_OP_ROT_90; - } - if (iBuf->mdpImg.mdpOp & MDPOP_LR) { - ppp_operation_reg |= PPP_OP_FLIP_LR; - } - if (iBuf->mdpImg.mdpOp & MDPOP_UD) { - ppp_operation_reg |= PPP_OP_FLIP_UD; - } - } - - src0_ystride = src_width * inpBpp; - dest0_ystride = iBuf->ibuf_width * iBuf->bpp; - - /* no need to care about rotation since it's the real-XY. */ - dst_roi_width = iBuf->roi.dst_width; - dst_roi_height = iBuf->roi.dst_height; - - src0 = (uint8 *) iBuf->mdpImg.bmy_addr; - dest0 = (uint8 *) iBuf->buf; - - /* Jumping from Y-Plane to Chroma Plane */ - dest1 = mdp_get_chroma_addr(iBuf); - - /* first pixel addr calculation */ - mdp_adjust_start_addr(&src0, &src1, sv_slice, sh_slice, iBuf->roi.x, - iBuf->roi.y, src_width, src_height, inpBpp, iBuf, - 0); - mdp_adjust_start_addr(&dest0, &dest1, dv_slice, dh_slice, - iBuf->roi.lcd_x, iBuf->roi.lcd_y, - iBuf->ibuf_width, iBuf->ibuf_height, iBuf->bpp, - iBuf, 2); - - /* set scale operation */ - mdp_set_scale(iBuf, dst_roi_width, dst_roi_height, - inputRGB, outputRGB, &ppp_operation_reg); - - /* - * setting background source for blending - */ - mdp_set_blend_attr(iBuf, &alpha, &tpVal, perPixelAlpha, - &ppp_operation_reg); - - if (ppp_operation_reg & PPP_OP_BLEND_ON) { - mdp_ppp_setbg(iBuf); - - if (iBuf->ibuf_type == MDP_YCRYCB_H2V1) { - ppp_operation_reg |= PPP_OP_BG_CHROMA_H2V1; - - if (iBuf->mdpImg.mdpOp & MDPOP_TRANSP) { - tpVal = mdp_conv_matx_rgb2yuv(tpVal, - (uint16 *) & - mdp_ccs_rgb2yuv, - &mdp_plv[0], NULL); - } - } - } - - /* - * 0x0004: enable dbg bus - * 0x0100: "don't care" Edge Condit until scaling is on - * 0x0104: xrc tile x&y size u7.6 format = 7bit.6bit - * 0x0108: src pixel size - * 0x010c: component plane 0 starting address - * 0x011c: component plane 0 ystride - * 0x0124: PPP source config register - * 0x0128: unpacked pattern from lsb to msb (eg. RGB->BGR) - */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0108, (iBuf->roi.height << 16 | - iBuf->roi.width)); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x010c, src0); /* comp.plane 0 */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0110, src1); /* comp.plane 1 */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x011c, - (src0_ystride << 16 | src0_ystride)); - - /* setup for rgb 565 */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0124, ppp_src_cfg_reg); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0128, packPattern); - /* - * 0x0138: PPP destination operation register - * 0x014c: constant_alpha|transparent_color - * 0x0150: PPP destination config register - * 0x0154: PPP packing pattern - */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0138, ppp_operation_reg); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x014c, alpha << 24 | tpVal); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0150, ppp_dst_cfg_reg); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0154, dst_packPattern); - - /* - * 0x0164: ROI height and width - * 0x0168: Component Plane 0 starting addr - * 0x016c: Component Plane 1 starting addr - * 0x0178: Component Plane 1/0 y stride - */ - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0164, - (dst_roi_height << 16 | dst_roi_width)); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0168, dest0); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x016c, dest1); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0178, - (dest0_ystride << 16 | dest0_ystride)); - - flush_imgs(req, inpBpp, iBuf->bpp, p_src_file, p_dst_file); -#ifdef CONFIG_MDP_PPP_ASYNC_OP - mdp_ppp_process_curr_djob(); -#else - mdp_pipe_kickoff(MDP_PPP_TERM, mfd); -#endif -} - -static int mdp_ppp_verify_req(struct mdp_blit_req *req) -{ - u32 src_width, src_height, dst_width, dst_height; - - if (req == NULL) - return -1; - - if (MDP_IS_IMGTYPE_BAD(req->src.format) || - MDP_IS_IMGTYPE_BAD(req->dst.format)) - return -1; - - if ((req->src.width == 0) || (req->src.height == 0) || - (req->src_rect.w == 0) || (req->src_rect.h == 0) || - (req->dst.width == 0) || (req->dst.height == 0) || - (req->dst_rect.w == 0) || (req->dst_rect.h == 0)) - - return -1; - - if (((req->src_rect.x + req->src_rect.w) > req->src.width) || - ((req->src_rect.y + req->src_rect.h) > req->src.height)) - return -1; - - if (((req->dst_rect.x + req->dst_rect.w) > req->dst.width) || - ((req->dst_rect.y + req->dst_rect.h) > req->dst.height)) - return -1; - - /* - * scaling range check - */ - src_width = req->src_rect.w; - src_height = req->src_rect.h; - - if (req->flags & MDP_ROT_90) { - dst_width = req->dst_rect.h; - dst_height = req->dst_rect.w; - } else { - dst_width = req->dst_rect.w; - dst_height = req->dst_rect.h; - } - - switch (req->dst.format) { - case MDP_Y_CRCB_H2V2: - case MDP_Y_CBCR_H2V2: - src_width = (src_width / 2) * 2; - src_height = (src_height / 2) * 2; - dst_width = (src_width / 2) * 2; - dst_height = (src_height / 2) * 2; - break; - - case MDP_Y_CRCB_H2V1: - case MDP_Y_CBCR_H2V1: - case MDP_YCRYCB_H2V1: - src_width = (src_width / 2) * 2; - dst_width = (src_width / 2) * 2; - break; - - default: - break; - } - - if (((MDP_SCALE_Q_FACTOR * dst_width) / src_width > - MDP_MAX_X_SCALE_FACTOR) - || ((MDP_SCALE_Q_FACTOR * dst_width) / src_width < - MDP_MIN_X_SCALE_FACTOR)) - return -1; - - if (((MDP_SCALE_Q_FACTOR * dst_height) / src_height > - MDP_MAX_Y_SCALE_FACTOR) - || ((MDP_SCALE_Q_FACTOR * dst_height) / src_height < - MDP_MIN_Y_SCALE_FACTOR)) - return -1; - - return 0; -} - -/** - * get_gem_img() - retrieve drm obj's start address and size - * @img: contains drm file descriptor and gem handle - * @start: repository of starting address of drm obj allocated memory - * @len: repository of size of drm obj alloacted memory - * - **/ -int get_gem_img(struct mdp_img *img, unsigned long *start, unsigned long *len) -{ - panic("waaaaaaaah"); - //return kgsl_gem_obj_addr(img->memory_id, (int)img->priv, start, len); -} - -int get_img(struct mdp_img *img, struct fb_info *info, unsigned long *start, - unsigned long *len, struct file **pp_file) -{ - int put_needed, ret = 0; - struct file *file; - unsigned long vstart; -#ifdef CONFIG_ANDROID_PMEM - if (!get_pmem_file(img->memory_id, start, &vstart, len, pp_file)) - return 0; -#endif - file = fget_light(img->memory_id, &put_needed); - if (file == NULL) - return -1; - - if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) { - *start = info->fix.smem_start; - *len = info->fix.smem_len; - *pp_file = file; - } else { - ret = -1; - fput_light(file, put_needed); - } - return ret; -} - -int mdp_ppp_blit(struct fb_info *info, struct mdp_blit_req *req, - struct file **pp_src_file, struct file **pp_dst_file) -{ - unsigned long src_start, dst_start; - unsigned long src_len = 0; - unsigned long dst_len = 0; - MDPIBUF iBuf; - u32 dst_width, dst_height; - struct file *p_src_file = 0 , *p_dst_file = 0; - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if (req->dst.format == MDP_FB_FORMAT) - req->dst.format = mfd->fb_imgType; - if (req->src.format == MDP_FB_FORMAT) - req->src.format = mfd->fb_imgType; - - if (req->flags & MDP_BLIT_SRC_GEM) { - if (get_gem_img(&req->src, &src_start, &src_len) < 0) - return -1; - } else { - get_img(&req->src, info, &src_start, &src_len, &p_src_file); - } - if (src_len == 0) { - printk(KERN_ERR "mdp_ppp: could not retrieve image from " - "memory\n"); - return -1; - } - - if (req->flags & MDP_BLIT_DST_GEM) { - if (get_gem_img(&req->dst, &dst_start, &dst_len) < 0) - return -1; - } else { - get_img(&req->dst, info, &dst_start, &dst_len, &p_dst_file); - } - if (dst_len == 0) { - printk(KERN_ERR "mdp_ppp: could not retrieve image from " - "memory\n"); - return -1; - } - *pp_src_file = p_src_file; - *pp_dst_file = p_dst_file; - if (mdp_ppp_verify_req(req)) { - printk(KERN_ERR "mdp_ppp: invalid image!\n"); - return -1; - } - - iBuf.ibuf_width = req->dst.width; - iBuf.ibuf_height = req->dst.height; - iBuf.bpp = bytes_per_pixel[req->dst.format]; - - iBuf.ibuf_type = req->dst.format; - iBuf.buf = (uint8 *) dst_start; - iBuf.buf += req->dst.offset; - - iBuf.roi.lcd_x = req->dst_rect.x; - iBuf.roi.lcd_y = req->dst_rect.y; - iBuf.roi.dst_width = req->dst_rect.w; - iBuf.roi.dst_height = req->dst_rect.h; - - iBuf.roi.x = req->src_rect.x; - iBuf.roi.width = req->src_rect.w; - iBuf.roi.y = req->src_rect.y; - iBuf.roi.height = req->src_rect.h; - - iBuf.mdpImg.width = req->src.width; - iBuf.mdpImg.imgType = req->src.format; - - iBuf.mdpImg.bmy_addr = (uint32 *) (src_start + req->src.offset); - iBuf.mdpImg.cbcr_addr = - (uint32 *) ((uint32) iBuf.mdpImg.bmy_addr + - req->src.width * req->src.height); - - iBuf.mdpImg.mdpOp = MDPOP_NOP; - - /* blending check */ - if (req->transp_mask != MDP_TRANSP_NOP) { - iBuf.mdpImg.mdpOp |= MDPOP_TRANSP; - iBuf.mdpImg.tpVal = req->transp_mask; - iBuf.mdpImg.tpVal = mdp_calc_tpval(&iBuf.mdpImg); - } - - req->alpha &= 0xff; - if (req->alpha < MDP_ALPHA_NOP) { - iBuf.mdpImg.mdpOp |= MDPOP_ALPHAB; - iBuf.mdpImg.alpha = req->alpha; - } - - /* rotation check */ - if (req->flags & MDP_FLIP_LR) - iBuf.mdpImg.mdpOp |= MDPOP_LR; - if (req->flags & MDP_FLIP_UD) - iBuf.mdpImg.mdpOp |= MDPOP_UD; - if (req->flags & MDP_ROT_90) - iBuf.mdpImg.mdpOp |= MDPOP_ROT90; - if (req->flags & MDP_DITHER) - iBuf.mdpImg.mdpOp |= MDPOP_DITHER; - - if (req->flags & MDP_BLEND_FG_PREMULT) { -#ifdef CONFIG_FB_MSM_MDP31 - iBuf.mdpImg.mdpOp |= MDPOP_FG_PM_ALPHA; -#else - return -EINVAL; -#endif - } - - if (req->flags & MDP_DEINTERLACE) { -#ifdef CONFIG_FB_MSM_MDP31 - if ((req->src.format != MDP_Y_CBCR_H2V2) && - (req->src.format != MDP_Y_CRCB_H2V2)) -#endif - return -EINVAL; - } - - /* scale check */ - if (req->flags & MDP_ROT_90) { - dst_width = req->dst_rect.h; - dst_height = req->dst_rect.w; - } else { - dst_width = req->dst_rect.w; - dst_height = req->dst_rect.h; - } - - if ((iBuf.roi.width != dst_width) || (iBuf.roi.height != dst_height)) - iBuf.mdpImg.mdpOp |= MDPOP_ASCALE; - - if (req->flags & MDP_BLUR) { -#ifdef CONFIG_FB_MSM_MDP31 - if (req->flags & MDP_SHARPENING) - printk(KERN_WARNING - "mdp: MDP_SHARPENING is set with MDP_BLUR!\n"); - req->flags |= MDP_SHARPENING; - req->sharpening_strength = -127; -#else - iBuf.mdpImg.mdpOp |= MDPOP_ASCALE | MDPOP_BLUR; - -#endif - } - - if (req->flags & MDP_SHARPENING) { -#ifdef CONFIG_FB_MSM_MDP31 - if ((req->sharpening_strength > 127) || - (req->sharpening_strength < -127)) { - printk(KERN_ERR - "%s: sharpening strength out of range\n", - __func__); - return -EINVAL; - } - - iBuf.mdpImg.mdpOp |= MDPOP_ASCALE | MDPOP_SHARPENING; - iBuf.mdpImg.sp_value = req->sharpening_strength & 0xff; -#else - return -EINVAL; -#endif - } - - down(&mdp_ppp_mutex); - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - -#ifdef CONFIG_FB_MSM_MDP31 - mdp_start_ppp(mfd, &iBuf, req, p_src_file, p_dst_file); -#else - /* bg tile fetching HW workaround */ - if (((iBuf.mdpImg.mdpOp & (MDPOP_TRANSP | MDPOP_ALPHAB)) || - (req->src.format == MDP_ARGB_8888) || - (req->src.format == MDP_BGRA_8888) || - (req->src.format == MDP_RGBA_8888)) && - (iBuf.mdpImg.mdpOp & MDPOP_ROT90) && (req->dst_rect.w <= 16)) { - int dst_h, src_w, i; - - src_w = req->src_rect.w; - dst_h = iBuf.roi.dst_height; - - for (i = 0; i < (req->dst_rect.h / 16); i++) { - /* this tile size */ - iBuf.roi.dst_height = 16; - iBuf.roi.width = - (16 * req->src_rect.w) / req->dst_rect.h; - - /* if it's out of scale range... */ - if (((MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - iBuf.roi.width) > MDP_MAX_X_SCALE_FACTOR) - iBuf.roi.width = - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - MDP_MAX_X_SCALE_FACTOR; - else if (((MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - iBuf.roi.width) < MDP_MIN_X_SCALE_FACTOR) - iBuf.roi.width = - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - MDP_MIN_X_SCALE_FACTOR; - - mdp_start_ppp(mfd, &iBuf, req, p_src_file, p_dst_file); - - /* next tile location */ - iBuf.roi.lcd_y += 16; - iBuf.roi.x += iBuf.roi.width; - - /* this is for a remainder update */ - dst_h -= 16; - src_w -= iBuf.roi.width; - } - - if ((dst_h < 0) || (src_w < 0)) - printk - ("msm_fb: mdp_blt_ex() unexpected result! line:%d\n", - __LINE__); - - /* remainder update */ - if ((dst_h > 0) && (src_w > 0)) { - u32 tmp_v; - - iBuf.roi.dst_height = dst_h; - iBuf.roi.width = src_w; - - if (((MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - iBuf.roi.width) > MDP_MAX_X_SCALE_FACTOR) { - tmp_v = - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - MDP_MAX_X_SCALE_FACTOR + - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) % - MDP_MAX_X_SCALE_FACTOR ? 1 : 0; - - /* move x location as roi width gets bigger */ - iBuf.roi.x -= tmp_v - iBuf.roi.width; - iBuf.roi.width = tmp_v; - } else - if (((MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - iBuf.roi.width) < MDP_MIN_X_SCALE_FACTOR) { - tmp_v = - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) / - MDP_MIN_X_SCALE_FACTOR + - (MDP_SCALE_Q_FACTOR * iBuf.roi.dst_height) % - MDP_MIN_X_SCALE_FACTOR ? 1 : 0; - - /* - * we don't move x location for continuity of - * source image - */ - iBuf.roi.width = tmp_v; - } - - mdp_start_ppp(mfd, &iBuf, req, p_src_file, p_dst_file); - } - } else { - mdp_start_ppp(mfd, &iBuf, req, p_src_file, p_dst_file); - } -#endif - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - up(&mdp_ppp_mutex); - - return 0; -} diff --git a/drivers/staging/msm/mdp_ppp_dq.c b/drivers/staging/msm/mdp_ppp_dq.c deleted file mode 100644 index 3a687c7..0000000 --- a/drivers/staging/msm/mdp_ppp_dq.c +++ /dev/null @@ -1,347 +0,0 @@ -/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include "mdp.h" - -static boolean mdp_ppp_intr_flag = FALSE; -static boolean mdp_ppp_busy_flag = FALSE; - -/* Queue to keep track of the completed jobs for cleaning */ -static LIST_HEAD(mdp_ppp_djob_clnrq); -static DEFINE_SPINLOCK(mdp_ppp_djob_clnrq_lock); - -/* Worker to cleanup Display Jobs */ -static struct workqueue_struct *mdp_ppp_djob_clnr; - -/* Display Queue (DQ) for MDP PPP Block */ -static LIST_HEAD(mdp_ppp_dq); -static DEFINE_SPINLOCK(mdp_ppp_dq_lock); - -/* Current Display Job for MDP PPP */ -static struct mdp_ppp_djob *curr_djob; - -/* Track ret code for the last opeartion */ -static int mdp_ppp_ret_code; - -inline int mdp_ppp_get_ret_code(void) -{ - return mdp_ppp_ret_code; -} - -/* Push pair into DQ (if available) to later - * program the MDP PPP Block */ -inline void mdp_ppp_outdw(uint32_t addr, uint32_t data) -{ - if (curr_djob) { - - /* get the last node of the list. */ - struct mdp_ppp_roi_cmd_set *node = - list_entry(curr_djob->roi_cmd_list.prev, - struct mdp_ppp_roi_cmd_set, node); - - /* If a node is already full, create a new one and add it to - * the list (roi_cmd_list). - */ - if (node->ncmds == MDP_PPP_ROI_NODE_SIZE) { - node = kmalloc(sizeof(struct mdp_ppp_roi_cmd_set), - GFP_KERNEL); - if (!node) { - printk(KERN_ERR - "MDP_PPP: not enough memory.\n"); - mdp_ppp_ret_code = -EINVAL; - return; - } - - /* no ROI commands initially */ - node->ncmds = 0; - - /* add one node to roi_cmd_list. */ - list_add_tail(&node->node, &curr_djob->roi_cmd_list); - } - - /* register ROI commands */ - node->cmd[node->ncmds].reg = addr; - node->cmd[node->ncmds].val = data; - node->ncmds++; - } else - /* program MDP PPP block now */ - outpdw((addr), (data)); -} - -/* Initialize DQ */ -inline void mdp_ppp_dq_init(void) -{ - mdp_ppp_djob_clnr = create_singlethread_workqueue("MDPDJobClnrThrd"); -} - -/* Release resources of a job (DJob). */ -static void mdp_ppp_del_djob(struct mdp_ppp_djob *job) -{ - struct mdp_ppp_roi_cmd_set *node, *tmp; - - /* release mem */ - mdp_ppp_put_img(job->p_src_file, job->p_dst_file); - - /* release roi_cmd_list */ - list_for_each_entry_safe(node, tmp, &job->roi_cmd_list, node) { - list_del(&node->node); - kfree(node); - } - - /* release job struct */ - kfree(job); -} - -/* Worker thread to reclaim resources once a display job is done */ -static void mdp_ppp_djob_cleaner(struct work_struct *work) -{ - struct mdp_ppp_djob *job; - - MDP_PPP_DEBUG_MSG("mdp ppp display job cleaner started \n"); - - /* cleanup display job */ - job = container_of(work, struct mdp_ppp_djob, cleaner.work); - if (likely(work && job)) - mdp_ppp_del_djob(job); -} - -/* Create a new Display Job (DJob) */ -inline struct mdp_ppp_djob *mdp_ppp_new_djob(void) -{ - struct mdp_ppp_djob *job; - struct mdp_ppp_roi_cmd_set *node; - - /* create a new djob */ - job = kmalloc(sizeof(struct mdp_ppp_djob), GFP_KERNEL); - if (!job) - return NULL; - - /* add the first node to curr_djob->roi_cmd_list */ - node = kmalloc(sizeof(struct mdp_ppp_roi_cmd_set), GFP_KERNEL); - if (!node) { - kfree(job); - return NULL; - } - - /* make this current djob container to keep track of the curr djob not - * used in the async path i.e. no sync needed - * - * Should not contain any references from the past djob - */ - BUG_ON(curr_djob); - curr_djob = job; - INIT_LIST_HEAD(&curr_djob->roi_cmd_list); - - /* no ROI commands initially */ - node->ncmds = 0; - INIT_LIST_HEAD(&node->node); - list_add_tail(&node->node, &curr_djob->roi_cmd_list); - - /* register this djob with the djob cleaner - * initializes 'work' data struct - */ - INIT_DELAYED_WORK(&curr_djob->cleaner, mdp_ppp_djob_cleaner); - INIT_LIST_HEAD(&curr_djob->entry); - - curr_djob->p_src_file = 0; - curr_djob->p_dst_file = 0; - - return job; -} - -/* Undo the effect of mdp_ppp_new_djob() */ -inline void mdp_ppp_clear_curr_djob(void) -{ - if (likely(curr_djob)) { - mdp_ppp_del_djob(curr_djob); - curr_djob = NULL; - } -} - -/* Cleanup dirty djobs */ -static void mdp_ppp_flush_dirty_djobs(void *cond) -{ - unsigned long flags; - struct mdp_ppp_djob *job; - - /* Flush the jobs from the djob clnr queue */ - while (cond && test_bit(0, (unsigned long *)cond)) { - - /* Until we are done with the cleanup queue */ - spin_lock_irqsave(&mdp_ppp_djob_clnrq_lock, flags); - if (list_empty(&mdp_ppp_djob_clnrq)) { - spin_unlock_irqrestore(&mdp_ppp_djob_clnrq_lock, flags); - break; - } - - MDP_PPP_DEBUG_MSG("flushing djobs ... loop \n"); - - /* Retrieve the job that needs to be cleaned */ - job = list_entry(mdp_ppp_djob_clnrq.next, - struct mdp_ppp_djob, entry); - list_del_init(&job->entry); - spin_unlock_irqrestore(&mdp_ppp_djob_clnrq_lock, flags); - - /* Keep mem state coherent */ - msm_fb_ensure_mem_coherency_after_dma(job->info, &job->req, 1); - - /* Schedule jobs for cleanup - * A separate worker thread does this */ - queue_delayed_work(mdp_ppp_djob_clnr, &job->cleaner, - mdp_timer_duration); - } -} - -/* If MDP PPP engine is busy, wait until it is available again */ -void mdp_ppp_wait(void) -{ - unsigned long flags; - int cond = 1; - - /* keep flushing dirty djobs as long as MDP PPP engine is busy */ - mdp_ppp_flush_dirty_djobs(&mdp_ppp_busy_flag); - - /* block if MDP PPP engine is still busy */ - spin_lock_irqsave(&mdp_ppp_dq_lock, flags); - if (test_bit(0, (unsigned long *)&mdp_ppp_busy_flag)) { - - /* prepare for the wakeup event */ - test_and_set_bit(0, (unsigned long *)&mdp_ppp_waiting); - INIT_COMPLETION(mdp_ppp_comp); - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); - - /* block uninterruptibly until available */ - MDP_PPP_DEBUG_MSG("waiting for mdp... \n"); - wait_for_completion_killable(&mdp_ppp_comp); - - /* if MDP PPP engine is still free, - * disable INT_MDP if enabled - */ - spin_lock_irqsave(&mdp_ppp_dq_lock, flags); - if (!test_bit(0, (unsigned long *)&mdp_ppp_busy_flag) && - test_and_clear_bit(0, (unsigned long *)&mdp_ppp_intr_flag)) - mdp_disable_irq(MDP_PPP_TERM); - } - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); - - /* flush remaining dirty djobs, if any */ - mdp_ppp_flush_dirty_djobs(&cond); -} - -/* Program MDP PPP block to process this ROI */ -static void mdp_ppp_process_roi(struct list_head *roi_cmd_list) -{ - - /* program PPP engine with registered ROI commands */ - struct mdp_ppp_roi_cmd_set *node; - list_for_each_entry(node, roi_cmd_list, node) { - int i = 0; - for (; i < node->ncmds; i++) { - MDP_PPP_DEBUG_MSG("%d: reg: 0x%x val: 0x%x \n", - i, node->cmd[i].reg, node->cmd[i].val); - outpdw(node->cmd[i].reg, node->cmd[i].val); - } - } - - /* kickoff MDP PPP engine */ - MDP_PPP_DEBUG_MSG("kicking off mdp \n"); - outpdw(MDP_BASE + 0x30, 0x1000); -} - -/* Submit this display job to MDP PPP engine */ -static void mdp_ppp_dispatch_djob(struct mdp_ppp_djob *job) -{ - /* enable INT_MDP if disabled */ - if (!test_and_set_bit(0, (unsigned long *)&mdp_ppp_intr_flag)) - mdp_enable_irq(MDP_PPP_TERM); - - /* turn on PPP and CMD blocks */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - mdp_pipe_ctrl(MDP_PPP_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - /* process this ROI */ - mdp_ppp_process_roi(&job->roi_cmd_list); -} - -/* Enqueue this display job to be cleaned up later in "mdp_ppp_djob_done" */ -static inline void mdp_ppp_enqueue_djob(struct mdp_ppp_djob *job) -{ - unsigned long flags; - - spin_lock_irqsave(&mdp_ppp_dq_lock, flags); - list_add_tail(&job->entry, &mdp_ppp_dq); - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); -} - -/* First enqueue display job for cleanup and dispatch immediately - * if MDP PPP engine is free */ -void mdp_ppp_process_curr_djob(void) -{ - /* enqueue djob */ - mdp_ppp_enqueue_djob(curr_djob); - - /* dispatch now if MDP PPP engine is free */ - if (!test_and_set_bit(0, (unsigned long *)&mdp_ppp_busy_flag)) - mdp_ppp_dispatch_djob(curr_djob); - - /* done with the current djob */ - curr_djob = NULL; -} - -/* Called from mdp_isr - cleanup finished job and start with next - * if available else set MDP PPP engine free */ -void mdp_ppp_djob_done(void) -{ - struct mdp_ppp_djob *curr, *next; - unsigned long flags; - - /* dequeue current */ - spin_lock_irqsave(&mdp_ppp_dq_lock, flags); - curr = list_entry(mdp_ppp_dq.next, struct mdp_ppp_djob, entry); - list_del_init(&curr->entry); - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); - - /* cleanup current - enqueue in the djob clnr queue */ - spin_lock_irqsave(&mdp_ppp_djob_clnrq_lock, flags); - list_add_tail(&curr->entry, &mdp_ppp_djob_clnrq); - spin_unlock_irqrestore(&mdp_ppp_djob_clnrq_lock, flags); - - /* grab next pending */ - spin_lock_irqsave(&mdp_ppp_dq_lock, flags); - if (!list_empty(&mdp_ppp_dq)) { - next = list_entry(mdp_ppp_dq.next, struct mdp_ppp_djob, - entry); - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); - - /* process next in the queue */ - mdp_ppp_process_roi(&next->roi_cmd_list); - } else { - /* no pending display job */ - spin_unlock_irqrestore(&mdp_ppp_dq_lock, flags); - - /* turn off PPP and CMD blocks - "in_isr" is TRUE */ - mdp_pipe_ctrl(MDP_PPP_BLOCK, MDP_BLOCK_POWER_OFF, TRUE); - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, TRUE); - - /* notify if waiting */ - if (test_and_clear_bit(0, (unsigned long *)&mdp_ppp_waiting)) - complete(&mdp_ppp_comp); - - /* set free */ - test_and_clear_bit(0, (unsigned long *)&mdp_ppp_busy_flag); - } -} diff --git a/drivers/staging/msm/mdp_ppp_dq.h b/drivers/staging/msm/mdp_ppp_dq.h deleted file mode 100644 index 759abc2..0000000 --- a/drivers/staging/msm/mdp_ppp_dq.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MDP_PPP_DQ_H -#define MDP_PPP_DQ_H - -#include "msm_fb_def.h" - -#define MDP_PPP_DEBUG_MSG MSM_FB_DEBUG - -/* The maximum number of pairs in an mdp_ppp_roi_cmd_set structure (a - * node) - */ -#define MDP_PPP_ROI_NODE_SIZE 32 - -/* ROI config command ( pair) for MDP PPP block */ -struct mdp_ppp_roi_cmd { - uint32_t reg; - uint32_t val; -}; - -/* ROI config commands for MDP PPP block are stored in a list of - * mdp_ppp_roi_cmd_set structures (nodes). - */ -struct mdp_ppp_roi_cmd_set { - struct list_head node; - uint32_t ncmds; /* number of commands in this set (node). */ - struct mdp_ppp_roi_cmd cmd[MDP_PPP_ROI_NODE_SIZE]; -}; - -/* MDP PPP Display Job (DJob) */ -struct mdp_ppp_djob { - struct list_head entry; - /* One ROI per MDP PPP DJob */ - struct list_head roi_cmd_list; - struct mdp_blit_req req; - struct fb_info *info; - struct delayed_work cleaner; - struct file *p_src_file, *p_dst_file; -}; - -extern struct completion mdp_ppp_comp; -extern boolean mdp_ppp_waiting; -extern unsigned long mdp_timer_duration; - -unsigned int mdp_ppp_async_op_get(void); -void mdp_ppp_async_op_set(unsigned int flag); -void msm_fb_ensure_mem_coherency_after_dma(struct fb_info *info, - struct mdp_blit_req *req_list, int req_list_count); -void mdp_ppp_put_img(struct file *p_src_file, struct file *p_dst_file); -void mdp_ppp_dq_init(void); -void mdp_ppp_outdw(uint32_t addr, uint32_t data); -struct mdp_ppp_djob *mdp_ppp_new_djob(void); -void mdp_ppp_clear_curr_djob(void); -void mdp_ppp_process_curr_djob(void); -int mdp_ppp_get_ret_code(void); -void mdp_ppp_djob_done(void); -void mdp_ppp_wait(void); - -#endif /* MDP_PPP_DQ_H */ diff --git a/drivers/staging/msm/mdp_ppp_v20.c b/drivers/staging/msm/mdp_ppp_v20.c deleted file mode 100644 index 3bc02a1..0000000 --- a/drivers/staging/msm/mdp_ppp_v20.c +++ /dev/null @@ -1,2486 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" - -static MDP_SCALE_MODE mdp_curr_up_scale_xy; -static MDP_SCALE_MODE mdp_curr_down_scale_x; -static MDP_SCALE_MODE mdp_curr_down_scale_y; - -static long long mdp_do_div(long long num, long long den) -{ - do_div(num, den); - return num; -} - -struct mdp_table_entry mdp_gaussian_blur_table[] = { - /* max variance */ - { 0x5fffc, 0x20000080 }, - { 0x50280, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50284, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50288, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5028c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50290, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50294, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50298, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5029c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502a0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502a4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502a8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502ac, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502b0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502b4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502b8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502bc, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502c0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502c4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502c8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502cc, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502d0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502d4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502d8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502dc, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502e0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502e4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502e8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502ec, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502f0, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502f4, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502f8, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x502fc, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50300, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50304, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50308, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5030c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50310, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50314, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50318, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5031c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50320, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50324, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50328, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5032c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50330, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50334, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50338, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5033c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50340, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50344, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50348, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5034c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50350, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50354, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50358, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5035c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50360, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50364, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50368, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5036c, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50370, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50374, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x50378, 0x20000080 }, - { 0x5fffc, 0x20000080 }, - { 0x5037c, 0x20000080 }, -}; - -static void load_scale_table( - struct mdp_table_entry *table, int len) -{ - int i; - for (i = 0; i < len; i++) - MDP_OUTP(MDP_BASE + table[i].reg, table[i].val); -} - -static void mdp_load_pr_upscale_table(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50200, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50204, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50208, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5020c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50210, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50214, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50218, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5021c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50220, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50224, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50228, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5022c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50230, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50234, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50238, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5023c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50240, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50244, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50248, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5024c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50250, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50254, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50258, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5025c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50260, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50264, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50268, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5026c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50270, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50274, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50278, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5027c, 0x0); -} - -static void mdp_load_pr_downscale_table_x_point2TOpoint4(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50280, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50284, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50288, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5028c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50290, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50294, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50298, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5029c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502ac, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502bc, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502cc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502dc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502ec, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502fc, 0x0); -} - -static void mdp_load_pr_downscale_table_y_point2TOpoint4(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50300, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50304, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50308, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5030c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50310, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50314, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50318, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5031c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50320, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50324, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50328, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5032c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50330, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50334, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50338, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5033c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50340, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50344, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50348, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5034c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50350, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50354, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50358, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5035c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50360, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50364, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50368, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5036c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50370, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50374, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50378, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5037c, 0x0); -} - -static void mdp_load_pr_downscale_table_x_point4TOpoint6(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50280, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50284, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50288, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5028c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50290, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50294, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50298, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5029c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502ac, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502bc, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502cc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502dc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502ec, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502fc, 0x0); -} - -static void mdp_load_pr_downscale_table_y_point4TOpoint6(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50300, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50304, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50308, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5030c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50310, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50314, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50318, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5031c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50320, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50324, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50328, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5032c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50330, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50334, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50338, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5033c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50340, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50344, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50348, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5034c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50350, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50354, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50358, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5035c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50360, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50364, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50368, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5036c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50370, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50374, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50378, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5037c, 0x0); -} - -static void mdp_load_pr_downscale_table_x_point6TOpoint8(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50280, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50284, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50288, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5028c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50290, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50294, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50298, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5029c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502ac, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502bc, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502cc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502dc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502ec, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502fc, 0x0); -} - -static void mdp_load_pr_downscale_table_y_point6TOpoint8(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50300, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50304, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50308, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5030c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50310, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50314, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50318, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5031c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50320, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50324, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50328, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5032c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50330, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50334, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50338, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5033c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50340, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50344, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50348, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5034c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50350, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50354, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50358, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5035c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50360, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50364, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50368, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5036c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50370, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50374, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50378, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5037c, 0x0); -} - -static void mdp_load_pr_downscale_table_x_point8TO1(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50280, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50284, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50288, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5028c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50290, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50294, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50298, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5029c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502a8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502ac, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b0, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b4, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502b8, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x502bc, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502c8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502cc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502d8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502dc, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502e8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502ec, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f0, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f4, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502f8, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x502fc, 0x0); -} - -static void mdp_load_pr_downscale_table_y_point8TO1(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50300, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50304, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50308, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5030c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50310, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50314, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50318, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5031c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50320, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50324, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50328, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5032c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50330, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50334, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50338, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x5033c, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50340, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50344, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50348, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5034c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50350, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50354, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50358, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5035c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50360, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50364, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50368, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5036c, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50370, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50374, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x50378, 0x0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ff); - MDP_OUTP(MDP_BASE + 0x5037c, 0x0); -} - -static void mdp_load_bc_upscale_table(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50200, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff80000d); - MDP_OUTP(MDP_BASE + 0x50204, 0x7ec003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfec0001c); - MDP_OUTP(MDP_BASE + 0x50208, 0x7d4003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe40002b); - MDP_OUTP(MDP_BASE + 0x5020c, 0x7b8003ed); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfd80003c); - MDP_OUTP(MDP_BASE + 0x50210, 0x794003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc0004d); - MDP_OUTP(MDP_BASE + 0x50214, 0x76c003e4); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfc40005f); - MDP_OUTP(MDP_BASE + 0x50218, 0x73c003e0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb800071); - MDP_OUTP(MDP_BASE + 0x5021c, 0x708003de); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfac00085); - MDP_OUTP(MDP_BASE + 0x50220, 0x6d0003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa000098); - MDP_OUTP(MDP_BASE + 0x50224, 0x698003d9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf98000ac); - MDP_OUTP(MDP_BASE + 0x50228, 0x654003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf8c000c1); - MDP_OUTP(MDP_BASE + 0x5022c, 0x610003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf84000d5); - MDP_OUTP(MDP_BASE + 0x50230, 0x5c8003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf7c000e9); - MDP_OUTP(MDP_BASE + 0x50234, 0x580003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf74000fd); - MDP_OUTP(MDP_BASE + 0x50238, 0x534003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c00112); - MDP_OUTP(MDP_BASE + 0x5023c, 0x4e8003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6800126); - MDP_OUTP(MDP_BASE + 0x50240, 0x494003da); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600013a); - MDP_OUTP(MDP_BASE + 0x50244, 0x448003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600014d); - MDP_OUTP(MDP_BASE + 0x50248, 0x3f4003dd); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00160); - MDP_OUTP(MDP_BASE + 0x5024c, 0x3a4003df); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00172); - MDP_OUTP(MDP_BASE + 0x50250, 0x354003e1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00184); - MDP_OUTP(MDP_BASE + 0x50254, 0x304003e3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6000195); - MDP_OUTP(MDP_BASE + 0x50258, 0x2b0003e6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf64001a6); - MDP_OUTP(MDP_BASE + 0x5025c, 0x260003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c001b4); - MDP_OUTP(MDP_BASE + 0x50260, 0x214003eb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf78001c2); - MDP_OUTP(MDP_BASE + 0x50264, 0x1c4003ee); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf80001cf); - MDP_OUTP(MDP_BASE + 0x50268, 0x17c003f1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf90001db); - MDP_OUTP(MDP_BASE + 0x5026c, 0x134003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa0001e5); - MDP_OUTP(MDP_BASE + 0x50270, 0xf0003f6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb4001ee); - MDP_OUTP(MDP_BASE + 0x50274, 0xac003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc001f5); - MDP_OUTP(MDP_BASE + 0x50278, 0x70003fb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe4001fb); - MDP_OUTP(MDP_BASE + 0x5027c, 0x34003fe); -} - -static void mdp_load_bc_downscale_table_x_point2TOpoint4(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ac00084); - MDP_OUTP(MDP_BASE + 0x50280, 0x23400083); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b000084); - MDP_OUTP(MDP_BASE + 0x50284, 0x23000083); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b400084); - MDP_OUTP(MDP_BASE + 0x50288, 0x23000082); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b400085); - MDP_OUTP(MDP_BASE + 0x5028c, 0x23000081); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b800085); - MDP_OUTP(MDP_BASE + 0x50290, 0x23000080); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1bc00086); - MDP_OUTP(MDP_BASE + 0x50294, 0x22c0007f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c000086); - MDP_OUTP(MDP_BASE + 0x50298, 0x2280007f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c400086); - MDP_OUTP(MDP_BASE + 0x5029c, 0x2280007e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c800086); - MDP_OUTP(MDP_BASE + 0x502a0, 0x2280007d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc00086); - MDP_OUTP(MDP_BASE + 0x502a4, 0x2240007d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc00087); - MDP_OUTP(MDP_BASE + 0x502a8, 0x2240007c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d000087); - MDP_OUTP(MDP_BASE + 0x502ac, 0x2240007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d400087); - MDP_OUTP(MDP_BASE + 0x502b0, 0x2200007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d400088); - MDP_OUTP(MDP_BASE + 0x502b4, 0x22400079); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d800088); - MDP_OUTP(MDP_BASE + 0x502b8, 0x22400078); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc00088); - MDP_OUTP(MDP_BASE + 0x502bc, 0x22400077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc00089); - MDP_OUTP(MDP_BASE + 0x502c0, 0x22000077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1e000089); - MDP_OUTP(MDP_BASE + 0x502c4, 0x22000076); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1e400089); - MDP_OUTP(MDP_BASE + 0x502c8, 0x22000075); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec00088); - MDP_OUTP(MDP_BASE + 0x502cc, 0x21c00075); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec00089); - MDP_OUTP(MDP_BASE + 0x502d0, 0x21c00074); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f000089); - MDP_OUTP(MDP_BASE + 0x502d4, 0x21c00073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f400089); - MDP_OUTP(MDP_BASE + 0x502d8, 0x21800073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f40008a); - MDP_OUTP(MDP_BASE + 0x502dc, 0x21800072); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f80008a); - MDP_OUTP(MDP_BASE + 0x502e0, 0x21800071); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1fc0008a); - MDP_OUTP(MDP_BASE + 0x502e4, 0x21800070); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1fc0008b); - MDP_OUTP(MDP_BASE + 0x502e8, 0x2180006f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2000008c); - MDP_OUTP(MDP_BASE + 0x502ec, 0x2140006e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2040008c); - MDP_OUTP(MDP_BASE + 0x502f0, 0x2140006d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2080008c); - MDP_OUTP(MDP_BASE + 0x502f4, 0x2100006d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x20c0008c); - MDP_OUTP(MDP_BASE + 0x502f8, 0x2100006c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x20c0008d); - MDP_OUTP(MDP_BASE + 0x502fc, 0x2100006b); -} - -static void mdp_load_bc_downscale_table_y_point2TOpoint4(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ac00084); - MDP_OUTP(MDP_BASE + 0x50300, 0x23400083); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b000084); - MDP_OUTP(MDP_BASE + 0x50304, 0x23000083); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b400084); - MDP_OUTP(MDP_BASE + 0x50308, 0x23000082); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b400085); - MDP_OUTP(MDP_BASE + 0x5030c, 0x23000081); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1b800085); - MDP_OUTP(MDP_BASE + 0x50310, 0x23000080); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1bc00086); - MDP_OUTP(MDP_BASE + 0x50314, 0x22c0007f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c000086); - MDP_OUTP(MDP_BASE + 0x50318, 0x2280007f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c400086); - MDP_OUTP(MDP_BASE + 0x5031c, 0x2280007e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1c800086); - MDP_OUTP(MDP_BASE + 0x50320, 0x2280007d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc00086); - MDP_OUTP(MDP_BASE + 0x50324, 0x2240007d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc00087); - MDP_OUTP(MDP_BASE + 0x50328, 0x2240007c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d000087); - MDP_OUTP(MDP_BASE + 0x5032c, 0x2240007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d400087); - MDP_OUTP(MDP_BASE + 0x50330, 0x2200007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d400088); - MDP_OUTP(MDP_BASE + 0x50334, 0x22400079); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1d800088); - MDP_OUTP(MDP_BASE + 0x50338, 0x22400078); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc00088); - MDP_OUTP(MDP_BASE + 0x5033c, 0x22400077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc00089); - MDP_OUTP(MDP_BASE + 0x50340, 0x22000077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1e000089); - MDP_OUTP(MDP_BASE + 0x50344, 0x22000076); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1e400089); - MDP_OUTP(MDP_BASE + 0x50348, 0x22000075); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec00088); - MDP_OUTP(MDP_BASE + 0x5034c, 0x21c00075); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec00089); - MDP_OUTP(MDP_BASE + 0x50350, 0x21c00074); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f000089); - MDP_OUTP(MDP_BASE + 0x50354, 0x21c00073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f400089); - MDP_OUTP(MDP_BASE + 0x50358, 0x21800073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f40008a); - MDP_OUTP(MDP_BASE + 0x5035c, 0x21800072); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1f80008a); - MDP_OUTP(MDP_BASE + 0x50360, 0x21800071); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1fc0008a); - MDP_OUTP(MDP_BASE + 0x50364, 0x21800070); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1fc0008b); - MDP_OUTP(MDP_BASE + 0x50368, 0x2180006f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2000008c); - MDP_OUTP(MDP_BASE + 0x5036c, 0x2140006e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2040008c); - MDP_OUTP(MDP_BASE + 0x50370, 0x2140006d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x2080008c); - MDP_OUTP(MDP_BASE + 0x50374, 0x2100006d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x20c0008c); - MDP_OUTP(MDP_BASE + 0x50378, 0x2100006c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x20c0008d); - MDP_OUTP(MDP_BASE + 0x5037c, 0x2100006b); -} - -static void mdp_load_bc_downscale_table_x_point4TOpoint6(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x740008c); - MDP_OUTP(MDP_BASE + 0x50280, 0x33800088); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x800008e); - MDP_OUTP(MDP_BASE + 0x50284, 0x33400084); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x8400092); - MDP_OUTP(MDP_BASE + 0x50288, 0x33000080); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9000094); - MDP_OUTP(MDP_BASE + 0x5028c, 0x3300007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9c00098); - MDP_OUTP(MDP_BASE + 0x50290, 0x32400077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xa40009b); - MDP_OUTP(MDP_BASE + 0x50294, 0x32000073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xb00009d); - MDP_OUTP(MDP_BASE + 0x50298, 0x31c0006f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xbc000a0); - MDP_OUTP(MDP_BASE + 0x5029c, 0x3140006b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc8000a2); - MDP_OUTP(MDP_BASE + 0x502a0, 0x31000067); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xd8000a5); - MDP_OUTP(MDP_BASE + 0x502a4, 0x30800062); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xe4000a8); - MDP_OUTP(MDP_BASE + 0x502a8, 0x2fc0005f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xec000aa); - MDP_OUTP(MDP_BASE + 0x502ac, 0x2fc0005b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf8000ad); - MDP_OUTP(MDP_BASE + 0x502b0, 0x2f400057); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x108000b0); - MDP_OUTP(MDP_BASE + 0x502b4, 0x2e400054); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x114000b2); - MDP_OUTP(MDP_BASE + 0x502b8, 0x2e000050); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x124000b4); - MDP_OUTP(MDP_BASE + 0x502bc, 0x2d80004c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x130000b6); - MDP_OUTP(MDP_BASE + 0x502c0, 0x2d000049); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x140000b8); - MDP_OUTP(MDP_BASE + 0x502c4, 0x2c800045); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x150000b9); - MDP_OUTP(MDP_BASE + 0x502c8, 0x2c000042); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x15c000bd); - MDP_OUTP(MDP_BASE + 0x502cc, 0x2b40003e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x16c000bf); - MDP_OUTP(MDP_BASE + 0x502d0, 0x2a80003b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x17c000bf); - MDP_OUTP(MDP_BASE + 0x502d4, 0x2a000039); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x188000c2); - MDP_OUTP(MDP_BASE + 0x502d8, 0x29400036); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x19c000c4); - MDP_OUTP(MDP_BASE + 0x502dc, 0x28800032); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ac000c5); - MDP_OUTP(MDP_BASE + 0x502e0, 0x2800002f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1bc000c7); - MDP_OUTP(MDP_BASE + 0x502e4, 0x2740002c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc000c8); - MDP_OUTP(MDP_BASE + 0x502e8, 0x26c00029); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc000c9); - MDP_OUTP(MDP_BASE + 0x502ec, 0x26000027); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec000cc); - MDP_OUTP(MDP_BASE + 0x502f0, 0x25000024); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x200000cc); - MDP_OUTP(MDP_BASE + 0x502f4, 0x24800021); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x210000cd); - MDP_OUTP(MDP_BASE + 0x502f8, 0x23800020); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x220000ce); - MDP_OUTP(MDP_BASE + 0x502fc, 0x2300001d); -} - -static void mdp_load_bc_downscale_table_y_point4TOpoint6(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x740008c); - MDP_OUTP(MDP_BASE + 0x50300, 0x33800088); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x800008e); - MDP_OUTP(MDP_BASE + 0x50304, 0x33400084); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x8400092); - MDP_OUTP(MDP_BASE + 0x50308, 0x33000080); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9000094); - MDP_OUTP(MDP_BASE + 0x5030c, 0x3300007b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9c00098); - MDP_OUTP(MDP_BASE + 0x50310, 0x32400077); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xa40009b); - MDP_OUTP(MDP_BASE + 0x50314, 0x32000073); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xb00009d); - MDP_OUTP(MDP_BASE + 0x50318, 0x31c0006f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xbc000a0); - MDP_OUTP(MDP_BASE + 0x5031c, 0x3140006b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc8000a2); - MDP_OUTP(MDP_BASE + 0x50320, 0x31000067); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xd8000a5); - MDP_OUTP(MDP_BASE + 0x50324, 0x30800062); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xe4000a8); - MDP_OUTP(MDP_BASE + 0x50328, 0x2fc0005f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xec000aa); - MDP_OUTP(MDP_BASE + 0x5032c, 0x2fc0005b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf8000ad); - MDP_OUTP(MDP_BASE + 0x50330, 0x2f400057); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x108000b0); - MDP_OUTP(MDP_BASE + 0x50334, 0x2e400054); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x114000b2); - MDP_OUTP(MDP_BASE + 0x50338, 0x2e000050); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x124000b4); - MDP_OUTP(MDP_BASE + 0x5033c, 0x2d80004c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x130000b6); - MDP_OUTP(MDP_BASE + 0x50340, 0x2d000049); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x140000b8); - MDP_OUTP(MDP_BASE + 0x50344, 0x2c800045); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x150000b9); - MDP_OUTP(MDP_BASE + 0x50348, 0x2c000042); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x15c000bd); - MDP_OUTP(MDP_BASE + 0x5034c, 0x2b40003e); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x16c000bf); - MDP_OUTP(MDP_BASE + 0x50350, 0x2a80003b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x17c000bf); - MDP_OUTP(MDP_BASE + 0x50354, 0x2a000039); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x188000c2); - MDP_OUTP(MDP_BASE + 0x50358, 0x29400036); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x19c000c4); - MDP_OUTP(MDP_BASE + 0x5035c, 0x28800032); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ac000c5); - MDP_OUTP(MDP_BASE + 0x50360, 0x2800002f); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1bc000c7); - MDP_OUTP(MDP_BASE + 0x50364, 0x2740002c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1cc000c8); - MDP_OUTP(MDP_BASE + 0x50368, 0x26c00029); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1dc000c9); - MDP_OUTP(MDP_BASE + 0x5036c, 0x26000027); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1ec000cc); - MDP_OUTP(MDP_BASE + 0x50370, 0x25000024); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x200000cc); - MDP_OUTP(MDP_BASE + 0x50374, 0x24800021); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x210000cd); - MDP_OUTP(MDP_BASE + 0x50378, 0x23800020); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x220000ce); - MDP_OUTP(MDP_BASE + 0x5037c, 0x2300001d); -} - -static void mdp_load_bc_downscale_table_x_point6TOpoint8(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000070); - MDP_OUTP(MDP_BASE + 0x50280, 0x4bc00068); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000078); - MDP_OUTP(MDP_BASE + 0x50284, 0x4bc00060); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000080); - MDP_OUTP(MDP_BASE + 0x50288, 0x4b800059); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000089); - MDP_OUTP(MDP_BASE + 0x5028c, 0x4b000052); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe400091); - MDP_OUTP(MDP_BASE + 0x50290, 0x4a80004b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe40009a); - MDP_OUTP(MDP_BASE + 0x50294, 0x4a000044); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe8000a3); - MDP_OUTP(MDP_BASE + 0x50298, 0x4940003d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfec000ac); - MDP_OUTP(MDP_BASE + 0x5029c, 0x48400037); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff0000b4); - MDP_OUTP(MDP_BASE + 0x502a0, 0x47800031); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff8000bd); - MDP_OUTP(MDP_BASE + 0x502a4, 0x4640002b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc5); - MDP_OUTP(MDP_BASE + 0x502a8, 0x45000026); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x8000ce); - MDP_OUTP(MDP_BASE + 0x502ac, 0x43800021); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x10000d6); - MDP_OUTP(MDP_BASE + 0x502b0, 0x4240001c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x18000df); - MDP_OUTP(MDP_BASE + 0x502b4, 0x40800018); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x24000e6); - MDP_OUTP(MDP_BASE + 0x502b8, 0x3f000014); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x30000ee); - MDP_OUTP(MDP_BASE + 0x502bc, 0x3d400010); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x40000f5); - MDP_OUTP(MDP_BASE + 0x502c0, 0x3b80000c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x50000fc); - MDP_OUTP(MDP_BASE + 0x502c4, 0x39800009); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x6000102); - MDP_OUTP(MDP_BASE + 0x502c8, 0x37c00006); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x7000109); - MDP_OUTP(MDP_BASE + 0x502cc, 0x35800004); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x840010e); - MDP_OUTP(MDP_BASE + 0x502d0, 0x33800002); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9800114); - MDP_OUTP(MDP_BASE + 0x502d4, 0x31400000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xac00119); - MDP_OUTP(MDP_BASE + 0x502d8, 0x2f4003fe); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc40011e); - MDP_OUTP(MDP_BASE + 0x502dc, 0x2d0003fc); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xdc00121); - MDP_OUTP(MDP_BASE + 0x502e0, 0x2b0003fb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf400125); - MDP_OUTP(MDP_BASE + 0x502e4, 0x28c003fa); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x11000128); - MDP_OUTP(MDP_BASE + 0x502e8, 0x268003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x12c0012a); - MDP_OUTP(MDP_BASE + 0x502ec, 0x244003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1480012c); - MDP_OUTP(MDP_BASE + 0x502f0, 0x224003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1640012e); - MDP_OUTP(MDP_BASE + 0x502f4, 0x200003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1800012f); - MDP_OUTP(MDP_BASE + 0x502f8, 0x1e0003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1a00012f); - MDP_OUTP(MDP_BASE + 0x502fc, 0x1c0003f8); -} - -static void mdp_load_bc_downscale_table_y_point6TOpoint8(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000070); - MDP_OUTP(MDP_BASE + 0x50300, 0x4bc00068); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000078); - MDP_OUTP(MDP_BASE + 0x50304, 0x4bc00060); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000080); - MDP_OUTP(MDP_BASE + 0x50308, 0x4b800059); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe000089); - MDP_OUTP(MDP_BASE + 0x5030c, 0x4b000052); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe400091); - MDP_OUTP(MDP_BASE + 0x50310, 0x4a80004b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe40009a); - MDP_OUTP(MDP_BASE + 0x50314, 0x4a000044); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe8000a3); - MDP_OUTP(MDP_BASE + 0x50318, 0x4940003d); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfec000ac); - MDP_OUTP(MDP_BASE + 0x5031c, 0x48400037); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff0000b4); - MDP_OUTP(MDP_BASE + 0x50320, 0x47800031); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff8000bd); - MDP_OUTP(MDP_BASE + 0x50324, 0x4640002b); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc5); - MDP_OUTP(MDP_BASE + 0x50328, 0x45000026); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x8000ce); - MDP_OUTP(MDP_BASE + 0x5032c, 0x43800021); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x10000d6); - MDP_OUTP(MDP_BASE + 0x50330, 0x4240001c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x18000df); - MDP_OUTP(MDP_BASE + 0x50334, 0x40800018); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x24000e6); - MDP_OUTP(MDP_BASE + 0x50338, 0x3f000014); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x30000ee); - MDP_OUTP(MDP_BASE + 0x5033c, 0x3d400010); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x40000f5); - MDP_OUTP(MDP_BASE + 0x50340, 0x3b80000c); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x50000fc); - MDP_OUTP(MDP_BASE + 0x50344, 0x39800009); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x6000102); - MDP_OUTP(MDP_BASE + 0x50348, 0x37c00006); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x7000109); - MDP_OUTP(MDP_BASE + 0x5034c, 0x35800004); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x840010e); - MDP_OUTP(MDP_BASE + 0x50350, 0x33800002); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x9800114); - MDP_OUTP(MDP_BASE + 0x50354, 0x31400000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xac00119); - MDP_OUTP(MDP_BASE + 0x50358, 0x2f4003fe); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xc40011e); - MDP_OUTP(MDP_BASE + 0x5035c, 0x2d0003fc); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xdc00121); - MDP_OUTP(MDP_BASE + 0x50360, 0x2b0003fb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf400125); - MDP_OUTP(MDP_BASE + 0x50364, 0x28c003fa); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x11000128); - MDP_OUTP(MDP_BASE + 0x50368, 0x268003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x12c0012a); - MDP_OUTP(MDP_BASE + 0x5036c, 0x244003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1480012c); - MDP_OUTP(MDP_BASE + 0x50370, 0x224003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1640012e); - MDP_OUTP(MDP_BASE + 0x50374, 0x200003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1800012f); - MDP_OUTP(MDP_BASE + 0x50378, 0x1e0003f8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0x1a00012f); - MDP_OUTP(MDP_BASE + 0x5037c, 0x1c0003f8); -} - -static void mdp_load_bc_downscale_table_x_point8TO1(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50280, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff80000d); - MDP_OUTP(MDP_BASE + 0x50284, 0x7ec003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfec0001c); - MDP_OUTP(MDP_BASE + 0x50288, 0x7d4003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe40002b); - MDP_OUTP(MDP_BASE + 0x5028c, 0x7b8003ed); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfd80003c); - MDP_OUTP(MDP_BASE + 0x50290, 0x794003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc0004d); - MDP_OUTP(MDP_BASE + 0x50294, 0x76c003e4); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfc40005f); - MDP_OUTP(MDP_BASE + 0x50298, 0x73c003e0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb800071); - MDP_OUTP(MDP_BASE + 0x5029c, 0x708003de); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfac00085); - MDP_OUTP(MDP_BASE + 0x502a0, 0x6d0003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa000098); - MDP_OUTP(MDP_BASE + 0x502a4, 0x698003d9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf98000ac); - MDP_OUTP(MDP_BASE + 0x502a8, 0x654003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf8c000c1); - MDP_OUTP(MDP_BASE + 0x502ac, 0x610003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf84000d5); - MDP_OUTP(MDP_BASE + 0x502b0, 0x5c8003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf7c000e9); - MDP_OUTP(MDP_BASE + 0x502b4, 0x580003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf74000fd); - MDP_OUTP(MDP_BASE + 0x502b8, 0x534003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c00112); - MDP_OUTP(MDP_BASE + 0x502bc, 0x4e8003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6800126); - MDP_OUTP(MDP_BASE + 0x502c0, 0x494003da); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600013a); - MDP_OUTP(MDP_BASE + 0x502c4, 0x448003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600014d); - MDP_OUTP(MDP_BASE + 0x502c8, 0x3f4003dd); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00160); - MDP_OUTP(MDP_BASE + 0x502cc, 0x3a4003df); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00172); - MDP_OUTP(MDP_BASE + 0x502d0, 0x354003e1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00184); - MDP_OUTP(MDP_BASE + 0x502d4, 0x304003e3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6000195); - MDP_OUTP(MDP_BASE + 0x502d8, 0x2b0003e6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf64001a6); - MDP_OUTP(MDP_BASE + 0x502dc, 0x260003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c001b4); - MDP_OUTP(MDP_BASE + 0x502e0, 0x214003eb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf78001c2); - MDP_OUTP(MDP_BASE + 0x502e4, 0x1c4003ee); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf80001cf); - MDP_OUTP(MDP_BASE + 0x502e8, 0x17c003f1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf90001db); - MDP_OUTP(MDP_BASE + 0x502ec, 0x134003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa0001e5); - MDP_OUTP(MDP_BASE + 0x502f0, 0xf0003f6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb4001ee); - MDP_OUTP(MDP_BASE + 0x502f4, 0xac003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc001f5); - MDP_OUTP(MDP_BASE + 0x502f8, 0x70003fb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe4001fb); - MDP_OUTP(MDP_BASE + 0x502fc, 0x34003fe); -} - -static void mdp_load_bc_downscale_table_y_point8TO1(void) -{ - MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); - MDP_OUTP(MDP_BASE + 0x50300, 0x7fc00000); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xff80000d); - MDP_OUTP(MDP_BASE + 0x50304, 0x7ec003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfec0001c); - MDP_OUTP(MDP_BASE + 0x50308, 0x7d4003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe40002b); - MDP_OUTP(MDP_BASE + 0x5030c, 0x7b8003ed); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfd80003c); - MDP_OUTP(MDP_BASE + 0x50310, 0x794003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc0004d); - MDP_OUTP(MDP_BASE + 0x50314, 0x76c003e4); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfc40005f); - MDP_OUTP(MDP_BASE + 0x50318, 0x73c003e0); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb800071); - MDP_OUTP(MDP_BASE + 0x5031c, 0x708003de); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfac00085); - MDP_OUTP(MDP_BASE + 0x50320, 0x6d0003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa000098); - MDP_OUTP(MDP_BASE + 0x50324, 0x698003d9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf98000ac); - MDP_OUTP(MDP_BASE + 0x50328, 0x654003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf8c000c1); - MDP_OUTP(MDP_BASE + 0x5032c, 0x610003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf84000d5); - MDP_OUTP(MDP_BASE + 0x50330, 0x5c8003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf7c000e9); - MDP_OUTP(MDP_BASE + 0x50334, 0x580003d7); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf74000fd); - MDP_OUTP(MDP_BASE + 0x50338, 0x534003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c00112); - MDP_OUTP(MDP_BASE + 0x5033c, 0x4e8003d8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6800126); - MDP_OUTP(MDP_BASE + 0x50340, 0x494003da); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600013a); - MDP_OUTP(MDP_BASE + 0x50344, 0x448003db); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf600014d); - MDP_OUTP(MDP_BASE + 0x50348, 0x3f4003dd); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00160); - MDP_OUTP(MDP_BASE + 0x5034c, 0x3a4003df); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00172); - MDP_OUTP(MDP_BASE + 0x50350, 0x354003e1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf5c00184); - MDP_OUTP(MDP_BASE + 0x50354, 0x304003e3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6000195); - MDP_OUTP(MDP_BASE + 0x50358, 0x2b0003e6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf64001a6); - MDP_OUTP(MDP_BASE + 0x5035c, 0x260003e8); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf6c001b4); - MDP_OUTP(MDP_BASE + 0x50360, 0x214003eb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf78001c2); - MDP_OUTP(MDP_BASE + 0x50364, 0x1c4003ee); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf80001cf); - MDP_OUTP(MDP_BASE + 0x50368, 0x17c003f1); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xf90001db); - MDP_OUTP(MDP_BASE + 0x5036c, 0x134003f3); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfa0001e5); - MDP_OUTP(MDP_BASE + 0x50370, 0xf0003f6); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfb4001ee); - MDP_OUTP(MDP_BASE + 0x50374, 0xac003f9); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfcc001f5); - MDP_OUTP(MDP_BASE + 0x50378, 0x70003fb); - MDP_OUTP(MDP_BASE + 0x5fffc, 0xfe4001fb); - MDP_OUTP(MDP_BASE + 0x5037c, 0x34003fe); -} - -static int mdp_get_edge_cond(MDPIBUF *iBuf, uint32 *dup, uint32 *dup2) -{ - uint32 reg; - uint32 dst_roi_width; /* Dimensions of DST ROI. */ - uint32 dst_roi_height; /* Used to calculate scaling ratios. */ - - /* - * positions of the luma pixel(relative to the image ) required for - * scaling the ROI - */ - int32 luma_interp_point_left = 0; /* left-most luma pixel needed */ - int32 luma_interp_point_right = 0; /* right-most luma pixel needed */ - int32 luma_interp_point_top = 0; /* top-most luma pixel needed */ - int32 luma_interp_point_bottom = 0; /* bottom-most luma pixel needed */ - - /* - * positions of the chroma pixel(relative to the image ) required for - * interpolating a chroma value at all required luma positions - */ - /* left-most chroma pixel needed */ - int32 chroma_interp_point_left = 0; - /* right-most chroma pixel needed */ - int32 chroma_interp_point_right = 0; - /* top-most chroma pixel needed */ - int32 chroma_interp_point_top = 0; - /* bottom-most chroma pixel needed */ - int32 chroma_interp_point_bottom = 0; - - /* - * a rectangular region within the chroma plane of the "image". - * Chroma pixels falling inside of this rectangle belongs to the ROI - */ - int32 chroma_bound_left = 0; - int32 chroma_bound_right = 0; - int32 chroma_bound_top = 0; - int32 chroma_bound_bottom = 0; - - /* - * number of chroma pixels to replicate on the left, right, - * top and bottom edge of the ROI. - */ - int32 chroma_repeat_left = 0; - int32 chroma_repeat_right = 0; - int32 chroma_repeat_top = 0; - int32 chroma_repeat_bottom = 0; - - /* - * number of luma pixels to replicate on the left, right, - * top and bottom edge of the ROI. - */ - int32 luma_repeat_left = 0; - int32 luma_repeat_right = 0; - int32 luma_repeat_top = 0; - int32 luma_repeat_bottom = 0; - - boolean chroma_edge_enable; - - uint32 _is_scale_enabled = 0; - uint32 _is_yuv_offsite_vertical = 0; - - /* fg edge duplicate */ - reg = 0x0; - - if (iBuf->mdpImg.mdpOp & MDPOP_ASCALE) { /* if scaling enabled */ - - _is_scale_enabled = 1; - - /* - * if rotation mode involves a 90 deg rotation, flip - * dst_roi_width with dst_roi_height. - * Scaling ratios is based on source ROI dimensions, and - * dst ROI dimensions before rotation. - */ - if (iBuf->mdpImg.mdpOp & MDPOP_ROT90) { - dst_roi_width = iBuf->roi.dst_height; - dst_roi_height = iBuf->roi.dst_width; - } else { - dst_roi_width = iBuf->roi.dst_width; - dst_roi_height = iBuf->roi.dst_height; - } - - /* - * Find out the luma pixels needed for scaling in the - * x direction (LEFT and RIGHT). Locations of pixels are - * relative to the ROI. Upper-left corner of ROI corresponds - * to coordinates (0,0). Also set the number of luma pixel - * to repeat. - */ - if (iBuf->roi.width > 3 * dst_roi_width) { - /* scale factor < 1/3 */ - luma_interp_point_left = 0; - luma_interp_point_right = (iBuf->roi.width - 1); - luma_repeat_left = 0; - luma_repeat_right = 0; - } else if (iBuf->roi.width == 3 * dst_roi_width) { - /* scale factor == 1/3 */ - luma_interp_point_left = 0; - luma_interp_point_right = (iBuf->roi.width - 1) + 1; - luma_repeat_left = 0; - luma_repeat_right = 1; - } else if ((iBuf->roi.width > dst_roi_width) && - (iBuf->roi.width < 3 * dst_roi_width)) { - /* 1/3 < scale factor < 1 */ - luma_interp_point_left = -1; - luma_interp_point_right = (iBuf->roi.width - 1) + 1; - luma_repeat_left = 1; - luma_repeat_right = 1; - } - - else if (iBuf->roi.width == dst_roi_width) { - /* scale factor == 1 */ - luma_interp_point_left = -1; - luma_interp_point_right = (iBuf->roi.width - 1) + 2; - luma_repeat_left = 1; - luma_repeat_right = 2; - } else { /* (iBuf->roi.width < dst_roi_width) */ - /* scale factor > 1 */ - luma_interp_point_left = -2; - luma_interp_point_right = (iBuf->roi.width - 1) + 2; - luma_repeat_left = 2; - luma_repeat_right = 2; - } - - /* - * Find out the number of pixels needed for scaling in the - * y direction (TOP and BOTTOM). Locations of pixels are - * relative to the ROI. Upper-left corner of ROI corresponds - * to coordinates (0,0). Also set the number of luma pixel - * to repeat. - */ - if (iBuf->roi.height > 3 * dst_roi_height) { - /* scale factor < 1/3 */ - luma_interp_point_top = 0; - luma_interp_point_bottom = (iBuf->roi.height - 1); - luma_repeat_top = 0; - luma_repeat_bottom = 0; - } else if (iBuf->roi.height == 3 * dst_roi_height) { - /* scale factor == 1/3 */ - luma_interp_point_top = 0; - luma_interp_point_bottom = (iBuf->roi.height - 1) + 1; - luma_repeat_top = 0; - luma_repeat_bottom = 1; - } else if ((iBuf->roi.height > dst_roi_height) && - (iBuf->roi.height < 3 * dst_roi_height)) { - /* 1/3 < scale factor < 1 */ - luma_interp_point_top = -1; - luma_interp_point_bottom = (iBuf->roi.height - 1) + 1; - luma_repeat_top = 1; - luma_repeat_bottom = 1; - } else if (iBuf->roi.height == dst_roi_height) { - /* scale factor == 1 */ - luma_interp_point_top = -1; - luma_interp_point_bottom = (iBuf->roi.height - 1) + 2; - luma_repeat_top = 1; - luma_repeat_bottom = 2; - } else { /* (iBuf->roi.height < dst_roi_height) */ - /* scale factor > 1 */ - luma_interp_point_top = -2; - luma_interp_point_bottom = (iBuf->roi.height - 1) + 2; - luma_repeat_top = 2; - luma_repeat_bottom = 2; - } - } /* if (iBuf->scale.scale_flag) */ - else { /* scaling disabled */ - /* - * Since no scaling needed, Tile Fetch does not require any - * more luma pixel than what the ROI contains. - */ - luma_interp_point_left = (int32) 0; - luma_interp_point_right = (int32) (iBuf->roi.width - 1); - luma_interp_point_top = (int32) 0; - luma_interp_point_bottom = (int32) (iBuf->roi.height - 1); - - luma_repeat_left = 0; - luma_repeat_right = 0; - luma_repeat_top = 0; - luma_repeat_bottom = 0; - } - - /* After adding the ROI offsets, we have locations of - * luma_interp_points relative to the image. - */ - luma_interp_point_left += (int32) (iBuf->roi.x); - luma_interp_point_right += (int32) (iBuf->roi.x); - luma_interp_point_top += (int32) (iBuf->roi.y); - luma_interp_point_bottom += (int32) (iBuf->roi.y); - - /* - * After adding the ROI offsets, we have locations of - * chroma_interp_points relative to the image. - */ - chroma_interp_point_left = luma_interp_point_left; - chroma_interp_point_right = luma_interp_point_right; - chroma_interp_point_top = luma_interp_point_top; - chroma_interp_point_bottom = luma_interp_point_bottom; - - chroma_edge_enable = TRUE; - /* find out which chroma pixels are needed for chroma upsampling. */ - switch (iBuf->mdpImg.imgType) { - /* - * cosite in horizontal axis - * fully sampled in vertical axis - */ - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - case MDP_YCRYCB_H2V1: - /* floor( luma_interp_point_left / 2 ); */ - chroma_interp_point_left = luma_interp_point_left >> 1; - /* floor( ( luma_interp_point_right + 1 ) / 2 ); */ - chroma_interp_point_right = (luma_interp_point_right + 1) >> 1; - - chroma_interp_point_top = luma_interp_point_top; - chroma_interp_point_bottom = luma_interp_point_bottom; - break; - - /* - * cosite in horizontal axis - * offsite in vertical axis - */ - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - /* floor( luma_interp_point_left / 2) */ - chroma_interp_point_left = luma_interp_point_left >> 1; - - /* floor( ( luma_interp_point_right + 1 )/ 2 ) */ - chroma_interp_point_right = (luma_interp_point_right + 1) >> 1; - - /* floor( (luma_interp_point_top - 1 ) / 2 ) */ - chroma_interp_point_top = (luma_interp_point_top - 1) >> 1; - - /* floor( ( luma_interp_point_bottom + 1 ) / 2 ) */ - chroma_interp_point_bottom = - (luma_interp_point_bottom + 1) >> 1; - - _is_yuv_offsite_vertical = 1; - break; - - default: - chroma_edge_enable = FALSE; - chroma_interp_point_left = luma_interp_point_left; - chroma_interp_point_right = luma_interp_point_right; - chroma_interp_point_top = luma_interp_point_top; - chroma_interp_point_bottom = luma_interp_point_bottom; - - break; - } - - /* only if the image type is in YUV domain, we calculate chroma edge */ - if (chroma_edge_enable) { - /* Defines which chroma pixels belongs to the roi */ - switch (iBuf->mdpImg.imgType) { - /* - * Cosite in horizontal direction, and fully sampled - * in vertical direction. - */ - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - case MDP_YCRYCB_H2V1: - /* - * width of chroma ROI is 1/2 of size of luma ROI - * height of chroma ROI same as size of luma ROI - */ - chroma_bound_left = iBuf->roi.x / 2; - - /* there are half as many chroma pixel as luma pixels */ - chroma_bound_right = - (iBuf->roi.width + iBuf->roi.x - 1) / 2; - chroma_bound_top = iBuf->roi.y; - chroma_bound_bottom = - (iBuf->roi.height + iBuf->roi.y - 1); - break; - - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - /* - * cosite in horizontal dir, and offsite in vertical dir - * width of chroma ROI is 1/2 of size of luma ROI - * height of chroma ROI is 1/2 of size of luma ROI - */ - - chroma_bound_left = iBuf->roi.x / 2; - chroma_bound_right = - (iBuf->roi.width + iBuf->roi.x - 1) / 2; - chroma_bound_top = iBuf->roi.y / 2; - chroma_bound_bottom = - (iBuf->roi.height + iBuf->roi.y - 1) / 2; - break; - - default: - /* - * If no valid chroma sub-sampling format specified, - * assume 4:4:4 ( i.e. fully sampled). Set ROI - * boundaries for chroma same as ROI boundaries for - * luma. - */ - chroma_bound_left = iBuf->roi.x; - chroma_bound_right = iBuf->roi.width + iBuf->roi.x - 1; - chroma_bound_top = iBuf->roi.y; - chroma_bound_bottom = - (iBuf->roi.height + iBuf->roi.y - 1); - break; - } - - /* - * Knowing which chroma pixels are needed, and which chroma - * pixels belong to the ROI (i.e. available for fetching ), - * calculate how many chroma pixels Tile Fetch needs to - * duplicate. If any required chroma pixels falls outside - * of the ROI, Tile Fetch must obtain them by replicating - * pixels. - */ - if (chroma_bound_left > chroma_interp_point_left) - chroma_repeat_left = - chroma_bound_left - chroma_interp_point_left; - else - chroma_repeat_left = 0; - - if (chroma_interp_point_right > chroma_bound_right) - chroma_repeat_right = - chroma_interp_point_right - chroma_bound_right; - else - chroma_repeat_right = 0; - - if (chroma_bound_top > chroma_interp_point_top) - chroma_repeat_top = - chroma_bound_top - chroma_interp_point_top; - else - chroma_repeat_top = 0; - - if (chroma_interp_point_bottom > chroma_bound_bottom) - chroma_repeat_bottom = - chroma_interp_point_bottom - chroma_bound_bottom; - else - chroma_repeat_bottom = 0; - - if (_is_scale_enabled && (iBuf->roi.height == 1) - && _is_yuv_offsite_vertical) { - chroma_repeat_bottom = 3; - chroma_repeat_top = 0; - } - } - /* make sure chroma repeats are non-negative */ - if ((chroma_repeat_left < 0) || (chroma_repeat_right < 0) || - (chroma_repeat_top < 0) || (chroma_repeat_bottom < 0)) - return -1; - - /* make sure chroma repeats are no larger than 3 pixels */ - if ((chroma_repeat_left > 3) || (chroma_repeat_right > 3) || - (chroma_repeat_top > 3) || (chroma_repeat_bottom > 3)) - return -1; - - /* make sure luma repeats are non-negative */ - if ((luma_repeat_left < 0) || (luma_repeat_right < 0) || - (luma_repeat_top < 0) || (luma_repeat_bottom < 0)) - return -1; - - /* make sure luma repeats are no larger than 3 pixels */ - if ((luma_repeat_left > 3) || (luma_repeat_right > 3) || - (luma_repeat_top > 3) || (luma_repeat_bottom > 3)) - return -1; - - /* write chroma_repeat_left to register */ - reg |= (chroma_repeat_left & 3) << MDP_LEFT_CHROMA; - - /* write chroma_repeat_right to register */ - reg |= (chroma_repeat_right & 3) << MDP_RIGHT_CHROMA; - - /* write chroma_repeat_top to register */ - reg |= (chroma_repeat_top & 3) << MDP_TOP_CHROMA; - - /* write chroma_repeat_bottom to register */ - reg |= (chroma_repeat_bottom & 3) << MDP_BOTTOM_CHROMA; - - /* write luma_repeat_left to register */ - reg |= (luma_repeat_left & 3) << MDP_LEFT_LUMA; - - /* write luma_repeat_right to register */ - reg |= (luma_repeat_right & 3) << MDP_RIGHT_LUMA; - - /* write luma_repeat_top to register */ - reg |= (luma_repeat_top & 3) << MDP_TOP_LUMA; - - /* write luma_repeat_bottom to register */ - reg |= (luma_repeat_bottom & 3) << MDP_BOTTOM_LUMA; - - /* done with reg */ - *dup = reg; - - /* bg edge duplicate */ - reg = 0x0; - - switch (iBuf->ibuf_type) { - case MDP_Y_CBCR_H2V2: - case MDP_Y_CRCB_H2V2: - /* - * Edge condition for MDP_Y_CRCB/CBCR_H2V2 cosite only. - * For 420 cosite, 1 chroma replicated on all sides except - * left, so reg 101b8 should be 0x0209. For 420 offsite, - * 1 chroma replicated all sides. - */ - if (iBuf->roi.lcd_y == 0) { - reg |= BIT(MDP_TOP_CHROMA); - } - - if ((iBuf->roi.lcd_y + iBuf->roi.dst_height) == - iBuf->ibuf_height) { - reg |= BIT(MDP_BOTTOM_CHROMA); - } - - if (((iBuf->roi.lcd_x + iBuf->roi.dst_width) == - iBuf->ibuf_width) && ((iBuf->roi.dst_width % 2) == 0)) { - reg |= BIT(MDP_RIGHT_CHROMA); - } - - break; - - case MDP_Y_CBCR_H2V1: - case MDP_Y_CRCB_H2V1: - case MDP_YCRYCB_H2V1: - if (((iBuf->roi.lcd_x + iBuf->roi.dst_width) == - iBuf->ibuf_width) && ((iBuf->roi.dst_width % 2) == 0)) { - reg |= BIT(MDP_RIGHT_CHROMA); - } - break; - default: - break; - } - - *dup2 = reg; - - return 0; -} - -#define ADJUST_IP /* for 1/3 scale factor fix */ - -static int mdp_calc_scale_params( -/* ROI origin coordinate for the dimension */ - uint32 org, -/* src ROI dimension */ - uint32 dim_in, -/* scaled ROI dimension*/ - uint32 dim_out, -/* is this ROI width dimension? */ - boolean is_W, -/* initial phase location address */ - int32 *phase_init_ptr, -/* phase increment location address */ - uint32 *phase_step_ptr, -/* ROI start over-fetch location address */ - uint32 *num_repl_beg_ptr, -/* ROI end over-fetch location address */ - uint32 *num_repl_end_ptr) -{ - boolean rpa_on = FALSE; - int init_phase = 0; - uint32 beg_of = 0; - uint32 end_of = 0; - uint64 numer = 0; - uint64 denom = 0; - /*uint64 inverter = 1; */ - int64 point5 = 1; - int64 one = 1; - int64 k1, k2, k3, k4; /* linear equation coefficients */ - uint64 int_mask; - uint64 fract_mask; - uint64 Os; - int64 Osprime; - int64 Od; - int64 Odprime; - int64 Oreq; - uint64 Es; - uint64 Ed; - uint64 Ereq; -#ifdef ADJUST_IP - int64 IP64; - int64 delta; -#endif - uint32 mult; - - /* - * The phase accumulator should really be rational for all cases in a - * general purpose polyphase scaler for a tiled architecture with - * non-zero * origin capability because there is no way to represent - * certain scale factors in fixed point regardless of precision. - * The error incurred in attempting to use fixed point is most - * eggregious for SF where 1/SF is an integral multiple of 1/3. - * - * However, since the MDP2 has already been committed to HW, we - * only use the rational phase accumulator (RPA) when 1/SF is an - * integral multiple of 1/3. This will help minimize regressions in - * matching the HW to the C-Sim. - */ - /* - * Set the RPA flag for this dimension. - * - * In order for 1/SF (dim_in/dim_out) to be an integral multiple of - * 1/3, dim_out must be an integral multiple of 3. - */ - if (!(dim_out % 3)) { - mult = dim_out / 3; - rpa_on = (!(dim_in % mult)); - } - - numer = dim_out; - denom = dim_in; - - /* - * convert to U30.34 before division - * - * The K vectors carry 4 extra bits of precision - * and are rounded. - * - * We initially go 5 bits over then round by adding - * 1 and right shifting by 1 - * so final result is U31.33 - */ - numer <<= PQF_PLUS_5; - - /* now calculate the scale factor (aka k3) */ - k3 = ((mdp_do_div(numer, denom) + 1) >> 1); - - /* check scale factor for legal range [0.25 - 4.0] */ - if (((k3 >> 4) < (1LL << PQF_MINUS_2)) || - ((k3 >> 4) > (1LL << PQF_PLUS_2))) { - return -1; - } - - /* calculate inverse scale factor (aka k1) for phase init */ - numer = dim_in; - denom = dim_out; - numer <<= PQF_PLUS_5; - k1 = ((mdp_do_div(numer, denom) + 1) >> 1); - - /* - * calculate initial phase and ROI overfetch - */ - /* convert point5 & one to S39.24 (will always be positive) */ - point5 <<= (PQF_PLUS_4 - 1); - one <<= PQF_PLUS_4; - k2 = ((k1 - one) >> 1); - init_phase = (int)(k2 >> 4); - k4 = ((k3 - one) >> 1); - if (k3 == one) { - /* the simple case; SF = 1.0 */ - beg_of = 1; - end_of = 2; - } else { - /* calculate the masks */ - fract_mask = one - 1; - int_mask = ~fract_mask; - - if (!rpa_on) { - /* - * FIXED POINT IMPLEMENTATION - */ - if (!org) { - /* A fairly simple case; ROI origin = 0 */ - if (k1 < one) { - /* upscaling */ - beg_of = end_of = 2; - } - /* 0.33 <= SF < 1.0 */ - else if (k1 < (3LL << PQF_PLUS_4)) - beg_of = end_of = 1; - /* 0.33 == SF */ - else if (k1 == (3LL << PQF_PLUS_4)) { - beg_of = 0; - end_of = 1; - } - /* 0.25 <= SF < 0.33 */ - else - beg_of = end_of = 0; - } else { - /* - * The complicated case; ROI origin != 0 - * init_phase needs to be adjusted - * OF is also position dependent - */ - - /* map (org - .5) into destination space */ - Os = ((uint64) org << 1) - 1; - Od = ((k3 * Os) >> 1) + k4; - - /* take the ceiling */ - Odprime = (Od & int_mask); - if (Odprime != Od) - Odprime += one; - - /* now map that back to source space */ - Osprime = (k1 * (Odprime >> PQF_PLUS_4)) + k2; - - /* then floor & decrement to calculate the required - starting coordinate */ - Oreq = (Osprime & int_mask) - one; - - /* calculate end coord in destination space then map to - source space */ - Ed = Odprime + - ((uint64) dim_out << PQF_PLUS_4) - one; - Es = (k1 * (Ed >> PQF_PLUS_4)) + k2; - - /* now floor & increment by 2 to calculate the required - ending coordinate */ - Ereq = (Es & int_mask) + (one << 1); - - /* calculate initial phase */ -#ifdef ADJUST_IP - - IP64 = Osprime - Oreq; - delta = ((int64) (org) << PQF_PLUS_4) - Oreq; - IP64 -= delta; - - /* limit to valid range before the left shift */ - delta = (IP64 & (1LL << 63)) ? 4 : -4; - delta <<= PQF_PLUS_4; - while (abs((int)(IP64 >> PQF_PLUS_4)) > 4) - IP64 += delta; - - /* right shift to account for extra bits of precision */ - init_phase = (int)(IP64 >> 4); - -#else /* ADJUST_IP */ - - /* just calculate the real initial phase */ - init_phase = (int)((Osprime - Oreq) >> 4); - -#endif /* ADJUST_IP */ - - /* calculate the overfetch */ - beg_of = org - (uint32) (Oreq >> PQF_PLUS_4); - end_of = - (uint32) (Ereq >> PQF_PLUS_4) - (org + - dim_in - - 1); - } - } else { - /* - * RPA IMPLEMENTATION - * - * init_phase needs to be calculated in all RPA_on cases - * because it's a numerator, not a fixed point value. - */ - - /* map (org - .5) into destination space */ - Os = ((uint64) org << PQF_PLUS_4) - point5; - Od = mdp_do_div((dim_out * (Os + point5)), - dim_in) - point5; - - /* take the ceiling */ - Odprime = (Od & int_mask); - if (Odprime != Od) - Odprime += one; - - /* now map that back to source space */ - Osprime = - mdp_do_div((dim_in * (Odprime + point5)), - dim_out) - point5; - - /* then floor & decrement to calculate the required - starting coordinate */ - Oreq = (Osprime & int_mask) - one; - - /* calculate end coord in destination space then map to - source space */ - Ed = Odprime + ((uint64) dim_out << PQF_PLUS_4) - one; - Es = mdp_do_div((dim_in * (Ed + point5)), - dim_out) - point5; - - /* now floor & increment by 2 to calculate the required - ending coordinate */ - Ereq = (Es & int_mask) + (one << 1); - - /* calculate initial phase */ - -#ifdef ADJUST_IP - - IP64 = Osprime - Oreq; - delta = ((int64) (org) << PQF_PLUS_4) - Oreq; - IP64 -= delta; - - /* limit to valid range before the left shift */ - delta = (IP64 & (1LL << 63)) ? 4 : -4; - delta <<= PQF_PLUS_4; - while (abs((int)(IP64 >> PQF_PLUS_4)) > 4) - IP64 += delta; - - /* right shift to account for extra bits of precision */ - init_phase = (int)(IP64 >> 4); - -#else /* ADJUST_IP */ - - /* just calculate the real initial phase */ - init_phase = (int)((Osprime - Oreq) >> 4); - -#endif /* ADJUST_IP */ - - /* calculate the overfetch */ - beg_of = org - (uint32) (Oreq >> PQF_PLUS_4); - end_of = - (uint32) (Ereq >> PQF_PLUS_4) - (org + dim_in - 1); - } - } - - /* return the scale parameters */ - *phase_init_ptr = init_phase; - *phase_step_ptr = (uint32) (k1 >> 4); - *num_repl_beg_ptr = beg_of; - *num_repl_end_ptr = end_of; - - return 0; -} - -static uint8 *mdp_adjust_rot_addr(MDPIBUF *iBuf, uint8 *addr, uint32 uv) -{ - uint32 dest_ystride = iBuf->ibuf_width * iBuf->bpp; - uint32 h_slice = 1; - - if (uv && ((iBuf->ibuf_type == MDP_Y_CBCR_H2V2) || - (iBuf->ibuf_type == MDP_Y_CRCB_H2V2))) - h_slice = 2; - - if (MDP_CHKBIT(iBuf->mdpImg.mdpOp, MDPOP_ROT90) ^ - MDP_CHKBIT(iBuf->mdpImg.mdpOp, MDPOP_LR)) { - addr = - addr + (iBuf->roi.dst_width - - MIN(16, iBuf->roi.dst_width)) * iBuf->bpp; - } - if (MDP_CHKBIT(iBuf->mdpImg.mdpOp, MDPOP_UD)) { - addr = - addr + ((iBuf->roi.dst_height - - MIN(16, iBuf->roi.dst_height))/h_slice) * dest_ystride; - } - - return addr; -} - -void mdp_set_scale(MDPIBUF *iBuf, - uint32 dst_roi_width, - uint32 dst_roi_height, - boolean inputRGB, boolean outputRGB, uint32 *pppop_reg_ptr) -{ - uint32 dst_roi_width_scale; - uint32 dst_roi_height_scale; - boolean use_pr; - uint32 phasex_step = 0; - uint32 phasey_step = 0; - int32 phasex_init = 0; - int32 phasey_init = 0; - uint32 lines_dup = 0; - uint32 lines_dup_bg = 0; - uint32 dummy; - uint32 mdp_blur = 0; - - if (iBuf->mdpImg.mdpOp & MDPOP_ASCALE) { - if (iBuf->mdpImg.mdpOp & MDPOP_ROT90) { - dst_roi_width_scale = dst_roi_height; - dst_roi_height_scale = dst_roi_width; - } else { - dst_roi_width_scale = dst_roi_width; - dst_roi_height_scale = dst_roi_height; - } - - mdp_blur = iBuf->mdpImg.mdpOp & MDPOP_BLUR; - - if ((dst_roi_width_scale != iBuf->roi.width) || - (dst_roi_height_scale != iBuf->roi.height) || - mdp_blur) { - *pppop_reg_ptr |= - (PPP_OP_SCALE_Y_ON | PPP_OP_SCALE_X_ON); - - /* let's use SHIM logic to calculate the partial ROI scaling */ -#if 0 - phasex_step = - (uint32) mdp_do_div(0x20000000 * iBuf->roi.width, - dst_roi_width_scale); - phasey_step = - (uint32) mdp_do_div(0x20000000 * iBuf->roi.height, - dst_roi_height_scale); - -/* - phasex_step= ((long long) iBuf->roi.width * 0x20000000)/dst_roi_width_scale; - phasey_step= ((long long)iBuf->roi.height * 0x20000000)/dst_roi_height_scale; -*/ - - phasex_init = - (((long long)phasex_step - 0x20000000) >> 1); - phasey_init = - (((long long)phasey_step - 0x20000000) >> 1); - -#else - mdp_calc_scale_params(iBuf->roi.x, iBuf->roi.width, - dst_roi_width_scale, 1, - &phasex_init, &phasex_step, - &dummy, &dummy); - mdp_calc_scale_params(iBuf->roi.y, iBuf->roi.height, - dst_roi_height_scale, 0, - &phasey_init, &phasey_step, - &dummy, &dummy); -#endif - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x013c, - phasex_init); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0140, - phasey_init); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0144, - phasex_step); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0148, - phasey_step); - - use_pr = (inputRGB) && (outputRGB); - - if ((dst_roi_width_scale > iBuf->roi.width) || - (dst_roi_height_scale > iBuf->roi.height)) { - if ((use_pr) - && (mdp_curr_up_scale_xy != - MDP_PR_SCALE_UP)) { - mdp_load_pr_upscale_table(); - mdp_curr_up_scale_xy = MDP_PR_SCALE_UP; - } else if ((!use_pr) - && (mdp_curr_up_scale_xy != - MDP_BC_SCALE_UP)) { - mdp_load_bc_upscale_table(); - mdp_curr_up_scale_xy = MDP_BC_SCALE_UP; - } - } - - if (mdp_blur) { - load_scale_table(mdp_gaussian_blur_table, - ARRAY_SIZE(mdp_gaussian_blur_table)); - mdp_curr_down_scale_x = MDP_SCALE_BLUR; - mdp_curr_down_scale_y = MDP_SCALE_BLUR; - } - - /* 0.2 < x <= 1 scaling factor */ - if ((dst_roi_width_scale <= iBuf->roi.width) && - !mdp_blur) { - if (((dst_roi_width_scale * 10) / - iBuf->roi.width) > 8) { - if ((use_pr) - && (mdp_curr_down_scale_x != - MDP_PR_SCALE_POINT8_1)) { - mdp_load_pr_downscale_table_x_point8TO1 - (); - mdp_curr_down_scale_x = - MDP_PR_SCALE_POINT8_1; - } else if ((!use_pr) - && (mdp_curr_down_scale_x != - MDP_BC_SCALE_POINT8_1)) { - mdp_load_bc_downscale_table_x_point8TO1 - (); - mdp_curr_down_scale_x = - MDP_BC_SCALE_POINT8_1; - } - } else - if (((dst_roi_width_scale * 10) / - iBuf->roi.width) > 6) { - if ((use_pr) - && (mdp_curr_down_scale_x != - MDP_PR_SCALE_POINT6_POINT8)) { - mdp_load_pr_downscale_table_x_point6TOpoint8 - (); - mdp_curr_down_scale_x = - MDP_PR_SCALE_POINT6_POINT8; - } else if ((!use_pr) - && (mdp_curr_down_scale_x != - MDP_BC_SCALE_POINT6_POINT8)) - { - mdp_load_bc_downscale_table_x_point6TOpoint8 - (); - mdp_curr_down_scale_x = - MDP_BC_SCALE_POINT6_POINT8; - } - } else - if (((dst_roi_width_scale * 10) / - iBuf->roi.width) > 4) { - if ((use_pr) - && (mdp_curr_down_scale_x != - MDP_PR_SCALE_POINT4_POINT6)) { - mdp_load_pr_downscale_table_x_point4TOpoint6 - (); - mdp_curr_down_scale_x = - MDP_PR_SCALE_POINT4_POINT6; - } else if ((!use_pr) - && (mdp_curr_down_scale_x != - MDP_BC_SCALE_POINT4_POINT6)) - { - mdp_load_bc_downscale_table_x_point4TOpoint6 - (); - mdp_curr_down_scale_x = - MDP_BC_SCALE_POINT4_POINT6; - } - } else { - if ((use_pr) - && (mdp_curr_down_scale_x != - MDP_PR_SCALE_POINT2_POINT4)) { - mdp_load_pr_downscale_table_x_point2TOpoint4 - (); - mdp_curr_down_scale_x = - MDP_PR_SCALE_POINT2_POINT4; - } else if ((!use_pr) - && (mdp_curr_down_scale_x != - MDP_BC_SCALE_POINT2_POINT4)) - { - mdp_load_bc_downscale_table_x_point2TOpoint4 - (); - mdp_curr_down_scale_x = - MDP_BC_SCALE_POINT2_POINT4; - } - } - } - /* 0.2 < y <= 1 scaling factor */ - if ((dst_roi_height_scale <= iBuf->roi.height) && - !mdp_blur) { - if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 8) { - if ((use_pr) - && (mdp_curr_down_scale_y != - MDP_PR_SCALE_POINT8_1)) { - mdp_load_pr_downscale_table_y_point8TO1 - (); - mdp_curr_down_scale_y = - MDP_PR_SCALE_POINT8_1; - } else if ((!use_pr) - && (mdp_curr_down_scale_y != - MDP_BC_SCALE_POINT8_1)) { - mdp_load_bc_downscale_table_y_point8TO1 - (); - mdp_curr_down_scale_y = - MDP_BC_SCALE_POINT8_1; - } - } else - if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 6) { - if ((use_pr) - && (mdp_curr_down_scale_y != - MDP_PR_SCALE_POINT6_POINT8)) { - mdp_load_pr_downscale_table_y_point6TOpoint8 - (); - mdp_curr_down_scale_y = - MDP_PR_SCALE_POINT6_POINT8; - } else if ((!use_pr) - && (mdp_curr_down_scale_y != - MDP_BC_SCALE_POINT6_POINT8)) - { - mdp_load_bc_downscale_table_y_point6TOpoint8 - (); - mdp_curr_down_scale_y = - MDP_BC_SCALE_POINT6_POINT8; - } - } else - if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 4) { - if ((use_pr) - && (mdp_curr_down_scale_y != - MDP_PR_SCALE_POINT4_POINT6)) { - mdp_load_pr_downscale_table_y_point4TOpoint6 - (); - mdp_curr_down_scale_y = - MDP_PR_SCALE_POINT4_POINT6; - } else if ((!use_pr) - && (mdp_curr_down_scale_y != - MDP_BC_SCALE_POINT4_POINT6)) - { - mdp_load_bc_downscale_table_y_point4TOpoint6 - (); - mdp_curr_down_scale_y = - MDP_BC_SCALE_POINT4_POINT6; - } - } else { - if ((use_pr) - && (mdp_curr_down_scale_y != - MDP_PR_SCALE_POINT2_POINT4)) { - mdp_load_pr_downscale_table_y_point2TOpoint4 - (); - mdp_curr_down_scale_y = - MDP_PR_SCALE_POINT2_POINT4; - } else if ((!use_pr) - && (mdp_curr_down_scale_y != - MDP_BC_SCALE_POINT2_POINT4)) - { - mdp_load_bc_downscale_table_y_point2TOpoint4 - (); - mdp_curr_down_scale_y = - MDP_BC_SCALE_POINT2_POINT4; - } - } - } - } else { - iBuf->mdpImg.mdpOp &= ~(MDPOP_ASCALE); - } - } - /* setting edge condition here after scaling check */ - if (mdp_get_edge_cond(iBuf, &lines_dup, &lines_dup_bg)) - printk(KERN_ERR "msm_fb: mdp_get_edge_cond() error!\n"); - - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01b8, lines_dup); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01bc, lines_dup_bg); -} - -void mdp_init_scale_table(void) -{ - mdp_curr_up_scale_xy = MDP_INIT_SCALE; - mdp_curr_down_scale_x = MDP_INIT_SCALE; - mdp_curr_down_scale_y = MDP_INIT_SCALE; -} - -void mdp_adjust_start_addr(uint8 **src0, - uint8 **src1, - int v_slice, - int h_slice, - int x, - int y, - uint32 width, - uint32 height, int bpp, MDPIBUF *iBuf, int layer) -{ - *src0 += (x + y * width) * bpp; - - /* if it's dest/bg buffer, we need to adjust it for rotation */ - if (layer != 0) - *src0 = mdp_adjust_rot_addr(iBuf, *src0, 0); - - if (*src1) { - /* - * MDP_Y_CBCR_H2V2/MDP_Y_CRCB_H2V2 cosite for now - * we need to shift x direction same as y dir for offsite - */ - *src1 += - ((x / h_slice) * h_slice + - ((y == 0) ? 0 : ((y + 1) / v_slice - 1) * width)) * bpp; - - /* if it's dest/bg buffer, we need to adjust it for rotation */ - if (layer != 0) - *src1 = mdp_adjust_rot_addr(iBuf, *src1, 1); - } -} - -void mdp_set_blend_attr(MDPIBUF *iBuf, - uint32 *alpha, - uint32 *tpVal, - uint32 perPixelAlpha, uint32 *pppop_reg_ptr) -{ - if (perPixelAlpha) { - *pppop_reg_ptr |= PPP_OP_ROT_ON | - PPP_OP_BLEND_ON | PPP_OP_BLEND_SRCPIXEL_ALPHA; - } else { - if ((iBuf->mdpImg.mdpOp & MDPOP_ALPHAB) - && (iBuf->mdpImg.alpha == 0xff)) { - iBuf->mdpImg.mdpOp &= ~(MDPOP_ALPHAB); - } - - if ((iBuf->mdpImg.mdpOp & MDPOP_ALPHAB) - && (iBuf->mdpImg.mdpOp & MDPOP_TRANSP)) { - *pppop_reg_ptr |= - PPP_OP_ROT_ON | PPP_OP_BLEND_ON | - PPP_OP_BLEND_CONSTANT_ALPHA | - PPP_OP_BLEND_ALPHA_BLEND_NORMAL | - PPP_BLEND_CALPHA_TRNASP; - - *alpha = iBuf->mdpImg.alpha; - *tpVal = iBuf->mdpImg.tpVal; - } else { - if (iBuf->mdpImg.mdpOp & MDPOP_TRANSP) { - *pppop_reg_ptr |= PPP_OP_ROT_ON | - PPP_OP_BLEND_ON | - PPP_OP_BLEND_SRCPIXEL_TRANSP; - *tpVal = iBuf->mdpImg.tpVal; - } else if (iBuf->mdpImg.mdpOp & MDPOP_ALPHAB) { - *pppop_reg_ptr |= PPP_OP_ROT_ON | - PPP_OP_BLEND_ON | - PPP_OP_BLEND_ALPHA_BLEND_NORMAL | - PPP_OP_BLEND_CONSTANT_ALPHA; - *alpha = iBuf->mdpImg.alpha; - } - } - } -} diff --git a/drivers/staging/msm/mdp_ppp_v31.c b/drivers/staging/msm/mdp_ppp_v31.c deleted file mode 100644 index d8b7953..0000000 --- a/drivers/staging/msm/mdp_ppp_v31.c +++ /dev/null @@ -1,828 +0,0 @@ -/* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" - -#define MDP_SCALE_COEFF_NUM 32 -#define MDP_SCALE_0P2_TO_0P4_INDEX 0 -#define MDP_SCALE_0P4_TO_0P6_INDEX 32 -#define MDP_SCALE_0P6_TO_0P8_INDEX 64 -#define MDP_SCALE_0P8_TO_8P0_INDEX 96 -#define MDP_SCALE_COEFF_MASK 0x3ff - -#define MDP_SCALE_PR 0 -#define MDP_SCALE_FIR 1 - -static uint32 mdp_scale_0p8_to_8p0_mode; -static uint32 mdp_scale_0p6_to_0p8_mode; -static uint32 mdp_scale_0p4_to_0p6_mode; -static uint32 mdp_scale_0p2_to_0p4_mode; - -/* -------- All scaling range, "pixel repeat" -------- */ -static int16 mdp_scale_pixel_repeat_C0[MDP_SCALE_COEFF_NUM] = { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 -}; - -static int16 mdp_scale_pixel_repeat_C1[MDP_SCALE_COEFF_NUM] = { - 511, 511, 511, 511, 511, 511, 511, 511, - 511, 511, 511, 511, 511, 511, 511, 511, - 511, 511, 511, 511, 511, 511, 511, 511, - 511, 511, 511, 511, 511, 511, 511, 511 -}; - -static int16 mdp_scale_pixel_repeat_C2[MDP_SCALE_COEFF_NUM] = { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 -}; - -static int16 mdp_scale_pixel_repeat_C3[MDP_SCALE_COEFF_NUM] = { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 -}; - -/* --------------------------- FIR ------------------------------------- */ -/* -------- Downscale, ranging from 0.8x to 8.0x of original size -------- */ - -static int16 mdp_scale_0p8_to_8p0_C0[MDP_SCALE_COEFF_NUM] = { - 0, -7, -13, -19, -24, -28, -32, -34, -37, -39, - -40, -41, -41, -41, -40, -40, -38, -37, -35, -33, - -31, -29, -26, -24, -21, -18, -15, -13, -10, -7, - -5, -2 -}; - -static int16 mdp_scale_0p8_to_8p0_C1[MDP_SCALE_COEFF_NUM] = { - 511, 507, 501, 494, 485, 475, 463, 450, 436, 422, - 405, 388, 370, 352, 333, 314, 293, 274, 253, 233, - 213, 193, 172, 152, 133, 113, 95, 77, 60, 43, - 28, 13 -}; - -static int16 mdp_scale_0p8_to_8p0_C2[MDP_SCALE_COEFF_NUM] = { - 0, 13, 28, 43, 60, 77, 95, 113, 133, 152, - 172, 193, 213, 233, 253, 274, 294, 314, 333, 352, - 370, 388, 405, 422, 436, 450, 463, 475, 485, 494, - 501, 507, -}; - -static int16 mdp_scale_0p8_to_8p0_C3[MDP_SCALE_COEFF_NUM] = { - 0, -2, -5, -7, -10, -13, -15, -18, -21, -24, - -26, -29, -31, -33, -35, -37, -38, -40, -40, -41, - -41, -41, -40, -39, -37, -34, -32, -28, -24, -19, - -13, -7 -}; - -/* -------- Downscale, ranging from 0.6x to 0.8x of original size -------- */ - -static int16 mdp_scale_0p6_to_0p8_C0[MDP_SCALE_COEFF_NUM] = { - 104, 96, 89, 82, 75, 68, 61, 55, 49, 43, - 38, 33, 28, 24, 20, 16, 12, 9, 6, 4, - 2, 0, -2, -4, -5, -6, -7, -7, -8, -8, - -8, -8 -}; - -static int16 mdp_scale_0p6_to_0p8_C1[MDP_SCALE_COEFF_NUM] = { - 303, 303, 302, 300, 298, 296, 293, 289, 286, 281, - 276, 270, 265, 258, 252, 245, 238, 230, 223, 214, - 206, 197, 189, 180, 172, 163, 154, 145, 137, 128, - 120, 112 -}; - -static int16 mdp_scale_0p6_to_0p8_C2[MDP_SCALE_COEFF_NUM] = { - 112, 120, 128, 137, 145, 154, 163, 172, 180, 189, - 197, 206, 214, 223, 230, 238, 245, 252, 258, 265, - 270, 276, 281, 286, 289, 293, 296, 298, 300, 302, - 303, 303 -}; - -static int16 mdp_scale_0p6_to_0p8_C3[MDP_SCALE_COEFF_NUM] = { - -8, -8, -8, -8, -7, -7, -6, -5, -4, -2, - 0, 2, 4, 6, 9, 12, 16, 20, 24, 28, - 33, 38, 43, 49, 55, 61, 68, 75, 82, 89, - 96, 104 -}; - -/* -------- Downscale, ranging from 0.4x to 0.6x of original size -------- */ - -static int16 mdp_scale_0p4_to_0p6_C0[MDP_SCALE_COEFF_NUM] = { - 136, 132, 128, 123, 119, 115, 111, 107, 103, 98, - 95, 91, 87, 84, 80, 76, 73, 69, 66, 62, - 59, 57, 54, 50, 47, 44, 41, 39, 36, 33, - 32, 29 -}; - -static int16 mdp_scale_0p4_to_0p6_C1[MDP_SCALE_COEFF_NUM] = { - 206, 205, 204, 204, 201, 200, 199, 197, 196, 194, - 191, 191, 189, 185, 184, 182, 180, 178, 176, 173, - 170, 168, 165, 162, 160, 157, 155, 152, 148, 146, - 142, 140 -}; - -static int16 mdp_scale_0p4_to_0p6_C2[MDP_SCALE_COEFF_NUM] = { - 140, 142, 146, 148, 152, 155, 157, 160, 162, 165, - 168, 170, 173, 176, 178, 180, 182, 184, 185, 189, - 191, 191, 194, 196, 197, 199, 200, 201, 204, 204, - 205, 206 -}; - -static int16 mdp_scale_0p4_to_0p6_C3[MDP_SCALE_COEFF_NUM] = { - 29, 32, 33, 36, 39, 41, 44, 47, 50, 54, - 57, 59, 62, 66, 69, 73, 76, 80, 84, 87, - 91, 95, 98, 103, 107, 111, 115, 119, 123, 128, - 132, 136 -}; - -/* -------- Downscale, ranging from 0.2x to 0.4x of original size -------- */ - -static int16 mdp_scale_0p2_to_0p4_C0[MDP_SCALE_COEFF_NUM] = { - 131, 131, 130, 129, 128, 127, 127, 126, 125, 125, - 124, 123, 123, 121, 120, 119, 119, 118, 117, 117, - 116, 115, 115, 114, 113, 112, 111, 110, 109, 109, - 108, 107 -}; - -static int16 mdp_scale_0p2_to_0p4_C1[MDP_SCALE_COEFF_NUM] = { - 141, 140, 140, 140, 140, 139, 138, 138, 138, 137, - 137, 137, 136, 137, 137, 137, 136, 136, 136, 135, - 135, 135, 134, 134, 134, 134, 134, 133, 133, 132, - 132, 132 -}; - -static int16 mdp_scale_0p2_to_0p4_C2[MDP_SCALE_COEFF_NUM] = { - 132, 132, 132, 133, 133, 134, 134, 134, 134, 134, - 135, 135, 135, 136, 136, 136, 137, 137, 137, 136, - 137, 137, 137, 138, 138, 138, 139, 140, 140, 140, - 140, 141 -}; - -static int16 mdp_scale_0p2_to_0p4_C3[MDP_SCALE_COEFF_NUM] = { - 107, 108, 109, 109, 110, 111, 112, 113, 114, 115, - 115, 116, 117, 117, 118, 119, 119, 120, 121, 123, - 123, 124, 125, 125, 126, 127, 127, 128, 129, 130, - 131, 131 -}; - -static void mdp_update_scale_table(int index, int16 *c0, int16 *c1, - int16 *c2, int16 *c3) -{ - int i, val; - - for (i = 0; i < MDP_SCALE_COEFF_NUM; i++) { - val = - ((MDP_SCALE_COEFF_MASK & c1[i]) << 16) | - (MDP_SCALE_COEFF_MASK & c0[i]); - MDP_OUTP(MDP_PPP_SCALE_COEFF_LSBn(index), val); - val = - ((MDP_SCALE_COEFF_MASK & c3[i]) << 16) | - (MDP_SCALE_COEFF_MASK & c2[i]); - MDP_OUTP(MDP_PPP_SCALE_COEFF_MSBn(index), val); - index++; - } -} - -void mdp_init_scale_table(void) -{ - mdp_scale_0p2_to_0p4_mode = MDP_SCALE_FIR; - mdp_update_scale_table(MDP_SCALE_0P2_TO_0P4_INDEX, - mdp_scale_0p2_to_0p4_C0, - mdp_scale_0p2_to_0p4_C1, - mdp_scale_0p2_to_0p4_C2, - mdp_scale_0p2_to_0p4_C3); - - mdp_scale_0p4_to_0p6_mode = MDP_SCALE_FIR; - mdp_update_scale_table(MDP_SCALE_0P4_TO_0P6_INDEX, - mdp_scale_0p4_to_0p6_C0, - mdp_scale_0p4_to_0p6_C1, - mdp_scale_0p4_to_0p6_C2, - mdp_scale_0p4_to_0p6_C3); - - mdp_scale_0p6_to_0p8_mode = MDP_SCALE_FIR; - mdp_update_scale_table(MDP_SCALE_0P6_TO_0P8_INDEX, - mdp_scale_0p6_to_0p8_C0, - mdp_scale_0p6_to_0p8_C1, - mdp_scale_0p6_to_0p8_C2, - mdp_scale_0p6_to_0p8_C3); - - mdp_scale_0p8_to_8p0_mode = MDP_SCALE_FIR; - mdp_update_scale_table(MDP_SCALE_0P8_TO_8P0_INDEX, - mdp_scale_0p8_to_8p0_C0, - mdp_scale_0p8_to_8p0_C1, - mdp_scale_0p8_to_8p0_C2, - mdp_scale_0p8_to_8p0_C3); -} - -static long long mdp_do_div(long long num, long long den) -{ - do_div(num, den); - return num; -} - -#define SCALER_PHASE_BITS 29 -#define HAL_MDP_PHASE_STEP_2P50 0x50000000 -#define HAL_MDP_PHASE_STEP_1P66 0x35555555 -#define HAL_MDP_PHASE_STEP_1P25 0x28000000 - -struct phase_val { - int phase_init_x; - int phase_init_y; - int phase_step_x; - int phase_step_y; -}; - -static void mdp_calc_scaleInitPhase_3p1(uint32 in_w, - uint32 in_h, - uint32 out_w, - uint32 out_h, - boolean is_rotate, - boolean is_pp_x, - boolean is_pp_y, struct phase_val *pval) -{ - uint64 dst_ROI_width; - uint64 dst_ROI_height; - uint64 src_ROI_width; - uint64 src_ROI_height; - - /* - * phase_step_x, phase_step_y, phase_init_x and phase_init_y - * are represented in fixed-point, unsigned 3.29 format - */ - uint32 phase_step_x = 0; - uint32 phase_step_y = 0; - uint32 phase_init_x = 0; - uint32 phase_init_y = 0; - uint32 yscale_filter_sel, xscale_filter_sel; - uint32 scale_unit_sel_x, scale_unit_sel_y; - - uint64 numerator, denominator; - uint64 temp_dim; - - src_ROI_width = in_w; - src_ROI_height = in_h; - dst_ROI_width = out_w; - dst_ROI_height = out_h; - - /* if there is a 90 degree rotation */ - if (is_rotate) { - /* decide whether to use FIR or M/N for scaling */ - - /* if down-scaling by a factor smaller than 1/4 */ - if (src_ROI_width > (4 * dst_ROI_height)) - scale_unit_sel_x = 1; /* use M/N scalar */ - else - scale_unit_sel_x = 0; /* use FIR scalar */ - - /* if down-scaling by a factor smaller than 1/4 */ - if (src_ROI_height > (4 * dst_ROI_width)) - scale_unit_sel_y = 1; /* use M/N scalar */ - else - scale_unit_sel_y = 0; /* use FIR scalar */ - } else { - /* decide whether to use FIR or M/N for scaling */ - - if (src_ROI_width > (4 * dst_ROI_width)) - scale_unit_sel_x = 1; /* use M/N scalar */ - else - scale_unit_sel_x = 0; /* use FIR scalar */ - - if (src_ROI_height > (4 * dst_ROI_height)) - scale_unit_sel_y = 1; /* use M/N scalar */ - else - scale_unit_sel_y = 0; /* use FIR scalar */ - - } - - /* if there is a 90 degree rotation */ - if (is_rotate) { - /* swap the width and height of dst ROI */ - temp_dim = dst_ROI_width; - dst_ROI_width = dst_ROI_height; - dst_ROI_height = temp_dim; - } - - /* calculate phase step for the x direction */ - - /* if destination is only 1 pixel wide, the value of phase_step_x - is unimportant. Assigning phase_step_x to src ROI width - as an arbitrary value. */ - if (dst_ROI_width == 1) - phase_step_x = (uint32) ((src_ROI_width) << SCALER_PHASE_BITS); - - /* if using FIR scalar */ - else if (scale_unit_sel_x == 0) { - - /* Calculate the quotient ( src_ROI_width - 1 ) / ( dst_ROI_width - 1) - with u3.29 precision. Quotient is rounded up to the larger - 29th decimal point. */ - numerator = (src_ROI_width - 1) << SCALER_PHASE_BITS; - denominator = (dst_ROI_width - 1); /* never equals to 0 because of the "( dst_ROI_width == 1 ) case" */ - phase_step_x = (uint32) mdp_do_div((numerator + denominator - 1), denominator); /* divide and round up to the larger 29th decimal point. */ - - } - - /* if M/N scalar */ - else if (scale_unit_sel_x == 1) { - /* Calculate the quotient ( src_ROI_width ) / ( dst_ROI_width) - with u3.29 precision. Quotient is rounded down to the - smaller 29th decimal point. */ - numerator = (src_ROI_width) << SCALER_PHASE_BITS; - denominator = (dst_ROI_width); - phase_step_x = (uint32) mdp_do_div(numerator, denominator); - } - /* calculate phase step for the y direction */ - - /* if destination is only 1 pixel wide, the value of - phase_step_x is unimportant. Assigning phase_step_x - to src ROI width as an arbitrary value. */ - if (dst_ROI_height == 1) - phase_step_y = (uint32) ((src_ROI_height) << SCALER_PHASE_BITS); - - /* if FIR scalar */ - else if (scale_unit_sel_y == 0) { - /* Calculate the quotient ( src_ROI_height - 1 ) / ( dst_ROI_height - 1) - with u3.29 precision. Quotient is rounded up to the larger - 29th decimal point. */ - numerator = (src_ROI_height - 1) << SCALER_PHASE_BITS; - denominator = (dst_ROI_height - 1); /* never equals to 0 because of the "( dst_ROI_height == 1 )" case */ - phase_step_y = (uint32) mdp_do_div((numerator + denominator - 1), denominator); /* Quotient is rounded up to the larger 29th decimal point. */ - - } - - /* if M/N scalar */ - else if (scale_unit_sel_y == 1) { - /* Calculate the quotient ( src_ROI_height ) / ( dst_ROI_height) - with u3.29 precision. Quotient is rounded down to the smaller - 29th decimal point. */ - numerator = (src_ROI_height) << SCALER_PHASE_BITS; - denominator = (dst_ROI_height); - phase_step_y = (uint32) mdp_do_div(numerator, denominator); - } - - /* decide which set of FIR coefficients to use */ - if (phase_step_x > HAL_MDP_PHASE_STEP_2P50) - xscale_filter_sel = 0; - else if (phase_step_x > HAL_MDP_PHASE_STEP_1P66) - xscale_filter_sel = 1; - else if (phase_step_x > HAL_MDP_PHASE_STEP_1P25) - xscale_filter_sel = 2; - else - xscale_filter_sel = 3; - - if (phase_step_y > HAL_MDP_PHASE_STEP_2P50) - yscale_filter_sel = 0; - else if (phase_step_y > HAL_MDP_PHASE_STEP_1P66) - yscale_filter_sel = 1; - else if (phase_step_y > HAL_MDP_PHASE_STEP_1P25) - yscale_filter_sel = 2; - else - yscale_filter_sel = 3; - - /* calculate phase init for the x direction */ - - /* if using FIR scalar */ - if (scale_unit_sel_x == 0) { - if (dst_ROI_width == 1) - phase_init_x = - (uint32) ((src_ROI_width - 1) << SCALER_PHASE_BITS); - else - phase_init_x = 0; - - } - /* M over N scalar */ - else if (scale_unit_sel_x == 1) - phase_init_x = 0; - - /* calculate phase init for the y direction - if using FIR scalar */ - if (scale_unit_sel_y == 0) { - if (dst_ROI_height == 1) - phase_init_y = - (uint32) ((src_ROI_height - - 1) << SCALER_PHASE_BITS); - else - phase_init_y = 0; - - } - /* M over N scalar */ - else if (scale_unit_sel_y == 1) - phase_init_y = 0; - - /* write registers */ - pval->phase_step_x = (uint32) phase_step_x; - pval->phase_step_y = (uint32) phase_step_y; - pval->phase_init_x = (uint32) phase_init_x; - pval->phase_init_y = (uint32) phase_init_y; - - return; -} - -void mdp_set_scale(MDPIBUF *iBuf, - uint32 dst_roi_width, - uint32 dst_roi_height, - boolean inputRGB, boolean outputRGB, uint32 *pppop_reg_ptr) -{ - uint32 dst_roi_width_scale; - uint32 dst_roi_height_scale; - struct phase_val pval; - boolean use_pr; - uint32 ppp_scale_config = 0; - - if (!inputRGB) - ppp_scale_config |= BIT(6); - - if (iBuf->mdpImg.mdpOp & MDPOP_ASCALE) { - if (iBuf->mdpImg.mdpOp & MDPOP_ROT90) { - dst_roi_width_scale = dst_roi_height; - dst_roi_height_scale = dst_roi_width; - } else { - dst_roi_width_scale = dst_roi_width; - dst_roi_height_scale = dst_roi_height; - } - - if ((dst_roi_width_scale != iBuf->roi.width) || - (dst_roi_height_scale != iBuf->roi.height) || - (iBuf->mdpImg.mdpOp & MDPOP_SHARPENING)) { - *pppop_reg_ptr |= - (PPP_OP_SCALE_Y_ON | PPP_OP_SCALE_X_ON); - - mdp_calc_scaleInitPhase_3p1(iBuf->roi.width, - iBuf->roi.height, - dst_roi_width, - dst_roi_height, - iBuf->mdpImg. - mdpOp & MDPOP_ROT90, 1, 1, - &pval); - - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x013c, - pval.phase_init_x); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0140, - pval.phase_init_y); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0144, - pval.phase_step_x); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0148, - pval.phase_step_y); - - use_pr = (inputRGB) && (outputRGB); - - /* x-direction */ - if ((dst_roi_width_scale == iBuf->roi.width) && - !(iBuf->mdpImg.mdpOp & MDPOP_SHARPENING)) { - *pppop_reg_ptr &= ~PPP_OP_SCALE_X_ON; - } else - if (((dst_roi_width_scale * 10) / iBuf->roi.width) > - 8) { - if ((use_pr) - && (mdp_scale_0p8_to_8p0_mode != - MDP_SCALE_PR)) { - mdp_scale_0p8_to_8p0_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P8_TO_8P0_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p8_to_8p0_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p8_to_8p0_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P8_TO_8P0_INDEX, - mdp_scale_0p8_to_8p0_C0, - mdp_scale_0p8_to_8p0_C1, - mdp_scale_0p8_to_8p0_C2, - mdp_scale_0p8_to_8p0_C3); - } - ppp_scale_config |= (SCALE_U1_SET << 2); - } else - if (((dst_roi_width_scale * 10) / iBuf->roi.width) > - 6) { - if ((use_pr) - && (mdp_scale_0p6_to_0p8_mode != - MDP_SCALE_PR)) { - mdp_scale_0p6_to_0p8_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P6_TO_0P8_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p6_to_0p8_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p6_to_0p8_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P6_TO_0P8_INDEX, - mdp_scale_0p6_to_0p8_C0, - mdp_scale_0p6_to_0p8_C1, - mdp_scale_0p6_to_0p8_C2, - mdp_scale_0p6_to_0p8_C3); - } - ppp_scale_config |= (SCALE_D2_SET << 2); - } else - if (((dst_roi_width_scale * 10) / iBuf->roi.width) > - 4) { - if ((use_pr) - && (mdp_scale_0p4_to_0p6_mode != - MDP_SCALE_PR)) { - mdp_scale_0p4_to_0p6_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P4_TO_0P6_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p4_to_0p6_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p4_to_0p6_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P4_TO_0P6_INDEX, - mdp_scale_0p4_to_0p6_C0, - mdp_scale_0p4_to_0p6_C1, - mdp_scale_0p4_to_0p6_C2, - mdp_scale_0p4_to_0p6_C3); - } - ppp_scale_config |= (SCALE_D1_SET << 2); - } else - if (((dst_roi_width_scale * 4) / iBuf->roi.width) >= - 1) { - if ((use_pr) - && (mdp_scale_0p2_to_0p4_mode != - MDP_SCALE_PR)) { - mdp_scale_0p2_to_0p4_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P2_TO_0P4_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p2_to_0p4_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p2_to_0p4_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P2_TO_0P4_INDEX, - mdp_scale_0p2_to_0p4_C0, - mdp_scale_0p2_to_0p4_C1, - mdp_scale_0p2_to_0p4_C2, - mdp_scale_0p2_to_0p4_C3); - } - ppp_scale_config |= (SCALE_D0_SET << 2); - } else - ppp_scale_config |= BIT(0); - - /* y-direction */ - if ((dst_roi_height_scale == iBuf->roi.height) && - !(iBuf->mdpImg.mdpOp & MDPOP_SHARPENING)) { - *pppop_reg_ptr &= ~PPP_OP_SCALE_Y_ON; - } else if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 8) { - if ((use_pr) - && (mdp_scale_0p8_to_8p0_mode != - MDP_SCALE_PR)) { - mdp_scale_0p8_to_8p0_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P8_TO_8P0_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p8_to_8p0_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p8_to_8p0_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P8_TO_8P0_INDEX, - mdp_scale_0p8_to_8p0_C0, - mdp_scale_0p8_to_8p0_C1, - mdp_scale_0p8_to_8p0_C2, - mdp_scale_0p8_to_8p0_C3); - } - ppp_scale_config |= (SCALE_U1_SET << 4); - } else - if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 6) { - if ((use_pr) - && (mdp_scale_0p6_to_0p8_mode != - MDP_SCALE_PR)) { - mdp_scale_0p6_to_0p8_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P6_TO_0P8_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p6_to_0p8_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p6_to_0p8_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P6_TO_0P8_INDEX, - mdp_scale_0p6_to_0p8_C0, - mdp_scale_0p6_to_0p8_C1, - mdp_scale_0p6_to_0p8_C2, - mdp_scale_0p6_to_0p8_C3); - } - ppp_scale_config |= (SCALE_D2_SET << 4); - } else - if (((dst_roi_height_scale * 10) / - iBuf->roi.height) > 4) { - if ((use_pr) - && (mdp_scale_0p4_to_0p6_mode != - MDP_SCALE_PR)) { - mdp_scale_0p4_to_0p6_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P4_TO_0P6_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p4_to_0p6_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p4_to_0p6_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P4_TO_0P6_INDEX, - mdp_scale_0p4_to_0p6_C0, - mdp_scale_0p4_to_0p6_C1, - mdp_scale_0p4_to_0p6_C2, - mdp_scale_0p4_to_0p6_C3); - } - ppp_scale_config |= (SCALE_D1_SET << 4); - } else - if (((dst_roi_height_scale * 4) / - iBuf->roi.height) >= 1) { - if ((use_pr) - && (mdp_scale_0p2_to_0p4_mode != - MDP_SCALE_PR)) { - mdp_scale_0p2_to_0p4_mode = - MDP_SCALE_PR; - mdp_update_scale_table - (MDP_SCALE_0P2_TO_0P4_INDEX, - mdp_scale_pixel_repeat_C0, - mdp_scale_pixel_repeat_C1, - mdp_scale_pixel_repeat_C2, - mdp_scale_pixel_repeat_C3); - } else if ((!use_pr) - && (mdp_scale_0p2_to_0p4_mode != - MDP_SCALE_FIR)) { - mdp_scale_0p2_to_0p4_mode = - MDP_SCALE_FIR; - mdp_update_scale_table - (MDP_SCALE_0P2_TO_0P4_INDEX, - mdp_scale_0p2_to_0p4_C0, - mdp_scale_0p2_to_0p4_C1, - mdp_scale_0p2_to_0p4_C2, - mdp_scale_0p2_to_0p4_C3); - } - ppp_scale_config |= (SCALE_D0_SET << 4); - } else - ppp_scale_config |= BIT(1); - - if (iBuf->mdpImg.mdpOp & MDPOP_SHARPENING) { - ppp_scale_config |= BIT(7); - MDP_OUTP(MDP_BASE + 0x50020, - iBuf->mdpImg.sp_value); - } - - MDP_OUTP(MDP_BASE + 0x10230, ppp_scale_config); - } else { - iBuf->mdpImg.mdpOp &= ~(MDPOP_ASCALE); - } - } -} - -void mdp_adjust_start_addr(uint8 **src0, - uint8 **src1, - int v_slice, - int h_slice, - int x, - int y, - uint32 width, - uint32 height, int bpp, MDPIBUF *iBuf, int layer) -{ - switch (layer) { - case 0: - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0200, (y << 16) | (x)); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0208, - (height << 16) | (width)); - break; - - case 1: - /* MDP 3.1 HW bug workaround */ - if (iBuf->ibuf_type == MDP_YCRYCB_H2V1) { - *src0 += (x + y * width) * bpp; - x = y = 0; - width = iBuf->roi.dst_width; - height = iBuf->roi.dst_height; - } - - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0204, (y << 16) | (x)); - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x020c, - (height << 16) | (width)); - break; - - case 2: - MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x019c, (y << 16) | (x)); - break; - } -} - -void mdp_set_blend_attr(MDPIBUF *iBuf, - uint32 *alpha, - uint32 *tpVal, - uint32 perPixelAlpha, uint32 *pppop_reg_ptr) -{ - int bg_alpha; - - *alpha = iBuf->mdpImg.alpha; - *tpVal = iBuf->mdpImg.tpVal; - - if (iBuf->mdpImg.mdpOp & MDPOP_FG_PM_ALPHA) { - *pppop_reg_ptr |= PPP_OP_ROT_ON | - PPP_OP_BLEND_ON | PPP_OP_BLEND_CONSTANT_ALPHA; - - bg_alpha = PPP_BLEND_BG_USE_ALPHA_SEL | - PPP_BLEND_BG_ALPHA_REVERSE; - - if (perPixelAlpha) - bg_alpha |= PPP_BLEND_BG_SRCPIXEL_ALPHA; - else - bg_alpha |= PPP_BLEND_BG_CONSTANT_ALPHA; - - outpdw(MDP_BASE + 0x70010, bg_alpha); - - if (iBuf->mdpImg.mdpOp & MDPOP_TRANSP) - *pppop_reg_ptr |= PPP_BLEND_CALPHA_TRNASP; - } else if (perPixelAlpha) { - *pppop_reg_ptr |= PPP_OP_ROT_ON | - PPP_OP_BLEND_ON | PPP_OP_BLEND_SRCPIXEL_ALPHA; - } else { - if ((iBuf->mdpImg.mdpOp & MDPOP_ALPHAB) - && (iBuf->mdpImg.alpha == 0xff)) { - iBuf->mdpImg.mdpOp &= ~(MDPOP_ALPHAB); - } - - if ((iBuf->mdpImg.mdpOp & MDPOP_ALPHAB) - || (iBuf->mdpImg.mdpOp & MDPOP_TRANSP)) { - *pppop_reg_ptr |= - PPP_OP_ROT_ON | PPP_OP_BLEND_ON | - PPP_OP_BLEND_CONSTANT_ALPHA | - PPP_OP_BLEND_ALPHA_BLEND_NORMAL; - } - - if (iBuf->mdpImg.mdpOp & MDPOP_TRANSP) - *pppop_reg_ptr |= PPP_BLEND_CALPHA_TRNASP; - } -} diff --git a/drivers/staging/msm/mdp_vsync.c b/drivers/staging/msm/mdp_vsync.c deleted file mode 100644 index bbd4560..0000000 --- a/drivers/staging/msm/mdp_vsync.c +++ /dev/null @@ -1,389 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include "mdp.h" -#include "msm_fb.h" -#include "mddihost.h" - -#ifdef CONFIG_FB_MSM_MDP40 -#define MDP_SYNC_CFG_0 0x100 -#define MDP_SYNC_STATUS_0 0x10c -#define MDP_PRIM_VSYNC_OUT_CTRL 0x118 -#define MDP_PRIM_VSYNC_INIT_VAL 0x128 -#else -#define MDP_SYNC_CFG_0 0x300 -#define MDP_SYNC_STATUS_0 0x30c -#define MDP_PRIM_VSYNC_OUT_CTRL 0x318 -#define MDP_PRIM_VSYNC_INIT_VAL 0x328 -#endif - -extern mddi_lcd_type mddi_lcd_idx; -extern spinlock_t mdp_spin_lock; -extern struct workqueue_struct *mdp_vsync_wq; -extern int lcdc_mode; -extern int vsync_mode; - -#ifdef MDP_HW_VSYNC -int vsync_above_th = 4; -int vsync_start_th = 1; -int vsync_load_cnt; - -struct clk *mdp_vsync_clk; - -void mdp_hw_vsync_clk_enable(struct msm_fb_data_type *mfd) -{ - if (mfd->use_mdp_vsync) - clk_enable(mdp_vsync_clk); -} - -void mdp_hw_vsync_clk_disable(struct msm_fb_data_type *mfd) -{ - if (mfd->use_mdp_vsync) - clk_disable(mdp_vsync_clk); -} -#endif - -static void mdp_set_vsync(unsigned long data) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)data; - struct msm_fb_panel_data *pdata = NULL; - - pdata = (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - - if ((pdata) && (pdata->set_vsync_notifier == NULL)) - return; - - init_timer(&mfd->vsync_resync_timer); - mfd->vsync_resync_timer.function = mdp_set_vsync; - mfd->vsync_resync_timer.data = data; - mfd->vsync_resync_timer.expires = - jiffies + mfd->panel_info.lcd.vsync_notifier_period; - add_timer(&mfd->vsync_resync_timer); - - if ((mfd->panel_info.lcd.vsync_enable) && (mfd->panel_power_on) - && (!mfd->vsync_handler_pending)) { - mfd->vsync_handler_pending = TRUE; - if (!queue_work(mdp_vsync_wq, &mfd->vsync_resync_worker)) { - MSM_FB_INFO - ("mdp_set_vsync: can't queue_work! -> needs to increase vsync_resync_timer_duration\n"); - } - } else { - MSM_FB_DEBUG - ("mdp_set_vsync failed! EN:%d PWR:%d PENDING:%d\n", - mfd->panel_info.lcd.vsync_enable, mfd->panel_power_on, - mfd->vsync_handler_pending); - } -} - -static void mdp_vsync_handler(void *data) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)data; - - if (mfd->use_mdp_vsync) { -#ifdef MDP_HW_VSYNC - if (mfd->panel_power_on) - MDP_OUTP(MDP_BASE + MDP_SYNC_STATUS_0, vsync_load_cnt); - - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, TRUE); -#endif - } else { - mfd->last_vsync_timetick = ktime_get_real(); - } - - mfd->vsync_handler_pending = FALSE; -} - -irqreturn_t mdp_hw_vsync_handler_proxy(int irq, void *data) -{ - /* - * ToDo: tried enabling/disabling GPIO MDP HW VSYNC interrupt - * but getting inaccurate timing in mdp_vsync_handler() - * disable_irq(MDP_HW_VSYNC_IRQ); - */ - mdp_vsync_handler(data); - - return IRQ_HANDLED; -} - -#ifdef MDP_HW_VSYNC -static void mdp_set_sync_cfg_0(struct msm_fb_data_type *mfd, int vsync_cnt) -{ - unsigned long cfg; - - cfg = mfd->total_lcd_lines - 1; - cfg <<= MDP_SYNCFG_HGT_LOC; - if (mfd->panel_info.lcd.hw_vsync_mode) - cfg |= MDP_SYNCFG_VSYNC_EXT_EN; - cfg |= (MDP_SYNCFG_VSYNC_INT_EN | vsync_cnt); - - MDP_OUTP(MDP_BASE + MDP_SYNC_CFG_0, cfg); -} -#endif - -void mdp_config_vsync(struct msm_fb_data_type *mfd) -{ - - /* vsync on primary lcd only for now */ - if ((mfd->dest != DISPLAY_LCD) || (mfd->panel_info.pdest != DISPLAY_1) - || (!vsync_mode)) { - goto err_handle; - } - - if (mfd->panel_info.lcd.vsync_enable) { - mfd->total_porch_lines = mfd->panel_info.lcd.v_back_porch + - mfd->panel_info.lcd.v_front_porch + - mfd->panel_info.lcd.v_pulse_width; - mfd->total_lcd_lines = - mfd->panel_info.yres + mfd->total_porch_lines; - mfd->lcd_ref_usec_time = - 100000000 / mfd->panel_info.lcd.refx100; - mfd->vsync_handler_pending = FALSE; - mfd->last_vsync_timetick.tv.sec = 0; - mfd->last_vsync_timetick.tv.nsec = 0; - -#ifdef MDP_HW_VSYNC - if (mdp_vsync_clk == NULL) - mdp_vsync_clk = clk_get(NULL, "mdp_vsync_clk"); - - if (IS_ERR(mdp_vsync_clk)) { - printk(KERN_ERR "error: can't get mdp_vsync_clk!\n"); - mfd->use_mdp_vsync = 0; - } else - mfd->use_mdp_vsync = 1; - - if (mfd->use_mdp_vsync) { - uint32 vsync_cnt_cfg, vsync_cnt_cfg_dem; - uint32 mdp_vsync_clk_speed_hz; - - mdp_vsync_clk_speed_hz = clk_get_rate(mdp_vsync_clk); - - if (mdp_vsync_clk_speed_hz == 0) { - mfd->use_mdp_vsync = 0; - } else { - /* - * Do this calculation in 2 steps for - * rounding uint32 properly. - */ - vsync_cnt_cfg_dem = - (mfd->panel_info.lcd.refx100 * - mfd->total_lcd_lines) / 100; - vsync_cnt_cfg = - (mdp_vsync_clk_speed_hz) / - vsync_cnt_cfg_dem; - - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, - FALSE); - mdp_hw_vsync_clk_enable(mfd); - - mdp_set_sync_cfg_0(mfd, vsync_cnt_cfg); - - /* - * load the last line + 1 to be in the - * safety zone - */ - vsync_load_cnt = mfd->panel_info.yres; - - /* line counter init value at the next pulse */ - MDP_OUTP(MDP_BASE + MDP_PRIM_VSYNC_INIT_VAL, - vsync_load_cnt); - - /* - * external vsync source pulse width and - * polarity flip - */ - MDP_OUTP(MDP_BASE + MDP_PRIM_VSYNC_OUT_CTRL, - BIT(30) | BIT(0)); - - - /* threshold */ - MDP_OUTP(MDP_BASE + 0x200, - (vsync_above_th << 16) | - (vsync_start_th)); - - mdp_hw_vsync_clk_disable(mfd); - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, - MDP_BLOCK_POWER_OFF, FALSE); - } - } -#else - mfd->use_mdp_vsync = 0; - hrtimer_init(&mfd->dma_hrtimer, CLOCK_MONOTONIC, - HRTIMER_MODE_REL); - mfd->dma_hrtimer.function = mdp_dma2_vsync_hrtimer_handler; - mfd->vsync_width_boundary = vmalloc(mfd->panel_info.xres * 4); -#endif - - mfd->channel_irq = 0; - if (mfd->panel_info.lcd.hw_vsync_mode) { - u32 vsync_gpio = mfd->vsync_gpio; - u32 ret; - - if (vsync_gpio == -1) { - MSM_FB_INFO("vsync_gpio not defined!\n"); - goto err_handle; - } - - ret = gpio_tlmm_config(GPIO_CFG - (vsync_gpio, - (mfd->use_mdp_vsync) ? 1 : 0, - GPIO_INPUT, - GPIO_PULL_DOWN, - GPIO_2MA), - GPIO_ENABLE); - if (ret) - goto err_handle; - - if (!mfd->use_mdp_vsync) { - mfd->channel_irq = MSM_GPIO_TO_INT(vsync_gpio); - if (request_irq - (mfd->channel_irq, - &mdp_hw_vsync_handler_proxy, - IRQF_TRIGGER_FALLING, "VSYNC_GPIO", - (void *)mfd)) { - MSM_FB_INFO - ("irq=%d failed! vsync_gpio=%d\n", - mfd->channel_irq, - vsync_gpio); - goto err_handle; - } - } - } - - mdp_set_vsync((unsigned long)mfd); - } - - return; - -err_handle: - if (mfd->vsync_width_boundary) - vfree(mfd->vsync_width_boundary); - mfd->panel_info.lcd.vsync_enable = FALSE; - printk(KERN_ERR "%s: failed!\n", __func__); -} - -void mdp_vsync_resync_workqueue_handler(struct work_struct *work) -{ - struct msm_fb_data_type *mfd = NULL; - int vsync_fnc_enabled = FALSE; - struct msm_fb_panel_data *pdata = NULL; - - mfd = container_of(work, struct msm_fb_data_type, vsync_resync_worker); - - if (mfd) { - if (mfd->panel_power_on) { - pdata = - (struct msm_fb_panel_data *)mfd->pdev->dev. - platform_data; - - /* - * we need to turn on MDP power if it uses MDP vsync - * HW block in SW mode - */ - if ((!mfd->panel_info.lcd.hw_vsync_mode) && - (mfd->use_mdp_vsync) && - (pdata) && (pdata->set_vsync_notifier != NULL)) { - /* - * enable pwr here since we can't enable it in - * vsync callback in isr mode - */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, - FALSE); - } - - if (pdata->set_vsync_notifier != NULL) { - vsync_fnc_enabled = TRUE; - pdata->set_vsync_notifier(mdp_vsync_handler, - (void *)mfd); - } - } - } - - if ((mfd) && (!vsync_fnc_enabled)) - mfd->vsync_handler_pending = FALSE; -} - -boolean mdp_hw_vsync_set_handler(msm_fb_vsync_handler_type handler, void *data) -{ - /* - * ToDo: tried enabling/disabling GPIO MDP HW VSYNC interrupt - * but getting inaccurate timing in mdp_vsync_handler() - * enable_irq(MDP_HW_VSYNC_IRQ); - */ - - return TRUE; -} - -uint32 mdp_get_lcd_line_counter(struct msm_fb_data_type *mfd) -{ - uint32 elapsed_usec_time; - uint32 lcd_line; - ktime_t last_vsync_timetick_local; - ktime_t curr_time; - unsigned long flag; - - if ((!mfd->panel_info.lcd.vsync_enable) || (!vsync_mode)) - return 0; - - spin_lock_irqsave(&mdp_spin_lock, flag); - last_vsync_timetick_local = mfd->last_vsync_timetick; - spin_unlock_irqrestore(&mdp_spin_lock, flag); - - curr_time = ktime_get_real(); - elapsed_usec_time = - ((curr_time.tv.sec - last_vsync_timetick_local.tv.sec) * 1000000) + - ((curr_time.tv.nsec - last_vsync_timetick_local.tv.nsec) / 1000); - - elapsed_usec_time = elapsed_usec_time % mfd->lcd_ref_usec_time; - - /* lcd line calculation referencing to line counter = 0 */ - lcd_line = - (elapsed_usec_time * mfd->total_lcd_lines) / mfd->lcd_ref_usec_time; - - /* lcd line adjusment referencing to the actual line counter at vsync */ - lcd_line = - (mfd->total_lcd_lines - mfd->panel_info.lcd.v_back_porch + - lcd_line) % (mfd->total_lcd_lines + 1); - - if (lcd_line > mfd->total_lcd_lines) { - MSM_FB_INFO - ("mdp_get_lcd_line_counter: mdp_lcd_rd_cnt >= mfd->total_lcd_lines error!\n"); - } - - return lcd_line; -} diff --git a/drivers/staging/msm/memory.c b/drivers/staging/msm/memory.c deleted file mode 100644 index cc80fdf..0000000 --- a/drivers/staging/msm/memory.c +++ /dev/null @@ -1,214 +0,0 @@ -/* arch/arm/mach-msm/memory.c - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include "memory_ll.h" -#include -#if defined(CONFIG_MSM_NPA_REMOTE) -#include "npa_remote.h" -#include -#include -#endif - -int arch_io_remap_pfn_range(struct vm_area_struct *vma, unsigned long addr, - unsigned long pfn, unsigned long size, pgprot_t prot) -{ - unsigned long pfn_addr = pfn << PAGE_SHIFT; -/* - if ((pfn_addr >= 0x88000000) && (pfn_addr < 0xD0000000)) { - prot = pgprot_device(prot); - printk("remapping device %lx\n", prot); - } -*/ - panic("Memory remap PFN stuff not done\n"); - return remap_pfn_range(vma, addr, pfn, size, prot); -} - -void *zero_page_strongly_ordered; - -static void map_zero_page_strongly_ordered(void) -{ - if (zero_page_strongly_ordered) - return; -/* - zero_page_strongly_ordered = - ioremap_strongly_ordered(page_to_pfn(empty_zero_page) - << PAGE_SHIFT, PAGE_SIZE); -*/ - panic("Strongly ordered memory functions not implemented\n"); -} - -void write_to_strongly_ordered_memory(void) -{ - map_zero_page_strongly_ordered(); - *(int *)zero_page_strongly_ordered = 0; -} -EXPORT_SYMBOL(write_to_strongly_ordered_memory); - -void flush_axi_bus_buffer(void) -{ - __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ - : : "r" (0) : "memory"); - write_to_strongly_ordered_memory(); -} - -#define CACHE_LINE_SIZE 32 - -/* These cache related routines make the assumption that the associated - * physical memory is contiguous. They will operate on all (L1 - * and L2 if present) caches. - */ -void clean_and_invalidate_caches(unsigned long vstart, - unsigned long length, unsigned long pstart) -{ - unsigned long vaddr; - - for (vaddr = vstart; vaddr < vstart + length; vaddr += CACHE_LINE_SIZE) - asm ("mcr p15, 0, %0, c7, c14, 1" : : "r" (vaddr)); -#ifdef CONFIG_OUTER_CACHE - outer_flush_range(pstart, pstart + length); -#endif - asm ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); - asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); - - flush_axi_bus_buffer(); -} - -void clean_caches(unsigned long vstart, - unsigned long length, unsigned long pstart) -{ - unsigned long vaddr; - - for (vaddr = vstart; vaddr < vstart + length; vaddr += CACHE_LINE_SIZE) - asm ("mcr p15, 0, %0, c7, c10, 1" : : "r" (vaddr)); -#ifdef CONFIG_OUTER_CACHE - outer_clean_range(pstart, pstart + length); -#endif - asm ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); - asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); - - flush_axi_bus_buffer(); -} - -void invalidate_caches(unsigned long vstart, - unsigned long length, unsigned long pstart) -{ - unsigned long vaddr; - - for (vaddr = vstart; vaddr < vstart + length; vaddr += CACHE_LINE_SIZE) - asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (vaddr)); -#ifdef CONFIG_OUTER_CACHE - outer_inv_range(pstart, pstart + length); -#endif - asm ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); - asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); - - flush_axi_bus_buffer(); -} - -void *alloc_bootmem_aligned(unsigned long size, unsigned long alignment) -{ - void *unused_addr = NULL; - unsigned long addr, tmp_size, unused_size; - - /* Allocate maximum size needed, see where it ends up. - * Then free it -- in this path there are no other allocators - * so we can depend on getting the same address back - * when we allocate a smaller piece that is aligned - * at the end (if necessary) and the piece we really want, - * then free the unused first piece. - */ - - tmp_size = size + alignment - PAGE_SIZE; - addr = (unsigned long)alloc_bootmem(tmp_size); - free_bootmem(__pa(addr), tmp_size); - - unused_size = alignment - (addr % alignment); - if (unused_size) - unused_addr = alloc_bootmem(unused_size); - - addr = (unsigned long)alloc_bootmem(size); - if (unused_size) - free_bootmem(__pa(unused_addr), unused_size); - - return (void *)addr; -} - -#if defined(CONFIG_MSM_NPA_REMOTE) -struct npa_client *npa_memory_client; -#endif - -static int change_memory_power_state(unsigned long start_pfn, - unsigned long nr_pages, int state) -{ -#if defined(CONFIG_MSM_NPA_REMOTE) - static atomic_t node_created_flag = ATOMIC_INIT(1); -#else - unsigned long start; - unsigned long size; - unsigned long virtual; -#endif - int rc = 0; - -#if defined(CONFIG_MSM_NPA_REMOTE) - if (atomic_dec_and_test(&node_created_flag)) { - /* Create NPA 'required' client. */ - npa_memory_client = npa_create_sync_client(NPA_MEMORY_NODE_NAME, - "memory node", NPA_CLIENT_REQUIRED); - if (IS_ERR(npa_memory_client)) { - rc = PTR_ERR(npa_memory_client); - return rc; - } - } - - rc = npa_issue_required_request(npa_memory_client, state); -#else - if (state == MEMORY_DEEP_POWERDOWN) { - /* simulate turning off memory by writing bit pattern into it */ - start = start_pfn << PAGE_SHIFT; - size = nr_pages << PAGE_SHIFT; - virtual = __phys_to_virt(start); - memset((void *)virtual, 0x27, size); - } -#endif - return rc; -} - -int platform_physical_remove_pages(unsigned long start_pfn, - unsigned long nr_pages) -{ - return change_memory_power_state(start_pfn, nr_pages, - MEMORY_DEEP_POWERDOWN); -} - -int platform_physical_add_pages(unsigned long start_pfn, - unsigned long nr_pages) -{ - return change_memory_power_state(start_pfn, nr_pages, MEMORY_ACTIVE); -} - -int platform_physical_low_power_pages(unsigned long start_pfn, - unsigned long nr_pages) -{ - return change_memory_power_state(start_pfn, nr_pages, - MEMORY_SELF_REFRESH); -} diff --git a/drivers/staging/msm/memory_ll.h b/drivers/staging/msm/memory_ll.h deleted file mode 100644 index 18a239a..0000000 --- a/drivers/staging/msm/memory_ll.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef __ASM_ARCH_MEMORY_LL_H -#define __ASM_ARCH_MEMORY_LL_H - -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 25 - -#define HAS_ARCH_IO_REMAP_PFN_RANGE - -#ifndef __ASSEMBLY__ -void *alloc_bootmem_aligned(unsigned long size, unsigned long alignment); -void clean_and_invalidate_caches(unsigned long, unsigned long, unsigned long); -void clean_caches(unsigned long, unsigned long, unsigned long); -void invalidate_caches(unsigned long, unsigned long, unsigned long); -int platform_physical_remove_pages(unsigned long, unsigned long); -int platform_physical_add_pages(unsigned long, unsigned long); -int platform_physical_low_power_pages(unsigned long, unsigned long); - -#ifdef CONFIG_ARCH_MSM_ARM11 -void write_to_strongly_ordered_memory(void); - -#include - -#define arch_barrier_extra() do \ - { if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) \ - write_to_strongly_ordered_memory(); \ - } while (0) -#endif - -#ifdef CONFIG_CACHE_L2X0 -extern void l2x0_cache_sync(void); -#define finish_arch_switch(prev) do { l2x0_cache_sync(); } while (0) -#endif - -#endif - -#ifdef CONFIG_ARCH_MSM_SCORPION -#define arch_has_speculative_dfetch() 1 -#endif - -#endif - -/* these correspond to values known by the modem */ -#define MEMORY_DEEP_POWERDOWN 0 -#define MEMORY_SELF_REFRESH 1 -#define MEMORY_ACTIVE 2 - -#define NPA_MEMORY_NODE_NAME "/mem/ebi1/cs1" diff --git a/drivers/staging/msm/msm_fb.c b/drivers/staging/msm/msm_fb.c deleted file mode 100644 index e60f8f9..0000000 --- a/drivers/staging/msm/msm_fb.c +++ /dev/null @@ -1,2353 +0,0 @@ -/* - * - * Core MSM framebuffer driver. - * - * Copyright (C) 2007 Google Incorporated - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include "msm_mdp.h" -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - - -#define MSM_FB_C -#include "msm_fb.h" -#include "mddihosti.h" -#include "tvenc.h" -#include "mdp.h" -#include "mdp4.h" - -#ifdef CONFIG_FB_MSM_LOGO -#define INIT_IMAGE_FILE "/logo.rle" -extern int load_565rle_image(char *filename); -#endif - - -#define pgprot_noncached(prot) \ - __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) -#define pgprot_writecombine(prot) \ - __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE) -#define pgprot_device(prot) \ - __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_DEV_NONSHARED) -#define pgprot_writethroughcache(prot) \ - __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_WRITETHROUGH) -#define pgprot_writebackcache(prot) \ - __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_WRITEBACK) -#define pgprot_writebackwacache(prot) \ - __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_WRITEALLOC) - -static unsigned char *fbram; -static unsigned char *fbram_phys; -static int fbram_size; - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; - -int vsync_mode = 1; - -#define MAX_FBI_LIST 32 -static struct fb_info *fbi_list[MAX_FBI_LIST]; -static int fbi_list_index; - -static struct msm_fb_data_type *mfd_list[MAX_FBI_LIST]; -static int mfd_list_index; - -static u32 msm_fb_pseudo_palette[16] = { - 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff -}; - -u32 msm_fb_debug_enabled; -/* Setting msm_fb_msg_level to 8 prints out ALL messages */ -u32 msm_fb_msg_level = 7; - -/* Setting mddi_msg_level to 8 prints out ALL messages */ -u32 mddi_msg_level = 5; - -extern int32 mdp_block_power_cnt[MDP_MAX_BLOCK]; -extern unsigned long mdp_timer_duration; - -static int msm_fb_register(struct msm_fb_data_type *mfd); -static int msm_fb_open(struct fb_info *info, int user); -static int msm_fb_release(struct fb_info *info, int user); -static int msm_fb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info); -static int msm_fb_stop_sw_refresher(struct msm_fb_data_type *mfd); -int msm_fb_resume_sw_refresher(struct msm_fb_data_type *mfd); -static int msm_fb_check_var(struct fb_var_screeninfo *var, - struct fb_info *info); -static int msm_fb_set_par(struct fb_info *info); -static int msm_fb_blank_sub(int blank_mode, struct fb_info *info, - boolean op_enable); -static int msm_fb_suspend_sub(struct msm_fb_data_type *mfd); -static int msm_fb_resume_sub(struct msm_fb_data_type *mfd); -static int msm_fb_ioctl(struct fb_info *info, unsigned int cmd, - unsigned long arg); -static int msm_fb_mmap(struct fb_info *info, struct vm_area_struct * vma); - -#ifdef MSM_FB_ENABLE_DBGFS - -#define MSM_FB_MAX_DBGFS 1024 -#define MAX_BACKLIGHT_BRIGHTNESS 255 - -int msm_fb_debugfs_file_index; -struct dentry *msm_fb_debugfs_root; -struct dentry *msm_fb_debugfs_file[MSM_FB_MAX_DBGFS]; - -struct dentry *msm_fb_get_debugfs_root(void) -{ - if (msm_fb_debugfs_root == NULL) - msm_fb_debugfs_root = debugfs_create_dir("msm_fb", NULL); - - return msm_fb_debugfs_root; -} - -void msm_fb_debugfs_file_create(struct dentry *root, const char *name, - u32 *var) -{ - if (msm_fb_debugfs_file_index >= MSM_FB_MAX_DBGFS) - return; - - msm_fb_debugfs_file[msm_fb_debugfs_file_index++] = - debugfs_create_u32(name, S_IRUGO | S_IWUSR, root, var); -} -#endif - -int msm_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if (!mfd->cursor_update) - return -ENODEV; - - return mfd->cursor_update(info, cursor); -} - -static int msm_fb_resource_initialized; - -#ifndef CONFIG_FB_BACKLIGHT -static int lcd_backlight_registered; - -static void msm_fb_set_bl_brightness(struct led_classdev *led_cdev, - enum led_brightness value) -{ - struct msm_fb_data_type *mfd = dev_get_drvdata(led_cdev->dev->parent); - int bl_lvl; - - if (value > MAX_BACKLIGHT_BRIGHTNESS) - value = MAX_BACKLIGHT_BRIGHTNESS; - - /* This maps android backlight level 0 to 255 into - driver backlight level 0 to bl_max with rounding */ - bl_lvl = (2 * value * mfd->panel_info.bl_max + MAX_BACKLIGHT_BRIGHTNESS) - /(2 * MAX_BACKLIGHT_BRIGHTNESS); - - if (!bl_lvl && value) - bl_lvl = 1; - - msm_fb_set_backlight(mfd, bl_lvl, 1); -} - -static struct led_classdev backlight_led = { - .name = "lcd-backlight", - .brightness = MAX_BACKLIGHT_BRIGHTNESS, - .brightness_set = msm_fb_set_bl_brightness, -}; -#endif - -static struct msm_fb_platform_data *msm_fb_pdata; - -int msm_fb_detect_client(const char *name) -{ - int ret = -EPERM; -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - u32 id; -#endif - - if (msm_fb_pdata && msm_fb_pdata->detect_client) { - ret = msm_fb_pdata->detect_client(name); - - /* if it's non mddi panel, we need to pre-scan - mddi client to see if we can disable mddi host */ - -#ifdef CONFIG_FB_MSM_MDDI_AUTO_DETECT - if (!ret && msm_fb_pdata->mddi_prescan) - id = mddi_get_client_id(); -#endif - } - - return ret; -} - -static int msm_fb_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - int rc; - - MSM_FB_DEBUG("msm_fb_probe\n"); - - if ((pdev->id == 0) && (pdev->num_resources > 0)) { - msm_fb_pdata = pdev->dev.platform_data; - fbram_size = - pdev->resource[0].end - pdev->resource[0].start + 1; - fbram_phys = (char *)pdev->resource[0].start; - fbram = ioremap((unsigned long)fbram_phys, fbram_size); - - if (!fbram) { - printk(KERN_ERR "fbram ioremap failed!\n"); - return -ENOMEM; - } - MSM_FB_INFO("msm_fb_probe: phy_Addr = 0x%x virt = 0x%x\n", - (int)fbram_phys, (int)fbram); - - msm_fb_resource_initialized = 1; - return 0; - } - - if (!msm_fb_resource_initialized) - return -EPERM; - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - mfd->panel_info.frame_count = 0; - mfd->bl_level = mfd->panel_info.bl_max; - - if (mfd->panel_info.type == LCDC_PANEL) - mfd->allow_set_offset = - msm_fb_pdata->allow_set_offset != NULL ? - msm_fb_pdata->allow_set_offset() : 0; - else - mfd->allow_set_offset = 0; - - rc = msm_fb_register(mfd); - if (rc) - return rc; - -#ifdef CONFIG_FB_BACKLIGHT - msm_fb_config_backlight(mfd); -#else - /* android supports only one lcd-backlight/lcd for now */ - if (!lcd_backlight_registered) { - if (led_classdev_register(&pdev->dev, &backlight_led)) - printk(KERN_ERR "led_classdev_register failed\n"); - else - lcd_backlight_registered = 1; - } -#endif - - pdev_list[pdev_list_cnt++] = pdev; - return 0; -} - -static int msm_fb_remove(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - - MSM_FB_DEBUG("msm_fb_remove\n"); - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (msm_fb_suspend_sub(mfd)) - printk(KERN_ERR "msm_fb_remove: can't stop the device %d\n", mfd->index); - - if (mfd->channel_irq != 0) - free_irq(mfd->channel_irq, (void *)mfd); - - if (mfd->vsync_width_boundary) - vfree(mfd->vsync_width_boundary); - - if (mfd->vsync_resync_timer.function) - del_timer(&mfd->vsync_resync_timer); - - if (mfd->refresh_timer.function) - del_timer(&mfd->refresh_timer); - - if (mfd->dma_hrtimer.function) - hrtimer_cancel(&mfd->dma_hrtimer); - - /* remove /dev/fb* */ - unregister_framebuffer(mfd->fbi); - -#ifdef CONFIG_FB_BACKLIGHT - /* remove /sys/class/backlight */ - backlight_device_unregister(mfd->fbi->bl_dev); -#else - if (lcd_backlight_registered) { - lcd_backlight_registered = 0; - led_classdev_unregister(&backlight_led); - } -#endif - -#ifdef MSM_FB_ENABLE_DBGFS - if (mfd->sub_dir) - debugfs_remove(mfd->sub_dir); -#endif - - return 0; -} - -#if defined(CONFIG_PM) && !defined(CONFIG_HAS_EARLYSUSPEND) -static int msm_fb_suspend(struct platform_device *pdev, pm_message_t state) -{ - struct msm_fb_data_type *mfd; - int ret = 0; - - MSM_FB_DEBUG("msm_fb_suspend\n"); - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if ((!mfd) || (mfd->key != MFD_KEY)) - return 0; - - console_lock(); - fb_set_suspend(mfd->fbi, 1); - - ret = msm_fb_suspend_sub(mfd); - if (ret != 0) { - printk(KERN_ERR "msm_fb: failed to suspend! %d\n", ret); - fb_set_suspend(mfd->fbi, 0); - } else { - pdev->dev.power.power_state = state; - } - - console_unlock(); - return ret; -} -#else -#define msm_fb_suspend NULL -#endif - -static int msm_fb_suspend_sub(struct msm_fb_data_type *mfd) -{ - int ret = 0; - - if ((!mfd) || (mfd->key != MFD_KEY)) - return 0; - - /* - * suspend this channel - */ - mfd->suspend.sw_refreshing_enable = mfd->sw_refreshing_enable; - mfd->suspend.op_enable = mfd->op_enable; - mfd->suspend.panel_power_on = mfd->panel_power_on; - - if (mfd->op_enable) { - ret = - msm_fb_blank_sub(FB_BLANK_POWERDOWN, mfd->fbi, - mfd->suspend.op_enable); - if (ret) { - MSM_FB_INFO - ("msm_fb_suspend: can't turn off display!\n"); - return ret; - } - mfd->op_enable = FALSE; - } - /* - * try to power down - */ - mdp_pipe_ctrl(MDP_MASTER_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - - /* - * detach display channel irq if there's any - * or wait until vsync-resync completes - */ - if ((mfd->dest == DISPLAY_LCD)) { - if (mfd->panel_info.lcd.vsync_enable) { - if (mfd->panel_info.lcd.hw_vsync_mode) { - if (mfd->channel_irq != 0) - disable_irq(mfd->channel_irq); - } else { - volatile boolean vh_pending; - do { - vh_pending = mfd->vsync_handler_pending; - } while (vh_pending); - } - } - } - - return 0; -} - -#if defined(CONFIG_PM) && !defined(CONFIG_HAS_EARLYSUSPEND) -static int msm_fb_resume(struct platform_device *pdev) -{ - /* This resume function is called when interrupt is enabled. - */ - int ret = 0; - struct msm_fb_data_type *mfd; - - MSM_FB_DEBUG("msm_fb_resume\n"); - - mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev); - - if ((!mfd) || (mfd->key != MFD_KEY)) - return 0; - - console_lock(); - ret = msm_fb_resume_sub(mfd); - pdev->dev.power.power_state = PMSG_ON; - fb_set_suspend(mfd->fbi, 1); - console_unlock(); - - return ret; -} -#else -#define msm_fb_resume NULL -#endif - -static int msm_fb_resume_sub(struct msm_fb_data_type *mfd) -{ - int ret = 0; - - if ((!mfd) || (mfd->key != MFD_KEY)) - return 0; - - /* attach display channel irq if there's any */ - if (mfd->channel_irq != 0) - enable_irq(mfd->channel_irq); - - /* resume state var recover */ - mfd->sw_refreshing_enable = mfd->suspend.sw_refreshing_enable; - mfd->op_enable = mfd->suspend.op_enable; - - if (mfd->suspend.panel_power_on) { - ret = - msm_fb_blank_sub(FB_BLANK_UNBLANK, mfd->fbi, - mfd->op_enable); - if (ret) - MSM_FB_INFO("msm_fb_resume: can't turn on display!\n"); - } - - return ret; -} - -static struct platform_driver msm_fb_driver = { - .probe = msm_fb_probe, - .remove = msm_fb_remove, -#ifndef CONFIG_HAS_EARLYSUSPEND - .suspend = msm_fb_suspend, - .resume = msm_fb_resume, -#endif - .shutdown = NULL, - .driver = { - /* Driver name must match the device name added in platform.c. */ - .name = "msm_fb", - }, -}; - -#ifdef CONFIG_HAS_EARLYSUSPEND -static void msmfb_early_suspend(struct early_suspend *h) -{ - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - early_suspend); - msm_fb_suspend_sub(mfd); -} - -static void msmfb_early_resume(struct early_suspend *h) -{ - struct msm_fb_data_type *mfd = container_of(h, struct msm_fb_data_type, - early_suspend); - msm_fb_resume_sub(mfd); -} -#endif - -void msm_fb_set_backlight(struct msm_fb_data_type *mfd, __u32 bkl_lvl, u32 save) -{ - struct msm_fb_panel_data *pdata; - - pdata = (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - - if ((pdata) && (pdata->set_backlight)) { - down(&mfd->sem); - if ((bkl_lvl != mfd->bl_level) || (!save)) { - u32 old_lvl; - - old_lvl = mfd->bl_level; - mfd->bl_level = bkl_lvl; - pdata->set_backlight(mfd); - - if (!save) - mfd->bl_level = old_lvl; - } - up(&mfd->sem); - } -} - -static int msm_fb_blank_sub(int blank_mode, struct fb_info *info, - boolean op_enable) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - struct msm_fb_panel_data *pdata = NULL; - int ret = 0; - - if (!op_enable) - return -EPERM; - - pdata = (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - if ((!pdata) || (!pdata->on) || (!pdata->off)) { - printk(KERN_ERR "msm_fb_blank_sub: no panel operation detected!\n"); - return -ENODEV; - } - - switch (blank_mode) { - case FB_BLANK_UNBLANK: - if (!mfd->panel_power_on) { - mdelay(100); - ret = pdata->on(mfd->pdev); - if (ret == 0) { - mfd->panel_power_on = TRUE; - - msm_fb_set_backlight(mfd, - mfd->bl_level, 0); - -/* ToDo: possible conflict with android which doesn't expect sw refresher */ -/* - if (!mfd->hw_refresh) - { - if ((ret = msm_fb_resume_sw_refresher(mfd)) != 0) - { - MSM_FB_INFO("msm_fb_blank_sub: msm_fb_resume_sw_refresher failed = %d!\n",ret); - } - } -*/ - } - } - break; - - case FB_BLANK_VSYNC_SUSPEND: - case FB_BLANK_HSYNC_SUSPEND: - case FB_BLANK_NORMAL: - case FB_BLANK_POWERDOWN: - default: - if (mfd->panel_power_on) { - int curr_pwr_state; - - mfd->op_enable = FALSE; - curr_pwr_state = mfd->panel_power_on; - mfd->panel_power_on = FALSE; - - mdelay(100); - ret = pdata->off(mfd->pdev); - if (ret) - mfd->panel_power_on = curr_pwr_state; - - msm_fb_set_backlight(mfd, 0, 0); - mfd->op_enable = TRUE; - } - break; - } - - return ret; -} - -static void msm_fb_fillrect(struct fb_info *info, - const struct fb_fillrect *rect) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - cfb_fillrect(info, rect); - if (!mfd->hw_refresh && (info->var.yoffset == 0) && - !mfd->sw_currently_refreshing) { - struct fb_var_screeninfo var; - - var = info->var; - var.reserved[0] = 0x54445055; - var.reserved[1] = (rect->dy << 16) | (rect->dx); - var.reserved[2] = ((rect->dy + rect->height) << 16) | - (rect->dx + rect->width); - - msm_fb_pan_display(&var, info); - } -} - -static void msm_fb_copyarea(struct fb_info *info, - const struct fb_copyarea *area) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - cfb_copyarea(info, area); - if (!mfd->hw_refresh && (info->var.yoffset == 0) && - !mfd->sw_currently_refreshing) { - struct fb_var_screeninfo var; - - var = info->var; - var.reserved[0] = 0x54445055; - var.reserved[1] = (area->dy << 16) | (area->dx); - var.reserved[2] = ((area->dy + area->height) << 16) | - (area->dx + area->width); - - msm_fb_pan_display(&var, info); - } -} - -static void msm_fb_imageblit(struct fb_info *info, const struct fb_image *image) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - cfb_imageblit(info, image); - if (!mfd->hw_refresh && (info->var.yoffset == 0) && - !mfd->sw_currently_refreshing) { - struct fb_var_screeninfo var; - - var = info->var; - var.reserved[0] = 0x54445055; - var.reserved[1] = (image->dy << 16) | (image->dx); - var.reserved[2] = ((image->dy + image->height) << 16) | - (image->dx + image->width); - - msm_fb_pan_display(&var, info); - } -} - -static int msm_fb_blank(int blank_mode, struct fb_info *info) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - return msm_fb_blank_sub(blank_mode, info, mfd->op_enable); -} - -static int msm_fb_set_lut(struct fb_cmap *cmap, struct fb_info *info) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if (!mfd->lut_update) - return -ENODEV; - - mfd->lut_update(info, cmap); - return 0; -} - -/* - * Custom Framebuffer mmap() function for MSM driver. - * Differs from standard mmap() function by allowing for customized - * page-protection. - */ -static int msm_fb_mmap(struct fb_info *info, struct vm_area_struct * vma) -{ - /* Get frame buffer memory range. */ - unsigned long start = info->fix.smem_start; - u32 len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.smem_len); - unsigned long off = vma->vm_pgoff << PAGE_SHIFT; - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - if (off >= len) { - /* memory mapped io */ - off -= len; - if (info->var.accel_flags) { - mutex_unlock(&info->lock); - return -EINVAL; - } - start = info->fix.mmio_start; - len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len); - } - - /* Set VM flags. */ - start &= PAGE_MASK; - if ((vma->vm_end - vma->vm_start + off) > len) - return -EINVAL; - off += start; - vma->vm_pgoff = off >> PAGE_SHIFT; - /* This is an IO map - tell maydump to skip this VMA */ - vma->vm_flags |= VM_IO | VM_RESERVED; - - /* Set VM page protection */ - if (mfd->mdp_fb_page_protection == MDP_FB_PAGE_PROTECTION_WRITECOMBINE) - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); - else if (mfd->mdp_fb_page_protection == - MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE) - vma->vm_page_prot = pgprot_writethroughcache(vma->vm_page_prot); - else if (mfd->mdp_fb_page_protection == - MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE) - vma->vm_page_prot = pgprot_writebackcache(vma->vm_page_prot); - else if (mfd->mdp_fb_page_protection == - MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE) - vma->vm_page_prot = pgprot_writebackwacache(vma->vm_page_prot); - else - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); - - /* Remap the frame buffer I/O range */ - if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) - return -EAGAIN; - - return 0; -} - -static struct fb_ops msm_fb_ops = { - .owner = THIS_MODULE, - .fb_open = msm_fb_open, - .fb_release = msm_fb_release, - .fb_read = NULL, - .fb_write = NULL, - .fb_cursor = NULL, - .fb_check_var = msm_fb_check_var, /* vinfo check */ - .fb_set_par = msm_fb_set_par, /* set the video mode according to info->var */ - .fb_setcolreg = NULL, /* set color register */ - .fb_blank = msm_fb_blank, /* blank display */ - .fb_pan_display = msm_fb_pan_display, /* pan display */ - .fb_fillrect = msm_fb_fillrect, /* Draws a rectangle */ - .fb_copyarea = msm_fb_copyarea, /* Copy data from area to another */ - .fb_imageblit = msm_fb_imageblit, /* Draws a image to the display */ - .fb_rotate = NULL, - .fb_sync = NULL, /* wait for blit idle, optional */ - .fb_ioctl = msm_fb_ioctl, /* perform fb specific ioctl (optional) */ - .fb_mmap = msm_fb_mmap, -}; - -static int msm_fb_register(struct msm_fb_data_type *mfd) -{ - int ret = -ENODEV; - int bpp; - struct msm_panel_info *panel_info = &mfd->panel_info; - struct fb_info *fbi = mfd->fbi; - struct fb_fix_screeninfo *fix; - struct fb_var_screeninfo *var; - int *id; - int fbram_offset; - - /* - * fb info initialization - */ - fix = &fbi->fix; - var = &fbi->var; - - fix->type_aux = 0; /* if type == FB_TYPE_INTERLEAVED_PLANES */ - fix->visual = FB_VISUAL_TRUECOLOR; /* True Color */ - fix->ywrapstep = 0; /* No support */ - fix->mmio_start = 0; /* No MMIO Address */ - fix->mmio_len = 0; /* No MMIO Address */ - fix->accel = FB_ACCEL_NONE;/* FB_ACCEL_MSM needes to be added in fb.h */ - - var->xoffset = 0, /* Offset from virtual to visible */ - var->yoffset = 0, /* resolution */ - var->grayscale = 0, /* No graylevels */ - var->nonstd = 0, /* standard pixel format */ - var->activate = FB_ACTIVATE_VBL, /* activate it at vsync */ - var->height = -1, /* height of picture in mm */ - var->width = -1, /* width of picture in mm */ - var->accel_flags = 0, /* acceleration flags */ - var->sync = 0, /* see FB_SYNC_* */ - var->rotate = 0, /* angle we rotate counter clockwise */ - mfd->op_enable = FALSE; - - switch (mfd->fb_imgType) { - case MDP_RGB_565: - fix->type = FB_TYPE_PACKED_PIXELS; - fix->xpanstep = 1; - fix->ypanstep = 1; - var->vmode = FB_VMODE_NONINTERLACED; - var->blue.offset = 0; - var->green.offset = 5; - var->red.offset = 11; - var->blue.length = 5; - var->green.length = 6; - var->red.length = 5; - var->blue.msb_right = 0; - var->green.msb_right = 0; - var->red.msb_right = 0; - var->transp.offset = 0; - var->transp.length = 0; - bpp = 2; - break; - - case MDP_RGB_888: - fix->type = FB_TYPE_PACKED_PIXELS; - fix->xpanstep = 1; - fix->ypanstep = 1; - var->vmode = FB_VMODE_NONINTERLACED; - var->blue.offset = 0; - var->green.offset = 8; - var->red.offset = 16; - var->blue.length = 8; - var->green.length = 8; - var->red.length = 8; - var->blue.msb_right = 0; - var->green.msb_right = 0; - var->red.msb_right = 0; - var->transp.offset = 0; - var->transp.length = 0; - bpp = 3; - break; - - case MDP_ARGB_8888: - fix->type = FB_TYPE_PACKED_PIXELS; - fix->xpanstep = 1; - fix->ypanstep = 1; - var->vmode = FB_VMODE_NONINTERLACED; - var->blue.offset = 0; - var->green.offset = 8; - var->red.offset = 16; - var->blue.length = 8; - var->green.length = 8; - var->red.length = 8; - var->blue.msb_right = 0; - var->green.msb_right = 0; - var->red.msb_right = 0; - var->transp.offset = 24; - var->transp.length = 8; - bpp = 3; - break; - - case MDP_YCRYCB_H2V1: - /* ToDo: need to check TV-Out YUV422i framebuffer format */ - /* we might need to create new type define */ - fix->type = FB_TYPE_INTERLEAVED_PLANES; - fix->xpanstep = 2; - fix->ypanstep = 1; - var->vmode = FB_VMODE_NONINTERLACED; - - /* how about R/G/B offset? */ - var->blue.offset = 0; - var->green.offset = 5; - var->red.offset = 11; - var->blue.length = 5; - var->green.length = 6; - var->red.length = 5; - var->blue.msb_right = 0; - var->green.msb_right = 0; - var->red.msb_right = 0; - var->transp.offset = 0; - var->transp.length = 0; - bpp = 2; - break; - - default: - MSM_FB_ERR("msm_fb_init: fb %d unknown image type!\n", - mfd->index); - return ret; - } - - /* The adreno GPU hardware requires that the pitch be aligned to - 32 pixels for color buffers, so for the cases where the GPU - is writing directly to fb0, the framebuffer pitch - also needs to be 32 pixel aligned */ - - if (mfd->index == 0) - fix->line_length = ALIGN(panel_info->xres * bpp, 32); - else - fix->line_length = panel_info->xres * bpp; - - fix->smem_len = fix->line_length * panel_info->yres * mfd->fb_page; - - mfd->var_xres = panel_info->xres; - mfd->var_yres = panel_info->yres; - - var->pixclock = mfd->panel_info.clk_rate; - mfd->var_pixclock = var->pixclock; - - var->xres = panel_info->xres; - var->yres = panel_info->yres; - var->xres_virtual = panel_info->xres; - var->yres_virtual = panel_info->yres * mfd->fb_page; - var->bits_per_pixel = bpp * 8, /* FrameBuffer color depth */ - /* - * id field for fb app - */ - id = (int *)&mfd->panel; - -#if defined(CONFIG_FB_MSM_MDP22) - snprintf(fix->id, sizeof(fix->id), "msmfb22_%x", (__u32) *id); -#elif defined(CONFIG_FB_MSM_MDP30) - snprintf(fix->id, sizeof(fix->id), "msmfb30_%x", (__u32) *id); -#elif defined(CONFIG_FB_MSM_MDP31) - snprintf(fix->id, sizeof(fix->id), "msmfb31_%x", (__u32) *id); -#elif defined(CONFIG_FB_MSM_MDP40) - snprintf(fix->id, sizeof(fix->id), "msmfb40_%x", (__u32) *id); -#else - error CONFIG_FB_MSM_MDP undefined ! -#endif - fbi->fbops = &msm_fb_ops; - fbi->flags = FBINFO_FLAG_DEFAULT; - fbi->pseudo_palette = msm_fb_pseudo_palette; - - mfd->ref_cnt = 0; - mfd->sw_currently_refreshing = FALSE; - mfd->sw_refreshing_enable = TRUE; - mfd->panel_power_on = FALSE; - - mfd->pan_waiting = FALSE; - init_completion(&mfd->pan_comp); - init_completion(&mfd->refresher_comp); - sema_init(&mfd->sem, 1); - - fbram_offset = PAGE_ALIGN((int)fbram)-(int)fbram; - fbram += fbram_offset; - fbram_phys += fbram_offset; - fbram_size -= fbram_offset; - - if (fbram_size < fix->smem_len) { - printk(KERN_ERR "error: no more framebuffer memory!\n"); - return -ENOMEM; - } - - fbi->screen_base = fbram; - fbi->fix.smem_start = (unsigned long)fbram_phys; - - memset(fbi->screen_base, 0x0, fix->smem_len); - - mfd->op_enable = TRUE; - mfd->panel_power_on = FALSE; - - /* cursor memory allocation */ - if (mfd->cursor_update) { - mfd->cursor_buf = dma_alloc_coherent(NULL, - MDP_CURSOR_SIZE, - (dma_addr_t *) &mfd->cursor_buf_phys, - GFP_KERNEL); - if (!mfd->cursor_buf) - mfd->cursor_update = 0; - } - - if (mfd->lut_update) { - ret = fb_alloc_cmap(&fbi->cmap, 256, 0); - if (ret) - printk(KERN_ERR "%s: fb_alloc_cmap() failed!\n", - __func__); - } - - if (register_framebuffer(fbi) < 0) { - if (mfd->lut_update) - fb_dealloc_cmap(&fbi->cmap); - - if (mfd->cursor_buf) - dma_free_coherent(NULL, - MDP_CURSOR_SIZE, - mfd->cursor_buf, - (dma_addr_t) mfd->cursor_buf_phys); - - mfd->op_enable = FALSE; - return -EPERM; - } - - fbram += fix->smem_len; - fbram_phys += fix->smem_len; - fbram_size -= fix->smem_len; - - MSM_FB_INFO - ("FrameBuffer[%d] %dx%d size=%d bytes is registered successfully!\n", - mfd->index, fbi->var.xres, fbi->var.yres, fbi->fix.smem_len); - -#ifdef CONFIG_FB_MSM_LOGO - if (!load_565rle_image(INIT_IMAGE_FILE)) ; /* Flip buffer */ -#endif - ret = 0; - -#ifdef CONFIG_HAS_EARLYSUSPEND - mfd->early_suspend.suspend = msmfb_early_suspend; - mfd->early_suspend.resume = msmfb_early_resume; - mfd->early_suspend.level = EARLY_SUSPEND_LEVEL_DISABLE_FB - 2; - register_early_suspend(&mfd->early_suspend); -#endif - -#ifdef MSM_FB_ENABLE_DBGFS - { - struct dentry *root; - struct dentry *sub_dir; - char sub_name[2]; - - root = msm_fb_get_debugfs_root(); - if (root != NULL) { - sub_name[0] = (char)(mfd->index + 0x30); - sub_name[1] = '\0'; - sub_dir = debugfs_create_dir(sub_name, root); - } else { - sub_dir = NULL; - } - - mfd->sub_dir = sub_dir; - - if (sub_dir) { - msm_fb_debugfs_file_create(sub_dir, "op_enable", - (u32 *) &mfd->op_enable); - msm_fb_debugfs_file_create(sub_dir, "panel_power_on", - (u32 *) &mfd-> - panel_power_on); - msm_fb_debugfs_file_create(sub_dir, "ref_cnt", - (u32 *) &mfd->ref_cnt); - msm_fb_debugfs_file_create(sub_dir, "fb_imgType", - (u32 *) &mfd->fb_imgType); - msm_fb_debugfs_file_create(sub_dir, - "sw_currently_refreshing", - (u32 *) &mfd-> - sw_currently_refreshing); - msm_fb_debugfs_file_create(sub_dir, - "sw_refreshing_enable", - (u32 *) &mfd-> - sw_refreshing_enable); - - msm_fb_debugfs_file_create(sub_dir, "xres", - (u32 *) &mfd->panel_info. - xres); - msm_fb_debugfs_file_create(sub_dir, "yres", - (u32 *) &mfd->panel_info. - yres); - msm_fb_debugfs_file_create(sub_dir, "bpp", - (u32 *) &mfd->panel_info. - bpp); - msm_fb_debugfs_file_create(sub_dir, "type", - (u32 *) &mfd->panel_info. - type); - msm_fb_debugfs_file_create(sub_dir, "wait_cycle", - (u32 *) &mfd->panel_info. - wait_cycle); - msm_fb_debugfs_file_create(sub_dir, "pdest", - (u32 *) &mfd->panel_info. - pdest); - msm_fb_debugfs_file_create(sub_dir, "backbuff", - (u32 *) &mfd->panel_info. - fb_num); - msm_fb_debugfs_file_create(sub_dir, "clk_rate", - (u32 *) &mfd->panel_info. - clk_rate); - msm_fb_debugfs_file_create(sub_dir, "frame_count", - (u32 *) &mfd->panel_info. - frame_count); - - - switch (mfd->dest) { - case DISPLAY_LCD: - msm_fb_debugfs_file_create(sub_dir, - "vsync_enable", - (u32 *)&mfd->panel_info.lcd.vsync_enable); - msm_fb_debugfs_file_create(sub_dir, - "refx100", - (u32 *) &mfd->panel_info.lcd. refx100); - msm_fb_debugfs_file_create(sub_dir, - "v_back_porch", - (u32 *) &mfd->panel_info.lcd.v_back_porch); - msm_fb_debugfs_file_create(sub_dir, - "v_front_porch", - (u32 *) &mfd->panel_info.lcd.v_front_porch); - msm_fb_debugfs_file_create(sub_dir, - "v_pulse_width", - (u32 *) &mfd->panel_info.lcd.v_pulse_width); - msm_fb_debugfs_file_create(sub_dir, - "hw_vsync_mode", - (u32 *) &mfd->panel_info.lcd.hw_vsync_mode); - msm_fb_debugfs_file_create(sub_dir, - "vsync_notifier_period", (u32 *) - &mfd->panel_info.lcd.vsync_notifier_period); - break; - - case DISPLAY_LCDC: - msm_fb_debugfs_file_create(sub_dir, - "h_back_porch", - (u32 *) &mfd->panel_info.lcdc.h_back_porch); - msm_fb_debugfs_file_create(sub_dir, - "h_front_porch", - (u32 *) &mfd->panel_info.lcdc.h_front_porch); - msm_fb_debugfs_file_create(sub_dir, - "h_pulse_width", - (u32 *) &mfd->panel_info.lcdc.h_pulse_width); - msm_fb_debugfs_file_create(sub_dir, - "v_back_porch", - (u32 *) &mfd->panel_info.lcdc.v_back_porch); - msm_fb_debugfs_file_create(sub_dir, - "v_front_porch", - (u32 *) &mfd->panel_info.lcdc.v_front_porch); - msm_fb_debugfs_file_create(sub_dir, - "v_pulse_width", - (u32 *) &mfd->panel_info.lcdc.v_pulse_width); - msm_fb_debugfs_file_create(sub_dir, - "border_clr", - (u32 *) &mfd->panel_info.lcdc.border_clr); - msm_fb_debugfs_file_create(sub_dir, - "underflow_clr", - (u32 *) &mfd->panel_info.lcdc.underflow_clr); - msm_fb_debugfs_file_create(sub_dir, - "hsync_skew", - (u32 *) &mfd->panel_info.lcdc.hsync_skew); - break; - - default: - break; - } - } - } -#endif /* MSM_FB_ENABLE_DBGFS */ - - return ret; -} - -static int msm_fb_open(struct fb_info *info, int user) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if (!mfd->ref_cnt) { - mdp_set_dma_pan_info(info, NULL, TRUE); - - if (msm_fb_blank_sub(FB_BLANK_UNBLANK, info, mfd->op_enable)) { - printk(KERN_ERR "msm_fb_open: can't turn on display!\n"); - return -1; - } - } - - mfd->ref_cnt++; - return 0; -} - -static int msm_fb_release(struct fb_info *info, int user) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - int ret = 0; - - if (!mfd->ref_cnt) { - MSM_FB_INFO("msm_fb_release: try to close unopened fb %d!\n", - mfd->index); - return -EINVAL; - } - - mfd->ref_cnt--; - - if (!mfd->ref_cnt) { - if ((ret = - msm_fb_blank_sub(FB_BLANK_POWERDOWN, info, - mfd->op_enable)) != 0) { - printk(KERN_ERR "msm_fb_release: can't turn off display!\n"); - return ret; - } - } - - return ret; -} - -DEFINE_SEMAPHORE(msm_fb_pan_sem); - -static int msm_fb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info) -{ - struct mdp_dirty_region dirty; - struct mdp_dirty_region *dirtyPtr = NULL; - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if ((!mfd->op_enable) || (!mfd->panel_power_on)) - return -EPERM; - - if (var->xoffset > (info->var.xres_virtual - info->var.xres)) - return -EINVAL; - - if (var->yoffset > (info->var.yres_virtual - info->var.yres)) - return -EINVAL; - - if (info->fix.xpanstep) - info->var.xoffset = - (var->xoffset / info->fix.xpanstep) * info->fix.xpanstep; - - if (info->fix.ypanstep) - info->var.yoffset = - (var->yoffset / info->fix.ypanstep) * info->fix.ypanstep; - - /* "UPDT" */ - if (var->reserved[0] == 0x54445055) { - dirty.xoffset = var->reserved[1] & 0xffff; - dirty.yoffset = (var->reserved[1] >> 16) & 0xffff; - - if ((var->reserved[2] & 0xffff) <= dirty.xoffset) - return -EINVAL; - if (((var->reserved[2] >> 16) & 0xffff) <= dirty.yoffset) - return -EINVAL; - - dirty.width = (var->reserved[2] & 0xffff) - dirty.xoffset; - dirty.height = - ((var->reserved[2] >> 16) & 0xffff) - dirty.yoffset; - info->var.yoffset = var->yoffset; - - if (dirty.xoffset < 0) - return -EINVAL; - - if (dirty.yoffset < 0) - return -EINVAL; - - if ((dirty.xoffset + dirty.width) > info->var.xres) - return -EINVAL; - - if ((dirty.yoffset + dirty.height) > info->var.yres) - return -EINVAL; - - if ((dirty.width <= 0) || (dirty.height <= 0)) - return -EINVAL; - - dirtyPtr = &dirty; - } - - /* Flip */ - /* A constant value is used to indicate that we should change the DMA - output buffer instead of just panning */ - - if (var->reserved[0] == 0x466c6970) { - unsigned long length, address; - struct file *p_src_file; - struct mdp_img imgdata; - int bpp; - - if (mfd->allow_set_offset) { - imgdata.memory_id = var->reserved[1]; - imgdata.priv = var->reserved[2]; - - /* If there is no memory ID then we want to reset back - to the original fb visibility */ - if (var->reserved[1]) { - if (var->reserved[4] == MDP_BLIT_SRC_GEM) { - panic("waaaaaaaaaaaaaah"); - if ( /*get_gem_img(&imgdata, - (unsigned long *) &address, - &length)*/ -1 < 0) { - return -1; - } - } else { - /*get_img(&imgdata, info, &address, - &length, &p_src_file);*/ - panic("waaaaaah"); - } - mfd->ibuf.visible_swapped = TRUE; - } else { - /* Flip back to the original address - adjusted for xoffset and yoffset */ - - bpp = info->var.bits_per_pixel / 8; - address = (unsigned long) info->fix.smem_start; - address += info->var.xoffset * bpp + - info->var.yoffset * info->fix.line_length; - - mfd->ibuf.visible_swapped = FALSE; - } - - mdp_set_offset_info(info, address, - (var->activate == FB_ACTIVATE_VBL)); - - mfd->dma_fnc(mfd); - return 0; - } else - return -EINVAL; - } - - down(&msm_fb_pan_sem); - mdp_set_dma_pan_info(info, dirtyPtr, - (var->activate == FB_ACTIVATE_VBL)); - mdp_dma_pan_update(info); - up(&msm_fb_pan_sem); - - ++mfd->panel_info.frame_count; - return 0; -} - -static int msm_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - - if (var->rotate != FB_ROTATE_UR) - return -EINVAL; - if (var->grayscale != info->var.grayscale) - return -EINVAL; - - switch (var->bits_per_pixel) { - case 16: - if ((var->green.offset != 5) || - !((var->blue.offset == 11) - || (var->blue.offset == 0)) || - !((var->red.offset == 11) - || (var->red.offset == 0)) || - (var->blue.length != 5) || - (var->green.length != 6) || - (var->red.length != 5) || - (var->blue.msb_right != 0) || - (var->green.msb_right != 0) || - (var->red.msb_right != 0) || - (var->transp.offset != 0) || - (var->transp.length != 0)) - return -EINVAL; - break; - - case 24: - if ((var->blue.offset != 0) || - (var->green.offset != 8) || - (var->red.offset != 16) || - (var->blue.length != 8) || - (var->green.length != 8) || - (var->red.length != 8) || - (var->blue.msb_right != 0) || - (var->green.msb_right != 0) || - (var->red.msb_right != 0) || - !(((var->transp.offset == 0) && - (var->transp.length == 0)) || - ((var->transp.offset == 24) && - (var->transp.length == 8)))) - return -EINVAL; - break; - - default: - return -EINVAL; - } - - if ((var->xres_virtual <= 0) || (var->yres_virtual <= 0)) - return -EINVAL; - - if (info->fix.smem_len < - (var->xres_virtual*var->yres_virtual*(var->bits_per_pixel/8))) - return -EINVAL; - - if ((var->xres == 0) || (var->yres == 0)) - return -EINVAL; - - if ((var->xres > mfd->panel_info.xres) || - (var->yres > mfd->panel_info.yres)) - return -EINVAL; - - if (var->xoffset > (var->xres_virtual - var->xres)) - return -EINVAL; - - if (var->yoffset > (var->yres_virtual - var->yres)) - return -EINVAL; - - return 0; -} - -static int msm_fb_set_par(struct fb_info *info) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - struct fb_var_screeninfo *var = &info->var; - int old_imgType; - int blank = 0; - - old_imgType = mfd->fb_imgType; - switch (var->bits_per_pixel) { - case 16: - if (var->red.offset == 0) - mfd->fb_imgType = MDP_BGR_565; - else - mfd->fb_imgType = MDP_RGB_565; - break; - - case 24: - if ((var->transp.offset == 0) && (var->transp.length == 0)) - mfd->fb_imgType = MDP_RGB_888; - else if ((var->transp.offset == 24) && - (var->transp.length == 8)) { - mfd->fb_imgType = MDP_ARGB_8888; - info->var.bits_per_pixel = 32; - } - break; - - default: - return -EINVAL; - } - - if ((mfd->var_pixclock != var->pixclock) || - (mfd->hw_refresh && ((mfd->fb_imgType != old_imgType) || - (mfd->var_pixclock != var->pixclock) || - (mfd->var_xres != var->xres) || - (mfd->var_yres != var->yres)))) { - mfd->var_xres = var->xres; - mfd->var_yres = var->yres; - mfd->var_pixclock = var->pixclock; - blank = 1; - } - - if (blank) { - msm_fb_blank_sub(FB_BLANK_POWERDOWN, info, mfd->op_enable); - msm_fb_blank_sub(FB_BLANK_UNBLANK, info, mfd->op_enable); - } - - return 0; -} - -static int msm_fb_stop_sw_refresher(struct msm_fb_data_type *mfd) -{ - if (mfd->hw_refresh) - return -EPERM; - - if (mfd->sw_currently_refreshing) { - down(&mfd->sem); - mfd->sw_currently_refreshing = FALSE; - up(&mfd->sem); - - /* wait until the refresher finishes the last job */ - wait_for_completion_killable(&mfd->refresher_comp); - } - - return 0; -} - -int msm_fb_resume_sw_refresher(struct msm_fb_data_type *mfd) -{ - boolean do_refresh; - - if (mfd->hw_refresh) - return -EPERM; - - down(&mfd->sem); - if ((!mfd->sw_currently_refreshing) && (mfd->sw_refreshing_enable)) { - do_refresh = TRUE; - mfd->sw_currently_refreshing = TRUE; - } else { - do_refresh = FALSE; - } - up(&mfd->sem); - - if (do_refresh) - mdp_refresh_screen((unsigned long)mfd); - - return 0; -} - -void mdp_ppp_put_img(struct file *p_src_file, struct file *p_dst_file) -{ -#ifdef CONFIG_ANDROID_PMEM - if (p_src_file) - put_pmem_file(p_src_file); - if (p_dst_file) - put_pmem_file(p_dst_file); -#endif -} - -int mdp_blit(struct fb_info *info, struct mdp_blit_req *req) -{ - int ret; - struct file *p_src_file = 0, *p_dst_file = 0; - if (unlikely(req->src_rect.h == 0 || req->src_rect.w == 0)) { - printk(KERN_ERR "mpd_ppp: src img of zero size!\n"); - return -EINVAL; - } - if (unlikely(req->dst_rect.h == 0 || req->dst_rect.w == 0)) - return 0; - - ret = mdp_ppp_blit(info, req, &p_src_file, &p_dst_file); - mdp_ppp_put_img(p_src_file, p_dst_file); - return ret; -} - -typedef void (*msm_dma_barrier_function_pointer) (void *, size_t); - -static inline void msm_fb_dma_barrier_for_rect(struct fb_info *info, - struct mdp_img *img, struct mdp_rect *rect, - msm_dma_barrier_function_pointer dma_barrier_fp - ) -{ - /* - * Compute the start and end addresses of the rectangles. - * NOTE: As currently implemented, the data between - * the end of one row and the start of the next is - * included in the address range rather than - * doing multiple calls for each row. - */ - - char * const pmem_start = info->screen_base; -/* int bytes_per_pixel = mdp_get_bytes_per_pixel(img->format); - unsigned long start = (unsigned long)pmem_start + img->offset + - (img->width * rect->y + rect->x) * bytes_per_pixel; - size_t size = ((rect->h - 1) * img->width + rect->w) * bytes_per_pixel; - (*dma_barrier_fp) ((void *) start, size); -*/ - panic("waaaaah"); -} - -static inline void msm_dma_nc_pre(void) -{ - dmb(); -} -static inline void msm_dma_wt_pre(void) -{ - dmb(); -} -static inline void msm_dma_todevice_wb_pre(void *start, size_t size) -{ - #warning this -// dma_cache_pre_ops(start, size, DMA_TO_DEVICE); -} - -static inline void msm_dma_fromdevice_wb_pre(void *start, size_t size) -{ - #warning this -// dma_cache_pre_ops(start, size, DMA_FROM_DEVICE); -} - -static inline void msm_dma_nc_post(void) -{ - dmb(); -} - -static inline void msm_dma_fromdevice_wt_post(void *start, size_t size) -{ - #warning this -// dma_cache_post_ops(start, size, DMA_FROM_DEVICE); -} - -static inline void msm_dma_todevice_wb_post(void *start, size_t size) -{ - #warning this -// dma_cache_post_ops(start, size, DMA_TO_DEVICE); -} - -static inline void msm_dma_fromdevice_wb_post(void *start, size_t size) -{ - #warning this -// dma_cache_post_ops(start, size, DMA_FROM_DEVICE); -} - -/* - * Do the write barriers required to guarantee data is committed to RAM - * (from CPU cache or internal buffers) before a DMA operation starts. - * NOTE: As currently implemented, the data between - * the end of one row and the start of the next is - * included in the address range rather than - * doing multiple calls for each row. -*/ -static void msm_fb_ensure_memory_coherency_before_dma(struct fb_info *info, - struct mdp_blit_req *req_list, - int req_list_count) -{ -#ifdef CONFIG_ARCH_QSD8X50 - int i; - - /* - * Normally, do the requested barriers for each address - * range that corresponds to a rectangle. - * - * But if at least one write barrier is requested for data - * going to or from the device but no address range is - * needed for that barrier, then do the barrier, but do it - * only once, no matter how many requests there are. - */ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - switch (mfd->mdp_fb_page_protection) { - default: - case MDP_FB_PAGE_PROTECTION_NONCACHED: - case MDP_FB_PAGE_PROTECTION_WRITECOMBINE: - /* - * The following barrier is only done at most once, - * since further calls would be redundant. - */ - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags - & MDP_NO_DMA_BARRIER_START)) { - msm_dma_nc_pre(); - break; - } - } - break; - - case MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE: - /* - * The following barrier is only done at most once, - * since further calls would be redundant. - */ - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags - & MDP_NO_DMA_BARRIER_START)) { - msm_dma_wt_pre(); - break; - } - } - break; - - case MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE: - case MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE: - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags & - MDP_NO_DMA_BARRIER_START)) { - - msm_fb_dma_barrier_for_rect(info, - &(req_list[i].src), - &(req_list[i].src_rect), - msm_dma_todevice_wb_pre - ); - - msm_fb_dma_barrier_for_rect(info, - &(req_list[i].dst), - &(req_list[i].dst_rect), - msm_dma_todevice_wb_pre - ); - } - } - break; - } -#else - dmb(); -#endif -} - - -/* - * Do the write barriers required to guarantee data will be re-read from RAM by - * the CPU after a DMA operation ends. - * NOTE: As currently implemented, the data between - * the end of one row and the start of the next is - * included in the address range rather than - * doing multiple calls for each row. -*/ -static void msm_fb_ensure_memory_coherency_after_dma(struct fb_info *info, - struct mdp_blit_req *req_list, - int req_list_count) -{ -#ifdef CONFIG_ARCH_QSD8X50 - int i; - - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - switch (mfd->mdp_fb_page_protection) { - default: - case MDP_FB_PAGE_PROTECTION_NONCACHED: - case MDP_FB_PAGE_PROTECTION_WRITECOMBINE: - /* - * The following barrier is only done at most once, - * since further calls would be redundant. - */ - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags - & MDP_NO_DMA_BARRIER_END)) { - msm_dma_nc_post(); - break; - } - } - break; - - case MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE: - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags & - MDP_NO_DMA_BARRIER_END)) { - - msm_fb_dma_barrier_for_rect(info, - &(req_list[i].dst), - &(req_list[i].dst_rect), - msm_dma_fromdevice_wt_post - ); - } - } - break; - case MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE: - case MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE: - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags & - MDP_NO_DMA_BARRIER_END)) { - - msm_fb_dma_barrier_for_rect(info, - &(req_list[i].dst), - &(req_list[i].dst_rect), - msm_dma_fromdevice_wb_post - ); - } - } - break; - } -#else - dmb(); -#endif -} - -#ifdef CONFIG_MDP_PPP_ASYNC_OP -void msm_fb_ensure_mem_coherency_after_dma(struct fb_info *info, - struct mdp_blit_req *req_list, int req_list_count) -{ - BUG_ON(!info); - - /* - * Ensure that CPU cache and other internal CPU state is - * updated to reflect any change in memory modified by MDP blit - * DMA. - */ - msm_fb_ensure_memory_coherency_after_dma(info, - req_list, req_list_count); -} - -static int msmfb_async_blit(struct fb_info *info, void __user *p) -{ - /* - * CAUTION: The names of the struct types intentionally *DON'T* match - * the names of the variables declared -- they appear to be swapped. - * Read the code carefully and you should see that the variable names - * make sense. - */ - const int MAX_LIST_WINDOW = 16; - struct mdp_blit_req req_list[MAX_LIST_WINDOW]; - struct mdp_blit_req_list req_list_header; - - int count, i, req_list_count; - - /* Get the count size for the total BLIT request. */ - if (copy_from_user(&req_list_header, p, sizeof(req_list_header))) - return -EFAULT; - p += sizeof(req_list_header); - count = req_list_header.count; - while (count > 0) { - /* - * Access the requests through a narrow window to decrease copy - * overhead and make larger requests accessible to the - * coherency management code. - * NOTE: The window size is intended to be larger than the - * typical request size, but not require more than 2 - * kbytes of stack storage. - */ - req_list_count = count; - if (req_list_count > MAX_LIST_WINDOW) - req_list_count = MAX_LIST_WINDOW; - if (copy_from_user(&req_list, p, - sizeof(struct mdp_blit_req)*req_list_count)) - return -EFAULT; - - /* - * Ensure that any data CPU may have previously written to - * internal state (but not yet committed to memory) is - * guaranteed to be committed to memory now. - */ - msm_fb_ensure_memory_coherency_before_dma(info, - req_list, req_list_count); - - /* - * Do the blit DMA, if required -- returning early only if - * there is a failure. - */ - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags & MDP_NO_BLIT)) { - int ret = 0; - struct mdp_ppp_djob *job = NULL; - - if (unlikely(req_list[i].src_rect.h == 0 || - req_list[i].src_rect.w == 0)) { - MSM_FB_ERR("mpd_ppp: " - "src img of zero size!\n"); - return -EINVAL; - } - - if (unlikely(req_list[i].dst_rect.h == 0 || - req_list[i].dst_rect.w == 0)) - continue; - - /* create a new display job */ - job = mdp_ppp_new_djob(); - if (unlikely(!job)) - return -ENOMEM; - - job->info = info; - memcpy(&job->req, &req_list[i], - sizeof(struct mdp_blit_req)); - - /* Do the actual blit. */ - ret = mdp_ppp_blit(info, &job->req, - &job->p_src_file, &job->p_dst_file); - - /* - * Note that early returns don't guarantee - * memory coherency. - */ - if (ret || mdp_ppp_get_ret_code()) { - mdp_ppp_clear_curr_djob(); - return ret; - } - } - } - - /* Go to next window of requests. */ - count -= req_list_count; - p += sizeof(struct mdp_blit_req)*req_list_count; - } - return 0; -} -#else - -/* - * NOTE: The userspace issues blit operations in a sequence, the sequence - * start with a operation marked START and ends in an operation marked - * END. It is guaranteed by the userspace that all the blit operations - * between START and END are only within the regions of areas designated - * by the START and END operations and that the userspace doesn't modify - * those areas. Hence it would be enough to perform barrier/cache operations - * only on the START and END operations. - */ -static int msmfb_blit(struct fb_info *info, void __user *p) -{ - /* - * CAUTION: The names of the struct types intentionally *DON'T* match - * the names of the variables declared -- they appear to be swapped. - * Read the code carefully and you should see that the variable names - * make sense. - */ - const int MAX_LIST_WINDOW = 16; - struct mdp_blit_req req_list[MAX_LIST_WINDOW]; - struct mdp_blit_req_list req_list_header; - - int count, i, req_list_count; - - /* Get the count size for the total BLIT request. */ - if (copy_from_user(&req_list_header, p, sizeof(req_list_header))) - return -EFAULT; - p += sizeof(req_list_header); - count = req_list_header.count; - while (count > 0) { - /* - * Access the requests through a narrow window to decrease copy - * overhead and make larger requests accessible to the - * coherency management code. - * NOTE: The window size is intended to be larger than the - * typical request size, but not require more than 2 - * kbytes of stack storage. - */ - req_list_count = count; - if (req_list_count > MAX_LIST_WINDOW) - req_list_count = MAX_LIST_WINDOW; - if (copy_from_user(&req_list, p, - sizeof(struct mdp_blit_req)*req_list_count)) - return -EFAULT; - - /* - * Ensure that any data CPU may have previously written to - * internal state (but not yet committed to memory) is - * guaranteed to be committed to memory now. - */ - msm_fb_ensure_memory_coherency_before_dma(info, - req_list, req_list_count); - - /* - * Do the blit DMA, if required -- returning early only if - * there is a failure. - */ - for (i = 0; i < req_list_count; i++) { - if (!(req_list[i].flags & MDP_NO_BLIT)) { - /* Do the actual blit. */ - int ret = mdp_blit(info, &(req_list[i])); - - /* - * Note that early returns don't guarantee - * memory coherency. - */ - if (ret) - return ret; - } - } - - /* - * Ensure that CPU cache and other internal CPU state is - * updated to reflect any change in memory modified by MDP blit - * DMA. - */ - msm_fb_ensure_memory_coherency_after_dma(info, - req_list, - req_list_count); - - /* Go to next window of requests. */ - count -= req_list_count; - p += sizeof(struct mdp_blit_req)*req_list_count; - } - return 0; -} -#endif - -#ifdef CONFIG_FB_MSM_OVERLAY -static int msmfb_overlay_get(struct fb_info *info, void __user *p) -{ - struct mdp_overlay req; - int ret; - - if (copy_from_user(&req, p, sizeof(req))) - return -EFAULT; - - ret = mdp4_overlay_get(info, &req); - if (ret) { - printk(KERN_ERR "%s: ioctl failed \n", - __func__); - return ret; - } - if (copy_to_user(p, &req, sizeof(req))) { - printk(KERN_ERR "%s: copy2user failed \n", - __func__); - return -EFAULT; - } - - return 0; -} - -static int msmfb_overlay_set(struct fb_info *info, void __user *p) -{ - struct mdp_overlay req; - int ret; - - if (copy_from_user(&req, p, sizeof(req))) - return -EFAULT; - - ret = mdp4_overlay_set(info, &req); - if (ret) { - printk(KERN_ERR "%s:ioctl failed \n", - __func__); - return ret; - } - - if (copy_to_user(p, &req, sizeof(req))) { - printk(KERN_ERR "%s: copy2user failed \n", - __func__); - return -EFAULT; - } - - return 0; -} - -static int msmfb_overlay_unset(struct fb_info *info, unsigned long *argp) -{ - int ret, ndx; - - ret = copy_from_user(&ndx, argp, sizeof(ndx)); - if (ret) { - printk(KERN_ERR "%s:msmfb_overlay_unset ioctl failed \n", - __func__); - return ret; - } - - return mdp4_overlay_unset(info, ndx); -} - -static int msmfb_overlay_play(struct fb_info *info, unsigned long *argp) -{ - int ret; - struct msmfb_overlay_data req; - struct file *p_src_file = 0; - - ret = copy_from_user(&req, argp, sizeof(req)); - if (ret) { - printk(KERN_ERR "%s:msmfb_overlay_play ioctl failed \n", - __func__); - return ret; - } - - ret = mdp4_overlay_play(info, &req, &p_src_file); - - if (p_src_file) - put_pmem_file(p_src_file); - - return ret; -} - -#endif - -DEFINE_SEMAPHORE(msm_fb_ioctl_ppp_sem); -DEFINE_MUTEX(msm_fb_ioctl_lut_sem); -DEFINE_MUTEX(msm_fb_ioctl_hist_sem); - -/* Set color conversion matrix from user space */ - -#ifndef CONFIG_FB_MSM_MDP40 -static void msmfb_set_color_conv(struct mdp_ccs *p) -{ - int i; - - if (p->direction == MDP_CCS_RGB2YUV) { - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - /* RGB->YUV primary forward matrix */ - for (i = 0; i < MDP_CCS_SIZE; i++) - writel(p->ccs[i], MDP_CSC_PFMVn(i)); - - #ifdef CONFIG_FB_MSM_MDP31 - for (i = 0; i < MDP_BV_SIZE; i++) - writel(p->bv[i], MDP_CSC_POST_BV2n(i)); - #endif - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - } else { - /* MDP cmd block enable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - - /* YUV->RGB primary reverse matrix */ - for (i = 0; i < MDP_CCS_SIZE; i++) - writel(p->ccs[i], MDP_CSC_PRMVn(i)); - for (i = 0; i < MDP_BV_SIZE; i++) - writel(p->bv[i], MDP_CSC_PRE_BV1n(i)); - - /* MDP cmd block disable */ - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE); - } -} -#endif - - -static int msm_fb_ioctl(struct fb_info *info, unsigned int cmd, - unsigned long arg) -{ - struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par; - void __user *argp = (void __user *)arg; - struct fb_cursor cursor; - struct fb_cmap cmap; - struct mdp_histogram hist; -#ifndef CONFIG_FB_MSM_MDP40 - struct mdp_ccs ccs_matrix; -#endif - struct mdp_page_protection fb_page_protection; - int ret = 0; - - if (!mfd->op_enable) - return -EPERM; - - switch (cmd) { -#ifdef CONFIG_FB_MSM_OVERLAY - case MSMFB_OVERLAY_GET: - down(&msm_fb_ioctl_ppp_sem); - ret = msmfb_overlay_get(info, argp); - up(&msm_fb_ioctl_ppp_sem); - break; - case MSMFB_OVERLAY_SET: - down(&msm_fb_ioctl_ppp_sem); - ret = msmfb_overlay_set(info, argp); - up(&msm_fb_ioctl_ppp_sem); - break; - case MSMFB_OVERLAY_UNSET: - down(&msm_fb_ioctl_ppp_sem); - ret = msmfb_overlay_unset(info, argp); - up(&msm_fb_ioctl_ppp_sem); - break; - case MSMFB_OVERLAY_PLAY: - down(&msm_fb_ioctl_ppp_sem); - ret = msmfb_overlay_play(info, argp); - up(&msm_fb_ioctl_ppp_sem); - break; -#endif - case MSMFB_BLIT: - down(&msm_fb_ioctl_ppp_sem); -#ifdef CONFIG_MDP_PPP_ASYNC_OP - ret = msmfb_async_blit(info, argp); - mdp_ppp_wait(); /* Wait for all blits to be finished. */ -#else - ret = msmfb_blit(info, argp); -#endif - up(&msm_fb_ioctl_ppp_sem); - - break; - - /* Ioctl for setting ccs matrix from user space */ - case MSMFB_SET_CCS_MATRIX: -#ifndef CONFIG_FB_MSM_MDP40 - ret = copy_from_user(&ccs_matrix, argp, sizeof(ccs_matrix)); - if (ret) { - printk(KERN_ERR - "%s:MSMFB_SET_CCS_MATRIX ioctl failed \n", - __func__); - return ret; - } - - down(&msm_fb_ioctl_ppp_sem); - if (ccs_matrix.direction == MDP_CCS_RGB2YUV) - mdp_ccs_rgb2yuv = ccs_matrix; - else - mdp_ccs_yuv2rgb = ccs_matrix; - - msmfb_set_color_conv(&ccs_matrix) ; - up(&msm_fb_ioctl_ppp_sem); -#else - ret = -EINVAL; -#endif - - break; - - /* Ioctl for getting ccs matrix to user space */ - case MSMFB_GET_CCS_MATRIX: -#ifndef CONFIG_FB_MSM_MDP40 - ret = copy_from_user(&ccs_matrix, argp, sizeof(ccs_matrix)) ; - if (ret) { - printk(KERN_ERR - "%s:MSMFB_GET_CCS_MATRIX ioctl failed \n", - __func__); - return ret; - } - - down(&msm_fb_ioctl_ppp_sem); - if (ccs_matrix.direction == MDP_CCS_RGB2YUV) - ccs_matrix = mdp_ccs_rgb2yuv; - else - ccs_matrix = mdp_ccs_yuv2rgb; - - ret = copy_to_user(argp, &ccs_matrix, sizeof(ccs_matrix)); - - if (ret) { - printk(KERN_ERR - "%s:MSMFB_GET_CCS_MATRIX ioctl failed \n", - __func__); - return ret ; - } - up(&msm_fb_ioctl_ppp_sem); -#else - ret = -EINVAL; -#endif - - break; - -#ifdef CONFIG_MDP_PPP_ASYNC_OP - case MSMFB_ASYNC_BLIT: - down(&msm_fb_ioctl_ppp_sem); - ret = msmfb_async_blit(info, argp); - up(&msm_fb_ioctl_ppp_sem); - break; - - case MSMFB_BLIT_FLUSH: - down(&msm_fb_ioctl_ppp_sem); - mdp_ppp_wait(); - up(&msm_fb_ioctl_ppp_sem); - break; -#endif - - case MSMFB_GRP_DISP: -#ifdef CONFIG_FB_MSM_MDP22 - { - unsigned long grp_id; - - ret = copy_from_user(&grp_id, argp, sizeof(grp_id)); - if (ret) - return ret; - - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE); - writel(grp_id, MDP_FULL_BYPASS_WORD43); - mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, - FALSE); - break; - } -#else - return -EFAULT; -#endif - case MSMFB_SUSPEND_SW_REFRESHER: - if (!mfd->panel_power_on) - return -EPERM; - - mfd->sw_refreshing_enable = FALSE; - ret = msm_fb_stop_sw_refresher(mfd); - break; - - case MSMFB_RESUME_SW_REFRESHER: - if (!mfd->panel_power_on) - return -EPERM; - - mfd->sw_refreshing_enable = TRUE; - ret = msm_fb_resume_sw_refresher(mfd); - break; - - case MSMFB_CURSOR: - ret = copy_from_user(&cursor, argp, sizeof(cursor)); - if (ret) - return ret; - - ret = msm_fb_cursor(info, &cursor); - break; - - case MSMFB_SET_LUT: - ret = copy_from_user(&cmap, argp, sizeof(cmap)); - if (ret) - return ret; - - mutex_lock(&msm_fb_ioctl_lut_sem); - ret = msm_fb_set_lut(&cmap, info); - mutex_unlock(&msm_fb_ioctl_lut_sem); - break; - - case MSMFB_HISTOGRAM: - if (!mfd->do_histogram) - return -ENODEV; - - ret = copy_from_user(&hist, argp, sizeof(hist)); - if (ret) - return ret; - - mutex_lock(&msm_fb_ioctl_hist_sem); - ret = mfd->do_histogram(info, &hist); - mutex_unlock(&msm_fb_ioctl_hist_sem); - break; - - case MSMFB_GET_PAGE_PROTECTION: - fb_page_protection.page_protection - = mfd->mdp_fb_page_protection; - ret = copy_to_user(argp, &fb_page_protection, - sizeof(fb_page_protection)); - if (ret) - return ret; - break; - - case MSMFB_SET_PAGE_PROTECTION: -#ifdef CONFIG_ARCH_QSD8X50 - ret = copy_from_user(&fb_page_protection, argp, - sizeof(fb_page_protection)); - if (ret) - return ret; - - /* Validate the proposed page protection settings. */ - switch (fb_page_protection.page_protection) { - case MDP_FB_PAGE_PROTECTION_NONCACHED: - case MDP_FB_PAGE_PROTECTION_WRITECOMBINE: - case MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE: - /* Write-back cache (read allocate) */ - case MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE: - /* Write-back cache (write allocate) */ - case MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE: - mfd->mdp_fb_page_protection = - fb_page_protection.page_protection; - break; - default: - ret = -EINVAL; - break; - } -#else - /* - * Don't allow caching until 7k DMA cache operations are - * available. - */ - ret = -EINVAL; -#endif - break; - - default: - MSM_FB_INFO("MDP: unknown ioctl (cmd=%d) received!\n", cmd); - ret = -EINVAL; - break; - } - - return ret; -} - -static int msm_fb_register_driver(void) -{ - return platform_driver_register(&msm_fb_driver); -} - -void msm_fb_add_device(struct platform_device *pdev) -{ - struct msm_fb_panel_data *pdata; - struct platform_device *this_dev = NULL; - struct fb_info *fbi; - struct msm_fb_data_type *mfd = NULL; - u32 type, id, fb_num; - - if (!pdev) - return; - id = pdev->id; - - pdata = pdev->dev.platform_data; - if (!pdata) - return; - type = pdata->panel_info.type; - fb_num = pdata->panel_info.fb_num; - - if (fb_num <= 0) - return; - - if (fbi_list_index >= MAX_FBI_LIST) { - printk(KERN_ERR "msm_fb: no more framebuffer info list!\n"); - return; - } - /* - * alloc panel device data - */ - this_dev = msm_fb_device_alloc(pdata, type, id); - - if (!this_dev) { - printk(KERN_ERR - "%s: msm_fb_device_alloc failed!\n", __func__); - return; - } - - /* - * alloc framebuffer info + par data - */ - fbi = framebuffer_alloc(sizeof(struct msm_fb_data_type), NULL); - if (fbi == NULL) { - platform_device_put(this_dev); - printk(KERN_ERR "msm_fb: can't alloca framebuffer info data!\n"); - return; - } - - mfd = (struct msm_fb_data_type *)fbi->par; - mfd->key = MFD_KEY; - mfd->fbi = fbi; - mfd->panel.type = type; - mfd->panel.id = id; - mfd->fb_page = fb_num; - mfd->index = fbi_list_index; - mfd->mdp_fb_page_protection = MDP_FB_PAGE_PROTECTION_WRITECOMBINE; - - /* link to the latest pdev */ - mfd->pdev = this_dev; - - mfd_list[mfd_list_index++] = mfd; - fbi_list[fbi_list_index++] = fbi; - - /* - * set driver data - */ - platform_set_drvdata(this_dev, mfd); - - if (platform_device_add(this_dev)) { - printk(KERN_ERR "msm_fb: platform_device_add failed!\n"); - platform_device_put(this_dev); - framebuffer_release(fbi); - fbi_list_index--; - return; - } -} -EXPORT_SYMBOL(msm_fb_add_device); - -int __init msm_fb_init(void) -{ - int rc = -ENODEV; - - if (msm_fb_register_driver()) - return rc; - -#ifdef MSM_FB_ENABLE_DBGFS - { - struct dentry *root; - - if ((root = msm_fb_get_debugfs_root()) != NULL) { - msm_fb_debugfs_file_create(root, - "msm_fb_msg_printing_level", - (u32 *) &msm_fb_msg_level); - msm_fb_debugfs_file_create(root, - "mddi_msg_printing_level", - (u32 *) &mddi_msg_level); - msm_fb_debugfs_file_create(root, "msm_fb_debug_enabled", - (u32 *) &msm_fb_debug_enabled); - } - } -#endif - - return 0; -} - -module_init(msm_fb_init); diff --git a/drivers/staging/msm/msm_fb.h b/drivers/staging/msm/msm_fb.h deleted file mode 100644 index 0441aa9..0000000 --- a/drivers/staging/msm/msm_fb.h +++ /dev/null @@ -1,158 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MSM_FB_H -#define MSM_FB_H - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include - -#ifdef CONFIG_HAS_EARLYSUSPEND -#include -#endif - -#include "msm_fb_panel.h" -#include "mdp.h" - -#define MSM_FB_DEFAULT_PAGE_SIZE 2 -#define MFD_KEY 0x11161126 -#define MSM_FB_MAX_DEV_LIST 32 - -struct disp_info_type_suspend { - boolean op_enable; - boolean sw_refreshing_enable; - boolean panel_power_on; -}; - -struct msm_fb_data_type { - __u32 key; - __u32 index; - __u32 ref_cnt; - __u32 fb_page; - - panel_id_type panel; - struct msm_panel_info panel_info; - - DISP_TARGET dest; - struct fb_info *fbi; - - boolean op_enable; - uint32 fb_imgType; - boolean sw_currently_refreshing; - boolean sw_refreshing_enable; - boolean hw_refresh; - - MDPIBUF ibuf; - boolean ibuf_flushed; - struct timer_list refresh_timer; - struct completion refresher_comp; - - boolean pan_waiting; - struct completion pan_comp; - - /* vsync */ - boolean use_mdp_vsync; - __u32 vsync_gpio; - __u32 total_lcd_lines; - __u32 total_porch_lines; - __u32 lcd_ref_usec_time; - __u32 refresh_timer_duration; - - struct hrtimer dma_hrtimer; - - boolean panel_power_on; - struct work_struct dma_update_worker; - struct semaphore sem; - - struct timer_list vsync_resync_timer; - boolean vsync_handler_pending; - struct work_struct vsync_resync_worker; - - ktime_t last_vsync_timetick; - - __u32 *vsync_width_boundary; - - unsigned int pmem_id; - struct disp_info_type_suspend suspend; - - __u32 channel_irq; - - struct mdp_dma_data *dma; - void (*dma_fnc) (struct msm_fb_data_type *mfd); - int (*cursor_update) (struct fb_info *info, - struct fb_cursor *cursor); - int (*lut_update) (struct fb_info *info, - struct fb_cmap *cmap); - int (*do_histogram) (struct fb_info *info, - struct mdp_histogram *hist); - void *cursor_buf; - void *cursor_buf_phys; - - void *cmd_port; - void *data_port; - void *data_port_phys; - - __u32 bl_level; - - struct platform_device *pdev; - - __u32 var_xres; - __u32 var_yres; - __u32 var_pixclock; - -#ifdef MSM_FB_ENABLE_DBGFS - struct dentry *sub_dir; -#endif - -#ifdef CONFIG_HAS_EARLYSUSPEND - struct early_suspend early_suspend; - struct early_suspend mddi_early_suspend; - struct early_suspend mddi_ext_early_suspend; -#endif - u32 mdp_fb_page_protection; - int allow_set_offset; -}; - -struct dentry *msm_fb_get_debugfs_root(void); -void msm_fb_debugfs_file_create(struct dentry *root, const char *name, - u32 *var); -void msm_fb_set_backlight(struct msm_fb_data_type *mfd, __u32 bkl_lvl, - u32 save); - -void msm_fb_add_device(struct platform_device *pdev); - -int msm_fb_detect_client(const char *name); - -#ifdef CONFIG_FB_BACKLIGHT -void msm_fb_config_backlight(struct msm_fb_data_type *mfd); -#endif - -#endif /* MSM_FB_H */ diff --git a/drivers/staging/msm/msm_fb_bl.c b/drivers/staging/msm/msm_fb_bl.c deleted file mode 100644 index 9c8cb88..0000000 --- a/drivers/staging/msm/msm_fb_bl.c +++ /dev/null @@ -1,78 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb.h" - -static int msm_fb_bl_get_brightness(struct backlight_device *pbd) -{ - return pbd->props.brightness; -} - -static int msm_fb_bl_update_status(struct backlight_device *pbd) -{ - struct msm_fb_data_type *mfd = bl_get_data(pbd); - __u32 bl_lvl; - - bl_lvl = pbd->props.brightness; - bl_lvl = mfd->fbi->bl_curve[bl_lvl]; - msm_fb_set_backlight(mfd, bl_lvl, 1); - return 0; -} - -static const struct backlight_ops msm_fb_bl_ops = { - .get_brightness = msm_fb_bl_get_brightness, - .update_status = msm_fb_bl_update_status, -}; - -void msm_fb_config_backlight(struct msm_fb_data_type *mfd) -{ - struct msm_fb_panel_data *pdata; - struct backlight_device *pbd; - struct fb_info *fbi; - char name[16]; - - fbi = mfd->fbi; - pdata = (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data; - - if ((pdata) && (pdata->set_backlight)) { - snprintf(name, sizeof(name), "msmfb_bl%d", mfd->index); - pbd = - backlight_device_register(name, fbi->dev, mfd, - &msm_fb_bl_ops); - if (!IS_ERR(pbd)) { - fbi->bl_dev = pbd; - fb_bl_default_curve(fbi, - 0, - mfd->panel_info.bl_min, - mfd->panel_info.bl_max); - pbd->props.max_brightness = FB_BACKLIGHT_LEVELS - 1; - pbd->props.brightness = FB_BACKLIGHT_LEVELS - 1; - backlight_update_status(pbd); - } else { - fbi->bl_dev = NULL; - printk(KERN_ERR "msm_fb: backlight_device_register failed!\n"); - } - } -} diff --git a/drivers/staging/msm/msm_fb_def.h b/drivers/staging/msm/msm_fb_def.h deleted file mode 100644 index 8b4626f..0000000 --- a/drivers/staging/msm/msm_fb_def.h +++ /dev/null @@ -1,180 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MSM_FB_DEF_H -#define MSM_FB_DEF_H - -#include -#include -#include -#include -#include -#include -#include -#include "msm_mdp.h" -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -typedef s64 int64; -typedef s32 int32; -typedef s16 int16; -typedef s8 int8; - -typedef u64 uint64; -typedef u32 uint32; -typedef u16 uint16; -typedef u8 uint8; - -typedef s32 int4; -typedef s16 int2; -typedef s8 int1; - -typedef u32 uint4; -typedef u16 uint2; -typedef u8 uint1; - -typedef u32 dword; -typedef u16 word; -typedef u8 byte; - -typedef unsigned int boolean; - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#define MSM_FB_ENABLE_DBGFS -#define FEATURE_MDDI - -#define outp32(addr, val) writel(val, addr) -#define outp16(addr, val) writew(val, addr) -#define outp8(addr, val) writeb(val, addr) -#define outp(addr, val) outp32(addr, val) - -#ifndef MAX -#define MAX( x, y ) (((x) > (y)) ? (x) : (y)) -#endif - -#ifndef MIN -#define MIN( x, y ) (((x) < (y)) ? (x) : (y)) -#endif - -/*--------------------------------------------------------------------------*/ - -#define inp32(addr) readl(addr) -#define inp16(addr) readw(addr) -#define inp8(addr) readb(addr) -#define inp(addr) inp32(addr) - -#define inpw(port) readw(port) -#define outpw(port, val) writew(val, port) -#define inpdw(port) readl(port) -#define outpdw(port, val) writel(val, port) - - -#define clk_busy_wait(x) msleep_interruptible((x)/1000) - -#define memory_barrier() - -#define assert(expr) \ - if(!(expr)) { \ - printk(KERN_ERR "msm_fb: assertion failed! %s,%s,%s,line=%d\n",\ - #expr, __FILE__, __func__, __LINE__); \ - } - -#define ASSERT(x) assert(x) - -#define DISP_EBI2_LOCAL_DEFINE -#ifdef DISP_EBI2_LOCAL_DEFINE -#define LCD_PRIM_BASE_PHYS 0x98000000 -#define LCD_SECD_BASE_PHYS 0x9c000000 -#define EBI2_PRIM_LCD_RS_PIN 0x20000 -#define EBI2_SECD_LCD_RS_PIN 0x20000 - -#define EBI2_PRIM_LCD_CLR 0xC0 -#define EBI2_PRIM_LCD_SEL 0x40 - -#define EBI2_SECD_LCD_CLR 0x300 -#define EBI2_SECD_LCD_SEL 0x100 -#endif - -extern u32 msm_fb_msg_level; - -/* - * Message printing priorities: - * LEVEL 0 KERN_EMERG (highest priority) - * LEVEL 1 KERN_ALERT - * LEVEL 2 KERN_CRIT - * LEVEL 3 KERN_ERR - * LEVEL 4 KERN_WARNING - * LEVEL 5 KERN_NOTICE - * LEVEL 6 KERN_INFO - * LEVEL 7 KERN_DEBUG (Lowest priority) - */ -#define MSM_FB_EMERG(msg, ...) \ - if (msm_fb_msg_level > 0) \ - printk(KERN_EMERG msg, ## __VA_ARGS__); -#define MSM_FB_ALERT(msg, ...) \ - if (msm_fb_msg_level > 1) \ - printk(KERN_ALERT msg, ## __VA_ARGS__); -#define MSM_FB_CRIT(msg, ...) \ - if (msm_fb_msg_level > 2) \ - printk(KERN_CRIT msg, ## __VA_ARGS__); -#define MSM_FB_ERR(msg, ...) \ - if (msm_fb_msg_level > 3) \ - printk(KERN_ERR msg, ## __VA_ARGS__); -#define MSM_FB_WARNING(msg, ...) \ - if (msm_fb_msg_level > 4) \ - printk(KERN_WARNING msg, ## __VA_ARGS__); -#define MSM_FB_NOTICE(msg, ...) \ - if (msm_fb_msg_level > 5) \ - printk(KERN_NOTICE msg, ## __VA_ARGS__); -#define MSM_FB_INFO(msg, ...) \ - if (msm_fb_msg_level > 6) \ - printk(KERN_INFO msg, ## __VA_ARGS__); -#define MSM_FB_DEBUG(msg, ...) \ - if (msm_fb_msg_level > 7) \ - printk(KERN_DEBUG msg, ## __VA_ARGS__); - -#ifdef MSM_FB_C -unsigned char *msm_mdp_base; -unsigned char *msm_pmdh_base; -unsigned char *msm_emdh_base; -#else -extern unsigned char *msm_mdp_base; -extern unsigned char *msm_pmdh_base; -extern unsigned char *msm_emdh_base; -#endif - -#endif /* MSM_FB_DEF_H */ diff --git a/drivers/staging/msm/msm_fb_panel.c b/drivers/staging/msm/msm_fb_panel.c deleted file mode 100644 index 651de16..0000000 --- a/drivers/staging/msm/msm_fb_panel.c +++ /dev/null @@ -1,135 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "msm_fb_panel.h" - -int panel_next_on(struct platform_device *pdev) -{ - int ret = 0; - struct msm_fb_panel_data *pdata; - struct msm_fb_panel_data *next_pdata; - struct platform_device *next_pdev; - - pdata = (struct msm_fb_panel_data *)pdev->dev.platform_data; - - if (pdata) { - next_pdev = pdata->next; - if (next_pdev) { - next_pdata = - (struct msm_fb_panel_data *)next_pdev->dev. - platform_data; - if ((next_pdata) && (next_pdata->on)) - ret = next_pdata->on(next_pdev); - } - } - - return ret; -} - -int panel_next_off(struct platform_device *pdev) -{ - int ret = 0; - struct msm_fb_panel_data *pdata; - struct msm_fb_panel_data *next_pdata; - struct platform_device *next_pdev; - - pdata = (struct msm_fb_panel_data *)pdev->dev.platform_data; - - if (pdata) { - next_pdev = pdata->next; - if (next_pdev) { - next_pdata = - (struct msm_fb_panel_data *)next_pdev->dev. - platform_data; - if ((next_pdata) && (next_pdata->on)) - ret = next_pdata->off(next_pdev); - } - } - - return ret; -} - -struct platform_device *msm_fb_device_alloc(struct msm_fb_panel_data *pdata, - u32 type, u32 id) -{ - struct platform_device *this_dev = NULL; - char dev_name[16]; - - switch (type) { - case EBI2_PANEL: - snprintf(dev_name, sizeof(dev_name), "ebi2_lcd"); - break; - - case MDDI_PANEL: - snprintf(dev_name, sizeof(dev_name), "mddi"); - break; - - case EXT_MDDI_PANEL: - snprintf(dev_name, sizeof(dev_name), "mddi_ext"); - break; - - case TV_PANEL: - snprintf(dev_name, sizeof(dev_name), "tvenc"); - break; - - case HDMI_PANEL: - case LCDC_PANEL: - snprintf(dev_name, sizeof(dev_name), "lcdc"); - break; - - default: - return NULL; - } - - if (pdata != NULL) - pdata->next = NULL; - else - return NULL; - - this_dev = - platform_device_alloc(dev_name, ((u32) type << 16) | (u32) id); - - if (this_dev) { - if (platform_device_add_data - (this_dev, pdata, sizeof(struct msm_fb_panel_data))) { - printk - ("msm_fb_device_alloc: platform_device_add_data failed!\n"); - platform_device_put(this_dev); - return NULL; - } - } - - return this_dev; -} diff --git a/drivers/staging/msm/msm_fb_panel.h b/drivers/staging/msm/msm_fb_panel.h deleted file mode 100644 index 6375976..0000000 --- a/drivers/staging/msm/msm_fb_panel.h +++ /dev/null @@ -1,129 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MSM_FB_PANEL_H -#define MSM_FB_PANEL_H - -#include "msm_fb_def.h" - -struct msm_fb_data_type; - -typedef void (*msm_fb_vsync_handler_type) (void *arg); - -/* panel id type */ -typedef struct panel_id_s { - uint16 id; - uint16 type; -} panel_id_type; - -/* panel type list */ -#define NO_PANEL 0xffff /* No Panel */ -#define MDDI_PANEL 1 /* MDDI */ -#define EBI2_PANEL 2 /* EBI2 */ -#define LCDC_PANEL 3 /* internal LCDC type */ -#define EXT_MDDI_PANEL 4 /* Ext.MDDI */ -#define TV_PANEL 5 /* TV */ -#define HDMI_PANEL 6 /* HDMI TV */ - -/* panel class */ -typedef enum { - DISPLAY_LCD = 0, /* lcd = ebi2/mddi */ - DISPLAY_LCDC, /* lcdc */ - DISPLAY_TV, /* TV Out */ - DISPLAY_EXT_MDDI, /* External MDDI */ -} DISP_TARGET; - -/* panel device locaiton */ -typedef enum { - DISPLAY_1 = 0, /* attached as first device */ - DISPLAY_2, /* attached on second device */ - MAX_PHYS_TARGET_NUM, -} DISP_TARGET_PHYS; - -/* panel info type */ -struct lcd_panel_info { - __u32 vsync_enable; - __u32 refx100; - __u32 v_back_porch; - __u32 v_front_porch; - __u32 v_pulse_width; - __u32 hw_vsync_mode; - __u32 vsync_notifier_period; -}; - -struct lcdc_panel_info { - __u32 h_back_porch; - __u32 h_front_porch; - __u32 h_pulse_width; - __u32 v_back_porch; - __u32 v_front_porch; - __u32 v_pulse_width; - __u32 border_clr; - __u32 underflow_clr; - __u32 hsync_skew; -}; - -struct mddi_panel_info { - __u32 vdopkt; -}; - -struct msm_panel_info { - __u32 xres; - __u32 yres; - __u32 bpp; - __u32 type; - __u32 wait_cycle; - DISP_TARGET_PHYS pdest; - __u32 bl_max; - __u32 bl_min; - __u32 fb_num; - __u32 clk_rate; - __u32 clk_min; - __u32 clk_max; - __u32 frame_count; - - union { - struct mddi_panel_info mddi; - }; - - union { - struct lcd_panel_info lcd; - struct lcdc_panel_info lcdc; - }; -}; - -struct msm_fb_panel_data { - struct msm_panel_info panel_info; - void (*set_rect) (int x, int y, int xres, int yres); - void (*set_vsync_notifier) (msm_fb_vsync_handler_type, void *arg); - void (*set_backlight) (struct msm_fb_data_type *); - - /* function entry chain */ - int (*on) (struct platform_device *pdev); - int (*off) (struct platform_device *pdev); - struct platform_device *next; -}; - -/*=========================================================================== - FUNCTIONS PROTOTYPES -============================================================================*/ -struct platform_device *msm_fb_device_alloc(struct msm_fb_panel_data *pdata, - u32 type, u32 id); -int panel_next_on(struct platform_device *pdev); -int panel_next_off(struct platform_device *pdev); - -int lcdc_device_register(struct msm_panel_info *pinfo); - -int mddi_toshiba_device_register(struct msm_panel_info *pinfo, - u32 channel, u32 panel); - -#endif /* MSM_FB_PANEL_H */ diff --git a/drivers/staging/msm/msm_mdp.h b/drivers/staging/msm/msm_mdp.h deleted file mode 100644 index 2d5323f..0000000 --- a/drivers/staging/msm/msm_mdp.h +++ /dev/null @@ -1,245 +0,0 @@ -/* include/linux/msm_mdp.h - * - * Copyright (C) 2007 Google Incorporated - * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef _MSM_MDP_H_ -#define _MSM_MDP_H_ - -#include -#include - -#define MSMFB_IOCTL_MAGIC 'm' -#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) -#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) -#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) -#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) -#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) -#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) -#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram) -/* new ioctls's for set/get ccs matrix */ -#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) -#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) -#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ - struct mdp_overlay) -#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) -#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ - struct msmfb_overlay_data) -#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ - struct mdp_page_protection) -#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ - struct mdp_page_protection) -#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ - struct mdp_overlay) - -/* new ioctls for async MDP ops */ -#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) -#define MSMFB_BLIT_FLUSH _IOR(MSMFB_IOCTL_MAGIC, 142, unsigned int) - -#define MDP_IMGTYPE2_START 0x10000 - -enum { - MDP_RGB_565, /* RGB 565 planer */ - MDP_XRGB_8888, /* RGB 888 padded */ - MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ - MDP_ARGB_8888, /* ARGB 888 */ - MDP_RGB_888, /* RGB 888 planer */ - MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ - MDP_YCRYCB_H2V1, /* YCrYCb interleave */ - MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ - MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ - MDP_RGBA_8888, /* ARGB 888 */ - MDP_BGRA_8888, /* ABGR 888 */ - MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ - MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ - MDP_IMGTYPE_LIMIT, - MDP_BGR_565 = MDP_IMGTYPE2_START, /* BGR 565 planer */ - MDP_FB_FORMAT, /* framebuffer format */ - MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ -}; - -enum { - PMEM_IMG, - FB_IMG, -}; - -/* mdp_blit_req flag values */ -#define MDP_ROT_NOP 0 -#define MDP_FLIP_LR 0x1 -#define MDP_FLIP_UD 0x2 -#define MDP_ROT_90 0x4 -#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) -#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) -#define MDP_DITHER 0x8 -#define MDP_BLUR 0x10 -#define MDP_BLEND_FG_PREMULT 0x20000 - -#define MDP_DEINTERLACE 0x80000000 -#define MDP_SHARPENING 0x40000000 - -#define MDP_NO_DMA_BARRIER_START 0x20000000 -#define MDP_NO_DMA_BARRIER_END 0x10000000 -#define MDP_NO_BLIT 0x08000000 -#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 -#define MDP_BLIT_WITH_NO_DMA_BARRIERS \ - (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) -#define MDP_TRANSP_NOP 0xffffffff -#define MDP_ALPHA_NOP 0xff - -#define MDP_BLIT_SRC_GEM 0x02000000 /* set for GEM, clear for PMEM */ -#define MDP_BLIT_DST_GEM 0x01000000 /* set for GEM, clear for PMEM */ - -#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) -#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) -#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) -#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) -/* Sentinel: Don't use! */ -#define MDP_FB_PAGE_PROTECTION_INVALID (5) -/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ -#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) - -struct mdp_rect { - uint32_t x; - uint32_t y; - uint32_t w; - uint32_t h; -}; - -struct mdp_img { - uint32_t width; - uint32_t height; - uint32_t format; - uint32_t offset; - int memory_id; /* the file descriptor */ - uint32_t priv; -}; - -/* - * {3x3} + {3} ccs matrix - */ - -#define MDP_CCS_RGB2YUV 0 -#define MDP_CCS_YUV2RGB 1 - -#define MDP_CCS_SIZE 9 -#define MDP_BV_SIZE 3 - -struct mdp_ccs { - int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ - uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ - uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ -}; - -/* The version of the mdp_blit_req structure so that - * user applications can selectively decide which functionality - * to include - */ - -#define MDP_BLIT_REQ_VERSION 2 - -struct mdp_blit_req { - struct mdp_img src; - struct mdp_img dst; - struct mdp_rect src_rect; - struct mdp_rect dst_rect; - uint32_t alpha; - uint32_t transp_mask; - uint32_t flags; - int sharpening_strength; /* -127 <--> 127, default 64 */ -}; - -struct mdp_blit_req_list { - uint32_t count; - struct mdp_blit_req req[]; -}; - -struct msmfb_data { - uint32_t offset; - int memory_id; - int id; -}; - -#define MSMFB_NEW_REQUEST -1 - -struct msmfb_overlay_data { - uint32_t id; - struct msmfb_data data; -}; - -struct msmfb_img { - uint32_t width; - uint32_t height; - uint32_t format; -}; - -struct mdp_overlay { - struct msmfb_img src; - struct mdp_rect src_rect; - struct mdp_rect dst_rect; - uint32_t z_order; /* stage number */ - uint32_t is_fg; /* control alpha & transp */ - uint32_t alpha; - uint32_t transp_mask; - uint32_t flags; - uint32_t id; - uint32_t user_data[8]; -}; - -struct mdp_histogram { - uint32_t frame_cnt; - uint32_t bin_cnt; - uint32_t *r; - uint32_t *g; - uint32_t *b; -}; - -struct mdp_page_protection { - uint32_t page_protection; -}; - - -struct msm_panel_common_pdata { - int gpio; - int (*backlight_level)(int level, int max, int min); - int (*pmic_backlight)(int level); - int (*panel_num)(void); - void (*panel_config_gpio)(int); - int *gpio_num; -}; - -struct lcdc_platform_data { - int (*lcdc_gpio_config)(int on); - void (*lcdc_power_save)(int); -}; - -struct tvenc_platform_data { - int (*pm_vid_en)(int on); -}; - -struct mddi_platform_data { - void (*mddi_power_save)(int on); - int (*mddi_sel_clk)(u32 *clk_rate); -}; - -struct msm_fb_platform_data { - int (*detect_client)(const char *name); - int mddi_prescan; - int (*allow_set_offset)(void); -}; - -struct msm_hdmi_platform_data { - int irq; - int (*cable_detect)(int insert); -}; - -#endif /*_MSM_MDP_H_*/ diff --git a/drivers/staging/msm/staging-devices.c b/drivers/staging/msm/staging-devices.c deleted file mode 100644 index d6cd919..0000000 --- a/drivers/staging/msm/staging-devices.c +++ /dev/null @@ -1,312 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "msm_mdp.h" -#include "memory_ll.h" -//#include "android_pmem.h" - -#ifdef CONFIG_MSM_SOC_REV_A -#define MSM_SMI_BASE 0xE0000000 -#else -#define MSM_SMI_BASE 0x00000000 -#endif - - -#define TOUCHPAD_SUSPEND 34 -#define TOUCHPAD_IRQ 38 - -#define MSM_PMEM_MDP_SIZE 0x1591000 - -#ifdef CONFIG_MSM_SOC_REV_A -#define SMEM_SPINLOCK_I2C "D:I2C02000021" -#else -#define SMEM_SPINLOCK_I2C "S:6" -#endif - -#define MSM_PMEM_ADSP_SIZE 0x1C00000 - -#define MSM_FB_SIZE 0x500000 -#define MSM_FB_SIZE_ST15 0x800000 -#define MSM_AUDIO_SIZE 0x80000 -#define MSM_GPU_PHYS_SIZE SZ_2M - -#ifdef CONFIG_MSM_SOC_REV_A -#define MSM_SMI_BASE 0xE0000000 -#else -#define MSM_SMI_BASE 0x00000000 -#endif - -#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000) - -#define MSM_PMEM_SMI_BASE (MSM_SMI_BASE + 0x02B00000) -#define MSM_PMEM_SMI_SIZE 0x01500000 - -#define MSM_FB_BASE MSM_PMEM_SMI_BASE -#define MSM_GPU_PHYS_BASE (MSM_FB_BASE + MSM_FB_SIZE) -#define MSM_PMEM_SMIPOOL_BASE (MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE) -#define MSM_PMEM_SMIPOOL_SIZE (MSM_PMEM_SMI_SIZE - MSM_FB_SIZE \ - - MSM_GPU_PHYS_SIZE) - -#if defined(CONFIG_FB_MSM_MDP40) -#define MDP_BASE 0xA3F00000 -#define PMDH_BASE 0xAD600000 -#define EMDH_BASE 0xAD700000 -#define TVENC_BASE 0xAD400000 -#else -#define MDP_BASE 0xAA200000 -#define PMDH_BASE 0xAA600000 -#define EMDH_BASE 0xAA700000 -#define TVENC_BASE 0xAA400000 -#endif - -#define PMEM_KERNEL_EBI1_SIZE (CONFIG_PMEM_KERNEL_SIZE * 1024 * 1024) - -static struct resource msm_fb_resources[] = { - { - .flags = IORESOURCE_DMA, - } -}; - -static struct resource msm_mdp_resources[] = { - { - .name = "mdp", - .start = MDP_BASE, - .end = MDP_BASE + 0x000F0000 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device msm_mdp_device = { - .name = "mdp", - .id = 0, - .num_resources = ARRAY_SIZE(msm_mdp_resources), - .resource = msm_mdp_resources, -}; - -static struct platform_device msm_lcdc_device = { - .name = "lcdc", - .id = 0, -}; - -static int msm_fb_detect_panel(const char *name) -{ - int ret = -EPERM; - - if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) { - if (!strncmp(name, "mddi_toshiba_wvga_pt", 20)) - ret = 0; - else - ret = -ENODEV; - } else if ((machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()) - && !strcmp(name, "lcdc_external")) - ret = 0; - else if (machine_is_qsd8x50a_st1_5()) { - if (!strcmp(name, "lcdc_st15") || - !strcmp(name, "hdmi_sii9022")) - ret = 0; - else - ret = -ENODEV; - } - - return ret; -} - -/* Only allow a small subset of machines to set the offset via - FB PAN_DISPLAY */ - -static int msm_fb_allow_set_offset(void) -{ - return (machine_is_qsd8x50_st1() || - machine_is_qsd8x50a_st1_5()) ? 1 : 0; -} - - -static struct msm_fb_platform_data msm_fb_pdata = { - .detect_client = msm_fb_detect_panel, - .allow_set_offset = msm_fb_allow_set_offset, -}; - -static struct platform_device msm_fb_device = { - .name = "msm_fb", - .id = 0, - .num_resources = ARRAY_SIZE(msm_fb_resources), - .resource = msm_fb_resources, - .dev = { - .platform_data = &msm_fb_pdata, - } -}; - -static void __init qsd8x50_allocate_memory_regions(void) -{ - void *addr; - unsigned long size; - if (machine_is_qsd8x50a_st1_5()) - size = MSM_FB_SIZE_ST15; - else - size = MSM_FB_SIZE; - - addr = alloc_bootmem(size); // (void *)MSM_FB_BASE; - if (!addr) - printk("Failed to allocate bootmem for framebuffer\n"); - - - msm_fb_resources[0].start = __pa(addr); - msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1; - pr_info("using %lu bytes of SMI at %lx physical for fb\n", - size, (unsigned long)addr); -} - -static int msm_fb_lcdc_gpio_config(int on) -{ -// return 0; - if (machine_is_qsd8x50_st1()) { - if (on) { - gpio_set_value(32, 1); - mdelay(100); - gpio_set_value(20, 1); - gpio_set_value(17, 1); - gpio_set_value(19, 1); - } else { - gpio_set_value(17, 0); - gpio_set_value(19, 0); - gpio_set_value(20, 0); - mdelay(100); - gpio_set_value(32, 0); - } - } else if (machine_is_qsd8x50a_st1_5()) { - if (on) { - gpio_set_value(17, 1); - gpio_set_value(19, 1); - gpio_set_value(20, 1); - gpio_set_value(22, 0); - gpio_set_value(32, 1); - gpio_set_value(155, 1); - //st15_hdmi_power(1); - gpio_set_value(22, 1); - - } else { - gpio_set_value(17, 0); - gpio_set_value(19, 0); - gpio_set_value(22, 0); - gpio_set_value(32, 0); - gpio_set_value(155, 0); - // st15_hdmi_power(0); - } - } - return 0; -} - - -static struct lcdc_platform_data lcdc_pdata = { - .lcdc_gpio_config = msm_fb_lcdc_gpio_config, -}; - -static struct msm_gpio msm_fb_st15_gpio_config_data[] = { - { GPIO_CFG(17, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "lcdc_en0" }, - { GPIO_CFG(19, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "dat_pwr_sv" }, - { GPIO_CFG(20, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "lvds_pwr_dn" }, - { GPIO_CFG(22, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "lcdc_en1" }, - { GPIO_CFG(32, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "lcdc_en2" }, - { GPIO_CFG(103, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA), "hdmi_irq" }, - { GPIO_CFG(155, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_2MA), "hdmi_3v3" }, -}; - -static struct msm_panel_common_pdata mdp_pdata = { - .gpio = 98, -}; - -static struct platform_device *devices[] __initdata = { - &msm_fb_device, -}; - - -static void __init msm_register_device(struct platform_device *pdev, void *data) -{ - int ret; - - pdev->dev.platform_data = data; - - ret = platform_device_register(pdev); - if (ret) - dev_err(&pdev->dev, - "%s: platform_device_register() failed = %d\n", - __func__, ret); -} - -void __init msm_fb_register_device(char *name, void *data) -{ - if (!strncmp(name, "mdp", 3)) - msm_register_device(&msm_mdp_device, data); -/* - else if (!strncmp(name, "pmdh", 4)) - msm_register_device(&msm_mddi_device, data); - else if (!strncmp(name, "emdh", 4)) - msm_register_device(&msm_mddi_ext_device, data); - else if (!strncmp(name, "ebi2", 4)) - msm_register_device(&msm_ebi2_lcd_device, data); - else if (!strncmp(name, "tvenc", 5)) - msm_register_device(&msm_tvenc_device, data); - else */ - - if (!strncmp(name, "lcdc", 4)) - msm_register_device(&msm_lcdc_device, data); - /*else - printk(KERN_ERR "%s: unknown device! %s\n", __func__, name); -*/ -} - -static void __init msm_fb_add_devices(void) -{ - int rc; - msm_fb_register_device("mdp", &mdp_pdata); -// msm_fb_register_device("pmdh", &mddi_pdata); -// msm_fb_register_device("emdh", &mddi_pdata); -// msm_fb_register_device("tvenc", 0); - - if (machine_is_qsd8x50a_st1_5()) { -/* rc = st15_hdmi_vreg_init(); - if (rc) - return; -*/ - rc = msm_gpios_request_enable( - msm_fb_st15_gpio_config_data, - ARRAY_SIZE(msm_fb_st15_gpio_config_data)); - if (rc) { - printk(KERN_ERR "%s: unable to init lcdc gpios\n", - __func__); - return; - } - msm_fb_register_device("lcdc", &lcdc_pdata); - } else - msm_fb_register_device("lcdc", 0); -} - -int __init staging_init_pmem(void) -{ - qsd8x50_allocate_memory_regions(); - return 0; -} - -int __init staging_init_devices(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); - msm_fb_add_devices(); - return 0; -} - -arch_initcall(staging_init_pmem); -arch_initcall(staging_init_devices); diff --git a/drivers/staging/msm/tv_ntsc.c b/drivers/staging/msm/tv_ntsc.c deleted file mode 100644 index 5eb6761..0000000 --- a/drivers/staging/msm/tv_ntsc.c +++ /dev/null @@ -1,163 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "tvenc.h" - -#define NTSC_TV_DIMENSION_WIDTH 720 -#define NTSC_TV_DIMENSION_HEIGHT 480 - -static int ntsc_off(struct platform_device *pdev); -static int ntsc_on(struct platform_device *pdev); - -static int ntsc_on(struct platform_device *pdev) -{ - uint32 reg = 0; - int ret = 0; - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - TV_OUT(TV_ENC_CTL, 0); /* disable TV encoder */ - - if (mfd->panel.id == NTSC_M) { - /* Cr gain 11, Cb gain C6, y_gain 97 */ - TV_OUT(TV_GAIN, 0x0081B697); - } else { - /* Cr gain 11, Cb gain C6, y_gain 97 */ - TV_OUT(TV_GAIN, 0x008bc4a3); - reg |= TVENC_CTL_NTSCJ_MODE; - } - - TV_OUT(TV_CGMS, 0x0); - /* NTSC Timing */ - TV_OUT(TV_SYNC_1, 0x0020009e); - TV_OUT(TV_SYNC_2, 0x011306B4); - TV_OUT(TV_SYNC_3, 0x0006000C); - TV_OUT(TV_SYNC_4, 0x0028020D); - TV_OUT(TV_SYNC_5, 0x005E02FB); - TV_OUT(TV_SYNC_6, 0x0006000C); - TV_OUT(TV_SYNC_7, 0x00000012); - TV_OUT(TV_BURST_V1, 0x0013020D); - TV_OUT(TV_BURST_V2, 0x0014020C); - TV_OUT(TV_BURST_V3, 0x0013020D); - TV_OUT(TV_BURST_V4, 0x0014020C); - TV_OUT(TV_BURST_H, 0x00AE00F2); - TV_OUT(TV_SOL_REQ_ODD, 0x00280208); - TV_OUT(TV_SOL_REQ_EVEN, 0x00290209); - - reg |= TVENC_CTL_TV_MODE_NTSC_M_PAL60; - - reg |= TVENC_CTL_Y_FILTER_EN | - TVENC_CTL_CR_FILTER_EN | - TVENC_CTL_CB_FILTER_EN | TVENC_CTL_SINX_FILTER_EN; -#ifdef CONFIG_FB_MSM_TVOUT_SVIDEO - reg |= TVENC_CTL_S_VIDEO_EN; -#endif - - TV_OUT(TV_LEVEL, 0x00000000); /* DC offset to 0. */ - TV_OUT(TV_OFFSET, 0x008080f0); - -#ifdef CONFIG_FB_MSM_MDP31 - TV_OUT(TV_DAC_INTF, 0x29); -#endif - TV_OUT(TV_ENC_CTL, reg); - - reg |= TVENC_CTL_ENC_EN; - TV_OUT(TV_ENC_CTL, reg); - - return ret; -} - -static int ntsc_off(struct platform_device *pdev) -{ - TV_OUT(TV_ENC_CTL, 0); /* disable TV encoder */ - return 0; -} - -static int __init ntsc_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = ntsc_probe, - .driver = { - .name = "tv_ntsc", - }, -}; - -static struct msm_fb_panel_data ntsc_panel_data = { - .panel_info.xres = NTSC_TV_DIMENSION_WIDTH, - .panel_info.yres = NTSC_TV_DIMENSION_HEIGHT, - .panel_info.type = TV_PANEL, - .panel_info.pdest = DISPLAY_1, - .panel_info.wait_cycle = 0, - .panel_info.bpp = 16, - .panel_info.fb_num = 2, - .on = ntsc_on, - .off = ntsc_off, -}; - -static struct platform_device this_device = { - .name = "tv_ntsc", - .id = 0, - .dev = { - .platform_data = &ntsc_panel_data, - } -}; - -static int __init ntsc_init(void) -{ - int ret; - - ret = platform_driver_register(&this_driver); - if (!ret) { - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(ntsc_init); \ No newline at end of file diff --git a/drivers/staging/msm/tv_pal.c b/drivers/staging/msm/tv_pal.c deleted file mode 100644 index 204da51..0000000 --- a/drivers/staging/msm/tv_pal.c +++ /dev/null @@ -1,213 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "msm_fb.h" -#include "tvenc.h" - -#ifdef CONFIG_FB_MSM_TVOUT_PAL_M -#define PAL_TV_DIMENSION_WIDTH 720 -#define PAL_TV_DIMENSION_HEIGHT 480 -#else -#define PAL_TV_DIMENSION_WIDTH 720 -#define PAL_TV_DIMENSION_HEIGHT 576 -#endif - -static int pal_on(struct platform_device *pdev) -{ - uint32 reg = 0; - int ret = 0; - struct msm_fb_data_type *mfd; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - TV_OUT(TV_ENC_CTL, 0); /* disable TV encoder */ - - switch (mfd->panel.id) { - case PAL_BDGHIN: - /* Cr gain 11, Cb gain C6, y_gain 97 */ - TV_OUT(TV_GAIN, 0x0088c1a0); - TV_OUT(TV_CGMS, 0x00012345); - TV_OUT(TV_TEST_MUX, 0x0); - /* PAL Timing */ - TV_OUT(TV_SYNC_1, 0x00180097); - TV_OUT(TV_SYNC_2, 0x011f06c0); - TV_OUT(TV_SYNC_3, 0x0005000a); - TV_OUT(TV_SYNC_4, 0x00320271); - TV_OUT(TV_SYNC_5, 0x005602f9); - TV_OUT(TV_SYNC_6, 0x0005000a); - TV_OUT(TV_SYNC_7, 0x0000000f); - TV_OUT(TV_BURST_V1, 0x0012026e); - TV_OUT(TV_BURST_V2, 0x0011026d); - TV_OUT(TV_BURST_V3, 0x00100270); - TV_OUT(TV_BURST_V4, 0x0013026f); - TV_OUT(TV_BURST_H, 0x00af00ea); - TV_OUT(TV_SOL_REQ_ODD, 0x0030026e); - TV_OUT(TV_SOL_REQ_EVEN, 0x0031026f); - - reg |= TVENC_CTL_TV_MODE_PAL_BDGHIN; - break; - case PAL_M: - /* Cr gain 11, Cb gain C6, y_gain 97 */ - TV_OUT(TV_GAIN, 0x0081b697); - TV_OUT(TV_CGMS, 0x000af317); - TV_OUT(TV_TEST_MUX, 0x000001c3); - TV_OUT(TV_TEST_MODE, 0x00000002); - /* PAL Timing */ - TV_OUT(TV_SYNC_1, 0x0020009e); - TV_OUT(TV_SYNC_2, 0x011306b4); - TV_OUT(TV_SYNC_3, 0x0006000c); - TV_OUT(TV_SYNC_4, 0x0028020D); - TV_OUT(TV_SYNC_5, 0x005e02fb); - TV_OUT(TV_SYNC_6, 0x0006000c); - TV_OUT(TV_SYNC_7, 0x00000012); - TV_OUT(TV_BURST_V1, 0x0012020b); - TV_OUT(TV_BURST_V2, 0x0016020c); - TV_OUT(TV_BURST_V3, 0x00150209); - TV_OUT(TV_BURST_V4, 0x0013020c); - TV_OUT(TV_BURST_H, 0x00bf010b); - TV_OUT(TV_SOL_REQ_ODD, 0x00280208); - TV_OUT(TV_SOL_REQ_EVEN, 0x00290209); - - reg |= TVENC_CTL_TV_MODE_PAL_M; - break; - case PAL_N: - /* Cr gain 11, Cb gain C6, y_gain 97 */ - TV_OUT(TV_GAIN, 0x0081b697); - TV_OUT(TV_CGMS, 0x000af317); - TV_OUT(TV_TEST_MUX, 0x000001c3); - TV_OUT(TV_TEST_MODE, 0x00000002); - /* PAL Timing */ - TV_OUT(TV_SYNC_1, 0x00180097); - TV_OUT(TV_SYNC_2, 0x12006c0); - TV_OUT(TV_SYNC_3, 0x0005000a); - TV_OUT(TV_SYNC_4, 0x00320271); - TV_OUT(TV_SYNC_5, 0x005602f9); - TV_OUT(TV_SYNC_6, 0x0005000a); - TV_OUT(TV_SYNC_7, 0x0000000f); - TV_OUT(TV_BURST_V1, 0x0012026e); - TV_OUT(TV_BURST_V2, 0x0011026d); - TV_OUT(TV_BURST_V3, 0x00100270); - TV_OUT(TV_BURST_V4, 0x0013026f); - TV_OUT(TV_BURST_H, 0x00af00fa); - TV_OUT(TV_SOL_REQ_ODD, 0x0030026e); - TV_OUT(TV_SOL_REQ_EVEN, 0x0031026f); - - reg |= TVENC_CTL_TV_MODE_PAL_N; - break; - - default: - return -ENODEV; - } - - reg |= TVENC_CTL_Y_FILTER_EN | - TVENC_CTL_CR_FILTER_EN | - TVENC_CTL_CB_FILTER_EN | TVENC_CTL_SINX_FILTER_EN; -#ifdef CONFIG_FB_MSM_TVOUT_SVIDEO - reg |= TVENC_CTL_S_VIDEO_EN; -#endif - - TV_OUT(TV_LEVEL, 0x00000000); /* DC offset to 0. */ - TV_OUT(TV_OFFSET, 0x008080f0); - -#ifdef CONFIG_FB_MSM_MDP31 - TV_OUT(TV_DAC_INTF, 0x29); -#endif - TV_OUT(TV_ENC_CTL, reg); - - reg |= TVENC_CTL_ENC_EN; - TV_OUT(TV_ENC_CTL, reg); - - return ret; -} - -static int pal_off(struct platform_device *pdev) -{ - TV_OUT(TV_ENC_CTL, 0); /* disable TV encoder */ - return 0; -} - -static int __init pal_probe(struct platform_device *pdev) -{ - msm_fb_add_device(pdev); - - return 0; -} - -static struct platform_driver this_driver = { - .probe = pal_probe, - .driver = { - .name = "tv_pal", - }, -}; - -static struct msm_fb_panel_data pal_panel_data = { - .panel_info.xres = PAL_TV_DIMENSION_WIDTH, - .panel_info.yres = PAL_TV_DIMENSION_HEIGHT, - .panel_info.type = TV_PANEL, - .panel_info.pdest = DISPLAY_1, - .panel_info.wait_cycle = 0, - .panel_info.bpp = 16, - .panel_info.fb_num = 2, - .on = pal_on, - .off = pal_off, -}; - -static struct platform_device this_device = { - .name = "tv_pal", - .id = 0, - .dev = { - .platform_data = &pal_panel_data, - } -}; - -static int __init pal_init(void) -{ - int ret; - - ret = platform_driver_register(&this_driver); - if (!ret) { - ret = platform_device_register(&this_device); - if (ret) - platform_driver_unregister(&this_driver); - } - - return ret; -} - -module_init(pal_init); diff --git a/drivers/staging/msm/tvenc.c b/drivers/staging/msm/tvenc.c deleted file mode 100644 index 4fbb77b..0000000 --- a/drivers/staging/msm/tvenc.c +++ /dev/null @@ -1,296 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#define TVENC_C -#include "tvenc.h" -#include "msm_fb.h" - -static int tvenc_probe(struct platform_device *pdev); -static int tvenc_remove(struct platform_device *pdev); - -static int tvenc_off(struct platform_device *pdev); -static int tvenc_on(struct platform_device *pdev); - -static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST]; -static int pdev_list_cnt; - -static struct clk *tvenc_clk; -static struct clk *tvdac_clk; - -static struct platform_driver tvenc_driver = { - .probe = tvenc_probe, - .remove = tvenc_remove, - .suspend = NULL, -// .suspend_late = NULL, -// .resume_early = NULL, - .resume = NULL, - .shutdown = NULL, - .driver = { - .name = "tvenc", - }, -}; - -static struct tvenc_platform_data *tvenc_pdata; - -static int tvenc_off(struct platform_device *pdev) -{ - int ret = 0; - - ret = panel_next_off(pdev); - - clk_disable(tvenc_clk); - clk_disable(tvdac_clk); - - if (tvenc_pdata && tvenc_pdata->pm_vid_en) - ret = tvenc_pdata->pm_vid_en(0); - - //pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ , "tvenc", - // PM_QOS_DEFAULT_VALUE); - - if (ret) - printk(KERN_ERR "%s: pm_vid_en(off) failed! %d\n", - __func__, ret); - - return ret; -} - -static int tvenc_on(struct platform_device *pdev) -{ - int ret = 0; - -// pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ , "tvenc", -// 128000); - if (tvenc_pdata && tvenc_pdata->pm_vid_en) - ret = tvenc_pdata->pm_vid_en(1); - - if (ret) { - printk(KERN_ERR "%s: pm_vid_en(on) failed! %d\n", - __func__, ret); - return ret; - } - - clk_enable(tvenc_clk); - clk_enable(tvdac_clk); - - ret = panel_next_on(pdev); - - return ret; -} - -void tvenc_gen_test_pattern(struct msm_fb_data_type *mfd) -{ - uint32 reg = 0, i; - - reg = readl(MSM_TV_ENC_CTL); - reg |= TVENC_CTL_TEST_PATT_EN; - - for (i = 0; i < 3; i++) { - TV_OUT(TV_ENC_CTL, 0); /* disable TV encoder */ - - switch (i) { - /* - * TV Encoder - Color Bar Test Pattern - */ - case 0: - reg |= TVENC_CTL_TPG_CLRBAR; - break; - /* - * TV Encoder - Red Frame Test Pattern - */ - case 1: - reg |= TVENC_CTL_TPG_REDCLR; - break; - /* - * TV Encoder - Modulated Ramp Test Pattern - */ - default: - reg |= TVENC_CTL_TPG_MODRAMP; - break; - } - - TV_OUT(TV_ENC_CTL, reg); - mdelay(5000); - - switch (i) { - /* - * TV Encoder - Color Bar Test Pattern - */ - case 0: - reg &= ~TVENC_CTL_TPG_CLRBAR; - break; - /* - * TV Encoder - Red Frame Test Pattern - */ - case 1: - reg &= ~TVENC_CTL_TPG_REDCLR; - break; - /* - * TV Encoder - Modulated Ramp Test Pattern - */ - default: - reg &= ~TVENC_CTL_TPG_MODRAMP; - break; - } - } -} - -static int tvenc_resource_initialized; - -static int tvenc_probe(struct platform_device *pdev) -{ - struct msm_fb_data_type *mfd; - struct platform_device *mdp_dev = NULL; - struct msm_fb_panel_data *pdata = NULL; - int rc; - - if (pdev->id == 0) { - tvenc_base = ioremap(pdev->resource[0].start, - pdev->resource[0].end - - pdev->resource[0].start + 1); - if (!tvenc_base) { - printk(KERN_ERR - "tvenc_base ioremap failed!\n"); - return -ENOMEM; - } - tvenc_pdata = pdev->dev.platform_data; - tvenc_resource_initialized = 1; - return 0; - } - - if (!tvenc_resource_initialized) - return -EPERM; - - mfd = platform_get_drvdata(pdev); - - if (!mfd) - return -ENODEV; - - if (mfd->key != MFD_KEY) - return -EINVAL; - - if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST) - return -ENOMEM; - - if (tvenc_base == NULL) - return -ENOMEM; - - mdp_dev = platform_device_alloc("mdp", pdev->id); - if (!mdp_dev) - return -ENOMEM; - - /* - * link to the latest pdev - */ - mfd->pdev = mdp_dev; - mfd->dest = DISPLAY_TV; - - /* - * alloc panel device data - */ - if (platform_device_add_data - (mdp_dev, pdev->dev.platform_data, - sizeof(struct msm_fb_panel_data))) { - printk(KERN_ERR "tvenc_probe: platform_device_add_data failed!\n"); - platform_device_put(mdp_dev); - return -ENOMEM; - } - /* - * data chain - */ - pdata = mdp_dev->dev.platform_data; - pdata->on = tvenc_on; - pdata->off = tvenc_off; - pdata->next = pdev; - - /* - * get/set panel specific fb info - */ - mfd->panel_info = pdata->panel_info; - mfd->fb_imgType = MDP_YCRYCB_H2V1; - - /* - * set driver data - */ - platform_set_drvdata(mdp_dev, mfd); - - /* - * register in mdp driver - */ - rc = platform_device_add(mdp_dev); - if (rc) - goto tvenc_probe_err; - - pdev_list[pdev_list_cnt++] = pdev; - return 0; - -tvenc_probe_err: - platform_device_put(mdp_dev); - return rc; -} - -static int tvenc_remove(struct platform_device *pdev) -{ -// pm_qos_remove_requirement(PM_QOS_SYSTEM_BUS_FREQ , "tvenc"); - return 0; -} - -static int tvenc_register_driver(void) -{ - return platform_driver_register(&tvenc_driver); -} - -static int __init tvenc_driver_init(void) -{ - tvenc_clk = clk_get(NULL, "tv_enc_clk"); - tvdac_clk = clk_get(NULL, "tv_dac_clk"); - - if (IS_ERR(tvenc_clk)) { - printk(KERN_ERR "error: can't get tvenc_clk!\n"); - return PTR_ERR(tvenc_clk); - } - - if (IS_ERR(tvdac_clk)) { - printk(KERN_ERR "error: can't get tvdac_clk!\n"); - clk_put(tvenc_clk); - return PTR_ERR(tvdac_clk); - } - -// pm_qos_add_requirement(PM_QOS_SYSTEM_BUS_FREQ , "tvenc", -// PM_QOS_DEFAULT_VALUE); - return tvenc_register_driver(); -} - -module_init(tvenc_driver_init); diff --git a/drivers/staging/msm/tvenc.h b/drivers/staging/msm/tvenc.h deleted file mode 100644 index 6bb375d..0000000 --- a/drivers/staging/msm/tvenc.h +++ /dev/null @@ -1,101 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef TVENC_H -#define TVENC_H - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "msm_fb_panel.h" - -#define NTSC_M 0 /* North America, Korea */ -#define NTSC_J 1 /* Japan */ -#define PAL_BDGHIN 2 /* Non-argentina PAL-N */ -#define PAL_M 3 /* PAL-M */ -#define PAL_N 4 /* Argentina PAL-N */ - -/* 3.57954545 Mhz */ -#define TVENC_CTL_TV_MODE_NTSC_M_PAL60 0 -/* 3.57961149 Mhz */ -#define TVENC_CTL_TV_MODE_PAL_M BIT(0) -/*non-Argintina = 4.3361875 Mhz */ -#define TVENC_CTL_TV_MODE_PAL_BDGHIN BIT(1) -/*Argentina = 3.582055625 Mhz */ -#define TVENC_CTL_TV_MODE_PAL_N (BIT(1)|BIT(0)) - -#define TVENC_CTL_ENC_EN BIT(2) -#define TVENC_CTL_CC_EN BIT(3) -#define TVENC_CTL_CGMS_EN BIT(4) -#define TVENC_CTL_MACRO_EN BIT(5) -#define TVENC_CTL_Y_FILTER_W_NOTCH BIT(6) -#define TVENC_CTL_Y_FILTER_WO_NOTCH 0 -#define TVENC_CTL_Y_FILTER_EN BIT(7) -#define TVENC_CTL_CR_FILTER_EN BIT(8) -#define TVENC_CTL_CB_FILTER_EN BIT(9) -#define TVENC_CTL_SINX_FILTER_EN BIT(10) -#define TVENC_CTL_TEST_PATT_EN BIT(11) -#define TVENC_CTL_OUTPUT_INV BIT(12) -#define TVENC_CTL_PAL60_MODE BIT(13) -#define TVENC_CTL_NTSCJ_MODE BIT(14) -#define TVENC_CTL_TPG_CLRBAR 0 -#define TVENC_CTL_TPG_MODRAMP BIT(15) -#define TVENC_CTL_TPG_REDCLR BIT(16) -#define TVENC_CTL_S_VIDEO_EN BIT(19) - -#ifdef TVENC_C -void *tvenc_base; -#else -extern void *tvenc_base; -#endif - -#define TV_OUT(reg, v) writel(v, tvenc_base + MSM_##reg) - -#define MSM_TV_ENC_CTL 0x00 -#define MSM_TV_LEVEL 0x04 -#define MSM_TV_GAIN 0x08 -#define MSM_TV_OFFSET 0x0c -#define MSM_TV_CGMS 0x10 -#define MSM_TV_SYNC_1 0x14 -#define MSM_TV_SYNC_2 0x18 -#define MSM_TV_SYNC_3 0x1c -#define MSM_TV_SYNC_4 0x20 -#define MSM_TV_SYNC_5 0x24 -#define MSM_TV_SYNC_6 0x28 -#define MSM_TV_SYNC_7 0x2c -#define MSM_TV_BURST_V1 0x30 -#define MSM_TV_BURST_V2 0x34 -#define MSM_TV_BURST_V3 0x38 -#define MSM_TV_BURST_V4 0x3c -#define MSM_TV_BURST_H 0x40 -#define MSM_TV_SOL_REQ_ODD 0x44 -#define MSM_TV_SOL_REQ_EVEN 0x48 -#define MSM_TV_DAC_CTL 0x4c -#define MSM_TV_TEST_MUX 0x50 -#define MSM_TV_TEST_MODE 0x54 -#define MSM_TV_TEST_MISR_RESET 0x58 -#define MSM_TV_TEST_EXPORT_MISR 0x5c -#define MSM_TV_TEST_MISR_CURR_VAL 0x60 -#define MSM_TV_TEST_SOF_CFG 0x64 -#define MSM_TV_DAC_INTF 0x100 - -#endif /* TVENC_H */ -- cgit v0.10.2 From bb2a97e9ccd525dd9c3326988e8c676d15d3e12a Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 6 Jul 2011 16:44:09 -0700 Subject: Staging: delete generic_serial drivers No one has steped up to claim them, so as described in commit 4c37705877e74c02c968735c2eee0f84914cf557 (tty: move obsolete and broken generic_serial drivers to drivers/staging/generic_serial/), they are now deleted from the system. Cc: Arnd Bergmann Cc: Alan Cox Cc: Jiri Slaby Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 3ae60a5..39a0f27 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -26,8 +26,6 @@ if STAGING source "drivers/staging/tty/Kconfig" -source "drivers/staging/generic_serial/Kconfig" - source "drivers/staging/et131x/Kconfig" source "drivers/staging/slicoss/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 9290ba1..4deb22c 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -4,7 +4,6 @@ obj-$(CONFIG_STAGING) += staging.o obj-y += tty/ -obj-y += generic_serial/ obj-$(CONFIG_ET131X) += et131x/ obj-$(CONFIG_SLICOSS) += slicoss/ obj-$(CONFIG_VIDEO_GO7007) += go7007/ diff --git a/drivers/staging/generic_serial/Kconfig b/drivers/staging/generic_serial/Kconfig deleted file mode 100644 index 795daea..0000000 --- a/drivers/staging/generic_serial/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -config A2232 - tristate "Commodore A2232 serial support (EXPERIMENTAL)" - depends on EXPERIMENTAL && ZORRO && BROKEN - ---help--- - This option supports the 2232 7-port serial card shipped with the - Amiga 2000 and other Zorro-bus machines, dating from 1989. At - a max of 19,200 bps, the ports are served by a 6551 ACIA UART chip - each, plus a 8520 CIA, and a master 6502 CPU and buffer as well. The - ports were connected with 8 pin DIN connectors on the card bracket, - for which 8 pin to DB25 adapters were supplied. The card also had - jumpers internally to toggle various pinning configurations. - - This driver can be built as a module; but then "generic_serial" - will also be built as a module. This has to be loaded before - "ser_a2232". If you want to do this, answer M here. - -config SX - tristate "Specialix SX (and SI) card support" - depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA) && BROKEN - help - This is a driver for the SX and SI multiport serial cards. - Please read the file for details. - - This driver can only be built as a module ( = code which can be - inserted in and removed from the running kernel whenever you want). - The module will be called sx. If you want to do that, say M here. - -config RIO - tristate "Specialix RIO system support" - depends on SERIAL_NONSTANDARD && BROKEN - help - This is a driver for the Specialix RIO, a smart serial card which - drives an outboard box that can support up to 128 ports. Product - information is at . - There are both ISA and PCI versions. - -config RIO_OLDPCI - bool "Support really old RIO/PCI cards" - depends on RIO - help - Older RIO PCI cards need some initialization-time configuration to - determine the IRQ and some control addresses. If you have a RIO and - this doesn't seem to work, try setting this to Y. - - diff --git a/drivers/staging/generic_serial/Makefile b/drivers/staging/generic_serial/Makefile deleted file mode 100644 index ffc90c8..0000000 --- a/drivers/staging/generic_serial/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -obj-$(CONFIG_MVME147_SCC) += generic_serial.o vme_scc.o -obj-$(CONFIG_MVME162_SCC) += generic_serial.o vme_scc.o -obj-$(CONFIG_BVME6000_SCC) += generic_serial.o vme_scc.o -obj-$(CONFIG_A2232) += ser_a2232.o generic_serial.o -obj-$(CONFIG_SX) += sx.o generic_serial.o -obj-$(CONFIG_RIO) += rio/ generic_serial.o diff --git a/drivers/staging/generic_serial/TODO b/drivers/staging/generic_serial/TODO deleted file mode 100644 index 8875645..0000000 --- a/drivers/staging/generic_serial/TODO +++ /dev/null @@ -1,6 +0,0 @@ -These are a few tty/serial drivers that either do not build, -or work if they do build, or if they seem to work, are for obsolete -hardware, or are full of unfixable races and no one uses them anymore. - -If no one steps up to adopt any of these drivers, they will be removed -in the 2.6.41 release. diff --git a/drivers/staging/generic_serial/generic_serial.c b/drivers/staging/generic_serial/generic_serial.c deleted file mode 100644 index f29dda4..0000000 --- a/drivers/staging/generic_serial/generic_serial.c +++ /dev/null @@ -1,844 +0,0 @@ -/* - * generic_serial.c - * - * Copyright (C) 1998/1999 R.E.Wolff@BitWizard.nl - * - * written for the SX serial driver. - * Contains the code that should be shared over all the serial drivers. - * - * Credit for the idea to do it this way might go to Alan Cox. - * - * - * Version 0.1 -- December, 1998. Initial version. - * Version 0.2 -- March, 1999. Some more routines. Bugfixes. Etc. - * Version 0.5 -- August, 1999. Some more fixes. Reformat for Linus. - * - * BitWizard is actively maintaining this file. We sometimes find - * that someone submitted changes to this file. We really appreciate - * your help, but please submit changes through us. We're doing our - * best to be responsive. -- REW - * */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DEBUG - -static int gs_debug; - -#ifdef DEBUG -#define gs_dprintk(f, str...) if (gs_debug & f) printk (str) -#else -#define gs_dprintk(f, str...) /* nothing */ -#endif - -#define func_enter() gs_dprintk (GS_DEBUG_FLOW, "gs: enter %s\n", __func__) -#define func_exit() gs_dprintk (GS_DEBUG_FLOW, "gs: exit %s\n", __func__) - -#define RS_EVENT_WRITE_WAKEUP 1 - -module_param(gs_debug, int, 0644); - - -int gs_put_char(struct tty_struct * tty, unsigned char ch) -{ - struct gs_port *port; - - func_enter (); - - port = tty->driver_data; - - if (!port) return 0; - - if (! (port->port.flags & ASYNC_INITIALIZED)) return 0; - - /* Take a lock on the serial tranmit buffer! */ - mutex_lock(& port->port_write_mutex); - - if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1) { - /* Sorry, buffer is full, drop character. Update statistics???? -- REW */ - mutex_unlock(&port->port_write_mutex); - return 0; - } - - port->xmit_buf[port->xmit_head++] = ch; - port->xmit_head &= SERIAL_XMIT_SIZE - 1; - port->xmit_cnt++; /* Characters in buffer */ - - mutex_unlock(&port->port_write_mutex); - func_exit (); - return 1; -} - - -/* -> Problems to take into account are: -> -1- Interrupts that empty part of the buffer. -> -2- page faults on the access to userspace. -> -3- Other processes that are also trying to do a "write". -*/ - -int gs_write(struct tty_struct * tty, - const unsigned char *buf, int count) -{ - struct gs_port *port; - int c, total = 0; - int t; - - func_enter (); - - port = tty->driver_data; - - if (!port) return 0; - - if (! (port->port.flags & ASYNC_INITIALIZED)) - return 0; - - /* get exclusive "write" access to this port (problem 3) */ - /* This is not a spinlock because we can have a disk access (page - fault) in copy_from_user */ - mutex_lock(& port->port_write_mutex); - - while (1) { - - c = count; - - /* This is safe because we "OWN" the "head". No one else can - change the "head": we own the port_write_mutex. */ - /* Don't overrun the end of the buffer */ - t = SERIAL_XMIT_SIZE - port->xmit_head; - if (t < c) c = t; - - /* This is safe because the xmit_cnt can only decrease. This - would increase "t", so we might copy too little chars. */ - /* Don't copy past the "head" of the buffer */ - t = SERIAL_XMIT_SIZE - 1 - port->xmit_cnt; - if (t < c) c = t; - - /* Can't copy more? break out! */ - if (c <= 0) break; - - memcpy (port->xmit_buf + port->xmit_head, buf, c); - - port -> xmit_cnt += c; - port -> xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE -1); - buf += c; - count -= c; - total += c; - } - mutex_unlock(& port->port_write_mutex); - - gs_dprintk (GS_DEBUG_WRITE, "write: interrupts are %s\n", - (port->port.flags & GS_TX_INTEN)?"enabled": "disabled"); - - if (port->xmit_cnt && - !tty->stopped && - !tty->hw_stopped && - !(port->port.flags & GS_TX_INTEN)) { - port->port.flags |= GS_TX_INTEN; - port->rd->enable_tx_interrupts (port); - } - func_exit (); - return total; -} - - - -int gs_write_room(struct tty_struct * tty) -{ - struct gs_port *port = tty->driver_data; - int ret; - - func_enter (); - ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1; - if (ret < 0) - ret = 0; - func_exit (); - return ret; -} - - -int gs_chars_in_buffer(struct tty_struct *tty) -{ - struct gs_port *port = tty->driver_data; - func_enter (); - - func_exit (); - return port->xmit_cnt; -} - - -static int gs_real_chars_in_buffer(struct tty_struct *tty) -{ - struct gs_port *port; - func_enter (); - - port = tty->driver_data; - - if (!port->rd) return 0; - if (!port->rd->chars_in_buffer) return 0; - - func_exit (); - return port->xmit_cnt + port->rd->chars_in_buffer (port); -} - - -static int gs_wait_tx_flushed (void * ptr, unsigned long timeout) -{ - struct gs_port *port = ptr; - unsigned long end_jiffies; - int jiffies_to_transmit, charsleft = 0, rv = 0; - int rcib; - - func_enter(); - - gs_dprintk (GS_DEBUG_FLUSH, "port=%p.\n", port); - if (port) { - gs_dprintk (GS_DEBUG_FLUSH, "xmit_cnt=%x, xmit_buf=%p, tty=%p.\n", - port->xmit_cnt, port->xmit_buf, port->port.tty); - } - - if (!port || port->xmit_cnt < 0 || !port->xmit_buf) { - gs_dprintk (GS_DEBUG_FLUSH, "ERROR: !port, !port->xmit_buf or prot->xmit_cnt < 0.\n"); - func_exit(); - return -EINVAL; /* This is an error which we don't know how to handle. */ - } - - rcib = gs_real_chars_in_buffer(port->port.tty); - - if(rcib <= 0) { - gs_dprintk (GS_DEBUG_FLUSH, "nothing to wait for.\n"); - func_exit(); - return rv; - } - /* stop trying: now + twice the time it would normally take + seconds */ - if (timeout == 0) timeout = MAX_SCHEDULE_TIMEOUT; - end_jiffies = jiffies; - if (timeout != MAX_SCHEDULE_TIMEOUT) - end_jiffies += port->baud?(2 * rcib * 10 * HZ / port->baud):0; - end_jiffies += timeout; - - gs_dprintk (GS_DEBUG_FLUSH, "now=%lx, end=%lx (%ld).\n", - jiffies, end_jiffies, end_jiffies-jiffies); - - /* the expression is actually jiffies < end_jiffies, but that won't - work around the wraparound. Tricky eh? */ - while ((charsleft = gs_real_chars_in_buffer (port->port.tty)) && - time_after (end_jiffies, jiffies)) { - /* Units check: - chars * (bits/char) * (jiffies /sec) / (bits/sec) = jiffies! - check! */ - - charsleft += 16; /* Allow 16 chars more to be transmitted ... */ - jiffies_to_transmit = port->baud?(1 + charsleft * 10 * HZ / port->baud):0; - /* ^^^ Round up.... */ - if (jiffies_to_transmit <= 0) jiffies_to_transmit = 1; - - gs_dprintk (GS_DEBUG_FLUSH, "Expect to finish in %d jiffies " - "(%d chars).\n", jiffies_to_transmit, charsleft); - - msleep_interruptible(jiffies_to_msecs(jiffies_to_transmit)); - if (signal_pending (current)) { - gs_dprintk (GS_DEBUG_FLUSH, "Signal pending. Bombing out: "); - rv = -EINTR; - break; - } - } - - gs_dprintk (GS_DEBUG_FLUSH, "charsleft = %d.\n", charsleft); - set_current_state (TASK_RUNNING); - - func_exit(); - return rv; -} - - - -void gs_flush_buffer(struct tty_struct *tty) -{ - struct gs_port *port; - unsigned long flags; - - func_enter (); - - port = tty->driver_data; - - if (!port) return; - - /* XXX Would the write semaphore do? */ - spin_lock_irqsave (&port->driver_lock, flags); - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - spin_unlock_irqrestore (&port->driver_lock, flags); - - tty_wakeup(tty); - func_exit (); -} - - -void gs_flush_chars(struct tty_struct * tty) -{ - struct gs_port *port; - - func_enter (); - - port = tty->driver_data; - - if (!port) return; - - if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || - !port->xmit_buf) { - func_exit (); - return; - } - - /* Beats me -- REW */ - port->port.flags |= GS_TX_INTEN; - port->rd->enable_tx_interrupts (port); - func_exit (); -} - - -void gs_stop(struct tty_struct * tty) -{ - struct gs_port *port; - - func_enter (); - - port = tty->driver_data; - - if (!port) return; - - if (port->xmit_cnt && - port->xmit_buf && - (port->port.flags & GS_TX_INTEN) ) { - port->port.flags &= ~GS_TX_INTEN; - port->rd->disable_tx_interrupts (port); - } - func_exit (); -} - - -void gs_start(struct tty_struct * tty) -{ - struct gs_port *port; - - port = tty->driver_data; - - if (!port) return; - - if (port->xmit_cnt && - port->xmit_buf && - !(port->port.flags & GS_TX_INTEN) ) { - port->port.flags |= GS_TX_INTEN; - port->rd->enable_tx_interrupts (port); - } - func_exit (); -} - - -static void gs_shutdown_port (struct gs_port *port) -{ - unsigned long flags; - - func_enter(); - - if (!port) return; - - if (!(port->port.flags & ASYNC_INITIALIZED)) - return; - - spin_lock_irqsave(&port->driver_lock, flags); - - if (port->xmit_buf) { - free_page((unsigned long) port->xmit_buf); - port->xmit_buf = NULL; - } - - if (port->port.tty) - set_bit(TTY_IO_ERROR, &port->port.tty->flags); - - port->rd->shutdown_port (port); - - port->port.flags &= ~ASYNC_INITIALIZED; - spin_unlock_irqrestore(&port->driver_lock, flags); - - func_exit(); -} - - -void gs_hangup(struct tty_struct *tty) -{ - struct gs_port *port; - unsigned long flags; - - func_enter (); - - port = tty->driver_data; - tty = port->port.tty; - if (!tty) - return; - - gs_shutdown_port (port); - spin_lock_irqsave(&port->port.lock, flags); - port->port.flags &= ~(ASYNC_NORMAL_ACTIVE|GS_ACTIVE); - port->port.tty = NULL; - port->port.count = 0; - spin_unlock_irqrestore(&port->port.lock, flags); - - wake_up_interruptible(&port->port.open_wait); - func_exit (); -} - - -int gs_block_til_ready(void *port_, struct file * filp) -{ - struct gs_port *gp = port_; - struct tty_port *port = &gp->port; - DECLARE_WAITQUEUE(wait, current); - int retval; - int do_clocal = 0; - int CD; - struct tty_struct *tty; - unsigned long flags; - - func_enter (); - - if (!port) return 0; - - tty = port->tty; - - gs_dprintk (GS_DEBUG_BTR, "Entering gs_block_till_ready.\n"); - /* - * If the device is in the middle of being closed, then block - * until it's done, and then try again. - */ - if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING) { - interruptible_sleep_on(&port->close_wait); - if (port->flags & ASYNC_HUP_NOTIFY) - return -EAGAIN; - else - return -ERESTARTSYS; - } - - gs_dprintk (GS_DEBUG_BTR, "after hung up\n"); - - /* - * If non-blocking mode is set, or the port is not enabled, - * then make the check up front and then exit. - */ - if ((filp->f_flags & O_NONBLOCK) || - (tty->flags & (1 << TTY_IO_ERROR))) { - port->flags |= ASYNC_NORMAL_ACTIVE; - return 0; - } - - gs_dprintk (GS_DEBUG_BTR, "after nonblock\n"); - - if (C_CLOCAL(tty)) - do_clocal = 1; - - /* - * Block waiting for the carrier detect and the line to become - * free (i.e., not in use by the callout). While we are in - * this loop, port->count is dropped by one, so that - * rs_close() knows when to free things. We restore it upon - * exit, either normal or abnormal. - */ - retval = 0; - - add_wait_queue(&port->open_wait, &wait); - - gs_dprintk (GS_DEBUG_BTR, "after add waitq.\n"); - spin_lock_irqsave(&port->lock, flags); - if (!tty_hung_up_p(filp)) { - port->count--; - } - port->blocked_open++; - spin_unlock_irqrestore(&port->lock, flags); - while (1) { - CD = tty_port_carrier_raised(port); - gs_dprintk (GS_DEBUG_BTR, "CD is now %d.\n", CD); - set_current_state (TASK_INTERRUPTIBLE); - if (tty_hung_up_p(filp) || - !(port->flags & ASYNC_INITIALIZED)) { - if (port->flags & ASYNC_HUP_NOTIFY) - retval = -EAGAIN; - else - retval = -ERESTARTSYS; - break; - } - if (!(port->flags & ASYNC_CLOSING) && - (do_clocal || CD)) - break; - gs_dprintk (GS_DEBUG_BTR, "signal_pending is now: %d (%lx)\n", - (int)signal_pending (current), *(long*)(¤t->blocked)); - if (signal_pending(current)) { - retval = -ERESTARTSYS; - break; - } - schedule(); - } - gs_dprintk (GS_DEBUG_BTR, "Got out of the loop. (%d)\n", - port->blocked_open); - set_current_state (TASK_RUNNING); - remove_wait_queue(&port->open_wait, &wait); - - spin_lock_irqsave(&port->lock, flags); - if (!tty_hung_up_p(filp)) { - port->count++; - } - port->blocked_open--; - if (retval == 0) - port->flags |= ASYNC_NORMAL_ACTIVE; - spin_unlock_irqrestore(&port->lock, flags); - func_exit (); - return retval; -} - - -void gs_close(struct tty_struct * tty, struct file * filp) -{ - unsigned long flags; - struct gs_port *port; - - func_enter (); - - port = tty->driver_data; - - if (!port) return; - - if (!port->port.tty) { - /* This seems to happen when this is called from vhangup. */ - gs_dprintk (GS_DEBUG_CLOSE, "gs: Odd: port->port.tty is NULL\n"); - port->port.tty = tty; - } - - spin_lock_irqsave(&port->port.lock, flags); - - if (tty_hung_up_p(filp)) { - spin_unlock_irqrestore(&port->port.lock, flags); - if (port->rd->hungup) - port->rd->hungup (port); - func_exit (); - return; - } - - if ((tty->count == 1) && (port->port.count != 1)) { - printk(KERN_ERR "gs: gs_close port %p: bad port count;" - " tty->count is 1, port count is %d\n", port, port->port.count); - port->port.count = 1; - } - if (--port->port.count < 0) { - printk(KERN_ERR "gs: gs_close port %p: bad port count: %d\n", port, port->port.count); - port->port.count = 0; - } - - if (port->port.count) { - gs_dprintk(GS_DEBUG_CLOSE, "gs_close port %p: count: %d\n", port, port->port.count); - spin_unlock_irqrestore(&port->port.lock, flags); - func_exit (); - return; - } - port->port.flags |= ASYNC_CLOSING; - - /* - * Now we wait for the transmit buffer to clear; and we notify - * the line discipline to only process XON/XOFF characters. - */ - tty->closing = 1; - /* if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) - tty_wait_until_sent(tty, port->closing_wait); */ - - /* - * At this point we stop accepting input. To do this, we - * disable the receive line status interrupts, and tell the - * interrupt driver to stop checking the data ready bit in the - * line status register. - */ - - spin_lock(&port->driver_lock); - port->rd->disable_rx_interrupts (port); - spin_unlock(&port->driver_lock); - spin_unlock_irqrestore(&port->port.lock, flags); - - /* close has no way of returning "EINTR", so discard return value */ - if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) - gs_wait_tx_flushed (port, port->closing_wait); - - port->port.flags &= ~GS_ACTIVE; - - gs_flush_buffer(tty); - - tty_ldisc_flush(tty); - tty->closing = 0; - - spin_lock_irqsave(&port->driver_lock, flags); - port->event = 0; - port->rd->close (port); - port->rd->shutdown_port (port); - spin_unlock_irqrestore(&port->driver_lock, flags); - - spin_lock_irqsave(&port->port.lock, flags); - port->port.tty = NULL; - - if (port->port.blocked_open) { - if (port->close_delay) { - spin_unlock_irqrestore(&port->port.lock, flags); - msleep_interruptible(jiffies_to_msecs(port->close_delay)); - spin_lock_irqsave(&port->port.lock, flags); - } - wake_up_interruptible(&port->port.open_wait); - } - port->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING | ASYNC_INITIALIZED); - spin_unlock_irqrestore(&port->port.lock, flags); - wake_up_interruptible(&port->port.close_wait); - - func_exit (); -} - - -void gs_set_termios (struct tty_struct * tty, - struct ktermios * old_termios) -{ - struct gs_port *port; - int baudrate, tmp, rv; - struct ktermios *tiosp; - - func_enter(); - - port = tty->driver_data; - - if (!port) return; - if (!port->port.tty) { - /* This seems to happen when this is called after gs_close. */ - gs_dprintk (GS_DEBUG_TERMIOS, "gs: Odd: port->port.tty is NULL\n"); - port->port.tty = tty; - } - - - tiosp = tty->termios; - - if (gs_debug & GS_DEBUG_TERMIOS) { - gs_dprintk (GS_DEBUG_TERMIOS, "termios structure (%p):\n", tiosp); - } - - if(old_termios && (gs_debug & GS_DEBUG_TERMIOS)) { - if(tiosp->c_iflag != old_termios->c_iflag) printk("c_iflag changed\n"); - if(tiosp->c_oflag != old_termios->c_oflag) printk("c_oflag changed\n"); - if(tiosp->c_cflag != old_termios->c_cflag) printk("c_cflag changed\n"); - if(tiosp->c_lflag != old_termios->c_lflag) printk("c_lflag changed\n"); - if(tiosp->c_line != old_termios->c_line) printk("c_line changed\n"); - if(!memcmp(tiosp->c_cc, old_termios->c_cc, NCC)) printk("c_cc changed\n"); - } - - baudrate = tty_get_baud_rate(tty); - - if ((tiosp->c_cflag & CBAUD) == B38400) { - if ( (port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - baudrate = 57600; - else if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - baudrate = 115200; - else if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - baudrate = 230400; - else if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - baudrate = 460800; - else if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) - baudrate = (port->baud_base / port->custom_divisor); - } - - /* I recommend using THIS instead of the mess in termios (and - duplicating the above code). Next we should create a clean - interface towards this variable. If your card supports arbitrary - baud rates, (e.g. CD1400 or 16550 based cards) then everything - will be very easy..... */ - port->baud = baudrate; - - /* Two timer ticks seems enough to wakeup something like SLIP driver */ - /* Baudrate/10 is cps. Divide by HZ to get chars per tick. */ - tmp = (baudrate / 10 / HZ) * 2; - - if (tmp < 0) tmp = 0; - if (tmp >= SERIAL_XMIT_SIZE) tmp = SERIAL_XMIT_SIZE-1; - - port->wakeup_chars = tmp; - - /* We should really wait for the characters to be all sent before - changing the settings. -- CAL */ - rv = gs_wait_tx_flushed (port, MAX_SCHEDULE_TIMEOUT); - if (rv < 0) return /* rv */; - - rv = port->rd->set_real_termios(port); - if (rv < 0) return /* rv */; - - if ((!old_termios || - (old_termios->c_cflag & CRTSCTS)) && - !( tiosp->c_cflag & CRTSCTS)) { - tty->stopped = 0; - gs_start(tty); - } - -#ifdef tytso_patch_94Nov25_1726 - /* This "makes sense", Why is it commented out? */ - - if (!(old_termios->c_cflag & CLOCAL) && - (tty->termios->c_cflag & CLOCAL)) - wake_up_interruptible(&port->gs.open_wait); -#endif - - func_exit(); - return /* 0 */; -} - - - -/* Must be called with interrupts enabled */ -int gs_init_port(struct gs_port *port) -{ - unsigned long flags; - - func_enter (); - - if (port->port.flags & ASYNC_INITIALIZED) { - func_exit (); - return 0; - } - if (!port->xmit_buf) { - /* We may sleep in get_zeroed_page() */ - unsigned long tmp; - - tmp = get_zeroed_page(GFP_KERNEL); - spin_lock_irqsave (&port->driver_lock, flags); - if (port->xmit_buf) - free_page (tmp); - else - port->xmit_buf = (unsigned char *) tmp; - spin_unlock_irqrestore(&port->driver_lock, flags); - if (!port->xmit_buf) { - func_exit (); - return -ENOMEM; - } - } - - spin_lock_irqsave (&port->driver_lock, flags); - if (port->port.tty) - clear_bit(TTY_IO_ERROR, &port->port.tty->flags); - mutex_init(&port->port_write_mutex); - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - spin_unlock_irqrestore(&port->driver_lock, flags); - gs_set_termios(port->port.tty, NULL); - spin_lock_irqsave (&port->driver_lock, flags); - port->port.flags |= ASYNC_INITIALIZED; - port->port.flags &= ~GS_TX_INTEN; - - spin_unlock_irqrestore(&port->driver_lock, flags); - func_exit (); - return 0; -} - - -int gs_setserial(struct gs_port *port, struct serial_struct __user *sp) -{ - struct serial_struct sio; - - if (copy_from_user(&sio, sp, sizeof(struct serial_struct))) - return(-EFAULT); - - if (!capable(CAP_SYS_ADMIN)) { - if ((sio.baud_base != port->baud_base) || - (sio.close_delay != port->close_delay) || - ((sio.flags & ~ASYNC_USR_MASK) != - (port->port.flags & ~ASYNC_USR_MASK))) - return(-EPERM); - } - - port->port.flags = (port->port.flags & ~ASYNC_USR_MASK) | - (sio.flags & ASYNC_USR_MASK); - - port->baud_base = sio.baud_base; - port->close_delay = sio.close_delay; - port->closing_wait = sio.closing_wait; - port->custom_divisor = sio.custom_divisor; - - gs_set_termios (port->port.tty, NULL); - - return 0; -} - - -/*****************************************************************************/ - -/* - * Generate the serial struct info. - */ - -int gs_getserial(struct gs_port *port, struct serial_struct __user *sp) -{ - struct serial_struct sio; - - memset(&sio, 0, sizeof(struct serial_struct)); - sio.flags = port->port.flags; - sio.baud_base = port->baud_base; - sio.close_delay = port->close_delay; - sio.closing_wait = port->closing_wait; - sio.custom_divisor = port->custom_divisor; - sio.hub6 = 0; - - /* If you want you can override these. */ - sio.type = PORT_UNKNOWN; - sio.xmit_fifo_size = -1; - sio.line = -1; - sio.port = -1; - sio.irq = -1; - - if (port->rd->getserial) - port->rd->getserial (port, &sio); - - if (copy_to_user(sp, &sio, sizeof(struct serial_struct))) - return -EFAULT; - return 0; - -} - - -void gs_got_break(struct gs_port *port) -{ - func_enter (); - - tty_insert_flip_char(port->port.tty, 0, TTY_BREAK); - tty_schedule_flip(port->port.tty); - if (port->port.flags & ASYNC_SAK) { - do_SAK (port->port.tty); - } - - func_exit (); -} - - -EXPORT_SYMBOL(gs_put_char); -EXPORT_SYMBOL(gs_write); -EXPORT_SYMBOL(gs_write_room); -EXPORT_SYMBOL(gs_chars_in_buffer); -EXPORT_SYMBOL(gs_flush_buffer); -EXPORT_SYMBOL(gs_flush_chars); -EXPORT_SYMBOL(gs_stop); -EXPORT_SYMBOL(gs_start); -EXPORT_SYMBOL(gs_hangup); -EXPORT_SYMBOL(gs_block_til_ready); -EXPORT_SYMBOL(gs_close); -EXPORT_SYMBOL(gs_set_termios); -EXPORT_SYMBOL(gs_init_port); -EXPORT_SYMBOL(gs_setserial); -EXPORT_SYMBOL(gs_getserial); -EXPORT_SYMBOL(gs_got_break); - -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/generic_serial/rio/Makefile b/drivers/staging/generic_serial/rio/Makefile deleted file mode 100644 index 1661875..0000000 --- a/drivers/staging/generic_serial/rio/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# Makefile for the linux rio-subsystem. -# -# (C) R.E.Wolff@BitWizard.nl -# -# This file is GPL. See other files for the full Blurb. I'm lazy today. -# - -obj-$(CONFIG_RIO) += rio.o - -rio-y := rio_linux.o rioinit.o rioboot.o riocmd.o rioctrl.o riointr.o \ - rioparam.o rioroute.o riotable.o riotty.o diff --git a/drivers/staging/generic_serial/rio/board.h b/drivers/staging/generic_serial/rio/board.h deleted file mode 100644 index bdea633..0000000 --- a/drivers/staging/generic_serial/rio/board.h +++ /dev/null @@ -1,132 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : board.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:07 -** Retrieved : 11/6/98 11:34:20 -** -** ident @(#)board.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_board_h__ -#define __rio_board_h__ - -/* -** board.h contains the definitions for the *hardware* of the host cards. -** It describes the memory overlay for the dual port RAM area. -*/ - -#define DP_SRAM1_SIZE 0x7C00 -#define DP_SRAM2_SIZE 0x0200 -#define DP_SRAM3_SIZE 0x7000 -#define DP_SCRATCH_SIZE 0x1000 -#define DP_PARMMAP_ADDR 0x01FE /* offset into SRAM2 */ -#define DP_STARTUP_ADDR 0x01F8 /* offset into SRAM2 */ - -/* -** The shape of the Host Control area, at offset 0x7C00, Write Only -*/ -struct s_Ctrl { - u8 DpCtl; /* 7C00 */ - u8 Dp_Unused2_[127]; - u8 DpIntSet; /* 7C80 */ - u8 Dp_Unused3_[127]; - u8 DpTpuReset; /* 7D00 */ - u8 Dp_Unused4_[127]; - u8 DpIntReset; /* 7D80 */ - u8 Dp_Unused5_[127]; -}; - -/* -** The PROM data area on the host (0x7C00), Read Only -*/ -struct s_Prom { - u16 DpSlxCode[2]; - u16 DpRev; - u16 Dp_Unused6_; - u16 DpUniq[4]; - u16 DpJahre; - u16 DpWoche; - u16 DpHwFeature[5]; - u16 DpOemId; - u16 DpSiggy[16]; -}; - -/* -** Union of the Ctrl and Prom areas -*/ -union u_CtrlProm { /* This is the control/PROM area (0x7C00) */ - struct s_Ctrl DpCtrl; - struct s_Prom DpProm; -}; - -/* -** The top end of memory! -*/ -struct s_ParmMapS { /* Area containing Parm Map Pointer */ - u8 Dp_Unused8_[DP_PARMMAP_ADDR]; - u16 DpParmMapAd; -}; - -struct s_StartUpS { - u8 Dp_Unused9_[DP_STARTUP_ADDR]; - u8 Dp_LongJump[0x4]; - u8 Dp_Unused10_[2]; - u8 Dp_ShortJump[0x2]; -}; - -union u_Sram2ParmMap { /* This is the top of memory (0x7E00-0x7FFF) */ - u8 DpSramMem[DP_SRAM2_SIZE]; - struct s_ParmMapS DpParmMapS; - struct s_StartUpS DpStartUpS; -}; - -/* -** This is the DP RAM overlay. -*/ -struct DpRam { - u8 DpSram1[DP_SRAM1_SIZE]; /* 0000 - 7BFF */ - union u_CtrlProm DpCtrlProm; /* 7C00 - 7DFF */ - union u_Sram2ParmMap DpSram2ParmMap; /* 7E00 - 7FFF */ - u8 DpScratch[DP_SCRATCH_SIZE]; /* 8000 - 8FFF */ - u8 DpSram3[DP_SRAM3_SIZE]; /* 9000 - FFFF */ -}; - -#define DpControl DpCtrlProm.DpCtrl.DpCtl -#define DpSetInt DpCtrlProm.DpCtrl.DpIntSet -#define DpResetTpu DpCtrlProm.DpCtrl.DpTpuReset -#define DpResetInt DpCtrlProm.DpCtrl.DpIntReset - -#define DpSlx DpCtrlProm.DpProm.DpSlxCode -#define DpRevision DpCtrlProm.DpProm.DpRev -#define DpUnique DpCtrlProm.DpProm.DpUniq -#define DpYear DpCtrlProm.DpProm.DpJahre -#define DpWeek DpCtrlProm.DpProm.DpWoche -#define DpSignature DpCtrlProm.DpProm.DpSiggy - -#define DpParmMapR DpSram2ParmMap.DpParmMapS.DpParmMapAd -#define DpSram2 DpSram2ParmMap.DpSramMem - -#endif diff --git a/drivers/staging/generic_serial/rio/cirrus.h b/drivers/staging/generic_serial/rio/cirrus.h deleted file mode 100644 index 5ab5167..0000000 --- a/drivers/staging/generic_serial/rio/cirrus.h +++ /dev/null @@ -1,210 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* CIRRUS.H ******* - ******* ******* - **************************************************************************** - - Author : Jeremy Rolls - Date : 3 Aug 1990 - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _cirrus_h -#define _cirrus_h 1 - -/* Bit fields for particular registers shared with driver */ - -/* COR1 - driver and RTA */ -#define RIOC_COR1_ODD 0x80 /* Odd parity */ -#define RIOC_COR1_EVEN 0x00 /* Even parity */ -#define RIOC_COR1_NOP 0x00 /* No parity */ -#define RIOC_COR1_FORCE 0x20 /* Force parity */ -#define RIOC_COR1_NORMAL 0x40 /* With parity */ -#define RIOC_COR1_1STOP 0x00 /* 1 stop bit */ -#define RIOC_COR1_15STOP 0x04 /* 1.5 stop bits */ -#define RIOC_COR1_2STOP 0x08 /* 2 stop bits */ -#define RIOC_COR1_5BITS 0x00 /* 5 data bits */ -#define RIOC_COR1_6BITS 0x01 /* 6 data bits */ -#define RIOC_COR1_7BITS 0x02 /* 7 data bits */ -#define RIOC_COR1_8BITS 0x03 /* 8 data bits */ - -#define RIOC_COR1_HOST 0xef /* Safe host bits */ - -/* RTA only */ -#define RIOC_COR1_CINPCK 0x00 /* Check parity of received characters */ -#define RIOC_COR1_CNINPCK 0x10 /* Don't check parity */ - -/* COR2 bits for both RTA and driver use */ -#define RIOC_COR2_IXANY 0x80 /* IXANY - any character is XON */ -#define RIOC_COR2_IXON 0x40 /* IXON - enable tx soft flowcontrol */ -#define RIOC_COR2_RTSFLOW 0x02 /* Enable tx hardware flow control */ - -/* Additional driver bits */ -#define RIOC_COR2_HUPCL 0x20 /* Hang up on close */ -#define RIOC_COR2_CTSFLOW 0x04 /* Enable rx hardware flow control */ -#define RIOC_COR2_IXOFF 0x01 /* Enable rx software flow control */ -#define RIOC_COR2_DTRFLOW 0x08 /* Enable tx hardware flow control */ - -/* RTA use only */ -#define RIOC_COR2_ETC 0x20 /* Embedded transmit options */ -#define RIOC_COR2_LOCAL 0x10 /* Local loopback mode */ -#define RIOC_COR2_REMOTE 0x08 /* Remote loopback mode */ -#define RIOC_COR2_HOST 0xc2 /* Safe host bits */ - -/* COR3 - RTA use only */ -#define RIOC_COR3_SCDRNG 0x80 /* Enable special char detect for range */ -#define RIOC_COR3_SCD34 0x40 /* Special character detect for SCHR's 3 + 4 */ -#define RIOC_COR3_FCT 0x20 /* Flow control transparency */ -#define RIOC_COR3_SCD12 0x10 /* Special character detect for SCHR's 1 + 2 */ -#define RIOC_COR3_FIFO12 0x0c /* 12 chars for receive FIFO threshold */ -#define RIOC_COR3_FIFO10 0x0a /* 10 chars for receive FIFO threshold */ -#define RIOC_COR3_FIFO8 0x08 /* 8 chars for receive FIFO threshold */ -#define RIOC_COR3_FIFO6 0x06 /* 6 chars for receive FIFO threshold */ - -#define RIOC_COR3_THRESHOLD RIOC_COR3_FIFO8 /* MUST BE LESS THAN MCOR_THRESHOLD */ - -#define RIOC_COR3_DEFAULT (RIOC_COR3_FCT | RIOC_COR3_THRESHOLD) - /* Default bits for COR3 */ - -/* COR4 driver and RTA use */ -#define RIOC_COR4_IGNCR 0x80 /* Throw away CR's on input */ -#define RIOC_COR4_ICRNL 0x40 /* Map CR -> NL on input */ -#define RIOC_COR4_INLCR 0x20 /* Map NL -> CR on input */ -#define RIOC_COR4_IGNBRK 0x10 /* Ignore Break */ -#define RIOC_COR4_NBRKINT 0x08 /* No interrupt on break (-BRKINT) */ -#define RIOC_COR4_RAISEMOD 0x01 /* Raise modem output lines on non-zero baud */ - - -/* COR4 driver only */ -#define RIOC_COR4_IGNPAR 0x04 /* IGNPAR (ignore characters with errors) */ -#define RIOC_COR4_PARMRK 0x02 /* PARMRK */ - -#define RIOC_COR4_HOST 0xf8 /* Safe host bits */ - -/* COR4 RTA only */ -#define RIOC_COR4_CIGNPAR 0x02 /* Thrown away bad characters */ -#define RIOC_COR4_CPARMRK 0x04 /* PARMRK characters */ -#define RIOC_COR4_CNPARMRK 0x03 /* Don't PARMRK */ - -/* COR5 driver and RTA use */ -#define RIOC_COR5_ISTRIP 0x80 /* Strip input chars to 7 bits */ -#define RIOC_COR5_LNE 0x40 /* Enable LNEXT processing */ -#define RIOC_COR5_CMOE 0x20 /* Match good and errored characters */ -#define RIOC_COR5_ONLCR 0x02 /* NL -> CR NL on output */ -#define RIOC_COR5_OCRNL 0x01 /* CR -> NL on output */ - -/* -** Spare bits - these are not used in the CIRRUS registers, so we use -** them to set various other features. -*/ -/* -** tstop and tbusy indication -*/ -#define RIOC_COR5_TSTATE_ON 0x08 /* Turn on monitoring of tbusy and tstop */ -#define RIOC_COR5_TSTATE_OFF 0x04 /* Turn off monitoring of tbusy and tstop */ -/* -** TAB3 -*/ -#define RIOC_COR5_TAB3 0x10 /* TAB3 mode */ - -#define RIOC_COR5_HOST 0xc3 /* Safe host bits */ - -/* CCSR */ -#define RIOC_CCSR_TXFLOFF 0x04 /* Tx is xoffed */ - -/* MSVR1 */ -/* NB. DTR / CD swapped from Cirrus spec as the pins are also reversed on the - RTA. This is because otherwise DCD would get lost on the 1 parallel / 3 - serial option. -*/ -#define RIOC_MSVR1_CD 0x80 /* CD (DSR on Cirrus) */ -#define RIOC_MSVR1_RTS 0x40 /* RTS (CTS on Cirrus) */ -#define RIOC_MSVR1_RI 0x20 /* RI */ -#define RIOC_MSVR1_DTR 0x10 /* DTR (CD on Cirrus) */ -#define RIOC_MSVR1_CTS 0x01 /* CTS output pin (RTS on Cirrus) */ -/* Next two used to indicate state of tbusy and tstop to driver */ -#define RIOC_MSVR1_TSTOP 0x08 /* Set if port flow controlled */ -#define RIOC_MSVR1_TEMPTY 0x04 /* Set if port tx buffer empty */ - -#define RIOC_MSVR1_HOST 0xf3 /* The bits the host wants */ - -/* Defines for the subscripts of a CONFIG packet */ -#define RIOC_CONFIG_COR1 1 /* Option register 1 */ -#define RIOC_CONFIG_COR2 2 /* Option register 2 */ -#define RIOC_CONFIG_COR4 3 /* Option register 4 */ -#define RIOC_CONFIG_COR5 4 /* Option register 5 */ -#define RIOC_CONFIG_TXXON 5 /* Tx XON character */ -#define RIOC_CONFIG_TXXOFF 6 /* Tx XOFF character */ -#define RIOC_CONFIG_RXXON 7 /* Rx XON character */ -#define RIOC_CONFIG_RXXOFF 8 /* Rx XOFF character */ -#define RIOC_CONFIG_LNEXT 9 /* LNEXT character */ -#define RIOC_CONFIG_TXBAUD 10 /* Tx baud rate */ -#define RIOC_CONFIG_RXBAUD 11 /* Rx baud rate */ - -#define RIOC_PRE_EMPTIVE 0x80 /* Pre-emptive bit in command field */ - -/* Packet types going from Host to remote - with the exception of OPEN, MOPEN, - CONFIG, SBREAK and MEMDUMP the remaining bytes of the data array will not - be used -*/ -#define RIOC_OPEN 0x00 /* Open a port */ -#define RIOC_CONFIG 0x01 /* Configure a port */ -#define RIOC_MOPEN 0x02 /* Modem open (block for DCD) */ -#define RIOC_CLOSE 0x03 /* Close a port */ -#define RIOC_WFLUSH (0x04 | RIOC_PRE_EMPTIVE) /* Write flush */ -#define RIOC_RFLUSH (0x05 | RIOC_PRE_EMPTIVE) /* Read flush */ -#define RIOC_RESUME (0x06 | RIOC_PRE_EMPTIVE) /* Resume if xoffed */ -#define RIOC_SBREAK 0x07 /* Start break */ -#define RIOC_EBREAK 0x08 /* End break */ -#define RIOC_SUSPEND (0x09 | RIOC_PRE_EMPTIVE) /* Susp op (behave as tho xoffed) */ -#define RIOC_FCLOSE (0x0a | RIOC_PRE_EMPTIVE) /* Force close */ -#define RIOC_XPRINT 0x0b /* Xprint packet */ -#define RIOC_MBIS (0x0c | RIOC_PRE_EMPTIVE) /* Set modem lines */ -#define RIOC_MBIC (0x0d | RIOC_PRE_EMPTIVE) /* Clear modem lines */ -#define RIOC_MSET (0x0e | RIOC_PRE_EMPTIVE) /* Set modem lines */ -#define RIOC_PCLOSE 0x0f /* Pseudo close - Leaves rx/tx enabled */ -#define RIOC_MGET (0x10 | RIOC_PRE_EMPTIVE) /* Force update of modem status */ -#define RIOC_MEMDUMP (0x11 | RIOC_PRE_EMPTIVE) /* Send back mem from addr supplied */ -#define RIOC_READ_REGISTER (0x12 | RIOC_PRE_EMPTIVE) /* Read CD1400 register (debug) */ - -/* "Command" packets going from remote to host COMPLETE and MODEM_STATUS - use data[4] / data[3] to indicate current state and modem status respectively -*/ - -#define RIOC_COMPLETE (0x20 | RIOC_PRE_EMPTIVE) - /* Command complete */ -#define RIOC_BREAK_RECEIVED (0x21 | RIOC_PRE_EMPTIVE) - /* Break received */ -#define RIOC_MODEM_STATUS (0x22 | RIOC_PRE_EMPTIVE) - /* Change in modem status */ - -/* "Command" packet that could go either way - handshake wake-up */ -#define RIOC_HANDSHAKE (0x23 | RIOC_PRE_EMPTIVE) - /* Wake-up to HOST / RTA */ - -#endif diff --git a/drivers/staging/generic_serial/rio/cmdblk.h b/drivers/staging/generic_serial/rio/cmdblk.h deleted file mode 100644 index 9ed4f86..0000000 --- a/drivers/staging/generic_serial/rio/cmdblk.h +++ /dev/null @@ -1,53 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : cmdblk.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:09 -** Retrieved : 11/6/98 11:34:20 -** -** ident @(#)cmdblk.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_cmdblk_h__ -#define __rio_cmdblk_h__ - -/* -** the structure of a command block, used to queue commands destined for -** a rup. -*/ - -struct CmdBlk { - struct CmdBlk *NextP; /* Pointer to next command block */ - struct PKT Packet; /* A packet, to copy to the rup */ - /* The func to call to check if OK */ - int (*PreFuncP) (unsigned long, struct CmdBlk *); - int PreArg; /* The arg for the func */ - /* The func to call when completed */ - int (*PostFuncP) (unsigned long, struct CmdBlk *); - int PostArg; /* The arg for the func */ -}; - -#define NUM_RIO_CMD_BLKS (3 * (MAX_RUP * 4 + LINKS_PER_UNIT * 4)) -#endif diff --git a/drivers/staging/generic_serial/rio/cmdpkt.h b/drivers/staging/generic_serial/rio/cmdpkt.h deleted file mode 100644 index c1e7a27..0000000 --- a/drivers/staging/generic_serial/rio/cmdpkt.h +++ /dev/null @@ -1,177 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : cmdpkt.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:09 -** Retrieved : 11/6/98 11:34:20 -** -** ident @(#)cmdpkt.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ -#ifndef __rio_cmdpkt_h__ -#define __rio_cmdpkt_h__ - -/* -** overlays for the data area of a packet. Used in both directions -** (to build a packet to send, and to interpret a packet that arrives) -** and is very inconvenient for MIPS, so they appear as two separate -** structures - those used for modifying/reading packets on the card -** and those for modifying/reading packets in real memory, which have an _M -** suffix. -*/ - -#define RTA_BOOT_DATA_SIZE (PKT_MAX_DATA_LEN-2) - -/* -** The boot information packet looks like this: -** This structure overlays a PktCmd->CmdData structure, and so starts -** at Data[2] in the actual pkt! -*/ -struct BootSequence { - u16 NumPackets; - u16 LoadBase; - u16 CodeSize; -}; - -#define BOOT_SEQUENCE_LEN 8 - -struct SamTop { - u8 Unit; - u8 Link; -}; - -struct CmdHdr { - u8 PcCommand; - union { - u8 PcPhbNum; - u8 PcLinkNum; - u8 PcIDNum; - } U0; -}; - - -struct PktCmd { - union { - struct { - struct CmdHdr CmdHdr; - struct BootSequence PcBootSequence; - } S1; - struct { - u16 PcSequence; - u8 PcBootData[RTA_BOOT_DATA_SIZE]; - } S2; - struct { - u16 __crud__; - u8 PcUniqNum[4]; /* this is really a uint. */ - u8 PcModuleTypes; /* what modules are fitted */ - } S3; - struct { - struct CmdHdr CmdHdr; - u8 __undefined__; - u8 PcModemStatus; - u8 PcPortStatus; - u8 PcSubCommand; /* commands like mem or register dump */ - u16 PcSubAddr; /* Address for command */ - u8 PcSubData[64]; /* Date area for command */ - } S4; - struct { - struct CmdHdr CmdHdr; - u8 PcCommandText[1]; - u8 __crud__[20]; - u8 PcIDNum2; /* It had to go somewhere! */ - } S5; - struct { - struct CmdHdr CmdHdr; - struct SamTop Topology[LINKS_PER_UNIT]; - } S6; - } U1; -}; - -struct PktCmd_M { - union { - struct { - struct { - u8 PcCommand; - union { - u8 PcPhbNum; - u8 PcLinkNum; - u8 PcIDNum; - } U0; - } CmdHdr; - struct { - u16 NumPackets; - u16 LoadBase; - u16 CodeSize; - } PcBootSequence; - } S1; - struct { - u16 PcSequence; - u8 PcBootData[RTA_BOOT_DATA_SIZE]; - } S2; - struct { - u16 __crud__; - u8 PcUniqNum[4]; /* this is really a uint. */ - u8 PcModuleTypes; /* what modules are fitted */ - } S3; - struct { - u16 __cmd_hdr__; - u8 __undefined__; - u8 PcModemStatus; - u8 PcPortStatus; - u8 PcSubCommand; - u16 PcSubAddr; - u8 PcSubData[64]; - } S4; - struct { - u16 __cmd_hdr__; - u8 PcCommandText[1]; - u8 __crud__[20]; - u8 PcIDNum2; /* Tacked on end */ - } S5; - struct { - u16 __cmd_hdr__; - struct Top Topology[LINKS_PER_UNIT]; - } S6; - } U1; -}; - -#define Command U1.S1.CmdHdr.PcCommand -#define PhbNum U1.S1.CmdHdr.U0.PcPhbNum -#define IDNum U1.S1.CmdHdr.U0.PcIDNum -#define IDNum2 U1.S5.PcIDNum2 -#define LinkNum U1.S1.CmdHdr.U0.PcLinkNum -#define Sequence U1.S2.PcSequence -#define BootData U1.S2.PcBootData -#define BootSequence U1.S1.PcBootSequence -#define UniqNum U1.S3.PcUniqNum -#define ModemStatus U1.S4.PcModemStatus -#define PortStatus U1.S4.PcPortStatus -#define SubCommand U1.S4.PcSubCommand -#define SubAddr U1.S4.PcSubAddr -#define SubData U1.S4.PcSubData -#define CommandText U1.S5.PcCommandText -#define RouteTopology U1.S6.Topology -#define ModuleTypes U1.S3.PcModuleTypes - -#endif diff --git a/drivers/staging/generic_serial/rio/daemon.h b/drivers/staging/generic_serial/rio/daemon.h deleted file mode 100644 index 4af9032..0000000 --- a/drivers/staging/generic_serial/rio/daemon.h +++ /dev/null @@ -1,307 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : daemon.h -** SID : 1.3 -** Last Modified : 11/6/98 11:34:09 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)daemon.h 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_daemon_h__ -#define __rio_daemon_h__ - - -/* -** structures used on /dev/rio -*/ - -struct Error { - unsigned int Error; - unsigned int Entry; - unsigned int Other; -}; - -struct DownLoad { - char __user *DataP; - unsigned int Count; - unsigned int ProductCode; -}; - -/* -** A few constants.... -*/ -#ifndef MAX_VERSION_LEN -#define MAX_VERSION_LEN 256 -#endif - -#ifndef MAX_XP_CTRL_LEN -#define MAX_XP_CTRL_LEN 16 /* ALSO IN PORT.H */ -#endif - -struct PortSetup { - unsigned int From; /* Set/Clear XP & IXANY Control from this port.... */ - unsigned int To; /* .... to this port */ - unsigned int XpCps; /* at this speed */ - char XpOn[MAX_XP_CTRL_LEN]; /* this is the start string */ - char XpOff[MAX_XP_CTRL_LEN]; /* this is the stop string */ - u8 IxAny; /* enable/disable IXANY */ - u8 IxOn; /* enable/disable IXON */ - u8 Lock; /* lock port params */ - u8 Store; /* store params across closes */ - u8 Drain; /* close only when drained */ -}; - -struct LpbReq { - unsigned int Host; - unsigned int Link; - struct LPB __user *LpbP; -}; - -struct RupReq { - unsigned int HostNum; - unsigned int RupNum; - struct RUP __user *RupP; -}; - -struct PortReq { - unsigned int SysPort; - struct Port __user *PortP; -}; - -struct StreamInfo { - unsigned int SysPort; - int RQueue; - int WQueue; -}; - -struct HostReq { - unsigned int HostNum; - struct Host __user *HostP; -}; - -struct HostDpRam { - unsigned int HostNum; - struct DpRam __user *DpRamP; -}; - -struct DebugCtrl { - unsigned int SysPort; - unsigned int Debug; - unsigned int Wait; -}; - -struct MapInfo { - unsigned int FirstPort; /* 8 ports, starting from this (tty) number */ - unsigned int RtaUnique; /* reside on this RTA (unique number) */ -}; - -struct MapIn { - unsigned int NumEntries; /* How many port sets are we mapping? */ - struct MapInfo *MapInfoP; /* Pointer to (user space) info */ -}; - -struct SendPack { - unsigned int PortNum; - unsigned char Len; - unsigned char Data[PKT_MAX_DATA_LEN]; -}; - -struct SpecialRupCmd { - struct PKT Packet; - unsigned short Host; - unsigned short RupNum; -}; - -struct IdentifyRta { - unsigned long RtaUnique; - u8 ID; -}; - -struct KillNeighbour { - unsigned long UniqueNum; - u8 Link; -}; - -struct rioVersion { - char version[MAX_VERSION_LEN]; - char relid[MAX_VERSION_LEN]; - int buildLevel; - char buildDate[MAX_VERSION_LEN]; -}; - - -/* -** RIOC commands are for the daemon type operations -** -** 09.12.1998 ARG - ESIL 0776 part fix -** Definition for 'RIOC' also appears in rioioctl.h, so we'd better do a -** #ifndef here first. -** rioioctl.h also now has #define 'RIO_QUICK_CHECK' as this ioctl is now -** allowed to be used by customers. -*/ -#ifndef RIOC -#define RIOC ('R'<<8)|('i'<<16)|('o'<<24) -#endif - -/* -** Boot stuff -*/ -#define RIO_GET_TABLE (RIOC | 100) -#define RIO_PUT_TABLE (RIOC | 101) -#define RIO_ASSIGN_RTA (RIOC | 102) -#define RIO_DELETE_RTA (RIOC | 103) -#define RIO_HOST_FOAD (RIOC | 104) -#define RIO_QUICK_CHECK (RIOC | 105) -#define RIO_SIGNALS_ON (RIOC | 106) -#define RIO_SIGNALS_OFF (RIOC | 107) -#define RIO_CHANGE_NAME (RIOC | 108) -#define RIO_DOWNLOAD (RIOC | 109) -#define RIO_GET_LOG (RIOC | 110) -#define RIO_SETUP_PORTS (RIOC | 111) -#define RIO_ALL_MODEM (RIOC | 112) - -/* -** card state, debug stuff -*/ -#define RIO_NUM_HOSTS (RIOC | 120) -#define RIO_HOST_LPB (RIOC | 121) -#define RIO_HOST_RUP (RIOC | 122) -#define RIO_HOST_PORT (RIOC | 123) -#define RIO_PARMS (RIOC | 124) -#define RIO_HOST_REQ (RIOC | 125) -#define RIO_READ_CONFIG (RIOC | 126) -#define RIO_SET_CONFIG (RIOC | 127) -#define RIO_VERSID (RIOC | 128) -#define RIO_FLAGS (RIOC | 129) -#define RIO_SETDEBUG (RIOC | 130) -#define RIO_GETDEBUG (RIOC | 131) -#define RIO_READ_LEVELS (RIOC | 132) -#define RIO_SET_FAST_BUS (RIOC | 133) -#define RIO_SET_SLOW_BUS (RIOC | 134) -#define RIO_SET_BYTE_MODE (RIOC | 135) -#define RIO_SET_WORD_MODE (RIOC | 136) -#define RIO_STREAM_INFO (RIOC | 137) -#define RIO_START_POLLER (RIOC | 138) -#define RIO_STOP_POLLER (RIOC | 139) -#define RIO_LAST_ERROR (RIOC | 140) -#define RIO_TICK (RIOC | 141) -#define RIO_TOCK (RIOC | 241) /* I did this on purpose, you know. */ -#define RIO_SEND_PACKET (RIOC | 142) -#define RIO_SET_BUSY (RIOC | 143) -#define SPECIAL_RUP_CMD (RIOC | 144) -#define RIO_FOAD_RTA (RIOC | 145) -#define RIO_ZOMBIE_RTA (RIOC | 146) -#define RIO_IDENTIFY_RTA (RIOC | 147) -#define RIO_KILL_NEIGHBOUR (RIOC | 148) -#define RIO_DEBUG_MEM (RIOC | 149) -/* -** 150 - 167 used..... See below -*/ -#define RIO_GET_PORT_SETUP (RIOC | 168) -#define RIO_RESUME (RIOC | 169) -#define RIO_MESG (RIOC | 170) -#define RIO_NO_MESG (RIOC | 171) -#define RIO_WHAT_MESG (RIOC | 172) -#define RIO_HOST_DPRAM (RIOC | 173) -#define RIO_MAP_B50_TO_50 (RIOC | 174) -#define RIO_MAP_B50_TO_57600 (RIOC | 175) -#define RIO_MAP_B110_TO_110 (RIOC | 176) -#define RIO_MAP_B110_TO_115200 (RIOC | 177) -#define RIO_GET_PORT_PARAMS (RIOC | 178) -#define RIO_SET_PORT_PARAMS (RIOC | 179) -#define RIO_GET_PORT_TTY (RIOC | 180) -#define RIO_SET_PORT_TTY (RIOC | 181) -#define RIO_SYSLOG_ONLY (RIOC | 182) -#define RIO_SYSLOG_CONS (RIOC | 183) -#define RIO_CONS_ONLY (RIOC | 184) -#define RIO_BLOCK_OPENS (RIOC | 185) - -/* -** 02.03.1999 ARG - ESIL 0820 fix : -** RIOBootMode is no longer use by the driver, so these ioctls -** are now obsolete : -** -#define RIO_GET_BOOT_MODE (RIOC | 186) -#define RIO_SET_BOOT_MODE (RIOC | 187) -** -*/ - -#define RIO_MEM_DUMP (RIOC | 189) -#define RIO_READ_REGISTER (RIOC | 190) -#define RIO_GET_MODTYPE (RIOC | 191) -#define RIO_SET_TIMER (RIOC | 192) -#define RIO_READ_CHECK (RIOC | 196) -#define RIO_WAITING_FOR_RESTART (RIOC | 197) -#define RIO_BIND_RTA (RIOC | 198) -#define RIO_GET_BINDINGS (RIOC | 199) -#define RIO_PUT_BINDINGS (RIOC | 200) - -#define RIO_MAKE_DEV (RIOC | 201) -#define RIO_MINOR (RIOC | 202) - -#define RIO_IDENTIFY_DRIVER (RIOC | 203) -#define RIO_DISPLAY_HOST_CFG (RIOC | 204) - - -/* -** MAKE_DEV / MINOR stuff -*/ -#define RIO_DEV_DIRECT 0x0000 -#define RIO_DEV_MODEM 0x0200 -#define RIO_DEV_XPRINT 0x0400 -#define RIO_DEV_MASK 0x0600 - -/* -** port management, xprint stuff -*/ -#define rIOCN(N) (RIOC|(N)) -#define rIOCR(N,T) (RIOC|(N)) -#define rIOCW(N,T) (RIOC|(N)) - -#define RIO_GET_XP_ON rIOCR(150,char[16]) /* start xprint string */ -#define RIO_SET_XP_ON rIOCW(151,char[16]) -#define RIO_GET_XP_OFF rIOCR(152,char[16]) /* finish xprint string */ -#define RIO_SET_XP_OFF rIOCW(153,char[16]) -#define RIO_GET_XP_CPS rIOCR(154,int) /* xprint CPS */ -#define RIO_SET_XP_CPS rIOCW(155,int) -#define RIO_GET_IXANY rIOCR(156,int) /* ixany allowed? */ -#define RIO_SET_IXANY rIOCW(157,int) -#define RIO_SET_IXANY_ON rIOCN(158) /* allow ixany */ -#define RIO_SET_IXANY_OFF rIOCN(159) /* disallow ixany */ -#define RIO_GET_MODEM rIOCR(160,int) /* port is modem/direct line? */ -#define RIO_SET_MODEM rIOCW(161,int) -#define RIO_SET_MODEM_ON rIOCN(162) /* port is a modem */ -#define RIO_SET_MODEM_OFF rIOCN(163) /* port is direct */ -#define RIO_GET_IXON rIOCR(164,int) /* ixon allowed? */ -#define RIO_SET_IXON rIOCW(165,int) -#define RIO_SET_IXON_ON rIOCN(166) /* allow ixon */ -#define RIO_SET_IXON_OFF rIOCN(167) /* disallow ixon */ - -#define RIO_GET_SIVIEW ((('s')<<8) | 106) /* backwards compatible with SI */ - -#define RIO_IOCTL_UNKNOWN -2 - -#endif diff --git a/drivers/staging/generic_serial/rio/errors.h b/drivers/staging/generic_serial/rio/errors.h deleted file mode 100644 index bdb0523..0000000 --- a/drivers/staging/generic_serial/rio/errors.h +++ /dev/null @@ -1,98 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : errors.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:10 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)errors.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_errors_h__ -#define __rio_errors_h__ - -/* -** error codes -*/ - -#define NOTHING_WRONG_AT_ALL 0 -#define BAD_CHARACTER_IN_NAME 1 -#define TABLE_ENTRY_ISNT_PROPERLY_NULL 2 -#define UNKNOWN_HOST_NUMBER 3 -#define ZERO_RTA_ID 4 -#define BAD_RTA_ID 5 -#define DUPLICATED_RTA_ID 6 -#define DUPLICATE_UNIQUE_NUMBER 7 -#define BAD_TTY_NUMBER 8 -#define TTY_NUMBER_IN_USE 9 -#define NAME_USED_TWICE 10 -#define HOST_ID_NOT_ZERO 11 -#define BOOT_IN_PROGRESS 12 -#define COPYIN_FAILED 13 -#define HOST_FILE_TOO_LARGE 14 -#define COPYOUT_FAILED 15 -#define NOT_SUPER_USER 16 -#define RIO_ALREADY_POLLING 17 - -#define ID_NUMBER_OUT_OF_RANGE 18 -#define PORT_NUMBER_OUT_OF_RANGE 19 -#define HOST_NUMBER_OUT_OF_RANGE 20 -#define RUP_NUMBER_OUT_OF_RANGE 21 -#define TTY_NUMBER_OUT_OF_RANGE 22 -#define LINK_NUMBER_OUT_OF_RANGE 23 - -#define HOST_NOT_RUNNING 24 -#define IOCTL_COMMAND_UNKNOWN 25 -#define RIO_SYSTEM_HALTED 26 -#define WAIT_FOR_DRAIN_BROKEN 27 -#define PORT_NOT_MAPPED_INTO_SYSTEM 28 -#define EXCLUSIVE_USE_SET 29 -#define WAIT_FOR_NOT_CLOSING_BROKEN 30 -#define WAIT_FOR_PORT_TO_OPEN_BROKEN 31 -#define WAIT_FOR_CARRIER_BROKEN 32 -#define WAIT_FOR_NOT_IN_USE_BROKEN 33 -#define WAIT_FOR_CAN_ADD_COMMAND_BROKEN 34 -#define WAIT_FOR_ADD_COMMAND_BROKEN 35 -#define WAIT_FOR_NOT_PARAM_BROKEN 36 -#define WAIT_FOR_RETRY_BROKEN 37 -#define HOST_HAS_ALREADY_BEEN_BOOTED 38 -#define UNIT_IS_IN_USE 39 -#define COULDNT_FIND_ENTRY 40 -#define RTA_UNIQUE_NUMBER_ZERO 41 -#define CLOSE_COMMAND_FAILED 42 -#define WAIT_FOR_CLOSE_BROKEN 43 -#define CPS_VALUE_OUT_OF_RANGE 44 -#define ID_ALREADY_IN_USE 45 -#define SIGNALS_ALREADY_SET 46 -#define NOT_RECEIVING_PROCESS 47 -#define RTA_NUMBER_WRONG 48 -#define NO_SUCH_PRODUCT 49 -#define HOST_SYSPORT_BAD 50 -#define ID_NOT_TENTATIVE 51 -#define XPRINT_CPS_OUT_OF_RANGE 52 -#define NOT_ENOUGH_CORE_FOR_PCI_COPY 53 - - -#endif /* __rio_errors_h__ */ diff --git a/drivers/staging/generic_serial/rio/func.h b/drivers/staging/generic_serial/rio/func.h deleted file mode 100644 index 078d44f..0000000 --- a/drivers/staging/generic_serial/rio/func.h +++ /dev/null @@ -1,143 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : func.h -** SID : 1.3 -** Last Modified : 11/6/98 11:34:10 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)func.h 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __func_h_def -#define __func_h_def - -#include - -/* rioboot.c */ -int RIOBootCodeRTA(struct rio_info *, struct DownLoad *); -int RIOBootCodeHOST(struct rio_info *, struct DownLoad *); -int RIOBootCodeUNKNOWN(struct rio_info *, struct DownLoad *); -void msec_timeout(struct Host *); -int RIOBootRup(struct rio_info *, unsigned int, struct Host *, struct PKT __iomem *); -int RIOBootOk(struct rio_info *, struct Host *, unsigned long); -int RIORtaBound(struct rio_info *, unsigned int); -void rio_fill_host_slot(int, int, unsigned int, struct Host *); - -/* riocmd.c */ -int RIOFoadRta(struct Host *, struct Map *); -int RIOZombieRta(struct Host *, struct Map *); -int RIOCommandRta(struct rio_info *, unsigned long, int (*func) (struct Host *, struct Map *)); -int RIOIdentifyRta(struct rio_info *, void __user *); -int RIOKillNeighbour(struct rio_info *, void __user *); -int RIOSuspendBootRta(struct Host *, int, int); -int RIOFoadWakeup(struct rio_info *); -struct CmdBlk *RIOGetCmdBlk(void); -void RIOFreeCmdBlk(struct CmdBlk *); -int RIOQueueCmdBlk(struct Host *, unsigned int, struct CmdBlk *); -void RIOPollHostCommands(struct rio_info *, struct Host *); -int RIOWFlushMark(unsigned long, struct CmdBlk *); -int RIORFlushEnable(unsigned long, struct CmdBlk *); -int RIOUnUse(unsigned long, struct CmdBlk *); - -/* rioctrl.c */ -int riocontrol(struct rio_info *, dev_t, int, unsigned long, int); - -int RIOPreemptiveCmd(struct rio_info *, struct Port *, unsigned char); - -/* rioinit.c */ -void rioinit(struct rio_info *, struct RioHostInfo *); -void RIOInitHosts(struct rio_info *, struct RioHostInfo *); -void RIOISAinit(struct rio_info *, int); -int RIODoAT(struct rio_info *, int, int); -caddr_t RIOCheckForATCard(int); -int RIOAssignAT(struct rio_info *, int, void __iomem *, int); -int RIOBoardTest(unsigned long, void __iomem *, unsigned char, int); -void RIOAllocDataStructs(struct rio_info *); -void RIOSetupDataStructs(struct rio_info *); -int RIODefaultName(struct rio_info *, struct Host *, unsigned int); -struct rioVersion *RIOVersid(void); -void RIOHostReset(unsigned int, struct DpRam __iomem *, unsigned int); - -/* riointr.c */ -void RIOTxEnable(char *); -void RIOServiceHost(struct rio_info *, struct Host *); -int riotproc(struct rio_info *, struct ttystatics *, int, int); - -/* rioparam.c */ -int RIOParam(struct Port *, int, int, int); -int RIODelay(struct Port *PortP, int); -int RIODelay_ni(struct Port *PortP, int); -void ms_timeout(struct Port *); -int can_add_transmit(struct PKT __iomem **, struct Port *); -void add_transmit(struct Port *); -void put_free_end(struct Host *, struct PKT __iomem *); -int can_remove_receive(struct PKT __iomem **, struct Port *); -void remove_receive(struct Port *); - -/* rioroute.c */ -int RIORouteRup(struct rio_info *, unsigned int, struct Host *, struct PKT __iomem *); -void RIOFixPhbs(struct rio_info *, struct Host *, unsigned int); -unsigned int GetUnitType(unsigned int); -int RIOSetChange(struct rio_info *); -int RIOFindFreeID(struct rio_info *, struct Host *, unsigned int *, unsigned int *); - - -/* riotty.c */ - -int riotopen(struct tty_struct *tty, struct file *filp); -int riotclose(void *ptr); -int riotioctl(struct rio_info *, struct tty_struct *, int, caddr_t); -void ttyseth(struct Port *, struct ttystatics *, struct old_sgttyb *sg); - -/* riotable.c */ -int RIONewTable(struct rio_info *); -int RIOApel(struct rio_info *); -int RIODeleteRta(struct rio_info *, struct Map *); -int RIOAssignRta(struct rio_info *, struct Map *); -int RIOReMapPorts(struct rio_info *, struct Host *, struct Map *); -int RIOChangeName(struct rio_info *, struct Map *); - -#if 0 -/* riodrvr.c */ -struct rio_info *rio_install(struct RioHostInfo *); -int rio_uninstall(struct rio_info *); -int rio_open(struct rio_info *, int, struct file *); -int rio_close(struct rio_info *, struct file *); -int rio_read(struct rio_info *, struct file *, char *, int); -int rio_write(struct rio_info *, struct file *f, char *, int); -int rio_ioctl(struct rio_info *, struct file *, int, char *); -int rio_select(struct rio_info *, struct file *f, int, struct sel *); -int rio_intr(char *); -int rio_isr_thread(char *); -struct rio_info *rio_info_store(int cmd, struct rio_info *p); -#endif - -extern void rio_copy_to_card(void *from, void __iomem *to, int len); -extern int rio_minor(struct tty_struct *tty); -extern int rio_ismodem(struct tty_struct *tty); - -extern void rio_start_card_running(struct Host *HostP); - -#endif /* __func_h_def */ diff --git a/drivers/staging/generic_serial/rio/host.h b/drivers/staging/generic_serial/rio/host.h deleted file mode 100644 index 78f2454..0000000 --- a/drivers/staging/generic_serial/rio/host.h +++ /dev/null @@ -1,123 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : host.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:10 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)host.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_host_h__ -#define __rio_host_h__ - -/* -** the host structure - one per host card in the system. -*/ - -#define MAX_EXTRA_UNITS 64 - -/* -** Host data structure. This is used for the software equiv. of -** the host. -*/ -struct Host { - struct pci_dev *pdev; - unsigned char Type; /* RIO_EISA, RIO_MCA, ... */ - unsigned char Ivec; /* POLLED or ivec number */ - unsigned char Mode; /* Control stuff */ - unsigned char Slot; /* Slot */ - void __iomem *Caddr; /* KV address of DPRAM */ - struct DpRam __iomem *CardP; /* KV address of DPRAM, with overlay */ - unsigned long PaddrP; /* Phys. address of DPRAM */ - char Name[MAX_NAME_LEN]; /* The name of the host */ - unsigned int UniqueNum; /* host unique number */ - spinlock_t HostLock; /* Lock structure for MPX */ - unsigned int WorkToBeDone; /* set to true each interrupt */ - unsigned int InIntr; /* Being serviced? */ - unsigned int IntSrvDone; /* host's interrupt has been serviced */ - void (*Copy) (void *, void __iomem *, int); /* copy func */ - struct timer_list timer; - /* - ** I M P O R T A N T ! - ** - ** The rest of this data structure is cleared to zero after - ** a RIO_HOST_FOAD command. - */ - - unsigned long Flags; /* Whats going down */ -#define RC_WAITING 0 -#define RC_STARTUP 1 -#define RC_RUNNING 2 -#define RC_STUFFED 3 -#define RC_READY 7 -#define RUN_STATE 7 -/* -** Boot mode applies to the way in which hosts in this system will -** boot RTAs -*/ -#define RC_BOOT_ALL 0x8 /* Boot all RTAs attached */ -#define RC_BOOT_OWN 0x10 /* Only boot RTAs bound to this system */ -#define RC_BOOT_NONE 0x20 /* Don't boot any RTAs (slave mode) */ - - struct Top Topology[LINKS_PER_UNIT]; /* one per link */ - struct Map Mapping[MAX_RUP]; /* Mappings for host */ - struct PHB __iomem *PhbP; /* Pointer to the PHB array */ - unsigned short __iomem *PhbNumP; /* Ptr to Number of PHB's */ - struct LPB __iomem *LinkStrP; /* Link Structure Array */ - struct RUP __iomem *RupP; /* Sixteen real rups here */ - struct PARM_MAP __iomem *ParmMapP; /* points to the parmmap */ - unsigned int ExtraUnits[MAX_EXTRA_UNITS]; /* unknown things */ - unsigned int NumExtraBooted; /* how many of the above */ - /* - ** Twenty logical rups. - ** The first sixteen are the real Rup entries (above), the last four - ** are the link RUPs. - */ - struct UnixRup UnixRups[MAX_RUP + LINKS_PER_UNIT]; - int timeout_id; /* For calling 100 ms delays */ - int timeout_sem; /* For calling 100 ms delays */ - unsigned long locks; /* long req'd for set_bit --RR */ - char ____end_marker____; -}; -#define Control CardP->DpControl -#define SetInt CardP->DpSetInt -#define ResetTpu CardP->DpResetTpu -#define ResetInt CardP->DpResetInt -#define Signature CardP->DpSignature -#define Sram1 CardP->DpSram1 -#define Sram2 CardP->DpSram2 -#define Sram3 CardP->DpSram3 -#define Scratch CardP->DpScratch -#define __ParmMapR CardP->DpParmMapR -#define SLX CardP->DpSlx -#define Revision CardP->DpRevision -#define Unique CardP->DpUnique -#define Year CardP->DpYear -#define Week CardP->DpWeek - -#define RIO_DUMBPARM 0x0860 /* what not to expect */ - -#endif diff --git a/drivers/staging/generic_serial/rio/link.h b/drivers/staging/generic_serial/rio/link.h deleted file mode 100644 index f3bf11a0..0000000 --- a/drivers/staging/generic_serial/rio/link.h +++ /dev/null @@ -1,96 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* L I N K - ******* ******* - **************************************************************************** - - Author : Ian Nandhra / Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _link_h -#define _link_h 1 - -/************************************************* - * Define the Link Status stuff - ************************************************/ -/* Boot request stuff */ -#define BOOT_REQUEST ((ushort) 0) /* Request for a boot */ -#define BOOT_ABORT ((ushort) 1) /* Abort a boot */ -#define BOOT_SEQUENCE ((ushort) 2) /* Packet with the number of packets - and load address */ -#define BOOT_COMPLETED ((ushort) 3) /* Boot completed */ - - -struct LPB { - u16 link_number; /* Link Number */ - u16 in_ch; /* Link In Channel */ - u16 out_ch; /* Link Out Channel */ - u8 attached_serial[4]; /* Attached serial number */ - u8 attached_host_serial[4]; - /* Serial number of Host who - booted the other end */ - u16 descheduled; /* Currently Descheduled */ - u16 state; /* Current state */ - u16 send_poll; /* Send a Poll Packet */ - u16 ltt_p; /* Process Descriptor */ - u16 lrt_p; /* Process Descriptor */ - u16 lrt_status; /* Current lrt status */ - u16 ltt_status; /* Current ltt status */ - u16 timeout; /* Timeout value */ - u16 topology; /* Topology bits */ - u16 mon_ltt; - u16 mon_lrt; - u16 WaitNoBoot; /* Secs to hold off booting */ - u16 add_packet_list; /* Add packets to here */ - u16 remove_packet_list; /* Send packets from here */ - - u16 lrt_fail_chan; /* Lrt's failure channel */ - u16 ltt_fail_chan; /* Ltt's failure channel */ - - /* RUP structure for HOST to driver communications */ - struct RUP rup; - struct RUP link_rup; /* RUP for the link (POLL, - topology etc.) */ - u16 attached_link; /* Number of attached link */ - u16 csum_errors; /* csum errors */ - u16 num_disconnects; /* number of disconnects */ - u16 num_sync_rcvd; /* # sync's received */ - u16 num_sync_rqst; /* # sync requests */ - u16 num_tx; /* Num pkts sent */ - u16 num_rx; /* Num pkts received */ - u16 module_attached; /* Module tpyes of attached */ - u16 led_timeout; /* LED timeout */ - u16 first_port; /* First port to service */ - u16 last_port; /* Last port to service */ -}; - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/linux_compat.h b/drivers/staging/generic_serial/rio/linux_compat.h deleted file mode 100644 index 34c0d28..0000000 --- a/drivers/staging/generic_serial/rio/linux_compat.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) 2000 R.E.Wolff@BitWizard.nl - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include - - -#define DEBUG_ALL - -struct ttystatics { - struct termios tm; -}; - -extern int rio_debug; - -#define RIO_DEBUG_INIT 0x000001 -#define RIO_DEBUG_BOOT 0x000002 -#define RIO_DEBUG_CMD 0x000004 -#define RIO_DEBUG_CTRL 0x000008 -#define RIO_DEBUG_INTR 0x000010 -#define RIO_DEBUG_PARAM 0x000020 -#define RIO_DEBUG_ROUTE 0x000040 -#define RIO_DEBUG_TABLE 0x000080 -#define RIO_DEBUG_TTY 0x000100 -#define RIO_DEBUG_FLOW 0x000200 -#define RIO_DEBUG_MODEMSIGNALS 0x000400 -#define RIO_DEBUG_PROBE 0x000800 -#define RIO_DEBUG_CLEANUP 0x001000 -#define RIO_DEBUG_IFLOW 0x002000 -#define RIO_DEBUG_PFE 0x004000 -#define RIO_DEBUG_REC 0x008000 -#define RIO_DEBUG_SPINLOCK 0x010000 -#define RIO_DEBUG_DELAY 0x020000 -#define RIO_DEBUG_MOD_COUNT 0x040000 - - -/* Copied over from riowinif.h . This is ugly. The winif file declares -also much other stuff which is incompatible with the headers from -the older driver. The older driver includes "brates.h" which shadows -the definitions from Linux, and is incompatible... */ - -/* RxBaud and TxBaud definitions... */ -#define RIO_B0 0x00 /* RTS / DTR signals dropped */ -#define RIO_B50 0x01 /* 50 baud */ -#define RIO_B75 0x02 /* 75 baud */ -#define RIO_B110 0x03 /* 110 baud */ -#define RIO_B134 0x04 /* 134.5 baud */ -#define RIO_B150 0x05 /* 150 baud */ -#define RIO_B200 0x06 /* 200 baud */ -#define RIO_B300 0x07 /* 300 baud */ -#define RIO_B600 0x08 /* 600 baud */ -#define RIO_B1200 0x09 /* 1200 baud */ -#define RIO_B1800 0x0A /* 1800 baud */ -#define RIO_B2400 0x0B /* 2400 baud */ -#define RIO_B4800 0x0C /* 4800 baud */ -#define RIO_B9600 0x0D /* 9600 baud */ -#define RIO_B19200 0x0E /* 19200 baud */ -#define RIO_B38400 0x0F /* 38400 baud */ -#define RIO_B56000 0x10 /* 56000 baud */ -#define RIO_B57600 0x11 /* 57600 baud */ -#define RIO_B64000 0x12 /* 64000 baud */ -#define RIO_B115200 0x13 /* 115200 baud */ -#define RIO_B2000 0x14 /* 2000 baud */ diff --git a/drivers/staging/generic_serial/rio/map.h b/drivers/staging/generic_serial/rio/map.h deleted file mode 100644 index 28a6612..0000000 --- a/drivers/staging/generic_serial/rio/map.h +++ /dev/null @@ -1,98 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : map.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:11 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)map.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_map_h__ -#define __rio_map_h__ - -/* -** mapping structure passed to and from the config.rio program to -** determine the current topology of the world -*/ - -#define MAX_MAP_ENTRY 17 -#define TOTAL_MAP_ENTRIES (MAX_MAP_ENTRY*RIO_SLOTS) -#define MAX_NAME_LEN 32 - -struct Map { - unsigned int HostUniqueNum; /* Supporting hosts unique number */ - unsigned int RtaUniqueNum; /* Unique number */ - /* - ** The next two IDs must be swapped on big-endian architectures - ** when using a v2.04 /etc/rio/config with a v3.00 driver (when - ** upgrading for example). - */ - unsigned short ID; /* ID used in the subnet */ - unsigned short ID2; /* ID of 2nd block of 8 for 16 port */ - unsigned long Flags; /* Booted, ID Given, Disconnected */ - unsigned long SysPort; /* First tty mapped to this port */ - struct Top Topology[LINKS_PER_UNIT]; /* ID connected to each link */ - char Name[MAX_NAME_LEN]; /* Cute name by which RTA is known */ -}; - -/* -** Flag values: -*/ -#define RTA_BOOTED 0x00000001 -#define RTA_NEWBOOT 0x00000010 -#define MSG_DONE 0x00000020 -#define RTA_INTERCONNECT 0x00000040 -#define RTA16_SECOND_SLOT 0x00000080 -#define BEEN_HERE 0x00000100 -#define SLOT_TENTATIVE 0x40000000 -#define SLOT_IN_USE 0x80000000 - -/* -** HostUniqueNum is the unique number from the host card that this RTA -** is to be connected to. -** RtaUniqueNum is the unique number of the RTA concerned. It will be ZERO -** if the slot in the table is unused. If it is the same as the HostUniqueNum -** then this slot represents a host card. -** Flags contains current boot/route state info -** SysPort is a value in the range 0-504, being the number of the first tty -** on this RTA. Each RTA supports 8 ports. The SysPort value must be modulo 8. -** SysPort 0-127 correspond to /dev/ttyr001 to /dev/ttyr128, with minor -** numbers 0-127. SysPort 128-255 correspond to /dev/ttyr129 to /dev/ttyr256, -** again with minor numbers 0-127, and so on for SysPorts 256-383 and 384-511 -** ID will be in the range 0-16 for a `known' RTA. ID will be 0xFFFF for an -** unused slot/unknown ID etc. -** The Topology array contains the ID of the unit connected to each of the -** four links on this unit. The entry will be 0xFFFF if NOTHING is connected -** to the link, or will be 0xFF00 if an UNKNOWN unit is connected to the link. -** The Name field is a null-terminated string, up to 31 characters, containing -** the 'cute' name that the sysadmin/users know the RTA by. It is permissible -** for this string to contain any character in the range \040 to \176 inclusive. -** In particular, ctrl sequences and DEL (0x7F, \177) are not allowed. The -** special character '%' IS allowable, and needs no special action. -** -*/ - -#endif diff --git a/drivers/staging/generic_serial/rio/param.h b/drivers/staging/generic_serial/rio/param.h deleted file mode 100644 index 7e9b628..0000000 --- a/drivers/staging/generic_serial/rio/param.h +++ /dev/null @@ -1,55 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : param.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:12 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)param.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_param_h__ -#define __rio_param_h__ - -/* -** the param command block, as used in OPEN and PARAM calls. -*/ - -struct phb_param { - u8 Cmd; /* It is very important that these line up */ - u8 Cor1; /* with what is expected at the other end. */ - u8 Cor2; /* to confirm that you've got it right, */ - u8 Cor4; /* check with cirrus/cirrus.h */ - u8 Cor5; - u8 TxXon; /* Transmit X-On character */ - u8 TxXoff; /* Transmit X-Off character */ - u8 RxXon; /* Receive X-On character */ - u8 RxXoff; /* Receive X-Off character */ - u8 LNext; /* Literal-next character */ - u8 TxBaud; /* Transmit baudrate */ - u8 RxBaud; /* Receive baudrate */ -}; - -#endif diff --git a/drivers/staging/generic_serial/rio/parmmap.h b/drivers/staging/generic_serial/rio/parmmap.h deleted file mode 100644 index acc8fa43..0000000 --- a/drivers/staging/generic_serial/rio/parmmap.h +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* H O S T M E M O R Y M A P - ******* ******* - **************************************************************************** - - Author : Ian Nandhra / Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- -6/4/1991 jonb Made changes to accommodate Mips R3230 bus - ***************************************************************************/ - -#ifndef _parmap_h -#define _parmap_h - -typedef struct PARM_MAP PARM_MAP; - -struct PARM_MAP { - u16 phb_ptr; /* Pointer to the PHB array */ - u16 phb_num_ptr; /* Ptr to Number of PHB's */ - u16 free_list; /* Free List pointer */ - u16 free_list_end; /* Free List End pointer */ - u16 q_free_list_ptr; /* Ptr to Q_BUF variable */ - u16 unit_id_ptr; /* Unit Id */ - u16 link_str_ptr; /* Link Structure Array */ - u16 bootloader_1; /* 1st Stage Boot Loader */ - u16 bootloader_2; /* 2nd Stage Boot Loader */ - u16 port_route_map_ptr; /* Port Route Map */ - u16 route_ptr; /* Unit Route Map */ - u16 map_present; /* Route Map present */ - s16 pkt_num; /* Total number of packets */ - s16 q_num; /* Total number of Q packets */ - u16 buffers_per_port; /* Number of buffers per port */ - u16 heap_size; /* Initial size of heap */ - u16 heap_left; /* Current Heap left */ - u16 error; /* Error code */ - u16 tx_max; /* Max number of tx pkts per phb */ - u16 rx_max; /* Max number of rx pkts per phb */ - u16 rx_limit; /* For high / low watermarks */ - s16 links; /* Links to use */ - s16 timer; /* Interrupts per second */ - u16 rups; /* Pointer to the RUPs */ - u16 max_phb; /* Mostly for debugging */ - u16 living; /* Just increments!! */ - u16 init_done; /* Initialisation over */ - u16 booting_link; - u16 idle_count; /* Idle time counter */ - u16 busy_count; /* Busy counter */ - u16 idle_control; /* Control Idle Process */ - u16 tx_intr; /* TX interrupt pending */ - u16 rx_intr; /* RX interrupt pending */ - u16 rup_intr; /* RUP interrupt pending */ -}; - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/pci.h b/drivers/staging/generic_serial/rio/pci.h deleted file mode 100644 index 6032f91..0000000 --- a/drivers/staging/generic_serial/rio/pci.h +++ /dev/null @@ -1,72 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : pci.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:12 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)pci.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_pci_h__ -#define __rio_pci_h__ - -/* -** PCI stuff -*/ - -#define PCITpFastClock 0x80 -#define PCITpSlowClock 0x00 -#define PCITpFastLinks 0x40 -#define PCITpSlowLinks 0x00 -#define PCITpIntEnable 0x04 -#define PCITpIntDisable 0x00 -#define PCITpBusEnable 0x02 -#define PCITpBusDisable 0x00 -#define PCITpBootFromRam 0x01 -#define PCITpBootFromLink 0x00 - -#define RIO_PCI_VENDOR 0x11CB -#define RIO_PCI_DEVICE 0x8000 -#define RIO_PCI_BASE_CLASS 0x02 -#define RIO_PCI_SUB_CLASS 0x80 -#define RIO_PCI_PROG_IFACE 0x00 - -#define RIO_PCI_RID 0x0008 -#define RIO_PCI_BADR0 0x0010 -#define RIO_PCI_INTLN 0x003C -#define RIO_PCI_INTPIN 0x003D - -#define RIO_PCI_MEM_SIZE 65536 - -#define RIO_PCI_TURBO_TP 0x80 -#define RIO_PCI_FAST_LINKS 0x40 -#define RIO_PCI_INT_ENABLE 0x04 -#define RIO_PCI_TP_BUS_ENABLE 0x02 -#define RIO_PCI_BOOT_FROM_RAM 0x01 - -#define RIO_PCI_DEFAULT_MODE 0x05 - -#endif /* __rio_pci_h__ */ diff --git a/drivers/staging/generic_serial/rio/phb.h b/drivers/staging/generic_serial/rio/phb.h deleted file mode 100644 index a4c48ae..0000000 --- a/drivers/staging/generic_serial/rio/phb.h +++ /dev/null @@ -1,142 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* P H B H E A D E R ******* - ******* ******* - **************************************************************************** - - Author : Ian Nandhra, Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _phb_h -#define _phb_h 1 - -/************************************************* - * Handshake asserted. Deasserted by the LTT(s) - ************************************************/ -#define PHB_HANDSHAKE_SET ((ushort) 0x001) /* Set by LRT */ - -#define PHB_HANDSHAKE_RESET ((ushort) 0x002) /* Set by ISR / driver */ - -#define PHB_HANDSHAKE_FLAGS (PHB_HANDSHAKE_RESET | PHB_HANDSHAKE_SET) - /* Reset by ltt */ - - -/************************************************* - * Maximum number of PHB's - ************************************************/ -#define MAX_PHB ((ushort) 128) /* range 0-127 */ - -/************************************************* - * Defines for the mode fields - ************************************************/ -#define TXPKT_INCOMPLETE 0x0001 /* Previous tx packet not completed */ -#define TXINTR_ENABLED 0x0002 /* Tx interrupt is enabled */ -#define TX_TAB3 0x0004 /* TAB3 mode */ -#define TX_OCRNL 0x0008 /* OCRNL mode */ -#define TX_ONLCR 0x0010 /* ONLCR mode */ -#define TX_SENDSPACES 0x0020 /* Send n spaces command needs - completing */ -#define TX_SENDNULL 0x0040 /* Escaping NULL needs completing */ -#define TX_SENDLF 0x0080 /* LF -> CR LF needs completing */ -#define TX_PARALLELBUG 0x0100 /* CD1400 LF -> CR LF bug on parallel - port */ -#define TX_HANGOVER (TX_SENDSPACES | TX_SENDLF | TX_SENDNULL) -#define TX_DTRFLOW 0x0200 /* DTR tx flow control */ -#define TX_DTRFLOWED 0x0400 /* DTR is low - don't allow more data - into the FIFO */ -#define TX_DATAINFIFO 0x0800 /* There is data in the FIFO */ -#define TX_BUSY 0x1000 /* Data in FIFO, shift or holding regs */ - -#define RX_SPARE 0x0001 /* SPARE */ -#define RXINTR_ENABLED 0x0002 /* Rx interrupt enabled */ -#define RX_ICRNL 0x0008 /* ICRNL mode */ -#define RX_INLCR 0x0010 /* INLCR mode */ -#define RX_IGNCR 0x0020 /* IGNCR mode */ -#define RX_CTSFLOW 0x0040 /* CTSFLOW enabled */ -#define RX_IXOFF 0x0080 /* IXOFF enabled */ -#define RX_CTSFLOWED 0x0100 /* CTSFLOW and CTS dropped */ -#define RX_IXOFFED 0x0200 /* IXOFF and xoff sent */ -#define RX_BUFFERED 0x0400 /* Try and pass on complete packets */ - -#define PORT_ISOPEN 0x0001 /* Port open? */ -#define PORT_HUPCL 0x0002 /* Hangup on close? */ -#define PORT_MOPENPEND 0x0004 /* Modem open pending */ -#define PORT_ISPARALLEL 0x0008 /* Parallel port */ -#define PORT_BREAK 0x0010 /* Port on break */ -#define PORT_STATUSPEND 0x0020 /* Status packet pending */ -#define PORT_BREAKPEND 0x0040 /* Break packet pending */ -#define PORT_MODEMPEND 0x0080 /* Modem status packet pending */ -#define PORT_PARALLELBUG 0x0100 /* CD1400 LF -> CR LF bug on parallel - port */ -#define PORT_FULLMODEM 0x0200 /* Full modem signals */ -#define PORT_RJ45 0x0400 /* RJ45 connector - no RI signal */ -#define PORT_RESTRICTED 0x0600 /* Restricted connector - no RI / DTR */ - -#define PORT_MODEMBITS 0x0600 /* Mask for modem fields */ - -#define PORT_WCLOSE 0x0800 /* Waiting for close */ -#define PORT_HANDSHAKEFIX 0x1000 /* Port has H/W flow control fix */ -#define PORT_WASPCLOSED 0x2000 /* Port closed with PCLOSE */ -#define DUMPMODE 0x4000 /* Dump RTA mem */ -#define READ_REG 0x8000 /* Read CD1400 register */ - - - -/************************************************************************** - * PHB Structure - * A few words. - * - * Normally Packets are added to the end of the list and removed from - * the start. The pointer tx_add points to a SPACE to put a Packet. - * The pointer tx_remove points to the next Packet to remove - *************************************************************************/ - -struct PHB { - u8 source; - u8 handshake; - u8 status; - u16 timeout; /* Maximum of 1.9 seconds */ - u8 link; /* Send down this link */ - u8 destination; - u16 tx_start; - u16 tx_end; - u16 tx_add; - u16 tx_remove; - - u16 rx_start; - u16 rx_end; - u16 rx_add; - u16 rx_remove; - -}; - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/pkt.h b/drivers/staging/generic_serial/rio/pkt.h deleted file mode 100644 index a945816..0000000 --- a/drivers/staging/generic_serial/rio/pkt.h +++ /dev/null @@ -1,77 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* P A C K E T H E A D E R F I L E - ******* ******* - **************************************************************************** - - Author : Ian Nandhra / Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _pkt_h -#define _pkt_h 1 - -#define PKT_CMD_BIT ((ushort) 0x080) -#define PKT_CMD_DATA ((ushort) 0x080) - -#define PKT_ACK ((ushort) 0x040) - -#define PKT_TGL ((ushort) 0x020) - -#define PKT_LEN_MASK ((ushort) 0x07f) - -#define DATA_WNDW ((ushort) 0x10) -#define PKT_TTL_MASK ((ushort) 0x0f) - -#define PKT_MAX_DATA_LEN 72 - -#define PKT_LENGTH sizeof(struct PKT) -#define SYNC_PKT_LENGTH (PKT_LENGTH + 4) - -#define CONTROL_PKT_LEN_MASK PKT_LEN_MASK -#define CONTROL_PKT_CMD_BIT PKT_CMD_BIT -#define CONTROL_PKT_ACK (PKT_ACK << 8) -#define CONTROL_PKT_TGL (PKT_TGL << 8) -#define CONTROL_PKT_TTL_MASK (PKT_TTL_MASK << 8) -#define CONTROL_DATA_WNDW (DATA_WNDW << 8) - -struct PKT { - u8 dest_unit; /* Destination Unit Id */ - u8 dest_port; /* Destination POrt */ - u8 src_unit; /* Source Unit Id */ - u8 src_port; /* Source POrt */ - u8 len; - u8 control; - u8 data[PKT_MAX_DATA_LEN]; - /* Actual data :-) */ - u16 csum; /* C-SUM */ -}; -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/port.h b/drivers/staging/generic_serial/rio/port.h deleted file mode 100644 index 49cf6d1..0000000 --- a/drivers/staging/generic_serial/rio/port.h +++ /dev/null @@ -1,179 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : port.h -** SID : 1.3 -** Last Modified : 11/6/98 11:34:12 -** Retrieved : 11/6/98 11:34:21 -** -** ident @(#)port.h 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_port_h__ -#define __rio_port_h__ - -/* -** Port data structure -*/ -struct Port { - struct gs_port gs; - int PortNum; /* RIO port no., 0-511 */ - struct Host *HostP; - void __iomem *Caddr; - unsigned short HostPort; /* Port number on host card */ - unsigned char RupNum; /* Number of RUP for port */ - unsigned char ID2; /* Second ID of RTA for port */ - unsigned long State; /* FLAGS for open & xopen */ -#define RIO_LOPEN 0x00001 /* Local open */ -#define RIO_MOPEN 0x00002 /* Modem open */ -#define RIO_WOPEN 0x00004 /* Waiting for open */ -#define RIO_CLOSING 0x00008 /* The port is being close */ -#define RIO_XPBUSY 0x00010 /* Transparent printer busy */ -#define RIO_BREAKING 0x00020 /* Break in progress */ -#define RIO_DIRECT 0x00040 /* Doing Direct output */ -#define RIO_EXCLUSIVE 0x00080 /* Stream open for exclusive use */ -#define RIO_NDELAY 0x00100 /* Stream is open FNDELAY */ -#define RIO_CARR_ON 0x00200 /* Stream has carrier present */ -#define RIO_XPWANTR 0x00400 /* Stream wanted by Xprint */ -#define RIO_RBLK 0x00800 /* Stream is read-blocked */ -#define RIO_BUSY 0x01000 /* Stream is BUSY for write */ -#define RIO_TIMEOUT 0x02000 /* Stream timeout in progress */ -#define RIO_TXSTOP 0x04000 /* Stream output is stopped */ -#define RIO_WAITFLUSH 0x08000 /* Stream waiting for flush */ -#define RIO_DYNOROD 0x10000 /* Drain failed */ -#define RIO_DELETED 0x20000 /* RTA has been deleted */ -#define RIO_ISSCANCODE 0x40000 /* This line is in scancode mode */ -#define RIO_USING_EUC 0x100000 /* Using extended Unix chars */ -#define RIO_CAN_COOK 0x200000 /* This line can do cooking */ -#define RIO_TRIAD_MODE 0x400000 /* Enable TRIAD special ops. */ -#define RIO_TRIAD_BLOCK 0x800000 /* Next read will block */ -#define RIO_TRIAD_FUNC 0x1000000 /* Seen a function key coming in */ -#define RIO_THROTTLE_RX 0x2000000 /* RX needs to be throttled. */ - - unsigned long Config; /* FLAGS for NOREAD.... */ -#define RIO_NOREAD 0x0001 /* Are not allowed to read port */ -#define RIO_NOWRITE 0x0002 /* Are not allowed to write port */ -#define RIO_NOXPRINT 0x0004 /* Are not allowed to xprint port */ -#define RIO_NOMASK 0x0007 /* All not allowed things */ -#define RIO_IXANY 0x0008 /* Port is allowed ixany */ -#define RIO_MODEM 0x0010 /* Stream is a modem device */ -#define RIO_IXON 0x0020 /* Port is allowed ixon */ -#define RIO_WAITDRAIN 0x0040 /* Wait for port to completely drain */ -#define RIO_MAP_50_TO_50 0x0080 /* Map 50 baud to 50 baud */ -#define RIO_MAP_110_TO_110 0x0100 /* Map 110 baud to 110 baud */ - -/* -** 15.10.1998 ARG - ESIL 0761 prt fix -** As LynxOS does not appear to support Hardware Flow Control ..... -** Define our own flow control flags in 'Config'. -*/ -#define RIO_CTSFLOW 0x0200 /* RIO's own CTSFLOW flag */ -#define RIO_RTSFLOW 0x0400 /* RIO's own RTSFLOW flag */ - - - struct PHB __iomem *PhbP; /* pointer to PHB for port */ - u16 __iomem *TxAdd; /* Add packets here */ - u16 __iomem *TxStart; /* Start of add array */ - u16 __iomem *TxEnd; /* End of add array */ - u16 __iomem *RxRemove; /* Remove packets here */ - u16 __iomem *RxStart; /* Start of remove array */ - u16 __iomem *RxEnd; /* End of remove array */ - unsigned int RtaUniqueNum; /* Unique number of RTA */ - unsigned short PortState; /* status of port */ - unsigned short ModemState; /* status of modem lines */ - unsigned long ModemLines; /* Modem bits sent to RTA */ - unsigned char CookMode; /* who expands CR/LF? */ - unsigned char ParamSem; /* Prevent write during param */ - unsigned char Mapped; /* if port mapped onto host */ - unsigned char SecondBlock; /* if port belongs to 2nd block - of 16 port RTA */ - unsigned char InUse; /* how many pre-emptive cmds */ - unsigned char Lock; /* if params locked */ - unsigned char Store; /* if params stored across closes */ - unsigned char FirstOpen; /* TRUE if first time port opened */ - unsigned char FlushCmdBodge; /* if doing a (non)flush */ - unsigned char MagicFlags; /* require intr processing */ -#define MAGIC_FLUSH 0x01 /* mirror of WflushFlag */ -#define MAGIC_REBOOT 0x02 /* RTA re-booted, re-open ports */ -#define MORE_OUTPUT_EYGOR 0x04 /* riotproc failed to empty clists */ - unsigned char WflushFlag; /* 1 How many WFLUSHs active */ -/* -** Transparent print stuff -*/ - struct Xprint { -#ifndef MAX_XP_CTRL_LEN -#define MAX_XP_CTRL_LEN 16 /* ALSO IN DAEMON.H */ -#endif - unsigned int XpCps; - char XpOn[MAX_XP_CTRL_LEN]; - char XpOff[MAX_XP_CTRL_LEN]; - unsigned short XpLen; /* strlen(XpOn)+strlen(XpOff) */ - unsigned char XpActive; - unsigned char XpLastTickOk; /* TRUE if we can process */ -#define XP_OPEN 00001 -#define XP_RUNABLE 00002 - struct ttystatics *XttyP; - } Xprint; - unsigned char RxDataStart; - unsigned char Cor2Copy; /* copy of COR2 */ - char *Name; /* points to the Rta's name */ - char *TxRingBuffer; - unsigned short TxBufferIn; /* New data arrives here */ - unsigned short TxBufferOut; /* Intr removes data here */ - unsigned short OldTxBufferOut; /* Indicates if draining */ - int TimeoutId; /* Timeout ID */ - unsigned int Debug; - unsigned char WaitUntilBooted; /* True if open should block */ - unsigned int statsGather; /* True if gathering stats */ - unsigned long txchars; /* Chars transmitted */ - unsigned long rxchars; /* Chars received */ - unsigned long opens; /* port open count */ - unsigned long closes; /* port close count */ - unsigned long ioctls; /* ioctl count */ - unsigned char LastRxTgl; /* Last state of rx toggle bit */ - spinlock_t portSem; /* Lock using this sem */ - int MonitorTstate; /* Monitoring ? */ - int timeout_id; /* For calling 100 ms delays */ - int timeout_sem; /* For calling 100 ms delays */ - int firstOpen; /* First time open ? */ - char *p; /* save the global struc here .. */ -}; - -struct ModuleInfo { - char *Name; - unsigned int Flags[4]; /* one per port on a module */ -}; - -/* -** This struct is required because trying to grab an entire Port structure -** runs into problems with differing struct sizes between driver and config. -*/ -struct PortParams { - unsigned int Port; - unsigned long Config; - unsigned long State; - struct ttystatics *TtyP; -}; - -#endif diff --git a/drivers/staging/generic_serial/rio/protsts.h b/drivers/staging/generic_serial/rio/protsts.h deleted file mode 100644 index 8ab7940..0000000 --- a/drivers/staging/generic_serial/rio/protsts.h +++ /dev/null @@ -1,110 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* P R O T O C O L S T A T U S S T R U C T U R E ******* - ******* ******* - **************************************************************************** - - Author : Ian Nandhra / Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _protsts_h -#define _protsts_h 1 - -/************************************************* - * ACK bit. Last Packet received OK. Set by - * rxpkt to indicate that the Packet has been - * received OK and that the LTT must set the ACK - * bit in the next outward bound Packet - * and re-set by LTT's after xmit. - * - * Gets shoved into rx_status - ************************************************/ -#define PHB_RX_LAST_PKT_ACKED ((ushort) 0x080) - -/******************************************************* - * The Rx TOGGLE bit. - * Stuffed into rx_status by RXPKT - ******************************************************/ -#define PHB_RX_DATA_WNDW ((ushort) 0x040) - -/******************************************************* - * The Rx TOGGLE bit. Matches the setting in PKT.H - * Stuffed into rx_status - ******************************************************/ -#define PHB_RX_TGL ((ushort) 0x2000) - - -/************************************************* - * This bit is set by the LRT to indicate that - * an ACK (packet) must be returned. - * - * Gets shoved into tx_status - ************************************************/ -#define PHB_TX_SEND_PKT_ACK ((ushort) 0x08) - -/************************************************* - * Set by LTT to indicate that an ACK is required - *************************************************/ -#define PHB_TX_ACK_RQRD ((ushort) 0x01) - - -/******************************************************* - * The Tx TOGGLE bit. - * Stuffed into tx_status by RXPKT from the PKT WndW - * field. Looked by the LTT when the NEXT Packet - * is going to be sent. - ******************************************************/ -#define PHB_TX_DATA_WNDW ((ushort) 0x04) - - -/******************************************************* - * The Tx TOGGLE bit. Matches the setting in PKT.H - * Stuffed into tx_status - ******************************************************/ -#define PHB_TX_TGL ((ushort) 0x02) - -/******************************************************* - * Request intr bit. Set when the queue has gone quiet - * and the PHB has requested an interrupt. - ******************************************************/ -#define PHB_TX_INTR ((ushort) 0x100) - -/******************************************************* - * SET if the PHB cannot send any more data down the - * Link - ******************************************************/ -#define PHB_TX_HANDSHAKE ((ushort) 0x010) - - -#define RUP_SEND_WNDW ((ushort) 0x08) ; - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/rio.h b/drivers/staging/generic_serial/rio/rio.h deleted file mode 100644 index 1bf3622..0000000 --- a/drivers/staging/generic_serial/rio/rio.h +++ /dev/null @@ -1,208 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 1998 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rio.h -** SID : 1.3 -** Last Modified : 11/6/98 11:34:13 -** Retrieved : 11/6/98 11:34:22 -** -** ident @(#)rio.h 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_rio_h__ -#define __rio_rio_h__ - -/* -** Maximum numbers of things -*/ -#define RIO_SLOTS 4 /* number of configuration slots */ -#define RIO_HOSTS 4 /* number of hosts that can be found */ -#define PORTS_PER_HOST 128 /* number of ports per host */ -#define LINKS_PER_UNIT 4 /* number of links from a host */ -#define RIO_PORTS (PORTS_PER_HOST * RIO_HOSTS) /* max. no. of ports */ -#define RTAS_PER_HOST (MAX_RUP) /* number of RTAs per host */ -#define PORTS_PER_RTA (PORTS_PER_HOST/RTAS_PER_HOST) /* ports on a rta */ -#define PORTS_PER_MODULE 4 /* number of ports on a plug-in module */ - /* number of modules on an RTA */ -#define MODULES_PER_RTA (PORTS_PER_RTA/PORTS_PER_MODULE) -#define MAX_PRODUCT 16 /* numbr of different product codes */ -#define MAX_MODULE_TYPES 16 /* number of different types of module */ - -#define RIO_CONTROL_DEV 128 /* minor number of host/control device */ -#define RIO_INVALID_MAJOR 0 /* test first host card's major no for validity */ - -/* -** number of RTAs that can be bound to a master -*/ -#define MAX_RTA_BINDINGS (MAX_RUP * RIO_HOSTS) - -/* -** Unit types -*/ -#define PC_RTA16 0x90000000 -#define PC_RTA8 0xe0000000 -#define TYPE_HOST 0 -#define TYPE_RTA8 1 -#define TYPE_RTA16 2 - -/* -** Flag values returned by functions -*/ - -#define RIO_FAIL -1 - -/* -** SysPort value for something that hasn't any ports -*/ -#define NO_PORT 0xFFFFFFFF - -/* -** Unit ID Of all hosts -*/ -#define HOST_ID 0 - -/* -** Break bytes into nybles -*/ -#define LONYBLE(X) ((X) & 0xF) -#define HINYBLE(X) (((X)>>4) & 0xF) - -/* -** Flag values passed into some functions -*/ -#define DONT_SLEEP 0 -#define OK_TO_SLEEP 1 - -#define DONT_PRINT 1 -#define DO_PRINT 0 - -#define PRINT_TO_LOG_CONS 0 -#define PRINT_TO_CONS 1 -#define PRINT_TO_LOG 2 - -/* -** Timeout has trouble with times of less than 3 ticks... -*/ -#define MIN_TIMEOUT 3 - -/* -** Generally useful constants -*/ - -#define HUNDRED_MS ((HZ/10)?(HZ/10):1) -#define ONE_MEG 0x100000 -#define SIXTY_FOUR_K 0x10000 - -#define RIO_AT_MEM_SIZE SIXTY_FOUR_K -#define RIO_EISA_MEM_SIZE SIXTY_FOUR_K -#define RIO_MCA_MEM_SIZE SIXTY_FOUR_K - -#define COOK_WELL 0 -#define COOK_MEDIUM 1 -#define COOK_RAW 2 - -/* -** Pointer manipulation stuff -** RIO_PTR takes hostp->Caddr and the offset into the DP RAM area -** and produces a UNIX caddr_t (pointer) to the object -** RIO_OBJ takes hostp->Caddr and a UNIX pointer to an object and -** returns the offset into the DP RAM area. -*/ -#define RIO_PTR(C,O) (((unsigned char __iomem *)(C))+(0xFFFF&(O))) -#define RIO_OFF(C,O) ((unsigned char __iomem *)(O)-(unsigned char __iomem *)(C)) - -/* -** How to convert from various different device number formats: -** DEV is a dev number, as passed to open, close etc - NOT a minor -** number! -**/ - -#define RIO_MODEM_MASK 0x1FF -#define RIO_MODEM_BIT 0x200 -#define RIO_UNMODEM(DEV) (MINOR(DEV) & RIO_MODEM_MASK) -#define RIO_ISMODEM(DEV) (MINOR(DEV) & RIO_MODEM_BIT) -#define RIO_PORT(DEV,FIRST_MAJ) ( (MAJOR(DEV) - FIRST_MAJ) * PORTS_PER_HOST) \ - + MINOR(DEV) -#define CSUM(pkt_ptr) (((u16 *)(pkt_ptr))[0] + ((u16 *)(pkt_ptr))[1] + \ - ((u16 *)(pkt_ptr))[2] + ((u16 *)(pkt_ptr))[3] + \ - ((u16 *)(pkt_ptr))[4] + ((u16 *)(pkt_ptr))[5] + \ - ((u16 *)(pkt_ptr))[6] + ((u16 *)(pkt_ptr))[7] + \ - ((u16 *)(pkt_ptr))[8] + ((u16 *)(pkt_ptr))[9] ) - -#define RIO_LINK_ENABLE 0x80FF /* FF is a hack, mainly for Mips, to */ - /* prevent a really stupid race condition. */ - -#define NOT_INITIALISED 0 -#define INITIALISED 1 - -#define NOT_POLLING 0 -#define POLLING 1 - -#define NOT_CHANGED 0 -#define CHANGED 1 - -#define NOT_INUSE 0 - -#define DISCONNECT 0 -#define CONNECT 1 - -/* ------ Control Codes ------ */ - -#define CONTROL '^' -#define IFOAD ( CONTROL + 1 ) -#define IDENTIFY ( CONTROL + 2 ) -#define ZOMBIE ( CONTROL + 3 ) -#define UFOAD ( CONTROL + 4 ) -#define IWAIT ( CONTROL + 5 ) - -#define IFOAD_MAGIC 0xF0AD /* of course */ -#define ZOMBIE_MAGIC (~0xDEAD) /* not dead -> zombie */ -#define UFOAD_MAGIC 0xD1E /* kill-your-neighbour */ -#define IWAIT_MAGIC 0xB1DE /* Bide your time */ - -/* ------ Error Codes ------ */ - -#define E_NO_ERROR ((ushort) 0) - -/* ------ Free Lists ------ */ - -struct rio_free_list { - u16 next; - u16 prev; -}; - -/* NULL for card side linked lists */ -#define TPNULL ((ushort)(0x8000)) -/* We can add another packet to a transmit queue if the packet pointer pointed - * to by the TxAdd pointer has PKT_IN_USE clear in its address. */ -#define PKT_IN_USE 0x1 - -/* ------ Topology ------ */ - -struct Top { - u8 Unit; - u8 Link; -}; - -#endif /* __rio_h__ */ diff --git a/drivers/staging/generic_serial/rio/rio_linux.c b/drivers/staging/generic_serial/rio/rio_linux.c deleted file mode 100644 index 5e33293..0000000 --- a/drivers/staging/generic_serial/rio/rio_linux.c +++ /dev/null @@ -1,1204 +0,0 @@ - -/* rio_linux.c -- Linux driver for the Specialix RIO series cards. - * - * - * (C) 1999 R.E.Wolff@BitWizard.nl - * - * Specialix pays for the development and support of this driver. - * Please DO contact support@specialix.co.uk if you require - * support. But please read the documentation (rio.txt) first. - * - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be - * useful, but WITHOUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, - * USA. - * - * */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "linux_compat.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "param.h" -#include "protsts.h" -#include "rioboard.h" - - -#include "rio_linux.h" - -/* I don't think that this driver can handle more than 512 ports on -one machine. Specialix specifies max 4 boards in one machine. I don't -know why. If you want to try anyway you'll have to increase the number -of boards in rio.h. You'll have to allocate more majors if you need -more than 512 ports.... */ - -#ifndef RIO_NORMAL_MAJOR0 -/* This allows overriding on the compiler commandline, or in a "major.h" - include or something like that */ -#define RIO_NORMAL_MAJOR0 154 -#define RIO_NORMAL_MAJOR1 156 -#endif - -#ifndef PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8 -#define PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8 0x2000 -#endif - -#ifndef RIO_WINDOW_LEN -#define RIO_WINDOW_LEN 0x10000 -#endif - - -/* Configurable options: - (Don't be too sure that it'll work if you toggle them) */ - -/* Am I paranoid or not ? ;-) */ -#undef RIO_PARANOIA_CHECK - - -/* 20 -> 2000 per second. The card should rate-limit interrupts at 1000 - Hz, but it is user configurable. I don't recommend going above 1000 - Hz. The interrupt ratelimit might trigger if the interrupt is - shared with a very active other device. - undef this if you want to disable the check.... -*/ -#define IRQ_RATE_LIMIT 200 - - -/* These constants are derived from SCO Source */ -static DEFINE_MUTEX(rio_fw_mutex); -static struct Conf - RIOConf = { - /* locator */ "RIO Config here", - /* startuptime */ HZ * 2, - /* how long to wait for card to run */ - /* slowcook */ 0, - /* TRUE -> always use line disc. */ - /* intrpolltime */ 1, - /* The frequency of OUR polls */ - /* breakinterval */ 25, - /* x10 mS XXX: units seem to be 1ms not 10! -- REW */ - /* timer */ 10, - /* mS */ - /* RtaLoadBase */ 0x7000, - /* HostLoadBase */ 0x7C00, - /* XpHz */ 5, - /* number of Xprint hits per second */ - /* XpCps */ 120, - /* Xprint characters per second */ - /* XpOn */ "\033d#", - /* start Xprint for a wyse 60 */ - /* XpOff */ "\024", - /* end Xprint for a wyse 60 */ - /* MaxXpCps */ 2000, - /* highest Xprint speed */ - /* MinXpCps */ 10, - /* slowest Xprint speed */ - /* SpinCmds */ 1, - /* non-zero for mega fast boots */ - /* First Addr */ 0x0A0000, - /* First address to look at */ - /* Last Addr */ 0xFF0000, - /* Last address looked at */ - /* BufferSize */ 1024, - /* Bytes per port of buffering */ - /* LowWater */ 256, - /* how much data left before wakeup */ - /* LineLength */ 80, - /* how wide is the console? */ - /* CmdTimeout */ HZ, - /* how long a close command may take */ -}; - - - - -/* Function prototypes */ - -static void rio_disable_tx_interrupts(void *ptr); -static void rio_enable_tx_interrupts(void *ptr); -static void rio_disable_rx_interrupts(void *ptr); -static void rio_enable_rx_interrupts(void *ptr); -static int rio_carrier_raised(struct tty_port *port); -static void rio_shutdown_port(void *ptr); -static int rio_set_real_termios(void *ptr); -static void rio_hungup(void *ptr); -static void rio_close(void *ptr); -static int rio_chars_in_buffer(void *ptr); -static long rio_fw_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); -static int rio_init_drivers(void); - -static void my_hd(void *addr, int len); - -static struct tty_driver *rio_driver, *rio_driver2; - -/* The name "p" is a bit non-descript. But that's what the rio-lynxos -sources use all over the place. */ -struct rio_info *p; - -int rio_debug; - - -/* You can have the driver poll your card. - - Set rio_poll to 1 to poll every timer tick (10ms on Intel). - This is used when the card cannot use an interrupt for some reason. -*/ -static int rio_poll = 1; - - -/* These are the only open spaces in my computer. Yours may have more - or less.... */ -static int rio_probe_addrs[] = { 0xc0000, 0xd0000, 0xe0000 }; - -#define NR_RIO_ADDRS ARRAY_SIZE(rio_probe_addrs) - - -/* Set the mask to all-ones. This alas, only supports 32 interrupts. - Some architectures may need more. -- Changed to LONG to - support up to 64 bits on 64bit architectures. -- REW 20/06/99 */ -static long rio_irqmask = -1; - -MODULE_AUTHOR("Rogier Wolff , Patrick van de Lageweg "); -MODULE_DESCRIPTION("RIO driver"); -MODULE_LICENSE("GPL"); -module_param(rio_poll, int, 0); -module_param(rio_debug, int, 0644); -module_param(rio_irqmask, long, 0); - -static struct real_driver rio_real_driver = { - rio_disable_tx_interrupts, - rio_enable_tx_interrupts, - rio_disable_rx_interrupts, - rio_enable_rx_interrupts, - rio_shutdown_port, - rio_set_real_termios, - rio_chars_in_buffer, - rio_close, - rio_hungup, - NULL -}; - -/* - * Firmware loader driver specific routines - * - */ - -static const struct file_operations rio_fw_fops = { - .owner = THIS_MODULE, - .unlocked_ioctl = rio_fw_ioctl, - .llseek = noop_llseek, -}; - -static struct miscdevice rio_fw_device = { - RIOCTL_MISC_MINOR, "rioctl", &rio_fw_fops -}; - - - - - -#ifdef RIO_PARANOIA_CHECK - -/* This doesn't work. Who's paranoid around here? Not me! */ - -static inline int rio_paranoia_check(struct rio_port const *port, char *name, const char *routine) -{ - - static const char *badmagic = KERN_ERR "rio: Warning: bad rio port magic number for device %s in %s\n"; - static const char *badinfo = KERN_ERR "rio: Warning: null rio port for device %s in %s\n"; - - if (!port) { - printk(badinfo, name, routine); - return 1; - } - if (port->magic != RIO_MAGIC) { - printk(badmagic, name, routine); - return 1; - } - - return 0; -} -#else -#define rio_paranoia_check(a,b,c) 0 -#endif - - -#ifdef DEBUG -static void my_hd(void *ad, int len) -{ - int i, j, ch; - unsigned char *addr = ad; - - for (i = 0; i < len; i += 16) { - rio_dprintk(RIO_DEBUG_PARAM, "%08lx ", (unsigned long) addr + i); - for (j = 0; j < 16; j++) { - rio_dprintk(RIO_DEBUG_PARAM, "%02x %s", addr[j + i], (j == 7) ? " " : ""); - } - for (j = 0; j < 16; j++) { - ch = addr[j + i]; - rio_dprintk(RIO_DEBUG_PARAM, "%c", (ch < 0x20) ? '.' : ((ch > 0x7f) ? '.' : ch)); - } - rio_dprintk(RIO_DEBUG_PARAM, "\n"); - } -} -#else -#define my_hd(ad,len) do{/* nothing*/ } while (0) -#endif - - -/* Delay a number of jiffies, allowing a signal to interrupt */ -int RIODelay(struct Port *PortP, int njiffies) -{ - func_enter(); - - rio_dprintk(RIO_DEBUG_DELAY, "delaying %d jiffies\n", njiffies); - msleep_interruptible(jiffies_to_msecs(njiffies)); - func_exit(); - - if (signal_pending(current)) - return RIO_FAIL; - else - return !RIO_FAIL; -} - - -/* Delay a number of jiffies, disallowing a signal to interrupt */ -int RIODelay_ni(struct Port *PortP, int njiffies) -{ - func_enter(); - - rio_dprintk(RIO_DEBUG_DELAY, "delaying %d jiffies (ni)\n", njiffies); - msleep(jiffies_to_msecs(njiffies)); - func_exit(); - return !RIO_FAIL; -} - -void rio_copy_to_card(void *from, void __iomem *to, int len) -{ - rio_copy_toio(to, from, len); -} - -int rio_minor(struct tty_struct *tty) -{ - return tty->index + ((tty->driver == rio_driver) ? 0 : 256); -} - -static int rio_set_real_termios(void *ptr) -{ - return RIOParam((struct Port *) ptr, RIOC_CONFIG, 1, 1); -} - - -static void rio_reset_interrupt(struct Host *HostP) -{ - func_enter(); - - switch (HostP->Type) { - case RIO_AT: - case RIO_MCA: - case RIO_PCI: - writeb(0xFF, &HostP->ResetInt); - } - - func_exit(); -} - - -static irqreturn_t rio_interrupt(int irq, void *ptr) -{ - struct Host *HostP; - func_enter(); - - HostP = ptr; /* &p->RIOHosts[(long)ptr]; */ - rio_dprintk(RIO_DEBUG_IFLOW, "rio: enter rio_interrupt (%d/%d)\n", irq, HostP->Ivec); - - /* AAargh! The order in which to do these things is essential and - not trivial. - - - hardware twiddling goes before "recursive". Otherwise when we - poll the card, and a recursive interrupt happens, we won't - ack the card, so it might keep on interrupting us. (especially - level sensitive interrupt systems like PCI). - - - Rate limit goes before hardware twiddling. Otherwise we won't - catch a card that has gone bonkers. - - - The "initialized" test goes after the hardware twiddling. Otherwise - the card will stick us in the interrupt routine again. - - - The initialized test goes before recursive. - */ - - rio_dprintk(RIO_DEBUG_IFLOW, "rio: We've have noticed the interrupt\n"); - if (HostP->Ivec == irq) { - /* Tell the card we've noticed the interrupt. */ - rio_reset_interrupt(HostP); - } - - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) - return IRQ_HANDLED; - - if (test_and_set_bit(RIO_BOARD_INTR_LOCK, &HostP->locks)) { - printk(KERN_ERR "Recursive interrupt! (host %p/irq%d)\n", ptr, HostP->Ivec); - return IRQ_HANDLED; - } - - RIOServiceHost(p, HostP); - - rio_dprintk(RIO_DEBUG_IFLOW, "riointr() doing host %p type %d\n", ptr, HostP->Type); - - clear_bit(RIO_BOARD_INTR_LOCK, &HostP->locks); - rio_dprintk(RIO_DEBUG_IFLOW, "rio: exit rio_interrupt (%d/%d)\n", irq, HostP->Ivec); - func_exit(); - return IRQ_HANDLED; -} - - -static void rio_pollfunc(unsigned long data) -{ - func_enter(); - - rio_interrupt(0, &p->RIOHosts[data]); - mod_timer(&p->RIOHosts[data].timer, jiffies + rio_poll); - - func_exit(); -} - - -/* ********************************************************************** * - * Here are the routines that actually * - * interface with the generic_serial driver * - * ********************************************************************** */ - -/* Ehhm. I don't know how to fiddle with interrupts on the Specialix - cards. .... Hmm. Ok I figured it out. You don't. -- REW */ - -static void rio_disable_tx_interrupts(void *ptr) -{ - func_enter(); - - /* port->gs.port.flags &= ~GS_TX_INTEN; */ - - func_exit(); -} - - -static void rio_enable_tx_interrupts(void *ptr) -{ - struct Port *PortP = ptr; - /* int hn; */ - - func_enter(); - - /* hn = PortP->HostP - p->RIOHosts; - - rio_dprintk (RIO_DEBUG_TTY, "Pushing host %d\n", hn); - rio_interrupt (-1,(void *) hn, NULL); */ - - RIOTxEnable((char *) PortP); - - /* - * In general we cannot count on "tx empty" interrupts, although - * the interrupt routine seems to be able to tell the difference. - */ - PortP->gs.port.flags &= ~GS_TX_INTEN; - - func_exit(); -} - - -static void rio_disable_rx_interrupts(void *ptr) -{ - func_enter(); - func_exit(); -} - -static void rio_enable_rx_interrupts(void *ptr) -{ - /* struct rio_port *port = ptr; */ - func_enter(); - func_exit(); -} - - -/* Jeez. Isn't this simple? */ -static int rio_carrier_raised(struct tty_port *port) -{ - struct Port *PortP = container_of(port, struct Port, gs.port); - int rv; - - func_enter(); - rv = (PortP->ModemState & RIOC_MSVR1_CD) != 0; - - rio_dprintk(RIO_DEBUG_INIT, "Getting CD status: %d\n", rv); - - func_exit(); - return rv; -} - - -/* Jeez. Isn't this simple? Actually, we can sync with the actual port - by just pushing stuff into the queue going to the port... */ -static int rio_chars_in_buffer(void *ptr) -{ - func_enter(); - - func_exit(); - return 0; -} - - -/* Nothing special here... */ -static void rio_shutdown_port(void *ptr) -{ - struct Port *PortP; - - func_enter(); - - PortP = (struct Port *) ptr; - PortP->gs.port.tty = NULL; - func_exit(); -} - - -/* I haven't the foggiest why the decrement use count has to happen - here. The whole linux serial drivers stuff needs to be redesigned. - My guess is that this is a hack to minimize the impact of a bug - elsewhere. Thinking about it some more. (try it sometime) Try - running minicom on a serial port that is driven by a modularized - driver. Have the modem hangup. Then remove the driver module. Then - exit minicom. I expect an "oops". -- REW */ -static void rio_hungup(void *ptr) -{ - struct Port *PortP; - - func_enter(); - - PortP = (struct Port *) ptr; - PortP->gs.port.tty = NULL; - - func_exit(); -} - - -/* The standard serial_close would become shorter if you'd wrap it like - this. - rs_close (...){save_flags;cli;real_close();dec_use_count;restore_flags;} - */ -static void rio_close(void *ptr) -{ - struct Port *PortP; - - func_enter(); - - PortP = (struct Port *) ptr; - - riotclose(ptr); - - if (PortP->gs.port.count) { - printk(KERN_ERR "WARNING port count:%d\n", PortP->gs.port.count); - PortP->gs.port.count = 0; - } - - PortP->gs.port.tty = NULL; - func_exit(); -} - - - -static long rio_fw_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) -{ - int rc = 0; - func_enter(); - - /* The "dev" argument isn't used. */ - mutex_lock(&rio_fw_mutex); - rc = riocontrol(p, 0, cmd, arg, capable(CAP_SYS_ADMIN)); - mutex_unlock(&rio_fw_mutex); - - func_exit(); - return rc; -} - -extern int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg); - -static int rio_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd, unsigned long arg) -{ - void __user *argp = (void __user *)arg; - int rc; - struct Port *PortP; - int ival; - - func_enter(); - - PortP = (struct Port *) tty->driver_data; - - rc = 0; - switch (cmd) { - case TIOCSSOFTCAR: - if ((rc = get_user(ival, (unsigned __user *) argp)) == 0) { - tty->termios->c_cflag = (tty->termios->c_cflag & ~CLOCAL) | (ival ? CLOCAL : 0); - } - break; - case TIOCGSERIAL: - rc = -EFAULT; - if (access_ok(VERIFY_WRITE, argp, sizeof(struct serial_struct))) - rc = gs_getserial(&PortP->gs, argp); - break; - case TCSBRK: - if (PortP->State & RIO_DELETED) { - rio_dprintk(RIO_DEBUG_TTY, "BREAK on deleted RTA\n"); - rc = -EIO; - } else { - if (RIOShortCommand(p, PortP, RIOC_SBREAK, 2, 250) == - RIO_FAIL) { - rio_dprintk(RIO_DEBUG_INTR, "SBREAK RIOShortCommand failed\n"); - rc = -EIO; - } - } - break; - case TCSBRKP: - if (PortP->State & RIO_DELETED) { - rio_dprintk(RIO_DEBUG_TTY, "BREAK on deleted RTA\n"); - rc = -EIO; - } else { - int l; - l = arg ? arg * 100 : 250; - if (l > 255) - l = 255; - if (RIOShortCommand(p, PortP, RIOC_SBREAK, 2, - arg ? arg * 100 : 250) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_INTR, "SBREAK RIOShortCommand failed\n"); - rc = -EIO; - } - } - break; - case TIOCSSERIAL: - rc = -EFAULT; - if (access_ok(VERIFY_READ, argp, sizeof(struct serial_struct))) - rc = gs_setserial(&PortP->gs, argp); - break; - default: - rc = -ENOIOCTLCMD; - break; - } - func_exit(); - return rc; -} - - -/* The throttle/unthrottle scheme for the Specialix card is different - * from other drivers and deserves some explanation. - * The Specialix hardware takes care of XON/XOFF - * and CTS/RTS flow control itself. This means that all we have to - * do when signalled by the upper tty layer to throttle/unthrottle is - * to make a note of it here. When we come to read characters from the - * rx buffers on the card (rio_receive_chars()) we look to see if the - * upper layer can accept more (as noted here in rio_rx_throt[]). - * If it can't we simply don't remove chars from the cards buffer. - * When the tty layer can accept chars, we again note that here and when - * rio_receive_chars() is called it will remove them from the cards buffer. - * The card will notice that a ports buffer has drained below some low - * water mark and will unflow control the line itself, using whatever - * flow control scheme is in use for that port. -- Simon Allen - */ - -static void rio_throttle(struct tty_struct *tty) -{ - struct Port *port = (struct Port *) tty->driver_data; - - func_enter(); - /* If the port is using any type of input flow - * control then throttle the port. - */ - - if ((tty->termios->c_cflag & CRTSCTS) || (I_IXOFF(tty))) { - port->State |= RIO_THROTTLE_RX; - } - - func_exit(); -} - - -static void rio_unthrottle(struct tty_struct *tty) -{ - struct Port *port = (struct Port *) tty->driver_data; - - func_enter(); - /* Always unthrottle even if flow control is not enabled on - * this port in case we disabled flow control while the port - * was throttled - */ - - port->State &= ~RIO_THROTTLE_RX; - - func_exit(); - return; -} - - - - - -/* ********************************************************************** * - * Here are the initialization routines. * - * ********************************************************************** */ - - -static struct vpd_prom *get_VPD_PROM(struct Host *hp) -{ - static struct vpd_prom vpdp; - char *p; - int i; - - func_enter(); - rio_dprintk(RIO_DEBUG_PROBE, "Going to verify vpd prom at %p.\n", hp->Caddr + RIO_VPD_ROM); - - p = (char *) &vpdp; - for (i = 0; i < sizeof(struct vpd_prom); i++) - *p++ = readb(hp->Caddr + RIO_VPD_ROM + i * 2); - /* read_rio_byte (hp, RIO_VPD_ROM + i*2); */ - - /* Terminate the identifier string. - *** requires one extra byte in struct vpd_prom *** */ - *p++ = 0; - - if (rio_debug & RIO_DEBUG_PROBE) - my_hd((char *) &vpdp, 0x20); - - func_exit(); - - return &vpdp; -} - -static const struct tty_operations rio_ops = { - .open = riotopen, - .close = gs_close, - .write = gs_write, - .put_char = gs_put_char, - .flush_chars = gs_flush_chars, - .write_room = gs_write_room, - .chars_in_buffer = gs_chars_in_buffer, - .flush_buffer = gs_flush_buffer, - .ioctl = rio_ioctl, - .throttle = rio_throttle, - .unthrottle = rio_unthrottle, - .set_termios = gs_set_termios, - .stop = gs_stop, - .start = gs_start, - .hangup = gs_hangup, -}; - -static int rio_init_drivers(void) -{ - int error = -ENOMEM; - - rio_driver = alloc_tty_driver(256); - if (!rio_driver) - goto out; - rio_driver2 = alloc_tty_driver(256); - if (!rio_driver2) - goto out1; - - func_enter(); - - rio_driver->owner = THIS_MODULE; - rio_driver->driver_name = "specialix_rio"; - rio_driver->name = "ttySR"; - rio_driver->major = RIO_NORMAL_MAJOR0; - rio_driver->type = TTY_DRIVER_TYPE_SERIAL; - rio_driver->subtype = SERIAL_TYPE_NORMAL; - rio_driver->init_termios = tty_std_termios; - rio_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; - rio_driver->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(rio_driver, &rio_ops); - - rio_driver2->owner = THIS_MODULE; - rio_driver2->driver_name = "specialix_rio"; - rio_driver2->name = "ttySR"; - rio_driver2->major = RIO_NORMAL_MAJOR1; - rio_driver2->type = TTY_DRIVER_TYPE_SERIAL; - rio_driver2->subtype = SERIAL_TYPE_NORMAL; - rio_driver2->init_termios = tty_std_termios; - rio_driver2->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; - rio_driver2->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(rio_driver2, &rio_ops); - - rio_dprintk(RIO_DEBUG_INIT, "set_termios = %p\n", gs_set_termios); - - if ((error = tty_register_driver(rio_driver))) - goto out2; - if ((error = tty_register_driver(rio_driver2))) - goto out3; - func_exit(); - return 0; - out3: - tty_unregister_driver(rio_driver); - out2: - put_tty_driver(rio_driver2); - out1: - put_tty_driver(rio_driver); - out: - printk(KERN_ERR "rio: Couldn't register a rio driver, error = %d\n", error); - return 1; -} - -static const struct tty_port_operations rio_port_ops = { - .carrier_raised = rio_carrier_raised, -}; - -static int rio_init_datastructures(void) -{ - int i; - struct Port *port; - func_enter(); - - /* Many drivers statically allocate the maximum number of ports - There is no reason not to allocate them dynamically. Is there? -- REW */ - /* However, the RIO driver allows users to configure their first - RTA as the ports numbered 504-511. We therefore need to allocate - the whole range. :-( -- REW */ - -#define RI_SZ sizeof(struct rio_info) -#define HOST_SZ sizeof(struct Host) -#define PORT_SZ sizeof(struct Port *) -#define TMIO_SZ sizeof(struct termios *) - rio_dprintk(RIO_DEBUG_INIT, "getting : %Zd %Zd %Zd %Zd %Zd bytes\n", RI_SZ, RIO_HOSTS * HOST_SZ, RIO_PORTS * PORT_SZ, RIO_PORTS * TMIO_SZ, RIO_PORTS * TMIO_SZ); - - if (!(p = kzalloc(RI_SZ, GFP_KERNEL))) - goto free0; - if (!(p->RIOHosts = kzalloc(RIO_HOSTS * HOST_SZ, GFP_KERNEL))) - goto free1; - if (!(p->RIOPortp = kzalloc(RIO_PORTS * PORT_SZ, GFP_KERNEL))) - goto free2; - p->RIOConf = RIOConf; - rio_dprintk(RIO_DEBUG_INIT, "Got : %p %p %p\n", p, p->RIOHosts, p->RIOPortp); - -#if 1 - for (i = 0; i < RIO_PORTS; i++) { - port = p->RIOPortp[i] = kzalloc(sizeof(struct Port), GFP_KERNEL); - if (!port) { - goto free6; - } - rio_dprintk(RIO_DEBUG_INIT, "initing port %d (%d)\n", i, port->Mapped); - tty_port_init(&port->gs.port); - port->gs.port.ops = &rio_port_ops; - port->PortNum = i; - port->gs.magic = RIO_MAGIC; - port->gs.close_delay = HZ / 2; - port->gs.closing_wait = 30 * HZ; - port->gs.rd = &rio_real_driver; - spin_lock_init(&port->portSem); - } -#else - /* We could postpone initializing them to when they are configured. */ -#endif - - - - if (rio_debug & RIO_DEBUG_INIT) { - my_hd(&rio_real_driver, sizeof(rio_real_driver)); - } - - - func_exit(); - return 0; - - free6:for (i--; i >= 0; i--) - kfree(p->RIOPortp[i]); -/*free5: - free4: - free3:*/ kfree(p->RIOPortp); - free2:kfree(p->RIOHosts); - free1: - rio_dprintk(RIO_DEBUG_INIT, "Not enough memory! %p %p %p\n", p, p->RIOHosts, p->RIOPortp); - kfree(p); - free0: - return -ENOMEM; -} - -static void __exit rio_release_drivers(void) -{ - func_enter(); - tty_unregister_driver(rio_driver2); - tty_unregister_driver(rio_driver); - put_tty_driver(rio_driver2); - put_tty_driver(rio_driver); - func_exit(); -} - - -#ifdef CONFIG_PCI - /* This was written for SX, but applies to RIO too... - (including bugs....) - - There is another bit besides Bit 17. Turning that bit off - (on boards shipped with the fix in the eeprom) results in a - hang on the next access to the card. - */ - - /******************************************************** - * Setting bit 17 in the CNTRL register of the PLX 9050 * - * chip forces a retry on writes while a read is pending.* - * This is to prevent the card locking up on Intel Xeon * - * multiprocessor systems with the NX chipset. -- NV * - ********************************************************/ - -/* Newer cards are produced with this bit set from the configuration - EEprom. As the bit is read/write for the CPU, we can fix it here, - if we detect that it isn't set correctly. -- REW */ - -static void fix_rio_pci(struct pci_dev *pdev) -{ - unsigned long hwbase; - unsigned char __iomem *rebase; - unsigned int t; - -#define CNTRL_REG_OFFSET 0x50 -#define CNTRL_REG_GOODVALUE 0x18260000 - - hwbase = pci_resource_start(pdev, 0); - rebase = ioremap(hwbase, 0x80); - t = readl(rebase + CNTRL_REG_OFFSET); - if (t != CNTRL_REG_GOODVALUE) { - printk(KERN_DEBUG "rio: performing cntrl reg fix: %08x -> %08x\n", t, CNTRL_REG_GOODVALUE); - writel(CNTRL_REG_GOODVALUE, rebase + CNTRL_REG_OFFSET); - } - iounmap(rebase); -} -#endif - - -static int __init rio_init(void) -{ - int found = 0; - int i; - struct Host *hp; - int retval; - struct vpd_prom *vpdp; - int okboard; - -#ifdef CONFIG_PCI - struct pci_dev *pdev = NULL; - unsigned short tshort; -#endif - - func_enter(); - rio_dprintk(RIO_DEBUG_INIT, "Initing rio module... (rio_debug=%d)\n", rio_debug); - - if (abs((long) (&rio_debug) - rio_debug) < 0x10000) { - printk(KERN_WARNING "rio: rio_debug is an address, instead of a value. " "Assuming -1. Was %x/%p.\n", rio_debug, &rio_debug); - rio_debug = -1; - } - - if (misc_register(&rio_fw_device) < 0) { - printk(KERN_ERR "RIO: Unable to register firmware loader driver.\n"); - return -EIO; - } - - retval = rio_init_datastructures(); - if (retval < 0) { - misc_deregister(&rio_fw_device); - return retval; - } -#ifdef CONFIG_PCI - /* First look for the JET devices: */ - while ((pdev = pci_get_device(PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8, pdev))) { - u32 tint; - - if (pci_enable_device(pdev)) - continue; - - /* Specialix has a whole bunch of cards with - 0x2000 as the device ID. They say its because - the standard requires it. Stupid standard. */ - /* It seems that reading a word doesn't work reliably on 2.0. - Also, reading a non-aligned dword doesn't work. So we read the - whole dword at 0x2c and extract the word at 0x2e (SUBSYSTEM_ID) - ourselves */ - pci_read_config_dword(pdev, 0x2c, &tint); - tshort = (tint >> 16) & 0xffff; - rio_dprintk(RIO_DEBUG_PROBE, "Got a specialix card: %x.\n", tint); - if (tshort != 0x0100) { - rio_dprintk(RIO_DEBUG_PROBE, "But it's not a RIO card (%d)...\n", tshort); - continue; - } - rio_dprintk(RIO_DEBUG_PROBE, "cp1\n"); - - hp = &p->RIOHosts[p->RIONumHosts]; - hp->PaddrP = pci_resource_start(pdev, 2); - hp->Ivec = pdev->irq; - if (((1 << hp->Ivec) & rio_irqmask) == 0) - hp->Ivec = 0; - hp->Caddr = ioremap(p->RIOHosts[p->RIONumHosts].PaddrP, RIO_WINDOW_LEN); - hp->CardP = (struct DpRam __iomem *) hp->Caddr; - hp->Type = RIO_PCI; - hp->Copy = rio_copy_to_card; - hp->Mode = RIO_PCI_BOOT_FROM_RAM; - spin_lock_init(&hp->HostLock); - rio_reset_interrupt(hp); - rio_start_card_running(hp); - - rio_dprintk(RIO_DEBUG_PROBE, "Going to test it (%p/%p).\n", (void *) p->RIOHosts[p->RIONumHosts].PaddrP, p->RIOHosts[p->RIONumHosts].Caddr); - if (RIOBoardTest(p->RIOHosts[p->RIONumHosts].PaddrP, p->RIOHosts[p->RIONumHosts].Caddr, RIO_PCI, 0) == 0) { - rio_dprintk(RIO_DEBUG_INIT, "Done RIOBoardTest\n"); - writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt); - p->RIOHosts[p->RIONumHosts].UniqueNum = - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[0]) & 0xFF) << 0) | - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[1]) & 0xFF) << 8) | ((readb(&p->RIOHosts[p->RIONumHosts].Unique[2]) & 0xFF) << 16) | ((readb(&p->RIOHosts[p->RIONumHosts].Unique[3]) & 0xFF) << 24); - rio_dprintk(RIO_DEBUG_PROBE, "Hmm Tested ok, uniqid = %x.\n", p->RIOHosts[p->RIONumHosts].UniqueNum); - - fix_rio_pci(pdev); - - p->RIOHosts[p->RIONumHosts].pdev = pdev; - pci_dev_get(pdev); - - p->RIOLastPCISearch = 0; - p->RIONumHosts++; - found++; - } else { - iounmap(p->RIOHosts[p->RIONumHosts].Caddr); - p->RIOHosts[p->RIONumHosts].Caddr = NULL; - } - } - - /* Then look for the older PCI card.... : */ - - /* These older PCI cards have problems (only byte-mode access is - supported), which makes them a bit awkward to support. - They also have problems sharing interrupts. Be careful. - (The driver now refuses to share interrupts for these - cards. This should be sufficient). - */ - - /* Then look for the older RIO/PCI devices: */ - while ((pdev = pci_get_device(PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_SPECIALIX_RIO, pdev))) { - if (pci_enable_device(pdev)) - continue; - -#ifdef CONFIG_RIO_OLDPCI - hp = &p->RIOHosts[p->RIONumHosts]; - hp->PaddrP = pci_resource_start(pdev, 0); - hp->Ivec = pdev->irq; - if (((1 << hp->Ivec) & rio_irqmask) == 0) - hp->Ivec = 0; - hp->Ivec |= 0x8000; /* Mark as non-sharable */ - hp->Caddr = ioremap(p->RIOHosts[p->RIONumHosts].PaddrP, RIO_WINDOW_LEN); - hp->CardP = (struct DpRam __iomem *) hp->Caddr; - hp->Type = RIO_PCI; - hp->Copy = rio_copy_to_card; - hp->Mode = RIO_PCI_BOOT_FROM_RAM; - spin_lock_init(&hp->HostLock); - - rio_dprintk(RIO_DEBUG_PROBE, "Ivec: %x\n", hp->Ivec); - rio_dprintk(RIO_DEBUG_PROBE, "Mode: %x\n", hp->Mode); - - rio_reset_interrupt(hp); - rio_start_card_running(hp); - rio_dprintk(RIO_DEBUG_PROBE, "Going to test it (%p/%p).\n", (void *) p->RIOHosts[p->RIONumHosts].PaddrP, p->RIOHosts[p->RIONumHosts].Caddr); - if (RIOBoardTest(p->RIOHosts[p->RIONumHosts].PaddrP, p->RIOHosts[p->RIONumHosts].Caddr, RIO_PCI, 0) == 0) { - writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt); - p->RIOHosts[p->RIONumHosts].UniqueNum = - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[0]) & 0xFF) << 0) | - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[1]) & 0xFF) << 8) | ((readb(&p->RIOHosts[p->RIONumHosts].Unique[2]) & 0xFF) << 16) | ((readb(&p->RIOHosts[p->RIONumHosts].Unique[3]) & 0xFF) << 24); - rio_dprintk(RIO_DEBUG_PROBE, "Hmm Tested ok, uniqid = %x.\n", p->RIOHosts[p->RIONumHosts].UniqueNum); - - p->RIOHosts[p->RIONumHosts].pdev = pdev; - pci_dev_get(pdev); - - p->RIOLastPCISearch = 0; - p->RIONumHosts++; - found++; - } else { - iounmap(p->RIOHosts[p->RIONumHosts].Caddr); - p->RIOHosts[p->RIONumHosts].Caddr = NULL; - } -#else - printk(KERN_ERR "Found an older RIO PCI card, but the driver is not " "compiled to support it.\n"); -#endif - } -#endif /* PCI */ - - /* Now probe for ISA cards... */ - for (i = 0; i < NR_RIO_ADDRS; i++) { - hp = &p->RIOHosts[p->RIONumHosts]; - hp->PaddrP = rio_probe_addrs[i]; - /* There was something about the IRQs of these cards. 'Forget what.--REW */ - hp->Ivec = 0; - hp->Caddr = ioremap(p->RIOHosts[p->RIONumHosts].PaddrP, RIO_WINDOW_LEN); - hp->CardP = (struct DpRam __iomem *) hp->Caddr; - hp->Type = RIO_AT; - hp->Copy = rio_copy_to_card; /* AT card PCI???? - PVDL - * -- YES! this is now a normal copy. Only the - * old PCI card uses the special PCI copy. - * Moreover, the ISA card will work with the - * special PCI copy anyway. -- REW */ - hp->Mode = 0; - spin_lock_init(&hp->HostLock); - - vpdp = get_VPD_PROM(hp); - rio_dprintk(RIO_DEBUG_PROBE, "Got VPD ROM\n"); - okboard = 0; - if ((strncmp(vpdp->identifier, RIO_ISA_IDENT, 16) == 0) || (strncmp(vpdp->identifier, RIO_ISA2_IDENT, 16) == 0) || (strncmp(vpdp->identifier, RIO_ISA3_IDENT, 16) == 0)) { - /* Board is present... */ - if (RIOBoardTest(hp->PaddrP, hp->Caddr, RIO_AT, 0) == 0) { - /* ... and feeling fine!!!! */ - rio_dprintk(RIO_DEBUG_PROBE, "Hmm Tested ok, uniqid = %x.\n", p->RIOHosts[p->RIONumHosts].UniqueNum); - if (RIOAssignAT(p, hp->PaddrP, hp->Caddr, 0)) { - rio_dprintk(RIO_DEBUG_PROBE, "Hmm Tested ok, host%d uniqid = %x.\n", p->RIONumHosts, p->RIOHosts[p->RIONumHosts - 1].UniqueNum); - okboard++; - found++; - } - } - - if (!okboard) { - iounmap(hp->Caddr); - hp->Caddr = NULL; - } - } - } - - - for (i = 0; i < p->RIONumHosts; i++) { - hp = &p->RIOHosts[i]; - if (hp->Ivec) { - int mode = IRQF_SHARED; - if (hp->Ivec & 0x8000) { - mode = 0; - hp->Ivec &= 0x7fff; - } - rio_dprintk(RIO_DEBUG_INIT, "Requesting interrupt hp: %p rio_interrupt: %d Mode: %x\n", hp, hp->Ivec, hp->Mode); - retval = request_irq(hp->Ivec, rio_interrupt, mode, "rio", hp); - rio_dprintk(RIO_DEBUG_INIT, "Return value from request_irq: %d\n", retval); - if (retval) { - printk(KERN_ERR "rio: Cannot allocate irq %d.\n", hp->Ivec); - hp->Ivec = 0; - } - rio_dprintk(RIO_DEBUG_INIT, "Got irq %d.\n", hp->Ivec); - if (hp->Ivec != 0) { - rio_dprintk(RIO_DEBUG_INIT, "Enabling interrupts on rio card.\n"); - hp->Mode |= RIO_PCI_INT_ENABLE; - } else - hp->Mode &= ~RIO_PCI_INT_ENABLE; - rio_dprintk(RIO_DEBUG_INIT, "New Mode: %x\n", hp->Mode); - rio_start_card_running(hp); - } - /* Init the timer "always" to make sure that it can safely be - deleted when we unload... */ - - setup_timer(&hp->timer, rio_pollfunc, i); - if (!hp->Ivec) { - rio_dprintk(RIO_DEBUG_INIT, "Starting polling at %dj intervals.\n", rio_poll); - mod_timer(&hp->timer, jiffies + rio_poll); - } - } - - if (found) { - rio_dprintk(RIO_DEBUG_INIT, "rio: total of %d boards detected.\n", found); - rio_init_drivers(); - } else { - /* deregister the misc device we created earlier */ - misc_deregister(&rio_fw_device); - } - - func_exit(); - return found ? 0 : -EIO; -} - - -static void __exit rio_exit(void) -{ - int i; - struct Host *hp; - - func_enter(); - - for (i = 0, hp = p->RIOHosts; i < p->RIONumHosts; i++, hp++) { - RIOHostReset(hp->Type, hp->CardP, hp->Slot); - if (hp->Ivec) { - free_irq(hp->Ivec, hp); - rio_dprintk(RIO_DEBUG_INIT, "freed irq %d.\n", hp->Ivec); - } - /* It is safe/allowed to del_timer a non-active timer */ - del_timer_sync(&hp->timer); - if (hp->Caddr) - iounmap(hp->Caddr); - if (hp->Type == RIO_PCI) - pci_dev_put(hp->pdev); - } - - if (misc_deregister(&rio_fw_device) < 0) { - printk(KERN_INFO "rio: couldn't deregister control-device\n"); - } - - - rio_dprintk(RIO_DEBUG_CLEANUP, "Cleaning up drivers\n"); - - rio_release_drivers(); - - /* Release dynamically allocated memory */ - kfree(p->RIOPortp); - kfree(p->RIOHosts); - kfree(p); - - func_exit(); -} - -module_init(rio_init); -module_exit(rio_exit); diff --git a/drivers/staging/generic_serial/rio/rio_linux.h b/drivers/staging/generic_serial/rio/rio_linux.h deleted file mode 100644 index 7f26cd7..0000000 --- a/drivers/staging/generic_serial/rio/rio_linux.h +++ /dev/null @@ -1,197 +0,0 @@ - -/* - * rio_linux.h - * - * Copyright (C) 1998,1999,2000 R.E.Wolff@BitWizard.nl - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * RIO serial driver. - * - * Version 1.0 -- July, 1999. - * - */ - -#define RIO_NBOARDS 4 -#define RIO_PORTSPERBOARD 128 -#define RIO_NPORTS (RIO_NBOARDS * RIO_PORTSPERBOARD) - -#define MODEM_SUPPORT - -#ifdef __KERNEL__ - -#define RIO_MAGIC 0x12345678 - - -struct vpd_prom { - unsigned short id; - char hwrev; - char hwass; - int uniqid; - char myear; - char mweek; - char hw_feature[5]; - char oem_id; - char identifier[16]; -}; - - -#define RIO_DEBUG_ALL 0xffffffff - -#define O_OTHER(tty) \ - ((O_OLCUC(tty)) ||\ - (O_ONLCR(tty)) ||\ - (O_OCRNL(tty)) ||\ - (O_ONOCR(tty)) ||\ - (O_ONLRET(tty)) ||\ - (O_OFILL(tty)) ||\ - (O_OFDEL(tty)) ||\ - (O_NLDLY(tty)) ||\ - (O_CRDLY(tty)) ||\ - (O_TABDLY(tty)) ||\ - (O_BSDLY(tty)) ||\ - (O_VTDLY(tty)) ||\ - (O_FFDLY(tty))) - -/* Same for input. */ -#define I_OTHER(tty) \ - ((I_INLCR(tty)) ||\ - (I_IGNCR(tty)) ||\ - (I_ICRNL(tty)) ||\ - (I_IUCLC(tty)) ||\ - (L_ISIG(tty))) - - -#endif /* __KERNEL__ */ - - -#define RIO_BOARD_INTR_LOCK 1 - - -#ifndef RIOCTL_MISC_MINOR -/* Allow others to gather this into "major.h" or something like that */ -#define RIOCTL_MISC_MINOR 169 -#endif - - -/* Allow us to debug "in the field" without requiring clients to - recompile.... */ -#if 1 -#define rio_spin_lock_irqsave(sem, flags) do { \ - rio_dprintk (RIO_DEBUG_SPINLOCK, "spinlockirqsave: %p %s:%d\n", \ - sem, __FILE__, __LINE__);\ - spin_lock_irqsave(sem, flags);\ - } while (0) - -#define rio_spin_unlock_irqrestore(sem, flags) do { \ - rio_dprintk (RIO_DEBUG_SPINLOCK, "spinunlockirqrestore: %p %s:%d\n",\ - sem, __FILE__, __LINE__);\ - spin_unlock_irqrestore(sem, flags);\ - } while (0) - -#define rio_spin_lock(sem) do { \ - rio_dprintk (RIO_DEBUG_SPINLOCK, "spinlock: %p %s:%d\n",\ - sem, __FILE__, __LINE__);\ - spin_lock(sem);\ - } while (0) - -#define rio_spin_unlock(sem) do { \ - rio_dprintk (RIO_DEBUG_SPINLOCK, "spinunlock: %p %s:%d\n",\ - sem, __FILE__, __LINE__);\ - spin_unlock(sem);\ - } while (0) -#else -#define rio_spin_lock_irqsave(sem, flags) \ - spin_lock_irqsave(sem, flags) - -#define rio_spin_unlock_irqrestore(sem, flags) \ - spin_unlock_irqrestore(sem, flags) - -#define rio_spin_lock(sem) \ - spin_lock(sem) - -#define rio_spin_unlock(sem) \ - spin_unlock(sem) - -#endif - - - -#ifdef CONFIG_RIO_OLDPCI -static inline void __iomem *rio_memcpy_toio(void __iomem *dummy, void __iomem *dest, void *source, int n) -{ - char __iomem *dst = dest; - char *src = source; - - while (n--) { - writeb(*src++, dst++); - (void) readb(dummy); - } - - return dest; -} - -static inline void __iomem *rio_copy_toio(void __iomem *dest, void *source, int n) -{ - char __iomem *dst = dest; - char *src = source; - - while (n--) - writeb(*src++, dst++); - - return dest; -} - - -static inline void *rio_memcpy_fromio(void *dest, void __iomem *source, int n) -{ - char *dst = dest; - char __iomem *src = source; - - while (n--) - *dst++ = readb(src++); - - return dest; -} - -#else -#define rio_memcpy_toio(dummy,dest,source,n) memcpy_toio(dest, source, n) -#define rio_copy_toio memcpy_toio -#define rio_memcpy_fromio memcpy_fromio -#endif - -#define DEBUG 1 - - -/* - This driver can spew a whole lot of debugging output at you. If you - need maximum performance, you should disable the DEBUG define. To - aid in debugging in the field, I'm leaving the compile-time debug - features enabled, and disable them "runtime". That allows me to - instruct people with problems to enable debugging without requiring - them to recompile... -*/ - -#ifdef DEBUG -#define rio_dprintk(f, str...) do { if (rio_debug & f) printk (str);} while (0) -#define func_enter() rio_dprintk (RIO_DEBUG_FLOW, "rio: enter %s\n", __func__) -#define func_exit() rio_dprintk (RIO_DEBUG_FLOW, "rio: exit %s\n", __func__) -#define func_enter2() rio_dprintk (RIO_DEBUG_FLOW, "rio: enter %s (port %d)\n",__func__, port->line) -#else -#define rio_dprintk(f, str...) /* nothing */ -#define func_enter() -#define func_exit() -#define func_enter2() -#endif diff --git a/drivers/staging/generic_serial/rio/rioboard.h b/drivers/staging/generic_serial/rio/rioboard.h deleted file mode 100644 index 2522300..0000000 --- a/drivers/staging/generic_serial/rio/rioboard.h +++ /dev/null @@ -1,275 +0,0 @@ -/************************************************************************/ -/* */ -/* Title : RIO Host Card Hardware Definitions */ -/* */ -/* Author : N.P.Vassallo */ -/* */ -/* Creation : 26th April 1999 */ -/* */ -/* Version : 1.0.0 */ -/* */ -/* Copyright : (c) Specialix International Ltd. 1999 * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * */ -/* Description : Prototypes, structures and definitions */ -/* describing the RIO board hardware */ -/* */ -/************************************************************************/ - -#ifndef _rioboard_h /* If RIOBOARD.H not already defined */ -#define _rioboard_h 1 - -/***************************************************************************** -*********************** *********************** -*********************** Hardware Control Registers *********************** -*********************** *********************** -*****************************************************************************/ - -/* Hardware Registers... */ - -#define RIO_REG_BASE 0x7C00 /* Base of control registers */ - -#define RIO_CONFIG RIO_REG_BASE + 0x0000 /* WRITE: Configuration Register */ -#define RIO_INTSET RIO_REG_BASE + 0x0080 /* WRITE: Interrupt Set */ -#define RIO_RESET RIO_REG_BASE + 0x0100 /* WRITE: Host Reset */ -#define RIO_INTRESET RIO_REG_BASE + 0x0180 /* WRITE: Interrupt Reset */ - -#define RIO_VPD_ROM RIO_REG_BASE + 0x0000 /* READ: Vital Product Data ROM */ -#define RIO_INTSTAT RIO_REG_BASE + 0x0080 /* READ: Interrupt Status (Jet boards only) */ -#define RIO_RESETSTAT RIO_REG_BASE + 0x0100 /* READ: Reset Status (Jet boards only) */ - -/* RIO_VPD_ROM definitions... */ -#define VPD_SLX_ID1 0x00 /* READ: Specialix Identifier #1 */ -#define VPD_SLX_ID2 0x01 /* READ: Specialix Identifier #2 */ -#define VPD_HW_REV 0x02 /* READ: Hardware Revision */ -#define VPD_HW_ASSEM 0x03 /* READ: Hardware Assembly Level */ -#define VPD_UNIQUEID4 0x04 /* READ: Unique Identifier #4 */ -#define VPD_UNIQUEID3 0x05 /* READ: Unique Identifier #3 */ -#define VPD_UNIQUEID2 0x06 /* READ: Unique Identifier #2 */ -#define VPD_UNIQUEID1 0x07 /* READ: Unique Identifier #1 */ -#define VPD_MANU_YEAR 0x08 /* READ: Year Of Manufacture (0 = 1970) */ -#define VPD_MANU_WEEK 0x09 /* READ: Week Of Manufacture (0 = week 1 Jan) */ -#define VPD_HWFEATURE1 0x0A /* READ: Hardware Feature Byte 1 */ -#define VPD_HWFEATURE2 0x0B /* READ: Hardware Feature Byte 2 */ -#define VPD_HWFEATURE3 0x0C /* READ: Hardware Feature Byte 3 */ -#define VPD_HWFEATURE4 0x0D /* READ: Hardware Feature Byte 4 */ -#define VPD_HWFEATURE5 0x0E /* READ: Hardware Feature Byte 5 */ -#define VPD_OEMID 0x0F /* READ: OEM Identifier */ -#define VPD_IDENT 0x10 /* READ: Identifier string (16 bytes) */ -#define VPD_IDENT_LEN 0x10 - -/* VPD ROM Definitions... */ -#define SLX_ID1 0x4D -#define SLX_ID2 0x98 - -#define PRODUCT_ID(a) ((a>>4)&0xF) /* Use to obtain Product ID from VPD_UNIQUEID1 */ - -#define ID_SX_ISA 0x2 -#define ID_RIO_EISA 0x3 -#define ID_SX_PCI 0x5 -#define ID_SX_EISA 0x7 -#define ID_RIO_RTA16 0x9 -#define ID_RIO_ISA 0xA -#define ID_RIO_MCA 0xB -#define ID_RIO_SBUS 0xC -#define ID_RIO_PCI 0xD -#define ID_RIO_RTA8 0xE - -/* Transputer bootstrap definitions... */ - -#define BOOTLOADADDR (0x8000 - 6) -#define BOOTINDICATE (0x8000 - 2) - -/* Firmware load position... */ - -#define FIRMWARELOADADDR 0x7C00 /* Firmware is loaded _before_ this address */ - -/***************************************************************************** -***************************** ***************************** -***************************** RIO (Rev1) ISA ***************************** -***************************** ***************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_ISA_IDENT "JBJGPGGHINSMJPJR" - -#define RIO_ISA_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_ISA_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_ISA_CFG_IRQMASK 0x30 /* Interrupt mask */ -#define RIO_ISA_CFG_IRQ12 0x10 /* Interrupt Level 12 */ -#define RIO_ISA_CFG_IRQ11 0x20 /* Interrupt Level 11 */ -#define RIO_ISA_CFG_IRQ9 0x30 /* Interrupt Level 9 */ -#define RIO_ISA_CFG_LINK20 0x40 /* 20Mbps link, else 10Mbps */ -#define RIO_ISA_CFG_WAITSTATE0 0x80 /* 0 waitstates, else 1 */ - -/***************************************************************************** -***************************** ***************************** -***************************** RIO (Rev2) ISA ***************************** -***************************** ***************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_ISA2_IDENT "JBJGPGGHINSMJPJR" - -#define RIO_ISA2_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_ISA2_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_ISA2_CFG_INTENABLE 0x04 /* Interrupt enable, else disable */ -#define RIO_ISA2_CFG_16BIT 0x08 /* 16bit mode, else 8bit */ -#define RIO_ISA2_CFG_IRQMASK 0x30 /* Interrupt mask */ -#define RIO_ISA2_CFG_IRQ15 0x00 /* Interrupt Level 15 */ -#define RIO_ISA2_CFG_IRQ12 0x10 /* Interrupt Level 12 */ -#define RIO_ISA2_CFG_IRQ11 0x20 /* Interrupt Level 11 */ -#define RIO_ISA2_CFG_IRQ9 0x30 /* Interrupt Level 9 */ -#define RIO_ISA2_CFG_LINK20 0x40 /* 20Mbps link, else 10Mbps */ -#define RIO_ISA2_CFG_WAITSTATE0 0x80 /* 0 waitstates, else 1 */ - -/***************************************************************************** -***************************** ****************************** -***************************** RIO (Jet) ISA ****************************** -***************************** ****************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_ISA3_IDENT "JET HOST BY KEV#" - -#define RIO_ISA3_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_ISA3_CFG_INTENABLE 0x04 /* Interrupt enable, else disable */ -#define RIO_ISA32_CFG_IRQMASK 0xF30 /* Interrupt mask */ -#define RIO_ISA3_CFG_IRQ15 0xF0 /* Interrupt Level 15 */ -#define RIO_ISA3_CFG_IRQ12 0xC0 /* Interrupt Level 12 */ -#define RIO_ISA3_CFG_IRQ11 0xB0 /* Interrupt Level 11 */ -#define RIO_ISA3_CFG_IRQ10 0xA0 /* Interrupt Level 10 */ -#define RIO_ISA3_CFG_IRQ9 0x90 /* Interrupt Level 9 */ - -/***************************************************************************** -********************************* ******************************** -********************************* RIO MCA ******************************** -********************************* ******************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_MCA_IDENT "JBJGPGGHINSMJPJR" - -#define RIO_MCA_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_MCA_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_MCA_CFG_LINK20 0x40 /* 20Mbps link, else 10Mbps */ - -/***************************************************************************** -******************************** ******************************** -******************************** RIO EISA ******************************** -******************************** ******************************** -*****************************************************************************/ - -/* EISA Configuration Space Definitions... */ -#define EISA_PRODUCT_ID1 0xC80 -#define EISA_PRODUCT_ID2 0xC81 -#define EISA_PRODUCT_NUMBER 0xC82 -#define EISA_REVISION_NUMBER 0xC83 -#define EISA_CARD_ENABLE 0xC84 -#define EISA_VPD_UNIQUEID4 0xC88 /* READ: Unique Identifier #4 */ -#define EISA_VPD_UNIQUEID3 0xC8A /* READ: Unique Identifier #3 */ -#define EISA_VPD_UNIQUEID2 0xC90 /* READ: Unique Identifier #2 */ -#define EISA_VPD_UNIQUEID1 0xC92 /* READ: Unique Identifier #1 */ -#define EISA_VPD_MANU_YEAR 0xC98 /* READ: Year Of Manufacture (0 = 1970) */ -#define EISA_VPD_MANU_WEEK 0xC9A /* READ: Week Of Manufacture (0 = week 1 Jan) */ -#define EISA_MEM_ADDR_23_16 0xC00 -#define EISA_MEM_ADDR_31_24 0xC01 -#define EISA_RIO_CONFIG 0xC02 /* WRITE: Configuration Register */ -#define EISA_RIO_INTSET 0xC03 /* WRITE: Interrupt Set */ -#define EISA_RIO_INTRESET 0xC03 /* READ: Interrupt Reset */ - -/* Control Register Definitions... */ -#define RIO_EISA_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_EISA_CFG_LINK20 0x02 /* 20Mbps link, else 10Mbps */ -#define RIO_EISA_CFG_BUSENABLE 0x04 /* Enable processor bus */ -#define RIO_EISA_CFG_PROCRUN 0x08 /* Processor running, else reset */ -#define RIO_EISA_CFG_IRQMASK 0xF0 /* Interrupt mask */ -#define RIO_EISA_CFG_IRQ15 0xF0 /* Interrupt Level 15 */ -#define RIO_EISA_CFG_IRQ14 0xE0 /* Interrupt Level 14 */ -#define RIO_EISA_CFG_IRQ12 0xC0 /* Interrupt Level 12 */ -#define RIO_EISA_CFG_IRQ11 0xB0 /* Interrupt Level 11 */ -#define RIO_EISA_CFG_IRQ10 0xA0 /* Interrupt Level 10 */ -#define RIO_EISA_CFG_IRQ9 0x90 /* Interrupt Level 9 */ -#define RIO_EISA_CFG_IRQ7 0x70 /* Interrupt Level 7 */ -#define RIO_EISA_CFG_IRQ6 0x60 /* Interrupt Level 6 */ -#define RIO_EISA_CFG_IRQ5 0x50 /* Interrupt Level 5 */ -#define RIO_EISA_CFG_IRQ4 0x40 /* Interrupt Level 4 */ -#define RIO_EISA_CFG_IRQ3 0x30 /* Interrupt Level 3 */ - -/***************************************************************************** -******************************** ******************************** -******************************** RIO SBus ******************************** -******************************** ******************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_SBUS_IDENT "JBPGK#\0\0\0\0\0\0\0\0\0\0" - -#define RIO_SBUS_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_SBUS_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_SBUS_CFG_INTENABLE 0x04 /* Interrupt enable, else disable */ -#define RIO_SBUS_CFG_IRQMASK 0x38 /* Interrupt mask */ -#define RIO_SBUS_CFG_IRQNONE 0x00 /* No Interrupt */ -#define RIO_SBUS_CFG_IRQ7 0x38 /* Interrupt Level 7 */ -#define RIO_SBUS_CFG_IRQ6 0x30 /* Interrupt Level 6 */ -#define RIO_SBUS_CFG_IRQ5 0x28 /* Interrupt Level 5 */ -#define RIO_SBUS_CFG_IRQ4 0x20 /* Interrupt Level 4 */ -#define RIO_SBUS_CFG_IRQ3 0x18 /* Interrupt Level 3 */ -#define RIO_SBUS_CFG_IRQ2 0x10 /* Interrupt Level 2 */ -#define RIO_SBUS_CFG_IRQ1 0x08 /* Interrupt Level 1 */ -#define RIO_SBUS_CFG_LINK20 0x40 /* 20Mbps link, else 10Mbps */ -#define RIO_SBUS_CFG_PROC25 0x80 /* 25Mhz processor clock, else 20Mhz */ - -/***************************************************************************** -********************************* ******************************** -********************************* RIO PCI ******************************** -********************************* ******************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_PCI_IDENT "ECDDPGJGJHJRGSK#" - -#define RIO_PCI_CFG_BOOTRAM 0x01 /* Boot from RAM, else Link */ -#define RIO_PCI_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_PCI_CFG_INTENABLE 0x04 /* Interrupt enable, else disable */ -#define RIO_PCI_CFG_LINK20 0x40 /* 20Mbps link, else 10Mbps */ -#define RIO_PCI_CFG_PROC25 0x80 /* 25Mhz processor clock, else 20Mhz */ - -/* PCI Definitions... */ -#define SPX_VENDOR_ID 0x11CB /* Assigned by the PCI SIG */ -#define SPX_DEVICE_ID 0x8000 /* RIO bridge boards */ -#define SPX_PLXDEVICE_ID 0x2000 /* PLX bridge boards */ -#define SPX_SUB_VENDOR_ID SPX_VENDOR_ID /* Same as vendor id */ -#define RIO_SUB_SYS_ID 0x0800 /* RIO PCI board */ - -/***************************************************************************** -***************************** ****************************** -***************************** RIO (Jet) PCI ****************************** -***************************** ****************************** -*****************************************************************************/ - -/* Control Register Definitions... */ -#define RIO_PCI2_IDENT "JET HOST BY KEV#" - -#define RIO_PCI2_CFG_BUSENABLE 0x02 /* Enable processor bus */ -#define RIO_PCI2_CFG_INTENABLE 0x04 /* Interrupt enable, else disable */ - -/* PCI Definitions... */ -#define RIO2_SUB_SYS_ID 0x0100 /* RIO (Jet) PCI board */ - -#endif /*_rioboard_h */ - -/* End of RIOBOARD.H */ diff --git a/drivers/staging/generic_serial/rio/rioboot.c b/drivers/staging/generic_serial/rio/rioboot.c deleted file mode 100644 index ffa01c5..0000000 --- a/drivers/staging/generic_serial/rio/rioboot.c +++ /dev/null @@ -1,1113 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioboot.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:36 -** Retrieved : 11/6/98 10:33:48 -** -** ident @(#)rioboot.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" - -static int RIOBootComplete(struct rio_info *p, struct Host *HostP, unsigned int Rup, struct PktCmd __iomem *PktCmdP); - -static const unsigned char RIOAtVec2Ctrl[] = { - /* 0 */ INTERRUPT_DISABLE, - /* 1 */ INTERRUPT_DISABLE, - /* 2 */ INTERRUPT_DISABLE, - /* 3 */ INTERRUPT_DISABLE, - /* 4 */ INTERRUPT_DISABLE, - /* 5 */ INTERRUPT_DISABLE, - /* 6 */ INTERRUPT_DISABLE, - /* 7 */ INTERRUPT_DISABLE, - /* 8 */ INTERRUPT_DISABLE, - /* 9 */ IRQ_9 | INTERRUPT_ENABLE, - /* 10 */ INTERRUPT_DISABLE, - /* 11 */ IRQ_11 | INTERRUPT_ENABLE, - /* 12 */ IRQ_12 | INTERRUPT_ENABLE, - /* 13 */ INTERRUPT_DISABLE, - /* 14 */ INTERRUPT_DISABLE, - /* 15 */ IRQ_15 | INTERRUPT_ENABLE -}; - -/** - * RIOBootCodeRTA - Load RTA boot code - * @p: RIO to load - * @rbp: Download descriptor - * - * Called when the user process initiates booting of the card firmware. - * Lads the firmware - */ - -int RIOBootCodeRTA(struct rio_info *p, struct DownLoad * rbp) -{ - int offset; - - func_enter(); - - rio_dprintk(RIO_DEBUG_BOOT, "Data at user address %p\n", rbp->DataP); - - /* - ** Check that we have set aside enough memory for this - */ - if (rbp->Count > SIXTY_FOUR_K) { - rio_dprintk(RIO_DEBUG_BOOT, "RTA Boot Code Too Large!\n"); - p->RIOError.Error = HOST_FILE_TOO_LARGE; - func_exit(); - return -ENOMEM; - } - - if (p->RIOBooting) { - rio_dprintk(RIO_DEBUG_BOOT, "RTA Boot Code : BUSY BUSY BUSY!\n"); - p->RIOError.Error = BOOT_IN_PROGRESS; - func_exit(); - return -EBUSY; - } - - /* - ** The data we load in must end on a (RTA_BOOT_DATA_SIZE) byte boundary, - ** so calculate how far we have to move the data up the buffer - ** to achieve this. - */ - offset = (RTA_BOOT_DATA_SIZE - (rbp->Count % RTA_BOOT_DATA_SIZE)) % RTA_BOOT_DATA_SIZE; - - /* - ** Be clean, and clear the 'unused' portion of the boot buffer, - ** because it will (eventually) be part of the Rta run time environment - ** and so should be zeroed. - */ - memset(p->RIOBootPackets, 0, offset); - - /* - ** Copy the data from user space into the array - */ - - if (copy_from_user(((u8 *)p->RIOBootPackets) + offset, rbp->DataP, rbp->Count)) { - rio_dprintk(RIO_DEBUG_BOOT, "Bad data copy from user space\n"); - p->RIOError.Error = COPYIN_FAILED; - func_exit(); - return -EFAULT; - } - - /* - ** Make sure that our copy of the size includes that offset we discussed - ** earlier. - */ - p->RIONumBootPkts = (rbp->Count + offset) / RTA_BOOT_DATA_SIZE; - p->RIOBootCount = rbp->Count; - - func_exit(); - return 0; -} - -/** - * rio_start_card_running - host card start - * @HostP: The RIO to kick off - * - * Start a RIO processor unit running. Encapsulates the knowledge - * of the card type. - */ - -void rio_start_card_running(struct Host *HostP) -{ - switch (HostP->Type) { - case RIO_AT: - rio_dprintk(RIO_DEBUG_BOOT, "Start ISA card running\n"); - writeb(BOOT_FROM_RAM | EXTERNAL_BUS_ON | HostP->Mode | RIOAtVec2Ctrl[HostP->Ivec & 0xF], &HostP->Control); - break; - case RIO_PCI: - /* - ** PCI is much the same as MCA. Everything is once again memory - ** mapped, so we are writing to memory registers instead of io - ** ports. - */ - rio_dprintk(RIO_DEBUG_BOOT, "Start PCI card running\n"); - writeb(PCITpBootFromRam | PCITpBusEnable | HostP->Mode, &HostP->Control); - break; - default: - rio_dprintk(RIO_DEBUG_BOOT, "Unknown host type %d\n", HostP->Type); - break; - } - return; -} - -/* -** Load in the host boot code - load it directly onto all halted hosts -** of the correct type. -** -** Put your rubber pants on before messing with this code - even the magic -** numbers have trouble understanding what they are doing here. -*/ - -int RIOBootCodeHOST(struct rio_info *p, struct DownLoad *rbp) -{ - struct Host *HostP; - u8 __iomem *Cad; - PARM_MAP __iomem *ParmMapP; - int RupN; - int PortN; - unsigned int host; - u8 __iomem *StartP; - u8 __iomem *DestP; - int wait_count; - u16 OldParmMap; - u16 offset; /* It is very important that this is a u16 */ - u8 *DownCode = NULL; - unsigned long flags; - - HostP = NULL; /* Assure the compiler we've initialized it */ - - - /* Walk the hosts */ - for (host = 0; host < p->RIONumHosts; host++) { - rio_dprintk(RIO_DEBUG_BOOT, "Attempt to boot host %d\n", host); - HostP = &p->RIOHosts[host]; - - rio_dprintk(RIO_DEBUG_BOOT, "Host Type = 0x%x, Mode = 0x%x, IVec = 0x%x\n", HostP->Type, HostP->Mode, HostP->Ivec); - - /* Don't boot hosts already running */ - if ((HostP->Flags & RUN_STATE) != RC_WAITING) { - rio_dprintk(RIO_DEBUG_BOOT, "%s %d already running\n", "Host", host); - continue; - } - - /* - ** Grab a pointer to the card (ioremapped) - */ - Cad = HostP->Caddr; - - /* - ** We are going to (try) and load in rbp->Count bytes. - ** The last byte will reside at p->RIOConf.HostLoadBase-1; - ** Therefore, we need to start copying at address - ** (caddr+p->RIOConf.HostLoadBase-rbp->Count) - */ - StartP = &Cad[p->RIOConf.HostLoadBase - rbp->Count]; - - rio_dprintk(RIO_DEBUG_BOOT, "kernel virtual address for host is %p\n", Cad); - rio_dprintk(RIO_DEBUG_BOOT, "kernel virtual address for download is %p\n", StartP); - rio_dprintk(RIO_DEBUG_BOOT, "host loadbase is 0x%x\n", p->RIOConf.HostLoadBase); - rio_dprintk(RIO_DEBUG_BOOT, "size of download is 0x%x\n", rbp->Count); - - /* Make sure it fits */ - if (p->RIOConf.HostLoadBase < rbp->Count) { - rio_dprintk(RIO_DEBUG_BOOT, "Bin too large\n"); - p->RIOError.Error = HOST_FILE_TOO_LARGE; - func_exit(); - return -EFBIG; - } - /* - ** Ensure that the host really is stopped. - ** Disable it's external bus & twang its reset line. - */ - RIOHostReset(HostP->Type, HostP->CardP, HostP->Slot); - - /* - ** Copy the data directly from user space to the SRAM. - ** This ain't going to be none too clever if the download - ** code is bigger than this segment. - */ - rio_dprintk(RIO_DEBUG_BOOT, "Copy in code\n"); - - /* Buffer to local memory as we want to use I/O space and - some cards only do 8 or 16 bit I/O */ - - DownCode = vmalloc(rbp->Count); - if (!DownCode) { - p->RIOError.Error = NOT_ENOUGH_CORE_FOR_PCI_COPY; - func_exit(); - return -ENOMEM; - } - if (copy_from_user(DownCode, rbp->DataP, rbp->Count)) { - kfree(DownCode); - p->RIOError.Error = COPYIN_FAILED; - func_exit(); - return -EFAULT; - } - HostP->Copy(DownCode, StartP, rbp->Count); - vfree(DownCode); - - rio_dprintk(RIO_DEBUG_BOOT, "Copy completed\n"); - - /* - ** S T O P ! - ** - ** Up to this point the code has been fairly rational, and possibly - ** even straight forward. What follows is a pile of crud that will - ** magically turn into six bytes of transputer assembler. Normally - ** you would expect an array or something, but, being me, I have - ** chosen [been told] to use a technique whereby the startup code - ** will be correct if we change the loadbase for the code. Which - ** brings us onto another issue - the loadbase is the *end* of the - ** code, not the start. - ** - ** If I were you I wouldn't start from here. - */ - - /* - ** We now need to insert a short boot section into - ** the memory at the end of Sram2. This is normally (de)composed - ** of the last eight bytes of the download code. The - ** download has been assembled/compiled to expect to be - ** loaded from 0x7FFF downwards. We have loaded it - ** at some other address. The startup code goes into the small - ** ram window at Sram2, in the last 8 bytes, which are really - ** at addresses 0x7FF8-0x7FFF. - ** - ** If the loadbase is, say, 0x7C00, then we need to branch to - ** address 0x7BFE to run the host.bin startup code. We assemble - ** this jump manually. - ** - ** The two byte sequence 60 08 is loaded into memory at address - ** 0x7FFE,F. This is a local branch to location 0x7FF8 (60 is nfix 0, - ** which adds '0' to the .O register, complements .O, and then shifts - ** it left by 4 bit positions, 08 is a jump .O+8 instruction. This will - ** add 8 to .O (which was 0xFFF0), and will branch RELATIVE to the new - ** location. Now, the branch starts from the value of .PC (or .IP or - ** whatever the bloody register is called on this chip), and the .PC - ** will be pointing to the location AFTER the branch, in this case - ** .PC == 0x8000, so the branch will be to 0x8000+0xFFF8 = 0x7FF8. - ** - ** A long branch is coded at 0x7FF8. This consists of loading a four - ** byte offset into .O using nfix (as above) and pfix operators. The - ** pfix operates in exactly the same way as the nfix operator, but - ** without the complement operation. The offset, of course, must be - ** relative to the address of the byte AFTER the branch instruction, - ** which will be (urm) 0x7FFC, so, our final destination of the branch - ** (loadbase-2), has to be reached from here. Imagine that the loadbase - ** is 0x7C00 (which it is), then we will need to branch to 0x7BFE (which - ** is the first byte of the initial two byte short local branch of the - ** download code). - ** - ** To code a jump from 0x7FFC (which is where the branch will start - ** from) to 0x7BFE, we will need to branch 0xFC02 bytes (0x7FFC+0xFC02)= - ** 0x7BFE. - ** This will be coded as four bytes: - ** 60 2C 20 02 - ** being nfix .O+0 - ** pfix .O+C - ** pfix .O+0 - ** jump .O+2 - ** - ** The nfix operator is used, so that the startup code will be - ** compatible with the whole Tp family. (lies, damn lies, it'll never - ** work in a month of Sundays). - ** - ** The nfix nyble is the 1s complement of the nyble value you - ** want to load - in this case we wanted 'F' so we nfix loaded '0'. - */ - - - /* - ** Dest points to the top 8 bytes of Sram2. The Tp jumps - ** to 0x7FFE at reset time, and starts executing. This is - ** a short branch to 0x7FF8, where a long branch is coded. - */ - - DestP = &Cad[0x7FF8]; /* <<<---- READ THE ABOVE COMMENTS */ - -#define NFIX(N) (0x60 | (N)) /* .O = (~(.O + N))<<4 */ -#define PFIX(N) (0x20 | (N)) /* .O = (.O + N)<<4 */ -#define JUMP(N) (0x00 | (N)) /* .PC = .PC + .O */ - - /* - ** 0x7FFC is the address of the location following the last byte of - ** the four byte jump instruction. - ** READ THE ABOVE COMMENTS - ** - ** offset is (TO-FROM) % MEMSIZE, but with compound buggering about. - ** Memsize is 64K for this range of Tp, so offset is a short (unsigned, - ** cos I don't understand 2's complement). - */ - offset = (p->RIOConf.HostLoadBase - 2) - 0x7FFC; - - writeb(NFIX(((unsigned short) (~offset) >> (unsigned short) 12) & 0xF), DestP); - writeb(PFIX((offset >> 8) & 0xF), DestP + 1); - writeb(PFIX((offset >> 4) & 0xF), DestP + 2); - writeb(JUMP(offset & 0xF), DestP + 3); - - writeb(NFIX(0), DestP + 6); - writeb(JUMP(8), DestP + 7); - - rio_dprintk(RIO_DEBUG_BOOT, "host loadbase is 0x%x\n", p->RIOConf.HostLoadBase); - rio_dprintk(RIO_DEBUG_BOOT, "startup offset is 0x%x\n", offset); - - /* - ** Flag what is going on - */ - HostP->Flags &= ~RUN_STATE; - HostP->Flags |= RC_STARTUP; - - /* - ** Grab a copy of the current ParmMap pointer, so we - ** can tell when it has changed. - */ - OldParmMap = readw(&HostP->__ParmMapR); - - rio_dprintk(RIO_DEBUG_BOOT, "Original parmmap is 0x%x\n", OldParmMap); - - /* - ** And start it running (I hope). - ** As there is nothing dodgy or obscure about the - ** above code, this is guaranteed to work every time. - */ - rio_dprintk(RIO_DEBUG_BOOT, "Host Type = 0x%x, Mode = 0x%x, IVec = 0x%x\n", HostP->Type, HostP->Mode, HostP->Ivec); - - rio_start_card_running(HostP); - - rio_dprintk(RIO_DEBUG_BOOT, "Set control port\n"); - - /* - ** Now, wait for up to five seconds for the Tp to setup the parmmap - ** pointer: - */ - for (wait_count = 0; (wait_count < p->RIOConf.StartupTime) && (readw(&HostP->__ParmMapR) == OldParmMap); wait_count++) { - rio_dprintk(RIO_DEBUG_BOOT, "Checkout %d, 0x%x\n", wait_count, readw(&HostP->__ParmMapR)); - mdelay(100); - - } - - /* - ** If the parmmap pointer is unchanged, then the host code - ** has crashed & burned in a really spectacular way - */ - if (readw(&HostP->__ParmMapR) == OldParmMap) { - rio_dprintk(RIO_DEBUG_BOOT, "parmmap 0x%x\n", readw(&HostP->__ParmMapR)); - rio_dprintk(RIO_DEBUG_BOOT, "RIO Mesg Run Fail\n"); - HostP->Flags &= ~RUN_STATE; - HostP->Flags |= RC_STUFFED; - RIOHostReset( HostP->Type, HostP->CardP, HostP->Slot ); - continue; - } - - rio_dprintk(RIO_DEBUG_BOOT, "Running 0x%x\n", readw(&HostP->__ParmMapR)); - - /* - ** Well, the board thought it was OK, and setup its parmmap - ** pointer. For the time being, we will pretend that this - ** board is running, and check out what the error flag says. - */ - - /* - ** Grab a 32 bit pointer to the parmmap structure - */ - ParmMapP = (PARM_MAP __iomem *) RIO_PTR(Cad, readw(&HostP->__ParmMapR)); - rio_dprintk(RIO_DEBUG_BOOT, "ParmMapP : %p\n", ParmMapP); - ParmMapP = (PARM_MAP __iomem *)(Cad + readw(&HostP->__ParmMapR)); - rio_dprintk(RIO_DEBUG_BOOT, "ParmMapP : %p\n", ParmMapP); - - /* - ** The links entry should be 0xFFFF; we set it up - ** with a mask to say how many PHBs to use, and - ** which links to use. - */ - if (readw(&ParmMapP->links) != 0xFFFF) { - rio_dprintk(RIO_DEBUG_BOOT, "RIO Mesg Run Fail %s\n", HostP->Name); - rio_dprintk(RIO_DEBUG_BOOT, "Links = 0x%x\n", readw(&ParmMapP->links)); - HostP->Flags &= ~RUN_STATE; - HostP->Flags |= RC_STUFFED; - RIOHostReset( HostP->Type, HostP->CardP, HostP->Slot ); - continue; - } - - writew(RIO_LINK_ENABLE, &ParmMapP->links); - - /* - ** now wait for the card to set all the parmmap->XXX stuff - ** this is a wait of up to two seconds.... - */ - rio_dprintk(RIO_DEBUG_BOOT, "Looking for init_done - %d ticks\n", p->RIOConf.StartupTime); - HostP->timeout_id = 0; - for (wait_count = 0; (wait_count < p->RIOConf.StartupTime) && !readw(&ParmMapP->init_done); wait_count++) { - rio_dprintk(RIO_DEBUG_BOOT, "Waiting for init_done\n"); - mdelay(100); - } - rio_dprintk(RIO_DEBUG_BOOT, "OK! init_done!\n"); - - if (readw(&ParmMapP->error) != E_NO_ERROR || !readw(&ParmMapP->init_done)) { - rio_dprintk(RIO_DEBUG_BOOT, "RIO Mesg Run Fail %s\n", HostP->Name); - rio_dprintk(RIO_DEBUG_BOOT, "Timedout waiting for init_done\n"); - HostP->Flags &= ~RUN_STATE; - HostP->Flags |= RC_STUFFED; - RIOHostReset( HostP->Type, HostP->CardP, HostP->Slot ); - continue; - } - - rio_dprintk(RIO_DEBUG_BOOT, "Got init_done\n"); - - /* - ** It runs! It runs! - */ - rio_dprintk(RIO_DEBUG_BOOT, "Host ID %x Running\n", HostP->UniqueNum); - - /* - ** set the time period between interrupts. - */ - writew(p->RIOConf.Timer, &ParmMapP->timer); - - /* - ** Translate all the 16 bit pointers in the __ParmMapR into - ** 32 bit pointers for the driver in ioremap space. - */ - HostP->ParmMapP = ParmMapP; - HostP->PhbP = (struct PHB __iomem *) RIO_PTR(Cad, readw(&ParmMapP->phb_ptr)); - HostP->RupP = (struct RUP __iomem *) RIO_PTR(Cad, readw(&ParmMapP->rups)); - HostP->PhbNumP = (unsigned short __iomem *) RIO_PTR(Cad, readw(&ParmMapP->phb_num_ptr)); - HostP->LinkStrP = (struct LPB __iomem *) RIO_PTR(Cad, readw(&ParmMapP->link_str_ptr)); - - /* - ** point the UnixRups at the real Rups - */ - for (RupN = 0; RupN < MAX_RUP; RupN++) { - HostP->UnixRups[RupN].RupP = &HostP->RupP[RupN]; - HostP->UnixRups[RupN].Id = RupN + 1; - HostP->UnixRups[RupN].BaseSysPort = NO_PORT; - spin_lock_init(&HostP->UnixRups[RupN].RupLock); - } - - for (RupN = 0; RupN < LINKS_PER_UNIT; RupN++) { - HostP->UnixRups[RupN + MAX_RUP].RupP = &HostP->LinkStrP[RupN].rup; - HostP->UnixRups[RupN + MAX_RUP].Id = 0; - HostP->UnixRups[RupN + MAX_RUP].BaseSysPort = NO_PORT; - spin_lock_init(&HostP->UnixRups[RupN + MAX_RUP].RupLock); - } - - /* - ** point the PortP->Phbs at the real Phbs - */ - for (PortN = p->RIOFirstPortsMapped; PortN < p->RIOLastPortsMapped + PORTS_PER_RTA; PortN++) { - if (p->RIOPortp[PortN]->HostP == HostP) { - struct Port *PortP = p->RIOPortp[PortN]; - struct PHB __iomem *PhbP; - /* int oldspl; */ - - if (!PortP->Mapped) - continue; - - PhbP = &HostP->PhbP[PortP->HostPort]; - rio_spin_lock_irqsave(&PortP->portSem, flags); - - PortP->PhbP = PhbP; - - PortP->TxAdd = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->tx_add)); - PortP->TxStart = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->tx_start)); - PortP->TxEnd = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->tx_end)); - PortP->RxRemove = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->rx_remove)); - PortP->RxStart = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->rx_start)); - PortP->RxEnd = (u16 __iomem *) RIO_PTR(Cad, readw(&PhbP->rx_end)); - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - /* - ** point the UnixRup at the base SysPort - */ - if (!(PortN % PORTS_PER_RTA)) - HostP->UnixRups[PortP->RupNum].BaseSysPort = PortN; - } - } - - rio_dprintk(RIO_DEBUG_BOOT, "Set the card running... \n"); - /* - ** last thing - show the world that everything is in place - */ - HostP->Flags &= ~RUN_STATE; - HostP->Flags |= RC_RUNNING; - } - /* - ** MPX always uses a poller. This is actually patched into the system - ** configuration and called directly from each clock tick. - ** - */ - p->RIOPolling = 1; - - p->RIOSystemUp++; - - rio_dprintk(RIO_DEBUG_BOOT, "Done everything %x\n", HostP->Ivec); - func_exit(); - return 0; -} - - - -/** - * RIOBootRup - Boot an RTA - * @p: rio we are working with - * @Rup: Rup number - * @HostP: host object - * @PacketP: packet to use - * - * If we have successfully processed this boot, then - * return 1. If we havent, then return 0. - */ - -int RIOBootRup(struct rio_info *p, unsigned int Rup, struct Host *HostP, struct PKT __iomem *PacketP) -{ - struct PktCmd __iomem *PktCmdP = (struct PktCmd __iomem *) PacketP->data; - struct PktCmd_M *PktReplyP; - struct CmdBlk *CmdBlkP; - unsigned int sequence; - - /* - ** If we haven't been told what to boot, we can't boot it. - */ - if (p->RIONumBootPkts == 0) { - rio_dprintk(RIO_DEBUG_BOOT, "No RTA code to download yet\n"); - return 0; - } - - /* - ** Special case of boot completed - if we get one of these then we - ** don't need a command block. For all other cases we do, so handle - ** this first and then get a command block, then handle every other - ** case, relinquishing the command block if disaster strikes! - */ - if ((readb(&PacketP->len) & PKT_CMD_BIT) && (readb(&PktCmdP->Command) == BOOT_COMPLETED)) - return RIOBootComplete(p, HostP, Rup, PktCmdP); - - /* - ** Try to allocate a command block. This is in kernel space - */ - if (!(CmdBlkP = RIOGetCmdBlk())) { - rio_dprintk(RIO_DEBUG_BOOT, "No command blocks to boot RTA! come back later.\n"); - return 0; - } - - /* - ** Fill in the default info on the command block - */ - CmdBlkP->Packet.dest_unit = Rup < (unsigned short) MAX_RUP ? Rup : 0; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.src_port = BOOT_RUP; - - CmdBlkP->PreFuncP = CmdBlkP->PostFuncP = NULL; - PktReplyP = (struct PktCmd_M *) CmdBlkP->Packet.data; - - /* - ** process COMMANDS on the boot rup! - */ - if (readb(&PacketP->len) & PKT_CMD_BIT) { - /* - ** We only expect one type of command - a BOOT_REQUEST! - */ - if (readb(&PktCmdP->Command) != BOOT_REQUEST) { - rio_dprintk(RIO_DEBUG_BOOT, "Unexpected command %d on BOOT RUP %d of host %Zd\n", readb(&PktCmdP->Command), Rup, HostP - p->RIOHosts); - RIOFreeCmdBlk(CmdBlkP); - return 1; - } - - /* - ** Build a Boot Sequence command block - ** - ** We no longer need to use "Boot Mode", we'll always allow - ** boot requests - the boot will not complete if the device - ** appears in the bindings table. - ** - ** We'll just (always) set the command field in packet reply - ** to allow an attempted boot sequence : - */ - PktReplyP->Command = BOOT_SEQUENCE; - - PktReplyP->BootSequence.NumPackets = p->RIONumBootPkts; - PktReplyP->BootSequence.LoadBase = p->RIOConf.RtaLoadBase; - PktReplyP->BootSequence.CodeSize = p->RIOBootCount; - - CmdBlkP->Packet.len = BOOT_SEQUENCE_LEN | PKT_CMD_BIT; - - memcpy((void *) &CmdBlkP->Packet.data[BOOT_SEQUENCE_LEN], "BOOT", 4); - - rio_dprintk(RIO_DEBUG_BOOT, "Boot RTA on Host %Zd Rup %d - %d (0x%x) packets to 0x%x\n", HostP - p->RIOHosts, Rup, p->RIONumBootPkts, p->RIONumBootPkts, p->RIOConf.RtaLoadBase); - - /* - ** If this host is in slave mode, send the RTA an invalid boot - ** sequence command block to force it to kill the boot. We wait - ** for half a second before sending this packet to prevent the RTA - ** attempting to boot too often. The master host should then grab - ** the RTA and make it its own. - */ - p->RIOBooting++; - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - return 1; - } - - /* - ** It is a request for boot data. - */ - sequence = readw(&PktCmdP->Sequence); - - rio_dprintk(RIO_DEBUG_BOOT, "Boot block %d on Host %Zd Rup%d\n", sequence, HostP - p->RIOHosts, Rup); - - if (sequence >= p->RIONumBootPkts) { - rio_dprintk(RIO_DEBUG_BOOT, "Got a request for packet %d, max is %d\n", sequence, p->RIONumBootPkts); - } - - PktReplyP->Sequence = sequence; - memcpy(PktReplyP->BootData, p->RIOBootPackets[p->RIONumBootPkts - sequence - 1], RTA_BOOT_DATA_SIZE); - CmdBlkP->Packet.len = PKT_MAX_DATA_LEN; - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - return 1; -} - -/** - * RIOBootComplete - RTA boot is done - * @p: RIO we are working with - * @HostP: Host structure - * @Rup: RUP being used - * @PktCmdP: Packet command that was used - * - * This function is called when an RTA been booted. - * If booted by a host, HostP->HostUniqueNum is the booting host. - * If booted by an RTA, HostP->Mapping[Rup].RtaUniqueNum is the booting RTA. - * RtaUniq is the booted RTA. - */ - -static int RIOBootComplete(struct rio_info *p, struct Host *HostP, unsigned int Rup, struct PktCmd __iomem *PktCmdP) -{ - struct Map *MapP = NULL; - struct Map *MapP2 = NULL; - int Flag; - int found; - int host, rta; - int EmptySlot = -1; - int entry, entry2; - char *MyType, *MyName; - unsigned int MyLink; - unsigned short RtaType; - u32 RtaUniq = (readb(&PktCmdP->UniqNum[0])) + (readb(&PktCmdP->UniqNum[1]) << 8) + (readb(&PktCmdP->UniqNum[2]) << 16) + (readb(&PktCmdP->UniqNum[3]) << 24); - - p->RIOBooting = 0; - - rio_dprintk(RIO_DEBUG_BOOT, "RTA Boot completed - BootInProgress now %d\n", p->RIOBooting); - - /* - ** Determine type of unit (16/8 port RTA). - */ - - RtaType = GetUnitType(RtaUniq); - if (Rup >= (unsigned short) MAX_RUP) - rio_dprintk(RIO_DEBUG_BOOT, "RIO: Host %s has booted an RTA(%d) on link %c\n", HostP->Name, 8 * RtaType, readb(&PktCmdP->LinkNum) + 'A'); - else - rio_dprintk(RIO_DEBUG_BOOT, "RIO: RTA %s has booted an RTA(%d) on link %c\n", HostP->Mapping[Rup].Name, 8 * RtaType, readb(&PktCmdP->LinkNum) + 'A'); - - rio_dprintk(RIO_DEBUG_BOOT, "UniqNum is 0x%x\n", RtaUniq); - - if (RtaUniq == 0x00000000 || RtaUniq == 0xffffffff) { - rio_dprintk(RIO_DEBUG_BOOT, "Illegal RTA Uniq Number\n"); - return 1; - } - - /* - ** If this RTA has just booted an RTA which doesn't belong to this - ** system, or the system is in slave mode, do not attempt to create - ** a new table entry for it. - */ - - if (!RIOBootOk(p, HostP, RtaUniq)) { - MyLink = readb(&PktCmdP->LinkNum); - if (Rup < (unsigned short) MAX_RUP) { - /* - ** RtaUniq was clone booted (by this RTA). Instruct this RTA - ** to hold off further attempts to boot on this link for 30 - ** seconds. - */ - if (RIOSuspendBootRta(HostP, HostP->Mapping[Rup].ID, MyLink)) { - rio_dprintk(RIO_DEBUG_BOOT, "RTA failed to suspend booting on link %c\n", 'A' + MyLink); - } - } else - /* - ** RtaUniq was booted by this host. Set the booting link - ** to hold off for 30 seconds to give another unit a - ** chance to boot it. - */ - writew(30, &HostP->LinkStrP[MyLink].WaitNoBoot); - rio_dprintk(RIO_DEBUG_BOOT, "RTA %x not owned - suspend booting down link %c on unit %x\n", RtaUniq, 'A' + MyLink, HostP->Mapping[Rup].RtaUniqueNum); - return 1; - } - - /* - ** Check for a SLOT_IN_USE entry for this RTA attached to the - ** current host card in the driver table. - ** - ** If it exists, make a note that we have booted it. Other parts of - ** the driver are interested in this information at a later date, - ** in particular when the booting RTA asks for an ID for this unit, - ** we must have set the BOOTED flag, and the NEWBOOT flag is used - ** to force an open on any ports that where previously open on this - ** unit. - */ - for (entry = 0; entry < MAX_RUP; entry++) { - unsigned int sysport; - - if ((HostP->Mapping[entry].Flags & SLOT_IN_USE) && (HostP->Mapping[entry].RtaUniqueNum == RtaUniq)) { - HostP->Mapping[entry].Flags |= RTA_BOOTED | RTA_NEWBOOT; - if ((sysport = HostP->Mapping[entry].SysPort) != NO_PORT) { - if (sysport < p->RIOFirstPortsBooted) - p->RIOFirstPortsBooted = sysport; - if (sysport > p->RIOLastPortsBooted) - p->RIOLastPortsBooted = sysport; - /* - ** For a 16 port RTA, check the second bank of 8 ports - */ - if (RtaType == TYPE_RTA16) { - entry2 = HostP->Mapping[entry].ID2 - 1; - HostP->Mapping[entry2].Flags |= RTA_BOOTED | RTA_NEWBOOT; - sysport = HostP->Mapping[entry2].SysPort; - if (sysport < p->RIOFirstPortsBooted) - p->RIOFirstPortsBooted = sysport; - if (sysport > p->RIOLastPortsBooted) - p->RIOLastPortsBooted = sysport; - } - } - if (RtaType == TYPE_RTA16) - rio_dprintk(RIO_DEBUG_BOOT, "RTA will be given IDs %d+%d\n", entry + 1, entry2 + 1); - else - rio_dprintk(RIO_DEBUG_BOOT, "RTA will be given ID %d\n", entry + 1); - return 1; - } - } - - rio_dprintk(RIO_DEBUG_BOOT, "RTA not configured for this host\n"); - - if (Rup >= (unsigned short) MAX_RUP) { - /* - ** It was a host that did the booting - */ - MyType = "Host"; - MyName = HostP->Name; - } else { - /* - ** It was an RTA that did the booting - */ - MyType = "RTA"; - MyName = HostP->Mapping[Rup].Name; - } - MyLink = readb(&PktCmdP->LinkNum); - - /* - ** There is no SLOT_IN_USE entry for this RTA attached to the current - ** host card in the driver table. - ** - ** Check for a SLOT_TENTATIVE entry for this RTA attached to the - ** current host card in the driver table. - ** - ** If we find one, then we re-use that slot. - */ - for (entry = 0; entry < MAX_RUP; entry++) { - if ((HostP->Mapping[entry].Flags & SLOT_TENTATIVE) && (HostP->Mapping[entry].RtaUniqueNum == RtaUniq)) { - if (RtaType == TYPE_RTA16) { - entry2 = HostP->Mapping[entry].ID2 - 1; - if ((HostP->Mapping[entry2].Flags & SLOT_TENTATIVE) && (HostP->Mapping[entry2].RtaUniqueNum == RtaUniq)) - rio_dprintk(RIO_DEBUG_BOOT, "Found previous tentative slots (%d+%d)\n", entry, entry2); - else - continue; - } else - rio_dprintk(RIO_DEBUG_BOOT, "Found previous tentative slot (%d)\n", entry); - if (!p->RIONoMessage) - printk("RTA connected to %s '%s' (%c) not configured.\n", MyType, MyName, MyLink + 'A'); - return 1; - } - } - - /* - ** There is no SLOT_IN_USE or SLOT_TENTATIVE entry for this RTA - ** attached to the current host card in the driver table. - ** - ** Check if there is a SLOT_IN_USE or SLOT_TENTATIVE entry on another - ** host for this RTA in the driver table. - ** - ** For a SLOT_IN_USE entry on another host, we need to delete the RTA - ** entry from the other host and add it to this host (using some of - ** the functions from table.c which do this). - ** For a SLOT_TENTATIVE entry on another host, we must cope with the - ** following scenario: - ** - ** + Plug 8 port RTA into host A. (This creates SLOT_TENTATIVE entry - ** in table) - ** + Unplug RTA and plug into host B. (We now have 2 SLOT_TENTATIVE - ** entries) - ** + Configure RTA on host B. (This slot now becomes SLOT_IN_USE) - ** + Unplug RTA and plug back into host A. - ** + Configure RTA on host A. We now have the same RTA configured - ** with different ports on two different hosts. - */ - rio_dprintk(RIO_DEBUG_BOOT, "Have we seen RTA %x before?\n", RtaUniq); - found = 0; - Flag = 0; /* Convince the compiler this variable is initialized */ - for (host = 0; !found && (host < p->RIONumHosts); host++) { - for (rta = 0; rta < MAX_RUP; rta++) { - if ((p->RIOHosts[host].Mapping[rta].Flags & (SLOT_IN_USE | SLOT_TENTATIVE)) && (p->RIOHosts[host].Mapping[rta].RtaUniqueNum == RtaUniq)) { - Flag = p->RIOHosts[host].Mapping[rta].Flags; - MapP = &p->RIOHosts[host].Mapping[rta]; - if (RtaType == TYPE_RTA16) { - MapP2 = &p->RIOHosts[host].Mapping[MapP->ID2 - 1]; - rio_dprintk(RIO_DEBUG_BOOT, "This RTA is units %d+%d from host %s\n", rta + 1, MapP->ID2, p->RIOHosts[host].Name); - } else - rio_dprintk(RIO_DEBUG_BOOT, "This RTA is unit %d from host %s\n", rta + 1, p->RIOHosts[host].Name); - found = 1; - break; - } - } - } - - /* - ** There is no SLOT_IN_USE or SLOT_TENTATIVE entry for this RTA - ** attached to the current host card in the driver table. - ** - ** If we have not found a SLOT_IN_USE or SLOT_TENTATIVE entry on - ** another host for this RTA in the driver table... - ** - ** Check for a SLOT_IN_USE entry for this RTA in the config table. - */ - if (!MapP) { - rio_dprintk(RIO_DEBUG_BOOT, "Look for RTA %x in RIOSavedTable\n", RtaUniq); - for (rta = 0; rta < TOTAL_MAP_ENTRIES; rta++) { - rio_dprintk(RIO_DEBUG_BOOT, "Check table entry %d (%x)", rta, p->RIOSavedTable[rta].RtaUniqueNum); - - if ((p->RIOSavedTable[rta].Flags & SLOT_IN_USE) && (p->RIOSavedTable[rta].RtaUniqueNum == RtaUniq)) { - MapP = &p->RIOSavedTable[rta]; - Flag = p->RIOSavedTable[rta].Flags; - if (RtaType == TYPE_RTA16) { - for (entry2 = rta + 1; entry2 < TOTAL_MAP_ENTRIES; entry2++) { - if (p->RIOSavedTable[entry2].RtaUniqueNum == RtaUniq) - break; - } - MapP2 = &p->RIOSavedTable[entry2]; - rio_dprintk(RIO_DEBUG_BOOT, "This RTA is from table entries %d+%d\n", rta, entry2); - } else - rio_dprintk(RIO_DEBUG_BOOT, "This RTA is from table entry %d\n", rta); - break; - } - } - } - - /* - ** There is no SLOT_IN_USE or SLOT_TENTATIVE entry for this RTA - ** attached to the current host card in the driver table. - ** - ** We may have found a SLOT_IN_USE entry on another host for this - ** RTA in the config table, or a SLOT_IN_USE or SLOT_TENTATIVE entry - ** on another host for this RTA in the driver table. - ** - ** Check the driver table for room to fit this newly discovered RTA. - ** RIOFindFreeID() first looks for free slots and if it does not - ** find any free slots it will then attempt to oust any - ** tentative entry in the table. - */ - EmptySlot = 1; - if (RtaType == TYPE_RTA16) { - if (RIOFindFreeID(p, HostP, &entry, &entry2) == 0) { - RIODefaultName(p, HostP, entry); - rio_fill_host_slot(entry, entry2, RtaUniq, HostP); - EmptySlot = 0; - } - } else { - if (RIOFindFreeID(p, HostP, &entry, NULL) == 0) { - RIODefaultName(p, HostP, entry); - rio_fill_host_slot(entry, 0, RtaUniq, HostP); - EmptySlot = 0; - } - } - - /* - ** There is no SLOT_IN_USE or SLOT_TENTATIVE entry for this RTA - ** attached to the current host card in the driver table. - ** - ** If we found a SLOT_IN_USE entry on another host for this - ** RTA in the config or driver table, and there are enough free - ** slots in the driver table, then we need to move it over and - ** delete it from the other host. - ** If we found a SLOT_TENTATIVE entry on another host for this - ** RTA in the driver table, just delete the other host entry. - */ - if (EmptySlot == 0) { - if (MapP) { - if (Flag & SLOT_IN_USE) { - rio_dprintk(RIO_DEBUG_BOOT, "This RTA configured on another host - move entry to current host (1)\n"); - HostP->Mapping[entry].SysPort = MapP->SysPort; - memcpy(HostP->Mapping[entry].Name, MapP->Name, MAX_NAME_LEN); - HostP->Mapping[entry].Flags = SLOT_IN_USE | RTA_BOOTED | RTA_NEWBOOT; - RIOReMapPorts(p, HostP, &HostP->Mapping[entry]); - if (HostP->Mapping[entry].SysPort < p->RIOFirstPortsBooted) - p->RIOFirstPortsBooted = HostP->Mapping[entry].SysPort; - if (HostP->Mapping[entry].SysPort > p->RIOLastPortsBooted) - p->RIOLastPortsBooted = HostP->Mapping[entry].SysPort; - rio_dprintk(RIO_DEBUG_BOOT, "SysPort %d, Name %s\n", (int) MapP->SysPort, MapP->Name); - } else { - rio_dprintk(RIO_DEBUG_BOOT, "This RTA has a tentative entry on another host - delete that entry (1)\n"); - HostP->Mapping[entry].Flags = SLOT_TENTATIVE | RTA_BOOTED | RTA_NEWBOOT; - } - if (RtaType == TYPE_RTA16) { - if (Flag & SLOT_IN_USE) { - HostP->Mapping[entry2].Flags = SLOT_IN_USE | RTA_BOOTED | RTA_NEWBOOT | RTA16_SECOND_SLOT; - HostP->Mapping[entry2].SysPort = MapP2->SysPort; - /* - ** Map second block of ttys for 16 port RTA - */ - RIOReMapPorts(p, HostP, &HostP->Mapping[entry2]); - if (HostP->Mapping[entry2].SysPort < p->RIOFirstPortsBooted) - p->RIOFirstPortsBooted = HostP->Mapping[entry2].SysPort; - if (HostP->Mapping[entry2].SysPort > p->RIOLastPortsBooted) - p->RIOLastPortsBooted = HostP->Mapping[entry2].SysPort; - rio_dprintk(RIO_DEBUG_BOOT, "SysPort %d, Name %s\n", (int) HostP->Mapping[entry2].SysPort, HostP->Mapping[entry].Name); - } else - HostP->Mapping[entry2].Flags = SLOT_TENTATIVE | RTA_BOOTED | RTA_NEWBOOT | RTA16_SECOND_SLOT; - memset(MapP2, 0, sizeof(struct Map)); - } - memset(MapP, 0, sizeof(struct Map)); - if (!p->RIONoMessage) - printk("An orphaned RTA has been adopted by %s '%s' (%c).\n", MyType, MyName, MyLink + 'A'); - } else if (!p->RIONoMessage) - printk("RTA connected to %s '%s' (%c) not configured.\n", MyType, MyName, MyLink + 'A'); - RIOSetChange(p); - return 1; - } - - /* - ** There is no room in the driver table to make an entry for the - ** booted RTA. Keep a note of its Uniq Num in the overflow table, - ** so we can ignore it's ID requests. - */ - if (!p->RIONoMessage) - printk("The RTA connected to %s '%s' (%c) cannot be configured. You cannot configure more than 128 ports to one host card.\n", MyType, MyName, MyLink + 'A'); - for (entry = 0; entry < HostP->NumExtraBooted; entry++) { - if (HostP->ExtraUnits[entry] == RtaUniq) { - /* - ** already got it! - */ - return 1; - } - } - /* - ** If there is room, add the unit to the list of extras - */ - if (HostP->NumExtraBooted < MAX_EXTRA_UNITS) - HostP->ExtraUnits[HostP->NumExtraBooted++] = RtaUniq; - return 1; -} - - -/* -** If the RTA or its host appears in the RIOBindTab[] structure then -** we mustn't boot the RTA and should return 0. -** This operation is slightly different from the other drivers for RIO -** in that this is designed to work with the new utilities -** not config.rio and is FAR SIMPLER. -** We no longer support the RIOBootMode variable. It is all done from the -** "boot/noboot" field in the rio.cf file. -*/ -int RIOBootOk(struct rio_info *p, struct Host *HostP, unsigned long RtaUniq) -{ - int Entry; - unsigned int HostUniq = HostP->UniqueNum; - - /* - ** Search bindings table for RTA or its parent. - ** If it exists, return 0, else 1. - */ - for (Entry = 0; (Entry < MAX_RTA_BINDINGS) && (p->RIOBindTab[Entry] != 0); Entry++) { - if ((p->RIOBindTab[Entry] == HostUniq) || (p->RIOBindTab[Entry] == RtaUniq)) - return 0; - } - return 1; -} - -/* -** Make an empty slot tentative. If this is a 16 port RTA, make both -** slots tentative, and the second one RTA_SECOND_SLOT as well. -*/ - -void rio_fill_host_slot(int entry, int entry2, unsigned int rta_uniq, struct Host *host) -{ - int link; - - rio_dprintk(RIO_DEBUG_BOOT, "rio_fill_host_slot(%d, %d, 0x%x...)\n", entry, entry2, rta_uniq); - - host->Mapping[entry].Flags = (RTA_BOOTED | RTA_NEWBOOT | SLOT_TENTATIVE); - host->Mapping[entry].SysPort = NO_PORT; - host->Mapping[entry].RtaUniqueNum = rta_uniq; - host->Mapping[entry].HostUniqueNum = host->UniqueNum; - host->Mapping[entry].ID = entry + 1; - host->Mapping[entry].ID2 = 0; - if (entry2) { - host->Mapping[entry2].Flags = (RTA_BOOTED | RTA_NEWBOOT | SLOT_TENTATIVE | RTA16_SECOND_SLOT); - host->Mapping[entry2].SysPort = NO_PORT; - host->Mapping[entry2].RtaUniqueNum = rta_uniq; - host->Mapping[entry2].HostUniqueNum = host->UniqueNum; - host->Mapping[entry2].Name[0] = '\0'; - host->Mapping[entry2].ID = entry2 + 1; - host->Mapping[entry2].ID2 = entry + 1; - host->Mapping[entry].ID2 = entry2 + 1; - } - /* - ** Must set these up, so that utilities show - ** topology of 16 port RTAs correctly - */ - for (link = 0; link < LINKS_PER_UNIT; link++) { - host->Mapping[entry].Topology[link].Unit = ROUTE_DISCONNECT; - host->Mapping[entry].Topology[link].Link = NO_LINK; - if (entry2) { - host->Mapping[entry2].Topology[link].Unit = ROUTE_DISCONNECT; - host->Mapping[entry2].Topology[link].Link = NO_LINK; - } - } -} diff --git a/drivers/staging/generic_serial/rio/riocmd.c b/drivers/staging/generic_serial/rio/riocmd.c deleted file mode 100644 index 61efd53..0000000 --- a/drivers/staging/generic_serial/rio/riocmd.c +++ /dev/null @@ -1,939 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** ported from the existing SCO driver source -** - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riocmd.c -** SID : 1.2 -** Last Modified : 11/6/98 10:33:41 -** Retrieved : 11/6/98 10:33:49 -** -** ident @(#)riocmd.c 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" - - -static struct IdentifyRta IdRta; -static struct KillNeighbour KillUnit; - -int RIOFoadRta(struct Host *HostP, struct Map *MapP) -{ - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CMD, "FOAD RTA\n"); - - CmdBlkP = RIOGetCmdBlk(); - - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CMD, "FOAD RTA: GetCmdBlk failed\n"); - return -ENXIO; - } - - CmdBlkP->Packet.dest_unit = MapP->ID; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.src_port = BOOT_RUP; - CmdBlkP->Packet.len = 0x84; - CmdBlkP->Packet.data[0] = IFOAD; - CmdBlkP->Packet.data[1] = 0; - CmdBlkP->Packet.data[2] = IFOAD_MAGIC & 0xFF; - CmdBlkP->Packet.data[3] = (IFOAD_MAGIC >> 8) & 0xFF; - - if (RIOQueueCmdBlk(HostP, MapP->ID - 1, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "FOAD RTA: Failed to queue foad command\n"); - return -EIO; - } - return 0; -} - -int RIOZombieRta(struct Host *HostP, struct Map *MapP) -{ - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CMD, "ZOMBIE RTA\n"); - - CmdBlkP = RIOGetCmdBlk(); - - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CMD, "ZOMBIE RTA: GetCmdBlk failed\n"); - return -ENXIO; - } - - CmdBlkP->Packet.dest_unit = MapP->ID; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.src_port = BOOT_RUP; - CmdBlkP->Packet.len = 0x84; - CmdBlkP->Packet.data[0] = ZOMBIE; - CmdBlkP->Packet.data[1] = 0; - CmdBlkP->Packet.data[2] = ZOMBIE_MAGIC & 0xFF; - CmdBlkP->Packet.data[3] = (ZOMBIE_MAGIC >> 8) & 0xFF; - - if (RIOQueueCmdBlk(HostP, MapP->ID - 1, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "ZOMBIE RTA: Failed to queue zombie command\n"); - return -EIO; - } - return 0; -} - -int RIOCommandRta(struct rio_info *p, unsigned long RtaUnique, int (*func) (struct Host * HostP, struct Map * MapP)) -{ - unsigned int Host; - - rio_dprintk(RIO_DEBUG_CMD, "Command RTA 0x%lx func %p\n", RtaUnique, func); - - if (!RtaUnique) - return (0); - - for (Host = 0; Host < p->RIONumHosts; Host++) { - unsigned int Rta; - struct Host *HostP = &p->RIOHosts[Host]; - - for (Rta = 0; Rta < RTAS_PER_HOST; Rta++) { - struct Map *MapP = &HostP->Mapping[Rta]; - - if (MapP->RtaUniqueNum == RtaUnique) { - uint Link; - - /* - ** now, lets just check we have a route to it... - ** IF the routing stuff is working, then one of the - ** topology entries for this unit will have a legit - ** route *somewhere*. We care not where - if its got - ** any connections, we can get to it. - */ - for (Link = 0; Link < LINKS_PER_UNIT; Link++) { - if (MapP->Topology[Link].Unit <= (u8) MAX_RUP) { - /* - ** Its worth trying the operation... - */ - return (*func) (HostP, MapP); - } - } - } - } - } - return -ENXIO; -} - - -int RIOIdentifyRta(struct rio_info *p, void __user * arg) -{ - unsigned int Host; - - if (copy_from_user(&IdRta, arg, sizeof(IdRta))) { - rio_dprintk(RIO_DEBUG_CMD, "RIO_IDENTIFY_RTA copy failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - - for (Host = 0; Host < p->RIONumHosts; Host++) { - unsigned int Rta; - struct Host *HostP = &p->RIOHosts[Host]; - - for (Rta = 0; Rta < RTAS_PER_HOST; Rta++) { - struct Map *MapP = &HostP->Mapping[Rta]; - - if (MapP->RtaUniqueNum == IdRta.RtaUnique) { - uint Link; - /* - ** now, lets just check we have a route to it... - ** IF the routing stuff is working, then one of the - ** topology entries for this unit will have a legit - ** route *somewhere*. We care not where - if its got - ** any connections, we can get to it. - */ - for (Link = 0; Link < LINKS_PER_UNIT; Link++) { - if (MapP->Topology[Link].Unit <= (u8) MAX_RUP) { - /* - ** Its worth trying the operation... - */ - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CMD, "IDENTIFY RTA\n"); - - CmdBlkP = RIOGetCmdBlk(); - - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CMD, "IDENTIFY RTA: GetCmdBlk failed\n"); - return -ENXIO; - } - - CmdBlkP->Packet.dest_unit = MapP->ID; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.src_port = BOOT_RUP; - CmdBlkP->Packet.len = 0x84; - CmdBlkP->Packet.data[0] = IDENTIFY; - CmdBlkP->Packet.data[1] = 0; - CmdBlkP->Packet.data[2] = IdRta.ID; - - if (RIOQueueCmdBlk(HostP, MapP->ID - 1, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "IDENTIFY RTA: Failed to queue command\n"); - return -EIO; - } - return 0; - } - } - } - } - } - return -ENOENT; -} - - -int RIOKillNeighbour(struct rio_info *p, void __user * arg) -{ - uint Host; - uint ID; - struct Host *HostP; - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CMD, "KILL HOST NEIGHBOUR\n"); - - if (copy_from_user(&KillUnit, arg, sizeof(KillUnit))) { - rio_dprintk(RIO_DEBUG_CMD, "RIO_KILL_NEIGHBOUR copy failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - - if (KillUnit.Link > 3) - return -ENXIO; - - CmdBlkP = RIOGetCmdBlk(); - - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CMD, "UFOAD: GetCmdBlk failed\n"); - return -ENXIO; - } - - CmdBlkP->Packet.dest_unit = 0; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_port = BOOT_RUP; - CmdBlkP->Packet.len = 0x84; - CmdBlkP->Packet.data[0] = UFOAD; - CmdBlkP->Packet.data[1] = KillUnit.Link; - CmdBlkP->Packet.data[2] = UFOAD_MAGIC & 0xFF; - CmdBlkP->Packet.data[3] = (UFOAD_MAGIC >> 8) & 0xFF; - - for (Host = 0; Host < p->RIONumHosts; Host++) { - ID = 0; - HostP = &p->RIOHosts[Host]; - - if (HostP->UniqueNum == KillUnit.UniqueNum) { - if (RIOQueueCmdBlk(HostP, RTAS_PER_HOST + KillUnit.Link, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "UFOAD: Failed queue command\n"); - return -EIO; - } - return 0; - } - - for (ID = 0; ID < RTAS_PER_HOST; ID++) { - if (HostP->Mapping[ID].RtaUniqueNum == KillUnit.UniqueNum) { - CmdBlkP->Packet.dest_unit = ID + 1; - if (RIOQueueCmdBlk(HostP, ID, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "UFOAD: Failed queue command\n"); - return -EIO; - } - return 0; - } - } - } - RIOFreeCmdBlk(CmdBlkP); - return -ENXIO; -} - -int RIOSuspendBootRta(struct Host *HostP, int ID, int Link) -{ - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CMD, "SUSPEND BOOT ON RTA ID %d, link %c\n", ID, 'A' + Link); - - CmdBlkP = RIOGetCmdBlk(); - - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CMD, "SUSPEND BOOT ON RTA: GetCmdBlk failed\n"); - return -ENXIO; - } - - CmdBlkP->Packet.dest_unit = ID; - CmdBlkP->Packet.dest_port = BOOT_RUP; - CmdBlkP->Packet.src_unit = 0; - CmdBlkP->Packet.src_port = BOOT_RUP; - CmdBlkP->Packet.len = 0x84; - CmdBlkP->Packet.data[0] = IWAIT; - CmdBlkP->Packet.data[1] = Link; - CmdBlkP->Packet.data[2] = IWAIT_MAGIC & 0xFF; - CmdBlkP->Packet.data[3] = (IWAIT_MAGIC >> 8) & 0xFF; - - if (RIOQueueCmdBlk(HostP, ID - 1, CmdBlkP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CMD, "SUSPEND BOOT ON RTA: Failed to queue iwait command\n"); - return -EIO; - } - return 0; -} - -int RIOFoadWakeup(struct rio_info *p) -{ - int port; - struct Port *PortP; - unsigned long flags; - - for (port = 0; port < RIO_PORTS; port++) { - PortP = p->RIOPortp[port]; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->Config = 0; - PortP->State = 0; - PortP->InUse = NOT_INUSE; - PortP->PortState = 0; - PortP->FlushCmdBodge = 0; - PortP->ModemLines = 0; - PortP->ModemState = 0; - PortP->CookMode = 0; - PortP->ParamSem = 0; - PortP->Mapped = 0; - PortP->WflushFlag = 0; - PortP->MagicFlags = 0; - PortP->RxDataStart = 0; - PortP->TxBufferIn = 0; - PortP->TxBufferOut = 0; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - return (0); -} - -/* -** Incoming command on the COMMAND_RUP to be processed. -*/ -static int RIOCommandRup(struct rio_info *p, uint Rup, struct Host *HostP, struct PKT __iomem *PacketP) -{ - struct PktCmd __iomem *PktCmdP = (struct PktCmd __iomem *)PacketP->data; - struct Port *PortP; - struct UnixRup *UnixRupP; - unsigned short SysPort; - unsigned short ReportedModemStatus; - unsigned short rup; - unsigned short subCommand; - unsigned long flags; - - func_enter(); - - /* - ** 16 port RTA note: - ** Command rup packets coming from the RTA will have pkt->data[1] (which - ** translates to PktCmdP->PhbNum) set to the host port number for the - ** particular unit. To access the correct BaseSysPort for a 16 port RTA, - ** we can use PhbNum to get the rup number for the appropriate 8 port - ** block (for the first block, this should be equal to 'Rup'). - */ - rup = readb(&PktCmdP->PhbNum) / (unsigned short) PORTS_PER_RTA; - UnixRupP = &HostP->UnixRups[rup]; - SysPort = UnixRupP->BaseSysPort + (readb(&PktCmdP->PhbNum) % (unsigned short) PORTS_PER_RTA); - rio_dprintk(RIO_DEBUG_CMD, "Command on rup %d, port %d\n", rup, SysPort); - - if (UnixRupP->BaseSysPort == NO_PORT) { - rio_dprintk(RIO_DEBUG_CMD, "OBSCURE ERROR!\n"); - rio_dprintk(RIO_DEBUG_CMD, "Diagnostics follow. Please WRITE THESE DOWN and report them to Specialix Technical Support\n"); - rio_dprintk(RIO_DEBUG_CMD, "CONTROL information: Host number %Zd, name ``%s''\n", HostP - p->RIOHosts, HostP->Name); - rio_dprintk(RIO_DEBUG_CMD, "CONTROL information: Rup number 0x%x\n", rup); - - if (Rup < (unsigned short) MAX_RUP) { - rio_dprintk(RIO_DEBUG_CMD, "CONTROL information: This is the RUP for RTA ``%s''\n", HostP->Mapping[Rup].Name); - } else - rio_dprintk(RIO_DEBUG_CMD, "CONTROL information: This is the RUP for link ``%c'' of host ``%s''\n", ('A' + Rup - MAX_RUP), HostP->Name); - - rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Destination 0x%x:0x%x\n", readb(&PacketP->dest_unit), readb(&PacketP->dest_port)); - rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Source 0x%x:0x%x\n", readb(&PacketP->src_unit), readb(&PacketP->src_port)); - rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Length 0x%x (%d)\n", readb(&PacketP->len), readb(&PacketP->len)); - rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Control 0x%x (%d)\n", readb(&PacketP->control), readb(&PacketP->control)); - rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Check 0x%x (%d)\n", readw(&PacketP->csum), readw(&PacketP->csum)); - rio_dprintk(RIO_DEBUG_CMD, "COMMAND information: Host Port Number 0x%x, " "Command Code 0x%x\n", readb(&PktCmdP->PhbNum), readb(&PktCmdP->Command)); - return 1; - } - PortP = p->RIOPortp[SysPort]; - rio_spin_lock_irqsave(&PortP->portSem, flags); - switch (readb(&PktCmdP->Command)) { - case RIOC_BREAK_RECEIVED: - rio_dprintk(RIO_DEBUG_CMD, "Received a break!\n"); - /* If the current line disc. is not multi-threading and - the current processor is not the default, reset rup_intr - and return 0 to ensure that the command packet is - not freed. */ - /* Call tmgr HANGUP HERE */ - /* Fix this later when every thing works !!!! RAMRAJ */ - gs_got_break(&PortP->gs); - break; - - case RIOC_COMPLETE: - rio_dprintk(RIO_DEBUG_CMD, "Command complete on phb %d host %Zd\n", readb(&PktCmdP->PhbNum), HostP - p->RIOHosts); - subCommand = 1; - switch (readb(&PktCmdP->SubCommand)) { - case RIOC_MEMDUMP: - rio_dprintk(RIO_DEBUG_CMD, "Memory dump cmd (0x%x) from addr 0x%x\n", readb(&PktCmdP->SubCommand), readw(&PktCmdP->SubAddr)); - break; - case RIOC_READ_REGISTER: - rio_dprintk(RIO_DEBUG_CMD, "Read register (0x%x)\n", readw(&PktCmdP->SubAddr)); - p->CdRegister = (readb(&PktCmdP->ModemStatus) & RIOC_MSVR1_HOST); - break; - default: - subCommand = 0; - break; - } - if (subCommand) - break; - rio_dprintk(RIO_DEBUG_CMD, "New status is 0x%x was 0x%x\n", readb(&PktCmdP->PortStatus), PortP->PortState); - if (PortP->PortState != readb(&PktCmdP->PortStatus)) { - rio_dprintk(RIO_DEBUG_CMD, "Mark status & wakeup\n"); - PortP->PortState = readb(&PktCmdP->PortStatus); - /* What should we do here ... - wakeup( &PortP->PortState ); - */ - } else - rio_dprintk(RIO_DEBUG_CMD, "No change\n"); - - /* FALLTHROUGH */ - case RIOC_MODEM_STATUS: - /* - ** Knock out the tbusy and tstop bits, as these are not relevant - ** to the check for modem status change (they're just there because - ** it's a convenient place to put them!). - */ - ReportedModemStatus = readb(&PktCmdP->ModemStatus); - if ((PortP->ModemState & RIOC_MSVR1_HOST) == - (ReportedModemStatus & RIOC_MSVR1_HOST)) { - rio_dprintk(RIO_DEBUG_CMD, "Modem status unchanged 0x%x\n", PortP->ModemState); - /* - ** Update ModemState just in case tbusy or tstop states have - ** changed. - */ - PortP->ModemState = ReportedModemStatus; - } else { - rio_dprintk(RIO_DEBUG_CMD, "Modem status change from 0x%x to 0x%x\n", PortP->ModemState, ReportedModemStatus); - PortP->ModemState = ReportedModemStatus; -#ifdef MODEM_SUPPORT - if (PortP->Mapped) { - /***********************************************************\ - ************************************************************* - *** *** - *** M O D E M S T A T E C H A N G E *** - *** *** - ************************************************************* - \***********************************************************/ - /* - ** If the device is a modem, then check the modem - ** carrier. - */ - if (PortP->gs.port.tty == NULL) - break; - if (PortP->gs.port.tty->termios == NULL) - break; - - if (!(PortP->gs.port.tty->termios->c_cflag & CLOCAL) && ((PortP->State & (RIO_MOPEN | RIO_WOPEN)))) { - - rio_dprintk(RIO_DEBUG_CMD, "Is there a Carrier?\n"); - /* - ** Is there a carrier? - */ - if (PortP->ModemState & RIOC_MSVR1_CD) { - /* - ** Has carrier just appeared? - */ - if (!(PortP->State & RIO_CARR_ON)) { - rio_dprintk(RIO_DEBUG_CMD, "Carrier just came up.\n"); - PortP->State |= RIO_CARR_ON; - /* - ** wakeup anyone in WOPEN - */ - if (PortP->State & (PORT_ISOPEN | RIO_WOPEN)) - wake_up_interruptible(&PortP->gs.port.open_wait); - } - } else { - /* - ** Has carrier just dropped? - */ - if (PortP->State & RIO_CARR_ON) { - if (PortP->State & (PORT_ISOPEN | RIO_WOPEN | RIO_MOPEN)) - tty_hangup(PortP->gs.port.tty); - PortP->State &= ~RIO_CARR_ON; - rio_dprintk(RIO_DEBUG_CMD, "Carrirer just went down\n"); - } - } - } - } -#endif - } - break; - - default: - rio_dprintk(RIO_DEBUG_CMD, "Unknown command %d on CMD_RUP of host %Zd\n", readb(&PktCmdP->Command), HostP - p->RIOHosts); - break; - } - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - - func_exit(); - - return 1; -} - -/* -** The command mechanism: -** Each rup has a chain of commands associated with it. -** This chain is maintained by routines in this file. -** Periodically we are called and we run a quick check of all the -** active chains to determine if there is a command to be executed, -** and if the rup is ready to accept it. -** -*/ - -/* -** Allocate an empty command block. -*/ -struct CmdBlk *RIOGetCmdBlk(void) -{ - struct CmdBlk *CmdBlkP; - - CmdBlkP = kzalloc(sizeof(struct CmdBlk), GFP_ATOMIC); - return CmdBlkP; -} - -/* -** Return a block to the head of the free list. -*/ -void RIOFreeCmdBlk(struct CmdBlk *CmdBlkP) -{ - kfree(CmdBlkP); -} - -/* -** attach a command block to the list of commands to be performed for -** a given rup. -*/ -int RIOQueueCmdBlk(struct Host *HostP, uint Rup, struct CmdBlk *CmdBlkP) -{ - struct CmdBlk **Base; - struct UnixRup *UnixRupP; - unsigned long flags; - - if (Rup >= (unsigned short) (MAX_RUP + LINKS_PER_UNIT)) { - rio_dprintk(RIO_DEBUG_CMD, "Illegal rup number %d in RIOQueueCmdBlk\n", Rup); - RIOFreeCmdBlk(CmdBlkP); - return RIO_FAIL; - } - - UnixRupP = &HostP->UnixRups[Rup]; - - rio_spin_lock_irqsave(&UnixRupP->RupLock, flags); - - /* - ** If the RUP is currently inactive, then put the request - ** straight on the RUP.... - */ - if ((UnixRupP->CmdsWaitingP == NULL) && (UnixRupP->CmdPendingP == NULL) && (readw(&UnixRupP->RupP->txcontrol) == TX_RUP_INACTIVE) && (CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP) - : 1)) { - rio_dprintk(RIO_DEBUG_CMD, "RUP inactive-placing command straight on. Cmd byte is 0x%x\n", CmdBlkP->Packet.data[0]); - - /* - ** Whammy! blat that pack! - */ - HostP->Copy(&CmdBlkP->Packet, RIO_PTR(HostP->Caddr, readw(&UnixRupP->RupP->txpkt)), sizeof(struct PKT)); - - /* - ** place command packet on the pending position. - */ - UnixRupP->CmdPendingP = CmdBlkP; - - /* - ** set the command register - */ - writew(TX_PACKET_READY, &UnixRupP->RupP->txcontrol); - - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - - return 0; - } - rio_dprintk(RIO_DEBUG_CMD, "RUP active - en-queing\n"); - - if (UnixRupP->CmdsWaitingP != NULL) - rio_dprintk(RIO_DEBUG_CMD, "Rup active - command waiting\n"); - if (UnixRupP->CmdPendingP != NULL) - rio_dprintk(RIO_DEBUG_CMD, "Rup active - command pending\n"); - if (readw(&UnixRupP->RupP->txcontrol) != TX_RUP_INACTIVE) - rio_dprintk(RIO_DEBUG_CMD, "Rup active - command rup not ready\n"); - - Base = &UnixRupP->CmdsWaitingP; - - rio_dprintk(RIO_DEBUG_CMD, "First try to queue cmdblk %p at %p\n", CmdBlkP, Base); - - while (*Base) { - rio_dprintk(RIO_DEBUG_CMD, "Command cmdblk %p here\n", *Base); - Base = &((*Base)->NextP); - rio_dprintk(RIO_DEBUG_CMD, "Now try to queue cmd cmdblk %p at %p\n", CmdBlkP, Base); - } - - rio_dprintk(RIO_DEBUG_CMD, "Will queue cmdblk %p at %p\n", CmdBlkP, Base); - - *Base = CmdBlkP; - - CmdBlkP->NextP = NULL; - - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - - return 0; -} - -/* -** Here we go - if there is an empty rup, fill it! -** must be called at splrio() or higher. -*/ -void RIOPollHostCommands(struct rio_info *p, struct Host *HostP) -{ - struct CmdBlk *CmdBlkP; - struct UnixRup *UnixRupP; - struct PKT __iomem *PacketP; - unsigned short Rup; - unsigned long flags; - - - Rup = MAX_RUP + LINKS_PER_UNIT; - - do { /* do this loop for each RUP */ - /* - ** locate the rup we are processing & lock it - */ - UnixRupP = &HostP->UnixRups[--Rup]; - - spin_lock_irqsave(&UnixRupP->RupLock, flags); - - /* - ** First check for incoming commands: - */ - if (readw(&UnixRupP->RupP->rxcontrol) != RX_RUP_INACTIVE) { - int FreeMe; - - PacketP = (struct PKT __iomem *) RIO_PTR(HostP->Caddr, readw(&UnixRupP->RupP->rxpkt)); - - switch (readb(&PacketP->dest_port)) { - case BOOT_RUP: - rio_dprintk(RIO_DEBUG_CMD, "Incoming Boot %s packet '%x'\n", readb(&PacketP->len) & 0x80 ? "Command" : "Data", readb(&PacketP->data[0])); - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - FreeMe = RIOBootRup(p, Rup, HostP, PacketP); - rio_spin_lock_irqsave(&UnixRupP->RupLock, flags); - break; - - case COMMAND_RUP: - /* - ** Free the RUP lock as loss of carrier causes a - ** ttyflush which will (eventually) call another - ** routine that uses the RUP lock. - */ - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - FreeMe = RIOCommandRup(p, Rup, HostP, PacketP); - if (readb(&PacketP->data[5]) == RIOC_MEMDUMP) { - rio_dprintk(RIO_DEBUG_CMD, "Memdump from 0x%x complete\n", readw(&(PacketP->data[6]))); - rio_memcpy_fromio(p->RIOMemDump, &(PacketP->data[8]), 32); - } - rio_spin_lock_irqsave(&UnixRupP->RupLock, flags); - break; - - case ROUTE_RUP: - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - FreeMe = RIORouteRup(p, Rup, HostP, PacketP); - rio_spin_lock_irqsave(&UnixRupP->RupLock, flags); - break; - - default: - rio_dprintk(RIO_DEBUG_CMD, "Unknown RUP %d\n", readb(&PacketP->dest_port)); - FreeMe = 1; - break; - } - - if (FreeMe) { - rio_dprintk(RIO_DEBUG_CMD, "Free processed incoming command packet\n"); - put_free_end(HostP, PacketP); - - writew(RX_RUP_INACTIVE, &UnixRupP->RupP->rxcontrol); - - if (readw(&UnixRupP->RupP->handshake) == PHB_HANDSHAKE_SET) { - rio_dprintk(RIO_DEBUG_CMD, "Handshake rup %d\n", Rup); - writew(PHB_HANDSHAKE_SET | PHB_HANDSHAKE_RESET, &UnixRupP->RupP->handshake); - } - } - } - - /* - ** IF a command was running on the port, - ** and it has completed, then tidy it up. - */ - if ((CmdBlkP = UnixRupP->CmdPendingP) && /* ASSIGN! */ - (readw(&UnixRupP->RupP->txcontrol) == TX_RUP_INACTIVE)) { - /* - ** we are idle. - ** there is a command in pending. - ** Therefore, this command has finished. - ** So, wakeup whoever is waiting for it (and tell them - ** what happened). - */ - if (CmdBlkP->Packet.dest_port == BOOT_RUP) - rio_dprintk(RIO_DEBUG_CMD, "Free Boot %s Command Block '%x'\n", CmdBlkP->Packet.len & 0x80 ? "Command" : "Data", CmdBlkP->Packet.data[0]); - - rio_dprintk(RIO_DEBUG_CMD, "Command %p completed\n", CmdBlkP); - - /* - ** Clear the Rup lock to prevent mutual exclusion. - */ - if (CmdBlkP->PostFuncP) { - rio_spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - (*CmdBlkP->PostFuncP) (CmdBlkP->PostArg, CmdBlkP); - rio_spin_lock_irqsave(&UnixRupP->RupLock, flags); - } - - /* - ** ....clear the pending flag.... - */ - UnixRupP->CmdPendingP = NULL; - - /* - ** ....and return the command block to the freelist. - */ - RIOFreeCmdBlk(CmdBlkP); - } - - /* - ** If there is a command for this rup, and the rup - ** is idle, then process the command - */ - if ((CmdBlkP = UnixRupP->CmdsWaitingP) && /* ASSIGN! */ - (UnixRupP->CmdPendingP == NULL) && (readw(&UnixRupP->RupP->txcontrol) == TX_RUP_INACTIVE)) { - /* - ** if the pre-function is non-zero, call it. - ** If it returns RIO_FAIL then don't - ** send this command yet! - */ - if (!(CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP) : 1)) { - rio_dprintk(RIO_DEBUG_CMD, "Not ready to start command %p\n", CmdBlkP); - } else { - rio_dprintk(RIO_DEBUG_CMD, "Start new command %p Cmd byte is 0x%x\n", CmdBlkP, CmdBlkP->Packet.data[0]); - /* - ** Whammy! blat that pack! - */ - HostP->Copy(&CmdBlkP->Packet, RIO_PTR(HostP->Caddr, readw(&UnixRupP->RupP->txpkt)), sizeof(struct PKT)); - - /* - ** remove the command from the rup command queue... - */ - UnixRupP->CmdsWaitingP = CmdBlkP->NextP; - - /* - ** ...and place it on the pending position. - */ - UnixRupP->CmdPendingP = CmdBlkP; - - /* - ** set the command register - */ - writew(TX_PACKET_READY, &UnixRupP->RupP->txcontrol); - - /* - ** the command block will be freed - ** when the command has been processed. - */ - } - } - spin_unlock_irqrestore(&UnixRupP->RupLock, flags); - } while (Rup); -} - -int RIOWFlushMark(unsigned long iPortP, struct CmdBlk *CmdBlkP) -{ - struct Port *PortP = (struct Port *) iPortP; - unsigned long flags; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->WflushFlag++; - PortP->MagicFlags |= MAGIC_FLUSH; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return RIOUnUse(iPortP, CmdBlkP); -} - -int RIORFlushEnable(unsigned long iPortP, struct CmdBlk *CmdBlkP) -{ - struct Port *PortP = (struct Port *) iPortP; - struct PKT __iomem *PacketP; - unsigned long flags; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - while (can_remove_receive(&PacketP, PortP)) { - remove_receive(PortP); - put_free_end(PortP->HostP, PacketP); - } - - if (readw(&PortP->PhbP->handshake) == PHB_HANDSHAKE_SET) { - /* - ** MAGIC! (Basically, handshake the RX buffer, so that - ** the RTAs upstream can be re-enabled.) - */ - rio_dprintk(RIO_DEBUG_CMD, "Util: Set RX handshake bit\n"); - writew(PHB_HANDSHAKE_SET | PHB_HANDSHAKE_RESET, &PortP->PhbP->handshake); - } - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return RIOUnUse(iPortP, CmdBlkP); -} - -int RIOUnUse(unsigned long iPortP, struct CmdBlk *CmdBlkP) -{ - struct Port *PortP = (struct Port *) iPortP; - unsigned long flags; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - rio_dprintk(RIO_DEBUG_CMD, "Decrement in use count for port\n"); - - if (PortP->InUse) { - if (--PortP->InUse != NOT_INUSE) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return 0; - } - } - /* - ** While PortP->InUse is set (i.e. a preemptive command has been sent to - ** the RTA and is awaiting completion), any transmit data is prevented from - ** being transferred from the write queue into the transmit packets - ** (add_transmit) and no furthur transmit interrupt will be sent for that - ** data. The next interrupt will occur up to 500ms later (RIOIntr is called - ** twice a second as a safety measure). This was the case when kermit was - ** used to send data into a RIO port. After each packet was sent, TCFLSH - ** was called to flush the read queue preemptively. PortP->InUse was - ** incremented, thereby blocking the 6 byte acknowledgement packet - ** transmitted back. This acknowledgment hung around for 500ms before - ** being sent, thus reducing input performance substantially!. - ** When PortP->InUse becomes NOT_INUSE, we must ensure that any data - ** hanging around in the transmit buffer is sent immediately. - */ - writew(1, &PortP->HostP->ParmMapP->tx_intr); - /* What to do here .. - wakeup( (caddr_t)&(PortP->InUse) ); - */ - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return 0; -} - -/* -** -** How to use this file: -** -** To send a command down a rup, you need to allocate a command block, fill -** in the packet information, fill in the command number, fill in the pre- -** and post- functions and arguments, and then add the command block to the -** queue of command blocks for the port in question. When the port is idle, -** then the pre-function will be called. If this returns RIO_FAIL then the -** command will be re-queued and tried again at a later date (probably in one -** clock tick). If the pre-function returns NOT RIO_FAIL, then the command -** packet will be queued on the RUP, and the txcontrol field set to the -** command number. When the txcontrol field has changed from being the -** command number, then the post-function will be called, with the argument -** specified earlier, a pointer to the command block, and the value of -** txcontrol. -** -** To allocate a command block, call RIOGetCmdBlk(). This returns a pointer -** to the command block structure allocated, or NULL if there aren't any. -** The block will have been zeroed for you. -** -** The structure has the following fields: -** -** struct CmdBlk -** { -** struct CmdBlk *NextP; ** Pointer to next command block ** -** struct PKT Packet; ** A packet, to copy to the rup ** -** int (*PreFuncP)(); ** The func to call to check if OK ** -** int PreArg; ** The arg for the func ** -** int (*PostFuncP)(); ** The func to call when completed ** -** int PostArg; ** The arg for the func ** -** }; -** -** You need to fill in ALL fields EXCEPT NextP, which is used to link the -** blocks together either on the free list or on the Rup list. -** -** Packet is an actual packet structure to be filled in with the packet -** information associated with the command. You need to fill in everything, -** as the command processor doesn't process the command packet in any way. -** -** The PreFuncP is called before the packet is enqueued on the host rup. -** PreFuncP is called as (*PreFuncP)(PreArg, CmdBlkP);. PreFuncP must -** return !RIO_FAIL to have the packet queued on the rup, and RIO_FAIL -** if the packet is NOT to be queued. -** -** The PostFuncP is called when the command has completed. It is called -** as (*PostFuncP)(PostArg, CmdBlkP, txcontrol);. PostFuncP is not expected -** to return a value. PostFuncP does NOT need to free the command block, -** as this happens automatically after PostFuncP returns. -** -** Once the command block has been filled in, it is attached to the correct -** queue by calling RIOQueueCmdBlk( HostP, Rup, CmdBlkP ) where HostP is -** a pointer to the struct Host, Rup is the NUMBER of the rup (NOT a pointer -** to it!), and CmdBlkP is the pointer to the command block allocated using -** RIOGetCmdBlk(). -** -*/ diff --git a/drivers/staging/generic_serial/rio/rioctrl.c b/drivers/staging/generic_serial/rio/rioctrl.c deleted file mode 100644 index 7805063..0000000 --- a/drivers/staging/generic_serial/rio/rioctrl.c +++ /dev/null @@ -1,1504 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioctrl.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:42 -** Retrieved : 11/6/98 10:33:49 -** -** ident @(#)rioctrl.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" - - -static struct LpbReq LpbReq; -static struct RupReq RupReq; -static struct PortReq PortReq; -static struct HostReq HostReq; /* oh really? global? and no locking? */ -static struct HostDpRam HostDpRam; -static struct DebugCtrl DebugCtrl; -static struct Map MapEnt; -static struct PortSetup PortSetup; -static struct DownLoad DownLoad; -static struct SendPack SendPack; -/* static struct StreamInfo StreamInfo; */ -/* static char modemtable[RIO_PORTS]; */ -static struct SpecialRupCmd SpecialRupCmd; -static struct PortParams PortParams; -static struct portStats portStats; - -static struct SubCmdStruct { - ushort Host; - ushort Rup; - ushort Port; - ushort Addr; -} SubCmd; - -struct PortTty { - uint port; - struct ttystatics Tty; -}; - -static struct PortTty PortTty; -typedef struct ttystatics TERMIO; - -/* -** This table is used when the config.rio downloads bin code to the -** driver. We index the table using the product code, 0-F, and call -** the function pointed to by the entry, passing the information -** about the boot. -** The RIOBootCodeUNKNOWN entry is there to politely tell the calling -** process to bog off. -*/ -static int - (*RIOBootTable[MAX_PRODUCT]) (struct rio_info *, struct DownLoad *) = { - /* 0 */ RIOBootCodeHOST, - /* Host Card */ - /* 1 */ RIOBootCodeRTA, - /* RTA */ -}; - -#define drv_makedev(maj, min) ((((uint) maj & 0xff) << 8) | ((uint) min & 0xff)) - -static int copy_from_io(void __user *to, void __iomem *from, size_t size) -{ - void *buf = kmalloc(size, GFP_KERNEL); - int res = -ENOMEM; - if (buf) { - rio_memcpy_fromio(buf, from, size); - res = copy_to_user(to, buf, size); - kfree(buf); - } - return res; -} - -int riocontrol(struct rio_info *p, dev_t dev, int cmd, unsigned long arg, int su) -{ - uint Host; /* leave me unsigned! */ - uint port; /* and me! */ - struct Host *HostP; - ushort loop; - int Entry; - struct Port *PortP; - struct PKT __iomem *PacketP; - int retval = 0; - unsigned long flags; - void __user *argp = (void __user *)arg; - - func_enter(); - - /* Confuse the compiler to think that we've initialized these */ - Host = 0; - PortP = NULL; - - rio_dprintk(RIO_DEBUG_CTRL, "control ioctl cmd: 0x%x arg: %p\n", cmd, argp); - - switch (cmd) { - /* - ** RIO_SET_TIMER - ** - ** Change the value of the host card interrupt timer. - ** If the host card number is -1 then all host cards are changed - ** otherwise just the specified host card will be changed. - */ - case RIO_SET_TIMER: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET_TIMER to %ldms\n", arg); - { - int host, value; - host = (arg >> 16) & 0x0000FFFF; - value = arg & 0x0000ffff; - if (host == -1) { - for (host = 0; host < p->RIONumHosts; host++) { - if (p->RIOHosts[host].Flags == RC_RUNNING) { - writew(value, &p->RIOHosts[host].ParmMapP->timer); - } - } - } else if (host >= p->RIONumHosts) { - return -EINVAL; - } else { - if (p->RIOHosts[host].Flags == RC_RUNNING) { - writew(value, &p->RIOHosts[host].ParmMapP->timer); - } - } - } - return 0; - - case RIO_FOAD_RTA: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_FOAD_RTA\n"); - return RIOCommandRta(p, arg, RIOFoadRta); - - case RIO_ZOMBIE_RTA: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_ZOMBIE_RTA\n"); - return RIOCommandRta(p, arg, RIOZombieRta); - - case RIO_IDENTIFY_RTA: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_IDENTIFY_RTA\n"); - return RIOIdentifyRta(p, argp); - - case RIO_KILL_NEIGHBOUR: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_KILL_NEIGHBOUR\n"); - return RIOKillNeighbour(p, argp); - - case SPECIAL_RUP_CMD: - { - struct CmdBlk *CmdBlkP; - - rio_dprintk(RIO_DEBUG_CTRL, "SPECIAL_RUP_CMD\n"); - if (copy_from_user(&SpecialRupCmd, argp, sizeof(SpecialRupCmd))) { - rio_dprintk(RIO_DEBUG_CTRL, "SPECIAL_RUP_CMD copy failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - CmdBlkP = RIOGetCmdBlk(); - if (!CmdBlkP) { - rio_dprintk(RIO_DEBUG_CTRL, "SPECIAL_RUP_CMD GetCmdBlk failed\n"); - return -ENXIO; - } - CmdBlkP->Packet = SpecialRupCmd.Packet; - if (SpecialRupCmd.Host >= p->RIONumHosts) - SpecialRupCmd.Host = 0; - rio_dprintk(RIO_DEBUG_CTRL, "Queue special rup command for host %d rup %d\n", SpecialRupCmd.Host, SpecialRupCmd.RupNum); - if (RIOQueueCmdBlk(&p->RIOHosts[SpecialRupCmd.Host], SpecialRupCmd.RupNum, CmdBlkP) == RIO_FAIL) { - printk(KERN_WARNING "rio: FAILED TO QUEUE SPECIAL RUP COMMAND\n"); - } - return 0; - } - - case RIO_DEBUG_MEM: - return -EPERM; - - case RIO_ALL_MODEM: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_ALL_MODEM\n"); - p->RIOError.Error = IOCTL_COMMAND_UNKNOWN; - return -EINVAL; - - case RIO_GET_TABLE: - /* - ** Read the routing table from the device driver to user space - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_TABLE\n"); - - if ((retval = RIOApel(p)) != 0) - return retval; - - if (copy_to_user(argp, p->RIOConnectTable, TOTAL_MAP_ENTRIES * sizeof(struct Map))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_TABLE copy failed\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - - { - int entry; - rio_dprintk(RIO_DEBUG_CTRL, "*****\nMAP ENTRIES\n"); - for (entry = 0; entry < TOTAL_MAP_ENTRIES; entry++) { - if ((p->RIOConnectTable[entry].ID == 0) && (p->RIOConnectTable[entry].HostUniqueNum == 0) && (p->RIOConnectTable[entry].RtaUniqueNum == 0)) - continue; - - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.HostUniqueNum = 0x%x\n", entry, p->RIOConnectTable[entry].HostUniqueNum); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.RtaUniqueNum = 0x%x\n", entry, p->RIOConnectTable[entry].RtaUniqueNum); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.ID = 0x%x\n", entry, p->RIOConnectTable[entry].ID); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.ID2 = 0x%x\n", entry, p->RIOConnectTable[entry].ID2); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Flags = 0x%x\n", entry, (int) p->RIOConnectTable[entry].Flags); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.SysPort = 0x%x\n", entry, (int) p->RIOConnectTable[entry].SysPort); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[0].Unit = %x\n", entry, p->RIOConnectTable[entry].Topology[0].Unit); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[0].Link = %x\n", entry, p->RIOConnectTable[entry].Topology[0].Link); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[1].Unit = %x\n", entry, p->RIOConnectTable[entry].Topology[1].Unit); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[1].Link = %x\n", entry, p->RIOConnectTable[entry].Topology[1].Link); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[2].Unit = %x\n", entry, p->RIOConnectTable[entry].Topology[2].Unit); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[2].Link = %x\n", entry, p->RIOConnectTable[entry].Topology[2].Link); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[3].Unit = %x\n", entry, p->RIOConnectTable[entry].Topology[3].Unit); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Top[4].Link = %x\n", entry, p->RIOConnectTable[entry].Topology[3].Link); - rio_dprintk(RIO_DEBUG_CTRL, "Map entry %d.Name = %s\n", entry, p->RIOConnectTable[entry].Name); - } - rio_dprintk(RIO_DEBUG_CTRL, "*****\nEND MAP ENTRIES\n"); - } - p->RIOQuickCheck = NOT_CHANGED; /* a table has been gotten */ - return 0; - - case RIO_PUT_TABLE: - /* - ** Write the routing table to the device driver from user space - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_TABLE\n"); - - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_TABLE !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&p->RIOConnectTable[0], argp, TOTAL_MAP_ENTRIES * sizeof(struct Map))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_TABLE copy failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } -/* -*********************************** - { - int entry; - rio_dprint(RIO_DEBUG_CTRL, ("*****\nMAP ENTRIES\n") ); - for ( entry=0; entryRIOConnectTable[entry].HostUniqueNum ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.RtaUniqueNum = 0x%x\n", entry, p->RIOConnectTable[entry].RtaUniqueNum ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.ID = 0x%x\n", entry, p->RIOConnectTable[entry].ID ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.ID2 = 0x%x\n", entry, p->RIOConnectTable[entry].ID2 ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Flags = 0x%x\n", entry, p->RIOConnectTable[entry].Flags ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.SysPort = 0x%x\n", entry, p->RIOConnectTable[entry].SysPort ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[0].Unit = %b\n", entry, p->RIOConnectTable[entry].Topology[0].Unit ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[0].Link = %b\n", entry, p->RIOConnectTable[entry].Topology[0].Link ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[1].Unit = %b\n", entry, p->RIOConnectTable[entry].Topology[1].Unit ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[1].Link = %b\n", entry, p->RIOConnectTable[entry].Topology[1].Link ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[2].Unit = %b\n", entry, p->RIOConnectTable[entry].Topology[2].Unit ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[2].Link = %b\n", entry, p->RIOConnectTable[entry].Topology[2].Link ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[3].Unit = %b\n", entry, p->RIOConnectTable[entry].Topology[3].Unit ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Top[4].Link = %b\n", entry, p->RIOConnectTable[entry].Topology[3].Link ) ); - rio_dprint(RIO_DEBUG_CTRL, ("Map entry %d.Name = %s\n", entry, p->RIOConnectTable[entry].Name ) ); - } - rio_dprint(RIO_DEBUG_CTRL, ("*****\nEND MAP ENTRIES\n") ); - } -*********************************** -*/ - return RIONewTable(p); - - case RIO_GET_BINDINGS: - /* - ** Send bindings table, containing unique numbers of RTAs owned - ** by this system to user space - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_BINDINGS\n"); - - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_BINDINGS !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_to_user(argp, p->RIOBindTab, (sizeof(ulong) * MAX_RTA_BINDINGS))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_BINDINGS copy failed\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - - case RIO_PUT_BINDINGS: - /* - ** Receive a bindings table, containing unique numbers of RTAs owned - ** by this system - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_BINDINGS\n"); - - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_BINDINGS !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&p->RIOBindTab[0], argp, (sizeof(ulong) * MAX_RTA_BINDINGS))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PUT_BINDINGS copy failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - return 0; - - case RIO_BIND_RTA: - { - int EmptySlot = -1; - /* - ** Bind this RTA to host, so that it will be booted by - ** host in 'boot owned RTAs' mode. - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_BIND_RTA\n"); - - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_BIND_RTA !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - for (Entry = 0; Entry < MAX_RTA_BINDINGS; Entry++) { - if ((EmptySlot == -1) && (p->RIOBindTab[Entry] == 0L)) - EmptySlot = Entry; - else if (p->RIOBindTab[Entry] == arg) { - /* - ** Already exists - delete - */ - p->RIOBindTab[Entry] = 0L; - rio_dprintk(RIO_DEBUG_CTRL, "Removing Rta %ld from p->RIOBindTab\n", arg); - return 0; - } - } - /* - ** Dosen't exist - add - */ - if (EmptySlot != -1) { - p->RIOBindTab[EmptySlot] = arg; - rio_dprintk(RIO_DEBUG_CTRL, "Adding Rta %lx to p->RIOBindTab\n", arg); - } else { - rio_dprintk(RIO_DEBUG_CTRL, "p->RIOBindTab full! - Rta %lx not added\n", arg); - return -ENOMEM; - } - return 0; - } - - case RIO_RESUME: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME\n"); - port = arg; - if ((port < 0) || (port > 511)) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME: Bad port number %d\n", port); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - PortP = p->RIOPortp[port]; - if (!PortP->Mapped) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME: Port %d not mapped\n", port); - p->RIOError.Error = PORT_NOT_MAPPED_INTO_SYSTEM; - return -EINVAL; - } - if (!(PortP->State & (RIO_LOPEN | RIO_MOPEN))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME: Port %d not open\n", port); - return -EINVAL; - } - - rio_spin_lock_irqsave(&PortP->portSem, flags); - if (RIOPreemptiveCmd(p, (p->RIOPortp[port]), RIOC_RESUME) == - RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME failed\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return -EBUSY; - } else { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESUME: Port %d resumed\n", port); - PortP->State |= RIO_BUSY; - } - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_ASSIGN_RTA: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_ASSIGN_RTA\n"); - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_ASSIGN_RTA !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&MapEnt, argp, sizeof(MapEnt))) { - rio_dprintk(RIO_DEBUG_CTRL, "Copy from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - return RIOAssignRta(p, &MapEnt); - - case RIO_CHANGE_NAME: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_CHANGE_NAME\n"); - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_CHANGE_NAME !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&MapEnt, argp, sizeof(MapEnt))) { - rio_dprintk(RIO_DEBUG_CTRL, "Copy from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - return RIOChangeName(p, &MapEnt); - - case RIO_DELETE_RTA: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DELETE_RTA\n"); - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DELETE_RTA !Root\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&MapEnt, argp, sizeof(MapEnt))) { - rio_dprintk(RIO_DEBUG_CTRL, "Copy from data space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - return RIODeleteRta(p, &MapEnt); - - case RIO_QUICK_CHECK: - if (copy_to_user(argp, &p->RIORtaDisCons, sizeof(unsigned int))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - - case RIO_LAST_ERROR: - if (copy_to_user(argp, &p->RIOError, sizeof(struct Error))) - return -EFAULT; - return 0; - - case RIO_GET_LOG: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_LOG\n"); - return -EINVAL; - - case RIO_GET_MODTYPE: - if (copy_from_user(&port, argp, sizeof(unsigned int))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - rio_dprintk(RIO_DEBUG_CTRL, "Get module type for port %d\n", port); - if (port < 0 || port > 511) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_MODTYPE: Bad port number %d\n", port); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - PortP = (p->RIOPortp[port]); - if (!PortP->Mapped) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_MODTYPE: Port %d not mapped\n", port); - p->RIOError.Error = PORT_NOT_MAPPED_INTO_SYSTEM; - return -EINVAL; - } - /* - ** Return module type of port - */ - port = PortP->HostP->UnixRups[PortP->RupNum].ModTypes; - if (copy_to_user(argp, &port, sizeof(unsigned int))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return (0); - case RIO_BLOCK_OPENS: - rio_dprintk(RIO_DEBUG_CTRL, "Opens block until booted\n"); - for (Entry = 0; Entry < RIO_PORTS; Entry++) { - rio_spin_lock_irqsave(&PortP->portSem, flags); - p->RIOPortp[Entry]->WaitUntilBooted = 1; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - return 0; - - case RIO_SETUP_PORTS: - rio_dprintk(RIO_DEBUG_CTRL, "Setup ports\n"); - if (copy_from_user(&PortSetup, argp, sizeof(PortSetup))) { - p->RIOError.Error = COPYIN_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "EFAULT"); - return -EFAULT; - } - if (PortSetup.From > PortSetup.To || PortSetup.To >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - rio_dprintk(RIO_DEBUG_CTRL, "ENXIO"); - return -ENXIO; - } - if (PortSetup.XpCps > p->RIOConf.MaxXpCps || PortSetup.XpCps < p->RIOConf.MinXpCps) { - p->RIOError.Error = XPRINT_CPS_OUT_OF_RANGE; - rio_dprintk(RIO_DEBUG_CTRL, "EINVAL"); - return -EINVAL; - } - if (!p->RIOPortp) { - printk(KERN_ERR "rio: No p->RIOPortp array!\n"); - rio_dprintk(RIO_DEBUG_CTRL, "No p->RIOPortp array!\n"); - return -EIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "entering loop (%d %d)!\n", PortSetup.From, PortSetup.To); - for (loop = PortSetup.From; loop <= PortSetup.To; loop++) { - rio_dprintk(RIO_DEBUG_CTRL, "in loop (%d)!\n", loop); - } - rio_dprintk(RIO_DEBUG_CTRL, "after loop (%d)!\n", loop); - rio_dprintk(RIO_DEBUG_CTRL, "Retval:%x\n", retval); - return retval; - - case RIO_GET_PORT_SETUP: - rio_dprintk(RIO_DEBUG_CTRL, "Get port setup\n"); - if (copy_from_user(&PortSetup, argp, sizeof(PortSetup))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (PortSetup.From >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - - port = PortSetup.To = PortSetup.From; - PortSetup.IxAny = (p->RIOPortp[port]->Config & RIO_IXANY) ? 1 : 0; - PortSetup.IxOn = (p->RIOPortp[port]->Config & RIO_IXON) ? 1 : 0; - PortSetup.Drain = (p->RIOPortp[port]->Config & RIO_WAITDRAIN) ? 1 : 0; - PortSetup.Store = p->RIOPortp[port]->Store; - PortSetup.Lock = p->RIOPortp[port]->Lock; - PortSetup.XpCps = p->RIOPortp[port]->Xprint.XpCps; - memcpy(PortSetup.XpOn, p->RIOPortp[port]->Xprint.XpOn, MAX_XP_CTRL_LEN); - memcpy(PortSetup.XpOff, p->RIOPortp[port]->Xprint.XpOff, MAX_XP_CTRL_LEN); - PortSetup.XpOn[MAX_XP_CTRL_LEN - 1] = '\0'; - PortSetup.XpOff[MAX_XP_CTRL_LEN - 1] = '\0'; - - if (copy_to_user(argp, &PortSetup, sizeof(PortSetup))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_GET_PORT_PARAMS: - rio_dprintk(RIO_DEBUG_CTRL, "Get port params\n"); - if (copy_from_user(&PortParams, argp, sizeof(struct PortParams))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (PortParams.Port >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[PortParams.Port]); - PortParams.Config = PortP->Config; - PortParams.State = PortP->State; - rio_dprintk(RIO_DEBUG_CTRL, "Port %d\n", PortParams.Port); - - if (copy_to_user(argp, &PortParams, sizeof(struct PortParams))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_GET_PORT_TTY: - rio_dprintk(RIO_DEBUG_CTRL, "Get port tty\n"); - if (copy_from_user(&PortTty, argp, sizeof(struct PortTty))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (PortTty.port >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - - rio_dprintk(RIO_DEBUG_CTRL, "Port %d\n", PortTty.port); - PortP = (p->RIOPortp[PortTty.port]); - if (copy_to_user(argp, &PortTty, sizeof(struct PortTty))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_SET_PORT_TTY: - if (copy_from_user(&PortTty, argp, sizeof(struct PortTty))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - rio_dprintk(RIO_DEBUG_CTRL, "Set port %d tty\n", PortTty.port); - if (PortTty.port >= (ushort) RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[PortTty.port]); - RIOParam(PortP, RIOC_CONFIG, PortP->State & RIO_MODEM, - OK_TO_SLEEP); - return retval; - - case RIO_SET_PORT_PARAMS: - rio_dprintk(RIO_DEBUG_CTRL, "Set port params\n"); - if (copy_from_user(&PortParams, argp, sizeof(PortParams))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (PortParams.Port >= (ushort) RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[PortParams.Port]); - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->Config = PortParams.Config; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_GET_PORT_STATS: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GET_PORT_STATS\n"); - if (copy_from_user(&portStats, argp, sizeof(struct portStats))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (portStats.port < 0 || portStats.port >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[portStats.port]); - portStats.gather = PortP->statsGather; - portStats.txchars = PortP->txchars; - portStats.rxchars = PortP->rxchars; - portStats.opens = PortP->opens; - portStats.closes = PortP->closes; - portStats.ioctls = PortP->ioctls; - if (copy_to_user(argp, &portStats, sizeof(struct portStats))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_RESET_PORT_STATS: - port = arg; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_RESET_PORT_STATS\n"); - if (port >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[port]); - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->txchars = 0; - PortP->rxchars = 0; - PortP->opens = 0; - PortP->closes = 0; - PortP->ioctls = 0; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_GATHER_PORT_STATS: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GATHER_PORT_STATS\n"); - if (copy_from_user(&portStats, argp, sizeof(struct portStats))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (portStats.port < 0 || portStats.port >= RIO_PORTS) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - PortP = (p->RIOPortp[portStats.port]); - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->statsGather = portStats.gather; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_READ_CONFIG: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_CONFIG\n"); - if (copy_to_user(argp, &p->RIOConf, sizeof(struct Conf))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_SET_CONFIG: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET_CONFIG\n"); - if (!su) { - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&p->RIOConf, argp, sizeof(struct Conf))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - /* - ** move a few value around - */ - for (Host = 0; Host < p->RIONumHosts; Host++) - if ((p->RIOHosts[Host].Flags & RUN_STATE) == RC_RUNNING) - writew(p->RIOConf.Timer, &p->RIOHosts[Host].ParmMapP->timer); - return retval; - - case RIO_START_POLLER: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_START_POLLER\n"); - return -EINVAL; - - case RIO_STOP_POLLER: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_STOP_POLLER\n"); - if (!su) { - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - p->RIOPolling = NOT_POLLING; - return retval; - - case RIO_SETDEBUG: - case RIO_GETDEBUG: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SETDEBUG/RIO_GETDEBUG\n"); - if (copy_from_user(&DebugCtrl, argp, sizeof(DebugCtrl))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (DebugCtrl.SysPort == NO_PORT) { - if (cmd == RIO_SETDEBUG) { - if (!su) { - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - p->rio_debug = DebugCtrl.Debug; - p->RIODebugWait = DebugCtrl.Wait; - rio_dprintk(RIO_DEBUG_CTRL, "Set global debug to 0x%x set wait to 0x%x\n", p->rio_debug, p->RIODebugWait); - } else { - rio_dprintk(RIO_DEBUG_CTRL, "Get global debug 0x%x wait 0x%x\n", p->rio_debug, p->RIODebugWait); - DebugCtrl.Debug = p->rio_debug; - DebugCtrl.Wait = p->RIODebugWait; - if (copy_to_user(argp, &DebugCtrl, sizeof(DebugCtrl))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET/GET DEBUG: bad port number %d\n", DebugCtrl.SysPort); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - } - } else if (DebugCtrl.SysPort >= RIO_PORTS && DebugCtrl.SysPort != NO_PORT) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET/GET DEBUG: bad port number %d\n", DebugCtrl.SysPort); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } else if (cmd == RIO_SETDEBUG) { - if (!su) { - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - p->RIOPortp[DebugCtrl.SysPort]->Debug = DebugCtrl.Debug; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SETDEBUG 0x%x\n", p->RIOPortp[DebugCtrl.SysPort]->Debug); - } else { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GETDEBUG 0x%x\n", p->RIOPortp[DebugCtrl.SysPort]->Debug); - DebugCtrl.Debug = p->RIOPortp[DebugCtrl.SysPort]->Debug; - if (copy_to_user(argp, &DebugCtrl, sizeof(DebugCtrl))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_GETDEBUG: Bad copy to user space\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - } - return retval; - - case RIO_VERSID: - /* - ** Enquire about the release and version. - ** We return MAX_VERSION_LEN bytes, being a - ** textual null terminated string. - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_VERSID\n"); - if (copy_to_user(argp, RIOVersid(), sizeof(struct rioVersion))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_VERSID: Bad copy to user space (host=%d)\n", Host); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_NUM_HOSTS: - /* - ** Enquire as to the number of hosts located - ** at init time. - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_NUM_HOSTS\n"); - if (copy_to_user(argp, &p->RIONumHosts, sizeof(p->RIONumHosts))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_NUM_HOSTS: Bad copy to user space\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - case RIO_HOST_FOAD: - /* - ** Kill host. This may not be in the final version... - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_FOAD %ld\n", arg); - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_FOAD: Not super user\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - p->RIOHalted = 1; - p->RIOSystemUp = 0; - - for (Host = 0; Host < p->RIONumHosts; Host++) { - (void) RIOBoardTest(p->RIOHosts[Host].PaddrP, p->RIOHosts[Host].Caddr, p->RIOHosts[Host].Type, p->RIOHosts[Host].Slot); - memset(&p->RIOHosts[Host].Flags, 0, ((char *) &p->RIOHosts[Host].____end_marker____) - ((char *) &p->RIOHosts[Host].Flags)); - p->RIOHosts[Host].Flags = RC_WAITING; - } - RIOFoadWakeup(p); - p->RIONumBootPkts = 0; - p->RIOBooting = 0; - printk("HEEEEELP!\n"); - - for (loop = 0; loop < RIO_PORTS; loop++) { - spin_lock_init(&p->RIOPortp[loop]->portSem); - p->RIOPortp[loop]->InUse = NOT_INUSE; - } - - p->RIOSystemUp = 0; - return retval; - - case RIO_DOWNLOAD: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DOWNLOAD\n"); - if (!su) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DOWNLOAD: Not super user\n"); - p->RIOError.Error = NOT_SUPER_USER; - return -EPERM; - } - if (copy_from_user(&DownLoad, argp, sizeof(DownLoad))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DOWNLOAD: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - rio_dprintk(RIO_DEBUG_CTRL, "Copied in download code for product code 0x%x\n", DownLoad.ProductCode); - - /* - ** It is important that the product code is an unsigned object! - */ - if (DownLoad.ProductCode >= MAX_PRODUCT) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_DOWNLOAD: Bad product code %d passed\n", DownLoad.ProductCode); - p->RIOError.Error = NO_SUCH_PRODUCT; - return -ENXIO; - } - /* - ** do something! - */ - retval = (*(RIOBootTable[DownLoad.ProductCode])) (p, &DownLoad); - /* <-- Panic */ - p->RIOHalted = 0; - /* - ** and go back, content with a job well completed. - */ - return retval; - - case RIO_PARMS: - { - unsigned int host; - - if (copy_from_user(&host, argp, sizeof(host))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_REQ: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - /* - ** Fetch the parmmap - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PARMS\n"); - if (copy_from_io(argp, p->RIOHosts[host].ParmMapP, sizeof(PARM_MAP))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_PARMS: Copy out to user space failed\n"); - return -EFAULT; - } - } - return retval; - - case RIO_HOST_REQ: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_REQ\n"); - if (copy_from_user(&HostReq, argp, sizeof(HostReq))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_REQ: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (HostReq.HostNum >= p->RIONumHosts) { - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_REQ: Illegal host number %d\n", HostReq.HostNum); - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "Request for host %d\n", HostReq.HostNum); - - if (copy_to_user(HostReq.HostP, &p->RIOHosts[HostReq.HostNum], sizeof(struct Host))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_REQ: Bad copy to user space\n"); - return -EFAULT; - } - return retval; - - case RIO_HOST_DPRAM: - rio_dprintk(RIO_DEBUG_CTRL, "Request for DPRAM\n"); - if (copy_from_user(&HostDpRam, argp, sizeof(HostDpRam))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_DPRAM: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (HostDpRam.HostNum >= p->RIONumHosts) { - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_DPRAM: Illegal host number %d\n", HostDpRam.HostNum); - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "Request for host %d\n", HostDpRam.HostNum); - - if (p->RIOHosts[HostDpRam.HostNum].Type == RIO_PCI) { - int off; - /* It's hardware like this that really gets on my tits. */ - static unsigned char copy[sizeof(struct DpRam)]; - for (off = 0; off < sizeof(struct DpRam); off++) - copy[off] = readb(p->RIOHosts[HostDpRam.HostNum].Caddr + off); - if (copy_to_user(HostDpRam.DpRamP, copy, sizeof(struct DpRam))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_DPRAM: Bad copy to user space\n"); - return -EFAULT; - } - } else if (copy_from_io(HostDpRam.DpRamP, p->RIOHosts[HostDpRam.HostNum].Caddr, sizeof(struct DpRam))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_DPRAM: Bad copy to user space\n"); - return -EFAULT; - } - return retval; - - case RIO_SET_BUSY: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET_BUSY\n"); - if (arg > 511) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SET_BUSY: Bad port number %ld\n", arg); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - p->RIOPortp[arg]->State |= RIO_BUSY; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_HOST_PORT: - /* - ** The daemon want port information - ** (probably for debug reasons) - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_PORT\n"); - if (copy_from_user(&PortReq, argp, sizeof(PortReq))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_PORT: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - - if (PortReq.SysPort >= RIO_PORTS) { /* SysPort is unsigned */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_PORT: Illegal port number %d\n", PortReq.SysPort); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "Request for port %d\n", PortReq.SysPort); - if (copy_to_user(PortReq.PortP, p->RIOPortp[PortReq.SysPort], sizeof(struct Port))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_PORT: Bad copy to user space\n"); - return -EFAULT; - } - return retval; - - case RIO_HOST_RUP: - /* - ** The daemon want rup information - ** (probably for debug reasons) - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP\n"); - if (copy_from_user(&RupReq, argp, sizeof(RupReq))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP: Copy in from user space failed\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (RupReq.HostNum >= p->RIONumHosts) { /* host is unsigned */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP: Illegal host number %d\n", RupReq.HostNum); - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - if (RupReq.RupNum >= MAX_RUP + LINKS_PER_UNIT) { /* eek! */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP: Illegal rup number %d\n", RupReq.RupNum); - p->RIOError.Error = RUP_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - HostP = &p->RIOHosts[RupReq.HostNum]; - - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP: Host %d not running\n", RupReq.HostNum); - p->RIOError.Error = HOST_NOT_RUNNING; - return -EIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "Request for rup %d from host %d\n", RupReq.RupNum, RupReq.HostNum); - - if (copy_from_io(RupReq.RupP, HostP->UnixRups[RupReq.RupNum].RupP, sizeof(struct RUP))) { - p->RIOError.Error = COPYOUT_FAILED; - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_RUP: Bad copy to user space\n"); - return -EFAULT; - } - return retval; - - case RIO_HOST_LPB: - /* - ** The daemon want lpb information - ** (probably for debug reasons) - */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB\n"); - if (copy_from_user(&LpbReq, argp, sizeof(LpbReq))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB: Bad copy from user space\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (LpbReq.Host >= p->RIONumHosts) { /* host is unsigned */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB: Illegal host number %d\n", LpbReq.Host); - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - if (LpbReq.Link >= LINKS_PER_UNIT) { /* eek! */ - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB: Illegal link number %d\n", LpbReq.Link); - p->RIOError.Error = LINK_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - HostP = &p->RIOHosts[LpbReq.Host]; - - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB: Host %d not running\n", LpbReq.Host); - p->RIOError.Error = HOST_NOT_RUNNING; - return -EIO; - } - rio_dprintk(RIO_DEBUG_CTRL, "Request for lpb %d from host %d\n", LpbReq.Link, LpbReq.Host); - - if (copy_from_io(LpbReq.LpbP, &HostP->LinkStrP[LpbReq.Link], sizeof(struct LPB))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_HOST_LPB: Bad copy to user space\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return retval; - - /* - ** Here 3 IOCTL's that allow us to change the way in which - ** rio logs errors. send them just to syslog or send them - ** to both syslog and console or send them to just the console. - ** - ** See RioStrBuf() in util.c for the other half. - */ - case RIO_SYSLOG_ONLY: - p->RIOPrintLogState = PRINT_TO_LOG; /* Just syslog */ - return 0; - - case RIO_SYSLOG_CONS: - p->RIOPrintLogState = PRINT_TO_LOG_CONS; /* syslog and console */ - return 0; - - case RIO_CONS_ONLY: - p->RIOPrintLogState = PRINT_TO_CONS; /* Just console */ - return 0; - - case RIO_SIGNALS_ON: - if (p->RIOSignalProcess) { - p->RIOError.Error = SIGNALS_ALREADY_SET; - return -EBUSY; - } - /* FIXME: PID tracking */ - p->RIOSignalProcess = current->pid; - p->RIOPrintDisabled = DONT_PRINT; - return retval; - - case RIO_SIGNALS_OFF: - if (p->RIOSignalProcess != current->pid) { - p->RIOError.Error = NOT_RECEIVING_PROCESS; - return -EPERM; - } - rio_dprintk(RIO_DEBUG_CTRL, "Clear signal process to zero\n"); - p->RIOSignalProcess = 0; - return retval; - - case RIO_SET_BYTE_MODE: - for (Host = 0; Host < p->RIONumHosts; Host++) - if (p->RIOHosts[Host].Type == RIO_AT) - p->RIOHosts[Host].Mode &= ~WORD_OPERATION; - return retval; - - case RIO_SET_WORD_MODE: - for (Host = 0; Host < p->RIONumHosts; Host++) - if (p->RIOHosts[Host].Type == RIO_AT) - p->RIOHosts[Host].Mode |= WORD_OPERATION; - return retval; - - case RIO_SET_FAST_BUS: - for (Host = 0; Host < p->RIONumHosts; Host++) - if (p->RIOHosts[Host].Type == RIO_AT) - p->RIOHosts[Host].Mode |= FAST_AT_BUS; - return retval; - - case RIO_SET_SLOW_BUS: - for (Host = 0; Host < p->RIONumHosts; Host++) - if (p->RIOHosts[Host].Type == RIO_AT) - p->RIOHosts[Host].Mode &= ~FAST_AT_BUS; - return retval; - - case RIO_MAP_B50_TO_50: - case RIO_MAP_B50_TO_57600: - case RIO_MAP_B110_TO_110: - case RIO_MAP_B110_TO_115200: - rio_dprintk(RIO_DEBUG_CTRL, "Baud rate mapping\n"); - port = arg; - if (port < 0 || port > 511) { - rio_dprintk(RIO_DEBUG_CTRL, "Baud rate mapping: Bad port number %d\n", port); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - switch (cmd) { - case RIO_MAP_B50_TO_50: - p->RIOPortp[port]->Config |= RIO_MAP_50_TO_50; - break; - case RIO_MAP_B50_TO_57600: - p->RIOPortp[port]->Config &= ~RIO_MAP_50_TO_50; - break; - case RIO_MAP_B110_TO_110: - p->RIOPortp[port]->Config |= RIO_MAP_110_TO_110; - break; - case RIO_MAP_B110_TO_115200: - p->RIOPortp[port]->Config &= ~RIO_MAP_110_TO_110; - break; - } - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_STREAM_INFO: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_STREAM_INFO\n"); - return -EINVAL; - - case RIO_SEND_PACKET: - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SEND_PACKET\n"); - if (copy_from_user(&SendPack, argp, sizeof(SendPack))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_SEND_PACKET: Bad copy from user space\n"); - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - if (SendPack.PortNum >= 128) { - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -ENXIO; - } - - PortP = p->RIOPortp[SendPack.PortNum]; - rio_spin_lock_irqsave(&PortP->portSem, flags); - - if (!can_add_transmit(&PacketP, PortP)) { - p->RIOError.Error = UNIT_IS_IN_USE; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return -ENOSPC; - } - - for (loop = 0; loop < (ushort) (SendPack.Len & 127); loop++) - writeb(SendPack.Data[loop], &PacketP->data[loop]); - - writeb(SendPack.Len, &PacketP->len); - - add_transmit(PortP); - /* - ** Count characters transmitted for port statistics reporting - */ - if (PortP->statsGather) - PortP->txchars += (SendPack.Len & 127); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - - case RIO_NO_MESG: - if (su) - p->RIONoMessage = 1; - return su ? 0 : -EPERM; - - case RIO_MESG: - if (su) - p->RIONoMessage = 0; - return su ? 0 : -EPERM; - - case RIO_WHAT_MESG: - if (copy_to_user(argp, &p->RIONoMessage, sizeof(p->RIONoMessage))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_WHAT_MESG: Bad copy to user space\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - - case RIO_MEM_DUMP: - if (copy_from_user(&SubCmd, argp, sizeof(struct SubCmdStruct))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - rio_dprintk(RIO_DEBUG_CTRL, "RIO_MEM_DUMP host %d rup %d addr %x\n", SubCmd.Host, SubCmd.Rup, SubCmd.Addr); - - if (SubCmd.Rup >= MAX_RUP + LINKS_PER_UNIT) { - p->RIOError.Error = RUP_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - if (SubCmd.Host >= p->RIONumHosts) { - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - port = p->RIOHosts[SubCmd.Host].UnixRups[SubCmd.Rup].BaseSysPort; - - PortP = p->RIOPortp[port]; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - if (RIOPreemptiveCmd(p, PortP, RIOC_MEMDUMP) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_MEM_DUMP failed\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return -EBUSY; - } else - PortP->State |= RIO_BUSY; - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (copy_to_user(argp, p->RIOMemDump, MEMDUMP_SIZE)) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_MEM_DUMP copy failed\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - - case RIO_TICK: - if (arg >= p->RIONumHosts) - return -EINVAL; - rio_dprintk(RIO_DEBUG_CTRL, "Set interrupt for host %ld\n", arg); - writeb(0xFF, &p->RIOHosts[arg].SetInt); - return 0; - - case RIO_TOCK: - if (arg >= p->RIONumHosts) - return -EINVAL; - rio_dprintk(RIO_DEBUG_CTRL, "Clear interrupt for host %ld\n", arg); - writeb(0xFF, &p->RIOHosts[arg].ResetInt); - return 0; - - case RIO_READ_CHECK: - /* Check reads for pkts with data[0] the same */ - p->RIOReadCheck = !p->RIOReadCheck; - if (copy_to_user(argp, &p->RIOReadCheck, sizeof(unsigned int))) { - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - - case RIO_READ_REGISTER: - if (copy_from_user(&SubCmd, argp, sizeof(struct SubCmdStruct))) { - p->RIOError.Error = COPYIN_FAILED; - return -EFAULT; - } - rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_REGISTER host %d rup %d port %d reg %x\n", SubCmd.Host, SubCmd.Rup, SubCmd.Port, SubCmd.Addr); - - if (SubCmd.Port > 511) { - rio_dprintk(RIO_DEBUG_CTRL, "Baud rate mapping: Bad port number %d\n", SubCmd.Port); - p->RIOError.Error = PORT_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - if (SubCmd.Rup >= MAX_RUP + LINKS_PER_UNIT) { - p->RIOError.Error = RUP_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - if (SubCmd.Host >= p->RIONumHosts) { - p->RIOError.Error = HOST_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - port = p->RIOHosts[SubCmd.Host].UnixRups[SubCmd.Rup].BaseSysPort + SubCmd.Port; - PortP = p->RIOPortp[port]; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - if (RIOPreemptiveCmd(p, PortP, RIOC_READ_REGISTER) == - RIO_FAIL) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_REGISTER failed\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return -EBUSY; - } else - PortP->State |= RIO_BUSY; - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (copy_to_user(argp, &p->CdRegister, sizeof(unsigned int))) { - rio_dprintk(RIO_DEBUG_CTRL, "RIO_READ_REGISTER copy failed\n"); - p->RIOError.Error = COPYOUT_FAILED; - return -EFAULT; - } - return 0; - /* - ** rio_make_dev: given port number (0-511) ORed with port type - ** (RIO_DEV_DIRECT, RIO_DEV_MODEM, RIO_DEV_XPRINT) return dev_t - ** value to pass to mknod to create the correct device node. - */ - case RIO_MAKE_DEV: - { - unsigned int port = arg & RIO_MODEM_MASK; - unsigned int ret; - - switch (arg & RIO_DEV_MASK) { - case RIO_DEV_DIRECT: - ret = drv_makedev(MAJOR(dev), port); - rio_dprintk(RIO_DEBUG_CTRL, "Makedev direct 0x%x is 0x%x\n", port, ret); - return ret; - case RIO_DEV_MODEM: - ret = drv_makedev(MAJOR(dev), (port | RIO_MODEM_BIT)); - rio_dprintk(RIO_DEBUG_CTRL, "Makedev modem 0x%x is 0x%x\n", port, ret); - return ret; - case RIO_DEV_XPRINT: - ret = drv_makedev(MAJOR(dev), port); - rio_dprintk(RIO_DEBUG_CTRL, "Makedev printer 0x%x is 0x%x\n", port, ret); - return ret; - } - rio_dprintk(RIO_DEBUG_CTRL, "MAKE Device is called\n"); - return -EINVAL; - } - /* - ** rio_minor: given a dev_t from a stat() call, return - ** the port number (0-511) ORed with the port type - ** ( RIO_DEV_DIRECT, RIO_DEV_MODEM, RIO_DEV_XPRINT ) - */ - case RIO_MINOR: - { - dev_t dv; - int mino; - unsigned long ret; - - dv = (dev_t) (arg); - mino = RIO_UNMODEM(dv); - - if (RIO_ISMODEM(dv)) { - rio_dprintk(RIO_DEBUG_CTRL, "Minor for device 0x%x: modem %d\n", dv, mino); - ret = mino | RIO_DEV_MODEM; - } else { - rio_dprintk(RIO_DEBUG_CTRL, "Minor for device 0x%x: direct %d\n", dv, mino); - ret = mino | RIO_DEV_DIRECT; - } - return ret; - } - } - rio_dprintk(RIO_DEBUG_CTRL, "INVALID DAEMON IOCTL 0x%x\n", cmd); - p->RIOError.Error = IOCTL_COMMAND_UNKNOWN; - - func_exit(); - return -EINVAL; -} - -/* -** Pre-emptive commands go on RUPs and are only one byte long. -*/ -int RIOPreemptiveCmd(struct rio_info *p, struct Port *PortP, u8 Cmd) -{ - struct CmdBlk *CmdBlkP; - struct PktCmd_M *PktCmdP; - int Ret; - ushort rup; - int port; - - if (PortP->State & RIO_DELETED) { - rio_dprintk(RIO_DEBUG_CTRL, "Preemptive command to deleted RTA ignored\n"); - return RIO_FAIL; - } - - if ((PortP->InUse == (typeof(PortP->InUse))-1) || - !(CmdBlkP = RIOGetCmdBlk())) { - rio_dprintk(RIO_DEBUG_CTRL, "Cannot allocate command block " - "for command %d on port %d\n", Cmd, PortP->PortNum); - return RIO_FAIL; - } - - rio_dprintk(RIO_DEBUG_CTRL, "Command blk %p - InUse now %d\n", - CmdBlkP, PortP->InUse); - - PktCmdP = (struct PktCmd_M *)&CmdBlkP->Packet.data[0]; - - CmdBlkP->Packet.src_unit = 0; - if (PortP->SecondBlock) - rup = PortP->ID2; - else - rup = PortP->RupNum; - CmdBlkP->Packet.dest_unit = rup; - CmdBlkP->Packet.src_port = COMMAND_RUP; - CmdBlkP->Packet.dest_port = COMMAND_RUP; - CmdBlkP->Packet.len = PKT_CMD_BIT | 2; - CmdBlkP->PostFuncP = RIOUnUse; - CmdBlkP->PostArg = (unsigned long) PortP; - PktCmdP->Command = Cmd; - port = PortP->HostPort % (ushort) PORTS_PER_RTA; - /* - ** Index ports 8-15 for 2nd block of 16 port RTA. - */ - if (PortP->SecondBlock) - port += (ushort) PORTS_PER_RTA; - PktCmdP->PhbNum = port; - - switch (Cmd) { - case RIOC_MEMDUMP: - rio_dprintk(RIO_DEBUG_CTRL, "Queue MEMDUMP command blk %p " - "(addr 0x%x)\n", CmdBlkP, (int) SubCmd.Addr); - PktCmdP->SubCommand = RIOC_MEMDUMP; - PktCmdP->SubAddr = SubCmd.Addr; - break; - case RIOC_FCLOSE: - rio_dprintk(RIO_DEBUG_CTRL, "Queue FCLOSE command blk %p\n", - CmdBlkP); - break; - case RIOC_READ_REGISTER: - rio_dprintk(RIO_DEBUG_CTRL, "Queue READ_REGISTER (0x%x) " - "command blk %p\n", (int) SubCmd.Addr, CmdBlkP); - PktCmdP->SubCommand = RIOC_READ_REGISTER; - PktCmdP->SubAddr = SubCmd.Addr; - break; - case RIOC_RESUME: - rio_dprintk(RIO_DEBUG_CTRL, "Queue RESUME command blk %p\n", - CmdBlkP); - break; - case RIOC_RFLUSH: - rio_dprintk(RIO_DEBUG_CTRL, "Queue RFLUSH command blk %p\n", - CmdBlkP); - CmdBlkP->PostFuncP = RIORFlushEnable; - break; - case RIOC_SUSPEND: - rio_dprintk(RIO_DEBUG_CTRL, "Queue SUSPEND command blk %p\n", - CmdBlkP); - break; - - case RIOC_MGET: - rio_dprintk(RIO_DEBUG_CTRL, "Queue MGET command blk %p\n", - CmdBlkP); - break; - - case RIOC_MSET: - case RIOC_MBIC: - case RIOC_MBIS: - CmdBlkP->Packet.data[4] = (char) PortP->ModemLines; - rio_dprintk(RIO_DEBUG_CTRL, "Queue MSET/MBIC/MBIS command " - "blk %p\n", CmdBlkP); - break; - - case RIOC_WFLUSH: - /* - ** If we have queued up the maximum number of Write flushes - ** allowed then we should not bother sending any more to the - ** RTA. - */ - if (PortP->WflushFlag == (typeof(PortP->WflushFlag))-1) { - rio_dprintk(RIO_DEBUG_CTRL, "Trashed WFLUSH, " - "WflushFlag about to wrap!"); - RIOFreeCmdBlk(CmdBlkP); - return (RIO_FAIL); - } else { - rio_dprintk(RIO_DEBUG_CTRL, "Queue WFLUSH command " - "blk %p\n", CmdBlkP); - CmdBlkP->PostFuncP = RIOWFlushMark; - } - break; - } - - PortP->InUse++; - - Ret = RIOQueueCmdBlk(PortP->HostP, rup, CmdBlkP); - - return Ret; -} diff --git a/drivers/staging/generic_serial/rio/riodrvr.h b/drivers/staging/generic_serial/rio/riodrvr.h deleted file mode 100644 index 0907e71..0000000 --- a/drivers/staging/generic_serial/rio/riodrvr.h +++ /dev/null @@ -1,138 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riodrvr.h -** SID : 1.3 -** Last Modified : 11/6/98 09:22:46 -** Retrieved : 11/6/98 09:22:46 -** -** ident @(#)riodrvr.h 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __riodrvr_h -#define __riodrvr_h - -#include /* for HZ */ - -#define MEMDUMP_SIZE 32 -#define MOD_DISABLE (RIO_NOREAD|RIO_NOWRITE|RIO_NOXPRINT) - - -struct rio_info { - int mode; /* Intr or polled, word/byte */ - spinlock_t RIOIntrSem; /* Interrupt thread sem */ - int current_chan; /* current channel */ - int RIOFailed; /* Not initialised ? */ - int RIOInstallAttempts; /* no. of rio-install() calls */ - int RIOLastPCISearch; /* status of last search */ - int RIONumHosts; /* Number of RIO Hosts */ - struct Host *RIOHosts; /* RIO Host values */ - struct Port **RIOPortp; /* RIO port values */ -/* -** 02.03.1999 ARG - ESIL 0820 fix -** We no longer use RIOBootMode -** - int RIOBootMode; * RIO boot mode * -** -*/ - int RIOPrintDisabled; /* RIO printing disabled ? */ - int RIOPrintLogState; /* RIO printing state ? */ - int RIOPolling; /* Polling ? */ -/* -** 09.12.1998 ARG - ESIL 0776 part fix -** The 'RIO_QUICK_CHECK' ioctl was using RIOHalted. -** The fix for this ESIL introduces another member (RIORtaDisCons) here to be -** updated in RIOConCon() - to keep track of RTA connections/disconnections. -** 'RIO_QUICK_CHECK' now returns the value of RIORtaDisCons. -*/ - int RIOHalted; /* halted ? */ - int RIORtaDisCons; /* RTA connections/disconnections */ - unsigned int RIOReadCheck; /* Rio read check */ - unsigned int RIONoMessage; /* To display message or not */ - unsigned int RIONumBootPkts; /* how many packets for an RTA */ - unsigned int RIOBootCount; /* size of RTA code */ - unsigned int RIOBooting; /* count of outstanding boots */ - unsigned int RIOSystemUp; /* Booted ?? */ - unsigned int RIOCounting; /* for counting interrupts */ - unsigned int RIOIntCount; /* # of intr since last check */ - unsigned int RIOTxCount; /* number of xmit intrs */ - unsigned int RIORxCount; /* number of rx intrs */ - unsigned int RIORupCount; /* number of rup intrs */ - int RIXTimer; - int RIOBufferSize; /* Buffersize */ - int RIOBufferMask; /* Buffersize */ - - int RIOFirstMajor; /* First host card's major no */ - - unsigned int RIOLastPortsMapped; /* highest port number known */ - unsigned int RIOFirstPortsMapped; /* lowest port number known */ - - unsigned int RIOLastPortsBooted; /* highest port number running */ - unsigned int RIOFirstPortsBooted; /* lowest port number running */ - - unsigned int RIOLastPortsOpened; /* highest port number running */ - unsigned int RIOFirstPortsOpened; /* lowest port number running */ - - /* Flag to say that the topology information has been changed. */ - unsigned int RIOQuickCheck; - unsigned int CdRegister; /* ??? */ - int RIOSignalProcess; /* Signalling process */ - int rio_debug; /* To debug ... */ - int RIODebugWait; /* For what ??? */ - int tpri; /* Thread prio */ - int tid; /* Thread id */ - unsigned int _RIO_Polled; /* Counter for polling */ - unsigned int _RIO_Interrupted; /* Counter for interrupt */ - int intr_tid; /* iointset return value */ - int TxEnSem; /* TxEnable Semaphore */ - - - struct Error RIOError; /* to Identify what went wrong */ - struct Conf RIOConf; /* Configuration ??? */ - struct ttystatics channel[RIO_PORTS]; /* channel information */ - char RIOBootPackets[1 + (SIXTY_FOUR_K / RTA_BOOT_DATA_SIZE)] - [RTA_BOOT_DATA_SIZE]; - struct Map RIOConnectTable[TOTAL_MAP_ENTRIES]; - struct Map RIOSavedTable[TOTAL_MAP_ENTRIES]; - - /* RTA to host binding table for master/slave operation */ - unsigned long RIOBindTab[MAX_RTA_BINDINGS]; - /* RTA memory dump variable */ - unsigned char RIOMemDump[MEMDUMP_SIZE]; - struct ModuleInfo RIOModuleTypes[MAX_MODULE_TYPES]; - -}; - - -#ifdef linux -#define debug(x) printk x -#else -#define debug(x) kkprintf x -#endif - - - -#define RIO_RESET_INT 0x7d80 - -#endif /* __riodrvr.h */ diff --git a/drivers/staging/generic_serial/rio/rioinfo.h b/drivers/staging/generic_serial/rio/rioinfo.h deleted file mode 100644 index 42ff1e7..0000000 --- a/drivers/staging/generic_serial/rio/rioinfo.h +++ /dev/null @@ -1,92 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioinfo.h -** SID : 1.2 -** Last Modified : 11/6/98 14:07:49 -** Retrieved : 11/6/98 14:07:50 -** -** ident @(#)rioinfo.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rioinfo_h -#define __rioinfo_h - -/* -** Host card data structure -*/ -struct RioHostInfo { - long location; /* RIO Card Base I/O address */ - long vector; /* RIO Card IRQ vector */ - int bus; /* ISA/EISA/MCA/PCI */ - int mode; /* pointer to host mode - INTERRUPT / POLLED */ - struct old_sgttyb - *Sg; /* pointer to default term characteristics */ -}; - - -/* Mode in rio device info */ -#define INTERRUPTED_MODE 0x01 /* Interrupt is generated */ -#define POLLED_MODE 0x02 /* No interrupt */ -#define AUTO_MODE 0x03 /* Auto mode */ - -#define WORD_ACCESS_MODE 0x10 /* Word Access Mode */ -#define BYTE_ACCESS_MODE 0x20 /* Byte Access Mode */ - - -/* Bus type that RIO supports */ -#define ISA_BUS 0x01 /* The card is ISA */ -#define EISA_BUS 0x02 /* The card is EISA */ -#define MCA_BUS 0x04 /* The card is MCA */ -#define PCI_BUS 0x08 /* The card is PCI */ - -/* -** 11.11.1998 ARG - ESIL ???? part fix -** Moved definition for 'CHAN' here from rioinfo.c (it is now -** called 'DEF_TERM_CHARACTERISTICS'). -*/ - -#define DEF_TERM_CHARACTERISTICS \ -{ \ - B19200, B19200, /* input and output speed */ \ - 'H' - '@', /* erase char */ \ - -1, /* 2nd erase char */ \ - 'U' - '@', /* kill char */ \ - ECHO | CRMOD, /* mode */ \ - 'C' - '@', /* interrupt character */ \ - '\\' - '@', /* quit char */ \ - 'Q' - '@', /* start char */ \ - 'S' - '@', /* stop char */ \ - 'D' - '@', /* EOF */ \ - -1, /* brk */ \ - (LCRTBS | LCRTERA | LCRTKIL | LCTLECH), /* local mode word */ \ - 'Z' - '@', /* process stop */ \ - 'Y' - '@', /* delayed stop */ \ - 'R' - '@', /* reprint line */ \ - 'O' - '@', /* flush output */ \ - 'W' - '@', /* word erase */ \ - 'V' - '@' /* literal next char */ \ -} - -#endif /* __rioinfo_h */ diff --git a/drivers/staging/generic_serial/rio/rioinit.c b/drivers/staging/generic_serial/rio/rioinit.c deleted file mode 100644 index fb62b38..0000000 --- a/drivers/staging/generic_serial/rio/rioinit.c +++ /dev/null @@ -1,421 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioinit.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:43 -** Retrieved : 11/6/98 10:33:49 -** -** ident @(#)rioinit.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - - -#include "linux_compat.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "rio_linux.h" - -int RIOPCIinit(struct rio_info *p, int Mode); - -static int RIOScrub(int, u8 __iomem *, int); - - -/** -** RIOAssignAT : -** -** Fill out the fields in the p->RIOHosts structure now we know we know -** we have a board present. -** -** bits < 0 indicates 8 bit operation requested, -** bits > 0 indicates 16 bit operation. -*/ - -int RIOAssignAT(struct rio_info *p, int Base, void __iomem *virtAddr, int mode) -{ - int bits; - struct DpRam __iomem *cardp = (struct DpRam __iomem *)virtAddr; - - if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE)) - bits = BYTE_OPERATION; - else - bits = WORD_OPERATION; - - /* - ** Board has passed its scrub test. Fill in all the - ** transient stuff. - */ - p->RIOHosts[p->RIONumHosts].Caddr = virtAddr; - p->RIOHosts[p->RIONumHosts].CardP = virtAddr; - - /* - ** Revision 01 AT host cards don't support WORD operations, - */ - if (readb(&cardp->DpRevision) == 01) - bits = BYTE_OPERATION; - - p->RIOHosts[p->RIONumHosts].Type = RIO_AT; - p->RIOHosts[p->RIONumHosts].Copy = rio_copy_to_card; - /* set this later */ - p->RIOHosts[p->RIONumHosts].Slot = -1; - p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits; - writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE , - &p->RIOHosts[p->RIONumHosts].Control); - writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt); - writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE, - &p->RIOHosts[p->RIONumHosts].Control); - writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt); - p->RIOHosts[p->RIONumHosts].UniqueNum = - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)| - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)| - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)| - ((readb(&p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24); - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum); - - p->RIONumHosts++; - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base); - return(1); -} - -static u8 val[] = { -#ifdef VERY_LONG_TEST - 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, - 0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36, -#endif - 0xff, 0x00, 0x00 }; - -#define TEST_END sizeof(val) - -/* -** RAM test a board. -** Nothing too complicated, just enough to check it out. -*/ -int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, int slot) -{ - struct DpRam __iomem *DpRam = caddr; - void __iomem *ram[4]; - int size[4]; - int op, bank; - int nbanks; - - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=%p, slot=%d\n", - type, DpRam, slot); - - RIOHostReset(type, DpRam, slot); - - /* - ** Scrub the memory. This comes in several banks: - ** DPsram1 - 7000h bytes - ** DPsram2 - 200h bytes - ** DPsram3 - 7000h bytes - ** scratch - 1000h bytes - */ - - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n"); - - size[0] = DP_SRAM1_SIZE; - size[1] = DP_SRAM2_SIZE; - size[2] = DP_SRAM3_SIZE; - size[3] = DP_SCRATCH_SIZE; - - ram[0] = DpRam->DpSram1; - ram[1] = DpRam->DpSram2; - ram[2] = DpRam->DpSram3; - nbanks = (type == RIO_PCI) ? 3 : 4; - if (nbanks == 4) - ram[3] = DpRam->DpScratch; - - - if (nbanks == 3) { - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: %p(0x%x), %p(0x%x), %p(0x%x)\n", - ram[0], size[0], ram[1], size[1], ram[2], size[2]); - } else { - rio_dprintk (RIO_DEBUG_INIT, "RIO-init: %p(0x%x), %p(0x%x), %p(0x%x), %p(0x%x)\n", - ram[0], size[0], ram[1], size[1], ram[2], size[2], ram[3], size[3]); - } - - /* - ** This scrub operation will test for crosstalk between - ** banks. TEST_END is a magic number, and relates to the offset - ** within the 'val' array used by Scrub. - */ - for (op=0; opMapping[UnitId].Name, "UNKNOWN RTA X-XX", 17); - HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts); - if ((UnitId+1) > 9) { - HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10); - HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10); - } - else { - HostP->Mapping[UnitId].Name[14]='1'+UnitId; - HostP->Mapping[UnitId].Name[15]=0; - } - return 0; -} - -#define RIO_RELEASE "Linux" -#define RELEASE_ID "1.0" - -static struct rioVersion stVersion; - -struct rioVersion *RIOVersid(void) -{ - strlcpy(stVersion.version, "RIO driver for linux V1.0", - sizeof(stVersion.version)); - strlcpy(stVersion.buildDate, "Aug 15 2010", - sizeof(stVersion.buildDate)); - - return &stVersion; -} - -void RIOHostReset(unsigned int Type, struct DpRam __iomem *DpRamP, unsigned int Slot) -{ - /* - ** Reset the Tpu - */ - rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type); - switch ( Type ) { - case RIO_AT: - rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n"); - writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE | BYTE_OPERATION | - SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl); - writeb(0xFF, &DpRamP->DpResetTpu); - udelay(3); - rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n"); - writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE | - BYTE_OPERATION | SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl); - writeb(0xFF, &DpRamP->DpResetTpu); - udelay(3); - break; - case RIO_PCI: - rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n"); - writeb(RIO_PCI_BOOT_FROM_RAM, &DpRamP->DpControl); - writeb(0xFF, &DpRamP->DpResetInt); - writeb(0xFF, &DpRamP->DpResetTpu); - udelay(100); - break; - default: - rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n"); - break; - } - return; -} diff --git a/drivers/staging/generic_serial/rio/riointr.c b/drivers/staging/generic_serial/rio/riointr.c deleted file mode 100644 index 2e71aeca..0000000 --- a/drivers/staging/generic_serial/rio/riointr.c +++ /dev/null @@ -1,645 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riointr.c -** SID : 1.2 -** Last Modified : 11/6/98 10:33:44 -** Retrieved : 11/6/98 10:33:49 -** -** ident @(#)riointr.c 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" - - -static void RIOReceive(struct rio_info *, struct Port *); - - -static char *firstchars(char *p, int nch) -{ - static char buf[2][128]; - static int t = 0; - t = !t; - memcpy(buf[t], p, nch); - buf[t][nch] = 0; - return buf[t]; -} - - -#define INCR( P, I ) ((P) = (((P)+(I)) & p->RIOBufferMask)) -/* Enable and start the transmission of packets */ -void RIOTxEnable(char *en) -{ - struct Port *PortP; - struct rio_info *p; - struct tty_struct *tty; - int c; - struct PKT __iomem *PacketP; - unsigned long flags; - - PortP = (struct Port *) en; - p = (struct rio_info *) PortP->p; - tty = PortP->gs.port.tty; - - - rio_dprintk(RIO_DEBUG_INTR, "tx port %d: %d chars queued.\n", PortP->PortNum, PortP->gs.xmit_cnt); - - if (!PortP->gs.xmit_cnt) - return; - - - /* This routine is an order of magnitude simpler than the specialix - version. One of the disadvantages is that this version will send - an incomplete packet (usually 64 bytes instead of 72) once for - every 4k worth of data. Let's just say that this won't influence - performance significantly..... */ - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - while (can_add_transmit(&PacketP, PortP)) { - c = PortP->gs.xmit_cnt; - if (c > PKT_MAX_DATA_LEN) - c = PKT_MAX_DATA_LEN; - - /* Don't copy past the end of the source buffer */ - if (c > SERIAL_XMIT_SIZE - PortP->gs.xmit_tail) - c = SERIAL_XMIT_SIZE - PortP->gs.xmit_tail; - - { - int t; - t = (c > 10) ? 10 : c; - - rio_dprintk(RIO_DEBUG_INTR, "rio: tx port %d: copying %d chars: %s - %s\n", PortP->PortNum, c, firstchars(PortP->gs.xmit_buf + PortP->gs.xmit_tail, t), firstchars(PortP->gs.xmit_buf + PortP->gs.xmit_tail + c - t, t)); - } - /* If for one reason or another, we can't copy more data, - we're done! */ - if (c == 0) - break; - - rio_memcpy_toio(PortP->HostP->Caddr, PacketP->data, PortP->gs.xmit_buf + PortP->gs.xmit_tail, c); - /* udelay (1); */ - - writeb(c, &(PacketP->len)); - if (!(PortP->State & RIO_DELETED)) { - add_transmit(PortP); - /* - ** Count chars tx'd for port statistics reporting - */ - if (PortP->statsGather) - PortP->txchars += c; - } - PortP->gs.xmit_tail = (PortP->gs.xmit_tail + c) & (SERIAL_XMIT_SIZE - 1); - PortP->gs.xmit_cnt -= c; - } - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - - if (PortP->gs.xmit_cnt <= (PortP->gs.wakeup_chars + 2 * PKT_MAX_DATA_LEN)) - tty_wakeup(PortP->gs.port.tty); - -} - - -/* -** RIO Host Service routine. Does all the work traditionally associated with an -** interrupt. -*/ -static int RupIntr; -static int RxIntr; -static int TxIntr; - -void RIOServiceHost(struct rio_info *p, struct Host *HostP) -{ - rio_spin_lock(&HostP->HostLock); - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) { - static int t = 0; - rio_spin_unlock(&HostP->HostLock); - if ((t++ % 200) == 0) - rio_dprintk(RIO_DEBUG_INTR, "Interrupt but host not running. flags=%x.\n", (int) HostP->Flags); - return; - } - rio_spin_unlock(&HostP->HostLock); - - if (readw(&HostP->ParmMapP->rup_intr)) { - writew(0, &HostP->ParmMapP->rup_intr); - p->RIORupCount++; - RupIntr++; - rio_dprintk(RIO_DEBUG_INTR, "rio: RUP interrupt on host %Zd\n", HostP - p->RIOHosts); - RIOPollHostCommands(p, HostP); - } - - if (readw(&HostP->ParmMapP->rx_intr)) { - int port; - - writew(0, &HostP->ParmMapP->rx_intr); - p->RIORxCount++; - RxIntr++; - - rio_dprintk(RIO_DEBUG_INTR, "rio: RX interrupt on host %Zd\n", HostP - p->RIOHosts); - /* - ** Loop through every port. If the port is mapped into - ** the system ( i.e. has /dev/ttyXXXX associated ) then it is - ** worth checking. If the port isn't open, grab any packets - ** hanging on its receive queue and stuff them on the free - ** list; check for commands on the way. - */ - for (port = p->RIOFirstPortsBooted; port < p->RIOLastPortsBooted + PORTS_PER_RTA; port++) { - struct Port *PortP = p->RIOPortp[port]; - struct tty_struct *ttyP; - struct PKT __iomem *PacketP; - - /* - ** not mapped in - most of the RIOPortp[] information - ** has not been set up! - ** Optimise: ports come in bundles of eight. - */ - if (!PortP->Mapped) { - port += 7; - continue; /* with the next port */ - } - - /* - ** If the host board isn't THIS host board, check the next one. - ** optimise: ports come in bundles of eight. - */ - if (PortP->HostP != HostP) { - port += 7; - continue; - } - - /* - ** Let us see - is the port open? If not, then don't service it. - */ - if (!(PortP->PortState & PORT_ISOPEN)) { - continue; - } - - /* - ** find corresponding tty structure. The process of mapping - ** the ports puts these here. - */ - ttyP = PortP->gs.port.tty; - - /* - ** Lock the port before we begin working on it. - */ - rio_spin_lock(&PortP->portSem); - - /* - ** Process received data if there is any. - */ - if (can_remove_receive(&PacketP, PortP)) - RIOReceive(p, PortP); - - /* - ** If there is no data left to be read from the port, and - ** it's handshake bit is set, then we must clear the handshake, - ** so that that downstream RTA is re-enabled. - */ - if (!can_remove_receive(&PacketP, PortP) && (readw(&PortP->PhbP->handshake) == PHB_HANDSHAKE_SET)) { - /* - ** MAGIC! ( Basically, handshake the RX buffer, so that - ** the RTAs upstream can be re-enabled. ) - */ - rio_dprintk(RIO_DEBUG_INTR, "Set RX handshake bit\n"); - writew(PHB_HANDSHAKE_SET | PHB_HANDSHAKE_RESET, &PortP->PhbP->handshake); - } - rio_spin_unlock(&PortP->portSem); - } - } - - if (readw(&HostP->ParmMapP->tx_intr)) { - int port; - - writew(0, &HostP->ParmMapP->tx_intr); - - p->RIOTxCount++; - TxIntr++; - rio_dprintk(RIO_DEBUG_INTR, "rio: TX interrupt on host %Zd\n", HostP - p->RIOHosts); - - /* - ** Loop through every port. - ** If the port is mapped into the system ( i.e. has /dev/ttyXXXX - ** associated ) then it is worth checking. - */ - for (port = p->RIOFirstPortsBooted; port < p->RIOLastPortsBooted + PORTS_PER_RTA; port++) { - struct Port *PortP = p->RIOPortp[port]; - struct tty_struct *ttyP; - struct PKT __iomem *PacketP; - - /* - ** not mapped in - most of the RIOPortp[] information - ** has not been set up! - */ - if (!PortP->Mapped) { - port += 7; - continue; /* with the next port */ - } - - /* - ** If the host board isn't running, then its data structures - ** are no use to us - continue quietly. - */ - if (PortP->HostP != HostP) { - port += 7; - continue; /* with the next port */ - } - - /* - ** Let us see - is the port open? If not, then don't service it. - */ - if (!(PortP->PortState & PORT_ISOPEN)) { - continue; - } - - rio_dprintk(RIO_DEBUG_INTR, "rio: Looking into port %d.\n", port); - /* - ** Lock the port before we begin working on it. - */ - rio_spin_lock(&PortP->portSem); - - /* - ** If we can't add anything to the transmit queue, then - ** we need do none of this processing. - */ - if (!can_add_transmit(&PacketP, PortP)) { - rio_dprintk(RIO_DEBUG_INTR, "Can't add to port, so skipping.\n"); - rio_spin_unlock(&PortP->portSem); - continue; - } - - /* - ** find corresponding tty structure. The process of mapping - ** the ports puts these here. - */ - ttyP = PortP->gs.port.tty; - /* If ttyP is NULL, the port is getting closed. Forget about it. */ - if (!ttyP) { - rio_dprintk(RIO_DEBUG_INTR, "no tty, so skipping.\n"); - rio_spin_unlock(&PortP->portSem); - continue; - } - /* - ** If there is more room available we start up the transmit - ** data process again. This can be direct I/O, if the cookmode - ** is set to COOK_RAW or COOK_MEDIUM, or will be a call to the - ** riotproc( T_OUTPUT ) if we are in COOK_WELL mode, to fetch - ** characters via the line discipline. We must always call - ** the line discipline, - ** so that user input characters can be echoed correctly. - ** - ** ++++ Update +++++ - ** With the advent of double buffering, we now see if - ** TxBufferOut-In is non-zero. If so, then we copy a packet - ** to the output place, and set it going. If this empties - ** the buffer, then we must issue a wakeup( ) on OUT. - ** If it frees space in the buffer then we must issue - ** a wakeup( ) on IN. - ** - ** ++++ Extra! Extra! If PortP->WflushFlag is set, then we - ** have to send a WFLUSH command down the PHB, to mark the - ** end point of a WFLUSH. We also need to clear out any - ** data from the double buffer! ( note that WflushFlag is a - ** *count* of the number of WFLUSH commands outstanding! ) - ** - ** ++++ And there's more! - ** If an RTA is powered off, then on again, and rebooted, - ** whilst it has ports open, then we need to re-open the ports. - ** ( reasonable enough ). We can't do this when we spot the - ** re-boot, in interrupt time, because the queue is probably - ** full. So, when we come in here, we need to test if any - ** ports are in this condition, and re-open the port before - ** we try to send any more data to it. Now, the re-booted - ** RTA will be discarding packets from the PHB until it - ** receives this open packet, but don't worry tooo much - ** about that. The one thing that is interesting is the - ** combination of this effect and the WFLUSH effect! - */ - /* For now don't handle RTA reboots. -- REW. - Reenabled. Otherwise RTA reboots didn't work. Duh. -- REW */ - if (PortP->MagicFlags) { - if (PortP->MagicFlags & MAGIC_REBOOT) { - /* - ** well, the RTA has been rebooted, and there is room - ** on its queue to add the open packet that is required. - ** - ** The messy part of this line is trying to decide if - ** we need to call the Param function as a tty or as - ** a modem. - ** DONT USE CLOCAL AS A TEST FOR THIS! - ** - ** If we can't param the port, then move on to the - ** next port. - */ - PortP->InUse = NOT_INUSE; - - rio_spin_unlock(&PortP->portSem); - if (RIOParam(PortP, RIOC_OPEN, ((PortP->Cor2Copy & (RIOC_COR2_RTSFLOW | RIOC_COR2_CTSFLOW)) == (RIOC_COR2_RTSFLOW | RIOC_COR2_CTSFLOW)) ? 1 : 0, DONT_SLEEP) == RIO_FAIL) - continue; /* with next port */ - rio_spin_lock(&PortP->portSem); - PortP->MagicFlags &= ~MAGIC_REBOOT; - } - - /* - ** As mentioned above, this is a tacky hack to cope - ** with WFLUSH - */ - if (PortP->WflushFlag) { - rio_dprintk(RIO_DEBUG_INTR, "Want to WFLUSH mark this port\n"); - - if (PortP->InUse) - rio_dprintk(RIO_DEBUG_INTR, "FAILS - PORT IS IN USE\n"); - } - - while (PortP->WflushFlag && can_add_transmit(&PacketP, PortP) && (PortP->InUse == NOT_INUSE)) { - int p; - struct PktCmd __iomem *PktCmdP; - - rio_dprintk(RIO_DEBUG_INTR, "Add WFLUSH marker to data queue\n"); - /* - ** make it look just like a WFLUSH command - */ - PktCmdP = (struct PktCmd __iomem *) &PacketP->data[0]; - - writeb(RIOC_WFLUSH, &PktCmdP->Command); - - p = PortP->HostPort % (u16) PORTS_PER_RTA; - - /* - ** If second block of ports for 16 port RTA, add 8 - ** to index 8-15. - */ - if (PortP->SecondBlock) - p += PORTS_PER_RTA; - - writeb(p, &PktCmdP->PhbNum); - - /* - ** to make debuggery easier - */ - writeb('W', &PacketP->data[2]); - writeb('F', &PacketP->data[3]); - writeb('L', &PacketP->data[4]); - writeb('U', &PacketP->data[5]); - writeb('S', &PacketP->data[6]); - writeb('H', &PacketP->data[7]); - writeb(' ', &PacketP->data[8]); - writeb('0' + PortP->WflushFlag, &PacketP->data[9]); - writeb(' ', &PacketP->data[10]); - writeb(' ', &PacketP->data[11]); - writeb('\0', &PacketP->data[12]); - - /* - ** its two bytes long! - */ - writeb(PKT_CMD_BIT | 2, &PacketP->len); - - /* - ** queue it! - */ - if (!(PortP->State & RIO_DELETED)) { - add_transmit(PortP); - /* - ** Count chars tx'd for port statistics reporting - */ - if (PortP->statsGather) - PortP->txchars += 2; - } - - if (--(PortP->WflushFlag) == 0) { - PortP->MagicFlags &= ~MAGIC_FLUSH; - } - - rio_dprintk(RIO_DEBUG_INTR, "Wflush count now stands at %d\n", PortP->WflushFlag); - } - if (PortP->MagicFlags & MORE_OUTPUT_EYGOR) { - if (PortP->MagicFlags & MAGIC_FLUSH) { - PortP->MagicFlags |= MORE_OUTPUT_EYGOR; - } else { - if (!can_add_transmit(&PacketP, PortP)) { - rio_spin_unlock(&PortP->portSem); - continue; - } - rio_spin_unlock(&PortP->portSem); - RIOTxEnable((char *) PortP); - rio_spin_lock(&PortP->portSem); - PortP->MagicFlags &= ~MORE_OUTPUT_EYGOR; - } - } - } - - - /* - ** If we can't add anything to the transmit queue, then - ** we need do none of the remaining processing. - */ - if (!can_add_transmit(&PacketP, PortP)) { - rio_spin_unlock(&PortP->portSem); - continue; - } - - rio_spin_unlock(&PortP->portSem); - RIOTxEnable((char *) PortP); - } - } -} - -/* -** Routine for handling received data for tty drivers -*/ -static void RIOReceive(struct rio_info *p, struct Port *PortP) -{ - struct tty_struct *TtyP; - unsigned short transCount; - struct PKT __iomem *PacketP; - register unsigned int DataCnt; - unsigned char __iomem *ptr; - unsigned char *buf; - int copied = 0; - - static int intCount, RxIntCnt; - - /* - ** The receive data process is to remove packets from the - ** PHB until there aren't any more or the current cblock - ** is full. When this occurs, there will be some left over - ** data in the packet, that we must do something with. - ** As we haven't unhooked the packet from the read list - ** yet, we can just leave the packet there, having first - ** made a note of how far we got. This means that we need - ** a pointer per port saying where we start taking the - ** data from - this will normally be zero, but when we - ** run out of space it will be set to the offset of the - ** next byte to copy from the packet data area. The packet - ** length field is decremented by the number of bytes that - ** we successfully removed from the packet. When this reaches - ** zero, we reset the offset pointer to be zero, and free - ** the packet from the front of the queue. - */ - - intCount++; - - TtyP = PortP->gs.port.tty; - if (!TtyP) { - rio_dprintk(RIO_DEBUG_INTR, "RIOReceive: tty is null. \n"); - return; - } - - if (PortP->State & RIO_THROTTLE_RX) { - rio_dprintk(RIO_DEBUG_INTR, "RIOReceive: Throttled. Can't handle more input.\n"); - return; - } - - if (PortP->State & RIO_DELETED) { - while (can_remove_receive(&PacketP, PortP)) { - remove_receive(PortP); - put_free_end(PortP->HostP, PacketP); - } - } else { - /* - ** loop, just so long as: - ** i ) there's some data ( i.e. can_remove_receive ) - ** ii ) we haven't been blocked - ** iii ) there's somewhere to put the data - ** iv ) we haven't outstayed our welcome - */ - transCount = 1; - while (can_remove_receive(&PacketP, PortP) - && transCount) { - RxIntCnt++; - - /* - ** check that it is not a command! - */ - if (readb(&PacketP->len) & PKT_CMD_BIT) { - rio_dprintk(RIO_DEBUG_INTR, "RIO: unexpected command packet received on PHB\n"); - /* rio_dprint(RIO_DEBUG_INTR, (" sysport = %d\n", p->RIOPortp->PortNum)); */ - rio_dprintk(RIO_DEBUG_INTR, " dest_unit = %d\n", readb(&PacketP->dest_unit)); - rio_dprintk(RIO_DEBUG_INTR, " dest_port = %d\n", readb(&PacketP->dest_port)); - rio_dprintk(RIO_DEBUG_INTR, " src_unit = %d\n", readb(&PacketP->src_unit)); - rio_dprintk(RIO_DEBUG_INTR, " src_port = %d\n", readb(&PacketP->src_port)); - rio_dprintk(RIO_DEBUG_INTR, " len = %d\n", readb(&PacketP->len)); - rio_dprintk(RIO_DEBUG_INTR, " control = %d\n", readb(&PacketP->control)); - rio_dprintk(RIO_DEBUG_INTR, " csum = %d\n", readw(&PacketP->csum)); - rio_dprintk(RIO_DEBUG_INTR, " data bytes: "); - for (DataCnt = 0; DataCnt < PKT_MAX_DATA_LEN; DataCnt++) - rio_dprintk(RIO_DEBUG_INTR, "%d\n", readb(&PacketP->data[DataCnt])); - remove_receive(PortP); - put_free_end(PortP->HostP, PacketP); - continue; /* with next packet */ - } - - /* - ** How many characters can we move 'upstream' ? - ** - ** Determine the minimum of the amount of data - ** available and the amount of space in which to - ** put it. - ** - ** 1. Get the packet length by masking 'len' - ** for only the length bits. - ** 2. Available space is [buffer size] - [space used] - ** - ** Transfer count is the minimum of packet length - ** and available space. - */ - - transCount = tty_buffer_request_room(TtyP, readb(&PacketP->len) & PKT_LEN_MASK); - rio_dprintk(RIO_DEBUG_REC, "port %d: Copy %d bytes\n", PortP->PortNum, transCount); - /* - ** To use the following 'kkprintfs' for debugging - change the '#undef' - ** to '#define', (this is the only place ___DEBUG_IT___ occurs in the - ** driver). - */ - ptr = (unsigned char __iomem *) PacketP->data + PortP->RxDataStart; - - tty_prepare_flip_string(TtyP, &buf, transCount); - rio_memcpy_fromio(buf, ptr, transCount); - PortP->RxDataStart += transCount; - writeb(readb(&PacketP->len)-transCount, &PacketP->len); - copied += transCount; - - - - if (readb(&PacketP->len) == 0) { - /* - ** If we have emptied the packet, then we can - ** free it, and reset the start pointer for - ** the next packet. - */ - remove_receive(PortP); - put_free_end(PortP->HostP, PacketP); - PortP->RxDataStart = 0; - } - } - } - if (copied) { - rio_dprintk(RIO_DEBUG_REC, "port %d: pushing tty flip buffer: %d total bytes copied.\n", PortP->PortNum, copied); - tty_flip_buffer_push(TtyP); - } - - return; -} - diff --git a/drivers/staging/generic_serial/rio/rioioctl.h b/drivers/staging/generic_serial/rio/rioioctl.h deleted file mode 100644 index e8af5b3..0000000 --- a/drivers/staging/generic_serial/rio/rioioctl.h +++ /dev/null @@ -1,57 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioioctl.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:13 -** Retrieved : 11/6/98 11:34:22 -** -** ident @(#)rioioctl.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rioioctl_h__ -#define __rioioctl_h__ - -/* -** RIO device driver - user ioctls and associated structures. -*/ - -struct portStats { - int port; - int gather; - unsigned long txchars; - unsigned long rxchars; - unsigned long opens; - unsigned long closes; - unsigned long ioctls; -}; - -#define RIOC ('R'<<8)|('i'<<16)|('o'<<24) - -#define RIO_QUICK_CHECK (RIOC | 105) -#define RIO_GATHER_PORT_STATS (RIOC | 193) -#define RIO_RESET_PORT_STATS (RIOC | 194) -#define RIO_GET_PORT_STATS (RIOC | 195) - -#endif /* __rioioctl_h__ */ diff --git a/drivers/staging/generic_serial/rio/rioparam.c b/drivers/staging/generic_serial/rio/rioparam.c deleted file mode 100644 index 6415f3f..0000000 --- a/drivers/staging/generic_serial/rio/rioparam.c +++ /dev/null @@ -1,663 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioparam.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:45 -** Retrieved : 11/6/98 10:33:50 -** -** ident @(#)rioparam.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "param.h" - - - -/* -** The Scam, based on email from jeremyr@bugs.specialix.co.uk.... -** -** To send a command on a particular port, you put a packet with the -** command bit set onto the port. The command bit is in the len field, -** and gets ORed in with the actual byte count. -** -** When you send a packet with the command bit set the first -** data byte (data[0]) is interpreted as the command to execute. -** It also governs what data structure overlay should accompany the packet. -** Commands are defined in cirrus/cirrus.h -** -** If you want the command to pre-emt data already on the queue for the -** port, set the pre-emptive bit in conjunction with the command bit. -** It is not defined what will happen if you set the preemptive bit -** on a packet that is NOT a command. -** -** Pre-emptive commands should be queued at the head of the queue using -** add_start(), whereas normal commands and data are enqueued using -** add_end(). -** -** Most commands do not use the remaining bytes in the data array. The -** exceptions are OPEN MOPEN and CONFIG. (NB. As with the SI CONFIG and -** OPEN are currently analogous). With these three commands the following -** 11 data bytes are all used to pass config information such as baud rate etc. -** The fields are also defined in cirrus.h. Some contain straightforward -** information such as the transmit XON character. Two contain the transmit and -** receive baud rates respectively. For most baud rates there is a direct -** mapping between the rates defined in and the byte in the -** packet. There are additional (non UNIX-standard) rates defined in -** /u/dos/rio/cirrus/h/brates.h. -** -** The rest of the data fields contain approximations to the Cirrus registers -** that are used to program number of bits etc. Each registers bit fields is -** defined in cirrus.h. -** -** NB. Only use those bits that are defined as being driver specific -** or common to the RTA and the driver. -** -** All commands going from RTA->Host will be dealt with by the Host code - you -** will never see them. As with the SI there will be three fields to look out -** for in each phb (not yet defined - needs defining a.s.a.p). -** -** modem_status - current state of handshake pins. -** -** port_status - current port status - equivalent to hi_stat for SI, indicates -** if port is IDLE_OPEN, IDLE_CLOSED etc. -** -** break_status - bit X set if break has been received. -** -** Happy hacking. -** -*/ - -/* -** RIOParam is used to open or configure a port. You pass it a PortP, -** which will have a tty struct attached to it. You also pass a command, -** either OPEN or CONFIG. The port's setup is taken from the t_ fields -** of the tty struct inside the PortP, and the port is either opened -** or re-configured. You must also tell RIOParam if the device is a modem -** device or not (i.e. top bit of minor number set or clear - take special -** care when deciding on this!). -** RIOParam neither flushes nor waits for drain, and is NOT preemptive. -** -** RIOParam assumes it will be called at splrio(), and also assumes -** that CookMode is set correctly in the port structure. -** -** NB. for MPX -** tty lock must NOT have been previously acquired. -*/ -int RIOParam(struct Port *PortP, int cmd, int Modem, int SleepFlag) -{ - struct tty_struct *TtyP; - int retval; - struct phb_param __iomem *phb_param_ptr; - struct PKT __iomem *PacketP; - int res; - u8 Cor1 = 0, Cor2 = 0, Cor4 = 0, Cor5 = 0; - u8 TxXon = 0, TxXoff = 0, RxXon = 0, RxXoff = 0; - u8 LNext = 0, TxBaud = 0, RxBaud = 0; - int retries = 0xff; - unsigned long flags; - - func_enter(); - - TtyP = PortP->gs.port.tty; - - rio_dprintk(RIO_DEBUG_PARAM, "RIOParam: Port:%d cmd:%d Modem:%d SleepFlag:%d Mapped: %d, tty=%p\n", PortP->PortNum, cmd, Modem, SleepFlag, PortP->Mapped, TtyP); - - if (!TtyP) { - rio_dprintk(RIO_DEBUG_PARAM, "Can't call rioparam with null tty.\n"); - - func_exit(); - - return RIO_FAIL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - - if (cmd == RIOC_OPEN) { - /* - ** If the port is set to store or lock the parameters, and it is - ** paramed with OPEN, we want to restore the saved port termio, but - ** only if StoredTermio has been saved, i.e. NOT 1st open after reboot. - */ - } - - /* - ** wait for space - */ - while (!(res = can_add_transmit(&PacketP, PortP)) || (PortP->InUse != NOT_INUSE)) { - if (retries-- <= 0) { - break; - } - if (PortP->InUse != NOT_INUSE) { - rio_dprintk(RIO_DEBUG_PARAM, "Port IN_USE for pre-emptive command\n"); - } - - if (!res) { - rio_dprintk(RIO_DEBUG_PARAM, "Port has no space on transmit queue\n"); - } - - if (SleepFlag != OK_TO_SLEEP) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - - return RIO_FAIL; - } - - rio_dprintk(RIO_DEBUG_PARAM, "wait for can_add_transmit\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - retval = RIODelay(PortP, HUNDRED_MS); - rio_spin_lock_irqsave(&PortP->portSem, flags); - if (retval == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_PARAM, "wait for can_add_transmit broken by signal\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - return -EINTR; - } - if (PortP->State & RIO_DELETED) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - return 0; - } - } - - if (!res) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - - return RIO_FAIL; - } - - rio_dprintk(RIO_DEBUG_PARAM, "can_add_transmit() returns %x\n", res); - rio_dprintk(RIO_DEBUG_PARAM, "Packet is %p\n", PacketP); - - phb_param_ptr = (struct phb_param __iomem *) PacketP->data; - - - switch (TtyP->termios->c_cflag & CSIZE) { - case CS5: - { - rio_dprintk(RIO_DEBUG_PARAM, "5 bit data\n"); - Cor1 |= RIOC_COR1_5BITS; - break; - } - case CS6: - { - rio_dprintk(RIO_DEBUG_PARAM, "6 bit data\n"); - Cor1 |= RIOC_COR1_6BITS; - break; - } - case CS7: - { - rio_dprintk(RIO_DEBUG_PARAM, "7 bit data\n"); - Cor1 |= RIOC_COR1_7BITS; - break; - } - case CS8: - { - rio_dprintk(RIO_DEBUG_PARAM, "8 bit data\n"); - Cor1 |= RIOC_COR1_8BITS; - break; - } - } - - if (TtyP->termios->c_cflag & CSTOPB) { - rio_dprintk(RIO_DEBUG_PARAM, "2 stop bits\n"); - Cor1 |= RIOC_COR1_2STOP; - } else { - rio_dprintk(RIO_DEBUG_PARAM, "1 stop bit\n"); - Cor1 |= RIOC_COR1_1STOP; - } - - if (TtyP->termios->c_cflag & PARENB) { - rio_dprintk(RIO_DEBUG_PARAM, "Enable parity\n"); - Cor1 |= RIOC_COR1_NORMAL; - } else { - rio_dprintk(RIO_DEBUG_PARAM, "Disable parity\n"); - Cor1 |= RIOC_COR1_NOP; - } - if (TtyP->termios->c_cflag & PARODD) { - rio_dprintk(RIO_DEBUG_PARAM, "Odd parity\n"); - Cor1 |= RIOC_COR1_ODD; - } else { - rio_dprintk(RIO_DEBUG_PARAM, "Even parity\n"); - Cor1 |= RIOC_COR1_EVEN; - } - - /* - ** COR 2 - */ - if (TtyP->termios->c_iflag & IXON) { - rio_dprintk(RIO_DEBUG_PARAM, "Enable start/stop output control\n"); - Cor2 |= RIOC_COR2_IXON; - } else { - if (PortP->Config & RIO_IXON) { - rio_dprintk(RIO_DEBUG_PARAM, "Force enable start/stop output control\n"); - Cor2 |= RIOC_COR2_IXON; - } else - rio_dprintk(RIO_DEBUG_PARAM, "IXON has been disabled.\n"); - } - - if (TtyP->termios->c_iflag & IXANY) { - if (PortP->Config & RIO_IXANY) { - rio_dprintk(RIO_DEBUG_PARAM, "Enable any key to restart output\n"); - Cor2 |= RIOC_COR2_IXANY; - } else - rio_dprintk(RIO_DEBUG_PARAM, "IXANY has been disabled due to sanity reasons.\n"); - } - - if (TtyP->termios->c_iflag & IXOFF) { - rio_dprintk(RIO_DEBUG_PARAM, "Enable start/stop input control 2\n"); - Cor2 |= RIOC_COR2_IXOFF; - } - - if (TtyP->termios->c_cflag & HUPCL) { - rio_dprintk(RIO_DEBUG_PARAM, "Hangup on last close\n"); - Cor2 |= RIOC_COR2_HUPCL; - } - - if (C_CRTSCTS(TtyP)) { - rio_dprintk(RIO_DEBUG_PARAM, "Rx hardware flow control enabled\n"); - Cor2 |= RIOC_COR2_CTSFLOW; - Cor2 |= RIOC_COR2_RTSFLOW; - } else { - rio_dprintk(RIO_DEBUG_PARAM, "Rx hardware flow control disabled\n"); - Cor2 &= ~RIOC_COR2_CTSFLOW; - Cor2 &= ~RIOC_COR2_RTSFLOW; - } - - - if (TtyP->termios->c_cflag & CLOCAL) { - rio_dprintk(RIO_DEBUG_PARAM, "Local line\n"); - } else { - rio_dprintk(RIO_DEBUG_PARAM, "Possible Modem line\n"); - } - - /* - ** COR 4 (there is no COR 3) - */ - if (TtyP->termios->c_iflag & IGNBRK) { - rio_dprintk(RIO_DEBUG_PARAM, "Ignore break condition\n"); - Cor4 |= RIOC_COR4_IGNBRK; - } - if (!(TtyP->termios->c_iflag & BRKINT)) { - rio_dprintk(RIO_DEBUG_PARAM, "Break generates NULL condition\n"); - Cor4 |= RIOC_COR4_NBRKINT; - } else { - rio_dprintk(RIO_DEBUG_PARAM, "Interrupt on break condition\n"); - } - - if (TtyP->termios->c_iflag & INLCR) { - rio_dprintk(RIO_DEBUG_PARAM, "Map newline to carriage return on input\n"); - Cor4 |= RIOC_COR4_INLCR; - } - - if (TtyP->termios->c_iflag & IGNCR) { - rio_dprintk(RIO_DEBUG_PARAM, "Ignore carriage return on input\n"); - Cor4 |= RIOC_COR4_IGNCR; - } - - if (TtyP->termios->c_iflag & ICRNL) { - rio_dprintk(RIO_DEBUG_PARAM, "Map carriage return to newline on input\n"); - Cor4 |= RIOC_COR4_ICRNL; - } - if (TtyP->termios->c_iflag & IGNPAR) { - rio_dprintk(RIO_DEBUG_PARAM, "Ignore characters with parity errors\n"); - Cor4 |= RIOC_COR4_IGNPAR; - } - if (TtyP->termios->c_iflag & PARMRK) { - rio_dprintk(RIO_DEBUG_PARAM, "Mark parity errors\n"); - Cor4 |= RIOC_COR4_PARMRK; - } - - /* - ** Set the RAISEMOD flag to ensure that the modem lines are raised - ** on reception of a config packet. - ** The download code handles the zero baud condition. - */ - Cor4 |= RIOC_COR4_RAISEMOD; - - /* - ** COR 5 - */ - - Cor5 = RIOC_COR5_CMOE; - - /* - ** Set to monitor tbusy/tstop (or not). - */ - - if (PortP->MonitorTstate) - Cor5 |= RIOC_COR5_TSTATE_ON; - else - Cor5 |= RIOC_COR5_TSTATE_OFF; - - /* - ** Could set LNE here if you wanted LNext processing. SVR4 will use it. - */ - if (TtyP->termios->c_iflag & ISTRIP) { - rio_dprintk(RIO_DEBUG_PARAM, "Strip input characters\n"); - if (!(PortP->State & RIO_TRIAD_MODE)) { - Cor5 |= RIOC_COR5_ISTRIP; - } - } - - if (TtyP->termios->c_oflag & ONLCR) { - rio_dprintk(RIO_DEBUG_PARAM, "Map newline to carriage-return, newline on output\n"); - if (PortP->CookMode == COOK_MEDIUM) - Cor5 |= RIOC_COR5_ONLCR; - } - if (TtyP->termios->c_oflag & OCRNL) { - rio_dprintk(RIO_DEBUG_PARAM, "Map carriage return to newline on output\n"); - if (PortP->CookMode == COOK_MEDIUM) - Cor5 |= RIOC_COR5_OCRNL; - } - if ((TtyP->termios->c_oflag & TABDLY) == TAB3) { - rio_dprintk(RIO_DEBUG_PARAM, "Tab delay 3 set\n"); - if (PortP->CookMode == COOK_MEDIUM) - Cor5 |= RIOC_COR5_TAB3; - } - - /* - ** Flow control bytes. - */ - TxXon = TtyP->termios->c_cc[VSTART]; - TxXoff = TtyP->termios->c_cc[VSTOP]; - RxXon = TtyP->termios->c_cc[VSTART]; - RxXoff = TtyP->termios->c_cc[VSTOP]; - /* - ** LNEXT byte - */ - LNext = 0; - - /* - ** Baud rate bytes - */ - rio_dprintk(RIO_DEBUG_PARAM, "Mapping of rx/tx baud %x (%x)\n", TtyP->termios->c_cflag, CBAUD); - - switch (TtyP->termios->c_cflag & CBAUD) { -#define e(b) case B ## b : RxBaud = TxBaud = RIO_B ## b ;break - e(50); - e(75); - e(110); - e(134); - e(150); - e(200); - e(300); - e(600); - e(1200); - e(1800); - e(2400); - e(4800); - e(9600); - e(19200); - e(38400); - e(57600); - e(115200); /* e(230400);e(460800); e(921600); */ - } - - rio_dprintk(RIO_DEBUG_PARAM, "tx baud 0x%x, rx baud 0x%x\n", TxBaud, RxBaud); - - - /* - ** Leftovers - */ - if (TtyP->termios->c_cflag & CREAD) - rio_dprintk(RIO_DEBUG_PARAM, "Enable receiver\n"); -#ifdef RCV1EN - if (TtyP->termios->c_cflag & RCV1EN) - rio_dprintk(RIO_DEBUG_PARAM, "RCV1EN (?)\n"); -#endif -#ifdef XMT1EN - if (TtyP->termios->c_cflag & XMT1EN) - rio_dprintk(RIO_DEBUG_PARAM, "XMT1EN (?)\n"); -#endif - if (TtyP->termios->c_lflag & ISIG) - rio_dprintk(RIO_DEBUG_PARAM, "Input character signal generating enabled\n"); - if (TtyP->termios->c_lflag & ICANON) - rio_dprintk(RIO_DEBUG_PARAM, "Canonical input: erase and kill enabled\n"); - if (TtyP->termios->c_lflag & XCASE) - rio_dprintk(RIO_DEBUG_PARAM, "Canonical upper/lower presentation\n"); - if (TtyP->termios->c_lflag & ECHO) - rio_dprintk(RIO_DEBUG_PARAM, "Enable input echo\n"); - if (TtyP->termios->c_lflag & ECHOE) - rio_dprintk(RIO_DEBUG_PARAM, "Enable echo erase\n"); - if (TtyP->termios->c_lflag & ECHOK) - rio_dprintk(RIO_DEBUG_PARAM, "Enable echo kill\n"); - if (TtyP->termios->c_lflag & ECHONL) - rio_dprintk(RIO_DEBUG_PARAM, "Enable echo newline\n"); - if (TtyP->termios->c_lflag & NOFLSH) - rio_dprintk(RIO_DEBUG_PARAM, "Disable flush after interrupt or quit\n"); -#ifdef TOSTOP - if (TtyP->termios->c_lflag & TOSTOP) - rio_dprintk(RIO_DEBUG_PARAM, "Send SIGTTOU for background output\n"); -#endif -#ifdef XCLUDE - if (TtyP->termios->c_lflag & XCLUDE) - rio_dprintk(RIO_DEBUG_PARAM, "Exclusive use of this line\n"); -#endif - if (TtyP->termios->c_iflag & IUCLC) - rio_dprintk(RIO_DEBUG_PARAM, "Map uppercase to lowercase on input\n"); - if (TtyP->termios->c_oflag & OPOST) - rio_dprintk(RIO_DEBUG_PARAM, "Enable output post-processing\n"); - if (TtyP->termios->c_oflag & OLCUC) - rio_dprintk(RIO_DEBUG_PARAM, "Map lowercase to uppercase on output\n"); - if (TtyP->termios->c_oflag & ONOCR) - rio_dprintk(RIO_DEBUG_PARAM, "No carriage return output at column 0\n"); - if (TtyP->termios->c_oflag & ONLRET) - rio_dprintk(RIO_DEBUG_PARAM, "Newline performs carriage return function\n"); - if (TtyP->termios->c_oflag & OFILL) - rio_dprintk(RIO_DEBUG_PARAM, "Use fill characters for delay\n"); - if (TtyP->termios->c_oflag & OFDEL) - rio_dprintk(RIO_DEBUG_PARAM, "Fill character is DEL\n"); - if (TtyP->termios->c_oflag & NLDLY) - rio_dprintk(RIO_DEBUG_PARAM, "Newline delay set\n"); - if (TtyP->termios->c_oflag & CRDLY) - rio_dprintk(RIO_DEBUG_PARAM, "Carriage return delay set\n"); - if (TtyP->termios->c_oflag & TABDLY) - rio_dprintk(RIO_DEBUG_PARAM, "Tab delay set\n"); - /* - ** These things are kind of useful in a later life! - */ - PortP->Cor2Copy = Cor2; - - if (PortP->State & RIO_DELETED) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - - return RIO_FAIL; - } - - /* - ** Actually write the info into the packet to be sent - */ - writeb(cmd, &phb_param_ptr->Cmd); - writeb(Cor1, &phb_param_ptr->Cor1); - writeb(Cor2, &phb_param_ptr->Cor2); - writeb(Cor4, &phb_param_ptr->Cor4); - writeb(Cor5, &phb_param_ptr->Cor5); - writeb(TxXon, &phb_param_ptr->TxXon); - writeb(RxXon, &phb_param_ptr->RxXon); - writeb(TxXoff, &phb_param_ptr->TxXoff); - writeb(RxXoff, &phb_param_ptr->RxXoff); - writeb(LNext, &phb_param_ptr->LNext); - writeb(TxBaud, &phb_param_ptr->TxBaud); - writeb(RxBaud, &phb_param_ptr->RxBaud); - - /* - ** Set the length/command field - */ - writeb(12 | PKT_CMD_BIT, &PacketP->len); - - /* - ** The packet is formed - now, whack it off - ** to its final destination: - */ - add_transmit(PortP); - /* - ** Count characters transmitted for port statistics reporting - */ - if (PortP->statsGather) - PortP->txchars += 12; - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - - rio_dprintk(RIO_DEBUG_PARAM, "add_transmit returned.\n"); - /* - ** job done. - */ - func_exit(); - - return 0; -} - - -/* -** We can add another packet to a transmit queue if the packet pointer pointed -** to by the TxAdd pointer has PKT_IN_USE clear in its address. -*/ -int can_add_transmit(struct PKT __iomem **PktP, struct Port *PortP) -{ - struct PKT __iomem *tp; - - *PktP = tp = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->TxAdd)); - - return !((unsigned long) tp & PKT_IN_USE); -} - -/* -** To add a packet to the queue, you set the PKT_IN_USE bit in the address, -** and then move the TxAdd pointer along one position to point to the next -** packet pointer. You must wrap the pointer from the end back to the start. -*/ -void add_transmit(struct Port *PortP) -{ - if (readw(PortP->TxAdd) & PKT_IN_USE) { - rio_dprintk(RIO_DEBUG_PARAM, "add_transmit: Packet has been stolen!"); - } - writew(readw(PortP->TxAdd) | PKT_IN_USE, PortP->TxAdd); - PortP->TxAdd = (PortP->TxAdd == PortP->TxEnd) ? PortP->TxStart : PortP->TxAdd + 1; - writew(RIO_OFF(PortP->Caddr, PortP->TxAdd), &PortP->PhbP->tx_add); -} - -/**************************************** - * Put a packet onto the end of the - * free list - ****************************************/ -void put_free_end(struct Host *HostP, struct PKT __iomem *PktP) -{ - struct rio_free_list __iomem *tmp_pointer; - unsigned short old_end, new_end; - unsigned long flags; - - rio_spin_lock_irqsave(&HostP->HostLock, flags); - - /************************************************* - * Put a packet back onto the back of the free list - * - ************************************************/ - - rio_dprintk(RIO_DEBUG_PFE, "put_free_end(PktP=%p)\n", PktP); - - if ((old_end = readw(&HostP->ParmMapP->free_list_end)) != TPNULL) { - new_end = RIO_OFF(HostP->Caddr, PktP); - tmp_pointer = (struct rio_free_list __iomem *) RIO_PTR(HostP->Caddr, old_end); - writew(new_end, &tmp_pointer->next); - writew(old_end, &((struct rio_free_list __iomem *) PktP)->prev); - writew(TPNULL, &((struct rio_free_list __iomem *) PktP)->next); - writew(new_end, &HostP->ParmMapP->free_list_end); - } else { /* First packet on the free list this should never happen! */ - rio_dprintk(RIO_DEBUG_PFE, "put_free_end(): This should never happen\n"); - writew(RIO_OFF(HostP->Caddr, PktP), &HostP->ParmMapP->free_list_end); - tmp_pointer = (struct rio_free_list __iomem *) PktP; - writew(TPNULL, &tmp_pointer->prev); - writew(TPNULL, &tmp_pointer->next); - } - rio_dprintk(RIO_DEBUG_CMD, "Before unlock: %p\n", &HostP->HostLock); - rio_spin_unlock_irqrestore(&HostP->HostLock, flags); -} - -/* -** can_remove_receive(PktP,P) returns non-zero if PKT_IN_USE is set -** for the next packet on the queue. It will also set PktP to point to the -** relevant packet, [having cleared the PKT_IN_USE bit]. If PKT_IN_USE is clear, -** then can_remove_receive() returns 0. -*/ -int can_remove_receive(struct PKT __iomem **PktP, struct Port *PortP) -{ - if (readw(PortP->RxRemove) & PKT_IN_USE) { - *PktP = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->RxRemove) & ~PKT_IN_USE); - return 1; - } - return 0; -} - -/* -** To remove a packet from the receive queue you clear its PKT_IN_USE bit, -** and then bump the pointers. Once the pointers get to the end, they must -** be wrapped back to the start. -*/ -void remove_receive(struct Port *PortP) -{ - writew(readw(PortP->RxRemove) & ~PKT_IN_USE, PortP->RxRemove); - PortP->RxRemove = (PortP->RxRemove == PortP->RxEnd) ? PortP->RxStart : PortP->RxRemove + 1; - writew(RIO_OFF(PortP->Caddr, PortP->RxRemove), &PortP->PhbP->rx_remove); -} diff --git a/drivers/staging/generic_serial/rio/rioroute.c b/drivers/staging/generic_serial/rio/rioroute.c deleted file mode 100644 index 8757378..0000000 --- a/drivers/staging/generic_serial/rio/rioroute.c +++ /dev/null @@ -1,1039 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : rioroute.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:46 -** Retrieved : 11/6/98 10:33:50 -** -** ident @(#)rioroute.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "param.h" - -static int RIOCheckIsolated(struct rio_info *, struct Host *, unsigned int); -static int RIOIsolate(struct rio_info *, struct Host *, unsigned int); -static int RIOCheck(struct Host *, unsigned int); -static void RIOConCon(struct rio_info *, struct Host *, unsigned int, unsigned int, unsigned int, unsigned int, int); - - -/* -** Incoming on the ROUTE_RUP -** I wrote this while I was tired. Forgive me. -*/ -int RIORouteRup(struct rio_info *p, unsigned int Rup, struct Host *HostP, struct PKT __iomem * PacketP) -{ - struct PktCmd __iomem *PktCmdP = (struct PktCmd __iomem *) PacketP->data; - struct PktCmd_M *PktReplyP; - struct CmdBlk *CmdBlkP; - struct Port *PortP; - struct Map *MapP; - struct Top *TopP; - int ThisLink, ThisLinkMin, ThisLinkMax; - int port; - int Mod, Mod1, Mod2; - unsigned short RtaType; - unsigned int RtaUniq; - unsigned int ThisUnit, ThisUnit2; /* 2 ids to accommodate 16 port RTA */ - unsigned int OldUnit, NewUnit, OldLink, NewLink; - char *MyType, *MyName; - int Lies; - unsigned long flags; - - /* - ** Is this unit telling us it's current link topology? - */ - if (readb(&PktCmdP->Command) == ROUTE_TOPOLOGY) { - MapP = HostP->Mapping; - - /* - ** The packet can be sent either by the host or by an RTA. - ** If it comes from the host, then we need to fill in the - ** Topology array in the host structure. If it came in - ** from an RTA then we need to fill in the Mapping structure's - ** Topology array for the unit. - */ - if (Rup >= (unsigned short) MAX_RUP) { - ThisUnit = HOST_ID; - TopP = HostP->Topology; - MyType = "Host"; - MyName = HostP->Name; - ThisLinkMin = ThisLinkMax = Rup - MAX_RUP; - } else { - ThisUnit = Rup + 1; - TopP = HostP->Mapping[Rup].Topology; - MyType = "RTA"; - MyName = HostP->Mapping[Rup].Name; - ThisLinkMin = 0; - ThisLinkMax = LINKS_PER_UNIT - 1; - } - - /* - ** Lies will not be tolerated. - ** If any pair of links claim to be connected to the same - ** place, then ignore this packet completely. - */ - Lies = 0; - for (ThisLink = ThisLinkMin + 1; ThisLink <= ThisLinkMax; ThisLink++) { - /* - ** it won't lie about network interconnect, total disconnects - ** and no-IDs. (or at least, it doesn't *matter* if it does) - */ - if (readb(&PktCmdP->RouteTopology[ThisLink].Unit) > (unsigned short) MAX_RUP) - continue; - - for (NewLink = ThisLinkMin; NewLink < ThisLink; NewLink++) { - if ((readb(&PktCmdP->RouteTopology[ThisLink].Unit) == readb(&PktCmdP->RouteTopology[NewLink].Unit)) && (readb(&PktCmdP->RouteTopology[ThisLink].Link) == readb(&PktCmdP->RouteTopology[NewLink].Link))) { - Lies++; - } - } - } - - if (Lies) { - rio_dprintk(RIO_DEBUG_ROUTE, "LIES! DAMN LIES! %d LIES!\n", Lies); - rio_dprintk(RIO_DEBUG_ROUTE, "%d:%c %d:%c %d:%c %d:%c\n", - readb(&PktCmdP->RouteTopology[0].Unit), - 'A' + readb(&PktCmdP->RouteTopology[0].Link), - readb(&PktCmdP->RouteTopology[1].Unit), - 'A' + readb(&PktCmdP->RouteTopology[1].Link), readb(&PktCmdP->RouteTopology[2].Unit), 'A' + readb(&PktCmdP->RouteTopology[2].Link), readb(&PktCmdP->RouteTopology[3].Unit), 'A' + readb(&PktCmdP->RouteTopology[3].Link)); - return 1; - } - - /* - ** now, process each link. - */ - for (ThisLink = ThisLinkMin; ThisLink <= ThisLinkMax; ThisLink++) { - /* - ** this is what it was connected to - */ - OldUnit = TopP[ThisLink].Unit; - OldLink = TopP[ThisLink].Link; - - /* - ** this is what it is now connected to - */ - NewUnit = readb(&PktCmdP->RouteTopology[ThisLink].Unit); - NewLink = readb(&PktCmdP->RouteTopology[ThisLink].Link); - - if (OldUnit != NewUnit || OldLink != NewLink) { - /* - ** something has changed! - */ - - if (NewUnit > MAX_RUP && NewUnit != ROUTE_DISCONNECT && NewUnit != ROUTE_NO_ID && NewUnit != ROUTE_INTERCONNECT) { - rio_dprintk(RIO_DEBUG_ROUTE, "I have a link from %s %s to unit %d:%d - I don't like it.\n", MyType, MyName, NewUnit, NewLink); - } else { - /* - ** put the new values in - */ - TopP[ThisLink].Unit = NewUnit; - TopP[ThisLink].Link = NewLink; - - RIOSetChange(p); - - if (OldUnit <= MAX_RUP) { - /* - ** If something has become bust, then re-enable them messages - */ - if (!p->RIONoMessage) - RIOConCon(p, HostP, ThisUnit, ThisLink, OldUnit, OldLink, DISCONNECT); - } - - if ((NewUnit <= MAX_RUP) && !p->RIONoMessage) - RIOConCon(p, HostP, ThisUnit, ThisLink, NewUnit, NewLink, CONNECT); - - if (NewUnit == ROUTE_NO_ID) - rio_dprintk(RIO_DEBUG_ROUTE, "%s %s (%c) is connected to an unconfigured unit.\n", MyType, MyName, 'A' + ThisLink); - - if (NewUnit == ROUTE_INTERCONNECT) { - if (!p->RIONoMessage) - printk(KERN_DEBUG "rio: %s '%s' (%c) is connected to another network.\n", MyType, MyName, 'A' + ThisLink); - } - - /* - ** perform an update for 'the other end', so that these messages - ** only appears once. Only disconnect the other end if it is pointing - ** at us! - */ - if (OldUnit == HOST_ID) { - if (HostP->Topology[OldLink].Unit == ThisUnit && HostP->Topology[OldLink].Link == ThisLink) { - rio_dprintk(RIO_DEBUG_ROUTE, "SETTING HOST (%c) TO DISCONNECTED!\n", OldLink + 'A'); - HostP->Topology[OldLink].Unit = ROUTE_DISCONNECT; - HostP->Topology[OldLink].Link = NO_LINK; - } else { - rio_dprintk(RIO_DEBUG_ROUTE, "HOST(%c) WAS NOT CONNECTED TO %s (%c)!\n", OldLink + 'A', HostP->Mapping[ThisUnit - 1].Name, ThisLink + 'A'); - } - } else if (OldUnit <= MAX_RUP) { - if (HostP->Mapping[OldUnit - 1].Topology[OldLink].Unit == ThisUnit && HostP->Mapping[OldUnit - 1].Topology[OldLink].Link == ThisLink) { - rio_dprintk(RIO_DEBUG_ROUTE, "SETTING RTA %s (%c) TO DISCONNECTED!\n", HostP->Mapping[OldUnit - 1].Name, OldLink + 'A'); - HostP->Mapping[OldUnit - 1].Topology[OldLink].Unit = ROUTE_DISCONNECT; - HostP->Mapping[OldUnit - 1].Topology[OldLink].Link = NO_LINK; - } else { - rio_dprintk(RIO_DEBUG_ROUTE, "RTA %s (%c) WAS NOT CONNECTED TO %s (%c)\n", HostP->Mapping[OldUnit - 1].Name, OldLink + 'A', HostP->Mapping[ThisUnit - 1].Name, ThisLink + 'A'); - } - } - if (NewUnit == HOST_ID) { - rio_dprintk(RIO_DEBUG_ROUTE, "MARKING HOST (%c) CONNECTED TO %s (%c)\n", NewLink + 'A', MyName, ThisLink + 'A'); - HostP->Topology[NewLink].Unit = ThisUnit; - HostP->Topology[NewLink].Link = ThisLink; - } else if (NewUnit <= MAX_RUP) { - rio_dprintk(RIO_DEBUG_ROUTE, "MARKING RTA %s (%c) CONNECTED TO %s (%c)\n", HostP->Mapping[NewUnit - 1].Name, NewLink + 'A', MyName, ThisLink + 'A'); - HostP->Mapping[NewUnit - 1].Topology[NewLink].Unit = ThisUnit; - HostP->Mapping[NewUnit - 1].Topology[NewLink].Link = ThisLink; - } - } - RIOSetChange(p); - RIOCheckIsolated(p, HostP, OldUnit); - } - } - return 1; - } - - /* - ** The only other command we recognise is a route_request command - */ - if (readb(&PktCmdP->Command) != ROUTE_REQUEST) { - rio_dprintk(RIO_DEBUG_ROUTE, "Unknown command %d received on rup %d host %p ROUTE_RUP\n", readb(&PktCmdP->Command), Rup, HostP); - return 1; - } - - RtaUniq = (readb(&PktCmdP->UniqNum[0])) + (readb(&PktCmdP->UniqNum[1]) << 8) + (readb(&PktCmdP->UniqNum[2]) << 16) + (readb(&PktCmdP->UniqNum[3]) << 24); - - /* - ** Determine if 8 or 16 port RTA - */ - RtaType = GetUnitType(RtaUniq); - - rio_dprintk(RIO_DEBUG_ROUTE, "Received a request for an ID for serial number %x\n", RtaUniq); - - Mod = readb(&PktCmdP->ModuleTypes); - Mod1 = LONYBLE(Mod); - if (RtaType == TYPE_RTA16) { - /* - ** Only one ident is set for a 16 port RTA. To make compatible - ** with 8 port, set 2nd ident in Mod2 to the same as Mod1. - */ - Mod2 = Mod1; - rio_dprintk(RIO_DEBUG_ROUTE, "Backplane type is %s (all ports)\n", p->RIOModuleTypes[Mod1].Name); - } else { - Mod2 = HINYBLE(Mod); - rio_dprintk(RIO_DEBUG_ROUTE, "Module types are %s (ports 0-3) and %s (ports 4-7)\n", p->RIOModuleTypes[Mod1].Name, p->RIOModuleTypes[Mod2].Name); - } - - /* - ** try to unhook a command block from the command free list. - */ - if (!(CmdBlkP = RIOGetCmdBlk())) { - rio_dprintk(RIO_DEBUG_ROUTE, "No command blocks to route RTA! come back later.\n"); - return 0; - } - - /* - ** Fill in the default info on the command block - */ - CmdBlkP->Packet.dest_unit = Rup; - CmdBlkP->Packet.dest_port = ROUTE_RUP; - CmdBlkP->Packet.src_unit = HOST_ID; - CmdBlkP->Packet.src_port = ROUTE_RUP; - CmdBlkP->Packet.len = PKT_CMD_BIT | 1; - CmdBlkP->PreFuncP = CmdBlkP->PostFuncP = NULL; - PktReplyP = (struct PktCmd_M *) CmdBlkP->Packet.data; - - if (!RIOBootOk(p, HostP, RtaUniq)) { - rio_dprintk(RIO_DEBUG_ROUTE, "RTA %x tried to get an ID, but does not belong - FOAD it!\n", RtaUniq); - PktReplyP->Command = ROUTE_FOAD; - memcpy(PktReplyP->CommandText, "RT_FOAD", 7); - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - return 1; - } - - /* - ** Check to see if the RTA is configured for this host - */ - for (ThisUnit = 0; ThisUnit < MAX_RUP; ThisUnit++) { - rio_dprintk(RIO_DEBUG_ROUTE, "Entry %d Flags=%s %s UniqueNum=0x%x\n", - ThisUnit, HostP->Mapping[ThisUnit].Flags & SLOT_IN_USE ? "Slot-In-Use" : "Not In Use", HostP->Mapping[ThisUnit].Flags & SLOT_TENTATIVE ? "Slot-Tentative" : "Not Tentative", HostP->Mapping[ThisUnit].RtaUniqueNum); - - /* - ** We have an entry for it. - */ - if ((HostP->Mapping[ThisUnit].Flags & (SLOT_IN_USE | SLOT_TENTATIVE)) && (HostP->Mapping[ThisUnit].RtaUniqueNum == RtaUniq)) { - if (RtaType == TYPE_RTA16) { - ThisUnit2 = HostP->Mapping[ThisUnit].ID2 - 1; - rio_dprintk(RIO_DEBUG_ROUTE, "Found unit 0x%x at slots %d+%d\n", RtaUniq, ThisUnit, ThisUnit2); - } else - rio_dprintk(RIO_DEBUG_ROUTE, "Found unit 0x%x at slot %d\n", RtaUniq, ThisUnit); - /* - ** If we have no knowledge of booting it, then the host has - ** been re-booted, and so we must kill the RTA, so that it - ** will be booted again (potentially with new bins) - ** and it will then re-ask for an ID, which we will service. - */ - if ((HostP->Mapping[ThisUnit].Flags & SLOT_IN_USE) && !(HostP->Mapping[ThisUnit].Flags & RTA_BOOTED)) { - if (!(HostP->Mapping[ThisUnit].Flags & MSG_DONE)) { - if (!p->RIONoMessage) - printk(KERN_DEBUG "rio: RTA '%s' is being updated.\n", HostP->Mapping[ThisUnit].Name); - HostP->Mapping[ThisUnit].Flags |= MSG_DONE; - } - PktReplyP->Command = ROUTE_FOAD; - memcpy(PktReplyP->CommandText, "RT_FOAD", 7); - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - return 1; - } - - /* - ** Send the ID (entry) to this RTA. The ID number is implicit as - ** the offset into the table. It is worth noting at this stage - ** that offset zero in the table contains the entries for the - ** RTA with ID 1!!!! - */ - PktReplyP->Command = ROUTE_ALLOCATE; - PktReplyP->IDNum = ThisUnit + 1; - if (RtaType == TYPE_RTA16) { - if (HostP->Mapping[ThisUnit].Flags & SLOT_IN_USE) - /* - ** Adjust the phb and tx pkt dest_units for 2nd block of 8 - ** only if the RTA has ports associated (SLOT_IN_USE) - */ - RIOFixPhbs(p, HostP, ThisUnit2); - PktReplyP->IDNum2 = ThisUnit2 + 1; - rio_dprintk(RIO_DEBUG_ROUTE, "RTA '%s' has been allocated IDs %d+%d\n", HostP->Mapping[ThisUnit].Name, PktReplyP->IDNum, PktReplyP->IDNum2); - } else { - PktReplyP->IDNum2 = ROUTE_NO_ID; - rio_dprintk(RIO_DEBUG_ROUTE, "RTA '%s' has been allocated ID %d\n", HostP->Mapping[ThisUnit].Name, PktReplyP->IDNum); - } - memcpy(PktReplyP->CommandText, "RT_ALLOCAT", 10); - - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - - /* - ** If this is a freshly booted RTA, then we need to re-open - ** the ports, if any where open, so that data may once more - ** flow around the system! - */ - if ((HostP->Mapping[ThisUnit].Flags & RTA_NEWBOOT) && (HostP->Mapping[ThisUnit].SysPort != NO_PORT)) { - /* - ** look at the ports associated with this beast and - ** see if any where open. If they was, then re-open - ** them, using the info from the tty flags. - */ - for (port = 0; port < PORTS_PER_RTA; port++) { - PortP = p->RIOPortp[port + HostP->Mapping[ThisUnit].SysPort]; - if (PortP->State & (RIO_MOPEN | RIO_LOPEN)) { - rio_dprintk(RIO_DEBUG_ROUTE, "Re-opened this port\n"); - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->MagicFlags |= MAGIC_REBOOT; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - } - if (RtaType == TYPE_RTA16) { - for (port = 0; port < PORTS_PER_RTA; port++) { - PortP = p->RIOPortp[port + HostP->Mapping[ThisUnit2].SysPort]; - if (PortP->State & (RIO_MOPEN | RIO_LOPEN)) { - rio_dprintk(RIO_DEBUG_ROUTE, "Re-opened this port\n"); - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->MagicFlags |= MAGIC_REBOOT; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - } - } - } - - /* - ** keep a copy of the module types! - */ - HostP->UnixRups[ThisUnit].ModTypes = Mod; - if (RtaType == TYPE_RTA16) - HostP->UnixRups[ThisUnit2].ModTypes = Mod; - - /* - ** If either of the modules on this unit is read-only or write-only - ** or none-xprint, then we need to transfer that info over to the - ** relevant ports. - */ - if (HostP->Mapping[ThisUnit].SysPort != NO_PORT) { - for (port = 0; port < PORTS_PER_MODULE; port++) { - p->RIOPortp[port + HostP->Mapping[ThisUnit].SysPort]->Config &= ~RIO_NOMASK; - p->RIOPortp[port + HostP->Mapping[ThisUnit].SysPort]->Config |= p->RIOModuleTypes[Mod1].Flags[port]; - p->RIOPortp[port + PORTS_PER_MODULE + HostP->Mapping[ThisUnit].SysPort]->Config &= ~RIO_NOMASK; - p->RIOPortp[port + PORTS_PER_MODULE + HostP->Mapping[ThisUnit].SysPort]->Config |= p->RIOModuleTypes[Mod2].Flags[port]; - } - if (RtaType == TYPE_RTA16) { - for (port = 0; port < PORTS_PER_MODULE; port++) { - p->RIOPortp[port + HostP->Mapping[ThisUnit2].SysPort]->Config &= ~RIO_NOMASK; - p->RIOPortp[port + HostP->Mapping[ThisUnit2].SysPort]->Config |= p->RIOModuleTypes[Mod1].Flags[port]; - p->RIOPortp[port + PORTS_PER_MODULE + HostP->Mapping[ThisUnit2].SysPort]->Config &= ~RIO_NOMASK; - p->RIOPortp[port + PORTS_PER_MODULE + HostP->Mapping[ThisUnit2].SysPort]->Config |= p->RIOModuleTypes[Mod2].Flags[port]; - } - } - } - - /* - ** Job done, get on with the interrupts! - */ - return 1; - } - } - /* - ** There is no table entry for this RTA at all. - ** - ** Lets check to see if we actually booted this unit - if not, - ** then we reset it and it will go round the loop of being booted - ** we can then worry about trying to fit it into the table. - */ - for (ThisUnit = 0; ThisUnit < HostP->NumExtraBooted; ThisUnit++) - if (HostP->ExtraUnits[ThisUnit] == RtaUniq) - break; - if (ThisUnit == HostP->NumExtraBooted && ThisUnit != MAX_EXTRA_UNITS) { - /* - ** if the unit wasn't in the table, and the table wasn't full, then - ** we reset the unit, because we didn't boot it. - ** However, if the table is full, it could be that we did boot - ** this unit, and so we won't reboot it, because it isn't really - ** all that disastrous to keep the old bins in most cases. This - ** is a rather tacky feature, but we are on the edge of reallity - ** here, because the implication is that someone has connected - ** 16+MAX_EXTRA_UNITS onto one host. - */ - static int UnknownMesgDone = 0; - - if (!UnknownMesgDone) { - if (!p->RIONoMessage) - printk(KERN_DEBUG "rio: One or more unknown RTAs are being updated.\n"); - UnknownMesgDone = 1; - } - - PktReplyP->Command = ROUTE_FOAD; - memcpy(PktReplyP->CommandText, "RT_FOAD", 7); - } else { - /* - ** we did boot it (as an extra), and there may now be a table - ** slot free (because of a delete), so we will try to make - ** a tentative entry for it, so that the configurator can see it - ** and fill in the details for us. - */ - if (RtaType == TYPE_RTA16) { - if (RIOFindFreeID(p, HostP, &ThisUnit, &ThisUnit2) == 0) { - RIODefaultName(p, HostP, ThisUnit); - rio_fill_host_slot(ThisUnit, ThisUnit2, RtaUniq, HostP); - } - } else { - if (RIOFindFreeID(p, HostP, &ThisUnit, NULL) == 0) { - RIODefaultName(p, HostP, ThisUnit); - rio_fill_host_slot(ThisUnit, 0, RtaUniq, HostP); - } - } - PktReplyP->Command = ROUTE_USED; - memcpy(PktReplyP->CommandText, "RT_USED", 7); - } - RIOQueueCmdBlk(HostP, Rup, CmdBlkP); - return 1; -} - - -void RIOFixPhbs(struct rio_info *p, struct Host *HostP, unsigned int unit) -{ - unsigned short link, port; - struct Port *PortP; - unsigned long flags; - int PortN = HostP->Mapping[unit].SysPort; - - rio_dprintk(RIO_DEBUG_ROUTE, "RIOFixPhbs unit %d sysport %d\n", unit, PortN); - - if (PortN != -1) { - unsigned short dest_unit = HostP->Mapping[unit].ID2; - - /* - ** Get the link number used for the 1st 8 phbs on this unit. - */ - PortP = p->RIOPortp[HostP->Mapping[dest_unit - 1].SysPort]; - - link = readw(&PortP->PhbP->link); - - for (port = 0; port < PORTS_PER_RTA; port++, PortN++) { - unsigned short dest_port = port + 8; - u16 __iomem *TxPktP; - struct PKT __iomem *Pkt; - - PortP = p->RIOPortp[PortN]; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - /* - ** If RTA is not powered on, the tx packets will be - ** unset, so go no further. - */ - if (!PortP->TxStart) { - rio_dprintk(RIO_DEBUG_ROUTE, "Tx pkts not set up yet\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - break; - } - - /* - ** For the second slot of a 16 port RTA, the driver needs to - ** sort out the phb to port mappings. The dest_unit for this - ** group of 8 phbs is set to the dest_unit of the accompanying - ** 8 port block. The dest_port of the second unit is set to - ** be in the range 8-15 (i.e. 8 is added). Thus, for a 16 port - ** RTA with IDs 5 and 6, traffic bound for port 6 of unit 6 - ** (being the second map ID) will be sent to dest_unit 5, port - ** 14. When this RTA is deleted, dest_unit for ID 6 will be - ** restored, and the dest_port will be reduced by 8. - ** Transmit packets also have a destination field which needs - ** adjusting in the same manner. - ** Note that the unit/port bytes in 'dest' are swapped. - ** We also need to adjust the phb and rup link numbers for the - ** second block of 8 ttys. - */ - for (TxPktP = PortP->TxStart; TxPktP <= PortP->TxEnd; TxPktP++) { - /* - ** *TxPktP is the pointer to the transmit packet on the host - ** card. This needs to be translated into a 32 bit pointer - ** so it can be accessed from the driver. - */ - Pkt = (struct PKT __iomem *) RIO_PTR(HostP->Caddr, readw(TxPktP)); - - /* - ** If the packet is used, reset it. - */ - Pkt = (struct PKT __iomem *) ((unsigned long) Pkt & ~PKT_IN_USE); - writeb(dest_unit, &Pkt->dest_unit); - writeb(dest_port, &Pkt->dest_port); - } - rio_dprintk(RIO_DEBUG_ROUTE, "phb dest: Old %x:%x New %x:%x\n", readw(&PortP->PhbP->destination) & 0xff, (readw(&PortP->PhbP->destination) >> 8) & 0xff, dest_unit, dest_port); - writew(dest_unit + (dest_port << 8), &PortP->PhbP->destination); - writew(link, &PortP->PhbP->link); - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - /* - ** Now make sure the range of ports to be serviced includes - ** the 2nd 8 on this 16 port RTA. - */ - if (link > 3) - return; - if (((unit * 8) + 7) > readw(&HostP->LinkStrP[link].last_port)) { - rio_dprintk(RIO_DEBUG_ROUTE, "last port on host link %d: %d\n", link, (unit * 8) + 7); - writew((unit * 8) + 7, &HostP->LinkStrP[link].last_port); - } - } -} - -/* -** Check to see if the new disconnection has isolated this unit. -** If it has, then invalidate all its link information, and tell -** the world about it. This is done to ensure that the configurator -** only gets up-to-date information about what is going on. -*/ -static int RIOCheckIsolated(struct rio_info *p, struct Host *HostP, unsigned int UnitId) -{ - unsigned long flags; - rio_spin_lock_irqsave(&HostP->HostLock, flags); - - if (RIOCheck(HostP, UnitId)) { - rio_dprintk(RIO_DEBUG_ROUTE, "Unit %d is NOT isolated\n", UnitId); - rio_spin_unlock_irqrestore(&HostP->HostLock, flags); - return (0); - } - - RIOIsolate(p, HostP, UnitId); - RIOSetChange(p); - rio_spin_unlock_irqrestore(&HostP->HostLock, flags); - return 1; -} - -/* -** Invalidate all the link interconnectivity of this unit, and of -** all the units attached to it. This will mean that the entire -** subnet will re-introduce itself. -*/ -static int RIOIsolate(struct rio_info *p, struct Host *HostP, unsigned int UnitId) -{ - unsigned int link, unit; - - UnitId--; /* this trick relies on the Unit Id being UNSIGNED! */ - - if (UnitId >= MAX_RUP) /* dontcha just lurv unsigned maths! */ - return (0); - - if (HostP->Mapping[UnitId].Flags & BEEN_HERE) - return (0); - - HostP->Mapping[UnitId].Flags |= BEEN_HERE; - - if (p->RIOPrintDisabled == DO_PRINT) - rio_dprintk(RIO_DEBUG_ROUTE, "RIOMesgIsolated %s", HostP->Mapping[UnitId].Name); - - for (link = 0; link < LINKS_PER_UNIT; link++) { - unit = HostP->Mapping[UnitId].Topology[link].Unit; - HostP->Mapping[UnitId].Topology[link].Unit = ROUTE_DISCONNECT; - HostP->Mapping[UnitId].Topology[link].Link = NO_LINK; - RIOIsolate(p, HostP, unit); - } - HostP->Mapping[UnitId].Flags &= ~BEEN_HERE; - return 1; -} - -static int RIOCheck(struct Host *HostP, unsigned int UnitId) -{ - unsigned char link; - -/* rio_dprint(RIO_DEBUG_ROUTE, ("Check to see if unit %d has a route to the host\n",UnitId)); */ - rio_dprintk(RIO_DEBUG_ROUTE, "RIOCheck : UnitID = %d\n", UnitId); - - if (UnitId == HOST_ID) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d is NOT isolated - it IS the host!\n", UnitId)); */ - return 1; - } - - UnitId--; - - if (UnitId >= MAX_RUP) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d - ignored.\n", UnitId)); */ - return 0; - } - - for (link = 0; link < LINKS_PER_UNIT; link++) { - if (HostP->Mapping[UnitId].Topology[link].Unit == HOST_ID) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d is connected directly to host via link (%c).\n", - UnitId, 'A'+link)); */ - return 1; - } - } - - if (HostP->Mapping[UnitId].Flags & BEEN_HERE) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Been to Unit %d before - ignoring\n", UnitId)); */ - return 0; - } - - HostP->Mapping[UnitId].Flags |= BEEN_HERE; - - for (link = 0; link < LINKS_PER_UNIT; link++) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d check link (%c)\n", UnitId,'A'+link)); */ - if (RIOCheck(HostP, HostP->Mapping[UnitId].Topology[link].Unit)) { - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d is connected to something that knows the host via link (%c)\n", UnitId,link+'A')); */ - HostP->Mapping[UnitId].Flags &= ~BEEN_HERE; - return 1; - } - } - - HostP->Mapping[UnitId].Flags &= ~BEEN_HERE; - - /* rio_dprint(RIO_DEBUG_ROUTE, ("Unit %d DOESN'T KNOW THE HOST!\n", UnitId)); */ - - return 0; -} - -/* -** Returns the type of unit (host, 16/8 port RTA) -*/ - -unsigned int GetUnitType(unsigned int Uniq) -{ - switch ((Uniq >> 28) & 0xf) { - case RIO_AT: - case RIO_MCA: - case RIO_EISA: - case RIO_PCI: - rio_dprintk(RIO_DEBUG_ROUTE, "Unit type: Host\n"); - return (TYPE_HOST); - case RIO_RTA_16: - rio_dprintk(RIO_DEBUG_ROUTE, "Unit type: 16 port RTA\n"); - return (TYPE_RTA16); - case RIO_RTA: - rio_dprintk(RIO_DEBUG_ROUTE, "Unit type: 8 port RTA\n"); - return (TYPE_RTA8); - default: - rio_dprintk(RIO_DEBUG_ROUTE, "Unit type: Unrecognised\n"); - return (99); - } -} - -int RIOSetChange(struct rio_info *p) -{ - if (p->RIOQuickCheck != NOT_CHANGED) - return (0); - p->RIOQuickCheck = CHANGED; - if (p->RIOSignalProcess) { - rio_dprintk(RIO_DEBUG_ROUTE, "Send SIG-HUP"); - /* - psignal( RIOSignalProcess, SIGHUP ); - */ - } - return (0); -} - -static void RIOConCon(struct rio_info *p, - struct Host *HostP, - unsigned int FromId, - unsigned int FromLink, - unsigned int ToId, - unsigned int ToLink, - int Change) -{ - char *FromName; - char *FromType; - char *ToName; - char *ToType; - unsigned int tp; - -/* -** 15.10.1998 ARG - ESIL 0759 -** (Part) fix for port being trashed when opened whilst RTA "disconnected" -** -** What's this doing in here anyway ? -** It was causing the port to be 'unmapped' if opened whilst RTA "disconnected" -** -** 09.12.1998 ARG - ESIL 0776 - part fix -** Okay, We've found out what this was all about now ! -** Someone had botched this to use RIOHalted to indicated the number of RTAs -** 'disconnected'. The value in RIOHalted was then being used in the -** 'RIO_QUICK_CHECK' ioctl. A none zero value indicating that a least one RTA -** is 'disconnected'. The change was put in to satisfy a customer's needs. -** Having taken this bit of code out 'RIO_QUICK_CHECK' now no longer works for -** the customer. -** - if (Change == CONNECT) { - if (p->RIOHalted) p->RIOHalted --; - } - else { - p->RIOHalted ++; - } -** -** So - we need to implement it slightly differently - a new member of the -** rio_info struct - RIORtaDisCons (RIO RTA connections) keeps track of RTA -** connections and disconnections. -*/ - if (Change == CONNECT) { - if (p->RIORtaDisCons) - p->RIORtaDisCons--; - } else { - p->RIORtaDisCons++; - } - - if (p->RIOPrintDisabled == DONT_PRINT) - return; - - if (FromId > ToId) { - tp = FromId; - FromId = ToId; - ToId = tp; - tp = FromLink; - FromLink = ToLink; - ToLink = tp; - } - - FromName = FromId ? HostP->Mapping[FromId - 1].Name : HostP->Name; - FromType = FromId ? "RTA" : "HOST"; - ToName = ToId ? HostP->Mapping[ToId - 1].Name : HostP->Name; - ToType = ToId ? "RTA" : "HOST"; - - rio_dprintk(RIO_DEBUG_ROUTE, "Link between %s '%s' (%c) and %s '%s' (%c) %s.\n", FromType, FromName, 'A' + FromLink, ToType, ToName, 'A' + ToLink, (Change == CONNECT) ? "established" : "disconnected"); - printk(KERN_DEBUG "rio: Link between %s '%s' (%c) and %s '%s' (%c) %s.\n", FromType, FromName, 'A' + FromLink, ToType, ToName, 'A' + ToLink, (Change == CONNECT) ? "established" : "disconnected"); -} - -/* -** RIORemoveFromSavedTable : -** -** Delete and RTA entry from the saved table given to us -** by the configuration program. -*/ -static int RIORemoveFromSavedTable(struct rio_info *p, struct Map *pMap) -{ - int entry; - - /* - ** We loop for all entries even after finding an entry and - ** zeroing it because we may have two entries to delete if - ** it's a 16 port RTA. - */ - for (entry = 0; entry < TOTAL_MAP_ENTRIES; entry++) { - if (p->RIOSavedTable[entry].RtaUniqueNum == pMap->RtaUniqueNum) { - memset(&p->RIOSavedTable[entry], 0, sizeof(struct Map)); - } - } - return 0; -} - - -/* -** RIOCheckDisconnected : -** -** Scan the unit links to and return zero if the unit is completely -** disconnected. -*/ -static int RIOFreeDisconnected(struct rio_info *p, struct Host *HostP, int unit) -{ - int link; - - - rio_dprintk(RIO_DEBUG_ROUTE, "RIOFreeDisconnect unit %d\n", unit); - /* - ** If the slot is tentative and does not belong to the - ** second half of a 16 port RTA then scan to see if - ** is disconnected. - */ - for (link = 0; link < LINKS_PER_UNIT; link++) { - if (HostP->Mapping[unit].Topology[link].Unit != ROUTE_DISCONNECT) - break; - } - - /* - ** If not all links are disconnected then we can forget about it. - */ - if (link < LINKS_PER_UNIT) - return 1; - -#ifdef NEED_TO_FIX_THIS - /* Ok so all the links are disconnected. But we may have only just - ** made this slot tentative and not yet received a topology update. - ** Lets check how long ago we made it tentative. - */ - rio_dprintk(RIO_DEBUG_ROUTE, "Just about to check LBOLT on entry %d\n", unit); - if (drv_getparm(LBOLT, (ulong_t *) & current_time)) - rio_dprintk(RIO_DEBUG_ROUTE, "drv_getparm(LBOLT,....) Failed.\n"); - - elapse_time = current_time - TentTime[unit]; - rio_dprintk(RIO_DEBUG_ROUTE, "elapse %d = current %d - tent %d (%d usec)\n", elapse_time, current_time, TentTime[unit], drv_hztousec(elapse_time)); - if (drv_hztousec(elapse_time) < WAIT_TO_FINISH) { - rio_dprintk(RIO_DEBUG_ROUTE, "Skipping slot %d, not timed out yet %d\n", unit, drv_hztousec(elapse_time)); - return 1; - } -#endif - - /* - ** We have found an usable slot. - ** If it is half of a 16 port RTA then delete the other half. - */ - if (HostP->Mapping[unit].ID2 != 0) { - int nOther = (HostP->Mapping[unit].ID2) - 1; - - rio_dprintk(RIO_DEBUG_ROUTE, "RioFreedis second slot %d.\n", nOther); - memset(&HostP->Mapping[nOther], 0, sizeof(struct Map)); - } - RIORemoveFromSavedTable(p, &HostP->Mapping[unit]); - - return 0; -} - - -/* -** RIOFindFreeID : -** -** This function scans the given host table for either one -** or two free unit ID's. -*/ - -int RIOFindFreeID(struct rio_info *p, struct Host *HostP, unsigned int * pID1, unsigned int * pID2) -{ - int unit, tempID; - - /* - ** Initialise the ID's to MAX_RUP. - ** We do this to make the loop for setting the ID's as simple as - ** possible. - */ - *pID1 = MAX_RUP; - if (pID2 != NULL) - *pID2 = MAX_RUP; - - /* - ** Scan all entries of the host mapping table for free slots. - ** We scan for free slots first and then if that is not successful - ** we start all over again looking for tentative slots we can re-use. - */ - for (unit = 0; unit < MAX_RUP; unit++) { - rio_dprintk(RIO_DEBUG_ROUTE, "Scanning unit %d\n", unit); - /* - ** If the flags are zero then the slot is empty. - */ - if (HostP->Mapping[unit].Flags == 0) { - rio_dprintk(RIO_DEBUG_ROUTE, " This slot is empty.\n"); - /* - ** If we haven't allocated the first ID then do it now. - */ - if (*pID1 == MAX_RUP) { - rio_dprintk(RIO_DEBUG_ROUTE, "Make tentative entry for first unit %d\n", unit); - *pID1 = unit; - - /* - ** If the second ID is not needed then we can return - ** now. - */ - if (pID2 == NULL) - return 0; - } else { - /* - ** Allocate the second slot and return. - */ - rio_dprintk(RIO_DEBUG_ROUTE, "Make tentative entry for second unit %d\n", unit); - *pID2 = unit; - return 0; - } - } - } - - /* - ** If we manage to come out of the free slot loop then we - ** need to start all over again looking for tentative slots - ** that we can re-use. - */ - rio_dprintk(RIO_DEBUG_ROUTE, "Starting to scan for tentative slots\n"); - for (unit = 0; unit < MAX_RUP; unit++) { - if (((HostP->Mapping[unit].Flags & SLOT_TENTATIVE) || (HostP->Mapping[unit].Flags == 0)) && !(HostP->Mapping[unit].Flags & RTA16_SECOND_SLOT)) { - rio_dprintk(RIO_DEBUG_ROUTE, " Slot %d looks promising.\n", unit); - - if (unit == *pID1) { - rio_dprintk(RIO_DEBUG_ROUTE, " No it isn't, its the 1st half\n"); - continue; - } - - /* - ** Slot is Tentative or Empty, but not a tentative second - ** slot of a 16 porter. - ** Attempt to free up this slot (and its parnter if - ** it is a 16 port slot. The second slot will become - ** empty after a call to RIOFreeDisconnected so thats why - ** we look for empty slots above as well). - */ - if (HostP->Mapping[unit].Flags != 0) - if (RIOFreeDisconnected(p, HostP, unit) != 0) - continue; - /* - ** If we haven't allocated the first ID then do it now. - */ - if (*pID1 == MAX_RUP) { - rio_dprintk(RIO_DEBUG_ROUTE, "Grab tentative entry for first unit %d\n", unit); - *pID1 = unit; - - /* - ** Clear out this slot now that we intend to use it. - */ - memset(&HostP->Mapping[unit], 0, sizeof(struct Map)); - - /* - ** If the second ID is not needed then we can return - ** now. - */ - if (pID2 == NULL) - return 0; - } else { - /* - ** Allocate the second slot and return. - */ - rio_dprintk(RIO_DEBUG_ROUTE, "Grab tentative/empty entry for second unit %d\n", unit); - *pID2 = unit; - - /* - ** Clear out this slot now that we intend to use it. - */ - memset(&HostP->Mapping[unit], 0, sizeof(struct Map)); - - /* At this point under the right(wrong?) conditions - ** we may have a first unit ID being higher than the - ** second unit ID. This is a bad idea if we are about - ** to fill the slots with a 16 port RTA. - ** Better check and swap them over. - */ - - if (*pID1 > *pID2) { - rio_dprintk(RIO_DEBUG_ROUTE, "Swapping IDS %d %d\n", *pID1, *pID2); - tempID = *pID1; - *pID1 = *pID2; - *pID2 = tempID; - } - return 0; - } - } - } - - /* - ** If we manage to get to the end of the second loop then we - ** can give up and return a failure. - */ - return 1; -} - - -/* -** The link switch scenario. -** -** Rta Wun (A) is connected to Tuw (A). -** The tables are all up to date, and the system is OK. -** -** If Wun (A) is now moved to Wun (B) before Wun (A) can -** become disconnected, then the follow happens: -** -** Tuw (A) spots the change of unit:link at the other end -** of its link and Tuw sends a topology packet reflecting -** the change: Tuw (A) now disconnected from Wun (A), and -** this is closely followed by a packet indicating that -** Tuw (A) is now connected to Wun (B). -** -** Wun (B) will spot that it has now become connected, and -** Wun will send a topology packet, which indicates that -** both Wun (A) and Wun (B) is connected to Tuw (A). -** -** Eventually Wun (A) realises that it is now disconnected -** and Wun will send out a topology packet indicating that -** Wun (A) is now disconnected. -*/ diff --git a/drivers/staging/generic_serial/rio/riospace.h b/drivers/staging/generic_serial/rio/riospace.h deleted file mode 100644 index ffb31d4..0000000 --- a/drivers/staging/generic_serial/rio/riospace.h +++ /dev/null @@ -1,154 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riospace.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:13 -** Retrieved : 11/6/98 11:34:22 -** -** ident @(#)riospace.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_riospace_h__ -#define __rio_riospace_h__ - -#define RIO_LOCATOR_LEN 16 -#define MAX_RIO_BOARDS 4 - -/* -** DONT change this file. At all. Unless you can rebuild the entire -** device driver, which you probably can't, then the rest of the -** driver won't see any changes you make here. So don't make any. -** In particular, it won't be able to see changes to RIO_SLOTS -*/ - -struct Conf { - char Locator[24]; - unsigned int StartupTime; - unsigned int SlowCook; - unsigned int IntrPollTime; - unsigned int BreakInterval; - unsigned int Timer; - unsigned int RtaLoadBase; - unsigned int HostLoadBase; - unsigned int XpHz; - unsigned int XpCps; - char *XpOn; - char *XpOff; - unsigned int MaxXpCps; - unsigned int MinXpCps; - unsigned int SpinCmds; - unsigned int FirstAddr; - unsigned int LastAddr; - unsigned int BufferSize; - unsigned int LowWater; - unsigned int LineLength; - unsigned int CmdTime; -}; - -/* -** Board types - these MUST correspond to product codes! -*/ -#define RIO_EMPTY 0x0 -#define RIO_EISA 0x3 -#define RIO_RTA_16 0x9 -#define RIO_AT 0xA -#define RIO_MCA 0xB -#define RIO_PCI 0xD -#define RIO_RTA 0xE - -/* -** Board data structure. This is used for configuration info -*/ -struct Brd { - unsigned char Type; /* RIO_EISA, RIO_MCA, RIO_AT, RIO_EMPTY... */ - unsigned char Ivec; /* POLLED or ivec number */ - unsigned char Mode; /* Control stuff, see below */ -}; - -struct Board { - char Locator[RIO_LOCATOR_LEN]; - int NumSlots; - struct Brd Boards[MAX_RIO_BOARDS]; -}; - -#define BOOT_FROM_LINK 0x00 -#define BOOT_FROM_RAM 0x01 -#define EXTERNAL_BUS_OFF 0x00 -#define EXTERNAL_BUS_ON 0x02 -#define INTERRUPT_DISABLE 0x00 -#define INTERRUPT_ENABLE 0x04 -#define BYTE_OPERATION 0x00 -#define WORD_OPERATION 0x08 -#define POLLED INTERRUPT_DISABLE -#define IRQ_15 (0x00 | INTERRUPT_ENABLE) -#define IRQ_12 (0x10 | INTERRUPT_ENABLE) -#define IRQ_11 (0x20 | INTERRUPT_ENABLE) -#define IRQ_9 (0x30 | INTERRUPT_ENABLE) -#define SLOW_LINKS 0x00 -#define FAST_LINKS 0x40 -#define SLOW_AT_BUS 0x00 -#define FAST_AT_BUS 0x80 -#define SLOW_PCI_TP 0x00 -#define FAST_PCI_TP 0x80 -/* -** Debug levels -*/ -#define DBG_NONE 0x00000000 - -#define DBG_INIT 0x00000001 -#define DBG_OPEN 0x00000002 -#define DBG_CLOSE 0x00000004 -#define DBG_IOCTL 0x00000008 - -#define DBG_READ 0x00000010 -#define DBG_WRITE 0x00000020 -#define DBG_INTR 0x00000040 -#define DBG_PROC 0x00000080 - -#define DBG_PARAM 0x00000100 -#define DBG_CMD 0x00000200 -#define DBG_XPRINT 0x00000400 -#define DBG_POLL 0x00000800 - -#define DBG_DAEMON 0x00001000 -#define DBG_FAIL 0x00002000 -#define DBG_MODEM 0x00004000 -#define DBG_LIST 0x00008000 - -#define DBG_ROUTE 0x00010000 -#define DBG_UTIL 0x00020000 -#define DBG_BOOT 0x00040000 -#define DBG_BUFFER 0x00080000 - -#define DBG_MON 0x00100000 -#define DBG_SPECIAL 0x00200000 -#define DBG_VPIX 0x00400000 -#define DBG_FLUSH 0x00800000 - -#define DBG_QENABLE 0x01000000 - -#define DBG_ALWAYS 0x80000000 - -#endif /* __rio_riospace_h__ */ diff --git a/drivers/staging/generic_serial/rio/riotable.c b/drivers/staging/generic_serial/rio/riotable.c deleted file mode 100644 index 3d15802..0000000 --- a/drivers/staging/generic_serial/rio/riotable.c +++ /dev/null @@ -1,941 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riotable.c -** SID : 1.2 -** Last Modified : 11/6/98 10:33:47 -** Retrieved : 11/6/98 10:33:50 -** -** ident @(#)riotable.c 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "param.h" -#include "protsts.h" - -/* -** A configuration table has been loaded. It is now up to us -** to sort it out and use the information contained therein. -*/ -int RIONewTable(struct rio_info *p) -{ - int Host, Host1, Host2, NameIsUnique, Entry, SubEnt; - struct Map *MapP; - struct Map *HostMapP; - struct Host *HostP; - - char *cptr; - - /* - ** We have been sent a new table to install. We need to break - ** it down into little bits and spread it around a bit to see - ** what we have got. - */ - /* - ** Things to check: - ** (things marked 'xx' aren't checked any more!) - ** (1) That there are no booted Hosts/RTAs out there. - ** (2) That the names are properly formed - ** (3) That blank entries really are. - ** xx (4) That hosts mentioned in the table actually exist. xx - ** (5) That the IDs are unique (per host). - ** (6) That host IDs are zero - ** (7) That port numbers are valid - ** (8) That port numbers aren't duplicated - ** (9) That names aren't duplicated - ** xx (10) That hosts that actually exist are mentioned in the table. xx - */ - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(1)\n"); - if (p->RIOSystemUp) { /* (1) */ - p->RIOError.Error = HOST_HAS_ALREADY_BEEN_BOOTED; - return -EBUSY; - } - - p->RIOError.Error = NOTHING_WRONG_AT_ALL; - p->RIOError.Entry = -1; - p->RIOError.Other = -1; - - for (Entry = 0; Entry < TOTAL_MAP_ENTRIES; Entry++) { - MapP = &p->RIOConnectTable[Entry]; - if ((MapP->Flags & RTA16_SECOND_SLOT) == 0) { - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(2)\n"); - cptr = MapP->Name; /* (2) */ - cptr[MAX_NAME_LEN - 1] = '\0'; - if (cptr[0] == '\0') { - memcpy(MapP->Name, MapP->RtaUniqueNum ? "RTA NN" : "HOST NN", 8); - MapP->Name[5] = '0' + Entry / 10; - MapP->Name[6] = '0' + Entry % 10; - } - while (*cptr) { - if (*cptr < ' ' || *cptr > '~') { - p->RIOError.Error = BAD_CHARACTER_IN_NAME; - p->RIOError.Entry = Entry; - return -ENXIO; - } - cptr++; - } - } - - /* - ** If the entry saved was a tentative entry then just forget - ** about it. - */ - if (MapP->Flags & SLOT_TENTATIVE) { - MapP->HostUniqueNum = 0; - MapP->RtaUniqueNum = 0; - continue; - } - - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(3)\n"); - if (!MapP->RtaUniqueNum && !MapP->HostUniqueNum) { /* (3) */ - if (MapP->ID || MapP->SysPort || MapP->Flags) { - rio_dprintk(RIO_DEBUG_TABLE, "%s pretending to be empty but isn't\n", MapP->Name); - p->RIOError.Error = TABLE_ENTRY_ISNT_PROPERLY_NULL; - p->RIOError.Entry = Entry; - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_TABLE, "!RIO: Daemon: test (3) passes\n"); - continue; - } - - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(4)\n"); - for (Host = 0; Host < p->RIONumHosts; Host++) { /* (4) */ - if (p->RIOHosts[Host].UniqueNum == MapP->HostUniqueNum) { - HostP = &p->RIOHosts[Host]; - /* - ** having done the lookup, we don't really want to do - ** it again, so hang the host number in a safe place - */ - MapP->Topology[0].Unit = Host; - break; - } - } - - if (Host >= p->RIONumHosts) { - rio_dprintk(RIO_DEBUG_TABLE, "RTA %s has unknown host unique number 0x%x\n", MapP->Name, MapP->HostUniqueNum); - MapP->HostUniqueNum = 0; - /* MapP->RtaUniqueNum = 0; */ - /* MapP->ID = 0; */ - /* MapP->Flags = 0; */ - /* MapP->SysPort = 0; */ - /* MapP->Name[0] = 0; */ - continue; - } - - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(5)\n"); - if (MapP->RtaUniqueNum) { /* (5) */ - if (!MapP->ID) { - rio_dprintk(RIO_DEBUG_TABLE, "RIO: RTA %s has been allocated an ID of zero!\n", MapP->Name); - p->RIOError.Error = ZERO_RTA_ID; - p->RIOError.Entry = Entry; - return -ENXIO; - } - if (MapP->ID > MAX_RUP) { - rio_dprintk(RIO_DEBUG_TABLE, "RIO: RTA %s has been allocated an invalid ID %d\n", MapP->Name, MapP->ID); - p->RIOError.Error = ID_NUMBER_OUT_OF_RANGE; - p->RIOError.Entry = Entry; - return -ENXIO; - } - for (SubEnt = 0; SubEnt < Entry; SubEnt++) { - if (MapP->HostUniqueNum == p->RIOConnectTable[SubEnt].HostUniqueNum && MapP->ID == p->RIOConnectTable[SubEnt].ID) { - rio_dprintk(RIO_DEBUG_TABLE, "Dupl. ID number allocated to RTA %s and RTA %s\n", MapP->Name, p->RIOConnectTable[SubEnt].Name); - p->RIOError.Error = DUPLICATED_RTA_ID; - p->RIOError.Entry = Entry; - p->RIOError.Other = SubEnt; - return -ENXIO; - } - /* - ** If the RtaUniqueNum is the same, it may be looking at both - ** entries for a 16 port RTA, so check the ids - */ - if ((MapP->RtaUniqueNum == p->RIOConnectTable[SubEnt].RtaUniqueNum) - && (MapP->ID2 != p->RIOConnectTable[SubEnt].ID)) { - rio_dprintk(RIO_DEBUG_TABLE, "RTA %s has duplicate unique number\n", MapP->Name); - rio_dprintk(RIO_DEBUG_TABLE, "RTA %s has duplicate unique number\n", p->RIOConnectTable[SubEnt].Name); - p->RIOError.Error = DUPLICATE_UNIQUE_NUMBER; - p->RIOError.Entry = Entry; - p->RIOError.Other = SubEnt; - return -ENXIO; - } - } - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(7a)\n"); - /* (7a) */ - if ((MapP->SysPort != NO_PORT) && (MapP->SysPort % PORTS_PER_RTA)) { - rio_dprintk(RIO_DEBUG_TABLE, "TTY Port number %d-RTA %s is not a multiple of %d!\n", (int) MapP->SysPort, MapP->Name, PORTS_PER_RTA); - p->RIOError.Error = TTY_NUMBER_OUT_OF_RANGE; - p->RIOError.Entry = Entry; - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(7b)\n"); - /* (7b) */ - if ((MapP->SysPort != NO_PORT) && (MapP->SysPort >= RIO_PORTS)) { - rio_dprintk(RIO_DEBUG_TABLE, "TTY Port number %d for RTA %s is too big\n", (int) MapP->SysPort, MapP->Name); - p->RIOError.Error = TTY_NUMBER_OUT_OF_RANGE; - p->RIOError.Entry = Entry; - return -ENXIO; - } - for (SubEnt = 0; SubEnt < Entry; SubEnt++) { - if (p->RIOConnectTable[SubEnt].Flags & RTA16_SECOND_SLOT) - continue; - if (p->RIOConnectTable[SubEnt].RtaUniqueNum) { - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(8)\n"); - /* (8) */ - if ((MapP->SysPort != NO_PORT) && (MapP->SysPort == p->RIOConnectTable[SubEnt].SysPort)) { - rio_dprintk(RIO_DEBUG_TABLE, "RTA %s:same TTY port # as RTA %s (%d)\n", MapP->Name, p->RIOConnectTable[SubEnt].Name, (int) MapP->SysPort); - p->RIOError.Error = TTY_NUMBER_IN_USE; - p->RIOError.Entry = Entry; - p->RIOError.Other = SubEnt; - return -ENXIO; - } - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(9)\n"); - if (strcmp(MapP->Name, p->RIOConnectTable[SubEnt].Name) == 0 && !(MapP->Flags & RTA16_SECOND_SLOT)) { /* (9) */ - rio_dprintk(RIO_DEBUG_TABLE, "RTA name %s used twice\n", MapP->Name); - p->RIOError.Error = NAME_USED_TWICE; - p->RIOError.Entry = Entry; - p->RIOError.Other = SubEnt; - return -ENXIO; - } - } - } - } else { /* (6) */ - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: entering(6)\n"); - if (MapP->ID) { - rio_dprintk(RIO_DEBUG_TABLE, "RIO:HOST %s has been allocated ID that isn't zero!\n", MapP->Name); - p->RIOError.Error = HOST_ID_NOT_ZERO; - p->RIOError.Entry = Entry; - return -ENXIO; - } - if (MapP->SysPort != NO_PORT) { - rio_dprintk(RIO_DEBUG_TABLE, "RIO: HOST %s has been allocated port numbers!\n", MapP->Name); - p->RIOError.Error = HOST_SYSPORT_BAD; - p->RIOError.Entry = Entry; - return -ENXIO; - } - } - } - - /* - ** wow! if we get here then it's a goody! - */ - - /* - ** Zero the (old) entries for each host... - */ - for (Host = 0; Host < RIO_HOSTS; Host++) { - for (Entry = 0; Entry < MAX_RUP; Entry++) { - memset(&p->RIOHosts[Host].Mapping[Entry], 0, sizeof(struct Map)); - } - memset(&p->RIOHosts[Host].Name[0], 0, sizeof(p->RIOHosts[Host].Name)); - } - - /* - ** Copy in the new table entries - */ - for (Entry = 0; Entry < TOTAL_MAP_ENTRIES; Entry++) { - rio_dprintk(RIO_DEBUG_TABLE, "RIONewTable: Copy table for Host entry %d\n", Entry); - MapP = &p->RIOConnectTable[Entry]; - - /* - ** Now, if it is an empty slot ignore it! - */ - if (MapP->HostUniqueNum == 0) - continue; - - /* - ** we saved the host number earlier, so grab it back - */ - HostP = &p->RIOHosts[MapP->Topology[0].Unit]; - - /* - ** If it is a host, then we only need to fill in the name field. - */ - if (MapP->ID == 0) { - rio_dprintk(RIO_DEBUG_TABLE, "Host entry found. Name %s\n", MapP->Name); - memcpy(HostP->Name, MapP->Name, MAX_NAME_LEN); - continue; - } - - /* - ** Its an RTA entry, so fill in the host mapping entries for it - ** and the port mapping entries. Notice that entry zero is for - ** ID one. - */ - HostMapP = &HostP->Mapping[MapP->ID - 1]; - - if (MapP->Flags & SLOT_IN_USE) { - rio_dprintk(RIO_DEBUG_TABLE, "Rta entry found. Name %s\n", MapP->Name); - /* - ** structure assign, then sort out the bits we shouldn't have done - */ - *HostMapP = *MapP; - - HostMapP->Flags = SLOT_IN_USE; - if (MapP->Flags & RTA16_SECOND_SLOT) - HostMapP->Flags |= RTA16_SECOND_SLOT; - - RIOReMapPorts(p, HostP, HostMapP); - } else { - rio_dprintk(RIO_DEBUG_TABLE, "TENTATIVE Rta entry found. Name %s\n", MapP->Name); - } - } - - for (Entry = 0; Entry < TOTAL_MAP_ENTRIES; Entry++) { - p->RIOSavedTable[Entry] = p->RIOConnectTable[Entry]; - } - - for (Host = 0; Host < p->RIONumHosts; Host++) { - for (SubEnt = 0; SubEnt < LINKS_PER_UNIT; SubEnt++) { - p->RIOHosts[Host].Topology[SubEnt].Unit = ROUTE_DISCONNECT; - p->RIOHosts[Host].Topology[SubEnt].Link = NO_LINK; - } - for (Entry = 0; Entry < MAX_RUP; Entry++) { - for (SubEnt = 0; SubEnt < LINKS_PER_UNIT; SubEnt++) { - p->RIOHosts[Host].Mapping[Entry].Topology[SubEnt].Unit = ROUTE_DISCONNECT; - p->RIOHosts[Host].Mapping[Entry].Topology[SubEnt].Link = NO_LINK; - } - } - if (!p->RIOHosts[Host].Name[0]) { - memcpy(p->RIOHosts[Host].Name, "HOST 1", 7); - p->RIOHosts[Host].Name[5] += Host; - } - /* - ** Check that default name assigned is unique. - */ - Host1 = Host; - NameIsUnique = 0; - while (!NameIsUnique) { - NameIsUnique = 1; - for (Host2 = 0; Host2 < p->RIONumHosts; Host2++) { - if (Host2 == Host) - continue; - if (strcmp(p->RIOHosts[Host].Name, p->RIOHosts[Host2].Name) - == 0) { - NameIsUnique = 0; - Host1++; - if (Host1 >= p->RIONumHosts) - Host1 = 0; - p->RIOHosts[Host].Name[5] = '1' + Host1; - } - } - } - /* - ** Rename host if name already used. - */ - if (Host1 != Host) { - rio_dprintk(RIO_DEBUG_TABLE, "Default name %s already used\n", p->RIOHosts[Host].Name); - memcpy(p->RIOHosts[Host].Name, "HOST 1", 7); - p->RIOHosts[Host].Name[5] += Host1; - } - rio_dprintk(RIO_DEBUG_TABLE, "Assigning default name %s\n", p->RIOHosts[Host].Name); - } - return 0; -} - -/* -** User process needs the config table - build it from first -** principles. -** -* FIXME: SMP locking -*/ -int RIOApel(struct rio_info *p) -{ - int Host; - int link; - int Rup; - int Next = 0; - struct Map *MapP; - struct Host *HostP; - unsigned long flags; - - rio_dprintk(RIO_DEBUG_TABLE, "Generating a table to return to config.rio\n"); - - memset(&p->RIOConnectTable[0], 0, sizeof(struct Map) * TOTAL_MAP_ENTRIES); - - for (Host = 0; Host < RIO_HOSTS; Host++) { - rio_dprintk(RIO_DEBUG_TABLE, "Processing host %d\n", Host); - HostP = &p->RIOHosts[Host]; - rio_spin_lock_irqsave(&HostP->HostLock, flags); - - MapP = &p->RIOConnectTable[Next++]; - MapP->HostUniqueNum = HostP->UniqueNum; - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) { - rio_spin_unlock_irqrestore(&HostP->HostLock, flags); - continue; - } - MapP->RtaUniqueNum = 0; - MapP->ID = 0; - MapP->Flags = SLOT_IN_USE; - MapP->SysPort = NO_PORT; - for (link = 0; link < LINKS_PER_UNIT; link++) - MapP->Topology[link] = HostP->Topology[link]; - memcpy(MapP->Name, HostP->Name, MAX_NAME_LEN); - for (Rup = 0; Rup < MAX_RUP; Rup++) { - if (HostP->Mapping[Rup].Flags & (SLOT_IN_USE | SLOT_TENTATIVE)) { - p->RIOConnectTable[Next] = HostP->Mapping[Rup]; - if (HostP->Mapping[Rup].Flags & SLOT_IN_USE) - p->RIOConnectTable[Next].Flags |= SLOT_IN_USE; - if (HostP->Mapping[Rup].Flags & SLOT_TENTATIVE) - p->RIOConnectTable[Next].Flags |= SLOT_TENTATIVE; - if (HostP->Mapping[Rup].Flags & RTA16_SECOND_SLOT) - p->RIOConnectTable[Next].Flags |= RTA16_SECOND_SLOT; - Next++; - } - } - rio_spin_unlock_irqrestore(&HostP->HostLock, flags); - } - return 0; -} - -/* -** config.rio has taken a dislike to one of the gross maps entries. -** if the entry is suitably inactive, then we can gob on it and remove -** it from the table. -*/ -int RIODeleteRta(struct rio_info *p, struct Map *MapP) -{ - int host, entry, port, link; - int SysPort; - struct Host *HostP; - struct Map *HostMapP; - struct Port *PortP; - int work_done = 0; - unsigned long lock_flags, sem_flags; - - rio_dprintk(RIO_DEBUG_TABLE, "Delete entry on host %x, rta %x\n", MapP->HostUniqueNum, MapP->RtaUniqueNum); - - for (host = 0; host < p->RIONumHosts; host++) { - HostP = &p->RIOHosts[host]; - - rio_spin_lock_irqsave(&HostP->HostLock, lock_flags); - - if ((HostP->Flags & RUN_STATE) != RC_RUNNING) { - rio_spin_unlock_irqrestore(&HostP->HostLock, lock_flags); - continue; - } - - for (entry = 0; entry < MAX_RUP; entry++) { - if (MapP->RtaUniqueNum == HostP->Mapping[entry].RtaUniqueNum) { - HostMapP = &HostP->Mapping[entry]; - rio_dprintk(RIO_DEBUG_TABLE, "Found entry offset %d on host %s\n", entry, HostP->Name); - - /* - ** Check all four links of the unit are disconnected - */ - for (link = 0; link < LINKS_PER_UNIT; link++) { - if (HostMapP->Topology[link].Unit != ROUTE_DISCONNECT) { - rio_dprintk(RIO_DEBUG_TABLE, "Entry is in use and cannot be deleted!\n"); - p->RIOError.Error = UNIT_IS_IN_USE; - rio_spin_unlock_irqrestore(&HostP->HostLock, lock_flags); - return -EBUSY; - } - } - /* - ** Slot has been allocated, BUT not booted/routed/ - ** connected/selected or anything else-ed - */ - SysPort = HostMapP->SysPort; - - if (SysPort != NO_PORT) { - for (port = SysPort; port < SysPort + PORTS_PER_RTA; port++) { - PortP = p->RIOPortp[port]; - rio_dprintk(RIO_DEBUG_TABLE, "Unmap port\n"); - - rio_spin_lock_irqsave(&PortP->portSem, sem_flags); - - PortP->Mapped = 0; - - if (PortP->State & (RIO_MOPEN | RIO_LOPEN)) { - - rio_dprintk(RIO_DEBUG_TABLE, "Gob on port\n"); - PortP->TxBufferIn = PortP->TxBufferOut = 0; - /* What should I do - wakeup( &PortP->TxBufferIn ); - wakeup( &PortP->TxBufferOut); - */ - PortP->InUse = NOT_INUSE; - /* What should I do - wakeup( &PortP->InUse ); - signal(PortP->TtyP->t_pgrp,SIGKILL); - ttyflush(PortP->TtyP,(FREAD|FWRITE)); - */ - PortP->State |= RIO_CLOSING | RIO_DELETED; - } - - /* - ** For the second slot of a 16 port RTA, the - ** driver needs to reset the changes made to - ** the phb to port mappings in RIORouteRup. - */ - if (PortP->SecondBlock) { - u16 dest_unit = HostMapP->ID; - u16 dest_port = port - SysPort; - u16 __iomem *TxPktP; - struct PKT __iomem *Pkt; - - for (TxPktP = PortP->TxStart; TxPktP <= PortP->TxEnd; TxPktP++) { - /* - ** *TxPktP is the pointer to the - ** transmit packet on the host card. - ** This needs to be translated into - ** a 32 bit pointer so it can be - ** accessed from the driver. - */ - Pkt = (struct PKT __iomem *) RIO_PTR(HostP->Caddr, readw(&*TxPktP)); - rio_dprintk(RIO_DEBUG_TABLE, "Tx packet (%x) destination: Old %x:%x New %x:%x\n", readw(TxPktP), readb(&Pkt->dest_unit), readb(&Pkt->dest_port), dest_unit, dest_port); - writew(dest_unit, &Pkt->dest_unit); - writew(dest_port, &Pkt->dest_port); - } - rio_dprintk(RIO_DEBUG_TABLE, "Port %d phb destination: Old %x:%x New %x:%x\n", port, readb(&PortP->PhbP->destination) & 0xff, (readb(&PortP->PhbP->destination) >> 8) & 0xff, dest_unit, dest_port); - writew(dest_unit + (dest_port << 8), &PortP->PhbP->destination); - } - rio_spin_unlock_irqrestore(&PortP->portSem, sem_flags); - } - } - rio_dprintk(RIO_DEBUG_TABLE, "Entry nulled.\n"); - memset(HostMapP, 0, sizeof(struct Map)); - work_done++; - } - } - rio_spin_unlock_irqrestore(&HostP->HostLock, lock_flags); - } - - /* XXXXX lock me up */ - for (entry = 0; entry < TOTAL_MAP_ENTRIES; entry++) { - if (p->RIOSavedTable[entry].RtaUniqueNum == MapP->RtaUniqueNum) { - memset(&p->RIOSavedTable[entry], 0, sizeof(struct Map)); - work_done++; - } - if (p->RIOConnectTable[entry].RtaUniqueNum == MapP->RtaUniqueNum) { - memset(&p->RIOConnectTable[entry], 0, sizeof(struct Map)); - work_done++; - } - } - if (work_done) - return 0; - - rio_dprintk(RIO_DEBUG_TABLE, "Couldn't find entry to be deleted\n"); - p->RIOError.Error = COULDNT_FIND_ENTRY; - return -ENXIO; -} - -int RIOAssignRta(struct rio_info *p, struct Map *MapP) -{ - int host; - struct Map *HostMapP; - char *sptr; - int link; - - - rio_dprintk(RIO_DEBUG_TABLE, "Assign entry on host %x, rta %x, ID %d, Sysport %d\n", MapP->HostUniqueNum, MapP->RtaUniqueNum, MapP->ID, (int) MapP->SysPort); - - if ((MapP->ID != (u16) - 1) && ((int) MapP->ID < (int) 1 || (int) MapP->ID > MAX_RUP)) { - rio_dprintk(RIO_DEBUG_TABLE, "Bad ID in map entry!\n"); - p->RIOError.Error = ID_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - if (MapP->RtaUniqueNum == 0) { - rio_dprintk(RIO_DEBUG_TABLE, "Rta Unique number zero!\n"); - p->RIOError.Error = RTA_UNIQUE_NUMBER_ZERO; - return -EINVAL; - } - if ((MapP->SysPort != NO_PORT) && (MapP->SysPort % PORTS_PER_RTA)) { - rio_dprintk(RIO_DEBUG_TABLE, "Port %d not multiple of %d!\n", (int) MapP->SysPort, PORTS_PER_RTA); - p->RIOError.Error = TTY_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - if ((MapP->SysPort != NO_PORT) && (MapP->SysPort >= RIO_PORTS)) { - rio_dprintk(RIO_DEBUG_TABLE, "Port %d not valid!\n", (int) MapP->SysPort); - p->RIOError.Error = TTY_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - /* - ** Copy the name across to the map entry. - */ - MapP->Name[MAX_NAME_LEN - 1] = '\0'; - sptr = MapP->Name; - while (*sptr) { - if (*sptr < ' ' || *sptr > '~') { - rio_dprintk(RIO_DEBUG_TABLE, "Name entry contains non-printing characters!\n"); - p->RIOError.Error = BAD_CHARACTER_IN_NAME; - return -EINVAL; - } - sptr++; - } - - for (host = 0; host < p->RIONumHosts; host++) { - if (MapP->HostUniqueNum == p->RIOHosts[host].UniqueNum) { - if ((p->RIOHosts[host].Flags & RUN_STATE) != RC_RUNNING) { - p->RIOError.Error = HOST_NOT_RUNNING; - return -ENXIO; - } - - /* - ** Now we have a host we need to allocate an ID - ** if the entry does not already have one. - */ - if (MapP->ID == (u16) - 1) { - int nNewID; - - rio_dprintk(RIO_DEBUG_TABLE, "Attempting to get a new ID for rta \"%s\"\n", MapP->Name); - /* - ** The idea here is to allow RTA's to be assigned - ** before they actually appear on the network. - ** This allows the addition of RTA's without having - ** to plug them in. - ** What we do is: - ** - Find a free ID and allocate it to the RTA. - ** - If this map entry is the second half of a - ** 16 port entry then find the other half and - ** make sure the 2 cross reference each other. - */ - if (RIOFindFreeID(p, &p->RIOHosts[host], &nNewID, NULL) != 0) { - p->RIOError.Error = COULDNT_FIND_ENTRY; - return -EBUSY; - } - MapP->ID = (u16) nNewID + 1; - rio_dprintk(RIO_DEBUG_TABLE, "Allocated ID %d for this new RTA.\n", MapP->ID); - HostMapP = &p->RIOHosts[host].Mapping[nNewID]; - HostMapP->RtaUniqueNum = MapP->RtaUniqueNum; - HostMapP->HostUniqueNum = MapP->HostUniqueNum; - HostMapP->ID = MapP->ID; - for (link = 0; link < LINKS_PER_UNIT; link++) { - HostMapP->Topology[link].Unit = ROUTE_DISCONNECT; - HostMapP->Topology[link].Link = NO_LINK; - } - if (MapP->Flags & RTA16_SECOND_SLOT) { - int unit; - - for (unit = 0; unit < MAX_RUP; unit++) - if (p->RIOHosts[host].Mapping[unit].RtaUniqueNum == MapP->RtaUniqueNum) - break; - if (unit == MAX_RUP) { - p->RIOError.Error = COULDNT_FIND_ENTRY; - return -EBUSY; - } - HostMapP->Flags |= RTA16_SECOND_SLOT; - HostMapP->ID2 = MapP->ID2 = p->RIOHosts[host].Mapping[unit].ID; - p->RIOHosts[host].Mapping[unit].ID2 = MapP->ID; - rio_dprintk(RIO_DEBUG_TABLE, "Cross referenced id %d to ID %d.\n", MapP->ID, p->RIOHosts[host].Mapping[unit].ID); - } - } - - HostMapP = &p->RIOHosts[host].Mapping[MapP->ID - 1]; - - if (HostMapP->Flags & SLOT_IN_USE) { - rio_dprintk(RIO_DEBUG_TABLE, "Map table slot for ID %d is already in use.\n", MapP->ID); - p->RIOError.Error = ID_ALREADY_IN_USE; - return -EBUSY; - } - - /* - ** Assign the sys ports and the name, and mark the slot as - ** being in use. - */ - HostMapP->SysPort = MapP->SysPort; - if ((MapP->Flags & RTA16_SECOND_SLOT) == 0) - memcpy(HostMapP->Name, MapP->Name, MAX_NAME_LEN); - HostMapP->Flags = SLOT_IN_USE | RTA_BOOTED; -#ifdef NEED_TO_FIX - RIO_SV_BROADCAST(p->RIOHosts[host].svFlags[MapP->ID - 1]); -#endif - if (MapP->Flags & RTA16_SECOND_SLOT) - HostMapP->Flags |= RTA16_SECOND_SLOT; - - RIOReMapPorts(p, &p->RIOHosts[host], HostMapP); - /* - ** Adjust 2nd block of 8 phbs - */ - if (MapP->Flags & RTA16_SECOND_SLOT) - RIOFixPhbs(p, &p->RIOHosts[host], HostMapP->ID - 1); - - if (HostMapP->SysPort != NO_PORT) { - if (HostMapP->SysPort < p->RIOFirstPortsBooted) - p->RIOFirstPortsBooted = HostMapP->SysPort; - if (HostMapP->SysPort > p->RIOLastPortsBooted) - p->RIOLastPortsBooted = HostMapP->SysPort; - } - if (MapP->Flags & RTA16_SECOND_SLOT) - rio_dprintk(RIO_DEBUG_TABLE, "Second map of RTA %s added to configuration\n", p->RIOHosts[host].Mapping[MapP->ID2 - 1].Name); - else - rio_dprintk(RIO_DEBUG_TABLE, "RTA %s added to configuration\n", MapP->Name); - return 0; - } - } - p->RIOError.Error = UNKNOWN_HOST_NUMBER; - rio_dprintk(RIO_DEBUG_TABLE, "Unknown host %x\n", MapP->HostUniqueNum); - return -ENXIO; -} - - -int RIOReMapPorts(struct rio_info *p, struct Host *HostP, struct Map *HostMapP) -{ - struct Port *PortP; - unsigned int SubEnt; - unsigned int HostPort; - unsigned int SysPort; - u16 RtaType; - unsigned long flags; - - rio_dprintk(RIO_DEBUG_TABLE, "Mapping sysport %d to id %d\n", (int) HostMapP->SysPort, HostMapP->ID); - - /* - ** We need to tell the UnixRups which sysport the rup corresponds to - */ - HostP->UnixRups[HostMapP->ID - 1].BaseSysPort = HostMapP->SysPort; - - if (HostMapP->SysPort == NO_PORT) - return (0); - - RtaType = GetUnitType(HostMapP->RtaUniqueNum); - rio_dprintk(RIO_DEBUG_TABLE, "Mapping sysport %d-%d\n", (int) HostMapP->SysPort, (int) HostMapP->SysPort + PORTS_PER_RTA - 1); - - /* - ** now map each of its eight ports - */ - for (SubEnt = 0; SubEnt < PORTS_PER_RTA; SubEnt++) { - rio_dprintk(RIO_DEBUG_TABLE, "subent = %d, HostMapP->SysPort = %d\n", SubEnt, (int) HostMapP->SysPort); - SysPort = HostMapP->SysPort + SubEnt; /* portnumber within system */ - /* portnumber on host */ - - HostPort = (HostMapP->ID - 1) * PORTS_PER_RTA + SubEnt; - - rio_dprintk(RIO_DEBUG_TABLE, "c1 p = %p, p->rioPortp = %p\n", p, p->RIOPortp); - PortP = p->RIOPortp[SysPort]; - rio_dprintk(RIO_DEBUG_TABLE, "Map port\n"); - - /* - ** Point at all the real neat data structures - */ - rio_spin_lock_irqsave(&PortP->portSem, flags); - PortP->HostP = HostP; - PortP->Caddr = HostP->Caddr; - - /* - ** The PhbP cannot be filled in yet - ** unless the host has been booted - */ - if ((HostP->Flags & RUN_STATE) == RC_RUNNING) { - struct PHB __iomem *PhbP = PortP->PhbP = &HostP->PhbP[HostPort]; - PortP->TxAdd = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->tx_add)); - PortP->TxStart = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->tx_start)); - PortP->TxEnd = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->tx_end)); - PortP->RxRemove = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->rx_remove)); - PortP->RxStart = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->rx_start)); - PortP->RxEnd = (u16 __iomem *) RIO_PTR(HostP->Caddr, readw(&PhbP->rx_end)); - } else - PortP->PhbP = NULL; - - /* - ** port related flags - */ - PortP->HostPort = HostPort; - /* - ** For each part of a 16 port RTA, RupNum is ID - 1. - */ - PortP->RupNum = HostMapP->ID - 1; - if (HostMapP->Flags & RTA16_SECOND_SLOT) { - PortP->ID2 = HostMapP->ID2 - 1; - PortP->SecondBlock = 1; - } else { - PortP->ID2 = 0; - PortP->SecondBlock = 0; - } - PortP->RtaUniqueNum = HostMapP->RtaUniqueNum; - - /* - ** If the port was already mapped then thats all we need to do. - */ - if (PortP->Mapped) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - continue; - } else - HostMapP->Flags &= ~RTA_NEWBOOT; - - PortP->State = 0; - PortP->Config = 0; - /* - ** Check out the module type - if it is special (read only etc.) - ** then we need to set flags in the PortP->Config. - ** Note: For 16 port RTA, all ports are of the same type. - */ - if (RtaType == TYPE_RTA16) { - PortP->Config |= p->RIOModuleTypes[HostP->UnixRups[HostMapP->ID - 1].ModTypes].Flags[SubEnt % PORTS_PER_MODULE]; - } else { - if (SubEnt < PORTS_PER_MODULE) - PortP->Config |= p->RIOModuleTypes[LONYBLE(HostP->UnixRups[HostMapP->ID - 1].ModTypes)].Flags[SubEnt % PORTS_PER_MODULE]; - else - PortP->Config |= p->RIOModuleTypes[HINYBLE(HostP->UnixRups[HostMapP->ID - 1].ModTypes)].Flags[SubEnt % PORTS_PER_MODULE]; - } - - /* - ** more port related flags - */ - PortP->PortState = 0; - PortP->ModemLines = 0; - PortP->ModemState = 0; - PortP->CookMode = COOK_WELL; - PortP->ParamSem = 0; - PortP->FlushCmdBodge = 0; - PortP->WflushFlag = 0; - PortP->MagicFlags = 0; - PortP->Lock = 0; - PortP->Store = 0; - PortP->FirstOpen = 1; - - /* - ** Buffers 'n things - */ - PortP->RxDataStart = 0; - PortP->Cor2Copy = 0; - PortP->Name = &HostMapP->Name[0]; - PortP->statsGather = 0; - PortP->txchars = 0; - PortP->rxchars = 0; - PortP->opens = 0; - PortP->closes = 0; - PortP->ioctls = 0; - if (PortP->TxRingBuffer) - memset(PortP->TxRingBuffer, 0, p->RIOBufferSize); - else if (p->RIOBufferSize) { - PortP->TxRingBuffer = kzalloc(p->RIOBufferSize, GFP_KERNEL); - } - PortP->TxBufferOut = 0; - PortP->TxBufferIn = 0; - PortP->Debug = 0; - /* - ** LastRxTgl stores the state of the rx toggle bit for this - ** port, to be compared with the state of the next pkt received. - ** If the same, we have received the same rx pkt from the RTA - ** twice. Initialise to a value not equal to PHB_RX_TGL or 0. - */ - PortP->LastRxTgl = ~(u8) PHB_RX_TGL; - - /* - ** and mark the port as usable - */ - PortP->Mapped = 1; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - } - if (HostMapP->SysPort < p->RIOFirstPortsMapped) - p->RIOFirstPortsMapped = HostMapP->SysPort; - if (HostMapP->SysPort > p->RIOLastPortsMapped) - p->RIOLastPortsMapped = HostMapP->SysPort; - - return 0; -} - -int RIOChangeName(struct rio_info *p, struct Map *MapP) -{ - int host; - struct Map *HostMapP; - char *sptr; - - rio_dprintk(RIO_DEBUG_TABLE, "Change name entry on host %x, rta %x, ID %d, Sysport %d\n", MapP->HostUniqueNum, MapP->RtaUniqueNum, MapP->ID, (int) MapP->SysPort); - - if (MapP->ID > MAX_RUP) { - rio_dprintk(RIO_DEBUG_TABLE, "Bad ID in map entry!\n"); - p->RIOError.Error = ID_NUMBER_OUT_OF_RANGE; - return -EINVAL; - } - - MapP->Name[MAX_NAME_LEN - 1] = '\0'; - sptr = MapP->Name; - - while (*sptr) { - if (*sptr < ' ' || *sptr > '~') { - rio_dprintk(RIO_DEBUG_TABLE, "Name entry contains non-printing characters!\n"); - p->RIOError.Error = BAD_CHARACTER_IN_NAME; - return -EINVAL; - } - sptr++; - } - - for (host = 0; host < p->RIONumHosts; host++) { - if (MapP->HostUniqueNum == p->RIOHosts[host].UniqueNum) { - if ((p->RIOHosts[host].Flags & RUN_STATE) != RC_RUNNING) { - p->RIOError.Error = HOST_NOT_RUNNING; - return -ENXIO; - } - if (MapP->ID == 0) { - memcpy(p->RIOHosts[host].Name, MapP->Name, MAX_NAME_LEN); - return 0; - } - - HostMapP = &p->RIOHosts[host].Mapping[MapP->ID - 1]; - - if (HostMapP->RtaUniqueNum != MapP->RtaUniqueNum) { - p->RIOError.Error = RTA_NUMBER_WRONG; - return -ENXIO; - } - memcpy(HostMapP->Name, MapP->Name, MAX_NAME_LEN); - return 0; - } - } - p->RIOError.Error = UNKNOWN_HOST_NUMBER; - rio_dprintk(RIO_DEBUG_TABLE, "Unknown host %x\n", MapP->HostUniqueNum); - return -ENXIO; -} diff --git a/drivers/staging/generic_serial/rio/riotty.c b/drivers/staging/generic_serial/rio/riotty.c deleted file mode 100644 index e7e9911..0000000 --- a/drivers/staging/generic_serial/rio/riotty.c +++ /dev/null @@ -1,654 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : riotty.c -** SID : 1.3 -** Last Modified : 11/6/98 10:33:47 -** Retrieved : 11/6/98 10:33:50 -** -** ident @(#)riotty.c 1.3 -** -** ----------------------------------------------------------------------------- -*/ - -#define __EXPLICIT_DEF_H__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - - -#include "linux_compat.h" -#include "rio_linux.h" -#include "pkt.h" -#include "daemon.h" -#include "rio.h" -#include "riospace.h" -#include "cmdpkt.h" -#include "map.h" -#include "rup.h" -#include "port.h" -#include "riodrvr.h" -#include "rioinfo.h" -#include "func.h" -#include "errors.h" -#include "pci.h" - -#include "parmmap.h" -#include "unixrup.h" -#include "board.h" -#include "host.h" -#include "phb.h" -#include "link.h" -#include "cmdblk.h" -#include "route.h" -#include "cirrus.h" -#include "rioioctl.h" -#include "param.h" - -static void RIOClearUp(struct Port *PortP); - -/* Below belongs in func.h */ -int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg); - - -extern struct rio_info *p; - - -int riotopen(struct tty_struct *tty, struct file *filp) -{ - unsigned int SysPort; - int repeat_this = 250; - struct Port *PortP; /* pointer to the port structure */ - unsigned long flags; - int retval = 0; - - func_enter(); - - /* Make sure driver_data is NULL in case the rio isn't booted jet. Else gs_close - is going to oops. - */ - tty->driver_data = NULL; - - SysPort = rio_minor(tty); - - if (p->RIOFailed) { - rio_dprintk(RIO_DEBUG_TTY, "System initialisation failed\n"); - func_exit(); - return -ENXIO; - } - - rio_dprintk(RIO_DEBUG_TTY, "port open SysPort %d (mapped:%d)\n", SysPort, p->RIOPortp[SysPort]->Mapped); - - /* - ** Validate that we have received a legitimate request. - ** Currently, just check that we are opening a port on - ** a host card that actually exists, and that the port - ** has been mapped onto a host. - */ - if (SysPort >= RIO_PORTS) { /* out of range ? */ - rio_dprintk(RIO_DEBUG_TTY, "Illegal port number %d\n", SysPort); - func_exit(); - return -ENXIO; - } - - /* - ** Grab pointer to the port structure - */ - PortP = p->RIOPortp[SysPort]; /* Get control struc */ - rio_dprintk(RIO_DEBUG_TTY, "PortP: %p\n", PortP); - if (!PortP->Mapped) { /* we aren't mapped yet! */ - /* - ** The system doesn't know which RTA this port - ** corresponds to. - */ - rio_dprintk(RIO_DEBUG_TTY, "port not mapped into system\n"); - func_exit(); - return -ENXIO; - } - - tty->driver_data = PortP; - - PortP->gs.port.tty = tty; - PortP->gs.port.count++; - - rio_dprintk(RIO_DEBUG_TTY, "%d bytes in tx buffer\n", PortP->gs.xmit_cnt); - - retval = gs_init_port(&PortP->gs); - if (retval) { - PortP->gs.port.count--; - return -ENXIO; - } - /* - ** If the host hasn't been booted yet, then - ** fail - */ - if ((PortP->HostP->Flags & RUN_STATE) != RC_RUNNING) { - rio_dprintk(RIO_DEBUG_TTY, "Host not running\n"); - func_exit(); - return -ENXIO; - } - - /* - ** If the RTA has not booted yet and the user has chosen to block - ** until the RTA is present then we must spin here waiting for - ** the RTA to boot. - */ - /* I find the above code a bit hairy. I find the below code - easier to read and shorter. Now, if it works too that would - be great... -- REW - */ - rio_dprintk(RIO_DEBUG_TTY, "Checking if RTA has booted... \n"); - while (!(PortP->HostP->Mapping[PortP->RupNum].Flags & RTA_BOOTED)) { - if (!PortP->WaitUntilBooted) { - rio_dprintk(RIO_DEBUG_TTY, "RTA never booted\n"); - func_exit(); - return -ENXIO; - } - - /* Under Linux you'd normally use a wait instead of this - busy-waiting. I'll stick with the old implementation for - now. --REW - */ - if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_TTY, "RTA_wait_for_boot: EINTR in delay \n"); - func_exit(); - return -EINTR; - } - if (repeat_this-- <= 0) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for RTA to boot timeout\n"); - func_exit(); - return -EIO; - } - } - rio_dprintk(RIO_DEBUG_TTY, "RTA has been booted\n"); - rio_spin_lock_irqsave(&PortP->portSem, flags); - if (p->RIOHalted) { - goto bombout; - } - - /* - ** If the port is in the final throws of being closed, - ** we should wait here (politely), waiting - ** for it to finish, so that it doesn't close us! - */ - while ((PortP->State & RIO_CLOSING) && !p->RIOHalted) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for RIO_CLOSING to go away\n"); - if (repeat_this-- <= 0) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for not idle closed broken by signal\n"); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - retval = -EINTR; - goto bombout; - } - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { - rio_spin_lock_irqsave(&PortP->portSem, flags); - retval = -EINTR; - goto bombout; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - - if (!PortP->Mapped) { - rio_dprintk(RIO_DEBUG_TTY, "Port unmapped while closing!\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - retval = -ENXIO; - func_exit(); - return retval; - } - - if (p->RIOHalted) { - goto bombout; - } - -/* -** 15.10.1998 ARG - ESIL 0761 part fix -** RIO has it's own CTSFLOW and RTSFLOW flags in 'Config' in the port structure, -** we need to make sure that the flags are clear when the port is opened. -*/ - /* Uh? Suppose I turn these on and then another process opens - the port again? The flags get cleared! Not good. -- REW */ - if (!(PortP->State & (RIO_LOPEN | RIO_MOPEN))) { - PortP->Config &= ~(RIO_CTSFLOW | RIO_RTSFLOW); - } - - if (!(PortP->firstOpen)) { /* First time ? */ - rio_dprintk(RIO_DEBUG_TTY, "First open for this port\n"); - - - PortP->firstOpen++; - PortP->CookMode = 0; /* XXX RIOCookMode(tp); */ - PortP->InUse = NOT_INUSE; - - /* Tentative fix for bug PR27. Didn't work. */ - /* PortP->gs.xmit_cnt = 0; */ - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - - /* Someone explain to me why this delay/config is - here. If I read the docs correctly the "open" - command piggybacks the parameters immediately. - -- REW */ - RIOParam(PortP, RIOC_OPEN, 1, OK_TO_SLEEP); /* Open the port */ - rio_spin_lock_irqsave(&PortP->portSem, flags); - - /* - ** wait for the port to be not closed. - */ - while (!(PortP->PortState & PORT_ISOPEN) && !p->RIOHalted) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for PORT_ISOPEN-currently %x\n", PortP->PortState); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for open to finish broken by signal\n"); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - func_exit(); - return -EINTR; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - - if (p->RIOHalted) { - retval = -EIO; - bombout: - /* RIOClearUp( PortP ); */ - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return retval; - } - rio_dprintk(RIO_DEBUG_TTY, "PORT_ISOPEN found\n"); - } - rio_dprintk(RIO_DEBUG_TTY, "Modem - test for carrier\n"); - /* - ** ACTION - ** insert test for carrier here. -- ??? - ** I already see that test here. What's the deal? -- REW - */ - if ((PortP->gs.port.tty->termios->c_cflag & CLOCAL) || - (PortP->ModemState & RIOC_MSVR1_CD)) { - rio_dprintk(RIO_DEBUG_TTY, "open(%d) Modem carr on\n", SysPort); - /* - tp->tm.c_state |= CARR_ON; - wakeup((caddr_t) &tp->tm.c_canq); - */ - PortP->State |= RIO_CARR_ON; - wake_up_interruptible(&PortP->gs.port.open_wait); - } else { /* no carrier - wait for DCD */ - /* - while (!(PortP->gs.port.tty->termios->c_state & CARR_ON) && - !(filp->f_flags & O_NONBLOCK) && !p->RIOHalted ) - */ - while (!(PortP->State & RIO_CARR_ON) && !(filp->f_flags & O_NONBLOCK) && !p->RIOHalted) { - rio_dprintk(RIO_DEBUG_TTY, "open(%d) sleeping for carr on\n", SysPort); - /* - PortP->gs.port.tty->termios->c_state |= WOPEN; - */ - PortP->State |= RIO_WOPEN; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { - rio_spin_lock_irqsave(&PortP->portSem, flags); - /* - ** ACTION: verify that this is a good thing - ** to do here. -- ??? - ** I think it's OK. -- REW - */ - rio_dprintk(RIO_DEBUG_TTY, "open(%d) sleeping for carr broken by signal\n", SysPort); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - /* - tp->tm.c_state &= ~WOPEN; - */ - PortP->State &= ~RIO_WOPEN; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - func_exit(); - return -EINTR; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - PortP->State &= ~RIO_WOPEN; - } - if (p->RIOHalted) - goto bombout; - rio_dprintk(RIO_DEBUG_TTY, "Setting RIO_MOPEN\n"); - PortP->State |= RIO_MOPEN; - - if (p->RIOHalted) - goto bombout; - - rio_dprintk(RIO_DEBUG_TTY, "high level open done\n"); - - /* - ** Count opens for port statistics reporting - */ - if (PortP->statsGather) - PortP->opens++; - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - rio_dprintk(RIO_DEBUG_TTY, "Returning from open\n"); - func_exit(); - return 0; -} - -/* -** RIOClose the port. -** The operating system thinks that this is last close for the device. -** As there are two interfaces to the port (Modem and tty), we need to -** check that both are closed before we close the device. -*/ -int riotclose(void *ptr) -{ - struct Port *PortP = ptr; /* pointer to the port structure */ - int deleted = 0; - int try = -1; /* Disable the timeouts by setting them to -1 */ - int repeat_this = -1; /* Congrats to those having 15 years of - uptime! (You get to break the driver.) */ - unsigned long end_time; - struct tty_struct *tty; - unsigned long flags; - int rv = 0; - - rio_dprintk(RIO_DEBUG_TTY, "port close SysPort %d\n", PortP->PortNum); - - /* PortP = p->RIOPortp[SysPort]; */ - rio_dprintk(RIO_DEBUG_TTY, "Port is at address %p\n", PortP); - /* tp = PortP->TtyP; *//* Get tty */ - tty = PortP->gs.port.tty; - rio_dprintk(RIO_DEBUG_TTY, "TTY is at address %p\n", tty); - - if (PortP->gs.closing_wait) - end_time = jiffies + PortP->gs.closing_wait; - else - end_time = jiffies + MAX_SCHEDULE_TIMEOUT; - - rio_spin_lock_irqsave(&PortP->portSem, flags); - - /* - ** Setting this flag will make any process trying to open - ** this port block until we are complete closing it. - */ - PortP->State |= RIO_CLOSING; - - if ((PortP->State & RIO_DELETED)) { - rio_dprintk(RIO_DEBUG_TTY, "Close on deleted RTA\n"); - deleted = 1; - } - - if (p->RIOHalted) { - RIOClearUp(PortP); - rv = -EIO; - goto close_end; - } - - rio_dprintk(RIO_DEBUG_TTY, "Clear bits\n"); - /* - ** clear the open bits for this device - */ - PortP->State &= ~RIO_MOPEN; - PortP->State &= ~RIO_CARR_ON; - PortP->ModemState &= ~RIOC_MSVR1_CD; - /* - ** If the device was open as both a Modem and a tty line - ** then we need to wimp out here, as the port has not really - ** been finally closed (gee, whizz!) The test here uses the - ** bit for the OTHER mode of operation, to see if THAT is - ** still active! - */ - if ((PortP->State & (RIO_LOPEN | RIO_MOPEN))) { - /* - ** The port is still open for the other task - - ** return, pretending that we are still active. - */ - rio_dprintk(RIO_DEBUG_TTY, "Channel %d still open !\n", PortP->PortNum); - PortP->State &= ~RIO_CLOSING; - if (PortP->firstOpen) - PortP->firstOpen--; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return -EIO; - } - - rio_dprintk(RIO_DEBUG_TTY, "Closing down - everything must go!\n"); - - PortP->State &= ~RIO_DYNOROD; - - /* - ** This is where we wait for the port - ** to drain down before closing. Bye-bye.... - ** (We never meant to do this) - */ - rio_dprintk(RIO_DEBUG_TTY, "Timeout 1 starts\n"); - - if (!deleted) - while ((PortP->InUse != NOT_INUSE) && !p->RIOHalted && (PortP->TxBufferIn != PortP->TxBufferOut)) { - if (repeat_this-- <= 0) { - rv = -EINTR; - rio_dprintk(RIO_DEBUG_TTY, "Waiting for not idle closed broken by signal\n"); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - goto close_end; - } - rio_dprintk(RIO_DEBUG_TTY, "Calling timeout to flush in closing\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (RIODelay_ni(PortP, HUNDRED_MS * 10) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_TTY, "RTA EINTR in delay \n"); - rv = -EINTR; - rio_spin_lock_irqsave(&PortP->portSem, flags); - goto close_end; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - - PortP->TxBufferIn = PortP->TxBufferOut = 0; - repeat_this = 0xff; - - PortP->InUse = 0; - if ((PortP->State & (RIO_LOPEN | RIO_MOPEN))) { - /* - ** The port has been re-opened for the other task - - ** return, pretending that we are still active. - */ - rio_dprintk(RIO_DEBUG_TTY, "Channel %d re-open!\n", PortP->PortNum); - PortP->State &= ~RIO_CLOSING; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (PortP->firstOpen) - PortP->firstOpen--; - return -EIO; - } - - if (p->RIOHalted) { - RIOClearUp(PortP); - goto close_end; - } - - /* Can't call RIOShortCommand with the port locked. */ - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - - if (RIOShortCommand(p, PortP, RIOC_CLOSE, 1, 0) == RIO_FAIL) { - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - rio_spin_lock_irqsave(&PortP->portSem, flags); - goto close_end; - } - - if (!deleted) - while (try && (PortP->PortState & PORT_ISOPEN)) { - try--; - if (time_after(jiffies, end_time)) { - rio_dprintk(RIO_DEBUG_TTY, "Run out of tries - force the bugger shut!\n"); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - break; - } - rio_dprintk(RIO_DEBUG_TTY, "Close: PortState:ISOPEN is %d\n", PortP->PortState & PORT_ISOPEN); - - if (p->RIOHalted) { - RIOClearUp(PortP); - rio_spin_lock_irqsave(&PortP->portSem, flags); - goto close_end; - } - if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) { - rio_dprintk(RIO_DEBUG_TTY, "RTA EINTR in delay \n"); - RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); - break; - } - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - rio_dprintk(RIO_DEBUG_TTY, "Close: try was %d on completion\n", try); - - /* RIOPreemptiveCmd(p, PortP, RIOC_FCLOSE); */ - -/* -** 15.10.1998 ARG - ESIL 0761 part fix -** RIO has it's own CTSFLOW and RTSFLOW flags in 'Config' in the port structure,** we need to make sure that the flags are clear when the port is opened. -*/ - PortP->Config &= ~(RIO_CTSFLOW | RIO_RTSFLOW); - - /* - ** Count opens for port statistics reporting - */ - if (PortP->statsGather) - PortP->closes++; - -close_end: - /* XXX: Why would a "DELETED" flag be reset here? I'd have - thought that a "deleted" flag means that the port was - permanently gone, but here we can make it reappear by it - being in close during the "deletion". - */ - PortP->State &= ~(RIO_CLOSING | RIO_DELETED); - if (PortP->firstOpen) - PortP->firstOpen--; - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - rio_dprintk(RIO_DEBUG_TTY, "Return from close\n"); - return rv; -} - - - -static void RIOClearUp(struct Port *PortP) -{ - rio_dprintk(RIO_DEBUG_TTY, "RIOHalted set\n"); - PortP->Config = 0; /* Direct semaphore */ - PortP->PortState = 0; - PortP->firstOpen = 0; - PortP->FlushCmdBodge = 0; - PortP->ModemState = PortP->CookMode = 0; - PortP->Mapped = 0; - PortP->WflushFlag = 0; - PortP->MagicFlags = 0; - PortP->RxDataStart = 0; - PortP->TxBufferIn = 0; - PortP->TxBufferOut = 0; -} - -/* -** Put a command onto a port. -** The PortPointer, command, length and arg are passed. -** The len is the length *inclusive* of the command byte, -** and so for a command that takes no data, len==1. -** The arg is a single byte, and is only used if len==2. -** Other values of len aren't allowed, and will cause -** a panic. -*/ -int RIOShortCommand(struct rio_info *p, struct Port *PortP, int command, int len, int arg) -{ - struct PKT __iomem *PacketP; - int retries = 20; /* at 10 per second -> 2 seconds */ - unsigned long flags; - - rio_dprintk(RIO_DEBUG_TTY, "entering shortcommand.\n"); - - if (PortP->State & RIO_DELETED) { - rio_dprintk(RIO_DEBUG_TTY, "Short command to deleted RTA ignored\n"); - return RIO_FAIL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - - /* - ** If the port is in use for pre-emptive command, then wait for it to - ** be free again. - */ - while ((PortP->InUse != NOT_INUSE) && !p->RIOHalted) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting for not in use (%d)\n", retries); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (retries-- <= 0) { - return RIO_FAIL; - } - if (RIODelay_ni(PortP, HUNDRED_MS) == RIO_FAIL) { - return RIO_FAIL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - if (PortP->State & RIO_DELETED) { - rio_dprintk(RIO_DEBUG_TTY, "Short command to deleted RTA ignored\n"); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return RIO_FAIL; - } - - while (!can_add_transmit(&PacketP, PortP) && !p->RIOHalted) { - rio_dprintk(RIO_DEBUG_TTY, "Waiting to add short command to queue (%d)\n", retries); - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - if (retries-- <= 0) { - rio_dprintk(RIO_DEBUG_TTY, "out of tries. Failing\n"); - return RIO_FAIL; - } - if (RIODelay_ni(PortP, HUNDRED_MS) == RIO_FAIL) { - return RIO_FAIL; - } - rio_spin_lock_irqsave(&PortP->portSem, flags); - } - - if (p->RIOHalted) { - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return RIO_FAIL; - } - - /* - ** set the command byte and the argument byte - */ - writeb(command, &PacketP->data[0]); - - if (len == 2) - writeb(arg, &PacketP->data[1]); - - /* - ** set the length of the packet and set the command bit. - */ - writeb(PKT_CMD_BIT | len, &PacketP->len); - - add_transmit(PortP); - /* - ** Count characters transmitted for port statistics reporting - */ - if (PortP->statsGather) - PortP->txchars += len; - - rio_spin_unlock_irqrestore(&PortP->portSem, flags); - return p->RIOHalted ? RIO_FAIL : ~RIO_FAIL; -} - - diff --git a/drivers/staging/generic_serial/rio/route.h b/drivers/staging/generic_serial/rio/route.h deleted file mode 100644 index 46e9637..0000000 --- a/drivers/staging/generic_serial/rio/route.h +++ /dev/null @@ -1,101 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* R O U T E H E A D E R - ******* ******* - **************************************************************************** - - Author : Ian Nandhra / Jeremy Rolls - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _route_h -#define _route_h - -#define MAX_LINKS 4 -#define MAX_NODES 17 /* Maximum nodes in a subnet */ -#define NODE_BYTES ((MAX_NODES / 8) + 1) /* Number of bytes needed for - 1 bit per node */ -#define ROUTE_DATA_SIZE (NODE_BYTES + 2) /* Number of bytes for complete - info about cost etc. */ -#define ROUTES_PER_PACKET ((PKT_MAX_DATA_LEN -2)/ ROUTE_DATA_SIZE) - /* Number of nodes we can squeeze - into one packet */ -#define MAX_TOPOLOGY_PACKETS (MAX_NODES / ROUTES_PER_PACKET + 1) -/************************************************ - * Define the types of command for the ROUTE RUP. - ************************************************/ -#define ROUTE_REQUEST 0 /* Request an ID */ -#define ROUTE_FOAD 1 /* Kill the RTA */ -#define ROUTE_ALREADY 2 /* ID given already */ -#define ROUTE_USED 3 /* All ID's used */ -#define ROUTE_ALLOCATE 4 /* Here it is */ -#define ROUTE_REQ_TOP 5 /* I bet you didn't expect.... - the Topological Inquisition */ -#define ROUTE_TOPOLOGY 6 /* Topology request answered FD */ -/******************************************************************* - * Define the Route Map Structure - * - * The route map gives a pointer to a Link Structure to use. - * This allows Disconnected Links to be checked quickly - ******************************************************************/ -typedef struct COST_ROUTE COST_ROUTE; -struct COST_ROUTE { - unsigned char cost; /* Cost down this link */ - unsigned char route[NODE_BYTES]; /* Nodes through this route */ -}; - -typedef struct ROUTE_STR ROUTE_STR; -struct ROUTE_STR { - COST_ROUTE cost_route[MAX_LINKS]; - /* cost / route for this link */ - ushort favoured; /* favoured link */ -}; - - -#define NO_LINK (short) 5 /* Link unattached */ -#define ROUTE_NO_ID (short) 100 /* No Id */ -#define ROUTE_DISCONNECT (ushort) 0xff /* Not connected */ -#define ROUTE_INTERCONNECT (ushort) 0x40 /* Sub-net interconnect */ - - -#define SYNC_RUP (ushort) 255 -#define COMMAND_RUP (ushort) 254 -#define ERROR_RUP (ushort) 253 -#define POLL_RUP (ushort) 252 -#define BOOT_RUP (ushort) 251 -#define ROUTE_RUP (ushort) 250 -#define STATUS_RUP (ushort) 249 -#define POWER_RUP (ushort) 248 - -#define HIGHEST_RUP (ushort) 255 /* Set to Top one */ -#define LOWEST_RUP (ushort) 248 /* Set to bottom one */ - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/rup.h b/drivers/staging/generic_serial/rio/rup.h deleted file mode 100644 index 4ae90cb..0000000 --- a/drivers/staging/generic_serial/rio/rup.h +++ /dev/null @@ -1,69 +0,0 @@ -/**************************************************************************** - ******* ******* - ******* R U P S T R U C T U R E - ******* ******* - **************************************************************************** - - Author : Ian Nandhra - Date : - - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Version : 0.01 - - - Mods - ---------------------------------------------------------------------------- - Date By Description - ---------------------------------------------------------------------------- - - ***************************************************************************/ - -#ifndef _rup_h -#define _rup_h 1 - -#define MAX_RUP ((short) 16) -#define PKTS_PER_RUP ((short) 2) /* They are always used in pairs */ - -/************************************************* - * Define all the packet request stuff - ************************************************/ -#define TX_RUP_INACTIVE 0 /* Nothing to transmit */ -#define TX_PACKET_READY 1 /* Transmit packet ready */ -#define TX_LOCK_RUP 2 /* Transmit side locked */ - -#define RX_RUP_INACTIVE 0 /* Nothing received */ -#define RX_PACKET_READY 1 /* Packet received */ - -#define RUP_NO_OWNER 0xff /* RUP not owned by any process */ - -struct RUP { - u16 txpkt; /* Outgoing packet */ - u16 rxpkt; /* Incoming packet */ - u16 link; /* Which link to send down? */ - u8 rup_dest_unit[2]; /* Destination unit */ - u16 handshake; /* For handshaking */ - u16 timeout; /* Timeout */ - u16 status; /* Status */ - u16 txcontrol; /* Transmit control */ - u16 rxcontrol; /* Receive control */ -}; - -#endif - -/*********** end of file ***********/ diff --git a/drivers/staging/generic_serial/rio/unixrup.h b/drivers/staging/generic_serial/rio/unixrup.h deleted file mode 100644 index 7abf0cb..0000000 --- a/drivers/staging/generic_serial/rio/unixrup.h +++ /dev/null @@ -1,51 +0,0 @@ -/* -** ----------------------------------------------------------------------------- -** -** Perle Specialix driver for Linux -** Ported from existing RIO Driver for SCO sources. - * - * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -** -** Module : unixrup.h -** SID : 1.2 -** Last Modified : 11/6/98 11:34:20 -** Retrieved : 11/6/98 11:34:22 -** -** ident @(#)unixrup.h 1.2 -** -** ----------------------------------------------------------------------------- -*/ - -#ifndef __rio_unixrup_h__ -#define __rio_unixrup_h__ - -/* -** UnixRup data structure. This contains pointers to actual RUPs on the -** host card, and all the command/boot control stuff. -*/ -struct UnixRup { - struct CmdBlk *CmdsWaitingP; /* Commands waiting to be done */ - struct CmdBlk *CmdPendingP; /* The command currently being sent */ - struct RUP __iomem *RupP; /* the Rup to send it to */ - unsigned int Id; /* Id number */ - unsigned int BaseSysPort; /* SysPort of first tty on this RTA */ - unsigned int ModTypes; /* Modules on this RTA */ - spinlock_t RupLock; /* Lock structure for MPX */ - /* struct lockb RupLock; *//* Lock structure for MPX */ -}; - -#endif /* __rio_unixrup_h__ */ diff --git a/drivers/staging/generic_serial/ser_a2232.c b/drivers/staging/generic_serial/ser_a2232.c deleted file mode 100644 index 3f47c2e..0000000 --- a/drivers/staging/generic_serial/ser_a2232.c +++ /dev/null @@ -1,831 +0,0 @@ -/* drivers/char/ser_a2232.c */ - -/* $Id: ser_a2232.c,v 0.4 2000/01/25 12:00:00 ehaase Exp $ */ - -/* Linux serial driver for the Amiga A2232 board */ - -/* This driver is MAINTAINED. Before applying any changes, please contact - * the author. - */ - -/* Copyright (c) 2000-2001 Enver Haase - * alias The A2232 driver project - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -/***************************** Documentation ************************/ -/* - * This driver is in EXPERIMENTAL state. That means I could not find - * someone with five A2232 boards with 35 ports running at 19200 bps - * at the same time and test the machine's behaviour. - * However, I know that you can performance-tweak this driver (see - * the source code). - * One thing to consider is the time this driver consumes during the - * Amiga's vertical blank interrupt. Everything that is to be done - * _IS DONE_ when entering the vertical blank interrupt handler of - * this driver. - * However, it would be more sane to only do the job for only ONE card - * instead of ALL cards at a time; or, more generally, to handle only - * SOME ports instead of ALL ports at a time. - * However, as long as no-one runs into problems I guess I shouldn't - * change the driver as it runs fine for me :) . - * - * Version history of this file: - * 0.4 Resolved licensing issues. - * 0.3 Inclusion in the Linux/m68k tree, small fixes. - * 0.2 Added documentation, minor typo fixes. - * 0.1 Initial release. - * - * TO DO: - * - Handle incoming BREAK events. I guess "Stevens: Advanced - * Programming in the UNIX(R) Environment" is a good reference - * on what is to be done. - * - When installing as a module, don't simply 'printk' text, but - * send it to the TTY used by the user. - * - * THANKS TO: - * - Jukka Marin (65EC02 code). - * - The other NetBSD developers on whose A2232 driver I had a - * pretty close look. However, I didn't copy any code so it - * is okay to put my code under the GPL and include it into - * Linux. - */ -/***************************** End of Documentation *****************/ - -/***************************** Defines ******************************/ -/* - * Enables experimental 115200 (normal) 230400 (turbo) baud rate. - * The A2232 specification states it can only operate at speeds up to - * 19200 bits per second, and I was not able to send a file via - * "sz"/"rz" and a null-modem cable from one A2232 port to another - * at 115200 bits per second. - * However, this might work for you. - */ -#undef A2232_SPEEDHACK -/* - * Default is not to use RTS/CTS so you could be talked to death. - */ -#define A2232_SUPPRESS_RTSCTS_WARNING -/************************* End of Defines ***************************/ - -/***************************** Includes *****************************/ -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include "ser_a2232.h" -#include "ser_a2232fw.h" -/************************* End of Includes **************************/ - -/***************************** Prototypes ***************************/ -/* The interrupt service routine */ -static irqreturn_t a2232_vbl_inter(int irq, void *data); -/* Initialize the port structures */ -static void a2232_init_portstructs(void); -/* Initialize and register TTY drivers. */ -/* returns 0 IFF successful */ -static int a2232_init_drivers(void); - -/* BEGIN GENERIC_SERIAL PROTOTYPES */ -static void a2232_disable_tx_interrupts(void *ptr); -static void a2232_enable_tx_interrupts(void *ptr); -static void a2232_disable_rx_interrupts(void *ptr); -static void a2232_enable_rx_interrupts(void *ptr); -static int a2232_carrier_raised(struct tty_port *port); -static void a2232_shutdown_port(void *ptr); -static int a2232_set_real_termios(void *ptr); -static int a2232_chars_in_buffer(void *ptr); -static void a2232_close(void *ptr); -static void a2232_hungup(void *ptr); -/* static void a2232_getserial (void *ptr, struct serial_struct *sp); */ -/* END GENERIC_SERIAL PROTOTYPES */ - -/* Functions that the TTY driver struct expects */ -static int a2232_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg); -static void a2232_throttle(struct tty_struct *tty); -static void a2232_unthrottle(struct tty_struct *tty); -static int a2232_open(struct tty_struct * tty, struct file * filp); -/************************* End of Prototypes ************************/ - -/***************************** Global variables *********************/ -/*--------------------------------------------------------------------------- - * Interface from generic_serial.c back here - *--------------------------------------------------------------------------*/ -static struct real_driver a2232_real_driver = { - a2232_disable_tx_interrupts, - a2232_enable_tx_interrupts, - a2232_disable_rx_interrupts, - a2232_enable_rx_interrupts, - a2232_shutdown_port, - a2232_set_real_termios, - a2232_chars_in_buffer, - a2232_close, - a2232_hungup, - NULL /* a2232_getserial */ -}; - -static void *a2232_driver_ID = &a2232_driver_ID; // Some memory address WE own. - -/* Ports structs */ -static struct a2232_port a2232_ports[MAX_A2232_BOARDS*NUMLINES]; - -/* TTY driver structs */ -static struct tty_driver *a2232_driver; - -/* nr of cards completely (all ports) and correctly configured */ -static int nr_a2232; - -/* zorro_dev structs for the A2232's */ -static struct zorro_dev *zd_a2232[MAX_A2232_BOARDS]; -/***************************** End of Global variables **************/ - -/* Helper functions */ - -static inline volatile struct a2232memory *a2232mem(unsigned int board) -{ - return (volatile struct a2232memory *)ZTWO_VADDR(zd_a2232[board]->resource.start); -} - -static inline volatile struct a2232status *a2232stat(unsigned int board, - unsigned int portonboard) -{ - volatile struct a2232memory *mem = a2232mem(board); - return &(mem->Status[portonboard]); -} - -static inline void a2232_receive_char(struct a2232_port *port, int ch, int err) -{ -/* Mostly stolen from other drivers. - Maybe one could implement a more efficient version by not only - transferring one character at a time. -*/ - struct tty_struct *tty = port->gs.port.tty; - -#if 0 - switch(err) { - case TTY_BREAK: - break; - case TTY_PARITY: - break; - case TTY_OVERRUN: - break; - case TTY_FRAME: - break; - } -#endif - - tty_insert_flip_char(tty, ch, err); - tty_flip_buffer_push(tty); -} - -/***************************** Functions ****************************/ -/*** BEGIN OF REAL_DRIVER FUNCTIONS ***/ - -static void a2232_disable_tx_interrupts(void *ptr) -{ - struct a2232_port *port; - volatile struct a2232status *stat; - unsigned long flags; - - port = ptr; - stat = a2232stat(port->which_a2232, port->which_port_on_a2232); - stat->OutDisable = -1; - - /* Does this here really have to be? */ - local_irq_save(flags); - port->gs.port.flags &= ~GS_TX_INTEN; - local_irq_restore(flags); -} - -static void a2232_enable_tx_interrupts(void *ptr) -{ - struct a2232_port *port; - volatile struct a2232status *stat; - unsigned long flags; - - port = ptr; - stat = a2232stat(port->which_a2232, port->which_port_on_a2232); - stat->OutDisable = 0; - - /* Does this here really have to be? */ - local_irq_save(flags); - port->gs.port.flags |= GS_TX_INTEN; - local_irq_restore(flags); -} - -static void a2232_disable_rx_interrupts(void *ptr) -{ - struct a2232_port *port; - port = ptr; - port->disable_rx = -1; -} - -static void a2232_enable_rx_interrupts(void *ptr) -{ - struct a2232_port *port; - port = ptr; - port->disable_rx = 0; -} - -static int a2232_carrier_raised(struct tty_port *port) -{ - struct a2232_port *ap = container_of(port, struct a2232_port, gs.port); - return ap->cd_status; -} - -static void a2232_shutdown_port(void *ptr) -{ - struct a2232_port *port; - volatile struct a2232status *stat; - unsigned long flags; - - port = ptr; - stat = a2232stat(port->which_a2232, port->which_port_on_a2232); - - local_irq_save(flags); - - port->gs.port.flags &= ~GS_ACTIVE; - - if (port->gs.port.tty && port->gs.port.tty->termios->c_cflag & HUPCL) { - /* Set DTR and RTS to Low, flush output. - The NetBSD driver "msc.c" does it this way. */ - stat->Command = ( (stat->Command & ~A2232CMD_CMask) | - A2232CMD_Close ); - stat->OutFlush = -1; - stat->Setup = -1; - } - - local_irq_restore(flags); - - /* After analyzing control flow, I think a2232_shutdown_port - is actually the last call from the system when at application - level someone issues a "echo Hello >>/dev/ttyY0". - Therefore I think the MOD_DEC_USE_COUNT should be here and - not in "a2232_close()". See the comment in "sx.c", too. - If you run into problems, compile this driver into the - kernel instead of compiling it as a module. */ -} - -static int a2232_set_real_termios(void *ptr) -{ - unsigned int cflag, baud, chsize, stopb, parity, softflow; - int rate; - int a2232_param, a2232_cmd; - unsigned long flags; - unsigned int i; - struct a2232_port *port = ptr; - volatile struct a2232status *status; - volatile struct a2232memory *mem; - - if (!port->gs.port.tty || !port->gs.port.tty->termios) return 0; - - status = a2232stat(port->which_a2232, port->which_port_on_a2232); - mem = a2232mem(port->which_a2232); - - a2232_param = a2232_cmd = 0; - - // get baud rate - baud = port->gs.baud; - if (baud == 0) { - /* speed == 0 -> drop DTR, do nothing else */ - local_irq_save(flags); - // Clear DTR (and RTS... mhhh). - status->Command = ( (status->Command & ~A2232CMD_CMask) | - A2232CMD_Close ); - status->OutFlush = -1; - status->Setup = -1; - - local_irq_restore(flags); - return 0; - } - - rate = A2232_BAUD_TABLE_NOAVAIL; - for (i=0; i < A2232_BAUD_TABLE_NUM_RATES * 3; i += 3){ - if (a2232_baud_table[i] == baud){ - if (mem->Common.Crystal == A2232_TURBO) rate = a2232_baud_table[i+2]; - else rate = a2232_baud_table[i+1]; - } - } - if (rate == A2232_BAUD_TABLE_NOAVAIL){ - printk("a2232: Board %d Port %d unsupported baud rate: %d baud. Using another.\n",port->which_a2232,port->which_port_on_a2232,baud); - // This is useful for both (turbo or normal) Crystal versions. - rate = A2232PARAM_B9600; - } - a2232_param |= rate; - - cflag = port->gs.port.tty->termios->c_cflag; - - // get character size - chsize = cflag & CSIZE; - switch (chsize){ - case CS8: a2232_param |= A2232PARAM_8Bit; break; - case CS7: a2232_param |= A2232PARAM_7Bit; break; - case CS6: a2232_param |= A2232PARAM_6Bit; break; - case CS5: a2232_param |= A2232PARAM_5Bit; break; - default: printk("a2232: Board %d Port %d unsupported character size: %d. Using 8 data bits.\n", - port->which_a2232,port->which_port_on_a2232,chsize); - a2232_param |= A2232PARAM_8Bit; break; - } - - // get number of stop bits - stopb = cflag & CSTOPB; - if (stopb){ // two stop bits instead of one - printk("a2232: Board %d Port %d 2 stop bits unsupported. Using 1 stop bit.\n", - port->which_a2232,port->which_port_on_a2232); - } - - // Warn if RTS/CTS not wanted - if (!(cflag & CRTSCTS)){ -#ifndef A2232_SUPPRESS_RTSCTS_WARNING - printk("a2232: Board %d Port %d cannot switch off firmware-implemented RTS/CTS hardware flow control.\n", - port->which_a2232,port->which_port_on_a2232); -#endif - } - - /* I think this is correct. - However, IXOFF means _input_ flow control and I wonder - if one should care about IXON _output_ flow control, - too. If this makes problems, one should turn the A2232 - firmware XON/XOFF "SoftFlow" flow control off and use - the conventional way of inserting START/STOP characters - by hand in throttle()/unthrottle(). - */ - softflow = !!( port->gs.port.tty->termios->c_iflag & IXOFF ); - - // get Parity (Enabled/Disabled? If Enabled, Odd or Even?) - parity = cflag & (PARENB | PARODD); - if (parity & PARENB){ - if (parity & PARODD){ - a2232_cmd |= A2232CMD_OddParity; - } - else{ - a2232_cmd |= A2232CMD_EvenParity; - } - } - else a2232_cmd |= A2232CMD_NoParity; - - - /* Hmm. Maybe an own a2232_port structure - member would be cleaner? */ - if (cflag & CLOCAL) - port->gs.port.flags &= ~ASYNC_CHECK_CD; - else - port->gs.port.flags |= ASYNC_CHECK_CD; - - - /* Now we have all parameters and can go to set them: */ - local_irq_save(flags); - - status->Param = a2232_param | A2232PARAM_RcvBaud; - status->Command = a2232_cmd | A2232CMD_Open | A2232CMD_Enable; - status->SoftFlow = softflow; - status->OutDisable = 0; - status->Setup = -1; - - local_irq_restore(flags); - return 0; -} - -static int a2232_chars_in_buffer(void *ptr) -{ - struct a2232_port *port; - volatile struct a2232status *status; - unsigned char ret; /* we need modulo-256 arithmetics */ - port = ptr; - status = a2232stat(port->which_a2232, port->which_port_on_a2232); -#if A2232_IOBUFLEN != 256 -#error "Re-Implement a2232_chars_in_buffer()!" -#endif - ret = (status->OutHead - status->OutTail); - return ret; -} - -static void a2232_close(void *ptr) -{ - a2232_disable_tx_interrupts(ptr); - a2232_disable_rx_interrupts(ptr); - /* see the comment in a2232_shutdown_port above. */ -} - -static void a2232_hungup(void *ptr) -{ - a2232_close(ptr); -} -/*** END OF REAL_DRIVER FUNCTIONS ***/ - -/*** BEGIN FUNCTIONS EXPECTED BY TTY DRIVER STRUCTS ***/ -static int a2232_ioctl( struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - return -ENOIOCTLCMD; -} - -static void a2232_throttle(struct tty_struct *tty) -{ -/* Throttle: System cannot take another chars: Drop RTS or - send the STOP char or whatever. - The A2232 firmware does RTS/CTS anyway, and XON/XOFF - if switched on. So the only thing we can do at this - layer here is not taking any characters out of the - A2232 buffer any more. */ - struct a2232_port *port = tty->driver_data; - port->throttle_input = -1; -} - -static void a2232_unthrottle(struct tty_struct *tty) -{ -/* Unthrottle: dual to "throttle()" above. */ - struct a2232_port *port = tty->driver_data; - port->throttle_input = 0; -} - -static int a2232_open(struct tty_struct * tty, struct file * filp) -{ -/* More or less stolen from other drivers. */ - int line; - int retval; - struct a2232_port *port; - - line = tty->index; - port = &a2232_ports[line]; - - tty->driver_data = port; - port->gs.port.tty = tty; - port->gs.port.count++; - retval = gs_init_port(&port->gs); - if (retval) { - port->gs.port.count--; - return retval; - } - port->gs.port.flags |= GS_ACTIVE; - retval = gs_block_til_ready(port, filp); - - if (retval) { - port->gs.port.count--; - return retval; - } - - a2232_enable_rx_interrupts(port); - - return 0; -} -/*** END OF FUNCTIONS EXPECTED BY TTY DRIVER STRUCTS ***/ - -static irqreturn_t a2232_vbl_inter(int irq, void *data) -{ -#if A2232_IOBUFLEN != 256 -#error "Re-Implement a2232_vbl_inter()!" -#endif - -struct a2232_port *port; -volatile struct a2232memory *mem; -volatile struct a2232status *status; -unsigned char newhead; -unsigned char bufpos; /* Must be unsigned char. We need the modulo-256 arithmetics */ -unsigned char ncd, ocd, ccd; /* names consistent with the NetBSD driver */ -volatile u_char *ibuf, *cbuf, *obuf; -int ch, err, n, p; - for (n = 0; n < nr_a2232; n++){ /* for every completely initialized A2232 board */ - mem = a2232mem(n); - for (p = 0; p < NUMLINES; p++){ /* for every port on this board */ - err = 0; - port = &a2232_ports[n*NUMLINES+p]; - if ( port->gs.port.flags & GS_ACTIVE ){ /* if the port is used */ - - status = a2232stat(n,p); - - if (!port->disable_rx && !port->throttle_input){ /* If input is not disabled */ - newhead = status->InHead; /* 65EC02 write pointer */ - bufpos = status->InTail; - - /* check for input for this port */ - if (newhead != bufpos) { - /* buffer for input chars/events */ - ibuf = mem->InBuf[p]; - - /* data types of bytes in ibuf */ - cbuf = mem->InCtl[p]; - - /* do for all chars */ - while (bufpos != newhead) { - /* which type of input data? */ - switch (cbuf[bufpos]) { - /* switch on input event (CD, BREAK, etc.) */ - case A2232INCTL_EVENT: - switch (ibuf[bufpos++]) { - case A2232EVENT_Break: - /* TODO: Handle BREAK signal */ - break; - /* A2232EVENT_CarrierOn and A2232EVENT_CarrierOff are - handled in a separate queue and should not occur here. */ - case A2232EVENT_Sync: - printk("A2232: 65EC02 software sent SYNC event, don't know what to do. Ignoring."); - break; - default: - printk("A2232: 65EC02 software broken, unknown event type %d occurred.\n",ibuf[bufpos-1]); - } /* event type switch */ - break; - case A2232INCTL_CHAR: - /* Receive incoming char */ - a2232_receive_char(port, ibuf[bufpos], err); - bufpos++; - break; - default: - printk("A2232: 65EC02 software broken, unknown data type %d occurred.\n",cbuf[bufpos]); - bufpos++; - } /* switch on input data type */ - } /* while there's something in the buffer */ - - status->InTail = bufpos; /* tell 65EC02 what we've read */ - - } /* if there was something in the buffer */ - } /* If input is not disabled */ - - /* Now check if there's something to output */ - obuf = mem->OutBuf[p]; - bufpos = status->OutHead; - while ( (port->gs.xmit_cnt > 0) && - (!port->gs.port.tty->stopped) && - (!port->gs.port.tty->hw_stopped) ){ /* While there are chars to transmit */ - if (((bufpos+1) & A2232_IOBUFLENMASK) != status->OutTail) { /* If the A2232 buffer is not full */ - ch = port->gs.xmit_buf[port->gs.xmit_tail]; /* get the next char to transmit */ - port->gs.xmit_tail = (port->gs.xmit_tail+1) & (SERIAL_XMIT_SIZE-1); /* modulo-addition for the gs.xmit_buf ring-buffer */ - obuf[bufpos++] = ch; /* put it into the A2232 buffer */ - port->gs.xmit_cnt--; - } - else{ /* If A2232 the buffer is full */ - break; /* simply stop filling it. */ - } - } - status->OutHead = bufpos; - - /* WakeUp if output buffer runs low */ - if ((port->gs.xmit_cnt <= port->gs.wakeup_chars) && port->gs.port.tty) { - tty_wakeup(port->gs.port.tty); - } - } // if the port is used - } // for every port on the board - - /* Now check the CD message queue */ - newhead = mem->Common.CDHead; - bufpos = mem->Common.CDTail; - if (newhead != bufpos){ /* There are CD events in queue */ - ocd = mem->Common.CDStatus; /* get old status bits */ - while (newhead != bufpos){ /* read all events */ - ncd = mem->CDBuf[bufpos++]; /* get one event */ - ccd = ncd ^ ocd; /* mask of changed lines */ - ocd = ncd; /* save new status bits */ - for(p=0; p < NUMLINES; p++){ /* for all ports */ - if (ccd & 1){ /* this one changed */ - - struct a2232_port *port = &a2232_ports[n*7+p]; - port->cd_status = !(ncd & 1); /* ncd&1 <=> CD is now off */ - - if (!(port->gs.port.flags & ASYNC_CHECK_CD)) - ; /* Don't report DCD changes */ - else if (port->cd_status) { // if DCD on: DCD went UP! - - /* Are we blocking in open?*/ - wake_up_interruptible(&port->gs.port.open_wait); - } - else { // if DCD off: DCD went DOWN! - if (port->gs.port.tty) - tty_hangup (port->gs.port.tty); - } - - } // if CD changed for this port - ccd >>= 1; - ncd >>= 1; /* Shift bits for next line */ - } // for every port - } // while CD events in queue - mem->Common.CDStatus = ocd; /* save new status */ - mem->Common.CDTail = bufpos; /* remove events */ - } // if events in CD queue - - } // for every completely initialized A2232 board - return IRQ_HANDLED; -} - -static const struct tty_port_operations a2232_port_ops = { - .carrier_raised = a2232_carrier_raised, -}; - -static void a2232_init_portstructs(void) -{ - struct a2232_port *port; - int i; - - for (i = 0; i < MAX_A2232_BOARDS*NUMLINES; i++) { - port = a2232_ports + i; - tty_port_init(&port->gs.port); - port->gs.port.ops = &a2232_port_ops; - port->which_a2232 = i/NUMLINES; - port->which_port_on_a2232 = i%NUMLINES; - port->disable_rx = port->throttle_input = port->cd_status = 0; - port->gs.magic = A2232_MAGIC; - port->gs.close_delay = HZ/2; - port->gs.closing_wait = 30 * HZ; - port->gs.rd = &a2232_real_driver; - } -} - -static const struct tty_operations a2232_ops = { - .open = a2232_open, - .close = gs_close, - .write = gs_write, - .put_char = gs_put_char, - .flush_chars = gs_flush_chars, - .write_room = gs_write_room, - .chars_in_buffer = gs_chars_in_buffer, - .flush_buffer = gs_flush_buffer, - .ioctl = a2232_ioctl, - .throttle = a2232_throttle, - .unthrottle = a2232_unthrottle, - .set_termios = gs_set_termios, - .stop = gs_stop, - .start = gs_start, - .hangup = gs_hangup, -}; - -static int a2232_init_drivers(void) -{ - int error; - - a2232_driver = alloc_tty_driver(NUMLINES * nr_a2232); - if (!a2232_driver) - return -ENOMEM; - a2232_driver->owner = THIS_MODULE; - a2232_driver->driver_name = "commodore_a2232"; - a2232_driver->name = "ttyY"; - a2232_driver->major = A2232_NORMAL_MAJOR; - a2232_driver->type = TTY_DRIVER_TYPE_SERIAL; - a2232_driver->subtype = SERIAL_TYPE_NORMAL; - a2232_driver->init_termios = tty_std_termios; - a2232_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - a2232_driver->init_termios.c_ispeed = 9600; - a2232_driver->init_termios.c_ospeed = 9600; - a2232_driver->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(a2232_driver, &a2232_ops); - if ((error = tty_register_driver(a2232_driver))) { - printk(KERN_ERR "A2232: Couldn't register A2232 driver, error = %d\n", - error); - put_tty_driver(a2232_driver); - return 1; - } - return 0; -} - -static int __init a2232board_init(void) -{ - struct zorro_dev *z; - - unsigned int boardaddr; - int bcount; - short start; - u_char *from; - volatile u_char *to; - volatile struct a2232memory *mem; - int error, i; - -#ifdef CONFIG_SMP - return -ENODEV; /* This driver is not SMP aware. Is there an SMP ZorroII-bus-machine? */ -#endif - - if (!MACH_IS_AMIGA){ - return -ENODEV; - } - - printk("Commodore A2232 driver initializing.\n"); /* Say that we're alive. */ - - z = NULL; - nr_a2232 = 0; - while ( (z = zorro_find_device(ZORRO_WILDCARD, z)) ){ - if ( (z->id != ZORRO_PROD_CBM_A2232_PROTOTYPE) && - (z->id != ZORRO_PROD_CBM_A2232) ){ - continue; // The board found was no A2232 - } - if (!zorro_request_device(z,"A2232 driver")) - continue; - - printk("Commodore A2232 found (#%d).\n",nr_a2232); - - zd_a2232[nr_a2232] = z; - - boardaddr = ZTWO_VADDR( z->resource.start ); - printk("Board is located at address 0x%x, size is 0x%x.\n", boardaddr, (unsigned int) ((z->resource.end+1) - (z->resource.start))); - - mem = (volatile struct a2232memory *) boardaddr; - - (void) mem->Enable6502Reset; /* copy the code across to the board */ - to = (u_char *)mem; from = a2232_65EC02code; bcount = sizeof(a2232_65EC02code) - 2; - start = *(short *)from; - from += sizeof(start); - to += start; - while(bcount--) *to++ = *from++; - printk("65EC02 software uploaded to the A2232 memory.\n"); - - mem->Common.Crystal = A2232_UNKNOWN; /* use automatic speed check */ - - /* start 6502 running */ - (void) mem->ResetBoard; - printk("A2232's 65EC02 CPU up and running.\n"); - - /* wait until speed detector has finished */ - for (bcount = 0; bcount < 2000; bcount++) { - udelay(1000); - if (mem->Common.Crystal) - break; - } - printk((mem->Common.Crystal?"A2232 oscillator crystal detected by 65EC02 software: ":"65EC02 software could not determine A2232 oscillator crystal: ")); - switch (mem->Common.Crystal){ - case A2232_UNKNOWN: - printk("Unknown crystal.\n"); - break; - case A2232_NORMAL: - printk ("Normal crystal.\n"); - break; - case A2232_TURBO: - printk ("Turbo crystal.\n"); - break; - default: - printk ("0x%x. Huh?\n",mem->Common.Crystal); - } - - nr_a2232++; - - } - - printk("Total: %d A2232 boards initialized.\n", nr_a2232); /* Some status report if no card was found */ - - a2232_init_portstructs(); - - /* - a2232_init_drivers also registers the drivers. Must be here because all boards - have to be detected first. - */ - if (a2232_init_drivers()) return -ENODEV; // maybe we should use a different -Exxx? - - error = request_irq(IRQ_AMIGA_VERTB, a2232_vbl_inter, 0, - "A2232 serial VBL", a2232_driver_ID); - if (error) { - for (i = 0; i < nr_a2232; i++) - zorro_release_device(zd_a2232[i]); - tty_unregister_driver(a2232_driver); - put_tty_driver(a2232_driver); - } - return error; -} - -static void __exit a2232board_exit(void) -{ - int i; - - for (i = 0; i < nr_a2232; i++) { - zorro_release_device(zd_a2232[i]); - } - - tty_unregister_driver(a2232_driver); - put_tty_driver(a2232_driver); - free_irq(IRQ_AMIGA_VERTB, a2232_driver_ID); -} - -module_init(a2232board_init); -module_exit(a2232board_exit); - -MODULE_AUTHOR("Enver Haase"); -MODULE_DESCRIPTION("Amiga A2232 multi-serial board driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/generic_serial/ser_a2232.h b/drivers/staging/generic_serial/ser_a2232.h deleted file mode 100644 index bc09eb9..0000000 --- a/drivers/staging/generic_serial/ser_a2232.h +++ /dev/null @@ -1,202 +0,0 @@ -/* drivers/char/ser_a2232.h */ - -/* $Id: ser_a2232.h,v 0.4 2000/01/25 12:00:00 ehaase Exp $ */ - -/* Linux serial driver for the Amiga A2232 board */ - -/* This driver is MAINTAINED. Before applying any changes, please contact - * the author. - */ - -/* Copyright (c) 2000-2001 Enver Haase - * alias The A2232 driver project - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ - -#ifndef _SER_A2232_H_ -#define _SER_A2232_H_ - -/* - How many boards are to be supported at maximum; - "up to five A2232 Multiport Serial Cards may be installed in a - single Amiga 2000" states the A2232 User's Guide. If you have - more slots available, you might want to change the value below. -*/ -#define MAX_A2232_BOARDS 5 - -#ifndef A2232_NORMAL_MAJOR -/* This allows overriding on the compiler commandline, or in a "major.h" - include or something like that */ -#define A2232_NORMAL_MAJOR 224 /* /dev/ttyY* */ -#define A2232_CALLOUT_MAJOR 225 /* /dev/cuy* */ -#endif - -/* Some magic is always good - Who knows :) */ -#define A2232_MAGIC 0x000a2232 - -/* A2232 port structure to keep track of the - status of every single line used */ -struct a2232_port{ - struct gs_port gs; - unsigned int which_a2232; - unsigned int which_port_on_a2232; - short disable_rx; - short throttle_input; - short cd_status; -}; - -#define NUMLINES 7 /* number of lines per board */ -#define A2232_IOBUFLEN 256 /* number of bytes per buffer */ -#define A2232_IOBUFLENMASK 0xff /* mask for maximum number of bytes */ - - -#define A2232_UNKNOWN 0 /* crystal not known */ -#define A2232_NORMAL 1 /* normal A2232 (1.8432 MHz oscillator) */ -#define A2232_TURBO 2 /* turbo A2232 (3.6864 MHz oscillator) */ - - -struct a2232common { - char Crystal; /* normal (1) or turbo (2) board? */ - u_char Pad_a; - u_char TimerH; /* timer value after speed check */ - u_char TimerL; - u_char CDHead; /* head pointer for CD message queue */ - u_char CDTail; /* tail pointer for CD message queue */ - u_char CDStatus; - u_char Pad_b; -}; - -struct a2232status { - u_char InHead; /* input queue head */ - u_char InTail; /* input queue tail */ - u_char OutDisable; /* disables output */ - u_char OutHead; /* output queue head */ - u_char OutTail; /* output queue tail */ - u_char OutCtrl; /* soft flow control character to send */ - u_char OutFlush; /* flushes output buffer */ - u_char Setup; /* causes reconfiguration */ - u_char Param; /* parameter byte - see A2232PARAM */ - u_char Command; /* command byte - see A2232CMD */ - u_char SoftFlow; /* enables xon/xoff flow control */ - /* private 65EC02 fields: */ - u_char XonOff; /* stores XON/XOFF enable/disable */ -}; - -#define A2232_MEMPAD1 \ - (0x0200 - NUMLINES * sizeof(struct a2232status) - \ - sizeof(struct a2232common)) -#define A2232_MEMPAD2 (0x2000 - NUMLINES * A2232_IOBUFLEN - A2232_IOBUFLEN) - -struct a2232memory { - struct a2232status Status[NUMLINES]; /* 0x0000-0x006f status areas */ - struct a2232common Common; /* 0x0070-0x0077 common flags */ - u_char Dummy1[A2232_MEMPAD1]; /* 0x00XX-0x01ff */ - u_char OutBuf[NUMLINES][A2232_IOBUFLEN];/* 0x0200-0x08ff output bufs */ - u_char InBuf[NUMLINES][A2232_IOBUFLEN]; /* 0x0900-0x0fff input bufs */ - u_char InCtl[NUMLINES][A2232_IOBUFLEN]; /* 0x1000-0x16ff control data */ - u_char CDBuf[A2232_IOBUFLEN]; /* 0x1700-0x17ff CD event buffer */ - u_char Dummy2[A2232_MEMPAD2]; /* 0x1800-0x2fff */ - u_char Code[0x1000]; /* 0x3000-0x3fff code area */ - u_short InterruptAck; /* 0x4000 intr ack */ - u_char Dummy3[0x3ffe]; /* 0x4002-0x7fff */ - u_short Enable6502Reset; /* 0x8000 Stop board, */ - /* 6502 RESET line held low */ - u_char Dummy4[0x3ffe]; /* 0x8002-0xbfff */ - u_short ResetBoard; /* 0xc000 reset board & run, */ - /* 6502 RESET line held high */ -}; - -#undef A2232_MEMPAD1 -#undef A2232_MEMPAD2 - -#define A2232INCTL_CHAR 0 /* corresponding byte in InBuf is a character */ -#define A2232INCTL_EVENT 1 /* corresponding byte in InBuf is an event */ - -#define A2232EVENT_Break 1 /* break set */ -#define A2232EVENT_CarrierOn 2 /* carrier raised */ -#define A2232EVENT_CarrierOff 3 /* carrier dropped */ -#define A2232EVENT_Sync 4 /* don't know, defined in 2232.ax */ - -#define A2232CMD_Enable 0x1 /* enable/DTR bit */ -#define A2232CMD_Close 0x2 /* close the device */ -#define A2232CMD_Open 0xb /* open the device */ -#define A2232CMD_CMask 0xf /* command mask */ -#define A2232CMD_RTSOff 0x0 /* turn off RTS */ -#define A2232CMD_RTSOn 0x8 /* turn on RTS */ -#define A2232CMD_Break 0xd /* transmit a break */ -#define A2232CMD_RTSMask 0xc /* mask for RTS stuff */ -#define A2232CMD_NoParity 0x00 /* don't use parity */ -#define A2232CMD_OddParity 0x20 /* odd parity */ -#define A2232CMD_EvenParity 0x60 /* even parity */ -#define A2232CMD_ParityMask 0xe0 /* parity mask */ - -#define A2232PARAM_B115200 0x0 /* baud rates */ -#define A2232PARAM_B50 0x1 -#define A2232PARAM_B75 0x2 -#define A2232PARAM_B110 0x3 -#define A2232PARAM_B134 0x4 -#define A2232PARAM_B150 0x5 -#define A2232PARAM_B300 0x6 -#define A2232PARAM_B600 0x7 -#define A2232PARAM_B1200 0x8 -#define A2232PARAM_B1800 0x9 -#define A2232PARAM_B2400 0xa -#define A2232PARAM_B3600 0xb -#define A2232PARAM_B4800 0xc -#define A2232PARAM_B7200 0xd -#define A2232PARAM_B9600 0xe -#define A2232PARAM_B19200 0xf -#define A2232PARAM_BaudMask 0xf /* baud rate mask */ -#define A2232PARAM_RcvBaud 0x10 /* enable receive baud rate */ -#define A2232PARAM_8Bit 0x00 /* numbers of bits */ -#define A2232PARAM_7Bit 0x20 -#define A2232PARAM_6Bit 0x40 -#define A2232PARAM_5Bit 0x60 -#define A2232PARAM_BitMask 0x60 /* numbers of bits mask */ - - -/* Standard speeds tables, -1 means unavailable, -2 means 0 baud: switch off line */ -#define A2232_BAUD_TABLE_NOAVAIL -1 -#define A2232_BAUD_TABLE_NUM_RATES (18) -static int a2232_baud_table[A2232_BAUD_TABLE_NUM_RATES*3] = { - //Baud //Normal //Turbo - 50, A2232PARAM_B50, A2232_BAUD_TABLE_NOAVAIL, - 75, A2232PARAM_B75, A2232_BAUD_TABLE_NOAVAIL, - 110, A2232PARAM_B110, A2232_BAUD_TABLE_NOAVAIL, - 134, A2232PARAM_B134, A2232_BAUD_TABLE_NOAVAIL, - 150, A2232PARAM_B150, A2232PARAM_B75, - 200, A2232_BAUD_TABLE_NOAVAIL, A2232_BAUD_TABLE_NOAVAIL, - 300, A2232PARAM_B300, A2232PARAM_B150, - 600, A2232PARAM_B600, A2232PARAM_B300, - 1200, A2232PARAM_B1200, A2232PARAM_B600, - 1800, A2232PARAM_B1800, A2232_BAUD_TABLE_NOAVAIL, - 2400, A2232PARAM_B2400, A2232PARAM_B1200, - 4800, A2232PARAM_B4800, A2232PARAM_B2400, - 9600, A2232PARAM_B9600, A2232PARAM_B4800, - 19200, A2232PARAM_B19200, A2232PARAM_B9600, - 38400, A2232_BAUD_TABLE_NOAVAIL, A2232PARAM_B19200, - 57600, A2232_BAUD_TABLE_NOAVAIL, A2232_BAUD_TABLE_NOAVAIL, -#ifdef A2232_SPEEDHACK - 115200, A2232PARAM_B115200, A2232_BAUD_TABLE_NOAVAIL, - 230400, A2232_BAUD_TABLE_NOAVAIL, A2232PARAM_B115200 -#else - 115200, A2232_BAUD_TABLE_NOAVAIL, A2232_BAUD_TABLE_NOAVAIL, - 230400, A2232_BAUD_TABLE_NOAVAIL, A2232_BAUD_TABLE_NOAVAIL -#endif -}; -#endif diff --git a/drivers/staging/generic_serial/ser_a2232fw.ax b/drivers/staging/generic_serial/ser_a2232fw.ax deleted file mode 100644 index 7364380..0000000 --- a/drivers/staging/generic_serial/ser_a2232fw.ax +++ /dev/null @@ -1,529 +0,0 @@ -;.lib "axm" -; -;begin -;title "A2232 serial board driver" -; -;set modules "2232" -;set executable "2232.bin" -; -;;;;set nolink -; -;set temporary directory "t:" -; -;set assembly options "-m6502 -l60:t:list" -;set link options "bin"; loadadr" -;;;bin2c 2232.bin msc6502.h msc6502code -;end -; -; -; ### Commodore A2232 serial board driver for NetBSD by JM v1.3 ### -; -; - Created 950501 by JM - -; -; -; Serial board driver software. -; -; -% Copyright (c) 1995 Jukka Marin . -% All rights reserved. -% -% Redistribution and use in source and binary forms, with or without -% modification, are permitted provided that the following conditions -% are met: -% 1. Redistributions of source code must retain the above copyright -% notice, and the entire permission notice in its entirety, -% including the disclaimer of warranties. -% 2. Redistributions in binary form must reproduce the above copyright -% notice, this list of conditions and the following disclaimer in the -% documentation and/or other materials provided with the distribution. -% 3. The name of the author may not be used to endorse or promote -% products derived from this software without specific prior -% written permission. -% -% ALTERNATIVELY, this product may be distributed under the terms of -% the GNU General Public License, in which case the provisions of the -% GPL are required INSTEAD OF the above restrictions. (This clause is -% necessary due to a potential bad interaction between the GPL and -% the restrictions contained in a BSD-style copyright.) -% -% THIS SOFTWARE IS PROVIDED `AS IS'' AND ANY EXPRESS OR IMPLIED -% WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -% OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -% DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -% INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -% (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -% SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -% HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -% STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -% ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -% OF THE POSSIBILITY OF SUCH DAMAGE. -; -; -; Bugs: -; -; - Can't send a break yet -; -; -; -; Edited: -; -; - 950501 by JM -> v0.1 - Created this file. -; - 951029 by JM -> v1.3 - Carrier Detect events now queued in a separate -; queue. -; -; - - -CODE equ $3800 ; start address for program code - - -CTL_CHAR equ $00 ; byte in ibuf is a character -CTL_EVENT equ $01 ; byte in ibuf is an event - -EVENT_BREAK equ $01 -EVENT_CDON equ $02 -EVENT_CDOFF equ $03 -EVENT_SYNC equ $04 - -XON equ $11 -XOFF equ $13 - - -VARBASE macro *starting_address ; was VARINIT -_varbase set \1 - endm - -VARDEF macro *name space_needs -\1 equ _varbase -_varbase set _varbase+\2 - endm - - -stz macro * address - db $64,\1 - endm - -stzax macro * address - db $9e,<\1,>\1 - endm - - -biti macro * immediate value - db $89,\1 - endm - -smb0 macro * address - db $87,\1 - endm -smb1 macro * address - db $97,\1 - endm -smb2 macro * address - db $a7,\1 - endm -smb3 macro * address - db $b7,\1 - endm -smb4 macro * address - db $c7,\1 - endm -smb5 macro * address - db $d7,\1 - endm -smb6 macro * address - db $e7,\1 - endm -smb7 macro * address - db $f7,\1 - endm - - - -;-----------------------------------------------------------------------; -; ; -; stuff common for all ports, non-critical (run once / loop) ; -; ; -DO_SLOW macro * port_number ; - .local ; ; - lda CIA+C_PA ; check all CD inputs ; - cmp CommonCDo ; changed from previous accptd? ; - beq =over ; nope, do nothing else here ; - ; ; - cmp CommonCDb ; bouncing? ; - beq =nobounce ; nope -> ; - ; ; - sta CommonCDb ; save current state ; - lda #64 ; reinitialize counter ; - sta CommonCDc ; ; - jmp =over ; skip CD save ; - ; ; -=nobounce dec CommonCDc ; no, decrement bounce counter ; - bpl =over ; not done yet, so skip CD save ; - ; ; -=saveCD ldx CDHead ; get write index ; - sta cdbuf,x ; save status in buffer ; - inx ; ; - cpx CDTail ; buffer full? ; - .if ne ; no: preserve status: ; - stx CDHead ; update index in RAM ; - sta CommonCDo ; save state for the next check ; - .end ; ; -=over .end local ; - endm ; - ; -;-----------------------------------------------------------------------; - - -; port specific stuff (no data transfer) - -DO_PORT macro * port_number - .local ; ; - lda SetUp\1 ; reconfiguration request? ; - .if ne ; yes: ; - lda SoftFlow\1 ; get XON/XOFF flag ; - sta XonOff\1 ; save it ; - lda Param\1 ; get parameter ; - ora #%00010000 ; use baud generator for Rx ; - sta ACIA\1+A_CTRL ; store in control register ; - stz OutDisable\1 ; enable transmit output ; - stz SetUp\1 ; no reconfiguration no more ; - .end ; ; - ; ; - lda InHead\1 ; get write index ; - sbc InTail\1 ; buffer full soon? ; - cmp #200 ; 200 chars or more in buffer? ; - lda Command\1 ; get Command reg value ; - and #%11110011 ; turn RTS OFF by default ; - .if cc ; still room in buffer: ; - ora #%00001000 ; turn RTS ON ; - .end ; ; - sta ACIA\1+A_CMD ; set/clear RTS ; - ; ; - lda OutFlush\1 ; request to flush output buffer; - .if ne ; yessh! ; - lda OutHead\1 ; get head ; - sta OutTail\1 ; save as tail ; - stz OutDisable\1 ; enable transmit output ; - stz OutFlush\1 ; clear request ; - .end - .end local - endm - - -DO_DATA macro * port number - .local - lda ACIA\1+A_SR ; read ACIA status register ; - biti [1<<3] ; something received? ; - .if ne ; yes: ; - biti [1<<1] ; framing error? ; - .if ne ; yes: ; - lda ACIA\1+A_DATA ; read received character ; - bne =SEND ; not break -> ignore it ; - ldx InHead\1 ; get write pointer ; - lda #CTL_EVENT ; get type of byte ; - sta ictl\1,x ; save it in InCtl buffer ; - lda #EVENT_BREAK ; event code ; - sta ibuf\1,x ; save it as well ; - inx ; ; - cpx InTail\1 ; still room in buffer? ; - .if ne ; absolutely: ; - stx InHead\1 ; update index in memory ; - .end ; ; - jmp =SEND ; go check if anything to send ; - .end ; ; - ; normal char received: ; - ldx InHead\1 ; get write index ; - lda ACIA\1+A_DATA ; read received character ; - sta ibuf\1,x ; save char in buffer ; - stzax ictl\1 ; set type to CTL_CHAR ; - inx ; ; - cpx InTail\1 ; buffer full? ; - .if ne ; no: preserve character: ; - stx InHead\1 ; update index in RAM ; - .end ; ; - and #$7f ; mask off parity if any ; - cmp #XOFF ; XOFF from remote host? ; - .if eq ; yes: ; - lda XonOff\1 ; if XON/XOFF handshaking.. ; - sta OutDisable\1 ; ..disable transmitter ; - .end ; ; - .end ; ; - ; ; - ; BUFFER FULL CHECK WAS HERE ; - ; ; -=SEND lda ACIA\1+A_SR ; transmit register empty? ; - and #[1<<4] ; ; - .if ne ; yes: ; - ldx OutCtrl\1 ; sending out XON/XOFF? ; - .if ne ; yes: ; - lda CIA+C_PB ; check CTS signal ; - and #[1<<\1] ; (for this port only) ; - bne =DONE ; not allowed to send -> done ; - stx ACIA\1+A_DATA ; transmit control char ; - stz OutCtrl\1 ; clear flag ; - jmp =DONE ; and we're done ; - .end ; ; - ; ; - ldx OutTail\1 ; anything to transmit? ; - cpx OutHead\1 ; ; - .if ne ; yes: ; - lda OutDisable\1 ; allowed to transmit? ; - .if eq ; yes: ; - lda CIA+C_PB ; check CTS signal ; - and #[1<<\1] ; (for this port only) ; - bne =DONE ; not allowed to send -> done ; - lda obuf\1,x ; get a char from buffer ; - sta ACIA\1+A_DATA ; send it away ; - inc OutTail\1 ; update read index ; - .end ; ; - .end ; ; - .end ; ; -=DONE .end local - endm - - - -PORTVAR macro * port number - VARDEF InHead\1 1 - VARDEF InTail\1 1 - VARDEF OutDisable\1 1 - VARDEF OutHead\1 1 - VARDEF OutTail\1 1 - VARDEF OutCtrl\1 1 - VARDEF OutFlush\1 1 - VARDEF SetUp\1 1 - VARDEF Param\1 1 - VARDEF Command\1 1 - VARDEF SoftFlow\1 1 - ; private: - VARDEF XonOff\1 1 - endm - - - VARBASE 0 ; start variables at address $0000 - PORTVAR 0 ; define variables for port 0 - PORTVAR 1 ; define variables for port 1 - PORTVAR 2 ; define variables for port 2 - PORTVAR 3 ; define variables for port 3 - PORTVAR 4 ; define variables for port 4 - PORTVAR 5 ; define variables for port 5 - PORTVAR 6 ; define variables for port 6 - - - - VARDEF Crystal 1 ; 0 = unknown, 1 = normal, 2 = turbo - VARDEF Pad_a 1 - VARDEF TimerH 1 - VARDEF TimerL 1 - VARDEF CDHead 1 - VARDEF CDTail 1 - VARDEF CDStatus 1 - VARDEF Pad_b 1 - - VARDEF CommonCDo 1 ; for carrier detect optimization - VARDEF CommonCDc 1 ; for carrier detect debouncing - VARDEF CommonCDb 1 ; for carrier detect debouncing - - - VARBASE $0200 - VARDEF obuf0 256 ; output data (characters only) - VARDEF obuf1 256 - VARDEF obuf2 256 - VARDEF obuf3 256 - VARDEF obuf4 256 - VARDEF obuf5 256 - VARDEF obuf6 256 - - VARDEF ibuf0 256 ; input data (characters, events etc - see ictl) - VARDEF ibuf1 256 - VARDEF ibuf2 256 - VARDEF ibuf3 256 - VARDEF ibuf4 256 - VARDEF ibuf5 256 - VARDEF ibuf6 256 - - VARDEF ictl0 256 ; input control information (type of data in ibuf) - VARDEF ictl1 256 - VARDEF ictl2 256 - VARDEF ictl3 256 - VARDEF ictl4 256 - VARDEF ictl5 256 - VARDEF ictl6 256 - - VARDEF cdbuf 256 ; CD event queue - - -ACIA0 equ $4400 -ACIA1 equ $4c00 -ACIA2 equ $5400 -ACIA3 equ $5c00 -ACIA4 equ $6400 -ACIA5 equ $6c00 -ACIA6 equ $7400 - -A_DATA equ $00 -A_SR equ $02 -A_CMD equ $04 -A_CTRL equ $06 -; 00 write transmit data read received data -; 02 reset ACIA read status register -; 04 write command register read command register -; 06 write control register read control register - -CIA equ $7c00 ; 8520 CIA -C_PA equ $00 ; port A data register -C_PB equ $02 ; port B data register -C_DDRA equ $04 ; data direction register for port A -C_DDRB equ $06 ; data direction register for port B -C_TAL equ $08 ; timer A -C_TAH equ $0a -C_TBL equ $0c ; timer B -C_TBH equ $0e -C_TODL equ $10 ; TOD LSB -C_TODM equ $12 ; TOD middle byte -C_TODH equ $14 ; TOD MSB -C_DATA equ $18 ; serial data register -C_INTCTRL equ $1a ; interrupt control register -C_CTRLA equ $1c ; control register A -C_CTRLB equ $1e ; control register B - - - - - - section main,code,CODE-2 - - db >CODE,. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, and the entire permission notice in its entirety, - * including the disclaimer of warranties. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * ALTERNATIVELY, this product may be distributed under the terms of - * the GNU Public License, in which case the provisions of the GPL are - * required INSTEAD OF the above restrictions. (This clause is - * necessary due to a potential bad interaction between the GPL and - * the restrictions contained in a BSD-style copyright.) - * - * THIS SOFTWARE IS PROVIDED `AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/* This is the 65EC02 code by Jukka Marin that is executed by - the A2232's 65EC02 processor (base address: 0x3800) - Source file: ser_a2232fw.ax - Version: 1.3 (951029) - Known Bugs: Cannot send a break yet -*/ -static unsigned char a2232_65EC02code[] = { - 0x38, 0x00, 0xA2, 0xFF, 0x9A, 0xD8, 0xA2, 0x00, - 0xA9, 0x00, 0xA0, 0x54, 0x95, 0x00, 0xE8, 0x88, - 0xD0, 0xFA, 0x64, 0x5C, 0x64, 0x5E, 0x64, 0x58, - 0x64, 0x59, 0xA9, 0x00, 0x85, 0x55, 0xA9, 0xAA, - 0xC9, 0x64, 0x90, 0x02, 0xE6, 0x55, 0xA5, 0x54, - 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0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xD0, 0xD0, 0x00, 0x38, - 0xCE, 0xC0, -}; diff --git a/drivers/staging/generic_serial/sx.c b/drivers/staging/generic_serial/sx.c deleted file mode 100644 index 4f94aaf..0000000 --- a/drivers/staging/generic_serial/sx.c +++ /dev/null @@ -1,2894 +0,0 @@ -/* sx.c -- driver for the Specialix SX series cards. - * - * This driver will also support the older SI, and XIO cards. - * - * - * (C) 1998 - 2004 R.E.Wolff@BitWizard.nl - * - * Simon Allen (simonallen@cix.compulink.co.uk) wrote a previous - * version of this driver. Some fragments may have been copied. (none - * yet :-) - * - * Specialix pays for the development and support of this driver. - * Please DO contact support@specialix.co.uk if you require - * support. But please read the documentation (sx.txt) first. - * - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be - * useful, but WITHOUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, - * USA. - * - * Revision history: - * Revision 1.33 2000/03/09 10:00:00 pvdl,wolff - * - Fixed module and port counting - * - Fixed signal handling - * - Fixed an Ooops - * - * Revision 1.32 2000/03/07 09:00:00 wolff,pvdl - * - Fixed some sx_dprintk typos - * - added detection for an invalid board/module configuration - * - * Revision 1.31 2000/03/06 12:00:00 wolff,pvdl - * - Added support for EISA - * - * Revision 1.30 2000/01/21 17:43:06 wolff - * - Added support for SX+ - * - * Revision 1.26 1999/08/05 15:22:14 wolff - * - Port to 2.3.x - * - Reformatted to Linus' liking. - * - * Revision 1.25 1999/07/30 14:24:08 wolff - * Had accidentally left "gs_debug" set to "-1" instead of "off" (=0). - * - * Revision 1.24 1999/07/28 09:41:52 wolff - * - I noticed the remark about use-count straying in sx.txt. I checked - * sx_open, and found a few places where that could happen. I hope it's - * fixed now. - * - * Revision 1.23 1999/07/28 08:56:06 wolff - * - Fixed crash when sx_firmware run twice. - * - Added sx_slowpoll as a module parameter (I guess nobody really wanted - * to change it from the default... ) - * - Fixed a stupid editing problem I introduced in 1.22. - * - Fixed dropping characters on a termios change. - * - * Revision 1.22 1999/07/26 21:01:43 wolff - * Russell Brown noticed that I had overlooked 4 out of six modem control - * signals in sx_getsignals. Ooops. - * - * Revision 1.21 1999/07/23 09:11:33 wolff - * I forgot to free dynamically allocated memory when the driver is unloaded. - * - * Revision 1.20 1999/07/20 06:25:26 wolff - * The "closing wait" wasn't honoured. Thanks to James Griffiths for - * reporting this. - * - * Revision 1.19 1999/07/11 08:59:59 wolff - * Fixed an oops in close, when an open was pending. Changed the memtest - * a bit. Should also test the board in word-mode, however my card fails the - * memtest then. I still have to figure out what is wrong... - * - * Revision 1.18 1999/06/10 09:38:42 wolff - * Changed the format of the firmware revision from %04x to %x.%02x . - * - * Revision 1.17 1999/06/04 09:44:35 wolff - * fixed problem: reference to pci stuff when config_pci was off... - * Thanks to Jorge Novo for noticing this. - * - * Revision 1.16 1999/06/02 08:30:15 wolff - * added/removed the workaround for the DCD bug in the Firmware. - * A bit more debugging code to locate that... - * - * Revision 1.15 1999/06/01 11:35:30 wolff - * when DCD is left low (floating?), on TA's the firmware first tells us - * that DCD is high, but after a short while suddenly comes to the - * conclusion that it is low. All this would be fine, if it weren't that - * Unix requires us to send a "hangup" signal in that case. This usually - * all happens BEFORE the program has had a chance to ioctl the device - * into clocal mode.. - * - * Revision 1.14 1999/05/25 11:18:59 wolff - * Added PCI-fix. - * Added checks for return code of sx_sendcommand. - * Don't issue "reconfig" if port isn't open yet. (bit us on TA modules...) - * - * Revision 1.13 1999/04/29 15:18:01 wolff - * Fixed an "oops" that showed on SuSE 6.0 systems. - * Activate DTR again after stty 0. - * - * Revision 1.12 1999/04/29 07:49:52 wolff - * Improved "stty 0" handling a bit. (used to change baud to 9600 assuming - * the connection would be dropped anyway. That is not always the case, - * and confuses people). - * Told the card to always monitor the modem signals. - * Added support for dynamic gs_debug adjustments. - * Now tells the rest of the system the number of ports. - * - * Revision 1.11 1999/04/24 11:11:30 wolff - * Fixed two stupid typos in the memory test. - * - * Revision 1.10 1999/04/24 10:53:39 wolff - * Added some of Christian's suggestions. - * Fixed an HW_COOK_IN bug (ISIG was not in I_OTHER. We used to trust the - * card to send the signal to the process.....) - * - * Revision 1.9 1999/04/23 07:26:38 wolff - * Included Christian Lademann's 2.0 compile-warning fixes and interrupt - * assignment redesign. - * Cleanup of some other stuff. - * - * Revision 1.8 1999/04/16 13:05:30 wolff - * fixed a DCD change unnoticed bug. - * - * Revision 1.7 1999/04/14 22:19:51 wolff - * Fixed typo that showed up in 2.0.x builds (get_user instead of Get_user!) - * - * Revision 1.6 1999/04/13 18:40:20 wolff - * changed misc-minor to 161, as assigned by HPA. - * - * Revision 1.5 1999/04/13 15:12:25 wolff - * Fixed use-count leak when "hangup" occurred. - * Added workaround for a stupid-PCIBIOS bug. - * - * - * Revision 1.4 1999/04/01 22:47:40 wolff - * Fixed < 1M linux-2.0 problem. - * (vremap isn't compatible with ioremap in that case) - * - * Revision 1.3 1999/03/31 13:45:45 wolff - * Firmware loading is now done through a separate IOCTL. - * - * Revision 1.2 1999/03/28 12:22:29 wolff - * rcs cleanup - * - * Revision 1.1 1999/03/28 12:10:34 wolff - * Readying for release on 2.0.x (sorry David, 1.01 becomes 1.1 for RCS). - * - * Revision 0.12 1999/03/28 09:20:10 wolff - * Fixed problem in 0.11, continuing cleanup. - * - * Revision 0.11 1999/03/28 08:46:44 wolff - * cleanup. Not good. - * - * Revision 0.10 1999/03/28 08:09:43 wolff - * Fixed losing characters on close. - * - * Revision 0.9 1999/03/21 22:52:01 wolff - * Ported back to 2.2.... (minor things) - * - * Revision 0.8 1999/03/21 22:40:33 wolff - * Port to 2.0 - * - * Revision 0.7 1999/03/21 19:06:34 wolff - * Fixed hangup processing. - * - * Revision 0.6 1999/02/05 08:45:14 wolff - * fixed real_raw problems. Inclusion into kernel imminent. - * - * Revision 0.5 1998/12/21 23:51:06 wolff - * Snatched a nasty bug: sx_transmit_chars was getting re-entered, and it - * shouldn't have. THATs why I want to have transmit interrupts even when - * the buffer is empty. - * - * Revision 0.4 1998/12/17 09:34:46 wolff - * PPP works. ioctl works. Basically works! - * - * Revision 0.3 1998/12/15 13:05:18 wolff - * It works! Wow! Gotta start implementing IOCTL and stuff.... - * - * Revision 0.2 1998/12/01 08:33:53 wolff - * moved over to 2.1.130 - * - * Revision 0.1 1998/11/03 21:23:51 wolff - * Initial revision. Detects SX card. - * - * */ - -#define SX_VERSION 1.33 - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* The 3.0.0 version of sxboards/sxwindow.h uses BYTE and WORD.... */ -#define BYTE u8 -#define WORD u16 - -/* .... but the 3.0.4 version uses _u8 and _u16. */ -#define _u8 u8 -#define _u16 u16 - -#include "sxboards.h" -#include "sxwindow.h" - -#include -#include "sx.h" - -/* I don't think that this driver can handle more than 256 ports on - one machine. You'll have to increase the number of boards in sx.h - if you want more than 4 boards. */ - -#ifndef PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8 -#define PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8 0x2000 -#endif - -/* Configurable options: - (Don't be too sure that it'll work if you toggle them) */ - -/* Am I paranoid or not ? ;-) */ -#undef SX_PARANOIA_CHECK - -/* 20 -> 2000 per second. The card should rate-limit interrupts at 100 - Hz, but it is user configurable. I don't recommend going above 1000 - Hz. The interrupt ratelimit might trigger if the interrupt is - shared with a very active other device. */ -#define IRQ_RATE_LIMIT 20 - -/* Sharing interrupts is possible now. If the other device wants more - than 2000 interrupts per second, we'd gracefully decline further - interrupts. That's not what we want. On the other hand, if the - other device interrupts 2000 times a second, don't use the SX - interrupt. Use polling. */ -#undef IRQ_RATE_LIMIT - -#if 0 -/* Not implemented */ -/* - * The following defines are mostly for testing purposes. But if you need - * some nice reporting in your syslog, you can define them also. - */ -#define SX_REPORT_FIFO -#define SX_REPORT_OVERRUN -#endif - -/* Function prototypes */ -static void sx_disable_tx_interrupts(void *ptr); -static void sx_enable_tx_interrupts(void *ptr); -static void sx_disable_rx_interrupts(void *ptr); -static void sx_enable_rx_interrupts(void *ptr); -static int sx_carrier_raised(struct tty_port *port); -static void sx_shutdown_port(void *ptr); -static int sx_set_real_termios(void *ptr); -static void sx_close(void *ptr); -static int sx_chars_in_buffer(void *ptr); -static int sx_init_board(struct sx_board *board); -static int sx_init_portstructs(int nboards, int nports); -static long sx_fw_ioctl(struct file *filp, unsigned int cmd, - unsigned long arg); -static int sx_init_drivers(void); - -static struct tty_driver *sx_driver; - -static DEFINE_MUTEX(sx_boards_lock); -static struct sx_board boards[SX_NBOARDS]; -static struct sx_port *sx_ports; -static int sx_initialized; -static int sx_nports; -static int sx_debug; - -/* You can have the driver poll your card. - - Set sx_poll to 1 to poll every timer tick (10ms on Intel). - This is used when the card cannot use an interrupt for some reason. - - - set sx_slowpoll to 100 to do an extra poll once a second (on Intel). If - the driver misses an interrupt (report this if it DOES happen to you!) - everything will continue to work.... - */ -static int sx_poll = 1; -static int sx_slowpoll; - -/* The card limits the number of interrupts per second. - At 115k2 "100" should be sufficient. - If you're using higher baudrates, you can increase this... - */ - -static int sx_maxints = 100; - -#ifdef CONFIG_ISA - -/* These are the only open spaces in my computer. Yours may have more - or less.... -- REW - duh: Card at 0xa0000 is possible on HP Netserver?? -- pvdl -*/ -static int sx_probe_addrs[] = { - 0xc0000, 0xd0000, 0xe0000, - 0xc8000, 0xd8000, 0xe8000 -}; -static int si_probe_addrs[] = { - 0xc0000, 0xd0000, 0xe0000, - 0xc8000, 0xd8000, 0xe8000, 0xa0000 -}; -static int si1_probe_addrs[] = { - 0xd0000 -}; - -#define NR_SX_ADDRS ARRAY_SIZE(sx_probe_addrs) -#define NR_SI_ADDRS ARRAY_SIZE(si_probe_addrs) -#define NR_SI1_ADDRS ARRAY_SIZE(si1_probe_addrs) - -module_param_array(sx_probe_addrs, int, NULL, 0); -module_param_array(si_probe_addrs, int, NULL, 0); -#endif - -/* Set the mask to all-ones. This alas, only supports 32 interrupts. - Some architectures may need more. */ -static int sx_irqmask = -1; - -module_param(sx_poll, int, 0); -module_param(sx_slowpoll, int, 0); -module_param(sx_maxints, int, 0); -module_param(sx_debug, int, 0); -module_param(sx_irqmask, int, 0); - -MODULE_LICENSE("GPL"); - -static struct real_driver sx_real_driver = { - sx_disable_tx_interrupts, - sx_enable_tx_interrupts, - sx_disable_rx_interrupts, - sx_enable_rx_interrupts, - sx_shutdown_port, - sx_set_real_termios, - sx_chars_in_buffer, - sx_close, -}; - -/* - This driver can spew a whole lot of debugging output at you. If you - need maximum performance, you should disable the DEBUG define. To - aid in debugging in the field, I'm leaving the compile-time debug - features enabled, and disable them "runtime". That allows me to - instruct people with problems to enable debugging without requiring - them to recompile... -*/ -#define DEBUG - -#ifdef DEBUG -#define sx_dprintk(f, str...) if (sx_debug & f) printk (str) -#else -#define sx_dprintk(f, str...) /* nothing */ -#endif - -#define func_enter() sx_dprintk(SX_DEBUG_FLOW, "sx: enter %s\n",__func__) -#define func_exit() sx_dprintk(SX_DEBUG_FLOW, "sx: exit %s\n",__func__) - -#define func_enter2() sx_dprintk(SX_DEBUG_FLOW, "sx: enter %s (port %d)\n", \ - __func__, port->line) - -/* - * Firmware loader driver specific routines - * - */ - -static const struct file_operations sx_fw_fops = { - .owner = THIS_MODULE, - .unlocked_ioctl = sx_fw_ioctl, - .llseek = noop_llseek, -}; - -static struct miscdevice sx_fw_device = { - SXCTL_MISC_MINOR, "sxctl", &sx_fw_fops -}; - -#ifdef SX_PARANOIA_CHECK - -/* This doesn't work. Who's paranoid around here? Not me! */ - -static inline int sx_paranoia_check(struct sx_port const *port, - char *name, const char *routine) -{ - static const char *badmagic = KERN_ERR "sx: Warning: bad sx port magic " - "number for device %s in %s\n"; - static const char *badinfo = KERN_ERR "sx: Warning: null sx port for " - "device %s in %s\n"; - - if (!port) { - printk(badinfo, name, routine); - return 1; - } - if (port->magic != SX_MAGIC) { - printk(badmagic, name, routine); - return 1; - } - - return 0; -} -#else -#define sx_paranoia_check(a,b,c) 0 -#endif - -/* The timeouts. First try 30 times as fast as possible. Then give - the card some time to breathe between accesses. (Otherwise the - processor on the card might not be able to access its OWN bus... */ - -#define TIMEOUT_1 30 -#define TIMEOUT_2 1000000 - -#ifdef DEBUG -static void my_hd_io(void __iomem *p, int len) -{ - int i, j, ch; - unsigned char __iomem *addr = p; - - for (i = 0; i < len; i += 16) { - printk("%p ", addr + i); - for (j = 0; j < 16; j++) { - printk("%02x %s", readb(addr + j + i), - (j == 7) ? " " : ""); - } - for (j = 0; j < 16; j++) { - ch = readb(addr + j + i); - printk("%c", (ch < 0x20) ? '.' : - ((ch > 0x7f) ? '.' : ch)); - } - printk("\n"); - } -} -static void my_hd(void *p, int len) -{ - int i, j, ch; - unsigned char *addr = p; - - for (i = 0; i < len; i += 16) { - printk("%p ", addr + i); - for (j = 0; j < 16; j++) { - printk("%02x %s", addr[j + i], (j == 7) ? " " : ""); - } - for (j = 0; j < 16; j++) { - ch = addr[j + i]; - printk("%c", (ch < 0x20) ? '.' : - ((ch > 0x7f) ? '.' : ch)); - } - printk("\n"); - } -} -#endif - -/* This needs redoing for Alpha -- REW -- Done. */ - -static inline void write_sx_byte(struct sx_board *board, int offset, u8 byte) -{ - writeb(byte, board->base + offset); -} - -static inline u8 read_sx_byte(struct sx_board *board, int offset) -{ - return readb(board->base + offset); -} - -static inline void write_sx_word(struct sx_board *board, int offset, u16 word) -{ - writew(word, board->base + offset); -} - -static inline u16 read_sx_word(struct sx_board *board, int offset) -{ - return readw(board->base + offset); -} - -static int sx_busy_wait_eq(struct sx_board *board, - int offset, int mask, int correctval) -{ - int i; - - func_enter(); - - for (i = 0; i < TIMEOUT_1; i++) - if ((read_sx_byte(board, offset) & mask) == correctval) { - func_exit(); - return 1; - } - - for (i = 0; i < TIMEOUT_2; i++) { - if ((read_sx_byte(board, offset) & mask) == correctval) { - func_exit(); - return 1; - } - udelay(1); - } - - func_exit(); - return 0; -} - -static int sx_busy_wait_neq(struct sx_board *board, - int offset, int mask, int badval) -{ - int i; - - func_enter(); - - for (i = 0; i < TIMEOUT_1; i++) - if ((read_sx_byte(board, offset) & mask) != badval) { - func_exit(); - return 1; - } - - for (i = 0; i < TIMEOUT_2; i++) { - if ((read_sx_byte(board, offset) & mask) != badval) { - func_exit(); - return 1; - } - udelay(1); - } - - func_exit(); - return 0; -} - -/* 5.6.4 of 6210028 r2.3 */ -static int sx_reset(struct sx_board *board) -{ - func_enter(); - - if (IS_SX_BOARD(board)) { - - write_sx_byte(board, SX_CONFIG, 0); - write_sx_byte(board, SX_RESET, 1); /* Value doesn't matter */ - - if (!sx_busy_wait_eq(board, SX_RESET_STATUS, 1, 0)) { - printk(KERN_INFO "sx: Card doesn't respond to " - "reset...\n"); - return 0; - } - } else if (IS_EISA_BOARD(board)) { - outb(board->irq << 4, board->eisa_base + 0xc02); - } else if (IS_SI1_BOARD(board)) { - write_sx_byte(board, SI1_ISA_RESET, 0); /*value doesn't matter*/ - } else { - /* Gory details of the SI/ISA board */ - write_sx_byte(board, SI2_ISA_RESET, SI2_ISA_RESET_SET); - write_sx_byte(board, SI2_ISA_IRQ11, SI2_ISA_IRQ11_CLEAR); - write_sx_byte(board, SI2_ISA_IRQ12, SI2_ISA_IRQ12_CLEAR); - write_sx_byte(board, SI2_ISA_IRQ15, SI2_ISA_IRQ15_CLEAR); - write_sx_byte(board, SI2_ISA_INTCLEAR, SI2_ISA_INTCLEAR_CLEAR); - write_sx_byte(board, SI2_ISA_IRQSET, SI2_ISA_IRQSET_CLEAR); - } - - func_exit(); - return 1; -} - -/* This doesn't work on machines where "NULL" isn't 0 */ -/* If you have one of those, someone will need to write - the equivalent of this, which will amount to about 3 lines. I don't - want to complicate this right now. -- REW - (See, I do write comments every now and then :-) */ -#define OFFSETOF(strct, elem) ((long)&(((struct strct *)NULL)->elem)) - -#define CHAN_OFFSET(port,elem) (port->ch_base + OFFSETOF (_SXCHANNEL, elem)) -#define MODU_OFFSET(board,addr,elem) (addr + OFFSETOF (_SXMODULE, elem)) -#define BRD_OFFSET(board,elem) (OFFSETOF (_SXCARD, elem)) - -#define sx_write_channel_byte(port, elem, val) \ - write_sx_byte (port->board, CHAN_OFFSET (port, elem), val) - -#define sx_read_channel_byte(port, elem) \ - read_sx_byte (port->board, CHAN_OFFSET (port, elem)) - -#define sx_write_channel_word(port, elem, val) \ - write_sx_word (port->board, CHAN_OFFSET (port, elem), val) - -#define sx_read_channel_word(port, elem) \ - read_sx_word (port->board, CHAN_OFFSET (port, elem)) - -#define sx_write_module_byte(board, addr, elem, val) \ - write_sx_byte (board, MODU_OFFSET (board, addr, elem), val) - -#define sx_read_module_byte(board, addr, elem) \ - read_sx_byte (board, MODU_OFFSET (board, addr, elem)) - -#define sx_write_module_word(board, addr, elem, val) \ - write_sx_word (board, MODU_OFFSET (board, addr, elem), val) - -#define sx_read_module_word(board, addr, elem) \ - read_sx_word (board, MODU_OFFSET (board, addr, elem)) - -#define sx_write_board_byte(board, elem, val) \ - write_sx_byte (board, BRD_OFFSET (board, elem), val) - -#define sx_read_board_byte(board, elem) \ - read_sx_byte (board, BRD_OFFSET (board, elem)) - -#define sx_write_board_word(board, elem, val) \ - write_sx_word (board, BRD_OFFSET (board, elem), val) - -#define sx_read_board_word(board, elem) \ - read_sx_word (board, BRD_OFFSET (board, elem)) - -static int sx_start_board(struct sx_board *board) -{ - if (IS_SX_BOARD(board)) { - write_sx_byte(board, SX_CONFIG, SX_CONF_BUSEN); - } else if (IS_EISA_BOARD(board)) { - write_sx_byte(board, SI2_EISA_OFF, SI2_EISA_VAL); - outb((board->irq << 4) | 4, board->eisa_base + 0xc02); - } else if (IS_SI1_BOARD(board)) { - write_sx_byte(board, SI1_ISA_RESET_CLEAR, 0); - write_sx_byte(board, SI1_ISA_INTCL, 0); - } else { - /* Don't bug me about the clear_set. - I haven't the foggiest idea what it's about -- REW */ - write_sx_byte(board, SI2_ISA_RESET, SI2_ISA_RESET_CLEAR); - write_sx_byte(board, SI2_ISA_INTCLEAR, SI2_ISA_INTCLEAR_SET); - } - return 1; -} - -#define SX_IRQ_REG_VAL(board) \ - ((board->flags & SX_ISA_BOARD) ? (board->irq << 4) : 0) - -/* Note. The SX register is write-only. Therefore, we have to enable the - bus too. This is a no-op, if you don't mess with this driver... */ -static int sx_start_interrupts(struct sx_board *board) -{ - - /* Don't call this with board->irq == 0 */ - - if (IS_SX_BOARD(board)) { - write_sx_byte(board, SX_CONFIG, SX_IRQ_REG_VAL(board) | - SX_CONF_BUSEN | SX_CONF_HOSTIRQ); - } else if (IS_EISA_BOARD(board)) { - inb(board->eisa_base + 0xc03); - } else if (IS_SI1_BOARD(board)) { - write_sx_byte(board, SI1_ISA_INTCL, 0); - write_sx_byte(board, SI1_ISA_INTCL_CLEAR, 0); - } else { - switch (board->irq) { - case 11: - write_sx_byte(board, SI2_ISA_IRQ11, SI2_ISA_IRQ11_SET); - break; - case 12: - write_sx_byte(board, SI2_ISA_IRQ12, SI2_ISA_IRQ12_SET); - break; - case 15: - write_sx_byte(board, SI2_ISA_IRQ15, SI2_ISA_IRQ15_SET); - break; - default: - printk(KERN_INFO "sx: SI/XIO card doesn't support " - "interrupt %d.\n", board->irq); - return 0; - } - write_sx_byte(board, SI2_ISA_INTCLEAR, SI2_ISA_INTCLEAR_SET); - } - - return 1; -} - -static int sx_send_command(struct sx_port *port, - int command, int mask, int newstat) -{ - func_enter2(); - write_sx_byte(port->board, CHAN_OFFSET(port, hi_hstat), command); - func_exit(); - return sx_busy_wait_eq(port->board, CHAN_OFFSET(port, hi_hstat), mask, - newstat); -} - -static char *mod_type_s(int module_type) -{ - switch (module_type) { - case TA4: - return "TA4"; - case TA8: - return "TA8"; - case TA4_ASIC: - return "TA4_ASIC"; - case TA8_ASIC: - return "TA8_ASIC"; - case MTA_CD1400: - return "MTA_CD1400"; - case SXDC: - return "SXDC"; - default: - return "Unknown/invalid"; - } -} - -static char *pan_type_s(int pan_type) -{ - switch (pan_type) { - case MOD_RS232DB25: - return "MOD_RS232DB25"; - case MOD_RS232RJ45: - return "MOD_RS232RJ45"; - case MOD_RS422DB25: - return "MOD_RS422DB25"; - case MOD_PARALLEL: - return "MOD_PARALLEL"; - case MOD_2_RS232DB25: - return "MOD_2_RS232DB25"; - case MOD_2_RS232RJ45: - return "MOD_2_RS232RJ45"; - case MOD_2_RS422DB25: - return "MOD_2_RS422DB25"; - case MOD_RS232DB25MALE: - return "MOD_RS232DB25MALE"; - case MOD_2_PARALLEL: - return "MOD_2_PARALLEL"; - case MOD_BLANK: - return "empty"; - default: - return "invalid"; - } -} - -static int mod_compat_type(int module_type) -{ - return module_type >> 4; -} - -static void sx_reconfigure_port(struct sx_port *port) -{ - if (sx_read_channel_byte(port, hi_hstat) == HS_IDLE_OPEN) { - if (sx_send_command(port, HS_CONFIG, -1, HS_IDLE_OPEN) != 1) { - printk(KERN_WARNING "sx: Sent reconfigure command, but " - "card didn't react.\n"); - } - } else { - sx_dprintk(SX_DEBUG_TERMIOS, "sx: Not sending reconfigure: " - "port isn't open (%02x).\n", - sx_read_channel_byte(port, hi_hstat)); - } -} - -static void sx_setsignals(struct sx_port *port, int dtr, int rts) -{ - int t; - func_enter2(); - - t = sx_read_channel_byte(port, hi_op); - if (dtr >= 0) - t = dtr ? (t | OP_DTR) : (t & ~OP_DTR); - if (rts >= 0) - t = rts ? (t | OP_RTS) : (t & ~OP_RTS); - sx_write_channel_byte(port, hi_op, t); - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "setsignals: %d/%d\n", dtr, rts); - - func_exit(); -} - -static int sx_getsignals(struct sx_port *port) -{ - int i_stat, o_stat; - - o_stat = sx_read_channel_byte(port, hi_op); - i_stat = sx_read_channel_byte(port, hi_ip); - - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "getsignals: %d/%d (%d/%d) " - "%02x/%02x\n", - (o_stat & OP_DTR) != 0, (o_stat & OP_RTS) != 0, - port->c_dcd, tty_port_carrier_raised(&port->gs.port), - sx_read_channel_byte(port, hi_ip), - sx_read_channel_byte(port, hi_state)); - - return (((o_stat & OP_DTR) ? TIOCM_DTR : 0) | - ((o_stat & OP_RTS) ? TIOCM_RTS : 0) | - ((i_stat & IP_CTS) ? TIOCM_CTS : 0) | - ((i_stat & IP_DCD) ? TIOCM_CAR : 0) | - ((i_stat & IP_DSR) ? TIOCM_DSR : 0) | - ((i_stat & IP_RI) ? TIOCM_RNG : 0)); -} - -static void sx_set_baud(struct sx_port *port) -{ - int t; - - if (port->board->ta_type == MOD_SXDC) { - switch (port->gs.baud) { - /* Save some typing work... */ -#define e(x) case x: t = BAUD_ ## x; break - e(50); - e(75); - e(110); - e(150); - e(200); - e(300); - e(600); - e(1200); - e(1800); - e(2000); - e(2400); - e(4800); - e(7200); - e(9600); - e(14400); - e(19200); - e(28800); - e(38400); - e(56000); - e(57600); - e(64000); - e(76800); - e(115200); - e(128000); - e(150000); - e(230400); - e(256000); - e(460800); - e(921600); - case 134: - t = BAUD_134_5; - break; - case 0: - t = -1; - break; - default: - /* Can I return "invalid"? */ - t = BAUD_9600; - printk(KERN_INFO "sx: unsupported baud rate: %d.\n", - port->gs.baud); - break; - } -#undef e - if (t > 0) { -/* The baud rate is not set to 0, so we're enabeling DTR... -- REW */ - sx_setsignals(port, 1, -1); - /* XXX This is not TA & MTA compatible */ - sx_write_channel_byte(port, hi_csr, 0xff); - - sx_write_channel_byte(port, hi_txbaud, t); - sx_write_channel_byte(port, hi_rxbaud, t); - } else { - sx_setsignals(port, 0, -1); - } - } else { - switch (port->gs.baud) { -#define e(x) case x: t = CSR_ ## x; break - e(75); - e(150); - e(300); - e(600); - e(1200); - e(2400); - e(4800); - e(1800); - e(9600); - e(19200); - e(57600); - e(38400); -/* TA supports 110, but not 115200, MTA supports 115200, but not 110 */ - case 110: - if (port->board->ta_type == MOD_TA) { - t = CSR_110; - break; - } else { - t = CSR_9600; - printk(KERN_INFO "sx: Unsupported baud rate: " - "%d.\n", port->gs.baud); - break; - } - case 115200: - if (port->board->ta_type == MOD_TA) { - t = CSR_9600; - printk(KERN_INFO "sx: Unsupported baud rate: " - "%d.\n", port->gs.baud); - break; - } else { - t = CSR_110; - break; - } - case 0: - t = -1; - break; - default: - t = CSR_9600; - printk(KERN_INFO "sx: Unsupported baud rate: %d.\n", - port->gs.baud); - break; - } -#undef e - if (t >= 0) { - sx_setsignals(port, 1, -1); - sx_write_channel_byte(port, hi_csr, t * 0x11); - } else { - sx_setsignals(port, 0, -1); - } - } -} - -/* Simon Allen's version of this routine was 225 lines long. 85 is a lot - better. -- REW */ - -static int sx_set_real_termios(void *ptr) -{ - struct sx_port *port = ptr; - - func_enter2(); - - if (!port->gs.port.tty) - return 0; - - /* What is this doing here? -- REW - Ha! figured it out. It is to allow you to get DTR active again - if you've dropped it with stty 0. Moved to set_baud, where it - belongs (next to the drop dtr if baud == 0) -- REW */ - /* sx_setsignals (port, 1, -1); */ - - sx_set_baud(port); - -#define CFLAG port->gs.port.tty->termios->c_cflag - sx_write_channel_byte(port, hi_mr1, - (C_PARENB(port->gs.port.tty) ? MR1_WITH : MR1_NONE) | - (C_PARODD(port->gs.port.tty) ? MR1_ODD : MR1_EVEN) | - (C_CRTSCTS(port->gs.port.tty) ? MR1_RTS_RXFLOW : 0) | - (((CFLAG & CSIZE) == CS8) ? MR1_8_BITS : 0) | - (((CFLAG & CSIZE) == CS7) ? MR1_7_BITS : 0) | - (((CFLAG & CSIZE) == CS6) ? MR1_6_BITS : 0) | - (((CFLAG & CSIZE) == CS5) ? MR1_5_BITS : 0)); - - sx_write_channel_byte(port, hi_mr2, - (C_CRTSCTS(port->gs.port.tty) ? MR2_CTS_TXFLOW : 0) | - (C_CSTOPB(port->gs.port.tty) ? MR2_2_STOP : - MR2_1_STOP)); - - switch (CFLAG & CSIZE) { - case CS8: - sx_write_channel_byte(port, hi_mask, 0xff); - break; - case CS7: - sx_write_channel_byte(port, hi_mask, 0x7f); - break; - case CS6: - sx_write_channel_byte(port, hi_mask, 0x3f); - break; - case CS5: - sx_write_channel_byte(port, hi_mask, 0x1f); - break; - default: - printk(KERN_INFO "sx: Invalid wordsize: %u\n", - (unsigned int)CFLAG & CSIZE); - break; - } - - sx_write_channel_byte(port, hi_prtcl, - (I_IXON(port->gs.port.tty) ? SP_TXEN : 0) | - (I_IXOFF(port->gs.port.tty) ? SP_RXEN : 0) | - (I_IXANY(port->gs.port.tty) ? SP_TANY : 0) | SP_DCEN); - - sx_write_channel_byte(port, hi_break, - (I_IGNBRK(port->gs.port.tty) ? BR_IGN : 0 | - I_BRKINT(port->gs.port.tty) ? BR_INT : 0)); - - sx_write_channel_byte(port, hi_txon, START_CHAR(port->gs.port.tty)); - sx_write_channel_byte(port, hi_rxon, START_CHAR(port->gs.port.tty)); - sx_write_channel_byte(port, hi_txoff, STOP_CHAR(port->gs.port.tty)); - sx_write_channel_byte(port, hi_rxoff, STOP_CHAR(port->gs.port.tty)); - - sx_reconfigure_port(port); - - /* Tell line discipline whether we will do input cooking */ - if (I_OTHER(port->gs.port.tty)) { - clear_bit(TTY_HW_COOK_IN, &port->gs.port.tty->flags); - } else { - set_bit(TTY_HW_COOK_IN, &port->gs.port.tty->flags); - } - sx_dprintk(SX_DEBUG_TERMIOS, "iflags: %x(%d) ", - (unsigned int)port->gs.port.tty->termios->c_iflag, - I_OTHER(port->gs.port.tty)); - -/* Tell line discipline whether we will do output cooking. - * If OPOST is set and no other output flags are set then we can do output - * processing. Even if only *one* other flag in the O_OTHER group is set - * we do cooking in software. - */ - if (O_OPOST(port->gs.port.tty) && !O_OTHER(port->gs.port.tty)) { - set_bit(TTY_HW_COOK_OUT, &port->gs.port.tty->flags); - } else { - clear_bit(TTY_HW_COOK_OUT, &port->gs.port.tty->flags); - } - sx_dprintk(SX_DEBUG_TERMIOS, "oflags: %x(%d)\n", - (unsigned int)port->gs.port.tty->termios->c_oflag, - O_OTHER(port->gs.port.tty)); - /* port->c_dcd = sx_get_CD (port); */ - func_exit(); - return 0; -} - -/* ********************************************************************** * - * the interrupt related routines * - * ********************************************************************** */ - -/* Note: - Other drivers use the macro "MIN" to calculate how much to copy. - This has the disadvantage that it will evaluate parts twice. That's - expensive when it's IO (and the compiler cannot optimize those away!). - Moreover, I'm not sure that you're race-free. - - I assign a value, and then only allow the value to decrease. This - is always safe. This makes the code a few lines longer, and you - know I'm dead against that, but I think it is required in this - case. */ - -static void sx_transmit_chars(struct sx_port *port) -{ - int c; - int tx_ip; - int txroom; - - func_enter2(); - sx_dprintk(SX_DEBUG_TRANSMIT, "Port %p: transmit %d chars\n", - port, port->gs.xmit_cnt); - - if (test_and_set_bit(SX_PORT_TRANSMIT_LOCK, &port->locks)) { - return; - } - - while (1) { - c = port->gs.xmit_cnt; - - sx_dprintk(SX_DEBUG_TRANSMIT, "Copying %d ", c); - tx_ip = sx_read_channel_byte(port, hi_txipos); - - /* Took me 5 minutes to deduce this formula. - Luckily it is literally in the manual in section 6.5.4.3.5 */ - txroom = (sx_read_channel_byte(port, hi_txopos) - tx_ip - 1) & - 0xff; - - /* Don't copy more bytes than there is room for in the buffer */ - if (c > txroom) - c = txroom; - sx_dprintk(SX_DEBUG_TRANSMIT, " %d(%d) ", c, txroom); - - /* Don't copy past the end of the hardware transmit buffer */ - if (c > 0x100 - tx_ip) - c = 0x100 - tx_ip; - - sx_dprintk(SX_DEBUG_TRANSMIT, " %d(%d) ", c, 0x100 - tx_ip); - - /* Don't copy pas the end of the source buffer */ - if (c > SERIAL_XMIT_SIZE - port->gs.xmit_tail) - c = SERIAL_XMIT_SIZE - port->gs.xmit_tail; - - sx_dprintk(SX_DEBUG_TRANSMIT, " %d(%ld) \n", - c, SERIAL_XMIT_SIZE - port->gs.xmit_tail); - - /* If for one reason or another, we can't copy more data, we're - done! */ - if (c == 0) - break; - - memcpy_toio(port->board->base + CHAN_OFFSET(port, hi_txbuf) + - tx_ip, port->gs.xmit_buf + port->gs.xmit_tail, c); - - /* Update the pointer in the card */ - sx_write_channel_byte(port, hi_txipos, (tx_ip + c) & 0xff); - - /* Update the kernel buffer end */ - port->gs.xmit_tail = (port->gs.xmit_tail + c) & - (SERIAL_XMIT_SIZE - 1); - - /* This one last. (this is essential) - It would allow others to start putting more data into the - buffer! */ - port->gs.xmit_cnt -= c; - } - - if (port->gs.xmit_cnt == 0) { - sx_disable_tx_interrupts(port); - } - - if ((port->gs.xmit_cnt <= port->gs.wakeup_chars) && port->gs.port.tty) { - tty_wakeup(port->gs.port.tty); - sx_dprintk(SX_DEBUG_TRANSMIT, "Waking up.... ldisc (%d)....\n", - port->gs.wakeup_chars); - } - - clear_bit(SX_PORT_TRANSMIT_LOCK, &port->locks); - func_exit(); -} - -/* Note the symmetry between receiving chars and transmitting them! - Note: The kernel should have implemented both a receive buffer and - a transmit buffer. */ - -/* Inlined: Called only once. Remove the inline when you add another call */ -static inline void sx_receive_chars(struct sx_port *port) -{ - int c; - int rx_op; - struct tty_struct *tty; - int copied = 0; - unsigned char *rp; - - func_enter2(); - tty = port->gs.port.tty; - while (1) { - rx_op = sx_read_channel_byte(port, hi_rxopos); - c = (sx_read_channel_byte(port, hi_rxipos) - rx_op) & 0xff; - - sx_dprintk(SX_DEBUG_RECEIVE, "rxop=%d, c = %d.\n", rx_op, c); - - /* Don't copy past the end of the hardware receive buffer */ - if (rx_op + c > 0x100) - c = 0x100 - rx_op; - - sx_dprintk(SX_DEBUG_RECEIVE, "c = %d.\n", c); - - /* Don't copy more bytes than there is room for in the buffer */ - - c = tty_prepare_flip_string(tty, &rp, c); - - sx_dprintk(SX_DEBUG_RECEIVE, "c = %d.\n", c); - - /* If for one reason or another, we can't copy more data, we're done! */ - if (c == 0) - break; - - sx_dprintk(SX_DEBUG_RECEIVE, "Copying over %d chars. First is " - "%d at %lx\n", c, read_sx_byte(port->board, - CHAN_OFFSET(port, hi_rxbuf) + rx_op), - CHAN_OFFSET(port, hi_rxbuf)); - memcpy_fromio(rp, port->board->base + - CHAN_OFFSET(port, hi_rxbuf) + rx_op, c); - - /* This one last. ( Not essential.) - It allows the card to start putting more data into the - buffer! - Update the pointer in the card */ - sx_write_channel_byte(port, hi_rxopos, (rx_op + c) & 0xff); - - copied += c; - } - if (copied) { - struct timeval tv; - - do_gettimeofday(&tv); - sx_dprintk(SX_DEBUG_RECEIVE, "pushing flipq port %d (%3d " - "chars): %d.%06d (%d/%d)\n", port->line, - copied, (int)(tv.tv_sec % 60), (int)tv.tv_usec, - tty->raw, tty->real_raw); - - /* Tell the rest of the system the news. Great news. New - characters! */ - tty_flip_buffer_push(tty); - /* tty_schedule_flip (tty); */ - } - - func_exit(); -} - -/* Inlined: it is called only once. Remove the inline if you add another - call */ -static inline void sx_check_modem_signals(struct sx_port *port) -{ - int hi_state; - int c_dcd; - - hi_state = sx_read_channel_byte(port, hi_state); - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "Checking modem signals (%d/%d)\n", - port->c_dcd, tty_port_carrier_raised(&port->gs.port)); - - if (hi_state & ST_BREAK) { - hi_state &= ~ST_BREAK; - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "got a break.\n"); - sx_write_channel_byte(port, hi_state, hi_state); - gs_got_break(&port->gs); - } - if (hi_state & ST_DCD) { - hi_state &= ~ST_DCD; - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "got a DCD change.\n"); - sx_write_channel_byte(port, hi_state, hi_state); - c_dcd = tty_port_carrier_raised(&port->gs.port); - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "DCD is now %d\n", c_dcd); - if (c_dcd != port->c_dcd) { - port->c_dcd = c_dcd; - if (tty_port_carrier_raised(&port->gs.port)) { - /* DCD went UP */ - if ((sx_read_channel_byte(port, hi_hstat) != - HS_IDLE_CLOSED) && - !(port->gs.port.tty->termios-> - c_cflag & CLOCAL)) { - /* Are we blocking in open? */ - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "DCD " - "active, unblocking open\n"); - wake_up_interruptible(&port->gs.port. - open_wait); - } else { - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "DCD " - "raised. Ignoring.\n"); - } - } else { - /* DCD went down! */ - if (!(port->gs.port.tty->termios->c_cflag & CLOCAL)){ - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "DCD " - "dropped. hanging up....\n"); - tty_hangup(port->gs.port.tty); - } else { - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "DCD " - "dropped. ignoring.\n"); - } - } - } else { - sx_dprintk(SX_DEBUG_MODEMSIGNALS, "Hmmm. card told us " - "DCD changed, but it didn't.\n"); - } - } -} - -/* This is what an interrupt routine should look like. - * Small, elegant, clear. - */ - -static irqreturn_t sx_interrupt(int irq, void *ptr) -{ - struct sx_board *board = ptr; - struct sx_port *port; - int i; - - func_enter(); - sx_dprintk(SX_DEBUG_FLOW, "sx: enter sx_interrupt (%d/%d)\n", irq, - board->irq); - - /* AAargh! The order in which to do these things is essential and - not trivial. - - - Rate limit goes before "recursive". Otherwise a series of - recursive calls will hang the machine in the interrupt routine. - - - hardware twiddling goes before "recursive". Otherwise when we - poll the card, and a recursive interrupt happens, we won't - ack the card, so it might keep on interrupting us. (especially - level sensitive interrupt systems like PCI). - - - Rate limit goes before hardware twiddling. Otherwise we won't - catch a card that has gone bonkers. - - - The "initialized" test goes after the hardware twiddling. Otherwise - the card will stick us in the interrupt routine again. - - - The initialized test goes before recursive. - */ - -#ifdef IRQ_RATE_LIMIT - /* Aaargh! I'm ashamed. This costs more lines-of-code than the - actual interrupt routine!. (Well, used to when I wrote that - comment) */ - { - static int lastjif; - static int nintr = 0; - - if (lastjif == jiffies) { - if (++nintr > IRQ_RATE_LIMIT) { - free_irq(board->irq, board); - printk(KERN_ERR "sx: Too many interrupts. " - "Turning off interrupt %d.\n", - board->irq); - } - } else { - lastjif = jiffies; - nintr = 0; - } - } -#endif - - if (board->irq == irq) { - /* Tell the card we've noticed the interrupt. */ - - sx_write_board_word(board, cc_int_pending, 0); - if (IS_SX_BOARD(board)) { - write_sx_byte(board, SX_RESET_IRQ, 1); - } else if (IS_EISA_BOARD(board)) { - inb(board->eisa_base + 0xc03); - write_sx_word(board, 8, 0); - } else { - write_sx_byte(board, SI2_ISA_INTCLEAR, - SI2_ISA_INTCLEAR_CLEAR); - write_sx_byte(board, SI2_ISA_INTCLEAR, - SI2_ISA_INTCLEAR_SET); - } - } - - if (!sx_initialized) - return IRQ_HANDLED; - if (!(board->flags & SX_BOARD_INITIALIZED)) - return IRQ_HANDLED; - - if (test_and_set_bit(SX_BOARD_INTR_LOCK, &board->locks)) { - printk(KERN_ERR "Recursive interrupt! (%d)\n", board->irq); - return IRQ_HANDLED; - } - - for (i = 0; i < board->nports; i++) { - port = &board->ports[i]; - if (port->gs.port.flags & GS_ACTIVE) { - if (sx_read_channel_byte(port, hi_state)) { - sx_dprintk(SX_DEBUG_INTERRUPTS, "Port %d: " - "modem signal change?... \n",i); - sx_check_modem_signals(port); - } - if (port->gs.xmit_cnt) { - sx_transmit_chars(port); - } - if (!(port->gs.port.flags & SX_RX_THROTTLE)) { - sx_receive_chars(port); - } - } - } - - clear_bit(SX_BOARD_INTR_LOCK, &board->locks); - - sx_dprintk(SX_DEBUG_FLOW, "sx: exit sx_interrupt (%d/%d)\n", irq, - board->irq); - func_exit(); - return IRQ_HANDLED; -} - -static void sx_pollfunc(unsigned long data) -{ - struct sx_board *board = (struct sx_board *)data; - - func_enter(); - - sx_interrupt(0, board); - - mod_timer(&board->timer, jiffies + sx_poll); - func_exit(); -} - -/* ********************************************************************** * - * Here are the routines that actually * - * interface with the generic_serial driver * - * ********************************************************************** */ - -/* Ehhm. I don't know how to fiddle with interrupts on the SX card. --REW */ -/* Hmm. Ok I figured it out. You don't. */ - -static void sx_disable_tx_interrupts(void *ptr) -{ - struct sx_port *port = ptr; - func_enter2(); - - port->gs.port.flags &= ~GS_TX_INTEN; - - func_exit(); -} - -static void sx_enable_tx_interrupts(void *ptr) -{ - struct sx_port *port = ptr; - int data_in_buffer; - func_enter2(); - - /* First transmit the characters that we're supposed to */ - sx_transmit_chars(port); - - /* The sx card will never interrupt us if we don't fill the buffer - past 25%. So we keep considering interrupts off if that's the case. */ - data_in_buffer = (sx_read_channel_byte(port, hi_txipos) - - sx_read_channel_byte(port, hi_txopos)) & 0xff; - - /* XXX Must be "HIGH_WATER" for SI card according to doc. */ - if (data_in_buffer < LOW_WATER) - port->gs.port.flags &= ~GS_TX_INTEN; - - func_exit(); -} - -static void sx_disable_rx_interrupts(void *ptr) -{ - /* struct sx_port *port = ptr; */ - func_enter(); - - func_exit(); -} - -static void sx_enable_rx_interrupts(void *ptr) -{ - /* struct sx_port *port = ptr; */ - func_enter(); - - func_exit(); -} - -/* Jeez. Isn't this simple? */ -static int sx_carrier_raised(struct tty_port *port) -{ - struct sx_port *sp = container_of(port, struct sx_port, gs.port); - return ((sx_read_channel_byte(sp, hi_ip) & IP_DCD) != 0); -} - -/* Jeez. Isn't this simple? */ -static int sx_chars_in_buffer(void *ptr) -{ - struct sx_port *port = ptr; - func_enter2(); - - func_exit(); - return ((sx_read_channel_byte(port, hi_txipos) - - sx_read_channel_byte(port, hi_txopos)) & 0xff); -} - -static void sx_shutdown_port(void *ptr) -{ - struct sx_port *port = ptr; - - func_enter(); - - port->gs.port.flags &= ~GS_ACTIVE; - if (port->gs.port.tty && (port->gs.port.tty->termios->c_cflag & HUPCL)) { - sx_setsignals(port, 0, 0); - sx_reconfigure_port(port); - } - - func_exit(); -} - -/* ********************************************************************** * - * Here are the routines that actually * - * interface with the rest of the system * - * ********************************************************************** */ - -static int sx_open(struct tty_struct *tty, struct file *filp) -{ - struct sx_port *port; - int retval, line; - unsigned long flags; - - func_enter(); - - if (!sx_initialized) { - return -EIO; - } - - line = tty->index; - sx_dprintk(SX_DEBUG_OPEN, "%d: opening line %d. tty=%p ctty=%p, " - "np=%d)\n", task_pid_nr(current), line, tty, - current->signal->tty, sx_nports); - - if ((line < 0) || (line >= SX_NPORTS) || (line >= sx_nports)) - return -ENODEV; - - port = &sx_ports[line]; - port->c_dcd = 0; /* Make sure that the first interrupt doesn't detect a - 1 -> 0 transition. */ - - sx_dprintk(SX_DEBUG_OPEN, "port = %p c_dcd = %d\n", port, port->c_dcd); - - spin_lock_irqsave(&port->gs.driver_lock, flags); - - tty->driver_data = port; - port->gs.port.tty = tty; - port->gs.port.count++; - spin_unlock_irqrestore(&port->gs.driver_lock, flags); - - sx_dprintk(SX_DEBUG_OPEN, "starting port\n"); - - /* - * Start up serial port - */ - retval = gs_init_port(&port->gs); - sx_dprintk(SX_DEBUG_OPEN, "done gs_init\n"); - if (retval) { - port->gs.port.count--; - return retval; - } - - port->gs.port.flags |= GS_ACTIVE; - if (port->gs.port.count <= 1) - sx_setsignals(port, 1, 1); - -#if 0 - if (sx_debug & SX_DEBUG_OPEN) - my_hd(port, sizeof(*port)); -#else - if (sx_debug & SX_DEBUG_OPEN) - my_hd_io(port->board->base + port->ch_base, sizeof(*port)); -#endif - - if (port->gs.port.count <= 1) { - if (sx_send_command(port, HS_LOPEN, -1, HS_IDLE_OPEN) != 1) { - printk(KERN_ERR "sx: Card didn't respond to LOPEN " - "command.\n"); - spin_lock_irqsave(&port->gs.driver_lock, flags); - port->gs.port.count--; - spin_unlock_irqrestore(&port->gs.driver_lock, flags); - return -EIO; - } - } - - retval = gs_block_til_ready(port, filp); - sx_dprintk(SX_DEBUG_OPEN, "Block til ready returned %d. Count=%d\n", - retval, port->gs.port.count); - - if (retval) { -/* - * Don't lower gs.port.count here because sx_close() will be called later - */ - - return retval; - } - /* tty->low_latency = 1; */ - - port->c_dcd = sx_carrier_raised(&port->gs.port); - sx_dprintk(SX_DEBUG_OPEN, "at open: cd=%d\n", port->c_dcd); - - func_exit(); - return 0; - -} - -static void sx_close(void *ptr) -{ - struct sx_port *port = ptr; - /* Give the port 5 seconds to close down. */ - int to = 5 * HZ; - - func_enter(); - - sx_setsignals(port, 0, 0); - sx_reconfigure_port(port); - sx_send_command(port, HS_CLOSE, 0, 0); - - while (to-- && (sx_read_channel_byte(port, hi_hstat) != HS_IDLE_CLOSED)) - if (msleep_interruptible(10)) - break; - if (sx_read_channel_byte(port, hi_hstat) != HS_IDLE_CLOSED) { - if (sx_send_command(port, HS_FORCE_CLOSED, -1, HS_IDLE_CLOSED) - != 1) { - printk(KERN_ERR "sx: sent the force_close command, but " - "card didn't react\n"); - } else - sx_dprintk(SX_DEBUG_CLOSE, "sent the force_close " - "command.\n"); - } - - sx_dprintk(SX_DEBUG_CLOSE, "waited %d jiffies for close. count=%d\n", - 5 * HZ - to - 1, port->gs.port.count); - - if (port->gs.port.count) { - sx_dprintk(SX_DEBUG_CLOSE, "WARNING port count:%d\n", - port->gs.port.count); - /*printk("%s SETTING port count to zero: %p count: %d\n", - __func__, port, port->gs.port.count); - port->gs.port.count = 0;*/ - } - - func_exit(); -} - -/* This is relatively thorough. But then again it is only 20 lines. */ -#define MARCHUP for (i = min; i < max; i++) -#define MARCHDOWN for (i = max - 1; i >= min; i--) -#define W0 write_sx_byte(board, i, 0x55) -#define W1 write_sx_byte(board, i, 0xaa) -#define R0 if (read_sx_byte(board, i) != 0x55) return 1 -#define R1 if (read_sx_byte(board, i) != 0xaa) return 1 - -/* This memtest takes a human-noticeable time. You normally only do it - once a boot, so I guess that it is worth it. */ -static int do_memtest(struct sx_board *board, int min, int max) -{ - int i; - - /* This is a marchb. Theoretically, marchb catches much more than - simpler tests. In practise, the longer test just catches more - intermittent errors. -- REW - (For the theory behind memory testing see: - Testing Semiconductor Memories by A.J. van de Goor.) */ - MARCHUP { - W0; - } - MARCHUP { - R0; - W1; - R1; - W0; - R0; - W1; - } - MARCHUP { - R1; - W0; - W1; - } - MARCHDOWN { - R1; - W0; - W1; - W0; - } - MARCHDOWN { - R0; - W1; - W0; - } - - return 0; -} - -#undef MARCHUP -#undef MARCHDOWN -#undef W0 -#undef W1 -#undef R0 -#undef R1 - -#define MARCHUP for (i = min; i < max; i += 2) -#define MARCHDOWN for (i = max - 1; i >= min; i -= 2) -#define W0 write_sx_word(board, i, 0x55aa) -#define W1 write_sx_word(board, i, 0xaa55) -#define R0 if (read_sx_word(board, i) != 0x55aa) return 1 -#define R1 if (read_sx_word(board, i) != 0xaa55) return 1 - -#if 0 -/* This memtest takes a human-noticeable time. You normally only do it - once a boot, so I guess that it is worth it. */ -static int do_memtest_w(struct sx_board *board, int min, int max) -{ - int i; - - MARCHUP { - W0; - } - MARCHUP { - R0; - W1; - R1; - W0; - R0; - W1; - } - MARCHUP { - R1; - W0; - W1; - } - MARCHDOWN { - R1; - W0; - W1; - W0; - } - MARCHDOWN { - R0; - W1; - W0; - } - - return 0; -} -#endif - -static long sx_fw_ioctl(struct file *filp, unsigned int cmd, - unsigned long arg) -{ - long rc = 0; - int __user *descr = (int __user *)arg; - int i; - static struct sx_board *board = NULL; - int nbytes, offset; - unsigned long data; - char *tmp; - - func_enter(); - - if (!capable(CAP_SYS_RAWIO)) - return -EPERM; - - tty_lock(); - - sx_dprintk(SX_DEBUG_FIRMWARE, "IOCTL %x: %lx\n", cmd, arg); - - if (!board) - board = &boards[0]; - if (board->flags & SX_BOARD_PRESENT) { - sx_dprintk(SX_DEBUG_FIRMWARE, "Board present! (%x)\n", - board->flags); - } else { - sx_dprintk(SX_DEBUG_FIRMWARE, "Board not present! (%x) all:", - board->flags); - for (i = 0; i < SX_NBOARDS; i++) - sx_dprintk(SX_DEBUG_FIRMWARE, "<%x> ", boards[i].flags); - sx_dprintk(SX_DEBUG_FIRMWARE, "\n"); - rc = -EIO; - goto out; - } - - switch (cmd) { - case SXIO_SET_BOARD: - sx_dprintk(SX_DEBUG_FIRMWARE, "set board to %ld\n", arg); - rc = -EIO; - if (arg >= SX_NBOARDS) - break; - sx_dprintk(SX_DEBUG_FIRMWARE, "not out of range\n"); - if (!(boards[arg].flags & SX_BOARD_PRESENT)) - break; - sx_dprintk(SX_DEBUG_FIRMWARE, ".. and present!\n"); - board = &boards[arg]; - rc = 0; - /* FIXME: And this does ... nothing?? */ - break; - case SXIO_GET_TYPE: - rc = -ENOENT; /* If we manage to miss one, return error. */ - if (IS_SX_BOARD(board)) - rc = SX_TYPE_SX; - if (IS_CF_BOARD(board)) - rc = SX_TYPE_CF; - if (IS_SI_BOARD(board)) - rc = SX_TYPE_SI; - if (IS_SI1_BOARD(board)) - rc = SX_TYPE_SI; - if (IS_EISA_BOARD(board)) - rc = SX_TYPE_SI; - sx_dprintk(SX_DEBUG_FIRMWARE, "returning type= %ld\n", rc); - break; - case SXIO_DO_RAMTEST: - if (sx_initialized) { /* Already initialized: better not ramtest the board. */ - rc = -EPERM; - break; - } - if (IS_SX_BOARD(board)) { - rc = do_memtest(board, 0, 0x7000); - if (!rc) - rc = do_memtest(board, 0, 0x7000); - /*if (!rc) rc = do_memtest_w (board, 0, 0x7000); */ - } else { - rc = do_memtest(board, 0, 0x7ff8); - /* if (!rc) rc = do_memtest_w (board, 0, 0x7ff8); */ - } - sx_dprintk(SX_DEBUG_FIRMWARE, - "returning memtest result= %ld\n", rc); - break; - case SXIO_DOWNLOAD: - if (sx_initialized) {/* Already initialized */ - rc = -EEXIST; - break; - } - if (!sx_reset(board)) { - rc = -EIO; - break; - } - sx_dprintk(SX_DEBUG_INIT, "reset the board...\n"); - - tmp = kmalloc(SX_CHUNK_SIZE, GFP_USER); - if (!tmp) { - rc = -ENOMEM; - break; - } - /* FIXME: check returns */ - get_user(nbytes, descr++); - get_user(offset, descr++); - get_user(data, descr++); - while (nbytes && data) { - for (i = 0; i < nbytes; i += SX_CHUNK_SIZE) { - if (copy_from_user(tmp, (char __user *)data + i, - (i + SX_CHUNK_SIZE > nbytes) ? - nbytes - i : SX_CHUNK_SIZE)) { - kfree(tmp); - rc = -EFAULT; - goto out; - } - memcpy_toio(board->base2 + offset + i, tmp, - (i + SX_CHUNK_SIZE > nbytes) ? - nbytes - i : SX_CHUNK_SIZE); - } - - get_user(nbytes, descr++); - get_user(offset, descr++); - get_user(data, descr++); - } - kfree(tmp); - sx_nports += sx_init_board(board); - rc = sx_nports; - break; - case SXIO_INIT: - if (sx_initialized) { /* Already initialized */ - rc = -EEXIST; - break; - } - /* This is not allowed until all boards are initialized... */ - for (i = 0; i < SX_NBOARDS; i++) { - if ((boards[i].flags & SX_BOARD_PRESENT) && - !(boards[i].flags & SX_BOARD_INITIALIZED)) { - rc = -EIO; - break; - } - } - for (i = 0; i < SX_NBOARDS; i++) - if (!(boards[i].flags & SX_BOARD_PRESENT)) - break; - - sx_dprintk(SX_DEBUG_FIRMWARE, "initing portstructs, %d boards, " - "%d channels, first board: %d ports\n", - i, sx_nports, boards[0].nports); - rc = sx_init_portstructs(i, sx_nports); - sx_init_drivers(); - if (rc >= 0) - sx_initialized++; - break; - case SXIO_SETDEBUG: - sx_debug = arg; - break; - case SXIO_GETDEBUG: - rc = sx_debug; - break; - case SXIO_GETGSDEBUG: - case SXIO_SETGSDEBUG: - rc = -EINVAL; - break; - case SXIO_GETNPORTS: - rc = sx_nports; - break; - default: - rc = -ENOTTY; - break; - } -out: - tty_unlock(); - func_exit(); - return rc; -} - -static int sx_break(struct tty_struct *tty, int flag) -{ - struct sx_port *port = tty->driver_data; - int rv; - - func_enter(); - tty_lock(); - - if (flag) - rv = sx_send_command(port, HS_START, -1, HS_IDLE_BREAK); - else - rv = sx_send_command(port, HS_STOP, -1, HS_IDLE_OPEN); - if (rv != 1) - printk(KERN_ERR "sx: couldn't send break (%x).\n", - read_sx_byte(port->board, CHAN_OFFSET(port, hi_hstat))); - tty_unlock(); - func_exit(); - return 0; -} - -static int sx_tiocmget(struct tty_struct *tty) -{ - struct sx_port *port = tty->driver_data; - return sx_getsignals(port); -} - -static int sx_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct sx_port *port = tty->driver_data; - int rts = -1, dtr = -1; - - if (set & TIOCM_RTS) - rts = 1; - if (set & TIOCM_DTR) - dtr = 1; - if (clear & TIOCM_RTS) - rts = 0; - if (clear & TIOCM_DTR) - dtr = 0; - - sx_setsignals(port, dtr, rts); - sx_reconfigure_port(port); - return 0; -} - -static int sx_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - int rc; - struct sx_port *port = tty->driver_data; - void __user *argp = (void __user *)arg; - - /* func_enter2(); */ - - rc = 0; - tty_lock(); - switch (cmd) { - case TIOCGSERIAL: - rc = gs_getserial(&port->gs, argp); - break; - case TIOCSSERIAL: - rc = gs_setserial(&port->gs, argp); - break; - default: - rc = -ENOIOCTLCMD; - break; - } - tty_unlock(); - - /* func_exit(); */ - return rc; -} - -/* The throttle/unthrottle scheme for the Specialix card is different - * from other drivers and deserves some explanation. - * The Specialix hardware takes care of XON/XOFF - * and CTS/RTS flow control itself. This means that all we have to - * do when signalled by the upper tty layer to throttle/unthrottle is - * to make a note of it here. When we come to read characters from the - * rx buffers on the card (sx_receive_chars()) we look to see if the - * upper layer can accept more (as noted here in sx_rx_throt[]). - * If it can't we simply don't remove chars from the cards buffer. - * When the tty layer can accept chars, we again note that here and when - * sx_receive_chars() is called it will remove them from the cards buffer. - * The card will notice that a ports buffer has drained below some low - * water mark and will unflow control the line itself, using whatever - * flow control scheme is in use for that port. -- Simon Allen - */ - -static void sx_throttle(struct tty_struct *tty) -{ - struct sx_port *port = tty->driver_data; - - func_enter2(); - /* If the port is using any type of input flow - * control then throttle the port. - */ - if ((tty->termios->c_cflag & CRTSCTS) || (I_IXOFF(tty))) { - port->gs.port.flags |= SX_RX_THROTTLE; - } - func_exit(); -} - -static void sx_unthrottle(struct tty_struct *tty) -{ - struct sx_port *port = tty->driver_data; - - func_enter2(); - /* Always unthrottle even if flow control is not enabled on - * this port in case we disabled flow control while the port - * was throttled - */ - port->gs.port.flags &= ~SX_RX_THROTTLE; - func_exit(); - return; -} - -/* ********************************************************************** * - * Here are the initialization routines. * - * ********************************************************************** */ - -static int sx_init_board(struct sx_board *board) -{ - int addr; - int chans; - int type; - - func_enter(); - - /* This is preceded by downloading the download code. */ - - board->flags |= SX_BOARD_INITIALIZED; - - if (read_sx_byte(board, 0)) - /* CF boards may need this. */ - write_sx_byte(board, 0, 0); - - /* This resets the processor again, to make sure it didn't do any - foolish things while we were downloading the image */ - if (!sx_reset(board)) - return 0; - - sx_start_board(board); - udelay(10); - if (!sx_busy_wait_neq(board, 0, 0xff, 0)) { - printk(KERN_ERR "sx: Ooops. Board won't initialize.\n"); - return 0; - } - - /* Ok. So now the processor on the card is running. It gathered - some info for us... */ - sx_dprintk(SX_DEBUG_INIT, "The sxcard structure:\n"); - if (sx_debug & SX_DEBUG_INIT) - my_hd_io(board->base, 0x10); - sx_dprintk(SX_DEBUG_INIT, "the first sx_module structure:\n"); - if (sx_debug & SX_DEBUG_INIT) - my_hd_io(board->base + 0x80, 0x30); - - sx_dprintk(SX_DEBUG_INIT, "init_status: %x, %dk memory, firmware " - "V%x.%02x,\n", - read_sx_byte(board, 0), read_sx_byte(board, 1), - read_sx_byte(board, 5), read_sx_byte(board, 4)); - - if (read_sx_byte(board, 0) == 0xff) { - printk(KERN_INFO "sx: No modules found. Sorry.\n"); - board->nports = 0; - return 0; - } - - chans = 0; - - if (IS_SX_BOARD(board)) { - sx_write_board_word(board, cc_int_count, sx_maxints); - } else { - if (sx_maxints) - sx_write_board_word(board, cc_int_count, - SI_PROCESSOR_CLOCK / 8 / sx_maxints); - } - - /* grab the first module type... */ - /* board->ta_type = mod_compat_type (read_sx_byte (board, 0x80 + 0x08)); */ - board->ta_type = mod_compat_type(sx_read_module_byte(board, 0x80, - mc_chip)); - - /* XXX byteorder */ - for (addr = 0x80; addr != 0; addr = read_sx_word(board, addr) & 0x7fff){ - type = sx_read_module_byte(board, addr, mc_chip); - sx_dprintk(SX_DEBUG_INIT, "Module at %x: %d channels\n", - addr, read_sx_byte(board, addr + 2)); - - chans += sx_read_module_byte(board, addr, mc_type); - - sx_dprintk(SX_DEBUG_INIT, "module is an %s, which has %s/%s " - "panels\n", - mod_type_s(type), - pan_type_s(sx_read_module_byte(board, addr, - mc_mods) & 0xf), - pan_type_s(sx_read_module_byte(board, addr, - mc_mods) >> 4)); - - sx_dprintk(SX_DEBUG_INIT, "CD1400 versions: %x/%x, ASIC " - "version: %x\n", - sx_read_module_byte(board, addr, mc_rev1), - sx_read_module_byte(board, addr, mc_rev2), - sx_read_module_byte(board, addr, mc_mtaasic_rev)); - - /* The following combinations are illegal: It should theoretically - work, but timing problems make the bus HANG. */ - - if (mod_compat_type(type) != board->ta_type) { - printk(KERN_ERR "sx: This is an invalid " - "configuration.\nDon't mix TA/MTA/SXDC on the " - "same hostadapter.\n"); - chans = 0; - break; - } - if ((IS_EISA_BOARD(board) || - IS_SI_BOARD(board)) && - (mod_compat_type(type) == 4)) { - printk(KERN_ERR "sx: This is an invalid " - "configuration.\nDon't use SXDCs on an SI/XIO " - "adapter.\n"); - chans = 0; - break; - } -#if 0 /* Problem fixed: firmware 3.05 */ - if (IS_SX_BOARD(board) && (type == TA8)) { - /* There are some issues with the firmware and the DCD/RTS - lines. It might work if you tie them together or something. - It might also work if you get a newer sx_firmware. Therefore - this is just a warning. */ - printk(KERN_WARNING - "sx: The SX host doesn't work too well " - "with the TA8 adapters.\nSpecialix is working on it.\n"); - } -#endif - } - - if (chans) { - if (board->irq > 0) { - /* fixed irq, probably PCI */ - if (sx_irqmask & (1 << board->irq)) { /* may we use this irq? */ - if (request_irq(board->irq, sx_interrupt, - IRQF_SHARED | IRQF_DISABLED, - "sx", board)) { - printk(KERN_ERR "sx: Cannot allocate " - "irq %d.\n", board->irq); - board->irq = 0; - } - } else - board->irq = 0; - } else if (board->irq < 0 && sx_irqmask) { - /* auto-allocate irq */ - int irqnr; - int irqmask = sx_irqmask & (IS_SX_BOARD(board) ? - SX_ISA_IRQ_MASK : SI2_ISA_IRQ_MASK); - for (irqnr = 15; irqnr > 0; irqnr--) - if (irqmask & (1 << irqnr)) - if (!request_irq(irqnr, sx_interrupt, - IRQF_SHARED | IRQF_DISABLED, - "sx", board)) - break; - if (!irqnr) - printk(KERN_ERR "sx: Cannot allocate IRQ.\n"); - board->irq = irqnr; - } else - board->irq = 0; - - if (board->irq) { - /* Found a valid interrupt, start up interrupts! */ - sx_dprintk(SX_DEBUG_INIT, "Using irq %d.\n", - board->irq); - sx_start_interrupts(board); - board->poll = sx_slowpoll; - board->flags |= SX_IRQ_ALLOCATED; - } else { - /* no irq: setup board for polled operation */ - board->poll = sx_poll; - sx_dprintk(SX_DEBUG_INIT, "Using poll-interval %d.\n", - board->poll); - } - - /* The timer should be initialized anyway: That way we can - safely del_timer it when the module is unloaded. */ - setup_timer(&board->timer, sx_pollfunc, (unsigned long)board); - - if (board->poll) - mod_timer(&board->timer, jiffies + board->poll); - } else { - board->irq = 0; - } - - board->nports = chans; - sx_dprintk(SX_DEBUG_INIT, "returning %d ports.", board->nports); - - func_exit(); - return chans; -} - -static void __devinit printheader(void) -{ - static int header_printed; - - if (!header_printed) { - printk(KERN_INFO "Specialix SX driver " - "(C) 1998/1999 R.E.Wolff@BitWizard.nl\n"); - printk(KERN_INFO "sx: version " __stringify(SX_VERSION) "\n"); - header_printed = 1; - } -} - -static int __devinit probe_sx(struct sx_board *board) -{ - struct vpd_prom vpdp; - char *p; - int i; - - func_enter(); - - if (!IS_CF_BOARD(board)) { - sx_dprintk(SX_DEBUG_PROBE, "Going to verify vpd prom at %p.\n", - board->base + SX_VPD_ROM); - - if (sx_debug & SX_DEBUG_PROBE) - my_hd_io(board->base + SX_VPD_ROM, 0x40); - - p = (char *)&vpdp; - for (i = 0; i < sizeof(struct vpd_prom); i++) - *p++ = read_sx_byte(board, SX_VPD_ROM + i * 2); - - if (sx_debug & SX_DEBUG_PROBE) - my_hd(&vpdp, 0x20); - - sx_dprintk(SX_DEBUG_PROBE, "checking identifier...\n"); - - if (strncmp(vpdp.identifier, SX_VPD_IDENT_STRING, 16) != 0) { - sx_dprintk(SX_DEBUG_PROBE, "Got non-SX identifier: " - "'%s'\n", vpdp.identifier); - return 0; - } - } - - printheader(); - - if (!IS_CF_BOARD(board)) { - printk(KERN_DEBUG "sx: Found an SX board at %lx\n", - board->hw_base); - printk(KERN_DEBUG "sx: hw_rev: %d, assembly level: %d, " - "uniq ID:%08x, ", - vpdp.hwrev, vpdp.hwass, vpdp.uniqid); - printk("Manufactured: %d/%d\n", 1970 + vpdp.myear, vpdp.mweek); - - if ((((vpdp.uniqid >> 24) & SX_UNIQUEID_MASK) != - SX_PCI_UNIQUEID1) && (((vpdp.uniqid >> 24) & - SX_UNIQUEID_MASK) != SX_ISA_UNIQUEID1)) { - /* This might be a bit harsh. This was the primary - reason the SX/ISA card didn't work at first... */ - printk(KERN_ERR "sx: Hmm. Not an SX/PCI or SX/ISA " - "card. Sorry: giving up.\n"); - return (0); - } - - if (((vpdp.uniqid >> 24) & SX_UNIQUEID_MASK) == - SX_ISA_UNIQUEID1) { - if (((unsigned long)board->hw_base) & 0x8000) { - printk(KERN_WARNING "sx: Warning: There may be " - "hardware problems with the card at " - "%lx.\n", board->hw_base); - printk(KERN_WARNING "sx: Read sx.txt for more " - "info.\n"); - } - } - } - - board->nports = -1; - - /* This resets the processor, and keeps it off the bus. */ - if (!sx_reset(board)) - return 0; - sx_dprintk(SX_DEBUG_INIT, "reset the board...\n"); - - func_exit(); - return 1; -} - -#if defined(CONFIG_ISA) || defined(CONFIG_EISA) - -/* Specialix probes for this card at 32k increments from 640k to 16M. - I consider machines with less than 16M unlikely nowadays, so I'm - not probing above 1Mb. Also, 0xa0000, 0xb0000, are taken by the VGA - card. 0xe0000 and 0xf0000 are taken by the BIOS. That only leaves - 0xc0000, 0xc8000, 0xd0000 and 0xd8000 . */ - -static int __devinit probe_si(struct sx_board *board) -{ - int i; - - func_enter(); - sx_dprintk(SX_DEBUG_PROBE, "Going to verify SI signature hw %lx at " - "%p.\n", board->hw_base, board->base + SI2_ISA_ID_BASE); - - if (sx_debug & SX_DEBUG_PROBE) - my_hd_io(board->base + SI2_ISA_ID_BASE, 0x8); - - if (!IS_EISA_BOARD(board)) { - if (IS_SI1_BOARD(board)) { - for (i = 0; i < 8; i++) { - write_sx_byte(board, SI2_ISA_ID_BASE + 7 - i,i); - } - } - for (i = 0; i < 8; i++) { - if ((read_sx_byte(board, SI2_ISA_ID_BASE + 7 - i) & 7) - != i) { - func_exit(); - return 0; - } - } - } - - /* Now we're pretty much convinced that there is an SI board here, - but to prevent trouble, we'd better double check that we don't - have an SI1 board when we're probing for an SI2 board.... */ - - write_sx_byte(board, SI2_ISA_ID_BASE, 0x10); - if (IS_SI1_BOARD(board)) { - /* This should be an SI1 board, which has this - location writable... */ - if (read_sx_byte(board, SI2_ISA_ID_BASE) != 0x10) { - func_exit(); - return 0; - } - } else { - /* This should be an SI2 board, which has the bottom - 3 bits non-writable... */ - if (read_sx_byte(board, SI2_ISA_ID_BASE) == 0x10) { - func_exit(); - return 0; - } - } - - /* Now we're pretty much convinced that there is an SI board here, - but to prevent trouble, we'd better double check that we don't - have an SI1 board when we're probing for an SI2 board.... */ - - write_sx_byte(board, SI2_ISA_ID_BASE, 0x10); - if (IS_SI1_BOARD(board)) { - /* This should be an SI1 board, which has this - location writable... */ - if (read_sx_byte(board, SI2_ISA_ID_BASE) != 0x10) { - func_exit(); - return 0; - } - } else { - /* This should be an SI2 board, which has the bottom - 3 bits non-writable... */ - if (read_sx_byte(board, SI2_ISA_ID_BASE) == 0x10) { - func_exit(); - return 0; - } - } - - printheader(); - - printk(KERN_DEBUG "sx: Found an SI board at %lx\n", board->hw_base); - /* Compared to the SX boards, it is a complete guess as to what - this card is up to... */ - - board->nports = -1; - - /* This resets the processor, and keeps it off the bus. */ - if (!sx_reset(board)) - return 0; - sx_dprintk(SX_DEBUG_INIT, "reset the board...\n"); - - func_exit(); - return 1; -} -#endif - -static const struct tty_operations sx_ops = { - .break_ctl = sx_break, - .open = sx_open, - .close = gs_close, - .write = gs_write, - .put_char = gs_put_char, - .flush_chars = gs_flush_chars, - .write_room = gs_write_room, - .chars_in_buffer = gs_chars_in_buffer, - .flush_buffer = gs_flush_buffer, - .ioctl = sx_ioctl, - .throttle = sx_throttle, - .unthrottle = sx_unthrottle, - .set_termios = gs_set_termios, - .stop = gs_stop, - .start = gs_start, - .hangup = gs_hangup, - .tiocmget = sx_tiocmget, - .tiocmset = sx_tiocmset, -}; - -static const struct tty_port_operations sx_port_ops = { - .carrier_raised = sx_carrier_raised, -}; - -static int sx_init_drivers(void) -{ - int error; - - func_enter(); - - sx_driver = alloc_tty_driver(sx_nports); - if (!sx_driver) - return 1; - sx_driver->owner = THIS_MODULE; - sx_driver->driver_name = "specialix_sx"; - sx_driver->name = "ttyX"; - sx_driver->major = SX_NORMAL_MAJOR; - sx_driver->type = TTY_DRIVER_TYPE_SERIAL; - sx_driver->subtype = SERIAL_TYPE_NORMAL; - sx_driver->init_termios = tty_std_termios; - sx_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; - sx_driver->init_termios.c_ispeed = 9600; - sx_driver->init_termios.c_ospeed = 9600; - sx_driver->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(sx_driver, &sx_ops); - - if ((error = tty_register_driver(sx_driver))) { - put_tty_driver(sx_driver); - printk(KERN_ERR "sx: Couldn't register sx driver, error = %d\n", - error); - return 1; - } - func_exit(); - return 0; -} - -static int sx_init_portstructs(int nboards, int nports) -{ - struct sx_board *board; - struct sx_port *port; - int i, j; - int addr, chans; - int portno; - - func_enter(); - - /* Many drivers statically allocate the maximum number of ports - There is no reason not to allocate them dynamically. - Is there? -- REW */ - sx_ports = kcalloc(nports, sizeof(struct sx_port), GFP_KERNEL); - if (!sx_ports) - return -ENOMEM; - - port = sx_ports; - for (i = 0; i < nboards; i++) { - board = &boards[i]; - board->ports = port; - for (j = 0; j < boards[i].nports; j++) { - sx_dprintk(SX_DEBUG_INIT, "initing port %d\n", j); - tty_port_init(&port->gs.port); - port->gs.port.ops = &sx_port_ops; - port->gs.magic = SX_MAGIC; - port->gs.close_delay = HZ / 2; - port->gs.closing_wait = 30 * HZ; - port->board = board; - port->gs.rd = &sx_real_driver; -#ifdef NEW_WRITE_LOCKING - port->gs.port_write_mutex = MUTEX; -#endif - spin_lock_init(&port->gs.driver_lock); - /* - * Initializing wait queue - */ - port++; - } - } - - port = sx_ports; - portno = 0; - for (i = 0; i < nboards; i++) { - board = &boards[i]; - board->port_base = portno; - /* Possibly the configuration was rejected. */ - sx_dprintk(SX_DEBUG_PROBE, "Board has %d channels\n", - board->nports); - if (board->nports <= 0) - continue; - /* XXX byteorder ?? */ - for (addr = 0x80; addr != 0; - addr = read_sx_word(board, addr) & 0x7fff) { - chans = sx_read_module_byte(board, addr, mc_type); - sx_dprintk(SX_DEBUG_PROBE, "Module at %x: %d " - "channels\n", addr, chans); - sx_dprintk(SX_DEBUG_PROBE, "Port at"); - for (j = 0; j < chans; j++) { - /* The "sx-way" is the way it SHOULD be done. - That way in the future, the firmware may for - example pack the structures a bit more - efficient. Neil tells me it isn't going to - happen anytime soon though. */ - if (IS_SX_BOARD(board)) - port->ch_base = sx_read_module_word( - board, addr + j * 2, - mc_chan_pointer); - else - port->ch_base = addr + 0x100 + 0x300 *j; - - sx_dprintk(SX_DEBUG_PROBE, " %x", - port->ch_base); - port->line = portno++; - port++; - } - sx_dprintk(SX_DEBUG_PROBE, "\n"); - } - /* This has to be done earlier. */ - /* board->flags |= SX_BOARD_INITIALIZED; */ - } - - func_exit(); - return 0; -} - -static unsigned int sx_find_free_board(void) -{ - unsigned int i; - - for (i = 0; i < SX_NBOARDS; i++) - if (!(boards[i].flags & SX_BOARD_PRESENT)) - break; - - return i; -} - -static void __exit sx_release_drivers(void) -{ - func_enter(); - tty_unregister_driver(sx_driver); - put_tty_driver(sx_driver); - func_exit(); -} - -static void __devexit sx_remove_card(struct sx_board *board, - struct pci_dev *pdev) -{ - if (board->flags & SX_BOARD_INITIALIZED) { - /* The board should stop messing with us. (actually I mean the - interrupt) */ - sx_reset(board); - if ((board->irq) && (board->flags & SX_IRQ_ALLOCATED)) - free_irq(board->irq, board); - - /* It is safe/allowed to del_timer a non-active timer */ - del_timer(&board->timer); - if (pdev) { -#ifdef CONFIG_PCI - iounmap(board->base2); - pci_release_region(pdev, IS_CF_BOARD(board) ? 3 : 2); -#endif - } else { - iounmap(board->base); - release_region(board->hw_base, board->hw_len); - } - - board->flags &= ~(SX_BOARD_INITIALIZED | SX_BOARD_PRESENT); - } -} - -#ifdef CONFIG_EISA - -static int __devinit sx_eisa_probe(struct device *dev) -{ - struct eisa_device *edev = to_eisa_device(dev); - struct sx_board *board; - unsigned long eisa_slot = edev->base_addr; - unsigned int i; - int retval = -EIO; - - mutex_lock(&sx_boards_lock); - i = sx_find_free_board(); - if (i == SX_NBOARDS) { - mutex_unlock(&sx_boards_lock); - goto err; - } - board = &boards[i]; - board->flags |= SX_BOARD_PRESENT; - mutex_unlock(&sx_boards_lock); - - dev_info(dev, "XIO : Signature found in EISA slot %lu, " - "Product %d Rev %d (REPORT THIS TO LKLM)\n", - eisa_slot >> 12, - inb(eisa_slot + EISA_VENDOR_ID_OFFSET + 2), - inb(eisa_slot + EISA_VENDOR_ID_OFFSET + 3)); - - board->eisa_base = eisa_slot; - board->flags &= ~SX_BOARD_TYPE; - board->flags |= SI_EISA_BOARD; - - board->hw_base = ((inb(eisa_slot + 0xc01) << 8) + - inb(eisa_slot + 0xc00)) << 16; - board->hw_len = SI2_EISA_WINDOW_LEN; - if (!request_region(board->hw_base, board->hw_len, "sx")) { - dev_err(dev, "can't request region\n"); - goto err_flag; - } - board->base2 = - board->base = ioremap_nocache(board->hw_base, SI2_EISA_WINDOW_LEN); - if (!board->base) { - dev_err(dev, "can't remap memory\n"); - goto err_reg; - } - - sx_dprintk(SX_DEBUG_PROBE, "IO hw_base address: %lx\n", board->hw_base); - sx_dprintk(SX_DEBUG_PROBE, "base: %p\n", board->base); - board->irq = inb(eisa_slot + 0xc02) >> 4; - sx_dprintk(SX_DEBUG_PROBE, "IRQ: %d\n", board->irq); - - if (!probe_si(board)) - goto err_unmap; - - dev_set_drvdata(dev, board); - - return 0; -err_unmap: - iounmap(board->base); -err_reg: - release_region(board->hw_base, board->hw_len); -err_flag: - board->flags &= ~SX_BOARD_PRESENT; -err: - return retval; -} - -static int __devexit sx_eisa_remove(struct device *dev) -{ - struct sx_board *board = dev_get_drvdata(dev); - - sx_remove_card(board, NULL); - - return 0; -} - -static struct eisa_device_id sx_eisa_tbl[] = { - { "SLX" }, - { "" } -}; - -MODULE_DEVICE_TABLE(eisa, sx_eisa_tbl); - -static struct eisa_driver sx_eisadriver = { - .id_table = sx_eisa_tbl, - .driver = { - .name = "sx", - .probe = sx_eisa_probe, - .remove = __devexit_p(sx_eisa_remove), - } -}; - -#endif - -#ifdef CONFIG_PCI - /******************************************************** - * Setting bit 17 in the CNTRL register of the PLX 9050 * - * chip forces a retry on writes while a read is pending.* - * This is to prevent the card locking up on Intel Xeon * - * multiprocessor systems with the NX chipset. -- NV * - ********************************************************/ - -/* Newer cards are produced with this bit set from the configuration - EEprom. As the bit is read/write for the CPU, we can fix it here, - if we detect that it isn't set correctly. -- REW */ - -static void __devinit fix_sx_pci(struct pci_dev *pdev, struct sx_board *board) -{ - unsigned int hwbase; - void __iomem *rebase; - unsigned int t; - -#define CNTRL_REG_OFFSET 0x50 -#define CNTRL_REG_GOODVALUE 0x18260000 - - pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &hwbase); - hwbase &= PCI_BASE_ADDRESS_MEM_MASK; - rebase = ioremap_nocache(hwbase, 0x80); - t = readl(rebase + CNTRL_REG_OFFSET); - if (t != CNTRL_REG_GOODVALUE) { - printk(KERN_DEBUG "sx: performing cntrl reg fix: %08x -> " - "%08x\n", t, CNTRL_REG_GOODVALUE); - writel(CNTRL_REG_GOODVALUE, rebase + CNTRL_REG_OFFSET); - } - iounmap(rebase); -} -#endif - -static int __devinit sx_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ -#ifdef CONFIG_PCI - struct sx_board *board; - unsigned int i, reg; - int retval = -EIO; - - mutex_lock(&sx_boards_lock); - i = sx_find_free_board(); - if (i == SX_NBOARDS) { - mutex_unlock(&sx_boards_lock); - goto err; - } - board = &boards[i]; - board->flags |= SX_BOARD_PRESENT; - mutex_unlock(&sx_boards_lock); - - retval = pci_enable_device(pdev); - if (retval) - goto err_flag; - - board->flags &= ~SX_BOARD_TYPE; - board->flags |= (pdev->subsystem_vendor == 0x200) ? SX_PCI_BOARD : - SX_CFPCI_BOARD; - - /* CF boards use base address 3.... */ - reg = IS_CF_BOARD(board) ? 3 : 2; - retval = pci_request_region(pdev, reg, "sx"); - if (retval) { - dev_err(&pdev->dev, "can't request region\n"); - goto err_flag; - } - board->hw_base = pci_resource_start(pdev, reg); - board->base2 = - board->base = ioremap_nocache(board->hw_base, WINDOW_LEN(board)); - if (!board->base) { - dev_err(&pdev->dev, "ioremap failed\n"); - goto err_reg; - } - - /* Most of the stuff on the CF board is offset by 0x18000 .... */ - if (IS_CF_BOARD(board)) - board->base += 0x18000; - - board->irq = pdev->irq; - - dev_info(&pdev->dev, "Got a specialix card: %p(%d) %x.\n", board->base, - board->irq, board->flags); - - if (!probe_sx(board)) { - retval = -EIO; - goto err_unmap; - } - - fix_sx_pci(pdev, board); - - pci_set_drvdata(pdev, board); - - return 0; -err_unmap: - iounmap(board->base2); -err_reg: - pci_release_region(pdev, reg); -err_flag: - board->flags &= ~SX_BOARD_PRESENT; -err: - return retval; -#else - return -ENODEV; -#endif -} - -static void __devexit sx_pci_remove(struct pci_dev *pdev) -{ - struct sx_board *board = pci_get_drvdata(pdev); - - sx_remove_card(board, pdev); -} - -/* Specialix has a whole bunch of cards with 0x2000 as the device ID. They say - its because the standard requires it. So check for SUBVENDOR_ID. */ -static struct pci_device_id sx_pci_tbl[] = { - { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8, - .subvendor = PCI_ANY_ID, .subdevice = 0x0200 }, - { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_SPECIALIX_SX_XIO_IO8, - .subvendor = PCI_ANY_ID, .subdevice = 0x0300 }, - { 0 } -}; - -MODULE_DEVICE_TABLE(pci, sx_pci_tbl); - -static struct pci_driver sx_pcidriver = { - .name = "sx", - .id_table = sx_pci_tbl, - .probe = sx_pci_probe, - .remove = __devexit_p(sx_pci_remove) -}; - -static int __init sx_init(void) -{ -#ifdef CONFIG_EISA - int retval1; -#endif -#ifdef CONFIG_ISA - struct sx_board *board; - unsigned int i; -#endif - unsigned int found = 0; - int retval; - - func_enter(); - sx_dprintk(SX_DEBUG_INIT, "Initing sx module... (sx_debug=%d)\n", - sx_debug); - if (abs((long)(&sx_debug) - sx_debug) < 0x10000) { - printk(KERN_WARNING "sx: sx_debug is an address, instead of a " - "value. Assuming -1.\n(%p)\n", &sx_debug); - sx_debug = -1; - } - - if (misc_register(&sx_fw_device) < 0) { - printk(KERN_ERR "SX: Unable to register firmware loader " - "driver.\n"); - return -EIO; - } -#ifdef CONFIG_ISA - for (i = 0; i < NR_SX_ADDRS; i++) { - board = &boards[found]; - board->hw_base = sx_probe_addrs[i]; - board->hw_len = SX_WINDOW_LEN; - if (!request_region(board->hw_base, board->hw_len, "sx")) - continue; - board->base2 = - board->base = ioremap_nocache(board->hw_base, board->hw_len); - if (!board->base) - goto err_sx_reg; - board->flags &= ~SX_BOARD_TYPE; - board->flags |= SX_ISA_BOARD; - board->irq = sx_irqmask ? -1 : 0; - - if (probe_sx(board)) { - board->flags |= SX_BOARD_PRESENT; - found++; - } else { - iounmap(board->base); -err_sx_reg: - release_region(board->hw_base, board->hw_len); - } - } - - for (i = 0; i < NR_SI_ADDRS; i++) { - board = &boards[found]; - board->hw_base = si_probe_addrs[i]; - board->hw_len = SI2_ISA_WINDOW_LEN; - if (!request_region(board->hw_base, board->hw_len, "sx")) - continue; - board->base2 = - board->base = ioremap_nocache(board->hw_base, board->hw_len); - if (!board->base) - goto err_si_reg; - board->flags &= ~SX_BOARD_TYPE; - board->flags |= SI_ISA_BOARD; - board->irq = sx_irqmask ? -1 : 0; - - if (probe_si(board)) { - board->flags |= SX_BOARD_PRESENT; - found++; - } else { - iounmap(board->base); -err_si_reg: - release_region(board->hw_base, board->hw_len); - } - } - for (i = 0; i < NR_SI1_ADDRS; i++) { - board = &boards[found]; - board->hw_base = si1_probe_addrs[i]; - board->hw_len = SI1_ISA_WINDOW_LEN; - if (!request_region(board->hw_base, board->hw_len, "sx")) - continue; - board->base2 = - board->base = ioremap_nocache(board->hw_base, board->hw_len); - if (!board->base) - goto err_si1_reg; - board->flags &= ~SX_BOARD_TYPE; - board->flags |= SI1_ISA_BOARD; - board->irq = sx_irqmask ? -1 : 0; - - if (probe_si(board)) { - board->flags |= SX_BOARD_PRESENT; - found++; - } else { - iounmap(board->base); -err_si1_reg: - release_region(board->hw_base, board->hw_len); - } - } -#endif -#ifdef CONFIG_EISA - retval1 = eisa_driver_register(&sx_eisadriver); -#endif - retval = pci_register_driver(&sx_pcidriver); - - if (found) { - printk(KERN_INFO "sx: total of %d boards detected.\n", found); - retval = 0; - } else if (retval) { -#ifdef CONFIG_EISA - retval = retval1; - if (retval1) -#endif - misc_deregister(&sx_fw_device); - } - - func_exit(); - return retval; -} - -static void __exit sx_exit(void) -{ - int i; - - func_enter(); -#ifdef CONFIG_EISA - eisa_driver_unregister(&sx_eisadriver); -#endif - pci_unregister_driver(&sx_pcidriver); - - for (i = 0; i < SX_NBOARDS; i++) - sx_remove_card(&boards[i], NULL); - - if (misc_deregister(&sx_fw_device) < 0) { - printk(KERN_INFO "sx: couldn't deregister firmware loader " - "device\n"); - } - sx_dprintk(SX_DEBUG_CLEANUP, "Cleaning up drivers (%d)\n", - sx_initialized); - if (sx_initialized) - sx_release_drivers(); - - kfree(sx_ports); - func_exit(); -} - -module_init(sx_init); -module_exit(sx_exit); diff --git a/drivers/staging/generic_serial/sx.h b/drivers/staging/generic_serial/sx.h deleted file mode 100644 index 87c2def..0000000 --- a/drivers/staging/generic_serial/sx.h +++ /dev/null @@ -1,201 +0,0 @@ - -/* - * sx.h - * - * Copyright (C) 1998/1999 R.E.Wolff@BitWizard.nl - * - * SX serial driver. - * -- Supports SI, XIO and SX host cards. - * -- Supports TAs, MTAs and SXDCs. - * - * Version 1.3 -- March, 1999. - * - */ - -#define SX_NBOARDS 4 -#define SX_PORTSPERBOARD 32 -#define SX_NPORTS (SX_NBOARDS * SX_PORTSPERBOARD) - -#ifdef __KERNEL__ - -#define SX_MAGIC 0x12345678 - -struct sx_port { - struct gs_port gs; - struct wait_queue *shutdown_wait; - int ch_base; - int c_dcd; - struct sx_board *board; - int line; - unsigned long locks; -}; - -struct sx_board { - int magic; - void __iomem *base; - void __iomem *base2; - unsigned long hw_base; - resource_size_t hw_len; - int eisa_base; - int port_base; /* Number of the first port */ - struct sx_port *ports; - int nports; - int flags; - int irq; - int poll; - int ta_type; - struct timer_list timer; - unsigned long locks; -}; - -struct vpd_prom { - unsigned short id; - char hwrev; - char hwass; - int uniqid; - char myear; - char mweek; - char hw_feature[5]; - char oem_id; - char identifier[16]; -}; - -#ifndef MOD_RS232DB25MALE -#define MOD_RS232DB25MALE 0x0a -#endif - -#define SI_ISA_BOARD 0x00000001 -#define SX_ISA_BOARD 0x00000002 -#define SX_PCI_BOARD 0x00000004 -#define SX_CFPCI_BOARD 0x00000008 -#define SX_CFISA_BOARD 0x00000010 -#define SI_EISA_BOARD 0x00000020 -#define SI1_ISA_BOARD 0x00000040 - -#define SX_BOARD_PRESENT 0x00001000 -#define SX_BOARD_INITIALIZED 0x00002000 -#define SX_IRQ_ALLOCATED 0x00004000 - -#define SX_BOARD_TYPE 0x000000ff - -#define IS_SX_BOARD(board) (board->flags & (SX_PCI_BOARD | SX_CFPCI_BOARD | \ - SX_ISA_BOARD | SX_CFISA_BOARD)) - -#define IS_SI_BOARD(board) (board->flags & SI_ISA_BOARD) -#define IS_SI1_BOARD(board) (board->flags & SI1_ISA_BOARD) - -#define IS_EISA_BOARD(board) (board->flags & SI_EISA_BOARD) - -#define IS_CF_BOARD(board) (board->flags & (SX_CFISA_BOARD | SX_CFPCI_BOARD)) - -/* The SI processor clock is required to calculate the cc_int_count register - value for the SI cards. */ -#define SI_PROCESSOR_CLOCK 25000000 - - -/* port flags */ -/* Make sure these don't clash with gs flags or async flags */ -#define SX_RX_THROTTLE 0x0000001 - - - -#define SX_PORT_TRANSMIT_LOCK 0 -#define SX_BOARD_INTR_LOCK 0 - - - -/* Debug flags. Add these together to get more debug info. */ - -#define SX_DEBUG_OPEN 0x00000001 -#define SX_DEBUG_SETTING 0x00000002 -#define SX_DEBUG_FLOW 0x00000004 -#define SX_DEBUG_MODEMSIGNALS 0x00000008 -#define SX_DEBUG_TERMIOS 0x00000010 -#define SX_DEBUG_TRANSMIT 0x00000020 -#define SX_DEBUG_RECEIVE 0x00000040 -#define SX_DEBUG_INTERRUPTS 0x00000080 -#define SX_DEBUG_PROBE 0x00000100 -#define SX_DEBUG_INIT 0x00000200 -#define SX_DEBUG_CLEANUP 0x00000400 -#define SX_DEBUG_CLOSE 0x00000800 -#define SX_DEBUG_FIRMWARE 0x00001000 -#define SX_DEBUG_MEMTEST 0x00002000 - -#define SX_DEBUG_ALL 0xffffffff - - -#define O_OTHER(tty) \ - ((O_OLCUC(tty)) ||\ - (O_ONLCR(tty)) ||\ - (O_OCRNL(tty)) ||\ - (O_ONOCR(tty)) ||\ - (O_ONLRET(tty)) ||\ - (O_OFILL(tty)) ||\ - (O_OFDEL(tty)) ||\ - (O_NLDLY(tty)) ||\ - (O_CRDLY(tty)) ||\ - (O_TABDLY(tty)) ||\ - (O_BSDLY(tty)) ||\ - (O_VTDLY(tty)) ||\ - (O_FFDLY(tty))) - -/* Same for input. */ -#define I_OTHER(tty) \ - ((I_INLCR(tty)) ||\ - (I_IGNCR(tty)) ||\ - (I_ICRNL(tty)) ||\ - (I_IUCLC(tty)) ||\ - (L_ISIG(tty))) - -#define MOD_TA ( TA>>4) -#define MOD_MTA (MTA_CD1400>>4) -#define MOD_SXDC ( SXDC>>4) - - -/* We copy the download code over to the card in chunks of ... bytes */ -#define SX_CHUNK_SIZE 128 - -#endif /* __KERNEL__ */ - - - -/* Specialix document 6210046-11 page 3 */ -#define SPX(X) (('S'<<24) | ('P' << 16) | (X)) - -/* Specialix-Linux specific IOCTLS. */ -#define SPXL(X) (SPX(('L' << 8) | (X))) - - -#define SXIO_SET_BOARD SPXL(0x01) -#define SXIO_GET_TYPE SPXL(0x02) -#define SXIO_DOWNLOAD SPXL(0x03) -#define SXIO_INIT SPXL(0x04) -#define SXIO_SETDEBUG SPXL(0x05) -#define SXIO_GETDEBUG SPXL(0x06) -#define SXIO_DO_RAMTEST SPXL(0x07) -#define SXIO_SETGSDEBUG SPXL(0x08) -#define SXIO_GETGSDEBUG SPXL(0x09) -#define SXIO_GETNPORTS SPXL(0x0a) - - -#ifndef SXCTL_MISC_MINOR -/* Allow others to gather this into "major.h" or something like that */ -#define SXCTL_MISC_MINOR 167 -#endif - -#ifndef SX_NORMAL_MAJOR -/* This allows overriding on the compiler commandline, or in a "major.h" - include or something like that */ -#define SX_NORMAL_MAJOR 32 -#define SX_CALLOUT_MAJOR 33 -#endif - - -#define SX_TYPE_SX 0x01 -#define SX_TYPE_SI 0x02 -#define SX_TYPE_CF 0x03 - - -#define WINDOW_LEN(board) (IS_CF_BOARD(board)?0x20000:SX_WINDOW_LEN) -/* Need a #define for ^^^^^^^ !!! */ - diff --git a/drivers/staging/generic_serial/sxboards.h b/drivers/staging/generic_serial/sxboards.h deleted file mode 100644 index 427927d..0000000 --- a/drivers/staging/generic_serial/sxboards.h +++ /dev/null @@ -1,206 +0,0 @@ -/************************************************************************/ -/* */ -/* Title : SX/SI/XIO Board Hardware Definitions */ -/* */ -/* Author : N.P.Vassallo */ -/* */ -/* Creation : 16th March 1998 */ -/* */ -/* Version : 3.0.0 */ -/* */ -/* Copyright : (c) Specialix International Ltd. 1998 */ -/* */ -/* Description : Prototypes, structures and definitions */ -/* describing the SX/SI/XIO board hardware */ -/* */ -/************************************************************************/ - -/* History... - -3.0.0 16/03/98 NPV Creation. - -*/ - -#ifndef _sxboards_h /* If SXBOARDS.H not already defined */ -#define _sxboards_h 1 - -/***************************************************************************** -******************************* ****************************** -******************************* Board Types ****************************** -******************************* ****************************** -*****************************************************************************/ - -/* BUS types... */ -#define BUS_ISA 0 -#define BUS_MCA 1 -#define BUS_EISA 2 -#define BUS_PCI 3 - -/* Board phases... */ -#define SI1_Z280 1 -#define SI2_Z280 2 -#define SI3_T225 3 - -/* Board types... */ -#define CARD_TYPE(bus,phase) (bus<<4|phase) -#define CARD_BUS(type) ((type>>4)&0xF) -#define CARD_PHASE(type) (type&0xF) - -#define TYPE_SI1_ISA CARD_TYPE(BUS_ISA,SI1_Z280) -#define TYPE_SI2_ISA CARD_TYPE(BUS_ISA,SI2_Z280) -#define TYPE_SI2_EISA CARD_TYPE(BUS_EISA,SI2_Z280) -#define TYPE_SI2_PCI CARD_TYPE(BUS_PCI,SI2_Z280) - -#define TYPE_SX_ISA CARD_TYPE(BUS_ISA,SI3_T225) -#define TYPE_SX_PCI CARD_TYPE(BUS_PCI,SI3_T225) -/***************************************************************************** -****************************** ****************************** -****************************** Phase 1 Z280 ****************************** -****************************** ****************************** -*****************************************************************************/ - -/* ISA board details... */ -#define SI1_ISA_WINDOW_LEN 0x10000 /* 64 Kbyte shared memory window */ -//#define SI1_ISA_MEMORY_LEN 0x8000 /* Usable memory - unused define*/ -//#define SI1_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */ -//#define SI1_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */ -//#define SI2_ISA_ADDR_STEP SI2_ISA_WINDOW_LEN/* ISA board address step */ -//#define SI2_ISA_IRQ_MASK 0x9800 /* IRQs 15,12,11 */ - -/* ISA board, register definitions... */ -//#define SI2_ISA_ID_BASE 0x7FF8 /* READ: Board ID string */ -#define SI1_ISA_RESET 0x8000 /* WRITE: Host Reset */ -#define SI1_ISA_RESET_CLEAR 0xc000 /* WRITE: Host Reset clear*/ -#define SI1_ISA_WAIT 0x9000 /* WRITE: Host wait */ -#define SI1_ISA_WAIT_CLEAR 0xd000 /* WRITE: Host wait clear */ -#define SI1_ISA_INTCL 0xa000 /* WRITE: Host Reset */ -#define SI1_ISA_INTCL_CLEAR 0xe000 /* WRITE: Host Reset */ - - -/***************************************************************************** -****************************** ****************************** -****************************** Phase 2 Z280 ****************************** -****************************** ****************************** -*****************************************************************************/ - -/* ISA board details... */ -#define SI2_ISA_WINDOW_LEN 0x8000 /* 32 Kbyte shared memory window */ -#define SI2_ISA_MEMORY_LEN 0x7FF8 /* Usable memory */ -#define SI2_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */ -#define SI2_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */ -#define SI2_ISA_ADDR_STEP SI2_ISA_WINDOW_LEN/* ISA board address step */ -#define SI2_ISA_IRQ_MASK 0x9800 /* IRQs 15,12,11 */ - -/* ISA board, register definitions... */ -#define SI2_ISA_ID_BASE 0x7FF8 /* READ: Board ID string */ -#define SI2_ISA_RESET SI2_ISA_ID_BASE /* WRITE: Host Reset */ -#define SI2_ISA_IRQ11 (SI2_ISA_ID_BASE+1) /* WRITE: Set IRQ11 */ -#define SI2_ISA_IRQ12 (SI2_ISA_ID_BASE+2) /* WRITE: Set IRQ12 */ -#define SI2_ISA_IRQ15 (SI2_ISA_ID_BASE+3) /* WRITE: Set IRQ15 */ -#define SI2_ISA_IRQSET (SI2_ISA_ID_BASE+4) /* WRITE: Set Host Interrupt */ -#define SI2_ISA_INTCLEAR (SI2_ISA_ID_BASE+5) /* WRITE: Enable Host Interrupt */ - -#define SI2_ISA_IRQ11_SET 0x10 -#define SI2_ISA_IRQ11_CLEAR 0x00 -#define SI2_ISA_IRQ12_SET 0x10 -#define SI2_ISA_IRQ12_CLEAR 0x00 -#define SI2_ISA_IRQ15_SET 0x10 -#define SI2_ISA_IRQ15_CLEAR 0x00 -#define SI2_ISA_INTCLEAR_SET 0x10 -#define SI2_ISA_INTCLEAR_CLEAR 0x00 -#define SI2_ISA_IRQSET_CLEAR 0x10 -#define SI2_ISA_IRQSET_SET 0x00 -#define SI2_ISA_RESET_SET 0x00 -#define SI2_ISA_RESET_CLEAR 0x10 - -/* PCI board details... */ -#define SI2_PCI_WINDOW_LEN 0x100000 /* 1 Mbyte memory window */ - -/* PCI board register definitions... */ -#define SI2_PCI_SET_IRQ 0x40001 /* Set Host Interrupt */ -#define SI2_PCI_RESET 0xC0001 /* Host Reset */ - -/***************************************************************************** -****************************** ****************************** -****************************** Phase 3 T225 ****************************** -****************************** ****************************** -*****************************************************************************/ - -/* General board details... */ -#define SX_WINDOW_LEN 64*1024 /* 64 Kbyte memory window */ - -/* ISA board details... */ -#define SX_ISA_ADDR_LOW 0x0A0000 /* Lowest address = 640 Kbyte */ -#define SX_ISA_ADDR_HIGH 0xFF8000 /* Highest address = 16Mbyte - 32Kbyte */ -#define SX_ISA_ADDR_STEP SX_WINDOW_LEN /* ISA board address step */ -#define SX_ISA_IRQ_MASK 0x9E00 /* IRQs 15,12,11,10,9 */ - -/* Hardware register definitions... */ -#define SX_EVENT_STATUS 0x7800 /* READ: T225 Event Status */ -#define SX_EVENT_STROBE 0x7800 /* WRITE: T225 Event Strobe */ -#define SX_EVENT_ENABLE 0x7880 /* WRITE: T225 Event Enable */ -#define SX_VPD_ROM 0x7C00 /* READ: Vital Product Data ROM */ -#define SX_CONFIG 0x7C00 /* WRITE: Host Configuration Register */ -#define SX_IRQ_STATUS 0x7C80 /* READ: Host Interrupt Status */ -#define SX_SET_IRQ 0x7C80 /* WRITE: Set Host Interrupt */ -#define SX_RESET_STATUS 0x7D00 /* READ: Host Reset Status */ -#define SX_RESET 0x7D00 /* WRITE: Host Reset */ -#define SX_RESET_IRQ 0x7D80 /* WRITE: Reset Host Interrupt */ - -/* SX_VPD_ROM definitions... */ -#define SX_VPD_SLX_ID1 0x00 -#define SX_VPD_SLX_ID2 0x01 -#define SX_VPD_HW_REV 0x02 -#define SX_VPD_HW_ASSEM 0x03 -#define SX_VPD_UNIQUEID4 0x04 -#define SX_VPD_UNIQUEID3 0x05 -#define SX_VPD_UNIQUEID2 0x06 -#define SX_VPD_UNIQUEID1 0x07 -#define SX_VPD_MANU_YEAR 0x08 -#define SX_VPD_MANU_WEEK 0x09 -#define SX_VPD_IDENT 0x10 -#define SX_VPD_IDENT_STRING "JET HOST BY KEV#" - -/* SX unique identifiers... */ -#define SX_UNIQUEID_MASK 0xF0 -#define SX_ISA_UNIQUEID1 0x20 -#define SX_PCI_UNIQUEID1 0x50 - -/* SX_CONFIG definitions... */ -#define SX_CONF_BUSEN 0x02 /* Enable T225 memory and I/O */ -#define SX_CONF_HOSTIRQ 0x04 /* Enable board to host interrupt */ - -/* SX bootstrap... */ -#define SX_BOOTSTRAP "\x28\x20\x21\x02\x60\x0a" -#define SX_BOOTSTRAP_SIZE 6 -#define SX_BOOTSTRAP_ADDR (0x8000-SX_BOOTSTRAP_SIZE) - -/***************************************************************************** -********************************** ********************************** -********************************** EISA ********************************** -********************************** ********************************** -*****************************************************************************/ - -#define SI2_EISA_OFF 0x42 -#define SI2_EISA_VAL 0x01 -#define SI2_EISA_WINDOW_LEN 0x10000 - -/***************************************************************************** -*********************************** ********************************** -*********************************** PCI ********************************** -*********************************** ********************************** -*****************************************************************************/ - -/* General definitions... */ - -#define SPX_VENDOR_ID 0x11CB /* Assigned by the PCI SIG */ -#define SPX_DEVICE_ID 0x4000 /* SI/XIO boards */ -#define SPX_PLXDEVICE_ID 0x2000 /* SX boards */ - -#define SPX_SUB_VENDOR_ID SPX_VENDOR_ID /* Same as vendor id */ -#define SI2_SUB_SYS_ID 0x400 /* Phase 2 (Z280) board */ -#define SX_SUB_SYS_ID 0x200 /* Phase 3 (t225) board */ - -#endif /*_sxboards_h */ - -/* End of SXBOARDS.H */ diff --git a/drivers/staging/generic_serial/sxwindow.h b/drivers/staging/generic_serial/sxwindow.h deleted file mode 100644 index cf01b66..0000000 --- a/drivers/staging/generic_serial/sxwindow.h +++ /dev/null @@ -1,393 +0,0 @@ -/************************************************************************/ -/* */ -/* Title : SX Shared Memory Window Structure */ -/* */ -/* Author : N.P.Vassallo */ -/* */ -/* Creation : 16th March 1998 */ -/* */ -/* Version : 3.0.0 */ -/* */ -/* Copyright : (c) Specialix International Ltd. 1998 */ -/* */ -/* Description : Prototypes, structures and definitions */ -/* describing the SX/SI/XIO cards shared */ -/* memory window structure: */ -/* SXCARD */ -/* SXMODULE */ -/* SXCHANNEL */ -/* */ -/************************************************************************/ - -/* History... - -3.0.0 16/03/98 NPV Creation. (based on STRUCT.H) - -*/ - -#ifndef _sxwindow_h /* If SXWINDOW.H not already defined */ -#define _sxwindow_h 1 - -/***************************************************************************** -*************************** *************************** -*************************** Common Definitions *************************** -*************************** *************************** -*****************************************************************************/ - -typedef struct _SXCARD *PSXCARD; /* SXCARD structure pointer */ -typedef struct _SXMODULE *PMOD; /* SXMODULE structure pointer */ -typedef struct _SXCHANNEL *PCHAN; /* SXCHANNEL structure pointer */ - -/***************************************************************************** -********************************* ********************************* -********************************* SXCARD ********************************* -********************************* ********************************* -*****************************************************************************/ - -typedef struct _SXCARD -{ - BYTE cc_init_status; /* 0x00 Initialisation status */ - BYTE cc_mem_size; /* 0x01 Size of memory on card */ - WORD cc_int_count; /* 0x02 Interrupt count */ - WORD cc_revision; /* 0x04 Download code revision */ - BYTE cc_isr_count; /* 0x06 Count when ISR is run */ - BYTE cc_main_count; /* 0x07 Count when main loop is run */ - WORD cc_int_pending; /* 0x08 Interrupt pending */ - WORD cc_poll_count; /* 0x0A Count when poll is run */ - BYTE cc_int_set_count; /* 0x0C Count when host interrupt is set */ - BYTE cc_rfu[0x80 - 0x0D]; /* 0x0D Pad structure to 128 bytes (0x80) */ - -} SXCARD; - -/* SXCARD.cc_init_status definitions... */ -#define ADAPTERS_FOUND (BYTE)0x01 -#define NO_ADAPTERS_FOUND (BYTE)0xFF - -/* SXCARD.cc_mem_size definitions... */ -#define SX_MEMORY_SIZE (BYTE)0x40 - -/* SXCARD.cc_int_count definitions... */ -#define INT_COUNT_DEFAULT 100 /* Hz */ - -/***************************************************************************** -******************************** ******************************** -******************************** SXMODULE ******************************** -******************************** ******************************** -*****************************************************************************/ - -#define TOP_POINTER(a) ((a)|0x8000) /* Sets top bit of word */ -#define UNTOP_POINTER(a) ((a)&~0x8000) /* Clears top bit of word */ - -typedef struct _SXMODULE -{ - WORD mc_next; /* 0x00 Next module "pointer" (ORed with 0x8000) */ - BYTE mc_type; /* 0x02 Type of TA in terms of number of channels */ - BYTE mc_mod_no; /* 0x03 Module number on SI bus cable (0 closest to card) */ - BYTE mc_dtr; /* 0x04 Private DTR copy (TA only) */ - BYTE mc_rfu1; /* 0x05 Reserved */ - WORD mc_uart; /* 0x06 UART base address for this module */ - BYTE mc_chip; /* 0x08 Chip type / number of ports */ - BYTE mc_current_uart; /* 0x09 Current uart selected for this module */ -#ifdef DOWNLOAD - PCHAN mc_chan_pointer[8]; /* 0x0A Pointer to each channel structure */ -#else - WORD mc_chan_pointer[8]; /* 0x0A Define as WORD if not compiling into download */ -#endif - WORD mc_rfu2; /* 0x1A Reserved */ - BYTE mc_opens1; /* 0x1C Number of open ports on first four ports on MTA/SXDC */ - BYTE mc_opens2; /* 0x1D Number of open ports on second four ports on MTA/SXDC */ - BYTE mc_mods; /* 0x1E Types of connector module attached to MTA/SXDC */ - BYTE mc_rev1; /* 0x1F Revision of first CD1400 on MTA/SXDC */ - BYTE mc_rev2; /* 0x20 Revision of second CD1400 on MTA/SXDC */ - BYTE mc_mtaasic_rev; /* 0x21 Revision of MTA ASIC 1..4 -> A, B, C, D */ - BYTE mc_rfu3[0x100 - 0x22]; /* 0x22 Pad structure to 256 bytes (0x100) */ - -} SXMODULE; - -/* SXMODULE.mc_type definitions... */ -#define FOUR_PORTS (BYTE)4 -#define EIGHT_PORTS (BYTE)8 - -/* SXMODULE.mc_chip definitions... */ -#define CHIP_MASK 0xF0 -#define TA (BYTE)0 -#define TA4 (TA | FOUR_PORTS) -#define TA8 (TA | EIGHT_PORTS) -#define TA4_ASIC (BYTE)0x0A -#define TA8_ASIC (BYTE)0x0B -#define MTA_CD1400 (BYTE)0x28 -#define SXDC (BYTE)0x48 - -/* SXMODULE.mc_mods definitions... */ -#define MOD_RS232DB25 0x00 /* RS232 DB25 (socket/plug) */ -#define MOD_RS232RJ45 0x01 /* RS232 RJ45 (shielded/opto-isolated) */ -#define MOD_RESERVED_2 0x02 /* Reserved (RS485) */ -#define MOD_RS422DB25 0x03 /* RS422 DB25 Socket */ -#define MOD_RESERVED_4 0x04 /* Reserved */ -#define MOD_PARALLEL 0x05 /* Parallel */ -#define MOD_RESERVED_6 0x06 /* Reserved (RS423) */ -#define MOD_RESERVED_7 0x07 /* Reserved */ -#define MOD_2_RS232DB25 0x08 /* Rev 2.0 RS232 DB25 (socket/plug) */ -#define MOD_2_RS232RJ45 0x09 /* Rev 2.0 RS232 RJ45 */ -#define MOD_RESERVED_A 0x0A /* Rev 2.0 Reserved */ -#define MOD_2_RS422DB25 0x0B /* Rev 2.0 RS422 DB25 */ -#define MOD_RESERVED_C 0x0C /* Rev 2.0 Reserved */ -#define MOD_2_PARALLEL 0x0D /* Rev 2.0 Parallel */ -#define MOD_RESERVED_E 0x0E /* Rev 2.0 Reserved */ -#define MOD_BLANK 0x0F /* Blank Panel */ - -/***************************************************************************** -******************************** ******************************* -******************************** SXCHANNEL ******************************* -******************************** ******************************* -*****************************************************************************/ - -#define TX_BUFF_OFFSET 0x60 /* Transmit buffer offset in channel structure */ -#define BUFF_POINTER(a) (((a)+TX_BUFF_OFFSET)|0x8000) -#define UNBUFF_POINTER(a) (jet_channel*)(((a)&~0x8000)-TX_BUFF_OFFSET) -#define BUFFER_SIZE 256 -#define HIGH_WATER ((BUFFER_SIZE / 4) * 3) -#define LOW_WATER (BUFFER_SIZE / 4) - -typedef struct _SXCHANNEL -{ - WORD next_item; /* 0x00 Offset from window base of next channels hi_txbuf (ORred with 0x8000) */ - WORD addr_uart; /* 0x02 INTERNAL pointer to uart address. Includes FASTPATH bit */ - WORD module; /* 0x04 Offset from window base of parent SXMODULE structure */ - BYTE type; /* 0x06 Chip type / number of ports (copy of mc_chip) */ - BYTE chan_number; /* 0x07 Channel number on the TA/MTA/SXDC */ - WORD xc_status; /* 0x08 Flow control and I/O status */ - BYTE hi_rxipos; /* 0x0A Receive buffer input index */ - BYTE hi_rxopos; /* 0x0B Receive buffer output index */ - BYTE hi_txopos; /* 0x0C Transmit buffer output index */ - BYTE hi_txipos; /* 0x0D Transmit buffer input index */ - BYTE hi_hstat; /* 0x0E Command register */ - BYTE dtr_bit; /* 0x0F INTERNAL DTR control byte (TA only) */ - BYTE txon; /* 0x10 INTERNAL copy of hi_txon */ - BYTE txoff; /* 0x11 INTERNAL copy of hi_txoff */ - BYTE rxon; /* 0x12 INTERNAL copy of hi_rxon */ - BYTE rxoff; /* 0x13 INTERNAL copy of hi_rxoff */ - BYTE hi_mr1; /* 0x14 Mode Register 1 (databits,parity,RTS rx flow)*/ - BYTE hi_mr2; /* 0x15 Mode Register 2 (stopbits,local,CTS tx flow)*/ - BYTE hi_csr; /* 0x16 Clock Select Register (baud rate) */ - BYTE hi_op; /* 0x17 Modem Output Signal */ - BYTE hi_ip; /* 0x18 Modem Input Signal */ - BYTE hi_state; /* 0x19 Channel status */ - BYTE hi_prtcl; /* 0x1A Channel protocol (flow control) */ - BYTE hi_txon; /* 0x1B Transmit XON character */ - BYTE hi_txoff; /* 0x1C Transmit XOFF character */ - BYTE hi_rxon; /* 0x1D Receive XON character */ - BYTE hi_rxoff; /* 0x1E Receive XOFF character */ - BYTE close_prev; /* 0x1F INTERNAL channel previously closed flag */ - BYTE hi_break; /* 0x20 Break and error control */ - BYTE break_state; /* 0x21 INTERNAL copy of hi_break */ - BYTE hi_mask; /* 0x22 Mask for received data */ - BYTE mask; /* 0x23 INTERNAL copy of hi_mask */ - BYTE mod_type; /* 0x24 MTA/SXDC hardware module type */ - BYTE ccr_state; /* 0x25 INTERNAL MTA/SXDC state of CCR register */ - BYTE ip_mask; /* 0x26 Input handshake mask */ - BYTE hi_parallel; /* 0x27 Parallel port flag */ - BYTE par_error; /* 0x28 Error code for parallel loopback test */ - BYTE any_sent; /* 0x29 INTERNAL data sent flag */ - BYTE asic_txfifo_size; /* 0x2A INTERNAL SXDC transmit FIFO size */ - BYTE rfu1[2]; /* 0x2B Reserved */ - BYTE csr; /* 0x2D INTERNAL copy of hi_csr */ -#ifdef DOWNLOAD - PCHAN nextp; /* 0x2E Offset from window base of next channel structure */ -#else - WORD nextp; /* 0x2E Define as WORD if not compiling into download */ -#endif - BYTE prtcl; /* 0x30 INTERNAL copy of hi_prtcl */ - BYTE mr1; /* 0x31 INTERNAL copy of hi_mr1 */ - BYTE mr2; /* 0x32 INTERNAL copy of hi_mr2 */ - BYTE hi_txbaud; /* 0x33 Extended transmit baud rate (SXDC only if((hi_csr&0x0F)==0x0F) */ - BYTE hi_rxbaud; /* 0x34 Extended receive baud rate (SXDC only if((hi_csr&0xF0)==0xF0) */ - BYTE txbreak_state; /* 0x35 INTERNAL MTA/SXDC transmit break state */ - BYTE txbaud; /* 0x36 INTERNAL copy of hi_txbaud */ - BYTE rxbaud; /* 0x37 INTERNAL copy of hi_rxbaud */ - WORD err_framing; /* 0x38 Count of receive framing errors */ - WORD err_parity; /* 0x3A Count of receive parity errors */ - WORD err_overrun; /* 0x3C Count of receive overrun errors */ - WORD err_overflow; /* 0x3E Count of receive buffer overflow errors */ - BYTE rfu2[TX_BUFF_OFFSET - 0x40]; /* 0x40 Reserved until hi_txbuf */ - BYTE hi_txbuf[BUFFER_SIZE]; /* 0x060 Transmit buffer */ - BYTE hi_rxbuf[BUFFER_SIZE]; /* 0x160 Receive buffer */ - BYTE rfu3[0x300 - 0x260]; /* 0x260 Reserved until 768 bytes (0x300) */ - -} SXCHANNEL; - -/* SXCHANNEL.addr_uart definitions... */ -#define FASTPATH 0x1000 /* Set to indicate fast rx/tx processing (TA only) */ - -/* SXCHANNEL.xc_status definitions... */ -#define X_TANY 0x0001 /* XON is any character (TA only) */ -#define X_TION 0x0001 /* Tx interrupts on (MTA only) */ -#define X_TXEN 0x0002 /* Tx XON/XOFF enabled (TA only) */ -#define X_RTSEN 0x0002 /* RTS FLOW enabled (MTA only) */ -#define X_TXRC 0x0004 /* XOFF received (TA only) */ -#define X_RTSLOW 0x0004 /* RTS dropped (MTA only) */ -#define X_RXEN 0x0008 /* Rx XON/XOFF enabled */ -#define X_ANYXO 0x0010 /* XOFF pending/sent or RTS dropped */ -#define X_RXSE 0x0020 /* Rx XOFF sent */ -#define X_NPEND 0x0040 /* Rx XON pending or XOFF pending */ -#define X_FPEND 0x0080 /* Rx XOFF pending */ -#define C_CRSE 0x0100 /* Carriage return sent (TA only) */ -#define C_TEMR 0x0100 /* Tx empty requested (MTA only) */ -#define C_TEMA 0x0200 /* Tx empty acked (MTA only) */ -#define C_ANYP 0x0200 /* Any protocol bar tx XON/XOFF (TA only) */ -#define C_EN 0x0400 /* Cooking enabled (on MTA means port is also || */ -#define C_HIGH 0x0800 /* Buffer previously hit high water */ -#define C_CTSEN 0x1000 /* CTS automatic flow-control enabled */ -#define C_DCDEN 0x2000 /* DCD/DTR checking enabled */ -#define C_BREAK 0x4000 /* Break detected */ -#define C_RTSEN 0x8000 /* RTS automatic flow control enabled (MTA only) */ -#define C_PARITY 0x8000 /* Parity checking enabled (TA only) */ - -/* SXCHANNEL.hi_hstat definitions... */ -#define HS_IDLE_OPEN 0x00 /* Channel open state */ -#define HS_LOPEN 0x02 /* Local open command (no modem monitoring) */ -#define HS_MOPEN 0x04 /* Modem open command (wait for DCD signal) */ -#define HS_IDLE_MPEND 0x06 /* Waiting for DCD signal state */ -#define HS_CONFIG 0x08 /* Configuration command */ -#define HS_CLOSE 0x0A /* Close command */ -#define HS_START 0x0C /* Start transmit break command */ -#define HS_STOP 0x0E /* Stop transmit break command */ -#define HS_IDLE_CLOSED 0x10 /* Closed channel state */ -#define HS_IDLE_BREAK 0x12 /* Transmit break state */ -#define HS_FORCE_CLOSED 0x14 /* Force close command */ -#define HS_RESUME 0x16 /* Clear pending XOFF command */ -#define HS_WFLUSH 0x18 /* Flush transmit buffer command */ -#define HS_RFLUSH 0x1A /* Flush receive buffer command */ -#define HS_SUSPEND 0x1C /* Suspend output command (like XOFF received) */ -#define PARALLEL 0x1E /* Parallel port loopback test command (Diagnostics Only) */ -#define ENABLE_RX_INTS 0x20 /* Enable receive interrupts command (Diagnostics Only) */ -#define ENABLE_TX_INTS 0x22 /* Enable transmit interrupts command (Diagnostics Only) */ -#define ENABLE_MDM_INTS 0x24 /* Enable modem interrupts command (Diagnostics Only) */ -#define DISABLE_INTS 0x26 /* Disable interrupts command (Diagnostics Only) */ - -/* SXCHANNEL.hi_mr1 definitions... */ -#define MR1_BITS 0x03 /* Data bits mask */ -#define MR1_5_BITS 0x00 /* 5 data bits */ -#define MR1_6_BITS 0x01 /* 6 data bits */ -#define MR1_7_BITS 0x02 /* 7 data bits */ -#define MR1_8_BITS 0x03 /* 8 data bits */ -#define MR1_PARITY 0x1C /* Parity mask */ -#define MR1_ODD 0x04 /* Odd parity */ -#define MR1_EVEN 0x00 /* Even parity */ -#define MR1_WITH 0x00 /* Parity enabled */ -#define MR1_FORCE 0x08 /* Force parity */ -#define MR1_NONE 0x10 /* No parity */ -#define MR1_NOPARITY MR1_NONE /* No parity */ -#define MR1_ODDPARITY (MR1_WITH|MR1_ODD) /* Odd parity */ -#define MR1_EVENPARITY (MR1_WITH|MR1_EVEN) /* Even parity */ -#define MR1_MARKPARITY (MR1_FORCE|MR1_ODD) /* Mark parity */ -#define MR1_SPACEPARITY (MR1_FORCE|MR1_EVEN) /* Space parity */ -#define MR1_RTS_RXFLOW 0x80 /* RTS receive flow control */ - -/* SXCHANNEL.hi_mr2 definitions... */ -#define MR2_STOP 0x0F /* Stop bits mask */ -#define MR2_1_STOP 0x07 /* 1 stop bit */ -#define MR2_2_STOP 0x0F /* 2 stop bits */ -#define MR2_CTS_TXFLOW 0x10 /* CTS transmit flow control */ -#define MR2_RTS_TOGGLE 0x20 /* RTS toggle on transmit */ -#define MR2_NORMAL 0x00 /* Normal mode */ -#define MR2_AUTO 0x40 /* Auto-echo mode (TA only) */ -#define MR2_LOCAL 0x80 /* Local echo mode */ -#define MR2_REMOTE 0xC0 /* Remote echo mode (TA only) */ - -/* SXCHANNEL.hi_csr definitions... */ -#define CSR_75 0x0 /* 75 baud */ -#define CSR_110 0x1 /* 110 baud (TA), 115200 (MTA/SXDC) */ -#define CSR_38400 0x2 /* 38400 baud */ -#define CSR_150 0x3 /* 150 baud */ -#define CSR_300 0x4 /* 300 baud */ -#define CSR_600 0x5 /* 600 baud */ -#define CSR_1200 0x6 /* 1200 baud */ -#define CSR_2000 0x7 /* 2000 baud */ -#define CSR_2400 0x8 /* 2400 baud */ -#define CSR_4800 0x9 /* 4800 baud */ -#define CSR_1800 0xA /* 1800 baud */ -#define CSR_9600 0xB /* 9600 baud */ -#define CSR_19200 0xC /* 19200 baud */ -#define CSR_57600 0xD /* 57600 baud */ -#define CSR_EXTBAUD 0xF /* Extended baud rate (hi_txbaud/hi_rxbaud) */ - -/* SXCHANNEL.hi_op definitions... */ -#define OP_RTS 0x01 /* RTS modem output signal */ -#define OP_DTR 0x02 /* DTR modem output signal */ - -/* SXCHANNEL.hi_ip definitions... */ -#define IP_CTS 0x02 /* CTS modem input signal */ -#define IP_DCD 0x04 /* DCD modem input signal */ -#define IP_DSR 0x20 /* DTR modem input signal */ -#define IP_RI 0x40 /* RI modem input signal */ - -/* SXCHANNEL.hi_state definitions... */ -#define ST_BREAK 0x01 /* Break received (clear with config) */ -#define ST_DCD 0x02 /* DCD signal changed state */ - -/* SXCHANNEL.hi_prtcl definitions... */ -#define SP_TANY 0x01 /* Transmit XON/XANY (if SP_TXEN enabled) */ -#define SP_TXEN 0x02 /* Transmit XON/XOFF flow control */ -#define SP_CEN 0x04 /* Cooking enabled */ -#define SP_RXEN 0x08 /* Rx XON/XOFF enabled */ -#define SP_DCEN 0x20 /* DCD / DTR check */ -#define SP_DTR_RXFLOW 0x40 /* DTR receive flow control */ -#define SP_PAEN 0x80 /* Parity checking enabled */ - -/* SXCHANNEL.hi_break definitions... */ -#define BR_IGN 0x01 /* Ignore any received breaks */ -#define BR_INT 0x02 /* Interrupt on received break */ -#define BR_PARMRK 0x04 /* Enable parmrk parity error processing */ -#define BR_PARIGN 0x08 /* Ignore chars with parity errors */ -#define BR_ERRINT 0x80 /* Treat parity/framing/overrun errors as exceptions */ - -/* SXCHANNEL.par_error definitions.. */ -#define DIAG_IRQ_RX 0x01 /* Indicate serial receive interrupt (diags only) */ -#define DIAG_IRQ_TX 0x02 /* Indicate serial transmit interrupt (diags only) */ -#define DIAG_IRQ_MD 0x04 /* Indicate serial modem interrupt (diags only) */ - -/* SXCHANNEL.hi_txbaud/hi_rxbaud definitions... (SXDC only) */ -#define BAUD_75 0x00 /* 75 baud */ -#define BAUD_115200 0x01 /* 115200 baud */ -#define BAUD_38400 0x02 /* 38400 baud */ -#define BAUD_150 0x03 /* 150 baud */ -#define BAUD_300 0x04 /* 300 baud */ -#define BAUD_600 0x05 /* 600 baud */ -#define BAUD_1200 0x06 /* 1200 baud */ -#define BAUD_2000 0x07 /* 2000 baud */ -#define BAUD_2400 0x08 /* 2400 baud */ -#define BAUD_4800 0x09 /* 4800 baud */ -#define BAUD_1800 0x0A /* 1800 baud */ -#define BAUD_9600 0x0B /* 9600 baud */ -#define BAUD_19200 0x0C /* 19200 baud */ -#define BAUD_57600 0x0D /* 57600 baud */ -#define BAUD_230400 0x0E /* 230400 baud */ -#define BAUD_460800 0x0F /* 460800 baud */ -#define BAUD_921600 0x10 /* 921600 baud */ -#define BAUD_50 0x11 /* 50 baud */ -#define BAUD_110 0x12 /* 110 baud */ -#define BAUD_134_5 0x13 /* 134.5 baud */ -#define BAUD_200 0x14 /* 200 baud */ -#define BAUD_7200 0x15 /* 7200 baud */ -#define BAUD_56000 0x16 /* 56000 baud */ -#define BAUD_64000 0x17 /* 64000 baud */ -#define BAUD_76800 0x18 /* 76800 baud */ -#define BAUD_128000 0x19 /* 128000 baud */ -#define BAUD_150000 0x1A /* 150000 baud */ -#define BAUD_14400 0x1B /* 14400 baud */ -#define BAUD_256000 0x1C /* 256000 baud */ -#define BAUD_28800 0x1D /* 28800 baud */ - -/* SXCHANNEL.txbreak_state definiions... */ -#define TXBREAK_OFF 0 /* Not sending break */ -#define TXBREAK_START 1 /* Begin sending break */ -#define TXBREAK_START1 2 /* Begin sending break, part 1 */ -#define TXBREAK_ON 3 /* Sending break */ -#define TXBREAK_STOP 4 /* Stop sending break */ -#define TXBREAK_STOP1 5 /* Stop sending break, part 1 */ - -#endif /* _sxwindow_h */ - -/* End of SXWINDOW.H */ - diff --git a/drivers/staging/generic_serial/vme_scc.c b/drivers/staging/generic_serial/vme_scc.c deleted file mode 100644 index 9683864..0000000 --- a/drivers/staging/generic_serial/vme_scc.c +++ /dev/null @@ -1,1145 +0,0 @@ -/* - * drivers/char/vme_scc.c: MVME147, MVME162, BVME6000 SCC serial ports - * implementation. - * Copyright 1999 Richard Hirst - * - * Based on atari_SCC.c which was - * Copyright 1994-95 Roman Hodek - * Partially based on PC-Linux serial.c by Linus Torvalds and Theodore Ts'o - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MVME147_SCC -#include -#endif -#ifdef CONFIG_MVME162_SCC -#include -#endif -#ifdef CONFIG_BVME6000_SCC -#include -#endif - -#include -#include "scc.h" - - -#define CHANNEL_A 0 -#define CHANNEL_B 1 - -#define SCC_MINOR_BASE 64 - -/* Shadows for all SCC write registers */ -static unsigned char scc_shadow[2][16]; - -/* Location to access for SCC register access delay */ -static volatile unsigned char *scc_del = NULL; - -/* To keep track of STATUS_REG state for detection of Ext/Status int source */ -static unsigned char scc_last_status_reg[2]; - -/***************************** Prototypes *****************************/ - -/* Function prototypes */ -static void scc_disable_tx_interrupts(void * ptr); -static void scc_enable_tx_interrupts(void * ptr); -static void scc_disable_rx_interrupts(void * ptr); -static void scc_enable_rx_interrupts(void * ptr); -static int scc_carrier_raised(struct tty_port *port); -static void scc_shutdown_port(void * ptr); -static int scc_set_real_termios(void *ptr); -static void scc_hungup(void *ptr); -static void scc_close(void *ptr); -static int scc_chars_in_buffer(void * ptr); -static int scc_open(struct tty_struct * tty, struct file * filp); -static int scc_ioctl(struct tty_struct * tty, - unsigned int cmd, unsigned long arg); -static void scc_throttle(struct tty_struct *tty); -static void scc_unthrottle(struct tty_struct *tty); -static irqreturn_t scc_tx_int(int irq, void *data); -static irqreturn_t scc_rx_int(int irq, void *data); -static irqreturn_t scc_stat_int(int irq, void *data); -static irqreturn_t scc_spcond_int(int irq, void *data); -static void scc_setsignals(struct scc_port *port, int dtr, int rts); -static int scc_break_ctl(struct tty_struct *tty, int break_state); - -static struct tty_driver *scc_driver; - -static struct scc_port scc_ports[2]; - -/*--------------------------------------------------------------------------- - * Interface from generic_serial.c back here - *--------------------------------------------------------------------------*/ - -static struct real_driver scc_real_driver = { - scc_disable_tx_interrupts, - scc_enable_tx_interrupts, - scc_disable_rx_interrupts, - scc_enable_rx_interrupts, - scc_shutdown_port, - scc_set_real_termios, - scc_chars_in_buffer, - scc_close, - scc_hungup, - NULL -}; - - -static const struct tty_operations scc_ops = { - .open = scc_open, - .close = gs_close, - .write = gs_write, - .put_char = gs_put_char, - .flush_chars = gs_flush_chars, - .write_room = gs_write_room, - .chars_in_buffer = gs_chars_in_buffer, - .flush_buffer = gs_flush_buffer, - .ioctl = scc_ioctl, - .throttle = scc_throttle, - .unthrottle = scc_unthrottle, - .set_termios = gs_set_termios, - .stop = gs_stop, - .start = gs_start, - .hangup = gs_hangup, - .break_ctl = scc_break_ctl, -}; - -static const struct tty_port_operations scc_port_ops = { - .carrier_raised = scc_carrier_raised, -}; - -/*---------------------------------------------------------------------------- - * vme_scc_init() and support functions - *---------------------------------------------------------------------------*/ - -static int __init scc_init_drivers(void) -{ - int error; - - scc_driver = alloc_tty_driver(2); - if (!scc_driver) - return -ENOMEM; - scc_driver->owner = THIS_MODULE; - scc_driver->driver_name = "scc"; - scc_driver->name = "ttyS"; - scc_driver->major = TTY_MAJOR; - scc_driver->minor_start = SCC_MINOR_BASE; - scc_driver->type = TTY_DRIVER_TYPE_SERIAL; - scc_driver->subtype = SERIAL_TYPE_NORMAL; - scc_driver->init_termios = tty_std_termios; - scc_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - scc_driver->init_termios.c_ispeed = 9600; - scc_driver->init_termios.c_ospeed = 9600; - scc_driver->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(scc_driver, &scc_ops); - - if ((error = tty_register_driver(scc_driver))) { - printk(KERN_ERR "scc: Couldn't register scc driver, error = %d\n", - error); - put_tty_driver(scc_driver); - return 1; - } - - return 0; -} - - -/* ports[] array is indexed by line no (i.e. [0] for ttyS0, [1] for ttyS1). - */ - -static void __init scc_init_portstructs(void) -{ - struct scc_port *port; - int i; - - for (i = 0; i < 2; i++) { - port = scc_ports + i; - tty_port_init(&port->gs.port); - port->gs.port.ops = &scc_port_ops; - port->gs.magic = SCC_MAGIC; - port->gs.close_delay = HZ/2; - port->gs.closing_wait = 30 * HZ; - port->gs.rd = &scc_real_driver; -#ifdef NEW_WRITE_LOCKING - port->gs.port_write_mutex = MUTEX; -#endif - init_waitqueue_head(&port->gs.port.open_wait); - init_waitqueue_head(&port->gs.port.close_wait); - } -} - - -#ifdef CONFIG_MVME147_SCC -static int __init mvme147_scc_init(void) -{ - struct scc_port *port; - int error; - - printk(KERN_INFO "SCC: MVME147 Serial Driver\n"); - /* Init channel A */ - port = &scc_ports[0]; - port->channel = CHANNEL_A; - port->ctrlp = (volatile unsigned char *)M147_SCC_A_ADDR; - port->datap = port->ctrlp + 1; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(MVME147_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED, - "SCC-A TX", port); - if (error) - goto fail; - error = request_irq(MVME147_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-A status", port); - if (error) - goto fail_free_a_tx; - error = request_irq(MVME147_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED, - "SCC-A RX", port); - if (error) - goto fail_free_a_stat; - error = request_irq(MVME147_IRQ_SCCA_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-A special cond", port); - if (error) - goto fail_free_a_rx; - - { - SCC_ACCESS_INIT(port); - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - /* Set the interrupt vector */ - SCCwrite(INT_VECTOR_REG, MVME147_IRQ_SCC_BASE); - /* Interrupt parameters: vector includes status, status low */ - SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT); - SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB); - } - - /* Init channel B */ - port = &scc_ports[1]; - port->channel = CHANNEL_B; - port->ctrlp = (volatile unsigned char *)M147_SCC_B_ADDR; - port->datap = port->ctrlp + 1; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(MVME147_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED, - "SCC-B TX", port); - if (error) - goto fail_free_a_spcond; - error = request_irq(MVME147_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-B status", port); - if (error) - goto fail_free_b_tx; - error = request_irq(MVME147_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED, - "SCC-B RX", port); - if (error) - goto fail_free_b_stat; - error = request_irq(MVME147_IRQ_SCCB_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-B special cond", port); - if (error) - goto fail_free_b_rx; - - { - SCC_ACCESS_INIT(port); - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - } - - /* Ensure interrupts are enabled in the PCC chip */ - m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB; - - /* Initialise the tty driver structures and register */ - scc_init_portstructs(); - scc_init_drivers(); - - return 0; - -fail_free_b_rx: - free_irq(MVME147_IRQ_SCCB_RX, port); -fail_free_b_stat: - free_irq(MVME147_IRQ_SCCB_STAT, port); -fail_free_b_tx: - free_irq(MVME147_IRQ_SCCB_TX, port); -fail_free_a_spcond: - free_irq(MVME147_IRQ_SCCA_SPCOND, port); -fail_free_a_rx: - free_irq(MVME147_IRQ_SCCA_RX, port); -fail_free_a_stat: - free_irq(MVME147_IRQ_SCCA_STAT, port); -fail_free_a_tx: - free_irq(MVME147_IRQ_SCCA_TX, port); -fail: - return error; -} -#endif - - -#ifdef CONFIG_MVME162_SCC -static int __init mvme162_scc_init(void) -{ - struct scc_port *port; - int error; - - if (!(mvme16x_config & MVME16x_CONFIG_GOT_SCCA)) - return (-ENODEV); - - printk(KERN_INFO "SCC: MVME162 Serial Driver\n"); - /* Init channel A */ - port = &scc_ports[0]; - port->channel = CHANNEL_A; - port->ctrlp = (volatile unsigned char *)MVME_SCC_A_ADDR; - port->datap = port->ctrlp + 2; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(MVME162_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED, - "SCC-A TX", port); - if (error) - goto fail; - error = request_irq(MVME162_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-A status", port); - if (error) - goto fail_free_a_tx; - error = request_irq(MVME162_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED, - "SCC-A RX", port); - if (error) - goto fail_free_a_stat; - error = request_irq(MVME162_IRQ_SCCA_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-A special cond", port); - if (error) - goto fail_free_a_rx; - - { - SCC_ACCESS_INIT(port); - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - /* Set the interrupt vector */ - SCCwrite(INT_VECTOR_REG, MVME162_IRQ_SCC_BASE); - /* Interrupt parameters: vector includes status, status low */ - SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT); - SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB); - } - - /* Init channel B */ - port = &scc_ports[1]; - port->channel = CHANNEL_B; - port->ctrlp = (volatile unsigned char *)MVME_SCC_B_ADDR; - port->datap = port->ctrlp + 2; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(MVME162_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED, - "SCC-B TX", port); - if (error) - goto fail_free_a_spcond; - error = request_irq(MVME162_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-B status", port); - if (error) - goto fail_free_b_tx; - error = request_irq(MVME162_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED, - "SCC-B RX", port); - if (error) - goto fail_free_b_stat; - error = request_irq(MVME162_IRQ_SCCB_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-B special cond", port); - if (error) - goto fail_free_b_rx; - - { - SCC_ACCESS_INIT(port); /* Either channel will do */ - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - } - - /* Ensure interrupts are enabled in the MC2 chip */ - *(volatile char *)0xfff4201d = 0x14; - - /* Initialise the tty driver structures and register */ - scc_init_portstructs(); - scc_init_drivers(); - - return 0; - -fail_free_b_rx: - free_irq(MVME162_IRQ_SCCB_RX, port); -fail_free_b_stat: - free_irq(MVME162_IRQ_SCCB_STAT, port); -fail_free_b_tx: - free_irq(MVME162_IRQ_SCCB_TX, port); -fail_free_a_spcond: - free_irq(MVME162_IRQ_SCCA_SPCOND, port); -fail_free_a_rx: - free_irq(MVME162_IRQ_SCCA_RX, port); -fail_free_a_stat: - free_irq(MVME162_IRQ_SCCA_STAT, port); -fail_free_a_tx: - free_irq(MVME162_IRQ_SCCA_TX, port); -fail: - return error; -} -#endif - - -#ifdef CONFIG_BVME6000_SCC -static int __init bvme6000_scc_init(void) -{ - struct scc_port *port; - int error; - - printk(KERN_INFO "SCC: BVME6000 Serial Driver\n"); - /* Init channel A */ - port = &scc_ports[0]; - port->channel = CHANNEL_A; - port->ctrlp = (volatile unsigned char *)BVME_SCC_A_ADDR; - port->datap = port->ctrlp + 4; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(BVME_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED, - "SCC-A TX", port); - if (error) - goto fail; - error = request_irq(BVME_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-A status", port); - if (error) - goto fail_free_a_tx; - error = request_irq(BVME_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED, - "SCC-A RX", port); - if (error) - goto fail_free_a_stat; - error = request_irq(BVME_IRQ_SCCA_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-A special cond", port); - if (error) - goto fail_free_a_rx; - - { - SCC_ACCESS_INIT(port); - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - /* Set the interrupt vector */ - SCCwrite(INT_VECTOR_REG, BVME_IRQ_SCC_BASE); - /* Interrupt parameters: vector includes status, status low */ - SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT); - SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB); - } - - /* Init channel B */ - port = &scc_ports[1]; - port->channel = CHANNEL_B; - port->ctrlp = (volatile unsigned char *)BVME_SCC_B_ADDR; - port->datap = port->ctrlp + 4; - port->port_a = &scc_ports[0]; - port->port_b = &scc_ports[1]; - error = request_irq(BVME_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED, - "SCC-B TX", port); - if (error) - goto fail_free_a_spcond; - error = request_irq(BVME_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED, - "SCC-B status", port); - if (error) - goto fail_free_b_tx; - error = request_irq(BVME_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED, - "SCC-B RX", port); - if (error) - goto fail_free_b_stat; - error = request_irq(BVME_IRQ_SCCB_SPCOND, scc_spcond_int, - IRQF_DISABLED, "SCC-B special cond", port); - if (error) - goto fail_free_b_rx; - - { - SCC_ACCESS_INIT(port); /* Either channel will do */ - - /* disable interrupts for this channel */ - SCCwrite(INT_AND_DMA_REG, 0); - } - - /* Initialise the tty driver structures and register */ - scc_init_portstructs(); - scc_init_drivers(); - - return 0; - -fail: - free_irq(BVME_IRQ_SCCA_STAT, port); -fail_free_a_tx: - free_irq(BVME_IRQ_SCCA_RX, port); -fail_free_a_stat: - free_irq(BVME_IRQ_SCCA_SPCOND, port); -fail_free_a_rx: - free_irq(BVME_IRQ_SCCB_TX, port); -fail_free_a_spcond: - free_irq(BVME_IRQ_SCCB_STAT, port); -fail_free_b_tx: - free_irq(BVME_IRQ_SCCB_RX, port); -fail_free_b_stat: - free_irq(BVME_IRQ_SCCB_SPCOND, port); -fail_free_b_rx: - return error; -} -#endif - - -static int __init vme_scc_init(void) -{ - int res = -ENODEV; - -#ifdef CONFIG_MVME147_SCC - if (MACH_IS_MVME147) - res = mvme147_scc_init(); -#endif -#ifdef CONFIG_MVME162_SCC - if (MACH_IS_MVME16x) - res = mvme162_scc_init(); -#endif -#ifdef CONFIG_BVME6000_SCC - if (MACH_IS_BVME6000) - res = bvme6000_scc_init(); -#endif - return res; -} - -module_init(vme_scc_init); - - -/*--------------------------------------------------------------------------- - * Interrupt handlers - *--------------------------------------------------------------------------*/ - -static irqreturn_t scc_rx_int(int irq, void *data) -{ - unsigned char ch; - struct scc_port *port = data; - struct tty_struct *tty = port->gs.port.tty; - SCC_ACCESS_INIT(port); - - ch = SCCread_NB(RX_DATA_REG); - if (!tty) { - printk(KERN_WARNING "scc_rx_int with NULL tty!\n"); - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - return IRQ_HANDLED; - } - tty_insert_flip_char(tty, ch, 0); - - /* Check if another character is already ready; in that case, the - * spcond_int() function must be used, because this character may have an - * error condition that isn't signalled by the interrupt vector used! - */ - if (SCCread(INT_PENDING_REG) & - (port->channel == CHANNEL_A ? IPR_A_RX : IPR_B_RX)) { - scc_spcond_int (irq, data); - return IRQ_HANDLED; - } - - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - - tty_flip_buffer_push(tty); - return IRQ_HANDLED; -} - - -static irqreturn_t scc_spcond_int(int irq, void *data) -{ - struct scc_port *port = data; - struct tty_struct *tty = port->gs.port.tty; - unsigned char stat, ch, err; - int int_pending_mask = port->channel == CHANNEL_A ? - IPR_A_RX : IPR_B_RX; - SCC_ACCESS_INIT(port); - - if (!tty) { - printk(KERN_WARNING "scc_spcond_int with NULL tty!\n"); - SCCwrite(COMMAND_REG, CR_ERROR_RESET); - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - return IRQ_HANDLED; - } - do { - stat = SCCread(SPCOND_STATUS_REG); - ch = SCCread_NB(RX_DATA_REG); - - if (stat & SCSR_RX_OVERRUN) - err = TTY_OVERRUN; - else if (stat & SCSR_PARITY_ERR) - err = TTY_PARITY; - else if (stat & SCSR_CRC_FRAME_ERR) - err = TTY_FRAME; - else - err = 0; - - tty_insert_flip_char(tty, ch, err); - - /* ++TeSche: *All* errors have to be cleared manually, - * else the condition persists for the next chars - */ - if (err) - SCCwrite(COMMAND_REG, CR_ERROR_RESET); - - } while(SCCread(INT_PENDING_REG) & int_pending_mask); - - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - - tty_flip_buffer_push(tty); - return IRQ_HANDLED; -} - - -static irqreturn_t scc_tx_int(int irq, void *data) -{ - struct scc_port *port = data; - SCC_ACCESS_INIT(port); - - if (!port->gs.port.tty) { - printk(KERN_WARNING "scc_tx_int with NULL tty!\n"); - SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); - SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - return IRQ_HANDLED; - } - while ((SCCread_NB(STATUS_REG) & SR_TX_BUF_EMPTY)) { - if (port->x_char) { - SCCwrite(TX_DATA_REG, port->x_char); - port->x_char = 0; - } - else if ((port->gs.xmit_cnt <= 0) || - port->gs.port.tty->stopped || - port->gs.port.tty->hw_stopped) - break; - else { - SCCwrite(TX_DATA_REG, port->gs.xmit_buf[port->gs.xmit_tail++]); - port->gs.xmit_tail = port->gs.xmit_tail & (SERIAL_XMIT_SIZE-1); - if (--port->gs.xmit_cnt <= 0) - break; - } - } - if ((port->gs.xmit_cnt <= 0) || port->gs.port.tty->stopped || - port->gs.port.tty->hw_stopped) { - /* disable tx interrupts */ - SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); - SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); /* disable tx_int on next tx underrun? */ - port->gs.port.flags &= ~GS_TX_INTEN; - } - if (port->gs.port.tty && port->gs.xmit_cnt <= port->gs.wakeup_chars) - tty_wakeup(port->gs.port.tty); - - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - return IRQ_HANDLED; -} - - -static irqreturn_t scc_stat_int(int irq, void *data) -{ - struct scc_port *port = data; - unsigned channel = port->channel; - unsigned char last_sr, sr, changed; - SCC_ACCESS_INIT(port); - - last_sr = scc_last_status_reg[channel]; - sr = scc_last_status_reg[channel] = SCCread_NB(STATUS_REG); - changed = last_sr ^ sr; - - if (changed & SR_DCD) { - port->c_dcd = !!(sr & SR_DCD); - if (!(port->gs.port.flags & ASYNC_CHECK_CD)) - ; /* Don't report DCD changes */ - else if (port->c_dcd) { - wake_up_interruptible(&port->gs.port.open_wait); - } - else { - if (port->gs.port.tty) - tty_hangup (port->gs.port.tty); - } - } - SCCwrite(COMMAND_REG, CR_EXTSTAT_RESET); - SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET); - return IRQ_HANDLED; -} - - -/*--------------------------------------------------------------------------- - * generic_serial.c callback funtions - *--------------------------------------------------------------------------*/ - -static void scc_disable_tx_interrupts(void *ptr) -{ - struct scc_port *port = ptr; - unsigned long flags; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); - port->gs.port.flags &= ~GS_TX_INTEN; - local_irq_restore(flags); -} - - -static void scc_enable_tx_interrupts(void *ptr) -{ - struct scc_port *port = ptr; - unsigned long flags; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB); - /* restart the transmitter */ - scc_tx_int (0, port); - local_irq_restore(flags); -} - - -static void scc_disable_rx_interrupts(void *ptr) -{ - struct scc_port *port = ptr; - unsigned long flags; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - SCCmod(INT_AND_DMA_REG, - ~(IDR_RX_INT_MASK|IDR_PARERR_AS_SPCOND|IDR_EXTSTAT_INT_ENAB), 0); - local_irq_restore(flags); -} - - -static void scc_enable_rx_interrupts(void *ptr) -{ - struct scc_port *port = ptr; - unsigned long flags; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - SCCmod(INT_AND_DMA_REG, 0xff, - IDR_EXTSTAT_INT_ENAB|IDR_PARERR_AS_SPCOND|IDR_RX_INT_ALL); - local_irq_restore(flags); -} - - -static int scc_carrier_raised(struct tty_port *port) -{ - struct scc_port *sc = container_of(port, struct scc_port, gs.port); - unsigned channel = sc->channel; - - return !!(scc_last_status_reg[channel] & SR_DCD); -} - - -static void scc_shutdown_port(void *ptr) -{ - struct scc_port *port = ptr; - - port->gs.port.flags &= ~ GS_ACTIVE; - if (port->gs.port.tty && (port->gs.port.tty->termios->c_cflag & HUPCL)) { - scc_setsignals (port, 0, 0); - } -} - - -static int scc_set_real_termios (void *ptr) -{ - /* the SCC has char sizes 5,7,6,8 in that order! */ - static int chsize_map[4] = { 0, 2, 1, 3 }; - unsigned cflag, baud, chsize, channel, brgval = 0; - unsigned long flags; - struct scc_port *port = ptr; - SCC_ACCESS_INIT(port); - - if (!port->gs.port.tty || !port->gs.port.tty->termios) return 0; - - channel = port->channel; - - if (channel == CHANNEL_A) - return 0; /* Settings controlled by boot PROM */ - - cflag = port->gs.port.tty->termios->c_cflag; - baud = port->gs.baud; - chsize = (cflag & CSIZE) >> 4; - - if (baud == 0) { - /* speed == 0 -> drop DTR */ - local_irq_save(flags); - SCCmod(TX_CTRL_REG, ~TCR_DTR, 0); - local_irq_restore(flags); - return 0; - } - else if ((MACH_IS_MVME16x && (baud < 50 || baud > 38400)) || - (MACH_IS_MVME147 && (baud < 50 || baud > 19200)) || - (MACH_IS_BVME6000 &&(baud < 50 || baud > 76800))) { - printk(KERN_NOTICE "SCC: Bad speed requested, %d\n", baud); - return 0; - } - - if (cflag & CLOCAL) - port->gs.port.flags &= ~ASYNC_CHECK_CD; - else - port->gs.port.flags |= ASYNC_CHECK_CD; - -#ifdef CONFIG_MVME147_SCC - if (MACH_IS_MVME147) - brgval = (M147_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2; -#endif -#ifdef CONFIG_MVME162_SCC - if (MACH_IS_MVME16x) - brgval = (MVME_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2; -#endif -#ifdef CONFIG_BVME6000_SCC - if (MACH_IS_BVME6000) - brgval = (BVME_SCC_RTxC + baud/2) / (16 * 2 * baud) - 2; -#endif - /* Now we have all parameters and can go to set them: */ - local_irq_save(flags); - - /* receiver's character size and auto-enables */ - SCCmod(RX_CTRL_REG, ~(RCR_CHSIZE_MASK|RCR_AUTO_ENAB_MODE), - (chsize_map[chsize] << 6) | - ((cflag & CRTSCTS) ? RCR_AUTO_ENAB_MODE : 0)); - /* parity and stop bits (both, Tx and Rx), clock mode never changes */ - SCCmod (AUX1_CTRL_REG, - ~(A1CR_PARITY_MASK | A1CR_MODE_MASK), - ((cflag & PARENB - ? (cflag & PARODD ? A1CR_PARITY_ODD : A1CR_PARITY_EVEN) - : A1CR_PARITY_NONE) - | (cflag & CSTOPB ? A1CR_MODE_ASYNC_2 : A1CR_MODE_ASYNC_1))); - /* sender's character size, set DTR for valid baud rate */ - SCCmod(TX_CTRL_REG, ~TCR_CHSIZE_MASK, chsize_map[chsize] << 5 | TCR_DTR); - /* clock sources never change */ - /* disable BRG before changing the value */ - SCCmod(DPLL_CTRL_REG, ~DCR_BRG_ENAB, 0); - /* BRG value */ - SCCwrite(TIMER_LOW_REG, brgval & 0xff); - SCCwrite(TIMER_HIGH_REG, (brgval >> 8) & 0xff); - /* BRG enable, and clock source never changes */ - SCCmod(DPLL_CTRL_REG, 0xff, DCR_BRG_ENAB); - - local_irq_restore(flags); - - return 0; -} - - -static int scc_chars_in_buffer (void *ptr) -{ - struct scc_port *port = ptr; - SCC_ACCESS_INIT(port); - - return (SCCread (SPCOND_STATUS_REG) & SCSR_ALL_SENT) ? 0 : 1; -} - - -/* Comment taken from sx.c (2.4.0): - I haven't the foggiest why the decrement use count has to happen - here. The whole linux serial drivers stuff needs to be redesigned. - My guess is that this is a hack to minimize the impact of a bug - elsewhere. Thinking about it some more. (try it sometime) Try - running minicom on a serial port that is driven by a modularized - driver. Have the modem hangup. Then remove the driver module. Then - exit minicom. I expect an "oops". -- REW */ - -static void scc_hungup(void *ptr) -{ - scc_disable_tx_interrupts(ptr); - scc_disable_rx_interrupts(ptr); -} - - -static void scc_close(void *ptr) -{ - scc_disable_tx_interrupts(ptr); - scc_disable_rx_interrupts(ptr); -} - - -/*--------------------------------------------------------------------------- - * Internal support functions - *--------------------------------------------------------------------------*/ - -static void scc_setsignals(struct scc_port *port, int dtr, int rts) -{ - unsigned long flags; - unsigned char t; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - t = SCCread(TX_CTRL_REG); - if (dtr >= 0) t = dtr? (t | TCR_DTR): (t & ~TCR_DTR); - if (rts >= 0) t = rts? (t | TCR_RTS): (t & ~TCR_RTS); - SCCwrite(TX_CTRL_REG, t); - local_irq_restore(flags); -} - - -static void scc_send_xchar(struct tty_struct *tty, char ch) -{ - struct scc_port *port = tty->driver_data; - - port->x_char = ch; - if (ch) - scc_enable_tx_interrupts(port); -} - - -/*--------------------------------------------------------------------------- - * Driver entrypoints referenced from above - *--------------------------------------------------------------------------*/ - -static int scc_open (struct tty_struct * tty, struct file * filp) -{ - int line = tty->index; - int retval; - struct scc_port *port = &scc_ports[line]; - int i, channel = port->channel; - unsigned long flags; - SCC_ACCESS_INIT(port); -#if defined(CONFIG_MVME162_SCC) || defined(CONFIG_MVME147_SCC) - static const struct { - unsigned reg, val; - } mvme_init_tab[] = { - /* Values for MVME162 and MVME147 */ - /* no parity, 1 stop bit, async, 1:16 */ - { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 }, - /* parity error is special cond, ints disabled, no DMA */ - { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB }, - /* Rx 8 bits/char, no auto enable, Rx off */ - { RX_CTRL_REG, RCR_CHSIZE_8 }, - /* DTR off, Tx 8 bits/char, RTS off, Tx off */ - { TX_CTRL_REG, TCR_CHSIZE_8 }, - /* special features off */ - { AUX2_CTRL_REG, 0 }, - { CLK_CTRL_REG, CCR_RXCLK_BRG | CCR_TXCLK_BRG }, - { DPLL_CTRL_REG, DCR_BRG_ENAB | DCR_BRG_USE_PCLK }, - /* Start Rx */ - { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 }, - /* Start Tx */ - { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 }, - /* Ext/Stat ints: DCD only */ - { INT_CTRL_REG, ICR_ENAB_DCD_INT }, - /* Reset Ext/Stat ints */ - { COMMAND_REG, CR_EXTSTAT_RESET }, - /* ...again */ - { COMMAND_REG, CR_EXTSTAT_RESET }, - }; -#endif -#if defined(CONFIG_BVME6000_SCC) - static const struct { - unsigned reg, val; - } bvme_init_tab[] = { - /* Values for BVME6000 */ - /* no parity, 1 stop bit, async, 1:16 */ - { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 }, - /* parity error is special cond, ints disabled, no DMA */ - { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB }, - /* Rx 8 bits/char, no auto enable, Rx off */ - { RX_CTRL_REG, RCR_CHSIZE_8 }, - /* DTR off, Tx 8 bits/char, RTS off, Tx off */ - { TX_CTRL_REG, TCR_CHSIZE_8 }, - /* special features off */ - { AUX2_CTRL_REG, 0 }, - { CLK_CTRL_REG, CCR_RTxC_XTAL | CCR_RXCLK_BRG | CCR_TXCLK_BRG }, - { DPLL_CTRL_REG, DCR_BRG_ENAB }, - /* Start Rx */ - { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 }, - /* Start Tx */ - { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 }, - /* Ext/Stat ints: DCD only */ - { INT_CTRL_REG, ICR_ENAB_DCD_INT }, - /* Reset Ext/Stat ints */ - { COMMAND_REG, CR_EXTSTAT_RESET }, - /* ...again */ - { COMMAND_REG, CR_EXTSTAT_RESET }, - }; -#endif - if (!(port->gs.port.flags & ASYNC_INITIALIZED)) { - local_irq_save(flags); -#if defined(CONFIG_MVME147_SCC) || defined(CONFIG_MVME162_SCC) - if (MACH_IS_MVME147 || MACH_IS_MVME16x) { - for (i = 0; i < ARRAY_SIZE(mvme_init_tab); ++i) - SCCwrite(mvme_init_tab[i].reg, mvme_init_tab[i].val); - } -#endif -#if defined(CONFIG_BVME6000_SCC) - if (MACH_IS_BVME6000) { - for (i = 0; i < ARRAY_SIZE(bvme_init_tab); ++i) - SCCwrite(bvme_init_tab[i].reg, bvme_init_tab[i].val); - } -#endif - - /* remember status register for detection of DCD and CTS changes */ - scc_last_status_reg[channel] = SCCread(STATUS_REG); - - port->c_dcd = 0; /* Prevent initial 1->0 interrupt */ - scc_setsignals (port, 1,1); - local_irq_restore(flags); - } - - tty->driver_data = port; - port->gs.port.tty = tty; - port->gs.port.count++; - retval = gs_init_port(&port->gs); - if (retval) { - port->gs.port.count--; - return retval; - } - port->gs.port.flags |= GS_ACTIVE; - retval = gs_block_til_ready(port, filp); - - if (retval) { - port->gs.port.count--; - return retval; - } - - port->c_dcd = tty_port_carrier_raised(&port->gs.port); - - scc_enable_rx_interrupts(port); - - return 0; -} - - -static void scc_throttle (struct tty_struct * tty) -{ - struct scc_port *port = tty->driver_data; - unsigned long flags; - SCC_ACCESS_INIT(port); - - if (tty->termios->c_cflag & CRTSCTS) { - local_irq_save(flags); - SCCmod(TX_CTRL_REG, ~TCR_RTS, 0); - local_irq_restore(flags); - } - if (I_IXOFF(tty)) - scc_send_xchar(tty, STOP_CHAR(tty)); -} - - -static void scc_unthrottle (struct tty_struct * tty) -{ - struct scc_port *port = tty->driver_data; - unsigned long flags; - SCC_ACCESS_INIT(port); - - if (tty->termios->c_cflag & CRTSCTS) { - local_irq_save(flags); - SCCmod(TX_CTRL_REG, 0xff, TCR_RTS); - local_irq_restore(flags); - } - if (I_IXOFF(tty)) - scc_send_xchar(tty, START_CHAR(tty)); -} - - -static int scc_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - return -ENOIOCTLCMD; -} - - -static int scc_break_ctl(struct tty_struct *tty, int break_state) -{ - struct scc_port *port = tty->driver_data; - unsigned long flags; - SCC_ACCESS_INIT(port); - - local_irq_save(flags); - SCCmod(TX_CTRL_REG, ~TCR_SEND_BREAK, - break_state ? TCR_SEND_BREAK : 0); - local_irq_restore(flags); - return 0; -} - - -/*--------------------------------------------------------------------------- - * Serial console stuff... - *--------------------------------------------------------------------------*/ - -#define scc_delay() do { __asm__ __volatile__ (" nop; nop"); } while (0) - -static void scc_ch_write (char ch) -{ - volatile char *p = NULL; - -#ifdef CONFIG_MVME147_SCC - if (MACH_IS_MVME147) - p = (volatile char *)M147_SCC_A_ADDR; -#endif -#ifdef CONFIG_MVME162_SCC - if (MACH_IS_MVME16x) - p = (volatile char *)MVME_SCC_A_ADDR; -#endif -#ifdef CONFIG_BVME6000_SCC - if (MACH_IS_BVME6000) - p = (volatile char *)BVME_SCC_A_ADDR; -#endif - - do { - scc_delay(); - } - while (!(*p & 4)); - scc_delay(); - *p = 8; - scc_delay(); - *p = ch; -} - -/* The console must be locked when we get here. */ - -static void scc_console_write (struct console *co, const char *str, unsigned count) -{ - unsigned long flags; - - local_irq_save(flags); - - while (count--) - { - if (*str == '\n') - scc_ch_write ('\r'); - scc_ch_write (*str++); - } - local_irq_restore(flags); -} - -static struct tty_driver *scc_console_device(struct console *c, int *index) -{ - *index = c->index; - return scc_driver; -} - -static struct console sercons = { - .name = "ttyS", - .write = scc_console_write, - .device = scc_console_device, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - - -static int __init vme_scc_console_init(void) -{ - if (vme_brdtype == VME_TYPE_MVME147 || - vme_brdtype == VME_TYPE_MVME162 || - vme_brdtype == VME_TYPE_MVME172 || - vme_brdtype == VME_TYPE_BVME4000 || - vme_brdtype == VME_TYPE_BVME6000) - register_console(&sercons); - return 0; -} -console_initcall(vme_scc_console_init); -- cgit v0.10.2 From 51c9d654c2def97827395a7fbfd0c6f865c26544 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 6 Jul 2011 16:48:28 -0700 Subject: Staging: delete tty drivers Delete the drivers/staging/tty drivers as no one has wanted to step up and maintain and fix them. This was discussed in commit 4a6514e6d096716fb7bedf238efaaca877e2a7e8 (tty: move obsolete and broken tty drivers to drivers/staging/tty/) Cc: Arnd Bergmann Cc: Alan Cox Cc: Jiri Slaby Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 39a0f27..6780df0 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -24,8 +24,6 @@ menuconfig STAGING if STAGING -source "drivers/staging/tty/Kconfig" - source "drivers/staging/et131x/Kconfig" source "drivers/staging/slicoss/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 4deb22c..36a8b84 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -3,7 +3,6 @@ # fix for build system bug... obj-$(CONFIG_STAGING) += staging.o -obj-y += tty/ obj-$(CONFIG_ET131X) += et131x/ obj-$(CONFIG_SLICOSS) += slicoss/ obj-$(CONFIG_VIDEO_GO7007) += go7007/ diff --git a/drivers/staging/tty/Kconfig b/drivers/staging/tty/Kconfig deleted file mode 100644 index 77103a0..0000000 --- a/drivers/staging/tty/Kconfig +++ /dev/null @@ -1,87 +0,0 @@ -config STALLION - tristate "Stallion EasyIO or EC8/32 support" - depends on STALDRV && (ISA || EISA || PCI) - help - If you have an EasyIO or EasyConnection 8/32 multiport Stallion - card, then this is for you; say Y. Make sure to read - . - - To compile this driver as a module, choose M here: the - module will be called stallion. - -config ISTALLION - tristate "Stallion EC8/64, ONboard, Brumby support" - depends on STALDRV && (ISA || EISA || PCI) - help - If you have an EasyConnection 8/64, ONboard, Brumby or Stallion - serial multiport card, say Y here. Make sure to read - . - - To compile this driver as a module, choose M here: the - module will be called istallion. - -config DIGIEPCA - tristate "Digiboard Intelligent Async Support" - depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI) - ---help--- - This is a driver for Digi International's Xx, Xeve, and Xem series - of cards which provide multiple serial ports. You would need - something like this to connect more than two modems to your Linux - box, for instance in order to become a dial-in server. This driver - supports the original PC (ISA) boards as well as PCI, and EISA. If - you have a card like this, say Y here and read the file - . - - To compile this driver as a module, choose M here: the - module will be called epca. - -config RISCOM8 - tristate "SDL RISCom/8 card support" - depends on SERIAL_NONSTANDARD - help - This is a driver for the SDL Communications RISCom/8 multiport card, - which gives you many serial ports. You would need something like - this to connect more than two modems to your Linux box, for instance - in order to become a dial-in server. If you have a card like that, - say Y here and read the file . - - Also it's possible to say M here and compile this driver as kernel - loadable module; the module will be called riscom8. - -config SPECIALIX - tristate "Specialix IO8+ card support" - depends on SERIAL_NONSTANDARD - help - This is a driver for the Specialix IO8+ multiport card (both the - ISA and the PCI version) which gives you many serial ports. You - would need something like this to connect more than two modems to - your Linux box, for instance in order to become a dial-in server. - - If you have a card like that, say Y here and read the file - . Also it's possible to say - M here and compile this driver as kernel loadable module which will be - called specialix. - -config COMPUTONE - tristate "Computone IntelliPort Plus serial support" - depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI) - ---help--- - This driver supports the entire family of Intelliport II/Plus - controllers with the exception of the MicroChannel controllers and - products previous to the Intelliport II. These are multiport cards, - which give you many serial ports. You would need something like this - to connect more than two modems to your Linux box, for instance in - order to become a dial-in server. If you have a card like that, say - Y here and read . - - To compile this driver as module, choose M here: the - module will be called ip2. - -config SERIAL167 - bool "CD2401 support for MVME166/7 serial ports" - depends on MVME16x - help - This is the driver for the serial ports on the Motorola MVME166, - 167, and 172 boards. Everyone using one of these boards should say - Y here. - diff --git a/drivers/staging/tty/Makefile b/drivers/staging/tty/Makefile deleted file mode 100644 index ac57c105..0000000 --- a/drivers/staging/tty/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -obj-$(CONFIG_STALLION) += stallion.o -obj-$(CONFIG_ISTALLION) += istallion.o -obj-$(CONFIG_DIGIEPCA) += epca.o -obj-$(CONFIG_SERIAL167) += serial167.o -obj-$(CONFIG_SPECIALIX) += specialix.o -obj-$(CONFIG_RISCOM8) += riscom8.o -obj-$(CONFIG_COMPUTONE) += ip2/ diff --git a/drivers/staging/tty/TODO b/drivers/staging/tty/TODO deleted file mode 100644 index 8875645..0000000 --- a/drivers/staging/tty/TODO +++ /dev/null @@ -1,6 +0,0 @@ -These are a few tty/serial drivers that either do not build, -or work if they do build, or if they seem to work, are for obsolete -hardware, or are full of unfixable races and no one uses them anymore. - -If no one steps up to adopt any of these drivers, they will be removed -in the 2.6.41 release. diff --git a/drivers/staging/tty/cd1865.h b/drivers/staging/tty/cd1865.h deleted file mode 100644 index 48df113..0000000 --- a/drivers/staging/tty/cd1865.h +++ /dev/null @@ -1,263 +0,0 @@ -/* - * linux/drivers/char/cd1865.h -- Definitions relating to the CD1865 - * for the Specialix IO8+ multiport serial driver. - * - * Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl) - * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) - * - * Specialix pays for the development and support of this driver. - * Please DO contact io8-linux@specialix.co.uk if you require - * support. - * - * This driver was developed in the BitWizard linux device - * driver service. If you require a linux device driver for your - * product, please contact devices@BitWizard.nl for a quote. - * - */ - -/* - * Definitions for Driving CD180/CD1864/CD1865 based eightport serial cards. - */ - - -/* Values of choice for Interrupt ACKs */ -/* These values are "obligatory" if you use the register based - * interrupt acknowledgements. See page 99-101 of V2.0 of the CD1865 - * databook */ -#define SX_ACK_MINT 0x75 /* goes to PILR1 */ -#define SX_ACK_TINT 0x76 /* goes to PILR2 */ -#define SX_ACK_RINT 0x77 /* goes to PILR3 */ - -/* Chip ID (is used when chips ar daisy chained.) */ -#define SX_ID 0x10 - -/* Definitions for Cirrus Logic CL-CD186x 8-port async mux chip */ - -#define CD186x_NCH 8 /* Total number of channels */ -#define CD186x_TPC 16 /* Ticks per character */ -#define CD186x_NFIFO 8 /* TX FIFO size */ - - -/* Global registers */ - -#define CD186x_GIVR 0x40 /* Global Interrupt Vector Register */ -#define CD186x_GICR 0x41 /* Global Interrupting Channel Register */ -#define CD186x_PILR1 0x61 /* Priority Interrupt Level Register 1 */ -#define CD186x_PILR2 0x62 /* Priority Interrupt Level Register 2 */ -#define CD186x_PILR3 0x63 /* Priority Interrupt Level Register 3 */ -#define CD186x_CAR 0x64 /* Channel Access Register */ -#define CD186x_SRSR 0x65 /* Channel Access Register */ -#define CD186x_GFRCR 0x6b /* Global Firmware Revision Code Register */ -#define CD186x_PPRH 0x70 /* Prescaler Period Register High */ -#define CD186x_PPRL 0x71 /* Prescaler Period Register Low */ -#define CD186x_RDR 0x78 /* Receiver Data Register */ -#define CD186x_RCSR 0x7a /* Receiver Character Status Register */ -#define CD186x_TDR 0x7b /* Transmit Data Register */ -#define CD186x_EOIR 0x7f /* End of Interrupt Register */ -#define CD186x_MRAR 0x75 /* Modem Request Acknowledge register */ -#define CD186x_TRAR 0x76 /* Transmit Request Acknowledge register */ -#define CD186x_RRAR 0x77 /* Receive Request Acknowledge register */ -#define CD186x_SRCR 0x66 /* Service Request Configuration register */ - -/* Channel Registers */ - -#define CD186x_CCR 0x01 /* Channel Command Register */ -#define CD186x_IER 0x02 /* Interrupt Enable Register */ -#define CD186x_COR1 0x03 /* Channel Option Register 1 */ -#define CD186x_COR2 0x04 /* Channel Option Register 2 */ -#define CD186x_COR3 0x05 /* Channel Option Register 3 */ -#define CD186x_CCSR 0x06 /* Channel Control Status Register */ -#define CD186x_RDCR 0x07 /* Receive Data Count Register */ -#define CD186x_SCHR1 0x09 /* Special Character Register 1 */ -#define CD186x_SCHR2 0x0a /* Special Character Register 2 */ -#define CD186x_SCHR3 0x0b /* Special Character Register 3 */ -#define CD186x_SCHR4 0x0c /* Special Character Register 4 */ -#define CD186x_MCOR1 0x10 /* Modem Change Option 1 Register */ -#define CD186x_MCOR2 0x11 /* Modem Change Option 2 Register */ -#define CD186x_MCR 0x12 /* Modem Change Register */ -#define CD186x_RTPR 0x18 /* Receive Timeout Period Register */ -#define CD186x_MSVR 0x28 /* Modem Signal Value Register */ -#define CD186x_MSVRTS 0x29 /* Modem Signal Value Register */ -#define CD186x_MSVDTR 0x2a /* Modem Signal Value Register */ -#define CD186x_RBPRH 0x31 /* Receive Baud Rate Period Register High */ -#define CD186x_RBPRL 0x32 /* Receive Baud Rate Period Register Low */ -#define CD186x_TBPRH 0x39 /* Transmit Baud Rate Period Register High */ -#define CD186x_TBPRL 0x3a /* Transmit Baud Rate Period Register Low */ - - -/* Global Interrupt Vector Register (R/W) */ - -#define GIVR_ITMASK 0x07 /* Interrupt type mask */ -#define GIVR_IT_MODEM 0x01 /* Modem Signal Change Interrupt */ -#define GIVR_IT_TX 0x02 /* Transmit Data Interrupt */ -#define GIVR_IT_RCV 0x03 /* Receive Good Data Interrupt */ -#define GIVR_IT_REXC 0x07 /* Receive Exception Interrupt */ - - -/* Global Interrupt Channel Register (R/W) */ - -#define GICR_CHAN 0x1c /* Channel Number Mask */ -#define GICR_CHAN_OFF 2 /* Channel Number shift */ - - -/* Channel Address Register (R/W) */ - -#define CAR_CHAN 0x07 /* Channel Number Mask */ -#define CAR_A7 0x08 /* A7 Address Extension (unused) */ - - -/* Receive Character Status Register (R/O) */ - -#define RCSR_TOUT 0x80 /* Rx Timeout */ -#define RCSR_SCDET 0x70 /* Special Character Detected Mask */ -#define RCSR_NO_SC 0x00 /* No Special Characters Detected */ -#define RCSR_SC_1 0x10 /* Special Char 1 (or 1 & 3) Detected */ -#define RCSR_SC_2 0x20 /* Special Char 2 (or 2 & 4) Detected */ -#define RCSR_SC_3 0x30 /* Special Char 3 Detected */ -#define RCSR_SC_4 0x40 /* Special Char 4 Detected */ -#define RCSR_BREAK 0x08 /* Break has been detected */ -#define RCSR_PE 0x04 /* Parity Error */ -#define RCSR_FE 0x02 /* Frame Error */ -#define RCSR_OE 0x01 /* Overrun Error */ - - -/* Channel Command Register (R/W) (commands in groups can be OR-ed) */ - -#define CCR_HARDRESET 0x81 /* Reset the chip */ - -#define CCR_SOFTRESET 0x80 /* Soft Channel Reset */ - -#define CCR_CORCHG1 0x42 /* Channel Option Register 1 Changed */ -#define CCR_CORCHG2 0x44 /* Channel Option Register 2 Changed */ -#define CCR_CORCHG3 0x48 /* Channel Option Register 3 Changed */ - -#define CCR_SSCH1 0x21 /* Send Special Character 1 */ - -#define CCR_SSCH2 0x22 /* Send Special Character 2 */ - -#define CCR_SSCH3 0x23 /* Send Special Character 3 */ - -#define CCR_SSCH4 0x24 /* Send Special Character 4 */ - -#define CCR_TXEN 0x18 /* Enable Transmitter */ -#define CCR_RXEN 0x12 /* Enable Receiver */ - -#define CCR_TXDIS 0x14 /* Disable Transmitter */ -#define CCR_RXDIS 0x11 /* Disable Receiver */ - - -/* Interrupt Enable Register (R/W) */ - -#define IER_DSR 0x80 /* Enable interrupt on DSR change */ -#define IER_CD 0x40 /* Enable interrupt on CD change */ -#define IER_CTS 0x20 /* Enable interrupt on CTS change */ -#define IER_RXD 0x10 /* Enable interrupt on Receive Data */ -#define IER_RXSC 0x08 /* Enable interrupt on Receive Spec. Char */ -#define IER_TXRDY 0x04 /* Enable interrupt on TX FIFO empty */ -#define IER_TXEMPTY 0x02 /* Enable interrupt on TX completely empty */ -#define IER_RET 0x01 /* Enable interrupt on RX Exc. Timeout */ - - -/* Channel Option Register 1 (R/W) */ - -#define COR1_ODDP 0x80 /* Odd Parity */ -#define COR1_PARMODE 0x60 /* Parity Mode mask */ -#define COR1_NOPAR 0x00 /* No Parity */ -#define COR1_FORCEPAR 0x20 /* Force Parity */ -#define COR1_NORMPAR 0x40 /* Normal Parity */ -#define COR1_IGNORE 0x10 /* Ignore Parity on RX */ -#define COR1_STOPBITS 0x0c /* Number of Stop Bits */ -#define COR1_1SB 0x00 /* 1 Stop Bit */ -#define COR1_15SB 0x04 /* 1.5 Stop Bits */ -#define COR1_2SB 0x08 /* 2 Stop Bits */ -#define COR1_CHARLEN 0x03 /* Character Length */ -#define COR1_5BITS 0x00 /* 5 bits */ -#define COR1_6BITS 0x01 /* 6 bits */ -#define COR1_7BITS 0x02 /* 7 bits */ -#define COR1_8BITS 0x03 /* 8 bits */ - - -/* Channel Option Register 2 (R/W) */ - -#define COR2_IXM 0x80 /* Implied XON mode */ -#define COR2_TXIBE 0x40 /* Enable In-Band (XON/XOFF) Flow Control */ -#define COR2_ETC 0x20 /* Embedded Tx Commands Enable */ -#define COR2_LLM 0x10 /* Local Loopback Mode */ -#define COR2_RLM 0x08 /* Remote Loopback Mode */ -#define COR2_RTSAO 0x04 /* RTS Automatic Output Enable */ -#define COR2_CTSAE 0x02 /* CTS Automatic Enable */ -#define COR2_DSRAE 0x01 /* DSR Automatic Enable */ - - -/* Channel Option Register 3 (R/W) */ - -#define COR3_XONCH 0x80 /* XON is a pair of characters (1 & 3) */ -#define COR3_XOFFCH 0x40 /* XOFF is a pair of characters (2 & 4) */ -#define COR3_FCT 0x20 /* Flow-Control Transparency Mode */ -#define COR3_SCDE 0x10 /* Special Character Detection Enable */ -#define COR3_RXTH 0x0f /* RX FIFO Threshold value (1-8) */ - - -/* Channel Control Status Register (R/O) */ - -#define CCSR_RXEN 0x80 /* Receiver Enabled */ -#define CCSR_RXFLOFF 0x40 /* Receive Flow Off (XOFF was sent) */ -#define CCSR_RXFLON 0x20 /* Receive Flow On (XON was sent) */ -#define CCSR_TXEN 0x08 /* Transmitter Enabled */ -#define CCSR_TXFLOFF 0x04 /* Transmit Flow Off (got XOFF) */ -#define CCSR_TXFLON 0x02 /* Transmit Flow On (got XON) */ - - -/* Modem Change Option Register 1 (R/W) */ - -#define MCOR1_DSRZD 0x80 /* Detect 0->1 transition of DSR */ -#define MCOR1_CDZD 0x40 /* Detect 0->1 transition of CD */ -#define MCOR1_CTSZD 0x20 /* Detect 0->1 transition of CTS */ -#define MCOR1_DTRTH 0x0f /* Auto DTR flow control Threshold (1-8) */ -#define MCOR1_NODTRFC 0x0 /* Automatic DTR flow control disabled */ - - -/* Modem Change Option Register 2 (R/W) */ - -#define MCOR2_DSROD 0x80 /* Detect 1->0 transition of DSR */ -#define MCOR2_CDOD 0x40 /* Detect 1->0 transition of CD */ -#define MCOR2_CTSOD 0x20 /* Detect 1->0 transition of CTS */ - -/* Modem Change Register (R/W) */ - -#define MCR_DSRCHG 0x80 /* DSR Changed */ -#define MCR_CDCHG 0x40 /* CD Changed */ -#define MCR_CTSCHG 0x20 /* CTS Changed */ - - -/* Modem Signal Value Register (R/W) */ - -#define MSVR_DSR 0x80 /* Current state of DSR input */ -#define MSVR_CD 0x40 /* Current state of CD input */ -#define MSVR_CTS 0x20 /* Current state of CTS input */ -#define MSVR_DTR 0x02 /* Current state of DTR output */ -#define MSVR_RTS 0x01 /* Current state of RTS output */ - - -/* Escape characters */ - -#define CD186x_C_ESC 0x00 /* Escape character */ -#define CD186x_C_SBRK 0x81 /* Start sending BREAK */ -#define CD186x_C_DELAY 0x82 /* Delay output */ -#define CD186x_C_EBRK 0x83 /* Stop sending BREAK */ - -#define SRSR_RREQint 0x10 /* This chip wants "rec" serviced */ -#define SRSR_TREQint 0x04 /* This chip wants "transmit" serviced */ -#define SRSR_MREQint 0x01 /* This chip wants "mdm change" serviced */ - - - -#define SRCR_PKGTYPE 0x80 -#define SRCR_REGACKEN 0x40 -#define SRCR_DAISYEN 0x20 -#define SRCR_GLOBPRI 0x10 -#define SRCR_UNFAIR 0x08 -#define SRCR_AUTOPRI 0x02 -#define SRCR_PRISEL 0x01 - - diff --git a/drivers/staging/tty/digi1.h b/drivers/staging/tty/digi1.h deleted file mode 100644 index 94d4eab..0000000 --- a/drivers/staging/tty/digi1.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Definitions for DigiBoard ditty(1) command. */ - -#if !defined(TIOCMODG) -#define TIOCMODG (('d'<<8) | 250) /* get modem ctrl state */ -#define TIOCMODS (('d'<<8) | 251) /* set modem ctrl state */ -#endif - -#if !defined(TIOCMSET) -#define TIOCMSET (('d'<<8) | 252) /* set modem ctrl state */ -#define TIOCMGET (('d'<<8) | 253) /* set modem ctrl state */ -#endif - -#if !defined(TIOCMBIC) -#define TIOCMBIC (('d'<<8) | 254) /* set modem ctrl state */ -#define TIOCMBIS (('d'<<8) | 255) /* set modem ctrl state */ -#endif - -#if !defined(TIOCSDTR) -#define TIOCSDTR (('e'<<8) | 0) /* set DTR */ -#define TIOCCDTR (('e'<<8) | 1) /* clear DTR */ -#endif - -/************************************************************************ - * Ioctl command arguments for DIGI parameters. - ************************************************************************/ -#define DIGI_GETA (('e'<<8) | 94) /* Read params */ - -#define DIGI_SETA (('e'<<8) | 95) /* Set params */ -#define DIGI_SETAW (('e'<<8) | 96) /* Drain & set params */ -#define DIGI_SETAF (('e'<<8) | 97) /* Drain, flush & set params */ - -#define DIGI_GETFLOW (('e'<<8) | 99) /* Get startc/stopc flow */ - /* control characters */ -#define DIGI_SETFLOW (('e'<<8) | 100) /* Set startc/stopc flow */ - /* control characters */ -#define DIGI_GETAFLOW (('e'<<8) | 101) /* Get Aux. startc/stopc */ - /* flow control chars */ -#define DIGI_SETAFLOW (('e'<<8) | 102) /* Set Aux. startc/stopc */ - /* flow control chars */ - -#define DIGI_GETINFO (('e'<<8) | 103) /* Fill in digi_info */ -#define DIGI_POLLER (('e'<<8) | 104) /* Turn on/off poller */ -#define DIGI_INIT (('e'<<8) | 105) /* Allow things to run. */ - -struct digiflow_struct -{ - unsigned char startc; /* flow cntl start char */ - unsigned char stopc; /* flow cntl stop char */ -}; - -typedef struct digiflow_struct digiflow_t; - - -/************************************************************************ - * Values for digi_flags - ************************************************************************/ -#define DIGI_IXON 0x0001 /* Handle IXON in the FEP */ -#define DIGI_FAST 0x0002 /* Fast baud rates */ -#define RTSPACE 0x0004 /* RTS input flow control */ -#define CTSPACE 0x0008 /* CTS output flow control */ -#define DSRPACE 0x0010 /* DSR output flow control */ -#define DCDPACE 0x0020 /* DCD output flow control */ -#define DTRPACE 0x0040 /* DTR input flow control */ -#define DIGI_FORCEDCD 0x0100 /* Force carrier */ -#define DIGI_ALTPIN 0x0200 /* Alternate RJ-45 pin config */ -#define DIGI_AIXON 0x0400 /* Aux flow control in fep */ - - -/************************************************************************ - * Values for digiDload - ************************************************************************/ -#define NORMAL 0 -#define PCI_CTL 1 - -#define SIZE8 0 -#define SIZE16 1 -#define SIZE32 2 - -/************************************************************************ - * Structure used with ioctl commands for DIGI parameters. - ************************************************************************/ -struct digi_struct -{ - unsigned short digi_flags; /* Flags (see above) */ -}; - -typedef struct digi_struct digi_t; - -struct digi_info -{ - unsigned long board; /* Which board is this ? */ - unsigned char status; /* Alive or dead */ - unsigned char type; /* see epca.h */ - unsigned char subtype; /* For future XEM, XR, etc ... */ - unsigned short numports; /* Number of ports configured */ - unsigned char *port; /* I/O Address */ - unsigned char *membase; /* DPR Address */ - unsigned char *version; /* For future ... */ - unsigned short windowData; /* For future ... */ -} ; diff --git a/drivers/staging/tty/digiFep1.h b/drivers/staging/tty/digiFep1.h deleted file mode 100644 index 3c1f192..0000000 --- a/drivers/staging/tty/digiFep1.h +++ /dev/null @@ -1,136 +0,0 @@ - -#define CSTART 0x400L -#define CMAX 0x800L -#define ISTART 0x800L -#define IMAX 0xC00L -#define CIN 0xD10L -#define GLOBAL 0xD10L -#define EIN 0xD18L -#define FEPSTAT 0xD20L -#define CHANSTRUCT 0x1000L -#define RXTXBUF 0x4000L - - -struct global_data -{ - u16 cin; - u16 cout; - u16 cstart; - u16 cmax; - u16 ein; - u16 eout; - u16 istart; - u16 imax; -}; - - -struct board_chan -{ - u32 filler1; - u32 filler2; - u16 tseg; - u16 tin; - u16 tout; - u16 tmax; - - u16 rseg; - u16 rin; - u16 rout; - u16 rmax; - - u16 tlow; - u16 rlow; - u16 rhigh; - u16 incr; - - u16 etime; - u16 edelay; - unchar *dev; - - u16 iflag; - u16 oflag; - u16 cflag; - u16 gmask; - - u16 col; - u16 delay; - u16 imask; - u16 tflush; - - u32 filler3; - u32 filler4; - u32 filler5; - u32 filler6; - - u8 num; - u8 ract; - u8 bstat; - u8 tbusy; - u8 iempty; - u8 ilow; - u8 idata; - u8 eflag; - - u8 tflag; - u8 rflag; - u8 xmask; - u8 xval; - u8 mstat; - u8 mchange; - u8 mint; - u8 lstat; - - u8 mtran; - u8 orun; - u8 startca; - u8 stopca; - u8 startc; - u8 stopc; - u8 vnext; - u8 hflow; - - u8 fillc; - u8 ochar; - u8 omask; - - u8 filler7; - u8 filler8[28]; -}; - - -#define SRXLWATER 0xE0 -#define SRXHWATER 0xE1 -#define STOUT 0xE2 -#define PAUSETX 0xE3 -#define RESUMETX 0xE4 -#define SAUXONOFFC 0xE6 -#define SENDBREAK 0xE8 -#define SETMODEM 0xE9 -#define SETIFLAGS 0xEA -#define SONOFFC 0xEB -#define STXLWATER 0xEC -#define PAUSERX 0xEE -#define RESUMERX 0xEF -#define SETBUFFER 0xF2 -#define SETCOOKED 0xF3 -#define SETHFLOW 0xF4 -#define SETCTRLFLAGS 0xF5 -#define SETVNEXT 0xF6 - - - -#define BREAK_IND 0x01 -#define LOWTX_IND 0x02 -#define EMPTYTX_IND 0x04 -#define DATA_IND 0x08 -#define MODEMCHG_IND 0x20 - -#define FEP_HUPCL 0002000 -#if 0 -#define RTS 0x02 -#define CD 0x08 -#define DSR 0x10 -#define CTS 0x20 -#define RI 0x40 -#define DTR 0x80 -#endif diff --git a/drivers/staging/tty/digiPCI.h b/drivers/staging/tty/digiPCI.h deleted file mode 100644 index 6ca7819..0000000 --- a/drivers/staging/tty/digiPCI.h +++ /dev/null @@ -1,42 +0,0 @@ -/************************************************************************* - * Defines and structure definitions for PCI BIOS Interface - *************************************************************************/ -#define PCIMAX 32 /* maximum number of PCI boards */ - - -#define PCI_VENDOR_DIGI 0x114F -#define PCI_DEVICE_EPC 0x0002 -#define PCI_DEVICE_RIGHTSWITCH 0x0003 /* For testing */ -#define PCI_DEVICE_XEM 0x0004 -#define PCI_DEVICE_XR 0x0005 -#define PCI_DEVICE_CX 0x0006 -#define PCI_DEVICE_XRJ 0x0009 /* Jupiter boards with */ -#define PCI_DEVICE_EPCJ 0x000a /* PLX 9060 chip for PCI */ - - -/* - * On the PCI boards, there is no IO space allocated - * The I/O registers will be in the first 3 bytes of the - * upper 2MB of the 4MB memory space. The board memory - * will be mapped into the low 2MB of the 4MB memory space - */ - -/* Potential location of PCI Bios from E0000 to FFFFF*/ -#define PCI_BIOS_SIZE 0x00020000 - -/* Size of Memory and I/O for PCI (4MB) */ -#define PCI_RAM_SIZE 0x00400000 - -/* Size of Memory (2MB) */ -#define PCI_MEM_SIZE 0x00200000 - -/* Offset of I/0 in Memory (2MB) */ -#define PCI_IO_OFFSET 0x00200000 - -#define MEMOUTB(basemem, pnum, setmemval) *(caddr_t)((basemem) + ( PCI_IO_OFFSET | pnum << 4 | pnum )) = (setmemval) -#define MEMINB(basemem, pnum) *(caddr_t)((basemem) + (PCI_IO_OFFSET | pnum << 4 | pnum )) /* for PCI I/O */ - - - - - diff --git a/drivers/staging/tty/epca.c b/drivers/staging/tty/epca.c deleted file mode 100644 index 2a4ba10..0000000 --- a/drivers/staging/tty/epca.c +++ /dev/null @@ -1,2784 +0,0 @@ -/* - Copyright (C) 1996 Digi International. - - For technical support please email digiLinux@dgii.com or - call Digi tech support at (612) 912-3456 - - ** This driver is no longer supported by Digi ** - - Much of this design and code came from epca.c which was - copyright (C) 1994, 1995 Troy De Jongh, and subsequently - modified by David Nugent, Christoph Lameter, Mike McLagan. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ -/* See README.epca for change history --DAT*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "digiPCI.h" - - -#include "digi1.h" -#include "digiFep1.h" -#include "epca.h" -#include "epcaconfig.h" - -#define VERSION "1.3.0.1-LK2.6" - -/* This major needs to be submitted to Linux to join the majors list */ -#define DIGIINFOMAJOR 35 /* For Digi specific ioctl */ - - -#define MAXCARDS 7 -#define epcaassert(x, msg) if (!(x)) epca_error(__LINE__, msg) - -#define PFX "epca: " - -static int nbdevs, num_cards, liloconfig; -static int digi_poller_inhibited = 1 ; - -static int setup_error_code; -static int invalid_lilo_config; - -/* - * The ISA boards do window flipping into the same spaces so its only sane with - * a single lock. It's still pretty efficient. This lock guards the hardware - * and the tty_port lock guards the kernel side stuff like use counts. Take - * this lock inside the port lock if you must take both. - */ -static DEFINE_SPINLOCK(epca_lock); - -/* MAXBOARDS is typically 12, but ISA and EISA cards are restricted - to 7 below. */ -static struct board_info boards[MAXBOARDS]; - -static struct tty_driver *pc_driver; -static struct tty_driver *pc_info; - -/* ------------------ Begin Digi specific structures -------------------- */ - -/* - * digi_channels represents an array of structures that keep track of each - * channel of the Digi product. Information such as transmit and receive - * pointers, termio data, and signal definitions (DTR, CTS, etc ...) are stored - * here. This structure is NOT used to overlay the cards physical channel - * structure. - */ -static struct channel digi_channels[MAX_ALLOC]; - -/* - * card_ptr is an array used to hold the address of the first channel structure - * of each card. This array will hold the addresses of various channels located - * in digi_channels. - */ -static struct channel *card_ptr[MAXCARDS]; - -static struct timer_list epca_timer; - -/* - * Begin generic memory functions. These functions will be alias (point at) - * more specific functions dependent on the board being configured. - */ -static void memwinon(struct board_info *b, unsigned int win); -static void memwinoff(struct board_info *b, unsigned int win); -static void globalwinon(struct channel *ch); -static void rxwinon(struct channel *ch); -static void txwinon(struct channel *ch); -static void memoff(struct channel *ch); -static void assertgwinon(struct channel *ch); -static void assertmemoff(struct channel *ch); - -/* ---- Begin more 'specific' memory functions for cx_like products --- */ - -static void pcxem_memwinon(struct board_info *b, unsigned int win); -static void pcxem_memwinoff(struct board_info *b, unsigned int win); -static void pcxem_globalwinon(struct channel *ch); -static void pcxem_rxwinon(struct channel *ch); -static void pcxem_txwinon(struct channel *ch); -static void pcxem_memoff(struct channel *ch); - -/* ------ Begin more 'specific' memory functions for the pcxe ------- */ - -static void pcxe_memwinon(struct board_info *b, unsigned int win); -static void pcxe_memwinoff(struct board_info *b, unsigned int win); -static void pcxe_globalwinon(struct channel *ch); -static void pcxe_rxwinon(struct channel *ch); -static void pcxe_txwinon(struct channel *ch); -static void pcxe_memoff(struct channel *ch); - -/* ---- Begin more 'specific' memory functions for the pc64xe and pcxi ---- */ -/* Note : pc64xe and pcxi share the same windowing routines */ - -static void pcxi_memwinon(struct board_info *b, unsigned int win); -static void pcxi_memwinoff(struct board_info *b, unsigned int win); -static void pcxi_globalwinon(struct channel *ch); -static void pcxi_rxwinon(struct channel *ch); -static void pcxi_txwinon(struct channel *ch); -static void pcxi_memoff(struct channel *ch); - -/* - Begin 'specific' do nothing memory functions needed for some cards - */ - -static void dummy_memwinon(struct board_info *b, unsigned int win); -static void dummy_memwinoff(struct board_info *b, unsigned int win); -static void dummy_globalwinon(struct channel *ch); -static void dummy_rxwinon(struct channel *ch); -static void dummy_txwinon(struct channel *ch); -static void dummy_memoff(struct channel *ch); -static void dummy_assertgwinon(struct channel *ch); -static void dummy_assertmemoff(struct channel *ch); - -static struct channel *verifyChannel(struct tty_struct *); -static void pc_sched_event(struct channel *, int); -static void epca_error(int, char *); -static void pc_close(struct tty_struct *, struct file *); -static void shutdown(struct channel *, struct tty_struct *tty); -static void pc_hangup(struct tty_struct *); -static int pc_write_room(struct tty_struct *); -static int pc_chars_in_buffer(struct tty_struct *); -static void pc_flush_buffer(struct tty_struct *); -static void pc_flush_chars(struct tty_struct *); -static int pc_open(struct tty_struct *, struct file *); -static void post_fep_init(unsigned int crd); -static void epcapoll(unsigned long); -static void doevent(int); -static void fepcmd(struct channel *, int, int, int, int, int); -static unsigned termios2digi_h(struct channel *ch, unsigned); -static unsigned termios2digi_i(struct channel *ch, unsigned); -static unsigned termios2digi_c(struct channel *ch, unsigned); -static void epcaparam(struct tty_struct *, struct channel *); -static void receive_data(struct channel *, struct tty_struct *tty); -static int pc_ioctl(struct tty_struct *, - unsigned int, unsigned long); -static int info_ioctl(struct tty_struct *, - unsigned int, unsigned long); -static void pc_set_termios(struct tty_struct *, struct ktermios *); -static void do_softint(struct work_struct *work); -static void pc_stop(struct tty_struct *); -static void pc_start(struct tty_struct *); -static void pc_throttle(struct tty_struct *tty); -static void pc_unthrottle(struct tty_struct *tty); -static int pc_send_break(struct tty_struct *tty, int msec); -static void setup_empty_event(struct tty_struct *tty, struct channel *ch); - -static int pc_write(struct tty_struct *, const unsigned char *, int); -static int pc_init(void); -static int init_PCI(void); - -/* - * Table of functions for each board to handle memory. Mantaining parallelism - * is a *very* good idea here. The idea is for the runtime code to blindly call - * these functions, not knowing/caring about the underlying hardware. This - * stuff should contain no conditionals; if more functionality is needed a - * different entry should be established. These calls are the interface calls - * and are the only functions that should be accessed. Anyone caught making - * direct calls deserves what they get. - */ -static void memwinon(struct board_info *b, unsigned int win) -{ - b->memwinon(b, win); -} - -static void memwinoff(struct board_info *b, unsigned int win) -{ - b->memwinoff(b, win); -} - -static void globalwinon(struct channel *ch) -{ - ch->board->globalwinon(ch); -} - -static void rxwinon(struct channel *ch) -{ - ch->board->rxwinon(ch); -} - -static void txwinon(struct channel *ch) -{ - ch->board->txwinon(ch); -} - -static void memoff(struct channel *ch) -{ - ch->board->memoff(ch); -} -static void assertgwinon(struct channel *ch) -{ - ch->board->assertgwinon(ch); -} - -static void assertmemoff(struct channel *ch) -{ - ch->board->assertmemoff(ch); -} - -/* PCXEM windowing is the same as that used in the PCXR and CX series cards. */ -static void pcxem_memwinon(struct board_info *b, unsigned int win) -{ - outb_p(FEPWIN | win, b->port + 1); -} - -static void pcxem_memwinoff(struct board_info *b, unsigned int win) -{ - outb_p(0, b->port + 1); -} - -static void pcxem_globalwinon(struct channel *ch) -{ - outb_p(FEPWIN, (int)ch->board->port + 1); -} - -static void pcxem_rxwinon(struct channel *ch) -{ - outb_p(ch->rxwin, (int)ch->board->port + 1); -} - -static void pcxem_txwinon(struct channel *ch) -{ - outb_p(ch->txwin, (int)ch->board->port + 1); -} - -static void pcxem_memoff(struct channel *ch) -{ - outb_p(0, (int)ch->board->port + 1); -} - -/* ----------------- Begin pcxe memory window stuff ------------------ */ -static void pcxe_memwinon(struct board_info *b, unsigned int win) -{ - outb_p(FEPWIN | win, b->port + 1); -} - -static void pcxe_memwinoff(struct board_info *b, unsigned int win) -{ - outb_p(inb(b->port) & ~FEPMEM, b->port + 1); - outb_p(0, b->port + 1); -} - -static void pcxe_globalwinon(struct channel *ch) -{ - outb_p(FEPWIN, (int)ch->board->port + 1); -} - -static void pcxe_rxwinon(struct channel *ch) -{ - outb_p(ch->rxwin, (int)ch->board->port + 1); -} - -static void pcxe_txwinon(struct channel *ch) -{ - outb_p(ch->txwin, (int)ch->board->port + 1); -} - -static void pcxe_memoff(struct channel *ch) -{ - outb_p(0, (int)ch->board->port); - outb_p(0, (int)ch->board->port + 1); -} - -/* ------------- Begin pc64xe and pcxi memory window stuff -------------- */ -static void pcxi_memwinon(struct board_info *b, unsigned int win) -{ - outb_p(inb(b->port) | FEPMEM, b->port); -} - -static void pcxi_memwinoff(struct board_info *b, unsigned int win) -{ - outb_p(inb(b->port) & ~FEPMEM, b->port); -} - -static void pcxi_globalwinon(struct channel *ch) -{ - outb_p(FEPMEM, ch->board->port); -} - -static void pcxi_rxwinon(struct channel *ch) -{ - outb_p(FEPMEM, ch->board->port); -} - -static void pcxi_txwinon(struct channel *ch) -{ - outb_p(FEPMEM, ch->board->port); -} - -static void pcxi_memoff(struct channel *ch) -{ - outb_p(0, ch->board->port); -} - -static void pcxi_assertgwinon(struct channel *ch) -{ - epcaassert(inb(ch->board->port) & FEPMEM, "Global memory off"); -} - -static void pcxi_assertmemoff(struct channel *ch) -{ - epcaassert(!(inb(ch->board->port) & FEPMEM), "Memory on"); -} - -/* - * Not all of the cards need specific memory windowing routines. Some cards - * (Such as PCI) needs no windowing routines at all. We provide these do - * nothing routines so that the same code base can be used. The driver will - * ALWAYS call a windowing routine if it thinks it needs to; regardless of the - * card. However, dependent on the card the routine may or may not do anything. - */ -static void dummy_memwinon(struct board_info *b, unsigned int win) -{ -} - -static void dummy_memwinoff(struct board_info *b, unsigned int win) -{ -} - -static void dummy_globalwinon(struct channel *ch) -{ -} - -static void dummy_rxwinon(struct channel *ch) -{ -} - -static void dummy_txwinon(struct channel *ch) -{ -} - -static void dummy_memoff(struct channel *ch) -{ -} - -static void dummy_assertgwinon(struct channel *ch) -{ -} - -static void dummy_assertmemoff(struct channel *ch) -{ -} - -static struct channel *verifyChannel(struct tty_struct *tty) -{ - /* - * This routine basically provides a sanity check. It insures that the - * channel returned is within the proper range of addresses as well as - * properly initialized. If some bogus info gets passed in - * through tty->driver_data this should catch it. - */ - if (tty) { - struct channel *ch = tty->driver_data; - if (ch >= &digi_channels[0] && ch < &digi_channels[nbdevs]) { - if (ch->magic == EPCA_MAGIC) - return ch; - } - } - return NULL; -} - -static void pc_sched_event(struct channel *ch, int event) -{ - /* - * We call this to schedule interrupt processing on some event. The - * kernel sees our request and calls the related routine in OUR driver. - */ - ch->event |= 1 << event; - schedule_work(&ch->tqueue); -} - -static void epca_error(int line, char *msg) -{ - printk(KERN_ERR "epca_error (Digi): line = %d %s\n", line, msg); -} - -static void pc_close(struct tty_struct *tty, struct file *filp) -{ - struct channel *ch; - struct tty_port *port; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch == NULL) - return; - port = &ch->port; - - if (tty_port_close_start(port, tty, filp) == 0) - return; - - pc_flush_buffer(tty); - shutdown(ch, tty); - - tty_port_close_end(port, tty); - ch->event = 0; /* FIXME: review ch->event locking */ - tty_port_tty_set(port, NULL); -} - -static void shutdown(struct channel *ch, struct tty_struct *tty) -{ - unsigned long flags; - struct board_chan __iomem *bc; - struct tty_port *port = &ch->port; - - if (!(port->flags & ASYNC_INITIALIZED)) - return; - - spin_lock_irqsave(&epca_lock, flags); - - globalwinon(ch); - bc = ch->brdchan; - - /* - * In order for an event to be generated on the receipt of data the - * idata flag must be set. Since we are shutting down, this is not - * necessary clear this flag. - */ - if (bc) - writeb(0, &bc->idata); - - /* If we're a modem control device and HUPCL is on, drop RTS & DTR. */ - if (tty->termios->c_cflag & HUPCL) { - ch->omodem &= ~(ch->m_rts | ch->m_dtr); - fepcmd(ch, SETMODEM, 0, ch->m_dtr | ch->m_rts, 10, 1); - } - memoff(ch); - - /* - * The channel has officially been closed. The next time it is opened it - * will have to reinitialized. Set a flag to indicate this. - */ - /* Prevent future Digi programmed interrupts from coming active */ - port->flags &= ~ASYNC_INITIALIZED; - spin_unlock_irqrestore(&epca_lock, flags); -} - -static void pc_hangup(struct tty_struct *tty) -{ - struct channel *ch; - - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - pc_flush_buffer(tty); - tty_ldisc_flush(tty); - shutdown(ch, tty); - - ch->event = 0; /* FIXME: review locking of ch->event */ - tty_port_hangup(&ch->port); - } -} - -static int pc_write(struct tty_struct *tty, - const unsigned char *buf, int bytesAvailable) -{ - unsigned int head, tail; - int dataLen; - int size; - int amountCopied; - struct channel *ch; - unsigned long flags; - int remain; - struct board_chan __iomem *bc; - - /* - * pc_write is primarily called directly by the kernel routine - * tty_write (Though it can also be called by put_char) found in - * tty_io.c. pc_write is passed a line discipline buffer where the data - * to be written out is stored. The line discipline implementation - * itself is done at the kernel level and is not brought into the - * driver. - */ - - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch == NULL) - return 0; - - /* Make a pointer to the channel data structure found on the board. */ - bc = ch->brdchan; - size = ch->txbufsize; - amountCopied = 0; - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - - head = readw(&bc->tin) & (size - 1); - tail = readw(&bc->tout); - - if (tail != readw(&bc->tout)) - tail = readw(&bc->tout); - tail &= (size - 1); - - if (head >= tail) { - /* head has not wrapped */ - /* - * remain (much like dataLen above) represents the total amount - * of space available on the card for data. Here dataLen - * represents the space existing between the head pointer and - * the end of buffer. This is important because a memcpy cannot - * be told to automatically wrap around when it hits the buffer - * end. - */ - dataLen = size - head; - remain = size - (head - tail) - 1; - } else { - /* head has wrapped around */ - remain = tail - head - 1; - dataLen = remain; - } - /* - * Check the space on the card. If we have more data than space; reduce - * the amount of data to fit the space. - */ - bytesAvailable = min(remain, bytesAvailable); - txwinon(ch); - while (bytesAvailable > 0) { - /* there is data to copy onto card */ - - /* - * If head is not wrapped, the below will make sure the first - * data copy fills to the end of card buffer. - */ - dataLen = min(bytesAvailable, dataLen); - memcpy_toio(ch->txptr + head, buf, dataLen); - buf += dataLen; - head += dataLen; - amountCopied += dataLen; - bytesAvailable -= dataLen; - - if (head >= size) { - head = 0; - dataLen = tail; - } - } - ch->statusflags |= TXBUSY; - globalwinon(ch); - writew(head, &bc->tin); - - if ((ch->statusflags & LOWWAIT) == 0) { - ch->statusflags |= LOWWAIT; - writeb(1, &bc->ilow); - } - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - return amountCopied; -} - -static int pc_write_room(struct tty_struct *tty) -{ - int remain = 0; - struct channel *ch; - unsigned long flags; - unsigned int head, tail; - struct board_chan __iomem *bc; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - - bc = ch->brdchan; - head = readw(&bc->tin) & (ch->txbufsize - 1); - tail = readw(&bc->tout); - - if (tail != readw(&bc->tout)) - tail = readw(&bc->tout); - /* Wrap tail if necessary */ - tail &= (ch->txbufsize - 1); - remain = tail - head - 1; - if (remain < 0) - remain += ch->txbufsize; - - if (remain && (ch->statusflags & LOWWAIT) == 0) { - ch->statusflags |= LOWWAIT; - writeb(1, &bc->ilow); - } - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - } - /* Return how much room is left on card */ - return remain; -} - -static int pc_chars_in_buffer(struct tty_struct *tty) -{ - int chars; - unsigned int ctail, head, tail; - int remain; - unsigned long flags; - struct channel *ch; - struct board_chan __iomem *bc; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch == NULL) - return 0; - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - - bc = ch->brdchan; - tail = readw(&bc->tout); - head = readw(&bc->tin); - ctail = readw(&ch->mailbox->cout); - - if (tail == head && readw(&ch->mailbox->cin) == ctail && - readb(&bc->tbusy) == 0) - chars = 0; - else { /* Begin if some space on the card has been used */ - head = readw(&bc->tin) & (ch->txbufsize - 1); - tail &= (ch->txbufsize - 1); - /* - * The logic here is basically opposite of the above - * pc_write_room here we are finding the amount of bytes in the - * buffer filled. Not the amount of bytes empty. - */ - remain = tail - head - 1; - if (remain < 0) - remain += ch->txbufsize; - chars = (int)(ch->txbufsize - remain); - /* - * Make it possible to wakeup anything waiting for output in - * tty_ioctl.c, etc. - * - * If not already set. Setup an event to indicate when the - * transmit buffer empties. - */ - if (!(ch->statusflags & EMPTYWAIT)) - setup_empty_event(tty, ch); - } /* End if some space on the card has been used */ - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - /* Return number of characters residing on card. */ - return chars; -} - -static void pc_flush_buffer(struct tty_struct *tty) -{ - unsigned int tail; - unsigned long flags; - struct channel *ch; - struct board_chan __iomem *bc; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch == NULL) - return; - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - bc = ch->brdchan; - tail = readw(&bc->tout); - /* Have FEP move tout pointer; effectively flushing transmit buffer */ - fepcmd(ch, STOUT, (unsigned) tail, 0, 0, 0); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - tty_wakeup(tty); -} - -static void pc_flush_chars(struct tty_struct *tty) -{ - struct channel *ch; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - unsigned long flags; - spin_lock_irqsave(&epca_lock, flags); - /* - * If not already set and the transmitter is busy setup an - * event to indicate when the transmit empties. - */ - if ((ch->statusflags & TXBUSY) && - !(ch->statusflags & EMPTYWAIT)) - setup_empty_event(tty, ch); - spin_unlock_irqrestore(&epca_lock, flags); - } -} - -static int epca_carrier_raised(struct tty_port *port) -{ - struct channel *ch = container_of(port, struct channel, port); - if (ch->imodem & ch->dcd) - return 1; - return 0; -} - -static void epca_dtr_rts(struct tty_port *port, int onoff) -{ -} - -static int pc_open(struct tty_struct *tty, struct file *filp) -{ - struct channel *ch; - struct tty_port *port; - unsigned long flags; - int line, retval, boardnum; - struct board_chan __iomem *bc; - unsigned int head; - - line = tty->index; - if (line < 0 || line >= nbdevs) - return -ENODEV; - - ch = &digi_channels[line]; - port = &ch->port; - boardnum = ch->boardnum; - - /* Check status of board configured in system. */ - - /* - * I check to see if the epca_setup routine detected a user error. It - * might be better to put this in pc_init, but for the moment it goes - * here. - */ - if (invalid_lilo_config) { - if (setup_error_code & INVALID_BOARD_TYPE) - printk(KERN_ERR "epca: pc_open: Invalid board type specified in kernel options.\n"); - if (setup_error_code & INVALID_NUM_PORTS) - printk(KERN_ERR "epca: pc_open: Invalid number of ports specified in kernel options.\n"); - if (setup_error_code & INVALID_MEM_BASE) - printk(KERN_ERR "epca: pc_open: Invalid board memory address specified in kernel options.\n"); - if (setup_error_code & INVALID_PORT_BASE) - printk(KERN_ERR "epca; pc_open: Invalid board port address specified in kernel options.\n"); - if (setup_error_code & INVALID_BOARD_STATUS) - printk(KERN_ERR "epca: pc_open: Invalid board status specified in kernel options.\n"); - if (setup_error_code & INVALID_ALTPIN) - printk(KERN_ERR "epca: pc_open: Invalid board altpin specified in kernel options;\n"); - tty->driver_data = NULL; /* Mark this device as 'down' */ - return -ENODEV; - } - if (boardnum >= num_cards || boards[boardnum].status == DISABLED) { - tty->driver_data = NULL; /* Mark this device as 'down' */ - return -ENODEV; - } - - bc = ch->brdchan; - if (bc == NULL) { - tty->driver_data = NULL; - return -ENODEV; - } - - spin_lock_irqsave(&port->lock, flags); - /* - * Every time a channel is opened, increment a counter. This is - * necessary because we do not wish to flush and shutdown the channel - * until the last app holding the channel open, closes it. - */ - port->count++; - /* - * Set a kernel structures pointer to our local channel structure. This - * way we can get to it when passed only a tty struct. - */ - tty->driver_data = ch; - port->tty = tty; - /* - * If this is the first time the channel has been opened, initialize - * the tty->termios struct otherwise let pc_close handle it. - */ - spin_lock(&epca_lock); - globalwinon(ch); - ch->statusflags = 0; - - /* Save boards current modem status */ - ch->imodem = readb(&bc->mstat); - - /* - * Set receive head and tail ptrs to each other. This indicates no data - * available to read. - */ - head = readw(&bc->rin); - writew(head, &bc->rout); - - /* Set the channels associated tty structure */ - - /* - * The below routine generally sets up parity, baud, flow control - * issues, etc.... It effect both control flags and input flags. - */ - epcaparam(tty, ch); - memoff(ch); - spin_unlock(&epca_lock); - port->flags |= ASYNC_INITIALIZED; - spin_unlock_irqrestore(&port->lock, flags); - - retval = tty_port_block_til_ready(port, tty, filp); - if (retval) - return retval; - /* - * Set this again in case a hangup set it to zero while this open() was - * waiting for the line... - */ - spin_lock_irqsave(&port->lock, flags); - port->tty = tty; - spin_lock(&epca_lock); - globalwinon(ch); - /* Enable Digi Data events */ - writeb(1, &bc->idata); - memoff(ch); - spin_unlock(&epca_lock); - spin_unlock_irqrestore(&port->lock, flags); - return 0; -} - -static int __init epca_module_init(void) -{ - return pc_init(); -} -module_init(epca_module_init); - -static struct pci_driver epca_driver; - -static void __exit epca_module_exit(void) -{ - int count, crd; - struct board_info *bd; - struct channel *ch; - - del_timer_sync(&epca_timer); - - if (tty_unregister_driver(pc_driver) || - tty_unregister_driver(pc_info)) { - printk(KERN_WARNING "epca: cleanup_module failed to un-register tty driver\n"); - return; - } - put_tty_driver(pc_driver); - put_tty_driver(pc_info); - - for (crd = 0; crd < num_cards; crd++) { - bd = &boards[crd]; - if (!bd) { /* sanity check */ - printk(KERN_ERR " - Digi : cleanup_module failed\n"); - return; - } - ch = card_ptr[crd]; - for (count = 0; count < bd->numports; count++, ch++) { - struct tty_struct *tty = tty_port_tty_get(&ch->port); - if (tty) { - tty_hangup(tty); - tty_kref_put(tty); - } - } - } - pci_unregister_driver(&epca_driver); -} -module_exit(epca_module_exit); - -static const struct tty_operations pc_ops = { - .open = pc_open, - .close = pc_close, - .write = pc_write, - .write_room = pc_write_room, - .flush_buffer = pc_flush_buffer, - .chars_in_buffer = pc_chars_in_buffer, - .flush_chars = pc_flush_chars, - .ioctl = pc_ioctl, - .set_termios = pc_set_termios, - .stop = pc_stop, - .start = pc_start, - .throttle = pc_throttle, - .unthrottle = pc_unthrottle, - .hangup = pc_hangup, - .break_ctl = pc_send_break -}; - -static const struct tty_port_operations epca_port_ops = { - .carrier_raised = epca_carrier_raised, - .dtr_rts = epca_dtr_rts, -}; - -static int info_open(struct tty_struct *tty, struct file *filp) -{ - return 0; -} - -static const struct tty_operations info_ops = { - .open = info_open, - .ioctl = info_ioctl, -}; - -static int __init pc_init(void) -{ - int crd; - struct board_info *bd; - unsigned char board_id = 0; - int err = -ENOMEM; - - int pci_boards_found, pci_count; - - pci_count = 0; - - pc_driver = alloc_tty_driver(MAX_ALLOC); - if (!pc_driver) - goto out1; - - pc_info = alloc_tty_driver(MAX_ALLOC); - if (!pc_info) - goto out2; - - /* - * If epca_setup has not been ran by LILO set num_cards to defaults; - * copy board structure defined by digiConfig into drivers board - * structure. Note : If LILO has ran epca_setup then epca_setup will - * handle defining num_cards as well as copying the data into the board - * structure. - */ - if (!liloconfig) { - /* driver has been configured via. epcaconfig */ - nbdevs = NBDEVS; - num_cards = NUMCARDS; - memcpy(&boards, &static_boards, - sizeof(struct board_info) * NUMCARDS); - } - - /* - * Note : If lilo was used to configure the driver and the ignore - * epcaconfig option was chosen (digiepca=2) then nbdevs and num_cards - * will equal 0 at this point. This is okay; PCI cards will still be - * picked up if detected. - */ - - /* - * Set up interrupt, we will worry about memory allocation in - * post_fep_init. - */ - printk(KERN_INFO "DIGI epca driver version %s loaded.\n", VERSION); - - /* - * NOTE : This code assumes that the number of ports found in the - * boards array is correct. This could be wrong if the card in question - * is PCI (And therefore has no ports entry in the boards structure.) - * The rest of the information will be valid for PCI because the - * beginning of pc_init scans for PCI and determines i/o and base - * memory addresses. I am not sure if it is possible to read the number - * of ports supported by the card prior to it being booted (Since that - * is the state it is in when pc_init is run). Because it is not - * possible to query the number of supported ports until after the card - * has booted; we are required to calculate the card_ptrs as the card - * is initialized (Inside post_fep_init). The negative thing about this - * approach is that digiDload's call to GET_INFO will have a bad port - * value. (Since this is called prior to post_fep_init.) - */ - pci_boards_found = 0; - if (num_cards < MAXBOARDS) - pci_boards_found += init_PCI(); - num_cards += pci_boards_found; - - pc_driver->owner = THIS_MODULE; - pc_driver->name = "ttyD"; - pc_driver->major = DIGI_MAJOR; - pc_driver->minor_start = 0; - pc_driver->type = TTY_DRIVER_TYPE_SERIAL; - pc_driver->subtype = SERIAL_TYPE_NORMAL; - pc_driver->init_termios = tty_std_termios; - pc_driver->init_termios.c_iflag = 0; - pc_driver->init_termios.c_oflag = 0; - pc_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; - pc_driver->init_termios.c_lflag = 0; - pc_driver->init_termios.c_ispeed = 9600; - pc_driver->init_termios.c_ospeed = 9600; - pc_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_HARDWARE_BREAK; - tty_set_operations(pc_driver, &pc_ops); - - pc_info->owner = THIS_MODULE; - pc_info->name = "digi_ctl"; - pc_info->major = DIGIINFOMAJOR; - pc_info->minor_start = 0; - pc_info->type = TTY_DRIVER_TYPE_SERIAL; - pc_info->subtype = SERIAL_TYPE_INFO; - pc_info->init_termios = tty_std_termios; - pc_info->init_termios.c_iflag = 0; - pc_info->init_termios.c_oflag = 0; - pc_info->init_termios.c_lflag = 0; - pc_info->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL; - pc_info->init_termios.c_ispeed = 9600; - pc_info->init_termios.c_ospeed = 9600; - pc_info->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(pc_info, &info_ops); - - - for (crd = 0; crd < num_cards; crd++) { - /* - * This is where the appropriate memory handlers for the - * hardware is set. Everything at runtime blindly jumps through - * these vectors. - */ - - /* defined in epcaconfig.h */ - bd = &boards[crd]; - - switch (bd->type) { - case PCXEM: - case EISAXEM: - bd->memwinon = pcxem_memwinon; - bd->memwinoff = pcxem_memwinoff; - bd->globalwinon = pcxem_globalwinon; - bd->txwinon = pcxem_txwinon; - bd->rxwinon = pcxem_rxwinon; - bd->memoff = pcxem_memoff; - bd->assertgwinon = dummy_assertgwinon; - bd->assertmemoff = dummy_assertmemoff; - break; - - case PCIXEM: - case PCIXRJ: - case PCIXR: - bd->memwinon = dummy_memwinon; - bd->memwinoff = dummy_memwinoff; - bd->globalwinon = dummy_globalwinon; - bd->txwinon = dummy_txwinon; - bd->rxwinon = dummy_rxwinon; - bd->memoff = dummy_memoff; - bd->assertgwinon = dummy_assertgwinon; - bd->assertmemoff = dummy_assertmemoff; - break; - - case PCXE: - case PCXEVE: - bd->memwinon = pcxe_memwinon; - bd->memwinoff = pcxe_memwinoff; - bd->globalwinon = pcxe_globalwinon; - bd->txwinon = pcxe_txwinon; - bd->rxwinon = pcxe_rxwinon; - bd->memoff = pcxe_memoff; - bd->assertgwinon = dummy_assertgwinon; - bd->assertmemoff = dummy_assertmemoff; - break; - - case PCXI: - case PC64XE: - bd->memwinon = pcxi_memwinon; - bd->memwinoff = pcxi_memwinoff; - bd->globalwinon = pcxi_globalwinon; - bd->txwinon = pcxi_txwinon; - bd->rxwinon = pcxi_rxwinon; - bd->memoff = pcxi_memoff; - bd->assertgwinon = pcxi_assertgwinon; - bd->assertmemoff = pcxi_assertmemoff; - break; - - default: - break; - } - - /* - * Some cards need a memory segment to be defined for use in - * transmit and receive windowing operations. These boards are - * listed in the below switch. In the case of the XI the amount - * of memory on the board is variable so the memory_seg is also - * variable. This code determines what they segment should be. - */ - switch (bd->type) { - case PCXE: - case PCXEVE: - case PC64XE: - bd->memory_seg = 0xf000; - break; - - case PCXI: - board_id = inb((int)bd->port); - if ((board_id & 0x1) == 0x1) { - /* it's an XI card */ - /* Is it a 64K board */ - if ((board_id & 0x30) == 0) - bd->memory_seg = 0xf000; - - /* Is it a 128K board */ - if ((board_id & 0x30) == 0x10) - bd->memory_seg = 0xe000; - - /* Is is a 256K board */ - if ((board_id & 0x30) == 0x20) - bd->memory_seg = 0xc000; - - /* Is it a 512K board */ - if ((board_id & 0x30) == 0x30) - bd->memory_seg = 0x8000; - } else - printk(KERN_ERR "epca: Board at 0x%x doesn't appear to be an XI\n", (int)bd->port); - break; - } - } - - err = tty_register_driver(pc_driver); - if (err) { - printk(KERN_ERR "Couldn't register Digi PC/ driver"); - goto out3; - } - - err = tty_register_driver(pc_info); - if (err) { - printk(KERN_ERR "Couldn't register Digi PC/ info "); - goto out4; - } - - /* Start up the poller to check for events on all enabled boards */ - init_timer(&epca_timer); - epca_timer.function = epcapoll; - mod_timer(&epca_timer, jiffies + HZ/25); - return 0; - -out4: - tty_unregister_driver(pc_driver); -out3: - put_tty_driver(pc_info); -out2: - put_tty_driver(pc_driver); -out1: - return err; -} - -static void post_fep_init(unsigned int crd) -{ - int i; - void __iomem *memaddr; - struct global_data __iomem *gd; - struct board_info *bd; - struct board_chan __iomem *bc; - struct channel *ch; - int shrinkmem = 0, lowwater; - - /* - * This call is made by the user via. the ioctl call DIGI_INIT. It is - * responsible for setting up all the card specific stuff. - */ - bd = &boards[crd]; - - /* - * If this is a PCI board, get the port info. Remember PCI cards do not - * have entries into the epcaconfig.h file, so we can't get the number - * of ports from it. Unfortunetly, this means that anyone doing a - * DIGI_GETINFO before the board has booted will get an invalid number - * of ports returned (It should return 0). Calls to DIGI_GETINFO after - * DIGI_INIT has been called will return the proper values. - */ - if (bd->type >= PCIXEM) { /* Begin get PCI number of ports */ - /* - * Below we use XEMPORTS as a memory offset regardless of which - * PCI card it is. This is because all of the supported PCI - * cards have the same memory offset for the channel data. This - * will have to be changed if we ever develop a PCI/XE card. - * NOTE : The FEP manual states that the port offset is 0xC22 - * as opposed to 0xC02. This is only true for PC/XE, and PC/XI - * cards; not for the XEM, or CX series. On the PCI cards the - * number of ports is determined by reading a ID PROM located - * in the box attached to the card. The card can then determine - * the index the id to determine the number of ports available. - * (FYI - The id should be located at 0x1ac (And may use up to - * 4 bytes if the box in question is a XEM or CX)). - */ - /* PCI cards are already remapped at this point ISA are not */ - bd->numports = readw(bd->re_map_membase + XEMPORTS); - epcaassert(bd->numports <= 64, "PCI returned a invalid number of ports"); - nbdevs += (bd->numports); - } else { - /* Fix up the mappings for ISA/EISA etc */ - /* FIXME: 64K - can we be smarter ? */ - bd->re_map_membase = ioremap_nocache(bd->membase, 0x10000); - } - - if (crd != 0) - card_ptr[crd] = card_ptr[crd-1] + boards[crd-1].numports; - else - card_ptr[crd] = &digi_channels[crd]; /* <- For card 0 only */ - - ch = card_ptr[crd]; - epcaassert(ch <= &digi_channels[nbdevs - 1], "ch out of range"); - - memaddr = bd->re_map_membase; - - /* - * The below assignment will set bc to point at the BEGINNING of the - * cards channel structures. For 1 card there will be between 8 and 64 - * of these structures. - */ - bc = memaddr + CHANSTRUCT; - - /* - * The below assignment will set gd to point at the BEGINNING of global - * memory address 0xc00. The first data in that global memory actually - * starts at address 0xc1a. The command in pointer begins at 0xd10. - */ - gd = memaddr + GLOBAL; - - /* - * XEPORTS (address 0xc22) points at the number of channels the card - * supports. (For 64XE, XI, XEM, and XR use 0xc02) - */ - if ((bd->type == PCXEVE || bd->type == PCXE) && - (readw(memaddr + XEPORTS) < 3)) - shrinkmem = 1; - if (bd->type < PCIXEM) - if (!request_region((int)bd->port, 4, board_desc[bd->type])) - return; - memwinon(bd, 0); - - /* - * Remember ch is the main drivers channels structure, while bc is the - * cards channel structure. - */ - for (i = 0; i < bd->numports; i++, ch++, bc++) { - unsigned long flags; - u16 tseg, rseg; - - tty_port_init(&ch->port); - ch->port.ops = &epca_port_ops; - ch->brdchan = bc; - ch->mailbox = gd; - INIT_WORK(&ch->tqueue, do_softint); - ch->board = &boards[crd]; - - spin_lock_irqsave(&epca_lock, flags); - switch (bd->type) { - /* - * Since some of the boards use different bitmaps for - * their control signals we cannot hard code these - * values and retain portability. We virtualize this - * data here. - */ - case EISAXEM: - case PCXEM: - case PCIXEM: - case PCIXRJ: - case PCIXR: - ch->m_rts = 0x02; - ch->m_dcd = 0x80; - ch->m_dsr = 0x20; - ch->m_cts = 0x10; - ch->m_ri = 0x40; - ch->m_dtr = 0x01; - break; - - case PCXE: - case PCXEVE: - case PCXI: - case PC64XE: - ch->m_rts = 0x02; - ch->m_dcd = 0x08; - ch->m_dsr = 0x10; - ch->m_cts = 0x20; - ch->m_ri = 0x40; - ch->m_dtr = 0x80; - break; - } - - if (boards[crd].altpin) { - ch->dsr = ch->m_dcd; - ch->dcd = ch->m_dsr; - ch->digiext.digi_flags |= DIGI_ALTPIN; - } else { - ch->dcd = ch->m_dcd; - ch->dsr = ch->m_dsr; - } - - ch->boardnum = crd; - ch->channelnum = i; - ch->magic = EPCA_MAGIC; - tty_port_tty_set(&ch->port, NULL); - - if (shrinkmem) { - fepcmd(ch, SETBUFFER, 32, 0, 0, 0); - shrinkmem = 0; - } - - tseg = readw(&bc->tseg); - rseg = readw(&bc->rseg); - - switch (bd->type) { - case PCIXEM: - case PCIXRJ: - case PCIXR: - /* Cover all the 2MEG cards */ - ch->txptr = memaddr + ((tseg << 4) & 0x1fffff); - ch->rxptr = memaddr + ((rseg << 4) & 0x1fffff); - ch->txwin = FEPWIN | (tseg >> 11); - ch->rxwin = FEPWIN | (rseg >> 11); - break; - - case PCXEM: - case EISAXEM: - /* Cover all the 32K windowed cards */ - /* Mask equal to window size - 1 */ - ch->txptr = memaddr + ((tseg << 4) & 0x7fff); - ch->rxptr = memaddr + ((rseg << 4) & 0x7fff); - ch->txwin = FEPWIN | (tseg >> 11); - ch->rxwin = FEPWIN | (rseg >> 11); - break; - - case PCXEVE: - case PCXE: - ch->txptr = memaddr + (((tseg - bd->memory_seg) << 4) - & 0x1fff); - ch->txwin = FEPWIN | ((tseg - bd->memory_seg) >> 9); - ch->rxptr = memaddr + (((rseg - bd->memory_seg) << 4) - & 0x1fff); - ch->rxwin = FEPWIN | ((rseg - bd->memory_seg) >> 9); - break; - - case PCXI: - case PC64XE: - ch->txptr = memaddr + ((tseg - bd->memory_seg) << 4); - ch->rxptr = memaddr + ((rseg - bd->memory_seg) << 4); - ch->txwin = ch->rxwin = 0; - break; - } - - ch->txbufhead = 0; - ch->txbufsize = readw(&bc->tmax) + 1; - - ch->rxbufhead = 0; - ch->rxbufsize = readw(&bc->rmax) + 1; - - lowwater = ch->txbufsize >= 2000 ? 1024 : (ch->txbufsize / 2); - - /* Set transmitter low water mark */ - fepcmd(ch, STXLWATER, lowwater, 0, 10, 0); - - /* Set receiver low water mark */ - fepcmd(ch, SRXLWATER, (ch->rxbufsize / 4), 0, 10, 0); - - /* Set receiver high water mark */ - fepcmd(ch, SRXHWATER, (3 * ch->rxbufsize / 4), 0, 10, 0); - - writew(100, &bc->edelay); - writeb(1, &bc->idata); - - ch->startc = readb(&bc->startc); - ch->stopc = readb(&bc->stopc); - ch->startca = readb(&bc->startca); - ch->stopca = readb(&bc->stopca); - - ch->fepcflag = 0; - ch->fepiflag = 0; - ch->fepoflag = 0; - ch->fepstartc = 0; - ch->fepstopc = 0; - ch->fepstartca = 0; - ch->fepstopca = 0; - - ch->port.close_delay = 50; - - spin_unlock_irqrestore(&epca_lock, flags); - } - - printk(KERN_INFO - "Digi PC/Xx Driver V%s: %s I/O = 0x%lx Mem = 0x%lx Ports = %d\n", - VERSION, board_desc[bd->type], (long)bd->port, - (long)bd->membase, bd->numports); - memwinoff(bd, 0); -} - -static void epcapoll(unsigned long ignored) -{ - unsigned long flags; - int crd; - unsigned int head, tail; - struct channel *ch; - struct board_info *bd; - - /* - * This routine is called upon every timer interrupt. Even though the - * Digi series cards are capable of generating interrupts this method - * of non-looping polling is more efficient. This routine checks for - * card generated events (Such as receive data, are transmit buffer - * empty) and acts on those events. - */ - for (crd = 0; crd < num_cards; crd++) { - bd = &boards[crd]; - ch = card_ptr[crd]; - - if ((bd->status == DISABLED) || digi_poller_inhibited) - continue; - - /* - * assertmemoff is not needed here; indeed it is an empty - * subroutine. It is being kept because future boards may need - * this as well as some legacy boards. - */ - spin_lock_irqsave(&epca_lock, flags); - - assertmemoff(ch); - - globalwinon(ch); - - /* - * In this case head and tail actually refer to the event queue - * not the transmit or receive queue. - */ - head = readw(&ch->mailbox->ein); - tail = readw(&ch->mailbox->eout); - - /* If head isn't equal to tail we have an event */ - if (head != tail) - doevent(crd); - memoff(ch); - - spin_unlock_irqrestore(&epca_lock, flags); - } /* End for each card */ - mod_timer(&epca_timer, jiffies + (HZ / 25)); -} - -static void doevent(int crd) -{ - void __iomem *eventbuf; - struct channel *ch, *chan0; - static struct tty_struct *tty; - struct board_info *bd; - struct board_chan __iomem *bc; - unsigned int tail, head; - int event, channel; - int mstat, lstat; - - /* - * This subroutine is called by epcapoll when an event is detected - * in the event queue. This routine responds to those events. - */ - bd = &boards[crd]; - - chan0 = card_ptr[crd]; - epcaassert(chan0 <= &digi_channels[nbdevs - 1], "ch out of range"); - assertgwinon(chan0); - while ((tail = readw(&chan0->mailbox->eout)) != - (head = readw(&chan0->mailbox->ein))) { - /* Begin while something in event queue */ - assertgwinon(chan0); - eventbuf = bd->re_map_membase + tail + ISTART; - /* Get the channel the event occurred on */ - channel = readb(eventbuf); - /* Get the actual event code that occurred */ - event = readb(eventbuf + 1); - /* - * The two assignments below get the current modem status - * (mstat) and the previous modem status (lstat). These are - * useful because an event could signal a change in modem - * signals itself. - */ - mstat = readb(eventbuf + 2); - lstat = readb(eventbuf + 3); - - ch = chan0 + channel; - if ((unsigned)channel >= bd->numports || !ch) { - if (channel >= bd->numports) - ch = chan0; - bc = ch->brdchan; - goto next; - } - - bc = ch->brdchan; - if (bc == NULL) - goto next; - - tty = tty_port_tty_get(&ch->port); - if (event & DATA_IND) { /* Begin DATA_IND */ - receive_data(ch, tty); - assertgwinon(ch); - } /* End DATA_IND */ - /* else *//* Fix for DCD transition missed bug */ - if (event & MODEMCHG_IND) { - /* A modem signal change has been indicated */ - ch->imodem = mstat; - if (test_bit(ASYNCB_CHECK_CD, &ch->port.flags)) { - /* We are now receiving dcd */ - if (mstat & ch->dcd) - wake_up_interruptible(&ch->port.open_wait); - else /* No dcd; hangup */ - pc_sched_event(ch, EPCA_EVENT_HANGUP); - } - } - if (tty) { - if (event & BREAK_IND) { - /* A break has been indicated */ - tty_insert_flip_char(tty, 0, TTY_BREAK); - tty_schedule_flip(tty); - } else if (event & LOWTX_IND) { - if (ch->statusflags & LOWWAIT) { - ch->statusflags &= ~LOWWAIT; - tty_wakeup(tty); - } - } else if (event & EMPTYTX_IND) { - /* This event is generated by - setup_empty_event */ - ch->statusflags &= ~TXBUSY; - if (ch->statusflags & EMPTYWAIT) { - ch->statusflags &= ~EMPTYWAIT; - tty_wakeup(tty); - } - } - tty_kref_put(tty); - } -next: - globalwinon(ch); - BUG_ON(!bc); - writew(1, &bc->idata); - writew((tail + 4) & (IMAX - ISTART - 4), &chan0->mailbox->eout); - globalwinon(chan0); - } /* End while something in event queue */ -} - -static void fepcmd(struct channel *ch, int cmd, int word_or_byte, - int byte2, int ncmds, int bytecmd) -{ - unchar __iomem *memaddr; - unsigned int head, cmdTail, cmdStart, cmdMax; - long count; - int n; - - /* This is the routine in which commands may be passed to the card. */ - - if (ch->board->status == DISABLED) - return; - assertgwinon(ch); - /* Remember head (As well as max) is just an offset not a base addr */ - head = readw(&ch->mailbox->cin); - /* cmdStart is a base address */ - cmdStart = readw(&ch->mailbox->cstart); - /* - * We do the addition below because we do not want a max pointer - * relative to cmdStart. We want a max pointer that points at the - * physical end of the command queue. - */ - cmdMax = (cmdStart + 4 + readw(&ch->mailbox->cmax)); - memaddr = ch->board->re_map_membase; - - if (head >= (cmdMax - cmdStart) || (head & 03)) { - printk(KERN_ERR "line %d: Out of range, cmd = %x, head = %x\n", - __LINE__, cmd, head); - printk(KERN_ERR "line %d: Out of range, cmdMax = %x, cmdStart = %x\n", - __LINE__, cmdMax, cmdStart); - return; - } - if (bytecmd) { - writeb(cmd, memaddr + head + cmdStart + 0); - writeb(ch->channelnum, memaddr + head + cmdStart + 1); - /* Below word_or_byte is bits to set */ - writeb(word_or_byte, memaddr + head + cmdStart + 2); - /* Below byte2 is bits to reset */ - writeb(byte2, memaddr + head + cmdStart + 3); - } else { - writeb(cmd, memaddr + head + cmdStart + 0); - writeb(ch->channelnum, memaddr + head + cmdStart + 1); - writeb(word_or_byte, memaddr + head + cmdStart + 2); - } - head = (head + 4) & (cmdMax - cmdStart - 4); - writew(head, &ch->mailbox->cin); - count = FEPTIMEOUT; - - for (;;) { - count--; - if (count == 0) { - printk(KERN_ERR " - Fep not responding in fepcmd()\n"); - return; - } - head = readw(&ch->mailbox->cin); - cmdTail = readw(&ch->mailbox->cout); - n = (head - cmdTail) & (cmdMax - cmdStart - 4); - /* - * Basically this will break when the FEP acknowledges the - * command by incrementing cmdTail (Making it equal to head). - */ - if (n <= ncmds * (sizeof(short) * 4)) - break; - } -} - -/* - * Digi products use fields in their channels structures that are very similar - * to the c_cflag and c_iflag fields typically found in UNIX termios - * structures. The below three routines allow mappings between these hardware - * "flags" and their respective Linux flags. - */ -static unsigned termios2digi_h(struct channel *ch, unsigned cflag) -{ - unsigned res = 0; - - if (cflag & CRTSCTS) { - ch->digiext.digi_flags |= (RTSPACE | CTSPACE); - res |= ((ch->m_cts) | (ch->m_rts)); - } - - if (ch->digiext.digi_flags & RTSPACE) - res |= ch->m_rts; - - if (ch->digiext.digi_flags & DTRPACE) - res |= ch->m_dtr; - - if (ch->digiext.digi_flags & CTSPACE) - res |= ch->m_cts; - - if (ch->digiext.digi_flags & DSRPACE) - res |= ch->dsr; - - if (ch->digiext.digi_flags & DCDPACE) - res |= ch->dcd; - - if (res & (ch->m_rts)) - ch->digiext.digi_flags |= RTSPACE; - - if (res & (ch->m_cts)) - ch->digiext.digi_flags |= CTSPACE; - - return res; -} - -static unsigned termios2digi_i(struct channel *ch, unsigned iflag) -{ - unsigned res = iflag & (IGNBRK | BRKINT | IGNPAR | PARMRK | - INPCK | ISTRIP | IXON | IXANY | IXOFF); - if (ch->digiext.digi_flags & DIGI_AIXON) - res |= IAIXON; - return res; -} - -static unsigned termios2digi_c(struct channel *ch, unsigned cflag) -{ - unsigned res = 0; - if (cflag & CBAUDEX) { - ch->digiext.digi_flags |= DIGI_FAST; - /* - * HUPCL bit is used by FEP to indicate fast baud table is to - * be used. - */ - res |= FEP_HUPCL; - } else - ch->digiext.digi_flags &= ~DIGI_FAST; - /* - * CBAUD has bit position 0x1000 set these days to indicate Linux - * baud rate remap. Digi hardware can't handle the bit assignment. - * (We use a different bit assignment for high speed.). Clear this - * bit out. - */ - res |= cflag & ((CBAUD ^ CBAUDEX) | PARODD | PARENB | CSTOPB | CSIZE); - /* - * This gets a little confusing. The Digi cards have their own - * representation of c_cflags controlling baud rate. For the most part - * this is identical to the Linux implementation. However; Digi - * supports one rate (76800) that Linux doesn't. This means that the - * c_cflag entry that would normally mean 76800 for Digi actually means - * 115200 under Linux. Without the below mapping, a stty 115200 would - * only drive the board at 76800. Since the rate 230400 is also found - * after 76800, the same problem afflicts us when we choose a rate of - * 230400. Without the below modificiation stty 230400 would actually - * give us 115200. - * - * There are two additional differences. The Linux value for CLOCAL - * (0x800; 0004000) has no meaning to the Digi hardware. Also in later - * releases of Linux; the CBAUD define has CBAUDEX (0x1000; 0010000) - * ored into it (CBAUD = 0x100f as opposed to 0xf). CBAUDEX should be - * checked for a screened out prior to termios2digi_c returning. Since - * CLOCAL isn't used by the board this can be ignored as long as the - * returned value is used only by Digi hardware. - */ - if (cflag & CBAUDEX) { - /* - * The below code is trying to guarantee that only baud rates - * 115200 and 230400 are remapped. We use exclusive or because - * the various baud rates share common bit positions and - * therefore can't be tested for easily. - */ - if ((!((cflag & 0x7) ^ (B115200 & ~CBAUDEX))) || - (!((cflag & 0x7) ^ (B230400 & ~CBAUDEX)))) - res += 1; - } - return res; -} - -/* Caller must hold the locks */ -static void epcaparam(struct tty_struct *tty, struct channel *ch) -{ - unsigned int cmdHead; - struct ktermios *ts; - struct board_chan __iomem *bc; - unsigned mval, hflow, cflag, iflag; - - bc = ch->brdchan; - epcaassert(bc != NULL, "bc out of range"); - - assertgwinon(ch); - ts = tty->termios; - if ((ts->c_cflag & CBAUD) == 0) { /* Begin CBAUD detected */ - cmdHead = readw(&bc->rin); - writew(cmdHead, &bc->rout); - cmdHead = readw(&bc->tin); - /* Changing baud in mid-stream transmission can be wonderful */ - /* - * Flush current transmit buffer by setting cmdTail pointer - * (tout) to cmdHead pointer (tin). Hopefully the transmit - * buffer is empty. - */ - fepcmd(ch, STOUT, (unsigned) cmdHead, 0, 0, 0); - mval = 0; - } else { /* Begin CBAUD not detected */ - /* - * c_cflags have changed but that change had nothing to do with - * BAUD. Propagate the change to the card. - */ - cflag = termios2digi_c(ch, ts->c_cflag); - if (cflag != ch->fepcflag) { - ch->fepcflag = cflag; - /* Set baud rate, char size, stop bits, parity */ - fepcmd(ch, SETCTRLFLAGS, (unsigned) cflag, 0, 0, 0); - } - /* - * If the user has not forced CLOCAL and if the device is not a - * CALLOUT device (Which is always CLOCAL) we set flags such - * that the driver will wait on carrier detect. - */ - if (ts->c_cflag & CLOCAL) - clear_bit(ASYNCB_CHECK_CD, &ch->port.flags); - else - set_bit(ASYNCB_CHECK_CD, &ch->port.flags); - mval = ch->m_dtr | ch->m_rts; - } /* End CBAUD not detected */ - iflag = termios2digi_i(ch, ts->c_iflag); - /* Check input mode flags */ - if (iflag != ch->fepiflag) { - ch->fepiflag = iflag; - /* - * Command sets channels iflag structure on the board. Such - * things as input soft flow control, handling of parity - * errors, and break handling are all set here. - * - * break handling, parity handling, input stripping, - * flow control chars - */ - fepcmd(ch, SETIFLAGS, (unsigned int) ch->fepiflag, 0, 0, 0); - } - /* - * Set the board mint value for this channel. This will cause hardware - * events to be generated each time the DCD signal (Described in mint) - * changes. - */ - writeb(ch->dcd, &bc->mint); - if ((ts->c_cflag & CLOCAL) || (ch->digiext.digi_flags & DIGI_FORCEDCD)) - if (ch->digiext.digi_flags & DIGI_FORCEDCD) - writeb(0, &bc->mint); - ch->imodem = readb(&bc->mstat); - hflow = termios2digi_h(ch, ts->c_cflag); - if (hflow != ch->hflow) { - ch->hflow = hflow; - /* - * Hard flow control has been selected but the board is not - * using it. Activate hard flow control now. - */ - fepcmd(ch, SETHFLOW, hflow, 0xff, 0, 1); - } - mval ^= ch->modemfake & (mval ^ ch->modem); - - if (ch->omodem ^ mval) { - ch->omodem = mval; - /* - * The below command sets the DTR and RTS mstat structure. If - * hard flow control is NOT active these changes will drive the - * output of the actual DTR and RTS lines. If hard flow control - * is active, the changes will be saved in the mstat structure - * and only asserted when hard flow control is turned off. - */ - - /* First reset DTR & RTS; then set them */ - fepcmd(ch, SETMODEM, 0, ((ch->m_dtr)|(ch->m_rts)), 0, 1); - fepcmd(ch, SETMODEM, mval, 0, 0, 1); - } - if (ch->startc != ch->fepstartc || ch->stopc != ch->fepstopc) { - ch->fepstartc = ch->startc; - ch->fepstopc = ch->stopc; - /* - * The XON / XOFF characters have changed; propagate these - * changes to the card. - */ - fepcmd(ch, SONOFFC, ch->fepstartc, ch->fepstopc, 0, 1); - } - if (ch->startca != ch->fepstartca || ch->stopca != ch->fepstopca) { - ch->fepstartca = ch->startca; - ch->fepstopca = ch->stopca; - /* - * Similar to the above, this time the auxilarly XON / XOFF - * characters have changed; propagate these changes to the card. - */ - fepcmd(ch, SAUXONOFFC, ch->fepstartca, ch->fepstopca, 0, 1); - } -} - -/* Caller holds lock */ -static void receive_data(struct channel *ch, struct tty_struct *tty) -{ - unchar *rptr; - struct ktermios *ts = NULL; - struct board_chan __iomem *bc; - int dataToRead, wrapgap, bytesAvailable; - unsigned int tail, head; - unsigned int wrapmask; - - /* - * This routine is called by doint when a receive data event has taken - * place. - */ - globalwinon(ch); - if (ch->statusflags & RXSTOPPED) - return; - if (tty) - ts = tty->termios; - bc = ch->brdchan; - BUG_ON(!bc); - wrapmask = ch->rxbufsize - 1; - - /* - * Get the head and tail pointers to the receiver queue. Wrap the head - * pointer if it has reached the end of the buffer. - */ - head = readw(&bc->rin); - head &= wrapmask; - tail = readw(&bc->rout) & wrapmask; - - bytesAvailable = (head - tail) & wrapmask; - if (bytesAvailable == 0) - return; - - /* If CREAD bit is off or device not open, set TX tail to head */ - if (!tty || !ts || !(ts->c_cflag & CREAD)) { - writew(head, &bc->rout); - return; - } - - if (tty_buffer_request_room(tty, bytesAvailable + 1) == 0) - return; - - if (readb(&bc->orun)) { - writeb(0, &bc->orun); - printk(KERN_WARNING "epca; overrun! DigiBoard device %s\n", - tty->name); - tty_insert_flip_char(tty, 0, TTY_OVERRUN); - } - rxwinon(ch); - while (bytesAvailable > 0) { - /* Begin while there is data on the card */ - wrapgap = (head >= tail) ? head - tail : ch->rxbufsize - tail; - /* - * Even if head has wrapped around only report the amount of - * data to be equal to the size - tail. Remember memcpy can't - * automatically wrap around the receive buffer. - */ - dataToRead = (wrapgap < bytesAvailable) ? wrapgap - : bytesAvailable; - /* Make sure we don't overflow the buffer */ - dataToRead = tty_prepare_flip_string(tty, &rptr, dataToRead); - if (dataToRead == 0) - break; - /* - * Move data read from our card into the line disciplines - * buffer for translation if necessary. - */ - memcpy_fromio(rptr, ch->rxptr + tail, dataToRead); - tail = (tail + dataToRead) & wrapmask; - bytesAvailable -= dataToRead; - } /* End while there is data on the card */ - globalwinon(ch); - writew(tail, &bc->rout); - /* Must be called with global data */ - tty_schedule_flip(tty); -} - -static int info_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - switch (cmd) { - case DIGI_GETINFO: - { - struct digi_info di; - int brd; - - if (get_user(brd, (unsigned int __user *)arg)) - return -EFAULT; - if (brd < 0 || brd >= num_cards || num_cards == 0) - return -ENODEV; - - memset(&di, 0, sizeof(di)); - - di.board = brd; - di.status = boards[brd].status; - di.type = boards[brd].type ; - di.numports = boards[brd].numports ; - /* Legacy fixups - just move along nothing to see */ - di.port = (unsigned char *)boards[brd].port ; - di.membase = (unsigned char *)boards[brd].membase ; - - if (copy_to_user((void __user *)arg, &di, sizeof(di))) - return -EFAULT; - break; - - } - - case DIGI_POLLER: - { - int brd = arg & 0xff000000 >> 16; - unsigned char state = arg & 0xff; - - if (brd < 0 || brd >= num_cards) { - printk(KERN_ERR "epca: DIGI POLLER : brd not valid!\n"); - return -ENODEV; - } - digi_poller_inhibited = state; - break; - } - - case DIGI_INIT: - { - /* - * This call is made by the apps to complete the - * initialization of the board(s). This routine is - * responsible for setting the card to its initial - * state and setting the drivers control fields to the - * sutianle settings for the card in question. - */ - int crd; - for (crd = 0; crd < num_cards; crd++) - post_fep_init(crd); - break; - } - default: - return -ENOTTY; - } - return 0; -} - -static int pc_tiocmget(struct tty_struct *tty) -{ - struct channel *ch = tty->driver_data; - struct board_chan __iomem *bc; - unsigned int mstat, mflag = 0; - unsigned long flags; - - if (ch) - bc = ch->brdchan; - else - return -EINVAL; - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - mstat = readb(&bc->mstat); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - - if (mstat & ch->m_dtr) - mflag |= TIOCM_DTR; - if (mstat & ch->m_rts) - mflag |= TIOCM_RTS; - if (mstat & ch->m_cts) - mflag |= TIOCM_CTS; - if (mstat & ch->dsr) - mflag |= TIOCM_DSR; - if (mstat & ch->m_ri) - mflag |= TIOCM_RI; - if (mstat & ch->dcd) - mflag |= TIOCM_CD; - return mflag; -} - -static int pc_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct channel *ch = tty->driver_data; - unsigned long flags; - - if (!ch) - return -EINVAL; - - spin_lock_irqsave(&epca_lock, flags); - /* - * I think this modemfake stuff is broken. It doesn't correctly reflect - * the behaviour desired by the TIOCM* ioctls. Therefore this is - * probably broken. - */ - if (set & TIOCM_RTS) { - ch->modemfake |= ch->m_rts; - ch->modem |= ch->m_rts; - } - if (set & TIOCM_DTR) { - ch->modemfake |= ch->m_dtr; - ch->modem |= ch->m_dtr; - } - if (clear & TIOCM_RTS) { - ch->modemfake |= ch->m_rts; - ch->modem &= ~ch->m_rts; - } - if (clear & TIOCM_DTR) { - ch->modemfake |= ch->m_dtr; - ch->modem &= ~ch->m_dtr; - } - globalwinon(ch); - /* - * The below routine generally sets up parity, baud, flow control - * issues, etc.... It effect both control flags and input flags. - */ - epcaparam(tty, ch); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - return 0; -} - -static int pc_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - digiflow_t dflow; - unsigned long flags; - unsigned int mflag, mstat; - unsigned char startc, stopc; - struct board_chan __iomem *bc; - struct channel *ch = tty->driver_data; - void __user *argp = (void __user *)arg; - - if (ch) - bc = ch->brdchan; - else - return -EINVAL; - switch (cmd) { - case TIOCMODG: - mflag = pc_tiocmget(tty); - if (put_user(mflag, (unsigned long __user *)argp)) - return -EFAULT; - break; - case TIOCMODS: - if (get_user(mstat, (unsigned __user *)argp)) - return -EFAULT; - return pc_tiocmset(tty, mstat, ~mstat); - case TIOCSDTR: - spin_lock_irqsave(&epca_lock, flags); - ch->omodem |= ch->m_dtr; - globalwinon(ch); - fepcmd(ch, SETMODEM, ch->m_dtr, 0, 10, 1); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - break; - - case TIOCCDTR: - spin_lock_irqsave(&epca_lock, flags); - ch->omodem &= ~ch->m_dtr; - globalwinon(ch); - fepcmd(ch, SETMODEM, 0, ch->m_dtr, 10, 1); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - break; - case DIGI_GETA: - if (copy_to_user(argp, &ch->digiext, sizeof(digi_t))) - return -EFAULT; - break; - case DIGI_SETAW: - case DIGI_SETAF: - if (cmd == DIGI_SETAW) { - /* Setup an event to indicate when the transmit - buffer empties */ - spin_lock_irqsave(&epca_lock, flags); - setup_empty_event(tty, ch); - spin_unlock_irqrestore(&epca_lock, flags); - tty_wait_until_sent(tty, 0); - } else { - /* ldisc lock already held in ioctl */ - if (tty->ldisc->ops->flush_buffer) - tty->ldisc->ops->flush_buffer(tty); - } - /* Fall Thru */ - case DIGI_SETA: - if (copy_from_user(&ch->digiext, argp, sizeof(digi_t))) - return -EFAULT; - - if (ch->digiext.digi_flags & DIGI_ALTPIN) { - ch->dcd = ch->m_dsr; - ch->dsr = ch->m_dcd; - } else { - ch->dcd = ch->m_dcd; - ch->dsr = ch->m_dsr; - } - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - - /* - * The below routine generally sets up parity, baud, flow - * control issues, etc.... It effect both control flags and - * input flags. - */ - epcaparam(tty, ch); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - break; - - case DIGI_GETFLOW: - case DIGI_GETAFLOW: - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - if (cmd == DIGI_GETFLOW) { - dflow.startc = readb(&bc->startc); - dflow.stopc = readb(&bc->stopc); - } else { - dflow.startc = readb(&bc->startca); - dflow.stopc = readb(&bc->stopca); - } - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - - if (copy_to_user(argp, &dflow, sizeof(dflow))) - return -EFAULT; - break; - - case DIGI_SETAFLOW: - case DIGI_SETFLOW: - if (cmd == DIGI_SETFLOW) { - startc = ch->startc; - stopc = ch->stopc; - } else { - startc = ch->startca; - stopc = ch->stopca; - } - - if (copy_from_user(&dflow, argp, sizeof(dflow))) - return -EFAULT; - - if (dflow.startc != startc || dflow.stopc != stopc) { - /* Begin if setflow toggled */ - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - - if (cmd == DIGI_SETFLOW) { - ch->fepstartc = ch->startc = dflow.startc; - ch->fepstopc = ch->stopc = dflow.stopc; - fepcmd(ch, SONOFFC, ch->fepstartc, - ch->fepstopc, 0, 1); - } else { - ch->fepstartca = ch->startca = dflow.startc; - ch->fepstopca = ch->stopca = dflow.stopc; - fepcmd(ch, SAUXONOFFC, ch->fepstartca, - ch->fepstopca, 0, 1); - } - - if (ch->statusflags & TXSTOPPED) - pc_start(tty); - - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - } /* End if setflow toggled */ - break; - default: - return -ENOIOCTLCMD; - } - return 0; -} - -static void pc_set_termios(struct tty_struct *tty, struct ktermios *old_termios) -{ - struct channel *ch; - unsigned long flags; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - - if (ch != NULL) { /* Begin if channel valid */ - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - epcaparam(tty, ch); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - - if ((old_termios->c_cflag & CRTSCTS) && - ((tty->termios->c_cflag & CRTSCTS) == 0)) - tty->hw_stopped = 0; - - if (!(old_termios->c_cflag & CLOCAL) && - (tty->termios->c_cflag & CLOCAL)) - wake_up_interruptible(&ch->port.open_wait); - - } /* End if channel valid */ -} - -static void do_softint(struct work_struct *work) -{ - struct channel *ch = container_of(work, struct channel, tqueue); - /* Called in response to a modem change event */ - if (ch && ch->magic == EPCA_MAGIC) { - struct tty_struct *tty = tty_port_tty_get(&ch->port); - - if (tty && tty->driver_data) { - if (test_and_clear_bit(EPCA_EVENT_HANGUP, &ch->event)) { - tty_hangup(tty); - wake_up_interruptible(&ch->port.open_wait); - clear_bit(ASYNCB_NORMAL_ACTIVE, - &ch->port.flags); - } - } - tty_kref_put(tty); - } -} - -/* - * pc_stop and pc_start provide software flow control to the routine and the - * pc_ioctl routine. - */ -static void pc_stop(struct tty_struct *tty) -{ - struct channel *ch; - unsigned long flags; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - spin_lock_irqsave(&epca_lock, flags); - if ((ch->statusflags & TXSTOPPED) == 0) { - /* Begin if transmit stop requested */ - globalwinon(ch); - /* STOP transmitting now !! */ - fepcmd(ch, PAUSETX, 0, 0, 0, 0); - ch->statusflags |= TXSTOPPED; - memoff(ch); - } /* End if transmit stop requested */ - spin_unlock_irqrestore(&epca_lock, flags); - } -} - -static void pc_start(struct tty_struct *tty) -{ - struct channel *ch; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - unsigned long flags; - spin_lock_irqsave(&epca_lock, flags); - /* Just in case output was resumed because of a change - in Digi-flow */ - if (ch->statusflags & TXSTOPPED) { - /* Begin transmit resume requested */ - struct board_chan __iomem *bc; - globalwinon(ch); - bc = ch->brdchan; - if (ch->statusflags & LOWWAIT) - writeb(1, &bc->ilow); - /* Okay, you can start transmitting again... */ - fepcmd(ch, RESUMETX, 0, 0, 0, 0); - ch->statusflags &= ~TXSTOPPED; - memoff(ch); - } /* End transmit resume requested */ - spin_unlock_irqrestore(&epca_lock, flags); - } -} - -/* - * The below routines pc_throttle and pc_unthrottle are used to slow (And - * resume) the receipt of data into the kernels receive buffers. The exact - * occurrence of this depends on the size of the kernels receive buffer and - * what the 'watermarks' are set to for that buffer. See the n_ttys.c file for - * more details. - */ -static void pc_throttle(struct tty_struct *tty) -{ - struct channel *ch; - unsigned long flags; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - spin_lock_irqsave(&epca_lock, flags); - if ((ch->statusflags & RXSTOPPED) == 0) { - globalwinon(ch); - fepcmd(ch, PAUSERX, 0, 0, 0, 0); - ch->statusflags |= RXSTOPPED; - memoff(ch); - } - spin_unlock_irqrestore(&epca_lock, flags); - } -} - -static void pc_unthrottle(struct tty_struct *tty) -{ - struct channel *ch; - unsigned long flags; - /* - * verifyChannel returns the channel from the tty struct if it is - * valid. This serves as a sanity check. - */ - ch = verifyChannel(tty); - if (ch != NULL) { - /* Just in case output was resumed because of a change - in Digi-flow */ - spin_lock_irqsave(&epca_lock, flags); - if (ch->statusflags & RXSTOPPED) { - globalwinon(ch); - fepcmd(ch, RESUMERX, 0, 0, 0, 0); - ch->statusflags &= ~RXSTOPPED; - memoff(ch); - } - spin_unlock_irqrestore(&epca_lock, flags); - } -} - -static int pc_send_break(struct tty_struct *tty, int msec) -{ - struct channel *ch = tty->driver_data; - unsigned long flags; - - if (msec == -1) - msec = 0xFFFF; - else if (msec > 0xFFFE) - msec = 0xFFFE; - else if (msec < 1) - msec = 1; - - spin_lock_irqsave(&epca_lock, flags); - globalwinon(ch); - /* - * Maybe I should send an infinite break here, schedule() for msec - * amount of time, and then stop the break. This way, the user can't - * screw up the FEP by causing digi_send_break() to be called (i.e. via - * an ioctl()) more than once in msec amount of time. - * Try this for now... - */ - fepcmd(ch, SENDBREAK, msec, 0, 10, 0); - memoff(ch); - spin_unlock_irqrestore(&epca_lock, flags); - return 0; -} - -/* Caller MUST hold the lock */ -static void setup_empty_event(struct tty_struct *tty, struct channel *ch) -{ - struct board_chan __iomem *bc = ch->brdchan; - - globalwinon(ch); - ch->statusflags |= EMPTYWAIT; - /* - * When set the iempty flag request a event to be generated when the - * transmit buffer is empty (If there is no BREAK in progress). - */ - writeb(1, &bc->iempty); - memoff(ch); -} - -#ifndef MODULE -static void __init epca_setup(char *str, int *ints) -{ - struct board_info board; - int index, loop, last; - char *temp, *t2; - unsigned len; - - /* - * If this routine looks a little strange it is because it is only - * called if a LILO append command is given to boot the kernel with - * parameters. In this way, we can provide the user a method of - * changing his board configuration without rebuilding the kernel. - */ - if (!liloconfig) - liloconfig = 1; - - memset(&board, 0, sizeof(board)); - - /* Assume the data is int first, later we can change it */ - /* I think that array position 0 of ints holds the number of args */ - for (last = 0, index = 1; index <= ints[0]; index++) - switch (index) { /* Begin parse switch */ - case 1: - board.status = ints[index]; - /* - * We check for 2 (As opposed to 1; because 2 is a flag - * instructing the driver to ignore epcaconfig.) For - * this reason we check for 2. - */ - if (board.status == 2) { - /* Begin ignore epcaconfig as well as lilo cmd line */ - nbdevs = 0; - num_cards = 0; - return; - } /* End ignore epcaconfig as well as lilo cmd line */ - - if (board.status > 2) { - printk(KERN_ERR "epca_setup: Invalid board status 0x%x\n", - board.status); - invalid_lilo_config = 1; - setup_error_code |= INVALID_BOARD_STATUS; - return; - } - last = index; - break; - case 2: - board.type = ints[index]; - if (board.type >= PCIXEM) { - printk(KERN_ERR "epca_setup: Invalid board type 0x%x\n", board.type); - invalid_lilo_config = 1; - setup_error_code |= INVALID_BOARD_TYPE; - return; - } - last = index; - break; - case 3: - board.altpin = ints[index]; - if (board.altpin > 1) { - printk(KERN_ERR "epca_setup: Invalid board altpin 0x%x\n", board.altpin); - invalid_lilo_config = 1; - setup_error_code |= INVALID_ALTPIN; - return; - } - last = index; - break; - - case 4: - board.numports = ints[index]; - if (board.numports < 2 || board.numports > 256) { - printk(KERN_ERR "epca_setup: Invalid board numports 0x%x\n", board.numports); - invalid_lilo_config = 1; - setup_error_code |= INVALID_NUM_PORTS; - return; - } - nbdevs += board.numports; - last = index; - break; - - case 5: - board.port = ints[index]; - if (ints[index] <= 0) { - printk(KERN_ERR "epca_setup: Invalid io port 0x%x\n", (unsigned int)board.port); - invalid_lilo_config = 1; - setup_error_code |= INVALID_PORT_BASE; - return; - } - last = index; - break; - - case 6: - board.membase = ints[index]; - if (ints[index] <= 0) { - printk(KERN_ERR "epca_setup: Invalid memory base 0x%x\n", - (unsigned int)board.membase); - invalid_lilo_config = 1; - setup_error_code |= INVALID_MEM_BASE; - return; - } - last = index; - break; - - default: - printk(KERN_ERR " - epca_setup: Too many integer parms\n"); - return; - - } /* End parse switch */ - - while (str && *str) { /* Begin while there is a string arg */ - /* find the next comma or terminator */ - temp = str; - /* While string is not null, and a comma hasn't been found */ - while (*temp && (*temp != ',')) - temp++; - if (!*temp) - temp = NULL; - else - *temp++ = 0; - /* Set index to the number of args + 1 */ - index = last + 1; - - switch (index) { - case 1: - len = strlen(str); - if (strncmp("Disable", str, len) == 0) - board.status = 0; - else if (strncmp("Enable", str, len) == 0) - board.status = 1; - else { - printk(KERN_ERR "epca_setup: Invalid status %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_BOARD_STATUS; - return; - } - last = index; - break; - - case 2: - for (loop = 0; loop < EPCA_NUM_TYPES; loop++) - if (strcmp(board_desc[loop], str) == 0) - break; - /* - * If the index incremented above refers to a - * legitimate board type set it here. - */ - if (index < EPCA_NUM_TYPES) - board.type = loop; - else { - printk(KERN_ERR "epca_setup: Invalid board type: %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_BOARD_TYPE; - return; - } - last = index; - break; - - case 3: - len = strlen(str); - if (strncmp("Disable", str, len) == 0) - board.altpin = 0; - else if (strncmp("Enable", str, len) == 0) - board.altpin = 1; - else { - printk(KERN_ERR "epca_setup: Invalid altpin %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_ALTPIN; - return; - } - last = index; - break; - - case 4: - t2 = str; - while (isdigit(*t2)) - t2++; - - if (*t2) { - printk(KERN_ERR "epca_setup: Invalid port count %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_NUM_PORTS; - return; - } - - /* - * There is not a man page for simple_strtoul but the - * code can be found in vsprintf.c. The first argument - * is the string to translate (To an unsigned long - * obviously), the second argument can be the address - * of any character variable or a NULL. If a variable - * is given, the end pointer of the string will be - * stored in that variable; if a NULL is given the end - * pointer will not be returned. The last argument is - * the base to use. If a 0 is indicated, the routine - * will attempt to determine the proper base by looking - * at the values prefix (A '0' for octal, a 'x' for - * hex, etc ... If a value is given it will use that - * value as the base. - */ - board.numports = simple_strtoul(str, NULL, 0); - nbdevs += board.numports; - last = index; - break; - - case 5: - t2 = str; - while (isxdigit(*t2)) - t2++; - - if (*t2) { - printk(KERN_ERR "epca_setup: Invalid i/o address %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_PORT_BASE; - return; - } - - board.port = simple_strtoul(str, NULL, 16); - last = index; - break; - - case 6: - t2 = str; - while (isxdigit(*t2)) - t2++; - - if (*t2) { - printk(KERN_ERR "epca_setup: Invalid memory base %s\n", str); - invalid_lilo_config = 1; - setup_error_code |= INVALID_MEM_BASE; - return; - } - board.membase = simple_strtoul(str, NULL, 16); - last = index; - break; - default: - printk(KERN_ERR "epca: Too many string parms\n"); - return; - } - str = temp; - } /* End while there is a string arg */ - - if (last < 6) { - printk(KERN_ERR "epca: Insufficient parms specified\n"); - return; - } - - /* I should REALLY validate the stuff here */ - /* Copies our local copy of board into boards */ - memcpy((void *)&boards[num_cards], (void *)&board, sizeof(board)); - /* Does this get called once per lilo arg are what ? */ - printk(KERN_INFO "PC/Xx: Added board %i, %s %i ports at 0x%4.4X base 0x%6.6X\n", - num_cards, board_desc[board.type], - board.numports, (int)board.port, (unsigned int) board.membase); - num_cards++; -} - -static int __init epca_real_setup(char *str) -{ - int ints[11]; - - epca_setup(get_options(str, 11, ints), ints); - return 1; -} - -__setup("digiepca", epca_real_setup); -#endif - -enum epic_board_types { - brd_xr = 0, - brd_xem, - brd_cx, - brd_xrj, -}; - -/* indexed directly by epic_board_types enum */ -static struct { - unsigned char board_type; - unsigned bar_idx; /* PCI base address region */ -} epca_info_tbl[] = { - { PCIXR, 0, }, - { PCIXEM, 0, }, - { PCICX, 0, }, - { PCIXRJ, 2, }, -}; - -static int __devinit epca_init_one(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - static int board_num = -1; - int board_idx, info_idx = ent->driver_data; - unsigned long addr; - - if (pci_enable_device(pdev)) - return -EIO; - - board_num++; - board_idx = board_num + num_cards; - if (board_idx >= MAXBOARDS) - goto err_out; - - addr = pci_resource_start(pdev, epca_info_tbl[info_idx].bar_idx); - if (!addr) { - printk(KERN_ERR PFX "PCI region #%d not available (size 0)\n", - epca_info_tbl[info_idx].bar_idx); - goto err_out; - } - - boards[board_idx].status = ENABLED; - boards[board_idx].type = epca_info_tbl[info_idx].board_type; - boards[board_idx].numports = 0x0; - boards[board_idx].port = addr + PCI_IO_OFFSET; - boards[board_idx].membase = addr; - - if (!request_mem_region(addr + PCI_IO_OFFSET, 0x200000, "epca")) { - printk(KERN_ERR PFX "resource 0x%x @ 0x%lx unavailable\n", - 0x200000, addr + PCI_IO_OFFSET); - goto err_out; - } - - boards[board_idx].re_map_port = ioremap_nocache(addr + PCI_IO_OFFSET, - 0x200000); - if (!boards[board_idx].re_map_port) { - printk(KERN_ERR PFX "cannot map 0x%x @ 0x%lx\n", - 0x200000, addr + PCI_IO_OFFSET); - goto err_out_free_pciio; - } - - if (!request_mem_region(addr, 0x200000, "epca")) { - printk(KERN_ERR PFX "resource 0x%x @ 0x%lx unavailable\n", - 0x200000, addr); - goto err_out_free_iounmap; - } - - boards[board_idx].re_map_membase = ioremap_nocache(addr, 0x200000); - if (!boards[board_idx].re_map_membase) { - printk(KERN_ERR PFX "cannot map 0x%x @ 0x%lx\n", - 0x200000, addr + PCI_IO_OFFSET); - goto err_out_free_memregion; - } - - /* - * I don't know what the below does, but the hardware guys say its - * required on everything except PLX (In this case XRJ). - */ - if (info_idx != brd_xrj) { - pci_write_config_byte(pdev, 0x40, 0); - pci_write_config_byte(pdev, 0x46, 0); - } - - return 0; - -err_out_free_memregion: - release_mem_region(addr, 0x200000); -err_out_free_iounmap: - iounmap(boards[board_idx].re_map_port); -err_out_free_pciio: - release_mem_region(addr + PCI_IO_OFFSET, 0x200000); -err_out: - return -ENODEV; -} - - -static struct pci_device_id epca_pci_tbl[] = { - { PCI_VENDOR_DIGI, PCI_DEVICE_XR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_xr }, - { PCI_VENDOR_DIGI, PCI_DEVICE_XEM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_xem }, - { PCI_VENDOR_DIGI, PCI_DEVICE_CX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_cx }, - { PCI_VENDOR_DIGI, PCI_DEVICE_XRJ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, brd_xrj }, - { 0, } -}; - -MODULE_DEVICE_TABLE(pci, epca_pci_tbl); - -static int __init init_PCI(void) -{ - memset(&epca_driver, 0, sizeof(epca_driver)); - epca_driver.name = "epca"; - epca_driver.id_table = epca_pci_tbl; - epca_driver.probe = epca_init_one; - - return pci_register_driver(&epca_driver); -} - -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/tty/epca.h b/drivers/staging/tty/epca.h deleted file mode 100644 index d414bf2..0000000 --- a/drivers/staging/tty/epca.h +++ /dev/null @@ -1,158 +0,0 @@ -#define XEMPORTS 0xC02 -#define XEPORTS 0xC22 - -#define MAX_ALLOC 0x100 - -#define MAXBOARDS 12 -#define FEPCODESEG 0x0200L -#define FEPCODE 0x2000L -#define BIOSCODE 0xf800L - -#define MISCGLOBAL 0x0C00L -#define NPORT 0x0C22L -#define MBOX 0x0C40L -#define PORTBASE 0x0C90L - -/* Begin code defines used for epca_setup */ - -#define INVALID_BOARD_TYPE 0x1 -#define INVALID_NUM_PORTS 0x2 -#define INVALID_MEM_BASE 0x4 -#define INVALID_PORT_BASE 0x8 -#define INVALID_BOARD_STATUS 0x10 -#define INVALID_ALTPIN 0x20 - -/* End code defines used for epca_setup */ - - -#define FEPCLR 0x00 -#define FEPMEM 0x02 -#define FEPRST 0x04 -#define FEPINT 0x08 -#define FEPMASK 0x0e -#define FEPWIN 0x80 - -#define PCXE 0 -#define PCXEVE 1 -#define PCXEM 2 -#define EISAXEM 3 -#define PC64XE 4 -#define PCXI 5 -#define PCIXEM 7 -#define PCICX 8 -#define PCIXR 9 -#define PCIXRJ 10 -#define EPCA_NUM_TYPES 6 - - -static char *board_desc[] = -{ - "PC/Xe", - "PC/Xeve", - "PC/Xem", - "EISA/Xem", - "PC/64Xe", - "PC/Xi", - "unknown", - "PCI/Xem", - "PCI/CX", - "PCI/Xr", - "PCI/Xrj", -}; - -#define STARTC 021 -#define STOPC 023 -#define IAIXON 0x2000 - - -#define TXSTOPPED 0x1 -#define LOWWAIT 0x2 -#define EMPTYWAIT 0x4 -#define RXSTOPPED 0x8 -#define TXBUSY 0x10 - -#define DISABLED 0 -#define ENABLED 1 -#define OFF 0 -#define ON 1 - -#define FEPTIMEOUT 200000 -#define SERIAL_TYPE_INFO 3 -#define EPCA_EVENT_HANGUP 1 -#define EPCA_MAGIC 0x5c6df104L - -struct channel -{ - long magic; - struct tty_port port; - unsigned char boardnum; - unsigned char channelnum; - unsigned char omodem; /* FEP output modem status */ - unsigned char imodem; /* FEP input modem status */ - unsigned char modemfake; /* Modem values to be forced */ - unsigned char modem; /* Force values */ - unsigned char hflow; - unsigned char dsr; - unsigned char dcd; - unsigned char m_rts ; /* The bits used in whatever FEP */ - unsigned char m_dcd ; /* is indiginous to this board to */ - unsigned char m_dsr ; /* represent each of the physical */ - unsigned char m_cts ; /* handshake lines */ - unsigned char m_ri ; - unsigned char m_dtr ; - unsigned char stopc; - unsigned char startc; - unsigned char stopca; - unsigned char startca; - unsigned char fepstopc; - unsigned char fepstartc; - unsigned char fepstopca; - unsigned char fepstartca; - unsigned char txwin; - unsigned char rxwin; - unsigned short fepiflag; - unsigned short fepcflag; - unsigned short fepoflag; - unsigned short txbufhead; - unsigned short txbufsize; - unsigned short rxbufhead; - unsigned short rxbufsize; - int close_delay; - unsigned long event; - uint dev; - unsigned long statusflags; - unsigned long c_iflag; - unsigned long c_cflag; - unsigned long c_lflag; - unsigned long c_oflag; - unsigned char __iomem *txptr; - unsigned char __iomem *rxptr; - struct board_info *board; - struct board_chan __iomem *brdchan; - struct digi_struct digiext; - struct work_struct tqueue; - struct global_data __iomem *mailbox; -}; - -struct board_info -{ - unsigned char status; - unsigned char type; - unsigned char altpin; - unsigned short numports; - unsigned long port; - unsigned long membase; - void __iomem *re_map_port; - void __iomem *re_map_membase; - unsigned long memory_seg; - void ( * memwinon ) (struct board_info *, unsigned int) ; - void ( * memwinoff ) (struct board_info *, unsigned int) ; - void ( * globalwinon ) (struct channel *) ; - void ( * txwinon ) (struct channel *) ; - void ( * rxwinon ) (struct channel *) ; - void ( * memoff ) (struct channel *) ; - void ( * assertgwinon ) (struct channel *) ; - void ( * assertmemoff ) (struct channel *) ; - unsigned char poller_inhibited ; -}; - diff --git a/drivers/staging/tty/epcaconfig.h b/drivers/staging/tty/epcaconfig.h deleted file mode 100644 index 55dec06..0000000 --- a/drivers/staging/tty/epcaconfig.h +++ /dev/null @@ -1,7 +0,0 @@ -#define NUMCARDS 0 -#define NBDEVS 0 - -struct board_info static_boards[NUMCARDS]={ -}; - -/* DO NOT HAND EDIT THIS FILE! */ diff --git a/drivers/staging/tty/ip2/Makefile b/drivers/staging/tty/ip2/Makefile deleted file mode 100644 index 7b78e0d..0000000 --- a/drivers/staging/tty/ip2/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# Makefile for the Computone IntelliPort Plus Driver -# - -obj-$(CONFIG_COMPUTONE) += ip2.o - -ip2-y := ip2main.o - diff --git a/drivers/staging/tty/ip2/i2cmd.c b/drivers/staging/tty/ip2/i2cmd.c deleted file mode 100644 index e7af647..0000000 --- a/drivers/staging/tty/ip2/i2cmd.c +++ /dev/null @@ -1,210 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Definition table for In-line and Bypass commands. Applicable -* only when the standard loadware is active. (This is included -* source code, not a separate compilation module.) -* -*******************************************************************************/ - -//------------------------------------------------------------------------------ -// -// Revision History: -// -// 10 October 1991 MAG First Draft -// 7 November 1991 MAG Reflects additional commands. -// 24 February 1992 MAG Additional commands for 1.4.x loadware -// 11 March 1992 MAG Additional commands -// 30 March 1992 MAG Additional command: CMD_DSS_NOW -// 18 May 1992 MAG Discovered commands 39 & 40 must be at the end of a -// packet: affects implementation. -//------------------------------------------------------------------------------ - -//************ -//* Includes * -//************ - -#include "i2cmd.h" /* To get some bit-defines */ - -//------------------------------------------------------------------------------ -// Here is the table of global arrays which represent each type of command -// supported in the IntelliPort standard loadware. See also i2cmd.h -// for a more complete explanation of what is going on. -//------------------------------------------------------------------------------ - -// Here are the various globals: note that the names are not used except through -// the macros defined in i2cmd.h. Also note that although they are character -// arrays here (for extendability) they are cast to structure pointers in the -// i2cmd.h macros. See i2cmd.h for flags definitions. - -// Length Flags Command -static UCHAR ct02[] = { 1, BTH, 0x02 }; // DTR UP -static UCHAR ct03[] = { 1, BTH, 0x03 }; // DTR DN -static UCHAR ct04[] = { 1, BTH, 0x04 }; // RTS UP -static UCHAR ct05[] = { 1, BTH, 0x05 }; // RTS DN -static UCHAR ct06[] = { 1, BYP, 0x06 }; // START FL -static UCHAR ct07[] = { 2, BTH, 0x07,0 }; // BAUD -static UCHAR ct08[] = { 2, BTH, 0x08,0 }; // BITS -static UCHAR ct09[] = { 2, BTH, 0x09,0 }; // STOP -static UCHAR ct10[] = { 2, BTH, 0x0A,0 }; // PARITY -static UCHAR ct11[] = { 2, BTH, 0x0B,0 }; // XON -static UCHAR ct12[] = { 2, BTH, 0x0C,0 }; // XOFF -static UCHAR ct13[] = { 1, BTH, 0x0D }; // STOP FL -static UCHAR ct14[] = { 1, BYP|VIP, 0x0E }; // ACK HOTK -//static UCHAR ct15[]={ 2, BTH|VIP, 0x0F,0 }; // IRQ SET -static UCHAR ct16[] = { 2, INL, 0x10,0 }; // IXONOPTS -static UCHAR ct17[] = { 2, INL, 0x11,0 }; // OXONOPTS -static UCHAR ct18[] = { 1, INL, 0x12 }; // CTSENAB -static UCHAR ct19[] = { 1, BTH, 0x13 }; // CTSDSAB -static UCHAR ct20[] = { 1, INL, 0x14 }; // DCDENAB -static UCHAR ct21[] = { 1, BTH, 0x15 }; // DCDDSAB -static UCHAR ct22[] = { 1, BTH, 0x16 }; // DSRENAB -static UCHAR ct23[] = { 1, BTH, 0x17 }; // DSRDSAB -static UCHAR ct24[] = { 1, BTH, 0x18 }; // RIENAB -static UCHAR ct25[] = { 1, BTH, 0x19 }; // RIDSAB -static UCHAR ct26[] = { 2, BTH, 0x1A,0 }; // BRKENAB -static UCHAR ct27[] = { 1, BTH, 0x1B }; // BRKDSAB -//static UCHAR ct28[]={ 2, BTH, 0x1C,0 }; // MAXBLOKSIZE -//static UCHAR ct29[]={ 2, 0, 0x1D,0 }; // reserved -static UCHAR ct30[] = { 1, INL, 0x1E }; // CTSFLOWENAB -static UCHAR ct31[] = { 1, INL, 0x1F }; // CTSFLOWDSAB -static UCHAR ct32[] = { 1, INL, 0x20 }; // RTSFLOWENAB -static UCHAR ct33[] = { 1, INL, 0x21 }; // RTSFLOWDSAB -static UCHAR ct34[] = { 2, BTH, 0x22,0 }; // ISTRIPMODE -static UCHAR ct35[] = { 2, BTH|END, 0x23,0 }; // SENDBREAK -static UCHAR ct36[] = { 2, BTH, 0x24,0 }; // SETERRMODE -//static UCHAR ct36a[]={ 3, INL, 0x24,0,0 }; // SET_REPLACE - -// The following is listed for completeness, but should never be sent directly -// by user-level code. It is sent only by library routines in response to data -// movement. -//static UCHAR ct37[]={ 5, BYP|VIP, 0x25,0,0,0,0 }; // FLOW PACKET - -// Back to normal -//static UCHAR ct38[] = {11, BTH|VAR, 0x26,0,0,0,0,0,0,0,0,0,0 }; // DEF KEY SEQ -//static UCHAR ct39[]={ 3, BTH|END, 0x27,0,0 }; // OPOSTON -//static UCHAR ct40[]={ 1, BTH|END, 0x28 }; // OPOSTOFF -static UCHAR ct41[] = { 1, BYP, 0x29 }; // RESUME -//static UCHAR ct42[]={ 2, BTH, 0x2A,0 }; // TXBAUD -//static UCHAR ct43[]={ 2, BTH, 0x2B,0 }; // RXBAUD -//static UCHAR ct44[]={ 2, BTH, 0x2C,0 }; // MS PING -//static UCHAR ct45[]={ 1, BTH, 0x2D }; // HOTENAB -//static UCHAR ct46[]={ 1, BTH, 0x2E }; // HOTDSAB -//static UCHAR ct47[]={ 7, BTH, 0x2F,0,0,0,0,0,0 }; // UNIX FLAGS -//static UCHAR ct48[]={ 1, BTH, 0x30 }; // DSRFLOWENAB -//static UCHAR ct49[]={ 1, BTH, 0x31 }; // DSRFLOWDSAB -//static UCHAR ct50[]={ 1, BTH, 0x32 }; // DTRFLOWENAB -//static UCHAR ct51[]={ 1, BTH, 0x33 }; // DTRFLOWDSAB -//static UCHAR ct52[]={ 1, BTH, 0x34 }; // BAUDTABRESET -//static UCHAR ct53[] = { 3, BTH, 0x35,0,0 }; // BAUDREMAP -static UCHAR ct54[] = { 3, BTH, 0x36,0,0 }; // CUSTOMBAUD1 -static UCHAR ct55[] = { 3, BTH, 0x37,0,0 }; // CUSTOMBAUD2 -static UCHAR ct56[] = { 2, BTH|END, 0x38,0 }; // PAUSE -static UCHAR ct57[] = { 1, BYP, 0x39 }; // SUSPEND -static UCHAR ct58[] = { 1, BYP, 0x3A }; // UNSUSPEND -static UCHAR ct59[] = { 2, BTH, 0x3B,0 }; // PARITYCHK -static UCHAR ct60[] = { 1, INL|VIP, 0x3C }; // BOOKMARKREQ -//static UCHAR ct61[]={ 2, BTH, 0x3D,0 }; // INTERNALLOOP -//static UCHAR ct62[]={ 2, BTH, 0x3E,0 }; // HOTKTIMEOUT -static UCHAR ct63[] = { 2, INL, 0x3F,0 }; // SETTXON -static UCHAR ct64[] = { 2, INL, 0x40,0 }; // SETTXOFF -//static UCHAR ct65[]={ 2, BTH, 0x41,0 }; // SETAUTORTS -//static UCHAR ct66[]={ 2, BTH, 0x42,0 }; // SETHIGHWAT -//static UCHAR ct67[]={ 2, BYP, 0x43,0 }; // STARTSELFL -//static UCHAR ct68[]={ 2, INL, 0x44,0 }; // ENDSELFL -//static UCHAR ct69[]={ 1, BYP, 0x45 }; // HWFLOW_OFF -//static UCHAR ct70[]={ 1, BTH, 0x46 }; // ODSRFL_ENAB -//static UCHAR ct71[]={ 1, BTH, 0x47 }; // ODSRFL_DSAB -//static UCHAR ct72[]={ 1, BTH, 0x48 }; // ODCDFL_ENAB -//static UCHAR ct73[]={ 1, BTH, 0x49 }; // ODCDFL_DSAB -//static UCHAR ct74[]={ 2, BTH, 0x4A,0 }; // LOADLEVEL -//static UCHAR ct75[]={ 2, BTH, 0x4B,0 }; // STATDATA -//static UCHAR ct76[]={ 1, BYP, 0x4C }; // BREAK_ON -//static UCHAR ct77[]={ 1, BYP, 0x4D }; // BREAK_OFF -//static UCHAR ct78[]={ 1, BYP, 0x4E }; // GETFC -static UCHAR ct79[] = { 2, BYP, 0x4F,0 }; // XMIT_NOW -//static UCHAR ct80[]={ 4, BTH, 0x50,0,0,0 }; // DIVISOR_LATCH -//static UCHAR ct81[]={ 1, BYP, 0x51 }; // GET_STATUS -//static UCHAR ct82[]={ 1, BYP, 0x52 }; // GET_TXCNT -//static UCHAR ct83[]={ 1, BYP, 0x53 }; // GET_RXCNT -//static UCHAR ct84[]={ 1, BYP, 0x54 }; // GET_BOXIDS -//static UCHAR ct85[]={10, BYP, 0x55,0,0,0,0,0,0,0,0,0 }; // ENAB_MULT -//static UCHAR ct86[]={ 2, BTH, 0x56,0 }; // RCV_ENABLE -static UCHAR ct87[] = { 1, BYP, 0x57 }; // HW_TEST -//static UCHAR ct88[]={ 3, BTH, 0x58,0,0 }; // RCV_THRESHOLD -//static UCHAR ct90[]={ 3, BYP, 0x5A,0,0 }; // Set SILO -//static UCHAR ct91[]={ 2, BYP, 0x5B,0 }; // timed break - -// Some composite commands as well -//static UCHAR cc01[]={ 2, BTH, 0x02,0x04 }; // DTR & RTS UP -//static UCHAR cc02[]={ 2, BTH, 0x03,0x05 }; // DTR & RTS DN - -//******** -//* Code * -//******** - -//****************************************************************************** -// Function: i2cmdUnixFlags(iflag, cflag, lflag) -// Parameters: Unix tty flags -// -// Returns: Pointer to command structure -// -// Description: -// -// This routine sets the parameters of command 47 and returns a pointer to the -// appropriate structure. -//****************************************************************************** -#if 0 -cmdSyntaxPtr -i2cmdUnixFlags(unsigned short iflag,unsigned short cflag,unsigned short lflag) -{ - cmdSyntaxPtr pCM = (cmdSyntaxPtr) ct47; - - pCM->cmd[1] = (unsigned char) iflag; - pCM->cmd[2] = (unsigned char) (iflag >> 8); - pCM->cmd[3] = (unsigned char) cflag; - pCM->cmd[4] = (unsigned char) (cflag >> 8); - pCM->cmd[5] = (unsigned char) lflag; - pCM->cmd[6] = (unsigned char) (lflag >> 8); - return pCM; -} -#endif /* 0 */ - -//****************************************************************************** -// Function: i2cmdBaudDef(which, rate) -// Parameters: ? -// -// Returns: Pointer to command structure -// -// Description: -// -// This routine sets the parameters of commands 54 or 55 (according to the -// argument which), and returns a pointer to the appropriate structure. -//****************************************************************************** -static cmdSyntaxPtr -i2cmdBaudDef(int which, unsigned short rate) -{ - cmdSyntaxPtr pCM; - - switch(which) - { - case 1: - pCM = (cmdSyntaxPtr) ct54; - break; - default: - case 2: - pCM = (cmdSyntaxPtr) ct55; - break; - } - pCM->cmd[1] = (unsigned char) rate; - pCM->cmd[2] = (unsigned char) (rate >> 8); - return pCM; -} - diff --git a/drivers/staging/tty/ip2/i2cmd.h b/drivers/staging/tty/ip2/i2cmd.h deleted file mode 100644 index 29277ec..0000000 --- a/drivers/staging/tty/ip2/i2cmd.h +++ /dev/null @@ -1,630 +0,0 @@ -/******************************************************************************* -* -* (c) 1999 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Definitions and support for In-line and Bypass commands. -* Applicable only when the standard loadware is active. -* -*******************************************************************************/ -//------------------------------------------------------------------------------ -// Revision History: -// -// 10 October 1991 MAG First Draft -// 7 November 1991 MAG Reflects some new commands -// 20 February 1992 MAG CMD_HOTACK corrected: no argument. -// 24 February 1992 MAG Support added for new commands for 1.4.x loadware. -// 11 March 1992 MAG Additional commands. -// 16 March 1992 MAG Additional commands. -// 30 March 1992 MAG Additional command: CMD_DSS_NOW -// 18 May 1992 MAG Changed CMD_OPOST -// -//------------------------------------------------------------------------------ -#ifndef I2CMD_H // To prevent multiple includes -#define I2CMD_H 1 - -#include "ip2types.h" - -// This module is designed to provide a uniform method of sending commands to -// the board through command packets. The difficulty is, some commands take -// parameters, others do not. Furthermore, it is often useful to send several -// commands to the same channel as part of the same packet. (See also i2pack.h.) -// -// This module is designed so that the caller should not be responsible for -// remembering the exact syntax of each command, or at least so that the -// compiler could check things somewhat. I'll explain as we go... -// -// First, a structure which can embody the syntax of each type of command. -// -typedef struct _cmdSyntax -{ - UCHAR length; // Number of bytes in the command - UCHAR flags; // Information about the command (see below) - - // The command and its parameters, which may be of arbitrary length. Don't - // worry yet how the parameters will be initialized; macros later take care - // of it. Also, don't worry about the arbitrary length issue; this structure - // is never used to allocate space (see i2cmd.c). - UCHAR cmd[2]; -} cmdSyntax, *cmdSyntaxPtr; - -// Bit assignments for flags - -#define INL 1 // Set if suitable for inline commands -#define BYP 2 // Set if suitable for bypass commands -#define BTH (INL|BYP) // suitable for either! -#define END 4 // Set if this must be the last command in a block -#define VIP 8 // Set if this command is special in some way and really - // should only be sent from the library-level and not - // directly from user-level -#define VAR 0x10 // This command is of variable length! - -// Declarations for the global arrays used to bear the commands and their -// arguments. -// -// Note: Since these are globals and the arguments might change, it is important -// that the library routine COPY these into buffers from whence they would be -// sent, rather than merely storing the pointers. In multi-threaded -// environments, important that the copy should obtain before any context switch -// is allowed. Also, for parameterized commands, DO NOT ISSUE THE SAME COMMAND -// MORE THAN ONCE WITH THE SAME PARAMETERS in the same call. -// -static UCHAR ct02[]; -static UCHAR ct03[]; -static UCHAR ct04[]; -static UCHAR ct05[]; -static UCHAR ct06[]; -static UCHAR ct07[]; -static UCHAR ct08[]; -static UCHAR ct09[]; -static UCHAR ct10[]; -static UCHAR ct11[]; -static UCHAR ct12[]; -static UCHAR ct13[]; -static UCHAR ct14[]; -static UCHAR ct15[]; -static UCHAR ct16[]; -static UCHAR ct17[]; -static UCHAR ct18[]; -static UCHAR ct19[]; -static UCHAR ct20[]; -static UCHAR ct21[]; -static UCHAR ct22[]; -static UCHAR ct23[]; -static UCHAR ct24[]; -static UCHAR ct25[]; -static UCHAR ct26[]; -static UCHAR ct27[]; -static UCHAR ct28[]; -static UCHAR ct29[]; -static UCHAR ct30[]; -static UCHAR ct31[]; -static UCHAR ct32[]; -static UCHAR ct33[]; -static UCHAR ct34[]; -static UCHAR ct35[]; -static UCHAR ct36[]; -static UCHAR ct36a[]; -static UCHAR ct41[]; -static UCHAR ct42[]; -static UCHAR ct43[]; -static UCHAR ct44[]; -static UCHAR ct45[]; -static UCHAR ct46[]; -static UCHAR ct48[]; -static UCHAR ct49[]; -static UCHAR ct50[]; -static UCHAR ct51[]; -static UCHAR ct52[]; -static UCHAR ct56[]; -static UCHAR ct57[]; -static UCHAR ct58[]; -static UCHAR ct59[]; -static UCHAR ct60[]; -static UCHAR ct61[]; -static UCHAR ct62[]; -static UCHAR ct63[]; -static UCHAR ct64[]; -static UCHAR ct65[]; -static UCHAR ct66[]; -static UCHAR ct67[]; -static UCHAR ct68[]; -static UCHAR ct69[]; -static UCHAR ct70[]; -static UCHAR ct71[]; -static UCHAR ct72[]; -static UCHAR ct73[]; -static UCHAR ct74[]; -static UCHAR ct75[]; -static UCHAR ct76[]; -static UCHAR ct77[]; -static UCHAR ct78[]; -static UCHAR ct79[]; -static UCHAR ct80[]; -static UCHAR ct81[]; -static UCHAR ct82[]; -static UCHAR ct83[]; -static UCHAR ct84[]; -static UCHAR ct85[]; -static UCHAR ct86[]; -static UCHAR ct87[]; -static UCHAR ct88[]; -static UCHAR ct89[]; -static UCHAR ct90[]; -static UCHAR ct91[]; -static UCHAR cc01[]; -static UCHAR cc02[]; - -// Now, refer to i2cmd.c, and see the character arrays defined there. They are -// cast here to cmdSyntaxPtr. -// -// There are library functions for issuing bypass or inline commands. These -// functions take one or more arguments of the type cmdSyntaxPtr. The routine -// then can figure out how long each command is supposed to be and easily add it -// to the list. -// -// For ease of use, we define manifests which return pointers to appropriate -// cmdSyntaxPtr things. But some commands also take arguments. If a single -// argument is used, we define a macro which performs the single assignment and -// (through the expedient of a comma expression) references the appropriate -// pointer. For commands requiring several arguments, we actually define a -// function to perform the assignments. - -#define CMD_DTRUP (cmdSyntaxPtr)(ct02) // Raise DTR -#define CMD_DTRDN (cmdSyntaxPtr)(ct03) // Lower DTR -#define CMD_RTSUP (cmdSyntaxPtr)(ct04) // Raise RTS -#define CMD_RTSDN (cmdSyntaxPtr)(ct05) // Lower RTS -#define CMD_STARTFL (cmdSyntaxPtr)(ct06) // Start Flushing Data - -#define CMD_DTRRTS_UP (cmdSyntaxPtr)(cc01) // Raise DTR and RTS -#define CMD_DTRRTS_DN (cmdSyntaxPtr)(cc02) // Lower DTR and RTS - -// Set Baud Rate for transmit and receive -#define CMD_SETBAUD(arg) \ - (((cmdSyntaxPtr)(ct07))->cmd[1] = (arg),(cmdSyntaxPtr)(ct07)) - -#define CBR_50 1 -#define CBR_75 2 -#define CBR_110 3 -#define CBR_134 4 -#define CBR_150 5 -#define CBR_200 6 -#define CBR_300 7 -#define CBR_600 8 -#define CBR_1200 9 -#define CBR_1800 10 -#define CBR_2400 11 -#define CBR_4800 12 -#define CBR_9600 13 -#define CBR_19200 14 -#define CBR_38400 15 -#define CBR_2000 16 -#define CBR_3600 17 -#define CBR_7200 18 -#define CBR_56000 19 -#define CBR_57600 20 -#define CBR_64000 21 -#define CBR_76800 22 -#define CBR_115200 23 -#define CBR_C1 24 // Custom baud rate 1 -#define CBR_C2 25 // Custom baud rate 2 -#define CBR_153600 26 -#define CBR_230400 27 -#define CBR_307200 28 -#define CBR_460800 29 -#define CBR_921600 30 - -// Set Character size -// -#define CMD_SETBITS(arg) \ - (((cmdSyntaxPtr)(ct08))->cmd[1] = (arg),(cmdSyntaxPtr)(ct08)) - -#define CSZ_5 0 -#define CSZ_6 1 -#define CSZ_7 2 -#define CSZ_8 3 - -// Set number of stop bits -// -#define CMD_SETSTOP(arg) \ - (((cmdSyntaxPtr)(ct09))->cmd[1] = (arg),(cmdSyntaxPtr)(ct09)) - -#define CST_1 0 -#define CST_15 1 // 1.5 stop bits -#define CST_2 2 - -// Set parity option -// -#define CMD_SETPAR(arg) \ - (((cmdSyntaxPtr)(ct10))->cmd[1] = (arg),(cmdSyntaxPtr)(ct10)) - -#define CSP_NP 0 // no parity -#define CSP_OD 1 // odd parity -#define CSP_EV 2 // Even parity -#define CSP_SP 3 // Space parity -#define CSP_MK 4 // Mark parity - -// Define xon char for transmitter flow control -// -#define CMD_DEF_IXON(arg) \ - (((cmdSyntaxPtr)(ct11))->cmd[1] = (arg),(cmdSyntaxPtr)(ct11)) - -// Define xoff char for transmitter flow control -// -#define CMD_DEF_IXOFF(arg) \ - (((cmdSyntaxPtr)(ct12))->cmd[1] = (arg),(cmdSyntaxPtr)(ct12)) - -#define CMD_STOPFL (cmdSyntaxPtr)(ct13) // Stop Flushing data - -// Acknowledge receipt of hotkey signal -// -#define CMD_HOTACK (cmdSyntaxPtr)(ct14) - -// Define irq level to use. Should actually be sent by library-level code, not -// directly from user... -// -#define CMDVALUE_IRQ 15 // For library use at initialization. Until this command - // is sent, board processing doesn't really start. -#define CMD_SET_IRQ(arg) \ - (((cmdSyntaxPtr)(ct15))->cmd[1] = (arg),(cmdSyntaxPtr)(ct15)) - -#define CIR_POLL 0 // No IRQ - Poll -#define CIR_3 3 // IRQ 3 -#define CIR_4 4 // IRQ 4 -#define CIR_5 5 // IRQ 5 -#define CIR_7 7 // IRQ 7 -#define CIR_10 10 // IRQ 10 -#define CIR_11 11 // IRQ 11 -#define CIR_12 12 // IRQ 12 -#define CIR_15 15 // IRQ 15 - -// Select transmit flow xon/xoff options -// -#define CMD_IXON_OPT(arg) \ - (((cmdSyntaxPtr)(ct16))->cmd[1] = (arg),(cmdSyntaxPtr)(ct16)) - -#define CIX_NONE 0 // Incoming Xon/Xoff characters not special -#define CIX_XON 1 // Xoff disable, Xon enable -#define CIX_XANY 2 // Xoff disable, any key enable - -// Select receive flow xon/xoff options -// -#define CMD_OXON_OPT(arg) \ - (((cmdSyntaxPtr)(ct17))->cmd[1] = (arg),(cmdSyntaxPtr)(ct17)) - -#define COX_NONE 0 // Don't send Xon/Xoff -#define COX_XON 1 // Send xon/xoff to start/stop incoming data - - -#define CMD_CTS_REP (cmdSyntaxPtr)(ct18) // Enable CTS reporting -#define CMD_CTS_NREP (cmdSyntaxPtr)(ct19) // Disable CTS reporting - -#define CMD_DCD_REP (cmdSyntaxPtr)(ct20) // Enable DCD reporting -#define CMD_DCD_NREP (cmdSyntaxPtr)(ct21) // Disable DCD reporting - -#define CMD_DSR_REP (cmdSyntaxPtr)(ct22) // Enable DSR reporting -#define CMD_DSR_NREP (cmdSyntaxPtr)(ct23) // Disable DSR reporting - -#define CMD_RI_REP (cmdSyntaxPtr)(ct24) // Enable RI reporting -#define CMD_RI_NREP (cmdSyntaxPtr)(ct25) // Disable RI reporting - -// Enable break reporting and select style -// -#define CMD_BRK_REP(arg) \ - (((cmdSyntaxPtr)(ct26))->cmd[1] = (arg),(cmdSyntaxPtr)(ct26)) - -#define CBK_STAT 0x00 // Report breaks as a status (exception,irq) -#define CBK_NULL 0x01 // Report breaks as a good null -#define CBK_STAT_SEQ 0x02 // Report breaks as a status AND as in-band character - // sequence FFh, 01h, 10h -#define CBK_SEQ 0x03 // Report breaks as the in-band - //sequence FFh, 01h, 10h ONLY. -#define CBK_FLSH 0x04 // if this bit set also flush input data -#define CBK_POSIX 0x08 // if this bit set report as FF,0,0 sequence -#define CBK_SINGLE 0x10 // if this bit set with CBK_SEQ or CBK_STAT_SEQ - //then reports single null instead of triple - -#define CMD_BRK_NREP (cmdSyntaxPtr)(ct27) // Disable break reporting - -// Specify maximum block size for received data -// -#define CMD_MAX_BLOCK(arg) \ - (((cmdSyntaxPtr)(ct28))->cmd[1] = (arg),(cmdSyntaxPtr)(ct28)) - -// -- COMMAND 29 is reserved -- - -#define CMD_CTSFL_ENAB (cmdSyntaxPtr)(ct30) // Enable CTS flow control -#define CMD_CTSFL_DSAB (cmdSyntaxPtr)(ct31) // Disable CTS flow control -#define CMD_RTSFL_ENAB (cmdSyntaxPtr)(ct32) // Enable RTS flow control -#define CMD_RTSFL_DSAB (cmdSyntaxPtr)(ct33) // Disable RTS flow control - -// Specify istrip option -// -#define CMD_ISTRIP_OPT(arg) \ - (((cmdSyntaxPtr)(ct34))->cmd[1] = (arg),(cmdSyntaxPtr)(ct34)) - -#define CIS_NOSTRIP 0 // Strip characters to character size -#define CIS_STRIP 1 // Strip any 8-bit characters to 7 bits - -// Send a break of arg milliseconds -// -#define CMD_SEND_BRK(arg) \ - (((cmdSyntaxPtr)(ct35))->cmd[1] = (arg),(cmdSyntaxPtr)(ct35)) - -// Set error reporting mode -// -#define CMD_SET_ERROR(arg) \ - (((cmdSyntaxPtr)(ct36))->cmd[1] = (arg),(cmdSyntaxPtr)(ct36)) - -#define CSE_ESTAT 0 // Report error in a status packet -#define CSE_NOREP 1 // Treat character as though it were good -#define CSE_DROP 2 // Discard the character -#define CSE_NULL 3 // Replace with a null -#define CSE_MARK 4 // Replace with a 3-character sequence (as Unix) - -#define CSE_REPLACE 0x8 // Replace the errored character with the - // replacement character defined here - -#define CSE_STAT_REPLACE 0x18 // Replace the errored character with the - // replacement character defined here AND - // report the error as a status packet (as in - // CSE_ESTAT). - - -// COMMAND 37, to send flow control packets, is handled only by low-level -// library code in response to data movement and shouldn't ever be sent by the -// user code. See i2pack.h and the body of i2lib.c for details. - -// Enable on-board post-processing, using options given in oflag argument. -// Formerly, this command was automatically preceded by a CMD_OPOST_OFF command -// because the loadware does not permit sending back-to-back CMD_OPOST_ON -// commands without an intervening CMD_OPOST_OFF. BUT, WE LEARN 18 MAY 92, that -// CMD_OPOST_ON and CMD_OPOST_OFF must each be at the end of a packet (or in a -// solo packet). This means the caller must specify separately CMD_OPOST_OFF, -// CMD_OPOST_ON(parm) when he calls i2QueueCommands(). That function will ensure -// each gets a separate packet. Extra CMD_OPOST_OFF's are always ok. -// -#define CMD_OPOST_ON(oflag) \ - (*(USHORT *)(((cmdSyntaxPtr)(ct39))->cmd[1]) = (oflag), \ - (cmdSyntaxPtr)(ct39)) - -#define CMD_OPOST_OFF (cmdSyntaxPtr)(ct40) // Disable on-board post-proc - -#define CMD_RESUME (cmdSyntaxPtr)(ct41) // Resume: behave as though an XON - // were received; - -// Set Transmit baud rate (see command 7 for arguments) -// -#define CMD_SETBAUD_TX(arg) \ - (((cmdSyntaxPtr)(ct42))->cmd[1] = (arg),(cmdSyntaxPtr)(ct42)) - -// Set Receive baud rate (see command 7 for arguments) -// -#define CMD_SETBAUD_RX(arg) \ - (((cmdSyntaxPtr)(ct43))->cmd[1] = (arg),(cmdSyntaxPtr)(ct43)) - -// Request interrupt from board each arg milliseconds. Interrupt will specify -// "received data", even though there may be no data present. If arg == 0, -// disables any such interrupts. -// -#define CMD_PING_REQ(arg) \ - (((cmdSyntaxPtr)(ct44))->cmd[1] = (arg),(cmdSyntaxPtr)(ct44)) - -#define CMD_HOT_ENAB (cmdSyntaxPtr)(ct45) // Enable Hot-key checking -#define CMD_HOT_DSAB (cmdSyntaxPtr)(ct46) // Disable Hot-key checking - -#if 0 -// COMMAND 47: Send Protocol info via Unix flags: -// iflag = Unix tty t_iflag -// cflag = Unix tty t_cflag -// lflag = Unix tty t_lflag -// See System V Unix/Xenix documentation for the meanings of the bit fields -// within these flags -// -#define CMD_UNIX_FLAGS(iflag,cflag,lflag) i2cmdUnixFlags(iflag,cflag,lflag) -#endif /* 0 */ - -#define CMD_DSRFL_ENAB (cmdSyntaxPtr)(ct48) // Enable DSR receiver ctrl -#define CMD_DSRFL_DSAB (cmdSyntaxPtr)(ct49) // Disable DSR receiver ctrl -#define CMD_DTRFL_ENAB (cmdSyntaxPtr)(ct50) // Enable DTR flow control -#define CMD_DTRFL_DSAB (cmdSyntaxPtr)(ct51) // Disable DTR flow control -#define CMD_BAUD_RESET (cmdSyntaxPtr)(ct52) // Reset baudrate table - -// COMMAND 54: Define custom rate #1 -// rate = (short) 1/10 of the desired baud rate -// -#define CMD_BAUD_DEF1(rate) i2cmdBaudDef(1,rate) - -// COMMAND 55: Define custom rate #2 -// rate = (short) 1/10 of the desired baud rate -// -#define CMD_BAUD_DEF2(rate) i2cmdBaudDef(2,rate) - -// Pause arg hundredths of seconds. (Note, this is NOT milliseconds.) -// -#define CMD_PAUSE(arg) \ - (((cmdSyntaxPtr)(ct56))->cmd[1] = (arg),(cmdSyntaxPtr)(ct56)) - -#define CMD_SUSPEND (cmdSyntaxPtr)(ct57) // Suspend output -#define CMD_UNSUSPEND (cmdSyntaxPtr)(ct58) // Un-Suspend output - -// Set parity-checking options -// -#define CMD_PARCHK(arg) \ - (((cmdSyntaxPtr)(ct59))->cmd[1] = (arg),(cmdSyntaxPtr)(ct59)) - -#define CPK_ENAB 0 // Enable parity checking on input -#define CPK_DSAB 1 // Disable parity checking on input - -#define CMD_BMARK_REQ (cmdSyntaxPtr)(ct60) // Bookmark request - - -// Enable/Disable internal loopback mode -// -#define CMD_INLOOP(arg) \ - (((cmdSyntaxPtr)(ct61))->cmd[1] = (arg),(cmdSyntaxPtr)(ct61)) - -#define CIN_DISABLE 0 // Normal operation (default) -#define CIN_ENABLE 1 // Internal (local) loopback -#define CIN_REMOTE 2 // Remote loopback - -// Specify timeout for hotkeys: Delay will be (arg x 10) milliseconds, arg == 0 -// --> no timeout: wait forever. -// -#define CMD_HOT_TIME(arg) \ - (((cmdSyntaxPtr)(ct62))->cmd[1] = (arg),(cmdSyntaxPtr)(ct62)) - - -// Define (outgoing) xon for receive flow control -// -#define CMD_DEF_OXON(arg) \ - (((cmdSyntaxPtr)(ct63))->cmd[1] = (arg),(cmdSyntaxPtr)(ct63)) - -// Define (outgoing) xoff for receiver flow control -// -#define CMD_DEF_OXOFF(arg) \ - (((cmdSyntaxPtr)(ct64))->cmd[1] = (arg),(cmdSyntaxPtr)(ct64)) - -// Enable/Disable RTS on transmit (1/2 duplex-style) -// -#define CMD_RTS_XMIT(arg) \ - (((cmdSyntaxPtr)(ct65))->cmd[1] = (arg),(cmdSyntaxPtr)(ct65)) - -#define CHD_DISABLE 0 -#define CHD_ENABLE 1 - -// Set high-water-mark level (debugging use only) -// -#define CMD_SETHIGHWAT(arg) \ - (((cmdSyntaxPtr)(ct66))->cmd[1] = (arg),(cmdSyntaxPtr)(ct66)) - -// Start flushing tagged data (tag = 0-14) -// -#define CMD_START_SELFL(tag) \ - (((cmdSyntaxPtr)(ct67))->cmd[1] = (tag),(cmdSyntaxPtr)(ct67)) - -// End flushing tagged data (tag = 0-14) -// -#define CMD_END_SELFL(tag) \ - (((cmdSyntaxPtr)(ct68))->cmd[1] = (tag),(cmdSyntaxPtr)(ct68)) - -#define CMD_HWFLOW_OFF (cmdSyntaxPtr)(ct69) // Disable HW TX flow control -#define CMD_ODSRFL_ENAB (cmdSyntaxPtr)(ct70) // Enable DSR output f/c -#define CMD_ODSRFL_DSAB (cmdSyntaxPtr)(ct71) // Disable DSR output f/c -#define CMD_ODCDFL_ENAB (cmdSyntaxPtr)(ct72) // Enable DCD output f/c -#define CMD_ODCDFL_DSAB (cmdSyntaxPtr)(ct73) // Disable DCD output f/c - -// Set transmit interrupt load level. Count should be an even value 2-12 -// -#define CMD_LOADLEVEL(count) \ - (((cmdSyntaxPtr)(ct74))->cmd[1] = (count),(cmdSyntaxPtr)(ct74)) - -// If reporting DSS changes, map to character sequence FFh, 2, MSR -// -#define CMD_STATDATA(arg) \ - (((cmdSyntaxPtr)(ct75))->cmd[1] = (arg),(cmdSyntaxPtr)(ct75)) - -#define CSTD_DISABLE// Report DSS changes as status packets only (default) -#define CSTD_ENABLE // Report DSS changes as in-band data sequence as well as - // by status packet. - -#define CMD_BREAK_ON (cmdSyntaxPtr)(ct76)// Set break and stop xmit -#define CMD_BREAK_OFF (cmdSyntaxPtr)(ct77)// End break and restart xmit -#define CMD_GETFC (cmdSyntaxPtr)(ct78)// Request for flow control packet - // from board. - -// Transmit this character immediately -// -#define CMD_XMIT_NOW(ch) \ - (((cmdSyntaxPtr)(ct79))->cmd[1] = (ch),(cmdSyntaxPtr)(ct79)) - -// Set baud rate via "divisor latch" -// -#define CMD_DIVISOR_LATCH(which,value) \ - (((cmdSyntaxPtr)(ct80))->cmd[1] = (which), \ - *(USHORT *)(((cmdSyntaxPtr)(ct80))->cmd[2]) = (value), \ - (cmdSyntaxPtr)(ct80)) - -#define CDL_RX 1 // Set receiver rate -#define CDL_TX 2 // Set transmit rate - // (CDL_TX | CDL_RX) Set both rates - -// Request for special diagnostic status pkt from the board. -// -#define CMD_GET_STATUS (cmdSyntaxPtr)(ct81) - -// Request time-stamped transmit character count packet. -// -#define CMD_GET_TXCNT (cmdSyntaxPtr)(ct82) - -// Request time-stamped receive character count packet. -// -#define CMD_GET_RXCNT (cmdSyntaxPtr)(ct83) - -// Request for box/board I.D. packet. -#define CMD_GET_BOXIDS (cmdSyntaxPtr)(ct84) - -// Enable or disable multiple channels according to bit-mapped ushorts box 1-4 -// -#define CMD_ENAB_MULT(enable, box1, box2, box3, box4) \ - (((cmdSytaxPtr)(ct85))->cmd[1] = (enable), \ - *(USHORT *)(((cmdSyntaxPtr)(ct85))->cmd[2]) = (box1), \ - *(USHORT *)(((cmdSyntaxPtr)(ct85))->cmd[4]) = (box2), \ - *(USHORT *)(((cmdSyntaxPtr)(ct85))->cmd[6]) = (box3), \ - *(USHORT *)(((cmdSyntaxPtr)(ct85))->cmd[8]) = (box4), \ - (cmdSyntaxPtr)(ct85)) - -#define CEM_DISABLE 0 -#define CEM_ENABLE 1 - -// Enable or disable receiver or receiver interrupts (default both enabled) -// -#define CMD_RCV_ENABLE(ch) \ - (((cmdSyntaxPtr)(ct86))->cmd[1] = (ch),(cmdSyntaxPtr)(ct86)) - -#define CRE_OFF 0 // Disable the receiver -#define CRE_ON 1 // Enable the receiver -#define CRE_INTOFF 2 // Disable receiver interrupts (to loadware) -#define CRE_INTON 3 // Enable receiver interrupts (to loadware) - -// Starts up a hardware test process, which runs transparently, and sends a -// STAT_HWFAIL packet in case a hardware failure is detected. -// -#define CMD_HW_TEST (cmdSyntaxPtr)(ct87) - -// Change receiver threshold and timeout value: -// Defaults: timeout = 20mS -// threshold count = 8 when DTRflow not in use, -// threshold count = 5 when DTRflow in use. -// -#define CMD_RCV_THRESHOLD(count,ms) \ - (((cmdSyntaxPtr)(ct88))->cmd[1] = (count), \ - ((cmdSyntaxPtr)(ct88))->cmd[2] = (ms), \ - (cmdSyntaxPtr)(ct88)) - -// Makes the loadware report DSS signals for this channel immediately. -// -#define CMD_DSS_NOW (cmdSyntaxPtr)(ct89) - -// Set the receive silo parameters -// timeout is ms idle wait until delivery (~VTIME) -// threshold is max characters cause interrupt (~VMIN) -// -#define CMD_SET_SILO(timeout,threshold) \ - (((cmdSyntaxPtr)(ct90))->cmd[1] = (timeout), \ - ((cmdSyntaxPtr)(ct90))->cmd[2] = (threshold), \ - (cmdSyntaxPtr)(ct90)) - -// Set timed break in decisecond (1/10s) -// -#define CMD_LBREAK(ds) \ - (((cmdSyntaxPtr)(ct91))->cmd[1] = (ds),(cmdSyntaxPtr)(ct66)) - - - -#endif // I2CMD_H diff --git a/drivers/staging/tty/ip2/i2ellis.c b/drivers/staging/tty/ip2/i2ellis.c deleted file mode 100644 index 29db44d..0000000 --- a/drivers/staging/tty/ip2/i2ellis.c +++ /dev/null @@ -1,1403 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Low-level interface code for the device driver -* (This is included source code, not a separate compilation -* module.) -* -*******************************************************************************/ -//--------------------------------------------- -// Function declarations private to this module -//--------------------------------------------- -// Functions called only indirectly through i2eBordStr entries. - -static int iiWriteBuf16(i2eBordStrPtr, unsigned char *, int); -static int iiWriteBuf8(i2eBordStrPtr, unsigned char *, int); -static int iiReadBuf16(i2eBordStrPtr, unsigned char *, int); -static int iiReadBuf8(i2eBordStrPtr, unsigned char *, int); - -static unsigned short iiReadWord16(i2eBordStrPtr); -static unsigned short iiReadWord8(i2eBordStrPtr); -static void iiWriteWord16(i2eBordStrPtr, unsigned short); -static void iiWriteWord8(i2eBordStrPtr, unsigned short); - -static int iiWaitForTxEmptyII(i2eBordStrPtr, int); -static int iiWaitForTxEmptyIIEX(i2eBordStrPtr, int); -static int iiTxMailEmptyII(i2eBordStrPtr); -static int iiTxMailEmptyIIEX(i2eBordStrPtr); -static int iiTrySendMailII(i2eBordStrPtr, unsigned char); -static int iiTrySendMailIIEX(i2eBordStrPtr, unsigned char); - -static unsigned short iiGetMailII(i2eBordStrPtr); -static unsigned short iiGetMailIIEX(i2eBordStrPtr); - -static void iiEnableMailIrqII(i2eBordStrPtr); -static void iiEnableMailIrqIIEX(i2eBordStrPtr); -static void iiWriteMaskII(i2eBordStrPtr, unsigned char); -static void iiWriteMaskIIEX(i2eBordStrPtr, unsigned char); - -static void ii2Nop(void); - -//*************** -//* Static Data * -//*************** - -static int ii2Safe; // Safe I/O address for delay routine - -static int iiDelayed; // Set when the iiResetDelay function is - // called. Cleared when ANY board is reset. -static DEFINE_RWLOCK(Dl_spinlock); - -//******** -//* Code * -//******** - -//======================================================= -// Initialization Routines -// -// iiSetAddress -// iiReset -// iiResetDelay -// iiInitialize -//======================================================= - -//****************************************************************************** -// Function: iiSetAddress(pB, address, delay) -// Parameters: pB - pointer to the board structure -// address - the purported I/O address of the board -// delay - pointer to the 1-ms delay function to use -// in this and any future operations to this board -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// This routine (roughly) checks for address validity, sets the i2eValid OK and -// sets the state to II_STATE_COLD which means that we haven't even sent a reset -// yet. -// -//****************************************************************************** -static int -iiSetAddress( i2eBordStrPtr pB, int address, delayFunc_t delay ) -{ - // Should any failure occur before init is finished... - pB->i2eValid = I2E_INCOMPLETE; - - // Cannot check upper limit except extremely: Might be microchannel - // Address must be on an 8-byte boundary - - if ((unsigned int)address <= 0x100 - || (unsigned int)address >= 0xfff8 - || (address & 0x7) - ) - { - I2_COMPLETE(pB, I2EE_BADADDR); - } - - // Initialize accelerators - pB->i2eBase = address; - pB->i2eData = address + FIFO_DATA; - pB->i2eStatus = address + FIFO_STATUS; - pB->i2ePointer = address + FIFO_PTR; - pB->i2eXMail = address + FIFO_MAIL; - pB->i2eXMask = address + FIFO_MASK; - - // Initialize i/o address for ii2DelayIO - ii2Safe = address + FIFO_NOP; - - // Initialize the delay routine - pB->i2eDelay = ((delay != (delayFunc_t)NULL) ? delay : (delayFunc_t)ii2Nop); - - pB->i2eValid = I2E_MAGIC; - pB->i2eState = II_STATE_COLD; - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiReset(pB) -// Parameters: pB - pointer to the board structure -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Attempts to reset the board (see also i2hw.h). Normally, we would use this to -// reset a board immediately after iiSetAddress(), but it is valid to reset a -// board from any state, say, in order to change or re-load loadware. (Under -// such circumstances, no reason to re-run iiSetAddress(), which is why it is a -// separate routine and not included in this routine. -// -//****************************************************************************** -static int -iiReset(i2eBordStrPtr pB) -{ - // Magic number should be set, else even the address is suspect - if (pB->i2eValid != I2E_MAGIC) - { - I2_COMPLETE(pB, I2EE_BADMAGIC); - } - - outb(0, pB->i2eBase + FIFO_RESET); /* Any data will do */ - iiDelay(pB, 50); // Pause between resets - outb(0, pB->i2eBase + FIFO_RESET); /* Second reset */ - - // We must wait before even attempting to read anything from the FIFO: the - // board's P.O.S.T may actually attempt to read and write its end of the - // FIFO in order to check flags, loop back (where supported), etc. On - // completion of this testing it would reset the FIFO, and on completion - // of all // P.O.S.T., write the message. We must not mistake data which - // might have been sent for testing as part of the reset message. To - // better utilize time, say, when resetting several boards, we allow the - // delay to be performed externally; in this way the caller can reset - // several boards, delay a single time, then call the initialization - // routine for all. - - pB->i2eState = II_STATE_RESET; - - iiDelayed = 0; // i.e., the delay routine hasn't been called since the most - // recent reset. - - // Ensure anything which would have been of use to standard loadware is - // blanked out, since board has now forgotten everything!. - - pB->i2eUsingIrq = I2_IRQ_UNDEFINED; /* to not use an interrupt so far */ - pB->i2eWaitingForEmptyFifo = 0; - pB->i2eOutMailWaiting = 0; - pB->i2eChannelPtr = NULL; - pB->i2eChannelCnt = 0; - - pB->i2eLeadoffWord[0] = 0; - pB->i2eFifoInInts = 0; - pB->i2eFifoOutInts = 0; - pB->i2eFatalTrap = NULL; - pB->i2eFatal = 0; - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiResetDelay(pB) -// Parameters: pB - pointer to the board structure -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Using the delay defined in board structure, waits two seconds (for board to -// reset). -// -//****************************************************************************** -static int -iiResetDelay(i2eBordStrPtr pB) -{ - if (pB->i2eValid != I2E_MAGIC) { - I2_COMPLETE(pB, I2EE_BADMAGIC); - } - if (pB->i2eState != II_STATE_RESET) { - I2_COMPLETE(pB, I2EE_BADSTATE); - } - iiDelay(pB,2000); /* Now we wait for two seconds. */ - iiDelayed = 1; /* Delay has been called: ok to initialize */ - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiInitialize(pB) -// Parameters: pB - pointer to the board structure -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Attempts to read the Power-on reset message. Initializes any remaining fields -// in the pB structure. -// -// This should be called as the third step of a process beginning with -// iiReset(), then iiResetDelay(). This routine checks to see that the structure -// is "valid" and in the reset state, also confirms that the delay routine has -// been called since the latest reset (to any board! overly strong!). -// -//****************************************************************************** -static int -iiInitialize(i2eBordStrPtr pB) -{ - int itemp; - unsigned char c; - unsigned short utemp; - unsigned int ilimit; - - if (pB->i2eValid != I2E_MAGIC) - { - I2_COMPLETE(pB, I2EE_BADMAGIC); - } - - if (pB->i2eState != II_STATE_RESET || !iiDelayed) - { - I2_COMPLETE(pB, I2EE_BADSTATE); - } - - // In case there is a failure short of our completely reading the power-up - // message. - pB->i2eValid = I2E_INCOMPLETE; - - - // Now attempt to read the message. - - for (itemp = 0; itemp < sizeof(porStr); itemp++) - { - // We expect the entire message is ready. - if (!I2_HAS_INPUT(pB)) { - pB->i2ePomSize = itemp; - I2_COMPLETE(pB, I2EE_PORM_SHORT); - } - - pB->i2ePom.c[itemp] = c = inb(pB->i2eData); - - // We check the magic numbers as soon as they are supposed to be read - // (rather than after) to minimize effect of reading something we - // already suspect can't be "us". - if ( (itemp == POR_1_INDEX && c != POR_MAGIC_1) || - (itemp == POR_2_INDEX && c != POR_MAGIC_2)) - { - pB->i2ePomSize = itemp+1; - I2_COMPLETE(pB, I2EE_BADMAGIC); - } - } - - pB->i2ePomSize = itemp; - - // Ensure that this was all the data... - if (I2_HAS_INPUT(pB)) - I2_COMPLETE(pB, I2EE_PORM_LONG); - - // For now, we'll fail to initialize if P.O.S.T reports bad chip mapper: - // Implying we will not be able to download any code either: That's ok: the - // condition is pretty explicit. - if (pB->i2ePom.e.porDiag1 & POR_BAD_MAPPER) - { - I2_COMPLETE(pB, I2EE_POSTERR); - } - - // Determine anything which must be done differently depending on the family - // of boards! - switch (pB->i2ePom.e.porID & POR_ID_FAMILY) - { - case POR_ID_FII: // IntelliPort-II - - pB->i2eFifoStyle = FIFO_II; - pB->i2eFifoSize = 512; // 512 bytes, always - pB->i2eDataWidth16 = false; - - pB->i2eMaxIrq = 15; // Because board cannot tell us it is in an 8-bit - // slot, we do allow it to be done (documentation!) - - pB->i2eGoodMap[1] = - pB->i2eGoodMap[2] = - pB->i2eGoodMap[3] = - pB->i2eChannelMap[1] = - pB->i2eChannelMap[2] = - pB->i2eChannelMap[3] = 0; - - switch (pB->i2ePom.e.porID & POR_ID_SIZE) - { - case POR_ID_II_4: - pB->i2eGoodMap[0] = - pB->i2eChannelMap[0] = 0x0f; // four-port - - // Since porPorts1 is based on the Hardware ID register, the numbers - // should always be consistent for IntelliPort-II. Ditto below... - if (pB->i2ePom.e.porPorts1 != 4) - { - I2_COMPLETE(pB, I2EE_INCONSIST); - } - break; - - case POR_ID_II_8: - case POR_ID_II_8R: - pB->i2eGoodMap[0] = - pB->i2eChannelMap[0] = 0xff; // Eight port - if (pB->i2ePom.e.porPorts1 != 8) - { - I2_COMPLETE(pB, I2EE_INCONSIST); - } - break; - - case POR_ID_II_6: - pB->i2eGoodMap[0] = - pB->i2eChannelMap[0] = 0x3f; // Six Port - if (pB->i2ePom.e.porPorts1 != 6) - { - I2_COMPLETE(pB, I2EE_INCONSIST); - } - break; - } - - // Fix up the "good channel list based on any errors reported. - if (pB->i2ePom.e.porDiag1 & POR_BAD_UART1) - { - pB->i2eGoodMap[0] &= ~0x0f; - } - - if (pB->i2ePom.e.porDiag1 & POR_BAD_UART2) - { - pB->i2eGoodMap[0] &= ~0xf0; - } - - break; // POR_ID_FII case - - case POR_ID_FIIEX: // IntelliPort-IIEX - - pB->i2eFifoStyle = FIFO_IIEX; - - itemp = pB->i2ePom.e.porFifoSize; - - // Implicit assumption that fifo would not grow beyond 32k, - // nor would ever be less than 256. - - if (itemp < 8 || itemp > 15) - { - I2_COMPLETE(pB, I2EE_INCONSIST); - } - pB->i2eFifoSize = (1 << itemp); - - // These are based on what P.O.S.T thinks should be there, based on - // box ID registers - ilimit = pB->i2ePom.e.porNumBoxes; - if (ilimit > ABS_MAX_BOXES) - { - ilimit = ABS_MAX_BOXES; - } - - // For as many boxes as EXIST, gives the type of box. - // Added 8/6/93: check for the ISA-4 (asic) which looks like an - // expandable but for whom "8 or 16?" is not the right question. - - utemp = pB->i2ePom.e.porFlags; - if (utemp & POR_CEX4) - { - pB->i2eChannelMap[0] = 0x000f; - } else { - utemp &= POR_BOXES; - for (itemp = 0; itemp < ilimit; itemp++) - { - pB->i2eChannelMap[itemp] = - ((utemp & POR_BOX_16) ? 0xffff : 0x00ff); - utemp >>= 1; - } - } - - // These are based on what P.O.S.T actually found. - - utemp = (pB->i2ePom.e.porPorts2 << 8) + pB->i2ePom.e.porPorts1; - - for (itemp = 0; itemp < ilimit; itemp++) - { - pB->i2eGoodMap[itemp] = 0; - if (utemp & 1) pB->i2eGoodMap[itemp] |= 0x000f; - if (utemp & 2) pB->i2eGoodMap[itemp] |= 0x00f0; - if (utemp & 4) pB->i2eGoodMap[itemp] |= 0x0f00; - if (utemp & 8) pB->i2eGoodMap[itemp] |= 0xf000; - utemp >>= 4; - } - - // Now determine whether we should transfer in 8 or 16-bit mode. - switch (pB->i2ePom.e.porBus & (POR_BUS_SLOT16 | POR_BUS_DIP16) ) - { - case POR_BUS_SLOT16 | POR_BUS_DIP16: - pB->i2eDataWidth16 = true; - pB->i2eMaxIrq = 15; - break; - - case POR_BUS_SLOT16: - pB->i2eDataWidth16 = false; - pB->i2eMaxIrq = 15; - break; - - case 0: - case POR_BUS_DIP16: // In an 8-bit slot, DIP switch don't care. - default: - pB->i2eDataWidth16 = false; - pB->i2eMaxIrq = 7; - break; - } - break; // POR_ID_FIIEX case - - default: // Unknown type of board - I2_COMPLETE(pB, I2EE_BAD_FAMILY); - break; - } // End the switch based on family - - // Temporarily, claim there is no room in the outbound fifo. - // We will maintain this whenever we check for an empty outbound FIFO. - pB->i2eFifoRemains = 0; - - // Now, based on the bus type, should we expect to be able to re-configure - // interrupts (say, for testing purposes). - switch (pB->i2ePom.e.porBus & POR_BUS_TYPE) - { - case POR_BUS_T_ISA: - case POR_BUS_T_UNK: // If the type of bus is undeclared, assume ok. - case POR_BUS_T_MCA: - case POR_BUS_T_EISA: - break; - default: - I2_COMPLETE(pB, I2EE_BADBUS); - } - - if (pB->i2eDataWidth16) - { - pB->i2eWriteBuf = iiWriteBuf16; - pB->i2eReadBuf = iiReadBuf16; - pB->i2eWriteWord = iiWriteWord16; - pB->i2eReadWord = iiReadWord16; - } else { - pB->i2eWriteBuf = iiWriteBuf8; - pB->i2eReadBuf = iiReadBuf8; - pB->i2eWriteWord = iiWriteWord8; - pB->i2eReadWord = iiReadWord8; - } - - switch(pB->i2eFifoStyle) - { - case FIFO_II: - pB->i2eWaitForTxEmpty = iiWaitForTxEmptyII; - pB->i2eTxMailEmpty = iiTxMailEmptyII; - pB->i2eTrySendMail = iiTrySendMailII; - pB->i2eGetMail = iiGetMailII; - pB->i2eEnableMailIrq = iiEnableMailIrqII; - pB->i2eWriteMask = iiWriteMaskII; - - break; - - case FIFO_IIEX: - pB->i2eWaitForTxEmpty = iiWaitForTxEmptyIIEX; - pB->i2eTxMailEmpty = iiTxMailEmptyIIEX; - pB->i2eTrySendMail = iiTrySendMailIIEX; - pB->i2eGetMail = iiGetMailIIEX; - pB->i2eEnableMailIrq = iiEnableMailIrqIIEX; - pB->i2eWriteMask = iiWriteMaskIIEX; - - break; - - default: - I2_COMPLETE(pB, I2EE_INCONSIST); - } - - // Initialize state information. - pB->i2eState = II_STATE_READY; // Ready to load loadware. - - // Some Final cleanup: - // For some boards, the bootstrap firmware may perform some sort of test - // resulting in a stray character pending in the incoming mailbox. If one is - // there, it should be read and discarded, especially since for the standard - // firmware, it's the mailbox that interrupts the host. - - pB->i2eStartMail = iiGetMail(pB); - - // Throw it away and clear the mailbox structure element - pB->i2eStartMail = NO_MAIL_HERE; - - // Everything is ok now, return with good status/ - - pB->i2eValid = I2E_MAGIC; - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: ii2DelayTimer(mseconds) -// Parameters: mseconds - number of milliseconds to delay -// -// Returns: Nothing -// -// Description: -// -// This routine delays for approximately mseconds milliseconds and is intended -// to be called indirectly through i2Delay field in i2eBordStr. It uses the -// Linux timer_list mechanism. -// -// The Linux timers use a unit called "jiffies" which are 10mS in the Intel -// architecture. This function rounds the delay period up to the next "jiffy". -// In the Alpha architecture the "jiffy" is 1mS, but this driver is not intended -// for Alpha platforms at this time. -// -//****************************************************************************** -static void -ii2DelayTimer(unsigned int mseconds) -{ - msleep_interruptible(mseconds); -} - -#if 0 -//static void ii2DelayIO(unsigned int); -//****************************************************************************** -// !!! Not Used, this is DOS crap, some of you young folks may be interested in -// in how things were done in the stone age of caculating machines !!! -// Function: ii2DelayIO(mseconds) -// Parameters: mseconds - number of milliseconds to delay -// -// Returns: Nothing -// -// Description: -// -// This routine delays for approximately mseconds milliseconds and is intended -// to be called indirectly through i2Delay field in i2eBordStr. It is intended -// for use where a clock-based function is impossible: for example, DOS drivers. -// -// This function uses the IN instruction to place bounds on the timing and -// assumes that ii2Safe has been set. This is because I/O instructions are not -// subject to caching and will therefore take a certain minimum time. To ensure -// the delay is at least long enough on fast machines, it is based on some -// fastest-case calculations. On slower machines this may cause VERY long -// delays. (3 x fastest case). In the fastest case, everything is cached except -// the I/O instruction itself. -// -// Timing calculations: -// The fastest bus speed for I/O operations is likely to be 10 MHz. The I/O -// operation in question is a byte operation to an odd address. For 8-bit -// operations, the architecture generally enforces two wait states. At 10 MHz, a -// single cycle time is 100nS. A read operation at two wait states takes 6 -// cycles for a total time of 600nS. Therefore approximately 1666 iterations -// would be required to generate a single millisecond delay. The worst -// (reasonable) case would be an 8MHz system with no cacheing. In this case, the -// I/O instruction would take 125nS x 6 cyles = 750 nS. More importantly, code -// fetch of other instructions in the loop would take time (zero wait states, -// however) and would be hard to estimate. This is minimized by using in-line -// assembler for the in inner loop of IN instructions. This consists of just a -// few bytes. So we'll guess about four code fetches per loop. Each code fetch -// should take four cycles, so we have 125nS * 8 = 1000nS. Worst case then is -// that what should have taken 1 mS takes instead 1666 * (1750) = 2.9 mS. -// -// So much for theoretical timings: results using 1666 value on some actual -// machines: -// IBM 286 6MHz 3.15 mS -// Zenith 386 33MHz 2.45 mS -// (brandX) 386 33MHz 1.90 mS (has cache) -// (brandY) 486 33MHz 2.35 mS -// NCR 486 ?? 1.65 mS (microchannel) -// -// For most machines, it is probably safe to scale this number back (remember, -// for robust operation use an actual timed delay if possible), so we are using -// a value of 1190. This yields 1.17 mS for the fastest machine in our sample, -// 1.75 mS for typical 386 machines, and 2.25 mS the absolute slowest machine. -// -// 1/29/93: -// The above timings are too slow. Actual cycle times might be faster. ISA cycle -// times could approach 500 nS, and ... -// The IBM model 77 being microchannel has no wait states for 8-bit reads and -// seems to be accessing the I/O at 440 nS per access (from start of one to -// start of next). This would imply we need 1000/.440 = 2272 iterations to -// guarantee we are fast enough. In actual testing, we see that 2 * 1190 are in -// fact enough. For diagnostics, we keep the level at 1190, but developers note -// this needs tuning. -// -// Safe assumption: 2270 i/o reads = 1 millisecond -// -//****************************************************************************** - - -static int ii2DelValue = 1190; // See timing calculations below - // 1666 for fastest theoretical machine - // 1190 safe for most fast 386 machines - // 1000 for fastest machine tested here - // 540 (sic) for AT286/6Mhz -static void -ii2DelayIO(unsigned int mseconds) -{ - if (!ii2Safe) - return; /* Do nothing if this variable uninitialized */ - - while(mseconds--) { - int i = ii2DelValue; - while ( i-- ) { - inb(ii2Safe); - } - } -} -#endif - -//****************************************************************************** -// Function: ii2Nop() -// Parameters: None -// -// Returns: Nothing -// -// Description: -// -// iiInitialize will set i2eDelay to this if the delay parameter is NULL. This -// saves checking for a NULL pointer at every call. -//****************************************************************************** -static void -ii2Nop(void) -{ - return; // no mystery here -} - -//======================================================= -// Routines which are available in 8/16-bit versions, or -// in different fifo styles. These are ALL called -// indirectly through the board structure. -//======================================================= - -//****************************************************************************** -// Function: iiWriteBuf16(pB, address, count) -// Parameters: pB - pointer to board structure -// address - address of data to write -// count - number of data bytes to write -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Writes 'count' bytes from 'address' to the data fifo specified by the board -// structure pointer pB. Should count happen to be odd, an extra pad byte is -// sent (identity unknown...). Uses 16-bit (word) operations. Is called -// indirectly through pB->i2eWriteBuf. -// -//****************************************************************************** -static int -iiWriteBuf16(i2eBordStrPtr pB, unsigned char *address, int count) -{ - // Rudimentary sanity checking here. - if (pB->i2eValid != I2E_MAGIC) - I2_COMPLETE(pB, I2EE_INVALID); - - I2_OUTSW(pB->i2eData, address, count); - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiWriteBuf8(pB, address, count) -// Parameters: pB - pointer to board structure -// address - address of data to write -// count - number of data bytes to write -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Writes 'count' bytes from 'address' to the data fifo specified by the board -// structure pointer pB. Should count happen to be odd, an extra pad byte is -// sent (identity unknown...). This is to be consistent with the 16-bit version. -// Uses 8-bit (byte) operations. Is called indirectly through pB->i2eWriteBuf. -// -//****************************************************************************** -static int -iiWriteBuf8(i2eBordStrPtr pB, unsigned char *address, int count) -{ - /* Rudimentary sanity checking here */ - if (pB->i2eValid != I2E_MAGIC) - I2_COMPLETE(pB, I2EE_INVALID); - - I2_OUTSB(pB->i2eData, address, count); - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiReadBuf16(pB, address, count) -// Parameters: pB - pointer to board structure -// address - address to put data read -// count - number of data bytes to read -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Reads 'count' bytes into 'address' from the data fifo specified by the board -// structure pointer pB. Should count happen to be odd, an extra pad byte is -// received (identity unknown...). Uses 16-bit (word) operations. Is called -// indirectly through pB->i2eReadBuf. -// -//****************************************************************************** -static int -iiReadBuf16(i2eBordStrPtr pB, unsigned char *address, int count) -{ - // Rudimentary sanity checking here. - if (pB->i2eValid != I2E_MAGIC) - I2_COMPLETE(pB, I2EE_INVALID); - - I2_INSW(pB->i2eData, address, count); - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiReadBuf8(pB, address, count) -// Parameters: pB - pointer to board structure -// address - address to put data read -// count - number of data bytes to read -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Reads 'count' bytes into 'address' from the data fifo specified by the board -// structure pointer pB. Should count happen to be odd, an extra pad byte is -// received (identity unknown...). This to match the 16-bit behaviour. Uses -// 8-bit (byte) operations. Is called indirectly through pB->i2eReadBuf. -// -//****************************************************************************** -static int -iiReadBuf8(i2eBordStrPtr pB, unsigned char *address, int count) -{ - // Rudimentary sanity checking here. - if (pB->i2eValid != I2E_MAGIC) - I2_COMPLETE(pB, I2EE_INVALID); - - I2_INSB(pB->i2eData, address, count); - - I2_COMPLETE(pB, I2EE_GOOD); -} - -//****************************************************************************** -// Function: iiReadWord16(pB) -// Parameters: pB - pointer to board structure -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Returns the word read from the data fifo specified by the board-structure -// pointer pB. Uses a 16-bit operation. Is called indirectly through -// pB->i2eReadWord. -// -//****************************************************************************** -static unsigned short -iiReadWord16(i2eBordStrPtr pB) -{ - return inw(pB->i2eData); -} - -//****************************************************************************** -// Function: iiReadWord8(pB) -// Parameters: pB - pointer to board structure -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Returns the word read from the data fifo specified by the board-structure -// pointer pB. Uses two 8-bit operations. Bytes are assumed to be LSB first. Is -// called indirectly through pB->i2eReadWord. -// -//****************************************************************************** -static unsigned short -iiReadWord8(i2eBordStrPtr pB) -{ - unsigned short urs; - - urs = inb(pB->i2eData); - - return (inb(pB->i2eData) << 8) | urs; -} - -//****************************************************************************** -// Function: iiWriteWord16(pB, value) -// Parameters: pB - pointer to board structure -// value - data to write -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Writes the word 'value' to the data fifo specified by the board-structure -// pointer pB. Uses 16-bit operation. Is called indirectly through -// pB->i2eWriteWord. -// -//****************************************************************************** -static void -iiWriteWord16(i2eBordStrPtr pB, unsigned short value) -{ - outw((int)value, pB->i2eData); -} - -//****************************************************************************** -// Function: iiWriteWord8(pB, value) -// Parameters: pB - pointer to board structure -// value - data to write -// -// Returns: True if everything appears copacetic. -// False if there is any error: the pB->i2eError field has the error -// -// Description: -// -// Writes the word 'value' to the data fifo specified by the board-structure -// pointer pB. Uses two 8-bit operations (writes LSB first). Is called -// indirectly through pB->i2eWriteWord. -// -//****************************************************************************** -static void -iiWriteWord8(i2eBordStrPtr pB, unsigned short value) -{ - outb((char)value, pB->i2eData); - outb((char)(value >> 8), pB->i2eData); -} - -//****************************************************************************** -// Function: iiWaitForTxEmptyII(pB, mSdelay) -// Parameters: pB - pointer to board structure -// mSdelay - period to wait before returning -// -// Returns: True if the FIFO is empty. -// False if it not empty in the required time: the pB->i2eError -// field has the error. -// -// Description: -// -// Waits up to "mSdelay" milliseconds for the outgoing FIFO to become empty; if -// not empty by the required time, returns false and error in pB->i2eError, -// otherwise returns true. -// -// mSdelay == 0 is taken to mean must be empty on the first test. -// -// This version operates on IntelliPort-II - style FIFO's -// -// Note this routine is organized so that if status is ok there is no delay at -// all called either before or after the test. Is called indirectly through -// pB->i2eWaitForTxEmpty. -// -//****************************************************************************** -static int -iiWaitForTxEmptyII(i2eBordStrPtr pB, int mSdelay) -{ - unsigned long flags; - int itemp; - - for (;;) - { - // This routine hinges on being able to see the "other" status register - // (as seen by the local processor). His incoming fifo is our outgoing - // FIFO. - // - // By the nature of this routine, you would be using this as part of a - // larger atomic context: i.e., you would use this routine to ensure the - // fifo empty, then act on this information. Between these two halves, - // you will generally not want to service interrupts or in any way - // disrupt the assumptions implicit in the larger context. - // - // Even worse, however, this routine "shifts" the status register to - // point to the local status register which is not the usual situation. - // Therefore for extra safety, we force the critical section to be - // completely atomic, and pick up after ourselves before allowing any - // interrupts of any kind. - - - write_lock_irqsave(&Dl_spinlock, flags); - outb(SEL_COMMAND, pB->i2ePointer); - outb(SEL_CMD_SH, pB->i2ePointer); - - itemp = inb(pB->i2eStatus); - - outb(SEL_COMMAND, pB->i2ePointer); - outb(SEL_CMD_UNSH, pB->i2ePointer); - - if (itemp & ST_IN_EMPTY) - { - I2_UPDATE_FIFO_ROOM(pB); - write_unlock_irqrestore(&Dl_spinlock, flags); - I2_COMPLETE(pB, I2EE_GOOD); - } - - write_unlock_irqrestore(&Dl_spinlock, flags); - - if (mSdelay-- == 0) - break; - - iiDelay(pB, 1); /* 1 mS granularity on checking condition */ - } - I2_COMPLETE(pB, I2EE_TXE_TIME); -} - -//****************************************************************************** -// Function: iiWaitForTxEmptyIIEX(pB, mSdelay) -// Parameters: pB - pointer to board structure -// mSdelay - period to wait before returning -// -// Returns: True if the FIFO is empty. -// False if it not empty in the required time: the pB->i2eError -// field has the error. -// -// Description: -// -// Waits up to "mSdelay" milliseconds for the outgoing FIFO to become empty; if -// not empty by the required time, returns false and error in pB->i2eError, -// otherwise returns true. -// -// mSdelay == 0 is taken to mean must be empty on the first test. -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -// Note this routine is organized so that if status is ok there is no delay at -// all called either before or after the test. Is called indirectly through -// pB->i2eWaitForTxEmpty. -// -//****************************************************************************** -static int -iiWaitForTxEmptyIIEX(i2eBordStrPtr pB, int mSdelay) -{ - unsigned long flags; - - for (;;) - { - // By the nature of this routine, you would be using this as part of a - // larger atomic context: i.e., you would use this routine to ensure the - // fifo empty, then act on this information. Between these two halves, - // you will generally not want to service interrupts or in any way - // disrupt the assumptions implicit in the larger context. - - write_lock_irqsave(&Dl_spinlock, flags); - - if (inb(pB->i2eStatus) & STE_OUT_MT) { - I2_UPDATE_FIFO_ROOM(pB); - write_unlock_irqrestore(&Dl_spinlock, flags); - I2_COMPLETE(pB, I2EE_GOOD); - } - write_unlock_irqrestore(&Dl_spinlock, flags); - - if (mSdelay-- == 0) - break; - - iiDelay(pB, 1); // 1 mS granularity on checking condition - } - I2_COMPLETE(pB, I2EE_TXE_TIME); -} - -//****************************************************************************** -// Function: iiTxMailEmptyII(pB) -// Parameters: pB - pointer to board structure -// -// Returns: True if the transmit mailbox is empty. -// False if it not empty. -// -// Description: -// -// Returns true or false according to whether the transmit mailbox is empty (and -// therefore able to accept more mail) -// -// This version operates on IntelliPort-II - style FIFO's -// -//****************************************************************************** -static int -iiTxMailEmptyII(i2eBordStrPtr pB) -{ - int port = pB->i2ePointer; - outb(SEL_OUTMAIL, port); - return inb(port) == 0; -} - -//****************************************************************************** -// Function: iiTxMailEmptyIIEX(pB) -// Parameters: pB - pointer to board structure -// -// Returns: True if the transmit mailbox is empty. -// False if it not empty. -// -// Description: -// -// Returns true or false according to whether the transmit mailbox is empty (and -// therefore able to accept more mail) -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -//****************************************************************************** -static int -iiTxMailEmptyIIEX(i2eBordStrPtr pB) -{ - return !(inb(pB->i2eStatus) & STE_OUT_MAIL); -} - -//****************************************************************************** -// Function: iiTrySendMailII(pB,mail) -// Parameters: pB - pointer to board structure -// mail - value to write to mailbox -// -// Returns: True if the transmit mailbox is empty, and mail is sent. -// False if it not empty. -// -// Description: -// -// If outgoing mailbox is empty, sends mail and returns true. If outgoing -// mailbox is not empty, returns false. -// -// This version operates on IntelliPort-II - style FIFO's -// -//****************************************************************************** -static int -iiTrySendMailII(i2eBordStrPtr pB, unsigned char mail) -{ - int port = pB->i2ePointer; - - outb(SEL_OUTMAIL, port); - if (inb(port) == 0) { - outb(SEL_OUTMAIL, port); - outb(mail, port); - return 1; - } - return 0; -} - -//****************************************************************************** -// Function: iiTrySendMailIIEX(pB,mail) -// Parameters: pB - pointer to board structure -// mail - value to write to mailbox -// -// Returns: True if the transmit mailbox is empty, and mail is sent. -// False if it not empty. -// -// Description: -// -// If outgoing mailbox is empty, sends mail and returns true. If outgoing -// mailbox is not empty, returns false. -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -//****************************************************************************** -static int -iiTrySendMailIIEX(i2eBordStrPtr pB, unsigned char mail) -{ - if (inb(pB->i2eStatus) & STE_OUT_MAIL) - return 0; - outb(mail, pB->i2eXMail); - return 1; -} - -//****************************************************************************** -// Function: iiGetMailII(pB,mail) -// Parameters: pB - pointer to board structure -// -// Returns: Mailbox data or NO_MAIL_HERE. -// -// Description: -// -// If no mail available, returns NO_MAIL_HERE otherwise returns the data from -// the mailbox, which is guaranteed != NO_MAIL_HERE. -// -// This version operates on IntelliPort-II - style FIFO's -// -//****************************************************************************** -static unsigned short -iiGetMailII(i2eBordStrPtr pB) -{ - if (I2_HAS_MAIL(pB)) { - outb(SEL_INMAIL, pB->i2ePointer); - return inb(pB->i2ePointer); - } else { - return NO_MAIL_HERE; - } -} - -//****************************************************************************** -// Function: iiGetMailIIEX(pB,mail) -// Parameters: pB - pointer to board structure -// -// Returns: Mailbox data or NO_MAIL_HERE. -// -// Description: -// -// If no mail available, returns NO_MAIL_HERE otherwise returns the data from -// the mailbox, which is guaranteed != NO_MAIL_HERE. -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -//****************************************************************************** -static unsigned short -iiGetMailIIEX(i2eBordStrPtr pB) -{ - if (I2_HAS_MAIL(pB)) - return inb(pB->i2eXMail); - else - return NO_MAIL_HERE; -} - -//****************************************************************************** -// Function: iiEnableMailIrqII(pB) -// Parameters: pB - pointer to board structure -// -// Returns: Nothing -// -// Description: -// -// Enables board to interrupt host (only) by writing to host's in-bound mailbox. -// -// This version operates on IntelliPort-II - style FIFO's -// -//****************************************************************************** -static void -iiEnableMailIrqII(i2eBordStrPtr pB) -{ - outb(SEL_MASK, pB->i2ePointer); - outb(ST_IN_MAIL, pB->i2ePointer); -} - -//****************************************************************************** -// Function: iiEnableMailIrqIIEX(pB) -// Parameters: pB - pointer to board structure -// -// Returns: Nothing -// -// Description: -// -// Enables board to interrupt host (only) by writing to host's in-bound mailbox. -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -//****************************************************************************** -static void -iiEnableMailIrqIIEX(i2eBordStrPtr pB) -{ - outb(MX_IN_MAIL, pB->i2eXMask); -} - -//****************************************************************************** -// Function: iiWriteMaskII(pB) -// Parameters: pB - pointer to board structure -// -// Returns: Nothing -// -// Description: -// -// Writes arbitrary value to the mask register. -// -// This version operates on IntelliPort-II - style FIFO's -// -//****************************************************************************** -static void -iiWriteMaskII(i2eBordStrPtr pB, unsigned char value) -{ - outb(SEL_MASK, pB->i2ePointer); - outb(value, pB->i2ePointer); -} - -//****************************************************************************** -// Function: iiWriteMaskIIEX(pB) -// Parameters: pB - pointer to board structure -// -// Returns: Nothing -// -// Description: -// -// Writes arbitrary value to the mask register. -// -// This version operates on IntelliPort-IIEX - style FIFO's -// -//****************************************************************************** -static void -iiWriteMaskIIEX(i2eBordStrPtr pB, unsigned char value) -{ - outb(value, pB->i2eXMask); -} - -//****************************************************************************** -// Function: iiDownloadBlock(pB, pSource, isStandard) -// Parameters: pB - pointer to board structure -// pSource - loadware block to download -// isStandard - True if "standard" loadware, else false. -// -// Returns: Success or Failure -// -// Description: -// -// Downloads a single block (at pSource)to the board referenced by pB. Caller -// sets isStandard to true/false according to whether the "standard" loadware is -// what's being loaded. The normal process, then, is to perform an iiInitialize -// to the board, then perform some number of iiDownloadBlocks using the returned -// state to determine when download is complete. -// -// Possible return values: (see I2ELLIS.H) -// II_DOWN_BADVALID -// II_DOWN_BADFILE -// II_DOWN_CONTINUING -// II_DOWN_GOOD -// II_DOWN_BAD -// II_DOWN_BADSTATE -// II_DOWN_TIMEOUT -// -// Uses the i2eState and i2eToLoad fields (initialized at iiInitialize) to -// determine whether this is the first block, whether to check for magic -// numbers, how many blocks there are to go... -// -//****************************************************************************** -static int -iiDownloadBlock ( i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard) -{ - int itemp; - int loadedFirst; - - if (pB->i2eValid != I2E_MAGIC) return II_DOWN_BADVALID; - - switch(pB->i2eState) - { - case II_STATE_READY: - - // Loading the first block after reset. Must check the magic number of the - // loadfile, store the number of blocks we expect to load. - if (pSource->e.loadMagic != MAGIC_LOADFILE) - { - return II_DOWN_BADFILE; - } - - // Next we store the total number of blocks to load, including this one. - pB->i2eToLoad = 1 + pSource->e.loadBlocksMore; - - // Set the state, store the version numbers. ('Cause this may have come - // from a file - we might want to report these versions and revisions in - // case of an error! - pB->i2eState = II_STATE_LOADING; - pB->i2eLVersion = pSource->e.loadVersion; - pB->i2eLRevision = pSource->e.loadRevision; - pB->i2eLSub = pSource->e.loadSubRevision; - - // The time and date of compilation is also available but don't bother - // storing it for normal purposes. - loadedFirst = 1; - break; - - case II_STATE_LOADING: - loadedFirst = 0; - break; - - default: - return II_DOWN_BADSTATE; - } - - // Now we must be in the II_STATE_LOADING state, and we assume i2eToLoad - // must be positive still, because otherwise we would have cleaned up last - // time and set the state to II_STATE_LOADED. - if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) { - return II_DOWN_TIMEOUT; - } - - if (!iiWriteBuf(pB, pSource->c, LOADWARE_BLOCK_SIZE)) { - return II_DOWN_BADVALID; - } - - // If we just loaded the first block, wait for the fifo to empty an extra - // long time to allow for any special startup code in the firmware, like - // sending status messages to the LCD's. - - if (loadedFirst) { - if (!iiWaitForTxEmpty(pB, MAX_DLOAD_START_TIME)) { - return II_DOWN_TIMEOUT; - } - } - - // Determine whether this was our last block! - if (--(pB->i2eToLoad)) { - return II_DOWN_CONTINUING; // more to come... - } - - // It WAS our last block: Clean up operations... - // ...Wait for last buffer to drain from the board... - if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) { - return II_DOWN_TIMEOUT; - } - // If there were only a single block written, this would come back - // immediately and be harmless, though not strictly necessary. - itemp = MAX_DLOAD_ACK_TIME/10; - while (--itemp) { - if (I2_HAS_INPUT(pB)) { - switch (inb(pB->i2eData)) { - case LOADWARE_OK: - pB->i2eState = - isStandard ? II_STATE_STDLOADED :II_STATE_LOADED; - - // Some revisions of the bootstrap firmware (e.g. ISA-8 1.0.2) - // will, // if there is a debug port attached, require some - // time to send information to the debug port now. It will do - // this before // executing any of the code we just downloaded. - // It may take up to 700 milliseconds. - if (pB->i2ePom.e.porDiag2 & POR_DEBUG_PORT) { - iiDelay(pB, 700); - } - - return II_DOWN_GOOD; - - case LOADWARE_BAD: - default: - return II_DOWN_BAD; - } - } - - iiDelay(pB, 10); // 10 mS granularity on checking condition - } - - // Drop-through --> timed out waiting for firmware confirmation - - pB->i2eState = II_STATE_BADLOAD; - return II_DOWN_TIMEOUT; -} - -//****************************************************************************** -// Function: iiDownloadAll(pB, pSource, isStandard, size) -// Parameters: pB - pointer to board structure -// pSource - loadware block to download -// isStandard - True if "standard" loadware, else false. -// size - size of data to download (in bytes) -// -// Returns: Success or Failure -// -// Description: -// -// Given a pointer to a board structure, a pointer to the beginning of some -// loadware, whether it is considered the "standard loadware", and the size of -// the array in bytes loads the entire array to the board as loadware. -// -// Assumes the board has been freshly reset and the power-up reset message read. -// (i.e., in II_STATE_READY). Complains if state is bad, or if there seems to be -// too much or too little data to load, or if iiDownloadBlock complains. -//****************************************************************************** -static int -iiDownloadAll(i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard, int size) -{ - int status; - - // We know (from context) board should be ready for the first block of - // download. Complain if not. - if (pB->i2eState != II_STATE_READY) return II_DOWN_BADSTATE; - - while (size > 0) { - size -= LOADWARE_BLOCK_SIZE; // How much data should there be left to - // load after the following operation ? - - // Note we just bump pSource by "one", because its size is actually that - // of an entire block, same as LOADWARE_BLOCK_SIZE. - status = iiDownloadBlock(pB, pSource++, isStandard); - - switch(status) - { - case II_DOWN_GOOD: - return ( (size > 0) ? II_DOWN_OVER : II_DOWN_GOOD); - - case II_DOWN_CONTINUING: - break; - - default: - return status; - } - } - - // We shouldn't drop out: it means "while" caught us with nothing left to - // download, yet the previous DownloadBlock did not return complete. Ergo, - // not enough data to match the size byte in the header. - return II_DOWN_UNDER; -} diff --git a/drivers/staging/tty/ip2/i2ellis.h b/drivers/staging/tty/ip2/i2ellis.h deleted file mode 100644 index fb6df24..0000000 --- a/drivers/staging/tty/ip2/i2ellis.h +++ /dev/null @@ -1,566 +0,0 @@ -/******************************************************************************* -* -* (c) 1999 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Mainline code for the device driver -* -*******************************************************************************/ -//------------------------------------------------------------------------------ -// i2ellis.h -// -// IntelliPort-II and IntelliPort-IIEX -// -// Extremely -// Low -// Level -// Interface -// Services -// -// Structure Definitions and declarations for "ELLIS" service routines found in -// i2ellis.c -// -// These routines are based on properties of the IntelliPort-II and -IIEX -// hardware and bootstrap firmware, and are not sensitive to particular -// conventions of any particular loadware. -// -// Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material -// here and in i2ellis.c is intended to provice a useful, but not required, -// layer of insulation from the hardware specifics. -//------------------------------------------------------------------------------ -#ifndef I2ELLIS_H /* To prevent multiple includes */ -#define I2ELLIS_H 1 -//------------------------------------------------ -// Revision History: -// -// 30 September 1991 MAG First Draft Started -// 12 October 1991 ...continued... -// -// 20 December 1996 AKM Linux version -//------------------------------------------------- - -//---------------------- -// Mandatory Includes: -//---------------------- -#include "ip2types.h" -#include "i2hw.h" // The hardware definitions - -//------------------------------------------ -// STAT_BOXIDS packets -//------------------------------------------ -#define MAX_BOX 4 - -typedef struct _bidStat -{ - unsigned char bid_value[MAX_BOX]; -} bidStat, *bidStatPtr; - -// This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX -// boards, reports the hardware-specific "asynchronous resource register" on -// each expansion box. Boxes not present report 0xff. For -II boards, the first -// element contains 0x80 for 8-port, 0x40 for 4-port boards. - -// Box IDs aka ARR or Async Resource Register (more than you want to know) -// 7 6 5 4 3 2 1 0 -// F F N N L S S S -// ============================= -// F F - Product Family Designator -// =====+++++++++++++++++++++++++++++++ -// 0 0 - Intelliport II EX / ISA-8 -// 1 0 - IntelliServer -// 0 1 - SAC - Port Device (Intelliport III ??? ) -// =====+++++++++++++++++++++++++++++++++++++++ -// N N - Number of Ports -// 0 0 - 8 (eight) -// 0 1 - 4 (four) -// 1 0 - 12 (twelve) -// 1 1 - 16 (sixteen) -// =++++++++++++++++++++++++++++++++++ -// L - LCD Display Module Present -// 0 - No -// 1 - LCD module present -// =========+++++++++++++++++++++++++++++++++++++ -// S S S - Async Signals Supported Designator -// 0 0 0 - 8dss, Mod DCE DB25 Female -// 0 0 1 - 6dss, RJ-45 -// 0 1 0 - RS-232/422 dss, DB25 Female -// 0 1 1 - RS-232/422 dss, separate 232/422 DB25 Female -// 1 0 0 - 6dss, 921.6 I/F with ST654's -// 1 0 1 - RS-423/232 8dss, RJ-45 10Pin -// 1 1 0 - 6dss, Mod DCE DB25 Female -// 1 1 1 - NO BOX PRESENT - -#define FF(c) ((c & 0xC0) >> 6) -#define NN(c) ((c & 0x30) >> 4) -#define L(c) ((c & 0x08) >> 3) -#define SSS(c) (c & 0x07) - -#define BID_HAS_654(x) (SSS(x) == 0x04) -#define BID_NO_BOX 0xff /* no box */ -#define BID_8PORT 0x80 /* IP2-8 port */ -#define BID_4PORT 0x81 /* IP2-4 port */ -#define BID_EXP_MASK 0x30 /* IP2-EX */ -#define BID_EXP_8PORT 0x00 /* 8, */ -#define BID_EXP_4PORT 0x10 /* 4, */ -#define BID_EXP_UNDEF 0x20 /* UNDEF, */ -#define BID_EXP_16PORT 0x30 /* 16, */ -#define BID_LCD_CTRL 0x08 /* LCD Controller */ -#define BID_LCD_NONE 0x00 /* - no controller present */ -#define BID_LCD_PRES 0x08 /* - controller present */ -#define BID_CON_MASK 0x07 /* - connector pinouts */ -#define BID_CON_DB25 0x00 /* - DB-25 F */ -#define BID_CON_RJ45 0x01 /* - rj45 */ - -//------------------------------------------------------------------------------ -// i2eBordStr -// -// This structure contains all the information the ELLIS routines require in -// dealing with a particular board. -//------------------------------------------------------------------------------ -// There are some queues here which are guaranteed to never contain the entry -// for a single channel twice. So they must be slightly larger to allow -// unambiguous full/empty management -// -#define CH_QUEUE_SIZE ABS_MOST_PORTS+2 - -typedef struct _i2eBordStr -{ - porStr i2ePom; // Structure containing the power-on message. - - unsigned short i2ePomSize; - // The number of bytes actually read if - // different from sizeof i2ePom, indicates - // there is an error! - - unsigned short i2eStartMail; - // Contains whatever inbound mailbox data - // present at startup. NO_MAIL_HERE indicates - // nothing was present. No special - // significance as of this writing, but may be - // useful for diagnostic reasons. - - unsigned short i2eValid; - // Indicates validity of the structure; if - // i2eValid == I2E_MAGIC, then we can trust - // the other fields. Some (especially - // initialization) functions are good about - // checking for validity. Many functions do - // not, it being assumed that the larger - // context assures we are using a valid - // i2eBordStrPtr. - - unsigned short i2eError; - // Used for returning an error condition from - // several functions which use i2eBordStrPtr - // as an argument. - - // Accelerators to characterize separate features of a board, derived from a - // number of sources. - - unsigned short i2eFifoSize; - // Always, the size of the FIFO. For - // IntelliPort-II, always the same, for -IIEX - // taken from the Power-On reset message. - - volatile - unsigned short i2eFifoRemains; - // Used during normal operation to indicate a - // lower bound on the amount of data which - // might be in the outbound fifo. - - unsigned char i2eFifoStyle; - // Accelerator which tells which style (-II or - // -IIEX) FIFO we are using. - - unsigned char i2eDataWidth16; - // Accelerator which tells whether we should - // do 8 or 16-bit data transfers. - - unsigned char i2eMaxIrq; - // The highest allowable IRQ, based on the - // slot size. - - // Accelerators for various addresses on the board - int i2eBase; // I/O Address of the Board - int i2eData; // From here data transfers happen - int i2eStatus; // From here status reads happen - int i2ePointer; // (IntelliPort-II: pointer/commands) - int i2eXMail; // (IntelliPOrt-IIEX: mailboxes - int i2eXMask; // (IntelliPort-IIEX: mask write - - //------------------------------------------------------- - // Information presented in a common format across boards - // For each box, bit map of the channels present. Box closest to - // the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable) - // is taken to be box 0. These are derived from product i.d. registers. - - unsigned short i2eChannelMap[ABS_MAX_BOXES]; - - // Same as above, except each is derived from firmware attempting to detect - // the uart presence (by reading a valid GFRCR register). If bits are set in - // i2eChannelMap and not in i2eGoodMap, there is a potential problem. - - unsigned short i2eGoodMap[ABS_MAX_BOXES]; - - // --------------------------- - // For indirect function calls - - // Routine to cause an N-millisecond delay: Patched by the ii2Initialize - // function. - - void (*i2eDelay)(unsigned int); - - // Routine to write N bytes to the board through the FIFO. Returns true if - // all copacetic, otherwise returns false and error is in i2eError field. - // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER. - - int (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int); - - // Routine to read N bytes from the board through the FIFO. Returns true if - // copacetic, otherwise returns false and error in i2eError. - // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER. - - int (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int); - - // Returns a word from FIFO. Will use 2 byte operations if needed. - - unsigned short (*i2eReadWord)(struct _i2eBordStr *); - - // Writes a word to FIFO. Will use 2 byte operations if needed. - - void (*i2eWriteWord)(struct _i2eBordStr *, unsigned short); - - // Waits specified time for the Transmit FIFO to go empty. Returns true if - // ok, otherwise returns false and error in i2eError. - - int (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int); - - // Returns true or false according to whether the outgoing mailbox is empty. - - int (*i2eTxMailEmpty)(struct _i2eBordStr *); - - // Checks whether outgoing mailbox is empty. If so, sends mail and returns - // true. Otherwise returns false. - - int (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char); - - // If no mail available, returns NO_MAIL_HERE, else returns the value in the - // mailbox (guaranteed can't be NO_MAIL_HERE). - - unsigned short (*i2eGetMail)(struct _i2eBordStr *); - - // Enables the board to interrupt the host when it writes to the mailbox. - // Irqs will not occur, however, until the loadware separately enables - // interrupt generation to the host. The standard loadware does this in - // response to a command packet sent by the host. (Also, disables - // any other potential interrupt sources from the board -- other than the - // inbound mailbox). - - void (*i2eEnableMailIrq)(struct _i2eBordStr *); - - // Writes an arbitrary value to the mask register. - - void (*i2eWriteMask)(struct _i2eBordStr *, unsigned char); - - - // State information - - // During downloading, indicates the number of blocks remaining to download - // to the board. - - short i2eToLoad; - - // State of board (see manifests below) (e.g., whether in reset condition, - // whether standard loadware is installed, etc. - - unsigned char i2eState; - - // These three fields are only valid when there is loadware running on the - // board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED ) - - unsigned char i2eLVersion; // Loadware version - unsigned char i2eLRevision; // Loadware revision - unsigned char i2eLSub; // Loadware subrevision - - // Flags which only have meaning in the context of the standard loadware. - // Somewhat violates the layering concept, but there is so little additional - // needed at the board level (while much additional at the channel level), - // that this beats maintaining two different per-board structures. - - // Indicates which IRQ the board has been initialized (from software) to use - // For MicroChannel boards, any value different from IRQ_UNDEFINED means - // that the software command has been sent to enable interrupts (or specify - // they are disabled). Special value: IRQ_UNDEFINED indicates that the - // software command to select the interrupt has not yet been sent, therefore - // (since the standard loadware insists that it be sent before any other - // packets are sent) no other packets should be sent yet. - - unsigned short i2eUsingIrq; - - // This is set when we hit the MB_OUT_STUFFED mailbox, which prevents us - // putting more in the mailbox until an appropriate mailbox message is - // received. - - unsigned char i2eWaitingForEmptyFifo; - - // Any mailbox bits waiting to be sent to the board are OR'ed in here. - - unsigned char i2eOutMailWaiting; - - // The head of any incoming packet is read into here, is then examined and - // we dispatch accordingly. - - unsigned short i2eLeadoffWord[1]; - - // Running counter of interrupts where the mailbox indicated incoming data. - - unsigned short i2eFifoInInts; - - // Running counter of interrupts where the mailbox indicated outgoing data - // had been stripped. - - unsigned short i2eFifoOutInts; - - // If not void, gives the address of a routine to call if fatal board error - // is found (only applies to standard l/w). - - void (*i2eFatalTrap)(struct _i2eBordStr *); - - // Will point to an array of some sort of channel structures (whose format - // is unknown at this level, being a function of what loadware is - // installed and the code configuration (max sizes of buffers, etc.)). - - void *i2eChannelPtr; - - // Set indicates that the board has gone fatal. - - unsigned short i2eFatal; - - // The number of elements pointed to by i2eChannelPtr. - - unsigned short i2eChannelCnt; - - // Ring-buffers of channel structures whose channels have particular needs. - - rwlock_t Fbuf_spinlock; - volatile - unsigned short i2Fbuf_strip; // Strip index - volatile - unsigned short i2Fbuf_stuff; // Stuff index - void *i2Fbuf[CH_QUEUE_SIZE]; // An array of channel pointers - // of channels who need to send - // flow control packets. - rwlock_t Dbuf_spinlock; - volatile - unsigned short i2Dbuf_strip; // Strip index - volatile - unsigned short i2Dbuf_stuff; // Stuff index - void *i2Dbuf[CH_QUEUE_SIZE]; // An array of channel pointers - // of channels who need to send - // data or in-line command packets. - rwlock_t Bbuf_spinlock; - volatile - unsigned short i2Bbuf_strip; // Strip index - volatile - unsigned short i2Bbuf_stuff; // Stuff index - void *i2Bbuf[CH_QUEUE_SIZE]; // An array of channel pointers - // of channels who need to send - // bypass command packets. - - /* - * A set of flags to indicate that certain events have occurred on at least - * one of the ports on this board. We use this to decide whether to spin - * through the channels looking for breaks, etc. - */ - int got_input; - int status_change; - bidStat channelBtypes; - - /* - * Debugging counters, etc. - */ - unsigned long debugFlowQueued; - unsigned long debugInlineQueued; - unsigned long debugDataQueued; - unsigned long debugBypassQueued; - unsigned long debugFlowCount; - unsigned long debugInlineCount; - unsigned long debugBypassCount; - - rwlock_t read_fifo_spinlock; - rwlock_t write_fifo_spinlock; - -// For queuing interrupt bottom half handlers. /\/\|=mhw=|\/\/ - struct work_struct tqueue_interrupt; - - struct timer_list SendPendingTimer; // Used by iiSendPending - unsigned int SendPendingRetry; -} i2eBordStr, *i2eBordStrPtr; - -//------------------------------------------------------------------- -// Macro Definitions for the indirect calls defined in the i2eBordStr -//------------------------------------------------------------------- -// -#define iiDelay(a,b) (*(a)->i2eDelay)(b) -#define iiWriteBuf(a,b,c) (*(a)->i2eWriteBuf)(a,b,c) -#define iiReadBuf(a,b,c) (*(a)->i2eReadBuf)(a,b,c) - -#define iiWriteWord(a,b) (*(a)->i2eWriteWord)(a,b) -#define iiReadWord(a) (*(a)->i2eReadWord)(a) - -#define iiWaitForTxEmpty(a,b) (*(a)->i2eWaitForTxEmpty)(a,b) - -#define iiTxMailEmpty(a) (*(a)->i2eTxMailEmpty)(a) -#define iiTrySendMail(a,b) (*(a)->i2eTrySendMail)(a,b) - -#define iiGetMail(a) (*(a)->i2eGetMail)(a) -#define iiEnableMailIrq(a) (*(a)->i2eEnableMailIrq)(a) -#define iiDisableMailIrq(a) (*(a)->i2eWriteMask)(a,0) -#define iiWriteMask(a,b) (*(a)->i2eWriteMask)(a,b) - -//------------------------------------------- -// Manifests for i2eBordStr: -//------------------------------------------- - -typedef void (*delayFunc_t)(unsigned int); - -// i2eValid -// -#define I2E_MAGIC 0x4251 // Structure is valid. -#define I2E_INCOMPLETE 0x1122 // Structure failed during init. - - -// i2eError -// -#define I2EE_GOOD 0 // Operation successful -#define I2EE_BADADDR 1 // Address out of range -#define I2EE_BADSTATE 2 // Attempt to perform a function when the board - // structure was in the incorrect state -#define I2EE_BADMAGIC 3 // Bad magic number from Power On test (i2ePomSize - // reflects what was read -#define I2EE_PORM_SHORT 4 // Power On message too short -#define I2EE_PORM_LONG 5 // Power On message too long -#define I2EE_BAD_FAMILY 6 // Un-supported board family type -#define I2EE_INCONSIST 7 // Firmware reports something impossible, - // e.g. unexpected number of ports... Almost no - // excuse other than bad FIFO... -#define I2EE_POSTERR 8 // Power-On self test reported a bad error -#define I2EE_BADBUS 9 // Unknown Bus type declared in message -#define I2EE_TXE_TIME 10 // Timed out waiting for TX Fifo to empty -#define I2EE_INVALID 11 // i2eValid field does not indicate a valid and - // complete board structure (for functions which - // require this be so.) -#define I2EE_BAD_PORT 12 // Discrepancy between channels actually found and - // what the product is supposed to have. Check - // i2eGoodMap vs i2eChannelMap for details. -#define I2EE_BAD_IRQ 13 // Someone specified an unsupported IRQ -#define I2EE_NOCHANNELS 14 // No channel structures have been defined (for - // functions requiring this). - -// i2eFifoStyle -// -#define FIFO_II 0 /* IntelliPort-II style: see also i2hw.h */ -#define FIFO_IIEX 1 /* IntelliPort-IIEX style */ - -// i2eGetMail -// -#define NO_MAIL_HERE 0x1111 // Since mail is unsigned char, cannot possibly - // promote to 0x1111. -// i2eState -// -#define II_STATE_COLD 0 // Addresses have been defined, but board not even - // reset yet. -#define II_STATE_RESET 1 // Board,if it exists, has just been reset -#define II_STATE_READY 2 // Board ready for its first block -#define II_STATE_LOADING 3 // Board continuing load -#define II_STATE_LOADED 4 // Board has finished load: status ok -#define II_STATE_BADLOAD 5 // Board has finished load: failed! -#define II_STATE_STDLOADED 6 // Board has finished load: standard firmware - -// i2eUsingIrq -// -#define I2_IRQ_UNDEFINED 0x1352 /* No valid irq (or polling = 0) can - * ever promote to this! */ -//------------------------------------------ -// Handy Macros for i2ellis.c and others -// Note these are common to -II and -IIEX -//------------------------------------------ - -// Given a pointer to the board structure, does the input FIFO have any data or -// not? -// -#define I2_HAS_INPUT(pB) !(inb(pB->i2eStatus) & ST_IN_EMPTY) - -// Given a pointer to the board structure, is there anything in the incoming -// mailbox? -// -#define I2_HAS_MAIL(pB) (inb(pB->i2eStatus) & ST_IN_MAIL) - -#define I2_UPDATE_FIFO_ROOM(pB) ((pB)->i2eFifoRemains = (pB)->i2eFifoSize) - -//------------------------------------------ -// Function Declarations for i2ellis.c -//------------------------------------------ -// -// Functions called directly -// -// Initialization of a board & structure is in four (five!) parts: -// -// 1) iiSetAddress() - Define the board address & delay function for a board. -// 2) iiReset() - Reset the board (provided it exists) -// -- Note you may do this to several boards -- -// 3) iiResetDelay() - Delay for 2 seconds (once for all boards) -// 4) iiInitialize() - Attempt to read Power-up message; further initialize -// accelerators -// -// Then you may use iiDownloadAll() or iiDownloadFile() (in i2file.c) to write -// loadware. To change loadware, you must begin again with step 2, resetting -// the board again (step 1 not needed). - -static int iiSetAddress(i2eBordStrPtr, int, delayFunc_t ); -static int iiReset(i2eBordStrPtr); -static int iiResetDelay(i2eBordStrPtr); -static int iiInitialize(i2eBordStrPtr); - -// Routine to validate that all channels expected are there. -// -extern int iiValidateChannels(i2eBordStrPtr); - -// Routine used to download a block of loadware. -// -static int iiDownloadBlock(i2eBordStrPtr, loadHdrStrPtr, int); - -// Return values given by iiDownloadBlock, iiDownloadAll, iiDownloadFile: -// -#define II_DOWN_BADVALID 0 // board structure is invalid -#define II_DOWN_CONTINUING 1 // So far, so good, firmware expects more -#define II_DOWN_GOOD 2 // Download complete, CRC good -#define II_DOWN_BAD 3 // Download complete, but CRC bad -#define II_DOWN_BADFILE 4 // Bad magic number in loadware file -#define II_DOWN_BADSTATE 5 // Board is in an inappropriate state for - // downloading loadware. (see i2eState) -#define II_DOWN_TIMEOUT 6 // Timeout waiting for firmware -#define II_DOWN_OVER 7 // Too much data -#define II_DOWN_UNDER 8 // Not enough data -#define II_DOWN_NOFILE 9 // Loadware file not found - -// Routine to download an entire loadware module: Return values are a subset of -// iiDownloadBlock's, excluding, of course, II_DOWN_CONTINUING -// -static int iiDownloadAll(i2eBordStrPtr, loadHdrStrPtr, int, int); - -// Many functions defined here return True if good, False otherwise, with an -// error code in i2eError field. Here is a handy macro for setting the error -// code and returning. -// -#define I2_COMPLETE(pB,code) do { \ - pB->i2eError = code; \ - return (code == I2EE_GOOD);\ - } while (0) - -#endif // I2ELLIS_H diff --git a/drivers/staging/tty/ip2/i2hw.h b/drivers/staging/tty/ip2/i2hw.h deleted file mode 100644 index 8df2f48..0000000 --- a/drivers/staging/tty/ip2/i2hw.h +++ /dev/null @@ -1,652 +0,0 @@ -/******************************************************************************* -* -* (c) 1999 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Definitions limited to properties of the hardware or the -* bootstrap firmware. As such, they are applicable regardless of -* operating system or loadware (standard or diagnostic). -* -*******************************************************************************/ -#ifndef I2HW_H -#define I2HW_H 1 -//------------------------------------------------------------------------------ -// Revision History: -// -// 23 September 1991 MAG First Draft Started...through... -// 11 October 1991 ... Continuing development... -// 6 August 1993 Added support for ISA-4 (asic) which is architected -// as an ISA-CEX with a single 4-port box. -// -// 20 December 1996 AKM Version for Linux -// -//------------------------------------------------------------------------------ -/*------------------------------------------------------------------------------ - -HARDWARE DESCRIPTION: - -Introduction: - -The IntelliPort-II and IntelliPort-IIEX products occupy a block of eight (8) -addresses in the host's I/O space. - -Some addresses are used to transfer data to/from the board, some to transfer -so-called "mailbox" messages, and some to read bit-mapped status information. -While all the products in the line are functionally similar, some use a 16-bit -data path to transfer data while others use an 8-bit path. Also, the use of -command /status/mailbox registers differs slightly between the II and IIEX -branches of the family. - -The host determines what type of board it is dealing with by reading a string of -sixteen characters from the board. These characters are always placed in the -fifo by the board's local processor whenever the board is reset (either from -power-on or under software control) and are known as the "Power-on Reset -Message." In order that this message can be read from either type of board, the -hardware registers used in reading this message are the same. Once this message -has been read by the host, then it has the information required to operate. - -General Differences between boards: - -The greatest structural difference is between the -II and -IIEX families of -product. The -II boards use the Am4701 dual 512x8 bidirectional fifo to support -the data path, mailbox registers, and status registers. This chip contains some -features which are not used in the IntelliPort-II products; a description of -these is omitted here. Because of these many features, it contains many -registers, too many to access directly within a small address space. They are -accessed by first writing a value to a "pointer" register. This value selects -the register to be accessed. The next read or write to that address accesses -the selected register rather than the pointer register. - -The -IIEX boards use a proprietary design similar to the Am4701 in function. But -because of a simpler, more streamlined design it doesn't require so many -registers. This means they can be accessed directly in single operations rather -than through a pointer register. - -Besides these differences, there are differences in whether 8-bit or 16-bit -transfers are used to move data to the board. - -The -II boards are capable only of 8-bit data transfers, while the -IIEX boards -may be configured for either 8-bit or 16-bit data transfers. If the on-board DIP -switch #8 is ON, and the card has been installed in a 16-bit slot, 16-bit -transfers are supported (and will be expected by the standard loadware). The -on-board firmware can determine the position of the switch, and whether the -board is installed in a 16-bit slot; it supplies this information to the host as -part of the power-up reset message. - -The configuration switch (#8) and slot selection do not directly configure the -hardware. It is up to the on-board loadware and host-based drivers to act -according to the selected options. That is, loadware and drivers could be -written to perform 8-bit transfers regardless of the state of the DIP switch or -slot (and in a diagnostic environment might well do so). Likewise, 16-bit -transfers could be performed as long as the card is in a 16-bit slot. - -Note the slot selection and DIP switch selection are provided separately: a -board running in 8-bit mode in a 16-bit slot has a greater range of possible -interrupts to choose from; information of potential use to the host. - -All 8-bit data transfers are done in the same way, regardless of whether on a --II board or a -IIEX board. - -The host must consider two things then: 1) whether a -II or -IIEX product is -being used, and 2) whether an 8-bit or 16-bit data path is used. - -A further difference is that -II boards always have a 512-byte fifo operating in -each direction. -IIEX boards may use fifos of varying size; this size is -reported as part of the power-up message. - -I/O Map Of IntelliPort-II and IntelliPort-IIEX boards: -(Relative to the chosen base address) - -Addr R/W IntelliPort-II IntelliPort-IIEX ----- --- -------------- ---------------- -0 R/W Data Port (byte) Data Port (byte or word) -1 R/W (Not used) (MSB of word-wide data written to Data Port) -2 R Status Register Status Register -2 W Pointer Register Interrupt Mask Register -3 R/W (Not used) Mailbox Registers (6 bits: 11111100) -4,5 -- Reserved for future products -6 -- Reserved for future products -7 R Guaranteed to have no effect -7 W Hardware reset of board. - - -Rules: -All data transfers are performed using the even i/o address. If byte-wide data -transfers are being used, do INB/OUTB operations on the data port. If word-wide -transfers are used, do INW/OUTW operations. In some circumstances (such as -reading the power-up message) you will do INB from the data port, but in this -case the MSB of each word read is lost. When accessing all other unreserved -registers, use byte operations only. -------------------------------------------------------------------------------*/ - -//------------------------------------------------ -// Mandatory Includes: -//------------------------------------------------ -// -#include "ip2types.h" - -//------------------------------------------------------------------------- -// Manifests for the I/O map: -//------------------------------------------------------------------------- -// R/W: Data port (byte) for IntelliPort-II, -// R/W: Data port (byte or word) for IntelliPort-IIEX -// Incoming or outgoing data passes through a FIFO, the status of which is -// available in some of the bits in FIFO_STATUS. This (bidirectional) FIFO is -// the primary means of transferring data, commands, flow-control, and status -// information between the host and board. -// -#define FIFO_DATA 0 - -// Another way of passing information between the board and the host is -// through "mailboxes". Unlike a FIFO, a mailbox holds only a single byte of -// data. Writing data to the mailbox causes a status bit to be set, and -// potentially interrupting the intended receiver. The sender has some way to -// determine whether the data has been read yet; as soon as it has, it may send -// more. The mailboxes are handled differently on -II and -IIEX products, as -// suggested below. -//------------------------------------------------------------------------------ -// Read: Status Register for IntelliPort-II or -IIEX -// The presence of any bit set here will cause an interrupt to the host, -// provided the corresponding bit has been unmasked in the interrupt mask -// register. Furthermore, interrupts to the host are disabled globally until the -// loadware selects the irq line to use. With the exception of STN_MR, the bits -// remain set so long as the associated condition is true. -// -#define FIFO_STATUS 2 - -// Bit map of status bits which are identical for -II and -IIEX -// -#define ST_OUT_FULL 0x40 // Outbound FIFO full -#define ST_IN_EMPTY 0x20 // Inbound FIFO empty -#define ST_IN_MAIL 0x04 // Inbound Mailbox full - -// The following exists only on the Intelliport-IIEX, and indicates that the -// board has not read the last outgoing mailbox data yet. In the IntelliPort-II, -// the outgoing mailbox may be read back: a zero indicates the board has read -// the data. -// -#define STE_OUT_MAIL 0x80 // Outbound mailbox full (!) - -// The following bits are defined differently for -II and -IIEX boards. Code -// which relies on these bits will need to be functionally different for the two -// types of boards and should be generally avoided because of the additional -// complexity this creates: - -// Bit map of status bits only on -II - -// Fifo has been RESET (cleared when the status register is read). Note that -// this condition cannot be masked and would always interrupt the host, except -// that the hardware reset also disables interrupts globally from the board -// until re-enabled by loadware. This could also arise from the -// Am4701-supported command to reset the chip, but this command is generally not -// used here. -// -#define STN_MR 0x80 - -// See the AMD Am4701 data sheet for details on the following four bits. They -// are not presently used by Computone drivers. -// -#define STN_OUT_AF 0x10 // Outbound FIFO almost full (programmable) -#define STN_IN_AE 0x08 // Inbound FIFO almost empty (programmable) -#define STN_BD 0x02 // Inbound byte detected -#define STN_PE 0x01 // Parity/Framing condition detected - -// Bit-map of status bits only on -IIEX -// -#define STE_OUT_HF 0x10 // Outbound FIFO half full -#define STE_IN_HF 0x08 // Inbound FIFO half full -#define STE_IN_FULL 0x02 // Inbound FIFO full -#define STE_OUT_MT 0x01 // Outbound FIFO empty - -//------------------------------------------------------------------------------ - -// Intelliport-II -- Write Only: the pointer register. -// Values are written to this register to select the Am4701 internal register to -// be accessed on the next operation. -// -#define FIFO_PTR 0x02 - -// Values for the pointer register -// -#define SEL_COMMAND 0x1 // Selects the Am4701 command register - -// Some possible commands: -// -#define SEL_CMD_MR 0x80 // Am4701 command to reset the chip -#define SEL_CMD_SH 0x40 // Am4701 command to map the "other" port into the - // status register. -#define SEL_CMD_UNSH 0 // Am4701 command to "unshift": port maps into its - // own status register. -#define SEL_MASK 0x2 // Selects the Am4701 interrupt mask register. The - // interrupt mask register is bit-mapped to match - // the status register (FIFO_STATUS) except for - // STN_MR. (See above.) -#define SEL_BYTE_DET 0x3 // Selects the Am4701 byte-detect register. (Not - // normally used except in diagnostics.) -#define SEL_OUTMAIL 0x4 // Selects the outbound mailbox (R/W). Reading back - // a value of zero indicates that the mailbox has - // been read by the board and is available for more - // data./ Writing to the mailbox optionally - // interrupts the board, depending on the loadware's - // setting of its interrupt mask register. -#define SEL_AEAF 0x5 // Selects AE/AF threshold register. -#define SEL_INMAIL 0x6 // Selects the inbound mailbox (Read) - -//------------------------------------------------------------------------------ -// IntelliPort-IIEX -- Write Only: interrupt mask (and misc flags) register: -// Unlike IntelliPort-II, bit assignments do NOT match those of the status -// register. -// -#define FIFO_MASK 0x2 - -// Mailbox readback select: -// If set, reads to FIFO_MAIL will read the OUTBOUND mailbox (host to board). If -// clear (default on reset) reads to FIFO_MAIL will read the INBOUND mailbox. -// This is the normal situation. The clearing of a mailbox is determined on -// -IIEX boards by waiting for the STE_OUT_MAIL bit to clear. Readback -// capability is provided for diagnostic purposes only. -// -#define MX_OUTMAIL_RSEL 0x80 - -#define MX_IN_MAIL 0x40 // Enables interrupts when incoming mailbox goes - // full (ST_IN_MAIL set). -#define MX_IN_FULL 0x20 // Enables interrupts when incoming FIFO goes full - // (STE_IN_FULL). -#define MX_IN_MT 0x08 // Enables interrupts when incoming FIFO goes empty - // (ST_IN_MT). -#define MX_OUT_FULL 0x04 // Enables interrupts when outgoing FIFO goes full - // (ST_OUT_FULL). -#define MX_OUT_MT 0x01 // Enables interrupts when outgoing FIFO goes empty - // (STE_OUT_MT). - -// Any remaining bits are reserved, and should be written to ZERO for -// compatibility with future Computone products. - -//------------------------------------------------------------------------------ -// IntelliPort-IIEX: -- These are only 6-bit mailboxes !!! -- 11111100 (low two -// bits always read back 0). -// Read: One of the mailboxes, usually Inbound. -// Inbound Mailbox (MX_OUTMAIL_RSEL = 0) -// Outbound Mailbox (MX_OUTMAIL_RSEL = 1) -// Write: Outbound Mailbox -// For the IntelliPort-II boards, the outbound mailbox is read back to determine -// whether the board has read the data (0 --> data has been read). For the -// IntelliPort-IIEX, this is done by reading a status register. To determine -// whether mailbox is available for more outbound data, use the STE_OUT_MAIL bit -// in FIFO_STATUS. Moreover, although the Outbound Mailbox can be read back by -// setting MX_OUTMAIL_RSEL, it is NOT cleared when the board reads it, as is the -// case with the -II boards. For this reason, FIFO_MAIL is normally used to read -// the inbound FIFO, and MX_OUTMAIL_RSEL kept clear. (See above for -// MX_OUTMAIL_RSEL description.) -// -#define FIFO_MAIL 0x3 - -//------------------------------------------------------------------------------ -// WRITE ONLY: Resets the board. (Data doesn't matter). -// -#define FIFO_RESET 0x7 - -//------------------------------------------------------------------------------ -// READ ONLY: Will have no effect. (Data is undefined.) -// Actually, there will be an effect, in that the operation is sure to generate -// a bus cycle: viz., an I/O byte Read. This fact can be used to enforce short -// delays when no comparable time constant is available. -// -#define FIFO_NOP 0x7 - -//------------------------------------------------------------------------------ -// RESET & POWER-ON RESET MESSAGE -/*------------------------------------------------------------------------------ -RESET: - -The IntelliPort-II and -IIEX boards are reset in three ways: Power-up, channel -reset, and via a write to the reset register described above. For products using -the ISA bus, these three sources of reset are equvalent. For MCA and EISA buses, -the Power-up and channel reset sources cause additional hardware initialization -which should only occur at system startup time. - -The third type of reset, called a "command reset", is done by writing any data -to the FIFO_RESET address described above. This resets the on-board processor, -FIFO, UARTS, and associated hardware. - -This passes control of the board to the bootstrap firmware, which performs a -Power-On Self Test and which detects its current configuration. For example, --IIEX products determine the size of FIFO which has been installed, and the -number and type of expansion boxes attached. - -This and other information is then written to the FIFO in a 16-byte data block -to be read by the host. This block is guaranteed to be present within two (2) -seconds of having received the command reset. The firmware is now ready to -receive loadware from the host. - -It is good practice to perform a command reset to the board explicitly as part -of your software initialization. This allows your code to properly restart from -a soft boot. (Many systems do not issue channel reset on soft boot). - -Because of a hardware reset problem on some of the Cirrus Logic 1400's which are -used on the product, it is recommended that you reset the board twice, separated -by an approximately 50 milliseconds delay. (VERY approximately: probably ok to -be off by a factor of five. The important point is that the first command reset -in fact generates a reset pulse on the board. This pulse is guaranteed to last -less than 10 milliseconds. The additional delay ensures the 1400 has had the -chance to respond sufficiently to the first reset. Why not a longer delay? Much -more than 50 milliseconds gets to be noticeable, but the board would still work. - -Once all 16 bytes of the Power-on Reset Message have been read, the bootstrap -firmware is ready to receive loadware. - -Note on Power-on Reset Message format: -The various fields have been designed with future expansion in view. -Combinations of bitfields and values have been defined which define products -which may not currently exist. This has been done to allow drivers to anticipate -the possible introduction of products in a systematic fashion. This is not -intended to suggest that each potential product is actually under consideration. -------------------------------------------------------------------------------*/ - -//---------------------------------------- -// Format of Power-on Reset Message -//---------------------------------------- - -typedef union _porStr // "por" stands for Power On Reset -{ - unsigned char c[16]; // array used when considering the message as a - // string of undifferentiated characters - - struct // Elements used when considering values - { - // The first two bytes out of the FIFO are two magic numbers. These are - // intended to establish that there is indeed a member of the - // IntelliPort-II(EX) family present. The remaining bytes may be - // expected // to be valid. When reading the Power-on Reset message, - // if the magic numbers do not match it is probably best to stop - // reading immediately. You are certainly not reading our board (unless - // hardware is faulty), and may in fact be reading some other piece of - // hardware. - - unsigned char porMagic1; // magic number: first byte == POR_MAGIC_1 - unsigned char porMagic2; // magic number: second byte == POR_MAGIC_2 - - // The Version, Revision, and Subrevision are stored as absolute numbers - // and would normally be displayed in the format V.R.S (e.g. 1.0.2) - - unsigned char porVersion; // Bootstrap firmware version number - unsigned char porRevision; // Bootstrap firmware revision number - unsigned char porSubRev; // Bootstrap firmware sub-revision number - - unsigned char porID; // Product ID: Bit-mapped according to - // conventions described below. Among other - // things, this allows us to distinguish - // IntelliPort-II boards from IntelliPort-IIEX - // boards. - - unsigned char porBus; // IntelliPort-II: Unused - // IntelliPort-IIEX: Bus Information: - // Bit-mapped below - - unsigned char porMemory; // On-board DRAM size: in 32k blocks - - // porPorts1 (and porPorts2) are used to determine the ports which are - // available to the board. For non-expandable product, a single number - // is sufficient. For expandable product, the board may be connected - // to as many as four boxes. Each box may be (so far) either a 16-port - // or an 8-port size. Whenever an 8-port box is used, the remaining 8 - // ports leave gaps between existing channels. For that reason, - // expandable products must report a MAP of available channels. Since - // each UART supports four ports, we represent each UART found by a - // single bit. Using two bytes to supply the mapping information we - // report the presence or absence of up to 16 UARTS, or 64 ports in - // steps of 4 ports. For -IIEX products, the ports are numbered - // starting at the box closest to the controller in the "chain". - - // Interpreted Differently for IntelliPort-II and -IIEX. - // -II: Number of ports (Derived actually from product ID). See - // Diag1&2 to indicate if uart was actually detected. - // -IIEX: Bit-map of UARTS found, LSB (see below for MSB of this). This - // bitmap is based on detecting the uarts themselves; - // see porFlags for information from the box i.d's. - unsigned char porPorts1; - - unsigned char porDiag1; // Results of on-board P.O.S.T, 1st byte - unsigned char porDiag2; // Results of on-board P.O.S.T, 2nd byte - unsigned char porSpeed; // Speed of local CPU: given as MHz x10 - // e.g., 16.0 MHz CPU is reported as 160 - unsigned char porFlags; // Misc information (see manifests below) - // Bit-mapped: CPU type, UART's present - - unsigned char porPorts2; // -II: Undefined - // -IIEX: Bit-map of UARTS found, MSB (see - // above for LSB) - - // IntelliPort-II: undefined - // IntelliPort-IIEX: 1 << porFifoSize gives the size, in bytes, of the - // host interface FIFO, in each direction. When running the -IIEX in - // 8-bit mode, fifo capacity is halved. The bootstrap firmware will - // have already accounted for this fact in generating this number. - unsigned char porFifoSize; - - // IntelliPort-II: undefined - // IntelliPort-IIEX: The number of boxes connected. (Presently 1-4) - unsigned char porNumBoxes; - } e; -} porStr, *porStrPtr; - -//-------------------------- -// Values for porStr fields -//-------------------------- - -//--------------------- -// porMagic1, porMagic2 -//---------------------- -// -#define POR_MAGIC_1 0x96 // The only valid value for porMagic1 -#define POR_MAGIC_2 0x35 // The only valid value for porMagic2 -#define POR_1_INDEX 0 // Byte position of POR_MAGIC_1 -#define POR_2_INDEX 1 // Ditto for POR_MAGIC_2 - -//---------------------- -// porID -//---------------------- -// -#define POR_ID_FAMILY 0xc0 // These bits indicate the general family of - // product. -#define POR_ID_FII 0x00 // Family is "IntelliPort-II" -#define POR_ID_FIIEX 0x40 // Family is "IntelliPort-IIEX" - -// These bits are reserved, presently zero. May be used at a later date to -// convey other product information. -// -#define POR_ID_RESERVED 0x3c - -#define POR_ID_SIZE 0x03 // Remaining bits indicate number of ports & - // Connector information. -#define POR_ID_II_8 0x00 // For IntelliPort-II, indicates 8-port using - // standard brick. -#define POR_ID_II_8R 0x01 // For IntelliPort-II, indicates 8-port using - // RJ11's (no CTS) -#define POR_ID_II_6 0x02 // For IntelliPort-II, indicates 6-port using - // RJ45's -#define POR_ID_II_4 0x03 // For IntelliPort-II, indicates 4-port using - // 4xRJ45 connectors -#define POR_ID_EX 0x00 // For IntelliPort-IIEX, indicates standard - // expandable controller (other values reserved) - -//---------------------- -// porBus -//---------------------- - -// IntelliPort-IIEX only: Board is installed in a 16-bit slot -// -#define POR_BUS_SLOT16 0x20 - -// IntelliPort-IIEX only: DIP switch #8 is on, selecting 16-bit host interface -// operation. -// -#define POR_BUS_DIP16 0x10 - -// Bits 0-2 indicate type of bus: This information is stored in the bootstrap -// loadware, different loadware being used on different products for different -// buses. For most situations, the drivers do not need this information; but it -// is handy in a diagnostic environment. For example, on microchannel boards, -// you would not want to try to test several interrupts, only the one for which -// you were configured. -// -#define POR_BUS_TYPE 0x07 - -// Unknown: this product doesn't know what bus it is running in. (e.g. if same -// bootstrap firmware were wanted for two different buses.) -// -#define POR_BUS_T_UNK 0 - -// Note: existing firmware for ISA-8 and MC-8 currently report the POR_BUS_T_UNK -// state, since the same bootstrap firmware is used for each. - -#define POR_BUS_T_MCA 1 // MCA BUS */ -#define POR_BUS_T_EISA 2 // EISA BUS */ -#define POR_BUS_T_ISA 3 // ISA BUS */ - -// Values 4-7 Reserved - -// Remaining bits are reserved - -//---------------------- -// porDiag1 -//---------------------- - -#define POR_BAD_MAPPER 0x80 // HW failure on P.O.S.T: Chip mapper failed - -// These two bits valid only for the IntelliPort-II -// -#define POR_BAD_UART1 0x01 // First 1400 bad -#define POR_BAD_UART2 0x02 // Second 1400 bad - -//---------------------- -// porDiag2 -//---------------------- - -#define POR_DEBUG_PORT 0x80 // debug port was detected by the P.O.S.T -#define POR_DIAG_OK 0x00 // Indicates passage: Failure codes not yet - // available. - // Other bits undefined. -//---------------------- -// porFlags -//---------------------- - -#define POR_CPU 0x03 // These bits indicate supposed CPU type -#define POR_CPU_8 0x01 // Board uses an 80188 (no such thing yet) -#define POR_CPU_6 0x02 // Board uses an 80186 (all existing products) -#define POR_CEX4 0x04 // If set, this is an ISA-CEX/4: An ISA-4 (asic) - // which is architected like an ISA-CEX connected - // to a (hitherto impossible) 4-port box. -#define POR_BOXES 0xf0 // Valid for IntelliPort-IIEX only: Map of Box - // sizes based on box I.D. -#define POR_BOX_16 0x10 // Set indicates 16-port, clear 8-port - -//------------------------------------- -// LOADWARE and DOWNLOADING CODE -//------------------------------------- - -/* -Loadware may be sent to the board in two ways: -1) It may be read from a (binary image) data file block by block as each block - is sent to the board. This is only possible when the initialization is - performed by code which can access your file system. This is most suitable - for diagnostics and appications which use the interface library directly. - -2) It may be hard-coded into your source by including a .h file (typically - supplied by Computone), which declares a data array and initializes every - element. This achieves the same result as if an entire loadware file had - been read into the array. - - This requires more data space in your program, but access to the file system - is not required. This method is more suited to driver code, which typically - is running at a level too low to access the file system directly. - -At present, loadware can only be generated at Computone. - -All Loadware begins with a header area which has a particular format. This -includes a magic number which identifies the file as being (purportedly) -loadware, CRC (for the loader), and version information. -*/ - - -//----------------------------------------------------------------------------- -// Format of loadware block -// -// This is defined as a union so we can pass a pointer to one of these items -// and (if it is the first block) pick out the version information, etc. -// -// Otherwise, to deal with this as a simple character array -//------------------------------------------------------------------------------ - -#define LOADWARE_BLOCK_SIZE 512 // Number of bytes in each block of loadware - -typedef union _loadHdrStr -{ - unsigned char c[LOADWARE_BLOCK_SIZE]; // Valid for every block - - struct // These fields are valid for only the first block of loadware. - { - unsigned char loadMagic; // Magic number: see below - unsigned char loadBlocksMore; // How many more blocks? - unsigned char loadCRC[2]; // Two CRC bytes: used by loader - unsigned char loadVersion; // Version number - unsigned char loadRevision; // Revision number - unsigned char loadSubRevision; // Sub-revision number - unsigned char loadSpares[9]; // Presently unused - unsigned char loadDates[32]; // Null-terminated string which can give - // date and time of compilation - } e; -} loadHdrStr, *loadHdrStrPtr; - -//------------------------------------ -// Defines for downloading code: -//------------------------------------ - -// The loadMagic field in the first block of the loadfile must be this, else the -// file is not valid. -// -#define MAGIC_LOADFILE 0x3c - -// How do we know the load was successful? On completion of the load, the -// bootstrap firmware returns a code to indicate whether it thought the download -// was valid and intends to execute it. These are the only possible valid codes: -// -#define LOADWARE_OK 0xc3 // Download was ok -#define LOADWARE_BAD 0x5a // Download was bad (CRC error) - -// Constants applicable to writing blocks of loadware: -// The first block of loadware might take 600 mS to load, in extreme cases. -// (Expandable board: worst case for sending startup messages to the LCD's). -// The 600mS figure is not really a calculation, but a conservative -// guess/guarantee. Usually this will be within 100 mS, like subsequent blocks. -// -#define MAX_DLOAD_START_TIME 1000 // 1000 mS -#define MAX_DLOAD_READ_TIME 100 // 100 mS - -// Firmware should respond with status (see above) within this long of host -// having sent the final block. -// -#define MAX_DLOAD_ACK_TIME 100 // 100 mS, again! - -//------------------------------------------------------ -// MAXIMUM NUMBER OF PORTS PER BOARD: -// This is fixed for now (with the expandable), but may -// be expanding according to even newer products. -//------------------------------------------------------ -// -#define ABS_MAX_BOXES 4 // Absolute most boxes per board -#define ABS_BIGGEST_BOX 16 // Absolute the most ports per box -#define ABS_MOST_PORTS (ABS_MAX_BOXES * ABS_BIGGEST_BOX) - -#define I2_OUTSW(port, addr, count) outsw((port), (addr), (((count)+1)/2)) -#define I2_OUTSB(port, addr, count) outsb((port), (addr), (((count)+1))&-2) -#define I2_INSW(port, addr, count) insw((port), (addr), (((count)+1)/2)) -#define I2_INSB(port, addr, count) insb((port), (addr), (((count)+1))&-2) - -#endif // I2HW_H - diff --git a/drivers/staging/tty/ip2/i2lib.c b/drivers/staging/tty/ip2/i2lib.c deleted file mode 100644 index 13a3cab..0000000 --- a/drivers/staging/tty/ip2/i2lib.c +++ /dev/null @@ -1,2214 +0,0 @@ -/******************************************************************************* -* -* (c) 1999 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport -* serial I/O controllers. -* -* DESCRIPTION: High-level interface code for the device driver. Uses the -* Extremely Low Level Interface Support (i2ellis.c). Provides an -* interface to the standard loadware, to support drivers or -* application code. (This is included source code, not a separate -* compilation module.) -* -*******************************************************************************/ -//------------------------------------------------------------------------------ -// Note on Strategy: -// Once the board has been initialized, it will interrupt us when: -// 1) It has something in the fifo for us to read (incoming data, flow control -// packets, or whatever). -// 2) It has stripped whatever we have sent last time in the FIFO (and -// consequently is ready for more). -// -// Note also that the buffer sizes declared in i2lib.h are VERY SMALL. This -// worsens performance considerably, but is done so that a great many channels -// might use only a little memory. -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Revision History: -// -// 0.00 - 4/16/91 --- First Draft -// 0.01 - 4/29/91 --- 1st beta release -// 0.02 - 6/14/91 --- Changes to allow small model compilation -// 0.03 - 6/17/91 MAG Break reporting protected from interrupts routines with -// in-line asm added for moving data to/from ring buffers, -// replacing a variety of methods used previously. -// 0.04 - 6/21/91 MAG Initial flow-control packets not queued until -// i2_enable_interrupts time. Former versions would enqueue -// them at i2_init_channel time, before we knew how many -// channels were supposed to exist! -// 0.05 - 10/12/91 MAG Major changes: works through the ellis.c routines now; -// supports new 16-bit protocol and expandable boards. -// - 10/24/91 MAG Most changes in place and stable. -// 0.06 - 2/20/92 MAG Format of CMD_HOTACK corrected: the command takes no -// argument. -// 0.07 -- 3/11/92 MAG Support added to store special packet types at interrupt -// level (mostly responses to specific commands.) -// 0.08 -- 3/30/92 MAG Support added for STAT_MODEM packet -// 0.09 -- 6/24/93 MAG i2Link... needed to update number of boards BEFORE -// turning on the interrupt. -// 0.10 -- 6/25/93 MAG To avoid gruesome death from a bad board, we sanity check -// some incoming. -// -// 1.1 - 12/25/96 AKM Linux version. -// - 10/09/98 DMC Revised Linux version. -//------------------------------------------------------------------------------ - -//************ -//* Includes * -//************ - -#include -#include "i2lib.h" - - -//*********************** -//* Function Prototypes * -//*********************** -static void i2QueueNeeds(i2eBordStrPtr, i2ChanStrPtr, int); -static i2ChanStrPtr i2DeQueueNeeds(i2eBordStrPtr, int ); -static void i2StripFifo(i2eBordStrPtr); -static void i2StuffFifoBypass(i2eBordStrPtr); -static void i2StuffFifoFlow(i2eBordStrPtr); -static void i2StuffFifoInline(i2eBordStrPtr); -static int i2RetryFlushOutput(i2ChanStrPtr); - -// Not a documented part of the library routines (careful...) but the Diagnostic -// i2diag.c finds them useful to help the throughput in certain limited -// single-threaded operations. -static void iiSendPendingMail(i2eBordStrPtr); -static void serviceOutgoingFifo(i2eBordStrPtr); - -// Functions defined in ip2.c as part of interrupt handling -static void do_input(struct work_struct *); -static void do_status(struct work_struct *); - -//*************** -//* Debug Data * -//*************** -#ifdef DEBUG_FIFO - -unsigned char DBGBuf[0x4000]; -unsigned short I = 0; - -static void -WriteDBGBuf(char *s, unsigned char *src, unsigned short n ) -{ - char *p = src; - - // XXX: We need a spin lock here if we ever use this again - - while (*s) { // copy label - DBGBuf[I] = *s++; - I = I++ & 0x3fff; - } - while (n--) { // copy data - DBGBuf[I] = *p++; - I = I++ & 0x3fff; - } -} - -static void -fatality(i2eBordStrPtr pB ) -{ - int i; - - for (i=0;i= ' ' && DBGBuf[i] <= '~') { - printk(" %c ",DBGBuf[i]); - } else { - printk(" . "); - } - } - printk("\n"); - printk("Last index %x\n",I); -} -#endif /* DEBUG_FIFO */ - -//******** -//* Code * -//******** - -static inline int -i2Validate ( i2ChanStrPtr pCh ) -{ - //ip2trace(pCh->port_index, ITRC_VERIFY,ITRC_ENTER,2,pCh->validity, - // (CHANNEL_MAGIC | CHANNEL_SUPPORT)); - return ((pCh->validity & (CHANNEL_MAGIC_BITS | CHANNEL_SUPPORT)) - == (CHANNEL_MAGIC | CHANNEL_SUPPORT)); -} - -static void iiSendPendingMail_t(unsigned long data) -{ - i2eBordStrPtr pB = (i2eBordStrPtr)data; - - iiSendPendingMail(pB); -} - -//****************************************************************************** -// Function: iiSendPendingMail(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// If any outgoing mail bits are set and there is outgoing mailbox is empty, -// send the mail and clear the bits. -//****************************************************************************** -static void -iiSendPendingMail(i2eBordStrPtr pB) -{ - if (pB->i2eOutMailWaiting && (!pB->i2eWaitingForEmptyFifo) ) - { - if (iiTrySendMail(pB, pB->i2eOutMailWaiting)) - { - /* If we were already waiting for fifo to empty, - * or just sent MB_OUT_STUFFED, then we are - * still waiting for it to empty, until we should - * receive an MB_IN_STRIPPED from the board. - */ - pB->i2eWaitingForEmptyFifo |= - (pB->i2eOutMailWaiting & MB_OUT_STUFFED); - pB->i2eOutMailWaiting = 0; - pB->SendPendingRetry = 0; - } else { -/* The only time we hit this area is when "iiTrySendMail" has - failed. That only occurs when the outbound mailbox is - still busy with the last message. We take a short breather - to let the board catch up with itself and then try again. - 16 Retries is the limit - then we got a borked board. - /\/\|=mhw=|\/\/ */ - - if( ++pB->SendPendingRetry < 16 ) { - setup_timer(&pB->SendPendingTimer, - iiSendPendingMail_t, (unsigned long)pB); - mod_timer(&pB->SendPendingTimer, jiffies + 1); - } else { - printk( KERN_ERR "IP2: iiSendPendingMail unable to queue outbound mail\n" ); - } - } - } -} - -//****************************************************************************** -// Function: i2InitChannels(pB, nChannels, pCh) -// Parameters: Pointer to Ellis Board structure -// Number of channels to initialize -// Pointer to first element in an array of channel structures -// Returns: Success or failure -// -// Description: -// -// This function patches pointers, back-pointers, and initializes all the -// elements in the channel structure array. -// -// This should be run after the board structure is initialized, through having -// loaded the standard loadware (otherwise it complains). -// -// In any case, it must be done before any serious work begins initializing the -// irq's or sending commands... -// -//****************************************************************************** -static int -i2InitChannels ( i2eBordStrPtr pB, int nChannels, i2ChanStrPtr pCh) -{ - int index, stuffIndex; - i2ChanStrPtr *ppCh; - - if (pB->i2eValid != I2E_MAGIC) { - I2_COMPLETE(pB, I2EE_BADMAGIC); - } - if (pB->i2eState != II_STATE_STDLOADED) { - I2_COMPLETE(pB, I2EE_BADSTATE); - } - - rwlock_init(&pB->read_fifo_spinlock); - rwlock_init(&pB->write_fifo_spinlock); - rwlock_init(&pB->Dbuf_spinlock); - rwlock_init(&pB->Bbuf_spinlock); - rwlock_init(&pB->Fbuf_spinlock); - - // NO LOCK needed yet - this is init - - pB->i2eChannelPtr = pCh; - pB->i2eChannelCnt = nChannels; - - pB->i2Fbuf_strip = pB->i2Fbuf_stuff = 0; - pB->i2Dbuf_strip = pB->i2Dbuf_stuff = 0; - pB->i2Bbuf_strip = pB->i2Bbuf_stuff = 0; - - pB->SendPendingRetry = 0; - - memset ( pCh, 0, sizeof (i2ChanStr) * nChannels ); - - for (index = stuffIndex = 0, ppCh = (i2ChanStrPtr *)(pB->i2Fbuf); - nChannels && index < ABS_MOST_PORTS; - index++) - { - if ( !(pB->i2eChannelMap[index >> 4] & (1 << (index & 0xf)) ) ) { - continue; - } - rwlock_init(&pCh->Ibuf_spinlock); - rwlock_init(&pCh->Obuf_spinlock); - rwlock_init(&pCh->Cbuf_spinlock); - rwlock_init(&pCh->Pbuf_spinlock); - // NO LOCK needed yet - this is init - // Set up validity flag according to support level - if (pB->i2eGoodMap[index >> 4] & (1 << (index & 0xf)) ) { - pCh->validity = CHANNEL_MAGIC | CHANNEL_SUPPORT; - } else { - pCh->validity = CHANNEL_MAGIC; - } - pCh->pMyBord = pB; /* Back-pointer */ - - // Prepare an outgoing flow-control packet to send as soon as the chance - // occurs. - if ( pCh->validity & CHANNEL_SUPPORT ) { - pCh->infl.hd.i2sChannel = index; - pCh->infl.hd.i2sCount = 5; - pCh->infl.hd.i2sType = PTYPE_BYPASS; - pCh->infl.fcmd = 37; - pCh->infl.asof = 0; - pCh->infl.room = IBUF_SIZE - 1; - - pCh->whenSendFlow = (IBUF_SIZE/5)*4; // when 80% full - - // The following is similar to calling i2QueueNeeds, except that this - // is done in longhand, since we are setting up initial conditions on - // many channels at once. - pCh->channelNeeds = NEED_FLOW; // Since starting from scratch - pCh->sinceLastFlow = 0; // No bytes received since last flow - // control packet was queued - stuffIndex++; - *ppCh++ = pCh; // List this channel as needing - // initial flow control packet sent - } - - // Don't allow anything to be sent until the status packets come in from - // the board. - - pCh->outfl.asof = 0; - pCh->outfl.room = 0; - - // Initialize all the ring buffers - - pCh->Ibuf_stuff = pCh->Ibuf_strip = 0; - pCh->Obuf_stuff = pCh->Obuf_strip = 0; - pCh->Cbuf_stuff = pCh->Cbuf_strip = 0; - - memset( &pCh->icount, 0, sizeof (struct async_icount) ); - pCh->hotKeyIn = HOT_CLEAR; - pCh->channelOptions = 0; - pCh->bookMarks = 0; - init_waitqueue_head(&pCh->pBookmarkWait); - - init_waitqueue_head(&pCh->open_wait); - init_waitqueue_head(&pCh->close_wait); - init_waitqueue_head(&pCh->delta_msr_wait); - - // Set base and divisor so default custom rate is 9600 - pCh->BaudBase = 921600; // MAX for ST654, changed after we get - pCh->BaudDivisor = 96; // the boxids (UART types) later - - pCh->dataSetIn = 0; - pCh->dataSetOut = 0; - - pCh->wopen = 0; - pCh->throttled = 0; - - pCh->speed = CBR_9600; - - pCh->flags = 0; - - pCh->ClosingDelay = 5*HZ/10; - pCh->ClosingWaitTime = 30*HZ; - - // Initialize task queue objects - INIT_WORK(&pCh->tqueue_input, do_input); - INIT_WORK(&pCh->tqueue_status, do_status); - -#ifdef IP2DEBUG_TRACE - pCh->trace = ip2trace; -#endif - - ++pCh; - --nChannels; - } - // No need to check for wrap here; this is initialization. - pB->i2Fbuf_stuff = stuffIndex; - I2_COMPLETE(pB, I2EE_GOOD); - -} - -//****************************************************************************** -// Function: i2DeQueueNeeds(pB, type) -// Parameters: Pointer to a board structure -// type bit map: may include NEED_INLINE, NEED_BYPASS, or NEED_FLOW -// Returns: -// Pointer to a channel structure -// -// Description: Returns pointer struct of next channel that needs service of -// the type specified. Otherwise returns a NULL reference. -// -//****************************************************************************** -static i2ChanStrPtr -i2DeQueueNeeds(i2eBordStrPtr pB, int type) -{ - unsigned short queueIndex; - unsigned long flags; - - i2ChanStrPtr pCh = NULL; - - switch(type) { - - case NEED_INLINE: - - write_lock_irqsave(&pB->Dbuf_spinlock, flags); - if ( pB->i2Dbuf_stuff != pB->i2Dbuf_strip) - { - queueIndex = pB->i2Dbuf_strip; - pCh = pB->i2Dbuf[queueIndex]; - queueIndex++; - if (queueIndex >= CH_QUEUE_SIZE) { - queueIndex = 0; - } - pB->i2Dbuf_strip = queueIndex; - pCh->channelNeeds &= ~NEED_INLINE; - } - write_unlock_irqrestore(&pB->Dbuf_spinlock, flags); - break; - - case NEED_BYPASS: - - write_lock_irqsave(&pB->Bbuf_spinlock, flags); - if (pB->i2Bbuf_stuff != pB->i2Bbuf_strip) - { - queueIndex = pB->i2Bbuf_strip; - pCh = pB->i2Bbuf[queueIndex]; - queueIndex++; - if (queueIndex >= CH_QUEUE_SIZE) { - queueIndex = 0; - } - pB->i2Bbuf_strip = queueIndex; - pCh->channelNeeds &= ~NEED_BYPASS; - } - write_unlock_irqrestore(&pB->Bbuf_spinlock, flags); - break; - - case NEED_FLOW: - - write_lock_irqsave(&pB->Fbuf_spinlock, flags); - if (pB->i2Fbuf_stuff != pB->i2Fbuf_strip) - { - queueIndex = pB->i2Fbuf_strip; - pCh = pB->i2Fbuf[queueIndex]; - queueIndex++; - if (queueIndex >= CH_QUEUE_SIZE) { - queueIndex = 0; - } - pB->i2Fbuf_strip = queueIndex; - pCh->channelNeeds &= ~NEED_FLOW; - } - write_unlock_irqrestore(&pB->Fbuf_spinlock, flags); - break; - default: - printk(KERN_ERR "i2DeQueueNeeds called with bad type:%x\n",type); - break; - } - return pCh; -} - -//****************************************************************************** -// Function: i2QueueNeeds(pB, pCh, type) -// Parameters: Pointer to a board structure -// Pointer to a channel structure -// type bit map: may include NEED_INLINE, NEED_BYPASS, or NEED_FLOW -// Returns: Nothing -// -// Description: -// For each type of need selected, if the given channel is not already in the -// queue, adds it, and sets the flag indicating it is in the queue. -//****************************************************************************** -static void -i2QueueNeeds(i2eBordStrPtr pB, i2ChanStrPtr pCh, int type) -{ - unsigned short queueIndex; - unsigned long flags; - - // We turn off all the interrupts during this brief process, since the - // interrupt-level code might want to put things on the queue as well. - - switch (type) { - - case NEED_INLINE: - - write_lock_irqsave(&pB->Dbuf_spinlock, flags); - if ( !(pCh->channelNeeds & NEED_INLINE) ) - { - pCh->channelNeeds |= NEED_INLINE; - queueIndex = pB->i2Dbuf_stuff; - pB->i2Dbuf[queueIndex++] = pCh; - if (queueIndex >= CH_QUEUE_SIZE) - queueIndex = 0; - pB->i2Dbuf_stuff = queueIndex; - } - write_unlock_irqrestore(&pB->Dbuf_spinlock, flags); - break; - - case NEED_BYPASS: - - write_lock_irqsave(&pB->Bbuf_spinlock, flags); - if ((type & NEED_BYPASS) && !(pCh->channelNeeds & NEED_BYPASS)) - { - pCh->channelNeeds |= NEED_BYPASS; - queueIndex = pB->i2Bbuf_stuff; - pB->i2Bbuf[queueIndex++] = pCh; - if (queueIndex >= CH_QUEUE_SIZE) - queueIndex = 0; - pB->i2Bbuf_stuff = queueIndex; - } - write_unlock_irqrestore(&pB->Bbuf_spinlock, flags); - break; - - case NEED_FLOW: - - write_lock_irqsave(&pB->Fbuf_spinlock, flags); - if ((type & NEED_FLOW) && !(pCh->channelNeeds & NEED_FLOW)) - { - pCh->channelNeeds |= NEED_FLOW; - queueIndex = pB->i2Fbuf_stuff; - pB->i2Fbuf[queueIndex++] = pCh; - if (queueIndex >= CH_QUEUE_SIZE) - queueIndex = 0; - pB->i2Fbuf_stuff = queueIndex; - } - write_unlock_irqrestore(&pB->Fbuf_spinlock, flags); - break; - - case NEED_CREDIT: - pCh->channelNeeds |= NEED_CREDIT; - break; - default: - printk(KERN_ERR "i2QueueNeeds called with bad type:%x\n",type); - break; - } - return; -} - -//****************************************************************************** -// Function: i2QueueCommands(type, pCh, timeout, nCommands, pCs,...) -// Parameters: type - PTYPE_BYPASS or PTYPE_INLINE -// pointer to the channel structure -// maximum period to wait -// number of commands (n) -// n commands -// Returns: Number of commands sent, or -1 for error -// -// get board lock before calling -// -// Description: -// Queues up some commands to be sent to a channel. To send possibly several -// bypass or inline commands to the given channel. The timeout parameter -// indicates how many HUNDREDTHS OF SECONDS to wait until there is room: -// 0 = return immediately if no room, -ive = wait forever, +ive = number of -// 1/100 seconds to wait. Return values: -// -1 Some kind of nasty error: bad channel structure or invalid arguments. -// 0 No room to send all the commands -// (+) Number of commands sent -//****************************************************************************** -static int -i2QueueCommands(int type, i2ChanStrPtr pCh, int timeout, int nCommands, - cmdSyntaxPtr pCs0,...) -{ - int totalsize = 0; - int blocksize; - int lastended; - cmdSyntaxPtr *ppCs; - cmdSyntaxPtr pCs; - int count; - int flag; - i2eBordStrPtr pB; - - unsigned short maxBlock; - unsigned short maxBuff; - short bufroom; - unsigned short stuffIndex; - unsigned char *pBuf; - unsigned char *pInsert; - unsigned char *pDest, *pSource; - unsigned short channel; - int cnt; - unsigned long flags = 0; - rwlock_t *lock_var_p = NULL; - - // Make sure the channel exists, otherwise do nothing - if ( !i2Validate ( pCh ) ) { - return -1; - } - - ip2trace (CHANN, ITRC_QUEUE, ITRC_ENTER, 0 ); - - pB = pCh->pMyBord; - - // Board must also exist, and THE INTERRUPT COMMAND ALREADY SENT - if (pB->i2eValid != I2E_MAGIC || pB->i2eUsingIrq == I2_IRQ_UNDEFINED) - return -2; - // If the board has gone fatal, return bad, and also hit the trap routine if - // it exists. - if (pB->i2eFatal) { - if ( pB->i2eFatalTrap ) { - (*(pB)->i2eFatalTrap)(pB); - } - return -3; - } - // Set up some variables, Which buffers are we using? How big are they? - switch(type) - { - case PTYPE_INLINE: - flag = INL; - maxBlock = MAX_OBUF_BLOCK; - maxBuff = OBUF_SIZE; - pBuf = pCh->Obuf; - break; - case PTYPE_BYPASS: - flag = BYP; - maxBlock = MAX_CBUF_BLOCK; - maxBuff = CBUF_SIZE; - pBuf = pCh->Cbuf; - break; - default: - return -4; - } - // Determine the total size required for all the commands - totalsize = blocksize = sizeof(i2CmdHeader); - lastended = 0; - ppCs = &pCs0; - for ( count = nCommands; count; count--, ppCs++) - { - pCs = *ppCs; - cnt = pCs->length; - // Will a new block be needed for this one? - // Two possible reasons: too - // big or previous command has to be at the end of a packet. - if ((blocksize + cnt > maxBlock) || lastended) { - blocksize = sizeof(i2CmdHeader); - totalsize += sizeof(i2CmdHeader); - } - totalsize += cnt; - blocksize += cnt; - - // If this command had to end a block, then we will make sure to - // account for it should there be any more blocks. - lastended = pCs->flags & END; - } - for (;;) { - // Make sure any pending flush commands go out before we add more data. - if ( !( pCh->flush_flags && i2RetryFlushOutput( pCh ) ) ) { - // How much room (this time through) ? - switch(type) { - case PTYPE_INLINE: - lock_var_p = &pCh->Obuf_spinlock; - write_lock_irqsave(lock_var_p, flags); - stuffIndex = pCh->Obuf_stuff; - bufroom = pCh->Obuf_strip - stuffIndex; - break; - case PTYPE_BYPASS: - lock_var_p = &pCh->Cbuf_spinlock; - write_lock_irqsave(lock_var_p, flags); - stuffIndex = pCh->Cbuf_stuff; - bufroom = pCh->Cbuf_strip - stuffIndex; - break; - default: - return -5; - } - if (--bufroom < 0) { - bufroom += maxBuff; - } - - ip2trace (CHANN, ITRC_QUEUE, 2, 1, bufroom ); - - // Check for overflow - if (totalsize <= bufroom) { - // Normal Expected path - We still hold LOCK - break; /* from for()- Enough room: goto proceed */ - } - ip2trace(CHANN, ITRC_QUEUE, 3, 1, totalsize); - write_unlock_irqrestore(lock_var_p, flags); - } else - ip2trace(CHANN, ITRC_QUEUE, 3, 1, totalsize); - - /* Prepare to wait for buffers to empty */ - serviceOutgoingFifo(pB); // Dump what we got - - if (timeout == 0) { - return 0; // Tired of waiting - } - if (timeout > 0) - timeout--; // So negative values == forever - - if (!in_interrupt()) { - schedule_timeout_interruptible(1); // short nap - } else { - // we cannot sched/sleep in interrupt silly - return 0; - } - if (signal_pending(current)) { - return 0; // Wake up! Time to die!!! - } - - ip2trace (CHANN, ITRC_QUEUE, 4, 0 ); - - } // end of for(;;) - - // At this point we have room and the lock - stick them in. - channel = pCh->infl.hd.i2sChannel; - pInsert = &pBuf[stuffIndex]; // Pointer to start of packet - pDest = CMD_OF(pInsert); // Pointer to start of command - - // When we start counting, the block is the size of the header - for (blocksize = sizeof(i2CmdHeader), count = nCommands, - lastended = 0, ppCs = &pCs0; - count; - count--, ppCs++) - { - pCs = *ppCs; // Points to command protocol structure - - // If this is a bookmark request command, post the fact that a bookmark - // request is pending. NOTE THIS TRICK ONLY WORKS BECAUSE CMD_BMARK_REQ - // has no parameters! The more general solution would be to reference - // pCs->cmd[0]. - if (pCs == CMD_BMARK_REQ) { - pCh->bookMarks++; - - ip2trace (CHANN, ITRC_DRAIN, 30, 1, pCh->bookMarks ); - - } - cnt = pCs->length; - - // If this command would put us over the maximum block size or - // if the last command had to be at the end of a block, we end - // the existing block here and start a new one. - if ((blocksize + cnt > maxBlock) || lastended) { - - ip2trace (CHANN, ITRC_QUEUE, 5, 0 ); - - PTYPE_OF(pInsert) = type; - CHANNEL_OF(pInsert) = channel; - // count here does not include the header - CMD_COUNT_OF(pInsert) = blocksize - sizeof(i2CmdHeader); - stuffIndex += blocksize; - if(stuffIndex >= maxBuff) { - stuffIndex = 0; - pInsert = pBuf; - } - pInsert = &pBuf[stuffIndex]; // Pointer to start of next pkt - pDest = CMD_OF(pInsert); - blocksize = sizeof(i2CmdHeader); - } - // Now we know there is room for this one in the current block - - blocksize += cnt; // Total bytes in this command - pSource = pCs->cmd; // Copy the command into the buffer - while (cnt--) { - *pDest++ = *pSource++; - } - // If this command had to end a block, then we will make sure to account - // for it should there be any more blocks. - lastended = pCs->flags & END; - } // end for - // Clean up the final block by writing header, etc - - PTYPE_OF(pInsert) = type; - CHANNEL_OF(pInsert) = channel; - // count here does not include the header - CMD_COUNT_OF(pInsert) = blocksize - sizeof(i2CmdHeader); - stuffIndex += blocksize; - if(stuffIndex >= maxBuff) { - stuffIndex = 0; - pInsert = pBuf; - } - // Updates the index, and post the need for service. When adding these to - // the queue of channels, we turn off the interrupt while doing so, - // because at interrupt level we might want to push a channel back to the - // end of the queue. - switch(type) - { - case PTYPE_INLINE: - pCh->Obuf_stuff = stuffIndex; // Store buffer pointer - write_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - - pB->debugInlineQueued++; - // Add the channel pointer to list of channels needing service (first - // come...), if it's not already there. - i2QueueNeeds(pB, pCh, NEED_INLINE); - break; - - case PTYPE_BYPASS: - pCh->Cbuf_stuff = stuffIndex; // Store buffer pointer - write_unlock_irqrestore(&pCh->Cbuf_spinlock, flags); - - pB->debugBypassQueued++; - // Add the channel pointer to list of channels needing service (first - // come...), if it's not already there. - i2QueueNeeds(pB, pCh, NEED_BYPASS); - break; - } - - ip2trace (CHANN, ITRC_QUEUE, ITRC_RETURN, 1, nCommands ); - - return nCommands; // Good status: number of commands sent -} - -//****************************************************************************** -// Function: i2GetStatus(pCh,resetBits) -// Parameters: Pointer to a channel structure -// Bit map of status bits to clear -// Returns: Bit map of current status bits -// -// Description: -// Returns the state of data set signals, and whether a break has been received, -// (see i2lib.h for bit-mapped result). resetBits is a bit-map of any status -// bits to be cleared: I2_BRK, I2_PAR, I2_FRA, I2_OVR,... These are cleared -// AFTER the condition is passed. If pCh does not point to a valid channel, -// returns -1 (which would be impossible otherwise. -//****************************************************************************** -static int -i2GetStatus(i2ChanStrPtr pCh, int resetBits) -{ - unsigned short status; - i2eBordStrPtr pB; - - ip2trace (CHANN, ITRC_STATUS, ITRC_ENTER, 2, pCh->dataSetIn, resetBits ); - - // Make sure the channel exists, otherwise do nothing */ - if ( !i2Validate ( pCh ) ) - return -1; - - pB = pCh->pMyBord; - - status = pCh->dataSetIn; - - // Clear any specified error bits: but note that only actual error bits can - // be cleared, regardless of the value passed. - if (resetBits) - { - pCh->dataSetIn &= ~(resetBits & (I2_BRK | I2_PAR | I2_FRA | I2_OVR)); - pCh->dataSetIn &= ~(I2_DDCD | I2_DCTS | I2_DDSR | I2_DRI); - } - - ip2trace (CHANN, ITRC_STATUS, ITRC_RETURN, 1, pCh->dataSetIn ); - - return status; -} - -//****************************************************************************** -// Function: i2Input(pChpDest,count) -// Parameters: Pointer to a channel structure -// Pointer to data buffer -// Number of bytes to read -// Returns: Number of bytes read, or -1 for error -// -// Description: -// Strips data from the input buffer and writes it to pDest. If there is a -// colossal blunder, (invalid structure pointers or the like), returns -1. -// Otherwise, returns the number of bytes read. -//****************************************************************************** -static int -i2Input(i2ChanStrPtr pCh) -{ - int amountToMove; - unsigned short stripIndex; - int count; - unsigned long flags = 0; - - ip2trace (CHANN, ITRC_INPUT, ITRC_ENTER, 0); - - // Ensure channel structure seems real - if ( !i2Validate( pCh ) ) { - count = -1; - goto i2Input_exit; - } - write_lock_irqsave(&pCh->Ibuf_spinlock, flags); - - // initialize some accelerators and private copies - stripIndex = pCh->Ibuf_strip; - - count = pCh->Ibuf_stuff - stripIndex; - - // If buffer is empty or requested data count was 0, (trivial case) return - // without any further thought. - if ( count == 0 ) { - write_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - goto i2Input_exit; - } - // Adjust for buffer wrap - if ( count < 0 ) { - count += IBUF_SIZE; - } - // Don't give more than can be taken by the line discipline - amountToMove = pCh->pTTY->receive_room; - if (count > amountToMove) { - count = amountToMove; - } - // How much could we copy without a wrap? - amountToMove = IBUF_SIZE - stripIndex; - - if (amountToMove > count) { - amountToMove = count; - } - // Move the first block - pCh->pTTY->ldisc->ops->receive_buf( pCh->pTTY, - &(pCh->Ibuf[stripIndex]), NULL, amountToMove ); - // If we needed to wrap, do the second data move - if (count > amountToMove) { - pCh->pTTY->ldisc->ops->receive_buf( pCh->pTTY, - pCh->Ibuf, NULL, count - amountToMove ); - } - // Bump and wrap the stripIndex all at once by the amount of data read. This - // method is good regardless of whether the data was in one or two pieces. - stripIndex += count; - if (stripIndex >= IBUF_SIZE) { - stripIndex -= IBUF_SIZE; - } - pCh->Ibuf_strip = stripIndex; - - // Update our flow control information and possibly queue ourselves to send - // it, depending on how much data has been stripped since the last time a - // packet was sent. - pCh->infl.asof += count; - - if ((pCh->sinceLastFlow += count) >= pCh->whenSendFlow) { - pCh->sinceLastFlow -= pCh->whenSendFlow; - write_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - i2QueueNeeds(pCh->pMyBord, pCh, NEED_FLOW); - } else { - write_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - } - -i2Input_exit: - - ip2trace (CHANN, ITRC_INPUT, ITRC_RETURN, 1, count); - - return count; -} - -//****************************************************************************** -// Function: i2InputFlush(pCh) -// Parameters: Pointer to a channel structure -// Returns: Number of bytes stripped, or -1 for error -// -// Description: -// Strips any data from the input buffer. If there is a colossal blunder, -// (invalid structure pointers or the like), returns -1. Otherwise, returns the -// number of bytes stripped. -//****************************************************************************** -static int -i2InputFlush(i2ChanStrPtr pCh) -{ - int count; - unsigned long flags; - - // Ensure channel structure seems real - if ( !i2Validate ( pCh ) ) - return -1; - - ip2trace (CHANN, ITRC_INPUT, 10, 0); - - write_lock_irqsave(&pCh->Ibuf_spinlock, flags); - count = pCh->Ibuf_stuff - pCh->Ibuf_strip; - - // Adjust for buffer wrap - if (count < 0) { - count += IBUF_SIZE; - } - - // Expedient way to zero out the buffer - pCh->Ibuf_strip = pCh->Ibuf_stuff; - - - // Update our flow control information and possibly queue ourselves to send - // it, depending on how much data has been stripped since the last time a - // packet was sent. - - pCh->infl.asof += count; - - if ( (pCh->sinceLastFlow += count) >= pCh->whenSendFlow ) - { - pCh->sinceLastFlow -= pCh->whenSendFlow; - write_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - i2QueueNeeds(pCh->pMyBord, pCh, NEED_FLOW); - } else { - write_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - } - - ip2trace (CHANN, ITRC_INPUT, 19, 1, count); - - return count; -} - -//****************************************************************************** -// Function: i2InputAvailable(pCh) -// Parameters: Pointer to a channel structure -// Returns: Number of bytes available, or -1 for error -// -// Description: -// If there is a colossal blunder, (invalid structure pointers or the like), -// returns -1. Otherwise, returns the number of bytes stripped. Otherwise, -// returns the number of bytes available in the buffer. -//****************************************************************************** -#if 0 -static int -i2InputAvailable(i2ChanStrPtr pCh) -{ - int count; - - // Ensure channel structure seems real - if ( !i2Validate ( pCh ) ) return -1; - - - // initialize some accelerators and private copies - read_lock_irqsave(&pCh->Ibuf_spinlock, flags); - count = pCh->Ibuf_stuff - pCh->Ibuf_strip; - read_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - - // Adjust for buffer wrap - if (count < 0) - { - count += IBUF_SIZE; - } - - return count; -} -#endif - -//****************************************************************************** -// Function: i2Output(pCh, pSource, count) -// Parameters: Pointer to channel structure -// Pointer to source data -// Number of bytes to send -// Returns: Number of bytes sent, or -1 for error -// -// Description: -// Queues the data at pSource to be sent as data packets to the board. If there -// is a colossal blunder, (invalid structure pointers or the like), returns -1. -// Otherwise, returns the number of bytes written. What if there is not enough -// room for all the data? If pCh->channelOptions & CO_NBLOCK_WRITE is set, then -// we transfer as many characters as we can now, then return. If this bit is -// clear (default), routine will spin along until all the data is buffered. -// Should this occur, the 1-ms delay routine is called while waiting to avoid -// applications that one cannot break out of. -//****************************************************************************** -static int -i2Output(i2ChanStrPtr pCh, const char *pSource, int count) -{ - i2eBordStrPtr pB; - unsigned char *pInsert; - int amountToMove; - int countOriginal = count; - unsigned short channel; - unsigned short stuffIndex; - unsigned long flags; - - int bailout = 10; - - ip2trace (CHANN, ITRC_OUTPUT, ITRC_ENTER, 2, count, 0 ); - - // Ensure channel structure seems real - if ( !i2Validate ( pCh ) ) - return -1; - - // initialize some accelerators and private copies - pB = pCh->pMyBord; - channel = pCh->infl.hd.i2sChannel; - - // If the board has gone fatal, return bad, and also hit the trap routine if - // it exists. - if (pB->i2eFatal) { - if (pB->i2eFatalTrap) { - (*(pB)->i2eFatalTrap)(pB); - } - return -1; - } - // Proceed as though we would do everything - while ( count > 0 ) { - - // How much room in output buffer is there? - read_lock_irqsave(&pCh->Obuf_spinlock, flags); - amountToMove = pCh->Obuf_strip - pCh->Obuf_stuff - 1; - read_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - if (amountToMove < 0) { - amountToMove += OBUF_SIZE; - } - // Subtract off the headers size and see how much room there is for real - // data. If this is negative, we will discover later. - amountToMove -= sizeof (i2DataHeader); - - // Don't move more (now) than can go in a single packet - if ( amountToMove > (int)(MAX_OBUF_BLOCK - sizeof(i2DataHeader)) ) { - amountToMove = MAX_OBUF_BLOCK - sizeof(i2DataHeader); - } - // Don't move more than the count we were given - if (amountToMove > count) { - amountToMove = count; - } - // Now we know how much we must move: NB because the ring buffers have - // an overflow area at the end, we needn't worry about wrapping in the - // middle of a packet. - -// Small WINDOW here with no LOCK but I can't call Flush with LOCK -// We would be flushing (or ending flush) anyway - - ip2trace (CHANN, ITRC_OUTPUT, 10, 1, amountToMove ); - - if ( !(pCh->flush_flags && i2RetryFlushOutput(pCh) ) - && amountToMove > 0 ) - { - write_lock_irqsave(&pCh->Obuf_spinlock, flags); - stuffIndex = pCh->Obuf_stuff; - - // Had room to move some data: don't know whether the block size, - // buffer space, or what was the limiting factor... - pInsert = &(pCh->Obuf[stuffIndex]); - - // Set up the header - CHANNEL_OF(pInsert) = channel; - PTYPE_OF(pInsert) = PTYPE_DATA; - TAG_OF(pInsert) = 0; - ID_OF(pInsert) = ID_ORDINARY_DATA; - DATA_COUNT_OF(pInsert) = amountToMove; - - // Move the data - memcpy( (char*)(DATA_OF(pInsert)), pSource, amountToMove ); - // Adjust pointers and indices - pSource += amountToMove; - pCh->Obuf_char_count += amountToMove; - stuffIndex += amountToMove + sizeof(i2DataHeader); - count -= amountToMove; - - if (stuffIndex >= OBUF_SIZE) { - stuffIndex = 0; - } - pCh->Obuf_stuff = stuffIndex; - - write_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - - ip2trace (CHANN, ITRC_OUTPUT, 13, 1, stuffIndex ); - - } else { - - // Cannot move data - // becuz we need to stuff a flush - // or amount to move is <= 0 - - ip2trace(CHANN, ITRC_OUTPUT, 14, 3, - amountToMove, pB->i2eFifoRemains, - pB->i2eWaitingForEmptyFifo ); - - // Put this channel back on queue - // this ultimatly gets more data or wakes write output - i2QueueNeeds(pB, pCh, NEED_INLINE); - - if ( pB->i2eWaitingForEmptyFifo ) { - - ip2trace (CHANN, ITRC_OUTPUT, 16, 0 ); - - // or schedule - if (!in_interrupt()) { - - ip2trace (CHANN, ITRC_OUTPUT, 61, 0 ); - - schedule_timeout_interruptible(2); - if (signal_pending(current)) { - break; - } - continue; - } else { - - ip2trace (CHANN, ITRC_OUTPUT, 62, 0 ); - - // let interrupt in = WAS restore_flags() - // We hold no lock nor is irq off anymore??? - - break; - } - break; // from while(count) - } - else if ( pB->i2eFifoRemains < 32 && !pB->i2eTxMailEmpty ( pB ) ) - { - ip2trace (CHANN, ITRC_OUTPUT, 19, 2, - pB->i2eFifoRemains, - pB->i2eTxMailEmpty ); - - break; // from while(count) - } else if ( pCh->channelNeeds & NEED_CREDIT ) { - - ip2trace (CHANN, ITRC_OUTPUT, 22, 0 ); - - break; // from while(count) - } else if ( --bailout) { - - // Try to throw more things (maybe not us) in the fifo if we're - // not already waiting for it. - - ip2trace (CHANN, ITRC_OUTPUT, 20, 0 ); - - serviceOutgoingFifo(pB); - //break; CONTINUE; - } else { - ip2trace (CHANN, ITRC_OUTPUT, 21, 3, - pB->i2eFifoRemains, - pB->i2eOutMailWaiting, - pB->i2eWaitingForEmptyFifo ); - - break; // from while(count) - } - } - } // End of while(count) - - i2QueueNeeds(pB, pCh, NEED_INLINE); - - // We drop through either when the count expires, or when there is some - // count left, but there was a non-blocking write. - if (countOriginal > count) { - - ip2trace (CHANN, ITRC_OUTPUT, 17, 2, countOriginal, count ); - - serviceOutgoingFifo( pB ); - } - - ip2trace (CHANN, ITRC_OUTPUT, ITRC_RETURN, 2, countOriginal, count ); - - return countOriginal - count; -} - -//****************************************************************************** -// Function: i2FlushOutput(pCh) -// Parameters: Pointer to a channel structure -// Returns: Nothing -// -// Description: -// Sends bypass command to start flushing (waiting possibly forever until there -// is room), then sends inline command to stop flushing output, (again waiting -// possibly forever). -//****************************************************************************** -static inline void -i2FlushOutput(i2ChanStrPtr pCh) -{ - - ip2trace (CHANN, ITRC_FLUSH, 1, 1, pCh->flush_flags ); - - if (pCh->flush_flags) - return; - - if ( 1 != i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_STARTFL) ) { - pCh->flush_flags = STARTFL_FLAG; // Failed - flag for later - - ip2trace (CHANN, ITRC_FLUSH, 2, 0 ); - - } else if ( 1 != i2QueueCommands(PTYPE_INLINE, pCh, 0, 1, CMD_STOPFL) ) { - pCh->flush_flags = STOPFL_FLAG; // Failed - flag for later - - ip2trace (CHANN, ITRC_FLUSH, 3, 0 ); - } -} - -static int -i2RetryFlushOutput(i2ChanStrPtr pCh) -{ - int old_flags = pCh->flush_flags; - - ip2trace (CHANN, ITRC_FLUSH, 14, 1, old_flags ); - - pCh->flush_flags = 0; // Clear flag so we can avoid recursion - // and queue the commands - - if ( old_flags & STARTFL_FLAG ) { - if ( 1 == i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_STARTFL) ) { - old_flags = STOPFL_FLAG; //Success - send stop flush - } else { - old_flags = STARTFL_FLAG; //Failure - Flag for retry later - } - - ip2trace (CHANN, ITRC_FLUSH, 15, 1, old_flags ); - - } - if ( old_flags & STOPFL_FLAG ) { - if (1 == i2QueueCommands(PTYPE_INLINE, pCh, 0, 1, CMD_STOPFL)) { - old_flags = 0; // Success - clear flags - } - - ip2trace (CHANN, ITRC_FLUSH, 16, 1, old_flags ); - } - pCh->flush_flags = old_flags; - - ip2trace (CHANN, ITRC_FLUSH, 17, 1, old_flags ); - - return old_flags; -} - -//****************************************************************************** -// Function: i2DrainOutput(pCh,timeout) -// Parameters: Pointer to a channel structure -// Maximum period to wait -// Returns: ? -// -// Description: -// Uses the bookmark request command to ask the board to send a bookmark back as -// soon as all the data is completely sent. -//****************************************************************************** -static void -i2DrainWakeup(unsigned long d) -{ - i2ChanStrPtr pCh = (i2ChanStrPtr)d; - - ip2trace (CHANN, ITRC_DRAIN, 10, 1, pCh->BookmarkTimer.expires ); - - pCh->BookmarkTimer.expires = 0; - wake_up_interruptible( &pCh->pBookmarkWait ); -} - -static void -i2DrainOutput(i2ChanStrPtr pCh, int timeout) -{ - wait_queue_t wait; - i2eBordStrPtr pB; - - ip2trace (CHANN, ITRC_DRAIN, ITRC_ENTER, 1, pCh->BookmarkTimer.expires); - - pB = pCh->pMyBord; - // If the board has gone fatal, return bad, - // and also hit the trap routine if it exists. - if (pB->i2eFatal) { - if (pB->i2eFatalTrap) { - (*(pB)->i2eFatalTrap)(pB); - } - return; - } - if ((timeout > 0) && (pCh->BookmarkTimer.expires == 0 )) { - // One per customer (channel) - setup_timer(&pCh->BookmarkTimer, i2DrainWakeup, - (unsigned long)pCh); - - ip2trace (CHANN, ITRC_DRAIN, 1, 1, pCh->BookmarkTimer.expires ); - - mod_timer(&pCh->BookmarkTimer, jiffies + timeout); - } - - i2QueueCommands( PTYPE_INLINE, pCh, -1, 1, CMD_BMARK_REQ ); - - init_waitqueue_entry(&wait, current); - add_wait_queue(&(pCh->pBookmarkWait), &wait); - set_current_state( TASK_INTERRUPTIBLE ); - - serviceOutgoingFifo( pB ); - - schedule(); // Now we take our interruptible sleep on - - // Clean up the queue - set_current_state( TASK_RUNNING ); - remove_wait_queue(&(pCh->pBookmarkWait), &wait); - - // if expires == 0 then timer poped, then do not need to del_timer - if ((timeout > 0) && pCh->BookmarkTimer.expires && - time_before(jiffies, pCh->BookmarkTimer.expires)) { - del_timer( &(pCh->BookmarkTimer) ); - pCh->BookmarkTimer.expires = 0; - - ip2trace (CHANN, ITRC_DRAIN, 3, 1, pCh->BookmarkTimer.expires ); - - } - ip2trace (CHANN, ITRC_DRAIN, ITRC_RETURN, 1, pCh->BookmarkTimer.expires ); - return; -} - -//****************************************************************************** -// Function: i2OutputFree(pCh) -// Parameters: Pointer to a channel structure -// Returns: Space in output buffer -// -// Description: -// Returns -1 if very gross error. Otherwise returns the amount of bytes still -// free in the output buffer. -//****************************************************************************** -static int -i2OutputFree(i2ChanStrPtr pCh) -{ - int amountToMove; - unsigned long flags; - - // Ensure channel structure seems real - if ( !i2Validate ( pCh ) ) { - return -1; - } - read_lock_irqsave(&pCh->Obuf_spinlock, flags); - amountToMove = pCh->Obuf_strip - pCh->Obuf_stuff - 1; - read_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - - if (amountToMove < 0) { - amountToMove += OBUF_SIZE; - } - // If this is negative, we will discover later - amountToMove -= sizeof(i2DataHeader); - - return (amountToMove < 0) ? 0 : amountToMove; -} -static void - -ip2_owake( PTTY tp) -{ - i2ChanStrPtr pCh; - - if (tp == NULL) return; - - pCh = tp->driver_data; - - ip2trace (CHANN, ITRC_SICMD, 10, 2, tp->flags, - (1 << TTY_DO_WRITE_WAKEUP) ); - - tty_wakeup(tp); -} - -static inline void -set_baud_params(i2eBordStrPtr pB) -{ - int i,j; - i2ChanStrPtr *pCh; - - pCh = (i2ChanStrPtr *) pB->i2eChannelPtr; - - for (i = 0; i < ABS_MAX_BOXES; i++) { - if (pB->channelBtypes.bid_value[i]) { - if (BID_HAS_654(pB->channelBtypes.bid_value[i])) { - for (j = 0; j < ABS_BIGGEST_BOX; j++) { - if (pCh[i*16+j] == NULL) - break; - (pCh[i*16+j])->BaudBase = 921600; // MAX for ST654 - (pCh[i*16+j])->BaudDivisor = 96; - } - } else { // has cirrus cd1400 - for (j = 0; j < ABS_BIGGEST_BOX; j++) { - if (pCh[i*16+j] == NULL) - break; - (pCh[i*16+j])->BaudBase = 115200; // MAX for CD1400 - (pCh[i*16+j])->BaudDivisor = 12; - } - } - } - } -} - -//****************************************************************************** -// Function: i2StripFifo(pB) -// Parameters: Pointer to a board structure -// Returns: ? -// -// Description: -// Strips all the available data from the incoming FIFO, identifies the type of -// packet, and either buffers the data or does what needs to be done. -// -// Note there is no overflow checking here: if the board sends more data than it -// ought to, we will not detect it here, but blindly overflow... -//****************************************************************************** - -// A buffer for reading in blocks for unknown channels -static unsigned char junkBuffer[IBUF_SIZE]; - -// A buffer to read in a status packet. Because of the size of the count field -// for these things, the maximum packet size must be less than MAX_CMD_PACK_SIZE -static unsigned char cmdBuffer[MAX_CMD_PACK_SIZE + 4]; - -// This table changes the bit order from MSR order given by STAT_MODEM packet to -// status bits used in our library. -static char xlatDss[16] = { -0 | 0 | 0 | 0 , -0 | 0 | 0 | I2_CTS , -0 | 0 | I2_DSR | 0 , -0 | 0 | I2_DSR | I2_CTS , -0 | I2_RI | 0 | 0 , -0 | I2_RI | 0 | I2_CTS , -0 | I2_RI | I2_DSR | 0 , -0 | I2_RI | I2_DSR | I2_CTS , -I2_DCD | 0 | 0 | 0 , -I2_DCD | 0 | 0 | I2_CTS , -I2_DCD | 0 | I2_DSR | 0 , -I2_DCD | 0 | I2_DSR | I2_CTS , -I2_DCD | I2_RI | 0 | 0 , -I2_DCD | I2_RI | 0 | I2_CTS , -I2_DCD | I2_RI | I2_DSR | 0 , -I2_DCD | I2_RI | I2_DSR | I2_CTS }; - -static inline void -i2StripFifo(i2eBordStrPtr pB) -{ - i2ChanStrPtr pCh; - int channel; - int count; - unsigned short stuffIndex; - int amountToRead; - unsigned char *pc, *pcLimit; - unsigned char uc; - unsigned char dss_change; - unsigned long bflags,cflags; - -// ip2trace (ITRC_NO_PORT, ITRC_SFIFO, ITRC_ENTER, 0 ); - - while (I2_HAS_INPUT(pB)) { -// ip2trace (ITRC_NO_PORT, ITRC_SFIFO, 2, 0 ); - - // Process packet from fifo a one atomic unit - write_lock_irqsave(&pB->read_fifo_spinlock, bflags); - - // The first word (or two bytes) will have channel number and type of - // packet, possibly other information - pB->i2eLeadoffWord[0] = iiReadWord(pB); - - switch(PTYPE_OF(pB->i2eLeadoffWord)) - { - case PTYPE_DATA: - pB->got_input = 1; - -// ip2trace (ITRC_NO_PORT, ITRC_SFIFO, 3, 0 ); - - channel = CHANNEL_OF(pB->i2eLeadoffWord); /* Store channel */ - count = iiReadWord(pB); /* Count is in the next word */ - -// NEW: Check the count for sanity! Should the hardware fail, our death -// is more pleasant. While an oversize channel is acceptable (just more -// than the driver supports), an over-length count clearly means we are -// sick! - if ( ((unsigned int)count) > IBUF_SIZE ) { - pB->i2eFatal = 2; - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - return; /* Bail out ASAP */ - } - // Channel is illegally big ? - if ((channel >= pB->i2eChannelCnt) || - (NULL==(pCh = ((i2ChanStrPtr*)pB->i2eChannelPtr)[channel]))) - { - iiReadBuf(pB, junkBuffer, count); - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - break; /* From switch: ready for next packet */ - } - - // Channel should be valid, then - - // If this is a hot-key, merely post its receipt for now. These are - // always supposed to be 1-byte packets, so we won't even check the - // count. Also we will post an acknowledgement to the board so that - // more data can be forthcoming. Note that we are not trying to use - // these sequences in this driver, merely to robustly ignore them. - if(ID_OF(pB->i2eLeadoffWord) == ID_HOT_KEY) - { - pCh->hotKeyIn = iiReadWord(pB) & 0xff; - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_HOTACK); - break; /* From the switch: ready for next packet */ - } - - // Normal data! We crudely assume there is room for the data in our - // buffer because the board wouldn't have exceeded his credit limit. - write_lock_irqsave(&pCh->Ibuf_spinlock, cflags); - // We have 2 locks now - stuffIndex = pCh->Ibuf_stuff; - amountToRead = IBUF_SIZE - stuffIndex; - if (amountToRead > count) - amountToRead = count; - - // stuffIndex would have been already adjusted so there would - // always be room for at least one, and count is always at least - // one. - - iiReadBuf(pB, &(pCh->Ibuf[stuffIndex]), amountToRead); - pCh->icount.rx += amountToRead; - - // Update the stuffIndex by the amount of data moved. Note we could - // never ask for more data than would just fit. However, we might - // have read in one more byte than we wanted because the read - // rounds up to even bytes. If this byte is on the end of the - // packet, and is padding, we ignore it. If the byte is part of - // the actual data, we need to move it. - - stuffIndex += amountToRead; - - if (stuffIndex >= IBUF_SIZE) { - if ((amountToRead & 1) && (count > amountToRead)) { - pCh->Ibuf[0] = pCh->Ibuf[IBUF_SIZE]; - amountToRead++; - stuffIndex = 1; - } else { - stuffIndex = 0; - } - } - - // If there is anything left over, read it as well - if (count > amountToRead) { - amountToRead = count - amountToRead; - iiReadBuf(pB, &(pCh->Ibuf[stuffIndex]), amountToRead); - pCh->icount.rx += amountToRead; - stuffIndex += amountToRead; - } - - // Update stuff index - pCh->Ibuf_stuff = stuffIndex; - write_unlock_irqrestore(&pCh->Ibuf_spinlock, cflags); - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - -#ifdef USE_IQ - schedule_work(&pCh->tqueue_input); -#else - do_input(&pCh->tqueue_input); -#endif - - // Note we do not need to maintain any flow-control credits at this - // time: if we were to increment .asof and decrement .room, there - // would be no net effect. Instead, when we strip data, we will - // increment .asof and leave .room unchanged. - - break; // From switch: ready for next packet - - case PTYPE_STATUS: - ip2trace (ITRC_NO_PORT, ITRC_SFIFO, 4, 0 ); - - count = CMD_COUNT_OF(pB->i2eLeadoffWord); - - iiReadBuf(pB, cmdBuffer, count); - // We can release early with buffer grab - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - - pc = cmdBuffer; - pcLimit = &(cmdBuffer[count]); - - while (pc < pcLimit) { - channel = *pc++; - - ip2trace (channel, ITRC_SFIFO, 7, 2, channel, *pc ); - - /* check for valid channel */ - if (channel < pB->i2eChannelCnt - && - (pCh = (((i2ChanStrPtr*)pB->i2eChannelPtr)[channel])) != NULL - ) - { - dss_change = 0; - - switch (uc = *pc++) - { - /* Breaks and modem signals are easy: just update status */ - case STAT_CTS_UP: - if ( !(pCh->dataSetIn & I2_CTS) ) - { - pCh->dataSetIn |= I2_DCTS; - pCh->icount.cts++; - dss_change = 1; - } - pCh->dataSetIn |= I2_CTS; - break; - - case STAT_CTS_DN: - if ( pCh->dataSetIn & I2_CTS ) - { - pCh->dataSetIn |= I2_DCTS; - pCh->icount.cts++; - dss_change = 1; - } - pCh->dataSetIn &= ~I2_CTS; - break; - - case STAT_DCD_UP: - ip2trace (channel, ITRC_MODEM, 1, 1, pCh->dataSetIn ); - - if ( !(pCh->dataSetIn & I2_DCD) ) - { - ip2trace (CHANN, ITRC_MODEM, 2, 0 ); - pCh->dataSetIn |= I2_DDCD; - pCh->icount.dcd++; - dss_change = 1; - } - pCh->dataSetIn |= I2_DCD; - - ip2trace (channel, ITRC_MODEM, 3, 1, pCh->dataSetIn ); - break; - - case STAT_DCD_DN: - ip2trace (channel, ITRC_MODEM, 4, 1, pCh->dataSetIn ); - if ( pCh->dataSetIn & I2_DCD ) - { - ip2trace (channel, ITRC_MODEM, 5, 0 ); - pCh->dataSetIn |= I2_DDCD; - pCh->icount.dcd++; - dss_change = 1; - } - pCh->dataSetIn &= ~I2_DCD; - - ip2trace (channel, ITRC_MODEM, 6, 1, pCh->dataSetIn ); - break; - - case STAT_DSR_UP: - if ( !(pCh->dataSetIn & I2_DSR) ) - { - pCh->dataSetIn |= I2_DDSR; - pCh->icount.dsr++; - dss_change = 1; - } - pCh->dataSetIn |= I2_DSR; - break; - - case STAT_DSR_DN: - if ( pCh->dataSetIn & I2_DSR ) - { - pCh->dataSetIn |= I2_DDSR; - pCh->icount.dsr++; - dss_change = 1; - } - pCh->dataSetIn &= ~I2_DSR; - break; - - case STAT_RI_UP: - if ( !(pCh->dataSetIn & I2_RI) ) - { - pCh->dataSetIn |= I2_DRI; - pCh->icount.rng++; - dss_change = 1; - } - pCh->dataSetIn |= I2_RI ; - break; - - case STAT_RI_DN: - // to be compat with serial.c - //if ( pCh->dataSetIn & I2_RI ) - //{ - // pCh->dataSetIn |= I2_DRI; - // pCh->icount.rng++; - // dss_change = 1; - //} - pCh->dataSetIn &= ~I2_RI ; - break; - - case STAT_BRK_DET: - pCh->dataSetIn |= I2_BRK; - pCh->icount.brk++; - dss_change = 1; - break; - - // Bookmarks? one less request we're waiting for - case STAT_BMARK: - pCh->bookMarks--; - if (pCh->bookMarks <= 0 ) { - pCh->bookMarks = 0; - wake_up_interruptible( &pCh->pBookmarkWait ); - - ip2trace (channel, ITRC_DRAIN, 20, 1, pCh->BookmarkTimer.expires ); - } - break; - - // Flow control packets? Update the new credits, and if - // someone was waiting for output, queue him up again. - case STAT_FLOW: - pCh->outfl.room = - ((flowStatPtr)pc)->room - - (pCh->outfl.asof - ((flowStatPtr)pc)->asof); - - ip2trace (channel, ITRC_STFLW, 1, 1, pCh->outfl.room ); - - if (pCh->channelNeeds & NEED_CREDIT) - { - ip2trace (channel, ITRC_STFLW, 2, 1, pCh->channelNeeds); - - pCh->channelNeeds &= ~NEED_CREDIT; - i2QueueNeeds(pB, pCh, NEED_INLINE); - if ( pCh->pTTY ) - ip2_owake(pCh->pTTY); - } - - ip2trace (channel, ITRC_STFLW, 3, 1, pCh->channelNeeds); - - pc += sizeof(flowStat); - break; - - /* Special packets: */ - /* Just copy the information into the channel structure */ - - case STAT_STATUS: - - pCh->channelStatus = *((debugStatPtr)pc); - pc += sizeof(debugStat); - break; - - case STAT_TXCNT: - - pCh->channelTcount = *((cntStatPtr)pc); - pc += sizeof(cntStat); - break; - - case STAT_RXCNT: - - pCh->channelRcount = *((cntStatPtr)pc); - pc += sizeof(cntStat); - break; - - case STAT_BOXIDS: - pB->channelBtypes = *((bidStatPtr)pc); - pc += sizeof(bidStat); - set_baud_params(pB); - break; - - case STAT_HWFAIL: - i2QueueCommands (PTYPE_INLINE, pCh, 0, 1, CMD_HW_TEST); - pCh->channelFail = *((failStatPtr)pc); - pc += sizeof(failStat); - break; - - /* No explicit match? then - * Might be an error packet... - */ - default: - switch (uc & STAT_MOD_ERROR) - { - case STAT_ERROR: - if (uc & STAT_E_PARITY) { - pCh->dataSetIn |= I2_PAR; - pCh->icount.parity++; - } - if (uc & STAT_E_FRAMING){ - pCh->dataSetIn |= I2_FRA; - pCh->icount.frame++; - } - if (uc & STAT_E_OVERRUN){ - pCh->dataSetIn |= I2_OVR; - pCh->icount.overrun++; - } - break; - - case STAT_MODEM: - // the answer to DSS_NOW request (not change) - pCh->dataSetIn = (pCh->dataSetIn - & ~(I2_RI | I2_CTS | I2_DCD | I2_DSR) ) - | xlatDss[uc & 0xf]; - wake_up_interruptible ( &pCh->dss_now_wait ); - default: - break; - } - } /* End of switch on status type */ - if (dss_change) { -#ifdef USE_IQ - schedule_work(&pCh->tqueue_status); -#else - do_status(&pCh->tqueue_status); -#endif - } - } - else /* Or else, channel is invalid */ - { - // Even though the channel is invalid, we must test the - // status to see how much additional data it has (to be - // skipped) - switch (*pc++) - { - case STAT_FLOW: - pc += 4; /* Skip the data */ - break; - - default: - break; - } - } - } // End of while (there is still some status packet left) - break; - - default: // Neither packet? should be impossible - ip2trace (ITRC_NO_PORT, ITRC_SFIFO, 5, 1, - PTYPE_OF(pB->i2eLeadoffWord) ); - write_unlock_irqrestore(&pB->read_fifo_spinlock, - bflags); - - break; - } // End of switch on type of packets - } /*while(board I2_HAS_INPUT)*/ - - ip2trace (ITRC_NO_PORT, ITRC_SFIFO, ITRC_RETURN, 0 ); - - // Send acknowledgement to the board even if there was no data! - pB->i2eOutMailWaiting |= MB_IN_STRIPPED; - return; -} - -//****************************************************************************** -// Function: i2Write2Fifo(pB,address,count) -// Parameters: Pointer to a board structure, source address, byte count -// Returns: bytes written -// -// Description: -// Writes count bytes to board io address(implied) from source -// Adjusts count, leaves reserve for next time around bypass cmds -//****************************************************************************** -static int -i2Write2Fifo(i2eBordStrPtr pB, unsigned char *source, int count,int reserve) -{ - int rc = 0; - unsigned long flags; - write_lock_irqsave(&pB->write_fifo_spinlock, flags); - if (!pB->i2eWaitingForEmptyFifo) { - if (pB->i2eFifoRemains > (count+reserve)) { - pB->i2eFifoRemains -= count; - iiWriteBuf(pB, source, count); - pB->i2eOutMailWaiting |= MB_OUT_STUFFED; - rc = count; - } - } - write_unlock_irqrestore(&pB->write_fifo_spinlock, flags); - return rc; -} -//****************************************************************************** -// Function: i2StuffFifoBypass(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// Stuffs as many bypass commands into the fifo as possible. This is simpler -// than stuffing data or inline commands to fifo, since we do not have -// flow-control to deal with. -//****************************************************************************** -static inline void -i2StuffFifoBypass(i2eBordStrPtr pB) -{ - i2ChanStrPtr pCh; - unsigned char *pRemove; - unsigned short stripIndex; - unsigned short packetSize; - unsigned short paddedSize; - unsigned short notClogged = 1; - unsigned long flags; - - int bailout = 1000; - - // Continue processing so long as there are entries, or there is room in the - // fifo. Each entry represents a channel with something to do. - while ( --bailout && notClogged && - (NULL != (pCh = i2DeQueueNeeds(pB,NEED_BYPASS)))) - { - write_lock_irqsave(&pCh->Cbuf_spinlock, flags); - stripIndex = pCh->Cbuf_strip; - - // as long as there are packets for this channel... - - while (stripIndex != pCh->Cbuf_stuff) { - pRemove = &(pCh->Cbuf[stripIndex]); - packetSize = CMD_COUNT_OF(pRemove) + sizeof(i2CmdHeader); - paddedSize = roundup(packetSize, 2); - - if (paddedSize > 0) { - if ( 0 == i2Write2Fifo(pB, pRemove, paddedSize,0)) { - notClogged = 0; /* fifo full */ - i2QueueNeeds(pB, pCh, NEED_BYPASS); // Put back on queue - break; // Break from the channel - } - } -#ifdef DEBUG_FIFO -WriteDBGBuf("BYPS", pRemove, paddedSize); -#endif /* DEBUG_FIFO */ - pB->debugBypassCount++; - - pRemove += packetSize; - stripIndex += packetSize; - if (stripIndex >= CBUF_SIZE) { - stripIndex = 0; - pRemove = pCh->Cbuf; - } - } - // Done with this channel. Move to next, removing this one from - // the queue of channels if we cleaned it out (i.e., didn't get clogged. - pCh->Cbuf_strip = stripIndex; - write_unlock_irqrestore(&pCh->Cbuf_spinlock, flags); - } // Either clogged or finished all the work - -#ifdef IP2DEBUG_TRACE - if ( !bailout ) { - ip2trace (ITRC_NO_PORT, ITRC_ERROR, 1, 0 ); - } -#endif -} - -//****************************************************************************** -// Function: i2StuffFifoFlow(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// Stuffs as many flow control packets into the fifo as possible. This is easier -// even than doing normal bypass commands, because there is always at most one -// packet, already assembled, for each channel. -//****************************************************************************** -static inline void -i2StuffFifoFlow(i2eBordStrPtr pB) -{ - i2ChanStrPtr pCh; - unsigned short paddedSize = roundup(sizeof(flowIn), 2); - - ip2trace (ITRC_NO_PORT, ITRC_SFLOW, ITRC_ENTER, 2, - pB->i2eFifoRemains, paddedSize ); - - // Continue processing so long as there are entries, or there is room in the - // fifo. Each entry represents a channel with something to do. - while ( (NULL != (pCh = i2DeQueueNeeds(pB,NEED_FLOW)))) { - pB->debugFlowCount++; - - // NO Chan LOCK needed ??? - if ( 0 == i2Write2Fifo(pB,(unsigned char *)&(pCh->infl),paddedSize,0)) { - break; - } -#ifdef DEBUG_FIFO - WriteDBGBuf("FLOW",(unsigned char *) &(pCh->infl), paddedSize); -#endif /* DEBUG_FIFO */ - - } // Either clogged or finished all the work - - ip2trace (ITRC_NO_PORT, ITRC_SFLOW, ITRC_RETURN, 0 ); -} - -//****************************************************************************** -// Function: i2StuffFifoInline(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// Stuffs as much data and inline commands into the fifo as possible. This is -// the most complex fifo-stuffing operation, since there if now the channel -// flow-control issue to deal with. -//****************************************************************************** -static inline void -i2StuffFifoInline(i2eBordStrPtr pB) -{ - i2ChanStrPtr pCh; - unsigned char *pRemove; - unsigned short stripIndex; - unsigned short packetSize; - unsigned short paddedSize; - unsigned short notClogged = 1; - unsigned short flowsize; - unsigned long flags; - - int bailout = 1000; - int bailout2; - - ip2trace (ITRC_NO_PORT, ITRC_SICMD, ITRC_ENTER, 3, pB->i2eFifoRemains, - pB->i2Dbuf_strip, pB->i2Dbuf_stuff ); - - // Continue processing so long as there are entries, or there is room in the - // fifo. Each entry represents a channel with something to do. - while ( --bailout && notClogged && - (NULL != (pCh = i2DeQueueNeeds(pB,NEED_INLINE))) ) - { - write_lock_irqsave(&pCh->Obuf_spinlock, flags); - stripIndex = pCh->Obuf_strip; - - ip2trace (CHANN, ITRC_SICMD, 3, 2, stripIndex, pCh->Obuf_stuff ); - - // as long as there are packets for this channel... - bailout2 = 1000; - while ( --bailout2 && stripIndex != pCh->Obuf_stuff) { - pRemove = &(pCh->Obuf[stripIndex]); - - // Must determine whether this be a data or command packet to - // calculate correctly the header size and the amount of - // flow-control credit this type of packet will use. - if (PTYPE_OF(pRemove) == PTYPE_DATA) { - flowsize = DATA_COUNT_OF(pRemove); - packetSize = flowsize + sizeof(i2DataHeader); - } else { - flowsize = CMD_COUNT_OF(pRemove); - packetSize = flowsize + sizeof(i2CmdHeader); - } - flowsize = CREDIT_USAGE(flowsize); - paddedSize = roundup(packetSize, 2); - - ip2trace (CHANN, ITRC_SICMD, 4, 2, pB->i2eFifoRemains, paddedSize ); - - // If we don't have enough credits from the board to send the data, - // flag the channel that we are waiting for flow control credit, and - // break out. This will clean up this channel and remove us from the - // queue of hot things to do. - - ip2trace (CHANN, ITRC_SICMD, 5, 2, pCh->outfl.room, flowsize ); - - if (pCh->outfl.room <= flowsize) { - // Do Not have the credits to send this packet. - i2QueueNeeds(pB, pCh, NEED_CREDIT); - notClogged = 0; - break; // So to do next channel - } - if ( (paddedSize > 0) - && ( 0 == i2Write2Fifo(pB, pRemove, paddedSize, 128))) { - // Do Not have room in fifo to send this packet. - notClogged = 0; - i2QueueNeeds(pB, pCh, NEED_INLINE); - break; // Break from the channel - } -#ifdef DEBUG_FIFO -WriteDBGBuf("DATA", pRemove, paddedSize); -#endif /* DEBUG_FIFO */ - pB->debugInlineCount++; - - pCh->icount.tx += flowsize; - // Update current credits - pCh->outfl.room -= flowsize; - pCh->outfl.asof += flowsize; - if (PTYPE_OF(pRemove) == PTYPE_DATA) { - pCh->Obuf_char_count -= DATA_COUNT_OF(pRemove); - } - pRemove += packetSize; - stripIndex += packetSize; - - ip2trace (CHANN, ITRC_SICMD, 6, 2, stripIndex, pCh->Obuf_strip); - - if (stripIndex >= OBUF_SIZE) { - stripIndex = 0; - pRemove = pCh->Obuf; - - ip2trace (CHANN, ITRC_SICMD, 7, 1, stripIndex ); - - } - } /* while */ - if ( !bailout2 ) { - ip2trace (CHANN, ITRC_ERROR, 3, 0 ); - } - // Done with this channel. Move to next, removing this one from the - // queue of channels if we cleaned it out (i.e., didn't get clogged. - pCh->Obuf_strip = stripIndex; - write_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - if ( notClogged ) - { - - ip2trace (CHANN, ITRC_SICMD, 8, 0 ); - - if ( pCh->pTTY ) { - ip2_owake(pCh->pTTY); - } - } - } // Either clogged or finished all the work - - if ( !bailout ) { - ip2trace (ITRC_NO_PORT, ITRC_ERROR, 4, 0 ); - } - - ip2trace (ITRC_NO_PORT, ITRC_SICMD, ITRC_RETURN, 1,pB->i2Dbuf_strip); -} - -//****************************************************************************** -// Function: serviceOutgoingFifo(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// Helper routine to put data in the outgoing fifo, if we aren't already waiting -// for something to be there. If the fifo has only room for a very little data, -// go head and hit the board with a mailbox hit immediately. Otherwise, it will -// have to happen later in the interrupt processing. Since this routine may be -// called both at interrupt and foreground time, we must turn off interrupts -// during the entire process. -//****************************************************************************** -static void -serviceOutgoingFifo(i2eBordStrPtr pB) -{ - // If we aren't currently waiting for the board to empty our fifo, service - // everything that is pending, in priority order (especially, Bypass before - // Inline). - if ( ! pB->i2eWaitingForEmptyFifo ) - { - i2StuffFifoFlow(pB); - i2StuffFifoBypass(pB); - i2StuffFifoInline(pB); - - iiSendPendingMail(pB); - } -} - -//****************************************************************************** -// Function: i2ServiceBoard(pB) -// Parameters: Pointer to a board structure -// Returns: Nothing -// -// Description: -// Normally this is called from interrupt level, but there is deliberately -// nothing in here specific to being called from interrupt level. All the -// hardware-specific, interrupt-specific things happen at the outer levels. -// -// For example, a timer interrupt could drive this routine for some sort of -// polled operation. The only requirement is that the programmer deal with any -// atomiticity/concurrency issues that result. -// -// This routine responds to the board's having sent mailbox information to the -// host (which would normally cause an interrupt). This routine reads the -// incoming mailbox. If there is no data in it, this board did not create the -// interrupt and/or has nothing to be done to it. (Except, if we have been -// waiting to write mailbox data to it, we may do so. -// -// Based on the value in the mailbox, we may take various actions. -// -// No checking here of pB validity: after all, it shouldn't have been called by -// the handler unless pB were on the list. -//****************************************************************************** -static inline int -i2ServiceBoard ( i2eBordStrPtr pB ) -{ - unsigned inmail; - unsigned long flags; - - - /* This should be atomic because of the way we are called... */ - if (NO_MAIL_HERE == ( inmail = pB->i2eStartMail ) ) { - inmail = iiGetMail(pB); - } - pB->i2eStartMail = NO_MAIL_HERE; - - ip2trace (ITRC_NO_PORT, ITRC_INTR, 2, 1, inmail ); - - if (inmail != NO_MAIL_HERE) { - // If the board has gone fatal, nothing to do but hit a bit that will - // alert foreground tasks to protest! - if ( inmail & MB_FATAL_ERROR ) { - pB->i2eFatal = 1; - goto exit_i2ServiceBoard; - } - - /* Assuming no fatal condition, we proceed to do work */ - if ( inmail & MB_IN_STUFFED ) { - pB->i2eFifoInInts++; - i2StripFifo(pB); /* There might be incoming packets */ - } - - if (inmail & MB_OUT_STRIPPED) { - pB->i2eFifoOutInts++; - write_lock_irqsave(&pB->write_fifo_spinlock, flags); - pB->i2eFifoRemains = pB->i2eFifoSize; - pB->i2eWaitingForEmptyFifo = 0; - write_unlock_irqrestore(&pB->write_fifo_spinlock, - flags); - - ip2trace (ITRC_NO_PORT, ITRC_INTR, 30, 1, pB->i2eFifoRemains ); - - } - serviceOutgoingFifo(pB); - } - - ip2trace (ITRC_NO_PORT, ITRC_INTR, 8, 0 ); - -exit_i2ServiceBoard: - - return 0; -} diff --git a/drivers/staging/tty/ip2/i2lib.h b/drivers/staging/tty/ip2/i2lib.h deleted file mode 100644 index e559e9b..0000000 --- a/drivers/staging/tty/ip2/i2lib.h +++ /dev/null @@ -1,351 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Header file for high level library functions -* -*******************************************************************************/ -#ifndef I2LIB_H -#define I2LIB_H 1 -//------------------------------------------------------------------------------ -// I2LIB.H -// -// IntelliPort-II and IntelliPort-IIEX -// -// Defines, structure definitions, and external declarations for i2lib.c -//------------------------------------------------------------------------------ -//-------------------------------------- -// Mandatory Includes: -//-------------------------------------- -#include "ip2types.h" -#include "i2ellis.h" -#include "i2pack.h" -#include "i2cmd.h" -#include - -//------------------------------------------------------------------------------ -// i2ChanStr -- Channel Structure: -// Used to track per-channel information for the library routines using standard -// loadware. Note also, a pointer to an array of these structures is patched -// into the i2eBordStr (see i2ellis.h) -//------------------------------------------------------------------------------ -// -// If we make some limits on the maximum block sizes, we can avoid dealing with -// buffer wrap. The wrapping of the buffer is based on where the start of the -// packet is. Then there is always room for the packet contiguously. -// -// Maximum total length of an outgoing data or in-line command block. The limit -// of 36 on data is quite arbitrary and based more on DOS memory limitations -// than the board interface. However, for commands, the maximum packet length is -// MAX_CMD_PACK_SIZE, because the field size for the count is only a few bits -// (see I2PACK.H) in such packets. For data packets, the count field size is not -// the limiting factor. As of this writing, MAX_OBUF_BLOCK < MAX_CMD_PACK_SIZE, -// but be careful if wanting to modify either. -// -#define MAX_OBUF_BLOCK 36 - -// Another note on maximum block sizes: we are buffering packets here. Data is -// put into the buffer (if there is room) regardless of the credits from the -// board. The board sends new credits whenever it has removed from his buffers a -// number of characters equal to 80% of total buffer size. (Of course, the total -// buffer size is what is reported when the very first set of flow control -// status packets are received from the board. Therefore, to be robust, you must -// always fill the board to at least 80% of the current credit limit, else you -// might not give it enough to trigger a new report. These conditions are -// obtained here so long as the maximum output block size is less than 20% the -// size of the board's output buffers. This is true at present by "coincidence" -// or "infernal knowledge": the board's output buffers are at least 700 bytes -// long (20% = 140 bytes, at least). The 80% figure is "official", so the safest -// strategy might be to trap the first flow control report and guarantee that -// the effective maxObufBlock is the minimum of MAX_OBUF_BLOCK and 20% of first -// reported buffer credit. -// -#define MAX_CBUF_BLOCK 6 // Maximum total length of a bypass command block - -#define IBUF_SIZE 512 // character capacity of input buffer per channel -#define OBUF_SIZE 1024// character capacity of output buffer per channel -#define CBUF_SIZE 10 // character capacity of output bypass buffer - -typedef struct _i2ChanStr -{ - // First, back-pointers so that given a pointer to this structure, you can - // determine the correct board and channel number to reference, (say, when - // issuing commands, etc. (Note, channel number is in infl.hd.i2sChannel.) - - int port_index; // Index of port in channel structure array attached - // to board structure. - PTTY pTTY; // Pointer to tty structure for port (OS specific) - USHORT validity; // Indicates whether the given channel has been - // initialized, really exists (or is a missing - // channel, e.g. channel 9 on an 8-port box.) - - i2eBordStrPtr pMyBord; // Back-pointer to this channel's board structure - - int wopen; // waiting fer carrier - - int throttled; // Set if upper layer can take no data - - int flags; // Defined in tty.h - - PWAITQ open_wait; // Pointer for OS sleep function. - PWAITQ close_wait; // Pointer for OS sleep function. - PWAITQ delta_msr_wait;// Pointer for OS sleep function. - PWAITQ dss_now_wait; // Pointer for OS sleep function. - - struct timer_list BookmarkTimer; // Used by i2DrainOutput - wait_queue_head_t pBookmarkWait; // Used by i2DrainOutput - - int BaudBase; - int BaudDivisor; - - USHORT ClosingDelay; - USHORT ClosingWaitTime; - - volatile - flowIn infl; // This structure is initialized as a completely - // formed flow-control command packet, and as such - // has the channel number, also the capacity and - // "as-of" data needed continuously. - - USHORT sinceLastFlow; // Counts the number of characters read from input - // buffers, since the last time flow control info - // was sent. - - USHORT whenSendFlow; // Determines when new flow control is to be sent to - // the board. Note unlike earlier manifestations of - // the driver, these packets can be sent from - // in-place. - - USHORT channelNeeds; // Bit map of important things which must be done - // for this channel. (See bits below ) - - volatile - flowStat outfl; // Same type of structure is used to hold current - // flow control information used to control our - // output. "asof" is kept updated as data is sent, - // and "room" never goes to zero. - - // The incoming ring buffer - // Unlike the outgoing buffers, this holds raw data, not packets. The two - // extra bytes are used to hold the byte-padding when there is room for an - // odd number of bytes before we must wrap. - // - UCHAR Ibuf[IBUF_SIZE + 2]; - volatile - USHORT Ibuf_stuff; // Stuffing index - volatile - USHORT Ibuf_strip; // Stripping index - - // The outgoing ring-buffer: Holds Data and command packets. N.B., even - // though these are in the channel structure, the channel is also written - // here, the easier to send it to the fifo when ready. HOWEVER, individual - // packets here are NOT padded to even length: the routines for writing - // blocks to the fifo will pad to even byte counts. - // - UCHAR Obuf[OBUF_SIZE+MAX_OBUF_BLOCK+4]; - volatile - USHORT Obuf_stuff; // Stuffing index - volatile - USHORT Obuf_strip; // Stripping index - int Obuf_char_count; - - // The outgoing bypass-command buffer. Unlike earlier manifestations, the - // flow control packets are sent directly from the structures. As above, the - // channel number is included in the packet, but they are NOT padded to even - // size. - // - UCHAR Cbuf[CBUF_SIZE+MAX_CBUF_BLOCK+2]; - volatile - USHORT Cbuf_stuff; // Stuffing index - volatile - USHORT Cbuf_strip; // Stripping index - - // The temporary buffer for the Linux tty driver PutChar entry. - // - UCHAR Pbuf[MAX_OBUF_BLOCK - sizeof (i2DataHeader)]; - volatile - USHORT Pbuf_stuff; // Stuffing index - - // The state of incoming data-set signals - // - USHORT dataSetIn; // Bit-mapped according to below. Also indicates - // whether a break has been detected since last - // inquiry. - - // The state of outcoming data-set signals (as far as we can tell!) - // - USHORT dataSetOut; // Bit-mapped according to below. - - // Most recent hot-key identifier detected - // - USHORT hotKeyIn; // Hot key as sent by the board, HOT_CLEAR indicates - // no hot key detected since last examined. - - // Counter of outstanding requests for bookmarks - // - short bookMarks; // Number of outstanding bookmark requests, (+ive - // whenever a bookmark request if queued up, -ive - // whenever a bookmark is received). - - // Misc options - // - USHORT channelOptions; // See below - - // To store various incoming special packets - // - debugStat channelStatus; - cntStat channelRcount; - cntStat channelTcount; - failStat channelFail; - - // To store the last values for line characteristics we sent to the board. - // - int speed; - - int flush_flags; - - void (*trace)(unsigned short,unsigned char,unsigned char,unsigned long,...); - - /* - * Kernel counters for the 4 input interrupts - */ - struct async_icount icount; - - /* - * Task queues for processing input packets from the board. - */ - struct work_struct tqueue_input; - struct work_struct tqueue_status; - struct work_struct tqueue_hangup; - - rwlock_t Ibuf_spinlock; - rwlock_t Obuf_spinlock; - rwlock_t Cbuf_spinlock; - rwlock_t Pbuf_spinlock; - -} i2ChanStr, *i2ChanStrPtr; - -//--------------------------------------------------- -// Manifests and bit-maps for elements in i2ChanStr -//--------------------------------------------------- -// -// flush flags -// -#define STARTFL_FLAG 1 -#define STOPFL_FLAG 2 - -// validity -// -#define CHANNEL_MAGIC_BITS 0xff00 -#define CHANNEL_MAGIC 0x5300 // (validity & CHANNEL_MAGIC_BITS) == - // CHANNEL_MAGIC --> structure good - -#define CHANNEL_SUPPORT 0x0001 // Indicates channel is supported, exists, - // and passed P.O.S.T. - -// channelNeeds -// -#define NEED_FLOW 1 // Indicates flow control has been queued -#define NEED_INLINE 2 // Indicates inline commands or data queued -#define NEED_BYPASS 4 // Indicates bypass commands queued -#define NEED_CREDIT 8 // Indicates would be sending except has not sufficient - // credit. The data is still in the channel structure, - // but the channel is not enqueued in the board - // structure again until there is a credit received from - // the board. - -// dataSetIn (Also the bits for i2GetStatus return value) -// -#define I2_DCD 1 -#define I2_CTS 2 -#define I2_DSR 4 -#define I2_RI 8 - -// dataSetOut (Also the bits for i2GetStatus return value) -// -#define I2_DTR 1 -#define I2_RTS 2 - -// i2GetStatus() can optionally clear these bits -// -#define I2_BRK 0x10 // A break was detected -#define I2_PAR 0x20 // A parity error was received -#define I2_FRA 0x40 // A framing error was received -#define I2_OVR 0x80 // An overrun error was received - -// i2GetStatus() automatically clears these bits */ -// -#define I2_DDCD 0x100 // DCD changed from its former value -#define I2_DCTS 0x200 // CTS changed from its former value -#define I2_DDSR 0x400 // DSR changed from its former value -#define I2_DRI 0x800 // RI changed from its former value - -// hotKeyIn -// -#define HOT_CLEAR 0x1322 // Indicates that no hot-key has been detected - -// channelOptions -// -#define CO_NBLOCK_WRITE 1 // Writes don't block waiting for buffer. (Default - // is, they do wait.) - -// fcmodes -// -#define I2_OUTFLOW_CTS 0x0001 -#define I2_INFLOW_RTS 0x0002 -#define I2_INFLOW_DSR 0x0004 -#define I2_INFLOW_DTR 0x0008 -#define I2_OUTFLOW_DSR 0x0010 -#define I2_OUTFLOW_DTR 0x0020 -#define I2_OUTFLOW_XON 0x0040 -#define I2_OUTFLOW_XANY 0x0080 -#define I2_INFLOW_XON 0x0100 - -#define I2_CRTSCTS (I2_OUTFLOW_CTS|I2_INFLOW_RTS) -#define I2_IXANY_MODE (I2_OUTFLOW_XON|I2_OUTFLOW_XANY) - -//------------------------------------------- -// Macros used from user level like functions -//------------------------------------------- - -// Macros to set and clear channel options -// -#define i2SetOption(pCh, option) pCh->channelOptions |= option -#define i2ClrOption(pCh, option) pCh->channelOptions &= ~option - -// Macro to set fatal-error trap -// -#define i2SetFatalTrap(pB, routine) pB->i2eFatalTrap = routine - -//-------------------------------------------- -// Declarations and prototypes for i2lib.c -//-------------------------------------------- -// -static int i2InitChannels(i2eBordStrPtr, int, i2ChanStrPtr); -static int i2QueueCommands(int, i2ChanStrPtr, int, int, cmdSyntaxPtr,...); -static int i2GetStatus(i2ChanStrPtr, int); -static int i2Input(i2ChanStrPtr); -static int i2InputFlush(i2ChanStrPtr); -static int i2Output(i2ChanStrPtr, const char *, int); -static int i2OutputFree(i2ChanStrPtr); -static int i2ServiceBoard(i2eBordStrPtr); -static void i2DrainOutput(i2ChanStrPtr, int); - -#ifdef IP2DEBUG_TRACE -void ip2trace(unsigned short,unsigned char,unsigned char,unsigned long,...); -#else -#define ip2trace(a,b,c,d...) do {} while (0) -#endif - -// Argument to i2QueueCommands -// -#define C_IN_LINE 1 -#define C_BYPASS 0 - -#endif // I2LIB_H diff --git a/drivers/staging/tty/ip2/i2pack.h b/drivers/staging/tty/ip2/i2pack.h deleted file mode 100644 index 00342a6..0000000 --- a/drivers/staging/tty/ip2/i2pack.h +++ /dev/null @@ -1,364 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Definitions of the packets used to transfer data and commands -* Host <--> Board. Information provided here is only applicable -* when the standard loadware is active. -* -*******************************************************************************/ -#ifndef I2PACK_H -#define I2PACK_H 1 - -//----------------------------------------------- -// Revision History: -// -// 10 October 1991 MAG First draft -// 24 February 1992 MAG Additions for 1.4.x loadware -// 11 March 1992 MAG New status packets -// -//----------------------------------------------- - -//------------------------------------------------------------------------------ -// Packet Formats: -// -// Information passes between the host and board through the FIFO in packets. -// These have headers which indicate the type of packet. Because the fifo data -// path may be 16-bits wide, the protocol is constrained such that each packet -// is always padded to an even byte count. (The lower-level interface routines -// -- i2ellis.c -- are designed to do this). -// -// The sender (be it host or board) must place some number of complete packets -// in the fifo, then place a message in the mailbox that packets are available. -// Placing such a message interrupts the "receiver" (be it board or host), who -// reads the mailbox message and determines that there are incoming packets -// ready. Since there are no partial packets, and the length of a packet is -// given in the header, the remainder of the packet can be read without checking -// for FIFO empty condition. The process is repeated, packet by packet, until -// the incoming FIFO is empty. Then the receiver uses the outbound mailbox to -// signal the board that it has read the data. Only then can the sender place -// additional data in the fifo. -//------------------------------------------------------------------------------ -// -//------------------------------------------------ -// Definition of Packet Header Area -//------------------------------------------------ -// -// Caution: these only define header areas. In actual use the data runs off -// beyond the end of these structures. -// -// Since these structures are based on sequences of bytes which go to the board, -// there cannot be ANY padding between the elements. -#pragma pack(1) - -//---------------------------- -// DATA PACKETS -//---------------------------- - -typedef struct _i2DataHeader -{ - unsigned char i2sChannel; /* The channel number: 0-255 */ - - // -- Bitfields are allocated LSB first -- - - // For incoming data, indicates whether this is an ordinary packet or a - // special one (e.g., hot key hit). - unsigned i2sId : 2 __attribute__ ((__packed__)); - - // For tagging data packets. There are flush commands which flush only data - // packets bearing a particular tag. (used in implementing IntelliView and - // IntelliPrint). THE TAG VALUE 0xf is RESERVED and must not be used (it has - // meaning internally to the loadware). - unsigned i2sTag : 4; - - // These two bits determine the type of packet sent/received. - unsigned i2sType : 2; - - // The count of data to follow: does not include the possible additional - // padding byte. MAXIMUM COUNT: 4094. The top four bits must be 0. - unsigned short i2sCount; - -} i2DataHeader, *i2DataHeaderPtr; - -// Structure is immediately followed by the data, proper. - -//---------------------------- -// NON-DATA PACKETS -//---------------------------- - -typedef struct _i2CmdHeader -{ - unsigned char i2sChannel; // The channel number: 0-255 (Except where noted - // - see below - - // Number of bytes of commands, status or whatever to follow - unsigned i2sCount : 6; - - // These two bits determine the type of packet sent/received. - unsigned i2sType : 2; - -} i2CmdHeader, *i2CmdHeaderPtr; - -// Structure is immediately followed by the applicable data. - -//--------------------------------------- -// Flow Control Packets (Outbound) -//--------------------------------------- - -// One type of outbound command packet is so important that the entire structure -// is explicitly defined here. That is the flow-control packet. This is never -// sent by user-level code (as would be the commands to raise/lower DTR, for -// example). These are only sent by the library routines in response to reading -// incoming data into the buffers. -// -// The parameters inside the command block are maintained in place, then the -// block is sent at the appropriate time. - -typedef struct _flowIn -{ - i2CmdHeader hd; // Channel #, count, type (see above) - unsigned char fcmd; // The flow control command (37) - unsigned short asof; // As of byte number "asof" (LSB first!) I have room - // for "room" bytes - unsigned short room; -} flowIn, *flowInPtr; - -//---------------------------------------- -// (Incoming) Status Packets -//---------------------------------------- - -// Incoming packets which are non-data packets are status packets. In this case, -// the channel number in the header is unimportant. What follows are one or more -// sub-packets, the first word of which consists of the channel (first or low -// byte) and the status indicator (second or high byte), followed by possibly -// more data. - -#define STAT_CTS_UP 0 /* CTS raised (no other bytes) */ -#define STAT_CTS_DN 1 /* CTS dropped (no other bytes) */ -#define STAT_DCD_UP 2 /* DCD raised (no other bytes) */ -#define STAT_DCD_DN 3 /* DCD dropped (no other bytes) */ -#define STAT_DSR_UP 4 /* DSR raised (no other bytes) */ -#define STAT_DSR_DN 5 /* DSR dropped (no other bytes) */ -#define STAT_RI_UP 6 /* RI raised (no other bytes) */ -#define STAT_RI_DN 7 /* RI dropped (no other bytes) */ -#define STAT_BRK_DET 8 /* BRK detect (no other bytes) */ -#define STAT_FLOW 9 /* Flow control(-- more: see below */ -#define STAT_BMARK 10 /* Bookmark (no other bytes) - * Bookmark is sent as a response to - * a command 60: request for bookmark - */ -#define STAT_STATUS 11 /* Special packet: see below */ -#define STAT_TXCNT 12 /* Special packet: see below */ -#define STAT_RXCNT 13 /* Special packet: see below */ -#define STAT_BOXIDS 14 /* Special packet: see below */ -#define STAT_HWFAIL 15 /* Special packet: see below */ - -#define STAT_MOD_ERROR 0xc0 -#define STAT_MODEM 0xc0/* If status & STAT_MOD_ERROR: - * == STAT_MODEM, then this is a modem - * status packet, given in response to a - * CMD_DSS_NOW command. - * The low nibble has each data signal: - */ -#define STAT_MOD_DCD 0x8 -#define STAT_MOD_RI 0x4 -#define STAT_MOD_DSR 0x2 -#define STAT_MOD_CTS 0x1 - -#define STAT_ERROR 0x80/* If status & STAT_MOD_ERROR - * == STAT_ERROR, then - * sort of error on the channel. - * The remaining seven bits indicate - * what sort of error it is. - */ -/* The low three bits indicate parity, framing, or overrun errors */ - -#define STAT_E_PARITY 4 /* Parity error */ -#define STAT_E_FRAMING 2 /* Framing error */ -#define STAT_E_OVERRUN 1 /* (uxart) overrun error */ - -//--------------------------------------- -// STAT_FLOW packets -//--------------------------------------- - -typedef struct _flowStat -{ - unsigned short asof; - unsigned short room; -}flowStat, *flowStatPtr; - -// flowStat packets are received from the board to regulate the flow of outgoing -// data. A local copy of this structure is also kept to track the amount of -// credits used and credits remaining. "room" is the amount of space in the -// board's buffers, "as of" having received a certain byte number. When sending -// data to the fifo, you must calculate how much buffer space your packet will -// use. Add this to the current "asof" and subtract it from the current "room". -// -// The calculation for the board's buffer is given by CREDIT_USAGE, where size -// is the un-rounded count of either data characters or command characters. -// (Which is to say, the count rounded up, plus two). - -#define CREDIT_USAGE(size) (((size) + 3) & ~1) - -//--------------------------------------- -// STAT_STATUS packets -//--------------------------------------- - -typedef struct _debugStat -{ - unsigned char d_ccsr; - unsigned char d_txinh; - unsigned char d_stat1; - unsigned char d_stat2; -} debugStat, *debugStatPtr; - -// debugStat packets are sent to the host in response to a CMD_GET_STATUS -// command. Each byte is bit-mapped as described below: - -#define D_CCSR_XON 2 /* Has received XON, ready to transmit */ -#define D_CCSR_XOFF 4 /* Has received XOFF, not transmitting */ -#define D_CCSR_TXENAB 8 /* Transmitter is enabled */ -#define D_CCSR_RXENAB 0x80 /* Receiver is enabled */ - -#define D_TXINH_BREAK 1 /* We are sending a break */ -#define D_TXINH_EMPTY 2 /* No data to send */ -#define D_TXINH_SUSP 4 /* Output suspended via command 57 */ -#define D_TXINH_CMD 8 /* We are processing an in-line command */ -#define D_TXINH_LCD 0x10 /* LCD diagnostics are running */ -#define D_TXINH_PAUSE 0x20 /* We are processing a PAUSE command */ -#define D_TXINH_DCD 0x40 /* DCD is low, preventing transmission */ -#define D_TXINH_DSR 0x80 /* DSR is low, preventing transmission */ - -#define D_STAT1_TXEN 1 /* Transmit INTERRUPTS enabled */ -#define D_STAT1_RXEN 2 /* Receiver INTERRUPTS enabled */ -#define D_STAT1_MDEN 4 /* Modem (data set sigs) interrupts enabled */ -#define D_STAT1_RLM 8 /* Remote loopback mode selected */ -#define D_STAT1_LLM 0x10 /* Local internal loopback mode selected */ -#define D_STAT1_CTS 0x20 /* CTS is low, preventing transmission */ -#define D_STAT1_DTR 0x40 /* DTR is low, to stop remote transmission */ -#define D_STAT1_RTS 0x80 /* RTS is low, to stop remote transmission */ - -#define D_STAT2_TXMT 1 /* Transmit buffers are all empty */ -#define D_STAT2_RXMT 2 /* Receive buffers are all empty */ -#define D_STAT2_RXINH 4 /* Loadware has tried to inhibit remote - * transmission: dropped DTR, sent XOFF, - * whatever... - */ -#define D_STAT2_RXFLO 8 /* Loadware can send no more data to host - * until it receives a flow-control packet - */ -//----------------------------------------- -// STAT_TXCNT and STAT_RXCNT packets -//---------------------------------------- - -typedef struct _cntStat -{ - unsigned short cs_time; // (Assumes host is little-endian!) - unsigned short cs_count; -} cntStat, *cntStatPtr; - -// These packets are sent in response to a CMD_GET_RXCNT or a CMD_GET_TXCNT -// bypass command. cs_time is a running 1 Millisecond counter which acts as a -// time stamp. cs_count is a running counter of data sent or received from the -// uxarts. (Not including data added by the chip itself, as with CRLF -// processing). -//------------------------------------------ -// STAT_HWFAIL packets -//------------------------------------------ - -typedef struct _failStat -{ - unsigned char fs_written; - unsigned char fs_read; - unsigned short fs_address; -} failStat, *failStatPtr; - -// This packet is sent whenever the on-board diagnostic process detects an -// error. At startup, this process is dormant. The host can wake it up by -// issuing the bypass command CMD_HW_TEST. The process runs at low priority and -// performs continuous hardware verification; writing data to certain on-board -// registers, reading it back, and comparing. If it detects an error, this -// packet is sent to the host, and the process goes dormant again until the host -// sends another CMD_HW_TEST. It then continues with the next register to be -// tested. - -//------------------------------------------------------------------------------ -// Macros to deal with the headers more easily! Note that these are defined so -// they may be used as "left" as well as "right" expressions. -//------------------------------------------------------------------------------ - -// Given a pointer to the packet, reference the channel number -// -#define CHANNEL_OF(pP) ((i2DataHeaderPtr)(pP))->i2sChannel - -// Given a pointer to the packet, reference the Packet type -// -#define PTYPE_OF(pP) ((i2DataHeaderPtr)(pP))->i2sType - -// The possible types of packets -// -#define PTYPE_DATA 0 /* Host <--> Board */ -#define PTYPE_BYPASS 1 /* Host ---> Board */ -#define PTYPE_INLINE 2 /* Host ---> Board */ -#define PTYPE_STATUS 2 /* Host <--- Board */ - -// Given a pointer to a Data packet, reference the Tag -// -#define TAG_OF(pP) ((i2DataHeaderPtr)(pP))->i2sTag - -// Given a pointer to a Data packet, reference the data i.d. -// -#define ID_OF(pP) ((i2DataHeaderPtr)(pP))->i2sId - -// The possible types of ID's -// -#define ID_ORDINARY_DATA 0 -#define ID_HOT_KEY 1 - -// Given a pointer to a Data packet, reference the count -// -#define DATA_COUNT_OF(pP) ((i2DataHeaderPtr)(pP))->i2sCount - -// Given a pointer to a Data packet, reference the beginning of data -// -#define DATA_OF(pP) &((unsigned char *)(pP))[4] // 4 = size of header - -// Given a pointer to a Non-Data packet, reference the count -// -#define CMD_COUNT_OF(pP) ((i2CmdHeaderPtr)(pP))->i2sCount - -#define MAX_CMD_PACK_SIZE 62 // Maximum size of such a count - -// Given a pointer to a Non-Data packet, reference the beginning of data -// -#define CMD_OF(pP) &((unsigned char *)(pP))[2] // 2 = size of header - -//-------------------------------- -// MailBox Bits: -//-------------------------------- - -//-------------------------- -// Outgoing (host to board) -//-------------------------- -// -#define MB_OUT_STUFFED 0x80 // Host has placed output in fifo -#define MB_IN_STRIPPED 0x40 // Host has read in all input from fifo - -//-------------------------- -// Incoming (board to host) -//-------------------------- -// -#define MB_IN_STUFFED 0x80 // Board has placed input in fifo -#define MB_OUT_STRIPPED 0x40 // Board has read all output from fifo -#define MB_FATAL_ERROR 0x20 // Board has encountered a fatal error - -#pragma pack() // Reset padding to command-line default - -#endif // I2PACK_H - diff --git a/drivers/staging/tty/ip2/ip2.h b/drivers/staging/tty/ip2/ip2.h deleted file mode 100644 index 936ccc5..0000000 --- a/drivers/staging/tty/ip2/ip2.h +++ /dev/null @@ -1,107 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Driver constants for configuration and tuning -* -* NOTES: -* -*******************************************************************************/ -#ifndef IP2_H -#define IP2_H - -#include "ip2types.h" -#include "i2cmd.h" - -/*************/ -/* Constants */ -/*************/ - -/* Device major numbers - since version 2.0.26. */ -#define IP2_TTY_MAJOR 71 -#define IP2_CALLOUT_MAJOR 72 -#define IP2_IPL_MAJOR 73 - -/* Board configuration array. - * This array defines the hardware irq and address for up to IP2_MAX_BOARDS - * (4 supported per ip2_types.h) ISA board addresses and irqs MUST be specified, - * PCI and EISA boards are probed for and automagicly configed - * iff the addresses are set to 1 and 2 respectivily. - * 0x0100 - 0x03f0 == ISA - * 1 == PCI - * 2 == EISA - * 0 == (skip this board) - * This array defines the hardware addresses for them. Special - * addresses are EISA and PCI which go sniffing for boards. - - * In a multiboard system the position in the array determines which port - * devices are assigned to each board: - * board 0 is assigned ttyF0.. to ttyF63, - * board 1 is assigned ttyF64 to ttyF127, - * board 2 is assigned ttyF128 to ttyF191, - * board 3 is assigned ttyF192 to ttyF255. - * - * In PCI and EISA bus systems each range is mapped to card in - * monotonically increasing slot number order, ISA position is as specified - * here. - - * If the irqs are ALL set to 0,0,0,0 all boards operate in - * polled mode. For interrupt operation ISA boards require that the IRQ be - * specified, while PCI and EISA boards any nonzero entry - * will enable interrupts using the BIOS configured irq for the board. - * An invalid irq entry will default to polled mode for that card and print - * console warning. - - * When the driver is loaded as a module these setting can be overridden on the - * modprobe command line or on an option line in /etc/modprobe.conf. - * If the driver is built-in the configuration must be - * set here for ISA cards and address set to 1 and 2 for PCI and EISA. - * - * Here is an example that shows most if not all possibe combinations: - - *static ip2config_t ip2config = - *{ - * {11,1,0,0}, // irqs - * { // Addresses - * 0x0308, // Board 0, ttyF0 - ttyF63// ISA card at io=0x308, irq=11 - * 0x0001, // Board 1, ttyF64 - ttyF127//PCI card configured by BIOS - * 0x0000, // Board 2, ttyF128 - ttyF191// Slot skipped - * 0x0002 // Board 3, ttyF192 - ttyF255//EISA card configured by BIOS - * // but polled not irq driven - * } - *}; - */ - - /* this structure is zeroed out because the suggested method is to configure - * the driver as a module, set up the parameters with an options line in - * /etc/modprobe.conf and load with modprobe or kmod, the kernel - * module loader - */ - - /* This structure is NOW always initialized when the driver is initialized. - * Compiled in defaults MUST be added to the io and irq arrays in - * ip2.c. Those values are configurable from insmod parameters in the - * case of modules or from command line parameters (ip2=io,irq) when - * compiled in. - */ - -static ip2config_t ip2config = -{ - {0,0,0,0}, // irqs - { // Addresses - /* Do NOT set compile time defaults HERE! Use the arrays in - ip2.c! These WILL be overwritten! =mhw= */ - 0x0000, // Board 0, ttyF0 - ttyF63 - 0x0000, // Board 1, ttyF64 - ttyF127 - 0x0000, // Board 2, ttyF128 - ttyF191 - 0x0000 // Board 3, ttyF192 - ttyF255 - } -}; - -#endif diff --git a/drivers/staging/tty/ip2/ip2ioctl.h b/drivers/staging/tty/ip2/ip2ioctl.h deleted file mode 100644 index aa0a9da..0000000 --- a/drivers/staging/tty/ip2/ip2ioctl.h +++ /dev/null @@ -1,35 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Driver constants for configuration and tuning -* -* NOTES: -* -*******************************************************************************/ - -#ifndef IP2IOCTL_H -#define IP2IOCTL_H - -//************* -//* Constants * -//************* - -// High baud rates (if not defined elsewhere. -#ifndef B153600 -# define B153600 0010005 -#endif -#ifndef B307200 -# define B307200 0010006 -#endif -#ifndef B921600 -# define B921600 0010007 -#endif - -#endif diff --git a/drivers/staging/tty/ip2/ip2main.c b/drivers/staging/tty/ip2/ip2main.c deleted file mode 100644 index ba074fb..0000000 --- a/drivers/staging/tty/ip2/ip2main.c +++ /dev/null @@ -1,3234 +0,0 @@ -/* -* -* (c) 1999 by Computone Corporation -* -******************************************************************************** -* -* PACKAGE: Linux tty Device Driver for IntelliPort family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Mainline code for the device driver -* -*******************************************************************************/ -// ToDo: -// -// Fix the immediate DSS_NOW problem. -// Work over the channel stats return logic in ip2_ipl_ioctl so they -// make sense for all 256 possible channels and so the user space -// utilities will compile and work properly. -// -// Done: -// -// 1.2.14 /\/\|=mhw=|\/\/ -// Added bounds checking to ip2_ipl_ioctl to avoid potential terroristic acts. -// Changed the definition of ip2trace to be more consistent with kernel style -// Thanks to Andreas Dilger for these updates -// -// 1.2.13 /\/\|=mhw=|\/\/ -// DEVFS: Renamed ttf/{n} to tts/F{n} and cuf/{n} to cua/F{n} to conform -// to agreed devfs serial device naming convention. -// -// 1.2.12 /\/\|=mhw=|\/\/ -// Cleaned up some remove queue cut and paste errors -// -// 1.2.11 /\/\|=mhw=|\/\/ -// Clean up potential NULL pointer dereferences -// Clean up devfs registration -// Add kernel command line parsing for io and irq -// Compile defaults for io and irq are now set in ip2.c not ip2.h! -// Reworked poll_only hack for explicit parameter setting -// You must now EXPLICITLY set poll_only = 1 or set all irqs to 0 -// Merged ip2_loadmain and old_ip2_init -// Converted all instances of interruptible_sleep_on into queue calls -// Most of these had no race conditions but better to clean up now -// -// 1.2.10 /\/\|=mhw=|\/\/ -// Fixed the bottom half interrupt handler and enabled USE_IQI -// to split the interrupt handler into a formal top-half / bottom-half -// Fixed timing window on high speed processors that queued messages to -// the outbound mail fifo faster than the board could handle. -// -// 1.2.9 -// Four box EX was barfing on >128k kmalloc, made structure smaller by -// reducing output buffer size -// -// 1.2.8 -// Device file system support (MHW) -// -// 1.2.7 -// Fixed -// Reload of ip2 without unloading ip2main hangs system on cat of /proc/modules -// -// 1.2.6 -//Fixes DCD problems -// DCD was not reported when CLOCAL was set on call to TIOCMGET -// -//Enhancements: -// TIOCMGET requests and waits for status return -// No DSS interrupts enabled except for DCD when needed -// -// For internal use only -// -//#define IP2DEBUG_INIT -//#define IP2DEBUG_OPEN -//#define IP2DEBUG_WRITE -//#define IP2DEBUG_READ -//#define IP2DEBUG_IOCTL -//#define IP2DEBUG_IPL - -//#define IP2DEBUG_TRACE -//#define DEBUG_FIFO - -/************/ -/* Includes */ -/************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include - -#include "ip2types.h" -#include "ip2trace.h" -#include "ip2ioctl.h" -#include "ip2.h" -#include "i2ellis.h" -#include "i2lib.h" - -/***************** - * /proc/ip2mem * - *****************/ - -#include -#include - -static DEFINE_MUTEX(ip2_mutex); -static const struct file_operations ip2mem_proc_fops; -static const struct file_operations ip2_proc_fops; - -/********************/ -/* Type Definitions */ -/********************/ - -/*************/ -/* Constants */ -/*************/ - -/* String constants to identify ourselves */ -static const char pcName[] = "Computone IntelliPort Plus multiport driver"; -static const char pcVersion[] = "1.2.14"; - -/* String constants for port names */ -static const char pcDriver_name[] = "ip2"; -static const char pcIpl[] = "ip2ipl"; - -/***********************/ -/* Function Prototypes */ -/***********************/ - -/* Global module entry functions */ - -/* Private (static) functions */ -static int ip2_open(PTTY, struct file *); -static void ip2_close(PTTY, struct file *); -static int ip2_write(PTTY, const unsigned char *, int); -static int ip2_putchar(PTTY, unsigned char); -static void ip2_flush_chars(PTTY); -static int ip2_write_room(PTTY); -static int ip2_chars_in_buf(PTTY); -static void ip2_flush_buffer(PTTY); -static int ip2_ioctl(PTTY, UINT, ULONG); -static void ip2_set_termios(PTTY, struct ktermios *); -static void ip2_set_line_discipline(PTTY); -static void ip2_throttle(PTTY); -static void ip2_unthrottle(PTTY); -static void ip2_stop(PTTY); -static void ip2_start(PTTY); -static void ip2_hangup(PTTY); -static int ip2_tiocmget(struct tty_struct *tty); -static int ip2_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear); -static int ip2_get_icount(struct tty_struct *tty, - struct serial_icounter_struct *icount); - -static void set_irq(int, int); -static void ip2_interrupt_bh(struct work_struct *work); -static irqreturn_t ip2_interrupt(int irq, void *dev_id); -static void ip2_poll(unsigned long arg); -static inline void service_all_boards(void); -static void do_input(struct work_struct *); -static void do_status(struct work_struct *); - -static void ip2_wait_until_sent(PTTY,int); - -static void set_params (i2ChanStrPtr, struct ktermios *); -static int get_serial_info(i2ChanStrPtr, struct serial_struct __user *); -static int set_serial_info(i2ChanStrPtr, struct serial_struct __user *); - -static ssize_t ip2_ipl_read(struct file *, char __user *, size_t, loff_t *); -static ssize_t ip2_ipl_write(struct file *, const char __user *, size_t, loff_t *); -static long ip2_ipl_ioctl(struct file *, UINT, ULONG); -static int ip2_ipl_open(struct inode *, struct file *); - -static int DumpTraceBuffer(char __user *, int); -static int DumpFifoBuffer( char __user *, int); - -static void ip2_init_board(int, const struct firmware *); -static unsigned short find_eisa_board(int); -static int ip2_setup(char *str); - -/***************/ -/* Static Data */ -/***************/ - -static struct tty_driver *ip2_tty_driver; - -/* Here, then is a table of board pointers which the interrupt routine should - * scan through to determine who it must service. - */ -static unsigned short i2nBoards; // Number of boards here - -static i2eBordStrPtr i2BoardPtrTable[IP2_MAX_BOARDS]; - -static i2ChanStrPtr DevTable[IP2_MAX_PORTS]; -//DevTableMem just used to save addresses for kfree -static void *DevTableMem[IP2_MAX_BOARDS]; - -/* This is the driver descriptor for the ip2ipl device, which is used to - * download the loadware to the boards. - */ -static const struct file_operations ip2_ipl = { - .owner = THIS_MODULE, - .read = ip2_ipl_read, - .write = ip2_ipl_write, - .unlocked_ioctl = ip2_ipl_ioctl, - .open = ip2_ipl_open, - .llseek = noop_llseek, -}; - -static unsigned long irq_counter; -static unsigned long bh_counter; - -// Use immediate queue to service interrupts -#define USE_IQI -//#define USE_IQ // PCI&2.2 needs work - -/* The timer_list entry for our poll routine. If interrupt operation is not - * selected, the board is serviced periodically to see if anything needs doing. - */ -#define POLL_TIMEOUT (jiffies + 1) -static DEFINE_TIMER(PollTimer, ip2_poll, 0, 0); - -#ifdef IP2DEBUG_TRACE -/* Trace (debug) buffer data */ -#define TRACEMAX 1000 -static unsigned long tracebuf[TRACEMAX]; -static int tracestuff; -static int tracestrip; -static int tracewrap; -#endif - -/**********/ -/* Macros */ -/**********/ - -#ifdef IP2DEBUG_OPEN -#define DBG_CNT(s) printk(KERN_DEBUG "(%s): [%x] ttyc=%d, modc=%x -> %s\n", \ - tty->name,(pCh->flags), \ - tty->count,/*GET_USE_COUNT(module)*/0,s) -#else -#define DBG_CNT(s) -#endif - -/********/ -/* Code */ -/********/ - -#include "i2ellis.c" /* Extremely low-level interface services */ -#include "i2cmd.c" /* Standard loadware command definitions */ -#include "i2lib.c" /* High level interface services */ - -/* Configuration area for modprobe */ - -MODULE_AUTHOR("Doug McNash"); -MODULE_DESCRIPTION("Computone IntelliPort Plus Driver"); -MODULE_LICENSE("GPL"); - -#define MAX_CMD_STR 50 - -static int poll_only; -static char cmd[MAX_CMD_STR]; - -static int Eisa_irq; -static int Eisa_slot; - -static int iindx; -static char rirqs[IP2_MAX_BOARDS]; -static int Valid_Irqs[] = { 3, 4, 5, 7, 10, 11, 12, 15, 0}; - -/* Note: Add compiled in defaults to these arrays, not to the structure - in ip2.h any longer. That structure WILL get overridden - by these values, or command line values, or insmod values!!! =mhw= -*/ -static int io[IP2_MAX_BOARDS]; -static int irq[IP2_MAX_BOARDS] = { -1, -1, -1, -1 }; - -MODULE_AUTHOR("Doug McNash"); -MODULE_DESCRIPTION("Computone IntelliPort Plus Driver"); -module_param_array(irq, int, NULL, 0); -MODULE_PARM_DESC(irq, "Interrupts for IntelliPort Cards"); -module_param_array(io, int, NULL, 0); -MODULE_PARM_DESC(io, "I/O ports for IntelliPort Cards"); -module_param(poll_only, bool, 0); -MODULE_PARM_DESC(poll_only, "Do not use card interrupts"); -module_param_string(ip2, cmd, MAX_CMD_STR, 0); -MODULE_PARM_DESC(ip2, "Contains module parameter passed with 'ip2='"); - -/* for sysfs class support */ -static struct class *ip2_class; - -/* Some functions to keep track of what irqs we have */ - -static int __init is_valid_irq(int irq) -{ - int *i = Valid_Irqs; - - while (*i != 0 && *i != irq) - i++; - - return *i; -} - -static void __init mark_requested_irq(char irq) -{ - rirqs[iindx++] = irq; -} - -static int __exit clear_requested_irq(char irq) -{ - int i; - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - if (rirqs[i] == irq) { - rirqs[i] = 0; - return 1; - } - } - return 0; -} - -static int have_requested_irq(char irq) -{ - /* array init to zeros so 0 irq will not be requested as a side - * effect */ - int i; - for (i = 0; i < IP2_MAX_BOARDS; ++i) - if (rirqs[i] == irq) - return 1; - return 0; -} - -/******************************************************************************/ -/* Function: cleanup_module() */ -/* Parameters: None */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This is a required entry point for an installable module. It has to return */ -/* the device and the driver to a passive state. It should not be necessary */ -/* to reset the board fully, especially as the loadware is downloaded */ -/* externally rather than in the driver. We just want to disable the board */ -/* and clear the loadware to a reset state. To allow this there has to be a */ -/* way to detect whether the board has the loadware running at init time to */ -/* handle subsequent installations of the driver. All memory allocated by the */ -/* driver should be returned since it may be unloaded from memory. */ -/******************************************************************************/ -static void __exit ip2_cleanup_module(void) -{ - int err; - int i; - - del_timer_sync(&PollTimer); - - /* Reset the boards we have. */ - for (i = 0; i < IP2_MAX_BOARDS; i++) - if (i2BoardPtrTable[i]) - iiReset(i2BoardPtrTable[i]); - - /* The following is done at most once, if any boards were installed. */ - for (i = 0; i < IP2_MAX_BOARDS; i++) { - if (i2BoardPtrTable[i]) { - iiResetDelay(i2BoardPtrTable[i]); - /* free io addresses and Tibet */ - release_region(ip2config.addr[i], 8); - device_destroy(ip2_class, MKDEV(IP2_IPL_MAJOR, 4 * i)); - device_destroy(ip2_class, MKDEV(IP2_IPL_MAJOR, - 4 * i + 1)); - } - /* Disable and remove interrupt handler. */ - if (ip2config.irq[i] > 0 && - have_requested_irq(ip2config.irq[i])) { - free_irq(ip2config.irq[i], (void *)&pcName); - clear_requested_irq(ip2config.irq[i]); - } - } - class_destroy(ip2_class); - err = tty_unregister_driver(ip2_tty_driver); - if (err) - printk(KERN_ERR "IP2: failed to unregister tty driver (%d)\n", - err); - put_tty_driver(ip2_tty_driver); - unregister_chrdev(IP2_IPL_MAJOR, pcIpl); - remove_proc_entry("ip2mem", NULL); - - /* free memory */ - for (i = 0; i < IP2_MAX_BOARDS; i++) { - void *pB; -#ifdef CONFIG_PCI - if (ip2config.type[i] == PCI && ip2config.pci_dev[i]) { - pci_disable_device(ip2config.pci_dev[i]); - pci_dev_put(ip2config.pci_dev[i]); - ip2config.pci_dev[i] = NULL; - } -#endif - pB = i2BoardPtrTable[i]; - if (pB != NULL) { - kfree(pB); - i2BoardPtrTable[i] = NULL; - } - if (DevTableMem[i] != NULL) { - kfree(DevTableMem[i]); - DevTableMem[i] = NULL; - } - } -} -module_exit(ip2_cleanup_module); - -static const struct tty_operations ip2_ops = { - .open = ip2_open, - .close = ip2_close, - .write = ip2_write, - .put_char = ip2_putchar, - .flush_chars = ip2_flush_chars, - .write_room = ip2_write_room, - .chars_in_buffer = ip2_chars_in_buf, - .flush_buffer = ip2_flush_buffer, - .ioctl = ip2_ioctl, - .throttle = ip2_throttle, - .unthrottle = ip2_unthrottle, - .set_termios = ip2_set_termios, - .set_ldisc = ip2_set_line_discipline, - .stop = ip2_stop, - .start = ip2_start, - .hangup = ip2_hangup, - .tiocmget = ip2_tiocmget, - .tiocmset = ip2_tiocmset, - .get_icount = ip2_get_icount, - .proc_fops = &ip2_proc_fops, -}; - -/******************************************************************************/ -/* Function: ip2_loadmain() */ -/* Parameters: irq, io from command line of insmod et. al. */ -/* pointer to fip firmware and firmware size for boards */ -/* Returns: Success (0) */ -/* */ -/* Description: */ -/* This was the required entry point for all drivers (now in ip2.c) */ -/* It performs all */ -/* initialisation of the devices and driver structures, and registers itself */ -/* with the relevant kernel modules. */ -/******************************************************************************/ -/* IRQF_DISABLED - if set blocks all interrupts else only this line */ -/* IRQF_SHARED - for shared irq PCI or maybe EISA only */ -/* SA_RANDOM - can be source for cert. random number generators */ -#define IP2_SA_FLAGS 0 - - -static const struct firmware *ip2_request_firmware(void) -{ - struct platform_device *pdev; - const struct firmware *fw; - - pdev = platform_device_register_simple("ip2", 0, NULL, 0); - if (IS_ERR(pdev)) { - printk(KERN_ERR "Failed to register platform device for ip2\n"); - return NULL; - } - if (request_firmware(&fw, "intelliport2.bin", &pdev->dev)) { - printk(KERN_ERR "Failed to load firmware 'intelliport2.bin'\n"); - fw = NULL; - } - platform_device_unregister(pdev); - return fw; -} - -/****************************************************************************** - * ip2_setup: - * str: kernel command line string - * - * Can't autoprobe the boards so user must specify configuration on - * kernel command line. Sane people build it modular but the others - * come here. - * - * Alternating pairs of io,irq for up to 4 boards. - * ip2=io0,irq0,io1,irq1,io2,irq2,io3,irq3 - * - * io=0 => No board - * io=1 => PCI - * io=2 => EISA - * else => ISA I/O address - * - * irq=0 or invalid for ISA will revert to polling mode - * - * Any value = -1, do not overwrite compiled in value. - * - ******************************************************************************/ -static int __init ip2_setup(char *str) -{ - int j, ints[10]; /* 4 boards, 2 parameters + 2 */ - unsigned int i; - - str = get_options(str, ARRAY_SIZE(ints), ints); - - for (i = 0, j = 1; i < 4; i++) { - if (j > ints[0]) - break; - if (ints[j] >= 0) - io[i] = ints[j]; - j++; - if (j > ints[0]) - break; - if (ints[j] >= 0) - irq[i] = ints[j]; - j++; - } - return 1; -} -__setup("ip2=", ip2_setup); - -static int __init ip2_loadmain(void) -{ - int i, j, box; - int err = 0; - i2eBordStrPtr pB = NULL; - int rc = -1; - const struct firmware *fw = NULL; - char *str; - - str = cmd; - - if (poll_only) { - /* Hard lock the interrupts to zero */ - irq[0] = irq[1] = irq[2] = irq[3] = poll_only = 0; - } - - /* Check module parameter with 'ip2=' has been passed or not */ - if (!poll_only && (!strncmp(str, "ip2=", 4))) - ip2_setup(str); - - ip2trace(ITRC_NO_PORT, ITRC_INIT, ITRC_ENTER, 0); - - /* process command line arguments to modprobe or - insmod i.e. iop & irqp */ - /* irqp and iop should ALWAYS be specified now... But we check - them individually just to be sure, anyways... */ - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - ip2config.addr[i] = io[i]; - if (irq[i] >= 0) - ip2config.irq[i] = irq[i]; - else - ip2config.irq[i] = 0; - /* This is a little bit of a hack. If poll_only=1 on command - line back in ip2.c OR all IRQs on all specified boards are - explicitly set to 0, then drop to poll only mode and override - PCI or EISA interrupts. This superceeds the old hack of - triggering if all interrupts were zero (like da default). - Still a hack but less prone to random acts of terrorism. - - What we really should do, now that the IRQ default is set - to -1, is to use 0 as a hard coded, do not probe. - - /\/\|=mhw=|\/\/ - */ - poll_only |= irq[i]; - } - poll_only = !poll_only; - - /* Announce our presence */ - printk(KERN_INFO "%s version %s\n", pcName, pcVersion); - - ip2_tty_driver = alloc_tty_driver(IP2_MAX_PORTS); - if (!ip2_tty_driver) - return -ENOMEM; - - /* Initialise all the boards we can find (up to the maximum). */ - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - switch (ip2config.addr[i]) { - case 0: /* skip this slot even if card is present */ - break; - default: /* ISA */ - /* ISA address must be specified */ - if (ip2config.addr[i] < 0x100 || - ip2config.addr[i] > 0x3f8) { - printk(KERN_ERR "IP2: Bad ISA board %d " - "address %x\n", i, - ip2config.addr[i]); - ip2config.addr[i] = 0; - break; - } - ip2config.type[i] = ISA; - - /* Check for valid irq argument, set for polling if - * invalid */ - if (ip2config.irq[i] && - !is_valid_irq(ip2config.irq[i])) { - printk(KERN_ERR "IP2: Bad IRQ(%d) specified\n", - ip2config.irq[i]); - /* 0 is polling and is valid in that sense */ - ip2config.irq[i] = 0; - } - break; - case PCI: -#ifdef CONFIG_PCI - { - struct pci_dev *pdev = NULL; - u32 addr; - int status; - - pdev = pci_get_device(PCI_VENDOR_ID_COMPUTONE, - PCI_DEVICE_ID_COMPUTONE_IP2EX, pdev); - if (pdev == NULL) { - ip2config.addr[i] = 0; - printk(KERN_ERR "IP2: PCI board %d not " - "found\n", i); - break; - } - - if (pci_enable_device(pdev)) { - dev_err(&pdev->dev, "can't enable device\n"); - goto out; - } - ip2config.type[i] = PCI; - ip2config.pci_dev[i] = pci_dev_get(pdev); - status = pci_read_config_dword(pdev, PCI_BASE_ADDRESS_1, - &addr); - if (addr & 1) - ip2config.addr[i] = (USHORT)(addr & 0xfffe); - else - dev_err(&pdev->dev, "I/O address error\n"); - - ip2config.irq[i] = pdev->irq; -out: - pci_dev_put(pdev); - } -#else - printk(KERN_ERR "IP2: PCI card specified but PCI " - "support not enabled.\n"); - printk(KERN_ERR "IP2: Recompile kernel with CONFIG_PCI " - "defined!\n"); -#endif /* CONFIG_PCI */ - break; - case EISA: - ip2config.addr[i] = find_eisa_board(Eisa_slot + 1); - if (ip2config.addr[i] != 0) { - /* Eisa_irq set as side effect, boo */ - ip2config.type[i] = EISA; - } - ip2config.irq[i] = Eisa_irq; - break; - } /* switch */ - } /* for */ - - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - if (ip2config.addr[i]) { - pB = kzalloc(sizeof(i2eBordStr), GFP_KERNEL); - if (pB) { - i2BoardPtrTable[i] = pB; - iiSetAddress(pB, ip2config.addr[i], - ii2DelayTimer); - iiReset(pB); - } else - printk(KERN_ERR "IP2: board memory allocation " - "error\n"); - } - } - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - pB = i2BoardPtrTable[i]; - if (pB != NULL) { - iiResetDelay(pB); - break; - } - } - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - /* We don't want to request the firmware unless we have at - least one board */ - if (i2BoardPtrTable[i] != NULL) { - if (!fw) - fw = ip2_request_firmware(); - if (!fw) - break; - ip2_init_board(i, fw); - } - } - if (fw) - release_firmware(fw); - - ip2trace(ITRC_NO_PORT, ITRC_INIT, 2, 0); - - ip2_tty_driver->owner = THIS_MODULE; - ip2_tty_driver->name = "ttyF"; - ip2_tty_driver->driver_name = pcDriver_name; - ip2_tty_driver->major = IP2_TTY_MAJOR; - ip2_tty_driver->minor_start = 0; - ip2_tty_driver->type = TTY_DRIVER_TYPE_SERIAL; - ip2_tty_driver->subtype = SERIAL_TYPE_NORMAL; - ip2_tty_driver->init_termios = tty_std_termios; - ip2_tty_driver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; - ip2_tty_driver->flags = TTY_DRIVER_REAL_RAW | - TTY_DRIVER_DYNAMIC_DEV; - tty_set_operations(ip2_tty_driver, &ip2_ops); - - ip2trace(ITRC_NO_PORT, ITRC_INIT, 3, 0); - - err = tty_register_driver(ip2_tty_driver); - if (err) { - printk(KERN_ERR "IP2: failed to register tty driver\n"); - put_tty_driver(ip2_tty_driver); - return err; /* leaking resources */ - } - - err = register_chrdev(IP2_IPL_MAJOR, pcIpl, &ip2_ipl); - if (err) { - printk(KERN_ERR "IP2: failed to register IPL device (%d)\n", - err); - } else { - /* create the sysfs class */ - ip2_class = class_create(THIS_MODULE, "ip2"); - if (IS_ERR(ip2_class)) { - err = PTR_ERR(ip2_class); - goto out_chrdev; - } - } - /* Register the read_procmem thing */ - if (!proc_create("ip2mem",0,NULL,&ip2mem_proc_fops)) { - printk(KERN_ERR "IP2: failed to register read_procmem\n"); - return -EIO; /* leaking resources */ - } - - ip2trace(ITRC_NO_PORT, ITRC_INIT, 4, 0); - /* Register the interrupt handler or poll handler, depending upon the - * specified interrupt. - */ - - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - if (ip2config.addr[i] == 0) - continue; - - pB = i2BoardPtrTable[i]; - if (pB != NULL) { - device_create(ip2_class, NULL, - MKDEV(IP2_IPL_MAJOR, 4 * i), - NULL, "ipl%d", i); - device_create(ip2_class, NULL, - MKDEV(IP2_IPL_MAJOR, 4 * i + 1), - NULL, "stat%d", i); - - for (box = 0; box < ABS_MAX_BOXES; box++) - for (j = 0; j < ABS_BIGGEST_BOX; j++) - if (pB->i2eChannelMap[box] & (1 << j)) - tty_register_device( - ip2_tty_driver, - j + ABS_BIGGEST_BOX * - (box+i*ABS_MAX_BOXES), - NULL); - } - - if (poll_only) { - /* Poll only forces driver to only use polling and - to ignore the probed PCI or EISA interrupts. */ - ip2config.irq[i] = CIR_POLL; - } - if (ip2config.irq[i] == CIR_POLL) { -retry: - if (!timer_pending(&PollTimer)) { - mod_timer(&PollTimer, POLL_TIMEOUT); - printk(KERN_INFO "IP2: polling\n"); - } - } else { - if (have_requested_irq(ip2config.irq[i])) - continue; - rc = request_irq(ip2config.irq[i], ip2_interrupt, - IP2_SA_FLAGS | - (ip2config.type[i] == PCI ? IRQF_SHARED : 0), - pcName, i2BoardPtrTable[i]); - if (rc) { - printk(KERN_ERR "IP2: request_irq failed: " - "error %d\n", rc); - ip2config.irq[i] = CIR_POLL; - printk(KERN_INFO "IP2: Polling %ld/sec.\n", - (POLL_TIMEOUT - jiffies)); - goto retry; - } - mark_requested_irq(ip2config.irq[i]); - /* Initialise the interrupt handler bottom half - * (aka slih). */ - } - } - - for (i = 0; i < IP2_MAX_BOARDS; ++i) { - if (i2BoardPtrTable[i]) { - /* set and enable board interrupt */ - set_irq(i, ip2config.irq[i]); - } - } - - ip2trace(ITRC_NO_PORT, ITRC_INIT, ITRC_RETURN, 0); - - return 0; - -out_chrdev: - unregister_chrdev(IP2_IPL_MAJOR, "ip2"); - /* unregister and put tty here */ - return err; -} -module_init(ip2_loadmain); - -/******************************************************************************/ -/* Function: ip2_init_board() */ -/* Parameters: Index of board in configuration structure */ -/* Returns: Success (0) */ -/* */ -/* Description: */ -/* This function initializes the specified board. The loadware is copied to */ -/* the board, the channel structures are initialized, and the board details */ -/* are reported on the console. */ -/******************************************************************************/ -static void -ip2_init_board(int boardnum, const struct firmware *fw) -{ - int i; - int nports = 0, nboxes = 0; - i2ChanStrPtr pCh; - i2eBordStrPtr pB = i2BoardPtrTable[boardnum]; - - if ( !iiInitialize ( pB ) ) { - printk ( KERN_ERR "IP2: Failed to initialize board at 0x%x, error %d\n", - pB->i2eBase, pB->i2eError ); - goto err_initialize; - } - printk(KERN_INFO "IP2: Board %d: addr=0x%x irq=%d\n", boardnum + 1, - ip2config.addr[boardnum], ip2config.irq[boardnum] ); - - if (!request_region( ip2config.addr[boardnum], 8, pcName )) { - printk(KERN_ERR "IP2: bad addr=0x%x\n", ip2config.addr[boardnum]); - goto err_initialize; - } - - if ( iiDownloadAll ( pB, (loadHdrStrPtr)fw->data, 1, fw->size ) - != II_DOWN_GOOD ) { - printk ( KERN_ERR "IP2: failed to download loadware\n" ); - goto err_release_region; - } else { - printk ( KERN_INFO "IP2: fv=%d.%d.%d lv=%d.%d.%d\n", - pB->i2ePom.e.porVersion, - pB->i2ePom.e.porRevision, - pB->i2ePom.e.porSubRev, pB->i2eLVersion, - pB->i2eLRevision, pB->i2eLSub ); - } - - switch ( pB->i2ePom.e.porID & ~POR_ID_RESERVED ) { - - default: - printk( KERN_ERR "IP2: Unknown board type, ID = %x\n", - pB->i2ePom.e.porID ); - nports = 0; - goto err_release_region; - break; - - case POR_ID_II_4: /* IntelliPort-II, ISA-4 (4xRJ45) */ - printk ( KERN_INFO "IP2: ISA-4\n" ); - nports = 4; - break; - - case POR_ID_II_8: /* IntelliPort-II, 8-port using standard brick. */ - printk ( KERN_INFO "IP2: ISA-8 std\n" ); - nports = 8; - break; - - case POR_ID_II_8R: /* IntelliPort-II, 8-port using RJ11's (no CTS) */ - printk ( KERN_INFO "IP2: ISA-8 RJ11\n" ); - nports = 8; - break; - - case POR_ID_FIIEX: /* IntelliPort IIEX */ - { - int portnum = IP2_PORTS_PER_BOARD * boardnum; - int box; - - for( box = 0; box < ABS_MAX_BOXES; ++box ) { - if ( pB->i2eChannelMap[box] != 0 ) { - ++nboxes; - } - for( i = 0; i < ABS_BIGGEST_BOX; ++i ) { - if ( pB->i2eChannelMap[box] & 1<< i ) { - ++nports; - } - } - } - DevTableMem[boardnum] = pCh = - kmalloc( sizeof(i2ChanStr) * nports, GFP_KERNEL ); - if ( !pCh ) { - printk ( KERN_ERR "IP2: (i2_init_channel:) Out of memory.\n"); - goto err_release_region; - } - if ( !i2InitChannels( pB, nports, pCh ) ) { - printk(KERN_ERR "IP2: i2InitChannels failed: %d\n",pB->i2eError); - kfree ( pCh ); - goto err_release_region; - } - pB->i2eChannelPtr = &DevTable[portnum]; - pB->i2eChannelCnt = ABS_MOST_PORTS; - - for( box = 0; box < ABS_MAX_BOXES; ++box, portnum += ABS_BIGGEST_BOX ) { - for( i = 0; i < ABS_BIGGEST_BOX; ++i ) { - if ( pB->i2eChannelMap[box] & (1 << i) ) { - DevTable[portnum + i] = pCh; - pCh->port_index = portnum + i; - pCh++; - } - } - } - printk(KERN_INFO "IP2: EX box=%d ports=%d %d bit\n", - nboxes, nports, pB->i2eDataWidth16 ? 16 : 8 ); - } - goto ex_exit; - } - DevTableMem[boardnum] = pCh = - kmalloc ( sizeof (i2ChanStr) * nports, GFP_KERNEL ); - if ( !pCh ) { - printk ( KERN_ERR "IP2: (i2_init_channel:) Out of memory.\n"); - goto err_release_region; - } - pB->i2eChannelPtr = pCh; - pB->i2eChannelCnt = nports; - if ( !i2InitChannels( pB, nports, pCh ) ) { - printk(KERN_ERR "IP2: i2InitChannels failed: %d\n",pB->i2eError); - kfree ( pCh ); - goto err_release_region; - } - pB->i2eChannelPtr = &DevTable[IP2_PORTS_PER_BOARD * boardnum]; - - for( i = 0; i < pB->i2eChannelCnt; ++i ) { - DevTable[IP2_PORTS_PER_BOARD * boardnum + i] = pCh; - pCh->port_index = (IP2_PORTS_PER_BOARD * boardnum) + i; - pCh++; - } -ex_exit: - INIT_WORK(&pB->tqueue_interrupt, ip2_interrupt_bh); - return; - -err_release_region: - release_region(ip2config.addr[boardnum], 8); -err_initialize: - kfree ( pB ); - i2BoardPtrTable[boardnum] = NULL; - return; -} - -/******************************************************************************/ -/* Function: find_eisa_board ( int start_slot ) */ -/* Parameters: First slot to check */ -/* Returns: Address of EISA IntelliPort II controller */ -/* */ -/* Description: */ -/* This function searches for an EISA IntelliPort controller, starting */ -/* from the specified slot number. If the motherboard is not identified as an */ -/* EISA motherboard, or no valid board ID is selected it returns 0. Otherwise */ -/* it returns the base address of the controller. */ -/******************************************************************************/ -static unsigned short -find_eisa_board( int start_slot ) -{ - int i, j; - unsigned int idm = 0; - unsigned int idp = 0; - unsigned int base = 0; - unsigned int value; - int setup_address; - int setup_irq; - int ismine = 0; - - /* - * First a check for an EISA motherboard, which we do by comparing the - * EISA ID registers for the system board and the first couple of slots. - * No slot ID should match the system board ID, but on an ISA or PCI - * machine the odds are that an empty bus will return similar values for - * each slot. - */ - i = 0x0c80; - value = (inb(i) << 24) + (inb(i+1) << 16) + (inb(i+2) << 8) + inb(i+3); - for( i = 0x1c80; i <= 0x4c80; i += 0x1000 ) { - j = (inb(i)<<24)+(inb(i+1)<<16)+(inb(i+2)<<8)+inb(i+3); - if ( value == j ) - return 0; - } - - /* - * OK, so we are inclined to believe that this is an EISA machine. Find - * an IntelliPort controller. - */ - for( i = start_slot; i < 16; i++ ) { - base = i << 12; - idm = (inb(base + 0xc80) << 8) | (inb(base + 0xc81) & 0xff); - idp = (inb(base + 0xc82) << 8) | (inb(base + 0xc83) & 0xff); - ismine = 0; - if ( idm == 0x0e8e ) { - if ( idp == 0x0281 || idp == 0x0218 ) { - ismine = 1; - } else if ( idp == 0x0282 || idp == 0x0283 ) { - ismine = 3; /* Can do edge-trigger */ - } - if ( ismine ) { - Eisa_slot = i; - break; - } - } - } - if ( !ismine ) - return 0; - - /* It's some sort of EISA card, but at what address is it configured? */ - - setup_address = base + 0xc88; - value = inb(base + 0xc86); - setup_irq = (value & 8) ? Valid_Irqs[value & 7] : 0; - - if ( (ismine & 2) && !(value & 0x10) ) { - ismine = 1; /* Could be edging, but not */ - } - - if ( Eisa_irq == 0 ) { - Eisa_irq = setup_irq; - } else if ( Eisa_irq != setup_irq ) { - printk ( KERN_ERR "IP2: EISA irq mismatch between EISA controllers\n" ); - } - -#ifdef IP2DEBUG_INIT -printk(KERN_DEBUG "Computone EISA board in slot %d, I.D. 0x%x%x, Address 0x%x", - base >> 12, idm, idp, setup_address); - if ( Eisa_irq ) { - printk(KERN_DEBUG ", Interrupt %d %s\n", - setup_irq, (ismine & 2) ? "(edge)" : "(level)"); - } else { - printk(KERN_DEBUG ", (polled)\n"); - } -#endif - return setup_address; -} - -/******************************************************************************/ -/* Function: set_irq() */ -/* Parameters: index to board in board table */ -/* IRQ to use */ -/* Returns: Success (0) */ -/* */ -/* Description: */ -/******************************************************************************/ -static void -set_irq( int boardnum, int boardIrq ) -{ - unsigned char tempCommand[16]; - i2eBordStrPtr pB = i2BoardPtrTable[boardnum]; - unsigned long flags; - - /* - * Notify the boards they may generate interrupts. This is done by - * sending an in-line command to channel 0 on each board. This is why - * the channels have to be defined already. For each board, if the - * interrupt has never been defined, we must do so NOW, directly, since - * board will not send flow control or even give an interrupt until this - * is done. If polling we must send 0 as the interrupt parameter. - */ - - // We will get an interrupt here at the end of this function - - iiDisableMailIrq(pB); - - /* We build up the entire packet header. */ - CHANNEL_OF(tempCommand) = 0; - PTYPE_OF(tempCommand) = PTYPE_INLINE; - CMD_COUNT_OF(tempCommand) = 2; - (CMD_OF(tempCommand))[0] = CMDVALUE_IRQ; - (CMD_OF(tempCommand))[1] = boardIrq; - /* - * Write to FIFO; don't bother to adjust fifo capacity for this, since - * board will respond almost immediately after SendMail hit. - */ - write_lock_irqsave(&pB->write_fifo_spinlock, flags); - iiWriteBuf(pB, tempCommand, 4); - write_unlock_irqrestore(&pB->write_fifo_spinlock, flags); - pB->i2eUsingIrq = boardIrq; - pB->i2eOutMailWaiting |= MB_OUT_STUFFED; - - /* Need to update number of boards before you enable mailbox int */ - ++i2nBoards; - - CHANNEL_OF(tempCommand) = 0; - PTYPE_OF(tempCommand) = PTYPE_BYPASS; - CMD_COUNT_OF(tempCommand) = 6; - (CMD_OF(tempCommand))[0] = 88; // SILO - (CMD_OF(tempCommand))[1] = 64; // chars - (CMD_OF(tempCommand))[2] = 32; // ms - - (CMD_OF(tempCommand))[3] = 28; // MAX_BLOCK - (CMD_OF(tempCommand))[4] = 64; // chars - - (CMD_OF(tempCommand))[5] = 87; // HW_TEST - write_lock_irqsave(&pB->write_fifo_spinlock, flags); - iiWriteBuf(pB, tempCommand, 8); - write_unlock_irqrestore(&pB->write_fifo_spinlock, flags); - - CHANNEL_OF(tempCommand) = 0; - PTYPE_OF(tempCommand) = PTYPE_BYPASS; - CMD_COUNT_OF(tempCommand) = 1; - (CMD_OF(tempCommand))[0] = 84; /* get BOX_IDS */ - iiWriteBuf(pB, tempCommand, 3); - -#ifdef XXX - // enable heartbeat for test porpoises - CHANNEL_OF(tempCommand) = 0; - PTYPE_OF(tempCommand) = PTYPE_BYPASS; - CMD_COUNT_OF(tempCommand) = 2; - (CMD_OF(tempCommand))[0] = 44; /* get ping */ - (CMD_OF(tempCommand))[1] = 200; /* 200 ms */ - write_lock_irqsave(&pB->write_fifo_spinlock, flags); - iiWriteBuf(pB, tempCommand, 4); - write_unlock_irqrestore(&pB->write_fifo_spinlock, flags); -#endif - - iiEnableMailIrq(pB); - iiSendPendingMail(pB); -} - -/******************************************************************************/ -/* Interrupt Handler Section */ -/******************************************************************************/ - -static inline void -service_all_boards(void) -{ - int i; - i2eBordStrPtr pB; - - /* Service every board on the list */ - for( i = 0; i < IP2_MAX_BOARDS; ++i ) { - pB = i2BoardPtrTable[i]; - if ( pB ) { - i2ServiceBoard( pB ); - } - } -} - - -/******************************************************************************/ -/* Function: ip2_interrupt_bh(work) */ -/* Parameters: work - pointer to the board structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* Service the board in a bottom half interrupt handler and then */ -/* reenable the board's interrupts if it has an IRQ number */ -/* */ -/******************************************************************************/ -static void -ip2_interrupt_bh(struct work_struct *work) -{ - i2eBordStrPtr pB = container_of(work, i2eBordStr, tqueue_interrupt); -// pB better well be set or we have a problem! We can only get -// here from the IMMEDIATE queue. Here, we process the boards. -// Checking pB doesn't cost much and it saves us from the sanity checkers. - - bh_counter++; - - if ( pB ) { - i2ServiceBoard( pB ); - if( pB->i2eUsingIrq ) { -// Re-enable his interrupts - iiEnableMailIrq(pB); - } - } -} - - -/******************************************************************************/ -/* Function: ip2_interrupt(int irq, void *dev_id) */ -/* Parameters: irq - interrupt number */ -/* pointer to optional device ID structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* Our task here is simply to identify each board which needs servicing. */ -/* If we are queuing then, queue it to be serviced, and disable its irq */ -/* mask otherwise process the board directly. */ -/* */ -/* We could queue by IRQ but that just complicates things on both ends */ -/* with very little gain in performance (how many instructions does */ -/* it take to iterate on the immediate queue). */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_irq_work(i2eBordStrPtr pB) -{ -#ifdef USE_IQI - if (NO_MAIL_HERE != ( pB->i2eStartMail = iiGetMail(pB))) { -// Disable his interrupt (will be enabled when serviced) -// This is mostly to protect from reentrancy. - iiDisableMailIrq(pB); - -// Park the board on the immediate queue for processing. - schedule_work(&pB->tqueue_interrupt); - -// Make sure the immediate queue is flagged to fire. - } -#else - -// We are using immediate servicing here. This sucks and can -// cause all sorts of havoc with ppp and others. The failsafe -// check on iiSendPendingMail could also throw a hairball. - - i2ServiceBoard( pB ); - -#endif /* USE_IQI */ -} - -static void -ip2_polled_interrupt(void) -{ - int i; - i2eBordStrPtr pB; - - ip2trace(ITRC_NO_PORT, ITRC_INTR, 99, 1, 0); - - /* Service just the boards on the list using this irq */ - for( i = 0; i < i2nBoards; ++i ) { - pB = i2BoardPtrTable[i]; - -// Only process those boards which match our IRQ. -// IRQ = 0 for polled boards, we won't poll "IRQ" boards - - if (pB && pB->i2eUsingIrq == 0) - ip2_irq_work(pB); - } - - ++irq_counter; - - ip2trace (ITRC_NO_PORT, ITRC_INTR, ITRC_RETURN, 0 ); -} - -static irqreturn_t -ip2_interrupt(int irq, void *dev_id) -{ - i2eBordStrPtr pB = dev_id; - - ip2trace (ITRC_NO_PORT, ITRC_INTR, 99, 1, pB->i2eUsingIrq ); - - ip2_irq_work(pB); - - ++irq_counter; - - ip2trace (ITRC_NO_PORT, ITRC_INTR, ITRC_RETURN, 0 ); - return IRQ_HANDLED; -} - -/******************************************************************************/ -/* Function: ip2_poll(unsigned long arg) */ -/* Parameters: ? */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This function calls the library routine i2ServiceBoard for each board in */ -/* the board table. This is used instead of the interrupt routine when polled */ -/* mode is specified. */ -/******************************************************************************/ -static void -ip2_poll(unsigned long arg) -{ - ip2trace (ITRC_NO_PORT, ITRC_INTR, 100, 0 ); - - // Just polled boards, IRQ = 0 will hit all non-interrupt boards. - // It will NOT poll boards handled by hard interrupts. - // The issue of queued BH interrupts is handled in ip2_interrupt(). - ip2_polled_interrupt(); - - mod_timer(&PollTimer, POLL_TIMEOUT); - - ip2trace (ITRC_NO_PORT, ITRC_INTR, ITRC_RETURN, 0 ); -} - -static void do_input(struct work_struct *work) -{ - i2ChanStrPtr pCh = container_of(work, i2ChanStr, tqueue_input); - unsigned long flags; - - ip2trace(CHANN, ITRC_INPUT, 21, 0 ); - - // Data input - if ( pCh->pTTY != NULL ) { - read_lock_irqsave(&pCh->Ibuf_spinlock, flags); - if (!pCh->throttled && (pCh->Ibuf_stuff != pCh->Ibuf_strip)) { - read_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - i2Input( pCh ); - } else - read_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); - } else { - ip2trace(CHANN, ITRC_INPUT, 22, 0 ); - - i2InputFlush( pCh ); - } -} - -// code duplicated from n_tty (ldisc) -static inline void isig(int sig, struct tty_struct *tty, int flush) -{ - /* FIXME: This is completely bogus */ - if (tty->pgrp) - kill_pgrp(tty->pgrp, sig, 1); - if (flush || !L_NOFLSH(tty)) { - if ( tty->ldisc->ops->flush_buffer ) - tty->ldisc->ops->flush_buffer(tty); - i2InputFlush( tty->driver_data ); - } -} - -static void do_status(struct work_struct *work) -{ - i2ChanStrPtr pCh = container_of(work, i2ChanStr, tqueue_status); - int status; - - status = i2GetStatus( pCh, (I2_BRK|I2_PAR|I2_FRA|I2_OVR) ); - - ip2trace (CHANN, ITRC_STATUS, 21, 1, status ); - - if (pCh->pTTY && (status & (I2_BRK|I2_PAR|I2_FRA|I2_OVR)) ) { - if ( (status & I2_BRK) ) { - // code duplicated from n_tty (ldisc) - if (I_IGNBRK(pCh->pTTY)) - goto skip_this; - if (I_BRKINT(pCh->pTTY)) { - isig(SIGINT, pCh->pTTY, 1); - goto skip_this; - } - wake_up_interruptible(&pCh->pTTY->read_wait); - } -#ifdef NEVER_HAPPENS_AS_SETUP_XXX - // and can't work because we don't know the_char - // as the_char is reported on a separate path - // The intelligent board does this stuff as setup - { - char brkf = TTY_NORMAL; - unsigned char brkc = '\0'; - unsigned char tmp; - if ( (status & I2_BRK) ) { - brkf = TTY_BREAK; - brkc = '\0'; - } - else if (status & I2_PAR) { - brkf = TTY_PARITY; - brkc = the_char; - } else if (status & I2_FRA) { - brkf = TTY_FRAME; - brkc = the_char; - } else if (status & I2_OVR) { - brkf = TTY_OVERRUN; - brkc = the_char; - } - tmp = pCh->pTTY->real_raw; - pCh->pTTY->real_raw = 0; - pCh->pTTY->ldisc->ops.receive_buf( pCh->pTTY, &brkc, &brkf, 1 ); - pCh->pTTY->real_raw = tmp; - } -#endif /* NEVER_HAPPENS_AS_SETUP_XXX */ - } -skip_this: - - if ( status & (I2_DDCD | I2_DDSR | I2_DCTS | I2_DRI) ) { - wake_up_interruptible(&pCh->delta_msr_wait); - - if ( (pCh->flags & ASYNC_CHECK_CD) && (status & I2_DDCD) ) { - if ( status & I2_DCD ) { - if ( pCh->wopen ) { - wake_up_interruptible ( &pCh->open_wait ); - } - } else { - if (pCh->pTTY && (!(pCh->pTTY->termios->c_cflag & CLOCAL)) ) { - tty_hangup( pCh->pTTY ); - } - } - } - } - - ip2trace (CHANN, ITRC_STATUS, 26, 0 ); -} - -/******************************************************************************/ -/* Device Open/Close/Ioctl Entry Point Section */ -/******************************************************************************/ - -/******************************************************************************/ -/* Function: open_sanity_check() */ -/* Parameters: Pointer to tty structure */ -/* Pointer to file structure */ -/* Returns: Success or failure */ -/* */ -/* Description: */ -/* Verifies the structure magic numbers and cross links. */ -/******************************************************************************/ -#ifdef IP2DEBUG_OPEN -static void -open_sanity_check( i2ChanStrPtr pCh, i2eBordStrPtr pBrd ) -{ - if ( pBrd->i2eValid != I2E_MAGIC ) { - printk(KERN_ERR "IP2: invalid board structure\n" ); - } else if ( pBrd != pCh->pMyBord ) { - printk(KERN_ERR "IP2: board structure pointer mismatch (%p)\n", - pCh->pMyBord ); - } else if ( pBrd->i2eChannelCnt < pCh->port_index ) { - printk(KERN_ERR "IP2: bad device index (%d)\n", pCh->port_index ); - } else if (&((i2ChanStrPtr)pBrd->i2eChannelPtr)[pCh->port_index] != pCh) { - } else { - printk(KERN_INFO "IP2: all pointers check out!\n" ); - } -} -#endif - - -/******************************************************************************/ -/* Function: ip2_open() */ -/* Parameters: Pointer to tty structure */ -/* Pointer to file structure */ -/* Returns: Success or failure */ -/* */ -/* Description: (MANDATORY) */ -/* A successful device open has to run a gauntlet of checks before it */ -/* completes. After some sanity checking and pointer setup, the function */ -/* blocks until all conditions are satisfied. It then initialises the port to */ -/* the default characteristics and returns. */ -/******************************************************************************/ -static int -ip2_open( PTTY tty, struct file *pFile ) -{ - wait_queue_t wait; - int rc = 0; - int do_clocal = 0; - i2ChanStrPtr pCh = DevTable[tty->index]; - - ip2trace (tty->index, ITRC_OPEN, ITRC_ENTER, 0 ); - - if ( pCh == NULL ) { - return -ENODEV; - } - /* Setup pointer links in device and tty structures */ - pCh->pTTY = tty; - tty->driver_data = pCh; - -#ifdef IP2DEBUG_OPEN - printk(KERN_DEBUG \ - "IP2:open(tty=%p,pFile=%p):dev=%s,ch=%d,idx=%d\n", - tty, pFile, tty->name, pCh->infl.hd.i2sChannel, pCh->port_index); - open_sanity_check ( pCh, pCh->pMyBord ); -#endif - - i2QueueCommands(PTYPE_INLINE, pCh, 100, 3, CMD_DTRUP,CMD_RTSUP,CMD_DCD_REP); - pCh->dataSetOut |= (I2_DTR | I2_RTS); - serviceOutgoingFifo( pCh->pMyBord ); - - /* Block here until the port is ready (per serial and istallion) */ - /* - * 1. If the port is in the middle of closing wait for the completion - * and then return the appropriate error. - */ - init_waitqueue_entry(&wait, current); - add_wait_queue(&pCh->close_wait, &wait); - set_current_state( TASK_INTERRUPTIBLE ); - - if ( tty_hung_up_p(pFile) || ( pCh->flags & ASYNC_CLOSING )) { - if ( pCh->flags & ASYNC_CLOSING ) { - tty_unlock(); - schedule(); - tty_lock(); - } - if ( tty_hung_up_p(pFile) ) { - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->close_wait, &wait); - return( pCh->flags & ASYNC_HUP_NOTIFY ) ? -EAGAIN : -ERESTARTSYS; - } - } - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->close_wait, &wait); - - /* - * 3. Handle a non-blocking open of a normal port. - */ - if ( (pFile->f_flags & O_NONBLOCK) || (tty->flags & (1<flags |= ASYNC_NORMAL_ACTIVE; - goto noblock; - } - /* - * 4. Now loop waiting for the port to be free and carrier present - * (if required). - */ - if ( tty->termios->c_cflag & CLOCAL ) - do_clocal = 1; - -#ifdef IP2DEBUG_OPEN - printk(KERN_DEBUG "OpenBlock: do_clocal = %d\n", do_clocal); -#endif - - ++pCh->wopen; - - init_waitqueue_entry(&wait, current); - add_wait_queue(&pCh->open_wait, &wait); - - for(;;) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 2, CMD_DTRUP, CMD_RTSUP); - pCh->dataSetOut |= (I2_DTR | I2_RTS); - set_current_state( TASK_INTERRUPTIBLE ); - serviceOutgoingFifo( pCh->pMyBord ); - if ( tty_hung_up_p(pFile) ) { - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->open_wait, &wait); - return ( pCh->flags & ASYNC_HUP_NOTIFY ) ? -EBUSY : -ERESTARTSYS; - } - if (!(pCh->flags & ASYNC_CLOSING) && - (do_clocal || (pCh->dataSetIn & I2_DCD) )) { - rc = 0; - break; - } - -#ifdef IP2DEBUG_OPEN - printk(KERN_DEBUG "ASYNC_CLOSING = %s\n", - (pCh->flags & ASYNC_CLOSING)?"True":"False"); - printk(KERN_DEBUG "OpenBlock: waiting for CD or signal\n"); -#endif - ip2trace (CHANN, ITRC_OPEN, 3, 2, 0, - (pCh->flags & ASYNC_CLOSING) ); - /* check for signal */ - if (signal_pending(current)) { - rc = (( pCh->flags & ASYNC_HUP_NOTIFY ) ? -EAGAIN : -ERESTARTSYS); - break; - } - tty_unlock(); - schedule(); - tty_lock(); - } - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->open_wait, &wait); - - --pCh->wopen; //why count? - - ip2trace (CHANN, ITRC_OPEN, 4, 0 ); - - if (rc != 0 ) { - return rc; - } - pCh->flags |= ASYNC_NORMAL_ACTIVE; - -noblock: - - /* first open - Assign termios structure to port */ - if ( tty->count == 1 ) { - i2QueueCommands(PTYPE_INLINE, pCh, 0, 2, CMD_CTSFL_DSAB, CMD_RTSFL_DSAB); - /* Now we must send the termios settings to the loadware */ - set_params( pCh, NULL ); - } - - /* - * Now set any i2lib options. These may go away if the i2lib code ends - * up rolled into the mainline. - */ - pCh->channelOptions |= CO_NBLOCK_WRITE; - -#ifdef IP2DEBUG_OPEN - printk (KERN_DEBUG "IP2: open completed\n" ); -#endif - serviceOutgoingFifo( pCh->pMyBord ); - - ip2trace (CHANN, ITRC_OPEN, ITRC_RETURN, 0 ); - - return 0; -} - -/******************************************************************************/ -/* Function: ip2_close() */ -/* Parameters: Pointer to tty structure */ -/* Pointer to file structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_close( PTTY tty, struct file *pFile ) -{ - i2ChanStrPtr pCh = tty->driver_data; - - if ( !pCh ) { - return; - } - - ip2trace (CHANN, ITRC_CLOSE, ITRC_ENTER, 0 ); - -#ifdef IP2DEBUG_OPEN - printk(KERN_DEBUG "IP2:close %s:\n",tty->name); -#endif - - if ( tty_hung_up_p ( pFile ) ) { - - ip2trace (CHANN, ITRC_CLOSE, 2, 1, 2 ); - - return; - } - if ( tty->count > 1 ) { /* not the last close */ - - ip2trace (CHANN, ITRC_CLOSE, 2, 1, 3 ); - - return; - } - pCh->flags |= ASYNC_CLOSING; // last close actually - - tty->closing = 1; - - if (pCh->ClosingWaitTime != ASYNC_CLOSING_WAIT_NONE) { - /* - * Before we drop DTR, make sure the transmitter has completely drained. - * This uses an timeout, after which the close - * completes. - */ - ip2_wait_until_sent(tty, pCh->ClosingWaitTime ); - } - /* - * At this point we stop accepting input. Here we flush the channel - * input buffer which will allow the board to send up more data. Any - * additional input is tossed at interrupt/poll time. - */ - i2InputFlush( pCh ); - - /* disable DSS reporting */ - i2QueueCommands(PTYPE_INLINE, pCh, 100, 4, - CMD_DCD_NREP, CMD_CTS_NREP, CMD_DSR_NREP, CMD_RI_NREP); - if (tty->termios->c_cflag & HUPCL) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 2, CMD_RTSDN, CMD_DTRDN); - pCh->dataSetOut &= ~(I2_DTR | I2_RTS); - i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_PAUSE(25)); - } - - serviceOutgoingFifo ( pCh->pMyBord ); - - tty_ldisc_flush(tty); - tty_driver_flush_buffer(tty); - tty->closing = 0; - - pCh->pTTY = NULL; - - if (pCh->wopen) { - if (pCh->ClosingDelay) { - msleep_interruptible(jiffies_to_msecs(pCh->ClosingDelay)); - } - wake_up_interruptible(&pCh->open_wait); - } - - pCh->flags &=~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); - wake_up_interruptible(&pCh->close_wait); - -#ifdef IP2DEBUG_OPEN - DBG_CNT("ip2_close: after wakeups--"); -#endif - - - ip2trace (CHANN, ITRC_CLOSE, ITRC_RETURN, 1, 1 ); - - return; -} - -/******************************************************************************/ -/* Function: ip2_hangup() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_hangup ( PTTY tty ) -{ - i2ChanStrPtr pCh = tty->driver_data; - - if( !pCh ) { - return; - } - - ip2trace (CHANN, ITRC_HANGUP, ITRC_ENTER, 0 ); - - ip2_flush_buffer(tty); - - /* disable DSS reporting */ - - i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_DCD_NREP); - i2QueueCommands(PTYPE_INLINE, pCh, 0, 2, CMD_CTSFL_DSAB, CMD_RTSFL_DSAB); - if ( (tty->termios->c_cflag & HUPCL) ) { - i2QueueCommands(PTYPE_BYPASS, pCh, 0, 2, CMD_RTSDN, CMD_DTRDN); - pCh->dataSetOut &= ~(I2_DTR | I2_RTS); - i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_PAUSE(25)); - } - i2QueueCommands(PTYPE_INLINE, pCh, 1, 3, - CMD_CTS_NREP, CMD_DSR_NREP, CMD_RI_NREP); - serviceOutgoingFifo ( pCh->pMyBord ); - - wake_up_interruptible ( &pCh->delta_msr_wait ); - - pCh->flags &= ~ASYNC_NORMAL_ACTIVE; - pCh->pTTY = NULL; - wake_up_interruptible ( &pCh->open_wait ); - - ip2trace (CHANN, ITRC_HANGUP, ITRC_RETURN, 0 ); -} - -/******************************************************************************/ -/******************************************************************************/ -/* Device Output Section */ -/******************************************************************************/ -/******************************************************************************/ - -/******************************************************************************/ -/* Function: ip2_write() */ -/* Parameters: Pointer to tty structure */ -/* Flag denoting data is in user (1) or kernel (0) space */ -/* Pointer to data */ -/* Number of bytes to write */ -/* Returns: Number of bytes actually written */ -/* */ -/* Description: (MANDATORY) */ -/* */ -/* */ -/******************************************************************************/ -static int -ip2_write( PTTY tty, const unsigned char *pData, int count) -{ - i2ChanStrPtr pCh = tty->driver_data; - int bytesSent = 0; - unsigned long flags; - - ip2trace (CHANN, ITRC_WRITE, ITRC_ENTER, 2, count, -1 ); - - /* Flush out any buffered data left over from ip2_putchar() calls. */ - ip2_flush_chars( tty ); - - /* This is the actual move bit. Make sure it does what we need!!!!! */ - write_lock_irqsave(&pCh->Pbuf_spinlock, flags); - bytesSent = i2Output( pCh, pData, count); - write_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - - ip2trace (CHANN, ITRC_WRITE, ITRC_RETURN, 1, bytesSent ); - - return bytesSent > 0 ? bytesSent : 0; -} - -/******************************************************************************/ -/* Function: ip2_putchar() */ -/* Parameters: Pointer to tty structure */ -/* Character to write */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static int -ip2_putchar( PTTY tty, unsigned char ch ) -{ - i2ChanStrPtr pCh = tty->driver_data; - unsigned long flags; - -// ip2trace (CHANN, ITRC_PUTC, ITRC_ENTER, 1, ch ); - - write_lock_irqsave(&pCh->Pbuf_spinlock, flags); - pCh->Pbuf[pCh->Pbuf_stuff++] = ch; - if ( pCh->Pbuf_stuff == sizeof pCh->Pbuf ) { - write_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - ip2_flush_chars( tty ); - } else - write_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - return 1; - -// ip2trace (CHANN, ITRC_PUTC, ITRC_RETURN, 1, ch ); -} - -/******************************************************************************/ -/* Function: ip2_flush_chars() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/******************************************************************************/ -static void -ip2_flush_chars( PTTY tty ) -{ - int strip; - i2ChanStrPtr pCh = tty->driver_data; - unsigned long flags; - - write_lock_irqsave(&pCh->Pbuf_spinlock, flags); - if ( pCh->Pbuf_stuff ) { - -// ip2trace (CHANN, ITRC_PUTC, 10, 1, strip ); - - // - // We may need to restart i2Output if it does not fulfill this request - // - strip = i2Output( pCh, pCh->Pbuf, pCh->Pbuf_stuff); - if ( strip != pCh->Pbuf_stuff ) { - memmove( pCh->Pbuf, &pCh->Pbuf[strip], pCh->Pbuf_stuff - strip ); - } - pCh->Pbuf_stuff -= strip; - } - write_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); -} - -/******************************************************************************/ -/* Function: ip2_write_room() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Number of bytes that the driver can accept */ -/* */ -/* Description: */ -/* */ -/******************************************************************************/ -static int -ip2_write_room ( PTTY tty ) -{ - int bytesFree; - i2ChanStrPtr pCh = tty->driver_data; - unsigned long flags; - - read_lock_irqsave(&pCh->Pbuf_spinlock, flags); - bytesFree = i2OutputFree( pCh ) - pCh->Pbuf_stuff; - read_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - - ip2trace (CHANN, ITRC_WRITE, 11, 1, bytesFree ); - - return ((bytesFree > 0) ? bytesFree : 0); -} - -/******************************************************************************/ -/* Function: ip2_chars_in_buf() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Number of bytes queued for transmission */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static int -ip2_chars_in_buf ( PTTY tty ) -{ - i2ChanStrPtr pCh = tty->driver_data; - int rc; - unsigned long flags; - - ip2trace (CHANN, ITRC_WRITE, 12, 1, pCh->Obuf_char_count + pCh->Pbuf_stuff ); - -#ifdef IP2DEBUG_WRITE - printk (KERN_DEBUG "IP2: chars in buffer = %d (%d,%d)\n", - pCh->Obuf_char_count + pCh->Pbuf_stuff, - pCh->Obuf_char_count, pCh->Pbuf_stuff ); -#endif - read_lock_irqsave(&pCh->Obuf_spinlock, flags); - rc = pCh->Obuf_char_count; - read_unlock_irqrestore(&pCh->Obuf_spinlock, flags); - read_lock_irqsave(&pCh->Pbuf_spinlock, flags); - rc += pCh->Pbuf_stuff; - read_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - return rc; -} - -/******************************************************************************/ -/* Function: ip2_flush_buffer() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_flush_buffer( PTTY tty ) -{ - i2ChanStrPtr pCh = tty->driver_data; - unsigned long flags; - - ip2trace (CHANN, ITRC_FLUSH, ITRC_ENTER, 0 ); - -#ifdef IP2DEBUG_WRITE - printk (KERN_DEBUG "IP2: flush buffer\n" ); -#endif - write_lock_irqsave(&pCh->Pbuf_spinlock, flags); - pCh->Pbuf_stuff = 0; - write_unlock_irqrestore(&pCh->Pbuf_spinlock, flags); - i2FlushOutput( pCh ); - ip2_owake(tty); - - ip2trace (CHANN, ITRC_FLUSH, ITRC_RETURN, 0 ); - -} - -/******************************************************************************/ -/* Function: ip2_wait_until_sent() */ -/* Parameters: Pointer to tty structure */ -/* Timeout for wait. */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This function is used in place of the normal tty_wait_until_sent, which */ -/* only waits for the driver buffers to be empty (or rather, those buffers */ -/* reported by chars_in_buffer) which doesn't work for IP2 due to the */ -/* indeterminate number of bytes buffered on the board. */ -/******************************************************************************/ -static void -ip2_wait_until_sent ( PTTY tty, int timeout ) -{ - int i = jiffies; - i2ChanStrPtr pCh = tty->driver_data; - - tty_wait_until_sent(tty, timeout ); - if ( (i = timeout - (jiffies -i)) > 0) - i2DrainOutput( pCh, i ); -} - -/******************************************************************************/ -/******************************************************************************/ -/* Device Input Section */ -/******************************************************************************/ -/******************************************************************************/ - -/******************************************************************************/ -/* Function: ip2_throttle() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_throttle ( PTTY tty ) -{ - i2ChanStrPtr pCh = tty->driver_data; - -#ifdef IP2DEBUG_READ - printk (KERN_DEBUG "IP2: throttle\n" ); -#endif - /* - * Signal the poll/interrupt handlers not to forward incoming data to - * the line discipline. This will cause the buffers to fill up in the - * library and thus cause the library routines to send the flow control - * stuff. - */ - pCh->throttled = 1; -} - -/******************************************************************************/ -/* Function: ip2_unthrottle() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_unthrottle ( PTTY tty ) -{ - i2ChanStrPtr pCh = tty->driver_data; - unsigned long flags; - -#ifdef IP2DEBUG_READ - printk (KERN_DEBUG "IP2: unthrottle\n" ); -#endif - - /* Pass incoming data up to the line discipline again. */ - pCh->throttled = 0; - i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_RESUME); - serviceOutgoingFifo( pCh->pMyBord ); - read_lock_irqsave(&pCh->Ibuf_spinlock, flags); - if ( pCh->Ibuf_stuff != pCh->Ibuf_strip ) { - read_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); -#ifdef IP2DEBUG_READ - printk (KERN_DEBUG "i2Input called from unthrottle\n" ); -#endif - i2Input( pCh ); - } else - read_unlock_irqrestore(&pCh->Ibuf_spinlock, flags); -} - -static void -ip2_start ( PTTY tty ) -{ - i2ChanStrPtr pCh = DevTable[tty->index]; - - i2QueueCommands(PTYPE_BYPASS, pCh, 0, 1, CMD_RESUME); - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_UNSUSPEND); - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_RESUME); -#ifdef IP2DEBUG_WRITE - printk (KERN_DEBUG "IP2: start tx\n" ); -#endif -} - -static void -ip2_stop ( PTTY tty ) -{ - i2ChanStrPtr pCh = DevTable[tty->index]; - - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_SUSPEND); -#ifdef IP2DEBUG_WRITE - printk (KERN_DEBUG "IP2: stop tx\n" ); -#endif -} - -/******************************************************************************/ -/* Device Ioctl Section */ -/******************************************************************************/ - -static int ip2_tiocmget(struct tty_struct *tty) -{ - i2ChanStrPtr pCh = DevTable[tty->index]; -#ifdef ENABLE_DSSNOW - wait_queue_t wait; -#endif - - if (pCh == NULL) - return -ENODEV; - -/* - FIXME - the following code is causing a NULL pointer dereference in - 2.3.51 in an interrupt handler. It's suppose to prompt the board - to return the DSS signal status immediately. Why doesn't it do - the same thing in 2.2.14? -*/ - -/* This thing is still busted in the 1.2.12 driver on 2.4.x - and even hoses the serial console so the oops can be trapped. - /\/\|=mhw=|\/\/ */ - -#ifdef ENABLE_DSSNOW - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_DSS_NOW); - - init_waitqueue_entry(&wait, current); - add_wait_queue(&pCh->dss_now_wait, &wait); - set_current_state( TASK_INTERRUPTIBLE ); - - serviceOutgoingFifo( pCh->pMyBord ); - - schedule(); - - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->dss_now_wait, &wait); - - if (signal_pending(current)) { - return -EINTR; - } -#endif - return ((pCh->dataSetOut & I2_RTS) ? TIOCM_RTS : 0) - | ((pCh->dataSetOut & I2_DTR) ? TIOCM_DTR : 0) - | ((pCh->dataSetIn & I2_DCD) ? TIOCM_CAR : 0) - | ((pCh->dataSetIn & I2_RI) ? TIOCM_RNG : 0) - | ((pCh->dataSetIn & I2_DSR) ? TIOCM_DSR : 0) - | ((pCh->dataSetIn & I2_CTS) ? TIOCM_CTS : 0); -} - -static int ip2_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - i2ChanStrPtr pCh = DevTable[tty->index]; - - if (pCh == NULL) - return -ENODEV; - - if (set & TIOCM_RTS) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_RTSUP); - pCh->dataSetOut |= I2_RTS; - } - if (set & TIOCM_DTR) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DTRUP); - pCh->dataSetOut |= I2_DTR; - } - - if (clear & TIOCM_RTS) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_RTSDN); - pCh->dataSetOut &= ~I2_RTS; - } - if (clear & TIOCM_DTR) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DTRDN); - pCh->dataSetOut &= ~I2_DTR; - } - serviceOutgoingFifo( pCh->pMyBord ); - return 0; -} - -/******************************************************************************/ -/* Function: ip2_ioctl() */ -/* Parameters: Pointer to tty structure */ -/* Pointer to file structure */ -/* Command */ -/* Argument */ -/* Returns: Success or failure */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static int -ip2_ioctl ( PTTY tty, UINT cmd, ULONG arg ) -{ - wait_queue_t wait; - i2ChanStrPtr pCh = DevTable[tty->index]; - i2eBordStrPtr pB; - struct async_icount cprev, cnow; /* kernel counter temps */ - int rc = 0; - unsigned long flags; - void __user *argp = (void __user *)arg; - - if ( pCh == NULL ) - return -ENODEV; - - pB = pCh->pMyBord; - - ip2trace (CHANN, ITRC_IOCTL, ITRC_ENTER, 2, cmd, arg ); - -#ifdef IP2DEBUG_IOCTL - printk(KERN_DEBUG "IP2: ioctl cmd (%x), arg (%lx)\n", cmd, arg ); -#endif - - switch(cmd) { - case TIOCGSERIAL: - - ip2trace (CHANN, ITRC_IOCTL, 2, 1, rc ); - - rc = get_serial_info(pCh, argp); - if (rc) - return rc; - break; - - case TIOCSSERIAL: - - ip2trace (CHANN, ITRC_IOCTL, 3, 1, rc ); - - rc = set_serial_info(pCh, argp); - if (rc) - return rc; - break; - - case TCXONC: - rc = tty_check_change(tty); - if (rc) - return rc; - switch (arg) { - case TCOOFF: - //return -ENOIOCTLCMD; - break; - case TCOON: - //return -ENOIOCTLCMD; - break; - case TCIOFF: - if (STOP_CHAR(tty) != __DISABLED_CHAR) { - i2QueueCommands( PTYPE_BYPASS, pCh, 100, 1, - CMD_XMIT_NOW(STOP_CHAR(tty))); - } - break; - case TCION: - if (START_CHAR(tty) != __DISABLED_CHAR) { - i2QueueCommands( PTYPE_BYPASS, pCh, 100, 1, - CMD_XMIT_NOW(START_CHAR(tty))); - } - break; - default: - return -EINVAL; - } - return 0; - - case TCSBRK: /* SVID version: non-zero arg --> no break */ - rc = tty_check_change(tty); - - ip2trace (CHANN, ITRC_IOCTL, 4, 1, rc ); - - if (!rc) { - ip2_wait_until_sent(tty,0); - if (!arg) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_SEND_BRK(250)); - serviceOutgoingFifo( pCh->pMyBord ); - } - } - break; - - case TCSBRKP: /* support for POSIX tcsendbreak() */ - rc = tty_check_change(tty); - - ip2trace (CHANN, ITRC_IOCTL, 5, 1, rc ); - - if (!rc) { - ip2_wait_until_sent(tty,0); - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, - CMD_SEND_BRK(arg ? arg*100 : 250)); - serviceOutgoingFifo ( pCh->pMyBord ); - } - break; - - case TIOCGSOFTCAR: - - ip2trace (CHANN, ITRC_IOCTL, 6, 1, rc ); - - rc = put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp); - if (rc) - return rc; - break; - - case TIOCSSOFTCAR: - - ip2trace (CHANN, ITRC_IOCTL, 7, 1, rc ); - - rc = get_user(arg,(unsigned long __user *) argp); - if (rc) - return rc; - tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) - | (arg ? CLOCAL : 0)); - - break; - - /* - * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change - mask - * passed in arg for lines of interest (use |'ed TIOCM_RNG/DSR/CD/CTS - * for masking). Caller should use TIOCGICOUNT to see which one it was - */ - case TIOCMIWAIT: - write_lock_irqsave(&pB->read_fifo_spinlock, flags); - cprev = pCh->icount; /* note the counters on entry */ - write_unlock_irqrestore(&pB->read_fifo_spinlock, flags); - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 4, - CMD_DCD_REP, CMD_CTS_REP, CMD_DSR_REP, CMD_RI_REP); - init_waitqueue_entry(&wait, current); - add_wait_queue(&pCh->delta_msr_wait, &wait); - set_current_state( TASK_INTERRUPTIBLE ); - - serviceOutgoingFifo( pCh->pMyBord ); - for(;;) { - ip2trace (CHANN, ITRC_IOCTL, 10, 0 ); - - schedule(); - - ip2trace (CHANN, ITRC_IOCTL, 11, 0 ); - - /* see if a signal did it */ - if (signal_pending(current)) { - rc = -ERESTARTSYS; - break; - } - write_lock_irqsave(&pB->read_fifo_spinlock, flags); - cnow = pCh->icount; /* atomic copy */ - write_unlock_irqrestore(&pB->read_fifo_spinlock, flags); - if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && - cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) { - rc = -EIO; /* no change => rc */ - break; - } - if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || - ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || - ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || - ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) { - rc = 0; - break; - } - cprev = cnow; - } - set_current_state( TASK_RUNNING ); - remove_wait_queue(&pCh->delta_msr_wait, &wait); - - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 3, - CMD_CTS_NREP, CMD_DSR_NREP, CMD_RI_NREP); - if ( ! (pCh->flags & ASYNC_CHECK_CD)) { - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_DCD_NREP); - } - serviceOutgoingFifo( pCh->pMyBord ); - return rc; - break; - - /* - * The rest are not supported by this driver. By returning -ENOIOCTLCMD they - * will be passed to the line discipline for it to handle. - */ - case TIOCSERCONFIG: - case TIOCSERGWILD: - case TIOCSERGETLSR: - case TIOCSERSWILD: - case TIOCSERGSTRUCT: - case TIOCSERGETMULTI: - case TIOCSERSETMULTI: - - default: - ip2trace (CHANN, ITRC_IOCTL, 12, 0 ); - - rc = -ENOIOCTLCMD; - break; - } - - ip2trace (CHANN, ITRC_IOCTL, ITRC_RETURN, 0 ); - - return rc; -} - -static int ip2_get_icount(struct tty_struct *tty, - struct serial_icounter_struct *icount) -{ - i2ChanStrPtr pCh = DevTable[tty->index]; - i2eBordStrPtr pB; - struct async_icount cnow; /* kernel counter temp */ - unsigned long flags; - - if ( pCh == NULL ) - return -ENODEV; - - pB = pCh->pMyBord; - - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for RI where - * only 0->1 is counted. The controller is quite capable of counting - * both, but this done to preserve compatibility with the standard - * serial driver. - */ - - write_lock_irqsave(&pB->read_fifo_spinlock, flags); - cnow = pCh->icount; - write_unlock_irqrestore(&pB->read_fifo_spinlock, flags); - - icount->cts = cnow.cts; - icount->dsr = cnow.dsr; - icount->rng = cnow.rng; - icount->dcd = cnow.dcd; - icount->rx = cnow.rx; - icount->tx = cnow.tx; - icount->frame = cnow.frame; - icount->overrun = cnow.overrun; - icount->parity = cnow.parity; - icount->brk = cnow.brk; - icount->buf_overrun = cnow.buf_overrun; - return 0; -} - -/******************************************************************************/ -/* Function: GetSerialInfo() */ -/* Parameters: Pointer to channel structure */ -/* Pointer to old termios structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This is to support the setserial command, and requires processing of the */ -/* standard Linux serial structure. */ -/******************************************************************************/ -static int -get_serial_info ( i2ChanStrPtr pCh, struct serial_struct __user *retinfo ) -{ - struct serial_struct tmp; - - memset ( &tmp, 0, sizeof(tmp) ); - tmp.type = pCh->pMyBord->channelBtypes.bid_value[(pCh->port_index & (IP2_PORTS_PER_BOARD-1))/16]; - if (BID_HAS_654(tmp.type)) { - tmp.type = PORT_16650; - } else { - tmp.type = PORT_CIRRUS; - } - tmp.line = pCh->port_index; - tmp.port = pCh->pMyBord->i2eBase; - tmp.irq = ip2config.irq[pCh->port_index/64]; - tmp.flags = pCh->flags; - tmp.baud_base = pCh->BaudBase; - tmp.close_delay = pCh->ClosingDelay; - tmp.closing_wait = pCh->ClosingWaitTime; - tmp.custom_divisor = pCh->BaudDivisor; - return copy_to_user(retinfo,&tmp,sizeof(*retinfo)); -} - -/******************************************************************************/ -/* Function: SetSerialInfo() */ -/* Parameters: Pointer to channel structure */ -/* Pointer to old termios structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This function provides support for setserial, which uses the TIOCSSERIAL */ -/* ioctl. Not all setserial parameters are relevant. If the user attempts to */ -/* change the IRQ, address or type of the port the ioctl fails. */ -/******************************************************************************/ -static int -set_serial_info( i2ChanStrPtr pCh, struct serial_struct __user *new_info ) -{ - struct serial_struct ns; - int old_flags, old_baud_divisor; - - if (copy_from_user(&ns, new_info, sizeof (ns))) - return -EFAULT; - - /* - * We don't allow setserial to change IRQ, board address, type or baud - * base. Also line nunber as such is meaningless but we use it for our - * array index so it is fixed also. - */ - if ( (ns.irq != ip2config.irq[pCh->port_index]) - || ((int) ns.port != ((int) (pCh->pMyBord->i2eBase))) - || (ns.baud_base != pCh->BaudBase) - || (ns.line != pCh->port_index) ) { - return -EINVAL; - } - - old_flags = pCh->flags; - old_baud_divisor = pCh->BaudDivisor; - - if ( !capable(CAP_SYS_ADMIN) ) { - if ( ( ns.close_delay != pCh->ClosingDelay ) || - ( (ns.flags & ~ASYNC_USR_MASK) != - (pCh->flags & ~ASYNC_USR_MASK) ) ) { - return -EPERM; - } - - pCh->flags = (pCh->flags & ~ASYNC_USR_MASK) | - (ns.flags & ASYNC_USR_MASK); - pCh->BaudDivisor = ns.custom_divisor; - } else { - pCh->flags = (pCh->flags & ~ASYNC_FLAGS) | - (ns.flags & ASYNC_FLAGS); - pCh->BaudDivisor = ns.custom_divisor; - pCh->ClosingDelay = ns.close_delay * HZ/100; - pCh->ClosingWaitTime = ns.closing_wait * HZ/100; - } - - if ( ( (old_flags & ASYNC_SPD_MASK) != (pCh->flags & ASYNC_SPD_MASK) ) - || (old_baud_divisor != pCh->BaudDivisor) ) { - // Invalidate speed and reset parameters - set_params( pCh, NULL ); - } - - return 0; -} - -/******************************************************************************/ -/* Function: ip2_set_termios() */ -/* Parameters: Pointer to tty structure */ -/* Pointer to old termios structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_set_termios( PTTY tty, struct ktermios *old_termios ) -{ - i2ChanStrPtr pCh = (i2ChanStrPtr)tty->driver_data; - -#ifdef IP2DEBUG_IOCTL - printk (KERN_DEBUG "IP2: set termios %p\n", old_termios ); -#endif - - set_params( pCh, old_termios ); -} - -/******************************************************************************/ -/* Function: ip2_set_line_discipline() */ -/* Parameters: Pointer to tty structure */ -/* Returns: Nothing */ -/* */ -/* Description: Does nothing */ -/* */ -/* */ -/******************************************************************************/ -static void -ip2_set_line_discipline ( PTTY tty ) -{ -#ifdef IP2DEBUG_IOCTL - printk (KERN_DEBUG "IP2: set line discipline\n" ); -#endif - - ip2trace (((i2ChanStrPtr)tty->driver_data)->port_index, ITRC_IOCTL, 16, 0 ); - -} - -/******************************************************************************/ -/* Function: SetLine Characteristics() */ -/* Parameters: Pointer to channel structure */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* This routine is called to update the channel structure with the new line */ -/* characteristics, and send the appropriate commands to the board when they */ -/* change. */ -/******************************************************************************/ -static void -set_params( i2ChanStrPtr pCh, struct ktermios *o_tios ) -{ - tcflag_t cflag, iflag, lflag; - char stop_char, start_char; - struct ktermios dummy; - - lflag = pCh->pTTY->termios->c_lflag; - cflag = pCh->pTTY->termios->c_cflag; - iflag = pCh->pTTY->termios->c_iflag; - - if (o_tios == NULL) { - dummy.c_lflag = ~lflag; - dummy.c_cflag = ~cflag; - dummy.c_iflag = ~iflag; - o_tios = &dummy; - } - - { - switch ( cflag & CBAUD ) { - case B0: - i2QueueCommands( PTYPE_BYPASS, pCh, 100, 2, CMD_RTSDN, CMD_DTRDN); - pCh->dataSetOut &= ~(I2_DTR | I2_RTS); - i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_PAUSE(25)); - pCh->pTTY->termios->c_cflag |= (CBAUD & o_tios->c_cflag); - goto service_it; - break; - case B38400: - /* - * This is the speed that is overloaded with all the other high - * speeds, depending upon the flag settings. - */ - if ( ( pCh->flags & ASYNC_SPD_MASK ) == ASYNC_SPD_HI ) { - pCh->speed = CBR_57600; - } else if ( (pCh->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI ) { - pCh->speed = CBR_115200; - } else if ( (pCh->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST ) { - pCh->speed = CBR_C1; - } else { - pCh->speed = CBR_38400; - } - break; - case B50: pCh->speed = CBR_50; break; - case B75: pCh->speed = CBR_75; break; - case B110: pCh->speed = CBR_110; break; - case B134: pCh->speed = CBR_134; break; - case B150: pCh->speed = CBR_150; break; - case B200: pCh->speed = CBR_200; break; - case B300: pCh->speed = CBR_300; break; - case B600: pCh->speed = CBR_600; break; - case B1200: pCh->speed = CBR_1200; break; - case B1800: pCh->speed = CBR_1800; break; - case B2400: pCh->speed = CBR_2400; break; - case B4800: pCh->speed = CBR_4800; break; - case B9600: pCh->speed = CBR_9600; break; - case B19200: pCh->speed = CBR_19200; break; - case B57600: pCh->speed = CBR_57600; break; - case B115200: pCh->speed = CBR_115200; break; - case B153600: pCh->speed = CBR_153600; break; - case B230400: pCh->speed = CBR_230400; break; - case B307200: pCh->speed = CBR_307200; break; - case B460800: pCh->speed = CBR_460800; break; - case B921600: pCh->speed = CBR_921600; break; - default: pCh->speed = CBR_9600; break; - } - if ( pCh->speed == CBR_C1 ) { - // Process the custom speed parameters. - int bps = pCh->BaudBase / pCh->BaudDivisor; - if ( bps == 921600 ) { - pCh->speed = CBR_921600; - } else { - bps = bps/10; - i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_BAUD_DEF1(bps) ); - } - } - i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_SETBAUD(pCh->speed)); - - i2QueueCommands ( PTYPE_INLINE, pCh, 100, 2, CMD_DTRUP, CMD_RTSUP); - pCh->dataSetOut |= (I2_DTR | I2_RTS); - } - if ( (CSTOPB & cflag) ^ (CSTOPB & o_tios->c_cflag)) - { - i2QueueCommands ( PTYPE_INLINE, pCh, 100, 1, - CMD_SETSTOP( ( cflag & CSTOPB ) ? CST_2 : CST_1)); - } - if (((PARENB|PARODD) & cflag) ^ ((PARENB|PARODD) & o_tios->c_cflag)) - { - i2QueueCommands ( PTYPE_INLINE, pCh, 100, 1, - CMD_SETPAR( - (cflag & PARENB ? (cflag & PARODD ? CSP_OD : CSP_EV) : CSP_NP) - ) - ); - } - /* byte size and parity */ - if ( (CSIZE & cflag)^(CSIZE & o_tios->c_cflag)) - { - int datasize; - switch ( cflag & CSIZE ) { - case CS5: datasize = CSZ_5; break; - case CS6: datasize = CSZ_6; break; - case CS7: datasize = CSZ_7; break; - case CS8: datasize = CSZ_8; break; - default: datasize = CSZ_5; break; /* as per serial.c */ - } - i2QueueCommands ( PTYPE_INLINE, pCh, 100, 1, CMD_SETBITS(datasize) ); - } - /* Process CTS flow control flag setting */ - if ( (cflag & CRTSCTS) ) { - i2QueueCommands(PTYPE_INLINE, pCh, 100, - 2, CMD_CTSFL_ENAB, CMD_RTSFL_ENAB); - } else { - i2QueueCommands(PTYPE_INLINE, pCh, 100, - 2, CMD_CTSFL_DSAB, CMD_RTSFL_DSAB); - } - // - // Process XON/XOFF flow control flags settings - // - stop_char = STOP_CHAR(pCh->pTTY); - start_char = START_CHAR(pCh->pTTY); - - //////////// can't be \000 - if (stop_char == __DISABLED_CHAR ) - { - stop_char = ~__DISABLED_CHAR; - } - if (start_char == __DISABLED_CHAR ) - { - start_char = ~__DISABLED_CHAR; - } - ///////////////////////////////// - - if ( o_tios->c_cc[VSTART] != start_char ) - { - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_DEF_IXON(start_char)); - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DEF_OXON(start_char)); - } - if ( o_tios->c_cc[VSTOP] != stop_char ) - { - i2QueueCommands(PTYPE_BYPASS, pCh, 100, 1, CMD_DEF_IXOFF(stop_char)); - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DEF_OXOFF(stop_char)); - } - if (stop_char == __DISABLED_CHAR ) - { - stop_char = ~__DISABLED_CHAR; //TEST123 - goto no_xoff; - } - if ((iflag & (IXOFF))^(o_tios->c_iflag & (IXOFF))) - { - if ( iflag & IXOFF ) { // Enable XOFF output flow control - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_OXON_OPT(COX_XON)); - } else { // Disable XOFF output flow control -no_xoff: - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_OXON_OPT(COX_NONE)); - } - } - if (start_char == __DISABLED_CHAR ) - { - goto no_xon; - } - if ((iflag & (IXON|IXANY)) ^ (o_tios->c_iflag & (IXON|IXANY))) - { - if ( iflag & IXON ) { - if ( iflag & IXANY ) { // Enable XON/XANY output flow control - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_IXON_OPT(CIX_XANY)); - } else { // Enable XON output flow control - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_IXON_OPT(CIX_XON)); - } - } else { // Disable XON output flow control -no_xon: - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_IXON_OPT(CIX_NONE)); - } - } - if ( (iflag & ISTRIP) ^ ( o_tios->c_iflag & (ISTRIP)) ) - { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, - CMD_ISTRIP_OPT((iflag & ISTRIP ? 1 : 0))); - } - if ( (iflag & INPCK) ^ ( o_tios->c_iflag & (INPCK)) ) - { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, - CMD_PARCHK((iflag & INPCK) ? CPK_ENAB : CPK_DSAB)); - } - - if ( (iflag & (IGNBRK|PARMRK|BRKINT|IGNPAR)) - ^ ( o_tios->c_iflag & (IGNBRK|PARMRK|BRKINT|IGNPAR)) ) - { - char brkrpt = 0; - char parrpt = 0; - - if ( iflag & IGNBRK ) { /* Ignore breaks altogether */ - /* Ignore breaks altogether */ - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_BRK_NREP); - } else { - if ( iflag & BRKINT ) { - if ( iflag & PARMRK ) { - brkrpt = 0x0a; // exception an inline triple - } else { - brkrpt = 0x1a; // exception and NULL - } - brkrpt |= 0x04; // flush input - } else { - if ( iflag & PARMRK ) { - brkrpt = 0x0b; //POSIX triple \0377 \0 \0 - } else { - brkrpt = 0x01; // Null only - } - } - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_BRK_REP(brkrpt)); - } - - if (iflag & IGNPAR) { - parrpt = 0x20; - /* would be 2 for not cirrus bug */ - /* would be 0x20 cept for cirrus bug */ - } else { - if ( iflag & PARMRK ) { - /* - * Replace error characters with 3-byte sequence (\0377,\0,char) - */ - parrpt = 0x04 ; - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_ISTRIP_OPT((char)0)); - } else { - parrpt = 0x03; - } - } - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_SET_ERROR(parrpt)); - } - if (cflag & CLOCAL) { - // Status reporting fails for DCD if this is off - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DCD_NREP); - pCh->flags &= ~ASYNC_CHECK_CD; - } else { - i2QueueCommands(PTYPE_INLINE, pCh, 100, 1, CMD_DCD_REP); - pCh->flags |= ASYNC_CHECK_CD; - } - -service_it: - i2DrainOutput( pCh, 100 ); -} - -/******************************************************************************/ -/* IPL Device Section */ -/******************************************************************************/ - -/******************************************************************************/ -/* Function: ip2_ipl_read() */ -/* Parameters: Pointer to device inode */ -/* Pointer to file structure */ -/* Pointer to data */ -/* Number of bytes to read */ -/* Returns: Success or failure */ -/* */ -/* Description: Ugly */ -/* */ -/* */ -/******************************************************************************/ - -static -ssize_t -ip2_ipl_read(struct file *pFile, char __user *pData, size_t count, loff_t *off ) -{ - unsigned int minor = iminor(pFile->f_path.dentry->d_inode); - int rc = 0; - -#ifdef IP2DEBUG_IPL - printk (KERN_DEBUG "IP2IPL: read %p, %d bytes\n", pData, count ); -#endif - - switch( minor ) { - case 0: // IPL device - rc = -EINVAL; - break; - case 1: // Status dump - rc = -EINVAL; - break; - case 2: // Ping device - rc = -EINVAL; - break; - case 3: // Trace device - rc = DumpTraceBuffer ( pData, count ); - break; - case 4: // Trace device - rc = DumpFifoBuffer ( pData, count ); - break; - default: - rc = -ENODEV; - break; - } - return rc; -} - -static int -DumpFifoBuffer ( char __user *pData, int count ) -{ -#ifdef DEBUG_FIFO - int rc; - rc = copy_to_user(pData, DBGBuf, count); - - printk(KERN_DEBUG "Last index %d\n", I ); - - return count; -#endif /* DEBUG_FIFO */ - return 0; -} - -static int -DumpTraceBuffer ( char __user *pData, int count ) -{ -#ifdef IP2DEBUG_TRACE - int rc; - int dumpcount; - int chunk; - int *pIndex = (int __user *)pData; - - if ( count < (sizeof(int) * 6) ) { - return -EIO; - } - rc = put_user(tracewrap, pIndex ); - rc = put_user(TRACEMAX, ++pIndex ); - rc = put_user(tracestrip, ++pIndex ); - rc = put_user(tracestuff, ++pIndex ); - pData += sizeof(int) * 6; - count -= sizeof(int) * 6; - - dumpcount = tracestuff - tracestrip; - if ( dumpcount < 0 ) { - dumpcount += TRACEMAX; - } - if ( dumpcount > count ) { - dumpcount = count; - } - chunk = TRACEMAX - tracestrip; - if ( dumpcount > chunk ) { - rc = copy_to_user(pData, &tracebuf[tracestrip], - chunk * sizeof(tracebuf[0]) ); - pData += chunk * sizeof(tracebuf[0]); - tracestrip = 0; - chunk = dumpcount - chunk; - } else { - chunk = dumpcount; - } - rc = copy_to_user(pData, &tracebuf[tracestrip], - chunk * sizeof(tracebuf[0]) ); - tracestrip += chunk; - tracewrap = 0; - - rc = put_user(tracestrip, ++pIndex ); - rc = put_user(tracestuff, ++pIndex ); - - return dumpcount; -#else - return 0; -#endif -} - -/******************************************************************************/ -/* Function: ip2_ipl_write() */ -/* Parameters: */ -/* Pointer to file structure */ -/* Pointer to data */ -/* Number of bytes to write */ -/* Returns: Success or failure */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static ssize_t -ip2_ipl_write(struct file *pFile, const char __user *pData, size_t count, loff_t *off) -{ -#ifdef IP2DEBUG_IPL - printk (KERN_DEBUG "IP2IPL: write %p, %d bytes\n", pData, count ); -#endif - return 0; -} - -/******************************************************************************/ -/* Function: ip2_ipl_ioctl() */ -/* Parameters: Pointer to device inode */ -/* Pointer to file structure */ -/* Command */ -/* Argument */ -/* Returns: Success or failure */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static long -ip2_ipl_ioctl (struct file *pFile, UINT cmd, ULONG arg ) -{ - unsigned int iplminor = iminor(pFile->f_path.dentry->d_inode); - int rc = 0; - void __user *argp = (void __user *)arg; - ULONG __user *pIndex = argp; - i2eBordStrPtr pB = i2BoardPtrTable[iplminor / 4]; - i2ChanStrPtr pCh; - -#ifdef IP2DEBUG_IPL - printk (KERN_DEBUG "IP2IPL: ioctl cmd %d, arg %ld\n", cmd, arg ); -#endif - - mutex_lock(&ip2_mutex); - - switch ( iplminor ) { - case 0: // IPL device - rc = -EINVAL; - break; - case 1: // Status dump - case 5: - case 9: - case 13: - switch ( cmd ) { - case 64: /* Driver - ip2stat */ - rc = put_user(-1, pIndex++ ); - rc = put_user(irq_counter, pIndex++ ); - rc = put_user(bh_counter, pIndex++ ); - break; - - case 65: /* Board - ip2stat */ - if ( pB ) { - rc = copy_to_user(argp, pB, sizeof(i2eBordStr)); - rc = put_user(inb(pB->i2eStatus), - (ULONG __user *)(arg + (ULONG)(&pB->i2eStatus) - (ULONG)pB ) ); - } else { - rc = -ENODEV; - } - break; - - default: - if (cmd < IP2_MAX_PORTS) { - pCh = DevTable[cmd]; - if ( pCh ) - { - rc = copy_to_user(argp, pCh, sizeof(i2ChanStr)); - if (rc) - rc = -EFAULT; - } else { - rc = -ENODEV; - } - } else { - rc = -EINVAL; - } - } - break; - - case 2: // Ping device - rc = -EINVAL; - break; - case 3: // Trace device - /* - * akpm: This used to write a whole bunch of function addresses - * to userspace, which generated lots of put_user() warnings. - * I killed it all. Just return "success" and don't do - * anything. - */ - if (cmd == 1) - rc = 0; - else - rc = -EINVAL; - break; - - default: - rc = -ENODEV; - break; - } - mutex_unlock(&ip2_mutex); - return rc; -} - -/******************************************************************************/ -/* Function: ip2_ipl_open() */ -/* Parameters: Pointer to device inode */ -/* Pointer to file structure */ -/* Returns: Success or failure */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -static int -ip2_ipl_open( struct inode *pInode, struct file *pFile ) -{ - -#ifdef IP2DEBUG_IPL - printk (KERN_DEBUG "IP2IPL: open\n" ); -#endif - return 0; -} - -static int -proc_ip2mem_show(struct seq_file *m, void *v) -{ - i2eBordStrPtr pB; - i2ChanStrPtr pCh; - PTTY tty; - int i; - -#define FMTLINE "%3d: 0x%08x 0x%08x 0%011o 0%011o\n" -#define FMTLIN2 " 0x%04x 0x%04x tx flow 0x%x\n" -#define FMTLIN3 " 0x%04x 0x%04x rc flow\n" - - seq_printf(m,"\n"); - - for( i = 0; i < IP2_MAX_BOARDS; ++i ) { - pB = i2BoardPtrTable[i]; - if ( pB ) { - seq_printf(m,"board %d:\n",i); - seq_printf(m,"\tFifo rem: %d mty: %x outM %x\n", - pB->i2eFifoRemains,pB->i2eWaitingForEmptyFifo,pB->i2eOutMailWaiting); - } - } - - seq_printf(m,"#: tty flags, port flags, cflags, iflags\n"); - for (i=0; i < IP2_MAX_PORTS; i++) { - pCh = DevTable[i]; - if (pCh) { - tty = pCh->pTTY; - if (tty && tty->count) { - seq_printf(m,FMTLINE,i,(int)tty->flags,pCh->flags, - tty->termios->c_cflag,tty->termios->c_iflag); - - seq_printf(m,FMTLIN2, - pCh->outfl.asof,pCh->outfl.room,pCh->channelNeeds); - seq_printf(m,FMTLIN3,pCh->infl.asof,pCh->infl.room); - } - } - } - return 0; -} - -static int proc_ip2mem_open(struct inode *inode, struct file *file) -{ - return single_open(file, proc_ip2mem_show, NULL); -} - -static const struct file_operations ip2mem_proc_fops = { - .owner = THIS_MODULE, - .open = proc_ip2mem_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -/* - * This is the handler for /proc/tty/driver/ip2 - * - * This stretch of code has been largely plagerized from at least three - * different sources including ip2mkdev.c and a couple of other drivers. - * The bugs are all mine. :-) =mhw= - */ -static int ip2_proc_show(struct seq_file *m, void *v) -{ - int i, j, box; - int boxes = 0; - int ports = 0; - int tports = 0; - i2eBordStrPtr pB; - char *sep; - - seq_printf(m, "ip2info: 1.0 driver: %s\n", pcVersion); - seq_printf(m, "Driver: SMajor=%d CMajor=%d IMajor=%d MaxBoards=%d MaxBoxes=%d MaxPorts=%d\n", - IP2_TTY_MAJOR, IP2_CALLOUT_MAJOR, IP2_IPL_MAJOR, - IP2_MAX_BOARDS, ABS_MAX_BOXES, ABS_BIGGEST_BOX); - - for( i = 0; i < IP2_MAX_BOARDS; ++i ) { - /* This need to be reset for a board by board count... */ - boxes = 0; - pB = i2BoardPtrTable[i]; - if( pB ) { - switch( pB->i2ePom.e.porID & ~POR_ID_RESERVED ) - { - case POR_ID_FIIEX: - seq_printf(m, "Board %d: EX ports=", i); - sep = ""; - for( box = 0; box < ABS_MAX_BOXES; ++box ) - { - ports = 0; - - if( pB->i2eChannelMap[box] != 0 ) ++boxes; - for( j = 0; j < ABS_BIGGEST_BOX; ++j ) - { - if( pB->i2eChannelMap[box] & 1<< j ) { - ++ports; - } - } - seq_printf(m, "%s%d", sep, ports); - sep = ","; - tports += ports; - } - seq_printf(m, " boxes=%d width=%d", boxes, pB->i2eDataWidth16 ? 16 : 8); - break; - - case POR_ID_II_4: - seq_printf(m, "Board %d: ISA-4 ports=4 boxes=1", i); - tports = ports = 4; - break; - - case POR_ID_II_8: - seq_printf(m, "Board %d: ISA-8-std ports=8 boxes=1", i); - tports = ports = 8; - break; - - case POR_ID_II_8R: - seq_printf(m, "Board %d: ISA-8-RJ11 ports=8 boxes=1", i); - tports = ports = 8; - break; - - default: - seq_printf(m, "Board %d: unknown", i); - /* Don't try and probe for minor numbers */ - tports = ports = 0; - } - - } else { - /* Don't try and probe for minor numbers */ - seq_printf(m, "Board %d: vacant", i); - tports = ports = 0; - } - - if( tports ) { - seq_puts(m, " minors="); - sep = ""; - for ( box = 0; box < ABS_MAX_BOXES; ++box ) - { - for ( j = 0; j < ABS_BIGGEST_BOX; ++j ) - { - if ( pB->i2eChannelMap[box] & (1 << j) ) - { - seq_printf(m, "%s%d", sep, - j + ABS_BIGGEST_BOX * - (box+i*ABS_MAX_BOXES)); - sep = ","; - } - } - } - } - seq_putc(m, '\n'); - } - return 0; - } - -static int ip2_proc_open(struct inode *inode, struct file *file) -{ - return single_open(file, ip2_proc_show, NULL); -} - -static const struct file_operations ip2_proc_fops = { - .owner = THIS_MODULE, - .open = ip2_proc_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -/******************************************************************************/ -/* Function: ip2trace() */ -/* Parameters: Value to add to trace buffer */ -/* Returns: Nothing */ -/* */ -/* Description: */ -/* */ -/* */ -/******************************************************************************/ -#ifdef IP2DEBUG_TRACE -void -ip2trace (unsigned short pn, unsigned char cat, unsigned char label, unsigned long codes, ...) -{ - long flags; - unsigned long *pCode = &codes; - union ip2breadcrumb bc; - i2ChanStrPtr pCh; - - - tracebuf[tracestuff++] = jiffies; - if ( tracestuff == TRACEMAX ) { - tracestuff = 0; - } - if ( tracestuff == tracestrip ) { - if ( ++tracestrip == TRACEMAX ) { - tracestrip = 0; - } - ++tracewrap; - } - - bc.hdr.port = 0xff & pn; - bc.hdr.cat = cat; - bc.hdr.codes = (unsigned char)( codes & 0xff ); - bc.hdr.label = label; - tracebuf[tracestuff++] = bc.value; - - for (;;) { - if ( tracestuff == TRACEMAX ) { - tracestuff = 0; - } - if ( tracestuff == tracestrip ) { - if ( ++tracestrip == TRACEMAX ) { - tracestrip = 0; - } - ++tracewrap; - } - - if ( !codes-- ) - break; - - tracebuf[tracestuff++] = *++pCode; - } -} -#endif - - -MODULE_LICENSE("GPL"); - -static struct pci_device_id ip2main_pci_tbl[] __devinitdata __used = { - { PCI_DEVICE(PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_IP2EX) }, - { } -}; - -MODULE_DEVICE_TABLE(pci, ip2main_pci_tbl); - -MODULE_FIRMWARE("intelliport2.bin"); diff --git a/drivers/staging/tty/ip2/ip2trace.h b/drivers/staging/tty/ip2/ip2trace.h deleted file mode 100644 index da20435..0000000 --- a/drivers/staging/tty/ip2/ip2trace.h +++ /dev/null @@ -1,42 +0,0 @@ - -// -union ip2breadcrumb -{ - struct { - unsigned char port, cat, codes, label; - } __attribute__ ((packed)) hdr; - unsigned long value; -}; - -#define ITRC_NO_PORT 0xFF -#define CHANN (pCh->port_index) - -#define ITRC_ERROR '!' -#define ITRC_INIT 'A' -#define ITRC_OPEN 'B' -#define ITRC_CLOSE 'C' -#define ITRC_DRAIN 'D' -#define ITRC_IOCTL 'E' -#define ITRC_FLUSH 'F' -#define ITRC_STATUS 'G' -#define ITRC_HANGUP 'H' -#define ITRC_INTR 'I' -#define ITRC_SFLOW 'J' -#define ITRC_SBCMD 'K' -#define ITRC_SICMD 'L' -#define ITRC_MODEM 'M' -#define ITRC_INPUT 'N' -#define ITRC_OUTPUT 'O' -#define ITRC_PUTC 'P' -#define ITRC_QUEUE 'Q' -#define ITRC_STFLW 'R' -#define ITRC_SFIFO 'S' -#define ITRC_VERIFY 'V' -#define ITRC_WRITE 'W' - -#define ITRC_ENTER 0x00 -#define ITRC_RETURN 0xFF - -#define ITRC_QUEUE_ROOM 2 -#define ITRC_QUEUE_CMD 6 - diff --git a/drivers/staging/tty/ip2/ip2types.h b/drivers/staging/tty/ip2/ip2types.h deleted file mode 100644 index 9d67b26..0000000 --- a/drivers/staging/tty/ip2/ip2types.h +++ /dev/null @@ -1,57 +0,0 @@ -/******************************************************************************* -* -* (c) 1998 by Computone Corporation -* -******************************************************************************** -* -* -* PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport -* serial I/O controllers. -* -* DESCRIPTION: Driver constants and type definitions. -* -* NOTES: -* -*******************************************************************************/ -#ifndef IP2TYPES_H -#define IP2TYPES_H - -//************* -//* Constants * -//************* - -// Define some limits for this driver. Ports per board is a hardware limitation -// that will not change. Current hardware limits this to 64 ports per board. -// Boards per driver is a self-imposed limit. -// -#define IP2_MAX_BOARDS 4 -#define IP2_PORTS_PER_BOARD ABS_MOST_PORTS -#define IP2_MAX_PORTS (IP2_MAX_BOARDS*IP2_PORTS_PER_BOARD) - -#define ISA 0 -#define PCI 1 -#define EISA 2 - -//******************** -//* Type Definitions * -//******************** - -typedef struct tty_struct * PTTY; -typedef wait_queue_head_t PWAITQ; - -typedef unsigned char UCHAR; -typedef unsigned int UINT; -typedef unsigned short USHORT; -typedef unsigned long ULONG; - -typedef struct -{ - short irq[IP2_MAX_BOARDS]; - unsigned short addr[IP2_MAX_BOARDS]; - int type[IP2_MAX_BOARDS]; -#ifdef CONFIG_PCI - struct pci_dev *pci_dev[IP2_MAX_BOARDS]; -#endif -} ip2config_t; - -#endif diff --git a/drivers/staging/tty/istallion.c b/drivers/staging/tty/istallion.c deleted file mode 100644 index ca18cbf..0000000 --- a/drivers/staging/tty/istallion.c +++ /dev/null @@ -1,4507 +0,0 @@ -/*****************************************************************************/ - -/* - * istallion.c -- stallion intelligent multiport serial driver. - * - * Copyright (C) 1996-1999 Stallion Technologies - * Copyright (C) 1994-1996 Greg Ungerer. - * - * This code is loosely based on the Linux serial driver, written by - * Linus Torvalds, Theodore T'so and others. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -/*****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -/*****************************************************************************/ - -/* - * Define different board types. Not all of the following board types - * are supported by this driver. But I will use the standard "assigned" - * board numbers. Currently supported boards are abbreviated as: - * ECP = EasyConnection 8/64, ONB = ONboard, BBY = Brumby and - * STAL = Stallion. - */ -#define BRD_UNKNOWN 0 -#define BRD_STALLION 1 -#define BRD_BRUMBY4 2 -#define BRD_ONBOARD2 3 -#define BRD_ONBOARD 4 -#define BRD_ONBOARDE 7 -#define BRD_ECP 23 -#define BRD_ECPE 24 -#define BRD_ECPMC 25 -#define BRD_ECPPCI 29 - -#define BRD_BRUMBY BRD_BRUMBY4 - -/* - * Define a configuration structure to hold the board configuration. - * Need to set this up in the code (for now) with the boards that are - * to be configured into the system. This is what needs to be modified - * when adding/removing/modifying boards. Each line entry in the - * stli_brdconf[] array is a board. Each line contains io/irq/memory - * ranges for that board (as well as what type of board it is). - * Some examples: - * { BRD_ECP, 0x2a0, 0, 0xcc000, 0, 0 }, - * This line will configure an EasyConnection 8/64 at io address 2a0, - * and shared memory address of cc000. Multiple EasyConnection 8/64 - * boards can share the same shared memory address space. No interrupt - * is required for this board type. - * Another example: - * { BRD_ECPE, 0x5000, 0, 0x80000000, 0, 0 }, - * This line will configure an EasyConnection 8/64 EISA in slot 5 and - * shared memory address of 0x80000000 (2 GByte). Multiple - * EasyConnection 8/64 EISA boards can share the same shared memory - * address space. No interrupt is required for this board type. - * Another example: - * { BRD_ONBOARD, 0x240, 0, 0xd0000, 0, 0 }, - * This line will configure an ONboard (ISA type) at io address 240, - * and shared memory address of d0000. Multiple ONboards can share - * the same shared memory address space. No interrupt required. - * Another example: - * { BRD_BRUMBY4, 0x360, 0, 0xc8000, 0, 0 }, - * This line will configure a Brumby board (any number of ports!) at - * io address 360 and shared memory address of c8000. All Brumby boards - * configured into a system must have their own separate io and memory - * addresses. No interrupt is required. - * Another example: - * { BRD_STALLION, 0x330, 0, 0xd0000, 0, 0 }, - * This line will configure an original Stallion board at io address 330 - * and shared memory address d0000 (this would only be valid for a "V4.0" - * or Rev.O Stallion board). All Stallion boards configured into the - * system must have their own separate io and memory addresses. No - * interrupt is required. - */ - -struct stlconf { - int brdtype; - int ioaddr1; - int ioaddr2; - unsigned long memaddr; - int irq; - int irqtype; -}; - -static unsigned int stli_nrbrds; - -/* stli_lock must NOT be taken holding brd_lock */ -static spinlock_t stli_lock; /* TTY logic lock */ -static spinlock_t brd_lock; /* Board logic lock */ - -/* - * There is some experimental EISA board detection code in this driver. - * By default it is disabled, but for those that want to try it out, - * then set the define below to be 1. - */ -#define STLI_EISAPROBE 0 - -/*****************************************************************************/ - -/* - * Define some important driver characteristics. Device major numbers - * allocated as per Linux Device Registry. - */ -#ifndef STL_SIOMEMMAJOR -#define STL_SIOMEMMAJOR 28 -#endif -#ifndef STL_SERIALMAJOR -#define STL_SERIALMAJOR 24 -#endif -#ifndef STL_CALLOUTMAJOR -#define STL_CALLOUTMAJOR 25 -#endif - -/*****************************************************************************/ - -/* - * Define our local driver identity first. Set up stuff to deal with - * all the local structures required by a serial tty driver. - */ -static char *stli_drvtitle = "Stallion Intelligent Multiport Serial Driver"; -static char *stli_drvname = "istallion"; -static char *stli_drvversion = "5.6.0"; -static char *stli_serialname = "ttyE"; - -static struct tty_driver *stli_serial; -static const struct tty_port_operations stli_port_ops; - -#define STLI_TXBUFSIZE 4096 - -/* - * Use a fast local buffer for cooked characters. Typically a whole - * bunch of cooked characters come in for a port, 1 at a time. So we - * save those up into a local buffer, then write out the whole lot - * with a large memcpy. Just use 1 buffer for all ports, since its - * use it is only need for short periods of time by each port. - */ -static char *stli_txcookbuf; -static int stli_txcooksize; -static int stli_txcookrealsize; -static struct tty_struct *stli_txcooktty; - -/* - * Define a local default termios struct. All ports will be created - * with this termios initially. Basically all it defines is a raw port - * at 9600 baud, 8 data bits, no parity, 1 stop bit. - */ -static struct ktermios stli_deftermios = { - .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL), - .c_cc = INIT_C_CC, - .c_ispeed = 9600, - .c_ospeed = 9600, -}; - -/* - * Define global stats structures. Not used often, and can be - * re-used for each stats call. - */ -static comstats_t stli_comstats; -static struct asystats stli_cdkstats; - -/*****************************************************************************/ - -static DEFINE_MUTEX(stli_brdslock); -static struct stlibrd *stli_brds[STL_MAXBRDS]; - -static int stli_shared; - -/* - * Per board state flags. Used with the state field of the board struct. - * Not really much here... All we need to do is keep track of whether - * the board has been detected, and whether it is actually running a slave - * or not. - */ -#define BST_FOUND 0 -#define BST_STARTED 1 -#define BST_PROBED 2 - -/* - * Define the set of port state flags. These are marked for internal - * state purposes only, usually to do with the state of communications - * with the slave. Most of them need to be updated atomically, so always - * use the bit setting operations (unless protected by cli/sti). - */ -#define ST_OPENING 2 -#define ST_CLOSING 3 -#define ST_CMDING 4 -#define ST_TXBUSY 5 -#define ST_RXING 6 -#define ST_DOFLUSHRX 7 -#define ST_DOFLUSHTX 8 -#define ST_DOSIGS 9 -#define ST_RXSTOP 10 -#define ST_GETSIGS 11 - -/* - * Define an array of board names as printable strings. Handy for - * referencing boards when printing trace and stuff. - */ -static char *stli_brdnames[] = { - "Unknown", - "Stallion", - "Brumby", - "ONboard-MC", - "ONboard", - "Brumby", - "Brumby", - "ONboard-EI", - NULL, - "ONboard", - "ONboard-MC", - "ONboard-MC", - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - "EasyIO", - "EC8/32-AT", - "EC8/32-MC", - "EC8/64-AT", - "EC8/64-EI", - "EC8/64-MC", - "EC8/32-PCI", - "EC8/64-PCI", - "EasyIO-PCI", - "EC/RA-PCI", -}; - -/*****************************************************************************/ - -/* - * Define some string labels for arguments passed from the module - * load line. These allow for easy board definitions, and easy - * modification of the io, memory and irq resoucres. - */ - -static char *board0[8]; -static char *board1[8]; -static char *board2[8]; -static char *board3[8]; - -static char **stli_brdsp[] = { - (char **) &board0, - (char **) &board1, - (char **) &board2, - (char **) &board3 -}; - -/* - * Define a set of common board names, and types. This is used to - * parse any module arguments. - */ - -static struct stlibrdtype { - char *name; - int type; -} stli_brdstr[] = { - { "stallion", BRD_STALLION }, - { "1", BRD_STALLION }, - { "brumby", BRD_BRUMBY }, - { "brumby4", BRD_BRUMBY }, - { "brumby/4", BRD_BRUMBY }, - { "brumby-4", BRD_BRUMBY }, - { "brumby8", BRD_BRUMBY }, - { "brumby/8", BRD_BRUMBY }, - { "brumby-8", BRD_BRUMBY }, - { "brumby16", BRD_BRUMBY }, - { "brumby/16", BRD_BRUMBY }, - { "brumby-16", BRD_BRUMBY }, - { "2", BRD_BRUMBY }, - { "onboard2", BRD_ONBOARD2 }, - { "onboard-2", BRD_ONBOARD2 }, - { "onboard/2", BRD_ONBOARD2 }, - { "onboard-mc", BRD_ONBOARD2 }, - { "onboard/mc", BRD_ONBOARD2 }, - { "onboard-mca", BRD_ONBOARD2 }, - { "onboard/mca", BRD_ONBOARD2 }, - { "3", BRD_ONBOARD2 }, - { "onboard", BRD_ONBOARD }, - { "onboardat", BRD_ONBOARD }, - { "4", BRD_ONBOARD }, - { "onboarde", BRD_ONBOARDE }, - { "onboard-e", BRD_ONBOARDE }, - { "onboard/e", BRD_ONBOARDE }, - { "onboard-ei", BRD_ONBOARDE }, - { "onboard/ei", BRD_ONBOARDE }, - { "7", BRD_ONBOARDE }, - { "ecp", BRD_ECP }, - { "ecpat", BRD_ECP }, - { "ec8/64", BRD_ECP }, - { "ec8/64-at", BRD_ECP }, - { "ec8/64-isa", BRD_ECP }, - { "23", BRD_ECP }, - { "ecpe", BRD_ECPE }, - { "ecpei", BRD_ECPE }, - { "ec8/64-e", BRD_ECPE }, - { "ec8/64-ei", BRD_ECPE }, - { "24", BRD_ECPE }, - { "ecpmc", BRD_ECPMC }, - { "ec8/64-mc", BRD_ECPMC }, - { "ec8/64-mca", BRD_ECPMC }, - { "25", BRD_ECPMC }, - { "ecppci", BRD_ECPPCI }, - { "ec/ra", BRD_ECPPCI }, - { "ec/ra-pc", BRD_ECPPCI }, - { "ec/ra-pci", BRD_ECPPCI }, - { "29", BRD_ECPPCI }, -}; - -/* - * Define the module agruments. - */ -MODULE_AUTHOR("Greg Ungerer"); -MODULE_DESCRIPTION("Stallion Intelligent Multiport Serial Driver"); -MODULE_LICENSE("GPL"); - - -module_param_array(board0, charp, NULL, 0); -MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,memaddr]"); -module_param_array(board1, charp, NULL, 0); -MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,memaddr]"); -module_param_array(board2, charp, NULL, 0); -MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,memaddr]"); -module_param_array(board3, charp, NULL, 0); -MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,memaddr]"); - -#if STLI_EISAPROBE != 0 -/* - * Set up a default memory address table for EISA board probing. - * The default addresses are all bellow 1Mbyte, which has to be the - * case anyway. They should be safe, since we only read values from - * them, and interrupts are disabled while we do it. If the higher - * memory support is compiled in then we also try probing around - * the 1Gb, 2Gb and 3Gb areas as well... - */ -static unsigned long stli_eisamemprobeaddrs[] = { - 0xc0000, 0xd0000, 0xe0000, 0xf0000, - 0x80000000, 0x80010000, 0x80020000, 0x80030000, - 0x40000000, 0x40010000, 0x40020000, 0x40030000, - 0xc0000000, 0xc0010000, 0xc0020000, 0xc0030000, - 0xff000000, 0xff010000, 0xff020000, 0xff030000, -}; - -static int stli_eisamempsize = ARRAY_SIZE(stli_eisamemprobeaddrs); -#endif - -/* - * Define the Stallion PCI vendor and device IDs. - */ -#ifndef PCI_DEVICE_ID_ECRA -#define PCI_DEVICE_ID_ECRA 0x0004 -#endif - -static struct pci_device_id istallion_pci_tbl[] = { - { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECRA), }, - { 0 } -}; -MODULE_DEVICE_TABLE(pci, istallion_pci_tbl); - -static struct pci_driver stli_pcidriver; - -/*****************************************************************************/ - -/* - * Hardware configuration info for ECP boards. These defines apply - * to the directly accessible io ports of the ECP. There is a set of - * defines for each ECP board type, ISA, EISA, MCA and PCI. - */ -#define ECP_IOSIZE 4 - -#define ECP_MEMSIZE (128 * 1024) -#define ECP_PCIMEMSIZE (256 * 1024) - -#define ECP_ATPAGESIZE (4 * 1024) -#define ECP_MCPAGESIZE (4 * 1024) -#define ECP_EIPAGESIZE (64 * 1024) -#define ECP_PCIPAGESIZE (64 * 1024) - -#define STL_EISAID 0x8c4e - -/* - * Important defines for the ISA class of ECP board. - */ -#define ECP_ATIREG 0 -#define ECP_ATCONFR 1 -#define ECP_ATMEMAR 2 -#define ECP_ATMEMPR 3 -#define ECP_ATSTOP 0x1 -#define ECP_ATINTENAB 0x10 -#define ECP_ATENABLE 0x20 -#define ECP_ATDISABLE 0x00 -#define ECP_ATADDRMASK 0x3f000 -#define ECP_ATADDRSHFT 12 - -/* - * Important defines for the EISA class of ECP board. - */ -#define ECP_EIIREG 0 -#define ECP_EIMEMARL 1 -#define ECP_EICONFR 2 -#define ECP_EIMEMARH 3 -#define ECP_EIENABLE 0x1 -#define ECP_EIDISABLE 0x0 -#define ECP_EISTOP 0x4 -#define ECP_EIEDGE 0x00 -#define ECP_EILEVEL 0x80 -#define ECP_EIADDRMASKL 0x00ff0000 -#define ECP_EIADDRSHFTL 16 -#define ECP_EIADDRMASKH 0xff000000 -#define ECP_EIADDRSHFTH 24 -#define ECP_EIBRDENAB 0xc84 - -#define ECP_EISAID 0x4 - -/* - * Important defines for the Micro-channel class of ECP board. - * (It has a lot in common with the ISA boards.) - */ -#define ECP_MCIREG 0 -#define ECP_MCCONFR 1 -#define ECP_MCSTOP 0x20 -#define ECP_MCENABLE 0x80 -#define ECP_MCDISABLE 0x00 - -/* - * Important defines for the PCI class of ECP board. - * (It has a lot in common with the other ECP boards.) - */ -#define ECP_PCIIREG 0 -#define ECP_PCICONFR 1 -#define ECP_PCISTOP 0x01 - -/* - * Hardware configuration info for ONboard and Brumby boards. These - * defines apply to the directly accessible io ports of these boards. - */ -#define ONB_IOSIZE 16 -#define ONB_MEMSIZE (64 * 1024) -#define ONB_ATPAGESIZE (64 * 1024) -#define ONB_MCPAGESIZE (64 * 1024) -#define ONB_EIMEMSIZE (128 * 1024) -#define ONB_EIPAGESIZE (64 * 1024) - -/* - * Important defines for the ISA class of ONboard board. - */ -#define ONB_ATIREG 0 -#define ONB_ATMEMAR 1 -#define ONB_ATCONFR 2 -#define ONB_ATSTOP 0x4 -#define ONB_ATENABLE 0x01 -#define ONB_ATDISABLE 0x00 -#define ONB_ATADDRMASK 0xff0000 -#define ONB_ATADDRSHFT 16 - -#define ONB_MEMENABLO 0 -#define ONB_MEMENABHI 0x02 - -/* - * Important defines for the EISA class of ONboard board. - */ -#define ONB_EIIREG 0 -#define ONB_EIMEMARL 1 -#define ONB_EICONFR 2 -#define ONB_EIMEMARH 3 -#define ONB_EIENABLE 0x1 -#define ONB_EIDISABLE 0x0 -#define ONB_EISTOP 0x4 -#define ONB_EIEDGE 0x00 -#define ONB_EILEVEL 0x80 -#define ONB_EIADDRMASKL 0x00ff0000 -#define ONB_EIADDRSHFTL 16 -#define ONB_EIADDRMASKH 0xff000000 -#define ONB_EIADDRSHFTH 24 -#define ONB_EIBRDENAB 0xc84 - -#define ONB_EISAID 0x1 - -/* - * Important defines for the Brumby boards. They are pretty simple, - * there is not much that is programmably configurable. - */ -#define BBY_IOSIZE 16 -#define BBY_MEMSIZE (64 * 1024) -#define BBY_PAGESIZE (16 * 1024) - -#define BBY_ATIREG 0 -#define BBY_ATCONFR 1 -#define BBY_ATSTOP 0x4 - -/* - * Important defines for the Stallion boards. They are pretty simple, - * there is not much that is programmably configurable. - */ -#define STAL_IOSIZE 16 -#define STAL_MEMSIZE (64 * 1024) -#define STAL_PAGESIZE (64 * 1024) - -/* - * Define the set of status register values for EasyConnection panels. - * The signature will return with the status value for each panel. From - * this we can determine what is attached to the board - before we have - * actually down loaded any code to it. - */ -#define ECH_PNLSTATUS 2 -#define ECH_PNL16PORT 0x20 -#define ECH_PNLIDMASK 0x07 -#define ECH_PNLXPID 0x40 -#define ECH_PNLINTRPEND 0x80 - -/* - * Define some macros to do things to the board. Even those these boards - * are somewhat related there is often significantly different ways of - * doing some operation on it (like enable, paging, reset, etc). So each - * board class has a set of functions which do the commonly required - * operations. The macros below basically just call these functions, - * generally checking for a NULL function - which means that the board - * needs nothing done to it to achieve this operation! - */ -#define EBRDINIT(brdp) \ - if (brdp->init != NULL) \ - (* brdp->init)(brdp) - -#define EBRDENABLE(brdp) \ - if (brdp->enable != NULL) \ - (* brdp->enable)(brdp); - -#define EBRDDISABLE(brdp) \ - if (brdp->disable != NULL) \ - (* brdp->disable)(brdp); - -#define EBRDINTR(brdp) \ - if (brdp->intr != NULL) \ - (* brdp->intr)(brdp); - -#define EBRDRESET(brdp) \ - if (brdp->reset != NULL) \ - (* brdp->reset)(brdp); - -#define EBRDGETMEMPTR(brdp,offset) \ - (* brdp->getmemptr)(brdp, offset, __LINE__) - -/* - * Define the maximal baud rate, and the default baud base for ports. - */ -#define STL_MAXBAUD 460800 -#define STL_BAUDBASE 115200 -#define STL_CLOSEDELAY (5 * HZ / 10) - -/*****************************************************************************/ - -/* - * Define macros to extract a brd or port number from a minor number. - */ -#define MINOR2BRD(min) (((min) & 0xc0) >> 6) -#define MINOR2PORT(min) ((min) & 0x3f) - -/*****************************************************************************/ - -/* - * Prototype all functions in this driver! - */ - -static int stli_parsebrd(struct stlconf *confp, char **argp); -static int stli_open(struct tty_struct *tty, struct file *filp); -static void stli_close(struct tty_struct *tty, struct file *filp); -static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count); -static int stli_putchar(struct tty_struct *tty, unsigned char ch); -static void stli_flushchars(struct tty_struct *tty); -static int stli_writeroom(struct tty_struct *tty); -static int stli_charsinbuffer(struct tty_struct *tty); -static int stli_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg); -static void stli_settermios(struct tty_struct *tty, struct ktermios *old); -static void stli_throttle(struct tty_struct *tty); -static void stli_unthrottle(struct tty_struct *tty); -static void stli_stop(struct tty_struct *tty); -static void stli_start(struct tty_struct *tty); -static void stli_flushbuffer(struct tty_struct *tty); -static int stli_breakctl(struct tty_struct *tty, int state); -static void stli_waituntilsent(struct tty_struct *tty, int timeout); -static void stli_sendxchar(struct tty_struct *tty, char ch); -static void stli_hangup(struct tty_struct *tty); - -static int stli_brdinit(struct stlibrd *brdp); -static int stli_startbrd(struct stlibrd *brdp); -static ssize_t stli_memread(struct file *fp, char __user *buf, size_t count, loff_t *offp); -static ssize_t stli_memwrite(struct file *fp, const char __user *buf, size_t count, loff_t *offp); -static long stli_memioctl(struct file *fp, unsigned int cmd, unsigned long arg); -static void stli_brdpoll(struct stlibrd *brdp, cdkhdr_t __iomem *hdrp); -static void stli_poll(unsigned long arg); -static int stli_hostcmd(struct stlibrd *brdp, struct stliport *portp); -static int stli_initopen(struct tty_struct *tty, struct stlibrd *brdp, struct stliport *portp); -static int stli_rawopen(struct stlibrd *brdp, struct stliport *portp, unsigned long arg, int wait); -static int stli_rawclose(struct stlibrd *brdp, struct stliport *portp, unsigned long arg, int wait); -static int stli_setport(struct tty_struct *tty); -static int stli_cmdwait(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback); -static void stli_sendcmd(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback); -static void __stli_sendcmd(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback); -static void stli_dodelaycmd(struct stliport *portp, cdkctrl_t __iomem *cp); -static void stli_mkasyport(struct tty_struct *tty, struct stliport *portp, asyport_t *pp, struct ktermios *tiosp); -static void stli_mkasysigs(asysigs_t *sp, int dtr, int rts); -static long stli_mktiocm(unsigned long sigvalue); -static void stli_read(struct stlibrd *brdp, struct stliport *portp); -static int stli_getserial(struct stliport *portp, struct serial_struct __user *sp); -static int stli_setserial(struct tty_struct *tty, struct serial_struct __user *sp); -static int stli_getbrdstats(combrd_t __user *bp); -static int stli_getportstats(struct tty_struct *tty, struct stliport *portp, comstats_t __user *cp); -static int stli_portcmdstats(struct tty_struct *tty, struct stliport *portp); -static int stli_clrportstats(struct stliport *portp, comstats_t __user *cp); -static int stli_getportstruct(struct stliport __user *arg); -static int stli_getbrdstruct(struct stlibrd __user *arg); -static struct stlibrd *stli_allocbrd(void); - -static void stli_ecpinit(struct stlibrd *brdp); -static void stli_ecpenable(struct stlibrd *brdp); -static void stli_ecpdisable(struct stlibrd *brdp); -static void __iomem *stli_ecpgetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_ecpreset(struct stlibrd *brdp); -static void stli_ecpintr(struct stlibrd *brdp); -static void stli_ecpeiinit(struct stlibrd *brdp); -static void stli_ecpeienable(struct stlibrd *brdp); -static void stli_ecpeidisable(struct stlibrd *brdp); -static void __iomem *stli_ecpeigetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_ecpeireset(struct stlibrd *brdp); -static void stli_ecpmcenable(struct stlibrd *brdp); -static void stli_ecpmcdisable(struct stlibrd *brdp); -static void __iomem *stli_ecpmcgetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_ecpmcreset(struct stlibrd *brdp); -static void stli_ecppciinit(struct stlibrd *brdp); -static void __iomem *stli_ecppcigetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_ecppcireset(struct stlibrd *brdp); - -static void stli_onbinit(struct stlibrd *brdp); -static void stli_onbenable(struct stlibrd *brdp); -static void stli_onbdisable(struct stlibrd *brdp); -static void __iomem *stli_onbgetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_onbreset(struct stlibrd *brdp); -static void stli_onbeinit(struct stlibrd *brdp); -static void stli_onbeenable(struct stlibrd *brdp); -static void stli_onbedisable(struct stlibrd *brdp); -static void __iomem *stli_onbegetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_onbereset(struct stlibrd *brdp); -static void stli_bbyinit(struct stlibrd *brdp); -static void __iomem *stli_bbygetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_bbyreset(struct stlibrd *brdp); -static void stli_stalinit(struct stlibrd *brdp); -static void __iomem *stli_stalgetmemptr(struct stlibrd *brdp, unsigned long offset, int line); -static void stli_stalreset(struct stlibrd *brdp); - -static struct stliport *stli_getport(unsigned int brdnr, unsigned int panelnr, unsigned int portnr); - -static int stli_initecp(struct stlibrd *brdp); -static int stli_initonb(struct stlibrd *brdp); -#if STLI_EISAPROBE != 0 -static int stli_eisamemprobe(struct stlibrd *brdp); -#endif -static int stli_initports(struct stlibrd *brdp); - -/*****************************************************************************/ - -/* - * Define the driver info for a user level shared memory device. This - * device will work sort of like the /dev/kmem device - except that it - * will give access to the shared memory on the Stallion intelligent - * board. This is also a very useful debugging tool. - */ -static const struct file_operations stli_fsiomem = { - .owner = THIS_MODULE, - .read = stli_memread, - .write = stli_memwrite, - .unlocked_ioctl = stli_memioctl, - .llseek = default_llseek, -}; - -/*****************************************************************************/ - -/* - * Define a timer_list entry for our poll routine. The slave board - * is polled every so often to see if anything needs doing. This is - * much cheaper on host cpu than using interrupts. It turns out to - * not increase character latency by much either... - */ -static DEFINE_TIMER(stli_timerlist, stli_poll, 0, 0); - -static int stli_timeron; - -/* - * Define the calculation for the timeout routine. - */ -#define STLI_TIMEOUT (jiffies + 1) - -/*****************************************************************************/ - -static struct class *istallion_class; - -static void stli_cleanup_ports(struct stlibrd *brdp) -{ - struct stliport *portp; - unsigned int j; - struct tty_struct *tty; - - for (j = 0; j < STL_MAXPORTS; j++) { - portp = brdp->ports[j]; - if (portp != NULL) { - tty = tty_port_tty_get(&portp->port); - if (tty != NULL) { - tty_hangup(tty); - tty_kref_put(tty); - } - kfree(portp); - } - } -} - -/*****************************************************************************/ - -/* - * Parse the supplied argument string, into the board conf struct. - */ - -static int stli_parsebrd(struct stlconf *confp, char **argp) -{ - unsigned int i; - char *sp; - - if (argp[0] == NULL || *argp[0] == 0) - return 0; - - for (sp = argp[0], i = 0; ((*sp != 0) && (i < 25)); sp++, i++) - *sp = tolower(*sp); - - for (i = 0; i < ARRAY_SIZE(stli_brdstr); i++) { - if (strcmp(stli_brdstr[i].name, argp[0]) == 0) - break; - } - if (i == ARRAY_SIZE(stli_brdstr)) { - printk(KERN_WARNING "istallion: unknown board name, %s?\n", argp[0]); - return 0; - } - - confp->brdtype = stli_brdstr[i].type; - if (argp[1] != NULL && *argp[1] != 0) - confp->ioaddr1 = simple_strtoul(argp[1], NULL, 0); - if (argp[2] != NULL && *argp[2] != 0) - confp->memaddr = simple_strtoul(argp[2], NULL, 0); - return(1); -} - -/*****************************************************************************/ - -/* - * On the first open of the device setup the port hardware, and - * initialize the per port data structure. Since initializing the port - * requires several commands to the board we will need to wait for any - * other open that is already initializing the port. - * - * Locking: protected by the port mutex. - */ - -static int stli_activate(struct tty_port *port, struct tty_struct *tty) -{ - struct stliport *portp = container_of(port, struct stliport, port); - struct stlibrd *brdp = stli_brds[portp->brdnr]; - int rc; - - if ((rc = stli_initopen(tty, brdp, portp)) >= 0) - clear_bit(TTY_IO_ERROR, &tty->flags); - wake_up_interruptible(&portp->raw_wait); - return rc; -} - -static int stli_open(struct tty_struct *tty, struct file *filp) -{ - struct stlibrd *brdp; - struct stliport *portp; - unsigned int minordev, brdnr, portnr; - - minordev = tty->index; - brdnr = MINOR2BRD(minordev); - if (brdnr >= stli_nrbrds) - return -ENODEV; - brdp = stli_brds[brdnr]; - if (brdp == NULL) - return -ENODEV; - if (!test_bit(BST_STARTED, &brdp->state)) - return -ENODEV; - portnr = MINOR2PORT(minordev); - if (portnr > brdp->nrports) - return -ENODEV; - - portp = brdp->ports[portnr]; - if (portp == NULL) - return -ENODEV; - if (portp->devnr < 1) - return -ENODEV; - - tty->driver_data = portp; - return tty_port_open(&portp->port, tty, filp); -} - - -/*****************************************************************************/ - -static void stli_shutdown(struct tty_port *port) -{ - struct stlibrd *brdp; - unsigned long ftype; - unsigned long flags; - struct stliport *portp = container_of(port, struct stliport, port); - - if (portp->brdnr >= stli_nrbrds) - return; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return; - - /* - * May want to wait for data to drain before closing. The BUSY - * flag keeps track of whether we are still transmitting or not. - * It is updated by messages from the slave - indicating when all - * chars really have drained. - */ - - if (!test_bit(ST_CLOSING, &portp->state)) - stli_rawclose(brdp, portp, 0, 0); - - spin_lock_irqsave(&stli_lock, flags); - clear_bit(ST_TXBUSY, &portp->state); - clear_bit(ST_RXSTOP, &portp->state); - spin_unlock_irqrestore(&stli_lock, flags); - - ftype = FLUSHTX | FLUSHRX; - stli_cmdwait(brdp, portp, A_FLUSH, &ftype, sizeof(u32), 0); -} - -static void stli_close(struct tty_struct *tty, struct file *filp) -{ - struct stliport *portp = tty->driver_data; - unsigned long flags; - if (portp == NULL) - return; - spin_lock_irqsave(&stli_lock, flags); - /* Flush any internal buffering out first */ - if (tty == stli_txcooktty) - stli_flushchars(tty); - spin_unlock_irqrestore(&stli_lock, flags); - tty_port_close(&portp->port, tty, filp); -} - -/*****************************************************************************/ - -/* - * Carry out first open operations on a port. This involves a number of - * commands to be sent to the slave. We need to open the port, set the - * notification events, set the initial port settings, get and set the - * initial signal values. We sleep and wait in between each one. But - * this still all happens pretty quickly. - */ - -static int stli_initopen(struct tty_struct *tty, - struct stlibrd *brdp, struct stliport *portp) -{ - asynotify_t nt; - asyport_t aport; - int rc; - - if ((rc = stli_rawopen(brdp, portp, 0, 1)) < 0) - return rc; - - memset(&nt, 0, sizeof(asynotify_t)); - nt.data = (DT_TXLOW | DT_TXEMPTY | DT_RXBUSY | DT_RXBREAK); - nt.signal = SG_DCD; - if ((rc = stli_cmdwait(brdp, portp, A_SETNOTIFY, &nt, - sizeof(asynotify_t), 0)) < 0) - return rc; - - stli_mkasyport(tty, portp, &aport, tty->termios); - if ((rc = stli_cmdwait(brdp, portp, A_SETPORT, &aport, - sizeof(asyport_t), 0)) < 0) - return rc; - - set_bit(ST_GETSIGS, &portp->state); - if ((rc = stli_cmdwait(brdp, portp, A_GETSIGNALS, &portp->asig, - sizeof(asysigs_t), 1)) < 0) - return rc; - if (test_and_clear_bit(ST_GETSIGS, &portp->state)) - portp->sigs = stli_mktiocm(portp->asig.sigvalue); - stli_mkasysigs(&portp->asig, 1, 1); - if ((rc = stli_cmdwait(brdp, portp, A_SETSIGNALS, &portp->asig, - sizeof(asysigs_t), 0)) < 0) - return rc; - - return 0; -} - -/*****************************************************************************/ - -/* - * Send an open message to the slave. This will sleep waiting for the - * acknowledgement, so must have user context. We need to co-ordinate - * with close events here, since we don't want open and close events - * to overlap. - */ - -static int stli_rawopen(struct stlibrd *brdp, struct stliport *portp, unsigned long arg, int wait) -{ - cdkhdr_t __iomem *hdrp; - cdkctrl_t __iomem *cp; - unsigned char __iomem *bits; - unsigned long flags; - int rc; - -/* - * Send a message to the slave to open this port. - */ - -/* - * Slave is already closing this port. This can happen if a hangup - * occurs on this port. So we must wait until it is complete. The - * order of opens and closes may not be preserved across shared - * memory, so we must wait until it is complete. - */ - wait_event_interruptible_tty(portp->raw_wait, - !test_bit(ST_CLOSING, &portp->state)); - if (signal_pending(current)) { - return -ERESTARTSYS; - } - -/* - * Everything is ready now, so write the open message into shared - * memory. Once the message is in set the service bits to say that - * this port wants service. - */ - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - cp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->ctrl; - writel(arg, &cp->openarg); - writeb(1, &cp->open); - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - bits = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset + - portp->portidx; - writeb(readb(bits) | portp->portbit, bits); - EBRDDISABLE(brdp); - - if (wait == 0) { - spin_unlock_irqrestore(&brd_lock, flags); - return 0; - } - -/* - * Slave is in action, so now we must wait for the open acknowledgment - * to come back. - */ - rc = 0; - set_bit(ST_OPENING, &portp->state); - spin_unlock_irqrestore(&brd_lock, flags); - - wait_event_interruptible_tty(portp->raw_wait, - !test_bit(ST_OPENING, &portp->state)); - if (signal_pending(current)) - rc = -ERESTARTSYS; - - if ((rc == 0) && (portp->rc != 0)) - rc = -EIO; - return rc; -} - -/*****************************************************************************/ - -/* - * Send a close message to the slave. Normally this will sleep waiting - * for the acknowledgement, but if wait parameter is 0 it will not. If - * wait is true then must have user context (to sleep). - */ - -static int stli_rawclose(struct stlibrd *brdp, struct stliport *portp, unsigned long arg, int wait) -{ - cdkhdr_t __iomem *hdrp; - cdkctrl_t __iomem *cp; - unsigned char __iomem *bits; - unsigned long flags; - int rc; - -/* - * Slave is already closing this port. This can happen if a hangup - * occurs on this port. - */ - if (wait) { - wait_event_interruptible_tty(portp->raw_wait, - !test_bit(ST_CLOSING, &portp->state)); - if (signal_pending(current)) { - return -ERESTARTSYS; - } - } - -/* - * Write the close command into shared memory. - */ - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - cp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->ctrl; - writel(arg, &cp->closearg); - writeb(1, &cp->close); - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - bits = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset + - portp->portidx; - writeb(readb(bits) |portp->portbit, bits); - EBRDDISABLE(brdp); - - set_bit(ST_CLOSING, &portp->state); - spin_unlock_irqrestore(&brd_lock, flags); - - if (wait == 0) - return 0; - -/* - * Slave is in action, so now we must wait for the open acknowledgment - * to come back. - */ - rc = 0; - wait_event_interruptible_tty(portp->raw_wait, - !test_bit(ST_CLOSING, &portp->state)); - if (signal_pending(current)) - rc = -ERESTARTSYS; - - if ((rc == 0) && (portp->rc != 0)) - rc = -EIO; - return rc; -} - -/*****************************************************************************/ - -/* - * Send a command to the slave and wait for the response. This must - * have user context (it sleeps). This routine is generic in that it - * can send any type of command. Its purpose is to wait for that command - * to complete (as opposed to initiating the command then returning). - */ - -static int stli_cmdwait(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback) -{ - /* - * no need for wait_event_tty because clearing ST_CMDING cannot block - * on BTM - */ - wait_event_interruptible(portp->raw_wait, - !test_bit(ST_CMDING, &portp->state)); - if (signal_pending(current)) - return -ERESTARTSYS; - - stli_sendcmd(brdp, portp, cmd, arg, size, copyback); - - wait_event_interruptible(portp->raw_wait, - !test_bit(ST_CMDING, &portp->state)); - if (signal_pending(current)) - return -ERESTARTSYS; - - if (portp->rc != 0) - return -EIO; - return 0; -} - -/*****************************************************************************/ - -/* - * Send the termios settings for this port to the slave. This sleeps - * waiting for the command to complete - so must have user context. - */ - -static int stli_setport(struct tty_struct *tty) -{ - struct stliport *portp = tty->driver_data; - struct stlibrd *brdp; - asyport_t aport; - - if (portp == NULL) - return -ENODEV; - if (portp->brdnr >= stli_nrbrds) - return -ENODEV; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return -ENODEV; - - stli_mkasyport(tty, portp, &aport, tty->termios); - return(stli_cmdwait(brdp, portp, A_SETPORT, &aport, sizeof(asyport_t), 0)); -} - -/*****************************************************************************/ - -static int stli_carrier_raised(struct tty_port *port) -{ - struct stliport *portp = container_of(port, struct stliport, port); - return (portp->sigs & TIOCM_CD) ? 1 : 0; -} - -static void stli_dtr_rts(struct tty_port *port, int on) -{ - struct stliport *portp = container_of(port, struct stliport, port); - struct stlibrd *brdp = stli_brds[portp->brdnr]; - stli_mkasysigs(&portp->asig, on, on); - if (stli_cmdwait(brdp, portp, A_SETSIGNALS, &portp->asig, - sizeof(asysigs_t), 0) < 0) - printk(KERN_WARNING "istallion: dtr set failed.\n"); -} - - -/*****************************************************************************/ - -/* - * Write routine. Take the data and put it in the shared memory ring - * queue. If port is not already sending chars then need to mark the - * service bits for this port. - */ - -static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count) -{ - cdkasy_t __iomem *ap; - cdkhdr_t __iomem *hdrp; - unsigned char __iomem *bits; - unsigned char __iomem *shbuf; - unsigned char *chbuf; - struct stliport *portp; - struct stlibrd *brdp; - unsigned int len, stlen, head, tail, size; - unsigned long flags; - - if (tty == stli_txcooktty) - stli_flushchars(tty); - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - chbuf = (unsigned char *) buf; - -/* - * All data is now local, shove as much as possible into shared memory. - */ - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - head = (unsigned int) readw(&ap->txq.head); - tail = (unsigned int) readw(&ap->txq.tail); - if (tail != ((unsigned int) readw(&ap->txq.tail))) - tail = (unsigned int) readw(&ap->txq.tail); - size = portp->txsize; - if (head >= tail) { - len = size - (head - tail) - 1; - stlen = size - head; - } else { - len = tail - head - 1; - stlen = len; - } - - len = min(len, (unsigned int)count); - count = 0; - shbuf = (char __iomem *) EBRDGETMEMPTR(brdp, portp->txoffset); - - while (len > 0) { - stlen = min(len, stlen); - memcpy_toio(shbuf + head, chbuf, stlen); - chbuf += stlen; - len -= stlen; - count += stlen; - head += stlen; - if (head >= size) { - head = 0; - stlen = tail; - } - } - - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - writew(head, &ap->txq.head); - if (test_bit(ST_TXBUSY, &portp->state)) { - if (readl(&ap->changed.data) & DT_TXEMPTY) - writel(readl(&ap->changed.data) & ~DT_TXEMPTY, &ap->changed.data); - } - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - bits = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset + - portp->portidx; - writeb(readb(bits) | portp->portbit, bits); - set_bit(ST_TXBUSY, &portp->state); - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - - return(count); -} - -/*****************************************************************************/ - -/* - * Output a single character. We put it into a temporary local buffer - * (for speed) then write out that buffer when the flushchars routine - * is called. There is a safety catch here so that if some other port - * writes chars before the current buffer has been, then we write them - * first them do the new ports. - */ - -static int stli_putchar(struct tty_struct *tty, unsigned char ch) -{ - if (tty != stli_txcooktty) { - if (stli_txcooktty != NULL) - stli_flushchars(stli_txcooktty); - stli_txcooktty = tty; - } - - stli_txcookbuf[stli_txcooksize++] = ch; - return 0; -} - -/*****************************************************************************/ - -/* - * Transfer characters from the local TX cooking buffer to the board. - * We sort of ignore the tty that gets passed in here. We rely on the - * info stored with the TX cook buffer to tell us which port to flush - * the data on. In any case we clean out the TX cook buffer, for re-use - * by someone else. - */ - -static void stli_flushchars(struct tty_struct *tty) -{ - cdkhdr_t __iomem *hdrp; - unsigned char __iomem *bits; - cdkasy_t __iomem *ap; - struct tty_struct *cooktty; - struct stliport *portp; - struct stlibrd *brdp; - unsigned int len, stlen, head, tail, size, count, cooksize; - unsigned char *buf; - unsigned char __iomem *shbuf; - unsigned long flags; - - cooksize = stli_txcooksize; - cooktty = stli_txcooktty; - stli_txcooksize = 0; - stli_txcookrealsize = 0; - stli_txcooktty = NULL; - - if (cooktty == NULL) - return; - if (tty != cooktty) - tty = cooktty; - if (cooksize == 0) - return; - - portp = tty->driver_data; - if (portp == NULL) - return; - if (portp->brdnr >= stli_nrbrds) - return; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - head = (unsigned int) readw(&ap->txq.head); - tail = (unsigned int) readw(&ap->txq.tail); - if (tail != ((unsigned int) readw(&ap->txq.tail))) - tail = (unsigned int) readw(&ap->txq.tail); - size = portp->txsize; - if (head >= tail) { - len = size - (head - tail) - 1; - stlen = size - head; - } else { - len = tail - head - 1; - stlen = len; - } - - len = min(len, cooksize); - count = 0; - shbuf = EBRDGETMEMPTR(brdp, portp->txoffset); - buf = stli_txcookbuf; - - while (len > 0) { - stlen = min(len, stlen); - memcpy_toio(shbuf + head, buf, stlen); - buf += stlen; - len -= stlen; - count += stlen; - head += stlen; - if (head >= size) { - head = 0; - stlen = tail; - } - } - - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - writew(head, &ap->txq.head); - - if (test_bit(ST_TXBUSY, &portp->state)) { - if (readl(&ap->changed.data) & DT_TXEMPTY) - writel(readl(&ap->changed.data) & ~DT_TXEMPTY, &ap->changed.data); - } - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - bits = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset + - portp->portidx; - writeb(readb(bits) | portp->portbit, bits); - set_bit(ST_TXBUSY, &portp->state); - - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -static int stli_writeroom(struct tty_struct *tty) -{ - cdkasyrq_t __iomem *rp; - struct stliport *portp; - struct stlibrd *brdp; - unsigned int head, tail, len; - unsigned long flags; - - if (tty == stli_txcooktty) { - if (stli_txcookrealsize != 0) { - len = stli_txcookrealsize - stli_txcooksize; - return len; - } - } - - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - rp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->txq; - head = (unsigned int) readw(&rp->head); - tail = (unsigned int) readw(&rp->tail); - if (tail != ((unsigned int) readw(&rp->tail))) - tail = (unsigned int) readw(&rp->tail); - len = (head >= tail) ? (portp->txsize - (head - tail)) : (tail - head); - len--; - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - - if (tty == stli_txcooktty) { - stli_txcookrealsize = len; - len -= stli_txcooksize; - } - return len; -} - -/*****************************************************************************/ - -/* - * Return the number of characters in the transmit buffer. Normally we - * will return the number of chars in the shared memory ring queue. - * We need to kludge around the case where the shared memory buffer is - * empty but not all characters have drained yet, for this case just - * return that there is 1 character in the buffer! - */ - -static int stli_charsinbuffer(struct tty_struct *tty) -{ - cdkasyrq_t __iomem *rp; - struct stliport *portp; - struct stlibrd *brdp; - unsigned int head, tail, len; - unsigned long flags; - - if (tty == stli_txcooktty) - stli_flushchars(tty); - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - rp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->txq; - head = (unsigned int) readw(&rp->head); - tail = (unsigned int) readw(&rp->tail); - if (tail != ((unsigned int) readw(&rp->tail))) - tail = (unsigned int) readw(&rp->tail); - len = (head >= tail) ? (head - tail) : (portp->txsize - (tail - head)); - if ((len == 0) && test_bit(ST_TXBUSY, &portp->state)) - len = 1; - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - - return len; -} - -/*****************************************************************************/ - -/* - * Generate the serial struct info. - */ - -static int stli_getserial(struct stliport *portp, struct serial_struct __user *sp) -{ - struct serial_struct sio; - struct stlibrd *brdp; - - memset(&sio, 0, sizeof(struct serial_struct)); - sio.type = PORT_UNKNOWN; - sio.line = portp->portnr; - sio.irq = 0; - sio.flags = portp->port.flags; - sio.baud_base = portp->baud_base; - sio.close_delay = portp->port.close_delay; - sio.closing_wait = portp->closing_wait; - sio.custom_divisor = portp->custom_divisor; - sio.xmit_fifo_size = 0; - sio.hub6 = 0; - - brdp = stli_brds[portp->brdnr]; - if (brdp != NULL) - sio.port = brdp->iobase; - - return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? - -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Set port according to the serial struct info. - * At this point we do not do any auto-configure stuff, so we will - * just quietly ignore any requests to change irq, etc. - */ - -static int stli_setserial(struct tty_struct *tty, struct serial_struct __user *sp) -{ - struct serial_struct sio; - int rc; - struct stliport *portp = tty->driver_data; - - if (copy_from_user(&sio, sp, sizeof(struct serial_struct))) - return -EFAULT; - if (!capable(CAP_SYS_ADMIN)) { - if ((sio.baud_base != portp->baud_base) || - (sio.close_delay != portp->port.close_delay) || - ((sio.flags & ~ASYNC_USR_MASK) != - (portp->port.flags & ~ASYNC_USR_MASK))) - return -EPERM; - } - - portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) | - (sio.flags & ASYNC_USR_MASK); - portp->baud_base = sio.baud_base; - portp->port.close_delay = sio.close_delay; - portp->closing_wait = sio.closing_wait; - portp->custom_divisor = sio.custom_divisor; - - if ((rc = stli_setport(tty)) < 0) - return rc; - return 0; -} - -/*****************************************************************************/ - -static int stli_tiocmget(struct tty_struct *tty) -{ - struct stliport *portp = tty->driver_data; - struct stlibrd *brdp; - int rc; - - if (portp == NULL) - return -ENODEV; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - - if ((rc = stli_cmdwait(brdp, portp, A_GETSIGNALS, - &portp->asig, sizeof(asysigs_t), 1)) < 0) - return rc; - - return stli_mktiocm(portp->asig.sigvalue); -} - -static int stli_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct stliport *portp = tty->driver_data; - struct stlibrd *brdp; - int rts = -1, dtr = -1; - - if (portp == NULL) - return -ENODEV; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - - if (set & TIOCM_RTS) - rts = 1; - if (set & TIOCM_DTR) - dtr = 1; - if (clear & TIOCM_RTS) - rts = 0; - if (clear & TIOCM_DTR) - dtr = 0; - - stli_mkasysigs(&portp->asig, dtr, rts); - - return stli_cmdwait(brdp, portp, A_SETSIGNALS, &portp->asig, - sizeof(asysigs_t), 0); -} - -static int stli_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) -{ - struct stliport *portp; - struct stlibrd *brdp; - int rc; - void __user *argp = (void __user *)arg; - - portp = tty->driver_data; - if (portp == NULL) - return -ENODEV; - if (portp->brdnr >= stli_nrbrds) - return 0; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return 0; - - if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS)) { - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - } - - rc = 0; - - switch (cmd) { - case TIOCGSERIAL: - rc = stli_getserial(portp, argp); - break; - case TIOCSSERIAL: - rc = stli_setserial(tty, argp); - break; - case STL_GETPFLAG: - rc = put_user(portp->pflag, (unsigned __user *)argp); - break; - case STL_SETPFLAG: - if ((rc = get_user(portp->pflag, (unsigned __user *)argp)) == 0) - stli_setport(tty); - break; - case COM_GETPORTSTATS: - rc = stli_getportstats(tty, portp, argp); - break; - case COM_CLRPORTSTATS: - rc = stli_clrportstats(portp, argp); - break; - case TIOCSERCONFIG: - case TIOCSERGWILD: - case TIOCSERSWILD: - case TIOCSERGETLSR: - case TIOCSERGSTRUCT: - case TIOCSERGETMULTI: - case TIOCSERSETMULTI: - default: - rc = -ENOIOCTLCMD; - break; - } - - return rc; -} - -/*****************************************************************************/ - -/* - * This routine assumes that we have user context and can sleep. - * Looks like it is true for the current ttys implementation..!! - */ - -static void stli_settermios(struct tty_struct *tty, struct ktermios *old) -{ - struct stliport *portp; - struct stlibrd *brdp; - struct ktermios *tiosp; - asyport_t aport; - - portp = tty->driver_data; - if (portp == NULL) - return; - if (portp->brdnr >= stli_nrbrds) - return; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return; - - tiosp = tty->termios; - - stli_mkasyport(tty, portp, &aport, tiosp); - stli_cmdwait(brdp, portp, A_SETPORT, &aport, sizeof(asyport_t), 0); - stli_mkasysigs(&portp->asig, ((tiosp->c_cflag & CBAUD) ? 1 : 0), -1); - stli_cmdwait(brdp, portp, A_SETSIGNALS, &portp->asig, - sizeof(asysigs_t), 0); - if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) - tty->hw_stopped = 0; - if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL)) - wake_up_interruptible(&portp->port.open_wait); -} - -/*****************************************************************************/ - -/* - * Attempt to flow control who ever is sending us data. We won't really - * do any flow control action here. We can't directly, and even if we - * wanted to we would have to send a command to the slave. The slave - * knows how to flow control, and will do so when its buffers reach its - * internal high water marks. So what we will do is set a local state - * bit that will stop us sending any RX data up from the poll routine - * (which is the place where RX data from the slave is handled). - */ - -static void stli_throttle(struct tty_struct *tty) -{ - struct stliport *portp = tty->driver_data; - if (portp == NULL) - return; - set_bit(ST_RXSTOP, &portp->state); -} - -/*****************************************************************************/ - -/* - * Unflow control the device sending us data... That means that all - * we have to do is clear the RXSTOP state bit. The next poll call - * will then be able to pass the RX data back up. - */ - -static void stli_unthrottle(struct tty_struct *tty) -{ - struct stliport *portp = tty->driver_data; - if (portp == NULL) - return; - clear_bit(ST_RXSTOP, &portp->state); -} - -/*****************************************************************************/ - -/* - * Stop the transmitter. - */ - -static void stli_stop(struct tty_struct *tty) -{ -} - -/*****************************************************************************/ - -/* - * Start the transmitter again. - */ - -static void stli_start(struct tty_struct *tty) -{ -} - -/*****************************************************************************/ - - -/* - * Hangup this port. This is pretty much like closing the port, only - * a little more brutal. No waiting for data to drain. Shutdown the - * port and maybe drop signals. This is rather tricky really. We want - * to close the port as well. - */ - -static void stli_hangup(struct tty_struct *tty) -{ - struct stliport *portp = tty->driver_data; - tty_port_hangup(&portp->port); -} - -/*****************************************************************************/ - -/* - * Flush characters from the lower buffer. We may not have user context - * so we cannot sleep waiting for it to complete. Also we need to check - * if there is chars for this port in the TX cook buffer, and flush them - * as well. - */ - -static void stli_flushbuffer(struct tty_struct *tty) -{ - struct stliport *portp; - struct stlibrd *brdp; - unsigned long ftype, flags; - - portp = tty->driver_data; - if (portp == NULL) - return; - if (portp->brdnr >= stli_nrbrds) - return; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - if (tty == stli_txcooktty) { - stli_txcooktty = NULL; - stli_txcooksize = 0; - stli_txcookrealsize = 0; - } - if (test_bit(ST_CMDING, &portp->state)) { - set_bit(ST_DOFLUSHTX, &portp->state); - } else { - ftype = FLUSHTX; - if (test_bit(ST_DOFLUSHRX, &portp->state)) { - ftype |= FLUSHRX; - clear_bit(ST_DOFLUSHRX, &portp->state); - } - __stli_sendcmd(brdp, portp, A_FLUSH, &ftype, sizeof(u32), 0); - } - spin_unlock_irqrestore(&brd_lock, flags); - tty_wakeup(tty); -} - -/*****************************************************************************/ - -static int stli_breakctl(struct tty_struct *tty, int state) -{ - struct stlibrd *brdp; - struct stliport *portp; - long arg; - - portp = tty->driver_data; - if (portp == NULL) - return -EINVAL; - if (portp->brdnr >= stli_nrbrds) - return -EINVAL; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return -EINVAL; - - arg = (state == -1) ? BREAKON : BREAKOFF; - stli_cmdwait(brdp, portp, A_BREAK, &arg, sizeof(long), 0); - return 0; -} - -/*****************************************************************************/ - -static void stli_waituntilsent(struct tty_struct *tty, int timeout) -{ - struct stliport *portp; - unsigned long tend; - - portp = tty->driver_data; - if (portp == NULL) - return; - - if (timeout == 0) - timeout = HZ; - tend = jiffies + timeout; - - while (test_bit(ST_TXBUSY, &portp->state)) { - if (signal_pending(current)) - break; - msleep_interruptible(20); - if (time_after_eq(jiffies, tend)) - break; - } -} - -/*****************************************************************************/ - -static void stli_sendxchar(struct tty_struct *tty, char ch) -{ - struct stlibrd *brdp; - struct stliport *portp; - asyctrl_t actrl; - - portp = tty->driver_data; - if (portp == NULL) - return; - if (portp->brdnr >= stli_nrbrds) - return; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return; - - memset(&actrl, 0, sizeof(asyctrl_t)); - if (ch == STOP_CHAR(tty)) { - actrl.rxctrl = CT_STOPFLOW; - } else if (ch == START_CHAR(tty)) { - actrl.rxctrl = CT_STARTFLOW; - } else { - actrl.txctrl = CT_SENDCHR; - actrl.tximdch = ch; - } - stli_cmdwait(brdp, portp, A_PORTCTRL, &actrl, sizeof(asyctrl_t), 0); -} - -static void stli_portinfo(struct seq_file *m, struct stlibrd *brdp, struct stliport *portp, int portnr) -{ - char *uart; - int rc; - - rc = stli_portcmdstats(NULL, portp); - - uart = "UNKNOWN"; - if (test_bit(BST_STARTED, &brdp->state)) { - switch (stli_comstats.hwid) { - case 0: uart = "2681"; break; - case 1: uart = "SC26198"; break; - default:uart = "CD1400"; break; - } - } - seq_printf(m, "%d: uart:%s ", portnr, uart); - - if (test_bit(BST_STARTED, &brdp->state) && rc >= 0) { - char sep; - - seq_printf(m, "tx:%d rx:%d", (int) stli_comstats.txtotal, - (int) stli_comstats.rxtotal); - - if (stli_comstats.rxframing) - seq_printf(m, " fe:%d", - (int) stli_comstats.rxframing); - if (stli_comstats.rxparity) - seq_printf(m, " pe:%d", - (int) stli_comstats.rxparity); - if (stli_comstats.rxbreaks) - seq_printf(m, " brk:%d", - (int) stli_comstats.rxbreaks); - if (stli_comstats.rxoverrun) - seq_printf(m, " oe:%d", - (int) stli_comstats.rxoverrun); - - sep = ' '; - if (stli_comstats.signals & TIOCM_RTS) { - seq_printf(m, "%c%s", sep, "RTS"); - sep = '|'; - } - if (stli_comstats.signals & TIOCM_CTS) { - seq_printf(m, "%c%s", sep, "CTS"); - sep = '|'; - } - if (stli_comstats.signals & TIOCM_DTR) { - seq_printf(m, "%c%s", sep, "DTR"); - sep = '|'; - } - if (stli_comstats.signals & TIOCM_CD) { - seq_printf(m, "%c%s", sep, "DCD"); - sep = '|'; - } - if (stli_comstats.signals & TIOCM_DSR) { - seq_printf(m, "%c%s", sep, "DSR"); - sep = '|'; - } - } - seq_putc(m, '\n'); -} - -/*****************************************************************************/ - -/* - * Port info, read from the /proc file system. - */ - -static int stli_proc_show(struct seq_file *m, void *v) -{ - struct stlibrd *brdp; - struct stliport *portp; - unsigned int brdnr, portnr, totalport; - - totalport = 0; - - seq_printf(m, "%s: version %s\n", stli_drvtitle, stli_drvversion); - -/* - * We scan through for each board, panel and port. The offset is - * calculated on the fly, and irrelevant ports are skipped. - */ - for (brdnr = 0; (brdnr < stli_nrbrds); brdnr++) { - brdp = stli_brds[brdnr]; - if (brdp == NULL) - continue; - if (brdp->state == 0) - continue; - - totalport = brdnr * STL_MAXPORTS; - for (portnr = 0; (portnr < brdp->nrports); portnr++, - totalport++) { - portp = brdp->ports[portnr]; - if (portp == NULL) - continue; - stli_portinfo(m, brdp, portp, totalport); - } - } - return 0; -} - -static int stli_proc_open(struct inode *inode, struct file *file) -{ - return single_open(file, stli_proc_show, NULL); -} - -static const struct file_operations stli_proc_fops = { - .owner = THIS_MODULE, - .open = stli_proc_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -/*****************************************************************************/ - -/* - * Generic send command routine. This will send a message to the slave, - * of the specified type with the specified argument. Must be very - * careful of data that will be copied out from shared memory - - * containing command results. The command completion is all done from - * a poll routine that does not have user context. Therefore you cannot - * copy back directly into user space, or to the kernel stack of a - * process. This routine does not sleep, so can be called from anywhere. - * - * The caller must hold the brd_lock (see also stli_sendcmd the usual - * entry point) - */ - -static void __stli_sendcmd(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback) -{ - cdkhdr_t __iomem *hdrp; - cdkctrl_t __iomem *cp; - unsigned char __iomem *bits; - - if (test_bit(ST_CMDING, &portp->state)) { - printk(KERN_ERR "istallion: command already busy, cmd=%x!\n", - (int) cmd); - return; - } - - EBRDENABLE(brdp); - cp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->ctrl; - if (size > 0) { - memcpy_toio((void __iomem *) &(cp->args[0]), arg, size); - if (copyback) { - portp->argp = arg; - portp->argsize = size; - } - } - writel(0, &cp->status); - writel(cmd, &cp->cmd); - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - bits = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset + - portp->portidx; - writeb(readb(bits) | portp->portbit, bits); - set_bit(ST_CMDING, &portp->state); - EBRDDISABLE(brdp); -} - -static void stli_sendcmd(struct stlibrd *brdp, struct stliport *portp, unsigned long cmd, void *arg, int size, int copyback) -{ - unsigned long flags; - - spin_lock_irqsave(&brd_lock, flags); - __stli_sendcmd(brdp, portp, cmd, arg, size, copyback); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Read data from shared memory. This assumes that the shared memory - * is enabled and that interrupts are off. Basically we just empty out - * the shared memory buffer into the tty buffer. Must be careful to - * handle the case where we fill up the tty buffer, but still have - * more chars to unload. - */ - -static void stli_read(struct stlibrd *brdp, struct stliport *portp) -{ - cdkasyrq_t __iomem *rp; - char __iomem *shbuf; - struct tty_struct *tty; - unsigned int head, tail, size; - unsigned int len, stlen; - - if (test_bit(ST_RXSTOP, &portp->state)) - return; - tty = tty_port_tty_get(&portp->port); - if (tty == NULL) - return; - - rp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->rxq; - head = (unsigned int) readw(&rp->head); - if (head != ((unsigned int) readw(&rp->head))) - head = (unsigned int) readw(&rp->head); - tail = (unsigned int) readw(&rp->tail); - size = portp->rxsize; - if (head >= tail) { - len = head - tail; - stlen = len; - } else { - len = size - (tail - head); - stlen = size - tail; - } - - len = tty_buffer_request_room(tty, len); - - shbuf = (char __iomem *) EBRDGETMEMPTR(brdp, portp->rxoffset); - - while (len > 0) { - unsigned char *cptr; - - stlen = min(len, stlen); - tty_prepare_flip_string(tty, &cptr, stlen); - memcpy_fromio(cptr, shbuf + tail, stlen); - len -= stlen; - tail += stlen; - if (tail >= size) { - tail = 0; - stlen = head; - } - } - rp = &((cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr))->rxq; - writew(tail, &rp->tail); - - if (head != tail) - set_bit(ST_RXING, &portp->state); - - tty_schedule_flip(tty); - tty_kref_put(tty); -} - -/*****************************************************************************/ - -/* - * Set up and carry out any delayed commands. There is only a small set - * of slave commands that can be done "off-level". So it is not too - * difficult to deal with them here. - */ - -static void stli_dodelaycmd(struct stliport *portp, cdkctrl_t __iomem *cp) -{ - int cmd; - - if (test_bit(ST_DOSIGS, &portp->state)) { - if (test_bit(ST_DOFLUSHTX, &portp->state) && - test_bit(ST_DOFLUSHRX, &portp->state)) - cmd = A_SETSIGNALSF; - else if (test_bit(ST_DOFLUSHTX, &portp->state)) - cmd = A_SETSIGNALSFTX; - else if (test_bit(ST_DOFLUSHRX, &portp->state)) - cmd = A_SETSIGNALSFRX; - else - cmd = A_SETSIGNALS; - clear_bit(ST_DOFLUSHTX, &portp->state); - clear_bit(ST_DOFLUSHRX, &portp->state); - clear_bit(ST_DOSIGS, &portp->state); - memcpy_toio((void __iomem *) &(cp->args[0]), (void *) &portp->asig, - sizeof(asysigs_t)); - writel(0, &cp->status); - writel(cmd, &cp->cmd); - set_bit(ST_CMDING, &portp->state); - } else if (test_bit(ST_DOFLUSHTX, &portp->state) || - test_bit(ST_DOFLUSHRX, &portp->state)) { - cmd = ((test_bit(ST_DOFLUSHTX, &portp->state)) ? FLUSHTX : 0); - cmd |= ((test_bit(ST_DOFLUSHRX, &portp->state)) ? FLUSHRX : 0); - clear_bit(ST_DOFLUSHTX, &portp->state); - clear_bit(ST_DOFLUSHRX, &portp->state); - memcpy_toio((void __iomem *) &(cp->args[0]), (void *) &cmd, sizeof(int)); - writel(0, &cp->status); - writel(A_FLUSH, &cp->cmd); - set_bit(ST_CMDING, &portp->state); - } -} - -/*****************************************************************************/ - -/* - * Host command service checking. This handles commands or messages - * coming from the slave to the host. Must have board shared memory - * enabled and interrupts off when called. Notice that by servicing the - * read data last we don't need to change the shared memory pointer - * during processing (which is a slow IO operation). - * Return value indicates if this port is still awaiting actions from - * the slave (like open, command, or even TX data being sent). If 0 - * then port is still busy, otherwise no longer busy. - */ - -static int stli_hostcmd(struct stlibrd *brdp, struct stliport *portp) -{ - cdkasy_t __iomem *ap; - cdkctrl_t __iomem *cp; - struct tty_struct *tty; - asynotify_t nt; - unsigned long oldsigs; - int rc, donerx; - - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - cp = &ap->ctrl; - -/* - * Check if we are waiting for an open completion message. - */ - if (test_bit(ST_OPENING, &portp->state)) { - rc = readl(&cp->openarg); - if (readb(&cp->open) == 0 && rc != 0) { - if (rc > 0) - rc--; - writel(0, &cp->openarg); - portp->rc = rc; - clear_bit(ST_OPENING, &portp->state); - wake_up_interruptible(&portp->raw_wait); - } - } - -/* - * Check if we are waiting for a close completion message. - */ - if (test_bit(ST_CLOSING, &portp->state)) { - rc = (int) readl(&cp->closearg); - if (readb(&cp->close) == 0 && rc != 0) { - if (rc > 0) - rc--; - writel(0, &cp->closearg); - portp->rc = rc; - clear_bit(ST_CLOSING, &portp->state); - wake_up_interruptible(&portp->raw_wait); - } - } - -/* - * Check if we are waiting for a command completion message. We may - * need to copy out the command results associated with this command. - */ - if (test_bit(ST_CMDING, &portp->state)) { - rc = readl(&cp->status); - if (readl(&cp->cmd) == 0 && rc != 0) { - if (rc > 0) - rc--; - if (portp->argp != NULL) { - memcpy_fromio(portp->argp, (void __iomem *) &(cp->args[0]), - portp->argsize); - portp->argp = NULL; - } - writel(0, &cp->status); - portp->rc = rc; - clear_bit(ST_CMDING, &portp->state); - stli_dodelaycmd(portp, cp); - wake_up_interruptible(&portp->raw_wait); - } - } - -/* - * Check for any notification messages ready. This includes lots of - * different types of events - RX chars ready, RX break received, - * TX data low or empty in the slave, modem signals changed state. - */ - donerx = 0; - - if (ap->notify) { - nt = ap->changed; - ap->notify = 0; - tty = tty_port_tty_get(&portp->port); - - if (nt.signal & SG_DCD) { - oldsigs = portp->sigs; - portp->sigs = stli_mktiocm(nt.sigvalue); - clear_bit(ST_GETSIGS, &portp->state); - if ((portp->sigs & TIOCM_CD) && - ((oldsigs & TIOCM_CD) == 0)) - wake_up_interruptible(&portp->port.open_wait); - if ((oldsigs & TIOCM_CD) && - ((portp->sigs & TIOCM_CD) == 0)) { - if (portp->port.flags & ASYNC_CHECK_CD) { - if (tty) - tty_hangup(tty); - } - } - } - - if (nt.data & DT_TXEMPTY) - clear_bit(ST_TXBUSY, &portp->state); - if (nt.data & (DT_TXEMPTY | DT_TXLOW)) { - if (tty != NULL) { - tty_wakeup(tty); - EBRDENABLE(brdp); - } - } - - if ((nt.data & DT_RXBREAK) && (portp->rxmarkmsk & BRKINT)) { - if (tty != NULL) { - tty_insert_flip_char(tty, 0, TTY_BREAK); - if (portp->port.flags & ASYNC_SAK) { - do_SAK(tty); - EBRDENABLE(brdp); - } - tty_schedule_flip(tty); - } - } - tty_kref_put(tty); - - if (nt.data & DT_RXBUSY) { - donerx++; - stli_read(brdp, portp); - } - } - -/* - * It might seem odd that we are checking for more RX chars here. - * But, we need to handle the case where the tty buffer was previously - * filled, but we had more characters to pass up. The slave will not - * send any more RX notify messages until the RX buffer has been emptied. - * But it will leave the service bits on (since the buffer is not empty). - * So from here we can try to process more RX chars. - */ - if ((!donerx) && test_bit(ST_RXING, &portp->state)) { - clear_bit(ST_RXING, &portp->state); - stli_read(brdp, portp); - } - - return((test_bit(ST_OPENING, &portp->state) || - test_bit(ST_CLOSING, &portp->state) || - test_bit(ST_CMDING, &portp->state) || - test_bit(ST_TXBUSY, &portp->state) || - test_bit(ST_RXING, &portp->state)) ? 0 : 1); -} - -/*****************************************************************************/ - -/* - * Service all ports on a particular board. Assumes that the boards - * shared memory is enabled, and that the page pointer is pointed - * at the cdk header structure. - */ - -static void stli_brdpoll(struct stlibrd *brdp, cdkhdr_t __iomem *hdrp) -{ - struct stliport *portp; - unsigned char hostbits[(STL_MAXCHANS / 8) + 1]; - unsigned char slavebits[(STL_MAXCHANS / 8) + 1]; - unsigned char __iomem *slavep; - int bitpos, bitat, bitsize; - int channr, nrdevs, slavebitchange; - - bitsize = brdp->bitsize; - nrdevs = brdp->nrdevs; - -/* - * Check if slave wants any service. Basically we try to do as - * little work as possible here. There are 2 levels of service - * bits. So if there is nothing to do we bail early. We check - * 8 service bits at a time in the inner loop, so we can bypass - * the lot if none of them want service. - */ - memcpy_fromio(&hostbits[0], (((unsigned char __iomem *) hdrp) + brdp->hostoffset), - bitsize); - - memset(&slavebits[0], 0, bitsize); - slavebitchange = 0; - - for (bitpos = 0; (bitpos < bitsize); bitpos++) { - if (hostbits[bitpos] == 0) - continue; - channr = bitpos * 8; - for (bitat = 0x1; (channr < nrdevs); channr++, bitat <<= 1) { - if (hostbits[bitpos] & bitat) { - portp = brdp->ports[(channr - 1)]; - if (stli_hostcmd(brdp, portp)) { - slavebitchange++; - slavebits[bitpos] |= bitat; - } - } - } - } - -/* - * If any of the ports are no longer busy then update them in the - * slave request bits. We need to do this after, since a host port - * service may initiate more slave requests. - */ - if (slavebitchange) { - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - slavep = ((unsigned char __iomem *) hdrp) + brdp->slaveoffset; - for (bitpos = 0; (bitpos < bitsize); bitpos++) { - if (readb(slavebits + bitpos)) - writeb(readb(slavep + bitpos) & ~slavebits[bitpos], slavebits + bitpos); - } - } -} - -/*****************************************************************************/ - -/* - * Driver poll routine. This routine polls the boards in use and passes - * messages back up to host when necessary. This is actually very - * CPU efficient, since we will always have the kernel poll clock, it - * adds only a few cycles when idle (since board service can be - * determined very easily), but when loaded generates no interrupts - * (with their expensive associated context change). - */ - -static void stli_poll(unsigned long arg) -{ - cdkhdr_t __iomem *hdrp; - struct stlibrd *brdp; - unsigned int brdnr; - - mod_timer(&stli_timerlist, STLI_TIMEOUT); - -/* - * Check each board and do any servicing required. - */ - for (brdnr = 0; (brdnr < stli_nrbrds); brdnr++) { - brdp = stli_brds[brdnr]; - if (brdp == NULL) - continue; - if (!test_bit(BST_STARTED, &brdp->state)) - continue; - - spin_lock(&brd_lock); - EBRDENABLE(brdp); - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - if (readb(&hdrp->hostreq)) - stli_brdpoll(brdp, hdrp); - EBRDDISABLE(brdp); - spin_unlock(&brd_lock); - } -} - -/*****************************************************************************/ - -/* - * Translate the termios settings into the port setting structure of - * the slave. - */ - -static void stli_mkasyport(struct tty_struct *tty, struct stliport *portp, - asyport_t *pp, struct ktermios *tiosp) -{ - memset(pp, 0, sizeof(asyport_t)); - -/* - * Start of by setting the baud, char size, parity and stop bit info. - */ - pp->baudout = tty_get_baud_rate(tty); - if ((tiosp->c_cflag & CBAUD) == B38400) { - if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - pp->baudout = 57600; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - pp->baudout = 115200; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - pp->baudout = 230400; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - pp->baudout = 460800; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) - pp->baudout = (portp->baud_base / portp->custom_divisor); - } - if (pp->baudout > STL_MAXBAUD) - pp->baudout = STL_MAXBAUD; - pp->baudin = pp->baudout; - - switch (tiosp->c_cflag & CSIZE) { - case CS5: - pp->csize = 5; - break; - case CS6: - pp->csize = 6; - break; - case CS7: - pp->csize = 7; - break; - default: - pp->csize = 8; - break; - } - - if (tiosp->c_cflag & CSTOPB) - pp->stopbs = PT_STOP2; - else - pp->stopbs = PT_STOP1; - - if (tiosp->c_cflag & PARENB) { - if (tiosp->c_cflag & PARODD) - pp->parity = PT_ODDPARITY; - else - pp->parity = PT_EVENPARITY; - } else { - pp->parity = PT_NOPARITY; - } - -/* - * Set up any flow control options enabled. - */ - if (tiosp->c_iflag & IXON) { - pp->flow |= F_IXON; - if (tiosp->c_iflag & IXANY) - pp->flow |= F_IXANY; - } - if (tiosp->c_cflag & CRTSCTS) - pp->flow |= (F_RTSFLOW | F_CTSFLOW); - - pp->startin = tiosp->c_cc[VSTART]; - pp->stopin = tiosp->c_cc[VSTOP]; - pp->startout = tiosp->c_cc[VSTART]; - pp->stopout = tiosp->c_cc[VSTOP]; - -/* - * Set up the RX char marking mask with those RX error types we must - * catch. We can get the slave to help us out a little here, it will - * ignore parity errors and breaks for us, and mark parity errors in - * the data stream. - */ - if (tiosp->c_iflag & IGNPAR) - pp->iflag |= FI_IGNRXERRS; - if (tiosp->c_iflag & IGNBRK) - pp->iflag |= FI_IGNBREAK; - - portp->rxmarkmsk = 0; - if (tiosp->c_iflag & (INPCK | PARMRK)) - pp->iflag |= FI_1MARKRXERRS; - if (tiosp->c_iflag & BRKINT) - portp->rxmarkmsk |= BRKINT; - -/* - * Set up clocal processing as required. - */ - if (tiosp->c_cflag & CLOCAL) - portp->port.flags &= ~ASYNC_CHECK_CD; - else - portp->port.flags |= ASYNC_CHECK_CD; - -/* - * Transfer any persistent flags into the asyport structure. - */ - pp->pflag = (portp->pflag & 0xffff); - pp->vmin = (portp->pflag & P_RXIMIN) ? 1 : 0; - pp->vtime = (portp->pflag & P_RXITIME) ? 1 : 0; - pp->cc[1] = (portp->pflag & P_RXTHOLD) ? 1 : 0; -} - -/*****************************************************************************/ - -/* - * Construct a slave signals structure for setting the DTR and RTS - * signals as specified. - */ - -static void stli_mkasysigs(asysigs_t *sp, int dtr, int rts) -{ - memset(sp, 0, sizeof(asysigs_t)); - if (dtr >= 0) { - sp->signal |= SG_DTR; - sp->sigvalue |= ((dtr > 0) ? SG_DTR : 0); - } - if (rts >= 0) { - sp->signal |= SG_RTS; - sp->sigvalue |= ((rts > 0) ? SG_RTS : 0); - } -} - -/*****************************************************************************/ - -/* - * Convert the signals returned from the slave into a local TIOCM type - * signals value. We keep them locally in TIOCM format. - */ - -static long stli_mktiocm(unsigned long sigvalue) -{ - long tiocm = 0; - tiocm |= ((sigvalue & SG_DCD) ? TIOCM_CD : 0); - tiocm |= ((sigvalue & SG_CTS) ? TIOCM_CTS : 0); - tiocm |= ((sigvalue & SG_RI) ? TIOCM_RI : 0); - tiocm |= ((sigvalue & SG_DSR) ? TIOCM_DSR : 0); - tiocm |= ((sigvalue & SG_DTR) ? TIOCM_DTR : 0); - tiocm |= ((sigvalue & SG_RTS) ? TIOCM_RTS : 0); - return(tiocm); -} - -/*****************************************************************************/ - -/* - * All panels and ports actually attached have been worked out. All - * we need to do here is set up the appropriate per port data structures. - */ - -static int stli_initports(struct stlibrd *brdp) -{ - struct stliport *portp; - unsigned int i, panelnr, panelport; - - for (i = 0, panelnr = 0, panelport = 0; (i < brdp->nrports); i++) { - portp = kzalloc(sizeof(struct stliport), GFP_KERNEL); - if (!portp) { - printk(KERN_WARNING "istallion: failed to allocate port structure\n"); - continue; - } - tty_port_init(&portp->port); - portp->port.ops = &stli_port_ops; - portp->magic = STLI_PORTMAGIC; - portp->portnr = i; - portp->brdnr = brdp->brdnr; - portp->panelnr = panelnr; - portp->baud_base = STL_BAUDBASE; - portp->port.close_delay = STL_CLOSEDELAY; - portp->closing_wait = 30 * HZ; - init_waitqueue_head(&portp->port.open_wait); - init_waitqueue_head(&portp->port.close_wait); - init_waitqueue_head(&portp->raw_wait); - panelport++; - if (panelport >= brdp->panels[panelnr]) { - panelport = 0; - panelnr++; - } - brdp->ports[i] = portp; - } - - return 0; -} - -/*****************************************************************************/ - -/* - * All the following routines are board specific hardware operations. - */ - -static void stli_ecpinit(struct stlibrd *brdp) -{ - unsigned long memconf; - - outb(ECP_ATSTOP, (brdp->iobase + ECP_ATCONFR)); - udelay(10); - outb(ECP_ATDISABLE, (brdp->iobase + ECP_ATCONFR)); - udelay(100); - - memconf = (brdp->memaddr & ECP_ATADDRMASK) >> ECP_ATADDRSHFT; - outb(memconf, (brdp->iobase + ECP_ATMEMAR)); -} - -/*****************************************************************************/ - -static void stli_ecpenable(struct stlibrd *brdp) -{ - outb(ECP_ATENABLE, (brdp->iobase + ECP_ATCONFR)); -} - -/*****************************************************************************/ - -static void stli_ecpdisable(struct stlibrd *brdp) -{ - outb(ECP_ATDISABLE, (brdp->iobase + ECP_ATCONFR)); -} - -/*****************************************************************************/ - -static void __iomem *stli_ecpgetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), brd=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - val = 0; - } else { - ptr = brdp->membase + (offset % ECP_ATPAGESIZE); - val = (unsigned char) (offset / ECP_ATPAGESIZE); - } - outb(val, (brdp->iobase + ECP_ATMEMPR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_ecpreset(struct stlibrd *brdp) -{ - outb(ECP_ATSTOP, (brdp->iobase + ECP_ATCONFR)); - udelay(10); - outb(ECP_ATDISABLE, (brdp->iobase + ECP_ATCONFR)); - udelay(500); -} - -/*****************************************************************************/ - -static void stli_ecpintr(struct stlibrd *brdp) -{ - outb(0x1, brdp->iobase); -} - -/*****************************************************************************/ - -/* - * The following set of functions act on ECP EISA boards. - */ - -static void stli_ecpeiinit(struct stlibrd *brdp) -{ - unsigned long memconf; - - outb(0x1, (brdp->iobase + ECP_EIBRDENAB)); - outb(ECP_EISTOP, (brdp->iobase + ECP_EICONFR)); - udelay(10); - outb(ECP_EIDISABLE, (brdp->iobase + ECP_EICONFR)); - udelay(500); - - memconf = (brdp->memaddr & ECP_EIADDRMASKL) >> ECP_EIADDRSHFTL; - outb(memconf, (brdp->iobase + ECP_EIMEMARL)); - memconf = (brdp->memaddr & ECP_EIADDRMASKH) >> ECP_EIADDRSHFTH; - outb(memconf, (brdp->iobase + ECP_EIMEMARH)); -} - -/*****************************************************************************/ - -static void stli_ecpeienable(struct stlibrd *brdp) -{ - outb(ECP_EIENABLE, (brdp->iobase + ECP_EICONFR)); -} - -/*****************************************************************************/ - -static void stli_ecpeidisable(struct stlibrd *brdp) -{ - outb(ECP_EIDISABLE, (brdp->iobase + ECP_EICONFR)); -} - -/*****************************************************************************/ - -static void __iomem *stli_ecpeigetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), brd=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - val = 0; - } else { - ptr = brdp->membase + (offset % ECP_EIPAGESIZE); - if (offset < ECP_EIPAGESIZE) - val = ECP_EIENABLE; - else - val = ECP_EIENABLE | 0x40; - } - outb(val, (brdp->iobase + ECP_EICONFR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_ecpeireset(struct stlibrd *brdp) -{ - outb(ECP_EISTOP, (brdp->iobase + ECP_EICONFR)); - udelay(10); - outb(ECP_EIDISABLE, (brdp->iobase + ECP_EICONFR)); - udelay(500); -} - -/*****************************************************************************/ - -/* - * The following set of functions act on ECP MCA boards. - */ - -static void stli_ecpmcenable(struct stlibrd *brdp) -{ - outb(ECP_MCENABLE, (brdp->iobase + ECP_MCCONFR)); -} - -/*****************************************************************************/ - -static void stli_ecpmcdisable(struct stlibrd *brdp) -{ - outb(ECP_MCDISABLE, (brdp->iobase + ECP_MCCONFR)); -} - -/*****************************************************************************/ - -static void __iomem *stli_ecpmcgetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), brd=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - val = 0; - } else { - ptr = brdp->membase + (offset % ECP_MCPAGESIZE); - val = ((unsigned char) (offset / ECP_MCPAGESIZE)) | ECP_MCENABLE; - } - outb(val, (brdp->iobase + ECP_MCCONFR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_ecpmcreset(struct stlibrd *brdp) -{ - outb(ECP_MCSTOP, (brdp->iobase + ECP_MCCONFR)); - udelay(10); - outb(ECP_MCDISABLE, (brdp->iobase + ECP_MCCONFR)); - udelay(500); -} - -/*****************************************************************************/ - -/* - * The following set of functions act on ECP PCI boards. - */ - -static void stli_ecppciinit(struct stlibrd *brdp) -{ - outb(ECP_PCISTOP, (brdp->iobase + ECP_PCICONFR)); - udelay(10); - outb(0, (brdp->iobase + ECP_PCICONFR)); - udelay(500); -} - -/*****************************************************************************/ - -static void __iomem *stli_ecppcigetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), board=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - val = 0; - } else { - ptr = brdp->membase + (offset % ECP_PCIPAGESIZE); - val = (offset / ECP_PCIPAGESIZE) << 1; - } - outb(val, (brdp->iobase + ECP_PCICONFR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_ecppcireset(struct stlibrd *brdp) -{ - outb(ECP_PCISTOP, (brdp->iobase + ECP_PCICONFR)); - udelay(10); - outb(0, (brdp->iobase + ECP_PCICONFR)); - udelay(500); -} - -/*****************************************************************************/ - -/* - * The following routines act on ONboards. - */ - -static void stli_onbinit(struct stlibrd *brdp) -{ - unsigned long memconf; - - outb(ONB_ATSTOP, (brdp->iobase + ONB_ATCONFR)); - udelay(10); - outb(ONB_ATDISABLE, (brdp->iobase + ONB_ATCONFR)); - mdelay(1000); - - memconf = (brdp->memaddr & ONB_ATADDRMASK) >> ONB_ATADDRSHFT; - outb(memconf, (brdp->iobase + ONB_ATMEMAR)); - outb(0x1, brdp->iobase); - mdelay(1); -} - -/*****************************************************************************/ - -static void stli_onbenable(struct stlibrd *brdp) -{ - outb((brdp->enabval | ONB_ATENABLE), (brdp->iobase + ONB_ATCONFR)); -} - -/*****************************************************************************/ - -static void stli_onbdisable(struct stlibrd *brdp) -{ - outb((brdp->enabval | ONB_ATDISABLE), (brdp->iobase + ONB_ATCONFR)); -} - -/*****************************************************************************/ - -static void __iomem *stli_onbgetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), brd=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - } else { - ptr = brdp->membase + (offset % ONB_ATPAGESIZE); - } - return(ptr); -} - -/*****************************************************************************/ - -static void stli_onbreset(struct stlibrd *brdp) -{ - outb(ONB_ATSTOP, (brdp->iobase + ONB_ATCONFR)); - udelay(10); - outb(ONB_ATDISABLE, (brdp->iobase + ONB_ATCONFR)); - mdelay(1000); -} - -/*****************************************************************************/ - -/* - * The following routines act on ONboard EISA. - */ - -static void stli_onbeinit(struct stlibrd *brdp) -{ - unsigned long memconf; - - outb(0x1, (brdp->iobase + ONB_EIBRDENAB)); - outb(ONB_EISTOP, (brdp->iobase + ONB_EICONFR)); - udelay(10); - outb(ONB_EIDISABLE, (brdp->iobase + ONB_EICONFR)); - mdelay(1000); - - memconf = (brdp->memaddr & ONB_EIADDRMASKL) >> ONB_EIADDRSHFTL; - outb(memconf, (brdp->iobase + ONB_EIMEMARL)); - memconf = (brdp->memaddr & ONB_EIADDRMASKH) >> ONB_EIADDRSHFTH; - outb(memconf, (brdp->iobase + ONB_EIMEMARH)); - outb(0x1, brdp->iobase); - mdelay(1); -} - -/*****************************************************************************/ - -static void stli_onbeenable(struct stlibrd *brdp) -{ - outb(ONB_EIENABLE, (brdp->iobase + ONB_EICONFR)); -} - -/*****************************************************************************/ - -static void stli_onbedisable(struct stlibrd *brdp) -{ - outb(ONB_EIDISABLE, (brdp->iobase + ONB_EICONFR)); -} - -/*****************************************************************************/ - -static void __iomem *stli_onbegetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - if (offset > brdp->memsize) { - printk(KERN_ERR "istallion: shared memory pointer=%x out of " - "range at line=%d(%d), brd=%d\n", - (int) offset, line, __LINE__, brdp->brdnr); - ptr = NULL; - val = 0; - } else { - ptr = brdp->membase + (offset % ONB_EIPAGESIZE); - if (offset < ONB_EIPAGESIZE) - val = ONB_EIENABLE; - else - val = ONB_EIENABLE | 0x40; - } - outb(val, (brdp->iobase + ONB_EICONFR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_onbereset(struct stlibrd *brdp) -{ - outb(ONB_EISTOP, (brdp->iobase + ONB_EICONFR)); - udelay(10); - outb(ONB_EIDISABLE, (brdp->iobase + ONB_EICONFR)); - mdelay(1000); -} - -/*****************************************************************************/ - -/* - * The following routines act on Brumby boards. - */ - -static void stli_bbyinit(struct stlibrd *brdp) -{ - outb(BBY_ATSTOP, (brdp->iobase + BBY_ATCONFR)); - udelay(10); - outb(0, (brdp->iobase + BBY_ATCONFR)); - mdelay(1000); - outb(0x1, brdp->iobase); - mdelay(1); -} - -/*****************************************************************************/ - -static void __iomem *stli_bbygetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - void __iomem *ptr; - unsigned char val; - - BUG_ON(offset > brdp->memsize); - - ptr = brdp->membase + (offset % BBY_PAGESIZE); - val = (unsigned char) (offset / BBY_PAGESIZE); - outb(val, (brdp->iobase + BBY_ATCONFR)); - return(ptr); -} - -/*****************************************************************************/ - -static void stli_bbyreset(struct stlibrd *brdp) -{ - outb(BBY_ATSTOP, (brdp->iobase + BBY_ATCONFR)); - udelay(10); - outb(0, (brdp->iobase + BBY_ATCONFR)); - mdelay(1000); -} - -/*****************************************************************************/ - -/* - * The following routines act on original old Stallion boards. - */ - -static void stli_stalinit(struct stlibrd *brdp) -{ - outb(0x1, brdp->iobase); - mdelay(1000); -} - -/*****************************************************************************/ - -static void __iomem *stli_stalgetmemptr(struct stlibrd *brdp, unsigned long offset, int line) -{ - BUG_ON(offset > brdp->memsize); - return brdp->membase + (offset % STAL_PAGESIZE); -} - -/*****************************************************************************/ - -static void stli_stalreset(struct stlibrd *brdp) -{ - u32 __iomem *vecp; - - vecp = (u32 __iomem *) (brdp->membase + 0x30); - writel(0xffff0000, vecp); - outb(0, brdp->iobase); - mdelay(1000); -} - -/*****************************************************************************/ - -/* - * Try to find an ECP board and initialize it. This handles only ECP - * board types. - */ - -static int stli_initecp(struct stlibrd *brdp) -{ - cdkecpsig_t sig; - cdkecpsig_t __iomem *sigsp; - unsigned int status, nxtid; - char *name; - int retval, panelnr, nrports; - - if ((brdp->iobase == 0) || (brdp->memaddr == 0)) { - retval = -ENODEV; - goto err; - } - - brdp->iosize = ECP_IOSIZE; - - if (!request_region(brdp->iobase, brdp->iosize, "istallion")) { - retval = -EIO; - goto err; - } - -/* - * Based on the specific board type setup the common vars to access - * and enable shared memory. Set all board specific information now - * as well. - */ - switch (brdp->brdtype) { - case BRD_ECP: - brdp->memsize = ECP_MEMSIZE; - brdp->pagesize = ECP_ATPAGESIZE; - brdp->init = stli_ecpinit; - brdp->enable = stli_ecpenable; - brdp->reenable = stli_ecpenable; - brdp->disable = stli_ecpdisable; - brdp->getmemptr = stli_ecpgetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_ecpreset; - name = "serial(EC8/64)"; - break; - - case BRD_ECPE: - brdp->memsize = ECP_MEMSIZE; - brdp->pagesize = ECP_EIPAGESIZE; - brdp->init = stli_ecpeiinit; - brdp->enable = stli_ecpeienable; - brdp->reenable = stli_ecpeienable; - brdp->disable = stli_ecpeidisable; - brdp->getmemptr = stli_ecpeigetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_ecpeireset; - name = "serial(EC8/64-EI)"; - break; - - case BRD_ECPMC: - brdp->memsize = ECP_MEMSIZE; - brdp->pagesize = ECP_MCPAGESIZE; - brdp->init = NULL; - brdp->enable = stli_ecpmcenable; - brdp->reenable = stli_ecpmcenable; - brdp->disable = stli_ecpmcdisable; - brdp->getmemptr = stli_ecpmcgetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_ecpmcreset; - name = "serial(EC8/64-MCA)"; - break; - - case BRD_ECPPCI: - brdp->memsize = ECP_PCIMEMSIZE; - brdp->pagesize = ECP_PCIPAGESIZE; - brdp->init = stli_ecppciinit; - brdp->enable = NULL; - brdp->reenable = NULL; - brdp->disable = NULL; - brdp->getmemptr = stli_ecppcigetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_ecppcireset; - name = "serial(EC/RA-PCI)"; - break; - - default: - retval = -EINVAL; - goto err_reg; - } - -/* - * The per-board operations structure is all set up, so now let's go - * and get the board operational. Firstly initialize board configuration - * registers. Set the memory mapping info so we can get at the boards - * shared memory. - */ - EBRDINIT(brdp); - - brdp->membase = ioremap_nocache(brdp->memaddr, brdp->memsize); - if (brdp->membase == NULL) { - retval = -ENOMEM; - goto err_reg; - } - -/* - * Now that all specific code is set up, enable the shared memory and - * look for the a signature area that will tell us exactly what board - * this is, and what it is connected to it. - */ - EBRDENABLE(brdp); - sigsp = (cdkecpsig_t __iomem *) EBRDGETMEMPTR(brdp, CDK_SIGADDR); - memcpy_fromio(&sig, sigsp, sizeof(cdkecpsig_t)); - EBRDDISABLE(brdp); - - if (sig.magic != cpu_to_le32(ECP_MAGIC)) { - retval = -ENODEV; - goto err_unmap; - } - -/* - * Scan through the signature looking at the panels connected to the - * board. Calculate the total number of ports as we go. - */ - for (panelnr = 0, nxtid = 0; (panelnr < STL_MAXPANELS); panelnr++) { - status = sig.panelid[nxtid]; - if ((status & ECH_PNLIDMASK) != nxtid) - break; - - brdp->panelids[panelnr] = status; - nrports = (status & ECH_PNL16PORT) ? 16 : 8; - if ((nrports == 16) && ((status & ECH_PNLXPID) == 0)) - nxtid++; - brdp->panels[panelnr] = nrports; - brdp->nrports += nrports; - nxtid++; - brdp->nrpanels++; - } - - - set_bit(BST_FOUND, &brdp->state); - return 0; -err_unmap: - iounmap(brdp->membase); - brdp->membase = NULL; -err_reg: - release_region(brdp->iobase, brdp->iosize); -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Try to find an ONboard, Brumby or Stallion board and initialize it. - * This handles only these board types. - */ - -static int stli_initonb(struct stlibrd *brdp) -{ - cdkonbsig_t sig; - cdkonbsig_t __iomem *sigsp; - char *name; - int i, retval; - -/* - * Do a basic sanity check on the IO and memory addresses. - */ - if (brdp->iobase == 0 || brdp->memaddr == 0) { - retval = -ENODEV; - goto err; - } - - brdp->iosize = ONB_IOSIZE; - - if (!request_region(brdp->iobase, brdp->iosize, "istallion")) { - retval = -EIO; - goto err; - } - -/* - * Based on the specific board type setup the common vars to access - * and enable shared memory. Set all board specific information now - * as well. - */ - switch (brdp->brdtype) { - case BRD_ONBOARD: - case BRD_ONBOARD2: - brdp->memsize = ONB_MEMSIZE; - brdp->pagesize = ONB_ATPAGESIZE; - brdp->init = stli_onbinit; - brdp->enable = stli_onbenable; - brdp->reenable = stli_onbenable; - brdp->disable = stli_onbdisable; - brdp->getmemptr = stli_onbgetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_onbreset; - if (brdp->memaddr > 0x100000) - brdp->enabval = ONB_MEMENABHI; - else - brdp->enabval = ONB_MEMENABLO; - name = "serial(ONBoard)"; - break; - - case BRD_ONBOARDE: - brdp->memsize = ONB_EIMEMSIZE; - brdp->pagesize = ONB_EIPAGESIZE; - brdp->init = stli_onbeinit; - brdp->enable = stli_onbeenable; - brdp->reenable = stli_onbeenable; - brdp->disable = stli_onbedisable; - brdp->getmemptr = stli_onbegetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_onbereset; - name = "serial(ONBoard/E)"; - break; - - case BRD_BRUMBY4: - brdp->memsize = BBY_MEMSIZE; - brdp->pagesize = BBY_PAGESIZE; - brdp->init = stli_bbyinit; - brdp->enable = NULL; - brdp->reenable = NULL; - brdp->disable = NULL; - brdp->getmemptr = stli_bbygetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_bbyreset; - name = "serial(Brumby)"; - break; - - case BRD_STALLION: - brdp->memsize = STAL_MEMSIZE; - brdp->pagesize = STAL_PAGESIZE; - brdp->init = stli_stalinit; - brdp->enable = NULL; - brdp->reenable = NULL; - brdp->disable = NULL; - brdp->getmemptr = stli_stalgetmemptr; - brdp->intr = stli_ecpintr; - brdp->reset = stli_stalreset; - name = "serial(Stallion)"; - break; - - default: - retval = -EINVAL; - goto err_reg; - } - -/* - * The per-board operations structure is all set up, so now let's go - * and get the board operational. Firstly initialize board configuration - * registers. Set the memory mapping info so we can get at the boards - * shared memory. - */ - EBRDINIT(brdp); - - brdp->membase = ioremap_nocache(brdp->memaddr, brdp->memsize); - if (brdp->membase == NULL) { - retval = -ENOMEM; - goto err_reg; - } - -/* - * Now that all specific code is set up, enable the shared memory and - * look for the a signature area that will tell us exactly what board - * this is, and how many ports. - */ - EBRDENABLE(brdp); - sigsp = (cdkonbsig_t __iomem *) EBRDGETMEMPTR(brdp, CDK_SIGADDR); - memcpy_fromio(&sig, sigsp, sizeof(cdkonbsig_t)); - EBRDDISABLE(brdp); - - if (sig.magic0 != cpu_to_le16(ONB_MAGIC0) || - sig.magic1 != cpu_to_le16(ONB_MAGIC1) || - sig.magic2 != cpu_to_le16(ONB_MAGIC2) || - sig.magic3 != cpu_to_le16(ONB_MAGIC3)) { - retval = -ENODEV; - goto err_unmap; - } - -/* - * Scan through the signature alive mask and calculate how many ports - * there are on this board. - */ - brdp->nrpanels = 1; - if (sig.amask1) { - brdp->nrports = 32; - } else { - for (i = 0; (i < 16); i++) { - if (((sig.amask0 << i) & 0x8000) == 0) - break; - } - brdp->nrports = i; - } - brdp->panels[0] = brdp->nrports; - - - set_bit(BST_FOUND, &brdp->state); - return 0; -err_unmap: - iounmap(brdp->membase); - brdp->membase = NULL; -err_reg: - release_region(brdp->iobase, brdp->iosize); -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Start up a running board. This routine is only called after the - * code has been down loaded to the board and is operational. It will - * read in the memory map, and get the show on the road... - */ - -static int stli_startbrd(struct stlibrd *brdp) -{ - cdkhdr_t __iomem *hdrp; - cdkmem_t __iomem *memp; - cdkasy_t __iomem *ap; - unsigned long flags; - unsigned int portnr, nrdevs, i; - struct stliport *portp; - int rc = 0; - u32 memoff; - - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - hdrp = (cdkhdr_t __iomem *) EBRDGETMEMPTR(brdp, CDK_CDKADDR); - nrdevs = hdrp->nrdevs; - -#if 0 - printk("%s(%d): CDK version %d.%d.%d --> " - "nrdevs=%d memp=%x hostp=%x slavep=%x\n", - __FILE__, __LINE__, readb(&hdrp->ver_release), readb(&hdrp->ver_modification), - readb(&hdrp->ver_fix), nrdevs, (int) readl(&hdrp->memp), readl(&hdrp->hostp), - readl(&hdrp->slavep)); -#endif - - if (nrdevs < (brdp->nrports + 1)) { - printk(KERN_ERR "istallion: slave failed to allocate memory for " - "all devices, devices=%d\n", nrdevs); - brdp->nrports = nrdevs - 1; - } - brdp->nrdevs = nrdevs; - brdp->hostoffset = hdrp->hostp - CDK_CDKADDR; - brdp->slaveoffset = hdrp->slavep - CDK_CDKADDR; - brdp->bitsize = (nrdevs + 7) / 8; - memoff = readl(&hdrp->memp); - if (memoff > brdp->memsize) { - printk(KERN_ERR "istallion: corrupted shared memory region?\n"); - rc = -EIO; - goto stli_donestartup; - } - memp = (cdkmem_t __iomem *) EBRDGETMEMPTR(brdp, memoff); - if (readw(&memp->dtype) != TYP_ASYNCTRL) { - printk(KERN_ERR "istallion: no slave control device found\n"); - goto stli_donestartup; - } - memp++; - -/* - * Cycle through memory allocation of each port. We are guaranteed to - * have all ports inside the first page of slave window, so no need to - * change pages while reading memory map. - */ - for (i = 1, portnr = 0; (i < nrdevs); i++, portnr++, memp++) { - if (readw(&memp->dtype) != TYP_ASYNC) - break; - portp = brdp->ports[portnr]; - if (portp == NULL) - break; - portp->devnr = i; - portp->addr = readl(&memp->offset); - portp->reqbit = (unsigned char) (0x1 << (i * 8 / nrdevs)); - portp->portidx = (unsigned char) (i / 8); - portp->portbit = (unsigned char) (0x1 << (i % 8)); - } - - writeb(0xff, &hdrp->slavereq); - -/* - * For each port setup a local copy of the RX and TX buffer offsets - * and sizes. We do this separate from the above, because we need to - * move the shared memory page... - */ - for (i = 1, portnr = 0; (i < nrdevs); i++, portnr++) { - portp = brdp->ports[portnr]; - if (portp == NULL) - break; - if (portp->addr == 0) - break; - ap = (cdkasy_t __iomem *) EBRDGETMEMPTR(brdp, portp->addr); - if (ap != NULL) { - portp->rxsize = readw(&ap->rxq.size); - portp->txsize = readw(&ap->txq.size); - portp->rxoffset = readl(&ap->rxq.offset); - portp->txoffset = readl(&ap->txq.offset); - } - } - -stli_donestartup: - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - - if (rc == 0) - set_bit(BST_STARTED, &brdp->state); - - if (! stli_timeron) { - stli_timeron++; - mod_timer(&stli_timerlist, STLI_TIMEOUT); - } - - return rc; -} - -/*****************************************************************************/ - -/* - * Probe and initialize the specified board. - */ - -static int __devinit stli_brdinit(struct stlibrd *brdp) -{ - int retval; - - switch (brdp->brdtype) { - case BRD_ECP: - case BRD_ECPE: - case BRD_ECPMC: - case BRD_ECPPCI: - retval = stli_initecp(brdp); - break; - case BRD_ONBOARD: - case BRD_ONBOARDE: - case BRD_ONBOARD2: - case BRD_BRUMBY4: - case BRD_STALLION: - retval = stli_initonb(brdp); - break; - default: - printk(KERN_ERR "istallion: board=%d is unknown board " - "type=%d\n", brdp->brdnr, brdp->brdtype); - retval = -ENODEV; - } - - if (retval) - return retval; - - stli_initports(brdp); - printk(KERN_INFO "istallion: %s found, board=%d io=%x mem=%x " - "nrpanels=%d nrports=%d\n", stli_brdnames[brdp->brdtype], - brdp->brdnr, brdp->iobase, (int) brdp->memaddr, - brdp->nrpanels, brdp->nrports); - return 0; -} - -#if STLI_EISAPROBE != 0 -/*****************************************************************************/ - -/* - * Probe around trying to find where the EISA boards shared memory - * might be. This is a bit if hack, but it is the best we can do. - */ - -static int stli_eisamemprobe(struct stlibrd *brdp) -{ - cdkecpsig_t ecpsig, __iomem *ecpsigp; - cdkonbsig_t onbsig, __iomem *onbsigp; - int i, foundit; - -/* - * First up we reset the board, to get it into a known state. There - * is only 2 board types here we need to worry about. Don;t use the - * standard board init routine here, it programs up the shared - * memory address, and we don't know it yet... - */ - if (brdp->brdtype == BRD_ECPE) { - outb(0x1, (brdp->iobase + ECP_EIBRDENAB)); - outb(ECP_EISTOP, (brdp->iobase + ECP_EICONFR)); - udelay(10); - outb(ECP_EIDISABLE, (brdp->iobase + ECP_EICONFR)); - udelay(500); - stli_ecpeienable(brdp); - } else if (brdp->brdtype == BRD_ONBOARDE) { - outb(0x1, (brdp->iobase + ONB_EIBRDENAB)); - outb(ONB_EISTOP, (brdp->iobase + ONB_EICONFR)); - udelay(10); - outb(ONB_EIDISABLE, (brdp->iobase + ONB_EICONFR)); - mdelay(100); - outb(0x1, brdp->iobase); - mdelay(1); - stli_onbeenable(brdp); - } else { - return -ENODEV; - } - - foundit = 0; - brdp->memsize = ECP_MEMSIZE; - -/* - * Board shared memory is enabled, so now we have a poke around and - * see if we can find it. - */ - for (i = 0; (i < stli_eisamempsize); i++) { - brdp->memaddr = stli_eisamemprobeaddrs[i]; - brdp->membase = ioremap_nocache(brdp->memaddr, brdp->memsize); - if (brdp->membase == NULL) - continue; - - if (brdp->brdtype == BRD_ECPE) { - ecpsigp = stli_ecpeigetmemptr(brdp, - CDK_SIGADDR, __LINE__); - memcpy_fromio(&ecpsig, ecpsigp, sizeof(cdkecpsig_t)); - if (ecpsig.magic == cpu_to_le32(ECP_MAGIC)) - foundit = 1; - } else { - onbsigp = (cdkonbsig_t __iomem *) stli_onbegetmemptr(brdp, - CDK_SIGADDR, __LINE__); - memcpy_fromio(&onbsig, onbsigp, sizeof(cdkonbsig_t)); - if ((onbsig.magic0 == cpu_to_le16(ONB_MAGIC0)) && - (onbsig.magic1 == cpu_to_le16(ONB_MAGIC1)) && - (onbsig.magic2 == cpu_to_le16(ONB_MAGIC2)) && - (onbsig.magic3 == cpu_to_le16(ONB_MAGIC3))) - foundit = 1; - } - - iounmap(brdp->membase); - if (foundit) - break; - } - -/* - * Regardless of whether we found the shared memory or not we must - * disable the region. After that return success or failure. - */ - if (brdp->brdtype == BRD_ECPE) - stli_ecpeidisable(brdp); - else - stli_onbedisable(brdp); - - if (! foundit) { - brdp->memaddr = 0; - brdp->membase = NULL; - printk(KERN_ERR "istallion: failed to probe shared memory " - "region for %s in EISA slot=%d\n", - stli_brdnames[brdp->brdtype], (brdp->iobase >> 12)); - return -ENODEV; - } - return 0; -} -#endif - -static int stli_getbrdnr(void) -{ - unsigned int i; - - for (i = 0; i < STL_MAXBRDS; i++) { - if (!stli_brds[i]) { - if (i >= stli_nrbrds) - stli_nrbrds = i + 1; - return i; - } - } - return -1; -} - -#if STLI_EISAPROBE != 0 -/*****************************************************************************/ - -/* - * Probe around and try to find any EISA boards in system. The biggest - * problem here is finding out what memory address is associated with - * an EISA board after it is found. The registers of the ECPE and - * ONboardE are not readable - so we can't read them from there. We - * don't have access to the EISA CMOS (or EISA BIOS) so we don't - * actually have any way to find out the real value. The best we can - * do is go probing around in the usual places hoping we can find it. - */ - -static int __init stli_findeisabrds(void) -{ - struct stlibrd *brdp; - unsigned int iobase, eid, i; - int brdnr, found = 0; - -/* - * Firstly check if this is an EISA system. If this is not an EISA system then - * don't bother going any further! - */ - if (EISA_bus) - return 0; - -/* - * Looks like an EISA system, so go searching for EISA boards. - */ - for (iobase = 0x1000; (iobase <= 0xc000); iobase += 0x1000) { - outb(0xff, (iobase + 0xc80)); - eid = inb(iobase + 0xc80); - eid |= inb(iobase + 0xc81) << 8; - if (eid != STL_EISAID) - continue; - -/* - * We have found a board. Need to check if this board was - * statically configured already (just in case!). - */ - for (i = 0; (i < STL_MAXBRDS); i++) { - brdp = stli_brds[i]; - if (brdp == NULL) - continue; - if (brdp->iobase == iobase) - break; - } - if (i < STL_MAXBRDS) - continue; - -/* - * We have found a Stallion board and it is not configured already. - * Allocate a board structure and initialize it. - */ - if ((brdp = stli_allocbrd()) == NULL) - return found ? : -ENOMEM; - brdnr = stli_getbrdnr(); - if (brdnr < 0) - return found ? : -ENOMEM; - brdp->brdnr = (unsigned int)brdnr; - eid = inb(iobase + 0xc82); - if (eid == ECP_EISAID) - brdp->brdtype = BRD_ECPE; - else if (eid == ONB_EISAID) - brdp->brdtype = BRD_ONBOARDE; - else - brdp->brdtype = BRD_UNKNOWN; - brdp->iobase = iobase; - outb(0x1, (iobase + 0xc84)); - if (stli_eisamemprobe(brdp)) - outb(0, (iobase + 0xc84)); - if (stli_brdinit(brdp) < 0) { - kfree(brdp); - continue; - } - - stli_brds[brdp->brdnr] = brdp; - found++; - - for (i = 0; i < brdp->nrports; i++) - tty_register_device(stli_serial, - brdp->brdnr * STL_MAXPORTS + i, NULL); - } - - return found; -} -#else -static inline int stli_findeisabrds(void) { return 0; } -#endif - -/*****************************************************************************/ - -/* - * Find the next available board number that is free. - */ - -/*****************************************************************************/ - -/* - * We have a Stallion board. Allocate a board structure and - * initialize it. Read its IO and MEMORY resources from PCI - * configuration space. - */ - -static int __devinit stli_pciprobe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - struct stlibrd *brdp; - unsigned int i; - int brdnr, retval = -EIO; - - retval = pci_enable_device(pdev); - if (retval) - goto err; - brdp = stli_allocbrd(); - if (brdp == NULL) { - retval = -ENOMEM; - goto err; - } - mutex_lock(&stli_brdslock); - brdnr = stli_getbrdnr(); - if (brdnr < 0) { - printk(KERN_INFO "istallion: too many boards found, " - "maximum supported %d\n", STL_MAXBRDS); - mutex_unlock(&stli_brdslock); - retval = -EIO; - goto err_fr; - } - brdp->brdnr = (unsigned int)brdnr; - stli_brds[brdp->brdnr] = brdp; - mutex_unlock(&stli_brdslock); - brdp->brdtype = BRD_ECPPCI; -/* - * We have all resources from the board, so lets setup the actual - * board structure now. - */ - brdp->iobase = pci_resource_start(pdev, 3); - brdp->memaddr = pci_resource_start(pdev, 2); - retval = stli_brdinit(brdp); - if (retval) - goto err_null; - - set_bit(BST_PROBED, &brdp->state); - pci_set_drvdata(pdev, brdp); - - EBRDENABLE(brdp); - brdp->enable = NULL; - brdp->disable = NULL; - - for (i = 0; i < brdp->nrports; i++) - tty_register_device(stli_serial, brdp->brdnr * STL_MAXPORTS + i, - &pdev->dev); - - return 0; -err_null: - stli_brds[brdp->brdnr] = NULL; -err_fr: - kfree(brdp); -err: - return retval; -} - -static void __devexit stli_pciremove(struct pci_dev *pdev) -{ - struct stlibrd *brdp = pci_get_drvdata(pdev); - - stli_cleanup_ports(brdp); - - iounmap(brdp->membase); - if (brdp->iosize > 0) - release_region(brdp->iobase, brdp->iosize); - - stli_brds[brdp->brdnr] = NULL; - kfree(brdp); -} - -static struct pci_driver stli_pcidriver = { - .name = "istallion", - .id_table = istallion_pci_tbl, - .probe = stli_pciprobe, - .remove = __devexit_p(stli_pciremove) -}; -/*****************************************************************************/ - -/* - * Allocate a new board structure. Fill out the basic info in it. - */ - -static struct stlibrd *stli_allocbrd(void) -{ - struct stlibrd *brdp; - - brdp = kzalloc(sizeof(struct stlibrd), GFP_KERNEL); - if (!brdp) { - printk(KERN_ERR "istallion: failed to allocate memory " - "(size=%Zd)\n", sizeof(struct stlibrd)); - return NULL; - } - brdp->magic = STLI_BOARDMAGIC; - return brdp; -} - -/*****************************************************************************/ - -/* - * Scan through all the boards in the configuration and see what we - * can find. - */ - -static int __init stli_initbrds(void) -{ - struct stlibrd *brdp, *nxtbrdp; - struct stlconf conf; - unsigned int i, j, found = 0; - int retval; - - for (stli_nrbrds = 0; stli_nrbrds < ARRAY_SIZE(stli_brdsp); - stli_nrbrds++) { - memset(&conf, 0, sizeof(conf)); - if (stli_parsebrd(&conf, stli_brdsp[stli_nrbrds]) == 0) - continue; - if ((brdp = stli_allocbrd()) == NULL) - continue; - brdp->brdnr = stli_nrbrds; - brdp->brdtype = conf.brdtype; - brdp->iobase = conf.ioaddr1; - brdp->memaddr = conf.memaddr; - if (stli_brdinit(brdp) < 0) { - kfree(brdp); - continue; - } - stli_brds[brdp->brdnr] = brdp; - found++; - - for (i = 0; i < brdp->nrports; i++) - tty_register_device(stli_serial, - brdp->brdnr * STL_MAXPORTS + i, NULL); - } - - retval = stli_findeisabrds(); - if (retval > 0) - found += retval; - -/* - * All found boards are initialized. Now for a little optimization, if - * no boards are sharing the "shared memory" regions then we can just - * leave them all enabled. This is in fact the usual case. - */ - stli_shared = 0; - if (stli_nrbrds > 1) { - for (i = 0; (i < stli_nrbrds); i++) { - brdp = stli_brds[i]; - if (brdp == NULL) - continue; - for (j = i + 1; (j < stli_nrbrds); j++) { - nxtbrdp = stli_brds[j]; - if (nxtbrdp == NULL) - continue; - if ((brdp->membase >= nxtbrdp->membase) && - (brdp->membase <= (nxtbrdp->membase + - nxtbrdp->memsize - 1))) { - stli_shared++; - break; - } - } - } - } - - if (stli_shared == 0) { - for (i = 0; (i < stli_nrbrds); i++) { - brdp = stli_brds[i]; - if (brdp == NULL) - continue; - if (test_bit(BST_FOUND, &brdp->state)) { - EBRDENABLE(brdp); - brdp->enable = NULL; - brdp->disable = NULL; - } - } - } - - retval = pci_register_driver(&stli_pcidriver); - if (retval && found == 0) { - printk(KERN_ERR "Neither isa nor eisa cards found nor pci " - "driver can be registered!\n"); - goto err; - } - - return 0; -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Code to handle an "staliomem" read operation. This device is the - * contents of the board shared memory. It is used for down loading - * the slave image (and debugging :-) - */ - -static ssize_t stli_memread(struct file *fp, char __user *buf, size_t count, loff_t *offp) -{ - unsigned long flags; - void __iomem *memptr; - struct stlibrd *brdp; - unsigned int brdnr; - int size, n; - void *p; - loff_t off = *offp; - - brdnr = iminor(fp->f_path.dentry->d_inode); - if (brdnr >= stli_nrbrds) - return -ENODEV; - brdp = stli_brds[brdnr]; - if (brdp == NULL) - return -ENODEV; - if (brdp->state == 0) - return -ENODEV; - if (off >= brdp->memsize || off + count < off) - return 0; - - size = min(count, (size_t)(brdp->memsize - off)); - - /* - * Copy the data a page at a time - */ - - p = (void *)__get_free_page(GFP_KERNEL); - if(p == NULL) - return -ENOMEM; - - while (size > 0) { - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - memptr = EBRDGETMEMPTR(brdp, off); - n = min(size, (int)(brdp->pagesize - (((unsigned long) off) % brdp->pagesize))); - n = min(n, (int)PAGE_SIZE); - memcpy_fromio(p, memptr, n); - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - if (copy_to_user(buf, p, n)) { - count = -EFAULT; - goto out; - } - off += n; - buf += n; - size -= n; - } -out: - *offp = off; - free_page((unsigned long)p); - return count; -} - -/*****************************************************************************/ - -/* - * Code to handle an "staliomem" write operation. This device is the - * contents of the board shared memory. It is used for down loading - * the slave image (and debugging :-) - * - * FIXME: copy under lock - */ - -static ssize_t stli_memwrite(struct file *fp, const char __user *buf, size_t count, loff_t *offp) -{ - unsigned long flags; - void __iomem *memptr; - struct stlibrd *brdp; - char __user *chbuf; - unsigned int brdnr; - int size, n; - void *p; - loff_t off = *offp; - - brdnr = iminor(fp->f_path.dentry->d_inode); - - if (brdnr >= stli_nrbrds) - return -ENODEV; - brdp = stli_brds[brdnr]; - if (brdp == NULL) - return -ENODEV; - if (brdp->state == 0) - return -ENODEV; - if (off >= brdp->memsize || off + count < off) - return 0; - - chbuf = (char __user *) buf; - size = min(count, (size_t)(brdp->memsize - off)); - - /* - * Copy the data a page at a time - */ - - p = (void *)__get_free_page(GFP_KERNEL); - if(p == NULL) - return -ENOMEM; - - while (size > 0) { - n = min(size, (int)(brdp->pagesize - (((unsigned long) off) % brdp->pagesize))); - n = min(n, (int)PAGE_SIZE); - if (copy_from_user(p, chbuf, n)) { - if (count == 0) - count = -EFAULT; - goto out; - } - spin_lock_irqsave(&brd_lock, flags); - EBRDENABLE(brdp); - memptr = EBRDGETMEMPTR(brdp, off); - memcpy_toio(memptr, p, n); - EBRDDISABLE(brdp); - spin_unlock_irqrestore(&brd_lock, flags); - off += n; - chbuf += n; - size -= n; - } -out: - free_page((unsigned long) p); - *offp = off; - return count; -} - -/*****************************************************************************/ - -/* - * Return the board stats structure to user app. - */ - -static int stli_getbrdstats(combrd_t __user *bp) -{ - struct stlibrd *brdp; - unsigned int i; - combrd_t stli_brdstats; - - if (copy_from_user(&stli_brdstats, bp, sizeof(combrd_t))) - return -EFAULT; - if (stli_brdstats.brd >= STL_MAXBRDS) - return -ENODEV; - brdp = stli_brds[stli_brdstats.brd]; - if (brdp == NULL) - return -ENODEV; - - memset(&stli_brdstats, 0, sizeof(combrd_t)); - - stli_brdstats.brd = brdp->brdnr; - stli_brdstats.type = brdp->brdtype; - stli_brdstats.hwid = 0; - stli_brdstats.state = brdp->state; - stli_brdstats.ioaddr = brdp->iobase; - stli_brdstats.memaddr = brdp->memaddr; - stli_brdstats.nrpanels = brdp->nrpanels; - stli_brdstats.nrports = brdp->nrports; - for (i = 0; (i < brdp->nrpanels); i++) { - stli_brdstats.panels[i].panel = i; - stli_brdstats.panels[i].hwid = brdp->panelids[i]; - stli_brdstats.panels[i].nrports = brdp->panels[i]; - } - - if (copy_to_user(bp, &stli_brdstats, sizeof(combrd_t))) - return -EFAULT; - return 0; -} - -/*****************************************************************************/ - -/* - * Resolve the referenced port number into a port struct pointer. - */ - -static struct stliport *stli_getport(unsigned int brdnr, unsigned int panelnr, - unsigned int portnr) -{ - struct stlibrd *brdp; - unsigned int i; - - if (brdnr >= STL_MAXBRDS) - return NULL; - brdp = stli_brds[brdnr]; - if (brdp == NULL) - return NULL; - for (i = 0; (i < panelnr); i++) - portnr += brdp->panels[i]; - if (portnr >= brdp->nrports) - return NULL; - return brdp->ports[portnr]; -} - -/*****************************************************************************/ - -/* - * Return the port stats structure to user app. A NULL port struct - * pointer passed in means that we need to find out from the app - * what port to get stats for (used through board control device). - */ - -static int stli_portcmdstats(struct tty_struct *tty, struct stliport *portp) -{ - unsigned long flags; - struct stlibrd *brdp; - int rc; - - memset(&stli_comstats, 0, sizeof(comstats_t)); - - if (portp == NULL) - return -ENODEV; - brdp = stli_brds[portp->brdnr]; - if (brdp == NULL) - return -ENODEV; - - mutex_lock(&portp->port.mutex); - if (test_bit(BST_STARTED, &brdp->state)) { - if ((rc = stli_cmdwait(brdp, portp, A_GETSTATS, - &stli_cdkstats, sizeof(asystats_t), 1)) < 0) { - mutex_unlock(&portp->port.mutex); - return rc; - } - } else { - memset(&stli_cdkstats, 0, sizeof(asystats_t)); - } - - stli_comstats.brd = portp->brdnr; - stli_comstats.panel = portp->panelnr; - stli_comstats.port = portp->portnr; - stli_comstats.state = portp->state; - stli_comstats.flags = portp->port.flags; - - spin_lock_irqsave(&brd_lock, flags); - if (tty != NULL) { - if (portp->port.tty == tty) { - stli_comstats.ttystate = tty->flags; - stli_comstats.rxbuffered = -1; - if (tty->termios != NULL) { - stli_comstats.cflags = tty->termios->c_cflag; - stli_comstats.iflags = tty->termios->c_iflag; - stli_comstats.oflags = tty->termios->c_oflag; - stli_comstats.lflags = tty->termios->c_lflag; - } - } - } - spin_unlock_irqrestore(&brd_lock, flags); - - stli_comstats.txtotal = stli_cdkstats.txchars; - stli_comstats.rxtotal = stli_cdkstats.rxchars + stli_cdkstats.ringover; - stli_comstats.txbuffered = stli_cdkstats.txringq; - stli_comstats.rxbuffered += stli_cdkstats.rxringq; - stli_comstats.rxoverrun = stli_cdkstats.overruns; - stli_comstats.rxparity = stli_cdkstats.parity; - stli_comstats.rxframing = stli_cdkstats.framing; - stli_comstats.rxlost = stli_cdkstats.ringover; - stli_comstats.rxbreaks = stli_cdkstats.rxbreaks; - stli_comstats.txbreaks = stli_cdkstats.txbreaks; - stli_comstats.txxon = stli_cdkstats.txstart; - stli_comstats.txxoff = stli_cdkstats.txstop; - stli_comstats.rxxon = stli_cdkstats.rxstart; - stli_comstats.rxxoff = stli_cdkstats.rxstop; - stli_comstats.rxrtsoff = stli_cdkstats.rtscnt / 2; - stli_comstats.rxrtson = stli_cdkstats.rtscnt - stli_comstats.rxrtsoff; - stli_comstats.modem = stli_cdkstats.dcdcnt; - stli_comstats.hwid = stli_cdkstats.hwid; - stli_comstats.signals = stli_mktiocm(stli_cdkstats.signals); - mutex_unlock(&portp->port.mutex); - - return 0; -} - -/*****************************************************************************/ - -/* - * Return the port stats structure to user app. A NULL port struct - * pointer passed in means that we need to find out from the app - * what port to get stats for (used through board control device). - */ - -static int stli_getportstats(struct tty_struct *tty, struct stliport *portp, - comstats_t __user *cp) -{ - struct stlibrd *brdp; - int rc; - - if (!portp) { - if (copy_from_user(&stli_comstats, cp, sizeof(comstats_t))) - return -EFAULT; - portp = stli_getport(stli_comstats.brd, stli_comstats.panel, - stli_comstats.port); - if (!portp) - return -ENODEV; - } - - brdp = stli_brds[portp->brdnr]; - if (!brdp) - return -ENODEV; - - if ((rc = stli_portcmdstats(tty, portp)) < 0) - return rc; - - return copy_to_user(cp, &stli_comstats, sizeof(comstats_t)) ? - -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Clear the port stats structure. We also return it zeroed out... - */ - -static int stli_clrportstats(struct stliport *portp, comstats_t __user *cp) -{ - struct stlibrd *brdp; - int rc; - - if (!portp) { - if (copy_from_user(&stli_comstats, cp, sizeof(comstats_t))) - return -EFAULT; - portp = stli_getport(stli_comstats.brd, stli_comstats.panel, - stli_comstats.port); - if (!portp) - return -ENODEV; - } - - brdp = stli_brds[portp->brdnr]; - if (!brdp) - return -ENODEV; - - mutex_lock(&portp->port.mutex); - - if (test_bit(BST_STARTED, &brdp->state)) { - if ((rc = stli_cmdwait(brdp, portp, A_CLEARSTATS, NULL, 0, 0)) < 0) { - mutex_unlock(&portp->port.mutex); - return rc; - } - } - - memset(&stli_comstats, 0, sizeof(comstats_t)); - stli_comstats.brd = portp->brdnr; - stli_comstats.panel = portp->panelnr; - stli_comstats.port = portp->portnr; - mutex_unlock(&portp->port.mutex); - - if (copy_to_user(cp, &stli_comstats, sizeof(comstats_t))) - return -EFAULT; - return 0; -} - -/*****************************************************************************/ - -/* - * Return the entire driver ports structure to a user app. - */ - -static int stli_getportstruct(struct stliport __user *arg) -{ - struct stliport stli_dummyport; - struct stliport *portp; - - if (copy_from_user(&stli_dummyport, arg, sizeof(struct stliport))) - return -EFAULT; - portp = stli_getport(stli_dummyport.brdnr, stli_dummyport.panelnr, - stli_dummyport.portnr); - if (!portp) - return -ENODEV; - if (copy_to_user(arg, portp, sizeof(struct stliport))) - return -EFAULT; - return 0; -} - -/*****************************************************************************/ - -/* - * Return the entire driver board structure to a user app. - */ - -static int stli_getbrdstruct(struct stlibrd __user *arg) -{ - struct stlibrd stli_dummybrd; - struct stlibrd *brdp; - - if (copy_from_user(&stli_dummybrd, arg, sizeof(struct stlibrd))) - return -EFAULT; - if (stli_dummybrd.brdnr >= STL_MAXBRDS) - return -ENODEV; - brdp = stli_brds[stli_dummybrd.brdnr]; - if (!brdp) - return -ENODEV; - if (copy_to_user(arg, brdp, sizeof(struct stlibrd))) - return -EFAULT; - return 0; -} - -/*****************************************************************************/ - -/* - * The "staliomem" device is also required to do some special operations on - * the board. We need to be able to send an interrupt to the board, - * reset it, and start/stop it. - */ - -static long stli_memioctl(struct file *fp, unsigned int cmd, unsigned long arg) -{ - struct stlibrd *brdp; - int brdnr, rc, done; - void __user *argp = (void __user *)arg; - -/* - * First up handle the board independent ioctls. - */ - done = 0; - rc = 0; - - switch (cmd) { - case COM_GETPORTSTATS: - rc = stli_getportstats(NULL, NULL, argp); - done++; - break; - case COM_CLRPORTSTATS: - rc = stli_clrportstats(NULL, argp); - done++; - break; - case COM_GETBRDSTATS: - rc = stli_getbrdstats(argp); - done++; - break; - case COM_READPORT: - rc = stli_getportstruct(argp); - done++; - break; - case COM_READBOARD: - rc = stli_getbrdstruct(argp); - done++; - break; - } - if (done) - return rc; - -/* - * Now handle the board specific ioctls. These all depend on the - * minor number of the device they were called from. - */ - brdnr = iminor(fp->f_dentry->d_inode); - if (brdnr >= STL_MAXBRDS) - return -ENODEV; - brdp = stli_brds[brdnr]; - if (!brdp) - return -ENODEV; - if (brdp->state == 0) - return -ENODEV; - - switch (cmd) { - case STL_BINTR: - EBRDINTR(brdp); - break; - case STL_BSTART: - rc = stli_startbrd(brdp); - break; - case STL_BSTOP: - clear_bit(BST_STARTED, &brdp->state); - break; - case STL_BRESET: - clear_bit(BST_STARTED, &brdp->state); - EBRDRESET(brdp); - if (stli_shared == 0) { - if (brdp->reenable != NULL) - (* brdp->reenable)(brdp); - } - break; - default: - rc = -ENOIOCTLCMD; - break; - } - return rc; -} - -static const struct tty_operations stli_ops = { - .open = stli_open, - .close = stli_close, - .write = stli_write, - .put_char = stli_putchar, - .flush_chars = stli_flushchars, - .write_room = stli_writeroom, - .chars_in_buffer = stli_charsinbuffer, - .ioctl = stli_ioctl, - .set_termios = stli_settermios, - .throttle = stli_throttle, - .unthrottle = stli_unthrottle, - .stop = stli_stop, - .start = stli_start, - .hangup = stli_hangup, - .flush_buffer = stli_flushbuffer, - .break_ctl = stli_breakctl, - .wait_until_sent = stli_waituntilsent, - .send_xchar = stli_sendxchar, - .tiocmget = stli_tiocmget, - .tiocmset = stli_tiocmset, - .proc_fops = &stli_proc_fops, -}; - -static const struct tty_port_operations stli_port_ops = { - .carrier_raised = stli_carrier_raised, - .dtr_rts = stli_dtr_rts, - .activate = stli_activate, - .shutdown = stli_shutdown, -}; - -/*****************************************************************************/ -/* - * Loadable module initialization stuff. - */ - -static void istallion_cleanup_isa(void) -{ - struct stlibrd *brdp; - unsigned int j; - - for (j = 0; (j < stli_nrbrds); j++) { - if ((brdp = stli_brds[j]) == NULL || - test_bit(BST_PROBED, &brdp->state)) - continue; - - stli_cleanup_ports(brdp); - - iounmap(brdp->membase); - if (brdp->iosize > 0) - release_region(brdp->iobase, brdp->iosize); - kfree(brdp); - stli_brds[j] = NULL; - } -} - -static int __init istallion_module_init(void) -{ - unsigned int i; - int retval; - - printk(KERN_INFO "%s: version %s\n", stli_drvtitle, stli_drvversion); - - spin_lock_init(&stli_lock); - spin_lock_init(&brd_lock); - - stli_txcookbuf = kmalloc(STLI_TXBUFSIZE, GFP_KERNEL); - if (!stli_txcookbuf) { - printk(KERN_ERR "istallion: failed to allocate memory " - "(size=%d)\n", STLI_TXBUFSIZE); - retval = -ENOMEM; - goto err; - } - - stli_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS); - if (!stli_serial) { - retval = -ENOMEM; - goto err_free; - } - - stli_serial->owner = THIS_MODULE; - stli_serial->driver_name = stli_drvname; - stli_serial->name = stli_serialname; - stli_serial->major = STL_SERIALMAJOR; - stli_serial->minor_start = 0; - stli_serial->type = TTY_DRIVER_TYPE_SERIAL; - stli_serial->subtype = SERIAL_TYPE_NORMAL; - stli_serial->init_termios = stli_deftermios; - stli_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; - tty_set_operations(stli_serial, &stli_ops); - - retval = tty_register_driver(stli_serial); - if (retval) { - printk(KERN_ERR "istallion: failed to register serial driver\n"); - goto err_ttyput; - } - - retval = stli_initbrds(); - if (retval) - goto err_ttyunr; - -/* - * Set up a character driver for the shared memory region. We need this - * to down load the slave code image. Also it is a useful debugging tool. - */ - retval = register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stli_fsiomem); - if (retval) { - printk(KERN_ERR "istallion: failed to register serial memory " - "device\n"); - goto err_deinit; - } - - istallion_class = class_create(THIS_MODULE, "staliomem"); - for (i = 0; i < 4; i++) - device_create(istallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i), - NULL, "staliomem%d", i); - - return 0; -err_deinit: - pci_unregister_driver(&stli_pcidriver); - istallion_cleanup_isa(); -err_ttyunr: - tty_unregister_driver(stli_serial); -err_ttyput: - put_tty_driver(stli_serial); -err_free: - kfree(stli_txcookbuf); -err: - return retval; -} - -/*****************************************************************************/ - -static void __exit istallion_module_exit(void) -{ - unsigned int j; - - printk(KERN_INFO "Unloading %s: version %s\n", stli_drvtitle, - stli_drvversion); - - if (stli_timeron) { - stli_timeron = 0; - del_timer_sync(&stli_timerlist); - } - - unregister_chrdev(STL_SIOMEMMAJOR, "staliomem"); - - for (j = 0; j < 4; j++) - device_destroy(istallion_class, MKDEV(STL_SIOMEMMAJOR, j)); - class_destroy(istallion_class); - - pci_unregister_driver(&stli_pcidriver); - istallion_cleanup_isa(); - - tty_unregister_driver(stli_serial); - put_tty_driver(stli_serial); - - kfree(stli_txcookbuf); -} - -module_init(istallion_module_init); -module_exit(istallion_module_exit); diff --git a/drivers/staging/tty/riscom8.c b/drivers/staging/tty/riscom8.c deleted file mode 100644 index 602643a..0000000 --- a/drivers/staging/tty/riscom8.c +++ /dev/null @@ -1,1560 +0,0 @@ -/* - * linux/drivers/char/riscom.c -- RISCom/8 multiport serial driver. - * - * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) - * - * This code is loosely based on the Linux serial driver, written by - * Linus Torvalds, Theodore T'so and others. The RISCom/8 card - * programming info was obtained from various drivers for other OSes - * (FreeBSD, ISC, etc), but no source code from those drivers were - * directly included in this driver. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Revision 1.1 - * - * ChangeLog: - * Arnaldo Carvalho de Melo - 27-Jun-2001 - * - get rid of check_region and several cleanups - */ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "riscom8.h" -#include "riscom8_reg.h" - -/* Am I paranoid or not ? ;-) */ -#define RISCOM_PARANOIA_CHECK - -/* - * Crazy InteliCom/8 boards sometimes have swapped CTS & DSR signals. - * You can slightly speed up things by #undefing the following option, - * if you are REALLY sure that your board is correct one. - */ - -#define RISCOM_BRAIN_DAMAGED_CTS - -/* - * The following defines are mostly for testing purposes. But if you need - * some nice reporting in your syslog, you can define them also. - */ -#undef RC_REPORT_FIFO -#undef RC_REPORT_OVERRUN - - -#define RISCOM_LEGAL_FLAGS \ - (ASYNC_HUP_NOTIFY | ASYNC_SAK | ASYNC_SPLIT_TERMIOS | \ - ASYNC_SPD_HI | ASYNC_SPEED_VHI | ASYNC_SESSION_LOCKOUT | \ - ASYNC_PGRP_LOCKOUT | ASYNC_CALLOUT_NOHUP) - -static struct tty_driver *riscom_driver; - -static DEFINE_SPINLOCK(riscom_lock); - -static struct riscom_board rc_board[RC_NBOARD] = { - { - .base = RC_IOBASE1, - }, - { - .base = RC_IOBASE2, - }, - { - .base = RC_IOBASE3, - }, - { - .base = RC_IOBASE4, - }, -}; - -static struct riscom_port rc_port[RC_NBOARD * RC_NPORT]; - -/* RISCom/8 I/O ports addresses (without address translation) */ -static unsigned short rc_ioport[] = { -#if 1 - 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x09, 0x0a, 0x0b, 0x0c, -#else - 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x09, 0x0a, 0x0b, 0x0c, 0x10, - 0x11, 0x12, 0x18, 0x28, 0x31, 0x32, 0x39, 0x3a, 0x40, 0x41, 0x61, 0x62, - 0x63, 0x64, 0x6b, 0x70, 0x71, 0x78, 0x7a, 0x7b, 0x7f, 0x100, 0x101 -#endif -}; -#define RC_NIOPORT ARRAY_SIZE(rc_ioport) - - -static int rc_paranoia_check(struct riscom_port const *port, - char *name, const char *routine) -{ -#ifdef RISCOM_PARANOIA_CHECK - static const char badmagic[] = KERN_INFO - "rc: Warning: bad riscom port magic number for device %s in %s\n"; - static const char badinfo[] = KERN_INFO - "rc: Warning: null riscom port for device %s in %s\n"; - - if (!port) { - printk(badinfo, name, routine); - return 1; - } - if (port->magic != RISCOM8_MAGIC) { - printk(badmagic, name, routine); - return 1; - } -#endif - return 0; -} - -/* - * - * Service functions for RISCom/8 driver. - * - */ - -/* Get board number from pointer */ -static inline int board_No(struct riscom_board const *bp) -{ - return bp - rc_board; -} - -/* Get port number from pointer */ -static inline int port_No(struct riscom_port const *port) -{ - return RC_PORT(port - rc_port); -} - -/* Get pointer to board from pointer to port */ -static inline struct riscom_board *port_Board(struct riscom_port const *port) -{ - return &rc_board[RC_BOARD(port - rc_port)]; -} - -/* Input Byte from CL CD180 register */ -static inline unsigned char rc_in(struct riscom_board const *bp, - unsigned short reg) -{ - return inb(bp->base + RC_TO_ISA(reg)); -} - -/* Output Byte to CL CD180 register */ -static inline void rc_out(struct riscom_board const *bp, unsigned short reg, - unsigned char val) -{ - outb(val, bp->base + RC_TO_ISA(reg)); -} - -/* Wait for Channel Command Register ready */ -static void rc_wait_CCR(struct riscom_board const *bp) -{ - unsigned long delay; - - /* FIXME: need something more descriptive then 100000 :) */ - for (delay = 100000; delay; delay--) - if (!rc_in(bp, CD180_CCR)) - return; - - printk(KERN_INFO "rc%d: Timeout waiting for CCR.\n", board_No(bp)); -} - -/* - * RISCom/8 probe functions. - */ - -static int rc_request_io_range(struct riscom_board * const bp) -{ - int i; - - for (i = 0; i < RC_NIOPORT; i++) - if (!request_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1, - "RISCom/8")) { - goto out_release; - } - return 0; -out_release: - printk(KERN_INFO "rc%d: Skipping probe at 0x%03x. IO address in use.\n", - board_No(bp), bp->base); - while (--i >= 0) - release_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1); - return 1; -} - -static void rc_release_io_range(struct riscom_board * const bp) -{ - int i; - - for (i = 0; i < RC_NIOPORT; i++) - release_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1); -} - -/* Reset and setup CD180 chip */ -static void __init rc_init_CD180(struct riscom_board const *bp) -{ - unsigned long flags; - - spin_lock_irqsave(&riscom_lock, flags); - - rc_out(bp, RC_CTOUT, 0); /* Clear timeout */ - rc_wait_CCR(bp); /* Wait for CCR ready */ - rc_out(bp, CD180_CCR, CCR_HARDRESET); /* Reset CD180 chip */ - spin_unlock_irqrestore(&riscom_lock, flags); - msleep(50); /* Delay 0.05 sec */ - spin_lock_irqsave(&riscom_lock, flags); - rc_out(bp, CD180_GIVR, RC_ID); /* Set ID for this chip */ - rc_out(bp, CD180_GICR, 0); /* Clear all bits */ - rc_out(bp, CD180_PILR1, RC_ACK_MINT); /* Prio for modem intr */ - rc_out(bp, CD180_PILR2, RC_ACK_TINT); /* Prio for tx intr */ - rc_out(bp, CD180_PILR3, RC_ACK_RINT); /* Prio for rx intr */ - - /* Setting up prescaler. We need 4 ticks per 1 ms */ - rc_out(bp, CD180_PPRH, (RC_OSCFREQ/(1000000/RISCOM_TPS)) >> 8); - rc_out(bp, CD180_PPRL, (RC_OSCFREQ/(1000000/RISCOM_TPS)) & 0xff); - - spin_unlock_irqrestore(&riscom_lock, flags); -} - -/* Main probing routine, also sets irq. */ -static int __init rc_probe(struct riscom_board *bp) -{ - unsigned char val1, val2; - int irqs = 0; - int retries; - - bp->irq = 0; - - if (rc_request_io_range(bp)) - return 1; - - /* Are the I/O ports here ? */ - rc_out(bp, CD180_PPRL, 0x5a); - outb(0xff, 0x80); - val1 = rc_in(bp, CD180_PPRL); - rc_out(bp, CD180_PPRL, 0xa5); - outb(0x00, 0x80); - val2 = rc_in(bp, CD180_PPRL); - - if ((val1 != 0x5a) || (val2 != 0xa5)) { - printk(KERN_ERR "rc%d: RISCom/8 Board at 0x%03x not found.\n", - board_No(bp), bp->base); - goto out_release; - } - - /* It's time to find IRQ for this board */ - for (retries = 0; retries < 5 && irqs <= 0; retries++) { - irqs = probe_irq_on(); - rc_init_CD180(bp); /* Reset CD180 chip */ - rc_out(bp, CD180_CAR, 2); /* Select port 2 */ - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_TXEN); /* Enable transmitter */ - rc_out(bp, CD180_IER, IER_TXRDY);/* Enable tx empty intr */ - msleep(50); - irqs = probe_irq_off(irqs); - val1 = rc_in(bp, RC_BSR); /* Get Board Status reg */ - val2 = rc_in(bp, RC_ACK_TINT); /* ACK interrupt */ - rc_init_CD180(bp); /* Reset CD180 again */ - - if ((val1 & RC_BSR_TINT) || (val2 != (RC_ID | GIVR_IT_TX))) { - printk(KERN_ERR "rc%d: RISCom/8 Board at 0x%03x not " - "found.\n", board_No(bp), bp->base); - goto out_release; - } - } - - if (irqs <= 0) { - printk(KERN_ERR "rc%d: Can't find IRQ for RISCom/8 board " - "at 0x%03x.\n", board_No(bp), bp->base); - goto out_release; - } - bp->irq = irqs; - bp->flags |= RC_BOARD_PRESENT; - - printk(KERN_INFO "rc%d: RISCom/8 Rev. %c board detected at " - "0x%03x, IRQ %d.\n", - board_No(bp), - (rc_in(bp, CD180_GFRCR) & 0x0f) + 'A', /* Board revision */ - bp->base, bp->irq); - - return 0; -out_release: - rc_release_io_range(bp); - return 1; -} - -/* - * - * Interrupt processing routines. - * - */ - -static struct riscom_port *rc_get_port(struct riscom_board const *bp, - unsigned char const *what) -{ - unsigned char channel; - struct riscom_port *port; - - channel = rc_in(bp, CD180_GICR) >> GICR_CHAN_OFF; - if (channel < CD180_NCH) { - port = &rc_port[board_No(bp) * RC_NPORT + channel]; - if (port->port.flags & ASYNC_INITIALIZED) - return port; - } - printk(KERN_ERR "rc%d: %s interrupt from invalid port %d\n", - board_No(bp), what, channel); - return NULL; -} - -static void rc_receive_exc(struct riscom_board const *bp) -{ - struct riscom_port *port; - struct tty_struct *tty; - unsigned char status; - unsigned char ch, flag; - - port = rc_get_port(bp, "Receive"); - if (port == NULL) - return; - - tty = tty_port_tty_get(&port->port); - -#ifdef RC_REPORT_OVERRUN - status = rc_in(bp, CD180_RCSR); - if (status & RCSR_OE) - port->overrun++; - status &= port->mark_mask; -#else - status = rc_in(bp, CD180_RCSR) & port->mark_mask; -#endif - ch = rc_in(bp, CD180_RDR); - if (!status) - goto out; - if (status & RCSR_TOUT) { - printk(KERN_WARNING "rc%d: port %d: Receiver timeout. " - "Hardware problems ?\n", - board_No(bp), port_No(port)); - goto out; - - } else if (status & RCSR_BREAK) { - printk(KERN_INFO "rc%d: port %d: Handling break...\n", - board_No(bp), port_No(port)); - flag = TTY_BREAK; - if (tty && (port->port.flags & ASYNC_SAK)) - do_SAK(tty); - - } else if (status & RCSR_PE) - flag = TTY_PARITY; - - else if (status & RCSR_FE) - flag = TTY_FRAME; - - else if (status & RCSR_OE) - flag = TTY_OVERRUN; - else - flag = TTY_NORMAL; - - if (tty) { - tty_insert_flip_char(tty, ch, flag); - tty_flip_buffer_push(tty); - } -out: - tty_kref_put(tty); -} - -static void rc_receive(struct riscom_board const *bp) -{ - struct riscom_port *port; - struct tty_struct *tty; - unsigned char count; - - port = rc_get_port(bp, "Receive"); - if (port == NULL) - return; - - tty = tty_port_tty_get(&port->port); - - count = rc_in(bp, CD180_RDCR); - -#ifdef RC_REPORT_FIFO - port->hits[count > 8 ? 9 : count]++; -#endif - - while (count--) { - u8 ch = rc_in(bp, CD180_RDR); - if (tty) - tty_insert_flip_char(tty, ch, TTY_NORMAL); - } - if (tty) { - tty_flip_buffer_push(tty); - tty_kref_put(tty); - } -} - -static void rc_transmit(struct riscom_board const *bp) -{ - struct riscom_port *port; - struct tty_struct *tty; - unsigned char count; - - port = rc_get_port(bp, "Transmit"); - if (port == NULL) - return; - - tty = tty_port_tty_get(&port->port); - - if (port->IER & IER_TXEMPTY) { - /* FIFO drained */ - rc_out(bp, CD180_CAR, port_No(port)); - port->IER &= ~IER_TXEMPTY; - rc_out(bp, CD180_IER, port->IER); - goto out; - } - - if ((port->xmit_cnt <= 0 && !port->break_length) - || (tty && (tty->stopped || tty->hw_stopped))) { - rc_out(bp, CD180_CAR, port_No(port)); - port->IER &= ~IER_TXRDY; - rc_out(bp, CD180_IER, port->IER); - goto out; - } - - if (port->break_length) { - if (port->break_length > 0) { - if (port->COR2 & COR2_ETC) { - rc_out(bp, CD180_TDR, CD180_C_ESC); - rc_out(bp, CD180_TDR, CD180_C_SBRK); - port->COR2 &= ~COR2_ETC; - } - count = min_t(int, port->break_length, 0xff); - rc_out(bp, CD180_TDR, CD180_C_ESC); - rc_out(bp, CD180_TDR, CD180_C_DELAY); - rc_out(bp, CD180_TDR, count); - port->break_length -= count; - if (port->break_length == 0) - port->break_length--; - } else { - rc_out(bp, CD180_TDR, CD180_C_ESC); - rc_out(bp, CD180_TDR, CD180_C_EBRK); - rc_out(bp, CD180_COR2, port->COR2); - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_CORCHG2); - port->break_length = 0; - } - goto out; - } - - count = CD180_NFIFO; - do { - rc_out(bp, CD180_TDR, port->port.xmit_buf[port->xmit_tail++]); - port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1); - if (--port->xmit_cnt <= 0) - break; - } while (--count > 0); - - if (port->xmit_cnt <= 0) { - rc_out(bp, CD180_CAR, port_No(port)); - port->IER &= ~IER_TXRDY; - rc_out(bp, CD180_IER, port->IER); - } - if (tty && port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); -out: - tty_kref_put(tty); -} - -static void rc_check_modem(struct riscom_board const *bp) -{ - struct riscom_port *port; - struct tty_struct *tty; - unsigned char mcr; - - port = rc_get_port(bp, "Modem"); - if (port == NULL) - return; - - tty = tty_port_tty_get(&port->port); - - mcr = rc_in(bp, CD180_MCR); - if (mcr & MCR_CDCHG) { - if (rc_in(bp, CD180_MSVR) & MSVR_CD) - wake_up_interruptible(&port->port.open_wait); - else if (tty) - tty_hangup(tty); - } - -#ifdef RISCOM_BRAIN_DAMAGED_CTS - if (mcr & MCR_CTSCHG) { - if (rc_in(bp, CD180_MSVR) & MSVR_CTS) { - port->IER |= IER_TXRDY; - if (tty) { - tty->hw_stopped = 0; - if (port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); - } - } else { - if (tty) - tty->hw_stopped = 1; - port->IER &= ~IER_TXRDY; - } - rc_out(bp, CD180_IER, port->IER); - } - if (mcr & MCR_DSRCHG) { - if (rc_in(bp, CD180_MSVR) & MSVR_DSR) { - port->IER |= IER_TXRDY; - if (tty) { - tty->hw_stopped = 0; - if (port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); - } - } else { - if (tty) - tty->hw_stopped = 1; - port->IER &= ~IER_TXRDY; - } - rc_out(bp, CD180_IER, port->IER); - } -#endif /* RISCOM_BRAIN_DAMAGED_CTS */ - - /* Clear change bits */ - rc_out(bp, CD180_MCR, 0); - tty_kref_put(tty); -} - -/* The main interrupt processing routine */ -static irqreturn_t rc_interrupt(int dummy, void *dev_id) -{ - unsigned char status; - unsigned char ack; - struct riscom_board *bp = dev_id; - unsigned long loop = 0; - int handled = 0; - - if (!(bp->flags & RC_BOARD_ACTIVE)) - return IRQ_NONE; - - while ((++loop < 16) && ((status = ~(rc_in(bp, RC_BSR))) & - (RC_BSR_TOUT | RC_BSR_TINT | - RC_BSR_MINT | RC_BSR_RINT))) { - handled = 1; - if (status & RC_BSR_TOUT) - printk(KERN_WARNING "rc%d: Got timeout. Hardware " - "error?\n", board_No(bp)); - else if (status & RC_BSR_RINT) { - ack = rc_in(bp, RC_ACK_RINT); - if (ack == (RC_ID | GIVR_IT_RCV)) - rc_receive(bp); - else if (ack == (RC_ID | GIVR_IT_REXC)) - rc_receive_exc(bp); - else - printk(KERN_WARNING "rc%d: Bad receive ack " - "0x%02x.\n", - board_No(bp), ack); - } else if (status & RC_BSR_TINT) { - ack = rc_in(bp, RC_ACK_TINT); - if (ack == (RC_ID | GIVR_IT_TX)) - rc_transmit(bp); - else - printk(KERN_WARNING "rc%d: Bad transmit ack " - "0x%02x.\n", - board_No(bp), ack); - } else /* if (status & RC_BSR_MINT) */ { - ack = rc_in(bp, RC_ACK_MINT); - if (ack == (RC_ID | GIVR_IT_MODEM)) - rc_check_modem(bp); - else - printk(KERN_WARNING "rc%d: Bad modem ack " - "0x%02x.\n", - board_No(bp), ack); - } - rc_out(bp, CD180_EOIR, 0); /* Mark end of interrupt */ - rc_out(bp, RC_CTOUT, 0); /* Clear timeout flag */ - } - return IRQ_RETVAL(handled); -} - -/* - * Routines for open & close processing. - */ - -/* Called with disabled interrupts */ -static int rc_setup_board(struct riscom_board *bp) -{ - int error; - - if (bp->flags & RC_BOARD_ACTIVE) - return 0; - - error = request_irq(bp->irq, rc_interrupt, IRQF_DISABLED, - "RISCom/8", bp); - if (error) - return error; - - rc_out(bp, RC_CTOUT, 0); /* Just in case */ - bp->DTR = ~0; - rc_out(bp, RC_DTR, bp->DTR); /* Drop DTR on all ports */ - - bp->flags |= RC_BOARD_ACTIVE; - - return 0; -} - -/* Called with disabled interrupts */ -static void rc_shutdown_board(struct riscom_board *bp) -{ - if (!(bp->flags & RC_BOARD_ACTIVE)) - return; - - bp->flags &= ~RC_BOARD_ACTIVE; - - free_irq(bp->irq, NULL); - - bp->DTR = ~0; - rc_out(bp, RC_DTR, bp->DTR); /* Drop DTR on all ports */ - -} - -/* - * Setting up port characteristics. - * Must be called with disabled interrupts - */ -static void rc_change_speed(struct tty_struct *tty, struct riscom_board *bp, - struct riscom_port *port) -{ - unsigned long baud; - long tmp; - unsigned char cor1 = 0, cor3 = 0; - unsigned char mcor1 = 0, mcor2 = 0; - - port->IER = 0; - port->COR2 = 0; - port->MSVR = MSVR_RTS; - - baud = tty_get_baud_rate(tty); - - /* Select port on the board */ - rc_out(bp, CD180_CAR, port_No(port)); - - if (!baud) { - /* Drop DTR & exit */ - bp->DTR |= (1u << port_No(port)); - rc_out(bp, RC_DTR, bp->DTR); - return; - } else { - /* Set DTR on */ - bp->DTR &= ~(1u << port_No(port)); - rc_out(bp, RC_DTR, bp->DTR); - } - - /* - * Now we must calculate some speed depended things - */ - - /* Set baud rate for port */ - tmp = (((RC_OSCFREQ + baud/2) / baud + - CD180_TPC/2) / CD180_TPC); - - rc_out(bp, CD180_RBPRH, (tmp >> 8) & 0xff); - rc_out(bp, CD180_TBPRH, (tmp >> 8) & 0xff); - rc_out(bp, CD180_RBPRL, tmp & 0xff); - rc_out(bp, CD180_TBPRL, tmp & 0xff); - - baud = (baud + 5) / 10; /* Estimated CPS */ - - /* Two timer ticks seems enough to wakeup something like SLIP driver */ - tmp = ((baud + HZ/2) / HZ) * 2 - CD180_NFIFO; - port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ? - SERIAL_XMIT_SIZE - 1 : tmp); - - /* Receiver timeout will be transmission time for 1.5 chars */ - tmp = (RISCOM_TPS + RISCOM_TPS/2 + baud/2) / baud; - tmp = (tmp > 0xff) ? 0xff : tmp; - rc_out(bp, CD180_RTPR, tmp); - - switch (C_CSIZE(tty)) { - case CS5: - cor1 |= COR1_5BITS; - break; - case CS6: - cor1 |= COR1_6BITS; - break; - case CS7: - cor1 |= COR1_7BITS; - break; - case CS8: - cor1 |= COR1_8BITS; - break; - } - if (C_CSTOPB(tty)) - cor1 |= COR1_2SB; - - cor1 |= COR1_IGNORE; - if (C_PARENB(tty)) { - cor1 |= COR1_NORMPAR; - if (C_PARODD(tty)) - cor1 |= COR1_ODDP; - if (I_INPCK(tty)) - cor1 &= ~COR1_IGNORE; - } - /* Set marking of some errors */ - port->mark_mask = RCSR_OE | RCSR_TOUT; - if (I_INPCK(tty)) - port->mark_mask |= RCSR_FE | RCSR_PE; - if (I_BRKINT(tty) || I_PARMRK(tty)) - port->mark_mask |= RCSR_BREAK; - if (I_IGNPAR(tty)) - port->mark_mask &= ~(RCSR_FE | RCSR_PE); - if (I_IGNBRK(tty)) { - port->mark_mask &= ~RCSR_BREAK; - if (I_IGNPAR(tty)) - /* Real raw mode. Ignore all */ - port->mark_mask &= ~RCSR_OE; - } - /* Enable Hardware Flow Control */ - if (C_CRTSCTS(tty)) { -#ifdef RISCOM_BRAIN_DAMAGED_CTS - port->IER |= IER_DSR | IER_CTS; - mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD; - mcor2 |= MCOR2_DSROD | MCOR2_CTSOD; - tty->hw_stopped = !(rc_in(bp, CD180_MSVR) & - (MSVR_CTS|MSVR_DSR)); -#else - port->COR2 |= COR2_CTSAE; -#endif - } - /* Enable Software Flow Control. FIXME: I'm not sure about this */ - /* Some people reported that it works, but I still doubt */ - if (I_IXON(tty)) { - port->COR2 |= COR2_TXIBE; - cor3 |= (COR3_FCT | COR3_SCDE); - if (I_IXANY(tty)) - port->COR2 |= COR2_IXM; - rc_out(bp, CD180_SCHR1, START_CHAR(tty)); - rc_out(bp, CD180_SCHR2, STOP_CHAR(tty)); - rc_out(bp, CD180_SCHR3, START_CHAR(tty)); - rc_out(bp, CD180_SCHR4, STOP_CHAR(tty)); - } - if (!C_CLOCAL(tty)) { - /* Enable CD check */ - port->IER |= IER_CD; - mcor1 |= MCOR1_CDZD; - mcor2 |= MCOR2_CDOD; - } - - if (C_CREAD(tty)) - /* Enable receiver */ - port->IER |= IER_RXD; - - /* Set input FIFO size (1-8 bytes) */ - cor3 |= RISCOM_RXFIFO; - /* Setting up CD180 channel registers */ - rc_out(bp, CD180_COR1, cor1); - rc_out(bp, CD180_COR2, port->COR2); - rc_out(bp, CD180_COR3, cor3); - /* Make CD180 know about registers change */ - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3); - /* Setting up modem option registers */ - rc_out(bp, CD180_MCOR1, mcor1); - rc_out(bp, CD180_MCOR2, mcor2); - /* Enable CD180 transmitter & receiver */ - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_TXEN | CCR_RXEN); - /* Enable interrupts */ - rc_out(bp, CD180_IER, port->IER); - /* And finally set RTS on */ - rc_out(bp, CD180_MSVR, port->MSVR); -} - -/* Must be called with interrupts enabled */ -static int rc_activate_port(struct tty_port *port, struct tty_struct *tty) -{ - struct riscom_port *rp = container_of(port, struct riscom_port, port); - struct riscom_board *bp = port_Board(rp); - unsigned long flags; - - if (tty_port_alloc_xmit_buf(port) < 0) - return -ENOMEM; - - spin_lock_irqsave(&riscom_lock, flags); - - clear_bit(TTY_IO_ERROR, &tty->flags); - bp->count++; - rp->xmit_cnt = rp->xmit_head = rp->xmit_tail = 0; - rc_change_speed(tty, bp, rp); - spin_unlock_irqrestore(&riscom_lock, flags); - return 0; -} - -/* Must be called with interrupts disabled */ -static void rc_shutdown_port(struct tty_struct *tty, - struct riscom_board *bp, struct riscom_port *port) -{ -#ifdef RC_REPORT_OVERRUN - printk(KERN_INFO "rc%d: port %d: Total %ld overruns were detected.\n", - board_No(bp), port_No(port), port->overrun); -#endif -#ifdef RC_REPORT_FIFO - { - int i; - - printk(KERN_INFO "rc%d: port %d: FIFO hits [ ", - board_No(bp), port_No(port)); - for (i = 0; i < 10; i++) - printk("%ld ", port->hits[i]); - printk("].\n"); - } -#endif - tty_port_free_xmit_buf(&port->port); - - /* Select port */ - rc_out(bp, CD180_CAR, port_No(port)); - /* Reset port */ - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_SOFTRESET); - /* Disable all interrupts from this port */ - port->IER = 0; - rc_out(bp, CD180_IER, port->IER); - - set_bit(TTY_IO_ERROR, &tty->flags); - - if (--bp->count < 0) { - printk(KERN_INFO "rc%d: rc_shutdown_port: " - "bad board count: %d\n", - board_No(bp), bp->count); - bp->count = 0; - } - /* - * If this is the last opened port on the board - * shutdown whole board - */ - if (!bp->count) - rc_shutdown_board(bp); -} - -static int carrier_raised(struct tty_port *port) -{ - struct riscom_port *p = container_of(port, struct riscom_port, port); - struct riscom_board *bp = port_Board(p); - unsigned long flags; - int CD; - - spin_lock_irqsave(&riscom_lock, flags); - rc_out(bp, CD180_CAR, port_No(p)); - CD = rc_in(bp, CD180_MSVR) & MSVR_CD; - rc_out(bp, CD180_MSVR, MSVR_RTS); - bp->DTR &= ~(1u << port_No(p)); - rc_out(bp, RC_DTR, bp->DTR); - spin_unlock_irqrestore(&riscom_lock, flags); - return CD; -} - -static void dtr_rts(struct tty_port *port, int onoff) -{ - struct riscom_port *p = container_of(port, struct riscom_port, port); - struct riscom_board *bp = port_Board(p); - unsigned long flags; - - spin_lock_irqsave(&riscom_lock, flags); - bp->DTR &= ~(1u << port_No(p)); - if (onoff == 0) - bp->DTR |= (1u << port_No(p)); - rc_out(bp, RC_DTR, bp->DTR); - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static int rc_open(struct tty_struct *tty, struct file *filp) -{ - int board; - int error; - struct riscom_port *port; - struct riscom_board *bp; - - board = RC_BOARD(tty->index); - if (board >= RC_NBOARD || !(rc_board[board].flags & RC_BOARD_PRESENT)) - return -ENODEV; - - bp = &rc_board[board]; - port = rc_port + board * RC_NPORT + RC_PORT(tty->index); - if (rc_paranoia_check(port, tty->name, "rc_open")) - return -ENODEV; - - error = rc_setup_board(bp); - if (error) - return error; - - tty->driver_data = port; - return tty_port_open(&port->port, tty, filp); -} - -static void rc_flush_buffer(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_flush_buffer")) - return; - - spin_lock_irqsave(&riscom_lock, flags); - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - spin_unlock_irqrestore(&riscom_lock, flags); - - tty_wakeup(tty); -} - -static void rc_close_port(struct tty_port *port) -{ - unsigned long flags; - struct riscom_port *rp = container_of(port, struct riscom_port, port); - struct riscom_board *bp = port_Board(rp); - unsigned long timeout; - - /* - * At this point we stop accepting input. To do this, we - * disable the receive line status interrupts, and tell the - * interrupt driver to stop checking the data ready bit in the - * line status register. - */ - - spin_lock_irqsave(&riscom_lock, flags); - rp->IER &= ~IER_RXD; - - rp->IER &= ~IER_TXRDY; - rp->IER |= IER_TXEMPTY; - rc_out(bp, CD180_CAR, port_No(rp)); - rc_out(bp, CD180_IER, rp->IER); - /* - * Before we drop DTR, make sure the UART transmitter - * has completely drained; this is especially - * important if there is a transmit FIFO! - */ - timeout = jiffies + HZ; - while (rp->IER & IER_TXEMPTY) { - spin_unlock_irqrestore(&riscom_lock, flags); - msleep_interruptible(jiffies_to_msecs(rp->timeout)); - spin_lock_irqsave(&riscom_lock, flags); - if (time_after(jiffies, timeout)) - break; - } - rc_shutdown_port(port->tty, bp, rp); - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static void rc_close(struct tty_struct *tty, struct file *filp) -{ - struct riscom_port *port = tty->driver_data; - - if (!port || rc_paranoia_check(port, tty->name, "close")) - return; - tty_port_close(&port->port, tty, filp); -} - -static int rc_write(struct tty_struct *tty, - const unsigned char *buf, int count) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - int c, total = 0; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_write")) - return 0; - - bp = port_Board(port); - - while (1) { - spin_lock_irqsave(&riscom_lock, flags); - - c = min_t(int, count, min(SERIAL_XMIT_SIZE - port->xmit_cnt - 1, - SERIAL_XMIT_SIZE - port->xmit_head)); - if (c <= 0) - break; /* lock continues to be held */ - - memcpy(port->port.xmit_buf + port->xmit_head, buf, c); - port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1); - port->xmit_cnt += c; - - spin_unlock_irqrestore(&riscom_lock, flags); - - buf += c; - count -= c; - total += c; - } - - if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped && - !(port->IER & IER_TXRDY)) { - port->IER |= IER_TXRDY; - rc_out(bp, CD180_CAR, port_No(port)); - rc_out(bp, CD180_IER, port->IER); - } - - spin_unlock_irqrestore(&riscom_lock, flags); - - return total; -} - -static int rc_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct riscom_port *port = tty->driver_data; - unsigned long flags; - int ret = 0; - - if (rc_paranoia_check(port, tty->name, "rc_put_char")) - return 0; - - spin_lock_irqsave(&riscom_lock, flags); - - if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1) - goto out; - - port->port.xmit_buf[port->xmit_head++] = ch; - port->xmit_head &= SERIAL_XMIT_SIZE - 1; - port->xmit_cnt++; - ret = 1; - -out: - spin_unlock_irqrestore(&riscom_lock, flags); - return ret; -} - -static void rc_flush_chars(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_flush_chars")) - return; - - if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped) - return; - - spin_lock_irqsave(&riscom_lock, flags); - - port->IER |= IER_TXRDY; - rc_out(port_Board(port), CD180_CAR, port_No(port)); - rc_out(port_Board(port), CD180_IER, port->IER); - - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static int rc_write_room(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - int ret; - - if (rc_paranoia_check(port, tty->name, "rc_write_room")) - return 0; - - ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1; - if (ret < 0) - ret = 0; - return ret; -} - -static int rc_chars_in_buffer(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - - if (rc_paranoia_check(port, tty->name, "rc_chars_in_buffer")) - return 0; - - return port->xmit_cnt; -} - -static int rc_tiocmget(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - unsigned char status; - unsigned int result; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, __func__)) - return -ENODEV; - - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - - rc_out(bp, CD180_CAR, port_No(port)); - status = rc_in(bp, CD180_MSVR); - result = rc_in(bp, RC_RI) & (1u << port_No(port)) ? 0 : TIOCM_RNG; - - spin_unlock_irqrestore(&riscom_lock, flags); - - result |= ((status & MSVR_RTS) ? TIOCM_RTS : 0) - | ((status & MSVR_DTR) ? TIOCM_DTR : 0) - | ((status & MSVR_CD) ? TIOCM_CAR : 0) - | ((status & MSVR_DSR) ? TIOCM_DSR : 0) - | ((status & MSVR_CTS) ? TIOCM_CTS : 0); - return result; -} - -static int rc_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct riscom_port *port = tty->driver_data; - unsigned long flags; - struct riscom_board *bp; - - if (rc_paranoia_check(port, tty->name, __func__)) - return -ENODEV; - - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - - if (set & TIOCM_RTS) - port->MSVR |= MSVR_RTS; - if (set & TIOCM_DTR) - bp->DTR &= ~(1u << port_No(port)); - - if (clear & TIOCM_RTS) - port->MSVR &= ~MSVR_RTS; - if (clear & TIOCM_DTR) - bp->DTR |= (1u << port_No(port)); - - rc_out(bp, CD180_CAR, port_No(port)); - rc_out(bp, CD180_MSVR, port->MSVR); - rc_out(bp, RC_DTR, bp->DTR); - - spin_unlock_irqrestore(&riscom_lock, flags); - - return 0; -} - -static int rc_send_break(struct tty_struct *tty, int length) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp = port_Board(port); - unsigned long flags; - - if (length == 0 || length == -1) - return -EOPNOTSUPP; - - spin_lock_irqsave(&riscom_lock, flags); - - port->break_length = RISCOM_TPS / HZ * length; - port->COR2 |= COR2_ETC; - port->IER |= IER_TXRDY; - rc_out(bp, CD180_CAR, port_No(port)); - rc_out(bp, CD180_COR2, port->COR2); - rc_out(bp, CD180_IER, port->IER); - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_CORCHG2); - rc_wait_CCR(bp); - - spin_unlock_irqrestore(&riscom_lock, flags); - return 0; -} - -static int rc_set_serial_info(struct tty_struct *tty, struct riscom_port *port, - struct serial_struct __user *newinfo) -{ - struct serial_struct tmp; - struct riscom_board *bp = port_Board(port); - int change_speed; - - if (copy_from_user(&tmp, newinfo, sizeof(tmp))) - return -EFAULT; - - mutex_lock(&port->port.mutex); - change_speed = ((port->port.flags & ASYNC_SPD_MASK) != - (tmp.flags & ASYNC_SPD_MASK)); - - if (!capable(CAP_SYS_ADMIN)) { - if ((tmp.close_delay != port->port.close_delay) || - (tmp.closing_wait != port->port.closing_wait) || - ((tmp.flags & ~ASYNC_USR_MASK) != - (port->port.flags & ~ASYNC_USR_MASK))) { - mutex_unlock(&port->port.mutex); - return -EPERM; - } - port->port.flags = ((port->port.flags & ~ASYNC_USR_MASK) | - (tmp.flags & ASYNC_USR_MASK)); - } else { - port->port.flags = ((port->port.flags & ~ASYNC_FLAGS) | - (tmp.flags & ASYNC_FLAGS)); - port->port.close_delay = tmp.close_delay; - port->port.closing_wait = tmp.closing_wait; - } - if (change_speed) { - unsigned long flags; - - spin_lock_irqsave(&riscom_lock, flags); - rc_change_speed(tty, bp, port); - spin_unlock_irqrestore(&riscom_lock, flags); - } - mutex_unlock(&port->port.mutex); - return 0; -} - -static int rc_get_serial_info(struct riscom_port *port, - struct serial_struct __user *retinfo) -{ - struct serial_struct tmp; - struct riscom_board *bp = port_Board(port); - - memset(&tmp, 0, sizeof(tmp)); - tmp.type = PORT_CIRRUS; - tmp.line = port - rc_port; - - mutex_lock(&port->port.mutex); - tmp.port = bp->base; - tmp.irq = bp->irq; - tmp.flags = port->port.flags; - tmp.baud_base = (RC_OSCFREQ + CD180_TPC/2) / CD180_TPC; - tmp.close_delay = port->port.close_delay * HZ/100; - tmp.closing_wait = port->port.closing_wait * HZ/100; - mutex_unlock(&port->port.mutex); - tmp.xmit_fifo_size = CD180_NFIFO; - return copy_to_user(retinfo, &tmp, sizeof(tmp)) ? -EFAULT : 0; -} - -static int rc_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - struct riscom_port *port = tty->driver_data; - void __user *argp = (void __user *)arg; - int retval; - - if (rc_paranoia_check(port, tty->name, "rc_ioctl")) - return -ENODEV; - - switch (cmd) { - case TIOCGSERIAL: - retval = rc_get_serial_info(port, argp); - break; - case TIOCSSERIAL: - retval = rc_set_serial_info(tty, port, argp); - break; - default: - retval = -ENOIOCTLCMD; - } - return retval; -} - -static void rc_throttle(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_throttle")) - return; - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - port->MSVR &= ~MSVR_RTS; - rc_out(bp, CD180_CAR, port_No(port)); - if (I_IXOFF(tty)) { - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_SSCH2); - rc_wait_CCR(bp); - } - rc_out(bp, CD180_MSVR, port->MSVR); - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static void rc_unthrottle(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_unthrottle")) - return; - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - port->MSVR |= MSVR_RTS; - rc_out(bp, CD180_CAR, port_No(port)); - if (I_IXOFF(tty)) { - rc_wait_CCR(bp); - rc_out(bp, CD180_CCR, CCR_SSCH1); - rc_wait_CCR(bp); - } - rc_out(bp, CD180_MSVR, port->MSVR); - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static void rc_stop(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_stop")) - return; - - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - port->IER &= ~IER_TXRDY; - rc_out(bp, CD180_CAR, port_No(port)); - rc_out(bp, CD180_IER, port->IER); - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static void rc_start(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - struct riscom_board *bp; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_start")) - return; - - bp = port_Board(port); - - spin_lock_irqsave(&riscom_lock, flags); - - if (port->xmit_cnt && port->port.xmit_buf && !(port->IER & IER_TXRDY)) { - port->IER |= IER_TXRDY; - rc_out(bp, CD180_CAR, port_No(port)); - rc_out(bp, CD180_IER, port->IER); - } - spin_unlock_irqrestore(&riscom_lock, flags); -} - -static void rc_hangup(struct tty_struct *tty) -{ - struct riscom_port *port = tty->driver_data; - - if (rc_paranoia_check(port, tty->name, "rc_hangup")) - return; - - tty_port_hangup(&port->port); -} - -static void rc_set_termios(struct tty_struct *tty, - struct ktermios *old_termios) -{ - struct riscom_port *port = tty->driver_data; - unsigned long flags; - - if (rc_paranoia_check(port, tty->name, "rc_set_termios")) - return; - - spin_lock_irqsave(&riscom_lock, flags); - rc_change_speed(tty, port_Board(port), port); - spin_unlock_irqrestore(&riscom_lock, flags); - - if ((old_termios->c_cflag & CRTSCTS) && - !(tty->termios->c_cflag & CRTSCTS)) { - tty->hw_stopped = 0; - rc_start(tty); - } -} - -static const struct tty_operations riscom_ops = { - .open = rc_open, - .close = rc_close, - .write = rc_write, - .put_char = rc_put_char, - .flush_chars = rc_flush_chars, - .write_room = rc_write_room, - .chars_in_buffer = rc_chars_in_buffer, - .flush_buffer = rc_flush_buffer, - .ioctl = rc_ioctl, - .throttle = rc_throttle, - .unthrottle = rc_unthrottle, - .set_termios = rc_set_termios, - .stop = rc_stop, - .start = rc_start, - .hangup = rc_hangup, - .tiocmget = rc_tiocmget, - .tiocmset = rc_tiocmset, - .break_ctl = rc_send_break, -}; - -static const struct tty_port_operations riscom_port_ops = { - .carrier_raised = carrier_raised, - .dtr_rts = dtr_rts, - .shutdown = rc_close_port, - .activate = rc_activate_port, -}; - - -static int __init rc_init_drivers(void) -{ - int error; - int i; - - riscom_driver = alloc_tty_driver(RC_NBOARD * RC_NPORT); - if (!riscom_driver) - return -ENOMEM; - - riscom_driver->owner = THIS_MODULE; - riscom_driver->name = "ttyL"; - riscom_driver->major = RISCOM8_NORMAL_MAJOR; - riscom_driver->type = TTY_DRIVER_TYPE_SERIAL; - riscom_driver->subtype = SERIAL_TYPE_NORMAL; - riscom_driver->init_termios = tty_std_termios; - riscom_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - riscom_driver->init_termios.c_ispeed = 9600; - riscom_driver->init_termios.c_ospeed = 9600; - riscom_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_HARDWARE_BREAK; - tty_set_operations(riscom_driver, &riscom_ops); - error = tty_register_driver(riscom_driver); - if (error != 0) { - put_tty_driver(riscom_driver); - printk(KERN_ERR "rc: Couldn't register RISCom/8 driver, " - "error = %d\n", error); - return 1; - } - memset(rc_port, 0, sizeof(rc_port)); - for (i = 0; i < RC_NPORT * RC_NBOARD; i++) { - tty_port_init(&rc_port[i].port); - rc_port[i].port.ops = &riscom_port_ops; - rc_port[i].magic = RISCOM8_MAGIC; - } - return 0; -} - -static void rc_release_drivers(void) -{ - tty_unregister_driver(riscom_driver); - put_tty_driver(riscom_driver); -} - -#ifndef MODULE -/* - * Called at boot time. - * - * You can specify IO base for up to RC_NBOARD cards, - * using line "riscom8=0xiobase1,0xiobase2,.." at LILO prompt. - * Note that there will be no probing at default - * addresses in this case. - * - */ -static int __init riscom8_setup(char *str) -{ - int ints[RC_NBOARD]; - int i; - - str = get_options(str, ARRAY_SIZE(ints), ints); - - for (i = 0; i < RC_NBOARD; i++) { - if (i < ints[0]) - rc_board[i].base = ints[i+1]; - else - rc_board[i].base = 0; - } - return 1; -} - -__setup("riscom8=", riscom8_setup); -#endif - -static char banner[] __initdata = - KERN_INFO "rc: SDL RISCom/8 card driver v1.1, (c) D.Gorodchanin " - "1994-1996.\n"; -static char no_boards_msg[] __initdata = - KERN_INFO "rc: No RISCom/8 boards detected.\n"; - -/* - * This routine must be called by kernel at boot time - */ -static int __init riscom8_init(void) -{ - int i; - int found = 0; - - printk(banner); - - if (rc_init_drivers()) - return -EIO; - - for (i = 0; i < RC_NBOARD; i++) - if (rc_board[i].base && !rc_probe(&rc_board[i])) - found++; - if (!found) { - rc_release_drivers(); - printk(no_boards_msg); - return -EIO; - } - return 0; -} - -#ifdef MODULE -static int iobase; -static int iobase1; -static int iobase2; -static int iobase3; -module_param(iobase, int, 0); -module_param(iobase1, int, 0); -module_param(iobase2, int, 0); -module_param(iobase3, int, 0); - -MODULE_LICENSE("GPL"); -MODULE_ALIAS_CHARDEV_MAJOR(RISCOM8_NORMAL_MAJOR); -#endif /* MODULE */ - -/* - * You can setup up to 4 boards (current value of RC_NBOARD) - * by specifying "iobase=0xXXX iobase1=0xXXX ..." as insmod parameter. - * - */ -static int __init riscom8_init_module(void) -{ -#ifdef MODULE - int i; - - if (iobase || iobase1 || iobase2 || iobase3) { - for (i = 0; i < RC_NBOARD; i++) - rc_board[i].base = 0; - } - - if (iobase) - rc_board[0].base = iobase; - if (iobase1) - rc_board[1].base = iobase1; - if (iobase2) - rc_board[2].base = iobase2; - if (iobase3) - rc_board[3].base = iobase3; -#endif /* MODULE */ - - return riscom8_init(); -} - -static void __exit riscom8_exit_module(void) -{ - int i; - - rc_release_drivers(); - for (i = 0; i < RC_NBOARD; i++) - if (rc_board[i].flags & RC_BOARD_PRESENT) - rc_release_io_range(&rc_board[i]); - -} - -module_init(riscom8_init_module); -module_exit(riscom8_exit_module); diff --git a/drivers/staging/tty/riscom8.h b/drivers/staging/tty/riscom8.h deleted file mode 100644 index c9876b3..0000000 --- a/drivers/staging/tty/riscom8.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * linux/drivers/char/riscom8.h -- RISCom/8 multiport serial driver. - * - * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) - * - * This code is loosely based on the Linux serial driver, written by - * Linus Torvalds, Theodore T'so and others. The RISCom/8 card - * programming info was obtained from various drivers for other OSes - * (FreeBSD, ISC, etc), but no source code from those drivers were - * directly included in this driver. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __LINUX_RISCOM8_H -#define __LINUX_RISCOM8_H - -#include - -#ifdef __KERNEL__ - -#define RC_NBOARD 4 -/* NOTE: RISCom decoder recognizes 16 addresses... */ -#define RC_NPORT 8 -#define RC_BOARD(line) (((line) >> 3) & 0x07) -#define RC_PORT(line) ((line) & (RC_NPORT - 1)) - -/* Ticks per sec. Used for setting receiver timeout and break length */ -#define RISCOM_TPS 4000 - -/* Yeah, after heavy testing I decided it must be 6. - * Sure, You can change it if needed. - */ -#define RISCOM_RXFIFO 6 /* Max. receiver FIFO size (1-8) */ - -#define RISCOM8_MAGIC 0x0907 - -#define RC_IOBASE1 0x220 -#define RC_IOBASE2 0x240 -#define RC_IOBASE3 0x250 -#define RC_IOBASE4 0x260 - -struct riscom_board { - unsigned long flags; - unsigned short base; - unsigned char irq; - signed char count; - unsigned char DTR; -}; - -#define RC_BOARD_PRESENT 0x00000001 -#define RC_BOARD_ACTIVE 0x00000002 - -struct riscom_port { - int magic; - struct tty_port port; - int baud_base; - int timeout; - int custom_divisor; - int xmit_head; - int xmit_tail; - int xmit_cnt; - short wakeup_chars; - short break_length; - unsigned char mark_mask; - unsigned char IER; - unsigned char MSVR; - unsigned char COR2; -#ifdef RC_REPORT_OVERRUN - unsigned long overrun; -#endif -#ifdef RC_REPORT_FIFO - unsigned long hits[10]; -#endif -}; - -#endif /* __KERNEL__ */ -#endif /* __LINUX_RISCOM8_H */ diff --git a/drivers/staging/tty/riscom8_reg.h b/drivers/staging/tty/riscom8_reg.h deleted file mode 100644 index a32475e..0000000 --- a/drivers/staging/tty/riscom8_reg.h +++ /dev/null @@ -1,254 +0,0 @@ -/* - * linux/drivers/char/riscom8_reg.h -- RISCom/8 multiport serial driver. - */ - -/* - * Definitions for RISCom/8 Async Mux card by SDL Communications, Inc. - */ - -/* - * Address mapping between Cirrus Logic CD180 chip internal registers - * and ISA port addresses: - * - * CL-CD180 A6 A5 A4 A3 A2 A1 A0 - * ISA A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 - */ -#define RC_TO_ISA(r) ((((r)&0x07)<<1) | (((r)&~0x07)<<7)) - - -/* RISCom/8 On-Board Registers (assuming address translation) */ - -#define RC_RI 0x100 /* Ring Indicator Register (R/O) */ -#define RC_DTR 0x100 /* DTR Register (W/O) */ -#define RC_BSR 0x101 /* Board Status Register (R/O) */ -#define RC_CTOUT 0x101 /* Clear Timeout (W/O) */ - - -/* Board Status Register */ - -#define RC_BSR_TOUT 0x08 /* Hardware Timeout */ -#define RC_BSR_RINT 0x04 /* Receiver Interrupt */ -#define RC_BSR_TINT 0x02 /* Transmitter Interrupt */ -#define RC_BSR_MINT 0x01 /* Modem Ctl Interrupt */ - - -/* On-board oscillator frequency (in Hz) */ -#define RC_OSCFREQ 9830400 - -/* Values of choice for Interrupt ACKs */ -#define RC_ACK_MINT 0x81 /* goes to PILR1 */ -#define RC_ACK_RINT 0x82 /* goes to PILR3 */ -#define RC_ACK_TINT 0x84 /* goes to PILR2 */ - -/* Chip ID (sorry, only one chip now) */ -#define RC_ID 0x10 - -/* Definitions for Cirrus Logic CL-CD180 8-port async mux chip */ - -#define CD180_NCH 8 /* Total number of channels */ -#define CD180_TPC 16 /* Ticks per character */ -#define CD180_NFIFO 8 /* TX FIFO size */ - - -/* Global registers */ - -#define CD180_GIVR 0x40 /* Global Interrupt Vector Register */ -#define CD180_GICR 0x41 /* Global Interrupting Channel Register */ -#define CD180_PILR1 0x61 /* Priority Interrupt Level Register 1 */ -#define CD180_PILR2 0x62 /* Priority Interrupt Level Register 2 */ -#define CD180_PILR3 0x63 /* Priority Interrupt Level Register 3 */ -#define CD180_CAR 0x64 /* Channel Access Register */ -#define CD180_GFRCR 0x6b /* Global Firmware Revision Code Register */ -#define CD180_PPRH 0x70 /* Prescaler Period Register High */ -#define CD180_PPRL 0x71 /* Prescaler Period Register Low */ -#define CD180_RDR 0x78 /* Receiver Data Register */ -#define CD180_RCSR 0x7a /* Receiver Character Status Register */ -#define CD180_TDR 0x7b /* Transmit Data Register */ -#define CD180_EOIR 0x7f /* End of Interrupt Register */ - - -/* Channel Registers */ - -#define CD180_CCR 0x01 /* Channel Command Register */ -#define CD180_IER 0x02 /* Interrupt Enable Register */ -#define CD180_COR1 0x03 /* Channel Option Register 1 */ -#define CD180_COR2 0x04 /* Channel Option Register 2 */ -#define CD180_COR3 0x05 /* Channel Option Register 3 */ -#define CD180_CCSR 0x06 /* Channel Control Status Register */ -#define CD180_RDCR 0x07 /* Receive Data Count Register */ -#define CD180_SCHR1 0x09 /* Special Character Register 1 */ -#define CD180_SCHR2 0x0a /* Special Character Register 2 */ -#define CD180_SCHR3 0x0b /* Special Character Register 3 */ -#define CD180_SCHR4 0x0c /* Special Character Register 4 */ -#define CD180_MCOR1 0x10 /* Modem Change Option 1 Register */ -#define CD180_MCOR2 0x11 /* Modem Change Option 2 Register */ -#define CD180_MCR 0x12 /* Modem Change Register */ -#define CD180_RTPR 0x18 /* Receive Timeout Period Register */ -#define CD180_MSVR 0x28 /* Modem Signal Value Register */ -#define CD180_RBPRH 0x31 /* Receive Baud Rate Period Register High */ -#define CD180_RBPRL 0x32 /* Receive Baud Rate Period Register Low */ -#define CD180_TBPRH 0x39 /* Transmit Baud Rate Period Register High */ -#define CD180_TBPRL 0x3a /* Transmit Baud Rate Period Register Low */ - - -/* Global Interrupt Vector Register (R/W) */ - -#define GIVR_ITMASK 0x07 /* Interrupt type mask */ -#define GIVR_IT_MODEM 0x01 /* Modem Signal Change Interrupt */ -#define GIVR_IT_TX 0x02 /* Transmit Data Interrupt */ -#define GIVR_IT_RCV 0x03 /* Receive Good Data Interrupt */ -#define GIVR_IT_REXC 0x07 /* Receive Exception Interrupt */ - - -/* Global Interrupt Channel Register (R/W) */ - -#define GICR_CHAN 0x1c /* Channel Number Mask */ -#define GICR_CHAN_OFF 2 /* Channel Number Offset */ - - -/* Channel Address Register (R/W) */ - -#define CAR_CHAN 0x07 /* Channel Number Mask */ -#define CAR_A7 0x08 /* A7 Address Extension (unused) */ - - -/* Receive Character Status Register (R/O) */ - -#define RCSR_TOUT 0x80 /* Rx Timeout */ -#define RCSR_SCDET 0x70 /* Special Character Detected Mask */ -#define RCSR_NO_SC 0x00 /* No Special Characters Detected */ -#define RCSR_SC_1 0x10 /* Special Char 1 (or 1 & 3) Detected */ -#define RCSR_SC_2 0x20 /* Special Char 2 (or 2 & 4) Detected */ -#define RCSR_SC_3 0x30 /* Special Char 3 Detected */ -#define RCSR_SC_4 0x40 /* Special Char 4 Detected */ -#define RCSR_BREAK 0x08 /* Break has been detected */ -#define RCSR_PE 0x04 /* Parity Error */ -#define RCSR_FE 0x02 /* Frame Error */ -#define RCSR_OE 0x01 /* Overrun Error */ - - -/* Channel Command Register (R/W) (commands in groups can be OR-ed) */ - -#define CCR_HARDRESET 0x81 /* Reset the chip */ - -#define CCR_SOFTRESET 0x80 /* Soft Channel Reset */ - -#define CCR_CORCHG1 0x42 /* Channel Option Register 1 Changed */ -#define CCR_CORCHG2 0x44 /* Channel Option Register 2 Changed */ -#define CCR_CORCHG3 0x48 /* Channel Option Register 3 Changed */ - -#define CCR_SSCH1 0x21 /* Send Special Character 1 */ - -#define CCR_SSCH2 0x22 /* Send Special Character 2 */ - -#define CCR_SSCH3 0x23 /* Send Special Character 3 */ - -#define CCR_SSCH4 0x24 /* Send Special Character 4 */ - -#define CCR_TXEN 0x18 /* Enable Transmitter */ -#define CCR_RXEN 0x12 /* Enable Receiver */ - -#define CCR_TXDIS 0x14 /* Disable Transmitter */ -#define CCR_RXDIS 0x11 /* Disable Receiver */ - - -/* Interrupt Enable Register (R/W) */ - -#define IER_DSR 0x80 /* Enable interrupt on DSR change */ -#define IER_CD 0x40 /* Enable interrupt on CD change */ -#define IER_CTS 0x20 /* Enable interrupt on CTS change */ -#define IER_RXD 0x10 /* Enable interrupt on Receive Data */ -#define IER_RXSC 0x08 /* Enable interrupt on Receive Spec. Char */ -#define IER_TXRDY 0x04 /* Enable interrupt on TX FIFO empty */ -#define IER_TXEMPTY 0x02 /* Enable interrupt on TX completely empty */ -#define IER_RET 0x01 /* Enable interrupt on RX Exc. Timeout */ - - -/* Channel Option Register 1 (R/W) */ - -#define COR1_ODDP 0x80 /* Odd Parity */ -#define COR1_PARMODE 0x60 /* Parity Mode mask */ -#define COR1_NOPAR 0x00 /* No Parity */ -#define COR1_FORCEPAR 0x20 /* Force Parity */ -#define COR1_NORMPAR 0x40 /* Normal Parity */ -#define COR1_IGNORE 0x10 /* Ignore Parity on RX */ -#define COR1_STOPBITS 0x0c /* Number of Stop Bits */ -#define COR1_1SB 0x00 /* 1 Stop Bit */ -#define COR1_15SB 0x04 /* 1.5 Stop Bits */ -#define COR1_2SB 0x08 /* 2 Stop Bits */ -#define COR1_CHARLEN 0x03 /* Character Length */ -#define COR1_5BITS 0x00 /* 5 bits */ -#define COR1_6BITS 0x01 /* 6 bits */ -#define COR1_7BITS 0x02 /* 7 bits */ -#define COR1_8BITS 0x03 /* 8 bits */ - - -/* Channel Option Register 2 (R/W) */ - -#define COR2_IXM 0x80 /* Implied XON mode */ -#define COR2_TXIBE 0x40 /* Enable In-Band (XON/XOFF) Flow Control */ -#define COR2_ETC 0x20 /* Embedded Tx Commands Enable */ -#define COR2_LLM 0x10 /* Local Loopback Mode */ -#define COR2_RLM 0x08 /* Remote Loopback Mode */ -#define COR2_RTSAO 0x04 /* RTS Automatic Output Enable */ -#define COR2_CTSAE 0x02 /* CTS Automatic Enable */ -#define COR2_DSRAE 0x01 /* DSR Automatic Enable */ - - -/* Channel Option Register 3 (R/W) */ - -#define COR3_XONCH 0x80 /* XON is a pair of characters (1 & 3) */ -#define COR3_XOFFCH 0x40 /* XOFF is a pair of characters (2 & 4) */ -#define COR3_FCT 0x20 /* Flow-Control Transparency Mode */ -#define COR3_SCDE 0x10 /* Special Character Detection Enable */ -#define COR3_RXTH 0x0f /* RX FIFO Threshold value (1-8) */ - - -/* Channel Control Status Register (R/O) */ - -#define CCSR_RXEN 0x80 /* Receiver Enabled */ -#define CCSR_RXFLOFF 0x40 /* Receive Flow Off (XOFF was sent) */ -#define CCSR_RXFLON 0x20 /* Receive Flow On (XON was sent) */ -#define CCSR_TXEN 0x08 /* Transmitter Enabled */ -#define CCSR_TXFLOFF 0x04 /* Transmit Flow Off (got XOFF) */ -#define CCSR_TXFLON 0x02 /* Transmit Flow On (got XON) */ - - -/* Modem Change Option Register 1 (R/W) */ - -#define MCOR1_DSRZD 0x80 /* Detect 0->1 transition of DSR */ -#define MCOR1_CDZD 0x40 /* Detect 0->1 transition of CD */ -#define MCOR1_CTSZD 0x20 /* Detect 0->1 transition of CTS */ -#define MCOR1_DTRTH 0x0f /* Auto DTR flow control Threshold (1-8) */ -#define MCOR1_NODTRFC 0x0 /* Automatic DTR flow control disabled */ - - -/* Modem Change Option Register 2 (R/W) */ - -#define MCOR2_DSROD 0x80 /* Detect 1->0 transition of DSR */ -#define MCOR2_CDOD 0x40 /* Detect 1->0 transition of CD */ -#define MCOR2_CTSOD 0x20 /* Detect 1->0 transition of CTS */ - - -/* Modem Change Register (R/W) */ - -#define MCR_DSRCHG 0x80 /* DSR Changed */ -#define MCR_CDCHG 0x40 /* CD Changed */ -#define MCR_CTSCHG 0x20 /* CTS Changed */ - - -/* Modem Signal Value Register (R/W) */ - -#define MSVR_DSR 0x80 /* Current state of DSR input */ -#define MSVR_CD 0x40 /* Current state of CD input */ -#define MSVR_CTS 0x20 /* Current state of CTS input */ -#define MSVR_DTR 0x02 /* Current state of DTR output */ -#define MSVR_RTS 0x01 /* Current state of RTS output */ - - -/* Escape characters */ - -#define CD180_C_ESC 0x00 /* Escape character */ -#define CD180_C_SBRK 0x81 /* Start sending BREAK */ -#define CD180_C_DELAY 0x82 /* Delay output */ -#define CD180_C_EBRK 0x83 /* Stop sending BREAK */ diff --git a/drivers/staging/tty/serial167.c b/drivers/staging/tty/serial167.c deleted file mode 100644 index 674af69..0000000 --- a/drivers/staging/tty/serial167.c +++ /dev/null @@ -1,2489 +0,0 @@ -/* - * linux/drivers/char/serial167.c - * - * Driver for MVME166/7 board serial ports, which are via a CD2401. - * Based very much on cyclades.c. - * - * MVME166/7 work by Richard Hirst [richard@sleepie.demon.co.uk] - * - * ============================================================== - * - * static char rcsid[] = - * "$Revision: 1.36.1.4 $$Date: 1995/03/29 06:14:14 $"; - * - * linux/kernel/cyclades.c - * - * Maintained by Marcio Saito (cyclades@netcom.com) and - * Randolph Bentson (bentson@grieg.seaslug.org) - * - * Much of the design and some of the code came from serial.c - * which was copyright (C) 1991, 1992 Linus Torvalds. It was - * extensively rewritten by Theodore Ts'o, 8/16/92 -- 9/14/92, - * and then fixed as suggested by Michael K. Johnson 12/12/92. - * - * This version does not support shared irq's. - * - * $Log: cyclades.c,v $ - * Revision 1.36.1.4 1995/03/29 06:14:14 bentson - * disambiguate between Cyclom-16Y and Cyclom-32Ye; - * - * Changes: - * - * 200 lines of changes record removed - RGH 11-10-95, starting work on - * converting this to drive serial ports on mvme166 (cd2401). - * - * Arnaldo Carvalho de Melo - 2000/08/25 - * - get rid of verify_area - * - use get_user to access memory from userspace in set_threshold, - * set_default_threshold and set_timeout - * - don't use the panic function in serial167_init - * - do resource release on failure on serial167_init - * - include missing restore_flags in mvme167_serial_console_setup - * - * Kars de Jong - 2004/09/06 - * - replace bottom half handler with task queue handler - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#define SERIAL_PARANOIA_CHECK -#undef SERIAL_DEBUG_OPEN -#undef SERIAL_DEBUG_THROTTLE -#undef SERIAL_DEBUG_OTHER -#undef SERIAL_DEBUG_IO -#undef SERIAL_DEBUG_COUNT -#undef SERIAL_DEBUG_DTR -#undef CYCLOM_16Y_HACK -#define CYCLOM_ENABLE_MONITORING - -#define WAKEUP_CHARS 256 - -#define STD_COM_FLAGS (0) - -static struct tty_driver *cy_serial_driver; -extern int serial_console; -static struct cyclades_port *serial_console_info = NULL; -static unsigned int serial_console_cflag = 0; -u_char initial_console_speed; - -/* Base address of cd2401 chip on mvme166/7 */ - -#define BASE_ADDR (0xfff45000) -#define pcc2chip ((volatile u_char *)0xfff42000) -#define PccSCCMICR 0x1d -#define PccSCCTICR 0x1e -#define PccSCCRICR 0x1f -#define PccTPIACKR 0x25 -#define PccRPIACKR 0x27 -#define PccIMLR 0x3f - -/* This is the per-port data structure */ -struct cyclades_port cy_port[] = { - /* CARD# */ - {-1}, /* ttyS0 */ - {-1}, /* ttyS1 */ - {-1}, /* ttyS2 */ - {-1}, /* ttyS3 */ -}; - -#define NR_PORTS ARRAY_SIZE(cy_port) - -/* - * This is used to look up the divisor speeds and the timeouts - * We're normally limited to 15 distinct baud rates. The extra - * are accessed via settings in info->flags. - * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, - * 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, - * HI VHI - */ -static int baud_table[] = { - 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, - 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000, - 0 -}; - -#if 0 -static char baud_co[] = { /* 25 MHz clock option table */ - /* value => 00 01 02 03 04 */ - /* divide by 8 32 128 512 2048 */ - 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, - 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static char baud_bpr[] = { /* 25 MHz baud rate period table */ - 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3, - 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15 -}; -#endif - -/* I think 166 brd clocks 2401 at 20MHz.... */ - -/* These values are written directly to tcor, and >> 5 for writing to rcor */ -static u_char baud_co[] = { /* 20 MHz clock option table */ - 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x60, 0x40, - 0x40, 0x40, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -/* These values written directly to tbpr/rbpr */ -static u_char baud_bpr[] = { /* 20 MHz baud rate period table */ - 0x00, 0xc0, 0x80, 0x58, 0x6c, 0x40, 0xc0, 0x81, 0x40, 0x81, - 0x57, 0x40, 0x81, 0x40, 0x81, 0x40, 0x2b, 0x20, 0x15, 0x10 -}; - -static u_char baud_cor4[] = { /* receive threshold */ - 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, - 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07 -}; - -static void shutdown(struct cyclades_port *); -static int startup(struct cyclades_port *); -static void cy_throttle(struct tty_struct *); -static void cy_unthrottle(struct tty_struct *); -static void config_setup(struct cyclades_port *); -#ifdef CYCLOM_SHOW_STATUS -static void show_status(int); -#endif - -/* - * I have my own version of udelay(), as it is needed when initialising - * the chip, before the delay loop has been calibrated. Should probably - * reference one of the vmechip2 or pccchip2 counter for an accurate - * delay, but this wild guess will do for now. - */ - -void my_udelay(long us) -{ - u_char x; - volatile u_char *p = &x; - int i; - - while (us--) - for (i = 100; i; i--) - x |= *p; -} - -static inline int serial_paranoia_check(struct cyclades_port *info, char *name, - const char *routine) -{ -#ifdef SERIAL_PARANOIA_CHECK - if (!info) { - printk("Warning: null cyclades_port for (%s) in %s\n", name, - routine); - return 1; - } - - if (info < &cy_port[0] || info >= &cy_port[NR_PORTS]) { - printk("Warning: cyclades_port out of range for (%s) in %s\n", - name, routine); - return 1; - } - - if (info->magic != CYCLADES_MAGIC) { - printk("Warning: bad magic number for serial struct (%s) in " - "%s\n", name, routine); - return 1; - } -#endif - return 0; -} /* serial_paranoia_check */ - -#if 0 -/* The following diagnostic routines allow the driver to spew - information on the screen, even (especially!) during interrupts. - */ -void SP(char *data) -{ - unsigned long flags; - local_irq_save(flags); - printk(KERN_EMERG "%s", data); - local_irq_restore(flags); -} - -char scrn[2]; -void CP(char data) -{ - unsigned long flags; - local_irq_save(flags); - scrn[0] = data; - printk(KERN_EMERG "%c", scrn); - local_irq_restore(flags); -} /* CP */ - -void CP1(int data) -{ - (data < 10) ? CP(data + '0') : CP(data + 'A' - 10); -} /* CP1 */ -void CP2(int data) -{ - CP1((data >> 4) & 0x0f); - CP1(data & 0x0f); -} /* CP2 */ -void CP4(int data) -{ - CP2((data >> 8) & 0xff); - CP2(data & 0xff); -} /* CP4 */ -void CP8(long data) -{ - CP4((data >> 16) & 0xffff); - CP4(data & 0xffff); -} /* CP8 */ -#endif - -/* This routine waits up to 1000 micro-seconds for the previous - command to the Cirrus chip to complete and then issues the - new command. An error is returned if the previous command - didn't finish within the time limit. - */ -u_short write_cy_cmd(volatile u_char * base_addr, u_char cmd) -{ - unsigned long flags; - volatile int i; - - local_irq_save(flags); - /* Check to see that the previous command has completed */ - for (i = 0; i < 100; i++) { - if (base_addr[CyCCR] == 0) { - break; - } - my_udelay(10L); - } - /* if the CCR never cleared, the previous command - didn't finish within the "reasonable time" */ - if (i == 10) { - local_irq_restore(flags); - return (-1); - } - - /* Issue the new command */ - base_addr[CyCCR] = cmd; - local_irq_restore(flags); - return (0); -} /* write_cy_cmd */ - -/* cy_start and cy_stop provide software output flow control as a - function of XON/XOFF, software CTS, and other such stuff. */ - -static void cy_stop(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - unsigned long flags; - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_stop %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_stop")) - return; - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) (channel); /* index channel */ - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - local_irq_restore(flags); -} /* cy_stop */ - -static void cy_start(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - unsigned long flags; - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_start %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_start")) - return; - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) (channel); - base_addr[CyIER] |= CyTxMpty; - local_irq_restore(flags); -} /* cy_start */ - -/* The real interrupt service routines are called - whenever the card wants its hand held--chars - received, out buffer empty, modem change, etc. - */ -static irqreturn_t cd2401_rxerr_interrupt(int irq, void *dev_id) -{ - struct tty_struct *tty; - struct cyclades_port *info; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - unsigned char err, rfoc; - int channel; - char data; - - /* determine the channel and change to that context */ - channel = (u_short) (base_addr[CyLICR] >> 2); - info = &cy_port[channel]; - info->last_active = jiffies; - - if ((err = base_addr[CyRISR]) & CyTIMEOUT) { - /* This is a receive timeout interrupt, ignore it */ - base_addr[CyREOIR] = CyNOTRANS; - return IRQ_HANDLED; - } - - /* Read a byte of data if there is any - assume the error - * is associated with this character */ - - if ((rfoc = base_addr[CyRFOC]) != 0) - data = base_addr[CyRDR]; - else - data = 0; - - /* if there is nowhere to put the data, discard it */ - if (info->tty == 0) { - base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; - return IRQ_HANDLED; - } else { /* there is an open port for this data */ - tty = info->tty; - if (err & info->ignore_status_mask) { - base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; - return IRQ_HANDLED; - } - if (tty_buffer_request_room(tty, 1) != 0) { - if (err & info->read_status_mask) { - if (err & CyBREAK) { - tty_insert_flip_char(tty, data, - TTY_BREAK); - if (info->flags & ASYNC_SAK) { - do_SAK(tty); - } - } else if (err & CyFRAME) { - tty_insert_flip_char(tty, data, - TTY_FRAME); - } else if (err & CyPARITY) { - tty_insert_flip_char(tty, data, - TTY_PARITY); - } else if (err & CyOVERRUN) { - tty_insert_flip_char(tty, 0, - TTY_OVERRUN); - /* - If the flip buffer itself is - overflowing, we still lose - the next incoming character. - */ - if (tty_buffer_request_room(tty, 1) != - 0) { - tty_insert_flip_char(tty, data, - TTY_FRAME); - } - /* These two conditions may imply */ - /* a normal read should be done. */ - /* else if(data & CyTIMEOUT) */ - /* else if(data & CySPECHAR) */ - } else { - tty_insert_flip_char(tty, 0, - TTY_NORMAL); - } - } else { - tty_insert_flip_char(tty, data, TTY_NORMAL); - } - } else { - /* there was a software buffer overrun - and nothing could be done about it!!! */ - } - } - tty_schedule_flip(tty); - /* end of service */ - base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; - return IRQ_HANDLED; -} /* cy_rxerr_interrupt */ - -static irqreturn_t cd2401_modem_interrupt(int irq, void *dev_id) -{ - struct cyclades_port *info; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - int mdm_change; - int mdm_status; - - /* determine the channel and change to that context */ - channel = (u_short) (base_addr[CyLICR] >> 2); - info = &cy_port[channel]; - info->last_active = jiffies; - - mdm_change = base_addr[CyMISR]; - mdm_status = base_addr[CyMSVR1]; - - if (info->tty == 0) { /* nowhere to put the data, ignore it */ - ; - } else { - if ((mdm_change & CyDCD) - && (info->flags & ASYNC_CHECK_CD)) { - if (mdm_status & CyDCD) { -/* CP('!'); */ - wake_up_interruptible(&info->open_wait); - } else { -/* CP('@'); */ - tty_hangup(info->tty); - wake_up_interruptible(&info->open_wait); - info->flags &= ~ASYNC_NORMAL_ACTIVE; - } - } - if ((mdm_change & CyCTS) - && (info->flags & ASYNC_CTS_FLOW)) { - if (info->tty->stopped) { - if (mdm_status & CyCTS) { - /* !!! cy_start isn't used because... */ - info->tty->stopped = 0; - base_addr[CyIER] |= CyTxMpty; - tty_wakeup(info->tty); - } - } else { - if (!(mdm_status & CyCTS)) { - /* !!! cy_stop isn't used because... */ - info->tty->stopped = 1; - base_addr[CyIER] &= - ~(CyTxMpty | CyTxRdy); - } - } - } - if (mdm_status & CyDSR) { - } - } - base_addr[CyMEOIR] = 0; - return IRQ_HANDLED; -} /* cy_modem_interrupt */ - -static irqreturn_t cd2401_tx_interrupt(int irq, void *dev_id) -{ - struct cyclades_port *info; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - int char_count, saved_cnt; - int outch; - - /* determine the channel and change to that context */ - channel = (u_short) (base_addr[CyLICR] >> 2); - - /* validate the port number (as configured and open) */ - if ((channel < 0) || (NR_PORTS <= channel)) { - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - base_addr[CyTEOIR] = CyNOTRANS; - return IRQ_HANDLED; - } - info = &cy_port[channel]; - info->last_active = jiffies; - if (info->tty == 0) { - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - base_addr[CyTEOIR] = CyNOTRANS; - return IRQ_HANDLED; - } - - /* load the on-chip space available for outbound data */ - saved_cnt = char_count = base_addr[CyTFTC]; - - if (info->x_char) { /* send special char */ - outch = info->x_char; - base_addr[CyTDR] = outch; - char_count--; - info->x_char = 0; - } - - if (info->x_break) { - /* The Cirrus chip requires the "Embedded Transmit - Commands" of start break, delay, and end break - sequences to be sent. The duration of the - break is given in TICs, which runs at HZ - (typically 100) and the PPR runs at 200 Hz, - so the delay is duration * 200/HZ, and thus a - break can run from 1/100 sec to about 5/4 sec. - Need to check these values - RGH 141095. - */ - base_addr[CyTDR] = 0; /* start break */ - base_addr[CyTDR] = 0x81; - base_addr[CyTDR] = 0; /* delay a bit */ - base_addr[CyTDR] = 0x82; - base_addr[CyTDR] = info->x_break * 200 / HZ; - base_addr[CyTDR] = 0; /* terminate break */ - base_addr[CyTDR] = 0x83; - char_count -= 7; - info->x_break = 0; - } - - while (char_count > 0) { - if (!info->xmit_cnt) { - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - break; - } - if (info->xmit_buf == 0) { - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - break; - } - if (info->tty->stopped || info->tty->hw_stopped) { - base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); - break; - } - /* Because the Embedded Transmit Commands have been - enabled, we must check to see if the escape - character, NULL, is being sent. If it is, we - must ensure that there is room for it to be - doubled in the output stream. Therefore we - no longer advance the pointer when the character - is fetched, but rather wait until after the check - for a NULL output character. (This is necessary - because there may not be room for the two chars - needed to send a NULL. - */ - outch = info->xmit_buf[info->xmit_tail]; - if (outch) { - info->xmit_cnt--; - info->xmit_tail = (info->xmit_tail + 1) - & (PAGE_SIZE - 1); - base_addr[CyTDR] = outch; - char_count--; - } else { - if (char_count > 1) { - info->xmit_cnt--; - info->xmit_tail = (info->xmit_tail + 1) - & (PAGE_SIZE - 1); - base_addr[CyTDR] = outch; - base_addr[CyTDR] = 0; - char_count--; - char_count--; - } else { - break; - } - } - } - - if (info->xmit_cnt < WAKEUP_CHARS) - tty_wakeup(info->tty); - - base_addr[CyTEOIR] = (char_count != saved_cnt) ? 0 : CyNOTRANS; - return IRQ_HANDLED; -} /* cy_tx_interrupt */ - -static irqreturn_t cd2401_rx_interrupt(int irq, void *dev_id) -{ - struct tty_struct *tty; - struct cyclades_port *info; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - char data; - int char_count; - int save_cnt; - - /* determine the channel and change to that context */ - channel = (u_short) (base_addr[CyLICR] >> 2); - info = &cy_port[channel]; - info->last_active = jiffies; - save_cnt = char_count = base_addr[CyRFOC]; - - /* if there is nowhere to put the data, discard it */ - if (info->tty == 0) { - while (char_count--) { - data = base_addr[CyRDR]; - } - } else { /* there is an open port for this data */ - tty = info->tty; - /* load # characters available from the chip */ - -#ifdef CYCLOM_ENABLE_MONITORING - ++info->mon.int_count; - info->mon.char_count += char_count; - if (char_count > info->mon.char_max) - info->mon.char_max = char_count; - info->mon.char_last = char_count; -#endif - while (char_count--) { - data = base_addr[CyRDR]; - tty_insert_flip_char(tty, data, TTY_NORMAL); -#ifdef CYCLOM_16Y_HACK - udelay(10L); -#endif - } - tty_schedule_flip(tty); - } - /* end of service */ - base_addr[CyREOIR] = save_cnt ? 0 : CyNOTRANS; - return IRQ_HANDLED; -} /* cy_rx_interrupt */ - -/* This is called whenever a port becomes active; - interrupts are enabled and DTR & RTS are turned on. - */ -static int startup(struct cyclades_port *info) -{ - unsigned long flags; - volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; - int channel; - - if (info->flags & ASYNC_INITIALIZED) { - return 0; - } - - if (!info->type) { - if (info->tty) { - set_bit(TTY_IO_ERROR, &info->tty->flags); - } - return 0; - } - if (!info->xmit_buf) { - info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); - if (!info->xmit_buf) { - return -ENOMEM; - } - } - - config_setup(info); - - channel = info->line; - -#ifdef SERIAL_DEBUG_OPEN - printk("startup channel %d\n", channel); -#endif - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR); - - base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */ - base_addr[CyMSVR1] = CyRTS; -/* CP('S');CP('1'); */ - base_addr[CyMSVR2] = CyDTR; - -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: raising DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - - base_addr[CyIER] |= CyRxData; - info->flags |= ASYNC_INITIALIZED; - - if (info->tty) { - clear_bit(TTY_IO_ERROR, &info->tty->flags); - } - info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; - - local_irq_restore(flags); - -#ifdef SERIAL_DEBUG_OPEN - printk(" done\n"); -#endif - return 0; -} /* startup */ - -void start_xmit(struct cyclades_port *info) -{ - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - - channel = info->line; - local_irq_save(flags); - base_addr[CyCAR] = channel; - base_addr[CyIER] |= CyTxMpty; - local_irq_restore(flags); -} /* start_xmit */ - -/* - * This routine shuts down a serial port; interrupts are disabled, - * and DTR is dropped if the hangup on close termio flag is on. - */ -static void shutdown(struct cyclades_port *info) -{ - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - - if (!(info->flags & ASYNC_INITIALIZED)) { -/* CP('$'); */ - return; - } - - channel = info->line; - -#ifdef SERIAL_DEBUG_OPEN - printk("shutdown channel %d\n", channel); -#endif - - /* !!! REALLY MUST WAIT FOR LAST CHARACTER TO BE - SENT BEFORE DROPPING THE LINE !!! (Perhaps - set some flag that is read when XMTY happens.) - Other choices are to delay some fixed interval - or schedule some later processing. - */ - local_irq_save(flags); - if (info->xmit_buf) { - free_page((unsigned long)info->xmit_buf); - info->xmit_buf = NULL; - } - - base_addr[CyCAR] = (u_char) channel; - if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) { - base_addr[CyMSVR1] = 0; -/* CP('C');CP('1'); */ - base_addr[CyMSVR2] = 0; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: dropping DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - } - write_cy_cmd(base_addr, CyDIS_RCVR); - /* it may be appropriate to clear _XMIT at - some later date (after testing)!!! */ - - if (info->tty) { - set_bit(TTY_IO_ERROR, &info->tty->flags); - } - info->flags &= ~ASYNC_INITIALIZED; - local_irq_restore(flags); - -#ifdef SERIAL_DEBUG_OPEN - printk(" done\n"); -#endif -} /* shutdown */ - -/* - * This routine finds or computes the various line characteristics. - */ -static void config_setup(struct cyclades_port *info) -{ - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - unsigned cflag; - int i; - unsigned char ti, need_init_chan = 0; - - if (!info->tty || !info->tty->termios) { - return; - } - if (info->line == -1) { - return; - } - cflag = info->tty->termios->c_cflag; - - /* baud rate */ - i = cflag & CBAUD; -#ifdef CBAUDEX -/* Starting with kernel 1.1.65, there is direct support for - higher baud rates. The following code supports those - changes. The conditional aspect allows this driver to be - used for earlier as well as later kernel versions. (The - mapping is slightly different from serial.c because there - is still the possibility of supporting 75 kbit/sec with - the Cyclades board.) - */ - if (i & CBAUDEX) { - if (i == B57600) - i = 16; - else if (i == B115200) - i = 18; -#ifdef B78600 - else if (i == B78600) - i = 17; -#endif - else - info->tty->termios->c_cflag &= ~CBAUDEX; - } -#endif - if (i == 15) { - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - i += 1; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - i += 3; - } - /* Don't ever change the speed of the console port. It will - * run at the speed specified in bootinfo, or at 19.2K */ - /* Actually, it should run at whatever speed 166Bug was using */ - /* Note info->timeout isn't used at present */ - if (info != serial_console_info) { - info->tbpr = baud_bpr[i]; /* Tx BPR */ - info->tco = baud_co[i]; /* Tx CO */ - info->rbpr = baud_bpr[i]; /* Rx BPR */ - info->rco = baud_co[i] >> 5; /* Rx CO */ - if (baud_table[i] == 134) { - info->timeout = - (info->xmit_fifo_size * HZ * 30 / 269) + 2; - /* get it right for 134.5 baud */ - } else if (baud_table[i]) { - info->timeout = - (info->xmit_fifo_size * HZ * 15 / baud_table[i]) + - 2; - /* this needs to be propagated into the card info */ - } else { - info->timeout = 0; - } - } - /* By tradition (is it a standard?) a baud rate of zero - implies the line should be/has been closed. A bit - later in this routine such a test is performed. */ - - /* byte size and parity */ - info->cor7 = 0; - info->cor6 = 0; - info->cor5 = 0; - info->cor4 = (info->default_threshold ? info->default_threshold : baud_cor4[i]); /* receive threshold */ - /* Following two lines added 101295, RGH. */ - /* It is obviously wrong to access CyCORx, and not info->corx here, - * try and remember to fix it later! */ - channel = info->line; - base_addr[CyCAR] = (u_char) channel; - if (C_CLOCAL(info->tty)) { - if (base_addr[CyIER] & CyMdmCh) - base_addr[CyIER] &= ~CyMdmCh; /* without modem intr */ - /* ignore 1->0 modem transitions */ - if (base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) - base_addr[CyCOR4] &= ~(CyDSR | CyCTS | CyDCD); - /* ignore 0->1 modem transitions */ - if (base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) - base_addr[CyCOR5] &= ~(CyDSR | CyCTS | CyDCD); - } else { - if ((base_addr[CyIER] & CyMdmCh) != CyMdmCh) - base_addr[CyIER] |= CyMdmCh; /* with modem intr */ - /* act on 1->0 modem transitions */ - if ((base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) != - (CyDSR | CyCTS | CyDCD)) - base_addr[CyCOR4] |= CyDSR | CyCTS | CyDCD; - /* act on 0->1 modem transitions */ - if ((base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) != - (CyDSR | CyCTS | CyDCD)) - base_addr[CyCOR5] |= CyDSR | CyCTS | CyDCD; - } - info->cor3 = (cflag & CSTOPB) ? Cy_2_STOP : Cy_1_STOP; - info->cor2 = CyETC; - switch (cflag & CSIZE) { - case CS5: - info->cor1 = Cy_5_BITS; - break; - case CS6: - info->cor1 = Cy_6_BITS; - break; - case CS7: - info->cor1 = Cy_7_BITS; - break; - case CS8: - info->cor1 = Cy_8_BITS; - break; - } - if (cflag & PARENB) { - if (cflag & PARODD) { - info->cor1 |= CyPARITY_O; - } else { - info->cor1 |= CyPARITY_E; - } - } else { - info->cor1 |= CyPARITY_NONE; - } - - /* CTS flow control flag */ -#if 0 - /* Don't complcate matters for now! RGH 141095 */ - if (cflag & CRTSCTS) { - info->flags |= ASYNC_CTS_FLOW; - info->cor2 |= CyCtsAE; - } else { - info->flags &= ~ASYNC_CTS_FLOW; - info->cor2 &= ~CyCtsAE; - } -#endif - if (cflag & CLOCAL) - info->flags &= ~ASYNC_CHECK_CD; - else - info->flags |= ASYNC_CHECK_CD; - - /*********************************************** - The hardware option, CyRtsAO, presents RTS when - the chip has characters to send. Since most modems - use RTS as reverse (inbound) flow control, this - option is not used. If inbound flow control is - necessary, DTR can be programmed to provide the - appropriate signals for use with a non-standard - cable. Contact Marcio Saito for details. - ***********************************************/ - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - - /* CyCMR set once only in mvme167_init_serial() */ - if (base_addr[CyLICR] != channel << 2) - base_addr[CyLICR] = channel << 2; - if (base_addr[CyLIVR] != 0x5c) - base_addr[CyLIVR] = 0x5c; - - /* tx and rx baud rate */ - - if (base_addr[CyCOR1] != info->cor1) - need_init_chan = 1; - if (base_addr[CyTCOR] != info->tco) - base_addr[CyTCOR] = info->tco; - if (base_addr[CyTBPR] != info->tbpr) - base_addr[CyTBPR] = info->tbpr; - if (base_addr[CyRCOR] != info->rco) - base_addr[CyRCOR] = info->rco; - if (base_addr[CyRBPR] != info->rbpr) - base_addr[CyRBPR] = info->rbpr; - - /* set line characteristics according configuration */ - - if (base_addr[CySCHR1] != START_CHAR(info->tty)) - base_addr[CySCHR1] = START_CHAR(info->tty); - if (base_addr[CySCHR2] != STOP_CHAR(info->tty)) - base_addr[CySCHR2] = STOP_CHAR(info->tty); - if (base_addr[CySCRL] != START_CHAR(info->tty)) - base_addr[CySCRL] = START_CHAR(info->tty); - if (base_addr[CySCRH] != START_CHAR(info->tty)) - base_addr[CySCRH] = START_CHAR(info->tty); - if (base_addr[CyCOR1] != info->cor1) - base_addr[CyCOR1] = info->cor1; - if (base_addr[CyCOR2] != info->cor2) - base_addr[CyCOR2] = info->cor2; - if (base_addr[CyCOR3] != info->cor3) - base_addr[CyCOR3] = info->cor3; - if (base_addr[CyCOR4] != info->cor4) - base_addr[CyCOR4] = info->cor4; - if (base_addr[CyCOR5] != info->cor5) - base_addr[CyCOR5] = info->cor5; - if (base_addr[CyCOR6] != info->cor6) - base_addr[CyCOR6] = info->cor6; - if (base_addr[CyCOR7] != info->cor7) - base_addr[CyCOR7] = info->cor7; - - if (need_init_chan) - write_cy_cmd(base_addr, CyINIT_CHAN); - - base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */ - - /* 2ms default rx timeout */ - ti = info->default_timeout ? info->default_timeout : 0x02; - if (base_addr[CyRTPRL] != ti) - base_addr[CyRTPRL] = ti; - if (base_addr[CyRTPRH] != 0) - base_addr[CyRTPRH] = 0; - - /* Set up RTS here also ????? RGH 141095 */ - if (i == 0) { /* baud rate is zero, turn off line */ - if ((base_addr[CyMSVR2] & CyDTR) == CyDTR) - base_addr[CyMSVR2] = 0; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: dropping DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - } else { - if ((base_addr[CyMSVR2] & CyDTR) != CyDTR) - base_addr[CyMSVR2] = CyDTR; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: raising DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - } - - if (info->tty) { - clear_bit(TTY_IO_ERROR, &info->tty->flags); - } - - local_irq_restore(flags); - -} /* config_setup */ - -static int cy_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - -#ifdef SERIAL_DEBUG_IO - printk("cy_put_char %s(0x%02x)\n", tty->name, ch); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_put_char")) - return 0; - - if (!info->xmit_buf) - return 0; - - local_irq_save(flags); - if (info->xmit_cnt >= PAGE_SIZE - 1) { - local_irq_restore(flags); - return 0; - } - - info->xmit_buf[info->xmit_head++] = ch; - info->xmit_head &= PAGE_SIZE - 1; - info->xmit_cnt++; - local_irq_restore(flags); - return 1; -} /* cy_put_char */ - -static void cy_flush_chars(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - -#ifdef SERIAL_DEBUG_IO - printk("cy_flush_chars %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_flush_chars")) - return; - - if (info->xmit_cnt <= 0 || tty->stopped - || tty->hw_stopped || !info->xmit_buf) - return; - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = channel; - base_addr[CyIER] |= CyTxMpty; - local_irq_restore(flags); -} /* cy_flush_chars */ - -/* This routine gets called when tty_write has put something into - the write_queue. If the port is not already transmitting stuff, - start it off by enabling interrupts. The interrupt service - routine will then ensure that the characters are sent. If the - port is already active, there is no need to kick it. - */ -static int cy_write(struct tty_struct *tty, const unsigned char *buf, int count) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - int c, total = 0; - -#ifdef SERIAL_DEBUG_IO - printk("cy_write %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_write")) { - return 0; - } - - if (!info->xmit_buf) { - return 0; - } - - while (1) { - local_irq_save(flags); - c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, - SERIAL_XMIT_SIZE - info->xmit_head)); - if (c <= 0) { - local_irq_restore(flags); - break; - } - - memcpy(info->xmit_buf + info->xmit_head, buf, c); - info->xmit_head = - (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1); - info->xmit_cnt += c; - local_irq_restore(flags); - - buf += c; - count -= c; - total += c; - } - - if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) { - start_xmit(info); - } - return total; -} /* cy_write */ - -static int cy_write_room(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - int ret; - -#ifdef SERIAL_DEBUG_IO - printk("cy_write_room %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_write_room")) - return 0; - ret = PAGE_SIZE - info->xmit_cnt - 1; - if (ret < 0) - ret = 0; - return ret; -} /* cy_write_room */ - -static int cy_chars_in_buffer(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef SERIAL_DEBUG_IO - printk("cy_chars_in_buffer %s %d\n", tty->name, info->xmit_cnt); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer")) - return 0; - - return info->xmit_cnt; -} /* cy_chars_in_buffer */ - -static void cy_flush_buffer(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - -#ifdef SERIAL_DEBUG_IO - printk("cy_flush_buffer %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_flush_buffer")) - return; - local_irq_save(flags); - info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; - local_irq_restore(flags); - tty_wakeup(tty); -} /* cy_flush_buffer */ - -/* This routine is called by the upper-layer tty layer to signal - that incoming characters should be throttled or that the - throttle should be released. - */ -static void cy_throttle(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - -#ifdef SERIAL_DEBUG_THROTTLE - char buf[64]; - - printk("throttle %s: %d....\n", tty_name(tty, buf), - tty->ldisc.chars_in_buffer(tty)); - printk("cy_throttle %s\n", tty->name); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) { - return; - } - - if (I_IXOFF(tty)) { - info->x_char = STOP_CHAR(tty); - /* Should use the "Send Special Character" feature!!! */ - } - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - base_addr[CyMSVR1] = 0; - local_irq_restore(flags); -} /* cy_throttle */ - -static void cy_unthrottle(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - unsigned long flags; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - -#ifdef SERIAL_DEBUG_THROTTLE - char buf[64]; - - printk("throttle %s: %d....\n", tty_name(tty, buf), - tty->ldisc.chars_in_buffer(tty)); - printk("cy_unthrottle %s\n", tty->name); -#endif - - if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) { - return; - } - - if (I_IXOFF(tty)) { - info->x_char = START_CHAR(tty); - /* Should use the "Send Special Character" feature!!! */ - } - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - base_addr[CyMSVR1] = CyRTS; - local_irq_restore(flags); -} /* cy_unthrottle */ - -static int -get_serial_info(struct cyclades_port *info, - struct serial_struct __user * retinfo) -{ - struct serial_struct tmp; - -/* CP('g'); */ - if (!retinfo) - return -EFAULT; - memset(&tmp, 0, sizeof(tmp)); - tmp.type = info->type; - tmp.line = info->line; - tmp.port = info->line; - tmp.irq = 0; - tmp.flags = info->flags; - tmp.baud_base = 0; /*!!! */ - tmp.close_delay = info->close_delay; - tmp.custom_divisor = 0; /*!!! */ - tmp.hub6 = 0; /*!!! */ - return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0; -} /* get_serial_info */ - -static int -set_serial_info(struct cyclades_port *info, - struct serial_struct __user * new_info) -{ - struct serial_struct new_serial; - struct cyclades_port old_info; - -/* CP('s'); */ - if (!new_info) - return -EFAULT; - if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) - return -EFAULT; - old_info = *info; - - if (!capable(CAP_SYS_ADMIN)) { - if ((new_serial.close_delay != info->close_delay) || - ((new_serial.flags & ASYNC_FLAGS & ~ASYNC_USR_MASK) != - (info->flags & ASYNC_FLAGS & ~ASYNC_USR_MASK))) - return -EPERM; - info->flags = ((info->flags & ~ASYNC_USR_MASK) | - (new_serial.flags & ASYNC_USR_MASK)); - goto check_and_exit; - } - - /* - * OK, past this point, all the error checking has been done. - * At this point, we start making changes..... - */ - - info->flags = ((info->flags & ~ASYNC_FLAGS) | - (new_serial.flags & ASYNC_FLAGS)); - info->close_delay = new_serial.close_delay; - -check_and_exit: - if (info->flags & ASYNC_INITIALIZED) { - config_setup(info); - return 0; - } - return startup(info); -} /* set_serial_info */ - -static int cy_tiocmget(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - int channel; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - unsigned long flags; - unsigned char status; - - channel = info->line; - - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - status = base_addr[CyMSVR1] | base_addr[CyMSVR2]; - local_irq_restore(flags); - - return ((status & CyRTS) ? TIOCM_RTS : 0) - | ((status & CyDTR) ? TIOCM_DTR : 0) - | ((status & CyDCD) ? TIOCM_CAR : 0) - | ((status & CyDSR) ? TIOCM_DSR : 0) - | ((status & CyCTS) ? TIOCM_CTS : 0); -} /* cy_tiocmget */ - -static int -cy_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear) -{ - struct cyclades_port *info = tty->driver_data; - int channel; - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - unsigned long flags; - - channel = info->line; - - if (set & TIOCM_RTS) { - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - base_addr[CyMSVR1] = CyRTS; - local_irq_restore(flags); - } - if (set & TIOCM_DTR) { - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; -/* CP('S');CP('2'); */ - base_addr[CyMSVR2] = CyDTR; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: raising DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - local_irq_restore(flags); - } - - if (clear & TIOCM_RTS) { - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - base_addr[CyMSVR1] = 0; - local_irq_restore(flags); - } - if (clear & TIOCM_DTR) { - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; -/* CP('C');CP('2'); */ - base_addr[CyMSVR2] = 0; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: dropping DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - local_irq_restore(flags); - } - - return 0; -} /* set_modem_info */ - -static void send_break(struct cyclades_port *info, int duration) -{ /* Let the transmit ISR take care of this (since it - requires stuffing characters into the output stream). - */ - info->x_break = duration; - if (!info->xmit_cnt) { - start_xmit(info); - } -} /* send_break */ - -static int -get_mon_info(struct cyclades_port *info, struct cyclades_monitor __user * mon) -{ - - if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor))) - return -EFAULT; - info->mon.int_count = 0; - info->mon.char_count = 0; - info->mon.char_max = 0; - info->mon.char_last = 0; - return 0; -} - -static int set_threshold(struct cyclades_port *info, unsigned long __user * arg) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - unsigned long value; - int channel; - - if (get_user(value, arg)) - return -EFAULT; - - channel = info->line; - info->cor4 &= ~CyREC_FIFO; - info->cor4 |= value & CyREC_FIFO; - base_addr[CyCOR4] = info->cor4; - return 0; -} - -static int -get_threshold(struct cyclades_port *info, unsigned long __user * value) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - unsigned long tmp; - - channel = info->line; - - tmp = base_addr[CyCOR4] & CyREC_FIFO; - return put_user(tmp, value); -} - -static int -set_default_threshold(struct cyclades_port *info, unsigned long __user * arg) -{ - unsigned long value; - - if (get_user(value, arg)) - return -EFAULT; - - info->default_threshold = value & 0x0f; - return 0; -} - -static int -get_default_threshold(struct cyclades_port *info, unsigned long __user * value) -{ - return put_user(info->default_threshold, value); -} - -static int set_timeout(struct cyclades_port *info, unsigned long __user * arg) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - unsigned long value; - - if (get_user(value, arg)) - return -EFAULT; - - channel = info->line; - - base_addr[CyRTPRL] = value & 0xff; - base_addr[CyRTPRH] = (value >> 8) & 0xff; - return 0; -} - -static int get_timeout(struct cyclades_port *info, unsigned long __user * value) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - unsigned long tmp; - - channel = info->line; - - tmp = base_addr[CyRTPRL]; - return put_user(tmp, value); -} - -static int set_default_timeout(struct cyclades_port *info, unsigned long value) -{ - info->default_timeout = value & 0xff; - return 0; -} - -static int -get_default_timeout(struct cyclades_port *info, unsigned long __user * value) -{ - return put_user(info->default_timeout, value); -} - -static int -cy_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - struct cyclades_port *info = tty->driver_data; - int ret_val = 0; - void __user *argp = (void __user *)arg; - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_ioctl %s, cmd = %x arg = %lx\n", tty->name, cmd, arg); /* */ -#endif - - tty_lock(); - - switch (cmd) { - case CYGETMON: - ret_val = get_mon_info(info, argp); - break; - case CYGETTHRESH: - ret_val = get_threshold(info, argp); - break; - case CYSETTHRESH: - ret_val = set_threshold(info, argp); - break; - case CYGETDEFTHRESH: - ret_val = get_default_threshold(info, argp); - break; - case CYSETDEFTHRESH: - ret_val = set_default_threshold(info, argp); - break; - case CYGETTIMEOUT: - ret_val = get_timeout(info, argp); - break; - case CYSETTIMEOUT: - ret_val = set_timeout(info, argp); - break; - case CYGETDEFTIMEOUT: - ret_val = get_default_timeout(info, argp); - break; - case CYSETDEFTIMEOUT: - ret_val = set_default_timeout(info, (unsigned long)arg); - break; - case TCSBRK: /* SVID version: non-zero arg --> no break */ - ret_val = tty_check_change(tty); - if (ret_val) - break; - tty_wait_until_sent(tty, 0); - if (!arg) - send_break(info, HZ / 4); /* 1/4 second */ - break; - case TCSBRKP: /* support for POSIX tcsendbreak() */ - ret_val = tty_check_change(tty); - if (ret_val) - break; - tty_wait_until_sent(tty, 0); - send_break(info, arg ? arg * (HZ / 10) : HZ / 4); - break; - -/* The following commands are incompletely implemented!!! */ - case TIOCGSERIAL: - ret_val = get_serial_info(info, argp); - break; - case TIOCSSERIAL: - ret_val = set_serial_info(info, argp); - break; - default: - ret_val = -ENOIOCTLCMD; - } - tty_unlock(); - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_ioctl done\n"); -#endif - - return ret_val; -} /* cy_ioctl */ - -static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_set_termios %s\n", tty->name); -#endif - - if (tty->termios->c_cflag == old_termios->c_cflag) - return; - config_setup(info); - - if ((old_termios->c_cflag & CRTSCTS) && - !(tty->termios->c_cflag & CRTSCTS)) { - tty->stopped = 0; - cy_start(tty); - } -#ifdef tytso_patch_94Nov25_1726 - if (!(old_termios->c_cflag & CLOCAL) && - (tty->termios->c_cflag & CLOCAL)) - wake_up_interruptible(&info->open_wait); -#endif -} /* cy_set_termios */ - -static void cy_close(struct tty_struct *tty, struct file *filp) -{ - struct cyclades_port *info = tty->driver_data; - -/* CP('C'); */ -#ifdef SERIAL_DEBUG_OTHER - printk("cy_close %s\n", tty->name); -#endif - - if (!info || serial_paranoia_check(info, tty->name, "cy_close")) { - return; - } -#ifdef SERIAL_DEBUG_OPEN - printk("cy_close %s, count = %d\n", tty->name, info->count); -#endif - - if ((tty->count == 1) && (info->count != 1)) { - /* - * Uh, oh. tty->count is 1, which means that the tty - * structure will be freed. Info->count should always - * be one in these conditions. If it's greater than - * one, we've got real problems, since it means the - * serial port won't be shutdown. - */ - printk("cy_close: bad serial port count; tty->count is 1, " - "info->count is %d\n", info->count); - info->count = 1; - } -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: decrementing count to %d\n", __LINE__, - info->count - 1); -#endif - if (--info->count < 0) { - printk("cy_close: bad serial port count for ttys%d: %d\n", - info->line, info->count); -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: setting count to 0\n", __LINE__); -#endif - info->count = 0; - } - if (info->count) - return; - info->flags |= ASYNC_CLOSING; - if (info->flags & ASYNC_INITIALIZED) - tty_wait_until_sent(tty, 3000); /* 30 seconds timeout */ - shutdown(info); - cy_flush_buffer(tty); - tty_ldisc_flush(tty); - info->tty = NULL; - if (info->blocked_open) { - if (info->close_delay) { - msleep_interruptible(jiffies_to_msecs - (info->close_delay)); - } - wake_up_interruptible(&info->open_wait); - } - info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); - wake_up_interruptible(&info->close_wait); - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_close done\n"); -#endif -} /* cy_close */ - -/* - * cy_hangup() --- called by tty_hangup() when a hangup is signaled. - */ -void cy_hangup(struct tty_struct *tty) -{ - struct cyclades_port *info = tty->driver_data; - -#ifdef SERIAL_DEBUG_OTHER - printk("cy_hangup %s\n", tty->name); /* */ -#endif - - if (serial_paranoia_check(info, tty->name, "cy_hangup")) - return; - - shutdown(info); -#if 0 - info->event = 0; - info->count = 0; -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: setting count to 0\n", __LINE__); -#endif - info->tty = 0; -#endif - info->flags &= ~ASYNC_NORMAL_ACTIVE; - wake_up_interruptible(&info->open_wait); -} /* cy_hangup */ - -/* - * ------------------------------------------------------------ - * cy_open() and friends - * ------------------------------------------------------------ - */ - -static int -block_til_ready(struct tty_struct *tty, struct file *filp, - struct cyclades_port *info) -{ - DECLARE_WAITQUEUE(wait, current); - unsigned long flags; - int channel; - int retval; - volatile u_char *base_addr = (u_char *) BASE_ADDR; - - /* - * If the device is in the middle of being closed, then block - * until it's done, and then try again. - */ - if (info->flags & ASYNC_CLOSING) { - interruptible_sleep_on(&info->close_wait); - if (info->flags & ASYNC_HUP_NOTIFY) { - return -EAGAIN; - } else { - return -ERESTARTSYS; - } - } - - /* - * If non-blocking mode is set, then make the check up front - * and then exit. - */ - if (filp->f_flags & O_NONBLOCK) { - info->flags |= ASYNC_NORMAL_ACTIVE; - return 0; - } - - /* - * Block waiting for the carrier detect and the line to become - * free (i.e., not in use by the callout). While we are in - * this loop, info->count is dropped by one, so that - * cy_close() knows when to free things. We restore it upon - * exit, either normal or abnormal. - */ - retval = 0; - add_wait_queue(&info->open_wait, &wait); -#ifdef SERIAL_DEBUG_OPEN - printk("block_til_ready before block: %s, count = %d\n", - tty->name, info->count); - /**/ -#endif - info->count--; -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: decrementing count to %d\n", __LINE__, info->count); -#endif - info->blocked_open++; - - channel = info->line; - - while (1) { - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; - base_addr[CyMSVR1] = CyRTS; -/* CP('S');CP('4'); */ - base_addr[CyMSVR2] = CyDTR; -#ifdef SERIAL_DEBUG_DTR - printk("cyc: %d: raising DTR\n", __LINE__); - printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], - base_addr[CyMSVR2]); -#endif - local_irq_restore(flags); - set_current_state(TASK_INTERRUPTIBLE); - if (tty_hung_up_p(filp) - || !(info->flags & ASYNC_INITIALIZED)) { - if (info->flags & ASYNC_HUP_NOTIFY) { - retval = -EAGAIN; - } else { - retval = -ERESTARTSYS; - } - break; - } - local_irq_save(flags); - base_addr[CyCAR] = (u_char) channel; -/* CP('L');CP1(1 && C_CLOCAL(tty)); CP1(1 && (base_addr[CyMSVR1] & CyDCD) ); */ - if (!(info->flags & ASYNC_CLOSING) - && (C_CLOCAL(tty) - || (base_addr[CyMSVR1] & CyDCD))) { - local_irq_restore(flags); - break; - } - local_irq_restore(flags); - if (signal_pending(current)) { - retval = -ERESTARTSYS; - break; - } -#ifdef SERIAL_DEBUG_OPEN - printk("block_til_ready blocking: %s, count = %d\n", - tty->name, info->count); - /**/ -#endif - tty_unlock(); - schedule(); - tty_lock(); - } - __set_current_state(TASK_RUNNING); - remove_wait_queue(&info->open_wait, &wait); - if (!tty_hung_up_p(filp)) { - info->count++; -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: incrementing count to %d\n", __LINE__, - info->count); -#endif - } - info->blocked_open--; -#ifdef SERIAL_DEBUG_OPEN - printk("block_til_ready after blocking: %s, count = %d\n", - tty->name, info->count); - /**/ -#endif - if (retval) - return retval; - info->flags |= ASYNC_NORMAL_ACTIVE; - return 0; -} /* block_til_ready */ - -/* - * This routine is called whenever a serial port is opened. It - * performs the serial-specific initialization for the tty structure. - */ -int cy_open(struct tty_struct *tty, struct file *filp) -{ - struct cyclades_port *info; - int retval, line; - -/* CP('O'); */ - line = tty->index; - if ((line < 0) || (NR_PORTS <= line)) { - return -ENODEV; - } - info = &cy_port[line]; - if (info->line < 0) { - return -ENODEV; - } -#ifdef SERIAL_DEBUG_OTHER - printk("cy_open %s\n", tty->name); /* */ -#endif - if (serial_paranoia_check(info, tty->name, "cy_open")) { - return -ENODEV; - } -#ifdef SERIAL_DEBUG_OPEN - printk("cy_open %s, count = %d\n", tty->name, info->count); - /**/ -#endif - info->count++; -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: incrementing count to %d\n", __LINE__, info->count); -#endif - tty->driver_data = info; - info->tty = tty; - - /* - * Start up serial port - */ - retval = startup(info); - if (retval) { - return retval; - } - - retval = block_til_ready(tty, filp, info); - if (retval) { -#ifdef SERIAL_DEBUG_OPEN - printk("cy_open returning after block_til_ready with %d\n", - retval); -#endif - return retval; - } -#ifdef SERIAL_DEBUG_OPEN - printk("cy_open done\n"); - /**/ -#endif - return 0; -} /* cy_open */ - -/* - * --------------------------------------------------------------------- - * serial167_init() and friends - * - * serial167_init() is called at boot-time to initialize the serial driver. - * --------------------------------------------------------------------- - */ - -/* - * This routine prints out the appropriate serial driver version - * number, and identifies which options were configured into this - * driver. - */ -static void show_version(void) -{ - printk("MVME166/167 cd2401 driver\n"); -} /* show_version */ - -/* initialize chips on card -- return number of valid - chips (which is number of ports/4) */ - -/* - * This initialises the hardware to a reasonable state. It should - * probe the chip first so as to copy 166-Bug setup as a default for - * port 0. It initialises CMR to CyASYNC; that is never done again, so - * as to limit the number of CyINIT_CHAN commands in normal running. - * - * ... I wonder what I should do if this fails ... - */ - -void mvme167_serial_console_setup(int cflag) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int ch; - u_char spd; - u_char rcor, rbpr, badspeed = 0; - unsigned long flags; - - local_irq_save(flags); - - /* - * First probe channel zero of the chip, to see what speed has - * been selected. - */ - - base_addr[CyCAR] = 0; - - rcor = base_addr[CyRCOR] << 5; - rbpr = base_addr[CyRBPR]; - - for (spd = 0; spd < sizeof(baud_bpr); spd++) - if (rbpr == baud_bpr[spd] && rcor == baud_co[spd]) - break; - if (spd >= sizeof(baud_bpr)) { - spd = 14; /* 19200 */ - badspeed = 1; /* Failed to identify speed */ - } - initial_console_speed = spd; - - /* OK, we have chosen a speed, now reset and reinitialise */ - - my_udelay(20000L); /* Allow time for any active o/p to complete */ - if (base_addr[CyCCR] != 0x00) { - local_irq_restore(flags); - /* printk(" chip is never idle (CCR != 0)\n"); */ - return; - } - - base_addr[CyCCR] = CyCHIP_RESET; /* Reset the chip */ - my_udelay(1000L); - - if (base_addr[CyGFRCR] == 0x00) { - local_irq_restore(flags); - /* printk(" chip is not responding (GFRCR stayed 0)\n"); */ - return; - } - - /* - * System clock is 20Mhz, divided by 2048, so divide by 10 for a 1.0ms - * tick - */ - - base_addr[CyTPR] = 10; - - base_addr[CyPILR1] = 0x01; /* Interrupt level for modem change */ - base_addr[CyPILR2] = 0x02; /* Interrupt level for tx ints */ - base_addr[CyPILR3] = 0x03; /* Interrupt level for rx ints */ - - /* - * Attempt to set up all channels to something reasonable, and - * bang out a INIT_CHAN command. We should then be able to limit - * the amount of fiddling we have to do in normal running. - */ - - for (ch = 3; ch >= 0; ch--) { - base_addr[CyCAR] = (u_char) ch; - base_addr[CyIER] = 0; - base_addr[CyCMR] = CyASYNC; - base_addr[CyLICR] = (u_char) ch << 2; - base_addr[CyLIVR] = 0x5c; - base_addr[CyTCOR] = baud_co[spd]; - base_addr[CyTBPR] = baud_bpr[spd]; - base_addr[CyRCOR] = baud_co[spd] >> 5; - base_addr[CyRBPR] = baud_bpr[spd]; - base_addr[CySCHR1] = 'Q' & 0x1f; - base_addr[CySCHR2] = 'X' & 0x1f; - base_addr[CySCRL] = 0; - base_addr[CySCRH] = 0; - base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE; - base_addr[CyCOR2] = 0; - base_addr[CyCOR3] = Cy_1_STOP; - base_addr[CyCOR4] = baud_cor4[spd]; - base_addr[CyCOR5] = 0; - base_addr[CyCOR6] = 0; - base_addr[CyCOR7] = 0; - base_addr[CyRTPRL] = 2; - base_addr[CyRTPRH] = 0; - base_addr[CyMSVR1] = 0; - base_addr[CyMSVR2] = 0; - write_cy_cmd(base_addr, CyINIT_CHAN | CyDIS_RCVR | CyDIS_XMTR); - } - - /* - * Now do specials for channel zero.... - */ - - base_addr[CyMSVR1] = CyRTS; - base_addr[CyMSVR2] = CyDTR; - base_addr[CyIER] = CyRxData; - write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR); - - local_irq_restore(flags); - - my_udelay(20000L); /* Let it all settle down */ - - printk("CD2401 initialised, chip is rev 0x%02x\n", base_addr[CyGFRCR]); - if (badspeed) - printk - (" WARNING: Failed to identify line speed, rcor=%02x,rbpr=%02x\n", - rcor >> 5, rbpr); -} /* serial_console_init */ - -static const struct tty_operations cy_ops = { - .open = cy_open, - .close = cy_close, - .write = cy_write, - .put_char = cy_put_char, - .flush_chars = cy_flush_chars, - .write_room = cy_write_room, - .chars_in_buffer = cy_chars_in_buffer, - .flush_buffer = cy_flush_buffer, - .ioctl = cy_ioctl, - .throttle = cy_throttle, - .unthrottle = cy_unthrottle, - .set_termios = cy_set_termios, - .stop = cy_stop, - .start = cy_start, - .hangup = cy_hangup, - .tiocmget = cy_tiocmget, - .tiocmset = cy_tiocmset, -}; - -/* The serial driver boot-time initialization code! - Hardware I/O ports are mapped to character special devices on a - first found, first allocated manner. That is, this code searches - for Cyclom cards in the system. As each is found, it is probed - to discover how many chips (and thus how many ports) are present. - These ports are mapped to the tty ports 64 and upward in monotonic - fashion. If an 8-port card is replaced with a 16-port card, the - port mapping on a following card will shift. - - This approach is different from what is used in the other serial - device driver because the Cyclom is more properly a multiplexer, - not just an aggregation of serial ports on one card. - - If there are more cards with more ports than have been statically - allocated above, a warning is printed and the extra ports are ignored. - */ -static int __init serial167_init(void) -{ - struct cyclades_port *info; - int ret = 0; - int good_ports = 0; - int port_num = 0; - int index; - int DefSpeed; -#ifdef notyet - struct sigaction sa; -#endif - - if (!(mvme16x_config & MVME16x_CONFIG_GOT_CD2401)) - return 0; - - cy_serial_driver = alloc_tty_driver(NR_PORTS); - if (!cy_serial_driver) - return -ENOMEM; - -#if 0 - scrn[1] = '\0'; -#endif - - show_version(); - - /* Has "console=0,9600n8" been used in bootinfo to change speed? */ - if (serial_console_cflag) - DefSpeed = serial_console_cflag & 0017; - else { - DefSpeed = initial_console_speed; - serial_console_info = &cy_port[0]; - serial_console_cflag = DefSpeed | CS8; -#if 0 - serial_console = 64; /*callout_driver.minor_start */ -#endif - } - - /* Initialize the tty_driver structure */ - - cy_serial_driver->owner = THIS_MODULE; - cy_serial_driver->name = "ttyS"; - cy_serial_driver->major = TTY_MAJOR; - cy_serial_driver->minor_start = 64; - cy_serial_driver->type = TTY_DRIVER_TYPE_SERIAL; - cy_serial_driver->subtype = SERIAL_TYPE_NORMAL; - cy_serial_driver->init_termios = tty_std_termios; - cy_serial_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - cy_serial_driver->flags = TTY_DRIVER_REAL_RAW; - tty_set_operations(cy_serial_driver, &cy_ops); - - ret = tty_register_driver(cy_serial_driver); - if (ret) { - printk(KERN_ERR "Couldn't register MVME166/7 serial driver\n"); - put_tty_driver(cy_serial_driver); - return ret; - } - - port_num = 0; - info = cy_port; - for (index = 0; index < 1; index++) { - - good_ports = 4; - - if (port_num < NR_PORTS) { - while (good_ports-- && port_num < NR_PORTS) { - /*** initialize port ***/ - info->magic = CYCLADES_MAGIC; - info->type = PORT_CIRRUS; - info->card = index; - info->line = port_num; - info->flags = STD_COM_FLAGS; - info->tty = NULL; - info->xmit_fifo_size = 12; - info->cor1 = CyPARITY_NONE | Cy_8_BITS; - info->cor2 = CyETC; - info->cor3 = Cy_1_STOP; - info->cor4 = 0x08; /* _very_ small receive threshold */ - info->cor5 = 0; - info->cor6 = 0; - info->cor7 = 0; - info->tbpr = baud_bpr[DefSpeed]; /* Tx BPR */ - info->tco = baud_co[DefSpeed]; /* Tx CO */ - info->rbpr = baud_bpr[DefSpeed]; /* Rx BPR */ - info->rco = baud_co[DefSpeed] >> 5; /* Rx CO */ - info->close_delay = 0; - info->x_char = 0; - info->count = 0; -#ifdef SERIAL_DEBUG_COUNT - printk("cyc: %d: setting count to 0\n", - __LINE__); -#endif - info->blocked_open = 0; - info->default_threshold = 0; - info->default_timeout = 0; - init_waitqueue_head(&info->open_wait); - init_waitqueue_head(&info->close_wait); - /* info->session */ - /* info->pgrp */ -/*** !!!!!!!! this may expose new bugs !!!!!!!!! *********/ - info->read_status_mask = - CyTIMEOUT | CySPECHAR | CyBREAK | CyPARITY | - CyFRAME | CyOVERRUN; - /* info->timeout */ - - printk("ttyS%d ", info->line); - port_num++; - info++; - if (!(port_num & 7)) { - printk("\n "); - } - } - } - printk("\n"); - } - while (port_num < NR_PORTS) { - info->line = -1; - port_num++; - info++; - } - - ret = request_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt, 0, - "cd2401_errors", cd2401_rxerr_interrupt); - if (ret) { - printk(KERN_ERR "Could't get cd2401_errors IRQ"); - goto cleanup_serial_driver; - } - - ret = request_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt, 0, - "cd2401_modem", cd2401_modem_interrupt); - if (ret) { - printk(KERN_ERR "Could't get cd2401_modem IRQ"); - goto cleanup_irq_cd2401_errors; - } - - ret = request_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt, 0, - "cd2401_txints", cd2401_tx_interrupt); - if (ret) { - printk(KERN_ERR "Could't get cd2401_txints IRQ"); - goto cleanup_irq_cd2401_modem; - } - - ret = request_irq(MVME167_IRQ_SER_RX, cd2401_rx_interrupt, 0, - "cd2401_rxints", cd2401_rx_interrupt); - if (ret) { - printk(KERN_ERR "Could't get cd2401_rxints IRQ"); - goto cleanup_irq_cd2401_txints; - } - - /* Now we have registered the interrupt handlers, allow the interrupts */ - - pcc2chip[PccSCCMICR] = 0x15; /* Serial ints are level 5 */ - pcc2chip[PccSCCTICR] = 0x15; - pcc2chip[PccSCCRICR] = 0x15; - - pcc2chip[PccIMLR] = 3; /* Allow PCC2 ints above 3!? */ - - return 0; -cleanup_irq_cd2401_txints: - free_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt); -cleanup_irq_cd2401_modem: - free_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt); -cleanup_irq_cd2401_errors: - free_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt); -cleanup_serial_driver: - if (tty_unregister_driver(cy_serial_driver)) - printk(KERN_ERR - "Couldn't unregister MVME166/7 serial driver\n"); - put_tty_driver(cy_serial_driver); - return ret; -} /* serial167_init */ - -module_init(serial167_init); - -#ifdef CYCLOM_SHOW_STATUS -static void show_status(int line_num) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - int channel; - struct cyclades_port *info; - unsigned long flags; - - info = &cy_port[line_num]; - channel = info->line; - printk(" channel %d\n", channel); - /**/ printk(" cy_port\n"); - printk(" card line flags = %d %d %x\n", - info->card, info->line, info->flags); - printk - (" *tty read_status_mask timeout xmit_fifo_size = %lx %x %x %x\n", - (long)info->tty, info->read_status_mask, info->timeout, - info->xmit_fifo_size); - printk(" cor1,cor2,cor3,cor4,cor5,cor6,cor7 = %x %x %x %x %x %x %x\n", - info->cor1, info->cor2, info->cor3, info->cor4, info->cor5, - info->cor6, info->cor7); - printk(" tbpr,tco,rbpr,rco = %d %d %d %d\n", info->tbpr, info->tco, - info->rbpr, info->rco); - printk(" close_delay event count = %d %d %d\n", info->close_delay, - info->event, info->count); - printk(" x_char blocked_open = %x %x\n", info->x_char, - info->blocked_open); - printk(" open_wait = %lx %lx %lx\n", (long)info->open_wait); - - local_irq_save(flags); - -/* Global Registers */ - - printk(" CyGFRCR %x\n", base_addr[CyGFRCR]); - printk(" CyCAR %x\n", base_addr[CyCAR]); - printk(" CyRISR %x\n", base_addr[CyRISR]); - printk(" CyTISR %x\n", base_addr[CyTISR]); - printk(" CyMISR %x\n", base_addr[CyMISR]); - printk(" CyRIR %x\n", base_addr[CyRIR]); - printk(" CyTIR %x\n", base_addr[CyTIR]); - printk(" CyMIR %x\n", base_addr[CyMIR]); - printk(" CyTPR %x\n", base_addr[CyTPR]); - - base_addr[CyCAR] = (u_char) channel; - -/* Virtual Registers */ - -#if 0 - printk(" CyRIVR %x\n", base_addr[CyRIVR]); - printk(" CyTIVR %x\n", base_addr[CyTIVR]); - printk(" CyMIVR %x\n", base_addr[CyMIVR]); - printk(" CyMISR %x\n", base_addr[CyMISR]); -#endif - -/* Channel Registers */ - - printk(" CyCCR %x\n", base_addr[CyCCR]); - printk(" CyIER %x\n", base_addr[CyIER]); - printk(" CyCOR1 %x\n", base_addr[CyCOR1]); - printk(" CyCOR2 %x\n", base_addr[CyCOR2]); - printk(" CyCOR3 %x\n", base_addr[CyCOR3]); - printk(" CyCOR4 %x\n", base_addr[CyCOR4]); - printk(" CyCOR5 %x\n", base_addr[CyCOR5]); -#if 0 - printk(" CyCCSR %x\n", base_addr[CyCCSR]); - printk(" CyRDCR %x\n", base_addr[CyRDCR]); -#endif - printk(" CySCHR1 %x\n", base_addr[CySCHR1]); - printk(" CySCHR2 %x\n", base_addr[CySCHR2]); -#if 0 - printk(" CySCHR3 %x\n", base_addr[CySCHR3]); - printk(" CySCHR4 %x\n", base_addr[CySCHR4]); - printk(" CySCRL %x\n", base_addr[CySCRL]); - printk(" CySCRH %x\n", base_addr[CySCRH]); - printk(" CyLNC %x\n", base_addr[CyLNC]); - printk(" CyMCOR1 %x\n", base_addr[CyMCOR1]); - printk(" CyMCOR2 %x\n", base_addr[CyMCOR2]); -#endif - printk(" CyRTPRL %x\n", base_addr[CyRTPRL]); - printk(" CyRTPRH %x\n", base_addr[CyRTPRH]); - printk(" CyMSVR1 %x\n", base_addr[CyMSVR1]); - printk(" CyMSVR2 %x\n", base_addr[CyMSVR2]); - printk(" CyRBPR %x\n", base_addr[CyRBPR]); - printk(" CyRCOR %x\n", base_addr[CyRCOR]); - printk(" CyTBPR %x\n", base_addr[CyTBPR]); - printk(" CyTCOR %x\n", base_addr[CyTCOR]); - - local_irq_restore(flags); -} /* show_status */ -#endif - -#if 0 -/* Dummy routine in mvme16x/config.c for now */ - -/* Serial console setup. Called from linux/init/main.c */ - -void console_setup(char *str, int *ints) -{ - char *s; - int baud, bits, parity; - int cflag = 0; - - /* Sanity check. */ - if (ints[0] > 3 || ints[1] > 3) - return; - - /* Get baud, bits and parity */ - baud = 2400; - bits = 8; - parity = 'n'; - if (ints[2]) - baud = ints[2]; - if ((s = strchr(str, ','))) { - do { - s++; - } while (*s >= '0' && *s <= '9'); - if (*s) - parity = *s++; - if (*s) - bits = *s - '0'; - } - - /* Now construct a cflag setting. */ - switch (baud) { - case 1200: - cflag |= B1200; - break; - case 9600: - cflag |= B9600; - break; - case 19200: - cflag |= B19200; - break; - case 38400: - cflag |= B38400; - break; - case 2400: - default: - cflag |= B2400; - break; - } - switch (bits) { - case 7: - cflag |= CS7; - break; - default: - case 8: - cflag |= CS8; - break; - } - switch (parity) { - case 'o': - case 'O': - cflag |= PARODD; - break; - case 'e': - case 'E': - cflag |= PARENB; - break; - } - - serial_console_info = &cy_port[ints[1]]; - serial_console_cflag = cflag; - serial_console = ints[1] + 64; /*callout_driver.minor_start */ -} -#endif - -/* - * The following is probably out of date for 2.1.x serial console stuff. - * - * The console is registered early on from arch/m68k/kernel/setup.c, and - * it therefore relies on the chip being setup correctly by 166-Bug. This - * seems reasonable, as the serial port has been used to invoke the system - * boot. It also means that this function must not rely on any data - * initialisation performed by serial167_init() etc. - * - * Of course, once the console has been registered, we had better ensure - * that serial167_init() doesn't leave the chip non-functional. - * - * The console must be locked when we get here. - */ - -void serial167_console_write(struct console *co, const char *str, - unsigned count) -{ - volatile unsigned char *base_addr = (u_char *) BASE_ADDR; - unsigned long flags; - volatile u_char sink; - u_char ier; - int port; - u_char do_lf = 0; - int i = 0; - - local_irq_save(flags); - - /* Ensure transmitter is enabled! */ - - port = 0; - base_addr[CyCAR] = (u_char) port; - while (base_addr[CyCCR]) - ; - base_addr[CyCCR] = CyENB_XMTR; - - ier = base_addr[CyIER]; - base_addr[CyIER] = CyTxMpty; - - while (1) { - if (pcc2chip[PccSCCTICR] & 0x20) { - /* We have a Tx int. Acknowledge it */ - sink = pcc2chip[PccTPIACKR]; - if ((base_addr[CyLICR] >> 2) == port) { - if (i == count) { - /* Last char of string is now output */ - base_addr[CyTEOIR] = CyNOTRANS; - break; - } - if (do_lf) { - base_addr[CyTDR] = '\n'; - str++; - i++; - do_lf = 0; - } else if (*str == '\n') { - base_addr[CyTDR] = '\r'; - do_lf = 1; - } else { - base_addr[CyTDR] = *str++; - i++; - } - base_addr[CyTEOIR] = 0; - } else - base_addr[CyTEOIR] = CyNOTRANS; - } - } - - base_addr[CyIER] = ier; - - local_irq_restore(flags); -} - -static struct tty_driver *serial167_console_device(struct console *c, - int *index) -{ - *index = c->index; - return cy_serial_driver; -} - -static struct console sercons = { - .name = "ttyS", - .write = serial167_console_write, - .device = serial167_console_device, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -static int __init serial167_console_init(void) -{ - if (vme_brdtype == VME_TYPE_MVME166 || - vme_brdtype == VME_TYPE_MVME167 || - vme_brdtype == VME_TYPE_MVME177) { - mvme167_serial_console_setup(0); - register_console(&sercons); - } - return 0; -} - -console_initcall(serial167_console_init); - -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/tty/specialix.c b/drivers/staging/tty/specialix.c deleted file mode 100644 index 5c3598e..0000000 --- a/drivers/staging/tty/specialix.c +++ /dev/null @@ -1,2368 +0,0 @@ -/* - * specialix.c -- specialix IO8+ multiport serial driver. - * - * Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl) - * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) - * - * Specialix pays for the development and support of this driver. - * Please DO contact io8-linux@specialix.co.uk if you require - * support. But please read the documentation (specialix.txt) - * first. - * - * This driver was developed in the BitWizard linux device - * driver service. If you require a linux device driver for your - * product, please contact devices@BitWizard.nl for a quote. - * - * This code is firmly based on the riscom/8 serial driver, - * written by Dmitry Gorodchanin. The specialix IO8+ card - * programming information was obtained from the CL-CD1865 Data - * Book, and Specialix document number 6200059: IO8+ Hardware - * Functional Specification. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be - * useful, but WITHOUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, - * USA. - * - * Revision history: - * - * Revision 1.0: April 1st 1997. - * Initial release for alpha testing. - * Revision 1.1: April 14th 1997. - * Incorporated Richard Hudsons suggestions, - * removed some debugging printk's. - * Revision 1.2: April 15th 1997. - * Ported to 2.1.x kernels. - * Revision 1.3: April 17th 1997 - * Backported to 2.0. (Compatibility macros). - * Revision 1.4: April 18th 1997 - * Fixed DTR/RTS bug that caused the card to indicate - * "don't send data" to a modem after the password prompt. - * Fixed bug for premature (fake) interrupts. - * Revision 1.5: April 19th 1997 - * fixed a minor typo in the header file, cleanup a little. - * performance warnings are now MAXed at once per minute. - * Revision 1.6: May 23 1997 - * Changed the specialix=... format to include interrupt. - * Revision 1.7: May 27 1997 - * Made many more debug printk's a compile time option. - * Revision 1.8: Jul 1 1997 - * port to linux-2.1.43 kernel. - * Revision 1.9: Oct 9 1998 - * Added stuff for the IO8+/PCI version. - * Revision 1.10: Oct 22 1999 / Jan 21 2000. - * Added stuff for setserial. - * Nicolas Mailhot (Nicolas.Mailhot@email.enst.fr) - * - */ - -#define VERSION "1.11" - - -/* - * There is a bunch of documentation about the card, jumpers, config - * settings, restrictions, cables, device names and numbers in - * Documentation/serial/specialix.txt - */ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "specialix_io8.h" -#include "cd1865.h" - - -/* - This driver can spew a whole lot of debugging output at you. If you - need maximum performance, you should disable the DEBUG define. To - aid in debugging in the field, I'm leaving the compile-time debug - features enabled, and disable them "runtime". That allows me to - instruct people with problems to enable debugging without requiring - them to recompile... -*/ -#define DEBUG - -static int sx_debug; -static int sx_rxfifo = SPECIALIX_RXFIFO; -static int sx_rtscts; - -#ifdef DEBUG -#define dprintk(f, str...) if (sx_debug & f) printk(str) -#else -#define dprintk(f, str...) /* nothing */ -#endif - -#define SX_DEBUG_FLOW 0x0001 -#define SX_DEBUG_DATA 0x0002 -#define SX_DEBUG_PROBE 0x0004 -#define SX_DEBUG_CHAN 0x0008 -#define SX_DEBUG_INIT 0x0010 -#define SX_DEBUG_RX 0x0020 -#define SX_DEBUG_TX 0x0040 -#define SX_DEBUG_IRQ 0x0080 -#define SX_DEBUG_OPEN 0x0100 -#define SX_DEBUG_TERMIOS 0x0200 -#define SX_DEBUG_SIGNALS 0x0400 -#define SX_DEBUG_FIFO 0x0800 - - -#define func_enter() dprintk(SX_DEBUG_FLOW, "io8: enter %s\n", __func__) -#define func_exit() dprintk(SX_DEBUG_FLOW, "io8: exit %s\n", __func__) - - -/* Configurable options: */ - -/* Am I paranoid or not ? ;-) */ -#define SPECIALIX_PARANOIA_CHECK - -/* - * The following defines are mostly for testing purposes. But if you need - * some nice reporting in your syslog, you can define them also. - */ -#undef SX_REPORT_FIFO -#undef SX_REPORT_OVERRUN - - - - -#define SPECIALIX_LEGAL_FLAGS \ - (ASYNC_HUP_NOTIFY | ASYNC_SAK | ASYNC_SPLIT_TERMIOS | \ - ASYNC_SPD_HI | ASYNC_SPEED_VHI | ASYNC_SESSION_LOCKOUT | \ - ASYNC_PGRP_LOCKOUT | ASYNC_CALLOUT_NOHUP) - -static struct tty_driver *specialix_driver; - -static struct specialix_board sx_board[SX_NBOARD] = { - { 0, SX_IOBASE1, 9, }, - { 0, SX_IOBASE2, 11, }, - { 0, SX_IOBASE3, 12, }, - { 0, SX_IOBASE4, 15, }, -}; - -static struct specialix_port sx_port[SX_NBOARD * SX_NPORT]; - - -static int sx_paranoia_check(struct specialix_port const *port, - char *name, const char *routine) -{ -#ifdef SPECIALIX_PARANOIA_CHECK - static const char *badmagic = KERN_ERR - "sx: Warning: bad specialix port magic number for device %s in %s\n"; - static const char *badinfo = KERN_ERR - "sx: Warning: null specialix port for device %s in %s\n"; - - if (!port) { - printk(badinfo, name, routine); - return 1; - } - if (port->magic != SPECIALIX_MAGIC) { - printk(badmagic, name, routine); - return 1; - } -#endif - return 0; -} - - -/* - * - * Service functions for specialix IO8+ driver. - * - */ - -/* Get board number from pointer */ -static inline int board_No(struct specialix_board *bp) -{ - return bp - sx_board; -} - - -/* Get port number from pointer */ -static inline int port_No(struct specialix_port const *port) -{ - return SX_PORT(port - sx_port); -} - - -/* Get pointer to board from pointer to port */ -static inline struct specialix_board *port_Board( - struct specialix_port const *port) -{ - return &sx_board[SX_BOARD(port - sx_port)]; -} - - -/* Input Byte from CL CD186x register */ -static inline unsigned char sx_in(struct specialix_board *bp, - unsigned short reg) -{ - bp->reg = reg | 0x80; - outb(reg | 0x80, bp->base + SX_ADDR_REG); - return inb(bp->base + SX_DATA_REG); -} - - -/* Output Byte to CL CD186x register */ -static inline void sx_out(struct specialix_board *bp, unsigned short reg, - unsigned char val) -{ - bp->reg = reg | 0x80; - outb(reg | 0x80, bp->base + SX_ADDR_REG); - outb(val, bp->base + SX_DATA_REG); -} - - -/* Input Byte from CL CD186x register */ -static inline unsigned char sx_in_off(struct specialix_board *bp, - unsigned short reg) -{ - bp->reg = reg; - outb(reg, bp->base + SX_ADDR_REG); - return inb(bp->base + SX_DATA_REG); -} - - -/* Output Byte to CL CD186x register */ -static inline void sx_out_off(struct specialix_board *bp, - unsigned short reg, unsigned char val) -{ - bp->reg = reg; - outb(reg, bp->base + SX_ADDR_REG); - outb(val, bp->base + SX_DATA_REG); -} - - -/* Wait for Channel Command Register ready */ -static void sx_wait_CCR(struct specialix_board *bp) -{ - unsigned long delay, flags; - unsigned char ccr; - - for (delay = SX_CCR_TIMEOUT; delay; delay--) { - spin_lock_irqsave(&bp->lock, flags); - ccr = sx_in(bp, CD186x_CCR); - spin_unlock_irqrestore(&bp->lock, flags); - if (!ccr) - return; - udelay(1); - } - - printk(KERN_ERR "sx%d: Timeout waiting for CCR.\n", board_No(bp)); -} - - -/* Wait for Channel Command Register ready */ -static void sx_wait_CCR_off(struct specialix_board *bp) -{ - unsigned long delay; - unsigned char crr; - unsigned long flags; - - for (delay = SX_CCR_TIMEOUT; delay; delay--) { - spin_lock_irqsave(&bp->lock, flags); - crr = sx_in_off(bp, CD186x_CCR); - spin_unlock_irqrestore(&bp->lock, flags); - if (!crr) - return; - udelay(1); - } - - printk(KERN_ERR "sx%d: Timeout waiting for CCR.\n", board_No(bp)); -} - - -/* - * specialix IO8+ IO range functions. - */ - -static int sx_request_io_range(struct specialix_board *bp) -{ - return request_region(bp->base, - bp->flags & SX_BOARD_IS_PCI ? SX_PCI_IO_SPACE : SX_IO_SPACE, - "specialix IO8+") == NULL; -} - - -static void sx_release_io_range(struct specialix_board *bp) -{ - release_region(bp->base, bp->flags & SX_BOARD_IS_PCI ? - SX_PCI_IO_SPACE : SX_IO_SPACE); -} - - -/* Set the IRQ using the RTS lines that run to the PAL on the board.... */ -static int sx_set_irq(struct specialix_board *bp) -{ - int virq; - int i; - unsigned long flags; - - if (bp->flags & SX_BOARD_IS_PCI) - return 1; - switch (bp->irq) { - /* In the same order as in the docs... */ - case 15: - virq = 0; - break; - case 12: - virq = 1; - break; - case 11: - virq = 2; - break; - case 9: - virq = 3; - break; - default:printk(KERN_ERR - "Speclialix: cannot set irq to %d.\n", bp->irq); - return 0; - } - spin_lock_irqsave(&bp->lock, flags); - for (i = 0; i < 2; i++) { - sx_out(bp, CD186x_CAR, i); - sx_out(bp, CD186x_MSVRTS, ((virq >> i) & 0x1)? MSVR_RTS:0); - } - spin_unlock_irqrestore(&bp->lock, flags); - return 1; -} - - -/* Reset and setup CD186x chip */ -static int sx_init_CD186x(struct specialix_board *bp) -{ - unsigned long flags; - int scaler; - int rv = 1; - - func_enter(); - sx_wait_CCR_off(bp); /* Wait for CCR ready */ - spin_lock_irqsave(&bp->lock, flags); - sx_out_off(bp, CD186x_CCR, CCR_HARDRESET); /* Reset CD186x chip */ - spin_unlock_irqrestore(&bp->lock, flags); - msleep(50); /* Delay 0.05 sec */ - spin_lock_irqsave(&bp->lock, flags); - sx_out_off(bp, CD186x_GIVR, SX_ID); /* Set ID for this chip */ - sx_out_off(bp, CD186x_GICR, 0); /* Clear all bits */ - sx_out_off(bp, CD186x_PILR1, SX_ACK_MINT); /* Prio for modem intr */ - sx_out_off(bp, CD186x_PILR2, SX_ACK_TINT); /* Prio for transmitter intr */ - sx_out_off(bp, CD186x_PILR3, SX_ACK_RINT); /* Prio for receiver intr */ - /* Set RegAckEn */ - sx_out_off(bp, CD186x_SRCR, sx_in(bp, CD186x_SRCR) | SRCR_REGACKEN); - - /* Setting up prescaler. We need 4 ticks per 1 ms */ - scaler = SX_OSCFREQ/SPECIALIX_TPS; - - sx_out_off(bp, CD186x_PPRH, scaler >> 8); - sx_out_off(bp, CD186x_PPRL, scaler & 0xff); - spin_unlock_irqrestore(&bp->lock, flags); - - if (!sx_set_irq(bp)) { - /* Figure out how to pass this along... */ - printk(KERN_ERR "Cannot set irq to %d.\n", bp->irq); - rv = 0; - } - - func_exit(); - return rv; -} - - -static int read_cross_byte(struct specialix_board *bp, int reg, int bit) -{ - int i; - int t; - unsigned long flags; - - spin_lock_irqsave(&bp->lock, flags); - for (i = 0, t = 0; i < 8; i++) { - sx_out_off(bp, CD186x_CAR, i); - if (sx_in_off(bp, reg) & bit) - t |= 1 << i; - } - spin_unlock_irqrestore(&bp->lock, flags); - - return t; -} - - -/* Main probing routine, also sets irq. */ -static int sx_probe(struct specialix_board *bp) -{ - unsigned char val1, val2; - int rev; - int chip; - - func_enter(); - - if (sx_request_io_range(bp)) { - func_exit(); - return 1; - } - - /* Are the I/O ports here ? */ - sx_out_off(bp, CD186x_PPRL, 0x5a); - udelay(1); - val1 = sx_in_off(bp, CD186x_PPRL); - - sx_out_off(bp, CD186x_PPRL, 0xa5); - udelay(1); - val2 = sx_in_off(bp, CD186x_PPRL); - - - if (val1 != 0x5a || val2 != 0xa5) { - printk(KERN_INFO - "sx%d: specialix IO8+ Board at 0x%03x not found.\n", - board_No(bp), bp->base); - sx_release_io_range(bp); - func_exit(); - return 1; - } - - /* Check the DSR lines that Specialix uses as board - identification */ - val1 = read_cross_byte(bp, CD186x_MSVR, MSVR_DSR); - val2 = read_cross_byte(bp, CD186x_MSVR, MSVR_RTS); - dprintk(SX_DEBUG_INIT, - "sx%d: DSR lines are: %02x, rts lines are: %02x\n", - board_No(bp), val1, val2); - - /* They managed to switch the bit order between the docs and - the IO8+ card. The new PCI card now conforms to old docs. - They changed the PCI docs to reflect the situation on the - old card. */ - val2 = (bp->flags & SX_BOARD_IS_PCI)?0x4d : 0xb2; - if (val1 != val2) { - printk(KERN_INFO - "sx%d: specialix IO8+ ID %02x at 0x%03x not found (%02x).\n", - board_No(bp), val2, bp->base, val1); - sx_release_io_range(bp); - func_exit(); - return 1; - } - - - /* Reset CD186x again */ - if (!sx_init_CD186x(bp)) { - sx_release_io_range(bp); - func_exit(); - return 1; - } - - sx_request_io_range(bp); - bp->flags |= SX_BOARD_PRESENT; - - /* Chip revcode pkgtype - GFRCR SRCR bit 7 - CD180 rev B 0x81 0 - CD180 rev C 0x82 0 - CD1864 rev A 0x82 1 - CD1865 rev A 0x83 1 -- Do not use!!! Does not work. - CD1865 rev B 0x84 1 - -- Thanks to Gwen Wang, Cirrus Logic. - */ - - switch (sx_in_off(bp, CD186x_GFRCR)) { - case 0x82: - chip = 1864; - rev = 'A'; - break; - case 0x83: - chip = 1865; - rev = 'A'; - break; - case 0x84: - chip = 1865; - rev = 'B'; - break; - case 0x85: - chip = 1865; - rev = 'C'; - break; /* Does not exist at this time */ - default: - chip = -1; - rev = 'x'; - } - - dprintk(SX_DEBUG_INIT, " GFCR = 0x%02x\n", sx_in_off(bp, CD186x_GFRCR)); - - printk(KERN_INFO - "sx%d: specialix IO8+ board detected at 0x%03x, IRQ %d, CD%d Rev. %c.\n", - board_No(bp), bp->base, bp->irq, chip, rev); - - func_exit(); - return 0; -} - -/* - * - * Interrupt processing routines. - * */ - -static struct specialix_port *sx_get_port(struct specialix_board *bp, - unsigned char const *what) -{ - unsigned char channel; - struct specialix_port *port = NULL; - - channel = sx_in(bp, CD186x_GICR) >> GICR_CHAN_OFF; - dprintk(SX_DEBUG_CHAN, "channel: %d\n", channel); - if (channel < CD186x_NCH) { - port = &sx_port[board_No(bp) * SX_NPORT + channel]; - dprintk(SX_DEBUG_CHAN, "port: %d %p flags: 0x%lx\n", - board_No(bp) * SX_NPORT + channel, port, - port->port.flags & ASYNC_INITIALIZED); - - if (port->port.flags & ASYNC_INITIALIZED) { - dprintk(SX_DEBUG_CHAN, "port: %d %p\n", channel, port); - func_exit(); - return port; - } - } - printk(KERN_INFO "sx%d: %s interrupt from invalid port %d\n", - board_No(bp), what, channel); - return NULL; -} - - -static void sx_receive_exc(struct specialix_board *bp) -{ - struct specialix_port *port; - struct tty_struct *tty; - unsigned char status; - unsigned char ch, flag; - - func_enter(); - - port = sx_get_port(bp, "Receive"); - if (!port) { - dprintk(SX_DEBUG_RX, "Hmm, couldn't find port.\n"); - func_exit(); - return; - } - tty = port->port.tty; - - status = sx_in(bp, CD186x_RCSR); - - dprintk(SX_DEBUG_RX, "status: 0x%x\n", status); - if (status & RCSR_OE) { - port->overrun++; - dprintk(SX_DEBUG_FIFO, - "sx%d: port %d: Overrun. Total %ld overruns.\n", - board_No(bp), port_No(port), port->overrun); - } - status &= port->mark_mask; - - /* This flip buffer check needs to be below the reading of the - status register to reset the chip's IRQ.... */ - if (tty_buffer_request_room(tty, 1) == 0) { - dprintk(SX_DEBUG_FIFO, - "sx%d: port %d: Working around flip buffer overflow.\n", - board_No(bp), port_No(port)); - func_exit(); - return; - } - - ch = sx_in(bp, CD186x_RDR); - if (!status) { - func_exit(); - return; - } - if (status & RCSR_TOUT) { - printk(KERN_INFO - "sx%d: port %d: Receiver timeout. Hardware problems ?\n", - board_No(bp), port_No(port)); - func_exit(); - return; - - } else if (status & RCSR_BREAK) { - dprintk(SX_DEBUG_RX, "sx%d: port %d: Handling break...\n", - board_No(bp), port_No(port)); - flag = TTY_BREAK; - if (port->port.flags & ASYNC_SAK) - do_SAK(tty); - - } else if (status & RCSR_PE) - flag = TTY_PARITY; - - else if (status & RCSR_FE) - flag = TTY_FRAME; - - else if (status & RCSR_OE) - flag = TTY_OVERRUN; - - else - flag = TTY_NORMAL; - - if (tty_insert_flip_char(tty, ch, flag)) - tty_flip_buffer_push(tty); - func_exit(); -} - - -static void sx_receive(struct specialix_board *bp) -{ - struct specialix_port *port; - struct tty_struct *tty; - unsigned char count; - - func_enter(); - - port = sx_get_port(bp, "Receive"); - if (port == NULL) { - dprintk(SX_DEBUG_RX, "Hmm, couldn't find port.\n"); - func_exit(); - return; - } - tty = port->port.tty; - - count = sx_in(bp, CD186x_RDCR); - dprintk(SX_DEBUG_RX, "port: %p: count: %d\n", port, count); - port->hits[count > 8 ? 9 : count]++; - - while (count--) - tty_insert_flip_char(tty, sx_in(bp, CD186x_RDR), TTY_NORMAL); - tty_flip_buffer_push(tty); - func_exit(); -} - - -static void sx_transmit(struct specialix_board *bp) -{ - struct specialix_port *port; - struct tty_struct *tty; - unsigned char count; - - func_enter(); - port = sx_get_port(bp, "Transmit"); - if (port == NULL) { - func_exit(); - return; - } - dprintk(SX_DEBUG_TX, "port: %p\n", port); - tty = port->port.tty; - - if (port->IER & IER_TXEMPTY) { - /* FIFO drained */ - sx_out(bp, CD186x_CAR, port_No(port)); - port->IER &= ~IER_TXEMPTY; - sx_out(bp, CD186x_IER, port->IER); - func_exit(); - return; - } - - if ((port->xmit_cnt <= 0 && !port->break_length) - || tty->stopped || tty->hw_stopped) { - sx_out(bp, CD186x_CAR, port_No(port)); - port->IER &= ~IER_TXRDY; - sx_out(bp, CD186x_IER, port->IER); - func_exit(); - return; - } - - if (port->break_length) { - if (port->break_length > 0) { - if (port->COR2 & COR2_ETC) { - sx_out(bp, CD186x_TDR, CD186x_C_ESC); - sx_out(bp, CD186x_TDR, CD186x_C_SBRK); - port->COR2 &= ~COR2_ETC; - } - count = min_t(int, port->break_length, 0xff); - sx_out(bp, CD186x_TDR, CD186x_C_ESC); - sx_out(bp, CD186x_TDR, CD186x_C_DELAY); - sx_out(bp, CD186x_TDR, count); - port->break_length -= count; - if (port->break_length == 0) - port->break_length--; - } else { - sx_out(bp, CD186x_TDR, CD186x_C_ESC); - sx_out(bp, CD186x_TDR, CD186x_C_EBRK); - sx_out(bp, CD186x_COR2, port->COR2); - sx_wait_CCR(bp); - sx_out(bp, CD186x_CCR, CCR_CORCHG2); - port->break_length = 0; - } - - func_exit(); - return; - } - - count = CD186x_NFIFO; - do { - sx_out(bp, CD186x_TDR, port->xmit_buf[port->xmit_tail++]); - port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1); - if (--port->xmit_cnt <= 0) - break; - } while (--count > 0); - - if (port->xmit_cnt <= 0) { - sx_out(bp, CD186x_CAR, port_No(port)); - port->IER &= ~IER_TXRDY; - sx_out(bp, CD186x_IER, port->IER); - } - if (port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); - - func_exit(); -} - - -static void sx_check_modem(struct specialix_board *bp) -{ - struct specialix_port *port; - struct tty_struct *tty; - unsigned char mcr; - int msvr_cd; - - dprintk(SX_DEBUG_SIGNALS, "Modem intr. "); - port = sx_get_port(bp, "Modem"); - if (port == NULL) - return; - - tty = port->port.tty; - - mcr = sx_in(bp, CD186x_MCR); - - if ((mcr & MCR_CDCHG)) { - dprintk(SX_DEBUG_SIGNALS, "CD just changed... "); - msvr_cd = sx_in(bp, CD186x_MSVR) & MSVR_CD; - if (msvr_cd) { - dprintk(SX_DEBUG_SIGNALS, "Waking up guys in open.\n"); - wake_up_interruptible(&port->port.open_wait); - } else { - dprintk(SX_DEBUG_SIGNALS, "Sending HUP.\n"); - tty_hangup(tty); - } - } - -#ifdef SPECIALIX_BRAIN_DAMAGED_CTS - if (mcr & MCR_CTSCHG) { - if (sx_in(bp, CD186x_MSVR) & MSVR_CTS) { - tty->hw_stopped = 0; - port->IER |= IER_TXRDY; - if (port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); - } else { - tty->hw_stopped = 1; - port->IER &= ~IER_TXRDY; - } - sx_out(bp, CD186x_IER, port->IER); - } - if (mcr & MCR_DSSXHG) { - if (sx_in(bp, CD186x_MSVR) & MSVR_DSR) { - tty->hw_stopped = 0; - port->IER |= IER_TXRDY; - if (port->xmit_cnt <= port->wakeup_chars) - tty_wakeup(tty); - } else { - tty->hw_stopped = 1; - port->IER &= ~IER_TXRDY; - } - sx_out(bp, CD186x_IER, port->IER); - } -#endif /* SPECIALIX_BRAIN_DAMAGED_CTS */ - - /* Clear change bits */ - sx_out(bp, CD186x_MCR, 0); -} - - -/* The main interrupt processing routine */ -static irqreturn_t sx_interrupt(int dummy, void *dev_id) -{ - unsigned char status; - unsigned char ack; - struct specialix_board *bp = dev_id; - unsigned long loop = 0; - int saved_reg; - unsigned long flags; - - func_enter(); - - spin_lock_irqsave(&bp->lock, flags); - - dprintk(SX_DEBUG_FLOW, "enter %s port %d room: %ld\n", __func__, - port_No(sx_get_port(bp, "INT")), - SERIAL_XMIT_SIZE - sx_get_port(bp, "ITN")->xmit_cnt - 1); - if (!(bp->flags & SX_BOARD_ACTIVE)) { - dprintk(SX_DEBUG_IRQ, "sx: False interrupt. irq %d.\n", - bp->irq); - spin_unlock_irqrestore(&bp->lock, flags); - func_exit(); - return IRQ_NONE; - } - - saved_reg = bp->reg; - - while (++loop < 16) { - status = sx_in(bp, CD186x_SRSR) & - (SRSR_RREQint | SRSR_TREQint | SRSR_MREQint); - if (status == 0) - break; - if (status & SRSR_RREQint) { - ack = sx_in(bp, CD186x_RRAR); - - if (ack == (SX_ID | GIVR_IT_RCV)) - sx_receive(bp); - else if (ack == (SX_ID | GIVR_IT_REXC)) - sx_receive_exc(bp); - else - printk(KERN_ERR - "sx%d: status: 0x%x Bad receive ack 0x%02x.\n", - board_No(bp), status, ack); - - } else if (status & SRSR_TREQint) { - ack = sx_in(bp, CD186x_TRAR); - - if (ack == (SX_ID | GIVR_IT_TX)) - sx_transmit(bp); - else - printk(KERN_ERR "sx%d: status: 0x%x Bad transmit ack 0x%02x. port: %d\n", - board_No(bp), status, ack, - port_No(sx_get_port(bp, "Int"))); - } else if (status & SRSR_MREQint) { - ack = sx_in(bp, CD186x_MRAR); - - if (ack == (SX_ID | GIVR_IT_MODEM)) - sx_check_modem(bp); - else - printk(KERN_ERR - "sx%d: status: 0x%x Bad modem ack 0x%02x.\n", - board_No(bp), status, ack); - - } - - sx_out(bp, CD186x_EOIR, 0); /* Mark end of interrupt */ - } - bp->reg = saved_reg; - outb(bp->reg, bp->base + SX_ADDR_REG); - spin_unlock_irqrestore(&bp->lock, flags); - func_exit(); - return IRQ_HANDLED; -} - - -/* - * Routines for open & close processing. - */ - -static void turn_ints_off(struct specialix_board *bp) -{ - unsigned long flags; - - func_enter(); - spin_lock_irqsave(&bp->lock, flags); - (void) sx_in_off(bp, 0); /* Turn off interrupts. */ - spin_unlock_irqrestore(&bp->lock, flags); - - func_exit(); -} - -static void turn_ints_on(struct specialix_board *bp) -{ - unsigned long flags; - - func_enter(); - - spin_lock_irqsave(&bp->lock, flags); - (void) sx_in(bp, 0); /* Turn ON interrupts. */ - spin_unlock_irqrestore(&bp->lock, flags); - - func_exit(); -} - - -/* Called with disabled interrupts */ -static int sx_setup_board(struct specialix_board *bp) -{ - int error; - - if (bp->flags & SX_BOARD_ACTIVE) - return 0; - - if (bp->flags & SX_BOARD_IS_PCI) - error = request_irq(bp->irq, sx_interrupt, - IRQF_DISABLED | IRQF_SHARED, "specialix IO8+", bp); - else - error = request_irq(bp->irq, sx_interrupt, - IRQF_DISABLED, "specialix IO8+", bp); - - if (error) - return error; - - turn_ints_on(bp); - bp->flags |= SX_BOARD_ACTIVE; - - return 0; -} - - -/* Called with disabled interrupts */ -static void sx_shutdown_board(struct specialix_board *bp) -{ - func_enter(); - - if (!(bp->flags & SX_BOARD_ACTIVE)) { - func_exit(); - return; - } - - bp->flags &= ~SX_BOARD_ACTIVE; - - dprintk(SX_DEBUG_IRQ, "Freeing IRQ%d for board %d.\n", - bp->irq, board_No(bp)); - free_irq(bp->irq, bp); - turn_ints_off(bp); - func_exit(); -} - -static unsigned int sx_crtscts(struct tty_struct *tty) -{ - if (sx_rtscts) - return C_CRTSCTS(tty); - return 1; -} - -/* - * Setting up port characteristics. - * Must be called with disabled interrupts - */ -static void sx_change_speed(struct specialix_board *bp, - struct specialix_port *port) -{ - struct tty_struct *tty; - unsigned long baud; - long tmp; - unsigned char cor1 = 0, cor3 = 0; - unsigned char mcor1 = 0, mcor2 = 0; - static unsigned long again; - unsigned long flags; - - func_enter(); - - tty = port->port.tty; - if (!tty || !tty->termios) { - func_exit(); - return; - } - - port->IER = 0; - port->COR2 = 0; - /* Select port on the board */ - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - - /* The Specialix board doesn't implement the RTS lines. - They are used to set the IRQ level. Don't touch them. */ - if (sx_crtscts(tty)) - port->MSVR = MSVR_DTR | (sx_in(bp, CD186x_MSVR) & MSVR_RTS); - else - port->MSVR = (sx_in(bp, CD186x_MSVR) & MSVR_RTS); - spin_unlock_irqrestore(&bp->lock, flags); - dprintk(SX_DEBUG_TERMIOS, "sx: got MSVR=%02x.\n", port->MSVR); - baud = tty_get_baud_rate(tty); - - if (baud == 38400) { - if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - baud = 57600; - if ((port->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - baud = 115200; - } - - if (!baud) { - /* Drop DTR & exit */ - dprintk(SX_DEBUG_TERMIOS, "Dropping DTR... Hmm....\n"); - if (!sx_crtscts(tty)) { - port->MSVR &= ~MSVR_DTR; - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_MSVR, port->MSVR); - spin_unlock_irqrestore(&bp->lock, flags); - } else - dprintk(SX_DEBUG_TERMIOS, "Can't drop DTR: no DTR.\n"); - return; - } else { - /* Set DTR on */ - if (!sx_crtscts(tty)) - port->MSVR |= MSVR_DTR; - } - - /* - * Now we must calculate some speed depended things - */ - - /* Set baud rate for port */ - tmp = port->custom_divisor ; - if (tmp) - printk(KERN_INFO - "sx%d: Using custom baud rate divisor %ld. \n" - "This is an untested option, please be careful.\n", - port_No(port), tmp); - else - tmp = (((SX_OSCFREQ + baud/2) / baud + CD186x_TPC/2) / - CD186x_TPC); - - if (tmp < 0x10 && time_before(again, jiffies)) { - again = jiffies + HZ * 60; - /* Page 48 of version 2.0 of the CL-CD1865 databook */ - if (tmp >= 12) { - printk(KERN_INFO "sx%d: Baud rate divisor is %ld. \n" - "Performance degradation is possible.\n" - "Read specialix.txt for more info.\n", - port_No(port), tmp); - } else { - printk(KERN_INFO "sx%d: Baud rate divisor is %ld. \n" - "Warning: overstressing Cirrus chip. This might not work.\n" - "Read specialix.txt for more info.\n", port_No(port), tmp); - } - } - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_RBPRH, (tmp >> 8) & 0xff); - sx_out(bp, CD186x_TBPRH, (tmp >> 8) & 0xff); - sx_out(bp, CD186x_RBPRL, tmp & 0xff); - sx_out(bp, CD186x_TBPRL, tmp & 0xff); - spin_unlock_irqrestore(&bp->lock, flags); - if (port->custom_divisor) - baud = (SX_OSCFREQ + port->custom_divisor/2) / - port->custom_divisor; - baud = (baud + 5) / 10; /* Estimated CPS */ - - /* Two timer ticks seems enough to wakeup something like SLIP driver */ - tmp = ((baud + HZ/2) / HZ) * 2 - CD186x_NFIFO; - port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ? - SERIAL_XMIT_SIZE - 1 : tmp); - - /* Receiver timeout will be transmission time for 1.5 chars */ - tmp = (SPECIALIX_TPS + SPECIALIX_TPS/2 + baud/2) / baud; - tmp = (tmp > 0xff) ? 0xff : tmp; - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_RTPR, tmp); - spin_unlock_irqrestore(&bp->lock, flags); - switch (C_CSIZE(tty)) { - case CS5: - cor1 |= COR1_5BITS; - break; - case CS6: - cor1 |= COR1_6BITS; - break; - case CS7: - cor1 |= COR1_7BITS; - break; - case CS8: - cor1 |= COR1_8BITS; - break; - } - - if (C_CSTOPB(tty)) - cor1 |= COR1_2SB; - - cor1 |= COR1_IGNORE; - if (C_PARENB(tty)) { - cor1 |= COR1_NORMPAR; - if (C_PARODD(tty)) - cor1 |= COR1_ODDP; - if (I_INPCK(tty)) - cor1 &= ~COR1_IGNORE; - } - /* Set marking of some errors */ - port->mark_mask = RCSR_OE | RCSR_TOUT; - if (I_INPCK(tty)) - port->mark_mask |= RCSR_FE | RCSR_PE; - if (I_BRKINT(tty) || I_PARMRK(tty)) - port->mark_mask |= RCSR_BREAK; - if (I_IGNPAR(tty)) - port->mark_mask &= ~(RCSR_FE | RCSR_PE); - if (I_IGNBRK(tty)) { - port->mark_mask &= ~RCSR_BREAK; - if (I_IGNPAR(tty)) - /* Real raw mode. Ignore all */ - port->mark_mask &= ~RCSR_OE; - } - /* Enable Hardware Flow Control */ - if (C_CRTSCTS(tty)) { -#ifdef SPECIALIX_BRAIN_DAMAGED_CTS - port->IER |= IER_DSR | IER_CTS; - mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD; - mcor2 |= MCOR2_DSROD | MCOR2_CTSOD; - spin_lock_irqsave(&bp->lock, flags); - tty->hw_stopped = !(sx_in(bp, CD186x_MSVR) & - (MSVR_CTS|MSVR_DSR)); - spin_unlock_irqrestore(&bp->lock, flags); -#else - port->COR2 |= COR2_CTSAE; -#endif - } - /* Enable Software Flow Control. FIXME: I'm not sure about this */ - /* Some people reported that it works, but I still doubt it */ - if (I_IXON(tty)) { - port->COR2 |= COR2_TXIBE; - cor3 |= (COR3_FCT | COR3_SCDE); - if (I_IXANY(tty)) - port->COR2 |= COR2_IXM; - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_SCHR1, START_CHAR(tty)); - sx_out(bp, CD186x_SCHR2, STOP_CHAR(tty)); - sx_out(bp, CD186x_SCHR3, START_CHAR(tty)); - sx_out(bp, CD186x_SCHR4, STOP_CHAR(tty)); - spin_unlock_irqrestore(&bp->lock, flags); - } - if (!C_CLOCAL(tty)) { - /* Enable CD check */ - port->IER |= IER_CD; - mcor1 |= MCOR1_CDZD; - mcor2 |= MCOR2_CDOD; - } - - if (C_CREAD(tty)) - /* Enable receiver */ - port->IER |= IER_RXD; - - /* Set input FIFO size (1-8 bytes) */ - cor3 |= sx_rxfifo; - /* Setting up CD186x channel registers */ - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_COR1, cor1); - sx_out(bp, CD186x_COR2, port->COR2); - sx_out(bp, CD186x_COR3, cor3); - spin_unlock_irqrestore(&bp->lock, flags); - /* Make CD186x know about registers change */ - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3); - /* Setting up modem option registers */ - dprintk(SX_DEBUG_TERMIOS, "Mcor1 = %02x, mcor2 = %02x.\n", - mcor1, mcor2); - sx_out(bp, CD186x_MCOR1, mcor1); - sx_out(bp, CD186x_MCOR2, mcor2); - spin_unlock_irqrestore(&bp->lock, flags); - /* Enable CD186x transmitter & receiver */ - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_TXEN | CCR_RXEN); - /* Enable interrupts */ - sx_out(bp, CD186x_IER, port->IER); - /* And finally set the modem lines... */ - sx_out(bp, CD186x_MSVR, port->MSVR); - spin_unlock_irqrestore(&bp->lock, flags); - - func_exit(); -} - - -/* Must be called with interrupts enabled */ -static int sx_setup_port(struct specialix_board *bp, - struct specialix_port *port) -{ - unsigned long flags; - - func_enter(); - - if (port->port.flags & ASYNC_INITIALIZED) { - func_exit(); - return 0; - } - - if (!port->xmit_buf) { - /* We may sleep in get_zeroed_page() */ - unsigned long tmp; - - tmp = get_zeroed_page(GFP_KERNEL); - if (tmp == 0L) { - func_exit(); - return -ENOMEM; - } - - if (port->xmit_buf) { - free_page(tmp); - func_exit(); - return -ERESTARTSYS; - } - port->xmit_buf = (unsigned char *) tmp; - } - - spin_lock_irqsave(&port->lock, flags); - - if (port->port.tty) - clear_bit(TTY_IO_ERROR, &port->port.tty->flags); - - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - sx_change_speed(bp, port); - port->port.flags |= ASYNC_INITIALIZED; - - spin_unlock_irqrestore(&port->lock, flags); - - - func_exit(); - return 0; -} - - -/* Must be called with interrupts disabled */ -static void sx_shutdown_port(struct specialix_board *bp, - struct specialix_port *port) -{ - struct tty_struct *tty; - int i; - unsigned long flags; - - func_enter(); - - if (!(port->port.flags & ASYNC_INITIALIZED)) { - func_exit(); - return; - } - - if (sx_debug & SX_DEBUG_FIFO) { - dprintk(SX_DEBUG_FIFO, - "sx%d: port %d: %ld overruns, FIFO hits [ ", - board_No(bp), port_No(port), port->overrun); - for (i = 0; i < 10; i++) - dprintk(SX_DEBUG_FIFO, "%ld ", port->hits[i]); - dprintk(SX_DEBUG_FIFO, "].\n"); - } - - if (port->xmit_buf) { - free_page((unsigned long) port->xmit_buf); - port->xmit_buf = NULL; - } - - /* Select port */ - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - - tty = port->port.tty; - if (tty == NULL || C_HUPCL(tty)) { - /* Drop DTR */ - sx_out(bp, CD186x_MSVDTR, 0); - } - spin_unlock_irqrestore(&bp->lock, flags); - /* Reset port */ - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_SOFTRESET); - /* Disable all interrupts from this port */ - port->IER = 0; - sx_out(bp, CD186x_IER, port->IER); - spin_unlock_irqrestore(&bp->lock, flags); - if (tty) - set_bit(TTY_IO_ERROR, &tty->flags); - port->port.flags &= ~ASYNC_INITIALIZED; - - if (!bp->count) - sx_shutdown_board(bp); - func_exit(); -} - - -static int block_til_ready(struct tty_struct *tty, struct file *filp, - struct specialix_port *port) -{ - DECLARE_WAITQUEUE(wait, current); - struct specialix_board *bp = port_Board(port); - int retval; - int do_clocal = 0; - int CD; - unsigned long flags; - - func_enter(); - - /* - * If the device is in the middle of being closed, then block - * until it's done, and then try again. - */ - if (tty_hung_up_p(filp) || port->port.flags & ASYNC_CLOSING) { - interruptible_sleep_on(&port->port.close_wait); - if (port->port.flags & ASYNC_HUP_NOTIFY) { - func_exit(); - return -EAGAIN; - } else { - func_exit(); - return -ERESTARTSYS; - } - } - - /* - * If non-blocking mode is set, or the port is not enabled, - * then make the check up front and then exit. - */ - if ((filp->f_flags & O_NONBLOCK) || - (tty->flags & (1 << TTY_IO_ERROR))) { - port->port.flags |= ASYNC_NORMAL_ACTIVE; - func_exit(); - return 0; - } - - if (C_CLOCAL(tty)) - do_clocal = 1; - - /* - * Block waiting for the carrier detect and the line to become - * free (i.e., not in use by the callout). While we are in - * this loop, info->count is dropped by one, so that - * rs_close() knows when to free things. We restore it upon - * exit, either normal or abnormal. - */ - retval = 0; - add_wait_queue(&port->port.open_wait, &wait); - spin_lock_irqsave(&port->lock, flags); - if (!tty_hung_up_p(filp)) - port->port.count--; - spin_unlock_irqrestore(&port->lock, flags); - port->port.blocked_open++; - while (1) { - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - CD = sx_in(bp, CD186x_MSVR) & MSVR_CD; - if (sx_crtscts(tty)) { - /* Activate RTS */ - port->MSVR |= MSVR_DTR; /* WTF? */ - sx_out(bp, CD186x_MSVR, port->MSVR); - } else { - /* Activate DTR */ - port->MSVR |= MSVR_DTR; - sx_out(bp, CD186x_MSVR, port->MSVR); - } - spin_unlock_irqrestore(&bp->lock, flags); - set_current_state(TASK_INTERRUPTIBLE); - if (tty_hung_up_p(filp) || - !(port->port.flags & ASYNC_INITIALIZED)) { - if (port->port.flags & ASYNC_HUP_NOTIFY) - retval = -EAGAIN; - else - retval = -ERESTARTSYS; - break; - } - if (!(port->port.flags & ASYNC_CLOSING) && - (do_clocal || CD)) - break; - if (signal_pending(current)) { - retval = -ERESTARTSYS; - break; - } - tty_unlock(); - schedule(); - tty_lock(); - } - - set_current_state(TASK_RUNNING); - remove_wait_queue(&port->port.open_wait, &wait); - spin_lock_irqsave(&port->lock, flags); - if (!tty_hung_up_p(filp)) - port->port.count++; - port->port.blocked_open--; - spin_unlock_irqrestore(&port->lock, flags); - if (retval) { - func_exit(); - return retval; - } - - port->port.flags |= ASYNC_NORMAL_ACTIVE; - func_exit(); - return 0; -} - - -static int sx_open(struct tty_struct *tty, struct file *filp) -{ - int board; - int error; - struct specialix_port *port; - struct specialix_board *bp; - int i; - unsigned long flags; - - func_enter(); - - board = SX_BOARD(tty->index); - - if (board >= SX_NBOARD || !(sx_board[board].flags & SX_BOARD_PRESENT)) { - func_exit(); - return -ENODEV; - } - - bp = &sx_board[board]; - port = sx_port + board * SX_NPORT + SX_PORT(tty->index); - port->overrun = 0; - for (i = 0; i < 10; i++) - port->hits[i] = 0; - - dprintk(SX_DEBUG_OPEN, - "Board = %d, bp = %p, port = %p, portno = %d.\n", - board, bp, port, SX_PORT(tty->index)); - - if (sx_paranoia_check(port, tty->name, "sx_open")) { - func_exit(); - return -ENODEV; - } - - error = sx_setup_board(bp); - if (error) { - func_exit(); - return error; - } - - spin_lock_irqsave(&bp->lock, flags); - port->port.count++; - bp->count++; - tty->driver_data = port; - port->port.tty = tty; - spin_unlock_irqrestore(&bp->lock, flags); - - error = sx_setup_port(bp, port); - if (error) { - func_exit(); - return error; - } - - error = block_til_ready(tty, filp, port); - if (error) { - func_exit(); - return error; - } - - func_exit(); - return 0; -} - -static void sx_flush_buffer(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - unsigned long flags; - struct specialix_board *bp; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_flush_buffer")) { - func_exit(); - return; - } - - bp = port_Board(port); - spin_lock_irqsave(&port->lock, flags); - port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; - spin_unlock_irqrestore(&port->lock, flags); - tty_wakeup(tty); - - func_exit(); -} - -static void sx_close(struct tty_struct *tty, struct file *filp) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - unsigned long timeout; - - func_enter(); - if (!port || sx_paranoia_check(port, tty->name, "close")) { - func_exit(); - return; - } - spin_lock_irqsave(&port->lock, flags); - - if (tty_hung_up_p(filp)) { - spin_unlock_irqrestore(&port->lock, flags); - func_exit(); - return; - } - - bp = port_Board(port); - if (tty->count == 1 && port->port.count != 1) { - printk(KERN_ERR "sx%d: sx_close: bad port count;" - " tty->count is 1, port count is %d\n", - board_No(bp), port->port.count); - port->port.count = 1; - } - - if (port->port.count > 1) { - port->port.count--; - bp->count--; - - spin_unlock_irqrestore(&port->lock, flags); - - func_exit(); - return; - } - port->port.flags |= ASYNC_CLOSING; - /* - * Now we wait for the transmit buffer to clear; and we notify - * the line discipline to only process XON/XOFF characters. - */ - tty->closing = 1; - spin_unlock_irqrestore(&port->lock, flags); - dprintk(SX_DEBUG_OPEN, "Closing\n"); - if (port->port.closing_wait != ASYNC_CLOSING_WAIT_NONE) - tty_wait_until_sent(tty, port->port.closing_wait); - /* - * At this point we stop accepting input. To do this, we - * disable the receive line status interrupts, and tell the - * interrupt driver to stop checking the data ready bit in the - * line status register. - */ - dprintk(SX_DEBUG_OPEN, "Closed\n"); - port->IER &= ~IER_RXD; - if (port->port.flags & ASYNC_INITIALIZED) { - port->IER &= ~IER_TXRDY; - port->IER |= IER_TXEMPTY; - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_IER, port->IER); - spin_unlock_irqrestore(&bp->lock, flags); - /* - * Before we drop DTR, make sure the UART transmitter - * has completely drained; this is especially - * important if there is a transmit FIFO! - */ - timeout = jiffies+HZ; - while (port->IER & IER_TXEMPTY) { - set_current_state(TASK_INTERRUPTIBLE); - msleep_interruptible(jiffies_to_msecs(port->timeout)); - if (time_after(jiffies, timeout)) { - printk(KERN_INFO "Timeout waiting for close\n"); - break; - } - } - - } - - if (--bp->count < 0) { - printk(KERN_ERR - "sx%d: sx_shutdown_port: bad board count: %d port: %d\n", - board_No(bp), bp->count, tty->index); - bp->count = 0; - } - if (--port->port.count < 0) { - printk(KERN_ERR - "sx%d: sx_close: bad port count for tty%d: %d\n", - board_No(bp), port_No(port), port->port.count); - port->port.count = 0; - } - - sx_shutdown_port(bp, port); - sx_flush_buffer(tty); - tty_ldisc_flush(tty); - spin_lock_irqsave(&port->lock, flags); - tty->closing = 0; - port->port.tty = NULL; - spin_unlock_irqrestore(&port->lock, flags); - if (port->port.blocked_open) { - if (port->port.close_delay) - msleep_interruptible( - jiffies_to_msecs(port->port.close_delay)); - wake_up_interruptible(&port->port.open_wait); - } - port->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); - wake_up_interruptible(&port->port.close_wait); - - func_exit(); -} - - -static int sx_write(struct tty_struct *tty, - const unsigned char *buf, int count) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - int c, total = 0; - unsigned long flags; - - func_enter(); - if (sx_paranoia_check(port, tty->name, "sx_write")) { - func_exit(); - return 0; - } - - bp = port_Board(port); - - if (!port->xmit_buf) { - func_exit(); - return 0; - } - - while (1) { - spin_lock_irqsave(&port->lock, flags); - c = min_t(int, count, min(SERIAL_XMIT_SIZE - port->xmit_cnt - 1, - SERIAL_XMIT_SIZE - port->xmit_head)); - if (c <= 0) { - spin_unlock_irqrestore(&port->lock, flags); - break; - } - memcpy(port->xmit_buf + port->xmit_head, buf, c); - port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1); - port->xmit_cnt += c; - spin_unlock_irqrestore(&port->lock, flags); - - buf += c; - count -= c; - total += c; - } - - spin_lock_irqsave(&bp->lock, flags); - if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped && - !(port->IER & IER_TXRDY)) { - port->IER |= IER_TXRDY; - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_IER, port->IER); - } - spin_unlock_irqrestore(&bp->lock, flags); - func_exit(); - - return total; -} - - -static int sx_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct specialix_port *port = tty->driver_data; - unsigned long flags; - struct specialix_board *bp; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_put_char")) { - func_exit(); - return 0; - } - dprintk(SX_DEBUG_TX, "check tty: %p %p\n", tty, port->xmit_buf); - if (!port->xmit_buf) { - func_exit(); - return 0; - } - bp = port_Board(port); - spin_lock_irqsave(&port->lock, flags); - - dprintk(SX_DEBUG_TX, "xmit_cnt: %d xmit_buf: %p\n", - port->xmit_cnt, port->xmit_buf); - if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1 || !port->xmit_buf) { - spin_unlock_irqrestore(&port->lock, flags); - dprintk(SX_DEBUG_TX, "Exit size\n"); - func_exit(); - return 0; - } - dprintk(SX_DEBUG_TX, "Handle xmit: %p %p\n", port, port->xmit_buf); - port->xmit_buf[port->xmit_head++] = ch; - port->xmit_head &= SERIAL_XMIT_SIZE - 1; - port->xmit_cnt++; - spin_unlock_irqrestore(&port->lock, flags); - - func_exit(); - return 1; -} - - -static void sx_flush_chars(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - unsigned long flags; - struct specialix_board *bp = port_Board(port); - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_flush_chars")) { - func_exit(); - return; - } - if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped || - !port->xmit_buf) { - func_exit(); - return; - } - spin_lock_irqsave(&bp->lock, flags); - port->IER |= IER_TXRDY; - sx_out(port_Board(port), CD186x_CAR, port_No(port)); - sx_out(port_Board(port), CD186x_IER, port->IER); - spin_unlock_irqrestore(&bp->lock, flags); - - func_exit(); -} - - -static int sx_write_room(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - int ret; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_write_room")) { - func_exit(); - return 0; - } - - ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1; - if (ret < 0) - ret = 0; - - func_exit(); - return ret; -} - - -static int sx_chars_in_buffer(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_chars_in_buffer")) { - func_exit(); - return 0; - } - func_exit(); - return port->xmit_cnt; -} - -static int sx_tiocmget(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned char status; - unsigned int result; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, __func__)) { - func_exit(); - return -ENODEV; - } - - bp = port_Board(port); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - status = sx_in(bp, CD186x_MSVR); - spin_unlock_irqrestore(&bp->lock, flags); - dprintk(SX_DEBUG_INIT, "Got msvr[%d] = %02x, car = %d.\n", - port_No(port), status, sx_in(bp, CD186x_CAR)); - dprintk(SX_DEBUG_INIT, "sx_port = %p, port = %p\n", sx_port, port); - if (sx_crtscts(port->port.tty)) { - result = TIOCM_DTR | TIOCM_DSR - | ((status & MSVR_DTR) ? TIOCM_RTS : 0) - | ((status & MSVR_CD) ? TIOCM_CAR : 0) - | ((status & MSVR_CTS) ? TIOCM_CTS : 0); - } else { - result = TIOCM_RTS | TIOCM_DSR - | ((status & MSVR_DTR) ? TIOCM_DTR : 0) - | ((status & MSVR_CD) ? TIOCM_CAR : 0) - | ((status & MSVR_CTS) ? TIOCM_CTS : 0); - } - - func_exit(); - - return result; -} - - -static int sx_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct specialix_port *port = tty->driver_data; - unsigned long flags; - struct specialix_board *bp; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, __func__)) { - func_exit(); - return -ENODEV; - } - - bp = port_Board(port); - - spin_lock_irqsave(&port->lock, flags); - if (sx_crtscts(port->port.tty)) { - if (set & TIOCM_RTS) - port->MSVR |= MSVR_DTR; - } else { - if (set & TIOCM_DTR) - port->MSVR |= MSVR_DTR; - } - if (sx_crtscts(port->port.tty)) { - if (clear & TIOCM_RTS) - port->MSVR &= ~MSVR_DTR; - } else { - if (clear & TIOCM_DTR) - port->MSVR &= ~MSVR_DTR; - } - spin_lock(&bp->lock); - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_MSVR, port->MSVR); - spin_unlock(&bp->lock); - spin_unlock_irqrestore(&port->lock, flags); - func_exit(); - return 0; -} - - -static int sx_send_break(struct tty_struct *tty, int length) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp = port_Board(port); - unsigned long flags; - - func_enter(); - if (length == 0 || length == -1) - return -EOPNOTSUPP; - - spin_lock_irqsave(&port->lock, flags); - port->break_length = SPECIALIX_TPS / HZ * length; - port->COR2 |= COR2_ETC; - port->IER |= IER_TXRDY; - spin_lock(&bp->lock); - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_COR2, port->COR2); - sx_out(bp, CD186x_IER, port->IER); - spin_unlock(&bp->lock); - spin_unlock_irqrestore(&port->lock, flags); - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_CORCHG2); - spin_unlock_irqrestore(&bp->lock, flags); - sx_wait_CCR(bp); - - func_exit(); - return 0; -} - - -static int sx_set_serial_info(struct specialix_port *port, - struct serial_struct __user *newinfo) -{ - struct serial_struct tmp; - struct specialix_board *bp = port_Board(port); - int change_speed; - - func_enter(); - - if (copy_from_user(&tmp, newinfo, sizeof(tmp))) { - func_exit(); - return -EFAULT; - } - - mutex_lock(&port->port.mutex); - change_speed = ((port->port.flags & ASYNC_SPD_MASK) != - (tmp.flags & ASYNC_SPD_MASK)); - change_speed |= (tmp.custom_divisor != port->custom_divisor); - - if (!capable(CAP_SYS_ADMIN)) { - if ((tmp.close_delay != port->port.close_delay) || - (tmp.closing_wait != port->port.closing_wait) || - ((tmp.flags & ~ASYNC_USR_MASK) != - (port->port.flags & ~ASYNC_USR_MASK))) { - func_exit(); - mutex_unlock(&port->port.mutex); - return -EPERM; - } - port->port.flags = ((port->port.flags & ~ASYNC_USR_MASK) | - (tmp.flags & ASYNC_USR_MASK)); - port->custom_divisor = tmp.custom_divisor; - } else { - port->port.flags = ((port->port.flags & ~ASYNC_FLAGS) | - (tmp.flags & ASYNC_FLAGS)); - port->port.close_delay = tmp.close_delay; - port->port.closing_wait = tmp.closing_wait; - port->custom_divisor = tmp.custom_divisor; - } - if (change_speed) - sx_change_speed(bp, port); - - func_exit(); - mutex_unlock(&port->port.mutex); - return 0; -} - - -static int sx_get_serial_info(struct specialix_port *port, - struct serial_struct __user *retinfo) -{ - struct serial_struct tmp; - struct specialix_board *bp = port_Board(port); - - func_enter(); - - memset(&tmp, 0, sizeof(tmp)); - mutex_lock(&port->port.mutex); - tmp.type = PORT_CIRRUS; - tmp.line = port - sx_port; - tmp.port = bp->base; - tmp.irq = bp->irq; - tmp.flags = port->port.flags; - tmp.baud_base = (SX_OSCFREQ + CD186x_TPC/2) / CD186x_TPC; - tmp.close_delay = port->port.close_delay * HZ/100; - tmp.closing_wait = port->port.closing_wait * HZ/100; - tmp.custom_divisor = port->custom_divisor; - tmp.xmit_fifo_size = CD186x_NFIFO; - mutex_unlock(&port->port.mutex); - if (copy_to_user(retinfo, &tmp, sizeof(tmp))) { - func_exit(); - return -EFAULT; - } - - func_exit(); - return 0; -} - - -static int sx_ioctl(struct tty_struct *tty, - unsigned int cmd, unsigned long arg) -{ - struct specialix_port *port = tty->driver_data; - void __user *argp = (void __user *)arg; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_ioctl")) { - func_exit(); - return -ENODEV; - } - - switch (cmd) { - case TIOCGSERIAL: - func_exit(); - return sx_get_serial_info(port, argp); - case TIOCSSERIAL: - func_exit(); - return sx_set_serial_info(port, argp); - default: - func_exit(); - return -ENOIOCTLCMD; - } - func_exit(); - return 0; -} - - -static void sx_throttle(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_throttle")) { - func_exit(); - return; - } - - bp = port_Board(port); - - /* Use DTR instead of RTS ! */ - if (sx_crtscts(tty)) - port->MSVR &= ~MSVR_DTR; - else { - /* Auch!!! I think the system shouldn't call this then. */ - /* Or maybe we're supposed (allowed?) to do our side of hw - handshake anyway, even when hardware handshake is off. - When you see this in your logs, please report.... */ - printk(KERN_ERR - "sx%d: Need to throttle, but can't (hardware hs is off)\n", - port_No(port)); - } - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CAR, port_No(port)); - spin_unlock_irqrestore(&bp->lock, flags); - if (I_IXOFF(tty)) { - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_SSCH2); - spin_unlock_irqrestore(&bp->lock, flags); - sx_wait_CCR(bp); - } - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_MSVR, port->MSVR); - spin_unlock_irqrestore(&bp->lock, flags); - - func_exit(); -} - - -static void sx_unthrottle(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_unthrottle")) { - func_exit(); - return; - } - - bp = port_Board(port); - - spin_lock_irqsave(&port->lock, flags); - /* XXXX Use DTR INSTEAD???? */ - if (sx_crtscts(tty)) - port->MSVR |= MSVR_DTR; - /* Else clause: see remark in "sx_throttle"... */ - spin_lock(&bp->lock); - sx_out(bp, CD186x_CAR, port_No(port)); - spin_unlock(&bp->lock); - if (I_IXOFF(tty)) { - spin_unlock_irqrestore(&port->lock, flags); - sx_wait_CCR(bp); - spin_lock_irqsave(&bp->lock, flags); - sx_out(bp, CD186x_CCR, CCR_SSCH1); - spin_unlock_irqrestore(&bp->lock, flags); - sx_wait_CCR(bp); - spin_lock_irqsave(&port->lock, flags); - } - spin_lock(&bp->lock); - sx_out(bp, CD186x_MSVR, port->MSVR); - spin_unlock(&bp->lock); - spin_unlock_irqrestore(&port->lock, flags); - - func_exit(); -} - - -static void sx_stop(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_stop")) { - func_exit(); - return; - } - - bp = port_Board(port); - - spin_lock_irqsave(&port->lock, flags); - port->IER &= ~IER_TXRDY; - spin_lock(&bp->lock); - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_IER, port->IER); - spin_unlock(&bp->lock); - spin_unlock_irqrestore(&port->lock, flags); - - func_exit(); -} - - -static void sx_start(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_start")) { - func_exit(); - return; - } - - bp = port_Board(port); - - spin_lock_irqsave(&port->lock, flags); - if (port->xmit_cnt && port->xmit_buf && !(port->IER & IER_TXRDY)) { - port->IER |= IER_TXRDY; - spin_lock(&bp->lock); - sx_out(bp, CD186x_CAR, port_No(port)); - sx_out(bp, CD186x_IER, port->IER); - spin_unlock(&bp->lock); - } - spin_unlock_irqrestore(&port->lock, flags); - - func_exit(); -} - -static void sx_hangup(struct tty_struct *tty) -{ - struct specialix_port *port = tty->driver_data; - struct specialix_board *bp; - unsigned long flags; - - func_enter(); - - if (sx_paranoia_check(port, tty->name, "sx_hangup")) { - func_exit(); - return; - } - - bp = port_Board(port); - - sx_shutdown_port(bp, port); - spin_lock_irqsave(&port->lock, flags); - bp->count -= port->port.count; - if (bp->count < 0) { - printk(KERN_ERR - "sx%d: sx_hangup: bad board count: %d port: %d\n", - board_No(bp), bp->count, tty->index); - bp->count = 0; - } - port->port.count = 0; - port->port.flags &= ~ASYNC_NORMAL_ACTIVE; - port->port.tty = NULL; - spin_unlock_irqrestore(&port->lock, flags); - wake_up_interruptible(&port->port.open_wait); - - func_exit(); -} - - -static void sx_set_termios(struct tty_struct *tty, - struct ktermios *old_termios) -{ - struct specialix_port *port = tty->driver_data; - unsigned long flags; - struct specialix_board *bp; - - if (sx_paranoia_check(port, tty->name, "sx_set_termios")) - return; - - bp = port_Board(port); - spin_lock_irqsave(&port->lock, flags); - sx_change_speed(port_Board(port), port); - spin_unlock_irqrestore(&port->lock, flags); - - if ((old_termios->c_cflag & CRTSCTS) && - !(tty->termios->c_cflag & CRTSCTS)) { - tty->hw_stopped = 0; - sx_start(tty); - } -} - -static const struct tty_operations sx_ops = { - .open = sx_open, - .close = sx_close, - .write = sx_write, - .put_char = sx_put_char, - .flush_chars = sx_flush_chars, - .write_room = sx_write_room, - .chars_in_buffer = sx_chars_in_buffer, - .flush_buffer = sx_flush_buffer, - .ioctl = sx_ioctl, - .throttle = sx_throttle, - .unthrottle = sx_unthrottle, - .set_termios = sx_set_termios, - .stop = sx_stop, - .start = sx_start, - .hangup = sx_hangup, - .tiocmget = sx_tiocmget, - .tiocmset = sx_tiocmset, - .break_ctl = sx_send_break, -}; - -static int sx_init_drivers(void) -{ - int error; - int i; - - func_enter(); - - specialix_driver = alloc_tty_driver(SX_NBOARD * SX_NPORT); - if (!specialix_driver) { - printk(KERN_ERR "sx: Couldn't allocate tty_driver.\n"); - func_exit(); - return 1; - } - - specialix_driver->owner = THIS_MODULE; - specialix_driver->name = "ttyW"; - specialix_driver->major = SPECIALIX_NORMAL_MAJOR; - specialix_driver->type = TTY_DRIVER_TYPE_SERIAL; - specialix_driver->subtype = SERIAL_TYPE_NORMAL; - specialix_driver->init_termios = tty_std_termios; - specialix_driver->init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - specialix_driver->init_termios.c_ispeed = 9600; - specialix_driver->init_termios.c_ospeed = 9600; - specialix_driver->flags = TTY_DRIVER_REAL_RAW | - TTY_DRIVER_HARDWARE_BREAK; - tty_set_operations(specialix_driver, &sx_ops); - - error = tty_register_driver(specialix_driver); - if (error) { - put_tty_driver(specialix_driver); - printk(KERN_ERR - "sx: Couldn't register specialix IO8+ driver, error = %d\n", - error); - func_exit(); - return 1; - } - memset(sx_port, 0, sizeof(sx_port)); - for (i = 0; i < SX_NPORT * SX_NBOARD; i++) { - sx_port[i].magic = SPECIALIX_MAGIC; - tty_port_init(&sx_port[i].port); - spin_lock_init(&sx_port[i].lock); - } - - func_exit(); - return 0; -} - -static void sx_release_drivers(void) -{ - func_enter(); - - tty_unregister_driver(specialix_driver); - put_tty_driver(specialix_driver); - func_exit(); -} - -/* - * This routine must be called by kernel at boot time - */ -static int __init specialix_init(void) -{ - int i; - int found = 0; - - func_enter(); - - printk(KERN_INFO "sx: Specialix IO8+ driver v" VERSION ", (c) R.E.Wolff 1997/1998.\n"); - printk(KERN_INFO "sx: derived from work (c) D.Gorodchanin 1994-1996.\n"); - if (sx_rtscts) - printk(KERN_INFO - "sx: DTR/RTS pin is RTS when CRTSCTS is on.\n"); - else - printk(KERN_INFO "sx: DTR/RTS pin is always RTS.\n"); - - for (i = 0; i < SX_NBOARD; i++) - spin_lock_init(&sx_board[i].lock); - - if (sx_init_drivers()) { - func_exit(); - return -EIO; - } - - for (i = 0; i < SX_NBOARD; i++) - if (sx_board[i].base && !sx_probe(&sx_board[i])) - found++; - -#ifdef CONFIG_PCI - { - struct pci_dev *pdev = NULL; - - i = 0; - while (i < SX_NBOARD) { - if (sx_board[i].flags & SX_BOARD_PRESENT) { - i++; - continue; - } - pdev = pci_get_device(PCI_VENDOR_ID_SPECIALIX, - PCI_DEVICE_ID_SPECIALIX_IO8, pdev); - if (!pdev) - break; - - if (pci_enable_device(pdev)) - continue; - - sx_board[i].irq = pdev->irq; - - sx_board[i].base = pci_resource_start(pdev, 2); - - sx_board[i].flags |= SX_BOARD_IS_PCI; - if (!sx_probe(&sx_board[i])) - found++; - } - /* May exit pci_get sequence early with lots of boards */ - if (pdev != NULL) - pci_dev_put(pdev); - } -#endif - - if (!found) { - sx_release_drivers(); - printk(KERN_INFO "sx: No specialix IO8+ boards detected.\n"); - func_exit(); - return -EIO; - } - - func_exit(); - return 0; -} - -static int iobase[SX_NBOARD] = {0,}; -static int irq[SX_NBOARD] = {0,}; - -module_param_array(iobase, int, NULL, 0); -module_param_array(irq, int, NULL, 0); -module_param(sx_debug, int, 0); -module_param(sx_rtscts, int, 0); -module_param(sx_rxfifo, int, 0); - -/* - * You can setup up to 4 boards. - * by specifying "iobase=0xXXX,0xXXX ..." as insmod parameter. - * You should specify the IRQs too in that case "irq=....,...". - * - * More than 4 boards in one computer is not possible, as the card can - * only use 4 different interrupts. - * - */ -static int __init specialix_init_module(void) -{ - int i; - - func_enter(); - - if (iobase[0] || iobase[1] || iobase[2] || iobase[3]) { - for (i = 0; i < SX_NBOARD; i++) { - sx_board[i].base = iobase[i]; - sx_board[i].irq = irq[i]; - sx_board[i].count = 0; - } - } - - func_exit(); - - return specialix_init(); -} - -static void __exit specialix_exit_module(void) -{ - int i; - - func_enter(); - - sx_release_drivers(); - for (i = 0; i < SX_NBOARD; i++) - if (sx_board[i].flags & SX_BOARD_PRESENT) - sx_release_io_range(&sx_board[i]); - func_exit(); -} - -static struct pci_device_id specialx_pci_tbl[] __devinitdata __used = { - { PCI_DEVICE(PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_SPECIALIX_IO8) }, - { } -}; -MODULE_DEVICE_TABLE(pci, specialx_pci_tbl); - -module_init(specialix_init_module); -module_exit(specialix_exit_module); - -MODULE_LICENSE("GPL"); -MODULE_ALIAS_CHARDEV_MAJOR(SPECIALIX_NORMAL_MAJOR); diff --git a/drivers/staging/tty/specialix_io8.h b/drivers/staging/tty/specialix_io8.h deleted file mode 100644 index 1215d7e..0000000 --- a/drivers/staging/tty/specialix_io8.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * linux/drivers/char/specialix_io8.h -- - * Specialix IO8+ multiport serial driver. - * - * Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl) - * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com) - * - * - * Specialix pays for the development and support of this driver. - * Please DO contact io8-linux@specialix.co.uk if you require - * support. - * - * This driver was developed in the BitWizard linux device - * driver service. If you require a linux device driver for your - * product, please contact devices@BitWizard.nl for a quote. - * - * This code is firmly based on the riscom/8 serial driver, - * written by Dmitry Gorodchanin. The specialix IO8+ card - * programming information was obtained from the CL-CD1865 Data - * Book, and Specialix document number 6200059: IO8+ Hardware - * Functional Specification. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be - * useful, but WITHOUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, - * USA. - * */ - -#ifndef __LINUX_SPECIALIX_H -#define __LINUX_SPECIALIX_H - -#include - -#ifdef __KERNEL__ - -/* You can have max 4 ISA cards in one PC, and I recommend not much -more than a few PCI versions of the card. */ - -#define SX_NBOARD 8 - -/* NOTE: Specialix decoder recognizes 4 addresses, but only two are used.... */ -#define SX_IO_SPACE 4 -/* The PCI version decodes 8 addresses, but still only 2 are used. */ -#define SX_PCI_IO_SPACE 8 - -/* eight ports per board. */ -#define SX_NPORT 8 -#define SX_BOARD(line) ((line) / SX_NPORT) -#define SX_PORT(line) ((line) & (SX_NPORT - 1)) - - -#define SX_DATA_REG 0 /* Base+0 : Data register */ -#define SX_ADDR_REG 1 /* base+1 : Address register. */ - -#define MHz *1000000 /* I'm ashamed of myself. */ - -/* On-board oscillator frequency */ -#define SX_OSCFREQ (25 MHz/2) -/* There is a 25MHz crystal on the board, but the chip is in /2 mode */ - - -/* Ticks per sec. Used for setting receiver timeout and break length */ -#define SPECIALIX_TPS 4000 - -/* Yeah, after heavy testing I decided it must be 6. - * Sure, You can change it if needed. - */ -#define SPECIALIX_RXFIFO 6 /* Max. receiver FIFO size (1-8) */ - -#define SPECIALIX_MAGIC 0x0907 - -#define SX_CCR_TIMEOUT 10000 /* CCR timeout. You may need to wait up to - 10 milliseconds before the internal - processor is available again after - you give it a command */ - -#define SX_IOBASE1 0x100 -#define SX_IOBASE2 0x180 -#define SX_IOBASE3 0x250 -#define SX_IOBASE4 0x260 - -struct specialix_board { - unsigned long flags; - unsigned short base; - unsigned char irq; - //signed char count; - int count; - unsigned char DTR; - int reg; - spinlock_t lock; -}; - -#define SX_BOARD_PRESENT 0x00000001 -#define SX_BOARD_ACTIVE 0x00000002 -#define SX_BOARD_IS_PCI 0x00000004 - - -struct specialix_port { - int magic; - struct tty_port port; - int baud_base; - int flags; - int timeout; - unsigned char * xmit_buf; - int custom_divisor; - int xmit_head; - int xmit_tail; - int xmit_cnt; - short wakeup_chars; - short break_length; - unsigned char mark_mask; - unsigned char IER; - unsigned char MSVR; - unsigned char COR2; - unsigned long overrun; - unsigned long hits[10]; - spinlock_t lock; -}; - -#endif /* __KERNEL__ */ -#endif /* __LINUX_SPECIALIX_H */ - - - - - - - - - diff --git a/drivers/staging/tty/stallion.c b/drivers/staging/tty/stallion.c deleted file mode 100644 index 4fff5cd..0000000 --- a/drivers/staging/tty/stallion.c +++ /dev/null @@ -1,4651 +0,0 @@ -/*****************************************************************************/ - -/* - * stallion.c -- stallion multiport serial driver. - * - * Copyright (C) 1996-1999 Stallion Technologies - * Copyright (C) 1994-1996 Greg Ungerer. - * - * This code is loosely based on the Linux serial driver, written by - * Linus Torvalds, Theodore T'so and others. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/*****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -/*****************************************************************************/ - -/* - * Define different board types. Use the standard Stallion "assigned" - * board numbers. Boards supported in this driver are abbreviated as - * EIO = EasyIO and ECH = EasyConnection 8/32. - */ -#define BRD_EASYIO 20 -#define BRD_ECH 21 -#define BRD_ECHMC 22 -#define BRD_ECHPCI 26 -#define BRD_ECH64PCI 27 -#define BRD_EASYIOPCI 28 - -struct stlconf { - unsigned int brdtype; - int ioaddr1; - int ioaddr2; - unsigned long memaddr; - int irq; - int irqtype; -}; - -static unsigned int stl_nrbrds; - -/*****************************************************************************/ - -/* - * Define some important driver characteristics. Device major numbers - * allocated as per Linux Device Registry. - */ -#ifndef STL_SIOMEMMAJOR -#define STL_SIOMEMMAJOR 28 -#endif -#ifndef STL_SERIALMAJOR -#define STL_SERIALMAJOR 24 -#endif -#ifndef STL_CALLOUTMAJOR -#define STL_CALLOUTMAJOR 25 -#endif - -/* - * Set the TX buffer size. Bigger is better, but we don't want - * to chew too much memory with buffers! - */ -#define STL_TXBUFLOW 512 -#define STL_TXBUFSIZE 4096 - -/*****************************************************************************/ - -/* - * Define our local driver identity first. Set up stuff to deal with - * all the local structures required by a serial tty driver. - */ -static char *stl_drvtitle = "Stallion Multiport Serial Driver"; -static char *stl_drvname = "stallion"; -static char *stl_drvversion = "5.6.0"; - -static struct tty_driver *stl_serial; - -/* - * Define a local default termios struct. All ports will be created - * with this termios initially. Basically all it defines is a raw port - * at 9600, 8 data bits, 1 stop bit. - */ -static struct ktermios stl_deftermios = { - .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL), - .c_cc = INIT_C_CC, - .c_ispeed = 9600, - .c_ospeed = 9600, -}; - -/* - * Define global place to put buffer overflow characters. - */ -static char stl_unwanted[SC26198_RXFIFOSIZE]; - -/*****************************************************************************/ - -static DEFINE_MUTEX(stl_brdslock); -static struct stlbrd *stl_brds[STL_MAXBRDS]; - -static const struct tty_port_operations stl_port_ops; - -/* - * Per board state flags. Used with the state field of the board struct. - * Not really much here! - */ -#define BRD_FOUND 0x1 -#define STL_PROBED 0x2 - - -/* - * Define the port structure istate flags. These set of flags are - * modified at interrupt time - so setting and reseting them needs - * to be atomic. Use the bit clear/setting routines for this. - */ -#define ASYI_TXBUSY 1 -#define ASYI_TXLOW 2 -#define ASYI_TXFLOWED 3 - -/* - * Define an array of board names as printable strings. Handy for - * referencing boards when printing trace and stuff. - */ -static char *stl_brdnames[] = { - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - "EasyIO", - "EC8/32-AT", - "EC8/32-MC", - NULL, - NULL, - NULL, - "EC8/32-PCI", - "EC8/64-PCI", - "EasyIO-PCI", -}; - -/*****************************************************************************/ - -/* - * Define some string labels for arguments passed from the module - * load line. These allow for easy board definitions, and easy - * modification of the io, memory and irq resoucres. - */ -static unsigned int stl_nargs; -static char *board0[4]; -static char *board1[4]; -static char *board2[4]; -static char *board3[4]; - -static char **stl_brdsp[] = { - (char **) &board0, - (char **) &board1, - (char **) &board2, - (char **) &board3 -}; - -/* - * Define a set of common board names, and types. This is used to - * parse any module arguments. - */ - -static struct { - char *name; - int type; -} stl_brdstr[] = { - { "easyio", BRD_EASYIO }, - { "eio", BRD_EASYIO }, - { "20", BRD_EASYIO }, - { "ec8/32", BRD_ECH }, - { "ec8/32-at", BRD_ECH }, - { "ec8/32-isa", BRD_ECH }, - { "ech", BRD_ECH }, - { "echat", BRD_ECH }, - { "21", BRD_ECH }, - { "ec8/32-mc", BRD_ECHMC }, - { "ec8/32-mca", BRD_ECHMC }, - { "echmc", BRD_ECHMC }, - { "echmca", BRD_ECHMC }, - { "22", BRD_ECHMC }, - { "ec8/32-pc", BRD_ECHPCI }, - { "ec8/32-pci", BRD_ECHPCI }, - { "26", BRD_ECHPCI }, - { "ec8/64-pc", BRD_ECH64PCI }, - { "ec8/64-pci", BRD_ECH64PCI }, - { "ech-pci", BRD_ECH64PCI }, - { "echpci", BRD_ECH64PCI }, - { "echpc", BRD_ECH64PCI }, - { "27", BRD_ECH64PCI }, - { "easyio-pc", BRD_EASYIOPCI }, - { "easyio-pci", BRD_EASYIOPCI }, - { "eio-pci", BRD_EASYIOPCI }, - { "eiopci", BRD_EASYIOPCI }, - { "28", BRD_EASYIOPCI }, -}; - -/* - * Define the module agruments. - */ - -module_param_array(board0, charp, &stl_nargs, 0); -MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]"); -module_param_array(board1, charp, &stl_nargs, 0); -MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]"); -module_param_array(board2, charp, &stl_nargs, 0); -MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]"); -module_param_array(board3, charp, &stl_nargs, 0); -MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]"); - -/*****************************************************************************/ - -/* - * Hardware ID bits for the EasyIO and ECH boards. These defines apply - * to the directly accessible io ports of these boards (not the uarts - - * they are in cd1400.h and sc26198.h). - */ -#define EIO_8PORTRS 0x04 -#define EIO_4PORTRS 0x05 -#define EIO_8PORTDI 0x00 -#define EIO_8PORTM 0x06 -#define EIO_MK3 0x03 -#define EIO_IDBITMASK 0x07 - -#define EIO_BRDMASK 0xf0 -#define ID_BRD4 0x10 -#define ID_BRD8 0x20 -#define ID_BRD16 0x30 - -#define EIO_INTRPEND 0x08 -#define EIO_INTEDGE 0x00 -#define EIO_INTLEVEL 0x08 -#define EIO_0WS 0x10 - -#define ECH_ID 0xa0 -#define ECH_IDBITMASK 0xe0 -#define ECH_BRDENABLE 0x08 -#define ECH_BRDDISABLE 0x00 -#define ECH_INTENABLE 0x01 -#define ECH_INTDISABLE 0x00 -#define ECH_INTLEVEL 0x02 -#define ECH_INTEDGE 0x00 -#define ECH_INTRPEND 0x01 -#define ECH_BRDRESET 0x01 - -#define ECHMC_INTENABLE 0x01 -#define ECHMC_BRDRESET 0x02 - -#define ECH_PNLSTATUS 2 -#define ECH_PNL16PORT 0x20 -#define ECH_PNLIDMASK 0x07 -#define ECH_PNLXPID 0x40 -#define ECH_PNLINTRPEND 0x80 - -#define ECH_ADDR2MASK 0x1e0 - -/* - * Define the vector mapping bits for the programmable interrupt board - * hardware. These bits encode the interrupt for the board to use - it - * is software selectable (except the EIO-8M). - */ -static unsigned char stl_vecmap[] = { - 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07, - 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03 -}; - -/* - * Lock ordering is that you may not take stallion_lock holding - * brd_lock. - */ - -static spinlock_t brd_lock; /* Guard the board mapping */ -static spinlock_t stallion_lock; /* Guard the tty driver */ - -/* - * Set up enable and disable macros for the ECH boards. They require - * the secondary io address space to be activated and deactivated. - * This way all ECH boards can share their secondary io region. - * If this is an ECH-PCI board then also need to set the page pointer - * to point to the correct page. - */ -#define BRDENABLE(brdnr,pagenr) \ - if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ - outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \ - stl_brds[(brdnr)]->ioctrl); \ - else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \ - outb((pagenr), stl_brds[(brdnr)]->ioctrl); - -#define BRDDISABLE(brdnr) \ - if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ - outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \ - stl_brds[(brdnr)]->ioctrl); - -#define STL_CD1400MAXBAUD 230400 -#define STL_SC26198MAXBAUD 460800 - -#define STL_BAUDBASE 115200 -#define STL_CLOSEDELAY (5 * HZ / 10) - -/*****************************************************************************/ - -/* - * Define the Stallion PCI vendor and device IDs. - */ -#ifndef PCI_VENDOR_ID_STALLION -#define PCI_VENDOR_ID_STALLION 0x124d -#endif -#ifndef PCI_DEVICE_ID_ECHPCI832 -#define PCI_DEVICE_ID_ECHPCI832 0x0000 -#endif -#ifndef PCI_DEVICE_ID_ECHPCI864 -#define PCI_DEVICE_ID_ECHPCI864 0x0002 -#endif -#ifndef PCI_DEVICE_ID_EIOPCI -#define PCI_DEVICE_ID_EIOPCI 0x0003 -#endif - -/* - * Define structure to hold all Stallion PCI boards. - */ - -static struct pci_device_id stl_pcibrds[] = { - { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864), - .driver_data = BRD_ECH64PCI }, - { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI), - .driver_data = BRD_EASYIOPCI }, - { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832), - .driver_data = BRD_ECHPCI }, - { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410), - .driver_data = BRD_ECHPCI }, - { } -}; -MODULE_DEVICE_TABLE(pci, stl_pcibrds); - -/*****************************************************************************/ - -/* - * Define macros to extract a brd/port number from a minor number. - */ -#define MINOR2BRD(min) (((min) & 0xc0) >> 6) -#define MINOR2PORT(min) ((min) & 0x3f) - -/* - * Define a baud rate table that converts termios baud rate selector - * into the actual baud rate value. All baud rate calculations are - * based on the actual baud rate required. - */ -static unsigned int stl_baudrates[] = { - 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, - 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 -}; - -/*****************************************************************************/ - -/* - * Declare all those functions in this driver! - */ - -static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg); -static int stl_brdinit(struct stlbrd *brdp); -static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp); -static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp); - -/* - * CD1400 uart specific handling functions. - */ -static void stl_cd1400setreg(struct stlport *portp, int regnr, int value); -static int stl_cd1400getreg(struct stlport *portp, int regnr); -static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value); -static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp); -static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); -static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp); -static int stl_cd1400getsignals(struct stlport *portp); -static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts); -static void stl_cd1400ccrwait(struct stlport *portp); -static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx); -static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx); -static void stl_cd1400disableintrs(struct stlport *portp); -static void stl_cd1400sendbreak(struct stlport *portp, int len); -static void stl_cd1400flowctrl(struct stlport *portp, int state); -static void stl_cd1400sendflow(struct stlport *portp, int state); -static void stl_cd1400flush(struct stlport *portp); -static int stl_cd1400datastate(struct stlport *portp); -static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase); -static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase); -static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr); -static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr); -static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr); - -static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr); - -/* - * SC26198 uart specific handling functions. - */ -static void stl_sc26198setreg(struct stlport *portp, int regnr, int value); -static int stl_sc26198getreg(struct stlport *portp, int regnr); -static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value); -static int stl_sc26198getglobreg(struct stlport *portp, int regnr); -static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp); -static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); -static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp); -static int stl_sc26198getsignals(struct stlport *portp); -static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts); -static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx); -static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx); -static void stl_sc26198disableintrs(struct stlport *portp); -static void stl_sc26198sendbreak(struct stlport *portp, int len); -static void stl_sc26198flowctrl(struct stlport *portp, int state); -static void stl_sc26198sendflow(struct stlport *portp, int state); -static void stl_sc26198flush(struct stlport *portp); -static int stl_sc26198datastate(struct stlport *portp); -static void stl_sc26198wait(struct stlport *portp); -static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty); -static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase); -static void stl_sc26198txisr(struct stlport *port); -static void stl_sc26198rxisr(struct stlport *port, unsigned int iack); -static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch); -static void stl_sc26198rxbadchars(struct stlport *portp); -static void stl_sc26198otherisr(struct stlport *port, unsigned int iack); - -/*****************************************************************************/ - -/* - * Generic UART support structure. - */ -typedef struct uart { - int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp); - void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); - void (*setport)(struct stlport *portp, struct ktermios *tiosp); - int (*getsignals)(struct stlport *portp); - void (*setsignals)(struct stlport *portp, int dtr, int rts); - void (*enablerxtx)(struct stlport *portp, int rx, int tx); - void (*startrxtx)(struct stlport *portp, int rx, int tx); - void (*disableintrs)(struct stlport *portp); - void (*sendbreak)(struct stlport *portp, int len); - void (*flowctrl)(struct stlport *portp, int state); - void (*sendflow)(struct stlport *portp, int state); - void (*flush)(struct stlport *portp); - int (*datastate)(struct stlport *portp); - void (*intr)(struct stlpanel *panelp, unsigned int iobase); -} uart_t; - -/* - * Define some macros to make calling these functions nice and clean. - */ -#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit) -#define stl_portinit (* ((uart_t *) portp->uartp)->portinit) -#define stl_setport (* ((uart_t *) portp->uartp)->setport) -#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals) -#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals) -#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx) -#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx) -#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs) -#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak) -#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl) -#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow) -#define stl_flush (* ((uart_t *) portp->uartp)->flush) -#define stl_datastate (* ((uart_t *) portp->uartp)->datastate) - -/*****************************************************************************/ - -/* - * CD1400 UART specific data initialization. - */ -static uart_t stl_cd1400uart = { - stl_cd1400panelinit, - stl_cd1400portinit, - stl_cd1400setport, - stl_cd1400getsignals, - stl_cd1400setsignals, - stl_cd1400enablerxtx, - stl_cd1400startrxtx, - stl_cd1400disableintrs, - stl_cd1400sendbreak, - stl_cd1400flowctrl, - stl_cd1400sendflow, - stl_cd1400flush, - stl_cd1400datastate, - stl_cd1400eiointr -}; - -/* - * Define the offsets within the register bank of a cd1400 based panel. - * These io address offsets are common to the EasyIO board as well. - */ -#define EREG_ADDR 0 -#define EREG_DATA 4 -#define EREG_RXACK 5 -#define EREG_TXACK 6 -#define EREG_MDACK 7 - -#define EREG_BANKSIZE 8 - -#define CD1400_CLK 25000000 -#define CD1400_CLK8M 20000000 - -/* - * Define the cd1400 baud rate clocks. These are used when calculating - * what clock and divisor to use for the required baud rate. Also - * define the maximum baud rate allowed, and the default base baud. - */ -static int stl_cd1400clkdivs[] = { - CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4 -}; - -/*****************************************************************************/ - -/* - * SC26198 UART specific data initization. - */ -static uart_t stl_sc26198uart = { - stl_sc26198panelinit, - stl_sc26198portinit, - stl_sc26198setport, - stl_sc26198getsignals, - stl_sc26198setsignals, - stl_sc26198enablerxtx, - stl_sc26198startrxtx, - stl_sc26198disableintrs, - stl_sc26198sendbreak, - stl_sc26198flowctrl, - stl_sc26198sendflow, - stl_sc26198flush, - stl_sc26198datastate, - stl_sc26198intr -}; - -/* - * Define the offsets within the register bank of a sc26198 based panel. - */ -#define XP_DATA 0 -#define XP_ADDR 1 -#define XP_MODID 2 -#define XP_STATUS 2 -#define XP_IACK 3 - -#define XP_BANKSIZE 4 - -/* - * Define the sc26198 baud rate table. Offsets within the table - * represent the actual baud rate selector of sc26198 registers. - */ -static unsigned int sc26198_baudtable[] = { - 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600, - 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200, - 230400, 460800, 921600 -}; - -#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable) - -/*****************************************************************************/ - -/* - * Define the driver info for a user level control device. Used mainly - * to get at port stats - only not using the port device itself. - */ -static const struct file_operations stl_fsiomem = { - .owner = THIS_MODULE, - .unlocked_ioctl = stl_memioctl, - .llseek = noop_llseek, -}; - -static struct class *stallion_class; - -static void stl_cd_change(struct stlport *portp) -{ - unsigned int oldsigs = portp->sigs; - struct tty_struct *tty = tty_port_tty_get(&portp->port); - - if (!tty) - return; - - portp->sigs = stl_getsignals(portp); - - if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0)) - wake_up_interruptible(&portp->port.open_wait); - - if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0)) - if (portp->port.flags & ASYNC_CHECK_CD) - tty_hangup(tty); - tty_kref_put(tty); -} - -/* - * Check for any arguments passed in on the module load command line. - */ - -/*****************************************************************************/ - -/* - * Parse the supplied argument string, into the board conf struct. - */ - -static int __init stl_parsebrd(struct stlconf *confp, char **argp) -{ - char *sp; - unsigned int i; - - pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp); - - if ((argp[0] == NULL) || (*argp[0] == 0)) - return 0; - - for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++) - *sp = tolower(*sp); - - for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++) - if (strcmp(stl_brdstr[i].name, argp[0]) == 0) - break; - - if (i == ARRAY_SIZE(stl_brdstr)) { - printk("STALLION: unknown board name, %s?\n", argp[0]); - return 0; - } - - confp->brdtype = stl_brdstr[i].type; - - i = 1; - if ((argp[i] != NULL) && (*argp[i] != 0)) - confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0); - i++; - if (confp->brdtype == BRD_ECH) { - if ((argp[i] != NULL) && (*argp[i] != 0)) - confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0); - i++; - } - if ((argp[i] != NULL) && (*argp[i] != 0)) - confp->irq = simple_strtoul(argp[i], NULL, 0); - return 1; -} - -/*****************************************************************************/ - -/* - * Allocate a new board structure. Fill out the basic info in it. - */ - -static struct stlbrd *stl_allocbrd(void) -{ - struct stlbrd *brdp; - - brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL); - if (!brdp) { - printk("STALLION: failed to allocate memory (size=%Zd)\n", - sizeof(struct stlbrd)); - return NULL; - } - - brdp->magic = STL_BOARDMAGIC; - return brdp; -} - -/*****************************************************************************/ - -static int stl_activate(struct tty_port *port, struct tty_struct *tty) -{ - struct stlport *portp = container_of(port, struct stlport, port); - if (!portp->tx.buf) { - portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL); - if (!portp->tx.buf) - return -ENOMEM; - portp->tx.head = portp->tx.buf; - portp->tx.tail = portp->tx.buf; - } - stl_setport(portp, tty->termios); - portp->sigs = stl_getsignals(portp); - stl_setsignals(portp, 1, 1); - stl_enablerxtx(portp, 1, 1); - stl_startrxtx(portp, 1, 0); - return 0; -} - -static int stl_open(struct tty_struct *tty, struct file *filp) -{ - struct stlport *portp; - struct stlbrd *brdp; - unsigned int minordev, brdnr, panelnr; - int portnr; - - pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name); - - minordev = tty->index; - brdnr = MINOR2BRD(minordev); - if (brdnr >= stl_nrbrds) - return -ENODEV; - brdp = stl_brds[brdnr]; - if (brdp == NULL) - return -ENODEV; - - minordev = MINOR2PORT(minordev); - for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) { - if (brdp->panels[panelnr] == NULL) - break; - if (minordev < brdp->panels[panelnr]->nrports) { - portnr = minordev; - break; - } - minordev -= brdp->panels[panelnr]->nrports; - } - if (portnr < 0) - return -ENODEV; - - portp = brdp->panels[panelnr]->ports[portnr]; - if (portp == NULL) - return -ENODEV; - - tty->driver_data = portp; - return tty_port_open(&portp->port, tty, filp); - -} - -/*****************************************************************************/ - -static int stl_carrier_raised(struct tty_port *port) -{ - struct stlport *portp = container_of(port, struct stlport, port); - return (portp->sigs & TIOCM_CD) ? 1 : 0; -} - -static void stl_dtr_rts(struct tty_port *port, int on) -{ - struct stlport *portp = container_of(port, struct stlport, port); - /* Takes brd_lock internally */ - stl_setsignals(portp, on, on); -} - -/*****************************************************************************/ - -static void stl_flushbuffer(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_flushbuffer(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - - stl_flush(portp); - tty_wakeup(tty); -} - -/*****************************************************************************/ - -static void stl_waituntilsent(struct tty_struct *tty, int timeout) -{ - struct stlport *portp; - unsigned long tend; - - pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout); - - portp = tty->driver_data; - if (portp == NULL) - return; - - if (timeout == 0) - timeout = HZ; - tend = jiffies + timeout; - - while (stl_datastate(portp)) { - if (signal_pending(current)) - break; - msleep_interruptible(20); - if (time_after_eq(jiffies, tend)) - break; - } -} - -/*****************************************************************************/ - -static void stl_shutdown(struct tty_port *port) -{ - struct stlport *portp = container_of(port, struct stlport, port); - stl_disableintrs(portp); - stl_enablerxtx(portp, 0, 0); - stl_flush(portp); - portp->istate = 0; - if (portp->tx.buf != NULL) { - kfree(portp->tx.buf); - portp->tx.buf = NULL; - portp->tx.head = NULL; - portp->tx.tail = NULL; - } -} - -static void stl_close(struct tty_struct *tty, struct file *filp) -{ - struct stlport*portp; - pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp); - - portp = tty->driver_data; - if(portp == NULL) - return; - tty_port_close(&portp->port, tty, filp); -} - -/*****************************************************************************/ - -/* - * Write routine. Take data and stuff it in to the TX ring queue. - * If transmit interrupts are not running then start them. - */ - -static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count) -{ - struct stlport *portp; - unsigned int len, stlen; - unsigned char *chbuf; - char *head, *tail; - - pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count); - - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->tx.buf == NULL) - return 0; - -/* - * If copying direct from user space we must cater for page faults, - * causing us to "sleep" here for a while. To handle this copy in all - * the data we need now, into a local buffer. Then when we got it all - * copy it into the TX buffer. - */ - chbuf = (unsigned char *) buf; - - head = portp->tx.head; - tail = portp->tx.tail; - if (head >= tail) { - len = STL_TXBUFSIZE - (head - tail) - 1; - stlen = STL_TXBUFSIZE - (head - portp->tx.buf); - } else { - len = tail - head - 1; - stlen = len; - } - - len = min(len, (unsigned int)count); - count = 0; - while (len > 0) { - stlen = min(len, stlen); - memcpy(head, chbuf, stlen); - len -= stlen; - chbuf += stlen; - count += stlen; - head += stlen; - if (head >= (portp->tx.buf + STL_TXBUFSIZE)) { - head = portp->tx.buf; - stlen = tail - head; - } - } - portp->tx.head = head; - - clear_bit(ASYI_TXLOW, &portp->istate); - stl_startrxtx(portp, -1, 1); - - return count; -} - -/*****************************************************************************/ - -static int stl_putchar(struct tty_struct *tty, unsigned char ch) -{ - struct stlport *portp; - unsigned int len; - char *head, *tail; - - pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch); - - portp = tty->driver_data; - if (portp == NULL) - return -EINVAL; - if (portp->tx.buf == NULL) - return -EINVAL; - - head = portp->tx.head; - tail = portp->tx.tail; - - len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head); - len--; - - if (len > 0) { - *head++ = ch; - if (head >= (portp->tx.buf + STL_TXBUFSIZE)) - head = portp->tx.buf; - } - portp->tx.head = head; - return 0; -} - -/*****************************************************************************/ - -/* - * If there are any characters in the buffer then make sure that TX - * interrupts are on and get'em out. Normally used after the putchar - * routine has been called. - */ - -static void stl_flushchars(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_flushchars(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - if (portp->tx.buf == NULL) - return; - - stl_startrxtx(portp, -1, 1); -} - -/*****************************************************************************/ - -static int stl_writeroom(struct tty_struct *tty) -{ - struct stlport *portp; - char *head, *tail; - - pr_debug("stl_writeroom(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->tx.buf == NULL) - return 0; - - head = portp->tx.head; - tail = portp->tx.tail; - return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1); -} - -/*****************************************************************************/ - -/* - * Return number of chars in the TX buffer. Normally we would just - * calculate the number of chars in the buffer and return that, but if - * the buffer is empty and TX interrupts are still on then we return - * that the buffer still has 1 char in it. This way whoever called us - * will not think that ALL chars have drained - since the UART still - * must have some chars in it (we are busy after all). - */ - -static int stl_charsinbuffer(struct tty_struct *tty) -{ - struct stlport *portp; - unsigned int size; - char *head, *tail; - - pr_debug("stl_charsinbuffer(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return 0; - if (portp->tx.buf == NULL) - return 0; - - head = portp->tx.head; - tail = portp->tx.tail; - size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); - if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate)) - size = 1; - return size; -} - -/*****************************************************************************/ - -/* - * Generate the serial struct info. - */ - -static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp) -{ - struct serial_struct sio; - struct stlbrd *brdp; - - pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp); - - memset(&sio, 0, sizeof(struct serial_struct)); - - mutex_lock(&portp->port.mutex); - sio.line = portp->portnr; - sio.port = portp->ioaddr; - sio.flags = portp->port.flags; - sio.baud_base = portp->baud_base; - sio.close_delay = portp->close_delay; - sio.closing_wait = portp->closing_wait; - sio.custom_divisor = portp->custom_divisor; - sio.hub6 = 0; - if (portp->uartp == &stl_cd1400uart) { - sio.type = PORT_CIRRUS; - sio.xmit_fifo_size = CD1400_TXFIFOSIZE; - } else { - sio.type = PORT_UNKNOWN; - sio.xmit_fifo_size = SC26198_TXFIFOSIZE; - } - - brdp = stl_brds[portp->brdnr]; - if (brdp != NULL) - sio.irq = brdp->irq; - mutex_unlock(&portp->port.mutex); - - return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Set port according to the serial struct info. - * At this point we do not do any auto-configure stuff, so we will - * just quietly ignore any requests to change irq, etc. - */ - -static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp) -{ - struct stlport * portp = tty->driver_data; - struct serial_struct sio; - - pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp); - - if (copy_from_user(&sio, sp, sizeof(struct serial_struct))) - return -EFAULT; - mutex_lock(&portp->port.mutex); - if (!capable(CAP_SYS_ADMIN)) { - if ((sio.baud_base != portp->baud_base) || - (sio.close_delay != portp->close_delay) || - ((sio.flags & ~ASYNC_USR_MASK) != - (portp->port.flags & ~ASYNC_USR_MASK))) { - mutex_unlock(&portp->port.mutex); - return -EPERM; - } - } - - portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) | - (sio.flags & ASYNC_USR_MASK); - portp->baud_base = sio.baud_base; - portp->close_delay = sio.close_delay; - portp->closing_wait = sio.closing_wait; - portp->custom_divisor = sio.custom_divisor; - mutex_unlock(&portp->port.mutex); - stl_setport(portp, tty->termios); - return 0; -} - -/*****************************************************************************/ - -static int stl_tiocmget(struct tty_struct *tty) -{ - struct stlport *portp; - - portp = tty->driver_data; - if (portp == NULL) - return -ENODEV; - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - - return stl_getsignals(portp); -} - -static int stl_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct stlport *portp; - int rts = -1, dtr = -1; - - portp = tty->driver_data; - if (portp == NULL) - return -ENODEV; - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - - if (set & TIOCM_RTS) - rts = 1; - if (set & TIOCM_DTR) - dtr = 1; - if (clear & TIOCM_RTS) - rts = 0; - if (clear & TIOCM_DTR) - dtr = 0; - - stl_setsignals(portp, dtr, rts); - return 0; -} - -static int stl_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) -{ - struct stlport *portp; - int rc; - void __user *argp = (void __user *)arg; - - pr_debug("stl_ioctl(tty=%p,cmd=%x,arg=%lx)\n", tty, cmd, arg); - - portp = tty->driver_data; - if (portp == NULL) - return -ENODEV; - - if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS)) - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - - rc = 0; - - switch (cmd) { - case TIOCGSERIAL: - rc = stl_getserial(portp, argp); - break; - case TIOCSSERIAL: - rc = stl_setserial(tty, argp); - break; - case COM_GETPORTSTATS: - rc = stl_getportstats(tty, portp, argp); - break; - case COM_CLRPORTSTATS: - rc = stl_clrportstats(portp, argp); - break; - case TIOCSERCONFIG: - case TIOCSERGWILD: - case TIOCSERSWILD: - case TIOCSERGETLSR: - case TIOCSERGSTRUCT: - case TIOCSERGETMULTI: - case TIOCSERSETMULTI: - default: - rc = -ENOIOCTLCMD; - break; - } - return rc; -} - -/*****************************************************************************/ - -/* - * Start the transmitter again. Just turn TX interrupts back on. - */ - -static void stl_start(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_start(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - stl_startrxtx(portp, -1, 1); -} - -/*****************************************************************************/ - -static void stl_settermios(struct tty_struct *tty, struct ktermios *old) -{ - struct stlport *portp; - struct ktermios *tiosp; - - pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old); - - portp = tty->driver_data; - if (portp == NULL) - return; - - tiosp = tty->termios; - if ((tiosp->c_cflag == old->c_cflag) && - (tiosp->c_iflag == old->c_iflag)) - return; - - stl_setport(portp, tiosp); - stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0), - -1); - if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) { - tty->hw_stopped = 0; - stl_start(tty); - } - if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL)) - wake_up_interruptible(&portp->port.open_wait); -} - -/*****************************************************************************/ - -/* - * Attempt to flow control who ever is sending us data. Based on termios - * settings use software or/and hardware flow control. - */ - -static void stl_throttle(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_throttle(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - stl_flowctrl(portp, 0); -} - -/*****************************************************************************/ - -/* - * Unflow control the device sending us data... - */ - -static void stl_unthrottle(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_unthrottle(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - stl_flowctrl(portp, 1); -} - -/*****************************************************************************/ - -/* - * Stop the transmitter. Basically to do this we will just turn TX - * interrupts off. - */ - -static void stl_stop(struct tty_struct *tty) -{ - struct stlport *portp; - - pr_debug("stl_stop(tty=%p)\n", tty); - - portp = tty->driver_data; - if (portp == NULL) - return; - stl_startrxtx(portp, -1, 0); -} - -/*****************************************************************************/ - -/* - * Hangup this port. This is pretty much like closing the port, only - * a little more brutal. No waiting for data to drain. Shutdown the - * port and maybe drop signals. - */ - -static void stl_hangup(struct tty_struct *tty) -{ - struct stlport *portp = tty->driver_data; - pr_debug("stl_hangup(tty=%p)\n", tty); - - if (portp == NULL) - return; - tty_port_hangup(&portp->port); -} - -/*****************************************************************************/ - -static int stl_breakctl(struct tty_struct *tty, int state) -{ - struct stlport *portp; - - pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state); - - portp = tty->driver_data; - if (portp == NULL) - return -EINVAL; - - stl_sendbreak(portp, ((state == -1) ? 1 : 2)); - return 0; -} - -/*****************************************************************************/ - -static void stl_sendxchar(struct tty_struct *tty, char ch) -{ - struct stlport *portp; - - pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch); - - portp = tty->driver_data; - if (portp == NULL) - return; - - if (ch == STOP_CHAR(tty)) - stl_sendflow(portp, 0); - else if (ch == START_CHAR(tty)) - stl_sendflow(portp, 1); - else - stl_putchar(tty, ch); -} - -static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr) -{ - int sigs; - char sep; - - seq_printf(m, "%d: uart:%s tx:%d rx:%d", - portnr, (portp->hwid == 1) ? "SC26198" : "CD1400", - (int) portp->stats.txtotal, (int) portp->stats.rxtotal); - - if (portp->stats.rxframing) - seq_printf(m, " fe:%d", (int) portp->stats.rxframing); - if (portp->stats.rxparity) - seq_printf(m, " pe:%d", (int) portp->stats.rxparity); - if (portp->stats.rxbreaks) - seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks); - if (portp->stats.rxoverrun) - seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun); - - sigs = stl_getsignals(portp); - sep = ' '; - if (sigs & TIOCM_RTS) { - seq_printf(m, "%c%s", sep, "RTS"); - sep = '|'; - } - if (sigs & TIOCM_CTS) { - seq_printf(m, "%c%s", sep, "CTS"); - sep = '|'; - } - if (sigs & TIOCM_DTR) { - seq_printf(m, "%c%s", sep, "DTR"); - sep = '|'; - } - if (sigs & TIOCM_CD) { - seq_printf(m, "%c%s", sep, "DCD"); - sep = '|'; - } - if (sigs & TIOCM_DSR) { - seq_printf(m, "%c%s", sep, "DSR"); - sep = '|'; - } - seq_putc(m, '\n'); -} - -/*****************************************************************************/ - -/* - * Port info, read from the /proc file system. - */ - -static int stl_proc_show(struct seq_file *m, void *v) -{ - struct stlbrd *brdp; - struct stlpanel *panelp; - struct stlport *portp; - unsigned int brdnr, panelnr, portnr; - int totalport; - - totalport = 0; - - seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion); - -/* - * We scan through for each board, panel and port. The offset is - * calculated on the fly, and irrelevant ports are skipped. - */ - for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) { - brdp = stl_brds[brdnr]; - if (brdp == NULL) - continue; - if (brdp->state == 0) - continue; - - totalport = brdnr * STL_MAXPORTS; - for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) { - panelp = brdp->panels[panelnr]; - if (panelp == NULL) - continue; - - for (portnr = 0; portnr < panelp->nrports; portnr++, - totalport++) { - portp = panelp->ports[portnr]; - if (portp == NULL) - continue; - stl_portinfo(m, portp, totalport); - } - } - } - return 0; -} - -static int stl_proc_open(struct inode *inode, struct file *file) -{ - return single_open(file, stl_proc_show, NULL); -} - -static const struct file_operations stl_proc_fops = { - .owner = THIS_MODULE, - .open = stl_proc_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -/*****************************************************************************/ - -/* - * All board interrupts are vectored through here first. This code then - * calls off to the approrpriate board interrupt handlers. - */ - -static irqreturn_t stl_intr(int irq, void *dev_id) -{ - struct stlbrd *brdp = dev_id; - - pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq); - - return IRQ_RETVAL((* brdp->isr)(brdp)); -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for EasyIO board types. - */ - -static int stl_eiointr(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int iobase; - int handled = 0; - - spin_lock(&brd_lock); - panelp = brdp->panels[0]; - iobase = panelp->iobase; - while (inb(brdp->iostatus) & EIO_INTRPEND) { - handled = 1; - (* panelp->isr)(panelp, iobase); - } - spin_unlock(&brd_lock); - return handled; -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for ECH-AT board types. - */ - -static int stl_echatintr(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int ioaddr, bnknr; - int handled = 0; - - outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); - - while (inb(brdp->iostatus) & ECH_INTRPEND) { - handled = 1; - for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { - ioaddr = brdp->bnkstataddr[bnknr]; - if (inb(ioaddr) & ECH_PNLINTRPEND) { - panelp = brdp->bnk2panel[bnknr]; - (* panelp->isr)(panelp, (ioaddr & 0xfffc)); - } - } - } - - outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); - - return handled; -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for ECH-MCA board types. - */ - -static int stl_echmcaintr(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int ioaddr, bnknr; - int handled = 0; - - while (inb(brdp->iostatus) & ECH_INTRPEND) { - handled = 1; - for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { - ioaddr = brdp->bnkstataddr[bnknr]; - if (inb(ioaddr) & ECH_PNLINTRPEND) { - panelp = brdp->bnk2panel[bnknr]; - (* panelp->isr)(panelp, (ioaddr & 0xfffc)); - } - } - } - return handled; -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for ECH-PCI board types. - */ - -static int stl_echpciintr(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int ioaddr, bnknr, recheck; - int handled = 0; - - while (1) { - recheck = 0; - for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { - outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl); - ioaddr = brdp->bnkstataddr[bnknr]; - if (inb(ioaddr) & ECH_PNLINTRPEND) { - panelp = brdp->bnk2panel[bnknr]; - (* panelp->isr)(panelp, (ioaddr & 0xfffc)); - recheck++; - handled = 1; - } - } - if (! recheck) - break; - } - return handled; -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for ECH-8/64-PCI board types. - */ - -static int stl_echpci64intr(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int ioaddr, bnknr; - int handled = 0; - - while (inb(brdp->ioctrl) & 0x1) { - handled = 1; - for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { - ioaddr = brdp->bnkstataddr[bnknr]; - if (inb(ioaddr) & ECH_PNLINTRPEND) { - panelp = brdp->bnk2panel[bnknr]; - (* panelp->isr)(panelp, (ioaddr & 0xfffc)); - } - } - } - - return handled; -} - -/*****************************************************************************/ - -/* - * Initialize all the ports on a panel. - */ - -static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp) -{ - struct stlport *portp; - unsigned int i; - int chipmask; - - pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp); - - chipmask = stl_panelinit(brdp, panelp); - -/* - * All UART's are initialized (if found!). Now go through and setup - * each ports data structures. - */ - for (i = 0; i < panelp->nrports; i++) { - portp = kzalloc(sizeof(struct stlport), GFP_KERNEL); - if (!portp) { - printk("STALLION: failed to allocate memory " - "(size=%Zd)\n", sizeof(struct stlport)); - break; - } - tty_port_init(&portp->port); - portp->port.ops = &stl_port_ops; - portp->magic = STL_PORTMAGIC; - portp->portnr = i; - portp->brdnr = panelp->brdnr; - portp->panelnr = panelp->panelnr; - portp->uartp = panelp->uartp; - portp->clk = brdp->clk; - portp->baud_base = STL_BAUDBASE; - portp->close_delay = STL_CLOSEDELAY; - portp->closing_wait = 30 * HZ; - init_waitqueue_head(&portp->port.open_wait); - init_waitqueue_head(&portp->port.close_wait); - portp->stats.brd = portp->brdnr; - portp->stats.panel = portp->panelnr; - portp->stats.port = portp->portnr; - panelp->ports[i] = portp; - stl_portinit(brdp, panelp, portp); - } - - return 0; -} - -static void stl_cleanup_panels(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - struct stlport *portp; - unsigned int j, k; - struct tty_struct *tty; - - for (j = 0; j < STL_MAXPANELS; j++) { - panelp = brdp->panels[j]; - if (panelp == NULL) - continue; - for (k = 0; k < STL_PORTSPERPANEL; k++) { - portp = panelp->ports[k]; - if (portp == NULL) - continue; - tty = tty_port_tty_get(&portp->port); - if (tty != NULL) { - stl_hangup(tty); - tty_kref_put(tty); - } - kfree(portp->tx.buf); - kfree(portp); - } - kfree(panelp); - } -} - -/*****************************************************************************/ - -/* - * Try to find and initialize an EasyIO board. - */ - -static int __devinit stl_initeio(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int status; - char *name; - int retval; - - pr_debug("stl_initeio(brdp=%p)\n", brdp); - - brdp->ioctrl = brdp->ioaddr1 + 1; - brdp->iostatus = brdp->ioaddr1 + 2; - - status = inb(brdp->iostatus); - if ((status & EIO_IDBITMASK) == EIO_MK3) - brdp->ioctrl++; - -/* - * Handle board specific stuff now. The real difference is PCI - * or not PCI. - */ - if (brdp->brdtype == BRD_EASYIOPCI) { - brdp->iosize1 = 0x80; - brdp->iosize2 = 0x80; - name = "serial(EIO-PCI)"; - outb(0x41, (brdp->ioaddr2 + 0x4c)); - } else { - brdp->iosize1 = 8; - name = "serial(EIO)"; - if ((brdp->irq < 0) || (brdp->irq > 15) || - (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { - printk("STALLION: invalid irq=%d for brd=%d\n", - brdp->irq, brdp->brdnr); - retval = -EINVAL; - goto err; - } - outb((stl_vecmap[brdp->irq] | EIO_0WS | - ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)), - brdp->ioctrl); - } - - retval = -EBUSY; - if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { - printk(KERN_WARNING "STALLION: Warning, board %d I/O address " - "%x conflicts with another device\n", brdp->brdnr, - brdp->ioaddr1); - goto err; - } - - if (brdp->iosize2 > 0) - if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { - printk(KERN_WARNING "STALLION: Warning, board %d I/O " - "address %x conflicts with another device\n", - brdp->brdnr, brdp->ioaddr2); - printk(KERN_WARNING "STALLION: Warning, also " - "releasing board %d I/O address %x \n", - brdp->brdnr, brdp->ioaddr1); - goto err_rel1; - } - -/* - * Everything looks OK, so let's go ahead and probe for the hardware. - */ - brdp->clk = CD1400_CLK; - brdp->isr = stl_eiointr; - - retval = -ENODEV; - switch (status & EIO_IDBITMASK) { - case EIO_8PORTM: - brdp->clk = CD1400_CLK8M; - /* fall thru */ - case EIO_8PORTRS: - case EIO_8PORTDI: - brdp->nrports = 8; - break; - case EIO_4PORTRS: - brdp->nrports = 4; - break; - case EIO_MK3: - switch (status & EIO_BRDMASK) { - case ID_BRD4: - brdp->nrports = 4; - break; - case ID_BRD8: - brdp->nrports = 8; - break; - case ID_BRD16: - brdp->nrports = 16; - break; - default: - goto err_rel2; - } - break; - default: - goto err_rel2; - } - -/* - * We have verified that the board is actually present, so now we - * can complete the setup. - */ - - panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); - if (!panelp) { - printk(KERN_WARNING "STALLION: failed to allocate memory " - "(size=%Zd)\n", sizeof(struct stlpanel)); - retval = -ENOMEM; - goto err_rel2; - } - - panelp->magic = STL_PANELMAGIC; - panelp->brdnr = brdp->brdnr; - panelp->panelnr = 0; - panelp->nrports = brdp->nrports; - panelp->iobase = brdp->ioaddr1; - panelp->hwid = status; - if ((status & EIO_IDBITMASK) == EIO_MK3) { - panelp->uartp = &stl_sc26198uart; - panelp->isr = stl_sc26198intr; - } else { - panelp->uartp = &stl_cd1400uart; - panelp->isr = stl_cd1400eiointr; - } - - brdp->panels[0] = panelp; - brdp->nrpanels = 1; - brdp->state |= BRD_FOUND; - brdp->hwid = status; - if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { - printk("STALLION: failed to register interrupt " - "routine for %s irq=%d\n", name, brdp->irq); - retval = -ENODEV; - goto err_fr; - } - - return 0; -err_fr: - stl_cleanup_panels(brdp); -err_rel2: - if (brdp->iosize2 > 0) - release_region(brdp->ioaddr2, brdp->iosize2); -err_rel1: - release_region(brdp->ioaddr1, brdp->iosize1); -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Try to find an ECH board and initialize it. This code is capable of - * dealing with all types of ECH board. - */ - -static int __devinit stl_initech(struct stlbrd *brdp) -{ - struct stlpanel *panelp; - unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i; - int retval; - char *name; - - pr_debug("stl_initech(brdp=%p)\n", brdp); - - status = 0; - conflict = 0; - -/* - * Set up the initial board register contents for boards. This varies a - * bit between the different board types. So we need to handle each - * separately. Also do a check that the supplied IRQ is good. - */ - switch (brdp->brdtype) { - - case BRD_ECH: - brdp->isr = stl_echatintr; - brdp->ioctrl = brdp->ioaddr1 + 1; - brdp->iostatus = brdp->ioaddr1 + 1; - status = inb(brdp->iostatus); - if ((status & ECH_IDBITMASK) != ECH_ID) { - retval = -ENODEV; - goto err; - } - if ((brdp->irq < 0) || (brdp->irq > 15) || - (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { - printk("STALLION: invalid irq=%d for brd=%d\n", - brdp->irq, brdp->brdnr); - retval = -EINVAL; - goto err; - } - status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1); - status |= (stl_vecmap[brdp->irq] << 1); - outb((status | ECH_BRDRESET), brdp->ioaddr1); - brdp->ioctrlval = ECH_INTENABLE | - ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE); - for (i = 0; i < 10; i++) - outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); - brdp->iosize1 = 2; - brdp->iosize2 = 32; - name = "serial(EC8/32)"; - outb(status, brdp->ioaddr1); - break; - - case BRD_ECHMC: - brdp->isr = stl_echmcaintr; - brdp->ioctrl = brdp->ioaddr1 + 0x20; - brdp->iostatus = brdp->ioctrl; - status = inb(brdp->iostatus); - if ((status & ECH_IDBITMASK) != ECH_ID) { - retval = -ENODEV; - goto err; - } - if ((brdp->irq < 0) || (brdp->irq > 15) || - (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { - printk("STALLION: invalid irq=%d for brd=%d\n", - brdp->irq, brdp->brdnr); - retval = -EINVAL; - goto err; - } - outb(ECHMC_BRDRESET, brdp->ioctrl); - outb(ECHMC_INTENABLE, brdp->ioctrl); - brdp->iosize1 = 64; - name = "serial(EC8/32-MC)"; - break; - - case BRD_ECHPCI: - brdp->isr = stl_echpciintr; - brdp->ioctrl = brdp->ioaddr1 + 2; - brdp->iosize1 = 4; - brdp->iosize2 = 8; - name = "serial(EC8/32-PCI)"; - break; - - case BRD_ECH64PCI: - brdp->isr = stl_echpci64intr; - brdp->ioctrl = brdp->ioaddr2 + 0x40; - outb(0x43, (brdp->ioaddr1 + 0x4c)); - brdp->iosize1 = 0x80; - brdp->iosize2 = 0x80; - name = "serial(EC8/64-PCI)"; - break; - - default: - printk("STALLION: unknown board type=%d\n", brdp->brdtype); - retval = -EINVAL; - goto err; - } - -/* - * Check boards for possible IO address conflicts and return fail status - * if an IO conflict found. - */ - retval = -EBUSY; - if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { - printk(KERN_WARNING "STALLION: Warning, board %d I/O address " - "%x conflicts with another device\n", brdp->brdnr, - brdp->ioaddr1); - goto err; - } - - if (brdp->iosize2 > 0) - if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { - printk(KERN_WARNING "STALLION: Warning, board %d I/O " - "address %x conflicts with another device\n", - brdp->brdnr, brdp->ioaddr2); - printk(KERN_WARNING "STALLION: Warning, also " - "releasing board %d I/O address %x \n", - brdp->brdnr, brdp->ioaddr1); - goto err_rel1; - } - -/* - * Scan through the secondary io address space looking for panels. - * As we find'em allocate and initialize panel structures for each. - */ - brdp->clk = CD1400_CLK; - brdp->hwid = status; - - ioaddr = brdp->ioaddr2; - banknr = 0; - panelnr = 0; - nxtid = 0; - - for (i = 0; i < STL_MAXPANELS; i++) { - if (brdp->brdtype == BRD_ECHPCI) { - outb(nxtid, brdp->ioctrl); - ioaddr = brdp->ioaddr2; - } - status = inb(ioaddr + ECH_PNLSTATUS); - if ((status & ECH_PNLIDMASK) != nxtid) - break; - panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); - if (!panelp) { - printk("STALLION: failed to allocate memory " - "(size=%Zd)\n", sizeof(struct stlpanel)); - retval = -ENOMEM; - goto err_fr; - } - panelp->magic = STL_PANELMAGIC; - panelp->brdnr = brdp->brdnr; - panelp->panelnr = panelnr; - panelp->iobase = ioaddr; - panelp->pagenr = nxtid; - panelp->hwid = status; - brdp->bnk2panel[banknr] = panelp; - brdp->bnkpageaddr[banknr] = nxtid; - brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS; - - if (status & ECH_PNLXPID) { - panelp->uartp = &stl_sc26198uart; - panelp->isr = stl_sc26198intr; - if (status & ECH_PNL16PORT) { - panelp->nrports = 16; - brdp->bnk2panel[banknr] = panelp; - brdp->bnkpageaddr[banknr] = nxtid; - brdp->bnkstataddr[banknr++] = ioaddr + 4 + - ECH_PNLSTATUS; - } else - panelp->nrports = 8; - } else { - panelp->uartp = &stl_cd1400uart; - panelp->isr = stl_cd1400echintr; - if (status & ECH_PNL16PORT) { - panelp->nrports = 16; - panelp->ackmask = 0x80; - if (brdp->brdtype != BRD_ECHPCI) - ioaddr += EREG_BANKSIZE; - brdp->bnk2panel[banknr] = panelp; - brdp->bnkpageaddr[banknr] = ++nxtid; - brdp->bnkstataddr[banknr++] = ioaddr + - ECH_PNLSTATUS; - } else { - panelp->nrports = 8; - panelp->ackmask = 0xc0; - } - } - - nxtid++; - ioaddr += EREG_BANKSIZE; - brdp->nrports += panelp->nrports; - brdp->panels[panelnr++] = panelp; - if ((brdp->brdtype != BRD_ECHPCI) && - (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) { - retval = -EINVAL; - goto err_fr; - } - } - - brdp->nrpanels = panelnr; - brdp->nrbnks = banknr; - if (brdp->brdtype == BRD_ECH) - outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); - - brdp->state |= BRD_FOUND; - if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { - printk("STALLION: failed to register interrupt " - "routine for %s irq=%d\n", name, brdp->irq); - retval = -ENODEV; - goto err_fr; - } - - return 0; -err_fr: - stl_cleanup_panels(brdp); - if (brdp->iosize2 > 0) - release_region(brdp->ioaddr2, brdp->iosize2); -err_rel1: - release_region(brdp->ioaddr1, brdp->iosize1); -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Initialize and configure the specified board. - * Scan through all the boards in the configuration and see what we - * can find. Handle EIO and the ECH boards a little differently here - * since the initial search and setup is very different. - */ - -static int __devinit stl_brdinit(struct stlbrd *brdp) -{ - int i, retval; - - pr_debug("stl_brdinit(brdp=%p)\n", brdp); - - switch (brdp->brdtype) { - case BRD_EASYIO: - case BRD_EASYIOPCI: - retval = stl_initeio(brdp); - if (retval) - goto err; - break; - case BRD_ECH: - case BRD_ECHMC: - case BRD_ECHPCI: - case BRD_ECH64PCI: - retval = stl_initech(brdp); - if (retval) - goto err; - break; - default: - printk("STALLION: board=%d is unknown board type=%d\n", - brdp->brdnr, brdp->brdtype); - retval = -ENODEV; - goto err; - } - - if ((brdp->state & BRD_FOUND) == 0) { - printk("STALLION: %s board not found, board=%d io=%x irq=%d\n", - stl_brdnames[brdp->brdtype], brdp->brdnr, - brdp->ioaddr1, brdp->irq); - goto err_free; - } - - for (i = 0; i < STL_MAXPANELS; i++) - if (brdp->panels[i] != NULL) - stl_initports(brdp, brdp->panels[i]); - - printk("STALLION: %s found, board=%d io=%x irq=%d " - "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype], - brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels, - brdp->nrports); - - return 0; -err_free: - free_irq(brdp->irq, brdp); - - stl_cleanup_panels(brdp); - - release_region(brdp->ioaddr1, brdp->iosize1); - if (brdp->iosize2 > 0) - release_region(brdp->ioaddr2, brdp->iosize2); -err: - return retval; -} - -/*****************************************************************************/ - -/* - * Find the next available board number that is free. - */ - -static int __devinit stl_getbrdnr(void) -{ - unsigned int i; - - for (i = 0; i < STL_MAXBRDS; i++) - if (stl_brds[i] == NULL) { - if (i >= stl_nrbrds) - stl_nrbrds = i + 1; - return i; - } - - return -1; -} - -/*****************************************************************************/ -/* - * We have a Stallion board. Allocate a board structure and - * initialize it. Read its IO and IRQ resources from PCI - * configuration space. - */ - -static int __devinit stl_pciprobe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - struct stlbrd *brdp; - unsigned int i, brdtype = ent->driver_data; - int brdnr, retval = -ENODEV; - - if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) - goto err; - - retval = pci_enable_device(pdev); - if (retval) - goto err; - brdp = stl_allocbrd(); - if (brdp == NULL) { - retval = -ENOMEM; - goto err; - } - mutex_lock(&stl_brdslock); - brdnr = stl_getbrdnr(); - if (brdnr < 0) { - dev_err(&pdev->dev, "too many boards found, " - "maximum supported %d\n", STL_MAXBRDS); - mutex_unlock(&stl_brdslock); - retval = -ENODEV; - goto err_fr; - } - brdp->brdnr = (unsigned int)brdnr; - stl_brds[brdp->brdnr] = brdp; - mutex_unlock(&stl_brdslock); - - brdp->brdtype = brdtype; - brdp->state |= STL_PROBED; - -/* - * We have all resources from the board, so let's setup the actual - * board structure now. - */ - switch (brdtype) { - case BRD_ECHPCI: - brdp->ioaddr2 = pci_resource_start(pdev, 0); - brdp->ioaddr1 = pci_resource_start(pdev, 1); - break; - case BRD_ECH64PCI: - brdp->ioaddr2 = pci_resource_start(pdev, 2); - brdp->ioaddr1 = pci_resource_start(pdev, 1); - break; - case BRD_EASYIOPCI: - brdp->ioaddr1 = pci_resource_start(pdev, 2); - brdp->ioaddr2 = pci_resource_start(pdev, 1); - break; - default: - dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype); - break; - } - - brdp->irq = pdev->irq; - retval = stl_brdinit(brdp); - if (retval) - goto err_null; - - pci_set_drvdata(pdev, brdp); - - for (i = 0; i < brdp->nrports; i++) - tty_register_device(stl_serial, - brdp->brdnr * STL_MAXPORTS + i, &pdev->dev); - - return 0; -err_null: - stl_brds[brdp->brdnr] = NULL; -err_fr: - kfree(brdp); -err: - return retval; -} - -static void __devexit stl_pciremove(struct pci_dev *pdev) -{ - struct stlbrd *brdp = pci_get_drvdata(pdev); - unsigned int i; - - free_irq(brdp->irq, brdp); - - stl_cleanup_panels(brdp); - - release_region(brdp->ioaddr1, brdp->iosize1); - if (brdp->iosize2 > 0) - release_region(brdp->ioaddr2, brdp->iosize2); - - for (i = 0; i < brdp->nrports; i++) - tty_unregister_device(stl_serial, - brdp->brdnr * STL_MAXPORTS + i); - - stl_brds[brdp->brdnr] = NULL; - kfree(brdp); -} - -static struct pci_driver stl_pcidriver = { - .name = "stallion", - .id_table = stl_pcibrds, - .probe = stl_pciprobe, - .remove = __devexit_p(stl_pciremove) -}; - -/*****************************************************************************/ - -/* - * Return the board stats structure to user app. - */ - -static int stl_getbrdstats(combrd_t __user *bp) -{ - combrd_t stl_brdstats; - struct stlbrd *brdp; - struct stlpanel *panelp; - unsigned int i; - - if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t))) - return -EFAULT; - if (stl_brdstats.brd >= STL_MAXBRDS) - return -ENODEV; - brdp = stl_brds[stl_brdstats.brd]; - if (brdp == NULL) - return -ENODEV; - - memset(&stl_brdstats, 0, sizeof(combrd_t)); - stl_brdstats.brd = brdp->brdnr; - stl_brdstats.type = brdp->brdtype; - stl_brdstats.hwid = brdp->hwid; - stl_brdstats.state = brdp->state; - stl_brdstats.ioaddr = brdp->ioaddr1; - stl_brdstats.ioaddr2 = brdp->ioaddr2; - stl_brdstats.irq = brdp->irq; - stl_brdstats.nrpanels = brdp->nrpanels; - stl_brdstats.nrports = brdp->nrports; - for (i = 0; i < brdp->nrpanels; i++) { - panelp = brdp->panels[i]; - stl_brdstats.panels[i].panel = i; - stl_brdstats.panels[i].hwid = panelp->hwid; - stl_brdstats.panels[i].nrports = panelp->nrports; - } - - return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Resolve the referenced port number into a port struct pointer. - */ - -static struct stlport *stl_getport(int brdnr, int panelnr, int portnr) -{ - struct stlbrd *brdp; - struct stlpanel *panelp; - - if (brdnr < 0 || brdnr >= STL_MAXBRDS) - return NULL; - brdp = stl_brds[brdnr]; - if (brdp == NULL) - return NULL; - if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels) - return NULL; - panelp = brdp->panels[panelnr]; - if (panelp == NULL) - return NULL; - if (portnr < 0 || (unsigned int)portnr >= panelp->nrports) - return NULL; - return panelp->ports[portnr]; -} - -/*****************************************************************************/ - -/* - * Return the port stats structure to user app. A NULL port struct - * pointer passed in means that we need to find out from the app - * what port to get stats for (used through board control device). - */ - -static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp) -{ - comstats_t stl_comstats; - unsigned char *head, *tail; - unsigned long flags; - - if (!portp) { - if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) - return -EFAULT; - portp = stl_getport(stl_comstats.brd, stl_comstats.panel, - stl_comstats.port); - if (portp == NULL) - return -ENODEV; - } - - mutex_lock(&portp->port.mutex); - portp->stats.state = portp->istate; - portp->stats.flags = portp->port.flags; - portp->stats.hwid = portp->hwid; - - portp->stats.ttystate = 0; - portp->stats.cflags = 0; - portp->stats.iflags = 0; - portp->stats.oflags = 0; - portp->stats.lflags = 0; - portp->stats.rxbuffered = 0; - - spin_lock_irqsave(&stallion_lock, flags); - if (tty != NULL && portp->port.tty == tty) { - portp->stats.ttystate = tty->flags; - /* No longer available as a statistic */ - portp->stats.rxbuffered = 1; /*tty->flip.count; */ - if (tty->termios != NULL) { - portp->stats.cflags = tty->termios->c_cflag; - portp->stats.iflags = tty->termios->c_iflag; - portp->stats.oflags = tty->termios->c_oflag; - portp->stats.lflags = tty->termios->c_lflag; - } - } - spin_unlock_irqrestore(&stallion_lock, flags); - - head = portp->tx.head; - tail = portp->tx.tail; - portp->stats.txbuffered = (head >= tail) ? (head - tail) : - (STL_TXBUFSIZE - (tail - head)); - - portp->stats.signals = (unsigned long) stl_getsignals(portp); - mutex_unlock(&portp->port.mutex); - - return copy_to_user(cp, &portp->stats, - sizeof(comstats_t)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Clear the port stats structure. We also return it zeroed out... - */ - -static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp) -{ - comstats_t stl_comstats; - - if (!portp) { - if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) - return -EFAULT; - portp = stl_getport(stl_comstats.brd, stl_comstats.panel, - stl_comstats.port); - if (portp == NULL) - return -ENODEV; - } - - mutex_lock(&portp->port.mutex); - memset(&portp->stats, 0, sizeof(comstats_t)); - portp->stats.brd = portp->brdnr; - portp->stats.panel = portp->panelnr; - portp->stats.port = portp->portnr; - mutex_unlock(&portp->port.mutex); - return copy_to_user(cp, &portp->stats, - sizeof(comstats_t)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Return the entire driver ports structure to a user app. - */ - -static int stl_getportstruct(struct stlport __user *arg) -{ - struct stlport stl_dummyport; - struct stlport *portp; - - if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport))) - return -EFAULT; - portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr, - stl_dummyport.portnr); - if (!portp) - return -ENODEV; - return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * Return the entire driver board structure to a user app. - */ - -static int stl_getbrdstruct(struct stlbrd __user *arg) -{ - struct stlbrd stl_dummybrd; - struct stlbrd *brdp; - - if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd))) - return -EFAULT; - if (stl_dummybrd.brdnr >= STL_MAXBRDS) - return -ENODEV; - brdp = stl_brds[stl_dummybrd.brdnr]; - if (!brdp) - return -ENODEV; - return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0; -} - -/*****************************************************************************/ - -/* - * The "staliomem" device is also required to do some special operations - * on the board and/or ports. In this driver it is mostly used for stats - * collection. - */ - -static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg) -{ - int brdnr, rc; - void __user *argp = (void __user *)arg; - - pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg); - - brdnr = iminor(fp->f_dentry->d_inode); - if (brdnr >= STL_MAXBRDS) - return -ENODEV; - rc = 0; - - switch (cmd) { - case COM_GETPORTSTATS: - rc = stl_getportstats(NULL, NULL, argp); - break; - case COM_CLRPORTSTATS: - rc = stl_clrportstats(NULL, argp); - break; - case COM_GETBRDSTATS: - rc = stl_getbrdstats(argp); - break; - case COM_READPORT: - rc = stl_getportstruct(argp); - break; - case COM_READBOARD: - rc = stl_getbrdstruct(argp); - break; - default: - rc = -ENOIOCTLCMD; - break; - } - return rc; -} - -static const struct tty_operations stl_ops = { - .open = stl_open, - .close = stl_close, - .write = stl_write, - .put_char = stl_putchar, - .flush_chars = stl_flushchars, - .write_room = stl_writeroom, - .chars_in_buffer = stl_charsinbuffer, - .ioctl = stl_ioctl, - .set_termios = stl_settermios, - .throttle = stl_throttle, - .unthrottle = stl_unthrottle, - .stop = stl_stop, - .start = stl_start, - .hangup = stl_hangup, - .flush_buffer = stl_flushbuffer, - .break_ctl = stl_breakctl, - .wait_until_sent = stl_waituntilsent, - .send_xchar = stl_sendxchar, - .tiocmget = stl_tiocmget, - .tiocmset = stl_tiocmset, - .proc_fops = &stl_proc_fops, -}; - -static const struct tty_port_operations stl_port_ops = { - .carrier_raised = stl_carrier_raised, - .dtr_rts = stl_dtr_rts, - .activate = stl_activate, - .shutdown = stl_shutdown, -}; - -/*****************************************************************************/ -/* CD1400 HARDWARE FUNCTIONS */ -/*****************************************************************************/ - -/* - * These functions get/set/update the registers of the cd1400 UARTs. - * Access to the cd1400 registers is via an address/data io port pair. - * (Maybe should make this inline...) - */ - -static int stl_cd1400getreg(struct stlport *portp, int regnr) -{ - outb((regnr + portp->uartaddr), portp->ioaddr); - return inb(portp->ioaddr + EREG_DATA); -} - -static void stl_cd1400setreg(struct stlport *portp, int regnr, int value) -{ - outb(regnr + portp->uartaddr, portp->ioaddr); - outb(value, portp->ioaddr + EREG_DATA); -} - -static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value) -{ - outb(regnr + portp->uartaddr, portp->ioaddr); - if (inb(portp->ioaddr + EREG_DATA) != value) { - outb(value, portp->ioaddr + EREG_DATA); - return 1; - } - return 0; -} - -/*****************************************************************************/ - -/* - * Inbitialize the UARTs in a panel. We don't care what sort of board - * these ports are on - since the port io registers are almost - * identical when dealing with ports. - */ - -static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp) -{ - unsigned int gfrcr; - int chipmask, i, j; - int nrchips, uartaddr, ioaddr; - unsigned long flags; - - pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(panelp->brdnr, panelp->pagenr); - -/* - * Check that each chip is present and started up OK. - */ - chipmask = 0; - nrchips = panelp->nrports / CD1400_PORTS; - for (i = 0; i < nrchips; i++) { - if (brdp->brdtype == BRD_ECHPCI) { - outb((panelp->pagenr + (i >> 1)), brdp->ioctrl); - ioaddr = panelp->iobase; - } else - ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1)); - uartaddr = (i & 0x01) ? 0x080 : 0; - outb((GFRCR + uartaddr), ioaddr); - outb(0, (ioaddr + EREG_DATA)); - outb((CCR + uartaddr), ioaddr); - outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); - outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); - outb((GFRCR + uartaddr), ioaddr); - for (j = 0; j < CCR_MAXWAIT; j++) - if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0) - break; - - if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) { - printk("STALLION: cd1400 not responding, " - "brd=%d panel=%d chip=%d\n", - panelp->brdnr, panelp->panelnr, i); - continue; - } - chipmask |= (0x1 << i); - outb((PPR + uartaddr), ioaddr); - outb(PPR_SCALAR, (ioaddr + EREG_DATA)); - } - - BRDDISABLE(panelp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - return chipmask; -} - -/*****************************************************************************/ - -/* - * Initialize hardware specific port registers. - */ - -static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) -{ - unsigned long flags; - pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, - panelp, portp); - - if ((brdp == NULL) || (panelp == NULL) || - (portp == NULL)) - return; - - spin_lock_irqsave(&brd_lock, flags); - portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) || - (portp->portnr < 8)) ? 0 : EREG_BANKSIZE); - portp->uartaddr = (portp->portnr & 0x04) << 5; - portp->pagenr = panelp->pagenr + (portp->portnr >> 3); - - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400setreg(portp, LIVR, (portp->portnr << 3)); - portp->hwid = stl_cd1400getreg(portp, GFRCR); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Wait for the command register to be ready. We will poll this, - * since it won't usually take too long to be ready. - */ - -static void stl_cd1400ccrwait(struct stlport *portp) -{ - int i; - - for (i = 0; i < CCR_MAXWAIT; i++) - if (stl_cd1400getreg(portp, CCR) == 0) - return; - - printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n", - portp->portnr, portp->panelnr, portp->brdnr); -} - -/*****************************************************************************/ - -/* - * Set up the cd1400 registers for a port based on the termios port - * settings. - */ - -static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp) -{ - struct stlbrd *brdp; - unsigned long flags; - unsigned int clkdiv, baudrate; - unsigned char cor1, cor2, cor3; - unsigned char cor4, cor5, ccr; - unsigned char srer, sreron, sreroff; - unsigned char mcor1, mcor2, rtpr; - unsigned char clk, div; - - cor1 = 0; - cor2 = 0; - cor3 = 0; - cor4 = 0; - cor5 = 0; - ccr = 0; - rtpr = 0; - clk = 0; - div = 0; - mcor1 = 0; - mcor2 = 0; - sreron = 0; - sreroff = 0; - - brdp = stl_brds[portp->brdnr]; - if (brdp == NULL) - return; - -/* - * Set up the RX char ignore mask with those RX error types we - * can ignore. We can get the cd1400 to help us out a little here, - * it will ignore parity errors and breaks for us. - */ - portp->rxignoremsk = 0; - if (tiosp->c_iflag & IGNPAR) { - portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN); - cor1 |= COR1_PARIGNORE; - } - if (tiosp->c_iflag & IGNBRK) { - portp->rxignoremsk |= ST_BREAK; - cor4 |= COR4_IGNBRK; - } - - portp->rxmarkmsk = ST_OVERRUN; - if (tiosp->c_iflag & (INPCK | PARMRK)) - portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING); - if (tiosp->c_iflag & BRKINT) - portp->rxmarkmsk |= ST_BREAK; - -/* - * Go through the char size, parity and stop bits and set all the - * option register appropriately. - */ - switch (tiosp->c_cflag & CSIZE) { - case CS5: - cor1 |= COR1_CHL5; - break; - case CS6: - cor1 |= COR1_CHL6; - break; - case CS7: - cor1 |= COR1_CHL7; - break; - default: - cor1 |= COR1_CHL8; - break; - } - - if (tiosp->c_cflag & CSTOPB) - cor1 |= COR1_STOP2; - else - cor1 |= COR1_STOP1; - - if (tiosp->c_cflag & PARENB) { - if (tiosp->c_cflag & PARODD) - cor1 |= (COR1_PARENB | COR1_PARODD); - else - cor1 |= (COR1_PARENB | COR1_PAREVEN); - } else { - cor1 |= COR1_PARNONE; - } - -/* - * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing - * space for hardware flow control and the like. This should be set to - * VMIN. Also here we will set the RX data timeout to 10ms - this should - * really be based on VTIME. - */ - cor3 |= FIFO_RXTHRESHOLD; - rtpr = 2; - -/* - * Calculate the baud rate timers. For now we will just assume that - * the input and output baud are the same. Could have used a baud - * table here, but this way we can generate virtually any baud rate - * we like! - */ - baudrate = tiosp->c_cflag & CBAUD; - if (baudrate & CBAUDEX) { - baudrate &= ~CBAUDEX; - if ((baudrate < 1) || (baudrate > 4)) - tiosp->c_cflag &= ~CBAUDEX; - else - baudrate += 15; - } - baudrate = stl_baudrates[baudrate]; - if ((tiosp->c_cflag & CBAUD) == B38400) { - if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - baudrate = 57600; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - baudrate = 115200; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - baudrate = 230400; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - baudrate = 460800; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) - baudrate = (portp->baud_base / portp->custom_divisor); - } - if (baudrate > STL_CD1400MAXBAUD) - baudrate = STL_CD1400MAXBAUD; - - if (baudrate > 0) { - for (clk = 0; clk < CD1400_NUMCLKS; clk++) { - clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate; - if (clkdiv < 0x100) - break; - } - div = (unsigned char) clkdiv; - } - -/* - * Check what form of modem signaling is required and set it up. - */ - if ((tiosp->c_cflag & CLOCAL) == 0) { - mcor1 |= MCOR1_DCD; - mcor2 |= MCOR2_DCD; - sreron |= SRER_MODEM; - portp->port.flags |= ASYNC_CHECK_CD; - } else - portp->port.flags &= ~ASYNC_CHECK_CD; - -/* - * Setup cd1400 enhanced modes if we can. In particular we want to - * handle as much of the flow control as possible automatically. As - * well as saving a few CPU cycles it will also greatly improve flow - * control reliability. - */ - if (tiosp->c_iflag & IXON) { - cor2 |= COR2_TXIBE; - cor3 |= COR3_SCD12; - if (tiosp->c_iflag & IXANY) - cor2 |= COR2_IXM; - } - - if (tiosp->c_cflag & CRTSCTS) { - cor2 |= COR2_CTSAE; - mcor1 |= FIFO_RTSTHRESHOLD; - } - -/* - * All cd1400 register values calculated so go through and set - * them all up. - */ - - pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", - portp->portnr, portp->panelnr, portp->brdnr); - pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", - cor1, cor2, cor3, cor4, cor5); - pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n", - mcor1, mcor2, rtpr, sreron, sreroff); - pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div); - pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", - tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], - tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3)); - srer = stl_cd1400getreg(portp, SRER); - stl_cd1400setreg(portp, SRER, 0); - if (stl_cd1400updatereg(portp, COR1, cor1)) - ccr = 1; - if (stl_cd1400updatereg(portp, COR2, cor2)) - ccr = 1; - if (stl_cd1400updatereg(portp, COR3, cor3)) - ccr = 1; - if (ccr) { - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_CORCHANGE); - } - stl_cd1400setreg(portp, COR4, cor4); - stl_cd1400setreg(portp, COR5, cor5); - stl_cd1400setreg(portp, MCOR1, mcor1); - stl_cd1400setreg(portp, MCOR2, mcor2); - if (baudrate > 0) { - stl_cd1400setreg(portp, TCOR, clk); - stl_cd1400setreg(portp, TBPR, div); - stl_cd1400setreg(portp, RCOR, clk); - stl_cd1400setreg(portp, RBPR, div); - } - stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]); - stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]); - stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]); - stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]); - stl_cd1400setreg(portp, RTPR, rtpr); - mcor1 = stl_cd1400getreg(portp, MSVR1); - if (mcor1 & MSVR1_DCD) - portp->sigs |= TIOCM_CD; - else - portp->sigs &= ~TIOCM_CD; - stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron)); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Set the state of the DTR and RTS signals. - */ - -static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts) -{ - unsigned char msvr1, msvr2; - unsigned long flags; - - pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n", - portp, dtr, rts); - - msvr1 = 0; - msvr2 = 0; - if (dtr > 0) - msvr1 = MSVR1_DTR; - if (rts > 0) - msvr2 = MSVR2_RTS; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - if (rts >= 0) - stl_cd1400setreg(portp, MSVR2, msvr2); - if (dtr >= 0) - stl_cd1400setreg(portp, MSVR1, msvr1); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Return the state of the signals. - */ - -static int stl_cd1400getsignals(struct stlport *portp) -{ - unsigned char msvr1, msvr2; - unsigned long flags; - int sigs; - - pr_debug("stl_cd1400getsignals(portp=%p)\n", portp); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - msvr1 = stl_cd1400getreg(portp, MSVR1); - msvr2 = stl_cd1400getreg(portp, MSVR2); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - - sigs = 0; - sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0; - sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0; - sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0; - sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0; -#if 0 - sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0; - sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0; -#else - sigs |= TIOCM_DSR; -#endif - return sigs; -} - -/*****************************************************************************/ - -/* - * Enable/Disable the Transmitter and/or Receiver. - */ - -static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx) -{ - unsigned char ccr; - unsigned long flags; - - pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); - - ccr = 0; - - if (tx == 0) - ccr |= CCR_TXDISABLE; - else if (tx > 0) - ccr |= CCR_TXENABLE; - if (rx == 0) - ccr |= CCR_RXDISABLE; - else if (rx > 0) - ccr |= CCR_RXENABLE; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, ccr); - stl_cd1400ccrwait(portp); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Start/stop the Transmitter and/or Receiver. - */ - -static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx) -{ - unsigned char sreron, sreroff; - unsigned long flags; - - pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); - - sreron = 0; - sreroff = 0; - if (tx == 0) - sreroff |= (SRER_TXDATA | SRER_TXEMPTY); - else if (tx == 1) - sreron |= SRER_TXDATA; - else if (tx >= 2) - sreron |= SRER_TXEMPTY; - if (rx == 0) - sreroff |= SRER_RXDATA; - else if (rx > 0) - sreron |= SRER_RXDATA; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400setreg(portp, SRER, - ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron)); - BRDDISABLE(portp->brdnr); - if (tx > 0) - set_bit(ASYI_TXBUSY, &portp->istate); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Disable all interrupts from this port. - */ - -static void stl_cd1400disableintrs(struct stlport *portp) -{ - unsigned long flags; - - pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400setreg(portp, SRER, 0); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -static void stl_cd1400sendbreak(struct stlport *portp, int len) -{ - unsigned long flags; - - pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400setreg(portp, SRER, - ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) | - SRER_TXEMPTY)); - BRDDISABLE(portp->brdnr); - portp->brklen = len; - if (len == 1) - portp->stats.txbreaks++; - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Take flow control actions... - */ - -static void stl_cd1400flowctrl(struct stlport *portp, int state) -{ - struct tty_struct *tty; - unsigned long flags; - - pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state); - - if (portp == NULL) - return; - tty = tty_port_tty_get(&portp->port); - if (tty == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - - if (state) { - if (tty->termios->c_iflag & IXOFF) { - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); - portp->stats.rxxon++; - stl_cd1400ccrwait(portp); - } -/* - * Question: should we return RTS to what it was before? It may - * have been set by an ioctl... Suppose not, since if you have - * hardware flow control set then it is pretty silly to go and - * set the RTS line by hand. - */ - if (tty->termios->c_cflag & CRTSCTS) { - stl_cd1400setreg(portp, MCOR1, - (stl_cd1400getreg(portp, MCOR1) | - FIFO_RTSTHRESHOLD)); - stl_cd1400setreg(portp, MSVR2, MSVR2_RTS); - portp->stats.rxrtson++; - } - } else { - if (tty->termios->c_iflag & IXOFF) { - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); - portp->stats.rxxoff++; - stl_cd1400ccrwait(portp); - } - if (tty->termios->c_cflag & CRTSCTS) { - stl_cd1400setreg(portp, MCOR1, - (stl_cd1400getreg(portp, MCOR1) & 0xf0)); - stl_cd1400setreg(portp, MSVR2, 0); - portp->stats.rxrtsoff++; - } - } - - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - tty_kref_put(tty); -} - -/*****************************************************************************/ - -/* - * Send a flow control character... - */ - -static void stl_cd1400sendflow(struct stlport *portp, int state) -{ - struct tty_struct *tty; - unsigned long flags; - - pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state); - - if (portp == NULL) - return; - tty = tty_port_tty_get(&portp->port); - if (tty == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - if (state) { - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); - portp->stats.rxxon++; - stl_cd1400ccrwait(portp); - } else { - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); - portp->stats.rxxoff++; - stl_cd1400ccrwait(portp); - } - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - tty_kref_put(tty); -} - -/*****************************************************************************/ - -static void stl_cd1400flush(struct stlport *portp) -{ - unsigned long flags; - - pr_debug("stl_cd1400flush(portp=%p)\n", portp); - - if (portp == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); - stl_cd1400ccrwait(portp); - stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO); - stl_cd1400ccrwait(portp); - portp->tx.tail = portp->tx.head; - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Return the current state of data flow on this port. This is only - * really interesting when determining if data has fully completed - * transmission or not... This is easy for the cd1400, it accurately - * maintains the busy port flag. - */ - -static int stl_cd1400datastate(struct stlport *portp) -{ - pr_debug("stl_cd1400datastate(portp=%p)\n", portp); - - if (portp == NULL) - return 0; - - return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0; -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for cd1400 EasyIO boards. - */ - -static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase) -{ - unsigned char svrtype; - - pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase); - - spin_lock(&brd_lock); - outb(SVRR, iobase); - svrtype = inb(iobase + EREG_DATA); - if (panelp->nrports > 4) { - outb((SVRR + 0x80), iobase); - svrtype |= inb(iobase + EREG_DATA); - } - - if (svrtype & SVRR_RX) - stl_cd1400rxisr(panelp, iobase); - else if (svrtype & SVRR_TX) - stl_cd1400txisr(panelp, iobase); - else if (svrtype & SVRR_MDM) - stl_cd1400mdmisr(panelp, iobase); - - spin_unlock(&brd_lock); -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for cd1400 panels. - */ - -static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase) -{ - unsigned char svrtype; - - pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase); - - outb(SVRR, iobase); - svrtype = inb(iobase + EREG_DATA); - outb((SVRR + 0x80), iobase); - svrtype |= inb(iobase + EREG_DATA); - if (svrtype & SVRR_RX) - stl_cd1400rxisr(panelp, iobase); - else if (svrtype & SVRR_TX) - stl_cd1400txisr(panelp, iobase); - else if (svrtype & SVRR_MDM) - stl_cd1400mdmisr(panelp, iobase); -} - - -/*****************************************************************************/ - -/* - * Unfortunately we need to handle breaks in the TX data stream, since - * this is the only way to generate them on the cd1400. - */ - -static int stl_cd1400breakisr(struct stlport *portp, int ioaddr) -{ - if (portp->brklen == 1) { - outb((COR2 + portp->uartaddr), ioaddr); - outb((inb(ioaddr + EREG_DATA) | COR2_ETC), - (ioaddr + EREG_DATA)); - outb((TDR + portp->uartaddr), ioaddr); - outb(ETC_CMD, (ioaddr + EREG_DATA)); - outb(ETC_STARTBREAK, (ioaddr + EREG_DATA)); - outb((SRER + portp->uartaddr), ioaddr); - outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)), - (ioaddr + EREG_DATA)); - return 1; - } else if (portp->brklen > 1) { - outb((TDR + portp->uartaddr), ioaddr); - outb(ETC_CMD, (ioaddr + EREG_DATA)); - outb(ETC_STOPBREAK, (ioaddr + EREG_DATA)); - portp->brklen = -1; - return 1; - } else { - outb((COR2 + portp->uartaddr), ioaddr); - outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC), - (ioaddr + EREG_DATA)); - portp->brklen = 0; - } - return 0; -} - -/*****************************************************************************/ - -/* - * Transmit interrupt handler. This has gotta be fast! Handling TX - * chars is pretty simple, stuff as many as possible from the TX buffer - * into the cd1400 FIFO. Must also handle TX breaks here, since they - * are embedded as commands in the data stream. Oh no, had to use a goto! - * This could be optimized more, will do when I get time... - * In practice it is possible that interrupts are enabled but that the - * port has been hung up. Need to handle not having any TX buffer here, - * this is done by using the side effect that head and tail will also - * be NULL if the buffer has been freed. - */ - -static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr) -{ - struct stlport *portp; - int len, stlen; - char *head, *tail; - unsigned char ioack, srer; - struct tty_struct *tty; - - pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); - - ioack = inb(ioaddr + EREG_TXACK); - if (((ioack & panelp->ackmask) != 0) || - ((ioack & ACK_TYPMASK) != ACK_TYPTX)) { - printk("STALLION: bad TX interrupt ack value=%x\n", ioack); - return; - } - portp = panelp->ports[(ioack >> 3)]; - -/* - * Unfortunately we need to handle breaks in the data stream, since - * this is the only way to generate them on the cd1400. Do it now if - * a break is to be sent. - */ - if (portp->brklen != 0) - if (stl_cd1400breakisr(portp, ioaddr)) - goto stl_txalldone; - - head = portp->tx.head; - tail = portp->tx.tail; - len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); - if ((len == 0) || ((len < STL_TXBUFLOW) && - (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { - set_bit(ASYI_TXLOW, &portp->istate); - tty = tty_port_tty_get(&portp->port); - if (tty) { - tty_wakeup(tty); - tty_kref_put(tty); - } - } - - if (len == 0) { - outb((SRER + portp->uartaddr), ioaddr); - srer = inb(ioaddr + EREG_DATA); - if (srer & SRER_TXDATA) { - srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY; - } else { - srer &= ~(SRER_TXDATA | SRER_TXEMPTY); - clear_bit(ASYI_TXBUSY, &portp->istate); - } - outb(srer, (ioaddr + EREG_DATA)); - } else { - len = min(len, CD1400_TXFIFOSIZE); - portp->stats.txtotal += len; - stlen = min_t(unsigned int, len, - (portp->tx.buf + STL_TXBUFSIZE) - tail); - outb((TDR + portp->uartaddr), ioaddr); - outsb((ioaddr + EREG_DATA), tail, stlen); - len -= stlen; - tail += stlen; - if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) - tail = portp->tx.buf; - if (len > 0) { - outsb((ioaddr + EREG_DATA), tail, len); - tail += len; - } - portp->tx.tail = tail; - } - -stl_txalldone: - outb((EOSRR + portp->uartaddr), ioaddr); - outb(0, (ioaddr + EREG_DATA)); -} - -/*****************************************************************************/ - -/* - * Receive character interrupt handler. Determine if we have good chars - * or bad chars and then process appropriately. Good chars are easy - * just shove the lot into the RX buffer and set all status byte to 0. - * If a bad RX char then process as required. This routine needs to be - * fast! In practice it is possible that we get an interrupt on a port - * that is closed. This can happen on hangups - since they completely - * shutdown a port not in user context. Need to handle this case. - */ - -static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr) -{ - struct stlport *portp; - struct tty_struct *tty; - unsigned int ioack, len, buflen; - unsigned char status; - char ch; - - pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); - - ioack = inb(ioaddr + EREG_RXACK); - if ((ioack & panelp->ackmask) != 0) { - printk("STALLION: bad RX interrupt ack value=%x\n", ioack); - return; - } - portp = panelp->ports[(ioack >> 3)]; - tty = tty_port_tty_get(&portp->port); - - if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) { - outb((RDCR + portp->uartaddr), ioaddr); - len = inb(ioaddr + EREG_DATA); - if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { - len = min_t(unsigned int, len, sizeof(stl_unwanted)); - outb((RDSR + portp->uartaddr), ioaddr); - insb((ioaddr + EREG_DATA), &stl_unwanted[0], len); - portp->stats.rxlost += len; - portp->stats.rxtotal += len; - } else { - len = min(len, buflen); - if (len > 0) { - unsigned char *ptr; - outb((RDSR + portp->uartaddr), ioaddr); - tty_prepare_flip_string(tty, &ptr, len); - insb((ioaddr + EREG_DATA), ptr, len); - tty_schedule_flip(tty); - portp->stats.rxtotal += len; - } - } - } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) { - outb((RDSR + portp->uartaddr), ioaddr); - status = inb(ioaddr + EREG_DATA); - ch = inb(ioaddr + EREG_DATA); - if (status & ST_PARITY) - portp->stats.rxparity++; - if (status & ST_FRAMING) - portp->stats.rxframing++; - if (status & ST_OVERRUN) - portp->stats.rxoverrun++; - if (status & ST_BREAK) - portp->stats.rxbreaks++; - if (status & ST_SCHARMASK) { - if ((status & ST_SCHARMASK) == ST_SCHAR1) - portp->stats.txxon++; - if ((status & ST_SCHARMASK) == ST_SCHAR2) - portp->stats.txxoff++; - goto stl_rxalldone; - } - if (tty != NULL && (portp->rxignoremsk & status) == 0) { - if (portp->rxmarkmsk & status) { - if (status & ST_BREAK) { - status = TTY_BREAK; - if (portp->port.flags & ASYNC_SAK) { - do_SAK(tty); - BRDENABLE(portp->brdnr, portp->pagenr); - } - } else if (status & ST_PARITY) - status = TTY_PARITY; - else if (status & ST_FRAMING) - status = TTY_FRAME; - else if(status & ST_OVERRUN) - status = TTY_OVERRUN; - else - status = 0; - } else - status = 0; - tty_insert_flip_char(tty, ch, status); - tty_schedule_flip(tty); - } - } else { - printk("STALLION: bad RX interrupt ack value=%x\n", ioack); - tty_kref_put(tty); - return; - } - -stl_rxalldone: - tty_kref_put(tty); - outb((EOSRR + portp->uartaddr), ioaddr); - outb(0, (ioaddr + EREG_DATA)); -} - -/*****************************************************************************/ - -/* - * Modem interrupt handler. The is called when the modem signal line - * (DCD) has changed state. Leave most of the work to the off-level - * processing routine. - */ - -static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr) -{ - struct stlport *portp; - unsigned int ioack; - unsigned char misr; - - pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp); - - ioack = inb(ioaddr + EREG_MDACK); - if (((ioack & panelp->ackmask) != 0) || - ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) { - printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack); - return; - } - portp = panelp->ports[(ioack >> 3)]; - - outb((MISR + portp->uartaddr), ioaddr); - misr = inb(ioaddr + EREG_DATA); - if (misr & MISR_DCD) { - stl_cd_change(portp); - portp->stats.modem++; - } - - outb((EOSRR + portp->uartaddr), ioaddr); - outb(0, (ioaddr + EREG_DATA)); -} - -/*****************************************************************************/ -/* SC26198 HARDWARE FUNCTIONS */ -/*****************************************************************************/ - -/* - * These functions get/set/update the registers of the sc26198 UARTs. - * Access to the sc26198 registers is via an address/data io port pair. - * (Maybe should make this inline...) - */ - -static int stl_sc26198getreg(struct stlport *portp, int regnr) -{ - outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); - return inb(portp->ioaddr + XP_DATA); -} - -static void stl_sc26198setreg(struct stlport *portp, int regnr, int value) -{ - outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); - outb(value, (portp->ioaddr + XP_DATA)); -} - -static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value) -{ - outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); - if (inb(portp->ioaddr + XP_DATA) != value) { - outb(value, (portp->ioaddr + XP_DATA)); - return 1; - } - return 0; -} - -/*****************************************************************************/ - -/* - * Functions to get and set the sc26198 global registers. - */ - -static int stl_sc26198getglobreg(struct stlport *portp, int regnr) -{ - outb(regnr, (portp->ioaddr + XP_ADDR)); - return inb(portp->ioaddr + XP_DATA); -} - -#if 0 -static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value) -{ - outb(regnr, (portp->ioaddr + XP_ADDR)); - outb(value, (portp->ioaddr + XP_DATA)); -} -#endif - -/*****************************************************************************/ - -/* - * Inbitialize the UARTs in a panel. We don't care what sort of board - * these ports are on - since the port io registers are almost - * identical when dealing with ports. - */ - -static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp) -{ - int chipmask, i; - int nrchips, ioaddr; - - pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); - - BRDENABLE(panelp->brdnr, panelp->pagenr); - -/* - * Check that each chip is present and started up OK. - */ - chipmask = 0; - nrchips = (panelp->nrports + 4) / SC26198_PORTS; - if (brdp->brdtype == BRD_ECHPCI) - outb(panelp->pagenr, brdp->ioctrl); - - for (i = 0; i < nrchips; i++) { - ioaddr = panelp->iobase + (i * 4); - outb(SCCR, (ioaddr + XP_ADDR)); - outb(CR_RESETALL, (ioaddr + XP_DATA)); - outb(TSTR, (ioaddr + XP_ADDR)); - if (inb(ioaddr + XP_DATA) != 0) { - printk("STALLION: sc26198 not responding, " - "brd=%d panel=%d chip=%d\n", - panelp->brdnr, panelp->panelnr, i); - continue; - } - chipmask |= (0x1 << i); - outb(GCCR, (ioaddr + XP_ADDR)); - outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA)); - outb(WDTRCR, (ioaddr + XP_ADDR)); - outb(0xff, (ioaddr + XP_DATA)); - } - - BRDDISABLE(panelp->brdnr); - return chipmask; -} - -/*****************************************************************************/ - -/* - * Initialize hardware specific port registers. - */ - -static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) -{ - pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, - panelp, portp); - - if ((brdp == NULL) || (panelp == NULL) || - (portp == NULL)) - return; - - portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4); - portp->uartaddr = (portp->portnr & 0x07) << 4; - portp->pagenr = panelp->pagenr; - portp->hwid = 0x1; - - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS); - BRDDISABLE(portp->brdnr); -} - -/*****************************************************************************/ - -/* - * Set up the sc26198 registers for a port based on the termios port - * settings. - */ - -static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp) -{ - struct stlbrd *brdp; - unsigned long flags; - unsigned int baudrate; - unsigned char mr0, mr1, mr2, clk; - unsigned char imron, imroff, iopr, ipr; - - mr0 = 0; - mr1 = 0; - mr2 = 0; - clk = 0; - iopr = 0; - imron = 0; - imroff = 0; - - brdp = stl_brds[portp->brdnr]; - if (brdp == NULL) - return; - -/* - * Set up the RX char ignore mask with those RX error types we - * can ignore. - */ - portp->rxignoremsk = 0; - if (tiosp->c_iflag & IGNPAR) - portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING | - SR_RXOVERRUN); - if (tiosp->c_iflag & IGNBRK) - portp->rxignoremsk |= SR_RXBREAK; - - portp->rxmarkmsk = SR_RXOVERRUN; - if (tiosp->c_iflag & (INPCK | PARMRK)) - portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING); - if (tiosp->c_iflag & BRKINT) - portp->rxmarkmsk |= SR_RXBREAK; - -/* - * Go through the char size, parity and stop bits and set all the - * option register appropriately. - */ - switch (tiosp->c_cflag & CSIZE) { - case CS5: - mr1 |= MR1_CS5; - break; - case CS6: - mr1 |= MR1_CS6; - break; - case CS7: - mr1 |= MR1_CS7; - break; - default: - mr1 |= MR1_CS8; - break; - } - - if (tiosp->c_cflag & CSTOPB) - mr2 |= MR2_STOP2; - else - mr2 |= MR2_STOP1; - - if (tiosp->c_cflag & PARENB) { - if (tiosp->c_cflag & PARODD) - mr1 |= (MR1_PARENB | MR1_PARODD); - else - mr1 |= (MR1_PARENB | MR1_PAREVEN); - } else - mr1 |= MR1_PARNONE; - - mr1 |= MR1_ERRBLOCK; - -/* - * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing - * space for hardware flow control and the like. This should be set to - * VMIN. - */ - mr2 |= MR2_RXFIFOHALF; - -/* - * Calculate the baud rate timers. For now we will just assume that - * the input and output baud are the same. The sc26198 has a fixed - * baud rate table, so only discrete baud rates possible. - */ - baudrate = tiosp->c_cflag & CBAUD; - if (baudrate & CBAUDEX) { - baudrate &= ~CBAUDEX; - if ((baudrate < 1) || (baudrate > 4)) - tiosp->c_cflag &= ~CBAUDEX; - else - baudrate += 15; - } - baudrate = stl_baudrates[baudrate]; - if ((tiosp->c_cflag & CBAUD) == B38400) { - if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - baudrate = 57600; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - baudrate = 115200; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - baudrate = 230400; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - baudrate = 460800; - else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) - baudrate = (portp->baud_base / portp->custom_divisor); - } - if (baudrate > STL_SC26198MAXBAUD) - baudrate = STL_SC26198MAXBAUD; - - if (baudrate > 0) - for (clk = 0; clk < SC26198_NRBAUDS; clk++) - if (baudrate <= sc26198_baudtable[clk]) - break; - -/* - * Check what form of modem signaling is required and set it up. - */ - if (tiosp->c_cflag & CLOCAL) { - portp->port.flags &= ~ASYNC_CHECK_CD; - } else { - iopr |= IOPR_DCDCOS; - imron |= IR_IOPORT; - portp->port.flags |= ASYNC_CHECK_CD; - } - -/* - * Setup sc26198 enhanced modes if we can. In particular we want to - * handle as much of the flow control as possible automatically. As - * well as saving a few CPU cycles it will also greatly improve flow - * control reliability. - */ - if (tiosp->c_iflag & IXON) { - mr0 |= MR0_SWFTX | MR0_SWFT; - imron |= IR_XONXOFF; - } else - imroff |= IR_XONXOFF; - - if (tiosp->c_iflag & IXOFF) - mr0 |= MR0_SWFRX; - - if (tiosp->c_cflag & CRTSCTS) { - mr2 |= MR2_AUTOCTS; - mr1 |= MR1_AUTORTS; - } - -/* - * All sc26198 register values calculated so go through and set - * them all up. - */ - - pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", - portp->portnr, portp->panelnr, portp->brdnr); - pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk); - pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff); - pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", - tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], - tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, IMR, 0); - stl_sc26198updatereg(portp, MR0, mr0); - stl_sc26198updatereg(portp, MR1, mr1); - stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK); - stl_sc26198updatereg(portp, MR2, mr2); - stl_sc26198updatereg(portp, IOPIOR, - ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr)); - - if (baudrate > 0) { - stl_sc26198setreg(portp, TXCSR, clk); - stl_sc26198setreg(portp, RXCSR, clk); - } - - stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]); - stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]); - - ipr = stl_sc26198getreg(portp, IPR); - if (ipr & IPR_DCD) - portp->sigs &= ~TIOCM_CD; - else - portp->sigs |= TIOCM_CD; - - portp->imr = (portp->imr & ~imroff) | imron; - stl_sc26198setreg(portp, IMR, portp->imr); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Set the state of the DTR and RTS signals. - */ - -static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts) -{ - unsigned char iopioron, iopioroff; - unsigned long flags; - - pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp, - dtr, rts); - - iopioron = 0; - iopioroff = 0; - if (dtr == 0) - iopioroff |= IPR_DTR; - else if (dtr > 0) - iopioron |= IPR_DTR; - if (rts == 0) - iopioroff |= IPR_RTS; - else if (rts > 0) - iopioron |= IPR_RTS; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, IOPIOR, - ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron)); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Return the state of the signals. - */ - -static int stl_sc26198getsignals(struct stlport *portp) -{ - unsigned char ipr; - unsigned long flags; - int sigs; - - pr_debug("stl_sc26198getsignals(portp=%p)\n", portp); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - ipr = stl_sc26198getreg(portp, IPR); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - - sigs = 0; - sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD; - sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS; - sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR; - sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS; - sigs |= TIOCM_DSR; - return sigs; -} - -/*****************************************************************************/ - -/* - * Enable/Disable the Transmitter and/or Receiver. - */ - -static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx) -{ - unsigned char ccr; - unsigned long flags; - - pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx); - - ccr = portp->crenable; - if (tx == 0) - ccr &= ~CR_TXENABLE; - else if (tx > 0) - ccr |= CR_TXENABLE; - if (rx == 0) - ccr &= ~CR_RXENABLE; - else if (rx > 0) - ccr |= CR_RXENABLE; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, SCCR, ccr); - BRDDISABLE(portp->brdnr); - portp->crenable = ccr; - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Start/stop the Transmitter and/or Receiver. - */ - -static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx) -{ - unsigned char imr; - unsigned long flags; - - pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); - - imr = portp->imr; - if (tx == 0) - imr &= ~IR_TXRDY; - else if (tx == 1) - imr |= IR_TXRDY; - if (rx == 0) - imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG); - else if (rx > 0) - imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, IMR, imr); - BRDDISABLE(portp->brdnr); - portp->imr = imr; - if (tx > 0) - set_bit(ASYI_TXBUSY, &portp->istate); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Disable all interrupts from this port. - */ - -static void stl_sc26198disableintrs(struct stlport *portp) -{ - unsigned long flags; - - pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - portp->imr = 0; - stl_sc26198setreg(portp, IMR, 0); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -static void stl_sc26198sendbreak(struct stlport *portp, int len) -{ - unsigned long flags; - - pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len); - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - if (len == 1) { - stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK); - portp->stats.txbreaks++; - } else - stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK); - - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Take flow control actions... - */ - -static void stl_sc26198flowctrl(struct stlport *portp, int state) -{ - struct tty_struct *tty; - unsigned long flags; - unsigned char mr0; - - pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state); - - if (portp == NULL) - return; - tty = tty_port_tty_get(&portp->port); - if (tty == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - - if (state) { - if (tty->termios->c_iflag & IXOFF) { - mr0 = stl_sc26198getreg(portp, MR0); - stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); - stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); - mr0 |= MR0_SWFRX; - portp->stats.rxxon++; - stl_sc26198wait(portp); - stl_sc26198setreg(portp, MR0, mr0); - } -/* - * Question: should we return RTS to what it was before? It may - * have been set by an ioctl... Suppose not, since if you have - * hardware flow control set then it is pretty silly to go and - * set the RTS line by hand. - */ - if (tty->termios->c_cflag & CRTSCTS) { - stl_sc26198setreg(portp, MR1, - (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS)); - stl_sc26198setreg(portp, IOPIOR, - (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS)); - portp->stats.rxrtson++; - } - } else { - if (tty->termios->c_iflag & IXOFF) { - mr0 = stl_sc26198getreg(portp, MR0); - stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); - stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); - mr0 &= ~MR0_SWFRX; - portp->stats.rxxoff++; - stl_sc26198wait(portp); - stl_sc26198setreg(portp, MR0, mr0); - } - if (tty->termios->c_cflag & CRTSCTS) { - stl_sc26198setreg(portp, MR1, - (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS)); - stl_sc26198setreg(portp, IOPIOR, - (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS)); - portp->stats.rxrtsoff++; - } - } - - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - tty_kref_put(tty); -} - -/*****************************************************************************/ - -/* - * Send a flow control character. - */ - -static void stl_sc26198sendflow(struct stlport *portp, int state) -{ - struct tty_struct *tty; - unsigned long flags; - unsigned char mr0; - - pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state); - - if (portp == NULL) - return; - tty = tty_port_tty_get(&portp->port); - if (tty == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - if (state) { - mr0 = stl_sc26198getreg(portp, MR0); - stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); - stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); - mr0 |= MR0_SWFRX; - portp->stats.rxxon++; - stl_sc26198wait(portp); - stl_sc26198setreg(portp, MR0, mr0); - } else { - mr0 = stl_sc26198getreg(portp, MR0); - stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); - stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); - mr0 &= ~MR0_SWFRX; - portp->stats.rxxoff++; - stl_sc26198wait(portp); - stl_sc26198setreg(portp, MR0, mr0); - } - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - tty_kref_put(tty); -} - -/*****************************************************************************/ - -static void stl_sc26198flush(struct stlport *portp) -{ - unsigned long flags; - - pr_debug("stl_sc26198flush(portp=%p)\n", portp); - - if (portp == NULL) - return; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - stl_sc26198setreg(portp, SCCR, CR_TXRESET); - stl_sc26198setreg(portp, SCCR, portp->crenable); - BRDDISABLE(portp->brdnr); - portp->tx.tail = portp->tx.head; - spin_unlock_irqrestore(&brd_lock, flags); -} - -/*****************************************************************************/ - -/* - * Return the current state of data flow on this port. This is only - * really interesting when determining if data has fully completed - * transmission or not... The sc26198 interrupt scheme cannot - * determine when all data has actually drained, so we need to - * check the port statusy register to be sure. - */ - -static int stl_sc26198datastate(struct stlport *portp) -{ - unsigned long flags; - unsigned char sr; - - pr_debug("stl_sc26198datastate(portp=%p)\n", portp); - - if (portp == NULL) - return 0; - if (test_bit(ASYI_TXBUSY, &portp->istate)) - return 1; - - spin_lock_irqsave(&brd_lock, flags); - BRDENABLE(portp->brdnr, portp->pagenr); - sr = stl_sc26198getreg(portp, SR); - BRDDISABLE(portp->brdnr); - spin_unlock_irqrestore(&brd_lock, flags); - - return (sr & SR_TXEMPTY) ? 0 : 1; -} - -/*****************************************************************************/ - -/* - * Delay for a small amount of time, to give the sc26198 a chance - * to process a command... - */ - -static void stl_sc26198wait(struct stlport *portp) -{ - int i; - - pr_debug("stl_sc26198wait(portp=%p)\n", portp); - - if (portp == NULL) - return; - - for (i = 0; i < 20; i++) - stl_sc26198getglobreg(portp, TSTR); -} - -/*****************************************************************************/ - -/* - * If we are TX flow controlled and in IXANY mode then we may - * need to unflow control here. We gotta do this because of the - * automatic flow control modes of the sc26198. - */ - -static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty) -{ - unsigned char mr0; - - mr0 = stl_sc26198getreg(portp, MR0); - stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); - stl_sc26198setreg(portp, SCCR, CR_HOSTXON); - stl_sc26198wait(portp); - stl_sc26198setreg(portp, MR0, mr0); - clear_bit(ASYI_TXFLOWED, &portp->istate); -} - -/*****************************************************************************/ - -/* - * Interrupt service routine for sc26198 panels. - */ - -static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase) -{ - struct stlport *portp; - unsigned int iack; - - spin_lock(&brd_lock); - -/* - * Work around bug in sc26198 chip... Cannot have A6 address - * line of UART high, else iack will be returned as 0. - */ - outb(0, (iobase + 1)); - - iack = inb(iobase + XP_IACK); - portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)]; - - if (iack & IVR_RXDATA) - stl_sc26198rxisr(portp, iack); - else if (iack & IVR_TXDATA) - stl_sc26198txisr(portp); - else - stl_sc26198otherisr(portp, iack); - - spin_unlock(&brd_lock); -} - -/*****************************************************************************/ - -/* - * Transmit interrupt handler. This has gotta be fast! Handling TX - * chars is pretty simple, stuff as many as possible from the TX buffer - * into the sc26198 FIFO. - * In practice it is possible that interrupts are enabled but that the - * port has been hung up. Need to handle not having any TX buffer here, - * this is done by using the side effect that head and tail will also - * be NULL if the buffer has been freed. - */ - -static void stl_sc26198txisr(struct stlport *portp) -{ - struct tty_struct *tty; - unsigned int ioaddr; - unsigned char mr0; - int len, stlen; - char *head, *tail; - - pr_debug("stl_sc26198txisr(portp=%p)\n", portp); - - ioaddr = portp->ioaddr; - head = portp->tx.head; - tail = portp->tx.tail; - len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); - if ((len == 0) || ((len < STL_TXBUFLOW) && - (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { - set_bit(ASYI_TXLOW, &portp->istate); - tty = tty_port_tty_get(&portp->port); - if (tty) { - tty_wakeup(tty); - tty_kref_put(tty); - } - } - - if (len == 0) { - outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR)); - mr0 = inb(ioaddr + XP_DATA); - if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) { - portp->imr &= ~IR_TXRDY; - outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR)); - outb(portp->imr, (ioaddr + XP_DATA)); - clear_bit(ASYI_TXBUSY, &portp->istate); - } else { - mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY); - outb(mr0, (ioaddr + XP_DATA)); - } - } else { - len = min(len, SC26198_TXFIFOSIZE); - portp->stats.txtotal += len; - stlen = min_t(unsigned int, len, - (portp->tx.buf + STL_TXBUFSIZE) - tail); - outb(GTXFIFO, (ioaddr + XP_ADDR)); - outsb((ioaddr + XP_DATA), tail, stlen); - len -= stlen; - tail += stlen; - if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) - tail = portp->tx.buf; - if (len > 0) { - outsb((ioaddr + XP_DATA), tail, len); - tail += len; - } - portp->tx.tail = tail; - } -} - -/*****************************************************************************/ - -/* - * Receive character interrupt handler. Determine if we have good chars - * or bad chars and then process appropriately. Good chars are easy - * just shove the lot into the RX buffer and set all status byte to 0. - * If a bad RX char then process as required. This routine needs to be - * fast! In practice it is possible that we get an interrupt on a port - * that is closed. This can happen on hangups - since they completely - * shutdown a port not in user context. Need to handle this case. - */ - -static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack) -{ - struct tty_struct *tty; - unsigned int len, buflen, ioaddr; - - pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack); - - tty = tty_port_tty_get(&portp->port); - ioaddr = portp->ioaddr; - outb(GIBCR, (ioaddr + XP_ADDR)); - len = inb(ioaddr + XP_DATA) + 1; - - if ((iack & IVR_TYPEMASK) == IVR_RXDATA) { - if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { - len = min_t(unsigned int, len, sizeof(stl_unwanted)); - outb(GRXFIFO, (ioaddr + XP_ADDR)); - insb((ioaddr + XP_DATA), &stl_unwanted[0], len); - portp->stats.rxlost += len; - portp->stats.rxtotal += len; - } else { - len = min(len, buflen); - if (len > 0) { - unsigned char *ptr; - outb(GRXFIFO, (ioaddr + XP_ADDR)); - tty_prepare_flip_string(tty, &ptr, len); - insb((ioaddr + XP_DATA), ptr, len); - tty_schedule_flip(tty); - portp->stats.rxtotal += len; - } - } - } else { - stl_sc26198rxbadchars(portp); - } - -/* - * If we are TX flow controlled and in IXANY mode then we may need - * to unflow control here. We gotta do this because of the automatic - * flow control modes of the sc26198. - */ - if (test_bit(ASYI_TXFLOWED, &portp->istate)) { - if ((tty != NULL) && - (tty->termios != NULL) && - (tty->termios->c_iflag & IXANY)) { - stl_sc26198txunflow(portp, tty); - } - } - tty_kref_put(tty); -} - -/*****************************************************************************/ - -/* - * Process an RX bad character. - */ - -static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch) -{ - struct tty_struct *tty; - unsigned int ioaddr; - - tty = tty_port_tty_get(&portp->port); - ioaddr = portp->ioaddr; - - if (status & SR_RXPARITY) - portp->stats.rxparity++; - if (status & SR_RXFRAMING) - portp->stats.rxframing++; - if (status & SR_RXOVERRUN) - portp->stats.rxoverrun++; - if (status & SR_RXBREAK) - portp->stats.rxbreaks++; - - if ((tty != NULL) && - ((portp->rxignoremsk & status) == 0)) { - if (portp->rxmarkmsk & status) { - if (status & SR_RXBREAK) { - status = TTY_BREAK; - if (portp->port.flags & ASYNC_SAK) { - do_SAK(tty); - BRDENABLE(portp->brdnr, portp->pagenr); - } - } else if (status & SR_RXPARITY) - status = TTY_PARITY; - else if (status & SR_RXFRAMING) - status = TTY_FRAME; - else if(status & SR_RXOVERRUN) - status = TTY_OVERRUN; - else - status = 0; - } else - status = 0; - - tty_insert_flip_char(tty, ch, status); - tty_schedule_flip(tty); - - if (status == 0) - portp->stats.rxtotal++; - } - tty_kref_put(tty); -} - -/*****************************************************************************/ - -/* - * Process all characters in the RX FIFO of the UART. Check all char - * status bytes as well, and process as required. We need to check - * all bytes in the FIFO, in case some more enter the FIFO while we - * are here. To get the exact character error type we need to switch - * into CHAR error mode (that is why we need to make sure we empty - * the FIFO). - */ - -static void stl_sc26198rxbadchars(struct stlport *portp) -{ - unsigned char status, mr1; - char ch; - -/* - * To get the precise error type for each character we must switch - * back into CHAR error mode. - */ - mr1 = stl_sc26198getreg(portp, MR1); - stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK)); - - while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) { - stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR); - ch = stl_sc26198getreg(portp, RXFIFO); - stl_sc26198rxbadch(portp, status, ch); - } - -/* - * To get correct interrupt class we must switch back into BLOCK - * error mode. - */ - stl_sc26198setreg(portp, MR1, mr1); -} - -/*****************************************************************************/ - -/* - * Other interrupt handler. This includes modem signals, flow - * control actions, etc. Most stuff is left to off-level interrupt - * processing time. - */ - -static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack) -{ - unsigned char cir, ipr, xisr; - - pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack); - - cir = stl_sc26198getglobreg(portp, CIR); - - switch (cir & CIR_SUBTYPEMASK) { - case CIR_SUBCOS: - ipr = stl_sc26198getreg(portp, IPR); - if (ipr & IPR_DCDCHANGE) { - stl_cd_change(portp); - portp->stats.modem++; - } - break; - case CIR_SUBXONXOFF: - xisr = stl_sc26198getreg(portp, XISR); - if (xisr & XISR_RXXONGOT) { - set_bit(ASYI_TXFLOWED, &portp->istate); - portp->stats.txxoff++; - } - if (xisr & XISR_RXXOFFGOT) { - clear_bit(ASYI_TXFLOWED, &portp->istate); - portp->stats.txxon++; - } - break; - case CIR_SUBBREAK: - stl_sc26198setreg(portp, SCCR, CR_BREAKRESET); - stl_sc26198rxbadchars(portp); - break; - default: - break; - } -} - -static void stl_free_isabrds(void) -{ - struct stlbrd *brdp; - unsigned int i; - - for (i = 0; i < stl_nrbrds; i++) { - if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) - continue; - - free_irq(brdp->irq, brdp); - - stl_cleanup_panels(brdp); - - release_region(brdp->ioaddr1, brdp->iosize1); - if (brdp->iosize2 > 0) - release_region(brdp->ioaddr2, brdp->iosize2); - - kfree(brdp); - stl_brds[i] = NULL; - } -} - -/* - * Loadable module initialization stuff. - */ -static int __init stallion_module_init(void) -{ - struct stlbrd *brdp; - struct stlconf conf; - unsigned int i, j; - int retval; - - printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion); - - spin_lock_init(&stallion_lock); - spin_lock_init(&brd_lock); - - stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS); - if (!stl_serial) { - retval = -ENOMEM; - goto err; - } - - stl_serial->owner = THIS_MODULE; - stl_serial->driver_name = stl_drvname; - stl_serial->name = "ttyE"; - stl_serial->major = STL_SERIALMAJOR; - stl_serial->minor_start = 0; - stl_serial->type = TTY_DRIVER_TYPE_SERIAL; - stl_serial->subtype = SERIAL_TYPE_NORMAL; - stl_serial->init_termios = stl_deftermios; - stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; - tty_set_operations(stl_serial, &stl_ops); - - retval = tty_register_driver(stl_serial); - if (retval) { - printk("STALLION: failed to register serial driver\n"); - goto err_frtty; - } - -/* - * Find any dynamically supported boards. That is via module load - * line options. - */ - for (i = stl_nrbrds; i < stl_nargs; i++) { - memset(&conf, 0, sizeof(conf)); - if (stl_parsebrd(&conf, stl_brdsp[i]) == 0) - continue; - if ((brdp = stl_allocbrd()) == NULL) - continue; - brdp->brdnr = i; - brdp->brdtype = conf.brdtype; - brdp->ioaddr1 = conf.ioaddr1; - brdp->ioaddr2 = conf.ioaddr2; - brdp->irq = conf.irq; - brdp->irqtype = conf.irqtype; - stl_brds[brdp->brdnr] = brdp; - if (stl_brdinit(brdp)) { - stl_brds[brdp->brdnr] = NULL; - kfree(brdp); - } else { - for (j = 0; j < brdp->nrports; j++) - tty_register_device(stl_serial, - brdp->brdnr * STL_MAXPORTS + j, NULL); - stl_nrbrds = i + 1; - } - } - - /* this has to be _after_ isa finding because of locking */ - retval = pci_register_driver(&stl_pcidriver); - if (retval && stl_nrbrds == 0) { - printk(KERN_ERR "STALLION: can't register pci driver\n"); - goto err_unrtty; - } - -/* - * Set up a character driver for per board stuff. This is mainly used - * to do stats ioctls on the ports. - */ - if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem)) - printk("STALLION: failed to register serial board device\n"); - - stallion_class = class_create(THIS_MODULE, "staliomem"); - if (IS_ERR(stallion_class)) - printk("STALLION: failed to create class\n"); - for (i = 0; i < 4; i++) - device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i), - NULL, "staliomem%d", i); - - return 0; -err_unrtty: - tty_unregister_driver(stl_serial); -err_frtty: - put_tty_driver(stl_serial); -err: - return retval; -} - -static void __exit stallion_module_exit(void) -{ - struct stlbrd *brdp; - unsigned int i, j; - - pr_debug("cleanup_module()\n"); - - printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle, - stl_drvversion); - -/* - * Free up all allocated resources used by the ports. This includes - * memory and interrupts. As part of this process we will also do - * a hangup on every open port - to try to flush out any processes - * hanging onto ports. - */ - for (i = 0; i < stl_nrbrds; i++) { - if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) - continue; - for (j = 0; j < brdp->nrports; j++) - tty_unregister_device(stl_serial, - brdp->brdnr * STL_MAXPORTS + j); - } - - for (i = 0; i < 4; i++) - device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i)); - unregister_chrdev(STL_SIOMEMMAJOR, "staliomem"); - class_destroy(stallion_class); - - pci_unregister_driver(&stl_pcidriver); - - stl_free_isabrds(); - - tty_unregister_driver(stl_serial); - put_tty_driver(stl_serial); -} - -module_init(stallion_module_init); -module_exit(stallion_module_exit); - -MODULE_AUTHOR("Greg Ungerer"); -MODULE_DESCRIPTION("Stallion Multiport Serial Driver"); -MODULE_LICENSE("GPL"); -- cgit v0.10.2 From ee430f16251de889ddf8e303970713d9fba9a3f5 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 14 Jun 2011 19:12:26 +0900 Subject: serial: samsung: Fix unintended usage of uart port 0 as console In s3c24xx_serial_console_setup function, if the uart port that is being setup as a console has not been initialized, an error can be returned instead of using uart port 0 as the default console port. The uart port that was intended to be used as a console could be initialized at a later point during boot and then registered as a console. This will avoid using uart port 0 as a unintended console port. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index f66f648..014c1c3 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1416,10 +1416,8 @@ s3c24xx_serial_console_setup(struct console *co, char *options) /* is the port configured? */ - if (port->mapbase == 0x0) { - co->index = 0; - port = &s3c24xx_serial_ports[co->index].port; - } + if (port->mapbase == 0x0) + return -ENODEV; cons_uart = port; -- cgit v0.10.2 From 719c0c590609809365c6f3da2f923cd84dc99113 Mon Sep 17 00:00:00 2001 From: Johannes Stezenbach Date: Thu, 7 Jul 2011 08:18:18 +0200 Subject: compat_ioctl: fix make headers_check regression Fix headers_check error introduced by 390192b30057: include/linux/fd.h:6: included file 'linux/compat.h' is not exported Signed-off-by: Johannes Stezenbach Signed-off-by: Jens Axboe diff --git a/include/linux/fd.h b/include/linux/fd.h index c6a68d0..72202b1 100644 --- a/include/linux/fd.h +++ b/include/linux/fd.h @@ -3,7 +3,6 @@ #include #include -#include /* New file layout: Now the ioctl definitions immediately follow the * definitions of the structures that they use */ @@ -378,7 +377,11 @@ struct floppy_raw_cmd { #define FDEJECT _IO(2, 0x5a) /* eject the disk */ + +#ifdef __KERNEL__ #ifdef CONFIG_COMPAT +#include + struct compat_floppy_struct { compat_uint_t size; compat_uint_t sect; @@ -394,5 +397,6 @@ struct compat_floppy_struct { #define FDGETPRM32 _IOR(2, 0x04, struct compat_floppy_struct) #endif +#endif #endif -- cgit v0.10.2 From 9bb7fa1e6598e73172499f6120dad9bf59bb3844 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 25 May 2011 21:55:38 +0800 Subject: ARM: mxs_defconfig: Change CONFIG_RTC_CLASS 'm' to 'y' The patch fixes the warning below. arch/arm/configs/mxs_defconfig:92:warning: symbol value 'm' invalid for RTC_CLASS Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 2bf2243..5a6ff7c 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -89,7 +89,7 @@ CONFIG_DISPLAY_SUPPORT=m # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_MXS=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=m CONFIG_DMADEVICES=y CONFIG_MXS_DMA=y -- cgit v0.10.2 From 38c7364917650e809945a4ad1b703f333564905e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 11:11:34 -0300 Subject: mx51: Let USB Storage be built by default Let USB Storage be built by default. Also select NLS_ISO8859 so that the USB device can be mounted. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index 0ace16c..88c5802 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig @@ -106,6 +106,7 @@ CONFIG_GPIO_SYSFS=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_MXC=y +CONFIG_USB_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK=m CONFIG_MMC_SDHCI=m @@ -145,7 +146,7 @@ CONFIG_ROOT_NFS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y CONFIG_MAGIC_SYSRQ=y -- cgit v0.10.2 From f2abaae42eaf9ee617d8ea59090306da82f956c7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 4 Jun 2011 13:35:00 -0300 Subject: ARM: mx53: Fix alternate modes for MX53_PAD_PATA_DATA6 MX53_PAD_PATA_DATA6 can have the following alternate modes: PATA_DATA_6: mode 0 GPIO2_6: mode 1 EMI_NANDF_D_6: mode 3 ESDHC4_DAT6 mode 4 GPU3d_GPU_DEBUG_OUT_6 mode 5 IPU_DIAG_BUS_6 mode 6 Fix the modes accordingly. Signed-off-by: Fabio Estevam Signed-off-by: Dinh Nguyen Acked-by: Olof Johansson Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index e95d9cb..50b88a4 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h @@ -958,12 +958,12 @@ #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) -- cgit v0.10.2 From 2aee401e03da21e81ed995dda6f8e8126058f822 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 3 Jun 2011 16:10:15 -0300 Subject: ARM: mx53: Fix the chip select addresses MX53 has 4 chip selects (CS0 - CS3) and the valid combinations are: - CS0 (128MB) - CS0 (64MB), CS1 (64MB) - CS0 (64MB), CS1 (32MB), CS2 (32MB) - CS0 (32MB), CS1 (32MB), CS2 (32MB) , CS3 (32MB) Fix these addresses and also take into account all the four possibilities. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 9d2a1ef..5a2104e 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -147,12 +147,12 @@ */ #define MX53_CSD0_BASE_ADDR 0x90000000 #define MX53_CSD1_BASE_ADDR 0xA0000000 -#define MX53_CS0_BASE_ADDR 0xB0000000 -#define MX53_CS1_BASE_ADDR 0xB8000000 -#define MX53_CS2_BASE_ADDR 0xC0000000 -#define MX53_CS3_BASE_ADDR 0xC8000000 -#define MX53_CS4_BASE_ADDR 0xCC000000 -#define MX53_CS5_BASE_ADDR 0xCE000000 +#define MX53_CS0_BASE_ADDR 0xF0000000 +#define MX53_CS1_32MB_BASE_ADDR 0xF2000000 +#define MX53_CS1_64MB_BASE_ADDR 0xF4000000 +#define MX53_CS2_64MB_BASE_ADDR 0xF4000000 +#define MX53_CS2_96MB_BASE_ADDR 0xF6000000 +#define MX53_CS3_BASE_ADDR 0xF6000000 #define MX53_IO_P2V(x) IMX_IO_P2V(x) #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) -- cgit v0.10.2 From 9333d8731f677e54d5dc28a1652d0879096d8537 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 8 Jun 2011 17:56:38 +0200 Subject: ARM: mx53: Fix the base addresses for the DDR memory regions Signed-off-by: Marc Kleine-Budde Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 5a2104e..e14a4f0 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -145,8 +145,8 @@ /* * Memory regions and CS */ -#define MX53_CSD0_BASE_ADDR 0x90000000 -#define MX53_CSD1_BASE_ADDR 0xA0000000 +#define MX53_CSD0_BASE_ADDR 0x70000000 +#define MX53_CSD1_BASE_ADDR 0xB0000000 #define MX53_CS0_BASE_ADDR 0xF0000000 #define MX53_CS1_32MB_BASE_ADDR 0xF2000000 #define MX53_CS1_64MB_BASE_ADDR 0xF4000000 -- cgit v0.10.2 From 98618cfe22a5dbb87c0deb341734436aeecd51bf Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:23 -0300 Subject: ARM: mach-imx/mx27_3ds: Use the standard i.MX macro for GPIO numbering Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 6e1accf..c60cd33 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -42,10 +42,10 @@ #include "devices-imx27.h" -#define SD1_EN_GPIO (GPIO_PORTB + 25) -#define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) -#define SPI2_SS0 (GPIO_PORTD + 21) -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) +#define SD1_EN_GPIO IMX_GPIO_NR(2, 25) +#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) +#define SPI2_SS0 IMX_GPIO_NR(4, 21) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) static const int mx27pdk_pins[] __initconst = { /* UART1 */ -- cgit v0.10.2 From b2a08e3e46f594ad605c9b5f5fce6b9f36a9a3eb Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 20 Jun 2011 10:37:13 -0300 Subject: ARM: mach-imx/mx31_3ds: Fix IOMUX for SPI1 signals Original code was assuming that the CSPI1 pins on the MX31PDK were the primary pin function, which is incorrect. On MX31PDK board these are the pins that provide CSPI1 functionality: DSR_DCE1 (ALT mode 1) --> CSPI1_CLK RI_DCE1 (ALT mode 1) --> CSPI1_RDY DTR_DTE1 -->CSI1_MOSI DSR_DTE1 --> CSPI1_MISO DTR_DCE2 ---> CSPI1_SS2 The 3 IOMUX settings above are done via GPR as per Table A-1 of the MX31RM. This patch fixes the CSPI1 IOMUX and makes the LCD to be functional. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 9b98244..62983bd 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -53,11 +53,8 @@ static int mx31_3ds_pins[] = { MX31_PIN_RXD1__RXD1, IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), /*SPI0*/ - MX31_PIN_CSPI1_SCLK__SCLK, - MX31_PIN_CSPI1_MOSI__MOSI, - MX31_PIN_CSPI1_MISO__MISO, - MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, - MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */ + IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1), + IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1), /* SPI 1 */ MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_MOSI__MOSI, @@ -689,6 +686,9 @@ static void __init mx31_3ds_init(void) { int ret; + /* Configure SPI1 IOMUX */ + mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true); + mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), "mx31_3ds"); -- cgit v0.10.2 From 581f84e24b45ab871ae5f15f9290261c7226ffa9 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:37 -0300 Subject: mxc: iomuxv1: Do not use gpio_request when setting the pin as GPIO When setting the IOMUX of multiple pins via mxc_gpio_setup_multiple_pins, gpio_request is called and this prevents subsequent calls of gpio_request done by drivers to succeed. Remove gpio_request call from mxc_gpio_setup_multiple_pins function. As gpio_request is removed from mxc_gpio_setup_multiple_pins, there is no need to have mxc_gpio_release_multiple_pins anymore, so remove this function. Tested on a mx27_3ds board and after applying this patch it is possible to define all the IOMUX setup in a static array Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index c07d302..253d64d 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h @@ -98,7 +98,6 @@ extern int mxc_gpio_mode(int gpio_mode); extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, const char *label); -extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); extern int __init imx_iomuxv1_init(void __iomem *base, int numports); diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index 3238c10..d76f3ac 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c @@ -172,45 +172,13 @@ static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, const char *label) { - size_t i; int ret; - for (i = 0; i < count; ++i) { - unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); - - ret = gpio_request(gpio, label); - if (ret) - goto err_gpio_request; - } - ret = imx_iomuxv1_setup_multiple(pin_list, count); - if (ret) - goto err_setup; - - return 0; - -err_setup: - BUG_ON(i != count); - -err_gpio_request: - mxc_gpio_release_multiple_pins(pin_list, i); - return ret; } EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); -void mxc_gpio_release_multiple_pins(const int *pin_list, int count) -{ - size_t i; - - for (i = 0; i < count; ++i) { - unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); - - gpio_free(gpio); - } -} -EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); - int __init imx_iomuxv1_init(void __iomem *base, int numports) { imx_iomuxv1_baseaddr = base; -- cgit v0.10.2 From aec250dc123be14805d51d29d19bf9c3abf733fa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:24 -0300 Subject: ARM: mach-imx/mx27_3ds: Fix regulator support Fix the 2.8V (VMMC1) and 1.8V (VGEN) voltage generation on mx27_3ds. Also configure the IOMUX for the PMIC interrupt pin and for the CSPI chip select that is connected to the MC13783 PMIC. In order to get the voltage for the LCD (2.8V and 1.8V) it is also necessary to turn on GPO1 and GPO3 supplies because they are connected to switches that enable these two voltages. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index c60cd33..e7965ec 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -46,6 +46,7 @@ #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) +#define PMIC_INT IMX_GPIO_NR(3, 14) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -98,9 +99,12 @@ static const int mx27pdk_pins[] __initconst = { PD22_PF_CSPI2_SCLK, PD23_PF_CSPI2_MISO, PD24_PF_CSPI2_MOSI, + SPI2_SS0 | GPIO_GPIO | GPIO_OUT, /* I2C1 */ PD17_PF_I2C_DATA, PD18_PF_I2C_CLK, + /* PMIC INT */ + PMIC_INT | GPIO_GPIO | GPIO_IN, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -193,6 +197,13 @@ static int __init mx27_3ds_otg_mode(char *options) __setup("otg_mode=", mx27_3ds_otg_mode); /* Regulators */ +static struct regulator_init_data gpo_init = { + .constraints = { + .boot_on = 1, + .always_on = 1, + } +}; + static struct regulator_consumer_supply vmmc1_consumers[] = { REGULATOR_SUPPLY("lcd_2v8", NULL), }; @@ -201,7 +212,9 @@ static struct regulator_init_data vmmc1_init = { .constraints = { .min_uV = 2800000, .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), .consumer_supplies = vmmc1_consumers, @@ -228,6 +241,12 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { }, { .id = MC13783_REG_VGEN, .init_data = &vgen_init, + }, { + .id = MC13783_REG_GPO1, /* Turn on 1.8V */ + .init_data = &gpo_init, + }, { + .id = MC13783_REG_GPO3, /* Turn on 3.3V */ + .init_data = &gpo_init, }, }; -- cgit v0.10.2 From 6cecabb39122a859076d0bb23f8da4e00ece38de Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 11:31:00 -0300 Subject: ARM: mxc: iomux-v1: Fix build warning Fix the following warning: CC arch/arm/plat-mxc/iomux-v1.o arch/arm/plat-mxc/iomux-v1.c: In function 'mxc_gpio_setup_multiple_pins': arch/arm/plat-mxc/iomux-v1.c:160: warning: 'ret' may be used uninitialized in this function arch/arm/plat-mxc/iomux-v1.c:160: note: 'ret' was declared here Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index d76f3ac..1f73963 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c @@ -157,7 +157,7 @@ EXPORT_SYMBOL(mxc_gpio_mode); static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) { size_t i; - int ret; + int ret = 0; for (i = 0; i < count; ++i) { ret = mxc_gpio_mode(list[i]); -- cgit v0.10.2 From 420766a97a93279ef5ccc096aa55ef8e03000e08 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:26 +0800 Subject: ARM: mxc: imx-sdma device gets 16K iosize than 4K The sdma on all imx soc gets 16K IO space not 4K. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index b130f60..222e439 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -57,7 +57,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_sdma( struct resource res[] = { { .start = data->iobase, - .end = data->iobase + SZ_4K - 1, + .end = data->iobase + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { .start = data->irq, -- cgit v0.10.2 From aa5f380cb0ba36f396cc7e8a6857e898ec654466 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:27 +0800 Subject: ARM: mxc: sdma on imx25 is a V2 block The sdma on soc imx25 is not a V1 but V2 block. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 222e439..1c0ba53 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -33,7 +33,7 @@ struct imx_imx_sdma_data { #ifdef CONFIG_SOC_IMX25 struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); + imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 0); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX31 -- cgit v0.10.2 From ee8814db9642713982e793cf3ae48ac0aef58433 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:28 +0800 Subject: ARM: mxc: change imx-dma default to_version to 1 The value 0 is not a valid TO version number. With the current code, imx-sdma driver will try to load firmware sdma-imx25-to0.bin, which is obviously not a good name. Instead, sdma-imx25-to1.bin makes much more sense. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 1c0ba53..c2712b7 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -33,22 +33,22 @@ struct imx_imx_sdma_data { #ifdef CONFIG_SOC_IMX25 struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 0); + imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX31 struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); + imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); + imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); #endif /* ifdef CONFIG_SOC_IMX35 */ #ifdef CONFIG_SOC_IMX51 struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); + imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); #endif /* ifdef CONFIG_SOC_IMX51 */ static struct platform_device __init __maybe_unused *imx_add_imx_sdma( -- cgit v0.10.2 From 187e5f26a853448add574b7efaba3767267dbc15 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:29 +0800 Subject: ARM: mxc: imx-dma on imx25 has no other TO version but TO1 The imx25 sdma script only gets TO1 version, so there is no need to encode "to1" in the variable name. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index c2712b7..c64f015 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -77,7 +77,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) } #ifdef CONFIG_ARCH_MX25 -static struct sdma_script_start_addrs addr_imx25_to1 = { +static struct sdma_script_start_addrs addr_imx25 = { .ap_2_ap_addr = 729, .uart_2_mcu_addr = 904, .per_2_app_addr = 1255, @@ -165,7 +165,7 @@ static int __init imxXX_add_imx_dma(void) #if defined(CONFIG_SOC_IMX25) if (cpu_is_mx25()) { - imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25_to1; + imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; ret = imx_add_imx_sdma(&imx25_imx_sdma_data); } else #endif -- cgit v0.10.2 From 429a035d1d3f47963624baec81db9bdf81e62fb2 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:10 -0300 Subject: ARM: mx51: Fix the address space length for SSI On MX51 the address space length for SSI is 16KB. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 2569c8d..66b8593 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -69,7 +69,7 @@ const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { #ifdef CONFIG_SOC_IMX51 const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { #define imx51_imx_ssi_data_entry(_id, _hwid) \ - imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) + imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_16K) imx51_imx_ssi_data_entry(0, 1), imx51_imx_ssi_data_entry(1, 2), imx51_imx_ssi_data_entry(2, 3), -- cgit v0.10.2 From 425933b30b0ccfac58065bca6c853ea627443cdf Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Fri, 24 Jun 2011 10:52:56 -0700 Subject: MXC: iomux-v3: correct NO_PAD_CTRL definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit iomux-v3.c uses NO_PAD_CTRL as a 32 bit value so it should not be shifted left by MUX_PAD_CTRL_SHIFT(41) Previously, anything requesting NO_PAD_CTRL would get their pad control register set to 0. Since it is a pad control mask, place it with the other mask values. Signed-off-by: Troy Kisky Acked-by: Lothar Waßmann Tested-by: Lothar Waßmann Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 82620af..ebbce33 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h @@ -66,7 +66,6 @@ typedef u64 iomux_v3_cfg_t; #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) #define MUX_PAD_CTRL_SHIFT 41 #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) -#define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16)) #define MUX_SEL_INPUT_SHIFT 58 #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) @@ -85,6 +84,7 @@ typedef u64 iomux_v3_cfg_t; * Use to set PAD control */ +#define NO_PAD_CTRL (1 << 16) #define PAD_CTL_DVS (1 << 13) #define PAD_CTL_HYS (1 << 8) -- cgit v0.10.2 From d7336b837f4234cf897cb83794c68d43d2307660 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 28 Jun 2011 12:58:36 -0300 Subject: ARM: mx53: Fix some interrupts marked as reserved. Mark the actual interrupt source for some interrupts currently marked as reserved. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index e14a4f0..74cd093 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -233,7 +233,7 @@ #define MX53_INT_ESDHC2 2 #define MX53_INT_ESDHC3 3 #define MX53_INT_ESDHC4 4 -#define MX53_INT_RESV5 5 +#define MX53_INT_DAP 5 #define MX53_INT_SDMA 6 #define MX53_INT_IOMUX 7 #define MX53_INT_NFC 8 @@ -262,8 +262,8 @@ #define MX53_INT_UART1 31 #define MX53_INT_UART2 32 #define MX53_INT_UART3 33 -#define MX53_INT_RESV34 34 -#define MX53_INT_RESV35 35 +#define MX53_INT_RTC 34 +#define MX53_INT_PTP 35 #define MX53_INT_ECSPI1 36 #define MX53_INT_ECSPI2 37 #define MX53_INT_CSPI 38 @@ -293,8 +293,8 @@ #define MX53_INT_I2C1 62 #define MX53_INT_I2C2 63 #define MX53_INT_I2C3 64 -#define MX53_INT_RESV65 65 -#define MX53_INT_RESV66 66 +#define MX53_INT_MLB 65 +#define MX53_INT_ASRC 66 #define MX53_INT_SPDIF 67 #define MX53_INT_SIM_DAT 68 #define MX53_INT_IIM 69 -- cgit v0.10.2 From b9b65860e77cc4db913cbfd4340279f331620cc3 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 30 Jun 2011 21:35:03 +0800 Subject: ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix below build error: CC arch/arm/mach-mxs/devices/platform-mxsfb.o arch/arm/mach-mxs/devices/platform-mxsfb.c: In function 'mx23_add_mxsfb': arch/arm/mach-mxs/devices/platform-mxsfb.c:27: error: implicit declaration of function 'DMA_BIT_MASK' make[2]: *** [arch/arm/mach-mxs/devices/platform-mxsfb.o] Error 1 make[1]: *** [arch/arm/mach-mxs/devices] Error 2 make: *** [arch/arm/mach-mxs] Error 2 Signed-off-by: Axel Lin Tested-by: Uwe Kleine-König Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mxs/devices/platform-mxsfb.c b/arch/arm/mach-mxs/devices/platform-mxsfb.c index bf72c9b..5a75b71 100644 --- a/arch/arm/mach-mxs/devices/platform-mxsfb.c +++ b/arch/arm/mach-mxs/devices/platform-mxsfb.c @@ -5,6 +5,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ +#include #include #include #include -- cgit v0.10.2 From 23e99d4cae02fb782eece2101d9ea67c77920346 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 5 Jul 2011 12:06:36 +0200 Subject: ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pins are actually used (not in mainline yet): D4 -> SSP2_D0 D5 -> GPIO D6 -> GPIO D7 -> GPIO for owire so their pinmapping for SSP0 is wrong. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index b65e371..068e540 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -101,14 +101,6 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_DATA3__SSP0_D3 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA4__SSP0_D4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA5__SSP0_D5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA6__SSP0_D6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA7__SSP0_D7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_CMD__SSP0_CMD | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | -- cgit v0.10.2 From 9d73242458d9a2fe26e2e240488063d414eacb1c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Lothar=20Wa=C3=9Fmann?= Date: Mon, 4 Jul 2011 15:52:17 +0200 Subject: mach-mx5: fix the I2C clock parents MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The clock from which the I2C timing is derived is the ipg_perclk not ipg_clk. I2C bus frequency was lower by a factor of ~8 due to the clock divider calculation being based on 66.5MHz IPG clock while the bus actually uses 8MHz ipg_perclk. Kernel version: 3.0.0-rc2 branch 'imx-for-next' of git://git.pengutronix.de/git/imx/linux-2.6 Signed-off-by: Lothar Waßmann Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 6b89c1b..cea2bba 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1274,9 +1274,9 @@ DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, /* I2C */ DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, - NULL, NULL, &ipg_clk, NULL); + NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, - NULL, NULL, &ipg_clk, NULL); + NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, NULL, NULL, &ipg_clk, NULL); -- cgit v0.10.2 From 6584cb8825e4c74915a5a13756b1902523391d78 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 6 Jul 2011 11:18:33 +0200 Subject: ARM i.MX dma: Fix burstsize settings dmaengine expects the maxburst parameter in words, not bytes. The imxdma driver and its users do this wrong. Fix this. As a side note the imx-pcm-dma-mx2 driver was 'fixed' to work with imx-dma. This broke the driver with imx-sdma support which correctly takes the maxburst parameter in words. This patch puts the sdma based sound back to work. Signed-off-by: Sascha Hauer diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index e18eaab..d99f71c 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c @@ -135,7 +135,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, if (ret) return ret; - imx_dma_config_burstlen(imxdmac->imxdma_channel, imxdmac->watermark_level); + imx_dma_config_burstlen(imxdmac->imxdma_channel, + imxdmac->watermark_level * imxdmac->word_size); return 0; default: diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index cc20e02..14aa213 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -715,13 +715,13 @@ static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) int burstlen, ret; /* - * use burstlen of 64 in 4 bit mode (--> reg value 0) - * use burstlen of 16 in 1 bit mode (--> reg value 16) + * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0) + * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16) */ if (ios->bus_width == MMC_BUS_WIDTH_4) - burstlen = 64; - else burstlen = 16; + else + burstlen = 4; if (mxcmci_use_dma(host) && burstlen != host->burstlen) { host->burstlen = burstlen; diff --git a/sound/soc/imx/imx-pcm-dma-mx2.c b/sound/soc/imx/imx-pcm-dma-mx2.c index aab7765..b2ed764 100644 --- a/sound/soc/imx/imx-pcm-dma-mx2.c +++ b/sound/soc/imx/imx-pcm-dma-mx2.c @@ -110,12 +110,12 @@ static int imx_ssi_dma_alloc(struct snd_pcm_substream *substream, slave_config.direction = DMA_TO_DEVICE; slave_config.dst_addr = dma_params->dma_addr; slave_config.dst_addr_width = buswidth; - slave_config.dst_maxburst = dma_params->burstsize * buswidth; + slave_config.dst_maxburst = dma_params->burstsize; } else { slave_config.direction = DMA_FROM_DEVICE; slave_config.src_addr = dma_params->dma_addr; slave_config.src_addr_width = buswidth; - slave_config.src_maxburst = dma_params->burstsize * buswidth; + slave_config.src_maxburst = dma_params->burstsize; } ret = dmaengine_slave_config(iprtd->dma_chan, &slave_config); -- cgit v0.10.2 From 58f45e3c6f4fd2b9b9d7d43af71409a79a4b4cf6 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Wed, 6 Jul 2011 19:56:03 -0700 Subject: ARM: i.MX53: Fix IOMUX type o's ", o" was used for ", 0" ", 17" was used for ", 7 | 0x10" Signed-off-by: Troy Kisky Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index 50b88a4..e11dd5f 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h @@ -39,7 +39,7 @@ #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) -#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, o, 0x0, 0, 0) +#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, 0, 0x0, 0, 0) #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) @@ -697,7 +697,7 @@ #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) -#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 17, 0x0, 0, 0) +#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) -- cgit v0.10.2 From 2e7b1bfcb98dd232faf85b4a0a2611a49454c2ea Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 10:54:35 -0300 Subject: ARM: mx5/mx51_babbage: Move GPIO initialization for USB PHY Reset line to common place The USB PHY Reset GPIO can be configured in the same place as the other GPIOs. While at it rename the pin as BABBAGE_USB_PHY_RESET to make clearer its purpose. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index c7b3fab..7b919bc 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -36,7 +36,7 @@ #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) -#define BABBAGE_PHY_RESET IMX_GPIO_NR(2, 5) +#define BABBAGE_USB_PHY_RESET IMX_GPIO_NR(2, 5) #define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14) #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) @@ -110,6 +110,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { /* USB HUB reset line*/ MX51_PAD_GPIO1_7__GPIO1_7, + /* USB PHY reset line */ + MX51_PAD_EIM_D21__GPIO2_5, + /* FEC */ MX51_PAD_EIM_EB2__FEC_MDIO, MX51_PAD_EIM_EB3__FEC_RDATA1, @@ -172,7 +175,6 @@ static struct imxi2c_platform_data babbage_hsi2c_data = { static int gpio_usbh1_active(void) { iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; - iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5; int ret; /* Set USBH1_STP to GPIO and toggle it */ @@ -189,14 +191,13 @@ static int gpio_usbh1_active(void) gpio_free(BABBAGE_USBH1_STP); /* De-assert USB PHY RESETB */ - mxc_iomux_v3_setup_pad(phyreset_gpio); - ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset"); + ret = gpio_request(BABBAGE_USB_PHY_RESET, "phy_reset"); if (ret) { pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); return ret; } - gpio_direction_output(BABBAGE_PHY_RESET, 1); + gpio_direction_output(BABBAGE_USB_PHY_RESET, 1); return 0; } -- cgit v0.10.2 From 72370a5cc28f9efc94a4d7d7dff2ebcb76139088 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 10:54:36 -0300 Subject: ARM: mx5/mx51_babbage: Use gpio_request_array for USBH1 pins Instead of using gpio_request followed by gpio_direction_output use gpio_request_array when requesting multiple pins. Also fixed the location of the delay for the reset and make the BABBAGE_USB_PHY_RESET to toggle. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 7b919bc..770f74b5 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -172,6 +172,11 @@ static struct imxi2c_platform_data babbage_hsi2c_data = { .bitrate = 400000, }; +static struct gpio mx51_babbage_usbh1_gpios[] = { + { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" }, + { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" }, +}; + static int gpio_usbh1_active(void) { iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; @@ -179,25 +184,19 @@ static int gpio_usbh1_active(void) /* Set USBH1_STP to GPIO and toggle it */ mxc_iomux_v3_setup_pad(usbh1stp_gpio); - ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp"); + ret = gpio_request_array(mx51_babbage_usbh1_gpios, + ARRAY_SIZE(mx51_babbage_usbh1_gpios)); if (ret) { - pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret); + pr_debug("failed to get USBH1 pins: %d\n", ret); return ret; } - gpio_direction_output(BABBAGE_USBH1_STP, 0); - gpio_set_value(BABBAGE_USBH1_STP, 1); - msleep(100); - gpio_free(BABBAGE_USBH1_STP); - - /* De-assert USB PHY RESETB */ - ret = gpio_request(BABBAGE_USB_PHY_RESET, "phy_reset"); - if (ret) { - pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); - return ret; - } - gpio_direction_output(BABBAGE_USB_PHY_RESET, 1); + msleep(100); + gpio_set_value(BABBAGE_USBH1_STP, 1); + gpio_set_value(BABBAGE_USB_PHY_RESET, 1); + gpio_free_array(mx51_babbage_usbh1_gpios, + ARRAY_SIZE(mx51_babbage_usbh1_gpios)); return 0; } -- cgit v0.10.2 From 47e837b54c01083ce153493882fb8d74d108ae4a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Sat, 28 May 2011 21:05:01 +0200 Subject: ARM: imx: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of per machine struct platform_device definitions and allows to move the platform data and led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 59c97a3..e8dd22f 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -167,6 +167,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD bool "Eukrea MBIMXSD development board" select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_SSI + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. @@ -265,6 +266,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMX27 evaluation board. @@ -403,6 +405,7 @@ config MACH_MX31LITE select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_RTC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help Include support for MX31 LITEKIT platform. This includes specific configurations for the board and its peripherals. @@ -471,6 +474,7 @@ config MACH_MX31MOBOARD select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER select MXC_ULPI if USB_ULPI help Include support for mx31moboard platform. This includes specific @@ -577,6 +581,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IPU_CORE + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 5911281..5db3e14 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -112,7 +112,7 @@ eukrea_mbimx27_keymap_data __initconst = { .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), }; -static struct gpio_led gpio_leds[] = { +static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -127,17 +127,10 @@ static struct gpio_led gpio_leds[] = { }, }; -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, +static const struct gpio_led_platform_data + eukrea_mbimx27_gpio_led_info __initconst = { + .leds = eukrea_mbimx27_gpio_leds, + .num_leds = ARRAY_SIZE(eukrea_mbimx27_gpio_leds), }; static struct imx_fb_videomode eukrea_mbimx27_modes[] = { @@ -293,10 +286,6 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = { }, }; -static struct platform_device *platform_devices[] __initdata = { - &leds_gpio, -}; - static const struct imxmmc_platform_data sdhc_pdata __initconst = { .dat3_card_detect = 1, }; @@ -377,5 +366,5 @@ void __init eukrea_mbimx27_baseboard_init(void) imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index f9ef04a..01ebcb3 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -173,7 +173,7 @@ static struct platform_device eukrea_mbimxsd_lcd_powerdev = { .dev.platform_data = &eukrea_mbimxsd_lcd_power_data, }; -static struct gpio_led eukrea_mbimxsd_leds[] = { +static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -182,19 +182,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -212,7 +205,6 @@ static const struct gpio_keys_platform_data }; static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, &eukrea_mbimxsd_lcd_powerdev, }; @@ -287,5 +279,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void) ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index 4909ea0..558eb52 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c @@ -193,19 +193,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -223,7 +216,6 @@ static const struct gpio_keys_platform_data }; static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, &eukrea_mbimxsd_lcd_powerdev, }; @@ -299,5 +291,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void) ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index eaa51e4..abe688b 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -425,7 +425,7 @@ static int __init moboard_usbh2_init(void) return 0; } -static struct gpio_led mx31moboard_leds[] = { +static const struct gpio_led mx31moboard_leds[] __initconst = { { .name = "coreboard-led-0:red:running", .default_trigger = "heartbeat", @@ -442,26 +442,17 @@ static struct gpio_led mx31moboard_leds[] = { }, }; -static struct gpio_led_platform_data mx31moboard_led_pdata = { +static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { .num_leds = ARRAY_SIZE(mx31moboard_leds), .leds = mx31moboard_leds, }; -static struct platform_device mx31moboard_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx31moboard_led_pdata, - }, -}; - static const struct ipu_platform_data mx3_ipu_data __initconst = { .irq_base = MXC_IPU_IRQ_START, }; static struct platform_device *devices[] __initdata = { &mx31moboard_flash, - &mx31moboard_leds_device, }; static struct mx3_camera_pdata camera_pdata __initdata = { @@ -511,6 +502,7 @@ static void __init mx31moboard_init(void) "moboard"); platform_add_devices(devices, ARRAY_SIZE(devices)); + gpio_led_register_device(-1, &mx31moboard_led_pdata); imx31_add_imx_uart0(&uart0_pdata); imx31_add_imx_uart4(&uart4_pdata); diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 5aa053e..bf0fb87 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c @@ -161,7 +161,7 @@ static const struct spi_imx_master spi0_pdata __initconst = { /* GPIO LEDs */ -static struct gpio_led litekit_leds[] = { +static const struct gpio_led litekit_leds[] __initconst = { { .name = "GPIO0", .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE), @@ -176,19 +176,12 @@ static struct gpio_led litekit_leds[] = { } }; -static struct gpio_led_platform_data litekit_led_platform_data = { +static const struct gpio_led_platform_data + litekit_led_platform_data __initconst = { .leds = litekit_leds, .num_leds = ARRAY_SIZE(litekit_leds), }; -static struct platform_device litekit_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &litekit_led_platform_data, - }, -}; - void __init mx31lite_db_init(void) { mxc_iomux_setup_multiple_pins(litekit_db_board_pins, @@ -197,7 +190,7 @@ void __init mx31lite_db_init(void) imx31_add_imx_uart0(&uart_pdata); imx31_add_mxc_mmc(0, &mmc_pdata); imx31_add_spi_imx0(&spi0_pdata); - platform_device_register(&litekit_led_device); + gpio_led_register_device(-1, &litekit_led_platform_data); imx31_add_imx2_wdt(NULL); imx31_add_mxc_rtc(NULL); } -- cgit v0.10.2 From 5b8d628ca4036e76a2d892f2c1d01b58d232809e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Sat, 28 May 2011 21:05:02 +0200 Subject: ARM: mx5: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of per machine struct platform_device definitions and allows to move the platform data and led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 799fbc4..f25e9d7 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -109,6 +109,7 @@ config MACH_EUKREA_MBIMX51_BASEBOARD bool select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMX51 evaluation board. @@ -135,6 +136,7 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD prompt "Eukrea MBIMXSD development board" bool select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. @@ -151,6 +153,7 @@ config MX51_EFIKA_COMMON config MACH_MX51_EFIKAMX bool "Support MX51 Genesi Efika MX nettop" + select LEDS_GPIO_REGISTER select MX51_EFIKA_COMMON help Include support for Genesi Efika MX nettop. This includes specific @@ -158,6 +161,7 @@ config MACH_MX51_EFIKAMX config MACH_MX51_EFIKASB bool "Support MX51 Genesi Efika Smartbook" + select LEDS_GPIO_REGISTER select MX51_EFIKA_COMMON help Include support for Genesi Efika Smartbook. This includes specific diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index 6e36231..2400f6d 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -139,7 +139,7 @@ static void __init mx51_efikamx_board_id(void) } } -static struct gpio_led mx51_efikamx_leds[] = { +static struct gpio_led mx51_efikamx_leds[] __initdata = { { .name = "efikamx:green", .default_trigger = "default-on", @@ -157,19 +157,12 @@ static struct gpio_led mx51_efikamx_leds[] = { }, }; -static struct gpio_led_platform_data mx51_efikamx_leds_data = { +static const struct gpio_led_platform_data + mx51_efikamx_leds_data __initconst = { .leds = mx51_efikamx_leds, .num_leds = ARRAY_SIZE(mx51_efikamx_leds), }; -static struct platform_device mx51_efikamx_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx51_efikamx_leds_data, - }, -}; - static struct gpio_keys_button mx51_efikamx_powerkey[] = { { .code = KEY_POWER, @@ -248,7 +241,7 @@ static void __init mx51_efikamx_init(void) mx51_efikamx_leds[2].default_trigger = "mmc1"; } - platform_device_register(&mx51_efikamx_leds_device); + gpio_led_register_device(-1, &mx51_efikamx_leds_data); imx_add_gpio_keys(&mx51_efikamx_powerkey_data); if (system_rev == 0x11) { diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 474fc6e..28d6896 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c @@ -132,7 +132,7 @@ static void __init mx51_efikasb_usb(void) mxc_register_device(&mxc_usbh2_device, &usbh2_config); } -static struct gpio_led mx51_efikasb_leds[] = { +static const struct gpio_led mx51_efikasb_leds[] __initconst = { { .name = "efikasb:green", .default_trigger = "default-on", @@ -146,19 +146,12 @@ static struct gpio_led mx51_efikasb_leds[] = { }, }; -static struct gpio_led_platform_data mx51_efikasb_leds_data = { +static const struct gpio_led_platform_data + mx51_efikasb_leds_data __initconst = { .leds = mx51_efikasb_leds, .num_leds = ARRAY_SIZE(mx51_efikasb_leds), }; -static struct platform_device mx51_efikasb_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx51_efikasb_leds_data, - }, -}; - static struct gpio_keys_button mx51_efikasb_keys[] = { { .code = KEY_POWER, @@ -256,9 +249,8 @@ static void __init efikasb_board_init(void) mx51_efikasb_usb(); imx51_add_sdhci_esdhc_imx(1, NULL); - platform_device_register(&mx51_efikasb_leds_device); + gpio_led_register_device(-1, &mx51_efikasb_leds_data); imx_add_gpio_keys(&mx51_efikasb_keys_data); - } static void __init mx51_efikasb_timer_init(void) diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 97292d2..02ce720 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -37,7 +37,7 @@ #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) #define MBIMX51_LED3 IMX_GPIO_NR(3, 8) -static struct gpio_led mbimx51_leds[] = { +static const struct gpio_led mbimx51_leds[] __initconst = { { .name = "led0", .default_trigger = "heartbeat", @@ -64,23 +64,11 @@ static struct gpio_led mbimx51_leds[] = { }, }; -static struct gpio_led_platform_data mbimx51_leds_info = { +static const struct gpio_led_platform_data mbimx51_leds_info __initconst = { .leds = mbimx51_leds, .num_leds = ARRAY_SIZE(mbimx51_leds), }; -static struct platform_device mbimx51_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mbimx51_leds_info, - }, -}; - -static struct platform_device *devices[] __initdata = { - &mbimx51_leds_gpio, -}; - static iomux_v3_cfg_t mbimx51_pads[] = { /* UART2 */ MX51_PAD_UART2_RXD__UART2_RXD, @@ -204,7 +192,7 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_direction_output(MBIMX51_LED3, 1); gpio_free(MBIMX51_LED3); - platform_add_devices(devices, ARRAY_SIZE(devices)); + gpio_led_register_device(-1, &mbimx51_leds_info); imx51_add_imx_keypad(&mbimx51_map_data); diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c index 31c871e..2619239 100644 --- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c @@ -74,7 +74,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { #define GPIO_LED1 IMX_GPIO_NR(3, 30) #define GPIO_SWITCH1 IMX_GPIO_NR(3, 31) -static struct gpio_led eukrea_mbimxsd_leds[] = { +static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -83,19 +83,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -112,10 +105,6 @@ static const struct gpio_keys_platform_data .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons), }; -static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, -}; - static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -154,6 +143,6 @@ void __init eukrea_mbimxsd51_baseboard_init(void) i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } -- cgit v0.10.2 From 4daca0e0170b3996a403d10b6b5838a69785faeb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Sat, 28 May 2011 21:05:03 +0200 Subject: ARM: mxs/tx28: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This allows to move the led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Cc: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index f114960..162b0b0 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -55,6 +55,7 @@ config MACH_MX28EVK config MODULE_TX28 bool select SOC_IMX28 + select LEDS_GPIO_REGISTER select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 068e540..6766a12 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -109,7 +109,7 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; -static struct gpio_led tx28_stk5v3_leds[] = { +static const struct gpio_led tx28_stk5v3_leds[] __initconst = { { .name = "GPIO-LED", .default_trigger = "heartbeat", @@ -151,8 +151,7 @@ static void __init tx28_stk5v3_init(void) /* spi via ssp will be added when available */ spi_register_board_info(tx28_spi_board_info, ARRAY_SIZE(tx28_spi_board_info)); - mxs_add_platform_device("leds-gpio", 0, NULL, 0, - &tx28_stk5v3_led_data, sizeof(tx28_stk5v3_led_data)); + gpio_led_register_device(0, &tx28_stk5v3_led_data); mx28_add_mxs_i2c(0); i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); -- cgit v0.10.2 From c0450dfffcbc2b4949cfbaab2928a0828dbd6305 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:29:00 +0200 Subject: ARM i.MX: fix last user of iomux.h and remove it Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 7ae43b1..6864496 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include "devices-imx27.h" diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h deleted file mode 100644 index 3d226d7..0000000 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __MACH_IOMUX_H__ -#define __MACH_IOMUX_H__ - -/* This file will go away, please include mach/iomux-mx... directly */ - -#ifdef CONFIG_ARCH_MX1 -#include -#endif -#ifdef CONFIG_ARCH_MX2 -#include -#ifdef CONFIG_MACH_MX21 -#include -#endif -#ifdef CONFIG_MACH_MX27 -#include -#endif -#endif - -#endif /* __MACH_IOMUX_H__ */ -- cgit v0.10.2 From 5a145baa1a499845103cd566ee5fe509e042aa80 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:30:14 +0200 Subject: ARM i.MX: define CLOCK_TICK_RATE to bogus value We have a clocksource which renders CLOCK_TICK_RATE useless. Define it to a bogus value to get rid of some ifdeffery. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h index d61d5c7..10343d1 100644 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ b/arch/arm/plat-mxc/include/mach/timex.h @@ -16,16 +16,7 @@ #ifndef __ASM_ARCH_MXC_TIMEX_H__ #define __ASM_ARCH_MXC_TIMEX_H__ -#if defined CONFIG_ARCH_MX1 -#define CLOCK_TICK_RATE 16000000 -#elif defined CONFIG_ARCH_MX2 -#define CLOCK_TICK_RATE 13300000 -#elif defined CONFIG_ARCH_MX3 -#define CLOCK_TICK_RATE 16625000 -#elif defined CONFIG_ARCH_MX25 -#define CLOCK_TICK_RATE 16000000 -#elif defined CONFIG_ARCH_MX5 -#define CLOCK_TICK_RATE 8000000 -#endif +/* Bogus value */ +#define CLOCK_TICK_RATE 12345678 #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ -- cgit v0.10.2 From db279c1b8dc8b7da9d8de94a0ce103c0b9b8e1ae Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:38:51 +0200 Subject: ARM i.MX: remove SoC defines around header includes All soc specific header have proper namespace now and thus can be included at once. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 67d3e2b..a8bfd56 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -97,35 +97,17 @@ #include -#ifdef CONFIG_ARCH_MX5 #include #include #include -#endif - -#ifdef CONFIG_ARCH_MX3 #include #include #include -#endif - -#ifdef CONFIG_ARCH_MX2 -# include -# ifdef CONFIG_MACH_MX21 -# include -# endif -# ifdef CONFIG_MACH_MX27 -# include -# endif -#endif - -#ifdef CONFIG_ARCH_MX1 -# include -#endif - -#ifdef CONFIG_ARCH_MX25 -# include -#endif +#include +#include +#include +#include +#include #define imx_map_entry(soc, name, _type) { \ .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ -- cgit v0.10.2 From 6b66ef01f550040674798395ec8c1a9e9f55af9a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:41:35 +0200 Subject: ARM i.MX: dmav1: kill SoC ifdefs since we now can include all soc specific headers at once we do not need the ifdeffery anymore. Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c index 236f149..4d76f67 100644 --- a/arch/arm/mach-imx/dma-v1.c +++ b/arch/arm/mach-imx/dma-v1.c @@ -475,7 +475,6 @@ void imx_dma_enable(int channel) imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | CCR_ACRPT, DMA_CCR(channel)); -#ifdef CONFIG_ARCH_MX2 if ((cpu_is_mx21() || cpu_is_mx27()) && imxdma->sg && imx_dma_hw_chain(imxdma)) { imxdma->sg = sg_next(imxdma->sg); @@ -487,7 +486,6 @@ void imx_dma_enable(int channel) DMA_CCR(channel)); } } -#endif imxdma->in_use = 1; local_irq_restore(flags); @@ -518,7 +516,6 @@ void imx_dma_disable(int channel) } EXPORT_SYMBOL(imx_dma_disable); -#ifdef CONFIG_ARCH_MX2 static void imx_dma_watchdog(unsigned long chno) { struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; @@ -530,7 +527,6 @@ static void imx_dma_watchdog(unsigned long chno) if (imxdma->err_handler) imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); } -#endif static irqreturn_t dma_err_handler(int irq, void *dev_id) { @@ -654,10 +650,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) { int i, disr; -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) dma_err_handler(irq, dev_id); -#endif disr = imx_dmav1_readl(DMA_DISR); @@ -703,7 +697,6 @@ int imx_dma_request(int channel, const char *name) imxdma->name = name; local_irq_restore(flags); /* request_irq() can block */ -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) { ret = request_irq(MX2x_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", NULL); @@ -717,7 +710,6 @@ int imx_dma_request(int channel, const char *name) imxdma->watchdog.function = &imx_dma_watchdog; imxdma->watchdog.data = channel; } -#endif return ret; } @@ -744,10 +736,8 @@ void imx_dma_free(int channel) imx_dma_disable(channel); imxdma->name = NULL; -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) free_irq(MX2x_INT_DMACH0 + channel, NULL); -#endif local_irq_restore(flags); } @@ -803,21 +793,13 @@ static int __init imx_dma_init(void) int ret = 0; int i; -#ifdef CONFIG_ARCH_MX1 if (cpu_is_mx1()) imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); - else -#endif -#ifdef CONFIG_MACH_MX21 - if (cpu_is_mx21()) + else if (cpu_is_mx21()) imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); - else -#endif -#ifdef CONFIG_MACH_MX27 - if (cpu_is_mx27()) + else if (cpu_is_mx27()) imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); else -#endif return 0; dma_clk = clk_get(NULL, "dma"); @@ -828,7 +810,6 @@ static int __init imx_dma_init(void) /* reset DMA module */ imx_dmav1_writel(DCR_DRST, DMA_DCR); -#ifdef CONFIG_ARCH_MX1 if (cpu_is_mx1()) { ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); if (ret) { @@ -843,7 +824,7 @@ static int __init imx_dma_init(void) return ret; } } -#endif + /* enable DMA module */ imx_dmav1_writel(DCR_DEN, DMA_DCR); -- cgit v0.10.2 From 7bce7e8c296b42bd975a6e8f2be7fc70979780dd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 May 2011 17:23:44 +0200 Subject: ARM i.MX mxc.h: use CONFIG_SOC_* instead of CONFIG_ARCH_* CONFIG_ARCH_* are deprecated, so remove one user. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 4ac53ce..0987923 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -68,7 +68,7 @@ extern unsigned int __mxc_cpu_type; #endif -#ifdef CONFIG_ARCH_MX1 +#ifdef CONFIG_SOC_IMX1 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx1() (0) #endif -#ifdef CONFIG_MACH_MX21 +#ifdef CONFIG_SOC_IMX21 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx21() (0) #endif -#ifdef CONFIG_ARCH_MX25 +#ifdef CONFIG_SOC_IMX25 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx25() (0) #endif -#ifdef CONFIG_MACH_MX27 +#ifdef CONFIG_SOC_IMX27 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type -- cgit v0.10.2 From fe31ad41590daf9c5262b53cf6947f3be5c24b60 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 10 May 2011 18:15:25 +0200 Subject: ARM i.MX tzic: do not depend on MXC_INTERNAL_IRQS This becomes meaningless in subsequent patches. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 57f9395..710f2e7 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -49,6 +49,8 @@ void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ +#define TZIC_NUM_IRQS 128 + #ifdef CONFIG_FIQ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) { @@ -166,7 +168,7 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ - for (i = 0; i < MXC_INTERNAL_IRQS; i++) { + for (i = 0; i < TZIC_NUM_IRQS; i++) { irq_set_chip_and_handler(i, &mxc_tzic_chip.base, handle_level_irq); set_irq_flags(i, IRQF_VALID); -- cgit v0.10.2 From 5a24d69c2cd3522e5ed6f8bd7a1e956138149dcd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 10 May 2011 18:16:10 +0200 Subject: ARM i.MX avic: do not depend on MXC_INTERNAL_IRQS This becomes meaningless in subsequent patches. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 09e2bd0..55d2534 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -46,6 +46,8 @@ #define AVIC_FIPNDH 0x60 /* fast int pending high */ #define AVIC_FIPNDL 0x64 /* fast int pending low */ +#define AVIC_NUM_IRQS 64 + void __iomem *avic_base; #ifdef CONFIG_MXC_IRQ_PRIOR @@ -54,7 +56,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) unsigned int temp; unsigned int mask = 0x0F << irq % 8 * 4; - if (irq >= MXC_INTERNAL_IRQS) + if (irq >= AVIC_NUM_IRQS) return -EINVAL;; temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); @@ -72,14 +74,14 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) { unsigned int irqt; - if (irq >= MXC_INTERNAL_IRQS) + if (irq >= AVIC_NUM_IRQS) return -EINVAL; - if (irq < MXC_INTERNAL_IRQS / 2) { + if (irq < AVIC_NUM_IRQS / 2) { irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); } else { - irq -= MXC_INTERNAL_IRQS / 2; + irq -= AVIC_NUM_IRQS / 2; irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); } @@ -138,7 +140,7 @@ void __init mxc_init_irq(void __iomem *irqbase) /* all IRQ no FIQ */ __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); - for (i = 0; i < MXC_INTERNAL_IRQS; i++) { + for (i = 0; i < AVIC_NUM_IRQS; i++) { irq_set_chip_and_handler(i, &mxc_avic_chip.base, handle_level_irq); set_irq_flags(i, IRQF_VALID); -- cgit v0.10.2 From 7cf7381f35330b54cc894bd74137aae1ebb07bbf Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 11 May 2011 11:31:54 +0200 Subject: ARM i.MX: get rid of wrong MXC_INTERNAL_IRQ usage There are several occurences where MXC_INTERNAL_IRQ is assumed to be the start of the gpio interrupts. It was never meant this way. Replace these with gpio_to_irq. Signed-off-by: Sascha Hauer Acked-by: Fabio Estevam diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 882880a..c10221d 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -43,7 +43,7 @@ #include "devices-imx35.h" -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 1)) static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 4efa02e..7fbfd06 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -43,10 +43,6 @@ #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) -#define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO) -#define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO) -#define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO) -#define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO) #define CPUIMX51_QUART_XTAL 14745600 #define CPUIMX51_QUART_REGSHIFT 17 @@ -61,7 +57,7 @@ static struct plat_serial8250_port serial_platform_data[] = { { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), - .irq = CPUIMX51_QUARTA_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), - .irq = CPUIMX51_QUARTB_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), - .irq = CPUIMX51_QUARTC_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), - .irq = CPUIMX51_QUARTD_IRQ, + .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 63dfbea..11b2c7a 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -26,7 +27,7 @@ #include "devices-imx51.h" #include "devices.h" -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6)) #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) static iomux_v3_cfg_t mx51_3ds_pads[] = { diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 02ce720..bbf4564 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -31,7 +31,6 @@ #include "devices.h" #define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) -#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO) #define MBIMX51_LED0 IMX_GPIO_NR(3, 5) #define MBIMX51_LED1 IMX_GPIO_NR(3, 6) #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) @@ -161,7 +160,7 @@ struct tsc2007_platform_data tsc2007_data = { static struct i2c_board_info mbimx51_i2c_devices[] = { { I2C_BOARD_INFO("tsc2007", 0x49), - .irq = MBIMX51_TSC2007_IRQ, + .irq = gpio_to_irq(MBIMX51_TSC2007_GPIO), .platform_data = &tsc2007_data, }, { I2C_BOARD_INFO("tlv320aic23", 0x1a), @@ -198,7 +197,8 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); gpio_direction_input(MBIMX51_TSC2007_GPIO); - irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); + irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO), + IRQF_TRIGGER_FALLING); i2c_register_board_info(1, mbimx51_i2c_devices, ARRAY_SIZE(mbimx51_i2c_devices)); diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index 253d64d..6fa8a70 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h @@ -85,9 +85,6 @@ #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) -/* decode irq number to use with IMR(x), ISR(x) and friends */ -#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) - #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) -- cgit v0.10.2 From 07d1483a420861eb5581ebff74904c8a5ec33b19 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 10 May 2011 11:21:00 -0300 Subject: ARM: imx/mach-apf9328: Simplify UART0 registration As no flag is passed into UART0 platform data, pass NULL argument when registering UART0. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 15e45c8..c11d0ab 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c @@ -99,11 +99,6 @@ static struct platform_device dm9000x_device = { } }; -/* --- SERIAL RESSOURCE --- */ -static const struct imxuart_platform_data uart0_pdata __initconst = { - .flags = 0, -}; - static const struct imxuart_platform_data uart1_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -119,7 +114,7 @@ static void __init apf9328_init(void) ARRAY_SIZE(apf9328_pins), "APF9328"); - imx1_add_imx_uart0(&uart0_pdata); + imx1_add_imx_uart0(NULL); imx1_add_imx_uart1(&uart1_pdata); platform_add_devices(devices, ARRAY_SIZE(devices)); -- cgit v0.10.2 From ae817266710b18f767cf247e9568f52fb88abca0 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Mon, 6 Jun 2011 13:44:57 -0700 Subject: plat-mxc/pwm.c: use resource_size() Signed-off-by: H Hartley Sweeten Cc: Sascha Hauer Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 7a61ef8..761c3c9 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) goto err_free_clk; } - r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); + r = request_mem_region(r->start, resource_size(r), pdev->name); if (r == NULL) { dev_err(&pdev->dev, "failed to request memory resource\n"); ret = -EBUSY; goto err_free_clk; } - pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); + pwm->mmio_base = ioremap(r->start, resource_size(r)); if (pwm->mmio_base == NULL) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; @@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) return 0; err_free_mem: - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); err_free_clk: clk_put(pwm->clk); err_free: @@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev) iounmap(pwm->mmio_base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); clk_put(pwm->clk); -- cgit v0.10.2 From 31b738a4f4dfea3b464a9cb5fe18aa4ba85eb984 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:36 -0300 Subject: ARM: mach-imx/scb9328: Make the UART gpio setup simpler Place the UART gpio initialization inside the scb9328_init function as it is done on other i.MX boards. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index dcaee04..b773865 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -101,21 +101,7 @@ static const int mxc_uart1_pins[] = { PC12_PF_UART1_RXD, }; -static int uart1_mxc_init(struct platform_device *pdev) -{ - return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins), "UART1"); -} - -static void uart1_mxc_exit(struct platform_device *pdev) -{ - mxc_gpio_release_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins)); -} - static const struct imxuart_platform_data uart_pdata __initconst = { - .init = uart1_mxc_init, - .exit = uart1_mxc_exit, .flags = IMXUART_HAVE_RTSCTS, }; @@ -129,6 +115,9 @@ static struct platform_device *devices[] __initdata = { */ static void __init scb9328_init(void) { + mxc_gpio_setup_multiple_pins(mxc_uart1_pins, + ARRAY_SIZE(mxc_uart1_pins), "UART1"); + imx1_add_imx_uart0(&uart_pdata); printk(KERN_INFO"Scb9328: Adding devices\n"); -- cgit v0.10.2 From c084473d7a51dde74008e44d995f6da569f17802 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:27 -0300 Subject: ARM: mach-imx/mx27_3ds: Use the standard gpio_to_irq function Use the standard gpio_to_irq function instead of a dedicated IRQ_GPIOx macro. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index e7965ec..ccb9c3f 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -47,6 +47,7 @@ #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) #define PMIC_INT IMX_GPIO_NR(3, 14) +#define SD1_CD IMX_GPIO_NR(2, 26) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -135,13 +136,13 @@ static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, void *data) { - return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | - IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); + return request_irq(gpio_to_irq(SD1_CD), detect_irq, + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); } static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) { - free_irq(IRQ_GPIOB(26), data); + free_irq(gpio_to_irq(SD1_CD), data); } static const struct imxmmc_platform_data sdhc1_pdata __initconst = { @@ -275,7 +276,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { .bus_num = 1, .chip_select = 0, /* SS0 */ .platform_data = &mc13783_pdata, - .irq = IRQ_GPIOC(14), + .irq = gpio_to_irq(PMIC_INT), .mode = SPI_CS_HIGH, }, }; -- cgit v0.10.2 From 6d2385ab2532f3a8e2b9d195c006c07919555c31 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:28 -0300 Subject: ARM: mach-imx/mx27_3ds: Do not annotate the chip select as internal On the i.MX SPI driver the chipselect pins can be of the following types: - internal: when the chipselect pin is used as a dedicated CS pin of the CSPI controller - GPIO: a generic GPIO can be used as a chipselect funtion On the mx27_3ds the SPI2 chip select is a GPIO, so don't annotate 'internal' in the chip select definition. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index ccb9c3f..352f75d 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -262,11 +262,11 @@ static struct mc13xxx_platform_data mc13783_pdata = { }; /* SPI */ -static int spi2_internal_chipselect[] = {SPI2_SS0}; +static int spi2_chipselect[] = {SPI2_SS0}; static const struct spi_imx_master spi2_pdata __initconst = { - .chipselect = spi2_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), + .chipselect = spi2_chipselect, + .num_chipselect = ARRAY_SIZE(spi2_chipselect), }; static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { -- cgit v0.10.2 From fad107086d5a869c1c07e5bb35b7b57a10ecf578 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 May 2011 17:25:05 +0200 Subject: ARM i.MX debug macro: use CONFIG_SOC_* instead of CONFIG_ARCH_* CONFIG_ARCH_* are deprecated, so remove one user. Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 8e8d175..91fc7cd 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -12,32 +12,32 @@ */ #include -#ifdef CONFIG_ARCH_MX1 +#ifdef CONFIG_SOC_IMX1 #define UART_PADDR MX1_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX25 +#ifdef CONFIG_SOC_IMX25 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX25_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX2 +#if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27) #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX2x_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX3 +#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX3x_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX5 +#ifdef CONFIG_SOC_IMX51 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -- cgit v0.10.2 From d17572741bacb851f0a689c7751ce909835ad96c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 25 May 2011 21:55:39 +0800 Subject: ARM: mxs_defconfig: Add mx23evk and mx28evk build The patch adds following configurations to enable build of mx23evk and mx28evk in defconfig. CONFIG_MACH_MX23EVK CONFIG_MACH_MX28EVK Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 5a6ff7c..db2cb7d 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -22,6 +22,8 @@ CONFIG_BLK_DEV_INTEGRITY=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXS=y +CONFIG_MACH_MX23EVK=y +CONFIG_MACH_MX28EVK=y CONFIG_MACH_STMP378X_DEVB=y CONFIG_MACH_TX28=y # CONFIG_ARM_THUMB is not set -- cgit v0.10.2 From 5dc3394c192cb8845a4594a4d029231392634d8a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 11:51:32 -0300 Subject: ARM: mx5/mx53_loco: Add support for LED MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Fabio Estevam Acked-by: Uwe Kleine-König Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index f25e9d7..7976512 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -203,6 +203,7 @@ config MACH_MX53_LOCO select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_GPIO_KEYS + select LEDS_GPIO_REGISTER help Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 359c3e2..57576f7 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -38,6 +38,7 @@ #define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) +#define LOCO_LED IMX_GPIO_NR(7, 7) static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ @@ -163,7 +164,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { MX53_PAD_GPIO_7__SPDIF_PLOCK, MX53_PAD_GPIO_17__SPDIF_OUT1, /* GPIO */ - MX53_PAD_PATA_DA_1__GPIO7_7, + MX53_PAD_PATA_DA_1__GPIO7_7, /* LED */ MX53_PAD_PATA_DA_2__GPIO7_8, MX53_PAD_PATA_DATA5__GPIO2_5, MX53_PAD_PATA_DATA6__GPIO2_6, @@ -225,6 +226,19 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { .bitrate = 100000, }; +static const struct gpio_led mx53loco_leds[] __initconst = { + { + .name = "green", + .default_trigger = "heartbeat", + .gpio = LOCO_LED, + }, +}; + +static const struct gpio_led_platform_data mx53loco_leds_data __initconst = { + .leds = mx53loco_leds, + .num_leds = ARRAY_SIZE(mx53loco_leds), +}; + static void __init mx53_loco_board_init(void) { imx53_soc_init(); @@ -240,6 +254,7 @@ static void __init mx53_loco_board_init(void) imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); imx_add_gpio_keys(&loco_button_data); + gpio_led_register_device(-1, &mx53loco_leds_data); } static void __init mx53_loco_timer_init(void) -- cgit v0.10.2 From 95b7445946ca68222ad84cad3703a1efe1110869 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 30 May 2011 12:42:26 -0300 Subject: ARM: mx5/mx53_evk: Add support for LED Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 7976512..3c98455 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -180,6 +180,7 @@ config MACH_MX53_EVK select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help Include support for MX53 EVK platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 0d9218a..1b417b0 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -35,6 +35,7 @@ #define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) #define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) +#define MX53EVK_LED IMX_GPIO_NR(7, 7) #include "crm_regs.h" #include "devices-imx53.h" @@ -58,12 +59,27 @@ static iomux_v3_cfg_t mx53_evk_pads[] = { /* ecspi chip select lines */ MX53_PAD_EIM_EB2__GPIO2_30, MX53_PAD_EIM_D19__GPIO3_19, + /* LED */ + MX53_PAD_PATA_DA_1__GPIO7_7, }; static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; +static const struct gpio_led mx53evk_leds[] __initconst = { + { + .name = "green", + .default_trigger = "heartbeat", + .gpio = MX53EVK_LED, + }, +}; + +static const struct gpio_led_platform_data mx53evk_leds_data __initconst = { + .leds = mx53evk_leds, + .num_leds = ARRAY_SIZE(mx53evk_leds), +}; + static inline void mx53_evk_init_uart(void) { imx53_add_imx_uart(0, NULL); @@ -135,6 +151,7 @@ static void __init mx53_evk_board_init(void) ARRAY_SIZE(mx53_evk_spi_board_info)); imx53_add_ecspi(0, &mx53_evk_spi_data); imx53_add_imx2_wdt(0, NULL); + gpio_led_register_device(-1, &mx53evk_leds_data); } static void __init mx53_evk_timer_init(void) -- cgit v0.10.2 From 53b8ff9d3781fe6ff74494ecaea735b322d9ef8e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 31 May 2011 17:07:03 +0800 Subject: ARM: mxs/mx28evk: add leds-gpio device for heartbeat It adds LED2 on mx28evk board as heartbeat trigger for diagnostic purpose. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 162b0b0..1d3985f 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -41,6 +41,7 @@ config MACH_MX23EVK config MACH_MX28EVK bool "Support MX28EVK Platform" select SOC_IMX28 + select LEDS_GPIO_REGISTER select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index 56767a5..eaaf6ff 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -29,6 +30,7 @@ #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) +#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5) #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) @@ -178,6 +180,23 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { /* slot power enable */ MX28_PAD_PWM4__GPIO_3_29 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), + + /* led */ + MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, +}; + +/* led */ +static const struct gpio_led mx28evk_leds[] __initconst = { + { + .name = "GPIO-LED", + .default_trigger = "heartbeat", + .gpio = MX28EVK_GPIO_LED, + }, +}; + +static const struct gpio_led_platform_data mx28evk_led_data __initconst = { + .leds = mx28evk_leds, + .num_leds = ARRAY_SIZE(mx28evk_leds), }; /* fec */ @@ -385,6 +404,8 @@ static void __init mx28evk_init(void) if (ret) pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); + + gpio_led_register_device(0, &mx28evk_led_data); } static void __init mx28evk_timer_init(void) -- cgit v0.10.2 From 8b6c44f10087fedfb2e041e964b373df53c65514 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 7 Jun 2011 13:59:14 +0800 Subject: ARM: mxc: convert tzic to use generic irq chip The patch converts mxc tzic interrupt controller to use generic irq chip. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278..3002266 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -376,6 +376,7 @@ config ARCH_MXC select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK help Support for Freescale MXC/iMX-based family of processors diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index e1c6eff..96953e2 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c @@ -42,17 +42,16 @@ EXPORT_SYMBOL(imx_irq_set_priority); int mxc_set_irq_fiq(unsigned int irq, unsigned int type) { - struct mxc_irq_chip *chip; - struct irq_chip *base; + struct irq_chip_generic *gc; + int (*set_irq_fiq)(unsigned int, unsigned int); int ret; ret = -ENOSYS; - base = irq_get_chip(irq); - if (base) { - chip = container_of(base, struct mxc_irq_chip, base); - if (chip->set_irq_fiq) - ret = chip->set_irq_fiq(irq, type); + gc = irq_get_chip_data(irq); + if (gc && gc->private) { + set_irq_fiq = gc->private; + ret = set_irq_fiq(irq, type); } return ret; diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 710f2e7..f257fcc 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -68,78 +68,34 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) return 0; } +#else +#define tzic_set_irq_fiq NULL #endif -/** - * tzic_mask_irq() - Disable interrupt source "d" in the TZIC - * - * @param d interrupt source - */ -static void tzic_mask_irq(struct irq_data *d) -{ - int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index)); -} - -/** - * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC - * - * @param d interrupt source - */ -static void tzic_unmask_irq(struct irq_data *d) -{ - int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index)); -} - -static unsigned int wakeup_intr[4]; +static unsigned int *wakeup_intr[4]; -/** - * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source. - * - * @param d interrupt source - * @param enable enable as wake-up if equal to non-zero - * disble as wake-up if equal to zero - * - * @return This function returns 0 on success. - */ -static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable) +static __init void tzic_init_gc(unsigned int irq_start) { - unsigned int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - - if (index > 3) - return -EINVAL; - - if (enable) - wakeup_intr[index] |= (1 << off); - else - wakeup_intr[index] &= ~(1 << off); - - return 0; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + int idx = irq_start >> 5; + + gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, + handle_level_irq); + gc->private = tzic_set_irq_fiq; + gc->wake_enabled = IRQ_MSK(32); + wakeup_intr[idx] = &gc->wake_active; + + ct = gc->chip_types; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->regs.disable = TZIC_ENCLEAR0(idx); + ct->regs.enable = TZIC_ENSET0(idx); + + irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); } -static struct mxc_irq_chip mxc_tzic_chip = { - .base = { - .name = "MXC_TZIC", - .irq_ack = tzic_mask_irq, - .irq_mask = tzic_mask_irq, - .irq_unmask = tzic_unmask_irq, - .irq_set_wake = tzic_set_wake_irq, - }, -#ifdef CONFIG_FIQ - .set_irq_fiq = tzic_set_irq_fiq, -#endif -}; - /* * This function initializes the TZIC hardware and disables all the * interrupts. It registers the interrupt enable and disable functions @@ -168,11 +124,8 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ - for (i = 0; i < TZIC_NUM_IRQS; i++) { - irq_set_chip_and_handler(i, &mxc_tzic_chip.base, - handle_level_irq); - set_irq_flags(i, IRQF_VALID); - } + for (i = 0; i < TZIC_NUM_IRQS; i += 32) + tzic_init_gc(i); #ifdef CONFIG_FIQ /* Initialize FIQ */ @@ -199,7 +152,7 @@ int tzic_enable_wake(int is_idle) for (i = 0; i < 4; i++) { v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : - wakeup_intr[i]; + *wakeup_intr[i]; __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); } -- cgit v0.10.2 From bd8978267d024521bdd6e453dcefc64d78d6afe6 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:08:14 -0300 Subject: ARM: mach-mx5/mx53_ard: Add support for i.MX53 ARD board Signed-off-by: Andre Silva Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 3c98455..695cdf0 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -209,6 +209,14 @@ config MACH_MX53_LOCO Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. +config MACH_MX53_ARD + bool "Support MX53 ARD platforms" + select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for MX53 ARD platform. This includes specific + configurations for the board and its peripherals. + endif # ARCH_MX53_SUPPORTED endif diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 0b9338c..df67fef 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o +obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c new file mode 100644 index 0000000..7e1859b --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "crm_regs.h" +#include "devices-imx53.h" + +#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) + +static iomux_v3_cfg_t mx53_ard_pads[] = { + /* UART1 */ + MX53_PAD_PATA_DIOW__UART1_TXD_MUX, + MX53_PAD_PATA_DMACK__UART1_RXD_MUX, + /* WEIM for CS1 */ + MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */ + MX53_PAD_EIM_D16__EMI_WEIM_D_16, + MX53_PAD_EIM_D17__EMI_WEIM_D_17, + MX53_PAD_EIM_D18__EMI_WEIM_D_18, + MX53_PAD_EIM_D19__EMI_WEIM_D_19, + MX53_PAD_EIM_D20__EMI_WEIM_D_20, + MX53_PAD_EIM_D21__EMI_WEIM_D_21, + MX53_PAD_EIM_D22__EMI_WEIM_D_22, + MX53_PAD_EIM_D23__EMI_WEIM_D_23, + MX53_PAD_EIM_D24__EMI_WEIM_D_24, + MX53_PAD_EIM_D25__EMI_WEIM_D_25, + MX53_PAD_EIM_D26__EMI_WEIM_D_26, + MX53_PAD_EIM_D27__EMI_WEIM_D_27, + MX53_PAD_EIM_D28__EMI_WEIM_D_28, + MX53_PAD_EIM_D29__EMI_WEIM_D_29, + MX53_PAD_EIM_D30__EMI_WEIM_D_30, + MX53_PAD_EIM_D31__EMI_WEIM_D_31, + MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, + MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, + MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, + MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, + MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, + MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, + MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, + MX53_PAD_EIM_OE__EMI_WEIM_OE, + MX53_PAD_EIM_RW__EMI_WEIM_RW, + MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, +}; + +static struct resource ard_smsc911x_resources[] = { + { + .start = MX53_CS1_64MB_BASE_ADDR, + .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = gpio_to_irq(ARD_ETHERNET_INT_B), + .end = gpio_to_irq(ARD_ETHERNET_INT_B), + .flags = IORESOURCE_IRQ, + }, +}; + +struct smsc911x_platform_config ard_smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, + .flags = SMSC911X_USE_32BIT, +}; + +static struct platform_device ard_smsc_lan9220_device = { + .name = "smsc911x", + .id = -1, + .num_resources = ARRAY_SIZE(ard_smsc911x_resources), + .resource = ard_smsc911x_resources, + .dev = { + .platform_data = &ard_smsc911x_config, + }, +}; + +static void __init mx53_ard_io_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, + ARRAY_SIZE(mx53_ard_pads)); + + gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); + gpio_direction_input(ARD_ETHERNET_INT_B); +} + + /* Config CS1 settings for ethernet controller */ +static int weim_cs_config(void) +{ + u32 reg; + void __iomem *weim_base, *iomuxc_base; + + weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K); + if (!weim_base) + return -ENOMEM; + + iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K); + if (!iomuxc_base) + return -ENOMEM; + + /* CS1 timings for LAN9220 */ + writel(0x20001, (weim_base + 0x18)); + writel(0x0, (weim_base + 0x1C)); + writel(0x16000202, (weim_base + 0x20)); + writel(0x00000002, (weim_base + 0x24)); + writel(0x16002082, (weim_base + 0x28)); + writel(0x00000000, (weim_base + 0x2C)); + writel(0x00000000, (weim_base + 0x90)); + + /* specify 64 MB on CS1 and CS0 on GPR1 */ + reg = readl(iomuxc_base + 0x4); + reg &= ~0x3F; + reg |= 0x1B; + writel(reg, (iomuxc_base + 0x4)); + + iounmap(iomuxc_base); + iounmap(weim_base); + + return 0; +} + +static struct platform_device *devices[] __initdata = { + &ard_smsc_lan9220_device, +}; + +static void __init mx53_ard_board_init(void) +{ + imx53_soc_init(); + imx53_add_imx_uart(0, NULL); + + mx53_ard_io_init(); + weim_cs_config(); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +static void __init mx53_ard_timer_init(void) +{ + mx53_clocks_init(32768, 24000000, 22579200, 0); +} + +static struct sys_timer mx53_ard_timer = { + .init = mx53_ard_timer_init, +}; + +MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") + .map_io = mx53_map_io, + .init_early = imx53_init_early, + .init_irq = mx53_init_irq, + .timer = &mx53_ard_timer, + .init_machine = mx53_ard_board_init, +MACHINE_END diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index d85e2d1..88fd404 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h @@ -117,6 +117,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) case MACH_TYPE_MX53_EVK: case MACH_TYPE_MX53_LOCO: case MACH_TYPE_MX53_SMD: + case MACH_TYPE_MX53_ARD: uart_base = MX53_UART1_BASE_ADDR; break; default: -- cgit v0.10.2 From 1a636932f862d5d95b018c884a854c5cbc604f3b Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:15:19 -0300 Subject: ARM:mach-mx5/board-mx53_loco: Add CD and WP GPIOs Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 57576f7..54be525 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -39,6 +39,9 @@ #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define LOCO_LED IMX_GPIO_NR(7, 7) +#define LOCO_SD3_CD IMX_GPIO_NR(3, 11) +#define LOCO_SD3_WP IMX_GPIO_NR(3, 12) +#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ @@ -71,6 +74,8 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { MX53_PAD_SD1_DATA1__ESDHC1_DAT1, MX53_PAD_SD1_DATA2__ESDHC1_DAT2, MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + /* SD1_CD */ + MX53_PAD_EIM_DA13__GPIO3_13, /* SD3 */ MX53_PAD_PATA_DATA8__ESDHC3_DAT0, MX53_PAD_PATA_DATA9__ESDHC3_DAT1, @@ -203,6 +208,15 @@ static const struct gpio_keys_platform_data loco_button_data __initconst = { .nbuttons = ARRAY_SIZE(loco_buttons), }; +static const struct esdhc_platform_data mx53_loco_sd1_data __initconst = { + .cd_gpio = LOCO_SD1_CD, +}; + +static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = { + .cd_gpio = LOCO_SD3_CD, + .wp_gpio = LOCO_SD3_WP, +}; + static inline void mx53_loco_fec_reset(void) { int ret; @@ -251,8 +265,8 @@ static void __init mx53_loco_board_init(void) imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(0, &mx53_loco_i2c_data); imx53_add_imx_i2c(1, &mx53_loco_i2c_data); - imx53_add_sdhci_esdhc_imx(0, NULL); - imx53_add_sdhci_esdhc_imx(2, NULL); + imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); + imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data); imx_add_gpio_keys(&loco_button_data); gpio_led_register_device(-1, &mx53loco_leds_data); } -- cgit v0.10.2 From 6ecdc11bf8e1105ae393bf74026427180a6c5207 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:15:20 -0300 Subject: ARM:mach-mx5/board-mx51_babbage: Add CD and WP GPIOs Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index e54e4bf..15c6000 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -41,6 +41,10 @@ #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) #define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25) +#define BABBAGE_SD1_CD IMX_GPIO_NR(1, 0) +#define BABBAGE_SD1_WP IMX_GPIO_NR(1, 1) +#define BABBAGE_SD2_CD IMX_GPIO_NR(1, 6) +#define BABBAGE_SD2_WP IMX_GPIO_NR(1, 5) /* USB_CTRL_1 */ #define MX51_USB_CTRL_1_OFFSET 0x10 @@ -142,6 +146,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_SD1_DATA1__SD1_DATA1, MX51_PAD_SD1_DATA2__SD1_DATA2, MX51_PAD_SD1_DATA3__SD1_DATA3, + MX51_PAD_GPIO1_0__GPIO1_0, + MX51_PAD_GPIO1_1__GPIO1_1, /* SD 2 */ MX51_PAD_SD2_CMD__SD2_CMD, @@ -150,6 +156,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_SD2_DATA1__SD2_DATA1, MX51_PAD_SD2_DATA2__SD2_DATA2, MX51_PAD_SD2_DATA3__SD2_DATA3, + MX51_PAD_GPIO1_6__GPIO1_6, + MX51_PAD_GPIO1_5__GPIO1_5, /* eCSPI1 */ MX51_PAD_CSPI1_MISO__ECSPI1_MISO, @@ -331,6 +339,16 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = { .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), }; +static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = { + .cd_gpio = BABBAGE_SD1_CD, + .wp_gpio = BABBAGE_SD1_WP, +}; + +static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = { + .cd_gpio = BABBAGE_SD2_CD, + .wp_gpio = BABBAGE_SD2_WP, +}; + /* * Board specific initialization. */ @@ -376,8 +394,8 @@ static void __init mx51_babbage_init(void) mxc_iomux_v3_setup_pad(usbh1stp); babbage_usbhub_reset(); - imx51_add_sdhci_esdhc_imx(0, NULL); - imx51_add_sdhci_esdhc_imx(1, NULL); + imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data); + imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data); spi_register_board_info(mx51_babbage_spi_board_info, ARRAY_SIZE(mx51_babbage_spi_board_info)); -- cgit v0.10.2 From e3a58be3be7f0d7cf3c0966f3f3369acfab421e8 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Mon, 13 Jun 2011 14:31:57 -0300 Subject: ARM:mach-mx5/mx53_ard: Add ESDHC support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 695cdf0..9a8e6f8 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -213,6 +213,7 @@ config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help Include support for MX53 ARD platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 7e1859b..5d98dbf 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -36,6 +36,8 @@ #include "devices-imx53.h" #define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) +#define ARD_SD1_CD IMX_GPIO_NR(1, 1) +#define ARD_SD1_WP IMX_GPIO_NR(1, 9) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ @@ -69,6 +71,19 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { MX53_PAD_EIM_OE__EMI_WEIM_OE, MX53_PAD_EIM_RW__EMI_WEIM_RW, MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, + /* SDHC1 */ + MX53_PAD_SD1_CMD__ESDHC1_CMD, + MX53_PAD_SD1_CLK__ESDHC1_CLK, + MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + MX53_PAD_PATA_DATA8__ESDHC1_DAT4, + MX53_PAD_PATA_DATA9__ESDHC1_DAT5, + MX53_PAD_PATA_DATA10__ESDHC1_DAT6, + MX53_PAD_PATA_DATA11__ESDHC1_DAT7, + MX53_PAD_GPIO_1__GPIO1_1, + MX53_PAD_GPIO_9__GPIO1_9, }; static struct resource ard_smsc911x_resources[] = { @@ -100,6 +115,11 @@ static struct platform_device ard_smsc_lan9220_device = { }, }; +static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { + .cd_gpio = ARD_SD1_CD, + .wp_gpio = ARD_SD1_WP, +}; + static void __init mx53_ard_io_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, @@ -156,6 +176,8 @@ static void __init mx53_ard_board_init(void) mx53_ard_io_init(); weim_cs_config(); platform_add_devices(devices, ARRAY_SIZE(devices)); + + imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); } static void __init mx53_ard_timer_init(void) -- cgit v0.10.2 From 40d32c89c897e573f28653920b223b07efbcfac8 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Mon, 13 Jun 2011 14:31:58 -0300 Subject: ARM:mach-mx5/mx53_ard: Add Watchdog timer support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 9a8e6f8..5b16f39 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -212,6 +212,7 @@ config MACH_MX53_LOCO config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 5d98dbf..7dd54b9 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -178,6 +178,7 @@ static void __init mx53_ard_board_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); + imx53_add_imx2_wdt(0, NULL); } static void __init mx53_ard_timer_init(void) -- cgit v0.10.2 From be070a40780ff61be7349b2aeeae35663e01b44b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Jun 2011 09:59:35 -0300 Subject: ARM: mx53: Add SDMA clock Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index cea2bba..005b4ae 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1476,6 +1476,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) + _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) }; static void clk_tree_init(void) -- cgit v0.10.2 From 931de39219bd31944dda69a015ccef103cd1d193 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 12 Jun 2011 21:33:00 -0300 Subject: ARM: mx53: Add SDMA support for MX53 Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index c64f015..27104f5 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -51,6 +51,11 @@ struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 0); +#endif /* ifdef CONFIG_SOC_IMX53 */ + static struct platform_device __init __maybe_unused *imx_add_imx_sdma( const struct imx_imx_sdma_data *data) { @@ -153,6 +158,22 @@ static struct sdma_script_start_addrs addr_imx51 = { }; #endif +#ifdef CONFIG_SOC_IMX53 +static struct sdma_script_start_addrs addr_imx53 = { + .ap_2_ap_addr = 642, + .app_2_mcu_addr = 683, + .mcu_2_app_addr = 747, + .uart_2_mcu_addr = 817, + .shp_2_mcu_addr = 891, + .mcu_2_shp_addr = 960, + .uartsh_2_mcu_addr = 1032, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, + .firi_2_mcu_addr = 1193, + .mcu_2_firi_addr = 1290, +}; +#endif + static int __init imxXX_add_imx_dma(void) { struct platform_device *ret; @@ -202,6 +223,13 @@ static int __init imxXX_add_imx_dma(void) ret = imx_add_imx_sdma(&imx51_imx_sdma_data); } else #endif + +#if defined(CONFIG_SOC_IMX53) + if (cpu_is_mx53()) { + imx53_imx_sdma_data.pdata.script_addrs = &addr_imx53; + ret = imx_add_imx_sdma(&imx53_imx_sdma_data); + } else +#endif ret = ERR_PTR(-ENODEV); if (IS_ERR(ret)) -- cgit v0.10.2 From aedc383caad3a682589e5e1b2158efed1b7f4e06 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:35 -0300 Subject: ARM: imx2: Fix GPIO iosize On MX1, MX21 and MX27 each GPIO port has an address space of 256 bytes. Fix the iosize for these platforms. Tested on a mx27_3ds board that can boot fine after this change. Cc: Shawn Guo Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index b486595..f2a6566 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -50,8 +50,12 @@ void __init mx1_init_irq(void) void __init imx1_soc_init(void) { - mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTA, 0); - mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTB, 0); - mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTC, 0); - mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTD, 0); + mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTA, 0); + mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTB, 0); + mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTC, 0); + mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTD, 0); } diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f0fb8bc..f8fb41c 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -76,10 +76,10 @@ void __init mx21_init_irq(void) void __init imx21_soc_init(void) { - mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); } diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index d3700ce..acc6db4 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -76,10 +76,10 @@ void __init mx27_init_irq(void) void __init imx27_soc_init(void) { - mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); } -- cgit v0.10.2 From f9e9fc2736805fe812d9d27444f57733453386fb Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 28 Mar 2011 10:14:57 -0500 Subject: ARM: mx51: Add support for low power suspend on MX51 Adds initial low power suspend functionality to MX51. Supports "mem" and "standby" modes. Tested on mx51-babbage. Signed-off-by: Dinh Nguyen Tested-by: Arnaud Patard Tested-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index df67fef..383e7cd 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -6,6 +6,7 @@ obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o +obj-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c new file mode 100644 index 0000000..e4529af --- /dev/null +++ b/arch/arm/mach-mx5/pm-imx5.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +static struct clk *gpc_dvfs_clk; + +static int mx5_suspend_enter(suspend_state_t state) +{ + clk_enable(gpc_dvfs_clk); + switch (state) { + case PM_SUSPEND_MEM: + mx5_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + break; + default: + return -EINVAL; + } + + if (state == PM_SUSPEND_MEM) { + local_flush_tlb_all(); + flush_cache_all(); + + /*clear the EMPGC0/1 bits */ + __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR); + __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); + } + cpu_do_idle(); + clk_disable(gpc_dvfs_clk); + + return 0; +} + +static int mx5_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +static const struct platform_suspend_ops mx5_suspend_ops = { + .valid = mx5_pm_valid, + .enter = mx5_suspend_enter, +}; + +static int __init mx5_pm_init(void) +{ + if (gpc_dvfs_clk == NULL) + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); + + if (!IS_ERR(gpc_dvfs_clk)) { + if (cpu_is_mx51()) + suspend_set_ops(&mx5_suspend_ops); + } else + return -EPERM; + + return 0; +} +device_initcall(mx5_pm_init); -- cgit v0.10.2 From 1abcb4cca3a964a8dde1c1e2988fd9a9a1470178 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:25 -0300 Subject: ARM: mach-imx/mx27_3ds: Add LCD support On mx27_3ds board there is a l4f00242t03 LCD that is controlled via CSPI1. Add support for CSPI1 and LCD. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e8dd22f..0519dd7 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -278,6 +278,7 @@ config MACH_MX27_3DS select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index b31d412..7b7c817 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -47,7 +48,10 @@ #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) #define PMIC_INT IMX_GPIO_NR(3, 14) +#define SPI1_SS0 IMX_GPIO_NR(4, 28) #define SD1_CD IMX_GPIO_NR(2, 26) +#define LCD_RESET IMX_GPIO_NR(1, 3) +#define LCD_ENABLE IMX_GPIO_NR(1, 31) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -96,6 +100,12 @@ static const int mx27pdk_pins[] __initconst = { PE2_PF_USBOTG_DIR, PE24_PF_USBOTG_CLK, PE25_PF_USBOTG_DATA7, + /* CSPI1 */ + PD31_PF_CSPI1_MOSI, + PD30_PF_CSPI1_MISO, + PD29_PF_CSPI1_SCLK, + PD25_PF_CSPI1_RDY, + SPI1_SS0 | GPIO_GPIO | GPIO_OUT, /* CSPI2 */ PD22_PF_CSPI2_SCLK, PD23_PF_CSPI2_MISO, @@ -106,6 +116,31 @@ static const int mx27pdk_pins[] __initconst = { PD18_PF_I2C_CLK, /* PMIC INT */ PMIC_INT | GPIO_GPIO | GPIO_IN, + /* LCD */ + PA5_PF_LSCLK, + PA6_PF_LD0, + PA7_PF_LD1, + PA8_PF_LD2, + PA9_PF_LD3, + PA10_PF_LD4, + PA11_PF_LD5, + PA12_PF_LD6, + PA13_PF_LD7, + PA14_PF_LD8, + PA15_PF_LD9, + PA16_PF_LD10, + PA17_PF_LD11, + PA18_PF_LD12, + PA19_PF_LD13, + PA20_PF_LD14, + PA21_PF_LD15, + PA22_PF_LD16, + PA23_PF_LD17, + PA28_PF_HSYNC, + PA29_PF_VSYNC, + PA30_PF_CONTRAST, + LCD_ENABLE | GPIO_GPIO | GPIO_OUT, + LCD_RESET | GPIO_GPIO | GPIO_OUT, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -262,6 +297,13 @@ static struct mc13xxx_platform_data mc13783_pdata = { }; /* SPI */ +static int spi1_chipselect[] = {SPI1_SS0}; + +static const struct spi_imx_master spi1_pdata __initconst = { + .chipselect = spi1_chipselect, + .num_chipselect = ARRAY_SIZE(spi1_chipselect), +}; + static int spi2_chipselect[] = {SPI2_SS0}; static const struct spi_imx_master spi2_pdata __initconst = { @@ -269,6 +311,46 @@ static const struct spi_imx_master spi2_pdata __initconst = { .num_chipselect = ARRAY_SIZE(spi2_chipselect), }; +static struct imx_fb_videomode mx27_3ds_modes[] = { + { /* 480x640 @ 60 Hz */ + .mode = { + .name = "Epson-VGA", + .refresh = 60, + .xres = 480, + .yres = 640, + .pixclock = 41701, + .left_margin = 20, + .right_margin = 41, + .upper_margin = 10, + .lower_margin = 5, + .hsync_len = 20, + .vsync_len = 10, + .sync = FB_SYNC_OE_ACT_HIGH | + FB_SYNC_CLK_INVERT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + .bpp = 16, + .pcr = 0xFAC08B82, + }, +}; + +static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = { + .mode = mx27_3ds_modes, + .num_modes = ARRAY_SIZE(mx27_3ds_modes), + .pwmr = 0x00A903FF, + .lscr1 = 0x00120300, + .dmacr = 0x00020010, +}; + +/* LCD */ +static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = { + .reset_gpio = LCD_RESET, + .data_enable_gpio = LCD_ENABLE, + .core_supply = "lcd_2v8", + .io_supply = "vdd_lcdio", +}; + static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { { .modalias = "mc13783", @@ -278,6 +360,12 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { .platform_data = &mc13783_pdata, .irq = gpio_to_irq(PMIC_INT), .mode = SPI_CS_HIGH, + }, { + .modalias = "l4f00242t03", + .max_speed_hz = 5000000, + .bus_num = 0, + .chip_select = 0, /* SS0 */ + .platform_data = &mx27_3ds_lcd_pdata, }, }; @@ -311,12 +399,14 @@ static void __init mx27pdk_init(void) imx27_add_fsl_usb2_udc(&otg_device_pdata); imx27_add_spi_imx1(&spi2_pdata); + imx27_add_spi_imx0(&spi1_pdata); spi_register_board_info(mx27_3ds_spi_devs, ARRAY_SIZE(mx27_3ds_spi_devs)); if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); + imx27_add_imx_fb(&mx27_3ds_fb_data); } static void __init mx27pdk_timer_init(void) -- cgit v0.10.2 From 10f046bb1df0e40bbc56579ca5ccad5f951f4047 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:26 -0300 Subject: ARM: mach-imx/mx27_3ds: Add touchscreen support Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 7b7c817..84fb793 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -293,7 +293,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR, + .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, }; /* SPI */ -- cgit v0.10.2 From b6a14477695e54da6621c6d3c72f019b8cddb89d Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Wed, 22 Jun 2011 16:33:04 -0300 Subject: ARM:mx53: Add I2C3 support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 005b4ae..7173b27 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1279,6 +1279,8 @@ DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, + NULL, NULL, &ipg_perclk, NULL); /* FEC */ DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, @@ -1467,6 +1469,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) + _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk) diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index 2ab74f0..afe60f7 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -94,8 +94,9 @@ const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) imx53_imx_i2c_data_entry(0, 1), imx53_imx_i2c_data_entry(1, 2), + imx53_imx_i2c_data_entry(2, 3), }; -#endif /* ifdef CONFIG_SOC_IMX51 */ +#endif /* ifdef CONFIG_SOC_IMX53 */ struct platform_device *__init imx_add_imx_i2c( const struct imx_imx_i2c_data *data, -- cgit v0.10.2 From 8dd7b817a1135940406a3271346a4a8e39e2b87c Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Wed, 22 Jun 2011 16:33:05 -0300 Subject: ARM:mach-mx5/mx53_ard: Add I2C2 and I2C3 support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 5b16f39..6a47d4c 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -213,6 +213,7 @@ config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 7dd54b9..70ae25e 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -84,6 +84,12 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { MX53_PAD_PATA_DATA11__ESDHC1_DAT7, MX53_PAD_GPIO_1__GPIO1_1, MX53_PAD_GPIO_9__GPIO1_9, + /* I2C2 */ + MX53_PAD_EIM_EB2__I2C2_SCL, + MX53_PAD_KEY_ROW3__I2C2_SDA, + /* I2C3 */ + MX53_PAD_GPIO_3__I2C3_SCL, + MX53_PAD_GPIO_16__I2C3_SDA, }; static struct resource ard_smsc911x_resources[] = { @@ -120,6 +126,14 @@ static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { .wp_gpio = ARD_SD1_WP, }; +static struct imxi2c_platform_data mx53_ard_i2c2_data = { + .bitrate = 50000, +}; + +static struct imxi2c_platform_data mx53_ard_i2c3_data = { + .bitrate = 400000, +}; + static void __init mx53_ard_io_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, @@ -127,9 +141,12 @@ static void __init mx53_ard_io_init(void) gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); gpio_direction_input(ARD_ETHERNET_INT_B); + + gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst"); + gpio_direction_output(ARD_I2CPORTEXP_B, 1); } - /* Config CS1 settings for ethernet controller */ +/* Config CS1 settings for ethernet controller */ static int weim_cs_config(void) { u32 reg; @@ -179,6 +196,8 @@ static void __init mx53_ard_board_init(void) imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); imx53_add_imx2_wdt(0, NULL); + imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); + imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); } static void __init mx53_ard_timer_init(void) -- cgit v0.10.2 From 3622360430e90d47a0d028dd5333a13771589331 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:30 +0800 Subject: ARM: mxc: clean up imx-dma device registration The patch follows the implementation of gpio-mxc device registration to break the concentrated imx-dma device registration into soc specific setup function. Then we can avoid the churn of "#ifdef" and the cpu_is_mx checking on such a long list, which makes no sense, considering more soc supports need to be added and we need to support single image for multiple socs in the long run. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f8fb41c..4f32a8a 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -82,4 +83,6 @@ void __init imx21_soc_init(void) mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + + imx_add_imx_dma(); } diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 1b6d583..0c54520 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -61,10 +62,35 @@ void __init mx25_init_irq(void) mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx25_sdma_script __initdata = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1255, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1120, + .per_2_shp_addr = 1329, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1560, + .mcu_2_ata_addr = 1479, + .app_2_per_addr = 1189, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1407, + .shp_2_mcu_addr = 979, +}; + +static struct sdma_platform_data imx25_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx25", + .to_version = 1, + .script_addrs = &imx25_sdma_script, +}; + void __init imx25_soc_init(void) { mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); + + imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index acc6db4..944e02d 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -82,4 +83,6 @@ void __init imx27_soc_init(void) mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + + imx_add_imx_dma(); } diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index cb16ac6..6af8519 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -57,9 +58,32 @@ void __init mx31_init_irq(void) mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { + .per_2_per_addr = 1677, +}; + +static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { + .ap_2_ap_addr = 423, + .ap_2_bp_addr = 829, + .bp_2_ap_addr = 1029, +}; + +static struct sdma_platform_data imx31_sdma_pdata __initdata = { + .sdma_version = 1, + .cpu_name = "imx31", + .script_addrs = &imx31_to2_sdma_script, +}; + void __init imx31_soc_init(void) { + int to_version = mx31_revision() >> 4; + mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); + + imx31_sdma_pdata.to_version = to_version; + if (to_version == 1) + imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; + imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 648bfca..9891adb 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -54,9 +55,52 @@ void __init mx35_init_irq(void) mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .uartsh_2_mcu_addr = 1183, + .per_2_shp_addr = 1033, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1333, + .mcu_2_ata_addr = 1252, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1111, + .shp_2_mcu_addr = 892, +}; + +static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1597, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1270, + .per_2_shp_addr = 1120, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1429, + .mcu_2_ata_addr = 1339, + .app_2_per_addr = 1531, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1198, + .shp_2_mcu_addr = 979, +}; + +static struct sdma_platform_data imx35_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx35", + .script_addrs = &imx35_to2_sdma_script, +}; + void __init imx35_soc_init(void) { + int to_version = mx35_revision() >> 4; + mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); + + imx35_sdma_pdata.to_version = to_version; + if (to_version == 1) + imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; + imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); } diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index 800bb8b2..aa848ea9 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -18,6 +18,7 @@ #include #include +#include #include /* @@ -100,12 +101,58 @@ void __init mx53_init_irq(void) tzic_init_irq(tzic_virt); } +static struct sdma_script_start_addrs imx51_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1473, + .mcu_2_ata_addr = 1392, + .app_2_per_addr = 1033, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1251, + .shp_2_mcu_addr = 892, +}; + +static struct sdma_platform_data imx51_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx51", + .to_version = 1, + .script_addrs = &imx51_sdma_script, +}; + +static struct sdma_script_start_addrs imx53_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .app_2_mcu_addr = 683, + .mcu_2_app_addr = 747, + .uart_2_mcu_addr = 817, + .shp_2_mcu_addr = 891, + .mcu_2_shp_addr = 960, + .uartsh_2_mcu_addr = 1032, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, + .firi_2_mcu_addr = 1193, + .mcu_2_firi_addr = 1290, +}; + +static struct sdma_platform_data imx53_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx53", + .to_version = 1, + .script_addrs = &imx53_sdma_script, +}; + void __init imx51_soc_init(void) { + int to_version = mx51_revision() >> 4; + mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); + + imx51_sdma_pdata.to_version = to_version; + imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); } void __init imx53_soc_init(void) @@ -117,4 +164,6 @@ void __init imx53_soc_init(void) mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); + + imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); } diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index fb166b2..0d6ed31b 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c @@ -95,8 +95,22 @@ struct device mxc_aips_bus = { .parent = &platform_bus, }; +struct device mxc_ahb_bus = { + .init_name = "mxc_ahb", + .parent = &platform_bus, +}; + static int __init mxc_device_init(void) { - return device_register(&mxc_aips_bus); + int ret; + + ret = device_register(&mxc_aips_bus); + if (IS_ERR_VALUE(ret)) + goto done; + + ret = device_register(&mxc_ahb_bus); + +done: + return ret; } core_initcall(mxc_device_init); diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 27104f5..2b0fdb2 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -6,235 +6,29 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include -#include - -#include #include -#include - -struct imx_imx_sdma_data { - resource_size_t iobase; - resource_size_t irq; - struct sdma_platform_data pdata; -}; - -#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ - { \ - .iobase = soc ## _SDMA ## _BASE_ADDR, \ - .irq = soc ## _INT_SDMA, \ - .pdata = { \ - .sdma_version = _sdma_version, \ - .cpu_name = _cpu_name, \ - .to_version = _to_version, \ - }, \ - } - -#ifdef CONFIG_SOC_IMX25 -struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); -#endif /* ifdef CONFIG_SOC_IMX25 */ -#ifdef CONFIG_SOC_IMX31 -struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); -#endif /* ifdef CONFIG_SOC_IMX31 */ - -#ifdef CONFIG_SOC_IMX35 -struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); -#endif /* ifdef CONFIG_SOC_IMX35 */ - -#ifdef CONFIG_SOC_IMX51 -struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); -#endif /* ifdef CONFIG_SOC_IMX51 */ - -#ifdef CONFIG_SOC_IMX53 -struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 0); -#endif /* ifdef CONFIG_SOC_IMX53 */ +struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +{ + return platform_device_register_resndata(&mxc_ahb_bus, + "imx-dma", -1, NULL, 0, NULL, 0); +} -static struct platform_device __init __maybe_unused *imx_add_imx_sdma( - const struct imx_imx_sdma_data *data) +struct platform_device __init __maybe_unused *imx_add_imx_sdma( + resource_size_t iobase, int irq, struct sdma_platform_data *pdata) { struct resource res[] = { { - .start = data->iobase, - .end = data->iobase + SZ_16K - 1, + .start = iobase, + .end = iobase + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { - .start = data->irq, - .end = data->irq, + .start = irq, + .end = irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("imx-sdma", -1, - res, ARRAY_SIZE(res), - &data->pdata, sizeof(data->pdata)); -} - -static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) -{ - return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); -} - -#ifdef CONFIG_ARCH_MX25 -static struct sdma_script_start_addrs addr_imx25 = { - .ap_2_ap_addr = 729, - .uart_2_mcu_addr = 904, - .per_2_app_addr = 1255, - .mcu_2_app_addr = 834, - .uartsh_2_mcu_addr = 1120, - .per_2_shp_addr = 1329, - .mcu_2_shp_addr = 1048, - .ata_2_mcu_addr = 1560, - .mcu_2_ata_addr = 1479, - .app_2_per_addr = 1189, - .app_2_mcu_addr = 770, - .shp_2_per_addr = 1407, - .shp_2_mcu_addr = 979, -}; -#endif - -#ifdef CONFIG_SOC_IMX31 -static struct sdma_script_start_addrs addr_imx31_to1 = { - .per_2_per_addr = 1677, -}; - -static struct sdma_script_start_addrs addr_imx31_to2 = { - .ap_2_ap_addr = 423, - .ap_2_bp_addr = 829, - .bp_2_ap_addr = 1029, -}; -#endif - -#ifdef CONFIG_SOC_IMX35 -static struct sdma_script_start_addrs addr_imx35_to1 = { - .ap_2_ap_addr = 642, - .uart_2_mcu_addr = 817, - .mcu_2_app_addr = 747, - .uartsh_2_mcu_addr = 1183, - .per_2_shp_addr = 1033, - .mcu_2_shp_addr = 961, - .ata_2_mcu_addr = 1333, - .mcu_2_ata_addr = 1252, - .app_2_mcu_addr = 683, - .shp_2_per_addr = 1111, - .shp_2_mcu_addr = 892, -}; - -static struct sdma_script_start_addrs addr_imx35_to2 = { - .ap_2_ap_addr = 729, - .uart_2_mcu_addr = 904, - .per_2_app_addr = 1597, - .mcu_2_app_addr = 834, - .uartsh_2_mcu_addr = 1270, - .per_2_shp_addr = 1120, - .mcu_2_shp_addr = 1048, - .ata_2_mcu_addr = 1429, - .mcu_2_ata_addr = 1339, - .app_2_per_addr = 1531, - .app_2_mcu_addr = 770, - .shp_2_per_addr = 1198, - .shp_2_mcu_addr = 979, -}; -#endif - -#ifdef CONFIG_SOC_IMX51 -static struct sdma_script_start_addrs addr_imx51 = { - .ap_2_ap_addr = 642, - .uart_2_mcu_addr = 817, - .mcu_2_app_addr = 747, - .mcu_2_shp_addr = 961, - .ata_2_mcu_addr = 1473, - .mcu_2_ata_addr = 1392, - .app_2_per_addr = 1033, - .app_2_mcu_addr = 683, - .shp_2_per_addr = 1251, - .shp_2_mcu_addr = 892, -}; -#endif - -#ifdef CONFIG_SOC_IMX53 -static struct sdma_script_start_addrs addr_imx53 = { - .ap_2_ap_addr = 642, - .app_2_mcu_addr = 683, - .mcu_2_app_addr = 747, - .uart_2_mcu_addr = 817, - .shp_2_mcu_addr = 891, - .mcu_2_shp_addr = 960, - .uartsh_2_mcu_addr = 1032, - .spdif_2_mcu_addr = 1100, - .mcu_2_spdif_addr = 1134, - .firi_2_mcu_addr = 1193, - .mcu_2_firi_addr = 1290, -}; -#endif - -static int __init imxXX_add_imx_dma(void) -{ - struct platform_device *ret; - -#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) - if (cpu_is_mx21() || cpu_is_mx27()) - ret = imx_add_imx_dma(); - else -#endif - -#if defined(CONFIG_SOC_IMX25) - if (cpu_is_mx25()) { - imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; - ret = imx_add_imx_sdma(&imx25_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX31) - if (cpu_is_mx31()) { - int to_version = mx31_revision() >> 4; - imx31_imx_sdma_data.pdata.to_version = to_version; - if (to_version == 1) - imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to1; - else - imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to2; - ret = imx_add_imx_sdma(&imx31_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX35) - if (cpu_is_mx35()) { - int to_version = mx35_revision() >> 4; - imx35_imx_sdma_data.pdata.to_version = to_version; - if (to_version == 1) - imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to1; - else - imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to2; - ret = imx_add_imx_sdma(&imx35_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX51) - if (cpu_is_mx51()) { - int to_version = mx51_revision() >> 4; - imx51_imx_sdma_data.pdata.to_version = to_version; - imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51; - ret = imx_add_imx_sdma(&imx51_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX53) - if (cpu_is_mx53()) { - imx53_imx_sdma_data.pdata.script_addrs = &addr_imx53; - ret = imx_add_imx_sdma(&imx53_imx_sdma_data); - } else -#endif - ret = ERR_PTR(-ENODEV); - - if (IS_ERR(ret)) - return PTR_ERR(ret); - - return 0; + return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma", + -1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } -arch_initcall(imxXX_add_imx_dma); diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 03f6266..bf93820 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -9,8 +9,10 @@ #include #include #include +#include extern struct device mxc_aips_bus; +extern struct device mxc_ahb_bus; struct platform_device *imx_add_platform_device_dmamask( const char *name, int id, @@ -293,3 +295,7 @@ struct imx_spi_imx_data { struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); + +struct platform_device *imx_add_imx_dma(void); +struct platform_device *imx_add_imx_sdma( + resource_size_t iobase, int irq, struct sdma_platform_data *pdata); -- cgit v0.10.2 From 2e534b21a51bad9d1fad125adac6ad49e64e1d7a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:31 +0800 Subject: dmaengine: imx-sdma: pass sdma firmware name via platform data It is not good to have cpu_name and to_version encoded into sdma firmware name as variables. For example, there are three TOs of imx51 soc, the sdma script never changes since TO1, which means all three TOs of imx51 uses TO1 version of sdma script. But we have to prepare three identical firmwares, sdma-imx51-to1.bin sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel capable of running on all three TOs. The patch removes cpu_name and to_version from sdma platform data, and instead uses fw_name to pass the firmware name, so that we can pass the TO version where it's relevant and skip it where only one firmware exists. Signed-off-by: Shawn Guo Acked-by: Vinod Koul Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 0c54520..1e0c956 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -80,8 +80,7 @@ static struct sdma_script_start_addrs imx25_sdma_script __initdata = { static struct sdma_platform_data imx25_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx25", - .to_version = 1, + .fw_name = "sdma-imx25.bin", .script_addrs = &imx25_sdma_script, }; diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index 6af8519..a1ff96f 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c @@ -70,7 +70,7 @@ static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { static struct sdma_platform_data imx31_sdma_pdata __initdata = { .sdma_version = 1, - .cpu_name = "imx31", + .fw_name = "sdma-imx31-to2.bin", .script_addrs = &imx31_to2_sdma_script, }; @@ -82,8 +82,11 @@ void __init imx31_soc_init(void) mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); - imx31_sdma_pdata.to_version = to_version; - if (to_version == 1) + if (to_version == 1) { + strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", + strlen(imx31_sdma_pdata.fw_name)); imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; + } + imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 9891adb..da530ca 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c @@ -87,7 +87,7 @@ static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { static struct sdma_platform_data imx35_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx35", + .fw_name = "sdma-imx35-to2.bin", .script_addrs = &imx35_to2_sdma_script, }; @@ -99,8 +99,11 @@ void __init imx35_soc_init(void) mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); - imx35_sdma_pdata.to_version = to_version; - if (to_version == 1) + if (to_version == 1) { + strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", + strlen(imx35_sdma_pdata.fw_name)); imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; + } + imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); } diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index aa848ea9..1b7059f 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -116,8 +116,7 @@ static struct sdma_script_start_addrs imx51_sdma_script __initdata = { static struct sdma_platform_data imx51_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx51", - .to_version = 1, + .fw_name = "sdma-imx51.bin", .script_addrs = &imx51_sdma_script, }; @@ -137,21 +136,17 @@ static struct sdma_script_start_addrs imx53_sdma_script __initdata = { static struct sdma_platform_data imx53_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx53", - .to_version = 1, + .fw_name = "sdma-imx53.bin", .script_addrs = &imx53_sdma_script, }; void __init imx51_soc_init(void) { - int to_version = mx51_revision() >> 4; - mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); - imx51_sdma_pdata.to_version = to_version; imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); } diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h index 913e043..f495c87 100644 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ b/arch/arm/plat-mxc/include/mach/sdma.h @@ -49,14 +49,12 @@ struct sdma_script_start_addrs { * struct sdma_platform_data - platform specific data for SDMA engine * * @sdma_version The version of this SDMA engine - * @cpu_name used to generate the firmware name - * @to_version CPU Tape out version + * @fw_name The firmware name * @script_addrs SDMA scripts addresses in SDMA ROM */ struct sdma_platform_data { int sdma_version; - char *cpu_name; - int to_version; + char *fw_name; struct sdma_script_start_addrs *script_addrs; }; diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index b6d1455..1ea47db 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -1105,7 +1105,7 @@ static void sdma_add_scripts(struct sdma_engine *sdma, } static int __init sdma_get_firmware(struct sdma_engine *sdma, - const char *cpu_name, int to_version) + const char *fw_name) { const struct firmware *fw; char *fwname; @@ -1114,7 +1114,7 @@ static int __init sdma_get_firmware(struct sdma_engine *sdma, const struct sdma_script_start_addrs *addr; unsigned short *ram_code; - fwname = kasprintf(GFP_KERNEL, "sdma-%s-to%d.bin", cpu_name, to_version); + fwname = kasprintf(GFP_KERNEL, "%s", fw_name); if (!fwname) return -ENOMEM; @@ -1317,7 +1317,7 @@ static int __init sdma_probe(struct platform_device *pdev) if (pdata->script_addrs) sdma_add_scripts(sdma, pdata->script_addrs); - sdma_get_firmware(sdma, pdata->cpu_name, pdata->to_version); + sdma_get_firmware(sdma, pdata->fw_name); sdma->dma_device.dev = &pdev->dev; -- cgit v0.10.2 From fce43f99631b03a65b9309d956bfca93a8fe052f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:08 -0300 Subject: ARM: mx53: Add support for missing UARTs MX53 has five UART ports. Add support for the missing UART4 and UART5 ports. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 7173b27..e60e7bc 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1254,12 +1254,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, &ipg_clk, &aips_tz1_clk); DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, NULL, NULL, &ipg_clk, &spba_clk); +DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET, + NULL, NULL, &ipg_clk, &spba_clk); +DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET, + NULL, NULL, &ipg_clk, &spba_clk); DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &uart_root_clk, &uart1_ipg_clk); DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, NULL, NULL, &uart_root_clk, &uart2_ipg_clk); DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, NULL, NULL, &uart_root_clk, &uart3_ipg_clk); +DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET, + NULL, NULL, &uart_root_clk, &uart4_ipg_clk); +DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET, + NULL, NULL, &uart_root_clk, &uart5_ipg_clk); /* GPT */ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, @@ -1464,6 +1472,8 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) + _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) + _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h index 87c0c58..5e11ba7 100644 --- a/arch/arm/mach-mx5/crm_regs.h +++ b/arch/arm/mach-mx5/crm_regs.h @@ -114,6 +114,8 @@ #define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) #define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) #define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) +#define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84) + #define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) /* Define the bits in register CCR */ diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index 3c854c2..cfce8c9 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { imx53_imx_uart_data_entry(0, 1), imx53_imx_uart_data_entry(1, 2), imx53_imx_uart_data_entry(2, 3), + imx53_imx_uart_data_entry(3, 4), + imx53_imx_uart_data_entry(4, 5), }; #endif /* ifdef CONFIG_SOC_IMX53 */ diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 74cd093..d1d1bf3 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -241,7 +241,7 @@ #define MX53_INT_IPU_ERR 10 #define MX53_INT_IPU_SYN 11 #define MX53_INT_GPU 12 -#define MX53_INT_RESV13 13 +#define MX53_INT_UART4 13 #define MX53_INT_USB_H1 14 #define MX53_INT_EMI 15 #define MX53_INT_USB_H2 16 @@ -314,7 +314,7 @@ #define MX53_INT_CAN2 83 #define MX53_INT_GPU2_IRQ 84 #define MX53_INT_GPU2_BUSY 85 -#define MX53_INT_RESV86 86 +#define MX53_INT_UART5 86 #define MX53_INT_FEC 87 #define MX53_INT_OWIRE 88 #define MX53_INT_CTI1_TG2 89 -- cgit v0.10.2 From e1fb61e38f8ec8e586c63d67a06197aa44ba952e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:09 -0300 Subject: ARM: mx53: Add SSI suport Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index e60e7bc..3a269f0 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1490,6 +1490,9 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) + _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) + _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 48f4c8c..b8a492f 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -32,3 +32,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; #define imx53_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) + +extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; +#define imx53_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 66b8593..21c6f30 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -76,6 +76,16 @@ const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_ssi_data imx53_imx_ssi_data[] __initconst = { +#define imx53_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX53, _id, _hwid, SZ_16K) + imx53_imx_ssi_data_entry(0, 1), + imx53_imx_ssi_data_entry(1, 2), + imx53_imx_ssi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_imx_ssi( const struct imx_imx_ssi_data *data, const struct imx_ssi_platform_data *pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index d1d1bf3..5e3c323 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -176,10 +176,10 @@ /* * DMA request assignments */ -#define MX53_DMA_REQ_SSI3_TX1 47 -#define MX53_DMA_REQ_SSI3_RX1 46 -#define MX53_DMA_REQ_SSI3_TX2 45 -#define MX53_DMA_REQ_SSI3_RX2 44 +#define MX53_DMA_REQ_SSI3_TX0 47 +#define MX53_DMA_REQ_SSI3_RX0 46 +#define MX53_DMA_REQ_SSI3_TX1 45 +#define MX53_DMA_REQ_SSI3_RX1 44 #define MX53_DMA_REQ_UART3_TX 43 #define MX53_DMA_REQ_UART3_RX 42 #define MX53_DMA_REQ_ESAI_TX 41 @@ -194,14 +194,14 @@ #define MX53_DMA_REQ_ASRC_DMA1 32 #define MX53_DMA_REQ_EMI_WR 31 #define MX53_DMA_REQ_EMI_RD 30 -#define MX53_DMA_REQ_SSI1_TX1 29 -#define MX53_DMA_REQ_SSI1_RX1 28 -#define MX53_DMA_REQ_SSI1_TX2 27 -#define MX53_DMA_REQ_SSI1_RX2 26 -#define MX53_DMA_REQ_SSI2_TX1 25 -#define MX53_DMA_REQ_SSI2_RX1 24 -#define MX53_DMA_REQ_SSI2_TX2 23 -#define MX53_DMA_REQ_SSI2_RX2 22 +#define MX53_DMA_REQ_SSI1_TX0 29 +#define MX53_DMA_REQ_SSI1_RX0 28 +#define MX53_DMA_REQ_SSI1_TX1 27 +#define MX53_DMA_REQ_SSI1_RX1 26 +#define MX53_DMA_REQ_SSI2_TX0 25 +#define MX53_DMA_REQ_SSI2_RX0 24 +#define MX53_DMA_REQ_SSI2_TX1 23 +#define MX53_DMA_REQ_SSI2_RX1 22 #define MX53_DMA_REQ_I2C2_SDHC2 21 #define MX53_DMA_REQ_I2C1_SDHC1 20 #define MX53_DMA_REQ_UART1_TX 19 -- cgit v0.10.2 From 22785de54bfeae4809a469483d9021730fe2f106 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:11 -0300 Subject: ARM: mx53: Add keypad support Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 3a269f0..ff16d86 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1493,6 +1493,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) + _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index b8a492f..c27fe8b 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -36,3 +36,7 @@ extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; #define imx53_add_imx_ssi(id, pdata) \ imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) + +extern const struct imx_imx_keypad_data imx53_imx_keypad_data; +#define imx53_add_imx_keypad(pdata) \ + imx_add_imx_keypad(&imx53_imx_keypad_data, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c index 2636611..479c3e9 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c @@ -46,6 +46,11 @@ const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = imx_imx_keypad_data_entry_single(MX51, SZ_16); #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_keypad_data imx53_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX53, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_imx_keypad( const struct imx_imx_keypad_data *data, const struct matrix_keymap_data *pdata) -- cgit v0.10.2 From d23cb578cc7c520d17c6a995e78a7a05cb0abe72 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 25 Jun 2011 13:28:53 -0300 Subject: ARM: mach-mx5/mx53_ard: Add missing definition commit 9203d59 (ARM:mach-mx5/mx53_ard: Add I2C2 and I2C3 support) missed to include the define for ARD_I2CPORTEXP_B. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 70ae25e..280cefc 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -38,6 +38,7 @@ #define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) #define ARD_SD1_CD IMX_GPIO_NR(1, 1) #define ARD_SD1_WP IMX_GPIO_NR(1, 9) +#define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ -- cgit v0.10.2 From 2a90a69f652edb410f7936d0271bfa8566ef6a87 Mon Sep 17 00:00:00 2001 From: Daiane Angolini Date: Thu, 30 Jun 2011 14:41:46 -0300 Subject: ARM: mach-mx5/mx53_ard: Add gpio_keys support Signed-off-by: Daiane Angolini Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 6a47d4c..b4e7c58 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -216,6 +216,7 @@ config MACH_MX53_ARD select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select IMX_HAVE_PLATFORM_GPIO_KEYS help Include support for MX53 ARD platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 280cefc..76a67c4 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -39,6 +39,11 @@ #define ARD_SD1_CD IMX_GPIO_NR(1, 1) #define ARD_SD1_WP IMX_GPIO_NR(1, 9) #define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) +#define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0) +#define ARD_HOME IMX_GPIO_NR(5, 10) +#define ARD_BACK IMX_GPIO_NR(5, 11) +#define ARD_PROG IMX_GPIO_NR(5, 12) +#define ARD_VOLUMEUP IMX_GPIO_NR(5, 13) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ @@ -91,6 +96,35 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { /* I2C3 */ MX53_PAD_GPIO_3__I2C3_SCL, MX53_PAD_GPIO_16__I2C3_SDA, + /* GPIO */ + MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */ + MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */ + MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */ + MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */ + MX53_PAD_GPIO_10__GPIO4_0, /* vol down */ +}; + +#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ +{ \ + .gpio = gpio_num, \ + .type = EV_KEY, \ + .code = ev_code, \ + .active_low = act_low, \ + .desc = "btn " descr, \ + .wakeup = wake, \ +} + +static struct gpio_keys_button ard_buttons[] = { + GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0), + GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0), + GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0), + GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0), + GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0), +}; + +static const struct gpio_keys_platform_data ard_button_data __initconst = { + .buttons = ard_buttons, + .nbuttons = ARRAY_SIZE(ard_buttons), }; static struct resource ard_smsc911x_resources[] = { @@ -199,6 +233,7 @@ static void __init mx53_ard_board_init(void) imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); + imx_add_gpio_keys(&ard_button_data); } static void __init mx53_ard_timer_init(void) -- cgit v0.10.2 From 97ea3da2048e9018f2513a36a95d2f14b3853d1a Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 1 Jul 2011 16:54:01 +0200 Subject: arm: mxs: add mmc-device for mach-tx28 Signed-off-by: Wolfram Sang Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 1d3985f..4cd0231 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -61,6 +61,7 @@ config MODULE_TX28 select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC select MXS_HAVE_PLATFORM_MXS_I2C + select MXS_HAVE_PLATFORM_MXS_MMC select MXS_HAVE_PLATFORM_MXS_PWM config MACH_TX28 diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 6766a12..515a423 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -139,6 +139,11 @@ static struct i2c_board_info tx28_stk5v3_i2c_boardinfo[] __initdata = { }, }; +static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = { + .wp_gpio = -EINVAL, + .flags = SLOTF_4_BIT_CAPABLE, +}; + static void __init tx28_stk5v3_init(void) { mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads, @@ -155,6 +160,7 @@ static void __init tx28_stk5v3_init(void) mx28_add_mxs_i2c(0); i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); + mx28_add_mxs_mmc(0, &tx28_mmc0_pdata); } static void __init tx28_timer_init(void) -- cgit v0.10.2 From 1459fc5f6d244b4e43690df5e9e28e8de390caf0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=BCrgen=20Lambrecht?= Date: Tue, 5 Jul 2011 15:35:31 +0200 Subject: Enable RTC driver. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MC13783 MFD also contains an RTC. Enable it. To avoid "No RTC device found, ALARM timers will not wake from suspend", this patch is needed: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=c008ba58af24dc5d0d8e9fe6e59d876910254761 Signed-off-by: Jürgen Lambrecht Signed-off-by: Sascha Hauer diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 84fb793..6fa6934 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -293,7 +293,8 @@ static struct mc13xxx_platform_data mc13783_pdata = { .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, + .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | + MC13783_USE_RTC, }; /* SPI */ -- cgit v0.10.2 From 0f962ae2dd8655f0800ff3c4b02d5f5a2ff3899e Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 5 Jul 2011 11:40:33 +0300 Subject: MFD: twl6040: Use resource to provide irq number for slaves Provide the irq number for slaves via resource on the platform device. The irq number configuration is done in the twl6040-core at probe time, so machine drivers do not need to be modified. Signed-off-by: Peter Ujfalusi Reviewed-by: Felipe Balbi Acked-by: Samuel Ortiz diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index cfaedb5..471f489 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -435,6 +435,18 @@ unsigned int twl6040_get_sysclk(struct twl6040 *twl6040) } EXPORT_SYMBOL(twl6040_get_sysclk); +static struct resource twl6040_vibra_rsrc[] = { + { + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource twl6040_codec_rsrc[] = { + { + .flags = IORESOURCE_IRQ, + }, +}; + static int __devinit twl6040_probe(struct platform_device *pdev) { struct twl4030_audio_data *pdata = pdev->dev.platform_data; @@ -499,16 +511,29 @@ static int __devinit twl6040_probe(struct platform_device *pdev) twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL); if (pdata->codec) { + int irq = twl6040->irq_base + TWL6040_IRQ_PLUG; + cell = &twl6040->cells[children]; cell->name = "twl6040-codec"; + twl6040_codec_rsrc[0].start = irq; + twl6040_codec_rsrc[0].end = irq; + cell->resources = twl6040_codec_rsrc; + cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); cell->platform_data = pdata->codec; cell->pdata_size = sizeof(*pdata->codec); children++; } if (pdata->vibra) { + int irq = twl6040->irq_base + TWL6040_IRQ_VIB; + cell = &twl6040->cells[children]; cell->name = "twl6040-vibra"; + twl6040_vibra_rsrc[0].start = irq; + twl6040_vibra_rsrc[0].end = irq; + cell->resources = twl6040_vibra_rsrc; + cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc); + cell->platform_data = pdata->vibra; cell->pdata_size = sizeof(*pdata->vibra); children++; -- cgit v0.10.2 From 625cbe46bc97a82dcd9254b5bc01c8520d78b227 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 19:50:02 +0300 Subject: input: twl6040-vibra: Do not use wrapper for irq request The twl6040_request_irq/free_irq inline functions are going to be removed, so replace them with direct calls. The irq number is provided by the core driver via resource. Signed-off-by: Peter Ujfalusi Reviewed-by: Felipe Balbi Acked-by: Dmitry Torokhov diff --git a/drivers/input/misc/twl6040-vibra.c b/drivers/input/misc/twl6040-vibra.c index dbf745d..c43002e 100644 --- a/drivers/input/misc/twl6040-vibra.c +++ b/drivers/input/misc/twl6040-vibra.c @@ -47,6 +47,7 @@ struct vibra_info { struct workqueue_struct *workqueue; struct work_struct play_work; struct mutex mutex; + int irq; bool enabled; int weak_speed; @@ -277,6 +278,13 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev) goto err_kzalloc; } + info->irq = platform_get_irq(pdev, 0); + if (info->irq < 0) { + dev_err(info->dev, "invalid irq\n"); + ret = -EINVAL; + goto err_kzalloc; + } + mutex_init(&info->mutex); info->input_dev = input_allocate_device(); @@ -308,9 +316,8 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev) platform_set_drvdata(pdev, info); - ret = twl6040_request_irq(info->twl6040, TWL6040_IRQ_VIB, - twl6040_vib_irq_handler, 0, - "twl6040_irq_vib", info); + ret = request_threaded_irq(info->irq, NULL, twl6040_vib_irq_handler, 0, + "twl6040_irq_vib", info); if (ret) { dev_err(info->dev, "VIB IRQ request failed: %d\n", ret); goto err_irq; @@ -360,7 +367,7 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev) err_voltage: regulator_bulk_free(ARRAY_SIZE(info->supplies), info->supplies); err_regulator: - twl6040_free_irq(info->twl6040, TWL6040_IRQ_VIB, info); + free_irq(info->irq, info); err_irq: input_unregister_device(info->input_dev); info->input_dev = NULL; @@ -379,7 +386,7 @@ static int __devexit twl6040_vibra_remove(struct platform_device *pdev) struct vibra_info *info = platform_get_drvdata(pdev); input_unregister_device(info->input_dev); - twl6040_free_irq(info->twl6040, TWL6040_IRQ_VIB, info); + free_irq(info->irq, info); regulator_bulk_free(ARRAY_SIZE(info->supplies), info->supplies); destroy_workqueue(info->workqueue); kfree(info); -- cgit v0.10.2 From 2a433b9daff58c8ff231b879242a586371acc93f Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 19:52:26 +0300 Subject: ASoC: twl6040: Do not use wrapper for irq request The twl6040_request_irq/free_irq inline functions are going to be removed, so replace them with direct calls. The irq number is provided by the core driver via resource. Signed-off-by: Peter Ujfalusi Reviewed-by: Felipe Balbi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 0145041..14e3a58 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -76,6 +76,7 @@ struct twl6040_jack_data { /* codec private data */ struct twl6040_data { + int plug_irq; int codec_powered; int pll; int non_lp; @@ -1527,6 +1528,8 @@ static int twl6040_probe(struct snd_soc_codec *codec) { struct twl6040_data *priv; struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); + struct platform_device *pdev = container_of(codec->dev, + struct platform_device, dev); int ret = 0; priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); @@ -1553,6 +1556,13 @@ static int twl6040_probe(struct snd_soc_codec *codec) priv->hf_right_step = 1; } + priv->plug_irq = platform_get_irq(pdev, 0); + if (priv->plug_irq < 0) { + dev_err(codec->dev, "invalid irq\n"); + ret = -EINVAL; + goto work_err; + } + priv->sysclk_constraints = &hp_constraints; priv->workqueue = create_singlethread_workqueue("twl6040-codec"); if (!priv->workqueue) { @@ -1581,9 +1591,8 @@ static int twl6040_probe(struct snd_soc_codec *codec) INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work); INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work); - ret = twl6040_request_irq(codec->control_data, TWL6040_IRQ_PLUG, - twl6040_audio_handler, 0, - "twl6040_irq_plug", codec); + ret = request_threaded_irq(priv->plug_irq, NULL, twl6040_audio_handler, + 0, "twl6040_irq_plug", codec); if (ret) { dev_err(codec->dev, "PLUG IRQ request failed: %d\n", ret); goto plugirq_err; @@ -1604,7 +1613,7 @@ static int twl6040_probe(struct snd_soc_codec *codec) return 0; bias_err: - twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec); + free_irq(priv->plug_irq, codec); plugirq_err: destroy_workqueue(priv->hs_workqueue); hswq_err: @@ -1621,7 +1630,7 @@ static int twl6040_remove(struct snd_soc_codec *codec) struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); - twl6040_free_irq(codec->control_data, TWL6040_IRQ_PLUG, codec); + free_irq(priv->plug_irq, codec); destroy_workqueue(priv->workqueue); destroy_workqueue(priv->hf_workqueue); destroy_workqueue(priv->hs_workqueue); -- cgit v0.10.2 From d20e1d21fd0c398a8beb170beacf8e2ca839844c Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 20:15:19 +0300 Subject: MFD: twl6040: Demand valid interrupt configuration In order to operate correctly twl6040 needs correct interrupt configuration. The slave drivers (vibra, and ASoC codec) will refuse to probe, if the interrupt configuration is not correct. In this way some checks can be removed from the code. Signed-off-by: Peter Ujfalusi Reviewed-by: Felipe Balbi Acked-by: Samuel Ortiz diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 471f489..f71bb14 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -459,6 +459,12 @@ static int __devinit twl6040_probe(struct platform_device *pdev) return -EINVAL; } + /* In order to operate correctly we need valid interrupt config */ + if (!pdata->naudint_irq || !pdata->irq_base) { + dev_err(&pdev->dev, "Invalid IRQ configuration\n"); + return -EINVAL; + } + twl6040 = kzalloc(sizeof(struct twl6040), GFP_KERNEL); if (!twl6040) return -ENOMEM; @@ -491,20 +497,18 @@ static int __devinit twl6040_probe(struct platform_device *pdev) if (twl6040->rev == TWL6040_REV_ES1_0) twl6040->audpwron = -EINVAL; - if (twl6040->irq) { - /* codec interrupt */ - ret = twl6040_irq_init(twl6040); - if (ret) - goto gpio2_err; - - ret = twl6040_request_irq(twl6040, TWL6040_IRQ_READY, - twl6040_naudint_handler, 0, - "twl6040_irq_ready", twl6040); - if (ret) { - dev_err(twl6040->dev, "READY IRQ request failed: %d\n", - ret); - goto irq_err; - } + /* codec interrupt */ + ret = twl6040_irq_init(twl6040); + if (ret) + goto gpio2_err; + + ret = twl6040_request_irq(twl6040, TWL6040_IRQ_READY, + twl6040_naudint_handler, 0, + "twl6040_irq_ready", twl6040); + if (ret) { + dev_err(twl6040->dev, "READY IRQ request failed: %d\n", + ret); + goto irq_err; } /* dual-access registers controlled by I2C only */ @@ -553,11 +557,9 @@ static int __devinit twl6040_probe(struct platform_device *pdev) return 0; mfd_err: - if (twl6040->irq) - twl6040_free_irq(twl6040, TWL6040_IRQ_READY, twl6040); + twl6040_free_irq(twl6040, TWL6040_IRQ_READY, twl6040); irq_err: - if (twl6040->irq) - twl6040_irq_exit(twl6040); + twl6040_irq_exit(twl6040); gpio2_err: if (gpio_is_valid(twl6040->audpwron)) gpio_free(twl6040->audpwron); @@ -579,9 +581,7 @@ static int __devexit twl6040_remove(struct platform_device *pdev) gpio_free(twl6040->audpwron); twl6040_free_irq(twl6040, TWL6040_IRQ_READY, twl6040); - - if (twl6040->irq) - twl6040_irq_exit(twl6040); + twl6040_irq_exit(twl6040); mfd_remove_devices(&pdev->dev); platform_set_drvdata(pdev, NULL); diff --git a/drivers/mfd/twl6040-irq.c b/drivers/mfd/twl6040-irq.c index 938053541..b3f8dda 100644 --- a/drivers/mfd/twl6040-irq.c +++ b/drivers/mfd/twl6040-irq.c @@ -148,19 +148,6 @@ int twl6040_irq_init(struct twl6040 *twl6040) twl6040->irq_masks_cache = TWL6040_ALLINT_MSK; twl6040_reg_write(twl6040, TWL6040_REG_INTMR, TWL6040_ALLINT_MSK); - if (!twl6040->irq) { - dev_warn(twl6040->dev, - "no interrupt specified, no interrupts\n"); - twl6040->irq_base = 0; - return 0; - } - - if (!twl6040->irq_base) { - dev_err(twl6040->dev, - "no interrupt base specified, no interrupts\n"); - return 0; - } - /* Register them with genirq */ for (cur_irq = twl6040->irq_base; cur_irq < twl6040->irq_base + ARRAY_SIZE(twl6040_irqs); @@ -199,7 +186,6 @@ EXPORT_SYMBOL(twl6040_irq_init); void twl6040_irq_exit(struct twl6040 *twl6040) { - if (twl6040->irq) - free_irq(twl6040->irq, twl6040); + free_irq(twl6040->irq, twl6040); } EXPORT_SYMBOL(twl6040_irq_exit); -- cgit v0.10.2 From 1b7c4725e2e926eaeb8657ac22992ec27fe03135 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 20:16:23 +0300 Subject: MFD: twl6040: Remove wrapper for threaded irq request Remove the twl6040_request_irq/free_irq inline functions, and use direct calls instead in the core driver to register the threaded irq. Signed-off-by: Peter Ujfalusi Reviewed-by: Felipe Balbi Acked-by: Samuel Ortiz diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index f71bb14..6843977 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -502,9 +502,9 @@ static int __devinit twl6040_probe(struct platform_device *pdev) if (ret) goto gpio2_err; - ret = twl6040_request_irq(twl6040, TWL6040_IRQ_READY, - twl6040_naudint_handler, 0, - "twl6040_irq_ready", twl6040); + ret = request_threaded_irq(twl6040->irq_base + TWL6040_IRQ_READY, + NULL, twl6040_naudint_handler, 0, + "twl6040_irq_ready", twl6040); if (ret) { dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret); @@ -557,7 +557,7 @@ static int __devinit twl6040_probe(struct platform_device *pdev) return 0; mfd_err: - twl6040_free_irq(twl6040, TWL6040_IRQ_READY, twl6040); + free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040); irq_err: twl6040_irq_exit(twl6040); gpio2_err: @@ -580,7 +580,7 @@ static int __devexit twl6040_remove(struct platform_device *pdev) if (gpio_is_valid(twl6040->audpwron)) gpio_free(twl6040->audpwron); - twl6040_free_irq(twl6040, TWL6040_IRQ_READY, twl6040); + free_irq(twl6040->irq_base + TWL6040_IRQ_READY, twl6040); twl6040_irq_exit(twl6040); mfd_remove_devices(&pdev->dev); diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index c3c1de5..df890a2 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h @@ -215,28 +215,6 @@ struct twl6040 { u8 irq_masks_cache; }; -static inline int twl6040_request_irq(struct twl6040 *twl6040, int irq, - irq_handler_t handler, - unsigned long irqflags, - const char *name, - void *data) -{ - if (!twl6040->irq_base) - return -EINVAL; - - return request_threaded_irq(twl6040->irq_base + irq, NULL, handler, - irqflags, name, data); -} - -static inline void twl6040_free_irq(struct twl6040 *twl6040, int irq, - void *data) -{ - if (!twl6040->irq_base) - return; - - free_irq(twl6040->irq_base + irq, data); -} - int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg); int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val); -- cgit v0.10.2 From 7cca606794ceb597e95fd0a0f3a8dcdd51af55e0 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 27 Jun 2011 13:33:14 +0300 Subject: ASoC: twl6040: Use neutral name for power mode text/enum Change the variable names to be neutral (not refering to HS). This will ease up the introduction of PLL selection, which going to use the same enum strings. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 14e3a58..8f923e5 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -1013,13 +1013,13 @@ static const struct snd_kcontrol_new ep_driver_switch_controls = SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0); /* Headset power mode */ -static const char *twl6040_headset_power_texts[] = { +static const char *twl6040_power_mode_texts[] = { "Low-Power", "High-Perfomance", }; -static const struct soc_enum twl6040_headset_power_enum = - SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_headset_power_texts), - twl6040_headset_power_texts); +static const struct soc_enum twl6040_power_mode_enum = + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(twl6040_power_mode_texts), + twl6040_power_mode_texts); static int twl6040_headset_power_get_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) @@ -1068,7 +1068,7 @@ static const struct snd_kcontrol_new twl6040_snd_controls[] = { SOC_SINGLE_TLV("Earphone Playback Volume", TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv), - SOC_ENUM_EXT("Headset Power Mode", twl6040_headset_power_enum, + SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum, twl6040_headset_power_get_enum, twl6040_headset_power_put_enum), }; -- cgit v0.10.2 From af958c72af88405501fe61a43f8011614cff29f5 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 27 Jun 2011 17:03:14 +0300 Subject: ASoC: twl6040: Move PLL selection to codec driver It is better if the selection between the Low power, and High performance PLL is handled within the codec driver, not in machine driver(s) to avoid duplicated code, and also to have consistent tracking of the selected PLL, and the resulting differences in supported sample rates. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 8f923e5..94108ce 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -80,6 +80,7 @@ struct twl6040_data { int codec_powered; int pll; int non_lp; + int pll_power_mode; int hs_power_mode; int hs_power_mode_locked; unsigned int clk_in; @@ -210,6 +211,37 @@ static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = { TWL6040_REG_DLB, }; +/* set of rates for each pll: low-power and high-performance */ +static unsigned int lp_rates[] = { + 8000, + 11250, + 16000, + 22500, + 32000, + 44100, + 48000, + 88200, + 96000, +}; + +static struct snd_pcm_hw_constraint_list lp_constraints = { + .count = ARRAY_SIZE(lp_rates), + .list = lp_rates, +}; + +static unsigned int hp_rates[] = { + 8000, + 16000, + 32000, + 48000, + 96000, +}; + +static struct snd_pcm_hw_constraint_list hp_constraints = { + .count = ARRAY_SIZE(hp_rates), + .list = hp_rates, +}; + /* * read twl6040 register cache */ @@ -1049,6 +1081,43 @@ static int twl6040_headset_power_put_enum(struct snd_kcontrol *kcontrol, return ret; } +static int twl6040_pll_get_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); + + ucontrol->value.enumerated.item[0] = priv->pll_power_mode; + + return 0; +} + +static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); + + priv->pll_power_mode = ucontrol->value.enumerated.item[0]; + if (priv->pll_power_mode) + priv->sysclk_constraints = &hp_constraints; + else + priv->sysclk_constraints = &lp_constraints; + + return 0; +} + +int twl6040_get_clk_id(struct snd_soc_codec *codec) +{ + struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); + + if (priv->pll_power_mode) + return TWL6040_SYSCLK_SEL_HPPLL; + else + return TWL6040_SYSCLK_SEL_LPPLL; +} +EXPORT_SYMBOL_GPL(twl6040_get_clk_id); + static const struct snd_kcontrol_new twl6040_snd_controls[] = { /* Capture gains */ SOC_DOUBLE_TLV("Capture Preamplifier Volume", @@ -1071,6 +1140,9 @@ static const struct snd_kcontrol_new twl6040_snd_controls[] = { SOC_ENUM_EXT("Headset Power Mode", twl6040_power_mode_enum, twl6040_headset_power_get_enum, twl6040_headset_power_put_enum), + + SOC_ENUM_EXT("PLL Selection", twl6040_power_mode_enum, + twl6040_pll_get_enum, twl6040_pll_put_enum), }; static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { @@ -1289,38 +1361,6 @@ static int twl6040_set_bias_level(struct snd_soc_codec *codec, return 0; } -/* set of rates for each pll: low-power and high-performance */ - -static unsigned int lp_rates[] = { - 8000, - 11250, - 16000, - 22500, - 32000, - 44100, - 48000, - 88200, - 96000, -}; - -static struct snd_pcm_hw_constraint_list lp_constraints = { - .count = ARRAY_SIZE(lp_rates), - .list = lp_rates, -}; - -static unsigned int hp_rates[] = { - 8000, - 16000, - 32000, - 48000, - 96000, -}; - -static struct snd_pcm_hw_constraint_list hp_constraints = { - .count = ARRAY_SIZE(hp_rates), - .list = hp_rates, -}; - static int twl6040_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -1427,16 +1467,12 @@ static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, freq, priv->sysclk); if (ret) return ret; - - priv->sysclk_constraints = &lp_constraints; break; case TWL6040_SYSCLK_SEL_HPPLL: ret = twl6040_set_pll(twl6040, TWL6040_HPPLL_ID, freq, priv->sysclk); if (ret) return ret; - - priv->sysclk_constraints = &hp_constraints; break; default: dev_err(codec->dev, "unknown clk_id %d\n", clk_id); @@ -1563,7 +1599,7 @@ static int twl6040_probe(struct snd_soc_codec *codec) goto work_err; } - priv->sysclk_constraints = &hp_constraints; + priv->sysclk_constraints = &lp_constraints; priv->workqueue = create_singlethread_workqueue("twl6040-codec"); if (!priv->workqueue) { ret = -ENOMEM; diff --git a/sound/soc/codecs/twl6040.h b/sound/soc/codecs/twl6040.h index 234bfad..d8de678 100644 --- a/sound/soc/codecs/twl6040.h +++ b/sound/soc/codecs/twl6040.h @@ -24,5 +24,6 @@ void twl6040_hs_jack_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, int report); +int twl6040_get_clk_id(struct snd_soc_codec *codec); #endif /* End of __TWL6040_H__ */ diff --git a/sound/soc/omap/sdp4430.c b/sound/soc/omap/sdp4430.c index 5d67c25..b80efb0 100644 --- a/sound/soc/omap/sdp4430.c +++ b/sound/soc/omap/sdp4430.c @@ -36,8 +36,6 @@ #include "omap-pcm.h" #include "../codecs/twl6040.h" -static int twl6040_power_mode; - static int sdp4430_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { @@ -46,13 +44,13 @@ static int sdp4430_hw_params(struct snd_pcm_substream *substream, int clk_id, freq; int ret; - if (twl6040_power_mode) { - clk_id = TWL6040_SYSCLK_SEL_HPPLL; + clk_id = twl6040_get_clk_id(rtd->codec); + if (clk_id == TWL6040_SYSCLK_SEL_HPPLL) freq = 38400000; - } else { - clk_id = TWL6040_SYSCLK_SEL_LPPLL; + else if (clk_id == TWL6040_SYSCLK_SEL_LPPLL) freq = 32768; - } + else + return -EINVAL; /* set the codec mclk */ ret = snd_soc_dai_set_sysclk(codec_dai, clk_id, freq, @@ -83,35 +81,6 @@ static struct snd_soc_jack_pin hs_jack_pins[] = { }, }; -static int sdp4430_get_power_mode(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - ucontrol->value.integer.value[0] = twl6040_power_mode; - return 0; -} - -static int sdp4430_set_power_mode(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - if (twl6040_power_mode == ucontrol->value.integer.value[0]) - return 0; - - twl6040_power_mode = ucontrol->value.integer.value[0]; - - return 1; -} - -static const char *power_texts[] = {"Low-Power", "High-Performance"}; - -static const struct soc_enum sdp4430_enum[] = { - SOC_ENUM_SINGLE_EXT(2, power_texts), -}; - -static const struct snd_kcontrol_new sdp4430_controls[] = { - SOC_ENUM_EXT("TWL6040 Power Mode", sdp4430_enum[0], - sdp4430_get_power_mode, sdp4430_set_power_mode), -}; - /* SDP4430 machine DAPM */ static const struct snd_soc_dapm_widget sdp4430_twl6040_dapm_widgets[] = { SND_SOC_DAPM_MIC("Ext Mic", NULL), @@ -154,12 +123,6 @@ static int sdp4430_twl6040_init(struct snd_soc_pcm_runtime *rtd) struct snd_soc_dapm_context *dapm = &codec->dapm; int ret; - /* Add SDP4430 specific controls */ - ret = snd_soc_add_controls(codec, sdp4430_controls, - ARRAY_SIZE(sdp4430_controls)); - if (ret) - return ret; - /* Add SDP4430 specific widgets */ ret = snd_soc_dapm_new_controls(dapm, sdp4430_twl6040_dapm_widgets, ARRAY_SIZE(sdp4430_twl6040_dapm_widgets)); @@ -239,9 +202,6 @@ static int __init sdp4430_soc_init(void) if (ret) goto err; - /* Codec starts in HP mode */ - twl6040_power_mode = 1; - return 0; err: -- cgit v0.10.2 From f53c346c08425b6448cf9729e882e4057ea505f0 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 29 Jun 2011 13:28:18 +0300 Subject: ASoC: twl6040: Simplify sample rate constraint handling We can manage the sample rate constraints without the need to maintain a variable and a pointer. This simplifies the handling of the constraint, and makes it more robust. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 94108ce..c72268b 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -89,7 +89,6 @@ struct twl6040_data { u16 hs_right_step; u16 hf_left_step; u16 hf_right_step; - struct snd_pcm_hw_constraint_list *sysclk_constraints; struct twl6040_jack_data hs_jack; struct snd_soc_codec *codec; struct workqueue_struct *workqueue; @@ -224,11 +223,6 @@ static unsigned int lp_rates[] = { 96000, }; -static struct snd_pcm_hw_constraint_list lp_constraints = { - .count = ARRAY_SIZE(lp_rates), - .list = lp_rates, -}; - static unsigned int hp_rates[] = { 8000, 16000, @@ -237,9 +231,9 @@ static unsigned int hp_rates[] = { 96000, }; -static struct snd_pcm_hw_constraint_list hp_constraints = { - .count = ARRAY_SIZE(hp_rates), - .list = hp_rates, +static struct snd_pcm_hw_constraint_list sysclk_constraints[] = { + { .count = ARRAY_SIZE(lp_rates), .list = lp_rates, }, + { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, }; /* @@ -1099,10 +1093,6 @@ static int twl6040_pll_put_enum(struct snd_kcontrol *kcontrol, struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); priv->pll_power_mode = ucontrol->value.enumerated.item[0]; - if (priv->pll_power_mode) - priv->sysclk_constraints = &hp_constraints; - else - priv->sysclk_constraints = &lp_constraints; return 0; } @@ -1370,7 +1360,7 @@ static int twl6040_startup(struct snd_pcm_substream *substream, snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, - priv->sysclk_constraints); + &sysclk_constraints[priv->pll_power_mode]); return 0; } @@ -1599,7 +1589,6 @@ static int twl6040_probe(struct snd_soc_codec *codec) goto work_err; } - priv->sysclk_constraints = &lp_constraints; priv->workqueue = create_singlethread_workqueue("twl6040-codec"); if (!priv->workqueue) { ret = -ENOMEM; -- cgit v0.10.2 From 753621c2155bd49bff7d5d3844b3ddc203e44a06 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Sun, 3 Jul 2011 02:06:07 +0300 Subject: ASoC: twl6040: Configure PLL only once Avoid configuring the PLL several times during audio startup. We can configure the PLL at prepare time with parameters collected earlier hw_param, and set_dai_sysclk calls. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index c72268b..bd364c3 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -1343,9 +1343,6 @@ static int twl6040_set_bias_level(struct snd_soc_codec *codec, break; } - /* get PLL and sysclk after power transition */ - priv->pll = twl6040_get_pll(twl6040); - priv->sysclk = twl6040_get_sysclk(twl6040); codec->dapm.bias_level = level; return 0; @@ -1371,14 +1368,8 @@ static int twl6040_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_codec *codec = rtd->codec; - struct twl6040 *twl6040 = codec->control_data; struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); - unsigned int sysclk; - int rate, ret; - - /* nothing to do for high-perf pll, it supports only 48 kHz */ - if (priv->pll == TWL6040_HPPLL_ID) - return 0; + int rate; rate = params_rate(params); switch (rate) { @@ -1386,26 +1377,33 @@ static int twl6040_hw_params(struct snd_pcm_substream *substream, case 22500: case 44100: case 88200: - sysclk = 17640000; + /* These rates are not supported when HPPLL is in use */ + if (unlikely(priv->pll == TWL6040_SYSCLK_SEL_HPPLL)) { + dev_err(codec->dev, "HPPLL does not support rate %d\n", + rate); + return -EINVAL; + } + /* Capture is not supported with 17.64MHz sysclk */ + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + dev_err(codec->dev, + "capture mode is not supported at %dHz\n", + rate); + return -EINVAL; + } + priv->sysclk = 17640000; break; case 8000: case 16000: case 32000: case 48000: case 96000: - sysclk = 19200000; + priv->sysclk = 19200000; break; default: dev_err(codec->dev, "unsupported rate %d\n", rate); return -EINVAL; } - ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID, priv->clk_in, sysclk); - if (ret) - return ret; - - priv->sysclk = twl6040_get_sysclk(twl6040); - return 0; } @@ -1414,7 +1412,9 @@ static int twl6040_prepare(struct snd_pcm_substream *substream, { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_codec *codec = rtd->codec; + struct twl6040 *twl6040 = codec->control_data; struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); + int ret; if (!priv->sysclk) { dev_err(codec->dev, @@ -1422,24 +1422,19 @@ static int twl6040_prepare(struct snd_pcm_substream *substream, return -EINVAL; } - /* - * capture is not supported at 17.64 MHz, - * it's reserved for headset low-power playback scenario - */ - if ((priv->sysclk == 17640000) && - substream->stream == SNDRV_PCM_STREAM_CAPTURE) { - dev_err(codec->dev, - "capture mode is not supported at %dHz\n", - priv->sysclk); - return -EINVAL; - } - if ((priv->sysclk == 17640000) && priv->non_lp) { dev_err(codec->dev, "some enabled paths aren't supported at %dHz\n", priv->sysclk); return -EPERM; } + + ret = twl6040_set_pll(twl6040, priv->pll, priv->clk_in, priv->sysclk); + if (ret) { + dev_err(codec->dev, "Can not set PLL (%d)\n", ret); + return -EPERM; + } + return 0; } @@ -1447,32 +1442,19 @@ static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, unsigned int freq, int dir) { struct snd_soc_codec *codec = codec_dai->codec; - struct twl6040 *twl6040 = codec->control_data; struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); - int ret = 0; switch (clk_id) { case TWL6040_SYSCLK_SEL_LPPLL: - ret = twl6040_set_pll(twl6040, TWL6040_LPPLL_ID, - freq, priv->sysclk); - if (ret) - return ret; - break; case TWL6040_SYSCLK_SEL_HPPLL: - ret = twl6040_set_pll(twl6040, TWL6040_HPPLL_ID, - freq, priv->sysclk); - if (ret) - return ret; + priv->pll = clk_id; + priv->clk_in = freq; break; default: dev_err(codec->dev, "unknown clk_id %d\n", clk_id); return -EINVAL; } - priv->pll = twl6040_get_pll(twl6040); - priv->clk_in = freq; - priv->sysclk = twl6040_get_sysclk(twl6040); - return 0; } -- cgit v0.10.2 From cfb7a33bea259d2d72a64adcb3de28532170dc25 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 10:28:28 +0300 Subject: MFD: twl6040: Remove enum for PLL tracking There is no need to have two different types for tracking the selected PLL. Use only the defines, when dealing with the PLLs. Signed-off-by: Peter Ujfalusi Acked-by: Samuel Ortiz diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index 6843977..24d436c 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -270,7 +270,8 @@ int twl6040_power(struct twl6040 *twl6040, int on) goto out; } } - twl6040->pll = TWL6040_LPPLL_ID; + /* Default PLL configuration after power up */ + twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; twl6040->sysclk = 19200000; } else { /* already powered-down */ @@ -294,7 +295,6 @@ int twl6040_power(struct twl6040 *twl6040, int on) /* use manual power-down sequence */ twl6040_power_down(twl6040); } - twl6040->pll = TWL6040_NOPLL_ID; twl6040->sysclk = 0; } @@ -304,7 +304,7 @@ out: } EXPORT_SYMBOL(twl6040_power); -int twl6040_set_pll(struct twl6040 *twl6040, enum twl6040_pll_id id, +int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, unsigned int freq_in, unsigned int freq_out) { u8 hppllctl, lppllctl; @@ -315,8 +315,8 @@ int twl6040_set_pll(struct twl6040 *twl6040, enum twl6040_pll_id id, hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL); lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); - switch (id) { - case TWL6040_LPPLL_ID: + switch (pll_id) { + case TWL6040_SYSCLK_SEL_LPPLL: /* low-power PLL divider */ switch (freq_out) { case 17640000: @@ -352,10 +352,8 @@ int twl6040_set_pll(struct twl6040 *twl6040, enum twl6040_pll_id id, ret = -EINVAL; goto pll_out; } - - twl6040->pll = TWL6040_LPPLL_ID; break; - case TWL6040_HPPLL_ID: + case TWL6040_SYSCLK_SEL_HPPLL: /* high-performance PLL can provide only 19.2 MHz */ if (freq_out != 19200000) { dev_err(&twl6040_dev->dev, @@ -406,16 +404,15 @@ int twl6040_set_pll(struct twl6040 *twl6040, enum twl6040_pll_id id, twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); lppllctl &= ~TWL6040_LPLLENA; twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); - - twl6040->pll = TWL6040_HPPLL_ID; break; default: - dev_err(&twl6040_dev->dev, "unknown pll id %d\n", id); + dev_err(&twl6040_dev->dev, "unknown pll id %d\n", pll_id); ret = -EINVAL; goto pll_out; } twl6040->sysclk = freq_out; + twl6040->pll = pll_id; pll_out: mutex_unlock(&twl6040->mutex); @@ -423,9 +420,12 @@ pll_out: } EXPORT_SYMBOL(twl6040_set_pll); -enum twl6040_pll_id twl6040_get_pll(struct twl6040 *twl6040) +int twl6040_get_pll(struct twl6040 *twl6040) { - return twl6040->pll; + if (twl6040->power_count) + return twl6040->pll; + else + return -ENODEV; } EXPORT_SYMBOL(twl6040_get_pll); diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index df890a2..4c806f6 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h @@ -165,9 +165,6 @@ #define TWL6040_RESETSPLIT 0x04 #define TWL6040_INTCLRMODE 0x08 -#define TWL6040_SYSCLK_SEL_LPPLL 1 -#define TWL6040_SYSCLK_SEL_HPPLL 2 - /* STATUS (0x2E) fields */ #define TWL6040_PLUGCOMP 0x02 @@ -188,11 +185,9 @@ #define TWL6040_IRQ_VIB 4 #define TWL6040_IRQ_READY 5 -enum twl6040_pll_id { - TWL6040_NOPLL_ID, - TWL6040_LPPLL_ID, - TWL6040_HPPLL_ID, -}; +/* PLL selection */ +#define TWL6040_SYSCLK_SEL_LPPLL 0 +#define TWL6040_SYSCLK_SEL_HPPLL 1 struct twl6040 { struct device *dev; @@ -206,7 +201,7 @@ struct twl6040 { int power_count; int rev; - enum twl6040_pll_id pll; + int pll; unsigned int sysclk; unsigned int irq; @@ -223,9 +218,9 @@ int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask); int twl6040_power(struct twl6040 *twl6040, int on); -int twl6040_set_pll(struct twl6040 *twl6040, enum twl6040_pll_id id, +int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, unsigned int freq_in, unsigned int freq_out); -enum twl6040_pll_id twl6040_get_pll(struct twl6040 *twl6040); +int twl6040_get_pll(struct twl6040 *twl6040); unsigned int twl6040_get_sysclk(struct twl6040 *twl6040); int twl6040_irq_init(struct twl6040 *twl6040); void twl6040_irq_exit(struct twl6040 *twl6040); -- cgit v0.10.2 From ff593ca1a43042499cbe341fc91c9cc282c084cb Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 4 Jul 2011 10:35:23 +0300 Subject: ASoC: twl6040: No need to convert the PLL ID Since the PLL handling has been simplified, and rebased on 0, there is no longer need for converting the PLL ID. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index bd364c3..8784395 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -1101,10 +1101,7 @@ int twl6040_get_clk_id(struct snd_soc_codec *codec) { struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); - if (priv->pll_power_mode) - return TWL6040_SYSCLK_SEL_HPPLL; - else - return TWL6040_SYSCLK_SEL_LPPLL; + return priv->pll_power_mode; } EXPORT_SYMBOL_GPL(twl6040_get_clk_id); -- cgit v0.10.2 From 21385eeb02e59cb2a72b60cd146f9c1ce3cb0acd Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 5 Jul 2011 22:35:53 +0300 Subject: ASoC: twl6040: Add back support for legacy mode The legacy mode has been accidentaly removed by commit: ASoC: twl6040: add all ABE DAIs Add back the twl6040-hifi dai. Signed-off-by: Peter Ujfalusi Acked-by: Mark Brown diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 8784395..342c5a3 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -1464,6 +1464,24 @@ static struct snd_soc_dai_ops twl6040_dai_ops = { static struct snd_soc_dai_driver twl6040_dai[] = { { + .name = "twl6040-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = TWL6040_RATES, + .formats = TWL6040_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = TWL6040_RATES, + .formats = TWL6040_FORMATS, + }, + .ops = &twl6040_dai_ops, +}, +{ .name = "twl6040-ul", .capture = { .stream_name = "Capture", -- cgit v0.10.2 From eb032b9837a958e21ca000358a5bde5e17192ddb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20B=C3=BCsch?= Date: Mon, 4 Jul 2011 20:50:05 +0200 Subject: Update my e-mail address Signed-off-by: Michael Buesch Signed-off-by: Jiri Kosina diff --git a/.mailmap b/.mailmap index 353ad56..a4806f0 100644 --- a/.mailmap +++ b/.mailmap @@ -73,8 +73,7 @@ Linas Vepstas Mark Brown Matthieu CASTET Mayuresh Janorkar -Michael Buesch -Michael Buesch +Michael Buesch Michel Dänzer Mitesh shah Morten Welinder diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index 7725792..6f55333 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -294,7 +294,7 @@ When: The schedule was July 2008, but it was decided that we are going to keep t Why: The support code for the old firmware hurts code readability/maintainability and slightly hurts runtime performance. Bugfixes for the old firmware are not provided by Broadcom anymore. -Who: Michael Buesch +Who: Michael Buesch --------------------------- diff --git a/MAINTAINERS b/MAINTAINERS index 8552948..2aeb1d1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1569,7 +1569,7 @@ F: Documentation/sound/alsa/Bt87x.txt F: sound/pci/bt87x.c BT8XXGPIO DRIVER -M: Michael Buesch +M: Michael Buesch W: http://bu3sch.de/btgpio.php S: Maintained F: drivers/gpio/bt8xxgpio.c @@ -5860,7 +5860,7 @@ S: Maintained F: drivers/net/sonic.* SONICS SILICON BACKPLANE DRIVER (SSB) -M: Michael Buesch +M: Michael Buesch L: netdev@vger.kernel.org S: Maintained F: drivers/ssb/ diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index 73b529b..cfae815 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c @@ -1,7 +1,7 @@ /* * Copyright (C) 2004 Florian Schirmer * Copyright (C) 2006 Felix Fietkau - * Copyright (C) 2006 Michael Buesch + * Copyright (C) 2006 Michael Buesch * Copyright (C) 2010 Waldemar Brodkorb * Copyright (C) 2010-2011 Hauke Mehrtens * diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c index 6061022..5d4848a 100644 --- a/drivers/bcma/driver_chipcommon.c +++ b/drivers/bcma/driver_chipcommon.c @@ -3,7 +3,7 @@ * ChipCommon core driver * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c index f44177a..b4eb335 100644 --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c @@ -2,7 +2,7 @@ * Broadcom specific AMBA * ChipCommon Power Management Unit driver * - * Copyright 2009, Michael Buesch + * Copyright 2009, Michael Buesch * Copyright 2007, Broadcom Corporation * * Licensed under the GNU/GPL. See COPYING for details. diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c index e757e4e..1acc302 100644 --- a/drivers/bcma/driver_pci.c +++ b/drivers/bcma/driver_pci.c @@ -3,7 +3,7 @@ * PCI Core * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c index 2016aad..1bafb40 100644 --- a/drivers/char/hw_random/core.c +++ b/drivers/char/hw_random/core.c @@ -19,7 +19,7 @@ Copyright 2000,2001 Philipp Rumpf Added generic RNG API - Copyright 2006 Michael Buesch + Copyright 2006 Michael Buesch Copyright 2005 (c) MontaVista Software, Inc. Please read Documentation/hw_random.txt for details on use. diff --git a/drivers/gpio/bt8xxgpio.c b/drivers/gpio/bt8xxgpio.c index aa4f09a..ec57936 100644 --- a/drivers/gpio/bt8xxgpio.c +++ b/drivers/gpio/bt8xxgpio.c @@ -2,7 +2,7 @@ bt8xx GPIO abuser - Copyright (C) 2008 Michael Buesch + Copyright (C) 2008 Michael Buesch Please do _only_ contact the people listed _above_ with issues related to this driver. All the other people listed below are not related to this driver. Their names diff --git a/drivers/net/b44.c b/drivers/net/b44.c index a69331e..8bc56c2 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c @@ -5,7 +5,7 @@ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) * Copyright (C) 2006 Felix Fietkau (nbd@openwrt.org) * Copyright (C) 2006 Broadcom Corporation. - * Copyright (C) 2007 Michael Buesch + * Copyright (C) 2007 Michael Buesch * * Distribute under GPL. */ diff --git a/drivers/net/wireless/b43/debugfs.c b/drivers/net/wireless/b43/debugfs.c index 59f59fa..e751fde 100644 --- a/drivers/net/wireless/b43/debugfs.c +++ b/drivers/net/wireless/b43/debugfs.c @@ -4,7 +4,7 @@ debugfs driver debugging code - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c index 47d44bc..aa986bf 100644 --- a/drivers/net/wireless/b43/dma.c +++ b/drivers/net/wireless/b43/dma.c @@ -4,7 +4,7 @@ DMA ringbuffer and descriptor allocation/management - Copyright (c) 2005, 2006 Michael Buesch + Copyright (c) 2005, 2006 Michael Buesch Some code in this file is derived from the b44.c driver Copyright (C) 2002 David S. Miller diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c index 0cafafe..1125e77 100644 --- a/drivers/net/wireless/b43/leds.c +++ b/drivers/net/wireless/b43/leds.c @@ -5,7 +5,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005 Stefano Brivio - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch Copyright (c) 2005 Danny van Dyk Copyright (c) 2005 Andreas Jaggi diff --git a/drivers/net/wireless/b43/lo.c b/drivers/net/wireless/b43/lo.c index 2ef7d4b..f47a32d 100644 --- a/drivers/net/wireless/b43/lo.c +++ b/drivers/net/wireless/b43/lo.c @@ -6,7 +6,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005, 2006 Stefano Brivio - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch Copyright (c) 2005, 2006 Danny van Dyk Copyright (c) 2005, 2006 Andreas Jaggi diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index eb41596..5fb000f 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer Copyright (c) 2005 Stefano Brivio - Copyright (c) 2005-2009 Michael Buesch + Copyright (c) 2005-2009 Michael Buesch Copyright (c) 2005 Danny van Dyk Copyright (c) 2005 Andreas Jaggi diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h index a0d327f..df69033 100644 --- a/drivers/net/wireless/b43/main.h +++ b/drivers/net/wireless/b43/main.h @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi diff --git a/drivers/net/wireless/b43/pcmcia.c b/drivers/net/wireless/b43/pcmcia.c index 2c8461d..12b6b40 100644 --- a/drivers/net/wireless/b43/pcmcia.c +++ b/drivers/net/wireless/b43/pcmcia.c @@ -2,7 +2,7 @@ Broadcom B43 wireless driver - Copyright (c) 2007 Michael Buesch + Copyright (c) 2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/phy_a.c b/drivers/net/wireless/b43/phy_a.c index b01c8ced..64ea933 100644 --- a/drivers/net/wireless/b43/phy_a.c +++ b/drivers/net/wireless/b43/phy_a.c @@ -5,7 +5,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005-2007 Stefano Brivio - Copyright (c) 2005-2008 Michael Buesch + Copyright (c) 2005-2008 Michael Buesch Copyright (c) 2005, 2006 Danny van Dyk Copyright (c) 2005, 2006 Andreas Jaggi diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c index e46b2f4..2502ea5 100644 --- a/drivers/net/wireless/b43/phy_common.c +++ b/drivers/net/wireless/b43/phy_common.c @@ -5,7 +5,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005-2007 Stefano Brivio - Copyright (c) 2005-2008 Michael Buesch + Copyright (c) 2005-2008 Michael Buesch Copyright (c) 2005, 2006 Danny van Dyk Copyright (c) 2005, 2006 Andreas Jaggi diff --git a/drivers/net/wireless/b43/phy_g.c b/drivers/net/wireless/b43/phy_g.c index 1758a28..e4c9b46 100644 --- a/drivers/net/wireless/b43/phy_g.c +++ b/drivers/net/wireless/b43/phy_g.c @@ -5,7 +5,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005-2007 Stefano Brivio - Copyright (c) 2005-2008 Michael Buesch + Copyright (c) 2005-2008 Michael Buesch Copyright (c) 2005, 2006 Danny van Dyk Copyright (c) 2005, 2006 Andreas Jaggi diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c index 012c8da..014d5de 100644 --- a/drivers/net/wireless/b43/phy_lp.c +++ b/drivers/net/wireless/b43/phy_lp.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver IEEE 802.11a/g LP-PHY driver - Copyright (c) 2008-2009 Michael Buesch + Copyright (c) 2008-2009 Michael Buesch Copyright (c) 2009 Gábor Stefanik This program is free software; you can redistribute it and/or modify diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index 05960dd..3909a23 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver IEEE 802.11n PHY support - Copyright (c) 2008 Michael Buesch + Copyright (c) 2008 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/pio.c b/drivers/net/wireless/b43/pio.c index 72ab94d..5af0294 100644 --- a/drivers/net/wireless/b43/pio.c +++ b/drivers/net/wireless/b43/pio.c @@ -4,7 +4,7 @@ PIO data transfer - Copyright (c) 2005-2008 Michael Buesch + Copyright (c) 2005-2008 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/radio_2055.c b/drivers/net/wireless/b43/radio_2055.c index 44c6dea..93643f1 100644 --- a/drivers/net/wireless/b43/radio_2055.c +++ b/drivers/net/wireless/b43/radio_2055.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver IEEE 802.11n PHY and radio device data tables - Copyright (c) 2008 Michael Buesch + Copyright (c) 2008 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c index a617efe..acba64f 100644 --- a/drivers/net/wireless/b43/rfkill.c +++ b/drivers/net/wireless/b43/rfkill.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver RFKILL support - Copyright (c) 2007 Michael Buesch + Copyright (c) 2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c index 808e25b..cd9a24b1 100644 --- a/drivers/net/wireless/b43/sdio.c +++ b/drivers/net/wireless/b43/sdio.c @@ -4,7 +4,7 @@ * SDIO over Sonics Silicon Backplane bus glue for b43. * * Copyright (C) 2009 Albert Herranz - * Copyright (C) 2009 Michael Buesch + * Copyright (C) 2009 Michael Buesch * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/sysfs.c b/drivers/net/wireless/b43/sysfs.c index 57af619..1fba982 100644 --- a/drivers/net/wireless/b43/sysfs.c +++ b/drivers/net/wireless/b43/sysfs.c @@ -4,7 +4,7 @@ SYSFS support routines - Copyright (c) 2006 Michael Buesch + Copyright (c) 2006 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/tables.c b/drivers/net/wireless/b43/tables.c index 1ef9a64..ea288df 100644 --- a/drivers/net/wireless/b43/tables.c +++ b/drivers/net/wireless/b43/tables.c @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005-2007 Stefano Brivio - Copyright (c) 2006, 2006 Michael Buesch + Copyright (c) 2006, 2006 Michael Buesch Copyright (c) 2005 Danny van Dyk Copyright (c) 2005 Andreas Jaggi diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c index 59df3c6..b20311e 100644 --- a/drivers/net/wireless/b43/tables_lpphy.c +++ b/drivers/net/wireless/b43/tables_lpphy.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver IEEE 802.11a/g LP-PHY and radio device data tables - Copyright (c) 2009 Michael Buesch + Copyright (c) 2009 Michael Buesch Copyright (c) 2009 Gábor Stefanik This program is free software; you can redistribute it and/or modify diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c index 2de483b..916f238 100644 --- a/drivers/net/wireless/b43/tables_nphy.c +++ b/drivers/net/wireless/b43/tables_nphy.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver IEEE 802.11n PHY data tables - Copyright (c) 2008 Michael Buesch + Copyright (c) 2008 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/wa.c b/drivers/net/wireless/b43/wa.c index 8f4db44..51fc5c6 100644 --- a/drivers/net/wireless/b43/wa.c +++ b/drivers/net/wireless/b43/wa.c @@ -5,7 +5,7 @@ PHY workarounds. Copyright (c) 2005-2007 Stefano Brivio - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c index c8f99ae..8b2421e 100644 --- a/drivers/net/wireless/b43/xmit.c +++ b/drivers/net/wireless/b43/xmit.c @@ -6,7 +6,7 @@ Copyright (C) 2005 Martin Langer Copyright (C) 2005 Stefano Brivio - Copyright (C) 2005, 2006 Michael Buesch + Copyright (C) 2005, 2006 Michael Buesch Copyright (C) 2005 Danny van Dyk Copyright (C) 2005 Andreas Jaggi diff --git a/drivers/net/wireless/b43legacy/debugfs.c b/drivers/net/wireless/b43legacy/debugfs.c index f232618..5e28ad0 100644 --- a/drivers/net/wireless/b43legacy/debugfs.c +++ b/drivers/net/wireless/b43legacy/debugfs.c @@ -4,7 +4,7 @@ debugfs driver debugging code - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c index e03e01d..d25f21d 100644 --- a/drivers/net/wireless/b43legacy/dma.c +++ b/drivers/net/wireless/b43legacy/dma.c @@ -4,7 +4,7 @@ DMA ringbuffer and descriptor allocation/management - Copyright (c) 2005, 2006 Michael Buesch + Copyright (c) 2005, 2006 Michael Buesch Some code in this file is derived from the b44.c driver Copyright (C) 2002 David S. Miller diff --git a/drivers/net/wireless/b43legacy/ilt.c b/drivers/net/wireless/b43legacy/ilt.c index a849078..ee5682e 100644 --- a/drivers/net/wireless/b43legacy/ilt.c +++ b/drivers/net/wireless/b43legacy/ilt.c @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi diff --git a/drivers/net/wireless/b43legacy/leds.c b/drivers/net/wireless/b43legacy/leds.c index 37e9be8..2f1bfdc 100644 --- a/drivers/net/wireless/b43legacy/leds.c +++ b/drivers/net/wireless/b43legacy/leds.c @@ -5,7 +5,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005 Stefano Brivio - Copyright (c) 2005-2007 Michael Buesch + Copyright (c) 2005-2007 Michael Buesch Copyright (c) 2005 Danny van Dyk Copyright (c) 2005 Andreas Jaggi diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c index 1ab8861..1d7609a 100644 --- a/drivers/net/wireless/b43legacy/main.c +++ b/drivers/net/wireless/b43legacy/main.c @@ -4,7 +4,7 @@ * * Copyright (c) 2005 Martin Langer * Copyright (c) 2005-2008 Stefano Brivio - * Copyright (c) 2005, 2006 Michael Buesch + * Copyright (c) 2005, 2006 Michael Buesch * Copyright (c) 2005 Danny van Dyk * Copyright (c) 2005 Andreas Jaggi * Copyright (c) 2007 Larry Finger diff --git a/drivers/net/wireless/b43legacy/main.h b/drivers/net/wireless/b43legacy/main.h index 1f0e2e37..b74a058 100644 --- a/drivers/net/wireless/b43legacy/main.h +++ b/drivers/net/wireless/b43legacy/main.h @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Copyright (c) 2005 Stefano Brivio - Copyright (c) 2005, 2006 Michael Buesch + Copyright (c) 2005, 2006 Michael Buesch Copyright (c) 2005 Danny van Dyk Copyright (c) 2005 Andreas Jaggi Copyright (c) 2007 Larry Finger diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c index 28e477d..96faaef 100644 --- a/drivers/net/wireless/b43legacy/phy.c +++ b/drivers/net/wireless/b43legacy/phy.c @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi Copyright (c) 2007 Larry Finger diff --git a/drivers/net/wireless/b43legacy/phy.h b/drivers/net/wireless/b43legacy/phy.h index ecbe409..831a7a4 100644 --- a/drivers/net/wireless/b43legacy/phy.h +++ b/drivers/net/wireless/b43legacy/phy.h @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi Copyright (c) 2007 Larry Finger diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c index b033b0e..192251a 100644 --- a/drivers/net/wireless/b43legacy/pio.c +++ b/drivers/net/wireless/b43legacy/pio.c @@ -4,7 +4,7 @@ PIO Transmission - Copyright (c) 2005 Michael Buesch + Copyright (c) 2005 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43legacy/radio.c b/drivers/net/wireless/b43legacy/radio.c index 2df545c..475eb14 100644 --- a/drivers/net/wireless/b43legacy/radio.c +++ b/drivers/net/wireless/b43legacy/radio.c @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi Copyright (c) 2007 Larry Finger diff --git a/drivers/net/wireless/b43legacy/radio.h b/drivers/net/wireless/b43legacy/radio.h index ec4de28..bccb3d7 100644 --- a/drivers/net/wireless/b43legacy/radio.h +++ b/drivers/net/wireless/b43legacy/radio.h @@ -4,7 +4,7 @@ Copyright (c) 2005 Martin Langer , Stefano Brivio - Michael Buesch + Michael Buesch Danny van Dyk Andreas Jaggi diff --git a/drivers/net/wireless/b43legacy/rfkill.c b/drivers/net/wireless/b43legacy/rfkill.c index b90f223..c4559bc 100644 --- a/drivers/net/wireless/b43legacy/rfkill.c +++ b/drivers/net/wireless/b43legacy/rfkill.c @@ -3,7 +3,7 @@ Broadcom B43 wireless driver RFKILL support - Copyright (c) 2007 Michael Buesch + Copyright (c) 2007 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43legacy/sysfs.c b/drivers/net/wireless/b43legacy/sysfs.c index 56c384f..57f8b08 100644 --- a/drivers/net/wireless/b43legacy/sysfs.c +++ b/drivers/net/wireless/b43legacy/sysfs.c @@ -4,7 +4,7 @@ SYSFS support routines - Copyright (c) 2006 Michael Buesch + Copyright (c) 2006 Michael Buesch This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c index 3a95541..403cf06 100644 --- a/drivers/net/wireless/b43legacy/xmit.c +++ b/drivers/net/wireless/b43legacy/xmit.c @@ -6,7 +6,7 @@ Copyright (C) 2005 Martin Langer Copyright (C) 2005 Stefano Brivio - Copyright (C) 2005, 2006 Michael Buesch + Copyright (C) 2005, 2006 Michael Buesch Copyright (C) 2005 Danny van Dyk Copyright (C) 2005 Andreas Jaggi Copyright (C) 2007 Larry Finger diff --git a/drivers/ssb/b43_pci_bridge.c b/drivers/ssb/b43_pci_bridge.c index 744d3f6..bf53e44 100644 --- a/drivers/ssb/b43_pci_bridge.c +++ b/drivers/ssb/b43_pci_bridge.c @@ -5,7 +5,7 @@ * because of its small size we include it in the SSB core * instead of creating a standalone module. * - * Copyright 2007 Michael Buesch + * Copyright 2007 Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c index 06d15b6..5d9c97c 100644 --- a/drivers/ssb/driver_chipcommon.c +++ b/drivers/ssb/driver_chipcommon.c @@ -3,7 +3,7 @@ * Broadcom ChipCommon core driver * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c index 305ade7..cd7bf0b 100644 --- a/drivers/ssb/driver_chipcommon_pmu.c +++ b/drivers/ssb/driver_chipcommon_pmu.c @@ -2,7 +2,7 @@ * Sonics Silicon Backplane * Broadcom ChipCommon Power Management Unit driver * - * Copyright 2009, Michael Buesch + * Copyright 2009, Michael Buesch * Copyright 2007, Broadcom Corporation * * Licensed under the GNU/GPL. See COPYING for details. diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c index c3e1d3e6..dc47f30 100644 --- a/drivers/ssb/driver_extif.c +++ b/drivers/ssb/driver_extif.c @@ -3,7 +3,7 @@ * Broadcom EXTIF core driver * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * Copyright 2006, 2007, Felix Fietkau * Copyright 2007, Aurelien Jarno * diff --git a/drivers/ssb/driver_gige.c b/drivers/ssb/driver_gige.c index 5ba92a2..79e62f4 100644 --- a/drivers/ssb/driver_gige.c +++ b/drivers/ssb/driver_gige.c @@ -3,7 +3,7 @@ * Broadcom Gigabit Ethernet core driver * * Copyright 2008, Broadcom Corporation - * Copyright 2008, Michael Buesch + * Copyright 2008, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c index 97efce1..ced5015 100644 --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c @@ -3,7 +3,7 @@ * Broadcom MIPS core driver * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c index 82feb34..8c046aa 100644 --- a/drivers/ssb/driver_pcicore.c +++ b/drivers/ssb/driver_pcicore.c @@ -3,7 +3,7 @@ * Broadcom PCI-core driver * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/embedded.c b/drivers/ssb/embedded.c index a0e0d24..eec3e26 100644 --- a/drivers/ssb/embedded.c +++ b/drivers/ssb/embedded.c @@ -3,7 +3,7 @@ * Embedded systems support code * * Copyright 2005-2008, Broadcom Corporation - * Copyright 2006-2008, Michael Buesch + * Copyright 2006-2008, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c index f8a13f8..21df968 100644 --- a/drivers/ssb/main.c +++ b/drivers/ssb/main.c @@ -3,7 +3,7 @@ * Subsystem core * * Copyright 2005, Broadcom Corporation - * Copyright 2006, 2007, Michael Buesch + * Copyright 2006, 2007, Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c index 7ad4858..b17d3c3 100644 --- a/drivers/ssb/pci.c +++ b/drivers/ssb/pci.c @@ -1,7 +1,7 @@ /* * Sonics Silicon Backplane PCI-Hostbus related functions. * - * Copyright (C) 2005-2006 Michael Buesch + * Copyright (C) 2005-2006 Michael Buesch * Copyright (C) 2005 Martin Langer * Copyright (C) 2005 Stefano Brivio * Copyright (C) 2005 Danny van Dyk diff --git a/drivers/ssb/pcihost_wrapper.c b/drivers/ssb/pcihost_wrapper.c index f6c8c81..929225a 100644 --- a/drivers/ssb/pcihost_wrapper.c +++ b/drivers/ssb/pcihost_wrapper.c @@ -6,7 +6,7 @@ * Copyright (c) 2005 Stefano Brivio * Copyright (c) 2005 Danny van Dyk * Copyright (c) 2005 Andreas Jaggi - * Copyright (c) 2005-2007 Michael Buesch + * Copyright (c) 2005-2007 Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/pcmcia.c b/drivers/ssb/pcmcia.c index f853379..c821c6b 100644 --- a/drivers/ssb/pcmcia.c +++ b/drivers/ssb/pcmcia.c @@ -3,7 +3,7 @@ * PCMCIA-Hostbus related functions * * Copyright 2006 Johannes Berg - * Copyright 2007-2008 Michael Buesch + * Copyright 2007-2008 Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. */ diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c index 45e5bab..077a21b 100644 --- a/drivers/ssb/scan.c +++ b/drivers/ssb/scan.c @@ -2,7 +2,7 @@ * Sonics Silicon Backplane * Bus scanning * - * Copyright (C) 2005-2007 Michael Buesch + * Copyright (C) 2005-2007 Michael Buesch * Copyright (C) 2005 Martin Langer * Copyright (C) 2005 Stefano Brivio * Copyright (C) 2005 Danny van Dyk diff --git a/drivers/ssb/sdio.c b/drivers/ssb/sdio.c index 65a6080..63fd709 100644 --- a/drivers/ssb/sdio.c +++ b/drivers/ssb/sdio.c @@ -6,7 +6,7 @@ * * Based on drivers/ssb/pcmcia.c * Copyright 2006 Johannes Berg - * Copyright 2007-2008 Michael Buesch + * Copyright 2007-2008 Michael Buesch * * Licensed under the GNU/GPL. See COPYING for details. * diff --git a/drivers/ssb/sprom.c b/drivers/ssb/sprom.c index 45ff0e3..80d366f 100644 --- a/drivers/ssb/sprom.c +++ b/drivers/ssb/sprom.c @@ -2,7 +2,7 @@ * Sonics Silicon Backplane * Common SPROM support routines * - * Copyright (C) 2005-2008 Michael Buesch + * Copyright (C) 2005-2008 Michael Buesch * Copyright (C) 2005 Martin Langer * Copyright (C) 2005 Stefano Brivio * Copyright (C) 2005 Danny van Dyk diff --git a/drivers/usb/host/ohci-ssb.c b/drivers/usb/host/ohci-ssb.c index 48ee694..c4aea3b 100644 --- a/drivers/usb/host/ohci-ssb.c +++ b/drivers/usb/host/ohci-ssb.c @@ -2,7 +2,7 @@ * Sonics Silicon Backplane * Broadcom USB-core OHCI driver * - * Copyright 2007 Michael Buesch + * Copyright 2007 Michael Buesch * * Derived from the OHCI-PCI driver * Copyright 1999 Roman Weissgaerber diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h index c7ccaae..9043118 100644 --- a/include/linux/nl80211.h +++ b/include/linux/nl80211.h @@ -6,7 +6,7 @@ * Copyright 2006-2010 Johannes Berg * Copyright 2008 Michael Wu * Copyright 2008 Luis Carlos Cobo - * Copyright 2008 Michael Buesch + * Copyright 2008 Michael Buesch * Copyright 2008, 2009 Luis R. Rodriguez * Copyright 2008 Jouni Malinen * Copyright 2008 Colin McCabe diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h index a08d693..1a6b004 100644 --- a/include/linux/ssb/ssb_driver_chipcommon.h +++ b/include/linux/ssb/ssb_driver_chipcommon.h @@ -8,7 +8,7 @@ * gpio interface, extbus, and support for serial and parallel flashes. * * Copyright 2005, Broadcom Corporation - * Copyright 2006, Michael Buesch + * Copyright 2006, Michael Buesch * * Licensed under the GPL version 2. See COPYING for details. */ -- cgit v0.10.2 From 3d64b4496f5fd90618106555344205a522178c0c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 7 Jul 2011 11:35:20 +0000 Subject: ARM: Xilinx: merge board file into main platform code The zynq platform will never have board files other than the device tree one, so there is no point splitting it from common.c. This makes the code more compact. Signed-off-by: Arnd Bergmann Acked-by: John Linn diff --git a/arch/arm/mach-zynq/board_dt.c b/arch/arm/mach-zynq/board_dt.c index 5b4710d..e69de29 100644 --- a/arch/arm/mach-zynq/board_dt.c +++ b/arch/arm/mach-zynq/board_dt.c @@ -1,37 +0,0 @@ -/* - * This file contains code for boards with device tree support. - * - * Copyright (C) 2011 Xilinx - * - * based on arch/arm/mach-realview/core.c - * - * Copyright (C) 1999 - 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include "common.h" - -static const char *xilinx_dt_match[] = { - "xlnx,zynq-ep107", - NULL -}; - -MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") - .map_io = xilinx_map_io, - .init_irq = xilinx_irq_init, - .init_machine = xilinx_init_machine, - .timer = &xttcpss_sys_timer, - .dt_compat = xilinx_dt_match, -MACHINE_END diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index b3ac5c2..73e9368 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -21,8 +21,11 @@ #include #include #include +#include +#include #include +#include #include #include #include @@ -40,7 +43,7 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = { * xilinx_init_machine() - System specific initialization, intended to be * called from board specific initialization. */ -void __init xilinx_init_machine(void) +static void __init xilinx_init_machine(void) { #ifdef CONFIG_CACHE_L2X0 /* @@ -55,7 +58,7 @@ void __init xilinx_init_machine(void) /** * xilinx_irq_init() - Interrupt controller initialization for the GIC. */ -void __init xilinx_irq_init(void) +static void __init xilinx_irq_init(void) { gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE); } @@ -96,7 +99,20 @@ static struct map_desc io_desc[] __initdata = { /** * xilinx_map_io() - Create memory mappings needed for early I/O. */ -void __init xilinx_map_io(void) +static void __init xilinx_map_io(void) { iotable_init(io_desc, ARRAY_SIZE(io_desc)); } + +static const char *xilinx_dt_match[] = { + "xlnx,zynq-ep107", + NULL +}; + +MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") + .map_io = xilinx_map_io, + .init_irq = xilinx_irq_init, + .init_machine = xilinx_init_machine, + .timer = &xttcpss_sys_timer, + .dt_compat = xilinx_dt_match, +MACHINE_END diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index bca2196..a009644 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -17,13 +17,8 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ -#include #include -extern void xilinx_init_machine(void); -extern void xilinx_irq_init(void); -extern void xilinx_map_io(void); - extern struct sys_timer xttcpss_sys_timer; #endif -- cgit v0.10.2 From e5aae727c0014107c647c4148fa21c4f11e97307 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 27 Jun 2011 07:53:24 -0500 Subject: powerpc/85xx: Add P3041 SoC device tree include stub Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts index c2a1e3a..69cae67 100644 --- a/arch/powerpc/boot/dts/p3041ds.dts +++ b/arch/powerpc/boot/dts/p3041ds.dts @@ -32,7 +32,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/dts-v1/; +/include/ "p3041si.dtsi" / { model = "fsl,P3041DS"; @@ -41,300 +41,12 @@ #size-cells = <2>; interrupt-parent = <&mpic>; - aliases { - ccsr = &soc; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - memory { device_type = "memory"; }; soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3041-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - flash@0 { #address-cells = <1>; #size-cells = <1>; @@ -363,32 +75,7 @@ }; }; - sdhc: sdhc@114000 { - compatible = "fsl,p3041-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; eeprom@51 { compatible = "at24,24c256"; reg = <0x51>; @@ -399,193 +86,17 @@ }; }; - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = <0x1 0x1 0 0>; }; }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - usb0: usb@210000 { - compatible = "fsl,p3041-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p3041-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; }; localbus@ffe124000 { - compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; reg = <0xf 0xfe124000 0 0x1000>; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xf 0xe8000000 0x08000000 2 0 0xf 0xffa00000 0x00040000 3 0 0xf 0xffdf0000 0x00008000>; @@ -642,32 +153,10 @@ }; pci0: pcie@ffe200000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe200000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -679,32 +168,10 @@ }; pci1: pcie@ffe201000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe201000 0 0x1000>; - bus-range = <0 0xff>; ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -716,32 +183,10 @@ }; pci2: pcie@ffe202000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe202000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -753,32 +198,10 @@ }; pci3: pcie@ffe203000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe203000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 diff --git a/arch/powerpc/boot/dts/p3041si.dtsi b/arch/powerpc/boot/dts/p3041si.dtsi new file mode 100644 index 0000000..8b69580 --- /dev/null +++ b/arch/powerpc/boot/dts/p3041si.dtsi @@ -0,0 +1,660 @@ +/* + * P3041 Silicon Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +/ { + compatible = "fsl,P3041"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + pci3 = &pci3; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + +/* + rio0 = &rapidio0; + */ + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e500mc@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e500mc@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu2: PowerPC,e500mc@2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu3: PowerPC,e500mc@3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000>; + interrupts = <16 2 1 27>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p3041-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p3041-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + usb0: usb@210000 { + compatible = "fsl,p3041-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + phy_type = "utmi"; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p3041-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + dr_mode = "host"; + phy_type = "utmi"; + }; + + sata@220000 { + compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + }; + +/* + rapidio0: rapidio@ffe0c0000 +*/ + + localbus@ffe124000 { + compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; + interrupts = <25 2 0 0>; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; + + pci3: pcie@ffe203000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 12>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 12>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 43 1 0 0 + 0000 0 0 2 &mpic 0 1 0 0 + 0000 0 0 3 &mpic 4 1 0 0 + 0000 0 0 4 &mpic 8 1 0 0 + >; + }; + }; +}; -- cgit v0.10.2 From 8dbb6bc13617379a6534700e51634a3f88c9a513 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 23 Jun 2011 07:19:15 -0500 Subject: powerpc/85xx: Add P5020 SoC device tree include stub Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts index 069cff7..8366e2f 100644 --- a/arch/powerpc/boot/dts/p5020ds.dts +++ b/arch/powerpc/boot/dts/p5020ds.dts @@ -32,7 +32,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/dts-v1/; +/include/ "p5020si.dtsi" / { model = "fsl,P5020DS"; @@ -41,292 +41,12 @@ #size-cells = <2>; interrupt-parent = <&mpic>; - aliases { - ccsr = &soc; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e5500@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e5500@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - memory { device_type = "memory"; }; soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p5020-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - flash@0 { #address-cells = <1>; #size-cells = <1>; @@ -355,32 +75,7 @@ }; }; - sdhc: sdhc@114000 { - compatible = "fsl,p5020-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; eeprom@51 { compatible = "at24,24c256"; reg = <0x51>; @@ -391,193 +86,17 @@ }; }; - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = <0x1 0x1 0 0>; }; }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - usb0: usb@210000 { - compatible = "fsl,p5020-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p5020-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; }; localbus@ffe124000 { - compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; reg = <0xf 0xfe124000 0 0x1000>; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xf 0xe8000000 0x08000000 2 0 0xf 0xffa00000 0x00040000 3 0 0xf 0xffdf0000 0x00008000>; @@ -634,33 +153,11 @@ }; pci0: pcie@ffe200000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe200000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -672,32 +169,10 @@ }; pci1: pcie@ffe201000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe201000 0 0x1000>; - bus-range = <0 0xff>; ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -709,32 +184,10 @@ }; pci2: pcie@ffe202000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe202000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 @@ -746,32 +199,10 @@ }; pci3: pcie@ffe203000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; reg = <0xf 0xfe203000 0 0x1000>; - bus-range = <0x0 0xff>; ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 diff --git a/arch/powerpc/boot/dts/p5020si.dtsi b/arch/powerpc/boot/dts/p5020si.dtsi new file mode 100644 index 0000000..5e6048e --- /dev/null +++ b/arch/powerpc/boot/dts/p5020si.dtsi @@ -0,0 +1,652 @@ +/* + * P5020 Silicon Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +/ { + compatible = "fsl,P5020"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + pci3 = &pci3; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + +/* + rio0 = &rapidio0; + */ + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e5500@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e5500@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + memory-controller@9000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x9000 0x1000>; + interrupts = <16 2 1 22>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000 + 0x11000 0x1000>; + interrupts = <16 2 1 27 + 16 2 1 26>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p5020-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p5020-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + usb0: usb@210000 { + compatible = "fsl,p5020-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + phy_type = "utmi"; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p5020-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + dr_mode = "host"; + phy_type = "utmi"; + }; + + sata@220000 { + compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + }; + +/* + rapidio0: rapidio@ffe0c0000 +*/ + + localbus@ffe124000 { + compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; + interrupts = <25 2 0 0>; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; + + pci3: pcie@ffe203000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 12>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 12>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 43 1 0 0 + 0000 0 0 2 &mpic 0 1 0 0 + 0000 0 0 3 &mpic 4 1 0 0 + 0000 0 0 4 &mpic 8 1 0 0 + >; + }; + }; +}; -- cgit v0.10.2 From 00d2711d700ae77b5bb66ea7c73eaa2cf155fa97 Mon Sep 17 00:00:00 2001 From: Imre Kaloz Date: Thu, 7 Jul 2011 12:19:09 +0200 Subject: ARM: cns3xxx: Should select CPU_V6K CNS3XXX is based on MPCore, so select the right CPU option for it. Signed-off-by: Imre Kaloz Signed-off-by: Anton Vorontsov diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278..c2e5f3d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -321,7 +321,7 @@ config ARCH_CLPS711X config ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" - select CPU_V6 + select CPU_V6K select GENERIC_CLOCKEVENTS select ARM_GIC select MIGHT_HAVE_PCI -- cgit v0.10.2 From 93e85d8e902e1a4468c6ade5c6ec3dd3055a489f Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Wed, 6 Jul 2011 16:45:09 +0400 Subject: ARM: cns3xxx: Add support for L2 Cache Controller CNS3xxx SOCs have L310-compatible cache controller, so let's use it. With this patch benchmarking with 'gzip' shows that performance is doubled, and I'm still able to boot full-fledged userland over NFS (using PCIe NIC), so the support should be pretty robust. p.s. While CNS3xxx reports that it has PL310, it still needs to wait on cache line operations, so we should not select 'CACHE_PL310', which is a micro-optimization that removes these waits for v7 CPUs. Someday we'd better rename CACHE_PL310 Kconfig option into NO_CACHE_WAIT or something less ambiguous. Signed-off-by: Anton Vorontsov diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 08e5c87..4b804ba 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -170,6 +170,8 @@ static struct platform_device *cns3420_pdevs[] __initdata = { static void __init cns3420_init(void) { + cns3xxx_l2x0_init(); + platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); cns3xxx_ahci_init(); diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index da30078..941a308 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include "core.h" @@ -244,3 +245,45 @@ static void __init cns3xxx_timer_init(void) struct sys_timer cns3xxx_timer = { .init = cns3xxx_timer_init, }; + +#ifdef CONFIG_CACHE_L2X0 + +void __init cns3xxx_l2x0_init(void) +{ + void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); + u32 val; + + if (WARN_ON(!base)) + return; + + /* + * Tag RAM Control register + * + * bit[10:8] - 1 cycle of write accesses latency + * bit[6:4] - 1 cycle of read accesses latency + * bit[3:0] - 1 cycle of setup latency + * + * 1 cycle of latency for setup, read and write accesses + */ + val = readl(base + L2X0_TAG_LATENCY_CTRL); + val &= 0xfffff888; + writel(val, base + L2X0_TAG_LATENCY_CTRL); + + /* + * Data RAM Control register + * + * bit[10:8] - 1 cycles of write accesses latency + * bit[6:4] - 1 cycles of read accesses latency + * bit[3:0] - 1 cycle of setup latency + * + * 1 cycle of latency for setup, read and write accesses + */ + val = readl(base + L2X0_DATA_LATENCY_CTRL); + val &= 0xfffff888; + writel(val, base + L2X0_DATA_LATENCY_CTRL); + + /* 32 KiB, 8-way, parity disable */ + l2x0_init(base, 0x00540000, 0xfe000fff); +} + +#endif /* CONFIG_CACHE_L2X0 */ diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index ffeb3a8..fcd2253 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h @@ -13,6 +13,12 @@ extern struct sys_timer cns3xxx_timer; +#ifdef CONFIG_CACHE_L2X0 +void __init cns3xxx_l2x0_init(void); +#else +static inline void cns3xxx_l2x0_init(void) {} +#endif /* CONFIG_CACHE_L2X0 */ + void __init cns3xxx_map_io(void); void __init cns3xxx_init_irq(void); void cns3xxx_power_off(void); diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0074b8d..cb26d49 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -821,7 +821,7 @@ config CACHE_L2X0 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE + ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_CNS3XXX default y select OUTER_CACHE select OUTER_CACHE_SYNC -- cgit v0.10.2 From 9df0fcc4c842703080ee431112d624b1f8f2f1c8 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 1 Jul 2011 08:52:26 +0000 Subject: omap: mcbsp: Remove rx_/tx_word_length variables These variables got unused after ("omap: mcbsp: Drop in-driver transfer support") but was noticed only afterwards. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 6c53508..63464ad 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -385,8 +385,6 @@ struct omap_mcbsp { void __iomem *io_base; u8 id; u8 free; - omap_mcbsp_word_length rx_word_length; - omap_mcbsp_word_length tx_word_length; int rx_irq; int tx_irq; diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 455eadc..3c1fbdc 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) if (cpu_is_omap34xx()) omap_st_start(mcbsp); - mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7; - mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7; - /* Only enable SRG, if McBSP is master */ w = MCBSP_READ_CACHE(mcbsp, PCR0); if (w & (FSXM | FSRM | CLKXM | CLKRM)) -- cgit v0.10.2 From fd1ee39151f397730a2b23d14fb232c098743f4b Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 1 Jul 2011 08:52:27 +0000 Subject: omap: mcbsp: Remove port number enums These McBSP port number enums are used only in two places in the McBSP code so we may remove then and just use numeric values like rest of the code does. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index d9af981..ab7395d 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) * On 1510, 1610 and 1710, McBSP1 and McBSP3 * are DSP public peripherals. */ - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { + if (id == 0 || id == 2) { if (dsp_use++ == 0) { api_clk = clk_get(NULL, "api_ck"); dsp_clk = clk_get(NULL, "dsp_ck"); @@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) static void omap1_mcbsp_free(unsigned int id) { - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { + if (id == 0 || id == 2) { if (--dsp_use == 0) { if (!IS_ERR(api_clk)) { clk_disable(api_clk); diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 63464ad..9882c65 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -33,7 +33,7 @@ #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ static struct platform_device omap_mcbsp##port_nr = { \ .name = "omap-mcbsp-dai", \ - .id = OMAP_MCBSP##port_nr, \ + .id = port_nr - 1, \ } #define MCBSP_CONFIG_TYPE2 0x2 @@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg { }; typedef enum { - OMAP_MCBSP1 = 0, - OMAP_MCBSP2, - OMAP_MCBSP3, - OMAP_MCBSP4, - OMAP_MCBSP5 -} omap_mcbsp_id; - -typedef enum { OMAP_MCBSP_WORD_8 = 0, OMAP_MCBSP_WORD_12, OMAP_MCBSP_WORD_16, -- cgit v0.10.2 From 5d4fac9716988dc7a26dddcd994f4dc7ee651e3c Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:19 -0700 Subject: drm/i915: don't set SDVO color range on ILK+ These bits are reserved on ILK+ (ILK+ provides this feature in the transcoder and pipe configuration instead, which we already set). Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index aa0a8e8..1b72aa42 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -124,7 +124,8 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, u32 sdvox; sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE; - sdvox |= intel_hdmi->color_range; + if (!HAS_PCH_SPLIT(dev)) + sdvox |= intel_hdmi->color_range; if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) sdvox |= SDVO_VSYNC_ACTIVE_HIGH; if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) -- cgit v0.10.2 From e9bcff5c0328f6edd3cbdd91783b23b5756f0880 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:20 -0700 Subject: drm/i915: don't set transcoder bpc on CougarPoint This prevents us from setting reserved or incorrect bits on CougarPoint. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 823b8d9..c675f9f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1158,12 +1158,15 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, reg = TRANSCONF(pipe); val = I915_READ(reg); - /* - * make the BPC in transcoder be consistent with - * that in pipeconf reg. - */ - val &= ~PIPE_BPC_MASK; - val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK; + + if (HAS_PCH_IBX(dev_priv->dev)) { + /* + * make the BPC in transcoder be consistent with + * that in pipeconf reg. + */ + val &= ~PIPE_BPC_MASK; + val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK; + } I915_WRITE(reg, val | TRANS_ENABLE); if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100)) DRM_ERROR("failed to enable transcoder %d\n", pipe); -- cgit v0.10.2 From 9325c9f088c42e3e07475d4f733ee6539ebf9c0b Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:21 -0700 Subject: drm/i915: set bpc for DP transcoder This may not be the default value, so pull the bpc out of the pipe reg and write it to the DP transcoder so proper dithering and signaling occurs. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c675f9f..ce3666d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2622,6 +2622,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc) /* For PCH DP, enable TRANS_DP_CTL */ if (HAS_PCH_CPT(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) { + u32 bpc = (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) >> 5; reg = TRANS_DP_CTL(pipe); temp = I915_READ(reg); temp &= ~(TRANS_DP_PORT_SEL_MASK | @@ -2629,7 +2630,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc) TRANS_DP_BPC_MASK); temp |= (TRANS_DP_OUTPUT_ENABLE | TRANS_DP_ENH_FRAMING); - temp |= TRANS_DP_8BPC; + temp |= bpc << 9; /* same format but at 11:9 */ if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC) temp |= TRANS_DP_HSYNC_ACTIVE_HIGH; -- cgit v0.10.2 From 5a3542041bf85a65633ed203c3782492116ebb94 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:22 -0700 Subject: drm/i915: split out Ironlake pipe bpp picking code Figuring out which pipe bpp to use is a bit painful. It depends on both the encoder and display configuration attached to a pipe. For instance, to drive a 24bpp framebuffer out to an 18bpp panel, we need to use 6bpc on the pipe but also enable dithering. But driving that same framebuffer to a DisplayPort output on another pipe means using 8bpc and no dithering. So split out and enhance the code to handle the various cases, returning an appropriate pipe bpp as well as whether dithering should be enabled. Save the resulting pipe bpp in the intel_crtc struct for use by encoders in calculating bandwidth requirements (defaults to 24bpp on pre-ILK). Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ce3666d..7c5d28f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4309,6 +4309,133 @@ static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv) return dev_priv->lvds_use_ssc && i915_panel_use_ssc; } +/** + * intel_choose_pipe_bpp_dither - figure out what color depth the pipe should send + * @crtc: CRTC structure + * + * A pipe may be connected to one or more outputs. Based on the depth of the + * attached framebuffer, choose a good color depth to use on the pipe. + * + * If possible, match the pipe depth to the fb depth. In some cases, this + * isn't ideal, because the connected output supports a lesser or restricted + * set of depths. Resolve that here: + * LVDS typically supports only 6bpc, so clamp down in that case + * HDMI supports only 8bpc or 12bpc, so clamp to 8bpc with dither for 10bpc + * Displays may support a restricted set as well, check EDID and clamp as + * appropriate. + * + * RETURNS: + * Dithering requirement (i.e. false if display bpc and pipe bpc match, + * true if they don't match). + */ +static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc, + unsigned int *pipe_bpp) +{ + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_encoder *encoder; + struct drm_connector *connector; + unsigned int display_bpc = UINT_MAX, bpc; + + /* Walk the encoders & connectors on this crtc, get min bpc */ + list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { + struct intel_encoder *intel_encoder = to_intel_encoder(encoder); + + if (encoder->crtc != crtc) + continue; + + if (intel_encoder->type == INTEL_OUTPUT_LVDS) { + unsigned int lvds_bpc; + + if ((I915_READ(PCH_LVDS) & LVDS_A3_POWER_MASK) == + LVDS_A3_POWER_UP) + lvds_bpc = 8; + else + lvds_bpc = 6; + + if (lvds_bpc < display_bpc) { + DRM_DEBUG_DRIVER("clamping display bpc (was %d) to LVDS (%d)\n", display_bpc, lvds_bpc); + display_bpc = lvds_bpc; + } + continue; + } + + if (intel_encoder->type == INTEL_OUTPUT_EDP) { + /* Use VBT settings if we have an eDP panel */ + unsigned int edp_bpc = dev_priv->edp.bpp / 3; + + if (edp_bpc < display_bpc) { + DRM_DEBUG_DRIVER("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc); + display_bpc = edp_bpc; + } + continue; + } + + /* Not one of the known troublemakers, check the EDID */ + list_for_each_entry(connector, &dev->mode_config.connector_list, + head) { + if (connector->encoder != encoder) + continue; + + if (connector->display_info.bpc < display_bpc) { + DRM_DEBUG_DRIVER("clamping display bpc (was %d) to EDID reported max of %d\n", display_bpc, connector->display_info.bpc); + display_bpc = connector->display_info.bpc; + } + } + + /* + * HDMI is either 12 or 8, so if the display lets 10bpc sneak + * through, clamp it down. (Note: >12bpc will be caught below.) + */ + if (intel_encoder->type == INTEL_OUTPUT_HDMI) { + if (display_bpc > 8 && display_bpc < 12) { + DRM_DEBUG_DRIVER("forcing bpc to 12 for HDMI\n"); + display_bpc = 12; + } else { + DRM_DEBUG_DRIVER("forcing bpc to 8 for HDMI\n"); + display_bpc = 8; + } + } + } + + /* + * We could just drive the pipe at the highest bpc all the time and + * enable dithering as needed, but that costs bandwidth. So choose + * the minimum value that expresses the full color range of the fb but + * also stays within the max display bpc discovered above. + */ + + switch (crtc->fb->depth) { + case 8: + bpc = 8; /* since we go through a colormap */ + break; + case 15: + case 16: + bpc = 6; /* min is 18bpp */ + break; + case 24: + bpc = min((unsigned int)8, display_bpc); + break; + case 30: + bpc = min((unsigned int)10, display_bpc); + break; + case 48: + bpc = min((unsigned int)12, display_bpc); + break; + default: + DRM_DEBUG("unsupported depth, assuming 24 bits\n"); + bpc = min((unsigned int)8, display_bpc); + break; + } + + DRM_DEBUG_DRIVER("setting pipe bpc to %d (max display bpc %d)\n", + bpc, display_bpc); + + *pipe_bpp = bpc * 3; + + return display_bpc != bpc; +} + static int i9xx_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -4721,7 +4848,9 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, struct fdi_m_n m_n = {0}; u32 temp; u32 lvds_sync = 0; - int target_clock, pixel_multiplier, lane, link_bw, bpp, factor; + int target_clock, pixel_multiplier, lane, link_bw, factor; + unsigned int pipe_bpp; + bool dither; list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { if (encoder->base.crtc != crtc) @@ -4848,56 +4977,37 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, /* determine panel color depth */ temp = I915_READ(PIPECONF(pipe)); temp &= ~PIPE_BPC_MASK; - if (is_lvds) { - /* the BPC will be 6 if it is 18-bit LVDS panel */ - if ((I915_READ(PCH_LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) - temp |= PIPE_8BPC; - else - temp |= PIPE_6BPC; - } else if (has_edp_encoder) { - switch (dev_priv->edp.bpp/3) { - case 8: - temp |= PIPE_8BPC; - break; - case 10: - temp |= PIPE_10BPC; - break; - case 6: - temp |= PIPE_6BPC; - break; - case 12: - temp |= PIPE_12BPC; - break; - } - } else - temp |= PIPE_8BPC; - I915_WRITE(PIPECONF(pipe), temp); - - switch (temp & PIPE_BPC_MASK) { - case PIPE_8BPC: - bpp = 24; + dither = intel_choose_pipe_bpp_dither(crtc, &pipe_bpp); + switch (pipe_bpp) { + case 18: + temp |= PIPE_6BPC; break; - case PIPE_10BPC: - bpp = 30; + case 24: + temp |= PIPE_8BPC; break; - case PIPE_6BPC: - bpp = 18; + case 30: + temp |= PIPE_10BPC; break; - case PIPE_12BPC: - bpp = 36; + case 36: + temp |= PIPE_12BPC; break; default: - DRM_ERROR("unknown pipe bpc value\n"); - bpp = 24; + WARN(1, "intel_choose_pipe_bpp returned invalid value\n"); + temp |= PIPE_8BPC; + pipe_bpp = 24; + break; } + intel_crtc->bpp = pipe_bpp; + I915_WRITE(PIPECONF(pipe), temp); + if (!lane) { /* * Account for spread spectrum to avoid * oversubscribing the link. Max center spread * is 2.5%; use 5% for safety's sake. */ - u32 bps = target_clock * bpp * 21 / 20; + u32 bps = target_clock * intel_crtc->bpp * 21 / 20; lane = bps / (link_bw * 8) + 1; } @@ -4905,7 +5015,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, if (pixel_multiplier > 1) link_bw *= pixel_multiplier; - ironlake_compute_m_n(bpp, lane, target_clock, link_bw, &m_n); + ironlake_compute_m_n(intel_crtc->bpp, lane, target_clock, link_bw, + &m_n); /* Ironlake: try to setup display ref clock before DPLL * enabling. This is only under driver's control after @@ -5108,14 +5219,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, I915_WRITE(PCH_LVDS, temp); } - /* set the dithering flag and clear for anything other than a panel. */ pipeconf &= ~PIPECONF_DITHER_EN; pipeconf &= ~PIPECONF_DITHER_TYPE_MASK; - if (dev_priv->lvds_dither && (is_lvds || has_edp_encoder)) { + if ((is_lvds && dev_priv->lvds_dither) || dither) { pipeconf |= PIPECONF_DITHER_EN; pipeconf |= PIPECONF_DITHER_TYPE_ST1; } - if (is_dp || intel_encoder_is_pch_edp(&has_edp_encoder->base)) { intel_dp_set_m_n(crtc, mode, adjusted_mode); } else { @@ -6638,6 +6747,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) intel_crtc_reset(&intel_crtc->base); intel_crtc->active = true; /* force the pipe off on setup_init_config */ + intel_crtc->bpp = 24; /* default for pre-Ironlake */ if (HAS_PCH_SPLIT(dev)) { intel_helper_funcs.prepare = ironlake_crtc_prepare; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 8ac3bd8..7ec48d8 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -170,6 +170,7 @@ struct intel_crtc { int16_t cursor_x, cursor_y; int16_t cursor_width, cursor_height; bool cursor_visible; + unsigned int bpp; }; #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) -- cgit v0.10.2 From 17638cd68d5cbcd75dfad25966c0c56a5c2bac9f Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:23 -0700 Subject: drm/i915: split out plane update code Updating the planes is device specific, so create a new display callback and use it in pipe_set_base. (In fact we could go even further, valid display plane bits have changed with each generation, as has tiled buffer handling.) Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4958ce0..a15f2c0 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -214,6 +214,8 @@ struct drm_i915_display_funcs { int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj); + int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb, + int x, int y); /* clock updates for mode set */ /* cursor updates */ /* render clock increase/decrease */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7c5d28f..c166a88 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1841,10 +1841,8 @@ err_interruptible: return ret; } -/* Assume fb object is pinned & idle & fenced and just update base pointers */ -static int -intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, - int x, int y, enum mode_set_atomic state) +static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, + int x, int y) { struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; @@ -1887,7 +1885,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, dspcntr |= DISPPLANE_32BPP_NO_ALPHA; break; default: - DRM_ERROR("Unknown color depth\n"); + DRM_ERROR("Unknown color depth %d\n", fb->bits_per_pixel); return -EINVAL; } if (INTEL_INFO(dev)->gen >= 4) { @@ -1897,10 +1895,6 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, dspcntr &= ~DISPPLANE_TILED; } - if (HAS_PCH_SPLIT(dev)) - /* must disable */ - dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE; - I915_WRITE(reg, dspcntr); Start = obj->gtt_offset; @@ -1917,6 +1911,99 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, I915_WRITE(DSPADDR(plane), Start + Offset); POSTING_READ(reg); + return 0; +} + +static int ironlake_update_plane(struct drm_crtc *crtc, + struct drm_framebuffer *fb, int x, int y) +{ + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_framebuffer *intel_fb; + struct drm_i915_gem_object *obj; + int plane = intel_crtc->plane; + unsigned long Start, Offset; + u32 dspcntr; + u32 reg; + + switch (plane) { + case 0: + case 1: + break; + default: + DRM_ERROR("Can't update plane %d in SAREA\n", plane); + return -EINVAL; + } + + intel_fb = to_intel_framebuffer(fb); + obj = intel_fb->obj; + + reg = DSPCNTR(plane); + dspcntr = I915_READ(reg); + /* Mask out pixel format bits in case we change it */ + dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; + switch (fb->bits_per_pixel) { + case 8: + dspcntr |= DISPPLANE_8BPP; + break; + case 16: + if (fb->depth != 16) + return -EINVAL; + + dspcntr |= DISPPLANE_16BPP; + break; + case 24: + case 32: + if (fb->depth == 24) + dspcntr |= DISPPLANE_32BPP_NO_ALPHA; + else if (fb->depth == 30) + dspcntr |= DISPPLANE_32BPP_30BIT_NO_ALPHA; + else + return -EINVAL; + break; + default: + DRM_ERROR("Unknown color depth %d\n", fb->bits_per_pixel); + return -EINVAL; + } + + if (obj->tiling_mode != I915_TILING_NONE) + dspcntr |= DISPPLANE_TILED; + else + dspcntr &= ~DISPPLANE_TILED; + + /* must disable */ + dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE; + + I915_WRITE(reg, dspcntr); + + Start = obj->gtt_offset; + Offset = y * fb->pitch + x * (fb->bits_per_pixel / 8); + + DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n", + Start, Offset, x, y, fb->pitch); + I915_WRITE(DSPSTRIDE(plane), fb->pitch); + I915_WRITE(DSPSURF(plane), Start); + I915_WRITE(DSPTILEOFF(plane), (y << 16) | x); + I915_WRITE(DSPADDR(plane), Offset); + POSTING_READ(reg); + + return 0; +} + +/* Assume fb object is pinned & idle & fenced and just update base pointers */ +static int +intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, + int x, int y, enum mode_set_atomic state) +{ + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int ret; + + ret = dev_priv->display.update_plane(crtc, fb, x, y); + if (ret) + return ret; + intel_update_fbc(dev); intel_increase_pllclock(crtc); @@ -7797,9 +7884,11 @@ static void intel_init_display(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) { dev_priv->display.dpms = ironlake_crtc_dpms; dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set; + dev_priv->display.update_plane = ironlake_update_plane; } else { dev_priv->display.dpms = i9xx_crtc_dpms; dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set; + dev_priv->display.update_plane = i9xx_update_plane; } if (I915_HAS_FBC(dev)) { -- cgit v0.10.2 From 858fa03527ded333dc5701f546bd5d1b5d7515ad Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:24 -0700 Subject: drm/i915: use pipe bpp in DP link bandwidth calculations The pipe may be driving various bpp values depending on the display configuration, so take that into account when calculating link bandwidth requirements. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 391b55f..26ce8c0 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -682,7 +682,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_encoder *encoder; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - int lane_count = 4, bpp = 24; + int lane_count = 4; struct intel_dp_m_n m_n; int pipe = intel_crtc->pipe; @@ -701,7 +701,6 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, break; } else if (is_edp(intel_dp)) { lane_count = dev_priv->edp.lanes; - bpp = dev_priv->edp.bpp; break; } } @@ -711,7 +710,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, * the number of bytes_per_pixel post-LUT, which we always * set up for 8-bits of R/G/B, or 3 bytes total. */ - intel_dp_compute_m_n(bpp, lane_count, + intel_dp_compute_m_n(intel_crtc->bpp, lane_count, mode->clock, adjusted_mode->clock, &m_n); if (HAS_PCH_SPLIT(dev)) { -- cgit v0.10.2 From 020f6704b5fbf687534ce53aeedc0364a995ae8a Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:25 -0700 Subject: drm/i915: use pipe bpp when setting HDMI bpc The Intel HDMI encoder can support 8bpc or 12bpc. Set the appropriate value based on the pipe bpp when configuring the output. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 1b72aa42..1ed8e69 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -131,6 +131,11 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) sdvox |= SDVO_HSYNC_ACTIVE_HIGH; + if (intel_crtc->bpp > 24) + sdvox |= COLOR_FORMAT_12bpc; + else + sdvox |= COLOR_FORMAT_8bpc; + /* Required on CPT */ if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev)) sdvox |= HDMI_MODE_SELECT; -- cgit v0.10.2 From 46e484566fe4dc8a34e0ccc154e2f8b939b9ec96 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:26 -0700 Subject: drm: bpp and depth changes require full mode sets To properly drive a framebuffer with a new depth or bpp, dither settings and link bandwidth calculations may change, so make sure we go through a full mode set in that case. Reported-by: Chris Wilson Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index 9236965..f88a9b2 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c @@ -560,6 +560,11 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) mode_changed = true; } else if (set->fb == NULL) { mode_changed = true; + } else if (set->fb->depth != set->crtc->fb->depth) { + mode_changed = true; + } else if (set->fb->bits_per_pixel != + set->crtc->fb->bits_per_pixel) { + mode_changed = true; } else fb_changed = true; } -- cgit v0.10.2 From b5626747eca6d02124544d1d69049220f1c01fb1 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:27 -0700 Subject: drm/i915: check for supported depth at fb init time This will catch bad fb configs earlier. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c166a88..af3e5813 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7061,6 +7061,11 @@ int intel_framebuffer_init(struct drm_device *dev, switch (mode_cmd->bpp) { case 8: case 16: + /* Only pre-ILK can handle 5:5:5 */ + if (mode_cmd->depth == 15 && !HAS_PCH_SPLIT(dev)) + return -EINVAL; + break; + case 24: case 32: break; -- cgit v0.10.2 From 89c6143263ef8e14e42e17324a234418d8030b10 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Fri, 24 Jun 2011 12:19:28 -0700 Subject: drm/i915: use pipe bpp in DP link bandwidth calculation Now that we track bpp on a per-pipe basis, we can use the actual value rather than assuming 24bpp. Signed-off-by: Jesse Barnes Reviewed-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 26ce8c0..e17de2b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -179,12 +179,14 @@ intel_dp_link_clock(uint8_t link_bw) static int intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock) { - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_crtc *crtc = intel_dp->base.base.crtc; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + int bpp = 24; - if (is_edp(intel_dp)) - return (pixel_clock * dev_priv->edp.bpp + 7) / 8; - else - return pixel_clock * 3; + if (intel_crtc) + bpp = intel_crtc->bpp; + + return (pixel_clock * bpp + 7) / 8; } static int -- cgit v0.10.2 From 6db7199407ca56f55bc0832fb124e1ad216ea57b Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 9 Jun 2011 15:52:06 -0500 Subject: drivers/virt: introduce Freescale hypervisor management driver Add the drivers/virt directory, which houses drivers that support virtualization environments, and add the Freescale hypervisor management driver. The Freescale hypervisor management driver provides several services to drivers and applications related to the Freescale hypervisor: 1. An ioctl interface for querying and managing partitions 2. A file interface to reading incoming doorbells 3. An interrupt handler for shutting down the partition upon receiving the shutdown doorbell from a manager partition 4. A kernel interface for receiving callbacks when a managed partition shuts down. Signed-off-by: Timur Tabi Acked-by: Arnd Bergmann Signed-off-by: Kumar Gala diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index 3a46e36..72ba8d5 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt @@ -301,6 +301,7 @@ Code Seq#(hex) Include File Comments 0xAE all linux/kvm.h Kernel-based Virtual Machine +0xAF 00-1F linux/fsl_hypervisor.h Freescale hypervisor 0xB0 all RATIO devices in development: 0xB1 00-1F PPPoX diff --git a/drivers/Kconfig b/drivers/Kconfig index 3bb154d..3c1d4a5 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -126,4 +126,6 @@ source "drivers/hwspinlock/Kconfig" source "drivers/clocksource/Kconfig" +source "drivers/virt/Kconfig" + endmenu diff --git a/drivers/Makefile b/drivers/Makefile index 09f3232..cd546eb 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -122,3 +122,6 @@ obj-y += ieee802154/ obj-y += clk/ obj-$(CONFIG_HWSPINLOCK) += hwspinlock/ + +# Virtualization drivers +obj-$(CONFIG_VIRT_DRIVERS) += virt/ diff --git a/drivers/virt/Kconfig b/drivers/virt/Kconfig new file mode 100644 index 0000000..2dcdbc9 --- /dev/null +++ b/drivers/virt/Kconfig @@ -0,0 +1,32 @@ +# +# Virtualization support drivers +# + +menuconfig VIRT_DRIVERS + bool "Virtualization drivers" + ---help--- + Say Y here to get to see options for device drivers that support + virtualization environments. + + If you say N, all options in this submenu will be skipped and disabled. + +if VIRT_DRIVERS + +config FSL_HV_MANAGER + tristate "Freescale hypervisor management driver" + depends on FSL_SOC + help + The Freescale hypervisor management driver provides several services + to drivers and applications related to the Freescale hypervisor: + + 1) An ioctl interface for querying and managing partitions. + + 2) A file interface to reading incoming doorbells. + + 3) An interrupt handler for shutting down the partition upon + receiving the shutdown doorbell from a manager partition. + + 4) A kernel interface for receiving callbacks when a managed + partition shuts down. + +endif diff --git a/drivers/virt/Makefile b/drivers/virt/Makefile new file mode 100644 index 0000000..c47f04d --- /dev/null +++ b/drivers/virt/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for drivers that support virtualization +# + +obj-$(CONFIG_FSL_HV_MANAGER) += fsl_hypervisor.o diff --git a/drivers/virt/fsl_hypervisor.c b/drivers/virt/fsl_hypervisor.c new file mode 100644 index 0000000..1d3b8eb --- /dev/null +++ b/drivers/virt/fsl_hypervisor.c @@ -0,0 +1,937 @@ +/* + * Freescale Hypervisor Management Driver + + * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. + * Author: Timur Tabi + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + * The Freescale hypervisor management driver provides several services to + * drivers and applications related to the Freescale hypervisor: + * + * 1. An ioctl interface for querying and managing partitions. + * + * 2. A file interface to reading incoming doorbells. + * + * 3. An interrupt handler for shutting down the partition upon receiving the + * shutdown doorbell from a manager partition. + * + * 4. A kernel interface for receiving callbacks when a managed partition + * shuts down. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +static BLOCKING_NOTIFIER_HEAD(failover_subscribers); + +/* + * Ioctl interface for FSL_HV_IOCTL_PARTITION_RESTART + * + * Restart a running partition + */ +static long ioctl_restart(struct fsl_hv_ioctl_restart __user *p) +{ + struct fsl_hv_ioctl_restart param; + + /* Get the parameters from the user */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_restart))) + return -EFAULT; + + param.ret = fh_partition_restart(param.partition); + + if (copy_to_user(&p->ret, ¶m.ret, sizeof(__u32))) + return -EFAULT; + + return 0; +} + +/* + * Ioctl interface for FSL_HV_IOCTL_PARTITION_STATUS + * + * Query the status of a partition + */ +static long ioctl_status(struct fsl_hv_ioctl_status __user *p) +{ + struct fsl_hv_ioctl_status param; + u32 status; + + /* Get the parameters from the user */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_status))) + return -EFAULT; + + param.ret = fh_partition_get_status(param.partition, &status); + if (!param.ret) + param.status = status; + + if (copy_to_user(p, ¶m, sizeof(struct fsl_hv_ioctl_status))) + return -EFAULT; + + return 0; +} + +/* + * Ioctl interface for FSL_HV_IOCTL_PARTITION_START + * + * Start a stopped partition. + */ +static long ioctl_start(struct fsl_hv_ioctl_start __user *p) +{ + struct fsl_hv_ioctl_start param; + + /* Get the parameters from the user */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_start))) + return -EFAULT; + + param.ret = fh_partition_start(param.partition, param.entry_point, + param.load); + + if (copy_to_user(&p->ret, ¶m.ret, sizeof(__u32))) + return -EFAULT; + + return 0; +} + +/* + * Ioctl interface for FSL_HV_IOCTL_PARTITION_STOP + * + * Stop a running partition + */ +static long ioctl_stop(struct fsl_hv_ioctl_stop __user *p) +{ + struct fsl_hv_ioctl_stop param; + + /* Get the parameters from the user */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_stop))) + return -EFAULT; + + param.ret = fh_partition_stop(param.partition); + + if (copy_to_user(&p->ret, ¶m.ret, sizeof(__u32))) + return -EFAULT; + + return 0; +} + +/* + * Ioctl interface for FSL_HV_IOCTL_MEMCPY + * + * The FH_MEMCPY hypercall takes an array of address/address/size structures + * to represent the data being copied. As a convenience to the user, this + * ioctl takes a user-create buffer and a pointer to a guest physically + * contiguous buffer in the remote partition, and creates the + * address/address/size array for the hypercall. + */ +static long ioctl_memcpy(struct fsl_hv_ioctl_memcpy __user *p) +{ + struct fsl_hv_ioctl_memcpy param; + + struct page **pages = NULL; + void *sg_list_unaligned = NULL; + struct fh_sg_list *sg_list = NULL; + + unsigned int num_pages; + unsigned long lb_offset; /* Offset within a page of the local buffer */ + + unsigned int i; + long ret = 0; + int num_pinned; /* return value from get_user_pages() */ + phys_addr_t remote_paddr; /* The next address in the remote buffer */ + uint32_t count; /* The number of bytes left to copy */ + + /* Get the parameters from the user */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_memcpy))) + return -EFAULT; + + /* + * One partition must be local, the other must be remote. In other + * words, if source and target are both -1, or are both not -1, then + * return an error. + */ + if ((param.source == -1) == (param.target == -1)) + return -EINVAL; + + /* + * The array of pages returned by get_user_pages() covers only + * page-aligned memory. Since the user buffer is probably not + * page-aligned, we need to handle the discrepancy. + * + * We calculate the offset within a page of the S/G list, and make + * adjustments accordingly. This will result in a page list that looks + * like this: + * + * ---- <-- first page starts before the buffer + * | | + * |////|-> ---- + * |////| | | + * ---- | | + * | | + * ---- | | + * |////| | | + * |////| | | + * |////| | | + * ---- | | + * | | + * ---- | | + * |////| | | + * |////| | | + * |////| | | + * ---- | | + * | | + * ---- | | + * |////| | | + * |////|-> ---- + * | | <-- last page ends after the buffer + * ---- + * + * The distance between the start of the first page and the start of the + * buffer is lb_offset. The hashed (///) areas are the parts of the + * page list that contain the actual buffer. + * + * The advantage of this approach is that the number of pages is + * equal to the number of entries in the S/G list that we give to the + * hypervisor. + */ + lb_offset = param.local_vaddr & (PAGE_SIZE - 1); + num_pages = (param.count + lb_offset + PAGE_SIZE - 1) >> PAGE_SHIFT; + + /* Allocate the buffers we need */ + + /* + * 'pages' is an array of struct page pointers that's initialized by + * get_user_pages(). + */ + pages = kzalloc(num_pages * sizeof(struct page *), GFP_KERNEL); + if (!pages) { + pr_debug("fsl-hv: could not allocate page list\n"); + return -ENOMEM; + } + + /* + * sg_list is the list of fh_sg_list objects that we pass to the + * hypervisor. + */ + sg_list_unaligned = kmalloc(num_pages * sizeof(struct fh_sg_list) + + sizeof(struct fh_sg_list) - 1, GFP_KERNEL); + if (!sg_list_unaligned) { + pr_debug("fsl-hv: could not allocate S/G list\n"); + ret = -ENOMEM; + goto exit; + } + sg_list = PTR_ALIGN(sg_list_unaligned, sizeof(struct fh_sg_list)); + + /* Get the physical addresses of the source buffer */ + down_read(¤t->mm->mmap_sem); + num_pinned = get_user_pages(current, current->mm, + param.local_vaddr - lb_offset, num_pages, + (param.source == -1) ? READ : WRITE, + 0, pages, NULL); + up_read(¤t->mm->mmap_sem); + + if (num_pinned != num_pages) { + /* get_user_pages() failed */ + pr_debug("fsl-hv: could not lock source buffer\n"); + ret = (num_pinned < 0) ? num_pinned : -EFAULT; + goto exit; + } + + /* + * Build the fh_sg_list[] array. The first page is special + * because it's misaligned. + */ + if (param.source == -1) { + sg_list[0].source = page_to_phys(pages[0]) + lb_offset; + sg_list[0].target = param.remote_paddr; + } else { + sg_list[0].source = param.remote_paddr; + sg_list[0].target = page_to_phys(pages[0]) + lb_offset; + } + sg_list[0].size = min_t(uint64_t, param.count, PAGE_SIZE - lb_offset); + + remote_paddr = param.remote_paddr + sg_list[0].size; + count = param.count - sg_list[0].size; + + for (i = 1; i < num_pages; i++) { + if (param.source == -1) { + /* local to remote */ + sg_list[i].source = page_to_phys(pages[i]); + sg_list[i].target = remote_paddr; + } else { + /* remote to local */ + sg_list[i].source = remote_paddr; + sg_list[i].target = page_to_phys(pages[i]); + } + sg_list[i].size = min_t(uint64_t, count, PAGE_SIZE); + + remote_paddr += sg_list[i].size; + count -= sg_list[i].size; + } + + param.ret = fh_partition_memcpy(param.source, param.target, + virt_to_phys(sg_list), num_pages); + +exit: + if (pages) { + for (i = 0; i < num_pages; i++) + if (pages[i]) + put_page(pages[i]); + } + + kfree(sg_list_unaligned); + kfree(pages); + + if (!ret) + if (copy_to_user(&p->ret, ¶m.ret, sizeof(__u32))) + return -EFAULT; + + return ret; +} + +/* + * Ioctl interface for FSL_HV_IOCTL_DOORBELL + * + * Ring a doorbell + */ +static long ioctl_doorbell(struct fsl_hv_ioctl_doorbell __user *p) +{ + struct fsl_hv_ioctl_doorbell param; + + /* Get the parameters from the user. */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_doorbell))) + return -EFAULT; + + param.ret = ev_doorbell_send(param.doorbell); + + if (copy_to_user(&p->ret, ¶m.ret, sizeof(__u32))) + return -EFAULT; + + return 0; +} + +static long ioctl_dtprop(struct fsl_hv_ioctl_prop __user *p, int set) +{ + struct fsl_hv_ioctl_prop param; + char __user *upath, *upropname; + void __user *upropval; + char *path = NULL, *propname = NULL; + void *propval = NULL; + int ret = 0; + + /* Get the parameters from the user. */ + if (copy_from_user(¶m, p, sizeof(struct fsl_hv_ioctl_prop))) + return -EFAULT; + + upath = (char __user *)(uintptr_t)param.path; + upropname = (char __user *)(uintptr_t)param.propname; + upropval = (void __user *)(uintptr_t)param.propval; + + path = strndup_user(upath, FH_DTPROP_MAX_PATHLEN); + if (IS_ERR(path)) { + ret = PTR_ERR(path); + goto out; + } + + propname = strndup_user(upropname, FH_DTPROP_MAX_PATHLEN); + if (IS_ERR(propname)) { + ret = PTR_ERR(propname); + goto out; + } + + if (param.proplen > FH_DTPROP_MAX_PROPLEN) { + ret = -EINVAL; + goto out; + } + + propval = kmalloc(param.proplen, GFP_KERNEL); + if (!propval) { + ret = -ENOMEM; + goto out; + } + + if (set) { + if (copy_from_user(propval, upropval, param.proplen)) { + ret = -EFAULT; + goto out; + } + + param.ret = fh_partition_set_dtprop(param.handle, + virt_to_phys(path), + virt_to_phys(propname), + virt_to_phys(propval), + param.proplen); + } else { + param.ret = fh_partition_get_dtprop(param.handle, + virt_to_phys(path), + virt_to_phys(propname), + virt_to_phys(propval), + ¶m.proplen); + + if (param.ret == 0) { + if (copy_to_user(upropval, propval, param.proplen) || + put_user(param.proplen, &p->proplen)) { + ret = -EFAULT; + goto out; + } + } + } + + if (put_user(param.ret, &p->ret)) + ret = -EFAULT; + +out: + kfree(path); + kfree(propval); + kfree(propname); + + return ret; +} + +/* + * Ioctl main entry point + */ +static long fsl_hv_ioctl(struct file *file, unsigned int cmd, + unsigned long argaddr) +{ + void __user *arg = (void __user *)argaddr; + long ret; + + switch (cmd) { + case FSL_HV_IOCTL_PARTITION_RESTART: + ret = ioctl_restart(arg); + break; + case FSL_HV_IOCTL_PARTITION_GET_STATUS: + ret = ioctl_status(arg); + break; + case FSL_HV_IOCTL_PARTITION_START: + ret = ioctl_start(arg); + break; + case FSL_HV_IOCTL_PARTITION_STOP: + ret = ioctl_stop(arg); + break; + case FSL_HV_IOCTL_MEMCPY: + ret = ioctl_memcpy(arg); + break; + case FSL_HV_IOCTL_DOORBELL: + ret = ioctl_doorbell(arg); + break; + case FSL_HV_IOCTL_GETPROP: + ret = ioctl_dtprop(arg, 0); + break; + case FSL_HV_IOCTL_SETPROP: + ret = ioctl_dtprop(arg, 1); + break; + default: + pr_debug("fsl-hv: bad ioctl dir=%u type=%u cmd=%u size=%u\n", + _IOC_DIR(cmd), _IOC_TYPE(cmd), _IOC_NR(cmd), + _IOC_SIZE(cmd)); + return -ENOTTY; + } + + return ret; +} + +/* Linked list of processes that have us open */ +static struct list_head db_list; + +/* spinlock for db_list */ +static DEFINE_SPINLOCK(db_list_lock); + +/* The size of the doorbell event queue. This must be a power of two. */ +#define QSIZE 16 + +/* Returns the next head/tail pointer, wrapping around the queue if necessary */ +#define nextp(x) (((x) + 1) & (QSIZE - 1)) + +/* Per-open data structure */ +struct doorbell_queue { + struct list_head list; + spinlock_t lock; + wait_queue_head_t wait; + unsigned int head; + unsigned int tail; + uint32_t q[QSIZE]; +}; + +/* Linked list of ISRs that we registered */ +struct list_head isr_list; + +/* Per-ISR data structure */ +struct doorbell_isr { + struct list_head list; + unsigned int irq; + uint32_t doorbell; /* The doorbell handle */ + uint32_t partition; /* The partition handle, if used */ +}; + +/* + * Add a doorbell to all of the doorbell queues + */ +static void fsl_hv_queue_doorbell(uint32_t doorbell) +{ + struct doorbell_queue *dbq; + unsigned long flags; + + /* Prevent another core from modifying db_list */ + spin_lock_irqsave(&db_list_lock, flags); + + list_for_each_entry(dbq, &db_list, list) { + if (dbq->head != nextp(dbq->tail)) { + dbq->q[dbq->tail] = doorbell; + /* + * This memory barrier eliminates the need to grab + * the spinlock for dbq. + */ + smp_wmb(); + dbq->tail = nextp(dbq->tail); + wake_up_interruptible(&dbq->wait); + } + } + + spin_unlock_irqrestore(&db_list_lock, flags); +} + +/* + * Interrupt handler for all doorbells + * + * We use the same interrupt handler for all doorbells. Whenever a doorbell + * is rung, and we receive an interrupt, we just put the handle for that + * doorbell (passed to us as *data) into all of the queues. + */ +static irqreturn_t fsl_hv_isr(int irq, void *data) +{ + fsl_hv_queue_doorbell((uintptr_t) data); + + return IRQ_HANDLED; +} + +/* + * State change thread function + * + * The state change notification arrives in an interrupt, but we can't call + * blocking_notifier_call_chain() in an interrupt handler. We could call + * atomic_notifier_call_chain(), but that would require the clients' call-back + * function to run in interrupt context. Since we don't want to impose that + * restriction on the clients, we use a threaded IRQ to process the + * notification in kernel context. + */ +static irqreturn_t fsl_hv_state_change_thread(int irq, void *data) +{ + struct doorbell_isr *dbisr = data; + + blocking_notifier_call_chain(&failover_subscribers, dbisr->partition, + NULL); + + return IRQ_HANDLED; +} + +/* + * Interrupt handler for state-change doorbells + */ +static irqreturn_t fsl_hv_state_change_isr(int irq, void *data) +{ + unsigned int status; + struct doorbell_isr *dbisr = data; + int ret; + + /* It's still a doorbell, so add it to all the queues. */ + fsl_hv_queue_doorbell(dbisr->doorbell); + + /* Determine the new state, and if it's stopped, notify the clients. */ + ret = fh_partition_get_status(dbisr->partition, &status); + if (!ret && (status == FH_PARTITION_STOPPED)) + return IRQ_WAKE_THREAD; + + return IRQ_HANDLED; +} + +/* + * Returns a bitmask indicating whether a read will block + */ +static unsigned int fsl_hv_poll(struct file *filp, struct poll_table_struct *p) +{ + struct doorbell_queue *dbq = filp->private_data; + unsigned long flags; + unsigned int mask; + + spin_lock_irqsave(&dbq->lock, flags); + + poll_wait(filp, &dbq->wait, p); + mask = (dbq->head == dbq->tail) ? 0 : (POLLIN | POLLRDNORM); + + spin_unlock_irqrestore(&dbq->lock, flags); + + return mask; +} + +/* + * Return the handles for any incoming doorbells + * + * If there are doorbell handles in the queue for this open instance, then + * return them to the caller as an array of 32-bit integers. Otherwise, + * block until there is at least one handle to return. + */ +static ssize_t fsl_hv_read(struct file *filp, char __user *buf, size_t len, + loff_t *off) +{ + struct doorbell_queue *dbq = filp->private_data; + uint32_t __user *p = (uint32_t __user *) buf; /* for put_user() */ + unsigned long flags; + ssize_t count = 0; + + /* Make sure we stop when the user buffer is full. */ + while (len >= sizeof(uint32_t)) { + uint32_t dbell; /* Local copy of doorbell queue data */ + + spin_lock_irqsave(&dbq->lock, flags); + + /* + * If the queue is empty, then either we're done or we need + * to block. If the application specified O_NONBLOCK, then + * we return the appropriate error code. + */ + if (dbq->head == dbq->tail) { + spin_unlock_irqrestore(&dbq->lock, flags); + if (count) + break; + if (filp->f_flags & O_NONBLOCK) + return -EAGAIN; + if (wait_event_interruptible(dbq->wait, + dbq->head != dbq->tail)) + return -ERESTARTSYS; + continue; + } + + /* + * Even though we have an smp_wmb() in the ISR, the core + * might speculatively execute the "dbell = ..." below while + * it's evaluating the if-statement above. In that case, the + * value put into dbell could be stale if the core accepts the + * speculation. To prevent that, we need a read memory barrier + * here as well. + */ + smp_rmb(); + + /* Copy the data to a temporary local buffer, because + * we can't call copy_to_user() from inside a spinlock + */ + dbell = dbq->q[dbq->head]; + dbq->head = nextp(dbq->head); + + spin_unlock_irqrestore(&dbq->lock, flags); + + if (put_user(dbell, p)) + return -EFAULT; + p++; + count += sizeof(uint32_t); + len -= sizeof(uint32_t); + } + + return count; +} + +/* + * Open the driver and prepare for reading doorbells. + * + * Every time an application opens the driver, we create a doorbell queue + * for that file handle. This queue is used for any incoming doorbells. + */ +static int fsl_hv_open(struct inode *inode, struct file *filp) +{ + struct doorbell_queue *dbq; + unsigned long flags; + int ret = 0; + + dbq = kzalloc(sizeof(struct doorbell_queue), GFP_KERNEL); + if (!dbq) { + pr_err("fsl-hv: out of memory\n"); + return -ENOMEM; + } + + spin_lock_init(&dbq->lock); + init_waitqueue_head(&dbq->wait); + + spin_lock_irqsave(&db_list_lock, flags); + list_add(&dbq->list, &db_list); + spin_unlock_irqrestore(&db_list_lock, flags); + + filp->private_data = dbq; + + return ret; +} + +/* + * Close the driver + */ +static int fsl_hv_close(struct inode *inode, struct file *filp) +{ + struct doorbell_queue *dbq = filp->private_data; + unsigned long flags; + + int ret = 0; + + spin_lock_irqsave(&db_list_lock, flags); + list_del(&dbq->list); + spin_unlock_irqrestore(&db_list_lock, flags); + + kfree(dbq); + + return ret; +} + +static const struct file_operations fsl_hv_fops = { + .owner = THIS_MODULE, + .open = fsl_hv_open, + .release = fsl_hv_close, + .poll = fsl_hv_poll, + .read = fsl_hv_read, + .unlocked_ioctl = fsl_hv_ioctl, +}; + +static struct miscdevice fsl_hv_misc_dev = { + MISC_DYNAMIC_MINOR, + "fsl-hv", + &fsl_hv_fops +}; + +static irqreturn_t fsl_hv_shutdown_isr(int irq, void *data) +{ + orderly_poweroff(false); + + return IRQ_HANDLED; +} + +/* + * Returns the handle of the parent of the given node + * + * The handle is the value of the 'hv-handle' property + */ +static int get_parent_handle(struct device_node *np) +{ + struct device_node *parent; + const uint32_t *prop; + uint32_t handle; + int len; + + parent = of_get_parent(np); + if (!parent) + /* It's not really possible for this to fail */ + return -ENODEV; + + /* + * The proper name for the handle property is "hv-handle", but some + * older versions of the hypervisor used "reg". + */ + prop = of_get_property(parent, "hv-handle", &len); + if (!prop) + prop = of_get_property(parent, "reg", &len); + + if (!prop || (len != sizeof(uint32_t))) { + /* This can happen only if the node is malformed */ + of_node_put(parent); + return -ENODEV; + } + + handle = be32_to_cpup(prop); + of_node_put(parent); + + return handle; +} + +/* + * Register a callback for failover events + * + * This function is called by device drivers to register their callback + * functions for fail-over events. + */ +int fsl_hv_failover_register(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&failover_subscribers, nb); +} +EXPORT_SYMBOL(fsl_hv_failover_register); + +/* + * Unregister a callback for failover events + */ +int fsl_hv_failover_unregister(struct notifier_block *nb) +{ + return blocking_notifier_chain_unregister(&failover_subscribers, nb); +} +EXPORT_SYMBOL(fsl_hv_failover_unregister); + +/* + * Return TRUE if we're running under FSL hypervisor + * + * This function checks to see if we're running under the Freescale + * hypervisor, and returns zero if we're not, or non-zero if we are. + * + * First, it checks if MSR[GS]==1, which means we're running under some + * hypervisor. Then it checks if there is a hypervisor node in the device + * tree. Currently, that means there needs to be a node in the root called + * "hypervisor" and which has a property named "fsl,hv-version". + */ +static int has_fsl_hypervisor(void) +{ + struct device_node *node; + int ret; + + if (!(mfmsr() & MSR_GS)) + return 0; + + node = of_find_node_by_path("/hypervisor"); + if (!node) + return 0; + + ret = of_find_property(node, "fsl,hv-version", NULL) != NULL; + + of_node_put(node); + + return ret; +} + +/* + * Freescale hypervisor management driver init + * + * This function is called when this module is loaded. + * + * Register ourselves as a miscellaneous driver. This will register the + * fops structure and create the right sysfs entries for udev. + */ +static int __init fsl_hypervisor_init(void) +{ + struct device_node *np; + struct doorbell_isr *dbisr, *n; + int ret; + + pr_info("Freescale hypervisor management driver\n"); + + if (!has_fsl_hypervisor()) { + pr_info("fsl-hv: no hypervisor found\n"); + return -ENODEV; + } + + ret = misc_register(&fsl_hv_misc_dev); + if (ret) { + pr_err("fsl-hv: cannot register device\n"); + return ret; + } + + INIT_LIST_HEAD(&db_list); + INIT_LIST_HEAD(&isr_list); + + for_each_compatible_node(np, NULL, "epapr,hv-receive-doorbell") { + unsigned int irq; + const uint32_t *handle; + + handle = of_get_property(np, "interrupts", NULL); + irq = irq_of_parse_and_map(np, 0); + if (!handle || (irq == NO_IRQ)) { + pr_err("fsl-hv: no 'interrupts' property in %s node\n", + np->full_name); + continue; + } + + dbisr = kzalloc(sizeof(*dbisr), GFP_KERNEL); + if (!dbisr) + goto out_of_memory; + + dbisr->irq = irq; + dbisr->doorbell = be32_to_cpup(handle); + + if (of_device_is_compatible(np, "fsl,hv-shutdown-doorbell")) { + /* The shutdown doorbell gets its own ISR */ + ret = request_irq(irq, fsl_hv_shutdown_isr, 0, + np->name, NULL); + } else if (of_device_is_compatible(np, + "fsl,hv-state-change-doorbell")) { + /* + * The state change doorbell triggers a notification if + * the state of the managed partition changes to + * "stopped". We need a separate interrupt handler for + * that, and we also need to know the handle of the + * target partition, not just the handle of the + * doorbell. + */ + dbisr->partition = ret = get_parent_handle(np); + if (ret < 0) { + pr_err("fsl-hv: node %s has missing or " + "malformed parent\n", np->full_name); + kfree(dbisr); + continue; + } + ret = request_threaded_irq(irq, fsl_hv_state_change_isr, + fsl_hv_state_change_thread, + 0, np->name, dbisr); + } else + ret = request_irq(irq, fsl_hv_isr, 0, np->name, dbisr); + + if (ret < 0) { + pr_err("fsl-hv: could not request irq %u for node %s\n", + irq, np->full_name); + kfree(dbisr); + continue; + } + + list_add(&dbisr->list, &isr_list); + + pr_info("fsl-hv: registered handler for doorbell %u\n", + dbisr->doorbell); + } + + return 0; + +out_of_memory: + list_for_each_entry_safe(dbisr, n, &isr_list, list) { + free_irq(dbisr->irq, dbisr); + list_del(&dbisr->list); + kfree(dbisr); + } + + misc_deregister(&fsl_hv_misc_dev); + + return -ENOMEM; +} + +/* + * Freescale hypervisor management driver termination + * + * This function is called when this driver is unloaded. + */ +static void __exit fsl_hypervisor_exit(void) +{ + struct doorbell_isr *dbisr, *n; + + list_for_each_entry_safe(dbisr, n, &isr_list, list) { + free_irq(dbisr->irq, dbisr); + list_del(&dbisr->list); + kfree(dbisr); + } + + misc_deregister(&fsl_hv_misc_dev); +} + +module_init(fsl_hypervisor_init); +module_exit(fsl_hypervisor_exit); + +MODULE_AUTHOR("Timur Tabi "); +MODULE_DESCRIPTION("Freescale hypervisor management driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 01f6362..619b565 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -135,6 +135,7 @@ header-y += firewire-cdev.h header-y += firewire-constants.h header-y += flat.h header-y += fs.h +header-y += fsl_hypervisor.h header-y += fuse.h header-y += futex.h header-y += gameport.h diff --git a/include/linux/fsl_hypervisor.h b/include/linux/fsl_hypervisor.h new file mode 100644 index 0000000..1cebaee --- /dev/null +++ b/include/linux/fsl_hypervisor.h @@ -0,0 +1,241 @@ +/* + * Freescale hypervisor ioctl and kernel interface + * + * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. + * Author: Timur Tabi + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * This software is provided by Freescale Semiconductor "as is" and any + * express or implied warranties, including, but not limited to, the implied + * warranties of merchantability and fitness for a particular purpose are + * disclaimed. In no event shall Freescale Semiconductor be liable for any + * direct, indirect, incidental, special, exemplary, or consequential damages + * (including, but not limited to, procurement of substitute goods or services; + * loss of use, data, or profits; or business interruption) however caused and + * on any theory of liability, whether in contract, strict liability, or tort + * (including negligence or otherwise) arising in any way out of the use of this + * software, even if advised of the possibility of such damage. + * + * This file is used by the Freescale hypervisor management driver. It can + * also be included by applications that need to communicate with the driver + * via the ioctl interface. + */ + +#ifndef FSL_HYPERVISOR_H +#define FSL_HYPERVISOR_H + +#include + +/** + * struct fsl_hv_ioctl_restart - restart a partition + * @ret: return error code from the hypervisor + * @partition: the ID of the partition to restart, or -1 for the + * calling partition + * + * Used by FSL_HV_IOCTL_PARTITION_RESTART + */ +struct fsl_hv_ioctl_restart { + __u32 ret; + __u32 partition; +}; + +/** + * struct fsl_hv_ioctl_status - get a partition's status + * @ret: return error code from the hypervisor + * @partition: the ID of the partition to query, or -1 for the + * calling partition + * @status: The returned status of the partition + * + * Used by FSL_HV_IOCTL_PARTITION_GET_STATUS + * + * Values of 'status': + * 0 = Stopped + * 1 = Running + * 2 = Starting + * 3 = Stopping + */ +struct fsl_hv_ioctl_status { + __u32 ret; + __u32 partition; + __u32 status; +}; + +/** + * struct fsl_hv_ioctl_start - start a partition + * @ret: return error code from the hypervisor + * @partition: the ID of the partition to control + * @entry_point: The offset within the guest IMA to start execution + * @load: If non-zero, reload the partition's images before starting + * + * Used by FSL_HV_IOCTL_PARTITION_START + */ +struct fsl_hv_ioctl_start { + __u32 ret; + __u32 partition; + __u32 entry_point; + __u32 load; +}; + +/** + * struct fsl_hv_ioctl_stop - stop a partition + * @ret: return error code from the hypervisor + * @partition: the ID of the partition to stop, or -1 for the calling + * partition + * + * Used by FSL_HV_IOCTL_PARTITION_STOP + */ +struct fsl_hv_ioctl_stop { + __u32 ret; + __u32 partition; +}; + +/** + * struct fsl_hv_ioctl_memcpy - copy memory between partitions + * @ret: return error code from the hypervisor + * @source: the partition ID of the source partition, or -1 for this + * partition + * @target: the partition ID of the target partition, or -1 for this + * partition + * @reserved: reserved, must be set to 0 + * @local_addr: user-space virtual address of a buffer in the local + * partition + * @remote_addr: guest physical address of a buffer in the + * remote partition + * @count: the number of bytes to copy. Both the local and remote + * buffers must be at least 'count' bytes long + * + * Used by FSL_HV_IOCTL_MEMCPY + * + * The 'local' partition is the partition that calls this ioctl. The + * 'remote' partition is a different partition. The data is copied from + * the 'source' paritition' to the 'target' partition. + * + * The buffer in the remote partition must be guest physically + * contiguous. + * + * This ioctl does not support copying memory between two remote + * partitions or within the same partition, so either 'source' or + * 'target' (but not both) must be -1. In other words, either + * + * source == local and target == remote + * or + * source == remote and target == local + */ +struct fsl_hv_ioctl_memcpy { + __u32 ret; + __u32 source; + __u32 target; + __u32 reserved; /* padding to ensure local_vaddr is aligned */ + __u64 local_vaddr; + __u64 remote_paddr; + __u64 count; +}; + +/** + * struct fsl_hv_ioctl_doorbell - ring a doorbell + * @ret: return error code from the hypervisor + * @doorbell: the handle of the doorbell to ring doorbell + * + * Used by FSL_HV_IOCTL_DOORBELL + */ +struct fsl_hv_ioctl_doorbell { + __u32 ret; + __u32 doorbell; +}; + +/** + * struct fsl_hv_ioctl_prop - get/set a device tree property + * @ret: return error code from the hypervisor + * @handle: handle of partition whose tree to access + * @path: virtual address of path name of node to access + * @propname: virtual address of name of property to access + * @propval: virtual address of property data buffer + * @proplen: Size of property data buffer + * @reserved: reserved, must be set to 0 + * + * Used by FSL_HV_IOCTL_DOORBELL + */ +struct fsl_hv_ioctl_prop { + __u32 ret; + __u32 handle; + __u64 path; + __u64 propname; + __u64 propval; + __u32 proplen; + __u32 reserved; /* padding to ensure structure is aligned */ +}; + +/* The ioctl type, documented in ioctl-number.txt */ +#define FSL_HV_IOCTL_TYPE 0xAF + +/* Restart another partition */ +#define FSL_HV_IOCTL_PARTITION_RESTART \ + _IOWR(FSL_HV_IOCTL_TYPE, 1, struct fsl_hv_ioctl_restart) + +/* Get a partition's status */ +#define FSL_HV_IOCTL_PARTITION_GET_STATUS \ + _IOWR(FSL_HV_IOCTL_TYPE, 2, struct fsl_hv_ioctl_status) + +/* Boot another partition */ +#define FSL_HV_IOCTL_PARTITION_START \ + _IOWR(FSL_HV_IOCTL_TYPE, 3, struct fsl_hv_ioctl_start) + +/* Stop this or another partition */ +#define FSL_HV_IOCTL_PARTITION_STOP \ + _IOWR(FSL_HV_IOCTL_TYPE, 4, struct fsl_hv_ioctl_stop) + +/* Copy data from one partition to another */ +#define FSL_HV_IOCTL_MEMCPY \ + _IOWR(FSL_HV_IOCTL_TYPE, 5, struct fsl_hv_ioctl_memcpy) + +/* Ring a doorbell */ +#define FSL_HV_IOCTL_DOORBELL \ + _IOWR(FSL_HV_IOCTL_TYPE, 6, struct fsl_hv_ioctl_doorbell) + +/* Get a property from another guest's device tree */ +#define FSL_HV_IOCTL_GETPROP \ + _IOWR(FSL_HV_IOCTL_TYPE, 7, struct fsl_hv_ioctl_prop) + +/* Set a property in another guest's device tree */ +#define FSL_HV_IOCTL_SETPROP \ + _IOWR(FSL_HV_IOCTL_TYPE, 8, struct fsl_hv_ioctl_prop) + +#ifdef __KERNEL__ + +/** + * fsl_hv_event_register() - register a callback for failover events + * @nb: pointer to caller-supplied notifier_block structure + * + * This function is called by device drivers to register their callback + * functions for fail-over events. + * + * The caller should allocate a notifier_block object and initialize the + * 'priority' and 'notifier_call' fields. + */ +int fsl_hv_failover_register(struct notifier_block *nb); + +/** + * fsl_hv_event_unregister() - unregister a callback for failover events + * @nb: the same 'nb' used in previous fsl_hv_failover_register call + */ +int fsl_hv_failover_unregister(struct notifier_block *nb); + +#endif + +#endif -- cgit v0.10.2 From 59f8df290acb6d279a690733a67b3902766999f3 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Tue, 14 Jun 2011 14:06:15 -0500 Subject: powerpc/85xx: add hypervisor config entries to corenet_smp_defconfig CONFIG_PPC_EPAPR_HV_BYTECHAN adds support for the Freescale hypervisor byte channel tty driver. CONFIG_VIRT_DRIVERS and CONFIG_FSL_HV_MANAGER add support for the Freescale hypervisor management driver. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 53f3949..421ade8 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig @@ -106,6 +106,7 @@ CONFIG_FSL_PQ_MDIO=y # CONFIG_INPUT_MOUSE is not set CONFIG_SERIO_LIBPS2=y # CONFIG_LEGACY_PTYS is not set +CONFIG_PPC_EPAPR_HV_BYTECHAN=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_EXTENDED=y @@ -145,6 +146,8 @@ CONFIG_RTC_DRV_CMOS=y CONFIG_UIO=y CONFIG_STAGING=y # CONFIG_STAGING_EXCLUDE_BUILD is not set +CONFIG_VIRT_DRIVERS=y +CONFIG_FSL_HV_MANAGER=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -- cgit v0.10.2 From 3fce1c0ba2b35b68135d8d8a3438f8c8272a01d8 Mon Sep 17 00:00:00 2001 From: Mingkai Hu Date: Tue, 28 Jun 2011 15:52:34 +0800 Subject: powerpc/85xx: Add p2040 RDB board support P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu Signed-off-by: Kumar Gala diff --git a/arch/powerpc/boot/dts/p2040rdb.dts b/arch/powerpc/boot/dts/p2040rdb.dts new file mode 100644 index 0000000..7d84e39 --- /dev/null +++ b/arch/powerpc/boot/dts/p2040rdb.dts @@ -0,0 +1,166 @@ +/* + * P2040RDB Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ "p2040si.dtsi" + +/ { + model = "fsl,P2040RDB"; + compatible = "fsl,P2040RDB"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + memory { + device_type = "memory"; + }; + + soc: soc@ffe000000 { + spi@110000 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25sl12801"; + reg = <0>; + spi-max-frequency = <40000000>; /* input clock */ + partition@u-boot { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@kernel { + label = "kernel"; + reg = <0x00100000 0x00500000>; + read-only; + }; + partition@dtb { + label = "dtb"; + reg = <0x00600000 0x00100000>; + read-only; + }; + partition@fs { + label = "file system"; + reg = <0x00700000 0x00900000>; + }; + }; + }; + + i2c@118000 { + lm75b@48 { + compatible = "nxp,lm75a"; + reg = <0x48>; + }; + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { + compatible = "pericom,pt7c4338"; + reg = <0x68>; + }; + }; + + i2c@118100 { + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + }; + + usb0: usb@210000 { + phy_type = "utmi"; + }; + + usb1: usb@211000 { + dr_mode = "host"; + phy_type = "utmi"; + }; + }; + + localbus@ffe124000 { + reg = <0xf 0xfe124000 0 0x1000>; + ranges = <0 0 0xf 0xe8000000 0x08000000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x08000000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + pci0: pcie@ffe200000 { + reg = <0xf 0xfe200000 0 0x1000>; + ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 + 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x20000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; + }; + + pci1: pcie@ffe201000 { + reg = <0xf 0xfe201000 0 0x1000>; + ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 + 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x20000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe202000 { + reg = <0xf 0xfe202000 0 0x1000>; + ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 + 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x20000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/p2040si.dtsi b/arch/powerpc/boot/dts/p2040si.dtsi new file mode 100644 index 0000000..5fdbb24 --- /dev/null +++ b/arch/powerpc/boot/dts/p2040si.dtsi @@ -0,0 +1,623 @@ +/* + * P2040 Silicon Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +/ { + compatible = "fsl,P2040"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e500mc@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e500mc@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu2: PowerPC,e500mc@2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu3: PowerPC,e500mc@3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p2040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000>; + interrupts = <16 2 1 27>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p2040-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p2040-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p2040-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p2040-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p2040-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p2040-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p2040-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + usb0: usb@210000 { + compatible = "fsl,p2040-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p2040-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + }; + + sata@220000 { + compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + + }; + + localbus@ffe124000 { + compatible = "fsl,p2040-elbc", "fsl,elbc", "simple-bus"; + interrupts = <25 2 0 0>; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; +}; diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 421ade8..10562a5 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig @@ -23,6 +23,7 @@ CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_P2040_RDB=y CONFIG_P3041_DS=y CONFIG_P4080_DS=y CONFIG_P5020_DS=y diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 4706c71..498534c 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -171,6 +171,18 @@ config SBC8560 help This option enables support for the Wind River SBC8560 board +config P2040_RDB + bool "Freescale P2040 RDB" + select DEFAULT_UIMAGE + select PPC_E500MC + select PHYS_64BIT + select SWIOTLB + select MPC8xxx_GPIO + select HAS_RAPIDIO + select PPC_EPAPR_HV_PIC + help + This option enables support for the P2040 RDB board + config P3041_DS bool "Freescale P3041 DS" select DEFAULT_UIMAGE diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 06b0c08..a971b32 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o obj-$(CONFIG_P1010_RDB) += p1010rdb.o obj-$(CONFIG_P1022_DS) += p1022_ds.o obj-$(CONFIG_P1023_RDS) += p1023_rds.o +obj-$(CONFIG_P2040_RDB) += p2040_rdb.o corenet_ds.o obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o diff --git a/arch/powerpc/platforms/85xx/p2040_rdb.c b/arch/powerpc/platforms/85xx/p2040_rdb.c new file mode 100644 index 0000000..32b56ac --- /dev/null +++ b/arch/powerpc/platforms/85xx/p2040_rdb.c @@ -0,0 +1,88 @@ +/* + * P2040 RDB Setup + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "corenet_ds.h" + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init p2040_rdb_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); +#ifdef CONFIG_SMP + extern struct smp_ops_t smp_85xx_ops; +#endif + + if (of_flat_dt_is_compatible(root, "fsl,P2040RDB")) + return 1; + + /* Check if we're running under the Freescale hypervisor */ + if (of_flat_dt_is_compatible(root, "fsl,P2040RDB-hv")) { + ppc_md.init_IRQ = ehv_pic_init; + ppc_md.get_irq = ehv_pic_get_irq; + ppc_md.restart = fsl_hv_restart; + ppc_md.power_off = fsl_hv_halt; + ppc_md.halt = fsl_hv_halt; +#ifdef CONFIG_SMP + /* + * Disable the timebase sync operations because we can't write + * to the timebase registers under the hypervisor. + */ + smp_85xx_ops.give_timebase = NULL; + smp_85xx_ops.take_timebase = NULL; +#endif + return 1; + } + + return 0; +} + +define_machine(p2040_rdb) { + .name = "P2040 RDB", + .probe = p2040_rdb_probe, + .setup_arch = corenet_ds_setup_arch, + .init_IRQ = corenet_ds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif + .get_irq = mpic_get_coreint_irq, + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, + .power_save = e500_idle, +}; + +machine_device_initcall(p2040_rdb, corenet_ds_publish_devices); + +#ifdef CONFIG_SWIOTLB +machine_arch_initcall(p2040_rdb, swiotlb_setup_bus_notifier); +#endif -- cgit v0.10.2 From 2647aa19fb36326ae4d2642072e1e072d176a2fc Mon Sep 17 00:00:00 2001 From: Laurentiu TUDOR Date: Thu, 7 Jul 2011 16:44:30 +0300 Subject: powerpc/85xx: Remove stale BUG_ON in mpc85xx_smp_init Under the FSL Hypervisor we triggered a BUG_ON in mpc85xx_smp_init that expected smp_ops.message_pass to be explicity set. However recent changes allows smp_ops.message_pass to be NULL and handled by default code. Thus the BUG_ON isn't relevant anymore. Signed-off-by: Laurentiu TUDOR Signed-off-by: Kumar Gala diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index f5aa619..5b9b901 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c @@ -2,7 +2,7 @@ * Author: Andy Fleming * Kumar Gala * - * Copyright 2006-2008 Freescale Semiconductor Inc. + * Copyright 2006-2008, 2011 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -239,12 +239,13 @@ void __init mpc85xx_smp_init(void) } if (cpu_has_feature(CPU_FTR_DBELL)) { - /* .message_pass defaults to smp_muxed_ipi_message_pass */ + /* + * If left NULL, .message_pass defaults to + * smp_muxed_ipi_message_pass + */ smp_85xx_ops.cause_ipi = doorbell_cause_ipi; } - BUG_ON(!smp_85xx_ops.message_pass); - smp_ops = &smp_85xx_ops; #ifdef CONFIG_KEXEC -- cgit v0.10.2 From f6ad160e6f4f4d6933eeb82a2bfa25ea008585f0 Mon Sep 17 00:00:00 2001 From: Felix Radensky Date: Thu, 7 Jul 2011 10:37:50 +0300 Subject: powerpc/p1022ds: Remove fixed-link property from ethernet nodes. On P1022DS both ethernet controllers are connected to RGMII PHYs accessible via MDIO bus. Remove fixed-link property from ethernet nodes as they only required when fixed link PHYs without MDIO bus are used. Signed-off-by: Felix Radensky Acked-by: Timur Tabi Signed-off-by: Kumar Gala diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts index 98d9426..1be9743 100644 --- a/arch/powerpc/boot/dts/p1022ds.dts +++ b/arch/powerpc/boot/dts/p1022ds.dts @@ -412,7 +412,6 @@ fsl,magic-packet; fsl,wake-on-filer; local-mac-address = [ 00 00 00 00 00 00 ]; - fixed-link = <1 1 1000 0 0>; phy-handle = <&phy0>; phy-connection-type = "rgmii-id"; queue-group@0{ @@ -439,7 +438,6 @@ fsl,num_rx_queues = <0x8>; fsl,num_tx_queues = <0x8>; local-mac-address = [ 00 00 00 00 00 00 ]; - fixed-link = <1 1 1000 0 0>; phy-handle = <&phy1>; phy-connection-type = "rgmii-id"; queue-group@0{ -- cgit v0.10.2 From 3160b09796129abc9523ea3cd1633b0faba64a02 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Tue, 28 Jun 2011 14:54:47 -0500 Subject: powerpc: Create next_tlbcam_idx percpu variable for FSL_BOOKE This is used to round-robin TLBCAM entries. Signed-off-by: Becky Bruce Signed-off-by: Kumar Gala diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 4138b21..b427a55 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -115,6 +115,11 @@ #ifndef __ASSEMBLY__ #include +#ifdef CONFIG_PPC_FSL_BOOK3E +#include +DECLARE_PER_CPU(int, next_tlbcam_idx); +#endif + static inline int mmu_has_feature(unsigned long feature) { return (cur_cpu_spec->mmu_features & feature); diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 6c8e739..567a174 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -305,6 +305,10 @@ struct thread_info *current_set[NR_CPUS]; static void __devinit smp_store_cpu_info(int id) { per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); +#ifdef CONFIG_PPC_FSL_BOOK3E + per_cpu(next_tlbcam_idx, id) + = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; +#endif } void __init smp_prepare_cpus(unsigned int max_cpus) diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index a3841bb..457dc841 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -353,6 +353,15 @@ void __init mem_init(void) } #endif /* CONFIG_HIGHMEM */ +#if defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_SMP) + /* + * If smp is enabled, next_tlbcam_idx is initialized in the cpu up + * functions.... do it here for the non-smp case. + */ + per_cpu(next_tlbcam_idx, smp_processor_id()) = + (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; +#endif + printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, " "%luk reserved, %luk data, %luk bss, %luk init)\n", nr_free_pages() << (PAGE_SHIFT-10), diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c index 3722185..e80ed10 100644 --- a/arch/powerpc/mm/tlb_nohash.c +++ b/arch/powerpc/mm/tlb_nohash.c @@ -102,6 +102,12 @@ unsigned long linear_map_top; /* Top of linear mapping */ #endif /* CONFIG_PPC64 */ +#ifdef CONFIG_PPC_FSL_BOOK3E +/* next_tlbcam_idx is used to round-robin tlbcam entry assignment */ +DEFINE_PER_CPU(int, next_tlbcam_idx); +EXPORT_PER_CPU_SYMBOL(next_tlbcam_idx); +#endif + /* * Base TLB flushing operations: * -- cgit v0.10.2 From a77ce8167cc1d0370fcb1d79b367d62e050cb2b0 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 10 Jun 2011 01:52:57 -0500 Subject: driver core: Add ability for arch code to setup pdev_archdata On some architectures we need to setup pdev_archdata before we add the device. Waiting til a bus_notifier is too late since we might need the pdev_archdata in the bus notifier. One example is setting up of dma_mask pointers such that it can be used in a bus_notifier. We add weak noop version of arch_setup_pdev_archdata() and allow the arch code to override with access the full definitions of struct device, struct platform_device, and struct pdev_archdata. Acked-by: Greg Kroah-Hartman Signed-off-by: Kumar Gala diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 6040717..0cad9c7 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -32,6 +32,25 @@ struct device platform_bus = { EXPORT_SYMBOL_GPL(platform_bus); /** + * arch_setup_pdev_archdata - Allow manipulation of archdata before its used + * @dev: platform device + * + * This is called before platform_device_add() such that any pdev_archdata may + * be setup before the platform_notifier is called. So if a user needs to + * manipulate any relevant information in the pdev_archdata they can do: + * + * platform_devic_alloc() + * ... manipulate ... + * platform_device_add() + * + * And if they don't care they can just call platform_device_register() and + * everything will just work out. + */ +void __weak arch_setup_pdev_archdata(struct platform_device *pdev) +{ +} + +/** * platform_get_resource - get a resource for a device * @dev: platform device * @type: resource type @@ -173,6 +192,7 @@ struct platform_device *platform_device_alloc(const char *name, int id) pa->pdev.id = id; device_initialize(&pa->pdev.dev); pa->pdev.dev.release = platform_device_release; + arch_setup_pdev_archdata(&pa->pdev); } return pa ? &pa->pdev : NULL; @@ -334,6 +354,7 @@ EXPORT_SYMBOL_GPL(platform_device_del); int platform_device_register(struct platform_device *pdev) { device_initialize(&pdev->dev); + arch_setup_pdev_archdata(pdev); return platform_device_add(pdev); } EXPORT_SYMBOL_GPL(platform_device_register); diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h index ede1a80..27bb05a 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h @@ -42,6 +42,7 @@ extern void platform_device_unregister(struct platform_device *); extern struct bus_type platform_bus_type; extern struct device platform_bus; +extern void arch_setup_pdev_archdata(struct platform_device *); extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int); extern int platform_get_irq(struct platform_device *, unsigned int); extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, const char *); -- cgit v0.10.2 From 314b02f503c2c219fde0fcf6f086fda415f8a847 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 8 Jul 2011 00:17:27 -0500 Subject: powerpc: implement arch_setup_pdev_archdata We have a long standing issues with platform devices not have a valid dma_mask pointer. This hasn't been an issue to date as no platform device has tried to set its dma_mask value to a non-default value. Acked-by: Greg Kroah-Hartman Signed-off-by: Kumar Gala diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index e053b16..c600faf 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c @@ -709,29 +709,9 @@ void ppc_printk_progress(char *s, unsigned short hex) pr_info("%s\n", s); } -static int ppc_dflt_bus_notify(struct notifier_block *nb, - unsigned long action, void *data) +void arch_setup_pdev_archdata(struct platform_device *pdev) { - struct device *dev = data; - - /* We are only intereted in device addition */ - if (action != BUS_NOTIFY_ADD_DEVICE) - return 0; - - set_dma_ops(dev, &dma_direct_ops); - - return NOTIFY_DONE; -} - -static struct notifier_block ppc_dflt_plat_bus_notifier = { - .notifier_call = ppc_dflt_bus_notify, - .priority = INT_MAX, -}; - -static int __init setup_bus_notifier(void) -{ - bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier); - return 0; + pdev->archdata.dma_mask = DMA_BIT_MASK(32); + pdev->dev.dma_mask = &pdev->archdata.dma_mask; + set_dma_ops(&pdev->dev, &dma_direct_ops); } - -arch_initcall(setup_bus_notifier); diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 63d3cb7..cfc6a79 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -153,7 +153,7 @@ struct platform_device *of_device_alloc(struct device_node *np, } dev->dev.of_node = of_node_get(np); -#if defined(CONFIG_PPC) || defined(CONFIG_MICROBLAZE) +#if defined(CONFIG_MICROBLAZE) dev->dev.dma_mask = &dev->archdata.dma_mask; #endif dev->dev.parent = parent; @@ -189,7 +189,7 @@ struct platform_device *of_platform_device_create(struct device_node *np, if (!dev) return NULL; -#if defined(CONFIG_PPC) || defined(CONFIG_MICROBLAZE) +#if defined(CONFIG_MICROBLAZE) dev->archdata.dma_mask = 0xffffffffUL; #endif dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); -- cgit v0.10.2 From 6471fc6630a507fd54fdaceceee1ddaf3c917cde Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 10 Jun 2011 02:22:06 -0500 Subject: powerpc: Dont require a dma_ops struct to set dma mask The only reason to require a dma_ops struct is to see if it has implemented set_dma_mask. If not we can fall back to setting the mask directly. This resolves an issue with how to sequence the setting of a DMA mask for platform devices. Before we had an issue in that we have no way of setting the DMA mask before the various low level bus notifiers get called that might check it (swiotlb). So now we can do: pdev = platform_device_alloc("foobar", 0); dma_set_mask(&pdev->dev, DMA_BIT_MASK(37)); platform_device_add(pdev); And expect the right thing to happen with the bus notifiers get called via platform_device_add. Acked-by: Greg Kroah-Hartman Signed-off-by: Kumar Gala diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index d238c08..4f0959f 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c @@ -161,9 +161,7 @@ int dma_set_mask(struct device *dev, u64 dma_mask) if (ppc_md.dma_set_mask) return ppc_md.dma_set_mask(dev, dma_mask); - if (unlikely(dma_ops == NULL)) - return -EIO; - if (dma_ops->set_dma_mask != NULL) + if ((dma_ops != NULL) && (dma_ops->set_dma_mask != NULL)) return dma_ops->set_dma_mask(dev, dma_mask); if (!dev->dma_mask || !dma_supported(dev, dma_mask)) return -EIO; -- cgit v0.10.2 From a51ca38b6330e463cc1a7adf64502ff735452915 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:21 +0000 Subject: davinci: pass clock flags to davinci_psc_config() Enabling or disabling a PSC can take certain modifiers like "disable with reset", "force enable/disable" and "enable/disable with local reset" apart from the regular clock gating functionality. Pass a flags argument to davinci_psc_config() so these variations can be supported there. At this time only "disable with reset" is supported, but other functionality will be added in subsequent patches. Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index e4e3af1..d0450ac 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk) __clk_enable(clk->parent); if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, - PSC_STATE_ENABLE); + true, clk->flags); } static void __clk_disable(struct clk *clk) @@ -54,8 +54,7 @@ static void __clk_disable(struct clk *clk) if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC)) davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, - (clk->flags & PSC_SWRSTDISABLE) ? - PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); + false, clk->flags); if (clk->parent) __clk_disable(clk->parent); } @@ -239,8 +238,7 @@ static int __init clk_disable_unused(void) pr_debug("Clocks: disable unused %s\n", ck->name); davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, - (ck->flags & PSC_SWRSTDISABLE) ? - PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); + false, ck->flags); } spin_unlock_irq(&clockfw_lock); diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index a47e6f2..215fcca 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -249,7 +249,7 @@ extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, u32 next_state); + unsigned int id, bool enable, u32 flags); #endif diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index a415804..823cb1b 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -25,6 +25,8 @@ #include #include +#include "clock.h" + /* Return nonzero iff the domain's clock is active */ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) { @@ -48,11 +50,12 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) /* Enable or disable a PSC domain */ void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, u32 next_state) + unsigned int id, bool enable, u32 flags) { u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; void __iomem *psc_base; struct davinci_soc_info *soc_info = &davinci_soc_info; + u32 next_state = PSC_STATE_ENABLE; if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { pr_warning("PSC: Bad psc data: 0x%x[%d]\n", @@ -62,6 +65,13 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); + if (!enable) { + if (flags & PSC_SWRSTDISABLE) + next_state = PSC_STATE_SWRSTDISABLE; + else + next_state = PSC_STATE_DISABLE; + } + mdctl = __raw_readl(psc_base + MDCTL + 4 * id); mdctl &= ~MDSTAT_STATE_MASK; mdctl |= next_state; -- cgit v0.10.2 From aad70de20fc69970a3080e7e8f02b54a4a3fe3e6 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:22 +0000 Subject: davinci: enable forced transitions on PSC Some DaVinci modules like the SATA on DA850 need forced module state transitions. Define a "force" flag which can be passed to the PSC config function to enable it to make forced transitions. Forced transitions shouldn't normally be attempted, unless the TRM explicitly specifies its usage. ChangeLog: v2: Modified to take care of the fact that davinci_psc_config() now takes the flags directly. Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 0dd2203..48ee462 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -111,6 +111,7 @@ struct clk { #define CLK_PLL BIT(4) /* PLL-derived clock */ #define PRE_PLL BIT(5) /* source is before PLL mult/div */ #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ +#define PSC_FORCE BIT(7) /* Force module state transtition */ #define CLK(dev, con, ck) \ { \ diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 215fcca..6213f0d 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -244,6 +244,7 @@ #define PSC_STATE_ENABLE 3 #define MDSTAT_STATE_MASK 0x1f +#define MDCTL_FORCE BIT(31) #ifndef __ASSEMBLER__ diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 823cb1b..1fb6bdf 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -75,6 +75,8 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, mdctl = __raw_readl(psc_base + MDCTL + 4 * id); mdctl &= ~MDSTAT_STATE_MASK; mdctl |= next_state; + if (flags & PSC_FORCE) + mdctl |= MDCTL_FORCE; __raw_writel(mdctl, psc_base + MDCTL + 4 * id); pdstat = __raw_readl(psc_base + PDSTAT); -- cgit v0.10.2 From cbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:23 +0000 Subject: davinci: da850: add support for SATA interface Add support for SATA controller on the DA850/OMAP-L138/AM18x devices. The patch adds the necessary clocks, platform resources and a routine to initialize the SATA controller. The PHY configuration in this patch is courtesy the work done by Zegeye Alemu, Swaminathan and Mansoor Ahamed from TI. While testing this patch, enable port multiplier support iff you are actually using one. The reasons of this behaviour are discussed here: http://patchwork.ozlabs.org/patch/78163/ ChangeLog: v3: Removed fields which were being initialized to zero in PHY configuration. Moved SATA base address definition to the top of the file to make it inline with what is done for the rest of the modules. v2: Addressed comments from Sergei. Removed unnecessary braces and removed unnecessary else after goto. Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 4e22b8d..935dbed 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -374,6 +374,14 @@ static struct clk spi1_clk = { .flags = DA850_CLK_ASYNC3, }; +static struct clk sata_clk = { + .name = "sata", + .parent = &pll0_sysclk2, + .lpsc = DA850_LPSC1_SATA, + .gpsc = 1, + .flags = PSC_FORCE, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -420,6 +428,7 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "usb20", &usb20_clk), CLK("spi_davinci.0", NULL, &spi0_clk), CLK("spi_davinci.1", NULL, &spi1_clk), + CLK("ahci", NULL, &sata_clk), CLK(NULL, NULL, NULL), }; diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index fc4e98e..2f7e719 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include @@ -33,6 +35,7 @@ #define DA8XX_SPI0_BASE 0x01c41000 #define DA830_SPI1_BASE 0x01e12000 #define DA8XX_LCD_CNTRL_BASE 0x01e13000 +#define DA850_SATA_BASE 0x01e18000 #define DA850_MMCSD1_BASE 0x01e1b000 #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 @@ -842,3 +845,126 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info, return platform_device_register(&da8xx_spi_device[instance]); } + +#ifdef CONFIG_ARCH_DAVINCI_DA850 + +static struct resource da850_sata_resources[] = { + { + .start = DA850_SATA_BASE, + .end = DA850_SATA_BASE + 0x1fff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA850_SATAINT, + .flags = IORESOURCE_IRQ, + }, +}; + +/* SATA PHY Control Register offset from AHCI base */ +#define SATA_P0PHYCR_REG 0x178 + +#define SATA_PHY_MPY(x) ((x) << 0) +#define SATA_PHY_LOS(x) ((x) << 6) +#define SATA_PHY_RXCDR(x) ((x) << 10) +#define SATA_PHY_RXEQ(x) ((x) << 13) +#define SATA_PHY_TXSWING(x) ((x) << 19) +#define SATA_PHY_ENPLL(x) ((x) << 31) + +static struct clk *da850_sata_clk; +static unsigned long da850_sata_refclkpn; + +/* Supported DA850 SATA crystal frequencies */ +#define KHZ_TO_HZ(freq) ((freq) * 1000) +static unsigned long da850_sata_xtal[] = { + KHZ_TO_HZ(300000), + KHZ_TO_HZ(250000), + 0, /* Reserved */ + KHZ_TO_HZ(187500), + KHZ_TO_HZ(150000), + KHZ_TO_HZ(125000), + KHZ_TO_HZ(120000), + KHZ_TO_HZ(100000), + KHZ_TO_HZ(75000), + KHZ_TO_HZ(60000), +}; + +static int da850_sata_init(struct device *dev, void __iomem *addr) +{ + int i, ret; + unsigned int val; + + da850_sata_clk = clk_get(dev, NULL); + if (IS_ERR(da850_sata_clk)) + return PTR_ERR(da850_sata_clk); + + ret = clk_enable(da850_sata_clk); + if (ret) + goto err0; + + /* Enable SATA clock receiver */ + val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); + val &= ~BIT(0); + __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); + + /* Get the multiplier needed for 1.5GHz PLL output */ + for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++) + if (da850_sata_xtal[i] == da850_sata_refclkpn) + break; + + if (i == ARRAY_SIZE(da850_sata_xtal)) { + ret = -EINVAL; + goto err1; + } + + val = SATA_PHY_MPY(i + 1) | + SATA_PHY_LOS(1) | + SATA_PHY_RXCDR(4) | + SATA_PHY_RXEQ(1) | + SATA_PHY_TXSWING(3) | + SATA_PHY_ENPLL(1); + + __raw_writel(val, addr + SATA_P0PHYCR_REG); + + return 0; + +err1: + clk_disable(da850_sata_clk); +err0: + clk_put(da850_sata_clk); + return ret; +} + +static void da850_sata_exit(struct device *dev) +{ + clk_disable(da850_sata_clk); + clk_put(da850_sata_clk); +} + +static struct ahci_platform_data da850_sata_pdata = { + .init = da850_sata_init, + .exit = da850_sata_exit, +}; + +static u64 da850_sata_dmamask = DMA_BIT_MASK(32); + +static struct platform_device da850_sata_device = { + .name = "ahci", + .id = -1, + .dev = { + .platform_data = &da850_sata_pdata, + .dma_mask = &da850_sata_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(da850_sata_resources), + .resource = da850_sata_resources, +}; + +int __init da850_register_sata(unsigned long refclkpn) +{ + da850_sata_refclkpn = refclkpn; + if (!da850_sata_refclkpn) + return -EINVAL; + + return platform_device_register(&da850_sata_device); +} +#endif diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index ad64da7..eaca7d8 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -57,6 +57,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) #define DA8XX_DEEPSLEEP_REG 0x8 +#define DA8XX_PWRDN_REG 0x18 #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 @@ -89,6 +90,7 @@ int da850_register_cpufreq(char *async_clk); int da8xx_register_cpuidle(void); void __iomem * __init da8xx_get_mem_ctlr(void); int da850_register_pm(struct platform_device *pdev); +int __init da850_register_sata(unsigned long refclkpn); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; -- cgit v0.10.2 From 8bb2c4813c534d26eba3beb7888fbd3cbc931f62 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:24 +0000 Subject: davinci: da850 evm: register SATA device Register the platform device for SATA interface present on the DA850/OMAP-L138/AM18x EVM. Signed-off-by: Sekhar Nori diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index a7b41bf..3d2c0d7 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void) static __init int da850_evm_init_cpufreq(void) { return 0; } #endif +#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) + static __init void da850_evm_init(void) { int ret; @@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: spi 1 registration failed: %d\n", ret); + + ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); + if (ret) + pr_warning("da850_evm_init: sata registration failed: %d\n", + ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE -- cgit v0.10.2 From 55c022bbddb2c056b5dff1bd1b1758d31b6d64c9 Mon Sep 17 00:00:00 2001 From: Shaohua Li Date: Fri, 8 Jul 2011 08:19:20 +0200 Subject: block: avoid building too big plug list When I test fio script with big I/O depth, I found the total throughput drops compared to some relative small I/O depth. The reason is the thread accumulates big requests in its plug list and causes some delays (surely this depends on CPU speed). I thought we'd better have a threshold for requests. When a threshold reaches, this means there is no request merge and queue lock contention isn't severe when pushing per-task requests to queue, so the main advantages of blk plug don't exist. We can force a plug list flush in this case. With this, my test throughput actually increases and almost equals to small I/O depth. Another side effect is irq off time decreases in blk_flush_plug_list() for big I/O depth. The BLK_MAX_REQUEST_COUNT is choosen arbitarily, but 16 is efficiently to reduce lock contention to me. But I'm open here, 32 is ok in my test too. Signed-off-by: Shaohua Li Signed-off-by: Jens Axboe diff --git a/block/blk-core.c b/block/blk-core.c index d2f8f40..a564852 100644 --- a/block/blk-core.c +++ b/block/blk-core.c @@ -1302,7 +1302,10 @@ get_rq: plug->should_sort = 1; } list_add_tail(&req->queuelist, &plug->list); + plug->count++; drive_stat_acct(req, 1); + if (plug->count >= BLK_MAX_REQUEST_COUNT) + blk_flush_plug_list(plug, false); } else { spin_lock_irq(q->queue_lock); add_acct_request(q, req, where); @@ -2626,6 +2629,7 @@ void blk_start_plug(struct blk_plug *plug) INIT_LIST_HEAD(&plug->list); INIT_LIST_HEAD(&plug->cb_list); plug->should_sort = 0; + plug->count = 0; /* * If this is a nested plug, don't actually assign it. It will be @@ -2709,6 +2713,7 @@ void blk_flush_plug_list(struct blk_plug *plug, bool from_schedule) return; list_splice_init(&plug->list, &list); + plug->count = 0; if (plug->should_sort) { list_sort(NULL, &list, plug_rq_cmp); diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 36f2e2b..92edb96 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -862,7 +862,10 @@ struct blk_plug { struct list_head list; struct list_head cb_list; unsigned int should_sort; + unsigned int count; }; +#define BLK_MAX_REQUEST_COUNT 16 + struct blk_plug_cb { struct list_head list; void (*callback)(struct blk_plug_cb *); -- cgit v0.10.2 From 316cc67d5e03801a5ee4ac660a4dfe9e02aed475 Mon Sep 17 00:00:00 2001 From: Shaohua Li Date: Fri, 8 Jul 2011 08:19:21 +0200 Subject: block: document blk_plug list access I'm often confused why not disable preempt when changing blk_plug list. It would be better to add comments here in case others have the similar concerns. Signed-off-by: Shaohua Li Signed-off-by: Jens Axboe diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 92edb96..6dcea68 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -857,6 +857,12 @@ struct request_queue *blk_alloc_queue(gfp_t); struct request_queue *blk_alloc_queue_node(gfp_t, int); extern void blk_put_queue(struct request_queue *); +/* + * Note: Code in between changing the blk_plug list/cb_list or element of such + * lists is preemptable, but such code can't do sleep (or be very careful), + * otherwise data is corrupted. For details, please check schedule() where + * blk_schedule_flush_plug() is called. + */ struct blk_plug { unsigned long magic; struct list_head list; -- cgit v0.10.2 From fa54dccddc8f4a53c223d53c56c54c61ea7d2623 Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Sat, 2 Jul 2011 08:00:21 +0530 Subject: OMAP: ID: introduce chip detection for OMAP4460 Add support for detecting the latest in the OMAP4 family: OMAP4460 Among other changes, the new chip also can support 1.5GHz A9s, 1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition, we have changes to OPPs supported, clock tree etc, hence having a chip detection is required. For more details on OMAP4460, see Highlights: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=53243&navigationId=12843&templateId=6123 Public TRM is available here as usual: http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12667 [nm@ti.com: cleanups and introduction of ramp system] Signed-off-by: Nishanth Menon Signed-off-by: Aneesh V Signed-off-by: Rajendra Nayak Reviewed-by: Kevin Hilman Reviewed-by: Paul Walmsley [tony@atomide.com: updated to not use CHIP_IS_OMAP44XX] Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 2537090..743889a 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -344,10 +344,10 @@ static void __init omap4_check_revision(void) rev = (idcode >> 28) & 0xf; /* - * Few initial ES2.0 samples IDCODE is same as ES1.0 + * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 * Use ARM register to detect the correct ES version */ - if (!rev) { + if (!rev && (hawkeye != 0xb94e)) { idcode = read_cpuid(CPUID_ID); rev = (idcode & 0xf) - 1; } @@ -377,6 +377,15 @@ static void __init omap4_check_revision(void) omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; } break; + case 0xb94e: + switch (rev) { + case 0: + default: + omap_revision = OMAP4460_REV_ES1_0; + omap_chip.oc |= CHIP_IS_OMAP4460ES1_0; + break; + } + break; default: /* Unknown default to latest silicon rev as default */ omap_revision = OMAP4430_REV_ES2_2; diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 8198bb6..a2cec99 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -88,6 +88,7 @@ unsigned int omap_rev(void); * cpu_is_omap243x(): True for OMAP2430 * cpu_is_omap343x(): True for OMAP3430 * cpu_is_omap443x(): True for OMAP4430 + * cpu_is_omap446x(): True for OMAP4460 */ #define GET_OMAP_CLASS (omap_rev() & 0xff) @@ -123,6 +124,7 @@ IS_OMAP_SUBCLASS(243x, 0x243) IS_OMAP_SUBCLASS(343x, 0x343) IS_OMAP_SUBCLASS(363x, 0x363) IS_OMAP_SUBCLASS(443x, 0x443) +IS_OMAP_SUBCLASS(446x, 0x446) IS_TI_SUBCLASS(816x, 0x816) @@ -137,6 +139,7 @@ IS_TI_SUBCLASS(816x, 0x816) #define cpu_is_ti816x() 0 #define cpu_is_omap44xx() 0 #define cpu_is_omap443x() 0 +#define cpu_is_omap446x() 0 #if defined(MULTI_OMAP1) # if defined(CONFIG_ARCH_OMAP730) @@ -361,8 +364,10 @@ IS_OMAP_TYPE(3517, 0x3517) # if defined(CONFIG_ARCH_OMAP4) # undef cpu_is_omap44xx # undef cpu_is_omap443x +# undef cpu_is_omap446x # define cpu_is_omap44xx() is_omap44xx() # define cpu_is_omap443x() is_omap443x() +# define cpu_is_omap446x() is_omap446x() # endif /* Macros to detect if we have OMAP1 or OMAP2 */ @@ -410,6 +415,9 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) #define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) +#define OMAP446X_CLASS 0x44600044 +#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) + /* * omap_chip bits * @@ -439,13 +447,15 @@ IS_OMAP_TYPE(3517, 0x3517) #define CHIP_IS_OMAP4430ES2_1 (1 << 12) #define CHIP_IS_OMAP4430ES2_2 (1 << 13) #define CHIP_IS_TI816X (1 << 14) +#define CHIP_IS_OMAP4460ES1_0 (1 << 15) #define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) #define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \ CHIP_IS_OMAP4430ES2 | \ CHIP_IS_OMAP4430ES2_1 | \ - CHIP_IS_OMAP4430ES2_2) + CHIP_IS_OMAP4430ES2_2 | \ + CHIP_IS_OMAP4460ES1_0) /* * "GE" here represents "greater than or equal to" in terms of ES -- cgit v0.10.2 From cc0170b2d929b8a31fec3da66a132822a99f550b Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Sat, 2 Jul 2011 08:00:22 +0530 Subject: OMAP4: ID: add omap_has_feature for max freq supported Macros for identifying the max frequency supported by various OMAP4 variants - Expanding along the lines of OMAP3's feature handling. [nm@ti.com: minor fixes for checks that should only for 443x|446x] Signed-off-by: Nishanth Menon Signed-off-by: Aneesh V Signed-off-by: Rajendra Nayak Reviewed-by: Kevin Hilman Reviewed-by: Paul Walmsley Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 743889a..37efb86 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -31,7 +31,7 @@ static struct omap_chip_id omap_chip; static unsigned int omap_revision; -u32 omap3_features; +u32 omap_features; unsigned int omap_rev(void) { @@ -183,14 +183,14 @@ static void __init omap24xx_check_revision(void) #define OMAP3_CHECK_FEATURE(status,feat) \ if (((status & OMAP3_ ##feat## _MASK) \ >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ - omap3_features |= OMAP3_HAS_ ##feat; \ + omap_features |= OMAP3_HAS_ ##feat; \ } static void __init omap3_check_features(void) { u32 status; - omap3_features = 0; + omap_features = 0; status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); @@ -200,11 +200,11 @@ static void __init omap3_check_features(void) OMAP3_CHECK_FEATURE(status, NEON); OMAP3_CHECK_FEATURE(status, ISP); if (cpu_is_omap3630()) - omap3_features |= OMAP3_HAS_192MHZ_CLK; + omap_features |= OMAP3_HAS_192MHZ_CLK; if (!cpu_is_omap3505() && !cpu_is_omap3517()) - omap3_features |= OMAP3_HAS_IO_WAKEUP; + omap_features |= OMAP3_HAS_IO_WAKEUP; - omap3_features |= OMAP3_HAS_SDRC; + omap_features |= OMAP3_HAS_SDRC; /* * TODO: Get additional info (where applicable) @@ -212,9 +212,34 @@ static void __init omap3_check_features(void) */ } +static void __init omap4_check_features(void) +{ + u32 si_type; + + if (cpu_is_omap443x()) + omap_features |= OMAP4_HAS_MPU_1GHZ; + + + if (cpu_is_omap446x()) { + si_type = + read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1); + switch ((si_type & (3 << 16)) >> 16) { + case 2: + /* High performance device */ + omap_features |= OMAP4_HAS_MPU_1_5GHZ; + break; + case 1: + default: + /* Standard device */ + omap_features |= OMAP4_HAS_MPU_1_2GHZ; + break; + } + } +} + static void __init ti816x_check_features(void) { - omap3_features = OMAP3_HAS_NEON; + omap_features = OMAP3_HAS_NEON; } static void __init omap3_check_revision(void) @@ -527,6 +552,7 @@ void __init omap2_check_revision(void) return; } else if (cpu_is_omap44xx()) { omap4_check_revision(); + omap4_check_features(); return; } else { pr_err("OMAP revision unknown, please fix!\n"); diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index a2cec99..67b3d75 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -478,7 +478,7 @@ void omap2_check_revision(void); /* * Runtime detection of OMAP3 features */ -extern u32 omap3_features; +extern u32 omap_features; #define OMAP3_HAS_L2CACHE BIT(0) #define OMAP3_HAS_IVA BIT(1) @@ -488,11 +488,15 @@ extern u32 omap3_features; #define OMAP3_HAS_192MHZ_CLK BIT(5) #define OMAP3_HAS_IO_WAKEUP BIT(6) #define OMAP3_HAS_SDRC BIT(7) +#define OMAP4_HAS_MPU_1GHZ BIT(8) +#define OMAP4_HAS_MPU_1_2GHZ BIT(9) +#define OMAP4_HAS_MPU_1_5GHZ BIT(10) + #define OMAP3_HAS_FEATURE(feat,flag) \ static inline unsigned int omap3_has_ ##feat(void) \ { \ - return (omap3_features & OMAP3_HAS_ ##flag); \ + return omap_features & OMAP3_HAS_ ##flag; \ } \ OMAP3_HAS_FEATURE(l2cache, L2CACHE) @@ -504,4 +508,19 @@ OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) OMAP3_HAS_FEATURE(sdrc, SDRC) +/* + * Runtime detection of OMAP4 features + */ +extern u32 omap_features; + +#define OMAP4_HAS_FEATURE(feat, flag) \ +static inline unsigned int omap4_has_ ##feat(void) \ +{ \ + return omap_features & OMAP4_HAS_ ##flag; \ +} \ + +OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ) +OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ) +OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ) + #endif -- cgit v0.10.2 From 6b54b4991289762887a572785e296d15adbc1550 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sat, 2 Jul 2011 08:00:23 +0530 Subject: OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts This patch adds additional register bitshifts for registers added in OMAP4460 platform. Signed-off-by: Rajendra Nayak Signed-off-by: Nishanth Menon Signed-off-by: Benoit Cousson Reviewed-by: Kevin Hilman Acked-by: Paul Walmsley [tony@atomide.com: updated to apply on cleanup patches] Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h index 9d47a05..28e20d3 100644 --- a/arch/arm/mach-omap2/cm-regbits-44xx.h +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h @@ -106,6 +106,10 @@ #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_CORE_DPLL_EMU_CLK_MASK (1 << 9) +/* Used by CM_L4CFG_CLKSTCTRL */ +#define OMAP4460_CLKACTIVITY_CORE_TS_GFCLK_SHIFT 9 +#define OMAP4460_CLKACTIVITY_CORE_TS_GFCLK_MASK (1 << 9) + /* Used by CM_CEFUSE_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) @@ -418,6 +422,10 @@ #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_MASK (1 << 11) +/* Used by CM_WKUP_CLKSTCTRL */ +#define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_SHIFT 13 +#define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_MASK (1 << 13) + /* * Used by CM1_ABE_TIMER5_CLKCTRL, CM1_ABE_TIMER6_CLKCTRL, * CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, @@ -449,6 +457,10 @@ #define OMAP4430_CLKSEL_60M_SHIFT 24 #define OMAP4430_CLKSEL_60M_MASK (1 << 24) +/* Used by CM_MPU_MPU_CLKCTRL */ +#define OMAP4460_CLKSEL_ABE_DIV_MODE_SHIFT 25 +#define OMAP4460_CLKSEL_ABE_DIV_MODE_MASK (1 << 25) + /* Used by CM1_ABE_AESS_CLKCTRL */ #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) @@ -468,6 +480,10 @@ #define OMAP4430_CLKSEL_DIV_SHIFT 24 #define OMAP4430_CLKSEL_DIV_MASK (1 << 24) +/* Used by CM_MPU_MPU_CLKCTRL */ +#define OMAP4460_CLKSEL_EMIF_DIV_MODE_SHIFT 24 +#define OMAP4460_CLKSEL_EMIF_DIV_MODE_MASK (1 << 24) + /* Used by CM_CAM_FDIF_CLKCTRL */ #define OMAP4430_CLKSEL_FCLK_SHIFT 24 #define OMAP4430_CLKSEL_FCLK_MASK (0x3 << 24) @@ -572,6 +588,14 @@ #define OMAP4430_D2D_STATDEP_SHIFT 18 #define OMAP4430_D2D_STATDEP_MASK (1 << 18) +/* Used by CM_CLKSEL_DPLL_MPU */ +#define OMAP4460_DCC_COUNT_MAX_SHIFT 24 +#define OMAP4460_DCC_COUNT_MAX_MASK (0xff << 24) + +/* Used by CM_CLKSEL_DPLL_MPU */ +#define OMAP4460_DCC_EN_SHIFT 22 +#define OMAP4460_DCC_EN_MASK (1 << 22) + /* * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY, @@ -582,6 +606,10 @@ #define OMAP4430_DELTAMSTEP_SHIFT 0 #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) +/* Renamed from DELTAMSTEP Used by CM_SSC_DELTAMSTEP_DPLL_USB */ +#define OMAP4460_DELTAMSTEP_0_20_SHIFT 0 +#define OMAP4460_DELTAMSTEP_0_20_MASK (0x1fffff << 0) + /* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ #define OMAP4430_DLL_OVERRIDE_SHIFT 2 #define OMAP4430_DLL_OVERRIDE_MASK (1 << 2) @@ -1204,6 +1232,10 @@ #define OMAP4430_MODULEMODE_SHIFT 0 #define OMAP4430_MODULEMODE_MASK (0x3 << 0) +/* Used by CM_L4CFG_DYNAMICDEP */ +#define OMAP4460_MPU_DYNDEP_SHIFT 19 +#define OMAP4460_MPU_DYNDEP_MASK (1 << 19) + /* Used by CM_DSS_DSS_CLKCTRL */ #define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT 9 #define OMAP4430_OPTFCLKEN_48MHZ_CLK_MASK (1 << 9) @@ -1298,6 +1330,10 @@ #define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT 10 #define OMAP4430_OPTFCLKEN_SYS_CLK_MASK (1 << 10) +/* Used by CM_WKUP_BANDGAP_CLKCTRL */ +#define OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT 8 +#define OMAP4460_OPTFCLKEN_TS_FCLK_MASK (1 << 8) + /* Used by CM_DSS_DSS_CLKCTRL */ #define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT 11 #define OMAP4430_OPTFCLKEN_TV_CLK_MASK (1 << 11) diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h index 6d2776f..3cb247b 100644 --- a/arch/arm/mach-omap2/prm-regbits-44xx.h +++ b/arch/arm/mach-omap2/prm-regbits-44xx.h @@ -283,6 +283,14 @@ #define OMAP4430_DUCATI_UNICACHE_STATEST_SHIFT 10 #define OMAP4430_DUCATI_UNICACHE_STATEST_MASK (0x3 << 10) +/* Used by PRM_DEVICE_OFF_CTRL */ +#define OMAP4460_EMIF1_OFFWKUP_DISABLE_SHIFT 8 +#define OMAP4460_EMIF1_OFFWKUP_DISABLE_MASK (1 << 8) + +/* Used by PRM_DEVICE_OFF_CTRL */ +#define OMAP4460_EMIF2_OFFWKUP_DISABLE_SHIFT 9 +#define OMAP4460_EMIF2_OFFWKUP_DISABLE_MASK (1 << 9) + /* Used by RM_MPU_RSTST */ #define OMAP4430_EMULATION_RST_SHIFT 0 #define OMAP4430_EMULATION_RST_MASK (1 << 0) -- cgit v0.10.2 From 3c5fec75e121b21a2eb35e5a6b44291509abba6f Mon Sep 17 00:00:00 2001 From: Ajay Kumar Gupta Date: Fri, 8 Jul 2011 15:06:13 +0530 Subject: usb: musb: restore INDEX register in resume path Restoring the missing INDEX register value in musb_restore_context(). Without this suspend resume functionality is broken with offmode enabled. Cc: stable@kernel.org Acked-by: Anand Gadiyar Signed-off-by: Ajay Kumar Gupta Signed-off-by: Felipe Balbi diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index c6ab321..4d39e08 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -2282,6 +2282,7 @@ static void musb_restore_context(struct musb *musb) musb->context.index_regs[i].rxhubport); } } + musb_writeb(musb_base, MUSB_INDEX, musb->context.index); } static int musb_suspend(struct device *dev) -- cgit v0.10.2 From 5db05c09ac107ef957b7a052d7bba8190c93b460 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:59:07 +0900 Subject: usb: update email address in r8a66597-udc and m66592-udc Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 11d3782..dd9f460 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c @@ -3,7 +3,7 @@ * * Copyright (C) 2006-2007 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h index c3caf1a..b85e05b 100644 --- a/drivers/usb/gadget/m66592-udc.h +++ b/drivers/usb/gadget/m66592-udc.h @@ -3,7 +3,7 @@ * * Copyright (C) 2006-2007 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index db7a6de..7ee6915 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c @@ -3,7 +3,7 @@ * * Copyright (C) 2006-2009 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h index 5fc22e0..503f766 100644 --- a/drivers/usb/gadget/r8a66597-udc.h +++ b/drivers/usb/gadget/r8a66597-udc.h @@ -3,7 +3,7 @@ * * Copyright (C) 2007-2009 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- cgit v0.10.2 From deafeb24e8a846da8555e68f4bcf651daa8a4ed1 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 8 Jul 2011 14:51:21 +0900 Subject: usb: gadget: r8a66597-udc: fix cannot connect after rmmod gadget driver When we run rmmod a gadget driver, the driver will call disable_controller(). Then, because the bit of USBE in SYSCFG0 was cleared in on_chip=1 mode, we could not connect the usb when we run insmod a gadget driver next time. This patch also cleans up probe() and ->stop() about unnecessary init_controller(). Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index 7ee6915..4f3f1ce 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c @@ -1444,6 +1444,7 @@ static int r8a66597_start(struct usb_gadget_driver *driver, goto error; } + init_controller(r8a66597); r8a66597_bset(r8a66597, VBSE, INTENB0); if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { r8a66597_start_xclock(r8a66597); @@ -1474,15 +1475,12 @@ static int r8a66597_stop(struct usb_gadget_driver *driver) spin_lock_irqsave(&r8a66597->lock, flags); if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) r8a66597_usb_disconnect(r8a66597); - spin_unlock_irqrestore(&r8a66597->lock, flags); - r8a66597_bclr(r8a66597, VBSE, INTENB0); + disable_controller(r8a66597); + spin_unlock_irqrestore(&r8a66597->lock, flags); driver->unbind(&r8a66597->gadget); - init_controller(r8a66597); - disable_controller(r8a66597); - device_del(&r8a66597->gadget.dev); r8a66597->driver = NULL; return 0; @@ -1646,8 +1644,6 @@ static int __init r8a66597_probe(struct platform_device *pdev) goto clean_up3; r8a66597->ep0_req->complete = nop_completion; - init_controller(r8a66597); - ret = usb_add_gadget_udc(&pdev->dev, &r8a66597->gadget); if (ret) goto err_add_udc; -- cgit v0.10.2 From 5154e9f126c1d2ee8f5f93d9954f83d82b2d5e64 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 8 Jul 2011 14:51:27 +0900 Subject: usb: gadget: r8a66597-udc: Make BUSWAIT configurable through platform data BUSWAIT is a 4-bit-wide value that controls the number of access waits from the CPU to on-chip USB module. b'0000 inserts 0 wait (2 access cycles) and b'1111 inserts 15 waits (17 access cycles, hardware initial value), respectively. BUSWAIT value depends on peripheral clock frequency supplied to on-chip of each CPU, hence should be configurable through platform data. Note that this patch assumes that b'0000 (0 wait, 2 access cycles) is rerely used and considered as invalid. If valid 'buswait' data is not provided by platform, initial b'1111 (15 waits, 17 access cycles) will be applied as a safe default. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index 4f3f1ce..834a020 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c @@ -576,7 +576,11 @@ static void init_controller(struct r8a66597 *r8a66597) u16 endian = r8a66597->pdata->endian ? BIGEND : 0; if (r8a66597->pdata->on_chip) { - r8a66597_bset(r8a66597, 0x04, SYSCFG1); + if (r8a66597->pdata->buswait) + r8a66597_write(r8a66597, r8a66597->pdata->buswait, + SYSCFG1); + else + r8a66597_write(r8a66597, 0x0f, SYSCFG1); r8a66597_bset(r8a66597, HSE, SYSCFG0); r8a66597_bclr(r8a66597, USBE, SYSCFG0); diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h index 26d2167..6e1bfae 100644 --- a/include/linux/usb/r8a66597.h +++ b/include/linux/usb/r8a66597.h @@ -31,6 +31,9 @@ struct r8a66597_platdata { /* This callback can control port power instead of DVSTCTR register. */ void (*port_power)(int port, int power); + /* This parameter is for BUSWAIT */ + u16 buswait; + /* set one = on chip controller, set zero = external controller */ unsigned on_chip:1; -- cgit v0.10.2 From ceaa0a6eeadfd2f53df121210d99a1f80ee7645e Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 8 Jul 2011 14:51:33 +0900 Subject: usb: gadget: m66592-udc: add support for TEST_MODE The USB high speed device must support the TEST_MODE, but the driver didn't support it. When we sent the SET_FEATURE for TEST_MODE to the driver, the request was successful, but the module didn't enter the TEST_MODE. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index dd9f460..40c2f7a 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c @@ -691,6 +691,7 @@ static void init_controller(struct m66592 *m66592) static void disable_controller(struct m66592 *m66592) { + m66592_bclr(m66592, M66592_UTST, M66592_TESTMODE); if (!m66592->pdata->on_chip) { m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); udelay(1); @@ -1048,10 +1049,30 @@ static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) { + u16 tmp; + int timeout = 3000; switch (ctrl->bRequestType & USB_RECIP_MASK) { case USB_RECIP_DEVICE: - control_end(m66592, 1); + switch (le16_to_cpu(ctrl->wValue)) { + case USB_DEVICE_TEST_MODE: + control_end(m66592, 1); + /* Wait for the completion of status stage */ + do { + tmp = m66592_read(m66592, M66592_INTSTS0) & + M66592_CTSQ; + udelay(1); + } while (tmp != M66592_CS_IDST || timeout-- > 0); + + if (tmp == M66592_CS_IDST) + m66592_bset(m66592, + le16_to_cpu(ctrl->wIndex >> 8), + M66592_TESTMODE); + break; + default: + pipe_stall(m66592, 0); + break; + } break; case USB_RECIP_INTERFACE: control_end(m66592, 1); -- cgit v0.10.2 From 96fe53ef5498ba130b2f054f2de38e090ddaa55f Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 8 Jul 2011 14:51:14 +0900 Subject: usb: gadget: r8a66597-udc: add support for TEST_MODE The USB high speed device must support the TEST_MODE, but the driver didn't support it. When we sent the SET_FEATURE for TEST_MODE to the driver, the request was successful, but the module didn't enter the TEST_MODE. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index 834a020..b8b3005 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c @@ -622,6 +622,7 @@ static void disable_controller(struct r8a66597 *r8a66597) { if (r8a66597->pdata->on_chip) { r8a66597_bset(r8a66597, SCKE, SYSCFG0); + r8a66597_bclr(r8a66597, UTST, TESTMODE); /* disable interrupts */ r8a66597_write(r8a66597, 0, INTENB0); @@ -639,6 +640,7 @@ static void disable_controller(struct r8a66597 *r8a66597) r8a66597_bclr(r8a66597, SCKE, SYSCFG0); } else { + r8a66597_bclr(r8a66597, UTST, TESTMODE); r8a66597_bclr(r8a66597, SCKE, SYSCFG0); udelay(1); r8a66597_bclr(r8a66597, PLLC, SYSCFG0); @@ -1003,10 +1005,29 @@ static void clear_feature(struct r8a66597 *r8a66597, static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) { + u16 tmp; + int timeout = 3000; switch (ctrl->bRequestType & USB_RECIP_MASK) { case USB_RECIP_DEVICE: - control_end(r8a66597, 1); + switch (le16_to_cpu(ctrl->wValue)) { + case USB_DEVICE_TEST_MODE: + control_end(r8a66597, 1); + /* Wait for the completion of status stage */ + do { + tmp = r8a66597_read(r8a66597, INTSTS0) & CTSQ; + udelay(1); + } while (tmp != CS_IDST || timeout-- > 0); + + if (tmp == CS_IDST) + r8a66597_bset(r8a66597, + le16_to_cpu(ctrl->wIndex >> 8), + TESTMODE); + break; + default: + pipe_stall(r8a66597, 0); + break; + } break; case USB_RECIP_INTERFACE: control_end(r8a66597, 1); -- cgit v0.10.2 From 257d643d7d7cd81075b6dee88cfba14f773805c7 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sat, 2 Jul 2011 08:00:24 +0530 Subject: OMAP4: clocks: Update the clock tree with 4460 clock nodes Add the new clock nodes (bandgap_ts_fclk, div_ts_ck) for omap4460. Handle these nodes using the clock flags (CK_*). Signed-off-by: Rajendra Nayak Signed-off-by: Nishanth Menon Signed-off-by: Benoit Cousson Reviewed-by: Kevin Hilman Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8c96567..639e00e 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1486,6 +1486,40 @@ static struct clk dss_dss_clk = { .recalc = &followparent_recalc, }; +static const struct clksel_rate div3_8to32_rates[] = { + { .div = 8, .val = 0, .flags = RATE_IN_44XX }, + { .div = 16, .val = 1, .flags = RATE_IN_44XX }, + { .div = 32, .val = 2, .flags = RATE_IN_44XX }, + { .div = 0 }, +}; + +static const struct clksel div_ts_div[] = { + { .parent = &l4_wkup_clk_mux_ck, .rates = div3_8to32_rates }, + { .parent = NULL }, +}; + +static struct clk div_ts_ck = { + .name = "div_ts_ck", + .parent = &l4_wkup_clk_mux_ck, + .clksel = div_ts_div, + .clksel_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, + .clksel_mask = OMAP4430_CLKSEL_24_25_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk bandgap_ts_fclk = { + .name = "bandgap_ts_fclk", + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, + .enable_bit = OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT, + .clkdm_name = "l4_wkup_clkdm", + .parent = &div_ts_ck, + .recalc = &followparent_recalc, +}; + static struct clk dss_48mhz_clk = { .name = "dss_48mhz_clk", .ops = &clkops_omap2_dflt, @@ -3110,7 +3144,9 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "aes2_fck", &aes2_fck, CK_443X), CLK(NULL, "aess_fck", &aess_fck, CK_443X), CLK(NULL, "bandgap_fclk", &bandgap_fclk, CK_443X), + CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk, CK_446X), CLK(NULL, "des3des_fck", &des3des_fck, CK_443X), + CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X), CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), @@ -3293,6 +3329,9 @@ int __init omap4xxx_clk_init(void) if (cpu_is_omap44xx()) { cpu_mask = RATE_IN_4430; cpu_clkflg = CK_443X; + } else if (cpu_is_omap446x()) { + cpu_mask = RATE_IN_4460; + cpu_clkflg = CK_446X; } clk_init(&omap2_clk_functions); diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h index f1899a3..387a963 100644 --- a/arch/arm/plat-omap/include/plat/clkdev_omap.h +++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h @@ -39,6 +39,7 @@ struct omap_clk { #define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */ #define CK_443X (1 << 11) #define CK_TI816X (1 << 12) +#define CK_446X (1 << 13) #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 006e599..21b1beb 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -58,10 +58,12 @@ struct clkops { #define RATE_IN_36XX (1 << 4) #define RATE_IN_4430 (1 << 5) #define RATE_IN_TI816X (1 << 6) +#define RATE_IN_4460 (1 << 7) #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) #define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX) +#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460) /* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */ #define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX) -- cgit v0.10.2 From 04617db7aa688598ebd3fce20691d31a5e778b45 Mon Sep 17 00:00:00 2001 From: Paul Zimmerman Date: Mon, 27 Jun 2011 14:13:18 -0700 Subject: usb: gadget: add SS descriptors to Ethernet gadget Add SuperSpeed descriptors to the Network USB function drivers. This has been lightly tested using a Linux host. I was able to ssh from device to host and host to device, no obvious problems seen. Signed-off-by: Paul Zimmerman Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index ac41858..aafc84f 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -401,7 +401,7 @@ static struct usb_composite_driver eth_driver = { .name = "g_ether", .dev = &device_desc, .strings = dev_strings, - .max_speed = USB_SPEED_HIGH, + .max_speed = USB_SPEED_SUPER, .unbind = __exit_p(eth_unbind), }; diff --git a/drivers/usb/gadget/f_ecm.c b/drivers/usb/gadget/f_ecm.c index ddedbc83..3691a0c 100644 --- a/drivers/usb/gadget/f_ecm.c +++ b/drivers/usb/gadget/f_ecm.c @@ -77,10 +77,12 @@ static inline struct f_ecm *func_to_ecm(struct usb_function *f) /* peak (theoretical) bulk transfer rate in bits-per-second */ static inline unsigned ecm_bitrate(struct usb_gadget *g) { - if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) + if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER) + return 13 * 1024 * 8 * 1000 * 8; + else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) return 13 * 512 * 8 * 1000 * 8; else - return 19 * 64 * 1 * 1000 * 8; + return 19 * 64 * 1 * 1000 * 8; } /*-------------------------------------------------------------------------*/ @@ -210,8 +212,10 @@ static struct usb_descriptor_header *ecm_fs_function[] = { (struct usb_descriptor_header *) &ecm_header_desc, (struct usb_descriptor_header *) &ecm_union_desc, (struct usb_descriptor_header *) &ecm_desc, + /* NOTE: status endpoint might need to be removed */ (struct usb_descriptor_header *) &fs_ecm_notify_desc, + /* data interface, altsettings 0 and 1 */ (struct usb_descriptor_header *) &ecm_data_nop_intf, (struct usb_descriptor_header *) &ecm_data_intf, @@ -231,6 +235,7 @@ static struct usb_endpoint_descriptor hs_ecm_notify_desc = { .wMaxPacketSize = cpu_to_le16(ECM_STATUS_BYTECOUNT), .bInterval = LOG2_STATUS_INTERVAL_MSEC + 4, }; + static struct usb_endpoint_descriptor hs_ecm_in_desc = { .bLength = USB_DT_ENDPOINT_SIZE, .bDescriptorType = USB_DT_ENDPOINT, @@ -255,8 +260,10 @@ static struct usb_descriptor_header *ecm_hs_function[] = { (struct usb_descriptor_header *) &ecm_header_desc, (struct usb_descriptor_header *) &ecm_union_desc, (struct usb_descriptor_header *) &ecm_desc, + /* NOTE: status endpoint might need to be removed */ (struct usb_descriptor_header *) &hs_ecm_notify_desc, + /* data interface, altsettings 0 and 1 */ (struct usb_descriptor_header *) &ecm_data_nop_intf, (struct usb_descriptor_header *) &ecm_data_intf, @@ -265,6 +272,76 @@ static struct usb_descriptor_header *ecm_hs_function[] = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor ss_ecm_notify_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_IN, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = cpu_to_le16(ECM_STATUS_BYTECOUNT), + .bInterval = LOG2_STATUS_INTERVAL_MSEC + 4, +}; + +static struct usb_ss_ep_comp_descriptor ss_ecm_intr_comp_desc = { + .bLength = sizeof ss_ecm_intr_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 3 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ + .wBytesPerInterval = cpu_to_le16(ECM_STATUS_BYTECOUNT), +}; + +static struct usb_endpoint_descriptor ss_ecm_in_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_IN, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_endpoint_descriptor ss_ecm_out_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_OUT, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_ss_ep_comp_descriptor ss_ecm_bulk_comp_desc = { + .bLength = sizeof ss_ecm_bulk_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 2 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ +}; + +static struct usb_descriptor_header *ecm_ss_function[] = { + /* CDC ECM control descriptors */ + (struct usb_descriptor_header *) &ecm_control_intf, + (struct usb_descriptor_header *) &ecm_header_desc, + (struct usb_descriptor_header *) &ecm_union_desc, + (struct usb_descriptor_header *) &ecm_desc, + + /* NOTE: status endpoint might need to be removed */ + (struct usb_descriptor_header *) &ss_ecm_notify_desc, + (struct usb_descriptor_header *) &ss_ecm_intr_comp_desc, + + /* data interface, altsettings 0 and 1 */ + (struct usb_descriptor_header *) &ecm_data_nop_intf, + (struct usb_descriptor_header *) &ecm_data_intf, + (struct usb_descriptor_header *) &ss_ecm_in_desc, + (struct usb_descriptor_header *) &ss_ecm_bulk_comp_desc, + (struct usb_descriptor_header *) &ss_ecm_out_desc, + (struct usb_descriptor_header *) &ss_ecm_bulk_comp_desc, + NULL, +}; + /* string descriptors: */ static struct usb_string ecm_string_defs[] = { @@ -679,6 +756,20 @@ ecm_bind(struct usb_configuration *c, struct usb_function *f) goto fail; } + if (gadget_is_superspeed(c->cdev->gadget)) { + ss_ecm_in_desc.bEndpointAddress = + fs_ecm_in_desc.bEndpointAddress; + ss_ecm_out_desc.bEndpointAddress = + fs_ecm_out_desc.bEndpointAddress; + ss_ecm_notify_desc.bEndpointAddress = + fs_ecm_notify_desc.bEndpointAddress; + + /* copy descriptors, and track endpoint copies */ + f->ss_descriptors = usb_copy_descriptors(ecm_ss_function); + if (!f->ss_descriptors) + goto fail; + } + /* NOTE: all that is done without knowing or caring about * the network link ... which is unavailable to this code * until we're activated via set_alt(). @@ -688,6 +779,7 @@ ecm_bind(struct usb_configuration *c, struct usb_function *f) ecm->port.close = ecm_close; DBG(cdev, "CDC Ethernet: %s speed IN/%s OUT/%s NOTIFY/%s\n", + gadget_is_superspeed(c->cdev->gadget) ? "super" : gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", ecm->port.in_ep->name, ecm->port.out_ep->name, ecm->notify->name); @@ -696,6 +788,8 @@ ecm_bind(struct usb_configuration *c, struct usb_function *f) fail: if (f->descriptors) usb_free_descriptors(f->descriptors); + if (f->hs_descriptors) + usb_free_descriptors(f->hs_descriptors); if (ecm->notify_req) { kfree(ecm->notify_req->buf); @@ -722,6 +816,8 @@ ecm_unbind(struct usb_configuration *c, struct usb_function *f) DBG(c->cdev, "ecm unbind\n"); + if (gadget_is_superspeed(c->cdev->gadget)) + usb_free_descriptors(f->ss_descriptors); if (gadget_is_dualspeed(c->cdev->gadget)) usb_free_descriptors(f->hs_descriptors); usb_free_descriptors(f->descriptors); diff --git a/drivers/usb/gadget/f_eem.c b/drivers/usb/gadget/f_eem.c index 3e41274..046c6d0 100644 --- a/drivers/usb/gadget/f_eem.c +++ b/drivers/usb/gadget/f_eem.c @@ -115,6 +115,45 @@ static struct usb_descriptor_header *eem_hs_function[] __initdata = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor eem_ss_in_desc __initdata = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_IN, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_endpoint_descriptor eem_ss_out_desc __initdata = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_OUT, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_ss_ep_comp_descriptor eem_ss_bulk_comp_desc __initdata = { + .bLength = sizeof eem_ss_bulk_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 2 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ +}; + +static struct usb_descriptor_header *eem_ss_function[] __initdata = { + /* CDC EEM control descriptors */ + (struct usb_descriptor_header *) &eem_intf, + (struct usb_descriptor_header *) &eem_ss_in_desc, + (struct usb_descriptor_header *) &eem_ss_bulk_comp_desc, + (struct usb_descriptor_header *) &eem_ss_out_desc, + (struct usb_descriptor_header *) &eem_ss_bulk_comp_desc, + NULL, +}; + /* string descriptors: */ static struct usb_string eem_string_defs[] = { @@ -265,7 +304,20 @@ eem_bind(struct usb_configuration *c, struct usb_function *f) goto fail; } + if (gadget_is_superspeed(c->cdev->gadget)) { + eem_ss_in_desc.bEndpointAddress = + eem_fs_in_desc.bEndpointAddress; + eem_ss_out_desc.bEndpointAddress = + eem_fs_out_desc.bEndpointAddress; + + /* copy descriptors, and track endpoint copies */ + f->ss_descriptors = usb_copy_descriptors(eem_ss_function); + if (!f->ss_descriptors) + goto fail; + } + DBG(cdev, "CDC Ethernet (EEM): %s speed IN/%s OUT/%s\n", + gadget_is_superspeed(c->cdev->gadget) ? "super" : gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", eem->port.in_ep->name, eem->port.out_ep->name); return 0; @@ -273,6 +325,8 @@ eem_bind(struct usb_configuration *c, struct usb_function *f) fail: if (f->descriptors) usb_free_descriptors(f->descriptors); + if (f->hs_descriptors) + usb_free_descriptors(f->hs_descriptors); /* we might as well release our claims on endpoints */ if (eem->port.out_ep->desc) @@ -292,6 +346,8 @@ eem_unbind(struct usb_configuration *c, struct usb_function *f) DBG(c->cdev, "eem unbind\n"); + if (gadget_is_superspeed(c->cdev->gadget)) + usb_free_descriptors(f->ss_descriptors); if (gadget_is_dualspeed(c->cdev->gadget)) usb_free_descriptors(f->hs_descriptors); usb_free_descriptors(f->descriptors); diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c index b324efa..8f3eae9 100644 --- a/drivers/usb/gadget/f_rndis.c +++ b/drivers/usb/gadget/f_rndis.c @@ -95,10 +95,12 @@ static inline struct f_rndis *func_to_rndis(struct usb_function *f) /* peak (theoretical) bulk transfer rate in bits-per-second */ static unsigned int bitrate(struct usb_gadget *g) { - if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) + if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER) + return 13 * 1024 * 8 * 1000 * 8; + else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) return 13 * 512 * 8 * 1000 * 8; else - return 19 * 64 * 1 * 1000 * 8; + return 19 * 64 * 1 * 1000 * 8; } /*-------------------------------------------------------------------------*/ @@ -216,6 +218,7 @@ static struct usb_endpoint_descriptor fs_out_desc = { static struct usb_descriptor_header *eth_fs_function[] = { (struct usb_descriptor_header *) &rndis_iad_descriptor, + /* control interface matches ACM, not Ethernet */ (struct usb_descriptor_header *) &rndis_control_intf, (struct usb_descriptor_header *) &header_desc, @@ -223,6 +226,7 @@ static struct usb_descriptor_header *eth_fs_function[] = { (struct usb_descriptor_header *) &rndis_acm_descriptor, (struct usb_descriptor_header *) &rndis_union_desc, (struct usb_descriptor_header *) &fs_notify_desc, + /* data interface has no altsetting */ (struct usb_descriptor_header *) &rndis_data_intf, (struct usb_descriptor_header *) &fs_in_desc, @@ -241,6 +245,7 @@ static struct usb_endpoint_descriptor hs_notify_desc = { .wMaxPacketSize = cpu_to_le16(STATUS_BYTECOUNT), .bInterval = LOG2_STATUS_INTERVAL_MSEC + 4, }; + static struct usb_endpoint_descriptor hs_in_desc = { .bLength = USB_DT_ENDPOINT_SIZE, .bDescriptorType = USB_DT_ENDPOINT, @@ -261,6 +266,7 @@ static struct usb_endpoint_descriptor hs_out_desc = { static struct usb_descriptor_header *eth_hs_function[] = { (struct usb_descriptor_header *) &rndis_iad_descriptor, + /* control interface matches ACM, not Ethernet */ (struct usb_descriptor_header *) &rndis_control_intf, (struct usb_descriptor_header *) &header_desc, @@ -268,6 +274,7 @@ static struct usb_descriptor_header *eth_hs_function[] = { (struct usb_descriptor_header *) &rndis_acm_descriptor, (struct usb_descriptor_header *) &rndis_union_desc, (struct usb_descriptor_header *) &hs_notify_desc, + /* data interface has no altsetting */ (struct usb_descriptor_header *) &rndis_data_intf, (struct usb_descriptor_header *) &hs_in_desc, @@ -275,6 +282,76 @@ static struct usb_descriptor_header *eth_hs_function[] = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor ss_notify_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_IN, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = cpu_to_le16(STATUS_BYTECOUNT), + .bInterval = LOG2_STATUS_INTERVAL_MSEC + 4, +}; + +static struct usb_ss_ep_comp_descriptor ss_intr_comp_desc = { + .bLength = sizeof ss_intr_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 3 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ + .wBytesPerInterval = cpu_to_le16(STATUS_BYTECOUNT), +}; + +static struct usb_endpoint_descriptor ss_in_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_IN, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_endpoint_descriptor ss_out_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bEndpointAddress = USB_DIR_OUT, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_ss_ep_comp_descriptor ss_bulk_comp_desc = { + .bLength = sizeof ss_bulk_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 2 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ +}; + +static struct usb_descriptor_header *eth_ss_function[] = { + (struct usb_descriptor_header *) &rndis_iad_descriptor, + + /* control interface matches ACM, not Ethernet */ + (struct usb_descriptor_header *) &rndis_control_intf, + (struct usb_descriptor_header *) &header_desc, + (struct usb_descriptor_header *) &call_mgmt_descriptor, + (struct usb_descriptor_header *) &rndis_acm_descriptor, + (struct usb_descriptor_header *) &rndis_union_desc, + (struct usb_descriptor_header *) &ss_notify_desc, + (struct usb_descriptor_header *) &ss_intr_comp_desc, + + /* data interface has no altsetting */ + (struct usb_descriptor_header *) &rndis_data_intf, + (struct usb_descriptor_header *) &ss_in_desc, + (struct usb_descriptor_header *) &ss_bulk_comp_desc, + (struct usb_descriptor_header *) &ss_out_desc, + (struct usb_descriptor_header *) &ss_bulk_comp_desc, + NULL, +}; + /* string descriptors: */ static struct usb_string rndis_string_defs[] = { @@ -670,11 +747,24 @@ rndis_bind(struct usb_configuration *c, struct usb_function *f) /* copy descriptors, and track endpoint copies */ f->hs_descriptors = usb_copy_descriptors(eth_hs_function); - if (!f->hs_descriptors) goto fail; } + if (gadget_is_superspeed(c->cdev->gadget)) { + ss_in_desc.bEndpointAddress = + fs_in_desc.bEndpointAddress; + ss_out_desc.bEndpointAddress = + fs_out_desc.bEndpointAddress; + ss_notify_desc.bEndpointAddress = + fs_notify_desc.bEndpointAddress; + + /* copy descriptors, and track endpoint copies */ + f->ss_descriptors = usb_copy_descriptors(eth_ss_function); + if (!f->ss_descriptors) + goto fail; + } + rndis->port.open = rndis_open; rndis->port.close = rndis_close; @@ -699,12 +789,15 @@ rndis_bind(struct usb_configuration *c, struct usb_function *f) */ DBG(cdev, "RNDIS: %s speed IN/%s OUT/%s NOTIFY/%s\n", + gadget_is_superspeed(c->cdev->gadget) ? "super" : gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", rndis->port.in_ep->name, rndis->port.out_ep->name, rndis->notify->name); return 0; fail: + if (gadget_is_superspeed(c->cdev->gadget) && f->ss_descriptors) + usb_free_descriptors(f->ss_descriptors); if (gadget_is_dualspeed(c->cdev->gadget) && f->hs_descriptors) usb_free_descriptors(f->hs_descriptors); if (f->descriptors) @@ -736,6 +829,8 @@ rndis_unbind(struct usb_configuration *c, struct usb_function *f) rndis_deregister(rndis->config); rndis_exit(); + if (gadget_is_superspeed(c->cdev->gadget)) + usb_free_descriptors(f->ss_descriptors); if (gadget_is_dualspeed(c->cdev->gadget)) usb_free_descriptors(f->hs_descriptors); usb_free_descriptors(f->descriptors); diff --git a/drivers/usb/gadget/f_subset.c b/drivers/usb/gadget/f_subset.c index 93bf676..3dc5375 100644 --- a/drivers/usb/gadget/f_subset.c +++ b/drivers/usb/gadget/f_subset.c @@ -201,6 +201,46 @@ static struct usb_descriptor_header *hs_eth_function[] __initdata = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor ss_subset_in_desc __initdata = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_endpoint_descriptor ss_subset_out_desc __initdata = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +static struct usb_ss_ep_comp_descriptor ss_subset_bulk_comp_desc __initdata = { + .bLength = sizeof ss_subset_bulk_comp_desc, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + + /* the following 2 values can be tweaked if necessary */ + /* .bMaxBurst = 0, */ + /* .bmAttributes = 0, */ +}; + +static struct usb_descriptor_header *ss_eth_function[] __initdata = { + (struct usb_descriptor_header *) &subset_data_intf, + (struct usb_descriptor_header *) &mdlm_header_desc, + (struct usb_descriptor_header *) &mdlm_desc, + (struct usb_descriptor_header *) &mdlm_detail_desc, + (struct usb_descriptor_header *) ðer_desc, + (struct usb_descriptor_header *) &ss_subset_in_desc, + (struct usb_descriptor_header *) &ss_subset_bulk_comp_desc, + (struct usb_descriptor_header *) &ss_subset_out_desc, + (struct usb_descriptor_header *) &ss_subset_bulk_comp_desc, + NULL, +}; + /* string descriptors: */ static struct usb_string geth_string_defs[] = { @@ -290,6 +330,8 @@ geth_bind(struct usb_configuration *c, struct usb_function *f) /* copy descriptors, and track endpoint copies */ f->descriptors = usb_copy_descriptors(fs_eth_function); + if (!f->descriptors) + goto fail; /* support all relevant hardware speeds... we expect that when * hardware is dual speed, all bulk-capable endpoints work at @@ -303,6 +345,20 @@ geth_bind(struct usb_configuration *c, struct usb_function *f) /* copy descriptors, and track endpoint copies */ f->hs_descriptors = usb_copy_descriptors(hs_eth_function); + if (!f->hs_descriptors) + goto fail; + } + + if (gadget_is_superspeed(c->cdev->gadget)) { + ss_subset_in_desc.bEndpointAddress = + fs_subset_in_desc.bEndpointAddress; + ss_subset_out_desc.bEndpointAddress = + fs_subset_out_desc.bEndpointAddress; + + /* copy descriptors, and track endpoint copies */ + f->ss_descriptors = usb_copy_descriptors(ss_eth_function); + if (!f->ss_descriptors) + goto fail; } /* NOTE: all that is done without knowing or caring about @@ -311,11 +367,17 @@ geth_bind(struct usb_configuration *c, struct usb_function *f) */ DBG(cdev, "CDC Subset: %s speed IN/%s OUT/%s\n", + gadget_is_superspeed(c->cdev->gadget) ? "super" : gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", geth->port.in_ep->name, geth->port.out_ep->name); return 0; fail: + if (f->descriptors) + usb_free_descriptors(f->descriptors); + if (f->hs_descriptors) + usb_free_descriptors(f->hs_descriptors); + /* we might as well release our claims on endpoints */ if (geth->port.out_ep->desc) geth->port.out_ep->driver_data = NULL; @@ -330,6 +392,8 @@ fail: static void geth_unbind(struct usb_configuration *c, struct usb_function *f) { + if (gadget_is_superspeed(c->cdev->gadget)) + usb_free_descriptors(f->ss_descriptors); if (gadget_is_dualspeed(c->cdev->gadget)) usb_free_descriptors(f->hs_descriptors); usb_free_descriptors(f->descriptors); diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c index b91363e..dfed4c1 100644 --- a/drivers/usb/gadget/u_ether.c +++ b/drivers/usb/gadget/u_ether.c @@ -97,16 +97,17 @@ struct eth_dev { static unsigned qmult = 5; module_param(qmult, uint, S_IRUGO|S_IWUSR); -MODULE_PARM_DESC(qmult, "queue length multiplier at high speed"); +MODULE_PARM_DESC(qmult, "queue length multiplier at high/super speed"); #else /* full speed (low speed doesn't do bulk) */ #define qmult 1 #endif -/* for dual-speed hardware, use deeper queues at highspeed */ +/* for dual-speed hardware, use deeper queues at high/super speed */ static inline int qlen(struct usb_gadget *gadget) { - if (gadget_is_dualspeed(gadget) && gadget->speed == USB_SPEED_HIGH) + if (gadget_is_dualspeed(gadget) && (gadget->speed == USB_SPEED_HIGH || + gadget->speed == USB_SPEED_SUPER)) return qmult * DEFAULT_QLEN; else return DEFAULT_QLEN; @@ -598,9 +599,10 @@ static netdev_tx_t eth_start_xmit(struct sk_buff *skb, req->length = length; - /* throttle highspeed IRQ rate back slightly */ + /* throttle high/super speed IRQ rate back slightly */ if (gadget_is_dualspeed(dev->gadget)) - req->no_interrupt = (dev->gadget->speed == USB_SPEED_HIGH) + req->no_interrupt = (dev->gadget->speed == USB_SPEED_HIGH || + dev->gadget->speed == USB_SPEED_SUPER) ? ((atomic_read(&dev->tx_qlen) % qmult) != 0) : 0; -- cgit v0.10.2 From 57c97c02de0e7a59cb48d3d7666f4afaf9968e84 Mon Sep 17 00:00:00 2001 From: Amit Blay Date: Sun, 3 Jul 2011 17:29:31 +0300 Subject: usb: gadget: zero: add superspeed support This patch adds SuperSpeed descriptors to the g_zero gadget. The SuperSpeed descriptors were added both for f_soursesink and f_loopback function drivers. Signed-off-by: Tatyana Brokhman Signed-off-by: Amit Blay Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/f_loopback.c b/drivers/usb/gadget/f_loopback.c index 3756326..ca660d4 100644 --- a/drivers/usb/gadget/f_loopback.c +++ b/drivers/usb/gadget/f_loopback.c @@ -118,6 +118,49 @@ static struct usb_descriptor_header *hs_loopback_descs[] = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor ss_loop_source_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +struct usb_ss_ep_comp_descriptor ss_loop_source_comp_desc = { + .bLength = USB_DT_SS_EP_COMP_SIZE, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + .bMaxBurst = 0, + .bmAttributes = 0, + .wBytesPerInterval = 0, +}; + +static struct usb_endpoint_descriptor ss_loop_sink_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +struct usb_ss_ep_comp_descriptor ss_loop_sink_comp_desc = { + .bLength = USB_DT_SS_EP_COMP_SIZE, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + .bMaxBurst = 0, + .bmAttributes = 0, + .wBytesPerInterval = 0, +}; + +static struct usb_descriptor_header *ss_loopback_descs[] = { + (struct usb_descriptor_header *) &loopback_intf, + (struct usb_descriptor_header *) &ss_loop_source_desc, + (struct usb_descriptor_header *) &ss_loop_source_comp_desc, + (struct usb_descriptor_header *) &ss_loop_sink_desc, + (struct usb_descriptor_header *) &ss_loop_sink_comp_desc, + NULL, +}; + /* function-specific strings: */ static struct usb_string strings_loopback[] = { @@ -175,8 +218,18 @@ autoconf_fail: f->hs_descriptors = hs_loopback_descs; } + /* support super speed hardware */ + if (gadget_is_superspeed(c->cdev->gadget)) { + ss_loop_source_desc.bEndpointAddress = + fs_loop_source_desc.bEndpointAddress; + ss_loop_sink_desc.bEndpointAddress = + fs_loop_sink_desc.bEndpointAddress; + f->ss_descriptors = ss_loopback_descs; + } + DBG(cdev, "%s speed %s: IN/%s, OUT/%s\n", - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + (gadget_is_superspeed(c->cdev->gadget) ? "super" : + (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")), f->name, loop->in_ep->name, loop->out_ep->name); return 0; } diff --git a/drivers/usb/gadget/f_sourcesink.c b/drivers/usb/gadget/f_sourcesink.c index 5a92883..e18b4f5 100644 --- a/drivers/usb/gadget/f_sourcesink.c +++ b/drivers/usb/gadget/f_sourcesink.c @@ -131,6 +131,49 @@ static struct usb_descriptor_header *hs_source_sink_descs[] = { NULL, }; +/* super speed support: */ + +static struct usb_endpoint_descriptor ss_source_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +struct usb_ss_ep_comp_descriptor ss_source_comp_desc = { + .bLength = USB_DT_SS_EP_COMP_SIZE, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + .bMaxBurst = 0, + .bmAttributes = 0, + .wBytesPerInterval = 0, +}; + +static struct usb_endpoint_descriptor ss_sink_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = cpu_to_le16(1024), +}; + +struct usb_ss_ep_comp_descriptor ss_sink_comp_desc = { + .bLength = USB_DT_SS_EP_COMP_SIZE, + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, + .bMaxBurst = 0, + .bmAttributes = 0, + .wBytesPerInterval = 0, +}; + +static struct usb_descriptor_header *ss_source_sink_descs[] = { + (struct usb_descriptor_header *) &source_sink_intf, + (struct usb_descriptor_header *) &ss_source_desc, + (struct usb_descriptor_header *) &ss_source_comp_desc, + (struct usb_descriptor_header *) &ss_sink_desc, + (struct usb_descriptor_header *) &ss_sink_comp_desc, + NULL, +}; + /* function-specific strings: */ static struct usb_string strings_sourcesink[] = { @@ -187,8 +230,18 @@ autoconf_fail: f->hs_descriptors = hs_source_sink_descs; } + /* support super speed hardware */ + if (gadget_is_superspeed(c->cdev->gadget)) { + ss_source_desc.bEndpointAddress = + fs_source_desc.bEndpointAddress; + ss_sink_desc.bEndpointAddress = + fs_sink_desc.bEndpointAddress; + f->ss_descriptors = ss_source_sink_descs; + } + DBG(cdev, "%s speed %s: IN/%s, OUT/%s\n", - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + (gadget_is_superspeed(c->cdev->gadget) ? "super" : + (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")), f->name, ss->in_ep->name, ss->out_ep->name); return 0; } diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c index af7e7c3..00e2fd2 100644 --- a/drivers/usb/gadget/zero.c +++ b/drivers/usb/gadget/zero.c @@ -340,7 +340,7 @@ static struct usb_composite_driver zero_driver = { .name = "zero", .dev = &device_desc, .strings = dev_strings, - .max_speed = USB_SPEED_HIGH, + .max_speed = USB_SPEED_SUPER, .unbind = zero_unbind, .suspend = zero_suspend, .resume = zero_resume, -- cgit v0.10.2 From ff5caab10e869274539654e02ae4ee155869b7e6 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 7 Jul 2011 19:54:27 -0700 Subject: ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed Signed-off-by: Barry Song Acked-by: Russell King Signed-off-by: Arnd Bergmann diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h index 4d381ec..1dd231d 100644 --- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h +++ b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h @@ -8,4 +8,4 @@ * published by the Free Software Foundation. */ -#define VMALLOC_END 0xd8000000 +#define VMALLOC_END 0xd8000000UL -- cgit v0.10.2 From 085fb6171f0b7d726250026e363c06d3c4d54312 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 7 Jul 2011 19:54:28 -0700 Subject: ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed Signed-off-by: Barry Song Acked-by: Russell King Signed-off-by: Arnd Bergmann diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h index d1d936c7..720fa43 100644 --- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h +++ b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h @@ -19,6 +19,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END 0xF0000000 +#define VMALLOC_END 0xF0000000UL #endif -- cgit v0.10.2 From c8bbde430f837c7ae280b6ac8d4a27b056b83318 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 7 Jul 2011 19:54:29 -0700 Subject: ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed Signed-off-by: Barry Song Acked-by: Russell King Signed-off-by: Arnd Bergmann diff --git a/arch/arm/mach-nuc93x/include/mach/vmalloc.h b/arch/arm/mach-nuc93x/include/mach/vmalloc.h index 98a21b8..7d11a5f 100644 --- a/arch/arm/mach-nuc93x/include/mach/vmalloc.h +++ b/arch/arm/mach-nuc93x/include/mach/vmalloc.h @@ -18,6 +18,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xE0000000UL #endif /* __ASM_ARCH_VMALLOC_H */ -- cgit v0.10.2 From 43a9539fa9e780f16c0d1e4bc91a2701f1ce178f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:36 +0100 Subject: drm/i915: Only export the generic intel_disable_fbc() interface As the enable/disable routines will be gain additional complexity in future patches, it is necessary that all callers do not bypass the generic interface by calling into the chipset routines directly. to do this we make the chipset routines static, so there is no choice. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index e178702..1315a88 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1073,6 +1073,9 @@ static void i915_setup_compression(struct drm_device *dev, int size) unsigned long cfb_base; unsigned long ll_base = 0; + /* Just in case the BIOS is doing something questionable. */ + intel_disable_fbc(dev); + compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096, 0); if (compressed_fb) compressed_fb = drm_mm_get_block(compressed_fb, size, 4096); @@ -1099,7 +1102,6 @@ static void i915_setup_compression(struct drm_device *dev, int size) dev_priv->cfb_size = size; - intel_disable_fbc(dev); dev_priv->compressed_fb = compressed_fb; if (HAS_PCH_SPLIT(dev)) I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a15f2c0..56cb1c4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1289,12 +1289,8 @@ extern void intel_modeset_init(struct drm_device *dev); extern void intel_modeset_gem_init(struct drm_device *dev); extern void intel_modeset_cleanup(struct drm_device *dev); extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state); -extern void i8xx_disable_fbc(struct drm_device *dev); -extern void g4x_disable_fbc(struct drm_device *dev); -extern void ironlake_disable_fbc(struct drm_device *dev); -extern void intel_disable_fbc(struct drm_device *dev); -extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval); extern bool intel_fbc_enabled(struct drm_device *dev); +extern void intel_disable_fbc(struct drm_device *dev); extern bool ironlake_set_drps(struct drm_device *dev, u8 val); extern void ironlake_enable_rc6(struct drm_device *dev); extern void gen6_set_rps(struct drm_device *dev, u8 val); diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 8cd1c8b..2857586 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -760,15 +760,13 @@ static void i915_restore_display(struct drm_device *dev) /* FIXME: restore TV & SDVO state */ /* only restore FBC info on the platform that supports FBC*/ + intel_disable_fbc(dev); if (I915_HAS_FBC(dev)) { if (HAS_PCH_SPLIT(dev)) { - ironlake_disable_fbc(dev); I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); } else if (IS_GM45(dev)) { - g4x_disable_fbc(dev); I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); } else { - i8xx_disable_fbc(dev); I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index af3e5813..0923611 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1384,6 +1384,28 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv, disable_pch_hdmi(dev_priv, pipe, HDMID); } +static void i8xx_disable_fbc(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + u32 fbc_ctl; + + /* Disable compression */ + fbc_ctl = I915_READ(FBC_CONTROL); + if ((fbc_ctl & FBC_CTL_EN) == 0) + return; + + fbc_ctl &= ~FBC_CTL_EN; + I915_WRITE(FBC_CONTROL, fbc_ctl); + + /* Wait for compressing bit to clear */ + if (wait_for((I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) == 0, 10)) { + DRM_DEBUG_KMS("FBC idle timed out\n"); + return; + } + + DRM_DEBUG_KMS("disabled FBC\n"); +} + static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) { struct drm_device *dev = crtc->dev; @@ -1439,28 +1461,6 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dev_priv->cfb_pitch, crtc->y, dev_priv->cfb_plane); } -void i8xx_disable_fbc(struct drm_device *dev) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - u32 fbc_ctl; - - /* Disable compression */ - fbc_ctl = I915_READ(FBC_CONTROL); - if ((fbc_ctl & FBC_CTL_EN) == 0) - return; - - fbc_ctl &= ~FBC_CTL_EN; - I915_WRITE(FBC_CONTROL, fbc_ctl); - - /* Wait for compressing bit to clear */ - if (wait_for((I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) == 0, 10)) { - DRM_DEBUG_KMS("FBC idle timed out\n"); - return; - } - - DRM_DEBUG_KMS("disabled FBC\n"); -} - static bool i8xx_fbc_enabled(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -1516,7 +1516,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); } -void g4x_disable_fbc(struct drm_device *dev) +static void g4x_disable_fbc(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 dpfc_ctl; @@ -1616,7 +1616,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); } -void ironlake_disable_fbc(struct drm_device *dev) +static void ironlake_disable_fbc(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 dpfc_ctl; @@ -1648,7 +1648,7 @@ bool intel_fbc_enabled(struct drm_device *dev) return dev_priv->display.fbc_enabled(dev); } -void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) +static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) { struct drm_i915_private *dev_priv = crtc->dev->dev_private; -- cgit v0.10.2 From 973d04f990ac241881c4793cdfbe367b3caf3dba Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:37 +0100 Subject: drm/i915: Replace direct calls to vfunc.disable_fbc with intel_disable_fbc() ...to ensure that any pending FBC enable tasklet is cancelled. Signed-off-by: Chris Wilson Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0923611..ab78dfd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2820,9 +2820,8 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_disable_plane(dev_priv, plane, pipe); - if (dev_priv->cfb_plane == plane && - dev_priv->display.disable_fbc) - dev_priv->display.disable_fbc(dev); + if (dev_priv->cfb_plane == plane) + intel_disable_fbc(dev); intel_disable_pipe(dev_priv, pipe); @@ -2986,9 +2985,8 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_crtc_dpms_overlay(intel_crtc, false); intel_crtc_update_cursor(crtc, false); - if (dev_priv->cfb_plane == plane && - dev_priv->display.disable_fbc) - dev_priv->display.disable_fbc(dev); + if (dev_priv->cfb_plane == plane) + intel_disable_fbc(dev); intel_disable_plane(dev_priv, plane, pipe); intel_disable_pipe(dev_priv, pipe); @@ -8217,8 +8215,7 @@ void intel_modeset_cleanup(struct drm_device *dev) intel_increase_pllclock(crtc); } - if (dev_priv->display.disable_fbc) - dev_priv->display.disable_fbc(dev); + intel_disable_fbc(dev); if (IS_IRONLAKE_M(dev)) ironlake_disable_drps(dev); -- cgit v0.10.2 From f19a079a800dfd365fa8ed422acf29ca7a036ea3 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:38 +0100 Subject: drm/i915: Remove vestigial pitch from post-gen2 FBC control routines The cfb_pitch was only used for 8xx_enable_fbc(), every later routine was just overwriting the value with itself thanks to a copy'n'paste error. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ab78dfd..5c359e5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1482,8 +1482,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dpfc_ctl = I915_READ(DPFC_CONTROL); if (dpfc_ctl & DPFC_CTL_EN) { - if (dev_priv->cfb_pitch == dev_priv->cfb_pitch / 64 - 1 && - dev_priv->cfb_fence == obj->fence_reg && + if (dev_priv->cfb_fence == obj->fence_reg && dev_priv->cfb_plane == intel_crtc->plane && dev_priv->cfb_y == crtc->y) return; @@ -1492,7 +1491,6 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) intel_wait_for_vblank(dev, intel_crtc->pipe); } - dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1; dev_priv->cfb_fence = obj->fence_reg; dev_priv->cfb_plane = intel_crtc->plane; dev_priv->cfb_y = crtc->y; @@ -1572,8 +1570,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dpfc_ctl = I915_READ(ILK_DPFC_CONTROL); if (dpfc_ctl & DPFC_CTL_EN) { - if (dev_priv->cfb_pitch == dev_priv->cfb_pitch / 64 - 1 && - dev_priv->cfb_fence == obj->fence_reg && + if (dev_priv->cfb_fence == obj->fence_reg && dev_priv->cfb_plane == intel_crtc->plane && dev_priv->cfb_offset == obj->gtt_offset && dev_priv->cfb_y == crtc->y) @@ -1583,7 +1580,6 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) intel_wait_for_vblank(dev, intel_crtc->pipe); } - dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1; dev_priv->cfb_fence = obj->fence_reg; dev_priv->cfb_plane = intel_crtc->plane; dev_priv->cfb_offset = obj->gtt_offset; -- cgit v0.10.2 From de568510cd410d82d370d3000808aca63ef28a22 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:39 +0100 Subject: drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes ...and this requirement is enforced by intel_update_fbc() so we can remove the later check from g4x_enable_fbc() and ironlake_enable_fbc(). Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5c359e5..31c7526 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1441,9 +1441,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) I915_WRITE(FBC_TAG + (i * 4), 0); /* Set it up... */ - fbc_ctl2 = FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM | plane; - if (obj->tiling_mode != I915_TILING_NONE) - fbc_ctl2 |= FBC_CTL_CPU_FENCE; + fbc_ctl2 = FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM | FBC_CTL_CPU_FENCE; + fbc_ctl2 |= plane; I915_WRITE(FBC_CONTROL2, fbc_ctl2); I915_WRITE(FBC_FENCE_OFF, crtc->y); @@ -1453,8 +1452,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; - if (obj->tiling_mode != I915_TILING_NONE) - fbc_ctl |= dev_priv->cfb_fence; + fbc_ctl |= dev_priv->cfb_fence; I915_WRITE(FBC_CONTROL, fbc_ctl); DRM_DEBUG_KMS("enabled FBC, pitch %ld, yoff %d, plane %d, ", @@ -1496,12 +1494,8 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dev_priv->cfb_y = crtc->y; dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X; - if (obj->tiling_mode != I915_TILING_NONE) { - dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence; - I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY); - } else { - I915_WRITE(DPFC_CHICKEN, ~DPFC_HT_MODIFY); - } + dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence; + I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY); I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN | (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) | @@ -1587,12 +1581,8 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dpfc_ctl &= DPFC_RESERVED; dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X); - if (obj->tiling_mode != I915_TILING_NONE) { - dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence); - I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY); - } else { - I915_WRITE(ILK_DPFC_CHICKEN, ~DPFC_HT_MODIFY); - } + dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence); + I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY); I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN | (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) | @@ -1760,8 +1750,13 @@ static void intel_update_fbc(struct drm_device *dev) dev_priv->no_fbc_reason = FBC_BAD_PLANE; goto out_disable; } - if (obj->tiling_mode != I915_TILING_X) { - DRM_DEBUG_KMS("framebuffer not tiled, disabling compression\n"); + + /* The use of a CPU fence is mandatory in order to detect writes + * by the CPU to the scanout and trigger updates to the FBC. + */ + if (obj->tiling_mode != I915_TILING_X || + obj->fence_reg == I915_FENCE_REG_NONE) { + DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n"); dev_priv->no_fbc_reason = FBC_NOT_TILED; goto out_disable; } -- cgit v0.10.2 From 9ce9d0695d15da23ffe817516ba5d0b58caf8d05 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:40 +0100 Subject: drm/i915: Set persistent-mode for ILK/SNB framebuffer compression Persistent mode is intended for use with front-buffer rendering, such as X, where it is necessary to detect writes to the scanout either by the GPU or through the CPU's fence, and recompress the dirty regions on the fly. (By comparison to the back-buffer rendering, the scanout is always recompressed after a page-flip.) References: https://bugs.freedesktop.org/show_bug.cgi?id=33487 References: https://bugs.freedesktop.org/show_bug.cgi?id=31742 Signed-off-by: Ben Widawsky Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4a446b1..96fb0fa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -579,6 +579,7 @@ #define DPFC_CTL_PLANEA (0<<30) #define DPFC_CTL_PLANEB (1<<30) #define DPFC_CTL_FENCE_EN (1<<29) +#define DPFC_CTL_PERSISTENT_MODE (1<<25) #define DPFC_SR_EN (1<<10) #define DPFC_CTL_LIMIT_1X (0<<6) #define DPFC_CTL_LIMIT_2X (1<<6) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 31c7526..9df96bd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1581,6 +1581,8 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) dpfc_ctl &= DPFC_RESERVED; dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X); + /* Set persistent mode for front-buffer rendering, ala X. */ + dpfc_ctl |= DPFC_CTL_PERSISTENT_MODE; dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence); I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY); -- cgit v0.10.2 From 7782de3bd671657674e7baba854f0fd43e9f86bc Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:41 +0100 Subject: drm/i915: Disable FBC across page-flipping Page-flipping updates the scanout address, nukes the FBC compressed image and so forces an FBC update so that the displayed image remains consistent. However, page-flipping does not update the FBC registers themselves, which remain pointing to both the old address and the old CPU fence. Future updates to the new front-buffer (scanout) are then undetected! This first approach to demonstrate the issue and highlight the fix, simply disables FBC upon page-flip (a recompression will be forced on every flip so FBC becomes immaterial) and then re-enables FBC in the page-flip finish work function, so that the FBC registers are now pointing to the new framebuffer and front-buffer rendering works once more. Ideally, we want to only re-enable FBC after page-flipping is complete, as otherwise we are just wasting cycles and power (with needless recompression) whilst the page-flipping application is still running. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33487 Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9df96bd..f0788a9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6333,6 +6333,7 @@ static void intel_unpin_work_fn(struct work_struct *__work) drm_gem_object_unreference(&work->pending_flip_obj->base); drm_gem_object_unreference(&work->old_fb_obj->base); + intel_update_fbc(work->dev); mutex_unlock(&work->dev->struct_mutex); kfree(work); } @@ -6697,6 +6698,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, if (ret) goto cleanup_pending; + intel_disable_fbc(dev); mutex_unlock(&dev->struct_mutex); trace_i915_flip_request(intel_crtc->plane, obj); -- cgit v0.10.2 From 1630fe754c83b3e57efa51c85f1a21e612a63a0e Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:42 +0100 Subject: drm/i915: Perform intel_enable_fbc() from a delayed task In order to accommodate the requirements of re-enabling FBC after page-flipping, but to avoid doing so and incurring the cost of a wait for vblank in the middle of a page-flip sequence, we defer the actual enablement by 50ms. If any request to disable FBC arrive within that interval, the enablement is cancelled and we are saved from blocking on the wait. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 56cb1c4..3154b3d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -266,6 +266,7 @@ enum intel_pch { #define QUIRK_PIPEA_FORCE (1<<0) struct intel_fbdev; +struct intel_fbc_work; typedef struct drm_i915_private { struct drm_device *dev; @@ -335,6 +336,7 @@ typedef struct drm_i915_private { int cfb_fence; int cfb_plane; int cfb_y; + struct intel_fbc_work *fbc_work; struct intel_opregion opregion; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f0788a9..df2839c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1636,20 +1636,96 @@ bool intel_fbc_enabled(struct drm_device *dev) return dev_priv->display.fbc_enabled(dev); } +static void intel_fbc_work_fn(struct work_struct *__work) +{ + struct intel_fbc_work *work = + container_of(to_delayed_work(__work), + struct intel_fbc_work, work); + struct drm_device *dev = work->crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev->struct_mutex); + if (work == dev_priv->fbc_work) { + /* Double check that we haven't switched fb without cancelling + * the prior work. + */ + if (work->crtc->fb == work->fb) + dev_priv->display.enable_fbc(work->crtc, + work->interval); + + dev_priv->fbc_work = NULL; + } + mutex_unlock(&dev->struct_mutex); + + kfree(work); +} + +static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv) +{ + if (dev_priv->fbc_work == NULL) + return; + + DRM_DEBUG_KMS("cancelling pending FBC enable\n"); + + /* Synchronisation is provided by struct_mutex and checking of + * dev_priv->fbc_work, so we can perform the cancellation + * entirely asynchronously. + */ + if (cancel_delayed_work(&dev_priv->fbc_work->work)) + /* tasklet was killed before being run, clean up */ + kfree(dev_priv->fbc_work); + + /* Mark the work as no longer wanted so that if it does + * wake-up (because the work was already running and waiting + * for our mutex), it will discover that is no longer + * necessary to run. + */ + dev_priv->fbc_work = NULL; +} + static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) { - struct drm_i915_private *dev_priv = crtc->dev->dev_private; + struct intel_fbc_work *work; + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = dev->dev_private; if (!dev_priv->display.enable_fbc) return; - dev_priv->display.enable_fbc(crtc, interval); + intel_cancel_fbc_work(dev_priv); + + work = kzalloc(sizeof *work, GFP_KERNEL); + if (work == NULL) { + dev_priv->display.enable_fbc(crtc, interval); + return; + } + + work->crtc = crtc; + work->fb = crtc->fb; + work->interval = interval; + INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn); + + dev_priv->fbc_work = work; + + DRM_DEBUG_KMS("scheduling delayed FBC enable\n"); + + /* Delay the actual enabling to let pageflipping cease and the + * display to settle before starting the compression. + * + * A more complicated solution would involve tracking vblanks + * following the termination of the page-flipping sequence + * and indeed performing the enable as a co-routine and not + * waiting synchronously upon the vblank. + */ + schedule_delayed_work(&work->work, msecs_to_jiffies(50)); } void intel_disable_fbc(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + intel_cancel_fbc_work(dev_priv); + if (!dev_priv->display.disable_fbc) return; @@ -8227,6 +8303,9 @@ void intel_modeset_cleanup(struct drm_device *dev) drm_irq_uninstall(dev); cancel_work_sync(&dev_priv->hotplug_work); + /* flush any delayed tasks or pending work */ + flush_scheduled_work(); + /* Shut off idle work before the crtcs get freed. */ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { intel_crtc = to_intel_crtc(crtc); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 7ec48d8..6e990f9 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -234,6 +234,13 @@ struct intel_unpin_work { bool enable_stall_check; }; +struct intel_fbc_work { + struct delayed_work work; + struct drm_crtc *crtc; + struct drm_framebuffer *fb; + int interval; +}; + int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); -- cgit v0.10.2 From 016b9b61ed692498a5d46dff974fe41b20e7e60b Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 8 Jul 2011 12:22:43 +0100 Subject: drm/i915: Share the common work of disabling active FBC before updating Upon review, all path share the same dependencies for updating the registers and so we can benefit from sharing the code and checking early. This removes the unsightly intel_wait_for_vblank() from the lowlevel functions and upon further analysis the only path that will require a wait is if we are performing an instantaneous transition between two valid FBC configurations. The page-flip path itself will have disabled FBC registers and will have waited for at least one vblank before finishing the flip and attempting to re-enable FBC. This wait can be accomplished simply by delaying the enable until after we are sure that a vblank will have passed, which we are already doing to make sure that the display is settled before enabling FBC. Signed-off-by: Chris Wilson Reviewed-by: Keith Packard Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3154b3d..00dc59a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -331,10 +331,8 @@ typedef struct drm_i915_private { uint32_t last_instdone1; unsigned long cfb_size; - unsigned long cfb_pitch; - unsigned long cfb_offset; - int cfb_fence; - int cfb_plane; + unsigned int cfb_fb; + enum plane cfb_plane; int cfb_y; struct intel_fbc_work *fbc_work; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index df2839c..b5b15bd 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1414,27 +1414,17 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); struct drm_i915_gem_object *obj = intel_fb->obj; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + int cfb_pitch; int plane, i; u32 fbc_ctl, fbc_ctl2; - if (fb->pitch == dev_priv->cfb_pitch && - obj->fence_reg == dev_priv->cfb_fence && - intel_crtc->plane == dev_priv->cfb_plane && - I915_READ(FBC_CONTROL) & FBC_CTL_EN) - return; - - i8xx_disable_fbc(dev); - - dev_priv->cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE; - - if (fb->pitch < dev_priv->cfb_pitch) - dev_priv->cfb_pitch = fb->pitch; + cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE; + if (fb->pitch < cfb_pitch) + cfb_pitch = fb->pitch; /* FBC_CTL wants 64B units */ - dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1; - dev_priv->cfb_fence = obj->fence_reg; - dev_priv->cfb_plane = intel_crtc->plane; - plane = dev_priv->cfb_plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB; + cfb_pitch = (cfb_pitch / 64) - 1; + plane = intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB; /* Clear old tags */ for (i = 0; i < (FBC_LL_SIZE / 32) + 1; i++) @@ -1450,13 +1440,13 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC; if (IS_I945GM(dev)) fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ - fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; + fbc_ctl |= (cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; - fbc_ctl |= dev_priv->cfb_fence; + fbc_ctl |= obj->fence_reg; I915_WRITE(FBC_CONTROL, fbc_ctl); - DRM_DEBUG_KMS("enabled FBC, pitch %ld, yoff %d, plane %d, ", - dev_priv->cfb_pitch, crtc->y, dev_priv->cfb_plane); + DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %d, ", + cfb_pitch, crtc->y, intel_crtc->plane); } static bool i8xx_fbc_enabled(struct drm_device *dev) @@ -1478,23 +1468,8 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) unsigned long stall_watermark = 200; u32 dpfc_ctl; - dpfc_ctl = I915_READ(DPFC_CONTROL); - if (dpfc_ctl & DPFC_CTL_EN) { - if (dev_priv->cfb_fence == obj->fence_reg && - dev_priv->cfb_plane == intel_crtc->plane && - dev_priv->cfb_y == crtc->y) - return; - - I915_WRITE(DPFC_CONTROL, dpfc_ctl & ~DPFC_CTL_EN); - intel_wait_for_vblank(dev, intel_crtc->pipe); - } - - dev_priv->cfb_fence = obj->fence_reg; - dev_priv->cfb_plane = intel_crtc->plane; - dev_priv->cfb_y = crtc->y; - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X; - dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence; + dpfc_ctl |= DPFC_CTL_FENCE_EN | obj->fence_reg; I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY); I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN | @@ -1563,27 +1538,11 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) u32 dpfc_ctl; dpfc_ctl = I915_READ(ILK_DPFC_CONTROL); - if (dpfc_ctl & DPFC_CTL_EN) { - if (dev_priv->cfb_fence == obj->fence_reg && - dev_priv->cfb_plane == intel_crtc->plane && - dev_priv->cfb_offset == obj->gtt_offset && - dev_priv->cfb_y == crtc->y) - return; - - I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl & ~DPFC_CTL_EN); - intel_wait_for_vblank(dev, intel_crtc->pipe); - } - - dev_priv->cfb_fence = obj->fence_reg; - dev_priv->cfb_plane = intel_crtc->plane; - dev_priv->cfb_offset = obj->gtt_offset; - dev_priv->cfb_y = crtc->y; - dpfc_ctl &= DPFC_RESERVED; dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X); /* Set persistent mode for front-buffer rendering, ala X. */ dpfc_ctl |= DPFC_CTL_PERSISTENT_MODE; - dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence); + dpfc_ctl |= (DPFC_CTL_FENCE_EN | obj->fence_reg); I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY); I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN | @@ -1596,7 +1555,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) if (IS_GEN6(dev)) { I915_WRITE(SNB_DPFC_CTL_SA, - SNB_CPU_FENCE_ENABLE | dev_priv->cfb_fence); + SNB_CPU_FENCE_ENABLE | obj->fence_reg); I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); sandybridge_blit_fbc_update(dev); } @@ -1649,10 +1608,15 @@ static void intel_fbc_work_fn(struct work_struct *__work) /* Double check that we haven't switched fb without cancelling * the prior work. */ - if (work->crtc->fb == work->fb) + if (work->crtc->fb == work->fb) { dev_priv->display.enable_fbc(work->crtc, work->interval); + dev_priv->cfb_plane = to_intel_crtc(work->crtc)->plane; + dev_priv->cfb_fb = work->crtc->fb->base.id; + dev_priv->cfb_y = work->crtc->y; + } + dev_priv->fbc_work = NULL; } mutex_unlock(&dev->struct_mutex); @@ -1710,7 +1674,10 @@ static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) DRM_DEBUG_KMS("scheduling delayed FBC enable\n"); /* Delay the actual enabling to let pageflipping cease and the - * display to settle before starting the compression. + * display to settle before starting the compression. Note that + * this delay also serves a second purpose: it allows for a + * vblank to pass after disabling the FBC before we attempt + * to modify the control registers. * * A more complicated solution would involve tracking vblanks * following the termination of the page-flipping sequence @@ -1730,6 +1697,7 @@ void intel_disable_fbc(struct drm_device *dev) return; dev_priv->display.disable_fbc(dev); + dev_priv->cfb_plane = -1; } /** @@ -1843,6 +1811,44 @@ static void intel_update_fbc(struct drm_device *dev) if (in_dbg_master()) goto out_disable; + /* If the scanout has not changed, don't modify the FBC settings. + * Note that we make the fundamental assumption that the fb->obj + * cannot be unpinned (and have its GTT offset and fence revoked) + * without first being decoupled from the scanout and FBC disabled. + */ + if (dev_priv->cfb_plane == intel_crtc->plane && + dev_priv->cfb_fb == fb->base.id && + dev_priv->cfb_y == crtc->y) + return; + + if (intel_fbc_enabled(dev)) { + /* We update FBC along two paths, after changing fb/crtc + * configuration (modeswitching) and after page-flipping + * finishes. For the latter, we know that not only did + * we disable the FBC at the start of the page-flip + * sequence, but also more than one vblank has passed. + * + * For the former case of modeswitching, it is possible + * to switch between two FBC valid configurations + * instantaneously so we do need to disable the FBC + * before we can modify its control registers. We also + * have to wait for the next vblank for that to take + * effect. However, since we delay enabling FBC we can + * assume that a vblank has passed since disabling and + * that we can safely alter the registers in the deferred + * callback. + * + * In the scenario that we go from a valid to invalid + * and then back to valid FBC configuration we have + * no strict enforcement that a vblank occurred since + * disabling the FBC. However, along all current pipe + * disabling paths we do need to wait for a vblank at + * some point. And we wait before enabling FBC anyway. + */ + DRM_DEBUG_KMS("disabling active FBC for update\n"); + intel_disable_fbc(dev); + } + intel_enable_fbc(crtc, 500); return; -- cgit v0.10.2 From c7c369472dad852f6fe06a8be94dea72de784934 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Fri, 8 Jul 2011 10:29:42 -0700 Subject: drm/i915: Enable i915 frame buffer compression by default We'll try again with the new fixes. Prepare to see this reverted when we get regression reports... Signed-off-by: Keith Packard diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index ec4308d..629d24c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -55,7 +55,7 @@ module_param_named(semaphores, i915_semaphores, int, 0600); unsigned int i915_enable_rc6 = 1; module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); -unsigned int i915_enable_fbc = 0; +unsigned int i915_enable_fbc = 1; module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600); unsigned int i915_lvds_downclock = 0; -- cgit v0.10.2 From d8bf4ca9ca9576548628344c9725edd3786e90b1 Mon Sep 17 00:00:00 2001 From: Michal Hocko Date: Fri, 8 Jul 2011 14:39:41 +0200 Subject: rcu: treewide: Do not use rcu_read_lock_held when calling rcu_dereference_check Since ca5ecddf (rcu: define __rcu address space modifier for sparse) rcu_dereference_check use rcu_read_lock_held as a part of condition automatically so callers do not have to do that as well. Signed-off-by: Michal Hocko Acked-by: Paul E. McKenney Signed-off-by: Jiri Kosina diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index ab4ac0c..da7e4bc 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -539,7 +539,6 @@ static inline struct cgroup_subsys_state *cgroup_subsys_state( */ #define task_subsys_state_check(task, subsys_id, __c) \ rcu_dereference_check(task->cgroups->subsys[subsys_id], \ - rcu_read_lock_held() || \ lockdep_is_held(&task->alloc_lock) || \ cgroup_lock_is_held() || (__c)) diff --git a/include/linux/cred.h b/include/linux/cred.h index 8260799..f240f2f 100644 --- a/include/linux/cred.h +++ b/include/linux/cred.h @@ -284,7 +284,6 @@ static inline void put_cred(const struct cred *_cred) ({ \ const struct task_struct *__t = (task); \ rcu_dereference_check(__t->real_cred, \ - rcu_read_lock_held() || \ task_is_dead(__t)); \ }) diff --git a/include/linux/fdtable.h b/include/linux/fdtable.h index 133c0ba..df7e3cf 100644 --- a/include/linux/fdtable.h +++ b/include/linux/fdtable.h @@ -60,7 +60,6 @@ struct files_struct { #define rcu_dereference_check_fdtable(files, fdtfd) \ (rcu_dereference_check((fdtfd), \ - rcu_read_lock_held() || \ lockdep_is_held(&(files)->file_lock) || \ atomic_read(&(files)->count) == 1 || \ rcu_my_thread_group_empty())) diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index bbad657..27576aa 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -758,8 +758,7 @@ extern int lockdep_rtnl_is_held(void); * or RTNL. Note : Please prefer rtnl_dereference() or rcu_dereference() */ #define rcu_dereference_rtnl(p) \ - rcu_dereference_check(p, rcu_read_lock_held() || \ - lockdep_rtnl_is_held()) + rcu_dereference_check(p, lockdep_rtnl_is_held()) /** * rtnl_dereference - fetch RCU pointer when updates are prevented by RTNL diff --git a/include/net/sock.h b/include/net/sock.h index c0b938c..d5b65c1 100644 --- a/include/net/sock.h +++ b/include/net/sock.h @@ -1301,8 +1301,7 @@ extern unsigned long sock_i_ino(struct sock *sk); static inline struct dst_entry * __sk_dst_get(struct sock *sk) { - return rcu_dereference_check(sk->sk_dst_cache, rcu_read_lock_held() || - sock_owned_by_user(sk) || + return rcu_dereference_check(sk->sk_dst_cache, sock_owned_by_user(sk) || lockdep_is_held(&sk->sk_lock.slock)); } diff --git a/kernel/cgroup.c b/kernel/cgroup.c index 2731d11..5ae71d6 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c @@ -1697,7 +1697,6 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen) { char *start; struct dentry *dentry = rcu_dereference_check(cgrp->dentry, - rcu_read_lock_held() || cgroup_lock_is_held()); if (!dentry || cgrp == dummytop) { @@ -1723,7 +1722,6 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen) break; dentry = rcu_dereference_check(cgrp->dentry, - rcu_read_lock_held() || cgroup_lock_is_held()); if (!cgrp->parent) continue; @@ -4813,8 +4811,7 @@ unsigned short css_id(struct cgroup_subsys_state *css) * on this or this is under rcu_read_lock(). Once css->id is allocated, * it's unchanged until freed. */ - cssid = rcu_dereference_check(css->id, - rcu_read_lock_held() || atomic_read(&css->refcnt)); + cssid = rcu_dereference_check(css->id, atomic_read(&css->refcnt)); if (cssid) return cssid->id; @@ -4826,8 +4823,7 @@ unsigned short css_depth(struct cgroup_subsys_state *css) { struct css_id *cssid; - cssid = rcu_dereference_check(css->id, - rcu_read_lock_held() || atomic_read(&css->refcnt)); + cssid = rcu_dereference_check(css->id, atomic_read(&css->refcnt)); if (cssid) return cssid->depth; diff --git a/kernel/exit.c b/kernel/exit.c index 20a4064..07dc154 100644 --- a/kernel/exit.c +++ b/kernel/exit.c @@ -85,7 +85,6 @@ static void __exit_signal(struct task_struct *tsk) struct tty_struct *uninitialized_var(tty); sighand = rcu_dereference_check(tsk->sighand, - rcu_read_lock_held() || lockdep_tasklist_lock_is_held()); spin_lock(&sighand->siglock); diff --git a/kernel/pid.c b/kernel/pid.c index 57a8346..e432057 100644 --- a/kernel/pid.c +++ b/kernel/pid.c @@ -405,7 +405,6 @@ struct task_struct *pid_task(struct pid *pid, enum pid_type type) if (pid) { struct hlist_node *first; first = rcu_dereference_check(hlist_first_rcu(&pid->tasks[type]), - rcu_read_lock_held() || lockdep_tasklist_lock_is_held()); if (first) result = hlist_entry(first, struct task_struct, pids[(type)].node); diff --git a/kernel/rcutorture.c b/kernel/rcutorture.c index 2e138db..ced7210 100644 --- a/kernel/rcutorture.c +++ b/kernel/rcutorture.c @@ -941,7 +941,6 @@ static void rcu_torture_timer(unsigned long unused) idx = cur_ops->readlock(); completed = cur_ops->completed(); p = rcu_dereference_check(rcu_torture_current, - rcu_read_lock_held() || rcu_read_lock_bh_held() || rcu_read_lock_sched_held() || srcu_read_lock_held(&srcu_ctl)); @@ -1002,7 +1001,6 @@ rcu_torture_reader(void *arg) idx = cur_ops->readlock(); completed = cur_ops->completed(); p = rcu_dereference_check(rcu_torture_current, - rcu_read_lock_held() || rcu_read_lock_bh_held() || rcu_read_lock_sched_held() || srcu_read_lock_held(&srcu_ctl)); diff --git a/kernel/sched.c b/kernel/sched.c index 3f2e502..71e5a25 100644 --- a/kernel/sched.c +++ b/kernel/sched.c @@ -581,7 +581,6 @@ static inline int cpu_of(struct rq *rq) #define rcu_dereference_check_sched_domain(p) \ rcu_dereference_check((p), \ - rcu_read_lock_held() || \ lockdep_is_held(&sched_domains_mutex)) /* diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c index b83870b..3db78b6 100644 --- a/net/mac80211/sta_info.c +++ b/net/mac80211/sta_info.c @@ -97,7 +97,6 @@ struct sta_info *sta_info_get(struct ieee80211_sub_if_data *sdata, struct sta_info *sta; sta = rcu_dereference_check(local->sta_hash[STA_HASH(addr)], - rcu_read_lock_held() || lockdep_is_held(&local->sta_lock) || lockdep_is_held(&local->sta_mtx)); while (sta) { @@ -105,7 +104,6 @@ struct sta_info *sta_info_get(struct ieee80211_sub_if_data *sdata, memcmp(sta->sta.addr, addr, ETH_ALEN) == 0) break; sta = rcu_dereference_check(sta->hnext, - rcu_read_lock_held() || lockdep_is_held(&local->sta_lock) || lockdep_is_held(&local->sta_mtx)); } @@ -123,7 +121,6 @@ struct sta_info *sta_info_get_bss(struct ieee80211_sub_if_data *sdata, struct sta_info *sta; sta = rcu_dereference_check(local->sta_hash[STA_HASH(addr)], - rcu_read_lock_held() || lockdep_is_held(&local->sta_lock) || lockdep_is_held(&local->sta_mtx)); while (sta) { @@ -132,7 +129,6 @@ struct sta_info *sta_info_get_bss(struct ieee80211_sub_if_data *sdata, memcmp(sta->sta.addr, addr, ETH_ALEN) == 0) break; sta = rcu_dereference_check(sta->hnext, - rcu_read_lock_held() || lockdep_is_held(&local->sta_lock) || lockdep_is_held(&local->sta_mtx)); } diff --git a/net/netlabel/netlabel_domainhash.c b/net/netlabel/netlabel_domainhash.c index de0d8e4..2aa975e5 100644 --- a/net/netlabel/netlabel_domainhash.c +++ b/net/netlabel/netlabel_domainhash.c @@ -55,8 +55,7 @@ struct netlbl_domhsh_tbl { * should be okay */ static DEFINE_SPINLOCK(netlbl_domhsh_lock); #define netlbl_domhsh_rcu_deref(p) \ - rcu_dereference_check(p, rcu_read_lock_held() || \ - lockdep_is_held(&netlbl_domhsh_lock)) + rcu_dereference_check(p, lockdep_is_held(&netlbl_domhsh_lock)) static struct netlbl_domhsh_tbl *netlbl_domhsh = NULL; static struct netlbl_dom_map *netlbl_domhsh_def = NULL; diff --git a/net/netlabel/netlabel_unlabeled.c b/net/netlabel/netlabel_unlabeled.c index 9c38658..3de3768 100644 --- a/net/netlabel/netlabel_unlabeled.c +++ b/net/netlabel/netlabel_unlabeled.c @@ -116,8 +116,7 @@ struct netlbl_unlhsh_walk_arg { * hash table should be okay */ static DEFINE_SPINLOCK(netlbl_unlhsh_lock); #define netlbl_unlhsh_rcu_deref(p) \ - rcu_dereference_check(p, rcu_read_lock_held() || \ - lockdep_is_held(&netlbl_unlhsh_lock)) + rcu_dereference_check(p, lockdep_is_held(&netlbl_unlhsh_lock)) static struct netlbl_unlhsh_tbl *netlbl_unlhsh = NULL; static struct netlbl_unlhsh_iface *netlbl_unlhsh_def = NULL; diff --git a/security/keys/keyring.c b/security/keys/keyring.c index a06ffab..30e242f 100644 --- a/security/keys/keyring.c +++ b/security/keys/keyring.c @@ -155,7 +155,6 @@ static void keyring_destroy(struct key *keyring) } klist = rcu_dereference_check(keyring->payload.subscriptions, - rcu_read_lock_held() || atomic_read(&keyring->usage) == 0); if (klist) { for (loop = klist->nkeys - 1; loop >= 0; loop--) -- cgit v0.10.2 From fa3b1c881247752677cec042dd4d82a9dde1bf88 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Fri, 8 Jul 2011 09:42:58 +0100 Subject: gma500: strip unneeded version headers Remove unneeded version.h includes from drivers/staging/gma500/ It was pointed out by 'make versioncheck' that some includes of linux/version.h are not needed in drivers/staging/gma500/. This patch removes them. Signed-off-by: Jesper Juhl [updated for all th file cleanup and movement] Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/framebuffer.h b/drivers/staging/gma500/framebuffer.h index 9416a21..d1b2289 100644 --- a/drivers/staging/gma500/framebuffer.h +++ b/drivers/staging/gma500/framebuffer.h @@ -22,7 +22,6 @@ #ifndef _FRAMEBUFFER_H_ #define _FRAMEBUFFER_H_ -#include #include #include diff --git a/drivers/staging/gma500/mdfld_dsi_dbi.h b/drivers/staging/gma500/mdfld_dsi_dbi.h index a76813e..a51e2f8 100644 --- a/drivers/staging/gma500/mdfld_dsi_dbi.h +++ b/drivers/staging/gma500/mdfld_dsi_dbi.h @@ -29,7 +29,6 @@ #define __MDFLD_DSI_DBI_H__ #include -#include #include #include #include diff --git a/drivers/staging/gma500/mdfld_dsi_output.h b/drivers/staging/gma500/mdfld_dsi_output.h index 0bf00ea..4300f10 100644 --- a/drivers/staging/gma500/mdfld_dsi_output.h +++ b/drivers/staging/gma500/mdfld_dsi_output.h @@ -29,7 +29,6 @@ #define __MDFLD_DSI_OUTPUT_H__ #include -#include #include #include #include diff --git a/drivers/staging/gma500/psb_drv.h b/drivers/staging/gma500/psb_drv.h index 9e4f361..c19045f 100644 --- a/drivers/staging/gma500/psb_drv.h +++ b/drivers/staging/gma500/psb_drv.h @@ -20,7 +20,6 @@ #ifndef _PSB_DRV_H_ #define _PSB_DRV_H_ -#include #include #include -- cgit v0.10.2 From d3cf695c58eae98271effac22e6dce00bb61cd06 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:43:15 +0100 Subject: gma500: Re-order checks and dereferences in psb_intel_lvds Dan Carpenter reports: Smatch complains about 6a7afe3acc4b "gma500: continue abstracting platform specific code" drivers/staging/gma500/psb_intel_lvds.c +579 psb_intel_lvds_set_property(7) warn: variable dereferenced before check 'encoder' --- a/drivers/staging/gma500/psb_intel_lvds.c +++ b/drivers/staging/gma500/psb_intel_lvds.c @@ -575,11 +575,12 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, struct drm_property *property, uint64_t value) { - struct drm_encoder *pEncoder = connector->encoder; + struct drm_encoder *encoder = connector->encoder; + struct drm_psb_private *dev_priv = encoder->dev->dev_private; ^^^^^^^^^^^^ dereference encoder here. Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/psb_intel_lvds.c b/drivers/staging/gma500/psb_intel_lvds.c index 4a0d234..1e1e788 100644 --- a/drivers/staging/gma500/psb_intel_lvds.c +++ b/drivers/staging/gma500/psb_intel_lvds.c @@ -574,9 +574,14 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, uint64_t value) { struct drm_encoder *encoder = connector->encoder; - struct drm_psb_private *dev_priv = encoder->dev->dev_private; + struct drm_psb_private *dev_priv; + + if (!encoder) + return -1; - if (!strcmp(property->name, "scaling mode") && encoder) { + dev_priv = encoder->dev->dev_private; + + if (!strcmp(property->name, "scaling mode")) { struct psb_intel_crtc *pPsbCrtc = to_psb_intel_crtc(encoder->crtc); uint64_t curValue; @@ -617,7 +622,7 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, encoder->crtc->fb)) goto set_prop_error; } - } else if (!strcmp(property->name, "backlight") && encoder) { + } else if (!strcmp(property->name, "backlight")) { if (drm_connector_property_set_value(connector, property, value)) @@ -631,7 +636,7 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, } #endif } - } else if (!strcmp(property->name, "DPMS") && encoder) { + } else if (!strcmp(property->name, "DPMS")) { struct drm_encoder_helper_funcs *pEncHFuncs = encoder->helper_private; pEncHFuncs->dpms(encoder, value); -- cgit v0.10.2 From 75ec9bb006171cff72816eaffc3f5848f46944bc Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:43:29 +0100 Subject: gma500: psb_intel_lvds style Fixed some stylistic uglies noticed while fixing the previous bug Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/psb_intel_lvds.c b/drivers/staging/gma500/psb_intel_lvds.c index 1e1e788..c4111b5 100644 --- a/drivers/staging/gma500/psb_intel_lvds.c +++ b/drivers/staging/gma500/psb_intel_lvds.c @@ -30,10 +30,7 @@ #include "power.h" #include -u32 CoreClock; -u32 PWMControlRegFreq; - -/** +/* * LVDS I2C backlight control macros */ #define BRIGHTNESS_MAX_LEVEL 100 @@ -51,7 +48,7 @@ u32 PWMControlRegFreq; #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) struct psb_intel_lvds_priv { - /** + /* * Saved LVDO output states */ uint32_t savePP_ON; @@ -64,9 +61,8 @@ struct psb_intel_lvds_priv { uint32_t saveBLC_PWM_CTL; }; -/* MRST defines end */ -/** +/* * Returns the maximum level of the backlight duty cycle field. */ static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev) @@ -161,7 +157,7 @@ static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level) return 0; } -/** +/* * Set LVDS backlight level either by I2C or PWM */ void psb_intel_lvds_set_brightness(struct drm_device *dev, int level) @@ -183,10 +179,10 @@ void psb_intel_lvds_set_brightness(struct drm_device *dev, int level) psb_lvds_pwm_set_brightness(dev, level); } -/** +/* * Sets the backlight level. * - * \param level backlight level, from 0 to psb_intel_lvds_get_max_backlight(). + * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight(). */ static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level) { @@ -208,7 +204,7 @@ static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level) } } -/** +/* * Sets the power state for the panel. */ static void psb_intel_lvds_set_power(struct drm_device *dev, @@ -501,7 +497,7 @@ static void psb_intel_lvds_mode_set(struct drm_encoder *encoder, REG_WRITE(PFIT_CONTROL, pfit_control); } -/** +/* * Detect the LVDS connection. * * This always returns CONNECTOR_STATUS_CONNECTED. @@ -514,7 +510,7 @@ static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector return connector_status_connected; } -/** +/* * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. */ static int psb_intel_lvds_get_modes(struct drm_connector *connector) @@ -575,18 +571,18 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, { struct drm_encoder *encoder = connector->encoder; struct drm_psb_private *dev_priv; - + if (!encoder) - return -1; + return -1; dev_priv = encoder->dev->dev_private; if (!strcmp(property->name, "scaling mode")) { - struct psb_intel_crtc *pPsbCrtc = + struct psb_intel_crtc *crtc = to_psb_intel_crtc(encoder->crtc); uint64_t curValue; - if (!pPsbCrtc) + if (!crtc) goto set_prop_error; switch (value) { @@ -613,10 +609,10 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, value)) goto set_prop_error; - if (pPsbCrtc->saved_mode.hdisplay != 0 && - pPsbCrtc->saved_mode.vdisplay != 0) { + if (crtc->saved_mode.hdisplay != 0 && + crtc->saved_mode.vdisplay != 0) { if (!drm_crtc_helper_set_mode(encoder->crtc, - &pPsbCrtc->saved_mode, + &crtc->saved_mode, encoder->crtc->x, encoder->crtc->y, encoder->crtc->fb)) @@ -629,11 +625,12 @@ int psb_intel_lvds_set_property(struct drm_connector *connector, goto set_prop_error; else { #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE - struct backlight_device *bd = dev_priv->backlight_device; + struct backlight_device *bd = + dev_priv->backlight_device; if (bd) { - bd->props.brightness = value; - backlight_update_status(bd); - } + bd->props.brightness = value; + backlight_update_status(bd); + } #endif } } else if (!strcmp(property->name, "DPMS")) { @@ -749,7 +746,7 @@ void psb_intel_lvds_init(struct drm_device *dev, dev_priv->backlight_property, BRIGHTNESS_MAX_LEVEL); - /** + /* * Set up I2C bus * FIXME: distroy i2c_bus when exit */ @@ -797,7 +794,7 @@ void psb_intel_lvds_init(struct drm_device *dev, } } - /* Failed to get EDID, what about VBT? do we need this?*/ + /* Failed to get EDID, what about VBT? do we need this? */ if (mode_dev->vbt_mode) mode_dev->panel_fixed_mode = drm_mode_duplicate(dev, mode_dev->vbt_mode); -- cgit v0.10.2 From 5ed836acd2c7760e03c639566b59b4c1cc53a792 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:43:45 +0100 Subject: gma500: Fix symbol clash with i915 Randy Dunlap reports: | when both CONFIG_DRM_I915=y and CONFIG_DRM_PSB=y: | drivers/staging/built-in.o: In function `intel_opregion_init': | (.text+0x47943): multiple definition of `intel_opregion_init' | drivers/gpu/built-in.o:(.text+0x17277a): first defined here Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/cdv_device.c b/drivers/staging/gma500/cdv_device.c index 680f1bb..3729a97 100644 --- a/drivers/staging/gma500/cdv_device.c +++ b/drivers/staging/gma500/cdv_device.c @@ -319,7 +319,7 @@ static void cdv_get_core_freq(struct drm_device *dev) static int cdv_chip_setup(struct drm_device *dev) { cdv_get_core_freq(dev); - intel_opregion_init(dev); + gma_intel_opregion_init(dev); psb_intel_init_bios(dev); return 0; } diff --git a/drivers/staging/gma500/intel_opregion.c b/drivers/staging/gma500/intel_opregion.c index 8240965..d2e6037 100644 --- a/drivers/staging/gma500/intel_opregion.c +++ b/drivers/staging/gma500/intel_opregion.c @@ -47,7 +47,7 @@ struct opregion_acpi { /*FIXME: add it later*/ } __packed; -int intel_opregion_init(struct drm_device *dev) +int gma_intel_opregion_init(struct drm_device *dev) { struct drm_psb_private *dev_priv = dev->dev_private; u32 opregion_phy; @@ -71,7 +71,7 @@ int intel_opregion_init(struct drm_device *dev) return 0; } -int intel_opregion_exit(struct drm_device *dev) +int gma_intel_opregion_exit(struct drm_device *dev) { struct drm_psb_private *dev_priv = dev->dev_private; if (dev_priv->lid_state) diff --git a/drivers/staging/gma500/psb_device.c b/drivers/staging/gma500/psb_device.c index 0774c06..e26a176 100644 --- a/drivers/staging/gma500/psb_device.c +++ b/drivers/staging/gma500/psb_device.c @@ -322,7 +322,7 @@ static void psb_get_core_freq(struct drm_device *dev) static int psb_chip_setup(struct drm_device *dev) { psb_get_core_freq(dev); - intel_opregion_init(dev); + gma_intel_opregion_init(dev); psb_intel_init_bios(dev); return 0; } diff --git a/drivers/staging/gma500/psb_drv.c b/drivers/staging/gma500/psb_drv.c index 264fdf4..397b605 100644 --- a/drivers/staging/gma500/psb_drv.c +++ b/drivers/staging/gma500/psb_drv.c @@ -245,7 +245,7 @@ static int psb_driver_unload(struct drm_device *dev) if (dev_priv) { psb_lid_timer_takedown(dev_priv); - intel_opregion_exit(dev); + gma_intel_opregion_exit(dev); psb_do_takedown(dev); diff --git a/drivers/staging/gma500/psb_drv.h b/drivers/staging/gma500/psb_drv.h index c19045f..f5ecd6d 100644 --- a/drivers/staging/gma500/psb_drv.h +++ b/drivers/staging/gma500/psb_drv.h @@ -728,8 +728,8 @@ extern void mdfld_disable_te(struct drm_device *dev, int pipe); /* * intel_opregion.c */ -extern int intel_opregion_init(struct drm_device *dev); -extern int intel_opregion_exit(struct drm_device *dev); +extern int gma_intel_opregion_init(struct drm_device *dev); +extern int gma_intel_opregion_exit(struct drm_device *dev); /* * framebuffer.c -- cgit v0.10.2 From 2b9428e20333ee42d00335c9700dcb20cf54f384 Mon Sep 17 00:00:00 2001 From: Patrik Jakobsson Date: Fri, 8 Jul 2011 09:44:03 +0100 Subject: gma500: Mask out bits not part of the page table base address Otherwise we can't ioremap the gtt and the screen gets garbled. Signed-off-by: Patrik Jakobsson Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/gtt.c b/drivers/staging/gma500/gtt.c index 28f2261..78dd01b 100644 --- a/drivers/staging/gma500/gtt.c +++ b/drivers/staging/gma500/gtt.c @@ -397,7 +397,7 @@ int psb_gtt_init(struct drm_device *dev, int resume) /* The root resource we allocate address space from */ dev_priv->gtt_initialized = 1; - pg->gtt_phys_start = dev_priv->pge_ctl; + pg->gtt_phys_start = dev_priv->pge_ctl & PAGE_MASK; /* * FIXME: video mmu has hw bug to access 0x0D0000000, -- cgit v0.10.2 From 0cf0db5e3d32b3b1bb7c792f09f945ac929c659e Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:44:20 +0100 Subject: gma500: tidy up the CDV files We are close to having PSB and CDV ready for moving from staging so it's time to get the polish out. Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/cdv_device.c b/drivers/staging/gma500/cdv_device.c index 3729a97..87614e0 100644 --- a/drivers/staging/gma500/cdv_device.c +++ b/drivers/staging/gma500/cdv_device.c @@ -129,7 +129,6 @@ static int cdv_backlight_setup(struct drm_device *dev) static int cdv_set_brightness(struct backlight_device *bd) { - struct drm_device *dev = bl_get_data(cdv_backlight_device); int level = bd->props.brightness; /* Percentage 1-100% being valid */ @@ -188,9 +187,9 @@ static inline u32 CDV_MSG_READ32(uint port, uint offset) { int mcr = (0x10<<24) | (port << 16) | (offset << 8); uint32_t ret_val = 0; - struct pci_dev *pci_root = pci_get_bus_and_slot (0, 0); - pci_write_config_dword (pci_root, 0xD0, mcr); - pci_read_config_dword (pci_root, 0xD4, &ret_val); + struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0); + pci_write_config_dword(pci_root, 0xD0, mcr); + pci_read_config_dword(pci_root, 0xD4, &ret_val); pci_dev_put(pci_root); return ret_val; } @@ -198,9 +197,9 @@ static inline u32 CDV_MSG_READ32(uint port, uint offset) static inline void CDV_MSG_WRITE32(uint port, uint offset, u32 value) { int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xF0; - struct pci_dev *pci_root = pci_get_bus_and_slot (0, 0); - pci_write_config_dword (pci_root, 0xD4, value); - pci_write_config_dword (pci_root, 0xD0, mcr); + struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0); + pci_write_config_dword(pci_root, 0xD4, value); + pci_write_config_dword(pci_root, 0xD0, mcr); pci_dev_put(pci_root); } @@ -218,8 +217,10 @@ static void cdv_init_pm(struct drm_device *dev) u32 pwr_cnt; int i; - dev_priv->apm_base = CDV_MSG_READ32(PSB_PUNIT_PORT, PSB_APMBA) & 0xFFFF; - dev_priv->ospm_base = CDV_MSG_READ32(PSB_PUNIT_PORT, PSB_OSPMBA) & 0xFFFF; + dev_priv->apm_base = CDV_MSG_READ32(PSB_PUNIT_PORT, + PSB_APMBA) & 0xFFFF; + dev_priv->ospm_base = CDV_MSG_READ32(PSB_PUNIT_PORT, + PSB_OSPMBA) & 0xFFFF; /* Force power on for now */ pwr_cnt = inl(dev_priv->apm_base + PSB_APM_CMD); @@ -346,5 +347,5 @@ const struct psb_ops cdv_chip_ops = { .save_regs = cdv_save_display_registers, .restore_regs = cdv_restore_display_registers, .power_down = cdv_power_down, - .power_up = cdv_power_up, + .power_up = cdv_power_up, }; diff --git a/drivers/staging/gma500/cdv_intel_crt.c b/drivers/staging/gma500/cdv_intel_crt.c index e26749c..efda63b 100644 --- a/drivers/staging/gma500/cdv_intel_crt.c +++ b/drivers/staging/gma500/cdv_intel_crt.c @@ -45,7 +45,7 @@ static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode) temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); temp &= ~ADPA_DAC_ENABLE; - switch(mode) { + switch (mode) { case DRM_MODE_DPMS_ON: temp |= ADPA_DAC_ENABLE; break; @@ -128,11 +128,10 @@ static void cdv_intel_crt_mode_set(struct drm_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) adpa |= ADPA_VSYNC_ACTIVE_HIGH; - if (psb_intel_crtc->pipe == 0) { + if (psb_intel_crtc->pipe == 0) adpa |= ADPA_PIPE_A_SELECT; - } else { + else adpa |= ADPA_PIPE_B_SELECT; - } REG_WRITE(adpa_reg, adpa); } @@ -144,7 +143,8 @@ static void cdv_intel_crt_mode_set(struct drm_encoder *encoder, * \return true if CRT is connected. * \return false if CRT is disconnected. */ -static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, bool force) +static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, + bool force) { struct drm_device *dev = connector->dev; u32 hotplug_en; @@ -193,7 +193,8 @@ static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, bool f return ret; } -static enum drm_connector_status cdv_intel_crt_detect(struct drm_connector *connector, bool force) +static enum drm_connector_status cdv_intel_crt_detect( + struct drm_connector *connector, bool force) { if (cdv_intel_crt_detect_hotplug(connector, force)) return connector_status_connected; @@ -245,7 +246,8 @@ static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = { .set_property = cdv_intel_crt_set_property, }; -static const struct drm_connector_helper_funcs cdv_intel_crt_connector_helper_funcs = { +static const struct drm_connector_helper_funcs + cdv_intel_crt_connector_helper_funcs = { .mode_valid = cdv_intel_crt_mode_valid, .get_modes = cdv_intel_crt_get_modes, .best_encoder = psb_intel_best_encoder, @@ -277,11 +279,11 @@ void cdv_intel_crt_init(struct drm_device *dev, psb_intel_output->mode_dev = mode_dev; connector = &psb_intel_output->base; drm_connector_init(dev, connector, - &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); + &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); encoder = &psb_intel_output->enc; drm_encoder_init(dev, encoder, - &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC); + &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC); drm_mode_connector_attach_encoder(&psb_intel_output->base, &psb_intel_output->enc); @@ -310,7 +312,8 @@ void cdv_intel_crt_init(struct drm_device *dev, connector->doublescan_allowed = 0; drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs); - drm_connector_helper_add(connector, &cdv_intel_crt_connector_helper_funcs); + drm_connector_helper_add(connector, + &cdv_intel_crt_connector_helper_funcs); drm_sysfs_connector_add(connector); diff --git a/drivers/staging/gma500/cdv_intel_display.c b/drivers/staging/gma500/cdv_intel_display.c index 2042e98..7b97c60 100644 --- a/drivers/staging/gma500/cdv_intel_display.c +++ b/drivers/staging/gma500/cdv_intel_display.c @@ -11,7 +11,7 @@ * more details. * * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., + * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. * * Authors: @@ -40,8 +40,7 @@ struct cdv_intel_p2_t { int p2_slow, p2_fast; }; -struct cdv_intel_clock_t -{ +struct cdv_intel_clock_t { /* given values */ int n; int m1, m2; @@ -117,17 +116,18 @@ static const struct cdv_intel_limit_t cdv_intel_limits[] = { }; #define _wait_for(COND, MS, W) ({ \ - unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \ - int ret__ = 0; \ - while (! (COND)) { \ - if (time_after(jiffies, timeout__)) { \ - ret__ = -ETIMEDOUT; \ - break; \ - } \ - if (W && !in_dbg_master()) msleep(W); \ - } \ - ret__; \ -}) + unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \ + int ret__ = 0; \ + while (!(COND)) { \ + if (time_after(jiffies, timeout__)) { \ + ret__ = -ETIMEDOUT; \ + break; \ + } \ + if (W && !in_dbg_master()) \ + msleep(W); \ + } \ + ret__; \ +}) #define wait_for(COND, MS) _wait_for(COND, MS, 1) @@ -237,7 +237,7 @@ cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc, ref_value = 0x68A701; cdv_sb_write(dev, SB_REF_SFR(pipe), ref_value); - + /* We don't know what the other fields of these regs are, so * leave them in place. */ @@ -324,14 +324,13 @@ cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc, lane_value |= LANE_PLL_ENABLE; cdv_sb_write(dev, lane_reg, lane_value); - /* Program the Lane2/3 for HDMI C */ + /* Program the Lane2/3 for HDMI C */ lane_reg = PSB_LANE2; cdv_sb_read(dev, lane_reg, &lane_value); lane_value &= ~(LANE_PLL_MASK); lane_value |= LANE_PLL_ENABLE; cdv_sb_write(dev, lane_reg, lane_value); - lane_reg = PSB_LANE3; cdv_sb_read(dev, lane_reg, &lane_value); lane_value &= ~(LANE_PLL_MASK); @@ -362,17 +361,18 @@ bool cdv_intel_pipe_has_type(struct drm_crtc *crtc, int type) return false; } -static const struct cdv_intel_limit_t *cdv_intel_limit(struct drm_crtc *crtc, int refclk) +static const struct cdv_intel_limit_t *cdv_intel_limit(struct drm_crtc *crtc, + int refclk) { const struct cdv_intel_limit_t *limit; if (cdv_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { /* - * Now only single-channel LVDS is supported on CDV. If it is - * incorrect, please add the dual-channel LVDS. - */ + * Now only single-channel LVDS is supported on CDV. If it is + * incorrect, please add the dual-channel LVDS. + */ if (refclk == 96000) limit = &cdv_intel_limits[CDV_LIMIT_SINGLE_LVDS_96]; - else + else limit = &cdv_intel_limits[CDV_LIMIT_SINGLE_LVDS_100]; } else { if (refclk == 27000) @@ -384,7 +384,7 @@ static const struct cdv_intel_limit_t *cdv_intel_limit(struct drm_crtc *crtc, in } /* m1 is reserved as 0 in CDV, n is a ring counter */ -static void cdv_intel_clock(struct drm_device *dev, +static void cdv_intel_clock(struct drm_device *dev, int refclk, struct cdv_intel_clock_t *clock) { clock->m = clock->m2 + 2; @@ -448,19 +448,22 @@ static bool cdv_intel_find_best_PLL(struct drm_crtc *crtc, int target, memset(best_clock, 0, sizeof(*best_clock)); clock.m1 = 0; - /* m1 is reserved as 0 in CDV, n is a ring counter. So skip the m1 loop */ + /* m1 is reserved as 0 in CDV, n is a ring counter. + So skip the m1 loop */ for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) { for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) { - for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; - clock.p1++) { + for (clock.p1 = limit->p1.min; + clock.p1 <= limit->p1.max; + clock.p1++) { int this_err; cdv_intel_clock(dev, refclk, &clock); - if (!cdv_intel_PLL_is_valid(crtc, limit, &clock)) + if (!cdv_intel_PLL_is_valid(crtc, + limit, &clock)) continue; - + this_err = abs(clock.dot - target); if (this_err < err) { *best_clock = clock; @@ -533,7 +536,7 @@ int cdv_intel_pipe_set_base(struct drm_crtc *crtc, REG_WRITE(dspcntr_reg, dspcntr); dev_dbg(dev->dev, - "Writing base %08lX %08lX %d %d\n", start, offset, x, y); + "Writing base %08lX %08lX %d %d\n", start, offset, x, y); REG_WRITE(dspbase, offset); REG_READ(dspbase); @@ -808,7 +811,7 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc, dpll |= DPLLB_MODE_LVDS; else dpll |= DPLLB_MODE_DAC_SERIAL; - //dpll |= (2 << 11); + /* dpll |= (2 << 11); */ /* setup pipeconf */ pipeconf = REG_READ(pipeconf_reg); @@ -824,14 +827,12 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc, dspcntr |= DISPLAY_PLANE_ENABLE; pipeconf |= PIPEACONF_ENABLE; - REG_WRITE(dpll_reg, - dpll | DPLL_VGA_MODE_DIS | - DPLL_SYNCLOCK_ENABLE); - REG_READ(dpll_reg); + REG_WRITE(dpll_reg, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); + REG_READ(dpll_reg); cdv_dpll_set_clock_cdv(dev, crtc, &clock); - udelay(150); + udelay(150); /* The LVDS pin pair needs to be on before the DPLLs are enabled. @@ -864,7 +865,6 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc, dpll |= DPLL_VCO_ENABLE; - /* Disable the panel fitter if it was on our pipe */ if (cdv_intel_panel_fitter_pipe(dev) == pipe) REG_WRITE(PFIT_CONTROL, 0); @@ -873,24 +873,19 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc, drm_mode_debug_printmodeline(mode); REG_WRITE(dpll_reg, - (REG_READ(dpll_reg) & ~DPLL_LOCK) | - DPLL_VCO_ENABLE); - REG_READ(dpll_reg); + (REG_READ(dpll_reg) & ~DPLL_LOCK) | DPLL_VCO_ENABLE); + REG_READ(dpll_reg); /* Wait for the clocks to stabilize. */ - udelay(150); /* 42 usec w/o calibration, 110 with. rounded up. */ - - if (!(REG_READ(dpll_reg) & DPLL_LOCK)) { - dev_err(dev->dev, "Failed to get DPLL lock\n"); - return -EBUSY; - } - - { - int sdvo_pixel_multiply = - adjusted_mode->clock / mode->clock; - REG_WRITE(dpll_md_reg, - (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | - ((sdvo_pixel_multiply - - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT)); + udelay(150); /* 42 usec w/o calibration, 110 with. rounded up. */ + + if (!(REG_READ(dpll_reg) & DPLL_LOCK)) { + dev_err(dev->dev, "Failed to get DPLL lock\n"); + return -EBUSY; + } + + { + int sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; + REG_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT)); } REG_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) | @@ -956,10 +951,10 @@ void cdv_intel_crtc_load_lut(struct drm_crtc *crtc) palreg = PALETTE_C; break; default: - dev_err(dev->dev, "Illegal Pipe Number. \n"); + dev_err(dev->dev, "Illegal Pipe Number.\n"); return; } - + if (gma_power_begin(dev, false)) { for (i = 0; i < 256; i++) { REG_WRITE(palreg + 4 * i, @@ -1276,7 +1271,7 @@ static int cdv_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) } static void cdv_intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, - u16 *green, u16 *blue, uint32_t start, uint32_t size) + u16 *green, u16 *blue, uint32_t start, uint32_t size) { struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); int i; @@ -1294,10 +1289,10 @@ static void cdv_intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, static int cdv_crtc_set_config(struct drm_mode_set *set) { int ret = 0; - struct drm_device * dev = set->crtc->dev; - struct drm_psb_private * dev_priv = dev->dev_private; + struct drm_device *dev = set->crtc->dev; + struct drm_psb_private *dev_priv = dev->dev_private; - if(!dev_priv->rpm_enabled) + if (!dev_priv->rpm_enabled) return drm_crtc_helper_set_config(set); pm_runtime_forbid(&dev->pdev->dev); @@ -1489,7 +1484,7 @@ void cdv_intel_cursor_init(struct drm_device *dev, int pipe) { uint32_t control; uint32_t base; - + switch (pipe) { case 0: control = CURACNTR; diff --git a/drivers/staging/gma500/cdv_intel_hdmi.c b/drivers/staging/gma500/cdv_intel_hdmi.c index 5acfb37..7f86c0c 100644 --- a/drivers/staging/gma500/cdv_intel_hdmi.c +++ b/drivers/staging/gma500/cdv_intel_hdmi.c @@ -59,8 +59,8 @@ struct mid_intel_hdmi_priv { }; static void cdv_hdmi_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) { struct drm_device *dev = encoder->dev; struct psb_intel_output *output = enc_to_psb_intel_output(encoder); @@ -83,7 +83,7 @@ static void cdv_hdmi_mode_set(struct drm_encoder *encoder, hdmib |= HDMI_AUDIO_ENABLE; hdmib |= HDMI_NULL_PACKETS_DURING_VSYNC; } - + REG_WRITE(hdmi_priv->hdmi_reg, hdmib); REG_READ(hdmi_priv->hdmi_reg); } @@ -92,8 +92,7 @@ static bool cdv_hdmi_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { - - return true; + return true; } static void cdv_hdmi_dpms(struct drm_encoder *encoder, int mode) @@ -105,11 +104,10 @@ static void cdv_hdmi_dpms(struct drm_encoder *encoder, int mode) hdmib = REG_READ(hdmi_priv->hdmi_reg); - if (mode != DRM_MODE_DPMS_ON) { + if (mode != DRM_MODE_DPMS_ON) REG_WRITE(hdmi_priv->hdmi_reg, hdmib & ~HDMIB_PORT_EN); - } else { + else REG_WRITE(hdmi_priv->hdmi_reg, hdmib | HDMIB_PORT_EN); - } REG_READ(hdmi_priv->hdmi_reg); } @@ -132,11 +130,12 @@ static void cdv_hdmi_restore(struct drm_connector *connector) REG_READ(hdmi_priv->hdmi_reg); } -static enum drm_connector_status cdv_hdmi_detect(struct drm_connector *connector, bool force) +static enum drm_connector_status cdv_hdmi_detect( + struct drm_connector *connector, bool force) { struct drm_device *dev = connector->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - struct psb_intel_output *psb_intel_output = to_psb_intel_output(connector); + struct psb_intel_output *psb_intel_output = + to_psb_intel_output(connector); struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_output->dev_priv; struct edid *edid = NULL; enum drm_connector_status status = connector_status_disconnected; @@ -149,8 +148,10 @@ static enum drm_connector_status cdv_hdmi_detect(struct drm_connector *connector if (edid) { if (edid->input & DRM_EDID_INPUT_DIGITAL) { status = connector_status_connected; - hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); - hdmi_priv->has_hdmi_audio = drm_detect_monitor_audio(edid); + hdmi_priv->has_hdmi_sink = + drm_detect_hdmi_monitor(edid); + hdmi_priv->has_hdmi_audio = + drm_detect_monitor_audio(edid); } psb_intel_output->base.display_info.raw_edid = NULL; @@ -171,7 +172,7 @@ static int cdv_hdmi_set_property(struct drm_connector *connector, uint64_t curValue; if (!crtc) - return -1; + return -1; switch (value) { case DRM_MODE_SCALE_FULLSCREEN: @@ -181,17 +182,19 @@ static int cdv_hdmi_set_property(struct drm_connector *connector, case DRM_MODE_SCALE_ASPECT: break; default: - return -1; + return -1; } - if (drm_connector_property_get_value(connector, property, &curValue)) - return -1; + if (drm_connector_property_get_value(connector, + property, &curValue)) + return -1; if (curValue == value) - return 0; + return 0; - if (drm_connector_property_set_value(connector, property, value)) - return -1; + if (drm_connector_property_set_value(connector, + property, value)) + return -1; centre = (curValue == DRM_MODE_SCALE_NO_SCALE) || (value == DRM_MODE_SCALE_NO_SCALE); @@ -203,9 +206,10 @@ static int cdv_hdmi_set_property(struct drm_connector *connector, encoder->crtc->x, encoder->crtc->y, encoder->crtc->fb)) return -1; } else { - struct drm_encoder_helper_funcs *helpers = encoder->helper_private; + struct drm_encoder_helper_funcs *helpers + = encoder->helper_private; helpers->mode_set(encoder, &crtc->saved_mode, - &crtc->saved_adjusted_mode); + &crtc->saved_adjusted_mode); } } } @@ -217,7 +221,8 @@ static int cdv_hdmi_set_property(struct drm_connector *connector, */ static int cdv_hdmi_get_modes(struct drm_connector *connector) { - struct psb_intel_output *psb_intel_output = to_psb_intel_output(connector); + struct psb_intel_output *psb_intel_output = + to_psb_intel_output(connector); struct edid *edid = NULL; int ret = 0; @@ -250,8 +255,8 @@ static int cdv_hdmi_mode_valid(struct drm_connector *connector, return MODE_NO_INTERLACE; /* - * FIXME: fornow we limit the size to 1680x1050 on CDV, otherwise it will - * go beyond the stolen memory size allocated to the Framebuffer + * FIXME: for now we limit the size to 1680x1050 on CDV, otherwise it + * will go beyond the stolen memory size allocated to the framebuffer */ if (mode->hdisplay > 1680) return MODE_PANEL; @@ -280,7 +285,8 @@ static const struct drm_encoder_helper_funcs cdv_hdmi_helper_funcs = { .commit = psb_intel_encoder_commit, }; -static const struct drm_connector_helper_funcs cdv_hdmi_connector_helper_funcs = { +static const struct drm_connector_helper_funcs + cdv_hdmi_connector_helper_funcs = { .get_modes = cdv_hdmi_get_modes, .mode_valid = cdv_hdmi_mode_valid, .best_encoder = psb_intel_best_encoder, @@ -296,7 +302,8 @@ static const struct drm_connector_funcs cdv_hdmi_connector_funcs = { .destroy = cdv_hdmi_destroy, }; -void cdv_hdmi_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int reg) +void cdv_hdmi_init(struct drm_device *dev, + struct psb_intel_mode_device *mode_dev, int reg) { struct psb_intel_output *psb_intel_output; struct drm_connector *connector; @@ -334,7 +341,8 @@ void cdv_hdmi_init(struct drm_device *dev, struct psb_intel_mode_device *mode_de connector->interlace_allowed = false; connector->doublescan_allowed = false; - drm_connector_attach_property(connector, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); + drm_connector_attach_property(connector, + dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); switch (reg) { case SDVOB: @@ -350,19 +358,15 @@ void cdv_hdmi_init(struct drm_device *dev, struct psb_intel_mode_device *mode_de } psb_intel_output->ddc_bus = psb_intel_i2c_create(dev, - ddc_bus, (reg == SDVOB) ? "HDMIB":"HDMIC"); + ddc_bus, (reg == SDVOB) ? "HDMIB" : "HDMIC"); - if (psb_intel_output->ddc_bus) { - /* HACKS_JLIU7 */ - DRM_INFO("Enter cdv_hdmi_init, i2c_adapter is availabe.\n"); - - } else { - printk(KERN_ALERT "No ddc adapter available!\n"); + if (!psb_intel_output->ddc_bus) { + dev_err(dev->dev, "No ddc adapter available!\n"); goto failed_ddc; } - psb_intel_output->hdmi_i2c_adapter = &(psb_intel_output->ddc_bus->adapter); - - hdmi_priv->dev = dev; + psb_intel_output->hdmi_i2c_adapter = + &(psb_intel_output->ddc_bus->adapter); + hdmi_priv->dev = dev; drm_sysfs_connector_add(connector); return; diff --git a/drivers/staging/gma500/cdv_intel_lvds.c b/drivers/staging/gma500/cdv_intel_lvds.c index d9b2290..19ad9bb 100644 --- a/drivers/staging/gma500/cdv_intel_lvds.c +++ b/drivers/staging/gma500/cdv_intel_lvds.c @@ -11,7 +11,7 @@ * more details. * * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., + * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. * * Authors: @@ -200,7 +200,7 @@ static void cdv_intel_lvds_set_power(struct drm_device *dev, u32 pp_status; if (!gma_power_begin(dev, true)) - return; + return; if (on) { REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | @@ -390,7 +390,8 @@ static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder, * This connector should only have * been set up if the LVDS was actually connected anyway. */ -static enum drm_connector_status cdv_intel_lvds_detect(struct drm_connector *connector, bool force) +static enum drm_connector_status cdv_intel_lvds_detect( + struct drm_connector *connector, bool force) { return connector_status_connected; } @@ -503,21 +504,24 @@ int cdv_intel_lvds_set_property(struct drm_connector *connector, return -1; else { #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE - struct drm_psb_private *dev_priv = + struct drm_psb_private *dev_priv = encoder->dev->dev_private; - struct backlight_device *bd = dev_priv->backlight_device; + struct backlight_device *bd = + dev_priv->backlight_device; bd->props.brightness = value; backlight_update_status(bd); #endif } } else if (!strcmp(property->name, "DPMS") && encoder) { - struct drm_encoder_helper_funcs *helpers = encoder->helper_private; + struct drm_encoder_helper_funcs *helpers = + encoder->helper_private; helpers->dpms(encoder, value); } return 0; } -static const struct drm_encoder_helper_funcs cdv_intel_lvds_helper_funcs = { +static const struct drm_encoder_helper_funcs + cdv_intel_lvds_helper_funcs = { .dpms = cdv_intel_lvds_encoder_dpms, .mode_fixup = cdv_intel_lvds_mode_fixup, .prepare = cdv_intel_lvds_prepare, @@ -526,7 +530,7 @@ static const struct drm_encoder_helper_funcs cdv_intel_lvds_helper_funcs = { }; static const struct drm_connector_helper_funcs - cdv_intel_lvds_connector_helper_funcs = { + cdv_intel_lvds_connector_helper_funcs = { .get_modes = cdv_intel_lvds_get_modes, .mode_valid = cdv_intel_lvds_mode_valid, .best_encoder = psb_intel_best_encoder, -- cgit v0.10.2 From e913972423fc6ec0eee33469f691f9cce3a47680 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:44:34 +0100 Subject: gma500: tidy the mrst files Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/mrst_device.c b/drivers/staging/gma500/mrst_device.c index 195a25b..436580d 100644 --- a/drivers/staging/gma500/mrst_device.c +++ b/drivers/staging/gma500/mrst_device.c @@ -155,7 +155,7 @@ int mrst_backlight_init(struct drm_device *dev) mrst_backlight_device = backlight_device_register("mrst-bl", NULL, (void *)dev, &mrst_ops, &props); - + if (IS_ERR(mrst_backlight_device)) return PTR_ERR(mrst_backlight_device); @@ -367,7 +367,7 @@ const struct psb_ops mrst_chip_ops = { #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE .backlight_init = mrst_backlight_init, #endif - + .init_pm = mrst_init_pm, .save_regs = mrst_save_display_registers, .restore_regs = mrst_restore_display_registers, -- cgit v0.10.2 From 9fce3623856d5998e01807ee7aa8991665ebf652 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:44:52 +0100 Subject: gma500; clean mid files Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/mid_bios.c b/drivers/staging/gma500/mid_bios.c index 9a7731c..8cfe301 100644 --- a/drivers/staging/gma500/mid_bios.c +++ b/drivers/staging/gma500/mid_bios.c @@ -237,19 +237,17 @@ static void mid_get_vbt_data(struct drm_psb_private *dev_priv) dev_err(dev->dev, "Unknown revision of GCT!\n"); vbt->size = 0; } - if (IS_MFLD(dev_priv->dev)){ + if (IS_MFLD(dev_priv->dev)) { if (panel_id == GCT_DETECT) { if (dev_priv->gct_data.bpi == 2) { dev_info(dev->dev, "[GFX] PYR Panel Detected\n"); dev_priv->panel_id = PYR_CMD; panel_id = PYR_CMD; - } - else if(dev_priv->gct_data.bpi == 0) { + } else if (dev_priv->gct_data.bpi == 0) { dev_info(dev->dev, "[GFX] TMD Panel Detected.\n"); dev_priv->panel_id = TMD_VID; panel_id = TMD_VID; - } - else { + } else { dev_info(dev->dev, "[GFX] Default Panel (TPO)\n"); dev_priv->panel_id = TPO_CMD; panel_id = TPO_CMD; @@ -268,4 +266,4 @@ int mid_chip_setup(struct drm_device *dev) mid_get_vbt_data(dev_priv); mid_get_pci_revID(dev_priv); return 0; -} \ No newline at end of file +} -- cgit v0.10.2 From 983e4d3432c5b5b55329347706fbd4e6f88d6760 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Jul 2011 09:45:07 +0100 Subject: gma500: Fix unused variable in cdv support Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/cdv_intel_hdmi.c b/drivers/staging/gma500/cdv_intel_hdmi.c index 7f86c0c..cbca2b0 100644 --- a/drivers/staging/gma500/cdv_intel_hdmi.c +++ b/drivers/staging/gma500/cdv_intel_hdmi.c @@ -133,7 +133,6 @@ static void cdv_hdmi_restore(struct drm_connector *connector) static enum drm_connector_status cdv_hdmi_detect( struct drm_connector *connector, bool force) { - struct drm_device *dev = connector->dev; struct psb_intel_output *psb_intel_output = to_psb_intel_output(connector); struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_output->dev_priv; -- cgit v0.10.2 From fc5ace7ed2a58e32047abf65ff8b5a6432e92fac Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 8 Jul 2011 09:45:19 +0100 Subject: Staging: gma500: typo in array initialization There is a comma missing here between the strings so they were concatenated by mistake. Signed-off-by: Dan Carpenter Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/mdfld_dsi_pkg_sender.c b/drivers/staging/gma500/mdfld_dsi_pkg_sender.c index 9198aa8..9b543eb 100644 --- a/drivers/staging/gma500/mdfld_dsi_pkg_sender.c +++ b/drivers/staging/gma500/mdfld_dsi_pkg_sender.c @@ -62,7 +62,7 @@ static const char * const dsi_errors[] = { "RX Prot Violation", "HS Generic Write FIFO Full", "LP Generic Write FIFO Full", - "Generic Read Data Avail" + "Generic Read Data Avail", "Special Packet Sent", "Tearing Effect", }; -- cgit v0.10.2 From d75758b3d12b45fc7535083a968b3a99935c9d9a Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 8 Jul 2011 09:45:32 +0100 Subject: gma500: reversed test in mdfld_dbi_dsr_exit() We should only cleanup "dsr_info" if it's non-NULL obviously and not the other way around. Signed-off-by: Dan Carpenter Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/mdfld_dsi_dbi.c b/drivers/staging/gma500/mdfld_dsi_dbi.c index 9d2d97d..4897345 100644 --- a/drivers/staging/gma500/mdfld_dsi_dbi.c +++ b/drivers/staging/gma500/mdfld_dsi_dbi.c @@ -642,7 +642,7 @@ void mdfld_dbi_dsr_exit(struct drm_device *dev) struct drm_psb_private *dev_priv = dev->dev_private; struct mdfld_dbi_dsr_info *dsr_info = dev_priv->dbi_dsr_info; - if (!dsr_info) { + if (dsr_info) { del_timer_sync(&dsr_info->dsr_timer); kfree(dsr_info); dev_priv->dbi_dsr_info = NULL; -- cgit v0.10.2 From c3314080fede7b7ee84c2aa7001f72d46e884787 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 8 Jul 2011 09:45:49 +0100 Subject: gma500: remove unneeded check in mdfld_crtc_mode_set() The list cursor is never NULL in a list_for_each_entry() loop. Signed-off-by: Dan Carpenter Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/gma500/mdfld_intel_display.c b/drivers/staging/gma500/mdfld_intel_display.c index 1447a5b..fa84990 100644 --- a/drivers/staging/gma500/mdfld_intel_display.c +++ b/drivers/staging/gma500/mdfld_intel_display.c @@ -1093,8 +1093,6 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc, memcpy(&psb_intel_crtc->saved_adjusted_mode, adjusted_mode, sizeof(struct drm_display_mode)); list_for_each_entry(connector, &mode_config->connector_list, head) { - if(!connector) - continue; encoder = connector->encoder; -- cgit v0.10.2 From cbecb8bf564f706e7b4346d54be8a39f0309b91c Mon Sep 17 00:00:00 2001 From: Oren Weil Date: Thu, 7 Jul 2011 16:02:45 +0300 Subject: staging: mei: reordering the exit module cleanup keeping the exit flow in a reverse order then the init flow. Signed-off-by: Oren Weil Acked-by: Tomas Winkler Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/mei/main.c b/drivers/staging/mei/main.c index 8341a78..de8825f 100644 --- a/drivers/staging/mei/main.c +++ b/drivers/staging/mei/main.c @@ -1326,9 +1326,9 @@ module_init(mei_init_module); */ static void __exit mei_exit_module(void) { - pci_unregister_driver(&mei_driver); mei_sysfs_device_remove(); mei_unregister_cdev(); + pci_unregister_driver(&mei_driver); pr_debug("mei: Driver unloaded successfully.\n"); } -- cgit v0.10.2 From b041267ea819054aa9b406efc94fe8821ea2e67b Mon Sep 17 00:00:00 2001 From: Ravishankar Date: Thu, 7 Jul 2011 17:35:27 +0530 Subject: Staging: comedi: fix brace and printk coding style issue in serial2002.c This is a patch to the serial2002.c file that fixes up a brace and printk warning found by the checkpatch.pl tool Signed-off-by: Ravishankar Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/serial2002.c b/drivers/staging/comedi/drivers/serial2002.c index ebfce33..8041d8f 100644 --- a/drivers/staging/comedi/drivers/serial2002.c +++ b/drivers/staging/comedi/drivers/serial2002.c @@ -38,7 +38,7 @@ Status: in development #include #include -#include +#include #include #include #include @@ -192,9 +192,8 @@ static int tty_read(struct file *f, int timeout) elapsed = (1000000 * (now.tv_sec - start.tv_sec) + now.tv_usec - start.tv_usec); - if (elapsed > timeout) { + if (elapsed > timeout) break; - } set_current_state(TASK_INTERRUPTIBLE); schedule_timeout(((timeout - elapsed) * HZ) / 10000); @@ -204,9 +203,8 @@ static int tty_read(struct file *f, int timeout) unsigned char ch; f->f_pos = 0; - if (f->f_op->read(f, &ch, 1, &f->f_pos) == 1) { + if (f->f_op->read(f, &ch, 1, &f->f_pos) == 1) result = ch; - } } } else { /* Device does not support poll, busy wait */ @@ -215,9 +213,8 @@ static int tty_read(struct file *f, int timeout) unsigned char ch; retries++; - if (retries >= timeout) { + if (retries >= timeout) break; - } f->f_pos = 0; if (f->f_op->read(f, &ch, 1, &f->f_pos) == 1) { @@ -329,7 +326,7 @@ static struct serial_data serial_read(struct file *f, int timeout) length++; if (data < 0) { - printk("serial2002 error\n"); + printk(KERN_ERR "serial2002 error\n"); break; } else if (data & 0x80) { result.value = (result.value << 7) | (data & 0x7f); @@ -402,7 +399,7 @@ static int serial_2002_open(struct comedi_device *dev) devpriv->tty = filp_open(port, O_RDWR, 0); if (IS_ERR(devpriv->tty)) { result = (int)PTR_ERR(devpriv->tty); - printk("serial_2002: file open error = %d\n", result); + printk(KERN_ERR "serial_2002: file open error = %d\n", result); } else { struct config_t { -- cgit v0.10.2 From e9d1cf89ed5561adc1d36aea6d1349d12dfedd74 Mon Sep 17 00:00:00 2001 From: Ravishankar Date: Thu, 7 Jul 2011 19:53:04 +0530 Subject: Staging: comedi: fix brace coding style issue in serial2002.c This is a patch to the serial2002.c file that fixes up a brace warning found by the checkpatch.pl tool Signed-off-by: Ravishankar Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/serial2002.c b/drivers/staging/comedi/drivers/serial2002.c index 8041d8f..ade2202 100644 --- a/drivers/staging/comedi/drivers/serial2002.c +++ b/drivers/staging/comedi/drivers/serial2002.c @@ -513,9 +513,8 @@ static int serial_2002_open(struct comedi_device *dev) } break; } - if (sign) { + if (sign) min = -min; - } cur_config[channel].min = min; } @@ -554,9 +553,8 @@ static int serial_2002_open(struct comedi_device *dev) } break; } - if (sign) { + if (sign) max = -max; - } cur_config[channel].max = max; } @@ -619,9 +617,8 @@ static int serial_2002_open(struct comedi_device *dev) int j, chan; for (chan = 0, j = 0; j < 32; j++) { - if (c[j].kind == kind) { + if (c[j].kind == kind) chan++; - } } s = &dev->subdevices[i]; s->n_chan = chan; @@ -646,9 +643,8 @@ static int serial_2002_open(struct comedi_device *dev) } for (chan = 0, j = 0; j < 32; j++) { if (c[j].kind == kind) { - if (mapping) { + if (mapping) mapping[chan] = j; - } if (range) { range[j].length = 1; range[j].range.min = @@ -701,9 +697,8 @@ err_alloc_configs: static void serial_2002_close(struct comedi_device *dev) { - if (!IS_ERR(devpriv->tty) && (devpriv->tty != 0)) { + if (!IS_ERR(devpriv->tty) && (devpriv->tty != 0)) filp_close(devpriv->tty, 0); - } } static int serial2002_di_rinsn(struct comedi_device *dev, @@ -720,9 +715,8 @@ static int serial2002_di_rinsn(struct comedi_device *dev, poll_digital(devpriv->tty, chan); while (1) { read = serial_read(devpriv->tty, 1000); - if (read.kind != is_digital || read.index == chan) { + if (read.kind != is_digital || read.index == chan) break; - } } data[n] = read.value; } @@ -762,9 +756,8 @@ static int serial2002_ai_rinsn(struct comedi_device *dev, poll_channel(devpriv->tty, chan); while (1) { read = serial_read(devpriv->tty, 1000); - if (read.kind != is_channel || read.index == chan) { + if (read.kind != is_channel || read.index == chan) break; - } } data[n] = read.value; } @@ -798,9 +791,8 @@ static int serial2002_ao_rinsn(struct comedi_device *dev, int n; int chan = CR_CHAN(insn->chanspec); - for (n = 0; n < insn->n; n++) { + for (n = 0; n < insn->n; n++) data[n] = devpriv->ao_readback[chan]; - } return n; } @@ -819,9 +811,8 @@ static int serial2002_ei_rinsn(struct comedi_device *dev, poll_channel(devpriv->tty, chan); while (1) { read = serial_read(devpriv->tty, 1000); - if (read.kind != is_channel || read.index == chan) { + if (read.kind != is_channel || read.index == chan) break; - } } data[n] = read.value; } @@ -835,9 +826,8 @@ static int serial2002_attach(struct comedi_device *dev, printk("comedi%d: serial2002: ", dev->minor); dev->board_name = thisboard->name; - if (alloc_private(dev, sizeof(struct serial2002_private)) < 0) { + if (alloc_private(dev, sizeof(struct serial2002_private)) < 0) return -ENOMEM; - } dev->open = serial_2002_open; dev->close = serial_2002_close; devpriv->port = it->options[0]; -- cgit v0.10.2 From 33e73e0085089a2653cd638c990996b90833819b Mon Sep 17 00:00:00 2001 From: Ravishankar Date: Thu, 7 Jul 2011 21:14:43 +0530 Subject: Staging: comedi: fix warning issue in unioxx5.c This is a patch to the unioxx5.c file that fixes up a warning found by the checkpatch.pl tool Signed-off-by: Ravishankar Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/unioxx5.c b/drivers/staging/comedi/drivers/unioxx5.c index 598884e..89e62aa 100644 --- a/drivers/staging/comedi/drivers/unioxx5.c +++ b/drivers/staging/comedi/drivers/unioxx5.c @@ -75,8 +75,10 @@ Devices: [Fastwel] UNIOxx-5 (unioxx5), /* 'private' structure for each subdevice */ struct unioxx5_subd_priv { int usp_iobase; - unsigned char usp_module_type[12]; /* 12 modules. each can be 70L or 73L */ - unsigned char usp_extra_data[12][4]; /* for saving previous written value for analog modules */ + /* 12 modules. each can be 70L or 73L */ + unsigned char usp_module_type[12]; + /* for saving previous written value for analog modules */ + unsigned char usp_extra_data[12][4]; unsigned char usp_prev_wr_val[3]; /* previous written value */ unsigned char usp_prev_cn_val[3]; /* previous channel value */ }; @@ -169,7 +171,7 @@ static int unioxx5_attach(struct comedi_device *dev, return -1; } - printk("attached\n"); + printk(KERN_INFO "attached\n"); return 0; } @@ -181,7 +183,8 @@ static int unioxx5_subdev_read(struct comedi_device *dev, int channel, type; channel = CR_CHAN(insn->chanspec); - type = usp->usp_module_type[channel / 2]; /* defining module type(analog or digital) */ + /* defining module type(analog or digital) */ + type = usp->usp_module_type[channel / 2]; if (type == MODULE_DIGITAL) { if (!__unioxx5_digital_read(usp, data, channel, dev->minor)) @@ -202,7 +205,8 @@ static int unioxx5_subdev_write(struct comedi_device *dev, int channel, type; channel = CR_CHAN(insn->chanspec); - type = usp->usp_module_type[channel / 2]; /* defining module type(analog or digital) */ + /* defining module type(analog or digital) */ + type = usp->usp_module_type[channel / 2]; if (type == MODULE_DIGITAL) { if (!__unioxx5_digital_write(usp, data, channel, dev->minor)) @@ -261,9 +265,12 @@ static int unioxx5_insn_config(struct comedi_device *dev, * change channel type on input or output) * \* */ outb(1, usp->usp_iobase + 0); - outb(flags, usp->usp_iobase + channel_offset); /* changes type of _one_ channel */ - outb(0, usp->usp_iobase + 0); /* sets channels bank to 0(allows directly input/output) */ - usp->usp_prev_cn_val[channel_offset - 1] = flags; /* saves written value */ + /* changes type of _one_ channel */ + outb(flags, usp->usp_iobase + channel_offset); + /* sets channels bank to 0(allows directly input/output) */ + outb(0, usp->usp_iobase + 0); + /* saves written value */ + usp->usp_prev_cn_val[channel_offset - 1] = flags; return 0; } @@ -304,14 +311,15 @@ static int __unioxx5_subdev_init(struct comedi_subdevice *subdev, } usp->usp_iobase = subdev_iobase; - printk("comedi%d: |", minor); + printk(KERN_INFO "comedi%d: |", minor); /* defining modules types */ for (i = 0; i < 12; i++) { to = 10000; __unioxx5_analog_config(usp, i * 2); - outb(i + 1, subdev_iobase + 5); /* sends channel number to card */ + /* sends channel number to card */ + outb(i + 1, subdev_iobase + 5); outb('H', subdev_iobase + 6); /* requests EEPROM world */ while (!(inb(subdev_iobase + 0) & TxBE)) ; /* waits while writting will be allowed */ @@ -346,9 +354,10 @@ static int __unioxx5_subdev_init(struct comedi_subdevice *subdev, subdev->range_table = &range_digital; subdev->insn_read = unioxx5_subdev_read; subdev->insn_write = unioxx5_subdev_write; - subdev->insn_config = unioxx5_insn_config; /* for digital modules only!!! */ + /* for digital modules only!!! */ + subdev->insn_config = unioxx5_insn_config; - printk("subdevice configured\n"); + printk(KERN_INFO "subdevice configured\n"); return 0; } @@ -367,7 +376,8 @@ static int __unioxx5_digital_write(struct unioxx5_subd_priv *usp, return 0; } - val = usp->usp_prev_wr_val[channel_offset - 1]; /* getting previous written value */ + /* getting previous written value */ + val = usp->usp_prev_wr_val[channel_offset - 1]; if (*data) val |= mask; @@ -375,7 +385,8 @@ static int __unioxx5_digital_write(struct unioxx5_subd_priv *usp, val &= ~mask; outb(val, usp->usp_iobase + channel_offset); - usp->usp_prev_wr_val[channel_offset - 1] = val; /* saving new written value */ + /* saving new written value */ + usp->usp_prev_wr_val[channel_offset - 1] = val; return 1; } @@ -399,7 +410,6 @@ static int __unioxx5_digital_read(struct unioxx5_subd_priv *usp, if (channel_offset > 1) channel -= 2 << channel_offset; /* this operation is created for correct readed value to 0 or 1 */ - *data >>= channel; return 1; } @@ -444,7 +454,8 @@ static int __unioxx5_analog_write(struct unioxx5_subd_priv *usp, usp->usp_extra_data[module][i] = (unsigned char)((*data & 0xFF00) >> 8); /* while(!((inb(usp->usp_iobase + 0)) & TxBE)); */ - outb(module + 1, usp->usp_iobase + 5); /* sending module number to card(1 .. 12) */ + /* sending module number to card(1 .. 12) */ + outb(module + 1, usp->usp_iobase + 5); outb('W', usp->usp_iobase + 6); /* sends (W)rite command to module */ /* sending for bytes to module(one byte per cycle iteration) */ @@ -475,7 +486,8 @@ static int __unioxx5_analog_read(struct unioxx5_subd_priv *usp, } __unioxx5_analog_config(usp, channel); - outb(module_no + 1, usp->usp_iobase + 5); /* sends module number to card(1 .. 12) */ + /* sends module number to card(1 .. 12) */ + outb(module_no + 1, usp->usp_iobase + 5); outb('V', usp->usp_iobase + 6); /* sends to module (V)erify command */ control = inb(usp->usp_iobase); /* get control register byte */ -- cgit v0.10.2 From 6394c5a0379d0733396edd9452e31282e0684a3c Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Thu, 7 Jul 2011 10:49:54 -0700 Subject: staging: fix usbip printk format warning Fix usbip printk format warning for size_t: drivers/staging/usbip/stub_tx.c:236: warning: format '%lu' expects type 'long unsigned int', but argument 4 has type 'size_t' Signed-off-by: Randy Dunlap Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/stub_tx.c b/drivers/staging/usbip/stub_tx.c index 1cbae44..023fda3 100644 --- a/drivers/staging/usbip/stub_tx.c +++ b/drivers/staging/usbip/stub_tx.c @@ -231,7 +231,7 @@ static int stub_send_ret_submit(struct stub_device *sdev) if (txsize != sizeof(pdu_header) + urb->actual_length) { dev_err(&sdev->interface->dev, "actual length of urb %d does not " - "match iso packet sizes %lu\n", + "match iso packet sizes %zu\n", urb->actual_length, txsize-sizeof(pdu_header)); kfree(iov); -- cgit v0.10.2 From e2ec6b4e391a877a9069e1ccc824c5c18dd62eb0 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:50 -0700 Subject: staging: usbip: userspace: usbipd: major cleanup of daemon Reorganize, rename [for clarity and to remove stub_driver references], modify output messages, and cleanup coding style; nevertheless, the actual implementation is pretty much untouched. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index ef92f3b..aa92623 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -1,6 +1,19 @@ /* + * Copyright (C) 2011 matt mooney + * 2005-2007 Takahiro Hirofuchi * - * Copyright (C) 2005-2007 Takahiro Hirofuchi + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ #ifdef HAVE_CONFIG_H @@ -31,62 +44,153 @@ #include "usbip_common.h" #include "usbip_network.h" -static const char version[] = PACKAGE_STRING; +#undef PROGNAME +#define PROGNAME "usbipd" +#define MAXSOCKFD 20 + +GMainLoop *main_loop; -static int send_reply_devlist(int sockfd) +static const char usbip_version_string[] = PACKAGE_STRING; + +static const char usbipd_help_string[] = + "usage: usbipd [options] \n" + " -D, --daemon \n" + " Run as a daemon process. \n" + " \n" + " -d, --debug \n" + " Print debugging information. \n" + " \n" + " -h, --help \n" + " Print this help. \n" + " \n" + " -v, --version \n" + " Show version. \n"; + +static void usbipd_help(void) { - int ret; + printf("%s\n", usbipd_help_string); +} + +static int recv_request_import(int sockfd) +{ + struct op_import_request req; + struct op_common reply; struct usbip_exported_device *edev; - struct op_devlist_reply reply; + struct usbip_usb_device pdu_udev; + int found = 0; + int error = 0; + int rc; + memset(&req, 0, sizeof(req)); + memset(&reply, 0, sizeof(reply)); - reply.ndev = 0; + rc = usbip_recv(sockfd, &req, sizeof(req)); + if (rc < 0) { + dbg("usbip_recv failed: import request"); + return -1; + } + PACK_OP_IMPORT_REQUEST(0, &req); - /* how many devices are exported ? */ - dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { - reply.ndev += 1; + dlist_for_each_data(host_driver->edev_list, edev, + struct usbip_exported_device) { + if (!strncmp(req.busid, edev->udev.busid, SYSFS_BUS_ID_SIZE)) { + info("found requested device: %s", req.busid); + found = 1; + break; + } } - dbg("%d devices are exported", reply.ndev); + if (found) { + /* should set TCP_NODELAY for usbip */ + usbip_set_nodelay(sockfd); - ret = usbip_send_op_common(sockfd, OP_REP_DEVLIST, ST_OK); - if (ret < 0) { - err("send op_common"); - return ret; + /* export device needs a TCP/IP socket descriptor */ + rc = usbip_host_export_device(edev, sockfd); + if (rc < 0) + error = 1; + } else { + info("requested device not found: %s", req.busid); + error = 1; } - PACK_OP_DEVLIST_REPLY(1, &reply); - ret = usbip_send(sockfd, (void *) &reply, sizeof(reply)); - if (ret < 0) { - err("send op_devlist_reply"); - return ret; + rc = usbip_send_op_common(sockfd, OP_REP_IMPORT, + (!error ? ST_OK : ST_NA)); + if (rc < 0) { + dbg("usbip_send_op_common failed: %#0x", OP_REP_IMPORT); + return -1; + } + + if (error) { + dbg("import request busid %s: failed", req.busid); + return -1; + } + + memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); + pack_usb_device(1, &pdu_udev); + + rc = usbip_send(sockfd, &pdu_udev, sizeof(pdu_udev)); + if (rc < 0) { + dbg("usbip_send failed: devinfo"); + return -1; } - dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { - struct usbip_usb_device pdu_udev; + dbg("import request busid %s: complete", req.busid); + + return 0; +} +static int send_reply_devlist(int connfd) +{ + struct usbip_exported_device *edev; + struct usbip_usb_device pdu_udev; + struct usbip_usb_interface pdu_uinf; + struct op_devlist_reply reply; + int i; + int rc; + + reply.ndev = 0; + /* number of exported devices */ + dlist_for_each_data(host_driver->edev_list, edev, + struct usbip_exported_device) { + reply.ndev += 1; + } + info("exportable devices: %d", reply.ndev); + + rc = usbip_send_op_common(connfd, OP_REP_DEVLIST, ST_OK); + if (rc < 0) { + dbg("usbip_send_op_common failed: %#0x", OP_REP_DEVLIST); + return -1; + } + PACK_OP_DEVLIST_REPLY(1, &reply); + + rc = usbip_send(connfd, &reply, sizeof(reply)); + if (rc < 0) { + dbg("usbip_send failed: %#0x", OP_REP_DEVLIST); + return -1; + } + + dlist_for_each_data(host_driver->edev_list, edev, + struct usbip_exported_device) { dump_usb_device(&edev->udev); memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); pack_usb_device(1, &pdu_udev); - ret = usbip_send(sockfd, (void *) &pdu_udev, sizeof(pdu_udev)); - if (ret < 0) { - err("send pdu_udev"); - return ret; + rc = usbip_send(connfd, &pdu_udev, sizeof(pdu_udev)); + if (rc < 0) { + dbg("usbip_send failed: pdu_udev"); + return -1; } - for (int i=0; i < edev->udev.bNumInterfaces; i++) { - struct usbip_usb_interface pdu_uinf; - + for (i = 0; i < edev->udev.bNumInterfaces; i++) { dump_usb_interface(&edev->uinf[i]); memcpy(&pdu_uinf, &edev->uinf[i], sizeof(pdu_uinf)); pack_usb_interface(1, &pdu_uinf); - ret = usbip_send(sockfd, (void *) &pdu_uinf, sizeof(pdu_uinf)); - if (ret < 0) { - err("send pdu_uinf"); - return ret; + rc = usbip_send(connfd, &pdu_uinf, sizeof(pdu_uinf)); + if (rc < 0) { + dbg("usbip_send failed: pdu_uinf"); + return -1; } } } @@ -94,283 +198,227 @@ static int send_reply_devlist(int sockfd) return 0; } - -static int recv_request_devlist(int sockfd) +static int recv_request_devlist(int connfd) { - int ret; struct op_devlist_request req; + int rc; memset(&req, 0, sizeof(req)); - ret = usbip_recv(sockfd, (void *) &req, sizeof(req)); - if (ret < 0) { - err("recv devlist request"); + rc = usbip_recv(connfd, &req, sizeof(req)); + if (rc < 0) { + dbg("usbip_recv failed: devlist request"); return -1; } - ret = send_reply_devlist(sockfd); - if (ret < 0) { - err("send devlist reply"); + rc = send_reply_devlist(connfd); + if (rc < 0) { + dbg("send_reply_devlist failed"); return -1; } return 0; } - -static int recv_request_import(int sockfd) +static int recv_pdu(int connfd) { + uint16_t code = OP_UNSPEC; int ret; - struct op_import_request req; - struct op_common reply; - struct usbip_exported_device *edev; - int found = 0; - int error = 0; - memset(&req, 0, sizeof(req)); - memset(&reply, 0, sizeof(reply)); - - ret = usbip_recv(sockfd, (void *) &req, sizeof(req)); + ret = usbip_recv_op_common(connfd, &code); if (ret < 0) { - err("recv import request"); + dbg("could not receive opcode: %#0x", code); return -1; } - PACK_OP_IMPORT_REQUEST(0, &req); - - dlist_for_each_data(host_driver->edev_list, edev, struct usbip_exported_device) { - if (!strncmp(req.busid, edev->udev.busid, SYSFS_BUS_ID_SIZE)) { - dbg("found requested device %s", req.busid); - found = 1; - break; - } + ret = usbip_host_refresh_device_list(); + if (ret < 0) { + dbg("could not refresh device list: %d", ret); + return -1; } - if (found) { - /* should set TCP_NODELAY for usbip */ - usbip_set_nodelay(sockfd); - - /* export_device needs a TCP/IP socket descriptor */ - ret = usbip_host_export_device(edev, sockfd); - if (ret < 0) - error = 1; - } else { - info("not found requested device %s", req.busid); - error = 1; + info("received request: %#0x(%d)", code, connfd); + switch (code) { + case OP_REQ_DEVLIST: + ret = recv_request_devlist(connfd); + break; + case OP_REQ_IMPORT: + ret = recv_request_import(connfd); + break; + case OP_REQ_DEVINFO: + case OP_REQ_CRYPKEY: + default: + err("received an unknown opcode: %#0x", code); + ret = -1; } + if (ret == 0) + info("request %#0x(%d): complete", code, connfd); + else + info("request %#0x(%d): failed", code, connfd); - ret = usbip_send_op_common(sockfd, OP_REP_IMPORT, (!error ? ST_OK : ST_NA)); - if (ret < 0) { - err("send import reply"); - return -1; - } - - if (!error) { - struct usbip_usb_device pdu_udev; + return ret; +} - memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); - pack_usb_device(1, &pdu_udev); +#ifdef HAVE_LIBWRAP +static int tcpd_auth(int connfd) +{ + struct request_info request; + int rc; - ret = usbip_send(sockfd, (void *) &pdu_udev, sizeof(pdu_udev)); - if (ret < 0) { - err("send devinfo"); - return -1; - } - } + request_init(&request, RQ_DAEMON, PROGNAME, RQ_FILE, connfd, 0); + fromhost(&request); + rc = hosts_access(&request); + if (rc == 0) + return -1; return 0; } +#endif - - -static int recv_pdu(int sockfd) +static int do_accept(int listenfd) { - int ret; - uint16_t code = OP_UNSPEC; + int connfd; + struct sockaddr_storage ss; + socklen_t len = sizeof(ss); + char host[NI_MAXHOST], port[NI_MAXSERV]; + int rc; + memset(&ss, 0, sizeof(ss)); - ret = usbip_recv_op_common(sockfd, &code); - if (ret < 0) { - err("recv op_common, %d", ret); - return ret; + connfd = accept(listenfd, (struct sockaddr *) &ss, &len); + if (connfd < 0) { + err("failed to accept connection"); + return -1; } + rc = getnameinfo((struct sockaddr *) &ss, len, host, sizeof(host), + port, sizeof(port), NI_NUMERICHOST | NI_NUMERICSERV); + if (rc) + err("getnameinfo: %s", gai_strerror(rc)); - ret = usbip_host_refresh_device_list(); - if (ret < 0) +#ifdef HAVE_LIBWRAP + rc = tcpd_auth(connfd); + if (rc < 0) { + info("denied access from %s", host); + close(connfd); return -1; + } +#endif + info("connection from %s:%s", host, port); - switch(code) { - case OP_REQ_DEVLIST: - ret = recv_request_devlist(sockfd); - break; + return connfd; +} - case OP_REQ_IMPORT: - ret = recv_request_import(sockfd); - break; +gboolean process_request(GIOChannel *gio, GIOCondition condition, + gpointer unused_data) +{ + int listenfd; + int connfd; - case OP_REQ_DEVINFO: - case OP_REQ_CRYPKEY: + (void) unused_data; - default: - err("unknown op_code, %d", code); - ret = -1; + if (condition & (G_IO_ERR | G_IO_HUP | G_IO_NVAL)) { + err("unknown condition"); + BUG(); } + if (condition & G_IO_IN) { + listenfd = g_io_channel_unix_get_fd(gio); + connfd = do_accept(listenfd); + if (connfd < 0) + return TRUE; - return ret; -} - - + recv_pdu(connfd); + close(connfd); + } + return TRUE; +} static void log_addrinfo(struct addrinfo *ai) { - int ret; char hbuf[NI_MAXHOST]; char sbuf[NI_MAXSERV]; + int rc; - ret = getnameinfo(ai->ai_addr, ai->ai_addrlen, hbuf, sizeof(hbuf), - sbuf, sizeof(sbuf), NI_NUMERICHOST | NI_NUMERICSERV); - if (ret) - err("getnameinfo, %s", gai_strerror(ret)); - - info("listen at [%s]:%s", hbuf, sbuf); -} - -static struct addrinfo *my_getaddrinfo(char *host, int ai_family) -{ - int ret; - struct addrinfo hints, *ai_head; - - memset(&hints, 0, sizeof(hints)); - - hints.ai_family = ai_family; - hints.ai_socktype = SOCK_STREAM; - hints.ai_flags = AI_PASSIVE; - - ret = getaddrinfo(host, USBIP_PORT_STRING, &hints, &ai_head); - if (ret) { - err("%s: %s", USBIP_PORT_STRING, gai_strerror(ret)); - return NULL; - } + rc = getnameinfo(ai->ai_addr, ai->ai_addrlen, hbuf, sizeof(hbuf), + sbuf, sizeof(sbuf), NI_NUMERICHOST | NI_NUMERICSERV); + if (rc) + err("getnameinfo: %s", gai_strerror(rc)); - return ai_head; + info("listening on %s:%s", hbuf, sbuf); } -#define MAXSOCK 20 -static int listen_all_addrinfo(struct addrinfo *ai_head, int lsock[]) +static int listen_all_addrinfo(struct addrinfo *ai_head, int sockfdlist[]) { struct addrinfo *ai; - int n = 0; /* number of sockets */ - - for (ai = ai_head; ai && n < MAXSOCK; ai = ai->ai_next) { - int ret; + int ret, nsockfd = 0; - lsock[n] = socket(ai->ai_family, ai->ai_socktype, ai->ai_protocol); - if (lsock[n] < 0) + for (ai = ai_head; ai && nsockfd < MAXSOCKFD; ai = ai->ai_next) { + sockfdlist[nsockfd] = socket(ai->ai_family, ai->ai_socktype, + ai->ai_protocol); + if (sockfdlist[nsockfd] < 0) continue; - usbip_set_reuseaddr(lsock[n]); - usbip_set_nodelay(lsock[n]); + usbip_set_reuseaddr(sockfdlist[nsockfd]); + usbip_set_nodelay(sockfdlist[nsockfd]); - if (lsock[n] >= FD_SETSIZE) { - close(lsock[n]); - lsock[n] = -1; + if (sockfdlist[nsockfd] >= FD_SETSIZE) { + close(sockfdlist[nsockfd]); + sockfdlist[nsockfd] = -1; continue; } - ret = bind(lsock[n], ai->ai_addr, ai->ai_addrlen); + ret = bind(sockfdlist[nsockfd], ai->ai_addr, ai->ai_addrlen); if (ret < 0) { - close(lsock[n]); - lsock[n] = -1; + close(sockfdlist[nsockfd]); + sockfdlist[nsockfd] = -1; continue; } - ret = listen(lsock[n], SOMAXCONN); + ret = listen(sockfdlist[nsockfd], SOMAXCONN); if (ret < 0) { - close(lsock[n]); - lsock[n] = -1; + close(sockfdlist[nsockfd]); + sockfdlist[nsockfd] = -1; continue; } log_addrinfo(ai); - - /* next if succeed */ - n++; + nsockfd++; } - if (n == 0) { - err("no socket to listen to"); + if (nsockfd == 0) return -1; - } - - dbg("listen %d address%s", n, (n==1)?"":"es"); - - return n; -} - -#ifdef HAVE_LIBWRAP -static int tcpd_auth(int csock) -{ - int ret; - struct request_info request; - - request_init(&request, RQ_DAEMON, "usbipd", RQ_FILE, csock, 0); - - fromhost(&request); - ret = hosts_access(&request); - if (!ret) - return -1; + dbg("listening on %d address%s", nsockfd, (nsockfd == 1) ? "" : "es"); - return 0; + return nsockfd; } -#endif -static int my_accept(int lsock) +static struct addrinfo *do_getaddrinfo(char *host, int ai_family) { - int csock; - struct sockaddr_storage ss; - socklen_t len = sizeof(ss); - char host[NI_MAXHOST], port[NI_MAXSERV]; - int ret; - - memset(&ss, 0, sizeof(ss)); - - csock = accept(lsock, (struct sockaddr *) &ss, &len); - if (csock < 0) { - err("accept"); - return -1; - } + struct addrinfo hints, *ai_head; + int rc; - ret = getnameinfo((struct sockaddr *) &ss, len, - host, sizeof(host), port, sizeof(port), - (NI_NUMERICHOST | NI_NUMERICSERV)); - if (ret) - err("getnameinfo, %s", gai_strerror(ret)); + memset(&hints, 0, sizeof(hints)); + hints.ai_family = ai_family; + hints.ai_socktype = SOCK_STREAM; + hints.ai_flags = AI_PASSIVE; -#ifdef HAVE_LIBWRAP - ret = tcpd_auth(csock); - if (ret < 0) { - info("deny access from %s", host); - close(csock); - return -1; + rc = getaddrinfo(host, USBIP_PORT_STRING, &hints, &ai_head); + if (rc) { + err("failed to get a network address %s: %s", USBIP_PORT_STRING, + gai_strerror(rc)); + return NULL; } -#endif - info("connected from %s:%s", host, port); - - return csock; + return ai_head; } - -GMainLoop *main_loop; - static void signal_handler(int i) { - dbg("signal catched, code %d", i); + dbg("received signal: code %d", i); if (main_loop) g_main_loop_quit(main_loop); @@ -387,184 +435,133 @@ static void set_signal(void) sigaction(SIGINT, &act, NULL); } - -gboolean process_comming_request(GIOChannel *gio, GIOCondition condition, - gpointer data __attribute__((unused))) -{ - int ret; - - if (condition & (G_IO_ERR | G_IO_HUP | G_IO_NVAL)) - g_error("unknown condition"); - - - if (condition & G_IO_IN) { - int lsock; - int csock; - - lsock = g_io_channel_unix_get_fd(gio); - - csock = my_accept(lsock); - if (csock < 0) - return TRUE; - - ret = recv_pdu(csock); - if (ret < 0) - err("process received pdu"); - - close(csock); - } - - return TRUE; -} - - -static void do_standalone_mode(gboolean daemonize) +static int do_standalone_mode(gboolean daemonize) { - int ret; - int lsock[MAXSOCK]; struct addrinfo *ai_head; - int n; + int sockfdlist[MAXSOCKFD]; + int nsockfd; + int i; + if (usbip_names_init(USBIDS_FILE)) + err("failed to open %s", USBIDS_FILE); - - ret = usbip_names_init(USBIDS_FILE); - if (ret) - err("open usb.ids"); - - ret = usbip_host_driver_open(); - if (ret < 0) - g_error("driver open failed"); + if (usbip_host_driver_open()) { + err("please load " USBIP_CORE_MOD_NAME ".ko and " + USBIP_HOST_DRV_NAME ".ko!"); + return -1; + } if (daemonize) { - if (daemon(0,0) < 0) - g_error("daemonizing failed: %s", g_strerror(errno)); + if (daemon(0,0) < 0) { + err("daemonizing failed: %s", strerror(errno)); + return -1; + } usbip_use_syslog = 1; } - set_signal(); - ai_head = my_getaddrinfo(NULL, PF_UNSPEC); + ai_head = do_getaddrinfo(NULL, PF_UNSPEC); if (!ai_head) - return; + return -1; - n = listen_all_addrinfo(ai_head, lsock); - if (n <= 0) - g_error("no socket to listen to"); + info("starting " PROGNAME " (%s)", usbip_version_string); - for (int i = 0; i < n; i++) { + nsockfd = listen_all_addrinfo(ai_head, sockfdlist); + if (nsockfd <= 0) { + err("failed to open a listening socket"); + return -1; + } + + for (i = 0; i < nsockfd; i++) { GIOChannel *gio; - gio = g_io_channel_unix_new(lsock[i]); + gio = g_io_channel_unix_new(sockfdlist[i]); g_io_add_watch(gio, (G_IO_IN | G_IO_ERR | G_IO_HUP | G_IO_NVAL), - process_comming_request, NULL); + process_request, NULL); } - - info("usbipd start (%s)", version); - - main_loop = g_main_loop_new(FALSE, FALSE); g_main_loop_run(main_loop); - info("shutdown"); + info("shutting down " PROGNAME); freeaddrinfo(ai_head); - usbip_names_free(); usbip_host_driver_close(); + usbip_names_free(); - return; -} - - -static const char help_message[] = "\ -Usage: usbipd [options] \n\ - -D, --daemon \n\ - Run as a daemon process. \n\ - \n\ - -d, --debug \n\ - Print debugging information. \n\ - \n\ - -v, --version \n\ - Show version. \n\ - \n\ - -h, --help \n\ - Print this help. \n"; - -static void show_help(void) -{ - printf("%s", help_message); + return 0; } -static const struct option longopts[] = { - {"daemon", no_argument, NULL, 'D'}, - {"debug", no_argument, NULL, 'd'}, - {"version", no_argument, NULL, 'v'}, - {"help", no_argument, NULL, 'h'}, - {NULL, 0, NULL, 0} -}; - int main(int argc, char *argv[]) { - gboolean daemonize = FALSE; + static const struct option longopts[] = { + { "daemon", no_argument, NULL, 'D' }, + { "debug", no_argument, NULL, 'd' }, + { "help", no_argument, NULL, 'h' }, + { "version", no_argument, NULL, 'v' }, + { NULL, 0, NULL, 0 } + }; enum { cmd_standalone_mode = 1, cmd_help, cmd_version - } cmd = cmd_standalone_mode; + } cmd; + gboolean daemonize = FALSE; + int opt, rc = -1; usbip_use_stderr = 1; usbip_use_syslog = 0; if (geteuid() != 0) - g_warning("running non-root?"); + err("not running as root?"); + cmd = cmd_standalone_mode; for (;;) { - int c; - int index = 0; + opt = getopt_long(argc, argv, "Ddhv", longopts, NULL); - c = getopt_long(argc, argv, "vhdD", longopts, &index); - - if (c == -1) + if (opt == -1) break; - switch (c) { - case 'd': - usbip_use_debug = 1; - continue; - case 'v': - cmd = cmd_version; - break; - case 'h': - cmd = cmd_help; - break; - case 'D': - daemonize = TRUE; - break; - case '?': - show_help(); - exit(EXIT_FAILURE); - default: - err("getopt"); - } - } - - switch (cmd) { - case cmd_standalone_mode: - do_standalone_mode(daemonize); + switch (opt) { + case 'D': + daemonize = TRUE; + break; + case 'd': + usbip_use_debug = 1; break; - case cmd_version: - printf("%s\n", version); + case 'h': + cmd = cmd_help; break; - case cmd_help: - show_help(); + case 'v': + cmd = cmd_version; break; + case '?': + usbipd_help(); default: - info("unknown cmd"); - show_help(); + goto err_out; + } } - return 0; + switch (cmd) { + case cmd_standalone_mode: + rc = do_standalone_mode(daemonize); + break; + case cmd_version: + printf(PROGNAME " (%s)\n", usbip_version_string); + rc = 0; + break; + case cmd_help: + usbipd_help(); + rc = 0; + break; + default: + usbipd_help(); + goto err_out; + } + +err_out: + return (rc > -1 ? EXIT_SUCCESS : EXIT_FAILURE); } -- cgit v0.10.2 From 3c6e9e8f350c95fbf17736e42ce273f10094d529 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:51 -0700 Subject: staging: usbip: userspace: add new prefix for usbip network code Change and add new usbip_net_ prefix to every function in the network code for easier identification. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_attach.c b/drivers/staging/usbip/userspace/src/usbip_attach.c index 06640b2..b7885a2 100644 --- a/drivers/staging/usbip/userspace/src/usbip_attach.c +++ b/drivers/staging/usbip/userspace/src/usbip_attach.c @@ -115,7 +115,7 @@ static int query_import_device(int sockfd, char *busid) memset(&reply, 0, sizeof(reply)); /* send a request */ - rc = usbip_send_op_common(sockfd, OP_REQ_IMPORT, 0); + rc = usbip_net_send_op_common(sockfd, OP_REQ_IMPORT, 0); if (rc < 0) { err("send op_common"); return -1; @@ -125,20 +125,20 @@ static int query_import_device(int sockfd, char *busid) PACK_OP_IMPORT_REQUEST(0, &request); - rc = usbip_send(sockfd, (void *) &request, sizeof(request)); + rc = usbip_net_send(sockfd, (void *) &request, sizeof(request)); if (rc < 0) { err("send op_import_request"); return -1; } - /* receive a reply */ - rc = usbip_recv_op_common(sockfd, &code); + /* recieve a reply */ + rc = usbip_net_recv_op_common(sockfd, &code); if (rc < 0) { err("recv op_common"); return -1; } - rc = usbip_recv(sockfd, (void *) &reply, sizeof(reply)); + rc = usbip_net_recv(sockfd, (void *) &reply, sizeof(reply)); if (rc < 0) { err("recv op_import_reply"); return -1; diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 973bf8c..3edf5d1 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -56,22 +56,22 @@ static int get_exported_devices(char *host, int sockfd) unsigned int i; int j, rc; - rc = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0); + rc = usbip_net_send_op_common(sockfd, OP_REQ_DEVLIST, 0); if (rc < 0) { - dbg("usbip_send_op_common failed"); + dbg("usbip_net_send_op_common failed"); return -1; } - rc = usbip_recv_op_common(sockfd, &code); + rc = usbip_net_recv_op_common(sockfd, &code); if (rc < 0) { - dbg("usbip_recv_op_common failed"); + dbg("usbip_net_recv_op_common failed"); return -1; } memset(&reply, 0, sizeof(reply)); - rc = usbip_recv(sockfd, &reply, sizeof(reply)); + rc = usbip_net_recv(sockfd, &reply, sizeof(reply)); if (rc < 0) { - dbg("usbip_recv_op_devlist failed"); + dbg("usbip_net_recv_op_devlist failed"); return -1; } PACK_OP_DEVLIST_REPLY(0, &reply); @@ -88,12 +88,12 @@ static int get_exported_devices(char *host, int sockfd) for (i = 0; i < reply.ndev; i++) { memset(&udev, 0, sizeof(udev)); - rc = usbip_recv(sockfd, &udev, sizeof(udev)); + rc = usbip_net_recv(sockfd, &udev, sizeof(udev)); if (rc < 0) { - dbg("usbip_recv failed: usbip_usb_device[%d]", i); + dbg("usbip_net_recv failed: usbip_usb_device[%d]", i); return -1; } - pack_usb_device(0, &udev); + usbip_net_pack_usb_device(0, &udev); usbip_names_get_product(product_name, sizeof(product_name), udev.idVendor, udev.idProduct); @@ -105,12 +105,14 @@ static int get_exported_devices(char *host, int sockfd) printf("%8s: %s\n", "", class_name); for (j = 0; j < udev.bNumInterfaces; j++) { - rc = usbip_recv(sockfd, &uintf, sizeof(uintf)); + rc = usbip_net_recv(sockfd, &uintf, sizeof(uintf)); if (rc < 0) { - dbg("usbip_recv failed: usbip_usb_intf[%d]", j); + dbg("usbip_net_recv failed: usbip_usb_intf[%d]", + j); + return -1; } - pack_usb_interface(0, &uintf); + usbip_net_pack_usb_interface(0, &uintf); usbip_names_get_class(class_name, sizeof(class_name), uintf.bInterfaceClass, diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c index a3833ff..1a84dd3 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.c +++ b/drivers/staging/usbip/userspace/src/usbip_network.c @@ -28,7 +28,7 @@ #include "usbip_common.h" #include "usbip_network.h" -void pack_uint32_t(int pack, uint32_t *num) +void usbip_net_pack_uint32_t(int pack, uint32_t *num) { uint32_t i; @@ -40,7 +40,7 @@ void pack_uint32_t(int pack, uint32_t *num) *num = i; } -void pack_uint16_t(int pack, uint16_t *num) +void usbip_net_pack_uint16_t(int pack, uint16_t *num) { uint16_t i; @@ -52,24 +52,26 @@ void pack_uint16_t(int pack, uint16_t *num) *num = i; } -void pack_usb_device(int pack, struct usbip_usb_device *udev) +void usbip_net_pack_usb_device(int pack, struct usbip_usb_device *udev) { - pack_uint32_t(pack, &udev->busnum); - pack_uint32_t(pack, &udev->devnum); - pack_uint32_t(pack, &udev->speed ); + usbip_net_pack_uint32_t(pack, &udev->busnum); + usbip_net_pack_uint32_t(pack, &udev->devnum); + usbip_net_pack_uint32_t(pack, &udev->speed ); - pack_uint16_t(pack, &udev->idVendor ); - pack_uint16_t(pack, &udev->idProduct); - pack_uint16_t(pack, &udev->bcdDevice); + usbip_net_pack_uint16_t(pack, &udev->idVendor); + usbip_net_pack_uint16_t(pack, &udev->idProduct); + usbip_net_pack_uint16_t(pack, &udev->bcdDevice); } -void pack_usb_interface(int pack __attribute__((unused)), - struct usbip_usb_interface *udev __attribute__((unused))) +void usbip_net_pack_usb_interface(int pack __attribute__((unused)), + struct usbip_usb_interface *udev + __attribute__((unused))) { /* uint8_t members need nothing */ } -static ssize_t usbip_xmit(int sockfd, void *buff, size_t bufflen, int sending) +static ssize_t usbip_net_xmit(int sockfd, void *buff, size_t bufflen, + int sending) { ssize_t nbytes; ssize_t total = 0; @@ -95,17 +97,17 @@ static ssize_t usbip_xmit(int sockfd, void *buff, size_t bufflen, int sending) return total; } -ssize_t usbip_recv(int sockfd, void *buff, size_t bufflen) +ssize_t usbip_net_recv(int sockfd, void *buff, size_t bufflen) { - return usbip_xmit(sockfd, buff, bufflen, 0); + return usbip_net_xmit(sockfd, buff, bufflen, 0); } -ssize_t usbip_send(int sockfd, void *buff, size_t bufflen) +ssize_t usbip_net_send(int sockfd, void *buff, size_t bufflen) { - return usbip_xmit(sockfd, buff, bufflen, 1); + return usbip_net_xmit(sockfd, buff, bufflen, 1); } -int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) +int usbip_net_send_op_common(int sockfd, uint32_t code, uint32_t status) { struct op_common op_common; int rc; @@ -118,25 +120,25 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status) PACK_OP_COMMON(1, &op_common); - rc = usbip_send(sockfd, &op_common, sizeof(op_common)); + rc = usbip_net_send(sockfd, &op_common, sizeof(op_common)); if (rc < 0) { - dbg("usbip_send failed: %d", rc); + dbg("usbip_net_send failed: %d", rc); return -1; } return 0; } -int usbip_recv_op_common(int sockfd, uint16_t *code) +int usbip_net_recv_op_common(int sockfd, uint16_t *code) { struct op_common op_common; int rc; memset(&op_common, 0, sizeof(op_common)); - rc = usbip_recv(sockfd, &op_common, sizeof(op_common)); + rc = usbip_net_recv(sockfd, &op_common, sizeof(op_common)); if (rc < 0) { - dbg("usbip_recv failed: %d", rc); + dbg("usbip_net_recv failed: %d", rc); goto err; } @@ -171,7 +173,7 @@ err: return -1; } -int usbip_set_reuseaddr(int sockfd) +int usbip_net_set_reuseaddr(int sockfd) { const int val = 1; int ret; @@ -183,7 +185,7 @@ int usbip_set_reuseaddr(int sockfd) return ret; } -int usbip_set_nodelay(int sockfd) +int usbip_net_set_nodelay(int sockfd) { const int val = 1; int ret; @@ -195,7 +197,7 @@ int usbip_set_nodelay(int sockfd) return ret; } -int usbip_set_keepalive(int sockfd) +int usbip_net_set_keepalive(int sockfd) { const int val = 1; int ret; @@ -236,9 +238,9 @@ int usbip_net_tcp_connect(char *hostname, char *service) continue; /* should set TCP_NODELAY for usbip */ - usbip_set_nodelay(sockfd); + usbip_net_set_nodelay(sockfd); /* TODO: write code for heartbeat */ - usbip_set_keepalive(sockfd); + usbip_net_set_keepalive(sockfd); if (connect(sockfd, rp->ai_addr, rp->ai_addrlen) == 0) break; diff --git a/drivers/staging/usbip/userspace/src/usbip_network.h b/drivers/staging/usbip/userspace/src/usbip_network.h index 07274df..2d1e070 100644 --- a/drivers/staging/usbip/userspace/src/usbip_network.h +++ b/drivers/staging/usbip/userspace/src/usbip_network.h @@ -34,9 +34,9 @@ struct op_common { } __attribute__((packed)); #define PACK_OP_COMMON(pack, op_common) do {\ - pack_uint16_t(pack, &(op_common)->version);\ - pack_uint16_t(pack, &(op_common)->code );\ - pack_uint32_t(pack, &(op_common)->status );\ + usbip_net_pack_uint16_t(pack, &(op_common)->version);\ + usbip_net_pack_uint16_t(pack, &(op_common)->code );\ + usbip_net_pack_uint32_t(pack, &(op_common)->status );\ } while (0) /* ---------------------------------------------------------------------- */ @@ -79,7 +79,7 @@ struct op_import_reply { } while (0) #define PACK_OP_IMPORT_REPLY(pack, reply) do {\ - pack_usb_device(pack, &(reply)->udev);\ + usbip_net_pack_usb_device(pack, &(reply)->udev);\ } while (0) /* ---------------------------------------------------------------------- */ @@ -98,7 +98,7 @@ struct op_export_reply { #define PACK_OP_EXPORT_REQUEST(pack, request) do {\ - pack_usb_device(pack, &(request)->udev);\ + usbip_net_pack_usb_device(pack, &(request)->udev);\ } while (0) #define PACK_OP_EXPORT_REPLY(pack, reply) do {\ @@ -119,7 +119,7 @@ struct op_unexport_reply { } __attribute__((packed)); #define PACK_OP_UNEXPORT_REQUEST(pack, request) do {\ - pack_usb_device(pack, &(request)->udev);\ + usbip_net_pack_usb_device(pack, &(request)->udev);\ } while (0) #define PACK_OP_UNEXPORT_REPLY(pack, reply) do {\ @@ -164,22 +164,21 @@ struct op_devlist_reply_extra { } while (0) #define PACK_OP_DEVLIST_REPLY(pack, reply) do {\ - pack_uint32_t(pack, &(reply)->ndev);\ + usbip_net_pack_uint32_t(pack, &(reply)->ndev);\ } while (0) -void pack_uint32_t(int pack, uint32_t *num); -void pack_uint16_t(int pack, uint16_t *num); -void pack_usb_device(int pack, struct usbip_usb_device *udev); -void pack_usb_interface(int pack, struct usbip_usb_interface *uinf); - -ssize_t usbip_recv(int sockfd, void *buff, size_t bufflen); -ssize_t usbip_send(int sockfd, void *buff, size_t bufflen); -int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status); -int usbip_recv_op_common(int sockfd, uint16_t *code); -int usbip_set_reuseaddr(int sockfd); -int usbip_set_nodelay(int sockfd); -int usbip_set_keepalive(int sockfd); - +void usbip_net_pack_uint32_t(int pack, uint32_t *num); +void usbip_net_pack_uint16_t(int pack, uint16_t *num); +void usbip_net_pack_usb_device(int pack, struct usbip_usb_device *udev); +void usbip_net_pack_usb_interface(int pack, struct usbip_usb_interface *uinf); + +ssize_t usbip_net_recv(int sockfd, void *buff, size_t bufflen); +ssize_t usbip_net_send(int sockfd, void *buff, size_t bufflen); +int usbip_net_send_op_common(int sockfd, uint32_t code, uint32_t status); +int usbip_net_recv_op_common(int sockfd, uint16_t *code); +int usbip_net_set_reuseaddr(int sockfd); +int usbip_net_set_nodelay(int sockfd); +int usbip_net_set_keepalive(int sockfd); int usbip_net_tcp_connect(char *hostname, char *port); #endif /* __USBIP_NETWORK_H */ diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c index aa92623..8668a80 100644 --- a/drivers/staging/usbip/userspace/src/usbipd.c +++ b/drivers/staging/usbip/userspace/src/usbipd.c @@ -84,9 +84,9 @@ static int recv_request_import(int sockfd) memset(&req, 0, sizeof(req)); memset(&reply, 0, sizeof(reply)); - rc = usbip_recv(sockfd, &req, sizeof(req)); + rc = usbip_net_recv(sockfd, &req, sizeof(req)); if (rc < 0) { - dbg("usbip_recv failed: import request"); + dbg("usbip_net_recv failed: import request"); return -1; } PACK_OP_IMPORT_REQUEST(0, &req); @@ -102,7 +102,7 @@ static int recv_request_import(int sockfd) if (found) { /* should set TCP_NODELAY for usbip */ - usbip_set_nodelay(sockfd); + usbip_net_set_nodelay(sockfd); /* export device needs a TCP/IP socket descriptor */ rc = usbip_host_export_device(edev, sockfd); @@ -113,11 +113,10 @@ static int recv_request_import(int sockfd) error = 1; } - - rc = usbip_send_op_common(sockfd, OP_REP_IMPORT, - (!error ? ST_OK : ST_NA)); + rc = usbip_net_send_op_common(sockfd, OP_REP_IMPORT, + (!error ? ST_OK : ST_NA)); if (rc < 0) { - dbg("usbip_send_op_common failed: %#0x", OP_REP_IMPORT); + dbg("usbip_net_send_op_common failed: %#0x", OP_REP_IMPORT); return -1; } @@ -127,11 +126,11 @@ static int recv_request_import(int sockfd) } memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); - pack_usb_device(1, &pdu_udev); + usbip_net_pack_usb_device(1, &pdu_udev); - rc = usbip_send(sockfd, &pdu_udev, sizeof(pdu_udev)); + rc = usbip_net_send(sockfd, &pdu_udev, sizeof(pdu_udev)); if (rc < 0) { - dbg("usbip_send failed: devinfo"); + dbg("usbip_net_send failed: devinfo"); return -1; } @@ -157,16 +156,16 @@ static int send_reply_devlist(int connfd) } info("exportable devices: %d", reply.ndev); - rc = usbip_send_op_common(connfd, OP_REP_DEVLIST, ST_OK); + rc = usbip_net_send_op_common(connfd, OP_REP_DEVLIST, ST_OK); if (rc < 0) { - dbg("usbip_send_op_common failed: %#0x", OP_REP_DEVLIST); + dbg("usbip_net_send_op_common failed: %#0x", OP_REP_DEVLIST); return -1; } PACK_OP_DEVLIST_REPLY(1, &reply); - rc = usbip_send(connfd, &reply, sizeof(reply)); + rc = usbip_net_send(connfd, &reply, sizeof(reply)); if (rc < 0) { - dbg("usbip_send failed: %#0x", OP_REP_DEVLIST); + dbg("usbip_net_send failed: %#0x", OP_REP_DEVLIST); return -1; } @@ -174,22 +173,23 @@ static int send_reply_devlist(int connfd) struct usbip_exported_device) { dump_usb_device(&edev->udev); memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev)); - pack_usb_device(1, &pdu_udev); + usbip_net_pack_usb_device(1, &pdu_udev); - rc = usbip_send(connfd, &pdu_udev, sizeof(pdu_udev)); + rc = usbip_net_send(connfd, &pdu_udev, sizeof(pdu_udev)); if (rc < 0) { - dbg("usbip_send failed: pdu_udev"); + dbg("usbip_net_send failed: pdu_udev"); return -1; } for (i = 0; i < edev->udev.bNumInterfaces; i++) { dump_usb_interface(&edev->uinf[i]); memcpy(&pdu_uinf, &edev->uinf[i], sizeof(pdu_uinf)); - pack_usb_interface(1, &pdu_uinf); + usbip_net_pack_usb_interface(1, &pdu_uinf); - rc = usbip_send(connfd, &pdu_uinf, sizeof(pdu_uinf)); + rc = usbip_net_send(connfd, &pdu_uinf, + sizeof(pdu_uinf)); if (rc < 0) { - dbg("usbip_send failed: pdu_uinf"); + dbg("usbip_net_send failed: pdu_uinf"); return -1; } } @@ -205,9 +205,9 @@ static int recv_request_devlist(int connfd) memset(&req, 0, sizeof(req)); - rc = usbip_recv(connfd, &req, sizeof(req)); + rc = usbip_net_recv(connfd, &req, sizeof(req)); if (rc < 0) { - dbg("usbip_recv failed: devlist request"); + dbg("usbip_net_recv failed: devlist request"); return -1; } @@ -225,7 +225,7 @@ static int recv_pdu(int connfd) uint16_t code = OP_UNSPEC; int ret; - ret = usbip_recv_op_common(connfd, &code); + ret = usbip_net_recv_op_common(connfd, &code); if (ret < 0) { dbg("could not receive opcode: %#0x", code); return -1; @@ -361,8 +361,8 @@ static int listen_all_addrinfo(struct addrinfo *ai_head, int sockfdlist[]) if (sockfdlist[nsockfd] < 0) continue; - usbip_set_reuseaddr(sockfdlist[nsockfd]); - usbip_set_nodelay(sockfdlist[nsockfd]); + usbip_net_set_reuseaddr(sockfdlist[nsockfd]); + usbip_net_set_nodelay(sockfdlist[nsockfd]); if (sockfdlist[nsockfd] >= FD_SETSIZE) { close(sockfdlist[nsockfd]); -- cgit v0.10.2 From dffb9649d392b7fa7971c5fa54a4154cec264809 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:52 -0700 Subject: staging: usbip: userspace: fix header installation bug A bug that I created due to using simply expanding variables in the makefiles. Although only unexpanded paths are at issue here, I decided to use recursively expanding variables on all of the parameterized values. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/Makefile.am b/drivers/staging/usbip/userspace/Makefile.am index fbdeef3..9ab1949 100644 --- a/drivers/staging/usbip/userspace/Makefile.am +++ b/drivers/staging/usbip/userspace/Makefile.am @@ -1,5 +1,5 @@ SUBDIRS := libsrc src -includedir := @includedir@/usbip +includedir = @includedir@/usbip include_HEADERS := $(addprefix libsrc/, \ usbip_common.h vhci_driver.h usbip_host_driver.h) diff --git a/drivers/staging/usbip/userspace/libsrc/Makefile.am b/drivers/staging/usbip/userspace/libsrc/Makefile.am index 9b663a4..4921189 100644 --- a/drivers/staging/usbip/userspace/libsrc/Makefile.am +++ b/drivers/staging/usbip/userspace/libsrc/Makefile.am @@ -1,6 +1,6 @@ -libusbip_la_CPPFLAGS := -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"' -libusbip_la_CFLAGS := @EXTRA_CFLAGS@ -libusbip_la_LDFLAGS := -version-info @LIBUSBIP_VERSION@ +libusbip_la_CPPFLAGS = -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"' +libusbip_la_CFLAGS = @EXTRA_CFLAGS@ +libusbip_la_LDFLAGS = -version-info @LIBUSBIP_VERSION@ lib_LTLIBRARIES := libusbip.la libusbip_la_SOURCES := names.c names.h usbip_host_driver.c usbip_host_driver.h \ diff --git a/drivers/staging/usbip/userspace/src/Makefile.am b/drivers/staging/usbip/userspace/src/Makefile.am index 44ff0ca..3f09f6a 100644 --- a/drivers/staging/usbip/userspace/src/Makefile.am +++ b/drivers/staging/usbip/userspace/src/Makefile.am @@ -1,6 +1,6 @@ -AM_CPPFLAGS := -I$(top_srcdir)/libsrc -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"' -AM_CFLAGS := @EXTRA_CFLAGS@ @PACKAGE_CFLAGS@ -LDADD := $(top_builddir)/libsrc/libusbip.la @PACKAGE_LIBS@ +AM_CPPFLAGS = -I$(top_srcdir)/libsrc -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"' +AM_CFLAGS = @EXTRA_CFLAGS@ @PACKAGE_CFLAGS@ +LDADD = $(top_builddir)/libsrc/libusbip.la @PACKAGE_LIBS@ sbin_PROGRAMS := usbip usbipd -- cgit v0.10.2 From fcedd169be21564280f83ef486e403fa34f61a39 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:53 -0700 Subject: staging: usbip: userspace: usbip_list.c: modify exportable device output Change spacing to provide better indentation for readability. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 3edf5d1..6349638 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -100,9 +100,9 @@ static int get_exported_devices(char *host, int sockfd) usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass, udev.bDeviceSubClass, udev.bDeviceProtocol); - printf("%8s: %s\n", udev.busid, product_name); - printf("%8s: %s\n", "", udev.path); - printf("%8s: %s\n", "", class_name); + printf("%11s: %s\n", udev.busid, product_name); + printf("%11s: %s\n", "", udev.path); + printf("%11s: %s\n", "", class_name); for (j = 0; j < udev.bNumInterfaces; j++) { rc = usbip_net_recv(sockfd, &uintf, sizeof(uintf)); @@ -118,7 +118,7 @@ static int get_exported_devices(char *host, int sockfd) uintf.bInterfaceClass, uintf.bInterfaceSubClass, uintf.bInterfaceProtocol); - printf("%8s: %2d - %s\n", "", j, class_name); + printf("%11s: %2d - %s\n", "", j, class_name); } printf("\n"); } -- cgit v0.10.2 From 2435ab147bfb8f490c3b3d2b0ff550c3e02f0c2e Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:54 -0700 Subject: staging: usbip: userspace: usbip: modify `list' help message The remote devices listed are, technically, exportable and not necessarily exported. Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c index 583b179..fff4b76 100644 --- a/drivers/staging/usbip/userspace/src/usbip.c +++ b/drivers/staging/usbip/userspace/src/usbip.c @@ -77,7 +77,7 @@ static const struct command cmds[] = { { .name = "list", .fn = usbip_list, - .help = "List exported or local USB devices", + .help = "List exportable or local USB devices", .usage = usbip_list_usage }, { diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c index 6349638..ed30d91 100644 --- a/drivers/staging/usbip/userspace/src/usbip_list.c +++ b/drivers/staging/usbip/userspace/src/usbip_list.c @@ -37,7 +37,7 @@ static const char usbip_list_usage_string[] = "usbip list [-p|--parsable] \n" " -p, --parsable Parsable list format\n" - " -r, --remote= List the exported USB devices on \n" + " -r, --remote= List the exportable USB devices on \n" " -l, --local List the local USB devices\n"; void usbip_list_usage(void) -- cgit v0.10.2 From 45dd9a98f7968fb0f67995c6ba96f67bdfcd8100 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:55 -0700 Subject: staging: usbip: userspace: README: update example output Change a missed reference to the `list' command, and update the output from `usbip bind ...' and `usbip list -r ...' Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/README b/drivers/staging/usbip/userspace/README index aafab102..63cd107 100644 --- a/drivers/staging/usbip/userspace/README +++ b/drivers/staging/usbip/userspace/README @@ -79,7 +79,7 @@ Physically attach your USB devices to this host. In another terminal, let's look up what USB devices are physically attached to this host. - trois:# usbip_bind_driver --list + trois:# usbip list -l Local USB devices ================= - busid 1-1 (05a9:a511) @@ -115,8 +115,9 @@ Mark the device of busid 3-3.2 as exportable: trois:# usbip --debug bind --busid 3-3.2 ... - usbip dbg: utils.c: 52 (modify_match_busid) write "add 3-3.2" to... - usbip dbg: usbip_bind.c: 231 (use_device_by_usbip) bind 3-3.2 complete! + usbip debug: usbip_bind.c:162:[unbind_other] 3-3.2:1.0 -> usb-storage + ... + bind device on busid 3-3.2: complete trois:# usbip list -l Local USB devices @@ -137,28 +138,30 @@ exportable on the host. deux:# insmod path/to/vhci-hcd.ko deux:# usbip list --remote 10.0.0.3 - - 10.0.0.3 - 1-1: Prolific Technology, Inc. : unknown product (067b:3507) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Mass Storage / SCSI / Bulk (Zip) (08/06/50) - - 1-2.2.1: Apple Computer, Inc. : unknown product (05ac:0203) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Human Interface Devices / Boot Interface Subclass / Keyboard (03/01/01) - - 1-2.2.3: OmniVision Technologies, Inc. : OV511+ WebCam (05a9:a511) - : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.3 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Vendor Specific Class / unknown subclass / unknown protocol (ff/00/00) - - 3-1: Logitech, Inc. : QuickCam Pro 4000 (046d:08b2) - : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.0/usb3/3-1 - : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) - : 0 - Data / unknown subclass / unknown protocol (0a/ff/00) - : 1 - Audio / Control Device / unknown protocol (01/01/00) - : 2 - Audio / Streaming / unknown protocol (01/02/00) + Exportable USB devices + ====================== + - 10.0.0.3 + 1-1: Prolific Technology, Inc. : unknown product (067b:3507) + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Mass Storage / SCSI / Bulk (Zip) (08/06/50) + + 1-2.2.1: Apple Computer, Inc. : unknown product (05ac:0203) + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Human Interface Devices / Boot Interface Subclass / Keyboard (03/01/01) + + 1-2.2.3: OmniVision Technologies, Inc. : OV511+ WebCam (05a9:a511) + : /sys/devices/pci0000:00/0000:00:1f.2/usb1/1-2/1-2.2/1-2.2.3 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Vendor Specific Class / unknown subclass / unknown protocol (ff/00/00) + + 3-1: Logitech, Inc. : QuickCam Pro 4000 (046d:08b2) + : /sys/devices/pci0000:00/0000:00:1e.0/0000:02:0a.0/usb3/3-1 + : (Defined at Interface level) / unknown subclass / unknown protocol (00/00/00) + : 0 - Data / unknown subclass / unknown protocol (0a/ff/00) + : 1 - Audio / Control Device / unknown protocol (01/01/00) + : 2 - Audio / Streaming / unknown protocol (01/02/00) Attach a remote USB device: -- cgit v0.10.2 From 0aee58894551d7a9992f79d77d89f5846eb5e938 Mon Sep 17 00:00:00 2001 From: matt mooney Date: Thu, 7 Jul 2011 00:31:56 -0700 Subject: staging: usbip: userspace: usbip-utils 1.1.1 Bump package revision number! Signed-off-by: matt mooney Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac index 89fefd5..bf5cf49 100644 --- a/drivers/staging/usbip/userspace/configure.ac +++ b/drivers/staging/usbip/userspace/configure.ac @@ -1,8 +1,8 @@ dnl Process this file with autoconf to produce a configure script. AC_PREREQ(2.59) -AC_INIT([usbip-utils], [1.1.0], [linux-usb@vger.kernel.org]) -AC_DEFINE([USBIP_VERSION], [0x00000100], [binary-coded decimal version number]) +AC_INIT([usbip-utils], [1.1.1], [linux-usb@vger.kernel.org]) +AC_DEFINE([USBIP_VERSION], [0x00000111], [binary-coded decimal version number]) CURRENT=0 REVISION=1 -- cgit v0.10.2 From 35b5ddb6466f66c511217abd8b3f490e759dae3e Mon Sep 17 00:00:00 2001 From: Lu Guanqun Date: Fri, 8 Jul 2011 09:59:10 +0100 Subject: sst: report correct jack event The status of jack event is compared bitwise: [in sound/core/jack.c:snd_jack_report()] for (i = 0; i < ARRAY_SIZE(jack_switch_types); i++) { int testbit = 1 << i; if (jack->type & testbit) input_report_switch(jack->input_dev, jack_switch_types[i], status & testbit); } So in order to report the correct events, 3 should be passed instead of 1. Signed-off-by: Lu Guanqun Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/intel_sst/intelmid_v2_control.c b/drivers/staging/intel_sst/intelmid_v2_control.c index 000378a..46ab55e 100644 --- a/drivers/staging/intel_sst/intelmid_v2_control.c +++ b/drivers/staging/intel_sst/intelmid_v2_control.c @@ -1090,7 +1090,7 @@ static void nc_pmic_irq_cb(void *cb_data, u8 intsts) if (intsts & 0x1) { pr_debug("SST DBG:MAD headset detected\n"); /* send headset detect/undetect */ - present = (value == 0x1) ? 1 : 0; + present = (value == 0x1) ? 3 : 0; jack_event_flag = 1; mjack->jack.type = SND_JACK_HEADSET; hp_automute(SND_JACK_HEADSET, present); -- cgit v0.10.2 From 26af13f15ab281c9e20f8027bc556111644662ae Mon Sep 17 00:00:00 2001 From: Feng Tang Date: Fri, 8 Jul 2011 09:59:26 +0100 Subject: sst: avoid unnecessary firmware reloading for MRST SST HW on MRST doesn't need to reload the firmware during suspend/resume cycle, so remove the extra workload. This also fix a bug that the firmware sample rate can't be modified when there is no active playback/capture stream. Signed-off-by: Feng Tang Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/intel_sst/intel_sst.c b/drivers/staging/intel_sst/intel_sst.c index c0c144a..d892861 100644 --- a/drivers/staging/intel_sst/intel_sst.c +++ b/drivers/staging/intel_sst/intel_sst.c @@ -545,7 +545,10 @@ static int intel_sst_runtime_suspend(struct device *dev) /* Move the SST state to Suspended */ mutex_lock(&sst_drv_ctx->sst_lock); sst_drv_ctx->sst_state = SST_SUSPENDED; - sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); + + /* Only needed by Medfield */ + if (sst_drv_ctx->pci_id != SST_MRST_PCI_ID) + sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); mutex_unlock(&sst_drv_ctx->sst_lock); return 0; } diff --git a/drivers/staging/intel_sst/intel_sst_common.h b/drivers/staging/intel_sst/intel_sst_common.h index f8e9da6..870981b 100644 --- a/drivers/staging/intel_sst/intel_sst_common.h +++ b/drivers/staging/intel_sst/intel_sst_common.h @@ -420,6 +420,8 @@ struct intel_sst_drv { unsigned int max_streams; unsigned int *fw_cntx; unsigned int fw_cntx_size; + + unsigned int fw_downloaded; }; extern struct intel_sst_drv *sst_drv_ctx; diff --git a/drivers/staging/intel_sst/intel_sst_drv_interface.c b/drivers/staging/intel_sst/intel_sst_drv_interface.c index 1021477..69daa14 100644 --- a/drivers/staging/intel_sst/intel_sst_drv_interface.c +++ b/drivers/staging/intel_sst/intel_sst_drv_interface.c @@ -53,6 +53,13 @@ int sst_download_fw(void) if (sst_drv_ctx->sst_state != SST_UN_INIT) return -EPERM; + /* Reload firmware is not needed for MRST */ + if ( (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) && sst_drv_ctx->fw_downloaded) { + pr_debug("FW already downloaded, skip for MRST platform\n"); + sst_drv_ctx->sst_state = SST_FW_RUNNING; + return 0; + } + snprintf(name, sizeof(name), "%s%04x%s", "fw_sst_", sst_drv_ctx->pci_id, ".bin"); @@ -71,6 +78,9 @@ int sst_download_fw(void) retval = sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[0]); if (retval) pr_err("fw download failed %d\n" , retval); + else + sst_drv_ctx->fw_downloaded = 1; + end_restore: release_firmware(fw_sst); sst_drv_ctx->alloc_block[0].sst_id = BLOCK_UNINIT; -- cgit v0.10.2 From 808a3b5f9b1deb7e449765192a0315e2da904553 Mon Sep 17 00:00:00 2001 From: Tomas Winkler Date: Thu, 7 Jul 2011 20:45:45 +0300 Subject: staging/easycap: remove unused macro MICROSECONDS Cc: Mike Thomas Signed-off-by: Tomas Winkler Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/easycap/easycap.h b/drivers/staging/easycap/easycap.h index bd3f7c7..7b71244 100644 --- a/drivers/staging/easycap/easycap.h +++ b/drivers/staging/easycap/easycap.h @@ -596,10 +596,6 @@ extern int easycap_debug; #define JOM(n, format, args...) do {} while (0) #endif /* CONFIG_EASYCAP_DEBUG */ -#define MICROSECONDS(X, Y) \ - ((1000000*((long long int)(X.tv_sec - Y.tv_sec))) + \ - (long long int)(X.tv_usec - Y.tv_usec)) - /*---------------------------------------------------------------------------*/ /* * (unsigned char *)P pointer to next byte pair -- cgit v0.10.2 From 73019286cddc8bba1773944a7b6b603137fd66ff Mon Sep 17 00:00:00 2001 From: Tomas Winkler Date: Thu, 7 Jul 2011 20:45:46 +0300 Subject: staging/easycap: remove oss support remove support for OSS. OSS is being deprecated and it is just plain headache to support both alsa and oss. Last I broke the compilation when OSS is enabled with the patch cdaa898b5efcc598ab1004e8f913061dc7005091 staging/easycap: kill telltale logic so this fixes also that issue. Cc: Mike Thomas Signed-off-by: Tomas Winkler Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/easycap/Kconfig b/drivers/staging/easycap/Kconfig index 6ed208c..a425a6f 100644 --- a/drivers/staging/easycap/Kconfig +++ b/drivers/staging/easycap/Kconfig @@ -1,6 +1,7 @@ config EASYCAP tristate "EasyCAP USB ID 05e1:0408 support" - depends on USB && VIDEO_DEV && (SND || SOUND_OSS_CORE) + depends on USB && VIDEO_DEV && SND + select SND_PCM ---help--- This is an integrated audio/video driver for EasyCAP cards with @@ -15,35 +16,6 @@ config EASYCAP To compile this driver as a module, choose M here: the module will be called easycap -choice - prompt "Sound Interface" - depends on EASYCAP - default EASYCAP_SND - ---help--- - -config EASYCAP_SND - bool "ALSA" - depends on SND - select SND_PCM - - ---help--- - Say 'Y' if you want to use ALSA interface - - This will disable Open Sound System (OSS) binding. - -config EASYCAP_OSS - bool "OSS (DEPRECATED)" - depends on SOUND_OSS_CORE - - ---help--- - Say 'Y' if you prefer Open Sound System (OSS) interface - - This will disable Advanced Linux Sound Architecture (ALSA) binding. - - Once binding to ALSA interface will be stable this option will be - removed. -endchoice - config EASYCAP_DEBUG bool "Enable EasyCAP driver debugging" depends on EASYCAP diff --git a/drivers/staging/easycap/Makefile b/drivers/staging/easycap/Makefile index b13e9ac..a34e75f 100644 --- a/drivers/staging/easycap/Makefile +++ b/drivers/staging/easycap/Makefile @@ -4,9 +4,7 @@ easycap-objs += easycap_ioctl.o easycap-objs += easycap_settings.o easycap-objs += easycap_testcard.o easycap-objs += easycap_sound.o -easycap-$(CONFIG_EASYCAP_OSS) += easycap_sound_oss.o - -obj-$(CONFIG_EASYCAP) += easycap.o +obj-$(CONFIG_EASYCAP) += easycap.o ccflags-y := -Wall diff --git a/drivers/staging/easycap/easycap.h b/drivers/staging/easycap/easycap.h index 7b71244..22b24b6 100644 --- a/drivers/staging/easycap/easycap.h +++ b/drivers/staging/easycap/easycap.h @@ -69,7 +69,6 @@ #include #include -#ifndef CONFIG_EASYCAP_OSS #include #include #include @@ -78,7 +77,6 @@ #include #include #include -#endif /* !CONFIG_EASYCAP_OSS */ #include #include #include @@ -413,7 +411,6 @@ struct easycap { * ALSA */ /*---------------------------------------------------------------------------*/ -#ifndef CONFIG_EASYCAP_OSS struct snd_pcm_hardware alsa_hardware; struct snd_card *psnd_card; struct snd_pcm *psnd_pcm; @@ -421,7 +418,6 @@ struct easycap { int dma_fill; int dma_next; int dma_read; -#endif /* !CONFIG_EASYCAP_OSS */ /*---------------------------------------------------------------------------*/ /* * SOUND PROPERTIES @@ -503,12 +499,8 @@ int adjust_volume(struct easycap *, int); * AUDIO FUNCTION PROTOTYPES */ /*---------------------------------------------------------------------------*/ -#ifndef CONFIG_EASYCAP_OSS int easycap_alsa_probe(struct easycap *); void easycap_alsa_complete(struct urb *); -#else /* CONFIG_EASYCAP_OSS */ -void easyoss_complete(struct urb *); -#endif /* !CONFIG_EASYCAP_OSS */ int easycap_sound_setup(struct easycap *); int submit_audio_urbs(struct easycap *); @@ -597,30 +589,6 @@ extern int easycap_debug; #endif /* CONFIG_EASYCAP_DEBUG */ /*---------------------------------------------------------------------------*/ -/* - * (unsigned char *)P pointer to next byte pair - * (long int *)X pointer to accumulating count - * (long int *)Y pointer to accumulating sum - * (long long int *)Z pointer to accumulating sum of squares - */ -/*---------------------------------------------------------------------------*/ -#define SUMMER(P, X, Y, Z) do { \ - unsigned char *p; \ - unsigned int u0, u1, u2; \ - long int s; \ - p = (unsigned char *)(P); \ - u0 = (unsigned int) (*p); \ - u1 = (unsigned int) (*(p + 1)); \ - u2 = (unsigned int) ((u1 << 8) | u0); \ - if (0x8000 & u2) \ - s = -(long int)(0x7FFF & (~u2)); \ - else \ - s = (long int)(0x7FFF & u2); \ - *((X)) += (long int) 1; \ - *((Y)) += (long int) s; \ - *((Z)) += ((long long int)(s) * (long long int)(s)); \ -} while (0) -/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* globals @@ -633,8 +601,5 @@ extern struct easycap_format easycap_format[]; extern struct v4l2_queryctrl easycap_control[]; extern struct usb_driver easycap_usb_driver; extern struct easycap_dongle easycapdc60_dongle[]; -#ifdef CONFIG_EASYCAP_OSS -extern struct usb_class_driver easyoss_class; -#endif /* !CONFIG_EASYCAP_OSS */ #endif /* !__EASYCAP_H__ */ diff --git a/drivers/staging/easycap/easycap_ioctl.c b/drivers/staging/easycap/easycap_ioctl.c index 80aa5d8..0accab9 100644 --- a/drivers/staging/easycap/easycap_ioctl.c +++ b/drivers/staging/easycap/easycap_ioctl.c @@ -2347,14 +2347,8 @@ long easycap_unlocked_ioctl(struct file *file, /*---------------------------------------------------------------------------*/ JOM(8, "calling wake_up on wq_video and wq_audio\n"); wake_up_interruptible(&(peasycap->wq_video)); -#ifdef CONFIG_EASYCAP_OSS - wake_up_interruptible(&(peasycap->wq_audio)); - -#else if (peasycap->psubstream) snd_pcm_period_elapsed(peasycap->psubstream); -#endif /* CONFIG_EASYCAP_OSS */ -/*---------------------------------------------------------------------------*/ break; } /* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */ diff --git a/drivers/staging/easycap/easycap_main.c b/drivers/staging/easycap/easycap_main.c index a029956..bea2816 100644 --- a/drivers/staging/easycap/easycap_main.c +++ b/drivers/staging/easycap/easycap_main.c @@ -877,20 +877,6 @@ static void easycap_delete(struct kref *pkref) JOM(4, "easyoss_delete(): isoc audio buffers freed: %i pages\n", m * (0x01 << AUDIO_ISOC_ORDER)); /*---------------------------------------------------------------------------*/ -#ifdef CONFIG_EASYCAP_OSS - JOM(4, "freeing audio buffers.\n"); - gone = 0; - for (k = 0; k < peasycap->audio_buffer_page_many; k++) { - if (peasycap->audio_buffer[k].pgo) { - free_page((unsigned long)peasycap->audio_buffer[k].pgo); - peasycap->audio_buffer[k].pgo = NULL; - peasycap->allocation_audio_page -= 1; - gone++; - } - } - JOM(4, "easyoss_delete(): audio buffers freed: %i pages\n", gone); -#endif /* CONFIG_EASYCAP_OSS */ -/*---------------------------------------------------------------------------*/ JOM(4, "freeing easycap structure.\n"); allocation_video_urb = peasycap->allocation_video_urb; allocation_video_page = peasycap->allocation_video_page; @@ -3894,32 +3880,6 @@ static int easycap_usb_probe(struct usb_interface *intf, INIT_LIST_HEAD(&(peasycap->urb_audio_head)); peasycap->purb_audio_head = &(peasycap->urb_audio_head); -#ifdef CONFIG_EASYCAP_OSS - JOM(4, "allocating an audio buffer\n"); - JOM(4, ".... scattered over %i pages\n", - peasycap->audio_buffer_page_many); - - for (k = 0; k < peasycap->audio_buffer_page_many; k++) { - if (peasycap->audio_buffer[k].pgo) { - SAM("ERROR: attempting to reallocate audio buffers\n"); - } else { - pbuf = (void *) __get_free_page(GFP_KERNEL); - if (!pbuf) { - SAM("ERROR: Could not allocate audio " - "buffer page %i\n", k); - return -ENOMEM; - } else - peasycap->allocation_audio_page += 1; - - peasycap->audio_buffer[k].pgo = pbuf; - } - peasycap->audio_buffer[k].pto = peasycap->audio_buffer[k].pgo; - } - - peasycap->audio_fill = 0; - peasycap->audio_read = 0; - JOM(4, "allocation of audio buffer done: %i pages\n", k); -#endif /* CONFIG_EASYCAP_OSS */ /*---------------------------------------------------------------------------*/ JOM(4, "allocating %i isoc audio buffers of size %i\n", AUDIO_ISOC_BUFFER_MANY, @@ -3996,11 +3956,7 @@ static int easycap_usb_probe(struct usb_interface *intf, "peasycap->audio_isoc_buffer[.].pgo;\n"); JOM(4, " purb->transfer_buffer_length = %i;\n", peasycap->audio_isoc_buffer_size); -#ifdef CONFIG_EASYCAP_OSS - JOM(4, " purb->complete = easyoss_complete;\n"); -#else /* CONFIG_EASYCAP_OSS */ JOM(4, " purb->complete = easycap_alsa_complete;\n"); -#endif /* CONFIG_EASYCAP_OSS */ JOM(4, " purb->context = peasycap;\n"); JOM(4, " purb->start_frame = 0;\n"); JOM(4, " purb->number_of_packets = %i;\n", @@ -4023,11 +3979,7 @@ static int easycap_usb_probe(struct usb_interface *intf, purb->transfer_buffer = peasycap->audio_isoc_buffer[k].pgo; purb->transfer_buffer_length = peasycap->audio_isoc_buffer_size; -#ifdef CONFIG_EASYCAP_OSS - purb->complete = easyoss_complete; -#else /* CONFIG_EASYCAP_OSS */ purb->complete = easycap_alsa_complete; -#endif /* CONFIG_EASYCAP_OSS */ purb->context = peasycap; purb->start_frame = 0; purb->number_of_packets = peasycap->audio_isoc_framesperdesc; @@ -4050,7 +4002,6 @@ static int easycap_usb_probe(struct usb_interface *intf, * THE AUDIO DEVICE CAN BE REGISTERED NOW, AS IT IS READY. */ /*---------------------------------------------------------------------------*/ -#ifndef CONFIG_EASYCAP_OSS JOM(4, "initializing ALSA card\n"); rc = easycap_alsa_probe(peasycap); @@ -4059,15 +4010,6 @@ static int easycap_usb_probe(struct usb_interface *intf, return -ENODEV; } -#else /* CONFIG_EASYCAP_OSS */ - rc = usb_register_dev(intf, &easyoss_class); - if (rc) { - SAY("ERROR: usb_register_dev() failed\n"); - usb_set_intfdata(intf, NULL); - return -ENODEV; - } - SAM("easyoss attached to minor #%d\n", intf->minor); -#endif /* CONFIG_EASYCAP_OSS */ JOM(8, "kref_get() with %i=kref.refcount.counter\n", peasycap->kref.refcount.counter); @@ -4093,7 +4035,7 @@ static int easycap_usb_probe(struct usb_interface *intf, * WHEN THIS FUNCTION IS CALLED THE EasyCAP HAS ALREADY BEEN PHYSICALLY * UNPLUGGED. HENCE peasycap->pusb_device IS NO LONGER VALID. * - * THIS FUNCTION AFFECTS BOTH OSS AND ALSA. BEWARE. + * THIS FUNCTION AFFECTS ALSA. BEWARE. */ /*---------------------------------------------------------------------------*/ static void easycap_usb_disconnect(struct usb_interface *pusb_interface) @@ -4244,19 +4186,12 @@ static void easycap_usb_disconnect(struct usb_interface *pusb_interface) JOM(4, "locked dongle[%i].mutex_audio\n", kd); } else SAY("ERROR: %i=kd is bad: cannot lock dongle\n", kd); -#ifndef CONFIG_EASYCAP_OSS if (0 != snd_card_free(peasycap->psnd_card)) { SAY("ERROR: snd_card_free() failed\n"); } else { peasycap->psnd_card = NULL; (peasycap->registered_audio)--; } -#else /* CONFIG_EASYCAP_OSS */ - usb_deregister_dev(pusb_interface, &easyoss_class); - peasycap->registered_audio--; - JOM(4, "intf[%i]: usb_deregister_dev()\n", bInterfaceNumber); - SAM("easyoss detached from minor #%d\n", minor); -#endif /* CONFIG_EASYCAP_OSS */ if (0 <= kd && DONGLE_MANY > kd) { mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); JOM(4, "unlocked dongle[%i].mutex_audio\n", kd); diff --git a/drivers/staging/easycap/easycap_sound.c b/drivers/staging/easycap/easycap_sound.c index 9218d81..213d040 100644 --- a/drivers/staging/easycap/easycap_sound.c +++ b/drivers/staging/easycap/easycap_sound.c @@ -30,7 +30,6 @@ #include "easycap.h" -#ifndef CONFIG_EASYCAP_OSS /*--------------------------------------------------------------------------*/ /* * PARAMETERS USED WHEN REGISTERING THE AUDIO INTERFACE @@ -615,7 +614,6 @@ int easycap_alsa_probe(struct easycap *peasycap) SAM("registered %s\n", &psnd_card->id[0]); return 0; } -#endif /*! CONFIG_EASYCAP_OSS */ /*****************************************************************************/ /*****************************************************************************/ @@ -733,11 +731,7 @@ submit_audio_urbs(struct easycap *peasycap) purb->transfer_flags = URB_ISO_ASAP; purb->transfer_buffer = peasycap->audio_isoc_buffer[isbuf].pgo; purb->transfer_buffer_length = peasycap->audio_isoc_buffer_size; -#ifdef CONFIG_EASYCAP_OSS - purb->complete = easyoss_complete; -#else /* CONFIG_EASYCAP_OSS */ purb->complete = easycap_alsa_complete; -#endif /* CONFIG_EASYCAP_OSS */ purb->context = peasycap; purb->start_frame = 0; purb->number_of_packets = peasycap->audio_isoc_framesperdesc; diff --git a/drivers/staging/easycap/easycap_sound_oss.c b/drivers/staging/easycap/easycap_sound_oss.c deleted file mode 100644 index d92baf2..0000000 --- a/drivers/staging/easycap/easycap_sound_oss.c +++ /dev/null @@ -1,954 +0,0 @@ -/****************************************************************************** -* * -* easycap_sound.c * -* * -* Audio driver for EasyCAP USB2.0 Video Capture Device DC60 * -* * -* * -******************************************************************************/ -/* - * - * Copyright (C) 2010 R.M. Thomas - * - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * The software is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this software; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * -*/ -/*****************************************************************************/ - -#include "easycap.h" - -/*****************************************************************************/ -/**************************** **************************/ -/**************************** Open Sound System **************************/ -/**************************** **************************/ -/*****************************************************************************/ -/*--------------------------------------------------------------------------*/ -/* - * PARAMETERS USED WHEN REGISTERING THE AUDIO INTERFACE - */ -/*--------------------------------------------------------------------------*/ -/*****************************************************************************/ -/*---------------------------------------------------------------------------*/ -/* - * ON COMPLETION OF AN AUDIO URB ITS DATA IS COPIED TO THE AUDIO BUFFERS - * PROVIDED peasycap->audio_idle IS ZERO. REGARDLESS OF THIS BEING TRUE, - * IT IS RESUBMITTED PROVIDED peasycap->audio_isoc_streaming IS NOT ZERO. - */ -/*---------------------------------------------------------------------------*/ -void -easyoss_complete(struct urb *purb) -{ - struct easycap *peasycap; - struct data_buffer *paudio_buffer; - u8 *p1, *p2; - s16 tmp; - int i, j, more, much, leap, rc; -#ifdef UPSAMPLE - int k; - s16 oldaudio, newaudio, delta; -#endif /*UPSAMPLE*/ - - JOT(16, "\n"); - - if (!purb) { - SAY("ERROR: purb is NULL\n"); - return; - } - peasycap = purb->context; - if (!peasycap) { - SAY("ERROR: peasycap is NULL\n"); - return; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap\n"); - return; - } - much = 0; - if (peasycap->audio_idle) { - JOM(16, "%i=audio_idle %i=audio_isoc_streaming\n", - peasycap->audio_idle, peasycap->audio_isoc_streaming); - if (peasycap->audio_isoc_streaming) { - rc = usb_submit_urb(purb, GFP_ATOMIC); - if (rc) { - if (-ENODEV != rc && -ENOENT != rc) { - SAM("ERROR: while %i=audio_idle, " - "usb_submit_urb() failed with rc: -%s: %d\n", - peasycap->audio_idle, - strerror(rc), rc); - } - } - } - return; - } -/*---------------------------------------------------------------------------*/ - if (purb->status) { - if ((-ESHUTDOWN == purb->status) || (-ENOENT == purb->status)) { - JOM(16, "urb status -ESHUTDOWN or -ENOENT\n"); - return; - } - SAM("ERROR: non-zero urb status: -%s: %d\n", - strerror(purb->status), purb->status); - goto resubmit; - } -/*---------------------------------------------------------------------------*/ -/* - * PROCEED HERE WHEN NO ERROR - */ -/*---------------------------------------------------------------------------*/ -#ifdef UPSAMPLE - oldaudio = peasycap->oldaudio; -#endif /*UPSAMPLE*/ - - for (i = 0; i < purb->number_of_packets; i++) { - if (!purb->iso_frame_desc[i].status) { - - SAM("-%s\n", strerror(purb->iso_frame_desc[i].status)); - - more = purb->iso_frame_desc[i].actual_length; - - if (!more) - peasycap->audio_mt++; - else { - if (peasycap->audio_mt) { - JOM(12, "%4i empty audio urb frames\n", - peasycap->audio_mt); - peasycap->audio_mt = 0; - } - - p1 = (u8 *)(purb->transfer_buffer + purb->iso_frame_desc[i].offset); - - leap = 0; - p1 += leap; - more -= leap; - /* - * COPY more BYTES FROM ISOC BUFFER - * TO AUDIO BUFFER, CONVERTING - * 8-BIT MONO TO 16-BIT SIGNED - * LITTLE-ENDIAN SAMPLES IF NECESSARY - */ - while (more) { - if (0 > more) { - SAM("MISTAKE: more is negative\n"); - return; - } - if (peasycap->audio_buffer_page_many <= peasycap->audio_fill) { - SAM("ERROR: bad peasycap->audio_fill\n"); - return; - } - - paudio_buffer = &peasycap->audio_buffer[peasycap->audio_fill]; - if (PAGE_SIZE < (paudio_buffer->pto - paudio_buffer->pgo)) { - SAM("ERROR: bad paudio_buffer->pto\n"); - return; - } - if (PAGE_SIZE == (paudio_buffer->pto - paudio_buffer->pgo)) { - - paudio_buffer->pto = paudio_buffer->pgo; - (peasycap->audio_fill)++; - if (peasycap->audio_buffer_page_many <= peasycap->audio_fill) - peasycap->audio_fill = 0; - - JOM(8, "bumped peasycap->" - "audio_fill to %i\n", - peasycap->audio_fill); - - paudio_buffer = &peasycap->audio_buffer[peasycap->audio_fill]; - paudio_buffer->pto = paudio_buffer->pgo; - - if (!(peasycap->audio_fill % peasycap->audio_pages_per_fragment)) { - JOM(12, "wakeup call on wq_audio, %i=frag reading %i=fragment fill\n", - (peasycap->audio_read / peasycap->audio_pages_per_fragment), - (peasycap->audio_fill / peasycap->audio_pages_per_fragment)); - wake_up_interruptible(&(peasycap->wq_audio)); - } - } - - much = PAGE_SIZE - (int)(paudio_buffer->pto - paudio_buffer->pgo); - - if (!peasycap->microphone) { - if (much > more) - much = more; - - memcpy(paudio_buffer->pto, p1, much); - p1 += much; - more -= much; - } else { -#ifdef UPSAMPLE - if (much % 16) - JOM(8, "MISTAKE? much" - " is not divisible by 16\n"); - if (much > (16 * more)) - much = 16 * more; - p2 = (u8 *)paudio_buffer->pto; - - for (j = 0; j < (much/16); j++) { - newaudio = ((int) *p1) - 128; - newaudio = 128 * newaudio; - - delta = (newaudio - oldaudio) / 4; - tmp = oldaudio + delta; - - for (k = 0; k < 4; k++) { - *p2 = (0x00FF & tmp); - *(p2 + 1) = (0xFF00 & tmp) >> 8; - p2 += 2; - *p2 = (0x00FF & tmp); - *(p2 + 1) = (0xFF00 & tmp) >> 8; - p2 += 2; - - tmp += delta; - } - p1++; - more--; - oldaudio = tmp; - } -#else /*!UPSAMPLE*/ - if (much > (2 * more)) - much = 2 * more; - p2 = (u8 *)paudio_buffer->pto; - - for (j = 0; j < (much / 2); j++) { - tmp = ((int) *p1) - 128; - tmp = 128 * tmp; - *p2 = (0x00FF & tmp); - *(p2 + 1) = (0xFF00 & tmp) >> 8; - p1++; - p2 += 2; - more--; - } -#endif /*UPSAMPLE*/ - } - (paudio_buffer->pto) += much; - } - } - } else { - JOM(12, "discarding audio samples because " - "%i=purb->iso_frame_desc[i].status\n", - purb->iso_frame_desc[i].status); - } - -#ifdef UPSAMPLE - peasycap->oldaudio = oldaudio; -#endif /*UPSAMPLE*/ - - } -/*---------------------------------------------------------------------------*/ -/* - * RESUBMIT THIS URB - */ -/*---------------------------------------------------------------------------*/ -resubmit: - if (peasycap->audio_isoc_streaming) { - rc = usb_submit_urb(purb, GFP_ATOMIC); - if (rc) { - if (-ENODEV != rc && -ENOENT != rc) { - SAM("ERROR: while %i=audio_idle, " - "usb_submit_urb() failed " - "with rc: -%s: %d\n", peasycap->audio_idle, - strerror(rc), rc); - } - } - } - return; -} -/*****************************************************************************/ -/*---------------------------------------------------------------------------*/ -/* - * THE AUDIO URBS ARE SUBMITTED AT THIS EARLY STAGE SO THAT IT IS POSSIBLE TO - * STREAM FROM /dev/easyoss1 WITH SIMPLE PROGRAMS SUCH AS cat WHICH DO NOT - * HAVE AN IOCTL INTERFACE. - */ -/*---------------------------------------------------------------------------*/ -static int easyoss_open(struct inode *inode, struct file *file) -{ - struct usb_interface *pusb_interface; - struct easycap *peasycap; - int subminor; - struct v4l2_device *pv4l2_device; - - JOT(4, "begins\n"); - - subminor = iminor(inode); - - pusb_interface = usb_find_interface(&easycap_usb_driver, subminor); - if (!pusb_interface) { - SAY("ERROR: pusb_interface is NULL\n"); - SAY("ending unsuccessfully\n"); - return -1; - } - peasycap = usb_get_intfdata(pusb_interface); - if (!peasycap) { - SAY("ERROR: peasycap is NULL\n"); - SAY("ending unsuccessfully\n"); - return -1; - } -/*---------------------------------------------------------------------------*/ -/* - * SOME VERSIONS OF THE videodev MODULE OVERWRITE THE DATA WHICH HAS - * BEEN WRITTEN BY THE CALL TO usb_set_intfdata() IN easycap_usb_probe(), - * REPLACING IT WITH A POINTER TO THE EMBEDDED v4l2_device STRUCTURE. - * TO DETECT THIS, THE STRING IN THE easycap.telltale[] BUFFER IS CHECKED. -*/ -/*---------------------------------------------------------------------------*/ - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - pv4l2_device = usb_get_intfdata(pusb_interface); - if (!pv4l2_device) { - SAY("ERROR: pv4l2_device is NULL\n"); - return -EFAULT; - } - peasycap = container_of(pv4l2_device, - struct easycap, v4l2_device); - } -/*---------------------------------------------------------------------------*/ - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap: %p\n", peasycap); - return -EFAULT; - } -/*---------------------------------------------------------------------------*/ - - file->private_data = peasycap; - - if (0 != easycap_sound_setup(peasycap)) { - ; - ; - } - return 0; -} -/*****************************************************************************/ -static int easyoss_release(struct inode *inode, struct file *file) -{ - struct easycap *peasycap; - - JOT(4, "begins\n"); - - peasycap = file->private_data; - if (!peasycap) { - SAY("ERROR: peasycap is NULL.\n"); - return -EFAULT; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap: %p\n", peasycap); - return -EFAULT; - } - if (0 != kill_audio_urbs(peasycap)) { - SAM("ERROR: kill_audio_urbs() failed\n"); - return -EFAULT; - } - JOM(4, "ending successfully\n"); - return 0; -} -/*****************************************************************************/ -static ssize_t easyoss_read(struct file *file, char __user *puserspacebuffer, - size_t kount, loff_t *poff) -{ - struct timeval timeval; - long long int above, below, mean; - struct signed_div_result sdr; - unsigned char *p0; - long int kount1, more, rc, l0, lm; - int fragment, kd; - struct easycap *peasycap; - struct data_buffer *pdata_buffer; - size_t szret; - -/*---------------------------------------------------------------------------*/ -/* - * DO A BLOCKING READ TO TRANSFER DATA TO USER SPACE. - * - ****************************************************************************** - ***** N.B. IF THIS FUNCTION RETURNS 0, NOTHING IS SEEN IN USER SPACE. ****** - ***** THIS CONDITION SIGNIFIES END-OF-FILE. ****** - ****************************************************************************** - */ -/*---------------------------------------------------------------------------*/ - - JOT(8, "%5zd=kount %5lld=*poff\n", kount, *poff); - - if (!file) { - SAY("ERROR: file is NULL\n"); - return -ERESTARTSYS; - } - peasycap = file->private_data; - if (!peasycap) { - SAY("ERROR in easyoss_read(): peasycap is NULL\n"); - return -EFAULT; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap: %p\n", peasycap); - return -EFAULT; - } - if (!peasycap->pusb_device) { - SAY("ERROR: peasycap->pusb_device is NULL\n"); - return -EFAULT; - } - kd = isdongle(peasycap); - if (0 <= kd && DONGLE_MANY > kd) { - if (mutex_lock_interruptible(&(easycapdc60_dongle[kd].mutex_audio))) { - SAY("ERROR: " - "cannot lock dongle[%i].mutex_audio\n", kd); - return -ERESTARTSYS; - } - JOM(4, "locked dongle[%i].mutex_audio\n", kd); - /* - * MEANWHILE, easycap_usb_disconnect() - * MAY HAVE FREED POINTER peasycap, - * IN WHICH CASE A REPEAT CALL TO isdongle() WILL FAIL. - * IF NECESSARY, BAIL OUT. - */ - if (kd != isdongle(peasycap)) - return -ERESTARTSYS; - if (!file) { - SAY("ERROR: file is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - peasycap = file->private_data; - if (!peasycap) { - SAY("ERROR: peasycap is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap: %p\n", peasycap); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - if (!peasycap->pusb_device) { - SAM("ERROR: peasycap->pusb_device is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - } else { - /* - * IF easycap_usb_disconnect() - * HAS ALREADY FREED POINTER peasycap BEFORE THE - * ATTEMPT TO ACQUIRE THE SEMAPHORE, - * isdongle() WILL HAVE FAILED. BAIL OUT. - */ - return -ERESTARTSYS; - } -/*---------------------------------------------------------------------------*/ - JOT(16, "%sBLOCKING kount=%zd, *poff=%lld\n", - (file->f_flags & O_NONBLOCK) ? "NON" : "", kount, *poff); - - if ((0 > peasycap->audio_read) || - (peasycap->audio_buffer_page_many <= peasycap->audio_read)) { - SAM("ERROR: peasycap->audio_read out of range\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - pdata_buffer = &peasycap->audio_buffer[peasycap->audio_read]; - if (!pdata_buffer) { - SAM("ERROR: pdata_buffer is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(12, "before wait, %i=frag read %i=frag fill\n", - (peasycap->audio_read / peasycap->audio_pages_per_fragment), - (peasycap->audio_fill / peasycap->audio_pages_per_fragment)); - fragment = (peasycap->audio_read / peasycap->audio_pages_per_fragment); - while ((fragment == (peasycap->audio_fill / peasycap->audio_pages_per_fragment)) || - (0 == (PAGE_SIZE - (pdata_buffer->pto - pdata_buffer->pgo)))) { - if (file->f_flags & O_NONBLOCK) { - JOM(16, "returning -EAGAIN as instructed\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EAGAIN; - } - rc = wait_event_interruptible(peasycap->wq_audio, - (peasycap->audio_idle || peasycap->audio_eof || - ((fragment != - (peasycap->audio_fill / peasycap->audio_pages_per_fragment)) && - (0 < (PAGE_SIZE - (pdata_buffer->pto - pdata_buffer->pgo)))))); - if (rc) { - SAM("aborted by signal\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - if (peasycap->audio_eof) { - JOM(8, "returning 0 because %i=audio_eof\n", - peasycap->audio_eof); - kill_audio_urbs(peasycap); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return 0; - } - if (peasycap->audio_idle) { - JOM(16, "returning 0 because %i=audio_idle\n", - peasycap->audio_idle); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return 0; - } - if (!peasycap->audio_isoc_streaming) { - JOM(16, "returning 0 because audio urbs not streaming\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return 0; - } - } - JOM(12, "after wait, %i=frag read %i=frag fill\n", - (peasycap->audio_read / peasycap->audio_pages_per_fragment), - (peasycap->audio_fill / peasycap->audio_pages_per_fragment)); - szret = (size_t)0; - fragment = (peasycap->audio_read / peasycap->audio_pages_per_fragment); - while (fragment == (peasycap->audio_read / peasycap->audio_pages_per_fragment)) { - if (!pdata_buffer->pgo) { - SAM("ERROR: pdata_buffer->pgo is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - if (!pdata_buffer->pto) { - SAM("ERROR: pdata_buffer->pto is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - kount1 = PAGE_SIZE - (pdata_buffer->pto - pdata_buffer->pgo); - if (0 > kount1) { - SAM("MISTAKE: kount1 is negative\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - if (!kount1) { - peasycap->audio_read++; - if (peasycap->audio_buffer_page_many <= peasycap->audio_read) - peasycap->audio_read = 0; - JOM(12, "bumped peasycap->audio_read to %i\n", - peasycap->audio_read); - - if (fragment != (peasycap->audio_read / peasycap->audio_pages_per_fragment)) - break; - - if ((0 > peasycap->audio_read) || - (peasycap->audio_buffer_page_many <= peasycap->audio_read)) { - SAM("ERROR: peasycap->audio_read out of range\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - pdata_buffer = &peasycap->audio_buffer[peasycap->audio_read]; - if (!pdata_buffer) { - SAM("ERROR: pdata_buffer is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - if (!pdata_buffer->pgo) { - SAM("ERROR: pdata_buffer->pgo is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - if (!pdata_buffer->pto) { - SAM("ERROR: pdata_buffer->pto is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - kount1 = PAGE_SIZE - (pdata_buffer->pto - pdata_buffer->pgo); - } - JOM(12, "ready to send %zd bytes\n", kount1); - JOM(12, "still to send %li bytes\n", (long int) kount); - more = kount1; - if (more > kount) - more = kount; - JOM(12, "agreed to send %li bytes from page %i\n", - more, peasycap->audio_read); - if (!more) - break; - - /* - * ACCUMULATE DYNAMIC-RANGE INFORMATION - */ - p0 = (unsigned char *)pdata_buffer->pgo; - l0 = 0; - lm = more/2; - while (l0 < lm) { - SUMMER(p0, &peasycap->audio_sample, - &peasycap->audio_niveau, - &peasycap->audio_square); - l0++; - p0 += 2; - } - /*-----------------------------------------------------------*/ - rc = copy_to_user(puserspacebuffer, pdata_buffer->pto, more); - if (rc) { - SAM("ERROR: copy_to_user() returned %li\n", rc); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - *poff += (loff_t)more; - szret += (size_t)more; - pdata_buffer->pto += more; - puserspacebuffer += more; - kount -= (size_t)more; - } - JOM(12, "after read, %i=frag read %i=frag fill\n", - (peasycap->audio_read / peasycap->audio_pages_per_fragment), - (peasycap->audio_fill / peasycap->audio_pages_per_fragment)); - if (kount < 0) { - SAM("MISTAKE: %li=kount %li=szret\n", - (long int)kount, (long int)szret); - } -/*---------------------------------------------------------------------------*/ -/* - * CALCULATE DYNAMIC RANGE FOR (VAPOURWARE) AUTOMATIC VOLUME CONTROL - */ -/*---------------------------------------------------------------------------*/ - if (peasycap->audio_sample) { - below = peasycap->audio_sample; - above = peasycap->audio_square; - sdr = signed_div(above, below); - above = sdr.quotient; - mean = peasycap->audio_niveau; - sdr = signed_div(mean, peasycap->audio_sample); - - JOM(8, "%8lli=mean %8lli=meansquare after %lli samples, =>\n", - sdr.quotient, above, peasycap->audio_sample); - - sdr = signed_div(above, 32768); - JOM(8, "audio dynamic range is roughly %lli\n", sdr.quotient); - } -/*---------------------------------------------------------------------------*/ -/* - * UPDATE THE AUDIO CLOCK - */ -/*---------------------------------------------------------------------------*/ - do_gettimeofday(&timeval); - if (!peasycap->timeval1.tv_sec) { - peasycap->audio_bytes = 0; - peasycap->timeval3 = timeval; - peasycap->timeval1 = peasycap->timeval3; - sdr.quotient = 192000; - } else { - peasycap->audio_bytes += (long long int) szret; - below = ((long long int)(1000000)) * - ((long long int)(timeval.tv_sec - peasycap->timeval3.tv_sec)) + - (long long int)(timeval.tv_usec - peasycap->timeval3.tv_usec); - above = 1000000 * ((long long int) peasycap->audio_bytes); - - if (below) - sdr = signed_div(above, below); - else - sdr.quotient = 192000; - } - JOM(8, "audio streaming at %lli bytes/second\n", sdr.quotient); - peasycap->dnbydt = sdr.quotient; - - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - JOM(4, "unlocked easycapdc60_dongle[%i].mutex_audio\n", kd); - JOM(8, "returning %li\n", (long int)szret); - return szret; - -} -/*---------------------------------------------------------------------------*/ -static long easyoss_unlocked_ioctl(struct file *file, - unsigned int cmd, unsigned long arg) -{ - struct easycap *peasycap; - struct usb_device *p; - int kd; - - if (!file) { - SAY("ERROR: file is NULL\n"); - return -ERESTARTSYS; - } - peasycap = file->private_data; - if (!peasycap) { - SAY("ERROR: peasycap is NULL.\n"); - return -EFAULT; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap\n"); - return -EFAULT; - } - p = peasycap->pusb_device; - if (!p) { - SAM("ERROR: peasycap->pusb_device is NULL\n"); - return -EFAULT; - } - kd = isdongle(peasycap); - if (0 <= kd && DONGLE_MANY > kd) { - if (mutex_lock_interruptible(&easycapdc60_dongle[kd].mutex_audio)) { - SAY("ERROR: cannot lock " - "easycapdc60_dongle[%i].mutex_audio\n", kd); - return -ERESTARTSYS; - } - JOM(4, "locked easycapdc60_dongle[%i].mutex_audio\n", kd); - /* - * MEANWHILE, easycap_usb_disconnect() - * MAY HAVE FREED POINTER peasycap, - * IN WHICH CASE A REPEAT CALL TO isdongle() WILL FAIL. - * IF NECESSARY, BAIL OUT. - */ - if (kd != isdongle(peasycap)) - return -ERESTARTSYS; - if (!file) { - SAY("ERROR: file is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - peasycap = file->private_data; - if (!peasycap) { - SAY("ERROR: peasycap is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - if (memcmp(&peasycap->telltale[0], TELLTALE, strlen(TELLTALE))) { - SAY("ERROR: bad peasycap\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - p = peasycap->pusb_device; - if (!peasycap->pusb_device) { - SAM("ERROR: peasycap->pusb_device is NULL\n"); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ERESTARTSYS; - } - } else { - /* - * IF easycap_usb_disconnect() - * HAS ALREADY FREED POINTER peasycap BEFORE THE - * ATTEMPT TO ACQUIRE THE SEMAPHORE, - * isdongle() WILL HAVE FAILED. BAIL OUT. - */ - return -ERESTARTSYS; - } -/*---------------------------------------------------------------------------*/ - switch (cmd) { - case SNDCTL_DSP_GETCAPS: { - int caps; - JOM(8, "SNDCTL_DSP_GETCAPS\n"); - -#ifdef UPSAMPLE - if (peasycap->microphone) - caps = 0x04400000; - else - caps = 0x04400000; -#else - if (peasycap->microphone) - caps = 0x02400000; - else - caps = 0x04400000; -#endif /*UPSAMPLE*/ - - if (copy_to_user((void __user *)arg, &caps, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_GETFMTS: { - int incoming; - JOM(8, "SNDCTL_DSP_GETFMTS\n"); - -#ifdef UPSAMPLE - if (peasycap->microphone) - incoming = AFMT_S16_LE; - else - incoming = AFMT_S16_LE; -#else - if (peasycap->microphone) - incoming = AFMT_S16_LE; - else - incoming = AFMT_S16_LE; -#endif /*UPSAMPLE*/ - - if (copy_to_user((void __user *)arg, &incoming, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_SETFMT: { - int incoming, outgoing; - JOM(8, "SNDCTL_DSP_SETFMT\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - -#ifdef UPSAMPLE - if (peasycap->microphone) - outgoing = AFMT_S16_LE; - else - outgoing = AFMT_S16_LE; -#else - if (peasycap->microphone) - outgoing = AFMT_S16_LE; - else - outgoing = AFMT_S16_LE; -#endif /*UPSAMPLE*/ - - if (incoming != outgoing) { - JOM(8, "........... %i=outgoing\n", outgoing); - JOM(8, " cf. %i=AFMT_S16_LE\n", AFMT_S16_LE); - JOM(8, " cf. %i=AFMT_U8\n", AFMT_U8); - if (copy_to_user((void __user *)arg, &outgoing, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EINVAL ; - } - break; - } - case SNDCTL_DSP_STEREO: { - int incoming; - JOM(8, "SNDCTL_DSP_STEREO\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - -#ifdef UPSAMPLE - if (peasycap->microphone) - incoming = 1; - else - incoming = 1; -#else - if (peasycap->microphone) - incoming = 0; - else - incoming = 1; -#endif /*UPSAMPLE*/ - - if (copy_to_user((void __user *)arg, &incoming, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_SPEED: { - int incoming; - JOM(8, "SNDCTL_DSP_SPEED\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - -#ifdef UPSAMPLE - if (peasycap->microphone) - incoming = 32000; - else - incoming = 48000; -#else - if (peasycap->microphone) - incoming = 8000; - else - incoming = 48000; -#endif /*UPSAMPLE*/ - - if (copy_to_user((void __user *)arg, &incoming, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_GETTRIGGER: { - int incoming; - JOM(8, "SNDCTL_DSP_GETTRIGGER\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - - incoming = PCM_ENABLE_INPUT; - if (copy_to_user((void __user *)arg, &incoming, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_SETTRIGGER: { - int incoming; - JOM(8, "SNDCTL_DSP_SETTRIGGER\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - JOM(8, "........... cf 0x%x=PCM_ENABLE_INPUT " - "0x%x=PCM_ENABLE_OUTPUT\n", - PCM_ENABLE_INPUT, PCM_ENABLE_OUTPUT); - ; - ; - ; - ; - break; - } - case SNDCTL_DSP_GETBLKSIZE: { - int incoming; - JOM(8, "SNDCTL_DSP_GETBLKSIZE\n"); - if (copy_from_user(&incoming, (void __user *)arg, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - JOM(8, "........... %i=incoming\n", incoming); - incoming = peasycap->audio_bytes_per_fragment; - if (copy_to_user((void __user *)arg, &incoming, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case SNDCTL_DSP_GETISPACE: { - struct audio_buf_info audio_buf_info; - - JOM(8, "SNDCTL_DSP_GETISPACE\n"); - - audio_buf_info.bytes = peasycap->audio_bytes_per_fragment; - audio_buf_info.fragments = 1; - audio_buf_info.fragsize = 0; - audio_buf_info.fragstotal = 0; - - if (copy_to_user((void __user *)arg, &audio_buf_info, sizeof(int))) { - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -EFAULT; - } - break; - } - case 0x00005401: - case 0x00005402: - case 0x00005403: - case 0x00005404: - case 0x00005405: - case 0x00005406: { - JOM(8, "SNDCTL_TMR_...: 0x%08X unsupported\n", cmd); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ENOIOCTLCMD; - } - default: { - JOM(8, "ERROR: unrecognized DSP IOCTL command: 0x%08X\n", cmd); - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return -ENOIOCTLCMD; - } - } - mutex_unlock(&easycapdc60_dongle[kd].mutex_audio); - return 0; -} -/*****************************************************************************/ - -static const struct file_operations easyoss_fops = { - .owner = THIS_MODULE, - .open = easyoss_open, - .release = easyoss_release, - .unlocked_ioctl = easyoss_unlocked_ioctl, - .read = easyoss_read, - .llseek = no_llseek, -}; -struct usb_class_driver easyoss_class = { - .name = "usb/easyoss%d", - .fops = &easyoss_fops, - .minor_base = USB_SKEL_MINOR_BASE, -}; -/*****************************************************************************/ -- cgit v0.10.2 From 06c156072b1edf831dcb20d566839f4c0b6c26f2 Mon Sep 17 00:00:00 2001 From: Tracey Dent Date: Thu, 7 Jul 2011 14:17:25 -0400 Subject: Ath6kl: TODO: Fix spelling :) Change the word editign to editing Signed-off-by: Tracey Dent Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/ath6kl/TODO b/drivers/staging/ath6kl/TODO index 019df4b..7be4b46 100644 --- a/drivers/staging/ath6kl/TODO +++ b/drivers/staging/ath6kl/TODO @@ -1,7 +1,7 @@ TODO: We are working hard on cleaning up the driver. There's sooooooooo much todo -so instead of editign this file please use the wiki: +so instead of editing this file please use the wiki: http://wireless.kernel.org/en/users/Drivers/ath6kl -- cgit v0.10.2 From 84db550cbdb2859a219dc2653bafe3bbdda11708 Mon Sep 17 00:00:00 2001 From: Tracey Dent Date: Thu, 7 Jul 2011 14:17:24 -0400 Subject: Altera-stapl: Clean up makefile (-y instead of -objs) Changed Makefile to use -y instead of -objs because -objs is deprecated. Signed-off-by: Tracey Dent Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/altera-stapl/Makefile b/drivers/staging/altera-stapl/Makefile index 055f61ee..ddeede3 100644 --- a/drivers/staging/altera-stapl/Makefile +++ b/drivers/staging/altera-stapl/Makefile @@ -1,3 +1,3 @@ -altera-stapl-objs = altera-lpt.o altera-jtag.o altera-comp.o altera.o +altera-stapl-y := altera-lpt.o altera-jtag.o altera-comp.o altera.o obj-$(CONFIG_ALTERA_STAPL) += altera-stapl.o -- cgit v0.10.2 From 02cc343b83a57824b83e1c30024ec9a84e5fb3a2 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Thu, 7 Jul 2011 21:31:06 -0700 Subject: staging: brcm80211: nicpci: Neatening Remove unnecessary casts of void *. Spacing and removal of unnecessary parentheses. 80 column wrapping. Comment neatening. Signed-off-by: Joe Perches Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 4915592..3d71c59 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -38,28 +38,36 @@ #define SRSH_BD_OFFSET 6 /* word 6 */ /* chipcontrol */ -#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ +#define CHIPCTRL_4321_PLL_DOWN 0x800000/* serdes PLL down override */ /* MDIO control */ #define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ #define MDIOCTL_DIVISOR_VAL 0x2 #define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ -#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */ +#define MDIOCTL_ACCESS_DONE 0x100 /* Transaction complete */ /* MDIO Data */ #define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ #define MDIODATA_TA 0x00020000 /* Turnaround */ -#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */ -#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */ -#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */ -#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */ -#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ + +#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ #define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ #define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ -#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */ -#define MDIODATA_WRITE 0x10000000 /* write Transaction */ -#define MDIODATA_READ 0x20000000 /* Read Transaction */ -#define MDIODATA_START 0x40000000 /* start of Transaction */ +#define MDIODATA_DEVADDR_MASK 0x0f800000 + /* Physmedia devaddr Mask */ + +/* MDIO Data for older revisions < 10 */ +#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift */ +#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 + /* Regaddr Mask */ +#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift */ +#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 + /* Physmedia devaddr Mask */ + +/* Transactions flags */ +#define MDIODATA_WRITE 0x10000000 +#define MDIODATA_READ 0x20000000 +#define MDIODATA_START 0x40000000 #define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ #define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ @@ -69,21 +77,21 @@ #define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ #define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ - /* SERDES RX registers */ +/* SERDES RX registers */ #define SERDES_RX_CTRL 1 /* Rx cntrl */ #define SERDES_RX_TIMER1 2 /* Rx Timer1 */ #define SERDES_RX_CDR 6 /* CDR */ #define SERDES_RX_CDRBW 7 /* CDR BW */ - /* SERDES RX control register */ +/* SERDES RX control register */ #define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ #define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ - /* SERDES PLL registers */ +/* SERDES PLL registers */ #define SERDES_PLL_CTRL 1 /* PLL control reg */ #define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ /* Linkcontrol reg offset in PCIE Cap */ -#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */ +#define PCIE_CAP_LINKCTRL_OFFSET 16 /* offset in pcie cap */ #define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ #define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ #define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ @@ -97,9 +105,12 @@ #define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ #define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ #define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ -#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */ +#define PCIE_ASPMTIMER_EXTEND 0x01000000 + /* > rev7: + * enable extend ASPM timer + */ -/* different register spaces to access thr'u pcie indirect access */ +/* different register spaces to access thru pcie indirect access */ #define PCIE_CONFIGREGS 1 /* Access to config space */ #define PCIE_PCIEREGS 2 /* Access to pcie registers */ @@ -120,27 +131,27 @@ struct sbpciregs { u32 control; /* PCI control */ u32 PAD[3]; - u32 arbcontrol; /* PCI arbiter control */ + u32 arbcontrol; /* PCI arbiter control */ u32 clkrun; /* Clkrun Control (>=rev11) */ u32 PAD[2]; - u32 intstatus; /* Interrupt status */ + u32 intstatus; /* Interrupt status */ u32 intmask; /* Interrupt mask */ u32 sbtopcimailbox; /* Sonics to PCI mailbox */ u32 PAD[9]; - u32 bcastaddr; /* Sonics broadcast address */ - u32 bcastdata; /* Sonics broadcast data */ + u32 bcastaddr; /* Sonics broadcast address */ + u32 bcastdata; /* Sonics broadcast data */ u32 PAD[2]; u32 gpioin; /* ro: gpio input (>=rev2) */ u32 gpioout; /* rw: gpio output (>=rev2) */ - u32 gpioouten; /* rw: gpio output enable (>= rev2) */ + u32 gpioouten; /* rw: gpio output enable (>= rev2) */ u32 gpiocontrol; /* rw: gpio control (>= rev2) */ u32 PAD[36]; - u32 sbtopci0; /* Sonics to PCI translation 0 */ - u32 sbtopci1; /* Sonics to PCI translation 1 */ - u32 sbtopci2; /* Sonics to PCI translation 2 */ + u32 sbtopci0; /* Sonics to PCI translation 0 */ + u32 sbtopci1; /* Sonics to PCI translation 1 */ + u32 sbtopci2; /* Sonics to PCI translation 2 */ u32 PAD[189]; u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ - u16 sprom[36]; /* SPROM shadow Area */ + u16 sprom[36]; /* SPROM shadow Area */ u32 PAD[46]; }; @@ -148,17 +159,17 @@ struct sbpciregs { struct sbpcieregs { u32 control; /* host mode only */ u32 PAD[2]; - u32 biststatus; /* bist Status: 0x00C */ + u32 biststatus; /* bist Status: 0x00C */ u32 gpiosel; /* PCIE gpio sel: 0x010 */ - u32 gpioouten; /* PCIE gpio outen: 0x14 */ + u32 gpioouten; /* PCIE gpio outen: 0x14 */ u32 PAD[2]; - u32 intstatus; /* Interrupt status: 0x20 */ + u32 intstatus; /* Interrupt status: 0x20 */ u32 intmask; /* Interrupt mask: 0x24 */ u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ u32 PAD[53]; - u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ - u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ - u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ + u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ + u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ + u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ u32 PAD[5]; /* pcie core supports in direct access to config space */ @@ -167,16 +178,18 @@ struct sbpcieregs { /* mdio access to serdes */ u32 mdiocontrol; /* controls the mdio access: 0x128 */ - u32 mdiodata; /* Data to the mdio access: 0x12c */ + u32 mdiodata; /* Data to the mdio access: 0x12c */ /* pcie protocol phy/dllp/tlp register indirect access mechanism */ - u32 pcieindaddr; /* indirect access to the internal register: 0x130 */ + u32 pcieindaddr; /* indirect access to + * the internal register: 0x130 + */ u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ u32 PAD[177]; u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ - u16 sprom[64]; /* SPROM shadow Area */ + u16 sprom[64]; /* SPROM shadow Area */ }; struct pcicore_info { @@ -185,9 +198,11 @@ struct pcicore_info { struct sbpciregs *pciregs; } regs; /* Memory mapped register to the core */ - struct si_pub *sih; /* System interconnect handle */ + struct si_pub *sih; /* System interconnect handle */ struct pci_dev *dev; - u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */ + u8 pciecap_lcreg_offset;/* PCIE capability LCreg offset + * in the config space + */ bool pcie_pr42767; u8 pcie_polarity; u8 pcie_war_aspm_ovr; /* Override ASPM/Clkreq settings */ @@ -198,8 +213,9 @@ struct pcicore_info { /* debug/trace */ #define PCI_ERROR(args) -#define PCIE_PUB(sih) \ - (((sih)->bustype == PCI_BUS) && ((sih)->buscoretype == PCIE_CORE_ID)) +#define PCIE_PUB(sih) \ + (((sih)->bustype == PCI_BUS) && \ + ((sih)->buscoretype == PCIE_CORE_ID)) /* routines to access mdio slave device registers */ static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk); @@ -219,14 +235,17 @@ static void pcie_war_noplldown(struct pcicore_info *pi); static void pcie_war_polarity(struct pcicore_info *pi); static void pcie_war_pci_setup(struct pcicore_info *pi); -#define PCIE_ASPM(sih) ((PCIE_PUB(sih)) && (((sih)->buscorerev >= 3) && ((sih)->buscorerev <= 5))) +#define PCIE_ASPM(sih) \ + ((PCIE_PUB(sih)) && \ + (((sih)->buscorerev >= 3) && \ + ((sih)->buscorerev <= 5))) /* delay needed between the mdio control/ mdiodata register data access */ #define PR28829_DELAY() udelay(10) -/* Initialize the PCI core. It's caller's responsibility to make sure that this is done - * only once +/* Initialize the PCI core. + * It's caller's responsibility to make sure that this is done only once */ void *pcicore_init(struct si_pub *sih, void *pdev, void *regs) { @@ -244,23 +263,19 @@ void *pcicore_init(struct si_pub *sih, void *pdev, void *regs) if (sih->buscoretype == PCIE_CORE_ID) { u8 cap_ptr; - pi->regs.pcieregs = (struct sbpcieregs *) regs; + pi->regs.pcieregs = regs; cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_EXP, NULL, NULL); pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET; } else - pi->regs.pciregs = (struct sbpciregs *) regs; + pi->regs.pciregs = regs; return pi; } void pcicore_deinit(void *pch) { - struct pcicore_info *pi = (struct pcicore_info *) pch; - - if (pi == NULL) - return; - kfree(pi); + kfree(pch); } /* return cap_offset if requested capability exists in the PCI config space */ @@ -289,7 +304,9 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, if (cap_ptr == 0x00) goto end; - /* loop thr'u the capability list and see if the pcie capabilty exists */ + /* loop thru the capability list + * and see if the pcie capability exists + */ pci_read_config_byte(dev, cap_ptr, &cap_id); @@ -299,18 +316,18 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, break; pci_read_config_byte(dev, cap_ptr, &cap_id); } - if (cap_id != req_cap_id) { + if (cap_id != req_cap_id) goto end; - } + /* found the caller requested capability */ - if ((buf != NULL) && (buflen != NULL)) { + if (buf != NULL && buflen != NULL) { u8 cap_data; bufsize = *buflen; if (!bufsize) goto end; *buflen = 0; - /* copy the cpability data excluding cap ID and next ptr */ + /* copy the capability data excluding cap ID and next ptr */ cap_data = cap_ptr + 2; if ((bufsize + cap_data) > PCI_SZPCR) bufsize = PCI_SZPCR - cap_data; @@ -321,29 +338,26 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, buf++; } } - end: +end: return cap_ptr; } /* ***** Register Access API */ static uint -pcie_readreg(struct sbpcieregs *pcieregs, uint addrtype, - uint offset) +pcie_readreg(struct sbpcieregs *pcieregs, uint addrtype, uint offset) { uint retval = 0xFFFFFFFF; switch (addrtype) { case PCIE_CONFIGREGS: - W_REG((&pcieregs->configaddr), offset); + W_REG(&pcieregs->configaddr, offset); (void)R_REG((&pcieregs->configaddr)); - retval = R_REG(&(pcieregs->configdata)); + retval = R_REG(&pcieregs->configdata); break; case PCIE_PCIEREGS: - W_REG(&(pcieregs->pcieindaddr), offset); - (void)R_REG((&pcieregs->pcieindaddr)); - retval = R_REG(&(pcieregs->pcieinddata)); - break; - default: + W_REG(&pcieregs->pcieindaddr, offset); + (void)R_REG(&pcieregs->pcieindaddr); + retval = R_REG(&pcieregs->pcieinddata); break; } @@ -351,8 +365,7 @@ pcie_readreg(struct sbpcieregs *pcieregs, uint addrtype, } static uint -pcie_writereg(struct sbpcieregs *pcieregs, uint addrtype, - uint offset, uint val) +pcie_writereg(struct sbpcieregs *pcieregs, uint addrtype, uint offset, uint val) { switch (addrtype) { case PCIE_CONFIGREGS: @@ -375,20 +388,17 @@ static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk) uint mdiodata, i = 0; uint pcie_serdes_spinwait = 200; - mdiodata = - MDIODATA_START | MDIODATA_WRITE | (MDIODATA_DEV_ADDR << - MDIODATA_DEVADDR_SHF) | - (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | MDIODATA_TA | (blk << - 4); + mdiodata = (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | + (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | + (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | + (blk << 4)); W_REG(&pcieregs->mdiodata, mdiodata); PR28829_DELAY(); /* retry till the transaction is complete */ while (i < pcie_serdes_spinwait) { - if (R_REG(&(pcieregs->mdiocontrol)) & - MDIOCTL_ACCESS_DONE) { + if (R_REG(&pcieregs->mdiocontrol) & MDIOCTL_ACCESS_DONE) break; - } udelay(1000); i++; } @@ -411,26 +421,27 @@ pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, uint pcie_serdes_spinwait = 10; /* enable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), - MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL); + W_REG(&pcieregs->mdiocontrol, MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL); if (pi->sih->buscorerev >= 10) { - /* new serdes is slower in rw, using two layers of reg address mapping */ + /* new serdes is slower in rw, + * using two layers of reg address mapping + */ if (!pcie_mdiosetblock(pi, physmedia)) return 1; - mdiodata = (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | - (regaddr << MDIODATA_REGADDR_SHF); + mdiodata = ((MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | + (regaddr << MDIODATA_REGADDR_SHF)); pcie_serdes_spinwait *= 20; } else { - mdiodata = (physmedia << MDIODATA_DEVADDR_SHF_OLD) | - (regaddr << MDIODATA_REGADDR_SHF_OLD); + mdiodata = ((physmedia << MDIODATA_DEVADDR_SHF_OLD) | + (regaddr << MDIODATA_REGADDR_SHF_OLD)); } if (!write) mdiodata |= (MDIODATA_START | MDIODATA_READ | MDIODATA_TA); else - mdiodata |= - (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | *val); + mdiodata |= (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | + *val); W_REG(&pcieregs->mdiodata, mdiodata); @@ -438,16 +449,14 @@ pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, /* retry till the transaction is complete */ while (i < pcie_serdes_spinwait) { - if (R_REG(&(pcieregs->mdiocontrol)) & - MDIOCTL_ACCESS_DONE) { + if (R_REG(&pcieregs->mdiocontrol) & MDIOCTL_ACCESS_DONE) { if (!write) { PR28829_DELAY(); - *val = - (R_REG(&(pcieregs->mdiodata)) & - MDIODATA_MASK); + *val = (R_REG(&pcieregs->mdiodata) & + MDIODATA_MASK); } /* Disable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), 0); + W_REG(&pcieregs->mdiocontrol, 0); return 0; } udelay(1000); @@ -456,7 +465,7 @@ pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, PCI_ERROR(("pcie_mdioop: timed out op: %d\n", write)); /* Disable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), 0); + W_REG(&pcieregs->mdiocontrol, 0); return 1; } @@ -478,7 +487,7 @@ pcie_mdiowrite(struct pcicore_info *pi, uint physmedia, uint regaddr, uint val) /* ***** Support functions ***** */ static u8 pcie_clkreq(void *pch, u32 mask, u32 val) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; u32 reg_val; u8 offset; @@ -533,8 +542,8 @@ static void pcie_clkreq_upd(struct pcicore_info *pi, uint state) case SI_PCIDOWN: if (sih->buscorerev == 6) { /* turn on serdes PLL down */ ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, - 0); + offsetof(chipcregs_t, chipcontrol_addr), + ~0, 0); ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_data), ~0x40, 0); @@ -545,8 +554,8 @@ static void pcie_clkreq_upd(struct pcicore_info *pi, uint state) case SI_PCIUP: if (sih->buscorerev == 6) { /* turn off serdes PLL down */ ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, - 0); + offsetof(chipcregs_t, chipcontrol_addr), + ~0, 0); ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_data), ~0x40, 0x40); @@ -554,8 +563,6 @@ static void pcie_clkreq_upd(struct pcicore_info *pi, uint state) pcie_clkreq((void *)pi, 1, 0); } break; - default: - break; } } @@ -568,17 +575,16 @@ static void pcie_war_polarity(struct pcicore_info *pi) if (pi->pcie_polarity != 0) return; - w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS, - PCIE_PLP_STATUSREG); + w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS, PCIE_PLP_STATUSREG); /* Detect the current polarity at attach and force that polarity and * disable changing the polarity */ if ((w & PCIE_PLP_POLARITYINV_STAT) == 0) - pi->pcie_polarity = (SERDES_RX_CTRL_FORCE); + pi->pcie_polarity = SERDES_RX_CTRL_FORCE; else - pi->pcie_polarity = - (SERDES_RX_CTRL_FORCE | SERDES_RX_CTRL_POLARITY); + pi->pcie_polarity = (SERDES_RX_CTRL_FORCE | + SERDES_RX_CTRL_POLARITY); } /* enable ASPM and CLKREQ if srom doesn't have it */ @@ -671,7 +677,7 @@ static void pcie_war_noplldown(struct pcicore_info *pi) ai_corereg(pi->sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol), CHIPCTRL_4321_PLL_DOWN, CHIPCTRL_4321_PLL_DOWN); - /* clear srom shadow backdoor */ + /* clear srom shadow backdoor */ reg16 = &pcieregs->sprom[SRSH_BD_OFFSET]; W_REG(reg16, 0); } @@ -683,7 +689,7 @@ static void pcie_war_pci_setup(struct pcicore_info *pi) struct sbpcieregs *pcieregs = pi->regs.pcieregs; u32 w; - if ((sih->buscorerev == 0) || (sih->buscorerev == 1)) { + if (sih->buscorerev == 0 || sih->buscorerev == 1) { w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_TLP_WORKAROUNDSREG); w |= 0x8; @@ -693,7 +699,7 @@ static void pcie_war_pci_setup(struct pcicore_info *pi) if (sih->buscorerev == 1) { w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG); - w |= (0x40); + w |= 0x40; pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w); } @@ -705,8 +711,8 @@ static void pcie_war_pci_setup(struct pcicore_info *pi) /* Change the L1 threshold for better performance */ w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); - w &= ~(PCIE_L1THRESHOLDTIME_MASK); - w |= (PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT); + w &= ~PCIE_L1THRESHOLDTIME_MASK; + w |= PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT; pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w); @@ -716,7 +722,9 @@ static void pcie_war_pci_setup(struct pcicore_info *pi) } else if (pi->sih->buscorerev == 7) pcie_war_noplldown(pi); - /* Note that the fix is actually in the SROM, that's why this is open-ended */ + /* Note that the fix is actually in the SROM, + * that's why this is open-ended + */ if (pi->sih->buscorerev >= 6) pcie_misc_config_fixup(pi); } @@ -724,16 +732,15 @@ static void pcie_war_pci_setup(struct pcicore_info *pi) /* ***** Functions called during driver state changes ***** */ void pcicore_attach(void *pch, char *pvars, int state) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; struct si_pub *sih = pi->sih; /* Determine if this board needs override */ if (PCIE_ASPM(sih)) { - if ((u32) getintvar(pvars, "boardflags2") & BFL2_PCIEWAR_OVR) { + if ((u32)getintvar(pvars, "boardflags2") & BFL2_PCIEWAR_OVR) pi->pcie_war_aspm_ovr = PCIE_ASPM_DISAB; - } else { + else pi->pcie_war_aspm_ovr = PCIE_ASPM_ENAB; - } } /* These need to happen in this order only */ @@ -749,7 +756,7 @@ void pcicore_attach(void *pch, char *pvars, int state) void pcicore_hwup(void *pch) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -759,7 +766,7 @@ void pcicore_hwup(void *pch) void pcicore_up(void *pch, int state) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -770,10 +777,12 @@ void pcicore_up(void *pch, int state) pcie_clkreq_upd(pi, state); } -/* When the device is going to enter D3 state (or the system is going to enter S3/S4 states */ +/* When the device is going to enter D3 state + * (or the system is going to enter S3/S4 states) + */ void pcicore_sleep(void *pch) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; u32 w; if (!pi || !PCIE_ASPM(pi->sih)) @@ -788,7 +797,7 @@ void pcicore_sleep(void *pch) void pcicore_down(void *pch, int state) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -799,12 +808,10 @@ void pcicore_down(void *pch, int state) pcie_extendL1timer(pi, false); } -/* - * precondition: current core is sii->buscoretype - */ +/* precondition: current core is sii->buscoretype */ void pcicore_fixcfg(void *pch, void *regs) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; struct si_info *sii = SI_INFO(pi->sih); struct sbpciregs *pciregs = regs; struct sbpcieregs *pcieregs = regs; @@ -812,39 +819,32 @@ void pcicore_fixcfg(void *pch, void *regs) uint pciidx; /* check 'pi' is correct and fix it if not */ - if (sii->pub.buscoretype == PCIE_CORE_ID) { + if (sii->pub.buscoretype == PCIE_CORE_ID) reg16 = &pcieregs->sprom[SRSH_PI_OFFSET]; - } else if (sii->pub.buscoretype == PCI_CORE_ID) { + else if (sii->pub.buscoretype == PCI_CORE_ID) reg16 = &pciregs->sprom[SRSH_PI_OFFSET]; - } pciidx = ai_coreidx(&sii->pub); val16 = R_REG(reg16); - if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) { - val16 = - (u16) (pciidx << SRSH_PI_SHIFT) | (val16 & - ~SRSH_PI_MASK); + if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16)pciidx) { + val16 = (u16)(pciidx << SRSH_PI_SHIFT) | + (val16 & ~SRSH_PI_MASK); W_REG(reg16, val16); } } -/* - * precondition: current core is pci core - */ +/* precondition: current core is pci core */ void pcicore_pci_setup(void *pch, void *regs) { - struct pcicore_info *pi = (struct pcicore_info *) pch; + struct pcicore_info *pi = pch; struct sbpciregs *pciregs = regs; u32 w; - OR_REG(&pciregs->sbtopci2, - (SBTOPCI_PREF | SBTOPCI_BURST)); + OR_REG(&pciregs->sbtopci2, SBTOPCI_PREF | SBTOPCI_BURST); if (SI_INFO(pi->sih)->pub.buscorerev >= 11) { - OR_REG(&pciregs->sbtopci2, - SBTOPCI_RC_READMULTI); + OR_REG(&pciregs->sbtopci2, SBTOPCI_RC_READMULTI); w = R_REG(&pciregs->clkrun); - W_REG(&pciregs->clkrun, - (w | PCI_CLKRUN_DSBL)); + W_REG(&pciregs->clkrun, w | PCI_CLKRUN_DSBL); w = R_REG(&pciregs->clkrun); } } -- cgit v0.10.2 From 12d4f964482e59f59b2064510d168fe83e91ff04 Mon Sep 17 00:00:00 2001 From: Mark Einon Date: Thu, 7 Jul 2011 22:59:03 +0100 Subject: staging: et131x: rename adapter->Flags to adapter->flags Trivial rename of the adapter flags struct member to remove camel case. Tested on a ET-131x device. Signed-off-by: Mark Einon Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index b1a7183..e6c243a 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c @@ -229,7 +229,7 @@ void ConfigMACRegs2(struct et131x_adapter *etdev) writel(ctl, &etdev->regs->txmac.ctl); /* Ready to start the RXDMA/TXDMA engine */ - if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) { + if (etdev->flags & fMP_ADAPTER_LOWER_POWER) { et131x_rx_dma_enable(etdev); et131x_tx_dma_enable(etdev); } diff --git a/drivers/staging/et131x/et1310_pm.c b/drivers/staging/et131x/et1310_pm.c index 2bc1944..29d4d66 100644 --- a/drivers/staging/et131x/et1310_pm.c +++ b/drivers/staging/et131x/et1310_pm.c @@ -121,7 +121,7 @@ void EnablePhyComa(struct et131x_adapter *etdev) /* Stop sending packets. */ spin_lock_irqsave(&etdev->send_hw_lock, flags); - etdev->Flags |= fMP_ADAPTER_LOWER_POWER; + etdev->flags |= fMP_ADAPTER_LOWER_POWER; spin_unlock_irqrestore(&etdev->send_hw_lock, flags); /* Wait for outstanding Receive packets */ @@ -172,7 +172,7 @@ void DisablePhyComa(struct et131x_adapter *etdev) et131x_adapter_setup(etdev); /* Allow Tx to restart */ - etdev->Flags &= ~fMP_ADAPTER_LOWER_POWER; + etdev->flags &= ~fMP_ADAPTER_LOWER_POWER; /* Need to re-enable Rx. */ et131x_rx_dma_enable(etdev); diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c index fc90096..7e386e0 100644 --- a/drivers/staging/et131x/et1310_rx.c +++ b/drivers/staging/et131x/et1310_rx.c @@ -394,7 +394,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) SLAB_HWCACHE_ALIGN, NULL); - adapter->Flags |= fMP_ADAPTER_RECV_LOOKASIDE; + adapter->flags |= fMP_ADAPTER_RECV_LOOKASIDE; /* The RFDs are going to be put on lists later on, so initialize the * lists now. @@ -528,9 +528,9 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) /* Free receive packet pool */ /* Destroy the lookaside (RFD) pool */ - if (adapter->Flags & fMP_ADAPTER_RECV_LOOKASIDE) { + if (adapter->flags & fMP_ADAPTER_RECV_LOOKASIDE) { kmem_cache_destroy(rx_ring->RecvLookaside); - adapter->Flags &= ~fMP_ADAPTER_RECV_LOOKASIDE; + adapter->flags &= ~fMP_ADAPTER_RECV_LOOKASIDE; } /* Free the FBR Lookup Table */ diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c index bb67192..8b1af64 100644 --- a/drivers/staging/et131x/et1310_tx.c +++ b/drivers/staging/et131x/et1310_tx.c @@ -307,7 +307,7 @@ int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev) /* We need to see if the link is up; if it's not, make the * netif layer think we're good and drop the packet */ - if ((etdev->Flags & fMP_ADAPTER_FAIL_SEND_MASK) || + if ((etdev->flags & fMP_ADAPTER_FAIL_SEND_MASK) || !netif_carrier_ok(netdev)) { dev_kfree_skb_any(skb); skb = NULL; diff --git a/drivers/staging/et131x/et131x_adapter.h b/drivers/staging/et131x/et131x_adapter.h index 39051df..408c50b 100644 --- a/drivers/staging/et131x/et131x_adapter.h +++ b/drivers/staging/et131x/et131x_adapter.h @@ -150,7 +150,7 @@ struct et131x_adapter { struct work_struct task; /* Flags that indicate current state of the adapter */ - u32 Flags; + u32 flags; u32 HwErrCount; /* Configuration */ diff --git a/drivers/staging/et131x/et131x_netdev.c b/drivers/staging/et131x/et131x_netdev.c index 6bcddf1..5f25bba 100644 --- a/drivers/staging/et131x/et131x_netdev.c +++ b/drivers/staging/et131x/et131x_netdev.c @@ -162,7 +162,7 @@ int et131x_open(struct net_device *netdev) /* Enable device interrupts */ et131x_enable_interrupts(adapter); - adapter->Flags |= fMP_ADAPTER_INTERRUPT_IN_USE; + adapter->flags |= fMP_ADAPTER_INTERRUPT_IN_USE; /* We're ready to move some data, so start the queue */ netif_start_queue(netdev); @@ -190,7 +190,7 @@ int et131x_close(struct net_device *netdev) et131x_disable_interrupts(adapter); /* Deregistering ISR */ - adapter->Flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE; + adapter->flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE; free_irq(netdev->irq, netdev); /* Stop the error timer */ @@ -449,11 +449,11 @@ void et131x_tx_timeout(struct net_device *netdev) /* Any nonrecoverable hardware error? * Checks adapter->flags for any failure in phy reading */ - if (etdev->Flags & fMP_ADAPTER_NON_RECOVER_ERROR) + if (etdev->flags & fMP_ADAPTER_NON_RECOVER_ERROR) return; /* Hardware failure? */ - if (etdev->Flags & fMP_ADAPTER_HARDWARE_ERROR) { + if (etdev->flags & fMP_ADAPTER_HARDWARE_ERROR) { dev_err(&etdev->pdev->dev, "hardware error - reset\n"); return; } @@ -471,7 +471,7 @@ void et131x_tx_timeout(struct net_device *netdev) flags); dev_warn(&etdev->pdev->dev, - "Send stuck - reset. tcb->WrIndex %x, Flags 0x%08x\n", + "Send stuck - reset. tcb->WrIndex %x, flags 0x%08x\n", tcb->index, tcb->flags); @@ -540,7 +540,7 @@ int et131x_change_mtu(struct net_device *netdev, int new_mtu) et131x_adapter_setup(adapter); /* Enable interrupts */ - if (adapter->Flags & fMP_ADAPTER_INTERRUPT_IN_USE) + if (adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE) et131x_enable_interrupts(adapter); /* Restart the Tx and Rx DMA engines */ @@ -622,7 +622,7 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac) et131x_adapter_setup(adapter); /* Enable interrupts */ - if (adapter->Flags & fMP_ADAPTER_INTERRUPT_IN_USE) + if (adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE) et131x_enable_interrupts(adapter); /* Restart the Tx and Rx DMA engines */ -- cgit v0.10.2 From 4af1c77fa618f077c23984f51aed0b0daca9fd45 Mon Sep 17 00:00:00 2001 From: Mark Einon Date: Thu, 7 Jul 2011 22:59:04 +0100 Subject: staging: et131x: Convert et1310_address_map.h names from camel case Trivial name changes. Tested on an ET-131x device. Signed-off-by: Mark Einon Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h index a925300..a02335a 100644 --- a/drivers/staging/et131x/et1310_address_map.h +++ b/drivers/staging/et131x/et1310_address_map.h @@ -267,19 +267,19 @@ struct txdma_regs { /* Location: */ u32 service_complete; /* 0x1028 */ u32 cache_rd_index; /* 0x102C */ u32 cache_wr_index; /* 0x1030 */ - u32 TxDmaError; /* 0x1034 */ - u32 DescAbortCount; /* 0x1038 */ - u32 PayloadAbortCnt; /* 0x103c */ - u32 WriteBackAbortCnt; /* 0x1040 */ - u32 DescTimeoutCnt; /* 0x1044 */ - u32 PayloadTimeoutCnt; /* 0x1048 */ - u32 WriteBackTimeoutCnt; /* 0x104c */ - u32 DescErrorCount; /* 0x1050 */ - u32 PayloadErrorCnt; /* 0x1054 */ - u32 WriteBackErrorCnt; /* 0x1058 */ - u32 DroppedTLPCount; /* 0x105c */ - u32 NewServiceComplete; /* 0x1060 */ - u32 EthernetPacketCount; /* 0x1064 */ + u32 tx_dma_error; /* 0x1034 */ + u32 desc_abort_cnt; /* 0x1038 */ + u32 payload_abort_cnt; /* 0x103c */ + u32 writeback_abort_cnt; /* 0x1040 */ + u32 desc_timeout_cnt; /* 0x1044 */ + u32 payload_timeout_cnt; /* 0x1048 */ + u32 writeback_timeout_cnt; /* 0x104c */ + u32 desc_error_cnt; /* 0x1050 */ + u32 payload_error_cnt; /* 0x1054 */ + u32 writeback_error_cnt; /* 0x1058 */ + u32 dropped_tlp_cnt; /* 0x105c */ + u32 new_service_complete; /* 0x1060 */ + u32 ethernet_packet_cnt; /* 0x1064 */ }; /* END OF TXDMA REGISTER ADDRESS MAP */ @@ -1204,148 +1204,148 @@ struct macstat_regs { /* Location: */ u32 pad[32]; /* 0x6000 - 607C */ /* Tx/Rx 0-64 Byte Frame Counter */ - u32 TR64; /* 0x6080 */ + u32 txrx_0_64_byte_frames; /* 0x6080 */ /* Tx/Rx 65-127 Byte Frame Counter */ - u32 TR127; /* 0x6084 */ + u32 txrx_65_127_byte_frames; /* 0x6084 */ /* Tx/Rx 128-255 Byte Frame Counter */ - u32 TR255; /* 0x6088 */ + u32 txrx_128_255_byte_frames; /* 0x6088 */ /* Tx/Rx 256-511 Byte Frame Counter */ - u32 TR511; /* 0x608C */ + u32 txrx_256_511_byte_frames; /* 0x608C */ /* Tx/Rx 512-1023 Byte Frame Counter */ - u32 TR1K; /* 0x6090 */ + u32 txrx_512_1023_byte_frames; /* 0x6090 */ /* Tx/Rx 1024-1518 Byte Frame Counter */ - u32 TRMax; /* 0x6094 */ + u32 txrx_1024_1518_byte_frames; /* 0x6094 */ /* Tx/Rx 1519-1522 Byte Good VLAN Frame Count */ - u32 TRMgv; /* 0x6098 */ + u32 txrx_1519_1522_gvln_frames; /* 0x6098 */ /* Rx Byte Counter */ - u32 RByt; /* 0x609C */ + u32 rx_bytes; /* 0x609C */ /* Rx Packet Counter */ - u32 RPkt; /* 0x60A0 */ + u32 rx_packets; /* 0x60A0 */ /* Rx FCS Error Counter */ - u32 RFcs; /* 0x60A4 */ + u32 rx_fcs_errs; /* 0x60A4 */ /* Rx Multicast Packet Counter */ - u32 RMca; /* 0x60A8 */ + u32 rx_multicast_packets; /* 0x60A8 */ /* Rx Broadcast Packet Counter */ - u32 RBca; /* 0x60AC */ + u32 rx_broadcast_packets; /* 0x60AC */ /* Rx Control Frame Packet Counter */ - u32 RxCf; /* 0x60B0 */ + u32 rx_control_frames; /* 0x60B0 */ /* Rx Pause Frame Packet Counter */ - u32 RxPf; /* 0x60B4 */ + u32 rx_pause_frames; /* 0x60B4 */ /* Rx Unknown OP Code Counter */ - u32 RxUo; /* 0x60B8 */ + u32 rx_unknown_opcodes; /* 0x60B8 */ /* Rx Alignment Error Counter */ - u32 RAln; /* 0x60BC */ + u32 rx_align_errs; /* 0x60BC */ /* Rx Frame Length Error Counter */ - u32 RFlr; /* 0x60C0 */ + u32 rx_frame_len_errs; /* 0x60C0 */ /* Rx Code Error Counter */ - u32 RCde; /* 0x60C4 */ + u32 rx_code_errs; /* 0x60C4 */ /* Rx Carrier Sense Error Counter */ - u32 RCse; /* 0x60C8 */ + u32 rx_carrier_sense_errs; /* 0x60C8 */ /* Rx Undersize Packet Counter */ - u32 RUnd; /* 0x60CC */ + u32 rx_undersize_packets; /* 0x60CC */ /* Rx Oversize Packet Counter */ - u32 ROvr; /* 0x60D0 */ + u32 rx_oversize_packets; /* 0x60D0 */ /* Rx Fragment Counter */ - u32 RFrg; /* 0x60D4 */ + u32 rx_fragment_packets; /* 0x60D4 */ /* Rx Jabber Counter */ - u32 RJbr; /* 0x60D8 */ + u32 rx_jabbers; /* 0x60D8 */ /* Rx Drop */ - u32 RDrp; /* 0x60DC */ + u32 rx_drops; /* 0x60DC */ /* Tx Byte Counter */ - u32 TByt; /* 0x60E0 */ + u32 tx_bytes; /* 0x60E0 */ /* Tx Packet Counter */ - u32 TPkt; /* 0x60E4 */ + u32 tx_packets; /* 0x60E4 */ /* Tx Multicast Packet Counter */ - u32 TMca; /* 0x60E8 */ + u32 tx_multicast_packets; /* 0x60E8 */ /* Tx Broadcast Packet Counter */ - u32 TBca; /* 0x60EC */ + u32 tx_broadcast_packets; /* 0x60EC */ /* Tx Pause Control Frame Counter */ - u32 TxPf; /* 0x60F0 */ + u32 tx_pause_frames; /* 0x60F0 */ /* Tx Deferral Packet Counter */ - u32 TDfr; /* 0x60F4 */ + u32 tx_deferred; /* 0x60F4 */ /* Tx Excessive Deferral Packet Counter */ - u32 TEdf; /* 0x60F8 */ + u32 tx_excessive_deferred; /* 0x60F8 */ /* Tx Single Collision Packet Counter */ - u32 TScl; /* 0x60FC */ + u32 tx_single_collisions; /* 0x60FC */ /* Tx Multiple Collision Packet Counter */ - u32 TMcl; /* 0x6100 */ + u32 tx_multiple_collisions; /* 0x6100 */ /* Tx Late Collision Packet Counter */ - u32 TLcl; /* 0x6104 */ + u32 tx_late_collisions; /* 0x6104 */ /* Tx Excessive Collision Packet Counter */ - u32 TXcl; /* 0x6108 */ + u32 tx_excessive_collisions; /* 0x6108 */ /* Tx Total Collision Packet Counter */ - u32 TNcl; /* 0x610C */ + u32 tx_total_collisions; /* 0x610C */ /* Tx Pause Frame Honored Counter */ - u32 TPfh; /* 0x6110 */ + u32 tx_pause_honored_frames; /* 0x6110 */ /* Tx Drop Frame Counter */ - u32 TDrp; /* 0x6114 */ + u32 tx_drops; /* 0x6114 */ /* Tx Jabber Frame Counter */ - u32 TJbr; /* 0x6118 */ + u32 tx_jabbers; /* 0x6118 */ /* Tx FCS Error Counter */ - u32 TFcs; /* 0x611C */ + u32 tx_fcs_errs; /* 0x611C */ /* Tx Control Frame Counter */ - u32 TxCf; /* 0x6120 */ + u32 tx_control_frames; /* 0x6120 */ /* Tx Oversize Frame Counter */ - u32 TOvr; /* 0x6124 */ + u32 tx_oversize_frames; /* 0x6124 */ /* Tx Undersize Frame Counter */ - u32 TUnd; /* 0x6128 */ + u32 tx_undersize_frames; /* 0x6128 */ /* Tx Fragments Frame Counter */ - u32 TFrg; /* 0x612C */ + u32 tx_fragments; /* 0x612C */ /* Carry Register One Register */ - u32 Carry1; /* 0x6130 */ + u32 carry_reg1; /* 0x6130 */ /* Carry Register Two Register */ - u32 Carry2; /* 0x6134 */ + u32 carry_reg2; /* 0x6134 */ /* Carry Register One Mask Register */ - u32 Carry1M; /* 0x6138 */ + u32 carry_reg1_mask; /* 0x6138 */ /* Carry Register Two Mask Register */ - u32 Carry2M; /* 0x613C */ + u32 carry_reg2_mask; /* 0x613C */ }; /* END OF MAC STAT REGISTER ADDRESS MAP */ diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index e6c243a..dc3e062 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c @@ -384,31 +384,31 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev) struct macstat_regs __iomem *macstat = &etdev->regs->macstat; - /* Next we need to initialize all the MAC_STAT registers to zero on + /* Next we need to initialize all the macstat registers to zero on * the device. */ - writel(0, &macstat->RFcs); - writel(0, &macstat->RAln); - writel(0, &macstat->RFlr); - writel(0, &macstat->RDrp); - writel(0, &macstat->RCde); - writel(0, &macstat->ROvr); - writel(0, &macstat->RFrg); - - writel(0, &macstat->TScl); - writel(0, &macstat->TDfr); - writel(0, &macstat->TMcl); - writel(0, &macstat->TLcl); - writel(0, &macstat->TNcl); - writel(0, &macstat->TOvr); - writel(0, &macstat->TUnd); + writel(0, &macstat->rx_fcs_errs); + writel(0, &macstat->rx_align_errs); + writel(0, &macstat->rx_frame_len_errs); + writel(0, &macstat->rx_code_errs); + writel(0, &macstat->rx_drops); + writel(0, &macstat->rx_oversize_packets); + writel(0, &macstat->rx_fragment_packets); + + writel(0, &macstat->tx_deferred); + writel(0, &macstat->tx_single_collisions); + writel(0, &macstat->tx_multiple_collisions); + writel(0, &macstat->tx_late_collisions); + writel(0, &macstat->tx_total_collisions); + writel(0, &macstat->tx_oversize_frames); + writel(0, &macstat->tx_undersize_frames); /* Unmask any counters that we want to track the overflow of. * Initially this will be all counters. It may become clear later * that we do not need to track all counters. */ - writel(0xFFFFBE32, &macstat->Carry1M); - writel(0xFFFE7E8B, &macstat->Carry2M); + writel(0xFFFFBE32, &macstat->carry_reg1_mask); + writel(0xFFFE7E8B, &macstat->carry_reg2_mask); } void ConfigFlowControl(struct et131x_adapter *etdev) @@ -456,22 +456,22 @@ void UpdateMacStatHostCounters(struct et131x_adapter *etdev) struct macstat_regs __iomem *macstat = &etdev->regs->macstat; - stats->collisions += readl(&macstat->TNcl); - stats->first_collision += readl(&macstat->TScl); - stats->tx_deferred += readl(&macstat->TDfr); - stats->excessive_collisions += readl(&macstat->TMcl); - stats->late_collisions += readl(&macstat->TLcl); - stats->tx_uflo += readl(&macstat->TUnd); - stats->max_pkt_error += readl(&macstat->TOvr); - - stats->alignment_err += readl(&macstat->RAln); - stats->crc_err += readl(&macstat->RCde); - stats->norcvbuf += readl(&macstat->RDrp); - stats->rx_ov_flow += readl(&macstat->ROvr); - stats->code_violations += readl(&macstat->RFcs); - stats->length_err += readl(&macstat->RFlr); - - stats->other_errors += readl(&macstat->RFrg); + stats->collisions += readl(&macstat->tx_total_collisions); + stats->first_collision += readl(&macstat->tx_single_collisions); + stats->tx_deferred += readl(&macstat->tx_deferred); + stats->excessive_collisions += readl(&macstat->tx_multiple_collisions); + stats->late_collisions += readl(&macstat->tx_late_collisions); + stats->tx_uflo += readl(&macstat->tx_undersize_frames); + stats->max_pkt_error += readl(&macstat->tx_oversize_frames); + + stats->alignment_err += readl(&macstat->rx_align_errs); + stats->crc_err += readl(&macstat->rx_code_errs); + stats->norcvbuf += readl(&macstat->rx_drops); + stats->rx_ov_flow += readl(&macstat->rx_oversize_packets); + stats->code_violations += readl(&macstat->rx_fcs_errs); + stats->length_err += readl(&macstat->rx_frame_len_errs); + + stats->other_errors += readl(&macstat->rx_fragment_packets); } /** @@ -484,17 +484,17 @@ void UpdateMacStatHostCounters(struct et131x_adapter *etdev) */ void HandleMacStatInterrupt(struct et131x_adapter *etdev) { - u32 Carry1; - u32 Carry2; + u32 carry_reg1; + u32 carry_reg2; /* Read the interrupt bits from the register(s). These are Clear On * Write. */ - Carry1 = readl(&etdev->regs->macstat.Carry1); - Carry2 = readl(&etdev->regs->macstat.Carry2); + carry_reg1 = readl(&etdev->regs->macstat.carry_reg1); + carry_reg2 = readl(&etdev->regs->macstat.carry_reg2); - writel(Carry1, &etdev->regs->macstat.Carry1); - writel(Carry2, &etdev->regs->macstat.Carry2); + writel(carry_reg2, &etdev->regs->macstat.carry_reg1); + writel(carry_reg2, &etdev->regs->macstat.carry_reg2); /* We need to do update the host copy of all the MAC_STAT counters. * For each counter, check it's overflow bit. If the overflow bit is @@ -502,33 +502,33 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev) * revolution of the counter. This routine is called when the counter * block indicates that one of the counters has wrapped. */ - if (Carry1 & (1 << 14)) + if (carry_reg1 & (1 << 14)) etdev->stats.code_violations += COUNTER_WRAP_16_BIT; - if (Carry1 & (1 << 8)) + if (carry_reg1 & (1 << 8)) etdev->stats.alignment_err += COUNTER_WRAP_12_BIT; - if (Carry1 & (1 << 7)) + if (carry_reg1 & (1 << 7)) etdev->stats.length_err += COUNTER_WRAP_16_BIT; - if (Carry1 & (1 << 2)) + if (carry_reg1 & (1 << 2)) etdev->stats.other_errors += COUNTER_WRAP_16_BIT; - if (Carry1 & (1 << 6)) + if (carry_reg1 & (1 << 6)) etdev->stats.crc_err += COUNTER_WRAP_16_BIT; - if (Carry1 & (1 << 3)) + if (carry_reg1 & (1 << 3)) etdev->stats.rx_ov_flow += COUNTER_WRAP_16_BIT; - if (Carry1 & (1 << 0)) + if (carry_reg1 & (1 << 0)) etdev->stats.norcvbuf += COUNTER_WRAP_16_BIT; - if (Carry2 & (1 << 16)) + if (carry_reg2 & (1 << 16)) etdev->stats.max_pkt_error += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 15)) + if (carry_reg2 & (1 << 15)) etdev->stats.tx_uflo += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 6)) + if (carry_reg2 & (1 << 6)) etdev->stats.first_collision += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 8)) + if (carry_reg2 & (1 << 8)) etdev->stats.tx_deferred += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 5)) + if (carry_reg2 & (1 << 5)) etdev->stats.excessive_collisions += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 4)) + if (carry_reg2 & (1 << 4)) etdev->stats.late_collisions += COUNTER_WRAP_12_BIT; - if (Carry2 & (1 << 2)) + if (carry_reg2 & (1 << 2)) etdev->stats.collisions += COUNTER_WRAP_12_BIT; } diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c index 8b1af64..8fb3051 100644 --- a/drivers/staging/et131x/et1310_tx.c +++ b/drivers/staging/et131x/et1310_tx.c @@ -747,7 +747,7 @@ void et131x_handle_send_interrupt(struct et131x_adapter *etdev) struct tcb *tcb; u32 index; - serviced = readl(&etdev->regs->txdma.NewServiceComplete); + serviced = readl(&etdev->regs->txdma.new_service_complete); index = INDEX10(serviced); /* Has the ring wrapped? Process any descriptors that do not have diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c index 0a5ce80..9c33209 100644 --- a/drivers/staging/et131x/et131x_isr.c +++ b/drivers/staging/et131x/et131x_isr.c @@ -268,7 +268,7 @@ void et131x_isr_handler(struct work_struct *work) u32 txdma_err; /* Following read also clears the register (COR) */ - txdma_err = readl(&iomem->txdma.TxDmaError); + txdma_err = readl(&iomem->txdma.tx_dma_error); dev_warn(&etdev->pdev->dev, "TXDMA_ERR interrupt, error = %d\n", -- cgit v0.10.2 From 9c4715939a8fd4a9d90ef4855384481300f31c79 Mon Sep 17 00:00:00 2001 From: Mark Einon Date: Thu, 7 Jul 2011 23:38:57 +0100 Subject: staging: et131x: Remove spaces between tabs inserted in patch 7b7fb34d3ffa I must remember to run checkpatch on 'trivial' patches too... Signed-off-by: Mark Einon Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h index a02335a..410677e 100644 --- a/drivers/staging/et131x/et1310_address_map.h +++ b/drivers/staging/et131x/et1310_address_map.h @@ -1225,7 +1225,7 @@ struct macstat_regs { /* Location: */ u32 txrx_1519_1522_gvln_frames; /* 0x6098 */ /* Rx Byte Counter */ - u32 rx_bytes; /* 0x609C */ + u32 rx_bytes; /* 0x609C */ /* Rx Packet Counter */ u32 rx_packets; /* 0x60A0 */ @@ -1240,7 +1240,7 @@ struct macstat_regs { /* Location: */ u32 rx_broadcast_packets; /* 0x60AC */ /* Rx Control Frame Packet Counter */ - u32 rx_control_frames; /* 0x60B0 */ + u32 rx_control_frames; /* 0x60B0 */ /* Rx Pause Frame Packet Counter */ u32 rx_pause_frames; /* 0x60B4 */ @@ -1276,7 +1276,7 @@ struct macstat_regs { /* Location: */ u32 rx_drops; /* 0x60DC */ /* Tx Byte Counter */ - u32 tx_bytes; /* 0x60E0 */ + u32 tx_bytes; /* 0x60E0 */ /* Tx Packet Counter */ u32 tx_packets; /* 0x60E4 */ @@ -1339,7 +1339,7 @@ struct macstat_regs { /* Location: */ u32 carry_reg1; /* 0x6130 */ /* Carry Register Two Register */ - u32 carry_reg2; /* 0x6134 */ + u32 carry_reg2; /* 0x6134 */ /* Carry Register One Mask Register */ u32 carry_reg1_mask; /* 0x6138 */ -- cgit v0.10.2 From e19d8ba145acbe5b0843270f25ff5821287e568e Mon Sep 17 00:00:00 2001 From: Mark Einon Date: Thu, 7 Jul 2011 23:38:58 +0100 Subject: staging: et131x: et1310_mac.c: ConfigMacStatRegs() add missing regs to be zeroed The comment at the top of the function states 'we need to initialize all the macstat registers to zero', but not all macstat registers are zeroed. Zero the missing registers. Tested on an ET-131x device. Signed-off-by: Mark Einon Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index dc3e062..656be4b 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c @@ -387,21 +387,54 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev) /* Next we need to initialize all the macstat registers to zero on * the device. */ + writel(0, &macstat->txrx_0_64_byte_frames); + writel(0, &macstat->txrx_65_127_byte_frames); + writel(0, &macstat->txrx_128_255_byte_frames); + writel(0, &macstat->txrx_256_511_byte_frames); + writel(0, &macstat->txrx_512_1023_byte_frames); + writel(0, &macstat->txrx_1024_1518_byte_frames); + writel(0, &macstat->txrx_1519_1522_gvln_frames); + + writel(0, &macstat->rx_bytes); + writel(0, &macstat->rx_packets); writel(0, &macstat->rx_fcs_errs); + writel(0, &macstat->rx_multicast_packets); + writel(0, &macstat->rx_broadcast_packets); + writel(0, &macstat->rx_control_frames); + writel(0, &macstat->rx_pause_frames); + writel(0, &macstat->rx_unknown_opcodes); writel(0, &macstat->rx_align_errs); writel(0, &macstat->rx_frame_len_errs); writel(0, &macstat->rx_code_errs); - writel(0, &macstat->rx_drops); + writel(0, &macstat->rx_carrier_sense_errs); + writel(0, &macstat->rx_undersize_packets); writel(0, &macstat->rx_oversize_packets); writel(0, &macstat->rx_fragment_packets); + writel(0, &macstat->rx_jabbers); + writel(0, &macstat->rx_drops); + writel(0, &macstat->tx_bytes); + writel(0, &macstat->tx_packets); + writel(0, &macstat->tx_multicast_packets); + writel(0, &macstat->tx_broadcast_packets); + writel(0, &macstat->tx_pause_frames); writel(0, &macstat->tx_deferred); + writel(0, &macstat->tx_excessive_deferred); writel(0, &macstat->tx_single_collisions); writel(0, &macstat->tx_multiple_collisions); writel(0, &macstat->tx_late_collisions); + writel(0, &macstat->tx_excessive_collisions); writel(0, &macstat->tx_total_collisions); + writel(0, &macstat->tx_pause_honored_frames); + writel(0, &macstat->tx_drops); + writel(0, &macstat->tx_jabbers); + writel(0, &macstat->tx_fcs_errs); + writel(0, &macstat->tx_control_frames); writel(0, &macstat->tx_oversize_frames); writel(0, &macstat->tx_undersize_frames); + writel(0, &macstat->tx_fragments); + writel(0, &macstat->carry_reg1); + writel(0, &macstat->carry_reg2); /* Unmask any counters that we want to track the overflow of. * Initially this will be all counters. It may become clear later -- cgit v0.10.2 From 98c0a9c9badedd52f558f7657572e094c3d1c6e5 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 8 Jul 2011 10:25:40 +0300 Subject: Staging: tm6000: remove unneeded check in get_next_buf() We dereference "buf" on the line before so if it were NULL here we would have OOPsed earlier. Also list_entry() never returns NULL. And finally, we handled the situation where the list is empty earlier in the function. So this test isn't needed and I've removed it. Signed-off-by: Dan Carpenter Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/tm6000/tm6000-video.c b/drivers/staging/tm6000/tm6000-video.c index 3fe6038..8d8b939 100644 --- a/drivers/staging/tm6000/tm6000-video.c +++ b/drivers/staging/tm6000/tm6000-video.c @@ -179,9 +179,6 @@ static inline void get_next_buf(struct tm6000_dmaqueue *dma_q, *buf = list_entry(dma_q->active.next, struct tm6000_buffer, vb.queue); - if (!buf) - return; - /* Cleans up buffer - Useful for testing for frame/URB loss */ outp = videobuf_to_vmalloc(&(*buf)->vb); -- cgit v0.10.2 From 5fa88f3873e2d0afde618566d31e936a150be62a Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Fri, 8 Jul 2011 11:03:44 +0200 Subject: staging: brcm80211: Fix module parameter permissions The third parameter of module_param is supposed to represent sysfs file permissions. A value of "1" makes no sense. I am changing it to "0" to align with the other module parameters in this driver. Signed-off-by: Jean Delvare Cc: Henry Ptasinski Cc: Brett Rudley Cc: Roland Vossen Cc: Arend van Spriel Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index 380447f..6c8599c 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -111,7 +111,7 @@ module_param(brcmf_pkt_filter_init, uint, 0); /* Pkt filter mode control */ uint brcmf_master_mode = true; -module_param(brcmf_master_mode, uint, 1); +module_param(brcmf_master_mode, uint, 0); module_param(brcmf_dongle_memsize, int, 0); -- cgit v0.10.2 From 7a98161646f98690d845fd599dc840cd7d765aad Mon Sep 17 00:00:00 2001 From: Ravishankar Date: Fri, 8 Jul 2011 16:38:31 +0530 Subject: Staging: comedi: fix line over 80 character issue in rtd520.c This is a patch to the rtd520.c file that fixes up a warning: line over 80 character found by the checkpatch.pl tool Signed-off-by: Ravishankar Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/rtd520.c b/drivers/staging/comedi/drivers/rtd520.c index 7f09ed7..f2f877b 100644 --- a/drivers/staging/comedi/drivers/rtd520.c +++ b/drivers/staging/comedi/drivers/rtd520.c @@ -1026,7 +1026,8 @@ static int rtd_attach(struct comedi_device *dev, struct comedi_devconfig *it) } RtdDma0Mode(dev, DMA_MODE_BITS); - RtdDma0Source(dev, DMAS_ADFIFO_HALF_FULL); /* set DMA trigger source */ + /* set DMA trigger source */ + RtdDma0Source(dev, DMAS_ADFIFO_HALF_FULL); } else { printk(KERN_INFO "( no IRQ->no DMA )"); } @@ -1202,11 +1203,13 @@ static unsigned short rtdConvertChanGain(struct comedi_device *dev, CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex); } else if (range < thisboard->rangeUniStart) { /* second batch are +-10 */ r |= 0x100; /* +-10 range */ - r |= ((range - thisboard->range10Start) & 0x7) << 4; /* gain */ + /* gain */ + r |= ((range - thisboard->range10Start) & 0x7) << 4; CHAN_ARRAY_SET(devpriv->chanBipolar, chanIndex); } else { /* last batch is +10 */ r |= 0x200; /* +10 range */ - r |= ((range - thisboard->rangeUniStart) & 0x7) << 4; /* gain */ + /* gain */ + r |= ((range - thisboard->rangeUniStart) & 0x7) << 4; CHAN_ARRAY_CLEAR(devpriv->chanBipolar, chanIndex); } @@ -1336,7 +1339,8 @@ static int rtd_ai_rinsn(struct comedi_device *dev, /*printk ("rtd520: Got 0x%x after %d usec\n", d, ii+1); */ d = d >> 3; /* low 3 bits are marker lines */ if (CHAN_ARRAY_TEST(devpriv->chanBipolar, 0)) - data[n] = d + 2048; /* convert to comedi unsigned data */ + /* convert to comedi unsigned data */ + data[n] = d + 2048; else data[n] = d; } -- cgit v0.10.2 From 6e882d472f2b9fdfa4838317c9b67a64403fef73 Mon Sep 17 00:00:00 2001 From: Ravishankar Date: Fri, 8 Jul 2011 13:14:45 +0530 Subject: Staging: comedi: fix printk issue in rtd520.c This is a patch to the rtd520.c file that fixes up a printk warning found by the checkpatch.pl tool Signed-off-by: Ravishankr Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/comedi/drivers/rtd520.c b/drivers/staging/comedi/drivers/rtd520.c index f2f877b..1384419 100644 --- a/drivers/staging/comedi/drivers/rtd520.c +++ b/drivers/staging/comedi/drivers/rtd520.c @@ -29,8 +29,8 @@ Status: Works. Only tested on DM7520-8. Not SMP safe. Configuration options: [0] - PCI bus of device (optional) - If bus/slot is not specified, the first available PCI - device will be used. + If bus / slot is not specified, the first available PCI + device will be used. [1] - PCI slot of device (optional) */ /* @@ -186,7 +186,7 @@ Configuration options: | PLX_DEMAND_MODE_BIT) #define DMA_TRANSFER_BITS (\ -/* descriptors in PCI memory*/ PLX_DESC_IN_PCI_BIT \ +/* descriptors in PCI memory*/ PLX_DESC_IN_PCI_BIT \ /* interrupt at end of block */ | PLX_INTR_TERM_COUNT \ /* from board to PCI */ | PLX_XFER_LOCAL_TO_PCI) @@ -869,7 +869,7 @@ static int rtd_attach(struct comedi_device *dev, struct comedi_devconfig *it) } /* Show board configuration */ - printk("%s:", dev->board_name); + printk(KERN_INFO "%s:", dev->board_name); /* * Allocate the subdevice structures. alloc_subdevice() is a @@ -958,7 +958,7 @@ static int rtd_attach(struct comedi_device *dev, struct comedi_devconfig *it) return ret; } dev->irq = devpriv->pci_dev->irq; - printk("( irq=%u )", dev->irq); + printk(KERN_INFO "( irq=%u )", dev->irq); ret = rtd520_probe_fifo_depth(dev); if (ret < 0) -- cgit v0.10.2 From 152d52cf7ec18e655a2d5bb6a79d42e6e09d92d7 Mon Sep 17 00:00:00 2001 From: Bryan Freed Date: Thu, 7 Jul 2011 12:01:57 -0700 Subject: staging:iio:light:isl29018: Fix the "Init of isl29018 fails" failure. The I2C clientdata is set to indio_dev instead of chip as of a couple weeks ago. Correct the calls to i2c_get_clientdata() accordingly. Otherwise the driver fails to initialize. Signed-off-by: Bryan Freed Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c index cc6d718..1e75145 100644 --- a/drivers/staging/iio/light/isl29018.c +++ b/drivers/staging/iio/light/isl29018.c @@ -68,7 +68,7 @@ static int isl29018_write_data(struct i2c_client *client, u8 reg, { u8 regval; int ret = 0; - struct isl29018_chip *chip = i2c_get_clientdata(client); + struct isl29018_chip *chip = iio_priv(i2c_get_clientdata(client)); regval = chip->reg_cache[reg]; regval &= ~mask; @@ -158,7 +158,7 @@ static int isl29018_read_sensor_input(struct i2c_client *client, int mode) static int isl29018_read_lux(struct i2c_client *client, int *lux) { int lux_data; - struct isl29018_chip *chip = i2c_get_clientdata(client); + struct isl29018_chip *chip = iio_priv(i2c_get_clientdata(client)); lux_data = isl29018_read_sensor_input(client, COMMMAND1_OPMODE_ALS_ONCE); @@ -466,7 +466,7 @@ static const struct attribute_group isl29108_group = { static int isl29018_chip_init(struct i2c_client *client) { - struct isl29018_chip *chip = i2c_get_clientdata(client); + struct isl29018_chip *chip = iio_priv(i2c_get_clientdata(client)); int status; int new_adc_bit; unsigned int new_range; -- cgit v0.10.2 From 9bff02f8f71c4366efd6f5d79150f9786884bd1c Mon Sep 17 00:00:00 2001 From: Bryan Freed Date: Thu, 7 Jul 2011 12:01:54 -0700 Subject: staging:iio: Reorder channel type strings to match the iio.h enums. This makes comparison between the iio_chan_type_name_spec_shared strings and the iio_chan_type enums easier. Signed-off-by: Bryan Freed Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c index 8fa2be6..52a02af 100644 --- a/drivers/staging/iio/industrialio-core.c +++ b/drivers/staging/iio/industrialio-core.c @@ -44,21 +44,21 @@ struct bus_type iio_bus_type = { EXPORT_SYMBOL(iio_bus_type); static const char * const iio_chan_type_name_spec_shared[] = { - [IIO_TIMESTAMP] = "timestamp", - [IIO_ACCEL] = "accel", [IIO_IN] = "in", [IIO_OUT] = "out", [IIO_CURRENT] = "current", [IIO_POWER] = "power", + [IIO_ACCEL] = "accel", [IIO_IN_DIFF] = "in-in", [IIO_GYRO] = "gyro", - [IIO_TEMP] = "temp", [IIO_MAGN] = "magn", + [IIO_LIGHT] = "illuminance", + [IIO_INTENSITY] = "intensity", + [IIO_TEMP] = "temp", [IIO_INCLI] = "incli", [IIO_ROT] = "rot", - [IIO_INTENSITY] = "intensity", - [IIO_LIGHT] = "illuminance", [IIO_ANGL] = "angl", + [IIO_TIMESTAMP] = "timestamp", }; static const char * const iio_chan_type_name_spec_complex[] = { -- cgit v0.10.2 From f09f2c8142d275b0d9321d2ea93c8bd0d8dc32ec Mon Sep 17 00:00:00 2001 From: Bryan Freed Date: Thu, 7 Jul 2011 12:01:55 -0700 Subject: staging:iio: Add an iio channel type string to support proximity sensors. Add "proximity" to the iio_chan_type_name_spec_shared string list to support proximity sensors. Now this list fully matches the declared iio_chan_type enums. Signed-off-by: Bryan Freed Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c index 52a02af..19819e7 100644 --- a/drivers/staging/iio/industrialio-core.c +++ b/drivers/staging/iio/industrialio-core.c @@ -54,6 +54,7 @@ static const char * const iio_chan_type_name_spec_shared[] = { [IIO_MAGN] = "magn", [IIO_LIGHT] = "illuminance", [IIO_INTENSITY] = "intensity", + [IIO_PROXIMITY] = "proximity", [IIO_TEMP] = "temp", [IIO_INCLI] = "incli", [IIO_ROT] = "rot", -- cgit v0.10.2 From 01e57c5742fcd4d08eddab59ef1c3b3e1f60610c Mon Sep 17 00:00:00 2001 From: Bryan Freed Date: Thu, 7 Jul 2011 12:01:56 -0700 Subject: staging:iio:light:isl29018: Convert some of the isl29018 driver to the new iio_chan_spec framework. Remove the driver's get_sensor_data() interfaces and replace them with iio_chan_spec channels. This converts 4 files to the new framework. Driver ABI change: The intensity_infrared_raw file is now intensity_ir_raw. Signed-off-by: Bryan Freed Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c index 1e75145..426b6af 100644 --- a/drivers/staging/iio/light/isl29018.c +++ b/drivers/staging/iio/light/isl29018.c @@ -224,74 +224,7 @@ static int isl29018_read_proximity_ir(struct i2c_client *client, int scheme, return 0; } -static ssize_t get_sensor_data(struct device *dev, char *buf, int mode) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct isl29018_chip *chip = iio_priv(indio_dev); - struct i2c_client *client = chip->client; - int value = 0; - int status; - - mutex_lock(&chip->lock); - switch (mode) { - case COMMMAND1_OPMODE_PROX_ONCE: - status = isl29018_read_proximity_ir(client, - chip->prox_scheme, &value); - break; - - case COMMMAND1_OPMODE_ALS_ONCE: - status = isl29018_read_lux(client, &value); - break; - - case COMMMAND1_OPMODE_IR_ONCE: - status = isl29018_read_ir(client, &value); - break; - - default: - dev_err(&client->dev, "Mode %d is not supported\n", mode); - mutex_unlock(&chip->lock); - return -EBUSY; - } - if (status < 0) { - dev_err(&client->dev, "Error in Reading data"); - mutex_unlock(&chip->lock); - return status; - } - - mutex_unlock(&chip->lock); - - return sprintf(buf, "%d\n", value); -} - /* Sysfs interface */ -/* lux_scale */ -static ssize_t show_lux_scale(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct isl29018_chip *chip = indio_dev->dev_data; - - return sprintf(buf, "%d\n", chip->lux_scale); -} - -static ssize_t store_lux_scale(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct isl29018_chip *chip = indio_dev->dev_data; - unsigned long lval; - - lval = simple_strtoul(buf, NULL, 10); - if (lval == 0) - return -EINVAL; - - mutex_lock(&chip->lock); - chip->lux_scale = lval; - mutex_unlock(&chip->lock); - - return count; -} - /* range */ static ssize_t show_range(struct device *dev, struct device_attribute *attr, char *buf) @@ -409,27 +342,87 @@ static ssize_t store_prox_infrared_supression(struct device *dev, return count; } -/* Read lux */ -static ssize_t show_lux(struct device *dev, - struct device_attribute *devattr, char *buf) +/* Channel IO */ +static int isl29018_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, + int val2, + long mask) { - return get_sensor_data(dev, buf, COMMMAND1_OPMODE_ALS_ONCE); -} + struct isl29018_chip *chip = iio_priv(indio_dev); + int ret = -EINVAL; -/* Read ir */ -static ssize_t show_ir(struct device *dev, - struct device_attribute *devattr, char *buf) -{ - return get_sensor_data(dev, buf, COMMMAND1_OPMODE_IR_ONCE); + mutex_lock(&chip->lock); + if (mask == (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) && + chan->type == IIO_LIGHT) { + chip->lux_scale = val; + ret = 0; + } + mutex_unlock(&chip->lock); + + return 0; } -/* Read nearest ir */ -static ssize_t show_proxim_ir(struct device *dev, - struct device_attribute *devattr, char *buf) +static int isl29018_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, + int *val2, + long mask) { - return get_sensor_data(dev, buf, COMMMAND1_OPMODE_PROX_ONCE); + int ret = -EINVAL; + struct isl29018_chip *chip = iio_priv(indio_dev); + struct i2c_client *client = chip->client; + + mutex_lock(&chip->lock); + switch (mask) { + case 0: + switch (chan->type) { + case IIO_LIGHT: + ret = isl29018_read_lux(client, val); + break; + case IIO_INTENSITY: + ret = isl29018_read_ir(client, val); + break; + case IIO_PROXIMITY: + ret = isl29018_read_proximity_ir(client, + chip->prox_scheme, val); + break; + default: + break; + } + if (!ret) + ret = IIO_VAL_INT; + break; + case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): + if (chan->type == IIO_LIGHT) { + *val = chip->lux_scale; + ret = IIO_VAL_INT; + } + break; + default: + break; + } + mutex_unlock(&chip->lock); + return ret; } +static const struct iio_chan_spec isl29018_channels[] = { + { + .type = IIO_LIGHT, + .indexed = 1, + .channel = 0, + .processed_val = 1, + .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE), + }, { + .type = IIO_INTENSITY, + .modified = 1, + .channel2 = IIO_MOD_LIGHT_IR, + }, { + /* Unindexed in current ABI. But perhaps it should be. */ + .type = IIO_PROXIMITY, + } +}; + static IIO_DEVICE_ATTR(range, S_IRUGO | S_IWUSR, show_range, store_range, 0); static IIO_CONST_ATTR(range_available, "1000 4000 16000 64000"); static IIO_CONST_ATTR(adc_resolution_available, "4 8 12 16"); @@ -439,11 +432,6 @@ static IIO_DEVICE_ATTR(proximity_on_chip_ambient_infrared_supression, S_IRUGO | S_IWUSR, show_prox_infrared_supression, store_prox_infrared_supression, 0); -static IIO_DEVICE_ATTR(illuminance0_input, S_IRUGO, show_lux, NULL, 0); -static IIO_DEVICE_ATTR(illuminance0_calibscale, S_IRUGO | S_IWUSR, - show_lux_scale, store_lux_scale, 0); -static IIO_DEVICE_ATTR(intensity_infrared_raw, S_IRUGO, show_ir, NULL, 0); -static IIO_DEVICE_ATTR(proximity_raw, S_IRUGO, show_proxim_ir, NULL, 0); #define ISL29018_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) #define ISL29018_CONST_ATTR(name) (&iio_const_attr_##name.dev_attr.attr) @@ -453,10 +441,6 @@ static struct attribute *isl29018_attributes[] = { ISL29018_DEV_ATTR(adc_resolution), ISL29018_CONST_ATTR(adc_resolution_available), ISL29018_DEV_ATTR(proximity_on_chip_ambient_infrared_supression), - ISL29018_DEV_ATTR(illuminance0_input), - ISL29018_DEV_ATTR(illuminance0_calibscale), - ISL29018_DEV_ATTR(intensity_infrared_raw), - ISL29018_DEV_ATTR(proximity_raw), NULL }; @@ -489,6 +473,8 @@ static int isl29018_chip_init(struct i2c_client *client) static const struct iio_info isl29108_info = { .attrs = &isl29108_group, .driver_module = THIS_MODULE, + .read_raw = &isl29018_read_raw, + .write_raw = &isl29018_write_raw, }; static int __devinit isl29018_probe(struct i2c_client *client, @@ -520,6 +506,8 @@ static int __devinit isl29018_probe(struct i2c_client *client, goto exit_iio_free; indio_dev->info = &isl29108_info; + indio_dev->channels = isl29018_channels; + indio_dev->num_channels = ARRAY_SIZE(isl29018_channels); indio_dev->name = id->name; indio_dev->dev.parent = &client->dev; indio_dev->modes = INDIO_DIRECT_MODE; -- cgit v0.10.2 From 33842cedfc33ee907b2a702f321a26f7c0bf0aaa Mon Sep 17 00:00:00 2001 From: "Cho, Yu-Chen" Date: Thu, 7 Jul 2011 11:27:13 +0800 Subject: Staging: Merge ENE UB6250 MS card codes from keucr to drivers/usb/storage/ene_ub6250.c Merge ENE UB6250 MS card codes from keucr to drivers/usb/storage/ene_ub6250.c. Signed-off-by: Cho, Yu-Chen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/storage/Kconfig b/drivers/usb/storage/Kconfig index 9798725..6975651 100644 --- a/drivers/usb/storage/Kconfig +++ b/drivers/usb/storage/Kconfig @@ -187,8 +187,8 @@ config USB_STORAGE_ENE_UB6250 depends on USB && SCSI depends on USB_STORAGE ---help--- - Say Y here if you wish to control a ENE SD Card reader. - To use SM/MS card, please build driver/staging/keucr/keucr.ko + Say Y here if you wish to control a ENE SD/MS Card reader. + To use SM card, please build driver/staging/keucr/keucr.ko This option depends on 'SCSI' support being enabled, but you probably also need 'SCSI device support: SCSI disk support' diff --git a/drivers/usb/storage/ene_ub6250.c b/drivers/usb/storage/ene_ub6250.c index 31645af..4dca3ef 100644 --- a/drivers/usb/storage/ene_ub6250.c +++ b/drivers/usb/storage/ene_ub6250.c @@ -100,6 +100,141 @@ static struct us_unusual_dev ene_ub6250_unusual_dev_list[] = { #define FDIR_WRITE 0 #define FDIR_READ 1 +/* For MS Card */ + +/* Status Register 1 */ +#define MS_REG_ST1_MB 0x80 /* media busy */ +#define MS_REG_ST1_FB1 0x40 /* flush busy 1 */ +#define MS_REG_ST1_DTER 0x20 /* error on data(corrected) */ +#define MS_REG_ST1_UCDT 0x10 /* unable to correct data */ +#define MS_REG_ST1_EXER 0x08 /* error on extra(corrected) */ +#define MS_REG_ST1_UCEX 0x04 /* unable to correct extra */ +#define MS_REG_ST1_FGER 0x02 /* error on overwrite flag(corrected) */ +#define MS_REG_ST1_UCFG 0x01 /* unable to correct overwrite flag */ +#define MS_REG_ST1_DEFAULT (MS_REG_ST1_MB | MS_REG_ST1_FB1 | MS_REG_ST1_DTER | MS_REG_ST1_UCDT | MS_REG_ST1_EXER | MS_REG_ST1_UCEX | MS_REG_ST1_FGER | MS_REG_ST1_UCFG) + +/* Overwrite Area */ +#define MS_REG_OVR_BKST 0x80 /* block status */ +#define MS_REG_OVR_BKST_OK MS_REG_OVR_BKST /* OK */ +#define MS_REG_OVR_BKST_NG 0x00 /* NG */ +#define MS_REG_OVR_PGST0 0x40 /* page status */ +#define MS_REG_OVR_PGST1 0x20 +#define MS_REG_OVR_PGST_MASK (MS_REG_OVR_PGST0 | MS_REG_OVR_PGST1) +#define MS_REG_OVR_PGST_OK (MS_REG_OVR_PGST0 | MS_REG_OVR_PGST1) /* OK */ +#define MS_REG_OVR_PGST_NG MS_REG_OVR_PGST1 /* NG */ +#define MS_REG_OVR_PGST_DATA_ERROR 0x00 /* data error */ +#define MS_REG_OVR_UDST 0x10 /* update status */ +#define MS_REG_OVR_UDST_UPDATING 0x00 /* updating */ +#define MS_REG_OVR_UDST_NO_UPDATE MS_REG_OVR_UDST +#define MS_REG_OVR_RESERVED 0x08 +#define MS_REG_OVR_DEFAULT (MS_REG_OVR_BKST_OK | MS_REG_OVR_PGST_OK | MS_REG_OVR_UDST_NO_UPDATE | MS_REG_OVR_RESERVED) + +/* Management Flag */ +#define MS_REG_MNG_SCMS0 0x20 /* serial copy management system */ +#define MS_REG_MNG_SCMS1 0x10 +#define MS_REG_MNG_SCMS_MASK (MS_REG_MNG_SCMS0 | MS_REG_MNG_SCMS1) +#define MS_REG_MNG_SCMS_COPY_OK (MS_REG_MNG_SCMS0 | MS_REG_MNG_SCMS1) +#define MS_REG_MNG_SCMS_ONE_COPY MS_REG_MNG_SCMS1 +#define MS_REG_MNG_SCMS_NO_COPY 0x00 +#define MS_REG_MNG_ATFLG 0x08 /* address transfer table flag */ +#define MS_REG_MNG_ATFLG_OTHER MS_REG_MNG_ATFLG /* other */ +#define MS_REG_MNG_ATFLG_ATTBL 0x00 /* address transfer table */ +#define MS_REG_MNG_SYSFLG 0x04 /* system flag */ +#define MS_REG_MNG_SYSFLG_USER MS_REG_MNG_SYSFLG /* user block */ +#define MS_REG_MNG_SYSFLG_BOOT 0x00 /* system block */ +#define MS_REG_MNG_RESERVED 0xc3 +#define MS_REG_MNG_DEFAULT (MS_REG_MNG_SCMS_COPY_OK | MS_REG_MNG_ATFLG_OTHER | MS_REG_MNG_SYSFLG_USER | MS_REG_MNG_RESERVED) + + +#define MS_MAX_PAGES_PER_BLOCK 32 +#define MS_MAX_INITIAL_ERROR_BLOCKS 10 +#define MS_LIB_BITS_PER_BYTE 8 + +#define MS_SYSINF_FORMAT_FAT 1 +#define MS_SYSINF_USAGE_GENERAL 0 + +#define MS_SYSINF_MSCLASS_TYPE_1 1 +#define MS_SYSINF_PAGE_SIZE MS_BYTES_PER_PAGE /* fixed */ + +#define MS_SYSINF_CARDTYPE_RDONLY 1 +#define MS_SYSINF_CARDTYPE_RDWR 2 +#define MS_SYSINF_CARDTYPE_HYBRID 3 +#define MS_SYSINF_SECURITY 0x01 +#define MS_SYSINF_SECURITY_NO_SUPPORT MS_SYSINF_SECURITY +#define MS_SYSINF_SECURITY_SUPPORT 0 + +#define MS_SYSINF_RESERVED1 1 +#define MS_SYSINF_RESERVED2 1 + +#define MS_SYSENT_TYPE_INVALID_BLOCK 0x01 +#define MS_SYSENT_TYPE_CIS_IDI 0x0a /* CIS/IDI */ + +#define SIZE_OF_KIRO 1024 +#define BYTE_MASK 0xff + +/* ms error code */ +#define MS_STATUS_WRITE_PROTECT 0x0106 +#define MS_STATUS_SUCCESS 0x0000 +#define MS_ERROR_FLASH_READ 0x8003 +#define MS_ERROR_FLASH_ERASE 0x8005 +#define MS_LB_ERROR 0xfff0 +#define MS_LB_BOOT_BLOCK 0xfff1 +#define MS_LB_INITIAL_ERROR 0xfff2 +#define MS_STATUS_SUCCESS_WITH_ECC 0xfff3 +#define MS_LB_ACQUIRED_ERROR 0xfff4 +#define MS_LB_NOT_USED_ERASED 0xfff5 +#define MS_NOCARD_ERROR 0xfff8 +#define MS_NO_MEMORY_ERROR 0xfff9 +#define MS_STATUS_INT_ERROR 0xfffa +#define MS_STATUS_ERROR 0xfffe +#define MS_LB_NOT_USED 0xffff + +#define MS_REG_MNG_SYSFLG 0x04 /* system flag */ +#define MS_REG_MNG_SYSFLG_USER MS_REG_MNG_SYSFLG /* user block */ + +#define MS_BOOT_BLOCK_ID 0x0001 +#define MS_BOOT_BLOCK_FORMAT_VERSION 0x0100 +#define MS_BOOT_BLOCK_DATA_ENTRIES 2 + +#define MS_NUMBER_OF_SYSTEM_ENTRY 4 +#define MS_NUMBER_OF_BOOT_BLOCK 2 +#define MS_BYTES_PER_PAGE 512 +#define MS_LOGICAL_BLOCKS_PER_SEGMENT 496 +#define MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT 494 + +#define MS_PHYSICAL_BLOCKS_PER_SEGMENT 0x200 /* 512 */ +#define MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK 0x1ff + +/* overwrite area */ +#define MS_REG_OVR_BKST 0x80 /* block status */ +#define MS_REG_OVR_BKST_OK MS_REG_OVR_BKST /* OK */ +#define MS_REG_OVR_BKST_NG 0x00 /* NG */ + +/* Status Register 1 */ +#define MS_REG_ST1_DTER 0x20 /* error on data(corrected) */ +#define MS_REG_ST1_EXER 0x08 /* error on extra(corrected) */ +#define MS_REG_ST1_FGER 0x02 /* error on overwrite flag(corrected) */ + +/* MemoryStick Register */ +/* Status Register 0 */ +#define MS_REG_ST0_WP 0x01 /* write protected */ +#define MS_REG_ST0_WP_ON MS_REG_ST0_WP + +#define MS_LIB_CTRL_RDONLY 0 +#define MS_LIB_CTRL_WRPROTECT 1 + +/*dphy->log table */ +#define ms_libconv_to_logical(pdx, PhyBlock) (((PhyBlock) >= (pdx)->MS_Lib.NumberOfPhyBlock) ? MS_STATUS_ERROR : (pdx)->MS_Lib.Phy2LogMap[PhyBlock]) +#define ms_libconv_to_physical(pdx, LogBlock) (((LogBlock) >= (pdx)->MS_Lib.NumberOfLogBlock) ? MS_STATUS_ERROR : (pdx)->MS_Lib.Log2PhyMap[LogBlock]) + +#define ms_lib_ctrl_set(pdx, Flag) ((pdx)->MS_Lib.flags |= (1 << (Flag))) +#define ms_lib_ctrl_reset(pdx, Flag) ((pdx)->MS_Lib.flags &= ~(1 << (Flag))) +#define ms_lib_ctrl_check(pdx, Flag) ((pdx)->MS_Lib.flags & (1 << (Flag))) + +#define ms_lib_iswritable(pdx) ((ms_lib_ctrl_check((pdx), MS_LIB_CTRL_RDONLY) == 0) && (ms_lib_ctrl_check(pdx, MS_LIB_CTRL_WRPROTECT) == 0)) +#define ms_lib_clear_pagemap(pdx) memset((pdx)->MS_Lib.pagemap, 0, sizeof((pdx)->MS_Lib.pagemap)) +#define memstick_logaddr(logadr1, logadr0) ((((u16)(logadr1)) << 8) | (logadr0)) + struct SD_STATUS { u8 Insert:1; @@ -132,6 +267,164 @@ struct SM_STATUS { u8 IsMS:1; }; +struct ms_bootblock_cis { + u8 bCistplDEVICE[6]; /* 0 */ + u8 bCistplDEVICE0C[6]; /* 6 */ + u8 bCistplJEDECC[4]; /* 12 */ + u8 bCistplMANFID[6]; /* 16 */ + u8 bCistplVER1[32]; /* 22 */ + u8 bCistplFUNCID[4]; /* 54 */ + u8 bCistplFUNCE0[4]; /* 58 */ + u8 bCistplFUNCE1[5]; /* 62 */ + u8 bCistplCONF[7]; /* 67 */ + u8 bCistplCFTBLENT0[10];/* 74 */ + u8 bCistplCFTBLENT1[8]; /* 84 */ + u8 bCistplCFTBLENT2[12];/* 92 */ + u8 bCistplCFTBLENT3[8]; /* 104 */ + u8 bCistplCFTBLENT4[17];/* 112 */ + u8 bCistplCFTBLENT5[8]; /* 129 */ + u8 bCistplCFTBLENT6[17];/* 137 */ + u8 bCistplCFTBLENT7[8]; /* 154 */ + u8 bCistplNOLINK[3]; /* 162 */ +} ; + +struct ms_bootblock_idi { +#define MS_IDI_GENERAL_CONF 0x848A + u16 wIDIgeneralConfiguration; /* 0 */ + u16 wIDInumberOfCylinder; /* 1 */ + u16 wIDIreserved0; /* 2 */ + u16 wIDInumberOfHead; /* 3 */ + u16 wIDIbytesPerTrack; /* 4 */ + u16 wIDIbytesPerSector; /* 5 */ + u16 wIDIsectorsPerTrack; /* 6 */ + u16 wIDItotalSectors[2]; /* 7-8 high,low */ + u16 wIDIreserved1[11]; /* 9-19 */ + u16 wIDIbufferType; /* 20 */ + u16 wIDIbufferSize; /* 21 */ + u16 wIDIlongCmdECC; /* 22 */ + u16 wIDIfirmVersion[4]; /* 23-26 */ + u16 wIDImodelName[20]; /* 27-46 */ + u16 wIDIreserved2; /* 47 */ + u16 wIDIlongWordSupported; /* 48 */ + u16 wIDIdmaSupported; /* 49 */ + u16 wIDIreserved3; /* 50 */ + u16 wIDIpioTiming; /* 51 */ + u16 wIDIdmaTiming; /* 52 */ + u16 wIDItransferParameter; /* 53 */ + u16 wIDIformattedCylinder; /* 54 */ + u16 wIDIformattedHead; /* 55 */ + u16 wIDIformattedSectorsPerTrack;/* 56 */ + u16 wIDIformattedTotalSectors[2];/* 57-58 */ + u16 wIDImultiSector; /* 59 */ + u16 wIDIlbaSectors[2]; /* 60-61 */ + u16 wIDIsingleWordDMA; /* 62 */ + u16 wIDImultiWordDMA; /* 63 */ + u16 wIDIreserved4[192]; /* 64-255 */ +}; + +struct ms_bootblock_sysent_rec { + u32 dwStart; + u32 dwSize; + u8 bType; + u8 bReserved[3]; +}; + +struct ms_bootblock_sysent { + struct ms_bootblock_sysent_rec entry[MS_NUMBER_OF_SYSTEM_ENTRY]; +}; + +struct ms_bootblock_sysinf { + u8 bMsClass; /* must be 1 */ + u8 bCardType; /* see below */ + u16 wBlockSize; /* n KB */ + u16 wBlockNumber; /* number of physical block */ + u16 wTotalBlockNumber; /* number of logical block */ + u16 wPageSize; /* must be 0x200 */ + u8 bExtraSize; /* 0x10 */ + u8 bSecuritySupport; + u8 bAssemblyDate[8]; + u8 bFactoryArea[4]; + u8 bAssemblyMakerCode; + u8 bAssemblyMachineCode[3]; + u16 wMemoryMakerCode; + u16 wMemoryDeviceCode; + u16 wMemorySize; + u8 bReserved1; + u8 bReserved2; + u8 bVCC; + u8 bVPP; + u16 wControllerChipNumber; + u16 wControllerFunction; /* New MS */ + u8 bReserved3[9]; /* New MS */ + u8 bParallelSupport; /* New MS */ + u16 wFormatValue; /* New MS */ + u8 bFormatType; + u8 bUsage; + u8 bDeviceType; + u8 bReserved4[22]; + u8 bFUValue3; + u8 bFUValue4; + u8 bReserved5[15]; +}; + +struct ms_bootblock_header { + u16 wBlockID; + u16 wFormatVersion; + u8 bReserved1[184]; + u8 bNumberOfDataEntry; + u8 bReserved2[179]; +}; + +struct ms_bootblock_page0 { + struct ms_bootblock_header header; + struct ms_bootblock_sysent sysent; + struct ms_bootblock_sysinf sysinf; +}; + +struct ms_bootblock_cis_idi { + union { + struct ms_bootblock_cis cis; + u8 dmy[256]; + } cis; + + union { + struct ms_bootblock_idi idi; + u8 dmy[256]; + } idi; + +}; + +/* ENE MS Lib struct */ +struct ms_lib_type_extdat { + u8 reserved; + u8 intr; + u8 status0; + u8 status1; + u8 ovrflg; + u8 mngflg; + u16 logadr; +}; + +struct ms_lib_ctrl { + u32 flags; + u32 BytesPerSector; + u32 NumberOfCylinder; + u32 SectorsPerCylinder; + u16 cardType; /* R/W, RO, Hybrid */ + u16 blockSize; + u16 PagesPerBlock; + u16 NumberOfPhyBlock; + u16 NumberOfLogBlock; + u16 NumberOfSegment; + u16 *Phy2LogMap; /* phy2log table */ + u16 *Log2PhyMap; /* log2phy table */ + u16 wrtblk; + unsigned char *pagemap[(MS_MAX_PAGES_PER_BLOCK + (MS_LIB_BITS_PER_BYTE-1)) / MS_LIB_BITS_PER_BYTE]; + unsigned char *blkpag; + struct ms_lib_type_extdat *blkext; + unsigned char copybuf[512]; +}; + /* SD Block Length */ /* 2^9 = 512 Bytes, The HW maximum read/write data length */ @@ -162,7 +455,7 @@ struct ene_ub6250_info { /*----- MS Control Data ---------------- */ bool MS_SWWP; u32 MSP_TotalBlock; - /*MS_LibControl MS_Lib;*/ + struct ms_lib_ctrl MS_Lib; bool MS_IsRWPage; u16 MS_Model; @@ -180,6 +473,7 @@ struct ene_ub6250_info { }; static int ene_sd_init(struct us_data *us); +static int ene_ms_init(struct us_data *us); static int ene_load_bincode(struct us_data *us, unsigned char flag); static void ene_ub6250_info_destructor(void *extra) @@ -431,251 +725,1580 @@ static int sd_scsi_write(struct us_data *us, struct scsi_cmnd *srb) return result; } -static int ene_get_card_type(struct us_data *us, u16 index, void *buf) +/* + * ENE MS Card + */ + +static int ms_lib_set_logicalpair(struct us_data *us, u16 logblk, u16 phyblk) { - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x01; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xED; - bcb->CDB[2] = (unsigned char)(index>>8); - bcb->CDB[3] = (unsigned char)index; + if ((logblk >= info->MS_Lib.NumberOfLogBlock) || (phyblk >= info->MS_Lib.NumberOfPhyBlock)) + return (u32)-1; - result = ene_send_scsi_cmd(us, FDIR_READ, buf, 0); - return result; + info->MS_Lib.Phy2LogMap[phyblk] = logblk; + info->MS_Lib.Log2PhyMap[logblk] = phyblk; + + return 0; } -static int ene_get_card_status(struct us_data *us, u8 *buf) +static int ms_lib_set_logicalblockmark(struct us_data *us, u16 phyblk, u16 mark) { - u16 tmpreg; - u32 reg4b; struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - /*US_DEBUGP("transport --- ENE_ReadSDReg\n");*/ - reg4b = *(u32 *)&buf[0x18]; - info->SD_READ_BL_LEN = (u8)((reg4b >> 8) & 0x0f); + if (phyblk >= info->MS_Lib.NumberOfPhyBlock) + return (u32)-1; - tmpreg = (u16) reg4b; - reg4b = *(u32 *)(&buf[0x14]); - if (info->SD_Status.HiCapacity && !info->SD_Status.IsMMC) - info->HC_C_SIZE = (reg4b >> 8) & 0x3fffff; + info->MS_Lib.Phy2LogMap[phyblk] = mark; - info->SD_C_SIZE = ((tmpreg & 0x03) << 10) | (u16)(reg4b >> 22); - info->SD_C_SIZE_MULT = (u8)(reg4b >> 7) & 0x07; - if (info->SD_Status.HiCapacity && info->SD_Status.IsMMC) - info->HC_C_SIZE = *(u32 *)(&buf[0x100]); + return 0; +} - if (info->SD_READ_BL_LEN > SD_BLOCK_LEN) { - info->SD_Block_Mult = 1 << (info->SD_READ_BL_LEN-SD_BLOCK_LEN); - info->SD_READ_BL_LEN = SD_BLOCK_LEN; - } else { - info->SD_Block_Mult = 1; - } +static int ms_lib_set_initialerrorblock(struct us_data *us, u16 phyblk) +{ + return ms_lib_set_logicalblockmark(us, phyblk, MS_LB_INITIAL_ERROR); +} - return USB_STOR_TRANSPORT_GOOD; +static int ms_lib_set_bootblockmark(struct us_data *us, u16 phyblk) +{ + return ms_lib_set_logicalblockmark(us, phyblk, MS_LB_BOOT_BLOCK); } -static int ene_load_bincode(struct us_data *us, unsigned char flag) +static int ms_lib_free_logicalmap(struct us_data *us) { - int err; - char *fw_name = NULL; - unsigned char *buf = NULL; - const struct firmware *sd_fw = NULL; - int result = USB_STOR_TRANSPORT_ERROR; - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - if (info->BIN_FLAG == flag) - return USB_STOR_TRANSPORT_GOOD; + kfree(info->MS_Lib.Phy2LogMap); + info->MS_Lib.Phy2LogMap = NULL; - switch (flag) { - /* For SD */ - case SD_INIT1_PATTERN: - US_DEBUGP("SD_INIT1_PATTERN\n"); - fw_name = "ene-ub6250/sd_init1.bin"; - break; - case SD_INIT2_PATTERN: - US_DEBUGP("SD_INIT2_PATTERN\n"); - fw_name = "ene-ub6250/sd_init2.bin"; - break; - case SD_RW_PATTERN: - US_DEBUGP("SD_RDWR_PATTERN\n"); - fw_name = "ene-ub6250/sd_rdwr.bin"; - break; - default: - US_DEBUGP("----------- Unknown PATTERN ----------\n"); - goto nofw; - } + kfree(info->MS_Lib.Log2PhyMap); + info->MS_Lib.Log2PhyMap = NULL; - err = request_firmware(&sd_fw, fw_name, &us->pusb_dev->dev); - if (err) { - US_DEBUGP("load firmware %s failed\n", fw_name); - goto nofw; - } - buf = kmalloc(sd_fw->size, GFP_KERNEL); - if (buf == NULL) { - US_DEBUGP("Malloc memory for fireware failed!\n"); - goto nofw; - } - memcpy(buf, sd_fw->data, sd_fw->size); - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = sd_fw->size; - bcb->Flags = 0x00; - bcb->CDB[0] = 0xEF; + return 0; +} - result = ene_send_scsi_cmd(us, FDIR_WRITE, buf, 0); - info->BIN_FLAG = flag; - kfree(buf); +int ms_lib_alloc_logicalmap(struct us_data *us) +{ + u32 i; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; -nofw: - if (sd_fw != NULL) { - release_firmware(sd_fw); - sd_fw = NULL; + info->MS_Lib.Phy2LogMap = kmalloc(info->MS_Lib.NumberOfPhyBlock * sizeof(u16), GFP_KERNEL); + info->MS_Lib.Log2PhyMap = kmalloc(info->MS_Lib.NumberOfLogBlock * sizeof(u16), GFP_KERNEL); + + if ((info->MS_Lib.Phy2LogMap == NULL) || (info->MS_Lib.Log2PhyMap == NULL)) { + ms_lib_free_logicalmap(us); + return (u32)-1; } - return result; + for (i = 0; i < info->MS_Lib.NumberOfPhyBlock; i++) + info->MS_Lib.Phy2LogMap[i] = MS_LB_NOT_USED; + + for (i = 0; i < info->MS_Lib.NumberOfLogBlock; i++) + info->MS_Lib.Log2PhyMap[i] = MS_LB_NOT_USED; + + return 0; } -static int ene_sd_init(struct us_data *us) +static void ms_lib_clear_writebuf(struct us_data *us) { - int result; - u8 buf[0x200]; - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int i; struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - US_DEBUGP("transport --- ENE_SDInit\n"); - /* SD Init Part-1 */ - result = ene_load_bincode(us, SD_INIT1_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - US_DEBUGP("Load SD Init Code Part-1 Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; + info->MS_Lib.wrtblk = (u16)-1; + ms_lib_clear_pagemap(info); + + if (info->MS_Lib.blkpag) + memset(info->MS_Lib.blkpag, 0xff, info->MS_Lib.PagesPerBlock * info->MS_Lib.BytesPerSector); + + if (info->MS_Lib.blkext) { + for (i = 0; i < info->MS_Lib.PagesPerBlock; i++) { + info->MS_Lib.blkext[i].status1 = MS_REG_ST1_DEFAULT; + info->MS_Lib.blkext[i].ovrflg = MS_REG_OVR_DEFAULT; + info->MS_Lib.blkext[i].mngflg = MS_REG_MNG_DEFAULT; + info->MS_Lib.blkext[i].logadr = MS_LB_NOT_USED; + } } +} - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF2; +static int ms_count_freeblock(struct us_data *us, u16 PhyBlock) +{ + u32 Ende, Count; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - result = ene_send_scsi_cmd(us, FDIR_READ, NULL, 0); - if (result != USB_STOR_XFER_GOOD) { - US_DEBUGP("Execution SD Init Code Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; + Ende = PhyBlock + MS_PHYSICAL_BLOCKS_PER_SEGMENT; + for (Count = 0; PhyBlock < Ende; PhyBlock++) { + switch (info->MS_Lib.Phy2LogMap[PhyBlock]) { + case MS_LB_NOT_USED: + case MS_LB_NOT_USED_ERASED: + Count++; + default: + break; + } } - /* SD Init Part-2 */ - result = ene_load_bincode(us, SD_INIT2_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - US_DEBUGP("Load SD Init Code Part-2 Fail !!\n"); + return Count; +} + +static int ms_read_readpage(struct us_data *us, u32 PhyBlockAddr, + u8 PageNum, u32 *PageBuf, struct ms_lib_type_extdat *ExtraDat) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + u8 ExtBuf[4]; + u32 bn = PhyBlockAddr * 0x20 + PageNum; + + /* printk(KERN_INFO "MS --- MS_ReaderReadPage, + PhyBlockAddr = %x, PageNum = %x\n", PhyBlockAddr, PageNum); */ + + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) return USB_STOR_TRANSPORT_ERROR; - } + /* Read Page Data */ memset(bcb, 0, sizeof(struct bulk_cb_wrap)); bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); bcb->DataTransferLength = 0x200; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; - result = ene_send_scsi_cmd(us, FDIR_READ, &buf, 0); - if (result != USB_STOR_XFER_GOOD) { - US_DEBUGP("Execution SD Init Code Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; - } + bcb->CDB[1] = 0x02; /* in init.c ENE_MSInit() is 0x01 */ - info->SD_Status = *(struct SD_STATUS *)&buf[0]; - if (info->SD_Status.Insert && info->SD_Status.Ready) { - ene_get_card_status(us, (unsigned char *)&buf); - US_DEBUGP("Insert = %x\n", info->SD_Status.Insert); - US_DEBUGP("Ready = %x\n", info->SD_Status.Ready); - US_DEBUGP("IsMMC = %x\n", info->SD_Status.IsMMC); - US_DEBUGP("HiCapacity = %x\n", info->SD_Status.HiCapacity); - US_DEBUGP("HiSpeed = %x\n", info->SD_Status.HiSpeed); - US_DEBUGP("WtP = %x\n", info->SD_Status.WtP); - } else { - US_DEBUGP("SD Card Not Ready --- %x\n", buf[0]); - return USB_STOR_TRANSPORT_ERROR; - } - return USB_STOR_TRANSPORT_GOOD; -} + bcb->CDB[5] = (unsigned char)(bn); + bcb->CDB[4] = (unsigned char)(bn>>8); + bcb->CDB[3] = (unsigned char)(bn>>16); + bcb->CDB[2] = (unsigned char)(bn>>24); + result = ene_send_scsi_cmd(us, FDIR_READ, PageBuf, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; -static int ene_init(struct us_data *us) -{ - int result; - u8 misc_reg03 = 0; - struct ene_ub6250_info *info = (struct ene_ub6250_info *)(us->extra); - result = ene_get_card_type(us, REG_CARD_STATUS, &misc_reg03); + /* Read Extra Data */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x4; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x03; + + bcb->CDB[5] = (unsigned char)(PageNum); + bcb->CDB[4] = (unsigned char)(PhyBlockAddr); + bcb->CDB[3] = (unsigned char)(PhyBlockAddr>>8); + bcb->CDB[2] = (unsigned char)(PhyBlockAddr>>16); + bcb->CDB[6] = 0x01; + + result = ene_send_scsi_cmd(us, FDIR_READ, &ExtBuf, 0); if (result != USB_STOR_XFER_GOOD) return USB_STOR_TRANSPORT_ERROR; - if (misc_reg03 & 0x01) { - if (!info->SD_Status.Ready) { - result = ene_sd_init(us); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - } - } + ExtraDat->reserved = 0; + ExtraDat->intr = 0x80; /* Not yet,fireware support */ + ExtraDat->status0 = 0x10; /* Not yet,fireware support */ - return result; + ExtraDat->status1 = 0x00; /* Not yet,fireware support */ + ExtraDat->ovrflg = ExtBuf[0]; + ExtraDat->mngflg = ExtBuf[1]; + ExtraDat->logadr = memstick_logaddr(ExtBuf[2], ExtBuf[3]); + + return USB_STOR_TRANSPORT_GOOD; } -/*----- sd_scsi_irp() ---------*/ -static int sd_scsi_irp(struct us_data *us, struct scsi_cmnd *srb) +static int ms_lib_process_bootblock(struct us_data *us, u16 PhyBlock, u8 *PageData) { - int result; - struct ene_ub6250_info *info = (struct ene_ub6250_info *)us->extra; + struct ms_bootblock_sysent *SysEntry; + struct ms_bootblock_sysinf *SysInfo; + u32 i, result; + u8 PageNumber; + u8 *PageBuffer; + struct ms_lib_type_extdat ExtraData; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; - info->SrbStatus = SS_SUCCESS; - switch (srb->cmnd[0]) { - case TEST_UNIT_READY: - result = sd_scsi_test_unit_ready(us, srb); - break; /* 0x00 */ - case INQUIRY: - result = sd_scsi_inquiry(us, srb); - break; /* 0x12 */ - case MODE_SENSE: - result = sd_scsi_mode_sense(us, srb); - break; /* 0x1A */ - /* - case START_STOP: - result = SD_SCSI_Start_Stop(us, srb); - break; //0x1B - */ - case READ_CAPACITY: - result = sd_scsi_read_capacity(us, srb); - break; /* 0x25 */ - case READ_10: - result = sd_scsi_read(us, srb); - break; /* 0x28 */ - case WRITE_10: - result = sd_scsi_write(us, srb); - break; /* 0x2A */ - default: - info->SrbStatus = SS_ILLEGAL_REQUEST; - result = USB_STOR_TRANSPORT_FAILED; + PageBuffer = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); + if (PageBuffer == NULL) + return (u32)-1; + + result = (u32)-1; + + SysInfo = &(((struct ms_bootblock_page0 *)PageData)->sysinf); + + if ((SysInfo->bMsClass != MS_SYSINF_MSCLASS_TYPE_1) || + (be16_to_cpu(SysInfo->wPageSize) != MS_SYSINF_PAGE_SIZE) || + ((SysInfo->bSecuritySupport & MS_SYSINF_SECURITY) == MS_SYSINF_SECURITY_SUPPORT) || + (SysInfo->bReserved1 != MS_SYSINF_RESERVED1) || + (SysInfo->bReserved2 != MS_SYSINF_RESERVED2) || + (SysInfo->bFormatType != MS_SYSINF_FORMAT_FAT) || + (SysInfo->bUsage != MS_SYSINF_USAGE_GENERAL)) + goto exit; + /* */ + switch (info->MS_Lib.cardType = SysInfo->bCardType) { + case MS_SYSINF_CARDTYPE_RDONLY: + ms_lib_ctrl_set(info, MS_LIB_CTRL_RDONLY); + break; + case MS_SYSINF_CARDTYPE_RDWR: + ms_lib_ctrl_reset(info, MS_LIB_CTRL_RDONLY); break; + case MS_SYSINF_CARDTYPE_HYBRID: + default: + goto exit; } + + info->MS_Lib.blockSize = be16_to_cpu(SysInfo->wBlockSize); + info->MS_Lib.NumberOfPhyBlock = be16_to_cpu(SysInfo->wBlockNumber); + info->MS_Lib.NumberOfLogBlock = be16_to_cpu(SysInfo->wTotalBlockNumber)-2; + info->MS_Lib.PagesPerBlock = info->MS_Lib.blockSize * SIZE_OF_KIRO / MS_BYTES_PER_PAGE; + info->MS_Lib.NumberOfSegment = info->MS_Lib.NumberOfPhyBlock / MS_PHYSICAL_BLOCKS_PER_SEGMENT; + info->MS_Model = be16_to_cpu(SysInfo->wMemorySize); + + /*Allocate to all number of logicalblock and physicalblock */ + if (ms_lib_alloc_logicalmap(us)) + goto exit; + + /* Mark the book block */ + ms_lib_set_bootblockmark(us, PhyBlock); + + SysEntry = &(((struct ms_bootblock_page0 *)PageData)->sysent); + + for (i = 0; i < MS_NUMBER_OF_SYSTEM_ENTRY; i++) { + u32 EntryOffset, EntrySize; + + EntryOffset = be32_to_cpu(SysEntry->entry[i].dwStart); + + if (EntryOffset == 0xffffff) + continue; + EntrySize = be32_to_cpu(SysEntry->entry[i].dwSize); + + if (EntrySize == 0) + continue; + + if (EntryOffset + MS_BYTES_PER_PAGE + EntrySize > info->MS_Lib.blockSize * (u32)SIZE_OF_KIRO) + continue; + + if (i == 0) { + u8 PrevPageNumber = 0; + u16 phyblk; + + if (SysEntry->entry[i].bType != MS_SYSENT_TYPE_INVALID_BLOCK) + goto exit; + + while (EntrySize > 0) { + + PageNumber = (u8)(EntryOffset / MS_BYTES_PER_PAGE + 1); + if (PageNumber != PrevPageNumber) { + switch (ms_read_readpage(us, PhyBlock, PageNumber, (u32 *)PageBuffer, &ExtraData)) { + case MS_STATUS_SUCCESS: + break; + case MS_STATUS_WRITE_PROTECT: + case MS_ERROR_FLASH_READ: + case MS_STATUS_ERROR: + default: + goto exit; + } + + PrevPageNumber = PageNumber; + } + + phyblk = be16_to_cpu(*(u16 *)(PageBuffer + (EntryOffset % MS_BYTES_PER_PAGE))); + if (phyblk < 0x0fff) + ms_lib_set_initialerrorblock(us, phyblk); + + EntryOffset += 2; + EntrySize -= 2; + } + } else if (i == 1) { /* CIS/IDI */ + struct ms_bootblock_idi *idi; + + if (SysEntry->entry[i].bType != MS_SYSENT_TYPE_CIS_IDI) + goto exit; + + switch (ms_read_readpage(us, PhyBlock, (u8)(EntryOffset / MS_BYTES_PER_PAGE + 1), (u32 *)PageBuffer, &ExtraData)) { + case MS_STATUS_SUCCESS: + break; + case MS_STATUS_WRITE_PROTECT: + case MS_ERROR_FLASH_READ: + case MS_STATUS_ERROR: + default: + goto exit; + } + + idi = &((struct ms_bootblock_cis_idi *)(PageBuffer + (EntryOffset % MS_BYTES_PER_PAGE)))->idi.idi; + if (le16_to_cpu(idi->wIDIgeneralConfiguration) != MS_IDI_GENERAL_CONF) + goto exit; + + info->MS_Lib.BytesPerSector = le16_to_cpu(idi->wIDIbytesPerSector); + if (info->MS_Lib.BytesPerSector != MS_BYTES_PER_PAGE) + goto exit; + } + } /* End for .. */ + + result = 0; + +exit: + if (result) + ms_lib_free_logicalmap(us); + + kfree(PageBuffer); + + result = 0; return result; } -static int ene_transport(struct scsi_cmnd *srb, struct us_data *us) +static void ms_lib_free_writebuf(struct us_data *us) { - int result = 0; - struct ene_ub6250_info *info = (struct ene_ub6250_info *)(us->extra); + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + info->MS_Lib.wrtblk = (u16)-1; /* set to -1 */ - /*US_DEBUG(usb_stor_show_command(srb)); */ - scsi_set_resid(srb, 0); - if (unlikely(!info->SD_Status.Ready)) - result = ene_init(us); - else - result = sd_scsi_irp(us, srb); + /* memset((fdoExt)->MS_Lib.pagemap, 0, sizeof((fdoExt)->MS_Lib.pagemap)) */ - return 0; -} + ms_lib_clear_pagemap(info); /* (pdx)->MS_Lib.pagemap memset 0 in ms.h */ + + if (info->MS_Lib.blkpag) { + kfree((u8 *)(info->MS_Lib.blkpag)); /* Arnold test ... */ + info->MS_Lib.blkpag = NULL; + } + + if (info->MS_Lib.blkext) { + kfree((u8 *)(info->MS_Lib.blkext)); /* Arnold test ... */ + info->MS_Lib.blkext = NULL; + } +} + + +static void ms_lib_free_allocatedarea(struct us_data *us) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + ms_lib_free_writebuf(us); /* Free MS_Lib.pagemap */ + ms_lib_free_logicalmap(us); /* kfree MS_Lib.Phy2LogMap and MS_Lib.Log2PhyMap */ + + /* set struct us point flag to 0 */ + info->MS_Lib.flags = 0; + info->MS_Lib.BytesPerSector = 0; + info->MS_Lib.SectorsPerCylinder = 0; + + info->MS_Lib.cardType = 0; + info->MS_Lib.blockSize = 0; + info->MS_Lib.PagesPerBlock = 0; + + info->MS_Lib.NumberOfPhyBlock = 0; + info->MS_Lib.NumberOfLogBlock = 0; +} + + +static int ms_lib_alloc_writebuf(struct us_data *us) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + info->MS_Lib.wrtblk = (u16)-1; + + info->MS_Lib.blkpag = kmalloc(info->MS_Lib.PagesPerBlock * info->MS_Lib.BytesPerSector, GFP_KERNEL); + info->MS_Lib.blkext = kmalloc(info->MS_Lib.PagesPerBlock * sizeof(struct ms_lib_type_extdat), GFP_KERNEL); + + if ((info->MS_Lib.blkpag == NULL) || (info->MS_Lib.blkext == NULL)) { + ms_lib_free_writebuf(us); + return (u32)-1; + } + + ms_lib_clear_writebuf(us); + +return 0; +} + +static int ms_lib_force_setlogical_pair(struct us_data *us, u16 logblk, u16 phyblk) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + if (logblk == MS_LB_NOT_USED) + return 0; + + if ((logblk >= info->MS_Lib.NumberOfLogBlock) || + (phyblk >= info->MS_Lib.NumberOfPhyBlock)) + return (u32)-1; + + info->MS_Lib.Phy2LogMap[phyblk] = logblk; + info->MS_Lib.Log2PhyMap[logblk] = phyblk; + + return 0; +} + +static int ms_read_copyblock(struct us_data *us, u16 oldphy, u16 newphy, + u16 PhyBlockAddr, u8 PageNum, unsigned char *buf, u16 len) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + + /* printk(KERN_INFO "MS_ReaderCopyBlock --- PhyBlockAddr = %x, + PageNum = %x\n", PhyBlockAddr, PageNum); */ + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x200*len; + bcb->Flags = 0x00; + bcb->CDB[0] = 0xF0; + bcb->CDB[1] = 0x08; + bcb->CDB[4] = (unsigned char)(oldphy); + bcb->CDB[3] = (unsigned char)(oldphy>>8); + bcb->CDB[2] = 0; /* (BYTE)(oldphy>>16) */ + bcb->CDB[7] = (unsigned char)(newphy); + bcb->CDB[6] = (unsigned char)(newphy>>8); + bcb->CDB[5] = 0; /* (BYTE)(newphy>>16) */ + bcb->CDB[9] = (unsigned char)(PhyBlockAddr); + bcb->CDB[8] = (unsigned char)(PhyBlockAddr>>8); + bcb->CDB[10] = PageNum; + + result = ene_send_scsi_cmd(us, FDIR_WRITE, buf, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_read_eraseblock(struct us_data *us, u32 PhyBlockAddr) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + u32 bn = PhyBlockAddr; + + /* printk(KERN_INFO "MS --- ms_read_eraseblock, + PhyBlockAddr = %x\n", PhyBlockAddr); */ + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x200; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF2; + bcb->CDB[1] = 0x06; + bcb->CDB[4] = (unsigned char)(bn); + bcb->CDB[3] = (unsigned char)(bn>>8); + bcb->CDB[2] = (unsigned char)(bn>>16); + + result = ene_send_scsi_cmd(us, FDIR_READ, NULL, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_lib_check_disableblock(struct us_data *us, u16 PhyBlock) +{ + unsigned char *PageBuf = NULL; + u16 result = MS_STATUS_SUCCESS; + u16 blk, index = 0; + struct ms_lib_type_extdat extdat; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + PageBuf = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); + if (PageBuf == NULL) { + result = MS_NO_MEMORY_ERROR; + goto exit; + } + + ms_read_readpage(us, PhyBlock, 1, (u32 *)PageBuf, &extdat); + do { + blk = be16_to_cpu(PageBuf[index]); + if (blk == MS_LB_NOT_USED) + break; + if (blk == info->MS_Lib.Log2PhyMap[0]) { + result = MS_ERROR_FLASH_READ; + break; + } + index++; + } while (1); + +exit: + kfree(PageBuf); + return result; +} + +static int ms_lib_setacquired_errorblock(struct us_data *us, u16 phyblk) +{ + u16 log; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + if (phyblk >= info->MS_Lib.NumberOfPhyBlock) + return (u32)-1; + + log = info->MS_Lib.Phy2LogMap[phyblk]; + + if (log < info->MS_Lib.NumberOfLogBlock) + info->MS_Lib.Log2PhyMap[log] = MS_LB_NOT_USED; + + if (info->MS_Lib.Phy2LogMap[phyblk] != MS_LB_INITIAL_ERROR) + info->MS_Lib.Phy2LogMap[phyblk] = MS_LB_ACQUIRED_ERROR; + + return 0; +} + +static int ms_lib_overwrite_extra(struct us_data *us, u32 PhyBlockAddr, + u8 PageNum, u8 OverwriteFlag) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + + /* printk("MS --- MS_LibOverwriteExtra, + PhyBlockAddr = %x, PageNum = %x\n", PhyBlockAddr, PageNum); */ + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x4; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF2; + bcb->CDB[1] = 0x05; + bcb->CDB[5] = (unsigned char)(PageNum); + bcb->CDB[4] = (unsigned char)(PhyBlockAddr); + bcb->CDB[3] = (unsigned char)(PhyBlockAddr>>8); + bcb->CDB[2] = (unsigned char)(PhyBlockAddr>>16); + bcb->CDB[6] = OverwriteFlag; + bcb->CDB[7] = 0xFF; + bcb->CDB[8] = 0xFF; + bcb->CDB[9] = 0xFF; + + result = ene_send_scsi_cmd(us, FDIR_READ, NULL, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_lib_error_phyblock(struct us_data *us, u16 phyblk) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + if (phyblk >= info->MS_Lib.NumberOfPhyBlock) + return MS_STATUS_ERROR; + + ms_lib_setacquired_errorblock(us, phyblk); + + if (ms_lib_iswritable(info)) + return ms_lib_overwrite_extra(us, phyblk, 0, (u8)(~MS_REG_OVR_BKST & BYTE_MASK)); + + return MS_STATUS_SUCCESS; +} + +static int ms_lib_erase_phyblock(struct us_data *us, u16 phyblk) +{ + u16 log; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + if (phyblk >= info->MS_Lib.NumberOfPhyBlock) + return MS_STATUS_ERROR; + + log = info->MS_Lib.Phy2LogMap[phyblk]; + + if (log < info->MS_Lib.NumberOfLogBlock) + info->MS_Lib.Log2PhyMap[log] = MS_LB_NOT_USED; + + info->MS_Lib.Phy2LogMap[phyblk] = MS_LB_NOT_USED; + + if (ms_lib_iswritable(info)) { + switch (ms_read_eraseblock(us, phyblk)) { + case MS_STATUS_SUCCESS: + info->MS_Lib.Phy2LogMap[phyblk] = MS_LB_NOT_USED_ERASED; + return MS_STATUS_SUCCESS; + case MS_ERROR_FLASH_ERASE: + case MS_STATUS_INT_ERROR: + ms_lib_error_phyblock(us, phyblk); + return MS_ERROR_FLASH_ERASE; + case MS_STATUS_ERROR: + default: + ms_lib_ctrl_set(info, MS_LIB_CTRL_RDONLY); /* MS_LibCtrlSet will used by ENE_MSInit ,need check, and why us to info*/ + ms_lib_setacquired_errorblock(us, phyblk); + return MS_STATUS_ERROR; + } + } + + ms_lib_setacquired_errorblock(us, phyblk); + + return MS_STATUS_SUCCESS; +} + +static int ms_lib_read_extra(struct us_data *us, u32 PhyBlock, + u8 PageNum, struct ms_lib_type_extdat *ExtraDat) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + u8 ExtBuf[4]; + + /* printk("MS_LibReadExtra --- PhyBlock = %x, PageNum = %x\n", PhyBlock, PageNum); */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x4; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x03; + bcb->CDB[5] = (unsigned char)(PageNum); + bcb->CDB[4] = (unsigned char)(PhyBlock); + bcb->CDB[3] = (unsigned char)(PhyBlock>>8); + bcb->CDB[2] = (unsigned char)(PhyBlock>>16); + bcb->CDB[6] = 0x01; + + result = ene_send_scsi_cmd(us, FDIR_READ, &ExtBuf, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + ExtraDat->reserved = 0; + ExtraDat->intr = 0x80; /* Not yet, waiting for fireware support */ + ExtraDat->status0 = 0x10; /* Not yet, waiting for fireware support */ + ExtraDat->status1 = 0x00; /* Not yet, waiting for fireware support */ + ExtraDat->ovrflg = ExtBuf[0]; + ExtraDat->mngflg = ExtBuf[1]; + ExtraDat->logadr = memstick_logaddr(ExtBuf[2], ExtBuf[3]); + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_libsearch_block_from_physical(struct us_data *us, u16 phyblk) +{ + u16 Newblk; + u16 blk; + struct ms_lib_type_extdat extdat; /* need check */ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + + if (phyblk >= info->MS_Lib.NumberOfPhyBlock) + return MS_LB_ERROR; + + for (blk = phyblk + 1; blk != phyblk; blk++) { + if ((blk & MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK) == 0) + blk -= MS_PHYSICAL_BLOCKS_PER_SEGMENT; + + Newblk = info->MS_Lib.Phy2LogMap[blk]; + if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED_ERASED) { + return blk; + } else if (info->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED) { + switch (ms_lib_read_extra(us, blk, 0, &extdat)) { + case MS_STATUS_SUCCESS: + case MS_STATUS_SUCCESS_WITH_ECC: + break; + case MS_NOCARD_ERROR: + return MS_NOCARD_ERROR; + case MS_STATUS_INT_ERROR: + return MS_LB_ERROR; + case MS_ERROR_FLASH_READ: + default: + ms_lib_setacquired_errorblock(us, blk); + continue; + } /* End switch */ + + if ((extdat.ovrflg & MS_REG_OVR_BKST) != MS_REG_OVR_BKST_OK) { + ms_lib_setacquired_errorblock(us, blk); + continue; + } + + switch (ms_lib_erase_phyblock(us, blk)) { + case MS_STATUS_SUCCESS: + return blk; + case MS_STATUS_ERROR: + return MS_LB_ERROR; + case MS_ERROR_FLASH_ERASE: + default: + ms_lib_error_phyblock(us, blk); + break; + } + } + } /* End for */ + + return MS_LB_ERROR; +} +static int ms_libsearch_block_from_logical(struct us_data *us, u16 logblk) +{ + u16 phyblk; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + phyblk = ms_libconv_to_physical(info, logblk); + if (phyblk >= MS_LB_ERROR) { + if (logblk >= info->MS_Lib.NumberOfLogBlock) + return MS_LB_ERROR; + + phyblk = (logblk + MS_NUMBER_OF_BOOT_BLOCK) / MS_LOGICAL_BLOCKS_PER_SEGMENT; + phyblk *= MS_PHYSICAL_BLOCKS_PER_SEGMENT; + phyblk += MS_PHYSICAL_BLOCKS_PER_SEGMENT - 1; + } + + return ms_libsearch_block_from_physical(us, phyblk); +} + +static int ms_scsi_test_unit_ready(struct us_data *us, struct scsi_cmnd *srb) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *)(us->extra); + + /* pr_info("MS_SCSI_Test_Unit_Ready\n"); */ + if (info->MS_Status.Insert && info->MS_Status.Ready) { + return USB_STOR_TRANSPORT_GOOD; + } else { + ene_ms_init(us); + return USB_STOR_TRANSPORT_GOOD; + } + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_scsi_inquiry(struct us_data *us, struct scsi_cmnd *srb) +{ + /* pr_info("MS_SCSI_Inquiry\n"); */ + unsigned char data_ptr[36] = { + 0x00, 0x80, 0x02, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x55, + 0x53, 0x42, 0x32, 0x2E, 0x30, 0x20, 0x20, 0x43, 0x61, + 0x72, 0x64, 0x52, 0x65, 0x61, 0x64, 0x65, 0x72, 0x20, + 0x20, 0x20, 0x20, 0x20, 0x20, 0x30, 0x31, 0x30, 0x30}; + + usb_stor_set_xfer_buf(data_ptr, 36, srb); + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_scsi_mode_sense(struct us_data *us, struct scsi_cmnd *srb) +{ + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + unsigned char mediaNoWP[12] = { + 0x0b, 0x00, 0x00, 0x08, 0x00, 0x00, + 0x71, 0xc0, 0x00, 0x00, 0x02, 0x00 }; + unsigned char mediaWP[12] = { + 0x0b, 0x00, 0x80, 0x08, 0x00, 0x00, + 0x71, 0xc0, 0x00, 0x00, 0x02, 0x00 }; + + if (info->MS_Status.WtP) + usb_stor_set_xfer_buf(mediaWP, 12, srb); + else + usb_stor_set_xfer_buf(mediaNoWP, 12, srb); + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_scsi_read_capacity(struct us_data *us, struct scsi_cmnd *srb) +{ + u32 bl_num; + u16 bl_len; + unsigned int offset = 0; + unsigned char buf[8]; + struct scatterlist *sg = NULL; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + US_DEBUGP("ms_scsi_read_capacity\n"); + bl_len = 0x200; + if (info->MS_Status.IsMSPro) + bl_num = info->MSP_TotalBlock - 1; + else + bl_num = info->MS_Lib.NumberOfLogBlock * info->MS_Lib.blockSize * 2 - 1; + + info->bl_num = bl_num; + US_DEBUGP("bl_len = %x\n", bl_len); + US_DEBUGP("bl_num = %x\n", bl_num); + + /*srb->request_bufflen = 8; */ + buf[0] = (bl_num >> 24) & 0xff; + buf[1] = (bl_num >> 16) & 0xff; + buf[2] = (bl_num >> 8) & 0xff; + buf[3] = (bl_num >> 0) & 0xff; + buf[4] = (bl_len >> 24) & 0xff; + buf[5] = (bl_len >> 16) & 0xff; + buf[6] = (bl_len >> 8) & 0xff; + buf[7] = (bl_len >> 0) & 0xff; + + usb_stor_access_xfer_buf(buf, 8, srb, &sg, &offset, TO_XFER_BUF); + + return USB_STOR_TRANSPORT_GOOD; +} + +static void ms_lib_phy_to_log_range(u16 PhyBlock, u16 *LogStart, u16 *LogEnde) +{ + PhyBlock /= MS_PHYSICAL_BLOCKS_PER_SEGMENT; + + if (PhyBlock) { + *LogStart = MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT + (PhyBlock - 1) * MS_LOGICAL_BLOCKS_PER_SEGMENT;/*496*/ + *LogEnde = *LogStart + MS_LOGICAL_BLOCKS_PER_SEGMENT;/*496*/ + } else { + *LogStart = 0; + *LogEnde = MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT;/*494*/ + } +} + +static int ms_lib_read_extrablock(struct us_data *us, u32 PhyBlock, + u8 PageNum, u8 blen, void *buf) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + + /* printk("MS_LibReadExtraBlock --- PhyBlock = %x, + PageNum = %x, blen = %x\n", PhyBlock, PageNum, blen); */ + + /* Read Extra Data */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x4 * blen; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x03; + bcb->CDB[5] = (unsigned char)(PageNum); + bcb->CDB[4] = (unsigned char)(PhyBlock); + bcb->CDB[3] = (unsigned char)(PhyBlock>>8); + bcb->CDB[2] = (unsigned char)(PhyBlock>>16); + bcb->CDB[6] = blen; + + result = ene_send_scsi_cmd(us, FDIR_READ, buf, 0); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ms_lib_scan_logicalblocknumber(struct us_data *us, u16 btBlk1st) +{ + u16 PhyBlock, newblk, i; + u16 LogStart, LogEnde; + struct ms_lib_type_extdat extdat; + u8 buf[0x200]; + u32 count = 0, index = 0; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + for (PhyBlock = 0; PhyBlock < info->MS_Lib.NumberOfPhyBlock;) { + ms_lib_phy_to_log_range(PhyBlock, &LogStart, &LogEnde); + + for (i = 0; i < MS_PHYSICAL_BLOCKS_PER_SEGMENT; i++, PhyBlock++) { + switch (ms_libconv_to_logical(info, PhyBlock)) { + case MS_STATUS_ERROR: + continue; + default: + break; + } + + if (count == PhyBlock) { + ms_lib_read_extrablock(us, PhyBlock, 0, 0x80, &buf); + count += 0x80; + } + index = (PhyBlock % 0x80) * 4; + + extdat.ovrflg = buf[index]; + extdat.mngflg = buf[index+1]; + extdat.logadr = memstick_logaddr(buf[index+2], buf[index+3]); + + if ((extdat.ovrflg & MS_REG_OVR_BKST) != MS_REG_OVR_BKST_OK) { + ms_lib_setacquired_errorblock(us, PhyBlock); + continue; + } + + if ((extdat.mngflg & MS_REG_MNG_ATFLG) == MS_REG_MNG_ATFLG_ATTBL) { + ms_lib_erase_phyblock(us, PhyBlock); + continue; + } + + if (extdat.logadr != MS_LB_NOT_USED) { + if ((extdat.logadr < LogStart) || (LogEnde <= extdat.logadr)) { + ms_lib_erase_phyblock(us, PhyBlock); + continue; + } + + newblk = ms_libconv_to_physical(info, extdat.logadr); + + if (newblk != MS_LB_NOT_USED) { + if (extdat.logadr == 0) { + ms_lib_set_logicalpair(us, extdat.logadr, PhyBlock); + if (ms_lib_check_disableblock(us, btBlk1st)) { + ms_lib_set_logicalpair(us, extdat.logadr, newblk); + continue; + } + } + + ms_lib_read_extra(us, newblk, 0, &extdat); + if ((extdat.ovrflg & MS_REG_OVR_UDST) == MS_REG_OVR_UDST_UPDATING) { + ms_lib_erase_phyblock(us, PhyBlock); + continue; + } else { + ms_lib_erase_phyblock(us, newblk); + } + } + + ms_lib_set_logicalpair(us, extdat.logadr, PhyBlock); + } + } + } /* End for ... */ + + return MS_STATUS_SUCCESS; +} + + +static int ms_scsi_read(struct us_data *us, struct scsi_cmnd *srb) +{ + int result; + unsigned char *cdb = srb->cmnd; + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + u32 bn = ((cdb[2] << 24) & 0xff000000) | ((cdb[3] << 16) & 0x00ff0000) | + ((cdb[4] << 8) & 0x0000ff00) | ((cdb[5] << 0) & 0x000000ff); + u16 blen = ((cdb[7] << 8) & 0xff00) | ((cdb[8] << 0) & 0x00ff); + u32 blenByte = blen * 0x200; + + if (bn > info->bl_num) + return USB_STOR_TRANSPORT_ERROR; + + if (info->MS_Status.IsMSPro) { + result = ene_load_bincode(us, MSP_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + US_DEBUGP("Load MPS RW pattern Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + /* set up the command wrapper */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = blenByte; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x02; + bcb->CDB[5] = (unsigned char)(bn); + bcb->CDB[4] = (unsigned char)(bn>>8); + bcb->CDB[3] = (unsigned char)(bn>>16); + bcb->CDB[2] = (unsigned char)(bn>>24); + + result = ene_send_scsi_cmd(us, FDIR_READ, scsi_sglist(srb), 1); + } else { + void *buf; + int offset = 0; + u16 phyblk, logblk; + u8 PageNum; + u16 len; + u32 blkno; + + buf = kmalloc(blenByte, GFP_KERNEL); + if (buf == NULL) + return USB_STOR_TRANSPORT_ERROR; + + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + pr_info("Load MS RW pattern Fail !!\n"); + result = USB_STOR_TRANSPORT_ERROR; + goto exit; + } + + logblk = (u16)(bn / info->MS_Lib.PagesPerBlock); + PageNum = (u8)(bn % info->MS_Lib.PagesPerBlock); + + while (1) { + if (blen > (info->MS_Lib.PagesPerBlock-PageNum)) + len = info->MS_Lib.PagesPerBlock-PageNum; + else + len = blen; + + phyblk = ms_libconv_to_physical(info, logblk); + blkno = phyblk * 0x20 + PageNum; + + /* set up the command wrapper */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x200 * len; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x02; + bcb->CDB[5] = (unsigned char)(blkno); + bcb->CDB[4] = (unsigned char)(blkno>>8); + bcb->CDB[3] = (unsigned char)(blkno>>16); + bcb->CDB[2] = (unsigned char)(blkno>>24); + + result = ene_send_scsi_cmd(us, FDIR_READ, buf+offset, 0); + if (result != USB_STOR_XFER_GOOD) { + pr_info("MS_SCSI_Read --- result = %x\n", result); + result = USB_STOR_TRANSPORT_ERROR; + goto exit; + } + + blen -= len; + if (blen <= 0) + break; + logblk++; + PageNum = 0; + offset += MS_BYTES_PER_PAGE*len; + } + usb_stor_set_xfer_buf(buf, blenByte, srb); +exit: + kfree(buf); + } + return result; +} + +static int ms_scsi_write(struct us_data *us, struct scsi_cmnd *srb) +{ + int result; + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + unsigned char *cdb = srb->cmnd; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + u32 bn = ((cdb[2] << 24) & 0xff000000) | + ((cdb[3] << 16) & 0x00ff0000) | + ((cdb[4] << 8) & 0x0000ff00) | + ((cdb[5] << 0) & 0x000000ff); + u16 blen = ((cdb[7] << 8) & 0xff00) | ((cdb[8] << 0) & 0x00ff); + u32 blenByte = blen * 0x200; + + if (bn > info->bl_num) + return USB_STOR_TRANSPORT_ERROR; + + if (info->MS_Status.IsMSPro) { + result = ene_load_bincode(us, MSP_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + pr_info("Load MSP RW pattern Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + /* set up the command wrapper */ + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = blenByte; + bcb->Flags = 0x00; + bcb->CDB[0] = 0xF0; + bcb->CDB[1] = 0x04; + bcb->CDB[5] = (unsigned char)(bn); + bcb->CDB[4] = (unsigned char)(bn>>8); + bcb->CDB[3] = (unsigned char)(bn>>16); + bcb->CDB[2] = (unsigned char)(bn>>24); + + result = ene_send_scsi_cmd(us, FDIR_WRITE, scsi_sglist(srb), 1); + } else { + void *buf; + int offset; + u16 PhyBlockAddr; + u8 PageNum; + u32 result; + u16 len, oldphy, newphy; + + buf = kmalloc(blenByte, GFP_KERNEL); + if (buf == NULL) + return USB_STOR_TRANSPORT_ERROR; + usb_stor_set_xfer_buf(buf, blenByte, srb); + + result = ene_load_bincode(us, MS_RW_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + pr_info("Load MS RW pattern Fail !!\n"); + result = USB_STOR_TRANSPORT_ERROR; + goto exit; + } + + PhyBlockAddr = (u16)(bn / info->MS_Lib.PagesPerBlock); + PageNum = (u8)(bn % info->MS_Lib.PagesPerBlock); + + while (1) { + if (blen > (info->MS_Lib.PagesPerBlock-PageNum)) + len = info->MS_Lib.PagesPerBlock-PageNum; + else + len = blen; + + oldphy = ms_libconv_to_physical(info, PhyBlockAddr); /* need check us <-> info */ + newphy = ms_libsearch_block_from_logical(us, PhyBlockAddr); + + result = ms_read_copyblock(us, oldphy, newphy, PhyBlockAddr, PageNum, buf+offset, len); + + if (result != USB_STOR_XFER_GOOD) { + pr_info("MS_SCSI_Write --- result = %x\n", result); + result = USB_STOR_TRANSPORT_ERROR; + goto exit; + } + + info->MS_Lib.Phy2LogMap[oldphy] = MS_LB_NOT_USED_ERASED; + ms_lib_force_setlogical_pair(us, PhyBlockAddr, newphy); + + blen -= len; + if (blen <= 0) + break; + PhyBlockAddr++; + PageNum = 0; + offset += MS_BYTES_PER_PAGE*len; + } +exit: + kfree(buf); + } + return result; +} + +/* + * ENE MS Card + */ + +static int ene_get_card_type(struct us_data *us, u16 index, void *buf) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x01; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xED; + bcb->CDB[2] = (unsigned char)(index>>8); + bcb->CDB[3] = (unsigned char)index; + + result = ene_send_scsi_cmd(us, FDIR_READ, buf, 0); + return result; +} + +static int ene_get_card_status(struct us_data *us, u8 *buf) +{ + u16 tmpreg; + u32 reg4b; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + /*US_DEBUGP("transport --- ENE_ReadSDReg\n");*/ + reg4b = *(u32 *)&buf[0x18]; + info->SD_READ_BL_LEN = (u8)((reg4b >> 8) & 0x0f); + + tmpreg = (u16) reg4b; + reg4b = *(u32 *)(&buf[0x14]); + if (info->SD_Status.HiCapacity && !info->SD_Status.IsMMC) + info->HC_C_SIZE = (reg4b >> 8) & 0x3fffff; + + info->SD_C_SIZE = ((tmpreg & 0x03) << 10) | (u16)(reg4b >> 22); + info->SD_C_SIZE_MULT = (u8)(reg4b >> 7) & 0x07; + if (info->SD_Status.HiCapacity && info->SD_Status.IsMMC) + info->HC_C_SIZE = *(u32 *)(&buf[0x100]); + + if (info->SD_READ_BL_LEN > SD_BLOCK_LEN) { + info->SD_Block_Mult = 1 << (info->SD_READ_BL_LEN-SD_BLOCK_LEN); + info->SD_READ_BL_LEN = SD_BLOCK_LEN; + } else { + info->SD_Block_Mult = 1; + } + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ene_load_bincode(struct us_data *us, unsigned char flag) +{ + int err; + char *fw_name = NULL; + unsigned char *buf = NULL; + const struct firmware *sd_fw = NULL; + int result = USB_STOR_TRANSPORT_ERROR; + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + if (info->BIN_FLAG == flag) + return USB_STOR_TRANSPORT_GOOD; + + switch (flag) { + /* For SD */ + case SD_INIT1_PATTERN: + US_DEBUGP("SD_INIT1_PATTERN\n"); + fw_name = "ene-ub6250/sd_init1.bin"; + break; + case SD_INIT2_PATTERN: + US_DEBUGP("SD_INIT2_PATTERN\n"); + fw_name = "ene-ub6250/sd_init2.bin"; + break; + case SD_RW_PATTERN: + US_DEBUGP("SD_RDWR_PATTERN\n"); + fw_name = "ene-ub6250/sd_rdwr.bin"; + break; + /* For MS */ + case MS_INIT_PATTERN: + US_DEBUGP("MS_INIT_PATTERN\n"); + fw_name = "ene-ub6250/ms_init.bin"; + break; + case MSP_RW_PATTERN: + US_DEBUGP("MSP_RW_PATTERN\n"); + fw_name = "ene-ub6250/msp_rdwr.bin"; + break; + case MS_RW_PATTERN: + US_DEBUGP("MS_RW_PATTERN\n"); + fw_name = "ene-ub6250/ms_rdwr.bin"; + break; + default: + US_DEBUGP("----------- Unknown PATTERN ----------\n"); + goto nofw; + } + + err = request_firmware(&sd_fw, fw_name, &us->pusb_dev->dev); + if (err) { + US_DEBUGP("load firmware %s failed\n", fw_name); + goto nofw; + } + buf = kmalloc(sd_fw->size, GFP_KERNEL); + if (buf == NULL) { + US_DEBUGP("Malloc memory for fireware failed!\n"); + goto nofw; + } + memcpy(buf, sd_fw->data, sd_fw->size); + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = sd_fw->size; + bcb->Flags = 0x00; + bcb->CDB[0] = 0xEF; + + result = ene_send_scsi_cmd(us, FDIR_WRITE, buf, 0); + info->BIN_FLAG = flag; + kfree(buf); + +nofw: + if (sd_fw != NULL) { + release_firmware(sd_fw); + sd_fw = NULL; + } + + return result; +} + +static int ms_card_init(struct us_data *us) +{ + u32 result; + u16 TmpBlock; + unsigned char *PageBuffer0 = NULL, *PageBuffer1 = NULL; + struct ms_lib_type_extdat extdat; + u16 btBlk1st, btBlk2nd; + u32 btBlk1stErred; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + printk(KERN_INFO "MS_CardInit start\n"); + + ms_lib_free_allocatedarea(us); /* Clean buffer and set struct us_data flag to 0 */ + + /* get two PageBuffer */ + PageBuffer0 = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); + PageBuffer1 = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); + if ((PageBuffer0 == NULL) || (PageBuffer1 == NULL)) { + result = MS_NO_MEMORY_ERROR; + goto exit; + } + + btBlk1st = btBlk2nd = MS_LB_NOT_USED; + btBlk1stErred = 0; + + for (TmpBlock = 0; TmpBlock < MS_MAX_INITIAL_ERROR_BLOCKS+2; TmpBlock++) { + + switch (ms_read_readpage(us, TmpBlock, 0, (u32 *)PageBuffer0, &extdat)) { + case MS_STATUS_SUCCESS: + break; + case MS_STATUS_INT_ERROR: + break; + case MS_STATUS_ERROR: + default: + continue; + } + + if ((extdat.ovrflg & MS_REG_OVR_BKST) == MS_REG_OVR_BKST_NG) + continue; + + if (((extdat.mngflg & MS_REG_MNG_SYSFLG) == MS_REG_MNG_SYSFLG_USER) || + (be16_to_cpu(((struct ms_bootblock_page0 *)PageBuffer0)->header.wBlockID) != MS_BOOT_BLOCK_ID) || + (be16_to_cpu(((struct ms_bootblock_page0 *)PageBuffer0)->header.wFormatVersion) != MS_BOOT_BLOCK_FORMAT_VERSION) || + (((struct ms_bootblock_page0 *)PageBuffer0)->header.bNumberOfDataEntry != MS_BOOT_BLOCK_DATA_ENTRIES)) + continue; + + if (btBlk1st != MS_LB_NOT_USED) { + btBlk2nd = TmpBlock; + break; + } + + btBlk1st = TmpBlock; + memcpy(PageBuffer1, PageBuffer0, MS_BYTES_PER_PAGE); + if (extdat.status1 & (MS_REG_ST1_DTER | MS_REG_ST1_EXER | MS_REG_ST1_FGER)) + btBlk1stErred = 1; + } + + if (btBlk1st == MS_LB_NOT_USED) { + result = MS_STATUS_ERROR; + goto exit; + } + + /* write protect */ + if ((extdat.status0 & MS_REG_ST0_WP) == MS_REG_ST0_WP_ON) + ms_lib_ctrl_set(info, MS_LIB_CTRL_WRPROTECT); + + result = MS_STATUS_ERROR; + /* 1st Boot Block */ + if (btBlk1stErred == 0) + result = ms_lib_process_bootblock(us, btBlk1st, PageBuffer1); + /* 1st */ + /* 2nd Boot Block */ + if (result && (btBlk2nd != MS_LB_NOT_USED)) + result = ms_lib_process_bootblock(us, btBlk2nd, PageBuffer0); + + if (result) { + result = MS_STATUS_ERROR; + goto exit; + } + + for (TmpBlock = 0; TmpBlock < btBlk1st; TmpBlock++) + info->MS_Lib.Phy2LogMap[TmpBlock] = MS_LB_INITIAL_ERROR; + + info->MS_Lib.Phy2LogMap[btBlk1st] = MS_LB_BOOT_BLOCK; + + if (btBlk2nd != MS_LB_NOT_USED) { + for (TmpBlock = btBlk1st + 1; TmpBlock < btBlk2nd; TmpBlock++) + info->MS_Lib.Phy2LogMap[TmpBlock] = MS_LB_INITIAL_ERROR; + + info->MS_Lib.Phy2LogMap[btBlk2nd] = MS_LB_BOOT_BLOCK; + } + + result = ms_lib_scan_logicalblocknumber(us, btBlk1st); + if (result) + goto exit; + + for (TmpBlock = MS_PHYSICAL_BLOCKS_PER_SEGMENT; + TmpBlock < info->MS_Lib.NumberOfPhyBlock; + TmpBlock += MS_PHYSICAL_BLOCKS_PER_SEGMENT) { + if (ms_count_freeblock(us, TmpBlock) == 0) { + ms_lib_ctrl_set(info, MS_LIB_CTRL_WRPROTECT); + break; + } + } + + /* write */ + if (ms_lib_alloc_writebuf(us)) { + result = MS_NO_MEMORY_ERROR; + goto exit; + } + + result = MS_STATUS_SUCCESS; + +exit: + kfree(PageBuffer1); + kfree(PageBuffer0); + + printk(KERN_INFO "MS_CardInit end\n"); + return result; +} + +static int ene_ms_init(struct us_data *us) +{ + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + int result; + u8 buf[0x200]; + u16 MSP_BlockSize, MSP_UserAreaBlocks; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + printk(KERN_INFO "transport --- ENE_MSInit\n"); + + /* the same part to test ENE */ + + result = ene_load_bincode(us, MS_INIT_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + printk(KERN_ERR "Load MS Init Code Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x200; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + bcb->CDB[1] = 0x01; + + result = ene_send_scsi_cmd(us, FDIR_READ, &buf, 0); + if (result != USB_STOR_XFER_GOOD) { + printk(KERN_ERR "Execution MS Init Code Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + /* the same part to test ENE */ + info->MS_Status = *(struct MS_STATUS *)&buf[0]; + + if (info->MS_Status.Insert && info->MS_Status.Ready) { + printk(KERN_INFO "Insert = %x\n", info->MS_Status.Insert); + printk(KERN_INFO "Ready = %x\n", info->MS_Status.Ready); + printk(KERN_INFO "IsMSPro = %x\n", info->MS_Status.IsMSPro); + printk(KERN_INFO "IsMSPHG = %x\n", info->MS_Status.IsMSPHG); + printk(KERN_INFO "WtP= %x\n", info->MS_Status.WtP); + if (info->MS_Status.IsMSPro) { + MSP_BlockSize = (buf[6] << 8) | buf[7]; + MSP_UserAreaBlocks = (buf[10] << 8) | buf[11]; + info->MSP_TotalBlock = MSP_BlockSize * MSP_UserAreaBlocks; + } else { + ms_card_init(us); /* Card is MS (to ms.c)*/ + } + US_DEBUGP("MS Init Code OK !!\n"); + } else { + US_DEBUGP("MS Card Not Ready --- %x\n", buf[0]); + return USB_STOR_TRANSPORT_ERROR; + } + + return USB_STOR_TRANSPORT_GOOD; +} + +static int ene_sd_init(struct us_data *us) +{ + int result; + u8 buf[0x200]; + struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; + struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; + + US_DEBUGP("transport --- ENE_SDInit\n"); + /* SD Init Part-1 */ + result = ene_load_bincode(us, SD_INIT1_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + US_DEBUGP("Load SD Init Code Part-1 Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF2; + + result = ene_send_scsi_cmd(us, FDIR_READ, NULL, 0); + if (result != USB_STOR_XFER_GOOD) { + US_DEBUGP("Execution SD Init Code Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + /* SD Init Part-2 */ + result = ene_load_bincode(us, SD_INIT2_PATTERN); + if (result != USB_STOR_XFER_GOOD) { + US_DEBUGP("Load SD Init Code Part-2 Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + memset(bcb, 0, sizeof(struct bulk_cb_wrap)); + bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); + bcb->DataTransferLength = 0x200; + bcb->Flags = 0x80; + bcb->CDB[0] = 0xF1; + + result = ene_send_scsi_cmd(us, FDIR_READ, &buf, 0); + if (result != USB_STOR_XFER_GOOD) { + US_DEBUGP("Execution SD Init Code Fail !!\n"); + return USB_STOR_TRANSPORT_ERROR; + } + + info->SD_Status = *(struct SD_STATUS *)&buf[0]; + if (info->SD_Status.Insert && info->SD_Status.Ready) { + ene_get_card_status(us, (unsigned char *)&buf); + US_DEBUGP("Insert = %x\n", info->SD_Status.Insert); + US_DEBUGP("Ready = %x\n", info->SD_Status.Ready); + US_DEBUGP("IsMMC = %x\n", info->SD_Status.IsMMC); + US_DEBUGP("HiCapacity = %x\n", info->SD_Status.HiCapacity); + US_DEBUGP("HiSpeed = %x\n", info->SD_Status.HiSpeed); + US_DEBUGP("WtP = %x\n", info->SD_Status.WtP); + } else { + US_DEBUGP("SD Card Not Ready --- %x\n", buf[0]); + return USB_STOR_TRANSPORT_ERROR; + } + return USB_STOR_TRANSPORT_GOOD; +} + + +static int ene_init(struct us_data *us) +{ + int result; + u8 misc_reg03 = 0; + struct ene_ub6250_info *info = (struct ene_ub6250_info *)(us->extra); + + result = ene_get_card_type(us, REG_CARD_STATUS, &misc_reg03); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + + if (misc_reg03 & 0x01) { + if (!info->SD_Status.Ready) { + result = ene_sd_init(us); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + } + } + if (misc_reg03 & 0x02) { + if (!info->MS_Status.Ready) { + result = ene_ms_init(us); + if (result != USB_STOR_XFER_GOOD) + return USB_STOR_TRANSPORT_ERROR; + } + } + return result; +} + +/*----- sd_scsi_irp() ---------*/ +static int sd_scsi_irp(struct us_data *us, struct scsi_cmnd *srb) +{ + int result; + struct ene_ub6250_info *info = (struct ene_ub6250_info *)us->extra; + + info->SrbStatus = SS_SUCCESS; + switch (srb->cmnd[0]) { + case TEST_UNIT_READY: + result = sd_scsi_test_unit_ready(us, srb); + break; /* 0x00 */ + case INQUIRY: + result = sd_scsi_inquiry(us, srb); + break; /* 0x12 */ + case MODE_SENSE: + result = sd_scsi_mode_sense(us, srb); + break; /* 0x1A */ + /* + case START_STOP: + result = SD_SCSI_Start_Stop(us, srb); + break; //0x1B + */ + case READ_CAPACITY: + result = sd_scsi_read_capacity(us, srb); + break; /* 0x25 */ + case READ_10: + result = sd_scsi_read(us, srb); + break; /* 0x28 */ + case WRITE_10: + result = sd_scsi_write(us, srb); + break; /* 0x2A */ + default: + info->SrbStatus = SS_ILLEGAL_REQUEST; + result = USB_STOR_TRANSPORT_FAILED; + break; + } + return result; +} + +/* + * ms_scsi_irp() + */ +int ms_scsi_irp(struct us_data *us, struct scsi_cmnd *srb) +{ + int result; + struct ene_ub6250_info *info = (struct ene_ub6250_info *)us->extra; + info->SrbStatus = SS_SUCCESS; + switch (srb->cmnd[0]) { + case TEST_UNIT_READY: + result = ms_scsi_test_unit_ready(us, srb); + break; /* 0x00 */ + case INQUIRY: + result = ms_scsi_inquiry(us, srb); + break; /* 0x12 */ + case MODE_SENSE: + result = ms_scsi_mode_sense(us, srb); + break; /* 0x1A */ + case READ_CAPACITY: + result = ms_scsi_read_capacity(us, srb); + break; /* 0x25 */ + case READ_10: + result = ms_scsi_read(us, srb); + break; /* 0x28 */ + case WRITE_10: + result = ms_scsi_write(us, srb); + break; /* 0x2A */ + default: + info->SrbStatus = SS_ILLEGAL_REQUEST; + result = USB_STOR_TRANSPORT_FAILED; + break; + } + return result; +} + +static int ene_transport(struct scsi_cmnd *srb, struct us_data *us) +{ + int result = 0; + struct ene_ub6250_info *info = (struct ene_ub6250_info *)(us->extra); + + /*US_DEBUG(usb_stor_show_command(srb)); */ + scsi_set_resid(srb, 0); + if (unlikely(!(info->SD_Status.Ready || info->MS_Status.Ready))) { + result = ene_init(us); + } else { + if (info->SD_Status.Ready) + result = sd_scsi_irp(us, srb); + + if (info->MS_Status.Ready) + result = ms_scsi_irp(us, srb); + } + return 0; +} static int ene_ub6250_probe(struct usb_interface *intf, @@ -714,10 +2337,8 @@ static int ene_ub6250_probe(struct usb_interface *intf, } if (!(misc_reg03 & 0x01)) { - result = -ENODEV; - printk(KERN_NOTICE "ums_eneub6250: The driver only supports SD card. " - "To use SM/MS card, please build driver/staging/keucr\n"); - usb_stor_disconnect(intf); + pr_info("ums_eneub6250: The driver only supports SD/MS card. " + "To use SM card, please build driver/staging/keucr\n"); } return result; -- cgit v0.10.2 From 20c3d7f71d31aff167bb4a8c536df3e6bd85dd9e Mon Sep 17 00:00:00 2001 From: "Cho, Yu-Chen" Date: Thu, 7 Jul 2011 11:27:14 +0800 Subject: Staging: Remove ENE UB6250 MS card codes from keucr Remove ENE UB6250 MS card codes from keucr. Signed-off-by: Cho, Yu-Chen Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/keucr/Kconfig b/drivers/staging/keucr/Kconfig index e397fad..ba756bf 100644 --- a/drivers/staging/keucr/Kconfig +++ b/drivers/staging/keucr/Kconfig @@ -1,9 +1,9 @@ config USB_ENESTORAGE - tristate "USB ENE SM/MS card reader support" + tristate "USB ENE SM card reader support" depends on USB && SCSI && m ---help--- - Say Y here if you wish to control a ENE SM/MS Card reader. - To use SD card, please build driver/usb/storage/ums-eneub6250.ko + Say Y here if you wish to control a ENE SM Card reader. + To use SD/MS card, please build driver/usb/storage/ums-eneub6250.ko This option depends on 'SCSI' support being enabled, but you probably also need 'SCSI device support: SCSI disk support' diff --git a/drivers/staging/keucr/Makefile b/drivers/staging/keucr/Makefile index ae928f9..c180bf4 100644 --- a/drivers/staging/keucr/Makefile +++ b/drivers/staging/keucr/Makefile @@ -7,8 +7,6 @@ keucr-y := \ scsiglue.o \ transport.o \ init.o \ - msscsi.o \ - ms.o \ smscsi.o \ smilmain.o \ smilsub.o \ diff --git a/drivers/staging/keucr/init.c b/drivers/staging/keucr/init.c index b5a8937..071bdc2 100644 --- a/drivers/staging/keucr/init.c +++ b/drivers/staging/keucr/init.c @@ -31,9 +31,7 @@ int ENE_InitMedia(struct us_data *us) if (!us->SM_Status.Ready && !us->MS_Status.Ready) { result = ENE_SMInit(us); if (result != USB_STOR_XFER_GOOD) { - result = ENE_MSInit(us); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; + return USB_STOR_TRANSPORT_ERROR; } } @@ -62,60 +60,6 @@ int ENE_Read_BYTE(struct us_data *us, WORD index, void *buf) } /* - * ENE_MSInit(): - */ -int ENE_MSInit(struct us_data *us) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - BYTE buf[0x200]; - WORD MSP_BlockSize, MSP_UserAreaBlocks; - - printk(KERN_INFO "transport --- ENE_MSInit\n"); - result = ENE_LoadBinCode(us, MS_INIT_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - printk(KERN_ERR "Load MS Init Code Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; - } - - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x200; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x01; - - result = ENE_SendScsiCmd(us, FDIR_READ, &buf, 0); - if (result != USB_STOR_XFER_GOOD) { - printk(KERN_ERR "Execution MS Init Code Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; - } - - us->MS_Status = *(PMS_STATUS)&buf[0]; - - if (us->MS_Status.Insert && us->MS_Status.Ready) { - printk(KERN_INFO "Insert = %x\n", us->MS_Status.Insert); - printk(KERN_INFO "Ready = %x\n", us->MS_Status.Ready); - printk(KERN_INFO "IsMSPro = %x\n", us->MS_Status.IsMSPro); - printk(KERN_INFO "IsMSPHG = %x\n", us->MS_Status.IsMSPHG); - printk(KERN_INFO "WtP = %x\n", us->MS_Status.WtP); - if (us->MS_Status.IsMSPro) { - MSP_BlockSize = (buf[6] << 8) | buf[7]; - MSP_UserAreaBlocks = (buf[10] << 8) | buf[11]; - us->MSP_TotalBlock = MSP_BlockSize * MSP_UserAreaBlocks; - } else { - MS_CardInit(us); - } - printk(KERN_INFO "MS Init Code OK !!\n"); - } else { - printk(KERN_INFO "MS Card Not Ready --- %x\n", buf[0]); - return USB_STOR_TRANSPORT_ERROR; - } - - return USB_STOR_TRANSPORT_GOOD; -} - -/* *ENE_SMInit() */ int ENE_SMInit(struct us_data *us) @@ -185,19 +129,6 @@ int ENE_LoadBinCode(struct us_data *us, BYTE flag) if (buf == NULL) return USB_STOR_TRANSPORT_ERROR; switch (flag) { - /* For MS */ - case MS_INIT_PATTERN: - printk(KERN_INFO "MS_INIT_PATTERN\n"); - memcpy(buf, MS_Init, 0x800); - break; - case MSP_RW_PATTERN: - printk(KERN_INFO "MSP_RW_PATTERN\n"); - memcpy(buf, MSP_Rdwr, 0x800); - break; - case MS_RW_PATTERN: - printk(KERN_INFO "MS_RW_PATTERN\n"); - memcpy(buf, MS_Rdwr, 0x800); - break; /* For SS */ case SM_INIT_PATTERN: printk(KERN_INFO "SM_INIT_PATTERN\n"); diff --git a/drivers/staging/keucr/init.h b/drivers/staging/keucr/init.h index f709055..c8b2cd6 100644 --- a/drivers/staging/keucr/init.h +++ b/drivers/staging/keucr/init.h @@ -4,779 +4,6 @@ extern DWORD MediaChange; extern int Check_D_MediaFmt(struct us_data *); -static BYTE MS_Init[] = { -0x90, 0xF0, 0x15, 0xE0, 0xF5, 0x1C, 0x11, 0x2C, -0x90, 0xFF, 0x09, 0xE0, 0x30, 0xE1, 0x06, 0x90, -0xFF, 0x23, 0x74, 0x80, 0xF0, 0x90, 0xFF, 0x09, -0xE0, 0x30, 0xE5, 0xFC, 0x51, 0x59, 0x75, 0x3F, -0x00, 0x75, 0x3E, 0x00, 0x75, 0x3D, 0x00, 0x75, -0x3C, 0x00, 0xD3, 0x22, 0x90, 0xFF, 0x83, 0xE0, -0xA2, 0xE1, 0x92, 0x25, 0x20, 0x25, 0x06, 0xC2, -0x1F, 0xD2, 0x19, 0xC3, 0x22, 0x7F, 0x02, 0x12, -0x2F, 0xCB, 0x20, 0x19, 0x05, 0x30, 0x1F, 0x02, -0xD3, 0x22, 0x90, 0xEA, 0x44, 0x74, 0x80, 0xF0, -0x7F, 0x10, 0x12, 0x2F, 0xC5, 0x90, 0xFE, 0x47, -0xE0, 0x44, 0x80, 0xF0, 0x78, 0x00, 0xE8, 0xC3, -0x94, 0x04, 0x50, 0x0A, 0x7F, 0x88, 0x7E, 0x13, -0x12, 0xE4, 0xA6, 0x08, 0x80, 0xF0, 0x90, 0xFE, -0x45, 0xE0, 0x54, 0xFB, 0xF0, 0x90, 0xFE, 0x47, -0xE0, 0x54, 0xBF, 0xF0, 0x90, 0xFE, 0x45, 0xE0, -0x54, 0xFE, 0xF0, 0x90, 0xFE, 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0x22, -0xEF, 0x20, 0xE0, 0x07, 0x54, 0xC0, 0xB4, 0x80, -0x02, 0x80, 0x02, 0xC3, 0x22, 0xD3, 0x22, 0x30, -0x1E, 0x02, 0x80, 0x0A, 0x12, 0xE7, 0x88, 0x40, -0x03, 0x02, 0xE7, 0x86, 0xD3, 0x22, 0xC3, 0x22, -0xC0, 0x08, 0x75, 0x08, 0x00, 0x20, 0x25, 0x02, -0x80, 0x25, 0x12, 0x2F, 0xA1, 0x50, 0x03, 0xD0, -0x08, 0x22, 0xA9, 0x08, 0xE9, 0x54, 0x07, 0x60, -0x02, 0x80, 0x09, 0xA2, 0x25, 0x40, 0x02, 0x80, -0x0E, 0x12, 0x2F, 0xB3, 0x05, 0x08, 0xE5, 0x08, -0x64, 0x20, 0x60, 0x03, 0x02, 0xE7, 0x8D, 0xD0, -0x08, 0xC3, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x4D, 0x53, 0x2D, 0x52, 0x57, 0x20, 0x20, 0x20, -0x20, 0x20, 0x20, 0x31, 0x30, 0x30, 0x30, 0x30 }; static BYTE SM_Init[] = { 0x7B, 0x09, 0x7C, 0xF0, 0x7D, 0x10, 0x7E, 0xE9, diff --git a/drivers/staging/keucr/ms.c b/drivers/staging/keucr/ms.c deleted file mode 100644 index 087ad73..0000000 --- a/drivers/staging/keucr/ms.c +++ /dev/null @@ -1,1034 +0,0 @@ -#include -#include - -#include "usb.h" -#include "scsiglue.h" -#include "transport.h" -#include "ms.h" - -/* - * MS_ReaderCopyBlock() - */ -int MS_ReaderCopyBlock(struct us_data *us, WORD oldphy, WORD newphy, - WORD PhyBlockAddr, BYTE PageNum, PBYTE buf, WORD len) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - - /* printk(KERN_INFO "MS_ReaderCopyBlock --- PhyBlockAddr = %x, - PageNum = %x\n", PhyBlockAddr, PageNum); */ - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x200*len; - bcb->Flags = 0x00; - bcb->CDB[0] = 0xF0; - bcb->CDB[1] = 0x08; - bcb->CDB[4] = (BYTE)(oldphy); - bcb->CDB[3] = (BYTE)(oldphy>>8); - bcb->CDB[2] = 0; /* (BYTE)(oldphy>>16) */ - bcb->CDB[7] = (BYTE)(newphy); - bcb->CDB[6] = (BYTE)(newphy>>8); - bcb->CDB[5] = 0; /* (BYTE)(newphy>>16) */ - bcb->CDB[9] = (BYTE)(PhyBlockAddr); - bcb->CDB[8] = (BYTE)(PhyBlockAddr>>8); - bcb->CDB[10] = PageNum; - - result = ENE_SendScsiCmd(us, FDIR_WRITE, buf, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_ReaderReadPage() - */ -int MS_ReaderReadPage(struct us_data *us, DWORD PhyBlockAddr, - BYTE PageNum, PDWORD PageBuf, MS_LibTypeExtdat *ExtraDat) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - BYTE ExtBuf[4]; - DWORD bn = PhyBlockAddr * 0x20 + PageNum; - - /* printk(KERN_INFO "MS --- MS_ReaderReadPage, - PhyBlockAddr = %x, PageNum = %x\n", PhyBlockAddr, PageNum); */ - - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - /* Read Page Data */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x200; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x02; - bcb->CDB[5] = (BYTE)(bn); - bcb->CDB[4] = (BYTE)(bn>>8); - bcb->CDB[3] = (BYTE)(bn>>16); - bcb->CDB[2] = (BYTE)(bn>>24); - - result = ENE_SendScsiCmd(us, FDIR_READ, PageBuf, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - /* Read Extra Data */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x4; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x03; - bcb->CDB[5] = (BYTE)(PageNum); - bcb->CDB[4] = (BYTE)(PhyBlockAddr); - bcb->CDB[3] = (BYTE)(PhyBlockAddr>>8); - bcb->CDB[2] = (BYTE)(PhyBlockAddr>>16); - bcb->CDB[6] = 0x01; - - result = ENE_SendScsiCmd(us, FDIR_READ, &ExtBuf, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - ExtraDat->reserved = 0; - ExtraDat->intr = 0x80; /* Not yet,fireware support */ - ExtraDat->status0 = 0x10; /* Not yet,fireware support */ - ExtraDat->status1 = 0x00; /* Not yet,fireware support */ - ExtraDat->ovrflg = ExtBuf[0]; - ExtraDat->mngflg = ExtBuf[1]; - ExtraDat->logadr = MemStickLogAddr(ExtBuf[2], ExtBuf[3]); - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_ReaderEraseBlock() - */ -int MS_ReaderEraseBlock(struct us_data *us, DWORD PhyBlockAddr) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - DWORD bn = PhyBlockAddr; - - /* printk(KERN_INFO "MS --- MS_ReaderEraseBlock, - PhyBlockAddr = %x\n", PhyBlockAddr); */ - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x200; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF2; - bcb->CDB[1] = 0x06; - bcb->CDB[4] = (BYTE)(bn); - bcb->CDB[3] = (BYTE)(bn>>8); - bcb->CDB[2] = (BYTE)(bn>>16); - - result = ENE_SendScsiCmd(us, FDIR_READ, NULL, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_CardInit() - */ -int MS_CardInit(struct us_data *us) -{ - DWORD result = 0; - WORD TmpBlock; - PBYTE PageBuffer0 = NULL, PageBuffer1 = NULL; - MS_LibTypeExtdat extdat; - WORD btBlk1st, btBlk2nd; - DWORD btBlk1stErred; - - printk(KERN_INFO "MS_CardInit start\n"); - - MS_LibFreeAllocatedArea(us); - - PageBuffer0 = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); - PageBuffer1 = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); - if ((PageBuffer0 == NULL) || (PageBuffer1 == NULL)) { - result = MS_NO_MEMORY_ERROR; - goto exit; - } - - btBlk1st = btBlk2nd = MS_LB_NOT_USED; - btBlk1stErred = 0; - - for (TmpBlock = 0; TmpBlock < MS_MAX_INITIAL_ERROR_BLOCKS+2; - TmpBlock++) { - switch (MS_ReaderReadPage(us, TmpBlock, 0, - (DWORD *)PageBuffer0, &extdat)) { - case MS_STATUS_SUCCESS: - break; - case MS_STATUS_INT_ERROR: - break; - case MS_STATUS_ERROR: - default: - continue; - } - - if ((extdat.ovrflg & MS_REG_OVR_BKST) == MS_REG_OVR_BKST_NG) - continue; - - if (((extdat.mngflg & MS_REG_MNG_SYSFLG) == MS_REG_MNG_SYSFLG_USER) || - (be16_to_cpu(((MemStickBootBlockPage0 *)PageBuffer0)->header.wBlockID) != MS_BOOT_BLOCK_ID) || - (be16_to_cpu(((MemStickBootBlockPage0 *)PageBuffer0)->header.wFormatVersion) != MS_BOOT_BLOCK_FORMAT_VERSION) || - (((MemStickBootBlockPage0 *)PageBuffer0)->header.bNumberOfDataEntry != MS_BOOT_BLOCK_DATA_ENTRIES)) - continue; - - if (btBlk1st != MS_LB_NOT_USED) { - btBlk2nd = TmpBlock; - break; - } - - btBlk1st = TmpBlock; - memcpy(PageBuffer1, PageBuffer0, MS_BYTES_PER_PAGE); - if (extdat.status1 & - (MS_REG_ST1_DTER | MS_REG_ST1_EXER | MS_REG_ST1_FGER)) - btBlk1stErred = 1; - } - - if (btBlk1st == MS_LB_NOT_USED) { - result = MS_STATUS_ERROR; - goto exit; - } - - /* write protect */ - if ((extdat.status0 & MS_REG_ST0_WP) == MS_REG_ST0_WP_ON) - MS_LibCtrlSet(us, MS_LIB_CTRL_WRPROTECT); - - result = MS_STATUS_ERROR; - /* 1st Boot Block */ - if (btBlk1stErred == 0) - result = MS_LibProcessBootBlock(us, btBlk1st, PageBuffer1); - /* 1st */ - /* 2nd Boot Block */ - if (result && (btBlk2nd != MS_LB_NOT_USED)) - result = MS_LibProcessBootBlock(us, btBlk2nd, PageBuffer0); - - if (result) { - result = MS_STATUS_ERROR; - goto exit; - } - - for (TmpBlock = 0; TmpBlock < btBlk1st; TmpBlock++) - us->MS_Lib.Phy2LogMap[TmpBlock] = MS_LB_INITIAL_ERROR; - - us->MS_Lib.Phy2LogMap[btBlk1st] = MS_LB_BOOT_BLOCK; - - if (btBlk2nd != MS_LB_NOT_USED) { - for (TmpBlock = btBlk1st + 1; TmpBlock < btBlk2nd; TmpBlock++) - us->MS_Lib.Phy2LogMap[TmpBlock] = MS_LB_INITIAL_ERROR; - us->MS_Lib.Phy2LogMap[btBlk2nd] = MS_LB_BOOT_BLOCK; - } - - result = MS_LibScanLogicalBlockNumber(us, btBlk1st); - if (result) - goto exit; - - for (TmpBlock = MS_PHYSICAL_BLOCKS_PER_SEGMENT; - TmpBlock < us->MS_Lib.NumberOfPhyBlock; - TmpBlock += MS_PHYSICAL_BLOCKS_PER_SEGMENT) { - if (MS_CountFreeBlock(us, TmpBlock) == 0) { - MS_LibCtrlSet(us, MS_LIB_CTRL_WRPROTECT); - break; - } - } - - /* write */ - if (MS_LibAllocWriteBuf(us)) { - result = MS_NO_MEMORY_ERROR; - goto exit; - } - - result = MS_STATUS_SUCCESS; - -exit: - kfree(PageBuffer1); - kfree(PageBuffer0); - - printk(KERN_INFO "MS_CardInit end\n"); - return result; -} - -/* - * MS_LibCheckDisableBlock() - */ -int MS_LibCheckDisableBlock(struct us_data *us, WORD PhyBlock) -{ - PWORD PageBuf = NULL; - DWORD result = MS_STATUS_SUCCESS; - DWORD blk, index = 0; - MS_LibTypeExtdat extdat; - - PageBuf = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); - if (PageBuf == NULL) { - result = MS_NO_MEMORY_ERROR; - goto exit; - } - - MS_ReaderReadPage(us, PhyBlock, 1, (DWORD *)PageBuf, &extdat); - do { - blk = be16_to_cpu(PageBuf[index]); - if (blk == MS_LB_NOT_USED) - break; - if (blk == us->MS_Lib.Log2PhyMap[0]) { - result = MS_ERROR_FLASH_READ; - break; - } - index++; - } while (1); - -exit: - kfree(PageBuf); - return result; -} - -/* - * MS_LibFreeAllocatedArea() - */ -void MS_LibFreeAllocatedArea(struct us_data *us) -{ - MS_LibFreeWriteBuf(us); - MS_LibFreeLogicalMap(us); - - us->MS_Lib.flags = 0; - us->MS_Lib.BytesPerSector = 0; - us->MS_Lib.SectorsPerCylinder = 0; - - us->MS_Lib.cardType = 0; - us->MS_Lib.blockSize = 0; - us->MS_Lib.PagesPerBlock = 0; - - us->MS_Lib.NumberOfPhyBlock = 0; - us->MS_Lib.NumberOfLogBlock = 0; -} - -/* - * MS_LibFreeWriteBuf() - */ -void MS_LibFreeWriteBuf(struct us_data *us) -{ - us->MS_Lib.wrtblk = (WORD)-1; /* set to -1 */ - - /* memset((fdoExt)->MS_Lib.pagemap, 0, - sizeof((fdoExt)->MS_Lib.pagemap)) */ - MS_LibClearPageMap(us); - - if (us->MS_Lib.blkpag) { - kfree((BYTE *)(us->MS_Lib.blkpag)); /* Arnold test ... */ - us->MS_Lib.blkpag = NULL; - } - - if (us->MS_Lib.blkext) { - kfree((BYTE *)(us->MS_Lib.blkext)); /* Arnold test ... */ - us->MS_Lib.blkext = NULL; - } -} - -/* - * MS_LibFreeLogicalMap() - */ -int MS_LibFreeLogicalMap(struct us_data *us) -{ - kfree(us->MS_Lib.Phy2LogMap); - us->MS_Lib.Phy2LogMap = NULL; - - kfree(us->MS_Lib.Log2PhyMap); - us->MS_Lib.Log2PhyMap = NULL; - - return 0; -} - -/* - * MS_LibProcessBootBlock() - */ -int MS_LibProcessBootBlock(struct us_data *us, WORD PhyBlock, BYTE *PageData) -{ - MemStickBootBlockSysEnt *SysEntry; - MemStickBootBlockSysInf *SysInfo; - DWORD i, result; - BYTE PageNumber; - BYTE *PageBuffer; - MS_LibTypeExtdat ExtraData; - - - PageBuffer = kmalloc(MS_BYTES_PER_PAGE, GFP_KERNEL); - if (PageBuffer == NULL) - return (DWORD)-1; - - result = (DWORD)-1; - - SysInfo = &(((MemStickBootBlockPage0 *)PageData)->sysinf); - - if ((SysInfo->bMsClass != MS_SYSINF_MSCLASS_TYPE_1) || - (be16_to_cpu(SysInfo->wPageSize) != MS_SYSINF_PAGE_SIZE) || - ((SysInfo->bSecuritySupport & MS_SYSINF_SECURITY) == MS_SYSINF_SECURITY_SUPPORT) || - (SysInfo->bReserved1 != MS_SYSINF_RESERVED1) || - (SysInfo->bReserved2 != MS_SYSINF_RESERVED2) || - (SysInfo->bFormatType != MS_SYSINF_FORMAT_FAT) || - (SysInfo->bUsage != MS_SYSINF_USAGE_GENERAL)) - goto exit; - - switch (us->MS_Lib.cardType = SysInfo->bCardType) { - case MS_SYSINF_CARDTYPE_RDONLY: - MS_LibCtrlSet(us, MS_LIB_CTRL_RDONLY); - break; - case MS_SYSINF_CARDTYPE_RDWR: - MS_LibCtrlReset(us, MS_LIB_CTRL_RDONLY); - break; - case MS_SYSINF_CARDTYPE_HYBRID: - default: - goto exit; - } - - us->MS_Lib.blockSize = be16_to_cpu(SysInfo->wBlockSize); - us->MS_Lib.NumberOfPhyBlock = be16_to_cpu(SysInfo->wBlockNumber); - us->MS_Lib.NumberOfLogBlock = be16_to_cpu(SysInfo->wTotalBlockNumber) - -2; - us->MS_Lib.PagesPerBlock = us->MS_Lib.blockSize * SIZE_OF_KIRO / - MS_BYTES_PER_PAGE; - us->MS_Lib.NumberOfSegment = us->MS_Lib.NumberOfPhyBlock / - MS_PHYSICAL_BLOCKS_PER_SEGMENT; - us->MS_Model = be16_to_cpu(SysInfo->wMemorySize); - - /*Allocate to all number of logicalblock and physicalblock */ - if (MS_LibAllocLogicalMap(us)) - goto exit; - - /* Mark the book block */ - MS_LibSetBootBlockMark(us, PhyBlock); - - SysEntry = &(((MemStickBootBlockPage0 *)PageData)->sysent); - - for (i = 0; i < MS_NUMBER_OF_SYSTEM_ENTRY; i++) { - DWORD EntryOffset, EntrySize; - - EntryOffset = be32_to_cpu(SysEntry->entry[i].dwStart); - - if (EntryOffset == 0xffffff) - continue; - EntrySize = be32_to_cpu(SysEntry->entry[i].dwSize); - - if (EntrySize == 0) - continue; - - if (EntryOffset + MS_BYTES_PER_PAGE + EntrySize > - us->MS_Lib.blockSize * (DWORD)SIZE_OF_KIRO) - continue; - - if (i == 0) { - BYTE PrevPageNumber = 0; - WORD phyblk; - - if (SysEntry->entry[i].bType != - MS_SYSENT_TYPE_INVALID_BLOCK) - goto exit; - - while (EntrySize > 0) { - - PageNumber = (BYTE)(EntryOffset / - MS_BYTES_PER_PAGE + 1); - if (PageNumber != PrevPageNumber) { - switch (MS_ReaderReadPage(us, PhyBlock, - PageNumber, (DWORD *)PageBuffer, - &ExtraData)) { - case MS_STATUS_SUCCESS: - break; - case MS_STATUS_WRITE_PROTECT: - case MS_ERROR_FLASH_READ: - case MS_STATUS_ERROR: - default: - goto exit; - } - - PrevPageNumber = PageNumber; - } - - phyblk = be16_to_cpu(*(WORD *)(PageBuffer + - (EntryOffset % MS_BYTES_PER_PAGE))); - if (phyblk < 0x0fff) - MS_LibSetInitialErrorBlock(us, phyblk); - - EntryOffset += 2; - EntrySize -= 2; - } - } else if (i == 1) { /* CIS/IDI */ - MemStickBootBlockIDI *idi; - - if (SysEntry->entry[i].bType != MS_SYSENT_TYPE_CIS_IDI) - goto exit; - - switch (MS_ReaderReadPage(us, PhyBlock, - (BYTE)(EntryOffset / MS_BYTES_PER_PAGE + 1), - (DWORD *)PageBuffer, &ExtraData)) { - case MS_STATUS_SUCCESS: - break; - case MS_STATUS_WRITE_PROTECT: - case MS_ERROR_FLASH_READ: - case MS_STATUS_ERROR: - default: - goto exit; - } - - idi = &((MemStickBootBlockCIS_IDI *)(PageBuffer + - (EntryOffset % MS_BYTES_PER_PAGE)))->idi.idi; - if (le16_to_cpu(idi->wIDIgeneralConfiguration) != - MS_IDI_GENERAL_CONF) - goto exit; - - us->MS_Lib.BytesPerSector = - le16_to_cpu(idi->wIDIbytesPerSector); - if (us->MS_Lib.BytesPerSector != MS_BYTES_PER_PAGE) - goto exit; - } - } /* End for .. */ - - result = 0; - -exit: - if (result) - MS_LibFreeLogicalMap(us); - - kfree(PageBuffer); - - result = 0; - return result; -} - -/* - * MS_LibAllocLogicalMap() - */ -int MS_LibAllocLogicalMap(struct us_data *us) -{ - DWORD i; - - - us->MS_Lib.Phy2LogMap = kmalloc(us->MS_Lib.NumberOfPhyBlock * - sizeof(WORD), GFP_KERNEL); - us->MS_Lib.Log2PhyMap = kmalloc(us->MS_Lib.NumberOfLogBlock * - sizeof(WORD), GFP_KERNEL); - - if ((us->MS_Lib.Phy2LogMap == NULL) || - (us->MS_Lib.Log2PhyMap == NULL)) { - MS_LibFreeLogicalMap(us); - return (DWORD)-1; - } - - for (i = 0; i < us->MS_Lib.NumberOfPhyBlock; i++) - us->MS_Lib.Phy2LogMap[i] = MS_LB_NOT_USED; - - for (i = 0; i < us->MS_Lib.NumberOfLogBlock; i++) - us->MS_Lib.Log2PhyMap[i] = MS_LB_NOT_USED; - - return 0; -} - -/* - * MS_LibSetBootBlockMark() - */ -int MS_LibSetBootBlockMark(struct us_data *us, WORD phyblk) -{ - return MS_LibSetLogicalBlockMark(us, phyblk, MS_LB_BOOT_BLOCK); -} - -/* - * MS_LibSetLogicalBlockMark() - */ -int MS_LibSetLogicalBlockMark(struct us_data *us, WORD phyblk, WORD mark) -{ - if (phyblk >= us->MS_Lib.NumberOfPhyBlock) - return (DWORD)-1; - - us->MS_Lib.Phy2LogMap[phyblk] = mark; - - return 0; -} - -/* - * MS_LibSetInitialErrorBlock() - */ -int MS_LibSetInitialErrorBlock(struct us_data *us, WORD phyblk) -{ - return MS_LibSetLogicalBlockMark(us, phyblk, MS_LB_INITIAL_ERROR); -} - -/* - * MS_LibScanLogicalBlockNumber() - */ -int MS_LibScanLogicalBlockNumber(struct us_data *us, WORD btBlk1st) -{ - WORD PhyBlock, newblk, i; - WORD LogStart, LogEnde; - MS_LibTypeExtdat extdat; - BYTE buf[0x200]; - DWORD count = 0, index = 0; - - for (PhyBlock = 0; PhyBlock < us->MS_Lib.NumberOfPhyBlock;) { - MS_LibPhy2LogRange(PhyBlock, &LogStart, &LogEnde); - - for (i = 0; i < MS_PHYSICAL_BLOCKS_PER_SEGMENT; - i++, PhyBlock++) { - switch (MS_LibConv2Logical(us, PhyBlock)) { - case MS_STATUS_ERROR: - continue; - default: - break; - } - - if (count == PhyBlock) { - MS_LibReadExtraBlock(us, PhyBlock, - 0, 0x80, &buf); - count += 0x80; - } - index = (PhyBlock % 0x80) * 4; - - extdat.ovrflg = buf[index]; - extdat.mngflg = buf[index+1]; - extdat.logadr = MemStickLogAddr(buf[index+2], - buf[index+3]); - - if ((extdat.ovrflg & MS_REG_OVR_BKST) != - MS_REG_OVR_BKST_OK) { - MS_LibSetAcquiredErrorBlock(us, PhyBlock); - continue; - } - - if ((extdat.mngflg & MS_REG_MNG_ATFLG) == - MS_REG_MNG_ATFLG_ATTBL) { - MS_LibErasePhyBlock(us, PhyBlock); - continue; - } - - if (extdat.logadr != MS_LB_NOT_USED) { - if ((extdat.logadr < LogStart) || - (LogEnde <= extdat.logadr)) { - MS_LibErasePhyBlock(us, PhyBlock); - continue; - } - - newblk = MS_LibConv2Physical(us, extdat.logadr); - - if (newblk != MS_LB_NOT_USED) { - if (extdat.logadr == 0) { - MS_LibSetLogicalPair(us, - extdat.logadr, - PhyBlock); - if (MS_LibCheckDisableBlock(us, - btBlk1st)) { - MS_LibSetLogicalPair(us, - extdat.logadr, newblk); - continue; - } - } - - MS_LibReadExtra(us, newblk, 0, &extdat); - if ((extdat.ovrflg & MS_REG_OVR_UDST) == - MS_REG_OVR_UDST_UPDATING) { - MS_LibErasePhyBlock(us, - PhyBlock); - continue; - } else { - MS_LibErasePhyBlock(us, newblk); - } - } - - MS_LibSetLogicalPair(us, extdat.logadr, - PhyBlock); - } - } - } /* End for ... */ - - return MS_STATUS_SUCCESS; -} - -/* - * MS_LibAllocWriteBuf() - */ -int MS_LibAllocWriteBuf(struct us_data *us) -{ - us->MS_Lib.wrtblk = (WORD)-1; - - us->MS_Lib.blkpag = kmalloc(us->MS_Lib.PagesPerBlock * - us->MS_Lib.BytesPerSector, GFP_KERNEL); - us->MS_Lib.blkext = kmalloc(us->MS_Lib.PagesPerBlock * - sizeof(MS_LibTypeExtdat), GFP_KERNEL); - - if ((us->MS_Lib.blkpag == NULL) || (us->MS_Lib.blkext == NULL)) { - MS_LibFreeWriteBuf(us); - return (DWORD)-1; - } - - MS_LibClearWriteBuf(us); - - return 0; -} - -/* - * MS_LibClearWriteBuf() - */ -void MS_LibClearWriteBuf(struct us_data *us) -{ - int i; - - us->MS_Lib.wrtblk = (WORD)-1; - MS_LibClearPageMap(us); - - if (us->MS_Lib.blkpag) - memset(us->MS_Lib.blkpag, 0xff, - us->MS_Lib.PagesPerBlock * us->MS_Lib.BytesPerSector); - - if (us->MS_Lib.blkext) { - for (i = 0; i < us->MS_Lib.PagesPerBlock; i++) { - us->MS_Lib.blkext[i].status1 = MS_REG_ST1_DEFAULT; - us->MS_Lib.blkext[i].ovrflg = MS_REG_OVR_DEFAULT; - us->MS_Lib.blkext[i].mngflg = MS_REG_MNG_DEFAULT; - us->MS_Lib.blkext[i].logadr = MS_LB_NOT_USED; - } - } -} - -/* - * MS_LibPhy2LogRange() - */ -void MS_LibPhy2LogRange(WORD PhyBlock, WORD *LogStart, WORD *LogEnde) -{ - PhyBlock /= MS_PHYSICAL_BLOCKS_PER_SEGMENT; - - if (PhyBlock) { - *LogStart = MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT + - (PhyBlock - 1) * MS_LOGICAL_BLOCKS_PER_SEGMENT;/*496*/ - *LogEnde = *LogStart + MS_LOGICAL_BLOCKS_PER_SEGMENT;/*496*/ - } else { - *LogStart = 0; - *LogEnde = MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT;/*494*/ - } -} - -/* - * MS_LibReadExtraBlock() - */ -int MS_LibReadExtraBlock(struct us_data *us, DWORD PhyBlock, - BYTE PageNum, BYTE blen, void *buf) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - - /* printk("MS_LibReadExtraBlock --- PhyBlock = %x, - PageNum = %x, blen = %x\n", PhyBlock, PageNum, blen); */ - - /* Read Extra Data */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x4 * blen; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x03; - bcb->CDB[5] = (BYTE)(PageNum); - bcb->CDB[4] = (BYTE)(PhyBlock); - bcb->CDB[3] = (BYTE)(PhyBlock>>8); - bcb->CDB[2] = (BYTE)(PhyBlock>>16); - bcb->CDB[6] = blen; - - result = ENE_SendScsiCmd(us, FDIR_READ, buf, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_LibReadExtra() - */ -int MS_LibReadExtra(struct us_data *us, DWORD PhyBlock, - BYTE PageNum, MS_LibTypeExtdat *ExtraDat) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - BYTE ExtBuf[4]; - - /* printk("MS_LibReadExtra --- PhyBlock = %x, PageNum = %x\n" - , PhyBlock, PageNum); */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x4; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x03; - bcb->CDB[5] = (BYTE)(PageNum); - bcb->CDB[4] = (BYTE)(PhyBlock); - bcb->CDB[3] = (BYTE)(PhyBlock>>8); - bcb->CDB[2] = (BYTE)(PhyBlock>>16); - bcb->CDB[6] = 0x01; - - result = ENE_SendScsiCmd(us, FDIR_READ, &ExtBuf, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - ExtraDat->reserved = 0; - ExtraDat->intr = 0x80; /* Not yet, waiting for fireware support */ - ExtraDat->status0 = 0x10; /* Not yet, waiting for fireware support */ - ExtraDat->status1 = 0x00; /* Not yet, waiting for fireware support */ - ExtraDat->ovrflg = ExtBuf[0]; - ExtraDat->mngflg = ExtBuf[1]; - ExtraDat->logadr = MemStickLogAddr(ExtBuf[2], ExtBuf[3]); - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_LibSetAcquiredErrorBlock() - */ -int MS_LibSetAcquiredErrorBlock(struct us_data *us, WORD phyblk) -{ - WORD log; - - if (phyblk >= us->MS_Lib.NumberOfPhyBlock) - return (DWORD)-1; - - log = us->MS_Lib.Phy2LogMap[phyblk]; - - if (log < us->MS_Lib.NumberOfLogBlock) - us->MS_Lib.Log2PhyMap[log] = MS_LB_NOT_USED; - - if (us->MS_Lib.Phy2LogMap[phyblk] != MS_LB_INITIAL_ERROR) - us->MS_Lib.Phy2LogMap[phyblk] = MS_LB_ACQUIRED_ERROR; - - return 0; -} - -/* - * MS_LibErasePhyBlock() - */ -int MS_LibErasePhyBlock(struct us_data *us, WORD phyblk) -{ - WORD log; - - if (phyblk >= us->MS_Lib.NumberOfPhyBlock) - return MS_STATUS_ERROR; - - log = us->MS_Lib.Phy2LogMap[phyblk]; - - if (log < us->MS_Lib.NumberOfLogBlock) - us->MS_Lib.Log2PhyMap[log] = MS_LB_NOT_USED; - - us->MS_Lib.Phy2LogMap[phyblk] = MS_LB_NOT_USED; - - if (MS_LibIsWritable(us)) { - switch (MS_ReaderEraseBlock(us, phyblk)) { - case MS_STATUS_SUCCESS: - us->MS_Lib.Phy2LogMap[phyblk] = MS_LB_NOT_USED_ERASED; - return MS_STATUS_SUCCESS; - case MS_ERROR_FLASH_ERASE: - case MS_STATUS_INT_ERROR: - MS_LibErrorPhyBlock(us, phyblk); - return MS_ERROR_FLASH_ERASE; - case MS_STATUS_ERROR: - default: - MS_LibCtrlSet(us, MS_LIB_CTRL_RDONLY); - MS_LibSetAcquiredErrorBlock(us, phyblk); - return MS_STATUS_ERROR; - } - } - - MS_LibSetAcquiredErrorBlock(us, phyblk); - - return MS_STATUS_SUCCESS; -} - -/* - * MS_LibErrorPhyBlock() - */ -int MS_LibErrorPhyBlock(struct us_data *us, WORD phyblk) -{ - if (phyblk >= us->MS_Lib.NumberOfPhyBlock) - return MS_STATUS_ERROR; - - MS_LibSetAcquiredErrorBlock(us, phyblk); - - if (MS_LibIsWritable(us)) - return MS_LibOverwriteExtra(us, phyblk, 0, - (BYTE)(~MS_REG_OVR_BKST & BYTE_MASK)); - - - return MS_STATUS_SUCCESS; -} - -/* - * MS_LibOverwriteExtra() - */ -int MS_LibOverwriteExtra(struct us_data *us, DWORD PhyBlockAddr, - BYTE PageNum, BYTE OverwriteFlag) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result; - - /* printk("MS --- MS_LibOverwriteExtra, \ - PhyBlockAddr = %x, PageNum = %x\n", PhyBlockAddr, PageNum); */ - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x4; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF2; - bcb->CDB[1] = 0x05; - bcb->CDB[5] = (BYTE)(PageNum); - bcb->CDB[4] = (BYTE)(PhyBlockAddr); - bcb->CDB[3] = (BYTE)(PhyBlockAddr>>8); - bcb->CDB[2] = (BYTE)(PhyBlockAddr>>16); - bcb->CDB[6] = OverwriteFlag; - bcb->CDB[7] = 0xFF; - bcb->CDB[8] = 0xFF; - bcb->CDB[9] = 0xFF; - - result = ENE_SendScsiCmd(us, FDIR_READ, NULL, 0); - if (result != USB_STOR_XFER_GOOD) - return USB_STOR_TRANSPORT_ERROR; - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_LibForceSetLogicalPair() - */ -int MS_LibForceSetLogicalPair(struct us_data *us, WORD logblk, WORD phyblk) -{ - if (logblk == MS_LB_NOT_USED) - return 0; - - if ((logblk >= us->MS_Lib.NumberOfLogBlock) || - (phyblk >= us->MS_Lib.NumberOfPhyBlock)) - return (DWORD)-1; - - us->MS_Lib.Phy2LogMap[phyblk] = logblk; - us->MS_Lib.Log2PhyMap[logblk] = phyblk; - - return 0; -} - -/* - * MS_LibSetLogicalPair() - */ -int MS_LibSetLogicalPair(struct us_data *us, WORD logblk, WORD phyblk) -{ - if ((logblk >= us->MS_Lib.NumberOfLogBlock) || - (phyblk >= us->MS_Lib.NumberOfPhyBlock)) - return (DWORD)-1; - - us->MS_Lib.Phy2LogMap[phyblk] = logblk; - us->MS_Lib.Log2PhyMap[logblk] = phyblk; - - return 0; -} - -/* - * MS_CountFreeBlock() - */ -int MS_CountFreeBlock(struct us_data *us, WORD PhyBlock) -{ - DWORD Ende, Count; - - Ende = PhyBlock + MS_PHYSICAL_BLOCKS_PER_SEGMENT; - for (Count = 0; PhyBlock < Ende; PhyBlock++) { - switch (us->MS_Lib.Phy2LogMap[PhyBlock]) { - case MS_LB_NOT_USED: - case MS_LB_NOT_USED_ERASED: - Count++; - default: - break; - } - } - - return Count; -} - -/* - * MS_LibSearchBlockFromPhysical() - */ -int MS_LibSearchBlockFromPhysical(struct us_data *us, WORD phyblk) -{ - WORD Newblk; - WORD blk; - MS_LibTypeExtdat extdat; - - if (phyblk >= us->MS_Lib.NumberOfPhyBlock) - return MS_LB_ERROR; - - for (blk = phyblk + 1; blk != phyblk; blk++) { - if ((blk & MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK) == 0) - blk -= MS_PHYSICAL_BLOCKS_PER_SEGMENT; - - Newblk = us->MS_Lib.Phy2LogMap[blk]; - if (us->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED_ERASED) - return blk; - else if (us->MS_Lib.Phy2LogMap[blk] == MS_LB_NOT_USED) { - switch (MS_LibReadExtra(us, blk, 0, &extdat)) { - case MS_STATUS_SUCCESS: - case MS_STATUS_SUCCESS_WITH_ECC: - break; - case MS_NOCARD_ERROR: - return MS_NOCARD_ERROR; - case MS_STATUS_INT_ERROR: - return MS_LB_ERROR; - case MS_ERROR_FLASH_READ: - default: - MS_LibSetAcquiredErrorBlock(us, blk); - /* MS_LibErrorPhyBlock(fdoExt, blk); */ - continue; - } /* End switch */ - - if ((extdat.ovrflg & MS_REG_OVR_BKST) != - MS_REG_OVR_BKST_OK) { - MS_LibSetAcquiredErrorBlock(us, blk); - continue; - } - - switch (MS_LibErasePhyBlock(us, blk)) { - case MS_STATUS_SUCCESS: - return blk; - case MS_STATUS_ERROR: - return MS_LB_ERROR; - case MS_ERROR_FLASH_ERASE: - default: - MS_LibErrorPhyBlock(us, blk); - break; - } - } - } /* End for */ - - return MS_LB_ERROR; -} - -/* - * MS_LibSearchBlockFromLogical() - */ -int MS_LibSearchBlockFromLogical(struct us_data *us, WORD logblk) -{ - WORD phyblk; - - phyblk = MS_LibConv2Physical(us, logblk); - if (phyblk >= MS_LB_ERROR) { - if (logblk >= us->MS_Lib.NumberOfLogBlock) - return MS_LB_ERROR; - - phyblk = (logblk + MS_NUMBER_OF_BOOT_BLOCK) / - MS_LOGICAL_BLOCKS_PER_SEGMENT; - phyblk *= MS_PHYSICAL_BLOCKS_PER_SEGMENT; - phyblk += MS_PHYSICAL_BLOCKS_PER_SEGMENT - 1; - } - - return MS_LibSearchBlockFromPhysical(us, phyblk); -} diff --git a/drivers/staging/keucr/ms.h b/drivers/staging/keucr/ms.h deleted file mode 100644 index a3da4be..0000000 --- a/drivers/staging/keucr/ms.h +++ /dev/null @@ -1,401 +0,0 @@ -#ifndef MS_INCD -#define MS_INCD - -#include -#include "common.h" - -/* MemoryStick Register */ -/* Status Register 0 */ -#define MS_REG_ST0_MB 0x80 /* media busy */ -#define MS_REG_ST0_FB0 0x40 /* flush busy 0 */ -#define MS_REG_ST0_BE 0x20 /* buffer empty */ -#define MS_REG_ST0_BF 0x10 /* buffer full */ -#define MS_REG_ST0_SL 0x02 /* sleep */ -#define MS_REG_ST0_WP 0x01 /* write protected */ -#define MS_REG_ST0_WP_ON MS_REG_ST0_WP -#define MS_REG_ST0_WP_OFF 0x00 - -/* Status Register 1 */ -#define MS_REG_ST1_MB 0x80 /* media busy */ -#define MS_REG_ST1_FB1 0x40 /* flush busy 1 */ -#define MS_REG_ST1_DTER 0x20 /* error on data(corrected) */ -#define MS_REG_ST1_UCDT 0x10 /* unable to correct data */ -#define MS_REG_ST1_EXER 0x08 /* error on extra(corrected) */ -#define MS_REG_ST1_UCEX 0x04 /* unable to correct extra */ -#define MS_REG_ST1_FGER 0x02 /* error on overwrite flag(corrected) */ -#define MS_REG_ST1_UCFG 0x01 /* unable to correct overwrite flag */ -#define MS_REG_ST1_DEFAULT (MS_REG_ST1_MB | MS_REG_ST1_FB1 | \ - MS_REG_ST1_DTER | MS_REG_ST1_UCDT | \ - MS_REG_ST1_EXER | MS_REG_ST1_UCEX | \ - MS_REG_ST1_FGER | MS_REG_ST1_UCFG) - -/* System Parameter */ -#define MS_REG_SYSPAR_BAMD 0x80 /* block address mode */ -#define MS_REG_SYSPAR_BAND_LINEAR MS_REG_SYSPAR_BAMD /* linear mode */ -#define MS_REG_SYSPAR_BAND_CHIP 0x00 /* chip mode */ -#define MS_REG_SYSPAR_ATEN 0x40 /* attribute ROM enable */ -#define MS_REG_SYSPAR_ATEN_ENABLE MS_REG_SYSPAR_ATEN /* enable */ -#define MS_REG_SYSPAR_ATEN_DISABLE 0x00 /* disable */ -#define MS_REG_SYSPAR_RESERVED 0x2f - -/* Command Parameter */ -#define MS_REG_CMDPAR_CP2 0x80 -#define MS_REG_CMDPAR_CP1 0x40 -#define MS_REG_CMDPAR_CP0 0x20 -#define MS_REG_CMDPAR_BLOCK_ACCESS 0 -#define MS_REG_CMDPAR_PAGE_ACCESS MS_REG_CMDPAR_CP0 -#define MS_REG_CMDPAR_EXTRA_DATA MS_REG_CMDPAR_CP1 -#define MS_REG_CMDPAR_OVERWRITE MS_REG_CMDPAR_CP2 -#define MS_REG_CMDPAR_RESERVED 0x1f - -/* Overwrite Area */ -#define MS_REG_OVR_BKST 0x80 /* block status */ -#define MS_REG_OVR_BKST_OK MS_REG_OVR_BKST /* OK */ -#define MS_REG_OVR_BKST_NG 0x00 /* NG */ -#define MS_REG_OVR_PGST0 0x40 /* page status */ -#define MS_REG_OVR_PGST1 0x20 -#define MS_REG_OVR_PGST_MASK (MS_REG_OVR_PGST0 | MS_REG_OVR_PGST1) -#define MS_REG_OVR_PGST_OK (MS_REG_OVR_PGST0 | MS_REG_OVR_PGST1) /* OK */ -#define MS_REG_OVR_PGST_NG MS_REG_OVR_PGST1 /* NG */ -#define MS_REG_OVR_PGST_DATA_ERROR 0x00 /* data error */ -#define MS_REG_OVR_UDST 0x10 /* update status */ -#define MS_REG_OVR_UDST_UPDATING 0x00 /* updating */ -#define MS_REG_OVR_UDST_NO_UPDATE MS_REG_OVR_UDST -#define MS_REG_OVR_RESERVED 0x08 -#define MS_REG_OVR_DEFAULT (MS_REG_OVR_BKST_OK | \ - MS_REG_OVR_PGST_OK | \ - MS_REG_OVR_UDST_NO_UPDATE | \ - MS_REG_OVR_RESERVED) -/* Management Flag */ -#define MS_REG_MNG_SCMS0 0x20 /* serial copy management system */ -#define MS_REG_MNG_SCMS1 0x10 -#define MS_REG_MNG_SCMS_MASK (MS_REG_MNG_SCMS0 | MS_REG_MNG_SCMS1) -#define MS_REG_MNG_SCMS_COPY_OK (MS_REG_MNG_SCMS0 | MS_REG_MNG_SCMS1) -#define MS_REG_MNG_SCMS_ONE_COPY MS_REG_MNG_SCMS1 -#define MS_REG_MNG_SCMS_NO_COPY 0x00 -#define MS_REG_MNG_ATFLG 0x08 /* address transfer table flag */ -#define MS_REG_MNG_ATFLG_OTHER MS_REG_MNG_ATFLG /* other */ -#define MS_REG_MNG_ATFLG_ATTBL 0x00 /* address transfer table */ -#define MS_REG_MNG_SYSFLG 0x04 /* system flag */ -#define MS_REG_MNG_SYSFLG_USER MS_REG_MNG_SYSFLG /* user block */ -#define MS_REG_MNG_SYSFLG_BOOT 0x00 /* system block */ -#define MS_REG_MNG_RESERVED 0xc3 -#define MS_REG_MNG_DEFAULT (MS_REG_MNG_SCMS_COPY_OK | \ - MS_REG_MNG_ATFLG_OTHER | \ - MS_REG_MNG_SYSFLG_USER | \ - MS_REG_MNG_RESERVED) - -/* Error codes */ -#define MS_STATUS_SUCCESS 0x0000 -#define MS_ERROR_OUT_OF_SPACE 0x0103 -#define MS_STATUS_WRITE_PROTECT 0x0106 -#define MS_ERROR_READ_DATA 0x8002 -#define MS_ERROR_FLASH_READ 0x8003 -#define MS_ERROR_FLASH_WRITE 0x8004 -#define MS_ERROR_FLASH_ERASE 0x8005 -#define MS_ERROR_FLASH_COPY 0x8006 - -#define MS_STATUS_ERROR 0xfffe -#define MS_FIFO_ERROR 0xfffd -#define MS_UNDEFINED_ERROR 0xfffc -#define MS_KETIMEOUT_ERROR 0xfffb -#define MS_STATUS_INT_ERROR 0xfffa -#define MS_NO_MEMORY_ERROR 0xfff9 -#define MS_NOCARD_ERROR 0xfff8 -#define MS_LB_NOT_USED 0xffff -#define MS_LB_ERROR 0xfff0 -#define MS_LB_BOOT_BLOCK 0xfff1 -#define MS_LB_INITIAL_ERROR 0xfff2 -#define MS_STATUS_SUCCESS_WITH_ECC 0xfff3 -#define MS_LB_ACQUIRED_ERROR 0xfff4 -#define MS_LB_NOT_USED_ERASED 0xfff5 - -#define MS_LibConv2Physical(pdx, LogBlock) \ - (((LogBlock) >= (pdx)->MS_Lib.NumberOfLogBlock) ? \ - MS_STATUS_ERROR : (pdx)->MS_Lib.Log2PhyMap[LogBlock]) -#define MS_LibConv2Logical(pdx, PhyBlock) \ - (((PhyBlock) >= (pdx)->MS_Lib.NumberOfPhyBlock) ? \ - MS_STATUS_ERROR : (pdx)->MS_Lib.Phy2LogMap[PhyBlock]) - /*dphy->log table */ - -#define MS_LIB_CTRL_RDONLY 0 -#define MS_LIB_CTRL_WRPROTECT 1 -#define MS_LibCtrlCheck(pdx, Flag) ((pdx)->MS_Lib.flags & (1 << (Flag))) - -#define MS_LibCtrlSet(pdx, Flag) ((pdx)->MS_Lib.flags |= (1 << (Flag))) -#define MS_LibCtrlReset(pdx, Flag) ((pdx)->MS_Lib.flags &= ~(1 << (Flag))) -#define MS_LibIsWritable(pdx) \ - ((MS_LibCtrlCheck((pdx), MS_LIB_CTRL_RDONLY) == 0) && \ - (MS_LibCtrlCheck(pdx, MS_LIB_CTRL_WRPROTECT) == 0)) - -#define MS_MAX_PAGES_PER_BLOCK 32 -#define MS_LIB_BITS_PER_BYTE 8 - -#define MS_LibPageMapIdx(n) ((n) / MS_LIB_BITS_PER_BYTE) -#define MS_LibPageMapBit(n) (1 << ((n) % MS_LIB_BITS_PER_BYTE)) -#define MS_LibCheckPageMapBit(pdx, n) \ - ((pdx)->MS_Lib.pagemap[MS_LibPageMapIdx(n)] & MS_LibPageMapBit(n)) -#define MS_LibSetPageMapBit(pdx, n) \ - ((pdx)->MS_Lib.pagemap[MS_LibPageMapIdx(n)] |= MS_LibPageMapBit(n)) -#define MS_LibResetPageMapBit(pdx, n) \ - ((pdx)->MS_Lib.pagemap[MS_LibPageMapIdx(n)] &= ~MS_LibPageMapBit(n)) -#define MS_LibClearPageMap(pdx) \ - memset((pdx)->MS_Lib.pagemap, 0, sizeof((pdx)->MS_Lib.pagemap)) - - -#define MemStickLogAddr(logadr1, logadr0) \ - ((((WORD)(logadr1)) << 8) | (logadr0)) - -#define MS_BYTES_PER_PAGE 512 - -#define MS_MAX_INITIAL_ERROR_BLOCKS 10 -#define MS_NUMBER_OF_PAGES_FOR_BOOT_BLOCK 3 -#define MS_NUMBER_OF_PAGES_FOR_LPCTBL 2 - -#define MS_NUMBER_OF_BOOT_BLOCK 2 -#define MS_NUMBER_OF_SYSTEM_BLOCK 4 -#define MS_LOGICAL_BLOCKS_PER_SEGMENT 496 -#define MS_LOGICAL_BLOCKS_IN_1ST_SEGMENT 494 -#define MS_PHYSICAL_BLOCKS_PER_SEGMENT 0x200 /* 512 */ -#define MS_PHYSICAL_BLOCKS_PER_SEGMENT_MASK 0x1ff - -#define MS_SECTOR_SIZE 512 -#define MBR_SIGNATURE 0xAA55 -#define PBR_SIGNATURE 0xAA55 - -#define PARTITION_FAT_12 1 -#define PARTITION_FAT_16 2 - -#define MS_BOOT_BLOCK_ID 0x0001 -#define MS_BOOT_BLOCK_FORMAT_VERSION 0x0100 -#define MS_BOOT_BLOCK_DATA_ENTRIES 2 - -#define MS_SYSINF_MSCLASS_TYPE_1 1 -#define MS_SYSINF_CARDTYPE_RDONLY 1 -#define MS_SYSINF_CARDTYPE_RDWR 2 -#define MS_SYSINF_CARDTYPE_HYBRID 3 -#define MS_SYSINF_SECURITY 0x01 -#define MS_SYSINF_SECURITY_NO_SUPPORT MS_SYSINF_SECURITY -#define MS_SYSINF_SECURITY_SUPPORT 0 -#define MS_SYSINF_FORMAT_MAT 0 /* ? */ -#define MS_SYSINF_FORMAT_FAT 1 -#define MS_SYSINF_USAGE_GENERAL 0 -#define MS_SYSINF_PAGE_SIZE MS_BYTES_PER_PAGE /* fixed */ -#define MS_SYSINF_RESERVED1 1 -#define MS_SYSINF_RESERVED2 1 - -#define MS_SYSENT_TYPE_INVALID_BLOCK 0x01 -#define MS_SYSENT_TYPE_CIS_IDI 0x0a /* CIS/IDI */ - -#define SIZE_OF_KIRO 1024 - -/* BOOT BLOCK */ -#define MS_NUMBER_OF_SYSTEM_ENTRY 4 - -/* - * MemStickRegisters - */ -/* Status registers (16 bytes) */ -typedef struct { - BYTE Reserved0; /* 00 */ - BYTE INTRegister; /* 01 */ - BYTE StatusRegister0; /* 02 */ - BYTE StatusRegister1; /* 03 */ - BYTE Reserved1[12]; /* 04-0F */ -} MemStickStatusRegisters; - -/* Parameter registers (6 bytes) */ -typedef struct { - BYTE SystemParameter; /* 10 */ - BYTE BlockAddress2; /* 11 */ - BYTE BlockAddress1; /* 12 */ - BYTE BlockAddress0; /* 13 */ - BYTE CMDParameter; /* 14 */ - BYTE PageAddress; /* 15 */ -} MemStickParameterRegisters; - -/* Extra registers (9 bytes) */ -typedef struct { - BYTE OverwriteFlag; /* 16 */ - BYTE ManagementFlag; /* 17 */ - BYTE LogicalAddress1; /* 18 */ - BYTE LogicalAddress0; /* 19 */ - BYTE ReservedArea[5]; /* 1A-1E */ -} MemStickExtraDataRegisters; - -/* All registers in Memory Stick (32 bytes, includes 1 byte padding) */ -typedef struct { - MemStickStatusRegisters status; - MemStickParameterRegisters param; - MemStickExtraDataRegisters extra; - BYTE padding; -} MemStickRegisters, *PMemStickRegisters; - -/* - * MemStickBootBlockPage0 - */ -typedef struct { - WORD wBlockID; - WORD wFormatVersion; - BYTE bReserved1[184]; - BYTE bNumberOfDataEntry; - BYTE bReserved2[179]; -} MemStickBootBlockHeader; - -typedef struct { - DWORD dwStart; - DWORD dwSize; - BYTE bType; - BYTE bReserved[3]; -} MemStickBootBlockSysEntRec; - -typedef struct { - MemStickBootBlockSysEntRec entry[MS_NUMBER_OF_SYSTEM_ENTRY]; -} MemStickBootBlockSysEnt; - -typedef struct { - BYTE bMsClass; /* must be 1 */ - BYTE bCardType; /* see below */ - WORD wBlockSize; /* n KB */ - WORD wBlockNumber; /* number of physical block */ - WORD wTotalBlockNumber; /* number of logical block */ - WORD wPageSize; /* must be 0x200 */ - BYTE bExtraSize; /* 0x10 */ - BYTE bSecuritySupport; - BYTE bAssemblyDate[8]; - BYTE bFactoryArea[4]; - BYTE bAssemblyMakerCode; - BYTE bAssemblyMachineCode[3]; - WORD wMemoryMakerCode; - WORD wMemoryDeviceCode; - WORD wMemorySize; - BYTE bReserved1; - BYTE bReserved2; - BYTE bVCC; - BYTE bVPP; - WORD wControllerChipNumber; - WORD wControllerFunction; /* New MS */ - BYTE bReserved3[9]; /* New MS */ - BYTE bParallelSupport; /* New MS */ - WORD wFormatValue; /* New MS */ - BYTE bFormatType; - BYTE bUsage; - BYTE bDeviceType; - BYTE bReserved4[22]; - BYTE bFUValue3; - BYTE bFUValue4; - BYTE bReserved5[15]; -} MemStickBootBlockSysInf; - -typedef struct { - MemStickBootBlockHeader header; - MemStickBootBlockSysEnt sysent; - MemStickBootBlockSysInf sysinf; -} MemStickBootBlockPage0; - -/* - * MemStickBootBlockCIS_IDI - */ -typedef struct { - BYTE bCistplDEVICE[6]; /* 0 */ - BYTE bCistplDEVICE0C[6]; /* 6 */ - BYTE bCistplJEDECC[4]; /* 12 */ - BYTE bCistplMANFID[6]; /* 16 */ - BYTE bCistplVER1[32]; /* 22 */ - BYTE bCistplFUNCID[4]; /* 54 */ - BYTE bCistplFUNCE0[4]; /* 58 */ - BYTE bCistplFUNCE1[5]; /* 62 */ - BYTE bCistplCONF[7]; /* 67 */ - BYTE bCistplCFTBLENT0[10]; /* 74 */ - BYTE bCistplCFTBLENT1[8]; /* 84 */ - BYTE bCistplCFTBLENT2[12]; /* 92 */ - BYTE bCistplCFTBLENT3[8]; /* 104 */ - BYTE bCistplCFTBLENT4[17]; /* 112 */ - BYTE bCistplCFTBLENT5[8]; /* 129 */ - BYTE bCistplCFTBLENT6[17]; /* 137 */ - BYTE bCistplCFTBLENT7[8]; /* 154 */ - BYTE bCistplNOLINK[3]; /* 162 */ -} MemStickBootBlockCIS; - -typedef struct { -#define MS_IDI_GENERAL_CONF 0x848A - WORD wIDIgeneralConfiguration; /* 0 */ - WORD wIDInumberOfCylinder; /* 1 */ - WORD wIDIreserved0; /* 2 */ - WORD wIDInumberOfHead; /* 3 */ - WORD wIDIbytesPerTrack; /* 4 */ - WORD wIDIbytesPerSector; /* 5 */ - WORD wIDIsectorsPerTrack; /* 6 */ - WORD wIDItotalSectors[2]; /* 7-8 high,low */ - WORD wIDIreserved1[11]; /* 9-19 */ - WORD wIDIbufferType; /* 20 */ - WORD wIDIbufferSize; /* 21 */ - WORD wIDIlongCmdECC; /* 22 */ - WORD wIDIfirmVersion[4]; /* 23-26 */ - WORD wIDImodelName[20]; /* 27-46 */ - WORD wIDIreserved2; /* 47 */ - WORD wIDIlongWordSupported; /* 48 */ - WORD wIDIdmaSupported; /* 49 */ - WORD wIDIreserved3; /* 50 */ - WORD wIDIpioTiming; /* 51 */ - WORD wIDIdmaTiming; /* 52 */ - WORD wIDItransferParameter; /* 53 */ - WORD wIDIformattedCylinder; /* 54 */ - WORD wIDIformattedHead; /* 55 */ - WORD wIDIformattedSectorsPerTrack; /* 56 */ - WORD wIDIformattedTotalSectors[2]; /* 57-58 */ - WORD wIDImultiSector; /* 59 */ - WORD wIDIlbaSectors[2]; /* 60-61 */ - WORD wIDIsingleWordDMA; /* 62 */ - WORD wIDImultiWordDMA; /* 63 */ - WORD wIDIreserved4[192]; /* 64-255 */ -} MemStickBootBlockIDI; - -typedef struct { - union { - MemStickBootBlockCIS cis; - BYTE dmy[256]; - } cis; - - union { - MemStickBootBlockIDI idi; - BYTE dmy[256]; - } idi; - -} MemStickBootBlockCIS_IDI; - -/* - * MS_LibControl - */ -typedef struct { - BYTE reserved; - BYTE intr; - BYTE status0; - BYTE status1; - BYTE ovrflg; - BYTE mngflg; - WORD logadr; -} MS_LibTypeExtdat; - -typedef struct { - DWORD flags; - DWORD BytesPerSector; - DWORD NumberOfCylinder; - DWORD SectorsPerCylinder; - WORD cardType; /* R/W, RO, Hybrid */ - WORD blockSize; - WORD PagesPerBlock; - WORD NumberOfPhyBlock; - WORD NumberOfLogBlock; - WORD NumberOfSegment; - WORD *Phy2LogMap; /* phy2log table */ - WORD *Log2PhyMap; /* log2phy table */ - WORD wrtblk; - BYTE pagemap[(MS_MAX_PAGES_PER_BLOCK + (MS_LIB_BITS_PER_BYTE-1)) / - MS_LIB_BITS_PER_BYTE]; - BYTE *blkpag; - MS_LibTypeExtdat *blkext; - BYTE copybuf[512]; -} MS_LibControl; - -#endif diff --git a/drivers/staging/keucr/msscsi.c b/drivers/staging/keucr/msscsi.c deleted file mode 100644 index cb7190e..0000000 --- a/drivers/staging/keucr/msscsi.c +++ /dev/null @@ -1,344 +0,0 @@ -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include - -#include -#include -#include - -#include "usb.h" -#include "scsiglue.h" -#include "transport.h" - -/* - * MS_SCSI_Test_Unit_Ready() - */ -int MS_SCSI_Test_Unit_Ready(struct us_data *us, struct scsi_cmnd *srb) -{ - /* pr_info("MS_SCSI_Test_Unit_Ready\n"); */ - if (us->MS_Status.Insert && us->MS_Status.Ready) - return USB_STOR_TRANSPORT_GOOD; - else { - ENE_MSInit(us); - return USB_STOR_TRANSPORT_GOOD; - } - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_SCSI_Inquiry() - */ -int MS_SCSI_Inquiry(struct us_data *us, struct scsi_cmnd *srb) -{ - /* pr_info("MS_SCSI_Inquiry\n"); */ - BYTE data_ptr[36] = {0x00, 0x80, 0x02, 0x00, 0x1F, 0x00, - 0x00, 0x00, 0x55, 0x53, 0x42, 0x32, - 0x2E, 0x30, 0x20, 0x20, 0x43, 0x61, - 0x72, 0x64, 0x52, 0x65, 0x61, 0x64, - 0x65, 0x72, 0x20, 0x20, 0x20, 0x20, - 0x20, 0x20, 0x30, 0x31, 0x30, 0x30}; - - usb_stor_set_xfer_buf(us, data_ptr, 36, srb, TO_XFER_BUF); - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_SCSI_Mode_Sense() - */ -int MS_SCSI_Mode_Sense(struct us_data *us, struct scsi_cmnd *srb) -{ - BYTE mediaNoWP[12] = {0x0b, 0x00, 0x00, 0x08, 0x00, 0x00, - 0x71, 0xc0, 0x00, 0x00, 0x02, 0x00}; - BYTE mediaWP[12] = {0x0b, 0x00, 0x80, 0x08, 0x00, 0x00, - 0x71, 0xc0, 0x00, 0x00, 0x02, 0x00}; - - if (us->MS_Status.WtP) - usb_stor_set_xfer_buf(us, mediaWP, 12, srb, TO_XFER_BUF); - else - usb_stor_set_xfer_buf(us, mediaNoWP, 12, srb, TO_XFER_BUF); - - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_SCSI_Read_Capacity() - */ -int MS_SCSI_Read_Capacity(struct us_data *us, struct scsi_cmnd *srb) -{ - unsigned int offset = 0; - struct scatterlist *sg = NULL; - DWORD bl_num; - WORD bl_len; - BYTE buf[8]; - - pr_info("MS_SCSI_Read_Capacity\n"); - - bl_len = 0x200; - if (us->MS_Status.IsMSPro) - bl_num = us->MSP_TotalBlock - 1; - else - bl_num = us->MS_Lib.NumberOfLogBlock * - us->MS_Lib.blockSize * 2 - 1; - - us->bl_num = bl_num; - pr_info("bl_len = %x\n", bl_len); - pr_info("bl_num = %x\n", bl_num); - - /* srb->request_bufflen = 8; */ - buf[0] = (bl_num >> 24) & 0xff; - buf[1] = (bl_num >> 16) & 0xff; - buf[2] = (bl_num >> 8) & 0xff; - buf[3] = (bl_num >> 0) & 0xff; - buf[4] = (bl_len >> 24) & 0xff; - buf[5] = (bl_len >> 16) & 0xff; - buf[6] = (bl_len >> 8) & 0xff; - buf[7] = (bl_len >> 0) & 0xff; - - usb_stor_access_xfer_buf(us, buf, 8, srb, &sg, &offset, TO_XFER_BUF); - /* usb_stor_set_xfer_buf(us, buf, srb->request_bufflen, - srb, TO_XFER_BUF); */ - - return USB_STOR_TRANSPORT_GOOD; -} - -/* - * MS_SCSI_Read() - */ -int MS_SCSI_Read(struct us_data *us, struct scsi_cmnd *srb) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result = 0; - PBYTE Cdb = srb->cmnd; - DWORD bn = ((Cdb[2] << 24) & 0xff000000) | - ((Cdb[3] << 16) & 0x00ff0000) | - ((Cdb[4] << 8) & 0x0000ff00) | - ((Cdb[5] << 0) & 0x000000ff); - WORD blen = ((Cdb[7] << 8) & 0xff00) | ((Cdb[8] << 0) & 0x00ff); - DWORD blenByte = blen * 0x200; - - /* pr_info("SCSIOP_READ --- bn = %X, blen = %X, srb->use_sg = %X\n", - bn, blen, srb->use_sg); */ - - if (bn > us->bl_num) - return USB_STOR_TRANSPORT_ERROR; - - if (us->MS_Status.IsMSPro) { - result = ENE_LoadBinCode(us, MSP_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - pr_info("Load MSP RW pattern Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; - } - - /* set up the command wrapper */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = blenByte; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x02; - bcb->CDB[5] = (BYTE)(bn); - bcb->CDB[4] = (BYTE)(bn>>8); - bcb->CDB[3] = (BYTE)(bn>>16); - bcb->CDB[2] = (BYTE)(bn>>24); - - result = ENE_SendScsiCmd(us, FDIR_READ, scsi_sglist(srb), 1); - } else { - void *buf; - int offset = 0; - WORD phyblk, logblk; - BYTE PageNum; - WORD len; - DWORD blkno; - - buf = kmalloc(blenByte, GFP_KERNEL); - if (buf == NULL) - return USB_STOR_TRANSPORT_ERROR; - - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - pr_info("Load MS RW pattern Fail !!\n"); - result = USB_STOR_TRANSPORT_ERROR; - goto exit; - } - - logblk = (WORD)(bn / us->MS_Lib.PagesPerBlock); - PageNum = (BYTE)(bn % us->MS_Lib.PagesPerBlock); - - while (1) { - if (blen > (us->MS_Lib.PagesPerBlock-PageNum)) - len = us->MS_Lib.PagesPerBlock-PageNum; - else - len = blen; - - phyblk = MS_LibConv2Physical(us, logblk); - blkno = phyblk * 0x20 + PageNum; - - /* set up the command wrapper */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = 0x200 * len; - bcb->Flags = 0x80; - bcb->CDB[0] = 0xF1; - bcb->CDB[1] = 0x02; - bcb->CDB[5] = (BYTE)(blkno); - bcb->CDB[4] = (BYTE)(blkno>>8); - bcb->CDB[3] = (BYTE)(blkno>>16); - bcb->CDB[2] = (BYTE)(blkno>>24); - - result = ENE_SendScsiCmd(us, FDIR_READ, buf+offset, 0); - if (result != USB_STOR_XFER_GOOD) { - pr_info("MS_SCSI_Read --- result = %x\n", - result); - result = USB_STOR_TRANSPORT_ERROR; - goto exit; - } - - blen -= len; - if (blen <= 0) - break; - logblk++; - PageNum = 0; - offset += MS_BYTES_PER_PAGE*len; - } - usb_stor_set_xfer_buf(us, buf, blenByte, srb, TO_XFER_BUF); -exit: - kfree(buf); - } - return result; -} - -/* - * MS_SCSI_Write() - */ -int MS_SCSI_Write(struct us_data *us, struct scsi_cmnd *srb) -{ - struct bulk_cb_wrap *bcb = (struct bulk_cb_wrap *) us->iobuf; - int result = 0; - PBYTE Cdb = srb->cmnd; - DWORD bn = ((Cdb[2] << 24) & 0xff000000) | - ((Cdb[3] << 16) & 0x00ff0000) | - ((Cdb[4] << 8) & 0x0000ff00) | - ((Cdb[5] << 0) & 0x000000ff); - WORD blen = ((Cdb[7] << 8) & 0xff00) | ((Cdb[8] << 0) & 0x00ff); - DWORD blenByte = blen * 0x200; - - if (bn > us->bl_num) - return USB_STOR_TRANSPORT_ERROR; - - if (us->MS_Status.IsMSPro) { - result = ENE_LoadBinCode(us, MSP_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - pr_info("Load MSP RW pattern Fail !!\n"); - return USB_STOR_TRANSPORT_ERROR; - } - - /* set up the command wrapper */ - memset(bcb, 0, sizeof(struct bulk_cb_wrap)); - bcb->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcb->DataTransferLength = blenByte; - bcb->Flags = 0x00; - bcb->CDB[0] = 0xF0; - bcb->CDB[1] = 0x04; - bcb->CDB[5] = (BYTE)(bn); - bcb->CDB[4] = (BYTE)(bn>>8); - bcb->CDB[3] = (BYTE)(bn>>16); - bcb->CDB[2] = (BYTE)(bn>>24); - - result = ENE_SendScsiCmd(us, FDIR_WRITE, scsi_sglist(srb), 1); - } else { - void *buf; - int offset = 0; - WORD PhyBlockAddr; - BYTE PageNum; - DWORD result; - WORD len, oldphy, newphy; - - buf = kmalloc(blenByte, GFP_KERNEL); - if (buf == NULL) - return USB_STOR_TRANSPORT_ERROR; - usb_stor_set_xfer_buf(us, buf, blenByte, srb, FROM_XFER_BUF); - - result = ENE_LoadBinCode(us, MS_RW_PATTERN); - if (result != USB_STOR_XFER_GOOD) { - pr_info("Load MS RW pattern Fail !!\n"); - result = USB_STOR_TRANSPORT_ERROR; - goto exit; - } - - PhyBlockAddr = (WORD)(bn / us->MS_Lib.PagesPerBlock); - PageNum = (BYTE)(bn % us->MS_Lib.PagesPerBlock); - - while (1) { - if (blen > (us->MS_Lib.PagesPerBlock-PageNum)) - len = us->MS_Lib.PagesPerBlock-PageNum; - else - len = blen; - - oldphy = MS_LibConv2Physical(us, PhyBlockAddr); - newphy = MS_LibSearchBlockFromLogical(us, PhyBlockAddr); - - result = MS_ReaderCopyBlock(us, oldphy, newphy, - PhyBlockAddr, PageNum, - buf+offset, len); - if (result != USB_STOR_XFER_GOOD) { - pr_info("MS_SCSI_Write --- result = %x\n", - result); - result = USB_STOR_TRANSPORT_ERROR; - goto exit; - } - - us->MS_Lib.Phy2LogMap[oldphy] = MS_LB_NOT_USED_ERASED; - MS_LibForceSetLogicalPair(us, PhyBlockAddr, newphy); - - blen -= len; - if (blen <= 0) - break; - PhyBlockAddr++; - PageNum = 0; - offset += MS_BYTES_PER_PAGE*len; - } -exit: - kfree(buf); - } - return result; -} - -/* - * MS_SCSIIrp() - */ -int MS_SCSIIrp(struct us_data *us, struct scsi_cmnd *srb) -{ - int result; - - us->SrbStatus = SS_SUCCESS; - switch (srb->cmnd[0]) { - case TEST_UNIT_READY: - result = MS_SCSI_Test_Unit_Ready(us, srb); - break; /* 0x00 */ - case INQUIRY: - result = MS_SCSI_Inquiry(us, srb); - break; /* 0x12 */ - case MODE_SENSE: - result = MS_SCSI_Mode_Sense(us, srb); - break; /* 0x1A */ - case READ_CAPACITY: - result = MS_SCSI_Read_Capacity(us, srb); - break; /* 0x25 */ - case READ_10: - result = MS_SCSI_Read(us, srb); - break; /* 0x28 */ - case WRITE_10: - result = MS_SCSI_Write(us, srb); - break; /* 0x2A */ - default: - us->SrbStatus = SS_ILLEGAL_REQUEST; - result = USB_STOR_TRANSPORT_FAILED; - break; - } - return result; -} - diff --git a/drivers/staging/keucr/transport.c b/drivers/staging/keucr/transport.c index 0274cb0..1a8837d 100644 --- a/drivers/staging/keucr/transport.c +++ b/drivers/staging/keucr/transport.c @@ -432,7 +432,7 @@ void ENE_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us) usb_stor_print_cmd(srb); /* send the command to the transport layer */ scsi_set_resid(srb, 0); - if (!(us->MS_Status.Ready || us->SM_Status.Ready)) + if (!(us->SM_Status.Ready)) result = ENE_InitMedia(us); if (us->Power_IsResum == true) { @@ -440,8 +440,6 @@ void ENE_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us) us->Power_IsResum = false; } - if (us->MS_Status.Ready) - result = MS_SCSIIrp(us, srb); if (us->SM_Status.Ready) result = SM_SCSIIrp(us, srb); diff --git a/drivers/staging/keucr/transport.h b/drivers/staging/keucr/transport.h index 7529615..4ae57d0 100644 --- a/drivers/staging/keucr/transport.h +++ b/drivers/staging/keucr/transport.h @@ -95,7 +95,6 @@ extern void usb_stor_set_xfer_buf(struct us_data*, unsigned char *buffer, */ extern void ENE_stor_invoke_transport(struct scsi_cmnd *, struct us_data *); extern int ENE_InitMedia(struct us_data *); -extern int ENE_MSInit(struct us_data *); extern int ENE_SMInit(struct us_data *); extern int ENE_SendScsiCmd(struct us_data*, BYTE, void*, int); extern int ENE_LoadBinCode(struct us_data*, BYTE); @@ -107,51 +106,6 @@ extern void BuildSenseBuffer(struct scsi_cmnd *, int); /* * ENE scsi function */ -extern int MS_SCSIIrp(struct us_data *us, struct scsi_cmnd *srb); extern int SM_SCSIIrp(struct us_data *us, struct scsi_cmnd *srb); -/* - * ENE MS function - */ -extern int MS_CardInit(struct us_data *us); -extern void MS_LibFreeAllocatedArea(struct us_data *us); -extern void MS_LibFreeWriteBuf(struct us_data *us); -extern int MS_LibFreeLogicalMap(struct us_data *us); -extern int MS_LibForceSetLogicalPair(struct us_data *us, WORD logblk, - WORD phyblk); -extern int MS_ReaderReadPage(struct us_data *us, DWORD PhyBlockAddr, - BYTE PageNum, DWORD *PageBuf, - MS_LibTypeExtdat *ExtraDat); -extern int MS_ReaderCopyBlock(struct us_data *us, WORD oldphy, - WORD newphy, WORD PhyBlockAddr, - BYTE PageNum, PBYTE buf, WORD len); -extern int MS_ReaderEraseBlock(struct us_data *us, DWORD PhyBlockAddr); -extern int MS_LibProcessBootBlock(struct us_data *us, WORD PhyBlock, - BYTE *PageData); -extern int MS_LibAllocLogicalMap(struct us_data *us); -extern int MS_LibSetBootBlockMark(struct us_data *us, WORD phyblk); -extern int MS_LibSetLogicalBlockMark(struct us_data *us, WORD phyblk, - WORD mark); -extern int MS_LibSetInitialErrorBlock(struct us_data *us, WORD phyblk); -extern int MS_LibScanLogicalBlockNumber(struct us_data *us, WORD phyblk); -extern int MS_LibAllocWriteBuf(struct us_data *us); -void MS_LibClearWriteBuf(struct us_data *us); -void MS_LibPhy2LogRange(WORD PhyBlock, WORD *LogStart, - WORD *LogEnde); -extern int MS_LibReadExtra(struct us_data *us, DWORD PhyBlock, - BYTE PageNum, MS_LibTypeExtdat *ExtraDat); -extern int MS_LibReadExtraBlock(struct us_data *us, DWORD PhyBlock, - BYTE PageNum, BYTE blen, void *buf); -extern int MS_LibSetAcquiredErrorBlock(struct us_data *us, WORD phyblk); -extern int MS_LibErasePhyBlock(struct us_data *us, WORD phyblk); -extern int MS_LibErrorPhyBlock(struct us_data *us, WORD phyblk); -extern int MS_LibOverwriteExtra(struct us_data *us, DWORD PhyBlockAddr, - BYTE PageNum, BYTE OverwriteFlag); -extern int MS_LibSetLogicalPair(struct us_data *us, - WORD logblk, WORD phyblk); -extern int MS_LibCheckDisableBlock(struct us_data *us, WORD PhyBlock); -extern int MS_CountFreeBlock(struct us_data *us, WORD PhyBlock); -extern int MS_LibSearchBlockFromLogical(struct us_data *us, WORD logblk); -extern int MS_LibSearchBlockFromPhysical(struct us_data *us, WORD phyblk); - #endif diff --git a/drivers/staging/keucr/usb.c b/drivers/staging/keucr/usb.c index 65cf2e3..66aad3a 100644 --- a/drivers/staging/keucr/usb.c +++ b/drivers/staging/keucr/usb.c @@ -75,7 +75,6 @@ static int eucr_resume(struct usb_interface *iface) us->Power_IsResum = true; // //us->SD_Status.Ready = 0; //?? - us->MS_Status = *(PMS_STATUS)&tmp; us->SM_Status = *(PSM_STATUS)&tmp; return 0; @@ -98,7 +97,6 @@ static int eucr_reset_resume(struct usb_interface *iface) us->Power_IsResum = true; // //us->SD_Status.Ready = 0; //?? - us->MS_Status = *(PMS_STATUS)&tmp; us->SM_Status = *(PSM_STATUS)&tmp; return 0; } diff --git a/drivers/staging/keucr/usb.h b/drivers/staging/keucr/usb.h index bbf578a..a5f7a16 100644 --- a/drivers/staging/keucr/usb.h +++ b/drivers/staging/keucr/usb.h @@ -10,7 +10,6 @@ #include #include #include "common.h" -#include "ms.h" struct us_data; struct scsi_cmnd; @@ -201,7 +200,7 @@ struct us_data { //----- MS Control Data ---------------- BOOLEAN MS_SWWP; DWORD MSP_TotalBlock; - MS_LibControl MS_Lib; + /* MS_LibControl MS_Lib; */ BOOLEAN MS_IsRWPage; WORD MS_Model; -- cgit v0.10.2 From 94c97e8e0692ee3a58868a013b973fcf7fed348c Mon Sep 17 00:00:00 2001 From: "Justin P. Mattock" Date: Thu, 7 Jul 2011 15:19:54 +0200 Subject: drivers:staging:rtl typo fix encryptiong to encryption. This patch fixes a typo. Signed-off-by: Justin P. Mattock Cc: Jiri Kosina Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c index 6cb31e1..552115c 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c @@ -445,7 +445,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS)) bytes_per_frag -= IEEE80211_FCS_LEN; - /* Each fragment may need to have room for encryptiong pre/postfix */ + /* Each fragment may need to have room for encryption pre/postfix */ if (encrypt) bytes_per_frag -= crypt->ops->extra_prefix_len + crypt->ops->extra_postfix_len; diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c index de2ed72..424dd48 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c @@ -761,7 +761,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev) (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS)) bytes_per_frag -= IEEE80211_FCS_LEN; - /* Each fragment may need to have room for encryptiong pre/postfix */ + /* Each fragment may need to have room for encryption pre/postfix */ if (encrypt) bytes_per_frag -= crypt->ops->extra_prefix_len + crypt->ops->extra_postfix_len; diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c index ec7845e..59c45a5 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c @@ -723,7 +723,7 @@ int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev) (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS)) bytes_per_frag -= IEEE80211_FCS_LEN; - /* Each fragment may need to have room for encryptiong pre/postfix */ + /* Each fragment may need to have room for encryption pre/postfix */ if (encrypt) bytes_per_frag -= crypt->ops->extra_prefix_len + crypt->ops->extra_postfix_len; -- cgit v0.10.2 From 966b9016a175f0c2a555e937fb918fd845e4b2cc Mon Sep 17 00:00:00 2001 From: Dan Magenheimer Date: Thu, 7 Jul 2011 07:37:19 -0700 Subject: staging: zcache: support multiple clients, prep for KVM and RAMster This is version 3 of an update to zcache, incorporating feedback from the list. This patch adds support to the in-kernel transcendent memory ("tmem") code and the zcache driver for multiple clients, which will be needed for both RAMster and KVM support. It also adds additional tmem callbacks to support RAMster and corresponding no-op stubs in the zcache driver. In v2, I've also taken the liberty of adding some additional sysfs variables to both surface information and allow policy control. Those experimenting with zcache should find them useful. V3 clarifies some code walking and declaring arrays. Signed-off-by: Dan Magenheimer [v3: error27@gmail.com: fix array bounds/walking] [v2: konrad.wilk@oracle.com: fix bools, add check for NULL, fix a comment] [v2: sjenning@linux.vnet.ibm.com: add info/tunables for poor compression] [v2: marcusklemm@googlemail.com: add tunable for max persistent pages] Acked-by: Dan Carpenter Cc: Nitin Gupta Cc: linux-mm@kvack.org Cc: kvm@vger.kernel.org Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/zcache/tmem.c b/drivers/staging/zcache/tmem.c index e954d40..975e34b 100644 --- a/drivers/staging/zcache/tmem.c +++ b/drivers/staging/zcache/tmem.c @@ -142,6 +142,7 @@ static void tmem_obj_init(struct tmem_obj *obj, struct tmem_hashbucket *hb, obj->oid = *oidp; obj->objnode_count = 0; obj->pampd_count = 0; + (*tmem_pamops.new_obj)(obj); SET_SENTINEL(obj, OBJ); while (*new) { BUG_ON(RB_EMPTY_NODE(*new)); @@ -274,7 +275,7 @@ static void tmem_objnode_free(struct tmem_objnode *objnode) /* * lookup index in object and return associated pampd (or NULL if not found) */ -static void *tmem_pampd_lookup_in_obj(struct tmem_obj *obj, uint32_t index) +static void **__tmem_pampd_lookup_in_obj(struct tmem_obj *obj, uint32_t index) { unsigned int height, shift; struct tmem_objnode **slot = NULL; @@ -303,9 +304,33 @@ static void *tmem_pampd_lookup_in_obj(struct tmem_obj *obj, uint32_t index) height--; } out: + return slot != NULL ? (void **)slot : NULL; +} + +static void *tmem_pampd_lookup_in_obj(struct tmem_obj *obj, uint32_t index) +{ + struct tmem_objnode **slot; + + slot = (struct tmem_objnode **)__tmem_pampd_lookup_in_obj(obj, index); return slot != NULL ? *slot : NULL; } +static void *tmem_pampd_replace_in_obj(struct tmem_obj *obj, uint32_t index, + void *new_pampd) +{ + struct tmem_objnode **slot; + void *ret = NULL; + + slot = (struct tmem_objnode **)__tmem_pampd_lookup_in_obj(obj, index); + if ((slot != NULL) && (*slot != NULL)) { + void *old_pampd = *(void **)slot; + *(void **)slot = new_pampd; + (*tmem_pamops.free)(old_pampd, obj->pool, NULL, 0); + ret = new_pampd; + } + return ret; +} + static int tmem_pampd_add_to_obj(struct tmem_obj *obj, uint32_t index, void *pampd) { @@ -456,7 +481,7 @@ static void tmem_objnode_node_destroy(struct tmem_obj *obj, if (ht == 1) { obj->pampd_count--; (*tmem_pamops.free)(objnode->slots[i], - obj->pool); + obj->pool, NULL, 0); objnode->slots[i] = NULL; continue; } @@ -473,7 +498,7 @@ static void tmem_pampd_destroy_all_in_obj(struct tmem_obj *obj) return; if (obj->objnode_tree_height == 0) { obj->pampd_count--; - (*tmem_pamops.free)(obj->objnode_tree_root, obj->pool); + (*tmem_pamops.free)(obj->objnode_tree_root, obj->pool, NULL, 0); } else { tmem_objnode_node_destroy(obj, obj->objnode_tree_root, obj->objnode_tree_height); @@ -481,6 +506,7 @@ static void tmem_pampd_destroy_all_in_obj(struct tmem_obj *obj) obj->objnode_tree_height = 0; } obj->objnode_tree_root = NULL; + (*tmem_pamops.free_obj)(obj->pool, obj); } /* @@ -503,15 +529,13 @@ static void tmem_pampd_destroy_all_in_obj(struct tmem_obj *obj) * always flushes for simplicity. */ int tmem_put(struct tmem_pool *pool, struct tmem_oid *oidp, uint32_t index, - struct page *page) + char *data, size_t size, bool raw, bool ephemeral) { struct tmem_obj *obj = NULL, *objfound = NULL, *objnew = NULL; void *pampd = NULL, *pampd_del = NULL; int ret = -ENOMEM; - bool ephemeral; struct tmem_hashbucket *hb; - ephemeral = is_ephemeral(pool); hb = &pool->hashbucket[tmem_oid_hash(oidp)]; spin_lock(&hb->lock); obj = objfound = tmem_obj_find(hb, oidp); @@ -521,7 +545,7 @@ int tmem_put(struct tmem_pool *pool, struct tmem_oid *oidp, uint32_t index, /* if found, is a dup put, flush the old one */ pampd_del = tmem_pampd_delete_from_obj(obj, index); BUG_ON(pampd_del != pampd); - (*tmem_pamops.free)(pampd, pool); + (*tmem_pamops.free)(pampd, pool, oidp, index); if (obj->pampd_count == 0) { objnew = obj; objfound = NULL; @@ -538,7 +562,8 @@ int tmem_put(struct tmem_pool *pool, struct tmem_oid *oidp, uint32_t index, } BUG_ON(obj == NULL); BUG_ON(((objnew != obj) && (objfound != obj)) || (objnew == objfound)); - pampd = (*tmem_pamops.create)(obj->pool, &obj->oid, index, page); + pampd = (*tmem_pamops.create)(data, size, raw, ephemeral, + obj->pool, &obj->oid, index); if (unlikely(pampd == NULL)) goto free; ret = tmem_pampd_add_to_obj(obj, index, pampd); @@ -551,7 +576,7 @@ delete_and_free: (void)tmem_pampd_delete_from_obj(obj, index); free: if (pampd) - (*tmem_pamops.free)(pampd, pool); + (*tmem_pamops.free)(pampd, pool, NULL, 0); if (objnew) { tmem_obj_free(objnew, hb); (*tmem_hostops.obj_free)(objnew, pool); @@ -573,41 +598,52 @@ out: * "put" done with the same handle). */ -int tmem_get(struct tmem_pool *pool, struct tmem_oid *oidp, - uint32_t index, struct page *page) +int tmem_get(struct tmem_pool *pool, struct tmem_oid *oidp, uint32_t index, + char *data, size_t *size, bool raw, int get_and_free) { struct tmem_obj *obj; void *pampd; bool ephemeral = is_ephemeral(pool); uint32_t ret = -1; struct tmem_hashbucket *hb; + bool free = (get_and_free == 1) || ((get_and_free == 0) && ephemeral); + bool lock_held = false; hb = &pool->hashbucket[tmem_oid_hash(oidp)]; spin_lock(&hb->lock); + lock_held = true; obj = tmem_obj_find(hb, oidp); if (obj == NULL) goto out; - ephemeral = is_ephemeral(pool); - if (ephemeral) + if (free) pampd = tmem_pampd_delete_from_obj(obj, index); else pampd = tmem_pampd_lookup_in_obj(obj, index); if (pampd == NULL) goto out; - ret = (*tmem_pamops.get_data)(page, pampd, pool); - if (ret < 0) - goto out; - if (ephemeral) { - (*tmem_pamops.free)(pampd, pool); + if (free) { if (obj->pampd_count == 0) { tmem_obj_free(obj, hb); (*tmem_hostops.obj_free)(obj, pool); obj = NULL; } } + if (tmem_pamops.is_remote(pampd)) { + lock_held = false; + spin_unlock(&hb->lock); + } + if (free) + ret = (*tmem_pamops.get_data_and_free)( + data, size, raw, pampd, pool, oidp, index); + else + ret = (*tmem_pamops.get_data)( + data, size, raw, pampd, pool, oidp, index); + if (ret < 0) + goto out; ret = 0; out: - spin_unlock(&hb->lock); + if (lock_held) + spin_unlock(&hb->lock); return ret; } @@ -632,7 +668,7 @@ int tmem_flush_page(struct tmem_pool *pool, pampd = tmem_pampd_delete_from_obj(obj, index); if (pampd == NULL) goto out; - (*tmem_pamops.free)(pampd, pool); + (*tmem_pamops.free)(pampd, pool, oidp, index); if (obj->pampd_count == 0) { tmem_obj_free(obj, hb); (*tmem_hostops.obj_free)(obj, pool); @@ -645,6 +681,30 @@ out: } /* + * If a page in tmem matches the handle, replace the page so that any + * subsequent "get" gets the new page. Returns 0 if + * there was a page to replace, else returns -1. + */ +int tmem_replace(struct tmem_pool *pool, struct tmem_oid *oidp, + uint32_t index, void *new_pampd) +{ + struct tmem_obj *obj; + int ret = -1; + struct tmem_hashbucket *hb; + + hb = &pool->hashbucket[tmem_oid_hash(oidp)]; + spin_lock(&hb->lock); + obj = tmem_obj_find(hb, oidp); + if (obj == NULL) + goto out; + new_pampd = tmem_pampd_replace_in_obj(obj, index, new_pampd); + ret = (*tmem_pamops.replace_in_obj)(new_pampd, obj); +out: + spin_unlock(&hb->lock); + return ret; +} + +/* * "Flush" all pages in tmem matching this oid. */ int tmem_flush_object(struct tmem_pool *pool, struct tmem_oid *oidp) diff --git a/drivers/staging/zcache/tmem.h b/drivers/staging/zcache/tmem.h index 2e07e21..ed147c4 100644 --- a/drivers/staging/zcache/tmem.h +++ b/drivers/staging/zcache/tmem.h @@ -147,6 +147,7 @@ struct tmem_obj { unsigned int objnode_tree_height; unsigned long objnode_count; long pampd_count; + void *extra; /* for private use by pampd implementation */ DECL_SENTINEL }; @@ -166,10 +167,18 @@ struct tmem_objnode { /* pampd abstract datatype methods provided by the PAM implementation */ struct tmem_pamops { - void *(*create)(struct tmem_pool *, struct tmem_oid *, uint32_t, - struct page *); - int (*get_data)(struct page *, void *, struct tmem_pool *); - void (*free)(void *, struct tmem_pool *); + void *(*create)(char *, size_t, bool, int, + struct tmem_pool *, struct tmem_oid *, uint32_t); + int (*get_data)(char *, size_t *, bool, void *, struct tmem_pool *, + struct tmem_oid *, uint32_t); + int (*get_data_and_free)(char *, size_t *, bool, void *, + struct tmem_pool *, struct tmem_oid *, + uint32_t); + void (*free)(void *, struct tmem_pool *, struct tmem_oid *, uint32_t); + void (*free_obj)(struct tmem_pool *, struct tmem_obj *); + bool (*is_remote)(void *); + void (*new_obj)(struct tmem_obj *); + int (*replace_in_obj)(void *, struct tmem_obj *); }; extern void tmem_register_pamops(struct tmem_pamops *m); @@ -184,9 +193,11 @@ extern void tmem_register_hostops(struct tmem_hostops *m); /* core tmem accessor functions */ extern int tmem_put(struct tmem_pool *, struct tmem_oid *, uint32_t index, - struct page *page); + char *, size_t, bool, bool); extern int tmem_get(struct tmem_pool *, struct tmem_oid *, uint32_t index, - struct page *page); + char *, size_t *, bool, int); +extern int tmem_replace(struct tmem_pool *, struct tmem_oid *, uint32_t index, + void *); extern int tmem_flush_page(struct tmem_pool *, struct tmem_oid *, uint32_t index); extern int tmem_flush_object(struct tmem_pool *, struct tmem_oid *); diff --git a/drivers/staging/zcache/zcache.c b/drivers/staging/zcache/zcache.c index 77ac2d4..65a81a0 100644 --- a/drivers/staging/zcache/zcache.c +++ b/drivers/staging/zcache/zcache.c @@ -49,6 +49,33 @@ (__GFP_FS | __GFP_NORETRY | __GFP_NOWARN | __GFP_NOMEMALLOC) #endif +#define MAX_POOLS_PER_CLIENT 16 + +#define MAX_CLIENTS 16 +#define LOCAL_CLIENT ((uint16_t)-1) +struct zcache_client { + struct tmem_pool *tmem_pools[MAX_POOLS_PER_CLIENT]; + struct xv_pool *xvpool; + bool allocated; + atomic_t refcount; +}; + +static struct zcache_client zcache_host; +static struct zcache_client zcache_clients[MAX_CLIENTS]; + +static inline uint16_t get_client_id_from_client(struct zcache_client *cli) +{ + BUG_ON(cli == NULL); + if (cli == &zcache_host) + return LOCAL_CLIENT; + return cli - &zcache_clients[0]; +} + +static inline bool is_local_client(struct zcache_client *cli) +{ + return cli == &zcache_host; +} + /********** * Compression buddies ("zbud") provides for packing two (or, possibly * in the future, more) compressed ephemeral pages into a single "raw" @@ -72,7 +99,8 @@ #define ZBUD_MAX_BUDS 2 struct zbud_hdr { - uint32_t pool_id; + uint16_t client_id; + uint16_t pool_id; struct tmem_oid oid; uint32_t index; uint16_t size; /* compressed size in bytes, zero means unused */ @@ -120,6 +148,7 @@ static unsigned long zcache_zbud_curr_zbytes; static unsigned long zcache_zbud_cumul_zpages; static unsigned long zcache_zbud_cumul_zbytes; static unsigned long zcache_compress_poor; +static unsigned long zcache_mean_compress_poor; /* forward references */ static void *zcache_get_free_page(void); @@ -294,7 +323,8 @@ static void zbud_free_and_delist(struct zbud_hdr *zh) } } -static struct zbud_hdr *zbud_create(uint32_t pool_id, struct tmem_oid *oid, +static struct zbud_hdr *zbud_create(uint16_t client_id, uint16_t pool_id, + struct tmem_oid *oid, uint32_t index, struct page *page, void *cdata, unsigned size) { @@ -353,6 +383,7 @@ init_zh: zh->index = index; zh->oid = *oid; zh->pool_id = pool_id; + zh->client_id = client_id; /* can wait to copy the data until the list locks are dropped */ spin_unlock(&zbud_budlists_spinlock); @@ -407,7 +438,8 @@ static unsigned long zcache_evicted_raw_pages; static unsigned long zcache_evicted_buddied_pages; static unsigned long zcache_evicted_unbuddied_pages; -static struct tmem_pool *zcache_get_pool_by_id(uint32_t poolid); +static struct tmem_pool *zcache_get_pool_by_id(uint16_t cli_id, + uint16_t poolid); static void zcache_put_pool(struct tmem_pool *pool); /* @@ -417,7 +449,8 @@ static void zbud_evict_zbpg(struct zbud_page *zbpg) { struct zbud_hdr *zh; int i, j; - uint32_t pool_id[ZBUD_MAX_BUDS], index[ZBUD_MAX_BUDS]; + uint32_t pool_id[ZBUD_MAX_BUDS], client_id[ZBUD_MAX_BUDS]; + uint32_t index[ZBUD_MAX_BUDS]; struct tmem_oid oid[ZBUD_MAX_BUDS]; struct tmem_pool *pool; @@ -426,6 +459,7 @@ static void zbud_evict_zbpg(struct zbud_page *zbpg) for (i = 0, j = 0; i < ZBUD_MAX_BUDS; i++) { zh = &zbpg->buddy[i]; if (zh->size) { + client_id[j] = zh->client_id; pool_id[j] = zh->pool_id; oid[j] = zh->oid; index[j] = zh->index; @@ -435,7 +469,7 @@ static void zbud_evict_zbpg(struct zbud_page *zbpg) } spin_unlock(&zbpg->lock); for (i = 0; i < j; i++) { - pool = zcache_get_pool_by_id(pool_id[i]); + pool = zcache_get_pool_by_id(client_id[i], pool_id[i]); if (pool != NULL) { tmem_flush_page(pool, &oid[i], index[i]); zcache_put_pool(pool); @@ -552,9 +586,8 @@ static int zbud_show_unbuddied_list_counts(char *buf) int i; char *p = buf; - for (i = 0; i < NCHUNKS - 1; i++) + for (i = 0; i < NCHUNKS; i++) p += sprintf(p, "%u ", zbud_unbuddied[i].count); - p += sprintf(p, "%d\n", zbud_unbuddied[i].count); return p - buf; } @@ -602,7 +635,23 @@ struct zv_hdr { DECL_SENTINEL }; -static const int zv_max_page_size = (PAGE_SIZE / 8) * 7; +/* rudimentary policy limits */ +/* total number of persistent pages may not exceed this percentage */ +static unsigned int zv_page_count_policy_percent = 75; +/* + * byte count defining poor compression; pages with greater zsize will be + * rejected + */ +static unsigned int zv_max_zsize = (PAGE_SIZE / 8) * 7; +/* + * byte count defining poor *mean* compression; pages with greater zsize + * will be rejected until sufficient better-compressed pages are accepted + * driving the man below this threshold + */ +static unsigned int zv_max_mean_zsize = (PAGE_SIZE / 8) * 5; + +static unsigned long zv_curr_dist_counts[NCHUNKS]; +static unsigned long zv_cumul_dist_counts[NCHUNKS]; static struct zv_hdr *zv_create(struct xv_pool *xvpool, uint32_t pool_id, struct tmem_oid *oid, uint32_t index, @@ -611,13 +660,18 @@ static struct zv_hdr *zv_create(struct xv_pool *xvpool, uint32_t pool_id, struct page *page; struct zv_hdr *zv = NULL; uint32_t offset; + int alloc_size = clen + sizeof(struct zv_hdr); + int chunks = (alloc_size + (CHUNK_SIZE - 1)) >> CHUNK_SHIFT; int ret; BUG_ON(!irqs_disabled()); - ret = xv_malloc(xvpool, clen + sizeof(struct zv_hdr), + BUG_ON(chunks >= NCHUNKS); + ret = xv_malloc(xvpool, alloc_size, &page, &offset, ZCACHE_GFP_MASK); if (unlikely(ret)) goto out; + zv_curr_dist_counts[chunks]++; + zv_cumul_dist_counts[chunks]++; zv = kmap_atomic(page, KM_USER0) + offset; zv->index = index; zv->oid = *oid; @@ -634,11 +688,14 @@ static void zv_free(struct xv_pool *xvpool, struct zv_hdr *zv) unsigned long flags; struct page *page; uint32_t offset; - uint16_t size; + uint16_t size = xv_get_object_size(zv); + int chunks = (size + (CHUNK_SIZE - 1)) >> CHUNK_SHIFT; ASSERT_SENTINEL(zv, ZVH); - size = xv_get_object_size(zv) - sizeof(*zv); - BUG_ON(size == 0 || size > zv_max_page_size); + BUG_ON(chunks >= NCHUNKS); + zv_curr_dist_counts[chunks]--; + size -= sizeof(*zv); + BUG_ON(size == 0); INVERT_SENTINEL(zv, ZVH); page = virt_to_page(zv); offset = (unsigned long)zv & ~PAGE_MASK; @@ -656,7 +713,7 @@ static void zv_decompress(struct page *page, struct zv_hdr *zv) ASSERT_SENTINEL(zv, ZVH); size = xv_get_object_size(zv) - sizeof(*zv); - BUG_ON(size == 0 || size > zv_max_page_size); + BUG_ON(size == 0); to_va = kmap_atomic(page, KM_USER0); ret = lzo1x_decompress_safe((char *)zv + sizeof(*zv), size, to_va, &clen); @@ -665,6 +722,159 @@ static void zv_decompress(struct page *page, struct zv_hdr *zv) BUG_ON(clen != PAGE_SIZE); } +#ifdef CONFIG_SYSFS +/* + * show a distribution of compression stats for zv pages. + */ + +static int zv_curr_dist_counts_show(char *buf) +{ + unsigned long i, n, chunks = 0, sum_total_chunks = 0; + char *p = buf; + + for (i = 0; i < NCHUNKS; i++) { + n = zv_curr_dist_counts[i]; + p += sprintf(p, "%lu ", n); + chunks += n; + sum_total_chunks += i * n; + } + p += sprintf(p, "mean:%lu\n", + chunks == 0 ? 0 : sum_total_chunks / chunks); + return p - buf; +} + +static int zv_cumul_dist_counts_show(char *buf) +{ + unsigned long i, n, chunks = 0, sum_total_chunks = 0; + char *p = buf; + + for (i = 0; i < NCHUNKS; i++) { + n = zv_cumul_dist_counts[i]; + p += sprintf(p, "%lu ", n); + chunks += n; + sum_total_chunks += i * n; + } + p += sprintf(p, "mean:%lu\n", + chunks == 0 ? 0 : sum_total_chunks / chunks); + return p - buf; +} + +/* + * setting zv_max_zsize via sysfs causes all persistent (e.g. swap) + * pages that don't compress to less than this value (including metadata + * overhead) to be rejected. We don't allow the value to get too close + * to PAGE_SIZE. + */ +static ssize_t zv_max_zsize_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "%u\n", zv_max_zsize); +} + +static ssize_t zv_max_zsize_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + int err; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + err = strict_strtoul(buf, 10, &val); + if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7)) + return -EINVAL; + zv_max_zsize = val; + return count; +} + +/* + * setting zv_max_mean_zsize via sysfs causes all persistent (e.g. swap) + * pages that don't compress to less than this value (including metadata + * overhead) to be rejected UNLESS the mean compression is also smaller + * than this value. In other words, we are load-balancing-by-zsize the + * accepted pages. Again, we don't allow the value to get too close + * to PAGE_SIZE. + */ +static ssize_t zv_max_mean_zsize_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "%u\n", zv_max_mean_zsize); +} + +static ssize_t zv_max_mean_zsize_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + int err; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + err = strict_strtoul(buf, 10, &val); + if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7)) + return -EINVAL; + zv_max_mean_zsize = val; + return count; +} + +/* + * setting zv_page_count_policy_percent via sysfs sets an upper bound of + * persistent (e.g. swap) pages that will be retained according to: + * (zv_page_count_policy_percent * totalram_pages) / 100) + * when that limit is reached, further puts will be rejected (until + * some pages have been flushed). Note that, due to compression, + * this number may exceed 100; it defaults to 75 and we set an + * arbitary limit of 150. A poor choice will almost certainly result + * in OOM's, so this value should only be changed prudently. + */ +static ssize_t zv_page_count_policy_percent_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + return sprintf(buf, "%u\n", zv_page_count_policy_percent); +} + +static ssize_t zv_page_count_policy_percent_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + int err; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + err = strict_strtoul(buf, 10, &val); + if (err || (val == 0) || (val > 150)) + return -EINVAL; + zv_page_count_policy_percent = val; + return count; +} + +static struct kobj_attribute zcache_zv_max_zsize_attr = { + .attr = { .name = "zv_max_zsize", .mode = 0644 }, + .show = zv_max_zsize_show, + .store = zv_max_zsize_store, +}; + +static struct kobj_attribute zcache_zv_max_mean_zsize_attr = { + .attr = { .name = "zv_max_mean_zsize", .mode = 0644 }, + .show = zv_max_mean_zsize_show, + .store = zv_max_mean_zsize_store, +}; + +static struct kobj_attribute zcache_zv_page_count_policy_percent_attr = { + .attr = { .name = "zv_page_count_policy_percent", + .mode = 0644 }, + .show = zv_page_count_policy_percent_show, + .store = zv_page_count_policy_percent_store, +}; +#endif + /* * zcache core code starts here */ @@ -677,36 +887,70 @@ static unsigned long zcache_flobj_found; static unsigned long zcache_failed_eph_puts; static unsigned long zcache_failed_pers_puts; -#define MAX_POOLS_PER_CLIENT 16 - -static struct { - struct tmem_pool *tmem_pools[MAX_POOLS_PER_CLIENT]; - struct xv_pool *xvpool; -} zcache_client; - /* * Tmem operations assume the poolid implies the invoking client. - * Zcache only has one client (the kernel itself), so translate - * the poolid into the tmem_pool allocated for it. A KVM version + * Zcache only has one client (the kernel itself): LOCAL_CLIENT. + * RAMster has each client numbered by cluster node, and a KVM version * of zcache would have one client per guest and each client might * have a poolid==N. */ -static struct tmem_pool *zcache_get_pool_by_id(uint32_t poolid) +static struct tmem_pool *zcache_get_pool_by_id(uint16_t cli_id, uint16_t poolid) { struct tmem_pool *pool = NULL; + struct zcache_client *cli = NULL; - if (poolid >= 0) { - pool = zcache_client.tmem_pools[poolid]; + if (cli_id == LOCAL_CLIENT) + cli = &zcache_host; + else { + if (cli_id >= MAX_CLIENTS) + goto out; + cli = &zcache_clients[cli_id]; + if (cli == NULL) + goto out; + atomic_inc(&cli->refcount); + } + if (poolid < MAX_POOLS_PER_CLIENT) { + pool = cli->tmem_pools[poolid]; if (pool != NULL) atomic_inc(&pool->refcount); } +out: return pool; } static void zcache_put_pool(struct tmem_pool *pool) { - if (pool != NULL) - atomic_dec(&pool->refcount); + struct zcache_client *cli = NULL; + + if (pool == NULL) + BUG(); + cli = pool->client; + atomic_dec(&pool->refcount); + atomic_dec(&cli->refcount); +} + +int zcache_new_client(uint16_t cli_id) +{ + struct zcache_client *cli = NULL; + int ret = -1; + + if (cli_id == LOCAL_CLIENT) + cli = &zcache_host; + else if ((unsigned int)cli_id < MAX_CLIENTS) + cli = &zcache_clients[cli_id]; + if (cli == NULL) + goto out; + if (cli->allocated) + goto out; + cli->allocated = 1; +#ifdef CONFIG_FRONTSWAP + cli->xvpool = xv_create_pool(); + if (cli->xvpool == NULL) + goto out; +#endif + ret = 0; +out: + return ret; } /* counters for debugging */ @@ -901,48 +1145,59 @@ static unsigned long zcache_curr_pers_pampd_count_max; /* forward reference */ static int zcache_compress(struct page *from, void **out_va, size_t *out_len); -static void *zcache_pampd_create(struct tmem_pool *pool, struct tmem_oid *oid, - uint32_t index, struct page *page) +static void *zcache_pampd_create(char *data, size_t size, bool raw, int eph, + struct tmem_pool *pool, struct tmem_oid *oid, + uint32_t index) { void *pampd = NULL, *cdata; size_t clen; int ret; - bool ephemeral = is_ephemeral(pool); unsigned long count; + struct page *page = virt_to_page(data); + struct zcache_client *cli = pool->client; + uint16_t client_id = get_client_id_from_client(cli); + unsigned long zv_mean_zsize; + unsigned long curr_pers_pampd_count; - if (ephemeral) { + if (eph) { ret = zcache_compress(page, &cdata, &clen); if (ret == 0) - goto out; if (clen == 0 || clen > zbud_max_buddy_size()) { zcache_compress_poor++; goto out; } - pampd = (void *)zbud_create(pool->pool_id, oid, index, - page, cdata, clen); + pampd = (void *)zbud_create(client_id, pool->pool_id, oid, + index, page, cdata, clen); if (pampd != NULL) { count = atomic_inc_return(&zcache_curr_eph_pampd_count); if (count > zcache_curr_eph_pampd_count_max) zcache_curr_eph_pampd_count_max = count; } } else { - /* - * FIXME: This is all the "policy" there is for now. - * 3/4 totpages should allow ~37% of RAM to be filled with - * compressed frontswap pages - */ - if (atomic_read(&zcache_curr_pers_pampd_count) > - 3 * totalram_pages / 4) + curr_pers_pampd_count = + atomic_read(&zcache_curr_pers_pampd_count); + if (curr_pers_pampd_count > + (zv_page_count_policy_percent * totalram_pages) / 100) goto out; ret = zcache_compress(page, &cdata, &clen); if (ret == 0) goto out; - if (clen > zv_max_page_size) { + /* reject if compression is too poor */ + if (clen > zv_max_zsize) { zcache_compress_poor++; goto out; } - pampd = (void *)zv_create(zcache_client.xvpool, pool->pool_id, + /* reject if mean compression is too poor */ + if ((clen > zv_max_mean_zsize) && (curr_pers_pampd_count > 0)) { + zv_mean_zsize = xv_get_total_size_bytes(cli->xvpool) / + curr_pers_pampd_count; + if (zv_mean_zsize > zv_max_mean_zsize) { + zcache_mean_compress_poor++; + goto out; + } + } + pampd = (void *)zv_create(cli->xvpool, pool->pool_id, oid, index, cdata, clen); if (pampd == NULL) goto out; @@ -958,15 +1213,31 @@ out: * fill the pageframe corresponding to the struct page with the data * from the passed pampd */ -static int zcache_pampd_get_data(struct page *page, void *pampd, - struct tmem_pool *pool) +static int zcache_pampd_get_data(char *data, size_t *bufsize, bool raw, + void *pampd, struct tmem_pool *pool, + struct tmem_oid *oid, uint32_t index) { int ret = 0; - if (is_ephemeral(pool)) - ret = zbud_decompress(page, pampd); - else - zv_decompress(page, pampd); + BUG_ON(is_ephemeral(pool)); + zv_decompress(virt_to_page(data), pampd); + return ret; +} + +/* + * fill the pageframe corresponding to the struct page with the data + * from the passed pampd + */ +static int zcache_pampd_get_data_and_free(char *data, size_t *bufsize, bool raw, + void *pampd, struct tmem_pool *pool, + struct tmem_oid *oid, uint32_t index) +{ + int ret = 0; + + BUG_ON(!is_ephemeral(pool)); + zbud_decompress(virt_to_page(data), pampd); + zbud_free_and_delist((struct zbud_hdr *)pampd); + atomic_dec(&zcache_curr_eph_pampd_count); return ret; } @@ -974,23 +1245,49 @@ static int zcache_pampd_get_data(struct page *page, void *pampd, * free the pampd and remove it from any zcache lists * pampd must no longer be pointed to from any tmem data structures! */ -static void zcache_pampd_free(void *pampd, struct tmem_pool *pool) +static void zcache_pampd_free(void *pampd, struct tmem_pool *pool, + struct tmem_oid *oid, uint32_t index) { + struct zcache_client *cli = pool->client; + if (is_ephemeral(pool)) { zbud_free_and_delist((struct zbud_hdr *)pampd); atomic_dec(&zcache_curr_eph_pampd_count); BUG_ON(atomic_read(&zcache_curr_eph_pampd_count) < 0); } else { - zv_free(zcache_client.xvpool, (struct zv_hdr *)pampd); + zv_free(cli->xvpool, (struct zv_hdr *)pampd); atomic_dec(&zcache_curr_pers_pampd_count); BUG_ON(atomic_read(&zcache_curr_pers_pampd_count) < 0); } } +static void zcache_pampd_free_obj(struct tmem_pool *pool, struct tmem_obj *obj) +{ +} + +static void zcache_pampd_new_obj(struct tmem_obj *obj) +{ +} + +static int zcache_pampd_replace_in_obj(void *pampd, struct tmem_obj *obj) +{ + return -1; +} + +static bool zcache_pampd_is_remote(void *pampd) +{ + return 0; +} + static struct tmem_pamops zcache_pamops = { .create = zcache_pampd_create, .get_data = zcache_pampd_get_data, + .get_data_and_free = zcache_pampd_get_data_and_free, .free = zcache_pampd_free, + .free_obj = zcache_pampd_free_obj, + .new_obj = zcache_pampd_new_obj, + .replace_in_obj = zcache_pampd_replace_in_obj, + .is_remote = zcache_pampd_is_remote, }; /* @@ -1122,6 +1419,7 @@ ZCACHE_SYSFS_RO(put_to_flush); ZCACHE_SYSFS_RO(aborted_preload); ZCACHE_SYSFS_RO(aborted_shrink); ZCACHE_SYSFS_RO(compress_poor); +ZCACHE_SYSFS_RO(mean_compress_poor); ZCACHE_SYSFS_RO_ATOMIC(zbud_curr_raw_pages); ZCACHE_SYSFS_RO_ATOMIC(zbud_curr_zpages); ZCACHE_SYSFS_RO_ATOMIC(curr_obj_count); @@ -1130,6 +1428,10 @@ ZCACHE_SYSFS_RO_CUSTOM(zbud_unbuddied_list_counts, zbud_show_unbuddied_list_counts); ZCACHE_SYSFS_RO_CUSTOM(zbud_cumul_chunk_counts, zbud_show_cumul_chunk_counts); +ZCACHE_SYSFS_RO_CUSTOM(zv_curr_dist_counts, + zv_curr_dist_counts_show); +ZCACHE_SYSFS_RO_CUSTOM(zv_cumul_dist_counts, + zv_cumul_dist_counts_show); static struct attribute *zcache_attrs[] = { &zcache_curr_obj_count_attr.attr, @@ -1143,6 +1445,7 @@ static struct attribute *zcache_attrs[] = { &zcache_failed_eph_puts_attr.attr, &zcache_failed_pers_puts_attr.attr, &zcache_compress_poor_attr.attr, + &zcache_mean_compress_poor_attr.attr, &zcache_zbud_curr_raw_pages_attr.attr, &zcache_zbud_curr_zpages_attr.attr, &zcache_zbud_curr_zbytes_attr.attr, @@ -1160,6 +1463,11 @@ static struct attribute *zcache_attrs[] = { &zcache_aborted_shrink_attr.attr, &zcache_zbud_unbuddied_list_counts_attr.attr, &zcache_zbud_cumul_chunk_counts_attr.attr, + &zcache_zv_curr_dist_counts_attr.attr, + &zcache_zv_cumul_dist_counts_attr.attr, + &zcache_zv_max_zsize_attr.attr, + &zcache_zv_max_mean_zsize_attr.attr, + &zcache_zv_page_count_policy_percent_attr.attr, NULL, }; @@ -1212,19 +1520,20 @@ static struct shrinker zcache_shrinker = { * zcache shims between cleancache/frontswap ops and tmem */ -static int zcache_put_page(int pool_id, struct tmem_oid *oidp, +static int zcache_put_page(int cli_id, int pool_id, struct tmem_oid *oidp, uint32_t index, struct page *page) { struct tmem_pool *pool; int ret = -1; BUG_ON(!irqs_disabled()); - pool = zcache_get_pool_by_id(pool_id); + pool = zcache_get_pool_by_id(cli_id, pool_id); if (unlikely(pool == NULL)) goto out; if (!zcache_freeze && zcache_do_preload(pool) == 0) { /* preload does preempt_disable on success */ - ret = tmem_put(pool, oidp, index, page); + ret = tmem_put(pool, oidp, index, page_address(page), + PAGE_SIZE, 0, is_ephemeral(pool)); if (ret < 0) { if (is_ephemeral(pool)) zcache_failed_eph_puts++; @@ -1244,25 +1553,28 @@ out: return ret; } -static int zcache_get_page(int pool_id, struct tmem_oid *oidp, +static int zcache_get_page(int cli_id, int pool_id, struct tmem_oid *oidp, uint32_t index, struct page *page) { struct tmem_pool *pool; int ret = -1; unsigned long flags; + size_t size = PAGE_SIZE; local_irq_save(flags); - pool = zcache_get_pool_by_id(pool_id); + pool = zcache_get_pool_by_id(cli_id, pool_id); if (likely(pool != NULL)) { if (atomic_read(&pool->obj_count) > 0) - ret = tmem_get(pool, oidp, index, page); + ret = tmem_get(pool, oidp, index, page_address(page), + &size, 0, is_ephemeral(pool)); zcache_put_pool(pool); } local_irq_restore(flags); return ret; } -static int zcache_flush_page(int pool_id, struct tmem_oid *oidp, uint32_t index) +static int zcache_flush_page(int cli_id, int pool_id, + struct tmem_oid *oidp, uint32_t index) { struct tmem_pool *pool; int ret = -1; @@ -1270,7 +1582,7 @@ static int zcache_flush_page(int pool_id, struct tmem_oid *oidp, uint32_t index) local_irq_save(flags); zcache_flush_total++; - pool = zcache_get_pool_by_id(pool_id); + pool = zcache_get_pool_by_id(cli_id, pool_id); if (likely(pool != NULL)) { if (atomic_read(&pool->obj_count) > 0) ret = tmem_flush_page(pool, oidp, index); @@ -1282,7 +1594,8 @@ static int zcache_flush_page(int pool_id, struct tmem_oid *oidp, uint32_t index) return ret; } -static int zcache_flush_object(int pool_id, struct tmem_oid *oidp) +static int zcache_flush_object(int cli_id, int pool_id, + struct tmem_oid *oidp) { struct tmem_pool *pool; int ret = -1; @@ -1290,7 +1603,7 @@ static int zcache_flush_object(int pool_id, struct tmem_oid *oidp) local_irq_save(flags); zcache_flobj_total++; - pool = zcache_get_pool_by_id(pool_id); + pool = zcache_get_pool_by_id(cli_id, pool_id); if (likely(pool != NULL)) { if (atomic_read(&pool->obj_count) > 0) ret = tmem_flush_object(pool, oidp); @@ -1302,34 +1615,52 @@ static int zcache_flush_object(int pool_id, struct tmem_oid *oidp) return ret; } -static int zcache_destroy_pool(int pool_id) +static int zcache_destroy_pool(int cli_id, int pool_id) { struct tmem_pool *pool = NULL; + struct zcache_client *cli = NULL; int ret = -1; if (pool_id < 0) goto out; - pool = zcache_client.tmem_pools[pool_id]; + if (cli_id == LOCAL_CLIENT) + cli = &zcache_host; + else if ((unsigned int)cli_id < MAX_CLIENTS) + cli = &zcache_clients[cli_id]; + if (cli == NULL) + goto out; + atomic_inc(&cli->refcount); + pool = cli->tmem_pools[pool_id]; if (pool == NULL) goto out; - zcache_client.tmem_pools[pool_id] = NULL; + cli->tmem_pools[pool_id] = NULL; /* wait for pool activity on other cpus to quiesce */ while (atomic_read(&pool->refcount) != 0) ; + atomic_dec(&cli->refcount); local_bh_disable(); ret = tmem_destroy_pool(pool); local_bh_enable(); kfree(pool); - pr_info("zcache: destroyed pool id=%d\n", pool_id); + pr_info("zcache: destroyed pool id=%d, cli_id=%d\n", + pool_id, cli_id); out: return ret; } -static int zcache_new_pool(uint32_t flags) +static int zcache_new_pool(uint16_t cli_id, uint32_t flags) { int poolid = -1; struct tmem_pool *pool; + struct zcache_client *cli = NULL; + if (cli_id == LOCAL_CLIENT) + cli = &zcache_host; + else if ((unsigned int)cli_id < MAX_CLIENTS) + cli = &zcache_clients[cli_id]; + if (cli == NULL) + goto out; + atomic_inc(&cli->refcount); pool = kmalloc(sizeof(struct tmem_pool), GFP_KERNEL); if (pool == NULL) { pr_info("zcache: pool creation failed: out of memory\n"); @@ -1337,7 +1668,7 @@ static int zcache_new_pool(uint32_t flags) } for (poolid = 0; poolid < MAX_POOLS_PER_CLIENT; poolid++) - if (zcache_client.tmem_pools[poolid] == NULL) + if (cli->tmem_pools[poolid] == NULL) break; if (poolid >= MAX_POOLS_PER_CLIENT) { pr_info("zcache: pool creation failed: max exceeded\n"); @@ -1346,14 +1677,16 @@ static int zcache_new_pool(uint32_t flags) goto out; } atomic_set(&pool->refcount, 0); - pool->client = &zcache_client; + pool->client = cli; pool->pool_id = poolid; tmem_new_pool(pool, flags); - zcache_client.tmem_pools[poolid] = pool; - pr_info("zcache: created %s tmem pool, id=%d\n", + cli->tmem_pools[poolid] = pool; + pr_info("zcache: created %s tmem pool, id=%d, client=%d\n", flags & TMEM_POOL_PERSIST ? "persistent" : "ephemeral", - poolid); + poolid, cli_id); out: + if (cli != NULL) + atomic_dec(&cli->refcount); return poolid; } @@ -1374,7 +1707,7 @@ static void zcache_cleancache_put_page(int pool_id, struct tmem_oid oid = *(struct tmem_oid *)&key; if (likely(ind == index)) - (void)zcache_put_page(pool_id, &oid, index, page); + (void)zcache_put_page(LOCAL_CLIENT, pool_id, &oid, index, page); } static int zcache_cleancache_get_page(int pool_id, @@ -1386,7 +1719,7 @@ static int zcache_cleancache_get_page(int pool_id, int ret = -1; if (likely(ind == index)) - ret = zcache_get_page(pool_id, &oid, index, page); + ret = zcache_get_page(LOCAL_CLIENT, pool_id, &oid, index, page); return ret; } @@ -1398,7 +1731,7 @@ static void zcache_cleancache_flush_page(int pool_id, struct tmem_oid oid = *(struct tmem_oid *)&key; if (likely(ind == index)) - (void)zcache_flush_page(pool_id, &oid, ind); + (void)zcache_flush_page(LOCAL_CLIENT, pool_id, &oid, ind); } static void zcache_cleancache_flush_inode(int pool_id, @@ -1406,13 +1739,13 @@ static void zcache_cleancache_flush_inode(int pool_id, { struct tmem_oid oid = *(struct tmem_oid *)&key; - (void)zcache_flush_object(pool_id, &oid); + (void)zcache_flush_object(LOCAL_CLIENT, pool_id, &oid); } static void zcache_cleancache_flush_fs(int pool_id) { if (pool_id >= 0) - (void)zcache_destroy_pool(pool_id); + (void)zcache_destroy_pool(LOCAL_CLIENT, pool_id); } static int zcache_cleancache_init_fs(size_t pagesize) @@ -1420,7 +1753,7 @@ static int zcache_cleancache_init_fs(size_t pagesize) BUG_ON(sizeof(struct cleancache_filekey) != sizeof(struct tmem_oid)); BUG_ON(pagesize != PAGE_SIZE); - return zcache_new_pool(0); + return zcache_new_pool(LOCAL_CLIENT, 0); } static int zcache_cleancache_init_shared_fs(char *uuid, size_t pagesize) @@ -1429,7 +1762,7 @@ static int zcache_cleancache_init_shared_fs(char *uuid, size_t pagesize) BUG_ON(sizeof(struct cleancache_filekey) != sizeof(struct tmem_oid)); BUG_ON(pagesize != PAGE_SIZE); - return zcache_new_pool(0); + return zcache_new_pool(LOCAL_CLIENT, 0); } static struct cleancache_ops zcache_cleancache_ops = { @@ -1483,8 +1816,8 @@ static int zcache_frontswap_put_page(unsigned type, pgoff_t offset, BUG_ON(!PageLocked(page)); if (likely(ind64 == ind)) { local_irq_save(flags); - ret = zcache_put_page(zcache_frontswap_poolid, &oid, - iswiz(ind), page); + ret = zcache_put_page(LOCAL_CLIENT, zcache_frontswap_poolid, + &oid, iswiz(ind), page); local_irq_restore(flags); } return ret; @@ -1502,8 +1835,8 @@ static int zcache_frontswap_get_page(unsigned type, pgoff_t offset, BUG_ON(!PageLocked(page)); if (likely(ind64 == ind)) - ret = zcache_get_page(zcache_frontswap_poolid, &oid, - iswiz(ind), page); + ret = zcache_get_page(LOCAL_CLIENT, zcache_frontswap_poolid, + &oid, iswiz(ind), page); return ret; } @@ -1515,8 +1848,8 @@ static void zcache_frontswap_flush_page(unsigned type, pgoff_t offset) struct tmem_oid oid = oswiz(type, ind); if (likely(ind64 == ind)) - (void)zcache_flush_page(zcache_frontswap_poolid, &oid, - iswiz(ind)); + (void)zcache_flush_page(LOCAL_CLIENT, zcache_frontswap_poolid, + &oid, iswiz(ind)); } /* flush all pages from the passed swaptype */ @@ -1527,7 +1860,8 @@ static void zcache_frontswap_flush_area(unsigned type) for (ind = SWIZ_MASK; ind >= 0; ind--) { oid = oswiz(type, ind); - (void)zcache_flush_object(zcache_frontswap_poolid, &oid); + (void)zcache_flush_object(LOCAL_CLIENT, + zcache_frontswap_poolid, &oid); } } @@ -1535,7 +1869,8 @@ static void zcache_frontswap_init(unsigned ignored) { /* a single tmem poolid is used for all frontswap "types" (swapfiles) */ if (zcache_frontswap_poolid < 0) - zcache_frontswap_poolid = zcache_new_pool(TMEM_POOL_PERSIST); + zcache_frontswap_poolid = + zcache_new_pool(LOCAL_CLIENT, TMEM_POOL_PERSIST); } static struct frontswap_ops zcache_frontswap_ops = { @@ -1624,6 +1959,11 @@ static int __init zcache_init(void) sizeof(struct tmem_objnode), 0, 0, NULL); zcache_obj_cache = kmem_cache_create("zcache_obj", sizeof(struct tmem_obj), 0, 0, NULL); + ret = zcache_new_client(LOCAL_CLIENT); + if (ret) { + pr_err("zcache: can't create client\n"); + goto out; + } #endif #ifdef CONFIG_CLEANCACHE if (zcache_enabled && use_cleancache) { @@ -1642,11 +1982,6 @@ static int __init zcache_init(void) if (zcache_enabled && use_frontswap) { struct frontswap_ops old_ops; - zcache_client.xvpool = xv_create_pool(); - if (zcache_client.xvpool == NULL) { - pr_err("zcache: can't create xvpool\n"); - goto out; - } old_ops = zcache_frontswap_register_ops(); pr_info("zcache: frontswap enabled using kernel " "transcendent memory and xvmalloc\n"); -- cgit v0.10.2 From 2cb30bb11963907acdd69f77e77b3fabb16cfa62 Mon Sep 17 00:00:00 2001 From: Matthieu CASTET Date: Sat, 2 Jul 2011 20:59:46 +0200 Subject: ehci-msm : use ehci_setup Signed-off-by: Matthieu CASTET Tested-by: Pavankumar Kondeti Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index b5a0bf6..592d5f7 100644 --- a/drivers/usb/host/ehci-msm.c +++ b/drivers/usb/host/ehci-msm.c @@ -40,27 +40,9 @@ static int ehci_msm_reset(struct usb_hcd *hcd) int retval; ehci->caps = USB_CAPLENGTH; - ehci->regs = USB_CAPLENGTH + - HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); - dbg_hcs_params(ehci, "reset"); - dbg_hcc_params(ehci, "reset"); - - /* cache the data to minimize the chip reads*/ - ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); - hcd->has_tt = 1; - ehci->sbrn = HCD_USB2; - - retval = ehci_halt(ehci); - if (retval) - return retval; - - /* data structure init */ - retval = ehci_init(hcd); - if (retval) - return retval; - retval = ehci_reset(ehci); + retval = ehci_setup(hcd); if (retval) return retval; -- cgit v0.10.2 From 586073071db01a1f2b939aa31df1e83debb28bf0 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Sun, 3 Jul 2011 11:53:33 +1200 Subject: drivers: usb: atm: ueagle-atm: use __packed Replaced __attribute__ ((packed)) with __packed; Signed-off-by: Chris Forbes Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/atm/ueagle-atm.c b/drivers/usb/atm/ueagle-atm.c index e71521c..2909457 100644 --- a/drivers/usb/atm/ueagle-atm.c +++ b/drivers/usb/atm/ueagle-atm.c @@ -116,14 +116,14 @@ struct uea_cmvs_v1 { u32 address; u16 offset; u32 data; -} __attribute__ ((packed)); +} __packed; struct uea_cmvs_v2 { u32 group; u32 address; u32 offset; u32 data; -} __attribute__ ((packed)); +} __packed; /* information about currently processed cmv */ struct cmv_dsc_e1 { @@ -352,7 +352,7 @@ struct block_index { __le32 PageAddress; __le16 dummy1; __le16 PageNumber; -} __attribute__ ((packed)); +} __packed; #define E4_IS_BOOT_PAGE(PageSize) ((le32_to_cpu(PageSize)) & 0x80000000) #define E4_PAGE_BYTES(PageSize) ((le32_to_cpu(PageSize) & 0x7fffffff) * 4) @@ -367,7 +367,7 @@ struct l1_code { u8 page_number_to_block_index[E4_MAX_PAGE_NUMBER]; struct block_index page_header[E4_NO_SWAPPAGE_HEADERS]; u8 code[0]; -} __attribute__ ((packed)); +} __packed; /* structures describing a block within a DSP page */ struct block_info_e1 { @@ -377,7 +377,7 @@ struct block_info_e1 { __le16 wOvlOffset; __le16 wOvl; /* overlay */ __le16 wLast; -} __attribute__ ((packed)); +} __packed; #define E1_BLOCK_INFO_SIZE 12 struct block_info_e4 { @@ -387,7 +387,7 @@ struct block_info_e4 { __be32 dwSize; __be32 dwAddress; __be16 wReserved; -} __attribute__ ((packed)); +} __packed; #define E4_BLOCK_INFO_SIZE 14 #define UEA_BIHDR 0xabcd @@ -467,7 +467,7 @@ struct cmv_e1 { __le32 dwSymbolicAddress; __le16 wOffsetAddress; __le32 dwData; -} __attribute__ ((packed)); +} __packed; struct cmv_e4 { __be16 wGroup; @@ -475,17 +475,17 @@ struct cmv_e4 { __be16 wOffset; __be16 wAddress; __be32 dwData[6]; -} __attribute__ ((packed)); +} __packed; /* structures representing swap information */ struct swap_info_e1 { __u8 bSwapPageNo; __u8 bOvl; /* overlay */ -} __attribute__ ((packed)); +} __packed; struct swap_info_e4 { __u8 bSwapPageNo; -} __attribute__ ((packed)); +} __packed; /* structures representing interrupt data */ #define e1_bSwapPageNo u.e1.s1.swapinfo.bSwapPageNo @@ -499,23 +499,23 @@ union intr_data_e1 { struct { struct swap_info_e1 swapinfo; __le16 wDataSize; - } __attribute__ ((packed)) s1; + } __packed s1; struct { struct cmv_e1 cmv; __le16 wDataSize; - } __attribute__ ((packed)) s2; -} __attribute__ ((packed)); + } __packed s2; +} __packed; union intr_data_e4 { struct { struct swap_info_e4 swapinfo; __le16 wDataSize; - } __attribute__ ((packed)) s1; + } __packed s1; struct { struct cmv_e4 cmv; __le16 wDataSize; - } __attribute__ ((packed)) s2; -} __attribute__ ((packed)); + } __packed s2; +} __packed; struct intr_pkt { __u8 bType; @@ -528,7 +528,7 @@ struct intr_pkt { union intr_data_e1 e1; union intr_data_e4 e4; } u; -} __attribute__ ((packed)); +} __packed; #define E1_INTR_PKT_SIZE 28 #define E4_INTR_PKT_SIZE 64 -- cgit v0.10.2 From 6f95b4b75295e40851e653e70884fc31c025789f Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Sun, 3 Jul 2011 11:53:34 +1200 Subject: drivers: usb: atm: ueagle-atm: Add missing const qualifier Added missing const qualifier as flagged by checkpatch.pl Signed-off-by: Chris Forbes Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/atm/ueagle-atm.c b/drivers/usb/atm/ueagle-atm.c index 2909457..428f368 100644 --- a/drivers/usb/atm/ueagle-atm.c +++ b/drivers/usb/atm/ueagle-atm.c @@ -535,8 +535,8 @@ struct intr_pkt { static struct usb_driver uea_driver; static DEFINE_MUTEX(uea_mutex); -static const char *chip_name[] = {"ADI930", "Eagle I", "Eagle II", "Eagle III", - "Eagle IV"}; +static const char * const chip_name[] = { + "ADI930", "Eagle I", "Eagle II", "Eagle III", "Eagle IV"}; static int modem_index; static unsigned int debug; -- cgit v0.10.2 From 4c67045bfc2c14a1d3c6040e80eb4a62946282dd Mon Sep 17 00:00:00 2001 From: Kirill Smelkov Date: Sun, 3 Jul 2011 20:36:56 +0400 Subject: USB: EHCI: Move sysfs related bits into ehci-sysfs.c The only sysfs attr implemented so far is "companion" from ehci-hub.c, but in the next patch we are going to add another sysfs file, so prior to that let's structure things and move already-in-there sysfs code to separate file. NOTE: All the code I'm moving into this new file was written by Alan Stern (in 57e06c11 "EHCI: force high-speed devices to run at full speed"; Jan 16 2007), that's why I'm putting Copyright (C) 2007 by Alan Stern there after explicit request from the author. Signed-off-by: Kirill Smelkov Acked-by: Alan Stern Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index e18862c..8306155 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -336,6 +336,7 @@ static void ehci_work(struct ehci_hcd *ehci); #include "ehci-mem.c" #include "ehci-q.c" #include "ehci-sched.c" +#include "ehci-sysfs.c" /*-------------------------------------------------------------------------*/ @@ -520,7 +521,7 @@ static void ehci_stop (struct usb_hcd *hcd) ehci_reset (ehci); spin_unlock_irq(&ehci->lock); - remove_companion_file(ehci); + remove_sysfs_files(ehci); remove_debug_files (ehci); /* root hub is shut down separately (first, when possible) */ @@ -754,7 +755,7 @@ static int ehci_run (struct usb_hcd *hcd) * since the class device isn't created that early. */ create_debug_files(ehci); - create_companion_file(ehci); + create_sysfs_files(ehci); return 0; } diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index ea6184b..d9e8d71 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -471,29 +471,6 @@ static int ehci_bus_resume (struct usb_hcd *hcd) /*-------------------------------------------------------------------------*/ -/* Display the ports dedicated to the companion controller */ -static ssize_t show_companion(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ehci_hcd *ehci; - int nports, index, n; - int count = PAGE_SIZE; - char *ptr = buf; - - ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); - nports = HCS_N_PORTS(ehci->hcs_params); - - for (index = 0; index < nports; ++index) { - if (test_bit(index, &ehci->companion_ports)) { - n = scnprintf(ptr, count, "%d\n", index + 1); - ptr += n; - count -= n; - } - } - return ptr - buf; -} - /* * Sets the owner of a port */ @@ -528,58 +505,6 @@ static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) } } -/* - * Dedicate or undedicate a port to the companion controller. - * Syntax is "[-]portnum", where a leading '-' sign means - * return control of the port to the EHCI controller. - */ -static ssize_t store_companion(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct ehci_hcd *ehci; - int portnum, new_owner; - - ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); - new_owner = PORT_OWNER; /* Owned by companion */ - if (sscanf(buf, "%d", &portnum) != 1) - return -EINVAL; - if (portnum < 0) { - portnum = - portnum; - new_owner = 0; /* Owned by EHCI */ - } - if (portnum <= 0 || portnum > HCS_N_PORTS(ehci->hcs_params)) - return -ENOENT; - portnum--; - if (new_owner) - set_bit(portnum, &ehci->companion_ports); - else - clear_bit(portnum, &ehci->companion_ports); - set_owner(ehci, portnum, new_owner); - return count; -} -static DEVICE_ATTR(companion, 0644, show_companion, store_companion); - -static inline int create_companion_file(struct ehci_hcd *ehci) -{ - int i = 0; - - /* with integrated TT there is no companion! */ - if (!ehci_is_TDI(ehci)) - i = device_create_file(ehci_to_hcd(ehci)->self.controller, - &dev_attr_companion); - return i; -} - -static inline void remove_companion_file(struct ehci_hcd *ehci) -{ - /* with integrated TT there is no companion! */ - if (!ehci_is_TDI(ehci)) - device_remove_file(ehci_to_hcd(ehci)->self.controller, - &dev_attr_companion); -} - - /*-------------------------------------------------------------------------*/ static int check_reset_complete ( diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c new file mode 100644 index 0000000..29824a9 --- /dev/null +++ b/drivers/usb/host/ehci-sysfs.c @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2007 by Alan Stern + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* this file is part of ehci-hcd.c */ + + +/* Display the ports dedicated to the companion controller */ +static ssize_t show_companion(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ehci_hcd *ehci; + int nports, index, n; + int count = PAGE_SIZE; + char *ptr = buf; + + ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); + nports = HCS_N_PORTS(ehci->hcs_params); + + for (index = 0; index < nports; ++index) { + if (test_bit(index, &ehci->companion_ports)) { + n = scnprintf(ptr, count, "%d\n", index + 1); + ptr += n; + count -= n; + } + } + return ptr - buf; +} + +/* + * Dedicate or undedicate a port to the companion controller. + * Syntax is "[-]portnum", where a leading '-' sign means + * return control of the port to the EHCI controller. + */ +static ssize_t store_companion(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct ehci_hcd *ehci; + int portnum, new_owner; + + ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); + new_owner = PORT_OWNER; /* Owned by companion */ + if (sscanf(buf, "%d", &portnum) != 1) + return -EINVAL; + if (portnum < 0) { + portnum = - portnum; + new_owner = 0; /* Owned by EHCI */ + } + if (portnum <= 0 || portnum > HCS_N_PORTS(ehci->hcs_params)) + return -ENOENT; + portnum--; + if (new_owner) + set_bit(portnum, &ehci->companion_ports); + else + clear_bit(portnum, &ehci->companion_ports); + set_owner(ehci, portnum, new_owner); + return count; +} +static DEVICE_ATTR(companion, 0644, show_companion, store_companion); + +static inline int create_sysfs_files(struct ehci_hcd *ehci) +{ + int i = 0; + + /* with integrated TT there is no companion! */ + if (!ehci_is_TDI(ehci)) + i = device_create_file(ehci_to_hcd(ehci)->self.controller, + &dev_attr_companion); + return i; +} + +static inline void remove_sysfs_files(struct ehci_hcd *ehci) +{ + /* with integrated TT there is no companion! */ + if (!ehci_is_TDI(ehci)) + device_remove_file(ehci_to_hcd(ehci)->self.controller, + &dev_attr_companion); +} -- cgit v0.10.2 From cc62a7eb6396e8be95b9a30053ed09191818b99b Mon Sep 17 00:00:00 2001 From: Kirill Smelkov Date: Sun, 3 Jul 2011 20:36:57 +0400 Subject: USB: EHCI: Allow users to override 80% max periodic bandwidth There are cases, when 80% max isochronous bandwidth is too limiting. For example I have two USB video capture cards which stream uncompressed video, and to stream full NTSC + PAL videos we'd need NTSC 640x480 YUV422 @30fps ~17.6 MB/s PAL 720x576 YUV422 @25fps ~19.7 MB/s isoc bandwidth. Now, due to limited alt settings in capture devices NTSC one ends up streaming with max_pkt_size=2688 and PAL with max_pkt_size=2892, both with interval=1. In terms of microframe time allocation this gives NTSC ~53us PAL ~57us and together ~110us > 100us == 80% of 125us uframe time. So those two devices can't work together simultaneously because the'd over allocate isochronous bandwidth. 80% seemed a bit arbitrary to me, and I've tried to raise it to 90% and both devices started to work together, so I though sometimes it would be a good idea for users to override hardcoded default of max 80% isoc bandwidth. After all, isn't it a user who should decide how to load the bus? If I can live with 10% or even 5% bulk bandwidth that should be ok. I'm a USB newcomer, but that 80% set in stone by USB 2.0 specification seems to be chosen pretty arbitrary to me, just to serve as a reasonable default. NOTE 1 ~~~~~~ for two streams with max_pkt_size=3072 (worst case) both time allocation would be 60us+60us=120us which is 96% periodic bandwidth leaving 4% for bulk and control. Alan Stern suggested that bulk then would be problematic (less than 300*8 bittimes left per microframe), but I think that is still enough for control traffic. NOTE 2 ~~~~~~ Sarah Sharp expressed concern that maxing out periodic bandwidth could lead to vendor-specific hardware bugs on host controllers, because > It's entirely possible that you'll run into > vendor-specific bugs if you try to pack the schedule with isochronous > transfers. I don't think any hardware designer would seriously test or > validate their hardware with a schedule that is basically a violation of > the USB bus spec (more than 80% for periodic transfers). So far I've only tested this patch on my HP Mini 5103 with N10 chipset kirr@mini:~$ lspci 00:00.0 Host bridge: Intel Corporation N10 Family DMI Bridge 00:02.0 VGA compatible controller: Intel Corporation N10 Family Integrated Graphics Controller 00:02.1 Display controller: Intel Corporation N10 Family Integrated Graphics Controller 00:1b.0 Audio device: Intel Corporation N10/ICH 7 Family High Definition Audio Controller (rev 02) 00:1c.0 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 1 (rev 02) 00:1c.3 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 4 (rev 02) 00:1d.0 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #1 (rev 02) 00:1d.1 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 (rev 02) 00:1d.2 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 (rev 02) 00:1d.3 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 (rev 02) 00:1d.7 USB Controller: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller (rev 02) 00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev e2) 00:1f.0 ISA bridge: Intel Corporation NM10 Family LPC Controller (rev 02) 00:1f.2 SATA controller: Intel Corporation N10/ICH7 Family SATA AHCI Controller (rev 02) 01:00.0 Network controller: Broadcom Corporation BCM4313 802.11b/g/n Wireless LAN Controller (rev 01) 02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8059 PCI-E Gigabit Ethernet Controller (rev 11) and the system works stable with 110us/uframe (~88%) isoc bandwith allocated for above-mentioned isochronous transfers. NOTE 3 ~~~~~~ This feature is off by default. I mean max periodic bandwidth is set to 100us/uframe by default exactly as it was before the patch. So only those of us who need the extreme settings are taking the risk - normal users who do not alter uframe_periodic_max sysfs attribute should not see any change at all. NOTE 4 ~~~~~~ I've tried to update documentation in Documentation/ABI/ thoroughly, but only "TBD" was put into Documentation/usb/ehci.txt -- the text there seems to be outdated and much needing refreshing, before it could be amended. Cc: Sarah Sharp Signed-off-by: Kirill Smelkov Acked-by: Alan Stern Signed-off-by: Greg Kroah-Hartman diff --git a/Documentation/ABI/testing/sysfs-module b/Documentation/ABI/testing/sysfs-module index cfcec3b..9489ea8 100644 --- a/Documentation/ABI/testing/sysfs-module +++ b/Documentation/ABI/testing/sysfs-module @@ -10,3 +10,26 @@ KernelVersion: 2.6.35 Contact: masa-korg@dsn.okisemi.com Description: Write/read Option ROM data. + +What: /sys/module/ehci_hcd/drivers/.../uframe_periodic_max +Date: July 2011 +KernelVersion: 3.1 +Contact: Kirill Smelkov +Description: Maximum time allowed for periodic transfers per microframe (μs) + + [ USB 2.0 sets maximum allowed time for periodic transfers per + microframe to be 80%, that is 100 microseconds out of 125 + microseconds (full microframe). + + However there are cases, when 80% max isochronous bandwidth is + too limiting. For example two video streams could require 110 + microseconds of isochronous bandwidth per microframe to work + together. ] + + Through this setting it is possible to raise the limit so that + the host controller would allow allocating more than 100 + microseconds of periodic bandwidth per microframe. + + Beware, non-standard modes are usually not thoroughly tested by + hardware designers, and the hardware can malfunction when this + setting differ from default 100. diff --git a/Documentation/usb/ehci.txt b/Documentation/usb/ehci.txt index 9dcafa7..160bd6c 100644 --- a/Documentation/usb/ehci.txt +++ b/Documentation/usb/ehci.txt @@ -210,3 +210,5 @@ TBD: Interrupt and ISO transfer performance issues. Those periodic transfers are fully scheduled, so the main issue is likely to be how to trigger "high bandwidth" modes. +TBD: More than standard 80% periodic bandwidth allocation is possible +through sysfs uframe_periodic_max parameter. Describe that. diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 8306155..4ee62be 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -572,6 +572,12 @@ static int ehci_init(struct usb_hcd *hcd) hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); /* + * by default set standard 80% (== 100 usec/uframe) max periodic + * bandwidth as required by USB 2.0 + */ + ehci->uframe_periodic_max = 100; + + /* * hw default: 1K periodic list heads, one per frame. * periodic_size can shrink by USBCMD update if hcc_params allows. */ diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index 6c9fbe3..2abf854 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c @@ -172,7 +172,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) } } #ifdef DEBUG - if (usecs > 100) + if (usecs > ehci->uframe_periodic_max) ehci_err (ehci, "uframe %d sched overrun: %d usecs\n", frame * 8 + uframe, usecs); #endif @@ -709,11 +709,8 @@ static int check_period ( if (uframe >= 8) return 0; - /* - * 80% periodic == 100 usec/uframe available - * convert "usecs we need" to "max already claimed" - */ - usecs = 100 - usecs; + /* convert "usecs we need" to "max already claimed" */ + usecs = ehci->uframe_periodic_max - usecs; /* we "know" 2 and 4 uframe intervals were rejected; so * for period 0, check _every_ microframe in the schedule. @@ -1286,9 +1283,9 @@ itd_slot_ok ( { uframe %= period; do { - /* can't commit more than 80% periodic == 100 usec */ + /* can't commit more than uframe_periodic_max usec */ if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7) - > (100 - usecs)) + > (ehci->uframe_periodic_max - usecs)) return 0; /* we know urb->interval is 2^N uframes */ @@ -1345,7 +1342,7 @@ sitd_slot_ok ( #endif /* check starts (OUT uses more than one) */ - max_used = 100 - stream->usecs; + max_used = ehci->uframe_periodic_max - stream->usecs; for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) { if (periodic_usecs (ehci, frame, uf) > max_used) return 0; @@ -1354,7 +1351,7 @@ sitd_slot_ok ( /* for IN, check CSPLIT */ if (stream->c_usecs) { uf = uframe & 7; - max_used = 100 - stream->c_usecs; + max_used = ehci->uframe_periodic_max - stream->c_usecs; do { tmp = 1 << uf; tmp <<= 8; diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c index 29824a9..14ced00 100644 --- a/drivers/usb/host/ehci-sysfs.c +++ b/drivers/usb/host/ehci-sysfs.c @@ -74,21 +74,117 @@ static ssize_t store_companion(struct device *dev, } static DEVICE_ATTR(companion, 0644, show_companion, store_companion); + +/* + * Display / Set uframe_periodic_max + */ +static ssize_t show_uframe_periodic_max(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ehci_hcd *ehci; + int n; + + ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); + n = scnprintf(buf, PAGE_SIZE, "%d\n", ehci->uframe_periodic_max); + return n; +} + + +static ssize_t store_uframe_periodic_max(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct ehci_hcd *ehci; + unsigned uframe_periodic_max; + unsigned frame, uframe; + unsigned short allocated_max; + unsigned long flags; + ssize_t ret; + + ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); + if (kstrtouint(buf, 0, &uframe_periodic_max) < 0) + return -EINVAL; + + if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) { + ehci_info(ehci, "rejecting invalid request for " + "uframe_periodic_max=%u\n", uframe_periodic_max); + return -EINVAL; + } + + ret = -EINVAL; + + /* + * lock, so that our checking does not race with possible periodic + * bandwidth allocation through submitting new urbs. + */ + spin_lock_irqsave (&ehci->lock, flags); + + /* + * for request to decrease max periodic bandwidth, we have to check + * every microframe in the schedule to see whether the decrease is + * possible. + */ + if (uframe_periodic_max < ehci->uframe_periodic_max) { + allocated_max = 0; + + for (frame = 0; frame < ehci->periodic_size; ++frame) + for (uframe = 0; uframe < 7; ++uframe) + allocated_max = max(allocated_max, + periodic_usecs (ehci, frame, uframe)); + + if (allocated_max > uframe_periodic_max) { + ehci_info(ehci, + "cannot decrease uframe_periodic_max becase " + "periodic bandwidth is already allocated " + "(%u > %u)\n", + allocated_max, uframe_periodic_max); + goto out_unlock; + } + } + + /* increasing is always ok */ + + ehci_info(ehci, "setting max periodic bandwidth to %u%% " + "(== %u usec/uframe)\n", + 100*uframe_periodic_max/125, uframe_periodic_max); + + if (uframe_periodic_max != 100) + ehci_warn(ehci, "max periodic bandwidth set is non-standard\n"); + + ehci->uframe_periodic_max = uframe_periodic_max; + ret = count; + +out_unlock: + spin_unlock_irqrestore (&ehci->lock, flags); + return ret; +} +static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max); + + static inline int create_sysfs_files(struct ehci_hcd *ehci) { + struct device *controller = ehci_to_hcd(ehci)->self.controller; int i = 0; /* with integrated TT there is no companion! */ if (!ehci_is_TDI(ehci)) - i = device_create_file(ehci_to_hcd(ehci)->self.controller, - &dev_attr_companion); + i = device_create_file(controller, &dev_attr_companion); + if (i) + goto out; + + i = device_create_file(controller, &dev_attr_uframe_periodic_max); +out: return i; } static inline void remove_sysfs_files(struct ehci_hcd *ehci) { + struct device *controller = ehci_to_hcd(ehci)->self.controller; + /* with integrated TT there is no companion! */ if (!ehci_is_TDI(ehci)) - device_remove_file(ehci_to_hcd(ehci)->self.controller, - &dev_attr_companion); + device_remove_file(controller, &dev_attr_companion); + + device_remove_file(controller, &dev_attr_uframe_periodic_max); } diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index bd6ff48..fa3129fe 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -87,6 +87,8 @@ struct ehci_hcd { /* one per controller */ union ehci_shadow *pshadow; /* mirror hw periodic table */ int next_uframe; /* scan periodic, start here */ unsigned periodic_sched; /* periodic activity count */ + unsigned uframe_periodic_max; /* max periodic time per uframe */ + /* list of itds & sitds completed while clock_frame was still active */ struct list_head cached_itd_list; -- cgit v0.10.2 From 03c75362181b0b1d6a330e7cf8def10ba988dfbe Mon Sep 17 00:00:00 2001 From: Anisse Astier Date: Tue, 5 Jul 2011 16:38:45 +0200 Subject: ehci: refactor pci quirk to use standard dmi_check_system method In commit 3610ea5397b80822e417aaa0e706fd803fb05680 (ehci: workaround for pci quirk timeout on ExoPC), a workaround was added to skip the negociation for the handoff of the EHCI controller. Refactor the DMI detection code to use standard dmi_check_system function. Signed-off-by: Anisse Astier Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index fd93061..04600a9 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c @@ -507,20 +507,27 @@ static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev) iounmap(base); } +static const struct dmi_system_id __initconst ehci_dmi_nohandoff_table[] = { + { + /* Pegatron Lucid (ExoPC) */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "EXOPG06411"), + DMI_MATCH(DMI_BIOS_VERSION, "Lucid-CE-133"), + }, + }, + { } +}; + static void __devinit ehci_bios_handoff(struct pci_dev *pdev, void __iomem *op_reg_base, u32 cap, u8 offset) { int try_handoff = 1, tried_handoff = 0; - /* The Pegatron Lucid (ExoPC) tablet sporadically waits for 90 - * seconds trying the handoff on its unused controller. Skip - * it. */ + /* The Pegatron Lucid tablet sporadically waits for 98 seconds trying + * the handoff on its unused controller. Skip it. */ if (pdev->vendor == 0x8086 && pdev->device == 0x283a) { - const char *dmi_bn = dmi_get_system_info(DMI_BOARD_NAME); - const char *dmi_bv = dmi_get_system_info(DMI_BIOS_VERSION); - if (dmi_bn && !strcmp(dmi_bn, "EXOPG06411") && - dmi_bv && !strcmp(dmi_bv, "Lucid-CE-133")) + if (dmi_check_system(ehci_dmi_nohandoff_table)) try_handoff = 0; } -- cgit v0.10.2 From 0c42a4e84502533ec40544324debe2a62836ae11 Mon Sep 17 00:00:00 2001 From: Anisse Astier Date: Tue, 5 Jul 2011 16:38:46 +0200 Subject: ehci: add pci quirk for Ordissimo and RM Slate 100 too Add another variant of the Pegatron tablet used by Ordissimo, and apparently RM Slate 100, to the list of models that should skip the negociation for the handoff of the EHCI controller. Signed-off-by: Anisse Astier Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index 04600a9..b5a7304 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c @@ -515,6 +515,13 @@ static const struct dmi_system_id __initconst ehci_dmi_nohandoff_table[] = { DMI_MATCH(DMI_BIOS_VERSION, "Lucid-CE-133"), }, }, + { + /* Pegatron Lucid (Ordissimo AIRIS) */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "M11JB"), + DMI_MATCH(DMI_BIOS_VERSION, "Lucid-GE-133"), + }, + }, { } }; -- cgit v0.10.2 From 004c19682884d4f40000ce1ded53f4a1d0b18206 Mon Sep 17 00:00:00 2001 From: Alan Stern Date: Tue, 5 Jul 2011 12:34:05 -0400 Subject: USB: EHCI: go back to using the system clock for QH unlinks This patch (as1477) fixes a problem affecting a few types of EHCI controller. Contrary to what one might expect, these controllers automatically stop their internal frame counter when no ports are enabled. Since ehci-hcd currently relies on the frame counter for determining when it should unlink QHs from the async schedule, those controllers run into trouble: The frame counter stops and the QHs never get unlinked. Some systems have also experienced other problems traced back to commit b963801164618e25fbdc0cd452ce49c3628b46c8 (USB: ehci-hcd unlink speedups), which made the original switch from using the system clock to using the frame counter. It never became clear what the reason was for these problems, but evidently it is related to use of the frame counter. To fix all these problems, this patch more or less reverts that commit and goes back to using the system clock. But this can't be done cleanly because other changes have since been made to the scan_async() subroutine. One of these changes involved the tricky logic that tries to avoid rescanning QHs that have already been seen when the scanning loop is restarted, which happens whenever an URB is given back. Switching back to clock-based unlinks would make this logic even more complicated. Therefore the new code doesn't rescan the entire async list whenever a giveback occurs. Instead it rescans only the current QH and continues on from there. This requires the use of a separate pointer to keep track of the next QH to scan, since the current QH may be unlinked while the scanning is in progress. That new pointer must be global, so that it can be adjusted forward whenever the _next_ QH gets unlinked. (uhci-hcd uses this same trick.) Simplification of the scanning loop removes a level of indentation, which accounts for the size of the patch. The amount of code changed is relatively small, and it isn't exactly a reversion of the b963801164 commit. This fixes Bugzilla #32432. Signed-off-by: Alan Stern CC: Tested-by: Matej Kenda Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 4ee62be..2902199 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -90,7 +90,8 @@ static const char hcd_name [] = "ehci_hcd"; #define EHCI_IAA_MSECS 10 /* arbitrary */ #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ -#define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */ +#define EHCI_SHRINK_JIFFIES (DIV_ROUND_UP(HZ, 200) + 1) + /* 200-ms async qh unlink delay */ /* Initial IRQ latency: faster than hw default */ static int log2_irq_thresh = 0; // 0 to 6 @@ -148,10 +149,7 @@ timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action) break; /* case TIMER_ASYNC_SHRINK: */ default: - /* add a jiffie since we synch against the - * 8 KHz uframe counter. - */ - t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1; + t = EHCI_SHRINK_JIFFIES; break; } mod_timer(&ehci->watchdog, t + jiffies); diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 5d6bc62..9bf3c0d 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -1231,6 +1231,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) prev->hw->hw_next = qh->hw->hw_next; prev->qh_next = qh->qh_next; + if (ehci->qh_scan_next == qh) + ehci->qh_scan_next = qh->qh_next.qh; wmb (); /* If the controller isn't running, we don't have to wait for it */ @@ -1256,53 +1258,49 @@ static void scan_async (struct ehci_hcd *ehci) struct ehci_qh *qh; enum ehci_timer_action action = TIMER_IO_WATCHDOG; - ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index); timer_action_done (ehci, TIMER_ASYNC_SHRINK); -rescan: stopped = !HC_IS_RUNNING(ehci_to_hcd(ehci)->state); - qh = ehci->async->qh_next.qh; - if (likely (qh != NULL)) { - do { - /* clean any finished work for this qh */ - if (!list_empty(&qh->qtd_list) && (stopped || - qh->stamp != ehci->stamp)) { - int temp; - - /* unlinks could happen here; completion - * reporting drops the lock. rescan using - * the latest schedule, but don't rescan - * qhs we already finished (no looping) - * unless the controller is stopped. - */ - qh = qh_get (qh); - qh->stamp = ehci->stamp; - temp = qh_completions (ehci, qh); - if (qh->needs_rescan) - unlink_async(ehci, qh); - qh_put (qh); - if (temp != 0) { - goto rescan; - } - } - /* unlink idle entries, reducing DMA usage as well - * as HCD schedule-scanning costs. delay for any qh - * we just scanned, there's a not-unusual case that it - * doesn't stay idle for long. - * (plus, avoids some kind of re-activation race.) + ehci->qh_scan_next = ehci->async->qh_next.qh; + while (ehci->qh_scan_next) { + qh = ehci->qh_scan_next; + ehci->qh_scan_next = qh->qh_next.qh; + rescan: + /* clean any finished work for this qh */ + if (!list_empty(&qh->qtd_list)) { + int temp; + + /* + * Unlinks could happen here; completion reporting + * drops the lock. That's why ehci->qh_scan_next + * always holds the next qh to scan; if the next qh + * gets unlinked then ehci->qh_scan_next is adjusted + * in start_unlink_async(). */ - if (list_empty(&qh->qtd_list) - && qh->qh_state == QH_STATE_LINKED) { - if (!ehci->reclaim && (stopped || - ((ehci->stamp - qh->stamp) & 0x1fff) - >= EHCI_SHRINK_FRAMES * 8)) - start_unlink_async(ehci, qh); - else - action = TIMER_ASYNC_SHRINK; - } + qh = qh_get(qh); + temp = qh_completions(ehci, qh); + if (qh->needs_rescan) + unlink_async(ehci, qh); + qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES; + qh_put(qh); + if (temp != 0) + goto rescan; + } - qh = qh->qh_next.qh; - } while (qh); + /* unlink idle entries, reducing DMA usage as well + * as HCD schedule-scanning costs. delay for any qh + * we just scanned, there's a not-unusual case that it + * doesn't stay idle for long. + * (plus, avoids some kind of re-activation race.) + */ + if (list_empty(&qh->qtd_list) + && qh->qh_state == QH_STATE_LINKED) { + if (!ehci->reclaim && (stopped || + time_after_eq(jiffies, qh->unlink_time))) + start_unlink_async(ehci, qh); + else + action = TIMER_ASYNC_SHRINK; + } } if (action == TIMER_ASYNC_SHRINK) timer_action (ehci, TIMER_ASYNC_SHRINK); diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index fa3129fe..e4feec3 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -75,6 +75,7 @@ struct ehci_hcd { /* one per controller */ struct ehci_qh *async; struct ehci_qh *dummy; /* For AMD quirk use */ struct ehci_qh *reclaim; + struct ehci_qh *qh_scan_next; unsigned scanning : 1; /* periodic schedule support */ @@ -119,7 +120,6 @@ struct ehci_hcd { /* one per controller */ struct timer_list iaa_watchdog; struct timer_list watchdog; unsigned long actions; - unsigned stamp; unsigned periodic_stamp; unsigned random_frame; unsigned long next_statechange; @@ -345,6 +345,7 @@ struct ehci_qh { struct ehci_qh *reclaim; /* next to reclaim */ struct ehci_hcd *ehci; + unsigned long unlink_time; /* * Do NOT use atomic operations for QH refcounting. On some CPUs -- cgit v0.10.2 From 8dec92b24064f1ffbb6537ba97729b633b400c28 Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Thu, 7 Jul 2011 09:28:21 +0200 Subject: USB: mon: Allow to use usbmon without debugfs Do not bail out with an error in mon_text_init() if debugfs is not available, instead just return 0 and let mon_init() go ahead with loading the binary API. Return -ENOMEM in case debugfs_create_dir() fails for other reasons. Later, it is enough to check for mon_dir not set. Signed-off-by: Tobias Klauser Signed-off-by: Pete Zaitcev Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/mon/mon_text.c b/drivers/usb/mon/mon_text.c index c302e19..1c3afcc 100644 --- a/drivers/usb/mon/mon_text.c +++ b/drivers/usb/mon/mon_text.c @@ -670,6 +670,9 @@ int mon_text_add(struct mon_bus *mbus, const struct usb_bus *ubus) int busnum = ubus? ubus->busnum: 0; int rc; + if (mon_dir == NULL) + return 0; + if (ubus != NULL) { rc = snprintf(name, NAMESZ, "%dt", busnum); if (rc <= 0 || rc >= NAMESZ) @@ -740,12 +743,12 @@ int __init mon_text_init(void) mondir = debugfs_create_dir("usbmon", usb_debug_root); if (IS_ERR(mondir)) { - printk(KERN_NOTICE TAG ": debugfs is not available\n"); - return -ENODEV; + /* debugfs not available, but we can use usbmon without it */ + return 0; } if (mondir == NULL) { printk(KERN_NOTICE TAG ": unable to create usbmon directory\n"); - return -ENODEV; + return -ENOMEM; } mon_dir = mondir; return 0; -- cgit v0.10.2 From 81463c1d707186adbbe534016cd1249edeab0dac Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 6 Jul 2011 23:19:38 +0400 Subject: EHCI: only power off port if over-current is active MAX4967 USB power supply chip we use on our boards signals over-current when power is not enabled; once it's enabled, over-current signal returns to normal. That unfortunately caused the endless stream of "over-current change on port" messages. The EHCI root hub code reacts on every over-current signal change with powering off the port -- such change event is generated the moment the port power is enabled, so once enabled the power is immediately cut off. I think we should only cut off power when we're seeing the active over-current signal, so I'm adding such check to that code. I also think that the fact that we've cut off the port power should be reflected in the result of GetPortStatus request immediately, hence I'm adding a PORTSCn register readback after write... Signed-off-by: Sergei Shtylyov Cc: stable@kernel.org Acked-by: Alan Stern Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index d9e8d71..bf2c8f6 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -816,10 +816,11 @@ static int ehci_hub_control ( * power switching; they're allowed to just limit the * current. khubd will turn the power back on. */ - if (HCS_PPC (ehci->hcs_params)){ + if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_POWER), status_reg); + temp = ehci_readl(ehci, status_reg); } } -- cgit v0.10.2 From f2e9039a43b01f01cab9dfaea2cad5f304fb3343 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:57:10 +0900 Subject: usb: r8a66597-hcd: add function for external controller R8A66597 has the pin of WR0 and WR1. So, if one write-pin of CPU connects to the pins, we have to change the setting of FIFOSEL register in the controller. If we don't change the setting, the controller cannot send the data of odd length. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index db6f8b9..cc8ba3c 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -1438,7 +1438,7 @@ static void packet_write(struct r8a66597 *r8a66597, u16 pipenum) if (pipenum > 0) r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS); if (urb->transfer_buffer) { - r8a66597_write_fifo(r8a66597, td->pipe->fifoaddr, buf, size); + r8a66597_write_fifo(r8a66597, td->pipe, buf, size); if (!usb_pipebulk(urb->pipe) || td->maxpacket != size) r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr); } diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 25563e9..f28782d 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h @@ -201,11 +201,26 @@ static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, iowrite16(val, r8a66597->reg + offset); } +static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, + u16 val, u16 pat, unsigned long offset) +{ + u16 tmp; + tmp = r8a66597_read(r8a66597, offset); + tmp = tmp & (~pat); + tmp = tmp | val; + r8a66597_write(r8a66597, tmp, offset); +} + +#define r8a66597_bclr(r8a66597, val, offset) \ + r8a66597_mdfy(r8a66597, 0, val, offset) +#define r8a66597_bset(r8a66597, val, offset) \ + r8a66597_mdfy(r8a66597, val, 0, offset) + static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, - unsigned long offset, u16 *buf, + struct r8a66597_pipe *pipe, u16 *buf, int len) { - void __iomem *fifoaddr = r8a66597->reg + offset; + void __iomem *fifoaddr = r8a66597->reg + pipe->fifoaddr; unsigned long count; unsigned char *pb; int i; @@ -230,26 +245,15 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, iowrite16_rep(fifoaddr, buf, len); if (unlikely(odd)) { buf = &buf[len]; + if (r8a66597->pdata->wr0_shorted_to_wr1) + r8a66597_bclr(r8a66597, MBW_16, pipe->fifosel); iowrite8((unsigned char)*buf, fifoaddr); + if (r8a66597->pdata->wr0_shorted_to_wr1) + r8a66597_bset(r8a66597, MBW_16, pipe->fifosel); } } } -static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, - u16 val, u16 pat, unsigned long offset) -{ - u16 tmp; - tmp = r8a66597_read(r8a66597, offset); - tmp = tmp & (~pat); - tmp = tmp | val; - r8a66597_write(r8a66597, tmp, offset); -} - -#define r8a66597_bclr(r8a66597, val, offset) \ - r8a66597_mdfy(r8a66597, 0, val, offset) -#define r8a66597_bset(r8a66597, val, offset) \ - r8a66597_mdfy(r8a66597, val, 0, offset) - static inline unsigned long get_syscfg_reg(int port) { return port == 0 ? SYSCFG0 : SYSCFG1; diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h index 26d2167..30e1716 100644 --- a/include/linux/usb/r8a66597.h +++ b/include/linux/usb/r8a66597.h @@ -42,6 +42,9 @@ struct r8a66597_platdata { /* set one = big endian, set zero = little endian */ unsigned endian:1; + + /* (external controller only) set one = WR0_N shorted to WR1_N */ + unsigned wr0_shorted_to_wr1:1; }; /* Register definitions */ -- cgit v0.10.2 From 45304e8cd9d9df07e9221551678262b390bdaaa4 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:58:56 +0900 Subject: usb: update email address in ohci-sh and r8a66597-hcd Signed-off-by: Yoshihiro Shimoda Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/ohci-sh.c b/drivers/usb/host/ohci-sh.c index f47867f..14cecb5 100644 --- a/drivers/usb/host/ohci-sh.c +++ b/drivers/usb/host/ohci-sh.c @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index cc8ba3c..1ba53f0 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -6,7 +6,7 @@ * Portions Copyright (C) 2004-2005 David Brownell * Portions Copyright (C) 1999 Roman Weissgaerber * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h index 30e1716..f77c4eb 100644 --- a/include/linux/usb/r8a66597.h +++ b/include/linux/usb/r8a66597.h @@ -3,7 +3,7 @@ * * Copyright (C) 2009 Renesas Solutions Corp. * - * Author : Yoshihiro Shimoda + * Author : Yoshihiro Shimoda * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- cgit v0.10.2 From 233f519d273454e3e804e21363d5ef0bd031acfe Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 7 Jul 2011 00:23:24 -0700 Subject: usb: renesas_usbhs: fixup comment-out This patch add/modify comment-out of renesas_usbhs. On this process, usbhs_pkt_init was moved because it was placed under usbhsf_null_handler which has no relationship it Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c index 665259a..d8239e5 100644 --- a/drivers/usb/renesas_usbhs/common.c +++ b/drivers/usb/renesas_usbhs/common.c @@ -21,6 +21,29 @@ #include #include "./common.h" +/* + * image of renesas_usbhs + * + * ex) gadget case + + * mod.c + * mod_gadget.c + * mod_host.c pipe.c fifo.c + * + * +-------+ +-----------+ + * | pipe0 |------>| fifo pio | + * +------------+ +-------+ +-----------+ + * | mod_gadget |=====> | pipe1 |--+ + * +------------+ +-------+ | +-----------+ + * | pipe2 | | +-| fifo dma0 | + * +------------+ +-------+ | | +-----------+ + * | mod_host | | pipe3 |<-|--+ + * +------------+ +-------+ | +-----------+ + * | .... | +--->| fifo dma1 | + * | .... | +-----------+ + */ + + #define USBHSF_RUNTIME_PWCTRL (1 << 0) /* status */ diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 021695d..237e8b1 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -26,7 +26,16 @@ #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ /* - * packet info function + * packet initialize + */ +void usbhs_pkt_init(struct usbhs_pkt *pkt) +{ + pkt->dma = DMA_ADDR_INVALID; + INIT_LIST_HEAD(&pkt->node); +} + +/* + * packet control function */ static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) { @@ -43,12 +52,6 @@ static struct usbhs_pkt_handle usbhsf_null_handler = { .try_run = usbhsf_null_handle, }; -void usbhs_pkt_init(struct usbhs_pkt *pkt) -{ - pkt->dma = DMA_ADDR_INVALID; - INIT_LIST_HEAD(&pkt->node); -} - void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, struct usbhs_pkt_handle *handler, void *buf, int len, int zero) @@ -293,7 +296,7 @@ static int usbhsf_fifo_select(struct usbhs_pipe *pipe, } /* - * PIO fifo functions + * PIO push handler */ static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) { @@ -395,6 +398,9 @@ struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { .try_run = usbhsf_pio_try_push, }; +/* + * PIO pop handler + */ static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; @@ -497,7 +503,7 @@ struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { }; /* - * handler function + * DCP ctrol statge handler */ static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) { @@ -614,6 +620,9 @@ static void usbhsf_dma_prepare_tasklet(unsigned long data) dma_async_issue_pending(chan); } +/* + * DMA push handler + */ static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; @@ -686,6 +695,9 @@ struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { .dma_done = usbhsf_dma_push_done, }; +/* + * DMA pop handler + */ static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) { struct usbhs_pipe *pipe = pkt->pipe; diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 9a8e2e9..cc3ad63 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -114,7 +114,7 @@ struct usbhsg_recip_handle { #define usbhsg_status_has(gp, b) (gp->status & b) /* - * list push/pop + * queue push/pop */ static void usbhsg_queue_push(struct usbhsg_uep *uep, struct usbhsg_request *ureq) @@ -160,6 +160,9 @@ static void usbhsg_queue_done(struct usbhs_pkt *pkt) usbhsg_queue_pop(uep, ureq, 0); } +/* + * dma map/unmap + */ static int usbhsg_dma_map(struct device *dev, struct usbhs_pkt *pkt, enum dma_data_direction dir) @@ -473,6 +476,11 @@ static int usbhsg_ep_enable(struct usb_ep *ep, uep->pipe = pipe; pipe->mod_private = uep; + /* + * usbhs_fifo_dma_push/pop_handler try to + * use dmaengine if possible. + * It will use pio handler if impossible. + */ if (usb_endpoint_dir_in(desc)) uep->handler = &usbhs_fifo_dma_push_handler; else -- cgit v0.10.2 From 030ed1fcb0279953d142665e89bb89ecfb0960f6 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 7 Jul 2011 02:17:37 -0700 Subject: usb: renesas_usbhs: compile/config are rescued This patch rescues renesas_usbhs compile from commit 193ab2a (usb: gadget: allow multiple gadgets to be built) CONFIG_USB_RENESAS_USBHS compile renesas_usbhs main code which is shared between Host/Gadget. CONFIG_USB_RENESAS_USBHS_UDC add mod_gadget to it. It had lost USB_GADGET_DUALSPEED Signed-off-by: Kuninori Morimoto Signed-off-by: Felipe Balbi Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 8cd999a..48f1781 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -118,6 +118,8 @@ source "drivers/usb/host/Kconfig" source "drivers/usb/musb/Kconfig" +source "drivers/usb/renesas_usbhs/Kconfig" + source "drivers/usb/class/Kconfig" source "drivers/usb/storage/Kconfig" diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 46a253a..b5b8d67 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -215,9 +215,11 @@ config USB_R8A66597 dynamically linked module called "r8a66597_udc" and force all gadget drivers to also be dynamically linked. -config USB_RENESAS_USBHS +config USB_RENESAS_USBHS_UDC tristate 'Renesas USBHS controller' depends on SUPERH || ARCH_SHMOBILE + depends on USB_RENESAS_USBHS + select USB_GADGET_DUALSPEED help Renesas USBHS is a discrete USB host and peripheral controller chip that supports both full and high speed USB 2.0 data transfers. diff --git a/drivers/usb/renesas_usbhs/Kconfig b/drivers/usb/renesas_usbhs/Kconfig new file mode 100644 index 0000000..286cbf1 --- /dev/null +++ b/drivers/usb/renesas_usbhs/Kconfig @@ -0,0 +1,15 @@ +# +# Renesas USBHS Controller Drivers +# + +config USB_RENESAS_USBHS + tristate 'Renesas USBHS controller' + depends on SUPERH || ARCH_SHMOBILE + default n + help + Renesas USBHS is a discrete USB host and peripheral controller chip + that supports both full and high speed USB 2.0 data transfers. + It has nine or more configurable endpoints, and endpoint zero. + + Say "y" to link the driver statically, or "m" to build a + dynamically linked module called "renesas_usbhs" -- cgit v0.10.2 From 35da41375caabe5433e6d20ab1ec087bd31d12b1 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 7 Jul 2011 02:36:32 -0700 Subject: usb: r8a66597-hcd: fixup USB_PORT_STAT_C_SUSPEND shift This is typo fix of 749da5f8 (USB: straighten out port feature vs. port status usage) Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 1ba53f0..fd35901 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -2306,7 +2306,7 @@ static int r8a66597_bus_resume(struct usb_hcd *hcd) dbg("resume port = %d", port); rh->port &= ~USB_PORT_STAT_SUSPEND; - rh->port |= USB_PORT_STAT_C_SUSPEND < 16; + rh->port |= USB_PORT_STAT_C_SUSPEND << 16; r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg); msleep(50); r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg); -- cgit v0.10.2 From 8d48fdf689fed2c73c493e5146d1463689246442 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Sroczy=C5=84ski?= Date: Tue, 5 Jul 2011 21:53:35 +0200 Subject: USB: PL2303: correctly handle baudrates above 115200 PL2303: correctly handle baudrates above 115200 Signed-off-by: Michal Sroczynski Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c index 30461fc..ee28115 100644 --- a/drivers/usb/serial/pl2303.c +++ b/drivers/usb/serial/pl2303.c @@ -342,10 +342,28 @@ static void pl2303_set_termios(struct tty_struct *tty, baud = 6000000; } dbg("%s - baud set = %d", __func__, baud); - buf[0] = baud & 0xff; - buf[1] = (baud >> 8) & 0xff; - buf[2] = (baud >> 16) & 0xff; - buf[3] = (baud >> 24) & 0xff; + if (baud <= 115200) { + buf[0] = baud & 0xff; + buf[1] = (baud >> 8) & 0xff; + buf[2] = (baud >> 16) & 0xff; + buf[3] = (baud >> 24) & 0xff; + } else { + /* apparently the formula for higher speeds is: + * baudrate = 12M * 32 / (2^buf[1]) / buf[0] + */ + unsigned tmp = 12*1000*1000*32 / baud; + buf[3] = 0x80; + buf[2] = 0; + buf[1] = (tmp >= 256); + while (tmp >= 256) { + tmp >>= 2; + buf[1] <<= 1; + } + if (tmp > 256) { + tmp %= 256; + } + buf[0] = tmp; + } } /* For reference buf[4]=0 is 1 stop bits */ -- cgit v0.10.2 From 27760f868663310ff9e701f47aec33da3b906f34 Mon Sep 17 00:00:00 2001 From: "Hans J. Koch" Date: Thu, 7 Jul 2011 23:11:38 +0200 Subject: uio: uio_pdrv_genirq: Add OF support Adding OF binding to genirq. Version string is setup to the "devicetree". Compatible string is not setup for now but you can add your custom compatible string to uio_of_genirq_match structure. For example with "vendor,device" compatible string: static const struct of_device_id __devinitconst uio_of_genirq_match[] = { { .compatible = "vendor,device", }, { /* empty for now */ }, }; Signed-off-by: Michal Simek Signed-off-by: Hans J. Koch Reviewed-by: Wolfram Sang CC: Hans J. Koch CC: Arnd Bergmann CC: John Williams CC: Grant Likely CC: Wolfram Sang Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c index 0f424af..f8f81db 100644 --- a/drivers/uio/uio_pdrv_genirq.c +++ b/drivers/uio/uio_pdrv_genirq.c @@ -23,6 +23,10 @@ #include #include +#include +#include +#include + #define DRIVER_NAME "uio_pdrv_genirq" struct uio_pdrv_genirq_platdata { @@ -97,6 +101,27 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) int ret = -EINVAL; int i; + if (!uioinfo) { + int irq; + + /* alloc uioinfo for one device */ + uioinfo = kzalloc(sizeof(*uioinfo), GFP_KERNEL); + if (!uioinfo) { + ret = -ENOMEM; + dev_err(&pdev->dev, "unable to kmalloc\n"); + goto bad2; + } + uioinfo->name = pdev->dev.of_node->name; + uioinfo->version = "devicetree"; + + /* Multiple IRQs are not supported */ + irq = platform_get_irq(pdev, 0); + if (irq == -ENXIO) + uioinfo->irq = UIO_IRQ_NONE; + else + uioinfo->irq = irq; + } + if (!uioinfo || !uioinfo->name || !uioinfo->version) { dev_err(&pdev->dev, "missing platform_data\n"); goto bad0; @@ -180,6 +205,10 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) kfree(priv); pm_runtime_disable(&pdev->dev); bad0: + /* kfree uioinfo for OF */ + if (pdev->dev.of_node) + kfree(uioinfo); + bad2: return ret; } @@ -193,6 +222,10 @@ static int uio_pdrv_genirq_remove(struct platform_device *pdev) priv->uioinfo->handler = NULL; priv->uioinfo->irqcontrol = NULL; + /* kfree uioinfo for OF */ + if (pdev->dev.of_node) + kfree(priv->uioinfo); + kfree(priv); return 0; } @@ -219,6 +252,15 @@ static const struct dev_pm_ops uio_pdrv_genirq_dev_pm_ops = { .runtime_resume = uio_pdrv_genirq_runtime_nop, }; +#ifdef CONFIG_OF +static const struct of_device_id __devinitconst uio_of_genirq_match[] = { + { /* empty for now */ }, +}; +MODULE_DEVICE_TABLE(of, uio_of_genirq_match); +#else +# define uio_of_genirq_match NULL +#endif + static struct platform_driver uio_pdrv_genirq = { .probe = uio_pdrv_genirq_probe, .remove = uio_pdrv_genirq_remove, @@ -226,6 +268,7 @@ static struct platform_driver uio_pdrv_genirq = { .name = DRIVER_NAME, .owner = THIS_MODULE, .pm = &uio_pdrv_genirq_dev_pm_ops, + .of_match_table = uio_of_genirq_match, }, }; -- cgit v0.10.2 From 9a12d09765b72f7e1642f36d0e3ad2ce61fd31b6 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Jul 2011 17:42:19 -0700 Subject: usb: renesas_usbhs: care buff alignment when dma handler Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 237e8b1..912ce62 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -642,6 +642,9 @@ static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) if (len % 4) /* 32bit alignment */ goto usbhsf_pio_prepare_push; + if (((u32)pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ + goto usbhsf_pio_prepare_push; + /* get enable DMA fifo */ fifo = usbhsf_get_dma_fifo(priv, pkt); if (!fifo) @@ -716,6 +719,9 @@ static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) if (!fifo) goto usbhsf_pio_prepare_pop; + if (((u32)pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ + goto usbhsf_pio_prepare_pop; + ret = usbhsf_fifo_select(pipe, fifo, 0); if (ret < 0) goto usbhsf_pio_prepare_pop; -- cgit v0.10.2 From 4ef85e0f697051829179c4fdeda1bd3f4166dc17 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Jul 2011 17:42:47 -0700 Subject: usb: renesas_usbhs: inaccessible pipe is not an error Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index 912ce62..406893e 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -316,8 +316,11 @@ static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) return 0; ret = usbhs_pipe_is_accessible(pipe); - if (ret < 0) + if (ret < 0) { + /* inaccessible pipe is not an error */ + ret = 0; goto usbhs_fifo_write_busy; + } ret = usbhsf_fifo_barrier(priv, fifo); if (ret < 0) -- cgit v0.10.2 From 3b87218829a4182850cc62f8c0c28abcecfdf8e6 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Jul 2011 17:42:35 -0700 Subject: usb: renesas_usbhs: support multi driver Some SuperH/board has multi USBHS on it. This patch supports multi register for renesas_usbhs Signed-off-by: Kuninori Morimoto Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index cc3ad63..ba79dbf 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c @@ -44,6 +44,7 @@ struct usbhsg_uep { struct usbhsg_gpriv { struct usb_gadget gadget; struct usbhs_mod mod; + struct list_head link; struct usbhsg_uep *uep; int uep_size; @@ -113,6 +114,16 @@ struct usbhsg_recip_handle { #define usbhsg_status_clr(gp, b) (gp->status &= ~b) #define usbhsg_status_has(gp, b) (gp->status & b) +/* controller */ +LIST_HEAD(the_controller_link); + +#define usbhsg_for_each_controller(gpriv)\ + list_for_each_entry(gpriv, &the_controller_link, link) +#define usbhsg_controller_register(gpriv)\ + list_add_tail(&(gpriv)->link, &the_controller_link) +#define usbhsg_controller_unregister(gpriv)\ + list_del_init(&(gpriv)->link) + /* * queue push/pop */ @@ -732,11 +743,10 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status) * linux usb function * */ -struct usbhsg_gpriv *the_controller; static int usbhsg_gadget_start(struct usb_gadget_driver *driver, int (*bind)(struct usb_gadget *)) { - struct usbhsg_gpriv *gpriv = the_controller; + struct usbhsg_gpriv *gpriv; struct usbhs_priv *priv; struct device *dev; int ret; @@ -746,10 +756,17 @@ static int usbhsg_gadget_start(struct usb_gadget_driver *driver, !driver->setup || driver->speed != USB_SPEED_HIGH) return -EINVAL; - if (!gpriv) - return -ENODEV; - if (gpriv->driver) - return -EBUSY; + + /* + * find unused controller + */ + usbhsg_for_each_controller(gpriv) { + if (!gpriv->driver) + goto find_unused_controller; + } + return -ENODEV; + +find_unused_controller: dev = usbhsg_gpriv_to_dev(gpriv); priv = usbhsg_gpriv_to_priv(gpriv); @@ -786,18 +803,25 @@ add_fail: static int usbhsg_gadget_stop(struct usb_gadget_driver *driver) { - struct usbhsg_gpriv *gpriv = the_controller; + struct usbhsg_gpriv *gpriv; struct usbhs_priv *priv; - struct device *dev = usbhsg_gpriv_to_dev(gpriv); - - if (!gpriv) - return -ENODEV; + struct device *dev; if (!driver || - !driver->unbind || - driver != gpriv->driver) + !driver->unbind) return -EINVAL; + /* + * find controller + */ + usbhsg_for_each_controller(gpriv) { + if (gpriv->driver == driver) + goto find_matching_controller; + } + return -ENODEV; + +find_matching_controller: + dev = usbhsg_gpriv_to_dev(gpriv); priv = usbhsg_gpriv_to_priv(gpriv); @@ -919,7 +943,7 @@ int __devinit usbhs_mod_gadget_probe(struct usbhs_priv *priv) } } - the_controller = gpriv; + usbhsg_controller_register(gpriv); ret = usb_add_gadget_udc(dev, &gpriv->gadget); if (ret) @@ -943,6 +967,9 @@ void __devexit usbhs_mod_gadget_remove(struct usbhs_priv *priv) struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); usb_del_gadget_udc(&gpriv->gadget); + + usbhsg_controller_unregister(gpriv); + kfree(gpriv->uep); kfree(gpriv); } -- cgit v0.10.2 From 8ca137562a79f573f822f5a84a4e56a0d8cc6792 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:58:20 +0900 Subject: usb: gadget: r8a66597-udc: add pullup function Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index b8b3005..50991e5 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c @@ -1518,10 +1518,26 @@ static int r8a66597_get_frame(struct usb_gadget *_gadget) return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; } +static int r8a66597_pullup(struct usb_gadget *gadget, int is_on) +{ + struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget); + unsigned long flags; + + spin_lock_irqsave(&r8a66597->lock, flags); + if (is_on) + r8a66597_bset(r8a66597, DPRPU, SYSCFG0); + else + r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); + spin_unlock_irqrestore(&r8a66597->lock, flags); + + return 0; +} + static struct usb_gadget_ops r8a66597_gadget_ops = { .get_frame = r8a66597_get_frame, .start = r8a66597_start, .stop = r8a66597_stop, + .pullup = r8a66597_pullup, }; static int __exit r8a66597_remove(struct platform_device *pdev) -- cgit v0.10.2 From bb59dbff4e5fb0ac14e3ee47d3f688490f128155 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:58:43 +0900 Subject: usb: gadget: m66592-udc: add function for external controller M66592 has the pin of WR0 and WR1. So, if one write-pin of CPU connects to the pins, we have to change the setting of FIFOSEL register in the controller. If we don't change the setting, the controller cannot send the data of odd length. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 40c2f7a..5c9c04d 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c @@ -781,7 +781,7 @@ static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req) /* write fifo */ if (req->req.buf) { if (size > 0) - m66592_write_fifo(m66592, ep->fifoaddr, buf, size); + m66592_write_fifo(m66592, ep, buf, size); if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) m66592_bset(m66592, M66592_BVAL, ep->fifoctr); } @@ -827,7 +827,7 @@ static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req) /* write fifo */ if (req->req.buf) { - m66592_write_fifo(m66592, ep->fifoaddr, buf, size); + m66592_write_fifo(m66592, ep, buf, size); if ((size == 0) || ((size % ep->ep.maxpacket) != 0) || ((bufsize != ep->ep.maxpacket) diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h index b85e05b..7b93d57 100644 --- a/drivers/usb/gadget/m66592-udc.h +++ b/drivers/usb/gadget/m66592-udc.h @@ -561,11 +561,26 @@ static inline void m66592_write(struct m66592 *m66592, u16 val, iowrite16(val, m66592->reg + offset); } +static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, + unsigned long offset) +{ + u16 tmp; + tmp = m66592_read(m66592, offset); + tmp = tmp & (~pat); + tmp = tmp | val; + m66592_write(m66592, tmp, offset); +} + +#define m66592_bclr(m66592, val, offset) \ + m66592_mdfy(m66592, 0, val, offset) +#define m66592_bset(m66592, val, offset) \ + m66592_mdfy(m66592, val, 0, offset) + static inline void m66592_write_fifo(struct m66592 *m66592, - unsigned long offset, + struct m66592_ep *ep, void *buf, unsigned long len) { - void __iomem *fifoaddr = m66592->reg + offset; + void __iomem *fifoaddr = m66592->reg + ep->fifoaddr; if (m66592->pdata->on_chip) { unsigned long count; @@ -591,26 +606,15 @@ static inline void m66592_write_fifo(struct m66592 *m66592, iowrite16_rep(fifoaddr, buf, len); if (odd) { unsigned char *p = buf + len*2; + if (m66592->pdata->wr0_shorted_to_wr1) + m66592_bclr(m66592, M66592_MBW_16, ep->fifosel); iowrite8(*p, fifoaddr); + if (m66592->pdata->wr0_shorted_to_wr1) + m66592_bset(m66592, M66592_MBW_16, ep->fifosel); } } } -static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, - unsigned long offset) -{ - u16 tmp; - tmp = m66592_read(m66592, offset); - tmp = tmp & (~pat); - tmp = tmp | val; - m66592_write(m66592, tmp, offset); -} - -#define m66592_bclr(m66592, val, offset) \ - m66592_mdfy(m66592, 0, val, offset) -#define m66592_bset(m66592, val, offset) \ - m66592_mdfy(m66592, val, 0, offset) - #endif /* ifndef __M66592_UDC_H__ */ diff --git a/include/linux/usb/m66592.h b/include/linux/usb/m66592.h index cda9625..a4ba31a 100644 --- a/include/linux/usb/m66592.h +++ b/include/linux/usb/m66592.h @@ -38,6 +38,8 @@ struct m66592_platdata { /* (external controller only) one = 3.3V, zero = 1.5V */ unsigned vif:1; + /* (external controller only) set one = WR0_N shorted to WR1_N */ + unsigned wr0_shorted_to_wr1:1; }; #endif /* __LINUX_USB_M66592_H */ -- cgit v0.10.2 From 7eff1d83a3b846d16a4cd706d06b5827a07c08a3 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 7 Jul 2011 09:58:50 +0900 Subject: usb: gadget: m66592-udc: add pullup function Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 5c9c04d..491f825 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c @@ -1561,10 +1561,26 @@ static int m66592_get_frame(struct usb_gadget *_gadget) return m66592_read(m66592, M66592_FRMNUM) & 0x03FF; } +static int m66592_pullup(struct usb_gadget *gadget, int is_on) +{ + struct m66592 *m66592 = gadget_to_m66592(gadget); + unsigned long flags; + + spin_lock_irqsave(&m66592->lock, flags); + if (is_on) + m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG); + else + m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); + spin_unlock_irqrestore(&m66592->lock, flags); + + return 0; +} + static struct usb_gadget_ops m66592_gadget_ops = { .get_frame = m66592_get_frame, .start = m66592_start, .stop = m66592_stop, + .pullup = m66592_pullup, }; static int __exit m66592_remove(struct platform_device *pdev) -- cgit v0.10.2 From e463595fd9c752fa4bf06b47df93ef9ade3c7cf0 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 4 Jul 2011 08:58:31 +0200 Subject: pch_uart: Add MSI support Signed-off-by: Alexander Stein Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index ae28250..35cb9af 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -1426,6 +1426,8 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, goto init_port_hal_free; } + pci_enable_msi(pdev); + iobase = pci_resource_start(pdev, 0); mapbase = pci_resource_start(pdev, 1); priv->mapbase = mapbase; @@ -1482,6 +1484,8 @@ static void pch_uart_pci_remove(struct pci_dev *pdev) struct eg20t_port *priv; priv = (struct eg20t_port *)pci_get_drvdata(pdev); + + pci_disable_msi(pdev); pch_uart_exit_port(priv); pci_disable_device(pdev); kfree(priv); @@ -1565,6 +1569,7 @@ static int __devinit pch_uart_pci_probe(struct pci_dev *pdev, return ret; probe_disable_device: + pci_disable_msi(pdev); pci_disable_device(pdev); probe_error: return ret; -- cgit v0.10.2 From bff52fd458a1bca06266449b0ab8a43e9a50d240 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 4 Jul 2011 15:35:51 +0200 Subject: pch_uart: add missing comment about OKI ML7223 Signed-off-by: Alexander Stein Reviewed-by: Jesper Juhl Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index 35cb9af..0373682 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -45,6 +45,7 @@ enum { /* Set the max number of UART port * Intel EG20T PCH: 4 port * OKI SEMICONDUCTOR ML7213 IOH: 3 port + * OKI SEMICONDUCTOR ML7223 IOH: 2 port */ #define PCH_UART_NR 4 -- cgit v0.10.2 From f086ced17191fa0c5712539d2b680eae3dc972a1 Mon Sep 17 00:00:00 2001 From: "Du, Alek" Date: Thu, 7 Jul 2011 15:16:48 +0100 Subject: n_gsm: fix the wrong FCS handling FCS could be GSM0_SOF, so will break state machine... [This byte isn't quoted in any way so a SOF here doesn't imply an error occurred.] Signed-off-by: Alek Du Signed-off-by: Alan Cox Cc: stable [3.0] [Trivial but best backported once its in 3.1rc I think] Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index a38114b..14522ee 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c @@ -1871,10 +1871,6 @@ static void gsm0_receive(struct gsm_mux *gsm, unsigned char c) break; case GSM_FCS: /* FCS follows the packet */ gsm->received_fcs = c; - if (c == GSM0_SOF) { - gsm->state = GSM_SEARCH; - break; - } gsm_queue(gsm); gsm->state = GSM_SSOF; break; -- cgit v0.10.2 From def90f4239f094f3846c108c1c41a4cd55c33e8e Mon Sep 17 00:00:00 2001 From: Shreshtha Kumar Sahu Date: Thu, 9 Jun 2011 22:56:32 +0200 Subject: amba pl011: workaround for uart registers lockup This workaround aims to break the deadlock situation which raises during continuous transfer of data for long duration over uart with hardware flow control. It is observed that CTS interrupt cannot be cleared in uart interrupt register (ICR). Hence further transfer over uart gets blocked. It is seen that during such deadlock condition ICR don't get cleared even on multiple write. This leads pass_counter to decrease and finally reach zero. This can be taken as trigger point to run this UART_BT_WA. Workaround backups the register configuration, does soft reset of UART using BIT-0 of PRCC_K_SOFTRST_SET/CLEAR registers and restores the registers. This patch also provides support for uart init and exit function calls if present. Signed-off-by: Shreshtha Kumar Sahu Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 8dc0541..f5f6831 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include @@ -65,6 +66,30 @@ #define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE) #define UART_DUMMY_DR_RX (1 << 16) + +#define UART_WA_SAVE_NR 14 + +static void pl011_lockup_wa(unsigned long data); +static const u32 uart_wa_reg[UART_WA_SAVE_NR] = { + ST_UART011_DMAWM, + ST_UART011_TIMEOUT, + ST_UART011_LCRH_RX, + UART011_IBRD, + UART011_FBRD, + ST_UART011_LCRH_TX, + UART011_IFLS, + ST_UART011_XFCR, + ST_UART011_XON1, + ST_UART011_XON2, + ST_UART011_XOFF1, + ST_UART011_XOFF2, + UART011_CR, + UART011_IMSC +}; + +static u32 uart_wa_regdata[UART_WA_SAVE_NR]; +static DECLARE_TASKLET(pl011_lockup_tlet, pl011_lockup_wa, 0); + /* There is by now at least one vendor with differing details, so handle it */ struct vendor_data { unsigned int ifls; @@ -72,6 +97,7 @@ struct vendor_data { unsigned int lcrh_tx; unsigned int lcrh_rx; bool oversampling; + bool interrupt_may_hang; /* vendor-specific */ bool dma_threshold; }; @@ -90,9 +116,12 @@ static struct vendor_data vendor_st = { .lcrh_tx = ST_UART011_LCRH_TX, .lcrh_rx = ST_UART011_LCRH_RX, .oversampling = true, + .interrupt_may_hang = true, .dma_threshold = true, }; +static struct uart_amba_port *amba_ports[UART_NR]; + /* Deals with DMA transactions */ struct pl011_sgbuf { @@ -132,6 +161,7 @@ struct uart_amba_port { unsigned int lcrh_rx; /* vendor-specific */ bool autorts; char type[12]; + bool interrupt_may_hang; /* vendor-specific */ #ifdef CONFIG_DMA_ENGINE /* DMA stuff */ bool using_tx_dma; @@ -1008,6 +1038,68 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) #endif +/* + * pl011_lockup_wa + * This workaround aims to break the deadlock situation + * when after long transfer over uart in hardware flow + * control, uart interrupt registers cannot be cleared. + * Hence uart transfer gets blocked. + * + * It is seen that during such deadlock condition ICR + * don't get cleared even on multiple write. This leads + * pass_counter to decrease and finally reach zero. This + * can be taken as trigger point to run this UART_BT_WA. + * + */ +static void pl011_lockup_wa(unsigned long data) +{ + struct uart_amba_port *uap = amba_ports[0]; + void __iomem *base = uap->port.membase; + struct circ_buf *xmit = &uap->port.state->xmit; + struct tty_struct *tty = uap->port.state->port.tty; + int buf_empty_retries = 200; + int loop; + + /* Stop HCI layer from submitting data for tx */ + tty->hw_stopped = 1; + while (!uart_circ_empty(xmit)) { + if (buf_empty_retries-- == 0) + break; + udelay(100); + } + + /* Backup registers */ + for (loop = 0; loop < UART_WA_SAVE_NR; loop++) + uart_wa_regdata[loop] = readl(base + uart_wa_reg[loop]); + + /* Disable UART so that FIFO data is flushed out */ + writew(0x00, uap->port.membase + UART011_CR); + + /* Soft reset UART module */ + if (uap->port.dev->platform_data) { + struct amba_pl011_data *plat; + + plat = uap->port.dev->platform_data; + if (plat->reset) + plat->reset(); + } + + /* Restore registers */ + for (loop = 0; loop < UART_WA_SAVE_NR; loop++) + writew(uart_wa_regdata[loop] , + uap->port.membase + uart_wa_reg[loop]); + + /* Initialise the old status of the modem signals */ + uap->old_status = readw(uap->port.membase + UART01x_FR) & + UART01x_FR_MODEM_ANY; + + if (readl(base + UART011_MIS) & 0x2) + printk(KERN_EMERG "UART_BT_WA: ***FAILED***\n"); + + /* Start Tx/Rx */ + tty->hw_stopped = 0; +} + static void pl011_stop_tx(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; @@ -1158,8 +1250,11 @@ static irqreturn_t pl011_int(int irq, void *dev_id) if (status & UART011_TXIS) pl011_tx_chars(uap); - if (pass_counter-- == 0) + if (pass_counter-- == 0) { + if (uap->interrupt_may_hang) + tasklet_schedule(&pl011_lockup_tlet); break; + } status = readw(uap->port.membase + UART011_MIS); } while (status != 0); @@ -1339,6 +1434,14 @@ static int pl011_startup(struct uart_port *port) writew(uap->im, uap->port.membase + UART011_IMSC); spin_unlock_irq(&uap->port.lock); + if (uap->port.dev->platform_data) { + struct amba_pl011_data *plat; + + plat = uap->port.dev->platform_data; + if (plat->init) + plat->init(); + } + return 0; clk_dis: @@ -1394,6 +1497,15 @@ static void pl011_shutdown(struct uart_port *port) * Shut down the clock producer */ clk_disable(uap->clk); + + if (uap->port.dev->platform_data) { + struct amba_pl011_data *plat; + + plat = uap->port.dev->platform_data; + if (plat->exit) + plat->exit(); + } + } static void @@ -1700,6 +1812,14 @@ static int __init pl011_console_setup(struct console *co, char *options) if (!uap) return -ENODEV; + if (uap->port.dev->platform_data) { + struct amba_pl011_data *plat; + + plat = uap->port.dev->platform_data; + if (plat->init) + plat->init(); + } + uap->port.uartclk = clk_get_rate(uap->clk); if (options) @@ -1774,6 +1894,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id) uap->lcrh_rx = vendor->lcrh_rx; uap->lcrh_tx = vendor->lcrh_tx; uap->fifosize = vendor->fifosize; + uap->interrupt_may_hang = vendor->interrupt_may_hang; uap->port.dev = &dev->dev; uap->port.mapbase = dev->res.start; uap->port.membase = base; diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h index 5479fdc..514ed45 100644 --- a/include/linux/amba/serial.h +++ b/include/linux/amba/serial.h @@ -201,6 +201,9 @@ struct amba_pl011_data { bool (*dma_filter)(struct dma_chan *chan, void *filter_param); void *dma_rx_param; void *dma_tx_param; + void (*init) (void); + void (*exit) (void); + void (*reset) (void); }; #endif -- cgit v0.10.2 From 02c981c07bc95ac1e42ec6c817f0c28cf3fe993a Mon Sep 17 00:00:00 2001 From: Binghua Duan Date: Fri, 8 Jul 2011 17:40:12 +0800 Subject: ARM: CSR: Adding CSR SiRFprimaII board support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan Signed-off-by: Rongjun Ying Signed-off-by: Zhiwu Song Signed-off-by: Yuping Luo Signed-off-by: Bin Shi Signed-off-by: Huayi Li Signed-off-by: Barry Song Reviewed-by: Arnd Bergmann diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt new file mode 100644 index 0000000..6b07f65 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/sirf.txt @@ -0,0 +1,3 @@ +prima2 "cb" evalutation board +Required root node properties: + - compatible = "sirf,prima2-cb", "sirf,prima2"; diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278..aa6c91d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -879,6 +879,20 @@ config ARCH_VT8500 select HAVE_PWM help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. + +config ARCH_PRIMA2 + bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" + select CPU_V7 + select GENERIC_TIME + select NO_IOPORT + select GENERIC_CLOCKEVENTS + select CLKDEV_LOOKUP + select GENERIC_IRQ_CHIP + select USE_OF + select ZONE_DMA + help + Support for CSR SiRFSoC ARM Cortex A9 Platform + endchoice # diff --git a/arch/arm/Makefile b/arch/arm/Makefile index f5b2b39..1d693d0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -169,6 +169,7 @@ machine-$(CONFIG_ARCH_OMAP3) := omap2 machine-$(CONFIG_ARCH_OMAP4) := omap2 machine-$(CONFIG_ARCH_ORION5X) := orion5x machine-$(CONFIG_ARCH_PNX4008) := pnx4008 +machine-$(CONFIG_ARCH_PRIMA2) := prima2 machine-$(CONFIG_ARCH_PXA) := pxa machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_RPC) := rpc diff --git a/arch/arm/boot/dts/prima2-cb.dts b/arch/arm/boot/dts/prima2-cb.dts new file mode 100644 index 0000000..6fecc88 --- /dev/null +++ b/arch/arm/boot/dts/prima2-cb.dts @@ -0,0 +1,416 @@ +/dts-v1/; +/ { + model = "SiRF Prima2 eVB"; + compatible = "sirf,prima2-cb", "sirf,prima2"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + memory { + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1"; + linux,stdout-path = &uart1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + /* from bootloader */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x40000000 0x40000000 0x80000000>; + + l2-cache-controller@80040000 { + compatible = "arm,pl310-cache"; + reg = <0x80040000 0x1000>; + interrupts = <59>; + }; + + intc: interrupt-controller@80020000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "sirf,prima2-intc"; + reg = <0x80020000 0x1000>; + }; + + sys-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x88000000 0x88000000 0x40000>; + + clock-controller@88000000 { + compatible = "sirf,prima2-clkc"; + reg = <0x88000000 0x1000>; + interrupts = <3>; + }; + + reset-controller@88010000 { + compatible = "sirf,prima2-rstc"; + reg = <0x88010000 0x1000>; + }; + }; + + mem-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x90000000 0x90000000 0x10000>; + + memory-controller@90000000 { + compatible = "sirf,prima2-memc"; + reg = <0x90000000 0x10000>; + interrupts = <27>; + }; + }; + + disp-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x90010000 0x90010000 0x30000>; + + display@90010000 { + compatible = "sirf,prima2-lcd"; + reg = <0x90010000 0x20000>; + interrupts = <30>; + }; + + vpp@90020000 { + compatible = "sirf,prima2-vpp"; + reg = <0x90020000 0x10000>; + interrupts = <31>; + }; + }; + + graphics-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x98000000 0x98000000 0x8000000>; + + graphics@98000000 { + compatible = "powervr,sgx531"; + reg = <0x98000000 0x8000000>; + interrupts = <6>; + }; + }; + + multimedia-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xa0000000 0xa0000000 0x8000000>; + + multimedia@a0000000 { + compatible = "sirf,prima2-video-codec"; + reg = <0xa0000000 0x8000000>; + interrupts = <5>; + }; + }; + + dsp-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xa8000000 0xa8000000 0x2000000>; + + dspif@a8000000 { + compatible = "sirf,prima2-dspif"; + reg = <0xa8000000 0x10000>; + interrupts = <9>; + }; + + gps@a8010000 { + compatible = "sirf,prima2-gps"; + reg = <0xa8010000 0x10000>; + interrupts = <7>; + }; + + dsp@a9000000 { + compatible = "sirf,prima2-dsp"; + reg = <0xa9000000 0x1000000>; + interrupts = <8>; + }; + }; + + peri-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb0000000 0xb0000000 0x180000>; + + timer@b0020000 { + compatible = "sirf,prima2-tick"; + reg = <0xb0020000 0x1000>; + interrupts = <0>; + }; + + nand@b0030000 { + compatible = "sirf,prima2-nand"; + reg = <0xb0030000 0x10000>; + interrupts = <41>; + }; + + audio@b0040000 { + compatible = "sirf,prima2-audio"; + reg = <0xb0040000 0x10000>; + interrupts = <35>; + }; + + uart0: uart@b0050000 { + cell-index = <0>; + compatible = "sirf,prima2-uart"; + reg = <0xb0050000 0x10000>; + interrupts = <17>; + }; + + uart1: uart@b0060000 { + cell-index = <1>; + compatible = "sirf,prima2-uart"; + reg = <0xb0060000 0x10000>; + interrupts = <18>; + }; + + uart2: uart@b0070000 { + cell-index = <2>; + compatible = "sirf,prima2-uart"; + reg = <0xb0070000 0x10000>; + interrupts = <19>; + }; + + usp0: usp@b0080000 { + cell-index = <0>; + compatible = "sirf,prima2-usp"; + reg = <0xb0080000 0x10000>; + interrupts = <20>; + }; + + usp1: usp@b0090000 { + cell-index = <1>; + compatible = "sirf,prima2-usp"; + reg = <0xb0090000 0x10000>; + interrupts = <21>; + }; + + usp2: usp@b00a0000 { + cell-index = <2>; + compatible = "sirf,prima2-usp"; + reg = <0xb00a0000 0x10000>; + interrupts = <22>; + }; + + dmac0: dma-controller@b00b0000 { + cell-index = <0>; + compatible = "sirf,prima2-dmac"; + reg = <0xb00b0000 0x10000>; + interrupts = <12>; + }; + + dmac1: dma-controller@b0160000 { + cell-index = <1>; + compatible = "sirf,prima2-dmac"; + reg = <0xb0160000 0x10000>; + interrupts = <13>; + }; + + vip@b00C0000 { + compatible = "sirf,prima2-vip"; + reg = <0xb00C0000 0x10000>; + }; + + spi0: spi@b00d0000 { + cell-index = <0>; + compatible = "sirf,prima2-spi"; + reg = <0xb00d0000 0x10000>; + interrupts = <15>; + }; + + spi1: spi@b0170000 { + cell-index = <1>; + compatible = "sirf,prima2-spi"; + reg = <0xb0170000 0x10000>; + interrupts = <16>; + }; + + i2c0: i2c@b00e0000 { + cell-index = <0>; + compatible = "sirf,prima2-i2c"; + reg = <0xb00e0000 0x10000>; + interrupts = <24>; + }; + + i2c1: i2c@b00f0000 { + cell-index = <1>; + compatible = "sirf,prima2-i2c"; + reg = <0xb00f0000 0x10000>; + interrupts = <25>; + }; + + tsc@b0110000 { + compatible = "sirf,prima2-tsc"; + reg = <0xb0110000 0x10000>; + interrupts = <33>; + }; + + gpio: gpio-controller@b0120000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,prima2-gpio"; + reg = <0xb0120000 0x10000>; + gpio-controller; + interrupt-controller; + }; + + pwm@b0130000 { + compatible = "sirf,prima2-pwm"; + reg = <0xb0130000 0x10000>; + }; + + efusesys@b0140000 { + compatible = "sirf,prima2-efuse"; + reg = <0xb0140000 0x10000>; + }; + + pulsec@b0150000 { + compatible = "sirf,prima2-pulsec"; + reg = <0xb0150000 0x10000>; + interrupts = <48>; + }; + + pci-iobg { + compatible = "sirf,prima2-pciiobg", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x56000000 0x56000000 0x1b00000>; + + sd0: sdhci@56000000 { + cell-index = <0>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56000000 0x100000>; + interrupts = <38>; + }; + + sd1: sdhci@56100000 { + cell-index = <1>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56100000 0x100000>; + interrupts = <38>; + }; + + sd2: sdhci@56200000 { + cell-index = <2>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56200000 0x100000>; + interrupts = <23>; + }; + + sd3: sdhci@56300000 { + cell-index = <3>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56300000 0x100000>; + interrupts = <23>; + }; + + sd4: sdhci@56400000 { + cell-index = <4>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56400000 0x100000>; + interrupts = <39>; + }; + + sd5: sdhci@56500000 { + cell-index = <5>; + compatible = "sirf,prima2-sdhc"; + reg = <0x56500000 0x100000>; + interrupts = <39>; + }; + + pci-copy@57900000 { + compatible = "sirf,prima2-pcicp"; + reg = <0x57900000 0x100000>; + interrupts = <40>; + }; + + rom-interface@57a00000 { + compatible = "sirf,prima2-romif"; + reg = <0x57a00000 0x100000>; + }; + }; + }; + + rtc-iobg { + compatible = "sirf,prima2-rtciobg", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80030000 0x10000>; + + gpsrtc@1000 { + compatible = "sirf,prima2-gpsrtc"; + reg = <0x1000 0x1000>; + interrupts = <55 56 57>; + }; + + sysrtc@2000 { + compatible = "sirf,prima2-sysrtc"; + reg = <0x2000 0x1000>; + interrupts = <52 53 54>; + }; + + pwrc@3000 { + compatible = "sirf,prima2-pwrc"; + reg = <0x3000 0x1000>; + interrupts = <32>; + }; + }; + + uus-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb8000000 0xb8000000 0x40000>; + + usb0: usb@b00e0000 { + compatible = "chipidea,ci13611a-prima2"; + reg = <0xb8000000 0x10000>; + interrupts = <10>; + }; + + usb1: usb@b00f0000 { + compatible = "chipidea,ci13611a-prima2"; + reg = <0xb8010000 0x10000>; + interrupts = <11>; + }; + + sata@b00f0000 { + compatible = "synopsys,dwc-ahsata"; + reg = <0xb8020000 0x10000>; + interrupts = <37>; + }; + + security@b00f0000 { + compatible = "sirf,prima2-security"; + reg = <0xb8030000 0x10000>; + interrupts = <42>; + }; + }; + }; +}; diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile new file mode 100644 index 0000000..d44f7ae --- /dev/null +++ b/arch/arm/mach-prima2/Makefile @@ -0,0 +1,5 @@ +obj-y := timer.o +obj-y += irq.o +obj-y += clock.o +obj-y += rstc.o +obj-y += prima2.o diff --git a/arch/arm/mach-prima2/Makefile.boot b/arch/arm/mach-prima2/Makefile.boot new file mode 100644 index 0000000..d023db3 --- /dev/null +++ b/arch/arm/mach-prima2/Makefile.boot @@ -0,0 +1,3 @@ +zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-prima2/clock.c b/arch/arm/mach-prima2/clock.c new file mode 100644 index 0000000..f9a2aaf --- /dev/null +++ b/arch/arm/mach-prima2/clock.c @@ -0,0 +1,509 @@ +/* + * Clock tree for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SIRFSOC_CLKC_CLK_EN0 0x0000 +#define SIRFSOC_CLKC_CLK_EN1 0x0004 +#define SIRFSOC_CLKC_REF_CFG 0x0014 +#define SIRFSOC_CLKC_CPU_CFG 0x0018 +#define SIRFSOC_CLKC_MEM_CFG 0x001c +#define SIRFSOC_CLKC_SYS_CFG 0x0020 +#define SIRFSOC_CLKC_IO_CFG 0x0024 +#define SIRFSOC_CLKC_DSP_CFG 0x0028 +#define SIRFSOC_CLKC_GFX_CFG 0x002c +#define SIRFSOC_CLKC_MM_CFG 0x0030 +#define SIRFSOC_LKC_LCD_CFG 0x0034 +#define SIRFSOC_CLKC_MMC_CFG 0x0038 +#define SIRFSOC_CLKC_PLL1_CFG0 0x0040 +#define SIRFSOC_CLKC_PLL2_CFG0 0x0044 +#define SIRFSOC_CLKC_PLL3_CFG0 0x0048 +#define SIRFSOC_CLKC_PLL1_CFG1 0x004c +#define SIRFSOC_CLKC_PLL2_CFG1 0x0050 +#define SIRFSOC_CLKC_PLL3_CFG1 0x0054 +#define SIRFSOC_CLKC_PLL1_CFG2 0x0058 +#define SIRFSOC_CLKC_PLL2_CFG2 0x005c +#define SIRFSOC_CLKC_PLL3_CFG2 0x0060 + +#define SIRFSOC_CLOCK_VA_BASE SIRFSOC_VA(0x005000) + +#define KHZ 1000 +#define MHZ (KHZ * KHZ) + +struct clk_ops { + unsigned long (*get_rate)(struct clk *clk); + long (*round_rate)(struct clk *clk, unsigned long rate); + int (*set_rate)(struct clk *clk, unsigned long rate); + int (*enable)(struct clk *clk); + int (*disable)(struct clk *clk); + struct clk *(*get_parent)(struct clk *clk); + int (*set_parent)(struct clk *clk, struct clk *parent); +}; + +struct clk { + struct clk *parent; /* parent clk */ + unsigned long rate; /* clock rate in Hz */ + signed char usage; /* clock enable count */ + signed char enable_bit; /* enable bit: 0 ~ 63 */ + unsigned short regofs; /* register offset */ + struct clk_ops *ops; /* clock operation */ +}; + +static DEFINE_SPINLOCK(clocks_lock); + +static inline unsigned long clkc_readl(unsigned reg) +{ + return readl(SIRFSOC_CLOCK_VA_BASE + reg); +} + +static inline void clkc_writel(u32 val, unsigned reg) +{ + writel(val, SIRFSOC_CLOCK_VA_BASE + reg); +} + +/* + * osc_rtc - real time oscillator - 32.768KHz + * osc_sys - high speed oscillator - 26MHz + */ + +static struct clk clk_rtc = { + .rate = 32768, +}; + +static struct clk clk_osc = { + .rate = 26 * MHZ, +}; + +/* + * std pll + */ +static unsigned long std_pll_get_rate(struct clk *clk) +{ + unsigned long fin = clk_get_rate(clk->parent); + u32 regcfg2 = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 - + SIRFSOC_CLKC_PLL1_CFG0; + + if (clkc_readl(regcfg2) & BIT(2)) { + /* pll bypass mode */ + clk->rate = fin; + } else { + /* fout = fin * nf / nr / od */ + u32 cfg0 = clkc_readl(clk->regofs); + u32 nf = (cfg0 & (BIT(13) - 1)) + 1; + u32 nr = ((cfg0 >> 13) & (BIT(6) - 1)) + 1; + u32 od = ((cfg0 >> 19) & (BIT(4) - 1)) + 1; + WARN_ON(fin % MHZ); + clk->rate = fin / MHZ * nf / nr / od * MHZ; + } + + return clk->rate; +} + +static int std_pll_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long fin, nf, nr, od, reg; + + /* + * fout = fin * nf / (nr * od); + * set od = 1, nr = fin/MHz, so fout = nf * MHz + */ + + nf = rate / MHZ; + if (unlikely((rate % MHZ) || nf > BIT(13) || nf < 1)) + return -EINVAL; + + fin = clk_get_rate(clk->parent); + BUG_ON(fin < MHZ); + + nr = fin / MHZ; + BUG_ON((fin % MHZ) || nr > BIT(6)); + + od = 1; + + reg = (nf - 1) | ((nr - 1) << 13) | ((od - 1) << 19); + clkc_writel(reg, clk->regofs); + + reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG1 - SIRFSOC_CLKC_PLL1_CFG0; + clkc_writel((nf >> 1) - 1, reg); + + reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 - SIRFSOC_CLKC_PLL1_CFG0; + while (!(clkc_readl(reg) & BIT(6))) + cpu_relax(); + + clk->rate = 0; /* set to zero will force recalculation */ + return 0; +} + +static struct clk_ops std_pll_ops = { + .get_rate = std_pll_get_rate, + .set_rate = std_pll_set_rate, +}; + +static struct clk clk_pll1 = { + .parent = &clk_osc, + .regofs = SIRFSOC_CLKC_PLL1_CFG0, + .ops = &std_pll_ops, +}; + +static struct clk clk_pll2 = { + .parent = &clk_osc, + .regofs = SIRFSOC_CLKC_PLL2_CFG0, + .ops = &std_pll_ops, +}; + +static struct clk clk_pll3 = { + .parent = &clk_osc, + .regofs = SIRFSOC_CLKC_PLL3_CFG0, + .ops = &std_pll_ops, +}; + +/* + * clock domains - cpu, mem, sys/io + */ + +static struct clk clk_mem; + +static struct clk *dmn_get_parent(struct clk *clk) +{ + struct clk *clks[] = { + &clk_osc, &clk_rtc, &clk_pll1, &clk_pll2, &clk_pll3 + }; + u32 cfg = clkc_readl(clk->regofs); + WARN_ON((cfg & (BIT(3) - 1)) > 4); + return clks[cfg & (BIT(3) - 1)]; +} + +static int dmn_set_parent(struct clk *clk, struct clk *parent) +{ + const struct clk *clks[] = { + &clk_osc, &clk_rtc, &clk_pll1, &clk_pll2, &clk_pll3 + }; + u32 cfg = clkc_readl(clk->regofs); + int i; + for (i = 0; i < ARRAY_SIZE(clks); i++) { + if (clks[i] == parent) { + cfg &= ~(BIT(3) - 1); + clkc_writel(cfg | i, clk->regofs); + /* BIT(3) - switching status: 1 - busy, 0 - done */ + while (clkc_readl(clk->regofs) & BIT(3)) + cpu_relax(); + return 0; + } + } + return -EINVAL; +} + +static unsigned long dmn_get_rate(struct clk *clk) +{ + unsigned long fin = clk_get_rate(clk->parent); + u32 cfg = clkc_readl(clk->regofs); + if (cfg & BIT(24)) { + /* fcd bypass mode */ + clk->rate = fin; + } else { + /* + * wait count: bit[19:16], hold count: bit[23:20] + */ + u32 wait = (cfg >> 16) & (BIT(4) - 1); + u32 hold = (cfg >> 20) & (BIT(4) - 1); + + clk->rate = fin / (wait + hold + 2); + } + + return clk->rate; +} + +static int dmn_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long fin; + unsigned ratio, wait, hold, reg; + unsigned bits = (clk == &clk_mem) ? 3 : 4; + + fin = clk_get_rate(clk->parent); + ratio = fin / rate; + + if (unlikely(ratio < 2 || ratio > BIT(bits + 1))) + return -EINVAL; + + WARN_ON(fin % rate); + + wait = (ratio >> 1) - 1; + hold = ratio - wait - 2; + + reg = clkc_readl(clk->regofs); + reg &= ~(((BIT(bits) - 1) << 16) | ((BIT(bits) - 1) << 20)); + reg |= (wait << 16) | (hold << 20) | BIT(25); + clkc_writel(reg, clk->regofs); + + /* waiting FCD been effective */ + while (clkc_readl(clk->regofs) & BIT(25)) + cpu_relax(); + + clk->rate = 0; /* set to zero will force recalculation */ + + return 0; +} + +/* + * cpu clock has no FCD register in Prima2, can only change pll + */ +static int cpu_set_rate(struct clk *clk, unsigned long rate) +{ + int ret1, ret2; + struct clk *cur_parent, *tmp_parent; + + cur_parent = dmn_get_parent(clk); + BUG_ON(cur_parent == NULL || cur_parent->usage > 1); + + /* switch to tmp pll before setting parent clock's rate */ + tmp_parent = cur_parent == &clk_pll1 ? &clk_pll2 : &clk_pll1; + ret1 = dmn_set_parent(clk, tmp_parent); + BUG_ON(ret1); + + ret2 = clk_set_rate(cur_parent, rate); + + ret1 = dmn_set_parent(clk, cur_parent); + + clk->rate = 0; /* set to zero will force recalculation */ + + return ret2 ? ret2 : ret1; +} + +static struct clk_ops cpu_ops = { + .get_parent = dmn_get_parent, + .set_parent = dmn_set_parent, + .set_rate = cpu_set_rate, +}; + +static struct clk clk_cpu = { + .parent = &clk_pll1, + .regofs = SIRFSOC_CLKC_CPU_CFG, + .ops = &cpu_ops, +}; + + +static struct clk_ops msi_ops = { + .set_rate = dmn_set_rate, + .get_rate = dmn_get_rate, + .set_parent = dmn_set_parent, + .get_parent = dmn_get_parent, +}; + +static struct clk clk_mem = { + .parent = &clk_pll2, + .regofs = SIRFSOC_CLKC_MEM_CFG, + .ops = &msi_ops, +}; + +static struct clk clk_sys = { + .parent = &clk_pll3, + .regofs = SIRFSOC_CLKC_SYS_CFG, + .ops = &msi_ops, +}; + +static struct clk clk_io = { + .parent = &clk_pll3, + .regofs = SIRFSOC_CLKC_IO_CFG, + .ops = &msi_ops, +}; + +/* + * on-chip clock sets + */ +static struct clk_lookup onchip_clks[] = { + { + .dev_id = "rtc", + .clk = &clk_rtc, + }, { + .dev_id = "osc", + .clk = &clk_osc, + }, { + .dev_id = "pll1", + .clk = &clk_pll1, + }, { + .dev_id = "pll2", + .clk = &clk_pll2, + }, { + .dev_id = "pll3", + .clk = &clk_pll3, + }, { + .dev_id = "cpu", + .clk = &clk_cpu, + }, { + .dev_id = "mem", + .clk = &clk_mem, + }, { + .dev_id = "sys", + .clk = &clk_sys, + }, { + .dev_id = "io", + .clk = &clk_io, + }, +}; + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + + if (unlikely(IS_ERR_OR_NULL(clk))) + return -EINVAL; + + if (clk->parent) + clk_enable(clk->parent); + + spin_lock_irqsave(&clocks_lock, flags); + if (!clk->usage++ && clk->ops && clk->ops->enable) + clk->ops->enable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + if (unlikely(IS_ERR_OR_NULL(clk))) + return; + + WARN_ON(!clk->usage); + + spin_lock_irqsave(&clocks_lock, flags); + if (--clk->usage == 0 && clk->ops && clk->ops->disable) + clk->ops->disable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + + if (clk->parent) + clk_disable(clk->parent); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + if (unlikely(IS_ERR_OR_NULL(clk))) + return 0; + + if (clk->rate) + return clk->rate; + + if (clk->ops && clk->ops->get_rate) + return clk->ops->get_rate(clk); + + return clk_get_rate(clk->parent); +} +EXPORT_SYMBOL(clk_get_rate); + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + if (unlikely(IS_ERR_OR_NULL(clk))) + return 0; + + if (clk->ops && clk->ops->round_rate) + return clk->ops->round_rate(clk, rate); + + return 0; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + if (unlikely(IS_ERR_OR_NULL(clk))) + return -EINVAL; + + if (!clk->ops || !clk->ops->set_rate) + return -EINVAL; + + return clk->ops->set_rate(clk, rate); +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + int ret; + unsigned long flags; + + if (unlikely(IS_ERR_OR_NULL(clk))) + return -EINVAL; + + if (!clk->ops || !clk->ops->set_parent) + return -EINVAL; + + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->set_parent(clk, parent); + if (!ret) { + parent->usage += clk->usage; + clk->parent->usage -= clk->usage; + BUG_ON(clk->parent->usage < 0); + clk->parent = parent; + } + spin_unlock_irqrestore(&clocks_lock, flags); + return ret; +} +EXPORT_SYMBOL(clk_set_parent); + +struct clk *clk_get_parent(struct clk *clk) +{ + unsigned long flags; + + if (unlikely(IS_ERR_OR_NULL(clk))) + return NULL; + + if (!clk->ops || !clk->ops->get_parent) + return clk->parent; + + spin_lock_irqsave(&clocks_lock, flags); + clk->parent = clk->ops->get_parent(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + return clk->parent; +} +EXPORT_SYMBOL(clk_get_parent); + +static void __init sirfsoc_clk_init(void) +{ + clkdev_add_table(onchip_clks, ARRAY_SIZE(onchip_clks)); +} + +static struct of_device_id clkc_ids[] = { + { .compatible = "sirf,prima2-clkc" }, +}; + +void __init sirfsoc_of_clk_init(void) +{ + struct device_node *np; + struct resource res; + struct map_desc sirfsoc_clkc_iodesc = { + .virtual = SIRFSOC_CLOCK_VA_BASE, + .type = MT_DEVICE, + }; + + np = of_find_matching_node(NULL, clkc_ids); + if (!np) + panic("unable to find compatible clkc node in dtb\n"); + + if (of_address_to_resource(np, 0, &res)) + panic("unable to find clkc range in dtb"); + of_node_put(np); + + sirfsoc_clkc_iodesc.pfn = __phys_to_pfn(res.start); + sirfsoc_clkc_iodesc.length = 1 + res.end - res.start; + + iotable_init(&sirfsoc_clkc_iodesc, 1); + + sirfsoc_clk_init(); +} diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h new file mode 100644 index 0000000..fa4a3b5 --- /dev/null +++ b/arch/arm/mach-prima2/common.h @@ -0,0 +1,20 @@ +/* + * This file contains common function prototypes to avoid externs in the c files. + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_PRIMA2_COMMON_H__ +#define __MACH_PRIMA2_COMMON_H__ + +#include +#include + +extern struct sys_timer sirfsoc_timer; + +extern void __init sirfsoc_of_irq_init(void); +extern void __init sirfsoc_of_clk_init(void); + +#endif diff --git a/arch/arm/mach-prima2/include/mach/clkdev.h b/arch/arm/mach-prima2/include/mach/clkdev.h new file mode 100644 index 0000000..6693251 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/clkdev.h @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-prima2/include/mach/clkdev.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_CLKDEV_H +#define __MACH_CLKDEV_H + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do { } while (0) + +#endif diff --git a/arch/arm/mach-prima2/include/mach/debug-macro.S b/arch/arm/mach-prima2/include/mach/debug-macro.S new file mode 100644 index 0000000..bf75106 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/debug-macro.S @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-prima2/include/mach/debug-macro.S + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include + + .macro addruart, rp, rv + ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical + ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA] + .endm + + .macro busyuart,rd,rx + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS] + tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY + beq 1001b + .endm + diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S new file mode 100644 index 0000000..1c8a50f --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-prima2/include/mach/entry-macro.S + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include + +#define SIRFSOC_INT_ID 0x38 + + .macro get_irqnr_preamble, base, tmp + ldr \base, =sirfsoc_intc_base + ldr \base, [\base] + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, [\base, #SIRFSOC_INT_ID] @ Get the highest priority irq + cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f + movges \irqnr, #0 + .endm + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/arch/arm/mach-prima2/include/mach/hardware.h b/arch/arm/mach-prima2/include/mach/hardware.h new file mode 100644 index 0000000..105b969 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/hardware.h @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-prima2/include/mach/hardware.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_HARDWARE_H__ +#define __MACH_HARDWARE_H__ + +#include +#include + +#endif diff --git a/arch/arm/mach-prima2/include/mach/io.h b/arch/arm/mach-prima2/include/mach/io.h new file mode 100644 index 0000000..6c31e9e --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/io.h @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-prima2/include/mach/io.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_PRIMA2_IO_H +#define __MACH_PRIMA2_IO_H + +#define IO_SPACE_LIMIT ((resource_size_t)0) + +#define __mem_pci(a) (a) + +#endif diff --git a/arch/arm/mach-prima2/include/mach/irqs.h b/arch/arm/mach-prima2/include/mach/irqs.h new file mode 100644 index 0000000..bb354f9 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/irqs.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-prima2/include/mach/irqs.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#define SIRFSOC_INTENAL_IRQ_START 0 +#define SIRFSOC_INTENAL_IRQ_END 59 + +#define NR_IRQS 220 + +#endif diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h new file mode 100644 index 0000000..66b1ae2 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/map.h @@ -0,0 +1,16 @@ +/* + * memory & I/O static mapping definitions for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_PRIMA2_MAP_H__ +#define __MACH_PRIMA2_MAP_H__ + +#include + +#define SIRFSOC_VA(x) (VMALLOC_END + ((x) & 0x00FFF000)) + +#endif diff --git a/arch/arm/mach-prima2/include/mach/memory.h b/arch/arm/mach-prima2/include/mach/memory.h new file mode 100644 index 0000000..368cd5a --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/memory.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-prima2/include/mach/memory.h + * + * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PLAT_PHYS_OFFSET UL(0x00000000) + +/* + * Restrict DMA-able region to workaround silicon limitation. + * The limitation restricts buffers available for DMA to SD/MMC + * hardware to be below 256MB + */ +#define ARM_DMA_ZONE_SIZE (SZ_256M) + +#endif diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h new file mode 100644 index 0000000..0dbd257 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/system.h @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-prima2/include/mach/system.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_SYSTEM_H__ +#define __MACH_SYSTEM_H__ + +#include +#include + +#define SIRFSOC_SYS_RST_BIT BIT(31) + +extern void __iomem *sirfsoc_rstc_base; + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); +} + +#endif diff --git a/arch/arm/mach-prima2/include/mach/timex.h b/arch/arm/mach-prima2/include/mach/timex.h new file mode 100644 index 0000000..d6f98a7 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/timex.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-prima2/include/mach/timex.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_TIMEX_H__ +#define __MACH_TIMEX_H__ + +#define CLOCK_TICK_RATE 1000000 + +#endif diff --git a/arch/arm/mach-prima2/include/mach/uart.h b/arch/arm/mach-prima2/include/mach/uart.h new file mode 100644 index 0000000..c98b4d5 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/uart.h @@ -0,0 +1,23 @@ +/* + * arch/arm/mach-prima2/include/mach/uart.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_PRIMA2_SIRFSOC_UART_H +#define __MACH_PRIMA2_SIRFSOC_UART_H + +/* UART-1: used as serial debug port */ +#define SIRFSOC_UART1_PA_BASE 0xb0060000 +#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000) +#define SIRFSOC_UART1_SIZE SZ_4K + +#define SIRFSOC_UART_TXFIFO_STATUS 0x0114 +#define SIRFSOC_UART_TXFIFO_DATA 0x0118 + +#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5) +#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6) + +#endif diff --git a/arch/arm/mach-prima2/include/mach/uncompress.h b/arch/arm/mach-prima2/include/mach/uncompress.h new file mode 100644 index 0000000..83125c6 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/uncompress.h @@ -0,0 +1,40 @@ +/* + * arch/arm/mach-prima2/include/mach/uncompress.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include +#include +#include + +void arch_decomp_setup(void) +{ +} + +#define arch_decomp_wdog() + +static __inline__ void putc(char c) +{ + /* + * during kernel decompression, all mappings are flat: + * virt_addr == phys_addr + */ + while (__raw_readl(SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS) + & SIRFSOC_UART1_TXFIFO_FULL) + barrier(); + + __raw_writel(c, SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA); +} + +static inline void flush(void) +{ +} + +#endif + diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h new file mode 100644 index 0000000..c9f90fe --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/vmalloc.h @@ -0,0 +1,16 @@ +/* + * arch/arm/ach-prima2/include/mach/vmalloc.h + * + * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_VMALLOC_H +#define __MACH_VMALLOC_H + +#include + +#define VMALLOC_END _AC(0xFEC00000, UL) + +#endif diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c new file mode 100644 index 0000000..c3404cb --- /dev/null +++ b/arch/arm/mach-prima2/irq.c @@ -0,0 +1,71 @@ +/* + * interrupt controller support for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SIRFSOC_INT_RISC_MASK0 0x0018 +#define SIRFSOC_INT_RISC_MASK1 0x001C +#define SIRFSOC_INT_RISC_LEVEL0 0x0020 +#define SIRFSOC_INT_RISC_LEVEL1 0x0024 + +void __iomem *sirfsoc_intc_base; + +static __init void +sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip("SIRFINTC", 1, irq_start, base, handle_level_irq); + ct = gc->chip_types; + + ct->chip.irq_mask = irq_gc_mask_clr_bit; + ct->chip.irq_unmask = irq_gc_mask_set_bit; + ct->regs.mask = SIRFSOC_INT_RISC_MASK0; + + irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST, 0); +} + +static __init void sirfsoc_irq_init(void) +{ + sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32); + sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32); + + writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0); + writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1); + + writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK0); + writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1); +} + +static struct of_device_id intc_ids[] = { + { .compatible = "sirf,prima2-intc" }, +}; + +void __init sirfsoc_of_irq_init(void) +{ + struct device_node *np; + + np = of_find_matching_node(NULL, intc_ids); + if (!np) + panic("unable to find compatible intc node in dtb\n"); + + sirfsoc_intc_base = of_iomap(np, 0); + if (!sirfsoc_intc_base) + panic("unable to map intc cpu registers\n"); + + of_node_put(np); + + sirfsoc_irq_init(); +} diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c new file mode 100644 index 0000000..c26947d --- /dev/null +++ b/arch/arm/mach-prima2/prima2.c @@ -0,0 +1,40 @@ +/* + * Defines machines for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include "common.h" + +static struct of_device_id sirfsoc_of_bus_ids[] __initdata = { + { .compatible = "simple-bus", }, + {}, +}; + +void __init sirfsoc_mach_init(void) +{ + of_platform_bus_probe(NULL, sirfsoc_of_bus_ids, NULL); +} + +static const char *prima2cb_dt_match[] __initdata = { + "sirf,prima2-cb", + NULL +}; + +MACHINE_START(PRIMA2_EVB, "prima2cb") + /* Maintainer: Barry Song */ + .boot_params = 0x00000100, + .init_early = sirfsoc_of_clk_init, + .init_irq = sirfsoc_of_irq_init, + .timer = &sirfsoc_timer, + .init_machine = sirfsoc_mach_init, + .dt_compat = prima2cb_dt_match, +MACHINE_END diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c new file mode 100644 index 0000000..d074786 --- /dev/null +++ b/arch/arm/mach-prima2/rstc.c @@ -0,0 +1,69 @@ +/* + * reset controller for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include + +void __iomem *sirfsoc_rstc_base; +static DEFINE_MUTEX(rstc_lock); + +static struct of_device_id rstc_ids[] = { + { .compatible = "sirf,prima2-rstc" }, +}; + +static int __init sirfsoc_of_rstc_init(void) +{ + struct device_node *np; + + np = of_find_matching_node(NULL, rstc_ids); + if (!np) + panic("unable to find compatible rstc node in dtb\n"); + + sirfsoc_rstc_base = of_iomap(np, 0); + if (!sirfsoc_rstc_base) + panic("unable to map rstc cpu registers\n"); + + of_node_put(np); + + return 0; +} +early_initcall(sirfsoc_of_rstc_init); + +int sirfsoc_reset_device(struct device *dev) +{ + const unsigned int *prop = of_get_property(dev->of_node, "reset-bit", NULL); + unsigned int reset_bit; + + if (!prop) + return -ENODEV; + + reset_bit = be32_to_cpup(prop); + + mutex_lock(&rstc_lock); + + /* + * Writing 1 to this bit resets corresponding block. Writing 0 to this + * bit de-asserts reset signal of the corresponding block. + * datasheet doesn't require explicit delay between the set and clear + * of reset bit. it could be shorter if tests pass. + */ + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit, + sirfsoc_rstc_base + (reset_bit / 32) * 4); + msleep(10); + writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit, + sirfsoc_rstc_base + (reset_bit / 32) * 4); + + mutex_unlock(&rstc_lock); + + return 0; +} diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c new file mode 100644 index 0000000..44027f3 --- /dev/null +++ b/arch/arm/mach-prima2/timer.c @@ -0,0 +1,217 @@ +/* + * System timer for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SIRFSOC_TIMER_COUNTER_LO 0x0000 +#define SIRFSOC_TIMER_COUNTER_HI 0x0004 +#define SIRFSOC_TIMER_MATCH_0 0x0008 +#define SIRFSOC_TIMER_MATCH_1 0x000C +#define SIRFSOC_TIMER_MATCH_2 0x0010 +#define SIRFSOC_TIMER_MATCH_3 0x0014 +#define SIRFSOC_TIMER_MATCH_4 0x0018 +#define SIRFSOC_TIMER_MATCH_5 0x001C +#define SIRFSOC_TIMER_STATUS 0x0020 +#define SIRFSOC_TIMER_INT_EN 0x0024 +#define SIRFSOC_TIMER_WATCHDOG_EN 0x0028 +#define SIRFSOC_TIMER_DIV 0x002C +#define SIRFSOC_TIMER_LATCH 0x0030 +#define SIRFSOC_TIMER_LATCHED_LO 0x0034 +#define SIRFSOC_TIMER_LATCHED_HI 0x0038 + +#define SIRFSOC_TIMER_WDT_INDEX 5 + +#define SIRFSOC_TIMER_LATCH_BIT BIT(0) + +static void __iomem *sirfsoc_timer_base; +static void __init sirfsoc_of_timer_map(void); + +/* timer0 interrupt handler */ +static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *ce = dev_id; + + WARN_ON(!(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_STATUS) & BIT(0))); + + /* clear timer0 interrupt */ + writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS); + + ce->event_handler(ce); + + return IRQ_HANDLED; +} + +/* read 64-bit timer counter */ +static cycle_t sirfsoc_timer_read(struct clocksource *cs) +{ + u64 cycles; + + /* latch the 64-bit timer counter */ + writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH); + cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI); + cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO); + + return cycles; +} + +static int sirfsoc_timer_set_next_event(unsigned long delta, + struct clock_event_device *ce) +{ + unsigned long now, next; + + writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH); + now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO); + next = now + delta; + writel_relaxed(next, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0); + writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH); + now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO); + + return next - now > delta ? -ETIME : 0; +} + +static void sirfsoc_timer_set_mode(enum clock_event_mode mode, + struct clock_event_device *ce) +{ + u32 val = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN); + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + WARN_ON(1); + break; + case CLOCK_EVT_MODE_ONESHOT: + writel_relaxed(val | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN); + break; + case CLOCK_EVT_MODE_SHUTDOWN: + writel_relaxed(val & ~BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +static struct clock_event_device sirfsoc_clockevent = { + .name = "sirfsoc_clockevent", + .rating = 200, + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_mode = sirfsoc_timer_set_mode, + .set_next_event = sirfsoc_timer_set_next_event, +}; + +static struct clocksource sirfsoc_clocksource = { + .name = "sirfsoc_clocksource", + .rating = 200, + .mask = CLOCKSOURCE_MASK(64), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, + .read = sirfsoc_timer_read, +}; + +static struct irqaction sirfsoc_timer_irq = { + .name = "sirfsoc_timer0", + .flags = IRQF_TIMER, + .irq = 0, + .handler = sirfsoc_timer_interrupt, + .dev_id = &sirfsoc_clockevent, +}; + +/* Overwrite weak default sched_clock with more precise one */ +unsigned long long notrace sched_clock(void) +{ + static int is_mapped = 0; + + /* + * sched_clock is called earlier than .init of sys_timer + * if we map timer memory in .init of sys_timer, system + * will panic due to illegal memory access + */ + if(!is_mapped) { + sirfsoc_of_timer_map(); + is_mapped = 1; + } + + return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE); +} + +static void __init sirfsoc_clockevent_init(void) +{ + clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60); + + sirfsoc_clockevent.max_delta_ns = + clockevent_delta2ns(-2, &sirfsoc_clockevent); + sirfsoc_clockevent.min_delta_ns = + clockevent_delta2ns(2, &sirfsoc_clockevent); + + sirfsoc_clockevent.cpumask = cpumask_of(0); + clockevents_register_device(&sirfsoc_clockevent); +} + +/* initialize the kernel jiffy timer source */ +static void __init sirfsoc_timer_init(void) +{ + unsigned long rate; + + /* timer's input clock is io clock */ + struct clk *clk = clk_get_sys("io", NULL); + + BUG_ON(IS_ERR(clk)); + + rate = clk_get_rate(clk); + + BUG_ON(rate < CLOCK_TICK_RATE); + BUG_ON(rate % CLOCK_TICK_RATE); + + writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV); + writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); + writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); + writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS); + + BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); + + BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); + + sirfsoc_clockevent_init(); +} + +static struct of_device_id timer_ids[] = { + { .compatible = "sirf,prima2-tick" }, +}; + +static void __init sirfsoc_of_timer_map(void) +{ + struct device_node *np; + const unsigned int *intspec; + + np = of_find_matching_node(NULL, timer_ids); + if (!np) + panic("unable to find compatible timer node in dtb\n"); + sirfsoc_timer_base = of_iomap(np, 0); + if (!sirfsoc_timer_base) + panic("unable to map timer cpu registers\n"); + + /* Get the interrupts property */ + intspec = of_get_property(np, "interrupts", NULL); + BUG_ON(!intspec); + sirfsoc_timer_irq.irq = be32_to_cpup(intspec); + + of_node_put(np); +} + +struct sys_timer sirfsoc_timer = { + .init = sirfsoc_timer_init, +}; diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0074b8d..edf0681 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -821,7 +821,7 @@ config CACHE_L2X0 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE + ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_PRIMA2 default y select OUTER_CACHE select OUTER_CACHE_SYNC -- cgit v0.10.2 From 31adb06f9d68f9d033284c9ab0e264b2d581bceb Mon Sep 17 00:00:00 2001 From: Barry Song Date: Fri, 8 Jul 2011 02:40:13 -0700 Subject: ARM: CSR: mapping early DEBUG_LL uart Signed-off-by: Barry Song Reviewed-by: Arnd Bergmann diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile index d44f7ae..f2fba66 100644 --- a/arch/arm/mach-prima2/Makefile +++ b/arch/arm/mach-prima2/Makefile @@ -3,3 +3,4 @@ obj-y += irq.o obj-y += clock.o obj-y += rstc.o obj-y += prima2.o +obj-$(CONFIG_DEBUG_LL) += lluart.o diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h index fa4a3b5..83e5d212 100644 --- a/arch/arm/mach-prima2/common.h +++ b/arch/arm/mach-prima2/common.h @@ -17,4 +17,10 @@ extern struct sys_timer sirfsoc_timer; extern void __init sirfsoc_of_irq_init(void); extern void __init sirfsoc_of_clk_init(void); +#ifndef CONFIG_DEBUG_LL +static inline void sirfsoc_map_lluart(void) {} +#else +extern void __init sirfsoc_map_lluart(void); +#endif + #endif diff --git a/arch/arm/mach-prima2/lluart.c b/arch/arm/mach-prima2/lluart.c new file mode 100644 index 0000000..a89f9b3 --- /dev/null +++ b/arch/arm/mach-prima2/lluart.c @@ -0,0 +1,25 @@ +/* + * Static memory mapping for DEBUG_LL + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include + +void __init sirfsoc_map_lluart(void) +{ + struct map_desc sirfsoc_lluart_map = { + .virtual = SIRFSOC_UART1_VA_BASE, + .pfn = __phys_to_pfn(SIRFSOC_UART1_PA_BASE), + .length = SIRFSOC_UART1_SIZE, + .type = MT_DEVICE, + }; + + iotable_init(&sirfsoc_lluart_map, 1); +} diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index c26947d..f57124b 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c @@ -33,6 +33,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb") /* Maintainer: Barry Song */ .boot_params = 0x00000100, .init_early = sirfsoc_of_clk_init, + .map_io = sirfsoc_map_lluart, .init_irq = sirfsoc_of_irq_init, .timer = &sirfsoc_timer, .init_machine = sirfsoc_mach_init, -- cgit v0.10.2 From 89e162afd37caa6acab4e05b6e9e9fad6235381e Mon Sep 17 00:00:00 2001 From: Rongjun Ying Date: Fri, 8 Jul 2011 02:40:14 -0700 Subject: ARM: CSR: initializing L2 cache Signed-off-by: Rongjun Ying Signed-off-by: Barry Song Reviewed-by: Arnd Bergmann diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile index f2fba66..7af7fc0 100644 --- a/arch/arm/mach-prima2/Makefile +++ b/arch/arm/mach-prima2/Makefile @@ -4,3 +4,4 @@ obj-y += clock.o obj-y += rstc.o obj-y += prima2.o obj-$(CONFIG_DEBUG_LL) += lluart.o +obj-$(CONFIG_CACHE_L2X0) += l2x0.o diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c new file mode 100644 index 0000000..9cda205 --- /dev/null +++ b/arch/arm/mach-prima2/l2x0.c @@ -0,0 +1,59 @@ +/* + * l2 cache initialization for CSR SiRFprimaII + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define L2X0_ADDR_FILTERING_START 0xC00 +#define L2X0_ADDR_FILTERING_END 0xC04 + +static struct of_device_id l2x_ids[] = { + { .compatible = "arm,pl310-cache" }, +}; + +static int __init sirfsoc_of_l2x_init(void) +{ + struct device_node *np; + void __iomem *sirfsoc_l2x_base; + + np = of_find_matching_node(NULL, l2x_ids); + if (!np) + panic("unable to find compatible l2x node in dtb\n"); + + sirfsoc_l2x_base = of_iomap(np, 0); + if (!sirfsoc_l2x_base) + panic("unable to map l2x cpu registers\n"); + + of_node_put(np); + + if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) { + /* + * set the physical memory windows L2 cache will cover + */ + writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024, + sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END); + writel_relaxed(PLAT_PHYS_OFFSET | 0x1, + sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START); + + writel_relaxed(0, + sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL); + writel_relaxed(0, + sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL); + } + l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000, + 0x00000000); + + return 0; +} +early_initcall(sirfsoc_of_l2x_init); -- cgit v0.10.2 From 07d0c38e7d84f911c72058a124c7f17b3c779a65 Mon Sep 17 00:00:00 2001 From: "Stephen M. Cameron" Date: Sat, 9 Jul 2011 09:04:12 +0200 Subject: cciss: do not attempt to read from a write-only register Most smartarrays will tolerate it, but some new ones don't. Signed-off-by: Stephen M. Cameron Note: this is a regression caused by commit 1ddd5049 Cc: stable@kernel.org Signed-off-by: Jens Axboe diff --git a/drivers/block/cciss.h b/drivers/block/cciss.h index 16b4d58..c049548 100644 --- a/drivers/block/cciss.h +++ b/drivers/block/cciss.h @@ -223,7 +223,7 @@ static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c) h->ctlr, c->busaddr); #endif /* CCISS_DEBUG */ writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); - readl(h->vaddr + SA5_REQUEST_PORT_OFFSET); + readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); h->commands_outstanding++; if ( h->commands_outstanding > h->max_outstanding) h->max_outstanding = h->commands_outstanding; -- cgit v0.10.2 From a7cd4b08d9854bcf813fd6906ec3e97073b9bb19 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 18:00:25 -0600 Subject: OMAP: dmtimer: add missing include After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset of dmtimer functions into inline functions"), arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h - add it. Signed-off-by: Paul Walmsley Cc: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index d0f3a2d..eb5d16c 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -34,6 +34,7 @@ #include #include +#include #ifndef __ASM_ARCH_DMTIMER_H #define __ASM_ARCH_DMTIMER_H -- cgit v0.10.2 From 724019b0137acf2ea43e5ca854798851f5ebf51f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:00 +0200 Subject: OMAP2+: hwmod: Fix smart-standby + wakeup support The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding the wakeup support for new OMAP4 IPs. This support is incomplete for busmaster IPs that need as well to use smart-standby with wakeup. This new standbymode is suported on HSI and USB_HOST_FS for the moment. Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this capability. Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, _enable_sysc and _idle_sysc. The omap_hwmod_44xx_data.c will have to be updated to add this new flag. Signed-off-by: Benoit Cousson Signed-off-by: Djamil Elaidi Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6c..384d3c3 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_NO; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } @@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_FORCE; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1adea9c..e93438c 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; #define HWMOD_IDLEMODE_FORCE (1 << 0) #define HWMOD_IDLEMODE_NO (1 << 1) #define HWMOD_IDLEMODE_SMART (1 << 2) -/* Slave idle mode flag only */ #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) /** @@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if { #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) +#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) /* omap_hwmod_sysconfig.sysc_flags capability flags */ #define SYSC_HAS_AUTOIDLE (1 << 0) -- cgit v0.10.2 From c614ebf6f73de8e6d0481c4b3b962b649166fee9 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:01 +0200 Subject: OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag Add the flag to every IPs that support it to allow the framework to enable it instead of the SMART_STANDBY default mode. Without that, an IP with busmaster capability will not be able to wakeup the interconnect at all. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e1c69ff..8cbbfbf 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = { .sysc_offs = 0x0010, .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART | + MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; @@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = { SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type1, }; @@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; @@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = { SYSC_HAS_SOFTRESET), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | - MSTANDBY_SMART), + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), .sysc_fields = &omap_hwmod_sysc_type2, }; -- cgit v0.10.2 From 6481c73c22613660a5b791d2b4d0faf60508d731 Mon Sep 17 00:00:00 2001 From: Miguel Vadillo Date: Fri, 1 Jul 2011 22:54:02 +0200 Subject: OMAP2+: hwmod: Enable module in shutdown to access sysconfig When calling the shutdown, the module may be already in idle. Accessing the sysconfig register will then lead to a crash. In that case, re-enable the module in order to allow the access to the sysconfig register. Signed-off-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 384d3c3..cbc2a8a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) } } - if (oh->class->sysc) + if (oh->class->sysc) { + if (oh->_state == _HWMOD_STATE_IDLE) + _enable(oh); _shutdown_sysc(oh); + } /* * If an IP contains only one HW reset line, then assert it -- cgit v0.10.2 From 1fe741139be5acfe3758b53cdbf0b5e3d26db3fe Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:03 +0200 Subject: OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. Writing to that bit will instead trigger a softreset. Check the flag to write this bit only if the module supports it. Reported-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index cbc2a8a..3800084 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, */ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v |= wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); @@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) */ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v &= ~wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); -- cgit v0.10.2 From d24bcaa3fa711f7dd9c4aacf3c58083cf666418f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:04 +0200 Subject: OMAP2+: hwmod: Remove _populate_mpu_rt_base warning It is perfectly valid for some hwmod to not have any register target address for sysconfig. This is especially true for interconnect hwmods. Remove the warning. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 3800084..f401417 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) return 0; oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); - if (!oh->_mpu_rt_va) - pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n", - __func__, oh->name); return 0; } -- cgit v0.10.2 From 31f62866c578b3d47ef7810b336e9e193b90167f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:05 +0200 Subject: OMAP2+: hwmod: Fix the HW reset management The HW reset must be de-assert after the clocks are enabled but before waiting for the target to be ready. Otherwise the reset might not work properly since the clock is not running to proceed the reset. De-assert the reset after _enable_clocks and before _wait_target_ready. Re-assert it only when the clocks are disabled. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index f401417..df91bb1 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* - * If an IP contains only one HW reset line, then de-assert it in order - * to allow to enable the clocks. Otherwise the PRCM will return - * Intransition status, and the init will failed. - */ - if ((oh->_state == _HWMOD_STATE_INITIALIZED || - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) - _deassert_hardreset(oh, oh->rst_lines[0].name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) _add_initiator_dep(oh, mpu_oh); _enable_clocks(oh); + /* + * If an IP contains only one HW reset line, then de-assert it in order + * to allow the module state transition. Otherwise the PRCM will return + * Intransition status, and the init will failed. + */ + if ((oh->_state == _HWMOD_STATE_INITIALIZED || + oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) + _deassert_hardreset(oh, oh->rst_lines[0].name); + r = _wait_target_ready(oh); if (!r) { oh->_state = _HWMOD_STATE_ENABLED; @@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) _shutdown_sysc(oh); } - /* - * If an IP contains only one HW reset line, then assert it - * before disabling the clocks and shutting down the IP. - */ - if (oh->rst_lines_cnt == 1) - _assert_hardreset(oh, oh->rst_lines[0].name); - /* clocks and deps are already disabled in idle */ if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); @@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) } /* XXX Should this code also force-disable the optional clocks? */ + /* + * If an IP contains only one HW reset line, then assert it + * after disabling the clocks and before shutting down the IP. + */ + if (oh->rst_lines_cnt == 1) + _assert_hardreset(oh, oh->rst_lines[0].name); + /* Mux pins to safe mode or use populated off mode values */ if (oh->mux) omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); -- cgit v0.10.2 From 6652271a2556c086c04658dce16de2947e849ffd Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:06 +0200 Subject: OMAP: hwmod: Add warnings if enable failed Change the debug into warning to check what IPs are failing. Signed-off-by: Benoit Cousson Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index df91bb1..64e9830 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; + else + pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); return ret; } -- cgit v0.10.2 From 34617e2a4d331fdd8172077d8c70a0421fc136e6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:07 +0200 Subject: OMAP: hwmod: Move pr_debug to improve the readability Move the pr_debug at the top of the function to trace the entry even if the first test is failing. That help understanding that we entered the function but failed in it. Move the _enable last part out of the test to reduce indentation and improve readability. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 64e9830..e530bcb 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) { int r; + pr_debug("omap_hwmod: %s: enabling\n", oh->name); + if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { @@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) return -EINVAL; } - pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) _deassert_hardreset(oh, oh->rst_lines[0].name); r = _wait_target_ready(oh); - if (!r) { - oh->_state = _HWMOD_STATE_ENABLED; - - /* Access the sysconfig only if the target is ready */ - if (oh->class->sysc) { - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) - _update_sysc_cache(oh); - _enable_sysc(oh); - } - } else { - _disable_clocks(oh); + if (r) { pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", oh->name, r); + _disable_clocks(oh); + + return r; + } + + oh->_state = _HWMOD_STATE_ENABLED; + + /* Access the sysconfig only if the target is ready */ + if (oh->class->sysc) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _enable_sysc(oh); } return r; @@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) */ static int _idle(struct omap_hwmod *oh) { + pr_debug("omap_hwmod: %s: idling\n", oh->name); + if (oh->_state != _HWMOD_STATE_ENABLED) { WARN(1, "omap_hwmod: %s: idle state can only be entered from " "enabled state\n", oh->name); return -EINVAL; } - pr_debug("omap_hwmod: %s: idling\n", oh->name); - if (oh->class->sysc) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); -- cgit v0.10.2 From 78183f3fdf76f422431a81852468be01b36db325 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:05 -0600 Subject: omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays Previously, struct omap_hwmod_addr_space arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space arrays and uses a null structure member as the array terminator instead. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6c..77094d7 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2,6 +2,7 @@ * omap_hwmod implementation for OMAP2/3/4 * * Copyright (C) 2009-2011 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * * Paul Walmsley, Benoît Cousson, Kevin Hilman * @@ -678,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } /** + * _count_ocp_if_addr_spaces - count the number of address space entries for @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of address space ranges associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) +{ + struct omap_hwmod_addr_space *mem; + int i = 0; + + if (!os || !os->addr) + return 0; + + do { + mem = &os->addr[i++]; + } while (mem->pa_start != mem->pa_end); + + return i; +} + +/** * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use * @oh: struct omap_hwmod * * @@ -722,8 +746,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) { struct omap_hwmod_ocp_if *os; struct omap_hwmod_addr_space *mem; - int i; - int found = 0; + int i = 0, found = 0; void __iomem *va_start; if (!oh || oh->slaves_cnt == 0) @@ -731,12 +754,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) os = oh->slaves[index]; - for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { - if (mem->flags & ADDR_TYPE_RT) { + if (!os->addr) + return NULL; + + do { + mem = &os->addr[i++]; + if (mem->flags & ADDR_TYPE_RT) found = 1; - break; - } - } + } while (!found && mem->pa_start != mem->pa_end); if (found) { va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); @@ -1942,7 +1967,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) - ret += oh->slaves[i]->addr_cnt; + ret += _count_ocp_if_addr_spaces(oh->slaves[i]); return ret; } @@ -1982,10 +2007,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) for (i = 0; i < oh->slaves_cnt; i++) { struct omap_hwmod_ocp_if *os; + int addr_cnt; os = oh->slaves[i]; + addr_cnt = _count_ocp_if_addr_spaces(os); - for (j = 0; j < os->addr_cnt; j++) { + for (j = 0; j < addr_cnt; j++) { (res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index c4d0ae87..1a7ce3e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { @@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2420_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { @@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2420_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", .addr = omap2420_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", .addr = omap2420_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", .addr = omap2420_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2420_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { @@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2420_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { .pa_end = 0x48028000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { .slave = &omap2420_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2420_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2420_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2420_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2420_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2420_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2420_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2420_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2420_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2420_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2420_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2420_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2420_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { @@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", .addr = omap2420_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2420_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2420_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2420_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { .pa_end = 0x480181ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { @@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { .slave = &omap2420_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { .pa_end = 0x4801a1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { @@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { .slave = &omap2420_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { .pa_end = 0x4801c1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { @@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { .slave = &omap2420_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { .pa_end = 0x4801e1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { @@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { .slave = &omap2420_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2420_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, .addr = omap2420_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2420_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2420_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9682dd5..da28794 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { @@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { .slave = &omap2430_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2430_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { @@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { .slave = &omap2430_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2430_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2430_uart1_hwmod, .clk = "uart1_ick", .addr = omap2430_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2430_uart2_hwmod, .clk = "uart2_ick", .addr = omap2430_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2430_uart3_hwmod, .clk = "uart3_ick", .addr = omap2430_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { .slave = &omap2430_usbhsotg_hwmod, .clk = "usb_l4_ick", .addr = omap2430_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { @@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { .slave = &omap2430_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap2430_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc2_hwmod, - .addr = omap2430_mmc2_addr_space, .clk = "mmchs2_ick", - .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), + .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { @@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2430_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { @@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2430_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { @@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .slave = &omap2430_mcspi3_hwmod, .clk = "mcspi3_ick", .addr = omap2430_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { .pa_end = 0x49018000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { .slave = &omap2430_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2430_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { .slave = &omap2430_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2430_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { .slave = &omap2430_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2430_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { .slave = &omap2430_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2430_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { .slave = &omap2430_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2430_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { .slave = &omap2430_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2430_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { .slave = &omap2430_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2430_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { .slave = &omap2430_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2430_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { .slave = &omap2430_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2430_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { .slave = &omap2430_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2430_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { .slave = &omap2430_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2430_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { .slave = &omap2430_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2430_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { .pa_end = 0x4901607f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { @@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .slave = &omap2430_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2430_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { .slave = &omap2430_dss_core_hwmod, .clk = "dss_ick", .addr = omap2430_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .slave = &omap2430_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2430_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .slave = &omap2430_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2430_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .slave = &omap2430_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2430_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { .pa_end = 0x4900C1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { @@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { .slave = &omap2430_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { .pa_end = 0x4900E1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { @@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { .slave = &omap2430_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { .pa_end = 0x490101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { @@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { .slave = &omap2430_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { .pa_end = 0x490121ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { @@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { .slave = &omap2430_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { .pa_end = 0x480B61ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { @@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { .slave = &omap2430_gpio5_hwmod, .clk = "gpio5_ick", .addr = omap2430_gpio5_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { .slave = &omap2430_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2430_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mailbox_hwmod, .addr = omap2430_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .slave = &omap2430_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2430_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .slave = &omap2430_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2430_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { .pa_end = 0x4808C0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp3 */ @@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { .slave = &omap2430_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap2430_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { .pa_end = 0x4808E0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp4 */ @@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { .slave = &omap2430_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap2430_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { .slave = &omap2430_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap2430_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 909a84d..6410779 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { .pa_end = 0x6800ffff, .flags = ADDR_TYPE_RT, }, + { } }; /* MPU -> L3 interface */ @@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { .master = &omap3xxx_mpu_hwmod, .slave = &omap3xxx_l3_main_hwmod, .addr = omap3xxx_l3_main_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), .user = OCP_USER_MPU, }; @@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { @@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { .slave = &omap3xxx_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap3xxx_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { @@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { .slave = &omap3xxx_mmc2_hwmod, .clk = "mmchs2_ick", .addr = omap3xxx_mmc2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { .pa_end = 0x480ad1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { @@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { .slave = &omap3xxx_mmc3_hwmod, .clk = "mmchs3_ick", .addr = omap3xxx_mmc3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { @@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { .slave = &omap3xxx_uart1_hwmod, .clk = "uart1_ick", .addr = omap3xxx_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { @@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { .slave = &omap3xxx_uart2_hwmod, .clk = "uart2_ick", .addr = omap3xxx_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { @@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { .slave = &omap3xxx_uart3_hwmod, .clk = "uart3_ick", .addr = omap3xxx_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { @@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { .slave = &omap3xxx_uart4_hwmod, .clk = "uart4_ick", .addr = omap3xxx_uart4_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { @@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap3xxx_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, @@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { @@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap3xxx_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, @@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { @@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .slave = &omap3xxx_i2c3_hwmod, .clk = "i2c3_ick", .addr = omap3xxx_i2c3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, @@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { @@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { .slave = &omap34xx_sr1_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), .user = OCP_USER_MPU, }; @@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { .slave = &omap34xx_sr2_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), .user = OCP_USER_MPU, }; @@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { .slave = &omap3xxx_usbhsotg_hwmod, .clk = "l4_ick", .addr = omap3xxx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { .slave = &am35xx_usbhsotg_hwmod, .clk = "l4_ick", .addr = am35xx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { .pa_end = 0x48318000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { .slave = &omap3xxx_timer1_hwmod, .clk = "gpt1_ick", .addr = omap3xxx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { .pa_end = 0x49032000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { .slave = &omap3xxx_timer2_hwmod, .clk = "gpt2_ick", .addr = omap3xxx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { .pa_end = 0x49034000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .slave = &omap3xxx_timer3_hwmod, .clk = "gpt3_ick", .addr = omap3xxx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { .pa_end = 0x49036000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { .slave = &omap3xxx_timer4_hwmod, .clk = "gpt4_ick", .addr = omap3xxx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { .pa_end = 0x49038000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer5 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { .slave = &omap3xxx_timer5_hwmod, .clk = "gpt5_ick", .addr = omap3xxx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { .pa_end = 0x4903A000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer6 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { .slave = &omap3xxx_timer6_hwmod, .clk = "gpt6_ick", .addr = omap3xxx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { .pa_end = 0x4903C000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer7 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { .slave = &omap3xxx_timer7_hwmod, .clk = "gpt7_ick", .addr = omap3xxx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { .pa_end = 0x4903E000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer8 */ @@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { .slave = &omap3xxx_timer8_hwmod, .clk = "gpt8_ick", .addr = omap3xxx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { .pa_end = 0x49040000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { .slave = &omap3xxx_timer9_hwmod, .clk = "gpt9_ick", .addr = omap3xxx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", .addr = omap3xxx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", .addr = omap3xxx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { .pa_end = 0x48304000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = { .slave = &omap3xxx_timer12_hwmod, .clk = "gpt12_ick", .addr = omap3xxx_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { .pa_end = 0x4831407f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", .addr = omap3xxx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, @@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, @@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, @@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { .pa_end = 0x4804FFFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dsi1 */ @@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dsi1_hwmod, .addr = omap3xxx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, @@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, @@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_tv_fck", .addr = omap3xxx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, @@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { .pa_end = 0x483101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_gpio1_hwmod, .addr = omap3xxx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { .pa_end = 0x490501ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio2_hwmod, .addr = omap3xxx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { .pa_end = 0x490521ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio3_hwmod, .addr = omap3xxx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { .pa_end = 0x490541ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio4_hwmod, .addr = omap3xxx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { .pa_end = 0x490561ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio5_hwmod, .addr = omap3xxx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { .pa_end = 0x490581ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio6_hwmod, .addr = omap3xxx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system master ports */ @@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { .slave = &omap3xxx_dma_system_hwmod, .clk = "core_l4_ick", .addr = omap3xxx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { .slave = &omap3xxx_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap3xxx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2 */ @@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3 */ @@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { .slave = &omap3xxx_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { .slave = &omap3xxx_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap3xxx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { .slave = &omap3xxx_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap3xxx_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { .pa_end = 0x490280ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2_sidetone */ @@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { .slave = &omap3xxx_mcbsp2_sidetone_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { .pa_end = 0x4902A0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3_sidetone */ @@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { .slave = &omap3xxx_mcbsp3_sidetone_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mailbox_hwmod, .addr = omap3xxx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { @@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", .addr = omap34xx_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { @@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", .addr = omap34xx_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { @@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", .addr = omap34xx_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { .pa_end = 0x480ba0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { @@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { .slave = &omap34xx_mcspi4, .clk = "mcspi4_ick", .addr = omap34xx_mcspi4_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e1c69ff..81fd313 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { .pa_end = 0x4e0007ff, .flags = ADDR_TYPE_RT }, + { } }; /* mpu -> dmm */ @@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { .slave = &omap44xx_dmm_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dmm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), .user = OCP_USER_MPU, }; @@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { .pa_end = 0x4a20c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> emif_fw */ @@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { .slave = &omap44xx_emif_fw_hwmod, .clk = "l4_div_ck", .addr = omap44xx_emif_fw_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), .user = OCP_USER_MPU, }; @@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { .pa_end = 0x44000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* mpu -> l3_main_1 */ @@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { .slave = &omap44xx_l3_main_1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { .pa_end = 0x44801fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_2 */ @@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { .pa_end = 0x45000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_3 */ @@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { .slave = &omap44xx_l3_main_3_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -696,6 +696,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { .pa_end = 0x401f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess */ @@ -704,7 +705,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), .user = OCP_USER_MPU, }; @@ -714,6 +714,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { .pa_end = 0x490f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess (dma) */ @@ -722,7 +723,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), .user = OCP_USER_SDMA, }; @@ -806,6 +806,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { .pa_end = 0x4a30401f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> counter_32k */ @@ -814,7 +815,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { .slave = &omap44xx_counter_32k_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_counter_32k_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -888,6 +888,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { .pa_end = 0x4a056fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> dma_system */ @@ -896,7 +897,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { .slave = &omap44xx_dma_system_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -960,6 +960,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { .pa_end = 0x4012e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic */ @@ -968,7 +969,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), .user = OCP_USER_MPU, }; @@ -978,6 +978,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { .pa_end = 0x4902e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic (dma) */ @@ -986,7 +987,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1127,6 +1127,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { .pa_end = 0x5800007f, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss */ @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1145,6 +1145,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { .pa_end = 0x4804007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss */ @@ -1153,7 +1154,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), .user = OCP_USER_MPU, }; @@ -1227,6 +1227,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { .pa_end = 0x58001fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dispc */ @@ -1235,7 +1236,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dispc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1245,6 +1245,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { .pa_end = 0x48041fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dispc */ @@ -1253,7 +1254,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), .user = OCP_USER_MPU, }; @@ -1318,6 +1318,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { .pa_end = 0x580041ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi1 */ @@ -1326,7 +1327,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1336,6 +1336,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { .pa_end = 0x480441ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi1 */ @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), .user = OCP_USER_MPU, }; @@ -1388,6 +1388,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { .pa_end = 0x580051ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi2 */ @@ -1396,7 +1397,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1406,6 +1406,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { .pa_end = 0x480451ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi2 */ @@ -1414,7 +1415,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), .user = OCP_USER_MPU, }; @@ -1478,6 +1478,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { .pa_end = 0x58006fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_hdmi */ @@ -1486,7 +1487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_hdmi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1496,6 +1496,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { .pa_end = 0x48046fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_hdmi */ @@ -1504,7 +1505,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_hdmi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), .user = OCP_USER_MPU, }; @@ -1564,6 +1564,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { .pa_end = 0x580020ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_rfbi */ @@ -1572,7 +1573,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_rfbi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1582,6 +1582,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { .pa_end = 0x480420ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_rfbi */ @@ -1590,7 +1591,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), .user = OCP_USER_MPU, }; @@ -1633,6 +1633,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { .pa_end = 0x580030ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_venc */ @@ -1641,7 +1642,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_venc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1651,6 +1651,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { .pa_end = 0x480430ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_venc */ @@ -1659,7 +1660,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), .user = OCP_USER_MPU, }; @@ -1724,6 +1724,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { .pa_end = 0x4a3101ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> gpio1 */ @@ -1732,7 +1733,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { .slave = &omap44xx_gpio1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1776,6 +1776,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { .pa_end = 0x480551ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio2 */ @@ -1784,7 +1785,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { .slave = &omap44xx_gpio2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1829,6 +1829,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { .pa_end = 0x480571ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio3 */ @@ -1837,7 +1838,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { .slave = &omap44xx_gpio3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1882,6 +1882,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { .pa_end = 0x480591ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio4 */ @@ -1890,7 +1891,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { .slave = &omap44xx_gpio4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1935,6 +1935,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { .pa_end = 0x4805b1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio5 */ @@ -1943,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { .slave = &omap44xx_gpio5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1988,6 +1988,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { .pa_end = 0x4805d1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio6 */ @@ -1996,7 +1997,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { .slave = &omap44xx_gpio6_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,6 +2071,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { .pa_end = 0x4a05bfff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> hsi */ @@ -2079,7 +2080,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { .slave = &omap44xx_hsi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_hsi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2144,6 +2144,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { .pa_end = 0x480700ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c1 */ @@ -2152,7 +2153,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { .slave = &omap44xx_i2c1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2197,6 +2197,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { .pa_end = 0x480720ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c2 */ @@ -2205,7 +2206,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { .slave = &omap44xx_i2c2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2250,6 +2250,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { .pa_end = 0x480600ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c3 */ @@ -2258,7 +2259,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { .slave = &omap44xx_i2c3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2303,6 +2303,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { .pa_end = 0x483500ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c4 */ @@ -2311,7 +2312,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { .slave = &omap44xx_i2c4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2478,6 +2478,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { .pa_end = 0x520000ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iss */ @@ -2486,7 +2487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { .slave = &omap44xx_iss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2561,6 +2561,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { .pa_end = 0x5a07ffff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iva */ @@ -2569,7 +2570,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { .slave = &omap44xx_iva_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), .user = OCP_USER_MPU, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { .pa_end = 0x4a31c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> kbd */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { .slave = &omap44xx_kbd_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_kbd_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2729,6 +2729,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { .pa_end = 0x4a0f41ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> mailbox */ @@ -2737,7 +2738,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { .slave = &omap44xx_mailbox_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2798,6 +2798,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { .pa_end = 0x401220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 */ @@ -2806,7 +2807,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), .user = OCP_USER_MPU, }; @@ -2817,6 +2817,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 (dma) */ @@ -2825,7 +2826,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2871,6 +2871,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { .pa_end = 0x401240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 */ @@ -2879,7 +2880,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), .user = OCP_USER_MPU, }; @@ -2890,6 +2890,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 (dma) */ @@ -2898,7 +2899,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2944,6 +2944,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { .pa_end = 0x401260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 */ @@ -2952,7 +2953,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), .user = OCP_USER_MPU, }; @@ -2963,6 +2963,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 (dma) */ @@ -2971,7 +2972,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3016,6 +3016,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -3024,7 +3025,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { .slave = &omap44xx_mcbsp4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3089,6 +3089,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { .pa_end = 0x4013207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm */ @@ -3097,7 +3098,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), .user = OCP_USER_MPU, }; @@ -3107,6 +3107,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { .pa_end = 0x4903207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm (dma) */ @@ -3115,7 +3116,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3188,6 +3188,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { .pa_end = 0x480981ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi1 */ @@ -3196,7 +3197,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { .slave = &omap44xx_mcspi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3248,6 +3248,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { .pa_end = 0x4809a1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi2 */ @@ -3256,7 +3257,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { .slave = &omap44xx_mcspi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3308,6 +3308,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { .pa_end = 0x480b81ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi3 */ @@ -3316,7 +3317,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { .slave = &omap44xx_mcspi3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3366,6 +3366,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { .pa_end = 0x480ba1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi4 */ @@ -3374,7 +3375,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { .slave = &omap44xx_mcspi4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3451,6 +3451,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { .pa_end = 0x4809c3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc1 */ @@ -3459,7 +3460,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { .slave = &omap44xx_mmc1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3515,6 +3515,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { .pa_end = 0x480b43ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc2 */ @@ -3523,7 +3524,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { .slave = &omap44xx_mmc2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3569,6 +3569,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { .pa_end = 0x480ad3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc3 */ @@ -3577,7 +3578,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { .slave = &omap44xx_mmc3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3621,6 +3621,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { .pa_end = 0x480d13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc4 */ @@ -3629,7 +3630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { .slave = &omap44xx_mmc4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3673,6 +3673,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { .pa_end = 0x480d53ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc5 */ @@ -3681,7 +3682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { .slave = &omap44xx_mmc5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3786,6 +3786,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { .pa_end = 0x4a0dd03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_core */ @@ -3794,7 +3795,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { .slave = &omap44xx_smartreflex_core_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_core_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3832,6 +3832,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { .pa_end = 0x4a0db03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_iva */ @@ -3840,7 +3841,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { .slave = &omap44xx_smartreflex_iva_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3878,6 +3878,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { .pa_end = 0x4a0d903f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_mpu */ @@ -3886,7 +3887,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { .slave = &omap44xx_smartreflex_mpu_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_mpu_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3943,6 +3943,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { .pa_end = 0x4a0f6fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> spinlock */ @@ -3951,7 +3952,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { .slave = &omap44xx_spinlock_hwmod, .clk = "l4_div_ck", .addr = omap44xx_spinlock_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4023,6 +4023,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { .pa_end = 0x4a31807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -4031,7 +4032,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { .slave = &omap44xx_timer1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4068,6 +4068,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { .pa_end = 0x4803207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -4076,7 +4077,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { .slave = &omap44xx_timer2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4113,6 +4113,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { .pa_end = 0x4803407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -4121,7 +4122,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { .slave = &omap44xx_timer3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4158,6 +4158,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { .pa_end = 0x4803607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -4166,7 +4167,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { .slave = &omap44xx_timer4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4203,6 +4203,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { .pa_end = 0x4013807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 */ @@ -4211,7 +4212,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), .user = OCP_USER_MPU, }; @@ -4221,6 +4221,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { .pa_end = 0x4903807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 (dma) */ @@ -4229,7 +4230,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4267,6 +4267,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { .pa_end = 0x4013a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 */ @@ -4275,7 +4276,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), .user = OCP_USER_MPU, }; @@ -4285,6 +4285,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { .pa_end = 0x4903a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 (dma) */ @@ -4293,7 +4294,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4331,6 +4331,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { .pa_end = 0x4013c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 */ @@ -4339,7 +4340,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), .user = OCP_USER_MPU, }; @@ -4349,6 +4349,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { .pa_end = 0x4903c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 (dma) */ @@ -4357,7 +4358,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4395,6 +4395,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { .pa_end = 0x4013e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 */ @@ -4403,7 +4404,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), .user = OCP_USER_MPU, }; @@ -4413,6 +4413,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { .pa_end = 0x4903e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 (dma) */ @@ -4421,7 +4422,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4459,6 +4459,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { .pa_end = 0x4803e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -4467,7 +4468,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { .slave = &omap44xx_timer9_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4504,6 +4504,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { .pa_end = 0x4808607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer10 */ @@ -4512,7 +4513,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { .slave = &omap44xx_timer10_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4549,6 +4549,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { .pa_end = 0x4808807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer11 */ @@ -4557,7 +4558,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { .slave = &omap44xx_timer11_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4621,6 +4621,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { .pa_end = 0x4806a0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart1 */ @@ -4629,7 +4630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { .slave = &omap44xx_uart1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4673,6 +4673,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { .pa_end = 0x4806c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart2 */ @@ -4681,7 +4682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { .slave = &omap44xx_uart2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4725,6 +4725,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { .pa_end = 0x480200ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart3 */ @@ -4733,7 +4734,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { .slave = &omap44xx_uart3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4778,6 +4778,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { .pa_end = 0x4806e0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart4 */ @@ -4786,7 +4787,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { .slave = &omap44xx_uart4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4853,6 +4853,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { .pa_end = 0x4a0ab003, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> usb_otg_hs */ @@ -4861,7 +4862,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { .slave = &omap44xx_usb_otg_hs_hwmod, .clk = "l4_div_ck", .addr = omap44xx_usb_otg_hs_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4930,6 +4930,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { .pa_end = 0x4a31407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> wd_timer2 */ @@ -4938,7 +4939,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { .slave = &omap44xx_wd_timer2_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4975,6 +4975,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { .pa_end = 0x4013007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 */ @@ -4983,7 +4984,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), .user = OCP_USER_MPU, }; @@ -4993,6 +4993,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { .pa_end = 0x4903007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 (dma) */ @@ -5001,7 +5002,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), .user = OCP_USER_SDMA, }; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1adea9c..523e0b5 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -220,7 +220,6 @@ struct omap_hwmod_addr_space { * @clk: interface clock: OMAP clock name * @_clk: pointer to the interface struct clk (filled in at runtime) * @fw: interface firewall data - * @addr_cnt: ARRAY_SIZE(@addr) * @width: OCP data width * @user: initiators using this interface (see OCP_USER_* macros above) * @flags: OCP interface flags (see OCPIF_* macros above) @@ -239,7 +238,6 @@ struct omap_hwmod_ocp_if { union { struct omap_hwmod_omap2_firewall omap2; } fw; - u8 addr_cnt; u8 width; u8 user; u8 flags; -- cgit v0.10.2 From ded11383fc14a7483cf30700ffc253caf37c9933 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:06 -0600 Subject: omap_hwmod: share identical omap_hwmod_addr_space arrays To reduce kernel source file data duplication, share struct omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ff1466f..8a75d17 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_2420_data.o +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_2430_data.o +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ + omap_hwmod_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o # EMU peripherals diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 1a7ce3e..3ec625c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; static struct omap_hwmod omap2420_mcbsp2_hwmod; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", - .addr = omap2420_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", - .addr = omap2420_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { - { - .pa_start = OMAP2_UART1_BASE, - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", - .addr = omap2420_uart1_addr_space, + .addr = omap2xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { - { - .pa_start = OMAP2_UART2_BASE, - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", - .addr = omap2420_uart2_addr_space, + .addr = omap2xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { - { - .pa_start = OMAP2_UART3_BASE, - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", - .addr = omap2420_uart3_addr_space, + .addr = omap2xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2420_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2420_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { { .irq = 38, }, }; -static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { - { - .pa_start = 0x4802a000, - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap2420_timer2_addrs, + .addr = omap2xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { { .irq = 39, }, }; -static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap2420_timer3_addrs, + .addr = omap2xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { { .irq = 40, }, }; -static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { - { - .pa_start = 0x4807a000, - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap2420_timer4_addrs, + .addr = omap2xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { { .irq = 41, }, }; -static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { - { - .pa_start = 0x4807c000, - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap2420_timer5_addrs, + .addr = omap2xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { { .irq = 42, }, }; -static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { - { - .pa_start = 0x4807e000, - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap2420_timer6_addrs, + .addr = omap2xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { { .irq = 43, }, }; -static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap2420_timer7_addrs, + .addr = omap2xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { { .irq = 44, }, }; -static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { - { - .pa_start = 0x48082000, - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap2420_timer8_addrs, + .addr = omap2xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { { .irq = 45, }, }; -static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { - { - .pa_start = 0x48084000, - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap2420_timer9_addrs, + .addr = omap2xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2420_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2420_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { { .irq = 48, }, }; -static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap2420_timer12_addrs, + .addr = omap2xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { &omap2420_dss__l3, }; -static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { .sysc = &omap2420_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", - .addr = omap2420_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ }; -static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { - { - .pa_start = 0x48056000, - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { .master = &omap2420_dma_system_hwmod, @@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", - .addr = omap2420_dma_system_addrs, + .addr = omap2_dma_system_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "iva", .irq = 34 }, }; -static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> mailbox */ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, - .addr = omap2420_mailbox_addrs, + .addr = omap2_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { { .name = "tx", .dma_req = 31 }, }; -static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap2420_mcbsp1_addrs, + .addr = omap2_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { { .name = "tx", .dma_req = 33 }, }; -static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48076000, - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap2420_mcbsp2_addrs, + .addr = omap2xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index da28794..9531ef2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { .user = OCP_USER_MPU, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2430_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2430_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { - { - .pa_start = OMAP2_UART1_BASE, - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart1_hwmod, .clk = "uart1_ick", - .addr = omap2430_uart1_addr_space, + .addr = omap2xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { - { - .pa_start = OMAP2_UART2_BASE, - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart2_hwmod, .clk = "uart2_ick", - .addr = omap2430_uart2_addr_space, + .addr = omap2xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { - { - .pa_start = OMAP2_UART3_BASE, - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_uart3_hwmod, .clk = "uart3_ick", - .addr = omap2430_uart3_addr_space, + .addr = omap2xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { }; /* L4 CORE -> MMC1 interface */ -static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc1_hwmod, @@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { }; /* L4 CORE -> MMC2 interface */ -static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc2_hwmod, @@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { }; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", - .addr = omap2430_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", - .addr = omap2430_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ -static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcspi3_hwmod, @@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { { .irq = 38, }, }; -static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { - { - .pa_start = 0x4802a000, - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap2430_timer2_addrs, + .addr = omap2xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { { .irq = 39, }, }; -static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap2430_timer3_addrs, + .addr = omap2xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { { .irq = 40, }, }; -static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { - { - .pa_start = 0x4807a000, - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap2430_timer4_addrs, + .addr = omap2xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { { .irq = 41, }, }; -static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { - { - .pa_start = 0x4807c000, - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap2430_timer5_addrs, + .addr = omap2xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { { .irq = 42, }, }; -static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { - { - .pa_start = 0x4807e000, - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap2430_timer6_addrs, + .addr = omap2xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { { .irq = 43, }, }; -static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap2430_timer7_addrs, + .addr = omap2xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { { .irq = 44, }, }; -static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { - { - .pa_start = 0x48082000, - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap2430_timer8_addrs, + .addr = omap2xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { { .irq = 45, }, }; -static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { - { - .pa_start = 0x48084000, - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap2430_timer9_addrs, + .addr = omap2xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2430_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2430_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { { .irq = 48, }, }; -static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap2430_timer12_addrs, + .addr = omap2xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { &omap2430_dss__l3, }; -static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_addrs, + .addr = omap2_dss_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { .sysc = &omap2430_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2430_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dss_venc_hwmod, .clk = "dss_54m_fck", - .addr = omap2430_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ }; -static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { - { - .pa_start = 0x48056000, - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { .master = &omap2430_dma_system_hwmod, @@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_dma_system_hwmod, .clk = "sdma_ick", - .addr = omap2430_dma_system_addrs, + .addr = omap2_dma_system_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { { .irq = 26 }, }; -static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> mailbox */ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mailbox_hwmod, - .addr = omap2430_mailbox_addrs, + .addr = omap2_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { { .name = "tx", .dma_req = 31 }, }; -static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap2430_mcbsp1_addrs, + .addr = omap2_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { { .name = "tx", .dma_req = 33 }, }; -static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48076000, - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap2430_mcbsp2_addrs, + .addr = omap2xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c new file mode 100644 index 0000000..04637fa --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c @@ -0,0 +1,173 @@ +/* + * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3 + * + * Copyright (C) 2009-2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * XXX these should be marked initdata for multi-OMAP kernels + */ +#include + +#include +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { + { + .pa_start = 0x4809c000, + .pa_end = 0x4809c1ff, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { + { + .pa_start = 0x480b4000, + .pa_end = 0x480b41ff, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { + { + .pa_start = 0x48070000, + .pa_end = 0x48070000 + SZ_128 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { + { + .pa_start = 0x48072000, + .pa_end = 0x48072000 + SZ_128 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_addrs[] = { + { + .pa_start = 0x48050000, + .pa_end = 0x48050000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { + { + .pa_start = 0x48050400, + .pa_end = 0x48050400 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { + { + .pa_start = 0x48050800, + .pa_end = 0x48050800 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { + { + .pa_start = 0x48050C00, + .pa_end = 0x48050C00 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_timer10_addrs[] = { + { + .pa_start = 0x48086000, + .pa_end = 0x48086000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_timer11_addrs[] = { + { + .pa_start = 0x48088000, + .pa_end = 0x48088000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { + { + .pa_start = 0x4808a000, + .pa_end = 0x4808a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { + { + .pa_start = 0x48098000, + .pa_end = 0x48098000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { + { + .pa_start = 0x4809a000, + .pa_end = 0x4809a000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { + { + .pa_start = 0x480b8000, + .pa_end = 0x480b8000 + SZ_256 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { + { + .pa_start = 0x48056000, + .pa_end = 0x48056000 + SZ_4K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { + { + .pa_start = 0x48094000, + .pa_end = 0x48094000 + SZ_512 - 1, + .flags = ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, + { } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c new file mode 100644 index 0000000..4f3547c --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -0,0 +1,130 @@ +/* + * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx + * + * Copyright (C) 2009-2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * XXX these should be marked initdata for multi-OMAP kernels + */ +#include + +#include +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { + { + .pa_start = OMAP2_UART1_BASE, + .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { + { + .pa_start = OMAP2_UART2_BASE, + .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { + { + .pa_start = OMAP2_UART3_BASE, + .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { + { + .pa_start = 0x4802a000, + .pa_end = 0x4802a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { + { + .pa_start = 0x48078000, + .pa_end = 0x48078000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { + { + .pa_start = 0x4807a000, + .pa_end = 0x4807a000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { + { + .pa_start = 0x4807c000, + .pa_end = 0x4807c000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { + { + .pa_start = 0x4807e000, + .pa_end = 0x4807e000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { + { + .pa_start = 0x48080000, + .pa_end = 0x48080000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { + { + .pa_start = 0x48082000, + .pa_end = 0x48082000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { + { + .pa_start = 0x48084000, + .pa_end = 0x48084000 + SZ_1K - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, + { } +}; + + diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 6410779..791f9b2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { }; /* L4 CORE -> MMC1 interface */ -static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { - { - .pa_start = 0x4809c000, - .pa_end = 0x4809c1ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmc1_hwmod, .clk = "mmchs1_ick", - .addr = omap3xxx_mmc1_addr_space, + .addr = omap2430_mmc1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; /* L4 CORE -> MMC2 interface */ -static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { - { - .pa_start = 0x480b4000, - .pa_end = 0x480b41ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmc2_hwmod, .clk = "mmchs2_ick", - .addr = omap3xxx_mmc2_addr_space, + .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap3xxx_i2c1_addr_space, + .addr = omap2_i2c1_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, @@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap3xxx_i2c2_addr_space, + .addr = omap2_i2c2_addr_space, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, @@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { { .pa_start = 0x48060000, - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, + .pa_end = 0x48060000 + SZ_128 - 1, .flags = ADDR_TYPE_RT, }, { } @@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { { .irq = 46, }, }; -static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap3xxx_timer10_addrs, + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { { .irq = 47, }, }; -static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap3xxx_timer11_addrs, + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = { &omap3xxx_dss__l3, }; -static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, @@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_addrs, + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, @@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { { .irq = 25 }, }; -static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_dispc_addrs, + .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, @@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { .sysc = &omap3xxx_rfbi_sysc, }; -static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap3xxx_dss_rfbi_addrs, + .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, @@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { .name = "venc", }; -/* dss_venc */ -static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_tv_fck", - .addr = omap3xxx_dss_venc_addrs, + .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, @@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { }; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", - .addr = omap34xx_mcspi1_addr_space, + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", - .addr = omap34xx_mcspi2_addr_space, + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi3 interface */ -static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { - { - .pa_start = 0x480b8000, - .pa_end = 0x480b80ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", - .addr = omap34xx_mcspi3_addr_space, + .addr = omap2430_mcspi3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index c34e98b..76a2f11 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -1,10 +1,10 @@ /* * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations * - * Copyright (C) 2010 Nokia Corporation + * Copyright (C) 2010-2011 Nokia Corporation * Paul Walmsley * - * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2010-2011 Texas Instruments, Inc. * Benoît Cousson * * This program is free software; you can redistribute it and/or modify @@ -16,10 +16,44 @@ #include +/* Common address space across OMAP2xxx */ +extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[]; +extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[]; +extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; + +/* Common address space across OMAP2xxx/3xxx */ +extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; +extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; +extern struct omap_hwmod_addr_space omap2_dss_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; +extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; +extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; +extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; +extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; +extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; +extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; +extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; +extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; +extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; +extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; +extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; + /* OMAP hwmod classes - forward declarations */ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; extern struct omap_hwmod_class mpu_hwmod_class; extern struct omap_hwmod_class iva_hwmod_class; + #endif -- cgit v0.10.2 From 212738a4499d278254ed6fdb400e3b4be4cb1de2 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:06 -0600 Subject: omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 77094d7..21e3eb8 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } /** + * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of MPU IRQs associated with the hwmod + * @oh. Used to allocate struct resource data. Returns 0 if @oh is + * NULL. + */ +static int _count_mpu_irqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_irq_info *ohii; + int i = 0; + + if (!oh || !oh->mpu_irqs) + return 0; + + do { + ohii = &oh->mpu_irqs[i++]; + } while (ohii->irq != -1); + + return i; +} + +/** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh * @@ -1964,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -1984,12 +2007,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j; + int i, j, mpu_irqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ - for (i = 0; i < oh->mpu_irqs_cnt; i++) { + mpu_irqs_cnt = _count_mpu_irqs(oh); + for (i = 0; i < mpu_irqs_cnt; i++) { (res + r)->name = (oh->mpu_irqs + i)->name; (res + r)->start = (oh->mpu_irqs + i)->irq; (res + r)->end = (oh->mpu_irqs + i)->irq; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 3ec625c..04730d3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { static struct omap_hwmod omap2420_timer1_hwmod; static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { @@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2420_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { static struct omap_hwmod omap2420_timer2_hwmod; static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; @@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2420_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { static struct omap_hwmod omap2420_timer3_hwmod; static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2420_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { static struct omap_hwmod omap2420_timer4_hwmod; static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2420_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { static struct omap_hwmod omap2420_timer5_hwmod; static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2420_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { static struct omap_hwmod omap2420_timer6_hwmod; static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2420_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { static struct omap_hwmod omap2420_timer7_hwmod; static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2420_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { static struct omap_hwmod omap2420_timer8_hwmod; static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2420_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { static struct omap_hwmod omap2420_timer9_hwmod; static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2420_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { static struct omap_hwmod omap2420_timer10_hwmod; static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2420_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { static struct omap_hwmod omap2420_timer11_hwmod; static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2420_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { static struct omap_hwmod omap2420_timer12_hwmod; static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2420_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, .mpu_irqs = omap2420_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { @@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { @@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { @@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { @@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", .class = &omap2420_dma_hwmod_class, .mpu_irqs = omap2420_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), @@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "dsp", .irq = 26 }, { .name = "iva", .irq = 34 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", .class = &omap2420_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { @@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2420_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { @@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2420_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { @@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), .sdma_reqs = omap2420_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { @@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), .sdma_reqs = omap2420_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9531ef2..2c28468 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { static struct omap_hwmod omap2430_timer1_hwmod; static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { @@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { static struct omap_hwmod omap2430_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2430_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { static struct omap_hwmod omap2430_timer2_hwmod; static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; /* l4_core -> timer2 */ @@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { static struct omap_hwmod omap2430_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2430_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { static struct omap_hwmod omap2430_timer3_hwmod; static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { static struct omap_hwmod omap2430_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2430_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { static struct omap_hwmod omap2430_timer4_hwmod; static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { static struct omap_hwmod omap2430_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2430_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { static struct omap_hwmod omap2430_timer5_hwmod; static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { static struct omap_hwmod omap2430_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2430_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { static struct omap_hwmod omap2430_timer6_hwmod; static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { static struct omap_hwmod omap2430_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2430_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { static struct omap_hwmod omap2430_timer7_hwmod; static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { static struct omap_hwmod omap2430_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2430_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { static struct omap_hwmod omap2430_timer8_hwmod; static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { static struct omap_hwmod omap2430_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2430_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { static struct omap_hwmod omap2430_timer9_hwmod; static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { static struct omap_hwmod omap2430_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2430_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { static struct omap_hwmod omap2430_timer10_hwmod; static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { static struct omap_hwmod omap2430_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2430_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { static struct omap_hwmod omap2430_timer11_hwmod; static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { static struct omap_hwmod omap2430_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2430_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { static struct omap_hwmod omap2430_timer12_hwmod; static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { static struct omap_hwmod omap2430_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2430_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, .mpu_irqs = omap2430_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", @@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", @@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { @@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { @@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { @@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { @@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { @@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), .main_clk = "gpio5_fck", .prcm = { .omap2 = { @@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", .class = &omap2430_dma_hwmod_class, .mpu_irqs = omap2430_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), @@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { static struct omap_hwmod omap2430_mailbox_hwmod; static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", .class = &omap2430_mailbox_hwmod_class, .mpu_irqs = omap2430_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2430_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { @@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2430_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { /* mcspi3 */ static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { { .irq = 91 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { @@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), .sdma_reqs = omap2430_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap2430_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap2430_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), .main_clk = "usbhs_ick", .prcm = { .omap2 = { @@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .name = "rx", .irq = 60 }, { .name = "ovr", .irq = 61 }, { .name = "common", .irq = 64 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { @@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), .sdma_reqs = omap2430_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, { .name = "common", .irq = 16 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { @@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), .sdma_reqs = omap2430_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, { .name = "common", .irq = 17 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { @@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), .sdma_reqs = omap2430_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, { .name = "common", .irq = 18 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { @@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), .sdma_reqs = omap2430_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, { .name = "common", .irq = 19 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), .sdma_reqs = omap2430_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = { static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { { .irq = 83 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { @@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .name = "mmc1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), .sdma_reqs = omap2430_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, @@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { { .irq = 86 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { @@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .name = "mmc2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), .sdma_reqs = omap2430_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 791f9b2..cc178b5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { { .irq = INT_34XX_L3_DBG_IRQ }, { .irq = INT_34XX_L3_APP_IRQ }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { @@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, .mpu_irqs = omap3xxx_l3_main_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), .masters = omap3xxx_l3_main_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, @@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { static struct omap_hwmod omap3xxx_timer1_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap3xxx_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { static struct omap_hwmod omap3xxx_timer2_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { @@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap3xxx_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { static struct omap_hwmod omap3xxx_timer3_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { @@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap3xxx_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { static struct omap_hwmod omap3xxx_timer4_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { @@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap3xxx_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { static struct omap_hwmod omap3xxx_timer5_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { @@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap3xxx_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { static struct omap_hwmod omap3xxx_timer6_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { @@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap3xxx_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { static struct omap_hwmod omap3xxx_timer7_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { @@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap3xxx_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { static struct omap_hwmod omap3xxx_timer8_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { @@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap3xxx_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { static struct omap_hwmod omap3xxx_timer9_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { @@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap3xxx_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { static struct omap_hwmod omap3xxx_timer10_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap3xxx_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { static struct omap_hwmod omap3xxx_timer11_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap3xxx_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { static struct omap_hwmod omap3xxx_timer12_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { { .irq = 95, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = { static struct omap_hwmod omap3xxx_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap3xxx_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { { .irq = INT_36XX_UART4_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { @@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), .sdma_reqs = uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, .mpu_irqs = omap3xxx_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* dss_dsi1 */ @@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, .mpu_irqs = omap3xxx_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { { .irq = INT_34XX_I2C3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { @@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), .sdma_reqs = i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { /* gpio1 */ static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { @@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { @@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { @@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { @@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { @@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), .main_clk = "gpio5_ick", .opt_clks = gpio5_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), @@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { /* gpio6 */ static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { @@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { .name = "gpio6", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), .main_clk = "gpio6_ick", .opt_clks = gpio6_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), @@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { .name = "dma", .class = &omap3xxx_dma_hwmod_class, .mpu_irqs = omap3xxx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), .main_clk = "core_l3_ick", .prcm = { .omap2 = { @@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .name = "irq", .irq = 16 }, { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { @@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { { .name = "irq", .irq = 17 }, { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { @@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { { .name = "irq", .irq = 22 }, { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { @@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { { .name = "irq", .irq = 23 }, { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { @@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { { .name = "irq", .irq = 27 }, { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { @@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { /* mcbsp2_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { { .name = "irq", .irq = 4 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { @@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { /* mcbsp3_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { { .name = "irq", .irq = 5 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { @@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { static struct omap_hwmod omap3xxx_mailbox_hwmod; static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { @@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { .name = "mailbox", .class = &omap3xxx_mailbox_hwmod_class, .mpu_irqs = omap3xxx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { { .name = "irq", .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { @@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap34xx_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), .sdma_reqs = omap34xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { /* mcspi2 */ static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { { .name = "irq", .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { @@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap34xx_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), .sdma_reqs = omap34xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { /* mcspi3 */ static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { { .name = "irq", .irq = 91 }, /* 91 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { @@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), .sdma_reqs = omap34xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { /* SPI4 */ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { @@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), .sdma_reqs = omap34xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), .main_clk = "hsotgusb_ick", .prcm = { .omap2 = { @@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 71 }, + { .irq = -1 } }; static struct omap_hwmod_class am35xx_usbotg_class = { @@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { static struct omap_hwmod am35xx_usbhsotg_hwmod = { .name = "am35x_otg_hs", .mpu_irqs = am35xx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), .main_clk = NULL, .prcm = { .omap2 = { @@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { { .irq = 83, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { @@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), .sdma_reqs = omap34xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, @@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { { .irq = INT_24XX_MMC2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { @@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = { static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), .sdma_reqs = omap34xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, @@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { { .irq = 94, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { @@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = { static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), .sdma_reqs = omap34xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 81fd313..bbfc4db 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { { .irq = 113 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod omap44xx_dmm_hwmod = { @@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { { .irq = 9 + OMAP44XX_IRQ_GIC_START }, { .irq = 10 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { @@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, .mpu_irqs = omap44xx_l3_targ_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -672,6 +672,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = { /* aess */ static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { { .irq = 99 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { @@ -736,7 +737,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .name = "aess", .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), .sdma_reqs = omap44xx_aess_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", @@ -875,6 +875,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* dma_system master ports */ @@ -909,7 +910,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .name = "dma_system", .class = &omap44xx_dma_hwmod_class, .mpu_irqs = omap44xx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), .main_clk = "l3_div_ck", .prcm = { .omap4 = { @@ -948,6 +948,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { static struct omap_hwmod omap44xx_dmic_hwmod; static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { { .irq = 114 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { @@ -1000,7 +1001,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .name = "dmic", .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), .sdma_reqs = omap44xx_dmic_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", @@ -1026,6 +1026,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = { /* dsp */ static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { { .irq = 28 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { @@ -1082,7 +1083,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .name = "dsp", .class = &omap44xx_dsp_hwmod_class, .mpu_irqs = omap44xx_dsp_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), .rst_lines = omap44xx_dsp_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), .main_clk = "dsp_fck", @@ -1215,6 +1215,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { static struct omap_hwmod omap44xx_dss_dispc_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { { .irq = 25 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { @@ -1267,7 +1268,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", @@ -1306,6 +1306,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { static struct omap_hwmod omap44xx_dss_dsi1_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { { .irq = 53 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { @@ -1358,7 +1359,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", @@ -1376,6 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { static struct omap_hwmod omap44xx_dss_dsi2_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { { .irq = 84 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { @@ -1428,7 +1429,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", @@ -1466,6 +1466,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { static struct omap_hwmod omap44xx_dss_hdmi_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { { .irq = 101 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { @@ -1518,7 +1519,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", @@ -1716,6 +1716,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { static struct omap_hwmod omap44xx_gpio1_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { { .irq = 29 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { @@ -1749,7 +1750,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .name = "gpio1", .class = &omap44xx_gpio_hwmod_class, .mpu_irqs = omap44xx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), .main_clk = "gpio1_ick", .prcm = { .omap4 = { @@ -1768,6 +1768,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { static struct omap_hwmod omap44xx_gpio2_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { { .irq = 30 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { @@ -1802,7 +1803,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), .main_clk = "gpio2_ick", .prcm = { .omap4 = { @@ -1821,6 +1821,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { static struct omap_hwmod omap44xx_gpio3_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { { .irq = 31 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { @@ -1855,7 +1856,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), .main_clk = "gpio3_ick", .prcm = { .omap4 = { @@ -1874,6 +1874,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { static struct omap_hwmod omap44xx_gpio4_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { { .irq = 32 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { @@ -1908,7 +1909,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), .main_clk = "gpio4_ick", .prcm = { .omap4 = { @@ -1927,6 +1927,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { static struct omap_hwmod omap44xx_gpio5_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { { .irq = 33 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { @@ -1961,7 +1962,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), .main_clk = "gpio5_ick", .prcm = { .omap4 = { @@ -1980,6 +1980,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { static struct omap_hwmod omap44xx_gpio6_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { { .irq = 34 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { @@ -2014,7 +2015,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), .main_clk = "gpio6_ick", .prcm = { .omap4 = { @@ -2058,6 +2058,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* hsi master ports */ @@ -2092,7 +2093,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .name = "hsi", .class = &omap44xx_hsi_hwmod_class, .mpu_irqs = omap44xx_hsi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), .main_clk = "hsi_fck", .prcm = { .omap4 = { @@ -2131,6 +2131,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { { .irq = 56 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { @@ -2166,7 +2167,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), .sdma_reqs = omap44xx_i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -2184,6 +2184,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { static struct omap_hwmod omap44xx_i2c2_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { { .irq = 57 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { @@ -2219,7 +2220,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), .sdma_reqs = omap44xx_i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { static struct omap_hwmod omap44xx_i2c3_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { { .irq = 61 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), .sdma_reqs = omap44xx_i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2290,6 +2290,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { static struct omap_hwmod omap44xx_i2c4_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { { .irq = 62 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { @@ -2325,7 +2326,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), .sdma_reqs = omap44xx_i2c4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", @@ -2351,6 +2351,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = { /* ipu */ static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { { .irq = 100 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { @@ -2417,7 +2418,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .name = "ipu", .class = &omap44xx_ipu_hwmod_class, .mpu_irqs = omap44xx_ipu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), .main_clk = "ipu_fck", @@ -2458,6 +2458,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = { /* iss */ static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { { .irq = 24 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { @@ -2503,7 +2504,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .name = "iss", .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), .sdma_reqs = omap44xx_iss_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", @@ -2535,6 +2535,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { @@ -2613,7 +2614,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .name = "iva", .class = &omap44xx_iva_hwmod_class, .mpu_irqs = omap44xx_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), .rst_lines = omap44xx_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), .main_clk = "iva_fck", @@ -2656,6 +2656,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { static struct omap_hwmod omap44xx_kbd_hwmod; static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { { .irq = 120 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { @@ -2685,7 +2686,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .name = "kbd", .class = &omap44xx_kbd_hwmod_class, .mpu_irqs = omap44xx_kbd_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), .main_clk = "kbd_fck", .prcm = { .omap4 = { @@ -2721,6 +2721,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { static struct omap_hwmod omap44xx_mailbox_hwmod; static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { { .irq = 26 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { @@ -2750,7 +2751,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, .mpu_irqs = omap44xx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, @@ -2784,6 +2784,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { static struct omap_hwmod omap44xx_mcbsp1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { { .irq = 17 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { @@ -2839,7 +2840,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", @@ -2857,6 +2857,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { static struct omap_hwmod omap44xx_mcbsp2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { { .irq = 22 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { @@ -2912,7 +2913,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", @@ -2930,6 +2930,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { static struct omap_hwmod omap44xx_mcbsp3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { { .irq = 23 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { @@ -2985,7 +2986,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", @@ -3003,6 +3003,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { static struct omap_hwmod omap44xx_mcbsp4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { { .irq = 16 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { @@ -3037,7 +3038,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", @@ -3076,6 +3076,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { static struct omap_hwmod omap44xx_mcpdm_hwmod; static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { { .irq = 112 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { @@ -3129,7 +3130,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", @@ -3169,6 +3169,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { static struct omap_hwmod omap44xx_mcspi1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { { .irq = 65 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { @@ -3214,7 +3215,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .name = "mcspi1", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), .sdma_reqs = omap44xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3233,6 +3233,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { static struct omap_hwmod omap44xx_mcspi2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { { .irq = 66 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { @@ -3274,7 +3275,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .name = "mcspi2", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), .sdma_reqs = omap44xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3293,6 +3293,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { static struct omap_hwmod omap44xx_mcspi3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { { .irq = 91 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { @@ -3334,7 +3335,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .name = "mcspi3", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), .sdma_reqs = omap44xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3353,6 +3353,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { static struct omap_hwmod omap44xx_mcspi4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { { .irq = 48 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { @@ -3392,7 +3393,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .name = "mcspi4", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), .sdma_reqs = omap44xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3433,6 +3433,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { { .irq = 83 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { @@ -3477,7 +3478,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .name = "mmc1", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), .sdma_reqs = omap44xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", @@ -3497,6 +3497,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { /* mmc2 */ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { { .irq = 86 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { @@ -3536,7 +3537,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .name = "mmc2", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), .sdma_reqs = omap44xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", @@ -3556,6 +3556,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { static struct omap_hwmod omap44xx_mmc3_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { { .irq = 94 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { @@ -3590,7 +3591,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .name = "mmc3", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), .sdma_reqs = omap44xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", @@ -3608,6 +3608,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { static struct omap_hwmod omap44xx_mmc4_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { { .irq = 96 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { @@ -3642,7 +3643,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .name = "mmc4", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), + .sdma_reqs = omap44xx_mmc4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", @@ -3660,6 +3661,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { static struct omap_hwmod omap44xx_mmc5_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { { .irq = 59 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { @@ -3694,7 +3696,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .name = "mmc5", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), .sdma_reqs = omap44xx_mmc5_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", @@ -3722,6 +3723,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* mpu master ports */ @@ -3736,7 +3738,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .class = &omap44xx_mpu_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), .main_clk = "dpll_mpu_m2_ck", .prcm = { .omap4 = { @@ -3778,6 +3779,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { static struct omap_hwmod omap44xx_smartreflex_core_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { { .irq = 19 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { @@ -3807,7 +3809,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .name = "smartreflex_core", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_core_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), + .main_clk = "smartreflex_core_fck", .vdd_name = "core", .prcm = { @@ -3824,6 +3826,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { { .irq = 102 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { @@ -3853,7 +3856,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .name = "smartreflex_iva", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), .main_clk = "smartreflex_iva_fck", .vdd_name = "iva", .prcm = { @@ -3870,6 +3872,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { { .irq = 18 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { @@ -3899,7 +3902,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .name = "smartreflex_mpu", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), .main_clk = "smartreflex_mpu_fck", .vdd_name = "mpu", .prcm = { @@ -4015,6 +4017,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { { .irq = 37 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { @@ -4044,7 +4047,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .name = "timer1", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), .main_clk = "timer1_fck", .prcm = { .omap4 = { @@ -4060,6 +4062,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { static struct omap_hwmod omap44xx_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { { .irq = 38 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { @@ -4089,7 +4092,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .name = "timer2", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), .main_clk = "timer2_fck", .prcm = { .omap4 = { @@ -4105,6 +4107,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { static struct omap_hwmod omap44xx_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { { .irq = 39 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { @@ -4134,7 +4137,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .name = "timer3", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), .main_clk = "timer3_fck", .prcm = { .omap4 = { @@ -4150,6 +4152,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { static struct omap_hwmod omap44xx_timer4_hwmod; static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { { .irq = 40 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { @@ -4179,7 +4182,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .name = "timer4", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), .main_clk = "timer4_fck", .prcm = { .omap4 = { @@ -4195,6 +4197,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { static struct omap_hwmod omap44xx_timer5_hwmod; static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { { .irq = 41 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { @@ -4243,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .name = "timer5", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), .main_clk = "timer5_fck", .prcm = { .omap4 = { @@ -4259,6 +4261,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { static struct omap_hwmod omap44xx_timer6_hwmod; static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { { .irq = 42 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { @@ -4307,7 +4310,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .name = "timer6", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), + .main_clk = "timer6_fck", .prcm = { .omap4 = { @@ -4323,6 +4326,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { static struct omap_hwmod omap44xx_timer7_hwmod; static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { { .irq = 43 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { @@ -4371,7 +4375,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .name = "timer7", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer7_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), .main_clk = "timer7_fck", .prcm = { .omap4 = { @@ -4387,6 +4390,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { static struct omap_hwmod omap44xx_timer8_hwmod; static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { { .irq = 44 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { @@ -4435,7 +4439,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .name = "timer8", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer8_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), .main_clk = "timer8_fck", .prcm = { .omap4 = { @@ -4451,6 +4454,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { static struct omap_hwmod omap44xx_timer9_hwmod; static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { { .irq = 45 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { @@ -4480,7 +4484,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .name = "timer9", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer9_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), .main_clk = "timer9_fck", .prcm = { .omap4 = { @@ -4496,6 +4499,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { static struct omap_hwmod omap44xx_timer10_hwmod; static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { { .irq = 46 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { @@ -4525,7 +4529,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .name = "timer10", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer10_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), .main_clk = "timer10_fck", .prcm = { .omap4 = { @@ -4541,6 +4544,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { static struct omap_hwmod omap44xx_timer11_hwmod; static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { { .irq = 47 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { @@ -4570,7 +4574,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .name = "timer11", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer11_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), .main_clk = "timer11_fck", .prcm = { .omap4 = { @@ -4608,6 +4611,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { static struct omap_hwmod omap44xx_uart1_hwmod; static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { { .irq = 72 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { @@ -4642,7 +4646,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .name = "uart1", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), .sdma_reqs = omap44xx_uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -4660,6 +4663,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { static struct omap_hwmod omap44xx_uart2_hwmod; static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { { .irq = 73 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { @@ -4694,7 +4698,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .name = "uart2", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), .sdma_reqs = omap44xx_uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -4712,6 +4715,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { static struct omap_hwmod omap44xx_uart3_hwmod; static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { { .irq = 74 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { @@ -4747,7 +4751,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .class = &omap44xx_uart_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), .sdma_reqs = omap44xx_uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -4765,6 +4768,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { static struct omap_hwmod omap44xx_uart4_hwmod; static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { { .irq = 70 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { @@ -4799,7 +4803,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .name = "uart4", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), .sdma_reqs = omap44xx_uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -4840,6 +4843,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* usb_otg_hs master ports */ @@ -4879,7 +4883,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .class = &omap44xx_usb_otg_hs_hwmod_class, .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .mpu_irqs = omap44xx_usb_otg_hs_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), .main_clk = "usb_otg_hs_ick", .prcm = { .omap4 = { @@ -4922,6 +4925,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { static struct omap_hwmod omap44xx_wd_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { { .irq = 80 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { @@ -4951,7 +4955,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), .main_clk = "wd_timer2_fck", .prcm = { .omap4 = { @@ -4967,6 +4970,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { static struct omap_hwmod omap44xx_wd_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { { .irq = 36 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { @@ -5015,7 +5019,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .name = "wd_timer3", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), .main_clk = "wd_timer3_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 523e0b5..3bd6d1d 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -98,7 +98,7 @@ struct omap_hwmod_mux_info { /** * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod * @name: name of the IRQ channel (module local name) - * @irq_ch: IRQ channel ID + * @irq: IRQ channel ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -106,7 +106,7 @@ struct omap_hwmod_mux_info { */ struct omap_hwmod_irq_info { const char *name; - u16 irq; + s16 irq; }; /** @@ -466,7 +466,7 @@ struct omap_hwmod_class { * @name: name of the hwmod * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) - * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) + * @mpu_irqs: ptr to an array of MPU IRQs * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @mpu_irqs_cnt: number of @mpu_irqs * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries @@ -529,7 +528,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 mpu_irqs_cnt; u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; -- cgit v0.10.2 From 0d619a89998d308c48d06b033eccb7374c456f12 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: omap_hwmod: share identical omap_hwmod_mpu_irqs arrays To reduce kernel source file data duplication, share struct omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8a75d17..f343365 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_interconnect_data.o \ omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_2420_data.o -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_interconnect_data.o \ omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ + omap_hwmod_2xxx_3xxx_interconnect_data.o \ omap_hwmod_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 04730d3..73157ee 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; -static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { { @@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2420_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap2420_timer2_hwmod; -static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; - /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { @@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2420_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap2420_timer3_hwmod; -static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { @@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2420_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap2420_timer4_hwmod; -static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { @@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2420_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap2420_timer5_hwmod; -static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { @@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2420_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap2420_timer6_hwmod; -static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { @@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2420_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap2420_timer7_hwmod; -static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { @@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2420_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap2420_timer8_hwmod; -static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { @@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2420_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap2420_timer9_hwmod; -static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { @@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2420_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap2420_timer10_hwmod; -static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { @@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2420_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap2420_timer11_hwmod; -static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { @@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2420_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { /* timer12 */ static struct omap_hwmod omap2420_timer12_hwmod; -static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { - { .irq = 48, }, - { .irq = -1 } -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { @@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { /* timer12 hwmod */ static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap2420_timer12_mpu_irqs, + .mpu_irqs = omap2xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, @@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, @@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, @@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { .sysc = &omap2420_dispc_sysc, }; -static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, @@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, - .mpu_irqs = omap2420_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; /* I2C1 */ -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { &omap2420_l4_wkup__gpio1, }; @@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { &omap2420_l4_wkup__gpio2, }; @@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { &omap2420_l4_wkup__gpio3, }; @@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { &omap2420_l4_wkup__gpio4, }; @@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { .lch_count = 32, }; -static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { .master = &omap2420_dma_system_hwmod, @@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", .class = &omap2420_dma_hwmod_class, - .mpu_irqs = omap2420_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), @@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { - { .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ @@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", - .mpu_irqs = omap2420_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { - { .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ @@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", - .mpu_irqs = omap2420_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2c28468..62ecc68 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; -static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { { @@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap2430_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2430_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap2430_timer2_hwmod; -static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { @@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap2430_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2430_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap2430_timer3_hwmod; -static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { @@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap2430_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2430_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap2430_timer4_hwmod; -static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { @@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap2430_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2430_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap2430_timer5_hwmod; -static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { @@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap2430_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2430_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap2430_timer6_hwmod; -static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { @@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap2430_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2430_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap2430_timer7_hwmod; -static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { @@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap2430_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2430_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap2430_timer8_hwmod; -static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { @@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap2430_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2430_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap2430_timer9_hwmod; -static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { @@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap2430_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2430_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap2430_timer10_hwmod; -static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { @@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap2430_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2430_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap2430_timer11_hwmod; -static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { @@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap2430_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2430_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { /* timer12 */ static struct omap_hwmod omap2430_timer12_hwmod; -static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { - { .irq = 48, }, - { .irq = -1 } -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { @@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { /* timer12 hwmod */ static struct omap_hwmod omap2430_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap2430_timer12_mpu_irqs, + .mpu_irqs = omap2xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, @@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, @@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, @@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { .sysc = &omap2430_dispc_sysc, }; -static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, @@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, - .mpu_irqs = omap2430_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { /* I2C1 */ -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", @@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", @@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { &omap2430_l4_wkup__gpio1, }; @@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { static struct omap_hwmod omap2430_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { &omap2430_l4_wkup__gpio2, }; @@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { static struct omap_hwmod omap2430_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { &omap2430_l4_wkup__gpio3, }; @@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { static struct omap_hwmod omap2430_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { &omap2430_l4_wkup__gpio4, }; @@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { static struct omap_hwmod omap2430_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap243x_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { .lch_count = 32, }; -static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { .master = &omap2430_dma_system_hwmod, @@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", .class = &omap2430_dma_hwmod_class, - .mpu_irqs = omap2430_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), @@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { - { .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ @@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", - .mpu_irqs = omap2430_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { - { .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ @@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", - .mpu_irqs = omap2430_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c new file mode 100644 index 0000000..245294b --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -0,0 +1,142 @@ +/* + * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3 + * + * Copyright (C) 2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { + { .irq = 37, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { + { .irq = 38, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { + { .irq = 39, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { + { .irq = 40, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { + { .irq = 41, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { + { .irq = 42, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { + { .irq = 43, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { + { .irq = 44, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { + { .irq = 45, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { + { .irq = 46, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { + { .irq = 47, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { + { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { + { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { + { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_dispc_irqs[] = { + { .irq = 25 }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { + { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { + { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { + { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { + { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { + { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { + { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { + { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ + { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ + { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ + { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { + { .irq = 65 }, + { .irq = -1 } +}; + +struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { + { .irq = 66 }, + { .irq = -1 } +}; + + + diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c new file mode 100644 index 0000000..5a078a6 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -0,0 +1,21 @@ +/* + * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx + * + * Copyright (C) 2011 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include + +#include "omap_hwmod_common_data.h" + +struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { + { .irq = 48, }, + { .irq = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index cc178b5..6bac4bb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, - .mpu_irqs = omap3xxx_l3_main_irqs, + .mpu_irqs = omap3xxx_l3_main_irqs, .masters = omap3xxx_l3_main_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, @@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { /* timer1 */ static struct omap_hwmod omap3xxx_timer1_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { - { .irq = 37, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { { @@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap3xxx_timer1_mpu_irqs, + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { /* timer2 */ static struct omap_hwmod omap3xxx_timer2_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { - { .irq = 38, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { { @@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap3xxx_timer2_mpu_irqs, + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { - { .irq = 39, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { { @@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap3xxx_timer3_mpu_irqs, + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { /* timer4 */ static struct omap_hwmod omap3xxx_timer4_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { - { .irq = 40, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { { @@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap3xxx_timer4_mpu_irqs, + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { /* timer5 */ static struct omap_hwmod omap3xxx_timer5_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { - { .irq = 41, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { { @@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap3xxx_timer5_mpu_irqs, + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { /* timer6 */ static struct omap_hwmod omap3xxx_timer6_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { - { .irq = 42, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { { @@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap3xxx_timer6_mpu_irqs, + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { /* timer7 */ static struct omap_hwmod omap3xxx_timer7_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { - { .irq = 43, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { { @@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap3xxx_timer7_mpu_irqs, + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { /* timer8 */ static struct omap_hwmod omap3xxx_timer8_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { - { .irq = 44, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { { @@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap3xxx_timer8_mpu_irqs, + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { /* timer9 */ static struct omap_hwmod omap3xxx_timer9_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { - { .irq = 45, }, - { .irq = -1 } -}; static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { { @@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap3xxx_timer9_mpu_irqs, + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { /* timer10 */ static struct omap_hwmod omap3xxx_timer10_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { - { .irq = 46, }, - { .irq = -1 } -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { @@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap3xxx_timer10_mpu_irqs, + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { /* timer11 */ static struct omap_hwmod omap3xxx_timer11_hwmod; -static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { - { .irq = 47, }, - { .irq = -1 } -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { @@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap3xxx_timer11_mpu_irqs, + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, @@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, + .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, @@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, + .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, @@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, + .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { .sysc = &omap3xxx_dispc_sysc, }; -static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { - { .irq = 25 }, - { .irq = -1 } -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, @@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, - .mpu_irqs = omap3xxx_dispc_irqs, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, @@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, + .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, @@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, + .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { }; /* gpio1 */ -static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { - { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { { .role = "dbclk", .clk = "gpio1_dbck", }, }; @@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio1_irqs, + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { }; /* gpio2 */ -static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { - { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { { .role = "dbclk", .clk = "gpio2_dbck", }, }; @@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio2_irqs, + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { }; /* gpio3 */ -static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { - { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { { .role = "dbclk", .clk = "gpio3_dbck", }, }; @@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio3_irqs, + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { }; /* gpio4 */ -static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { - { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ - { .irq = -1 } -}; - static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { { .role = "dbclk", .clk = "gpio4_dbck", }, }; @@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap3xxx_gpio4_irqs, + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = { }; /* dma_system */ -static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ - { .irq = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { { .pa_start = 0x48056000, @@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = { static struct omap_hwmod omap3xxx_dma_system_hwmod = { .name = "dma", .class = &omap3xxx_dma_hwmod_class, - .mpu_irqs = omap3xxx_dma_system_irqs, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ick", .prcm = { .omap2 = { @@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { - { .name = "irq", .irq = 65 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { { .name = "tx0", .dma_req = 35 }, { .name = "rx0", .dma_req = 36 }, @@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", - .mpu_irqs = omap34xx_mcspi1_mpu_irqs, + .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap34xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { - { .name = "irq", .irq = 66 }, - { .irq = -1 } -}; - static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { { .name = "tx0", .dma_req = 43 }, { .name = "rx0", .dma_req = 44 }, @@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", - .mpu_irqs = omap34xx_mcspi2_mpu_irqs, + .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap34xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 76a2f11..1ac878c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; +/* Common IP block data across OMAP2xxx */ +extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; + +/* Common IP block data across OMAP2/3 */ +extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; +extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; +extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; +extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; +extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; +extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; + /* OMAP hwmod classes - forward declarations */ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; -- cgit v0.10.2 From bc6149587b309e3231e5ac7138b84197813e17ec Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 21e3eb8..d1a8bde 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -702,6 +702,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) } /** + * _count_sdma_reqs - count the number of SDMA request lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of SDMA request lines associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_sdma_reqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_dma_info *ohdi; + int i = 0; + + if (!oh || !oh->sdma_reqs) + return 0; + + do { + ohdi = &oh->sdma_reqs[i++]; + } while (ohdi->dma_req != -1); + + return i; +} + +/** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh * @@ -1987,7 +2010,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j, mpu_irqs_cnt; + int i, j, mpu_irqs_cnt, sdma_reqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ @@ -2021,7 +2044,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) r++; } - for (i = 0; i < oh->sdma_reqs_cnt; i++) { + sdma_reqs_cnt = _count_sdma_reqs(oh); + for (i = 0; i < sdma_reqs_cnt; i++) { (res + r)->name = (oh->sdma_reqs + i)->name; (res + r)->start = (oh->sdma_reqs + i)->dma_req; (res + r)->end = (oh->sdma_reqs + i)->dma_req; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 73157ee..60c817e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { @@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { @@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { @@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2420_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { @@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { @@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { @@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { @@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, .sdma_reqs = omap2420_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, .sdma_reqs = omap2420_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 62ecc68..af758b3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { @@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { @@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { @@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2430_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { @@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", .prcm = { .omap2 = { @@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { @@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", .prcm = { .omap2 = { @@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { @@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2430_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2430_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { @@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, .sdma_reqs = omap2430_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, .sdma_reqs = omap2430_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, .sdma_reqs = omap2430_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { @@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, .sdma_reqs = omap2430_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { @@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, .sdma_reqs = omap2430_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { @@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, .sdma_reqs = omap2430_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, .sdma_reqs = omap2430_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { @@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, .sdma_reqs = omap2430_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), .main_clk = "mmchs2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 6bac4bb..265f0b1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { @@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { @@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { @@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, .sdma_reqs = uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap2 = { @@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, + { .dma_req = -1 } }; /* dss */ @@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { @@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { @@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { @@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, .sdma_reqs = i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap2 = { @@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { @@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { @@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { @@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { @@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { @@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, { .name = "tx3", .dma_req = 41 }, { .name = "rx3", .dma_req = 42 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { @@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap34xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, { .name = "tx1", .dma_req = 45 }, { .name = "rx1", .dma_req = 46 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { @@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap34xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, { .name = "tx1", .dma_req = 23 }, { .name = "rx1", .dma_req = 24 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { @@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, .sdma_reqs = omap34xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { @@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, .sdma_reqs = omap34xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap2 = { @@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61, }, { .name = "rx", .dma_req = 62, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { @@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, .sdma_reqs = omap34xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47, }, { .name = "rx", .dma_req = 48, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { @@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, .sdma_reqs = omap34xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), .main_clk = "mmchs2_fck", @@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 77, }, { .name = "rx", .dma_req = 78, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { @@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, .sdma_reqs = omap34xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), .main_clk = "mmchs3_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index bbfc4db..a93c455 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -684,6 +684,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* aess master ports */ @@ -738,7 +739,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", .prcm = { .omap4 = { @@ -953,6 +953,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { @@ -1002,7 +1003,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", .prcm = { .omap4 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { @@ -1269,7 +1270,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1311,6 +1311,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { @@ -1360,7 +1361,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1381,6 +1381,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { @@ -1430,7 +1431,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1471,6 +1471,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { @@ -1520,7 +1521,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1556,6 +1556,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { static struct omap_hwmod omap44xx_dss_rfbi_hwmod; static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { @@ -1604,7 +1605,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -2137,6 +2137,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { @@ -2168,7 +2169,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap4 = { @@ -2190,6 +2190,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap4 = { @@ -2243,6 +2243,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { @@ -2274,7 +2275,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap4 = { @@ -2296,6 +2296,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { @@ -2327,7 +2328,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", .prcm = { .omap4 = { @@ -2466,6 +2466,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* iss master ports */ @@ -2505,7 +2506,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", .prcm = { .omap4 = { @@ -2790,6 +2790,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { @@ -2841,7 +2842,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", .prcm = { .omap4 = { @@ -2863,6 +2863,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { @@ -2914,7 +2915,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", .prcm = { .omap4 = { @@ -2936,6 +2936,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { @@ -2987,7 +2988,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", .prcm = { .omap4 = { @@ -3009,6 +3009,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { @@ -3039,7 +3040,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", .prcm = { .omap4 = { @@ -3082,6 +3082,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { @@ -3131,7 +3132,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", .prcm = { .omap4 = { @@ -3181,6 +3181,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { @@ -3216,7 +3217,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, .sdma_reqs = omap44xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap4 = { @@ -3241,6 +3241,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { @@ -3276,7 +3277,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, .sdma_reqs = omap44xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap4 = { @@ -3301,6 +3301,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { @@ -3336,7 +3337,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, .sdma_reqs = omap44xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap4 = { @@ -3359,6 +3359,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { @@ -3394,7 +3395,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, .sdma_reqs = omap44xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap4 = { @@ -3439,6 +3439,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc1 master ports */ @@ -3479,7 +3480,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", .prcm = { .omap4 = { @@ -3503,6 +3503,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc2 master ports */ @@ -3538,7 +3539,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", .prcm = { .omap4 = { @@ -3562,6 +3562,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { @@ -3592,7 +3593,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", .prcm = { .omap4 = { @@ -3614,6 +3614,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { @@ -3645,7 +3646,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .mpu_irqs = omap44xx_mmc4_irqs, .sdma_reqs = omap44xx_mmc4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", .prcm = { .omap4 = { @@ -3667,6 +3667,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { @@ -3697,7 +3698,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", .prcm = { .omap4 = { @@ -4617,6 +4617,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { @@ -4647,7 +4648,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, .sdma_reqs = omap44xx_uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap4 = { @@ -4669,6 +4669,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { @@ -4699,7 +4700,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, .sdma_reqs = omap44xx_uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap4 = { @@ -4721,6 +4721,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { @@ -4752,7 +4753,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap4 = { @@ -4774,6 +4774,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { @@ -4804,7 +4805,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, .sdma_reqs = omap44xx_uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 3bd6d1d..822556e 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -112,7 +112,7 @@ struct omap_hwmod_irq_info { /** * struct omap_hwmod_dma_info - DMA channels used by the hwmod * @name: name of the DMA channel (module local name) - * @dma_req: DMA request ID + * @dma_req: DMA request ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -120,7 +120,7 @@ struct omap_hwmod_irq_info { */ struct omap_hwmod_dma_info { const char *name; - u16 dma_req; + s16 dma_req; }; /** @@ -467,7 +467,7 @@ struct omap_hwmod_class { * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) * @mpu_irqs: ptr to an array of MPU IRQs - * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) + * @sdma_reqs: ptr to an array of System DMA request IDs * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name * @_clk: pointer to the main struct clk (filled in at runtime) @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries * @slaves_cnt: number of @slave entries @@ -528,7 +527,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; u8 masters_cnt; -- cgit v0.10.2 From d826ebfa49aeb8a8f4d216165e5e00826741ad9c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: omap_hwmod: share identical omap_hwmod_dma_info arrays To reduce kernel source file data duplication, share struct omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 60c817e..6acc01f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { &omap2_l4_core__uart1, }; @@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -860,12 +854,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { &omap2_l4_core__uart2, }; @@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -892,12 +880,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { &omap2_l4_core__uart3, }; @@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -940,11 +922,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { .sysc = &omap2420_dss_sysc, }; -static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .dma_req = -1 } -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { @@ -980,7 +957,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2420_dss_sdma_chs, + .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; /* I2C1 */ -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { &omap2420_l4_core__i2c1, }; @@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1217,12 +1188,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { &omap2420_l4_core__i2c2, }; @@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1602,18 +1567,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, }; @@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2420_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1644,14 +1597,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { &omap2420_l4_core__mcspi2, }; @@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2420_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .master = &omap2420_l4_core_hwmod, @@ -1721,7 +1660,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .sdma_reqs = omap2420_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .master = &omap2420_l4_core_hwmod, @@ -1768,7 +1701,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .sdma_reqs = omap2420_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index af758b3..639acd5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { &omap2_l4_core__uart1, }; @@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -932,12 +926,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { &omap2_l4_core__uart2, }; @@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -964,12 +952,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { &omap2_l4_core__uart3, }; @@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1012,11 +994,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { .sysc = &omap2430_dss_sysc, }; -static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, - { .dma_req = -1 } -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { @@ -1046,7 +1023,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2430_dss_sdma_chs, + .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { /* I2C1 */ -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { &omap2430_l4_core__i2c1, }; @@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2chs1_fck", .prcm = { .omap2 = { @@ -1275,12 +1246,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { /* I2C2 */ -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { &omap2430_l4_core__i2c2, }; @@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2chs2_fck", .prcm = { .omap2 = { @@ -1707,18 +1672,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, }; @@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap2430_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1749,14 +1702,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { &omap2430_l4_core__mcspi2, }; @@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap2430_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp1 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .master = &omap2430_l4_core_hwmod, @@ -1936,7 +1875,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, - .sdma_reqs = omap2430_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - /* l4_core -> mcbsp2 */ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .master = &omap2430_l4_core_hwmod, @@ -1984,7 +1917,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, - .sdma_reqs = omap2430_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { { .name = "mpu", @@ -2042,7 +1969,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, - .sdma_reqs = omap2430_mcbsp3_sdma_chs, + .sdma_reqs = omap2_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 245294b..7c4f5ab 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -10,11 +10,35 @@ */ #include #include +#include #include #include "omap_hwmod_common_data.h" + +/* + * omap_hwmod class data + */ + +struct omap_hwmod_class l3_hwmod_class = { + .name = "l3" +}; + +struct omap_hwmod_class l4_hwmod_class = { + .name = "l4" +}; + +struct omap_hwmod_class mpu_hwmod_class = { + .name = "mpu" +}; + +struct omap_hwmod_class iva_hwmod_class = { + .name = "iva" +}; + +/* Common MPU IRQ line data */ + struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { { .irq = 37, }, { .irq = -1 } @@ -138,5 +162,73 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { { .irq = -1 } }; +/* Common DMA request line data */ +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 5a078a6..f5b63ef 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -10,6 +10,7 @@ */ #include #include +#include #include @@ -19,3 +20,8 @@ struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { { .irq = 48, }, { .irq = -1 } }; + +struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { + { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 265f0b1..001f67b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = { /* UART1 */ -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { &omap3_l4_core__uart1, }; @@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, - .sdma_reqs = uart1_sdma_reqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1242,12 +1236,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { /* UART2 */ -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { &omap3_l4_core__uart2, }; @@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, - .sdma_reqs = uart2_sdma_reqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1274,12 +1262,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { /* UART3 */ -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { &omap3_l4_per__uart3, }; @@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, - .sdma_reqs = uart3_sdma_reqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { &omap3_l4_core__i2c1, }; @@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, - .sdma_reqs = i2c1_sdma_reqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ }; -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { &omap3_l4_core__i2c2, }; @@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, - .sdma_reqs = i2c2_sdma_reqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { { .name = "mpu", @@ -2303,7 +2267,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { { .name = "mpu", @@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2366,7 +2323,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { { .irq = -1 } }; -static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { { .name = "mpu", @@ -2429,7 +2380,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, + .sdma_reqs = omap2_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2939,18 +2890,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { }; /* mcspi1 */ -static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, - { .name = "rx0", .dma_req = 36 }, - { .name = "tx1", .dma_req = 37 }, - { .name = "rx1", .dma_req = 38 }, - { .name = "tx2", .dma_req = 39 }, - { .name = "rx2", .dma_req = 40 }, - { .name = "tx3", .dma_req = 41 }, - { .name = "rx3", .dma_req = 42 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { &omap34xx_l4_core__mcspi1, }; @@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap2_mcspi1_mpu_irqs, - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { }; /* mcspi2 */ -static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, - { .name = "rx0", .dma_req = 44 }, - { .name = "tx1", .dma_req = 45 }, - { .name = "rx1", .dma_req = 46 }, - { .dma_req = -1 } -}; - static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { &omap34xx_l4_core__mcspi2, }; @@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap2_mcspi2_mpu_irqs, - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 08a1342..de832eb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, }; - -/* - * omap_hwmod class data - */ - -struct omap_hwmod_class l3_hwmod_class = { - .name = "l3" -}; - -struct omap_hwmod_class l4_hwmod_class = { - .name = "l4" -}; - -struct omap_hwmod_class mpu_hwmod_class = { - .name = "mpu" -}; - -struct omap_hwmod_class iva_hwmod_class = { - .name = "iva" -}; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 1ac878c..b636cf6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; /* Common IP block data across OMAP2xxx */ extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; +extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]; + +/* Common IP block data */ +extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[]; +extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[]; + +/* Common IP block data on OMAP2430/OMAP3 */ +extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[]; /* Common IP block data across OMAP2/3 */ extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; -- cgit v0.10.2 From 273b9465bc68d4f4bcdedc34411b231e26b48416 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:08 -0600 Subject: omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays To reduce kernel source file data duplication, share struct omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 6acc01f..f3901ab 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; -/* Timer Common */ -static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_timer_hwmod_class = { - .name = "timer", - .sysc = &omap2420_timer_sysc, - .rev = OMAP_TIMER_IP_VERSION_1, -}; - /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; @@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { }, .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { }, .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { }, .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { }, .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { }, .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { }, .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { }, .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { }, .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { }, .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { }, .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { }, .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { }, .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), - .class = &omap2420_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2420_wd_timer_sysc, - .pre_shutdown = &omap2_wd_timer_disable -}; - /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { &omap2420_l4_wkup__wd_timer2, @@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { static struct omap_hwmod omap2420_wd_timer2_hwmod = { .name = "wd_timer2", - .class = &omap2420_wd_timer_hwmod_class, + .class = &omap2xxx_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { @@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* UART */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { @@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { }, .slaves = omap2420_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { }, .slaves = omap2420_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = { }, .slaves = omap2420_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2420_dss_sysc, -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { @@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", - .class = &omap2420_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { @@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2420_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, @@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2420_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { @@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2420_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .master = &omap2420_l4_core_hwmod, @@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { static struct omap_hwmod omap2420_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap2420_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap2420_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .master = &omap2420_l4_core_hwmod, @@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { static struct omap_hwmod omap2420_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap2420_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { .dbck_flag = false, }; -static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -/* - * 'gpio' class - * general purpose io module - */ -static struct omap_hwmod_class omap242x_gpio_hwmod_class = { - .name = "gpio", - .sysc = &omap242x_gpio_sysc, - .rev = 0, -}; - /* gpio1 */ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { &omap2420_l4_wkup__gpio1, @@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { }, .slaves = omap2420_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { }, .slaves = omap2420_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { }, .slaves = omap2420_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { }, .slaves = omap2420_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* system dma */ -static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x002c, - .syss_offs = 0x0028, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dma_hwmod_class = { - .name = "dma", - .sysc = &omap2420_dma_sysc, -}; - /* dma attributes */ static struct omap_dma_dev_attr dma_dev_attr = { .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | @@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", - .class = &omap2420_dma_hwmod_class, + .class = &omap2xxx_dma_hwmod_class, .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, @@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors - * using a queued mailbox-interrupt mechanism. - */ - -static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { - .rev_offs = 0x000, - .sysc_offs = 0x010, - .syss_offs = 0x014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &omap2420_mailbox_sysc, -}; - /* mailbox */ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { @@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = { static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", - .class = &omap2420_mailbox_hwmod_class, + .class = &omap2xxx_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, .main_clk = "mailboxes_ick", .prcm = { @@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; -/* - * 'mcspi' class - * multichannel serial port interface (mcspi) / master/slave synchronous serial - * bus - */ - -static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mcspi_class = { - .name = "mcspi", - .sysc = &omap2420_mcspi_sysc, - .rev = OMAP2_MCSPI_REV, -}; - /* mcspi1 */ static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, @@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }, .slaves = omap2420_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi1_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; @@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { }, .slaves = omap2420_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi2_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 639acd5..2a52f02 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; -/* Timer Common */ -static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_timer_hwmod_class = { - .name = "timer", - .sysc = &omap2430_timer_sysc, - .rev = OMAP_TIMER_IP_VERSION_1, -}; - /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; @@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { }, .slaves = omap2430_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { }, .slaves = omap2430_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { }, .slaves = omap2430_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { }, .slaves = omap2430_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { }, .slaves = omap2430_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { }, .slaves = omap2430_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { }, .slaves = omap2430_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { }, .slaves = omap2430_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { }, .slaves = omap2430_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { }, .slaves = omap2430_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { }, .slaves = omap2430_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { }, .slaves = omap2430_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), - .class = &omap2430_timer_hwmod_class, + .class = &omap2xxx_timer_hwmod_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; @@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2430_wd_timer_sysc, - .pre_shutdown = &omap2_wd_timer_disable -}; - /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { &omap2430_l4_wkup__wd_timer2, @@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { static struct omap_hwmod omap2430_wd_timer2_hwmod = { .name = "wd_timer2", - .class = &omap2430_wd_timer_hwmod_class, + .class = &omap2xxx_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { @@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* UART */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { @@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { }, .slaves = omap2430_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { }, .slaves = omap2430_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = { }, .slaves = omap2430_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2430_dss_sysc, -}; - /* dss */ /* dss master ports */ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { @@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", - .class = &omap2430_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { @@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2430_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .master = &omap2430_l4_core_hwmod, @@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2430_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { @@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2430_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .master = &omap2430_l4_core_hwmod, @@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { static struct omap_hwmod omap2430_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap2430_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap2430_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .master = &omap2430_l4_core_hwmod, @@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { static struct omap_hwmod omap2430_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap2430_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { .dbck_flag = false, }; -static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -/* - * 'gpio' class - * general purpose io module - */ -static struct omap_hwmod_class omap243x_gpio_hwmod_class = { - .name = "gpio", - .sysc = &omap243x_gpio_sysc, - .rev = 0, -}; - /* gpio1 */ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { &omap2430_l4_wkup__gpio1, @@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { }, .slaves = omap2430_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { }, .slaves = omap2430_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { }, .slaves = omap2430_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { }, .slaves = omap2430_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { }, .slaves = omap2430_gpio5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), - .class = &omap243x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* dma_system */ -static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x002c, - .syss_offs = 0x0028, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_dma_hwmod_class = { - .name = "dma", - .sysc = &omap2430_dma_sysc, -}; - /* dma attributes */ static struct omap_dma_dev_attr dma_dev_attr = { .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | @@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", - .class = &omap2430_dma_hwmod_class, + .class = &omap2xxx_dma_hwmod_class, .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, @@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors - * using a queued mailbox-interrupt mechanism. - */ - -static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { - .rev_offs = 0x000, - .sysc_offs = 0x010, - .syss_offs = 0x014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &omap2430_mailbox_sysc, -}; - /* mailbox */ static struct omap_hwmod omap2430_mailbox_hwmod; static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { @@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = { static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", - .class = &omap2430_mailbox_hwmod_class, + .class = &omap2xxx_mailbox_hwmod_class, .mpu_irqs = omap2430_mailbox_irqs, .main_clk = "mailboxes_ick", .prcm = { @@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; -/* - * 'mcspi' class - * multichannel serial port interface (mcspi) / master/slave synchronous serial - * bus - */ - -static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2430_mcspi_class = { - .name = "mcspi", - .sysc = &omap2430_mcspi_sysc, - .rev = OMAP2_MCSPI_REV, -}; - /* mcspi1 */ static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { &omap2430_l4_core__mcspi1, @@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { }, .slaves = omap2430_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi1_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi1_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { }, .slaves = omap2430_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi2_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; @@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { }, .slaves = omap2430_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), - .class = &omap2430_mcspi_class, - .dev_attr = &omap_mcspi3_dev_attr, + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi3_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 7c4f5ab..c451729 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -16,6 +16,164 @@ #include "omap_hwmod_common_data.h" +/* UART */ + +static struct omap_hwmod_class_sysconfig omap2_uart_sysc = { + .rev_offs = 0x50, + .sysc_offs = 0x54, + .syss_offs = 0x58, + .sysc_flags = (SYSC_HAS_SIDLEMODE | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_uart_class = { + .name = "uart", + .sysc = &omap2_uart_sysc, +}; + +/* + * 'dss' class + * display sub-system + */ + +static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dss_hwmod_class = { + .name = "dss", + .sysc = &omap2_dss_sysc, +}; + +/* + * 'dispc' class + * display controller + */ + +static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dispc_hwmod_class = { + .name = "dispc", + .sysc = &omap2_dispc_sysc, +}; + +/* + * 'rfbi' class + * remote frame buffer interface + */ + +static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_rfbi_hwmod_class = { + .name = "rfbi", + .sysc = &omap2_rfbi_sysc, +}; + +/* + * 'venc' class + * video encoder + */ + +struct omap_hwmod_class omap2_venc_hwmod_class = { + .name = "venc", +}; + + +/* Common DMA request line data */ +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } +}; + +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } +}; + +/* Other IP block data */ + /* * omap_hwmod class data @@ -162,73 +320,3 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { { .irq = -1 } }; -/* Common DMA request line data */ -struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, - { .dma_req = -1 } -}; - -struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { - { .name = "rx", .dma_req = 18 }, - { .name = "tx", .dma_req = 17 }, - { .dma_req = -1 } -}; - - diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index f5b63ef..177dee2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -11,10 +11,13 @@ #include #include #include +#include +#include #include #include "omap_hwmod_common_data.h" +#include "wd_timer.h" struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { { .irq = 48, }, @@ -25,3 +28,123 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .dma_req = -1 } }; +/* OMAP2xxx Timer Common */ +static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_timer_hwmod_class = { + .name = "timer", + .sysc = &omap2xxx_timer_sysc, + .rev = OMAP_TIMER_IP_VERSION_1, +}; + +/* + * 'wd_timer' class + * 32-bit watchdog upward counter that generates a pulse on the reset pin on + * overflow condition + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { + .name = "wd_timer", + .sysc = &omap2xxx_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable +}; + +/* + * 'gpio' class + * general purpose io module + */ +static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { + .name = "gpio", + .sysc = &omap2xxx_gpio_sysc, + .rev = 0, +}; + +/* system dma */ +static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x002c, + .syss_offs = 0x0028, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | + SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_dma_hwmod_class = { + .name = "dma", + .sysc = &omap2xxx_dma_sysc, +}; + +/* + * 'mailbox' class + * mailbox module allowing communication between the on-chip processors + * using a queued mailbox-interrupt mechanism. + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { + .rev_offs = 0x000, + .sysc_offs = 0x010, + .syss_offs = 0x014, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { + .name = "mailbox", + .sysc = &omap2xxx_mailbox_sysc, +}; + +/* + * 'mcspi' class + * multichannel serial port interface (mcspi) / master/slave synchronous serial + * bus + */ + +static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2xxx_mcspi_class = { + .name = "mcspi", + .sysc = &omap2xxx_mcspi_sysc, + .rev = OMAP2_MCSPI_REV, +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 001f67b..1a52716 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1190,24 +1190,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { .flags = HWMOD_SWSUP_SIDLE, }; -/* UART common */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, -}; - /* UART1 */ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { @@ -1230,7 +1212,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { }, .slaves = omap3xxx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1256,7 +1238,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { }, .slaves = omap3xxx_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1282,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { }, .slaves = omap3xxx_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -1319,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { }, .slaves = omap3xxx_uart4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), - .class = &uart_class, + .class = &omap2_uart_class, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), }; @@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = { .sysc = &i2c_sysc, }; -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { - .name = "dss", - .sysc = &omap3xxx_dss_sysc, -}; - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, @@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap3430es1_dss_core_hwmod = { .name = "dss_core", - .class = &omap3xxx_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, .prcm = { @@ -1430,7 +1394,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { static struct omap_hwmod omap3xxx_dss_core_hwmod = { .name = "dss_core", - .class = &omap3xxx_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, .prcm = { @@ -1453,28 +1417,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1), }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap3xxx_dispc_sysc, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, @@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap3xxx_dispc_hwmod_class, + .class = &omap2_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_alwon_fck", .prcm = { @@ -1580,26 +1522,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap3xxx_rfbi_sysc, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .master = &omap3xxx_l4_core_hwmod, @@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap3xxx_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1640,15 +1562,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { - .name = "venc", -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .master = &omap3xxx_l4_core_hwmod, @@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { static struct omap_hwmod omap3xxx_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap3xxx_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index b636cf6..39a7c37 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class; extern struct omap_hwmod_class l4_hwmod_class; extern struct omap_hwmod_class mpu_hwmod_class; extern struct omap_hwmod_class iva_hwmod_class; +extern struct omap_hwmod_class omap2_uart_class; +extern struct omap_hwmod_class omap2_dss_hwmod_class; +extern struct omap_hwmod_class omap2_dispc_hwmod_class; +extern struct omap_hwmod_class omap2_rfbi_hwmod_class; +extern struct omap_hwmod_class omap2_venc_hwmod_class; +extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; +extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; +extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; +extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; +extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; +extern struct omap_hwmod_class omap2xxx_mcspi_class; #endif -- cgit v0.10.2 From 9b4021befe59e53454d2fe0a4d22e269f1e843b1 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:27 -0600 Subject: OMAP4: hwmod data: Fix L3 interconnect data order and alignement Change the position of the ocp_if structure to match the template. Remove unneeded comma at the end of address space flag field. Remove USER_SDMA since this ocp link is only from the l3_main_1 path that is accessible only from the MPU in that case and not the SDMA. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a93c455..f1138e4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -216,6 +216,12 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { }; /* l3_main_1 interface data */ +static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { + { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, + { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + /* dsp -> l3_main_1 */ static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { .master = &omap44xx_dsp_hwmod, @@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* L3 target configuration and error log registers */ -static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { - { .irq = 9 + OMAP44XX_IRQ_GIC_START }, - { .irq = 10 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -}; - static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { { .pa_start = 0x44000000, .pa_end = 0x44000fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { .slave = &omap44xx_l3_main_1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_1_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l3_main_1 slave ports */ @@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, - .mpu_irqs = omap44xx_l3_targ_irqs, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), + .mpu_irqs = omap44xx_l3_main_1_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { { .pa_start = 0x44800000, .pa_end = 0x44801fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_2_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l4_cfg -> l3_main_2 */ @@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { { .pa_start = 0x45000000, .pa_end = 0x45000fff, - .flags = ADDR_TYPE_RT, + .flags = ADDR_TYPE_RT }, { } }; @@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { .slave = &omap44xx_l3_main_3_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_3_addrs, - .user = OCP_USER_MPU | OCP_USER_SDMA, + .user = OCP_USER_MPU, }; /* l3_main_2 -> l3_main_3 */ -- cgit v0.10.2 From 7ecc5373fe5788b993820eb0bc0e4b7c282147e2 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: OMAP4: hwmod data: Remove un-needed parens A couple of parens were added around some flags. Remove them, since they are not needed and not used for any other hwmods. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index f1138e4..eb00c08 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -3735,7 +3735,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { static struct omap_hwmod omap44xx_mpu_hwmod = { .name = "mpu", .class = &omap44xx_mpu_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_mpu_irqs, .main_clk = "dpll_mpu_m2_ck", .prcm = { @@ -4749,7 +4749,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { static struct omap_hwmod omap44xx_uart3_hwmod = { .name = "uart3", .class = &omap44xx_uart_hwmod_class, - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, .main_clk = "uart3_fck", -- cgit v0.10.2 From 00fe610b7a699780e956756be91ba60343302e49 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: OMAP4: hwmod data: Fix bad alignement Fix .prcm alignement and usb_otg_hs class and hwmod structures. Add a couple of more potential hwmods in the comment. Remove hsi, since it is already included in the data. Remove one blank line. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index eb00c08..0b73d8e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -632,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { * gpmc * gpu * hdq1w - * hsi + * mcasp + * mpu_c0 + * mpu_c1 * ocmc_ram * ocp2scp_usb_phy * ocp_wp_noc @@ -739,7 +741,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, .main_clk = "aess_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, }, @@ -768,7 +770,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { static struct omap_hwmod omap44xx_bandgap_hwmod = { .name = "bandgap", .class = &omap44xx_bandgap_hwmod_class, - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, }, @@ -827,7 +829,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .class = &omap44xx_counter_hwmod_class, .flags = HWMOD_SWSUP_SIDLE, .main_clk = "sys_32k_ck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, }, @@ -1003,7 +1005,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, .main_clk = "dmic_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, }, @@ -2093,7 +2095,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .class = &omap44xx_hsi_hwmod_class, .mpu_irqs = omap44xx_hsi_irqs, .main_clk = "hsi_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, }, @@ -2390,7 +2392,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c0_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), - .prcm = { + .prcm = { .omap4 = { .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, @@ -2405,7 +2407,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c1_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), - .prcm = { + .prcm = { .omap4 = { .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, @@ -2420,7 +2422,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), .main_clk = "ipu_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, @@ -2506,7 +2508,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, .main_clk = "iss_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, }, @@ -2686,7 +2688,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .class = &omap44xx_kbd_hwmod_class, .mpu_irqs = omap44xx_kbd_irqs, .main_clk = "kbd_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, }, @@ -2750,7 +2752,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, .mpu_irqs = omap44xx_mailbox_irqs, - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, }, @@ -3132,7 +3134,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .main_clk = "mcpdm_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, }, @@ -3429,7 +3431,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { }; /* mmc1 */ - static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { { .irq = 83 + OMAP44XX_IRQ_GIC_START }, { .irq = -1 } @@ -3480,7 +3481,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, .main_clk = "mmc1_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, }, @@ -3539,7 +3540,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, .main_clk = "mmc2_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, }, @@ -3593,7 +3594,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, .main_clk = "mmc3_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, }, @@ -3646,7 +3647,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .sdma_reqs = omap44xx_mmc4_sdma_reqs, .main_clk = "mmc4_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, }, @@ -3698,7 +3699,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, .main_clk = "mmc5_fck", - .prcm = { + .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, }, @@ -4834,8 +4835,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = { }; static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { - .name = "usb_otg_hs", - .sysc = &omap44xx_usb_otg_hs_sysc, + .name = "usb_otg_hs", + .sysc = &omap44xx_usb_otg_hs_sysc, }; /* usb_otg_hs */ @@ -4889,7 +4890,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { }, }, .opt_clks = usb_otg_hs_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), + .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), .slaves = omap44xx_usb_otg_hs_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), .masters = omap44xx_usb_otg_hs_masters, -- cgit v0.10.2 From 7e69ed974259b42c4f87a44222415dbb7472898d Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:28 -0600 Subject: OMAP4: hwmod data: Align interconnect format with regular modules The interconnect modules were using a slightly different layout than the regular modules. Align the layout for better consitency. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 0b73d8e..346a028 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = { .name = "dmm", }; -/* dmm interface data */ +/* dmm */ +static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { + { .irq = 113 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } +}; + /* l3_main_1 -> dmm */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { .master = &omap44xx_l3_main_1_hwmod, @@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { &omap44xx_mpu__dmm, }; -static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { - { .irq = 113 + OMAP44XX_IRQ_GIC_START }, - { .irq = -1 } -}; - static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, + .mpu_irqs = omap44xx_dmm_irqs, .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), - .mpu_irqs = omap44xx_dmm_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = { .name = "emif_fw", }; -/* emif_fw interface data */ +/* emif_fw */ /* dmm -> emif_fw */ static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { .master = &omap44xx_dmm_hwmod, @@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = { .name = "l3", }; -/* l3_instr interface data */ +/* l3_instr */ /* iva -> l3_instr */ static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { .master = &omap44xx_iva_hwmod, @@ -215,7 +215,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_1 interface data */ +/* l3_main_1 */ static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, @@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, + .mpu_irqs = omap44xx_l3_main_1_irqs, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), - .mpu_irqs = omap44xx_l3_main_1_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_2 interface data */ +/* l3_main_2 */ /* dma_system -> l3_main_2 */ static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { .master = &omap44xx_dma_system_hwmod, @@ -403,7 +403,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l3_main_3 interface data */ +/* l3_main_3 */ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { { .pa_start = 0x45000000, @@ -461,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe interface data */ +/* l4_abe */ /* aess -> l4_abe */ static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { .master = &omap44xx_aess_hwmod, @@ -510,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_cfg interface data */ +/* l4_cfg */ /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { .master = &omap44xx_l3_main_1_hwmod, @@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_per interface data */ +/* l4_per */ /* l3_main_2 -> l4_per */ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { .master = &omap44xx_l3_main_2_hwmod, @@ -554,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -/* l4_wkup interface data */ +/* l4_wkup */ /* l4_cfg -> l4_wkup */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { .master = &omap44xx_l4_cfg_hwmod, @@ -584,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = { .name = "mpu_bus", }; -/* mpu_private interface data */ +/* mpu_private */ /* mpu -> mpu_private */ static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { .master = &omap44xx_mpu_hwmod, -- cgit v0.10.2 From 962519e07e44bdeb381fdc7689361a144fe3491c Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: OMAP4: clock data: Add sddiv to USB DPLL The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it in USB DPLL. Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8c96567..f28a9c9 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, + .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, .max_multiplier = OMAP4430_MAX_DPLL_MULT, .max_divider = OMAP4430_MAX_DPLL_DIV, .min_divider = 1, -- cgit v0.10.2 From 6629f3c47006dd00db0b87ce02a55a16ecacfbbf Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0" and "fs_fck" alias used by the driver. The entry with NULL dev is thus not needed anymore. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Felipe Balbi Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index f28a9c9..0fa1cb8 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), - CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), @@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), - CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), @@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), - CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK(NULL, "usim_ck", &usim_ck, CK_443X), -- cgit v0.10.2 From 7ecd4228b48192890220e1fd1b39c8bd2988aa80 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:45 -0600 Subject: OMAP4: clock data: Re-order some clock nodes and structure fields A couple of fieds were edited manually and thus do not stick to the template used by the generator and by other structures. Move them to the correct location. Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped the UNIPRO changes since those will be removed in a later patch] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 0fa1cb8..4b57d55 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = { static struct clk pad_clks_ck = { .name = "pad_clks_ck", .rate = 12000000, - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_CLKSEL_ABE, - .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, }; static struct clk pad_slimbus_core_clks_ck = { @@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = { static struct clk slimbus_clk = { .name = "slimbus_clk", .rate = 12000000, - .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_CLKSEL_ABE, - .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_CLKSEL_ABE, + .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, }; static struct clk sys_32k_ck = { @@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { static struct clk dpll_abe_x2_ck = { .name = "dpll_abe_x2_ck", .parent = &dpll_abe_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, .flags = CLOCK_CLKOUTX2, .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, }; static const struct clksel_rate div31_1to31_rates[] = { @@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, }; static struct clk dpll_core_m7x2_ck = { @@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { static struct clk dpll_per_x2_ck = { .name = "dpll_per_x2_ck", .parent = &dpll_per_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, .flags = CLOCK_CLKOUTX2, .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, }; static const struct clksel dpll_per_m2x2_div[] = { @@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, .ops = &clkops_omap2_dflt, - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, }; static struct clk dpll_per_m4x2_ck = { @@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = { static struct clk dpll_unipro_x2_ck = { .name = "dpll_unipro_x2_ck", .parent = &dpll_unipro_ck, + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, .flags = CLOCK_CLKOUTX2, - .ops = &clkops_null, + .ops = &clkops_omap4_dpllmx_ops, .recalc = &omap3_clkoutx2_recalc, }; @@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = { static struct clk dpll_usb_clkdcoldo_ck = { .name = "dpll_usb_clkdcoldo_ck", .parent = &dpll_usb_ck, - .ops = &clkops_omap4_dpllmx_ops, .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, + .ops = &clkops_omap4_dpllmx_ops, .recalc = &followparent_recalc, }; @@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, - .clkdm_name = "l3_instr_clkdm", .flags = ENABLE_ON_INIT, + .clkdm_name = "l3_instr_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, }; @@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = { .enable_reg = OMAP4_SCRM_AUXCLK2, .enable_bit = OMAP4_ENABLE_SHIFT, }; + static struct clk auxclk3_ck = { .name = "auxclk3_ck", .parent = &sys_clkin_ck, @@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), - CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), @@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), - CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK(NULL, "usim_ck", &usim_ck, CK_443X), CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), CLK(NULL, "usim_fck", &usim_fck, CK_443X), CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), - CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), + CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), + CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), + CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), + CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), + CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), + CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), + CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), + CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), + CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), + CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), + CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), + CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X), @@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = { CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), + CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), @@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), + CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), + CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), - CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), - CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), - CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), - CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), - CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), - CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), - CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), - CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), - CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), - CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), - CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), - CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), }; int __init omap4xxx_clk_init(void) -- cgit v0.10.2 From 628479a8ea5d32ef26ba0b4eb26f8d6712a574ec Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:14:46 -0600 Subject: OMAP4: clock data: Fix max mult and div for USB DPLL The DPLL USB can generate higher speed (x2) than the regular ones. The max multiplication value is then twice the previous value. Fix both max_mult and max_div with that correct values. Change the max_div variable type to u16 to allow storing up to 256. Replace as well the define with the value to avoid unneeded indirection and provide a better readability. Remove the defines that become useless. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h index 6be1095..7ceb870 100644 --- a/arch/arm/mach-omap2/clock44xx.h +++ b/arch/arm/mach-omap2/clock44xx.h @@ -8,13 +8,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H -/* - * XXX Missing values for the OMAP4 DPLL_USB - * XXX Missing min_multiplier values for all OMAP4 DPLLs - */ -#define OMAP4430_MAX_DPLL_MULT 2047 -#define OMAP4430_MAX_DPLL_DIV 128 - int omap4xxx_clk_init(void); #endif diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 4b57d55..8307c9e 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = { .enable_mask = OMAP4430_DPLL_EN_MASK, .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 2047, + .max_divider = 128, .min_divider = 1, }; @@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = { .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, - .max_multiplier = OMAP4430_MAX_DPLL_MULT, - .max_divider = OMAP4430_MAX_DPLL_DIV, + .max_multiplier = 4095, + .max_divider = 256, .min_divider = 1, }; diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 006e599..f57e064 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -152,7 +152,7 @@ struct dpll_data { u16 max_multiplier; u8 last_rounded_n; u8 min_divider; - u8 max_divider; + u16 max_divider; u8 modes; #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) void __iomem *autoidle_reg; -- cgit v0.10.2 From ad98a18b3ffa15761e6b3b4a944d4ef37f5ec2c5 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:04 -0600 Subject: OMAP4: prcm: Fix errors in few defines name A couple of macros were wrongly changed during the _MOD to _INST rename done in the following commit: OMAP4: PRCM: rename _MOD macros to _INST cdb54c4457d68994da7c2e16907adfbfc130060d Fix them to their original name. Some CM and PRM instances were not well aligned. Align them. Remove one blank line in cm2_44xx.h to align the output with the other (cm1_44xx.h, prm44xx.h) files. Update header copyright date. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h index e2d7a56..fc649f5 100644 --- a/arch/arm/mach-omap2/cm1_44xx.h +++ b/arch/arm/mach-omap2/cm1_44xx.h @@ -1,7 +1,7 @@ /* * OMAP44xx CM1 instance offset macros * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley (paul@pwsan.com) @@ -41,9 +41,9 @@ #define OMAP4430_CM1_INSTR_INST 0x0f00 /* CM1 clockdomain register offsets (from instance start) */ -#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 -#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 -#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 +#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 +#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 +#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 /* CM1 */ @@ -82,8 +82,8 @@ #define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050 #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 @@ -98,8 +98,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c #define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 @@ -116,8 +116,8 @@ #define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc #define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 @@ -134,8 +134,8 @@ #define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120 #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 @@ -154,8 +154,8 @@ #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160 #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164 diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h index aa47450..8036a16 100644 --- a/arch/arm/mach-omap2/cm2_44xx.h +++ b/arch/arm/mach-omap2/cm2_44xx.h @@ -1,7 +1,7 @@ /* * OMAP44xx CM2 instance offset macros * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2010 Nokia Corporation * * Paul Walmsley (paul@pwsan.com) @@ -40,9 +40,9 @@ #define OMAP4430_CM2_CAM_INST 0x1000 #define OMAP4430_CM2_DSS_INST 0x1100 #define OMAP4430_CM2_GFX_INST 0x1200 -#define OMAP4430_CM2_L3INIT_INST 0x1300 +#define OMAP4430_CM2_L3INIT_INST 0x1300 #define OMAP4430_CM2_L4PER_INST 0x1400 -#define OMAP4430_CM2_CEFUSE_INST 0x1600 +#define OMAP4430_CM2_CEFUSE_INST 0x1600 #define OMAP4430_CM2_RESTORE_INST 0x1e00 #define OMAP4430_CM2_INSTR_INST 0x1f00 @@ -65,7 +65,6 @@ #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 - /* CM2 */ /* CM2.OCP_SOCKET_CM2 register offsets */ @@ -121,8 +120,8 @@ #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084 @@ -135,8 +134,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0 @@ -151,8 +150,8 @@ #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8 #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) /* CM2.ALWAYS_ON_CM2 register offsets */ #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000 @@ -227,8 +226,8 @@ #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) -#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528 -#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) +#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528 +#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530 #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600 diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 67a0d3f..2aec8c8 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -31,7 +31,7 @@ #define OMAP4430_PRM_BASE 0x4a306000 #define OMAP44XX_PRM_REGADDR(inst, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) + OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) /* PRM instances */ @@ -46,14 +46,14 @@ #define OMAP4430_PRM_CAM_INST 0x1000 #define OMAP4430_PRM_DSS_INST 0x1100 #define OMAP4430_PRM_GFX_INST 0x1200 -#define OMAP4430_PRM_L3INIT_INST 0x1300 +#define OMAP4430_PRM_L3INIT_INST 0x1300 #define OMAP4430_PRM_L4PER_INST 0x1400 -#define OMAP4430_PRM_CEFUSE_INST 0x1600 +#define OMAP4430_PRM_CEFUSE_INST 0x1600 #define OMAP4430_PRM_WKUP_INST 0x1700 #define OMAP4430_PRM_WKUP_CM_INST 0x1800 #define OMAP4430_PRM_EMU_INST 0x1900 -#define OMAP4430_PRM_EMU_CM_INST 0x1a00 -#define OMAP4430_PRM_DEVICE_INST 0x1b00 +#define OMAP4430_PRM_EMU_CM_INST 0x1a00 +#define OMAP4430_PRM_DEVICE_INST 0x1b00 #define OMAP4430_PRM_INSTR_INST 0x1f00 /* PRM clockdomain register offsets (from instance start) */ @@ -247,8 +247,8 @@ #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) -#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c -#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) +#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c +#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 @@ -713,8 +713,8 @@ #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) -#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8 -#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) +#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 +#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 @@ -751,8 +751,8 @@ #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) -#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4 -#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) +#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 +#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) -- cgit v0.10.2 From 631af17cafae308d04d864d6250997cededb3467 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:04 -0600 Subject: OMAP4: prm: Remove wrong clockdomain offsets The following commit introduced new macros to define an offset per clock domain in an instance. commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c OMAP4: CM instances: add clockdomain register offsets The PRM contains only two clock controls management entities: EMU and WKUP. Remove the other ones. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 2aec8c8..6e53120 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -57,19 +57,7 @@ #define OMAP4430_PRM_INSTR_INST 0x1f00 /* PRM clockdomain register offsets (from instance start) */ -#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000 -#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000 -#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000 -#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000 -#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000 -#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000 -#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000 -#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000 -#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000 -#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000 -#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000 #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 -#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000 #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 /* OMAP4 specific register offsets */ -- cgit v0.10.2 From 0fef658331354138d422500509d6e006d9f070d6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:05 -0600 Subject: OMAP4: powerdomain data: Fix indentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Indent flags to be aligned with other fields. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar [paul@pwsan.com: split this patch from an earlier patch by Benoît; edited commit message] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7..3a7e678 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = { [3] = PWRSTS_ON, /* ducati_l2ram */ [4] = PWRSTS_ON, /* ducati_unicache */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* gfx_44xx_pwrdm: 3D accelerator power domain */ @@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* gfx_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* abe_44xx_pwrdm: Audio back end power domain */ @@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = { [0] = PWRSTS_ON, /* aessmem */ [1] = PWRSTS_ON, /* periphmem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* dss_44xx_pwrdm: Display subsystem power domain */ @@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* dss_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* tesla_44xx_pwrdm: Tesla processor power domain */ @@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = { [1] = PWRSTS_ON, /* tesla_l1 */ [2] = PWRSTS_ON, /* tesla_l2 */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* wkup_44xx_pwrdm: Wake-up power domain */ @@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { [2] = PWRSTS_ON, /* tcm1_mem */ [3] = PWRSTS_ON, /* tcm2_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* cam_44xx_pwrdm: Camera subsystem power domain */ @@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* cam_mem */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ @@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* l3init_bank1 */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* l4per_44xx_pwrdm: Target peripherals power domain */ @@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = { [0] = PWRSTS_ON, /* nonretained_bank */ [1] = PWRSTS_ON, /* retained_bank */ }, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* -- cgit v0.10.2 From 7b342a8d4c310b5cc153b35ea80aab03ddf2e6da Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:05 -0600 Subject: OMAP4: cm: Remove RESTORE macros to avoid access from SW The restore part of the CM is an alias of some regular registers used only during the SAR restore to facilate the dma to write a contiguous set of registers. The registers should never be used by the SW, only the original register have to be used. Remove them from cmX_44xx.h files to avoid anybody to use them by mistake. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h index 9d47a05..0e77945 100644 --- a/arch/arm/mach-omap2/cm-regbits-44xx.h +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h @@ -22,22 +22,18 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H -/* - * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, - * CM_TESLA_DYNAMICDEP - */ +/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_ABE_DYNDEP_SHIFT 3 #define OMAP4430_ABE_DYNDEP_MASK (1 << 3) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_ABE_STATDEP_SHIFT 3 #define OMAP4430_ABE_STATDEP_MASK (1 << 3) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_ALWONCORE_DYNDEP_SHIFT 16 #define OMAP4430_ALWONCORE_DYNDEP_MASK (1 << 16) @@ -47,14 +43,13 @@ /* * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, - * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY, - * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER, - * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB + * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, + * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB */ #define OMAP4430_AUTO_DPLL_MODE_SHIFT 0 #define OMAP4430_AUTO_DPLL_MODE_MASK (0x7 << 0) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_CEFUSE_DYNDEP_SHIFT 17 #define OMAP4430_CEFUSE_DYNDEP_MASK (1 << 17) @@ -82,15 +77,15 @@ #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK (1 << 8) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK (1 << 11) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK (1 << 12) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK (1 << 13) @@ -110,31 +105,31 @@ #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK (1 << 10) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK (1 << 11) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK (1 << 12) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK (1 << 13) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT 14 #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK (1 << 14) @@ -158,7 +153,7 @@ #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK (1 << 10) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT 15 #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK (1 << 15) @@ -170,55 +165,55 @@ #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK (1 << 11) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT 20 #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK (1 << 20) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT 26 #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK (1 << 26) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT 21 #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK (1 << 21) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT 27 #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK (1 << 27) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT 13 #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK (1 << 13) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK (1 << 12) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT 28 #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK (1 << 28) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT 29 #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK (1 << 29) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT 11 #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK (1 << 11) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT 16 #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK (1 << 16) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT 17 #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK (1 << 17) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT 18 #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK (1 << 18) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT 19 #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK (1 << 19) @@ -234,11 +229,11 @@ #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK (1 << 10) -/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ +/* Used by CM_L3_1_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK (1 << 8) -/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ +/* Used by CM_L3_2_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK (1 << 8) @@ -254,7 +249,7 @@ #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK (1 << 8) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK (1 << 8) @@ -262,7 +257,7 @@ #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK (1 << 8) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK (1 << 8) @@ -282,7 +277,7 @@ #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << 8) -/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ +/* Used by CM_L4CFG_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK (1 << 8) @@ -290,11 +285,11 @@ #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK (1 << 9) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK (1 << 8) @@ -306,7 +301,7 @@ #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12 #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK (1 << 12) -/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ +/* Used by CM_MPU_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK (1 << 8) @@ -314,43 +309,43 @@ #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9 #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK (1 << 9) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16 #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << 16) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17 #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK (1 << 17) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18 #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK (1 << 18) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19 #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK (1 << 19) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT 25 #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK (1 << 25) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20 #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << 20) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21 #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << 21) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22 #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << 22) -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ +/* Used by CM_L4PER_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24 #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK (1 << 24) -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ +/* Used by CM_MEMIF_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK (1 << 10) @@ -378,27 +373,27 @@ #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8 #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22 #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK (1 << 22) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23 #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK (1 << 23) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24 #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK (1 << 24) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << 10) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT 14 #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK (1 << 14) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15 #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << 15) @@ -406,11 +401,11 @@ #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10 #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << 10) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30 #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK (1 << 30) -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ +/* Used by CM_L3INIT_CLKSTCTRL */ #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25 #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << 25) @@ -432,7 +427,7 @@ /* * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL, - * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ + * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL */ #define OMAP4430_CLKSEL_0_0_SHIFT 0 #define OMAP4430_CLKSEL_0_0_MASK (1 << 0) @@ -453,14 +448,11 @@ #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_CORE_SHIFT 0 #define OMAP4430_CLKSEL_CORE_MASK (1 << 0) -/* - * Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, - * CM_SHADOW_FREQ_CONFIG2 - */ +/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1 #define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << 1) @@ -484,18 +476,15 @@ #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT 26 #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK (0x3 << 26) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_L3_SHIFT 4 #define OMAP4430_CLKSEL_L3_MASK (1 << 4) -/* - * Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, - * CM_SHADOW_FREQ_CONFIG2 - */ +/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT 2 #define OMAP4430_CLKSEL_L3_SHADOW_MASK (1 << 2) -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ +/* Used by CM_CLKSEL_CORE */ #define OMAP4430_CLKSEL_L4_SHIFT 8 #define OMAP4430_CLKSEL_L4_MASK (1 << 8) @@ -526,11 +515,11 @@ #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24 #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24 #define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << 24) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25 #define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << 25) @@ -538,13 +527,10 @@ * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL, * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL, * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL, - * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3INSTR_CLKSTCTRL, - * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, CM_L3_2_CLKSTCTRL, - * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE, - * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, CM_L4SEC_CLKSTCTRL, - * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, CM_MPU_CLKSTCTRL, - * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, CM_TESLA_CLKSTCTRL, - * CM_WKUP_CLKSTCTRL + * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, + * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL, + * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL, + * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL */ #define OMAP4430_CLKTRCTRL_SHIFT 0 #define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) @@ -561,10 +547,7 @@ #define OMAP4430_CUSTOM_SHIFT 6 #define OMAP4430_CUSTOM_MASK (0x3 << 6) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ #define OMAP4430_D2D_DYNDEP_SHIFT 18 #define OMAP4430_D2D_DYNDEP_MASK (1 << 18) @@ -574,31 +557,29 @@ /* * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, - * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY, - * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU, - * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, - * CM_SSC_DELTAMSTEP_DPLL_USB + * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, + * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER, + * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB */ #define OMAP4430_DELTAMSTEP_SHIFT 0 #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ -#define OMAP4430_DLL_OVERRIDE_SHIFT 2 -#define OMAP4430_DLL_OVERRIDE_MASK (1 << 2) +/* Used by CM_DLL_CTRL */ +#define OMAP4430_DLL_OVERRIDE_SHIFT 0 +#define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) -/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ -#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT 0 -#define OMAP4430_DLL_OVERRIDE_0_0_MASK (1 << 0) +/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */ +#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT 2 +#define OMAP4430_DLL_OVERRIDE_2_2_MASK (1 << 2) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DLL_RESET_SHIFT 3 #define OMAP4430_DLL_RESET_MASK (1 << 3) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, - * CM_CLKSEL_DPLL_USB + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB */ #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23 #define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << 23) @@ -607,28 +588,19 @@ #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK (1 << 8) -/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */ +/* Used by CM_CLKSEL_DPLL_CORE */ #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT 20 #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK (1 << 20) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT 0 #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT 5 #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK (1 << 8) @@ -637,9 +609,8 @@ #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK (1 << 10) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO */ #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT 0 #define OMAP4430_DPLL_CLKOUT_DIV_MASK (0x1f << 0) @@ -649,9 +620,8 @@ #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK (0x7f << 0) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO */ #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT 5 #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK (1 << 5) @@ -661,29 +631,28 @@ #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK (1 << 7) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB */ #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT 8 #define OMAP4430_DPLL_CORE_DPLL_EN_MASK (0x7 << 8) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT 11 #define OMAP4430_DPLL_CORE_M2_DIV_MASK (0x1f << 11) -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT 3 #define OMAP4430_DPLL_CORE_M5_DIV_MASK (0x1f << 3) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO */ #define OMAP4430_DPLL_DIV_SHIFT 0 #define OMAP4430_DPLL_DIV_MASK (0x7f << 0) @@ -693,9 +662,8 @@ #define OMAP4430_DPLL_DIV_0_7_MASK (0xff << 0) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER */ #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT 8 #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK (1 << 8) @@ -705,26 +673,25 @@ #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK (1 << 3) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_EN_SHIFT 0 #define OMAP4430_DPLL_EN_MASK (0x7 << 0) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO */ #define OMAP4430_DPLL_LPMODE_EN_SHIFT 10 #define OMAP4430_DPLL_LPMODE_EN_MASK (1 << 10) /* - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, + * CM_CLKSEL_DPLL_UNIPRO */ #define OMAP4430_DPLL_MULT_SHIFT 8 #define OMAP4430_DPLL_MULT_MASK (0x7ff << 8) @@ -734,9 +701,9 @@ #define OMAP4430_DPLL_MULT_USB_MASK (0xfff << 8) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO */ #define OMAP4430_DPLL_REGM4XEN_SHIFT 11 #define OMAP4430_DPLL_REGM4XEN_MASK (1 << 11) @@ -746,55 +713,46 @@ #define OMAP4430_DPLL_SD_DIV_MASK (0xff << 24) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_ACK_SHIFT 13 #define OMAP4430_DPLL_SSC_ACK_MASK (1 << 13) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT 14 #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK (1 << 14) /* - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, - * CM_CLKMODE_DPLL_USB + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB */ #define OMAP4430_DPLL_SSC_EN_SHIFT 12 #define OMAP4430_DPLL_SSC_EN_MASK (1 << 12) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_DSS_DYNDEP_SHIFT 8 #define OMAP4430_DSS_DYNDEP_MASK (1 << 8) -/* - * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE - */ +/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ #define OMAP4430_DSS_STATDEP_SHIFT 8 #define OMAP4430_DSS_STATDEP_MASK (1 << 8) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_DUCATI_DYNDEP_SHIFT 0 #define OMAP4430_DUCATI_DYNDEP_MASK (1 << 0) -/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE */ +/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ #define OMAP4430_DUCATI_STATDEP_SHIFT 0 #define OMAP4430_DUCATI_STATDEP_MASK (1 << 0) -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG1 */ #define OMAP4430_FREQ_UPDATE_SHIFT 0 #define OMAP4430_FREQ_UPDATE_MASK (1 << 0) @@ -802,7 +760,7 @@ #define OMAP4430_FUNC_SHIFT 16 #define OMAP4430_FUNC_MASK (0xfff << 16) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_GFX_DYNDEP_SHIFT 10 #define OMAP4430_GFX_DYNDEP_MASK (1 << 10) @@ -810,119 +768,95 @@ #define OMAP4430_GFX_STATDEP_SHIFT 10 #define OMAP4430_GFX_STATDEP_MASK (1 << 10) -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ +/* Used by CM_SHADOW_FREQ_CONFIG2 */ #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT 0 #define OMAP4430_GPMC_FREQ_UPDATE_MASK (1 << 0) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f << 0) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << 5) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << 8) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK (1 << 12) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f << 0) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << 5) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << 8) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK (1 << 12) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << 8) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK (1 << 12) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT 0 #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK (0x1f << 0) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT 5 #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK (1 << 5) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT 8 #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK (1 << 8) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT 12 #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK (1 << 12) @@ -934,8 +868,7 @@ * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, @@ -944,30 +877,24 @@ * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, @@ -983,166 +910,148 @@ #define OMAP4430_IDLEST_SHIFT 16 #define OMAP4430_IDLEST_MASK (0x3 << 16) -/* - * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE - */ +/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ #define OMAP4430_ISS_DYNDEP_SHIFT 9 #define OMAP4430_ISS_DYNDEP_MASK (1 << 9) /* * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_TESLA_STATICDEP */ #define OMAP4430_ISS_STATDEP_SHIFT 9 #define OMAP4430_ISS_STATDEP_MASK (1 << 9) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_TESLA_DYNAMICDEP */ +/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_IVAHD_DYNDEP_SHIFT 2 #define OMAP4430_IVAHD_DYNDEP_MASK (1 << 2) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_IVAHD_STATDEP_SHIFT 2 #define OMAP4430_IVAHD_STATDEP_MASK (1 << 2) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_L3INIT_DYNDEP_SHIFT 7 #define OMAP4430_L3INIT_DYNDEP_MASK (1 << 7) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, - * CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3INIT_STATDEP_SHIFT 7 #define OMAP4430_L3INIT_STATDEP_MASK (1 << 7) /* * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_2_DYNAMICDEP, - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP + * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_L3_1_DYNDEP_SHIFT 5 #define OMAP4430_L3_1_DYNDEP_MASK (1 << 5) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3_1_STATDEP_SHIFT 5 #define OMAP4430_L3_1_STATDEP_MASK (1 << 5) /* - * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, - * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, - * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP + * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, + * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, CM_IVAHD_DYNAMICDEP, + * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP */ #define OMAP4430_L3_2_DYNDEP_SHIFT 6 #define OMAP4430_L3_2_DYNDEP_MASK (1 << 6) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L3_2_STATDEP_SHIFT 6 #define OMAP4430_L3_2_STATDEP_MASK (1 << 6) -/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_1_DYNAMICDEP */ #define OMAP4430_L4CFG_DYNDEP_SHIFT 12 #define OMAP4430_L4CFG_DYNDEP_MASK (1 << 12) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4CFG_STATDEP_SHIFT 12 #define OMAP4430_L4CFG_STATDEP_MASK (1 << 12) -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ +/* Used by CM_L3_2_DYNAMICDEP */ #define OMAP4430_L4PER_DYNDEP_SHIFT 13 #define OMAP4430_L4PER_DYNDEP_MASK (1 << 13) /* - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, + * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4PER_STATDEP_SHIFT 13 #define OMAP4430_L4PER_STATDEP_MASK (1 << 13) -/* - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, - * CM_L4PER_DYNAMICDEP_RESTORE - */ +/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ #define OMAP4430_L4SEC_DYNDEP_SHIFT 14 #define OMAP4430_L4SEC_DYNDEP_MASK (1 << 14) /* * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE + * CM_SDMA_STATICDEP */ #define OMAP4430_L4SEC_STATDEP_SHIFT 14 #define OMAP4430_L4SEC_STATDEP_MASK (1 << 14) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_L4WKUP_DYNDEP_SHIFT 15 #define OMAP4430_L4WKUP_DYNDEP_MASK (1 << 15) /* * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 #define OMAP4430_L4WKUP_STATDEP_MASK (1 << 15) /* - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_L3_1_DYNAMICDEP, - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP + * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_MPU_DYNAMICDEP */ #define OMAP4430_MEMIF_DYNDEP_SHIFT 4 #define OMAP4430_MEMIF_DYNDEP_MASK (1 << 4) /* - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP */ #define OMAP4430_MEMIF_STATDEP_SHIFT 4 #define OMAP4430_MEMIF_STATDEP_MASK (1 << 4) /* * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, - * CM_SSC_MODFREQDIV_DPLL_USB + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB */ #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT 8 #define OMAP4430_MODFREQDIV_EXPONENT_MASK (0x7 << 8) /* * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, - * CM_SSC_MODFREQDIV_DPLL_USB + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB */ #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT 0 #define OMAP4430_MODFREQDIV_MANTISSA_MASK (0x7f << 0) @@ -1155,8 +1064,7 @@ * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, @@ -1165,30 +1073,24 @@ * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, @@ -1221,11 +1123,9 @@ #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK (1 << 8) /* - * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, CM_WKUP_GPIO1_CLKCTRL + * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, + * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, + * CM_WKUP_GPIO1_CLKCTRL */ #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_DBCLK_MASK (1 << 8) @@ -1254,23 +1154,23 @@ #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT 10 #define OMAP4430_OPTFCLKEN_FCLK2_MASK (1 << 10) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT 15 #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK (1 << 15) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT 13 #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK (1 << 13) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT 14 #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK (1 << 14) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT 11 #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK (1 << 11) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT 12 #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK (1 << 12) @@ -1306,27 +1206,27 @@ #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT 9 #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK (1 << 9) -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT 10 #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK (1 << 10) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT 8 #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK (1 << 8) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT 9 #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK (1 << 9) -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT 10 #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK (1 << 10) @@ -1374,7 +1274,7 @@ #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT 22 #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK (0x3 << 22) -/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */ +/* Used by CM_DYN_DEP_PRESCAL */ #define OMAP4430_PRESCAL_SHIFT 0 #define OMAP4430_PRESCAL_MASK (0x3f << 0) @@ -1382,10 +1282,7 @@ #define OMAP4430_R_RTL_SHIFT 11 #define OMAP4430_R_RTL_MASK (0x1f << 11) -/* - * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, - * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE - */ +/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */ #define OMAP4430_SAR_MODE_SHIFT 4 #define OMAP4430_SAR_MODE_MASK (1 << 4) @@ -1397,7 +1294,7 @@ #define OMAP4430_SCHEME_SHIFT 30 #define OMAP4430_SCHEME_MASK (0x3 << 30) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_SDMA_DYNDEP_SHIFT 11 #define OMAP4430_SDMA_DYNDEP_MASK (1 << 11) @@ -1417,10 +1314,10 @@ * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, - * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, - * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, - * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, - * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL + * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, + * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, + * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, + * CM_TESLA_TESLA_CLKCTRL */ #define OMAP4430_STBYST_SHIFT 18 #define OMAP4430_STBYST_MASK (1 << 18) @@ -1438,17 +1335,13 @@ #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK (1 << 9) /* - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB */ #define OMAP4430_ST_DPLL_CLKOUT_SHIFT 9 #define OMAP4430_ST_DPLL_CLKOUT_MASK (1 << 9) -/* - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER - */ +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT 9 #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK (1 << 9) @@ -1457,30 +1350,24 @@ #define OMAP4430_ST_DPLL_CLKOUTX2_MASK (1 << 11) /* - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, + * CM_DIV_M4_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK (1 << 9) /* - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, + * CM_DIV_M5_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK (1 << 9) -/* - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER - */ +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK (1 << 9) -/* - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, - * CM_DIV_M7_DPLL_PER - */ +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT 9 #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK (1 << 9) @@ -1496,7 +1383,7 @@ #define OMAP4430_SYS_CLKSEL_SHIFT 0 #define OMAP4430_SYS_CLKSEL_MASK (0x7 << 0) -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ +/* Used by CM_L4CFG_DYNAMICDEP */ #define OMAP4430_TESLA_DYNDEP_SHIFT 1 #define OMAP4430_TESLA_DYNDEP_MASK (1 << 1) @@ -1505,11 +1392,9 @@ #define OMAP4430_TESLA_STATDEP_MASK (1 << 1) /* - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_DUCATI_DYNAMICDEP, - * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, - * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, - * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP + * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, + * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, + * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ #define OMAP4430_WINDOWSIZE_SHIFT 24 #define OMAP4430_WINDOWSIZE_MASK (0xf << 24) diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h index fc649f5..1bc00dc 100644 --- a/arch/arm/mach-omap2/cm1_44xx.h +++ b/arch/arm/mach-omap2/cm1_44xx.h @@ -217,42 +217,6 @@ #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 #define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) -/* CM1.RESTORE_CM1 register offsets */ -#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000 -#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000) -#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004 -#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004) -#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008 -#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008) -#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c -#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c) -#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010 -#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010) -#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014 -#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014) -#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018 -#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018) -#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c -#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c) -#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020 -#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020) -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024 -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024) -#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028 -#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028) -#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c -#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c) -#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030 -#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030) -#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034 -#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034) -#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038 -#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038) -#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c -#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c) -#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040 -#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040) - /* Function prototypes */ extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h index 8036a16..b9de72d 100644 --- a/arch/arm/mach-omap2/cm2_44xx.h +++ b/arch/arm/mach-omap2/cm2_44xx.h @@ -449,56 +449,6 @@ #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020) -/* CM2.RESTORE_CM2 register offsets */ -#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000 -#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000) -#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004 -#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004) -#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008 -#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008) -#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c -#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c) -#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010 -#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010) -#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014 -#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014) -#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018 -#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018) -#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c -#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c) -#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020 -#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020) -#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024 -#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024) -#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028 -#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028) -#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c -#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c) -#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030 -#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030) -#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034 -#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034) -#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038 -#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038) -#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c -#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c) -#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040 -#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040) -#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044 -#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044) -#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048 -#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048) -#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c -#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c) -#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050 -#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050) -#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054 -#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054) -#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058 -#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058) -#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c -#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c) - /* Function prototypes */ extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); -- cgit v0.10.2 From a3b90ad8d1fb0ddaa6964d83886283ae3e338cea Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:06 -0600 Subject: OMAP4: prcm_mpu: Fix indent in few macros Some maros were not well aligned. Re-align them. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index d22d1b4..8a6e250 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h @@ -31,7 +31,6 @@ OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg)) /* PRCM_MPU instances */ - #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000 #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200 #define OMAP4430_PRCM_MPU_CPU0_INST 0x0400 @@ -52,46 +51,46 @@ */ /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ -#define OMAP4_REVISION_PRCM_OFFSET 0x0000 -#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) +#define OMAP4_REVISION_PRCM_OFFSET 0x0000 +#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) /* PRCM_MPU.DEVICE_PRM register offsets */ -#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 -#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) -#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 -#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) +#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 +#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) +#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 +#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) /* PRCM_MPU.CPU0 register offsets */ -#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 -#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) -#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 -#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) -#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 -#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) -#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c -#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) -#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 -#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) -#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 -#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) -#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 -#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) +#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 +#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) +#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 +#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) +#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 +#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) +#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c +#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) +#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 +#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) +#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 +#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) +#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 +#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) /* PRCM_MPU.CPU1 register offsets */ -#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 -#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) -#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 -#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) -#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 -#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) -#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c -#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) -#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 -#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) -#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 -#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) -#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 -#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) +#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 +#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) +#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 +#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) +#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 +#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) +#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c +#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) +#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 +#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) +#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 +#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) +#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 +#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) /* Function prototypes */ # ifndef __ASSEMBLER__ -- cgit v0.10.2 From 3c95b707caf3504b37b11d2662bde77e1618d481 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 19:15:06 -0600 Subject: OMAP4: clockdomain data: Fix data order and wrong name MPUSS was renamed MPU and L3_D2D D2D. The rename will slightly change the order of the structure and thus generate some structures moves. Add a comment and remove a comma. Update Copyright for TI and Nokia and add back Paul in the author list. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index a607ec1..66090f2 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -1,11 +1,12 @@ /* * OMAP4 Clock domains framework * - * Copyright (C) 2009 Texas Instruments, Inc. - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009-2011 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) + * Paul Walmsley (paul@pwsan.com) * * This file is automatically generated from the OMAP hardware databases. * We respectfully ask that any modifications to this file be coordinated @@ -32,7 +33,7 @@ /* Static Dependencies for OMAP4 Clock Domains */ -static struct clkdm_dep ducati_wkup_sleep_deps[] = { +static struct clkdm_dep d2d_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) @@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_dss_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_init_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_gfx_clkdm", + .clkdm_name = "l4_cfg_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "l4_per_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep ducati_wkup_sleep_deps[] = { { - .clkdm_name = "l4_cfg_clkdm", + .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_per_clkdm", + .clkdm_name = "ivahd_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_secure_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_wkup_clkdm", + .clkdm_name = "l3_2_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "tesla_clkdm", + .clkdm_name = "l3_dss_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep iss_wkup_sleep_deps[] = { { - .clkdm_name = "ivahd_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "l3_gfx_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_init_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep ivahd_wkup_sleep_deps[] = { { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "l4_cfg_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l4_per_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { { - .clkdm_name = "abe_clkdm", + .clkdm_name = "l4_secure_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "ivahd_clkdm", + .clkdm_name = "l4_wkup_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "tesla_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep iss_wkup_sleep_deps[] = { { - .clkdm_name = "l3_2_clkdm", + .clkdm_name = "ivahd_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep ivahd_wkup_sleep_deps[] = { { - .clkdm_name = "l4_cfg_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_per_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { NULL }, @@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { { NULL }, }; -static struct clkdm_dep mpuss_wkup_sleep_deps[] = { +static struct clkdm_dep mpu_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) @@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain mpuss_44xx_clkdm = { - .name = "mpuss_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .prcm_partition = OMAP4430_CM1_PARTITION, - .cm_inst = OMAP4430_CM1_MPU_INST, - .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, - .wkdep_srcs = mpuss_wkup_sleep_deps, - .sleepdep_srcs = mpuss_wkup_sleep_deps, +static struct clockdomain d2d_44xx_clkdm = { + .name = "d2d_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .prcm_partition = OMAP4430_CM2_PARTITION, + .cm_inst = OMAP4430_CM2_CORE_INST, + .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, + .wkdep_srcs = d2d_wkup_sleep_deps, + .sleepdep_srcs = d2d_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +static struct clockdomain mpu_44xx_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .prcm_partition = OMAP4430_CM1_PARTITION, + .cm_inst = OMAP4430_CM1_MPU_INST, + .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, + .wkdep_srcs = mpu_wkup_sleep_deps, + .sleepdep_srcs = mpu_wkup_sleep_deps, + .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + static struct clockdomain l3_2_44xx_clkdm = { .name = "l3_2_clkdm", .pwrdm = { .name = "core_pwrdm" }, @@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain l3_d2d_44xx_clkdm = { - .name = "l3_d2d_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .prcm_partition = OMAP4430_CM2_PARTITION, - .cm_inst = OMAP4430_CM2_CORE_INST, - .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, - .wkdep_srcs = l3_d2d_wkup_sleep_deps, - .sleepdep_srcs = l3_d2d_wkup_sleep_deps, - .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -}; - static struct clockdomain iss_44xx_clkdm = { .name = "iss_clkdm", .pwrdm = { .name = "cam_pwrdm" }, @@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +/* As clockdomains are added or removed above, this list must also be changed */ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &l4_cefuse_44xx_clkdm, &l4_cfg_44xx_clkdm, @@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &abe_44xx_clkdm, &l3_instr_44xx_clkdm, &l3_init_44xx_clkdm, - &mpuss_44xx_clkdm, + &d2d_44xx_clkdm, &mpu0_44xx_clkdm, &mpu1_44xx_clkdm, &l3_emif_44xx_clkdm, &l4_ao_44xx_clkdm, &ducati_44xx_clkdm, + &mpu_44xx_clkdm, &l3_2_44xx_clkdm, &l3_1_44xx_clkdm, - &l3_d2d_44xx_clkdm, &iss_44xx_clkdm, &l3_dss_44xx_clkdm, &l4_wkup_44xx_clkdm, &emu_sys_44xx_clkdm, &l3_dma_44xx_clkdm, - NULL, + NULL }; void __init omap44xx_clockdomains_init(void) -- cgit v0.10.2 From 8f0d69dedcf1d10f9f72845f17f9a09a6ef0d66c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Sat, 9 Jul 2011 19:15:20 -0600 Subject: OMAP: omap_device: replace _find_by_pdev() with to_omap_device() The omap_device layer currently has two ways of getting an omap_device pointer from a platform_device pointer. Replace current usage of _find_by_pdev() with to_omap_device() since to_omap_device() is more familiar to the existing to_platform_device() used when getting a platform_device pointer from a struct device pointer. Cc: Felipe Balbi Signed-off-by: Kevin Hilman Reviewed-by: Felipe Balbi Signed-off-by: Paul Walmsley diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 49fc0df..c8b9cd1 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) return 0; } -static inline struct omap_device *_find_by_pdev(struct platform_device *pdev) -{ - return container_of(pdev, struct omap_device, pdev); -} - /** * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks * @od: struct omap_device *od @@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev) struct omap_device *od; u32 ret = 0; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->hwmods_cnt) ret = omap_hwmod_get_context_loss_count(od->hwmods[0]); @@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device *pdev) int ret; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state == OMAP_DEVICE_STATE_ENABLED) { WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", @@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev) int ret; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state != OMAP_DEVICE_STATE_ENABLED) { WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", @@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device *pdev) int ret, i; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (od->_state != OMAP_DEVICE_STATE_ENABLED && od->_state != OMAP_DEVICE_STATE_IDLE) { @@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev, int ret = -EINVAL; struct omap_device *od; - od = _find_by_pdev(pdev); + od = to_omap_device(pdev); if (new_wakeup_lat_limit == od->dev_wakeup_lat) return 0; -- cgit v0.10.2 From 476e5be710bec3d324d9a28cf1f4fd15bd358a86 Mon Sep 17 00:00:00 2001 From: Jean Pihet Date: Sat, 9 Jul 2011 19:15:41 -0600 Subject: OMAP PM: remove OMAP_PM_NONE config option The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet Signed-off-by: Paul Walmsley diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 49a4c75..6e6735f 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -211,9 +211,6 @@ choice depends on ARCH_OMAP default OMAP_PM_NOOP -config OMAP_PM_NONE - bool "No PM layer" - config OMAP_PM_NOOP bool "No-op/debug PM layer" diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index c0a7520..0840df8 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h @@ -40,11 +40,7 @@ * framework starts. The "_if_" is to avoid name collisions with the * PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_early_init() 0 -#else int __init omap_pm_if_early_init(void); -#endif /** * omap_pm_if_init - OMAP PM init code called after clock fw init @@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); * The main initialization code. OPP tables are passed in here. The * "_if_" is to avoid name collisions with the PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_init() 0 -#else int __init omap_pm_if_init(void); -#endif /** * omap_pm_if_exit - OMAP PM exit code -- cgit v0.10.2 From de474535763c1a5c50cb26f34ec60f10aebc53fe Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 9 Jul 2011 19:14:47 -0600 Subject: OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks McASP2, 3 and MMC6 modules are not present in the OMAP4 family. Remove the fclk and the clksel related to these nodes. Rename the references that were potentially re-used in order nodes. Remove related macros in prcm header files. Update TI copyright date. Signed-off-by: Jon Hunter [b-cousson@ti.com: Update the patch according to autogen output] Signed-off-by: Benoit Cousson [paul@pwsan.com: split PRCM data changes into a separate patch] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8307c9e..96bc668 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = { .set_rate = &omap2_clksel_set_rate, }; -static const struct clksel hsmmc6_fclk_sel[] = { - { .parent = &func_64m_fclk, .rates = div_1_0_rates }, - { .parent = &func_96m_fclk, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk hsmmc6_fclk = { - .name = "hsmmc6_fclk", - .parent = &func_64m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - static const struct clksel_rate div2_1to8_rates[] = { { .div = 1, .val = 0, .flags = RATE_IN_4430 }, { .div = 8, .val = 1, .flags = RATE_IN_4430 }, @@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = { .recalc = &omap2_clksel_recalc, }; +static struct clk ocp_abe_iclk = { + .name = "ocp_abe_iclk", + .parent = &aess_fclk, + .ops = &clkops_null, + .recalc = &followparent_recalc, +}; + +static struct clk per_abe_24m_fclk = { + .name = "per_abe_24m_fclk", + .parent = &dpll_abe_m2_ck, + .ops = &clkops_null, + .fixed_div = 4, + .recalc = &omap_fixed_divisor_recalc, +}; + static const struct clksel per_abe_nc_fclk_div[] = { { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, { .parent = NULL }, @@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = { .set_rate = &omap2_clksel_set_rate, }; -static const struct clksel mcasp2_fclk_sel[] = { - { .parent = &func_96m_fclk, .rates = div_1_0_rates }, - { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk mcasp2_fclk = { - .name = "mcasp2_fclk", - .parent = &func_96m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk mcasp3_fclk = { - .name = "mcasp3_fclk", - .parent = &func_96m_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk ocp_abe_iclk = { - .name = "ocp_abe_iclk", - .parent = &aess_fclk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk per_abe_24m_fclk = { - .name = "per_abe_24m_fclk", - .parent = &dpll_abe_m2_ck, - .ops = &clkops_null, - .fixed_div = 4, - .recalc = &omap_fixed_divisor_recalc, -}; - static const struct clksel pmd_stm_clock_mux_sel[] = { { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, @@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = { .clkdm_name = "abe_clkdm", }; +static const struct clksel mcbsp4_sync_mux_sel[] = { + { .parent = &func_96m_fclk, .rates = div_1_0_rates }, + { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, + { .parent = NULL }, +}; + static struct clk mcbsp4_sync_mux_ck = { .name = "mcbsp4_sync_mux_ck", .parent = &func_96m_fclk, - .clksel = mcasp2_fclk_sel, + .clksel = mcbsp4_sync_mux_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, @@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = { .recalc = &followparent_recalc, }; +static const struct clksel hsmmc1_fclk_sel[] = { + { .parent = &func_64m_fclk, .rates = div_1_0_rates }, + { .parent = &func_96m_fclk, .rates = div_1_1_rates }, + { .parent = NULL }, +}; + /* Merged hsmmc1_fclk into mmc1 */ static struct clk mmc1_fck = { .name = "mmc1_fck", .parent = &func_64m_fclk, - .clksel = hsmmc6_fclk_sel, + .clksel = hsmmc1_fclk_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_MASK, @@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = { static struct clk mmc2_fck = { .name = "mmc2_fck", .parent = &func_64m_fclk, - .clksel = hsmmc6_fclk_sel, + .clksel = hsmmc1_fclk_sel, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, .clksel_mask = OMAP4430_CLKSEL_MASK, @@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), - CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X), CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), - CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), - CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X), - CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X), CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), + CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), -- cgit v0.10.2 From 571078aa3485073964b611493eee480b5dc3c084 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 9 Jul 2011 19:14:47 -0600 Subject: OMAP4: clock data: Remove UNIPRO clock nodes UNIPRO was removed from OMAP4 devices from ES2.0 onwards. Since this IP was anyway non-functional and not supported, it is best to remove it completely. Signed-off-by: Jon Hunter [b-cousson@ti.com: Update the changelog] Signed-off-by: Benoit Cousson [paul@pwsan.com: split PRCM header file changes into a separate patch] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 96bc668..044df38 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { .set_rate = &omap2_clksel_set_rate, }; -/* DPLL_UNIPRO */ -static struct dpll_data dpll_unipro_dd = { - .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, - .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, - .mult_mask = OMAP4430_DPLL_MULT_MASK, - .div1_mask = OMAP4430_DPLL_DIV_MASK, - .enable_mask = OMAP4430_DPLL_EN_MASK, - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, - .max_multiplier = 2047, - .max_divider = 128, - .min_divider = 1, -}; - - -static struct clk dpll_unipro_ck = { - .name = "dpll_unipro_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_unipro_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_omap3_noncore_dpll_ops, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, -}; - -static struct clk dpll_unipro_x2_ck = { - .name = "dpll_unipro_x2_ck", - .parent = &dpll_unipro_ck, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, - .flags = CLOCK_CLKOUTX2, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap3_clkoutx2_recalc, -}; - -static const struct clksel dpll_unipro_m2x2_div[] = { - { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_unipro_m2x2_ck = { - .name = "dpll_unipro_m2x2_ck", - .parent = &dpll_unipro_x2_ck, - .clksel = dpll_unipro_m2x2_div, - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, - .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_omap4_dpllmx_ops, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - static struct clk usb_hs_clk_div_ck = { .name = "usb_hs_clk_div_ck", .parent = &dpll_abe_m3x2_ck, @@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), - CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X), - CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X), - CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X), CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), -- cgit v0.10.2 From 3a23aafcde66f6327bda0a6423586dfd8d694eb4 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Sat, 9 Jul 2011 20:39:44 -0600 Subject: OMAP4: hwmod data: Modify DSS opt clocks Add missing DSS optional clocks to HWMOD data for OMAP4xxx. Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. Signed-off-by: Tomi Valkeinen [b-cousson@ti.com: Remove a comment and update the subject] Signed-off-by: Benoit Cousson Cc: Tomi Valkeinen [paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's request] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 044df38..7a0b112 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), - CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), - CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), - CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), - CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), + CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), + CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), + CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), + CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), CLK("omapdss_dss", "ick", &dss_fck, CK_443X), CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e011437..a7fbe5c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { &omap44xx_l4_per__dss_dispc, }; +static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, + { .role = "tv_clk", .clk = "dss_tv_clk" }, + { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .main_clk = "dss_fck", @@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dispc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), .slaves = omap44xx_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { &omap44xx_l4_per__dss_dsi1, }; +static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, @@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dsi1_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), .slaves = omap44xx_dss_dsi1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { &omap44xx_l4_per__dss_dsi2, }; +static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, @@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_dsi2_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), .slaves = omap44xx_dss_dsi2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { &omap44xx_l4_per__dss_hdmi, }; +static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, @@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_hdmi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), .slaves = omap44xx_dss_hdmi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { &omap44xx_l4_per__dss_rfbi, }; +static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { + { .role = "ick", .clk = "dss_fck" }, +}; + static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, @@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, }, }, + .opt_clks = dss_rfbi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), .slaves = omap44xx_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -- cgit v0.10.2 From 6349b96b439515e1100cd98f27ff55a262f558a3 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sat, 9 Jul 2011 20:42:11 -0600 Subject: OMAP2+: PM: Initialise sleep_switch to a non-valid value sleep_switch which is initialised to 0 in omap_set_pwrdm_state happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) which are defined as: #define FORCEWAKEUP_SWITCH 0 #define LOWPOWERSTATE_SWITCH 1 This causes the function to wrongly program some clock domains even when the Powerdomain is in ON state. Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Acked-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 49486f5..d48813f 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) { u32 cur_state; - int sleep_switch = 0; + int sleep_switch = -1; int ret = 0; if (pwrdm == NULL || IS_ERR(pwrdm)) -- cgit v0.10.2 From 9a2a3603cf1c57ed21adb045a771405ab27335c1 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sat, 9 Jul 2011 20:42:11 -0600 Subject: OMAP4: powerdomain data: Fix core mem states and missing cefuse flag Since ES2.0, the core ocmram does not support a different state than the main power domain anymore during both ON and RET power domain state. Since PM is not supported at all in ES1.0, update the common structure. LOWPOWERSTATECHANGE is supported by the cefuse power domain but the flag was missing. Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field. Update the TI copyright date to 2011. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Santosh Shilimkar [paul@pwsan.com: moved the indentation changes to a different patch set] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7..631e452 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -1,7 +1,7 @@ /* * OMAP4 Power domains framework * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) @@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = { .banks = 5, .pwrsts_mem_ret = { [0] = PWRSTS_OFF, /* core_nret_bank */ - [1] = PWRSTS_OFF_RET, /* core_ocmram */ + [1] = PWRSTS_RET, /* core_ocmram */ [2] = PWRSTS_RET, /* core_other_bank */ [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ [4] = PWRSTS_OFF_RET, /* ducati_unicache */ }, .pwrsts_mem_on = { [0] = PWRSTS_ON, /* core_nret_bank */ - [1] = PWRSTS_OFF_RET, /* core_ocmram */ + [1] = PWRSTS_ON, /* core_ocmram */ [2] = PWRSTS_ON, /* core_other_bank */ [3] = PWRSTS_ON, /* ducati_l2ram */ [4] = PWRSTS_ON, /* ducati_unicache */ @@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = { .prcm_partition = OMAP4430_PRM_PARTITION, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; /* -- cgit v0.10.2 From 93cac2ad0f9459422d0af79b6937d6e83ed3aec9 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Jul 2011 20:42:59 -0600 Subject: OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by L3 interconnect. Because of CPU speculative nature, such accesses are possible which can lead to indirect access to GPMC and if it's clock is not running, it can result in hang/abort on the platform. Above makes access to GPMC unpredictable during the execution, so it's module mode needs to be kept under hardware control instead of software control. Since the auto gating is supported for GPMC, there isn't any power impact because of this change. The issue was un-covered with security middleware running along with HLOS. In this case GPMC had a valid MMU descriptor on secure side where as HLOS didn't map the GMPC because it isn't being used. Signed-off-by: Santosh Shilimkar [b-cousson@ti.com: Update subject and fix typos in the changelog] Signed-off-by: Benoit Cousson Cc: Kevin Hilman Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 8c96567..72a3976 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1694,6 +1694,7 @@ static struct clk gpmc_ick = { .ops = &clkops_omap2_dflt, .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, .enable_bit = OMAP4430_MODULEMODE_HWCTRL, + .flags = ENABLE_ON_INIT, .clkdm_name = "l3_2_clkdm", .parent = &l3_div_ck, .recalc = &followparent_recalc, -- cgit v0.10.2 From a57341f780660800e1463eaedb80ed152ad6b5de Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 9 Jul 2011 20:42:59 -0600 Subject: OMAP4: powerdomain data: Remove unsupported MPU powerdomain state On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't be attempted independently. When coming out of MPU OFF state, ROM code disables the clocks of IVAHD, TESLA which is not desirable. Hence the MPU OFF state is not usable on OMAP4430 devices. OMAP4460 onwards, MPU OFF state will be descoped completely because the DDR firewall falls in MPU power domain. When the MPU hit OFF state, DDR won't be accessible for other initiators. The deepest state supported is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. So in summary MPU power domain OFF state is not supported on OMAP4 and onwards designs. Thanks to new PRCM design, device off mode can still be achieved with power domains hitting OSWR state. Signed-off-by: Santosh Shilimkar Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Fix changelog typos] Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index c4222c7..8f86e60 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { .prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), - .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, .pwrsts_mem_ret = { -- cgit v0.10.2 From d46db3d58233be4be980eb1e42eebe7808bcabab Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 4 May 2011 19:54:37 -0600 Subject: writeback: make writeback_control.nr_to_write straight Pass struct wb_writeback_work all the way down to writeback_sb_inodes(), and initialize the struct writeback_control there. struct writeback_control is basically designed to control writeback of a single file, but we keep abuse it for writing multiple files in writeback_sb_inodes() and its callers. It immediately clean things up, e.g. suddenly wbc.nr_to_write vs work->nr_pages starts to make sense, and instead of saving and restoring pages_skipped in writeback_sb_inodes it can always start with a clean zero value. It also makes a neat IO pattern change: large dirty files are now written in the full 4MB writeback chunk size, rather than whatever remained quota in wbc->nr_to_write. Acked-by: Jan Kara Proposed-by: Christoph Hellwig Signed-off-by: Wu Fengguang diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c index 7055d11..561262d 100644 --- a/fs/btrfs/extent_io.c +++ b/fs/btrfs/extent_io.c @@ -2551,7 +2551,6 @@ int extent_write_full_page(struct extent_io_tree *tree, struct page *page, }; struct writeback_control wbc_writepages = { .sync_mode = wbc->sync_mode, - .older_than_this = NULL, .nr_to_write = 64, .range_start = page_offset(page) + PAGE_CACHE_SIZE, .range_end = (loff_t)-1, @@ -2584,7 +2583,6 @@ int extent_write_locked_range(struct extent_io_tree *tree, struct inode *inode, }; struct writeback_control wbc_writepages = { .sync_mode = mode, - .older_than_this = NULL, .nr_to_write = nr_pages * 2, .range_start = start, .range_end = end + 1, diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 6caa982..2c947da 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -30,11 +30,21 @@ #include "internal.h" /* + * The maximum number of pages to writeout in a single bdi flush/kupdate + * operation. We do this so we don't hold I_SYNC against an inode for + * enormous amounts of time, which would block a userspace task which has + * been forced to throttle against that inode. Also, the code reevaluates + * the dirty each time it has written this many pages. + */ +#define MAX_WRITEBACK_PAGES 1024L + +/* * Passed into wb_writeback(), essentially a subset of writeback_control */ struct wb_writeback_work { long nr_pages; struct super_block *sb; + unsigned long *older_than_this; enum writeback_sync_modes sync_mode; unsigned int tagged_writepages:1; unsigned int for_kupdate:1; @@ -472,7 +482,6 @@ writeback_single_inode(struct inode *inode, struct bdi_writeback *wb, * No need to add it back to the LRU. */ list_del_init(&inode->i_wb_list); - wbc->inodes_written++; } } inode_sync_complete(inode); @@ -506,6 +515,31 @@ static bool pin_sb_for_writeback(struct super_block *sb) return false; } +static long writeback_chunk_size(struct wb_writeback_work *work) +{ + long pages; + + /* + * WB_SYNC_ALL mode does livelock avoidance by syncing dirty + * inodes/pages in one big loop. Setting wbc.nr_to_write=LONG_MAX + * here avoids calling into writeback_inodes_wb() more than once. + * + * The intended call sequence for WB_SYNC_ALL writeback is: + * + * wb_writeback() + * writeback_sb_inodes() <== called only once + * write_cache_pages() <== called once for each inode + * (quickly) tag currently dirty pages + * (maybe slowly) sync all tagged pages + */ + if (work->sync_mode == WB_SYNC_ALL || work->tagged_writepages) + pages = LONG_MAX; + else + pages = min(MAX_WRITEBACK_PAGES, work->nr_pages); + + return pages; +} + /* * Write a portion of b_io inodes which belong to @sb. * @@ -513,18 +547,30 @@ static bool pin_sb_for_writeback(struct super_block *sb) * inodes. Otherwise write only ones which go sequentially * in reverse order. * - * Return 1, if the caller writeback routine should be - * interrupted. Otherwise return 0. + * Return the number of pages and/or inodes written. */ -static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, - struct writeback_control *wbc, bool only_this_sb) +static long writeback_sb_inodes(struct super_block *sb, + struct bdi_writeback *wb, + struct wb_writeback_work *work) { + struct writeback_control wbc = { + .sync_mode = work->sync_mode, + .tagged_writepages = work->tagged_writepages, + .for_kupdate = work->for_kupdate, + .for_background = work->for_background, + .range_cyclic = work->range_cyclic, + .range_start = 0, + .range_end = LLONG_MAX, + }; + unsigned long start_time = jiffies; + long write_chunk; + long wrote = 0; /* count both pages and inodes */ + while (!list_empty(&wb->b_io)) { - long pages_skipped; struct inode *inode = wb_inode(wb->b_io.prev); if (inode->i_sb != sb) { - if (only_this_sb) { + if (work->sb) { /* * We only want to write back data for this * superblock, move all inodes not belonging @@ -539,7 +585,7 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, * Bounce back to the caller to unpin this and * pin the next superblock. */ - return 0; + break; } /* @@ -553,12 +599,18 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, requeue_io(inode, wb); continue; } - __iget(inode); + write_chunk = writeback_chunk_size(work); + wbc.nr_to_write = write_chunk; + wbc.pages_skipped = 0; + + writeback_single_inode(inode, wb, &wbc); - pages_skipped = wbc->pages_skipped; - writeback_single_inode(inode, wb, wbc); - if (wbc->pages_skipped != pages_skipped) { + work->nr_pages -= write_chunk - wbc.nr_to_write; + wrote += write_chunk - wbc.nr_to_write; + if (!(inode->i_state & I_DIRTY)) + wrote++; + if (wbc.pages_skipped) { /* * writeback is not making progress due to locked * buffers. Skip this inode for now. @@ -570,17 +622,25 @@ static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb, iput(inode); cond_resched(); spin_lock(&wb->list_lock); - if (wbc->nr_to_write <= 0) - return 1; + /* + * bail out to wb_writeback() often enough to check + * background threshold and other termination conditions. + */ + if (wrote) { + if (time_is_before_jiffies(start_time + HZ / 10UL)) + break; + if (work->nr_pages <= 0) + break; + } } - /* b_io is empty */ - return 1; + return wrote; } -static void __writeback_inodes_wb(struct bdi_writeback *wb, - struct writeback_control *wbc) +static long __writeback_inodes_wb(struct bdi_writeback *wb, + struct wb_writeback_work *work) { - int ret = 0; + unsigned long start_time = jiffies; + long wrote = 0; while (!list_empty(&wb->b_io)) { struct inode *inode = wb_inode(wb->b_io.prev); @@ -590,33 +650,37 @@ static void __writeback_inodes_wb(struct bdi_writeback *wb, requeue_io(inode, wb); continue; } - ret = writeback_sb_inodes(sb, wb, wbc, false); + wrote += writeback_sb_inodes(sb, wb, work); drop_super(sb); - if (ret) - break; + /* refer to the same tests at the end of writeback_sb_inodes */ + if (wrote) { + if (time_is_before_jiffies(start_time + HZ / 10UL)) + break; + if (work->nr_pages <= 0) + break; + } } /* Leave any unwritten inodes on b_io */ + return wrote; } -void writeback_inodes_wb(struct bdi_writeback *wb, - struct writeback_control *wbc) +long writeback_inodes_wb(struct bdi_writeback *wb, long nr_pages) { + struct wb_writeback_work work = { + .nr_pages = nr_pages, + .sync_mode = WB_SYNC_NONE, + .range_cyclic = 1, + }; + spin_lock(&wb->list_lock); if (list_empty(&wb->b_io)) - queue_io(wb, wbc->older_than_this); - __writeback_inodes_wb(wb, wbc); + queue_io(wb, NULL); + __writeback_inodes_wb(wb, &work); spin_unlock(&wb->list_lock); -} -/* - * The maximum number of pages to writeout in a single bdi flush/kupdate - * operation. We do this so we don't hold I_SYNC against an inode for - * enormous amounts of time, which would block a userspace task which has - * been forced to throttle against that inode. Also, the code reevaluates - * the dirty each time it has written this many pages. - */ -#define MAX_WRITEBACK_PAGES 1024 + return nr_pages - work.nr_pages; +} static inline bool over_bground_thresh(void) { @@ -646,42 +710,13 @@ static inline bool over_bground_thresh(void) static long wb_writeback(struct bdi_writeback *wb, struct wb_writeback_work *work) { - struct writeback_control wbc = { - .sync_mode = work->sync_mode, - .tagged_writepages = work->tagged_writepages, - .older_than_this = NULL, - .for_kupdate = work->for_kupdate, - .for_background = work->for_background, - .range_cyclic = work->range_cyclic, - }; + long nr_pages = work->nr_pages; unsigned long oldest_jif; - long wrote = 0; - long write_chunk = MAX_WRITEBACK_PAGES; struct inode *inode; - - if (!wbc.range_cyclic) { - wbc.range_start = 0; - wbc.range_end = LLONG_MAX; - } - - /* - * WB_SYNC_ALL mode does livelock avoidance by syncing dirty - * inodes/pages in one big loop. Setting wbc.nr_to_write=LONG_MAX - * here avoids calling into writeback_inodes_wb() more than once. - * - * The intended call sequence for WB_SYNC_ALL writeback is: - * - * wb_writeback() - * writeback_sb_inodes() <== called only once - * write_cache_pages() <== called once for each inode - * (quickly) tag currently dirty pages - * (maybe slowly) sync all tagged pages - */ - if (wbc.sync_mode == WB_SYNC_ALL || wbc.tagged_writepages) - write_chunk = LONG_MAX; + long progress; oldest_jif = jiffies; - wbc.older_than_this = &oldest_jif; + work->older_than_this = &oldest_jif; spin_lock(&wb->list_lock); for (;;) { @@ -711,24 +746,17 @@ static long wb_writeback(struct bdi_writeback *wb, if (work->for_kupdate) { oldest_jif = jiffies - msecs_to_jiffies(dirty_expire_interval * 10); - wbc.older_than_this = &oldest_jif; + work->older_than_this = &oldest_jif; } - wbc.nr_to_write = write_chunk; - wbc.pages_skipped = 0; - wbc.inodes_written = 0; - - trace_wbc_writeback_start(&wbc, wb->bdi); + trace_writeback_start(wb->bdi, work); if (list_empty(&wb->b_io)) - queue_io(wb, wbc.older_than_this); + queue_io(wb, work->older_than_this); if (work->sb) - writeback_sb_inodes(work->sb, wb, &wbc, true); + progress = writeback_sb_inodes(work->sb, wb, work); else - __writeback_inodes_wb(wb, &wbc); - trace_wbc_writeback_written(&wbc, wb->bdi); - - work->nr_pages -= write_chunk - wbc.nr_to_write; - wrote += write_chunk - wbc.nr_to_write; + progress = __writeback_inodes_wb(wb, work); + trace_writeback_written(wb->bdi, work); /* * Did we write something? Try for more @@ -738,9 +766,7 @@ static long wb_writeback(struct bdi_writeback *wb, * mean the overall work is done. So we keep looping as long * as made some progress on cleaning pages or inodes. */ - if (wbc.nr_to_write < write_chunk) - continue; - if (wbc.inodes_written) + if (progress) continue; /* * No more inodes for IO, bail @@ -753,8 +779,8 @@ static long wb_writeback(struct bdi_writeback *wb, * we'll just busyloop. */ if (!list_empty(&wb->b_more_io)) { + trace_writeback_wait(wb->bdi, work); inode = wb_inode(wb->b_more_io.prev); - trace_wbc_writeback_wait(&wbc, wb->bdi); spin_lock(&inode->i_lock); inode_wait_for_writeback(inode, wb); spin_unlock(&inode->i_lock); @@ -762,7 +788,7 @@ static long wb_writeback(struct bdi_writeback *wb, } spin_unlock(&wb->list_lock); - return wrote; + return nr_pages - work->nr_pages; } /* diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 2f1b512..df1b7f1 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -24,12 +24,9 @@ enum writeback_sync_modes { */ struct writeback_control { enum writeback_sync_modes sync_mode; - unsigned long *older_than_this; /* If !NULL, only write back inodes - older than this */ long nr_to_write; /* Write this many pages, and decrement this for each page written */ long pages_skipped; /* Pages which were not written */ - long inodes_written; /* # of inodes written (at least) */ /* * For a_ops->writepages(): is start or end are non-zero then this is @@ -56,8 +53,7 @@ void writeback_inodes_sb_nr(struct super_block *, unsigned long nr); int writeback_inodes_sb_if_idle(struct super_block *); int writeback_inodes_sb_nr_if_idle(struct super_block *, unsigned long nr); void sync_inodes_sb(struct super_block *); -void writeback_inodes_wb(struct bdi_writeback *wb, - struct writeback_control *wbc); +long writeback_inodes_wb(struct bdi_writeback *wb, long nr_pages); long wb_do_writeback(struct bdi_writeback *wb, int force_wait); void wakeup_flusher_threads(long nr_pages); diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index 205d149..3e7662a 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -62,6 +62,9 @@ DEFINE_EVENT(writeback_work_class, name, \ DEFINE_WRITEBACK_WORK_EVENT(writeback_nothread); DEFINE_WRITEBACK_WORK_EVENT(writeback_queue); DEFINE_WRITEBACK_WORK_EVENT(writeback_exec); +DEFINE_WRITEBACK_WORK_EVENT(writeback_start); +DEFINE_WRITEBACK_WORK_EVENT(writeback_written); +DEFINE_WRITEBACK_WORK_EVENT(writeback_wait); TRACE_EVENT(writeback_pages_written, TP_PROTO(long pages_written), @@ -101,6 +104,30 @@ DEFINE_WRITEBACK_EVENT(writeback_bdi_register); DEFINE_WRITEBACK_EVENT(writeback_bdi_unregister); DEFINE_WRITEBACK_EVENT(writeback_thread_start); DEFINE_WRITEBACK_EVENT(writeback_thread_stop); +DEFINE_WRITEBACK_EVENT(balance_dirty_start); +DEFINE_WRITEBACK_EVENT(balance_dirty_wait); + +TRACE_EVENT(balance_dirty_written, + + TP_PROTO(struct backing_dev_info *bdi, int written), + + TP_ARGS(bdi, written), + + TP_STRUCT__entry( + __array(char, name, 32) + __field(int, written) + ), + + TP_fast_assign( + strncpy(__entry->name, dev_name(bdi->dev), 32); + __entry->written = written; + ), + + TP_printk("bdi %s written %d", + __entry->name, + __entry->written + ) +); DECLARE_EVENT_CLASS(wbc_class, TP_PROTO(struct writeback_control *wbc, struct backing_dev_info *bdi), @@ -114,7 +141,6 @@ DECLARE_EVENT_CLASS(wbc_class, __field(int, for_background) __field(int, for_reclaim) __field(int, range_cyclic) - __field(unsigned long, older_than_this) __field(long, range_start) __field(long, range_end) ), @@ -128,14 +154,12 @@ DECLARE_EVENT_CLASS(wbc_class, __entry->for_background = wbc->for_background; __entry->for_reclaim = wbc->for_reclaim; __entry->range_cyclic = wbc->range_cyclic; - __entry->older_than_this = wbc->older_than_this ? - *wbc->older_than_this : 0; __entry->range_start = (long)wbc->range_start; __entry->range_end = (long)wbc->range_end; ), TP_printk("bdi %s: towrt=%ld skip=%ld mode=%d kupd=%d " - "bgrd=%d reclm=%d cyclic=%d older=0x%lx " + "bgrd=%d reclm=%d cyclic=%d " "start=0x%lx end=0x%lx", __entry->name, __entry->nr_to_write, @@ -145,7 +169,6 @@ DECLARE_EVENT_CLASS(wbc_class, __entry->for_background, __entry->for_reclaim, __entry->range_cyclic, - __entry->older_than_this, __entry->range_start, __entry->range_end) ) @@ -154,12 +177,6 @@ DECLARE_EVENT_CLASS(wbc_class, DEFINE_EVENT(wbc_class, name, \ TP_PROTO(struct writeback_control *wbc, struct backing_dev_info *bdi), \ TP_ARGS(wbc, bdi)) -DEFINE_WBC_EVENT(wbc_writeback_start); -DEFINE_WBC_EVENT(wbc_writeback_written); -DEFINE_WBC_EVENT(wbc_writeback_wait); -DEFINE_WBC_EVENT(wbc_balance_dirty_start); -DEFINE_WBC_EVENT(wbc_balance_dirty_written); -DEFINE_WBC_EVENT(wbc_balance_dirty_wait); DEFINE_WBC_EVENT(wbc_writepage); TRACE_EVENT(writeback_queue_io, diff --git a/mm/backing-dev.c b/mm/backing-dev.c index 5f6553e..7ba303b 100644 --- a/mm/backing-dev.c +++ b/mm/backing-dev.c @@ -260,18 +260,6 @@ int bdi_has_dirty_io(struct backing_dev_info *bdi) return wb_has_dirty_io(&bdi->wb); } -static void bdi_flush_io(struct backing_dev_info *bdi) -{ - struct writeback_control wbc = { - .sync_mode = WB_SYNC_NONE, - .older_than_this = NULL, - .range_cyclic = 1, - .nr_to_write = 1024, - }; - - writeback_inodes_wb(&bdi->wb, &wbc); -} - /* * kupdated() used to do this. We cannot do it from the bdi_forker_thread() * or we risk deadlocking on ->s_umount. The longer term solution would be @@ -457,9 +445,10 @@ static int bdi_forker_thread(void *ptr) if (IS_ERR(task)) { /* * If thread creation fails, force writeout of - * the bdi from the thread. + * the bdi from the thread. Hopefully 1024 is + * large enough for efficient IO. */ - bdi_flush_io(bdi); + writeback_inodes_wb(&bdi->wb, 1024); } else { /* * The spinlock makes sure we do not lose diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 1965d05..9d6ac2b 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -491,13 +491,6 @@ static void balance_dirty_pages(struct address_space *mapping, struct backing_dev_info *bdi = mapping->backing_dev_info; for (;;) { - struct writeback_control wbc = { - .sync_mode = WB_SYNC_NONE, - .older_than_this = NULL, - .nr_to_write = write_chunk, - .range_cyclic = 1, - }; - nr_reclaimable = global_page_state(NR_FILE_DIRTY) + global_page_state(NR_UNSTABLE_NFS); nr_writeback = global_page_state(NR_WRITEBACK); @@ -559,17 +552,17 @@ static void balance_dirty_pages(struct address_space *mapping, * threshold otherwise wait until the disk writes catch * up. */ - trace_wbc_balance_dirty_start(&wbc, bdi); + trace_balance_dirty_start(bdi); if (bdi_nr_reclaimable > bdi_thresh) { - writeback_inodes_wb(&bdi->wb, &wbc); - pages_written += write_chunk - wbc.nr_to_write; - trace_wbc_balance_dirty_written(&wbc, bdi); + pages_written += writeback_inodes_wb(&bdi->wb, + write_chunk); + trace_balance_dirty_written(bdi, pages_written); if (pages_written >= write_chunk) break; /* We've done our duty */ } - trace_wbc_balance_dirty_wait(&wbc, bdi); __set_current_state(TASK_UNINTERRUPTIBLE); io_schedule_timeout(pause); + trace_balance_dirty_wait(bdi); /* * Increase the delay for each loop, up to our previous -- cgit v0.10.2 From f7d2b1ecd0c714adefc7d3a942ef87beb828a763 Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Wed, 8 Dec 2010 22:44:24 -0600 Subject: writeback: account per-bdi accumulated written pages Introduce the BDI_WRITTEN counter. It will be used for estimating the bdi's write bandwidth. Peter Zijlstra : Move BDI_WRITTEN accounting into __bdi_writeout_inc(). This will cover and fix fuse, which only calls bdi_writeout_inc(). CC: Michael Rubin Reviewed-by: KOSAKI Motohiro Signed-off-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h index 47feb2c..469d564 100644 --- a/include/linux/backing-dev.h +++ b/include/linux/backing-dev.h @@ -40,6 +40,7 @@ typedef int (congested_fn)(void *, int); enum bdi_stat_item { BDI_RECLAIMABLE, BDI_WRITEBACK, + BDI_WRITTEN, NR_BDI_STAT_ITEMS }; diff --git a/mm/backing-dev.c b/mm/backing-dev.c index 7ba303b..83f18a1 100644 --- a/mm/backing-dev.c +++ b/mm/backing-dev.c @@ -97,6 +97,7 @@ static int bdi_debug_stats_show(struct seq_file *m, void *v) "BdiDirtyThresh: %8lu kB\n" "DirtyThresh: %8lu kB\n" "BackgroundThresh: %8lu kB\n" + "BdiWritten: %8lu kB\n" "b_dirty: %8lu\n" "b_io: %8lu\n" "b_more_io: %8lu\n" @@ -104,8 +105,13 @@ static int bdi_debug_stats_show(struct seq_file *m, void *v) "state: %8lx\n", (unsigned long) K(bdi_stat(bdi, BDI_WRITEBACK)), (unsigned long) K(bdi_stat(bdi, BDI_RECLAIMABLE)), - K(bdi_thresh), K(dirty_thresh), - K(background_thresh), nr_dirty, nr_io, nr_more_io, + K(bdi_thresh), + K(dirty_thresh), + K(background_thresh), + (unsigned long) K(bdi_stat(bdi, BDI_WRITTEN)), + nr_dirty, + nr_io, + nr_more_io, !list_empty(&bdi->bdi_list), bdi->state); #undef K diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 9d6ac2b..8cd7137 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -219,6 +219,7 @@ int dirty_bytes_handler(struct ctl_table *table, int write, */ static inline void __bdi_writeout_inc(struct backing_dev_info *bdi) { + __inc_bdi_stat(bdi, BDI_WRITTEN); __prop_inc_percpu_max(&vm_completions, &bdi->completions, bdi->max_prop_frac); } -- cgit v0.10.2 From e98be2d599207c6b31e9bb340d52a231b2f3662d Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 29 Aug 2010 11:22:30 -0600 Subject: writeback: bdi write bandwidth estimation The estimation value will start from 100MB/s and adapt to the real bandwidth in seconds. It tries to update the bandwidth only when disk is fully utilized. Any inactive period of more than one second will be skipped. The estimated bandwidth will be reflecting how fast the device can writeout when _fully utilized_, and won't drop to 0 when it goes idle. The value will remain constant at disk idle time. At busy write time, if not considering fluctuations, it will also remain high unless be knocked down by possible concurrent reads that compete for the disk time and bandwidth with async writes. The estimation is not done purely in the flusher because there is no guarantee for write_cache_pages() to return timely to update bandwidth. The bdi->avg_write_bandwidth smoothing is very effective for filtering out sudden spikes, however may be a little biased in long term. The overheads are low because the bdi bandwidth update only occurs at 200ms intervals. The 200ms update interval is suitable, because it's not possible to get the real bandwidth for the instance at all, due to large fluctuations. The NFS commits can be as large as seconds worth of data. One XFS completion may be as large as half second worth of data if we are going to increase the write chunk to half second worth of data. In ext4, fluctuations with time period of around 5 seconds is observed. And there is another pattern of irregular periods of up to 20 seconds on SSD tests. That's why we are not only doing the estimation at 200ms intervals, but also averaging them over a period of 3 seconds and then go further to do another level of smoothing in avg_write_bandwidth. CC: Li Shaohua CC: Peter Zijlstra Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 2c947da..5826992 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -693,6 +693,16 @@ static inline bool over_bground_thresh(void) } /* + * Called under wb->list_lock. If there are multiple wb per bdi, + * only the flusher working on the first wb should do it. + */ +static void wb_update_bandwidth(struct bdi_writeback *wb, + unsigned long start_time) +{ + __bdi_update_bandwidth(wb->bdi, start_time); +} + +/* * Explicit flushing or periodic writeback of "old" data. * * Define "old": the first time one of an inode's pages is dirtied, we mark the @@ -710,6 +720,7 @@ static inline bool over_bground_thresh(void) static long wb_writeback(struct bdi_writeback *wb, struct wb_writeback_work *work) { + unsigned long wb_start = jiffies; long nr_pages = work->nr_pages; unsigned long oldest_jif; struct inode *inode; @@ -758,6 +769,8 @@ static long wb_writeback(struct bdi_writeback *wb, progress = __writeback_inodes_wb(wb, work); trace_writeback_written(wb->bdi, work); + wb_update_bandwidth(wb, wb_start); + /* * Did we write something? Try for more * diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h index 469d564..a008982 100644 --- a/include/linux/backing-dev.h +++ b/include/linux/backing-dev.h @@ -73,6 +73,11 @@ struct backing_dev_info { struct percpu_counter bdi_stat[NR_BDI_STAT_ITEMS]; + unsigned long bw_time_stamp; /* last time write bw is updated */ + unsigned long written_stamp; /* pages written at bw_time_stamp */ + unsigned long write_bandwidth; /* the estimated write bandwidth */ + unsigned long avg_write_bandwidth; /* further smoothed write bw */ + struct prop_local_percpu completions; int dirty_exceeded; diff --git a/include/linux/writeback.h b/include/linux/writeback.h index df1b7f1..66862f2 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -118,6 +118,9 @@ void global_dirty_limits(unsigned long *pbackground, unsigned long *pdirty); unsigned long bdi_dirty_limit(struct backing_dev_info *bdi, unsigned long dirty); +void __bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long start_time); + void page_writeback_init(void); void balance_dirty_pages_ratelimited_nr(struct address_space *mapping, unsigned long nr_pages_dirtied); diff --git a/mm/backing-dev.c b/mm/backing-dev.c index 83f18a1..a76cdd1 100644 --- a/mm/backing-dev.c +++ b/mm/backing-dev.c @@ -638,6 +638,11 @@ static void bdi_wb_init(struct bdi_writeback *wb, struct backing_dev_info *bdi) setup_timer(&wb->wakeup_timer, wakeup_timer_fn, (unsigned long)bdi); } +/* + * Initial write bandwidth: 100 MB/s + */ +#define INIT_BW (100 << (20 - PAGE_SHIFT)) + int bdi_init(struct backing_dev_info *bdi) { int i, err; @@ -660,6 +665,13 @@ int bdi_init(struct backing_dev_info *bdi) } bdi->dirty_exceeded = 0; + + bdi->bw_time_stamp = jiffies; + bdi->written_stamp = 0; + + bdi->write_bandwidth = INIT_BW; + bdi->avg_write_bandwidth = INIT_BW; + err = prop_local_init_percpu(&bdi->completions); if (err) { diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 8cd7137..446bdf7 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -37,6 +37,11 @@ #include /* + * Estimate write bandwidth at 200ms intervals. + */ +#define BANDWIDTH_INTERVAL max(HZ/5, 1) + +/* * After a CPU has dirtied this many pages, balance_dirty_pages_ratelimited * will look to see if it needs to force writeback or throttling. */ @@ -471,6 +476,85 @@ unsigned long bdi_dirty_limit(struct backing_dev_info *bdi, unsigned long dirty) return bdi_dirty; } +static void bdi_update_write_bandwidth(struct backing_dev_info *bdi, + unsigned long elapsed, + unsigned long written) +{ + const unsigned long period = roundup_pow_of_two(3 * HZ); + unsigned long avg = bdi->avg_write_bandwidth; + unsigned long old = bdi->write_bandwidth; + u64 bw; + + /* + * bw = written * HZ / elapsed + * + * bw * elapsed + write_bandwidth * (period - elapsed) + * write_bandwidth = --------------------------------------------------- + * period + */ + bw = written - bdi->written_stamp; + bw *= HZ; + if (unlikely(elapsed > period)) { + do_div(bw, elapsed); + avg = bw; + goto out; + } + bw += (u64)bdi->write_bandwidth * (period - elapsed); + bw >>= ilog2(period); + + /* + * one more level of smoothing, for filtering out sudden spikes + */ + if (avg > old && old >= (unsigned long)bw) + avg -= (avg - old) >> 3; + + if (avg < old && old <= (unsigned long)bw) + avg += (old - avg) >> 3; + +out: + bdi->write_bandwidth = bw; + bdi->avg_write_bandwidth = avg; +} + +void __bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long start_time) +{ + unsigned long now = jiffies; + unsigned long elapsed = now - bdi->bw_time_stamp; + unsigned long written; + + /* + * rate-limit, only update once every 200ms. + */ + if (elapsed < BANDWIDTH_INTERVAL) + return; + + written = percpu_counter_read(&bdi->bdi_stat[BDI_WRITTEN]); + + /* + * Skip quiet periods when disk bandwidth is under-utilized. + * (at least 1s idle time between two flusher runs) + */ + if (elapsed > HZ && time_before(bdi->bw_time_stamp, start_time)) + goto snapshot; + + bdi_update_write_bandwidth(bdi, elapsed, written); + +snapshot: + bdi->written_stamp = written; + bdi->bw_time_stamp = now; +} + +static void bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long start_time) +{ + if (time_is_after_eq_jiffies(bdi->bw_time_stamp + BANDWIDTH_INTERVAL)) + return; + spin_lock(&bdi->wb.list_lock); + __bdi_update_bandwidth(bdi, start_time); + spin_unlock(&bdi->wb.list_lock); +} + /* * balance_dirty_pages() must be called by processes which are generating dirty * data. It looks at the number of dirty pages in the machine and will force @@ -490,6 +574,7 @@ static void balance_dirty_pages(struct address_space *mapping, unsigned long pause = 1; bool dirty_exceeded = false; struct backing_dev_info *bdi = mapping->backing_dev_info; + unsigned long start_time = jiffies; for (;;) { nr_reclaimable = global_page_state(NR_FILE_DIRTY) + @@ -544,6 +629,8 @@ static void balance_dirty_pages(struct address_space *mapping, if (!bdi->dirty_exceeded) bdi->dirty_exceeded = 1; + bdi_update_bandwidth(bdi, start_time); + /* Note: nr_reclaimable denotes nr_dirty + nr_unstable. * Unstable writes are a feature of certain networked * filesystems (i.e. NFS) in which data may have been -- cgit v0.10.2 From 00821b002df7da867bb2c15b4f83f3706371383f Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 29 Aug 2010 11:28:45 -0600 Subject: writeback: show bdi write bandwidth in debugfs Add a "BdiWriteBandwidth" entry and indent others in /debug/bdi/*/stats. btw, increase digital field width to 10, for keeping the possibly huge BdiWritten number aligned at least for desktop systems. Impact: this could break user space tools if they are dumb enough to depend on the number of white spaces. CC: Theodore Ts'o CC: Jan Kara CC: Peter Zijlstra Signed-off-by: Wu Fengguang diff --git a/mm/backing-dev.c b/mm/backing-dev.c index a76cdd1..ddd0345 100644 --- a/mm/backing-dev.c +++ b/mm/backing-dev.c @@ -92,23 +92,25 @@ static int bdi_debug_stats_show(struct seq_file *m, void *v) #define K(x) ((x) << (PAGE_SHIFT - 10)) seq_printf(m, - "BdiWriteback: %8lu kB\n" - "BdiReclaimable: %8lu kB\n" - "BdiDirtyThresh: %8lu kB\n" - "DirtyThresh: %8lu kB\n" - "BackgroundThresh: %8lu kB\n" - "BdiWritten: %8lu kB\n" - "b_dirty: %8lu\n" - "b_io: %8lu\n" - "b_more_io: %8lu\n" - "bdi_list: %8u\n" - "state: %8lx\n", + "BdiWriteback: %10lu kB\n" + "BdiReclaimable: %10lu kB\n" + "BdiDirtyThresh: %10lu kB\n" + "DirtyThresh: %10lu kB\n" + "BackgroundThresh: %10lu kB\n" + "BdiWritten: %10lu kB\n" + "BdiWriteBandwidth: %10lu kBps\n" + "b_dirty: %10lu\n" + "b_io: %10lu\n" + "b_more_io: %10lu\n" + "bdi_list: %10u\n" + "state: %10lx\n", (unsigned long) K(bdi_stat(bdi, BDI_WRITEBACK)), (unsigned long) K(bdi_stat(bdi, BDI_RECLAIMABLE)), K(bdi_thresh), K(dirty_thresh), K(background_thresh), (unsigned long) K(bdi_stat(bdi, BDI_WRITTEN)), + (unsigned long) K(bdi->write_bandwidth), nr_dirty, nr_io, nr_more_io, -- cgit v0.10.2 From 7762741e3af69720186802e945229b6a5afd5c49 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 12 Sep 2010 13:34:05 -0600 Subject: writeback: consolidate variable names in balance_dirty_pages() Introduce nr_dirty = NR_FILE_DIRTY + NR_WRITEBACK + NR_UNSTABLE_NFS in order to simplify many tests in the following patches. balance_dirty_pages() will eventually care only about the dirty sums besides nr_writeback. Acked-by: Jan Kara Signed-off-by: Wu Fengguang diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 446bdf7..5f3e1b4 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -565,8 +565,9 @@ static void bdi_update_bandwidth(struct backing_dev_info *bdi, static void balance_dirty_pages(struct address_space *mapping, unsigned long write_chunk) { - long nr_reclaimable, bdi_nr_reclaimable; - long nr_writeback, bdi_nr_writeback; + unsigned long nr_reclaimable, bdi_nr_reclaimable; + unsigned long nr_dirty; /* = file_dirty + writeback + unstable_nfs */ + unsigned long bdi_dirty; unsigned long background_thresh; unsigned long dirty_thresh; unsigned long bdi_thresh; @@ -579,7 +580,7 @@ static void balance_dirty_pages(struct address_space *mapping, for (;;) { nr_reclaimable = global_page_state(NR_FILE_DIRTY) + global_page_state(NR_UNSTABLE_NFS); - nr_writeback = global_page_state(NR_WRITEBACK); + nr_dirty = nr_reclaimable + global_page_state(NR_WRITEBACK); global_dirty_limits(&background_thresh, &dirty_thresh); @@ -588,8 +589,7 @@ static void balance_dirty_pages(struct address_space *mapping, * catch-up. This avoids (excessively) small writeouts * when the bdi limits are ramping up. */ - if (nr_reclaimable + nr_writeback <= - (background_thresh + dirty_thresh) / 2) + if (nr_dirty <= (background_thresh + dirty_thresh) / 2) break; bdi_thresh = bdi_dirty_limit(bdi, dirty_thresh); @@ -607,10 +607,12 @@ static void balance_dirty_pages(struct address_space *mapping, */ if (bdi_thresh < 2*bdi_stat_error(bdi)) { bdi_nr_reclaimable = bdi_stat_sum(bdi, BDI_RECLAIMABLE); - bdi_nr_writeback = bdi_stat_sum(bdi, BDI_WRITEBACK); + bdi_dirty = bdi_nr_reclaimable + + bdi_stat_sum(bdi, BDI_WRITEBACK); } else { bdi_nr_reclaimable = bdi_stat(bdi, BDI_RECLAIMABLE); - bdi_nr_writeback = bdi_stat(bdi, BDI_WRITEBACK); + bdi_dirty = bdi_nr_reclaimable + + bdi_stat(bdi, BDI_WRITEBACK); } /* @@ -619,9 +621,8 @@ static void balance_dirty_pages(struct address_space *mapping, * bdi or process from holding back light ones; The latter is * the last resort safeguard. */ - dirty_exceeded = - (bdi_nr_reclaimable + bdi_nr_writeback > bdi_thresh) - || (nr_reclaimable + nr_writeback > dirty_thresh); + dirty_exceeded = (bdi_dirty > bdi_thresh) || + (nr_dirty > dirty_thresh); if (!dirty_exceeded) break; -- cgit v0.10.2 From c42843f2f0bbc9d716a32caf667d18fc2bf3bc4c Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Wed, 2 Mar 2011 15:54:09 -0600 Subject: writeback: introduce smoothed global dirty limit The start of a heavy weight application (ie. KVM) may instantly knock down determine_dirtyable_memory() if the swap is not enabled or full. global_dirty_limits() and bdi_dirty_limit() will in turn get global/bdi dirty thresholds that are _much_ lower than the global/bdi dirty pages. balance_dirty_pages() will then heavily throttle all dirtiers including the light ones, until the dirty pages drop below the new dirty thresholds. During this _deep_ dirty-exceeded state, the system may appear rather unresponsive to the users. About "deep" dirty-exceeded: task_dirty_limit() assigns 1/8 lower dirty threshold to heavy dirtiers than light ones, and the dirty pages will be throttled around the heavy dirtiers' dirty threshold and reasonably below the light dirtiers' dirty threshold. In this state, only the heavy dirtiers will be throttled and the dirty pages are carefully controlled to not exceed the light dirtiers' dirty threshold. However if the threshold itself suddenly drops below the number of dirty pages, the light dirtiers will get heavily throttled. So introduce global_dirty_limit for tracking the global dirty threshold with policies - follow downwards slowly - follow up in one shot global_dirty_limit can effectively mask out the impact of sudden drop of dirtyable memory. It will be used in the next patch for two new type of dirty limits. Note that the new dirty limits are not going to avoid throttling the light dirtiers, but could limit their sleep time to 200ms. Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 5826992..227ff12 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -699,7 +699,7 @@ static inline bool over_bground_thresh(void) static void wb_update_bandwidth(struct bdi_writeback *wb, unsigned long start_time) { - __bdi_update_bandwidth(wb->bdi, start_time); + __bdi_update_bandwidth(wb->bdi, 0, 0, 0, 0, start_time); } /* diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 66862f2..e9d371b 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -84,6 +84,8 @@ static inline void laptop_sync_completion(void) { } #endif void throttle_vm_writeout(gfp_t gfp_mask); +extern unsigned long global_dirty_limit; + /* These are exported to sysctl. */ extern int dirty_background_ratio; extern unsigned long dirty_background_bytes; @@ -119,6 +121,10 @@ unsigned long bdi_dirty_limit(struct backing_dev_info *bdi, unsigned long dirty); void __bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long thresh, + unsigned long dirty, + unsigned long bdi_thresh, + unsigned long bdi_dirty, unsigned long start_time); void page_writeback_init(void); diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 5f3e1b4..da95995 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -116,6 +116,7 @@ EXPORT_SYMBOL(laptop_mode); /* End of sysctl-exported parameters */ +unsigned long global_dirty_limit; /* * Scale the writeback cache size proportional to the relative writeout speeds. @@ -516,7 +517,67 @@ out: bdi->avg_write_bandwidth = avg; } +/* + * The global dirtyable memory and dirty threshold could be suddenly knocked + * down by a large amount (eg. on the startup of KVM in a swapless system). + * This may throw the system into deep dirty exceeded state and throttle + * heavy/light dirtiers alike. To retain good responsiveness, maintain + * global_dirty_limit for tracking slowly down to the knocked down dirty + * threshold. + */ +static void update_dirty_limit(unsigned long thresh, unsigned long dirty) +{ + unsigned long limit = global_dirty_limit; + + /* + * Follow up in one step. + */ + if (limit < thresh) { + limit = thresh; + goto update; + } + + /* + * Follow down slowly. Use the higher one as the target, because thresh + * may drop below dirty. This is exactly the reason to introduce + * global_dirty_limit which is guaranteed to lie above the dirty pages. + */ + thresh = max(thresh, dirty); + if (limit > thresh) { + limit -= (limit - thresh) >> 5; + goto update; + } + return; +update: + global_dirty_limit = limit; +} + +static void global_update_bandwidth(unsigned long thresh, + unsigned long dirty, + unsigned long now) +{ + static DEFINE_SPINLOCK(dirty_lock); + static unsigned long update_time; + + /* + * check locklessly first to optimize away locking for the most time + */ + if (time_before(now, update_time + BANDWIDTH_INTERVAL)) + return; + + spin_lock(&dirty_lock); + if (time_after_eq(now, update_time + BANDWIDTH_INTERVAL)) { + update_dirty_limit(thresh, dirty); + update_time = now; + } + spin_unlock(&dirty_lock); +} + void __bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long thresh, + unsigned long dirty, + unsigned long bdi_thresh, + unsigned long bdi_dirty, unsigned long start_time) { unsigned long now = jiffies; @@ -538,6 +599,9 @@ void __bdi_update_bandwidth(struct backing_dev_info *bdi, if (elapsed > HZ && time_before(bdi->bw_time_stamp, start_time)) goto snapshot; + if (thresh) + global_update_bandwidth(thresh, dirty, now); + bdi_update_write_bandwidth(bdi, elapsed, written); snapshot: @@ -546,12 +610,17 @@ snapshot: } static void bdi_update_bandwidth(struct backing_dev_info *bdi, + unsigned long thresh, + unsigned long dirty, + unsigned long bdi_thresh, + unsigned long bdi_dirty, unsigned long start_time) { if (time_is_after_eq_jiffies(bdi->bw_time_stamp + BANDWIDTH_INTERVAL)) return; spin_lock(&bdi->wb.list_lock); - __bdi_update_bandwidth(bdi, start_time); + __bdi_update_bandwidth(bdi, thresh, dirty, bdi_thresh, bdi_dirty, + start_time); spin_unlock(&bdi->wb.list_lock); } @@ -630,7 +699,8 @@ static void balance_dirty_pages(struct address_space *mapping, if (!bdi->dirty_exceeded) bdi->dirty_exceeded = 1; - bdi_update_bandwidth(bdi, start_time); + bdi_update_bandwidth(bdi, dirty_thresh, nr_dirty, + bdi_thresh, bdi_dirty, start_time); /* Note: nr_reclaimable denotes nr_dirty + nr_unstable. * Unstable writes are a feature of certain networked -- cgit v0.10.2 From ffd1f609ab10532e8137b4b981fdf903ef4d0b32 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 19 Jun 2011 22:18:42 -0600 Subject: writeback: introduce max-pause and pass-good dirty limits The max-pause limit helps to keep the sleep time inside balance_dirty_pages() within MAX_PAUSE=200ms. The 200ms max sleep means per task rate limit of 8pages/200ms=160KB/s when dirty exceeded, which normally is enough to stop dirtiers from continue pushing the dirty pages high, unless there are a sufficient large number of slow dirtiers (eg. 500 tasks doing 160KB/s will still sum up to 80MB/s, exceeding the write bandwidth of a slow disk and hence accumulating more and more dirty pages). The pass-good limit helps to let go of the good bdi's in the presence of a blocked bdi (ie. NFS server not responding) or slow USB disk which for some reason build up a large number of initial dirty pages that refuse to go away anytime soon. For example, given two bdi's A and B and the initial state bdi_thresh_A = dirty_thresh / 2 bdi_thresh_B = dirty_thresh / 2 bdi_dirty_A = dirty_thresh / 2 bdi_dirty_B = dirty_thresh / 2 Then A get blocked, after a dozen seconds bdi_thresh_A = 0 bdi_thresh_B = dirty_thresh bdi_dirty_A = dirty_thresh / 2 bdi_dirty_B = dirty_thresh / 2 The (bdi_dirty_B < bdi_thresh_B) test is now useless and the dirty pages will be effectively throttled by condition (nr_dirty < dirty_thresh). This has two problems: (1) we lose the protections for light dirtiers (2) balance_dirty_pages() effectively becomes IO-less because the (bdi_nr_reclaimable > bdi_thresh) test won't be true. This is good for IO, but balance_dirty_pages() loses an important way to break out of the loop which leads to more spread out throttle delays. DIRTY_PASSGOOD_AREA can eliminate the above issues. The only problem is, DIRTY_PASSGOOD_AREA needs to be defined as 2 to fully cover the above example while this patch uses the more conservative value 8 so as not to surprise people with too many dirty pages than expected. The max-pause limit won't noticeably impact the speed dirty pages are knocked down when there is a sudden drop of global/bdi dirty thresholds. Because the heavy dirties will be throttled below 160KB/s which is slow enough. It does help to avoid long dirty throttle delays and especially will make light dirtiers more responsive. Signed-off-by: Wu Fengguang diff --git a/include/linux/writeback.h b/include/linux/writeback.h index e9d371b..b625073 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -7,6 +7,27 @@ #include #include +/* + * The 1/16 region above the global dirty limit will be put to maximum pauses: + * + * (limit, limit + limit/DIRTY_MAXPAUSE_AREA) + * + * The 1/16 region above the max-pause region, dirty exceeded bdi's will be put + * to loops: + * + * (limit + limit/DIRTY_MAXPAUSE_AREA, limit + limit/DIRTY_PASSGOOD_AREA) + * + * Further beyond, all dirtier tasks will enter a loop waiting (possibly long + * time) for the dirty pages to drop, unless written enough pages. + * + * The global dirty threshold is normally equal to the global dirty limit, + * except when the system suddenly allocates a lot of anonymous memory and + * knocks down the global dirty threshold quickly, in which case the global + * dirty limit will follow down slowly to prevent livelocking all dirtier tasks. + */ +#define DIRTY_MAXPAUSE_AREA 16 +#define DIRTY_PASSGOOD_AREA 8 + struct backing_dev_info; /* diff --git a/mm/page-writeback.c b/mm/page-writeback.c index da95995..798842a 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -37,6 +37,11 @@ #include /* + * Sleep at most 200ms at a time in balance_dirty_pages(). + */ +#define MAX_PAUSE max(HZ/5, 1) + +/* * Estimate write bandwidth at 200ms intervals. */ #define BANDWIDTH_INTERVAL max(HZ/5, 1) @@ -399,6 +404,11 @@ unsigned long determine_dirtyable_memory(void) return x + 1; /* Ensure that we never return 0 */ } +static unsigned long hard_dirty_limit(unsigned long thresh) +{ + return max(thresh, global_dirty_limit); +} + /* * global_dirty_limits - background-writeback and dirty-throttling thresholds * @@ -723,6 +733,29 @@ static void balance_dirty_pages(struct address_space *mapping, io_schedule_timeout(pause); trace_balance_dirty_wait(bdi); + dirty_thresh = hard_dirty_limit(dirty_thresh); + /* + * max-pause area. If dirty exceeded but still within this + * area, no need to sleep for more than 200ms: (a) 8 pages per + * 200ms is typically more than enough to curb heavy dirtiers; + * (b) the pause time limit makes the dirtiers more responsive. + */ + if (nr_dirty < dirty_thresh + + dirty_thresh / DIRTY_MAXPAUSE_AREA && + time_after(jiffies, start_time + MAX_PAUSE)) + break; + /* + * pass-good area. When some bdi gets blocked (eg. NFS server + * not responding), or write bandwidth dropped dramatically due + * to concurrent reads, or dirty threshold suddenly dropped and + * the dirty pages cannot be brought down anytime soon (eg. on + * slow USB stick), at least let go of the good bdi's. + */ + if (nr_dirty < dirty_thresh + + dirty_thresh / DIRTY_PASSGOOD_AREA && + bdi_dirty < bdi_thresh) + break; + /* * Increase the delay for each loop, up to our previous * default of taking a 100ms nap. -- cgit v0.10.2 From e1cbe236013c82bcf9a156e98d7b47efb89d2674 Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Mon, 6 Dec 2010 22:34:29 -0600 Subject: writeback: trace global_dirty_state Add trace event balance_dirty_state for showing the global dirty page counts and thresholds at each global_dirty_limits() invocation. This will cover the callers throttle_vm_writeout(), over_bground_thresh() and each balance_dirty_pages() loop. Signed-off-by: Wu Fengguang diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index 3e7662a..6bca4cc 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -204,6 +204,52 @@ TRACE_EVENT(writeback_queue_io, __entry->moved) ); +TRACE_EVENT(global_dirty_state, + + TP_PROTO(unsigned long background_thresh, + unsigned long dirty_thresh + ), + + TP_ARGS(background_thresh, + dirty_thresh + ), + + TP_STRUCT__entry( + __field(unsigned long, nr_dirty) + __field(unsigned long, nr_writeback) + __field(unsigned long, nr_unstable) + __field(unsigned long, background_thresh) + __field(unsigned long, dirty_thresh) + __field(unsigned long, dirty_limit) + __field(unsigned long, nr_dirtied) + __field(unsigned long, nr_written) + ), + + TP_fast_assign( + __entry->nr_dirty = global_page_state(NR_FILE_DIRTY); + __entry->nr_writeback = global_page_state(NR_WRITEBACK); + __entry->nr_unstable = global_page_state(NR_UNSTABLE_NFS); + __entry->nr_dirtied = global_page_state(NR_DIRTIED); + __entry->nr_written = global_page_state(NR_WRITTEN); + __entry->background_thresh = background_thresh; + __entry->dirty_thresh = dirty_thresh; + __entry->dirty_limit = global_dirty_limit; + ), + + TP_printk("dirty=%lu writeback=%lu unstable=%lu " + "bg_thresh=%lu thresh=%lu limit=%lu " + "dirtied=%lu written=%lu", + __entry->nr_dirty, + __entry->nr_writeback, + __entry->nr_unstable, + __entry->background_thresh, + __entry->dirty_thresh, + __entry->dirty_limit, + __entry->nr_dirtied, + __entry->nr_written + ) +); + DECLARE_EVENT_CLASS(writeback_congest_waited_template, TP_PROTO(unsigned int usec_timeout, unsigned int usec_delayed), diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 798842a..f9d9f54 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -447,6 +447,7 @@ void global_dirty_limits(unsigned long *pbackground, unsigned long *pdirty) } *pbackground = background; *pdirty = dirty; + trace_global_dirty_state(background, dirty); } /** -- cgit v0.10.2 From 1a12d8bd7b2998be01ee55edb64e7473728abb9c Mon Sep 17 00:00:00 2001 From: Wu Fengguang Date: Sun, 29 Aug 2010 13:28:09 -0600 Subject: writeback: scale IO chunk size up to half device bandwidth Originally, MAX_WRITEBACK_PAGES was hard-coded to 1024 because of a concern of not holding I_SYNC for too long. (At least, that was the comment previously.) This doesn't make sense now because the only time we wait for I_SYNC is if we are calling sync or fsync, and in that case we need to write out all of the data anyway. Previously there may have been other code paths that waited on I_SYNC, but not any more. -- Theodore Ts'o So remove the MAX_WRITEBACK_PAGES constraint. The writeback pages will adapt to as large as the storage device can write within 500ms. XFS is observed to do IO completions in a batch, and the batch size is equal to the write chunk size. To avoid dirty pages to suddenly drop out of balance_dirty_pages()'s dirty control scope and create large fluctuations, the chunk size is also limited to half the control scope. The balance_dirty_pages() control scrope is [(background_thresh + dirty_thresh) / 2, dirty_thresh] which is by default [15%, 20%] of global dirty pages, whose range size is dirty_thresh / DIRTY_FULL_SCOPE. The adpative write chunk size will be rounded to the nearest 4MB boundary. http://bugzilla.kernel.org/show_bug.cgi?id=13930 CC: Theodore Ts'o CC: Dave Chinner CC: Chris Mason CC: Peter Zijlstra Signed-off-by: Wu Fengguang diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 227ff12..50445cf 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -30,15 +30,6 @@ #include "internal.h" /* - * The maximum number of pages to writeout in a single bdi flush/kupdate - * operation. We do this so we don't hold I_SYNC against an inode for - * enormous amounts of time, which would block a userspace task which has - * been forced to throttle against that inode. Also, the code reevaluates - * the dirty each time it has written this many pages. - */ -#define MAX_WRITEBACK_PAGES 1024L - -/* * Passed into wb_writeback(), essentially a subset of writeback_control */ struct wb_writeback_work { @@ -515,7 +506,8 @@ static bool pin_sb_for_writeback(struct super_block *sb) return false; } -static long writeback_chunk_size(struct wb_writeback_work *work) +static long writeback_chunk_size(struct backing_dev_info *bdi, + struct wb_writeback_work *work) { long pages; @@ -534,8 +526,13 @@ static long writeback_chunk_size(struct wb_writeback_work *work) */ if (work->sync_mode == WB_SYNC_ALL || work->tagged_writepages) pages = LONG_MAX; - else - pages = min(MAX_WRITEBACK_PAGES, work->nr_pages); + else { + pages = min(bdi->avg_write_bandwidth / 2, + global_dirty_limit / DIRTY_SCOPE); + pages = min(pages, work->nr_pages); + pages = round_down(pages + MIN_WRITEBACK_PAGES, + MIN_WRITEBACK_PAGES); + } return pages; } @@ -600,7 +597,7 @@ static long writeback_sb_inodes(struct super_block *sb, continue; } __iget(inode); - write_chunk = writeback_chunk_size(work); + write_chunk = writeback_chunk_size(wb->bdi, work); wbc.nr_to_write = write_chunk; wbc.pages_skipped = 0; diff --git a/include/linux/writeback.h b/include/linux/writeback.h index b625073..f1bfa12e 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h @@ -8,6 +8,10 @@ #include /* + * The 1/4 region under the global dirty thresh is for smooth dirty throttling: + * + * (thresh - thresh/DIRTY_FULL_SCOPE, thresh) + * * The 1/16 region above the global dirty limit will be put to maximum pauses: * * (limit, limit + limit/DIRTY_MAXPAUSE_AREA) @@ -25,9 +29,16 @@ * knocks down the global dirty threshold quickly, in which case the global * dirty limit will follow down slowly to prevent livelocking all dirtier tasks. */ +#define DIRTY_SCOPE 8 +#define DIRTY_FULL_SCOPE (DIRTY_SCOPE / 2) #define DIRTY_MAXPAUSE_AREA 16 #define DIRTY_PASSGOOD_AREA 8 +/* + * 4MB minimal write chunk size + */ +#define MIN_WRITEBACK_PAGES (4096UL >> (PAGE_CACHE_SHIFT - 10)) + struct backing_dev_info; /* -- cgit v0.10.2 From da7cdfac1b0c58d6863532dd3b432c3fbc034978 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Sat, 9 Jul 2011 20:39:45 -0600 Subject: OMAP4: hwmod data: Change DSS main_clk scheme Currently using pm_runtime with DSS requires the DSS driver to enable the DSS functional clock before calling pm_runtime_get(). That makes it impossible to use pm_runtime in DSS as it is meant to be used, with pm_runtime callbacks. This patch changes the hwmod database for OMAP4 so that enabling the hwmod via pm_runtime will also enable the DSS functional clock, allowing us to use pm_runtime properly in DSS driver. The DSS HWMOD side is not really correct, not before nor after this patch, and getting DSS to retention will probably not work currently. However, it is not supported in the mainline kernel anyway, so this won't break anything. So this patch allows us to write the pm_runtime adaptation for the DSS driver the way it should be done, and the HWMOD/PM side can be fixed later. Signed-off-by: Tomi Valkeinen Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a7fbe5c..b25ab83 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1136,7 +1136,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1175,7 +1175,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap44xx_dss_hwmod = { .name = "dss_core", .class = &omap44xx_dss_hwmod_class, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1238,7 +1238,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dispc_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dispc_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1279,7 +1279,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1338,7 +1338,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dsi1_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dsi1_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1376,7 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1414,7 +1414,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_dsi2_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_dsi2_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1452,7 +1452,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1510,7 +1510,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_hdmi_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_hdmi_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1548,7 +1548,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1601,7 +1601,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_rfbi_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_rfbi_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1638,7 +1638,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, @@ -1675,7 +1675,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_dss_venc_hwmod, - .clk = "l3_div_ck", + .clk = "dss_fck", .addr = omap44xx_dss_venc_dma_addrs, .user = OCP_USER_SDMA, }; @@ -1707,7 +1707,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { static struct omap_hwmod omap44xx_dss_venc_hwmod = { .name = "dss_venc", .class = &omap44xx_venc_hwmod_class, - .main_clk = "dss_fck", + .main_clk = "dss_dss_clk", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, -- cgit v0.10.2 From 3e6005221138bcfc08f1a35b6f9e43b53330e851 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c Peter Maydell noticed when running under QEMU he was getting errors reporting 32-bit access to I2C peripheral unit registers that are documented to be 8 or 16-bit only[1][2] The I2C driver is blameless as it wraps its accesses in a function using __raw_writew and __raw_readw, it turned out it is the hwmod stuff. However the hwmod code already has a flag to force a perhipheral unit to only be accessed using 16-bit operations. This patch applies the 16-bit only flag to the 2430, OMAP3xxx and OMAP44xx hwmod structs. 2420 was already correctly marked up as 16-bit. The 2430 change will need testing by TI as arranged in the comments to the previous patch version. When the 16-bit flag is or-ed with other flags, it is placed first as requested in comments. [1] OMAP4430 Technical reference manual section 23.1.6.2 [2] OMAP3530 Techincal reference manual section 18.6 Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 2a52f02..19ddf08 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1092,6 +1092,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2chs1_fck", @@ -1127,6 +1128,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2chs2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 1a52716..542a11b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1615,6 +1615,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -1646,6 +1647,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -1688,6 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", + .flags = HWMOD_16BIT_REG, .mpu_irqs = i2c3_mpu_irqs, .sdma_reqs = i2c3_sdma_reqs, .main_clk = "i2c3_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index b25ab83..2ebccb8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2201,7 +2201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -2254,7 +2254,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -2307,7 +2307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, .main_clk = "i2c3_fck", @@ -2360,7 +2360,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, .main_clk = "i2c4_fck", -- cgit v0.10.2 From 730027216079ef4ab9850a4367ef665554a6ef73 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 As part of removing cpu_...() from the OMAP I2C driver, we need to convert the CPU tests into functionality flags that are set by hwmod class in the same way the IP revision is. More flags are needed than will fit in the existing u8 flags member of omap_i2c_dev_attr. These flags can refer to options inside the IP block but they are most needed for information about cpu implementation specific options that are not part of the IP block itself. For example, how the CPU data bus is wired to the IP block databus differs between OMAP cpus and affects how you must shift the address in the IP block, but is not a feature of the IP block itself. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 878d632..4c108f5 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -46,7 +46,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, */ struct omap_i2c_dev_attr { u8 fifo_depth; - u8 flags; + u32 flags; }; void __init omap1_i2c_mux_pins(int bus_id); -- cgit v0.10.2 From d72fe7883f9f835011cb581aea13e91c6fa2e31d Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:14 -0600 Subject: I2C: OMAP2+: Introduce I2C IP versioning constants These represent the two kinds of (incompatible) OMAP I2C peripheral unit in use so far. The constants are in linux/i2c-omap.h so the omap i2c driver can have them too. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index 4c108f5..fd75dad 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -22,6 +22,7 @@ #define __ASM__ARCH_OMAP_I2C_H #include +#include #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) extern int omap_register_i2c_bus(int bus_id, u32 clkrate, diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 7472449..701886d 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -3,6 +3,18 @@ #include +/* + * Version 2 of the I2C peripheral unit has a different register + * layout and extra registers. The ID register in the V2 peripheral + * unit on the OMAP4430 reports the same ID as the V1 peripheral + * unit on the OMAP3530, so we must inform the driver which IP + * version we know it is running on from platform / cpu-specific + * code using these constants in the hwmod class definition. + */ + +#define OMAP_I2C_IP_VERSION_1 1 +#define OMAP_I2C_IP_VERSION_2 2 + struct omap_i2c_bus_platform_data { u32 clkrate; void (*set_mpu_wkup_lat)(struct device *dev, long set); -- cgit v0.10.2 From 5a9aaf0cf89dfb776f45b7ef878fd1508faadbf7 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:15 -0600 Subject: I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test These represent the 8 kinds of implementation functionality that up until now were inferred by the 16 remaining cpu_...() tests in the omap i2c driver. Changed to use BIT() as suggested by Balaji T Krishnamoorthy. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 701886d..0aa0cbd 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -15,6 +15,21 @@ #define OMAP_I2C_IP_VERSION_1 1 #define OMAP_I2C_IP_VERSION_2 2 +/* struct omap_i2c_bus_platform_data .flags meanings */ + +#define OMAP_I2C_FLAG_NO_FIFO BIT(0) +#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) +#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) +#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) +#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) +#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) +/* how the CPU address bus must be translated for I2C unit access */ +#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 +#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) +#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) +#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 + struct omap_i2c_bus_platform_data { u32 clkrate; void (*set_mpu_wkup_lat)(struct device *dev, long set); -- cgit v0.10.2 From db791a75299bb6212ec984bdbe4ab581dbc07902 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:15 -0600 Subject: I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision Since we cannot trust (or even reliably find) the OMAP I2C peripheral unit's own revision register, we must inform the OMAP i2c driver of which IP version it is running on. We do this by tagging the omap_hwmod_class for i2c on all the OMAP2+ platform / cpu specific hwmod init and passing it up to the driver (next patches). Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index f3901ab..95f547c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1029,6 +1029,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_i2c_dev_attr i2c_dev_attr; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 19ddf08..d7ed51b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1078,6 +1078,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 542a11b..58ec1e2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1308,6 +1308,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, }; static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 2ebccb8..1bed3b8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2160,6 +2160,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_2, }; /* i2c1 */ -- cgit v0.10.2 From 4d4441a6221ca3a30290045b7b696e5134646449 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Sun, 10 Jul 2011 05:27:16 -0600 Subject: I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr This adds the new functionality flags for omap i2c unit to all OMAP2 hwmod definitions Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 95f547c..7af2514 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1032,7 +1032,12 @@ static struct omap_hwmod_class i2c_class = { .rev = OMAP_I2C_IP_VERSION_1, }; -static struct omap_i2c_dev_attr i2c_dev_attr; +static struct omap_i2c_dev_attr i2c_dev_attr = { + .flags = OMAP_I2C_FLAG_NO_FIFO | + OMAP_I2C_FLAG_SIMPLE_CLOCK | + OMAP_I2C_FLAG_16BIT_DATA_REG | + OMAP_I2C_FLAG_BUS_SHIFT_2, +}; /* I2C1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index d7ed51b..405688a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1083,6 +1083,9 @@ static struct omap_hwmod_class i2c_class = { static struct omap_i2c_dev_attr i2c_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_BUS_SHIFT_2 | + OMAP_I2C_FLAG_FORCE_19200_INT_CLK, }; /* I2C1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 58ec1e2..c704ac8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1608,6 +1608,9 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { @@ -1640,6 +1643,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth = 8, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { @@ -1672,6 +1678,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { static struct omap_i2c_dev_attr i2c3_dev_attr = { .fifo_depth = 64, /* bytes */ + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 1bed3b8..55331df 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "omap_hwmod_common_data.h" @@ -2163,6 +2164,10 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .rev = OMAP_I2C_IP_VERSION_2, }; +static struct omap_i2c_dev_attr i2c_dev_attr = { + .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, +}; + /* i2c1 */ static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { @@ -2213,6 +2218,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { }, .slaves = omap44xx_i2c1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2266,6 +2272,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { }, .slaves = omap44xx_i2c2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2319,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { }, .slaves = omap44xx_i2c3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -2372,6 +2380,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { }, .slaves = omap44xx_i2c4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), + .dev_attr = &i2c_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -- cgit v0.10.2 From 6d3c55fd4f0f94a9455d30df9414ddb0f755f402 Mon Sep 17 00:00:00 2001 From: "Avinash.H.M" Date: Sun, 10 Jul 2011 05:27:16 -0600 Subject: OMAP: hwmod: fix the i2c-reset timeout during bootup The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak Cc: Paul Walmsley Cc: Benoit Cousson Cc: Kevin Hilman Signed-off-by: Avinash.H.M [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 79c478c..ace9994 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -21,9 +21,19 @@ #include #include +#include +#include #include "mux.h" +/* In register I2C_CON, Bit 15 is the I2C enable bit */ +#define I2C_EN BIT(15) +#define OMAP2_I2C_CON_OFFSET 0x24 +#define OMAP4_I2C_CON_OFFSET 0xA4 + +/* Maximum microseconds to wait for OMAP module to softreset */ +#define MAX_MODULE_SOFTRESET_WAIT 10000 + void __init omap2_i2c_mux_pins(int bus_id) { char mux_name[sizeof("i2c2_scl.i2c2_scl")]; @@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); } + +/** + * omap_i2c_reset - reset the omap i2c module. + * @oh: struct omap_hwmod * + * + * The i2c moudle in omap2, omap3 had a special sequence to reset. The + * sequence is: + * - Disable the I2C. + * - Write to SOFTRESET bit. + * - Enable the I2C. + * - Poll on the RESETDONE bit. + * The sequence is implemented in below function. This is called for 2420, + * 2430 and omap3. + */ +int omap_i2c_reset(struct omap_hwmod *oh) +{ + u32 v; + u16 i2c_con; + int c = 0; + + if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { + i2c_con = OMAP4_I2C_CON_OFFSET; + } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { + i2c_con = OMAP2_I2C_CON_OFFSET; + } else { + WARN(1, "Cannot reset I2C block %s: unsupported revision\n", + oh->name); + return -EINVAL; + } + + /* Disable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v &= ~I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Write to the SOFTRESET bit */ + omap_hwmod_softreset(oh); + + /* Enable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v |= I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Poll on RESETDONE bit */ + omap_test_timeout((omap_hwmod_read(oh, + oh->class->sysc->syss_offs) + & SYSS_RESETDONE_MASK), + MAX_MODULE_SOFTRESET_WAIT, c); + + if (c == MAX_MODULE_SOFTRESET_WAIT) + pr_warning("%s: %s: softreset failed (waited %d usec)\n", + __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); + else + pr_debug("%s: %s: softreset in %d usec\n", __func__, + oh->name, c); + + return 0; +} diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7d242c9..02b6016 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1656,6 +1656,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) } /** + * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit + * @oh: struct omap_hwmod * + * + * This is a public function exposed to drivers. Some drivers may need to do + * some settings before and after resetting the device. Those drivers after + * doing the necessary settings could use this function to start a reset by + * setting the SYSCONFIG.SOFTRESET bit. + */ +int omap_hwmod_softreset(struct omap_hwmod *oh) +{ + u32 v; + int ret; + + if (!oh || !(oh->_sysc_cache)) + return -EINVAL; + + v = oh->_sysc_cache; + ret = _set_softreset(oh, &v); + if (ret) + goto error; + _write_sysconfig(v, oh); + +error: + return ret; +} + +/** * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode * @oh: struct omap_hwmod * * @idlemode: SIDLEMODE field bits (shifted to bit 0) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 7af2514..a015c69 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 405688a..16743c7 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index c704ac8..25bf43b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1306,9 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { }; static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, + .name = "i2c", + .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 55331df..5d5df49 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -2162,6 +2163,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, .rev = OMAP_I2C_IP_VERSION_2, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { @@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, .main_clk = "i2c3_fck", @@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, .main_clk = "i2c4_fck", diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index fd75dad..7c22b9e 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { void __init omap1_i2c_mux_pins(int bus_id); void __init omap2_i2c_mux_pins(int bus_id); +struct omap_hwmod; +int omap_i2c_reset(struct omap_hwmod *oh); + #endif /* __ASM__ARCH_OMAP_I2C_H */ diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index ce06ac6..fafdfe3 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); +int omap_hwmod_softreset(struct omap_hwmod *oh); int omap_hwmod_count_resources(struct omap_hwmod *oh); int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); -- cgit v0.10.2 From bf1e0776cf5e4ef2622de3a4b63f84175b5b48ab Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:54:12 -0600 Subject: OMAP: omap_device: Create clkdev entry for hwmod main_clk Extend the existing function to create clkdev for every optional clocks to add a well one "fck" alias for the main_clk of the omap_hwmod. It will allow to remove these static clkdev entries from the clockXXX_data.c file. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Kevin Hilman Cc: Todd Poynor [paul@pwsan.com: remove all of the "fck" role clkdev aliases from the clock data files; fixed error message] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 2926d02..debc040 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1805,9 +1805,9 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), /* DSS domain clocks */ CLK("omapdss_dss", "ick", &dss_ick, CK_242X), - CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), - CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), - CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), + CLK(NULL, "dss1_fck", &dss1_fck, CK_242X), + CLK(NULL, "dss2_fck", &dss2_fck, CK_242X), + CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_242X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), @@ -1844,13 +1844,13 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "gpt12_ick", &gpt12_ick, CK_242X), CLK(NULL, "gpt12_fck", &gpt12_fck, CK_242X), CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_242X), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_242X), + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_242X), CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_242X), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_242X), + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_242X), CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_242X), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_242X), + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_242X), CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_242X), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_242X), + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_242X), CLK(NULL, "uart1_ick", &uart1_ick, CK_242X), CLK(NULL, "uart1_fck", &uart1_fck, CK_242X), CLK(NULL, "uart2_ick", &uart2_ick, CK_242X), @@ -1860,7 +1860,7 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "gpios_ick", &gpios_ick, CK_242X), CLK(NULL, "gpios_fck", &gpios_fck, CK_242X), CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_242X), - CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_242X), + CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_242X), CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_242X), CLK(NULL, "wdt1_ick", &wdt1_ick, CK_242X), CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_242X), @@ -1880,11 +1880,11 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "eac_ick", &eac_ick, CK_242X), CLK(NULL, "eac_fck", &eac_fck, CK_242X), CLK("omap_hdq.0", "ick", &hdq_ick, CK_242X), - CLK("omap_hdq.1", "fck", &hdq_fck, CK_242X), + CLK("omap_hdq.0", "fck", &hdq_fck, CK_242X), CLK("omap_i2c.1", "ick", &i2c1_ick, CK_242X), - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_242X), + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_242X), CLK("omap_i2c.2", "ick", &i2c2_ick, CK_242X), - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_242X), + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_242X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_242X), CLK(NULL, "sdma_fck", &sdma_fck, CK_242X), CLK(NULL, "sdma_ick", &sdma_ick, CK_242X), diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 0c79d39..96a942e 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1895,9 +1895,9 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), /* DSS domain clocks */ CLK("omapdss_dss", "ick", &dss_ick, CK_243X), - CLK("omapdss_dss", "fck", &dss1_fck, CK_243X), - CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X), - CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X), + CLK(NULL, "dss1_fck", &dss1_fck, CK_243X), + CLK(NULL, "dss2_fck", &dss2_fck, CK_243X), + CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), @@ -1934,21 +1934,21 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X), CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X), CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X), + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_243X), CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X), + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_243X), CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X), - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X), + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_243X), CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X), - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X), + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_243X), CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X), - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X), + CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_243X), CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X), + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_243X), CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_243X), + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_243X), CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_243X), - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_243X), + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_243X), CLK(NULL, "uart1_ick", &uart1_ick, CK_243X), CLK(NULL, "uart1_fck", &uart1_fck, CK_243X), CLK(NULL, "uart2_ick", &uart2_ick, CK_243X), @@ -1958,7 +1958,7 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "gpios_ick", &gpios_ick, CK_243X), CLK(NULL, "gpios_fck", &gpios_fck, CK_243X), CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X), - CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_243X), + CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X), CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X), CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X), CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X), @@ -1975,9 +1975,9 @@ static struct omap_clk omap2430_clks[] = { CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X), CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X), CLK("omap_i2c.1", "ick", &i2c1_ick, CK_243X), - CLK("omap_i2c.1", "fck", &i2chs1_fck, CK_243X), + CLK(NULL, "i2chs1_fck", &i2chs1_fck, CK_243X), CLK("omap_i2c.2", "ick", &i2c2_ick, CK_243X), - CLK("omap_i2c.2", "fck", &i2chs2_fck, CK_243X), + CLK(NULL, "i2chs2_fck", &i2chs2_fck, CK_243X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X), CLK(NULL, "sdma_fck", &sdma_fck, CK_243X), CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), @@ -1990,9 +1990,9 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "usb_fck", &usb_fck, CK_243X), CLK("musb-omap2430", "ick", &usbhs_ick, CK_243X), CLK("omap_hsmmc.0", "ick", &mmchs1_ick, CK_243X), - CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_243X), + CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_243X), CLK("omap_hsmmc.1", "ick", &mmchs2_ick, CK_243X), - CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_243X), + CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_243X), CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X), CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X), CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 75b119b..ffd55b1 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3289,25 +3289,25 @@ static struct omap_clk omap3xxx_clks[] = { CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), - CLK("omap_hsmmc.2", "fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_3XXX), + CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX), - CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_3XXX), - CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), + CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_3XXX), + CLK(NULL, "i2c3_fck", &i2c3_fck, CK_3XXX), + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_3XXX), + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_3XXX), + CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_3XXX), + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_3XXX), CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX), - CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX), - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX), + CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_3XXX), + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_3XXX), + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_3XXX), + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_3XXX), CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX), CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX), CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX), - CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), + CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2PLUS | CK_36XX), CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), @@ -3356,11 +3356,11 @@ static struct omap_clk omap3xxx_clks[] = { CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), - CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1), - CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), - CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), - CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), + CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), + CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_3XXX), + CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_3XXX), + CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_3XXX), CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1), CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), @@ -3385,7 +3385,7 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX), - CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX), + CLK(NULL, "wdt2_fck", &wdt2_fck, CK_3XXX), CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX), CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | CK_36XX), CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX), @@ -3436,9 +3436,9 @@ static struct omap_clk omap3xxx_clks[] = { CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX), CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX), CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX), - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX), - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX), + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_3XXX), + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_3XXX), + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_3XXX), CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX), CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX), CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX), diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2578820..763507f 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3057,12 +3057,12 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X), CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X), CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), - CLK("omap2_hdq.0", "fck", &hdq1w_fck, CK_443X), + CLK(NULL, "hdq1w_fck", &hdq1w_fck, CK_443X), CLK(NULL, "hsi_fck", &hsi_fck, CK_443X), - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_443X), - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_443X), - CLK("omap_i2c.3", "fck", &i2c3_fck, CK_443X), - CLK("omap_i2c.4", "fck", &i2c4_fck, CK_443X), + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_443X), + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X), + CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X), + CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X), CLK(NULL, "ipu_fck", &ipu_fck, CK_443X), CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), CLK(NULL, "iss_fck", &iss_fck, CK_443X), @@ -3073,23 +3073,23 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X), CLK(NULL, "mcasp_fck", &mcasp_fck, CK_443X), CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_443X), + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_443X), CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_443X), + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_443X), CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X), - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_443X), + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_443X), CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X), - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_443X), + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_443X), CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_443X), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_443X), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_443X), - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_443X), - CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_443X), - CLK("omap_hsmmc.0", "fck", &mmc1_fck, CK_443X), - CLK("omap_hsmmc.1", "fck", &mmc2_fck, CK_443X), - CLK("omap_hsmmc.2", "fck", &mmc3_fck, CK_443X), - CLK("omap_hsmmc.3", "fck", &mmc4_fck, CK_443X), - CLK("omap_hsmmc.4", "fck", &mmc5_fck, CK_443X), + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_443X), + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_443X), + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_443X), + CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_443X), + CLK(NULL, "mmc1_fck", &mmc1_fck, CK_443X), + CLK(NULL, "mmc2_fck", &mmc2_fck, CK_443X), + CLK(NULL, "mmc3_fck", &mmc3_fck, CK_443X), + CLK(NULL, "mmc4_fck", &mmc4_fck, CK_443X), + CLK(NULL, "mmc5_fck", &mmc5_fck, CK_443X), CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), CLK(NULL, "ocp2scp_usb_phy_ick", &ocp2scp_usb_phy_ick, CK_443X), CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, CK_443X), @@ -3146,7 +3146,7 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "usim_ck", &usim_ck, CK_443X), CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), CLK(NULL, "usim_fck", &usim_fck, CK_443X), - CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), + CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, CK_443X), CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index c8b9cd1..be45147 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -236,56 +236,71 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) return 0; } +static void _add_clkdev(struct omap_device *od, const char *clk_alias, + const char *clk_name) +{ + struct clk *r; + struct clk_lookup *l; + + if (!clk_alias || !clk_name) + return; + + pr_debug("omap_device: %s: Creating %s -> %s\n", + dev_name(&od->pdev.dev), clk_alias, clk_name); + + r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); + if (!IS_ERR(r)) { + pr_warning("omap_device: %s: alias %s already exists\n", + dev_name(&od->pdev.dev), clk_alias); + clk_put(r); + return; + } + + r = omap_clk_get_by_name(clk_name); + if (IS_ERR(r)) { + pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", + dev_name(&od->pdev.dev), clk_name); + return; + } + + l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); + if (!l) { + pr_err("omap_device: %s: clkdev_alloc for %s failed\n", + dev_name(&od->pdev.dev), clk_alias); + return; + } + + clkdev_add(l); +} + /** - * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks + * _add_hwmod_clocks_clkdev - Add clkdev entry for hwmod optional clocks + * and main clock * @od: struct omap_device *od + * @oh: struct omap_hwmod *oh * - * For every optional clock present per hwmod per omap_device, this function - * adds an entry in the clkdev table of the form - * if it does not exist already. + * For the main clock and every optional clock present per hwmod per + * omap_device, this function adds an entry in the clkdev table of the + * form if it does not exist already. * * The function is called from inside omap_device_build_ss(), after * omap_device_register. * * This allows drivers to get a pointer to its optional clocks based on its role * by calling clk_get(, ). + * In the case of the main clock, a "fck" alias is used. * * No return value. */ -static void _add_optional_clock_clkdev(struct omap_device *od, - struct omap_hwmod *oh) +static void _add_hwmod_clocks_clkdev(struct omap_device *od, + struct omap_hwmod *oh) { int i; - for (i = 0; i < oh->opt_clks_cnt; i++) { - struct omap_hwmod_opt_clk *oc; - struct clk *r; - struct clk_lookup *l; - - oc = &oh->opt_clks[i]; - - if (!oc->_clk) - continue; - - r = clk_get_sys(dev_name(&od->pdev.dev), oc->role); - if (!IS_ERR(r)) - continue; /* clkdev entry exists */ + _add_clkdev(od, "fck", oh->main_clk); - r = omap_clk_get_by_name((char *)oc->clk); - if (IS_ERR(r)) { - pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", - dev_name(&od->pdev.dev), oc->clk); - continue; - } - - l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev)); - if (!l) { - pr_err("omap_device: %s: clkdev_alloc for %s failed\n", - dev_name(&od->pdev.dev), oc->role); - return; - } - clkdev_add(l); - } + for (i = 0; i < oh->opt_clks_cnt; i++) + _add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk); } @@ -492,7 +507,7 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, for (i = 0; i < oh_cnt; i++) { hwmods[i]->od = od; - _add_optional_clock_clkdev(od, hwmods[i]); + _add_hwmod_clocks_clkdev(od, hwmods[i]); } if (ret) -- cgit v0.10.2 From ad03f1cb2d44257afa63a2171e84daad931c48cb Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sun, 10 Jul 2011 05:56:14 -0600 Subject: OMAP4: clock data: Add missing divider selection for auxclks On OMAP4 the auxclk nodes (part of SCRM) support both divider as well as parent selection. Supporting this requires splitting the existing nodes (which support only parent selection) into two nodes, one for parent and another for divider selection. The nodes for parent selection are named auxclk*_src_ck and the ones for divider selection as auxclk*_ck. Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Rebase on top of clock cleanup and autogen alignement] Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2578820..2fcdb8d 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -2774,19 +2774,39 @@ static struct clk trace_clk_div_ck = { /* SCRM aux clk nodes */ -static const struct clksel auxclk_sel[] = { +static const struct clksel auxclk_src_sel[] = { { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, { .parent = &dpll_core_m3x2_ck, .rates = div_1_1_rates }, { .parent = &dpll_per_m3x2_ck, .rates = div_1_2_rates }, { .parent = NULL }, }; -static struct clk auxclk0_ck = { - .name = "auxclk0_ck", +static const struct clksel_rate div16_1to16_rates[] = { + { .div = 1, .val = 0, .flags = RATE_IN_4430 }, + { .div = 2, .val = 1, .flags = RATE_IN_4430 }, + { .div = 3, .val = 2, .flags = RATE_IN_4430 }, + { .div = 4, .val = 3, .flags = RATE_IN_4430 }, + { .div = 5, .val = 4, .flags = RATE_IN_4430 }, + { .div = 6, .val = 5, .flags = RATE_IN_4430 }, + { .div = 7, .val = 6, .flags = RATE_IN_4430 }, + { .div = 8, .val = 7, .flags = RATE_IN_4430 }, + { .div = 9, .val = 8, .flags = RATE_IN_4430 }, + { .div = 10, .val = 9, .flags = RATE_IN_4430 }, + { .div = 11, .val = 10, .flags = RATE_IN_4430 }, + { .div = 12, .val = 11, .flags = RATE_IN_4430 }, + { .div = 13, .val = 12, .flags = RATE_IN_4430 }, + { .div = 14, .val = 13, .flags = RATE_IN_4430 }, + { .div = 15, .val = 14, .flags = RATE_IN_4430 }, + { .div = 16, .val = 15, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static struct clk auxclk0_src_ck = { + .name = "auxclk0_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK0, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2794,12 +2814,29 @@ static struct clk auxclk0_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; -static struct clk auxclk1_ck = { - .name = "auxclk1_ck", +static const struct clksel auxclk0_sel[] = { + { .parent = &auxclk0_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk0_ck = { + .name = "auxclk0_ck", + .parent = &auxclk0_src_ck, + .clksel = auxclk0_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK0, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk auxclk1_src_ck = { + .name = "auxclk1_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK1, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2807,12 +2844,29 @@ static struct clk auxclk1_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; -static struct clk auxclk2_ck = { - .name = "auxclk2_ck", +static const struct clksel auxclk1_sel[] = { + { .parent = &auxclk1_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk1_ck = { + .name = "auxclk1_ck", + .parent = &auxclk1_src_ck, + .clksel = auxclk1_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK1, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk auxclk2_src_ck = { + .name = "auxclk2_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK2, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2820,12 +2874,29 @@ static struct clk auxclk2_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; -static struct clk auxclk3_ck = { - .name = "auxclk3_ck", +static const struct clksel auxclk2_sel[] = { + { .parent = &auxclk2_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk2_ck = { + .name = "auxclk2_ck", + .parent = &auxclk2_src_ck, + .clksel = auxclk2_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK2, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk auxclk3_src_ck = { + .name = "auxclk3_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK3, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2833,12 +2904,29 @@ static struct clk auxclk3_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; -static struct clk auxclk4_ck = { - .name = "auxclk4_ck", +static const struct clksel auxclk3_sel[] = { + { .parent = &auxclk3_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk3_ck = { + .name = "auxclk3_ck", + .parent = &auxclk3_src_ck, + .clksel = auxclk3_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK3, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk auxclk4_src_ck = { + .name = "auxclk4_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK4, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2846,12 +2934,29 @@ static struct clk auxclk4_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; -static struct clk auxclk5_ck = { - .name = "auxclk5_ck", +static const struct clksel auxclk4_sel[] = { + { .parent = &auxclk4_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk4_ck = { + .name = "auxclk4_ck", + .parent = &auxclk4_src_ck, + .clksel = auxclk4_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK4, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + +static struct clk auxclk5_src_ck = { + .name = "auxclk5_src_ck", .parent = &sys_clkin_ck, .init = &omap2_init_clksel_parent, .ops = &clkops_omap2_dflt, - .clksel = auxclk_sel, + .clksel = auxclk_src_sel, .clksel_reg = OMAP4_SCRM_AUXCLK5, .clksel_mask = OMAP4_SRCSELECT_MASK, .recalc = &omap2_clksel_recalc, @@ -2859,6 +2964,23 @@ static struct clk auxclk5_ck = { .enable_bit = OMAP4_ENABLE_SHIFT, }; +static const struct clksel auxclk5_sel[] = { + { .parent = &auxclk5_src_ck, .rates = div16_1to16_rates }, + { .parent = NULL }, +}; + +static struct clk auxclk5_ck = { + .name = "auxclk5_ck", + .parent = &auxclk5_src_ck, + .clksel = auxclk5_sel, + .clksel_reg = OMAP4_SCRM_AUXCLK5, + .clksel_mask = OMAP4_CLKDIV_MASK, + .ops = &clkops_null, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate, +}; + static const struct clksel auxclkreq_sel[] = { { .parent = &auxclk0_ck, .rates = div_1_0_rates }, { .parent = &auxclk1_ck, .rates = div_1_1_rates }, @@ -3150,17 +3272,23 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), + CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_443X), CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), - CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), - CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), - CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), - CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), - CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), + CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_443X), + CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), + CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_443X), + CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), + CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_443X), + CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), + CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_443X), + CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), + CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), + CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), -- cgit v0.10.2 From a5322c6f3a3b0a81347c57de2f3a86b851b49bcf Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:29 -0600 Subject: OMAP4: hwmod data: Add clock domain attribute In OMAP PRCM terminology, the clock domain is defined as a group of IPs that share some clocks and most of the time an interface clock. Every IP does belong to a clockdomain. For the moment the clock domain attribute is affected to a clock node. The issue with that approach, is that a clock might or not belong to a clock domain. Moreover during module transition, it is up to a module to handle properly the clock domain state and not to a clock node. Create a clkdm_name attribute to provide this information per hwmod. Populate this attribute for every OMAP4 hwmod entries. Future cleanup series with remove that information from the OMAP4 clock when it is relevant. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak [paul@pwsan.com: fix the mpuss_clkdm name] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 66090f2..dccc651 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -565,7 +565,7 @@ static struct clockdomain ducati_44xx_clkdm = { }; static struct clockdomain mpu_44xx_clkdm = { - .name = "mpu_clkdm", + .name = "mpuss_clkdm", .pwrdm = { .name = "mpu_pwrdm" }, .prcm_partition = OMAP4430_CM1_PARTITION, .cm_inst = OMAP4430_CM1_MPU_INST, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 5d5df49..becae45 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -123,9 +123,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, - .mpu_irqs = omap44xx_dmm_irqs, + .clkdm_name = "l3_emif_clkdm", .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), + .mpu_irqs = omap44xx_dmm_irqs, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -173,6 +174,7 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = { static struct omap_hwmod omap44xx_emif_fw_hwmod = { .name = "emif_fw", .class = &omap44xx_emif_fw_hwmod_class, + .clkdm_name = "l3_emif_clkdm", .slaves = omap44xx_emif_fw_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -212,6 +214,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = { static struct omap_hwmod omap44xx_l3_instr_hwmod = { .name = "l3_instr", .class = &omap44xx_l3_hwmod_class, + .clkdm_name = "l3_instr_clkdm", .slaves = omap44xx_l3_instr_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -304,6 +307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, + .clkdm_name = "l3_1_clkdm", .mpu_irqs = omap44xx_l3_main_1_irqs, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), @@ -400,6 +404,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .name = "l3_main_2", .class = &omap44xx_l3_hwmod_class, + .clkdm_name = "l3_2_clkdm", .slaves = omap44xx_l3_main_2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -450,6 +455,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = { static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .name = "l3_main_3", .class = &omap44xx_l3_hwmod_class, + .clkdm_name = "l3_instr_clkdm", .slaves = omap44xx_l3_main_3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -507,6 +513,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = { static struct omap_hwmod omap44xx_l4_abe_hwmod = { .name = "l4_abe", .class = &omap44xx_l4_hwmod_class, + .clkdm_name = "abe_clkdm", .slaves = omap44xx_l4_abe_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -529,6 +536,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = { static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", .class = &omap44xx_l4_hwmod_class, + .clkdm_name = "l4_cfg_clkdm", .slaves = omap44xx_l4_cfg_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -551,6 +559,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = { static struct omap_hwmod omap44xx_l4_per_hwmod = { .name = "l4_per", .class = &omap44xx_l4_hwmod_class, + .clkdm_name = "l4_per_clkdm", .slaves = omap44xx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -573,6 +582,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = { static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .name = "l4_wkup", .class = &omap44xx_l4_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .slaves = omap44xx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -603,6 +613,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = { static struct omap_hwmod omap44xx_mpu_private_hwmod = { .name = "mpu_private", .class = &omap44xx_mpu_bus_hwmod_class, + .clkdm_name = "mpuss_clkdm", .slaves = omap44xx_mpu_private_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -741,6 +752,7 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = { static struct omap_hwmod omap44xx_aess_hwmod = { .name = "aess", .class = &omap44xx_aess_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, .main_clk = "aess_fck", @@ -773,6 +785,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { static struct omap_hwmod omap44xx_bandgap_hwmod = { .name = "bandgap", .class = &omap44xx_bandgap_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, @@ -830,6 +843,7 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = { static struct omap_hwmod omap44xx_counter_32k_hwmod = { .name = "counter_32k", .class = &omap44xx_counter_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .flags = HWMOD_SWSUP_SIDLE, .main_clk = "sys_32k_ck", .prcm = { @@ -913,6 +927,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = { static struct omap_hwmod omap44xx_dma_system_hwmod = { .name = "dma_system", .class = &omap44xx_dma_hwmod_class, + .clkdm_name = "l3_dma_clkdm", .mpu_irqs = omap44xx_dma_system_irqs, .main_clk = "l3_div_ck", .prcm = { @@ -1005,6 +1020,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = { static struct omap_hwmod omap44xx_dmic_hwmod = { .name = "dmic", .class = &omap44xx_dmic_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, .main_clk = "dmic_fck", @@ -1072,6 +1088,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = { static struct omap_hwmod omap44xx_dsp_c0_hwmod = { .name = "dsp_c0", .class = &omap44xx_dsp_hwmod_class, + .clkdm_name = "tesla_clkdm", .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_dsp_c0_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), @@ -1086,6 +1103,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { static struct omap_hwmod omap44xx_dsp_hwmod = { .name = "dsp", .class = &omap44xx_dsp_hwmod_class, + .clkdm_name = "tesla_clkdm", .mpu_irqs = omap44xx_dsp_irqs, .rst_lines = omap44xx_dsp_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), @@ -1177,6 +1195,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap44xx_dss_hwmod = { .name = "dss_core", .class = &omap44xx_dss_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .main_clk = "dss_dss_clk", .prcm = { .omap4 = { @@ -1278,7 +1297,7 @@ static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, + .clkdm_name = "l3_dss_clkdm", .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .main_clk = "dss_dss_clk", @@ -1376,6 +1395,7 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, .main_clk = "dss_dss_clk", @@ -1452,6 +1472,7 @@ static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, .main_clk = "dss_dss_clk", @@ -1548,6 +1569,7 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .main_clk = "dss_dss_clk", @@ -1639,6 +1661,7 @@ static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, .main_clk = "dss_dss_clk", .prcm = { @@ -1709,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { static struct omap_hwmod omap44xx_dss_venc_hwmod = { .name = "dss_venc", .class = &omap44xx_venc_hwmod_class, + .clkdm_name = "l3_dss_clkdm", .main_clk = "dss_dss_clk", .prcm = { .omap4 = { @@ -1786,6 +1810,7 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { static struct omap_hwmod omap44xx_gpio1_hwmod = { .name = "gpio1", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = omap44xx_gpio1_irqs, .main_clk = "gpio1_ick", .prcm = { @@ -1838,6 +1863,7 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { static struct omap_hwmod omap44xx_gpio2_hwmod = { .name = "gpio2", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio2_irqs, .main_clk = "gpio2_ick", @@ -1891,6 +1917,7 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { static struct omap_hwmod omap44xx_gpio3_hwmod = { .name = "gpio3", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio3_irqs, .main_clk = "gpio3_ick", @@ -1944,6 +1971,7 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { static struct omap_hwmod omap44xx_gpio4_hwmod = { .name = "gpio4", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio4_irqs, .main_clk = "gpio4_ick", @@ -1997,6 +2025,7 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { static struct omap_hwmod omap44xx_gpio5_hwmod = { .name = "gpio5", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio5_irqs, .main_clk = "gpio5_ick", @@ -2050,6 +2079,7 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { static struct omap_hwmod omap44xx_gpio6_hwmod = { .name = "gpio6", .class = &omap44xx_gpio_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio6_irqs, .main_clk = "gpio6_ick", @@ -2129,6 +2159,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = { static struct omap_hwmod omap44xx_hsi_hwmod = { .name = "hsi", .class = &omap44xx_hsi_hwmod_class, + .clkdm_name = "l3_init_clkdm", .mpu_irqs = omap44xx_hsi_irqs, .main_clk = "hsi_fck", .prcm = { @@ -2209,6 +2240,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, @@ -2263,6 +2295,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, @@ -2317,6 +2350,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, @@ -2371,6 +2405,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, @@ -2435,6 +2470,7 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = { static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .name = "ipu_c0", .class = &omap44xx_ipu_hwmod_class, + .clkdm_name = "ducati_clkdm", .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c0_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), @@ -2450,6 +2486,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .name = "ipu_c1", .class = &omap44xx_ipu_hwmod_class, + .clkdm_name = "ducati_clkdm", .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_ipu_c1_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), @@ -2464,6 +2501,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { static struct omap_hwmod omap44xx_ipu_hwmod = { .name = "ipu", .class = &omap44xx_ipu_hwmod_class, + .clkdm_name = "ducati_clkdm", .mpu_irqs = omap44xx_ipu_irqs, .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), @@ -2551,6 +2589,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = { static struct omap_hwmod omap44xx_iss_hwmod = { .name = "iss", .class = &omap44xx_iss_hwmod_class, + .clkdm_name = "iss_clkdm", .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, .main_clk = "iss_fck", @@ -2631,6 +2670,7 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = { static struct omap_hwmod omap44xx_iva_seq0_hwmod = { .name = "iva_seq0", .class = &omap44xx_iva_hwmod_class, + .clkdm_name = "ivahd_clkdm", .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_iva_seq0_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), @@ -2646,6 +2686,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { static struct omap_hwmod omap44xx_iva_seq1_hwmod = { .name = "iva_seq1", .class = &omap44xx_iva_hwmod_class, + .clkdm_name = "ivahd_clkdm", .flags = HWMOD_INIT_NO_RESET, .rst_lines = omap44xx_iva_seq1_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), @@ -2660,6 +2701,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { static struct omap_hwmod omap44xx_iva_hwmod = { .name = "iva", .class = &omap44xx_iva_hwmod_class, + .clkdm_name = "ivahd_clkdm", .mpu_irqs = omap44xx_iva_irqs, .rst_lines = omap44xx_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), @@ -2732,6 +2774,7 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = { static struct omap_hwmod omap44xx_kbd_hwmod = { .name = "kbd", .class = &omap44xx_kbd_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = omap44xx_kbd_irqs, .main_clk = "kbd_fck", .prcm = { @@ -2797,6 +2840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = { static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, + .clkdm_name = "l4_cfg_clkdm", .mpu_irqs = omap44xx_mailbox_irqs, .prcm = { .omap4 = { @@ -2887,6 +2931,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap44xx_mcbsp_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_mcbsp1_irqs, .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", @@ -2960,6 +3005,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap44xx_mcbsp_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_mcbsp2_irqs, .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", @@ -3033,6 +3079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap44xx_mcbsp_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_mcbsp3_irqs, .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, .main_clk = "mcbsp3_fck", @@ -3085,6 +3132,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap44xx_mcbsp_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mcbsp4_irqs, .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, .main_clk = "mcbsp4_fck", @@ -3177,6 +3225,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = { static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .main_clk = "mcpdm_fck", @@ -3262,6 +3311,7 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = { static struct omap_hwmod omap44xx_mcspi1_hwmod = { .name = "mcspi1", .class = &omap44xx_mcspi_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mcspi1_irqs, .sdma_reqs = omap44xx_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", @@ -3322,6 +3372,7 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = { static struct omap_hwmod omap44xx_mcspi2_hwmod = { .name = "mcspi2", .class = &omap44xx_mcspi_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mcspi2_irqs, .sdma_reqs = omap44xx_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", @@ -3382,6 +3433,7 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = { static struct omap_hwmod omap44xx_mcspi3_hwmod = { .name = "mcspi3", .class = &omap44xx_mcspi_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mcspi3_irqs, .sdma_reqs = omap44xx_mcspi3_sdma_reqs, .main_clk = "mcspi3_fck", @@ -3440,6 +3492,7 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = { static struct omap_hwmod omap44xx_mcspi4_hwmod = { .name = "mcspi4", .class = &omap44xx_mcspi_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mcspi4_irqs, .sdma_reqs = omap44xx_mcspi4_sdma_reqs, .main_clk = "mcspi4_fck", @@ -3524,6 +3577,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { static struct omap_hwmod omap44xx_mmc1_hwmod = { .name = "mmc1", .class = &omap44xx_mmc_hwmod_class, + .clkdm_name = "l3_init_clkdm", .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, .main_clk = "mmc1_fck", @@ -3583,6 +3637,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = { static struct omap_hwmod omap44xx_mmc2_hwmod = { .name = "mmc2", .class = &omap44xx_mmc_hwmod_class, + .clkdm_name = "l3_init_clkdm", .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, .main_clk = "mmc2_fck", @@ -3637,6 +3692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = { static struct omap_hwmod omap44xx_mmc3_hwmod = { .name = "mmc3", .class = &omap44xx_mmc_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, .main_clk = "mmc3_fck", @@ -3689,6 +3745,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = { static struct omap_hwmod omap44xx_mmc4_hwmod = { .name = "mmc4", .class = &omap44xx_mmc_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mmc4_irqs, .sdma_reqs = omap44xx_mmc4_sdma_reqs, @@ -3742,6 +3799,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = { static struct omap_hwmod omap44xx_mmc5_hwmod = { .name = "mmc5", .class = &omap44xx_mmc_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, .main_clk = "mmc5_fck", @@ -3782,6 +3840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { static struct omap_hwmod omap44xx_mpu_hwmod = { .name = "mpu", .class = &omap44xx_mpu_hwmod_class, + .clkdm_name = "mpuss_clkdm", .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_mpu_irqs, .main_clk = "dpll_mpu_m2_ck", @@ -3854,6 +3913,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = { static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .name = "smartreflex_core", .class = &omap44xx_smartreflex_hwmod_class, + .clkdm_name = "l4_ao_clkdm", .mpu_irqs = omap44xx_smartreflex_core_irqs, .main_clk = "smartreflex_core_fck", @@ -3901,6 +3961,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = { static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .name = "smartreflex_iva", .class = &omap44xx_smartreflex_hwmod_class, + .clkdm_name = "l4_ao_clkdm", .mpu_irqs = omap44xx_smartreflex_iva_irqs, .main_clk = "smartreflex_iva_fck", .vdd_name = "iva", @@ -3947,6 +4008,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = { static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .name = "smartreflex_mpu", .class = &omap44xx_smartreflex_hwmod_class, + .clkdm_name = "l4_ao_clkdm", .mpu_irqs = omap44xx_smartreflex_mpu_irqs, .main_clk = "smartreflex_mpu_fck", .vdd_name = "mpu", @@ -4011,6 +4073,7 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = { static struct omap_hwmod omap44xx_spinlock_hwmod = { .name = "spinlock", .class = &omap44xx_spinlock_hwmod_class, + .clkdm_name = "l4_cfg_clkdm", .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, @@ -4092,6 +4155,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = { static struct omap_hwmod omap44xx_timer1_hwmod = { .name = "timer1", .class = &omap44xx_timer_1ms_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = omap44xx_timer1_irqs, .main_clk = "timer1_fck", .prcm = { @@ -4137,6 +4201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = { static struct omap_hwmod omap44xx_timer2_hwmod = { .name = "timer2", .class = &omap44xx_timer_1ms_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer2_irqs, .main_clk = "timer2_fck", .prcm = { @@ -4182,6 +4247,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = { static struct omap_hwmod omap44xx_timer3_hwmod = { .name = "timer3", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer3_irqs, .main_clk = "timer3_fck", .prcm = { @@ -4227,6 +4293,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = { static struct omap_hwmod omap44xx_timer4_hwmod = { .name = "timer4", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer4_irqs, .main_clk = "timer4_fck", .prcm = { @@ -4291,6 +4358,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = { static struct omap_hwmod omap44xx_timer5_hwmod = { .name = "timer5", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_timer5_irqs, .main_clk = "timer5_fck", .prcm = { @@ -4355,6 +4423,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = { static struct omap_hwmod omap44xx_timer6_hwmod = { .name = "timer6", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_timer6_irqs, .main_clk = "timer6_fck", @@ -4420,6 +4489,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = { static struct omap_hwmod omap44xx_timer7_hwmod = { .name = "timer7", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_timer7_irqs, .main_clk = "timer7_fck", .prcm = { @@ -4484,6 +4554,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = { static struct omap_hwmod omap44xx_timer8_hwmod = { .name = "timer8", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_timer8_irqs, .main_clk = "timer8_fck", .prcm = { @@ -4529,6 +4600,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = { static struct omap_hwmod omap44xx_timer9_hwmod = { .name = "timer9", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer9_irqs, .main_clk = "timer9_fck", .prcm = { @@ -4574,6 +4646,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = { static struct omap_hwmod omap44xx_timer10_hwmod = { .name = "timer10", .class = &omap44xx_timer_1ms_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer10_irqs, .main_clk = "timer10_fck", .prcm = { @@ -4619,6 +4692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = { static struct omap_hwmod omap44xx_timer11_hwmod = { .name = "timer11", .class = &omap44xx_timer_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_timer11_irqs, .main_clk = "timer11_fck", .prcm = { @@ -4692,6 +4766,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = { static struct omap_hwmod omap44xx_uart1_hwmod = { .name = "uart1", .class = &omap44xx_uart_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_uart1_irqs, .sdma_reqs = omap44xx_uart1_sdma_reqs, .main_clk = "uart1_fck", @@ -4744,6 +4819,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = { static struct omap_hwmod omap44xx_uart2_hwmod = { .name = "uart2", .class = &omap44xx_uart_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_uart2_irqs, .sdma_reqs = omap44xx_uart2_sdma_reqs, .main_clk = "uart2_fck", @@ -4796,6 +4872,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { static struct omap_hwmod omap44xx_uart3_hwmod = { .name = "uart3", .class = &omap44xx_uart_hwmod_class, + .clkdm_name = "l4_per_clkdm", .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, @@ -4849,6 +4926,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = { static struct omap_hwmod omap44xx_uart4_hwmod = { .name = "uart4", .class = &omap44xx_uart_hwmod_class, + .clkdm_name = "l4_per_clkdm", .mpu_irqs = omap44xx_uart4_irqs, .sdma_reqs = omap44xx_uart4_sdma_reqs, .main_clk = "uart4_fck", @@ -4927,6 +5005,7 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .name = "usb_otg_hs", .class = &omap44xx_usb_otg_hs_hwmod_class, + .clkdm_name = "l3_init_clkdm", .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .mpu_irqs = omap44xx_usb_otg_hs_irqs, .main_clk = "usb_otg_hs_ick", @@ -5000,6 +5079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = { static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap44xx_wd_timer_hwmod_class, + .clkdm_name = "l4_wkup_clkdm", .mpu_irqs = omap44xx_wd_timer2_irqs, .main_clk = "wd_timer2_fck", .prcm = { @@ -5064,6 +5144,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = { static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .name = "wd_timer3", .class = &omap44xx_wd_timer_hwmod_class, + .clkdm_name = "abe_clkdm", .mpu_irqs = omap44xx_wd_timer3_irqs, .main_clk = "wd_timer3_fck", .prcm = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index fafdfe3..21d3922 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -515,6 +515,7 @@ struct omap_hwmod { const char *main_clk; struct clk *_clk; struct omap_hwmod_opt_clk *opt_clks; + char *clkdm_name; char *vdd_name; struct voltagedomain *voltdm; struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ -- cgit v0.10.2 From 6ae769973adf1325115d0dfe3fec17e26cbacd81 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP2+: hwmod: Init clkdm field at boot time At boot time, lookup the clkdm_name to get the clkdm structure pointer for further usage. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 02b6016..1f6f47f 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -990,9 +990,40 @@ static struct omap_hwmod *_lookup(const char *name) return oh; } +/** + * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod + * @oh: struct omap_hwmod * + * + * Convert a clockdomain name stored in a struct omap_hwmod into a + * clockdomain pointer, and save it into the struct omap_hwmod. + * return -EINVAL if clkdm_name does not exist or if the lookup failed. + */ +static int _init_clkdm(struct omap_hwmod *oh) +{ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return 0; + + if (!oh->clkdm_name) { + pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); + return -EINVAL; + } + + oh->clkdm = clkdm_lookup(oh->clkdm_name); + if (!oh->clkdm) { + pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", + oh->name, oh->clkdm_name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: associated to clkdm %s\n", + oh->name, oh->clkdm_name); + + return 0; +} /** - * _init_clocks - clk_get() all clocks associated with this hwmod + * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as + * well the clockdomain. * @oh: struct omap_hwmod * * @data: not used; pass NULL * @@ -1012,6 +1043,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) ret |= _init_main_clk(oh); ret |= _init_interface_clks(oh); ret |= _init_opt_clks(oh); + ret |= _init_clkdm(oh); if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 21d3922..3306bdf 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -516,6 +516,7 @@ struct omap_hwmod { struct clk *_clk; struct omap_hwmod_opt_clk *opt_clks; char *clkdm_name; + struct clockdomain *clkdm; char *vdd_name; struct voltagedomain *voltdm; struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ -- cgit v0.10.2 From d0f0631ddc61026dca71b5b679803000d70fde50 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros The CLKCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of a offset will allow future improvement like migration from the current architecture code toward a module driver. Update cm_xxx accessor, move definition to the proper header file and update copyrights. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Todd Poynor [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty fn prototype section from cm44xx.h; incorporated comments from Todd; documented some functions] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index 0b87ec8..3380bee 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -1,7 +1,7 @@ /* * OMAP4 Clock Management (CM) definitions * - * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2011 Texas Instruments, Inc. * Copyright (C) 2007-2009 Nokia Corporation * * Written by Paul Walmsley @@ -23,10 +23,4 @@ #define OMAP4_CM_CLKSTCTRL 0x0000 #define OMAP4_CM_STATICDEP 0x0004 -/* Function prototypes */ -# ifndef __ASSEMBLER__ - -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); - -# endif #endif diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index a482bfa..9033dd4 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -2,6 +2,7 @@ * OMAP4 CM instance functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -32,6 +33,22 @@ #include "prm44xx.h" #include "prcm_mpu44xx.h" +/* + * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: + * + * 0x0 func: Module is fully functional, including OCP + * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep + * abortion + * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if + * using separate functional clock + * 0x3 disabled: Module is disabled and cannot be accessed + * + */ +#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 +#define CLKCTRL_IDLEST_INTRANSITION 0x1 +#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 +#define CLKCTRL_IDLEST_DISABLED 0x3 + static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { [OMAP4430_INVALID_PRCM_PARTITION] = 0, [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, @@ -41,6 +58,48 @@ static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, }; +/* Private functions */ + +/** + * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to + * bit 0. + */ +static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); + v &= OMAP4430_IDLEST_MASK; + v >>= OMAP4430_IDLEST_SHIFT; + return v; +} + +/** + * _is_module_ready - can module registers be accessed without causing an abort? + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either + * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. + */ +static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + u32 v; + + v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); + + return (v == CLKCTRL_IDLEST_FUNCTIONAL || + v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; +} + +/* Public functions */ + /* Read a register in a CM instance */ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) { @@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs) */ /** - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state - * @clkctrl_reg: CLKCTRL module address + * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) * * Wait for the module IDLEST to be functional. If the idle state is in any * the non functional state (trans, idle or disabled), module and thus the * sysconfig cannot be accessed and will probably lead to an "imprecise * external abort" - * - * Module idle state: - * 0x0 func: Module is fully functional, including OCP - * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep - * abortion - * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if - * using separate functional clock - * 0x3 disabled: Module is disabled and cannot be accessed - * */ -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg) +int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) { int i = 0; - if (!clkctrl_reg) + if (!clkctrl_offs) return 0; - omap_test_timeout(( - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) || - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >> - OMAP4430_IDLEST_SHIFT) == 0x2)), - MAX_MODULE_READY_TIME, i); + omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), + MAX_MODULE_READY_TIME, i); return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index 2b32c18..8eba2ae 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); +extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); + /* * In an ideal world, we would not export these low-level functions, * but this will probably take some time to fix properly @@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask); -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); - #endif diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1f6f47f..00241ea 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -146,7 +146,7 @@ #include #include "cm2xxx_3xxx.h" -#include "cm44xx.h" +#include "cminst44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "mux.h" @@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) * Wait for a module @oh to leave slave idle. Returns 0 if the module * does not have an IDLEST bit or if the module successfully leaves * slave idle; otherwise, pass along the return value of the - * appropriate *_cm_wait_module_ready() function. + * appropriate *_cm*_wait_module_ready() function. */ static int _wait_target_ready(struct omap_hwmod *oh) { @@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct omap_hwmod *oh) oh->prcm.omap2.idlest_reg_id, oh->prcm.omap2.idlest_idle_bit); } else if (cpu_is_omap44xx()) { - ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg); + if (!oh->clkdm) + return -EINVAL; + + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); } else { BUG(); }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index becae45..00d7130 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -124,6 +124,11 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, .clkdm_name = "l3_emif_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, @@ -175,6 +180,11 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { .name = "emif_fw", .class = &omap44xx_emif_fw_hwmod_class, .clkdm_name = "l3_emif_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_emif_fw_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -215,6 +225,11 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .name = "l3_instr", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_instr_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_instr_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -309,6 +324,11 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_1_clkdm", .mpu_irqs = omap44xx_l3_main_1_irqs, + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -405,6 +425,11 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .name = "l3_main_2", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_2_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -456,6 +481,11 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .name = "l3_main_3", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_instr_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -514,6 +544,11 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { .name = "l4_abe", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "abe_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_abe_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -537,6 +572,11 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_cfg_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -560,6 +600,11 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .name = "l4_per", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_per_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -583,6 +628,11 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .name = "l4_wkup", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_wkup_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .main_clk = "aess_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_aess_slaves, @@ -788,7 +838,7 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = { .clkdm_name = "l4_wkup_clkdm", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, }, }, .opt_clks = bandgap_opt_clks, @@ -848,7 +898,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .main_clk = "sys_32k_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_counter_32k_slaves, @@ -932,7 +982,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .main_clk = "l3_div_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, }, }, .dev_attr = &dma_dev_attr, @@ -1026,7 +1076,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .main_clk = "dmic_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_dmic_slaves, @@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .main_clk = "dsp_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, }, }, @@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_opt_clks, @@ -1303,7 +1353,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dispc_opt_clks, @@ -1401,7 +1451,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dsi1_opt_clks, @@ -1478,7 +1528,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dsi2_opt_clks, @@ -1575,7 +1625,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_hdmi_opt_clks, @@ -1666,7 +1716,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_rfbi_opt_clks, @@ -1736,7 +1786,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_dss_venc_slaves, @@ -1815,7 +1865,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .main_clk = "gpio1_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, }, }, .opt_clks = gpio1_opt_clks, @@ -1869,7 +1919,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .main_clk = "gpio2_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, }, }, .opt_clks = gpio2_opt_clks, @@ -1923,7 +1973,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .main_clk = "gpio3_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, }, }, .opt_clks = gpio3_opt_clks, @@ -1977,7 +2027,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .main_clk = "gpio4_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, }, }, .opt_clks = gpio4_opt_clks, @@ -2031,7 +2081,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .main_clk = "gpio5_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, }, }, .opt_clks = gpio5_opt_clks, @@ -2085,7 +2135,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .main_clk = "gpio6_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, }, }, .opt_clks = gpio6_opt_clks, @@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .main_clk = "hsi_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_hsi_slaves, @@ -2247,7 +2297,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .main_clk = "i2c1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c1_slaves, @@ -2302,7 +2352,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .main_clk = "i2c2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c2_slaves, @@ -2357,7 +2407,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .main_clk = "i2c3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c3_slaves, @@ -2412,7 +2462,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .main_clk = "i2c4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c4_slaves, @@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .main_clk = "ipu_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, }, @@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .main_clk = "iss_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, }, }, .opt_clks = iss_opt_clks, @@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .main_clk = "iva_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, + .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, }, }, @@ -2779,7 +2829,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .main_clk = "kbd_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_kbd_slaves, @@ -2844,7 +2894,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .mpu_irqs = omap44xx_mailbox_irqs, .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mailbox_slaves, @@ -2937,7 +2987,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .main_clk = "mcbsp1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp1_slaves, @@ -3011,7 +3061,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .main_clk = "mcbsp2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp2_slaves, @@ -3085,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .main_clk = "mcbsp3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp3_slaves, @@ -3138,7 +3188,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .main_clk = "mcbsp4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp4_slaves, @@ -3231,7 +3281,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .main_clk = "mcpdm_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcpdm_slaves, @@ -3317,7 +3367,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .main_clk = "mcspi1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi1_dev_attr, @@ -3378,7 +3428,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .main_clk = "mcspi2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi2_dev_attr, @@ -3439,7 +3489,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .main_clk = "mcspi3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi3_dev_attr, @@ -3498,7 +3548,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .main_clk = "mcspi4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi4_dev_attr, @@ -3583,7 +3633,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .main_clk = "mmc1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, }, }, .dev_attr = &mmc1_dev_attr, @@ -3643,7 +3693,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .main_clk = "mmc2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc2_slaves, @@ -3698,7 +3748,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .main_clk = "mmc3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc3_slaves, @@ -3752,7 +3802,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .main_clk = "mmc4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc4_slaves, @@ -3805,7 +3855,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .main_clk = "mmc5_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc5_slaves, @@ -3846,7 +3896,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .main_clk = "dpll_mpu_m2_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, + .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, }, }, .masters = omap44xx_mpu_masters, @@ -3920,7 +3970,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .vdd_name = "core", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_core_slaves, @@ -3967,7 +4017,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .vdd_name = "iva", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_iva_slaves, @@ -4014,7 +4064,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .vdd_name = "mpu", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_mpu_slaves, @@ -4076,7 +4126,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { .clkdm_name = "l4_cfg_clkdm", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_spinlock_slaves, @@ -4160,7 +4210,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .main_clk = "timer1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer1_slaves, @@ -4206,7 +4256,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .main_clk = "timer2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer2_slaves, @@ -4252,7 +4302,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .main_clk = "timer3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer3_slaves, @@ -4298,7 +4348,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .main_clk = "timer4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer4_slaves, @@ -4363,7 +4413,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .main_clk = "timer5_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer5_slaves, @@ -4429,7 +4479,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .main_clk = "timer6_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer6_slaves, @@ -4494,7 +4544,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .main_clk = "timer7_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer7_slaves, @@ -4559,7 +4609,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .main_clk = "timer8_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer8_slaves, @@ -4605,7 +4655,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .main_clk = "timer9_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer9_slaves, @@ -4651,7 +4701,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .main_clk = "timer10_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer10_slaves, @@ -4697,7 +4747,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .main_clk = "timer11_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer11_slaves, @@ -4772,7 +4822,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .main_clk = "uart1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart1_slaves, @@ -4825,7 +4875,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .main_clk = "uart2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart2_slaves, @@ -4879,7 +4929,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .main_clk = "uart3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart3_slaves, @@ -4932,7 +4982,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .main_clk = "uart4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart4_slaves, @@ -5011,7 +5061,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .main_clk = "usb_otg_hs_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, }, }, .opt_clks = usb_otg_hs_opt_clks, @@ -5084,7 +5134,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .main_clk = "wd_timer2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_wd_timer2_slaves, @@ -5149,7 +5199,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .main_clk = "wd_timer3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_wd_timer3_slaves, diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 3306bdf..fc54355 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm { * @submodule_wkdep_bit: bit shift of the WKDEP range */ struct omap_hwmod_omap4_prcm { - void __iomem *clkctrl_reg; + u16 clkctrl_offs; void __iomem *rstctrl_reg; u8 submodule_wkdep_bit; }; -- cgit v0.10.2 From 11b10341bd12c87a8409c69cdcd7ee898400842f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP: hwmod: Wait the idle status to be disabled It is mandatory to wait for a module to be in disabled state before potentially disabling source clock or re-asserting a reset. omap_hwmod_idle and omap_hwmod_shutdown does not wait for the module to be fully idle. Add a cm_xxx accessor to wait the clkctrl idle status to be disabled. Fix hwmod_[idle|shutdown] to use this API. Based on Rajendra's initial patch. Please note that most interconnects hwmod will return one timeout because it is impossible for them to be in idle since the processor is accessing the registers though the interconnect. Signed-off-by: Benoit Cousson Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Cc: Todd Poynor [paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable(); incorporate some feedback from Todd] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 9033dd4..0fe3f14 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -284,3 +284,28 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } +/** + * omap4_cminst_wait_module_idle - wait for a module to be in 'disabled' + * state + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Wait for the module IDLEST to be disabled. Some PRCM transition, + * like reset assertion or parent clock de-activation must wait the + * module to be fully disabled. + */ +int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + int i = 0; + + if (!clkctrl_offs) + return 0; + + omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == + CLKCTRL_IDLEST_DISABLED), + MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index 8eba2ae..a985400 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); +extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); /* * In an ideal world, we would not export these low-level functions, diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 00241ea..d21f49b 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1102,6 +1102,36 @@ static int _wait_target_ready(struct omap_hwmod *oh) } /** + * _wait_target_disable - wait for a module to be disabled + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to enter slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully enters + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_idle() function. + */ +static int _wait_target_disable(struct omap_hwmod *oh) +{ + /* TODO: For now just handle OMAP4+ */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return 0; + + if (!oh) + return -EINVAL; + + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) + return 0; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + +/** * _lookup_hardreset - fill register bit info for this hwmod/reset line * @oh: struct omap_hwmod * * @name: name of the reset line in the context of this hwmod @@ -1410,6 +1440,8 @@ static int _enable(struct omap_hwmod *oh) */ static int _idle(struct omap_hwmod *oh) { + int ret; + pr_debug("omap_hwmod: %s: idling\n", oh->name); if (oh->_state != _HWMOD_STATE_ENABLED) { @@ -1422,6 +1454,10 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); _disable_clocks(oh); + ret = _wait_target_disable(oh); + if (ret) + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", + oh->name); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1514,6 +1550,10 @@ static int _shutdown(struct omap_hwmod *oh) _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ _disable_clocks(oh); + ret = _wait_target_disable(oh); + if (ret) + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", + oh->name); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v0.10.2 From eaac329dfa6d3a4025242bf34d33aa3cb9df9f9f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:31 -0600 Subject: OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros The RSTCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of an offset will allow future improvement like migration from the current architecture code toward a module driver. Update prm_xxx accessors, move definition to the proper header file and update copyrights. Change the s16 register offset parameter to u16. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak [paul@pwsan.com: use '_prminst_' in function names that are part of the prminst44xx.c file] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d21f49b..a0f7d31 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -149,6 +149,7 @@ #include "cminst44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include "prminst44xx.h" #include "mux.h" /* Maximum microseconds to wait for OMAP module to softreset */ @@ -1187,8 +1188,10 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, ohri.rst_shift); else if (cpu_is_omap44xx()) - return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + return omap4_prminst_assert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); else return -EINVAL; } @@ -1223,8 +1226,10 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) if (ohri.st_shift) pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", oh->name, name); - ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); } else { return -EINVAL; } @@ -1259,8 +1264,10 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, ohri.st_shift); } else if (cpu_is_omap44xx()) { - return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); } else { return -EINVAL; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 00d7130..6a190f5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1144,7 +1144,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1161,7 +1161,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_dsp_slaves, @@ -2526,7 +2526,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2542,7 +2542,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2559,7 +2559,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_ipu_slaves, @@ -2726,7 +2726,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2742,7 +2742,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2759,7 +2759,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_iva_slaves, diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a2a04bfa..faec860 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,7 +1,7 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley @@ -24,12 +24,6 @@ #include "prm44xx.h" #include "prm-regbits-44xx.h" -/* - * Address offset (in bytes) between the reset control and the reset - * status registers: 4 bytes on OMAP4 - */ -#define OMAP4_RST_CTRL_ST_OFFSET 4 - /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -94,91 +88,6 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); } -/** - * omap4_prm_is_hardreset_asserted - read the HW reset line state of - * submodules contained in the hwmod module - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to check - * - * Returns 1 if the (sub)module hardreset line is currently asserted, - * 0 if the (sub)module hardreset line is not currently asserted, or - * -EINVAL upon parameter error. - */ -int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift) -{ - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - return omap4_prm_read_bits_shift(rstctrl_reg, (1 << shift)); -} - -/** - * omap4_prm_assert_hardreset - assert the HW reset line of a submodule - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to assert - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * place the submodule into reset. Returns 0 upon success or -EINVAL - * upon an argument error. - */ -int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift) -{ - u32 mask; - - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - mask = 1 << shift; - omap4_prm_rmw_reg_bits(mask, mask, rstctrl_reg); - - return 0; -} - -/** - * omap4_prm_deassert_hardreset - deassert a submodule hardreset line and wait - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to deassert - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * take the submodule out of reset and wait until the PRCM indicates - * that the reset has completed before returning. Returns 0 upon success or - * -EINVAL upon an argument error, -EEXIST if the submodule was already out - * of reset, or -EBUSY if the submodule did not exit reset promptly. - */ -int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) -{ - u32 mask; - void __iomem *rstst_reg; - int c; - - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - rstst_reg = rstctrl_reg + OMAP4_RST_CTRL_ST_OFFSET; - - mask = 1 << shift; - - /* Check the current status to avoid de-asserting the line twice */ - if (omap4_prm_read_bits_shift(rstctrl_reg, mask) == 0) - return -EEXIST; - - /* Clear the reset status by writing 1 to the status bit */ - omap4_prm_rmw_reg_bits(0xffffffff, mask, rstst_reg); - /* de-assert the reset control line */ - omap4_prm_rmw_reg_bits(mask, 0, rstctrl_reg); - /* wait the status to be set */ - omap_test_timeout(omap4_prm_read_bits_shift(rstst_reg, mask), - MAX_MODULE_HARDRESET_WAIT, c); - - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; -} - void omap4_prm_global_warm_sw_reset(void) { u32 v; diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 6e53120..3732e02 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -755,10 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); -extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); -extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); -extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); - extern void omap4_prm_global_warm_sw_reset(void); # endif diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index a303242..35e02aa 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -2,6 +2,7 @@ * OMAP4 PRM instance functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -53,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) /* Read-modify-write a register in PRM. Caller must lock */ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, - s16 idx) + u16 idx) { u32 v; @@ -64,3 +65,93 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, return v; } + +/* + * Address offset (in bytes) between the reset control and the reset + * status registers: 4 bytes on OMAP4 + */ +#define OMAP4_RST_CTRL_ST_OFFSET 4 + +/** + * omap4_prminst_is_hardreset_asserted - read the HW reset line state of + * submodules contained in the hwmod module + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to check + * + * Returns 1 if the (sub)module hardreset line is currently asserted, + * 0 if the (sub)module hardreset line is not currently asserted, or + * -EINVAL upon parameter error. + */ +int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); + v &= 1 << shift; + v >>= shift; + + return v; +} + +/** + * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to assert + * + * Some IPs like dsp, ipu or iva contain processors that require an HW + * reset line to be asserted / deasserted in order to fully enable the + * IP. These modules may have multiple hard-reset lines that reset + * different 'submodules' inside the IP block. This function will + * place the submodule into reset. Returns 0 upon success or -EINVAL + * upon an argument error. + */ +int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + u32 mask = 1 << shift; + + omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); + + return 0; +} + +/** + * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and + * wait + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to deassert + * + * Some IPs like dsp, ipu or iva contain processors that require an HW + * reset line to be asserted / deasserted in order to fully enable the + * IP. These modules may have multiple hard-reset lines that reset + * different 'submodules' inside the IP block. This function will + * take the submodule out of reset and wait until the PRCM indicates + * that the reset has completed before returning. Returns 0 upon success or + * -EINVAL upon an argument error, -EEXIST if the submodule was already out + * of reset, or -EBUSY if the submodule did not exit reset promptly. + */ +int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + int c; + u32 mask = 1 << shift; + u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET; + + /* Check the current status to avoid de-asserting the line twice */ + if (omap4_prminst_is_hardreset_asserted(shift, part, inst, + rstctrl_offs) == 0) + return -EEXIST; + + /* Clear the reset status by writing 1 to the status bit */ + omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst, + rstst_offs); + /* de-assert the reset control line */ + omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); + /* wait the status to be set */ + omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst, + rstst_offs), + MAX_MODULE_HARDRESET_WAIT, c); + + return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; +} diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index 02dd66d..c14ae29 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -2,6 +2,7 @@ * OMAP4 Power/Reset Management (PRM) function prototypes * * Copyright (C) 2010 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -18,8 +19,15 @@ extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx); extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, - s16 inst, s16 idx); + s16 inst, u16 idx); extern void omap4_prm_global_warm_sw_reset(void); +extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); + #endif diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index fc54355..9ef4424 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -2,6 +2,7 @@ * omap_hwmod macros, structures * * Copyright (C) 2009-2011 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * Created in collaboration with (alphabetical order): Benoît Cousson, @@ -361,7 +362,7 @@ struct omap_hwmod_omap2_prcm { */ struct omap_hwmod_omap4_prcm { u16 clkctrl_offs; - void __iomem *rstctrl_reg; + u16 rstctrl_offs; u8 submodule_wkdep_bit; }; -- cgit v0.10.2 From e54433f10d67f8e2cf786e8173281f1caeda1959 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:31 -0600 Subject: OMAP4: prm: Replace warm reset API with the offset based version The warm reset function was still using the obsolete API. Replace it by the new one and move the file to the proper c file. Change the function names to stick to the file convention as suggested by Paul Walmsley : prm_xxx -> prminst_xxx Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 6be1438..2e40a5c 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -70,7 +70,7 @@ static void omap_prcm_arch_reset(char mode, const char *cmd) prcm_offs = OMAP3430_GR_MOD; omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); } else if (cpu_is_omap44xx()) { - omap4_prm_global_warm_sw_reset(); /* never returns */ + omap4_prminst_global_warm_sw_reset(); /* never returns */ } else { WARN_ON(1); } diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index faec860..f815329 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) { return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); } - -void omap4_prm_global_warm_sw_reset(void) -{ - u32 v; - - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, - OMAP4_RM_RSTCTRL); - v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; - omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST, - OMAP4_RM_RSTCTRL); - - /* OCP barrier */ - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, - OMAP4_RM_RSTCTRL); -} diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 3732e02..725a6a8 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -755,8 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); -extern void omap4_prm_global_warm_sw_reset(void); - # endif #endif diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 35e02aa..3a7bab1 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -155,3 +155,22 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + + +void omap4_prminst_global_warm_sw_reset(void) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, + OMAP4_PRM_RSTCTRL_OFFSET); + v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; + omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, + OMAP4_PRM_RSTCTRL_OFFSET); + + /* OCP barrier */ + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, + OMAP4_PRM_RSTCTRL_OFFSET); +} diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index c14ae29..46f2efb 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -21,13 +21,13 @@ extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, u16 idx); -extern void omap4_prm_global_warm_sw_reset(void); +extern void omap4_prminst_global_warm_sw_reset(void); extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, - u16 rstctrl_offs); + u16 rstctrl_offs); extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, - u16 rstctrl_offs); + u16 rstctrl_offs); extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, - u16 rstctrl_offs); + u16 rstctrl_offs); #endif -- cgit v0.10.2 From ad53ebb725b5c8dce529cb8cb172d5e8c9bb7bda Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:31 -0600 Subject: OMAP4: prm: Remove deprecated functions The new prminst_xxx accessors based on partition and offset is now used, so removed all the previous prcm_xxx accessors. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak [paul@pwsan.com: remove fn prototypes also] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index f815329..0016555 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -50,40 +50,3 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) return v; } - -/* Read a PRM register, AND it, and shift the result down to bit 0 */ -/* XXX deprecated */ -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) -{ - u32 v; - - v = __raw_readl(reg); - v &= mask; - v >>= __ffs(mask); - - return v; -} - -/* Read-modify-write a register in a PRM module. Caller must lock */ -/* XXX deprecated */ -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) -{ - u32 v; - - v = __raw_readl(reg); - v &= ~mask; - v |= bits; - __raw_writel(v, reg); - - return v; -} - -u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) -{ - return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); -} - -u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) -{ - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); -} diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 725a6a8..7dfa379 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -750,10 +750,6 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); -extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); -extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); -extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); -extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); # endif -- cgit v0.10.2 From 27bb00b58e04e5d8442335f694f2a1b6c31b184d Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:32 -0600 Subject: OMAP4: hwmod data: Add PRM context register offset Add a 'context_offs' entry in the prcm.omap4 structure to all IPs when applicable. The offset will be used to retrieve the per module context lost information now available on OMAP4. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 6a190f5..d68ef2c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -127,6 +127,7 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, }, }, .slaves = omap44xx_dmm_slaves, @@ -183,6 +184,7 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, }, }, .slaves = omap44xx_emif_fw_slaves, @@ -228,6 +230,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l3_instr_slaves, @@ -327,6 +330,7 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l3_main_1_slaves, @@ -428,6 +432,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l3_main_2_slaves, @@ -484,6 +489,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l3_main_3_slaves, @@ -575,6 +581,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l4_cfg_slaves, @@ -603,6 +610,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l4_per_slaves, @@ -631,6 +639,7 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, }, }, .slaves = omap44xx_l4_wkup_slaves, @@ -809,6 +818,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, }, }, .slaves = omap44xx_aess_slaves, @@ -899,6 +909,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, }, }, .slaves = omap44xx_counter_32k_slaves, @@ -983,6 +994,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET, }, }, .dev_attr = &dma_dev_attr, @@ -1077,6 +1089,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, }, }, .slaves = omap44xx_dmic_slaves, @@ -1162,6 +1175,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, + .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, }, }, .slaves = omap44xx_dsp_slaves, @@ -1250,6 +1264,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_opt_clks, @@ -1354,6 +1369,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_dispc_opt_clks, @@ -1452,6 +1468,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_dsi1_opt_clks, @@ -1529,6 +1546,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_dsi2_opt_clks, @@ -1626,6 +1644,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_hdmi_opt_clks, @@ -1717,6 +1736,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .opt_clks = dss_rfbi_opt_clks, @@ -1787,6 +1807,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, }, }, .slaves = omap44xx_dss_venc_slaves, @@ -1866,6 +1887,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, }, }, .opt_clks = gpio1_opt_clks, @@ -1920,6 +1942,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, }, }, .opt_clks = gpio2_opt_clks, @@ -1974,6 +1997,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, }, }, .opt_clks = gpio3_opt_clks, @@ -2028,6 +2052,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, }, }, .opt_clks = gpio4_opt_clks, @@ -2082,6 +2107,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, }, }, .opt_clks = gpio5_opt_clks, @@ -2136,6 +2162,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, }, }, .opt_clks = gpio6_opt_clks, @@ -2215,6 +2242,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, }, }, .slaves = omap44xx_hsi_slaves, @@ -2298,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, }, }, .slaves = omap44xx_i2c1_slaves, @@ -2353,6 +2382,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_i2c2_slaves, @@ -2408,6 +2438,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_i2c3_slaves, @@ -2463,6 +2494,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, }, }, .slaves = omap44xx_i2c4_slaves, @@ -2560,6 +2592,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, + .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, }, }, .slaves = omap44xx_ipu_slaves, @@ -2646,6 +2679,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, }, }, .opt_clks = iss_opt_clks, @@ -2760,6 +2794,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, + .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, }, }, .slaves = omap44xx_iva_slaves, @@ -2830,6 +2865,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, }, }, .slaves = omap44xx_kbd_slaves, @@ -2895,6 +2931,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mailbox_slaves, @@ -2988,6 +3025,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mcbsp1_slaves, @@ -3062,6 +3100,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mcbsp2_slaves, @@ -3136,6 +3175,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mcbsp3_slaves, @@ -3189,6 +3229,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mcbsp4_slaves, @@ -3282,6 +3323,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mcpdm_slaves, @@ -3368,6 +3410,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, }, }, .dev_attr = &mcspi1_dev_attr, @@ -3429,6 +3472,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, }, }, .dev_attr = &mcspi2_dev_attr, @@ -3490,6 +3534,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, }, }, .dev_attr = &mcspi3_dev_attr, @@ -3549,6 +3594,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, }, }, .dev_attr = &mcspi4_dev_attr, @@ -3634,6 +3680,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, }, }, .dev_attr = &mmc1_dev_attr, @@ -3694,6 +3741,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mmc2_slaves, @@ -3749,6 +3797,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mmc3_slaves, @@ -3803,6 +3852,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mmc4_slaves, @@ -3856,6 +3906,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, }, }, .slaves = omap44xx_mmc5_slaves, @@ -3897,6 +3948,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, }, }, .masters = omap44xx_mpu_masters, @@ -3971,6 +4023,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, }, }, .slaves = omap44xx_smartreflex_core_slaves, @@ -4018,6 +4071,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, }, }, .slaves = omap44xx_smartreflex_iva_slaves, @@ -4065,6 +4119,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, }, }, .slaves = omap44xx_smartreflex_mpu_slaves, @@ -4127,6 +4182,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, }, }, .slaves = omap44xx_spinlock_slaves, @@ -4211,6 +4267,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer1_slaves, @@ -4257,6 +4314,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer2_slaves, @@ -4303,6 +4361,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer3_slaves, @@ -4349,6 +4408,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer4_slaves, @@ -4414,6 +4474,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer5_slaves, @@ -4480,6 +4541,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer6_slaves, @@ -4545,6 +4607,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer7_slaves, @@ -4610,6 +4673,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer8_slaves, @@ -4656,6 +4720,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer9_slaves, @@ -4702,6 +4767,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer10_slaves, @@ -4748,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, }, }, .slaves = omap44xx_timer11_slaves, @@ -4823,6 +4890,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, }, }, .slaves = omap44xx_uart1_slaves, @@ -4876,6 +4944,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_uart2_slaves, @@ -4930,6 +4999,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_uart3_slaves, @@ -4983,6 +5053,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, }, }, .slaves = omap44xx_uart4_slaves, @@ -5062,6 +5133,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, }, }, .opt_clks = usb_otg_hs_opt_clks, @@ -5135,6 +5207,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, }, }, .slaves = omap44xx_wd_timer2_slaves, @@ -5200,6 +5273,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, + .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, }, }, .slaves = omap44xx_wd_timer3_slaves, diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 9ef4424..16439fa 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -363,6 +363,7 @@ struct omap_hwmod_omap2_prcm { struct omap_hwmod_omap4_prcm { u16 clkctrl_offs; u16 rstctrl_offs; + u16 context_offs; u8 submodule_wkdep_bit; }; -- cgit v0.10.2 From 03fdefe53a3f057760751d958209f0c5507c8e40 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:32 -0600 Subject: OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure Add a new field to provide the mode supported by the module. The mode will control the way mandatory clocks are managed by the PRCM. 0 : Module is temporarily disabled by SW. OCP access to module are stalled. Can be used to change timing parameter of GPMC module. 1 : Module is managed automatically by HW according to clock domain transition. A clock domain sleep transition put module into idle. A wakeup domain transition put it back into function. If CLKTRCTRL=3, any OCP access to module is always granted. Module clocks may be gated according to the clock domain state. 2 : Module is explicitly enabled. Interface clock (if not used for functions) may be gated according to the clock domain state. Functional clocks are guarantied to stay present. As long as in this configuration, power domain sleep transition cannot happen. Some modules will have a modulemode initialized at 1 (HWCTRL) by default. This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index d68ef2c..6201422c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -231,6 +231,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_l3_instr_slaves, @@ -490,6 +491,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_l3_main_3_slaves, @@ -819,6 +821,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_aess_slaves, @@ -1090,6 +1093,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_dmic_slaves, @@ -1176,6 +1180,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_dsp_slaves, @@ -1888,6 +1893,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio1_opt_clks, @@ -1943,6 +1949,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio2_opt_clks, @@ -1998,6 +2005,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio3_opt_clks, @@ -2053,6 +2061,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio4_opt_clks, @@ -2108,6 +2117,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio5_opt_clks, @@ -2163,6 +2173,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = gpio6_opt_clks, @@ -2243,6 +2254,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_hsi_slaves, @@ -2327,6 +2339,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_i2c1_slaves, @@ -2383,6 +2396,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_i2c2_slaves, @@ -2439,6 +2453,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_i2c3_slaves, @@ -2495,6 +2510,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_i2c4_slaves, @@ -2593,6 +2609,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_ipu_slaves, @@ -2680,6 +2697,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .opt_clks = iss_opt_clks, @@ -2795,6 +2813,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .slaves = omap44xx_iva_slaves, @@ -2866,6 +2885,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_kbd_slaves, @@ -3026,6 +3046,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mcbsp1_slaves, @@ -3101,6 +3122,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mcbsp2_slaves, @@ -3176,6 +3198,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mcbsp3_slaves, @@ -3230,6 +3253,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mcbsp4_slaves, @@ -3324,6 +3348,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mcpdm_slaves, @@ -3411,6 +3436,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .dev_attr = &mcspi1_dev_attr, @@ -3473,6 +3499,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .dev_attr = &mcspi2_dev_attr, @@ -3535,6 +3562,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .dev_attr = &mcspi3_dev_attr, @@ -3595,6 +3623,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .dev_attr = &mcspi4_dev_attr, @@ -3681,6 +3710,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .dev_attr = &mmc1_dev_attr, @@ -3742,6 +3772,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mmc2_slaves, @@ -3798,6 +3829,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mmc3_slaves, @@ -3853,6 +3885,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mmc4_slaves, @@ -3907,6 +3940,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_mmc5_slaves, @@ -4024,6 +4058,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_smartreflex_core_slaves, @@ -4072,6 +4107,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_smartreflex_iva_slaves, @@ -4120,6 +4156,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_smartreflex_mpu_slaves, @@ -4268,6 +4305,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer1_slaves, @@ -4315,6 +4353,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer2_slaves, @@ -4362,6 +4401,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer3_slaves, @@ -4409,6 +4449,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer4_slaves, @@ -4475,6 +4516,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer5_slaves, @@ -4542,6 +4584,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer6_slaves, @@ -4608,6 +4651,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer7_slaves, @@ -4674,6 +4718,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer8_slaves, @@ -4721,6 +4766,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer9_slaves, @@ -4768,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer10_slaves, @@ -4815,6 +4862,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_timer11_slaves, @@ -4891,6 +4939,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_uart1_slaves, @@ -4945,6 +4994,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_uart2_slaves, @@ -5000,6 +5050,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_uart3_slaves, @@ -5054,6 +5105,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_uart4_slaves, @@ -5134,6 +5186,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, }, }, .opt_clks = usb_otg_hs_opt_clks, @@ -5208,6 +5261,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_wd_timer2_slaves, @@ -5274,6 +5328,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .omap4 = { .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, }, }, .slaves = omap44xx_wd_timer3_slaves, diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 16439fa..0e329ca 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -80,6 +80,11 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; #define HWMOD_IDLEMODE_SMART (1 << 2) #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) +/* modulemode control type (SW or HW) */ +#define MODULEMODE_HWCTRL 1 +#define MODULEMODE_SWCTRL 2 + + /** * struct omap_hwmod_mux_info - hwmod specific mux configuration * @pads: array of omap_device_pad entries @@ -365,6 +370,7 @@ struct omap_hwmod_omap4_prcm { u16 rstctrl_offs; u16 context_offs; u8 submodule_wkdep_bit; + u8 modulemode; }; -- cgit v0.10.2 From 288d6a161819ee99b3a6e2972c5b0d9ede22c553 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:32 -0600 Subject: OMAP4: cm: Add two new APIs for modulemode control In OMAP4, a new programming model based on module control instead of clock control was introduced. Expose two APIs to allow the upper layer (omap_hwmod) to control the module mode independently of the parent clocks management. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up kerneldoc] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 0fe3f14..eb2a472 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -309,3 +309,43 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } + +/** + * omap4_cminst_module_enable - Enable the modulemode inside CLKCTRL + * @mode: Module mode (SW or HW) + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * No return value. + */ +void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) +{ + u32 v; + + v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); + v &= ~OMAP4430_MODULEMODE_MASK; + v |= mode << OMAP4430_MODULEMODE_SHIFT; + omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); +} + +/** + * omap4_cminst_module_disable - Disable the module inside CLKCTRL + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * No return value. + */ +void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) +{ + u32 v; + + v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); + v &= ~OMAP4430_MODULEMODE_MASK; + omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); +} diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index a985400..f2ea645 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -20,6 +20,11 @@ extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); +extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs); +extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs); + /* * In an ideal world, we would not export these low-level functions, * but this will probably take some time to fix properly -- cgit v0.10.2 From 45c38252d76a96e6e0e05f982ca44096191a8eea Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:33 -0600 Subject: OMAP4: hwmod: Introduce the module control in hwmod control Take advantage of the explicit modulemode control to fix the way parents clocks are managed. A module must be disabled before any parents are disabled. That programming model was not possible with the previous implementation that was considering a modulemode as a leaf clock node managed by the clock fmwk. This was leading to bad crash upon disable when the parent clock was gated before the module completed its transition to idle. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index a0f7d31..4424fee 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -680,6 +680,56 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } /** + * _enable_module - enable CLKCTRL modulemode on OMAP4 + * @oh: struct omap_hwmod * + * + * Enables the PRCM module mode related to the hwmod @oh. + * No return value. + */ +static void _enable_module(struct omap_hwmod *oh) +{ + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + + if (!oh->clkdm || !oh->prcm.omap4.modulemode) + return; + + pr_debug("omap_hwmod: %s: _enable_module: %d\n", + oh->name, oh->prcm.omap4.modulemode); + + omap4_cminst_module_enable(oh->prcm.omap4.modulemode, + oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + +/** + * _disable_module - enable CLKCTRL modulemode on OMAP4 + * @oh: struct omap_hwmod * + * + * Disable the PRCM module mode related to the hwmod @oh. + * No return value. + */ +static void _disable_module(struct omap_hwmod *oh) +{ + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + + if (!oh->clkdm || !oh->prcm.omap4.modulemode) + return; + + pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); + + omap4_cminst_module_disable(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + +/** * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh * @oh: struct omap_hwmod *oh * @@ -1424,6 +1474,7 @@ static int _enable(struct omap_hwmod *oh) return r; } + _enable_module(oh); oh->_state = _HWMOD_STATE_ENABLED; @@ -1460,11 +1511,18 @@ static int _idle(struct omap_hwmod *oh) if (oh->class->sysc) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - _disable_clocks(oh); + _disable_module(oh); ret = _wait_target_disable(oh); if (ret) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); + /* + * The module must be in idle mode before disabling any parents + * clocks. Otherwise, the parent clock might be disabled before + * the module transition is done, and thus will prevent the + * transition to complete properly. + */ + _disable_clocks(oh); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1556,11 +1614,12 @@ static int _shutdown(struct omap_hwmod *oh) if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ - _disable_clocks(oh); + _disable_module(oh); ret = _wait_target_disable(oh); if (ret) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); + _disable_clocks(oh); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v0.10.2 From a5122ff8ceb2b1f207965a3608d3da3af832e513 Mon Sep 17 00:00:00 2001 From: Vaibhav Bedia Date: Sun, 10 Jul 2011 05:56:53 -0600 Subject: OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition() The call to pwrdm_wait_transition() in clkdm_clk_enable() is redundant since the function pwrdm_clkdm_state_switch() which is called next also does the same thing. Signed-off-by: Vaibhav Bedia Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 6cb6c03..4fbbbfc 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -834,7 +834,6 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) clk->name); arch_clkdm->clkdm_clk_enable(clkdm); - pwrdm_wait_transition(clkdm->pwrdm.ptr); pwrdm_clkdm_state_switch(clkdm); return 0; -- cgit v0.10.2 From 113a74137f5c85f2c7914e78350f70247ef9447c Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:54 -0600 Subject: OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework Duplicate the existing API for clockdomain enable from clock to enable a clock domain from hwmod framework. This will be needed when the hwmod framework will move from the current clock centric approach to the module based approach. These APIs are returning 0 for the moment for OMAP2 and OMAP3 until their hwmods are updated with the clksm attribute. Signed-off-by: Benoit Cousson Cc: Kevin Hilman Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 4fbbbfc..5a57de5 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -796,7 +796,50 @@ void clkdm_deny_idle(struct clockdomain *clkdm) } -/* Clockdomain-to-clock framework interface code */ +/* Clockdomain-to-clock/hwmod framework interface code */ + +static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) +{ + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) + return -EINVAL; + + /* + * For arch's with no autodeps, clkcm_clk_enable + * should be called for every clock instance or hwmod that is + * enabled, so the clkdm can be force woken up. + */ + if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) + return 0; + + arch_clkdm->clkdm_clk_enable(clkdm); + pwrdm_wait_transition(clkdm->pwrdm.ptr); + pwrdm_clkdm_state_switch(clkdm); + + pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); + + return 0; +} + +static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) +{ + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) + return -EINVAL; + + if (atomic_read(&clkdm->usecount) == 0) { + WARN_ON(1); /* underflow */ + return -ERANGE; + } + + if (atomic_dec_return(&clkdm->usecount) > 0) + return 0; + + arch_clkdm->clkdm_clk_disable(clkdm); + pwrdm_clkdm_state_switch(clkdm); + + pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); + + return 0; +} /** * clkdm_clk_enable - add an enabled downstream clock to this clkdm @@ -819,24 +862,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) * downstream clocks for debugging purposes? */ - if (!clkdm || !clk) + if (!clk) return -EINVAL; - if (!arch_clkdm || !arch_clkdm->clkdm_clk_enable) - return -EINVAL; - - if (atomic_inc_return(&clkdm->usecount) > 1) - return 0; - - /* Clockdomain now has one enabled downstream clock */ - - pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, - clk->name); - - arch_clkdm->clkdm_clk_enable(clkdm); - pwrdm_clkdm_state_switch(clkdm); - - return 0; + return _clkdm_clk_hwmod_enable(clkdm); } /** @@ -849,9 +878,8 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) * clockdomain usecount goes to 0, put the clockdomain to sleep * (software-supervised mode) or remove the clkdm autodependencies * (hardware-supervised mode). Returns -EINVAL if passed null - * pointers; -ERANGE if the @clkdm usecount underflows and debugging - * is enabled; or returns 0 upon success or if the clockdomain is in - * hwsup idle mode. + * pointers; -ERANGE if the @clkdm usecount underflows; or returns 0 + * upon success or if the clockdomain is in hwsup idle mode. */ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) { @@ -860,30 +888,72 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) * downstream clocks for debugging purposes? */ - if (!clkdm || !clk) + if (!clk) return -EINVAL; - if (!arch_clkdm || !arch_clkdm->clkdm_clk_disable) + return _clkdm_clk_hwmod_disable(clkdm); +} + +/** + * clkdm_hwmod_enable - add an enabled downstream hwmod to this clkdm + * @clkdm: struct clockdomain * + * @oh: struct omap_hwmod * of the enabled downstream hwmod + * + * Increment the usecount of the clockdomain @clkdm and ensure that it + * is awake before @oh is enabled. Intended to be called by + * module_enable() code. + * If the clockdomain is in software-supervised idle mode, force the + * clockdomain to wake. If the clockdomain is in hardware-supervised idle + * mode, add clkdm-pwrdm autodependencies, to ensure that devices in the + * clockdomain can be read from/written to by on-chip processors. + * Returns -EINVAL if passed null pointers; + * returns 0 upon success or if the clockdomain is in hwsup idle mode. + */ +int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh) +{ + /* The clkdm attribute does not exist yet prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return 0; + + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream hwmods for debugging purposes? + */ + + if (!oh) return -EINVAL; -#ifdef DEBUG - if (atomic_read(&clkdm->usecount) == 0) { - WARN_ON(1); /* underflow */ - return -ERANGE; - } -#endif + return _clkdm_clk_hwmod_enable(clkdm); +} - if (atomic_dec_return(&clkdm->usecount) > 0) +/** + * clkdm_hwmod_disable - remove an enabled downstream hwmod from this clkdm + * @clkdm: struct clockdomain * + * @oh: struct omap_hwmod * of the disabled downstream hwmod + * + * Decrement the usecount of this clockdomain @clkdm when @oh is + * disabled. Intended to be called by module_disable() code. + * If the clockdomain usecount goes to 0, put the clockdomain to sleep + * (software-supervised mode) or remove the clkdm autodependencies + * (hardware-supervised mode). + * Returns -EINVAL if passed null pointers; -ERANGE if the @clkdm usecount + * underflows; or returns 0 upon success or if the clockdomain is in hwsup + * idle mode. + */ +int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh) +{ + /* The clkdm attribute does not exist yet prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) return 0; - /* All downstream clocks of this clockdomain are now disabled */ - - pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, - clk->name); + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream hwmods for debugging purposes? + */ - arch_clkdm->clkdm_clk_disable(clkdm); - pwrdm_clkdm_state_switch(clkdm); + if (!oh) + return -EINVAL; - return 0; + return _clkdm_clk_hwmod_disable(clkdm); } diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 5823584..8e0da64 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -20,6 +20,7 @@ #include "powerdomain.h" #include +#include #include /* @@ -183,6 +184,8 @@ int clkdm_sleep(struct clockdomain *clkdm); int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); +int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); +int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); extern void __init omap2xxx_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); -- cgit v0.10.2 From 32a363c0f5b44cb4e9adfe238dfc4efa9270f7ae Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 10 Jul 2011 05:56:54 -0600 Subject: OMAP2+: clockdomain: add clkdm_in_hwsup() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain is configured for hardware-supervised idle. It does not actually read the hardware; rather, it checks an internal flag in the struct clockdomain, which is changed when the clockdomain is switched in and out of hardware-supervised idle. This should be safe, since all changes to the idle mode should pass through the clockdomain code. Based on a set of patches by Rajendra Nayak which do the same thing by checking the hardware bits. This approach should be faster and more compact. Signed-off-by: Paul Walmsley Cc: Rajendra Nayak Cc: Todd Poynor Cc: Benoît Cousson diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 5a57de5..239b558 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -1,8 +1,8 @@ /* * OMAP2/3/4 clockdomain framework functions * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation + * Copyright (C) 2008-2011 Texas Instruments, Inc. + * Copyright (C) 2008-2011 Nokia Corporation * * Written by Paul Walmsley and Jouni Högander * Added OMAP4 specific support by Abhijit Pagare @@ -704,6 +704,8 @@ int clkdm_sleep(struct clockdomain *clkdm) pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; + return arch_clkdm->clkdm_sleep(clkdm); } @@ -732,6 +734,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; + return arch_clkdm->clkdm_wakeup(clkdm); } @@ -762,6 +766,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) pr_debug("clockdomain: enabling automatic idle transitions for %s\n", clkdm->name); + clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; + arch_clkdm->clkdm_allow_idle(clkdm); pwrdm_clkdm_state_switch(clkdm); } @@ -792,9 +798,29 @@ void clkdm_deny_idle(struct clockdomain *clkdm) pr_debug("clockdomain: disabling automatic idle transitions for %s\n", clkdm->name); + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; + arch_clkdm->clkdm_deny_idle(clkdm); } +/** + * clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle enabled? + * @clkdm: struct clockdomain * + * + * Returns true if clockdomain @clkdm currently has + * hardware-supervised idle enabled, or false if it does not or if + * @clkdm is NULL. It is only valid to call this function after + * clkdm_init() has been called. This function does not actually read + * bits from the hardware; it instead tests an in-memory flag that is + * changed whenever the clockdomain code changes the auto-idle mode. + */ +bool clkdm_in_hwsup(struct clockdomain *clkdm) +{ + if (!clkdm) + return false; + + return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; +} /* Clockdomain-to-clock/hwmod framework interface code */ diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 8e0da64..8782a5c 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -83,6 +83,9 @@ struct clkdm_dep { const struct omap_chip_id omap_chip; }; +/* Possible flags for struct clockdomain._flags */ +#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0) + /** * struct clockdomain - OMAP clockdomain * @name: clockdomain name @@ -90,6 +93,7 @@ struct clkdm_dep { * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg * @flags: Clockdomain capability flags + * @_flags: Flags for use only by internal clockdomain code * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers * @cm_inst: (OMAP4 only) CM instance register offset @@ -114,6 +118,7 @@ struct clockdomain { } pwrdm; const u16 clktrctrl_mask; const u8 flags; + u8 _flags; const u8 dep_bit; const u8 prcm_partition; const s16 cm_inst; @@ -178,6 +183,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); void clkdm_allow_idle(struct clockdomain *clkdm); void clkdm_deny_idle(struct clockdomain *clkdm); +bool clkdm_in_hwsup(struct clockdomain *clkdm); int clkdm_wakeup(struct clockdomain *clkdm); int clkdm_sleep(struct clockdomain *clkdm); -- cgit v0.10.2 From b86cfb52a145d8ddad66b98c39c6764f3883cd5a Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sun, 10 Jul 2011 05:56:54 -0600 Subject: OMAP2+: PM: idle clkdms only if already in idle The omap_set_pwrdm_state function forces clockdomains to idle, without checking the existing idle state programmed, instead based solely on the HW capability of the clockdomain to support idle. This is wrong and the clockdomains should be idled post a state_switch *only* if idle transitions on the clockdomain were already enabled. Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Acked-by: Kevin Hilman Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index d48813f..3feb359 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) u32 cur_state; int sleep_switch = -1; int ret = 0; + int hwsup = 0; if (pwrdm == NULL || IS_ERR(pwrdm)) return -EINVAL; @@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { sleep_switch = LOWPOWERSTATE_SWITCH; } else { + hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); pwrdm_wait_transition(pwrdm); sleep_switch = FORCEWAKEUP_SWITCH; @@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) switch (sleep_switch) { case FORCEWAKEUP_SWITCH: - if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) + if (hwsup) clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); else clkdm_sleep(pwrdm->pwrdm_clkdms[0]); -- cgit v0.10.2 From 555e74ea08bfc04a0136f976cbaa200addf1ba87 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sun, 10 Jul 2011 05:56:55 -0600 Subject: OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming Since the clkdm state programming is now done from within the hwmod framework (which uses a per-hwmod lock) instead of the being done from the clock framework (which used a global lock), there is now a need to have per-clkdm locking to prevent races between different hwmods/modules belonging to the same clock domain concurrently programming the clkdm state. Signed-off-by: Rajendra Nayak Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 239b558..ab7db08 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -92,6 +92,8 @@ static int _clkdm_register(struct clockdomain *clkdm) pwrdm_add_clkdm(pwrdm, clkdm); + spin_lock_init(&clkdm->lock); + pr_debug("clockdomain: registered %s\n", clkdm->name); return 0; @@ -690,6 +692,9 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) */ int clkdm_sleep(struct clockdomain *clkdm) { + int ret; + unsigned long flags; + if (!clkdm) return -EINVAL; @@ -704,9 +709,11 @@ int clkdm_sleep(struct clockdomain *clkdm) pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); + spin_lock_irqsave(&clkdm->lock, flags); clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; - - return arch_clkdm->clkdm_sleep(clkdm); + ret = arch_clkdm->clkdm_sleep(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); + return ret; } /** @@ -720,6 +727,9 @@ int clkdm_sleep(struct clockdomain *clkdm) */ int clkdm_wakeup(struct clockdomain *clkdm) { + int ret; + unsigned long flags; + if (!clkdm) return -EINVAL; @@ -734,9 +744,11 @@ int clkdm_wakeup(struct clockdomain *clkdm) pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); + spin_lock_irqsave(&clkdm->lock, flags); clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; - - return arch_clkdm->clkdm_wakeup(clkdm); + ret = arch_clkdm->clkdm_wakeup(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); + return ret; } /** @@ -751,6 +763,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) */ void clkdm_allow_idle(struct clockdomain *clkdm) { + unsigned long flags; + if (!clkdm) return; @@ -766,10 +780,11 @@ void clkdm_allow_idle(struct clockdomain *clkdm) pr_debug("clockdomain: enabling automatic idle transitions for %s\n", clkdm->name); + spin_lock_irqsave(&clkdm->lock, flags); clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; - arch_clkdm->clkdm_allow_idle(clkdm); pwrdm_clkdm_state_switch(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); } /** @@ -783,6 +798,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) */ void clkdm_deny_idle(struct clockdomain *clkdm) { + unsigned long flags; + if (!clkdm) return; @@ -798,9 +815,10 @@ void clkdm_deny_idle(struct clockdomain *clkdm) pr_debug("clockdomain: disabling automatic idle transitions for %s\n", clkdm->name); + spin_lock_irqsave(&clkdm->lock, flags); clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; - arch_clkdm->clkdm_deny_idle(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); } /** @@ -816,16 +834,25 @@ void clkdm_deny_idle(struct clockdomain *clkdm) */ bool clkdm_in_hwsup(struct clockdomain *clkdm) { + bool ret; + unsigned long flags; + if (!clkdm) return false; - return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; + spin_lock_irqsave(&clkdm->lock, flags); + ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; + spin_unlock_irqrestore(&clkdm->lock, flags); + + return ret; } /* Clockdomain-to-clock/hwmod framework interface code */ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) { + unsigned long flags; + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) return -EINVAL; @@ -837,9 +864,11 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) return 0; + spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_enable(clkdm); pwrdm_wait_transition(clkdm->pwrdm.ptr); pwrdm_clkdm_state_switch(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); @@ -848,6 +877,8 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) { + unsigned long flags; + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) return -EINVAL; @@ -859,8 +890,10 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) if (atomic_dec_return(&clkdm->usecount) > 0) return 0; + spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_disable(clkdm); pwrdm_clkdm_state_switch(clkdm); + spin_unlock_irqrestore(&clkdm->lock, flags); pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 8782a5c..1e50c88 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -17,6 +17,7 @@ #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H #include +#include #include "powerdomain.h" #include @@ -128,6 +129,7 @@ struct clockdomain { const struct omap_chip_id omap_chip; atomic_t usecount; struct list_head node; + spinlock_t lock; }; /** diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c index 48d0db7..f740edb 100644 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c @@ -183,7 +183,8 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) _clkdm_add_autodeps(clkdm); _enable_hwsup(clkdm); } else { - clkdm_wakeup(clkdm); + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap2_clkdm_wakeup(clkdm); } return 0; @@ -205,7 +206,8 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) _clkdm_del_autodeps(clkdm); _enable_hwsup(clkdm); } else { - clkdm_sleep(clkdm); + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap2_clkdm_sleep(clkdm); } return 0; diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c index a1a4ecd..b43706a 100644 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ b/arch/arm/mach-omap2/clockdomain44xx.c @@ -95,13 +95,8 @@ static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) { - bool hwsup = false; - - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup) - clkdm_wakeup(clkdm); + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return omap4_clkdm_wakeup(clkdm); return 0; } @@ -113,8 +108,8 @@ static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, clkdm->cm_inst, clkdm->clkdm_offs); - if (!hwsup) - clkdm_sleep(clkdm); + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + omap4_clkdm_sleep(clkdm); return 0; } -- cgit v0.10.2 From 12706c542574ea0127a13815efe59ca9ba6d88d7 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sun, 10 Jul 2011 05:57:06 -0600 Subject: OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The OMAP2/3 clock code was written to notify the clockdomain code when the first clock in a clockdomain is enabled and when the last enabled clock in a clockdomain is disabled. OMAP4 requires a different approach: the hwmod code needs to signal the clockdomain code when to force-enable and auto-idle a clockdomain during the IP block enable process. The current conjecture is that once that hwmod sequence is implemented, it will no longer be necessary for the clock code to call into the clockdomain code for "optional clocks" on OMAP4. Add a static flag to the OMAP2+ clock code, clkdm_control, that by default preserves the OMAP2/3 behavior. Also add a function, omap2_clk_disable_clkdm_control(), intended to be called from OMAP4 and beyond clock initcalls, that disables the old behavior. Part of this patch was originally based on a patch by Rajendra Nayak . Signed-off-by: Paul Walmsley Cc: Benoît Cousson Cc: Rajendra Nayak diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 180299e..fc84576 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -38,6 +38,14 @@ u8 cpu_mask; /* + * clkdm_control: if true, then when a clock is enabled in the + * hardware, its clockdomain will first be enabled; and when a clock + * is disabled in the hardware, its clockdomain will be disabled + * afterwards. + */ +static bool clkdm_control = true; + +/* * OMAP2+ specific clock functions */ @@ -100,6 +108,19 @@ void omap2_init_clk_clkdm(struct clk *clk) } /** + * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable + * + * Prevent the OMAP clock code from calling into the clockdomain code + * when a hardware clock in that clockdomain is enabled or disabled. + * Intended to be called at init time from omap*_clk_init(). No + * return value. + */ +void __init omap2_clk_disable_clkdm_control(void) +{ + clkdm_control = false; +} + +/** * omap2_clk_dflt_find_companion - find companion clock to @clk * @clk: struct clk * to find the companion clock of * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in @@ -268,7 +289,7 @@ void omap2_clk_disable(struct clk *clk) clk->ops->disable(clk); } - if (clk->clkdm) + if (clkdm_control && clk->clkdm) clkdm_clk_disable(clk->clkdm, clk); if (clk->parent) @@ -308,7 +329,7 @@ int omap2_clk_enable(struct clk *clk) } } - if (clk->clkdm) { + if (clkdm_control && clk->clkdm) { ret = clkdm_clk_enable(clk->clkdm, clk); if (ret) { WARN(1, "clock: %s: could not enable clockdomain %s: " @@ -330,7 +351,7 @@ int omap2_clk_enable(struct clk *clk) return 0; oce_err3: - if (clk->clkdm) + if (clkdm_control && clk->clkdm) clkdm_clk_disable(clk->clkdm, clk); oce_err2: if (clk->parent) diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index e10ff2b..48ac568 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -16,6 +16,8 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H #define __ARCH_ARM_MACH_OMAP2_CLOCK_H +#include + #include /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ @@ -72,6 +74,7 @@ void omap2_clk_disable_unused(struct clk *clk); #endif void omap2_init_clk_clkdm(struct clk *clk); +void __init omap2_clk_disable_clkdm_control(void); /* clkt_clksel.c public functions */ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, -- cgit v0.10.2 From 665d001338b494d6d62810aa99b4c0fa1a0884b9 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sun, 10 Jul 2011 05:57:07 -0600 Subject: OMAP2+: hwmod: Follow the recommended PRCM module enable sequence On OMAP4, the PRCM recommended sequence for enabling a module after power-on-reset is: -1- Force clkdm to SW_WKUP -2- Enabling the clocks -3- Configure desired module mode to "enable" or "auto" -4- Wait for the desired module idle status to be FUNC -5- Program clkdm in HW_AUTO(if supported) This sequence applies to all older OMAPs' as well, however since they use autodeps, it makes sure that no clkdm is in IDLE, and hence not requiring a force SW_WKUP when a module is being enabled. OMAP4 does not need to support autodeps, because of the dyanamic dependency feature, wherein the HW takes care of waking up a clockdomain from idle and hence the module, whenever an interconnect access happens to the given module. Implementing the sequence for OMAP4 requires the clockdomain handling that is currently done in clock framework to be done as part of hwmod framework since the step -4- above to "Wait for the desired module idle status to be FUNC" is done as part of hwmod framework. Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only call the clockdomain code if oh->clkdm is set; disable clock->clockdomain interaction on OMAP4] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2578820..dc79b39 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3212,6 +3212,7 @@ int __init omap4xxx_clk_init(void) } clk_init(&omap2_clk_functions); + omap2_clk_disable_clkdm_control(); for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); c++) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 4424fee..84cc0bd 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1437,6 +1437,7 @@ static int _reset(struct omap_hwmod *oh) static int _enable(struct omap_hwmod *oh) { int r; + int hwsup = 0; pr_debug("omap_hwmod: %s: enabling\n", oh->name); @@ -1448,14 +1449,6 @@ static int _enable(struct omap_hwmod *oh) return -EINVAL; } - /* Mux pins for device runtime if populated */ - if (oh->mux && (!oh->mux->enabled || - ((oh->_state == _HWMOD_STATE_IDLE) && - oh->mux->pads_dynamic))) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); - - _add_initiator_dep(oh, mpu_oh); - _enable_clocks(oh); /* * If an IP contains only one HW reset line, then de-assert it in order @@ -1466,23 +1459,56 @@ static int _enable(struct omap_hwmod *oh) oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) _deassert_hardreset(oh, oh->rst_lines[0].name); - r = _wait_target_ready(oh); - if (r) { - pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", - oh->name, r); - _disable_clocks(oh); + /* Mux pins for device runtime if populated */ + if (oh->mux && (!oh->mux->enabled || + ((oh->_state == _HWMOD_STATE_IDLE) && + oh->mux->pads_dynamic))) + omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); + + _add_initiator_dep(oh, mpu_oh); - return r; + if (oh->clkdm) { + /* + * A clockdomain must be in SW_SUP before enabling + * completely the module. The clockdomain can be set + * in HW_AUTO only when the module become ready. + */ + hwsup = clkdm_in_hwsup(oh->clkdm); + r = clkdm_hwmod_enable(oh->clkdm, oh); + if (r) { + WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", + oh->name, oh->clkdm->name, r); + return r; + } } + + _enable_clocks(oh); _enable_module(oh); - oh->_state = _HWMOD_STATE_ENABLED; + r = _wait_target_ready(oh); + if (!r) { + /* + * Set the clockdomain to HW_AUTO only if the target is ready, + * assuming that the previous state was HW_AUTO + */ + if (oh->clkdm && hwsup) + clkdm_allow_idle(oh->clkdm); - /* Access the sysconfig only if the target is ready */ - if (oh->class->sysc) { - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) - _update_sysc_cache(oh); - _enable_sysc(oh); + oh->_state = _HWMOD_STATE_ENABLED; + + /* Access the sysconfig only if the target is ready */ + if (oh->class->sysc) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _enable_sysc(oh); + } + } else { + _disable_clocks(oh); + pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", + oh->name, r); + + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); } return r; @@ -1523,6 +1549,8 @@ static int _idle(struct omap_hwmod *oh) * transition to complete properly. */ _disable_clocks(oh); + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1620,6 +1648,8 @@ static int _shutdown(struct omap_hwmod *oh) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); _disable_clocks(oh); + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v0.10.2 From a53025724052b2b1edbc982a4a248784638f563d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sun, 10 Jul 2011 05:57:33 -0600 Subject: OMAP: Add debugfs node to show the summary of all clocks Add a debugfs node called "summary" to /sys/kernel/debug/clock/ that displays a quick summary of all clocks registered in the "clocks" structure. The format of the output from this node is: This debugfs node was very helpful for taking a quick snapshot of the linux clock tree for OMAP and ensuring clock frequencies calculated by the kernel were indeed correct. This patch helped uncover some bugs in the linux clock tree for OMAP4. Signed-off-by: Jon Hunter Signed-off-by: Paul Walmsley diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index c9122dd..156b27d 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -475,8 +475,41 @@ int __init clk_init(struct clk_functions * custom_clocks) /* * debugfs support to trace clock tree hierarchy and attributes */ + +#include +#include + static struct dentry *clk_debugfs_root; +static int clk_dbg_show_summary(struct seq_file *s, void *unused) +{ + struct clk *c; + struct clk *pa; + + seq_printf(s, "%-30s %-30s %-10s %s\n", + "clock-name", "parent-name", "rate", "use-count"); + + list_for_each_entry(c, &clocks, node) { + pa = c->parent; + seq_printf(s, "%-30s %-30s %-10lu %d\n", + c->name, pa ? pa->name : "none", c->rate, c->usecount); + } + + return 0; +} + +static int clk_dbg_open(struct inode *inode, struct file *file) +{ + return single_open(file, clk_dbg_show_summary, inode->i_private); +} + +static const struct file_operations debug_clock_fops = { + .open = clk_dbg_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + static int clk_debugfs_register_one(struct clk *c) { int err; @@ -551,6 +584,12 @@ static int __init clk_debugfs_init(void) if (err) goto err_out; } + + d = debugfs_create_file("summary", S_IRUGO, + d, NULL, &debug_clock_fops); + if (!d) + return -ENOMEM; + return 0; err_out: debugfs_remove_recursive(clk_debugfs_root); -- cgit v0.10.2 From a07405b7802691d29ab3b23bdc76ee6d006aad0b Mon Sep 17 00:00:00 2001 From: Justin TerAvest Date: Sun, 10 Jul 2011 22:09:19 +0200 Subject: cfq: Remove special treatment for metadata rqs. There is no consistency among filesystems from what bios (or requests) are marked as being metadata. It's interesting to expose this in traces, but we shouldn't schedule the requests differently based on whether or not they're marked as being metadata. Signed-off-by: Justin TerAvest Signed-off-by: Jens Axboe diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index b2e1c75..762bd50 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -129,8 +129,6 @@ struct cfq_queue { unsigned long slice_end; long slice_resid; - /* pending metadata requests */ - int meta_pending; /* number of requests that are on the dispatch list or inside driver */ int dispatched; @@ -670,9 +668,6 @@ cfq_choose_req(struct cfq_data *cfqd, struct request *rq1, struct request *rq2, if (rq_is_sync(rq1) != rq_is_sync(rq2)) return rq_is_sync(rq1) ? rq1 : rq2; - if ((rq1->cmd_flags ^ rq2->cmd_flags) & REQ_META) - return rq1->cmd_flags & REQ_META ? rq1 : rq2; - s1 = blk_rq_pos(rq1); s2 = blk_rq_pos(rq2); @@ -1593,10 +1588,6 @@ static void cfq_remove_request(struct request *rq) cfqq->cfqd->rq_queued--; cfq_blkiocg_update_io_remove_stats(&(RQ_CFQG(rq))->blkg, rq_data_dir(rq), rq_is_sync(rq)); - if (rq->cmd_flags & REQ_META) { - WARN_ON(!cfqq->meta_pending); - cfqq->meta_pending--; - } } static int cfq_merge(struct request_queue *q, struct request **req, @@ -3335,13 +3326,6 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq, return true; /* - * So both queues are sync. Let the new request get disk time if - * it's a metadata request and the current queue is doing regular IO. - */ - if ((rq->cmd_flags & REQ_META) && !cfqq->meta_pending) - return true; - - /* * Allow an RT request to pre-empt an ongoing non-RT cfqq timeslice. */ if (cfq_class_rt(new_cfqq) && !cfq_class_rt(cfqq)) @@ -3405,8 +3389,6 @@ cfq_rq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq, struct cfq_io_context *cic = RQ_CIC(rq); cfqd->rq_queued++; - if (rq->cmd_flags & REQ_META) - cfqq->meta_pending++; cfq_update_io_thinktime(cfqd, cic); cfq_update_io_seektime(cfqd, cfqq, rq); -- cgit v0.10.2 From 354a183f536a8edf6cb80ee3e3f393736e278810 Mon Sep 17 00:00:00 2001 From: Russell King - ARM Linux Date: Sun, 10 Jul 2011 23:05:34 -0700 Subject: Convert OMAPs 32kHz clocksource implementation to use the generic MMIO clocksource support. This achieves several things: 1. It means we get rid of all these helper functions which frankly should never have been necessary. 2. It means omap_readl() inside these helper functions does not appear in ftrace output. Another plus is that we avoid the overhead of calculating the address to read each time, but a minus is that we use readl() which has a barrier. Signed-off-by: Russell King [tony@atomide.com: updated to use ioremap] Signed-off-by: Tony Lindgren diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278..c1795c9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -852,6 +852,7 @@ config ARCH_OMAP select HAVE_CLK select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ + select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index c13bc3d..a6cbb71 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -26,87 +27,16 @@ #include - /* * 32KHz clocksource ... always available, on pretty most chips except * OMAP 730 and 1510. Other timers could be used as clocksources, with * higher resolution in free-running counter modes (e.g. 12 MHz xtal), * but systems won't necessarily want to spend resources that way. */ +static void __iomem *timer_32k_base; #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 -#include - -/* - * offset_32k holds the init time counter value. It is then subtracted - * from every counter read to achieve a counter that counts time from the - * kernel boot (needed for sched_clock()). - */ -static u32 offset_32k __read_mostly; - -#ifdef CONFIG_ARCH_OMAP16XX -static cycle_t notrace omap16xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k; -} -#else -#define omap16xx_32k_read NULL -#endif - -#ifdef CONFIG_SOC_OMAP2420 -static cycle_t notrace omap2420_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap2420_32k_read NULL -#endif - -#ifdef CONFIG_SOC_OMAP2430 -static cycle_t notrace omap2430_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap2430_32k_read NULL -#endif - -#ifdef CONFIG_ARCH_OMAP3 -static cycle_t notrace omap34xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap34xx_32k_read NULL -#endif - -#ifdef CONFIG_ARCH_OMAP4 -static cycle_t notrace omap44xx_32k_read(struct clocksource *cs) -{ - return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k; -} -#else -#define omap44xx_32k_read NULL -#endif - -/* - * Kernel assumes that sched_clock can be called early but may not have - * things ready yet. - */ -static cycle_t notrace omap_32k_read_dummy(struct clocksource *cs) -{ - return 0; -} - -static struct clocksource clocksource_32k = { - .name = "32k_counter", - .rating = 250, - .read = omap_32k_read_dummy, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - /* * Returns current time from boot in nsecs. It's OK for this to wrap * around for now, as it's just a relative time stamp. @@ -122,7 +52,7 @@ static DEFINE_CLOCK_DATA(cd); static inline unsigned long long notrace _omap_32k_sched_clock(void) { - u32 cyc = clocksource_32k.read(&clocksource_32k); + u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); } @@ -140,7 +70,7 @@ unsigned long long notrace omap_32k_sched_clock(void) static void notrace omap_update_sched_clock(void) { - u32 cyc = clocksource_32k.read(&clocksource_32k); + u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; update_sched_clock(&cd, cyc, (u32)~0); } @@ -153,6 +83,7 @@ static void notrace omap_update_sched_clock(void) */ static struct timespec persistent_ts; static cycles_t cycles, last_cycles; +static unsigned int persistent_mult, persistent_shift; void read_persistent_clock(struct timespec *ts) { unsigned long long nsecs; @@ -160,11 +91,10 @@ void read_persistent_clock(struct timespec *ts) struct timespec *tsp = &persistent_ts; last_cycles = cycles; - cycles = clocksource_32k.read(&clocksource_32k); + cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0; delta = cycles - last_cycles; - nsecs = clocksource_cyc2ns(delta, - clocksource_32k.mult, clocksource_32k.shift); + nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift); timespec_add_ns(tsp, nsecs); *ts = *tsp; @@ -176,29 +106,46 @@ int __init omap_init_clocksource_32k(void) "%s: can't register clocksource!\n"; if (cpu_is_omap16xx() || cpu_class_is_omap2()) { + u32 pbase; + unsigned long size = SZ_4K; + void __iomem *base; struct clk *sync_32k_ick; - if (cpu_is_omap16xx()) - clocksource_32k.read = omap16xx_32k_read; - else if (cpu_is_omap2420()) - clocksource_32k.read = omap2420_32k_read; + if (cpu_is_omap16xx()) { + pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED; + size = SZ_1K; + } else if (cpu_is_omap2420()) + pbase = OMAP2420_32KSYNCT_BASE + 0x10; else if (cpu_is_omap2430()) - clocksource_32k.read = omap2430_32k_read; + pbase = OMAP2430_32KSYNCT_BASE + 0x10; else if (cpu_is_omap34xx()) - clocksource_32k.read = omap34xx_32k_read; + pbase = OMAP3430_32KSYNCT_BASE + 0x10; else if (cpu_is_omap44xx()) - clocksource_32k.read = omap44xx_32k_read; + pbase = OMAP4430_32KSYNCT_BASE + 0x10; else return -ENODEV; + /* For this to work we must have a static mapping in io.c for this area */ + base = ioremap(pbase, size); + if (!base) + return -ENODEV; + sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); if (!IS_ERR(sync_32k_ick)) clk_enable(sync_32k_ick); - offset_32k = clocksource_32k.read(&clocksource_32k); + timer_32k_base = base; + + /* + * 120000 rough estimate from the calculations in + * __clocksource_updatefreq_scale. + */ + clocks_calc_mult_shift(&persistent_mult, &persistent_shift, + 32768, NSEC_PER_SEC, 120000); - if (clocksource_register_hz(&clocksource_32k, 32768)) - printk(err, clocksource_32k.name); + if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32, + clocksource_mmio_readl_up)) + printk(err, "32k_counter"); init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, 32768, SC_MULT, SC_SHIFT); -- cgit v0.10.2 From 150f164ef20c2438fb845d3d90c1e2e43a674fe5 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 15:48:32 +0800 Subject: ARM: pxa/saarb: make use of pxa3xx_map_io() Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 9322fe5..e53a333 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -104,7 +104,7 @@ static void __init saarb_init(void) MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") .boot_params = 0xa0000100, - .map_io = pxa_map_io, + .map_io = pxa3xx_map_io, .nr_irqs = SAARB_NR_IRQS, .init_irq = pxa95x_init_irq, .timer = &pxa_timer, -- cgit v0.10.2 From 6c7b3ea52e345ab614edb91d3f0e9f3bb3713871 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Mon, 9 May 2011 14:41:46 +0300 Subject: ARM: pxa/cm-x300: fix V3020 RTC functionality While in sleep mode the CS# and other V3020 RTC GPIOs must be driven high, otherwise V3020 RTC fails to keep the right time in sleep mode. Signed-off-by: Igor Grinberg Cc: stable@kernel.org Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index b2248e7..8a03487 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -161,10 +161,10 @@ static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { GPIO99_GPIO, /* Ethernet IRQ */ /* RTC GPIOs */ - GPIO95_GPIO, /* RTC CS */ - GPIO96_GPIO, /* RTC WR */ - GPIO97_GPIO, /* RTC RD */ - GPIO98_GPIO, /* RTC IO */ + GPIO95_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC CS */ + GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC WR */ + GPIO97_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC RD */ + GPIO98_GPIO, /* RTC IO */ /* Standard I2C */ GPIO21_I2C_SCL, -- cgit v0.10.2 From 5a009df1f200efa49658b0e9c7ad056d59fbefe4 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Mon, 9 May 2011 14:41:47 +0300 Subject: ARM: pxa/cm-x300: GPIO cleanup use gpio_request_() instead of multiple gpiolib calls Signed-off-by: Igor Grinberg Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 8a03487..880df33 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -484,14 +484,14 @@ static int cm_x300_ulpi_phy_reset(void) int err; /* reset the PHY */ - err = gpio_request(GPIO_ULPI_PHY_RST, "ulpi reset"); + err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW, + "ulpi reset"); if (err) { pr_err("%s: failed to request ULPI reset GPIO: %d\n", __func__, err); return err; } - gpio_direction_output(GPIO_ULPI_PHY_RST, 0); msleep(10); gpio_set_value(GPIO_ULPI_PHY_RST, 1); msleep(10); @@ -768,39 +768,36 @@ static void __init cm_x300_init_da9030(void) irq_set_irq_wake(IRQ_WAKEUP0, 1); } +/* wi2wi gpio setting for system_rev >= 130 */ +static struct gpio cm_x300_wi2wi_gpios[] __initdata = { + { 71, GPIOF_OUT_INIT_HIGH, "wlan en" }, + { 70, GPIOF_OUT_INIT_HIGH, "bt reset" }, +}; + static void __init cm_x300_init_wi2wi(void) { int bt_reset, wlan_en; int err; if (system_rev < 130) { - wlan_en = 77; - bt_reset = 78; - } else { - wlan_en = 71; - bt_reset = 70; + cm_x300_wi2wi_gpios[0].gpio = 77; /* wlan en */ + cm_x300_wi2wi_gpios[1].gpio = 78; /* bt reset */ } /* Libertas and CSR reset */ - err = gpio_request(wlan_en, "wlan en"); + err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); if (err) { - pr_err("CM-X300: failed to request wlan en gpio: %d\n", err); - } else { - gpio_direction_output(wlan_en, 1); - gpio_free(wlan_en); + pr_err("CM-X300: failed to request wifi/bt gpios: %d\n", err); + return; } - err = gpio_request(bt_reset, "bt reset"); - if (err) { - pr_err("CM-X300: failed to request bt reset gpio: %d\n", err); - } else { - gpio_direction_output(bt_reset, 1); - udelay(10); - gpio_set_value(bt_reset, 0); - udelay(10); - gpio_set_value(bt_reset, 1); - gpio_free(bt_reset); - } + udelay(10); + gpio_set_value(bt_reset, 0); + udelay(10); + gpio_set_value(bt_reset, 1); + + gpio_free(wlan_en); + gpio_free(bt_reset); } /* MFP */ -- cgit v0.10.2 From 32de50e2416bc3da8c5b68f7afc280bcef630c23 Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Mon, 9 May 2011 14:41:48 +0300 Subject: ARM: pxa/cm-x300: minor style cleanup introduce pr_fmt, so the pr_* calls will be cleaner Signed-off-by: Igor Grinberg Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 880df33..b199596 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -12,6 +12,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#define pr_fmt(fmt) "%s: " fmt, __func__ #include #include @@ -487,8 +488,7 @@ static int cm_x300_ulpi_phy_reset(void) err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW, "ulpi reset"); if (err) { - pr_err("%s: failed to request ULPI reset GPIO: %d\n", - __func__, err); + pr_err("failed to request ULPI reset GPIO: %d\n", err); return err; } @@ -510,8 +510,7 @@ static inline int cm_x300_u2d_init(struct device *dev) pout_clk = clk_get(NULL, "CLK_POUT"); if (IS_ERR(pout_clk)) { err = PTR_ERR(pout_clk); - pr_err("%s: failed to get CLK_POUT: %d\n", - __func__, err); + pr_err("failed to get CLK_POUT: %d\n", err); return err; } clk_enable(pout_clk); @@ -787,7 +786,7 @@ static void __init cm_x300_init_wi2wi(void) /* Libertas and CSR reset */ err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); if (err) { - pr_err("CM-X300: failed to request wifi/bt gpios: %d\n", err); + pr_err("failed to request wifi/bt gpios: %d\n", err); return; } -- cgit v0.10.2 From b52f0db50b8058567339dd5540e825fbd7df01dc Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Mon, 9 May 2011 14:41:49 +0300 Subject: ARM: pxa/cm-x300: update cm_x300_defconfig Signed-off-by: Igor Grinberg Signed-off-by: Eric Miao diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig index 921e56a..f4b7672 100644 --- a/arch/arm/configs/cm_x300_defconfig +++ b/arch/arm/configs/cm_x300_defconfig @@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_BLK_DEV_INITRD=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_MODULES=y @@ -13,6 +12,7 @@ CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_PXA=y +CONFIG_GPIO_PCA953X=y CONFIG_MACH_CM_X300=y CONFIG_NO_HZ=y CONFIG_AEABI=y @@ -23,7 +23,6 @@ CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400" CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_FPE_NWFPE=y -CONFIG_PM=y CONFIG_APM_EMULATION=y CONFIG_NET=y CONFIG_PACKET=y @@ -40,8 +39,8 @@ CONFIG_IP_PNP_RARP=y # CONFIG_INET_DIAG is not set # CONFIG_IPV6 is not set CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=m @@ -60,7 +59,6 @@ CONFIG_MTD_NAND_PXA3xx=y CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y -# CONFIG_MISC_DEVICES is not set CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_NETDEVICES=y @@ -81,16 +79,15 @@ CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9705 is not set # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_SERIO is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_PXA=y CONFIG_SERIAL_PXA_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_PXA=y CONFIG_SPI=y CONFIG_SPI_GPIO=y CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_PCA953X=y # CONFIG_HWMON is not set CONFIG_PMIC_DA903X=y CONFIG_REGULATOR=y @@ -102,7 +99,6 @@ CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_TDO24M=y # CONFIG_BACKLIGHT_GENERIC is not set CONFIG_BACKLIGHT_DA903X=m -# CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FONTS=y @@ -131,7 +127,6 @@ CONFIG_HID_GREENASIA=y CONFIG_HID_SMARTJOYPLUS=y CONFIG_HID_TOPSEED=y CONFIG_HID_THRUSTMASTER=y -CONFIG_HID_WACOM=m CONFIG_HID_ZEROPLUS=y CONFIG_USB=y CONFIG_USB_DEVICEFS=y @@ -152,7 +147,6 @@ CONFIG_RTC_DRV_PXA=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set -CONFIG_INOTIFY=y CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_TMPFS=y @@ -164,7 +158,6 @@ CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y -CONFIG_SMB_FS=m CONFIG_CIFS=m CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_PARTITION_ADVANCED=y @@ -172,9 +165,7 @@ CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHED_DEBUG is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set CONFIG_SYSCTL_SYSCALL_CHECK=y # CONFIG_FTRACE is not set CONFIG_DEBUG_USER=y @@ -182,7 +173,6 @@ CONFIG_DEBUG_LL=y CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_ARC4=m # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set CONFIG_CRC_T10DIF=y -- cgit v0.10.2 From 250ccd4f343b8ecb50f94d27ef5dc131db337024 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 21 Apr 2011 15:57:04 +0200 Subject: ARM: pxa/magician: fix MAGICIAN_EGPIO_BASE, align with NR_BUILTIN_GPIO Commit "ARM: pxa: align NR_BUILTIN_GPIO with GPIO interrupt number" increased NR_BUILTIN_GPIO from 128 to PXA_GPIO_IRQ_NUM (192). Adjust the previously hardcoded MAGICIAN_EGPIO_BASE accordingly. Signed-off-by: Philipp Zabel Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h index 0a2efcf..7cbfc5d 100644 --- a/arch/arm/mach-pxa/include/mach/magician.h +++ b/arch/arm/mach-pxa/include/mach/magician.h @@ -12,6 +12,7 @@ #ifndef _MAGICIAN_H_ #define _MAGICIAN_H_ +#include #include /* @@ -77,7 +78,7 @@ * CPLD EGPIOs */ -#define MAGICIAN_EGPIO_BASE 0x80 /* GPIO_BOARD_START */ +#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO #define MAGICIAN_EGPIO(reg,bit) \ (MAGICIAN_EGPIO_BASE + 8*reg + bit) -- cgit v0.10.2 From 5db15f86830070e0905940c5d3d92d12c0874424 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 28 Apr 2011 22:21:04 +0200 Subject: ARM: pxa/magician: use gpio arrays for backlight and global gpios Use gpio_request_array() / gpio_free_array() in backlight init and exit functions and global gpio initialization. Signed-off-by: Philipp Zabel Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index e192057..0e42798 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -344,22 +344,14 @@ static struct pxafb_mach_info samsung_info = { * Backlight */ +static struct gpio magician_bl_gpios[] = { + { EGPIO_MAGICIAN_BL_POWER, GPIOF_DIR_OUT, "Backlight power" }, + { EGPIO_MAGICIAN_BL_POWER2, GPIOF_DIR_OUT, "Backlight power 2" }, +}; + static int magician_backlight_init(struct device *dev) { - int ret; - - ret = gpio_request(EGPIO_MAGICIAN_BL_POWER, "BL_POWER"); - if (ret) - goto err; - ret = gpio_request(EGPIO_MAGICIAN_BL_POWER2, "BL_POWER2"); - if (ret) - goto err2; - return 0; - -err2: - gpio_free(EGPIO_MAGICIAN_BL_POWER); -err: - return ret; + return gpio_request_array(ARRAY_AND_SIZE(magician_bl_gpios)); } static int magician_backlight_notify(struct device *dev, int brightness) @@ -376,8 +368,7 @@ static int magician_backlight_notify(struct device *dev, int brightness) static void magician_backlight_exit(struct device *dev) { - gpio_free(EGPIO_MAGICIAN_BL_POWER); - gpio_free(EGPIO_MAGICIAN_BL_POWER2); + gpio_free_array(ARRAY_AND_SIZE(magician_bl_gpios)); } static struct platform_pwm_backlight_data backlight_data = { @@ -712,16 +703,25 @@ static struct platform_device *devices[] __initdata = { &leds_gpio, }; +static struct gpio magician_global_gpios[] = { + { GPIO13_MAGICIAN_CPLD_IRQ, GPIOF_IN, "CPLD_IRQ" }, + { GPIO107_MAGICIAN_DS1WM_IRQ, GPIOF_IN, "DS1WM_IRQ" }, + { GPIO104_MAGICIAN_LCD_POWER_1, GPIOF_OUT_INIT_LOW, "LCD power 1" }, + { GPIO105_MAGICIAN_LCD_POWER_2, GPIOF_OUT_INIT_LOW, "LCD power 2" }, + { GPIO106_MAGICIAN_LCD_POWER_3, GPIOF_OUT_INIT_LOW, "LCD power 3" }, + { GPIO83_MAGICIAN_nIR_EN, GPIOF_OUT_INIT_HIGH, "nIR_EN" }, +}; + static void __init magician_init(void) { void __iomem *cpld; int lcd_select; int err; - gpio_request(GPIO13_MAGICIAN_CPLD_IRQ, "CPLD_IRQ"); - gpio_request(GPIO107_MAGICIAN_DS1WM_IRQ, "DS1WM_IRQ"); - pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config)); + err = gpio_request_array(ARRAY_AND_SIZE(magician_global_gpios)); + if (err) + pr_err("magician: Failed to request GPIOs: %d\n", err); pxa_set_ffuart_info(NULL); pxa_set_btuart_info(NULL); @@ -729,11 +729,7 @@ static void __init magician_init(void) platform_add_devices(ARRAY_AND_SIZE(devices)); - err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN"); - if (!err) { - gpio_direction_output(GPIO83_MAGICIAN_nIR_EN, 1); - pxa_set_ficp_info(&magician_ficp_info); - } + pxa_set_ficp_info(&magician_ficp_info); pxa27x_set_i2c_power_info(NULL); pxa_set_i2c_info(&i2c_info); pxa_set_mci_info(&magician_mci_info); @@ -747,16 +743,9 @@ static void __init magician_init(void) system_rev = board_id & 0x7; lcd_select = board_id & 0x8; pr_info("LCD type: %s\n", lcd_select ? "Samsung" : "Toppoly"); - if (lcd_select && (system_rev < 3)) { - gpio_request(GPIO75_MAGICIAN_SAMSUNG_POWER, "SAMSUNG_POWER"); - gpio_direction_output(GPIO75_MAGICIAN_SAMSUNG_POWER, 0); - } - gpio_request(GPIO104_MAGICIAN_LCD_POWER_1, "LCD_POWER_1"); - gpio_request(GPIO105_MAGICIAN_LCD_POWER_2, "LCD_POWER_2"); - gpio_request(GPIO106_MAGICIAN_LCD_POWER_3, "LCD_POWER_3"); - gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0); - gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0); - gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0); + if (lcd_select && (system_rev < 3)) + gpio_request_one(GPIO75_MAGICIAN_SAMSUNG_POWER, + GPIOF_OUT_INIT_LOW, "SAMSUNG_POWER"); pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info); } else pr_err("LCD detection: CPLD mapping failed\n"); -- cgit v0.10.2 From 6d49e6cfb2a199256ec851b1855dd86de83c5092 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 27 Apr 2011 20:50:19 +0200 Subject: ARM: pxa/hx4700: use gpio arrays for global gpios gpio_request_array() is a functional replacement for hx4700_gpio_request(), which is now obsolete. Signed-off-by: Philipp Zabel Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index f941a49..99960a1 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -135,42 +135,6 @@ static unsigned long hx4700_pin_config[] __initdata = { GPIO66_GPIO, /* nSDIO_IRQ */ }; -#define HX4700_GPIO_IN(num, _desc) \ - { .gpio = (num), .dir = 0, .desc = (_desc) } -#define HX4700_GPIO_OUT(num, _init, _desc) \ - { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) } -struct gpio_ress { - unsigned gpio : 8; - unsigned dir : 1; - unsigned init : 1; - char *desc; -}; - -static int hx4700_gpio_request(struct gpio_ress *gpios, int size) -{ - int i, rc = 0; - int gpio; - int dir; - - for (i = 0; (!rc) && (i < size); i++) { - gpio = gpios[i].gpio; - dir = gpios[i].dir; - rc = gpio_request(gpio, gpios[i].desc); - if (rc) { - pr_err("Error requesting GPIO %d(%s) : %d\n", - gpio, gpios[i].desc, rc); - continue; - } - if (dir) - gpio_direction_output(gpio, gpios[i].init); - else - gpio_direction_input(gpio); - } - while ((rc) && (--i >= 0)) - gpio_free(gpios[i].gpio); - return rc; -} - /* * IRDA */ @@ -829,26 +793,30 @@ static struct platform_device *devices[] __initdata = { &pcmcia, }; -static struct gpio_ress global_gpios[] = { - HX4700_GPIO_IN(GPIO12_HX4700_ASIC3_IRQ, "ASIC3_IRQ"), - HX4700_GPIO_IN(GPIO13_HX4700_W3220_IRQ, "W3220_IRQ"), - HX4700_GPIO_IN(GPIO14_HX4700_nWLAN_IRQ, "WLAN_IRQ"), - HX4700_GPIO_OUT(GPIO59_HX4700_LCD_PC1, 1, "LCD_PC1"), - HX4700_GPIO_OUT(GPIO62_HX4700_LCD_nRESET, 1, "LCD_RESET"), - HX4700_GPIO_OUT(GPIO70_HX4700_LCD_SLIN1, 1, "LCD_SLIN1"), - HX4700_GPIO_OUT(GPIO84_HX4700_LCD_SQN, 1, "LCD_SQN"), - HX4700_GPIO_OUT(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1, "LCD_LVDD"), - HX4700_GPIO_OUT(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1, "LCD_AVDD"), - HX4700_GPIO_OUT(GPIO32_HX4700_RS232_ON, 1, "RS232_ON"), - HX4700_GPIO_OUT(GPIO71_HX4700_ASIC3_nRESET, 1, "ASIC3_nRESET"), - HX4700_GPIO_OUT(GPIO82_HX4700_EUART_RESET, 1, "EUART_RESET"), - HX4700_GPIO_OUT(GPIO105_HX4700_nIR_ON, 1, "nIR_EN"), +static struct gpio global_gpios[] = { + { GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" }, + { GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" }, + { GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" }, + { GPIO59_HX4700_LCD_PC1, GPIOF_OUT_INIT_HIGH, "LCD_PC1" }, + { GPIO62_HX4700_LCD_nRESET, GPIOF_OUT_INIT_HIGH, "LCD_RESET" }, + { GPIO70_HX4700_LCD_SLIN1, GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" }, + { GPIO84_HX4700_LCD_SQN, GPIOF_OUT_INIT_HIGH, "LCD_SQN" }, + { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, + { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, + { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, + { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, + { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, + { GPIO105_HX4700_nIR_ON, GPIOF_OUT_INIT_HIGH, "nIR_EN" }, }; static void __init hx4700_init(void) { + int ret; + pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); - hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios)); + ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); + if (ret) + pr_err ("hx4700: Failed to request GPIOs.\n"); pxa_set_ffuart_info(NULL); pxa_set_btuart_info(NULL); -- cgit v0.10.2 From 4c738b2568340f5a99618d75293d7ee6a9267b1b Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 28 Apr 2011 22:19:32 +0200 Subject: ARM: pxa/mioa701: use gpio arrays for global and gsm gpios gpio_request_array() / gpio_free_array() are functional replacements for mio_gpio_request() / mio_gpio_free(), which are now obsolete. Signed-off-by: Philipp Zabel Acked-by: Robert Jarzmik Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index e347013..aa67637 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -177,50 +177,6 @@ static unsigned long mioa701_pin_config[] = { MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH), }; -#define MIO_GPIO_IN(num, _desc) \ - { .gpio = (num), .dir = 0, .desc = (_desc) } -#define MIO_GPIO_OUT(num, _init, _desc) \ - { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) } -struct gpio_ress { - unsigned gpio : 8; - unsigned dir : 1; - unsigned init : 1; - char *desc; -}; - -static int mio_gpio_request(struct gpio_ress *gpios, int size) -{ - int i, rc = 0; - int gpio; - int dir; - - for (i = 0; (!rc) && (i < size); i++) { - gpio = gpios[i].gpio; - dir = gpios[i].dir; - rc = gpio_request(gpio, gpios[i].desc); - if (rc) { - printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n", - gpio, gpios[i].desc, rc); - continue; - } - if (dir) - gpio_direction_output(gpio, gpios[i].init); - else - gpio_direction_input(gpio); - } - while ((rc) && (--i >= 0)) - gpio_free(gpios[i].gpio); - return rc; -} - -static void mio_gpio_free(struct gpio_ress *gpios, int size) -{ - int i; - - for (i = 0; i < size; i++) - gpio_free(gpios[i].gpio); -} - /* LCD Screen and Backlight */ static struct platform_pwm_backlight_data mioa701_backlight_data = { .pwm_id = 0, @@ -346,16 +302,16 @@ irqreturn_t gsm_on_irq(int irq, void *p) return IRQ_HANDLED; } -struct gpio_ress gsm_gpios[] = { - MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"), - MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"), +static struct gpio gsm_gpios[] = { + { GPIO25_GSM_MOD_ON_STATE, GPIOF_IN, "GSM state" }, + { GPIO113_GSM_EVENT, GPIOF_IN, "GSM event" }, }; static int __init gsm_init(void) { int rc; - rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios)); + rc = gpio_request_array(ARRAY_AND_SIZE(gsm_gpios)); if (rc) goto err_gpio; rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq, @@ -369,7 +325,7 @@ static int __init gsm_init(void) err_irq: printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n"); - mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); + gpio_free_array(ARRAY_AND_SIZE(gsm_gpios)); err_gpio: printk(KERN_ERR "Mioa701: gsm not available\n"); return rc; @@ -378,7 +334,7 @@ err_gpio: static void gsm_exit(void) { free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL); - mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); + gpio_free_array(ARRAY_AND_SIZE(gsm_gpios)); } /* @@ -749,14 +705,16 @@ static void mioa701_restart(char c, const char *cmd) arm_machine_restart('s', cmd); } -static struct gpio_ress global_gpios[] = { - MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"), - MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"), - MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power"), +static struct gpio global_gpios[] = { + { GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" }, + { GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" }, + { GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" }, }; static void __init mioa701_machine_init(void) { + int rc; + PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */ PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE; RTTR = 32768 - 1; /* Reset crazy WinCE value */ @@ -766,7 +724,9 @@ static void __init mioa701_machine_init(void) pxa_set_ffuart_info(NULL); pxa_set_btuart_info(NULL); pxa_set_stuart_info(NULL); - mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); + rc = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); + if (rc) + pr_err("MioA701: Failed to request GPIOs: %d", rc); bootstrap_init(); pxa_set_fb_info(NULL, &mioa701_pxafb_info); pxa_set_mci_info(&mioa701_mci_info); -- cgit v0.10.2 From b34e7b4f05730e6f26e9d8d3736271b0e4cdeac2 Mon Sep 17 00:00:00 2001 From: Dmitry Eremin-Solenikov Date: Tue, 14 Jun 2011 09:21:05 +0400 Subject: ARM: scoop: drop pcmcia_init callback A pcmcia_init callback isn't used on any of the platforms. Drop it. Signed-off-by: Dmitry Eremin-Solenikov Signed-off-by: Eric Miao diff --git a/arch/arm/include/asm/hardware/scoop.h b/arch/arm/include/asm/hardware/scoop.h index ebb3cea..58cdf5d 100644 --- a/arch/arm/include/asm/hardware/scoop.h +++ b/arch/arm/include/asm/hardware/scoop.h @@ -61,7 +61,6 @@ struct scoop_pcmcia_dev { struct scoop_pcmcia_config { struct scoop_pcmcia_dev *devs; int num_devs; - void (*pcmcia_init)(void); void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr); }; diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index 81af2b3..69ae2fd 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c @@ -48,9 +48,6 @@ static int sharpsl_pcmcia_hw_init(struct soc_pcmcia_socket *skt) { int ret; - if (platform_scoop_config->pcmcia_init) - platform_scoop_config->pcmcia_init(); - /* Register interrupts */ if (SCOOP_DEV[skt->nr].cd_irq >= 0) { struct pcmcia_irqs cd_irq; -- cgit v0.10.2 From 226d3a151108970cb0c0c74c3a0ec2c073fdc186 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Mon, 6 Jun 2011 14:52:25 +0100 Subject: pcmcia: pxa2xx/trizeps4: remove unnecessary ifdefs Signed-off-by: Jonathan Cameron Acked-by: Marek Vasut Signed-off-by: Eric Miao diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c index b829e65..57ddb96 100644 --- a/drivers/pcmcia/pxa2xx_trizeps4.c +++ b/drivers/pcmcia/pxa2xx_trizeps4.c @@ -55,10 +55,6 @@ static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) } skt->socket.pci_irq = IRQ_GPIO(GPIO_PRDY); break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - case 1: -#endif default: break; } -- cgit v0.10.2 From 69d042d168ddc683fb51a3c56b90143a1bc49157 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 1 Jul 2011 08:52:25 +0000 Subject: ASoC: omap: McBSP: fix build breakage on OMAP1 After commits d13586574d373ef40acd4725c9a269daa355e412 ("OMAP: McBSP: implement functional clock switching via clock framework") and cf4c87abe238ec17cd0255b4e21abd949d7f811e ("OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c"), any OMAP1 board (such as the AMS Delta) that uses the ASoC McBSP driver will no longer build: sound/built-in.o: In function `omap_mcbsp_dai_set_dai_sysclk': last.c:(.text+0x24ff8): undefined reference to `omap2_mcbsp1_mux_clkr_src' last.c:(.text+0x2500c): undefined reference to `omap2_mcbsp1_mux_fsr_src' make: *** [vmlinux] Error 1 Fix by defining three OMAP1-only dummy functions for omap2_mcbsp1_mux_clkr_src(), omap2_mcbsp1_mux_fsr_src(), and omap2_mcbsp_set_clks_src(). Normally, code that is OMAP SoC-revision-specific like this should go under the arch/arm/*omap* directories, and get abstracted away from drivers via struct platform_data function pointers. This doesn't work in this case since there doesn't appear to be any convenient way to access struct platform_data (or something like it) in the current design of the sound/soc/omap/omap-mcbsp.c driver. Reported by Janusz Krzysztofik and Tony Lindgren . Janusz also posted a patch to fix this at: http://www.spinics.net/lists/linux-omap/msg39560.html (among other places), but the following approach seems less dependent on compiler behavior. This patch passes build tests for ams_delta_defconfig and omap2plus_defconfig, but since I don't have an AMS Delta here, I can't boot test it on that platform. Signed-off-by: Paul Walmsley Cc: Janusz Krzysztofik Cc: Tony Lindgren Cc: Jarkko Nikula Cc: Peter Ujfalusi Cc: Mark Brown Cc: Liam Girdwood Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 3c1fbdc..6c62af1 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -966,6 +966,33 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) } EXPORT_SYMBOL(omap_mcbsp_stop); +/* + * The following functions are only required on an OMAP1-only build. + * mach-omap2/mcbsp.c contains the real functions + */ +#ifndef CONFIG_ARCH_OMAP2PLUS +int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return -EINVAL; +} + +void omap2_mcbsp1_mux_clkr_src(u8 mux) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return; +} + +void omap2_mcbsp1_mux_fsr_src(u8 mux) +{ + WARN(1, "%s: should never be called on an OMAP1-only kernel\n", + __func__); + return; +} +#endif + #ifdef CONFIG_ARCH_OMAP3 #define max_thres(m) (mcbsp->pdata->buffer_size) #define valid_threshold(m, val) ((val) <= max_thres(m)) -- cgit v0.10.2 From 82d508fac3e680b7853275090c3b1a3db2461198 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:11:14 +0200 Subject: ARM: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for arch/arm/mach-shmobile/board-ap4evb.c This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index f6b687f..04bc123 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -443,7 +443,7 @@ static struct platform_device usb1_host_device = { .resource = usb1_host_resources, }; -const static struct fb_videomode ap4evb_lcdc_modes[] = { +static const struct fb_videomode ap4evb_lcdc_modes[] = { { #ifdef CONFIG_AP4EVB_QHD .name = "R63302(QHD)", -- cgit v0.10.2 From 628d7f697c9bcde82620895d25848c301e43ac30 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:12:35 +0200 Subject: MIPS: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for arch/mips/include/asm/mach-jz4740/gpio.h This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Also a few tiny whitespace changes. Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/arch/mips/include/asm/mach-jz4740/gpio.h b/arch/mips/include/asm/mach-jz4740/gpio.h index 7b74703..1a6482e 100644 --- a/arch/mips/include/asm/mach-jz4740/gpio.h +++ b/arch/mips/include/asm/mach-jz4740/gpio.h @@ -25,14 +25,13 @@ enum jz_gpio_function { JZ_GPIO_FUNC3, }; - /* Usually a driver for a SoC component has to request several gpio pins and configure them as funcion pins. jz_gpio_bulk_request can be used to ease this process. Usually one would do something like: - const static struct jz_gpio_bulk_request i2c_pins[] = { + static const struct jz_gpio_bulk_request i2c_pins[] = { JZ_GPIO_BULK_PIN(I2C_SDA), JZ_GPIO_BULK_PIN(I2C_SCK), }; @@ -47,8 +46,8 @@ enum jz_gpio_function { jz_gpio_bulk_free(i2c_pins, ARRAY_SIZE(i2c_pins)); - */ + struct jz_gpio_bulk_request { int gpio; const char *name; -- cgit v0.10.2 From e04008eb38d8b0e3bca926c23cbea309edce164b Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:16:22 +0200 Subject: SH: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for arch/sh/* This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c index 969421f..1dc924b 100644 --- a/arch/sh/boards/mach-ap325rxa/setup.c +++ b/arch/sh/boards/mach-ap325rxa/setup.c @@ -188,7 +188,7 @@ static void ap320_wvga_power_off(void *board_data) __raw_writew(0, FPGA_LCDREG); } -const static struct fb_videomode ap325rxa_lcdc_modes[] = { +static const struct fb_videomode ap325rxa_lcdc_modes[] = { { .name = "LB070WV1", .xres = 800, diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 3a32741..f80478f 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -233,7 +233,7 @@ static struct platform_device usb1_common_device = { }; /* LCDC */ -const static struct fb_videomode ecovec_lcd_modes[] = { +static const struct fb_videomode ecovec_lcd_modes[] = { { .name = "Panel", .xres = 800, @@ -248,7 +248,7 @@ const static struct fb_videomode ecovec_lcd_modes[] = { }, }; -const static struct fb_videomode ecovec_dvi_modes[] = { +static const struct fb_videomode ecovec_dvi_modes[] = { { .name = "DVI", .xres = 1280, diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c index 8b4abbb..f65271a 100644 --- a/arch/sh/boards/mach-kfr2r09/setup.c +++ b/arch/sh/boards/mach-kfr2r09/setup.c @@ -127,7 +127,7 @@ static struct platform_device kfr2r09_sh_keysc_device = { }, }; -const static struct fb_videomode kfr2r09_lcdc_modes[] = { +static const struct fb_videomode kfr2r09_lcdc_modes[] = { { .name = "TX07D34VM0AAA", .xres = 240, diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 184fde1..2d4c9c8 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c @@ -214,7 +214,7 @@ static struct platform_device migor_nand_flash_device = { } }; -const static struct fb_videomode migor_lcd_modes[] = { +static const struct fb_videomode migor_lcd_modes[] = { { #if defined(CONFIG_SH_MIGOR_RTA_WVGA) .name = "LB070WV1", diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index 1235767..d007567 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -145,7 +145,7 @@ static struct platform_device nor_flash_device = { }; /* LCDC */ -const static struct fb_videomode lcdc_720p_modes[] = { +static const struct fb_videomode lcdc_720p_modes[] = { { .name = "LB070WV1", .sync = 0, /* hsync and vsync are active low */ @@ -160,7 +160,7 @@ const static struct fb_videomode lcdc_720p_modes[] = { }, }; -const static struct fb_videomode lcdc_vga_modes[] = { +static const struct fb_videomode lcdc_vga_modes[] = { { .name = "LB070WV1", .sync = 0, /* hsync and vsync are active low */ -- cgit v0.10.2 From 14559f2f9a8b7e5d565c7de34a95097ee331c5cb Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:17:59 +0200 Subject: XTENSA: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for arch/xtensa/variants/s6000/include/variant/dmac.h This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/arch/xtensa/variants/s6000/include/variant/dmac.h b/arch/xtensa/variants/s6000/include/variant/dmac.h index 89ab948..e81735b 100644 --- a/arch/xtensa/variants/s6000/include/variant/dmac.h +++ b/arch/xtensa/variants/s6000/include/variant/dmac.h @@ -357,7 +357,7 @@ static inline u32 s6dmac_channel_enabled(u32 dmac, int chan) static inline void s6dmac_dp_setup_group(u32 dmac, int port, int nrch, int frrep) { - const static u8 mask[4] = {0, 3, 1, 2}; + static const u8 mask[4] = {0, 3, 1, 2}; BUG_ON(dmac != S6_REG_DPDMA); if ((port < 0) || (port > 3) || (nrch < 1) || (nrch > 4)) return; -- cgit v0.10.2 From 32575a9183c82a5ea0f9ed1bcf13c17189ea1118 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:20:42 +0200 Subject: drivers/i2c: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for drivers/i2c/busses/i2c-omap.c This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 58a58c7..1a766cf 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -204,7 +204,7 @@ struct omap_i2c_dev { u16 errata; }; -const static u8 reg_map[] = { +static const u8 reg_map[] = { [OMAP_I2C_REV_REG] = 0x00, [OMAP_I2C_IE_REG] = 0x01, [OMAP_I2C_STAT_REG] = 0x02, @@ -225,7 +225,7 @@ const static u8 reg_map[] = { [OMAP_I2C_BUFSTAT_REG] = 0x10, }; -const static u8 omap4_reg_map[] = { +static const u8 omap4_reg_map[] = { [OMAP_I2C_REV_REG] = 0x04, [OMAP_I2C_IE_REG] = 0x2c, [OMAP_I2C_STAT_REG] = 0x28, -- cgit v0.10.2 From c172d82500a6cf3c32d1e650722a1055d72ce858 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:22:17 +0200 Subject: drivers/media: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for drivers/media/video/omap/omap_vout.c This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c index 4ada9be..bb17f79 100644 --- a/drivers/media/video/omap/omap_vout.c +++ b/drivers/media/video/omap/omap_vout.c @@ -129,7 +129,7 @@ module_param(debug, bool, S_IRUGO); MODULE_PARM_DESC(debug, "Debug level (0-1)"); /* list of image formats supported by OMAP2 video pipelines */ -const static struct v4l2_fmtdesc omap_formats[] = { +static const struct v4l2_fmtdesc omap_formats[] = { { /* Note: V4L2 defines RGB565 as: * -- cgit v0.10.2 From 587360885c0e7aa403831c29be1984b746fd24fb Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sat, 9 Jul 2011 23:24:43 +0200 Subject: drivers/net: static should be at beginning of declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure that the 'static' keywork is at the beginning of declaration for drivers/net/usb/kalmia.c This gets rid of warnings like warning: ‘static’ is not at beginning of declaration when building with -Wold-style-declaration (and/or -Wextra which also enables it). Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina diff --git a/drivers/net/usb/kalmia.c b/drivers/net/usb/kalmia.c index a9b6c63..5a6d0f8 100644 --- a/drivers/net/usb/kalmia.c +++ b/drivers/net/usb/kalmia.c @@ -100,13 +100,13 @@ kalmia_send_init_packet(struct usbnet *dev, u8 *init_msg, u8 init_msg_len, static int kalmia_init_and_get_ethernet_addr(struct usbnet *dev, u8 *ethernet_addr) { - const static char init_msg_1[] = + static const char init_msg_1[] = { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00 }; - const static char init_msg_2[] = + static const char init_msg_2[] = { 0x57, 0x50, 0x04, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xf4, 0x00, 0x00 }; - const static int buflen = 28; + static const int buflen = 28; char *usb_buf; int status; @@ -239,11 +239,11 @@ kalmia_rx_fixup(struct usbnet *dev, struct sk_buff *skb) * Our task here is to strip off framing, leaving skb with one * data frame for the usbnet framework code to process. */ - const static u8 HEADER_END_OF_USB_PACKET[] = + static const u8 HEADER_END_OF_USB_PACKET[] = { 0x57, 0x5a, 0x00, 0x00, 0x08, 0x00 }; - const static u8 EXPECTED_UNKNOWN_HEADER_1[] = + static const u8 EXPECTED_UNKNOWN_HEADER_1[] = { 0x57, 0x43, 0x1e, 0x00, 0x15, 0x02 }; - const static u8 EXPECTED_UNKNOWN_HEADER_2[] = + static const u8 EXPECTED_UNKNOWN_HEADER_2[] = { 0x57, 0x50, 0x0e, 0x00, 0x00, 0x00 }; int i = 0; -- cgit v0.10.2 From 2dc98fd3206f8106520eced769781a21a20707ca Mon Sep 17 00:00:00 2001 From: Michael Witten Date: Fri, 8 Jul 2011 21:11:16 +0000 Subject: doc: Konfig: Documentation/power/{pm => apm-acpi}.txt Signed-off-by: Michael Witten Signed-off-by: Jiri Kosina diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index da34972..ab03e88 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1737,8 +1737,8 @@ menuconfig APM machines with more than one CPU. In order to use APM, you will need supporting software. For location - and more information, read and the - Battery Powered Linux mini-HOWTO, available from + and more information, read + and the Battery Powered Linux mini-HOWTO, available from . This driver does not spin down disk drives (see the hdparm(8) diff --git a/kernel/power/Kconfig b/kernel/power/Kconfig index 87f4d24..bcd8fce3 100644 --- a/kernel/power/Kconfig +++ b/kernel/power/Kconfig @@ -193,8 +193,8 @@ config APM_EMULATION notification of APM "events" (e.g. battery status change). In order to use APM, you will need supporting software. For location - and more information, read and the - Battery Powered Linux mini-HOWTO, available from + and more information, read + and the Battery Powered Linux mini-HOWTO, available from . This driver does not spin down disk drives (see the hdparm(8) -- cgit v0.10.2 From 622e040d577dc8a7a6efbfa4f056448f62b4039a Mon Sep 17 00:00:00 2001 From: Michael Witten Date: Fri, 8 Jul 2011 22:33:24 +0000 Subject: doc: Kconfig: Typo: square -> squared Signed-off-by: Michael Witten Signed-off-by: Jiri Kosina diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 30f06e9..5f13c62 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -7,7 +7,7 @@ menuconfig I2C depends on HAS_IOMEM select RT_MUTEXES ---help--- - I2C (pronounce: I-square-C) is a slow serial bus protocol used in + I2C (pronounce: I-squared-C) is a slow serial bus protocol used in many micro controller applications and developed by Philips. SMBus, or System Management Bus is a subset of the I2C protocol. More information is contained in the directory , -- cgit v0.10.2 From 35ed4b35beb875adee4d84f9e5e31449cab13c3f Mon Sep 17 00:00:00 2001 From: Michael Witten Date: Sat, 9 Jul 2011 04:02:31 +0000 Subject: doc: Kconfig: `to be' -> `be' Also, a comma was inserted to offset a modifier. Signed-off-by: Michael Witten Signed-off-by: Jiri Kosina diff --git a/crypto/Kconfig b/crypto/Kconfig index 87b22ca..749c78e 100644 --- a/crypto/Kconfig +++ b/crypto/Kconfig @@ -354,7 +354,7 @@ config CRYPTO_RMD128 RIPEMD-128 (ISO/IEC 10118-3:2004). RIPEMD-128 is a 128-bit cryptographic hash function. It should only - to be used as a secure replacement for RIPEMD. For other use cases + be used as a secure replacement for RIPEMD. For other use cases, RIPEMD-160 should be used. Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel. -- cgit v0.10.2 From 0420b32c01fda83e845752ca465584e21ebb4d3a Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 11 Jul 2011 11:38:11 +0200 Subject: mach-integrator: delete bits.h include file Not only does this file duplicate and implement a well-known antipattern, it is also not used by anything. Signed-off-by: Linus Walleij Acked-by: Russell King Signed-off-by: Arnd Bergmann diff --git a/arch/arm/mach-integrator/include/mach/bits.h b/arch/arm/mach-integrator/include/mach/bits.h deleted file mode 100644 index 09b024e..0000000 --- a/arch/arm/mach-integrator/include/mach/bits.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Bit field definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __bits_h -#define __bits_h 1 - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - -#endif - -/* END */ -- cgit v0.10.2 From 78f23926dff9c8587d510fa4d746e77a8ad9410d Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 12 Jul 2011 04:53:56 +0200 Subject: Staging: delete westbridge code It's been stagnant for a while with out much forward progress for a variety of different reasons. So remove it for now. It can be reverted at any time if development picks back up again. Acked-by: David Cross Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 6780df0..06c9081 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -124,8 +124,6 @@ source "drivers/staging/tidspbridge/Kconfig" source "drivers/staging/quickstart/Kconfig" -source "drivers/staging/westbridge/Kconfig" - source "drivers/staging/sbe-2t3e3/Kconfig" source "drivers/staging/ath6kl/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 36a8b84..f3c5e33 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_EASYCAP) += easycap/ obj-$(CONFIG_SOLO6X10) += solo6x10/ obj-$(CONFIG_TIDSPBRIDGE) += tidspbridge/ obj-$(CONFIG_ACPI_QUICKSTART) += quickstart/ -obj-$(CONFIG_WESTBRIDGE_ASTORIA) += westbridge/astoria/ obj-$(CONFIG_SBE_2T3E3) += sbe-2t3e3/ obj-$(CONFIG_ATH6K_LEGACY) += ath6kl/ obj-$(CONFIG_USB_ENESTORAGE) += keucr/ diff --git a/drivers/staging/westbridge/Kconfig b/drivers/staging/westbridge/Kconfig deleted file mode 100644 index 2b1c2ae..0000000 --- a/drivers/staging/westbridge/Kconfig +++ /dev/null @@ -1,53 +0,0 @@ -# -# West Bridge configuration -# - -menuconfig WESTBRIDGE - tristate "West Bridge support" - depends on WESTBRIDGE_HAL_SELECTED - help - This selects West Bridge Peripheral controller support. - - If you want West Bridge support, you should say Y here. - -menuconfig WESTBRIDGE_ASTORIA - bool "West Bridge Astoria support" - depends on WESTBRIDGE != n && WESTBRIDGE_HAL_SELECTED - help - This option enables support for West Bridge Astoria - -if WESTBRIDGE_ASTORIA -source "drivers/staging/westbridge/astoria/Kconfig" -endif #WESTBRIDGE_ASTORIA - -config WESTBRIDGE_HAL_SELECTED - boolean - -choice - prompt "West Bridge HAL" - help - West Bridge HAL/processor interface to be used - -# -# HAL Layers -# - -config MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - bool "WESTBRIDGE OMAP3430 Astoria PNAND HAL" - depends on ARCH_OMAP3 - select WESTBRIDGE_HAL_SELECTED - help - Include the OMAP3430 HAL for PNAND interface - -config MACH_NO_WESTBRIDGE - bool "no West Bridge HAL selected" - help - Do not include any HAL layer(de-activates West Bridge option) -endchoice - -config WESTBRIDGE_DEBUG - bool "West Bridge debugging" - depends on WESTBRIDGE != n - help - This is an option for use by developers; most people should - say N here. This enables WESTBRIDGE core and driver debugging. diff --git a/drivers/staging/westbridge/TODO b/drivers/staging/westbridge/TODO deleted file mode 100644 index 6ca8058..0000000 --- a/drivers/staging/westbridge/TODO +++ /dev/null @@ -1,7 +0,0 @@ -TODO: -- checkpatch.pl fixes -- determine where to put the hal and common api code -- modify the driver directory structure in an intuitive way - -Please send any patches to Greg Kroah-Hartman -and David Cross . diff --git a/drivers/staging/westbridge/astoria/Kconfig b/drivers/staging/westbridge/astoria/Kconfig deleted file mode 100644 index 1ce388a..0000000 --- a/drivers/staging/westbridge/astoria/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# -# West Bridge configuration -# -source "drivers/staging/westbridge/astoria/device/Kconfig" - -source "drivers/staging/westbridge/astoria/block/Kconfig" - -source "drivers/staging/westbridge/astoria/gadget/Kconfig" - diff --git a/drivers/staging/westbridge/astoria/Makefile b/drivers/staging/westbridge/astoria/Makefile deleted file mode 100644 index 907bdb2..0000000 --- a/drivers/staging/westbridge/astoria/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the kernel westbridge device drivers. -# - -ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) - EXTRA_CFLAGS += -WESTBRIDGE_NDEBUG -endif - -obj-$(CONFIG_WESTBRIDGE) += device/ -obj-$(CONFIG_WESTBRIDGE) += block/ -obj-$(CONFIG_WESTBRIDGE) += gadget/ \ No newline at end of file diff --git a/drivers/staging/westbridge/astoria/api/Makefile b/drivers/staging/westbridge/astoria/api/Makefile deleted file mode 100644 index 1c94bc7..0000000 --- a/drivers/staging/westbridge/astoria/api/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# Makefile for the kernel westbridge core. -# - -ifeq ($(CONFIG_WESTBRIDGE_DEBUG),n) - EXTRA_CFLAGS += -NDEBUG -endif - -obj-$(CONFIG_WESTBRIDGE_DEVICE_DRIVER) += cyasapi.o -cyasapi-y := src/cyasdma.o src/cyasintr.o src/cyaslep2pep.o \ - src/cyaslowlevel.o src/cyasmisc.o src/cyasmtp.o \ - src/cyasstorage.o src/cyasusb.o - - diff --git a/drivers/staging/westbridge/astoria/api/src/cyasdma.c b/drivers/staging/westbridge/astoria/api/src/cyasdma.c deleted file mode 100644 index c461d4f..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasdma.c +++ /dev/null @@ -1,1107 +0,0 @@ -/* Cypress West Bridge API source file (cyasdma.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasdma.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasregs.h" - -/* - * Add the DMA queue entry to the free list to be re-used later - */ -static void -cy_as_dma_add_request_to_free_queue(cy_as_device *dev_p, - cy_as_dma_queue_entry *req_p) -{ - uint32_t imask; - imask = cy_as_hal_disable_interrupts(); - - req_p->next_p = dev_p->dma_freelist_p; - dev_p->dma_freelist_p = req_p; - - cy_as_hal_enable_interrupts(imask); -} - -/* - * Get a DMA queue entry from the free list. - */ -static cy_as_dma_queue_entry * -cy_as_dma_get_dma_queue_entry(cy_as_device *dev_p) -{ - cy_as_dma_queue_entry *req_p; - uint32_t imask; - - cy_as_hal_assert(dev_p->dma_freelist_p != 0); - - imask = cy_as_hal_disable_interrupts(); - req_p = dev_p->dma_freelist_p; - dev_p->dma_freelist_p = req_p->next_p; - cy_as_hal_enable_interrupts(imask); - - return req_p; -} - -/* - * Set the maximum size that the West Bridge hardware - * can handle in a single DMA operation. This size - * may change for the P <-> U endpoints as a function - * of the endpoint type and whether we are running - * at full speed or high speed. - */ -cy_as_return_status_t -cy_as_dma_set_max_dma_size(cy_as_device *dev_p, - cy_as_end_point_number_t ep, uint32_t size) -{ - /* In MTP mode, EP2 is allowed to have all max sizes. */ - if ((!dev_p->is_mtp_firmware) || (ep != 0x02)) { - if (size < 64 || size > 1024) - return CY_AS_ERROR_INVALID_SIZE; - } - - CY_AS_NUM_EP(dev_p, ep)->maxhwdata = (uint16_t)size; - return CY_AS_ERROR_SUCCESS; -} - -/* - * The callback for requests sent to West Bridge - * to relay endpoint data. Endpoint data for EP0 - * and EP1 are sent using mailbox requests. This - * is the callback that is called when a response - * to a mailbox request to send data is received. - */ -static void -cy_as_dma_request_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *resp_p, - cy_as_return_status_t ret) -{ - uint16_t v; - uint16_t datacnt; - cy_as_end_point_number_t ep; - - (void)context; - - cy_as_log_debug_message(5, "cy_as_dma_request_callback called"); - - /* - * extract the return code from the firmware - */ - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp_p) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(resp_p, 0); - } - - /* - * extract the endpoint number and the transferred byte count - * from the request. - */ - v = cy_as_ll_request_response__get_word(req_p, 0); - ep = (cy_as_end_point_number_t)((v >> 13) & 0x01); - - if (ret == CY_AS_ERROR_SUCCESS) { - /* - * if the firmware returns success, - * all of the data requested was - * transferred. there are no partial - * transfers. - */ - datacnt = v & 0x3FF; - } else { - /* - * if the firmware returned an error, no data was transferred. - */ - datacnt = 0; - } - - /* - * queue the request and response data structures for use with the - * next EP0 or EP1 request. - */ - if (ep == 0) { - dev_p->usb_ep0_dma_req = req_p; - dev_p->usb_ep0_dma_resp = resp_p; - } else { - dev_p->usb_ep1_dma_req = req_p; - dev_p->usb_ep1_dma_resp = resp_p; - } - - /* - * call the DMA complete function so we can - * signal that this portion of the transfer - * has completed. if the low level request - * was canceled, we do not need to signal - * the completed function as the only way a - * cancel can happen is via the DMA cancel - * function. - */ - if (ret != CY_AS_ERROR_CANCELED) - cy_as_dma_completed_callback(dev_p->tag, ep, datacnt, ret); -} - -/* - * Set the DRQ mask register for the given endpoint number. If state is - * CyTrue, the DRQ interrupt for the given endpoint is enabled, otherwise - * it is disabled. - */ -static void -cy_as_dma_set_drq(cy_as_device *dev_p, - cy_as_end_point_number_t ep, cy_bool state) -{ - uint16_t mask; - uint16_t v; - uint32_t intval; - - /* - * there are not DRQ register bits for EP0 and EP1 - */ - if (ep == 0 || ep == 1) - return; - - /* - * disable interrupts while we do this to be sure the state of the - * DRQ mask register is always well defined. - */ - intval = cy_as_hal_disable_interrupts(); - - /* - * set the DRQ bit to the given state for the ep given - */ - mask = (1 << ep); - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_DRQ_MASK); - - if (state) - v |= mask; - else - v &= ~mask; - - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_P0_DRQ_MASK, v); - cy_as_hal_enable_interrupts(intval); -} - -/* -* Send the next DMA request for the endpoint given -*/ -static void -cy_as_dma_send_next_dma_request(cy_as_device *dev_p, cy_as_dma_end_point *ep_p) -{ - uint32_t datacnt; - void *buf_p; - cy_as_dma_queue_entry *dma_p; - - cy_as_log_debug_message(6, "cy_as_dma_send_next_dma_request called"); - - /* If the queue is empty, nothing to do */ - dma_p = ep_p->queue_p; - if (dma_p == 0) { - /* - * there are no pending DMA requests - * for this endpoint. disable the DRQ - * mask bits to insure no interrupts - * will be triggered by this endpoint - * until someone is interested in the data. - */ - cy_as_dma_set_drq(dev_p, ep_p->ep, cy_false); - return; - } - - cy_as_dma_end_point_set_running(ep_p); - - /* - * get the number of words that still - * need to be xferred in this request. - */ - datacnt = dma_p->size - dma_p->offset; - cy_as_hal_assert(datacnt >= 0); - - /* - * the HAL layer should never limit the size - * of the transfer to something less than the - * maxhwdata otherwise, the data will be sent - * in packets that are not correct in size. - */ - cy_as_hal_assert(ep_p->maxhaldata == CY_AS_DMA_MAX_SIZE_HW_SIZE - || ep_p->maxhaldata >= ep_p->maxhwdata); - - /* - * update the number of words that need to be xferred yet - * based on the limits of the HAL layer. - */ - if (ep_p->maxhaldata == CY_AS_DMA_MAX_SIZE_HW_SIZE) { - if (datacnt > ep_p->maxhwdata) - datacnt = ep_p->maxhwdata; - } else { - if (datacnt > ep_p->maxhaldata) - datacnt = ep_p->maxhaldata; - } - - /* - * find a pointer to the data that needs to be transferred - */ - buf_p = (((char *)dma_p->buf_p) + dma_p->offset); - - /* - * mark a request in transit - */ - cy_as_dma_end_point_set_in_transit(ep_p); - - if (ep_p->ep == 0 || ep_p->ep == 1) { - /* - * if this is a WRITE request on EP0 and EP1 - * we write the data via an EP_DATA request - * to west bridge via the mailbox registers. - * if this is a READ request, we do nothing - * and the data will arrive via an EP_DATA - * request from west bridge. in the request - * handler for the USB context we will pass - * the data back into the DMA module. - */ - if (dma_p->readreq == cy_false) { - uint16_t v; - uint16_t len; - cy_as_ll_request_response *resp_p; - cy_as_ll_request_response *req_p; - cy_as_return_status_t ret; - - len = (uint16_t)(datacnt / 2); - if (datacnt % 2) - len++; - - len++; - - if (ep_p->ep == 0) { - req_p = dev_p->usb_ep0_dma_req; - resp_p = dev_p->usb_ep0_dma_resp; - dev_p->usb_ep0_dma_req = 0; - dev_p->usb_ep0_dma_resp = 0; - } else { - req_p = dev_p->usb_ep1_dma_req; - resp_p = dev_p->usb_ep1_dma_resp; - dev_p->usb_ep1_dma_req = 0; - dev_p->usb_ep1_dma_resp = 0; - } - - cy_as_hal_assert(req_p != 0); - cy_as_hal_assert(resp_p != 0); - cy_as_hal_assert(len <= 64); - - cy_as_ll_init_request(req_p, CY_RQT_USB_EP_DATA, - CY_RQT_USB_RQT_CONTEXT, len); - - v = (uint16_t)(datacnt | (ep_p->ep << 13) | (1 << 14)); - if (dma_p->offset == 0) - v |= (1 << 12);/* Set the first packet bit */ - if (dma_p->offset + datacnt == dma_p->size) - v |= (1 << 11);/* Set the last packet bit */ - - cy_as_ll_request_response__set_word(req_p, 0, v); - cy_as_ll_request_response__pack(req_p, - 1, datacnt, buf_p); - - cy_as_ll_init_response(resp_p, 1); - - ret = cy_as_ll_send_request(dev_p, req_p, resp_p, - cy_false, cy_as_dma_request_callback); - if (ret == CY_AS_ERROR_SUCCESS) - cy_as_log_debug_message(5, - "+++ send EP 0/1 data via mailbox registers"); - else - cy_as_log_debug_message(5, - "+++ error sending EP 0/1 data via mailbox " - "registers - CY_AS_ERROR_TIMEOUT"); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_dma_completed_callback(dev_p->tag, - ep_p->ep, 0, ret); - } - } else { - /* - * this is a DMA request on an endpoint that is accessible - * via the P port. ask the HAL DMA capabilities to - * perform this. the amount of data sent is limited by the - * HAL max size as well as what we need to send. if the - * ep_p->maxhaldata is set to a value larger than the - * endpoint buffer size, then we will pass more than a - * single buffer worth of data to the HAL layer and expect - * the HAL layer to divide the data into packets. the last - * parameter here (ep_p->maxhwdata) gives the packet size for - * the data so the HAL layer knows what the packet size should - * be. - */ - if (cy_as_dma_end_point_is_direction_in(ep_p)) - cy_as_hal_dma_setup_write(dev_p->tag, - ep_p->ep, buf_p, datacnt, ep_p->maxhwdata); - else - cy_as_hal_dma_setup_read(dev_p->tag, - ep_p->ep, buf_p, datacnt, ep_p->maxhwdata); - - /* - * the DRQ interrupt for this endpoint should be enabled - * so that the data transfer progresses at interrupt time. - */ - cy_as_dma_set_drq(dev_p, ep_p->ep, cy_true); - } -} - -/* - * This function is called when the HAL layer has - * completed the last requested DMA operation. - * This function sends/receives the next batch of - * data associated with the current DMA request, - * or it is is complete, moves to the next DMA request. - */ -void -cy_as_dma_completed_callback(cy_as_hal_device_tag tag, - cy_as_end_point_number_t ep, uint32_t cnt, cy_as_return_status_t status) -{ - uint32_t mask; - cy_as_dma_queue_entry *req_p; - cy_as_dma_end_point *ep_p; - cy_as_device *dev_p = cy_as_device_find_from_tag(tag); - - /* Make sure the HAL layer gave us good parameters */ - cy_as_hal_assert(dev_p != 0); - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - cy_as_hal_assert(ep < 16); - - - /* Get the endpoint ptr */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - cy_as_hal_assert(ep_p->queue_p != 0); - - /* Get a pointer to the current entry in the queue */ - mask = cy_as_hal_disable_interrupts(); - req_p = ep_p->queue_p; - - /* Update the offset to reflect the data actually received or sent */ - req_p->offset += cnt; - - /* - * if we are still sending/receiving the current packet, - * send/receive the next chunk basically we keep going - * if we have not sent/received enough data, and we are - * not doing a packet operation, and the last packet - * sent or received was a full sized packet. in other - * words, when we are NOT doing a packet operation, a - * less than full size packet (a short packet) will - * terminate the operation. - * - * note: if this is EP1 request and the request has - * timed out, it means the buffer is not free. - * we have to resend the data. - * - * note: for the MTP data transfers, the DMA transfer - * for the next packet can only be started asynchronously, - * after a firmware event notifies that the device is ready. - */ - if (((req_p->offset != req_p->size) && (req_p->packet == cy_false) && - ((cnt == ep_p->maxhaldata) || ((cnt == ep_p->maxhwdata) && - ((ep != CY_AS_MTP_READ_ENDPOINT) || - (cnt == dev_p->usb_max_tx_size))))) - || ((ep == 1) && (status == CY_AS_ERROR_TIMEOUT))) { - cy_as_hal_enable_interrupts(mask); - - /* - * and send the request again to send the next block of - * data. special handling for MTP transfers on E_ps 2 - * and 6. the send_next_request will be processed based - * on the event sent by the firmware. - */ - if ((ep == CY_AS_MTP_WRITE_ENDPOINT) || ( - (ep == CY_AS_MTP_READ_ENDPOINT) && - (!cy_as_dma_end_point_is_direction_in(ep_p)))) - cy_as_dma_end_point_set_stopped(ep_p); - else - cy_as_dma_send_next_dma_request(dev_p, ep_p); - } else { - /* - * we get here if ... - * we have sent or received all of the data - * or - * we are doing a packet operation - * or - * we receive a short packet - */ - - /* - * remove this entry from the DMA queue for this endpoint. - */ - cy_as_dma_end_point_clear_in_transit(ep_p); - ep_p->queue_p = req_p->next_p; - if (ep_p->last_p == req_p) { - /* - * we have removed the last packet from the DMA queue, - * disable the interrupt associated with this interrupt. - */ - ep_p->last_p = 0; - cy_as_hal_enable_interrupts(mask); - cy_as_dma_set_drq(dev_p, ep, cy_false); - } else - cy_as_hal_enable_interrupts(mask); - - if (req_p->cb) { - /* - * if the request has a callback associated with it, - * call the callback to tell the interested party that - * this DMA request has completed. - * - * note, we set the in_callback bit to insure that we - * cannot recursively call an API function that is - * synchronous only from a callback. - */ - cy_as_device_set_in_callback(dev_p); - (*req_p->cb)(dev_p, ep, req_p->buf_p, - req_p->offset, status); - cy_as_device_clear_in_callback(dev_p); - } - - /* - * we are done with this request, put it on the freelist to be - * reused at a later time. - */ - cy_as_dma_add_request_to_free_queue(dev_p, req_p); - - if (ep_p->queue_p == 0) { - /* - * if the endpoint is out of DMA entries, set the - * endpoint as stopped. - */ - cy_as_dma_end_point_set_stopped(ep_p); - - /* - * the DMA queue is empty, wake any task waiting on - * the QUEUE to drain. - */ - if (cy_as_dma_end_point_is_sleeping(ep_p)) { - cy_as_dma_end_point_set_wake_state(ep_p); - cy_as_hal_wake(&ep_p->channel); - } - } else { - /* - * if the queued operation is a MTP transfer, - * wait until firmware event before sending - * down the next DMA request. - */ - if ((ep == CY_AS_MTP_WRITE_ENDPOINT) || - ((ep == CY_AS_MTP_READ_ENDPOINT) && - (!cy_as_dma_end_point_is_direction_in(ep_p))) || - ((ep == dev_p->storage_read_endpoint) && - (!cy_as_device_is_p2s_dma_start_recvd(dev_p))) - || ((ep == dev_p->storage_write_endpoint) && - (!cy_as_device_is_p2s_dma_start_recvd(dev_p)))) - cy_as_dma_end_point_set_stopped(ep_p); - else - cy_as_dma_send_next_dma_request(dev_p, ep_p); - } - } -} - -/* -* This function is used to kick start DMA on a given -* channel. If DMA is already running on the given -* endpoint, nothing happens. If DMA is not running, -* the first entry is pulled from the DMA queue and -* sent/recevied to/from the West Bridge device. -*/ -cy_as_return_status_t -cy_as_dma_kick_start(cy_as_device *dev_p, cy_as_end_point_number_t ep) -{ - cy_as_dma_end_point *ep_p; - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - ep_p = CY_AS_NUM_EP(dev_p, ep); - - /* We are already running */ - if (cy_as_dma_end_point_is_running(ep_p)) - return CY_AS_ERROR_SUCCESS; - - cy_as_dma_send_next_dma_request(dev_p, ep_p); - return CY_AS_ERROR_SUCCESS; -} - -/* - * This function stops the given endpoint. Stopping and endpoint cancels - * any pending DMA operations and frees all resources associated with the - * given endpoint. - */ -static cy_as_return_status_t -cy_as_dma_stop_end_point(cy_as_device *dev_p, cy_as_end_point_number_t ep) -{ - cy_as_return_status_t ret; - cy_as_dma_end_point *ep_p = CY_AS_NUM_EP(dev_p, ep); - - /* - * cancel any pending DMA requests associated with this endpoint. this - * cancels any DMA requests at the HAL layer as well as dequeues any - * request that is currently pending. - */ - ret = cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * destroy the sleep channel - */ - if (!cy_as_hal_destroy_sleep_channel(&ep_p->channel) - && ret == CY_AS_ERROR_SUCCESS) - ret = CY_AS_ERROR_DESTROY_SLEEP_CHANNEL_FAILED; - - /* - * free the memory associated with this endpoint - */ - cy_as_hal_free(ep_p); - - /* - * set the data structure ptr to something sane since the - * previous pointer is now free. - */ - dev_p->endp[ep] = 0; - - return ret; -} - -/* - * This method stops the USB stack. This is an internal function that does - * all of the work of destroying the USB stack without the protections that - * we provide to the API (i.e. stopping at stack that is not running). - */ -static cy_as_return_status_t -cy_as_dma_stop_internal(cy_as_device *dev_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_return_status_t lret; - cy_as_end_point_number_t i; - - /* - * stop all of the endpoints. this cancels all DMA requests, and - * frees all resources associated with each endpoint. - */ - for (i = 0; i < sizeof(dev_p->endp)/(sizeof(dev_p->endp[0])); i++) { - lret = cy_as_dma_stop_end_point(dev_p, i); - if (lret != CY_AS_ERROR_SUCCESS && ret == CY_AS_ERROR_SUCCESS) - ret = lret; - } - - /* - * now, free the list of DMA requests structures that we use to manage - * DMA requests. - */ - while (dev_p->dma_freelist_p) { - cy_as_dma_queue_entry *req_p; - uint32_t imask = cy_as_hal_disable_interrupts(); - - req_p = dev_p->dma_freelist_p; - dev_p->dma_freelist_p = req_p->next_p; - - cy_as_hal_enable_interrupts(imask); - - cy_as_hal_free(req_p); - } - - cy_as_ll_destroy_request(dev_p, dev_p->usb_ep0_dma_req); - cy_as_ll_destroy_request(dev_p, dev_p->usb_ep1_dma_req); - cy_as_ll_destroy_response(dev_p, dev_p->usb_ep0_dma_resp); - cy_as_ll_destroy_response(dev_p, dev_p->usb_ep1_dma_resp); - - return ret; -} - - -/* - * CyAsDmaStop() - * - * This function shuts down the DMA module. All resources - * associated with the DMA module will be freed. This - * routine is the API stop function. It insures that we - * are stopping a stack that is actually running and then - * calls the internal function to do the work. - */ -cy_as_return_status_t -cy_as_dma_stop(cy_as_device *dev_p) -{ - cy_as_return_status_t ret; - - ret = cy_as_dma_stop_internal(dev_p); - cy_as_device_set_dma_stopped(dev_p); - - return ret; -} - -/* - * CyAsDmaStart() - * - * This function initializes the DMA module to insure it is up and running. - */ -cy_as_return_status_t -cy_as_dma_start(cy_as_device *dev_p) -{ - cy_as_end_point_number_t i; - uint16_t cnt; - - if (cy_as_device_is_dma_running(dev_p)) - return CY_AS_ERROR_ALREADY_RUNNING; - - /* - * pre-allocate DMA queue structures to be used in the interrupt context - */ - for (cnt = 0; cnt < 32; cnt++) { - cy_as_dma_queue_entry *entry_p = (cy_as_dma_queue_entry *) - cy_as_hal_alloc(sizeof(cy_as_dma_queue_entry)); - if (entry_p == 0) { - cy_as_dma_stop_internal(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - cy_as_dma_add_request_to_free_queue(dev_p, entry_p); - } - - /* - * pre-allocate the DMA requests for sending EP0 - * and EP1 data to west bridge - */ - dev_p->usb_ep0_dma_req = cy_as_ll_create_request(dev_p, - CY_RQT_USB_EP_DATA, CY_RQT_USB_RQT_CONTEXT, 64); - dev_p->usb_ep1_dma_req = cy_as_ll_create_request(dev_p, - CY_RQT_USB_EP_DATA, CY_RQT_USB_RQT_CONTEXT, 64); - - if (dev_p->usb_ep0_dma_req == 0 || dev_p->usb_ep1_dma_req == 0) { - cy_as_dma_stop_internal(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - dev_p->usb_ep0_dma_req_save = dev_p->usb_ep0_dma_req; - - dev_p->usb_ep0_dma_resp = cy_as_ll_create_response(dev_p, 1); - dev_p->usb_ep1_dma_resp = cy_as_ll_create_response(dev_p, 1); - if (dev_p->usb_ep0_dma_resp == 0 || dev_p->usb_ep1_dma_resp == 0) { - cy_as_dma_stop_internal(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - dev_p->usb_ep0_dma_resp_save = dev_p->usb_ep0_dma_resp; - - /* - * set the dev_p->endp to all zeros to insure cleanup is possible if - * an error occurs during initialization. - */ - cy_as_hal_mem_set(dev_p->endp, 0, sizeof(dev_p->endp)); - - /* - * now, iterate through each of the endpoints and initialize each - * one. - */ - for (i = 0; i < sizeof(dev_p->endp)/sizeof(dev_p->endp[0]); i++) { - dev_p->endp[i] = (cy_as_dma_end_point *) - cy_as_hal_alloc(sizeof(cy_as_dma_end_point)); - if (dev_p->endp[i] == 0) { - cy_as_dma_stop_internal(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - cy_as_hal_mem_set(dev_p->endp[i], 0, - sizeof(cy_as_dma_end_point)); - - dev_p->endp[i]->ep = i; - dev_p->endp[i]->queue_p = 0; - dev_p->endp[i]->last_p = 0; - - cy_as_dma_set_drq(dev_p, i, cy_false); - - if (!cy_as_hal_create_sleep_channel(&dev_p->endp[i]->channel)) - return CY_AS_ERROR_CREATE_SLEEP_CHANNEL_FAILED; - } - - /* - * tell the HAL layer who to call when the - * HAL layer completes a DMA request - */ - cy_as_hal_dma_register_callback(dev_p->tag, - cy_as_dma_completed_callback); - - /* - * mark DMA as up and running on this device - */ - cy_as_device_set_dma_running(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -/* -* Wait for all entries in the DMA queue associated -* the given endpoint to be drained. This function -* will not return until all the DMA data has been -* transferred. -*/ -cy_as_return_status_t -cy_as_dma_drain_queue(cy_as_device *dev_p, - cy_as_end_point_number_t ep, cy_bool kickstart) -{ - cy_as_dma_end_point *ep_p; - int loopcount = 1000; - uint32_t mask; - - /* - * make sure the endpoint is valid - */ - if (ep >= sizeof(dev_p->endp)/sizeof(dev_p->endp[0])) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - - /* - * if the endpoint is empty of traffic, we return - * with success immediately - */ - mask = cy_as_hal_disable_interrupts(); - if (ep_p->queue_p == 0) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_SUCCESS; - } else { - /* - * add 10 seconds to the time out value for each 64 KB segment - * of data to be transferred. - */ - if (ep_p->queue_p->size > 0x10000) - loopcount += ((ep_p->queue_p->size / 0x10000) * 1000); - } - cy_as_hal_enable_interrupts(mask); - - /* If we are already sleeping on this endpoint, it is an error */ - if (cy_as_dma_end_point_is_sleeping(ep_p)) - return CY_AS_ERROR_NESTED_SLEEP; - - /* - * we disable the endpoint while the queue drains to - * prevent any additional requests from being queued while we are waiting - */ - cy_as_dma_enable_end_point(dev_p, ep, - cy_false, cy_as_direction_dont_change); - - if (kickstart) { - /* - * now, kick start the DMA if necessary - */ - cy_as_dma_kick_start(dev_p, ep); - } - - /* - * check one last time before we begin sleeping to see if the - * queue is drained. - */ - if (ep_p->queue_p == 0) { - cy_as_dma_enable_end_point(dev_p, ep, cy_true, - cy_as_direction_dont_change); - return CY_AS_ERROR_SUCCESS; - } - - while (loopcount-- > 0) { - /* - * sleep for 10 ms maximum (per loop) while - * waiting for the transfer to complete. - */ - cy_as_dma_end_point_set_sleep_state(ep_p); - cy_as_hal_sleep_on(&ep_p->channel, 10); - - /* If we timed out, the sleep bit will still be set */ - cy_as_dma_end_point_set_wake_state(ep_p); - - /* Check the queue to see if is drained */ - if (ep_p->queue_p == 0) { - /* - * clear the endpoint running and in transit flags - * for the endpoint, now that its DMA queue is empty. - */ - cy_as_dma_end_point_clear_in_transit(ep_p); - cy_as_dma_end_point_set_stopped(ep_p); - - cy_as_dma_enable_end_point(dev_p, ep, - cy_true, cy_as_direction_dont_change); - return CY_AS_ERROR_SUCCESS; - } - } - - /* - * the DMA operation that has timed out can be cancelled, so that later - * operations on this queue can proceed. - */ - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_TIMEOUT); - cy_as_dma_enable_end_point(dev_p, ep, - cy_true, cy_as_direction_dont_change); - return CY_AS_ERROR_TIMEOUT; -} - -/* -* This function queues a write request in the DMA queue -* for a given endpoint. The direction of the -* entry will be inferred from the endpoint direction. -*/ -cy_as_return_status_t -cy_as_dma_queue_request(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *mem_p, - uint32_t size, cy_bool pkt, cy_bool readreq, cy_as_dma_callback cb) -{ - uint32_t mask; - cy_as_dma_queue_entry *entry_p; - cy_as_dma_end_point *ep_p; - - /* - * make sure the endpoint is valid - */ - if (ep >= sizeof(dev_p->endp)/sizeof(dev_p->endp[0])) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - - if (!cy_as_dma_end_point_is_enabled(ep_p)) - return CY_AS_ERROR_ENDPOINT_DISABLED; - - entry_p = cy_as_dma_get_dma_queue_entry(dev_p); - - entry_p->buf_p = mem_p; - entry_p->cb = cb; - entry_p->size = size; - entry_p->offset = 0; - entry_p->packet = pkt; - entry_p->readreq = readreq; - - mask = cy_as_hal_disable_interrupts(); - entry_p->next_p = 0; - if (ep_p->last_p) - ep_p->last_p->next_p = entry_p; - ep_p->last_p = entry_p; - if (ep_p->queue_p == 0) - ep_p->queue_p = entry_p; - cy_as_hal_enable_interrupts(mask); - - return CY_AS_ERROR_SUCCESS; -} - -/* -* This function enables or disables and endpoint for DMA -* queueing. If an endpoint is disabled, any queue requests -* continue to be processed, but no new requests can be queued. -*/ -cy_as_return_status_t -cy_as_dma_enable_end_point(cy_as_device *dev_p, - cy_as_end_point_number_t ep, cy_bool enable, cy_as_dma_direction dir) -{ - cy_as_dma_end_point *ep_p; - - /* - * make sure the endpoint is valid - */ - if (ep >= sizeof(dev_p->endp)/sizeof(dev_p->endp[0])) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - - if (dir == cy_as_direction_out) - cy_as_dma_end_point_set_direction_out(ep_p); - else if (dir == cy_as_direction_in) - cy_as_dma_end_point_set_direction_in(ep_p); - - /* - * get the maximum size of data buffer the HAL - * layer can accept. this is used when the DMA - * module is sending DMA requests to the HAL. - * the DMA module will never send down a request - * that is greater than this value. - * - * for EP0 and EP1, we can send no more than 64 - * bytes of data at one time as this is the maximum - * size of a packet that can be sent via these - * endpoints. - */ - if (ep == 0 || ep == 1) - ep_p->maxhaldata = 64; - else - ep_p->maxhaldata = cy_as_hal_dma_max_request_size( - dev_p->tag, ep); - - if (enable) - cy_as_dma_end_point_enable(ep_p); - else - cy_as_dma_end_point_disable(ep_p); - - return CY_AS_ERROR_SUCCESS; -} - -/* - * This function cancels any DMA operations pending with the HAL layer as well - * as any DMA operation queued on the endpoint. - */ -cy_as_return_status_t -cy_as_dma_cancel( - cy_as_device *dev_p, - cy_as_end_point_number_t ep, - cy_as_return_status_t err) -{ - uint32_t mask; - cy_as_dma_end_point *ep_p; - cy_as_dma_queue_entry *entry_p; - cy_bool epstate; - - /* - * make sure the endpoint is valid - */ - if (ep >= sizeof(dev_p->endp)/sizeof(dev_p->endp[0])) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - - if (ep_p) { - /* Remember the state of the endpoint */ - epstate = cy_as_dma_end_point_is_enabled(ep_p); - - /* - * disable the endpoint so no more DMA packets can be - * queued. - */ - cy_as_dma_enable_end_point(dev_p, ep, - cy_false, cy_as_direction_dont_change); - - /* - * don't allow any interrupts from this endpoint - * while we get the most current request off of - * the queue. - */ - cy_as_dma_set_drq(dev_p, ep, cy_false); - - /* - * cancel any pending request queued in the HAL layer - */ - if (cy_as_dma_end_point_in_transit(ep_p)) - cy_as_hal_dma_cancel_request(dev_p->tag, ep_p->ep); - - /* - * shutdown the DMA for this endpoint so no - * more data is transferred - */ - cy_as_dma_end_point_set_stopped(ep_p); - - /* - * mark the endpoint as not in transit, because we are - * going to consume any queued requests - */ - cy_as_dma_end_point_clear_in_transit(ep_p); - - /* - * now, remove each entry in the queue and call the - * associated callback stating that the request was - * canceled. - */ - ep_p->last_p = 0; - while (ep_p->queue_p != 0) { - /* Disable interrupts to manipulate the queue */ - mask = cy_as_hal_disable_interrupts(); - - /* Remove an entry from the queue */ - entry_p = ep_p->queue_p; - ep_p->queue_p = entry_p->next_p; - - /* Ok, the queue has been updated, we can - * turn interrupts back on */ - cy_as_hal_enable_interrupts(mask); - - /* Call the callback indicating we have - * canceled the DMA */ - if (entry_p->cb) - entry_p->cb(dev_p, ep, - entry_p->buf_p, entry_p->size, err); - - cy_as_dma_add_request_to_free_queue(dev_p, entry_p); - } - - if (ep == 0 || ep == 1) { - /* - * if this endpoint is zero or one, we need to - * clear the queue of any pending CY_RQT_USB_EP_DATA - * requests as these are pending requests to send - * data to the west bridge device. - */ - cy_as_ll_remove_ep_data_requests(dev_p, ep); - } - - if (epstate) { - /* - * the endpoint started out enabled, so we - * re-enable the endpoint here. - */ - cy_as_dma_enable_end_point(dev_p, ep, - cy_true, cy_as_direction_dont_change); - } - } - - return CY_AS_ERROR_SUCCESS; -} - -cy_as_return_status_t -cy_as_dma_received_data(cy_as_device *dev_p, - cy_as_end_point_number_t ep, uint32_t dsize, void *data) -{ - cy_as_dma_queue_entry *dma_p; - uint8_t *src_p, *dest_p; - cy_as_dma_end_point *ep_p; - uint32_t xfersize; - - /* - * make sure the endpoint is valid - */ - if (ep != 0 && ep != 1) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - dma_p = ep_p->queue_p; - if (dma_p == 0) - return CY_AS_ERROR_SUCCESS; - - /* - * if the data received exceeds the size of the DMA buffer, - * clip the data to the size of the buffer. this can lead - * to losing some data, but is not different than doing - * non-packet reads on the other endpoints. - */ - if (dsize > dma_p->size - dma_p->offset) - dsize = dma_p->size - dma_p->offset; - - /* - * copy the data from the request packet to the DMA buffer - * for the endpoint - */ - src_p = (uint8_t *)data; - dest_p = ((uint8_t *)(dma_p->buf_p)) + dma_p->offset; - xfersize = dsize; - while (xfersize-- > 0) - *dest_p++ = *src_p++; - - /* Signal the DMA module that we have - * received data for this EP request */ - cy_as_dma_completed_callback(dev_p->tag, - ep, dsize, CY_AS_ERROR_SUCCESS); - - return CY_AS_ERROR_SUCCESS; -} diff --git a/drivers/staging/westbridge/astoria/api/src/cyasintr.c b/drivers/staging/westbridge/astoria/api/src/cyasintr.c deleted file mode 100644 index b60f69c..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasintr.c +++ /dev/null @@ -1,143 +0,0 @@ -/* Cypress West Bridge API source file (cyasintr.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasdevice.h" -#include "../../include/linux/westbridge/cyasregs.h" -#include "../../include/linux/westbridge/cyaserr.h" - -extern void cy_as_mail_box_interrupt_handler(cy_as_device *); - -void -cy_as_mcu_interrupt_handler(cy_as_device *dev_p) -{ - /* Read and clear the interrupt. */ - uint16_t v; - - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_MCU_STAT); - v = v; -} - -void -cy_as_power_management_interrupt_handler(cy_as_device *dev_p) -{ - uint16_t v; - - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_PWR_MAGT_STAT); - v = v; -} - -void -cy_as_pll_lock_loss_interrupt_handler(cy_as_device *dev_p) -{ - uint16_t v; - - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_PLL_LOCK_LOSS_STAT); - v = v; -} - -uint32_t cy_as_intr_start(cy_as_device *dev_p, cy_bool dmaintr) -{ - uint16_t v; - - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - if (cy_as_device_is_intr_running(dev_p) != 0) - return CY_AS_ERROR_ALREADY_RUNNING; - - v = CY_AS_MEM_P0_INT_MASK_REG_MMCUINT | - CY_AS_MEM_P0_INT_MASK_REG_MMBINT | - CY_AS_MEM_P0_INT_MASK_REG_MPMINT; - - if (dmaintr) - v |= CY_AS_MEM_P0_INT_MASK_REG_MDRQINT; - - /* Enable the interrupts of interest */ - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_P0_INT_MASK_REG, v); - - /* Mark the interrupt module as initialized */ - cy_as_device_set_intr_running(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -uint32_t cy_as_intr_stop(cy_as_device *dev_p) -{ - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - if (cy_as_device_is_intr_running(dev_p) == 0) - return CY_AS_ERROR_NOT_RUNNING; - - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_P0_INT_MASK_REG, 0); - cy_as_device_set_intr_stopped(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -void cy_as_intr_service_interrupt(cy_as_hal_device_tag tag) -{ - uint16_t v; - cy_as_device *dev_p; - - dev_p = cy_as_device_find_from_tag(tag); - - /* - * only power management interrupts can occur before the - * antioch API setup is complete. if this is a PM interrupt - * handle it here; otherwise output a warning message. - */ - if (dev_p == 0) { - v = cy_as_hal_read_register(tag, CY_AS_MEM_P0_INTR_REG); - if (v == CY_AS_MEM_P0_INTR_REG_PMINT) { - /* Read the PWR_MAGT_STAT register - * to clear this interrupt. */ - v = cy_as_hal_read_register(tag, - CY_AS_MEM_PWR_MAGT_STAT); - } else - cy_as_hal_print_message("stray antioch " - "interrupt detected" - ", tag not associated " - "with any created device."); - return; - } - - /* Make sure we got a valid object from CyAsDeviceFindFromTag */ - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_INTR_REG); - - if (v & CY_AS_MEM_P0_INTR_REG_MCUINT) - cy_as_mcu_interrupt_handler(dev_p); - - if (v & CY_AS_MEM_P0_INTR_REG_PMINT) - cy_as_power_management_interrupt_handler(dev_p); - - if (v & CY_AS_MEM_P0_INTR_REG_PLLLOCKINT) - cy_as_pll_lock_loss_interrupt_handler(dev_p); - - /* If the interrupt module is not running, no mailbox - * interrupts are expected from the west bridge. */ - if (cy_as_device_is_intr_running(dev_p) == 0) - return; - - if (v & CY_AS_MEM_P0_INTR_REG_MBINT) - cy_as_mail_box_interrupt_handler(dev_p); -} diff --git a/drivers/staging/westbridge/astoria/api/src/cyaslep2pep.c b/drivers/staging/westbridge/astoria/api/src/cyaslep2pep.c deleted file mode 100644 index 76821e5..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyaslep2pep.c +++ /dev/null @@ -1,358 +0,0 @@ -/* Cypress West Bridge API source file (cyaslep2pep.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasusb.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyasdma.h" - -typedef enum cy_as_physical_endpoint_state { - cy_as_e_p_free, - cy_as_e_p_in, - cy_as_e_p_out, - cy_as_e_p_iso_in, - cy_as_e_p_iso_out -} cy_as_physical_endpoint_state; - - -/* -* This map is used to map an index between 1 and 10 -* to a logical endpoint number. This is used to map -* LEP register indexes into actual EP numbers. -*/ -static cy_as_end_point_number_t end_point_map[] = { - 3, 5, 7, 9, 10, 11, 12, 13, 14, 15 }; - -#define CY_AS_EPCFG_1024 (1 << 3) -#define CY_AS_EPCFG_DBL (0x02) -#define CY_AS_EPCFG_TRIPLE (0x03) -#define CY_AS_EPCFG_QUAD (0x00) - -/* - * NB: This table contains the register values for PEP1 - * and PEP3. PEP2 and PEP4 only have a bit to change the - * direction of the PEP and therefre are not represented - * in this table. - */ -static uint8_t pep_register_values[12][4] = { - /* Bit 1:0 buffering, 0 = quad, 2 = double, 3 = triple */ - /* Bit 3 size, 0 = 512, 1 = 1024 */ - { - CY_AS_EPCFG_DBL, - CY_AS_EPCFG_DBL, - },/* Config 1 - PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (2 * 512), PEP4 (2 * 512) */ - { - CY_AS_EPCFG_DBL, - CY_AS_EPCFG_QUAD, - }, /* Config 2 - PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (4 * 512), PEP4 (N/A) */ - { - CY_AS_EPCFG_DBL, - CY_AS_EPCFG_DBL | CY_AS_EPCFG_1024, - },/* Config 3 - PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (2 * 1024), PEP4(N/A) */ - { - CY_AS_EPCFG_QUAD, - CY_AS_EPCFG_DBL, - },/* Config 4 - PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (2 * 512), PEP4 (2 * 512) */ - { - CY_AS_EPCFG_QUAD, - CY_AS_EPCFG_QUAD, - },/* Config 5 - PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (4 * 512), PEP4 (N/A) */ - { - CY_AS_EPCFG_QUAD, - CY_AS_EPCFG_1024 | CY_AS_EPCFG_DBL, - },/* Config 6 - PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (2 * 1024), PEP4 (N/A) */ - { - CY_AS_EPCFG_1024 | CY_AS_EPCFG_DBL, - CY_AS_EPCFG_DBL, - },/* Config 7 - PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (2 * 512), PEP4 (2 * 512) */ - { - CY_AS_EPCFG_1024 | CY_AS_EPCFG_DBL, - CY_AS_EPCFG_QUAD, - },/* Config 8 - PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (4 * 512), PEP4 (N/A) */ - { - CY_AS_EPCFG_1024 | CY_AS_EPCFG_DBL, - CY_AS_EPCFG_1024 | CY_AS_EPCFG_DBL, - },/* Config 9 - PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (2 * 1024), PEP4 (N/A)*/ - { - CY_AS_EPCFG_TRIPLE, - CY_AS_EPCFG_TRIPLE, - },/* Config 10 - PEP1 (3 * 512), PEP2 (N/A), - * PEP3 (3 * 512), PEP4 (2 * 512)*/ - { - CY_AS_EPCFG_TRIPLE | CY_AS_EPCFG_1024, - CY_AS_EPCFG_DBL, - },/* Config 11 - PEP1 (3 * 1024), PEP2 (N/A), - * PEP3 (N/A), PEP4 (2 * 512) */ - { - CY_AS_EPCFG_QUAD | CY_AS_EPCFG_1024, - CY_AS_EPCFG_DBL, - },/* Config 12 - PEP1 (4 * 1024), PEP2 (N/A), - * PEP3 (N/A), PEP4 (N/A) */ -}; - -static cy_as_return_status_t -find_endpoint_directions(cy_as_device *dev_p, - cy_as_physical_endpoint_state epstate[4]) -{ - int i; - cy_as_physical_endpoint_state desired; - - /* - * note, there is no error checking here because - * ISO error checking happens when the API is called. - */ - for (i = 0; i < 10; i++) { - int epno = end_point_map[i]; - if (dev_p->usb_config[epno].enabled) { - int pep = dev_p->usb_config[epno].physical; - if (dev_p->usb_config[epno].type == cy_as_usb_iso) { - /* - * marking this as an ISO endpoint, removes the - * physical EP from consideration when - * mapping the remaining E_ps. - */ - if (dev_p->usb_config[epno].dir == cy_as_usb_in) - desired = cy_as_e_p_iso_in; - else - desired = cy_as_e_p_iso_out; - } else { - if (dev_p->usb_config[epno].dir == cy_as_usb_in) - desired = cy_as_e_p_in; - else - desired = cy_as_e_p_out; - } - - /* - * NB: Note the API calls insure that an ISO endpoint - * has a physical and logical EP number that are the - * same, therefore this condition is not enforced here. - */ - if (epstate[pep - 1] != - cy_as_e_p_free && epstate[pep - 1] != desired) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - epstate[pep - 1] = desired; - } - } - - /* - * create the EP1 config values directly. - * both EP1OUT and EP1IN are invalid by default. - */ - dev_p->usb_ep1cfg[0] = 0; - dev_p->usb_ep1cfg[1] = 0; - if (dev_p->usb_config[1].enabled) { - if ((dev_p->usb_config[1].dir == cy_as_usb_out) || - (dev_p->usb_config[1].dir == cy_as_usb_in_out)) { - /* Set the valid bit and type field. */ - dev_p->usb_ep1cfg[0] = (1 << 7); - if (dev_p->usb_config[1].type == cy_as_usb_bulk) - dev_p->usb_ep1cfg[0] |= (2 << 4); - else - dev_p->usb_ep1cfg[0] |= (3 << 4); - } - - if ((dev_p->usb_config[1].dir == cy_as_usb_in) || - (dev_p->usb_config[1].dir == cy_as_usb_in_out)) { - /* Set the valid bit and type field. */ - dev_p->usb_ep1cfg[1] = (1 << 7); - if (dev_p->usb_config[1].type == cy_as_usb_bulk) - dev_p->usb_ep1cfg[1] |= (2 << 4); - else - dev_p->usb_ep1cfg[1] |= (3 << 4); - } - } - - return CY_AS_ERROR_SUCCESS; -} - -static void -create_register_settings(cy_as_device *dev_p, - cy_as_physical_endpoint_state epstate[4]) -{ - int i; - uint8_t v; - - for (i = 0; i < 4; i++) { - if (i == 0) { - /* Start with the values that specify size */ - dev_p->usb_pepcfg[i] = - pep_register_values - [dev_p->usb_phy_config - 1][0]; - } else if (i == 2) { - /* Start with the values that specify size */ - dev_p->usb_pepcfg[i] = - pep_register_values - [dev_p->usb_phy_config - 1][1]; - } else - dev_p->usb_pepcfg[i] = 0; - - /* Adjust direction if it is in */ - if (epstate[i] == cy_as_e_p_iso_in || - epstate[i] == cy_as_e_p_in) - dev_p->usb_pepcfg[i] |= (1 << 6); - } - - /* Configure the logical EP registers */ - for (i = 0; i < 10; i++) { - int val; - int epnum = end_point_map[i]; - - v = 0x10; /* PEP 1, Bulk Endpoint, EP not valid */ - if (dev_p->usb_config[epnum].enabled) { - v |= (1 << 7); /* Enabled */ - - val = dev_p->usb_config[epnum].physical - 1; - cy_as_hal_assert(val >= 0 && val <= 3); - v |= (val << 5); - - switch (dev_p->usb_config[epnum].type) { - case cy_as_usb_bulk: - val = 2; - break; - case cy_as_usb_int: - val = 3; - break; - case cy_as_usb_iso: - val = 1; - break; - default: - cy_as_hal_assert(cy_false); - break; - } - v |= (val << 3); - } - - dev_p->usb_lepcfg[i] = v; - } -} - - -cy_as_return_status_t -cy_as_usb_map_logical2_physical(cy_as_device *dev_p) -{ - cy_as_return_status_t ret; - - /* Physical EPs 3 5 7 9 respectively in the array */ - cy_as_physical_endpoint_state epstate[4] = { - cy_as_e_p_free, cy_as_e_p_free, - cy_as_e_p_free, cy_as_e_p_free }; - - /* Find the direction for the endpoints */ - ret = find_endpoint_directions(dev_p, epstate); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * now create the register settings based on the given - * assigned of logical E_ps to physical endpoints. - */ - create_register_settings(dev_p, epstate); - - return ret; -} - -static uint16_t -get_max_dma_size(cy_as_device *dev_p, cy_as_end_point_number_t ep) -{ - uint16_t size = dev_p->usb_config[ep].size; - - if (size == 0) { - switch (dev_p->usb_config[ep].type) { - case cy_as_usb_control: - size = 64; - break; - - case cy_as_usb_bulk: - size = cy_as_device_is_usb_high_speed(dev_p) ? - 512 : 64; - break; - - case cy_as_usb_int: - size = cy_as_device_is_usb_high_speed(dev_p) ? - 1024 : 64; - break; - - case cy_as_usb_iso: - size = cy_as_device_is_usb_high_speed(dev_p) ? - 1024 : 1023; - break; - } - } - - return size; -} - -cy_as_return_status_t -cy_as_usb_set_dma_sizes(cy_as_device *dev_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint32_t i; - - for (i = 0; i < 10; i++) { - cy_as_usb_end_point_config *config_p = - &dev_p->usb_config[end_point_map[i]]; - if (config_p->enabled) { - ret = cy_as_dma_set_max_dma_size(dev_p, - end_point_map[i], - get_max_dma_size(dev_p, end_point_map[i])); - if (ret != CY_AS_ERROR_SUCCESS) - break; - } - } - - return ret; -} - -cy_as_return_status_t -cy_as_usb_setup_dma(cy_as_device *dev_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint32_t i; - - for (i = 0; i < 10; i++) { - cy_as_usb_end_point_config *config_p = - &dev_p->usb_config[end_point_map[i]]; - if (config_p->enabled) { - /* Map the endpoint direction to the DMA direction */ - cy_as_dma_direction dir = cy_as_direction_out; - if (config_p->dir == cy_as_usb_in) - dir = cy_as_direction_in; - - ret = cy_as_dma_enable_end_point(dev_p, - end_point_map[i], cy_true, dir); - if (ret != CY_AS_ERROR_SUCCESS) - break; - } - } - - return ret; -} diff --git a/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c b/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c deleted file mode 100644 index 96a86d0..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c +++ /dev/null @@ -1,1264 +0,0 @@ -/* Cypress West Bridge API source file (cyaslowlevel.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyascast.h" -#include "../../include/linux/westbridge/cyasdevice.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyasintr.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasregs.h" - -static const uint32_t cy_as_low_level_timeout_count = 65536 * 4; - -/* Forward declaration */ -static cy_as_return_status_t cy_as_send_one(cy_as_device *dev_p, - cy_as_ll_request_response *req_p); - -/* -* This array holds the size of the largest request we will ever recevie from -* the West Bridge device per context. The size is in 16 bit words. Note a -* size of 0xffff indicates that there will be no requests on this context -* from West Bridge. -*/ -static uint16_t max_request_length[CY_RQT_CONTEXT_COUNT] = { - 8, /* CY_RQT_GENERAL_RQT_CONTEXT - CY_RQT_INITIALIZATION_COMPLETE */ - 8, /* CY_RQT_RESOURCE_RQT_CONTEXT - none */ - 8, /* CY_RQT_STORAGE_RQT_CONTEXT - CY_RQT_MEDIA_CHANGED */ - 128, /* CY_RQT_USB_RQT_CONTEXT - CY_RQT_USB_EVENT */ - 8 /* CY_RQT_TUR_RQT_CONTEXT - CY_RQT_TURBO_CMD_FROM_HOST */ -}; - -/* -* For the given context, this function removes the request node at the head -* of the queue from the context. This is called after all processing has -* occurred on the given request and response and we are ready to remove this -* entry from the queue. -*/ -static void -cy_as_ll_remove_request_queue_head(cy_as_device *dev_p, cy_as_context *ctxt_p) -{ - uint32_t mask, state; - cy_as_ll_request_list_node *node_p; - - (void)dev_p; - cy_as_hal_assert(ctxt_p->request_queue_p != 0); - - mask = cy_as_hal_disable_interrupts(); - node_p = ctxt_p->request_queue_p; - ctxt_p->request_queue_p = node_p->next; - cy_as_hal_enable_interrupts(mask); - - node_p->callback = 0; - node_p->rqt = 0; - node_p->resp = 0; - - /* - * note that the caller allocates and destroys the request and - * response. generally the destroy happens in the callback for - * async requests and after the wait returns for sync. the - * request and response may not actually be destroyed but may be - * managed in other ways as well. it is the responsibilty of - * the caller to deal with these in any case. the caller can do - * this in the request/response callback function. - */ - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node_p); - cy_as_hal_enable_interrupts(state); -} - -/* -* For the context given, this function sends the next request to -* West Bridge via the mailbox register, if the next request is -* ready to be sent and has not already been sent. -*/ -static void -cy_as_ll_send_next_request(cy_as_device *dev_p, cy_as_context *ctxt_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - /* - * ret == ret is equivalent to while (1) but eliminates compiler - * warnings for some compilers. - */ - while (ret == ret) { - cy_as_ll_request_list_node *node_p = ctxt_p->request_queue_p; - if (node_p == 0) - break; - - if (cy_as_request_get_node_state(node_p) != - CY_AS_REQUEST_LIST_STATE_QUEUED) - break; - - cy_as_request_set_node_state(node_p, - CY_AS_REQUEST_LIST_STATE_WAITING); - ret = cy_as_send_one(dev_p, node_p->rqt); - if (ret == CY_AS_ERROR_SUCCESS) - break; - - /* - * if an error occurs in sending the request, tell the requester - * about the error and remove the request from the queue. - */ - cy_as_request_set_node_state(node_p, - CY_AS_REQUEST_LIST_STATE_RECEIVED); - node_p->callback(dev_p, ctxt_p->number, - node_p->rqt, node_p->resp, ret); - cy_as_ll_remove_request_queue_head(dev_p, ctxt_p); - - /* - * this falls through to the while loop to send the next request - * since the previous request did not get sent. - */ - } -} - -/* -* This method removes an entry from the request queue of a given context. -* The entry is removed only if it is not in transit. -*/ -cy_as_remove_request_result_t -cy_as_ll_remove_request(cy_as_device *dev_p, cy_as_context *ctxt_p, - cy_as_ll_request_response *req_p, cy_bool force) -{ - uint32_t imask; - cy_as_ll_request_list_node *node_p; - cy_as_ll_request_list_node *tmp_p; - uint32_t state; - - imask = cy_as_hal_disable_interrupts(); - if (ctxt_p->request_queue_p != 0 && - ctxt_p->request_queue_p->rqt == req_p) { - node_p = ctxt_p->request_queue_p; - if ((cy_as_request_get_node_state(node_p) == - CY_AS_REQUEST_LIST_STATE_WAITING) && (!force)) { - cy_as_hal_enable_interrupts(imask); - return cy_as_remove_request_in_transit; - } - - ctxt_p->request_queue_p = node_p->next; - } else { - tmp_p = ctxt_p->request_queue_p; - while (tmp_p != 0 && tmp_p->next != 0 && - tmp_p->next->rqt != req_p) - tmp_p = tmp_p->next; - - if (tmp_p == 0 || tmp_p->next == 0) { - cy_as_hal_enable_interrupts(imask); - return cy_as_remove_request_not_found; - } - - node_p = tmp_p->next; - tmp_p->next = node_p->next; - } - - if (node_p->callback) - node_p->callback(dev_p, ctxt_p->number, node_p->rqt, - node_p->resp, CY_AS_ERROR_CANCELED); - - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node_p); - cy_as_hal_enable_interrupts(state); - - cy_as_hal_enable_interrupts(imask); - return cy_as_remove_request_sucessful; -} - -void -cy_as_ll_remove_all_requests(cy_as_device *dev_p, cy_as_context *ctxt_p) -{ - cy_as_ll_request_list_node *node = ctxt_p->request_queue_p; - - while (node) { - if (cy_as_request_get_node_state(ctxt_p->request_queue_p) != - CY_AS_REQUEST_LIST_STATE_RECEIVED) - cy_as_ll_remove_request(dev_p, ctxt_p, - node->rqt, cy_true); - node = node->next; - } -} - -static cy_bool -cy_as_ll_is_in_queue(cy_as_context *ctxt_p, cy_as_ll_request_response *req_p) -{ - uint32_t mask; - cy_as_ll_request_list_node *node_p; - - mask = cy_as_hal_disable_interrupts(); - node_p = ctxt_p->request_queue_p; - while (node_p) { - if (node_p->rqt == req_p) { - cy_as_hal_enable_interrupts(mask); - return cy_true; - } - node_p = node_p->next; - } - cy_as_hal_enable_interrupts(mask); - return cy_false; -} - -/* -* This is the handler for mailbox data when we are trying to send data -* to the West Bridge firmware. The firmware may be trying to send us -* data and we need to queue this data to allow the firmware to move -* forward and be in a state to receive our request. Here we just queue -* the data and it is processed at a later time by the mailbox interrupt -* handler. -*/ -void -cy_as_ll_queue_mailbox_data(cy_as_device *dev_p) -{ - cy_as_context *ctxt_p; - uint8_t context; - uint16_t data[4]; - int32_t i; - - /* Read the data from mailbox 0 to determine what to do with the data */ - for (i = 3; i >= 0; i--) - data[i] = cy_as_hal_read_register(dev_p->tag, - cy_cast_int2U_int16(CY_AS_MEM_P0_MAILBOX0 + i)); - - context = cy_as_mbox_get_context(data[0]); - if (context >= CY_RQT_CONTEXT_COUNT) { - cy_as_hal_print_message("mailbox request/response received " - "with invalid context value (%d)\n", context); - return; - } - - ctxt_p = dev_p->context[context]; - - /* - * if we have queued too much data, drop future data. - */ - cy_as_hal_assert(ctxt_p->queue_index * sizeof(uint16_t) + - sizeof(data) <= sizeof(ctxt_p->data_queue)); - - for (i = 0; i < 4; i++) - ctxt_p->data_queue[ctxt_p->queue_index++] = data[i]; - - cy_as_hal_assert((ctxt_p->queue_index % 4) == 0); - dev_p->ll_queued_data = cy_true; -} - -void -cy_as_mail_box_process_data(cy_as_device *dev_p, uint16_t *data) -{ - cy_as_context *ctxt_p; - uint8_t context; - uint16_t *len_p; - cy_as_ll_request_response *rec_p; - uint8_t st; - uint16_t src, dest; - - context = cy_as_mbox_get_context(data[0]); - if (context >= CY_RQT_CONTEXT_COUNT) { - cy_as_hal_print_message("mailbox request/response received " - "with invalid context value (%d)\n", context); - return; - } - - ctxt_p = dev_p->context[context]; - - if (cy_as_mbox_is_request(data[0])) { - cy_as_hal_assert(ctxt_p->req_p != 0); - rec_p = ctxt_p->req_p; - len_p = &ctxt_p->request_length; - - } else { - if (ctxt_p->request_queue_p == 0 || - cy_as_request_get_node_state(ctxt_p->request_queue_p) - != CY_AS_REQUEST_LIST_STATE_WAITING) { - cy_as_hal_print_message("mailbox response received on " - "context that was not expecting a response\n"); - cy_as_hal_print_message(" context: %d\n", context); - cy_as_hal_print_message(" contents: 0x%04x 0x%04x " - "0x%04x 0x%04x\n", - data[0], data[1], data[2], data[3]); - if (ctxt_p->request_queue_p != 0) - cy_as_hal_print_message(" state: 0x%02x\n", - ctxt_p->request_queue_p->state); - return; - } - - /* Make sure the request has an associated response */ - cy_as_hal_assert(ctxt_p->request_queue_p->resp != 0); - - rec_p = ctxt_p->request_queue_p->resp; - len_p = &ctxt_p->request_queue_p->length; - } - - if (rec_p->stored == 0) { - /* - * this is the first cycle of the response - */ - cy_as_ll_request_response__set_code(rec_p, - cy_as_mbox_get_code(data[0])); - cy_as_ll_request_response__set_context(rec_p, context); - - if (cy_as_mbox_is_last(data[0])) { - /* This is a single cycle response */ - *len_p = rec_p->length; - st = 1; - } else { - /* Ensure that enough memory has been - * reserved for the response. */ - cy_as_hal_assert(rec_p->length >= data[1]); - *len_p = (data[1] < rec_p->length) ? - data[1] : rec_p->length; - st = 2; - } - } else - st = 1; - - /* Trasnfer the data from the mailboxes to the response */ - while (rec_p->stored < *len_p && st < 4) - rec_p->data[rec_p->stored++] = data[st++]; - - if (cy_as_mbox_is_last(data[0])) { - /* NB: The call-back that is made below can cause the - * addition of more data in this queue, thus causing - * a recursive overflow of the queue. this is prevented - * by removing the request entry that is currently - * being passed up from the data queue. if this is done, - * the queue only needs to be as long as two request - * entries from west bridge. - */ - if ((ctxt_p->rqt_index > 0) && - (ctxt_p->rqt_index <= ctxt_p->queue_index)) { - dest = 0; - src = ctxt_p->rqt_index; - - while (src < ctxt_p->queue_index) - ctxt_p->data_queue[dest++] = - ctxt_p->data_queue[src++]; - - ctxt_p->rqt_index = 0; - ctxt_p->queue_index = dest; - cy_as_hal_assert((ctxt_p->queue_index % 4) == 0); - } - - if (ctxt_p->request_queue_p != 0 && rec_p == - ctxt_p->request_queue_p->resp) { - /* - * if this is the last cycle of the response, call the - * callback and reset for the next response. - */ - cy_as_ll_request_response *resp_p = - ctxt_p->request_queue_p->resp; - resp_p->length = ctxt_p->request_queue_p->length; - cy_as_request_set_node_state(ctxt_p->request_queue_p, - CY_AS_REQUEST_LIST_STATE_RECEIVED); - - cy_as_device_set_in_callback(dev_p); - ctxt_p->request_queue_p->callback(dev_p, context, - ctxt_p->request_queue_p->rqt, - resp_p, CY_AS_ERROR_SUCCESS); - - cy_as_device_clear_in_callback(dev_p); - - cy_as_ll_remove_request_queue_head(dev_p, ctxt_p); - cy_as_ll_send_next_request(dev_p, ctxt_p); - } else { - /* Send the request to the appropriate - * module to handle */ - cy_as_ll_request_response *request_p = ctxt_p->req_p; - ctxt_p->req_p = 0; - if (ctxt_p->request_callback) { - cy_as_device_set_in_callback(dev_p); - ctxt_p->request_callback(dev_p, context, - request_p, 0, CY_AS_ERROR_SUCCESS); - cy_as_device_clear_in_callback(dev_p); - } - cy_as_ll_init_request(request_p, 0, - context, request_p->length); - ctxt_p->req_p = request_p; - } - } -} - -/* -* This is the handler for processing queued mailbox data -*/ -void -cy_as_mail_box_queued_data_handler(cy_as_device *dev_p) -{ - uint16_t i; - - /* - * if more data gets queued in between our entering this call - * and the end of the iteration on all contexts; we should - * continue processing the queued data. - */ - while (dev_p->ll_queued_data) { - dev_p->ll_queued_data = cy_false; - for (i = 0; i < CY_RQT_CONTEXT_COUNT; i++) { - uint16_t offset; - cy_as_context *ctxt_p = dev_p->context[i]; - cy_as_hal_assert((ctxt_p->queue_index % 4) == 0); - - offset = 0; - while (offset < ctxt_p->queue_index) { - ctxt_p->rqt_index = offset + 4; - cy_as_mail_box_process_data(dev_p, - ctxt_p->data_queue + offset); - offset = ctxt_p->rqt_index; - } - ctxt_p->queue_index = 0; - } - } -} - -/* -* This is the handler for the mailbox interrupt. This function reads -* data from the mailbox registers until a complete request or response -* is received. When a complete request is received, the callback -* associated with requests on that context is called. When a complete -* response is recevied, the callback associated with the request that -* generated the response is called. -*/ -void -cy_as_mail_box_interrupt_handler(cy_as_device *dev_p) -{ - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - /* - * queue the mailbox data to preserve - * order for later processing. - */ - cy_as_ll_queue_mailbox_data(dev_p); - - /* - * process what was queued and anything that may be pending - */ - cy_as_mail_box_queued_data_handler(dev_p); -} - -cy_as_return_status_t -cy_as_ll_start(cy_as_device *dev_p) -{ - uint16_t i; - - if (cy_as_device_is_low_level_running(dev_p)) - return CY_AS_ERROR_ALREADY_RUNNING; - - dev_p->ll_sending_rqt = cy_false; - dev_p->ll_abort_curr_rqt = cy_false; - - for (i = 0; i < CY_RQT_CONTEXT_COUNT; i++) { - dev_p->context[i] = (cy_as_context *) - cy_as_hal_alloc(sizeof(cy_as_context)); - if (dev_p->context[i] == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - dev_p->context[i]->number = (uint8_t)i; - dev_p->context[i]->request_callback = 0; - dev_p->context[i]->request_queue_p = 0; - dev_p->context[i]->last_node_p = 0; - dev_p->context[i]->req_p = cy_as_ll_create_request(dev_p, - 0, (uint8_t)i, max_request_length[i]); - dev_p->context[i]->queue_index = 0; - - if (!cy_as_hal_create_sleep_channel - (&dev_p->context[i]->channel)) - return CY_AS_ERROR_CREATE_SLEEP_CHANNEL_FAILED; - } - - cy_as_device_set_low_level_running(dev_p); - return CY_AS_ERROR_SUCCESS; -} - -/* -* Shutdown the low level communications module. This operation will -* also cancel any queued low level requests. -*/ -cy_as_return_status_t -cy_as_ll_stop(cy_as_device *dev_p) -{ - uint8_t i; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_context *ctxt_p; - uint32_t mask; - - for (i = 0; i < CY_RQT_CONTEXT_COUNT; i++) { - ctxt_p = dev_p->context[i]; - if (!cy_as_hal_destroy_sleep_channel(&ctxt_p->channel)) - return CY_AS_ERROR_DESTROY_SLEEP_CHANNEL_FAILED; - - /* - * now, free any queued requests and assocaited responses - */ - while (ctxt_p->request_queue_p) { - uint32_t state; - cy_as_ll_request_list_node *node_p = - ctxt_p->request_queue_p; - - /* Mark this pair as in a cancel operation */ - cy_as_request_set_node_state(node_p, - CY_AS_REQUEST_LIST_STATE_CANCELING); - - /* Tell the caller that we are canceling this request */ - /* NB: The callback is responsible for destroying the - * request and the response. we cannot count on the - * contents of these two after calling the callback. - */ - node_p->callback(dev_p, i, node_p->rqt, - node_p->resp, CY_AS_ERROR_CANCELED); - - /* Remove the pair from the queue */ - mask = cy_as_hal_disable_interrupts(); - ctxt_p->request_queue_p = node_p->next; - cy_as_hal_enable_interrupts(mask); - - /* Free the list node */ - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node_p); - cy_as_hal_enable_interrupts(state); - } - - cy_as_ll_destroy_request(dev_p, dev_p->context[i]->req_p); - cy_as_hal_free(dev_p->context[i]); - dev_p->context[i] = 0; - - } - cy_as_device_set_low_level_stopped(dev_p); - - return ret; -} - -void -cy_as_ll_init_request(cy_as_ll_request_response *req_p, - uint16_t code, uint16_t context, uint16_t length) -{ - uint16_t totallen = sizeof(cy_as_ll_request_response) + - (length - 1) * sizeof(uint16_t); - - cy_as_hal_mem_set(req_p, 0, totallen); - req_p->length = length; - cy_as_ll_request_response__set_code(req_p, code); - cy_as_ll_request_response__set_context(req_p, context); - cy_as_ll_request_response__set_request(req_p); -} - -/* -* Create a new request. -*/ -cy_as_ll_request_response * -cy_as_ll_create_request(cy_as_device *dev_p, uint16_t code, - uint8_t context, uint16_t length) -{ - cy_as_ll_request_response *req_p; - uint32_t state; - uint16_t totallen = sizeof(cy_as_ll_request_response) + - (length - 1) * sizeof(uint16_t); - - (void)dev_p; - - state = cy_as_hal_disable_interrupts(); - req_p = cy_as_hal_c_b_alloc(totallen); - cy_as_hal_enable_interrupts(state); - if (req_p) - cy_as_ll_init_request(req_p, code, context, length); - - return req_p; -} - -/* -* Destroy a request. -*/ -void -cy_as_ll_destroy_request(cy_as_device *dev_p, cy_as_ll_request_response *req_p) -{ - uint32_t state; - (void)dev_p; - (void)req_p; - - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(req_p); - cy_as_hal_enable_interrupts(state); - -} - -void -cy_as_ll_init_response(cy_as_ll_request_response *req_p, uint16_t length) -{ - uint16_t totallen = sizeof(cy_as_ll_request_response) + - (length - 1) * sizeof(uint16_t); - - cy_as_hal_mem_set(req_p, 0, totallen); - req_p->length = length; - cy_as_ll_request_response__set_response(req_p); -} - -/* -* Create a new response -*/ -cy_as_ll_request_response * -cy_as_ll_create_response(cy_as_device *dev_p, uint16_t length) -{ - cy_as_ll_request_response *req_p; - uint32_t state; - uint16_t totallen = sizeof(cy_as_ll_request_response) + - (length - 1) * sizeof(uint16_t); - - (void)dev_p; - - state = cy_as_hal_disable_interrupts(); - req_p = cy_as_hal_c_b_alloc(totallen); - cy_as_hal_enable_interrupts(state); - if (req_p) - cy_as_ll_init_response(req_p, length); - - return req_p; -} - -/* -* Destroy the new response -*/ -void -cy_as_ll_destroy_response(cy_as_device *dev_p, cy_as_ll_request_response *req_p) -{ - uint32_t state; - (void)dev_p; - (void)req_p; - - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(req_p); - cy_as_hal_enable_interrupts(state); -} - -static uint16_t -cy_as_read_intr_status( - cy_as_device *dev_p) -{ - uint32_t mask; - cy_bool bloop = cy_true; - uint16_t v = 0, last = 0xffff; - - /* - * before determining if the mailboxes are ready for more data, - * we first check the mailbox interrupt to see if we need to - * receive data. this prevents a dead-lock condition that can - * occur when both sides are trying to receive data. - */ - while (last == last) { - /* - * disable interrupts to be sure we don't process the mailbox - * here and have the interrupt routine try to read this data - * as well. - */ - mask = cy_as_hal_disable_interrupts(); - - /* - * see if there is data to be read. - */ - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_INTR_REG); - if ((v & CY_AS_MEM_P0_INTR_REG_MBINT) == 0) { - cy_as_hal_enable_interrupts(mask); - break; - } - - /* - * queue the mailbox data for later processing. - * this allows the firmware to move forward and - * service the requst from the P port. - */ - cy_as_ll_queue_mailbox_data(dev_p); - - /* - * enable interrupts again to service mailbox - * interrupts appropriately - */ - cy_as_hal_enable_interrupts(mask); - } - - /* - * now, all data is received - */ - last = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MB_STAT) & CY_AS_MEM_P0_MCU_MBNOTRD; - while (bloop) { - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MB_STAT) & CY_AS_MEM_P0_MCU_MBNOTRD; - if (v == last) - break; - - last = v; - } - - return v; -} - -/* -* Send a single request or response using the mail box register. -* This function does not deal with the internal queues at all, -* but only sends the request or response across to the firmware -*/ -static cy_as_return_status_t -cy_as_send_one( - cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - int i; - uint16_t mb0, v; - int32_t loopcount; - uint32_t int_stat; - -#ifdef _DEBUG - if (cy_as_ll_request_response__is_request(req_p)) { - switch (cy_as_ll_request_response__get_context(req_p)) { - case CY_RQT_GENERAL_RQT_CONTEXT: - cy_as_hal_assert(req_p->length * 2 + 2 < - CY_CTX_GEN_MAX_DATA_SIZE); - break; - - case CY_RQT_RESOURCE_RQT_CONTEXT: - cy_as_hal_assert(req_p->length * 2 + 2 < - CY_CTX_RES_MAX_DATA_SIZE); - break; - - case CY_RQT_STORAGE_RQT_CONTEXT: - cy_as_hal_assert(req_p->length * 2 + 2 < - CY_CTX_STR_MAX_DATA_SIZE); - break; - - case CY_RQT_USB_RQT_CONTEXT: - cy_as_hal_assert(req_p->length * 2 + 2 < - CY_CTX_USB_MAX_DATA_SIZE); - break; - } - } -#endif - - /* Write the request to the mail box registers */ - if (req_p->length > 3) { - uint16_t length = req_p->length; - int which = 0; - int st = 1; - - dev_p->ll_sending_rqt = cy_true; - while (which < length) { - loopcount = cy_as_low_level_timeout_count; - do { - v = cy_as_read_intr_status(dev_p); - - } while (v && loopcount-- > 0); - - if (v) { - cy_as_hal_print_message( - ">>>>>> LOW LEVEL TIMEOUT " - "%x %x %x %x\n", - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX0), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX1), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX2), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX3)); - return CY_AS_ERROR_TIMEOUT; - } - - if (dev_p->ll_abort_curr_rqt) { - dev_p->ll_sending_rqt = cy_false; - dev_p->ll_abort_curr_rqt = cy_false; - return CY_AS_ERROR_CANCELED; - } - - int_stat = cy_as_hal_disable_interrupts(); - - /* - * check again whether the mailbox is free. - * it is possible that an ISR came in and - * wrote into the mailboxes since we last - * checked the status. - */ - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MB_STAT) & - CY_AS_MEM_P0_MCU_MBNOTRD; - if (v) { - /* Go back to the original check since - * the mailbox is not free. */ - cy_as_hal_enable_interrupts(int_stat); - continue; - } - - if (which == 0) { - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX1, length); - st = 2; - } else { - st = 1; - } - - while ((which < length) && (st < 4)) { - cy_as_hal_write_register(dev_p->tag, - cy_cast_int2U_int16 - (CY_AS_MEM_MCU_MAILBOX0 + st), - req_p->data[which++]); - st++; - } - - mb0 = req_p->box0; - if (which == length) { - dev_p->ll_sending_rqt = cy_false; - mb0 |= CY_AS_REQUEST_RESPONSE_LAST_MASK; - } - - if (dev_p->ll_abort_curr_rqt) { - dev_p->ll_sending_rqt = cy_false; - dev_p->ll_abort_curr_rqt = cy_false; - cy_as_hal_enable_interrupts(int_stat); - return CY_AS_ERROR_CANCELED; - } - - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX0, mb0); - - /* Wait for the MBOX interrupt to be high */ - cy_as_hal_sleep150(); - cy_as_hal_enable_interrupts(int_stat); - } - } else { -check_mailbox_availability: - /* - * wait for the mailbox registers to become available. this - * should be a very quick wait as the firmware is designed - * to accept requests at interrupt time and queue them for - * future processing. - */ - loopcount = cy_as_low_level_timeout_count; - do { - v = cy_as_read_intr_status(dev_p); - - } while (v && loopcount-- > 0); - - if (v) { - cy_as_hal_print_message( - ">>>>>> LOW LEVEL TIMEOUT %x %x %x %x\n", - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX0), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX1), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX2), - cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_MCU_MAILBOX3)); - return CY_AS_ERROR_TIMEOUT; - } - - int_stat = cy_as_hal_disable_interrupts(); - - /* - * check again whether the mailbox is free. it is - * possible that an ISR came in and wrote into the - * mailboxes since we last checked the status. - */ - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_MCU_MB_STAT) & - CY_AS_MEM_P0_MCU_MBNOTRD; - if (v) { - /* Go back to the original check - * since the mailbox is not free. */ - cy_as_hal_enable_interrupts(int_stat); - goto check_mailbox_availability; - } - - /* Write the data associated with the request - * into the mbox registers 1 - 3 */ - v = 0; - for (i = req_p->length - 1; i >= 0; i--) - cy_as_hal_write_register(dev_p->tag, - cy_cast_int2U_int16(CY_AS_MEM_MCU_MAILBOX1 + i), - req_p->data[i]); - - /* Write the mbox register 0 to trigger the interrupt */ - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_MCU_MAILBOX0, - req_p->box0 | CY_AS_REQUEST_RESPONSE_LAST_MASK); - - cy_as_hal_sleep150(); - cy_as_hal_enable_interrupts(int_stat); - } - - return CY_AS_ERROR_SUCCESS; -} - -/* -* This function queues a single request to be sent to the firmware. -*/ -extern cy_as_return_status_t -cy_as_ll_send_request( - cy_as_device *dev_p, - /* The request to send */ - cy_as_ll_request_response *req, - /* Storage for a reply, must be sure - * it is of sufficient size */ - cy_as_ll_request_response *resp, - /* If true, this is a synchronous request */ - cy_bool sync, - /* Callback to call when reply is received */ - cy_as_response_callback cb -) -{ - cy_as_context *ctxt_p; - uint16_t box0 = req->box0; - uint8_t context; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_list_node *node_p; - uint32_t mask, state; - - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - context = cy_as_mbox_get_context(box0); - cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; - - /* Allocate the list node */ - state = cy_as_hal_disable_interrupts(); - node_p = cy_as_hal_c_b_alloc(sizeof(cy_as_ll_request_list_node)); - cy_as_hal_enable_interrupts(state); - - if (node_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Initialize the list node */ - node_p->callback = cb; - node_p->length = 0; - node_p->next = 0; - node_p->resp = resp; - node_p->rqt = req; - node_p->state = CY_AS_REQUEST_LIST_STATE_QUEUED; - if (sync) - cy_as_request_node_set_sync(node_p); - - /* Put the request into the queue */ - mask = cy_as_hal_disable_interrupts(); - if (ctxt_p->request_queue_p == 0) { - /* Empty queue */ - ctxt_p->request_queue_p = node_p; - ctxt_p->last_node_p = node_p; - } else { - ctxt_p->last_node_p->next = node_p; - ctxt_p->last_node_p = node_p; - } - cy_as_hal_enable_interrupts(mask); - cy_as_ll_send_next_request(dev_p, ctxt_p); - - if (!cy_as_device_is_in_callback(dev_p)) { - mask = cy_as_hal_disable_interrupts(); - cy_as_mail_box_queued_data_handler(dev_p); - cy_as_hal_enable_interrupts(mask); - } - - return ret; -} - -static void -cy_as_ll_send_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - (void)rqt; - (void)resp; - (void)ret; - - - cy_as_hal_assert(dev_p->sig == CY_AS_DEVICE_HANDLE_SIGNATURE); - - /* - * storage the state to return to the caller - */ - dev_p->ll_error = ret; - - /* - * now wake the caller - */ - cy_as_hal_wake(&dev_p->context[context]->channel); -} - -cy_as_return_status_t -cy_as_ll_send_request_wait_reply( - cy_as_device *dev_p, - /* The request to send */ - cy_as_ll_request_response *req, - /* Storage for a reply, must be - * sure it is of sufficient size */ - cy_as_ll_request_response *resp - ) -{ - cy_as_return_status_t ret; - uint8_t context; - /* Larger 8 sec time-out to handle the init - * delay for slower storage devices in USB FS. */ - uint32_t loopcount = 800; - cy_as_context *ctxt_p; - - /* Get the context for the request */ - context = cy_as_ll_request_response__get_context(req); - cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; - - ret = cy_as_ll_send_request(dev_p, req, resp, - cy_true, cy_as_ll_send_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - while (loopcount-- > 0) { - /* - * sleep while we wait on the response. receiving the reply will - * wake this thread. we will wait, at most 2 seconds (10 ms*200 - * tries) before we timeout. note if the reply arrives, we will - * not sleep the entire 10 ms, just til the reply arrives. - */ - cy_as_hal_sleep_on(&ctxt_p->channel, 10); - - /* - * if the request has left the queue, it means the request has - * been sent and the reply has been received. this means we can - * return to the caller and be sure the reply has been received. - */ - if (!cy_as_ll_is_in_queue(ctxt_p, req)) - return dev_p->ll_error; - } - - /* Remove the QueueListNode for this request. */ - cy_as_ll_remove_request(dev_p, ctxt_p, req, cy_true); - - return CY_AS_ERROR_TIMEOUT; -} - -cy_as_return_status_t -cy_as_ll_register_request_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_response_callback cb) -{ - cy_as_context *ctxt_p; - cy_as_hal_assert(context < CY_RQT_CONTEXT_COUNT); - ctxt_p = dev_p->context[context]; - - ctxt_p->request_callback = cb; - return CY_AS_ERROR_SUCCESS; -} - -void -cy_as_ll_request_response__pack( - cy_as_ll_request_response *req_p, - uint32_t offset, - uint32_t length, - void *data_p) -{ - uint16_t dt; - uint8_t *dp = (uint8_t *)data_p; - - while (length > 1) { - dt = ((*dp++) << 8); - dt |= (*dp++); - cy_as_ll_request_response__set_word(req_p, offset, dt); - offset++; - length -= 2; - } - - if (length == 1) { - dt = (*dp << 8); - cy_as_ll_request_response__set_word(req_p, offset, dt); - } -} - -void -cy_as_ll_request_response__unpack( - cy_as_ll_request_response *req_p, - uint32_t offset, - uint32_t length, - void *data_p) -{ - uint8_t *dp = (uint8_t *)data_p; - - while (length-- > 0) { - uint16_t val = cy_as_ll_request_response__get_word - (req_p, offset++); - *dp++ = (uint8_t)((val >> 8) & 0xff); - - if (length) { - length--; - *dp++ = (uint8_t)(val & 0xff); - } - } -} - -extern cy_as_return_status_t -cy_as_ll_send_status_response( - cy_as_device *dev_p, - uint8_t context, - uint16_t code, - uint8_t clear_storage) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response resp; - cy_as_ll_request_response *resp_p = &resp; - - cy_as_hal_mem_set(resp_p, 0, sizeof(resp)); - resp_p->length = 1; - cy_as_ll_request_response__set_response(resp_p); - cy_as_ll_request_response__set_context(resp_p, context); - - if (clear_storage) - cy_as_ll_request_response__set_clear_storage_flag(resp_p); - - cy_as_ll_request_response__set_code(resp_p, CY_RESP_SUCCESS_FAILURE); - cy_as_ll_request_response__set_word(resp_p, 0, code); - - ret = cy_as_send_one(dev_p, resp_p); - - return ret; -} - -extern cy_as_return_status_t -cy_as_ll_send_data_response( - cy_as_device *dev_p, - uint8_t context, - uint16_t code, - uint16_t length, - void *data) -{ - cy_as_ll_request_response *resp_p; - uint16_t wlen; - uint8_t respbuf[256]; - - if (length > 192) - return CY_AS_ERROR_INVALID_SIZE; - - /* Word length for bytes */ - wlen = length / 2; - - /* If byte length odd, add one more */ - if (length % 2) - wlen++; - - /* One for the length of field */ - wlen++; - - resp_p = (cy_as_ll_request_response *)respbuf; - cy_as_hal_mem_set(resp_p, 0, sizeof(respbuf)); - resp_p->length = wlen; - cy_as_ll_request_response__set_context(resp_p, context); - cy_as_ll_request_response__set_code(resp_p, code); - - cy_as_ll_request_response__set_word(resp_p, 0, length); - cy_as_ll_request_response__pack(resp_p, 1, length, data); - - return cy_as_send_one(dev_p, resp_p); -} - -static cy_bool -cy_as_ll_is_e_p_transfer_related_request(cy_as_ll_request_response *rqt_p, - cy_as_end_point_number_t ep) -{ - uint16_t v; - uint8_t type = cy_as_ll_request_response__get_code(rqt_p); - - if (cy_as_ll_request_response__get_context(rqt_p) != - CY_RQT_USB_RQT_CONTEXT) - return cy_false; - - /* - * when cancelling outstanding EP0 data transfers, any pending - * setup ACK requests also need to be cancelled. - */ - if ((ep == 0) && (type == CY_RQT_ACK_SETUP_PACKET)) - return cy_true; - - if (type != CY_RQT_USB_EP_DATA) - return cy_false; - - v = cy_as_ll_request_response__get_word(rqt_p, 0); - if ((cy_as_end_point_number_t)((v >> 13) & 1) != ep) - return cy_false; - - return cy_true; -} - -cy_as_return_status_t -cy_as_ll_remove_ep_data_requests(cy_as_device *dev_p, - cy_as_end_point_number_t ep) -{ - cy_as_context *ctxt_p; - cy_as_ll_request_list_node *node_p; - uint32_t imask; - - /* - * first, remove any queued requests - */ - ctxt_p = dev_p->context[CY_RQT_USB_RQT_CONTEXT]; - if (ctxt_p) { - for (node_p = ctxt_p->request_queue_p; node_p; - node_p = node_p->next) { - if (cy_as_ll_is_e_p_transfer_related_request - (node_p->rqt, ep)) { - cy_as_ll_remove_request(dev_p, ctxt_p, - node_p->rqt, cy_false); - break; - } - } - - /* - * now, deal with any request that may be in transit - */ - imask = cy_as_hal_disable_interrupts(); - - if (ctxt_p->request_queue_p != 0 && - cy_as_ll_is_e_p_transfer_related_request - (ctxt_p->request_queue_p->rqt, ep) && - cy_as_request_get_node_state(ctxt_p->request_queue_p) == - CY_AS_REQUEST_LIST_STATE_WAITING) { - cy_as_hal_print_message("need to remove an in-transit " - "request to antioch\n"); - - /* - * if the request has not been fully sent to west bridge - * yet, abort sending. otherwise, terminate the request - * with a CANCELED status. firmware will already have - * terminated this transfer. - */ - if (dev_p->ll_sending_rqt) - dev_p->ll_abort_curr_rqt = cy_true; - else { - uint32_t state; - - node_p = ctxt_p->request_queue_p; - if (node_p->callback) - node_p->callback(dev_p, ctxt_p->number, - node_p->rqt, node_p->resp, - CY_AS_ERROR_CANCELED); - - ctxt_p->request_queue_p = node_p->next; - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node_p); - cy_as_hal_enable_interrupts(state); - } - } - - cy_as_hal_enable_interrupts(imask); - } - - return CY_AS_ERROR_SUCCESS; -} diff --git a/drivers/staging/westbridge/astoria/api/src/cyasmisc.c b/drivers/staging/westbridge/astoria/api/src/cyasmisc.c deleted file mode 100644 index 4564fc1..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasmisc.c +++ /dev/null @@ -1,3488 +0,0 @@ -/* Cypress West Bridge API source file (cyasmisc.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasmisc.h" -#include "../../include/linux/westbridge/cyasdma.h" -#include "../../include/linux/westbridge/cyasintr.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasregs.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyasprotocol.h" - -/* -* The device list, the only global in the API -*/ -static cy_as_device *g_device_list; - -/* - * The current debug level - */ -static uint8_t debug_level; - -/* - * This function sets the debug level for the API - * - */ -void -cy_as_misc_set_log_level(uint8_t level) -{ - debug_level = level; -} - -#ifdef CY_AS_LOG_SUPPORT - -/* - * This function is a low level logger for the API. - */ -void -cy_as_log_debug_message(int level, const char *str) -{ - if (level <= debug_level) - cy_as_hal_print_message("log %d: %s\n", level, str); -} - -#endif - -#define cy_as_check_device_ready(dev_p) \ -{\ - if (!(dev_p) || ((dev_p)->sig != \ - CY_AS_DEVICE_HANDLE_SIGNATURE)) \ - return CY_AS_ERROR_INVALID_HANDLE; \ -\ - if (!cy_as_device_is_configured(dev_p)) \ - return CY_AS_ERROR_NOT_CONFIGURED; \ -\ - if (!cy_as_device_is_firmware_loaded(dev_p))\ - return CY_AS_ERROR_NO_FIRMWARE; \ -} - -/* Find an West Bridge device based on a TAG */ -cy_as_device * -cy_as_device_find_from_tag(cy_as_hal_device_tag tag) -{ - cy_as_device *dev_p; - - for (dev_p = g_device_list; dev_p != 0; dev_p = dev_p->next_p) { - if (dev_p->tag == tag) - return dev_p; - } - - return 0; -} - -/* Map a pre-V1.2 media type to the V1.2+ bus number */ -static void -cy_as_bus_from_media_type(cy_as_media_type type, - cy_as_bus_number_t *bus) -{ - if (type == cy_as_media_nand) - *bus = 0; - else - *bus = 1; -} - -static cy_as_return_status_t -my_handle_response_no_data(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(reply_p, 0); - - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* -* Create a new West Bridge device -*/ -cy_as_return_status_t -cy_as_misc_create_device(cy_as_device_handle *handle_p, - cy_as_hal_device_tag tag) -{ - cy_as_device *dev_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_log_debug_message(6, "cy_as_misc_create_device called"); - - dev_p = (cy_as_device *)cy_as_hal_alloc(sizeof(cy_as_device)); - if (dev_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - cy_as_hal_mem_set(dev_p, 0, sizeof(cy_as_device)); - - /* - * dynamically allocating this buffer to ensure that it is - * word aligned. - */ - dev_p->usb_ep_data = (uint8_t *)cy_as_hal_alloc(64 * sizeof(uint8_t)); - if (dev_p->usb_ep_data == 0) { - cy_as_hal_free(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - dev_p->sig = CY_AS_DEVICE_HANDLE_SIGNATURE; - dev_p->tag = tag; - dev_p->usb_max_tx_size = 0x40; - - dev_p->storage_write_endpoint = CY_AS_P2S_WRITE_ENDPOINT; - dev_p->storage_read_endpoint = CY_AS_P2S_READ_ENDPOINT; - - dev_p->func_cbs_misc = cy_as_create_c_b_queue(CYAS_FUNC_CB); - if (dev_p->func_cbs_misc == 0) - goto destroy; - - dev_p->func_cbs_res = cy_as_create_c_b_queue(CYAS_FUNC_CB); - if (dev_p->func_cbs_res == 0) - goto destroy; - - dev_p->func_cbs_stor = cy_as_create_c_b_queue(CYAS_FUNC_CB); - if (dev_p->func_cbs_stor == 0) - goto destroy; - - dev_p->func_cbs_usb = cy_as_create_c_b_queue(CYAS_FUNC_CB); - if (dev_p->func_cbs_usb == 0) - goto destroy; - - dev_p->func_cbs_mtp = cy_as_create_c_b_queue(CYAS_FUNC_CB); - if (dev_p->func_cbs_mtp == 0) - goto destroy; - - /* - * allocate memory for the DMA module here. it is then marked idle, and - * will be activated when cy_as_misc_configure_device is called. - */ - ret = cy_as_dma_start(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - cy_as_device_set_dma_stopped(dev_p); - - /* - * allocate memory for the low level module here. this module is also - * activated only when cy_as_misc_configure_device is called. - */ - ret = cy_as_ll_start(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - cy_as_device_set_low_level_stopped(dev_p); - - dev_p->next_p = g_device_list; - g_device_list = dev_p; - - *handle_p = dev_p; - cy_as_hal_init_dev_registers(tag, cy_false); - return CY_AS_ERROR_SUCCESS; - -destroy: - /* Free any queues that were successfully allocated. */ - if (dev_p->func_cbs_misc) - cy_as_destroy_c_b_queue(dev_p->func_cbs_misc); - - if (dev_p->func_cbs_res) - cy_as_destroy_c_b_queue(dev_p->func_cbs_res); - - if (dev_p->func_cbs_stor) - cy_as_destroy_c_b_queue(dev_p->func_cbs_stor); - - if (dev_p->func_cbs_usb) - cy_as_destroy_c_b_queue(dev_p->func_cbs_usb); - - if (dev_p->func_cbs_mtp) - cy_as_destroy_c_b_queue(dev_p->func_cbs_mtp); - - cy_as_hal_free(dev_p->usb_ep_data); - cy_as_hal_free(dev_p); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - else - return CY_AS_ERROR_OUT_OF_MEMORY; -} - -/* -* Destroy an existing West Bridge device -*/ -cy_as_return_status_t -cy_as_misc_destroy_device(cy_as_device_handle handle) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_destroy_device called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * if the USB stack is still running, - * it must be stopped first - */ - if (dev_p->usb_count > 0) - return CY_AS_ERROR_STILL_RUNNING; - - /* - * if the STORAGE stack is still running, - * it must be stopped first - */ - if (dev_p->storage_count > 0) - return CY_AS_ERROR_STILL_RUNNING; - - if (cy_as_device_is_intr_running(dev_p)) - ret = cy_as_intr_stop(dev_p); - - ret = cy_as_ll_stop(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_intr_start(dev_p, dev_p->use_int_drq); - return ret; - } - - ret = cy_as_dma_stop(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_intr_start(dev_p, dev_p->use_int_drq); - return ret; - } - - /* Reset the West Bridge device. */ - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_RST_CTRL_REG, - CY_AS_MEM_RST_CTRL_REG_HARD); - - /* - * remove the device from the device list - */ - if (g_device_list == dev_p) { - g_device_list = dev_p->next_p; - } else { - cy_as_device *tmp_p = g_device_list; - while (tmp_p && tmp_p->next_p != dev_p) - tmp_p = tmp_p->next_p; - - cy_as_hal_assert(tmp_p != 0); - tmp_p->next_p = dev_p->next_p; - } - - /* - * reset the signature so this will not be detected - * as a valid handle - */ - dev_p->sig = 0; - - cy_as_destroy_c_b_queue(dev_p->func_cbs_misc); - cy_as_destroy_c_b_queue(dev_p->func_cbs_res); - cy_as_destroy_c_b_queue(dev_p->func_cbs_stor); - cy_as_destroy_c_b_queue(dev_p->func_cbs_usb); - cy_as_destroy_c_b_queue(dev_p->func_cbs_mtp); - - /* - * free the memory associated with the device - */ - cy_as_hal_free(dev_p->usb_ep_data); - cy_as_hal_free(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -/* -* Determine the endian mode for the processor we are -* running on, then set the endian mode register -*/ -static void -cy_as_setup_endian_mode(cy_as_device *dev_p) -{ - /* - * In general, we always set west bridge intothe little - * endian mode. this causes the data on bit 0 internally - * to come out on data line 0 externally and it is generally - * what we want regardless of the endian mode of the - * processor. this capability in west bridge should be - * labeled as a "SWAP" capability and can be used to swap the - * bytes of data in and out of west bridge. this is - * useful if there is DMA hardware that requires this for some - * reason I cannot imagine at this time. basically if the - * wires are connected correctly, we should never need to - * change the endian-ness of west bridge. - */ - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_P0_ENDIAN, - CY_AS_LITTLE_ENDIAN); -} - -/* -* Query the West Bridge device and determine if we are an standby mode -*/ -cy_as_return_status_t -cy_as_misc_in_standby(cy_as_device_handle handle, cy_bool *standby) -{ - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_in_standby called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (cy_as_device_is_pin_standby(dev_p) || - cy_as_device_is_register_standby(dev_p)) { - *standby = cy_true; - } else - *standby = cy_false; - - return CY_AS_ERROR_SUCCESS; -} - -static void -cy_as_misc_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret); - - -static void -my_misc_callback(cy_as_device *dev_p, uint8_t context, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *resp_p, - cy_as_return_status_t ret) -{ - (void)resp_p; - (void)context; - (void)ret; - - switch (cy_as_ll_request_response__get_code(req_p)) { - case CY_RQT_INITIALIZATION_COMPLETE: - { - uint16_t v; - - cy_as_ll_send_status_response(dev_p, - CY_RQT_GENERAL_RQT_CONTEXT, - CY_AS_ERROR_SUCCESS, 0); - cy_as_device_set_firmware_loaded(dev_p); - - if (cy_as_device_is_waking(dev_p)) { - /* - * this is a callback from a - * cy_as_misc_leave_standby() - * request. in this case we call - * the standby callback and clear - * the waking state. - */ - if (dev_p->misc_event_cb) - dev_p->misc_event_cb( - (cy_as_device_handle)dev_p, - cy_as_event_misc_awake, 0); - cy_as_device_clear_waking(dev_p); - } else { - v = cy_as_ll_request_response__get_word - (req_p, 3); - - /* - * store the media supported on - * each of the device buses. - */ - dev_p->media_supported[0] = - (uint8_t)(v & 0xFF); - dev_p->media_supported[1] = - (uint8_t)((v >> 8) & 0xFF); - - v = cy_as_ll_request_response__get_word - (req_p, 4); - - dev_p->is_mtp_firmware = - (cy_bool)((v >> 8) & 0xFF); - - if (dev_p->misc_event_cb) - dev_p->misc_event_cb( - (cy_as_device_handle)dev_p, - cy_as_event_misc_initialized, 0); - } - - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_P0_VM_SET); - - if (v & CY_AS_MEM_P0_VM_SET_CFGMODE) - cy_as_hal_print_message( - "initialization message " - "received, but config bit " - "still set\n"); - - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG); - if ((v & CY_AS_MEM_RST_RSTCMPT) == 0) - cy_as_hal_print_message( - "initialization message " - "received, but reset complete " - "bit still not set\n"); - } - break; - - case CY_RQT_OUT_OF_SUSPEND: - cy_as_ll_send_status_response(dev_p, CY_RQT_GENERAL_RQT_CONTEXT, - CY_AS_ERROR_SUCCESS, 0); - cy_as_device_clear_suspend_mode(dev_p); - - /* - * if the wakeup was caused by an async cy_as_misc_leave_suspend - * call, we have to call the corresponding callback. - */ - if (dev_p->func_cbs_misc->count > 0) { - cy_as_func_c_b_node *node = (cy_as_func_c_b_node *) - dev_p->func_cbs_misc->head_p; - cy_as_hal_assert(node); - - if (cy_as_funct_c_b_type_get_type(node->data_type) == - CY_FUNCT_CB_MISC_LEAVESUSPEND) { - cy_as_hal_assert(node->cb_p != 0); - - node->cb_p((cy_as_device_handle)dev_p, - CY_AS_ERROR_SUCCESS, node->client_data, - CY_FUNCT_CB_MISC_LEAVESUSPEND, 0); - cy_as_remove_c_b_node(dev_p->func_cbs_misc); - } - } - - if (dev_p->misc_event_cb) - dev_p->misc_event_cb((cy_as_device_handle)dev_p, - cy_as_event_misc_wakeup, 0); - break; - - case CY_RQT_DEBUG_MESSAGE: - if ((req_p->data[0] == 0) && (req_p->data[1] == 0) && - (req_p->data[2] == 0)) { - if (dev_p->misc_event_cb) - dev_p->misc_event_cb((cy_as_device_handle)dev_p, - cy_as_event_misc_heart_beat, 0); - } else { - cy_as_hal_print_message( - "**** debug message: %02x " - "%02x %02x %02x %02x %02x\n", - req_p->data[0] & 0xff, - (req_p->data[0] >> 8) & 0xff, - req_p->data[1] & 0xff, - (req_p->data[1] >> 8) & 0xff, - req_p->data[2] & 0xff, - (req_p->data[2] >> 8) & 0xff); - } - break; - - case CY_RQT_WB_DEVICE_MISMATCH: - { - if (dev_p->misc_event_cb) - dev_p->misc_event_cb((cy_as_device_handle)dev_p, - cy_as_event_misc_device_mismatch, 0); - } - break; - - case CY_RQT_BOOTLOAD_NO_FIRMWARE: - { - /* TODO Handle case when firmware is - * not found during bootloading. */ - cy_as_hal_print_message("no firmware image found " - "during bootload. device not started\n"); - } - break; - - default: - cy_as_hal_assert(0); - } -} - -static cy_bool -is_valid_silicon_id(uint16_t v) -{ - cy_bool idok = cy_false; - - /* - * remove the revision number from the ID value - */ - v = v & CY_AS_MEM_CM_WB_CFG_ID_HDID_MASK; - - /* - * if this is west bridge, then we are OK. - */ - if (v == CY_AS_MEM_CM_WB_CFG_ID_HDID_ANTIOCH_VALUE || - v == CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_FPGA_VALUE || - v == CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_VALUE) - idok = cy_true; - - return idok; -} - -/* -* Configure the West Bridge device hardware -*/ -cy_as_return_status_t -cy_as_misc_configure_device(cy_as_device_handle handle, - cy_as_device_config *config_p) -{ - cy_as_return_status_t ret; - cy_bool standby; - cy_as_device *dev_p; - uint16_t v; - uint16_t fw_present; - cy_as_log_debug_message(6, "cy_as_misc_configure_device called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* Setup big endian vs little endian */ - cy_as_setup_endian_mode(dev_p); - - /* Now, confirm that we can talk to the West Bridge device */ - dev_p->silicon_id = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - fw_present = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG); - if (!(fw_present & CY_AS_MEM_RST_RSTCMPT)) { - if (!is_valid_silicon_id(dev_p->silicon_id)) - return CY_AS_ERROR_NO_ANTIOCH; - } - /* Check for standby mode */ - ret = cy_as_misc_in_standby(handle, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - if (ret) - return CY_AS_ERROR_IN_STANDBY; - - /* Setup P-port interface mode (CRAM / SRAM). */ - if (cy_as_device_is_astoria_dev(dev_p)) { - if (config_p->srammode) - v = CY_AS_MEM_P0_VM_SET_VMTYPE_SRAM; - else - v = CY_AS_MEM_P0_VM_SET_VMTYPE_RAM; - } else - v = CY_AS_MEM_P0_VM_SET_VMTYPE_RAM; - - /* Setup synchronous versus asynchronous mode */ - if (config_p->sync) - v |= CY_AS_MEM_P0_VM_SET_IFMODE; - if (config_p->dackmode == cy_as_device_dack_ack) - v |= CY_AS_MEM_P0_VM_SET_DACKEOB; - if (config_p->drqpol) - v |= CY_AS_MEM_P0_VM_SET_DRQPOL; - if (config_p->dackpol) - v |= CY_AS_MEM_P0_VM_SET_DACKPOL; - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_P0_VM_SET, v); - - if (config_p->crystal) - cy_as_device_set_crystal(dev_p); - else - cy_as_device_set_external_clock(dev_p); - - /* Register a callback to handle MISC requests from the firmware */ - cy_as_ll_register_request_callback(dev_p, - CY_RQT_GENERAL_RQT_CONTEXT, my_misc_callback); - - /* Now mark the DMA and low level modules as active. */ - cy_as_device_set_dma_running(dev_p); - cy_as_device_set_low_level_running(dev_p); - - /* Now, initialize the interrupt module */ - dev_p->use_int_drq = config_p->dmaintr; - ret = cy_as_intr_start(dev_p, config_p->dmaintr); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Mark the interface as initialized */ - cy_as_device_set_configured(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -static void -my_dma_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, - void *mem_p, - uint32_t size, - cy_as_return_status_t ret - ) -{ - cy_as_dma_end_point *ep_p; - - (void)size; - - /* Get the endpoint pointer based on the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, ep); - - /* Check the queue to see if is drained */ - if (ep_p->queue_p == 0) { - cy_as_func_c_b_node *node = - (cy_as_func_c_b_node *)dev_p->func_cbs_misc->head_p; - - cy_as_hal_assert(node); - - if (ret == CY_AS_ERROR_SUCCESS) { - /* - * disable endpoint 2. the storage module - * will enable this EP if necessary. - */ - cy_as_dma_enable_end_point(dev_p, - CY_AS_FIRMWARE_ENDPOINT, - cy_false, cy_as_direction_in); - - /* - * clear the reset register. this releases the - * antioch micro-controller from reset and begins - * running the code at address zero. - */ - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG, 0x00); - } - - /* Call the user Callback */ - node->cb_p((cy_as_device_handle)dev_p, ret, node->client_data, - node->data_type, node->data); - cy_as_remove_c_b_node(dev_p->func_cbs_misc); - } else { - /* This is the header data that was allocated in the - * download firmware function, and can be safely freed - * here. */ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(mem_p); - cy_as_hal_enable_interrupts(state); - } -} - -cy_as_return_status_t -cy_as_misc_download_firmware(cy_as_device_handle handle, - const void *mem_p, - uint16_t size, - cy_as_function_callback cb, - uint32_t client) -{ - uint8_t *header; - cy_as_return_status_t ret; - cy_bool standby; - cy_as_device *dev_p; - cy_as_dma_callback dmacb = 0; - uint32_t state; - - cy_as_log_debug_message(6, "cy_as_misc_download_firmware called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * if the device has not been initialized, we cannot download firmware - * to the device. - */ - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - /* - * make sure west bridge is not in standby - */ - ret = cy_as_misc_in_standby(dev_p, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (standby) - return CY_AS_ERROR_IN_STANDBY; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* - * make sure we are in configuration mode - */ - if ((cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_VM_SET) & - CY_AS_MEM_P0_VM_SET_CFGMODE) == 0) - return CY_AS_ERROR_NOT_IN_CONFIG_MODE; - - /* Maximum firmware size is 24k */ - if (size > CY_AS_MAXIMUM_FIRMWARE_SIZE) - return CY_AS_ERROR_INVALID_SIZE; - - /* Make sure the size is an even number of bytes as well */ - if (size & 0x01) - return CY_AS_ERROR_ALIGNMENT_ERROR; - - /* - * write the two word header that gives the base address and - * size of the firmware image to download - */ - state = cy_as_hal_disable_interrupts(); - header = (uint8_t *)cy_as_hal_c_b_alloc(4); - cy_as_hal_enable_interrupts(state); - if (header == NULL) - return CY_AS_ERROR_OUT_OF_MEMORY; - - header[0] = 0x00; - header[1] = 0x00; - header[2] = (uint8_t)(size & 0xff); - header[3] = (uint8_t)((size >> 8) & 0xff); - - /* Enable the firmware endpoint */ - ret = cy_as_dma_enable_end_point(dev_p, CY_AS_FIRMWARE_ENDPOINT, - cy_true, cy_as_direction_in); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * setup DMA for 64 byte packets. this is the requirement for downloading - * firmware to west bridge. - */ - cy_as_dma_set_max_dma_size(dev_p, CY_AS_FIRMWARE_ENDPOINT, 64); - - if (cb) - dmacb = my_dma_callback; - - ret = cy_as_dma_queue_request(dev_p, CY_AS_FIRMWARE_ENDPOINT, header, - 4, cy_false, cy_false, dmacb); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * write the firmware image to the west bridge device - */ - ret = cy_as_dma_queue_request(dev_p, CY_AS_FIRMWARE_ENDPOINT, - (void *)mem_p, size, cy_false, cy_false, dmacb); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cb) { - cy_as_func_c_b_node *cbnode = cy_as_create_func_c_b_node_data( - cb, client, CY_FUNCT_CB_MISC_DOWNLOADFIRMWARE, 0); - - if (cbnode == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - else - cy_as_insert_c_b_node(dev_p->func_cbs_misc, cbnode); - - ret = cy_as_dma_kick_start(dev_p, CY_AS_FIRMWARE_ENDPOINT); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } else { - ret = cy_as_dma_drain_queue(dev_p, - CY_AS_FIRMWARE_ENDPOINT, cy_true); - - /* Free the header memory that was allocated earlier. */ - cy_as_hal_c_b_free(header); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * disable EP 2. the storage module will - * enable this EP if necessary. - */ - cy_as_dma_enable_end_point(dev_p, CY_AS_FIRMWARE_ENDPOINT, - cy_false, cy_as_direction_in); - - /* - * clear the reset register. this releases the west bridge - * micro-controller from reset and begins running the code at - * address zero. - */ - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG, 0x00); - } - - /* - * the firmware is not marked as loaded until the firmware - * initializes west bridge and a request is sent from west bridge - * to the P port processor indicating that west bridge is ready. - */ - return CY_AS_ERROR_SUCCESS; -} - - -static cy_as_return_status_t -my_handle_response_get_firmware_version(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_get_firmware_version_data *data_p) -{ - - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t val; - - if (cy_as_ll_request_response__get_code(reply_p) - != CY_RESP_FIRMWARE_VERSION) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - data_p->major = cy_as_ll_request_response__get_word(reply_p, 0); - data_p->minor = cy_as_ll_request_response__get_word(reply_p, 1); - data_p->build = cy_as_ll_request_response__get_word(reply_p, 2); - val = cy_as_ll_request_response__get_word(reply_p, 3); - data_p->media_type = (uint8_t)(((val >> 8) & 0xFF) | (val & 0xFF)); - val = cy_as_ll_request_response__get_word(reply_p, 4); - data_p->is_debug_mode = (cy_bool)(val & 0xFF); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_misc_get_firmware_version(cy_as_device_handle handle, - cy_as_get_firmware_version_data *data, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_bool standby; - cy_as_ll_request_response *req_p, *reply_p; - - cy_as_device *dev_p; - - (void)client; - - cy_as_log_debug_message(6, "cy_as_misc_get_firmware_version called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* - * make sure antioch is not in standby - */ - ret = cy_as_misc_in_standby(dev_p, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - if (standby) - return CY_AS_ERROR_IN_STANDBY; - - /* Make sure the Antioch is not in suspend mode. */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_GET_FIRMWARE_VERSION, - CY_RQT_GENERAL_RQT_CONTEXT, 0); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* - * Reserve space for the reply, the reply data - * will not exceed three words - */ - reply_p = cy_as_ll_create_response(dev_p, 5); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* Request and response are freed in - * MyHandleResponseGetFirmwareVersion. */ - ret = my_handle_response_get_firmware_version(dev_p, - req_p, reply_p, data); - return ret; - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_GETFIRMWAREVERSION, data, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_get_firmware_version); - -static cy_as_return_status_t -my_handle_response_read_m_c_u_register(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - uint8_t *data_p) -{ - - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) - != CY_RESP_MCU_REGISTER_DATA) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - *data_p = (uint8_t) - (cy_as_ll_request_response__get_word(reply_p, 0)); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_handle_response_get_gpio_value(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - uint8_t *data_p) -{ - - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) - != CY_RESP_GPIO_STATE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } else - *data_p = (uint8_t) - (cy_as_ll_request_response__get_word(reply_p, 0)); - - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - - -cy_as_return_status_t cy_as_misc_set_sd_power_polarity( - cy_as_device_handle handle, - cy_as_misc_signal_polarity polarity, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SDPOLARITY, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)polarity); - - /* - * Reserve space for the reply, the reply data will - * not exceed one word - */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return (my_handle_response_no_data(dev_p, req_p, reply_p)); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_SETSDPOLARITY, 0, dev_p->func_cbs_misc, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the FuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} - - -cy_as_return_status_t -cy_as_misc_read_m_c_u_register(cy_as_device_handle handle, - uint16_t address, - uint8_t *value, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_read_m_c_u_register called"); - - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* Check whether the firmware supports this command. */ - if (cy_as_device_is_nand_storage_supported(dev_p)) - return CY_AS_ERROR_NOT_SUPPORTED; - - /* Make sure the Antioch is not in suspend mode. */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_READ_MCU_REGISTER, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, (uint16_t)address); - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_MCU_REGISTER_DATA) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - *value = (uint8_t)(cy_as_ll_request_response__get_word - (reply_p, 0)); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_READMCUREGISTER, value, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_read_m_c_u_register); - -cy_as_return_status_t -cy_as_misc_write_m_c_u_register(cy_as_device_handle handle, - uint16_t address, - uint8_t mask, - uint8_t value, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_write_m_c_u_register called"); - - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* Check whether the firmware supports this command. */ - if (cy_as_device_is_nand_storage_supported(dev_p)) - return CY_AS_ERROR_NOT_SUPPORTED; - - /* Make sure the Antioch is not in suspend mode. */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_WRITE_MCU_REGISTER, - CY_RQT_GENERAL_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, (uint16_t)address); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((mask << 8) | value)); - - /* - * Reserve space for the reply, the reply data - * will not exceed one word - */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_WRITEMCUREGISTER, 0, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* - * The request and response are freed as part of the - * MiscFuncCallback - */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -my_handle_response_reset(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_reset_type type) -{ - uint16_t v; - - (void)req_p; - (void)reply_p; - - /* - * if the device is in suspend mode, it needs to be woken up - * so that the write to the reset control register succeeds. - * we need not however wait for the wake up procedure to be - * complete. - */ - if (cy_as_device_is_in_suspend_mode(dev_p)) { - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - cy_as_hal_sleep(1); - } - - if (type == cy_as_reset_hard) { - cy_as_misc_cancel_ex_requests(dev_p); - cy_as_hal_write_register(dev_p->tag, CY_AS_MEM_RST_CTRL_REG, - CY_AS_MEM_RST_CTRL_REG_HARD); - cy_as_device_set_unconfigured(dev_p); - cy_as_device_set_firmware_not_loaded(dev_p); - cy_as_device_set_dma_stopped(dev_p); - cy_as_device_set_low_level_stopped(dev_p); - cy_as_device_set_intr_stopped(dev_p); - cy_as_device_clear_suspend_mode(dev_p); - cy_as_usb_cleanup(dev_p); - cy_as_storage_cleanup(dev_p); - - /* - * wait for a small amount of time to - * allow reset to be complete. - */ - cy_as_hal_sleep(100); - } - - cy_as_device_clear_reset_pending(dev_p); - - return CY_AS_ERROR_SUCCESS; -} - -cy_as_return_status_t -cy_as_misc_reset(cy_as_device_handle handle, - cy_as_reset_type type, - cy_bool flush, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - cy_as_end_point_number_t i; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - (void)client; - (void)cb; - - cy_as_log_debug_message(6, "cy_as_misc_reset_e_x called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* - * soft reset is not supported until we close on the issues - * in the firmware with what needs to happen. - */ - if (type == cy_as_reset_soft) - return CY_AS_ERROR_NOT_YET_SUPPORTED; - - cy_as_device_set_reset_pending(dev_p); - - if (flush) { - /* Unable to DrainQueues in polling mode */ - if ((dev_p->storage_cb || dev_p->storage_cb_ms) && - cy_as_hal_is_polling()) - return CY_AS_ERROR_ASYNC_PENDING; - - /* - * shutdown the endpoints so no more traffic can be queued - */ - for (i = 0; i < 15; i++) - cy_as_dma_enable_end_point(dev_p, i, cy_false, - cy_as_direction_dont_change); - - /* - * if we are in normal mode, drain all traffic across all - * endpoints to be sure all traffic is flushed. if the - * device is suspended, data will not be coming in on any - * endpoint and all outstanding DMA operations can be - * cancelled. - */ - if (cy_as_device_is_in_suspend_mode(dev_p)) { - for (i = 0; i < 15; i++) - cy_as_dma_cancel(dev_p, i, - CY_AS_ERROR_CANCELED); - } else { - for (i = 0; i < 15; i++) { - if ((i == CY_AS_P2S_WRITE_ENDPOINT) || - (i == CY_AS_P2S_READ_ENDPOINT)) - cy_as_dma_drain_queue(dev_p, i, - cy_false); - else - cy_as_dma_drain_queue(dev_p, i, - cy_true); - } - } - } else { - /* No flush was requested, so cancel any outstanding DMAs - * so the user callbacks are called as needed - */ - if (cy_as_device_is_storage_async_pending(dev_p)) { - for (i = 0; i < 15; i++) - cy_as_dma_cancel(dev_p, i, - CY_AS_ERROR_CANCELED); - } - } - - ret = my_handle_response_reset(dev_p, 0, 0, type); - - if (cb) - /* Even though no mailbox communication was needed, - * issue the callback so the user does not need to - * special case their code. */ - cb((cy_as_device_handle)dev_p, ret, client, - CY_FUNCT_CB_MISC_RESET, 0); - - /* - * initialize any registers that may have been - * changed when the device was reset. - */ - cy_as_hal_init_dev_registers(dev_p->tag, cy_false); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_reset); - -static cy_as_return_status_t -get_unallocated_resource(cy_as_device *dev_p, cy_as_resource_type resource) -{ - uint8_t shift = 0; - uint16_t v; - cy_as_return_status_t ret = CY_AS_ERROR_NOT_ACQUIRED; - - switch (resource) { - case cy_as_bus_u_s_b: - shift = 4; - break; - case cy_as_bus_1: - shift = 0; - break; - case cy_as_bus_0: - shift = 2; - break; - default: - cy_as_hal_assert(cy_false); - break; - } - - /* Get the semaphore value for this resource */ - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_RSE_ALLOCATE); - v = (v >> shift) & 0x03; - - if (v == 0x03) { - ret = CY_AS_ERROR_RESOURCE_ALREADY_OWNED; - } else if ((v & 0x01) == 0) { - /* The resource is not owned by anyone, we can try to get it */ - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_P0_RSE_MASK, (0x03 << shift)); - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_RSE_MASK); - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_P0_RSE_ALLOCATE, (0x01 << shift)); - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_P0_RSE_MASK); - - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_P0_RSE_ALLOCATE); - v = (v >> shift) & 0x03; - if (v == 0x03) - ret = CY_AS_ERROR_SUCCESS; - } - - return ret; -} - -static cy_as_return_status_t -my_handle_response_acquire_resource(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_resource_type *resource) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - if (ret == CY_AS_ERROR_SUCCESS) { - ret = get_unallocated_resource(dev_p, *resource); - if (ret != CY_AS_ERROR_NOT_ACQUIRED) - ret = CY_AS_ERROR_SUCCESS; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_misc_acquire_resource(cy_as_device_handle handle, - cy_as_resource_type *resource, - cy_bool force, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret; - - cy_as_device *dev_p; - - (void)client; - - cy_as_log_debug_message(6, "cy_as_misc_acquire_resource called"); - - if (*resource != cy_as_bus_u_s_b && *resource != - cy_as_bus_0 && *resource != cy_as_bus_1) - return CY_AS_ERROR_INVALID_RESOURCE; - - - /* Make sure the device is ready to accept the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - - ret = get_unallocated_resource(dev_p, *resource); - - /* - * make sure that the callback is called if the resource is - * successfully acquired at this point. - */ - if ((ret == CY_AS_ERROR_SUCCESS) && (cb != 0)) - cb(handle, ret, client, - CY_FUNCT_CB_MISC_ACQUIRERESOURCE, resource); - - if (ret != CY_AS_ERROR_NOT_ACQUIRED) - return ret; - - if (!force) - return CY_AS_ERROR_NOT_ACQUIRED; - - /* Create the request to acquire the resource */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_ACQUIRE_RESOURCE, - CY_RQT_RESOURCE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, (uint16_t)(*resource)); - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_ACQUIRERESOURCE, resource, - dev_p->func_cbs_res, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret == CY_AS_ERROR_SUCCESS) { - ret = get_unallocated_resource(dev_p, *resource); - if (ret != CY_AS_ERROR_NOT_ACQUIRED) - ret = CY_AS_ERROR_SUCCESS; - } - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_acquire_resource); - -cy_as_return_status_t -cy_as_misc_release_resource(cy_as_device_handle handle, - cy_as_resource_type resource) -{ - uint8_t shift = 0; - uint16_t v; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_release_resource called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (resource != cy_as_bus_u_s_b && resource != - cy_as_bus_0 && resource != cy_as_bus_1) - return CY_AS_ERROR_INVALID_RESOURCE; - - switch (resource) { - case cy_as_bus_u_s_b: - shift = 4; - break; - case cy_as_bus_1: - shift = 0; - break; - case cy_as_bus_0: - shift = 2; - break; - default: - cy_as_hal_assert(cy_false); - break; - } - - /* Get the semaphore value for this resource */ - v = (cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_P0_RSE_ALLOCATE) >> shift) & 0x03; - if (v == 0 || v == 1 || v == 2) - return CY_AS_ERROR_RESOURCE_NOT_OWNED; - - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_P0_RSE_MASK, (0x03 << shift)); - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_P0_RSE_ALLOCATE, (0x02 << shift)); - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_P0_RSE_MASK, 0); - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_misc_release_resource); - -cy_as_return_status_t -cy_as_misc_set_trace_level(cy_as_device_handle handle, - uint8_t level, - cy_as_bus_number_t bus, - uint32_t device, - uint32_t unit, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_set_trace_level called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (unit > 255) - return CY_AS_ERROR_NO_SUCH_UNIT; - - if (level >= CYAS_FW_TRACE_MAX_LEVEL) - return CY_AS_ERROR_INVALID_TRACE_LEVEL; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SET_TRACE_LEVEL, - CY_RQT_GENERAL_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)level); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((bus << 12) | (device << 8) | (unit))); - - /* - * Reserve space for the reply, the reply data will not - * exceed three words - */ - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_NOT_SUPPORTED; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_SETTRACELEVEL, 0, dev_p->func_cbs_misc, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_misc_heart_beat_control(cy_as_device_handle handle, - cy_bool enable, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_heart_beat_control called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_CONTROL_ANTIOCH_HEARTBEAT, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, (uint16_t)enable); - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_HEARTBEATCONTROL, 0, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_heart_beat_control); - -static cy_as_return_status_t -my_set_sd_clock_freq( - cy_as_device *dev_p, - uint8_t card_type, - uint8_t setting, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - - if (cy_as_device_is_in_callback(dev_p) && (cb == 0)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SET_SD_CLOCK_FREQ, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((card_type << 8) | setting)); - - /* Reserve space for the reply, which will not exceed one word. */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_SETSDFREQ, 0, dev_p->func_cbs_misc, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_misc_set_low_speed_sd_freq( - cy_as_device_handle handle, - cy_as_low_speed_sd_freq setting, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_set_low_speed_sd_freq called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if ((setting != CY_AS_SD_DEFAULT_FREQ) && - (setting != CY_AS_SD_RATED_FREQ)) - return CY_AS_ERROR_INVALID_PARAMETER; - - return my_set_sd_clock_freq(dev_p, 0, (uint8_t)setting, cb, client); -} -EXPORT_SYMBOL(cy_as_misc_set_low_speed_sd_freq); - -cy_as_return_status_t -cy_as_misc_set_high_speed_sd_freq( - cy_as_device_handle handle, - cy_as_high_speed_sd_freq setting, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_set_high_speed_sd_freq called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if ((setting != CY_AS_HS_SD_FREQ_24) && - (setting != CY_AS_HS_SD_FREQ_48)) - return CY_AS_ERROR_INVALID_PARAMETER; - - return my_set_sd_clock_freq(dev_p, 1, (uint8_t)setting, cb, client); -} -EXPORT_SYMBOL(cy_as_misc_set_high_speed_sd_freq); - -cy_as_return_status_t -cy_as_misc_get_gpio_value(cy_as_device_handle handle, - cy_as_misc_gpio pin, - uint8_t *value, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - cy_as_device *dev_p; - uint16_t v; - - cy_as_log_debug_message(6, "cy_as_misc_get_gpio_value called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* If the pin specified is UVALID, there is no need - * for firmware to be loaded. */ - if (pin == cy_as_misc_gpio_U_valid) { - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_PMU_UPDATE); - *value = (uint8_t)(v & CY_AS_MEM_PMU_UPDATE_UVALID); - - if (cb != 0) - cb(dev_p, ret, client, - CY_FUNCT_CB_MISC_GETGPIOVALUE, value); - - return ret; - } - - /* Check whether the firmware supports this command. */ - if (cy_as_device_is_nand_storage_supported(dev_p)) - return CY_AS_ERROR_NOT_SUPPORTED; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Make sure the pin selected is valid */ - if ((pin != cy_as_misc_gpio_1) && (pin != cy_as_misc_gpio_0)) - return CY_AS_ERROR_INVALID_PARAMETER; - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_GET_GPIO_STATE, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, ((uint8_t)pin << 8)); - - /* Reserve space for the reply, which will not exceed one word. */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_GPIO_STATE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - *value = (uint8_t) - cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_GETGPIOVALUE, value, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_get_gpio_value); - -cy_as_return_status_t -cy_as_misc_set_gpio_value(cy_as_device_handle handle, - cy_as_misc_gpio pin, - uint8_t value, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - cy_as_device *dev_p; - uint16_t v; - - cy_as_log_debug_message(6, "cy_as_misc_set_gpio_value called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* If the pin specified is UVALID, there is - * no need for firmware to be loaded. */ - if (pin == cy_as_misc_gpio_U_valid) { - v = cy_as_hal_read_register(dev_p->tag, CY_AS_MEM_PMU_UPDATE); - if (value) - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_PMU_UPDATE, - (v | CY_AS_MEM_PMU_UPDATE_UVALID)); - else - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_PMU_UPDATE, - (v & ~CY_AS_MEM_PMU_UPDATE_UVALID)); - - if (cb != 0) - cb(dev_p, ret, client, - CY_FUNCT_CB_MISC_SETGPIOVALUE, 0); - return ret; - } - - /* Check whether the firmware supports this command. */ - if (cy_as_device_is_nand_storage_supported(dev_p)) - return CY_AS_ERROR_NOT_SUPPORTED; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Make sure the pin selected is valid */ - if ((pin < cy_as_misc_gpio_0) || (pin > cy_as_misc_gpio_U_valid)) - return CY_AS_ERROR_INVALID_PARAMETER; - - /* Create and initialize the low level request to the firmware. */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SET_GPIO_STATE, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - v = (uint16_t)(((uint8_t)pin << 8) | (value > 0)); - cy_as_ll_request_response__set_word(req_p, 0, v); - - /* Reserve space for the reply, which will not exceed one word. */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_SETGPIOVALUE, 0, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_set_gpio_value); - -static cy_as_return_status_t -my_enter_standby(cy_as_device *dev_p, cy_bool pin) -{ - cy_as_misc_cancel_ex_requests(dev_p); - - /* Save the current values in the critical P-port - * registers, where necessary. */ - cy_as_hal_read_regs_before_standby(dev_p->tag); - - if (pin) { - if (cy_as_hal_set_wakeup_pin(dev_p->tag, cy_false)) - cy_as_device_set_pin_standby(dev_p); - else - return CY_AS_ERROR_SETTING_WAKEUP_PIN; - } else { - /* - * put antioch in the standby mode - */ - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_PWR_MAGT_STAT, 0x02); - cy_as_device_set_register_standby(dev_p); - } - - /* - * when the antioch comes out of standby, we have to wait until - * the firmware initialization completes before sending other - * requests down. - */ - cy_as_device_set_firmware_not_loaded(dev_p); - - /* - * keep west bridge interrupt disabled until the device is being woken - * up from standby. - */ - dev_p->stby_int_mask = cy_as_hal_disable_interrupts(); - - return CY_AS_ERROR_SUCCESS; -} - -static cy_as_return_status_t -my_handle_response_enter_standby(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_bool pin) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - ret = my_enter_standby(dev_p, pin); - - return ret; -} - -cy_as_return_status_t -cy_as_misc_enter_standby(cy_as_device_handle handle, - cy_bool pin, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response *req_p, *reply_p; - cy_bool standby; - - cy_as_log_debug_message(6, "cy_as_misc_enter_standby called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * if we already are in standby, do not do it again and let the - * user know via the error return. - */ - ret = cy_as_misc_in_standby(handle, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (standby == cy_true) - return CY_AS_ERROR_ALREADY_STANDBY; - - /* - * if the user wants to transition from suspend mode to standby mode, - * the device needs to be woken up so that it can complete all pending - * operations. - */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - cy_as_misc_leave_suspend(dev_p, 0, 0); - - if (dev_p->usb_count) { - /* - * we do not allow west bridge to go into standby mode when the - * USB stack is initialized. you must stop the USB stack in - * order to enter standby mode. - */ - return CY_AS_ERROR_USB_RUNNING; - } - - /* - * if the storage stack is not running, the device can directly be - * put into sleep mode. otherwise, the firmware needs to be signaled - * to prepare for going into sleep mode. - */ - if (dev_p->storage_count) { - /* - * if there are async storage operations pending, - * make one attempt to complete them. - */ - if (cy_as_device_is_storage_async_pending(dev_p)) { - /* DrainQueue will not work in polling mode */ - if (cy_as_hal_is_polling()) - return CY_AS_ERROR_ASYNC_PENDING; - - cy_as_dma_drain_queue(dev_p, - CY_AS_P2S_READ_ENDPOINT, cy_false); - cy_as_dma_drain_queue(dev_p, - CY_AS_P2S_WRITE_ENDPOINT, cy_false); - - /* - * if more storage operations were queued - * at this stage, return an error. - */ - if (cy_as_device_is_storage_async_pending(dev_p)) - return CY_AS_ERROR_ASYNC_PENDING; - } - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_PREPARE_FOR_STANDBY, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (!cb) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * in the HandleResponse */ - return my_handle_response_enter_standby(dev_p, - req_p, reply_p, pin); - - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_ENTERSTANDBY, (void *)pin, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else { - ret = my_enter_standby(dev_p, pin); - if (cb) - /* Even though no mailbox communication was - * needed, issue the callback so the user - * does not need to special case their code. */ - cb((cy_as_device_handle)dev_p, ret, client, - CY_FUNCT_CB_MISC_ENTERSTANDBY, 0); - } - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_enter_standby); - -cy_as_return_status_t -cy_as_misc_enter_standby_e_x_u(cy_as_device_handle handle, - cy_bool pin, - cy_bool uvalid_special, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - - dev_p = (cy_as_device *)handle; - if (uvalid_special) - cy_as_hal_write_register(dev_p->tag, 0xc5, 0x4); - - return cy_as_misc_enter_standby(handle, pin, cb, client); -} - -cy_as_return_status_t -cy_as_misc_leave_standby(cy_as_device_handle handle, - cy_as_resource_type resource) -{ - cy_as_device *dev_p; - uint16_t v; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint32_t count = 8; - uint8_t retry = 1; - - cy_as_log_debug_message(6, "cy_as_misc_leave_standby called"); - (void)resource; - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (cy_as_device_is_register_standby(dev_p)) { - /* - * set a flag to indicate that the west bridge is waking - * up from standby. - */ - cy_as_device_set_waking(dev_p); - - /* - * the initial read will not succeed, but will just wake - * the west bridge device from standby. successive reads - * should succeed and in that way we know west bridge is awake. - */ - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - - do { - /* - * we have initiated the operation to leave standby, now - * we need to wait at least N ms before trying to access - * the west bridge device to insure the PLLs have locked - * and we can talk to the device. - */ - if (cy_as_device_is_crystal(dev_p)) - cy_as_hal_sleep( - CY_AS_LEAVE_STANDBY_DELAY_CRYSTAL); - else - cy_as_hal_sleep( - CY_AS_LEAVE_STANDBY_DELAY_CLOCK); - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - - /* - * if the P-SPI interface mode is in use, there may be a - * need to re-synchronise the serial clock used for - * astoria access. - */ - if (!is_valid_silicon_id(v)) { - if (cy_as_hal_sync_device_clocks(dev_p->tag) != - cy_true) { - cy_as_hal_enable_interrupts( - dev_p->stby_int_mask); - return CY_AS_ERROR_TIMEOUT; - } - } - } while (!is_valid_silicon_id(v) && count-- > 0); - - /* - * if we tried to read the register and could not, - * return a timeout - */ - if (count == 0) { - cy_as_hal_enable_interrupts( - dev_p->stby_int_mask); - return CY_AS_ERROR_TIMEOUT; - } - - /* - * the standby flag is cleared here, after the action to - * exit standby has been taken. the wait for firmware - * initialization, is ensured by marking the firmware as - * not loaded until the init event is received. - */ - cy_as_device_clear_register_standby(dev_p); - - /* - * initialize any registers that may have been changed - * while the device was in standby mode. - */ - cy_as_hal_init_dev_registers(dev_p->tag, cy_true); - } else if (cy_as_device_is_pin_standby(dev_p)) { - /* - * set a flag to indicate that the west bridge is waking - * up from standby. - */ - cy_as_device_set_waking(dev_p); - -try_wakeup_again: - /* - * try to set the wakeup pin, if this fails in the HAL - * layer, return this failure to the user. - */ - if (!cy_as_hal_set_wakeup_pin(dev_p->tag, cy_true)) { - cy_as_hal_enable_interrupts(dev_p->stby_int_mask); - return CY_AS_ERROR_SETTING_WAKEUP_PIN; - } - - /* - * we have initiated the operation to leave standby, now - * we need to wait at least N ms before trying to access - * the west bridge device to insure the PL_ls have locked - * and we can talk to the device. - */ - if (cy_as_device_is_crystal(dev_p)) - cy_as_hal_sleep(CY_AS_LEAVE_STANDBY_DELAY_CRYSTAL); - else - cy_as_hal_sleep(CY_AS_LEAVE_STANDBY_DELAY_CLOCK); - - /* - * initialize any registers that may have been changed - * while the device was in standby mode. - */ - cy_as_hal_init_dev_registers(dev_p->tag, cy_true); - - /* - * the standby flag is cleared here, after the action to - * exit standby has been taken. the wait for firmware - * initialization, is ensured by marking the firmware as - * not loaded until the init event is received. - */ - cy_as_device_clear_pin_standby(dev_p); - } else { - return CY_AS_ERROR_NOT_IN_STANDBY; - } - - /* - * the west bridge interrupt can be enabled now. - */ - cy_as_hal_enable_interrupts(dev_p->stby_int_mask); - - /* - * release the west bridge micro-_controller from reset, - * so that firmware initialization can complete. the attempt - * to release antioch reset is made up to 8 times. - */ - v = 0x03; - count = 0x08; - while ((v & 0x03) && (count)) { - cy_as_hal_write_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG, 0x00); - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_RST_CTRL_REG); - count--; - } - - if (v & 0x03) { - cy_as_hal_print_message("failed to clear antioch reset\n"); - return CY_AS_ERROR_TIMEOUT; - } - - /* - * if the wake-up pin is being used, wait here to make - * sure that the wake-up event is received within a - * reasonable delay. otherwise, toggle the wake-up pin - * again in an attempt to start the firmware properly. - */ - if (retry) { - count = 10; - while (count) { - /* If the wake-up event has been received, - * we can return. */ - if (cy_as_device_is_firmware_loaded(dev_p)) - break; - /* If we are in polling mode, the interrupt may - * not have been serviced as yet. read the - * interrupt status register. if a pending mailbox - * interrupt is seen, we can assume that the - * wake-up event will be received soon. */ - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_P0_INTR_REG); - if (v & CY_AS_MEM_P0_INTR_REG_MBINT) - break; - - cy_as_hal_sleep(10); - count--; - } - - if (!count) { - retry = 0; - dev_p->stby_int_mask = cy_as_hal_disable_interrupts(); - cy_as_hal_set_wakeup_pin(dev_p->tag, cy_false); - cy_as_hal_sleep(10); - goto try_wakeup_again; - } - } - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_leave_standby); - -cy_as_return_status_t -cy_as_misc_register_callback( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The function to call */ - cy_as_misc_event_callback callback - ) -{ - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_misc_register_callback called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - dev_p->misc_event_cb = callback; - return CY_AS_ERROR_SUCCESS; -} - -cy_as_return_status_t -cy_as_misc_storage_changed(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_bool standby; - cy_as_ll_request_response *req_p, *reply_p; - - cy_as_log_debug_message(6, "cy_as_misc_storage_changed called"); - - /* Make sure the device is ready for the command. */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* - * make sure antioch is not in standby - */ - ret = cy_as_misc_in_standby(dev_p, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (standby) - return CY_AS_ERROR_IN_STANDBY; - - /* - * make sure westbridge is not in suspend mode. - */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_STORAGE_MEDIA_CHANGED, - CY_RQT_GENERAL_RQT_CONTEXT, 0); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_STORAGECHANGED, 0, - dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_storage_changed); - -cy_as_return_status_t -cy_as_misc_enter_suspend( - cy_as_device_handle handle, - cy_bool usb_wakeup_en, - cy_bool gpio_wakeup_en, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_bool standby; - cy_as_ll_request_response *req_p, *reply_p; - uint16_t value; - uint32_t int_state; - - cy_as_log_debug_message(6, "cy_as_misc_enter_suspend called"); - - /* - * basic sanity checks to ensure that the device is initialised. - */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* - * make sure west bridge is not already in standby - */ - cy_as_misc_in_standby(dev_p, &standby); - if (standby) - return CY_AS_ERROR_IN_STANDBY; - - /* - * make sure that the device is not already in suspend mode. - */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* - * make sure there is no active USB connection. - */ - if ((cy_as_device_is_usb_connected(dev_p)) && (dev_p->usb_last_event - != cy_as_event_usb_suspend)) - return CY_AS_ERROR_USB_CONNECTED; - - /* - * make sure that there are no async requests at this point in time. - */ - int_state = cy_as_hal_disable_interrupts(); - if ((dev_p->func_cbs_misc->count) || (dev_p->func_cbs_res->count) || - (dev_p->func_cbs_stor->count) || (dev_p->func_cbs_usb->count)) { - cy_as_hal_enable_interrupts(int_state); - return CY_AS_ERROR_ASYNC_PENDING; - } - cy_as_hal_enable_interrupts(int_state); - - /* Create the request to send to the Antioch device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_ENTER_SUSPEND_MODE, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply data will not - * exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Wakeup control flags. */ - value = 0x0001; - if (usb_wakeup_en) - value |= 0x04; - if (gpio_wakeup_en) - value |= 0x02; - cy_as_ll_request_response__set_word(req_p, 0, value); - - if (cb != 0) { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_ENTERSUSPEND, - 0, dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, - cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return CY_AS_ERROR_SUCCESS; - } else { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } - -destroy: - if (ret == CY_AS_ERROR_SUCCESS) - cy_as_device_set_suspend_mode(dev_p); - - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_enter_suspend); - -cy_as_return_status_t -cy_as_misc_leave_suspend( - cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - uint16_t v, count; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_log_debug_message(6, "cy_as_misc_leave_suspend called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* Make sure we are in suspend mode. */ - if (cy_as_device_is_in_suspend_mode(dev_p)) { - if (cb) { - cy_as_func_c_b_node *cbnode = - cy_as_create_func_c_b_node_data(cb, client, - CY_FUNCT_CB_MISC_LEAVESUSPEND, 0); - if (cbnode == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_insert_c_b_node(dev_p->func_cbs_misc, cbnode); - } - - /* - * do a read from the ID register so that the CE assertion - * will wake west bridge. the read is repeated until the - * read comes back with valid data. - */ - count = 8; - - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - - while (!is_valid_silicon_id(v) && count-- > 0) { - cy_as_hal_sleep(CY_AS_LEAVE_STANDBY_DELAY_CLOCK); - v = cy_as_hal_read_register(dev_p->tag, - CY_AS_MEM_CM_WB_CFG_ID); - } - - /* - * if we tried to read the register and could not, - * return a timeout - */ - if (count == 0) - return CY_AS_ERROR_TIMEOUT; - } else - return CY_AS_ERROR_NOT_IN_SUSPEND; - - if (cb == 0) { - /* - * wait until the in suspend mode flag is cleared. - */ - count = 20; - while ((cy_as_device_is_in_suspend_mode(dev_p)) - && (count--)) { - cy_as_hal_sleep(CY_AS_LEAVE_STANDBY_DELAY_CLOCK); - } - - if (cy_as_device_is_in_suspend_mode(dev_p)) - ret = CY_AS_ERROR_TIMEOUT; - } - - return ret; -} -EXPORT_SYMBOL(cy_as_misc_leave_suspend); - -cy_as_return_status_t -cy_as_misc_reserve_l_n_a_boot_area(cy_as_device_handle handle, - uint8_t numzones, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_bool standby; - cy_as_ll_request_response *req_p, *reply_p; - - cy_as_device *dev_p; - - (void)client; - - cy_as_log_debug_message(6, "cy_as_misc_switch_pnand_mode called"); - - /* Make sure we have a valid device */ - dev_p = (cy_as_device *)handle; - cy_as_check_device_ready(dev_p); - - /* - * make sure antioch is not in standby - */ - ret = cy_as_misc_in_standby(dev_p, &standby); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - if (standby) - return CY_AS_ERROR_IN_STANDBY; - - /* Make sure the Antioch is not in suspend mode. */ - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_RESERVE_LNA_BOOT_AREA, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - cy_as_ll_request_response__set_word(req_p, - 0, (uint16_t)numzones); - - /* Reserve space for the reply, the reply data will not - * exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MISC_RESERVELNABOOTAREA, - 0, dev_p->func_cbs_misc, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_misc_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_func_c_b_node* -cy_as_create_func_c_b_node_data(cy_as_function_callback cb, - uint32_t client, - cy_as_funct_c_b_type type, - void *data) -{ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_func_c_b_node *node = cy_as_hal_c_b_alloc( - sizeof(cy_as_func_c_b_node)); - cy_as_hal_enable_interrupts(state); - if (node != 0) { - node->node_type = CYAS_FUNC_CB; - node->cb_p = cb; - node->client_data = client; - node->data_type = type; - if (data != 0) - node->data_type |= CY_FUNCT_CB_DATA; - else - node->data_type |= CY_FUNCT_CB_NODATA; - node->data = data; - node->next_p = 0; - } - return node; -} - -cy_as_func_c_b_node* -cy_as_create_func_c_b_node(cy_as_function_callback cb, - uint32_t client) -{ - return cy_as_create_func_c_b_node_data(cb, client, - CY_FUNCT_CB_NODATA, 0); -} - -void -cy_as_destroy_func_c_b_node(cy_as_func_c_b_node *node) -{ - uint32_t state; - - node->node_type = CYAS_INVALID; - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node); - cy_as_hal_enable_interrupts(state); -} - -cy_as_usb_func_c_b_node* -cy_as_create_usb_func_c_b_node( - cy_as_usb_function_callback cb, uint32_t client) -{ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_usb_func_c_b_node *node = cy_as_hal_c_b_alloc( - sizeof(cy_as_usb_func_c_b_node)); - cy_as_hal_enable_interrupts(state); - if (node != 0) { - node->type = CYAS_USB_FUNC_CB; - node->cb_p = cb; - node->client_data = client; - node->next_p = 0; - } - return node; -} - -void -cy_as_destroy_usb_func_c_b_node(cy_as_usb_func_c_b_node *node) -{ - uint32_t state; - - node->type = CYAS_INVALID; - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node); - cy_as_hal_enable_interrupts(state); -} - -cy_as_usb_io_c_b_node* -cy_as_create_usb_io_c_b_node(cy_as_usb_io_callback cb) -{ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_usb_io_c_b_node *node = cy_as_hal_c_b_alloc( - sizeof(cy_as_usb_io_c_b_node)); - cy_as_hal_enable_interrupts(state); - if (node != 0) { - node->type = CYAS_USB_IO_CB; - node->cb_p = cb; - node->next_p = 0; - } - return node; -} - -void -cy_as_destroy_usb_io_c_b_node(cy_as_usb_io_c_b_node *node) -{ - uint32_t state; - - node->type = CYAS_INVALID; - - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node); - cy_as_hal_enable_interrupts(state); -} - -cy_as_storage_io_c_b_node* -cy_as_create_storage_io_c_b_node(cy_as_storage_callback cb, - cy_as_media_type media, uint32_t device_index, - uint32_t unit, uint32_t block_addr, cy_as_oper_type oper, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_storage_io_c_b_node *node = cy_as_hal_c_b_alloc( - sizeof(cy_as_storage_io_c_b_node)); - cy_as_hal_enable_interrupts(state); - if (node != 0) { - node->type = CYAS_STORAGE_IO_CB; - node->cb_p = cb; - node->media = media; - node->device_index = device_index; - node->unit = unit; - node->block_addr = block_addr; - node->oper = oper; - node->req_p = req_p; - node->reply_p = reply_p; - node->next_p = 0; - } - return node; -} - -void -cy_as_destroy_storage_io_c_b_node(cy_as_storage_io_c_b_node *node) -{ - uint32_t state; - node->type = CYAS_INVALID; - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(node); - cy_as_hal_enable_interrupts(state); -} - -cy_as_c_b_queue * -cy_as_create_c_b_queue(cy_as_c_b_node_type type) -{ - uint32_t state = cy_as_hal_disable_interrupts(); - cy_as_c_b_queue *queue = cy_as_hal_c_b_alloc( - sizeof(cy_as_c_b_queue)); - cy_as_hal_enable_interrupts(state); - if (queue) { - queue->type = type; - queue->head_p = 0; - queue->tail_p = 0; - queue->count = 0; - } - - return queue; -} - -void -cy_as_destroy_c_b_queue(cy_as_c_b_queue *queue) -{ - uint32_t state; - queue->type = CYAS_INVALID; - queue->head_p = 0; - queue->tail_p = 0; - queue->count = 0; - state = cy_as_hal_disable_interrupts(); - cy_as_hal_c_b_free(queue); - cy_as_hal_enable_interrupts(state); -} - -/* Inserts a CyAsCBNode into the queue, the - * node type must match the queue type*/ -void -cy_as_insert_c_b_node(cy_as_c_b_queue *queue_p, void*cbnode) -{ - uint32_t int_state; - - int_state = cy_as_hal_disable_interrupts(); - - cy_as_hal_assert(queue_p != 0); - - switch (queue_p->type) { - case CYAS_USB_FUNC_CB: - { - cy_as_usb_func_c_b_node *node = - (cy_as_usb_func_c_b_node *)cbnode; - cy_as_usb_func_c_b_node *tail = - (cy_as_usb_func_c_b_node *)queue_p->tail_p; - - cy_as_hal_assert(node->type == CYAS_USB_FUNC_CB); - cy_as_hal_assert(tail == 0 || - tail->type == CYAS_USB_FUNC_CB); - if (queue_p->head_p == 0) - queue_p->head_p = node; - else - tail->next_p = node; - - queue_p->tail_p = node; - } - break; - - case CYAS_USB_IO_CB: - { - cy_as_usb_io_c_b_node *node = - (cy_as_usb_io_c_b_node *)cbnode; - cy_as_usb_io_c_b_node *tail = - (cy_as_usb_io_c_b_node *)queue_p->tail_p; - - cy_as_hal_assert(node->type == CYAS_USB_IO_CB); - cy_as_hal_assert(tail == 0 || - tail->type == CYAS_USB_IO_CB); - if (queue_p->head_p == 0) - queue_p->head_p = node; - else - tail->next_p = node; - - queue_p->tail_p = node; - } - break; - - case CYAS_STORAGE_IO_CB: - { - cy_as_storage_io_c_b_node *node = - (cy_as_storage_io_c_b_node *)cbnode; - cy_as_storage_io_c_b_node *tail = - (cy_as_storage_io_c_b_node *)queue_p->tail_p; - - cy_as_hal_assert(node->type == CYAS_STORAGE_IO_CB); - cy_as_hal_assert(tail == 0 || - tail->type == CYAS_STORAGE_IO_CB); - if (queue_p->head_p == 0) - queue_p->head_p = node; - else - tail->next_p = node; - - queue_p->tail_p = node; - } - break; - - case CYAS_FUNC_CB: - { - cy_as_func_c_b_node *node = - (cy_as_func_c_b_node *)cbnode; - cy_as_func_c_b_node *tail = - (cy_as_func_c_b_node *)queue_p->tail_p; - - cy_as_hal_assert(node->node_type == CYAS_FUNC_CB); - cy_as_hal_assert(tail == 0 || - tail->node_type == CYAS_FUNC_CB); - if (queue_p->head_p == 0) - queue_p->head_p = node; - else - tail->next_p = node; - - queue_p->tail_p = node; - } - break; - - default: - cy_as_hal_assert(cy_false); - break; - } - - queue_p->count++; - - cy_as_hal_enable_interrupts(int_state); -} - -/* Removes the tail node from the queue and frees it */ -void -cy_as_remove_c_b_tail_node(cy_as_c_b_queue *queue_p) -{ - uint32_t int_state; - - int_state = cy_as_hal_disable_interrupts(); - - if (queue_p->count > 0) { - /* - * the worst case length of the queue should be - * under 10 elements, and the average case should - * be just 1 element. so, we just employ a linear - * search to find the node to be freed. - */ - switch (queue_p->type) { - case CYAS_FUNC_CB: - { - cy_as_func_c_b_node *node = - (cy_as_func_c_b_node *) - queue_p->head_p; - cy_as_func_c_b_node *tail = - (cy_as_func_c_b_node *) - queue_p->tail_p; - if (node != tail) { - while (node->next_p != tail) - node = node->next_p; - node->next_p = 0; - queue_p->tail_p = node; - } - cy_as_destroy_func_c_b_node(tail); - } - break; - - case CYAS_USB_FUNC_CB: - { - cy_as_usb_func_c_b_node *node = - (cy_as_usb_func_c_b_node *) - queue_p->head_p; - cy_as_usb_func_c_b_node *tail = - (cy_as_usb_func_c_b_node *) - queue_p->tail_p; - if (node != tail) { - while (node->next_p != tail) - node = node->next_p; - node->next_p = 0; - queue_p->tail_p = node; - } - - cy_as_destroy_usb_func_c_b_node(tail); - } - break; - - case CYAS_USB_IO_CB: - { - cy_as_usb_io_c_b_node *node = - (cy_as_usb_io_c_b_node *) - queue_p->head_p; - cy_as_usb_io_c_b_node *tail = - (cy_as_usb_io_c_b_node *) - queue_p->tail_p; - if (node != tail) { - while (node->next_p != tail) - node = node->next_p; - node->next_p = 0; - queue_p->tail_p = node; - } - cy_as_destroy_usb_io_c_b_node(tail); - } - break; - - case CYAS_STORAGE_IO_CB: - { - cy_as_storage_io_c_b_node *node = - (cy_as_storage_io_c_b_node *) - queue_p->head_p; - cy_as_storage_io_c_b_node *tail = - (cy_as_storage_io_c_b_node *) - queue_p->tail_p; - if (node != tail) { - while (node->next_p != tail) - node = node->next_p; - node->next_p = 0; - queue_p->tail_p = node; - } - cy_as_destroy_storage_io_c_b_node(tail); - } - break; - - default: - cy_as_hal_assert(cy_false); - } - - queue_p->count--; - if (queue_p->count == 0) { - queue_p->head_p = 0; - queue_p->tail_p = 0; - } - } - - cy_as_hal_enable_interrupts(int_state); -} - -/* Removes the first CyAsCBNode from the queue and frees it */ -void -cy_as_remove_c_b_node(cy_as_c_b_queue *queue_p) -{ - uint32_t int_state; - - int_state = cy_as_hal_disable_interrupts(); - - cy_as_hal_assert(queue_p->count >= 0); - if (queue_p->count > 0) { - if (queue_p->type == CYAS_USB_FUNC_CB) { - cy_as_usb_func_c_b_node *node = - (cy_as_usb_func_c_b_node *) - queue_p->head_p; - queue_p->head_p = node->next_p; - cy_as_destroy_usb_func_c_b_node(node); - } else if (queue_p->type == CYAS_USB_IO_CB) { - cy_as_usb_io_c_b_node *node = - (cy_as_usb_io_c_b_node *) - queue_p->head_p; - queue_p->head_p = node->next_p; - cy_as_destroy_usb_io_c_b_node(node); - } else if (queue_p->type == CYAS_STORAGE_IO_CB) { - cy_as_storage_io_c_b_node *node = - (cy_as_storage_io_c_b_node *) - queue_p->head_p; - queue_p->head_p = node->next_p; - cy_as_destroy_storage_io_c_b_node(node); - } else if (queue_p->type == CYAS_FUNC_CB) { - cy_as_func_c_b_node *node = - (cy_as_func_c_b_node *) - queue_p->head_p; - queue_p->head_p = node->next_p; - cy_as_destroy_func_c_b_node(node); - } else { - cy_as_hal_assert(cy_false); - } - - queue_p->count--; - if (queue_p->count == 0) { - queue_p->head_p = 0; - queue_p->tail_p = 0; - } - } - - cy_as_hal_enable_interrupts(int_state); -} - -void my_print_func_c_b_node(cy_as_func_c_b_node *node) -{ - cy_as_funct_c_b_type type = - cy_as_funct_c_b_type_get_type(node->data_type); - cy_as_hal_print_message("[cd:%2u dt:%2u cb:0x%08x " - "d:0x%08x nt:%1i]", node->client_data, type, - (uint32_t)node->cb_p, (uint32_t)node->data, - node->node_type); -} - -void my_print_c_b_queue(cy_as_c_b_queue *queue_p) -{ - uint32_t i = 0; - - cy_as_hal_print_message("| count: %u type: ", queue_p->count); - - if (queue_p->type == CYAS_USB_FUNC_CB) { - cy_as_hal_print_message("USB_FUNC_CB\n"); - } else if (queue_p->type == CYAS_USB_IO_CB) { - cy_as_hal_print_message("USB_IO_CB\n"); - } else if (queue_p->type == CYAS_STORAGE_IO_CB) { - cy_as_hal_print_message("STORAGE_IO_CB\n"); - } else if (queue_p->type == CYAS_FUNC_CB) { - cy_as_func_c_b_node *node = queue_p->head_p; - cy_as_hal_print_message("FUNC_CB\n"); - if (queue_p->count > 0) { - cy_as_hal_print_message("| head->"); - - for (i = 0; i < queue_p->count; i++) { - if (node) { - cy_as_hal_print_message("->"); - my_print_func_c_b_node(node); - node = node->next_p; - } else - cy_as_hal_print_message("->[NULL]\n"); - } - - cy_as_hal_print_message("\n| tail->"); - my_print_func_c_b_node(queue_p->tail_p); - cy_as_hal_print_message("\n"); - } - } else { - cy_as_hal_print_message("INVALID\n"); - } - - cy_as_hal_print_message("|----------\n"); -} - - -/* Removes and frees all pending callbacks */ -void -cy_as_clear_c_b_queue(cy_as_c_b_queue *queue_p) -{ - uint32_t int_state = cy_as_hal_disable_interrupts(); - - while (queue_p->count != 0) - cy_as_remove_c_b_node(queue_p); - - cy_as_hal_enable_interrupts(int_state); -} - -cy_as_return_status_t -cy_as_misc_send_request(cy_as_device *dev_p, - cy_as_function_callback cb, - uint32_t client, - cy_as_funct_c_b_type type, - void *data, - cy_as_c_b_queue *queue, - uint16_t req_type, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_response_callback rcb) -{ - - cy_as_func_c_b_node *cbnode = cy_as_create_func_c_b_node_data(cb, - client, type, data); - cy_as_return_status_t ret; - - if (cbnode == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - else - cy_as_insert_c_b_node(queue, cbnode); - - req_p->flags |= req_type; - - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, cy_false, rcb); - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_remove_c_b_tail_node(queue); - - return ret; -} - -void -cy_as_misc_cancel_ex_requests(cy_as_device *dev_p) -{ - int i; - for (i = 0; i < CY_RQT_CONTEXT_COUNT; i++) - cy_as_ll_remove_all_requests(dev_p, dev_p->context[i]); -} - - -static void -cy_as_misc_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - cy_as_func_c_b_node *node = NULL; - cy_as_return_status_t ret; - - cy_bool ex_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_EX) - == CY_AS_REQUEST_RESPONSE_EX; - cy_bool ms_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_MS) - == CY_AS_REQUEST_RESPONSE_MS; - uint8_t code; - uint32_t type; - uint8_t cntxt; - - cy_as_hal_assert(ex_request || ms_request); - (void) ex_request; - (void) ms_request; - (void)context; - - cntxt = cy_as_ll_request_response__get_context(rqt); - code = cy_as_ll_request_response__get_code(rqt); - - switch (cntxt) { - case CY_RQT_GENERAL_RQT_CONTEXT: - cy_as_hal_assert(dev_p->func_cbs_misc->count != 0); - cy_as_hal_assert(dev_p->func_cbs_misc->type == CYAS_FUNC_CB); - node = (cy_as_func_c_b_node *)dev_p->func_cbs_misc->head_p; - type = cy_as_funct_c_b_type_get_type(node->data_type); - - switch (code) { - case CY_RQT_GET_FIRMWARE_VERSION: - cy_as_hal_assert(node->data != 0); - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_GETFIRMWAREVERSION); - ret = my_handle_response_get_firmware_version(dev_p, - rqt, resp, - (cy_as_get_firmware_version_data *)node->data); - break; - case CY_RQT_READ_MCU_REGISTER: - cy_as_hal_assert(node->data != 0); - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_READMCUREGISTER); - ret = my_handle_response_read_m_c_u_register(dev_p, rqt, - resp, (uint8_t *)node->data); - break; - case CY_RQT_GET_GPIO_STATE: - cy_as_hal_assert(node->data != 0); - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_GETGPIOVALUE); - ret = my_handle_response_get_gpio_value(dev_p, rqt, - resp, (uint8_t *)node->data); - break; - case CY_RQT_SET_SD_CLOCK_FREQ: - cy_as_hal_assert(type == CY_FUNCT_CB_MISC_SETSDFREQ); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_CONTROL_ANTIOCH_HEARTBEAT: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_HEARTBEATCONTROL); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_WRITE_MCU_REGISTER: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_WRITEMCUREGISTER); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_STORAGE_MEDIA_CHANGED: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_STORAGECHANGED); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_SET_GPIO_STATE: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_SETGPIOVALUE); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_SET_TRACE_LEVEL: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_SETTRACELEVEL); - ret = my_handle_response_no_data(dev_p, rqt, resp); - if (ret == CY_AS_ERROR_INVALID_RESPONSE) - ret = CY_AS_ERROR_NOT_SUPPORTED; - break; - case CY_RQT_PREPARE_FOR_STANDBY: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_ENTERSTANDBY); - ret = my_handle_response_enter_standby(dev_p, rqt, resp, - (cy_bool)node->data); - break; - case CY_RQT_ENTER_SUSPEND_MODE: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_ENTERSUSPEND); - ret = my_handle_response_no_data(dev_p, rqt, resp); - if (ret == CY_AS_ERROR_SUCCESS) - cy_as_device_set_suspend_mode(dev_p); - - break; - case CY_RQT_RESERVE_LNA_BOOT_AREA: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_RESERVELNABOOTAREA); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_SDPOLARITY: - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_SETSDPOLARITY); - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - break; - - case CY_RQT_RESOURCE_RQT_CONTEXT: - cy_as_hal_assert(dev_p->func_cbs_res->count != 0); - cy_as_hal_assert(dev_p->func_cbs_res->type == CYAS_FUNC_CB); - node = (cy_as_func_c_b_node *)dev_p->func_cbs_res->head_p; - type = cy_as_funct_c_b_type_get_type(node->data_type); - - switch (code) { - case CY_RQT_ACQUIRE_RESOURCE: - /* The node->data field is actually an enum value - * which could be 0, thus no assert is done */ - cy_as_hal_assert(type == - CY_FUNCT_CB_MISC_ACQUIRERESOURCE); - ret = my_handle_response_acquire_resource(dev_p, rqt, - resp, (cy_as_resource_type *)node->data); - break; - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - break; - - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - - /* - * if the low level layer returns a direct error, use the - * corresponding error code. if not, use the error code - * based on the response from firmware. - */ - if (stat == CY_AS_ERROR_SUCCESS) - stat = ret; - - /* Call the user Callback */ - node->cb_p((cy_as_device_handle)dev_p, stat, node->client_data, - node->data_type, node->data); - if (cntxt == CY_RQT_GENERAL_RQT_CONTEXT) - cy_as_remove_c_b_node(dev_p->func_cbs_misc); - else - cy_as_remove_c_b_node(dev_p->func_cbs_res); - -} - - - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/api/src/cyasmtp.c b/drivers/staging/westbridge/astoria/api/src/cyasmtp.c deleted file mode 100644 index 8598364..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasmtp.c +++ /dev/null @@ -1,1136 +0,0 @@ -/* Cypress West Bridge API header file (cyasmtp.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasmtp.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasdma.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" - -static void -cy_as_mtp_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat); - -static cy_as_return_status_t -is_mtp_active(cy_as_device *dev_p) -{ - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->mtp_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - return CY_AS_ERROR_SUCCESS; -} - -static void -my_mtp_request_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *resp_p, - cy_as_return_status_t ret) -{ - uint16_t val, ev, status; - uint16_t mtp_datalen = 0; - uint32_t bytecount_l, bytecount_h; - cy_as_mtp_send_object_complete_data send_obj_data; - cy_as_mtp_get_object_complete_data get_obj_data; - cy_as_dma_end_point *ep_p; - - uint8_t code = cy_as_ll_request_response__get_code(req_p); - - (void)resp_p; - (void)context; - (void)ret; - - switch (code) { - case CY_RQT_MTP_EVENT: - val = cy_as_ll_request_response__get_word(req_p, 0); - /* MSB indicates status of read/write */ - status = (val >> 8) & 0xFF; - /* event type */ - ev = val & 0xFF; - switch (ev) { - case 0: /* SendObject Complete */ - { - bytecount_l = - cy_as_ll_request_response__get_word - (req_p, 1); - bytecount_h = - cy_as_ll_request_response__get_word - (req_p, 2); - send_obj_data.byte_count = - (bytecount_h << 16) | bytecount_l; - - send_obj_data.status = status; - - /* use the byte count again */ - bytecount_l = - cy_as_ll_request_response__get_word - (req_p, 3); - bytecount_h = - cy_as_ll_request_response__get_word - (req_p, 4); - send_obj_data.transaction_id = - (bytecount_h << 16) | bytecount_l; - - dev_p->mtp_turbo_active = cy_false; - - if (dev_p->mtp_event_cb) - dev_p->mtp_event_cb( - (cy_as_device_handle) dev_p, - cy_as_mtp_send_object_complete, - &send_obj_data); - } - break; - - case 1: /* GetObject Complete */ - { - bytecount_l = - cy_as_ll_request_response__get_word - (req_p, 1); - bytecount_h = - cy_as_ll_request_response__get_word - (req_p, 2); - - get_obj_data.byte_count = - (bytecount_h << 16) | bytecount_l; - - get_obj_data.status = status; - - dev_p->mtp_turbo_active = cy_false; - - if (dev_p->mtp_event_cb) - dev_p->mtp_event_cb( - (cy_as_device_handle) dev_p, - cy_as_mtp_get_object_complete, - &get_obj_data); - } - break; - - case 2: /* BlockTable Needed */ - { - if (dev_p->mtp_event_cb) - dev_p->mtp_event_cb( - (cy_as_device_handle) dev_p, - cy_as_mtp_block_table_needed, 0); - } - break; - default: - cy_as_hal_print_message("invalid event type\n"); - cy_as_ll_send_data_response(dev_p, - CY_RQT_TUR_RQT_CONTEXT, - CY_RESP_MTP_INVALID_EVENT, - sizeof(ev), &ev); - break; - } - break; - - case CY_RQT_TURBO_CMD_FROM_HOST: - { - mtp_datalen = - cy_as_ll_request_response__get_word(req_p, 1); - - /* Get the endpoint pointer based on - * the endpoint number */ - ep_p = CY_AS_NUM_EP(dev_p, CY_AS_MTP_READ_ENDPOINT); - - /* The event should arrive only after the DMA operation - * has been queued. */ - cy_as_hal_assert(ep_p->queue_p != 0); - - /* Put the len in ep data information in - * dmaqueue and kick start the queue */ - cy_as_hal_assert(ep_p->queue_p->size >= mtp_datalen); - - if (mtp_datalen == 0) { - cy_as_dma_completed_callback(dev_p->tag, - CY_AS_MTP_READ_ENDPOINT, 0, - CY_AS_ERROR_SUCCESS); - } else { - ep_p->maxhwdata = mtp_datalen; - - /* - * make sure that the DMA status for this - * EP is not running, so that the call to - * cy_as_dma_kick_start gets this transfer - * going. note: in MTP mode, we never leave - * a DMA transfer of greater than one packet - * running. so, it is okay to override the - * status here and start the next packet - * transfer. - */ - cy_as_dma_end_point_set_stopped(ep_p); - - /* Kick start the queue if it is not running */ - cy_as_dma_kick_start(dev_p, - CY_AS_MTP_READ_ENDPOINT); - } - } - break; - - case CY_RQT_TURBO_START_WRITE_DMA: - { - /* - * now that the firmware is ready to receive the - * next packet of data, start the corresponding - * DMA transfer. first, ensure that a DMA - * operation is still pending in the queue for the - * write endpoint. - */ - cy_as_ll_send_status_response(dev_p, - CY_RQT_TUR_RQT_CONTEXT, - CY_AS_ERROR_SUCCESS, 0); - - ep_p = CY_AS_NUM_EP(dev_p, CY_AS_MTP_WRITE_ENDPOINT); - cy_as_hal_assert(ep_p->queue_p != 0); - - cy_as_dma_end_point_set_stopped(ep_p); - cy_as_dma_kick_start(dev_p, CY_AS_MTP_WRITE_ENDPOINT); - } - break; - - default: - cy_as_hal_print_message("invalid request received " - "on TUR context\n"); - val = req_p->box0; - cy_as_ll_send_data_response(dev_p, CY_RQT_TUR_RQT_CONTEXT, - CY_RESP_INVALID_REQUEST, sizeof(val), &val); - break; - } -} - -static cy_as_return_status_t -my_handle_response_no_data(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_handle_response_mtp_start(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - dev_p->mtp_count++; - - cy_as_dma_enable_end_point(dev_p, CY_AS_MTP_READ_ENDPOINT, - cy_true, cy_as_direction_out); - dev_p->usb_config[CY_AS_MTP_READ_ENDPOINT].enabled = cy_true; - dev_p->usb_config[CY_AS_MTP_READ_ENDPOINT].dir = cy_as_usb_out; - dev_p->usb_config[CY_AS_MTP_READ_ENDPOINT].type = cy_as_usb_bulk; - - cy_as_dma_enable_end_point(dev_p, CY_AS_MTP_WRITE_ENDPOINT, - cy_true, cy_as_direction_in); - dev_p->usb_config[CY_AS_MTP_WRITE_ENDPOINT].enabled = cy_true; - dev_p->usb_config[CY_AS_MTP_WRITE_ENDPOINT].dir = cy_as_usb_in; - dev_p->usb_config[CY_AS_MTP_WRITE_ENDPOINT].type = cy_as_usb_bulk; - - /* Packet size is 512 bytes */ - cy_as_dma_set_max_dma_size(dev_p, 0x02, 0x0200); - /* Packet size is 64 bytes until a switch to high speed happens.*/ - cy_as_dma_set_max_dma_size(dev_p, 0x06, 0x40); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_ll_register_request_callback(dev_p, - CY_RQT_TUR_RQT_CONTEXT, 0); - - cy_as_device_clear_m_s_s_pending(dev_p); - - return ret; -} - - -cy_as_return_status_t -cy_as_mtp_start(cy_as_device_handle handle, - cy_as_mtp_event_callback event_c_b, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p; - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (cy_as_device_is_m_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - if (dev_p->storage_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (dev_p->usb_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (dev_p->is_mtp_firmware == 0) - return CY_AS_ERROR_NOT_SUPPORTED; - - cy_as_device_set_m_s_s_pending(dev_p); - - if (dev_p->mtp_count == 0) { - - dev_p->mtp_event_cb = event_c_b; - /* - * we register here because the start request may cause - * events to occur before the response to the start request. - */ - cy_as_ll_register_request_callback(dev_p, - CY_RQT_TUR_RQT_CONTEXT, my_mtp_request_callback); - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_START_MTP, CY_RQT_TUR_RQT_CONTEXT, 0); - if (req_p == 0) { - cy_as_device_clear_m_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_device_clear_m_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_mtp_start(dev_p, req_p, - reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_START, 0, dev_p->func_cbs_mtp, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else { - dev_p->mtp_count++; - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_MTP_START, 0); - } - - cy_as_device_clear_m_s_s_pending(dev_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_mtp_start); - -static cy_as_return_status_t -my_handle_response_mtp_stop(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* - * we successfully shutdown the stack, so decrement - * to make the count zero. - */ - dev_p->mtp_count--; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_ll_register_request_callback(dev_p, - CY_RQT_TUR_RQT_CONTEXT, 0); - - cy_as_device_clear_m_s_s_pending(dev_p); - - return ret; -} - -cy_as_return_status_t -cy_as_mtp_stop(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p = 0, *reply_p = 0; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_mtp_stop called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_mtp_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (cy_as_device_is_m_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - cy_as_device_set_m_s_s_pending(dev_p); - - if (dev_p->mtp_count == 1) { - /* Create the request to send to the West - * Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_STOP_MTP, - CY_RQT_TUR_RQT_CONTEXT, 0); - if (req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_mtp_stop(dev_p, req_p, - reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_STOP, 0, dev_p->func_cbs_mtp, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else if (dev_p->mtp_count > 1) { - - dev_p->mtp_count--; - - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_MTP_STOP, 0); - } - - cy_as_device_clear_m_s_s_pending(dev_p); - - return ret; -} - -static void -mtp_write_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - cy_as_hal_assert(context == CY_RQT_TUR_RQT_CONTEXT); - - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(resp, 0); - } - - if (ret != CY_AS_ERROR_SUCCESS) { - /* Firmware failed the request. Cancel the DMA transfer. */ - cy_as_dma_cancel(dev_p, 0x04, CY_AS_ERROR_CANCELED); - cy_as_device_clear_storage_async_pending(dev_p); - } - - cy_as_ll_destroy_response(dev_p, resp); - cy_as_ll_destroy_request(dev_p, rqt); -} - -static void -async_write_request_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, uint32_t size, - cy_as_return_status_t err) -{ - cy_as_device_handle h; - cy_as_function_callback cb; - - (void)size; - (void)buf_p; - (void)ep; - - - cy_as_log_debug_message(6, "async_write_request_callback called"); - - h = (cy_as_device_handle)dev_p; - - cb = dev_p->mtp_cb; - dev_p->mtp_cb = 0; - - cy_as_device_clear_storage_async_pending(dev_p); - - if (cb) - cb(h, err, dev_p->mtp_client, dev_p->mtp_op, 0); - -} - -static void -sync_mtp_callback(cy_as_device *dev_p, cy_as_end_point_number_t ep, - void *buf_p, uint32_t size, cy_as_return_status_t err) -{ - (void)ep; - (void)buf_p; - (void)size; - - dev_p->mtp_error = err; -} - -static cy_as_return_status_t -cy_as_mtp_operation(cy_as_device *dev_p, - cy_as_mtp_block_table *blk_table, - uint32_t num_bytes, - uint32_t transaction_id, - cy_as_function_callback cb, - uint32_t client, - uint8_t rqttype - ) -{ - cy_as_ll_request_response *req_p = 0, *reply_p = 0; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint32_t mask = 0; - cy_as_funct_c_b_type mtp_cb_op = 0; - uint16_t size = 2; - - if (dev_p->mtp_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (rqttype == CY_RQT_INIT_SEND_OBJECT) { - mtp_cb_op = CY_FUNCT_CB_MTP_INIT_SEND_OBJECT; - dev_p->mtp_turbo_active = cy_true; - } else if (rqttype == CY_RQT_INIT_GET_OBJECT) { - mtp_cb_op = CY_FUNCT_CB_MTP_INIT_GET_OBJECT; - dev_p->mtp_turbo_active = cy_true; - } else - mtp_cb_op = CY_FUNCT_CB_MTP_SEND_BLOCK_TABLE; - - ret = is_mtp_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (CY_RQT_INIT_GET_OBJECT == rqttype) - size = 4; - - /* Create the request to send to the West - * Bridge device */ - req_p = cy_as_ll_create_request(dev_p, rqttype, - CY_RQT_TUR_RQT_CONTEXT, size); - if (req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)(num_bytes & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((num_bytes >> 16) & 0xFFFF)); - - /* If it is GET_OBJECT, send transaction id as well*/ - if (CY_RQT_INIT_GET_OBJECT == rqttype) { - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(transaction_id & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 3, - (uint16_t)((transaction_id >> 16) & 0xFFFF)); - } - - if (cb == 0) { - /* Queue the DMA request for block table write */ - ret = cy_as_dma_queue_request(dev_p, 4, blk_table, - sizeof(cy_as_mtp_block_table), cy_false, - cy_false, sync_mtp_callback); - - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, 4, CY_AS_ERROR_CANCELED); - cy_as_device_clear_storage_async_pending(dev_p); - - goto destroy; - } - - ret = cy_as_dma_drain_queue(dev_p, 4, cy_true); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = dev_p->mtp_error; - goto destroy; - } else { -#if 0 - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_INIT_SEND_OBJECT, - 0, dev_p->func_cbs_mtp, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; -#endif - - /* Protection from interrupt driven code */ - /* since we are using storage EP4 check if any - * storage activity is pending */ - mask = cy_as_hal_disable_interrupts(); - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_ASYNC_PENDING; - } - cy_as_device_set_storage_async_pending(dev_p); - cy_as_hal_enable_interrupts(mask); - - dev_p->mtp_cb = cb; - dev_p->mtp_client = client; - dev_p->mtp_op = mtp_cb_op; - - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_false, mtp_write_callback); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = cy_as_dma_queue_request(dev_p, 4, blk_table, - sizeof(cy_as_mtp_block_table), cy_false, cy_false, - async_write_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Kick start the queue if it is not running */ - cy_as_dma_kick_start(dev_p, 4); - - return CY_AS_ERROR_SUCCESS; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_mtp_init_send_object(cy_as_device_handle handle, - cy_as_mtp_block_table *blk_table, - uint32_t num_bytes, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_device *dev_p; - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - return cy_as_mtp_operation(dev_p, blk_table, num_bytes, 0, cb, - client, CY_RQT_INIT_SEND_OBJECT); - -} -EXPORT_SYMBOL(cy_as_mtp_init_send_object); - -cy_as_return_status_t -cy_as_mtp_init_get_object(cy_as_device_handle handle, - cy_as_mtp_block_table *blk_table, - uint32_t num_bytes, - uint32_t transaction_id, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_device *dev_p; - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - return cy_as_mtp_operation(dev_p, blk_table, num_bytes, - transaction_id, cb, client, CY_RQT_INIT_GET_OBJECT); - -} -EXPORT_SYMBOL(cy_as_mtp_init_get_object); - -static cy_as_return_status_t -my_handle_response_cancel_send_object(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_mtp_cancel_send_object(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p = 0, *reply_p = 0; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p; - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (dev_p->mtp_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_CANCEL_SEND_OBJECT, CY_RQT_TUR_RQT_CONTEXT, 0); - if (req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_cancel_send_object(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_CANCEL_SEND_OBJECT, 0, - dev_p->func_cbs_mtp, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_mtp_cancel_send_object); - -static cy_as_return_status_t -my_handle_response_cancel_get_object(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_mtp_cancel_get_object(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p = 0, *reply_p = 0; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p; - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (dev_p->mtp_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_CANCEL_GET_OBJECT, - CY_RQT_TUR_RQT_CONTEXT, 0); - if (req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_cancel_get_object(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_CANCEL_GET_OBJECT, 0, - dev_p->func_cbs_mtp, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_mtp_cancel_get_object); - -cy_as_return_status_t -cy_as_mtp_send_block_table(cy_as_device_handle handle, - cy_as_mtp_block_table *blk_table, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p; - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - return cy_as_mtp_operation(dev_p, blk_table, 0, 0, cb, - client, CY_RQT_SEND_BLOCK_TABLE); -} - -static void -cy_as_mtp_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - cy_as_func_c_b_node* node = (cy_as_func_c_b_node *) - dev_p->func_cbs_mtp->head_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code; - cy_bool delay_callback = cy_false; - - cy_as_hal_assert(dev_p->func_cbs_mtp->count != 0); - cy_as_hal_assert(dev_p->func_cbs_mtp->type == CYAS_FUNC_CB); - - (void)context; - - /* The Handlers are responsible for Deleting the - * rqt and resp when they are finished - */ - code = cy_as_ll_request_response__get_code(rqt); - switch (code) { - case CY_RQT_START_MTP: - ret = my_handle_response_mtp_start(dev_p, rqt, - resp, stat); - break; - case CY_RQT_STOP_MTP: - ret = my_handle_response_mtp_stop(dev_p, rqt, - resp, stat); - break; -#if 0 - case CY_RQT_INIT_SEND_OBJECT: - ret = my_handle_response_init_send_object(dev_p, - rqt, resp, stat, cy_true); - delay_callback = cy_true; - break; -#endif - case CY_RQT_CANCEL_SEND_OBJECT: - ret = my_handle_response_cancel_send_object(dev_p, - rqt, resp, stat); - break; -#if 0 - case CY_RQT_INIT_GET_OBJECT: - ret = my_handle_response_init_get_object(dev_p, - rqt, resp, stat, cy_true); - delay_callback = cy_true; - break; -#endif - case CY_RQT_CANCEL_GET_OBJECT: - ret = my_handle_response_cancel_get_object(dev_p, - rqt, resp, stat); - break; -#if 0 - case CY_RQT_SEND_BLOCK_TABLE: - ret = my_handle_response_send_block_table(dev_p, rqt, - resp, stat, cy_true); - delay_callback = cy_true; - break; -#endif - case CY_RQT_ENABLE_USB_PATH: - ret = my_handle_response_no_data(dev_p, rqt, resp); - if (ret == CY_AS_ERROR_SUCCESS) - dev_p->is_storage_only_mode = cy_false; - break; - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - - /* - * if the low level layer returns a direct error, use the - * corresponding error code. if not, use the error code - * based on the response from firmware. - */ - if (stat == CY_AS_ERROR_SUCCESS) - stat = ret; - - if (!delay_callback) { - node->cb_p((cy_as_device_handle)dev_p, stat, node->client_data, - node->data_type, node->data); - cy_as_remove_c_b_node(dev_p->func_cbs_mtp); - } -} - -cy_as_return_status_t -cy_as_mtp_storage_only_start(cy_as_device_handle handle) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->storage_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - dev_p->is_storage_only_mode = cy_true; - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_mtp_storage_only_start); - -cy_as_return_status_t -cy_as_mtp_storage_only_stop(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->storage_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (dev_p->is_storage_only_mode == cy_false) - return CY_AS_ERROR_SUCCESS; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_ENABLE_USB_PATH, CY_RQT_TUR_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = my_handle_response_no_data(dev_p, req_p, - reply_p); - if (ret == CY_AS_ERROR_SUCCESS) - dev_p->is_storage_only_mode = cy_false; - return ret; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_MTP_STOP_STORAGE_ONLY, 0, - dev_p->func_cbs_mtp, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_mtp_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_mtp_storage_only_stop); - diff --git a/drivers/staging/westbridge/astoria/api/src/cyasstorage.c b/drivers/staging/westbridge/astoria/api/src/cyasstorage.c deleted file mode 100644 index 7abd6a3..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasstorage.c +++ /dev/null @@ -1,4125 +0,0 @@ -/* Cypress West Bridge API source file (cyasstorage.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* -* Storage Design -* -* The storage module is fairly straight forward once the -* DMA and LOWLEVEL modules have been designed. The -* storage module simple takes requests from the user, queues -* the associated DMA requests for action, and then sends -* the low level requests to the West Bridge firmware. -* -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasstorage.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasdevice.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyasdma.h" -#include "../../include/linux/westbridge/cyasregs.h" - -/* Map a pre-V1.2 media type to the V1.2+ bus number */ -cy_as_return_status_t -cy_an_map_bus_from_media_type(cy_as_device *dev_p, - cy_as_media_type type, cy_as_bus_number_t *bus) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code = (uint8_t)(1 << type); - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - - if (dev_p->media_supported[0] & code) { - if (dev_p->media_supported[1] & code) { - /* - * this media type could be supported on multiple - * buses. so, report an address resolution error. - */ - ret = CY_AS_ERROR_ADDRESS_RESOLUTION_ERROR; - } else - *bus = 0; - } else { - if (dev_p->media_supported[1] & code) - *bus = 1; - else - ret = CY_AS_ERROR_NO_SUCH_MEDIA; - } - - return ret; -} - -static uint16_t -create_address(cy_as_bus_number_t bus, uint32_t device, uint8_t unit) -{ - cy_as_hal_assert(bus >= 0 && bus < CY_AS_MAX_BUSES); - cy_as_hal_assert(device < 16); - - return (uint16_t)(((uint8_t)bus << 12) | (device << 8) | unit); -} - -cy_as_media_type -cy_as_storage_get_media_from_address(uint16_t v) -{ - cy_as_media_type media = cy_as_media_max_media_value; - - switch (v & 0xFF) { - case 0x00: - break; - case 0x01: - media = cy_as_media_nand; - break; - case 0x02: - media = cy_as_media_sd_flash; - break; - case 0x04: - media = cy_as_media_mmc_flash; - break; - case 0x08: - media = cy_as_media_ce_ata; - break; - case 0x10: - media = cy_as_media_sdio; - break; - default: - cy_as_hal_assert(0); - break; - } - - return media; -} - -cy_as_bus_number_t -cy_as_storage_get_bus_from_address(uint16_t v) -{ - cy_as_bus_number_t bus = (cy_as_bus_number_t)((v >> 12) & 0x0f); - cy_as_hal_assert(bus >= 0 && bus < CY_AS_MAX_BUSES); - return bus; -} - -uint32_t -cy_as_storage_get_device_from_address(uint16_t v) -{ - return (uint32_t)((v >> 8) & 0x0f); -} - -static uint8_t -get_unit_from_address(uint16_t v) -{ - return (uint8_t)(v & 0xff); -} - -static cy_as_return_status_t -cy_as_map_bad_addr(uint16_t val) -{ - cy_as_return_status_t ret = CY_AS_ERROR_INVALID_RESPONSE; - - switch (val) { - case 0: - ret = CY_AS_ERROR_NO_SUCH_BUS; - break; - case 1: - ret = CY_AS_ERROR_NO_SUCH_DEVICE; - break; - case 2: - ret = CY_AS_ERROR_NO_SUCH_UNIT; - break; - case 3: - ret = CY_AS_ERROR_INVALID_BLOCK; - break; - } - - return ret; -} - -static void -my_storage_request_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *resp_p, - cy_as_return_status_t ret) -{ - uint16_t val; - uint16_t addr; - cy_as_bus_number_t bus; - uint32_t device; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - cy_as_dma_end_point *ep_p = NULL; - - (void)resp_p; - (void)context; - (void)ret; - - switch (cy_as_ll_request_response__get_code(req_p)) { - case CY_RQT_MEDIA_CHANGED: - cy_as_ll_send_status_response(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - - /* Media has either been inserted or removed */ - addr = cy_as_ll_request_response__get_word(req_p, 0); - - bus = cy_as_storage_get_bus_from_address(addr); - device = cy_as_storage_get_device_from_address(addr); - - /* Clear the entry for this device to force re-query later */ - cy_as_hal_mem_set(&(dev_p->storage_device_info[bus][device]), 0, - sizeof(dev_p->storage_device_info[bus][device])); - - val = cy_as_ll_request_response__get_word(req_p, 1); - if (dev_p->storage_event_cb_ms) { - if (val == 1) - dev_p->storage_event_cb_ms(h, bus, - device, cy_as_storage_removed, 0); - else - dev_p->storage_event_cb_ms(h, bus, - device, cy_as_storage_inserted, 0); - } else if (dev_p->storage_event_cb) { - if (val == 1) - dev_p->storage_event_cb(h, bus, - cy_as_storage_removed, 0); - else - dev_p->storage_event_cb(h, bus, - cy_as_storage_inserted, 0); - } - - break; - - case CY_RQT_ANTIOCH_CLAIM: - cy_as_ll_send_status_response(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - if (dev_p->storage_event_cb || dev_p->storage_event_cb_ms) { - val = cy_as_ll_request_response__get_word(req_p, 0); - if (dev_p->storage_event_cb_ms) { - if (val & 0x0100) - dev_p->storage_event_cb_ms(h, 0, 0, - cy_as_storage_antioch, 0); - if (val & 0x0200) - dev_p->storage_event_cb_ms(h, 1, 0, - cy_as_storage_antioch, 0); - } else { - if (val & 0x01) - dev_p->storage_event_cb(h, - cy_as_media_nand, - cy_as_storage_antioch, 0); - if (val & 0x02) - dev_p->storage_event_cb(h, - cy_as_media_sd_flash, - cy_as_storage_antioch, 0); - if (val & 0x04) - dev_p->storage_event_cb(h, - cy_as_media_mmc_flash, - cy_as_storage_antioch, 0); - if (val & 0x08) - dev_p->storage_event_cb(h, - cy_as_media_ce_ata, - cy_as_storage_antioch, 0); - } - } - break; - - case CY_RQT_ANTIOCH_RELEASE: - cy_as_ll_send_status_response(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - val = cy_as_ll_request_response__get_word(req_p, 0); - if (dev_p->storage_event_cb_ms) { - if (val & 0x0100) - dev_p->storage_event_cb_ms(h, 0, 0, - cy_as_storage_processor, 0); - if (val & 0x0200) - dev_p->storage_event_cb_ms(h, 1, 0, - cy_as_storage_processor, 0); - } else if (dev_p->storage_event_cb) { - if (val & 0x01) - dev_p->storage_event_cb(h, - cy_as_media_nand, - cy_as_storage_processor, 0); - if (val & 0x02) - dev_p->storage_event_cb(h, - cy_as_media_sd_flash, - cy_as_storage_processor, 0); - if (val & 0x04) - dev_p->storage_event_cb(h, - cy_as_media_mmc_flash, - cy_as_storage_processor, 0); - if (val & 0x08) - dev_p->storage_event_cb(h, - cy_as_media_ce_ata, - cy_as_storage_processor, 0); - } - break; - - - case CY_RQT_SDIO_INTR: - cy_as_ll_send_status_response(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - val = cy_as_ll_request_response__get_word(req_p, 0); - if (dev_p->storage_event_cb_ms) { - if (val & 0x0100) - dev_p->storage_event_cb_ms(h, 1, 0, - cy_as_sdio_interrupt, 0); - else - dev_p->storage_event_cb_ms(h, 0, 0, - cy_as_sdio_interrupt, 0); - - } else if (dev_p->storage_event_cb) { - dev_p->storage_event_cb(h, - cy_as_media_sdio, cy_as_sdio_interrupt, 0); - } - break; - - case CY_RQT_P2S_DMA_START: - /* Do the DMA setup for the waiting operation. */ - cy_as_ll_send_status_response(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - cy_as_device_set_p2s_dma_start_recvd(dev_p); - if (dev_p->storage_oper == cy_as_op_read) { - ep_p = CY_AS_NUM_EP(dev_p, CY_AS_P2S_READ_ENDPOINT); - cy_as_dma_end_point_set_stopped(ep_p); - cy_as_dma_kick_start(dev_p, CY_AS_P2S_READ_ENDPOINT); - } else { - ep_p = CY_AS_NUM_EP(dev_p, CY_AS_P2S_WRITE_ENDPOINT); - cy_as_dma_end_point_set_stopped(ep_p); - cy_as_dma_kick_start(dev_p, CY_AS_P2S_WRITE_ENDPOINT); - } - break; - - default: - cy_as_hal_print_message("invalid request received " - "on storage context\n"); - val = req_p->box0; - cy_as_ll_send_data_response(dev_p, CY_RQT_STORAGE_RQT_CONTEXT, - CY_RESP_INVALID_REQUEST, sizeof(val), &val); - break; - } -} - -static cy_as_return_status_t -is_storage_active(cy_as_device *dev_p) -{ - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->storage_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - return CY_AS_ERROR_SUCCESS; -} - -static void -cy_as_storage_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret); - -static cy_as_return_status_t -my_handle_response_no_data(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_handle_response_storage_start(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (dev_p->storage_count > 0 && ret == - CY_AS_ERROR_ALREADY_RUNNING) - ret = CY_AS_ERROR_SUCCESS; - - ret = cy_as_dma_enable_end_point(dev_p, - CY_AS_P2S_WRITE_ENDPOINT, cy_true, cy_as_direction_in); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = cy_as_dma_set_max_dma_size(dev_p, - CY_AS_P2S_WRITE_ENDPOINT, CY_AS_STORAGE_EP_SIZE); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = cy_as_dma_enable_end_point(dev_p, - CY_AS_P2S_READ_ENDPOINT, cy_true, cy_as_direction_out); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = cy_as_dma_set_max_dma_size(dev_p, - CY_AS_P2S_READ_ENDPOINT, CY_AS_STORAGE_EP_SIZE); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - cy_as_ll_register_request_callback(dev_p, - CY_RQT_STORAGE_RQT_CONTEXT, my_storage_request_callback); - - /* Create the request/response used for storage reads and writes. */ - dev_p->storage_rw_req_p = cy_as_ll_create_request(dev_p, - 0, CY_RQT_STORAGE_RQT_CONTEXT, 5); - if (dev_p->storage_rw_req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - dev_p->storage_rw_resp_p = cy_as_ll_create_response(dev_p, 5); - if (dev_p->storage_rw_resp_p == 0) { - cy_as_ll_destroy_request(dev_p, dev_p->storage_rw_req_p); - ret = CY_AS_ERROR_OUT_OF_MEMORY; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - /* Increment the storage count only if - * the above functionality succeeds.*/ - if (ret == CY_AS_ERROR_SUCCESS) { - if (dev_p->storage_count == 0) { - cy_as_hal_mem_set(dev_p->storage_device_info, - 0, sizeof(dev_p->storage_device_info)); - dev_p->is_storage_only_mode = cy_false; - } - - dev_p->storage_count++; - } - - cy_as_device_clear_s_s_s_pending(dev_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_start(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (cy_as_device_is_s_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - cy_as_device_set_s_s_s_pending(dev_p); - - if (dev_p->storage_count == 0) { - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_START_STORAGE, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) { - cy_as_device_clear_s_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Reserve space for the reply, the reply data - * will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_device_clear_s_s_s_pending(dev_p); - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_storage_start(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_START, 0, dev_p->func_cbs_stor, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as - * part of the FuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else { - dev_p->storage_count++; - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_STOR_START, 0); - } - - cy_as_device_clear_s_s_s_pending(dev_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_start); - -static cy_as_return_status_t -my_handle_response_storage_stop(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret == CY_AS_ERROR_SUCCESS) { - cy_as_ll_destroy_request(dev_p, dev_p->storage_rw_req_p); - cy_as_ll_destroy_response(dev_p, dev_p->storage_rw_resp_p); - dev_p->storage_count--; - } - - cy_as_device_clear_s_s_s_pending(dev_p); - - return ret; -} -cy_as_return_status_t -cy_as_storage_stop(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_storage_async_pending(dev_p)) - return CY_AS_ERROR_ASYNC_PENDING; - - if (cy_as_device_is_s_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - cy_as_device_set_s_s_s_pending(dev_p); - - if (dev_p->storage_count == 1) { - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_STOP_STORAGE, CY_RQT_STORAGE_RQT_CONTEXT, 0); - if (req_p == 0) { - cy_as_device_clear_s_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Reserve space for the reply, the reply data - * will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_device_clear_s_s_s_pending(dev_p); - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_storage_stop(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_STOP, 0, dev_p->func_cbs_stor, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else if (dev_p->storage_count > 1) { - dev_p->storage_count--; - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_STOR_STOP, 0); - } - - cy_as_device_clear_s_s_s_pending(dev_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_stop); - -cy_as_return_status_t -cy_as_storage_register_callback(cy_as_device_handle handle, - cy_as_storage_event_callback callback) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->storage_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - dev_p->storage_event_cb = NULL; - dev_p->storage_event_cb_ms = callback; - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_storage_register_callback); - - -static cy_as_return_status_t -my_handle_response_storage_claim(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_NO_SUCH_ADDRESS) { - ret = cy_as_map_bad_addr( - cy_as_ll_request_response__get_word(reply_p, 3)); - goto destroy; - } - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_MEDIA_CLAIMED_RELEASED) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* The response must be about the address I am - * trying to claim or the firmware is broken */ - if ((cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(req_p, 0)) != - cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(reply_p, 0))) || - (cy_as_storage_get_device_from_address( - cy_as_ll_request_response__get_word(req_p, 0)) != - cy_as_storage_get_device_from_address( - cy_as_ll_request_response__get_word(reply_p, 0)))) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - if (cy_as_ll_request_response__get_word(reply_p, 1) != 1) - ret = CY_AS_ERROR_NOT_ACQUIRED; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_storage_claim(cy_as_device *dev_p, - void *data, - cy_as_bus_number_t bus, - uint32_t device, - uint16_t req_flags, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (dev_p->mtp_count > 0) - return CY_AS_ERROR_NOT_VALID_IN_MTP; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_CLAIM_STORAGE, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, - 0, create_address(bus, device, 0)); - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 4); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_storage_claim(dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_CLAIM, data, dev_p->func_cbs_stor, - req_flags, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of - * the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_claim(cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - return my_storage_claim(dev_p, NULL, bus, device, - CY_AS_REQUEST_RESPONSE_MS, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_claim); - -static cy_as_return_status_t -my_handle_response_storage_release(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_NO_SUCH_ADDRESS) { - ret = cy_as_map_bad_addr( - cy_as_ll_request_response__get_word(reply_p, 3)); - goto destroy; - } - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_MEDIA_CLAIMED_RELEASED) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* The response must be about the address I am - * trying to release or the firmware is broken */ - if ((cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(req_p, 0)) != - cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(reply_p, 0))) || - (cy_as_storage_get_device_from_address( - cy_as_ll_request_response__get_word(req_p, 0)) != - cy_as_storage_get_device_from_address( - cy_as_ll_request_response__get_word(reply_p, 0)))) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - - if (cy_as_ll_request_response__get_word(reply_p, 1) != 0) - ret = CY_AS_ERROR_NOT_RELEASED; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_storage_release(cy_as_device *dev_p, - void *data, - cy_as_bus_number_t bus, - uint32_t device, - uint16_t req_flags, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (dev_p->mtp_count > 0) - return CY_AS_ERROR_NOT_VALID_IN_MTP; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_RELEASE_STORAGE, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word( - req_p, 0, create_address(bus, device, 0)); - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 4); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_storage_release( - dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_RELEASE, data, dev_p->func_cbs_stor, - req_flags, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as - * part of the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_release(cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - return my_storage_release(dev_p, NULL, bus, device, - CY_AS_REQUEST_RESPONSE_MS, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_release); - -static cy_as_return_status_t -my_handle_response_storage_query_bus(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - uint32_t *count) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code = cy_as_ll_request_response__get_code(reply_p); - uint16_t v; - - if (code == CY_RESP_NO_SUCH_ADDRESS) { - ret = CY_AS_ERROR_NO_SUCH_BUS; - goto destroy; - } - - if (code != CY_RESP_BUS_DESCRIPTOR) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* - * verify that the response corresponds to the bus that was queried. - */ - if (cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(req_p, 0)) != - cy_as_storage_get_bus_from_address( - cy_as_ll_request_response__get_word(reply_p, 0))) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - v = cy_as_ll_request_response__get_word(reply_p, 1); - if (req_p->flags & CY_AS_REQUEST_RESPONSE_MS) { - /* - * this request is only for the count of devices - * on the bus. there is no need to check the media type. - */ - if (v) - *count = 1; - else - *count = 0; - } else { - /* - * this request is for the count of devices of a - * particular type. we need to check whether the media - * type found matches the queried type. - */ - cy_as_media_type queried = (cy_as_media_type) - cy_as_ll_request_response__get_word(req_p, 1); - cy_as_media_type found = - cy_as_storage_get_media_from_address(v); - - if (queried == found) - *count = 1; - else - *count = 0; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -my_storage_query_bus(cy_as_device *dev_p, - cy_as_bus_number_t bus, - cy_as_media_type type, - uint16_t req_flags, - uint32_t *count, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p, *reply_p; - cy_as_funct_c_b_type cb_type = CY_FUNCT_CB_STOR_QUERYBUS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Create the request to send to the Antioch device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_QUERY_BUS, CY_RQT_STORAGE_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, - 0, create_address(bus, 0, 0)); - cy_as_ll_request_response__set_word(req_p, 1, (uint16_t)type); - - /* Reserve space for the reply, the reply data - * will not exceed two words. */ - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - req_p->flags |= req_flags; - return my_handle_response_storage_query_bus(dev_p, - req_p, reply_p, count); - } else { - if (req_flags == CY_AS_REQUEST_RESPONSE_EX) - cb_type = CY_FUNCT_CB_STOR_QUERYMEDIA; - - ret = cy_as_misc_send_request(dev_p, cb, client, cb_type, - count, dev_p->func_cbs_stor, req_flags, - req_p, reply_p, cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of - * the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_query_bus(cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t *count, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - return my_storage_query_bus(dev_p, bus, cy_as_media_max_media_value, - CY_AS_REQUEST_RESPONSE_MS, count, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_query_bus); - -cy_as_return_status_t -cy_as_storage_query_media(cy_as_device_handle handle, - cy_as_media_type type, - uint32_t *count, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_bus_number_t bus; - - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - ret = cy_an_map_bus_from_media_type(dev_p, type, &bus); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - return my_storage_query_bus(dev_p, bus, type, CY_AS_REQUEST_RESPONSE_EX, - count, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_query_media); - -static cy_as_return_status_t -my_handle_response_storage_query_device(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - void *data_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t v; - cy_as_bus_number_t bus; - cy_as_media_type type; - uint32_t device; - cy_bool removable; - cy_bool writeable; - cy_bool locked; - uint16_t block_size; - uint32_t number_units; - uint32_t number_eus; - - if (cy_as_ll_request_response__get_code(reply_p) - == CY_RESP_NO_SUCH_ADDRESS) { - ret = cy_as_map_bad_addr( - cy_as_ll_request_response__get_word(reply_p, 3)); - goto destroy; - } - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_DEVICE_DESCRIPTOR) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* Unpack the response */ - v = cy_as_ll_request_response__get_word(reply_p, 0); - type = cy_as_storage_get_media_from_address(v); - bus = cy_as_storage_get_bus_from_address(v); - device = cy_as_storage_get_device_from_address(v); - - block_size = cy_as_ll_request_response__get_word(reply_p, 1); - - v = cy_as_ll_request_response__get_word(reply_p, 2); - removable = (v & 0x8000) ? cy_true : cy_false; - writeable = (v & 0x0100) ? cy_true : cy_false; - locked = (v & 0x0200) ? cy_true : cy_false; - number_units = (v & 0xff); - - number_eus = (cy_as_ll_request_response__get_word(reply_p, 3) << 16) - | cy_as_ll_request_response__get_word(reply_p, 4); - - /* Store the results based on the version of originating function */ - if (req_p->flags & CY_AS_REQUEST_RESPONSE_MS) { - cy_as_storage_query_device_data *store_p = - (cy_as_storage_query_device_data *)data_p; - - /* Make sure the response is about the address we asked - * about - if not, firmware error */ - if ((bus != store_p->bus) || (device != store_p->device)) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - store_p->desc_p.type = type; - store_p->desc_p.removable = removable; - store_p->desc_p.writeable = writeable; - store_p->desc_p.block_size = block_size; - store_p->desc_p.number_units = number_units; - store_p->desc_p.locked = locked; - store_p->desc_p.erase_unit_size = number_eus; - dev_p->storage_device_info[bus][device] = store_p->desc_p; - } else { - cy_as_storage_query_device_data_dep *store_p = - (cy_as_storage_query_device_data_dep *)data_p; - - /* Make sure the response is about the address we asked - * about - if not, firmware error */ - if ((type != store_p->type) || (device != store_p->device)) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - store_p->desc_p.type = type; - store_p->desc_p.removable = removable; - store_p->desc_p.writeable = writeable; - store_p->desc_p.block_size = block_size; - store_p->desc_p.number_units = number_units; - store_p->desc_p.locked = locked; - store_p->desc_p.erase_unit_size = number_eus; - dev_p->storage_device_info[bus][device] = store_p->desc_p; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_storage_query_device(cy_as_device *dev_p, - void *data_p, - uint16_t req_flags, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Create the request to send to the Antioch device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_QUERY_DEVICE, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, device, 0)); - - /* Reserve space for the reply, the reply data - * will not exceed five words. */ - reply_p = cy_as_ll_create_response(dev_p, 5); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - req_p->flags |= req_flags; - return my_handle_response_storage_query_device(dev_p, - req_p, reply_p, data_p); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_QUERYDEVICE, data_p, - dev_p->func_cbs_stor, req_flags, req_p, - reply_p, cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_query_device(cy_as_device_handle handle, - cy_as_storage_query_device_data *data_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - return my_storage_query_device(dev_p, data_p, - CY_AS_REQUEST_RESPONSE_MS, data_p->bus, - data_p->device, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_query_device); - -static cy_as_return_status_t -my_handle_response_storage_query_unit(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - void *data_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_bus_number_t bus; - uint32_t device; - uint32_t unit; - cy_as_media_type type; - uint16_t block_size; - uint32_t start_block; - uint32_t unit_size; - uint16_t v; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_NO_SUCH_ADDRESS) { - ret = cy_as_map_bad_addr( - cy_as_ll_request_response__get_word(reply_p, 3)); - goto destroy; - } - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_UNIT_DESCRIPTOR) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* Unpack the response */ - v = cy_as_ll_request_response__get_word(reply_p, 0); - bus = cy_as_storage_get_bus_from_address(v); - device = cy_as_storage_get_device_from_address(v); - unit = get_unit_from_address(v); - - type = cy_as_storage_get_media_from_address( - cy_as_ll_request_response__get_word(reply_p, 1)); - - block_size = cy_as_ll_request_response__get_word(reply_p, 2); - start_block = cy_as_ll_request_response__get_word(reply_p, 3) - | (cy_as_ll_request_response__get_word(reply_p, 4) << 16); - unit_size = cy_as_ll_request_response__get_word(reply_p, 5) - | (cy_as_ll_request_response__get_word(reply_p, 6) << 16); - - /* Store the results based on the version of - * originating function */ - if (req_p->flags & CY_AS_REQUEST_RESPONSE_MS) { - cy_as_storage_query_unit_data *store_p = - (cy_as_storage_query_unit_data *)data_p; - - /* Make sure the response is about the address we - * asked about - if not, firmware error */ - if (bus != store_p->bus || device != store_p->device || - unit != store_p->unit) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - store_p->desc_p.type = type; - store_p->desc_p.block_size = block_size; - store_p->desc_p.start_block = start_block; - store_p->desc_p.unit_size = unit_size; - } else { - cy_as_storage_query_unit_data_dep *store_p = - (cy_as_storage_query_unit_data_dep *)data_p; - - /* Make sure the response is about the media type we asked - * about - if not, firmware error */ - if ((type != store_p->type) || (device != store_p->device) || - (unit != store_p->unit)) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - store_p->desc_p.type = type; - store_p->desc_p.block_size = block_size; - store_p->desc_p.start_block = start_block; - store_p->desc_p.unit_size = unit_size; - } - - dev_p->storage_device_info[bus][device].type = type; - dev_p->storage_device_info[bus][device].block_size = block_size; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_storage_query_unit(cy_as_device *dev_p, - void *data_p, - uint16_t req_flags, - cy_as_bus_number_t bus, - uint32_t device, - uint32_t unit, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_QUERY_UNIT, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - if (device > 255) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (unit > 255) - return CY_AS_ERROR_NO_SUCH_UNIT; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, device, (uint8_t)unit)); - - /* Reserve space for the reply, the reply data - * will be of seven words. */ - reply_p = cy_as_ll_create_response(dev_p, 7); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - req_p->flags |= req_flags; - return my_handle_response_storage_query_unit(dev_p, - req_p, reply_p, data_p); - } else { - - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_QUERYUNIT, data_p, - dev_p->func_cbs_stor, req_flags, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_query_unit(cy_as_device_handle handle, - cy_as_storage_query_unit_data *data_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - return my_storage_query_unit(dev_p, data_p, CY_AS_REQUEST_RESPONSE_MS, - data_p->bus, data_p->device, data_p->unit, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_query_unit); - -static cy_as_return_status_t -cy_as_get_block_size(cy_as_device *dev_p, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_function_callback cb) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_QUERY_DEVICE, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, device, 0)); - - reply_p = cy_as_ll_create_response(dev_p, 4); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) - == CY_RESP_NO_SUCH_ADDRESS) { - ret = CY_AS_ERROR_NO_SUCH_BUS; - goto destroy; - } - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_DEVICE_DESCRIPTOR) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* Make sure the response is about the media type we asked - * about - if not, firmware error */ - if ((cy_as_storage_get_bus_from_address - (cy_as_ll_request_response__get_word(reply_p, 0)) - != bus) || (cy_as_storage_get_device_from_address - (cy_as_ll_request_response__get_word(reply_p, 0)) - != device)) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - - dev_p->storage_device_info[bus][device].block_size = - cy_as_ll_request_response__get_word(reply_p, 1); - } else - ret = CY_AS_ERROR_INVALID_REQUEST; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -my_storage_device_control( - cy_as_device *dev_p, - cy_as_bus_number_t bus, - uint32_t device, - cy_bool card_detect_en, - cy_bool write_prot_en, - cy_as_storage_card_detect config_detect, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret; - cy_bool use_gpio = cy_false; - - (void)device; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - /* If SD is not supported on the specified bus, - * then return ERROR */ - if ((dev_p->media_supported[bus] == 0) || - (dev_p->media_supported[bus] & (1<func_cbs_stor, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_device_control(cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_bool card_detect_en, - cy_bool write_prot_en, - cy_as_storage_card_detect config_detect, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - return my_storage_device_control(dev_p, bus, device, card_detect_en, - write_prot_en, config_detect, cb, client); -} -EXPORT_SYMBOL(cy_as_storage_device_control); - -static void -cy_as_async_storage_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, uint32_t size, - cy_as_return_status_t ret) -{ - cy_as_storage_callback_dep cb; - cy_as_storage_callback cb_ms; - - (void)size; - (void)buf_p; - (void)ep; - - cy_as_device_clear_storage_async_pending(dev_p); - - /* - * if the LL request callback has already been called, - * the user callback has to be called from here. - */ - if (!dev_p->storage_wait) { - cy_as_hal_assert(dev_p->storage_cb != NULL || - dev_p->storage_cb_ms != NULL); - cb = dev_p->storage_cb; - cb_ms = dev_p->storage_cb_ms; - - dev_p->storage_cb = 0; - dev_p->storage_cb_ms = 0; - - if (ret == CY_AS_ERROR_SUCCESS) - ret = dev_p->storage_error; - - if (cb_ms) { - cb_ms((cy_as_device_handle)dev_p, - dev_p->storage_bus_index, - dev_p->storage_device_index, - dev_p->storage_unit, - dev_p->storage_block_addr, - dev_p->storage_oper, ret); - } else { - cb((cy_as_device_handle)dev_p, - dev_p->storage_device_info - [dev_p->storage_bus_index] - [dev_p->storage_device_index].type, - dev_p->storage_device_index, - dev_p->storage_unit, - dev_p->storage_block_addr, - dev_p->storage_oper, ret); - } - } else - dev_p->storage_error = ret; -} - -static void -cy_as_async_storage_reply_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - cy_as_storage_callback_dep cb; - cy_as_storage_callback cb_ms; - uint8_t reqtype; - (void)rqt; - (void)context; - - reqtype = cy_as_ll_request_response__get_code(rqt); - - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp) == - CY_RESP_ANTIOCH_DEFERRED_ERROR) { - ret = cy_as_ll_request_response__get_word - (resp, 0) & 0x00FF; - } else if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - } - - if (ret != CY_AS_ERROR_SUCCESS) { - if (reqtype == CY_RQT_READ_BLOCK) - cy_as_dma_cancel(dev_p, - dev_p->storage_read_endpoint, ret); - else - cy_as_dma_cancel(dev_p, - dev_p->storage_write_endpoint, ret); - } - - dev_p->storage_wait = cy_false; - - /* - * if the DMA callback has already been called, the - * user callback has to be called from here. - */ - if (!cy_as_device_is_storage_async_pending(dev_p)) { - cy_as_hal_assert(dev_p->storage_cb != NULL || - dev_p->storage_cb_ms != NULL); - cb = dev_p->storage_cb; - cb_ms = dev_p->storage_cb_ms; - - dev_p->storage_cb = 0; - dev_p->storage_cb_ms = 0; - - if (ret == CY_AS_ERROR_SUCCESS) - ret = dev_p->storage_error; - - if (cb_ms) { - cb_ms((cy_as_device_handle)dev_p, - dev_p->storage_bus_index, - dev_p->storage_device_index, - dev_p->storage_unit, - dev_p->storage_block_addr, - dev_p->storage_oper, ret); - } else { - cb((cy_as_device_handle)dev_p, - dev_p->storage_device_info - [dev_p->storage_bus_index] - [dev_p->storage_device_index].type, - dev_p->storage_device_index, - dev_p->storage_unit, - dev_p->storage_block_addr, - dev_p->storage_oper, ret); - } - } else - dev_p->storage_error = ret; -} - -static cy_as_return_status_t -cy_as_storage_async_oper(cy_as_device *dev_p, cy_as_end_point_number_t ep, - uint8_t reqtype, uint16_t req_flags, cy_as_bus_number_t bus, - uint32_t device, uint32_t unit, uint32_t block, void *data_p, - uint16_t num_blocks, cy_as_storage_callback_dep callback, - cy_as_storage_callback callback_ms) -{ - uint32_t mask; - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (unit > 255) - return CY_AS_ERROR_NO_SUCH_UNIT; - - /* We are supposed to return success if the number of - * blocks is zero - */ - if (num_blocks == 0) { - if (callback_ms) - callback_ms((cy_as_device_handle)dev_p, - bus, device, unit, block, - ((reqtype == CY_RQT_WRITE_BLOCK) - ? cy_as_op_write : cy_as_op_read), - CY_AS_ERROR_SUCCESS); - else - callback((cy_as_device_handle)dev_p, - dev_p->storage_device_info[bus][device].type, - device, unit, block, - ((reqtype == CY_RQT_WRITE_BLOCK) ? - cy_as_op_write : cy_as_op_read), - CY_AS_ERROR_SUCCESS); - - return CY_AS_ERROR_SUCCESS; - } - - if (dev_p->storage_device_info[bus][device].block_size == 0) - return CY_AS_ERROR_QUERY_DEVICE_NEEDED; - - /* - * since async operations can be triggered by interrupt - * code, we must insure that we do not get multiple - * async operations going at one time and protect this - * test and set operation from interrupts. also need to - * check for pending async MTP writes - */ - mask = cy_as_hal_disable_interrupts(); - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait) || - (cy_as_device_is_usb_async_pending(dev_p, 6))) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_ASYNC_PENDING; - } - - cy_as_device_set_storage_async_pending(dev_p); - cy_as_device_clear_p2s_dma_start_recvd(dev_p); - cy_as_hal_enable_interrupts(mask); - - /* - * storage information about the currently outstanding request - */ - dev_p->storage_cb = callback; - dev_p->storage_cb_ms = callback_ms; - dev_p->storage_bus_index = bus; - dev_p->storage_device_index = device; - dev_p->storage_unit = unit; - dev_p->storage_block_addr = block; - - /* Initialise the request to send to the West Bridge. */ - req_p = dev_p->storage_rw_req_p; - cy_as_ll_init_request(req_p, reqtype, CY_RQT_STORAGE_RQT_CONTEXT, 5); - - /* Initialise the space for reply from the West Bridge. */ - reply_p = dev_p->storage_rw_resp_p; - cy_as_ll_init_response(reply_p, 5); - - /* Remember which version of the API originated the request */ - req_p->flags |= req_flags; - - /* Setup the DMA request and adjust the storage - * operation if we are reading */ - if (reqtype == CY_RQT_READ_BLOCK) { - ret = cy_as_dma_queue_request(dev_p, ep, data_p, - dev_p->storage_device_info[bus][device].block_size - * num_blocks, cy_false, cy_true, - cy_as_async_storage_callback); - dev_p->storage_oper = cy_as_op_read; - } else if (reqtype == CY_RQT_WRITE_BLOCK) { - ret = cy_as_dma_queue_request(dev_p, ep, data_p, - dev_p->storage_device_info[bus][device].block_size * - num_blocks, cy_false, cy_false, - cy_as_async_storage_callback); - dev_p->storage_oper = cy_as_op_write; - } - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_device_clear_storage_async_pending(dev_p); - return ret; - } - - cy_as_ll_request_response__set_word(req_p, - 0, create_address(bus, (uint8_t)device, (uint8_t)unit)); - cy_as_ll_request_response__set_word(req_p, - 1, (uint16_t)((block >> 16) & 0xffff)); - cy_as_ll_request_response__set_word(req_p, - 2, (uint16_t)(block & 0xffff)); - cy_as_ll_request_response__set_word(req_p, - 3, (uint16_t)((num_blocks >> 8) & 0x00ff)); - cy_as_ll_request_response__set_word(req_p, - 4, (uint16_t)((num_blocks << 8) & 0xff00)); - - /* Set the burst mode flag. */ - if (dev_p->is_storage_only_mode) - req_p->data[4] |= 0x0001; - - /* Send the request and wait for completion - * of storage request */ - dev_p->storage_wait = cy_true; - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_true, cy_as_async_storage_reply_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - cy_as_device_clear_storage_async_pending(dev_p); - } - - return ret; -} - -static void -cy_as_sync_storage_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, - uint32_t size, cy_as_return_status_t err) -{ - (void)ep; - (void)buf_p; - (void)size; - - dev_p->storage_error = err; -} - -static void -cy_as_sync_storage_reply_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - uint8_t reqtype; - (void)rqt; - - reqtype = cy_as_ll_request_response__get_code(rqt); - - if (cy_as_ll_request_response__get_code(resp) == - CY_RESP_ANTIOCH_DEFERRED_ERROR) { - ret = cy_as_ll_request_response__get_word(resp, 0) & 0x00FF; - - if (ret != CY_AS_ERROR_SUCCESS) { - if (reqtype == CY_RQT_READ_BLOCK) - cy_as_dma_cancel(dev_p, - dev_p->storage_read_endpoint, ret); - else - cy_as_dma_cancel(dev_p, - dev_p->storage_write_endpoint, ret); - } - } else if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - - dev_p->storage_wait = cy_false; - dev_p->storage_error = ret; - - /* Wake any threads/processes that are waiting on - * the read/write completion. */ - cy_as_hal_wake(&dev_p->context[context]->channel); -} - -static cy_as_return_status_t -cy_as_storage_sync_oper(cy_as_device *dev_p, - cy_as_end_point_number_t ep, uint8_t reqtype, - cy_as_bus_number_t bus, uint32_t device, - uint32_t unit, uint32_t block, void *data_p, - uint16_t num_blocks) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_context *ctxt_p; - uint32_t loopcount = 200; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (unit > 255) - return CY_AS_ERROR_NO_SUCH_UNIT; - - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) - return CY_AS_ERROR_ASYNC_PENDING; - - /* Also need to check for pending Async MTP writes */ - if (cy_as_device_is_usb_async_pending(dev_p, 6)) - return CY_AS_ERROR_ASYNC_PENDING; - - /* We are supposed to return success if the number of - * blocks is zero - */ - if (num_blocks == 0) - return CY_AS_ERROR_SUCCESS; - - if (dev_p->storage_device_info[bus][device].block_size == 0) { - /* - * normally, a given device has been queried via - * the query device call before a read request is issued. - * therefore, this normally will not be run. - */ - ret = cy_as_get_block_size(dev_p, bus, device, 0); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - /* Initialise the request to send to the West Bridge. */ - req_p = dev_p->storage_rw_req_p; - cy_as_ll_init_request(req_p, reqtype, - CY_RQT_STORAGE_RQT_CONTEXT, 5); - - /* Initialise the space for reply from - * the West Bridge. */ - reply_p = dev_p->storage_rw_resp_p; - cy_as_ll_init_response(reply_p, 5); - cy_as_device_clear_p2s_dma_start_recvd(dev_p); - - /* Setup the DMA request */ - if (reqtype == CY_RQT_READ_BLOCK) { - ret = cy_as_dma_queue_request(dev_p, ep, data_p, - dev_p->storage_device_info[bus][device].block_size * - num_blocks, cy_false, - cy_true, cy_as_sync_storage_callback); - dev_p->storage_oper = cy_as_op_read; - } else if (reqtype == CY_RQT_WRITE_BLOCK) { - ret = cy_as_dma_queue_request(dev_p, ep, data_p, - dev_p->storage_device_info[bus][device].block_size * - num_blocks, cy_false, cy_false, - cy_as_sync_storage_callback); - dev_p->storage_oper = cy_as_op_write; - } - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, (uint8_t)unit)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((block >> 16) & 0xffff)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(block & 0xffff)); - cy_as_ll_request_response__set_word(req_p, 3, - (uint16_t)((num_blocks >> 8) & 0x00ff)); - cy_as_ll_request_response__set_word(req_p, 4, - (uint16_t)((num_blocks << 8) & 0xff00)); - - /* Set the burst mode flag. */ - if (dev_p->is_storage_only_mode) - req_p->data[4] |= 0x0001; - - /* Send the request and wait for - * completion of storage request */ - dev_p->storage_wait = cy_true; - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, cy_true, - cy_as_sync_storage_reply_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - } else { - /* Setup the DMA request */ - ctxt_p = dev_p->context[CY_RQT_STORAGE_RQT_CONTEXT]; - ret = cy_as_dma_drain_queue(dev_p, ep, cy_false); - - while (loopcount-- > 0) { - if (dev_p->storage_wait == cy_false) - break; - cy_as_hal_sleep_on(&ctxt_p->channel, 10); - } - - if (dev_p->storage_wait == cy_true) { - dev_p->storage_wait = cy_false; - cy_as_ll_remove_request(dev_p, ctxt_p, req_p, cy_true); - ret = CY_AS_ERROR_TIMEOUT; - } - - if (ret == CY_AS_ERROR_SUCCESS) - ret = dev_p->storage_error; - } - - return ret; -} - -cy_as_return_status_t -cy_as_storage_read(cy_as_device_handle handle, - cy_as_bus_number_t bus, uint32_t device, - uint32_t unit, uint32_t block, - void *data_p, uint16_t num_blocks) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - return cy_as_storage_sync_oper(dev_p, dev_p->storage_read_endpoint, - CY_RQT_READ_BLOCK, bus, device, - unit, block, data_p, num_blocks); -} -EXPORT_SYMBOL(cy_as_storage_read); - -cy_as_return_status_t -cy_as_storage_write(cy_as_device_handle handle, - cy_as_bus_number_t bus, uint32_t device, - uint32_t unit, uint32_t block, void *data_p, - uint16_t num_blocks) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (dev_p->mtp_turbo_active) - return CY_AS_ERROR_NOT_VALID_DURING_MTP; - - return cy_as_storage_sync_oper(dev_p, - dev_p->storage_write_endpoint, - CY_RQT_WRITE_BLOCK, bus, device, - unit, block, data_p, num_blocks); -} -EXPORT_SYMBOL(cy_as_storage_write); - -cy_as_return_status_t -cy_as_storage_read_async(cy_as_device_handle handle, - cy_as_bus_number_t bus, uint32_t device, uint32_t unit, - uint32_t block, void *data_p, uint16_t num_blocks, - cy_as_storage_callback callback) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (callback == 0) - return CY_AS_ERROR_NULL_CALLBACK; - - return cy_as_storage_async_oper(dev_p, - dev_p->storage_read_endpoint, CY_RQT_READ_BLOCK, - CY_AS_REQUEST_RESPONSE_MS, bus, device, unit, - block, data_p, num_blocks, NULL, callback); -} -EXPORT_SYMBOL(cy_as_storage_read_async); - -cy_as_return_status_t -cy_as_storage_write_async(cy_as_device_handle handle, - cy_as_bus_number_t bus, uint32_t device, uint32_t unit, - uint32_t block, void *data_p, uint16_t num_blocks, - cy_as_storage_callback callback) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (callback == 0) - return CY_AS_ERROR_NULL_CALLBACK; - - if (dev_p->mtp_turbo_active) - return CY_AS_ERROR_NOT_VALID_DURING_MTP; - - return cy_as_storage_async_oper(dev_p, - dev_p->storage_write_endpoint, CY_RQT_WRITE_BLOCK, - CY_AS_REQUEST_RESPONSE_MS, bus, device, unit, block, - data_p, num_blocks, NULL, callback); -} -EXPORT_SYMBOL(cy_as_storage_write_async); - -static void -my_storage_cancel_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - (void)context; - (void)stat; - - /* Nothing to do here, except free up the - * request and response structures. */ - cy_as_ll_destroy_response(dev_p, resp); - cy_as_ll_destroy_request(dev_p, rqt); -} - - -cy_as_return_status_t -cy_as_storage_cancel_async(cy_as_device_handle handle) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!cy_as_device_is_storage_async_pending(dev_p)) - return CY_AS_ERROR_ASYNC_NOT_PENDING; - - /* - * create and send a mailbox request to firmware - * asking it to abort processing of the current - * P2S operation. the rest of the cancel processing will be - * driven through the callbacks for the read/write call. - */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_ABORT_P2S_XFER, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - ret = cy_as_ll_send_request(dev_p, req_p, - reply_p, cy_false, my_storage_cancel_callback); - if (ret) { - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_storage_cancel_async); - -/* - * This function does all the API side clean-up associated with - * CyAsStorageStop, without any communication with the firmware. - */ -void cy_as_storage_cleanup(cy_as_device *dev_p) -{ - if (dev_p->storage_count) { - cy_as_ll_destroy_request(dev_p, dev_p->storage_rw_req_p); - cy_as_ll_destroy_response(dev_p, dev_p->storage_rw_resp_p); - dev_p->storage_count = 0; - cy_as_device_clear_scsi_messages(dev_p); - cy_as_hal_mem_set(dev_p->storage_device_info, - 0, sizeof(dev_p->storage_device_info)); - - cy_as_device_clear_storage_async_pending(dev_p); - dev_p->storage_cb = 0; - dev_p->storage_cb_ms = 0; - dev_p->storage_wait = cy_false; - } -} - -static cy_as_return_status_t -my_handle_response_sd_reg_read( - cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_storage_sd_reg_read_data *info) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t resp_type, i; - uint16_t resp_len; - uint8_t length = info->length; - uint8_t *data_p = info->buf_p; - - resp_type = cy_as_ll_request_response__get_code(reply_p); - if (resp_type == CY_RESP_SD_REGISTER_DATA) { - uint16_t *resp_p = reply_p->data + 1; - uint16_t temp; - - resp_len = cy_as_ll_request_response__get_word(reply_p, 0); - cy_as_hal_assert(resp_len >= length); - - /* - * copy the values into the output buffer after doing the - * necessary bit shifting. the bit shifting is required because - * the data comes out of the west bridge with a 6 bit offset. - */ - i = 0; - while (length) { - temp = ((resp_p[i] << 6) | (resp_p[i + 1] >> 10)); - i++; - - *data_p++ = (uint8_t)(temp >> 8); - length--; - - if (length) { - *data_p++ = (uint8_t)(temp & 0xFF); - length--; - } - } - } else { - if (resp_type == CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - - cy_as_ll_destroy_response(dev_p, reply_p); - cy_as_ll_destroy_request(dev_p, req_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_sd_register_read( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint8_t device, - cy_as_sd_card_reg_type reg_type, - cy_as_storage_sd_reg_read_data *data_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t length; - - /* - * sanity checks required before sending the request to the - * firmware. - */ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (reg_type > cy_as_sd_reg_CSD) - return CY_AS_ERROR_INVALID_PARAMETER; - - /* If SD/MMC media is not supported on the - * addressed bus, return error. */ - if ((dev_p->media_supported[bus] & (1 << cy_as_media_sd_flash)) == 0) - return CY_AS_ERROR_INVALID_PARAMETER; - - /* - * find the amount of data to be returned. this will be the minimum of - * the actual data length, and the length requested. - */ - switch (reg_type) { - case cy_as_sd_reg_OCR: - length = CY_AS_SD_REG_OCR_LENGTH; - break; - case cy_as_sd_reg_CID: - length = CY_AS_SD_REG_CID_LENGTH; - break; - case cy_as_sd_reg_CSD: - length = CY_AS_SD_REG_CSD_LENGTH; - break; - - default: - length = 0; - cy_as_hal_assert(0); - } - - if (length < data_p->length) - data_p->length = length; - length = data_p->length; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SD_REGISTER_READ, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (create_address(bus, device, 0) | (uint16_t)reg_type)); - - reply_p = cy_as_ll_create_response(dev_p, - CY_AS_SD_REG_MAX_RESP_LENGTH); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_sd_reg_read(dev_p, - req_p, reply_p, data_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_SDREGISTERREAD, data_p, - dev_p->func_cbs_stor, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * MiscFuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_sd_register_read); - -cy_as_return_status_t -cy_as_storage_create_p_partition( - /* Handle to the device of interest */ - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - /* of P-port only partition in blocks */ - uint32_t size, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Partitions cannot be created or deleted while - * the USB stack is active. */ - if (dev_p->usb_count) - return CY_AS_ERROR_USB_RUNNING; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_PARTITION_STORAGE, - CY_RQT_STORAGE_RQT_CONTEXT, 3); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, 0x00)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((size >> 16) & 0xffff)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(size & 0xffff)); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_no_data(dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_PARTITION, 0, dev_p->func_cbs_stor, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * FuncCallback */ - return ret; - - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_create_p_partition); - -cy_as_return_status_t -cy_as_storage_remove_p_partition( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Partitions cannot be created or deleted while - * the USB stack is active. */ - if (dev_p->usb_count) - return CY_AS_ERROR_USB_RUNNING; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_PARTITION_ERASE, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_request_response__set_word(req_p, - 0, create_address(bus, (uint8_t)device, 0x00)); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_no_data(dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_NODATA, 0, dev_p->func_cbs_stor, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the FuncCallback */ - return ret; - - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_remove_p_partition); - -static cy_as_return_status_t -my_handle_response_get_transfer_amount(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_m_s_c_progress_data *data) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code = cy_as_ll_request_response__get_code(reply_p); - uint16_t v1, v2; - - if (code != CY_RESP_TRANSFER_COUNT) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - v1 = cy_as_ll_request_response__get_word(reply_p, 0); - v2 = cy_as_ll_request_response__get_word(reply_p, 1); - data->wr_count = (uint32_t)((v1 << 16) | v2); - - v1 = cy_as_ll_request_response__get_word(reply_p, 2); - v2 = cy_as_ll_request_response__get_word(reply_p, 3); - data->rd_count = (uint32_t)((v1 << 16) | v2); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_storage_get_transfer_amount( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_m_s_c_progress_data *data_p, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Check if the firmware image supports this feature. */ - if ((dev_p->media_supported[0]) && (dev_p->media_supported[0] - == (1 << cy_as_media_nand))) - return CY_AS_ERROR_NOT_SUPPORTED; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_GET_TRANSFER_AMOUNT, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply data - * will not exceed four words. */ - reply_p = cy_as_ll_create_response(dev_p, 4); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, 0x00)); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_get_transfer_amount(dev_p, - req_p, reply_p, data_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_GETTRANSFERAMOUNT, (void *)data_p, - dev_p->func_cbs_stor, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed as part of the - * FuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; - -} -EXPORT_SYMBOL(cy_as_storage_get_transfer_amount); - -cy_as_return_status_t -cy_as_storage_erase( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint32_t erase_unit, - uint16_t num_erase_units, - cy_as_function_callback cb, - uint32_t client - ) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_storage_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (dev_p->storage_device_info[bus][device].block_size == 0) - return CY_AS_ERROR_QUERY_DEVICE_NEEDED; - - /* If SD is not supported on the specified bus, then return ERROR */ - if (dev_p->storage_device_info[bus][device].type != - cy_as_media_sd_flash) - return CY_AS_ERROR_NOT_SUPPORTED; - - if (num_erase_units == 0) - return CY_AS_ERROR_SUCCESS; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_ERASE, - CY_RQT_STORAGE_RQT_CONTEXT, 5); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply - * data will not exceed four words. */ - reply_p = cy_as_ll_create_response(dev_p, 4); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, 0x00)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((erase_unit >> 16) & 0xffff)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(erase_unit & 0xffff)); - cy_as_ll_request_response__set_word(req_p, 3, - (uint16_t)((num_erase_units >> 8) & 0x00ff)); - cy_as_ll_request_response__set_word(req_p, 4, - (uint16_t)((num_erase_units << 8) & 0xff00)); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = my_handle_response_no_data(dev_p, req_p, reply_p); - - /* If error = "invalid response", this (very likely) means - * that we are not using the SD-only firmware module which - * is the only one supporting storage_erase. in this case - * force a "non supported" error code */ - if (ret == CY_AS_ERROR_INVALID_RESPONSE) - ret = CY_AS_ERROR_NOT_SUPPORTED; - - return ret; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_STOR_ERASE, 0, dev_p->func_cbs_stor, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_storage_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* The request and response are freed - * as part of the FuncCallback */ - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_storage_erase); - -static void -cy_as_storage_func_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - cy_as_func_c_b_node *node = (cy_as_func_c_b_node *) - dev_p->func_cbs_stor->head_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_bool ex_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_EX) - == CY_AS_REQUEST_RESPONSE_EX; - cy_bool ms_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_MS) - == CY_AS_REQUEST_RESPONSE_MS; - uint8_t code; - uint8_t cntxt; - - cy_as_hal_assert(ex_request || ms_request); - cy_as_hal_assert(dev_p->func_cbs_stor->count != 0); - cy_as_hal_assert(dev_p->func_cbs_stor->type == CYAS_FUNC_CB); - (void) ex_request; - (void) ms_request; - - (void)context; - - cntxt = cy_as_ll_request_response__get_context(rqt); - cy_as_hal_assert(cntxt == CY_RQT_STORAGE_RQT_CONTEXT); - - code = cy_as_ll_request_response__get_code(rqt); - switch (code) { - case CY_RQT_START_STORAGE: - ret = my_handle_response_storage_start(dev_p, rqt, resp, stat); - break; - case CY_RQT_STOP_STORAGE: - ret = my_handle_response_storage_stop(dev_p, rqt, resp, stat); - break; - case CY_RQT_CLAIM_STORAGE: - ret = my_handle_response_storage_claim(dev_p, rqt, resp); - break; - case CY_RQT_RELEASE_STORAGE: - ret = my_handle_response_storage_release(dev_p, rqt, resp); - break; - case CY_RQT_QUERY_MEDIA: - cy_as_hal_assert(cy_false);/* Not used any more. */ - break; - case CY_RQT_QUERY_BUS: - cy_as_hal_assert(node->data != 0); - ret = my_handle_response_storage_query_bus(dev_p, - rqt, resp, (uint32_t *)node->data); - break; - case CY_RQT_QUERY_DEVICE: - cy_as_hal_assert(node->data != 0); - ret = my_handle_response_storage_query_device(dev_p, - rqt, resp, node->data); - break; - case CY_RQT_QUERY_UNIT: - cy_as_hal_assert(node->data != 0); - ret = my_handle_response_storage_query_unit(dev_p, - rqt, resp, node->data); - break; - case CY_RQT_SD_INTERFACE_CONTROL: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_SD_REGISTER_READ: - cy_as_hal_assert(node->data != 0); - ret = my_handle_response_sd_reg_read(dev_p, rqt, resp, - (cy_as_storage_sd_reg_read_data *)node->data); - break; - case CY_RQT_PARTITION_STORAGE: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_PARTITION_ERASE: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_GET_TRANSFER_AMOUNT: - cy_as_hal_assert(node->data != 0); - ret = my_handle_response_get_transfer_amount(dev_p, - rqt, resp, (cy_as_m_s_c_progress_data *)node->data); - break; - case CY_RQT_ERASE: - ret = my_handle_response_no_data(dev_p, rqt, resp); - - /* If error = "invalid response", this (very likely) - * means that we are not using the SD-only firmware - * module which is the only one supporting storage_erase. - * in this case force a "non supported" error code */ - if (ret == CY_AS_ERROR_INVALID_RESPONSE) - ret = CY_AS_ERROR_NOT_SUPPORTED; - - break; - - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - - /* - * if the low level layer returns a direct error, use the - * corresponding error code. if not, use the error code - * based on the response from firmware. - */ - if (stat == CY_AS_ERROR_SUCCESS) - stat = ret; - - /* Call the user callback, if there is one */ - if (node->cb_p) - node->cb_p((cy_as_device_handle)dev_p, stat, - node->client_data, node->data_type, node->data); - cy_as_remove_c_b_node(dev_p->func_cbs_stor); -} - - -static void -cy_as_sdio_sync_reply_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - (void)rqt; - - if ((cy_as_ll_request_response__get_code(resp) == - CY_RESP_SDIO_GET_TUPLE) || - (cy_as_ll_request_response__get_code(resp) == - CY_RESP_SDIO_EXT)) { - ret = cy_as_ll_request_response__get_word(resp, 0); - if ((ret & 0x00FF) != CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(rqt) == - CY_RQT_SDIO_READ_EXTENDED) - cy_as_dma_cancel(dev_p, - dev_p->storage_read_endpoint, ret); - else - cy_as_dma_cancel(dev_p, - dev_p->storage_write_endpoint, ret); - } - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - - dev_p->storage_rw_resp_p = resp; - dev_p->storage_wait = cy_false; - if (((ret & 0x00FF) == CY_AS_ERROR_IO_ABORTED) || ((ret & 0x00FF) - == CY_AS_ERROR_IO_SUSPENDED)) - dev_p->storage_error = (ret & 0x00FF); - else - dev_p->storage_error = (ret & 0x00FF) ? - CY_AS_ERROR_INVALID_RESPONSE : CY_AS_ERROR_SUCCESS; - - /* Wake any threads/processes that are waiting on - * the read/write completion. */ - cy_as_hal_wake(&dev_p->context[context]->channel); -} - -cy_as_return_status_t -cy_as_sdio_device_check( - cy_as_device *dev_p, - cy_as_bus_number_t bus, - uint32_t device) -{ - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (bus < 0 || bus >= CY_AS_MAX_BUSES) - return CY_AS_ERROR_NO_SUCH_BUS; - - if (device >= CY_AS_MAX_STORAGE_DEVICES) - return CY_AS_ERROR_NO_SUCH_DEVICE; - - if (!cy_as_device_is_astoria_dev(dev_p)) - return CY_AS_ERROR_NOT_SUPPORTED; - - return (is_storage_active(dev_p)); -} - -cy_as_return_status_t -cy_as_sdio_direct_io( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t is_write, - uint8_t *data_p) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t resp_data; - - /* - * sanity checks required before sending the request to the - * firmware. - */ - cy_as_device *dev_p = (cy_as_device *)handle; - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - - if (!(cy_as_sdio_check_function_initialized(handle, - bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (cy_as_sdio_check_function_suspended(handle, bus, n_function_no)) - return CY_AS_ERROR_FUNCTION_SUSPENDED; - - req_p = cy_as_ll_create_request(dev_p, (is_write == cy_true) ? - CY_RQT_SDIO_WRITE_DIRECT : CY_RQT_SDIO_READ_DIRECT, - CY_RQT_STORAGE_RQT_CONTEXT, 3); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /*Setting up request*/ - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - /* D1 */ - if (is_write == cy_true) { - cy_as_ll_request_response__set_word(req_p, 1, - ((argument<<8) | 0x0080 | (n_function_no<<4) | - ((misc_buf&CY_SDIO_RAW)<<3) | - ((misc_buf&CY_SDIO_REARM_INT)>>5) | - (uint16_t)(address>>15))); - } else { - cy_as_ll_request_response__set_word(req_p, 1, - (n_function_no<<4) | ((misc_buf&CY_SDIO_REARM_INT)>>5) | - (uint16_t)(address>>15)); - } - /* D2 */ - cy_as_ll_request_response__set_word(req_p, 2, - ((uint16_t)((address&0x00007fff)<<1))); - - /*Create response*/ - reply_p = cy_as_ll_create_response(dev_p, 2); - - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /*Sending the request*/ - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /*Check reply type*/ - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SDIO_DIRECT) { - resp_data = cy_as_ll_request_response__get_word(reply_p, 0); - if (resp_data >> 8) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else if (data_p != 0) - *(uint8_t *)(data_p) = (uint8_t)(resp_data&0x00ff); - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - -destroy: - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} - - -cy_as_return_status_t -cy_as_sdio_direct_read( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint8_t *data_p) -{ - return cy_as_sdio_direct_io(handle, bus, device, n_function_no, - address, misc_buf, 0x00, cy_false, data_p); -} -EXPORT_SYMBOL(cy_as_sdio_direct_read); - -cy_as_return_status_t -cy_as_sdio_direct_write( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t *data_p) -{ - return cy_as_sdio_direct_io(handle, bus, device, n_function_no, - address, misc_buf, argument, cy_true, data_p); -} -EXPORT_SYMBOL(cy_as_sdio_direct_write); - -/*Cmd53 IO*/ -cy_as_return_status_t -cy_as_sdio_extended_i_o( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t is_write, - uint8_t *data_p , - uint8_t is_resume) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t resp_type; - uint8_t reqtype; - uint16_t resp_data; - cy_as_context *ctxt_p; - uint32_t dmasize, loopcount = 200; - cy_as_end_point_number_t ep; - - cy_as_device *dev_p = (cy_as_device *)handle; - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, - bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (cy_as_sdio_check_function_suspended(handle, bus, n_function_no)) - return CY_AS_ERROR_FUNCTION_SUSPENDED; - - - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) - return CY_AS_ERROR_ASYNC_PENDING; - - /* Request for 0 bytes of blocks is returned as a success*/ - if (argument == 0) - return CY_AS_ERROR_SUCCESS; - - /* Initialise the request to send to the West Bridge device. */ - if (is_write == cy_true) { - reqtype = CY_RQT_SDIO_WRITE_EXTENDED; - ep = dev_p->storage_write_endpoint; - } else { - reqtype = CY_RQT_SDIO_READ_EXTENDED; - ep = dev_p->storage_read_endpoint; - } - - req_p = dev_p->storage_rw_req_p; - cy_as_ll_init_request(req_p, reqtype, CY_RQT_STORAGE_RQT_CONTEXT, 3); - - /* Initialise the space for reply from the Antioch. */ - reply_p = dev_p->storage_rw_resp_p; - cy_as_ll_init_response(reply_p, 2); - - /* Setup the DMA request */ - if (!(misc_buf&CY_SDIO_BLOCKMODE)) { - if (argument > - dev_p->sdiocard[bus]. - function[n_function_no-1].blocksize) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - - } else { - if (argument > 511) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - } - - if (argument == 512) - argument = 0; - - dmasize = ((misc_buf&CY_SDIO_BLOCKMODE) != 0) ? - dev_p->sdiocard[bus].function[n_function_no-1].blocksize - * argument : argument; - - ret = cy_as_dma_queue_request(dev_p, ep, (void *)(data_p), - dmasize, cy_false, (is_write & cy_true) ? cy_false : - cy_true, cy_as_sync_storage_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, - n_function_no | ((is_resume) ? 0x80 : 0x00))); - cy_as_ll_request_response__set_word(req_p, 1, - ((uint16_t)n_function_no)<<12| - ((uint16_t)(misc_buf & (CY_SDIO_BLOCKMODE|CY_SDIO_OP_INCR))) - << 9 | (uint16_t)(address >> 7) | - ((is_write == cy_true) ? 0x8000 : 0x0000)); - cy_as_ll_request_response__set_word(req_p, 2, - ((uint16_t)(address&0x0000ffff) << 9) | argument); - - - /* Send the request and wait for completion of storage request */ - dev_p->storage_wait = cy_true; - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_true, cy_as_sdio_sync_reply_callback); - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - } else { - /* Setup the DMA request */ - ctxt_p = dev_p->context[CY_RQT_STORAGE_RQT_CONTEXT]; - ret = cy_as_dma_drain_queue(dev_p, ep, cy_true); - - while (loopcount-- > 0) { - if (dev_p->storage_wait == cy_false) - break; - cy_as_hal_sleep_on(&ctxt_p->channel, 10); - } - if (dev_p->storage_wait == cy_true) { - dev_p->storage_wait = cy_false; - cy_as_ll_remove_request(dev_p, ctxt_p, req_p, cy_true); - dev_p->storage_error = CY_AS_ERROR_TIMEOUT; - } - - ret = dev_p->storage_error; - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - resp_type = cy_as_ll_request_response__get_code( - dev_p->storage_rw_resp_p); - if (resp_type == CY_RESP_SDIO_EXT) { - resp_data = cy_as_ll_request_response__get_word - (reply_p, 0)&0x00ff; - if (resp_data) - ret = CY_AS_ERROR_INVALID_REQUEST; - - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - } - return ret; - -} - -static void -cy_as_sdio_async_reply_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - cy_as_storage_callback cb_ms; - uint8_t reqtype; - uint32_t pendingblocks; - (void)rqt; - (void)context; - - pendingblocks = 0; - reqtype = cy_as_ll_request_response__get_code(rqt); - if (ret == CY_AS_ERROR_SUCCESS) { - if ((cy_as_ll_request_response__get_code(resp) == - CY_RESP_SUCCESS_FAILURE) || - (cy_as_ll_request_response__get_code(resp) == - CY_RESP_SDIO_EXT)) { - ret = cy_as_ll_request_response__get_word(resp, 0); - ret &= 0x00FF; - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - } - - if (ret != CY_AS_ERROR_SUCCESS) { - if (reqtype == CY_RQT_SDIO_READ_EXTENDED) - cy_as_dma_cancel(dev_p, - dev_p->storage_read_endpoint, ret); - else - cy_as_dma_cancel(dev_p, - dev_p->storage_write_endpoint, ret); - - dev_p->storage_error = ret; - } - - dev_p->storage_wait = cy_false; - - /* - * if the DMA callback has already been called, - * the user callback has to be called from here. - */ - if (!cy_as_device_is_storage_async_pending(dev_p)) { - cy_as_hal_assert(dev_p->storage_cb_ms != NULL); - cb_ms = dev_p->storage_cb_ms; - - dev_p->storage_cb = 0; - dev_p->storage_cb_ms = 0; - - if ((ret == CY_AS_ERROR_SUCCESS) || - (ret == CY_AS_ERROR_IO_ABORTED) || - (ret == CY_AS_ERROR_IO_SUSPENDED)) { - ret = dev_p->storage_error; - pendingblocks = ((uint32_t) - cy_as_ll_request_response__get_word - (resp, 1)) << 16; - } else - ret = CY_AS_ERROR_INVALID_RESPONSE; - - cb_ms((cy_as_device_handle)dev_p, dev_p->storage_bus_index, - dev_p->storage_device_index, - (dev_p->storage_unit | pendingblocks), - dev_p->storage_block_addr, dev_p->storage_oper, ret); - } else - dev_p->storage_error = ret; -} - - -cy_as_return_status_t -cy_as_sdio_extended_i_o_async( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t is_write, - uint8_t *data_p, - cy_as_storage_callback callback) -{ - - uint32_t mask; - uint32_t dmasize; - cy_as_ll_request_response *req_p , *reply_p; - uint8_t reqtype; - cy_as_end_point_number_t ep; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, - bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (cy_as_sdio_check_function_suspended(handle, bus, n_function_no)) - return CY_AS_ERROR_FUNCTION_SUSPENDED; - - if (callback == 0) - return CY_AS_ERROR_NULL_CALLBACK; - - /* We are supposed to return success if the number of - * blocks is zero - */ - if (((misc_buf&CY_SDIO_BLOCKMODE) != 0) && (argument == 0)) { - callback(handle, bus, device, n_function_no, address, - ((is_write) ? cy_as_op_write : cy_as_op_read), - CY_AS_ERROR_SUCCESS); - return CY_AS_ERROR_SUCCESS; - } - - - /* - * since async operations can be triggered by interrupt - * code, we must insure that we do not get multiple async - * operations going at one time and protect this test and - * set operation from interrupts. - */ - mask = cy_as_hal_disable_interrupts(); - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_ASYNC_PENDING; - } - cy_as_device_set_storage_async_pending(dev_p); - cy_as_hal_enable_interrupts(mask); - - - /* - * storage information about the currently - * outstanding request - */ - dev_p->storage_cb_ms = callback; - dev_p->storage_bus_index = bus; - dev_p->storage_device_index = device; - dev_p->storage_unit = n_function_no; - dev_p->storage_block_addr = address; - - if (is_write == cy_true) { - reqtype = CY_RQT_SDIO_WRITE_EXTENDED; - ep = dev_p->storage_write_endpoint; - } else { - reqtype = CY_RQT_SDIO_READ_EXTENDED; - ep = dev_p->storage_read_endpoint; - } - - /* Initialise the request to send to the West Bridge. */ - req_p = dev_p->storage_rw_req_p; - cy_as_ll_init_request(req_p, reqtype, - CY_RQT_STORAGE_RQT_CONTEXT, 3); - - /* Initialise the space for reply from the West Bridge. */ - reply_p = dev_p->storage_rw_resp_p; - cy_as_ll_init_response(reply_p, 2); - - if (!(misc_buf&CY_SDIO_BLOCKMODE)) { - if (argument > - dev_p->sdiocard[bus].function[n_function_no-1].blocksize) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - - } else { - if (argument > 511) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - } - - if (argument == 512) - argument = 0; - dmasize = ((misc_buf&CY_SDIO_BLOCKMODE) != 0) ? - dev_p->sdiocard[bus].function[n_function_no-1].blocksize * - argument : argument; - - /* Setup the DMA request and adjust the storage - * operation if we are reading */ - if (reqtype == CY_RQT_SDIO_READ_EXTENDED) { - ret = cy_as_dma_queue_request(dev_p, ep, - (void *)data_p, dmasize , cy_false, cy_true, - cy_as_async_storage_callback); - dev_p->storage_oper = cy_as_op_read; - } else if (reqtype == CY_RQT_SDIO_WRITE_EXTENDED) { - ret = cy_as_dma_queue_request(dev_p, ep, (void *)data_p, - dmasize, cy_false, cy_false, cy_as_async_storage_callback); - dev_p->storage_oper = cy_as_op_write; - } - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_device_clear_storage_async_pending(dev_p); - return ret; - } - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - cy_as_ll_request_response__set_word(req_p, 1, - ((uint16_t)n_function_no) << 12 | - ((uint16_t)(misc_buf & (CY_SDIO_BLOCKMODE | CY_SDIO_OP_INCR))) - << 9 | (uint16_t)(address>>7) | - ((is_write == cy_true) ? 0x8000 : 0x0000)); - cy_as_ll_request_response__set_word(req_p, 2, - ((uint16_t)(address&0x0000ffff) << 9) | argument); - - - /* Send the request and wait for completion of storage request */ - dev_p->storage_wait = cy_true; - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, cy_true, - cy_as_sdio_async_reply_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - cy_as_device_clear_storage_async_pending(dev_p); - } else { - cy_as_dma_kick_start(dev_p, ep); - } - - return ret; -} - -/* CMD53 Extended Read*/ -cy_as_return_status_t -cy_as_sdio_extended_read( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t *data_p, - cy_as_sdio_callback callback) -{ - if (callback == 0) - return cy_as_sdio_extended_i_o(handle, bus, device, - n_function_no, address, misc_buf, argument, - cy_false, data_p, 0); - - return cy_as_sdio_extended_i_o_async(handle, bus, device, - n_function_no, address, misc_buf, argument, cy_false, - data_p, callback); -} -EXPORT_SYMBOL(cy_as_sdio_extended_read); - -/* CMD53 Extended Write*/ -cy_as_return_status_t -cy_as_sdio_extended_write( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint32_t address, - uint8_t misc_buf, - uint16_t argument, - uint8_t *data_p, - cy_as_sdio_callback callback) -{ - if (callback == 0) - return cy_as_sdio_extended_i_o(handle, bus, device, - n_function_no, address, misc_buf, argument, cy_true, - data_p, 0); - - return cy_as_sdio_extended_i_o_async(handle, bus, device, - n_function_no, address, misc_buf, argument, cy_true, - data_p, callback); -} -EXPORT_SYMBOL(cy_as_sdio_extended_write); - -/* Read the CIS info tuples for the given function and Tuple ID*/ -cy_as_return_status_t -cy_as_sdio_get_c_i_s_info( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint16_t tuple_id, - uint8_t *data_p) -{ - - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t resp_data; - cy_as_context *ctxt_p; - uint32_t loopcount = 200; - - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, bus, 0))) - return CY_AS_ERROR_INVALID_FUNCTION; - - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) - return CY_AS_ERROR_ASYNC_PENDING; - - - /* Initialise the request to send to the Antioch. */ - req_p = dev_p->storage_rw_req_p; - cy_as_ll_init_request(req_p, CY_RQT_SDIO_GET_TUPLE, - CY_RQT_STORAGE_RQT_CONTEXT, 2); - - /* Initialise the space for reply from the Antioch. */ - reply_p = dev_p->storage_rw_resp_p; - cy_as_ll_init_response(reply_p, 3); - - /* Setup the DMA request */ - ret = cy_as_dma_queue_request(dev_p, dev_p->storage_read_endpoint, - data_p+1, 255, cy_false, cy_true, cy_as_sync_storage_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - - /* Set tuple id to fetch. */ - cy_as_ll_request_response__set_word(req_p, 1, tuple_id<<8); - - /* Send the request and wait for completion of storage request */ - dev_p->storage_wait = cy_true; - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, cy_true, - cy_as_sdio_sync_reply_callback); - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, - dev_p->storage_read_endpoint, CY_AS_ERROR_CANCELED); - } else { - /* Setup the DMA request */ - ctxt_p = dev_p->context[CY_RQT_STORAGE_RQT_CONTEXT]; - ret = cy_as_dma_drain_queue(dev_p, - dev_p->storage_read_endpoint, cy_true); - - while (loopcount-- > 0) { - if (dev_p->storage_wait == cy_false) - break; - cy_as_hal_sleep_on(&ctxt_p->channel, 10); - } - - if (dev_p->storage_wait == cy_true) { - dev_p->storage_wait = cy_false; - cy_as_ll_remove_request(dev_p, ctxt_p, req_p, cy_true); - return CY_AS_ERROR_TIMEOUT; - } - ret = dev_p->storage_error; - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_ll_request_response__get_code - (dev_p->storage_rw_resp_p) == CY_RESP_SDIO_GET_TUPLE) { - resp_data = cy_as_ll_request_response__get_word - (reply_p, 0); - if (resp_data) { - ret = CY_AS_ERROR_INVALID_REQUEST; - } else if (data_p != 0) - *(uint8_t *)data_p = (uint8_t) - (cy_as_ll_request_response__get_word - (reply_p, 0)&0x00ff); - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - } - return ret; -} - -/*Query Device*/ -cy_as_return_status_t -cy_as_sdio_query_card( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_sdio_card *data_p) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - uint8_t resp_type; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* Allocating memory to the SDIO device structure in dev_p */ - - cy_as_hal_mem_set(&dev_p->sdiocard[bus], 0, sizeof(cy_as_sdio_device)); - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SDIO_QUERY_CARD, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, 0)); - - reply_p = cy_as_ll_create_response(dev_p, 5); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - resp_type = cy_as_ll_request_response__get_code(reply_p); - if (resp_type == CY_RESP_SDIO_QUERY_CARD) { - dev_p->sdiocard[bus].card.num_functions = - (uint8_t)((reply_p->data[0]&0xff00)>>8); - dev_p->sdiocard[bus].card.memory_present = - (uint8_t)reply_p->data[0]&0x0001; - dev_p->sdiocard[bus].card.manufacturer__id = - reply_p->data[1]; - dev_p->sdiocard[bus].card.manufacturer_info = - reply_p->data[2]; - dev_p->sdiocard[bus].card.blocksize = - reply_p->data[3]; - dev_p->sdiocard[bus].card.maxblocksize = - reply_p->data[3]; - dev_p->sdiocard[bus].card.card_capability = - (uint8_t)((reply_p->data[4]&0xff00)>>8); - dev_p->sdiocard[bus].card.sdio_version = - (uint8_t)(reply_p->data[4]&0x00ff); - dev_p->sdiocard[bus].function_init_map = 0x01; - data_p->num_functions = - dev_p->sdiocard[bus].card.num_functions; - data_p->memory_present = - dev_p->sdiocard[bus].card.memory_present; - data_p->manufacturer__id = - dev_p->sdiocard[bus].card.manufacturer__id; - data_p->manufacturer_info = - dev_p->sdiocard[bus].card.manufacturer_info; - data_p->blocksize = dev_p->sdiocard[bus].card.blocksize; - data_p->maxblocksize = - dev_p->sdiocard[bus].card.maxblocksize; - data_p->card_capability = - dev_p->sdiocard[bus].card.card_capability; - data_p->sdio_version = - dev_p->sdiocard[bus].card.sdio_version; - } else { - if (resp_type == CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - } -destroy: - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} -EXPORT_SYMBOL(cy_as_sdio_query_card); - -/*Reset SDIO card. */ -cy_as_return_status_t -cy_as_sdio_reset_card( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device) -{ - - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t resp_type; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (dev_p->sdiocard != 0) { - dev_p->sdiocard[bus].function_init_map = 0; - dev_p->sdiocard[bus].function_suspended_map = 0; - } - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SDIO_RESET_DEV, - CY_RQT_STORAGE_RQT_CONTEXT, 1); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /*Setup mailbox */ - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, 0)); - - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - resp_type = cy_as_ll_request_response__get_code(reply_p); - - if (resp_type == CY_RESP_SUCCESS_FAILURE) { - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret == CY_AS_ERROR_SUCCESS) - ret = cy_as_sdio_query_card(handle, bus, device, 0); - } else - ret = CY_AS_ERROR_INVALID_RESPONSE; - -destroy: - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} - -/* Initialise an IO function*/ -cy_as_return_status_t -cy_as_sdio_init_function( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint8_t misc_buf) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t resp_type; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized - (handle, bus, 0))) - return CY_AS_ERROR_NOT_RUNNING; - - if ((cy_as_sdio_check_function_initialized - (handle, bus, n_function_no))) { - if (misc_buf&CY_SDIO_FORCE_INIT) - dev_p->sdiocard[bus].function_init_map &= - (~(1 << n_function_no)); - else - return CY_AS_ERROR_ALREADY_RUNNING; - } - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SDIO_INIT_FUNCTION, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - - reply_p = cy_as_ll_create_response(dev_p, 5); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - resp_type = cy_as_ll_request_response__get_code(reply_p); - - if (resp_type == CY_RESP_SDIO_INIT_FUNCTION) { - dev_p->sdiocard[bus].function[n_function_no-1].function_code = - (uint8_t)((reply_p->data[0]&0xff00)>>8); - dev_p->sdiocard[bus].function[n_function_no-1]. - extended_func_code = (uint8_t)reply_p->data[0]&0x00ff; - dev_p->sdiocard[bus].function[n_function_no-1].blocksize = - reply_p->data[1]; - dev_p->sdiocard[bus].function[n_function_no-1]. - maxblocksize = reply_p->data[1]; - dev_p->sdiocard[bus].function[n_function_no-1].card_psn = - (uint32_t)(reply_p->data[2])<<16; - dev_p->sdiocard[bus].function[n_function_no-1].card_psn |= - (uint32_t)(reply_p->data[3]); - dev_p->sdiocard[bus].function[n_function_no-1].csa_bits = - (uint8_t)((reply_p->data[4]&0xff00)>>8); - dev_p->sdiocard[bus].function[n_function_no-1].wakeup_support = - (uint8_t)(reply_p->data[4]&0x0001); - dev_p->sdiocard[bus].function_init_map |= (1 << n_function_no); - cy_as_sdio_clear_function_suspended(handle, bus, n_function_no); - - } else { - if (resp_type == CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_FUNCTION; - } - -destroy: - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} -EXPORT_SYMBOL(cy_as_sdio_init_function); - -/*Query individual functions. */ -cy_as_return_status_t -cy_as_sdio_query_function( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - cy_as_sdio_func *data_p) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - cy_as_return_status_t ret; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, - bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - - data_p->blocksize = - dev_p->sdiocard[bus].function[n_function_no-1].blocksize; - data_p->card_psn = - dev_p->sdiocard[bus].function[n_function_no-1].card_psn; - data_p->csa_bits = - dev_p->sdiocard[bus].function[n_function_no-1].csa_bits; - data_p->extended_func_code = - dev_p->sdiocard[bus].function[n_function_no-1]. - extended_func_code; - data_p->function_code = - dev_p->sdiocard[bus].function[n_function_no-1].function_code; - data_p->maxblocksize = - dev_p->sdiocard[bus].function[n_function_no-1].maxblocksize; - data_p->wakeup_support = - dev_p->sdiocard[bus].function[n_function_no-1].wakeup_support; - - return CY_AS_ERROR_SUCCESS; -} - -/* Abort the Current Extended IO Operation*/ -cy_as_return_status_t -cy_as_sdio_abort_function( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t resp_type; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, - bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - - if ((cy_as_device_is_storage_async_pending(dev_p)) || - (dev_p->storage_wait)) { - if (!(cy_as_sdio_get_card_capability(handle, bus) & - CY_SDIO_SDC)) - return CY_AS_ERROR_INVALID_COMMAND; - } - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SDIO_ABORT_IO, - CY_RQT_GENERAL_RQT_CONTEXT, 1); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /*Setup mailbox */ - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - resp_type = cy_as_ll_request_response__get_code(reply_p); - - if (resp_type == CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - - -destroy: - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; -} - -/* Suspend IO to current function*/ -cy_as_return_status_t -cy_as_sdio_suspend( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized(handle, bus, - n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (!(cy_as_sdio_check_support_bus_suspend(handle, bus))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (!(cy_as_sdio_get_card_capability(handle, bus) & CY_SDIO_SDC)) - return CY_AS_ERROR_INVALID_FUNCTION; - if (cy_as_sdio_check_function_suspended(handle, bus, n_function_no)) - return CY_AS_ERROR_FUNCTION_SUSPENDED; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SDIO_SUSPEND, CY_RQT_GENERAL_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /*Setup mailbox */ - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - - if (ret == CY_AS_ERROR_SUCCESS) { - ret = cy_as_ll_request_response__get_code(reply_p); - cy_as_sdio_set_function_suspended(handle, bus, n_function_no); - } - - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/*Resume suspended function*/ -cy_as_return_status_t -cy_as_sdio_resume( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - cy_as_oper_type op, - uint8_t misc_buf, - uint16_t pendingblockcount, - uint8_t *data_p - ) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t resp_data, ret = CY_AS_ERROR_SUCCESS; - cy_as_device *dev_p = (cy_as_device *)handle; - - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized - (handle, bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - - /* If suspend resume is not supported return */ - if (!(cy_as_sdio_check_support_bus_suspend(handle, bus))) - return CY_AS_ERROR_INVALID_FUNCTION; - - /* if the function is not suspended return. */ - if (!(cy_as_sdio_check_function_suspended - (handle, bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SDIO_RESUME, CY_RQT_STORAGE_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /*Setup mailbox */ - cy_as_ll_request_response__set_word(req_p, 0, - create_address(bus, (uint8_t)device, n_function_no)); - - reply_p = cy_as_ll_create_response(dev_p, 2); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SDIO_RESUME) { - resp_data = cy_as_ll_request_response__get_word(reply_p, 0); - if (resp_data & 0x00ff) { - /* Send extended read request to resume the read. */ - if (op == cy_as_op_read) { - ret = cy_as_sdio_extended_i_o(handle, bus, - device, n_function_no, 0, misc_buf, - pendingblockcount, cy_false, data_p, 1); - } else { - ret = cy_as_sdio_extended_i_o(handle, bus, - device, n_function_no, 0, misc_buf, - pendingblockcount, cy_true, data_p, 1); - } - } else { - ret = CY_AS_ERROR_SUCCESS; - } - } else { - ret = CY_AS_ERROR_INVALID_RESPONSE; - } - -destroy: - cy_as_sdio_clear_function_suspended(handle, bus, n_function_no); - if (req_p != 0) - cy_as_ll_destroy_request(dev_p, req_p); - if (reply_p != 0) - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; - -} - -/*Set function blocksize. Size cannot exceed max - * block size for the function*/ -cy_as_return_status_t -cy_as_sdio_set_blocksize( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no, - uint16_t blocksize) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p = (cy_as_device *)handle; - ret = cy_as_sdio_device_check(dev_p, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized - (handle, bus, n_function_no))) - return CY_AS_ERROR_INVALID_FUNCTION; - if (n_function_no == 0) { - if (blocksize > cy_as_sdio_get_card_max_blocksize(handle, bus)) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - else if (blocksize == cy_as_sdio_get_card_blocksize - (handle, bus)) - return CY_AS_ERROR_SUCCESS; - } else { - if (blocksize > - cy_as_sdio_get_function_max_blocksize(handle, - bus, n_function_no)) - return CY_AS_ERROR_INVALID_BLOCKSIZE; - else if (blocksize == - cy_as_sdio_get_function_blocksize(handle, - bus, n_function_no)) - return CY_AS_ERROR_SUCCESS; - } - - ret = cy_as_sdio_direct_write(handle, bus, device, 0, - (uint16_t)(n_function_no << 8) | - 0x10, 0, blocksize & 0x00ff, 0); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - ret = cy_as_sdio_direct_write(handle, bus, device, 0, - (uint16_t)(n_function_no << 8) | - 0x11, 0, (blocksize & 0xff00) >> 8, 0); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (n_function_no == 0) - cy_as_sdio_set_card_block_size(handle, bus, blocksize); - else - cy_as_sdio_set_function_block_size(handle, - bus, n_function_no, blocksize); - return ret; -} -EXPORT_SYMBOL(cy_as_sdio_set_blocksize); - -/* Deinitialize an SDIO function*/ -cy_as_return_status_t -cy_as_sdio_de_init_function( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - uint8_t n_function_no) -{ - cy_as_return_status_t ret; - uint8_t temp; - - if (n_function_no == 0) - return CY_AS_ERROR_INVALID_FUNCTION; - - ret = cy_as_sdio_device_check((cy_as_device *)handle, bus, device); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (!(cy_as_sdio_check_function_initialized - (handle, bus, n_function_no))) - return CY_AS_ERROR_SUCCESS; - - temp = (uint8_t)(((cy_as_device *)handle)->sdiocard[bus]. - function_init_map & (~(1 << n_function_no))); - - cy_as_sdio_direct_write(handle, bus, device, 0, 0x02, 0, temp, 0); - - ((cy_as_device *)handle)->sdiocard[bus].function_init_map &= - (~(1 << n_function_no)); - - return CY_AS_ERROR_SUCCESS; -} - - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/api/src/cyasusb.c b/drivers/staging/westbridge/astoria/api/src/cyasusb.c deleted file mode 100644 index 1b55e61..0000000 --- a/drivers/staging/westbridge/astoria/api/src/cyasusb.c +++ /dev/null @@ -1,3740 +0,0 @@ -/* Cypress West Bridge API source file (cyasusb.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include "../../include/linux/westbridge/cyashal.h" -#include "../../include/linux/westbridge/cyasusb.h" -#include "../../include/linux/westbridge/cyaserr.h" -#include "../../include/linux/westbridge/cyasdma.h" -#include "../../include/linux/westbridge/cyaslowlevel.h" -#include "../../include/linux/westbridge/cyaslep2pep.h" -#include "../../include/linux/westbridge/cyasregs.h" -#include "../../include/linux/westbridge/cyasstorage.h" - -static cy_as_return_status_t -cy_as_usb_ack_setup_packet( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -static void -cy_as_usb_func_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret); -/* -* Reset the USB EP0 state -*/ -static void -cy_as_usb_reset_e_p0_state(cy_as_device *dev_p) -{ - cy_as_log_debug_message(6, "cy_as_usb_reset_e_p0_state called"); - - cy_as_device_clear_ack_delayed(dev_p); - cy_as_device_clear_setup_packet(dev_p); - if (cy_as_device_is_usb_async_pending(dev_p, 0)) - cy_as_usb_cancel_async((cy_as_device_handle)dev_p, 0); - - dev_p->usb_pending_buffer = 0; -} - -/* -* External function to map logical endpoints to physical endpoints -*/ -static cy_as_return_status_t -is_usb_active(cy_as_device *dev_p) -{ - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (dev_p->usb_count == 0) - return CY_AS_ERROR_NOT_RUNNING; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - return CY_AS_ERROR_SUCCESS; -} - -static void -usb_ack_callback(cy_as_device_handle h, - cy_as_return_status_t status, - uint32_t client, - cy_as_funct_c_b_type type, - void *data) -{ - cy_as_device *dev_p = (cy_as_device *)h; - - (void)client; - (void)status; - (void)data; - - cy_as_hal_assert(type == CY_FUNCT_CB_NODATA); - - if (dev_p->usb_pending_buffer) { - cy_as_usb_io_callback cb; - - cb = dev_p->usb_cb[0]; - dev_p->usb_cb[0] = 0; - cy_as_device_clear_usb_async_pending(dev_p, 0); - if (cb) - cb(h, 0, dev_p->usb_pending_size, - dev_p->usb_pending_buffer, dev_p->usb_error); - - dev_p->usb_pending_buffer = 0; - } - - cy_as_device_clear_setup_packet(dev_p); -} - -static void -my_usb_request_callback_usb_event(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - uint16_t ev; - uint16_t val; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - - ev = cy_as_ll_request_response__get_word(req_p, 0); - switch (ev) { - case 0: /* Reserved */ - cy_as_ll_send_status_response(dev_p, CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_INVALID_REQUEST, 0); - break; - - case 1: /* Reserved */ - cy_as_ll_send_status_response(dev_p, CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_INVALID_REQUEST, 0); - break; - - case 2: /* USB Suspend */ - dev_p->usb_last_event = cy_as_event_usb_suspend; - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, cy_as_event_usb_suspend, 0); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, cy_as_event_usb_suspend, 0); - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - break; - - case 3: /* USB Resume */ - dev_p->usb_last_event = cy_as_event_usb_resume; - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, cy_as_event_usb_resume, 0); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, cy_as_event_usb_resume, 0); - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - break; - - case 4: /* USB Reset */ - /* - * if we get a USB reset, the USB host did not understand - * our response or we timed out for some reason. reset - * our internal state to be ready for another set of - * enumeration based requests. - */ - if (cy_as_device_is_ack_delayed(dev_p)) - cy_as_usb_reset_e_p0_state(dev_p); - - dev_p->usb_last_event = cy_as_event_usb_reset; - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, cy_as_event_usb_reset, 0); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, cy_as_event_usb_reset, 0); - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - cy_as_device_clear_usb_high_speed(dev_p); - cy_as_usb_set_dma_sizes(dev_p); - dev_p->usb_max_tx_size = 0x40; - cy_as_dma_set_max_dma_size(dev_p, 0x06, 0x40); - break; - - case 5: /* USB Set Configuration */ - /* The configuration to set */ - val = cy_as_ll_request_response__get_word(req_p, 1); - dev_p->usb_last_event = cy_as_event_usb_set_config; - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_set_config, &val); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, - cy_as_event_usb_set_config, &val); - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - break; - - case 6: /* USB Speed change */ - /* Connect speed */ - val = cy_as_ll_request_response__get_word(req_p, 1); - dev_p->usb_last_event = cy_as_event_usb_speed_change; - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_speed_change, &val); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, - cy_as_event_usb_speed_change, &val); - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - cy_as_device_set_usb_high_speed(dev_p); - cy_as_usb_set_dma_sizes(dev_p); - dev_p->usb_max_tx_size = 0x200; - cy_as_dma_set_max_dma_size(dev_p, 0x06, 0x200); - break; - - case 7: /* USB Clear Feature */ - /* EP Number */ - val = cy_as_ll_request_response__get_word(req_p, 1); - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_clear_feature, &val); - if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, - cy_as_event_usb_clear_feature, &val); - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - break; - - default: - cy_as_hal_print_message("invalid event type\n"); - cy_as_ll_send_data_response(dev_p, CY_RQT_USB_RQT_CONTEXT, - CY_RESP_USB_INVALID_EVENT, sizeof(ev), &ev); - break; - } -} - -static void -my_usb_request_callback_usb_data(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - cy_as_end_point_number_t ep; - uint8_t type; - uint16_t len; - uint16_t val; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - - val = cy_as_ll_request_response__get_word(req_p, 0); - ep = (cy_as_end_point_number_t)((val >> 13) & 0x01); - len = (val & 0x1ff); - - cy_as_hal_assert(len <= 64); - cy_as_ll_request_response__unpack(req_p, - 1, len, dev_p->usb_ep_data); - - type = (uint8_t)((val >> 14) & 0x03); - if (type == 0) { - if (cy_as_device_is_ack_delayed(dev_p)) { - /* - * A setup packet has arrived while we are - * processing a previous setup packet. reset - * our state with respect to EP0 to be ready - * to process the new packet. - */ - cy_as_usb_reset_e_p0_state(dev_p); - } - - if (len != 8) - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_INVALID_REQUEST, 0); - else { - cy_as_device_clear_ep0_stalled(dev_p); - cy_as_device_set_setup_packet(dev_p); - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_SUCCESS, 0); - - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_setup_packet, - dev_p->usb_ep_data); - else - dev_p->usb_event_cb(h, - cy_as_event_usb_setup_packet, - dev_p->usb_ep_data); - - if ((!cy_as_device_is_ack_delayed(dev_p)) && - (!cy_as_device_is_ep0_stalled(dev_p))) - cy_as_usb_ack_setup_packet(h, - usb_ack_callback, 0); - } - } else if (type == 2) { - if (len != 0) - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_INVALID_REQUEST, 0); - else { - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_status_packet, 0); - else - dev_p->usb_event_cb(h, - cy_as_event_usb_status_packet, 0); - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, - CY_AS_ERROR_SUCCESS, 0); - } - } else if (type == 1) { - /* - * we need to hand the data associated with these - * endpoints to the DMA module. - */ - cy_as_dma_received_data(dev_p, ep, len, dev_p->usb_ep_data); - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); - } -} - -static void -my_usb_request_callback_inquiry(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - cy_as_usb_inquiry_data_dep cbdata; - cy_as_usb_inquiry_data cbdata_ms; - void *data; - uint16_t val; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - uint8_t def_inq_data[64]; - uint8_t evpd; - uint8_t codepage; - cy_bool updated; - uint16_t length; - - cy_as_bus_number_t bus; - uint32_t device; - cy_as_media_type media; - - val = cy_as_ll_request_response__get_word(req_p, 0); - bus = cy_as_storage_get_bus_from_address(val); - device = cy_as_storage_get_device_from_address(val); - media = cy_as_storage_get_media_from_address(val); - - val = cy_as_ll_request_response__get_word(req_p, 1); - evpd = (uint8_t)((val >> 8) & 0x01); - codepage = (uint8_t)(val & 0xff); - - length = cy_as_ll_request_response__get_word(req_p, 2); - data = (void *)def_inq_data; - - updated = cy_false; - - if (dev_p->usb_event_cb_ms) { - cbdata_ms.bus = bus; - cbdata_ms.device = device; - cbdata_ms.updated = updated; - cbdata_ms.evpd = evpd; - cbdata_ms.codepage = codepage; - cbdata_ms.length = length; - cbdata_ms.data = data; - - cy_as_hal_assert(cbdata_ms.length <= sizeof(def_inq_data)); - cy_as_ll_request_response__unpack(req_p, - 3, cbdata_ms.length, cbdata_ms.data); - - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_inquiry_before, &cbdata_ms); - - updated = cbdata_ms.updated; - data = cbdata_ms.data; - length = cbdata_ms.length; - } else if (dev_p->usb_event_cb) { - cbdata.media = media; - cbdata.updated = updated; - cbdata.evpd = evpd; - cbdata.codepage = codepage; - cbdata.length = length; - cbdata.data = data; - - cy_as_hal_assert(cbdata.length <= - sizeof(def_inq_data)); - cy_as_ll_request_response__unpack(req_p, 3, - cbdata.length, cbdata.data); - - dev_p->usb_event_cb(h, - cy_as_event_usb_inquiry_before, &cbdata); - - updated = cbdata.updated; - data = cbdata.data; - length = cbdata.length; - } - - if (updated && length > 192) - cy_as_hal_print_message("an inquiry result from a " - "cy_as_event_usb_inquiry_before event " - "was greater than 192 bytes."); - - /* Now send the reply with the data back - * to the West Bridge device */ - if (updated && length <= 192) { - /* - * the callback function modified the inquiry - * data, ship the data back to the west bridge firmware. - */ - cy_as_ll_send_data_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, - CY_RESP_INQUIRY_DATA, length, data); - } else { - /* - * the callback did not modify the data, just acknowledge - * that we processed the request - */ - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 1); - } - - if (dev_p->usb_event_cb_ms) - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_inquiry_after, &cbdata_ms); - else if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, - cy_as_event_usb_inquiry_after, &cbdata); -} - -static void -my_usb_request_callback_start_stop(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - cy_as_bus_number_t bus; - cy_as_media_type media; - uint32_t device; - uint16_t val; - - if (dev_p->usb_event_cb_ms || dev_p->usb_event_cb) { - cy_bool loej; - cy_bool start; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - - val = cy_as_ll_request_response__get_word(req_p, 0); - bus = cy_as_storage_get_bus_from_address(val); - device = cy_as_storage_get_device_from_address(val); - media = cy_as_storage_get_media_from_address(val); - - val = cy_as_ll_request_response__get_word(req_p, 1); - loej = (val & 0x02) ? cy_true : cy_false; - start = (val & 0x01) ? cy_true : cy_false; - - if (dev_p->usb_event_cb_ms) { - cy_as_usb_start_stop_data cbdata_ms; - - cbdata_ms.bus = bus; - cbdata_ms.device = device; - cbdata_ms.loej = loej; - cbdata_ms.start = start; - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_start_stop, &cbdata_ms); - - } else if (dev_p->usb_event_cb) { - cy_as_usb_start_stop_data_dep cbdata; - - cbdata.media = media; - cbdata.loej = loej; - cbdata.start = start; - dev_p->usb_event_cb(h, - cy_as_event_usb_start_stop, &cbdata); - } - } - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 1); -} - -static void -my_usb_request_callback_uknown_c_b_w(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - uint16_t val; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - uint8_t buf[16]; - - uint8_t response[4]; - uint16_t reqlen; - void *request; - uint8_t status; - uint8_t key; - uint8_t asc; - uint8_t ascq; - - val = cy_as_ll_request_response__get_word(req_p, 0); - /* Failed by default */ - status = 1; - /* Invalid command */ - key = 0x05; - /* Invalid command */ - asc = 0x20; - /* Invalid command */ - ascq = 0x00; - reqlen = cy_as_ll_request_response__get_word(req_p, 1); - request = buf; - - cy_as_hal_assert(reqlen <= sizeof(buf)); - cy_as_ll_request_response__unpack(req_p, 2, reqlen, request); - - if (dev_p->usb_event_cb_ms) { - cy_as_usb_unknown_command_data cbdata_ms; - cbdata_ms.bus = cy_as_storage_get_bus_from_address(val); - cbdata_ms.device = - cy_as_storage_get_device_from_address(val); - cbdata_ms.reqlen = reqlen; - cbdata_ms.request = request; - cbdata_ms.status = status; - cbdata_ms.key = key; - cbdata_ms.asc = asc; - cbdata_ms.ascq = ascq; - - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_unknown_storage, &cbdata_ms); - status = cbdata_ms.status; - key = cbdata_ms.key; - asc = cbdata_ms.asc; - ascq = cbdata_ms.ascq; - } else if (dev_p->usb_event_cb) { - cy_as_usb_unknown_command_data_dep cbdata; - cbdata.media = - cy_as_storage_get_media_from_address(val); - cbdata.reqlen = reqlen; - cbdata.request = request; - cbdata.status = status; - cbdata.key = key; - cbdata.asc = asc; - cbdata.ascq = ascq; - - dev_p->usb_event_cb(h, - cy_as_event_usb_unknown_storage, &cbdata); - status = cbdata.status; - key = cbdata.key; - asc = cbdata.asc; - ascq = cbdata.ascq; - } - - response[0] = status; - response[1] = key; - response[2] = asc; - response[3] = ascq; - cy_as_ll_send_data_response(dev_p, CY_RQT_USB_RQT_CONTEXT, - CY_RESP_UNKNOWN_SCSI_COMMAND, sizeof(response), response); -} - -static void -my_usb_request_callback_m_s_c_progress(cy_as_device *dev_p, - cy_as_ll_request_response *req_p) -{ - uint16_t val1, val2; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - - if ((dev_p->usb_event_cb) || (dev_p->usb_event_cb_ms)) { - cy_as_m_s_c_progress_data cbdata; - - val1 = cy_as_ll_request_response__get_word(req_p, 0); - val2 = cy_as_ll_request_response__get_word(req_p, 1); - cbdata.wr_count = (uint32_t)((val1 << 16) | val2); - - val1 = cy_as_ll_request_response__get_word(req_p, 2); - val2 = cy_as_ll_request_response__get_word(req_p, 3); - cbdata.rd_count = (uint32_t)((val1 << 16) | val2); - - if (dev_p->usb_event_cb) - dev_p->usb_event_cb(h, - cy_as_event_usb_m_s_c_progress, &cbdata); - else - dev_p->usb_event_cb_ms(h, - cy_as_event_usb_m_s_c_progress, &cbdata); - } - - cy_as_ll_send_status_response(dev_p, - CY_RQT_USB_RQT_CONTEXT, CY_AS_ERROR_SUCCESS, 0); -} - -/* -* This function processes the requests delivered from the -* firmware within the West Bridge device that are delivered -* in the USB context. These requests generally are EP0 and -* EP1 related requests or USB events. -*/ -static void -my_usb_request_callback(cy_as_device *dev_p, uint8_t context, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *resp_p, - cy_as_return_status_t ret) -{ - uint16_t val; - uint8_t code = cy_as_ll_request_response__get_code(req_p); - - (void)resp_p; - (void)context; - (void)ret; - - switch (code) { - case CY_RQT_USB_EVENT: - my_usb_request_callback_usb_event(dev_p, req_p); - break; - - case CY_RQT_USB_EP_DATA: - dev_p->usb_last_event = cy_as_event_usb_setup_packet; - my_usb_request_callback_usb_data(dev_p, req_p); - break; - - case CY_RQT_SCSI_INQUIRY_COMMAND: - dev_p->usb_last_event = cy_as_event_usb_inquiry_after; - my_usb_request_callback_inquiry(dev_p, req_p); - break; - - case CY_RQT_SCSI_START_STOP_COMMAND: - dev_p->usb_last_event = cy_as_event_usb_start_stop; - my_usb_request_callback_start_stop(dev_p, req_p); - break; - - case CY_RQT_SCSI_UNKNOWN_COMMAND: - dev_p->usb_last_event = cy_as_event_usb_unknown_storage; - my_usb_request_callback_uknown_c_b_w(dev_p, req_p); - break; - - case CY_RQT_USB_ACTIVITY_UPDATE: - dev_p->usb_last_event = cy_as_event_usb_m_s_c_progress; - my_usb_request_callback_m_s_c_progress(dev_p, req_p); - break; - - default: - cy_as_hal_print_message("invalid request " - "received on USB context\n"); - val = req_p->box0; - cy_as_ll_send_data_response(dev_p, CY_RQT_USB_RQT_CONTEXT, - CY_RESP_INVALID_REQUEST, sizeof(val), &val); - break; - } -} - -static cy_as_return_status_t -my_handle_response_usb_start(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* - * mark EP 0 and EP1 as 64 byte endpoints - */ - cy_as_dma_set_max_dma_size(dev_p, 0, 64); - cy_as_dma_set_max_dma_size(dev_p, 1, 64); - - dev_p->usb_count++; - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_destroy_c_b_queue(dev_p->usb_func_cbs); - cy_as_ll_register_request_callback(dev_p, - CY_RQT_USB_RQT_CONTEXT, 0); - } - - cy_as_device_clear_u_s_s_pending(dev_p); - - return ret; - -} - -/* -* This function starts the USB stack. The stack is reference -* counted so if the stack is already started, this function -* just increments the count. If the stack has not been started, -* a start request is sent to the West Bridge device. -* -* Note: Starting the USB stack does not cause the USB signals -* to be connected to the USB pins. To do this and therefore -* initiate enumeration, CyAsUsbConnect() must be called. -*/ -cy_as_return_status_t -cy_as_usb_start(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p, *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_start called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (cy_as_device_is_u_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - cy_as_device_set_u_s_s_pending(dev_p); - - if (dev_p->usb_count == 0) { - /* - * since we are just starting the stack, - * mark USB as not connected to the remote host - */ - cy_as_device_clear_usb_connected(dev_p); - dev_p->usb_phy_config = 0; - - /* Queue for 1.0 Async Requests, kept for - * backwards compatibility */ - dev_p->usb_func_cbs = cy_as_create_c_b_queue(CYAS_USB_FUNC_CB); - if (dev_p->usb_func_cbs == 0) { - cy_as_device_clear_u_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Reset the EP0 state */ - cy_as_usb_reset_e_p0_state(dev_p); - - /* - * we register here because the start request may cause - * events to occur before the response to the start request. - */ - cy_as_ll_register_request_callback(dev_p, - CY_RQT_USB_RQT_CONTEXT, my_usb_request_callback); - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_START_USB, CY_RQT_USB_RQT_CONTEXT, 0); - if (req_p == 0) { - cy_as_destroy_c_b_queue(dev_p->usb_func_cbs); - dev_p->usb_func_cbs = 0; - cy_as_device_clear_u_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Reserve space for the reply, the reply data - * will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_destroy_c_b_queue(dev_p->usb_func_cbs); - dev_p->usb_func_cbs = 0; - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_device_clear_u_s_s_pending(dev_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_usb_start(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, - client, CY_FUNCT_CB_USB_START, 0, - dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else { - dev_p->usb_count++; - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_USB_START, 0); - } - - cy_as_device_clear_u_s_s_pending(dev_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_start); - -void -cy_as_usb_reset(cy_as_device *dev_p) -{ - int i; - - cy_as_device_clear_usb_connected(dev_p); - - for (i = 0; i < sizeof(dev_p->usb_config) / - sizeof(dev_p->usb_config[0]); i++) { - /* - * cancel all pending USB read/write operations, as it is - * possible that the USB stack comes up in a different - * configuration with a different set of endpoints. - */ - if (cy_as_device_is_usb_async_pending(dev_p, i)) - cy_as_usb_cancel_async(dev_p, - (cy_as_end_point_number_t)i); - - dev_p->usb_cb[i] = 0; - dev_p->usb_config[i].enabled = cy_false; - } - - dev_p->usb_phy_config = 0; -} - -/* - * This function does all the API side clean-up associated - * with CyAsUsbStop, without any communication with firmware. - * This needs to be done when the device is being reset while - * the USB stack is active. - */ -void -cy_as_usb_cleanup(cy_as_device *dev_p) -{ - if (dev_p->usb_count) { - cy_as_usb_reset_e_p0_state(dev_p); - cy_as_usb_reset(dev_p); - cy_as_hal_mem_set(dev_p->usb_config, 0, - sizeof(dev_p->usb_config)); - cy_as_destroy_c_b_queue(dev_p->usb_func_cbs); - - dev_p->usb_count = 0; - } -} - -static cy_as_return_status_t -my_handle_response_usb_stop(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* - * we successfully shutdown the stack, so - * decrement to make the count zero. - */ - cy_as_usb_cleanup(dev_p); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_ll_register_request_callback(dev_p, - CY_RQT_USB_RQT_CONTEXT, 0); - - cy_as_device_clear_u_s_s_pending(dev_p); - - return ret; -} - -/* -* This function stops the USB stack. The USB stack is reference -* counted so first is reference count is decremented. If the -* reference count is then zero, a request is sent to the West -* Bridge device to stop the USB stack on the West Bridge device. -*/ -cy_as_return_status_t -cy_as_usb_stop(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p = 0, *reply_p = 0; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_stop called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_CONNECTED; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (cy_as_device_is_u_s_s_pending(dev_p)) - return CY_AS_ERROR_STARTSTOP_PENDING; - - cy_as_device_set_u_s_s_pending(dev_p); - - if (dev_p->usb_count == 1) { - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_STOP_USB, - CY_RQT_USB_RQT_CONTEXT, 0); - if (req_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - /* Reserve space for the reply, the reply data will not - * exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_usb_stop(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_STOP, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } else if (dev_p->usb_count > 1) { - /* - * reset all LE_ps to inactive state, after cleaning - * up any pending async read/write calls. - */ - cy_as_usb_reset(dev_p); - dev_p->usb_count--; - - if (cb) - cb(handle, ret, client, CY_FUNCT_CB_USB_STOP, 0); - } - - cy_as_device_clear_u_s_s_pending(dev_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_stop); - -/* -* This function registers a callback to be called when -* USB events are processed -*/ -cy_as_return_status_t -cy_as_usb_register_callback(cy_as_device_handle handle, - cy_as_usb_event_callback callback) -{ - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_register_callback called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (!cy_as_device_is_configured(dev_p)) - return CY_AS_ERROR_NOT_CONFIGURED; - - if (!cy_as_device_is_firmware_loaded(dev_p)) - return CY_AS_ERROR_NO_FIRMWARE; - - dev_p->usb_event_cb = NULL; - dev_p->usb_event_cb_ms = callback; - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_usb_register_callback); - -static cy_as_return_status_t -my_handle_response_no_data(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(reply_p, 0); - - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_handle_response_connect(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret == CY_AS_ERROR_SUCCESS) - cy_as_device_set_usb_connected(dev_p); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - - -/* -* This method asks the West Bridge device to connect the -* internal USB D+ and D- signals to the USB pins, thus -* starting the enumeration processes if the external pins -* are connected to a USB host. If the external pins are -* not connected to a USB host, enumeration will begin as soon -* as the USB pins are connected to a host. -*/ -cy_as_return_status_t -cy_as_usb_connect(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_connect called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SET_CONNECT_STATE, CY_RQT_USB_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* 1 = Connect request */ - cy_as_ll_request_response__set_word(req_p, 0, 1); - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_connect(dev_p, req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_CONNECT, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_connect); - -static cy_as_return_status_t -my_handle_response_disconnect(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_return_status_t ret) -{ - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - if (ret == CY_AS_ERROR_SUCCESS) - cy_as_device_clear_usb_connected(dev_p); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -/* -* This method forces a disconnect of the D+ and D- pins -* external to the West Bridge device from the D+ and D- -* signals internally, effectively disconnecting the West -* Bridge device from any connected USB host. -*/ -cy_as_return_status_t -cy_as_usb_disconnect(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_disconnect called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (!cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_NOT_CONNECTED; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SET_CONNECT_STATE, CY_RQT_USB_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, 0); - - /* Reserve space for the reply, the reply - * data will not exceed two bytes */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_disconnect(dev_p, - req_p, reply_p, ret); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_DISCONNECT, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_disconnect); - -static cy_as_return_status_t -my_handle_response_set_enum_config(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - - if (ret == CY_AS_ERROR_SUCCESS) { - /* - * we configured the west bridge device and - * enumeration is going to happen on the P port - * processor. now we must enable endpoint zero - */ - cy_as_usb_end_point_config config; - - config.dir = cy_as_usb_in_out; - config.type = cy_as_usb_control; - config.enabled = cy_true; - - ret = cy_as_usb_set_end_point_config((cy_as_device_handle *) - dev_p, 0, &config); - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* -* This method sets how the USB is enumerated and should -* be called before the CyAsUsbConnect() is called. -*/ -static cy_as_return_status_t -my_usb_set_enum_config(cy_as_device *dev_p, - uint8_t bus_mask, - uint8_t media_mask, - cy_bool use_antioch_enumeration, - uint8_t mass_storage_interface, - uint8_t mtp_interface, - cy_bool mass_storage_callbacks, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_log_debug_message(6, "cy_as_usb_set_enum_config called"); - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_CONNECTED; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* if we are using MTP firmware: */ - if (dev_p->is_mtp_firmware == 1) { - /* we cannot enumerate MSC */ - if (mass_storage_interface != 0) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (bus_mask == 0) { - if (mtp_interface != 0) - return CY_AS_ERROR_INVALID_CONFIGURATION; - } else if (bus_mask == 2) { - /* enable EP 1 as it will be used */ - cy_as_dma_enable_end_point(dev_p, 1, cy_true, - cy_as_direction_in); - dev_p->usb_config[1].enabled = cy_true; - dev_p->usb_config[1].dir = cy_as_usb_in; - dev_p->usb_config[1].type = cy_as_usb_int; - } else { - return CY_AS_ERROR_INVALID_CONFIGURATION; - } - /* if we are not using MTP firmware, we cannot enumerate MTP */ - } else if (mtp_interface != 0) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - /* - * if we are not enumerating mass storage, we should - * not be providing an interface number. - */ - if (bus_mask == 0 && mass_storage_interface != 0) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - /* - * if we are going to use mtp_interface, bus mask must be 2. - */ - if (mtp_interface != 0 && bus_mask != 2) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SET_USB_CONFIG, CY_RQT_USB_RQT_CONTEXT, 4); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Marshal the structure */ - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((media_mask << 8) | bus_mask)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)use_antioch_enumeration); - cy_as_ll_request_response__set_word(req_p, 2, - dev_p->is_mtp_firmware ? mtp_interface : - mass_storage_interface); - cy_as_ll_request_response__set_word(req_p, 3, - (uint16_t)mass_storage_callbacks); - - /* Reserve space for the reply, the reply - * data will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_set_enum_config(dev_p, - req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_SETENUMCONFIG, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* - * This method sets how the USB is enumerated and should - * be called before the CyAsUsbConnect() is called. - */ -cy_as_return_status_t -cy_as_usb_set_enum_config(cy_as_device_handle handle, - cy_as_usb_enum_control *config_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - uint8_t bus_mask, media_mask; - uint32_t bus, device; - cy_as_return_status_t ret; - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if ((cy_as_device_is_in_callback(dev_p)) && (cb != 0)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Since we are mapping the media types to bus with NAND to 0 - * and the rest to 1, and we are only allowing for enumerating - * all the devices on a bus we just scan the array for any - * positions where there a device is enabled and mark the bus - * to be enumerated. - */ - bus_mask = 0; - media_mask = 0; - for (bus = 0; bus < CY_AS_MAX_BUSES; bus++) { - for (device = 0; device < CY_AS_MAX_STORAGE_DEVICES; device++) { - if (config_p->devices_to_enumerate[bus][device] == - cy_true) { - bus_mask |= (0x01 << bus); - media_mask |= dev_p->media_supported[bus]; - media_mask |= dev_p->media_supported[bus]; - } - } - } - - return my_usb_set_enum_config(dev_p, bus_mask, media_mask, - config_p->antioch_enumeration, - config_p->mass_storage_interface, - config_p->mtp_interface, - config_p->mass_storage_callbacks, - cb, - client - ); -} -EXPORT_SYMBOL(cy_as_usb_set_enum_config); - -static cy_as_return_status_t -my_handle_response_get_enum_config(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - void *config_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t val; - uint8_t bus_mask; - uint32_t bus; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_USB_CONFIG) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - /* Marshal the reply */ - if (req_p->flags & CY_AS_REQUEST_RESPONSE_MS) { - uint32_t device; - cy_bool state; - cy_as_usb_enum_control *ms_config_p = - (cy_as_usb_enum_control *)config_p; - - bus_mask = (uint8_t) - (cy_as_ll_request_response__get_word - (reply_p, 0) & 0xFF); - for (bus = 0; bus < CY_AS_MAX_BUSES; bus++) { - if (bus_mask & (1 << bus)) - state = cy_true; - else - state = cy_false; - - for (device = 0; device < CY_AS_MAX_STORAGE_DEVICES; - device++) - ms_config_p->devices_to_enumerate[bus][device] - = state; - } - - ms_config_p->antioch_enumeration = - (cy_bool)cy_as_ll_request_response__get_word - (reply_p, 1); - - val = cy_as_ll_request_response__get_word(reply_p, 2); - if (dev_p->is_mtp_firmware) { - ms_config_p->mass_storage_interface = 0; - ms_config_p->mtp_interface = (uint8_t)(val & 0xFF); - } else { - ms_config_p->mass_storage_interface = - (uint8_t)(val & 0xFF); - ms_config_p->mtp_interface = 0; - } - ms_config_p->mass_storage_callbacks = (cy_bool)(val >> 8); - - /* - * firmware returns an invalid interface number for mass storage, - * if mass storage is not enabled. this needs to be converted to - * zero to match the input configuration. - */ - if (bus_mask == 0) { - if (dev_p->is_mtp_firmware) - ms_config_p->mtp_interface = 0; - else - ms_config_p->mass_storage_interface = 0; - } - } else { - cy_as_usb_enum_control_dep *ex_config_p = - (cy_as_usb_enum_control_dep *)config_p; - - ex_config_p->enum_mass_storage = (uint8_t) - ((cy_as_ll_request_response__get_word - (reply_p, 0) >> 8) & 0xFF); - ex_config_p->antioch_enumeration = (cy_bool) - cy_as_ll_request_response__get_word(reply_p, 1); - - val = cy_as_ll_request_response__get_word(reply_p, 2); - ex_config_p->mass_storage_interface = (uint8_t)(val & 0xFF); - ex_config_p->mass_storage_callbacks = (cy_bool)(val >> 8); - - /* - * firmware returns an invalid interface number for mass - * storage, if mass storage is not enabled. this needs to - * be converted to zero to match the input configuration. - */ - if (ex_config_p->enum_mass_storage == 0) - ex_config_p->mass_storage_interface = 0; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* -* This sets up the request for the enumerateion configuration -* information, based on if the request is from the old pre-1.2 -* functions. -*/ -static cy_as_return_status_t -my_usb_get_enum_config(cy_as_device_handle handle, - uint16_t req_flags, - void *config_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_get_enum_config called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_GET_USB_CONFIG, CY_RQT_USB_RQT_CONTEXT, 0); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply data - * will not exceed two bytes */ - reply_p = cy_as_ll_create_response(dev_p, 3); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - /* we need to know the type of request to - * know how to manage the data */ - req_p->flags |= req_flags; - return my_handle_response_get_enum_config(dev_p, - req_p, reply_p, config_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_GETENUMCONFIG, config_p, - dev_p->func_cbs_usb, req_flags, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* - * This method returns the enumerateion configuration information - * from the West Bridge device. Generally this is not used by - * client software but is provided mostly for debug information. - * We want a method to read all state information from the device. - */ -cy_as_return_status_t -cy_as_usb_get_enum_config(cy_as_device_handle handle, - cy_as_usb_enum_control *config_p, - cy_as_function_callback cb, - uint32_t client) -{ - return my_usb_get_enum_config(handle, - CY_AS_REQUEST_RESPONSE_MS, config_p, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_get_enum_config); - -/* -* This method sets the USB descriptor for a given entity. -*/ -cy_as_return_status_t -cy_as_usb_set_descriptor(cy_as_device_handle handle, - cy_as_usb_desc_type type, - uint8_t index, - void *desc_p, - uint16_t length, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint16_t pktlen; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_set_descriptor called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (length > CY_AS_MAX_USB_DESCRIPTOR_SIZE) - return CY_AS_ERROR_INVALID_DESCRIPTOR; - - pktlen = (uint16_t)length / 2; - if (length % 2) - pktlen++; - pktlen += 2; /* 1 for type, 1 for length */ - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, CY_RQT_SET_DESCRIPTOR, - CY_RQT_USB_RQT_CONTEXT, (uint16_t)pktlen); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((uint8_t)type | (index << 8))); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)length); - cy_as_ll_request_response__pack(req_p, 2, length, desc_p); - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_no_data(dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_SETDESCRIPTOR, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_set_descriptor); - -/* - * This method clears all descriptors that were previously - * stored on the West Bridge through CyAsUsbSetDescriptor calls. - */ -cy_as_return_status_t -cy_as_usb_clear_descriptors(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_ll_request_response *req_p , *reply_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_clear_descriptors called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if ((cy_as_device_is_in_callback(dev_p)) && (cb == 0)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_CLEAR_DESCRIPTORS, CY_RQT_USB_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_no_data(dev_p, req_p, reply_p); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_CLEARDESCRIPTORS, 0, - dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_clear_descriptors); - -static cy_as_return_status_t -my_handle_response_get_descriptor(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_get_descriptor_data *data) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint32_t retlen; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SUCCESS_FAILURE) { - ret = cy_as_ll_request_response__get_word(reply_p, 0); - goto destroy; - } else if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_USB_DESCRIPTOR) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - retlen = cy_as_ll_request_response__get_word(reply_p, 0); - if (retlen > data->length) { - ret = CY_AS_ERROR_INVALID_SIZE; - goto destroy; - } - - ret = CY_AS_ERROR_SUCCESS; - cy_as_ll_request_response__unpack(reply_p, 1, - retlen, data->desc_p); - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -/* -* This method retreives the USB descriptor for a given type. -*/ -cy_as_return_status_t -cy_as_usb_get_descriptor(cy_as_device_handle handle, - cy_as_usb_desc_type type, - uint8_t index, - cy_as_get_descriptor_data *data, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_get_descriptor called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_GET_DESCRIPTOR, CY_RQT_USB_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((uint8_t)type | (index << 8))); - - /* Add one for the length field */ - reply_p = cy_as_ll_create_response(dev_p, - CY_AS_MAX_USB_DESCRIPTOR_SIZE + 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply( - dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return my_handle_response_get_descriptor(dev_p, - req_p, reply_p, data); - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_GETDESCRIPTOR, data, - dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, - reply_p, cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_get_descriptor); - -cy_as_return_status_t -cy_as_usb_set_physical_configuration(cy_as_device_handle handle, - uint8_t config) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, - "cy_as_usb_set_physical_configuration called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_CONNECTED; - - if (config < 1 || config > 12) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - dev_p->usb_phy_config = config; - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_usb_set_physical_configuration); - -static cy_bool -is_physical_valid(uint8_t config, cy_as_end_point_number_t ep) -{ - static uint8_t validmask[12] = { - 0x0f, /* Config 1 - 1, 2, 3, 4 */ - 0x07, /* Config 2 - 1, 2, 3 */ - 0x07, /* Config 3 - 1, 2, 3 */ - 0x0d, /* Config 4 - 1, 3, 4 */ - 0x05, /* Config 5 - 1, 3 */ - 0x05, /* Config 6 - 1, 3 */ - 0x0d, /* Config 7 - 1, 3, 4 */ - 0x05, /* Config 8 - 1, 3 */ - 0x05, /* Config 9 - 1, 3 */ - 0x0d, /* Config 10 - 1, 3, 4 */ - 0x09, /* Config 11 - 1, 4 */ - 0x01 /* Config 12 - 1 */ - }; - - return (validmask[config - 1] & (1 << (ep - 1))) ? cy_true : cy_false; -} - -/* -* This method sets the configuration for an endpoint -*/ -cy_as_return_status_t -cy_as_usb_set_end_point_config(cy_as_device_handle handle, - cy_as_end_point_number_t ep, cy_as_usb_end_point_config *config_p) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_set_end_point_config called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_CONNECTED; - - if (ep >= 16 || ep == 2 || ep == 4 || ep == 6 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - if (ep == 0) { - /* Endpoint 0 must be 64 byte, dir IN/OUT, - * and control type */ - if (config_p->dir != cy_as_usb_in_out || - config_p->type != cy_as_usb_control) - return CY_AS_ERROR_INVALID_CONFIGURATION; - } else if (ep == 1) { - if ((dev_p->is_mtp_firmware == 1) && - (dev_p->usb_config[1].enabled == cy_true)) { - return CY_AS_ERROR_INVALID_ENDPOINT; - } - - /* - * EP1 can only be used either as an OUT ep, or as an IN ep. - */ - if ((config_p->type == cy_as_usb_control) || - (config_p->type == cy_as_usb_iso) || - (config_p->dir == cy_as_usb_in_out)) - return CY_AS_ERROR_INVALID_CONFIGURATION; - } else { - if (config_p->dir == cy_as_usb_in_out || - config_p->type == cy_as_usb_control) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (!is_physical_valid(dev_p->usb_phy_config, - config_p->physical)) - return CY_AS_ERROR_INVALID_PHYSICAL_ENDPOINT; - - /* - * ISO endpoints must be on E_ps 3, 5, 7 or 9 as - * they need to align directly with the underlying - * physical endpoint. - */ - if (config_p->type == cy_as_usb_iso) { - if (ep != 3 && ep != 5 && ep != 7 && ep != 9) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (ep == 3 && config_p->physical != 1) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (ep == 5 && config_p->physical != 2) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (ep == 7 && config_p->physical != 3) - return CY_AS_ERROR_INVALID_CONFIGURATION; - - if (ep == 9 && config_p->physical != 4) - return CY_AS_ERROR_INVALID_CONFIGURATION; - } - } - - /* Store the configuration information until a - * CyAsUsbCommitConfig is done */ - dev_p->usb_config[ep] = *config_p; - - /* If the endpoint is enabled, enable DMA associated - * with the endpoint */ - /* - * we make some assumptions that we check here. we assume - * that the direction fields for the DMA module are the same - * values as the direction values for the USB module. - */ - cy_as_hal_assert((int)cy_as_usb_in == (int)cy_as_direction_in); - cy_as_hal_assert((int)cy_as_usb_out == (int)cy_as_direction_out); - cy_as_hal_assert((int)cy_as_usb_in_out == (int)cy_as_direction_in_out); - - return cy_as_dma_enable_end_point(dev_p, ep, - config_p->enabled, (cy_as_dma_direction)config_p->dir); -} -EXPORT_SYMBOL(cy_as_usb_set_end_point_config); - -cy_as_return_status_t -cy_as_usb_get_end_point_config(cy_as_device_handle handle, - cy_as_end_point_number_t ep, cy_as_usb_end_point_config *config_p) -{ - cy_as_return_status_t ret; - - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_get_end_point_config called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (ep >= 16 || ep == 2 || ep == 4 || ep == 6 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - *config_p = dev_p->usb_config[ep]; - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_usb_get_end_point_config); - -/* -* Commit the configuration of the various endpoints to the hardware. -*/ -cy_as_return_status_t -cy_as_usb_commit_config(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - uint32_t i; - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - cy_as_device *dev_p; - uint16_t data; - - cy_as_log_debug_message(6, "cy_as_usb_commit_config called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_usb_connected(dev_p)) - return CY_AS_ERROR_USB_CONNECTED; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* - * this performs the mapping based on informatation that was - * previously stored on the device about the various endpoints - * and how they are configured. the output of this mapping is - * setting the the 14 register values contained in usb_lepcfg - * and usb_pepcfg - */ - ret = cy_as_usb_map_logical2_physical(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* - * now, package the information about the various logical and - * physical endpoint configuration registers and send it - * across to the west bridge device. - */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_SET_USB_CONFIG_REGISTERS, CY_RQT_USB_RQT_CONTEXT, 8); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_hal_print_message("USB configuration: %d\n", - dev_p->usb_phy_config); - cy_as_hal_print_message("EP1OUT: 0x%02x EP1IN: 0x%02x\n", - dev_p->usb_ep1cfg[0], dev_p->usb_ep1cfg[1]); - cy_as_hal_print_message("PEP registers: 0x%02x 0x%02x 0x%02x 0x%02x\n", - dev_p->usb_pepcfg[0], dev_p->usb_pepcfg[1], - dev_p->usb_pepcfg[2], dev_p->usb_pepcfg[3]); - - cy_as_hal_print_message("LEP registers: 0x%02x 0x%02x 0x%02x " - "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", - dev_p->usb_lepcfg[0], dev_p->usb_lepcfg[1], - dev_p->usb_lepcfg[2], dev_p->usb_lepcfg[3], - dev_p->usb_lepcfg[4], dev_p->usb_lepcfg[5], - dev_p->usb_lepcfg[6], dev_p->usb_lepcfg[7], - dev_p->usb_lepcfg[8], dev_p->usb_lepcfg[9]); - - /* Write the EP1OUTCFG and EP1INCFG data in the first word. */ - data = (uint16_t)((dev_p->usb_ep1cfg[0] << 8) | - dev_p->usb_ep1cfg[1]); - cy_as_ll_request_response__set_word(req_p, 0, data); - - /* Write the PEP CFG data in the next 2 words */ - for (i = 0; i < 4; i += 2) { - data = (uint16_t)((dev_p->usb_pepcfg[i] << 8) | - dev_p->usb_pepcfg[i + 1]); - cy_as_ll_request_response__set_word(req_p, - 1 + i / 2, data); - } - - /* Write the LEP CFG data in the next 5 words */ - for (i = 0; i < 10; i += 2) { - data = (uint16_t)((dev_p->usb_lepcfg[i] << 8) | - dev_p->usb_lepcfg[i + 1]); - cy_as_ll_request_response__set_word(req_p, - 3 + i / 2, data); - } - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - ret = my_handle_response_no_data(dev_p, - req_p, reply_p); - - if (ret == CY_AS_ERROR_SUCCESS) - ret = cy_as_usb_setup_dma(dev_p); - - return ret; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_COMMITCONFIG, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_commit_config); - -static void -sync_request_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, - uint32_t size, cy_as_return_status_t err) -{ - (void)ep; - (void)buf_p; - - dev_p->usb_error = err; - dev_p->usb_actual_cnt = size; -} - -static void -async_read_request_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, - uint32_t size, cy_as_return_status_t err) -{ - cy_as_device_handle h; - - cy_as_log_debug_message(6, - "async_read_request_callback called"); - - h = (cy_as_device_handle)dev_p; - - if (ep == 0 && cy_as_device_is_ack_delayed(dev_p)) { - dev_p->usb_pending_buffer = buf_p; - dev_p->usb_pending_size = size; - dev_p->usb_error = err; - cy_as_usb_ack_setup_packet(h, usb_ack_callback, 0); - } else { - cy_as_usb_io_callback cb; - - cb = dev_p->usb_cb[ep]; - dev_p->usb_cb[ep] = 0; - cy_as_device_clear_usb_async_pending(dev_p, ep); - if (cb) - cb(h, ep, size, buf_p, err); - } -} - -static void -async_write_request_callback(cy_as_device *dev_p, - cy_as_end_point_number_t ep, void *buf_p, - uint32_t size, cy_as_return_status_t err) -{ - cy_as_device_handle h; - - cy_as_log_debug_message(6, - "async_write_request_callback called"); - - h = (cy_as_device_handle)dev_p; - - if (ep == 0 && cy_as_device_is_ack_delayed(dev_p)) { - dev_p->usb_pending_buffer = buf_p; - dev_p->usb_pending_size = size; - dev_p->usb_error = err; - - /* The west bridge protocol generates ZLPs as required. */ - cy_as_usb_ack_setup_packet(h, usb_ack_callback, 0); - } else { - cy_as_usb_io_callback cb; - - cb = dev_p->usb_cb[ep]; - dev_p->usb_cb[ep] = 0; - - cy_as_device_clear_usb_async_pending(dev_p, ep); - if (cb) - cb(h, ep, size, buf_p, err); - } -} - -static void -my_turbo_rqt_callback(cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - uint8_t code; - - (void)context; - (void)stat; - - /* The Handlers are responsible for Deleting the rqt and resp when - * they are finished - */ - code = cy_as_ll_request_response__get_code(rqt); - switch (code) { - case CY_RQT_TURBO_SWITCH_ENDPOINT: - cy_as_hal_assert(stat == CY_AS_ERROR_SUCCESS); - cy_as_ll_destroy_request(dev_p, rqt); - cy_as_ll_destroy_response(dev_p, resp); - break; - default: - cy_as_hal_assert(cy_false); - break; - } -} - -/* Send a mailbox request to prepare the endpoint for switching */ -static cy_as_return_status_t -my_send_turbo_switch(cy_as_device *dev_p, uint32_t size, cy_bool pktread) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - - /* Create the request to send to the West Bridge device */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_TURBO_SWITCH_ENDPOINT, CY_RQT_TUR_RQT_CONTEXT, 3); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Reserve space for the reply, the reply data will - * not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)pktread); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((size >> 16) & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(size & 0xFFFF)); - - ret = cy_as_ll_send_request(dev_p, req_p, - reply_p, cy_false, my_turbo_rqt_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_request(dev_p, reply_p); - return ret; - } - - return CY_AS_ERROR_SUCCESS; -} - -cy_as_return_status_t -cy_as_usb_read_data(cy_as_device_handle handle, - cy_as_end_point_number_t ep, cy_bool pktread, - uint32_t dsize, uint32_t *dataread, void *data) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_read_data called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (ep >= 16 || ep == 4 || ep == 6 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* EP2 is available for reading when MTP is active */ - if (dev_p->mtp_count == 0 && ep == CY_AS_MTP_READ_ENDPOINT) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* If the endpoint is disabled, we cannot - * write data to the endpoint */ - if (!dev_p->usb_config[ep].enabled) - return CY_AS_ERROR_ENDPOINT_DISABLED; - - if (dev_p->usb_config[ep].dir != cy_as_usb_out) - return CY_AS_ERROR_USB_BAD_DIRECTION; - - ret = cy_as_dma_queue_request(dev_p, ep, data, dsize, - pktread, cy_true, sync_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (ep == CY_AS_MTP_READ_ENDPOINT) { - ret = my_send_turbo_switch(dev_p, dsize, pktread); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, ret); - return ret; - } - - ret = cy_as_dma_drain_queue(dev_p, ep, cy_false); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } else { - ret = cy_as_dma_drain_queue(dev_p, ep, cy_true); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - ret = dev_p->usb_error; - *dataread = dev_p->usb_actual_cnt; - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_read_data); - -cy_as_return_status_t -cy_as_usb_read_data_async(cy_as_device_handle handle, - cy_as_end_point_number_t ep, cy_bool pktread, - uint32_t dsize, void *data, cy_as_usb_io_callback cb) -{ - cy_as_return_status_t ret; - uint32_t mask; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_read_data_async called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (ep >= 16 || ep == 4 || ep == 6 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* EP2 is available for reading when MTP is active */ - if (dev_p->mtp_count == 0 && ep == CY_AS_MTP_READ_ENDPOINT) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* If the endpoint is disabled, we cannot - * write data to the endpoint */ - if (!dev_p->usb_config[ep].enabled) - return CY_AS_ERROR_ENDPOINT_DISABLED; - - if (dev_p->usb_config[ep].dir != cy_as_usb_out && - dev_p->usb_config[ep].dir != cy_as_usb_in_out) - return CY_AS_ERROR_USB_BAD_DIRECTION; - - /* - * since async operations can be triggered by interrupt - * code, we must insure that we do not get multiple async - * operations going at one time and protect this test and - * set operation from interrupts. - */ - mask = cy_as_hal_disable_interrupts(); - if (cy_as_device_is_usb_async_pending(dev_p, ep)) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_ASYNC_PENDING; - } - cy_as_device_set_usb_async_pending(dev_p, ep); - - /* - * if this is for EP0, we set this bit to delay the - * ACK response until after this read has completed. - */ - if (ep == 0) - cy_as_device_set_ack_delayed(dev_p); - - cy_as_hal_enable_interrupts(mask); - - cy_as_hal_assert(dev_p->usb_cb[ep] == 0); - dev_p->usb_cb[ep] = cb; - - ret = cy_as_dma_queue_request(dev_p, ep, data, dsize, - pktread, cy_true, async_read_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (ep == CY_AS_MTP_READ_ENDPOINT) { - ret = my_send_turbo_switch(dev_p, dsize, pktread); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, ret); - return ret; - } - } else { - /* Kick start the queue if it is not running */ - cy_as_dma_kick_start(dev_p, ep); - } - return ret; -} -EXPORT_SYMBOL(cy_as_usb_read_data_async); - -cy_as_return_status_t -cy_as_usb_write_data(cy_as_device_handle handle, - cy_as_end_point_number_t ep, uint32_t dsize, void *data) -{ - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_write_data called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (ep >= 16 || ep == 2 || ep == 4 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* EP6 is available for writing when MTP is active */ - if (dev_p->mtp_count == 0 && ep == CY_AS_MTP_WRITE_ENDPOINT) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* If the endpoint is disabled, we cannot - * write data to the endpoint */ - if (!dev_p->usb_config[ep].enabled) - return CY_AS_ERROR_ENDPOINT_DISABLED; - - if (dev_p->usb_config[ep].dir != cy_as_usb_in && - dev_p->usb_config[ep].dir != cy_as_usb_in_out) - return CY_AS_ERROR_USB_BAD_DIRECTION; - - /* Write on Turbo endpoint */ - if (ep == CY_AS_MTP_WRITE_ENDPOINT) { - cy_as_ll_request_response *req_p, *reply_p; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST, - CY_RQT_TUR_RQT_CONTEXT, 3); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, - 0, 0x0006); /* EP number to use. */ - cy_as_ll_request_response__set_word(req_p, - 1, (uint16_t)((dsize >> 16) & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, - 2, (uint16_t)(dsize & 0xFFFF)); - - /* Reserve space for the reply, the reply data - * will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (dsize) { - ret = cy_as_dma_queue_request(dev_p, - ep, data, dsize, cy_false, - cy_false, sync_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word - (reply_p, 0); - } - - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - if (ret != CY_AS_ERROR_SUCCESS) { - if (dsize) - cy_as_dma_cancel(dev_p, ep, ret); - return ret; - } - - /* If this is a zero-byte write, firmware will - * handle it. there is no need to do any work here. - */ - if (!dsize) - return CY_AS_ERROR_SUCCESS; - } else { - ret = cy_as_dma_queue_request(dev_p, ep, data, dsize, - cy_false, cy_false, sync_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - if (ep != CY_AS_MTP_WRITE_ENDPOINT) - ret = cy_as_dma_drain_queue(dev_p, ep, cy_true); - else - ret = cy_as_dma_drain_queue(dev_p, ep, cy_false); - - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - ret = dev_p->usb_error; - return ret; -} -EXPORT_SYMBOL(cy_as_usb_write_data); - -static void -mtp_write_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - cy_as_usb_io_callback cb; - cy_as_device_handle h = (cy_as_device_handle)dev_p; - - cy_as_hal_assert(context == CY_RQT_TUR_RQT_CONTEXT); - - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(resp, 0); - } - - /* If this was a zero byte transfer request, we can - * call the callback from here. */ - if ((cy_as_ll_request_response__get_word(rqt, 1) == 0) && - (cy_as_ll_request_response__get_word(rqt, 2) == 0)) { - cb = dev_p->usb_cb[CY_AS_MTP_WRITE_ENDPOINT]; - dev_p->usb_cb[CY_AS_MTP_WRITE_ENDPOINT] = 0; - cy_as_device_clear_usb_async_pending(dev_p, - CY_AS_MTP_WRITE_ENDPOINT); - if (cb) - cb(h, CY_AS_MTP_WRITE_ENDPOINT, 0, 0, ret); - - goto destroy; - } - - if (ret != CY_AS_ERROR_SUCCESS) { - /* Firmware failed the request. Cancel the DMA transfer. */ - cy_as_dma_cancel(dev_p, 0x06, CY_AS_ERROR_CANCELED); - dev_p->usb_cb[0x06] = 0; - cy_as_device_clear_usb_async_pending(dev_p, 0x06); - } - -destroy: - cy_as_ll_destroy_response(dev_p, resp); - cy_as_ll_destroy_request(dev_p, rqt); -} - -cy_as_return_status_t -cy_as_usb_write_data_async(cy_as_device_handle handle, - cy_as_end_point_number_t ep, uint32_t dsize, void *data, - cy_bool spacket, cy_as_usb_io_callback cb) -{ - uint32_t mask; - cy_as_return_status_t ret; - cy_as_device *dev_p; - - cy_as_log_debug_message(6, "cy_as_usb_write_data_async called"); - - dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (ep >= 16 || ep == 2 || ep == 4 || ep == 8) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* EP6 is available for writing when MTP is active */ - if (dev_p->mtp_count == 0 && ep == CY_AS_MTP_WRITE_ENDPOINT) - return CY_AS_ERROR_INVALID_ENDPOINT; - - /* If the endpoint is disabled, we cannot - * write data to the endpoint */ - if (!dev_p->usb_config[ep].enabled) - return CY_AS_ERROR_ENDPOINT_DISABLED; - - if (dev_p->usb_config[ep].dir != cy_as_usb_in && - dev_p->usb_config[ep].dir != cy_as_usb_in_out) - return CY_AS_ERROR_USB_BAD_DIRECTION; - - /* - * since async operations can be triggered by interrupt - * code, we must insure that we do not get multiple - * async operations going at one time and - * protect this test and set operation from interrupts. - */ - mask = cy_as_hal_disable_interrupts(); - if (cy_as_device_is_usb_async_pending(dev_p, ep)) { - cy_as_hal_enable_interrupts(mask); - return CY_AS_ERROR_ASYNC_PENDING; - } - - cy_as_device_set_usb_async_pending(dev_p, ep); - - if (ep == 0) - cy_as_device_set_ack_delayed(dev_p); - - cy_as_hal_enable_interrupts(mask); - - cy_as_hal_assert(dev_p->usb_cb[ep] == 0); - dev_p->usb_cb[ep] = cb; - dev_p->usb_spacket[ep] = spacket; - - /* Write on Turbo endpoint */ - if (ep == CY_AS_MTP_WRITE_ENDPOINT) { - cy_as_ll_request_response *req_p, *reply_p; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST, - CY_RQT_TUR_RQT_CONTEXT, 3); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - cy_as_ll_request_response__set_word(req_p, 0, - 0x0006); /* EP number to use. */ - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)((dsize >> 16) & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)(dsize & 0xFFFF)); - - /* Reserve space for the reply, the reply data - * will not exceed one word */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (dsize) { - ret = cy_as_dma_queue_request(dev_p, ep, data, - dsize, cy_false, cy_false, - async_write_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_false, mtp_write_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - if (dsize) - cy_as_dma_cancel(dev_p, ep, ret); - return ret; - } - - /* Firmware will handle a zero byte transfer - * without any DMA transfers. */ - if (!dsize) - return CY_AS_ERROR_SUCCESS; - } else { - ret = cy_as_dma_queue_request(dev_p, ep, data, dsize, - cy_false, cy_false, async_write_request_callback); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - } - - /* Kick start the queue if it is not running */ - if (ep != CY_AS_MTP_WRITE_ENDPOINT) - cy_as_dma_kick_start(dev_p, ep); - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_usb_write_data_async); - -static void -my_usb_cancel_async_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - uint8_t ep; - (void)context; - - ep = (uint8_t)cy_as_ll_request_response__get_word(rqt, 0); - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(resp, 0); - } - - cy_as_ll_destroy_request(dev_p, rqt); - cy_as_ll_destroy_response(dev_p, resp); - - if (ret == CY_AS_ERROR_SUCCESS) { - cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - dev_p->usb_cb[ep] = 0; - cy_as_device_clear_usb_async_pending(dev_p, ep); - } -} - -cy_as_return_status_t -cy_as_usb_cancel_async(cy_as_device_handle handle, - cy_as_end_point_number_t ep) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p, *reply_p; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ep &= 0x7F; /* Remove the direction bit. */ - if (!cy_as_device_is_usb_async_pending(dev_p, ep)) - return CY_AS_ERROR_ASYNC_NOT_PENDING; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_suspend_mode(dev_p)) - return CY_AS_ERROR_IN_SUSPEND; - - if ((ep == CY_AS_MTP_WRITE_ENDPOINT) || - (ep == CY_AS_MTP_READ_ENDPOINT)) { - /* Need firmware support for the cancel operation. */ - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_CANCEL_ASYNC_TRANSFER, - CY_RQT_TUR_RQT_CONTEXT, 1); - - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)ep); - - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_false, my_usb_cancel_async_callback); - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - return ret; - } - } else { - ret = cy_as_dma_cancel(dev_p, ep, CY_AS_ERROR_CANCELED); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - dev_p->usb_cb[ep] = 0; - cy_as_device_clear_usb_async_pending(dev_p, ep); - } - - return CY_AS_ERROR_SUCCESS; -} -EXPORT_SYMBOL(cy_as_usb_cancel_async); - -static void -cy_as_usb_ack_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t ret) -{ - cy_as_func_c_b_node *node = (cy_as_func_c_b_node *) - dev_p->func_cbs_usb->head_p; - - (void)context; - - if (ret == CY_AS_ERROR_SUCCESS) { - if (cy_as_ll_request_response__get_code(resp) != - CY_RESP_SUCCESS_FAILURE) - ret = CY_AS_ERROR_INVALID_RESPONSE; - else - ret = cy_as_ll_request_response__get_word(resp, 0); - } - - node->cb_p((cy_as_device_handle)dev_p, ret, - node->client_data, node->data_type, node->data); - cy_as_remove_c_b_node(dev_p->func_cbs_usb); - - cy_as_ll_destroy_request(dev_p, rqt); - cy_as_ll_destroy_response(dev_p, resp); - cy_as_device_clear_ack_delayed(dev_p); -} - -static cy_as_return_status_t -cy_as_usb_ack_setup_packet(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p; - cy_as_ll_request_response *reply_p; - cy_as_func_c_b_node *cbnode; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p) && cb == 0) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - cy_as_hal_assert(cb != 0); - - cbnode = cy_as_create_func_c_b_node(cb, client); - if (cbnode == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - req_p = cy_as_ll_create_request(dev_p, 0, - CY_RQT_USB_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - cy_as_ll_init_request(req_p, CY_RQT_ACK_SETUP_PACKET, - CY_RQT_USB_RQT_CONTEXT, 1); - cy_as_ll_init_response(reply_p, 1); - - req_p->flags |= CY_AS_REQUEST_RESPONSE_EX; - - cy_as_insert_c_b_node(dev_p->func_cbs_usb, cbnode); - - ret = cy_as_ll_send_request(dev_p, req_p, reply_p, - cy_false, cy_as_usb_ack_callback); - - return ret; -} - -/* - * Flush all data in logical EP that is being NAK-ed or - * Stall-ed, so that this does not continue to block data - * on other LEPs that use the same physical EP. - */ -static void -cy_as_usb_flush_logical_e_p( - cy_as_device *dev_p, - uint16_t ep) -{ - uint16_t addr, val, count; - - addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; - val = cy_as_hal_read_register(dev_p->tag, addr); - - while (val) { - count = ((val & 0xFFF) + 1) / 2; - while (count--) - val = cy_as_hal_read_register(dev_p->tag, ep); - - cy_as_hal_write_register(dev_p->tag, addr, 0); - val = cy_as_hal_read_register(dev_p->tag, addr); - } -} - -static cy_as_return_status_t -cy_as_usb_nak_stall_request(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - uint16_t request, - cy_bool state, - cy_as_usb_function_callback cb, - cy_as_function_callback fcb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - uint16_t data; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - if (cb) - cy_as_hal_assert(fcb == 0); - if (fcb) - cy_as_hal_assert(cb == 0); - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p) && cb == 0 && fcb == 0) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - req_p = cy_as_ll_create_request(dev_p, - request, CY_RQT_USB_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Set the endpoint */ - data = (uint8_t)ep; - cy_as_ll_request_response__set_word(req_p, 0, data); - - /* Set stall state to stalled */ - cy_as_ll_request_response__set_word(req_p, 1, (uint8_t)state); - - if (cb || fcb) { - void *cbnode; - cy_as_c_b_queue *queue; - if (cb) { - cbnode = cy_as_create_usb_func_c_b_node(cb, client); - queue = dev_p->usb_func_cbs; - } else { - cbnode = cy_as_create_func_c_b_node(fcb, client); - queue = dev_p->func_cbs_usb; - req_p->flags |= CY_AS_REQUEST_RESPONSE_EX; - } - - if (cbnode == 0) { - ret = CY_AS_ERROR_OUT_OF_MEMORY; - goto destroy; - } else - cy_as_insert_c_b_node(queue, cbnode); - - - if (cy_as_device_is_setup_packet(dev_p)) { - /* No Ack is needed on a stall request on EP0 */ - if ((state == cy_true) && (ep == 0)) { - cy_as_device_set_ep0_stalled(dev_p); - } else { - cy_as_device_set_ack_delayed(dev_p); - req_p->flags |= - CY_AS_REQUEST_RESPONSE_DELAY_ACK; - } - } - - ret = cy_as_ll_send_request(dev_p, req_p, - reply_p, cy_false, cy_as_usb_func_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - if (req_p->flags & CY_AS_REQUEST_RESPONSE_DELAY_ACK) - cy_as_device_rem_ack_delayed(dev_p); - cy_as_remove_c_b_tail_node(queue); - - goto destroy; - } - } else { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) != - CY_RESP_SUCCESS_FAILURE) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - ret = cy_as_ll_request_response__get_word(reply_p, 0); - - if ((ret == CY_AS_ERROR_SUCCESS) && - (request == CY_RQT_STALL_ENDPOINT)) { - if ((ep > 1) && (state != 0) && - (dev_p->usb_config[ep].dir == cy_as_usb_out)) - cy_as_usb_flush_logical_e_p(dev_p, ep); - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - } - - return ret; -} - -static cy_as_return_status_t -my_handle_response_get_stall(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_bool *state_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code = cy_as_ll_request_response__get_code(reply_p); - - if (code == CY_RESP_SUCCESS_FAILURE) { - ret = cy_as_ll_request_response__get_word(reply_p, 0); - goto destroy; - } else if (code != CY_RESP_ENDPOINT_STALL) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - *state_p = (cy_bool)cy_as_ll_request_response__get_word(reply_p, 0); - ret = CY_AS_ERROR_SUCCESS; - - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -my_handle_response_get_nak(cy_as_device *dev_p, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_bool *state_p) -{ - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - uint8_t code = cy_as_ll_request_response__get_code(reply_p); - - if (code == CY_RESP_SUCCESS_FAILURE) { - ret = cy_as_ll_request_response__get_word(reply_p, 0); - goto destroy; - } else if (code != CY_RESP_ENDPOINT_NAK) { - ret = CY_AS_ERROR_INVALID_RESPONSE; - goto destroy; - } - - *state_p = (cy_bool)cy_as_ll_request_response__get_word(reply_p, 0); - ret = CY_AS_ERROR_SUCCESS; - - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -static cy_as_return_status_t -cy_as_usb_get_nak_stall(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - uint16_t request, - uint16_t response, - cy_bool *state_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - uint16_t data; - - cy_as_device *dev_p = (cy_as_device *)handle; - - (void)response; - - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p) && !cb) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - req_p = cy_as_ll_create_request(dev_p, request, - CY_RQT_USB_RQT_CONTEXT, 1); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* Set the endpoint */ - data = (uint8_t)ep; - cy_as_ll_request_response__set_word(req_p, 0, (uint16_t)ep); - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, - req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (request == CY_RQT_GET_STALL) - return my_handle_response_get_stall(dev_p, - req_p, reply_p, state_p); - else - return my_handle_response_get_nak(dev_p, - req_p, reply_p, state_p); - - } else { - cy_as_funct_c_b_type type; - - if (request == CY_RQT_GET_STALL) - type = CY_FUNCT_CB_USB_GETSTALL; - else - type = CY_FUNCT_CB_USB_GETNAK; - - ret = cy_as_misc_send_request(dev_p, cb, client, type, - state_p, dev_p->func_cbs_usb, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} - -cy_as_return_status_t -cy_as_usb_set_nak(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate direction - * bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_count > 0) - return CY_AS_ERROR_NOT_VALID_IN_MTP; - - return cy_as_usb_nak_stall_request(handle, ep, - CY_RQT_ENDPOINT_SET_NAK, cy_true, 0, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_set_nak); - -cy_as_return_status_t -cy_as_usb_clear_nak(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate - * direction bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_count > 0) - return CY_AS_ERROR_NOT_VALID_IN_MTP; - - return cy_as_usb_nak_stall_request(handle, ep, - CY_RQT_ENDPOINT_SET_NAK, cy_false, 0, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_clear_nak); - -cy_as_return_status_t -cy_as_usb_get_nak(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_bool *nak_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate - * direction bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_count > 0) - return CY_AS_ERROR_NOT_VALID_IN_MTP; - - return cy_as_usb_get_nak_stall(handle, ep, - CY_RQT_GET_ENDPOINT_NAK, CY_RESP_ENDPOINT_NAK, - nak_p, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_get_nak); - -cy_as_return_status_t -cy_as_usb_set_stall(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate - * direction bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_turbo_active) - return CY_AS_ERROR_NOT_VALID_DURING_MTP; - - return cy_as_usb_nak_stall_request(handle, ep, - CY_RQT_STALL_ENDPOINT, cy_true, 0, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_set_stall); - -cy_as_return_status_t -cy_as_usb_clear_stall(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate - * direction bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_turbo_active) - return CY_AS_ERROR_NOT_VALID_DURING_MTP; - - return cy_as_usb_nak_stall_request(handle, ep, - CY_RQT_STALL_ENDPOINT, cy_false, 0, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_clear_stall); - -cy_as_return_status_t -cy_as_usb_get_stall(cy_as_device_handle handle, - cy_as_end_point_number_t ep, - cy_bool *stall_p, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - /* - * we send the firmware the EP# with the appropriate - * direction bit, regardless of what the user gave us. - */ - ep &= 0x0f; - if (dev_p->usb_config[ep].dir == cy_as_usb_in) - ep |= 0x80; - - if (dev_p->mtp_turbo_active) - return CY_AS_ERROR_NOT_VALID_DURING_MTP; - - return cy_as_usb_get_nak_stall(handle, ep, - CY_RQT_GET_STALL, CY_RESP_ENDPOINT_STALL, stall_p, cb, client); -} -EXPORT_SYMBOL(cy_as_usb_get_stall); - -cy_as_return_status_t -cy_as_usb_signal_remote_wakeup(cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if (cy_as_device_is_in_callback(dev_p)) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - if (dev_p->usb_last_event != cy_as_event_usb_suspend) - return CY_AS_ERROR_NOT_IN_SUSPEND; - - req_p = cy_as_ll_create_request(dev_p, - CY_RQT_USB_REMOTE_WAKEUP, CY_RQT_USB_RQT_CONTEXT, 0); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_SIGNALREMOTEWAKEUP, 0, - dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, - reply_p, cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_signal_remote_wakeup); - -cy_as_return_status_t -cy_as_usb_set_m_s_report_threshold(cy_as_device_handle handle, - uint32_t wr_sectors, - uint32_t rd_sectors, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - if ((cb == 0) && (cy_as_device_is_in_callback(dev_p))) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - /* Check if the firmware version supports this feature. */ - if ((dev_p->media_supported[0]) && (dev_p->media_supported[0] == - (1 << cy_as_media_nand))) - return CY_AS_ERROR_NOT_SUPPORTED; - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_USB_STORAGE_MONITOR, - CY_RQT_USB_RQT_CONTEXT, 4); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Set the read and write count parameters into - * the request structure. */ - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((wr_sectors >> 16) & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 1, - (uint16_t)(wr_sectors & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 2, - (uint16_t)((rd_sectors >> 16) & 0xFFFF)); - cy_as_ll_request_response__set_word(req_p, 3, - (uint16_t)(rd_sectors & 0xFFFF)); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_USB_SET_MSREPORT_THRESHOLD, 0, - dev_p->func_cbs_usb, CY_AS_REQUEST_RESPONSE_EX, - req_p, reply_p, cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_set_m_s_report_threshold); - -cy_as_return_status_t -cy_as_usb_select_m_s_partitions( - cy_as_device_handle handle, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_usb_m_s_type_t type, - cy_as_function_callback cb, - uint32_t client) -{ - cy_as_return_status_t ret; - cy_as_ll_request_response *req_p , *reply_p; - uint16_t val; - - cy_as_device *dev_p = (cy_as_device *)handle; - if (!dev_p || (dev_p->sig != CY_AS_DEVICE_HANDLE_SIGNATURE)) - return CY_AS_ERROR_INVALID_HANDLE; - - ret = is_usb_active(dev_p); - if (ret != CY_AS_ERROR_SUCCESS) - return ret; - - /* This API has to be made before SetEnumConfig is called. */ - if (dev_p->usb_config[0].enabled) - return CY_AS_ERROR_INVALID_CALL_SEQUENCE; - - if ((cb == 0) && (cy_as_device_is_in_callback(dev_p))) - return CY_AS_ERROR_INVALID_IN_CALLBACK; - - req_p = cy_as_ll_create_request(dev_p, CY_RQT_MS_PARTITION_SELECT, - CY_RQT_USB_RQT_CONTEXT, 2); - if (req_p == 0) - return CY_AS_ERROR_OUT_OF_MEMORY; - - /* A single status word response type */ - reply_p = cy_as_ll_create_response(dev_p, 1); - if (reply_p == 0) { - cy_as_ll_destroy_request(dev_p, req_p); - return CY_AS_ERROR_OUT_OF_MEMORY; - } - - /* Set the read and write count parameters into - * the request structure. */ - cy_as_ll_request_response__set_word(req_p, 0, - (uint16_t)((bus << 8) | device)); - - val = 0; - if ((type == cy_as_usb_m_s_unit0) || (type == cy_as_usb_m_s_both)) - val |= 1; - if ((type == cy_as_usb_m_s_unit1) || (type == cy_as_usb_m_s_both)) - val |= (1 << 8); - - cy_as_ll_request_response__set_word(req_p, 1, val); - - if (cb == 0) { - ret = cy_as_ll_send_request_wait_reply(dev_p, req_p, reply_p); - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - - if (cy_as_ll_request_response__get_code(reply_p) == - CY_RESP_SUCCESS_FAILURE) - ret = cy_as_ll_request_response__get_word(reply_p, 0); - else - ret = CY_AS_ERROR_INVALID_RESPONSE; - } else { - ret = cy_as_misc_send_request(dev_p, cb, client, - CY_FUNCT_CB_NODATA, 0, dev_p->func_cbs_usb, - CY_AS_REQUEST_RESPONSE_EX, req_p, reply_p, - cy_as_usb_func_callback); - - if (ret != CY_AS_ERROR_SUCCESS) - goto destroy; - return ret; - } - -destroy: - cy_as_ll_destroy_request(dev_p, req_p); - cy_as_ll_destroy_response(dev_p, reply_p); - - return ret; -} -EXPORT_SYMBOL(cy_as_usb_select_m_s_partitions); - -static void -cy_as_usb_func_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_ll_request_response *rqt, - cy_as_ll_request_response *resp, - cy_as_return_status_t stat) -{ - cy_as_usb_func_c_b_node* node = (cy_as_usb_func_c_b_node *) - dev_p->usb_func_cbs->head_p; - cy_as_func_c_b_node* fnode = (cy_as_func_c_b_node *) - dev_p->func_cbs_usb->head_p; - cy_as_return_status_t ret = CY_AS_ERROR_SUCCESS; - - cy_as_device_handle h = (cy_as_device_handle)dev_p; - cy_bool delayed_ack = (rqt->flags & CY_AS_REQUEST_RESPONSE_DELAY_ACK) - == CY_AS_REQUEST_RESPONSE_DELAY_ACK; - cy_bool ex_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_EX) - == CY_AS_REQUEST_RESPONSE_EX; - cy_bool ms_request = (rqt->flags & CY_AS_REQUEST_RESPONSE_MS) - == CY_AS_REQUEST_RESPONSE_MS; - uint8_t code; - uint8_t ep, state; - - if (!ex_request && !ms_request) { - cy_as_hal_assert(dev_p->usb_func_cbs->count != 0); - cy_as_hal_assert(dev_p->usb_func_cbs->type == - CYAS_USB_FUNC_CB); - } else { - cy_as_hal_assert(dev_p->func_cbs_usb->count != 0); - cy_as_hal_assert(dev_p->func_cbs_usb->type == CYAS_FUNC_CB); - } - - (void)context; - - /* The Handlers are responsible for Deleting the rqt and resp when - * they are finished - */ - code = cy_as_ll_request_response__get_code(rqt); - switch (code) { - case CY_RQT_START_USB: - ret = my_handle_response_usb_start(dev_p, rqt, resp, stat); - break; - case CY_RQT_STOP_USB: - ret = my_handle_response_usb_stop(dev_p, rqt, resp, stat); - break; - case CY_RQT_SET_CONNECT_STATE: - if (!cy_as_ll_request_response__get_word(rqt, 0)) - ret = my_handle_response_disconnect( - dev_p, rqt, resp, stat); - else - ret = my_handle_response_connect( - dev_p, rqt, resp, stat); - break; - case CY_RQT_GET_CONNECT_STATE: - break; - case CY_RQT_SET_USB_CONFIG: - ret = my_handle_response_set_enum_config(dev_p, rqt, resp); - break; - case CY_RQT_GET_USB_CONFIG: - cy_as_hal_assert(fnode->data != 0); - ret = my_handle_response_get_enum_config(dev_p, - rqt, resp, fnode->data); - break; - case CY_RQT_STALL_ENDPOINT: - ep = (uint8_t)cy_as_ll_request_response__get_word(rqt, 0); - state = (uint8_t)cy_as_ll_request_response__get_word(rqt, 1); - ret = my_handle_response_no_data(dev_p, rqt, resp); - if ((ret == CY_AS_ERROR_SUCCESS) && (ep > 1) && (state != 0) - && (dev_p->usb_config[ep].dir == cy_as_usb_out)) - cy_as_usb_flush_logical_e_p(dev_p, ep); - break; - case CY_RQT_GET_STALL: - cy_as_hal_assert(fnode->data != 0); - ret = my_handle_response_get_stall(dev_p, - rqt, resp, (cy_bool *)fnode->data); - break; - case CY_RQT_SET_DESCRIPTOR: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_GET_DESCRIPTOR: - cy_as_hal_assert(fnode->data != 0); - ret = my_handle_response_get_descriptor(dev_p, - rqt, resp, (cy_as_get_descriptor_data *)fnode->data); - break; - case CY_RQT_SET_USB_CONFIG_REGISTERS: - ret = my_handle_response_no_data(dev_p, rqt, resp); - if (ret == CY_AS_ERROR_SUCCESS) - ret = cy_as_usb_setup_dma(dev_p); - break; - case CY_RQT_ENDPOINT_SET_NAK: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_GET_ENDPOINT_NAK: - cy_as_hal_assert(fnode->data != 0); - ret = my_handle_response_get_nak(dev_p, - rqt, resp, (cy_bool *)fnode->data); - break; - case CY_RQT_ACK_SETUP_PACKET: - break; - case CY_RQT_USB_REMOTE_WAKEUP: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_CLEAR_DESCRIPTORS: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_USB_STORAGE_MONITOR: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - case CY_RQT_MS_PARTITION_SELECT: - ret = my_handle_response_no_data(dev_p, rqt, resp); - break; - default: - ret = CY_AS_ERROR_INVALID_RESPONSE; - cy_as_hal_assert(cy_false); - break; - } - - /* - * if the low level layer returns a direct error, use - * the corresponding error code. if not, use the error - * code based on the response from firmware. - */ - if (stat == CY_AS_ERROR_SUCCESS) - stat = ret; - - if (ex_request || ms_request) { - fnode->cb_p((cy_as_device_handle)dev_p, stat, - fnode->client_data, fnode->data_type, fnode->data); - cy_as_remove_c_b_node(dev_p->func_cbs_usb); - } else { - node->cb_p((cy_as_device_handle)dev_p, stat, - node->client_data); - cy_as_remove_c_b_node(dev_p->usb_func_cbs); - } - - if (delayed_ack) { - cy_as_hal_assert(cy_as_device_is_ack_delayed(dev_p)); - cy_as_device_rem_ack_delayed(dev_p); - - /* - * send the ACK if required. - */ - if (!cy_as_device_is_ack_delayed(dev_p)) - cy_as_usb_ack_setup_packet(h, - usb_ack_callback, 0); - } -} - - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c deleted file mode 100644 index dd4cd41..0000000 --- a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c +++ /dev/null @@ -1,2441 +0,0 @@ -/* Cypress WestBridge OMAP3430 Kernel Hal source file (cyashalomap_kernel.c) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor, -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -/* include seems broken moving for patch submission - * #include - * #include - * #include - * #include - * #include - * #include - * #include - * #include - * #include - */ -#include -#include -#include "../plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h" -#include "../plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_kernel.h" -#include "../plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h" -#include "../../../include/linux/westbridge/cyaserr.h" -#include "../../../include/linux/westbridge/cyasregs.h" -#include "../../../include/linux/westbridge/cyasdma.h" -#include "../../../include/linux/westbridge/cyasintr.h" - -#define HAL_REV "1.1.0" - -/* - * uncomment to enable 16bit pnand interface - */ -#define PNAND_16BIT_MODE - -/* - * selects one of 3 versions of pnand_lbd_read() - * PNAND_LBD_READ_NO_PFE - original 8/16 bit code - * reads through the gpmc CONTROLLER REGISTERS - * ENABLE_GPMC_PF_ENGINE - USES GPMC PFE FIFO reads, in 8 bit mode, - * same speed as the above - * PFE_LBD_READ_V2 - slightly diffrenet, performance same as above - */ -#define PNAND_LBD_READ_NO_PFE -/* #define ENABLE_GPMC_PF_ENGINE */ -/* #define PFE_LBD_READ_V2 */ - -/* - * westbrige astoria ISR options to limit number of - * back to back DMA transfers per ISR interrupt - */ -#define MAX_DRQ_LOOPS_IN_ISR 4 - -/* - * debug prints enabling - *#define DBGPRN_ENABLED - *#define DBGPRN_DMA_SETUP_RD - *#define DBGPRN_DMA_SETUP_WR - */ - - -/* - * For performance reasons, we handle storage endpoint transfers up to 4 KB - * within the HAL itself. - */ - #define CYASSTORAGE_WRITE_EP_NUM (4) - #define CYASSTORAGE_READ_EP_NUM (8) - -/* - * size of DMA packet HAL can accept from Storage API - * HAL will fragment it into smaller chunks that the P port can accept - */ -#define CYASSTORAGE_MAX_XFER_SIZE (2*32768) - -/* - * P port MAX DMA packet size according to interface/ep configurartion - */ -#define HAL_DMA_PKT_SZ 512 - -#define is_storage_e_p(ep) (((ep) == 2) || ((ep) == 4) || \ - ((ep) == 6) || ((ep) == 8)) - -/* - * persistent, stores current GPMC interface cfg mode - */ -static uint8_t pnand_16bit; - -/* - * keep processing new WB DRQ in ISR until all handled (performance feature) - */ -#define PROCESS_MULTIPLE_DRQ_IN_ISR (1) - - -/* - * ASTORIA PNAND IF COMMANDS, CASDO - READ, CASDI - WRITE - */ -#define CASDO 0x05 -#define CASDI 0x85 -#define RDPAGE_B1 0x00 -#define RDPAGE_B2 0x30 -#define PGMPAGE_B1 0x80 -#define PGMPAGE_B2 0x10 - -/* - * The type of DMA operation, per endpoint - */ -typedef enum cy_as_hal_dma_type { - cy_as_hal_read, - cy_as_hal_write, - cy_as_hal_none -} cy_as_hal_dma_type; - - -/* - * SG list halpers defined in scaterlist.h -#define sg_is_chain(sg) ((sg)->page_link & 0x01) -#define sg_is_last(sg) ((sg)->page_link & 0x02) -#define sg_chain_ptr(sg) \ - ((struct scatterlist *) ((sg)->page_link & ~0x03)) -*/ -typedef struct cy_as_hal_endpoint_dma { - cy_bool buffer_valid; - uint8_t *data_p; - uint32_t size; - /* - * sg_list_enabled - if true use, r/w DMA transfers use sg list, - * FALSE use pointer to a buffer - * sg_p - pointer to the owner's sg list, of there is such - * (like blockdriver) - * dma_xfer_sz - size of the next dma xfer on P port - * seg_xfer_cnt - counts xfered bytes for in current sg_list - * memory segment - * req_xfer_cnt - total number of bytes transferred so far in - * current request - * req_length - total request length - */ - bool sg_list_enabled; - struct scatterlist *sg_p; - uint16_t dma_xfer_sz; - uint32_t seg_xfer_cnt; - uint16_t req_xfer_cnt; - uint16_t req_length; - cy_as_hal_dma_type type; - cy_bool pending; -} cy_as_hal_endpoint_dma; - -/* - * The list of OMAP devices (should be one) - */ -static cy_as_omap_dev_kernel *m_omap_list_p; - -/* - * The callback to call after DMA operations are complete - */ -static cy_as_hal_dma_complete_callback callback; - -/* - * Pending data size for the endpoints - */ -static cy_as_hal_endpoint_dma end_points[16]; - -/* - * Forward declaration - */ -static void cy_handle_d_r_q_interrupt(cy_as_omap_dev_kernel *dev_p); - -static uint16_t intr_sequence_num; -static uint8_t intr__enable; -spinlock_t int_lock; - -static u32 iomux_vma; -static u32 csa_phy; - -/* - * gpmc I/O registers VMA - */ -static u32 gpmc_base; - -/* - * gpmc data VMA associated with CS4 (ASTORIA CS on GPMC) - */ -static u32 gpmc_data_vma; -static u32 ndata_reg_vma; -static u32 ncmd_reg_vma; -static u32 naddr_reg_vma; - -/* - * fwd declarations - */ -static void p_nand_lbd_read(u16 col_addr, u32 row_addr, u16 count, void *buff); -static void p_nand_lbd_write(u16 col_addr, u32 row_addr, u16 count, void *buff); -static inline u16 __attribute__((always_inline)) - ast_p_nand_casdo_read(u8 reg_addr8); -static inline void __attribute__((always_inline)) - ast_p_nand_casdi_write(u8 reg_addr8, u16 data); - -/* - * prints given number of omap registers - */ -static void cy_as_hal_print_omap_regs(char *name_prefix, - u8 name_base, u32 virt_base, u16 count) -{ - u32 reg_val, reg_addr; - u16 i; - cy_as_hal_print_message(KERN_INFO "\n"); - for (i = 0; i < count; i++) { - - reg_addr = virt_base + (i*4); - /* use virtual addresses here*/ - reg_val = __raw_readl(reg_addr); - cy_as_hal_print_message(KERN_INFO "%s_%d[%8.8x]=%8.8x\n", - name_prefix, name_base+i, - reg_addr, reg_val); - } -} - -/* - * setMUX function for a pad + additional pad flags - */ -static u16 omap_cfg_reg_L(u32 pad_func_index) -{ - static u8 sanity_check = 1; - - u32 reg_vma; - u16 cur_val, wr_val, rdback_val; - - /* - * do sanity check on the omap_mux_pin_cfg[] table - */ - cy_as_hal_print_message(KERN_INFO" OMAP pins user_pad cfg "); - if (sanity_check) { - if ((omap_mux_pin_cfg[END_OF_TABLE].name[0] == 'E') && - (omap_mux_pin_cfg[END_OF_TABLE].name[1] == 'N') && - (omap_mux_pin_cfg[END_OF_TABLE].name[2] == 'D')) { - - cy_as_hal_print_message(KERN_INFO - "table is good.\n"); - } else { - cy_as_hal_print_message(KERN_WARNING - "table is bad, fix it"); - } - /* - * do it only once - */ - sanity_check = 0; - } - - /* - * get virtual address to the PADCNF_REG - */ - reg_vma = (u32)iomux_vma + omap_mux_pin_cfg[pad_func_index].offset; - - /* - * add additional USER PU/PD/EN flags - */ - wr_val = omap_mux_pin_cfg[pad_func_index].mux_val; - cur_val = IORD16(reg_vma); - - /* - * PADCFG regs 16 bit long, packed into 32 bit regs, - * can also be accessed as u16 - */ - IOWR16(reg_vma, wr_val); - rdback_val = IORD16(reg_vma); - - /* - * in case if the caller wants to save the old value - */ - return wr_val; -} - -#define BLKSZ_4K 0x1000 - -/* - * switch GPMC DATA bus mode - */ -void cy_as_hal_gpmc_enable_16bit_bus(bool dbus16_enabled) -{ - uint32_t tmp32; - - /* - * disable gpmc CS4 operation 1st - */ - tmp32 = gpmc_cs_read_reg(AST_GPMC_CS, - GPMC_CS_CONFIG7) & ~GPMC_CONFIG7_CSVALID; - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32); - - /* - * GPMC NAND data bus can be 8 or 16 bit wide - */ - if (dbus16_enabled) { - DBGPRN("enabling 16 bit bus\n"); - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1, - (GPMC_CONFIG1_DEVICETYPE(2) | - GPMC_CONFIG1_WAIT_PIN_SEL(2) | - GPMC_CONFIG1_DEVICESIZE_16) - ); - } else { - DBGPRN(KERN_INFO "enabling 8 bit bus\n"); - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1, - (GPMC_CONFIG1_DEVICETYPE(2) | - GPMC_CONFIG1_WAIT_PIN_SEL(2)) - ); - } - - /* - * re-enable astoria CS operation on GPMC - */ - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, - (tmp32 | GPMC_CONFIG7_CSVALID)); - - /* - *remember the state - */ - pnand_16bit = dbus16_enabled; -} - -static int cy_as_hal_gpmc_init(void) -{ - u32 tmp32; - int err; - struct gpmc_timings timings; - - gpmc_base = (u32)ioremap_nocache(OMAP34XX_GPMC_BASE, BLKSZ_4K); - DBGPRN(KERN_INFO "kernel has gpmc_base=%x , val@ the base=%x", - gpmc_base, __raw_readl(gpmc_base) - ); - - /* - * these are globals are full VMAs of the gpmc_base above - */ - ncmd_reg_vma = GPMC_VMA(AST_GPMC_NAND_CMD); - naddr_reg_vma = GPMC_VMA(AST_GPMC_NAND_ADDR); - ndata_reg_vma = GPMC_VMA(AST_GPMC_NAND_DATA); - - /* - * request GPMC CS for ASTORIA request - */ - if (gpmc_cs_request(AST_GPMC_CS, SZ_16M, (void *)&csa_phy) < 0) { - cy_as_hal_print_message(KERN_ERR "error failed to request" - "ncs4 for ASTORIA\n"); - return -1; - } else { - DBGPRN(KERN_INFO "got phy_addr:%x for " - "GPMC CS%d GPMC_CFGREG7[CS4]\n", - csa_phy, AST_GPMC_CS); - } - - /* - * request VM region for 4K addr space for chip select 4 phy address - * technically we don't need it for NAND devices, but do it anyway - * so that data read/write bus cycle can be triggered by reading - * or writing this mem region - */ - if (!request_mem_region(csa_phy, BLKSZ_4K, "AST_OMAP_HAL")) { - err = -EBUSY; - cy_as_hal_print_message(KERN_ERR "error MEM region " - "request for phy_addr:%x failed\n", - csa_phy); - goto out_free_cs; - } - - /* - * REMAP mem region associated with our CS - */ - gpmc_data_vma = (u32)ioremap_nocache(csa_phy, BLKSZ_4K); - if (!gpmc_data_vma) { - err = -ENOMEM; - cy_as_hal_print_message(KERN_ERR "error- ioremap()" - "for phy_addr:%x failed", csa_phy); - - goto out_release_mem_region; - } - cy_as_hal_print_message(KERN_INFO "ioremap(%x) returned vma=%x\n", - csa_phy, gpmc_data_vma); - - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1, - (GPMC_CONFIG1_DEVICETYPE(2) | - GPMC_CONFIG1_WAIT_PIN_SEL(2))); - - memset(&timings, 0, sizeof(timings)); - - /* cs timing */ - timings.cs_on = WB_GPMC_CS_t_o_n; - timings.cs_wr_off = WB_GPMC_BUSCYC_t; - timings.cs_rd_off = WB_GPMC_BUSCYC_t; - - /* adv timing */ - timings.adv_on = WB_GPMC_ADV_t_o_n; - timings.adv_rd_off = WB_GPMC_BUSCYC_t; - timings.adv_wr_off = WB_GPMC_BUSCYC_t; - - /* oe timing */ - timings.oe_on = WB_GPMC_OE_t_o_n; - timings.oe_off = WB_GPMC_OE_t_o_f_f; - timings.access = WB_GPMC_RD_t_a_c_c; - timings.rd_cycle = WB_GPMC_BUSCYC_t; - - /* we timing */ - timings.we_on = WB_GPMC_WE_t_o_n; - timings.we_off = WB_GPMC_WE_t_o_f_f; - timings.wr_access = WB_GPMC_WR_t_a_c_c; - timings.wr_cycle = WB_GPMC_BUSCYC_t; - - timings.page_burst_access = WB_GPMC_BUSCYC_t; - timings.wr_data_mux_bus = WB_GPMC_BUSCYC_t; - gpmc_cs_set_timings(AST_GPMC_CS, &timings); - - cy_as_hal_print_omap_regs("GPMC_CONFIG", 1, - GPMC_VMA(GPMC_CFG_REG(1, AST_GPMC_CS)), 7); - - /* - * DISABLE cs4, NOTE GPMC REG7 is already configured - * at this point by gpmc_cs_request - */ - tmp32 = gpmc_cs_read_reg(AST_GPMC_CS, GPMC_CS_CONFIG7) & - ~GPMC_CONFIG7_CSVALID; - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32); - - /* - * PROGRAM chip select Region, (see OMAP3430 TRM PAGE 1088) - */ - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, - (AS_CS_MASK | AS_CS_BADDR)); - - /* - * by default configure GPMC into 8 bit mode - * (to match astoria default mode) - */ - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1, - (GPMC_CONFIG1_DEVICETYPE(2) | - GPMC_CONFIG1_WAIT_PIN_SEL(2))); - - /* - * ENABLE astoria cs operation on GPMC - */ - gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, - (tmp32 | GPMC_CONFIG7_CSVALID)); - - /* - * No method currently exists to write this register through GPMC APIs - * need to change WAIT2 polarity - */ - tmp32 = IORD32(GPMC_VMA(GPMC_CONFIG_REG)); - tmp32 = tmp32 | NAND_FORCE_POSTED_WRITE_B | 0x40; - IOWR32(GPMC_VMA(GPMC_CONFIG_REG), tmp32); - - tmp32 = IORD32(GPMC_VMA(GPMC_CONFIG_REG)); - cy_as_hal_print_message("GPMC_CONFIG_REG=0x%x\n", tmp32); - - return 0; - -out_release_mem_region: - release_mem_region(csa_phy, BLKSZ_4K); - -out_free_cs: - gpmc_cs_free(AST_GPMC_CS); - - return err; -} - -/* - * west bridge astoria ISR (Interrupt handler) - */ -static irqreturn_t cy_astoria_int_handler(int irq, - void *dev_id, struct pt_regs *regs) -{ - cy_as_omap_dev_kernel *dev_p; - uint16_t read_val = 0; - uint16_t mask_val = 0; - - /* - * debug stuff, counts number of loops per one intr trigger - */ - uint16_t drq_loop_cnt = 0; - uint8_t irq_pin; - /* - * flags to watch - */ - const uint16_t sentinel = (CY_AS_MEM_P0_INTR_REG_MCUINT | - CY_AS_MEM_P0_INTR_REG_MBINT | - CY_AS_MEM_P0_INTR_REG_PMINT | - CY_AS_MEM_P0_INTR_REG_PLLLOCKINT); - - /* - * sample IRQ pin level (just for statistics) - */ - irq_pin = __gpio_get_value(AST_INT); - - /* - * this one just for debugging - */ - intr_sequence_num++; - - /* - * astoria device handle - */ - dev_p = dev_id; - - /* - * read Astoria intr register - */ - read_val = cy_as_hal_read_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INTR_REG); - - /* - * save current mask value - */ - mask_val = cy_as_hal_read_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INT_MASK_REG); - - DBGPRN("<1>HAL__intr__enter:_seq:%d, P0_INTR_REG:%x\n", - intr_sequence_num, read_val); - - /* - * Disable WB interrupt signal generation while we are in ISR - */ - cy_as_hal_write_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INT_MASK_REG, 0x0000); - - /* - * this is a DRQ Interrupt - */ - if (read_val & CY_AS_MEM_P0_INTR_REG_DRQINT) { - - do { - /* - * handle DRQ interrupt - */ - drq_loop_cnt++; - - cy_handle_d_r_q_interrupt(dev_p); - - /* - * spending to much time in ISR may impact - * average system performance - */ - if (drq_loop_cnt >= MAX_DRQ_LOOPS_IN_ISR) - break; - - /* - * Keep processing if there is another DRQ int flag - */ - } while (cy_as_hal_read_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INTR_REG) & - CY_AS_MEM_P0_INTR_REG_DRQINT); - } - - if (read_val & sentinel) - cy_as_intr_service_interrupt((cy_as_hal_device_tag)dev_p); - - DBGPRN("<1>_hal:_intr__exit seq:%d, mask=%4.4x," - "int_pin:%d DRQ_jobs:%d\n", - intr_sequence_num, - mask_val, - irq_pin, - drq_loop_cnt); - - /* - * re-enable WB hw interrupts - */ - cy_as_hal_write_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INT_MASK_REG, mask_val); - - return IRQ_HANDLED; -} - -static int cy_as_hal_configure_interrupts(void *dev_p) -{ - int result; - int irq_pin = AST_INT; - - irq_set_irq_type(OMAP_GPIO_IRQ(irq_pin), IRQ_TYPE_LEVEL_LOW); - - /* - * for shared IRQS must provide non NULL device ptr - * othervise the int won't register - * */ - result = request_irq(OMAP_GPIO_IRQ(irq_pin), - (irq_handler_t)cy_astoria_int_handler, - IRQF_SHARED, "AST_INT#", dev_p); - - if (result == 0) { - /* - * OMAP_GPIO_IRQ(irq_pin) - omap logical IRQ number - * assigned to this interrupt - * OMAP_GPIO_BIT(AST_INT, GPIO_IRQENABLE1) - print status - * of AST_INT GPIO IRQ_ENABLE FLAG - */ - cy_as_hal_print_message(KERN_INFO"AST_INT omap_pin:" - "%d assigned IRQ #%d IRQEN1=%d\n", - irq_pin, - OMAP_GPIO_IRQ(irq_pin), - OMAP_GPIO_BIT(AST_INT, GPIO_IRQENABLE1) - ); - } else { - cy_as_hal_print_message("cyasomaphal: interrupt " - "failed to register\n"); - gpio_free(irq_pin); - cy_as_hal_print_message(KERN_WARNING - "ASTORIA: can't get assigned IRQ" - "%i for INT#\n", OMAP_GPIO_IRQ(irq_pin)); - } - - return result; -} - -/* - * initialize OMAP pads/pins to user defined functions - */ -static void cy_as_hal_init_user_pads(user_pad_cfg_t *pad_cfg_tab) -{ - /* - * browse through the table an dinitiaze the pins - */ - u32 in_level = 0; - u16 tmp16, mux_val; - - while (pad_cfg_tab->name != NULL) { - - if (gpio_request(pad_cfg_tab->pin_num, NULL) == 0) { - - pad_cfg_tab->valid = 1; - mux_val = omap_cfg_reg_L(pad_cfg_tab->mux_func); - - /* - * always set drv level before changing out direction - */ - __gpio_set_value(pad_cfg_tab->pin_num, - pad_cfg_tab->drv); - - /* - * "0" - OUT, "1", input omap_set_gpio_direction - * (pad_cfg_tab->pin_num, pad_cfg_tab->dir); - */ - if (pad_cfg_tab->dir) - gpio_direction_input(pad_cfg_tab->pin_num); - else - gpio_direction_output(pad_cfg_tab->pin_num, - pad_cfg_tab->drv); - - /* sample the pin */ - in_level = __gpio_get_value(pad_cfg_tab->pin_num); - - cy_as_hal_print_message(KERN_INFO "configured %s to " - "OMAP pad_%d, DIR=%d " - "DOUT=%d, DIN=%d\n", - pad_cfg_tab->name, - pad_cfg_tab->pin_num, - pad_cfg_tab->dir, - pad_cfg_tab->drv, - in_level - ); - } else { - /* - * get the pad_mux value to check on the pin_function - */ - cy_as_hal_print_message(KERN_INFO "couldn't cfg pin %d" - "for signal %s, its already taken\n", - pad_cfg_tab->pin_num, - pad_cfg_tab->name); - } - - tmp16 = *(u16 *)PADCFG_VMA - (omap_mux_pin_cfg[pad_cfg_tab->mux_func].offset); - - cy_as_hal_print_message(KERN_INFO "GPIO_%d(PAD_CFG=%x,OE=%d" - "DOUT=%d, DIN=%d IRQEN=%d)\n\n", - pad_cfg_tab->pin_num, tmp16, - OMAP_GPIO_BIT(pad_cfg_tab->pin_num, GPIO_OE), - OMAP_GPIO_BIT(pad_cfg_tab->pin_num, GPIO_DATA_OUT), - OMAP_GPIO_BIT(pad_cfg_tab->pin_num, GPIO_DATA_IN), - OMAP_GPIO_BIT(pad_cfg_tab->pin_num, GPIO_IRQENABLE1) - ); - - /* - * next pad_cfg deriptor - */ - pad_cfg_tab++; - } - - cy_as_hal_print_message(KERN_INFO"pads configured\n"); -} - - -/* - * release gpios taken by the module - */ -static void cy_as_hal_release_user_pads(user_pad_cfg_t *pad_cfg_tab) -{ - while (pad_cfg_tab->name != NULL) { - - if (pad_cfg_tab->valid) { - gpio_free(pad_cfg_tab->pin_num); - pad_cfg_tab->valid = 0; - cy_as_hal_print_message(KERN_INFO "GPIO_%d " - "released from %s\n", - pad_cfg_tab->pin_num, - pad_cfg_tab->name); - } else { - cy_as_hal_print_message(KERN_INFO "no release " - "for %s, GPIO_%d, wasn't acquired\n", - pad_cfg_tab->name, - pad_cfg_tab->pin_num); - } - pad_cfg_tab++; - } -} - -void cy_as_hal_config_c_s_mux(void) -{ - /* - * FORCE the GPMC CS4 pin (it is in use by the zoom system) - */ - omap_cfg_reg_L(T8_OMAP3430_GPMC_n_c_s4); -} -EXPORT_SYMBOL(cy_as_hal_config_c_s_mux); - -/* - * inits all omap h/w - */ -uint32_t cy_as_hal_processor_hw_init(void) -{ - int i, err; - - cy_as_hal_print_message(KERN_INFO "init OMAP3430 hw...\n"); - - iomux_vma = (u32)ioremap_nocache( - (u32)CTLPADCONF_BASE_ADDR, CTLPADCONF_SIZE); - cy_as_hal_print_message(KERN_INFO "PADCONF_VMA=%x val=%x\n", - iomux_vma, IORD32(iomux_vma)); - - /* - * remap gpio banks - */ - for (i = 0; i < 6; i++) { - gpio_vma_tab[i].virt_addr = (u32)ioremap_nocache( - gpio_vma_tab[i].phy_addr, - gpio_vma_tab[i].size); - - cy_as_hal_print_message(KERN_INFO "%s virt_addr=%x\n", - gpio_vma_tab[i].name, - (u32)gpio_vma_tab[i].virt_addr); - } - - /* - * force OMAP_GPIO_126 to rleased state, - * will be configured to drive reset - */ - gpio_free(AST_RESET); - - /* - *same thing with AStoria CS pin - */ - gpio_free(AST_CS); - - /* - * initialize all the OMAP pads connected to astoria - */ - cy_as_hal_init_user_pads(user_pad_cfg); - - err = cy_as_hal_gpmc_init(); - if (err < 0) - cy_as_hal_print_message(KERN_INFO"gpmc init failed:%d", err); - - cy_as_hal_config_c_s_mux(); - - return gpmc_data_vma; -} -EXPORT_SYMBOL(cy_as_hal_processor_hw_init); - -void cy_as_hal_omap_hardware_deinit(cy_as_omap_dev_kernel *dev_p) -{ - /* - * free omap hw resources - */ - if (gpmc_data_vma != 0) - iounmap((void *)gpmc_data_vma); - - if (csa_phy != 0) - release_mem_region(csa_phy, BLKSZ_4K); - - gpmc_cs_free(AST_GPMC_CS); - - free_irq(OMAP_GPIO_IRQ(AST_INT), dev_p); - - cy_as_hal_release_user_pads(user_pad_cfg); -} - -/* - * These are the functions that are not part of the - * HAL layer, but are required to be called for this HAL - */ - -/* - * Called On AstDevice LKM exit - */ -int stop_o_m_a_p_kernel(const char *pgm, cy_as_hal_device_tag tag) -{ - cy_as_omap_dev_kernel *dev_p = (cy_as_omap_dev_kernel *)tag; - - /* - * TODO: Need to disable WB interrupt handlere 1st - */ - if (0 == dev_p) - return 1; - - cy_as_hal_print_message("<1>_stopping OMAP34xx HAL layer object\n"); - if (dev_p->m_sig != CY_AS_OMAP_KERNEL_HAL_SIG) { - cy_as_hal_print_message("<1>%s: %s: bad HAL tag\n", - pgm, __func__); - return 1; - } - - /* - * disable interrupt - */ - cy_as_hal_write_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INT_MASK_REG, 0x0000); - -#if 0 - if (dev_p->thread_flag == 0) { - dev_p->thread_flag = 1; - wait_for_completion(&dev_p->thread_complete); - cy_as_hal_print_message("cyasomaphal:" - "done cleaning thread\n"); - cy_as_hal_destroy_sleep_channel(&dev_p->thread_sc); - } -#endif - - cy_as_hal_omap_hardware_deinit(dev_p); - - /* - * Rearrange the list - */ - if (m_omap_list_p == dev_p) - m_omap_list_p = dev_p->m_next_p; - - cy_as_hal_free(dev_p); - - cy_as_hal_print_message(KERN_INFO"OMAP_kernel_hal stopped\n"); - return 0; -} - -int omap_start_intr(cy_as_hal_device_tag tag) -{ - cy_as_omap_dev_kernel *dev_p = (cy_as_omap_dev_kernel *)tag; - int ret = 0; - const uint16_t mask = CY_AS_MEM_P0_INTR_REG_DRQINT | - CY_AS_MEM_P0_INTR_REG_MBINT; - - /* - * register for interrupts - */ - ret = cy_as_hal_configure_interrupts(dev_p); - - /* - * enable only MBox & DRQ interrupts for now - */ - cy_as_hal_write_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_INT_MASK_REG, mask); - - return 1; -} - -/* - * Below are the functions that communicate with the WestBridge device. - * These are system dependent and must be defined by the HAL layer - * for a given system. - */ - -/* - * GPMC NAND command+addr write phase - */ -static inline void nand_cmd_n_addr(u8 cmdb1, u16 col_addr, u32 row_addr) -{ - /* - * byte order on the bus - */ - u32 tmpa32 = ((row_addr << 16) | col_addr); - u8 RA2 = (u8)(row_addr >> 16); - - if (!pnand_16bit) { - /* - * GPMC PNAND 8bit BUS - */ - /* - * CMD1 - */ - IOWR8(ncmd_reg_vma, cmdb1); - - /* - *pnand bus: - */ - IOWR32(naddr_reg_vma, tmpa32); - - /* - * , always zero - */ - IOWR8(naddr_reg_vma, RA2); - - } else { - /* - * GPMC PNAND 16bit BUS , in 16 bit mode CMD - * and ADDR sent on [d7..d0] - */ - uint8_t CA0, CA1, RA0, RA1; - CA0 = tmpa32 & 0x000000ff; - CA1 = (tmpa32 >> 8) & 0x000000ff; - RA0 = (tmpa32 >> 16) & 0x000000ff; - RA1 = (tmpa32 >> 24) & 0x000000ff; - - /* - * can't use 32 bit writes here omap will not serialize - * them to lower half in16 bit mode - */ - - /* - *pnand bus: - */ - IOWR8(ncmd_reg_vma, cmdb1); - IOWR8(naddr_reg_vma, CA0); - IOWR8(naddr_reg_vma, CA1); - IOWR8(naddr_reg_vma, RA0); - IOWR8(naddr_reg_vma, RA1); - IOWR8(naddr_reg_vma, RA2); - } -} - -/* - * spin until r/b goes high - */ -inline int wait_rn_b_high(void) -{ - u32 w_spins = 0; - - /* - * TODO: note R/b may go low here, need to spin until high - * while (omap_get_gpio_datain(AST_RnB) == 0) { - * w_spins++; - * } - * if (OMAP_GPIO_BIT(AST_RnB, GPIO_DATA_IN) == 0) { - * - * while (OMAP_GPIO_BIT(AST_RnB, GPIO_DATA_IN) == 0) { - * w_spins++; - * } - * printk("<1>RnB=0!:%d\n",w_spins); - * } - */ - return w_spins; -} - -#ifdef ENABLE_GPMC_PF_ENGINE -/* #define PFE_READ_DEBUG - * PNAND block read with OMAP PFE enabled - * status: Not tested, NW, broken , etc - */ -static void p_nand_lbd_read(u16 col_addr, u32 row_addr, u16 count, void *buff) -{ - uint16_t w32cnt; - uint32_t *ptr32; - uint8_t *ptr8; - uint8_t bytes_in_fifo; - - /* debug vars*/ -#ifdef PFE_READ_DEBUG - uint32_t loop_limit; - uint16_t bytes_read = 0; -#endif - - /* - * configure the prefetch engine - */ - uint32_t tmp32; - uint32_t pfe_status; - - /* - * DISABLE GPMC CS4 operation 1st, this is - * in case engine is be already disabled - */ - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONTROL), 0x0); - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONFIG1), GPMC_PREFETCH_CONFIG1_VAL); - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONFIG2), count); - -#ifdef PFE_READ_DEBUG - tmp32 = IORD32(GPMC_VMA(GPMC_PREFETCH_CONFIG1)); - if (tmp32 != GPMC_PREFETCH_CONFIG1_VAL) { - printk(KERN_INFO "<1> prefetch is CONFIG1 read val:%8.8x, != VAL written:%8.8x\n", - tmp32, GPMC_PREFETCH_CONFIG1_VAL); - tmp32 = IORD32(GPMC_VMA(GPMC_PREFETCH_STATUS)); - printk(KERN_INFO "<1> GPMC_PREFETCH_STATUS : %8.8x\n", tmp32); - } - - /* - *sanity check 2 - */ - tmp32 = IORD32(GPMC_VMA(GPMC_PREFETCH_CONFIG2)); - if (tmp32 != (count)) - printk(KERN_INFO "<1> GPMC_PREFETCH_CONFIG2 read val:%d, " - "!= VAL written:%d\n", tmp32, count); -#endif - - /* - * ISSUE PNAND CMD+ADDR, note gpmc puts 32b words - * on the bus least sig. byte 1st - */ - nand_cmd_n_addr(RDPAGE_B1, col_addr, row_addr); - - IOWR8(ncmd_reg_vma, RDPAGE_B2); - - /* - * start the prefetch engine - */ - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONTROL), 0x1); - - ptr32 = buff; - - while (1) { - /* - * GPMC PFE service loop - */ - do { - /* - * spin until PFE fetched some - * PNAND bus words in the FIFO - */ - pfe_status = IORD32(GPMC_VMA(GPMC_PREFETCH_STATUS)); - bytes_in_fifo = (pfe_status >> 24) & 0x7f; - } while (bytes_in_fifo == 0); - - /* whole 32 bit words in fifo */ - w32cnt = bytes_in_fifo >> 2; - -#if 0 - /* - *NOTE: FIFO_PTR indicates number of NAND bus words bytes - * already received in the FIFO and available to be read - * by DMA or MPU whether COUNTVAL indicates number of BUS - * words yet to be read from PNAND bus words - */ - printk(KERN_ERR "<1> got PF_STATUS:%8.8x FIFO_PTR:%d, COUNTVAL:%d, w32cnt:%d\n", - pfe_status, bytes_in_fifo, - (pfe_status & 0x3fff), w32cnt); -#endif - - while (w32cnt--) - *ptr32++ = IORD32(gpmc_data_vma); - - if ((pfe_status & 0x3fff) == 0) { - /* - * PFE acc angine done, there still may be data leftover - * in the FIFO re-read FIFO BYTE counter (check for - * leftovers from 32 bit read accesses above) - */ - bytes_in_fifo = (IORD32( - GPMC_VMA(GPMC_PREFETCH_STATUS)) >> 24) & 0x7f; - - /* - * NOTE we may still have one word left in the fifo - * read it out - */ - ptr8 = ptr32; - switch (bytes_in_fifo) { - - case 0: - /* - * nothing to do we already read the - * FIFO out with 32 bit accesses - */ - break; - case 1: - /* - * this only possible - * for 8 bit pNAND only - */ - *ptr8 = IORD8(gpmc_data_vma); - break; - - case 2: - /* - * this one can occur in either modes - */ - *(uint16_t *)ptr8 = IORD16(gpmc_data_vma); - break; - - case 3: - /* - * this only possible for 8 bit pNAND only - */ - *(uint16_t *)ptr8 = IORD16(gpmc_data_vma); - ptr8 += 2; - *ptr8 = IORD8(gpmc_data_vma); - break; - - case 4: - /* - * shouldn't happen, but has been seen - * in 8 bit mode - */ - *ptr32 = IORD32(gpmc_data_vma); - break; - - default: - printk(KERN_ERR"<1>_error: PFE FIFO bytes leftover is not read:%d\n", - bytes_in_fifo); - break; - } - /* - * read is completed, get out of the while(1) loop - */ - break; - } - } -} -#endif - -#ifdef PFE_LBD_READ_V2 -/* - * PFE engine assisted reads with the 64 byte blocks - */ -static void p_nand_lbd_read(u16 col_addr, u32 row_addr, u16 count, void *buff) -{ - uint8_t rd_cnt; - uint32_t *ptr32; - uint8_t *ptr8; - uint16_t reminder; - uint32_t pfe_status; - - /* - * ISSUE PNAND CMD+ADDR - * note gpmc puts 32b words on the bus least sig. byte 1st - */ - nand_cmd_n_addr(RDPAGE_B1, col_addr, row_addr); - IOWR8(ncmd_reg_vma, RDPAGE_B2); - - /* - * setup PFE block - * count - OMAP number of bytes to access on pnand bus - */ - - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONFIG1), GPMC_PREFETCH_CONFIG1_VAL); - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONFIG2), count); - IOWR32(GPMC_VMA(GPMC_PREFETCH_CONTROL), 0x1); - - ptr32 = buff; - - do { - pfe_status = IORD32(GPMC_VMA(GPMC_PREFETCH_STATUS)); - rd_cnt = pfe_status >> (24+2); - - while (rd_cnt--) - *ptr32++ = IORD32(gpmc_data_vma); - - } while (pfe_status & 0x3fff); - - /* - * read out the leftover - */ - ptr8 = ptr32; - rd_cnt = (IORD32(GPMC_VMA(GPMC_PREFETCH_STATUS)) >> 24) & 0x7f; - - while (rd_cnt--) - *ptr8++ = IORD8(gpmc_data_vma); -} -#endif - -#ifdef PNAND_LBD_READ_NO_PFE -/* - * Endpoint buffer read w/o OMAP GPMC Prefetch Engine - * the original working code, works at max speed for 8 bit xfers - * for 16 bit the bus diagram has gaps - */ -static void p_nand_lbd_read(u16 col_addr, u32 row_addr, u16 count, void *buff) -{ - uint16_t w32cnt; - uint32_t *ptr32; - uint16_t *ptr16; - uint16_t remainder; - - DBGPRN("<1> %s(): NO_PFE\n", __func__); - - ptr32 = buff; - /* number of whole 32 bit words in the transfer */ - w32cnt = count >> 2; - - /* remainder, in bytes(0..3) */ - remainder = count & 03; - - /* - * note gpmc puts 32b words on the bus least sig. byte 1st - */ - nand_cmd_n_addr(RDPAGE_B1, col_addr, row_addr); - IOWR8(ncmd_reg_vma, RDPAGE_B2); - - /* - * read data by 32 bit chunks - */ - while (w32cnt--) - *ptr32++ = IORD32(ndata_reg_vma); - - /* - * now do the remainder(it can be 0, 1, 2 or 3) - * same code for both 8 & 16 bit bus - * do 1 or 2 MORE words - */ - ptr16 = (uint16_t *)ptr32; - - switch (remainder) { - case 1: - /* read one 16 bit word - * IN 8 BIT WE NEED TO READ even number of bytes - */ - case 2: - *ptr16 = IORD16(ndata_reg_vma); - break; - case 3: - /* - * for 3 bytes read 2 16 bit words - */ - *ptr16++ = IORD16(ndata_reg_vma); - *ptr16 = IORD16(ndata_reg_vma); - break; - default: - /* - * remainder is 0 - */ - break; - } -} -#endif - -/* - * uses LBD mode to write N bytes into astoria - * Status: Working, however there are 150ns idle - * timeafter every 2 (16 bit or 4(8 bit) bus cycles - */ -static void p_nand_lbd_write(u16 col_addr, u32 row_addr, u16 count, void *buff) -{ - uint16_t w32cnt; - uint16_t remainder; - uint8_t *ptr8; - uint16_t *ptr16; - uint32_t *ptr32; - - remainder = count & 03; - w32cnt = count >> 2; - ptr32 = buff; - ptr8 = buff; - - /* - * send: CMDB1, CA0,CA1,RA0,RA1,RA2 - */ - nand_cmd_n_addr(PGMPAGE_B1, col_addr, row_addr); - - /* - * blast the data out in 32bit chunks - */ - while (w32cnt--) - IOWR32(ndata_reg_vma, *ptr32++); - - /* - * do the reminder if there is one - * same handling for both 8 & 16 bit pnand: mode - */ - ptr16 = (uint16_t *)ptr32; /* do 1 or 2 words */ - - switch (remainder) { - case 1: - /* - * read one 16 bit word - */ - case 2: - IOWR16(ndata_reg_vma, *ptr16); - break; - - case 3: - /* - * for 3 bytes read 2 16 bit words - */ - IOWR16(ndata_reg_vma, *ptr16++); - IOWR16(ndata_reg_vma, *ptr16); - break; - default: - /* - * reminder is 0 - */ - break; - } - /* - * finally issue a PGM cmd - */ - IOWR8(ncmd_reg_vma, PGMPAGE_B2); -} - -/* - * write Astoria register - */ -static inline void ast_p_nand_casdi_write(u8 reg_addr8, u16 data) -{ - unsigned long flags; - u16 addr16; - /* - * throw an error if called from multiple threads - */ - static atomic_t rdreg_usage_cnt = { 0 }; - - /* - * disable interrupts - */ - local_irq_save(flags); - - if (atomic_read(&rdreg_usage_cnt) != 0) { - cy_as_hal_print_message(KERN_ERR "cy_as_omap_hal:" - "* cy_as_hal_write_register usage:%d\n", - atomic_read(&rdreg_usage_cnt)); - } - - atomic_inc(&rdreg_usage_cnt); - - /* - * 2 flavors of GPMC -> PNAND access - */ - if (pnand_16bit) { - /* - * 16 BIT gpmc NAND mode - */ - - /* - * CMD1, CA1, CA2, - */ - IOWR8(ncmd_reg_vma, 0x85); - IOWR8(naddr_reg_vma, reg_addr8); - IOWR8(naddr_reg_vma, 0x0c); - - /* - * this should be sent on the 16 bit bus - */ - IOWR16(ndata_reg_vma, data); - } else { - /* - * 8 bit nand mode GPMC will automatically - * seriallize 16bit or 32 bit writes into - * 8 bit onesto the lower 8 bit in LE order - */ - addr16 = 0x0c00 | reg_addr8; - - /* - * CMD1, CA1, CA2, - */ - IOWR8(ncmd_reg_vma, 0x85); - IOWR16(naddr_reg_vma, addr16); - IOWR16(ndata_reg_vma, data); - } - - /* - * re-enable interrupts - */ - atomic_dec(&rdreg_usage_cnt); - local_irq_restore(flags); -} - - -/* - * read astoria register via pNAND interface - */ -static inline u16 ast_p_nand_casdo_read(u8 reg_addr8) -{ - u16 data; - u16 addr16; - unsigned long flags; - /* - * throw an error if called from multiple threads - */ - static atomic_t wrreg_usage_cnt = { 0 }; - - /* - * disable interrupts - */ - local_irq_save(flags); - - if (atomic_read(&wrreg_usage_cnt) != 0) { - /* - * if it gets here ( from other threads), this function needs - * need spin_lock_irq save() protection - */ - cy_as_hal_print_message(KERN_ERR"cy_as_omap_hal: " - "cy_as_hal_write_register usage:%d\n", - atomic_read(&wrreg_usage_cnt)); - } - atomic_inc(&wrreg_usage_cnt); - - /* - * 2 flavors of GPMC -> PNAND access - */ - if (pnand_16bit) { - /* - * 16 BIT gpmc NAND mode - * CMD1, CA1, CA2, - */ - - IOWR8(ncmd_reg_vma, 0x05); - IOWR8(naddr_reg_vma, reg_addr8); - IOWR8(naddr_reg_vma, 0x0c); - IOWR8(ncmd_reg_vma, 0x00E0); - - udelay(1); - - /* - * much faster through the gPMC Register space - */ - data = IORD16(ndata_reg_vma); - } else { - /* - * 8 BIT gpmc NAND mode - * CMD1, CA1, CA2, CMD2 - */ - addr16 = 0x0c00 | reg_addr8; - IOWR8(ncmd_reg_vma, 0x05); - IOWR16(naddr_reg_vma, addr16); - IOWR8(ncmd_reg_vma, 0xE0); - udelay(1); - data = IORD16(ndata_reg_vma); - } - - /* - * re-enable interrupts - */ - atomic_dec(&wrreg_usage_cnt); - local_irq_restore(flags); - - return data; -} - - -/* - * This function must be defined to write a register within the WestBridge - * device. The addr value is the address of the register to write with - * respect to the base address of the WestBridge device. - */ -void cy_as_hal_write_register( - cy_as_hal_device_tag tag, - uint16_t addr, uint16_t data) -{ - ast_p_nand_casdi_write((u8)addr, data); -} - -/* - * This function must be defined to read a register from the WestBridge - * device. The addr value is the address of the register to read with - * respect to the base address of the WestBridge device. - */ -uint16_t cy_as_hal_read_register(cy_as_hal_device_tag tag, uint16_t addr) -{ - uint16_t data = 0; - - /* - * READ ASTORIA REGISTER USING CASDO - */ - data = ast_p_nand_casdo_read((u8)addr); - - return data; -} - -/* - * preps Ep pointers & data counters for next packet - * (fragment of the request) xfer returns true if - * there is a next transfer, and false if all bytes in - * current request have been xfered - */ -static inline bool prep_for_next_xfer(cy_as_hal_device_tag tag, uint8_t ep) -{ - - if (!end_points[ep].sg_list_enabled) { - /* - * no further transfers for non storage EPs - * (like EP2 during firmware download, done - * in 64 byte chunks) - */ - if (end_points[ep].req_xfer_cnt >= end_points[ep].req_length) { - DBGPRN("<1> %s():RQ sz:%d non-_sg EP:%d completed\n", - __func__, end_points[ep].req_length, ep); - - /* - * no more transfers, we are done with the request - */ - return false; - } - - /* - * calculate size of the next DMA xfer, corner - * case for non-storage EPs where transfer size - * is not egual N * HAL_DMA_PKT_SZ xfers - */ - if ((end_points[ep].req_length - end_points[ep].req_xfer_cnt) - >= HAL_DMA_PKT_SZ) { - end_points[ep].dma_xfer_sz = HAL_DMA_PKT_SZ; - } else { - /* - * that would be the last chunk less - * than P-port max size - */ - end_points[ep].dma_xfer_sz = end_points[ep].req_length - - end_points[ep].req_xfer_cnt; - } - - return true; - } - - /* - * for SG_list assisted dma xfers - * are we done with current SG ? - */ - if (end_points[ep].seg_xfer_cnt == end_points[ep].sg_p->length) { - /* - * was it the Last SG segment on the list ? - */ - if (sg_is_last(end_points[ep].sg_p)) { - DBGPRN("<1> %s: EP:%d completed," - "%d bytes xfered\n", - __func__, - ep, - end_points[ep].req_xfer_cnt - ); - - return false; - } else { - /* - * There are more SG segments in current - * request's sg list setup new segment - */ - - end_points[ep].seg_xfer_cnt = 0; - end_points[ep].sg_p = sg_next(end_points[ep].sg_p); - /* set data pointer for next DMA sg transfer*/ - end_points[ep].data_p = sg_virt(end_points[ep].sg_p); - DBGPRN("<1> %s new SG:_va:%p\n\n", - __func__, end_points[ep].data_p); - } - - } - - /* - * for sg list xfers it will always be 512 or 1024 - */ - end_points[ep].dma_xfer_sz = HAL_DMA_PKT_SZ; - - /* - * next transfer is required - */ - - return true; -} - -/* - * Astoria DMA read request, APP_CPU reads from WB ep buffer - */ -static void cy_service_e_p_dma_read_request( - cy_as_omap_dev_kernel *dev_p, uint8_t ep) -{ - cy_as_hal_device_tag tag = (cy_as_hal_device_tag)dev_p; - uint16_t v, size; - void *dptr; - uint16_t col_addr = 0x0000; - uint32_t row_addr = CYAS_DEV_CALC_EP_ADDR(ep); - uint16_t ep_dma_reg = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; - - /* - * get the XFER size frtom WB eP DMA REGISTER - */ - v = cy_as_hal_read_register(tag, ep_dma_reg); - - /* - * amount of data in EP buff in bytes - */ - size = v & CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK; - - /* - * memory pointer for this DMA packet xfer (sub_segment) - */ - dptr = end_points[ep].data_p; - - DBGPRN("<1>HAL:_svc_dma_read on EP_%d sz:%d, intr_seq:%d, dptr:%p\n", - ep, - size, - intr_sequence_num, - dptr - ); - - cy_as_hal_assert(size != 0); - - if (size) { - /* - * the actual WB-->OMAP memory "soft" DMA xfer - */ - p_nand_lbd_read(col_addr, row_addr, size, dptr); - } - - /* - * clear DMAVALID bit indicating that the data has been read - */ - cy_as_hal_write_register(tag, ep_dma_reg, 0); - - end_points[ep].seg_xfer_cnt += size; - end_points[ep].req_xfer_cnt += size; - - /* - * pre-advance data pointer (if it's outside sg - * list it will be reset anyway - */ - end_points[ep].data_p += size; - - if (prep_for_next_xfer(tag, ep)) { - /* - * we have more data to read in this request, - * setup next dma packet due tell WB how much - * data we are going to xfer next - */ - v = end_points[ep].dma_xfer_sz/*HAL_DMA_PKT_SZ*/ | - CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; - cy_as_hal_write_register(tag, ep_dma_reg, v); - } else { - end_points[ep].pending = cy_false; - end_points[ep].type = cy_as_hal_none; - end_points[ep].buffer_valid = cy_false; - - /* - * notify the API that we are done with rq on this EP - */ - if (callback) { - DBGPRN("<1>trigg rd_dma completion cb: xfer_sz:%d\n", - end_points[ep].req_xfer_cnt); - callback(tag, ep, - end_points[ep].req_xfer_cnt, - CY_AS_ERROR_SUCCESS); - } - } -} - -/* - * omap_cpu needs to transfer data to ASTORIA EP buffer - */ -static void cy_service_e_p_dma_write_request( - cy_as_omap_dev_kernel *dev_p, uint8_t ep) -{ - uint16_t addr; - uint16_t v = 0; - uint32_t size; - uint16_t col_addr = 0x0000; - uint32_t row_addr = CYAS_DEV_CALC_EP_ADDR(ep); - void *dptr; - - cy_as_hal_device_tag tag = (cy_as_hal_device_tag)dev_p; - /* - * note: size here its the size of the dma transfer could be - * anything > 0 && < P_PORT packet size - */ - size = end_points[ep].dma_xfer_sz; - dptr = end_points[ep].data_p; - - /* - * perform the soft DMA transfer, soft in this case - */ - if (size) - p_nand_lbd_write(col_addr, row_addr, size, dptr); - - end_points[ep].seg_xfer_cnt += size; - end_points[ep].req_xfer_cnt += size; - /* - * pre-advance data pointer - * (if it's outside sg list it will be reset anyway) - */ - end_points[ep].data_p += size; - - /* - * now clear DMAVAL bit to indicate we are done - * transferring data and that the data can now be - * sent via USB to the USB host, sent to storage, - * or used internally. - */ - - addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; - cy_as_hal_write_register(tag, addr, size); - - /* - * finally, tell the USB subsystem that the - * data is gone and we can accept the - * next request if one exists. - */ - if (prep_for_next_xfer(tag, ep)) { - /* - * There is more data to go. Re-init the WestBridge DMA side - */ - v = end_points[ep].dma_xfer_sz | - CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; - cy_as_hal_write_register(tag, addr, v); - } else { - - end_points[ep].pending = cy_false; - end_points[ep].type = cy_as_hal_none; - end_points[ep].buffer_valid = cy_false; - - /* - * notify the API that we are done with rq on this EP - */ - if (callback) { - /* - * this callback will wake up the process that might be - * sleeping on the EP which data is being transferred - */ - callback(tag, ep, - end_points[ep].req_xfer_cnt, - CY_AS_ERROR_SUCCESS); - } - } -} - -/* - * HANDLE DRQINT from Astoria (called in AS_Intr context - */ -static void cy_handle_d_r_q_interrupt(cy_as_omap_dev_kernel *dev_p) -{ - uint16_t v; - static uint8_t service_ep = 2; - - /* - * We've got DRQ INT, read DRQ STATUS Register */ - v = cy_as_hal_read_register((cy_as_hal_device_tag)dev_p, - CY_AS_MEM_P0_DRQ); - - if (v == 0) { -#ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("stray DRQ interrupt detected\n"); -#endif - return; - } - - /* - * Now, pick a given DMA request to handle, for now, we just - * go round robin. Each bit position in the service_mask - * represents an endpoint from EP2 to EP15. We rotate through - * each of the endpoints to find one that needs to be serviced. - */ - while ((v & (1 << service_ep)) == 0) { - - if (service_ep == 15) - service_ep = 2; - else - service_ep++; - } - - if (end_points[service_ep].type == cy_as_hal_write) { - /* - * handle DMA WRITE REQUEST: app_cpu will - * write data into astoria EP buffer - */ - cy_service_e_p_dma_write_request(dev_p, service_ep); - } else if (end_points[service_ep].type == cy_as_hal_read) { - /* - * handle DMA READ REQUEST: cpu will - * read EP buffer from Astoria - */ - cy_service_e_p_dma_read_request(dev_p, service_ep); - } -#ifndef WESTBRIDGE_NDEBUG - else - cy_as_hal_print_message("cyashalomap:interrupt," - " w/o pending DMA job," - "-check DRQ_MASK logic\n"); -#endif - - /* - * Now bump the EP ahead, so other endpoints get - * a shot before the one we just serviced - */ - if (end_points[service_ep].type == cy_as_hal_none) { - if (service_ep == 15) - service_ep = 2; - else - service_ep++; - } - -} - -void cy_as_hal_dma_cancel_request(cy_as_hal_device_tag tag, uint8_t ep) -{ - DBGPRN("cy_as_hal_dma_cancel_request on ep:%d", ep); - if (end_points[ep].pending) - cy_as_hal_write_register(tag, - CY_AS_MEM_P0_EP2_DMA_REG + ep - 2, 0); - - end_points[ep].buffer_valid = cy_false; - end_points[ep].type = cy_as_hal_none; -} - -/* - * enables/disables SG list assisted DMA xfers for the given EP - * sg_list assisted XFERS can use physical addresses of mem pages in case if the - * xfer is performed by a h/w DMA controller rather then the CPU on P port - */ -void cy_as_hal_set_ep_dma_mode(uint8_t ep, bool sg_xfer_enabled) -{ - end_points[ep].sg_list_enabled = sg_xfer_enabled; - DBGPRN("<1> EP:%d sg_list assisted DMA mode set to = %d\n", - ep, end_points[ep].sg_list_enabled); -} -EXPORT_SYMBOL(cy_as_hal_set_ep_dma_mode); - -/* - * This function must be defined to transfer a block of data to - * the WestBridge device. This function can use the burst write - * (DMA) capabilities of WestBridge to do this, or it can just copy - * the data using writes. - */ -void cy_as_hal_dma_setup_write(cy_as_hal_device_tag tag, - uint8_t ep, void *buf, - uint32_t size, uint16_t maxsize) -{ - uint32_t addr = 0; - uint16_t v = 0; - - /* - * Note: "size" is the actual request size - * "maxsize" - is the P port fragment size - * No EP0 or EP1 traffic should get here - */ - cy_as_hal_assert(ep != 0 && ep != 1); - - /* - * If this asserts, we have an ordering problem. Another DMA request - * is coming down before the previous one has completed. - */ - cy_as_hal_assert(end_points[ep].buffer_valid == cy_false); - end_points[ep].buffer_valid = cy_true; - end_points[ep].type = cy_as_hal_write; - end_points[ep].pending = cy_true; - - /* - * total length of the request - */ - end_points[ep].req_length = size; - - if (size >= maxsize) { - /* - * set xfer size for very 1st DMA xfer operation - * port max packet size ( typically 512 or 1024) - */ - end_points[ep].dma_xfer_sz = maxsize; - } else { - /* - * smaller xfers for non-storage EPs - */ - end_points[ep].dma_xfer_sz = size; - } - - /* - * check the EP transfer mode uses sg_list rather then a memory buffer - * block devices pass it to the HAL, so the hAL could get to the real - * physical address for each segment and set up a DMA controller - * hardware ( if there is one) - */ - if (end_points[ep].sg_list_enabled) { - /* - * buf - pointer to the SG list - * data_p - data pointer to the 1st DMA segment - * seg_xfer_cnt - keeps track of N of bytes sent in current - * sg_list segment - * req_xfer_cnt - keeps track of the total N of bytes - * transferred for the request - */ - end_points[ep].sg_p = buf; - end_points[ep].data_p = sg_virt(end_points[ep].sg_p); - end_points[ep].seg_xfer_cnt = 0; - end_points[ep].req_xfer_cnt = 0; - -#ifdef DBGPRN_DMA_SETUP_WR - DBGPRN("cyasomaphal:%s: EP:%d, buf:%p, buf_va:%p," - "req_sz:%d, maxsz:%d\n", - __func__, - ep, - buf, - end_points[ep].data_p, - size, - maxsize); -#endif - - } else { - /* - * setup XFER for non sg_list assisted EPs - */ - - #ifdef DBGPRN_DMA_SETUP_WR - DBGPRN("<1>%s non storage or sz < 512:" - "EP:%d, sz:%d\n", __func__, ep, size); - #endif - - end_points[ep].sg_p = NULL; - - /* - * must be a VMA of a membuf in kernel space - */ - end_points[ep].data_p = buf; - - /* - * will keep track No of bytes xferred for the request - */ - end_points[ep].req_xfer_cnt = 0; - } - - /* - * Tell WB we are ready to send data on the given endpoint - */ - v = (end_points[ep].dma_xfer_sz & CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) - | CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; - - addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; - - cy_as_hal_write_register(tag, addr, v); -} - -/* - * This function must be defined to transfer a block of data from - * the WestBridge device. This function can use the burst read - * (DMA) capabilities of WestBridge to do this, or it can just - * copy the data using reads. - */ -void cy_as_hal_dma_setup_read(cy_as_hal_device_tag tag, - uint8_t ep, void *buf, - uint32_t size, uint16_t maxsize) -{ - uint32_t addr; - uint16_t v; - - /* - * Note: "size" is the actual request size - * "maxsize" - is the P port fragment size - * No EP0 or EP1 traffic should get here - */ - cy_as_hal_assert(ep != 0 && ep != 1); - - /* - * If this asserts, we have an ordering problem. - * Another DMA request is coming down before the - * previous one has completed. we should not get - * new requests if current is still in process - */ - - cy_as_hal_assert(end_points[ep].buffer_valid == cy_false); - - end_points[ep].buffer_valid = cy_true; - end_points[ep].type = cy_as_hal_read; - end_points[ep].pending = cy_true; - end_points[ep].req_xfer_cnt = 0; - end_points[ep].req_length = size; - - if (size >= maxsize) { - /* - * set xfer size for very 1st DMA xfer operation - * port max packet size ( typically 512 or 1024) - */ - end_points[ep].dma_xfer_sz = maxsize; - } else { - /* - * so that we could handle small xfers on in case - * of non-storage EPs - */ - end_points[ep].dma_xfer_sz = size; - } - - addr = CY_AS_MEM_P0_EP2_DMA_REG + ep - 2; - - if (end_points[ep].sg_list_enabled) { - /* - * Handle sg-list assisted EPs - * seg_xfer_cnt - keeps track of N of sent packets - * buf - pointer to the SG list - * data_p - data pointer for the 1st DMA segment - */ - end_points[ep].seg_xfer_cnt = 0; - end_points[ep].sg_p = buf; - end_points[ep].data_p = sg_virt(end_points[ep].sg_p); - - #ifdef DBGPRN_DMA_SETUP_RD - DBGPRN("cyasomaphal:DMA_setup_read sg_list EP:%d, " - "buf:%p, buf_va:%p, req_sz:%d, maxsz:%d\n", - ep, - buf, - end_points[ep].data_p, - size, - maxsize); - #endif - v = (end_points[ep].dma_xfer_sz & - CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) | - CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; - cy_as_hal_write_register(tag, addr, v); - } else { - /* - * Non sg list EP passed void *buf rather then scatterlist *sg - */ - #ifdef DBGPRN_DMA_SETUP_RD - DBGPRN("%s:non-sg_list EP:%d," - "RQ_sz:%d, maxsz:%d\n", - __func__, ep, size, maxsize); - #endif - - end_points[ep].sg_p = NULL; - - /* - * must be a VMA of a membuf in kernel space - */ - end_points[ep].data_p = buf; - - /* - * Program the EP DMA register for Storage endpoints only. - */ - if (is_storage_e_p(ep)) { - v = (end_points[ep].dma_xfer_sz & - CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK) | - CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL; - cy_as_hal_write_register(tag, addr, v); - } - } -} - -/* - * This function must be defined to allow the WB API to - * register a callback function that is called when a - * DMA transfer is complete. - */ -void cy_as_hal_dma_register_callback(cy_as_hal_device_tag tag, - cy_as_hal_dma_complete_callback cb) -{ - DBGPRN("<1>\n%s: WB API has registered a dma_complete callback:%x\n", - __func__, (uint32_t)cb); - callback = cb; -} - -/* - * This function must be defined to return the maximum size of - * DMA request that can be handled on the given endpoint. The - * return value should be the maximum size in bytes that the DMA - * module can handle. - */ -uint32_t cy_as_hal_dma_max_request_size(cy_as_hal_device_tag tag, - cy_as_end_point_number_t ep) -{ - /* - * Storage reads and writes are always done in 512 byte blocks. - * So, we do the count handling within the HAL, and save on - * some of the data transfer delay. - */ - if ((ep == CYASSTORAGE_READ_EP_NUM) || - (ep == CYASSTORAGE_WRITE_EP_NUM)) { - /* max DMA request size HAL can handle by itself */ - return CYASSTORAGE_MAX_XFER_SIZE; - } else { - /* - * For the USB - Processor endpoints, the maximum transfer - * size depends on the speed of USB operation. So, we use - * the following constant to indicate to the API that - * splitting of the data into chunks less that or equal to - * the max transfer size should be handled internally. - */ - - /* DEFINED AS 0xffffffff in cyasdma.h */ - return CY_AS_DMA_MAX_SIZE_HW_SIZE; - } -} - -/* - * This function must be defined to set the state of the WAKEUP pin - * on the WestBridge device. Generally this is done via a GPIO of - * some type. - */ -cy_bool cy_as_hal_set_wakeup_pin(cy_as_hal_device_tag tag, cy_bool state) -{ - /* - * Not supported as of now. - */ - return cy_false; -} - -void cy_as_hal_pll_lock_loss_handler(cy_as_hal_device_tag tag) -{ - cy_as_hal_print_message("error: astoria PLL lock is lost\n"); - cy_as_hal_print_message("please check the input voltage levels"); - cy_as_hal_print_message("and clock, and restart the system\n"); -} - -/* - * Below are the functions that must be defined to provide the basic - * operating system services required by the API. - */ - -/* - * This function is required by the API to allocate memory. - * This function is expected to work exactly like malloc(). - */ -void *cy_as_hal_alloc(uint32_t cnt) -{ - return kmalloc(cnt, GFP_ATOMIC); -} - -/* - * This function is required by the API to free memory allocated - * with CyAsHalAlloc(). This function is'expected to work exacly - * like free(). - */ -void cy_as_hal_free(void *mem_p) -{ - kfree(mem_p); -} - -/* - * Allocator that can be used in interrupt context. - * We have to ensure that the kmalloc call does not - * sleep in this case. - */ -void *cy_as_hal_c_b_alloc(uint32_t cnt) -{ - return kmalloc(cnt, GFP_ATOMIC); -} - -/* - * This function is required to set a block of memory to a - * specific value. This function is expected to work exactly - * like memset() - */ -void cy_as_hal_mem_set(void *ptr, uint8_t value, uint32_t cnt) -{ - memset(ptr, value, cnt); -} - -/* - * This function is expected to create a sleep channel. - * The data structure that represents the sleep channel object - * sleep channel (which is Linux "wait_queue_head_t wq" for this particular HAL) - * passed as a pointer, and allpocated by the caller - * (typically as a local var on the stack) "Create" word should read as - * "SleepOn", this func doesn't actually create anything - */ -cy_bool cy_as_hal_create_sleep_channel(cy_as_hal_sleep_channel *channel) -{ - init_waitqueue_head(&channel->wq); - return cy_true; -} - -/* - * for this particular HAL it doesn't actually destroy anything - * since no actual sleep object is created in CreateSleepChannel() - * sleep channel is given by the pointer in the argument. - */ -cy_bool cy_as_hal_destroy_sleep_channel(cy_as_hal_sleep_channel *channel) -{ - return cy_true; -} - -/* - * platform specific wakeable Sleep implementation - */ -cy_bool cy_as_hal_sleep_on(cy_as_hal_sleep_channel *channel, uint32_t ms) -{ - wait_event_interruptible_timeout(channel->wq, 0, ((ms * HZ)/1000)); - return cy_true; -} - -/* - * wakes up the process waiting on the CHANNEL - */ -cy_bool cy_as_hal_wake(cy_as_hal_sleep_channel *channel) -{ - wake_up_interruptible_all(&channel->wq); - return cy_true; -} - -uint32_t cy_as_hal_disable_interrupts() -{ - if (0 == intr__enable) - ; - - intr__enable++; - return 0; -} - -void cy_as_hal_enable_interrupts(uint32_t val) -{ - intr__enable--; - if (0 == intr__enable) - ; -} - -/* - * Sleep atleast 150ns, cpu dependent - */ -void cy_as_hal_sleep150(void) -{ - uint32_t i, j; - - j = 0; - for (i = 0; i < 1000; i++) - j += (~i); -} - -void cy_as_hal_sleep(uint32_t ms) -{ - cy_as_hal_sleep_channel channel; - - cy_as_hal_create_sleep_channel(&channel); - cy_as_hal_sleep_on(&channel, ms); - cy_as_hal_destroy_sleep_channel(&channel); -} - -cy_bool cy_as_hal_is_polling() -{ - return cy_false; -} - -void cy_as_hal_c_b_free(void *ptr) -{ - cy_as_hal_free(ptr); -} - -/* - * suppose to reinstate the astoria registers - * that may be clobbered in sleep mode - */ -void cy_as_hal_init_dev_registers(cy_as_hal_device_tag tag, - cy_bool is_standby_wakeup) -{ - /* specific to SPI, no implementation required */ - (void) tag; - (void) is_standby_wakeup; -} - -void cy_as_hal_read_regs_before_standby(cy_as_hal_device_tag tag) -{ - /* specific to SPI, no implementation required */ - (void) tag; -} - -cy_bool cy_as_hal_sync_device_clocks(cy_as_hal_device_tag tag) -{ - /* - * we are in asynchronous mode. so no need to handle this - */ - return true; -} - -/* - * init OMAP h/w resources - */ -int start_o_m_a_p_kernel(const char *pgm, - cy_as_hal_device_tag *tag, cy_bool debug) -{ - cy_as_omap_dev_kernel *dev_p; - int i; - u16 data16[4]; - u8 pncfg_reg; - - /* - * No debug mode support through argument as of now - */ - (void)debug; - - DBGPRN(KERN_INFO"starting OMAP34xx HAL...\n"); - - /* - * Initialize the HAL level endpoint DMA data. - */ - for (i = 0; i < sizeof(end_points)/sizeof(end_points[0]); i++) { - end_points[i].data_p = 0; - end_points[i].pending = cy_false; - end_points[i].size = 0; - end_points[i].type = cy_as_hal_none; - end_points[i].sg_list_enabled = cy_false; - - /* - * by default the DMA transfers to/from the E_ps don't - * use sg_list that implies that the upper devices like - * blockdevice have to enable it for the E_ps in their - * initialization code - */ - } - - /* - * allocate memory for OMAP HAL - */ - dev_p = (cy_as_omap_dev_kernel *)cy_as_hal_alloc( - sizeof(cy_as_omap_dev_kernel)); - if (dev_p == 0) { - cy_as_hal_print_message("out of memory allocating OMAP" - "device structure\n"); - return 0; - } - - dev_p->m_sig = CY_AS_OMAP_KERNEL_HAL_SIG; - - /* - * initialize OMAP hardware and StartOMAPKernelall gpio pins - */ - dev_p->m_addr_base = (void *)cy_as_hal_processor_hw_init(); - - /* - * Now perform a hard reset of the device to have - * the new settings take effect - */ - __gpio_set_value(AST_WAKEUP, 1); - - /* - * do Astoria h/w reset - */ - DBGPRN(KERN_INFO"-_-_pulse -> westbridge RST pin\n"); - - /* - * NEGATIVE PULSE on RST pin - */ - __gpio_set_value(AST_RESET, 0); - mdelay(1); - __gpio_set_value(AST_RESET, 1); - mdelay(50); - - /* - * note AFTER reset PNAND interface is 8 bit mode - * so if gpmc Is configured in 8 bit mode upper half will be FF - */ - pncfg_reg = ast_p_nand_casdo_read(CY_AS_MEM_PNAND_CFG); - -#ifdef PNAND_16BIT_MODE - - /* - * switch to 16 bit mode, force NON-LNA LBD mode, 3 RA addr bytes - */ - ast_p_nand_casdi_write(CY_AS_MEM_PNAND_CFG, 0x0001); - - /* - * now in order to continue to talk to astoria - * sw OMAP GPMC into 16 bit mode as well - */ - cy_as_hal_gpmc_enable_16bit_bus(cy_true); -#else - /* Astoria and GPMC are already in 8 bit mode, just initialize PNAND_CFG */ - ast_p_nand_casdi_write(CY_AS_MEM_PNAND_CFG, 0x0000); -#endif - - /* - * NOTE: if you want to capture bus activity on the LA, - * don't use printks in between the activities you want to capture. - * prinks may take milliseconds, and the data of interest - * will fall outside the LA capture window/buffer - */ - data16[0] = ast_p_nand_casdo_read(CY_AS_MEM_CM_WB_CFG_ID); - data16[1] = ast_p_nand_casdo_read(CY_AS_MEM_PNAND_CFG); - - if (data16[0] != 0xA200) { - /* - * astoria device is not found - */ - printk(KERN_ERR "ERROR: astoria device is not found, CY_AS_MEM_CM_WB_CFG_ID "); - printk(KERN_ERR "read returned:%4.4X: CY_AS_MEM_PNAND_CFG:%4.4x !\n", - data16[0], data16[0]); - goto bus_acc_error; - } - - cy_as_hal_print_message(KERN_INFO" register access CASDO test:" - "\n CY_AS_MEM_CM_WB_CFG_ID:%4.4x\n" - "PNAND_CFG after RST:%4.4x\n " - "CY_AS_MEM_PNAND_CFG" - "after cfg_wr:%4.4x\n\n", - data16[0], pncfg_reg, data16[1]); - - dev_p->thread_flag = 1; - spin_lock_init(&int_lock); - dev_p->m_next_p = m_omap_list_p; - - m_omap_list_p = dev_p; - *tag = dev_p; - - cy_as_hal_configure_interrupts((void *)dev_p); - - cy_as_hal_print_message(KERN_INFO"OMAP3430__hal started tag:%p" - ", kernel HZ:%d\n", dev_p, HZ); - - /* - *make processor to storage endpoints SG assisted by default - */ - cy_as_hal_set_ep_dma_mode(4, true); - cy_as_hal_set_ep_dma_mode(8, true); - - return 1; - - /* - * there's been a NAND bus access error or - * astoria device is not connected - */ -bus_acc_error: - /* - * at this point hal tag hasn't been set yet - * so the device will not call omap_stop - */ - cy_as_hal_omap_hardware_deinit(dev_p); - cy_as_hal_free(dev_p); - return 0; -} - -#else -/* - * Some compilers do not like empty C files, so if the OMAP hal is not being - * compiled, we compile this single function. We do this so that for a - * given target HAL there are not multiple sources for the HAL functions. - */ -void my_o_m_a_p_kernel_hal_dummy_function(void) -{ -} - -#endif diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/cyashaldef.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/cyashaldef.h deleted file mode 100644 index c05e6d6..0000000 --- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/cyashaldef.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Cypress West Bridge API header file (cyashaldef.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASHALDEF_H_ -#define _INCLUDED_CYASHALDEF_H_ - -/* Summary - * If set to TRUE, the basic numeric types are defined by the - * West Bridge API code - * - * Description - * The West Bridge API relies on some basic integral types to be - * defined. These types include uint8_t, int8_t, uint16_t, - * int16_t, uint32_t, and int32_t. If this macro is defined the - * West Bridge API will define these types based on some basic - * assumptions. If this value is set and the West Bridge API is - * used to set these types, the definition of these types must be - * examined to insure that they are appropriate for the given - * target architecture and compiler. - * - * Notes - * It is preferred that if the basic platform development - * environment defines these types that the CY_DEFINE_BASIC_TYPES - * macro be undefined and the appropriate target system header file - * be added to the file cyashaldef.h. - */ - -#include - - -#if !defined(__doxygen__) -typedef int cy_bool; -#define cy_true (1) -#define cy_false (0) -#endif - -#endif /* _INCLUDED_CYASHALDEF_H_ */ diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h deleted file mode 100644 index 6426ea6..0000000 --- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h +++ /dev/null @@ -1,319 +0,0 @@ -/* Cypress Antioch HAL for OMAP KERNEL header file (cyashalomapkernel.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * This file contains the definition of the hardware abstraction - * layer on OMAP3430 talking to the West Bridge Astoria device - */ - - -#ifndef _INCLUDED_CYASHALOMAP_KERNEL_H_ -#define _INCLUDED_CYASHALOMAP_KERNEL_H_ - -#include -#include -#include -#include -/* include does not seem to work - * moving for patch submission -#include -*/ -#include -typedef struct cy_as_hal_sleep_channel_t { - wait_queue_head_t wq; -} cy_as_hal_sleep_channel; - -/* moved to staging location, eventual location - * considered is here -#include -#include -#include -*/ -#include "../cyashaldef.h" -#include "../../../../../../../include/linux/westbridge/cyastypes.h" -#include "../../../../../../../include/linux/westbridge/cyas_cplus_start.h" -#include "cyasomapdev_kernel.h" - -/* - * Below are the data structures that must be defined by the HAL layer - */ - -/* - * The HAL layer must define a TAG for identifying a specific Astoria - * device in the system. In this case the tag is a void * which is - * really an OMAP device pointer - */ -typedef void *cy_as_hal_device_tag; - - -/* This must be included after the CyAsHalDeviceTag type is defined */ - -/* moved to staging location, eventual location - * considered is here - * #include -*/ -#include "../../../../../../../include/linux/westbridge/cyashalcb.h" -/* - * Below are the functions that communicate with the West Bridge - * device. These are system dependent and must be defined by - * the HAL layer for a given system. - */ - -/* - * This function must be defined to write a register within the Antioch - * device. The addr value is the address of the register to write with - * respect to the base address of the Antioch device. - */ -void -cy_as_hal_write_register(cy_as_hal_device_tag tag, - uint16_t addr, uint16_t data); - -/* - * This function must be defined to read a register from - * the west bridge device. The addr value is the address of - * the register to read with respect to the base address - * of the west bridge device. - */ -uint16_t -cy_as_hal_read_register(cy_as_hal_device_tag tag, uint16_t addr); - -/* - * This function must be defined to transfer a block of data - * to the west bridge device. This function can use the burst write - * (DMA) capabilities of Antioch to do this, or it can just copy - * the data using writes. - */ -void -cy_as_hal_dma_setup_write(cy_as_hal_device_tag tag, - uint8_t ep, void *buf, uint32_t size, uint16_t maxsize); - -/* - * This function must be defined to transfer a block of data - * from the Antioch device. This function can use the burst - * read (DMA) capabilities of Antioch to do this, or it can - * just copy the data using reads. - */ -void -cy_as_hal_dma_setup_read(cy_as_hal_device_tag tag, uint8_t ep, - void *buf, uint32_t size, uint16_t maxsize); - -/* - * This function must be defined to cancel any pending DMA request. - */ -void -cy_as_hal_dma_cancel_request(cy_as_hal_device_tag tag, uint8_t ep); - -/* - * This function must be defined to allow the Antioch API to - * register a callback function that is called when a DMA transfer - * is complete. - */ -void -cy_as_hal_dma_register_callback(cy_as_hal_device_tag tag, - cy_as_hal_dma_complete_callback cb); - -/* - * This function must be defined to return the maximum size of DMA - * request that can be handled on the given endpoint. The return - * value should be the maximum size in bytes that the DMA module can - * handle. - */ -uint32_t -cy_as_hal_dma_max_request_size(cy_as_hal_device_tag tag, - cy_as_end_point_number_t ep); - -/* - * This function must be defined to set the state of the WAKEUP pin - * on the Antioch device. Generally this is done via a GPIO of some - * type. - */ -cy_bool -cy_as_hal_set_wakeup_pin(cy_as_hal_device_tag tag, cy_bool state); - -/* - * This function is called when the Antioch PLL loses lock, because - * of a problem in the supply voltage or the input clock. - */ -void -cy_as_hal_pll_lock_loss_handler(cy_as_hal_device_tag tag); - - -/********************************************************************** - * - * Below are the functions that must be defined to provide the basic - * operating system services required by the API. - * -***********************************************************************/ - -/* - * This function is required by the API to allocate memory. This function - * is expected to work exactly like malloc(). - */ -void * -cy_as_hal_alloc(uint32_t cnt); - -/* - * This function is required by the API to free memory allocated with - * CyAsHalAlloc(). This function is expected to work exacly like free(). - */ -void -cy_as_hal_free(void *mem_p); - -/* - * This function is required by the API to allocate memory during a - * callback. This function must be able to provide storage at inturupt - * time. - */ -void * -cy_as_hal_c_b_alloc(uint32_t cnt); - -/* - * This function is required by the API to free memory allocated with - * CyAsCBHalAlloc(). - */ -void -cy_as_hal_c_b_free(void *ptr); - -/* - * This function is required to set a block of memory to a specific - * value. This function is expected to work exactly like memset() - */ -void -cy_as_hal_mem_set(void *ptr, uint8_t value, uint32_t cnt); - -/* - * This function is expected to create a sleep channel. The data - * structure that represents the sleep channel is given by the - * pointer in the argument. - */ -cy_bool -cy_as_hal_create_sleep_channel(cy_as_hal_sleep_channel *channel); - -/* - * This function is expected to destroy a sleep channel. The data - * structure that represents the sleep channel is given by - * the pointer in the argument. - */ - - -cy_bool -cy_as_hal_destroy_sleep_channel(cy_as_hal_sleep_channel *channel); - -cy_bool -cy_as_hal_sleep_on(cy_as_hal_sleep_channel *channel, uint32_t ms); - -cy_bool -cy_as_hal_wake(cy_as_hal_sleep_channel *channel); - -uint32_t -cy_as_hal_disable_interrupts(void); - -void -cy_as_hal_enable_interrupts(uint32_t); - -void -cy_as_hal_sleep150(void); - -void -cy_as_hal_sleep(uint32_t ms); - -cy_bool -cy_as_hal_is_polling(void); - -void cy_as_hal_init_dev_registers(cy_as_hal_device_tag tag, - cy_bool is_standby_wakeup); - -/* - * required only in spi mode - */ -cy_bool cy_as_hal_sync_device_clocks(cy_as_hal_device_tag tag); - -void cy_as_hal_read_regs_before_standby(cy_as_hal_device_tag tag); - - -#ifndef NDEBUG -#define cy_as_hal_assert(cond) if (!(cond))\ - printk(KERN_WARNING"assertion failed at %s:%d\n", __FILE__, __LINE__); -#else -#define cy_as_hal_assert(cond) -#endif - -#define cy_as_hal_print_message printk - -/* removable debug printks */ -#ifndef WESTBRIDGE_NDEBUG -#define DBG_PRINT_ENABLED -#endif - -/*#define MBOX_ACCESS_DBG_PRINT_ENABLED*/ - - -#ifdef DBG_PRINT_ENABLED - /* Debug printing enabled */ - - #define DBGPRN(...) printk(__VA_ARGS__) - #define DBGPRN_FUNC_NAME printk("<1> %x:_func: %s\n", \ - current->pid, __func__) - -#else - /** NO DEBUG PRINTING **/ - #define DBGPRN(...) - #define DBGPRN_FUNC_NAME - -#endif - -/* -CyAsMiscSetLogLevel(uint8_t level) -{ - debug_level = level; -} - -#ifdef CY_AS_LOG_SUPPORT - -void -cy_as_log_debug_message(int level, const char *str) -{ - if (level <= debug_level) - cy_as_hal_print_message("log %d: %s\n", level, str); -} -*/ - - -/* - * print buffer helper - */ -void cyashal_prn_buf(void *buf, uint16_t offset, int len); - -/* - * These are the functions that are not part of the HAL layer, - * but are required to be called for this HAL. - */ -int start_o_m_a_p_kernel(const char *pgm, - cy_as_hal_device_tag *tag, cy_bool debug); -int stop_o_m_a_p_kernel(const char *pgm, cy_as_hal_device_tag tag); -int omap_start_intr(cy_as_hal_device_tag tag); -void cy_as_hal_set_ep_dma_mode(uint8_t ep, bool sg_xfer_enabled); - -/* moved to staging location -#include -*/ -#include "../../../../../../../include/linux/westbridge/cyas_cplus_start.h" -#endif diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h deleted file mode 100644 index 46f06ee..0000000 --- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h +++ /dev/null @@ -1,558 +0,0 @@ -/* - OMAP3430 ZOOM MDK astoria interface defs(cyasmemmap.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ -/* include does not seem to work - * moving for patch submission -#include -#include -*/ -#include -#include - -#ifndef _INCLUDED_CYASMEMMAP_H_ -#define _INCLUDED_CYASMEMMAP_H_ - -/* defines copied from OMAP kernel branch */ - -#define OMAP2_PULL_UP (1 << 4) -#define OMAP2_PULL_ENA (1 << 3) -#define OMAP34XX_MUX_MODE0 0 -#define OMAP34XX_MUX_MODE4 4 -#define OMAP3_INPUT_EN (1 << 8) -#define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \ - | OMAP2_PULL_UP) - -/* - * for OMAP3430 <-> astoria : ADmux mode, 8 bit data path - * WB Signal- OMAP3430 signal COMMENTS - * --------------------------- -------------------- - * CS_L -GPMC_nCS4_GPIO_53 ZOOM I SOM board - * signal: up_nCS_A_EXT - * AD[7:0]-upD[7:0] buffered on the - * transposer board - * GPMC_ADDR - * [A8:A1]->upD[7:0] - * INT# -GPMC_nWP_GPIO_62 - * DACK -N/C not connected - * WAKEUP-GPIO_167 - * RESET-GPIO_126 - * R/B -GPMC_WAIT2_GPIO_64 - * ------------------------------------------- - * The address range for nCS1B is 0x06000000 - 0x07FF FFFF. -*/ - -/* - *OMAP_ZOOM LEDS - */ -#define LED_0 156 -#define LED_1 128 -#define LED_2 64 -#define LED_3 60 - -#define HIGH 1 -#define LOW 1 - -/* - *omap GPIO number - */ -#define AST_WAKEUP 167 -#define AST_RESET 126 -#define AST__rn_b 64 - -/* - * NOTE THIS PIN IS USED AS WP for OMAP NAND - */ -#define AST_INT 62 - -/* - * as an I/O, it is actually controlled by GPMC - */ -#define AST_CS 55 - - -/* - *GPMC prefetch engine - */ - -/* register and its bit fields */ -#define GPMC_PREFETCH_CONFIG1 0x01E0 - - /*32 bytes for 16 bit pnand mode*/ - #define PFE_THRESHOLD 31 - - /* - * bit fields - * PF_ACCESSMODE - 0 - read mode, 1 - write mode - * PF_DMAMODE - 0 - default only intr line signal will be generated - * PF_SYNCHROMODE - default 0 - engin will start access as soon as - * ctrl re STARTENGINE is set - * PF_WAITPINSEL - FOR synchro mode selects WAIT pin whch edge - * will be monitored - * PF_EN_ENGINE - 1- ENABLES ENGINE, but it needs to be started after - * that C ctrl reg bit 0 - * PF_FIFO_THRESHOLD - FIFO threshold in number of BUS(8 or 16) words - * PF_WEIGHTED_PRIO - NUM of cycles granted to PFE if RND_ROBIN - * prioritization is enabled - * PF_ROUND_ROBIN - if enabled, gives priority to other CS, but - * reserves NUM of cycles for PFE's turn - * PF_ENGIN_CS_SEL - GPMC CS assotiated with PFE function - */ - #define PF_ACCESSMODE (0 << 0) - #define PF_DMAMODE (0 << 2) - #define PF_SYNCHROMODE (0 << 3) - #define PF_WAITPINSEL (0x0 << 4) - #define PF_EN_ENGINE (1 << 7) - #define PF_FIFO_THRESHOLD (PFE_THRESHOLD << 8) - #define PF_WEIGHTED_PRIO (0x0 << 16) - #define PF_ROUND_ROBIN (0 << 23) - #define PF_ENGIN_CS_SEL (AST_GPMC_CS << 24) - #define PF_EN_OPTIM_ACC (0 << 27) - #define PF_CYCLEOPTIM (0x0 << 28) - -#define GPMC_PREFETCH_CONFIG1_VAL (PF_ACCESSMODE | \ - PF_DMAMODE | PF_SYNCHROMODE | \ - PF_WAITPINSEL | PF_EN_ENGINE | \ - PF_FIFO_THRESHOLD | PF_FIFO_THRESHOLD | \ - PF_WEIGHTED_PRIO | PF_ROUND_ROBIN | \ - PF_ENGIN_CS_SEL | PF_EN_OPTIM_ACC | \ - PF_CYCLEOPTIM) - -/* register and its bit fields */ -#define GPMC_PREFETCH_CONFIG2 0x01E4 - /* - * bit fields - * 14 bit field NOTE this counts is also - * is in number of BUS(8 or 16) words - */ - #define PF_TRANSFERCOUNT (0x000) - - -/* register and its bit fields */ -#define GPMC_PREFETCH_CONTROL 0x01EC - /* - * bit fields , ONLY BIT 0 is implemented - * PFWE engin must be programmed with this bit = 0 - */ - #define PFPW_STARTENGINE (1 << 0) - -/* register and its bit fields */ -#define GPMC_PREFETCH_STATUS 0x01F0 - - /* */ - #define PFE_FIFO_THRESHOLD (1 << 16) - -/* - * GPMC posted write/prefetch engine end - */ - - -/* - * chip select number on GPMC ( 0..7 ) - */ -#define AST_GPMC_CS 4 - -/* - * not connected - */ -#define AST_DACK 00 - - -/* - * Physical address above the NAND flash - * we use CS For mapping in OMAP3430 RAM space use 0x0600 0000 - */ -#define CYAS_DEV_BASE_ADDR (0x20000000) - -#define CYAS_DEV_MAX_ADDR (0xFF) -#define CYAS_DEV_ADDR_RANGE (CYAS_DEV_MAX_ADDR << 1) - -#ifdef p_s_r_a_m_INTERFACE - /* in CRAM or PSRAM mode OMAP A1..An wires-> Astoria, there is no A0 line */ - #define CYAS_DEV_CALC_ADDR(cyas_addr) (cyas_addr << 1) - #define CYAS_DEV_CALC_EP_ADDR(ep) (ep << 1) -#else - /* - * For pNAND interface it depends on NAND emulation mode - * SBD/LBD etc we use NON-LNA_LBD mode, so it goes like this: - * forlbd , - * where CA1 address must have bits 2,3 = "11" - * ep is mapped into RA1 bits {4:0} - */ - #define CYAS_DEV_CALC_ADDR(cyas_addr) (cyas_addr | 0x0c00) - #define CYAS_DEV_CALC_EP_ADDR(ep) ep -#endif - -/* - *OMAP3430 i/o access macros - */ -#define IORD32(addr) (*(volatile u32 *)(addr)) -#define IOWR32(addr, val) (*(volatile u32 *)(addr) = val) - -#define IORD16(addr) (*(volatile u16 *)(addr)) -#define IOWR16(addr, val) (*(volatile u16 *)(addr) = val) - -#define IORD8(addr) (*(volatile u8 *)(addr)) -#define IOWR8(addr, val) (*(volatile u8 *)(addr) = val) - -/* - * local defines for accessing to OMAP GPIO *** - */ -#define CTLPADCONF_BASE_ADDR 0x48002000 -#define CTLPADCONF_SIZE 0x1000 - -#define GPIO1_BASE_ADDR 0x48310000 -#define GPIO2_BASE_ADDR 0x49050000 -#define GPIO3_BASE_ADDR 0x49052000 -#define GPIO4_BASE_ADDR 0x49054000 -#define GPIO5_BASE_ADDR 0x49056000 -#define GPIO6_BASE_ADDR 0x49058000 -#define GPIO_SPACE_SIZE 0x1000 - - -/* - * OMAP3430 GPMC timing for pNAND interface - */ -#define GPMC_BASE 0x6E000000 -#define GPMC_REGION_SIZE 0x1000 -#define GPMC_CONFIG_REG (0x50) - -/* - * bit 0 in the GPMC_CONFIG_REG - */ -#define NAND_FORCE_POSTED_WRITE_B 1 - -/* - * WAIT2STATUS, must be (1 << 10) - */ -#define AS_WAIT_PIN_MASK (1 << 10) - - -/* - * GPMC_CONFIG(reg number [1..7] [for chip sel CS[0..7]) - */ -#define GPMC_CFG_REG(N, CS) ((0x60 + (4*(N-1))) + (0x30*CS)) - -/* - *gpmc nand registers for CS4 - */ -#define AST_GPMC_NAND_CMD (0x7c + (0x30*AST_GPMC_CS)) -#define AST_GPMC_NAND_ADDR (0x80 + (0x30*AST_GPMC_CS)) -#define AST_GPMC_NAND_DATA (0x84 + (0x30*AST_GPMC_CS)) - -#define GPMC_STAT_REG (0x54) -#define GPMC_ERR_TYPE (0x48) - -/* - * we get "gpmc_base" from kernel - */ -#define GPMC_VMA(offset) (gpmc_base + offset) - -/* - * GPMC CS space VMA start address - */ -#define GPMC_CS_VMA(offset) (gpmc_data_vma + offset) - -/* - * PAD_CFG mux space VMA - */ -#define PADCFG_VMA(offset) (iomux_vma + offset) - -/* - * CONFIG1: by default, sngle access, async r/w RD_MULTIPLE[30] - * WR_MULTIPLE[28]; GPMC_FCL_DIV[1:0] - */ -#define GPMC_FCLK_DIV ((0) << 0) - -/* - * ADDITIONAL DIVIDER FOR ALL TIMING PARAMS - */ -#define TIME_GRAN_SCALE ((0) << 4) - -/* - * for use by gpmc_set_timings api, measured in ns, not clocks - */ -#define WB_GPMC_BUSCYC_t (7 * 6) -#define WB_GPMC_CS_t_o_n (0) -#define WB_GPMC_ADV_t_o_n (0) -#define WB_GPMC_OE_t_o_n (0) -#define WB_GPMC_OE_t_o_f_f (5 * 6) -#define WB_GPMC_WE_t_o_n (1 * 6) -#define WB_GPMC_WE_t_o_f_f (5 * 6) -#define WB_GPMC_RDS_ADJ (2 * 6) -#define WB_GPMC_RD_t_a_c_c (WB_GPMC_OE_t_o_f_f + WB_GPMC_RDS_ADJ) -#define WB_GPMC_WR_t_a_c_c (WB_GPMC_BUSCYC_t) - -#define DIR_OUT 0 -#define DIR_INP 1 -#define DRV_HI 1 -#define DRV_LO 0 - -/* - * GPMC_CONFIG7[cs] register bit fields - * AS_CS_MASK - 3 bit mask for A26,A25,A24, - * AS_CS_BADDR - 6 BIT VALUE A29 ...A24 - * CSVALID_B - CSVALID bit on GPMC_CONFIG7[cs] register - */ -#define AS_CS_MASK (0X7 << 8) -#define AS_CS_BADDR 0x02 -#define CSVALID_B (1 << 6) - -/* - * DEFINE OMAP34XX GPIO OFFSETS (should have been defined in kernel /arch - * these are offsets from the BASE_ADDRESS of the GPIO BLOCK - */ -#define GPIO_REVISION 0x000 -#define GPIO_SYSCONFIG 0x010 -#define GPIO_SYSSTATUS1 0x014 -#define GPIO_IRQSTATUS1 0x018 -#define GPIO_IRQENABLE1 0x01C -#define GPIO_IRQSTATUS2 0x028 -#define GPIO_CTRL 0x030 -#define GPIO_OE 0x034 -#define GPIO_DATA_IN 0x038 -#define GPIO_DATA_OUT 0x03C -#define GPIO_LEVELDETECT0 0x040 -#define GPIO_LEVELDETECT1 0x044 -#define GPIO_RISINGDETECT 0x048 -#define GPIO_FALLINGDETECT 0x04c -#define GPIO_CLEAR_DATAOUT 0x090 -#define GPIO_SET_DATAOUT 0x094 - -typedef struct { - char *name; - u32 phy_addr; - u32 virt_addr; - u32 size; -} io2vma_tab_t; - -/* - * GPIO phy to translation VMA table - */ -static io2vma_tab_t gpio_vma_tab[6] = { - {"GPIO1_BASE_ADDR", GPIO1_BASE_ADDR , 0 , GPIO_SPACE_SIZE}, - {"GPIO2_BASE_ADDR", GPIO2_BASE_ADDR , 0 , GPIO_SPACE_SIZE}, - {"GPIO3_BASE_ADDR", GPIO3_BASE_ADDR , 0 , GPIO_SPACE_SIZE}, - {"GPIO4_BASE_ADDR", GPIO4_BASE_ADDR , 0 , GPIO_SPACE_SIZE}, - {"GPIO5_BASE_ADDR", GPIO5_BASE_ADDR , 0 , GPIO_SPACE_SIZE}, - {"GPIO6_BASE_ADDR", GPIO6_BASE_ADDR , 0 , GPIO_SPACE_SIZE} -}; -/* - * name - USER signal name assigned to the pin ( for printks) - * mux_func - enum index NAME for the pad_cfg function - * pin_num - pin_number if mux_func is GPIO, if not a GPIO it is -1 - * mux_ptr - pointer to the corresponding pad_cfg_reg - * (used for pad release ) - * mux_save - preserve here original PAD_CNF value for this - * pin (used for pad release) - * dir - if GPIO: 0 - OUT , 1 - IN - * dir_save - save original pin direction - * drv - initial drive level "0" or "1" - * drv_save - save original pin drive level - * valid - 1 if successfuly configured -*/ -typedef struct { - char *name; - u32 mux_func; - int pin_num; - u16 *mux_ptr; - u16 mux_save; - u8 dir; - u8 dir_save; - u8 drv; - u8 drv_save; - u8 valid; -} user_pad_cfg_t; - -/* - * need to ensure that enums are in sync with the - * omap_mux_pin_cfg table, these enums designate - * functions that OMAP pads can be configured to - */ -enum { - B23_OMAP3430_GPIO_167, - D23_OMAP3430_GPIO_126, - H1_OMAP3430_GPIO_62, - H1_OMAP3430_GPMC_n_w_p, - T8_OMAP3430_GPMC_n_c_s4, - T8_OMAP3430_GPIO_55, - R25_OMAP3430_GPIO_156, - R27_OMAP3430_GPIO_128, - K8_OMAP3430_GPIO_64, - K8_GPMC_WAIT2, - G3_OMAP3430_GPIO_60, - G3_OMAP3430_n_b_e0_CLE, - C6_GPMC_WAIT3, - J1_OMAP3430_GPIO_61, - C6_OMAP3430_GPIO_65, - - END_OF_TABLE -}; - -/* - * number of GPIOS we plan to grab - */ -#define GPIO_SLOTS 8 - -/* - * user_pads_init() reads(and saves) from/to this table - * used in conjunction with omap_3430_mux_t table in .h file - * because the way it's done in the kernel code - * TODO: implement restore of the the original cfg and i/o regs - */ - -static user_pad_cfg_t user_pad_cfg[] = { - /* - * name,pad_func,pin_num, mux_ptr, mux_sav, dir, - * dir_sav, drv, drv_save, valid - */ - {"AST_WAKEUP", B23_OMAP3430_GPIO_167, 167, NULL, 0, - DIR_OUT, 0, DRV_HI, 0, 0}, - {"AST_RESET", D23_OMAP3430_GPIO_126, 126, NULL, 0, - DIR_OUT, 0, DRV_HI, 0, 0}, - {"AST__rn_b", K8_GPMC_WAIT2, 64, NULL, 0, - DIR_INP, 0, 0, 0, 0}, - {"AST_INTR", H1_OMAP3430_GPIO_62, 62, NULL, 0, - DIR_INP, 0, DRV_HI, 0, 0}, - {"AST_CS", T8_OMAP3430_GPMC_n_c_s4, 55, NULL, 0, - DIR_OUT, 0, DRV_HI, 0, 0}, - {"LED_0", R25_OMAP3430_GPIO_156, 156, NULL, 0, - DIR_OUT, 0, DRV_LO, 0, 0}, - {"LED_1", R27_OMAP3430_GPIO_128, 128, NULL, 0, - DIR_OUT, 0, DRV_LO, 0, 0}, - {"AST_CLE", G3_OMAP3430_n_b_e0_CLE , 60, NULL, 0, - DIR_OUT, 0, DRV_LO, 0, 0}, - /* - * Z terminator, must always be present - * for sanity check, don't remove - */ - {NULL} -}; - -#define GPIO_BANK(pin) (pin >> 5) -#define REG_WIDTH 32 -#define GPIO_REG_VMA(pin_num, offset) \ - (gpio_vma_tab[GPIO_BANK(pin_num)].virt_addr + offset) - -/* - * OMAP GPIO_REG 32 BIT MASK for a bit or - * flag in gpio_No[0..191] apply it to a 32 bit - * location to set clear or check on a corresponding - * gpio bit or flag - */ -#define GPIO_REG_MASK(pin_num) (1 << \ - (pin_num - (GPIO_BANK(pin_num) * REG_WIDTH))) - -/* - * OMAP GPIO registers bitwise access macros - */ - -#define OMAP_GPIO_BIT(pin_num, reg) \ - ((*((u32 *)GPIO_REG_VMA(pin_num, reg)) \ - & GPIO_REG_MASK(pin_num)) ? 1 : 0) - -#define RD_OMAP_GPIO_BIT(pin_num, v) OMAP_GPIO_BIT(pin_num, reg) - -/* - *these are superfast set/clr bitbang macro, 48ns cyc tyme - */ -#define OMAP_SET_GPIO(pin_num) \ - (*(u32 *)GPIO_REG_VMA(pin_num, GPIO_SET_DATAOUT) \ - = GPIO_REG_MASK(pin_num)) -#define OMAP_CLR_GPIO(pin_num) \ - (*(u32 *)GPIO_REG_VMA(pin_num, GPIO_CLEAR_DATAOUT) \ - = GPIO_REG_MASK(pin_num)) - -#define WR_OMAP_GPIO_BIT(pin_num, v) \ - (v ? (*(u32 *)GPIO_REG_VMA(pin_num, \ - GPIO_SET_DATAOUT) = GPIO_REG_MASK(pin_num)) \ - : (*(u32 *)GPIO_REG_VMA(pin_num, \ - GPIO_CLEAR_DATAOUT) = GPIO_REG_MASK(pin_num))) - -/* - * Note this pin cfg mimicks similar implementation - * in linux kernel, which unfortunately doesn't allow - * us to dynamically insert new custom GPIO mux - * configurations all REG definitions used in this - * applications. to add a new pad_cfg function, insert - * a new ENUM and new pin_cfg entry in omap_mux_pin_cfg[] - * table below - * - * offset - note this is a word offset since the - * SCM regs are 16 bit packed in one 32 bit word - * mux_val - just enough to describe pins used - */ -typedef struct { - char *name; - u16 offset; - u16 mux_val; -} omap_3430_mux_t; - -/* - * "OUTIN" is configuration when DATA reg drives the - * pin but the level at the pin can be sensed - */ -#define PAD_AS_OUTIN (OMAP34XX_MUX_MODE4 | \ - OMAP34XX_PIN_OUTPUT | OMAP34XX_PIN_INPUT) - -omap_3430_mux_t omap_mux_pin_cfg[] = { - /* - * B23_OMAP3430_GPIO_167 - GPIO func to PAD 167 WB wakeup - * D23_OMAP3430_GPIO_126 - drive GPIO_126 ( AST RESET) - * H1_OMAP3430_GPIO_62 - need a pullup on this pin - * H1_OMAP3430_GPMC_n_w_p - GPMC NAND CTRL n_w_p out - * T8_OMAP3430_GPMC_n_c_s4" - T8 is controlled b_y GPMC NAND ctrl - * R25_OMAP3430_GPIO_156 - OMAPZOOM drive LED_0 - * R27_OMAP3430_GPIO_128 - OMAPZOOM drive LED_1 - * K8_OMAP3430_GPIO_64 - OMAPZOOM drive LED_2 - * K8_GPMC_WAIT2 - GPMC WAIT2 function on PAD K8 - * G3_OMAP3430_GPIO_60 - OMAPZOOM drive LED_3 - * G3_OMAP3430_n_b_e0_CLE -GPMC NAND ctrl CLE signal - */ - - {"B23_OMAP3430_GPIO_167", 0x0130, (OMAP34XX_MUX_MODE4)}, - {"D23_OMAP3430_GPIO_126", 0x0132, (OMAP34XX_MUX_MODE4)}, - {"H1_OMAP3430_GPIO_62", 0x00CA, (OMAP34XX_MUX_MODE4 | - OMAP3_INPUT_EN | OMAP34XX_PIN_INPUT_PULLUP) }, - {"H1_OMAP3430_GPMC_n_w_p", 0x00CA, (OMAP34XX_MUX_MODE0)}, - {"T8_OMAP3430_GPMC_n_c_s4", 0x00B6, (OMAP34XX_MUX_MODE0) }, - {"T8_OMAP3430_GPIO_55", 0x00B6, (OMAP34XX_MUX_MODE4) }, - {"R25_OMAP3430_GPIO_156", 0x018C, (OMAP34XX_MUX_MODE4) }, - {"R27_OMAP3430_GPIO_128", 0x0154, (OMAP34XX_MUX_MODE4) }, - {"K8_OMAP3430_GPIO_64", 0x00d0, (OMAP34XX_MUX_MODE4) }, - {"K8_GPMC_WAIT2", 0x00d0, (OMAP34XX_MUX_MODE0) }, - {"G3_OMAP3430_GPIO_60", 0x00C6, (OMAP34XX_MUX_MODE4 | - OMAP3_INPUT_EN)}, - {"G3_OMAP3430_n_b_e0_CLE", 0x00C6, (OMAP34XX_MUX_MODE0)}, - {"C6_GPMC_WAIT3", 0x00d2, (OMAP34XX_MUX_MODE0)}, - {"C6_OMAP3430_GPIO_65", 0x00d2, (OMAP34XX_MUX_MODE4 | - OMAP3_INPUT_EN)}, - {"J1_OMAP3430_GPIO_61", 0x00C8, (OMAP34XX_MUX_MODE4 | - OMAP3_INPUT_EN | OMAP34XX_PIN_INPUT_PULLUP)}, - /* - * don't remove, used for sanity check. - */ - {"END_OF_TABLE"} -}; - - -#endif /* _INCLUDED_CYASMEMMAP_H_ */ - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_kernel.h b/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_kernel.h deleted file mode 100644 index 5a64bb6..0000000 --- a/drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_kernel.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Cypress Antioch OMAP KERNEL file (cyanomapdev_kernel.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor, -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef __CY_AS_OMAP_DEV_KERNEL_H__ -#define __CY_AS_OMAP_DEV_KERNEL_H__ - - -#include -#include -#include - -/* include does not seem to work - * moving for patch submission -#include -*/ -#include - -/* - * Constants - */ -#define CY_AS_OMAP_KERNEL_HAL_SIG (0x1441) - - -/* - * Data structures - */ -typedef struct cy_as_omap_dev_kernel { - /* This is the signature for this data structure */ - unsigned int m_sig; - - /* Address base of Antioch Device */ - void *m_addr_base; - - /* This is a pointer to the next Antioch device in the system */ - struct cy_as_omap_dev_kernel *m_next_p; - - /* This is for thread sync */ - struct completion thread_complete; - - /* This is for thread to wait for interrupts */ - cy_as_hal_sleep_channel thread_sc; - - /* This is for thread to exit upon StopOmapKernel */ - int thread_flag; /* set 1 to exit */ - - int dma_ch; - - /* This is for dma sync */ - struct completion dma_complete; -} cy_as_omap_dev_kernel; - -#endif - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/block/Kconfig b/drivers/staging/westbridge/astoria/block/Kconfig deleted file mode 100644 index 851bf96a..0000000 --- a/drivers/staging/westbridge/astoria/block/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# -# West Bridge block driver configuration -# - -config WESTBRIDGE_BLOCK_DRIVER - tristate "West Bridge Block Driver" - help - Include the West Bridge based block driver - diff --git a/drivers/staging/westbridge/astoria/block/Makefile b/drivers/staging/westbridge/astoria/block/Makefile deleted file mode 100644 index 4a45dd0..0000000 --- a/drivers/staging/westbridge/astoria/block/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the kernel westbridge block driver -# - -ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) - EXTRA_CFLAGS += -DWESTBRIDGE_NDEBUG -endif - -obj-$(CONFIG_WESTBRIDGE_BLOCK_DRIVER) += cyasblkdev.o -cyasblkdev-y := cyasblkdev_block.o cyasblkdev_queue.o - diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_block.c b/drivers/staging/westbridge/astoria/block/cyasblkdev_block.c deleted file mode 100644 index 87452bd..0000000 --- a/drivers/staging/westbridge/astoria/block/cyasblkdev_block.c +++ /dev/null @@ -1,1631 +0,0 @@ -/* cyanblkdev_block.c - West Bridge Linux Block Driver source file -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * Linux block driver implementation for Cypress West Bridge. - * Based on the mmc block driver implementation by Andrew Christian - * for the linux 2.6.26 kernel. - * mmc_block.c, 5/28/2002 - */ - -/* - * Block driver for media (i.e., flash cards) - * - * Copyright 2002 Hewlett-Packard Company - * - * Use consistent with the GNU GPL is permitted, - * provided that this copyright notice is - * preserved in its entirety in all copies and derived works. - * - * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Many thanks to Alessandro Rubini and Jonathan Corbet! - * - * Author: Andrew Christian - * 28 May 2002 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include "cyasblkdev_queue.h" - -#define CYASBLKDEV_SHIFT 0 /* Only a single partition. */ -#define CYASBLKDEV_MAX_REQ_LEN (256) -#define CYASBLKDEV_NUM_MINORS (256 >> CYASBLKDEV_SHIFT) -#define CY_AS_TEST_NUM_BLOCKS (64) -#define CYASBLKDEV_MINOR_0 1 -#define CYASBLKDEV_MINOR_1 2 -#define CYASBLKDEV_MINOR_2 3 - -static int major; -module_param(major, int, 0444); -MODULE_PARM_DESC(major, - "specify the major device number for cyasblkdev block driver"); - -/* parameters passed from the user space */ -static int vfat_search; -module_param(vfat_search, bool, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(vfat_search, - "dynamically find the location of the first sector"); - -static int private_partition_bus = -1; -module_param(private_partition_bus, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(private_partition_bus, - "bus number for private partition"); - -static int private_partition_size = -1; -module_param(private_partition_size, int, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(private_partition_size, - "size of the private partition"); - -/* - * There is one cyasblkdev_blk_data per slot. - */ -struct cyasblkdev_blk_data { - spinlock_t lock; - int media_count[2]; - const struct block_device_operations *blkops; - unsigned int usage; - unsigned int suspended; - - /* handle to the west bridge device this handle, typdefed as *void */ - cy_as_device_handle dev_handle; - - /* our custom structure, in addition to request queue, - * adds lock & semaphore items*/ - struct cyasblkdev_queue queue; - - /* 16 entries is enough given max request size - * 16 * 4K (64 K per request)*/ - struct scatterlist sg[16]; - - /* non-zero enables printk of executed reqests */ - unsigned int dbgprn_flags; - - /*gen_disk for private, system disk */ - struct gendisk *system_disk; - cy_as_media_type system_disk_type; - cy_bool system_disk_read_only; - cy_bool system_disk_bus_num; - - /* sector size for the medium */ - unsigned int system_disk_blk_size; - unsigned int system_disk_first_sector; - unsigned int system_disk_unit_no; - - /*gen_disk for bus 0 */ - struct gendisk *user_disk_0; - cy_as_media_type user_disk_0_type; - cy_bool user_disk_0_read_only; - cy_bool user_disk_0_bus_num; - - /* sector size for the medium */ - unsigned int user_disk_0_blk_size; - unsigned int user_disk_0_first_sector; - unsigned int user_disk_0_unit_no; - - /*gen_disk for bus 1 */ - struct gendisk *user_disk_1; - cy_as_media_type user_disk_1_type; - cy_bool user_disk_1_read_only; - cy_bool user_disk_1_bus_num; - - /* sector size for the medium */ - unsigned int user_disk_1_blk_size; - unsigned int user_disk_1_first_sector; - unsigned int user_disk_1_unit_no; -}; - -/* pointer to west bridge block data device superstructure */ -static struct cyasblkdev_blk_data *gl_bd; - -static DEFINE_SEMAPHORE(open_lock); - -/* local forwardd declarationss */ -static cy_as_device_handle *cyas_dev_handle; -static void cyasblkdev_blk_deinit(struct cyasblkdev_blk_data *bd); - -/*change debug print options */ - #define DBGPRN_RD_RQ (1 < 0) - #define DBGPRN_WR_RQ (1 < 1) - #define DBGPRN_RQ_END (1 < 2) - -int blkdev_ctl_dbgprn( - int prn_flags - ) -{ - int cur_options = gl_bd->dbgprn_flags; - - DBGPRN_FUNC_NAME; - - /* set new debug print options */ - gl_bd->dbgprn_flags = prn_flags; - - /* return previous */ - return cur_options; -} -EXPORT_SYMBOL(blkdev_ctl_dbgprn); - -static struct cyasblkdev_blk_data *cyasblkdev_blk_get( - struct gendisk *disk - ) -{ - struct cyasblkdev_blk_data *bd; - - DBGPRN_FUNC_NAME; - - down(&open_lock); - - bd = disk->private_data; - - if (bd && (bd->usage == 0)) - bd = NULL; - - if (bd) { - bd->usage++; - #ifndef NBDEBUG - cy_as_hal_print_message( - "cyasblkdev_blk_get: usage = %d\n", bd->usage); - #endif - } - up(&open_lock); - - return bd; -} - -static void cyasblkdev_blk_put( - struct cyasblkdev_blk_data *bd - ) -{ - DBGPRN_FUNC_NAME; - - down(&open_lock); - - if (bd) { - bd->usage--; - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - " cyasblkdev_blk_put , bd->usage= %d\n", bd->usage); - #endif - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev: blk_put(bd) on bd = NULL!: usage = %d\n", - bd->usage); - #endif - up(&open_lock); - return; - } - - if (bd->usage == 0) { - put_disk(bd->user_disk_0); - put_disk(bd->user_disk_1); - put_disk(bd->system_disk); - cyasblkdev_cleanup_queue(&bd->queue); - - if (CY_AS_ERROR_SUCCESS != - cy_as_storage_release(bd->dev_handle, 0, 0, 0, 0)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev: cannot release bus 0\n"); - #endif - } - - if (CY_AS_ERROR_SUCCESS != - cy_as_storage_release(bd->dev_handle, 1, 0, 0, 0)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev: cannot release bus 1\n"); - #endif - } - - if (CY_AS_ERROR_SUCCESS != - cy_as_storage_stop(bd->dev_handle, 0, 0)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev: cannot stop storage stack\n"); - #endif - } - - #ifdef __CY_ASTORIA_SCM_KERNEL_HAL__ - /* If the SCM Kernel HAL is being used, disable the use - * of scatter/gather lists at the end of block driver usage. - */ - cy_as_hal_disable_scatter_list(cyasdevice_gethaltag()); - #endif - - /*ptr to global struct cyasblkdev_blk_data */ - gl_bd = NULL; - kfree(bd); - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev (blk_put): usage = %d\n", - bd->usage); - #endif - up(&open_lock); -} - -static int cyasblkdev_blk_open( - struct block_device *bdev, - fmode_t mode - ) -{ - struct cyasblkdev_blk_data *bd = cyasblkdev_blk_get(bdev->bd_disk); - int ret = -ENXIO; - - DBGPRN_FUNC_NAME; - - if (bd) { - if (bd->usage == 2) - check_disk_change(bdev); - - ret = 0; - - if (bdev->bd_disk == bd->user_disk_0) { - if ((mode & FMODE_WRITE) && bd->user_disk_0_read_only) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "device marked as readonly " - "and write requested\n"); - #endif - - cyasblkdev_blk_put(bd); - ret = -EROFS; - } - } else if (bdev->bd_disk == bd->user_disk_1) { - if ((mode & FMODE_WRITE) && bd->user_disk_1_read_only) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "device marked as readonly " - "and write requested\n"); - #endif - - cyasblkdev_blk_put(bd); - ret = -EROFS; - } - } else if (bdev->bd_disk == bd->system_disk) { - if ((mode & FMODE_WRITE) && bd->system_disk_read_only) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "device marked as readonly " - "and write requested\n"); - #endif - - cyasblkdev_blk_put(bd); - ret = -EROFS; - } - } - } - - return ret; -} - -static int cyasblkdev_blk_release( - struct gendisk *disk, - fmode_t mode - ) -{ - struct cyasblkdev_blk_data *bd = disk->private_data; - - DBGPRN_FUNC_NAME; - - cyasblkdev_blk_put(bd); - return 0; -} - -static int cyasblkdev_blk_ioctl( - struct block_device *bdev, - fmode_t mode, - unsigned int cmd, - unsigned long arg - ) -{ - DBGPRN_FUNC_NAME; - - if (cmd == HDIO_GETGEO) { - /*for now we only process geometry IOCTL*/ - struct hd_geometry geo; - - memset(&geo, 0, sizeof(struct hd_geometry)); - - geo.cylinders = get_capacity(bdev->bd_disk) / (4 * 16); - geo.heads = 4; - geo.sectors = 16; - geo.start = get_start_sect(bdev); - - /* copy to user space */ - return copy_to_user((void __user *)arg, &geo, sizeof(geo)) - ? -EFAULT : 0; - } - - return -ENOTTY; -} - -/* check_events block_device opp - * this one is called by kernel to confirm if the media really changed - * as we indicated by issuing check_disk_change() call */ -unsigned int cyasblkdev_check_events(struct gendisk *gd, unsigned int clearing) -{ - struct cyasblkdev_blk_data *bd; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("cyasblkdev_media_changed() is called\n"); - #endif - - if (gd) - bd = gd->private_data; - else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "cyasblkdev_media_changed() is called, " - "but gd is null\n"); - #endif - } - - /* return media change state - DISK_EVENT_MEDIA_CHANGE yes, 0 no */ - return 0; -} - -/* this one called by kernel to give us a chence - * to prep the new media before it starts to rescaning - * of the newlly inserted SD media */ -int cyasblkdev_revalidate_disk(struct gendisk *gd) -{ - /*int (*revalidate_disk) (struct gendisk *); */ - - #ifndef WESTBRIDGE_NDEBUG - if (gd) - cy_as_hal_print_message( - "cyasblkdev_revalidate_disk() is called, " - "(gl_bd->usage:%d)\n", gl_bd->usage); - #endif - - /* 0 means ok, kern can go ahead with partition rescan */ - return 0; -} - - -/*standard block device driver interface */ -static struct block_device_operations cyasblkdev_bdops = { - .open = cyasblkdev_blk_open, - .release = cyasblkdev_blk_release, - .ioctl = cyasblkdev_blk_ioctl, - /* .getgeo = cyasblkdev_blk_getgeo, */ - /* added to support media removal( real and simulated) media */ - .check_events = cyasblkdev_check_events, - /* added to support media removal( real and simulated) media */ - .revalidate_disk = cyasblkdev_revalidate_disk, - .owner = THIS_MODULE, -}; - -/* west bridge block device prep request function */ -static int cyasblkdev_blk_prep_rq( - struct cyasblkdev_queue *bq, - struct request *req - ) -{ - struct cyasblkdev_blk_data *bd = bq->data; - int stat = BLKPREP_OK; - - DBGPRN_FUNC_NAME; - - /* If we have no device, we haven't finished initialising. */ - if (!bd || !bd->dev_handle) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message(KERN_ERR - "cyasblkdev %s: killing request - no device/host\n", - req->rq_disk->disk_name); - #endif - stat = BLKPREP_KILL; - } - - if (bd->suspended) { - blk_plug_device(bd->queue.queue); - stat = BLKPREP_DEFER; - } - - /* Check for excessive requests.*/ - if (blk_rq_pos(req) + blk_rq_sectors(req) > get_capacity(req->rq_disk)) { - cy_as_hal_print_message("cyasblkdev: bad request address\n"); - stat = BLKPREP_KILL; - } - - return stat; -} - -/*west bridge storage async api on_completed callback */ -static void cyasblkdev_issuecallback( - /* Handle to the device completing the storage operation */ - cy_as_device_handle handle, - /* The media type completing the operation */ - cy_as_media_type type, - /* The device completing the operation */ - uint32_t device, - /* The unit completing the operation */ - uint32_t unit, - /* The block number of the completed operation */ - uint32_t block_number, - /* The type of operation */ - cy_as_oper_type op, - /* The error status */ - cy_as_return_status_t status - ) -{ - int retry_cnt = 0; - DBGPRN_FUNC_NAME; - - if (status != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: async r/w: op:%d failed with error %d at address %d\n", - __func__, op, status, block_number); - #endif - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s calling blk_end_request from issue_callback " - "req=0x%x, status=0x%x, nr_sectors=0x%x\n", - __func__, (unsigned int) gl_bd->queue.req, status, - (unsigned int) blk_rq_sectors(gl_bd->queue.req)); - #endif - - /* note: blk_end_request w/o __ prefix should - * not require spinlocks on the queue*/ - while (blk_end_request(gl_bd->queue.req, - status, blk_rq_sectors(gl_bd->queue.req)*512)) { - retry_cnt++; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s blkdev_callback: ended rq on %d sectors, " - "with err:%d, n:%d times\n", __func__, - (int)blk_rq_sectors(gl_bd->queue.req), status, - retry_cnt - ); - #endif - - spin_lock_irq(&gl_bd->lock); - - /*elevate next request, if there is one*/ - if (!blk_queue_plugged(gl_bd->queue.queue)) { - /* queue is not plugged */ - gl_bd->queue.req = blk_fetch_request(gl_bd->queue.queue); - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s blkdev_callback: " - "blk_fetch_request():%p\n", - __func__, gl_bd->queue.req); - #endif - } - - if (gl_bd->queue.req) { - spin_unlock_irq(&gl_bd->lock); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s blkdev_callback: about to " - "call issue_fn:%p\n", __func__, gl_bd->queue.req); - #endif - - gl_bd->queue.issue_fn(&gl_bd->queue, gl_bd->queue.req); - } else { - spin_unlock_irq(&gl_bd->lock); - } -} - -/* issue astoria blkdev request (issue_fn) */ -static int cyasblkdev_blk_issue_rq( - struct cyasblkdev_queue *bq, - struct request *req - ) -{ - struct cyasblkdev_blk_data *bd = bq->data; - int index = 0; - int ret = CY_AS_ERROR_SUCCESS; - uint32_t req_sector = 0; - uint32_t req_nr_sectors = 0; - int bus_num = 0; - int lcl_unit_no = 0; - - DBGPRN_FUNC_NAME; - - /* - * will construct a scatterlist for the given request; - * the return value is the number of actually used - * entries in the resulting list. Then, this scatterlist - * can be used for the actual DMA prep operation. - */ - spin_lock_irq(&bd->lock); - index = blk_rq_map_sg(bq->queue, req, bd->sg); - - if (req->rq_disk == bd->user_disk_0) { - bus_num = bd->user_disk_0_bus_num; - req_sector = blk_rq_pos(req) + gl_bd->user_disk_0_first_sector; - req_nr_sectors = blk_rq_sectors(req); - lcl_unit_no = gl_bd->user_disk_0_unit_no; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: request made to disk 0 " - "for sector=%d, num_sectors=%d, unit_no=%d\n", - __func__, req_sector, (int) blk_rq_sectors(req), - lcl_unit_no); - #endif - } else if (req->rq_disk == bd->user_disk_1) { - bus_num = bd->user_disk_1_bus_num; - req_sector = blk_rq_pos(req) + gl_bd->user_disk_1_first_sector; - /*SECT_NUM_TRANSLATE(blk_rq_sectors(req));*/ - req_nr_sectors = blk_rq_sectors(req); - lcl_unit_no = gl_bd->user_disk_1_unit_no; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: request made to disk 1 for " - "sector=%d, num_sectors=%d, unit_no=%d\n", __func__, - req_sector, (int) blk_rq_sectors(req), lcl_unit_no); - #endif - } else if (req->rq_disk == bd->system_disk) { - bus_num = bd->system_disk_bus_num; - req_sector = blk_rq_pos(req) + gl_bd->system_disk_first_sector; - req_nr_sectors = blk_rq_sectors(req); - lcl_unit_no = gl_bd->system_disk_unit_no; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: request made to system disk " - "for sector=%d, num_sectors=%d, unit_no=%d\n", __func__, - req_sector, (int) blk_rq_sectors(req), lcl_unit_no); - #endif - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message( - "%s: invalid disk used for request\n", __func__); - } - #endif - - spin_unlock_irq(&bd->lock); - - if (rq_data_dir(req) == READ) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: calling readasync() " - "req_sector=0x%x, req_nr_sectors=0x%x, bd->sg:%x\n\n", - __func__, req_sector, req_nr_sectors, (uint32_t)bd->sg); - #endif - - ret = cy_as_storage_read_async(bd->dev_handle, bus_num, 0, - lcl_unit_no, req_sector, bd->sg, req_nr_sectors, - (cy_as_storage_callback)cyasblkdev_issuecallback); - - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s:readasync() error %d at " - "address %ld, unit no %d\n", __func__, ret, - blk_rq_pos(req), lcl_unit_no); - cy_as_hal_print_message("%s:ending i/o request " - "on reg:%x\n", __func__, (uint32_t)req); - #endif - - while (blk_end_request(req, - (ret == CY_AS_ERROR_SUCCESS), - req_nr_sectors*512)) - ; - - bq->req = NULL; - } - } else { - ret = cy_as_storage_write_async(bd->dev_handle, bus_num, 0, - lcl_unit_no, req_sector, bd->sg, req_nr_sectors, - (cy_as_storage_callback)cyasblkdev_issuecallback); - - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: write failed with " - "error %d at address %ld, unit no %d\n", - __func__, ret, blk_rq_pos(req), lcl_unit_no); - #endif - - /*end IO op on this request(does both - * end_that_request_... _first & _last) */ - while (blk_end_request(req, - (ret == CY_AS_ERROR_SUCCESS), - req_nr_sectors*512)) - ; - - bq->req = NULL; - } - } - - return ret; -} - -static unsigned long -dev_use[CYASBLKDEV_NUM_MINORS / (8 * sizeof(unsigned long))]; - - -/* storage event callback (note: called in astoria isr context) */ -static void cyasblkdev_storage_callback( - cy_as_device_handle dev_h, - cy_as_bus_number_t bus, - uint32_t device, - cy_as_storage_event evtype, - void *evdata - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: bus:%d, device:%d, evtype:%d, " - "evdata:%p\n ", __func__, bus, device, evtype, evdata); - #endif - - switch (evtype) { - case cy_as_storage_processor: - break; - - case cy_as_storage_removed: - break; - - case cy_as_storage_inserted: - break; - - default: - break; - } -} - -#define SECTORS_TO_SCAN 4096 - -uint32_t cyasblkdev_get_vfat_offset(int bus_num, int unit_no) -{ - /* - * for sd media, vfat partition boot record is not always - * located at sector it greatly depends on the system and - * software that was used to format the sd however, linux - * fs layer always expects it at sector 0, this function - * finds the offset and then uses it in all media r/w - * operations - */ - int sect_no, stat; - uint8_t *sect_buf; - bool br_found = false; - - DBGPRN_FUNC_NAME; - - sect_buf = kmalloc(1024, GFP_KERNEL); - - /* since HAL layer always uses sg lists instead of the - * buffer (for hw dmas) we need to initialize the sg list - * for local buffer*/ - sg_init_one(gl_bd->sg, sect_buf, 512); - - /* - * Check MPR partition table 1st, then try to scan through - * 1st 384 sectors until BR signature(intel JMP istruction - * code and ,0x55AA) is found - */ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s scanning media for vfat partition...\n", __func__); - #endif - - for (sect_no = 0; sect_no < SECTORS_TO_SCAN; sect_no++) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s before cyasstorageread " - "gl_bd->sg addr=0x%x\n", __func__, - (unsigned int) gl_bd->sg); - #endif - - stat = cy_as_storage_read( - /* Handle to the device of interest */ - gl_bd->dev_handle, - /* The bus to access */ - bus_num, - /* The device to access */ - 0, - /* The unit to access */ - unit_no, - /* absolute sector number */ - sect_no, - /* sg structure */ - gl_bd->sg, - /* The number of blocks to be read */ - 1 - ); - - /* try only sectors with boot signature */ - if ((sect_buf[510] == 0x55) && (sect_buf[511] == 0xaa)) { - /* vfat boot record may also be located at - * sector 0, check it first */ - if (sect_buf[0] == 0xEB) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s vfat partition found " - "at sector:%d\n", - __func__, sect_no); - #endif - - br_found = true; - break; - } - } - - if (stat != 0) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s sector scan error\n", - __func__); - #endif - break; - } - } - - kfree(sect_buf); - - if (br_found) { - return sect_no; - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s vfat partition is not found, using 0 offset\n", - __func__); - #endif - return 0; - } -} - -cy_as_storage_query_device_data dev_data = {0}; - -static int cyasblkdev_add_disks(int bus_num, - struct cyasblkdev_blk_data *bd, - int total_media_count, - int devidx) -{ - int ret = 0; - uint64_t disk_cap; - int lcl_unit_no; - cy_as_storage_query_unit_data unit_data = {0}; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s:query device: " - "type:%d, removable:%d, writable:%d, " - "blksize %d, units:%d, locked:%d, " - "erase_sz:%d\n", - __func__, - dev_data.desc_p.type, - dev_data.desc_p.removable, - dev_data.desc_p.writeable, - dev_data.desc_p.block_size, - dev_data.desc_p.number_units, - dev_data.desc_p.locked, - dev_data.desc_p.erase_unit_size - ); - #endif - - /* make sure that device is not locked */ - if (dev_data.desc_p.locked) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: device is locked\n", __func__); - #endif - ret = cy_as_storage_release( - bd->dev_handle, bus_num, 0, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s cannot release" - " storage\n", __func__); - #endif - goto out; - } - goto out; - } - - unit_data.device = 0; - unit_data.unit = 0; - unit_data.bus = bus_num; - ret = cy_as_storage_query_unit(bd->dev_handle, - &unit_data, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot query " - "%d device unit - reason code %d\n", - __func__, bus_num, ret); - #endif - goto out; - } - - if (private_partition_bus == bus_num) { - if (private_partition_size > 0) { - ret = cy_as_storage_create_p_partition( - bd->dev_handle, bus_num, 0, - private_partition_size, 0, 0); - if ((ret != CY_AS_ERROR_SUCCESS) && - (ret != CY_AS_ERROR_ALREADY_PARTITIONED)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_storage_" - "create_p_partition after size > 0 check " - "failed with error code %d\n", - __func__, ret); - #endif - - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = 0; - - } else if (ret == CY_AS_ERROR_ALREADY_PARTITIONED) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cy_as_storage_create_p_partition " - "indicates memory already partitioned\n", - __func__); - #endif - - /*check to see that partition - * matches size */ - if (unit_data.desc_p.unit_size != - private_partition_size) { - ret = cy_as_storage_remove_p_partition( - bd->dev_handle, - bus_num, 0, 0, 0); - if (ret == CY_AS_ERROR_SUCCESS) { - ret = cy_as_storage_create_p_partition( - bd->dev_handle, bus_num, 0, - private_partition_size, 0, 0); - if (ret == CY_AS_ERROR_SUCCESS) { - unit_data.bus = bus_num; - unit_data.device = 0; - unit_data.unit = 1; - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cy_as_storage_create_p_partition " - "after removal unexpectedly failed " - "with error %d\n", __func__, ret); - #endif - - /* need to requery bus - * seeing as delete - * successful and create - * failed we have changed - * the disk properties */ - unit_data.bus = bus_num; - unit_data.device = 0; - unit_data.unit = 0; - } - - ret = cy_as_storage_query_unit( - bd->dev_handle, - &unit_data, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cannot query %d " - "device unit - reason code %d\n", - __func__, bus_num, ret); - #endif - goto out; - } else { - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = - unit_data.unit; - } - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cy_as_storage_remove_p_partition " - "failed with error %d\n", - __func__, ret); - #endif - - unit_data.bus = bus_num; - unit_data.device = 0; - unit_data.unit = 1; - - ret = cy_as_storage_query_unit( - bd->dev_handle, &unit_data, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cannot query %d " - "device unit - reason " - "code %d\n", __func__, - bus_num, ret); - #endif - goto out; - } - - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = - unit_data.unit; - } - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: partition " - "exists and sizes equal\n", - __func__); - #endif - - /*partition already existed, - * need to query second unit*/ - unit_data.bus = bus_num; - unit_data.device = 0; - unit_data.unit = 1; - - ret = cy_as_storage_query_unit( - bd->dev_handle, &unit_data, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cannot query %d " - "device unit " - "- reason code %d\n", - __func__, bus_num, ret); - #endif - goto out; - } else { - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = unit_data.unit; - } - } - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cy_as_storage_create_p_partition " - "created successfully\n", __func__); - #endif - - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size - - private_partition_size); - - lcl_unit_no = 1; - } - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message( - "%s: invalid partition_size%d\n", __func__, - private_partition_size); - - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = 0; - } - #endif - } else { - disk_cap = (uint64_t) - (unit_data.desc_p.unit_size); - lcl_unit_no = 0; - } - - if ((bus_num == 0) || - (total_media_count == 1)) { - sprintf(bd->user_disk_0->disk_name, - "cyasblkdevblk%d", devidx); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: disk unit_sz:%lu blk_sz:%d, " - "start_blk:%lu, capacity:%llu\n", - __func__, (unsigned long) - unit_data.desc_p.unit_size, - unit_data.desc_p.block_size, - (unsigned long) - unit_data.desc_p.start_block, - (uint64_t)disk_cap - ); - #endif - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: setting gendisk disk " - "capacity to %d\n", __func__, (int) disk_cap); - #endif - - /* initializing bd->queue */ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: init bd->queue\n", - __func__); - #endif - - /* this will create a - * queue kernel thread */ - cyasblkdev_init_queue( - &bd->queue, &bd->lock); - - bd->queue.prep_fn = cyasblkdev_blk_prep_rq; - bd->queue.issue_fn = cyasblkdev_blk_issue_rq; - bd->queue.data = bd; - - /*blk_size should always - * be a multiple of 512, - * set to the max to ensure - * that all accesses aligned - * to the greatest multiple, - * can adjust request to - * smaller block sizes - * dynamically*/ - - bd->user_disk_0_read_only = !dev_data.desc_p.writeable; - bd->user_disk_0_blk_size = dev_data.desc_p.block_size; - bd->user_disk_0_type = dev_data.desc_p.type; - bd->user_disk_0_bus_num = bus_num; - bd->user_disk_0->major = major; - bd->user_disk_0->first_minor = devidx << CYASBLKDEV_SHIFT; - bd->user_disk_0->minors = 8; - bd->user_disk_0->fops = &cyasblkdev_bdops; - bd->user_disk_0->events = DISK_EVENT_MEDIA_CHANGE; - bd->user_disk_0->private_data = bd; - bd->user_disk_0->queue = bd->queue.queue; - bd->dbgprn_flags = DBGPRN_RD_RQ; - bd->user_disk_0_unit_no = lcl_unit_no; - - blk_queue_logical_block_size(bd->queue.queue, - bd->user_disk_0_blk_size); - - set_capacity(bd->user_disk_0, - disk_cap); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: returned from set_capacity %d\n", - __func__, (int) disk_cap); - #endif - - /* need to start search from - * public partition beginning */ - if (vfat_search) { - bd->user_disk_0_first_sector = - cyasblkdev_get_vfat_offset( - bd->user_disk_0_bus_num, - bd->user_disk_0_unit_no); - } else { - bd->user_disk_0_first_sector = 0; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: set user_disk_0_first " - "sector to %d\n", __func__, - bd->user_disk_0_first_sector); - cy_as_hal_print_message( - "%s: add_disk: disk->major=0x%x\n", - __func__, - bd->user_disk_0->major); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->first_minor=0x%x\n", __func__, - bd->user_disk_0->first_minor); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->minors=0x%x\n", __func__, - bd->user_disk_0->minors); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->disk_name=%s\n", - __func__, - bd->user_disk_0->disk_name); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->part_tbl=0x%x\n", __func__, - (unsigned int) - bd->user_disk_0->part_tbl); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->queue=0x%x\n", __func__, - (unsigned int) - bd->user_disk_0->queue); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->flags=0x%x\n", - __func__, (unsigned int) - bd->user_disk_0->flags); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->driverfs_dev=0x%x\n", - __func__, (unsigned int) - bd->user_disk_0->driverfs_dev); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->slave_dir=0x%x\n", - __func__, (unsigned int) - bd->user_disk_0->slave_dir); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->random=0x%x\n", - __func__, (unsigned int) - bd->user_disk_0->random); - cy_as_hal_print_message( - "%s: add_disk: " - "disk->node_id=0x%x\n", - __func__, (unsigned int) - bd->user_disk_0->node_id); - - #endif - - add_disk(bd->user_disk_0); - - } else if ((bus_num == 1) && - (total_media_count == 2)) { - bd->user_disk_1_read_only = !dev_data.desc_p.writeable; - bd->user_disk_1_blk_size = dev_data.desc_p.block_size; - bd->user_disk_1_type = dev_data.desc_p.type; - bd->user_disk_1_bus_num = bus_num; - bd->user_disk_1->major = major; - bd->user_disk_1->first_minor = (devidx + 1) << CYASBLKDEV_SHIFT; - bd->user_disk_1->minors = 8; - bd->user_disk_1->fops = &cyasblkdev_bdops; - bd->user_disk_1->events = DISK_EVENT_MEDIA_CHANGE; - bd->user_disk_1->private_data = bd; - bd->user_disk_1->queue = bd->queue.queue; - bd->dbgprn_flags = DBGPRN_RD_RQ; - bd->user_disk_1_unit_no = lcl_unit_no; - - sprintf(bd->user_disk_1->disk_name, - "cyasblkdevblk%d", (devidx + 1)); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: disk unit_sz:%lu " - "blk_sz:%d, " - "start_blk:%lu, " - "capacity:%llu\n", - __func__, - (unsigned long) - unit_data.desc_p.unit_size, - unit_data.desc_p.block_size, - (unsigned long) - unit_data.desc_p.start_block, - (uint64_t)disk_cap - ); - #endif - - /*blk_size should always be a - * multiple of 512, set to the max - * to ensure that all accesses - * aligned to the greatest multiple, - * can adjust request to smaller - * block sizes dynamically*/ - if (bd->user_disk_0_blk_size > - bd->user_disk_1_blk_size) { - blk_queue_logical_block_size(bd->queue.queue, - bd->user_disk_0_blk_size); - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: set hard sect_sz:%d\n", - __func__, - bd->user_disk_0_blk_size); - #endif - } else { - blk_queue_logical_block_size(bd->queue.queue, - bd->user_disk_1_blk_size); - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: set hard sect_sz:%d\n", - __func__, - bd->user_disk_1_blk_size); - #endif - } - - set_capacity(bd->user_disk_1, disk_cap); - if (vfat_search) { - bd->user_disk_1_first_sector = - cyasblkdev_get_vfat_offset( - bd->user_disk_1_bus_num, - bd->user_disk_1_unit_no); - } else { - bd->user_disk_1_first_sector - = 0; - } - - add_disk(bd->user_disk_1); - } - - if (lcl_unit_no > 0) { - if (bd->system_disk == NULL) { - bd->system_disk = - alloc_disk(8); - - if (bd->system_disk == NULL) { - kfree(bd); - bd = ERR_PTR(-ENOMEM); - return bd; - } - disk_cap = (uint64_t) - (private_partition_size); - - /* set properties of - * system disk */ - bd->system_disk_read_only = !dev_data.desc_p.writeable; - bd->system_disk_blk_size = dev_data.desc_p.block_size; - bd->system_disk_bus_num = bus_num; - bd->system_disk->major = major; - bd->system_disk->first_minor = - (devidx + 2) << CYASBLKDEV_SHIFT; - bd->system_disk->minors = 8; - bd->system_disk->fops = &cyasblkdev_bdops; - bd->system_disk->events = DISK_EVENT_MEDIA_CHANGE; - bd->system_disk->private_data = bd; - bd->system_disk->queue = bd->queue.queue; - /* don't search for vfat - * with system disk */ - bd->system_disk_first_sector = 0; - sprintf( - bd->system_disk->disk_name, - "cyasblkdevblk%d", (devidx + 2)); - - set_capacity(bd->system_disk, - disk_cap); - - add_disk(bd->system_disk); - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message( - "%s: system disk already allocated %d\n", - __func__, bus_num); - } - #endif - } -out: - return ret; -} - -static struct cyasblkdev_blk_data *cyasblkdev_blk_alloc(void) -{ - struct cyasblkdev_blk_data *bd; - int ret = 0; - cy_as_return_status_t stat = -1; - int bus_num = 0; - int total_media_count = 0; - int devidx = 0; - DBGPRN_FUNC_NAME; - - total_media_count = 0; - devidx = find_first_zero_bit(dev_use, CYASBLKDEV_NUM_MINORS); - if (devidx >= CYASBLKDEV_NUM_MINORS) - return ERR_PTR(-ENOSPC); - - __set_bit(devidx, dev_use); - __set_bit(devidx + 1, dev_use); - - bd = kzalloc(sizeof(struct cyasblkdev_blk_data), GFP_KERNEL); - if (bd) { - gl_bd = bd; - - spin_lock_init(&bd->lock); - bd->usage = 1; - - /* setup the block_dev_ops pointer*/ - bd->blkops = &cyasblkdev_bdops; - - /* Get the device handle */ - bd->dev_handle = cyasdevice_getdevhandle(); - if (0 == bd->dev_handle) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: get device failed\n", __func__); - #endif - ret = ENODEV; - goto out; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s west bridge device handle:%x\n", - __func__, (uint32_t)bd->dev_handle); - #endif - - /* start the storage api and get a handle to the - * device we are interested in. */ - - /* Error code to use if the conditions are not satisfied. */ - ret = ENOMEDIUM; - - stat = cy_as_misc_release_resource(bd->dev_handle, cy_as_bus_0); - if ((stat != CY_AS_ERROR_SUCCESS) && - (stat != CY_AS_ERROR_RESOURCE_NOT_OWNED)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot release " - "resource bus 0 - reason code %d\n", - __func__, stat); - #endif - } - - stat = cy_as_misc_release_resource(bd->dev_handle, cy_as_bus_1); - if ((stat != CY_AS_ERROR_SUCCESS) && - (stat != CY_AS_ERROR_RESOURCE_NOT_OWNED)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot release " - "resource bus 0 - reason code %d\n", - __func__, stat); - #endif - } - - /* start storage stack*/ - stat = cy_as_storage_start(bd->dev_handle, 0, 0x101); - if (stat != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot start storage " - "stack - reason code %d\n", __func__, stat); - #endif - goto out; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: storage started:%d ok\n", - __func__, stat); - #endif - - stat = cy_as_storage_register_callback(bd->dev_handle, - cyasblkdev_storage_callback); - if (stat != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot register callback " - "- reason code %d\n", __func__, stat); - #endif - goto out; - } - - for (bus_num = 0; bus_num < 2; bus_num++) { - stat = cy_as_storage_query_bus(bd->dev_handle, - bus_num, &bd->media_count[bus_num], 0, 0); - if (stat == CY_AS_ERROR_SUCCESS) { - total_media_count = total_media_count + - bd->media_count[bus_num]; - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cannot query %d, " - "reason code: %d\n", - __func__, bus_num, stat); - #endif - goto out; - } - } - - if (total_media_count == 0) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: no storage media was found\n", __func__); - #endif - goto out; - } else if (total_media_count >= 1) { - if (bd->user_disk_0 == NULL) { - - bd->user_disk_0 = - alloc_disk(8); - if (bd->user_disk_0 == NULL) { - kfree(bd); - bd = ERR_PTR(-ENOMEM); - return bd; - } - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message("%s: no available " - "gen_disk for disk 0, " - "physically inconsistent\n", __func__); - } - #endif - } - - if (total_media_count == 2) { - if (bd->user_disk_1 == NULL) { - bd->user_disk_1 = - alloc_disk(8); - if (bd->user_disk_1 == NULL) { - kfree(bd); - bd = ERR_PTR(-ENOMEM); - return bd; - } - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message("%s: no available " - "gen_disk for media, " - "physically inconsistent\n", __func__); - } - #endif - } - #ifndef WESTBRIDGE_NDEBUG - else if (total_media_count > 2) { - cy_as_hal_print_message("%s: count corrupted = 0x%d\n", - __func__, total_media_count); - } - #endif - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: %d device(s) found\n", - __func__, total_media_count); - #endif - - for (bus_num = 0; bus_num <= 1; bus_num++) { - /*claim storage for cpu */ - stat = cy_as_storage_claim(bd->dev_handle, - bus_num, 0, 0, 0); - if (stat != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("%s: cannot claim " - "%d bus - reason code %d\n", - __func__, bus_num, stat); - goto out; - } - - dev_data.bus = bus_num; - dev_data.device = 0; - - stat = cy_as_storage_query_device(bd->dev_handle, - &dev_data, 0, 0); - if (stat == CY_AS_ERROR_SUCCESS) { - cyasblkdev_add_disks(bus_num, bd, - total_media_count, devidx); - } else if (stat == CY_AS_ERROR_NO_SUCH_DEVICE) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: no device on bus %d\n", - __func__, bus_num); - #endif - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cannot query %d device " - "- reason code %d\n", - __func__, bus_num, stat); - #endif - goto out; - } - } /* end for (bus_num = 0; bus_num <= 1; bus_num++)*/ - - return bd; - } -out: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: bd failed to initialize\n", __func__); - #endif - - kfree(bd); - bd = ERR_PTR(-ret); - return bd; -} - - -/*init west bridge block device */ -static int cyasblkdev_blk_initialize(void) -{ - struct cyasblkdev_blk_data *bd; - int res; - - DBGPRN_FUNC_NAME; - - res = register_blkdev(major, "cyasblkdev"); - - if (res < 0) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message(KERN_WARNING - "%s unable to get major %d for cyasblkdev media: %d\n", - __func__, major, res); - #endif - return res; - } - - if (major == 0) - major = res; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s cyasblkdev registered with major number: %d\n", - __func__, major); - #endif - - bd = cyasblkdev_blk_alloc(); - if (IS_ERR(bd)) - return PTR_ERR(bd); - - return 0; -} - -/* start block device */ -static int __init cyasblkdev_blk_init(void) -{ - int res = -ENOMEM; - - DBGPRN_FUNC_NAME; - - /* get the cyasdev handle for future use*/ - cyas_dev_handle = cyasdevice_getdevhandle(); - - if (cyasblkdev_blk_initialize() == 0) - return 0; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("cyasblkdev init error:%d\n", res); - #endif - return res; -} - - -static void cyasblkdev_blk_deinit(struct cyasblkdev_blk_data *bd) -{ - DBGPRN_FUNC_NAME; - - if (bd) { - int devidx; - - if (bd->user_disk_0 != NULL) { - del_gendisk(bd->user_disk_0); - devidx = bd->user_disk_0->first_minor - >> CYASBLKDEV_SHIFT; - __clear_bit(devidx, dev_use); - } - - if (bd->user_disk_1 != NULL) { - del_gendisk(bd->user_disk_1); - devidx = bd->user_disk_1->first_minor - >> CYASBLKDEV_SHIFT; - __clear_bit(devidx, dev_use); - } - - if (bd->system_disk != NULL) { - del_gendisk(bd->system_disk); - devidx = bd->system_disk->first_minor - >> CYASBLKDEV_SHIFT; - __clear_bit(devidx, dev_use); - } - - cyasblkdev_blk_put(bd); - } -} - -/* block device exit */ -static void __exit cyasblkdev_blk_exit(void) -{ - DBGPRN_FUNC_NAME; - - cyasblkdev_blk_deinit(gl_bd); - unregister_blkdev(major, "cyasblkdev"); - -} - -module_init(cyasblkdev_blk_init); -module_exit(cyasblkdev_blk_exit); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("antioch (cyasblkdev) block device driver"); -MODULE_AUTHOR("cypress semiconductor"); - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.c b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.c deleted file mode 100644 index d1996a2..0000000 --- a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.c +++ /dev/null @@ -1,417 +0,0 @@ -/* cyanblkdev_queue.h - Antioch Linux Block Driver queue source file -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor, -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * Request queue handling for Antioch block device driver. - * Based on the mmc queue handling code by Russell King in the - * linux 2.6.10 kernel. - */ - -/* - * linux/drivers/mmc/mmc_queue.c - * - * Copyright (C) 2003 Russell King, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include - -#include "cyasblkdev_queue.h" - -#define CYASBLKDEV_QUEUE_EXIT (1 << 0) -#define CYASBLKDEV_QUEUE_SUSPENDED (1 << 1) -#define CY_AS_USE_ASYNC_API - - - -/* print flags by name */ -const char *rq_flag_bit_names[] = { - "REQ_RW", /* not set, read. set, write */ - "REQ_FAILFAST", /* no low level driver retries */ - "REQ_SORTED", /* elevator knows about this request */ - "REQ_SOFTBARRIER", /* may not be passed by ioscheduler */ - "REQ_HARDBARRIER", /* may not be passed by drive either */ - "REQ_FUA", /* forced unit access */ - "REQ_NOMERGE", /* don't touch this for merging */ - "REQ_STARTED", /* drive already may have started this one */ - "REQ_DONTPREP", /* don't call prep for this one */ - "REQ_QUEUED", /* uses queueing */ - "REQ_ELVPRIV", /* elevator private data attached */ - "REQ_FAILED", /* set if the request failed */ - "REQ_QUIET", /* don't worry about errors */ - "REQ_PREEMPT", /* set for "ide_preempt" requests */ - "REQ_ORDERED_COLOR",/* is before or after barrier */ - "REQ_RW_SYNC", /* request is sync (O_DIRECT) */ - "REQ_ALLOCED", /* request came from our alloc pool */ - "REQ_RW_META", /* metadata io request */ - "REQ_COPY_USER", /* contains copies of user pages */ - "REQ_NR_BITS", /* stops here */ -}; - -void verbose_rq_flags(int flags) -{ - int i; - uint32_t j; - j = 1; - for (i = 0; i < 32; i++) { - if (flags & j) - DBGPRN("<1>%s", rq_flag_bit_names[i]); - j = j << 1; - } -} - - -/* - * Prepare a -BLK_DEV request. Essentially, this means passing the - * preparation off to the media driver. The media driver will - * create request to CyAsDev. - */ -static int cyasblkdev_prep_request( - struct request_queue *q, struct request *req) -{ - DBGPRN_FUNC_NAME; - - /* we only like normal block requests.*/ - if (req->cmd_type != REQ_TYPE_FS && !(req->cmd_flags & REQ_DISCARD)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s:%x bad request received\n", - __func__, current->pid); - #endif - - blk_dump_rq_flags(req, "cyasblkdev bad request"); - return BLKPREP_KILL; - } - - req->cmd_flags |= REQ_DONTPREP; - - return BLKPREP_OK; -} - -/* queue worker thread */ -static int cyasblkdev_queue_thread(void *d) -{ - DECLARE_WAITQUEUE(wait, current); - struct cyasblkdev_queue *bq = d; - struct request_queue *q = bq->queue; - u32 qth_pid; - - DBGPRN_FUNC_NAME; - - /* - * set iothread to ensure that we aren't put to sleep by - * the process freezing. we handle suspension ourselves. - */ - daemonize("cyasblkdev_queue_thread"); - - /* signal to queue_init() so it could contnue */ - complete(&bq->thread_complete); - - down(&bq->thread_sem); - add_wait_queue(&bq->thread_wq, &wait); - - qth_pid = current->pid; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s:%x started, bq:%p, q:%p\n", __func__, qth_pid, bq, q); - #endif - - do { - struct request *req = NULL; - - /* the thread wants to be woken up by signals as well */ - set_current_state(TASK_INTERRUPTIBLE); - - spin_lock_irq(q->queue_lock); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: for bq->queue is null\n", __func__); - #endif - - if (!bq->req) { - /* chk if queue is plugged */ - if (!blk_queue_plugged(q)) { - bq->req = req = blk_fetch_request(q); - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: blk_fetch_request:%x\n", - __func__, (uint32_t)req); - #endif - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: queue plugged, " - "skip blk_fetch()\n", __func__); - #endif - } - } - spin_unlock_irq(q->queue_lock); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: checking if request queue is null\n", __func__); - #endif - - if (!req) { - if (bq->flags & CYASBLKDEV_QUEUE_EXIT) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s:got QUEUE_EXIT flag\n", __func__); - #endif - - break; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: request queue is null, goto sleep, " - "thread_sem->count=%d\n", - __func__, bq->thread_sem.count); - if (spin_is_locked(q->queue_lock)) { - cy_as_hal_print_message("%s: queue_lock " - "is locked, need to release\n", __func__); - spin_unlock(q->queue_lock); - - if (spin_is_locked(q->queue_lock)) - cy_as_hal_print_message( - "%s: unlock did not work\n", - __func__); - } else { - cy_as_hal_print_message( - "%s: checked lock, is not locked\n", - __func__); - } - #endif - - up(&bq->thread_sem); - - /* yields to the next rdytorun proc, - * then goes back to sleep*/ - schedule(); - down(&bq->thread_sem); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: wake_up,continue\n", - __func__); - #endif - continue; - } - - /* new req received, issue it to the driver */ - set_current_state(TASK_RUNNING); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: issued a RQ:%x\n", - __func__, (uint32_t)req); - #endif - - bq->issue_fn(bq, req); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: bq->issue_fn() returned\n", - __func__); - #endif - - - } while (1); - - set_current_state(TASK_RUNNING); - remove_wait_queue(&bq->thread_wq, &wait); - up(&bq->thread_sem); - - complete_and_exit(&bq->thread_complete, 0); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: is finished\n", __func__); - #endif - - return 0; -} - -/* - * Generic request handler. it is called for any queue on a - * particular host. When the host is not busy, we look for a request - * on any queue on this host, and attempt to issue it. This may - * not be the queue we were asked to process. - */ -static void cyasblkdev_request(struct request_queue *q) -{ - struct cyasblkdev_queue *bq = q->queuedata; - DBGPRN_FUNC_NAME; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s new request on cyasblkdev_queue_t bq:=%x\n", - __func__, (uint32_t)bq); - #endif - - if (!bq->req) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s wake_up(&bq->thread_wq)\n", - __func__); - #endif - - /* wake up cyasblkdev_queue worker thread*/ - wake_up(&bq->thread_wq); - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: don't wake Q_thr, bq->req:%x\n", - __func__, (uint32_t)bq->req); - #endif - } -} - -/* - * cyasblkdev_init_queue - initialise a queue structure. - * @bq: cyasblkdev queue - * @dev: CyAsDeviceHandle to attach this queue - * @lock: queue lock - * - * Initialise a cyasblkdev_request queue. - */ - -/* MAX NUMBER OF SECTORS PER REQUEST **/ -#define Q_MAX_SECTORS 128 - -/* MAX NUMBER OF PHYS SEGMENTS (entries in the SG list)*/ -#define Q_MAX_SGS 16 - -int cyasblkdev_init_queue(struct cyasblkdev_queue *bq, spinlock_t *lock) -{ - int ret; - - DBGPRN_FUNC_NAME; - - /* 1st param is a function that wakes up the queue thread */ - bq->queue = blk_init_queue(cyasblkdev_request, lock); - if (!bq->queue) - return -ENOMEM; - - blk_queue_prep_rq(bq->queue, cyasblkdev_prep_request); - - blk_queue_bounce_limit(bq->queue, BLK_BOUNCE_ANY); - blk_queue_max_hw_sectors(bq->queue, Q_MAX_SECTORS); - - /* As of now, we have the HAL/driver support to - * merge scattered segments and handle them simultaneously. - * so, setting the max_phys_segments to 8. */ - /*blk_queue_max_phys_segments(bq->queue, Q_MAX_SGS); - blk_queue_max_hw_segments(bq->queue, Q_MAX_SGS);*/ - blk_queue_max_segments(bq->queue, Q_MAX_SGS); - - /* should be < then HAL can handle */ - blk_queue_max_segment_size(bq->queue, 512*Q_MAX_SECTORS); - - bq->queue->queuedata = bq; - bq->req = NULL; - - init_completion(&bq->thread_complete); - init_waitqueue_head(&bq->thread_wq); - sema_init(&bq->thread_sem, 1); - - ret = kernel_thread(cyasblkdev_queue_thread, bq, CLONE_KERNEL); - if (ret >= 0) { - /* wait until the thread is spawned */ - wait_for_completion(&bq->thread_complete); - - /* reinitialize the completion */ - init_completion(&bq->thread_complete); - ret = 0; - goto out; - } - -out: - return ret; -} -EXPORT_SYMBOL(cyasblkdev_init_queue); - -/*called from blk_put() */ -void cyasblkdev_cleanup_queue(struct cyasblkdev_queue *bq) -{ - DBGPRN_FUNC_NAME; - - bq->flags |= CYASBLKDEV_QUEUE_EXIT; - wake_up(&bq->thread_wq); - wait_for_completion(&bq->thread_complete); - - blk_cleanup_queue(bq->queue); -} -EXPORT_SYMBOL(cyasblkdev_cleanup_queue); - - -/** - * cyasblkdev_queue_suspend - suspend a CyAsBlkDev request queue - * @bq: CyAsBlkDev queue to suspend - * - * Stop the block request queue, and wait for our thread to - * complete any outstanding requests. This ensures that we - * won't suspend while a request is being processed. - */ -void cyasblkdev_queue_suspend(struct cyasblkdev_queue *bq) -{ - struct request_queue *q = bq->queue; - unsigned long flags; - - DBGPRN_FUNC_NAME; - - if (!(bq->flags & CYASBLKDEV_QUEUE_SUSPENDED)) { - bq->flags |= CYASBLKDEV_QUEUE_SUSPENDED; - - spin_lock_irqsave(q->queue_lock, flags); - blk_stop_queue(q); - spin_unlock_irqrestore(q->queue_lock, flags); - - down(&bq->thread_sem); - } -} -EXPORT_SYMBOL(cyasblkdev_queue_suspend); - -/*cyasblkdev_queue_resume - resume a previously suspended - * CyAsBlkDev request queue @bq: CyAsBlkDev queue to resume */ -void cyasblkdev_queue_resume(struct cyasblkdev_queue *bq) -{ - struct request_queue *q = bq->queue; - unsigned long flags; - - DBGPRN_FUNC_NAME; - - if (bq->flags & CYASBLKDEV_QUEUE_SUSPENDED) { - bq->flags &= ~CYASBLKDEV_QUEUE_SUSPENDED; - - up(&bq->thread_sem); - - spin_lock_irqsave(q->queue_lock, flags); - blk_start_queue(q); - spin_unlock_irqrestore(q->queue_lock, flags); - } -} -EXPORT_SYMBOL(cyasblkdev_queue_resume); - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h b/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h deleted file mode 100644 index 51cba6a..0000000 --- a/drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h +++ /dev/null @@ -1,64 +0,0 @@ -/* cyanblkdev_queue.h - Antioch Linux Block Driver queue header file -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANBLKDEV_QUEUE_H_ -#define _INCLUDED_CYANBLKDEV_QUEUE_H_ - -/* - * may contain various useful MACRO and debug printks - */ - -/* moved to staging location, eventual implementation - * considered is here - * #include - * #include - * */ - -#include "../include/linux/westbridge/cyashal.h" -#include "../include/linux/westbridge/cyastoria.h" - -struct request; -struct task_struct; - -struct cyasblkdev_queue { - struct completion thread_complete; - wait_queue_head_t thread_wq; - struct semaphore thread_sem; - unsigned int flags; - struct request *req; - int (*prep_fn)(struct cyasblkdev_queue *, struct request *); - int (*issue_fn)(struct cyasblkdev_queue *, struct request *); - void *data; - struct request_queue *queue; -}; - -extern int cyasblkdev_init_queue(struct cyasblkdev_queue *, spinlock_t *); -extern void cyasblkdev_cleanup_queue(struct cyasblkdev_queue *); -extern void cyasblkdev_queue_suspend(struct cyasblkdev_queue *); -extern void cyasblkdev_queue_resume(struct cyasblkdev_queue *); - -extern cy_as_device_handle cyasdevice_getdevhandle(void); -#define MOD_LOGS 1 -void verbose_rq_flags(int flags); - -#endif /* _INCLUDED_CYANBLKDEV_QUEUE_H_ */ - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/device/Kconfig b/drivers/staging/westbridge/astoria/device/Kconfig deleted file mode 100644 index cc99658..0000000 --- a/drivers/staging/westbridge/astoria/device/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# -# West Bridge block driver configuration -# - -config WESTBRIDGE_DEVICE_DRIVER - tristate "West Bridge Device Driver" - help - Include the West Bridge based device driver - diff --git a/drivers/staging/westbridge/astoria/device/Makefile b/drivers/staging/westbridge/astoria/device/Makefile deleted file mode 100644 index 7af8b5b..0000000 --- a/drivers/staging/westbridge/astoria/device/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# -# Makefile for the kernel westbridge device driver -# - -ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) - EXTRA_CFLAGS += -DWESTBRIDGE_NDEBUG -endif - -obj-$(CONFIG_WESTBRIDGE_DEVICE_DRIVER) += cyasdev.o - - -ifeq ($(CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL),y) -#moved for staging compatbility -#cyasdev-y := ../../../arch/arm/mach-omap2/cyashalomap_kernel.o cyasdevice.o -cyasdev-y := ../arch/arm/mach-omap2/cyashalomap_kernel.o cyasdevice.o \ - ../api/src/cyasdma.o ../api/src/cyasintr.o ../api/src/cyaslep2pep.o \ - ../api/src/cyaslowlevel.o ../api/src/cyasmisc.o ../api/src/cyasmtp.o \ - ../api/src/cyasstorage.o ../api/src/cyasusb.o - -else -# should not get here, need to be built with some hal -cyasdev-y := cyasdevice.o -endif diff --git a/drivers/staging/westbridge/astoria/device/cyasdevice.c b/drivers/staging/westbridge/astoria/device/cyasdevice.c deleted file mode 100644 index 7de35cc..0000000 --- a/drivers/staging/westbridge/astoria/device/cyasdevice.c +++ /dev/null @@ -1,409 +0,0 @@ -/* -## cyandevice.c - Linux Antioch device driver file -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -/* moved for staging location - * update/patch submission -#include -#include -#include -*/ - -#include "../include/linux/westbridge/cyastoria.h" -#include "../include/linux/westbridge/cyashal.h" -#include "../include/linux/westbridge/cyasregs.h" - -typedef struct cyasdevice { - /* Handle to the Antioch device */ - cy_as_device_handle dev_handle; - /* Handle to the HAL */ - cy_as_hal_device_tag hal_tag; - spinlock_t common_lock; - unsigned long flags; -} cyasdevice; - -/* global ptr to astoria device */ -static cyasdevice *cy_as_device_controller; -int cy_as_device_init_done; -const char *dev_handle_name = "cy_astoria_dev_handle"; - -#ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL -extern void cy_as_hal_config_c_s_mux(void); -#endif - -static void cyasdevice_deinit(cyasdevice *cy_as_dev) -{ - cy_as_hal_print_message("<1>_cy_as_device deinitialize called\n"); - if (!cy_as_dev) { - cy_as_hal_print_message("<1>_cy_as_device_deinit: " - "device handle %x is invalid\n", (uint32_t)cy_as_dev); - return; - } - - /* stop west_brige */ - if (cy_as_dev->dev_handle) { - cy_as_hal_print_message("<1>_cy_as_device: " - "cy_as_misc_destroy_device called\n"); - if (cy_as_misc_destroy_device(cy_as_dev->dev_handle) != - CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message( - "<1>_cy_as_device: destroying failed\n"); - } - } - - if (cy_as_dev->hal_tag) { - - #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - if (stop_o_m_a_p_kernel(dev_handle_name, - cy_as_dev->hal_tag) != 0) - cy_as_hal_print_message("<1>_cy_as_device: stopping " - "OMAP kernel HAL failed\n"); - - #endif - } - cy_as_hal_print_message("<1>_cy_as_device:HAL layer stopped\n"); - - kfree(cy_as_dev); - cy_as_device_controller = NULL; - cy_as_hal_print_message("<1>_cy_as_device: deinitialized\n"); -} - -/*called from src/cyasmisc.c:MyMiscCallback() as a func - * pointer [dev_p->misc_event_cb] which was previously - * registered by CyAsLLRegisterRequestCallback(..., - * MyMiscCallback); called from CyAsMiscConfigureDevice() - * which is in turn called from cyasdevice_initialize() in - * this src - */ -static void cy_misc_callback(cy_as_device_handle h, - cy_as_misc_event_type evtype, void *evdata) -{ - (void)h; - (void)evdata; - - switch (evtype) { - case cy_as_event_misc_initialized: - cy_as_hal_print_message("<1>_cy_as_device: " - "initialization done callback triggered\n"); - cy_as_device_init_done = 1; - break; - - case cy_as_event_misc_awake: - cy_as_hal_print_message("<1>_cy_as_device: " - "cy_as_event_misc_awake event callback triggered\n"); - cy_as_device_init_done = 1; - break; - default: - break; - } -} - -void cy_as_acquire_common_lock() -{ - spin_lock_irqsave(&cy_as_device_controller->common_lock, - cy_as_device_controller->flags); -} -EXPORT_SYMBOL(cy_as_acquire_common_lock); - -void cy_as_release_common_lock() -{ - spin_unlock_irqrestore(&cy_as_device_controller->common_lock, - cy_as_device_controller->flags); -} -EXPORT_SYMBOL(cy_as_release_common_lock); - -/* reset astoria and reinit all regs */ - #define PNAND_REG_CFG_INIT_VAL 0x0000 -void hal_reset(cy_as_hal_device_tag tag) -{ - cy_as_hal_print_message("<1> send soft hard rst: " - "MEM_RST_CTRL_REG_HARD...\n"); - cy_as_hal_write_register(tag, CY_AS_MEM_RST_CTRL_REG, - CY_AS_MEM_RST_CTRL_REG_HARD); - mdelay(60); - - cy_as_hal_print_message("<1> after RST: si_rev_REG:%x, " - "PNANDCFG_reg:%x\n", - cy_as_hal_read_register(tag, CY_AS_MEM_CM_WB_CFG_ID), - cy_as_hal_read_register(tag, CY_AS_MEM_PNAND_CFG) - ); - - /* set it to LBD */ - cy_as_hal_write_register(tag, CY_AS_MEM_PNAND_CFG, - PNAND_REG_CFG_INIT_VAL); -} -EXPORT_SYMBOL(hal_reset); - - -/* below structures and functions primarily - * implemented for firmware loading */ -static struct platform_device *westbridge_pd; - -static int __devinit wb_probe(struct platform_device *devptr) -{ - cy_as_hal_print_message("%s called\n", __func__); - return 0; -} - -static int __devexit wb_remove(struct platform_device *devptr) -{ - cy_as_hal_print_message("%s called\n", __func__); - return 0; -} - -static struct platform_driver west_bridge_driver = { - .probe = wb_probe, - .remove = __devexit_p(wb_remove), - .driver = { - .name = "west_bridge_dev"}, -}; - -/* west bridge device driver main init */ -static int cyasdevice_initialize(void) -{ - cyasdevice *cy_as_dev = 0; - int ret = 0; - int retval = 0; - cy_as_device_config config; - cy_as_hal_sleep_channel channel; - cy_as_get_firmware_version_data ver_data = {0}; - const char *str = ""; - int spin_lim; - const struct firmware *fw_entry; - - cy_as_device_init_done = 0; - - cy_as_misc_set_log_level(8); - - cy_as_hal_print_message("<1>_cy_as_device initialize called\n"); - - if (cy_as_device_controller != 0) { - cy_as_hal_print_message("<1>_cy_as_device: the device " - "has already been initilaized. ignoring\n"); - return -EBUSY; - } - - /* cy_as_dev = CyAsHalAlloc (sizeof(cyasdevice), SLAB_KERNEL); */ - cy_as_dev = cy_as_hal_alloc(sizeof(cyasdevice)); - if (cy_as_dev == NULL) { - cy_as_hal_print_message("<1>_cy_as_device: " - "memory allocation failed\n"); - return -ENOMEM; - } - memset(cy_as_dev, 0, sizeof(cyasdevice)); - - - /* Init the HAL & CyAsDeviceHandle */ - - #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - /* start OMAP HAL init instsnce */ - - if (!start_o_m_a_p_kernel(dev_handle_name, - &(cy_as_dev->hal_tag), cy_false)) { - - cy_as_hal_print_message( - "<1>_cy_as_device: start OMAP34xx HAL failed\n"); - goto done; - } - #endif - - /* Now create the device */ - if (cy_as_misc_create_device(&(cy_as_dev->dev_handle), - cy_as_dev->hal_tag) != CY_AS_ERROR_SUCCESS) { - - cy_as_hal_print_message( - "<1>_cy_as_device: create device failed\n"); - goto done; - } - - memset(&config, 0, sizeof(config)); - config.dmaintr = cy_true; - - ret = cy_as_misc_configure_device(cy_as_dev->dev_handle, &config); - if (ret != CY_AS_ERROR_SUCCESS) { - - cy_as_hal_print_message( - "<1>_cy_as_device: configure device " - "failed. reason code: %d\n", ret); - goto done; - } - - ret = cy_as_misc_register_callback(cy_as_dev->dev_handle, - cy_misc_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("<1>_cy_as_device: " - "cy_as_misc_register_callback failed. " - "reason code: %d\n", ret); - goto done; - } - - ret = platform_driver_register(&west_bridge_driver); - if (unlikely(ret < 0)) - return ret; - westbridge_pd = platform_device_register_simple( - "west_bridge_dev", -1, NULL, 0); - - if (IS_ERR(westbridge_pd)) { - platform_driver_unregister(&west_bridge_driver); - return PTR_ERR(westbridge_pd); - } - /* Load the firmware */ - ret = request_firmware(&fw_entry, - "west bridge fw", &westbridge_pd->dev); - if (ret) { - cy_as_hal_print_message("cy_as_device: " - "request_firmware failed return val = %d\n", ret); - } else { - cy_as_hal_print_message("cy_as_device: " - "got the firmware %d size=0x%x\n", ret, fw_entry->size); - - ret = cy_as_misc_download_firmware( - cy_as_dev->dev_handle, - fw_entry->data, - fw_entry->size , - 0, 0); - } - - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("<1>_cy_as_device: cannot download " - "firmware. reason code: %d\n", ret); - goto done; - } - - /* spin until the device init is completed */ - /* 50 -MAX wait time for the FW load & init - * to complete is 5sec*/ - spin_lim = 50; - - cy_as_hal_create_sleep_channel(&channel); - while (!cy_as_device_init_done) { - - cy_as_hal_sleep_on(&channel, 100); - - if (spin_lim-- <= 0) { - cy_as_hal_print_message( - "<1>\n_e_r_r_o_r!: " - "wait for FW init has timed out !!!"); - break; - } - } - cy_as_hal_destroy_sleep_channel(&channel); - - if (spin_lim > 0) - cy_as_hal_print_message( - "cy_as_device: astoria firmware is loaded\n"); - - ret = cy_as_misc_get_firmware_version(cy_as_dev->dev_handle, - &ver_data, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("<1>_cy_as_device: cannot get firmware " - "version. reason code: %d\n", ret); - goto done; - } - - if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x06)) - str = "nand and SD/MMC."; - else if ((ver_data.media_type & 0x01) && (ver_data.media_type & 0x08)) - str = "nand and CEATA."; - else if (ver_data.media_type & 0x01) - str = "nand."; - else if (ver_data.media_type & 0x08) - str = "CEATA."; - else - str = "SD/MMC."; - - cy_as_hal_print_message("<1> cy_as_device:_firmware version: %s " - "major=%d minor=%d build=%d,\n_media types supported:%s\n", - ((ver_data.is_debug_mode) ? "debug" : "release"), - ver_data.major, ver_data.minor, ver_data.build, str); - - spin_lock_init(&cy_as_dev->common_lock); - - /* done now */ - cy_as_device_controller = cy_as_dev; - - return 0; - -done: - if (cy_as_dev) - cyasdevice_deinit(cy_as_dev); - - return -EINVAL; -} - -cy_as_device_handle cyasdevice_getdevhandle(void) -{ - if (cy_as_device_controller) { - #ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - cy_as_hal_config_c_s_mux(); - #endif - - return cy_as_device_controller->dev_handle; - } - return NULL; -} -EXPORT_SYMBOL(cyasdevice_getdevhandle); - -cy_as_hal_device_tag cyasdevice_gethaltag(void) -{ - if (cy_as_device_controller) - return (cy_as_hal_device_tag) - cy_as_device_controller->hal_tag; - - return NULL; -} -EXPORT_SYMBOL(cyasdevice_gethaltag); - - -/*init Westbridge device driver **/ -static int __init cyasdevice_init(void) -{ - if (cyasdevice_initialize() != 0) - return -ENODEV; - - return 0; -} - - -static void __exit cyasdevice_cleanup(void) -{ - - cyasdevice_deinit(cy_as_device_controller); -} - - -MODULE_DESCRIPTION("west bridge device driver"); -MODULE_AUTHOR("cypress semiconductor"); -MODULE_LICENSE("GPL"); - -module_init(cyasdevice_init); -module_exit(cyasdevice_cleanup); - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/gadget/Kconfig b/drivers/staging/westbridge/astoria/gadget/Kconfig deleted file mode 100644 index 6fbdf22..0000000 --- a/drivers/staging/westbridge/astoria/gadget/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# -# West Bridge gadget driver configuration -# - -config WESTBRIDGE_GADGET_DRIVER - tristate "West Bridge Gadget Driver" - help - Include the West Bridge based gadget peripheral controller driver - diff --git a/drivers/staging/westbridge/astoria/gadget/Makefile b/drivers/staging/westbridge/astoria/gadget/Makefile deleted file mode 100644 index a5eef7e..0000000 --- a/drivers/staging/westbridge/astoria/gadget/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the kernel westbridge hal -# - -ifneq ($(CONFIG_WESTBRIDGE_DEBUG),y) - EXTRA_CFLAGS += -DWESTBRIDGE_NDEBUG -endif - -obj-$(CONFIG_WESTBRIDGE_GADGET_DRIVER) += cyasgadgetctrl.o -cyasgadgetctrl-y := cyasgadget.o - diff --git a/drivers/staging/westbridge/astoria/gadget/cyasgadget.c b/drivers/staging/westbridge/astoria/gadget/cyasgadget.c deleted file mode 100644 index 92015ec..0000000 --- a/drivers/staging/westbridge/astoria/gadget/cyasgadget.c +++ /dev/null @@ -1,2189 +0,0 @@ -/* cyangadget.c - Linux USB Gadget driver file for the Cypress West Bridge -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * Cypress West Bridge high/full speed usb device controller code - * Based on the Netchip 2280 device controller by David Brownell - * in the linux 2.6.10 kernel - * - * linux/drivers/usb/gadget/net2280.c - */ - -/* - * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com) - * Copyright (C) 2003 David Brownell - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330 - * Boston, MA 02111-1307 USA - */ - -#include "cyasgadget.h" - -#define CY_AS_DRIVER_DESC "cypress west bridge usb gadget" -#define CY_AS_DRIVER_VERSION "REV B" -#define DMA_ADDR_INVALID (~(dma_addr_t)0) - -static const char cy_as_driver_name[] = "cy_astoria_gadget"; -static const char cy_as_driver_desc[] = CY_AS_DRIVER_DESC; - -static const char cy_as_ep0name[] = "EP0"; -static const char *cy_as_ep_names[] = { - cy_as_ep0name, "EP1", - "EP2", "EP3", "EP4", "EP5", "EP6", "EP7", "EP8", - "EP9", "EP10", "EP11", "EP12", "EP13", "EP14", "EP15" -}; - -/* forward declarations */ -static void -cyas_ep_reset( - struct cyasgadget_ep *an_ep); - -static int -cyasgadget_fifo_status( - struct usb_ep *_ep); - -static void -cyasgadget_stallcallback( - cy_as_device_handle h, - cy_as_return_status_t status, - uint32_t tag, - cy_as_funct_c_b_type cbtype, - void *cbdata); - -/* variables */ -static cyasgadget *cy_as_gadget_controller; - -static int append_mtp; -module_param(append_mtp, bool, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(append_mtp, - "west bridge to append descriptors for mtp 0=no 1=yes"); - -static int msc_enum_bus_0; -module_param(msc_enum_bus_0, bool, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(msc_enum_bus_0, - "west bridge to enumerate bus 0 as msc 0=no 1=yes"); - -static int msc_enum_bus_1; -module_param(msc_enum_bus_1, bool, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(msc_enum_bus_1, - "west bridge to enumerate bus 1 as msc 0=no 1=yes"); - -/* all Callbacks are placed in this subsection*/ -static void cy_as_gadget_usb_event_callback( - cy_as_device_handle h, - cy_as_usb_event ev, - void *evdata - ) -{ - cyasgadget *cy_as_dev; - #ifndef WESTBRIDGE_NDEBUG - struct usb_ctrlrequest *ctrlreq; - #endif - - /* cy_as_dev = container_of(h, cyasgadget, dev_handle); */ - cy_as_dev = cy_as_gadget_controller; - switch (ev) { - case cy_as_event_usb_suspend: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_suspend received\n"); - #endif - cy_as_dev->driver->suspend(&cy_as_dev->gadget); - break; - - case cy_as_event_usb_resume: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_resume received\n"); - #endif - cy_as_dev->driver->resume(&cy_as_dev->gadget); - break; - - case cy_as_event_usb_reset: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_reset received\n"); - #endif - break; - - case cy_as_event_usb_speed_change: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_speed_change received\n"); - #endif - break; - - case cy_as_event_usb_set_config: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_set_config received\n"); - #endif - break; - - case cy_as_event_usb_setup_packet: - #ifndef WESTBRIDGE_NDEBUG - ctrlreq = (struct usb_ctrlrequest *)evdata; - - cy_as_hal_print_message("<1>_cy_as_event_usb_setup_packet " - "received" - "bRequestType=0x%x," - "bRequest=0x%x," - "wValue=x%x," - "wIndex=0x%x," - "wLength=0x%x,", - ctrlreq->bRequestType, - ctrlreq->bRequest, - ctrlreq->wValue, - ctrlreq->wIndex, - ctrlreq->wLength - ); - #endif - cy_as_dev->outsetupreq = 0; - if ((((uint8_t *)evdata)[0] & USB_DIR_IN) == USB_DIR_OUT) - cy_as_dev->outsetupreq = 1; - cy_as_dev->driver->setup(&cy_as_dev->gadget, - (struct usb_ctrlrequest *)evdata); - break; - - case cy_as_event_usb_status_packet: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_status_packet received\n"); - #endif - break; - - case cy_as_event_usb_inquiry_before: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_inquiry_before received\n"); - #endif - break; - - case cy_as_event_usb_inquiry_after: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_inquiry_after received\n"); - #endif - break; - - case cy_as_event_usb_start_stop: - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<1>_cy_as_event_usb_start_stop received\n"); - #endif - break; - - default: - break; - } -} - -static void cy_as_gadget_mtp_event_callback( - cy_as_device_handle handle, - cy_as_mtp_event evtype, - void *evdata - ) -{ - - cyasgadget *dev = cy_as_gadget_controller; - (void) handle; - - switch (evtype) { - case cy_as_mtp_send_object_complete: - { - cy_as_mtp_send_object_complete_data *send_obj_data = - (cy_as_mtp_send_object_complete_data *) evdata; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<6>MTP EVENT: send_object_complete\n"); - cy_as_hal_print_message( - "<6>_bytes sent = %d\n_send status = %d", - send_obj_data->byte_count, - send_obj_data->status); - #endif - - dev->tmtp_send_complete_data.byte_count = - send_obj_data->byte_count; - dev->tmtp_send_complete_data.status = - send_obj_data->status; - dev->tmtp_send_complete_data.transaction_id = - send_obj_data->transaction_id; - dev->tmtp_send_complete = cy_true; - break; - } - case cy_as_mtp_get_object_complete: - { - cy_as_mtp_get_object_complete_data *get_obj_data = - (cy_as_mtp_get_object_complete_data *) evdata; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<6>MTP EVENT: get_object_complete\n"); - cy_as_hal_print_message( - "<6>_bytes got = %d\n_get status = %d", - get_obj_data->byte_count, get_obj_data->status); - #endif - - dev->tmtp_get_complete_data.byte_count = - get_obj_data->byte_count; - dev->tmtp_get_complete_data.status = - get_obj_data->status; - dev->tmtp_get_complete = cy_true; - break; - } - case cy_as_mtp_block_table_needed: - { - dev->tmtp_need_new_blk_tbl = cy_true; - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<6>MTP EVENT: cy_as_mtp_block_table_needed\n"); - #endif - break; - } - default: - break; - } -} - -static void -cyasgadget_setupreadcallback( - cy_as_device_handle h, - cy_as_end_point_number_t ep, - uint32_t count, - void *buf, - cy_as_return_status_t status) -{ - cyasgadget_ep *an_ep; - cyasgadget_req *an_req; - cyasgadget *cy_as_dev; - unsigned stopped; - unsigned long flags; - (void)buf; - - cy_as_dev = cy_as_gadget_controller; - if (cy_as_dev->driver == NULL) - return; - - an_ep = &cy_as_dev->an_gadget_ep[ep]; - spin_lock_irqsave(&cy_as_dev->lock, flags); - stopped = an_ep->stopped; - -#ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: ep=%d, count=%d, " - "status=%d\n", __func__, ep, count, status); -#endif - - an_req = list_entry(an_ep->queue.next, - cyasgadget_req, queue); - list_del_init(&an_req->queue); - - if (status == CY_AS_ERROR_SUCCESS) - an_req->req.status = 0; - else - an_req->req.status = -status; - an_req->req.actual = count; - an_ep->stopped = 1; - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - an_req->req.complete(&an_ep->usb_ep_inst, &an_req->req); - - an_ep->stopped = stopped; - -} -/*called when the write of a setup packet has been completed*/ -static void cyasgadget_setupwritecallback( - cy_as_device_handle h, - cy_as_end_point_number_t ep, - uint32_t count, - void *buf, - cy_as_return_status_t status - ) -{ - cyasgadget_ep *an_ep; - cyasgadget_req *an_req; - cyasgadget *cy_as_dev; - unsigned stopped; - unsigned long flags; - - (void)buf; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called status=0x%x\n", - __func__, status); - #endif - - cy_as_dev = cy_as_gadget_controller; - - if (cy_as_dev->driver == NULL) - return; - - an_ep = &cy_as_dev->an_gadget_ep[ep]; - - spin_lock_irqsave(&cy_as_dev->lock, flags); - - stopped = an_ep->stopped; - -#ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("setup_write_callback: ep=%d, " - "count=%d, status=%d\n", ep, count, status); -#endif - - an_req = list_entry(an_ep->queue.next, cyasgadget_req, queue); - list_del_init(&an_req->queue); - - an_req->req.actual = count; - an_req->req.status = 0; - an_ep->stopped = 1; - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - an_req->req.complete(&an_ep->usb_ep_inst, &an_req->req); - - an_ep->stopped = stopped; - -} - -/* called when a read operation has completed.*/ -static void cyasgadget_readcallback( - cy_as_device_handle h, - cy_as_end_point_number_t ep, - uint32_t count, - void *buf, - cy_as_return_status_t status - ) -{ - cyasgadget_ep *an_ep; - cyasgadget_req *an_req; - cyasgadget *cy_as_dev; - unsigned stopped; - cy_as_return_status_t ret; - unsigned long flags; - - (void)h; - (void)buf; - - cy_as_dev = cy_as_gadget_controller; - - if (cy_as_dev->driver == NULL) - return; - - an_ep = &cy_as_dev->an_gadget_ep[ep]; - stopped = an_ep->stopped; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: ep=%d, count=%d, status=%d\n", - __func__, ep, count, status); - #endif - - if (status == CY_AS_ERROR_CANCELED) - return; - - spin_lock_irqsave(&cy_as_dev->lock, flags); - - an_req = list_entry(an_ep->queue.next, cyasgadget_req, queue); - list_del_init(&an_req->queue); - - if (status == CY_AS_ERROR_SUCCESS) - an_req->req.status = 0; - else - an_req->req.status = -status; - - an_req->complete = 1; - an_req->req.actual = count; - an_ep->stopped = 1; - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - an_req->req.complete(&an_ep->usb_ep_inst, &an_req->req); - - an_ep->stopped = stopped; - - /* We need to call ReadAsync on this end-point - * again, so as to not miss any data packets. */ - if (!an_ep->stopped) { - spin_lock_irqsave(&cy_as_dev->lock, flags); - an_req = 0; - if (!list_empty(&an_ep->queue)) - an_req = list_entry(an_ep->queue.next, - cyasgadget_req, queue); - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - if ((an_req) && (an_req->req.status == -EINPROGRESS)) { - ret = cy_as_usb_read_data_async(cy_as_dev->dev_handle, - an_ep->num, cy_false, an_req->req.length, - an_req->req.buf, cyasgadget_readcallback); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_read_data_async failed " - "with error code %d\n", ret); - else - an_req->req.status = -EALREADY; - } - } -} - -/* function is called when a usb write operation has completed*/ -static void cyasgadget_writecallback( - cy_as_device_handle h, - cy_as_end_point_number_t ep, - uint32_t count, - void *buf, - cy_as_return_status_t status - ) -{ - cyasgadget_ep *an_ep; - cyasgadget_req *an_req; - cyasgadget *cy_as_dev; - unsigned stopped = 0; - cy_as_return_status_t ret; - unsigned long flags; - - (void)h; - (void)buf; - - cy_as_dev = cy_as_gadget_controller; - if (cy_as_dev->driver == NULL) - return; - - an_ep = &cy_as_dev->an_gadget_ep[ep]; - - if (status == CY_AS_ERROR_CANCELED) - return; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: ep=%d, count=%d, status=%d\n", - __func__, ep, count, status); - #endif - - spin_lock_irqsave(&cy_as_dev->lock, flags); - - an_req = list_entry(an_ep->queue.next, cyasgadget_req, queue); - list_del_init(&an_req->queue); - an_req->req.actual = count; - - /* Verify the status value before setting req.status to zero */ - if (status == CY_AS_ERROR_SUCCESS) - an_req->req.status = 0; - else - an_req->req.status = -status; - - an_ep->stopped = 1; - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - an_req->req.complete(&an_ep->usb_ep_inst, &an_req->req); - an_ep->stopped = stopped; - - /* We need to call WriteAsync on this end-point again, so as to not - miss any data packets. */ - if (!an_ep->stopped) { - spin_lock_irqsave(&cy_as_dev->lock, flags); - an_req = 0; - if (!list_empty(&an_ep->queue)) - an_req = list_entry(an_ep->queue.next, - cyasgadget_req, queue); - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - if ((an_req) && (an_req->req.status == -EINPROGRESS)) { - ret = cy_as_usb_write_data_async(cy_as_dev->dev_handle, - an_ep->num, an_req->req.length, an_req->req.buf, - cy_false, cyasgadget_writecallback); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async " - "failed with error code %d\n", ret); - else - an_req->req.status = -EALREADY; - } - } -} - -static void cyasgadget_stallcallback( - cy_as_device_handle h, - cy_as_return_status_t status, - uint32_t tag, - cy_as_funct_c_b_type cbtype, - void *cbdata - ) -{ - #ifndef WESTBRIDGE_NDEBUG - if (status != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_set/_clear stall " - "failed with status %d\n", status); - #endif -} - - -/*******************************************************************/ -/* All usb_ep_ops (cyasgadget_ep_ops) are placed in this subsection*/ -/*******************************************************************/ -static int cyasgadget_enable( - struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc - ) -{ - cyasgadget *an_dev; - cyasgadget_ep *an_ep; - u32 max, tmp; - unsigned long flags; - - an_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - if (!_ep || !desc || an_ep->desc || _ep->name == cy_as_ep0name - || desc->bDescriptorType != USB_DT_ENDPOINT) - return -EINVAL; - - an_dev = an_ep->dev; - if (!an_dev->driver || an_dev->gadget.speed == USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff; - - spin_lock_irqsave(&an_dev->lock, flags); - _ep->maxpacket = max & 0x7ff; - an_ep->desc = desc; - - /* ep_reset() has already been called */ - an_ep->stopped = 0; - an_ep->out_overflow = 0; - - if (an_ep->cyepconfig.enabled != cy_true) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on enabled\n", an_ep->usb_ep_inst.name); - #endif - spin_unlock_irqrestore(&an_dev->lock, flags); - return -EINVAL; - } - - tmp = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK); - an_ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC) ? 1 : 0; - - spin_unlock_irqrestore(&an_dev->lock, flags); - - switch (tmp) { - case USB_ENDPOINT_XFER_ISOC: - if (an_ep->cyepconfig.type != cy_as_usb_iso) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on type %d %d\n", an_ep->usb_ep_inst.name, - an_ep->cyepconfig.type, cy_as_usb_iso); - #endif - return -EINVAL; - } - break; - case USB_ENDPOINT_XFER_INT: - if (an_ep->cyepconfig.type != cy_as_usb_int) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on type %d %d\n", an_ep->usb_ep_inst.name, - an_ep->cyepconfig.type, cy_as_usb_int); - #endif - return -EINVAL; - } - break; - default: - if (an_ep->cyepconfig.type != cy_as_usb_bulk) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on type %d %d\n", an_ep->usb_ep_inst.name, - an_ep->cyepconfig.type, cy_as_usb_bulk); - #endif - return -EINVAL; - } - break; - } - - tmp = desc->bEndpointAddress; - an_ep->is_in = (tmp & USB_DIR_IN) != 0; - - if ((an_ep->cyepconfig.dir == cy_as_usb_in) && - (!an_ep->is_in)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on dir %d %d\n", an_ep->usb_ep_inst.name, - an_ep->cyepconfig.dir, cy_as_usb_in); - #endif - return -EINVAL; - } else if ((an_ep->cyepconfig.dir == cy_as_usb_out) && - (an_ep->is_in)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_end_point_config EP %s mismatch " - "on dir %d %d\n", an_ep->usb_ep_inst.name, - an_ep->cyepconfig.dir, cy_as_usb_out); - #endif - return -EINVAL; - } - - cy_as_usb_clear_stall(an_dev->dev_handle, an_ep->num, - cyasgadget_stallcallback, 0); - - cy_as_hal_print_message("%s enabled %s (ep%d-%d) max %04x\n", - __func__, _ep->name, an_ep->num, tmp, max); - - return 0; -} - -static int cyasgadget_disable( - struct usb_ep *_ep - ) -{ - cyasgadget_ep *an_ep; - unsigned long flags; - - an_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - if (!_ep || !an_ep->desc || _ep->name == cy_as_ep0name) - return -EINVAL; - - spin_lock_irqsave(&an_ep->dev->lock, flags); - cyas_ep_reset(an_ep); - - spin_unlock_irqrestore(&an_ep->dev->lock, flags); - return 0; -} - -static struct usb_request *cyasgadget_alloc_request( - struct usb_ep *_ep, gfp_t gfp_flags - ) -{ - cyasgadget_ep *an_ep; - cyasgadget_req *an_req; - - if (!_ep) - return NULL; - - an_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - - an_req = kzalloc(sizeof(cyasgadget_req), gfp_flags); - if (!an_req) - return NULL; - - an_req->req.dma = DMA_ADDR_INVALID; - INIT_LIST_HEAD(&an_req->queue); - - return &an_req->req; -} - -static void cyasgadget_free_request( - struct usb_ep *_ep, - struct usb_request *_req - ) -{ - cyasgadget_req *an_req; - - if (!_ep || !_req) - return; - - an_req = container_of(_req, cyasgadget_req, req); - - kfree(an_req); -} - -/* Load a packet into the fifo we use for usb IN transfers. - * works for all endpoints. */ -static int cyasgadget_queue( - struct usb_ep *_ep, - struct usb_request *_req, - gfp_t gfp_flags - ) -{ - cyasgadget_req *as_req; - cyasgadget_ep *as_ep; - cyasgadget *cy_as_dev; - unsigned long flags; - cy_as_return_status_t ret = 0; - - as_req = container_of(_req, cyasgadget_req, req); - if (!_req || !_req->complete || !_req->buf - || !list_empty(&as_req->queue)) - return -EINVAL; - - as_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - - if (!_ep || (!as_ep->desc && (as_ep->num != 0))) - return -EINVAL; - - cy_as_dev = as_ep->dev; - if (!cy_as_dev->driver || - cy_as_dev->gadget.speed == USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - spin_lock_irqsave(&cy_as_dev->lock, flags); - - _req->status = -EINPROGRESS; - _req->actual = 0; - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - /* Call Async functions */ - if (as_ep->is_in) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async being called " - "on ep %d\n", as_ep->num); - #endif - - ret = cy_as_usb_write_data_async(cy_as_dev->dev_handle, - as_ep->num, _req->length, _req->buf, - cy_false, cyasgadget_writecallback); - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async failed with " - "error code %d\n", ret); - else - _req->status = -EALREADY; - } else if (as_ep->num == 0) { - /* - ret = cy_as_usb_write_data_async(cy_as_dev->dev_handle, - as_ep->num, _req->length, _req->buf, cy_false, - cyasgadget_setupwritecallback); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async failed with error " - "code %d\n", ret); - */ - if ((cy_as_dev->outsetupreq) && (_req->length)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_read_data_async " - "being called on ep %d\n", - as_ep->num); - #endif - - ret = cy_as_usb_read_data_async ( - cy_as_dev->dev_handle, as_ep->num, - cy_true, _req->length, _req->buf, - cyasgadget_setupreadcallback); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_read_data_async failed with " - "error code %d\n", ret); - - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async " - "being called on ep %d\n", - as_ep->num); - #endif - - ret = cy_as_usb_write_data_async(cy_as_dev->dev_handle, - as_ep->num, _req->length, _req->buf, cy_false, - cyasgadget_setupwritecallback); - - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_write_data_async failed with " - "error code %d\n", ret); - } - - } else if (list_empty(&as_ep->queue)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_read_data_async being called since " - "ep queue empty%d\n", ret); - #endif - - ret = cy_as_usb_read_data_async(cy_as_dev->dev_handle, - as_ep->num, cy_false, _req->length, _req->buf, - cyasgadget_readcallback); - if (ret != CY_AS_ERROR_SUCCESS) - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_read_data_async failed with error " - "code %d\n", ret); - else - _req->status = -EALREADY; - } - - spin_lock_irqsave(&cy_as_dev->lock, flags); - - if (as_req) - list_add_tail(&as_req->queue, &as_ep->queue); - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - return 0; -} - -/* dequeue request */ -static int cyasgadget_dequeue( - struct usb_ep *_ep, - struct usb_request *_req - ) -{ - cyasgadget_ep *an_ep; - cyasgadget *dev; - an_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - dev = an_ep->dev; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - cy_as_usb_cancel_async(dev->dev_handle, an_ep->num); - - return 0; -} - -static int cyasgadget_set_halt( - struct usb_ep *_ep, - int value - ) -{ - cyasgadget_ep *an_ep; - int retval = 0; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - an_ep = container_of(_ep, cyasgadget_ep, usb_ep_inst); - if (!_ep || (!an_ep->desc && an_ep->num != 0)) - return -EINVAL; - - if (!an_ep->dev->driver || an_ep->dev->gadget.speed == - USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - if (an_ep->desc /* not ep0 */ && - (an_ep->desc->bmAttributes & 0x03) == USB_ENDPOINT_XFER_ISOC) - return -EINVAL; - - if (!list_empty(&an_ep->queue)) - retval = -EAGAIN; - else if (an_ep->is_in && value && - cyasgadget_fifo_status(_ep) != 0) - retval = -EAGAIN; - else { - if (value) { - cy_as_usb_set_stall(an_ep->dev->dev_handle, - an_ep->num, cyasgadget_stallcallback, 0); - } else { - cy_as_usb_clear_stall(an_ep->dev->dev_handle, - an_ep->num, cyasgadget_stallcallback, 0); - } - } - - return retval; -} - -static int cyasgadget_fifo_status( - struct usb_ep *_ep - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - return 0; -} - -static void cyasgadget_fifo_flush( - struct usb_ep *_ep - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif -} - -static struct usb_ep_ops cyasgadget_ep_ops = { - .enable = cyasgadget_enable, - .disable = cyasgadget_disable, - .alloc_request = cyasgadget_alloc_request, - .free_request = cyasgadget_free_request, - .queue = cyasgadget_queue, - .dequeue = cyasgadget_dequeue, - .set_halt = cyasgadget_set_halt, - .fifo_status = cyasgadget_fifo_status, - .fifo_flush = cyasgadget_fifo_flush, -}; - -/*************************************************************/ -/*This subsection contains all usb_gadget_ops cyasgadget_ops */ -/*************************************************************/ -static int cyasgadget_get_frame( - struct usb_gadget *_gadget - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - return 0; -} - -static int cyasgadget_wakeup( - struct usb_gadget *_gadget - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - return 0; -} - -static int cyasgadget_set_selfpowered( - struct usb_gadget *_gadget, - int value - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - return 0; -} - -static int cyasgadget_pullup( - struct usb_gadget *_gadget, - int is_on - ) -{ - struct cyasgadget *cy_as_dev; - unsigned long flags; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - if (!_gadget) - return -ENODEV; - - cy_as_dev = container_of(_gadget, cyasgadget, gadget); - - spin_lock_irqsave(&cy_as_dev->lock, flags); - cy_as_dev->softconnect = (is_on != 0); - if (is_on) - cy_as_usb_connect(cy_as_dev->dev_handle, 0, 0); - else - cy_as_usb_disconnect(cy_as_dev->dev_handle, 0, 0); - - spin_unlock_irqrestore(&cy_as_dev->lock, flags); - - return 0; -} - -static int cyasgadget_ioctl( - struct usb_gadget *_gadget, - unsigned code, - unsigned long param - ) -{ - int err = 0; - int retval = 0; - int ret_stat = 0; - cyasgadget *dev = cy_as_gadget_controller; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called, code=%d, param=%ld\n", - __func__, code, param); - #endif - /* - * extract the type and number bitfields, and don't decode - * wrong cmds: return ENOTTY (inappropriate ioctl) before access_ok() - */ - if (_IOC_TYPE(code) != CYASGADGET_IOC_MAGIC) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s, bad magic number = 0x%x\n", - __func__, _IOC_TYPE(code)); - #endif - return -ENOTTY; - } - - if (_IOC_NR(code) > CYASGADGET_IOC_MAXNR) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s, bad ioctl code = 0x%x\n", - __func__, _IOC_NR(code)); - #endif - return -ENOTTY; - } - - /* - * the direction is a bitmask, and VERIFY_WRITE catches R/W - * transfers. `Type' is user-oriented, while - * access_ok is kernel-oriented, so the concept of "read" and - * "write" is reversed - */ - if (_IOC_DIR(code) & _IOC_READ) - err = !access_ok(VERIFY_WRITE, - (void __user *)param, _IOC_SIZE(code)); - else if (_IOC_DIR(code) & _IOC_WRITE) - err = !access_ok(VERIFY_READ, - (void __user *)param, _IOC_SIZE(code)); - - if (err) { - cy_as_hal_print_message("%s, bad ioctl dir = 0x%x\n", - __func__, _IOC_DIR(code)); - return -EFAULT; - } - - switch (code) { - case CYASGADGET_GETMTPSTATUS: - { - cy_as_gadget_ioctl_tmtp_status *usr_d = - (cy_as_gadget_ioctl_tmtp_status *)param; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: got CYASGADGET_GETMTPSTATUS\n", - __func__); - #endif - - retval = __put_user(dev->tmtp_send_complete, - (uint32_t __user *)(&(usr_d->tmtp_send_complete))); - retval = __put_user(dev->tmtp_get_complete, - (uint32_t __user *)(&(usr_d->tmtp_get_complete))); - retval = __put_user(dev->tmtp_need_new_blk_tbl, - (uint32_t __user *)(&(usr_d->tmtp_need_new_blk_tbl))); - - if (copy_to_user((&(usr_d->tmtp_send_complete_data)), - (&(dev->tmtp_send_complete_data)), - sizeof(cy_as_gadget_ioctl_send_object))) - return -EFAULT; - - if (copy_to_user((&(usr_d->tmtp_get_complete_data)), - (&(dev->tmtp_get_complete_data)), - sizeof(cy_as_gadget_ioctl_get_object))) - return -EFAULT; - break; - } - case CYASGADGET_CLEARTMTPSTATUS: - { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s got CYASGADGET_CLEARTMTPSTATUS\n", - __func__); - #endif - - dev->tmtp_send_complete = 0; - dev->tmtp_get_complete = 0; - dev->tmtp_need_new_blk_tbl = 0; - - break; - } - case CYASGADGET_INITSOJ: - { - cy_as_gadget_ioctl_i_s_o_j_d k_d; - cy_as_gadget_ioctl_i_s_o_j_d *usr_d = - (cy_as_gadget_ioctl_i_s_o_j_d *)param; - cy_as_mtp_block_table blk_table; - struct scatterlist sg; - char *alloc_filename; - struct file *file_to_allocate; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s got CYASGADGET_INITSOJ\n", - __func__); - #endif - - memset(&blk_table, 0, sizeof(blk_table)); - - /* Get user argument structure */ - if (copy_from_user(&k_d, usr_d, - sizeof(cy_as_gadget_ioctl_i_s_o_j_d))) - return -EFAULT; - - /* better use fixed size buff*/ - alloc_filename = kmalloc(k_d.name_length + 1, GFP_KERNEL); - if (alloc_filename == NULL) - return -ENOMEM; - - /* get the filename */ - if (copy_from_user(alloc_filename, k_d.file_name, - k_d.name_length + 1)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: CYASGADGET_INITSOJ, " - "copy file name from user space failed\n", - __func__); - #endif - kfree(alloc_filename); - return -EFAULT; - } - - file_to_allocate = filp_open(alloc_filename, O_RDWR, 0); - - if (!IS_ERR(file_to_allocate)) { - - struct address_space *mapping = - file_to_allocate->f_mapping; - const struct address_space_operations *a_ops = - mapping->a_ops; - struct inode *inode = mapping->host; - struct inode *alloc_inode = - file_to_allocate->f_path.dentry->d_inode; - uint32_t num_clusters = 0; - struct buffer_head bh; - struct kstat stat; - int nr_pages = 0; - int ret_stat = 0; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: fhandle is OK, " - "calling vfs_getattr\n", __func__); - #endif - - ret_stat = vfs_getattr(file_to_allocate->f_path.mnt, - file_to_allocate->f_path.dentry, &stat); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: returned from " - "vfs_getattr() stat->blksize=0x%lx\n", - __func__, stat.blksize); - #endif - - /* TODO: get this from disk properties - * (from blockdevice)*/ - #define SECTOR_SIZE 512 - if (stat.blksize != 0) { - num_clusters = (k_d.num_bytes) / SECTOR_SIZE; - - if (((k_d.num_bytes) % SECTOR_SIZE) != 0) - num_clusters++; - } else { - goto initsoj_safe_exit; - } - - bh.b_state = 0; - bh.b_blocknr = 0; - /* block size is arbitrary , we'll use sector size*/ - bh.b_size = SECTOR_SIZE; - - - - /* clear dirty pages in page cache - * (if were any allocated) */ - nr_pages = (k_d.num_bytes) / (PAGE_CACHE_SIZE); - - if (((k_d.num_bytes) % (PAGE_CACHE_SIZE)) != 0) - nr_pages++; - - #ifndef WESTBRIDGE_NDEBUG - /*check out how many pages where actually allocated */ - if (mapping->nrpages != nr_pages) - cy_as_hal_print_message("%s mpage_cleardirty " - "mapping->nrpages %d != num_pages %d\n", - __func__, (int) mapping->nrpages, - nr_pages); - - cy_as_hal_print_message("%s: calling " - "mpage_cleardirty() " - "for %d pages\n", __func__, nr_pages); - #endif - - ret_stat = mpage_cleardirty(mapping, nr_pages); - - /*fill up the the block table from the addr mapping */ - if (a_ops->bmap) { - int8_t blk_table_idx = -1; - uint32_t file_block_idx = 0; - uint32_t last_blk_addr_map = 0, - curr_blk_addr_map = 0; - - #ifndef WESTBRIDGE_NDEBUG - if (alloc_inode->i_bytes == 0) - cy_as_hal_print_message( - "%s: alloc_inode->ibytes =0\n", - __func__); - #endif - - /* iterate through the list of - * blocks (not clusters)*/ - for (file_block_idx = 0; - file_block_idx < num_clusters - /*inode->i_bytes*/; file_block_idx++) { - - /* returns starting sector number */ - curr_blk_addr_map = - a_ops->bmap(mapping, - file_block_idx); - - /*no valid mapping*/ - if (curr_blk_addr_map == 0) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s:hit invalid " - "mapping\n", __func__); - #endif - break; - } else if (curr_blk_addr_map != - (last_blk_addr_map + 1) || - (blk_table.num_blocks - [blk_table_idx] == 65535)) { - - /* next table entry */ - blk_table_idx++; - /* starting sector of a - * scattered cluster*/ - blk_table.start_blocks - [blk_table_idx] = - curr_blk_addr_map; - /* ++ num of blocks in cur - * table entry*/ - blk_table. - num_blocks[blk_table_idx]++; - - #ifndef WESTBRIDGE_NDEBUG - if (file_block_idx != 0) - cy_as_hal_print_message( - "<*> next table " - "entry:%d required\n", - blk_table_idx); - #endif - } else { - /*add contiguous block*/ - blk_table.num_blocks - [blk_table_idx]++; - } /*if (curr_blk_addr_map == 0)*/ - - last_blk_addr_map = curr_blk_addr_map; - } /* end for (file_block_idx = 0; file_block_idx - < inode->i_bytes;) */ - - #ifndef WESTBRIDGE_NDEBUG - /*print result for verification*/ - { - int i; - cy_as_hal_print_message( - "%s: print block table " - "mapping:\n", - __func__); - for (i = 0; i <= blk_table_idx; i++) { - cy_as_hal_print_message( - "<1> %d 0x%x 0x%x\n", i, - blk_table.start_blocks[i], - blk_table.num_blocks[i]); - } - } - #endif - - /* copy the block table to user - * space (for debug purposes) */ - retval = __put_user( - blk_table.start_blocks[blk_table_idx], - (uint32_t __user *) - (&(usr_d->blk_addr_p))); - - retval = __put_user( - blk_table.num_blocks[blk_table_idx], - (uint32_t __user *) - (&(usr_d->blk_count_p))); - - blk_table_idx++; - retval = __put_user(blk_table_idx, - (uint32_t __user *) - (&(usr_d->item_count))); - - } /*end if (a_ops->bmap)*/ - - filp_close(file_to_allocate, NULL); - - dev->tmtp_send_complete = 0; - dev->tmtp_need_new_blk_tbl = 0; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: calling cy_as_mtp_init_send_object()\n", - __func__); - #endif - sg_init_one(&sg, &blk_table, sizeof(blk_table)); - ret_stat = cy_as_mtp_init_send_object(dev->dev_handle, - (cy_as_mtp_block_table *)&sg, - k_d.num_bytes, 0, 0); - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: returned from " - "cy_as_mtp_init_send_object()\n", __func__); - #endif - - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message( - "%s: failed to allocate the file %s\n", - __func__, alloc_filename); - } /* end if (file_to_allocate)*/ - #endif - kfree(alloc_filename); -initsoj_safe_exit: - ret_stat = 0; - retval = __put_user(ret_stat, - (uint32_t __user *)(&(usr_d->ret_val))); - - break; - } - case CYASGADGET_INITGOJ: - { - cy_as_gadget_ioctl_i_g_o_j_d k_d; - cy_as_gadget_ioctl_i_g_o_j_d *usr_d = - (cy_as_gadget_ioctl_i_g_o_j_d *)param; - cy_as_mtp_block_table blk_table; - struct scatterlist sg; - char *map_filename; - struct file *file_to_map; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: got CYASGADGET_INITGOJ\n", - __func__); - #endif - - memset(&blk_table, 0, sizeof(blk_table)); - - /* Get user argument sturcutre */ - if (copy_from_user(&k_d, usr_d, - sizeof(cy_as_gadget_ioctl_i_g_o_j_d))) - return -EFAULT; - - map_filename = kmalloc(k_d.name_length + 1, GFP_KERNEL); - if (map_filename == NULL) - return -ENOMEM; - if (copy_from_user(map_filename, k_d.file_name, - k_d.name_length + 1)) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: copy file name from " - "user space failed\n", __func__); - #endif - kfree(map_filename); - return -EFAULT; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<*>%s: opening %s for kernel " - "mode access map\n", __func__, map_filename); - #endif - file_to_map = filp_open(map_filename, O_RDWR, 0); - if (file_to_map) { - struct address_space *mapping = file_to_map->f_mapping; - const struct address_space_operations - *a_ops = mapping->a_ops; - struct inode *inode = mapping->host; - - int8_t blk_table_idx = -1; - uint32_t file_block_idx = 0; - uint32_t last_blk_addr_map = 0, curr_blk_addr_map = 0; - - /*verify operation exists*/ - if (a_ops->bmap) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<*>%s: bmap found, i_bytes=0x%x, " - "i_size=0x%x, i_blocks=0x%x\n", - __func__, inode->i_bytes, - (unsigned int) inode->i_size, - (unsigned int) inode->i_blocks); - #endif - - k_d.num_bytes = inode->i_size; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "<*>%s: k_d.num_bytes=0x%x\n", - __func__, k_d.num_bytes); - #endif - - for (file_block_idx = 0; - file_block_idx < inode->i_size; - file_block_idx++) { - curr_blk_addr_map = - a_ops->bmap(mapping, - file_block_idx); - - if (curr_blk_addr_map == 0) { - /*no valid mapping*/ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: no valid " - "mapping\n", __func__); - #endif - break; - } else if (curr_blk_addr_map != - (last_blk_addr_map + 1)) { - /*non-contiguous break*/ - blk_table_idx++; - blk_table.start_blocks - [blk_table_idx] = - curr_blk_addr_map; - blk_table.num_blocks - [blk_table_idx]++; - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: found non-" - "contiguous break", - __func__); - #endif - } else { - /*add contiguous block*/ - blk_table.num_blocks - [blk_table_idx]++; - } - last_blk_addr_map = curr_blk_addr_map; - } - - /*print result for verification*/ - #ifndef WESTBRIDGE_NDEBUG - { - int i = 0; - - for (i = 0; i <= blk_table_idx; i++) { - cy_as_hal_print_message( - "%s %d 0x%x 0x%x\n", - __func__, i, - blk_table.start_blocks[i], - blk_table.num_blocks[i]); - } - } - #endif - } else { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: could not find " - "a_ops->bmap\n", __func__); - #endif - return -EFAULT; - } - - filp_close(file_to_map, NULL); - - dev->tmtp_get_complete = 0; - dev->tmtp_need_new_blk_tbl = 0; - - ret_stat = __put_user( - blk_table.start_blocks[blk_table_idx], - (uint32_t __user *)(&(usr_d->blk_addr_p))); - - ret_stat = __put_user( - blk_table.num_blocks[blk_table_idx], - (uint32_t __user *)(&(usr_d->blk_count_p))); - - sg_init_one(&sg, &blk_table, sizeof(blk_table)); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: calling cy_as_mtp_init_get_object() " - "start=0x%x, num =0x%x, tid=0x%x, " - "num_bytes=0x%x\n", - __func__, - blk_table.start_blocks[0], - blk_table.num_blocks[0], - k_d.tid, - k_d.num_bytes); - #endif - - ret_stat = cy_as_mtp_init_get_object( - dev->dev_handle, - (cy_as_mtp_block_table *)&sg, - k_d.num_bytes, k_d.tid, 0, 0); - if (ret_stat != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: cy_as_mtp_init_get_object " - "failed ret_stat=0x%x\n", - __func__, ret_stat); - #endif - } - } - #ifndef WESTBRIDGE_NDEBUG - else { - cy_as_hal_print_message( - "%s: failed to open file %s\n", - __func__, map_filename); - } - #endif - kfree(map_filename); - - ret_stat = 0; - retval = __put_user(ret_stat, (uint32_t __user *) - (&(usr_d->ret_val))); - break; - } - case CYASGADGET_CANCELSOJ: - { - cy_as_gadget_ioctl_cancel *usr_d = - (cy_as_gadget_ioctl_cancel *)param; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message( - "%s: got CYASGADGET_CANCELSOJ\n", - __func__); - #endif - - ret_stat = cy_as_mtp_cancel_send_object(dev->dev_handle, 0, 0); - - retval = __put_user(ret_stat, (uint32_t __user *) - (&(usr_d->ret_val))); - break; - } - case CYASGADGET_CANCELGOJ: - { - cy_as_gadget_ioctl_cancel *usr_d = - (cy_as_gadget_ioctl_cancel *)param; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: got CYASGADGET_CANCELGOJ\n", - __func__); - #endif - - ret_stat = cy_as_mtp_cancel_get_object(dev->dev_handle, 0, 0); - - retval = __put_user(ret_stat, - (uint32_t __user *)(&(usr_d->ret_val))); - break; - } - default: - { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: unknown ioctl received: %d\n", - __func__, code); - - cy_as_hal_print_message("%s: known codes:\n" - "CYASGADGET_GETMTPSTATUS=%d\n" - "CYASGADGET_CLEARTMTPSTATUS=%d\n" - "CYASGADGET_INITSOJ=%d\n" - "CYASGADGET_INITGOJ=%d\n" - "CYASGADGET_CANCELSOJ=%d\n" - "CYASGADGET_CANCELGOJ=%d\n", - __func__, - CYASGADGET_GETMTPSTATUS, - CYASGADGET_CLEARTMTPSTATUS, - CYASGADGET_INITSOJ, - CYASGADGET_INITGOJ, - CYASGADGET_CANCELSOJ, - CYASGADGET_CANCELGOJ); - #endif - break; - } - } - - return 0; -} - -static int cyasgadget_start(struct usb_gadget_driver *driver, - int (*bind)(struct usb_gadget *)); -static int cyasgadget_stop(struct usb_gadget_driver *driver); - -static const struct usb_gadget_ops cyasgadget_ops = { - .get_frame = cyasgadget_get_frame, - .wakeup = cyasgadget_wakeup, - .set_selfpowered = cyasgadget_set_selfpowered, - .pullup = cyasgadget_pullup, - .ioctl = cyasgadget_ioctl, - .start = cyasgadget_start, - .stop = cyasgadget_stop, -}; - - -/* keeping it simple: - * - one bus driver, initted first; - * - one function driver, initted second - * - * most of the work to support multiple controllers would - * be to associate this gadget driver with all of them, or - * perhaps to bind specific drivers to specific devices. - */ - -static void cyas_ep_reset( - cyasgadget_ep *an_ep - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - an_ep->desc = NULL; - INIT_LIST_HEAD(&an_ep->queue); - - an_ep->stopped = 0; - an_ep->is_in = 0; - an_ep->is_iso = 0; - an_ep->usb_ep_inst.maxpacket = ~0; - an_ep->usb_ep_inst.ops = &cyasgadget_ep_ops; -} - -static void cyas_usb_reset( - cyasgadget *cy_as_dev - ) -{ - cy_as_return_status_t ret; - cy_as_usb_enum_control config; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_device *dev_p = (cy_as_device *)cy_as_dev->dev_handle; - - cy_as_hal_print_message("<1>%s called mtp_firmware=0x%x\n", - __func__, dev_p->is_mtp_firmware); - #endif - - ret = cy_as_misc_release_resource(cy_as_dev->dev_handle, - cy_as_bus_u_s_b); - if (ret != CY_AS_ERROR_SUCCESS && ret != - CY_AS_ERROR_RESOURCE_NOT_OWNED) { - cy_as_hal_print_message("<1>_cy_as_gadget: cannot " - "release usb resource: failed with error code %d\n", - ret); - return; - } - - cy_as_dev->gadget.speed = USB_SPEED_HIGH; - - ret = cy_as_usb_start(cy_as_dev->dev_handle, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_start failed with error code %d\n", - ret); - return; - } - /* P port will do enumeration, not West Bridge */ - config.antioch_enumeration = cy_false; - /* 1 2 : 1-BUS_NUM , 2:Storage_device number, SD - is bus 1*/ - - /* TODO: add module param to enumerate mass storage */ - config.mass_storage_interface = 0; - - if (append_mtp) { - ret = cy_as_mtp_start(cy_as_dev->dev_handle, - cy_as_gadget_mtp_event_callback, 0, 0); - if (ret == CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("MTP start passed, enumerating " - "MTP interface\n"); - config.mtp_interface = append_mtp; - /*Do not enumerate NAND storage*/ - config.devices_to_enumerate[0][0] = cy_false; - - /*enumerate SD storage as MTP*/ - config.devices_to_enumerate[1][0] = cy_true; - } - } else { - cy_as_hal_print_message("MTP start not attempted, not " - "enumerating MTP interface\n"); - config.mtp_interface = 0; - /* enumerate mass storage based on module parameters */ - config.devices_to_enumerate[0][0] = msc_enum_bus_0; - config.devices_to_enumerate[1][0] = msc_enum_bus_1; - } - - ret = cy_as_usb_set_enum_config(cy_as_dev->dev_handle, - &config, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("<1>_cy_as_gadget: " - "cy_as_usb_set_enum_config failed with error " - "code %d\n", ret); - return; - } - - cy_as_usb_set_physical_configuration(cy_as_dev->dev_handle, 1); - -} - -static void cyas_usb_reinit( - cyasgadget *cy_as_dev - ) -{ - int index = 0; - cyasgadget_ep *an_ep_p; - cy_as_return_status_t ret; - cy_as_device *dev_p = (cy_as_device *)cy_as_dev->dev_handle; - - INIT_LIST_HEAD(&cy_as_dev->gadget.ep_list); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called, is_mtp_firmware = " - "0x%x\n", __func__, dev_p->is_mtp_firmware); - #endif - - /* Init the end points */ - for (index = 1; index <= 15; index++) { - an_ep_p = &cy_as_dev->an_gadget_ep[index]; - cyas_ep_reset(an_ep_p); - an_ep_p->usb_ep_inst.name = cy_as_ep_names[index]; - an_ep_p->dev = cy_as_dev; - an_ep_p->num = index; - memset(&an_ep_p->cyepconfig, 0, sizeof(an_ep_p->cyepconfig)); - - /* EP0, EPs 2,4,6,8 need not be added */ - if ((index <= 8) && (index % 2 == 0) && - (!dev_p->is_mtp_firmware)) { - /* EP0 is 64 and EPs 2,4,6,8 not allowed */ - cy_as_dev->an_gadget_ep[index].fifo_size = 0; - } else { - if (index == 1) - an_ep_p->fifo_size = 64; - else - an_ep_p->fifo_size = 512; - list_add_tail(&an_ep_p->usb_ep_inst.ep_list, - &cy_as_dev->gadget.ep_list); - } - } - /* need to setendpointconfig before usb connect, this is not - * quite compatible with gadget methodology (ep_enable called - * by gadget after connect), therefore need to set config in - * initialization and verify compatibility in ep_enable, - * kick up error otherwise*/ - an_ep_p = &cy_as_dev->an_gadget_ep[3]; - an_ep_p->cyepconfig.enabled = cy_true; - an_ep_p->cyepconfig.dir = cy_as_usb_out; - an_ep_p->cyepconfig.type = cy_as_usb_bulk; - an_ep_p->cyepconfig.size = 0; - an_ep_p->cyepconfig.physical = 1; - ret = cy_as_usb_set_end_point_config(an_ep_p->dev->dev_handle, - 3, &an_ep_p->cyepconfig); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("cy_as_usb_set_end_point_config " - "failed with error code %d\n", ret); - } - - cy_as_usb_set_stall(an_ep_p->dev->dev_handle, 3, 0, 0); - - an_ep_p = &cy_as_dev->an_gadget_ep[5]; - an_ep_p->cyepconfig.enabled = cy_true; - an_ep_p->cyepconfig.dir = cy_as_usb_in; - an_ep_p->cyepconfig.type = cy_as_usb_bulk; - an_ep_p->cyepconfig.size = 0; - an_ep_p->cyepconfig.physical = 2; - ret = cy_as_usb_set_end_point_config(an_ep_p->dev->dev_handle, - 5, &an_ep_p->cyepconfig); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("cy_as_usb_set_end_point_config " - "failed with error code %d\n", ret); - } - - cy_as_usb_set_stall(an_ep_p->dev->dev_handle, 5, 0, 0); - - an_ep_p = &cy_as_dev->an_gadget_ep[9]; - an_ep_p->cyepconfig.enabled = cy_true; - an_ep_p->cyepconfig.dir = cy_as_usb_in; - an_ep_p->cyepconfig.type = cy_as_usb_bulk; - an_ep_p->cyepconfig.size = 0; - an_ep_p->cyepconfig.physical = 4; - ret = cy_as_usb_set_end_point_config(an_ep_p->dev->dev_handle, - 9, &an_ep_p->cyepconfig); - if (ret != CY_AS_ERROR_SUCCESS) { - cy_as_hal_print_message("cy_as_usb_set_end_point_config " - "failed with error code %d\n", ret); - } - - cy_as_usb_set_stall(an_ep_p->dev->dev_handle, 9, 0, 0); - - if (dev_p->mtp_count != 0) { - /* these need to be set for compatibility with - * the gadget_enable logic */ - an_ep_p = &cy_as_dev->an_gadget_ep[2]; - an_ep_p->cyepconfig.enabled = cy_true; - an_ep_p->cyepconfig.dir = cy_as_usb_out; - an_ep_p->cyepconfig.type = cy_as_usb_bulk; - an_ep_p->cyepconfig.size = 0; - an_ep_p->cyepconfig.physical = 0; - cy_as_usb_set_stall(an_ep_p->dev->dev_handle, 2, 0, 0); - - an_ep_p = &cy_as_dev->an_gadget_ep[6]; - an_ep_p->cyepconfig.enabled = cy_true; - an_ep_p->cyepconfig.dir = cy_as_usb_in; - an_ep_p->cyepconfig.type = cy_as_usb_bulk; - an_ep_p->cyepconfig.size = 0; - an_ep_p->cyepconfig.physical = 0; - cy_as_usb_set_stall(an_ep_p->dev->dev_handle, 6, 0, 0); - } - - cyas_ep_reset(&cy_as_dev->an_gadget_ep[0]); - cy_as_dev->an_gadget_ep[0].usb_ep_inst.name = cy_as_ep_names[0]; - cy_as_dev->an_gadget_ep[0].dev = cy_as_dev; - cy_as_dev->an_gadget_ep[0].num = 0; - cy_as_dev->an_gadget_ep[0].fifo_size = 64; - - cy_as_dev->an_gadget_ep[0].usb_ep_inst.maxpacket = 64; - cy_as_dev->gadget.ep0 = &cy_as_dev->an_gadget_ep[0].usb_ep_inst; - cy_as_dev->an_gadget_ep[0].stopped = 0; - INIT_LIST_HEAD(&cy_as_dev->gadget.ep0->ep_list); -} - -static void cyas_ep0_start( - cyasgadget *dev - ) -{ - cy_as_return_status_t ret; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - ret = cy_as_usb_register_callback(dev->dev_handle, - cy_as_gadget_usb_event_callback); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_usb_register_callback " - "failed with error code %d\n", __func__, ret); - #endif - return; - } - - ret = cy_as_usb_commit_config(dev->dev_handle, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_usb_commit_config " - "failed with error code %d\n", __func__, ret); - #endif - return; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_usb_commit_config " - "message sent\n", __func__); - #endif - - ret = cy_as_usb_connect(dev->dev_handle, 0, 0); - if (ret != CY_AS_ERROR_SUCCESS) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_usb_connect failed " - "with error code %d\n", __func__, ret); - #endif - return; - } - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s: cy_as_usb_connect message " - "sent\n", __func__); - #endif -} - -/* - * When a driver is successfully registered, it will receive - * control requests including set_configuration(), which enables - * non-control requests. then usb traffic follows until a - * disconnect is reported. then a host may connect again, or - * the driver might get unbound. - */ -static int cyasgadget_start(struct usb_gadget_driver *driver, - int (*bind)(struct usb_gadget *)) -{ - cyasgadget *dev = cy_as_gadget_controller; - int retval; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called driver=0x%x\n", - __func__, (unsigned int) driver); - #endif - - /* insist on high speed support from the driver, since - * "must not be used in normal operation" - */ - if (!driver - || !bind - || !driver->unbind - || !driver->setup) - return -EINVAL; - - if (!dev) - return -ENODEV; - - if (dev->driver) - return -EBUSY; - - /* hook up the driver ... */ - dev->softconnect = 1; - driver->driver.bus = NULL; - dev->driver = driver; - dev->gadget.dev.driver = &driver->driver; - - /* Do the needful */ - cyas_usb_reset(dev); /* External usb */ - cyas_usb_reinit(dev); /* Internal */ - - retval = bind(&dev->gadget); - if (retval) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("%s bind to driver %s --> %d\n", - __func__, driver->driver.name, retval); - #endif - - dev->driver = NULL; - dev->gadget.dev.driver = NULL; - return retval; - } - - /* ... then enable host detection and ep0; and we're ready - * for set_configuration as well as eventual disconnect. - */ - cyas_ep0_start(dev); - - return 0; -} - -static void cyasgadget_nuke( - cyasgadget_ep *an_ep - ) -{ - cyasgadget *dev = cy_as_gadget_controller; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - cy_as_usb_cancel_async(dev->dev_handle, an_ep->num); - an_ep->stopped = 1; - - while (!list_empty(&an_ep->queue)) { - cyasgadget_req *an_req = list_entry - (an_ep->queue.next, cyasgadget_req, queue); - list_del_init(&an_req->queue); - an_req->req.status = -ESHUTDOWN; - an_req->req.complete(&an_ep->usb_ep_inst, &an_req->req); - } -} - -static void cyasgadget_stop_activity( - cyasgadget *dev, - struct usb_gadget_driver *driver - ) -{ - int index; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - /* don't disconnect if it's not connected */ - if (dev->gadget.speed == USB_SPEED_UNKNOWN) - driver = NULL; - - if (spin_is_locked(&dev->lock)) - spin_unlock(&dev->lock); - - /* Stop hardware; prevent new request submissions; - * and kill any outstanding requests. - */ - cy_as_usb_disconnect(dev->dev_handle, 0, 0); - - for (index = 3; index <= 7; index += 2) { - cyasgadget_ep *an_ep_p = &dev->an_gadget_ep[index]; - cyasgadget_nuke(an_ep_p); - } - - for (index = 9; index <= 15; index++) { - cyasgadget_ep *an_ep_p = &dev->an_gadget_ep[index]; - cyasgadget_nuke(an_ep_p); - } - - /* report disconnect; the driver is already quiesced */ - if (driver) - driver->disconnect(&dev->gadget); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("cy_as_usb_disconnect returned success"); - #endif - - /* Stop Usb */ - cy_as_usb_stop(dev->dev_handle, 0, 0); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("cy_as_usb_stop returned success"); - #endif -} - -static int cyasgadget_stop( - struct usb_gadget_driver *driver - ) -{ - cyasgadget *dev = cy_as_gadget_controller; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - if (!dev) - return -ENODEV; - - if (!driver || driver != dev->driver) - return -EINVAL; - - cyasgadget_stop_activity(dev, driver); - - driver->unbind(&dev->gadget); - dev->gadget.dev.driver = NULL; - dev->driver = NULL; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("unregistered driver '%s'\n", - driver->driver.name); - #endif - - return 0; -} - -static void cyas_gadget_release( - struct device *_dev - ) -{ - cyasgadget *dev = dev_get_drvdata(_dev); - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>%s called\n", __func__); - #endif - - kfree(dev); -} - -/* DeInitialize gadget driver */ -static void cyasgadget_deinit( - cyasgadget *cy_as_dev - ) -{ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget deinitialize called\n"); - #endif - - if (!cy_as_dev) { - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget_deinit: " - "invalid cyasgadget device\n"); - #endif - return; - } - usb_del_gadget_udc(&cy_as_dev->gadget); - - if (cy_as_dev->driver) { - /* should have been done already by driver model core */ - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1> cy_as_gadget: '%s' " - "is still registered\n", - cy_as_dev->driver->driver.name); - #endif - usb_gadget_unregister_driver(cy_as_dev->driver); - } - - kfree(cy_as_dev); - cy_as_gadget_controller = NULL; -} - -/* Initialize gadget driver */ -static int cyasgadget_initialize(void) -{ - cyasgadget *cy_as_dev = 0; - int retval = 0; - - #ifndef WESTBRIDGE_NDEBUG - cy_as_hal_print_message("<1>_cy_as_gadget [V1.1] initialize called\n"); - #endif - - if (cy_as_gadget_controller != 0) { - cy_as_hal_print_message("<1> cy_as_gadget: the device has " - "already been initilaized. ignoring\n"); - return -EBUSY; - } - - cy_as_dev = kzalloc(sizeof(cyasgadget), GFP_ATOMIC); - if (cy_as_dev == NULL) { - cy_as_hal_print_message("<1> cy_as_gadget: memory " - "allocation failed\n"); - return -ENOMEM; - } - - spin_lock_init(&cy_as_dev->lock); - cy_as_dev->gadget.ops = &cyasgadget_ops; - cy_as_dev->gadget.is_dualspeed = 1; - - /* the "gadget" abstracts/virtualizes the controller */ - /*strcpy(cy_as_dev->gadget.dev.bus_id, "cyasgadget");*/ - cy_as_dev->gadget.dev.release = cyas_gadget_release; - cy_as_dev->gadget.name = cy_as_driver_name; - - /* Get the device handle */ - cy_as_dev->dev_handle = cyasdevice_getdevhandle(); - if (0 == cy_as_dev->dev_handle) { - #ifndef NDEBUG - cy_as_hal_print_message("<1> cy_as_gadget: " - "no west bridge device\n"); - #endif - retval = -EFAULT; - goto done; - } - - /* We are done now */ - cy_as_gadget_controller = cy_as_dev; -#if 0 - pdev is the platform_device or pci_device or whatever is used here - retval = usb_add_gadget_udc(&pdev->dev, &cy_as_dev->gadget); - if (retval) - goto done; -#endif - - return 0; - -/* - * in case of an error - */ -done: - if (cy_as_dev) - cyasgadget_deinit(cy_as_dev); - - return retval; -} - -static int __init cyas_init(void) -{ - int init_res = 0; - - init_res = cyasgadget_initialize(); - - if (init_res != 0) { - printk(KERN_WARNING "<1> gadget ctl instance " - "init error:%d\n", init_res); - if (init_res > 0) { - /* force -E/0 linux convention */ - init_res = init_res * -1; - } - } - - return init_res; -} -module_init(cyas_init); - -static void __exit cyas_cleanup(void) -{ - if (cy_as_gadget_controller != NULL) - cyasgadget_deinit(cy_as_gadget_controller); -} -module_exit(cyas_cleanup); - - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION(CY_AS_DRIVER_DESC); -MODULE_AUTHOR("cypress semiconductor"); - -/*[]*/ diff --git a/drivers/staging/westbridge/astoria/gadget/cyasgadget.h b/drivers/staging/westbridge/astoria/gadget/cyasgadget.h deleted file mode 100644 index e01cea7..0000000 --- a/drivers/staging/westbridge/astoria/gadget/cyasgadget.h +++ /dev/null @@ -1,193 +0,0 @@ -/* cyangadget.h - Linux USB Gadget driver file for the Cypress West Bridge -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * Cypress West Bridge high/full speed USB device controller code - * Based on the Netchip 2280 device controller by David Brownell - * in the linux 2.6.10 kernel - * - * linux/drivers/usb/gadget/net2280.h - */ - -/* - * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com) - * Copyright (C) 2003 David Brownell - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _INCLUDED_CYANGADGET_H_ -#define _INCLUDED_CYANGADGET_H_ - -#include -#include -#include -#include -#include - -#include "../include/linux/westbridge/cyastoria.h" -#include "../include/linux/westbridge/cyashal.h" -#include "../include/linux/westbridge/cyasdevice.h" -#include "cyasgadget_ioctl.h" - -#include -#include - -/*char driver defines, revisit*/ -#include -#include -#include -#include /* everything... */ -#include /* error codes */ -#include /* size_t */ -#include -#include /* O_ACCMODE */ -#include -#include -#include -#include -#include /* vmalloc(), vfree */ -#include /*fat_alloc_cluster*/ -#include -#include /* cli(), *_flags */ -#include /* copy_*_user */ - -extern int mpage_cleardirty(struct address_space *mapping, int num_pages); -extern int fat_get_block(struct inode *, sector_t , struct buffer_head *, int); -extern cy_as_device_handle *cyasdevice_getdevhandle(void); - -/* Driver data structures and utilities */ -typedef struct cyasgadget_ep { - struct usb_ep usb_ep_inst; - struct cyasgadget *dev; - - /* analogous to a host-side qh */ - struct list_head queue; - const struct usb_endpoint_descriptor *desc; - unsigned num:8, - fifo_size:12, - in_fifo_validate:1, - out_overflow:1, - stopped:1, - is_in:1, - is_iso:1; - cy_as_usb_end_point_config cyepconfig; -} cyasgadget_ep; - -typedef struct cyasgadget_req { - struct usb_request req; - struct list_head queue; - int ep_num; - unsigned mapped:1, - valid:1, - complete:1, - ep_stopped:1; -} cyasgadget_req; - -typedef struct cyasgadget { - /* each device provides one gadget, several endpoints */ - struct usb_gadget gadget; - spinlock_t lock; - struct cyasgadget_ep an_gadget_ep[16]; - struct usb_gadget_driver *driver; - /* Handle to the West Bridge device */ - cy_as_device_handle dev_handle; - unsigned enabled:1, - protocol_stall:1, - softconnect:1, - outsetupreq:1; - struct completion thread_complete; - wait_queue_head_t thread_wq; - struct semaphore thread_sem; - struct list_head thread_queue; - - cy_bool tmtp_send_complete; - cy_bool tmtp_get_complete; - cy_bool tmtp_need_new_blk_tbl; - /* Data member used to store the SendObjectComplete event data */ - cy_as_mtp_send_object_complete_data tmtp_send_complete_data; - /* Data member used to store the GetObjectComplete event data */ - cy_as_mtp_get_object_complete_data tmtp_get_complete_data; - -} cyasgadget; - -static inline void set_halt(cyasgadget_ep *ep) -{ - return; -} - -static inline void clear_halt(cyasgadget_ep *ep) -{ - return; -} - -#define xprintk(dev, level, fmt, args...) \ - printk(level "%s %s: " fmt, driver_name, \ - pci_name(dev->pdev), ## args) - -#ifdef DEBUG -#undef DEBUG -#define DEBUG(dev, fmt, args...) \ - xprintk(dev, KERN_DEBUG, fmt, ## args) -#else -#define DEBUG(dev, fmt, args...) \ - do { } while (0) -#endif /* DEBUG */ - -#ifdef VERBOSE -#define VDEBUG DEBUG -#else -#define VDEBUG(dev, fmt, args...) \ - do { } while (0) -#endif /* VERBOSE */ - -#define ERROR(dev, fmt, args...) \ - xprintk(dev, KERN_ERR, fmt, ## args) -#define GADG_WARN(dev, fmt, args...) \ - xprintk(dev, KERN_WARNING, fmt, ## args) -#define INFO(dev, fmt, args...) \ - xprintk(dev, KERN_INFO, fmt, ## args) - -/*-------------------------------------------------------------------------*/ - -static inline void start_out_naking(struct cyasgadget_ep *ep) -{ - return; -} - -static inline void stop_out_naking(struct cyasgadget_ep *ep) -{ - return; -} - -#endif /* _INCLUDED_CYANGADGET_H_ */ diff --git a/drivers/staging/westbridge/astoria/gadget/cyasgadget_ioctl.h b/drivers/staging/westbridge/astoria/gadget/cyasgadget_ioctl.h deleted file mode 100644 index 21dd716..0000000 --- a/drivers/staging/westbridge/astoria/gadget/cyasgadget_ioctl.h +++ /dev/null @@ -1,99 +0,0 @@ -/* cyasgadget_ioctl.h - Linux USB Gadget driver ioctl file for - * Cypress West Bridge -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef CYASGADGET_IOCTL_H -#define CYASGADGET_IOCTL_H - - -#include -#include - -typedef struct cy_as_gadget_ioctl_send_object { - uint32_t status; - uint32_t byte_count; - uint32_t transaction_id; -} cy_as_gadget_ioctl_send_object; - -typedef struct cy_as_gadget_ioctl_get_object { - uint32_t status; - uint32_t byte_count; -} cy_as_gadget_ioctl_get_object; - - -typedef struct cy_as_gadget_ioctl_tmtp_status { - cy_bool tmtp_send_complete; - cy_bool tmtp_get_complete; - cy_bool tmtp_need_new_blk_tbl; - cy_as_gadget_ioctl_send_object tmtp_send_complete_data; - cy_as_gadget_ioctl_get_object tmtp_get_complete_data; - uint32_t t_usec; -} cy_as_gadget_ioctl_tmtp_status; - -/*Init send object data*/ -typedef struct cy_as_gadget_ioctl_i_s_o_j_d { - uint32_t *blk_addr_p; /* starting sector */ - uint16_t *blk_count_p; /* num of sectors in the block */ - /* number of entries in the blk table */ - uint32_t item_count; - uint32_t num_bytes; - /* in case if more prcise timestamping is done in kernel mode */ - uint32_t t_usec; - uint32_t ret_val; - char *file_name; - uint32_t name_length; - -} cy_as_gadget_ioctl_i_s_o_j_d; - - -/*Init get object data*/ -typedef struct cy_as_gadget_ioctl_i_g_o_j_d { - uint32_t *blk_addr_p; - uint16_t *blk_count_p; - uint32_t item_count; - uint32_t num_bytes; - uint32_t tid; - uint32_t ret_val; - char *file_name; - uint32_t name_length; - -} cy_as_gadget_ioctl_i_g_o_j_d; - -typedef struct cy_as_gadget_ioctl_cancel { - uint32_t ret_val; -} cy_as_gadget_ioctl_cancel; - -#define CYASGADGET_IOC_MAGIC 0xEF -#define CYASGADGET_GETMTPSTATUS \ - _IOW(CYASGADGET_IOC_MAGIC, 0, cy_as_gadget_ioctl_tmtp_status) -#define CYASGADGET_CLEARTMTPSTATUS \ - _IO(CYASGADGET_IOC_MAGIC, 1) -#define CYASGADGET_INITSOJ \ - _IOW(CYASGADGET_IOC_MAGIC, 2, cy_as_gadget_ioctl_i_s_o_j_d) -#define CYASGADGET_INITGOJ \ - _IOW(CYASGADGET_IOC_MAGIC, 3, cy_as_gadget_ioctl_i_g_o_j_d) -#define CYASGADGET_CANCELSOJ \ - _IOW(CYASGADGET_IOC_MAGIC, 4, cy_as_gadget_ioctl_cancel) -#define CYASGADGET_CANCELGOJ \ - _IOW(CYASGADGET_IOC_MAGIC, 5, cy_as_gadget_ioctl_cancel) -#define CYASGADGET_IOC_MAXNR 6 - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanerr.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanerr.h deleted file mode 100644 index c7d4ebb..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanerr.h +++ /dev/null @@ -1,418 +0,0 @@ -/* Cypress West Bridge API header file (cyanerr.h) - ## Symbols for backward compatibility with previous releases of Antioch SDK. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANERR_H_ -#define _INCLUDED_CYANERR_H_ - -#include "cyaserr.h" - -#ifndef __doxygen__ - -/* - * Function completed successfully. - */ -#define CY_AN_ERROR_SUCCESS (CY_AS_ERROR_SUCCESS) - -/* - * A function trying to acquire a resource was unable to do so. - */ -#define CY_AN_ERROR_NOT_ACQUIRED (CY_AS_ERROR_NOT_ACQUIRED) - -/* - * A function trying to acquire a resource was unable to do so. - */ -#define CY_AN_ERROR_NOT_RELEASED (CY_AS_ERROR_NOT_RELEASED) - -/* - * The West Bridge firmware is not loaded. - */ -#define CY_AN_ERROR_NO_FIRMWARE (CY_AS_ERROR_NO_FIRMWARE) - -/* - * A timeout occurred waiting on a response from the West Bridge device - */ -#define CY_AN_ERROR_TIMEOUT (CY_AS_ERROR_TIMEOUT) - -/* - * A request to download firmware was made while not in the CONFIG mode - */ -#define CY_AN_ERROR_NOT_IN_CONFIG_MODE (CY_AS_ERROR_NOT_IN_CONFIG_MODE) - -/* - * This error is returned if the firmware size specified is too invalid. - */ -#define CY_AN_ERROR_INVALID_SIZE (CY_AS_ERROR_INVALID_SIZE) - -/* - * This error is returned if a request is made to acquire a resource that has - * already been acquired. - */ -#define CY_AN_ERROR_RESOURCE_ALREADY_OWNED (CY_AS_ERROR_RESOURCE_ALREADY_OWNED) - -/* - * This error is returned if a request is made to release a resource that has - * not previously been acquired. - */ -#define CY_AN_ERROR_RESOURCE_NOT_OWNED (CY_AS_ERROR_RESOURCE_NOT_OWNED) - -/* - * This error is returned when a request is made for a media that does not - * exist - */ -#define CY_AN_ERROR_NO_SUCH_MEDIA (CY_AS_ERROR_NO_SUCH_MEDIA) - -/* - * This error is returned when a request is made for a device that does - * not exist - */ -#define CY_AN_ERROR_NO_SUCH_DEVICE (CY_AS_ERROR_NO_SUCH_DEVICE) - -/* - * This error is returned when a request is made for a unit that does - * not exist - */ -#define CY_AN_ERROR_NO_SUCH_UNIT (CY_AS_ERROR_NO_SUCH_UNIT) - -/* - * This error is returned when a request is made for a block that does - * not exist - */ -#define CY_AN_ERROR_INVALID_BLOCK (CY_AS_ERROR_INVALID_BLOCK) - -/* - * This error is returned when an invalid trace level is set. - */ -#define CY_AN_ERROR_INVALID_TRACE_LEVEL (CY_AS_ERROR_INVALID_TRACE_LEVEL) - -/* - * This error is returned when West Bridge is already in the standby state - * and an attempt is made to put West Bridge into this state again. - */ -#define CY_AN_ERROR_ALREADY_STANDBY (CY_AS_ERROR_ALREADY_STANDBY) - -/* - * This error is returned when the API needs to set a pin on the - * West Bridge device, but this is not supported by the underlying HAL - * layer. - */ -#define CY_AN_ERROR_SETTING_WAKEUP_PIN (CY_AS_ERROR_SETTING_WAKEUP_PIN) - -/* - * This error is returned when a module is being started that has - * already been started. - */ -#define CY_AN_ERROR_ALREADY_RUNNING (CY_AS_ERROR_ALREADY_RUNNING) - -/* - * This error is returned when a module is being stopped that has - * already been stopped. - */ -#define CY_AN_ERROR_NOT_RUNNING (CY_AS_ERROR_NOT_RUNNING) - -/* - * This error is returned when the caller tries to claim a media that has - * already been claimed. - */ -#define CY_AN_ERROR_MEDIA_ALREADY_CLAIMED (CY_AS_ERROR_MEDIA_ALREADY_CLAIMED) - -/* - * This error is returned when the caller tries to release a media that - * has already been released. - */ -#define CY_AN_ERROR_MEDIA_NOT_CLAIMED (CY_AS_ERROR_MEDIA_NOT_CLAIMED) - -/* - * This error is returned when canceling trying to cancel an asynchronous - * operation when an async operation is not pending. - */ -#define CY_AN_ERROR_NO_OPERATION_PENDING (CY_AS_ERROR_NO_OPERATION_PENDING) - -/* - * This error is returned when an invalid endpoint number is provided - * to an API call. - */ -#define CY_AN_ERROR_INVALID_ENDPOINT (CY_AS_ERROR_INVALID_ENDPOINT) - -/* - * This error is returned when an invalid descriptor type - * is specified in an API call. - */ -#define CY_AN_ERROR_INVALID_DESCRIPTOR (CY_AS_ERROR_INVALID_DESCRIPTOR) - -/* - * This error is returned when an invalid descriptor index - * is specified in an API call. - */ -#define CY_AN_ERROR_BAD_INDEX (CY_AS_ERROR_BAD_INDEX) - -/* - * This error is returned if trying to set a USB descriptor - * when in the P port enumeration mode. - */ -#define CY_AN_ERROR_BAD_ENUMERATION_MODE (CY_AS_ERROR_BAD_ENUMERATION_MODE) - -/* - * This error is returned when the endpoint configuration specified - * is not valid. - */ -#define CY_AN_ERROR_INVALID_CONFIGURATION (CY_AS_ERROR_INVALID_CONFIGURATION) - -/* - * This error is returned when the API cannot verify it is connected - * to an West Bridge device. - */ -#define CY_AN_ERROR_NO_ANTIOCH (CY_AS_ERROR_NO_ANTIOCH) - -/* - * This error is returned when an API function is called and - * CyAnMiscConfigureDevice has not been called to configure West - * Bridge for the current environment. - */ -#define CY_AN_ERROR_NOT_CONFIGURED (CY_AS_ERROR_NOT_CONFIGURED) - -/* - * This error is returned when West Bridge cannot allocate memory required for - * internal API operations. - */ -#define CY_AN_ERROR_OUT_OF_MEMORY (CY_AS_ERROR_OUT_OF_MEMORY) - -/* - * This error is returned when a module is being started that has - * already been started. - */ -#define CY_AN_ERROR_NESTED_SLEEP (CY_AS_ERROR_NESTED_SLEEP) - -/* - * This error is returned when an operation is attempted on an endpoint that has - * been disabled. - */ -#define CY_AN_ERROR_ENDPOINT_DISABLED (CY_AS_ERROR_ENDPOINT_DISABLED) - -/* - * This error is returned when a call is made to an API function when the device - * is in standby. - */ -#define CY_AN_ERROR_IN_STANDBY (CY_AS_ERROR_IN_STANDBY) - -/* - * This error is returned when an API call is made with an invalid handle value. - */ -#define CY_AN_ERROR_INVALID_HANDLE (CY_AS_ERROR_INVALID_HANDLE) - -/* - * This error is returned when an invalid response is returned from the West - * Bridge device. - */ -#define CY_AN_ERROR_INVALID_RESPONSE (CY_AS_ERROR_INVALID_RESPONSE) - -/* - * This error is returned from the callback function for any asynchronous - * read or write request that is canceled. - */ -#define CY_AN_ERROR_CANCELED (CY_AS_ERROR_CANCELED) - -/* - * This error is returned when the call to create sleep channel fails - * in the HAL layer. - */ -#define CY_AN_ERROR_CREATE_SLEEP_CHANNEL_FAILED \ - (CY_AS_ERROR_CREATE_SLEEP_CHANNEL_FAILED) - -/* - * This error is returned when the call to CyAnMiscLeaveStandby - * is made and the device is not in standby. - */ -#define CY_AN_ERROR_NOT_IN_STANDBY (CY_AS_ERROR_NOT_IN_STANDBY) - -/* - * This error is returned when the call to destroy sleep channel fails - * in the HAL layer. - */ -#define CY_AN_ERROR_DESTROY_SLEEP_CHANNEL_FAILED \ - (CY_AS_ERROR_DESTROY_SLEEP_CHANNEL_FAILED) - -/* - * This error is returned when an invalid resource is specified to a call - * to CyAnMiscAcquireResource() or CyAnMiscReleaseResource() - */ -#define CY_AN_ERROR_INVALID_RESOURCE (CY_AS_ERROR_INVALID_RESOURCE) - -/* - * This error occurs when an operation is requested on an endpoint that has - * a currently pending async operation. - */ -#define CY_AN_ERROR_ASYNC_PENDING (CY_AS_ERROR_ASYNC_PENDING) - -/* - * This error is returned when a call to CyAnStorageCancelAsync() or - * CyAnUsbCancelAsync() is made when no asynchronous request is pending. - */ -#define CY_AN_ERROR_ASYNC_NOT_PENDING (CY_AS_ERROR_ASYNC_NOT_PENDING) - -/* - * This error is returned when a request is made to put the West Bridge device - * into standby mode while the USB stack is still active. - */ -#define CY_AN_ERROR_USB_RUNNING (CY_AS_ERROR_USB_RUNNING) - -/* - * A request for in the wrong direction was issued on an endpoint. - */ -#define CY_AN_ERROR_USB_BAD_DIRECTION (CY_AS_ERROR_USB_BAD_DIRECTION) - -/* - * An invalid request was received - */ -#define CY_AN_ERROR_INVALID_REQUEST (CY_AS_ERROR_INVALID_REQUEST) - -/* - * An ACK request was requested while no setup packet was pending. - */ -#define CY_AN_ERROR_NO_SETUP_PACKET_PENDING \ - (CY_AS_ERROR_NO_SETUP_PACKET_PENDING) - -/* - * A call was made to a API function that cannot be called from a callback. - */ -#define CY_AN_ERROR_INVALID_IN_CALLBACK (CY_AS_ERROR_INVALID_IN_CALLBACK) - -/* - * A call was made to CyAnUsbSetEndPointConfig() before - * CyAnUsbSetPhysicalConfiguration() was called. - */ -#define CY_AN_ERROR_ENDPOINT_CONFIG_NOT_SET \ - (CY_AS_ERROR_ENDPOINT_CONFIG_NOT_SET) - -/* - * The physical endpoint referenced is not valid in the current - * physical configuration - */ -#define CY_AN_ERROR_INVALID_PHYSICAL_ENDPOINT \ - (CY_AS_ERROR_INVALID_PHYSICAL_ENDPOINT) - -/* - * The data supplied to the CyAnMiscDownloadFirmware() call is not aligned on a - * WORD (16 bit) boundary. - */ -#define CY_AN_ERROR_ALIGNMENT_ERROR (CY_AS_ERROR_ALIGNMENT_ERROR) - -/* - * A call was made to destroy the West Bridge device, but the USB stack or the - * storage stack was will running. - */ -#define CY_AN_ERROR_STILL_RUNNING (CY_AS_ERROR_STILL_RUNNING) - -/* - * A call was made to the API for a function that is not yet supported. - */ -#define CY_AN_ERROR_NOT_YET_SUPPORTED (CY_AS_ERROR_NOT_YET_SUPPORTED) - -/* - * A NULL callback was provided where a non-NULL callback was required - */ -#define CY_AN_ERROR_NULL_CALLBACK (CY_AS_ERROR_NULL_CALLBACK) - -/* - * This error is returned when a request is made to put the West Bridge device - * into standby mode while the storage stack is still active. - */ -#define CY_AN_ERROR_STORAGE_RUNNING (CY_AS_ERROR_STORAGE_RUNNING) - -/* - * This error is returned when an operation is attempted that cannot be - * completed while the USB stack is connected to a USB host. - */ -#define CY_AN_ERROR_USB_CONNECTED (CY_AS_ERROR_USB_CONNECTED) - -/* - * This error is returned when a USB disconnect is attempted and the - * West Bridge device is not connected. - */ -#define CY_AN_ERROR_USB_NOT_CONNECTED (CY_AS_ERROR_USB_NOT_CONNECTED) - -/* - * This error is returned when an P2S storage operation attempted and - * data could not be read or written to the storage media. - */ -#define CY_AN_ERROR_MEDIA_ACCESS_FAILURE (CY_AS_ERROR_MEDIA_ACCESS_FAILURE) - -/* - * This error is returned when an P2S storage operation attempted and - * the media is write protected. - */ -#define CY_AN_ERROR_MEDIA_WRITE_PROTECTED (CY_AS_ERROR_MEDIA_WRITE_PROTECTED) - -/* - * This error is returned when an attempt is made to cancel a request - * that has already been sent to the West Bridge. - */ -#define CY_AN_ERROR_OPERATION_IN_TRANSIT (CY_AS_ERROR_OPERATION_IN_TRANSIT) - -/* - * This error is returned when an invalid parameter is passed to one of - * the APIs. - */ -#define CY_AN_ERROR_INVALID_PARAMETER (CY_AS_ERROR_INVALID_PARAMETER) - -/* - * This error is returned if an API is not supported by the current - * West Bridge device or the active firmware version. - */ -#define CY_AN_ERROR_NOT_SUPPORTED (CY_AS_ERROR_NOT_SUPPORTED) - -/* - * This error is returned when a call is made to one of the Storage or - * USB APIs while the device is in suspend mode. - */ -#define CY_AN_ERROR_IN_SUSPEND (CY_AS_ERROR_IN_SUSPEND) - -/* - * This error is returned when the call to CyAnMiscLeaveSuspend - * is made and the device is not in suspend mode. - */ -#define CY_AN_ERROR_NOT_IN_SUSPEND (CY_AS_ERROR_NOT_IN_SUSPEND) - -/* - * This error is returned when a command that is disabled by USB is called. - */ -#define CY_AN_ERROR_FEATURE_NOT_ENABLED (CY_AS_ERROR_FEATURE_NOT_ENABLED) - -/* - * This error is returned when an Async storage read or write is called before a - * query device call is issued. - */ -#define CY_AN_ERROR_QUERY_DEVICE_NEEDED (CY_AS_ERROR_QUERY_DEVICE_NEEDED) - -/* - * This error is returned when a call is made to USB or STORAGE Start or - * Stop before a prior Start or Stop has finished. - */ -#define CY_AN_ERROR_STARTSTOP_PENDING (CY_AS_ERROR_STARTSTOP_PENDING) - -/* - * This error is returned when a request is made for a bus that does not exist - */ -#define CY_AN_ERROR_NO_SUCH_BUS (CY_AS_ERROR_NO_SUCH_BUS) - -#endif /* __doxygen__ */ - -#endif /* _INCLUDED_CYANERR_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmedia.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmedia.h deleted file mode 100644 index be07488..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmedia.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Cypress West Bridge API header file (cyanmedia.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANMEDIA_H_ -#define _INCLUDED_CYANMEDIA_H_ - -#include "cyas_cplus_start.h" - -/* Summary - Specifies a specific type of media supported by West Bridge - - Description - The West Bridge device supports five specific types - of media as storage/IO devices attached to it's S-Port. This - type is used to indicate the type of media being referenced in - any API call. -*/ -#include "cyasmedia.h" - -/* Flash NAND memory (may be SLC or MLC) */ -#define cy_an_media_nand cy_as_media_nand - -/* An SD flash memory device */ -#define cy_an_media_sd_flash cy_as_media_sd_flash - -/* An MMC flash memory device */ -#define cy_an_media_mmc_flash cy_as_media_mmc_flash - -/* A CE-ATA disk drive */ -#define cy_an_media_ce_ata cy_as_media_ce_ata - - /* SDIO device. */ -#define cy_an_media_sdio cy_as_media_sdio -#define cy_an_media_max_media_value \ - cy_as_media_max_media_value - -typedef cy_as_media_type cy_an_media_type; - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYANMEDIA_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmisc.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmisc.h deleted file mode 100644 index 0838648..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmisc.h +++ /dev/null @@ -1,614 +0,0 @@ -/* Cypress West Bridge API header file (cyanmisc.h) - ## Version for backward compatibility with previous Antioch SDK releases. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANMISC_H_ -#define _INCLUDED_CYANMISC_H_ - -#include "cyantypes.h" -#include -#include "cyanmedia.h" -#include "cyas_cplus_start.h" - -#define CY_AN_LEAVE_STANDBY_DELAY_CLOCK \ - (CY_AS_LEAVE_STANDBY_DELAY_CLOCK) -#define CY_AN_RESET_DELAY_CLOCK \ - (CY_AS_RESET_DELAY_CLOCK) - -#define CY_AN_LEAVE_STANDBY_DELAY_CRYSTAL \ - (CY_AS_LEAVE_STANDBY_DELAY_CRYSTAL) - -#define CY_AN_RESET_DELAY_CRYSTAL \ - (CY_AS_RESET_DELAY_CRYSTAL) - -/* Defines to convert the old CyAn names to the new - * CyAs names - */ -typedef cy_as_device_handle cy_an_device_handle; - -#define cy_an_device_dack_ack cy_as_device_dack_ack -#define cy_an_device_dack_eob cy_as_device_dack_eob -typedef cy_as_device_dack_mode cy_an_device_dack_mode; - -typedef cy_as_device_config cy_an_device_config; - -#define cy_an_resource_u_s_b cy_as_bus_u_sB -#define cy_an_resource_sdio_MMC cy_as_bus_1 -#define cy_an_resource_nand cy_as_bus_0 -typedef cy_as_resource_type cy_an_resource_type; - -#define cy_an_reset_soft cy_as_reset_soft -#define cy_an_reset_hard cy_as_reset_hard -typedef cy_as_reset_type cy_an_reset_type; -typedef cy_as_funct_c_b_type cy_an_funct_c_b_type; -typedef cy_as_function_callback cy_an_function_callback; - -#define cy_an_event_misc_initialized \ - cy_as_event_misc_initialized -#define cy_an_event_misc_awake \ - cy_as_event_misc_awake -#define cy_an_event_misc_heart_beat \ - cy_as_event_misc_heart_beat -#define cy_an_event_misc_wakeup \ - cy_as_event_misc_wakeup -#define cy_an_event_misc_device_mismatch \ - cy_as_event_misc_device_mismatch -typedef cy_as_misc_event_type \ - cy_an_misc_event_type; -typedef cy_as_misc_event_callback \ - cy_an_misc_event_callback; - -#define cy_an_misc_gpio_0 cy_as_misc_gpio_0 -#define cy_an_misc_gpio_1 cy_as_misc_gpio_1 -#define cy_an_misc_gpio__nand_CE \ - cy_as_misc_gpio__nand_CE -#define cy_an_misc_gpio__nand_CE2 \ - cy_as_misc_gpio__nand_CE2 -#define cy_an_misc_gpio__nand_WP \ - cy_as_misc_gpio__nand_WP -#define cy_an_misc_gpio__nand_CLE \ - cy_as_misc_gpio__nand_CLE -#define cy_an_misc_gpio__nand_ALE \ - cy_as_misc_gpio__nand_ALE -#define cy_an_misc_gpio_U_valid \ - cy_as_misc_gpio_U_valid -#define cy_an_misc_gpio_SD_POW \ - cy_as_misc_gpio_SD_POW -typedef cy_as_misc_gpio cy_an_misc_gpio; - -#define CY_AN_SD_DEFAULT_FREQ CY_AS_SD_DEFAULT_FREQ -#define CY_AN_SD_RATED_FREQ CY_AS_SD_RATED_FREQ -typedef cy_as_low_speed_sd_freq cy_an_low_speed_sd_freq; - -#define CY_AN_HS_SD_FREQ_48 CY_AS_HS_SD_FREQ_48 -#define CY_AN_HS_SD_FREQ_24 CY_AS_HS_SD_FREQ_24 -typedef cy_as_high_speed_sd_freq \ - cy_an_high_speed_sd_freq; - -#define cy_an_misc_active_high cy_as_misc_active_high -#define cy_an_misc_active_low cy_as_misc_active_low -typedef cy_as_misc_signal_polarity cy_an_misc_signal_polarity; - -typedef cy_as_get_firmware_version_data \ - cy_an_get_firmware_version_data; - -enum { - CYAN_FW_TRACE_LOG_NONE = 0, - CYAN_FW_TRACE_LOG_STATE, - CYAN_FW_TRACE_LOG_CALLS, - CYAN_FW_TRACE_LOG_STACK_TRACE, - CYAN_FW_TRACE_MAX_LEVEL -}; - - -/***********************************/ -/***********************************/ -/* FUNCTIONS */ -/***********************************/ -/***********************************/ - - -EXTERN cy_an_return_status_t -cy_an_misc_create_device( - cy_an_device_handle *handle_p, - cy_an_hal_device_tag tag - ); -#define cy_an_misc_create_device(h, tag) \ - cy_as_misc_create_device((cy_as_device_handle *)(h), \ - (cy_as_hal_device_tag)(tag)) - -EXTERN cy_an_return_status_t -cy_an_misc_destroy_device( - cy_an_device_handle handle - ); -#define cy_an_misc_destroy_device(h) \ - cy_as_misc_destroy_device((cy_as_device_handle)(h)) - -EXTERN cy_an_return_status_t -cy_an_misc_configure_device( - cy_an_device_handle handle, - cy_an_device_config *config_p - ); -#define cy_an_misc_configure_device(h, cfg) \ - cy_as_misc_configure_device((cy_as_device_handle)(h), \ - (cy_as_device_config *)(cfg)) - -EXTERN cy_an_return_status_t -cy_an_misc_in_standby( - cy_an_device_handle handle, - cy_bool *standby - ); -#define cy_an_misc_in_standby(h, standby) \ - cy_as_misc_in_standby((cy_as_device_handle)(h), (standby)) - -/* Sync version of Download Firmware */ -EXTERN cy_an_return_status_t -cy_an_misc_download_firmware( - cy_an_device_handle handle, - const void *fw_p, - uint16_t size - ); - -#define cy_an_misc_download_firmware(handle, fw_p, size) \ - cy_as_misc_download_firmware((cy_as_device_handle)\ - (handle), (fw_p), (size), 0, 0) - -/* Async version of Download Firmware */ -EXTERN cy_an_return_status_t -cy_an_misc_download_firmware_e_x( - cy_an_device_handle handle, - const void *fw_p, - uint16_t size, - cy_an_function_callback cb, - uint32_t client - ); - -#define cy_an_misc_download_firmware_e_x(h, fw_p, size, cb, client) \ - cy_as_misc_download_firmware((cy_as_device_handle)(h), \ - (fw_p), (size), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Get Firmware Version */ -EXTERN cy_an_return_status_t -cy_as_misc_get_firmware_version_dep( - cy_as_device_handle handle, - uint16_t *major, - uint16_t *minor, - uint16_t *build, - uint8_t *media_type, - cy_bool *is_debug_mode); - -#define cy_an_misc_get_firmware_version\ - (h, major, minor, bld, type, mode) \ - cy_as_misc_get_firmware_version_dep((cy_as_device_handle)(h), \ - (major), (minor), (bld), (type), (mode)) - -/* Async version of Get Firmware Version*/ -EXTERN cy_an_return_status_t -cy_an_misc_get_firmware_version_e_x( - cy_an_device_handle handle, - cy_an_get_firmware_version_data *data, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_get_firmware_version_e_x\ - (h, data, cb, client) \ - cy_as_misc_get_firmware_version((cy_as_device_handle)(h), \ - (data), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Read MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_read_m_c_u_register( - cy_an_device_handle handle, - uint16_t address, - uint8_t *value - ); - -#define cy_an_misc_read_m_c_u_register(handle, address, value) \ - cy_as_misc_read_m_c_u_register((cy_as_device_handle)(handle), \ - (address), (value), 0, 0) - -/* Async version of Read MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_read_m_c_u_register_e_x( - cy_an_device_handle handle, - uint16_t address, - uint8_t *value, - cy_an_function_callback cb, - uint32_t client - ); - -#define cy_an_misc_read_m_c_u_register_e_x\ - (h, addr, val, cb, client) \ - cy_as_misc_read_m_c_u_register((cy_as_device_handle)(h), \ - (addr), (val), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Write MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_write_m_c_u_register( - cy_an_device_handle handle, - uint16_t address, - uint8_t mask, - uint8_t value - ); -#define cy_an_misc_write_m_c_u_register\ - (handle, address, mask, value) \ - cy_as_misc_write_m_c_u_register((cy_as_device_handle)(handle), \ - (address), (mask), (value), 0, 0) - -/* Async version of Write MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_write_m_c_u_register_e_x( - cy_an_device_handle handle, - uint16_t address, - uint8_t mask, - uint8_t value, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_write_m_c_u_register_e_x\ - (h, addr, mask, val, cb, client) \ - cy_as_misc_write_m_c_u_register((cy_as_device_handle)(h), \ - (addr), (mask), (val), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Write MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_reset( - cy_an_device_handle handle, - cy_an_reset_type type, - cy_bool flush - ); -#define cy_an_misc_reset(handle, type, flush) \ - cy_as_misc_reset((cy_as_device_handle)(handle), \ - (type), (flush), 0, 0) - -/* Async version of Write MCU Register*/ -EXTERN cy_an_return_status_t -cy_an_misc_reset_e_x( - cy_an_device_handle handle, - cy_an_reset_type type, - cy_bool flush, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_reset_e_x(h, type, flush, cb, client) \ - cy_as_misc_reset((cy_as_device_handle)(h), \ - (cy_as_reset_type)(type), (flush), \ - (cy_as_function_callback)(cb), (client)) - -/* Synchronous version of CyAnMiscAcquireResource. */ -EXTERN cy_an_return_status_t -cy_an_misc_acquire_resource( - cy_an_device_handle handle, - cy_an_resource_type type, - cy_bool force - ); -#define cy_an_misc_acquire_resource(h, type, force) \ - cy_as_misc_acquire_resource_dep((cy_as_device_handle)(h), \ - (cy_as_resource_type)(type), (force)) - -/* Asynchronous version of CyAnMiscAcquireResource. */ -EXTERN cy_an_return_status_t -cy_an_misc_acquire_resource_e_x( - cy_an_device_handle handle, - cy_an_resource_type *type, - cy_bool force, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_acquire_resource_e_x\ - (h, type_p, force, cb, client) \ - cy_as_misc_acquire_resource((cy_as_device_handle)(h), \ - (cy_as_resource_type *)(type_p), \ - (force), (cy_as_function_callback)(cb), (client)) - -/* The one and only version of Release resource */ -EXTERN cy_an_return_status_t -cy_an_misc_release_resource( - cy_an_device_handle handle, - cy_an_resource_type type - ); -#define cy_an_misc_release_resource(h, type)\ - cy_as_misc_release_resource((cy_as_device_handle)(h), \ - (cy_as_resource_type)(type)) - -/* Synchronous version of CyAnMiscSetTraceLevel. */ -EXTERN cy_an_return_status_t -cy_an_misc_set_trace_level( - cy_an_device_handle handle, - uint8_t level, - cy_an_media_type media, - uint32_t device, - uint32_t unit - ); - -#define cy_an_misc_set_trace_level\ - (handle, level, media, device, unit) \ - cy_as_misc_set_trace_level_dep((cy_as_device_handle)(handle), \ - (level), (cy_as_media_type)(media), (device), (unit), 0, 0) - -/* Asynchronous version of CyAnMiscSetTraceLevel. */ -EXTERN cy_an_return_status_t -cy_an_misc_set_trace_level_e_x( - cy_an_device_handle handle, - uint8_t level, - cy_an_media_type media, - uint32_t device, - uint32_t unit, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_set_trace_level_e_x\ - (h, level, media, device, unit, cb, client) \ - cy_as_misc_set_trace_level_dep((cy_as_device_handle)(h), \ - (level), (cy_as_media_type)(media), (device), (unit), \ - (cy_as_function_callback)(cb), (client)) - -/* Synchronous version of CyAnMiscEnterStandby. */ -EXTERN cy_an_return_status_t -cy_an_misc_enter_standby( - cy_an_device_handle handle, - cy_bool pin - ); -#define cy_an_misc_enter_standby(handle, pin) \ - cy_as_misc_enter_standby(\ - (cy_as_device_handle)(handle), (pin), 0, 0) - -/* Synchronous version of CyAnMiscEnterStandby. */ -EXTERN cy_an_return_status_t -cy_an_misc_enter_standby_e_x( - cy_an_device_handle handle, - cy_bool pin, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_enter_standby_e_x(h, pin, cb, client) \ - cy_as_misc_enter_standby((cy_as_device_handle)(h), \ - (pin), (cy_as_function_callback)(cb), (client)) - -/* Only one version of CyAnMiscLeaveStandby. */ -EXTERN cy_an_return_status_t -cy_an_misc_leave_standby( - cy_an_device_handle handle, - cy_an_resource_type type - ); -#define cy_an_misc_leave_standby(h, type) \ - cy_as_misc_leave_standby((cy_as_device_handle)(h), \ - (cy_as_resource_type)(type)) - -/* The one version of Misc Register Callback */ -EXTERN cy_an_return_status_t -cy_an_misc_register_callback( - cy_an_device_handle handle, - cy_an_misc_event_callback callback - ); -#define cy_an_misc_register_callback(h, cb) \ - cy_as_misc_register_callback((cy_as_device_handle)(h), \ - (cy_as_misc_event_callback)(cb)) - -/* The only version of SetLogLevel */ -EXTERN void -cy_an_misc_set_log_level( - uint8_t level - ); -#define cy_an_misc_set_log_level(level) \ - cy_as_misc_set_log_level(level) - -/* Sync version of Misc Storage Changed */ -EXTERN cy_an_return_status_t -cy_an_misc_storage_changed( - cy_an_device_handle handle - ); -#define cy_an_misc_storage_changed(handle) \ - cy_as_misc_storage_changed((cy_as_device_handle)(handle), 0, 0) - -/* Async version of Misc Storage Changed */ -EXTERN cy_an_return_status_t -cy_an_misc_storage_changed_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_storage_changed_e_x(h, cb, client) \ - cy_as_misc_storage_changed((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Heartbeat control */ -EXTERN cy_an_return_status_t -cy_an_misc_heart_beat_control( - cy_an_device_handle handle, - cy_bool enable - ); -#define cy_an_misc_heart_beat_control(handle, enable) \ - cy_as_misc_heart_beat_control((cy_as_device_handle)\ - (handle), (enable), 0, 0) - -/* Async version of Heartbeat control */ -EXTERN cy_an_return_status_t -cy_an_misc_heart_beat_control_e_x( - cy_an_device_handle handle, - cy_bool enable, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_heart_beat_control_e_x(h, enable, cb, client) \ - cy_as_misc_heart_beat_control((cy_as_device_handle)(h), \ - (enable), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Get Gpio */ -EXTERN cy_an_return_status_t -cy_an_misc_get_gpio_value( - cy_an_device_handle handle, - cy_an_misc_gpio pin, - uint8_t *value - ); -#define cy_an_misc_get_gpio_value(handle, pin, value) \ - cy_as_misc_get_gpio_value((cy_as_device_handle)(handle), \ - (cy_as_misc_gpio)(pin), (value), 0, 0) - -/* Async version of Get Gpio */ -EXTERN cy_an_return_status_t -cy_an_misc_get_gpio_value_e_x( - cy_an_device_handle handle, - cy_an_misc_gpio pin, - uint8_t *value, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_get_gpio_value_e_x(h, pin, value, cb, client) \ - cy_as_misc_get_gpio_value((cy_as_device_handle)(h), \ - (cy_as_misc_gpio)(pin), (value), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Set Gpio */ -EXTERN cy_an_return_status_t -cy_an_misc_set_gpio_value( - cy_an_device_handle handle, - cy_an_misc_gpio pin, - uint8_t value - ); -#define cy_an_misc_set_gpio_value(handle, pin, value) \ - cy_as_misc_set_gpio_value((cy_as_device_handle)(handle), \ - (cy_as_misc_gpio)(pin), (value), 0, 0) - -/* Async version of Set Gpio */ -EXTERN cy_an_return_status_t -cy_an_misc_set_gpio_value_e_x( - cy_an_device_handle handle, - cy_an_misc_gpio pin, - uint8_t value, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_set_gpio_value_e_x\ - (h, pin, value, cb, client) \ - cy_as_misc_set_gpio_value((cy_as_device_handle)(h), \ - (cy_as_misc_gpio)(pin), (value), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Enter suspend */ -EXTERN cy_an_return_status_t -cy_an_misc_enter_suspend( - cy_an_device_handle handle, - cy_bool usb_wakeup_en, - cy_bool gpio_wakeup_en - ); -#define cy_an_misc_enter_suspend(handle, usb_wakeup_en, \ - gpio_wakeup_en) \ - cy_as_misc_enter_suspend((cy_as_device_handle)(handle), \ - (usb_wakeup_en), (gpio_wakeup_en), 0, 0) - -/* Async version of Enter suspend */ -EXTERN cy_an_return_status_t -cy_an_misc_enter_suspend_e_x( - cy_an_device_handle handle, - cy_bool usb_wakeup_en, - cy_bool gpio_wakeup_en, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_enter_suspend_e_x(h, usb_en, gpio_en, cb, client)\ - cy_as_misc_enter_suspend((cy_as_device_handle)(h), (usb_en), \ - (gpio_en), (cy_as_function_callback)(cb), (client)) - -/* Sync version of Enter suspend */ -EXTERN cy_an_return_status_t -cy_an_misc_leave_suspend( - cy_an_device_handle handle - ); -#define cy_an_misc_leave_suspend(handle) \ - cy_as_misc_leave_suspend((cy_as_device_handle)(handle), 0, 0) - -/* Async version of Enter suspend */ -EXTERN cy_an_return_status_t -cy_an_misc_leave_suspend_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); - -#define cy_an_misc_leave_suspend_e_x(h, cb, client) \ - cy_as_misc_leave_suspend((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of SetLowSpeedSDFreq */ -EXTERN cy_an_return_status_t -cy_an_misc_set_low_speed_sd_freq( - cy_an_device_handle handle, - cy_an_low_speed_sd_freq setting - ); -#define cy_an_misc_set_low_speed_sd_freq(h, setting) \ - cy_as_misc_set_low_speed_sd_freq((cy_as_device_handle)(h), \ - (cy_as_low_speed_sd_freq)(setting), 0, 0) - -/* Async version of SetLowSpeedSDFreq */ -EXTERN cy_an_return_status_t -cy_an_misc_set_low_speed_sd_freq_e_x( - cy_an_device_handle handle, - cy_an_low_speed_sd_freq setting, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_set_low_speed_sd_freq_e_x\ -(h, setting, cb, client) \ - cy_as_misc_set_low_speed_sd_freq((cy_as_device_handle)(h), \ - (cy_as_low_speed_sd_freq)(setting), \ - (cy_as_function_callback)(cb), (client)) - -/* SetHighSpeedSDFreq */ -EXTERN cy_an_return_status_t -cy_an_misc_set_high_speed_sd_freq( - cy_an_device_handle handle, - cy_an_high_speed_sd_freq setting, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_misc_set_high_speed_sd_freq(h, setting, cb, client) \ - cy_as_misc_set_high_speed_sd_freq((cy_as_device_handle)(h), \ - (cy_as_high_speed_sd_freq)(setting), \ - (cy_as_function_callback)(cb), (client)) - -/* ReserveLNABootArea */ -EXTERN cy_an_return_status_t -cy_an_misc_reserve_l_n_a_boot_area( - cy_an_device_handle handle, - uint8_t numzones, - cy_an_function_callback cb, - uint32_t client); -#define cy_an_misc_reserve_l_n_a_boot_area(h, num, cb, client) \ - cy_as_misc_reserve_l_n_a_boot_area((cy_as_device_handle)(h), \ - num, (cy_as_function_callback)(cb), (client)) - -/* SetSDPowerPolarity */ -EXTERN cy_an_return_status_t -cy_an_misc_set_sd_power_polarity( - cy_an_device_handle handle, - cy_an_misc_signal_polarity polarity, - cy_an_function_callback cb, - uint32_t client); -#define cy_an_misc_set_sd_power_polarity(h, pol, cb, client) \ - cy_as_misc_set_sd_power_polarity((cy_as_device_handle)(h), \ - (cy_as_misc_signal_polarity)(pol), \ - (cy_as_function_callback)(cb), (client)) - -#include "cyas_cplus_end.h" - -#endif - diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanregs.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanregs.h deleted file mode 100644 index d670291..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanregs.h +++ /dev/null @@ -1,180 +0,0 @@ -/* Cypress West Bridge API header file (cyanregs.h) - ## Register and field definitions for the Antioch device. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANREG_H_ -#define _INCLUDED_CYANREG_H_ - -#if !defined(__doxygen__) - -#define CY_AN_MEM_CM_WB_CFG_ID (0x80) -#define CY_AN_MEM_CM_WB_CFG_ID_VER_MASK (0x000F) -#define CY_AN_MEM_CM_WB_CFG_ID_HDID_MASK (0xFFF0) -#define CY_AN_MEM_CM_WB_CFG_ID_HDID_ANTIOCH_VALUE (0xA100) -#define CY_AN_MEM_CM_WB_CFG_ID_HDID_ASTORIA_FPGA_VALUE (0x6800) -#define CY_AN_MEM_CM_WB_CFG_ID_HDID_ASTORIA_VALUE (0xA200) - - -#define CY_AN_MEM_RST_CTRL_REG (0x81) -#define CY_AN_MEM_RST_CTRL_REG_HARD (0x0003) -#define CY_AN_MEM_RST_CTRL_REG_SOFT (0x0001) -#define CY_AN_MEM_RST_RSTCMPT (0x0004) - -#define CY_AN_MEM_P0_ENDIAN (0x82) -#define CY_AN_LITTLE_ENDIAN (0x0000) -#define CY_AN_BIG_ENDIAN (0x0101) - -#define CY_AN_MEM_P0_VM_SET (0x83) -#define CY_AN_MEM_P0_VM_SET_VMTYPE_MASK (0x0007) -#define CY_AN_MEM_P0_VM_SET_VMTYPE_RAM (0x0005) -#define CY_AN_MEM_P0_VM_SET_VMTYPE_VMWIDTH (0x0008) -#define CY_AN_MEM_P0_VM_SET_VMTYPE_FLOWCTRL (0x0010) -#define CY_AN_MEM_P0_VM_SET_IFMODE (0x0020) -#define CY_AN_MEM_P0_VM_SET_CFGMODE (0x0040) -#define CY_AN_MEM_P0_VM_SET_DACKEOB (0x0080) -#define CY_AN_MEM_P0_VM_SET_OVERRIDE (0x0100) -#define CY_AN_MEM_P0_VM_SET_INTOVERD (0x0200) -#define CY_AN_MEM_P0_VM_SET_DRQOVERD (0x0400) -#define CY_AN_MEM_P0_VM_SET_DRQPOL (0x0800) -#define CY_AN_MEM_P0_VM_SET_DACKPOL (0x1000) - - -#define CY_AN_MEM_P0_NV_SET (0x84) -#define CY_AN_MEM_P0_NV_SET_WPSWEN (0x0001) -#define CY_AN_MEM_P0_NV_SET_WPPOLAR (0x0002) - -#define CY_AN_MEM_PMU_UPDATE (0x85) -#define CY_AN_MEM_PMU_UPDATE_UVALID (0x0001) -#define CY_AN_MEM_PMU_UPDATE_USBUPDATE (0x0002) -#define CY_AN_MEM_PMU_UPDATE_SDIOUPDATE (0x0004) - -#define CY_AN_MEM_P0_INTR_REG (0x90) -#define CY_AN_MEM_P0_INTR_REG_MCUINT (0x0020) -#define CY_AN_MEM_P0_INTR_REG_DRQINT (0x0800) -#define CY_AN_MEM_P0_INTR_REG_MBINT (0x1000) -#define CY_AN_MEM_P0_INTR_REG_PMINT (0x2000) -#define CY_AN_MEM_P0_INTR_REG_PLLLOCKINT (0x4000) - -#define CY_AN_MEM_P0_INT_MASK_REG (0x91) -#define CY_AN_MEM_P0_INT_MASK_REG_MMCUINT (0x0020) -#define CY_AN_MEM_P0_INT_MASK_REG_MDRQINT (0x0800) -#define CY_AN_MEM_P0_INT_MASK_REG_MMBINT (0x1000) -#define CY_AN_MEM_P0_INT_MASK_REG_MPMINT (0x2000) -#define CY_AN_MEM_P0_INT_MASK_REG_MPLLLOCKINT (0x4000) - -#define CY_AN_MEM_MCU_MB_STAT (0x92) -#define CY_AN_MEM_P0_MCU_MBNOTRD (0x0001) - -#define CY_AN_MEM_P0_MCU_STAT (0x94) -#define CY_AN_MEM_P0_MCU_STAT_CARDINS (0x0001) -#define CY_AN_MEM_P0_MCU_STAT_CARDREM (0x0002) - -#define CY_AN_MEM_PWR_MAGT_STAT (0x95) -#define CY_AN_MEM_PWR_MAGT_STAT_WAKEUP (0x0001) - -#define CY_AN_MEM_P0_RSE_ALLOCATE (0x98) -#define CY_AN_MEM_P0_RSE_ALLOCATE_SDIOAVI (0x0001) -#define CY_AN_MEM_P0_RSE_ALLOCATE_SDIOALLO (0x0002) -#define CY_AN_MEM_P0_RSE_ALLOCATE_NANDAVI (0x0004) -#define CY_AN_MEM_P0_RSE_ALLOCATE_NANDALLO (0x0008) -#define CY_AN_MEM_P0_RSE_ALLOCATE_USBAVI (0x0010) -#define CY_AN_MEM_P0_RSE_ALLOCATE_USBALLO (0x0020) - -#define CY_AN_MEM_P0_RSE_MASK (0x9A) -#define CY_AN_MEM_P0_RSE_MASK_MSDIOBUS_RW (0x0003) -#define CY_AN_MEM_P0_RSE_MASK_MNANDBUS_RW (0x00C0) -#define CY_AN_MEM_P0_RSE_MASK_MUSBBUS_RW (0x0030) - -#define CY_AN_MEM_P0_DRQ (0xA0) -#define CY_AN_MEM_P0_DRQ_EP2DRQ (0x0004) -#define CY_AN_MEM_P0_DRQ_EP3DRQ (0x0008) -#define CY_AN_MEM_P0_DRQ_EP4DRQ (0x0010) -#define CY_AN_MEM_P0_DRQ_EP5DRQ (0x0020) -#define CY_AN_MEM_P0_DRQ_EP6DRQ (0x0040) -#define CY_AN_MEM_P0_DRQ_EP7DRQ (0x0080) -#define CY_AN_MEM_P0_DRQ_EP8DRQ (0x0100) -#define CY_AN_MEM_P0_DRQ_EP9DRQ (0x0200) -#define CY_AN_MEM_P0_DRQ_EP10DRQ (0x0400) -#define CY_AN_MEM_P0_DRQ_EP11DRQ (0x0800) -#define CY_AN_MEM_P0_DRQ_EP12DRQ (0x1000) -#define CY_AN_MEM_P0_DRQ_EP13DRQ (0x2000) -#define CY_AN_MEM_P0_DRQ_EP14DRQ (0x4000) -#define CY_AN_MEM_P0_DRQ_EP15DRQ (0x8000) - -#define CY_AN_MEM_P0_DRQ_MASK (0xA1) -#define CY_AN_MEM_P0_DRQ_MASK_MEP2DRQ (0x0004) -#define CY_AN_MEM_P0_DRQ_MASK_MEP3DRQ (0x0008) -#define CY_AN_MEM_P0_DRQ_MASK_MEP4DRQ (0x0010) -#define CY_AN_MEM_P0_DRQ_MASK_MEP5DRQ (0x0020) -#define CY_AN_MEM_P0_DRQ_MASK_MEP6DRQ (0x0040) -#define CY_AN_MEM_P0_DRQ_MASK_MEP7DRQ (0x0080) -#define CY_AN_MEM_P0_DRQ_MASK_MEP8DRQ (0x0100) -#define CY_AN_MEM_P0_DRQ_MASK_MEP9DRQ (0x0200) -#define CY_AN_MEM_P0_DRQ_MASK_MEP10DRQ (0x0400) -#define CY_AN_MEM_P0_DRQ_MASK_MEP11DRQ (0x0800) -#define CY_AN_MEM_P0_DRQ_MASK_MEP12DRQ (0x1000) -#define CY_AN_MEM_P0_DRQ_MASK_MEP13DRQ (0x2000) -#define CY_AN_MEM_P0_DRQ_MASK_MEP14DRQ (0x4000) -#define CY_AN_MEM_P0_DRQ_MASK_MEP15DRQ (0x8000) - -#define CY_AN_MEM_P0_EP2_DMA_REG (0xA2) -#define CY_AN_MEM_P0_E_pn_DMA_REG_COUNT_MASK (0x7FF) -#define CY_AN_MEM_P0_E_pn_DMA_REG_DMAVAL (1 << 12) -#define CY_AN_MEM_P0_EP3_DMA_REG (0xA3) -#define CY_AN_MEM_P0_EP4_DMA_REG (0xA4) -#define CY_AN_MEM_P0_EP5_DMA_REG (0xA5) -#define CY_AN_MEM_P0_EP6_DMA_REG (0xA6) -#define CY_AN_MEM_P0_EP7_DMA_REG (0xA7) -#define CY_AN_MEM_P0_EP8_DMA_REG (0xA8) -#define CY_AN_MEM_P0_EP9_DMA_REG (0xA9) -#define CY_AN_MEM_P0_EP10_DMA_REG (0xAA) -#define CY_AN_MEM_P0_EP11_DMA_REG (0xAB) -#define CY_AN_MEM_P0_EP12_DMA_REG (0xAC) -#define CY_AN_MEM_P0_EP13_DMA_REG (0xAD) -#define CY_AN_MEM_P0_EP14_DMA_REG (0xAE) -#define CY_AN_MEM_P0_EP15_DMA_REG (0xAF) - -#define CY_AN_MEM_IROS_IO_CFG (0xC1) -#define CY_AN_MEM_IROS_IO_CFG_GPIODRVST_MASK (0x0003) -#define CY_AN_MEM_IROS_IO_CFG_GPIOSLEW_MASK (0x0004) -#define CY_AN_MEM_IROS_IO_CFG_PPIODRVST_MASK (0x0018) -#define CY_AN_MEM_IROS_IO_CFG_PPIOSLEW_MASK (0x0020) -#define CY_AN_MEM_IROS_IO_CFG_SSIODRVST_MASK (0x0300) -#define CY_AN_MEM_IROS_IO_CFG_SSIOSLEW_MASK (0x0400) -#define CY_AN_MEM_IROS_IO_CFG_SNIODRVST_MASK (0x1800) -#define CY_AN_MEM_IROS_IO_CFG_SNIOSLEW_MASK (0x2000) - -#define CY_AN_MEM_PLL_LOCK_LOSS_STAT (0xC4) -#define CY_AN_MEM_PLL_LOCK_LOSS_STAT_PLLSTAT (0x0800) - -#define CY_AN_MEM_P0_MAILBOX0 (0xF0) -#define CY_AN_MEM_P0_MAILBOX1 (0xF1) -#define CY_AN_MEM_P0_MAILBOX2 (0xF2) -#define CY_AN_MEM_P0_MAILBOX3 (0xF3) - -#define CY_AN_MEM_MCU_MAILBOX0 (0xF8) -#define CY_AN_MEM_MCU_MAILBOX1 (0xF9) -#define CY_AN_MEM_MCU_MAILBOX2 (0xFA) -#define CY_AN_MEM_MCU_MAILBOX3 (0xFB) - -#endif /* !defined(__doxygen__) */ - -#endif /* _INCLUDED_CYANREG_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyansdkversion.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyansdkversion.h deleted file mode 100644 index ac26b95..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyansdkversion.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Cypress Antioch Sdk Version file (cyansdkversion.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANSDK_VERSION_H_ -#define _INCLUDED_CYANSDK_VERSION_H_ - -/* Antioch SDK version 1.3.2 */ -#define CYAN_MAJOR_VERSION (1) -#define CYAN_MINOR_VERSION (3) -#define CYAN_BUILD_NUMBER (473) - -#endif /*_INCLUDED_CYANSDK_VERSION_H_*/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanstorage.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanstorage.h deleted file mode 100644 index deb9af8..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanstorage.h +++ /dev/null @@ -1,419 +0,0 @@ -/* Cypress West Bridge API header file (cyanstorage.h) - ## Header for backward compatibility with previous releases of Antioch SDK. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANSTORAGE_H_ -#define _INCLUDED_CYANSTORAGE_H_ -#ifndef __doxygen__ - -#include "cyanmedia.h" -#include "cyanmisc.h" -#include "cyasstorage.h" -#include "cyas_cplus_start.h" - -#define CY_AN_LUN_PHYSICAL_DEVICE (CY_AS_LUN_PHYSICAL_DEVICE) -#define CY_AN_STORAGE_EP_SIZE (CY_AS_STORAGE_EP_SIZE) - -#define cy_an_storage_antioch cy_as_storage_antioch -#define cy_an_storage_processor cy_as_storage_processor -#define cy_an_storage_removed cy_as_storage_removed -#define cy_an_storage_inserted cy_as_storage_inserted -#define cy_an_sdio_interrupt cy_as_sdio_interrupt -typedef cy_as_storage_event cy_an_storage_event; - -#define cy_an_op_read cy_as_op_read -#define cy_an_op_write cy_as_op_write -typedef cy_as_oper_type cy_an_oper_type; - -typedef cy_as_device_desc cy_an_device_desc; - -typedef cy_as_unit_desc cy_an_unit_desc; - -typedef cy_as_storage_callback_dep \ - cy_an_storage_callback; - -typedef cy_as_storage_event_callback_dep \ - cy_an_storage_event_callback; - -#define cy_an_sd_reg_OCR cy_as_sd_reg_OCR -#define cy_an_sd_reg_CID cy_as_sd_reg_CID -#define cy_an_sd_reg_CSD cy_as_sd_reg_CSD -typedef cy_as_sd_card_reg_type \ - cy_an_sd_card_reg_type; - -typedef cy_as_storage_query_device_data_dep \ - cy_an_storage_query_device_data; - -typedef cy_as_storage_query_unit_data_dep \ - cy_an_storage_query_unit_data; - -typedef cy_as_storage_sd_reg_read_data \ - cy_an_storage_sd_reg_read_data; - -#define CY_AN_SD_REG_OCR_LENGTH (CY_AS_SD_REG_OCR_LENGTH) -#define CY_AN_SD_REG_CID_LENGTH (CY_AS_SD_REG_CID_LENGTH) -#define CY_AN_SD_REG_CSD_LENGTH (CY_AS_SD_REG_CSD_LENGTH) -#define CY_AN_SD_REG_MAX_RESP_LENGTH \ - (CY_AS_SD_REG_MAX_RESP_LENGTH) - -/**** API Functions ******/ - -/* Sync version of Storage Start */ -EXTERN cy_an_return_status_t -cy_an_storage_start( - cy_an_device_handle handle - ); -#define cy_an_storage_start(handle) \ - cy_as_storage_start((cy_as_device_handle)(handle), 0, 0) - -/* Async version of Storage Start */ -EXTERN cy_an_return_status_t -cy_an_storage_start_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_start_e_x(h, cb, client) \ - cy_as_storage_start((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Storage Stop */ -EXTERN cy_an_return_status_t -cy_an_storage_stop( - cy_an_device_handle handle - ); -#define cy_an_storage_stop(handle) \ - cy_as_storage_stop((cy_as_device_handle)(handle), 0, 0) - -/* Async version of Storage Stop */ -EXTERN cy_an_return_status_t -cy_an_storage_stop_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_stop_e_x(h, cb, client) \ - cy_as_storage_stop((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Register Call back api */ -EXTERN cy_an_return_status_t -cy_an_storage_register_callback( - cy_an_device_handle handle, - cy_an_storage_event_callback callback - ); -#define cy_an_storage_register_callback(h, cb) \ - cy_as_storage_register_callback_dep((cy_as_device_handle)(h), \ - (cy_as_storage_event_callback_dep)(cb)) - -/* Sync version of Storage Claim */ -EXTERN cy_an_return_status_t -cy_an_storage_claim( - cy_an_device_handle handle, - cy_an_media_type type - ); -#define cy_an_storage_claim(h, type) \ - cy_as_storage_claim_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type)) - -/* Async version of Storage Claim */ -EXTERN cy_an_return_status_t -cy_an_storage_claim_e_x( - cy_an_device_handle handle, - cy_an_media_type *type, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_claim_e_x(h, type_p, cb, client) \ - cy_as_storage_claim_dep_EX((cy_as_device_handle)(h), \ - (cy_as_media_type *)(type_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync Version of Storage Release */ -EXTERN cy_an_return_status_t -cy_an_storage_release( - cy_an_device_handle handle, - cy_an_media_type type - ); -#define cy_an_storage_release(h, type) \ - cy_as_storage_release_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type)) - -/* Async Version of Storage Release */ -EXTERN cy_an_return_status_t -cy_an_storage_release_e_x( - cy_an_device_handle handle, - cy_an_media_type *type, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_release_e_x(h, type_p, cb, client) \ - cy_as_storage_release_dep_EX((cy_as_device_handle)(h), \ - (cy_as_media_type *)(type_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Query Media */ -EXTERN cy_an_return_status_t -cy_an_storage_query_media( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t *count - ); -#define cy_an_storage_query_media(handle, type, count) \ - cy_as_storage_query_media((cy_as_device_handle)(handle), \ - (cy_as_media_type)(type), (count), 0, 0) - -/* Async version of Query Media */ -EXTERN cy_an_return_status_t -cy_an_storage_query_media_e_x( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t *count, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_query_media_e_x(h, type, count, cb, client) \ - cy_as_storage_query_media((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (count), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Query device */ -EXTERN cy_an_return_status_t -cy_an_storage_query_device( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - cy_an_device_desc *desc_p - ); -#define cy_an_storage_query_device(h, type, device, desc_p) \ - cy_as_storage_query_device_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), (cy_as_device_desc *)(desc_p)) - -/* Async version of Query device */ -EXTERN cy_an_return_status_t -cy_an_storage_query_device_e_x( - cy_an_device_handle handle, - cy_an_storage_query_device_data *data, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_query_device_e_x(h, data, cb, client) \ - cy_as_storage_query_device_dep_EX((cy_as_device_handle)(h), \ - (cy_as_storage_query_device_data_dep *)(data), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Query Unit */ -EXTERN cy_an_return_status_t -cy_an_storage_query_unit( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - uint32_t unit, - cy_an_unit_desc *desc_p - ); -#define cy_an_storage_query_unit(h, type, device, unit, desc_p) \ - cy_as_storage_query_unit_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), \ - (unit), (cy_as_unit_desc *)(desc_p)) - -/* Async version of Query Unit */ -EXTERN cy_an_return_status_t -cy_an_storage_query_unit_e_x( - cy_an_device_handle handle, - cy_an_storage_query_unit_data *data_p, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_query_unit_e_x(h, data_p, cb, client) \ - cy_as_storage_query_unit_dep_EX((cy_as_device_handle)(h), \ - (cy_as_storage_query_unit_data_dep *)(data_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of device control */ -EXTERN cy_an_return_status_t -cy_an_storage_device_control( - cy_an_device_handle handle, - cy_bool card_detect_en, - cy_bool write_prot_en - ); -#define cy_an_storage_device_control(handle, \ - card_detect_en, write_prot_en) \ - cy_as_storage_device_control_dep((cy_as_device_handle)(handle), \ - (card_detect_en), (write_prot_en), 0, 0) - -/* Async version of device control */ -EXTERN cy_an_return_status_t -cy_an_storage_device_control_e_x( - cy_an_device_handle handle, - cy_bool card_detect_en, - cy_bool write_prot_en, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_device_control_e_x(h, det_en, prot_en, cb, client) \ - cy_as_storage_device_control_dep((cy_as_device_handle)(h), (det_en), \ - (prot_en), (cy_as_function_callback)(cb), (client)) - -/* Sync Read */ -EXTERN cy_an_return_status_t -cy_an_storage_read( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - uint32_t unit, - uint32_t block, - void *data_p, - uint16_t num_blocks - ); -#define cy_an_storage_read(h, type, device, unit, block, data_p, nblks) \ - cy_as_storage_read_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), (unit), \ - (block), (data_p), (nblks)) - -/* Async Read */ -EXTERN cy_an_return_status_t -cy_an_storage_read_async( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - uint32_t unit, - uint32_t block, - void *data_p, - uint16_t num_blocks, - cy_an_storage_callback callback - ); -#define cy_an_storage_read_async(h, type, device, unit, \ - block, data_p, nblks, cb) \ - cy_as_storage_read_async_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), (unit), (block), \ - (data_p), (nblks), (cy_as_storage_callback_dep)(cb)) - -/* Sync Write */ -EXTERN cy_an_return_status_t -cy_an_storage_write( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - uint32_t unit, - uint32_t block, - void *data_p, - uint16_t num_blocks - ); -#define cy_an_storage_write(h, type, device, unit, \ - block, data_p, nblks) \ - cy_as_storage_write_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), (unit), \ - (block), (data_p), (nblks)) - -/* Async Write */ -EXTERN cy_an_return_status_t -cy_an_storage_write_async( - cy_an_device_handle handle, - cy_an_media_type type, - uint32_t device, - uint32_t unit, - uint32_t block, - void *data_p, - uint16_t num_blocks, - cy_an_storage_callback callback - ); -#define cy_an_storage_write_async(h, type, device, unit, \ - block, data_p, nblks, cb) \ - cy_as_storage_write_async_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), (unit), (block), \ - (data_p), (nblks), (cy_as_storage_callback_dep)(cb)) - -/* Cancel Async */ -EXTERN cy_an_return_status_t -cy_an_storage_cancel_async( - cy_an_device_handle handle - ); -#define cy_an_storage_cancel_async(h) \ - cy_as_storage_cancel_async((cy_as_device_handle)(h)) - -/* Sync SD Register Read*/ -EXTERN cy_an_return_status_t -cy_an_storage_sd_register_read( - cy_an_device_handle handle, - cy_an_media_type type, - uint8_t device, - cy_an_sd_card_reg_type reg_type, - uint8_t read_len, - uint8_t *data_p - ); -#define cy_an_storage_sd_register_read(h, type, device, \ - reg_type, len, data_p) \ - cy_as_storage_sd_register_read_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), \ - (cy_as_sd_card_reg_type)(reg_type), (len), (data_p)) - -/*Async SD Register Read*/ -EXTERN cy_an_return_status_t -cy_an_storage_sd_register_read_e_x( - cy_an_device_handle handle, - cy_an_media_type type, - uint8_t device, - cy_an_sd_card_reg_type reg_type, - cy_an_storage_sd_reg_read_data *data_p, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_storage_sd_register_read_e_x(h, type, device, \ - reg_type, data_p, cb, client) \ - cy_as_storage_sd_register_read_dep_EX((cy_as_device_handle)(h), \ - (cy_as_media_type)(type), (device), \ - (cy_as_sd_card_reg_type)(reg_type), \ - (cy_as_storage_sd_reg_read_data *)(data_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Create partition on storage device */ -EXTERN cy_an_return_status_t -cy_an_storage_create_p_partition( - cy_an_device_handle handle, - cy_an_media_type media, - uint32_t device, - uint32_t size, - cy_an_function_callback cb, - uint32_t client); -#define cy_an_storage_create_p_partition(h, media, dev, \ - size, cb, client) \ - cy_as_storage_create_p_partition_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(media), (dev), \ - (size), (cy_as_function_callback)(cb), (client)) - -/* Remove partition on storage device */ -EXTERN cy_an_return_status_t -cy_an_storage_remove_p_partition( - cy_an_device_handle handle, - cy_an_media_type media, - uint32_t device, - cy_an_function_callback cb, - uint32_t client); -#define cy_an_storage_remove_p_partition\ -(h, media, dev, cb, client) \ - cy_as_storage_remove_p_partition_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(media), (dev), \ - (cy_as_function_callback)(cb), (client)) - -#include "cyas_cplus_end.h" -#endif /*__doxygen__ */ - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantioch.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantioch.h deleted file mode 100644 index d65b35a..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantioch.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Cypress West Bridge API header file (cyastioch.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANTIOCH_H_ -#define _INCLUDED_CYANTIOCH_H_ - -#if !defined(__doxygen__) - -#include "cyanerr.h" -#include "cyanmisc.h" -#include "cyanstorage.h" -#include "cyanusb.h" -#include "cyanch9.h" - -#endif - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantypes.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantypes.h deleted file mode 100644 index 48cd50f..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyantypes.h +++ /dev/null @@ -1,31 +0,0 @@ -/* Cypress West Bridge API header file (cyantypes.h) -## Type definitions for backward compatibility with previous -## Antioch SDK releases. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANTYPES_H_ -#define _INCLUDED_CYANTYPES_H_ - -#include "cyastypes.h" -typedef cy_as_end_point_number_t cy_an_end_point_number_t; -typedef cy_as_return_status_t cy_an_return_status_t; -typedef cy_as_bus_number_t cy_an_bus_number_t; -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanusb.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanusb.h deleted file mode 100644 index 1e4e7db..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyanusb.h +++ /dev/null @@ -1,619 +0,0 @@ -/* Cypress West Bridge API header file (cyanusb.h) - ## Header for backward compatibility with previous Antioch SDK releases. -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYANUSB_H_ -#define _INCLUDED_CYANUSB_H_ - -#if !defined(__doxygen__) - -#include "cyanmisc.h" -#include "cyasusb.h" -#include "cyas_cplus_start.h" - -#define CY_AN_MAX_USB_DESCRIPTOR_SIZE (CY_AS_MAX_USB_DESCRIPTOR_SIZE) - -typedef cy_as_usb_inquiry_data_dep cy_an_usb_inquiry_data; -typedef cy_as_usb_unknown_command_data_dep \ - cy_an_usb_unknown_command_data; -typedef cy_as_usb_start_stop_data_dep cy_an_usb_start_stop_data; -typedef cy_as_m_s_c_progress_data cy_an_m_s_c_progress_data; - -#define cy_an_usb_nand_enum cy_as_usb_nand_enum -#define cy_an_usb_sd_enum cy_as_usb_sd_enum -#define cy_an_usb_mmc_enum cy_as_usb_mmc_enum -#define cy_an_usb_ce_ata_enum cy_as_usb_ce_ata_enum -typedef cy_as_usb_mass_storage_enum cy_an_usb_mass_storage_enum; - -#define cy_an_usb_desc_device cy_as_usb_desc_device -#define cy_an_usb_desc_device_qual cy_as_usb_desc_device_qual -#define cy_an_usb_desc_f_s_configuration \ - cy_as_usb_desc_f_s_configuration -#define cy_an_usb_desc_h_s_configuration \ - cy_as_usb_desc_h_s_configuration -#define cy_an_usb_desc_string cy_as_usb_desc_string -typedef cy_as_usb_desc_type cy_an_usb_desc_type; - -#define cy_an_usb_in cy_as_usb_in -#define cy_an_usb_out cy_as_usb_out -#define cy_an_usb_in_out cy_as_usb_in_out -typedef cy_as_usb_end_point_dir cy_an_usb_end_point_dir; - - -#define cy_an_usb_control cy_as_usb_control -#define cy_an_usb_iso cy_as_usb_iso -#define cy_an_usb_bulk cy_as_usb_bulk -#define cy_an_usb_int cy_as_usb_int -typedef cy_as_usb_end_point_type cy_an_usb_end_point_type; - - -typedef cy_as_usb_enum_control_dep cy_an_usb_enum_control; -typedef cy_as_usb_end_point_config cy_an_usb_end_point_config; - -#define cy_an_usb_m_s_unit0 cy_as_usb_m_s_unit0 -#define cy_an_usb_m_s_unit1 cy_as_usb_m_s_unit1 -#define cy_an_usb_m_s_both cy_as_usb_m_s_both -typedef cy_as_usb_m_s_type_t cy_an_usb_m_s_type_t; - -#define cy_an_event_usb_suspend cy_as_event_usb_suspend -#define cy_an_event_usb_resume cy_as_event_usb_resume -#define cy_an_event_usb_reset cy_as_event_usb_reset -#define cy_an_event_usb_set_config cy_as_event_usb_set_config -#define cy_an_event_usb_speed_change cy_as_event_usb_speed_change -#define cy_an_event_usb_setup_packet cy_as_event_usb_setup_packet -#define cy_an_event_usb_status_packet cy_as_event_usb_status_packet -#define cy_an_event_usb_inquiry_before cy_as_event_usb_inquiry_before -#define cy_an_event_usb_inquiry_after cy_as_event_usb_inquiry_after -#define cy_an_event_usb_start_stop cy_as_event_usb_start_stop -#define cy_an_event_usb_unknown_storage cy_as_event_usb_unknown_storage -#define cy_an_event_usb_m_s_c_progress cy_as_event_usb_m_s_c_progress -typedef cy_as_usb_event cy_an_usb_event; - -typedef cy_as_usb_event_callback_dep cy_an_usb_event_callback; - -typedef cy_as_usb_io_callback cy_an_usb_io_callback; -typedef cy_as_usb_function_callback cy_an_usb_function_callback; - -/******* USB Functions ********************/ - -/* Sync Usb Start */ -extern cy_an_return_status_t -cy_an_usb_start( - cy_an_device_handle handle - ); -#define cy_an_usb_start(handle) \ - cy_as_usb_start((cy_as_device_handle)(handle), 0, 0) - -/*Async Usb Start */ -extern cy_an_return_status_t -cy_an_usb_start_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_start_e_x(h, cb, client) \ - cy_as_usb_start((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync Usb Stop */ -extern cy_an_return_status_t -cy_an_usb_stop( - cy_an_device_handle handle - ); -#define cy_an_usb_stop(handle) \ - cy_as_usb_stop((cy_as_device_handle)(handle), 0, 0) - -/*Async Usb Stop */ -extern cy_an_return_status_t -cy_an_usb_stop_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_stop_e_x(h, cb, client) \ - cy_as_usb_stop((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Register USB event callback */ -EXTERN cy_an_return_status_t -cy_an_usb_register_callback( - cy_an_device_handle handle, - cy_an_usb_event_callback callback - ); -#define cy_an_usb_register_callback(h, cb) \ - cy_as_usb_register_callback_dep((cy_as_device_handle)(h), \ - (cy_as_usb_event_callback_dep)(cb)) - -/*Sync Usb connect */ -EXTERN cy_an_return_status_t -cy_an_usb_connect( - cy_an_device_handle handle - ); -#define cy_an_usb_connect(handle) \ - cy_as_usb_connect((cy_as_device_handle)(handle), 0, 0) - -/*Async Usb connect */ -extern cy_an_return_status_t -cy_an_usb_connect_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_connect_e_x(h, cb, client) \ - cy_as_usb_connect((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/*Sync Usb disconnect */ -EXTERN cy_an_return_status_t -cy_an_usb_disconnect( - cy_an_device_handle handle - ); -#define cy_an_usb_disconnect(handle) \ - cy_as_usb_disconnect((cy_as_device_handle)(handle), 0, 0) - -/*Async Usb disconnect */ -extern cy_an_return_status_t -cy_an_usb_disconnect_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_disconnect_e_x(h, cb, client) \ - cy_as_usb_disconnect((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of set enum config */ -EXTERN cy_an_return_status_t -cy_an_usb_set_enum_config( - cy_an_device_handle handle, - cy_an_usb_enum_control *config_p - ); -#define cy_an_usb_set_enum_config(handle, config_p) \ - cy_as_usb_set_enum_config_dep((cy_as_device_handle)(handle), \ - (cy_as_usb_enum_control_dep *)(config_p), 0, 0) - -/* Async version of set enum config */ -extern cy_an_return_status_t -cy_an_usb_set_enum_config_e_x( - cy_an_device_handle handle, - cy_an_usb_enum_control *config_p, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_set_enum_config_e_x(h, config_p, cb, client) \ - cy_as_usb_set_enum_config_dep((cy_as_device_handle)(h), \ - (cy_as_usb_enum_control_dep *)(config_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of get enum config */ -EXTERN cy_an_return_status_t -cy_an_usb_get_enum_config( - cy_an_device_handle handle, - cy_an_usb_enum_control *config_p - ); -#define cy_an_usb_get_enum_config(handle, config_p) \ - cy_as_usb_get_enum_config_dep((cy_as_device_handle)(handle), \ - (cy_as_usb_enum_control_dep *)(config_p), 0, 0) - -/* Async version of get enum config */ -extern cy_an_return_status_t -cy_an_usb_get_enum_config_e_x( - cy_an_device_handle handle, - cy_an_usb_enum_control *config_p, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_get_enum_config_e_x(h, config_p, cb, client) \ - cy_as_usb_get_enum_config_dep((cy_as_device_handle)(h), \ - (cy_as_usb_enum_control_dep *)(config_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync Version of Set descriptor */ -EXTERN cy_an_return_status_t -cy_an_usb_set_descriptor( - cy_an_device_handle handle, - cy_an_usb_desc_type type, - uint8_t index, - void *desc_p, - uint16_t length - ); -#define cy_an_usb_set_descriptor(handle, type, index, desc_p, length) \ - cy_as_usb_set_descriptor((cy_as_device_handle)(handle), \ - (cy_as_usb_desc_type)(type), (index), (desc_p), (length), 0, 0) - -/* Async Version of Set descriptor */ -extern cy_an_return_status_t -cy_an_usb_set_descriptor_e_x( - cy_an_device_handle handle, - cy_an_usb_desc_type type, - uint8_t index, - void *desc_p, - uint16_t length, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_set_descriptor_e_x\ - (h, type, index, desc_p, length, cb, client) \ - cy_as_usb_set_descriptor((cy_as_device_handle)(h), \ - (cy_as_usb_desc_type)(type), (index), (desc_p), (length), \ - (cy_as_function_callback)(cb), (client)) - -/* Only version of clear descriptors */ -EXTERN cy_an_return_status_t -cy_an_usb_clear_descriptors( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_clear_descriptors(h, cb, client) \ - cy_as_usb_clear_descriptors((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of get descriptor*/ -EXTERN cy_an_return_status_t -cy_an_usb_get_descriptor( - cy_an_device_handle handle, - cy_an_usb_desc_type type, - uint8_t index, - void *desc_p, - uint32_t *length_p - ); -#define cy_an_usb_get_descriptor(h, type, index, desc_p, length_p) \ - cy_as_usb_get_descriptor_dep((cy_as_device_handle)(h), \ - (cy_as_usb_desc_type)(type), (index), (desc_p), (length_p)) - -typedef cy_as_get_descriptor_data cy_an_get_descriptor_data; - -/* Async version of get descriptor */ -extern cy_an_return_status_t -cy_an_usb_get_descriptor_e_x( - cy_an_device_handle handle, - cy_an_usb_desc_type type, - uint8_t index, - cy_an_get_descriptor_data *data, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_get_descriptor_e_x\ - (h, type, index, data, cb, client) \ - cy_as_usb_get_descriptor((cy_as_device_handle)(h), \ - (cy_as_usb_desc_type)(type), (index), \ - (cy_as_get_descriptor_data *)(data), \ - (cy_as_function_callback)(cb), (client)) - -EXTERN cy_an_return_status_t -cy_an_usb_set_physical_configuration( - cy_an_device_handle handle, - uint8_t config - ); -#define cy_an_usb_set_physical_configuration(h, config) \ - cy_as_usb_set_physical_configuration\ - ((cy_as_device_handle)(h), (config)) - -EXTERN cy_an_return_status_t -cy_an_usb_set_end_point_config( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_end_point_config *config_p - ); -#define cy_an_usb_set_end_point_config(h, ep, config_p) \ - cy_as_usb_set_end_point_config((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_end_point_config *)(config_p)) - -EXTERN cy_an_return_status_t -cy_an_usb_get_end_point_config( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_end_point_config *config_p - ); -#define cy_an_usb_get_end_point_config(h, ep, config_p) \ - cy_as_usb_get_end_point_config((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_end_point_config *)(config_p)) - -/* Sync version of commit */ -EXTERN cy_an_return_status_t -cy_an_usb_commit_config( - cy_an_device_handle handle - ); -#define cy_an_usb_commit_config(handle) \ - cy_as_usb_commit_config((cy_as_device_handle)(handle), 0, 0) - -/* Async version of commit */ -extern cy_an_return_status_t -cy_an_usb_commit_config_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_commit_config_e_x(h, cb, client) \ - cy_as_usb_commit_config((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -EXTERN cy_an_return_status_t -cy_an_usb_read_data( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool pktread, - uint32_t dsize, - uint32_t *dataread, - void *data - ); -#define cy_an_usb_read_data(h, ep, pkt, dsize, dataread, data_p) \ - cy_as_usb_read_data((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (pkt), (dsize), \ - (dataread), (data_p)) - -EXTERN cy_an_return_status_t -cy_an_usb_read_data_async( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool pktread, - uint32_t dsize, - void *data, - cy_an_usb_io_callback callback - ); -#define cy_an_usb_read_data_async(h, ep, pkt, dsize, data_p, cb) \ - cy_as_usb_read_data_async((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (pkt), (dsize), (data_p), \ - (cy_as_usb_io_callback)(cb)) - -EXTERN cy_an_return_status_t -cy_an_usb_write_data( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - uint32_t dsize, - void *data - ); -#define cy_an_usb_write_data(h, ep, dsize, data_p) \ - cy_as_usb_write_data((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (dsize), (data_p)) - -EXTERN cy_an_return_status_t -cy_an_usb_write_data_async( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - uint32_t dsize, - void *data, - cy_bool spacket, - cy_an_usb_io_callback callback - ); -#define cy_an_usb_write_data_async(h, ep, dsize, data_p, spacket, cb) \ - cy_as_usb_write_data_async((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (dsize), (data_p), (spacket), \ - (cy_as_usb_io_callback)(cb)) - -EXTERN cy_an_return_status_t -cy_an_usb_cancel_async( - cy_an_device_handle handle, - cy_an_end_point_number_t ep - ); -#define cy_an_usb_cancel_async(h, ep) \ - cy_as_usb_cancel_async((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep)) - -/* Sync version of set stall */ -EXTERN cy_an_return_status_t -cy_an_usb_set_stall( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_function_callback cb, - uint32_t client -); -#define cy_an_usb_set_stall(h, ep, cb, client) \ - cy_as_usb_set_stall_dep((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_function_callback)(cb), (client)) - -/* Async version of set stall */ -extern cy_an_return_status_t -cy_an_usb_set_stall_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_function_callback cb, - uint32_t client -); -#define cy_an_usb_set_stall_e_x(h, ep, cb, client) \ - cy_as_usb_set_stall((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_function_callback)(cb), (client)) - -/*Sync version of clear stall */ -EXTERN cy_an_return_status_t -cy_an_usb_clear_stall( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_function_callback cb, - uint32_t client - ); -#define cy_an_usb_clear_stall(h, ep, cb, client) \ - cy_as_usb_clear_stall_dep((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_function_callback)(cb), (client)) - -/*Sync version of clear stall */ -extern cy_an_return_status_t -cy_an_usb_clear_stall_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_clear_stall_e_x(h, ep, cb, client) \ - cy_as_usb_clear_stall((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync get stall */ -EXTERN cy_an_return_status_t -cy_an_usb_get_stall( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool *stall_p - ); -#define cy_an_usb_get_stall(handle, ep, stall_p) \ - cy_as_usb_get_stall((cy_as_device_handle)(handle), \ - (cy_as_end_point_number_t)(ep), (stall_p), 0, 0) - -/* Async get stall */ -extern cy_an_return_status_t -cy_an_usb_get_stall_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool *stall_p, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_get_stall_e_x(h, ep, stall_p, cb, client) \ - cy_as_usb_get_stall((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (stall_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of Set Nak */ -EXTERN cy_an_return_status_t -cy_an_usb_set_nak( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_function_callback cb, - uint32_t client -); - -#define cy_an_usb_set_nak(h, ep, cb, client) \ - cy_as_usb_set_nak_dep((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_function_callback)(cb), (client)) - -/* Async version of Set Nak */ -extern cy_an_return_status_t -cy_an_usb_set_nak_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_function_callback cb, - uint32_t client -); -#define cy_an_usb_set_nak_e_x(h, ep, cb, client) \ - cy_as_usb_set_nak((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync version of clear nak */ -EXTERN cy_an_return_status_t -cy_an_usb_clear_nak( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_usb_function_callback cb, - uint32_t client - ); -#define cy_an_usb_clear_nak(h, ep, cb, client) \ - cy_as_usb_clear_nak_dep((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_usb_function_callback)(cb), (client)) - -/* Sync version of clear nak */ -extern cy_an_return_status_t -cy_an_usb_clear_nak_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_clear_nak_e_x(h, ep, cb, client) \ - cy_as_usb_clear_nak((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync Get NAK */ -EXTERN cy_an_return_status_t -cy_an_usb_get_nak( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool *nak_p -); -#define cy_an_usb_get_nak(handle, ep, nak_p) \ - cy_as_usb_get_nak((cy_as_device_handle)(handle), \ - (cy_as_end_point_number_t)(ep), (nak_p), 0, 0) - -/* Async Get NAK */ -EXTERN cy_an_return_status_t -cy_an_usb_get_nak_e_x( - cy_an_device_handle handle, - cy_an_end_point_number_t ep, - cy_bool *nak_p, - cy_an_function_callback cb, - uint32_t client -); -#define cy_an_usb_get_nak_e_x(h, ep, nak_p, cb, client) \ - cy_as_usb_get_nak((cy_as_device_handle)(h), \ - (cy_as_end_point_number_t)(ep), (nak_p), \ - (cy_as_function_callback)(cb), (client)) - -/* Sync remote wakup */ -EXTERN cy_an_return_status_t -cy_an_usb_signal_remote_wakeup( - cy_an_device_handle handle - ); -#define cy_an_usb_signal_remote_wakeup(handle) \ - cy_as_usb_signal_remote_wakeup((cy_as_device_handle)(handle), 0, 0) - -/* Async remote wakup */ -EXTERN cy_an_return_status_t -cy_an_usb_signal_remote_wakeup_e_x( - cy_an_device_handle handle, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_signal_remote_wakeup_e_x(h, cb, client) \ - cy_as_usb_signal_remote_wakeup((cy_as_device_handle)(h), \ - (cy_as_function_callback)(cb), (client)) - -/* Only version of SetMSReportThreshold */ -EXTERN cy_an_return_status_t -cy_an_usb_set_m_s_report_threshold( - cy_an_device_handle handle, - uint32_t wr_sectors, - uint32_t rd_sectors, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_set_m_s_report_threshold\ - (h, wr_cnt, rd_cnt, cb, client) \ - cy_as_usb_set_m_s_report_threshold((cy_as_device_handle)(h), \ - wr_cnt, rd_cnt, (cy_as_function_callback)(cb), (client)) - -/* Select storage partitions to be enumerated. */ -EXTERN cy_an_return_status_t -cy_an_usb_select_m_s_partitions( - cy_an_device_handle handle, - cy_an_media_type media, - uint32_t device, - cy_an_usb_m_s_type_t type, - cy_an_function_callback cb, - uint32_t client - ); -#define cy_an_usb_select_m_s_partitions(h, media, dev, type, cb, client) \ - cy_as_usb_select_m_s_partitions_dep((cy_as_device_handle)(h), \ - (cy_as_media_type)(media), (dev), \ - (cy_as_usb_m_s_type_t)(type), (cy_as_function_callback)(cb), (client)) - -#include "cyas_cplus_end.h" -#endif /*__doxygen__*/ -#endif /*_INCLUDED_CYANUSB_H_*/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_end.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_end.h deleted file mode 100644 index ece44ca..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_end.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * This file is included at the end of other include files. - * It basically turns off the C++ specific code words that - * insure this code is seen as C code even within - * a C++ compiler. - * - */ - -#ifdef __cplusplus -} -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_start.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_start.h deleted file mode 100644 index b879cef..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_start.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * This file is included after all other headers files, but before any other - * definitions in the file. It basically insures that the definitions within - * the file are seen as C defintions even when compiled by a C++ compiler. - */ - -#ifdef __cplusplus - -extern "C" { - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyascast.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyascast.h deleted file mode 100644 index 5f8c852..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyascast.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Cypress West Bridge API header file (cyascast.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASCAST_H_ -#define _INCLUDED_CYASCAST_H_ - -#ifndef __doxygen__ - -#ifdef _DEBUG -#define cy_cast_int2U_int16(v) \ - (cy_as_hal_assert(v < 65536), (uint16_t)(v)) -#else /* _DEBUG */ -#define cy_cast_int2U_int16(v) ((uint16_t)(v)) -#endif /* _DEBUG */ - -#endif /* __doxygen__ */ -#endif /* _INCLUDED_CYASCAST_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdevice.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdevice.h deleted file mode 100644 index 6452a90..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdevice.h +++ /dev/null @@ -1,1057 +0,0 @@ -/* Cypress West Bridge API header file (cyasdevice.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -##Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef __INCLUDED_CYASDEVICE_H__ -#define __INCLUDED_CYASDEVICE_H__ - -#include "cyashal.h" -#include "cyasprotocol.h" -#include "cyasusb.h" -#include "cyasstorage.h" -#include "cyasmtp.h" -#include "cyas_cplus_start.h" - -/*********************************** - * West Bridge Constants - ***********************************/ - -/* The endpoints used by West Bridge for the P port to S port path */ -#define CY_AS_P2S_WRITE_ENDPOINT (0x04) -#define CY_AS_P2S_READ_ENDPOINT (0x08) - -/* The endpoint to use for firmware download */ -#define CY_AS_FIRMWARE_ENDPOINT (0x02) - -/* The maximum size of the firmware image West Bridge can accept */ -#define CY_AS_MAXIMUM_FIRMWARE_SIZE (24 * 1024) - -/* The maximum size of a write for EP0 and EP1 */ -#define CY_AS_EP0_MAX_WRITE_SIZE (128) -#define CY_AS_EP1_MAX_WRITE_SIZE (64) - -/* The bitfields for the device state value */ - -/* The device is in StandBy mode */ -#define CY_AS_DEVICE_STATE_PIN_STANDBY (0x00000001) -/* The device has been configured */ -#define CY_AS_DEVICE_STATE_CONFIGURED (0x00000002) -/* The firmware has been loaded into the device */ -#define CY_AS_DEVICE_STATE_FIRMWARE_LOADED (0x00000004) -/* The interrupt module has been initialized */ -#define CY_AS_DEVICE_STATE_LOWLEVEL_MODULE (0x00000008) -/* The DMA module has been initialized */ -#define CY_AS_DEVICE_STATE_DMA_MODULE (0x00000010) -/* The interrupt module has been initialized */ -#define CY_AS_DEVICE_STATE_INTR_MODULE (0x00000020) -/* The storage module has been initialized */ -#define CY_AS_DEVICE_STATE_STORAGE_MODULE (0x00000040) -/* The USB module has been initialized */ -#define CY_AS_DEVICE_STATE_USB_MODULE (0x00000080) -/* If set, the API wants SCSI messages */ -#define CY_AS_DEVICE_STATE_STORAGE_SCSIMSG (0x00000100) -/* If set, an ASYNC storage operation is pending */ -#define CY_AS_DEVICE_STATE_STORAGE_ASYNC_PENDING (0x00000200) -/* If set, the USB port is connected */ -#define CY_AS_DEVICE_STATE_USB_CONNECTED (0x00000400) -/* If set and USB is connected, it is high speed */ -#define CY_AS_DEVICE_STATE_USB_HIGHSPEED (0x00000800) -/* If set, we are in a callback */ -#define CY_AS_DEVICE_STATE_IN_CALLBACK (0x00001000) -/* If set, we are processing a setup packet */ -#define CY_AS_DEVICE_STATE_IN_SETUP_PACKET (0x00004000) -/* The device was placed in standby via register */ -#define CY_AS_DEVICE_STATE_REGISTER_STANDBY (0x00008000) -/* If set, the device is using a crystal */ -#define CY_AS_DEVICE_STATE_CRYSTAL (0x00010000) -/* If set, wakeup has been called */ -#define CY_AS_DEVICE_STATE_WAKING (0x00020000) -/* If set, EP0 has been stalled. */ -#define CY_AS_DEVICE_STATE_EP0_STALLED (0x00040000) -/* If set, device is in suspend mode. */ -#define CY_AS_DEVICE_STATE_SUSPEND (0x00080000) -/* If set, device is a reset is pending. */ -#define CY_AS_DEVICE_STATE_RESETP (0x00100000) -/* If set, device is a standby is pending. */ -#define CY_AS_DEVICE_STATE_STANDP (0x00200000) -/* If set, device has a storage start or stop pending. */ -#define CY_AS_DEVICE_STATE_SSSP (0x00400000) -/* If set, device has a usb start or stop pending. */ -#define CY_AS_DEVICE_STATE_USSP (0x00800000) -/* If set, device has a mtp start or stop pending. */ -#define CY_AS_DEVICE_STATE_MSSP (0x01000000) -/* If set, P2S DMA transfer can be started. */ -#define CY_AS_DEVICE_STATE_P2SDMA_START (0x02000000) - -/* The bitfields for the endpoint state value */ -/* DMA requests are accepted into the queue */ -#define CY_AS_DMA_ENDPOINT_STATE_ENABLED (0x0001) -/* The endpoint has a sleeping client, waiting on a queue drain */ -#define CY_AS_DMA_ENDPOINT_STATE_SLEEPING (0x0002) -/* The DMA backend to hardware is running */ -#define CY_AS_DMA_ENDPOINT_STATE_DMA_RUNNING (0x0004) -/* There is an outstanding DMA entry deployed to the HAL */ -#define CY_AS_DMA_ENDPOINT_STATE_IN_TRANSIT (0x0008) -/* 0 = OUT (West Bridge -> P Port), 1 = IN (P Port -> West Bridge) */ -#define CY_AS_DMA_ENDPOINT_STATE_DIRECTION (0x0010) - -/* The state values for the request list */ -/* Mask for getting the state information */ -#define CY_AS_REQUEST_LIST_STATE_MASK (0x0f) -/* The request is queued, nothing further */ -#define CY_AS_REQUEST_LIST_STATE_QUEUED (0x00) -/* The request is sent, waiting for response */ -#define CY_AS_REQUEST_LIST_STATE_WAITING (0x01) -/* The response has been received, processing response */ -#define CY_AS_REQUEST_LIST_STATE_RECEIVED (0x02) -/* The request/response is being canceled */ -#define CY_AS_REQUEST_LIST_STATE_CANCELING (0x03) -/* The request is synchronous */ -#define CY_AS_REQUEST_LIST_STATE_SYNC (0x80) - -/* The flag values for a LL RequestResponse */ -/* This request requires an ACK to be sent after it is completed */ -#define CY_AS_REQUEST_RESPONSE_DELAY_ACK (0x01) -/* This request originated from a version V1.1 function call */ -#define CY_AS_REQUEST_RESPONSE_EX (0x02) -/* This request originated from a version V1.2 function call */ -#define CY_AS_REQUEST_RESPONSE_MS (0x04) - - -#define CY_AS_DEVICE_HANDLE_SIGNATURE (0x01211219) - -/* - * This macro returns the endpoint pointer given the - * device pointer and an endpoint number - */ -#define CY_AS_NUM_EP(dev_p, num) ((dev_p)->endp[(num)]) - -/**************************************** - * West Bridge Data Structures - ****************************************/ - -typedef struct cy_as_device cy_as_device; - -/* Summary - This type defines a callback function that will be called - on completion of a DMA operation. - - Description - This function definition is for a function that is called when - the DMA operation is complete. This function is called with the - endpoint number, operation type, buffer pointer and size. - - See Also - * CyAsDmaOper - * CyAsDmaQueueWrite - */ -typedef void (*cy_as_dma_callback)( - /* The device that completed DMA */ - cy_as_device *dev_p, - /* The endpoint that completed DMA */ - cy_as_end_point_number_t ep, - /* The pointer to the buffer that completed DMA */ - void *mem_p, - /* The amount of data transferred */ - uint32_t size, - /* The error code for this DMA xfer */ - cy_as_return_status_t error - ); - -/* Summary - This structure defines a DMA request that is queued - - Description - This structure contains the information about a DMA - request that is queued and is to be sent when possible. -*/ -typedef struct cy_as_dma_queue_entry { - /* Pointer to memory buffer for this request */ - void *buf_p; - /* Size of the memory buffer for DMA operation */ - uint32_t size; - /* Offset into memory buffer for next DMA operation */ - uint32_t offset; - /* If TRUE and IN request */ - cy_bool packet; - /* If TRUE, this is a read request */ - cy_bool readreq; - /* Callback function for when DMA is complete */ - cy_as_dma_callback cb; - /* Pointer to next entry in queue */ - struct cy_as_dma_queue_entry *next_p; -} cy_as_dma_queue_entry; - -/* Summary - This structure defines the endpoint data for a given - - Description - This structure defines all of the information required - to manage DMA for a given endpoint. -*/ -typedef struct cy_as_dma_end_point { - /* The endpoint number */ - cy_as_end_point_number_t ep; - /* The state of this endpoint */ - uint8_t state; - /* The maximum amount of data accepted in a packet by the hw */ - uint16_t maxhwdata; - /* The maximum amount of data accepted by the HAL layer */ - uint32_t maxhaldata; - /* The queue for DMA operations */ - cy_as_dma_queue_entry *queue_p; - /* The last entry in the DMA queue */ - cy_as_dma_queue_entry *last_p; - /* This sleep channel is used to wait while the DMA queue - * drains for a given endpoint */ - cy_as_hal_sleep_channel channel; -} cy_as_dma_end_point; - -#define cy_as_end_point_number_is_usb(n) \ - ((n) != 2 && (n) != 4 && (n) != 6 && (n) != 8) -#define cy_as_end_point_number_is_storage(n) \ - ((n) == 2 || (n) == 4 || (n) == 6 || (n) == 8) - -#define cy_as_dma_end_point_is_enabled(ep) \ - ((ep)->state & CY_AS_DMA_ENDPOINT_STATE_ENABLED) -#define cy_as_dma_end_point_enable(ep) \ - ((ep)->state |= CY_AS_DMA_ENDPOINT_STATE_ENABLED) -#define cy_as_dma_end_point_disable(ep) \ - ((ep)->state &= ~CY_AS_DMA_ENDPOINT_STATE_ENABLED) - -#define cy_as_dma_end_point_is_sleeping(ep) \ - ((ep)->state & CY_AS_DMA_ENDPOINT_STATE_SLEEPING) -#define cy_as_dma_end_point_set_sleep_state(ep) \ - ((ep)->state |= CY_AS_DMA_ENDPOINT_STATE_SLEEPING) -#define cy_as_dma_end_point_set_wake_state(ep) \ - ((ep)->state &= ~CY_AS_DMA_ENDPOINT_STATE_SLEEPING) - -#define cy_as_dma_end_point_is_running(ep) \ - ((ep)->state & CY_AS_DMA_ENDPOINT_STATE_DMA_RUNNING) -#define cy_as_dma_end_point_set_running(ep) \ - ((ep)->state |= CY_AS_DMA_ENDPOINT_STATE_DMA_RUNNING) -#define cy_as_dma_end_point_set_stopped(ep) \ - ((ep)->state &= ~CY_AS_DMA_ENDPOINT_STATE_DMA_RUNNING) - -#define cy_as_dma_end_point_in_transit(ep) \ - ((ep)->state & CY_AS_DMA_ENDPOINT_STATE_IN_TRANSIT) -#define cy_as_dma_end_point_set_in_transit(ep) \ - ((ep)->state |= CY_AS_DMA_ENDPOINT_STATE_IN_TRANSIT) -#define cy_as_dma_end_point_clear_in_transit(ep) \ - ((ep)->state &= ~CY_AS_DMA_ENDPOINT_STATE_IN_TRANSIT) - -#define cy_as_dma_end_point_is_direction_in(ep) \ - (((ep)->state & CY_AS_DMA_ENDPOINT_STATE_DIRECTION) == \ - CY_AS_DMA_ENDPOINT_STATE_DIRECTION) -#define cy_as_dma_end_point_is_direction_out(ep) \ - (((ep)->state & CY_AS_DMA_ENDPOINT_STATE_DIRECTION) == 0) -#define cy_as_dma_end_point_set_direction_in(ep) \ - ((ep)->state |= CY_AS_DMA_ENDPOINT_STATE_DIRECTION) -#define cy_as_dma_end_point_set_direction_out(ep) \ - ((ep)->state &= ~CY_AS_DMA_ENDPOINT_STATE_DIRECTION) - -#define cy_as_dma_end_point_is_usb(p) \ - cy_as_end_point_number_is_usb((p)->ep) -#define cy_as_dma_end_point_is_storage(p) \ - cy_as_end_point_number_is_storage((p)->ep) - -typedef struct cy_as_ll_request_response { - /* The mbox[0] contents - see low level comm section of API doc */ - uint16_t box0; - /* The amount of data stored in this request/response in bytes */ - uint16_t stored; - /* Length of this request in words */ - uint16_t length; - /* Additional status information about the request */ - uint16_t flags; - /* Note: This is over indexed and contains the request/response data */ - uint16_t data[1]; -} cy_as_ll_request_response; - -/* - * The callback function for responses - */ -typedef void (*cy_as_response_callback)( - /* The device that had the response */ - cy_as_device *dev_p, - /* The context receiving a response */ - uint8_t context, - /* The request data */ - cy_as_ll_request_response *rqt, - /* The response data */ - cy_as_ll_request_response *resp, - /* The status of the request */ - cy_as_return_status_t status - ); - -typedef struct cy_as_ll_request_list_node { - /* The request to send */ - cy_as_ll_request_response *rqt; - /* The associated response for the request */ - cy_as_ll_request_response *resp; - /* Length of the response */ - uint16_t length; - /* The callback to call when done */ - cy_as_response_callback callback; - /* The state of the request */ - uint8_t state; - /* The next request in the list */ - struct cy_as_ll_request_list_node *next; -} cy_as_ll_request_list_node; - -#define cy_as_request_get_node_state(node_p) \ - ((node_p)->state & CY_AS_REQUEST_LIST_STATE_MASK) -#define cy_as_request_set_node_state(node_p, st) \ - ((node_p)->state = \ - ((node_p)->state & ~CY_AS_REQUEST_LIST_STATE_MASK) | (st)) - -#define cy_as_request_node_is_sync(node_p) \ - ((node_p)->state & CY_AS_REQUEST_LIST_STATE_SYNC) -#define cy_as_request_node_set_sync(node_p) \ - ((node_p)->state |= CY_AS_REQUEST_LIST_STATE_SYNC) -#define cy_as_request_node_clear_sync(node_p) \ - ((node_p)->state &= ~CY_AS_REQUEST_LIST_STATE_SYNC) - -#ifndef __doxygen__ -typedef enum cy_as_c_b_node_type { - CYAS_INVALID, - CYAS_USB_FUNC_CB, - CYAS_USB_IO_CB, - CYAS_STORAGE_IO_CB, - CYAS_FUNC_CB -} cy_as_c_b_node_type; - -typedef struct cy_as_func_c_b_node { - cy_as_c_b_node_type node_type; - cy_as_function_callback cb_p; - uint32_t client_data; - cy_as_funct_c_b_type data_type; - void *data; - struct cy_as_func_c_b_node *next_p; -} cy_as_func_c_b_node; - -extern cy_as_func_c_b_node* -cy_as_create_func_c_b_node_data(cy_as_function_callback - cb, uint32_t client, cy_as_funct_c_b_type type, void *data); - -extern cy_as_func_c_b_node* -cy_as_create_func_c_b_node(cy_as_function_callback cb, - uint32_t client); - -extern void -cy_as_destroy_func_c_b_node(cy_as_func_c_b_node *node); - -typedef struct cy_as_mtp_func_c_b_node { - cy_as_c_b_node_type type; - cy_as_mtp_function_callback cb_p; - uint32_t client_data; - struct cy_as_mtp_func_c_b_node *next_p; -} cy_as_mtp_func_c_b_node; - -extern cy_as_mtp_func_c_b_node* -cy_as_create_mtp_func_c_b_node(cy_as_mtp_function_callback cb, - uint32_t client); - -extern void -cy_as_destroy_mtp_func_c_b_node(cy_as_mtp_func_c_b_node *node); - -typedef struct cy_as_usb_func_c_b_node { - cy_as_c_b_node_type type; - cy_as_usb_function_callback cb_p; - uint32_t client_data; - struct cy_as_usb_func_c_b_node *next_p; -} cy_as_usb_func_c_b_node; - -extern cy_as_usb_func_c_b_node* -cy_as_create_usb_func_c_b_node(cy_as_usb_function_callback cb, - uint32_t client); - -extern void -cy_as_destroy_usb_func_c_b_node(cy_as_usb_func_c_b_node *node); - -typedef struct cy_as_usb_io_c_b_node { - cy_as_c_b_node_type type; - cy_as_usb_io_callback cb_p; - struct cy_as_usb_io_c_b_node *next_p; -} cy_as_usb_io_c_b_node; - -extern cy_as_usb_io_c_b_node* -cy_as_create_usb_io_c_b_node(cy_as_usb_io_callback cb); - -extern void -cy_as_destroy_usb_io_c_b_node(cy_as_usb_io_c_b_node *node); - -typedef struct cy_as_storage_io_c_b_node { - cy_as_c_b_node_type type; - cy_as_storage_callback cb_p; - /* The media for the currently outstanding async storage request */ - cy_as_media_type media; - /* The device index for the currently outstanding async storage - * request */ - uint32_t device_index; - /* The unit index for the currently outstanding async storage - * request */ - uint32_t unit; - /* The block address for the currently outstanding async storage - * request */ - uint32_t block_addr; - /* The operation for the currently outstanding async storage - * request */ - cy_as_oper_type oper; - cy_as_ll_request_response *req_p; - cy_as_ll_request_response *reply_p; - struct cy_as_storage_io_c_b_node *next_p; -} cy_as_storage_io_c_b_node; - -extern cy_as_storage_io_c_b_node* -cy_as_create_storage_io_c_b_node(cy_as_storage_callback cb, - cy_as_media_type media, uint32_t device_index, - uint32_t unit, uint32_t block_addr, cy_as_oper_type oper, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p); - -extern void -cy_as_destroy_storage_io_c_b_node(cy_as_storage_io_c_b_node *node); - -typedef struct cy_as_c_b_queue { - void *head_p; - void *tail_p; - uint32_t count; - cy_as_c_b_node_type type; -} cy_as_c_b_queue; - -extern cy_as_c_b_queue * -cy_as_create_c_b_queue(cy_as_c_b_node_type type); - -extern void -cy_as_destroy_c_b_queue(cy_as_c_b_queue *queue); - -/* Allocates a new CyAsCBNode */ -extern void -cy_as_insert_c_b_node(cy_as_c_b_queue *queue_p, void *cbnode); - -/* Removes the first CyAsCBNode from the queue and frees it */ -extern void -cy_as_remove_c_b_node(cy_as_c_b_queue *queue_p); - -/* Remove the last CyAsCBNode from the queue and frees it */ -extern void -cy_as_remove_c_b_tail_node(cy_as_c_b_queue *queue_p); - -/* Removes and frees all pending callbacks */ -extern void -cy_as_clear_c_b_queue(cy_as_c_b_queue *queue_p); - -extern cy_as_return_status_t -cy_as_misc_send_request(cy_as_device *dev_p, - cy_as_function_callback cb, - uint32_t client, - cy_as_funct_c_b_type type, - void *data, - cy_as_c_b_queue *queue, - uint16_t req_type, - cy_as_ll_request_response *req_p, - cy_as_ll_request_response *reply_p, - cy_as_response_callback rcb); - -extern void -cy_as_misc_cancel_ex_requests(cy_as_device *dev_p); - -/* Summary - Free all memory allocated by and zero all - structures initialized by CyAsUsbStart. - */ -extern void -cy_as_usb_cleanup( - cy_as_device *dev_p); - -/* Summary - Free all memory allocated and zero all structures initialized - by CyAsStorageStart. - */ -extern void -cy_as_storage_cleanup( - cy_as_device *dev_p); -#endif - -/* Summary - This structure defines the data structure to support a - given command context - - Description - All commands send to the West Bridge device via the mailbox - registers are sent via a context.Each context is independent - and there can be a parallel stream of requests and responses on - each context. This structure is used to manage a single context. -*/ -typedef struct cy_as_context { - /* The context number for this context */ - uint8_t number; - /* This sleep channel is used to sleep while waiting on a - * response from the west bridge device for a request. */ - cy_as_hal_sleep_channel channel; - /* The buffer for received requests */ - cy_as_ll_request_response *req_p; - /* The length of the request being received */ - uint16_t request_length; - /* The callback for the next request received */ - cy_as_response_callback request_callback; - /* A list of low level requests to go to the firmware */ - cy_as_ll_request_list_node *request_queue_p; - /* The list node in the request queue */ - cy_as_ll_request_list_node *last_node_p; - /* Index up to which data is stored. */ - uint16_t queue_index; - /* Index to the next request in the queue. */ - uint16_t rqt_index; - /* Queue of data stored */ - uint16_t data_queue[128]; - -} cy_as_context; - -#define cy_as_context_is_waiting(ctxt) \ - ((ctxt)->state & CY_AS_CTXT_STATE_WAITING_RESPONSE) -#define cy_as_context_set_waiting(ctxt) \ - ((ctxt)->state |= CY_AS_CTXT_STATE_WAITING_RESPONSE) -#define cy_as_context_clear_waiting(ctxt) \ - ((ctxt)->state &= ~CY_AS_CTXT_STATE_WAITING_RESPONSE) - - - -/* Summary - This data structure stores SDIO function - parameters for a SDIO card - - Description -*/ -typedef struct cy_as_sdio_device { - /* Keeps track of IO functions initialized*/ - uint8_t function_init_map; - uint8_t function_suspended_map; - /* Function 0 (Card Common) properties*/ - cy_as_sdio_card card; - /* Function 1-7 (Mapped to array element 0-6) properties.*/ - cy_as_sdio_func function[7]; - -} cy_as_sdio_device; - -/* Summary -Macros to access the SDIO card properties -*/ - -#define cy_as_sdio_get_function_code(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].function_code) - -#define cy_as_sdio_get_function_ext_code(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].\ - function[i-1].extended_func_code) - -#define cy_as_sdio_get_function_p_s_n(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].card_psn) - -#define cy_as_sdio_get_function_blocksize(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].blocksize) - -#define cy_as_sdio_get_function_max_blocksize(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].maxblocksize) - -#define cy_as_sdio_get_function_csa_support(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].csa_bits) - -#define cy_as_sdio_get_function_wakeup_support(handle, bus, i) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1]. wakeup_support) - -#define cy_as_sdio_set_function_block_size(handle, bus, i, blocksize) \ - (((cy_as_device *)handle)->sdiocard[bus].function[i-1].blocksize = \ - blocksize) - -#define cy_as_sdio_get_card_num_functions(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.num_functions) - -#define cy_as_sdio_get_card_mem_present(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.memory_present) - -#define cy_as_sdio_get_card_manf_id(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.manufacturer__id) - -#define cy_as_sdio_get_card_manf_info(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.manufacturer_info) - -#define cy_as_sdio_get_card_blocksize(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.blocksize) - -#define cy_as_sdio_get_card_max_blocksize(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.maxblocksize) - -#define cy_as_sdio_get_card_sdio_version(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.sdio_version) - -#define cy_as_sdio_get_card_capability(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].card.card_capability) - -#define cy_as_sdio_get_function_init_map(handle, bus) \ - (((cy_as_device *)handle)->sdiocard[bus].function_init_map) - -#define cy_as_sdio_check_function_initialized(handle, bus, i) \ - (((cy_as_sdio_get_function_init_map(handle, bus)) & (0x01<sdiocard[bus].card.blocksize = blocksize) - -#define cy_as_sdio_check_support_bus_suspend(handle, bus) \ - ((cy_as_sdio_get_card_capability(handle, bus) & CY_SDIO_SBS) ? 1 : 0) - -#define cy_as_sdio_check_function_suspended(handle, bus, i) \ - ((((cy_as_device *)handle)->sdiocard[bus].function_suspended_map & \ - (0x01<sdiocard[bus].function_suspended_map) \ - |= (0x01<sdiocard[bus].function_suspended_map) \ - &= (~(0x01<state & CY_AS_DEVICE_STATE_CONFIGURED) -#define cy_as_device_set_configured(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_CONFIGURED) -#define cy_as_device_set_unconfigured(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_CONFIGURED) - -#define cy_as_device_is_dma_running(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_DMA_MODULE) -#define cy_as_device_set_dma_running(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_DMA_MODULE) -#define cy_as_device_set_dma_stopped(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_DMA_MODULE) - -#define cy_as_device_is_low_level_running(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_LOWLEVEL_MODULE) -#define cy_as_device_set_low_level_running(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_LOWLEVEL_MODULE) -#define cy_as_device_set_low_level_stopped(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_LOWLEVEL_MODULE) - -#define cy_as_device_is_intr_running(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_INTR_MODULE) -#define cy_as_device_set_intr_running(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_INTR_MODULE) -#define cy_as_device_set_intr_stopped(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_INTR_MODULE) - -#define cy_as_device_is_firmware_loaded(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_FIRMWARE_LOADED) -#define cy_as_device_set_firmware_loaded(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_FIRMWARE_LOADED) -#define cy_as_device_set_firmware_not_loaded(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_FIRMWARE_LOADED) - -#define cy_as_device_is_storage_running(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_STORAGE_MODULE) -#define cy_as_device_set_storage_running(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_STORAGE_MODULE) -#define cy_as_device_set_storage_stopped(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_STORAGE_MODULE) - -#define cy_as_device_is_usb_running(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_USB_MODULE) -#define cy_as_device_set_usb_running(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_USB_MODULE) -#define cy_as_device_set_usb_stopped(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_USB_MODULE) - -#define cy_as_device_wants_scsi_messages(dp) \ - (((dp)->state & CY_AS_DEVICE_STATE_STORAGE_SCSIMSG) \ - ? cy_true : cy_false) -#define cy_as_device_set_scsi_messages(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_STORAGE_SCSIMSG) -#define cy_as_device_clear_scsi_messages(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_STORAGE_SCSIMSG) - -#define cy_as_device_is_storage_async_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_STORAGE_ASYNC_PENDING) -#define cy_as_device_set_storage_async_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_STORAGE_ASYNC_PENDING) -#define cy_as_device_clear_storage_async_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_STORAGE_ASYNC_PENDING) - -#define cy_as_device_is_usb_connected(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_USB_CONNECTED) -#define cy_as_device_set_usb_connected(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_USB_CONNECTED) -#define cy_as_device_clear_usb_connected(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_USB_CONNECTED) - -#define cy_as_device_is_usb_high_speed(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_USB_HIGHSPEED) -#define cy_as_device_set_usb_high_speed(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_USB_HIGHSPEED) -#define cy_as_device_clear_usb_high_speed(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_USB_HIGHSPEED) - -#define cy_as_device_is_in_callback(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_IN_CALLBACK) -#define cy_as_device_set_in_callback(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_IN_CALLBACK) -#define cy_as_device_clear_in_callback(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_IN_CALLBACK) - -#define cy_as_device_is_setup_i_o_performed(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_SETUP_IO_PERFORMED) -#define cy_as_device_set_setup_i_o_performed(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_SETUP_IO_PERFORMED) -#define cy_as_device_clear_setup_i_o_performed(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_SETUP_IO_PERFORMED) - -#define cy_as_device_is_ack_delayed(dp) \ - ((dp)->usb_delay_ack_count > 0) -#define cy_as_device_set_ack_delayed(dp) \ - ((dp)->usb_delay_ack_count++) -#define cy_as_device_rem_ack_delayed(dp) \ - ((dp)->usb_delay_ack_count--) -#define cy_as_device_clear_ack_delayed(dp) \ - ((dp)->usb_delay_ack_count = 0) - -#define cy_as_device_is_setup_packet(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_IN_SETUP_PACKET) -#define cy_as_device_set_setup_packet(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_IN_SETUP_PACKET) -#define cy_as_device_clear_setup_packet(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_IN_SETUP_PACKET) - -#define cy_as_device_is_ep0_stalled(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_EP0_STALLED) -#define cy_as_device_set_ep0_stalled(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_EP0_STALLED) -#define cy_as_device_clear_ep0_stalled(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_EP0_STALLED) - -#define cy_as_device_is_register_standby(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_REGISTER_STANDBY) -#define cy_as_device_set_register_standby(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_REGISTER_STANDBY) -#define cy_as_device_clear_register_standby(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_REGISTER_STANDBY) - -#define cy_as_device_is_pin_standby(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_PIN_STANDBY) -#define cy_as_device_set_pin_standby(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_PIN_STANDBY) -#define cy_as_device_clear_pin_standby(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_PIN_STANDBY) - -#define cy_as_device_is_crystal(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_CRYSTAL) -#define cy_as_device_is_external_clock(dp) \ - (!((dp)->state & CY_AS_DEVICE_STATE_CRYSTAL)) -#define cy_as_device_set_crystal(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_CRYSTAL) -#define cy_as_device_set_external_clock(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_CRYSTAL) - -#define cy_as_device_is_waking(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_WAKING) -#define cy_as_device_set_waking(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_WAKING) -#define cy_as_device_clear_waking(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_WAKING) - -#define cy_as_device_is_in_suspend_mode(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_SUSPEND) -#define cy_as_device_set_suspend_mode(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_SUSPEND) -#define cy_as_device_clear_suspend_mode(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_SUSPEND) - -#define cy_as_device_is_reset_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_RESETP) -#define cy_as_device_set_reset_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_RESETP) -#define cy_as_device_clear_reset_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_RESETP) - -#define cy_as_device_is_standby_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_STANDP) -#define cy_as_device_set_standby_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_STANDP) -#define cy_as_device_clear_standby_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_STANDP) - -#define cy_as_device_is_s_s_s_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_SSSP) -#define cy_as_device_set_s_s_s_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_SSSP) -#define cy_as_device_clear_s_s_s_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_SSSP) - -#define cy_as_device_is_u_s_s_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_USSP) -#define cy_as_device_set_u_s_s_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_USSP) -#define cy_as_device_clear_u_s_s_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_USSP) - -#define cy_as_device_is_m_s_s_pending(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_MSSP) -#define cy_as_device_set_m_s_s_pending(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_MSSP) -#define cy_as_device_clear_m_s_s_pending(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_MSSP) - -#define cy_as_device_is_p2s_dma_start_recvd(dp) \ - ((dp)->state & CY_AS_DEVICE_STATE_P2SDMA_START) -#define cy_as_device_set_p2s_dma_start_recvd(dp) \ - ((dp)->state |= CY_AS_DEVICE_STATE_P2SDMA_START) -#define cy_as_device_clear_p2s_dma_start_recvd(dp) \ - ((dp)->state &= ~CY_AS_DEVICE_STATE_P2SDMA_START) - -#define cy_as_device_is_usb_async_pending(dp, ep) \ - ((dp)->epasync & (1 << ep)) -#define cy_as_device_set_usb_async_pending(dp, ep) \ - ((dp)->epasync |= (1 << ep)) -#define cy_as_device_clear_usb_async_pending(dp, ep) \ - ((dp)->epasync &= ~(1 << ep)) - -#define cy_as_device_is_nand_storage_supported(dp) \ - ((dp)->media_supported[0] & 1) - -/* Macros to check the type of West Bridge device. */ -#define cy_as_device_is_astoria_dev(dp) \ - (((dp)->silicon_id == CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_VALUE) || \ - ((dp)->silicon_id == CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_FPGA_VALUE)) -#define cy_as_device_is_antioch_dev(dp) \ - ((dp)->silicon_id == CY_AS_MEM_CM_WB_CFG_ID_HDID_ANTIOCH_VALUE) - -#ifdef CY_AS_LOG_SUPPORT -extern void cy_as_log_debug_message(int value, const char *msg); -#else -#define cy_as_log_debug_message(value, msg) -#endif - -/* Summary - This function finds the device object given the HAL tag - - Description - The user associats a device TAG with each West Bridge device - created. This tag is passed from the API functions to and HAL - functions that need to ID a specific West Bridge device. This - tag is also passed in from the user back into the API via - interrupt functions. This function allows the API to find the - device structure associated with a given tag. - - Notes - This function does a simple linear search for the device based - on the TAG. This function is called each time an West Bridge - interrupt handler is called. Therefore this works fine for a - small number of West Bridge devices (e.g. less than five). - Anything more than this and this methodology will need to be - updated. - - Returns - Pointer to a CyAsDevice associated with the tag -*/ -extern cy_as_device * -cy_as_device_find_from_tag( - cy_as_hal_device_tag tag - ); - -#include "cyas_cplus_end.h" - -#endif /* __INCLUDED_CYASDEVICE_H__ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdma.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdma.h deleted file mode 100644 index 16dc9f9..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdma.h +++ /dev/null @@ -1,375 +0,0 @@ -/* Cypress West Bridge API header file (cyasdma.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASDMA_H_ -#define _INCLUDED_CYASDMA_H_ - -#include "cyashal.h" -#include "cyasdevice.h" - -#include "cyas_cplus_start.h" - - -/*@@DMA Overview - This module manages the DMA operations to/from the West Bridge - device. The DMA module maintains a DMA queue for each endpoint - so multiple DMA requests may be queued and they will complete - at some future time. - - The DMA module must be started before it can be used. It is - started by calling CyAsDmaStart(). This function initializes - all of the endpoint data structures. - - In order to perform DMA on a particular endpoint, the endpoint - must be enabled by calling CyAsDmaEnableEndPoint(). In addition - to enabling or disabling the endpoint, this function also sets - the direction for a given endpoint. Direction is given in USB - terms. For P port to West Bridge traffic, the endpoint is a - CyAsDirectionIn endpoint. For West Bridge to P port traffic, - the endpoint is a CyAsDirectionOut endpoint. - - Once DMA is started and an endpoint is enabled, DMA requests - are issued by calling CyAsDmaQueueRequest(). This function - queue either a DMA read or DMA write request. The callback - associated with the request is called once the request has been - fulfilled. - - See Also - * CyAsDmaStart - * CyAsDmaEnableEndPoint - * CyAsDmaDirection - * CyAsDmaQueueRequest - */ - -/************************ - * West Bridge Constants - ************************/ -#define CY_AS_DMA_MAX_SIZE_HW_SIZE (0xffffffff) - -/************************ - * West Bridge Data Structures - ************************/ - -/* Summary - This type specifies the direction of an endpoint to the - CyAsDmaEnableEndPoint function. - - Description - When an endpoint is enabled, the direction of the endpoint - can also be set. This type is used to specify the endpoint - type. Note that the direction is specified in USB terms. - Therefore, if the DMA is from the P port to West Bridge, - the direction is IN. - - See Also - * CyAsDmaEnableEndPoint -*/ -typedef enum cy_as_dma_direction { - /* Set the endpoint to type IN (P -> West Bridge) */ - cy_as_direction_in = 0, - /* Set the endpoint to type OUT (West Bridge -> P) */ - cy_as_direction_out = 1, - /* Only valid for EP 0 */ - cy_as_direction_in_out = 2, - /* Do no change the endpoint type */ - cy_as_direction_dont_change = 3 -} cy_as_dma_direction; - -/********************************* - * West Bridge Functions - *********************************/ - -/* Summary - Initialize the DMA module and ready the module for receiving data - - Description - This function initializes the DMA module by initializing all of - the endpoint data structures associated with the device given. - This function also register a DMA complete callback with the HAL - DMA code. This callback is called whenever the HAL DMA subsystem - completes a requested DMA operation. - - Returns - CY_AS_ERROR_SUCCESS - the module initialized successfully - CY_AS_ERROR_OUT_OF_MEMORY - memory allocation failed during - initialization - CY_AS_ERROR_ALREADY_RUNNING - the DMA module was already running - - See Also - * CyAsDmaStop -*/ -extern cy_as_return_status_t -cy_as_dma_start( - /* The device to start */ - cy_as_device *dev_p - ); - -/* Summary - Shutdown the DMA module - - Description - This function shuts down the DMA module for this device by - canceling any DMA requests associated with each endpoint and - then freeing the resources associated with each DMA endpoint. - - Returns - CY_AS_ERROR_SUCCESS - the module shutdown successfully - CY_AS_ERROR_NOT_RUNNING - the DMA module was not running - - See Also - * CyAsDmaStart - * CyAsDmaCancel -*/ -extern cy_as_return_status_t -cy_as_dma_stop( - /* The device to stop */ - cy_as_device *dev_p - ); - -/* Summary - This function cancels all outstanding DMA requests on a given endpoint - - Description - This function cancels any DMA requests outstanding on a given endpoint - by disabling the transfer of DMA requests from the queue to the HAL - layer and then removing any pending DMA requests from the queue. The - callback associated with any DMA requests that are being removed is - called with an error code of CY_AS_ERROR_CANCELED. - - Notes - If a request has already been sent to the HAL layer it will be - completed and not canceled. Only requests that have not been sent to - the HAL layer will be cancelled. - - Returns - CY_AS_ERROR_SUCCESS - the traffic on the endpoint is canceled - successfully - - See Also -*/ -extern cy_as_return_status_t -cy_as_dma_cancel( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to cancel */ - cy_as_end_point_number_t ep, - cy_as_return_status_t err - ); - -/* Summary - This function enables a single endpoint for DMA operations - - Description - In order to enable the queuing of DMA requests on a given - endpoint, the endpoint must be enabled for DMA. This function - enables a given endpoint. In addition, this function sets the - direction of the DMA operation. - - Returns - * CY_AS_ERROR_INVALID_ENDPOINT - invalid endpoint number - * CY_AS_ERROR_SUCCESS - endpoint was enabled or disabled - * successfully - - See Also - * CyAsDmaQueueRequest -*/ -extern cy_as_return_status_t -cy_as_dma_enable_end_point( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to enable or disable */ - cy_as_end_point_number_t ep, - /* CyTrue to enable, CyFalse to disable */ - cy_bool enable, - /* The direction of the endpoint */ - cy_as_dma_direction dir -); - -/* Summary - This function queue a DMA request for a given endpoint - - Description - When an West Bridge API module wishes to do a DMA operation, - this function is called on the associated endpoint to queue - a DMA request. When the DMA request has been fulfilled, the - callback associated with the DMA operation is called. - - Notes - The buffer associated with the DMA request, must remain valid - until after the callback function is calld. - - Returns - * CY_AS_ERROR_SUCCESS - the DMA operation was queued successfully - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint number was invalid - * CY_AS_ERROR_ENDPOINT_DISABLED - the endpoint was disabled - * CY_AS_ERROR_OUT_OF_MEMORY - out of memory processing the request - - See Also - * CyAsDmaEnableEndPoint - * CyAsDmaCancel -*/ -extern cy_as_return_status_t -cy_as_dma_queue_request( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to receive a new request */ - cy_as_end_point_number_t ep, - /* The memory buffer for the DMA request - - * must be valid until after the callback has been called */ - void *mem_p, - /* The size of the DMA request in bytes */ - uint32_t size, - /* If true and a DMA read request, return the next packet - * regardless of size */ - cy_bool packet, - /* If true, this is a read request, - * otherwise it is a write request */ - cy_bool readreq, - /* The callback to call when the DMA request is complete, - * either successfully or via an error */ - cy_as_dma_callback cb - ); - -/* Summary - This function waits until all DMA requests on a given endpoint - have been processed and then return - - Description - There are times when a module in the West Bridge API needs to - wait until the DMA operations have been queued. This function - sleeps until all DMA requests have been fulfilled and only then - returns to the caller. - - Notes - I don't think we will need a list of sleeping clients to support - multiple parallel client modules sleeping on a single endpoint, - but if we do instead of having a single sleep channel in the - endpoint, each client will have to supply a sleep channel and we - will have to maintain a list of sleep channels to wake. - - Returns - * CY_AS_ERROR_SUCCESS - the queue has drained successfully - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given is not valid - * CY_AS_ERROR_NESTED_SLEEP - CyAsDmaQueueRequest() was requested - * on an endpoint where CyAsDmaQueueRequest was already called -*/ -extern cy_as_return_status_t -cy_as_dma_drain_queue( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to drain */ - cy_as_end_point_number_t ep, - /* If CyTrue, call kickstart to start the DMA process, - if cy_false, west bridge will start the DMA process */ - cy_bool kickstart - ); - -/* Summary - Sets the maximum amount of data West Bridge can accept in a single - DMA Operation for the given endpoint - - Description - Depending on the configuration of the West Bridge device endpoint, - the amount of data that can be accepted varies. This function - sets the maximum amount of data West Bridge can accept in a single - DMA operation. The value is stored with the endpoint and passed - to the HAL layer in the CyAsHalDmaSetupWrite() and - CyAsHalDmaSetupRead() functoins. - - Returns - * CY_AS_ERROR_SUCCESS - the value was set successfully - * CY_AS_ERROR_INVALID_SIZE - the size value was not valid -*/ -extern cy_as_return_status_t -cy_as_dma_set_max_dma_size( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to change */ - cy_as_end_point_number_t ep, - /* The max size of this endpoint in bytes */ - uint32_t size - ); - -/* Summary - This function starts the DMA process on a given channel. - - Description - When transferring data from the P port processor to West - Bridge, the DMA operation must be initiated P Port software - for the first transfer. Subsequent transferrs will be - handled at the interrupt level. - - Returns - * CY_AS_ERROR_SUCCESS -*/ -extern cy_as_return_status_t -cy_as_dma_kick_start( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint to change */ - cy_as_end_point_number_t ep - ); - -/* Summary - This function receives endpoint data from a request. - - Description - For endpoint 0 and 1 the endpoint data is transferred from - the West Bridge device to the DMA via a lowlevel - requests (via the mailbox registers). - - Returns - * CY_AS_ERROR_SUCCESS -*/ -extern cy_as_return_status_t -cy_as_dma_received_data( - /* The device of interest */ - cy_as_device *dev_p, - /* The endpoint that received data */ - cy_as_end_point_number_t ep, - /* The data size */ - uint32_t dsize, - /* The data buffer */ - void *data - ); - -/* Summary - This function is called when the DMA operation on - an endpoint has been completed. - - Returns - * void - */ -extern void -cy_as_dma_completed_callback( - /* Tag to HAL completing the DMA operation. */ - cy_as_hal_device_tag tag, - /* Endpoint on which DMA has been completed. */ - cy_as_end_point_number_t ep, - /* Length of data received. */ - uint32_t length, - /* Status of DMA operation. */ - cy_as_return_status_t status - ); - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASDMA_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaserr.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaserr.h deleted file mode 100644 index 2cd0af1..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaserr.h +++ /dev/null @@ -1,1094 +0,0 @@ -/* Cypress West Bridge API header file (cyaserr.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASERR_H_ -#define _INCLUDED_CYASERR_H_ - -/*@@West Bridge Errors - Summary - This section lists the error codes for West Bridge. - -*/ - -/* Summary - The function completed successfully -*/ -#define CY_AS_ERROR_SUCCESS (0) - -/* Summary - A function trying to acquire a resource was unable to do so. - - Description - This code indicates that a resource that the API was trying to claim - could not be claimed. - - See Also - * CyAsMiscAcquireResource - * CyAsStorageClaim -*/ -#define CY_AS_ERROR_NOT_ACQUIRED (1) - -/* Summary - A function trying to acquire a resource was unable to do so. - - Description - The West Bridge API provides the capability to assign the storage media to - either the West Bridge device or the USB port. This error indicates the - P port was trying to release a storage media and was not able to do - so. This generally means it was not owned by the P port processor. - - See Also - * CyAsStorageRelease -*/ -#define CY_AS_ERROR_NOT_RELEASED (2) - -/* Summary - The West Bridge firmware is not loaded. - - Description - Most of the API functions that are part of the West Bridge API rely on - firmware running on the West Bridge device. This error code is - returned when one of these functions is called and the firmware has - not yet been loaded. - - See Also - * CyAsMiscGetFirmwareVersion - * CyAsMiscReset - * CyAsMiscAcquireResource - * CyAsMiscReleaseResource - * CyAsMiscSetTraceLevel - * CyAsStorageStart - * CyAsStorageStop - * CyAsStorageRegisterCallback - * CyAsStorageClaim - * CyAsStorageRelease - * CyAsStorageQueryMedia - * CyAsStorageQueryDevice - * CyAsStorageQueryUnit - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_NO_FIRMWARE (3) - -/* Summary - A timeout occurred waiting on a response from the West Bridge device - - Description - When requests are made of the West Bridge device, a response is expected - within a given timeframe. If a response is not recevied within the - given timeframe, a timeout error occurs. -*/ -#define CY_AS_ERROR_TIMEOUT (4) - -/* Summary - A request to download firmware was made while not in the CONFIG mode - - Description - Firmware is downloaded via the CyAsMiscDownloadFirmware() function. This - function can only be called while in the CONFIG mode. This error indicates - that the CyAsMiscDownloadFirmware() call was made while not in the CONFIG - mode. - - See Also - * CyAsMiscDownloadFirmware -*/ -#define CY_AS_ERROR_NOT_IN_CONFIG_MODE (5) - -/* Summary - This error is returned if the firmware size specified is too invalid. - - Description - If the size of the firmware to be downloaded into West Bridge is - invalid, this error is issued. Invalid firmware sizes are those - greater than 24K or a size of zero. - - See Also - * CyAsMiscDownloadFirmare -*/ -#define CY_AS_ERROR_INVALID_SIZE (6) - -/* Summary - This error is returned if a request is made to acquire a resource that has - already been acquired. - - Description - This error is returned if a request is made to acquire a resource that has - already been acquired. - - See Also - * CyAsMiscAcquireResource - * CyAsMiscReleaseResource -*/ -#define CY_AS_ERROR_RESOURCE_ALREADY_OWNED (7) - -/* Summary - This error is returned if a request is made to release a resource that has - not previously been acquired. - - Description - This error is returned if a request is made to release a resource that has - not previously been acquired. - - See Also - * CyAsMiscAcquireResource - * CyAsMiscReleaseResource -*/ -#define CY_AS_ERROR_RESOURCE_NOT_OWNED (8) - -/* Summary - This error is returned when a request is made for a media that - does not exist - - Description - This error is returned when a request is made that references - a storage media that does not exist. This error is returned - when the storage media is not present in the current system, - or if the media value given is not valid. - - See Also - * CyAsMiscSetTraceLevel - * CyAsStorageClaim - * CyAsStorageRelease - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_NO_SUCH_MEDIA (9) - -/* Summary - This error is returned when a request is made for a device - that does not exist - - Description - This error is returned when a request is made that references a - storage device that does not exist. This error is returned when - the device index is not present in the current system, or if the - device index exceeds 15. - - See Also - * CyAsMiscSetTraceLevel - * CyAsStorageQueryDevice - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_NO_SUCH_DEVICE (10) - -/* Summary - This error is returned when a request is made for a unit that - does not exist - - Description - This error is returned when a request is made that references - a storage unit that does not exist. This error is returned - when the unit index is not present in the current system, or - if the unit index exceeds 255. - - See Also - * CyAsMiscSetTraceLevel - * CyAsStorageQueryDevice - * CyAsStorageQueryUnit - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_NO_SUCH_UNIT (11) - -/* Summary - This error is returned when a request is made for a block that - does not exist - - Description - This error is returned when a request is made that references - a storage block that does not exist. This error is returned - when the block address reference an address beyond the end of - the unit selected. - - See Also - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_INVALID_BLOCK (12) - -/* Summary - This error is returned when an invalid trace level is set. - - Description - This error is returned when the trace level request is greater - than three. - - See Also - * CyAsMiscSetTraceLevel -*/ -#define CY_AS_ERROR_INVALID_TRACE_LEVEL (13) - -/* Summary - This error is returned when West Bridge is already in the standby state - and an attempt is made to put West Bridge into this state again. - - Description - This error is returned when West Bridge is already in the standby state - and an attempt is made to put West Bridge into this state again. - - See Also - * CyAsMiscEnterStandby -*/ -#define CY_AS_ERROR_ALREADY_STANDBY (14) - -/* Summary - This error is returned when the API needs to set a pin on the - West Bridge device, but this is not supported by the underlying HAL - layer. - - Description - This error is returned when the API needs to set a pin on the - West Bridge device, but this is not supported by the underlying HAL - layer. - - See Also - * CyAsMiscEnterStandby - * CyAsMiscLeaveStandby -*/ -#define CY_AS_ERROR_SETTING_WAKEUP_PIN (15) - -/* Summary - This error is returned when a module is being started that has - already been started. - - Description - This error is returned when a module is being started and that module - has already been started. This error does not occur with the - CyAsStorageStart() or CyAsUsbStart() functions as the storage and - USB modules are reference counted. - - Note - At the current time, this error is returned by module internal to - the API but not returned by any of the API functions. -*/ -#define CY_AS_ERROR_ALREADY_RUNNING (16) - -/* Summary - This error is returned when a module is being stopped that has - already been stopped. - - Description - This error is returned when a module is being stopped and that module - has already been stopped. This error does not occur with the - CyAsStorageStop() or CyAsUsbStop() functions as the storage and USB - modules are reference counted. - - Note - At the current time, this error is returned by module internal to - the API but not returned by any of the API functions. -*/ - -#define CY_AS_ERROR_NOT_RUNNING (17) - -/* Summary - This error is returned when the caller tries to claim a media that - has already been claimed. - - Description - This error is returned when the caller tries to claim a media that - has already been claimed. - - See Also - * CyAsStorageClaim -*/ -#define CY_AS_ERROR_MEDIA_ALREADY_CLAIMED (18) - -/* Summary - This error is returned when the caller tries to release a media that has - already been released. - - Description - This error is returned when the caller tries to release a media that has - already been released. - - See Also - * CyAsStorageRelease -*/ -#define CY_AS_ERROR_MEDIA_NOT_CLAIMED (19) - -/* Summary - This error is returned when canceling trying to cancel an asynchronous - operation when an async operation is not pending. - - Description - This error is returned when a call is made to a function to cancel an - asynchronous operation and there is no asynchronous operation pending. - - See Also - * CyAsStorageCancelAsync - * CyAsUsbCancelAsync -*/ -#define CY_AS_ERROR_NO_OPERATION_PENDING (20) - -/* Summary - This error is returned when an invalid endpoint number is provided to - an API call. - - Description - This error is returned when an invalid endpoint number is specified in - an API call. The endpoint number may be invalid because it is greater - than 15, or because it was a reference to an endpoint that is invalid - for West Bridge (2, 4, 6, or 8). - - See Also - * CyAsUsbSetEndPointConfig - * CyAsUsbGetEndPointConfig - * CyAsUsbReadData - * CyAsUsbWriteData - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync - * CyAsUsbSetStall - * CyAsUsbGetStall -*/ -#define CY_AS_ERROR_INVALID_ENDPOINT (21) - -/* Summary - This error is returned when an invalid descriptor type - is specified in an API call. - - Description - This error is returned when an invalid descriptor type - is specified in an API call. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor -*/ -#define CY_AS_ERROR_INVALID_DESCRIPTOR (22) - -/* Summary - This error is returned when an invalid descriptor index - is specified in an API call. - - Description - This error is returned when an invalid descriptor index - is specified in an API call. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor -*/ -#define CY_AS_ERROR_BAD_INDEX (23) - -/* Summary - This error is returned if trying to set a USB descriptor - when in the P port enumeration mode. - - Description - This error is returned if trying to set a USB descriptor - when in the P port enumeration mode. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor -*/ -#define CY_AS_ERROR_BAD_ENUMERATION_MODE (24) - -/* Summary - This error is returned when the endpoint configuration specified - is not valid. - - Description - This error is returned when the endpoint configuration specified - is not valid. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor - * CyAsUsbCommitConfig -*/ -#define CY_AS_ERROR_INVALID_CONFIGURATION (25) - -/* Summary - This error is returned when the API cannot verify it is connected - to an West Bridge device. - - Description - When the API is initialized, the API tries to read the ID register from - the West Bridge device. The value from this ID register should match the - value expected before communications with West Bridge are established. This - error means that the contents of the ID register cannot be verified. - - See Also - * CyAsMiscConfigureDevice -*/ -#define CY_AS_ERROR_NO_ANTIOCH (26) - -/* Summary - This error is returned when an API function is called and - CyAsMiscConfigureDevice has not been called to configure West Bridge - for the current environment. - - Description - This error is returned when an API function is called and - CyAsMiscConfigureDevice has not been called to configure West Bridge for - the current environment. - - See Also - * Almost all API function -*/ -#define CY_AS_ERROR_NOT_CONFIGURED (27) - -/* Summary - This error is returned when West Bridge cannot allocate memory required for - internal API operations. - - Description - This error is returned when West Bridge cannot allocate memory required for - internal API operations. - - See Also - * Almost all API functoins -*/ -#define CY_AS_ERROR_OUT_OF_MEMORY (28) - -/* Summary - This error is returned when a module is being started that has - already been started. - - Description - This error is returned when a module is being started and that module - has already been started. This error does not occur with the - CyAsStorageStart() or CyAsUsbStart() functions as the storage and - USB modules are reference counted. - - Note - At the current time, this error is returned by module internal to the API but - not returned by any of the API functions. -*/ -#define CY_AS_ERROR_NESTED_SLEEP (29) - -/* Summary - This error is returned when an operation is attempted on an endpoint that has - been disabled. - - Description - This error is returned when an operation is attempted on an endpoint that has - been disabled. - - See Also - * CyAsUsbReadData - * CyAsUsbWriteData - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync -*/ -#define CY_AS_ERROR_ENDPOINT_DISABLED (30) - -/* Summary - This error is returned when a call is made to an API function when - the device is in standby. - - Description - When the West Bridge device is in standby, the only two API functions that - can be called are CyAsMiscInStandby() and CyAsMiscLeaveStandby(). - Calling any other API function will result in this error. - - See Also -*/ -#define CY_AS_ERROR_IN_STANDBY (31) - -/* Summary - This error is returned when an API call is made with an invalid handle value. - - Description - This error is returned when an API call is made with an invalid handle value. - - See Also -*/ -#define CY_AS_ERROR_INVALID_HANDLE (32) - -/* Summary - This error is returned when an invalid response is returned from - the West Bridge device. - - Description - Many of the API calls result in requests made to the West Bridge - device. This error occurs when the response from West Bridge is - invalid and generally indicates that the West Bridge device - should be reset. - - See Also -*/ -#define CY_AS_ERROR_INVALID_RESPONSE (33) - -/* Summary - This error is returned from the callback function for any asynchronous - read or write request that is canceled. - - Description - When asynchronous requests are canceled, this error is passed to the - callback function associated with the request to indicate that the - request has been canceled - - See Also - * CyAsStorageReadAsync - * CyAsStorageWriteAsync - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync - * CyAsStorageCancelAsync - * CyAsUsbCancelAsync -*/ -#define CY_AS_ERROR_CANCELED (34) - -/* Summary - This error is returned when the call to create sleep channel fails - in the HAL layer. - - Description - This error is returned when the call to create sleep channel fails - in the HAL layer. - - See Also - * CyAsMiscConfigureDevice -*/ -#define CY_AS_ERROR_CREATE_SLEEP_CHANNEL_FAILED (35) - -/* Summary - This error is returned when the call to CyAsMiscLeaveStandby - is made and the device is not in standby. - - Description - This error is returned when the call to CyAsMiscLeaveStandby - is made and the device is not in standby. - - See Also -*/ -#define CY_AS_ERROR_NOT_IN_STANDBY (36) - -/* Summary - This error is returned when the call to destroy sleep channel fails - in the HAL layer. - - Description - This error is returned when the call to destroy sleep channel fails - in the HAL layer. - - See Also - * CyAsMiscDestroyDevice -*/ -#define CY_AS_ERROR_DESTROY_SLEEP_CHANNEL_FAILED (37) - -/* Summary - This error is returned when an invalid resource is specified to a call - to CyAsMiscAcquireResource() or CyAsMiscReleaseResource() - - Description - This error is returned when an invalid resource is specified to a call - to CyAsMiscAcquireResource() or CyAsMiscReleaseResource() - - See Also - * CyAsMiscAcquireResource - * CyAsMiscReleaseResource -*/ -#define CY_AS_ERROR_INVALID_RESOURCE (38) - -/* Summary - This error occurs when an operation is requested on an endpoint that has - a currently pending async operation. - - Description - There can only be a single asynchronous pending operation on a given - endpoint and while the operation is pending on other operation can occur - on the endpoint. In addition, the device cannot enter standby while - any asynchronous operations are pending. - - See Also - * CyAsStorageReadAsync - * CyAsStorageWriteAsync - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync - * CyAsStorageRead - * CyAsStorageWrite - * CyAsUsbReadData - * CyAsUsbWriteData - * CyAsMiscEnterStandby -*/ -#define CY_AS_ERROR_ASYNC_PENDING (39) - -/* Summary - This error is returned when a call to CyAsStorageCancelAsync() or - CyAsUsbCancelAsync() is made when no asynchronous request is pending. - - Description - This error is returned when a call to CyAsStorageCancelAsync() or - CyAsUsbCancelAsync() is made when no asynchronous request is pending. - - See Also - * CyAsStorageCancelAsync - * CyAsUsbCancelAsync -*/ -#define CY_AS_ERROR_ASYNC_NOT_PENDING (40) - -/* Summary - This error is returned when a request is made to put the West Bridge device - into standby mode while the USB stack is still active. - - Description - This error is returned when a request is made to put the West Bridge device - into standby mode while the USB stack is still active. You must call the - function CyAsUsbStop() in order to shut down the USB stack in order to go - into the standby mode. - - See Also - * CyAsMiscEnterStandby -*/ -#define CY_AS_ERROR_USB_RUNNING (41) - -/* Summary - A request for in the wrong direction was issued on an endpoint. - - Description - This error is returned when a write is attempted on an OUT endpoint or - a read is attempted on an IN endpoint. - - See Also - * CyAsUsbReadData - * CyAsUsbWriteData - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync -*/ -#define CY_AS_ERROR_USB_BAD_DIRECTION (42) - -/* Summary - An invalid request was received - - Description - This error is isused if an invalid request is issued. -*/ -#define CY_AS_ERROR_INVALID_REQUEST (43) - -/* Summary - An ACK request was requested while no setup packet was pending. - - Description - This error is issued if CyAsUsbAckSetupPacket() is called when no - setup packet is pending. -*/ -#define CY_AS_ERROR_NO_SETUP_PACKET_PENDING (44) - -/* Summary - A call was made to a API function that cannot be called from a callback. - - Description - Only asynchronous functions can be called from within West Bridge callbacks. - This error results when an invalid function is called from a callback. -*/ -#define CY_AS_ERROR_INVALID_IN_CALLBACK (45) - -/* Summary - A call was made to CyAsUsbSetEndPointConfig() before - CyAsUsbSetPhysicalConfiguration() was called. - - Description - When logical endpoints are configured, you must define the physical - endpoint for the logical endpoint being configured. Therefore - CyAsUsbSetPhysicalConfiguration() must be called to define the - physical endpoints before calling CyAsUsbSetEndPointConfig(). -*/ -#define CY_AS_ERROR_ENDPOINT_CONFIG_NOT_SET (46) - -/* Summary - The physical endpoint referenced is not valid in the current physical - configuration - - Description - When logical endpoints are configured, you must define the physical - endpoint for the logical endpoint being configured. Given the - current physical configuration, the physical endpoint referenced - is not valid. -*/ -#define CY_AS_ERROR_INVALID_PHYSICAL_ENDPOINT (47) - -/* Summary - The data supplied to the CyAsMiscDownloadFirmware() call is not - aligned on a WORD (16 bit) boundary. - - Description - Many systems have problems with the transfer of data a word at a - time when the data is not word aligned. For this reason, we - require that the firmware image be aligned on a word boundary and - be an even number of bytes. This error is returned if these - conditions are not met. -*/ -#define CY_AS_ERROR_ALIGNMENT_ERROR (48) - -/* Summary - A call was made to destroy the West Bridge device, but the USB - stack or the storage stack was will running. - - Description - Before calling CyAsMiscDestroyDevice to destroy an West Bridge - device created via a call to CyAsMiscCreateDevice, the USB and - STORAGE stacks much be stopped via calls to CyAsUsbStop and - CyAsStorageStop. This error indicates that one of these two - stacks have not been stopped. -*/ -#define CY_AS_ERROR_STILL_RUNNING (49) - -/* Summary - A call was made to the API for a function that is not yet supported. - - Description - There are calls that are not yet supported that may be called through - the API. This is done to maintain compatibility in the future with - the API. This error is returned if you are asking for a capability - that does not yet exist. -*/ -#define CY_AS_ERROR_NOT_YET_SUPPORTED (50) - -/* Summary - A NULL callback was provided where a non-NULL callback was required - - Description - When async IO function are called, a callback is required to indicate - that the IO has completed. This callback must be non-NULL. -*/ -#define CY_AS_ERROR_NULL_CALLBACK (51) - -/* Summary - This error is returned when a request is made to put the West Bridge device - into standby mode while the storage stack is still active. - - Description - This error is returned when a request is made to put the West Bridge device - into standby mode while the storage stack is still active. You must call the - function CyAsStorageStop() in order to shut down the storage stack in order - to go into the standby mode. - - See Also - * CyAsMiscEnterStandby -*/ -#define CY_AS_ERROR_STORAGE_RUNNING (52) - -/* Summary - This error is returned when an operation is attempted that cannot be - completed while the USB stack is connected to a USB host. - - Description - This error is returned when an operation is attempted that cannot be - completed while the USB stack is connected to a USB host. In order - to successfully complete the desired operation, CyAsUsbDisconnect() - must be called to disconnect from the host. -*/ -#define CY_AS_ERROR_USB_CONNECTED (53) - -/* Summary - This error is returned when a USB disconnect is attempted and the - West Bridge device is not connected. - - Description - This error is returned when a USB disconnect is attempted and the - West Bridge device is not connected. -*/ -#define CY_AS_ERROR_USB_NOT_CONNECTED (54) - -/* Summary - This error is returned when an P2S storage operation attempted - and data could not be read or written to the storage media. - - Description - This error is returned when an P2S storage operation attempted - and data could not be read or written to the storage media. If - this error is recevied then a retry can be done. -*/ -#define CY_AS_ERROR_MEDIA_ACCESS_FAILURE (55) - -/* Summary - This error is returned when an P2S storage operation attempted - and the media is write protected. - - Description - This error is returned when an P2S storage operation attempted - and the media is write protected. -*/ -#define CY_AS_ERROR_MEDIA_WRITE_PROTECTED (56) - -/* Summary - This error is returned when an attempt is made to cancel a request - that has already been sent to the West Bridge. - - Description - It is not possible to cancel an asynchronous storage read/write - operation after the actual data transfer with the West Bridge - has started. This error is returned if CyAsStorageCancelAsync - is called to cancel such a request. - */ -#define CY_AS_ERROR_OPERATION_IN_TRANSIT (57) - -/* Summary - This error is returned when an invalid parameter is passed to - one of the APIs. - - Description - Some of the West Bridge APIs are applicable to only specific - media types, devices etc. This error code is returned when a - API is called with an invalid parameter type. - */ -#define CY_AS_ERROR_INVALID_PARAMETER (58) - -/* Summary - This error is returned if an API is not supported in the current setup. - - Description - Some of the West Bridge APIs work only with specific device types - or firmware images. This error is returned when such APIs are called - when the current device or firmware does not support the invoked API - function. - */ -#define CY_AS_ERROR_NOT_SUPPORTED (59) - -/* Summary - This error is returned when a call is made to one of the Storage or - USB APIs while the device is in suspend mode. - - Description - This error is returned when a call is made to one of the storage or - USB APIs while the device is in suspend mode. - */ -#define CY_AS_ERROR_IN_SUSPEND (60) - -/* Summary - This error is returned when the call to CyAsMiscLeaveSuspend - is made and the device is not in suspend mode. - - Description - This error is returned when the call to CyAsMiscLeaveSuspend - is made and the device is not in suspend mode. - */ -#define CY_AS_ERROR_NOT_IN_SUSPEND (61) - -/* Summary - This error is returned when a command that is disabled by USB is called. - - Description - The remote wakeup capability should be exercised only if enabled by the - USB host. This error is returned when the CyAsUsbSignalRemoteWakeup API - is called when the feature has not been enabled by the USB host. - */ -#define CY_AS_ERROR_FEATURE_NOT_ENABLED (62) - -/* Summary - This error is returned when an Async storage read or write is called before a - query device call is issued. - - Description - In order for the SDK to properly set up a DMA the block size of a given media - needs to be known. This is done by making a call to CyAsStorageQueryDevice. - This call only needs to be made once per device. If this call is not issued - before an Async read or write is issued this error code is returned. - */ -#define CY_AS_ERROR_QUERY_DEVICE_NEEDED (63) - -/* Summary - This error is returned when a call is made to USB or STORAGE Start or - Stop before a prior Start or Stop has finished. - - Description - The USB and STORAGE start and stop functions can only be called if a - prior start or stop function call has fully completed. This means when - an async EX call is made you must wait until the callback for that call - has been completed before calling start or stop again. - */ -#define CY_AS_ERROR_STARTSTOP_PENDING (64) - -/* Summary - This error is returned when a request is made for a bus that does not exist - - Description - This error is returned when a request is made that references a bus - number that does not exist. This error is returned when the bus number - is not present in the current system, or if the bus number given is not - valid. - - See Also - * CyAsMiscSetTraceLevel - * CyAsStorageClaim - * CyAsStorageRelease - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageWriteAsync -*/ -#define CY_AS_ERROR_NO_SUCH_BUS (65) - -/* Summary - This error is returned when the bus corresponding to a media type cannot - be resolved. - - Description - In some S-Port configurations, the same media type may be supported on - multiple buses. In this case, it is not possible to resolve the target - address based on the media type. This error indicates that only - bus-based addressing is supported in a particular run-time - configuration. - - See Also - * CyAsMediaType - * CyAsBusNumber_t - */ -#define CY_AS_ERROR_ADDRESS_RESOLUTION_ERROR (66) - -/* Summary - This error is returned when an invalid command is passed to the - CyAsStorageSDIOSync() function. - - Description - This error indiactes an unknown Command type was passed to the SDIO - command handler function. - */ - -#define CY_AS_ERROR_INVALID_COMMAND (67) - - -/* Summary - This error is returned when an invalid function /uninitialized - function is passed to an SDIO function. - - Description - This error indiactes an unknown/uninitialized function number was - passed to a SDIO function. - */ -#define CY_AS_ERROR_INVALID_FUNCTION (68) - -/* Summary - This error is returned when an invalid block size is passed to - CyAsSdioSetBlocksize(). - - Description - This error is returned when an invalid block size (greater than - maximum block size supported) is passed to CyAsSdioSetBlocksize(). - */ - -#define CY_AS_ERROR_INVALID_BLOCKSIZE (69) - -/* Summary - This error is returned when an tuple requested is not found. - - Description - This error is returned when an tuple requested is not found. - */ -#define CY_AS_ERROR_TUPLE_NOT_FOUND (70) - -/* Summary - This error is returned when an extended IO operation to an SDIO function is - Aborted. - Description - This error is returned when an extended IO operation to an SDIO function is - Aborted. */ -#define CY_AS_ERROR_IO_ABORTED (71) - -/* Summary - This error is returned when an extended IO operation to an SDIO function is - Suspended. - Description - This error is returned when an extended IO operation to an SDIO function is - Suspended. */ -#define CY_AS_ERROR_IO_SUSPENDED (72) - -/* Summary - This error is returned when IO is attempted to a Suspended SDIO function. - Description - This error is returned when IO is attempted to a Suspended SDIO function. */ -#define CY_AS_ERROR_FUNCTION_SUSPENDED (73) - -/* Summary - This error is returned if an MTP function is called before MTPStart - has completed. - Description - This error is returned if an MTP function is called before MTPStart - has completed. -*/ -#define CY_AS_ERROR_MTP_NOT_STARTED (74) - -/* Summary - This error is returned by API functions that are not valid in MTP - mode (CyAsStorageClaim for example) - Description - This error is returned by API functions that are not valid in MTP - mode (CyAsStorageClaim for example) -*/ -#define CY_AS_ERROR_NOT_VALID_IN_MTP (75) - -/* Summary - This error is returned when an attempt is made to partition a - storage device that is already partitioned. - - Description - This error is returned when an attempt is made to partition a - storage device that is already partitioned. -*/ -#define CY_AS_ERROR_ALREADY_PARTITIONED (76) - -/* Summary - This error is returned when a call is made to - CyAsUsbSelectMSPartitions after CyAsUsbSetEnumConfig is called. - - Description - This error is returned when a call is made to - CyAsUsbSelectMSPartitions after CyAsUsbSetEnumConfig is called. - */ -#define CY_AS_ERROR_INVALID_CALL_SEQUENCE (77) - -/* Summary - This error is returned when a StorageWrite opperation is attempted - during an ongoing MTP transfer. - Description - This error is returned when a StorageWrite opperation is attempted - during an ongoing MTP transfer. A MTP transfer is initiated by a - call to CyAsMTPInitSendObject or CyAsMTPInitGetObject and is not - finished until the CyAsMTPSendObjectComplete or - CyAsMTPGetObjectComplete event is generated. -*/ -#define CY_AS_ERROR_NOT_VALID_DURING_MTP (78) - -/* Summary - This error is returned when a StorageRead or StorageWrite is - attempted while a UsbRead or UsbWrite on a Turbo endpoint (2 or 6) is - pending, or visa versa. - Description - When there is a pending usb read or write on a turbo endpoint (2 or 6) - a storage read or write call may not be performed. Similarly when there - is a pending storage read or write a usb read or write may not be - performed on a turbo endpoint (2 or 6). -*/ -#define CY_AS_ERROR_STORAGE_EP_TURBO_EP_CONFLICT (79) - -/* Summary - This error is returned when processor requests to reserve greater - number of zones than available for proc booting via lna firmware. - - Description - Astoria does not allocate any nand zones for the processor in this case. -*/ -#define CY_AS_ERROR_EXCEEDED_NUM_ZONES_AVAIL (80) - -#endif /* _INCLUDED_CYASERR_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h deleted file mode 100644 index b695ba1..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Cypress West Bridge API header file (cyashal.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASHAL_H_ -#define _INCLUDED_CYASHAL_H_ - -#if !defined(__doxygen__) - -/* The possible HAL layers defined and implemented by Cypress */ - -#ifdef __CY_ASTORIA_FPGA_HAL__ -#ifdef CY_HAL_DEFINED -#error only one HAL layer can be defined -#endif - -#define CY_HAL_DEFINED - -#include "cyashalfpga.h" -#endif - -/***** SCM User space HAL ****/ -#ifdef __CY_ASTORIA_SCM_HAL__ -#ifdef CY_HAL_DEFINED -#error only one HAL layer can be defined -#endif - -#define CY_HAL_DEFINEDŚŚ - -#include "cyanhalscm.h" -#endif -/***** SCM User space HAL ****/ - -/***** SCM Kernel HAL ****/ -#ifdef __CY_ASTORIA_SCM_KERNEL_HAL__ -#ifdef CY_HAL_DEFINED -#error only one HAL layer can be defined -#endif - -#define CY_HAL_DEFINEDŚ - -#include "cyanhalscm_kernel.h" -#endif -/***** SCM Kernel HAL ****/ - -/***** OMAP5912 Kernel HAL ****/ -#ifdef __CY_ASTORIA_OMAP_5912_KERNEL_HAL__ - #ifdef CY_HAL_DEFINED - #error only one HAL layer can be defined - #endif - - #define CY_HAL_DEFINED - - #include "cyanhalomap_kernel.h" -#endif -/***** eof OMAP5912 Kernel HAL ****/ - - - -/***** OMAP3430 Kernel HAL ****/ -#ifdef CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL - - #ifdef CY_HAL_DEFINED - #error only one HAL layer can be defined - #endif - - #define CY_HAL_DEFINED -/* moved to staging location, eventual implementation - * considered is here - * #include mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h> -*/ - #include "../../../arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h" - -#endif -/*****************************/ - - -/******/ -#ifdef __CY_ASTORIA_CUSTOMER_HAL__ -#ifdef CY_HAL_DEFINED -#error only one HAL layer can be defined -#endif -br -#define CY_HAL_DEFINED -#include "cyashal_customer.h" - -#endif - -#endif /* __doxygen__ */ - -#endif /* _INCLUDED_CYASHAL_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashalcb.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashalcb.h deleted file mode 100644 index 4d1670e..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashalcb.h +++ /dev/null @@ -1,44 +0,0 @@ -/* Cypress West Bridge API header file (cyashalcb.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASHALCB_H_ -#define _INCLUDED_CYASHALCB_H_ - -/* Summary - This type defines a callback function type called when a - DMA operation has completed. - - Description - - See Also - * CyAsHalDmaRegisterCallback - * CyAsHalDmaSetupWrite - * CyAsHalDmaSetupRead -*/ -typedef void (*cy_as_hal_dma_complete_callback)( - cy_as_hal_device_tag tag, - cy_as_end_point_number_t ep, - uint32_t cnt, - cy_as_return_status_t ret); - -typedef cy_as_hal_dma_complete_callback \ - cy_an_hal_dma_complete_callback; -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashaldoc.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashaldoc.h deleted file mode 100644 index 5bcbe9b..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyashaldoc.h +++ /dev/null @@ -1,800 +0,0 @@ -/* Cypress West Bridge API header file (cyashaldoc.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASHALDOC_H_ -#define _INCLUDED_CYASHALDOC_H_ - -#include "cyashaldef.h" - -/*@@Hardware Abstraction Layer (HAL) - Summary - This software module is supplied by the user of the West Bridge - API. This module contains the software that is specific to the - hardware implementation or operating system of the client - system. - - * Sleep Channels * - A sleep channel is a operating system object that provides that - capability for one thread or process to sleep while waiting on - the completion of some hardware event. The hardware event is - usually processed by a hardware interrupt and the interrupt - handler then wakes the thread or process that is sleeping. - - A sleep channel provides the mechanism for this operation. A - sleep channel is created and initialized during the API - initialization. When the API needs to wait for the hardware, - the API performs a SleepOn() operation on the sleep channel. - When hardware event occurs, an interrupt handler processes the - event and then performs a Wake() operation on the sleep channel - to wake the sleeping process or thread. - - * DMA Model * - When the West Bridge API needs to transfer USB or storage data - to/from the West Bridge device, this is done using a "DMA" - operation. In this context the term DMA is used loosely as the - West Bridge API does not really care if the data is transferred - using a burst read or write operation, or if the data is - transferred using programmed I/O operations. When a "DMA" - operation is needed, the West Bridge API calls either - CyAsHalDmaSetupRead() or CyAsHalDmaSetupWrite() depending on the - direction of the data flow. The West Bridge API expects the - "DMA" operation requested in the call to be completed and the - registered "DMA complete" callback to be called. - - The West Bridge API looks at several factors to determine the - size of the "DMA" request to pass to the HAL layer. First the - West Bridge API calls CyAsHalDmaMaxRequestSize() to determine - the maximum amount of data the HAL layer can accept for a "DMA" - operation on the requested endpoint. The West Bridge API will - never exceed this value in a "DMA" request to the HAL layer. - The West Bridge API also sends the maximum amount of data the - West Bridge device can accept as part of the "DMA" request. If - the amount of data in the "DMA" request to the HAL layer - exceeds the amount of data the West Bridge device can accept, - it is expected that the HAL layer has the ability to break the - request into multiple operations. - - If the HAL implementation requires the API to handle the size - of the "DMA" requests for one or more endpoints, the value - CY_AS_DMA_MAX_SIZE_HW_SIZE can be returned from the - CyAsHalDmaMaxRequestSize() call. In this case, the API assumes - that the maximum size of each "DMA" request should be limited - to the maximum that can be accepted by the endpoint in question. - - Notes - See the /api/hal/scm_kernel/cyashalscm_kernel.c file - for an example of how the DMA request size can be managed by - the HAL implementation. - - * Interrupt Handling * - The HAL implementation is required to handle interrupts arriving - from the West Bridge device, and call the appropriate handlers. - If the interrupt arriving is one of PLLLOCKINT, PMINT, MBINT or - MCUINT, the CyAsIntrServiceInterrupt API should be called to - service the interrupt. If the interrupt arriving is DRQINT, the - HAL should identify the endpoint corresponding to which the DRQ - is being generated and perform the read/write transfer from the - West Bridge. See the /api/hal/scm_kernel/ - cyashalscm_kernel.c or /api/hal/fpga/cyashalfpga.c - reference HAL implementations for examples. - - The HAL implementation can choose to poll the West Bridge - interrupt status register instead of using interrupts. In this - case, the polling has to be performed from a different thread/ - task than the one running the APIs. This is required because - there are API calls that block on the reception of data from the - West Bridge, which is delivered only through the interrupt - handlers. - - * Required Functions * - This section defines the types and functions that must be - supplied in order to provide a complete HAL layer for the - West Bridge API. - - Types that must be supplied: - * CyAsHalSleepChannel - - Hardware functions that must be supplied: - * CyAsHalWriteRegister - * CyAsHalReadRegister - * CyAsHalDmaSetupWrite - * CyAsHalDmaSetupRead - * CyAsHalDmaCancelRequest - * CyAsHalDmaRegisterCallback - * CyAsHalDmaMaxRequestSize - * CyAsHalSetWakeupPin - * CyAsHalSyncDeviceClocks - * CyAsHalInitDevRegisters - * CyAsHalReadRegsBeforeStandby - * CyAsHalRestoreRegsAfterStandby - - Operating system functions that must be supplied: - * CyAsHalAlloc - * CyAsHalFree - * CyAsHalCBAlloc - * CyAsHalCBFree - * CyAsHalMemSet - * CyAsHalCreateSleepChannel - * CyAsHalDestroySleepChannel - * CyAsHalSleepOn - * CyAsHalWake - * CyAsHalDisableInterrupts - * CyAsHalEnableInterrupts - * CyAsHalSleep150 - * CyAsHalSleep - * CyAsHalAssert - * CyAsHalPrintMessage - * CyAsHalIsPolling -*/ - -/* Summary - This is the type that represents a sleep channel - - Description - A sleep channel is an operating system object that, when a - thread of control waits on the sleep channel, the thread - sleeps until another thread signals the sleep object. This - object is generally used when a high level API is called - and must wait for a response that is supplied in an interrupt - handler. The thread calling the API is put into a sleep - state and when the reply arrives via the interrupt handler, - the interrupt handler wakes the sleeping thread to indicate - that the expect reply is available. -*/ -typedef struct cy_as_hal_sleep_channel { - /* This structure is filled in with OS specific information - to implementat a sleep channel */ - int m_channel; -} cy_as_hal_sleep_channel; - -/* Summary - This function is called to write a register value - - Description - This function is called to write a specific register to a - specific value. The tag identifies the device of interest. - The address is relative to the base address of the West - Bridge device. - - Returns - Nothing - - See Also - * CyAsHalDeviceTag - * CyAsHalReadRegister -*/ -EXTERN void -cy_as_hal_write_register( -/* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The address we are writing to */ - uint16_t addr, - /* The value to write to the register */ - uint16_t value - ); - -/* Summary - This function is called to read a register value - - Description - This function is called to read the contents of a specific - register. The tag identifies the device of interest. The - address is relative to the base address of the West Bridge - device. - - Returns - Contents of the register - - See Also - * CyAsHalDeviceTag - * CyAsHalWriteRegister -*/ -EXTERN uint16_t -cy_as_hal_read_register( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The address we are writing to */ - uint16_t addr - ); - -/* Summary - This function initiates a DMA write operation to write - to West Bridge - - Description - This function initiates a DMA write operation. The request - size will not exceed the value the HAL layer returned via - CyAsHalDmaMaxRequestSize(). This request size may exceed - the size of what the West Bridge device will accept as on - packet and the HAL layer may need to divide the request - into multiple hardware DMA operations. - - Returns - None - - See Also - * CyAsHalDmaSetupRead - * CyAsHalDmaMaxRequestSize -*/ -EXTERN void -cy_as_hal_dma_setup_write( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The endpoint we are writing to */ - cy_as_end_point_number_t ep, - /* The data to write via DMA */ - void *buf_p, - /* The size of the data at buf_p */ - uint32_t size, - /* The maximum amount of data that the endpoint - * can accept as one packet */ - uint16_t maxsize - ); - -/* Summary - This function initiates a DMA read operation from West Bridge - - Description - This function initiates a DMA read operation. The request - size will not exceed the value the HAL layer returned via - CyAsHalDmaMaxRequestSize(). This request size may exceed - the size of what the Anitoch will accept as one packet and - the HAL layer may need to divide the request into multiple - hardware DMA operations. - - Returns - None - - See Also - * CyAsHalDmaSetupRead - * CyAsHalDmaMaxRequestSize -*/ -EXTERN void -cy_as_hal_dma_setup_read( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The endpoint we are reading from */ - cy_as_end_point_number_t ep, - /* The buffer to read data into */ - void *buf_p, - /* The amount of data to read */ - uint32_t size, - /* The maximum amount of data that the endpoint - * can provide in one DMA operation */ - uint16_t maxsize - ); - -/* Summary - This function cancels a pending DMA request - - Description - This function cancels a pending DMA request that has been - passed down to the hardware. The HAL layer can elect to - physically cancel the request if possible, or just ignore - the results of the request if it is not possible. - - Returns - None -*/ -EXTERN void -cy_as_hal_dma_cancel_request( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The endpoint we are reading from */ - cy_as_end_point_number_t ep - ); - -/* Summary - This function registers a callback function to be called when - a DMA request is completed - - Description - This function registers a callback that is called when a request - issued via CyAsHalDmaSetupWrite() or CyAsHalDmaSetupRead() has - completed. - - Returns - None - - See Also - * CyAsHalDmaSetupWrite - * CyAsHalDmaSetupRead -*/ -EXTERN void -cy_as_hal_dma_register_callback( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The callback to call when a request has completed */ - cy_as_hal_dma_complete_callback cb - ); - -/* Summary - This function returns the maximum size of a DMA request that can - be handled by the HAL. - - Description - When DMA requests are passed to the HAL layer for processing, - the HAL layer may have a limit on the size of the request that - can be handled. This function is called by the DMA manager for - an endpoint when DMA is enabled to get the maximum size of data - the HAL layer can handle. The DMA manager insures that a request - is never sent to the HAL layer that exceeds the size returned by - this function. - - Returns - the maximum size of DMA request the HAL layer can handle -*/ -EXTERN uint32_t -cy_as_hal_dma_max_request_size( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The endpoint of interest */ - cy_as_end_point_number_t ep - ); - -/* Summary - This function sets the WAKEUP pin to a specific state on the - West Bridge device. - - Description - In order to enter the standby mode, the WAKEUP pin must be - de-asserted. In order to resume from standby mode, the WAKEUP - pin must be asserted. This function provides the mechanism to - do this. - - Returns - 1 if the pin was changed, 0 if the HAL layer does not support - changing this pin -*/ -EXTERN uint32_t -cy_as_hal_set_wakeup_pin( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* The desired state of the wakeup pin */ - cy_bool state - ); - -/* Summary - Synchronise the West Bridge device clocks to re-establish device - connectivity. - - Description - When the Astoria bridge device is working in SPI mode, a long - period of inactivity can cause a loss of serial synchronisation - between the processor and Astoria. This function is called by - the API when it detects such a condition, and is expected to take - the action required to re-establish clock synchronisation between - the devices. - - Returns - CyTrue if the attempt to re-synchronise is successful, - CyFalse if not. - */ -EXTERN cy_bool -cy_as_hal_sync_device_clocks( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - ); - -/* Summary - Initialize West Bridge device registers that may have been - modified while the device was in standby. - - Description - The content of some West Bridge registers may be lost when - the device is placed in standby mode. This function restores - these register contents so that the device can continue to - function normally after it wakes up from standby mode. - - This function is required to perform operations only when the - API is being used with the Astoria device in one of the PNAND - modes or in the PSPI mode. It can be a no-operation in all - other cases. - - Returns - None - */ -EXTERN void -cy_as_hal_init_dev_registers( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag, - /* Indicates whether this is a wake-up from standby. */ - cy_bool is_standby_wakeup - ); - -/* Summary - This function reads a set of P-port accessible device registers and - stores their value for later use. - - Description - The West Bridge Astoria device silicon has a known problem when - operating in SPI mode on the P-port, where some of the device - registers lose their value when the device goes in and out of - standby mode. The suggested work-around is to reset the Astoria - device as part of the wakeup procedure from standby. - - This requires that the values of some of the P-port accessible - registers be restored to their pre-standby values after it has - been reset. This HAL function can be used to read and store - the values of these registers at the point where the device is - being placed in standby mode. - - Returns - None - - See Also - * CyAsHalRestoreRegsAfterStandby - */ -EXTERN void -cy_as_hal_read_regs_before_standby( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag - ); - -/* Summary - This function restores the old values to a set of P-port - accessible device registers. - - Description - This function is part of the work-around to a known West - Bridge Astoria device error when operating in SPI mode on - the P-port. This function is used to restore a set of - P-port accessible registers to the values they had before - the device was placed in standby mode. - - Returns - None - - See Also - * CyAsHalRestoreRegsAfterStandby - */ -EXTERN void -cy_as_hal_restore_regs_after_standby( - /* The tag to ID a specific West Bridge device */ - cy_as_hal_device_tag tag - ); - -/* - * The functions below this comment are part of the HAL layer, - * as the HAL layer consists of the abstraction to both the - * hardware platform and the operating system. However; the - * functions below this comment all relate to the operating - * environment and not specifically to the hardware platform - * or specific device. - */ - -/* Summary - This function allocates a block of memory - - Description - This is the HAL layer equivalent of the malloc() function. - - Returns - a pointer to a block of memory - - See Also - * CyAsHalFree -*/ -EXTERN void * -cy_as_hal_alloc( - /* The size of the memory block to allocate */ - uint32_t size - ); - -/* Summary - This function frees a previously allocated block of memory - - Description - This is the HAL layer equivalent of the free() function. - - Returns - None - - See Also - * CyAsHalAlloc -*/ -EXTERN void -cy_as_hal_free( - /* Pointer to a memory block to free */ - void *ptr - ); - -/* Summary - This function is a malloc equivalent that can be used from an - interrupt context. - - Description - This function is a malloc equivalent that will be called from the - API in callbacks. This function is required to be able to provide - memory in interrupt context. - - Notes - For platforms where it is not possible to allocate memory in interrupt - context, we provide a reference allocator that takes memory during - initialization and implements malloc/free using this memory. - See the /api/hal/fpga/cyashalblkalloc.[ch] files for the - implementation, and the /api/hal/fpga/cyashalfpga.c file - for an example of the use of this allocator. - - Returns - A pointer to the allocated block of memory - - See Also - * CyAsHalCBFree - * CyAsHalAlloc -*/ -EXTERN void * -cy_as_hal_c_b_alloc( - /* The size of the memory block to allocate */ - uint32_t size - ); - -/* Summary - This function frees the memory allocated through the CyAsHalCBAlloc - call. - - Description - This function frees memory allocated through the CyAsHalCBAlloc - call, and is also required to support calls from interrupt - context. - - Returns - None - - See Also - * CyAsHalCBAlloc - * CyAsHalFree -*/ -EXTERN void -cy_as_hal_c_b_free( - /* Pointer to the memory block to be freed */ - void *ptr - ); - -/* Summary - This function sets a block of memory to a specific value - - Description - This function is the HAL layer equivalent of the memset() function. - - Returns - None -*/ -EXTERN void -cy_as_mem_set( - /* A pointer to a block of memory to set */ - void *ptr, - /* The value to set the memory to */ - uint8_t value, - /* The number of bytes to set */ - uint32_t cnt - ); - -/* Summary - This function creates or initializes a sleep channel - - Description - This function creates or initializes a sleep channel. The - sleep channel defined using the HAL data structure - CyAsHalSleepChannel. - - Returns - CyTrue is the initialization was successful, and CyFalse otherwise - - See Also - * CyAsHalSleepChannel - * CyAsHalDestroySleepChannel - * CyAsHalSleepOn - * CyAsHalWake -*/ -EXTERN cy_bool -cy_as_hal_create_sleep_channel( - /* Pointer to the sleep channel to create/initialize */ - cy_as_hal_sleep_channel *chan - ); - -/* Summary - This function destroys an existing sleep channel - - Description - This function destroys an existing sleep channel. The sleep channel - is of type CyAsHalSleepChannel. - - Returns - CyTrue if the channel was destroyed, and CyFalse otherwise - - See Also - * CyAsHalSleepChannel - * CyAsHalCreateSleepChannel - * CyAsHalSleepOn - * CyAsHalWake -*/ -EXTERN cy_bool -cy_as_hal_destroy_sleep_channel( - /* The sleep channel to destroy */ - cy_as_hal_sleep_channel chan - ); - -/* Summary - This function causes the calling process or thread to sleep until - CyAsHalWake() is called - - Description - This function causes the calling process or threadvto sleep. - When CyAsHalWake() is called on the same sleep channel, this - processes or thread is then wakened and allowed to run - - Returns - CyTrue if the thread or process is asleep, and CyFalse otherwise - - See Also - * CyAsHalSleepChannel - * CyAsHalWake -*/ -EXTERN cy_bool -cy_as_hal_sleep_on( - /* The sleep channel to sleep on */ - cy_as_hal_sleep_channel chan, - /* The maximum time to sleep in milli-seconds */ - uint32_t ms - ); - -/* Summary - This function casues the process or thread sleeping on the given - sleep channel to wake - - Description - This function causes the process or thread sleeping on the given - sleep channel to wake. The channel - - Returns - CyTrue if the thread or process is awake, and CyFalse otherwise - - See Also - * CyAsHalSleepChannel - * CyAsHalSleepOn -*/ -EXTERN cy_bool -cy_as_hal_wake( - /* The sleep channel to wake */ - cy_as_hal_sleep_channel chan - ); - -/* Summary - This function disables interrupts, insuring that short bursts - of code can be run without danger of interrupt handlers running. - - Description - There are cases within the API when lists must be manipulated by - both the API and the associated interrupt handlers. In these - cases, interrupts must be disabled to insure the integrity of the - list during the modification. This function is used to disable - interrupts during the short intervals where these lists are being - changed. - - The HAL must have the ability to nest calls to - CyAsHalDisableInterrupts and CyAsHalEnableInterrupts. - - Returns - Any interrupt related state value which will be passed back into - the subsequent CyAsHalEnableInterrupts call. - - See Also - * CyAsHalEnableInterrupts -*/ -EXTERN uint32_t -cy_as_hal_disable_interrupts(); - -/* Summary - This function re-enables interrupts after a critical section of - code in the API has been completed. - - Description - There are cases within the API when lists must be manipulated by - both the API and the associated interrupt handlers. In these - cases, interrupts must be disabled to insure the integrity of the - list during the modification. This function is used to enable - interrupts after the short intervals where these lists are being - changed. - - See Also - * CyAsHalDisableInterrupts -*/ -EXTERN void -cy_as_hal_enable_interrupts( - /* Value returned by the previous CyAsHalDisableInterrupts call. */ - uint32_t value - ); - -/* Summary - This function sleeps for 150 ns. - - Description - This function sleeps for 150 ns before allowing the calling function - to continue. This function is used for a specific purpose and the - sleep required is at least 150 ns. -*/ -EXTERN void -cy_as_hal_sleep150( - ); - -/* Summary - This function sleeps for the given number of milliseconds - - Description - This function sleeps for at least the given number of milliseonds -*/ -EXTERN void -cy_as_hal_sleep( - uint32_t ms - ); - -/* Summary - This function asserts when the condition evaluates to zero - - Description - Within the API there are conditions which are checked to insure - the integrity of the code. These conditions are checked only - within a DEBUG build. This function is used to check the condition - and if the result evaluates to zero, it should be considered a - fatal error that should be reported to Cypress. -*/ -EXTERN void -cy_as_hal_assert( - /* The condition to evaluate */ - cy_bool cond - ); - -/* Summary - This function prints a message from the API to a human readable device - - Description - There are places within the West Bridge API where printing a message - is useful to the debug process. This function provides the mechanism - to print a message. - - Returns - NONE -*/ -EXTERN void -cy_as_hal_print_message( - /* The message to print */ - const char *fmt_p, - ... /* Variable arguments */ - ); - -/* Summary - This function reports whether the HAL implementation uses - polling to service data coming from the West Bridge. - - Description - This function reports whether the HAL implementation uses - polling to service data coming from the West Bridge. - - Returns - CyTrue if the HAL polls the West Bridge Interrupt Status registers - to complete operations, CyFalse if the HAL is interrupt driven. - */ -EXTERN cy_bool -cy_as_hal_is_polling( - void); - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasintr.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasintr.h deleted file mode 100644 index 60a6fff..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasintr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Cypress West Bridge API header file (cyasintr.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASINTR_H_ -#define _INCLUDED_CYASINTR_H_ - -#include "cyasdevice.h" - -#include "cyas_cplus_start.h" - -/* Summary - Initialize the interrupt manager module - - Description - This function is called to initialize the interrupt module. - This module enables interrupts as well as servies West Bridge - related interrupts by determining the source of the interrupt - and calling the appropriate handler function. - - Notes - If the dmaintr parameter is TRUE, the initialization code - initializes the interrupt mask to have the DMA related interrupt - enabled via the general purpose interrupt. However, the interrupt - service function assumes that the DMA interrupt is handled by the - HAL layer before the interrupt module handler function is called. - - Returns - * CY_AS_ERROR_SUCCESS - the interrupt module was initialized - * correctly - * CY_AS_ERROR_ALREADY_RUNNING - the interrupt module was already - * started - - See Also - * CyAsIntrStop - * CyAsServiceInterrupt -*/ -cy_as_return_status_t -cy_as_intr_start( - /* Device being initialized */ - cy_as_device *dev_p, - /* If true, enable the DMA interrupt through the INT signal */ - cy_bool dmaintr - ); - -/* Summary - Stop the interrupt manager module - - Description - This function stops the interrupt module and masks all interrupts - from the West Bridge device. - - Returns - * CY_AS_ERROR_SUCCESS - the interrupt module was stopped - * successfully - * CY_AS_ERROR_NOT_RUNNING - the interrupt module was not - * running - - See Also - * CyAsIntrStart - * CyAsServiceInterrupt -*/ -cy_as_return_status_t -cy_as_intr_stop( - /* Device bein stopped */ - cy_as_device *dev_p - ); - - -/* Summary - The interrupt service routine for West Bridge - - Description - When an interrupt is detected, this function is called to - service the West Bridge interrupt. It is safe and efficient - for this function to be called when no West Bridge interrupt - has occurred. This function will determine it is not an West - Bridge interrupt quickly and return. -*/ -void cy_as_intr_service_interrupt( - /* The USER supplied tag for this device */ - cy_as_hal_device_tag tag - ); - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASINTR_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslep2pep.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslep2pep.h deleted file mode 100644 index 6626cc4..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslep2pep.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Cypress West Bridge API header file (cyaslep2pep.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASLEP2PEP_H_ -#define _INCLUDED_CYASLEP2PEP_H_ - -#include "cyasdevice.h" - -extern cy_as_return_status_t -cy_as_usb_map_logical2_physical(cy_as_device *dev_p); - -extern cy_as_return_status_t -cy_as_usb_setup_dma(cy_as_device *dev_p); - -extern cy_as_return_status_t -cy_as_usb_set_dma_sizes(cy_as_device *dev_p); - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslowlevel.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslowlevel.h deleted file mode 100644 index 5c7972f..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslowlevel.h +++ /dev/null @@ -1,366 +0,0 @@ -/* Cypress West Bridge API header file (cyaslowlevel.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASLOWLEVEL_H_ -#define _INCLUDED_CYASLOWLEVEL_H_ - -/*@@Low Level Communications - - Summary - The low level communications module is responsible for - communications between the West Bridge device and the P - port processor. Communications is organized as a series - of requests and subsequent responses. For each request - there is a one and only one response. Requests may go - from the West Bridge device to the P port processor, or - from the P Port processor to the West Bridge device. - - Description - Requests are issued across what is called a context. A - context is a single channel of communications from one - processor to another processor. There can be only a single - request outstanding on a context at a given time. Contexts - are used to identify subsystems that can only process a - single request at a time, but are independent of other - contexts in the system. For instance, there is a context - for communicating storage commands from the P port processor - to the West Bridge device. There is also a context for - communicating USB commands from the P port processor to the - West Bridge device. - - Requests and responses are identical with the exception of - the type bit in the request/response header. If the type - bit is one, the packet is a request. If this bit is zero, - the packet is a response. Also encoded within the header of - the request/response is the code. The code is a command - code for a request, or a response code for a response. For - a request, the code is a function of the context. The code - 0 has one meaning for the storage context and a different - meaning for the USB context. The code is treated differently - in the response. If the code in the response is less than 16, - then the meaning of the response is global across all - contexts. If the response is greater than or equal to 16, - then the response is specific to the associated context. - - Requests and responses are transferred between processors - through the mailbox registers. It may take one or more cycles - to transmit a complete request or response. The context is - encoded into each cycle of the transfer to insure the - receiving processor can route the data to the appropriate - context for processing. In this way, the traffic from multiple - contexts can be multiplexed into a single data stream through - the mailbox registers by the sending processor, and - demultiplexed from the mailbox registers by the receiving - processor. - - * Firmware Assumptions * - The firmware assumes that mailbox contents will be consumed - immediately. Therefore for multi-cycle packets, the data is - sent in a tight polling loop from the firmware. This implies - that the data must be read from the mailbox register on the P - port side and processed immediately or performance of the - firmware will suffer. In order to insure this is the case, - the data from the mailboxes is read and stored immediately - in a per context buffer. This occurs until the entire packet - is received at which time the request packet is processed. - Since the protocol is designed to allow for only one - outstanding packet at a time, the firmware can never be in a - position of waiting on the mailbox registers while the P port - is processing a request. Only after the response to the - previous request is sent will another request be sent. -*/ - -#include "cyashal.h" -#include "cyasdevice.h" - -#include "cyas_cplus_start.h" - -/* - * Constants - */ -#define CY_AS_REQUEST_RESPONSE_CODE_MASK (0x00ff) -#define CY_AS_REQUEST_RESPONSE_CONTEXT_MASK (0x0F00) -#define CY_AS_REQUEST_RESPONSE_CONTEXT_SHIFT (8) -#define CY_AS_REQUEST_RESPONSE_TYPE_MASK (0x4000) -#define CY_AS_REQUEST_RESPONSE_LAST_MASK (0x8000) -#define CY_AS_REQUEST_RESPONSE_CLEAR_STR_FLAG (0x1000) - -/* - * These macros extract the data from a 16 bit value - */ -#define cy_as_mbox_get_code(c) \ - ((uint8_t)((c) & CY_AS_REQUEST_RESPONSE_CODE_MASK)) -#define cy_as_mbox_get_context(c) \ - ((uint8_t)(((c) & CY_AS_REQUEST_RESPONSE_CONTEXT_MASK) \ - >> CY_AS_REQUEST_RESPONSE_CONTEXT_SHIFT)) -#define cy_as_mbox_is_last(c) \ - ((c) & CY_AS_REQUEST_RESPONSE_LAST_MASK) -#define cy_as_mbox_is_request(c) \ - (((c) & CY_AS_REQUEST_RESPONSE_TYPE_MASK) != 0) -#define cy_as_mbox_is_response(c) \ - (((c) & CY_AS_REQUEST_RESPONSE_TYPE_MASK) == 0) - -/* - * These macros (not yet written) pack data into or extract data - * from the m_box0 field of the request or response - */ -#define cy_as_ll_request_response__set_code(req, code) \ - ((req)->box0 = \ - ((req)->box0 & ~CY_AS_REQUEST_RESPONSE_CODE_MASK) | \ - (code & CY_AS_REQUEST_RESPONSE_CODE_MASK)) - -#define cy_as_ll_request_response__get_code(req) \ - cy_as_mbox_get_code((req)->box0) - -#define cy_as_ll_request_response__set_context(req, context) \ - ((req)->box0 |= ((context) << \ - CY_AS_REQUEST_RESPONSE_CONTEXT_SHIFT)) - -#define cy_as_ll_request_response__set_clear_storage_flag(req) \ - ((req)->box0 |= CY_AS_REQUEST_RESPONSE_CLEAR_STR_FLAG) - -#define cy_as_ll_request_response__get_context(req) \ - cy_as_mbox_get_context((req)->box0) - -#define cy_as_ll_request_response__is_last(req) \ - cy_as_mbox_is_last((req)->box0) - -#define CY_an_ll_request_response___set_last(req) \ - ((req)->box0 |= CY_AS_REQUEST_RESPONSE_LAST_MASK) - -#define cy_as_ll_request_response__is_request(req) \ - cy_as_mbox_is_request((req)->box0) - -#define cy_as_ll_request_response__set_request(req) \ - ((req)->box0 |= CY_AS_REQUEST_RESPONSE_TYPE_MASK) - -#define cy_as_ll_request_response__set_response(req) \ - ((req)->box0 &= ~CY_AS_REQUEST_RESPONSE_TYPE_MASK) - -#define cy_as_ll_request_response__is_response(req) \ - cy_as_mbox_is_response((req)->box0) - -#define cy_as_ll_request_response__get_word(req, offset) \ - ((req)->data[(offset)]) - -#define cy_as_ll_request_response__set_word(req, offset, \ - value) ((req)->data[(offset)] = value) - -typedef enum cy_as_remove_request_result_t { - cy_as_remove_request_sucessful, - cy_as_remove_request_in_transit, - cy_as_remove_request_not_found -} cy_as_remove_request_result_t; - -/* Summary - Start the low level communications module - - Description -*/ -cy_as_return_status_t -cy_as_ll_start( - cy_as_device *dev_p - ); - -cy_as_return_status_t -cy_as_ll_stop( - cy_as_device *dev_p - ); - - -cy_as_ll_request_response * -cy_as_ll_create_request( - cy_as_device *dev_p, - uint16_t code, - uint8_t context, - /* Length of the request in 16 bit words */ - uint16_t length - ); - -void -cy_as_ll_init_request( - cy_as_ll_request_response *req_p, - uint16_t code, - uint16_t context, - uint16_t length); - -void -cy_as_ll_init_response( - cy_as_ll_request_response *req_p, - uint16_t length); - -void -cy_as_ll_destroy_request( - cy_as_device *dev_p, - cy_as_ll_request_response *); - -cy_as_ll_request_response * -cy_as_ll_create_response( - cy_as_device *dev_p, - /* Length of the request in 16 bit words */ - uint16_t length - ); - -cy_as_remove_request_result_t -cy_as_ll_remove_request( - cy_as_device *dev_p, - cy_as_context *ctxt_p, - cy_as_ll_request_response *req_p, - cy_bool force - ); -void -cy_as_ll_remove_all_requests(cy_as_device *dev_p, - cy_as_context *ctxt_p); - -void -cy_as_ll_destroy_response( - cy_as_device *dev_p, - cy_as_ll_request_response *); - -cy_as_return_status_t -cy_as_ll_send_request( - /* The West Bridge device */ - cy_as_device *dev_p, - /* The request to send */ - cy_as_ll_request_response *req, - /* Storage for a reply, must be sure it is of sufficient size */ - cy_as_ll_request_response *resp, - /* If true, this is a sync request */ - cy_bool sync, - /* Callback to call when reply is received */ - cy_as_response_callback cb -); - -cy_as_return_status_t -cy_as_ll_send_request_wait_reply( - /* The West Bridge device */ - cy_as_device *dev_p, - /* The request to send */ - cy_as_ll_request_response *req, - /* Storage for a reply, must be sure it is of sufficient size */ - cy_as_ll_request_response *resp -); - -/* Summary - This function registers a callback function to be called when a - request arrives on a given context. - - Description - - Returns - * CY_AS_ERROR_SUCCESS -*/ -extern cy_as_return_status_t -cy_as_ll_register_request_callback( - cy_as_device *dev_p, - uint8_t context, - cy_as_response_callback cb - ); - -/* Summary - This function packs a set of bytes given by the data_p pointer - into a request, reply structure. -*/ -extern void -cy_as_ll_request_response__pack( - /* The destintation request or response */ - cy_as_ll_request_response *req, - /* The offset of where to pack the data */ - uint32_t offset, - /* The length of the data to pack in bytes */ - uint32_t length, - /* The data to pack */ - void *data_p - ); - -/* Summary - This function unpacks a set of bytes from a request/reply - structure into a segment of memory given by the data_p pointer. -*/ -extern void -cy_as_ll_request_response__unpack( - /* The source of the data to unpack */ - cy_as_ll_request_response *req, - /* The offset of the data to unpack */ - uint32_t offset, - /* The length of the data to unpack in bytes */ - uint32_t length, - /* The destination of the unpack operation */ - void *data_p - ); - -/* Summary - This function sends a status response back to the West Bridge - device in response to a previously send request -*/ -extern cy_as_return_status_t -cy_as_ll_send_status_response( - /* The West Bridge device */ - cy_as_device *dev_p, - /* The context to send the response on */ - uint8_t context, - /* The success/failure code to send */ - uint16_t code, - /* Flag to clear wait on storage context */ - uint8_t clear_storage); - -/* Summary - This function sends a response back to the West Bridge device. - - Description - This function sends a response back to the West Bridge device. - The response is sent on the context given by the 'context' - variable. The code for the response is given by the 'code' - argument. The data for the response is given by the data and - length arguments. -*/ -extern cy_as_return_status_t -cy_as_ll_send_data_response( - /* The West Bridge device */ - cy_as_device *dev_p, - /* The context to send the response on */ - uint8_t context, - /* The response code to use */ - uint16_t code, - /* The length of the data for the response */ - uint16_t length, - /* The data for the response */ - void *data -); - -/* Summary - This function removes any requests of the given type - from the given context. - - Description - This function removes requests of a given type from the - context given via the context number. -*/ -extern cy_as_return_status_t -cy_as_ll_remove_ep_data_requests( - /* The West Bridge device */ - cy_as_device *dev_p, - cy_as_end_point_number_t ep - ); - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASLOWLEVEL_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmedia.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmedia.h deleted file mode 100644 index 0e25ea9..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmedia.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Cypress West Bridge API header file (cyasmedia.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASMEDIA_H_ -#define _INCLUDED_CYASMEDIA_H_ - -#include "cyas_cplus_start.h" - - -/* Summary - Specifies a specific type of media supported by West Bridge - - Description - The West Bridge device supports five specific types of media - as storage/IO devices attached to it's S-Port. This type is - used to indicate the type of media being referenced in any - API call. -*/ -typedef enum cy_as_media_type { - /* Flash NAND memory (may be SLC or MLC) */ - cy_as_media_nand = 0x00, - /* An SD flash memory device */ - cy_as_media_sd_flash = 0x01, - /* An MMC flash memory device */ - cy_as_media_mmc_flash = 0x02, - /* A CE-ATA disk drive */ - cy_as_media_ce_ata = 0x03, - /* SDIO device. */ - cy_as_media_sdio = 0x04, - cy_as_media_max_media_value = 0x05 - -} cy_as_media_type; - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASMEDIA_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h deleted file mode 100644 index df7c2b6..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h +++ /dev/null @@ -1,1549 +0,0 @@ -/* Cypress West Bridge API header file (cyasmisc.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASMISC_H_ -#define _INCLUDED_CYASMISC_H_ - -#include "cyashal.h" -#include "cyastypes.h" -#include "cyasmedia.h" - -#include "cyas_cplus_start.h" - -#define CY_AS_LEAVE_STANDBY_DELAY_CLOCK (1) -#define CY_AS_RESET_DELAY_CLOCK (1) - -#define CY_AS_LEAVE_STANDBY_DELAY_CRYSTAL (5) -#define CY_AS_RESET_DELAY_CRYSTAL (5) - -/* The maximum number of buses supported */ -#define CY_AS_MAX_BUSES (2) - -/* The maximum number of storage devices supported per bus */ -#define CY_AS_MAX_STORAGE_DEVICES (1) - -#define CY_AS_FUNCTCBTYPE_DATA_MASK (0x60000000U) -#define CY_AS_FUNCTCBTYPE_TYPE_MASK (0x1FFFFFFFU) - -#define cy_as_funct_c_b_type_get_type(t) \ - ((cy_as_funct_c_b_type)((t) & CY_AS_FUNCTCBTYPE_TYPE_MASK)) -#define cy_as_funct_c_b_type_contains_data(t) \ - (((cy_as_funct_c_b_type)((t) & \ - CY_AS_FUNCTCBTYPE_DATA_MASK)) == CY_FUNCT_CB_DATA) - -/************************************** - * West Bridge Types - **************************************/ - -/* Summary - Specifies a handle to an West Bridge device - - Description - This type represents an opaque handle to an West Bridge device. - This handle is created via the CyAsMiscCreateDevice() function - and is used in all subsequent calls that communicate to the West - Bridge device. - - See Also - * CyAsMiscCreateDevice - * CyAsMiscDestroyDevice -*/ -typedef void *cy_as_device_handle; - -/* Summary - This data type gives the mode for the DACK# signal -*/ -typedef enum cy_as_device_dack_mode { - cy_as_device_dack_ack, /* Operate in the ACK mode */ - cy_as_device_dack_eob /* Operate in the EOB mode */ -} cy_as_device_dack_mode; - -/* Summary - This data structure gives the options for all hardware features. - - Description - This structure contains the information required to initialize the - West Bridge hardware. Any features of the device that can be - configured by the caller are specified here. - - See Also - * CyAsMiscConfigure -*/ -typedef struct cy_as_device_config { - /* If TRUE, the P port is running in SRAM mode. */ - cy_bool srammode; - /* If TRUE, the P port is synchronous, otherwise async */ - cy_bool sync; - /* If TRUE, DMA req will be delivered via the interrupt signal */ - cy_bool dmaintr; - /* Mode for the DACK# signal */ - cy_as_device_dack_mode dackmode; - /* If TRUE, the DRQ line is active high, otherwise active low */ - cy_bool drqpol; - /* If TRUE, the DACK line is active high, otherwise active low */ - cy_bool dackpol; - /* If TRUE, the clock is connected to a crystal, otherwise it is - connected to a clock */ - cy_bool crystal; -} cy_as_device_config; - - -/* Summary - Specifies a resource that can be owned by either the West Bridge - device or by the processor. - - Description - This enumerated type identifies a resource that can be owned - either by the West Bridge device, or by the processor attached to - the P port of the West Bridge device. - - See Also - * CyAsMiscAcquireResource - * CyAsMiscReleaseResource -*/ -typedef enum cy_as_resource_type { - cy_as_bus_u_s_b = 0, /* The USB D+ and D- pins */ - cy_as_bus_1 = 1, /* The SDIO bus */ - cy_as_bus_0 = 2 /* The NAND bus (not implemented) */ -} cy_as_resource_type; - -/* Summary - Specifies the reset type for a software reset operation. - - Description - When the West Bridge device is reset, there are two types of - reset that arE possible. This type indicates the type of reset - requested. - - Notes - Both of these reset types are software based resets; and are - distinct from a chip level HARD reset that is applied through - the reset pin on the West Bridge. - - The CyAsResetSoft type resets only the on-chip micro-controller - in the West Bridge. In this case, the previously loaded firmware - will continue running. However, the Storage and USB stack - operations will need to be restarted, as any state relating to - these would have been lost. - - The CyAsResetHard type resets the entire West Bridge chip, and will - need a fresh configuration and firmware download. - - See Also - * - */ - -typedef enum cy_as_reset_type { - /* Just resets the West Bridge micro-controller */ - cy_as_reset_soft, - /* Resets entire device, firmware must be reloaded and - the west bridge device must be re-initialized */ - cy_as_reset_hard -} cy_as_reset_type; - - - -/* Summary - This type specifies the polarity of the SD power pin. - - Description - Sets the SD power pin ( port C, bit 6) to active low or - active high. - -*/ - -typedef enum cy_as_misc_signal_polarity { - cy_as_misc_active_high, - cy_as_misc_active_low - -} cy_as_misc_signal_polarity; - - - -/* Summary - This type specifies the type of the data returned by a Function - Callback. - - Description - CY_FUNCT_CB_NODATA - This callback does not return any additional - information in the data field. - CY_FUNCT_CB_DATA - The data field is used, and the CyAsFunctCBType - will also contain the type of this data. - - See Also - CyAsFunctionCallback -*/ -typedef enum cy_as_funct_c_b_type { - CY_FUNCT_CB_INVALID = 0x0U, - /* Data from a CyAsMiscGetFirmwareVersion call. */ - CY_FUNCT_CB_MISC_GETFIRMWAREVERSION, - /* Data from a CyAsMiscHeartBeatControl call. */ - CY_FUNCT_CB_MISC_HEARTBEATCONTROL, - /* Data from a CyAsMiscAcquireResource call. */ - CY_FUNCT_CB_MISC_ACQUIRERESOURCE, - /* Data from a CyAsMiscReadMCURegister call. */ - CY_FUNCT_CB_MISC_READMCUREGISTER, - /* Data from a CyAsMiscWriteMCURegister call. */ - CY_FUNCT_CB_MISC_WRITEMCUREGISTER, - /* Data from a CyAsMiscSetTraceLevel call. */ - CY_FUNCT_CB_MISC_SETTRACELEVEL, - /* Data from a CyAsMiscStorageChanged call. */ - CY_FUNCT_CB_MISC_STORAGECHANGED, - /* Data from a CyAsMiscGetGpioValue call. */ - CY_FUNCT_CB_MISC_GETGPIOVALUE, - /* Data from a CyAsMiscSetGpioValue call. */ - CY_FUNCT_CB_MISC_SETGPIOVALUE, - /* Data from a CyAsMiscDownloadFirmware call. */ - CY_FUNCT_CB_MISC_DOWNLOADFIRMWARE, - /* Data from a CyAsMiscEnterStandby call. */ - CY_FUNCT_CB_MISC_ENTERSTANDBY, - /* Data from a CyAsMiscEnterSuspend call. */ - CY_FUNCT_CB_MISC_ENTERSUSPEND, - /* Data from a CyAsMiscLeaveSuspend call. */ - CY_FUNCT_CB_MISC_LEAVESUSPEND, - /* Data from a CyAsMiscReset call. */ - CY_FUNCT_CB_MISC_RESET, - /* Data from a CyAsMiscSetLowSpeedSDFreq or - * CyAsMiscSetHighSpeedSDFreq call. */ - CY_FUNCT_CB_MISC_SETSDFREQ, - /* Data from a CyAsMiscSwitchPnandMode call */ - CY_FUNCT_CB_MISC_RESERVELNABOOTAREA, - /* Data from a CyAsMiscSetSDPowerPolarity call */ - CY_FUNCT_CB_MISC_SETSDPOLARITY, - - /* Data from a CyAsStorageStart call. */ - CY_FUNCT_CB_STOR_START, - /* Data from a CyAsStorageStop call. */ - CY_FUNCT_CB_STOR_STOP, - /* Data from a CyAsStorageClaim call. */ - CY_FUNCT_CB_STOR_CLAIM, - /* Data from a CyAsStorageRelease call. */ - CY_FUNCT_CB_STOR_RELEASE, - /* Data from a CyAsStorageQueryMedia call. */ - CY_FUNCT_CB_STOR_QUERYMEDIA, - /* Data from a CyAsStorageQueryBus call. */ - CY_FUNCT_CB_STOR_QUERYBUS, - /* Data from a CyAsStorageQueryDevice call. */ - CY_FUNCT_CB_STOR_QUERYDEVICE, - /* Data from a CyAsStorageQueryUnit call. */ - CY_FUNCT_CB_STOR_QUERYUNIT, - /* Data from a CyAsStorageDeviceControl call. */ - CY_FUNCT_CB_STOR_DEVICECONTROL, - /* Data from a CyAsStorageSDRegisterRead call. */ - CY_FUNCT_CB_STOR_SDREGISTERREAD, - /* Data from a CyAsStorageCreatePartition call. */ - CY_FUNCT_CB_STOR_PARTITION, - /* Data from a CyAsStorageGetTransferAmount call. */ - CY_FUNCT_CB_STOR_GETTRANSFERAMOUNT, - /* Data from a CyAsStorageErase call. */ - CY_FUNCT_CB_STOR_ERASE, - /* Data from a CyAsStorageCancelAsync call. */ - CY_FUNCT_CB_ABORT_P2S_XFER, - /* Data from a CyAsUsbStart call. */ - CY_FUNCT_CB_USB_START, - /* Data from a CyAsUsbStop call. */ - CY_FUNCT_CB_USB_STOP, - /* Data from a CyAsUsbConnect call. */ - CY_FUNCT_CB_USB_CONNECT, - /* Data from a CyAsUsbDisconnect call. */ - CY_FUNCT_CB_USB_DISCONNECT, - /* Data from a CyAsUsbSetEnumConfig call. */ - CY_FUNCT_CB_USB_SETENUMCONFIG, - /* Data from a CyAsUsbGetEnumConfig call. */ - CY_FUNCT_CB_USB_GETENUMCONFIG, - /* Data from a CyAsUsbSetDescriptor call. */ - CY_FUNCT_CB_USB_SETDESCRIPTOR, - /* Data from a CyAsUsbGetDescriptor call. */ - CY_FUNCT_CB_USB_GETDESCRIPTOR, - /* Data from a CyAsUsbCommitConfig call. */ - CY_FUNCT_CB_USB_COMMITCONFIG, - /* Data from a CyAsUsbGetNak call. */ - CY_FUNCT_CB_USB_GETNAK, - /* Data from a CyAsUsbGetStall call. */ - CY_FUNCT_CB_USB_GETSTALL, - /* Data from a CyAsUsbSignalRemoteWakeup call. */ - CY_FUNCT_CB_USB_SIGNALREMOTEWAKEUP, - /* Data from a CyAnUsbClearDescriptors call. */ - CY_FUNCT_CB_USB_CLEARDESCRIPTORS, - /* Data from a CyAnUsbSetMSReportThreshold call. */ - CY_FUNCT_CB_USB_SET_MSREPORT_THRESHOLD, - /* Data from a CyAsMTPStart call. */ - CY_FUNCT_CB_MTP_START, - /* Data from a CyAsMTPStop call. */ - CY_FUNCT_CB_MTP_STOP, - /* Data from a CyAsMTPInitSendObject call. */ - CY_FUNCT_CB_MTP_INIT_SEND_OBJECT, - /* Data from a CyAsMTPCancelSendObject call. */ - CY_FUNCT_CB_MTP_CANCEL_SEND_OBJECT, - /* Data from a CyAsMTPInitGetObject call. */ - CY_FUNCT_CB_MTP_INIT_GET_OBJECT, - /* Data from a CyAsMTPCancelGetObject call. */ - CY_FUNCT_CB_MTP_CANCEL_GET_OBJECT, - /* Data from a CyAsMTPSendBlockTable call. */ - CY_FUNCT_CB_MTP_SEND_BLOCK_TABLE, - /* Data from a CyAsMTPStopStorageOnly call. */ - CY_FUNCT_CB_MTP_STOP_STORAGE_ONLY, - CY_FUNCT_CB_NODATA = 0x40000000U, - CY_FUNCT_CB_DATA = 0x20000000U -} cy_as_funct_c_b_type; - -/* Summary - This type specifies the general West Bridge function callback. - - Description - This callback is supplied as an argument to all asynchronous - functions in the API. It iS called after the asynchronous function - has completed. - - See Also - CyAsFunctCBType -*/ -typedef void (*cy_as_function_callback)( - cy_as_device_handle handle, - cy_as_return_status_t status, - uint32_t client, - cy_as_funct_c_b_type type, - void *data); - -/* Summary - This type specifies the general West Bridge event that has - occurred. - - Description - This type is used in the West Bridge misc callback function to - indicate the type of callback. - - See Also -*/ -typedef enum cy_as_misc_event_type { - /* This event is sent when West Bridge has finished - initialization and is ready to respond to API calls. */ - cy_as_event_misc_initialized = 0, - - /* This event is sent when West Bridge has left the - standby state and is ready to respond to commands again. */ - cy_as_event_misc_awake, - - /* This event is sent periodically from the firmware - to the processor. */ - cy_as_event_misc_heart_beat, - - /* This event is sent when the West Bridge has left the - suspend mode and is ready to respond to commands - again. */ - cy_as_event_misc_wakeup, - - /* This event is sent when the firmware image downloaded - cannot run on the active west bridge device. */ - cy_as_event_misc_device_mismatch -} cy_as_misc_event_type; - -/* Summary - This type is the type of a callback function that is called when a - West Bridge misc event occurs. - - Description - At times West Bridge needs to inform the P port processor of events - that have occurred. These events are asynchronous to the thread of - control on the P port processor and as such are generally delivered - via a callback function that is called as part of an interrupt - handler. This type defines the type of function that must be provided - as a callback function for West Bridge misc events. - - See Also - * CyAsMiscEventType -*/ -typedef void (*cy_as_misc_event_callback)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The event type being reported */ - cy_as_misc_event_type ev, - /* The data assocaited with the event being reported */ - void *evdata -); - -#ifndef __doxygen__ -/* Summary - This enum provides info of various firmware trace levels. - - Description - - See Also - * CyAsMiscSetTraceLevel -*/ -enum { - CYAS_FW_TRACE_LOG_NONE = 0, /* Log nothing. */ - CYAS_FW_TRACE_LOG_STATE, /* Log state information. */ - CYAS_FW_TRACE_LOG_CALLS, /* Log function calls. */ - CYAS_FW_TRACE_LOG_STACK_TRACE, /* Log function calls with args. */ - CYAS_FW_TRACE_MAX_LEVEL /* Max trace level sentinel. */ -}; -#endif - -/* Summary - This enum lists the controllable GPIOs of the West Bridge device. - - Description - The West Bridge device has GPIOs that can be used for user defined functions. - This enumeration lists the GPIOs that are available on the device. - - Notes - All of the GPIOs except UVALID can only be accessed when using West Bridge - firmware images that support only SD/MMC/MMC+ storage devices. This - functionality is not supported in firmware images that support NAND - storage. - - See Also - * CyAsMiscGetGpioValue - * CyAsMiscSetGpioValue - */ -typedef enum { - cy_as_misc_gpio_0 = 0, /* GPIO[0] pin */ - cy_as_misc_gpio_1, /* GPIO[1] pin */ - cy_as_misc_gpio__nand_CE, /* NAND_CE pin, output only */ - cy_as_misc_gpio__nand_CE2, /* NAND_CE2 pin, output only */ - cy_as_misc_gpio__nand_WP, /* NAND_WP pin, output only */ - cy_as_misc_gpio__nand_CLE, /* NAND_CLE pin, output only */ - cy_as_misc_gpio__nand_ALE, /* NAND_ALE pin, output only */ - /* SD_POW pin, output only, do not drive low while storage is active */ - cy_as_misc_gpio_SD_POW, - cy_as_misc_gpio_U_valid /* UVALID pin */ -} cy_as_misc_gpio; - -/* Summary - This enum lists the set of clock frequencies that are supported for - working with low speed SD media. - - Description - West Bridge firmware uses a clock frequency less than the maximum - possible rate for low speed SD media. This can be changed to a - setting equal to the maximum frequency as desired by the user. This - enumeration lists the different frequency settings that are - supported. - - See Also - * CyAsMiscSetLowSpeedSDFreq - */ -typedef enum cy_as_low_speed_sd_freq { - /* Approx. 21.82 MHz, default value */ - CY_AS_SD_DEFAULT_FREQ = 0, - /* 24 MHz */ - CY_AS_SD_RATED_FREQ -} cy_as_low_speed_sd_freq; - -/* Summary - This enum lists the set of clock frequencies that are supported - for working with high speed SD media. - - Description - West Bridge firmware uses a 48 MHz clock by default to interface - with high speed SD/MMC media. This can be changed to 24 MHz if - so desired by the user. This enum lists the different frequencies - that are supported. - - See Also - * CyAsMiscSetHighSpeedSDFreq - */ -typedef enum cy_as_high_speed_sd_freq { - CY_AS_HS_SD_FREQ_48, /* 48 MHz, default value */ - CY_AS_HS_SD_FREQ_24 /* 24 MHz */ -} cy_as_high_speed_sd_freq; - -/* Summary - Struct encapsulating all information returned by the - CyAsMiscGetFirmwareVersion call. - - Description - This struct encapsulates all return values from the asynchronous - CyAsMiscGetFirmwareVersion call, so that a single data argument - can be passed to the user provided callback function. - - See Also - * CyAsMiscGetFirmwareVersion - */ -typedef struct cy_as_get_firmware_version_data { - /* Return value for major version number for the firmware */ - uint16_t major; - /* Return value for minor version number for the firmware */ - uint16_t minor; - /* Return value for build version number for the firmware */ - uint16_t build; - /* Return value for media types supported in the current firmware */ - uint8_t media_type; - /* Return value to indicate the release or debug mode of firmware */ - cy_bool is_debug_mode; -} cy_as_get_firmware_version_data; - - -/***************************** - * West Bridge Functions - *****************************/ - -/* Summary - This function creates a new West Bridge device and returns a - handle to the device. - - Description - This function initializes the API object that represents the West - Bridge device and returns a handle to this device. This handle is - required for all West Bridge related functions to identify the - specific West Bridge device. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_OUT_OF_MEMORY -*/ -EXTERN cy_as_return_status_t -cy_as_misc_create_device( - /* Return value for handle to created device */ - cy_as_device_handle *handle_p, - /* The HAL specific tag for this device */ - cy_as_hal_device_tag tag - ); - -/* Summary - This functions destroys a previously created West Bridge device. - - Description - When an West Bridge device is created, an opaque handle is returned - that represents the device. This function destroys that handle and - frees all resources associated with the handle. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_STILL_RUNNING - The USB or STORAGE stacks are still - * running, they must be stopped before the device can be destroyed - * CY_AS_ERROR_DESTROY_SLEEP_CHANNEL_FAILED - the HAL layer failed to - * destroy a sleep channel -*/ -EXTERN cy_as_return_status_t -cy_as_misc_destroy_device( - /* Handle to the device to destroy */ - cy_as_device_handle handle - ); - -/* Summary - This function initializes the hardware for basic communication with - West Bridge. - - Description - This function initializes the hardware to establish basic - communication with the West Bridge device. This is always the first - function called to initialize communication with the West Bridge - device. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - the basic initialization was completed - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_IN_STANDBY - * CY_AS_ERROR_ALREADY_RUNNING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_NO_ANTIOCH - cannot find the West Bridge device - * CY_AS_ERROR_CREATE_SLEEP_CHANNEL_FAILED - - * the HAL layer falied to create a sleep channel - - See Also - * CyAsDeviceConfig -*/ -EXTERN cy_as_return_status_t -cy_as_misc_configure_device( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Configuration information */ - cy_as_device_config *config_p - ); - -/* Summary - This function returns non-zero if West Bridge is in standby and - zero otherwise. - - Description - West Bridge supports a standby mode. This function is used to - query West Bridge to determine if West Bridge is in a standby - mode. - - * Valid In Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE -*/ -EXTERN cy_as_return_status_t -cy_as_misc_in_standby( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Return value for standby state */ - cy_bool *standby - ); - -/* Summary - This function downloads the firmware to West Bridge device. - - Description - This function downloads firmware from a given location and with a - given size to the West Bridge device. After the firmware is - downloaded the West Bridge device is moved out of configuration - mode causing the firmware to be executed. It is an error to call - this function when the device is not in configuration mode. The - device is in configuration mode on power up and may be placed in - configuration mode after power up with a hard reset. - - Notes - The firmware must be on a word align boundary. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the firmware was successfully downloaded - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * was not configured - * CY_AS_ERROR_NOT_IN_CONFIG_MODE - * CY_AS_ERROR_INVALID_SIZE - the size of the firmware - * exceeded 32768 bytes - * CY_AS_ERROR_ALIGNMENT_ERROR - * CY_AS_ERROR_IN_STANDBY - trying to download - * while in standby mode - * CY_AS_ERROR_TIMEOUT - - See Also - * CyAsMiscReset -*/ -EXTERN cy_as_return_status_t -cy_as_misc_download_firmware( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Pointer to the firmware to be downloaded */ - const void *fw_p, - /* The size of the firmware in bytes */ - uint16_t size, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - - -/* Summary - This function returns the version number of the firmware running in - the West Bridge device. - - Description - This function queries the West Bridge device and retreives the - firmware version number. If the firmware is not loaded an error is - returned indicated no firmware has been loaded. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the firmware version number was retreived - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been downloaded - * to the device - * CY_AS_ERROR_IN_STANDBY - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a response - * from the West Bridge firmware -*/ -EXTERN cy_as_return_status_t -cy_as_misc_get_firmware_version( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Return values indicating the firmware version. */ - cy_as_get_firmware_version_data *data, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -#if !defined(__doxygen__) - -/* Summary - This function reads and returns the contents of an MCU accessible - register on the West Bridge. - - Description - This function requests the firmware to read and return the contents - of an MCU accessible register through the mailboxes. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the register content was retrieved. - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a response - * from the West Bridge firmware - * CY_AS_ERROR_INVALID_RESPONSE - the firmware build does not - * support this command. -*/ -EXTERN cy_as_return_status_t -cy_as_misc_read_m_c_u_register( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Address of the register to read */ - uint16_t address, - /* Return value for the MCU register content */ - uint8_t *value, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function writes to an MCU accessible register on the West Bridge. - - Description - This function requests the firmware to write a specified value to an - MCU accessible register through the mailboxes. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - This function is only for internal use by the West Bridge API layer. - Calling this function directly can cause device malfunction. - - Returns - * CY_AS_ERROR_SUCCESS - the register content was updated. - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a response - * from the West Bridge firmware - * CY_AS_ERROR_INVALID_RESPONSE - the firmware build does not support - * this command. -*/ -EXTERN cy_as_return_status_t -cy_as_misc_write_m_c_u_register( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Address of the register to write */ - uint16_t address, - /* Mask to be applied on the register contents. */ - uint8_t mask, - /* Data to be ORed with the register contents. */ - uint8_t value, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -#endif - -/* Summary - This function will reset the West Bridge device and software API. - - Description - This function will reset the West Bridge device and software API. - The reset operation can be a hard reset or a soft reset. A hard - reset will reset all aspects of the West Bridge device. The device - will enter the configuration state and the firmware will have to be - reloaded. The device will also have to be re-initialized. A soft - reset just resets the West Bridge micro-controller. - - * Valid In Asynchronous Callback: NO - - Notes - When a hard reset is issued, the firmware that may have been - previously loaded will be lost and any configuration information set - via CyAsMiscConfigureDevice() will be lost. This will be reflected - in the API maintained state of the device. In order to re-establish - communications with the West Bridge device, CyAsMiscConfigureDevice() - and CyAsMiscDownloadFirmware() must be called again. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the device has been reset - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_NOT_YET_SUPPORTED - current soft reset is not supported - * CY_AS_ERROR_ASYNC_PENDING - Reset is unable to flush pending async - * reads/writes in polling mode. - - - See Also - * CyAsMiscReset -*/ -EXTERN cy_as_return_status_t -cy_as_misc_reset( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The type of reset to perform */ - cy_as_reset_type type, - /* If true, flush all pending writes to mass storage - before performing the reset. */ - cy_bool flush, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function acquires a given resource. - - Description - There are resources in the system that are shared between the - West Bridge device and the processor attached to the P port of - the West Bridge device. This API provides a mechanism for the - P port processor to acquire ownership of a resource. - - Notes - The ownership of the resources controlled by CyAsMiscAcquireResource() - and CyAsMiscReleaseResource() defaults to a known state at hardware - reset. After the firmware is loaded and begins execution the state of - these resources may change. At any point if the P Port processor needs - to acquire a resource it should do so explicitly to be sure of - ownership. - - Returns - * CY_AS_ERROR_SUCCESS - the p port successfully acquired the - * resource of interest - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_INVALID_RESOURCE - * CY_AS_ERROR_RESOURCE_ALREADY_OWNED - the p port already - * owns this resource - * CY_AS_ERROR_NOT_ACQUIRED - the resource cannot be acquired - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a - * response from the West Bridge firmware - - See Also - * CyAsResourceType -*/ -EXTERN cy_as_return_status_t -cy_as_misc_acquire_resource( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The resource to acquire */ - cy_as_resource_type *resource, - /* If true, force West Bridge to release the resource */ - cy_bool force, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function releases a given resource. - - Description - There are resources in the system that are shared between the - West Bridge device and the processor attached to the P port of - the West Bridge device. This API provides a mechanism for the - P port processor to release a resource that has previously been - acquired via the CyAsMiscAcquireResource() call. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - the p port successfully released - * the resource of interest - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_INVALID_RESOURCE - * CY_AS_ERROR_RESOURCE_NOT_OWNED - the p port does not own the - * resource of interest - - See Also - * CyAsResourceType - * CyAsMiscAcquireResource -*/ -EXTERN cy_as_return_status_t -cy_as_misc_release_resource( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The resource to release */ - cy_as_resource_type resource - ); - -#ifndef __doxygen__ -/* Summary - This function sets the trace level for the West Bridge firmware. - - Description - The West Bridge firmware has the ability to store information - about the state and execution path of the firmware on a mass storage - device attached to the West Bridge device. This function configures - the specific mass storage device to be used and the type of information - to be stored. This state information is used for debugging purposes - and must be interpreted by a Cypress provided tool. - - *Trace Level* - The trace level indicates the amount of information to output. - * 0 = no trace information is output - * 1 = state information is output - * 2 = function call information is output - * 3 = function call, arguments, and return value information is output - - * Valid In Asynchronous Callback: NO - - Notes - The media device and unit specified in this call will be overwritten - and any data currently stored on this device and unit will be lost. - - * NOT IMPLEMENTED YET - - Returns - * CY_AS_ERROR_SUCCESS - the trace configuration has been - * successfully changed - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_NO_SUCH_UNIT - the unit specified does not exist - * CY_AS_ERROR_INVALID_TRACE_LEVEL - the trace level requested - * does not exist - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a - * response from the West Bridge firmware -*/ -EXTERN cy_as_return_status_t -cy_as_misc_set_trace_level( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The trace level */ - uint8_t level, - /* The bus for the output */ - cy_as_bus_number_t bus, - /* The device for the output */ - uint32_t device, - /* The unit for the output */ - uint32_t unit, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); -#endif - -/* Summary - This function places West Bridge into the low power standby mode. - - Description - This function places West Bridge into a low power (sleep) mode, and - cannot be called while the USB stack is active. This function first - instructs the West Bridge firmware that the device is about to be - placed into sleep mode. This allows West Bridge to complete any pending - storage operations. After the West Bridge device has responded that - pending operations are complete, the device is placed in standby mode. - - There are two methods of placing the device in standby mode. If the - WAKEUP pin of the West Bridge is connected to a GPIO on the processor, - the pin is de-asserted (via the HAL layer) and West Bridge enters into - a sleep mode. If the WAKEUP pin is not accessible, the processor can - write into the power management control/status register on the West - Bridge to put the device into sleep mode. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function completed and West Bridge - * is in sleep mode - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_ALREADY_STANDBY - the West Bridge device is already - * in sleep mode - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a response - * from the West Bridge firmware - * CY_AS_ERROR_NOT_SUPPORTED - the HAL layer does not support changing - * the WAKEUP pin - * CY_AS_ERROR_USB_RUNNING - The USB stack is still running when the - * EnterStandby call is made - * CY_AS_ERROR_ASYNC_PENDING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_SETTING_WAKEUP_PIN - * CY_AS_ERROR_ASYNC_PENDING - In polling mode EnterStandby can not - * be called until all pending storage read/write requests have - * finished. - - See Also - * CyAsMiscLeaveStandby -*/ -EXTERN cy_as_return_status_t -cy_as_misc_enter_standby_e_x_u( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* If true, use the wakeup pin, otherwise use the register */ - cy_bool pin, - /* Set true to enable specific usages of the - UVALID signal, please refer to AN xx or ERRATA xx */ - cy_bool uvalid_special, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function is provided for backwards compatibility. - - Description - Calling this function is the same as calling CyAsMiscEnterStandbyEx - with True for the lowpower parameter. - - See Also - * CyAsMiscEnterStandbyEx -*/ -EXTERN cy_as_return_status_t -cy_as_misc_enter_standby(cy_as_device_handle handle, - cy_bool pin, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function brings West Bridge out of sleep mode. - - Description - This function asserts the WAKEUP pin (via the HAL layer). This - brings the West Bridge out of the sleep state and allows the - West Bridge firmware to process the event causing the wakeup. - When all processing associated with the wakeup is complete, a - callback function is called to tell the P port software that - the firmware processing associated with wakeup is complete. - - * Valid In Asynchronous Callback: NO - - Returns: - * CY_AS_ERROR_SUCCESS - the function completed and West Bridge - * is in sleep mode - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_SETTING_WAKEUP_PIN - * CY_AS_ERROR_NOT_IN_STANDBY - the West Bridge device is not in - * the sleep state - * CY_AS_ERROR_TIMEOUT - there was a timeout waiting for a - * response from the West Bridge firmware - * CY_AS_ERROR_NOT_SUPPORTED - the HAL layer does not support - * changing the WAKEUP pin - - See Also - * CyAsMiscEnterStandby -*/ -EXTERN cy_as_return_status_t -cy_as_misc_leave_standby( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The resource causing the wakeup */ - cy_as_resource_type resource - ); - -/* Summary - This function registers a callback function to be called when an - asynchronous West Bridge MISC event occurs. - - Description - When asynchronous misc events occur, a callback function can be - called to alert the calling program. This functions allows the - calling program to register a callback. - - * Valid In Asynchronous Callback: NO - - Returns: - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE -*/ -EXTERN cy_as_return_status_t -cy_as_misc_register_callback( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The function to call */ - cy_as_misc_event_callback callback - ); - -/* Summary - This function sets the logging level for log messages. - - Description - The API can print messages via the CyAsHalPrintMessage capability. - This function sets the level of detail seen when printing messages - from the API. - - * Valid In Asynchronous Callback:NO -*/ -EXTERN void -cy_as_misc_set_log_level( - /* Level to set, 0 is fewer messages, 255 is all */ - uint8_t level - ); - - -/* Summary - This function tells West Bridge that SD or MMC media has been - inserted or removed. - - Description - In some hardware configurations, SD or MMC media detection is - handled outside of the West Bridge device. This function is called - when a change is detected to inform the West Bridge firmware to check - for storage media changes. - - * Valid In Asynchronous Callback: NO - - Returns: - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_IN_STANDBY - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsMiscStorageChanged - -*/ -EXTERN cy_as_return_status_t -cy_as_misc_storage_changed( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function instructs the West Bridge firmware to start/stop - sending periodic heartbeat messages to the processor. - - Description - The West Bridge firmware can send heartbeat messages through the - mailbox register once every 500 ms. This message can be an overhead - as it causes regular Mailbox interrupts to happen, and is turned - off by default. The message can be used to test and verify that the - West Bridge firmware is alive. This API can be used to enable or - disable the heartbeat message. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - the function completed successfully - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured yet - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded to - * the West Bridge device - -*/ -EXTERN cy_as_return_status_t -cy_as_misc_heart_beat_control( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Message enable/disable selection */ - cy_bool enable, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function gets the current state of a GPIO pin on the - West Bridge device. - - Description - The West Bridge device has GPIO pins that can be used for user - defined functions. This function gets the current state of the - specified GPIO pin. Calling this function will configure the - corresponding pin as an input. - - * Valid In Asynchronous Callback: NO - - Notes - Only GPIO[0], GPIO[1] and UVALID pins can be used as GP inputs. - Of these pins, only the UVALID pin is supported by firmware images - that include NAND storage support. - - Returns - * CY_AS_ERROR_SUCCESS - the function completed successfully - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured yet - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded - * to the West Bridge device - * CY_AS_ERROR_BAD_INDEX - an invalid GPIO was specified - * CY_AS_ERROR_NOT_SUPPORTED - this feature is not supported - * by the firmware - - See Also - * CyAsMiscGpio - * CyAsMiscSetGpioValue - */ -EXTERN cy_as_return_status_t -cy_as_misc_get_gpio_value( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Id of the GPIO pin to query */ - cy_as_misc_gpio pin, - /* Current value of the GPIO pin */ - uint8_t *value, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - This function updates the state of a GPIO pin on the West - Bridge device. - - Description - The West Bridge device has GPIO pins that can be used for - user defined functions. This function updates the output - value driven on a specified GPIO pin. Calling this function - will configure the corresponding pin as an output. - - * Valid In Asynchronous Callback: NO - - Notes - All of the pins listed under CyAsMiscGpio can be used as GP - outputs. This feature is note supported by firmware images - that include NAND storage device support. - - Returns - * CY_AS_ERROR_SUCCESS - the function completed successfully - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured yet - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded - * to the West Bridge device - * CY_AS_ERROR_BAD_INDEX - an invalid GPIO was specified - * CY_AS_ERROR_NOT_SUPPORTED - this feature is not supported - * by firmware. - - See Also - * CyAsMiscGpio - * CyAsMiscGetGpioValue - */ -EXTERN cy_as_return_status_t -cy_as_misc_set_gpio_value( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Id of the GPIO pin to set */ - cy_as_misc_gpio pin, - /* Value to be set on the GPIO pin */ - uint8_t value, - /* Callback to call when the operation is complete. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - Set the West Bridge device in the low power suspend mode. - - Description - The West Bridge device has a low power suspend mode where the USB - core and the internal microcontroller are powered down. This - function sets the West Bridge device into this low power mode. - This mode can only be entered when there is no active USB - connection; i.e., when USB has not been connected or is suspended; - and there are no pending USB or storage asynchronous calls. The - device will exit the suspend mode and resume handling USB and - processor requests when any activity is detected on the CE#, D+/D- - or GPIO[0] lines. - - * Valid In Asynchronous Callback: NO - - Notes - The GPIO[0] pin needs to be configured as an input for the gpio - wakeup to work. This flag should not be enabled if the pin is - being used as a GP output. - - Returns - * CY_AS_ERROR_SUCCESS - the device was placed in suspend mode. - * CY_AS_ERROR_INVALID_HANDLE - the West Bridge handle passed - * in is invalid. - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * yet been configured. - * CY_AS_ERROR_NO_FIRMWARE - no firmware has been downloaded - * to the device. - * CY_AS_ERROR_IN_STANDBY - the device is already in sleep mode. - * CY_AS_ERROR_USB_CONNECTED - the USB connection is active. - * CY_AS_ERROR_ASYNC_PENDING - asynchronous storage/USB calls - * are pending. - * CY_AS_ERROR_OUT_OF_MEMORY - failed to allocate memory for - * the operation. - * CY_AS_ERROR_INVALID_RESPONSE - command not recognised by - * firmware. - - See Also - * CyAsMiscLeaveSuspend - */ -EXTERN cy_as_return_status_t -cy_as_misc_enter_suspend( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Control the USB wakeup source */ - cy_bool usb_wakeup_en, - /* Control the GPIO[0] wakeup source */ - cy_bool gpio_wakeup_en, - /* Callback to call when suspend mode entry is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - Wake up the West Bridge device from suspend mode. - - Description - This call wakes up the West Bridge device from suspend mode, - and makes it ready for accepting other commands from the API. - A CyAsEventMiscWakeup event will be delivered to the callback - registered with CyAsMiscRegisterCallback to indicate that the - wake up is complete. - - The CyAsEventMiscWakeup event will also be delivered if the - wakeup happens due to USB or GPIO activity. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - the device was woken up from - * suspend mode. - * CY_AS_ERROR_INVALID_HANDLE - invalid device handle - * passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has - * not been configured. - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been - * downloaded to the device. - * CY_AS_ERROR_NOT_IN_SUSPEND - the device is not in - * suspend mode. - * CY_AS_ERROR_OUT_OF_MEMORY - failed to allocate memory - * for the operation. - * CY_AS_ERROR_TIMEOUT - failed to wake up the device. - - See Also - * CyAsMiscEnterSuspend - */ -EXTERN cy_as_return_status_t -cy_as_misc_leave_suspend( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Callback to call when device has resumed operation. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - Reserve first numzones zones of nand device for storing - processor boot image. LNA firmware works on the first - numzones zones of nand to enable the processor to boot. - - Description - This function reserves first numzones zones of nand device - for storing processor boot image. This fonction MUST be - completed before starting the storage stack for the setting - to be taken into account. - - * Valid In Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_SUCCESS- zones are reserved. - -*/ -EXTERN cy_as_return_status_t -cy_as_misc_reserve_l_n_a_boot_area( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* number of nand zones to reserve */ - uint8_t numzones, - /* Callback to call when device has resumed operation. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* Summary - Select the clock frequency to be used when talking to low - speed (non-high speed) SD media. - - Description - West Bridge firmware uses a clock frequency less than the - maximum possible rate for low speed SD media. This function - selects the frequency setting from between the default speed - and the maximum speed. This fonction MUST be completed before - starting the storage stack for the setting to be taken into - account. - - * Valid in Asynchronous Callback: Yes (if cb is non-zero) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the operation completed successfully. - * CY_AS_ERROR_INVALID_HANDLE - invalid device handle passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not been - * configured. - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded - * to the device. - * CY_AS_ERROR_OUT_OF_MEMORY - failed to allocate memory for - * the operation. - * CY_AS_ERROR_IN_SUSPEND - West Bridge is in low power suspend - * mode. - * CY_AS_ERROR_INVALID_PARAMETER - invalid frequency setting - * desired. - * CY_AS_ERROR_TIMEOUT - West Bridge device did not respond to - * the operation. - * CY_AS_ERROR_INVALID_RESPONSE - active firmware does not support - * the operation. - - See Also - * CyAsLowSpeedSDFreq - */ -EXTERN cy_as_return_status_t -cy_as_misc_set_low_speed_sd_freq( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Frequency setting desired for low speed SD cards */ - cy_as_low_speed_sd_freq setting, - /* Callback to call on completion */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - Select the clock frequency to be used when talking to high speed - SD/MMC media. - - Description - West Bridge firmware uses a 48 MHz clock to interface with high - speed SD/MMC media. This clock rate can be restricted to 24 MHz - if desired. This function selects the frequency setting to be - used. This fonction MUST be completed before starting the storage - stack for the setting to be taken into account. - - * Valid in Asynchronous Callback: Yes (if cb is non-zero) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the operation completed successfully. - * CY_AS_ERROR_INVALID_HANDLE - invalid device handle passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not been - * configured. - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded to - * the device. - * CY_AS_ERROR_OUT_OF_MEMORY - failed to allocate memory for the - * operation. - * CY_AS_ERROR_IN_SUSPEND - West Bridge is in low power suspend mode. - * CY_AS_ERROR_INVALID_PARAMETER - invalid frequency setting desired. - * CY_AS_ERROR_TIMEOUT - West Bridge device did not respond to the - * operation. - * CY_AS_ERROR_INVALID_RESPONSE - active firmware does not support - * the operation. - - See Also - * CyAsLowSpeedSDFreq - */ -EXTERN cy_as_return_status_t -cy_as_misc_set_high_speed_sd_freq( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Frequency setting desired for high speed SD cards */ - cy_as_high_speed_sd_freq setting, - /* Callback to call on completion */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); -/* Summary - Select the polarity of the SD_POW output driven by West Bridge. - - Description - The SD_POW signal driven by West Bridge can be used to control - the supply of Vcc to the SD/MMC media connected to the device. - This signal is driven as an active high signal by default. This - function can be used to change the polarity of this signal if - required. This fonction MUST be completed before starting the - storage stack for the setting to be taken into account. - - * Valid in Asynchronous Callback: Yes (if cb is non-zero) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the operation completed successfully. - * CY_AS_ERROR_INVALID_HANDLE - invalid device handle passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not been - * configured. - * CY_AS_ERROR_NO_FIRMWARE - firmware has not been downloaded - * to the device. - * CY_AS_ERROR_OUT_OF_MEMORY - failed to allocate memory for - * the operation. - * CY_AS_ERROR_IN_SUSPEND - West Bridge is in low power - * suspend mode. - * CY_AS_ERROR_INVALID_PARAMETER - invalid frequency setting - * desired. - * CY_AS_ERROR_TIMEOUT - West Bridge device did not respond to - * the operation. - * CY_AS_ERROR_INVALID_RESPONSE - active firmware does not - * support the operation. - - See Also - * CyAsMiscSignalPolarity - */ -EXTERN cy_as_return_status_t -cy_as_misc_set_sd_power_polarity( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Desired polarity setting to the SD_POW signal. */ - cy_as_misc_signal_polarity polarity, - /* Callback to call on completion. */ - cy_as_function_callback cb, - /* Client data to be passed to the callback. */ - uint32_t client - ); - -/* For supporting deprecated functions */ -#include "cyasmisc_dep.h" - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASMISC_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc_dep.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc_dep.h deleted file mode 100644 index 8b258ef..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc_dep.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Cypress West Bridge API header file (cyasmisc_dep.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* This header will contain Antioch specific declaration - * of the APIs that are deprecated in Astoria SDK. This is - * for maintaining backward compatibility with prior releases - * of the Antioch SDK. - */ -#ifndef __INCLUDED_CYASMISC_DEP_H__ -#define __INCLUDED_CYASMISC_DEP_H__ - -#ifndef __doxygen__ - -EXTERN cy_as_return_status_t -cy_as_misc_acquire_resource_dep(cy_as_device_handle handle, - cy_as_resource_type resource, - cy_bool force); -EXTERN cy_as_return_status_t -cy_as_misc_get_firmware_version_dep(cy_as_device_handle handle, - uint16_t *major, - uint16_t *minor, - uint16_t *build, - uint8_t *media_type, - cy_bool *is_debug_mode); -EXTERN cy_as_return_status_t -cy_as_misc_set_trace_level_dep(cy_as_device_handle handle, - uint8_t level, - cy_as_media_type media, - uint32_t device, - uint32_t unit, - cy_as_function_callback cb, - uint32_t client); -#endif /*__doxygen*/ - -#endif /*__INCLUDED_CYANSTORAGE_DEP_H__*/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmtp.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmtp.h deleted file mode 100644 index 05d3449..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmtp.h +++ /dev/null @@ -1,646 +0,0 @@ -/* Cypress West Bridge API header file (cyasmtp.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASMTP_H_ -#define _INCLUDED_CYASMTP_H_ - -#include "cyasmisc.h" - -#include "cyas_cplus_start.h" - -/*@@Media Transfer Protocol (MTP) Overview - Summary - The MTP API has been designed to allow MTP enabled West Bridge - devices to implement the MTP protocol while maintaining high - performance. West Bridge has the capability to enter into a - Turbo mode during a MTP SendObject or GetObject operation - enabling it to directly stream the data into or out of the - attached SD card with minimal involvement from the Processor. - - Description - The MTP API is designed to act as a pass through implementation - of the MTP protocol for all operations. Each MTP transaction - received from the Host is passed through West Bridge and along - to the Processor. The Processor can then respond to the - transaction and pass data and/or responses back to the Host - through West Bridge. - - The MTP API also allows for a high speed handling of MTP - SendObject and GetObject operations, referred to as Turbo MTP. - During a Turbo MTP operation West Bridge is responsible for - reading or writing the data for the MTP operation directly from - or to the SD card with minimal interaction from the Processor. - The is done by having the Processor transfer a Block Table - to West Bridge which contains the locations on the SD card that - need to be read or written. During the handling of a Turbo - Operation the Processor will then only periodically need to - send a new Block Table to West Bridge when the first is used up. - See the CyAsMTPInitSendObject and CyAsMTPInitGetObject functions - for more details. - - In order to enable the MTP API you must first have a MTP enabled - West Bridge loaded with MTP firmware. You then must start the USB - and Storage APIs before starting the MTP API. See CyAsMTPStart - for more details. -*/ - -/*@@Endpoints - Summary - When using MTP firmware endpoints 2 and 6 are dedicated - to bulk MTP traffic and endpoint 1 is available for MTP - events. - - Description - When using a MTP enabled West Brdige device endpoints 2 and - 6 are made available for use to implement the MTP protocol. - These endpoints have a few special restrictions noted below - but otherwise the existing USB APIs can be used normally with - these endpoints. - - 1. CyAsUsbSetNak, CyAsUsbClearNak, and CyAsUsbGetNak are - disabled for these endpoints - 2. During a turbo operation CyAsUsbSetStall, CyAsUsbClearStall, - and CyAsUsbGetStall are disabled. - -*/ - - -/* Summary - This constants defines the maximum number of - entries in the Block Table used to describe - the locations for Send/GetObject operations. - - See Also - * CyAsMtpSendObject - * CyAsMtpGetObject -*/ -#define CY_AS_MAX_BLOCK_TABLE_ENTRIES 64 - -/* Summary - Endpoint to be used for MTP reads from the USB host. - */ -#define CY_AS_MTP_READ_ENDPOINT (2) - -/* Summary - Endpoint to be used fro MTP writes to the USB host. - */ -#define CY_AS_MTP_WRITE_ENDPOINT (6) - -/****************************************** - * MTP Types - ******************************************/ - -/* Summary - The BlockTable used for turbo operations. - - Description - This struct is used to specify the blocks - to be used for both read/write and send/getObject - operations. - - The start block is a starting Logical Block Address - and num block is the number of blocks in that contiguous - region. - - start_blocks[i]->[-------] <- start_blocks[i] + num_blocks[i] - - If you need fewer than CY_AS_MAX_BLOCK_TABLE_ENTRIES - the remainder should be left empty. Empty is defined - as num_blocks equal to 0. - - See Also - * CyAsMTPInitSendObject - * CyAsMTPInitGetObject - -*/ -typedef struct cy_as_mtp_block_table { - uint32_t start_blocks[CY_AS_MAX_BLOCK_TABLE_ENTRIES]; - uint16_t num_blocks[CY_AS_MAX_BLOCK_TABLE_ENTRIES]; -} cy_as_mtp_block_table; - -/* Summary - This type specifies the type of MTP event that has occurred. - - Description - MTP events are used to communicate that West Bridge has - either finished the handling of the given operation, or - that it requires additional data to complete the operation. - - In no case does West Bridge send any MTP protocol responses, - this always remain the responsibility of the client. - - See Also - * CyAsMTPInitSendObject - * CyAsMTPInitGetObject - * CyAsMTPSendBlockTable - -*/ -typedef enum cy_as_mtp_event { - /* This event is sent when West Bridge - has finished writing the data from a - send_object. west bridge will -not- send - the MTP response. */ - cy_as_mtp_send_object_complete, - - /* This event is sent when West Bridge - has finished sending the data for a - get_object operation. west bridge will - -not- send the MTP response. */ - cy_as_mtp_get_object_complete, - - /* This event is called when West Bridge - needs a new block_table. this is only a - notification, to transfer a block_table - to west bridge the cy_as_mtp_send_block_table - use the function. while west bridge is waiting - for a block_table during a send_object it - may need to NAK the endpoint. it is important - that the cy_as_mtp_send_block_table call is made - in a timely manner as eventually a delay - will result in an USB reset. this event has - no data */ - cy_as_mtp_block_table_needed -} cy_as_mtp_event; - -/* Summary - Data for the CyAsMTPSendObjectComplete event. - - Description - Notification that a SendObject operation has been - completed. The status of the operation is given - (to distinguish between a cancelled and a success - for example) as well as the block count. The blocks - are used in order based on the current block table. - If more than one block table was used for a given - SendObject the count will include the total number - of blocks written. - - This callback will be made only once per SendObject - operation and it will only be called after all of - the data has been committed to the SD card. - - See Also - * CyAsMTPEvent - - */ -typedef struct cy_as_mtp_send_object_complete_data { - cy_as_return_status_t status; - uint32_t byte_count; - uint32_t transaction_id; -} cy_as_mtp_send_object_complete_data; - -/* Summary - Data for the CyAsMTPGetObjectComplete event. - - Description - Notification that a GetObject has finished. This - event allows the P side to know when to send the MTP - response for the GetObject operation. - - See Also - * CyAsMTPEvent - -*/ -typedef struct cy_as_mtp_get_object_complete_data { - cy_as_return_status_t status; - uint32_t byte_count; -} cy_as_mtp_get_object_complete_data; - -/* Summary - MTP Event callback. - - Description - Callback used to communicate that a SendObject - operation has finished. - - See Also - * CyAsMTPEvent -*/ -typedef void (*cy_as_mtp_event_callback)( - cy_as_device_handle handle, - cy_as_mtp_event evtype, - void *evdata - ); - -/* Summary - This is the callback function called after asynchronous API - functions have completed. - - Description - When calling API functions from callback routines (interrupt - handlers usually) the async version of these functions must - be used. This callback is called when an asynchronous API - function has completed. -*/ -typedef void (*cy_as_mtp_function_callback)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The error status of the operation */ - cy_as_return_status_t status, - /* A client supplied 32 bit tag */ - uint32_t client -); - -/************************************** - * MTP Functions - **************************************/ - -/* Summary - This function starts the MTP stack. - - Description - Initializes West Bridge for MTP activity and registers the MTP - event callback. - - Before calling CyAsMTPStart, CyAsUsbStart and CyAsStorageStart must be - called (in either order). - - MTPStart must be called before the device is enumerated. Please - see the documentation for CyAsUsbSetEnumConfig and CyAsUsbEnumControl - for details on enumerating a device for MTP. - - Calling MTPStart will not affect any ongoing P<->S traffic. - - This requires a MTP firmware image to be loaded on West Bridge. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_IN_SUSPEND - * CY_AS_ERROR_INVALID_IN_CALLBACK - * CY_AS_ERROR_STARTSTOP_PENDING - * CY_AS_ERROR_NOT_RUNNING - CyAsUsbStart or CyAsStorageStart - * have not been called - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - - See Also - * CyAsMTPStop - * CyAsUsbStart - * CyAsStorageStart - * CyAsUsbSetEnumConfig - * CyAsUsbEnumControl -*/ -cy_as_return_status_t -cy_as_mtp_start( - cy_as_device_handle handle, - cy_as_mtp_event_callback event_c_b, - cy_as_function_callback cb, - uint32_t client - ); - - -/* Summary - This function stops the MTP stack. - - Description - Stops all MTP activity. Any ongoing transfers are - canceled. - - This will not cause a UsbDisconnect but all - MTP activity (both pass through and turbo) will - stop. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_IN_SUSPEND - * CY_AS_ERROR_INVALID_IN_CALLBACK - * CY_AS_ERROR_STARTSTOP_PENDING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - - See Also - * CyAsMTPStart -*/ -cy_as_return_status_t -cy_as_mtp_stop( - cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function sets up a Turbo SendObject operation. - - Description - Calling this function will setup West Bridge to - enable Tubo handling of the next SendObject - operation received. This will pass down the initial - block table to the firmware and setup a direct u->s - write for the SendObject operation. - - If this function is not called before a SendObject - operation is seen the SendObject operation and data - will be passed along to the P port like any other MTP - command. It would then be the responsibility of the - client to perform a normal StorageWrite call to - store the data on the SD card. N.B. This will be - very slow compared with the Turbo handling. - - The completion of this function only signals that - West Bridge has been set up to receive the next SendObject - operation. When the SendObject operation has been fully - handled and the data written to the SD card a separate - event will be triggered. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_IN_SUSPEND - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_ASYNC_PENDING - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - - See Also - * CyAsMTPCancelSendObject - * CyAsMTPInitGetObject - * CyAsMTPEvent - * CyAsMTPSendBlockTable -*/ -cy_as_return_status_t -cy_as_mtp_init_send_object( - cy_as_device_handle handle, - cy_as_mtp_block_table *blk_table, - uint32_t num_bytes, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function cancels an ongoing MTP operation. - - Description - Causes West Bridge to cancel an ongoing SendObject - operation. Note this is only a cancel to West Bridge, - the MTP operation still needs to be canceled by - sending a response. - - West Bridge will automatically set a Stall on the endpoint - when the cancel is received. - - This function is only valid after CyAsMTPInitSendObject - has been called, but before the CyAsMTPSendObjectComplete - event has been sent. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - * CY_AS_ERROR_NO_OPERATION_PENDING - - See Also - * CyAsMTPInitSendObject -*/ -cy_as_return_status_t -cy_as_mtp_cancel_send_object( - cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function sets up a turbo GetObject operation. - - Description - Called by the P in response to a GetObject - operation. This provides West Bridge with the block - addresses for the Object data that needs to be - transferred. - - It is the responsibility of the Processor to send the MTP - operation before calling CyAsMTPInitGetObject. West Bridge - will then send the data phase of the transaction, - automatically creating the required container for Data. - Once all of the Data has been transferred a callback will - be issued to inform the Processor that the Data phase has - completed allowing it to send the required MTP response. - - If an entire Block Table is used then after the - last block is transferred the CyAsMTPBtCallback - will be called to allow an additional Block Table(s) - to be specified. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_IN_SUSPEND - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_ASYNC_PENDING - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - - See Also - * CyAsMTPInitSendObject - * CyAsMTPCancelGetObject - * CyAsMTPEvent - * CyAsMTPSendBlockTable -*/ -cy_as_return_status_t -cy_as_mtp_init_get_object( - cy_as_device_handle handle, - cy_as_mtp_block_table *table_p, - uint32_t num_bytes, - uint32_t transaction_id, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function cancels an ongoing turbo GetObject - operation. - - Description - Causes West Bridge to cancel an ongoing GetObject - operation. Note this is only a cancel to West Bridge, - the MTP operation still needs to be canceled by - sending a response. - - This function is only valid after CyAsMTPGetSendObject - has been called, but before the CyAsMTPGetObjectComplete - event has been sent. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - * CY_AS_ERROR_NO_OPERATION_PENDING - - See Also - * CyAsMTPInitGetObject -*/ -cy_as_return_status_t -cy_as_mtp_cancel_get_object( - cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function is used to transfer a BlockTable as part of - an ongoing MTP operation. - - Description - This function is called in response to the - CyAsMTPBlockTableNeeded event. This allows the client to - pass in a BlockTable structure to West Bridge. - - The memory associated with the table will be copied and - can be safely disposed of when the function returns if - called synchronously, or when the callback is made if - called asynchronously. - - This function is used for both SendObject and GetObject - as both can generate the CyAsMTPBlockTableNeeded event. - - Returns - * CY_AS_ERROR_SUCCESS - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_NOT_CONFIGURED - * CY_AS_ERROR_NO_FIRMWARE - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_IN_SUSPEND - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_ASYNC_PENDING - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_SUPPORTED - West Bridge is not running - * firmware with MTP support - - See Also - * CyAsMTPInitSendObject - * CyAsMTPInitGetObject -*/ -cy_as_return_status_t -cy_as_mtp_send_block_table( - cy_as_device_handle handle, - cy_as_mtp_block_table *table, - cy_as_function_callback cb, - uint32_t client - ); - -/* Summary - This function is used to mark the start of a storage - read/write burst from the P port processor. - - Description - This function is used to mark the start of a storage - read/write burst from the processor. All USB host access - into the mass storage / MTP endpoints will be blocked - while the read/write burst is ongoing, and will be allowed - to resume only after CyAsMTPStorageOnlyStop is called. - The burst mode is used to reduce the firmware overhead - due to configuring the internal data paths repeatedly, - and can help improve performance when a sequence of - read/writes is performed in a burst. - - This function will not generate a special mailbox request, - it will only set a flag on the next Storage Read/Write - operation. Until such a call is made West Bridge will - continue to accept incoming packets from the Host. - - * Valid in Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_INVALID_HANDLE - Invalid West Bridge device - * handle was passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not - * been configured. - * CY_AS_ERROR_NO_FIRMWARE - Firmware is not active on West - * Bridge device. - * CY_AS_ERROR_NOT_RUNNING - Storage stack is not running. - * CY_AS_ERROR_SUCCESS - Burst mode has been started. - - See Also - * CyAsStorageReadWriteBurstStop - */ -cy_as_return_status_t -cy_as_mtp_storage_only_start( - /* Handle to the West Bridge device. */ - cy_as_device_handle handle - ); - -/* Summary - This function is used to mark the end of a storage read/write - burst from the P port processor. - - Description - This function is used to mark the end of a storage read/write - burst from the processor. At this point, USB access to the - mass storage / MTP endpoints on the West Bridge device will be - re-enabled. - - * Valid in Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_INVALID_HANDLE - Invalid West Bridge device handle - * was passed in. - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not been - * configured. - * CY_AS_ERROR_NO_FIRMWARE - Firmware is not active on West Bridge - * device. - * CY_AS_ERROR_NOT_RUNNING - Storage stack is not running. - * CY_AS_ERROR_INVALID_IN_CALLBACK - This API cannot be called - * from a callback. - * CY_AS_ERROR_OUT_OF_MEMORY - Failed to allocate memory to - * process the request. - * CY_AS_ERROR_TIMEOUT - Failed to send request to firmware. - * CY_AS_ERROR_SUCCESS - Burst mode has been stopped. - - See Also - * CyAsStorageReadWriteBurstStart - */ -cy_as_return_status_t -cy_as_mtp_storage_only_stop( - /* Handle to the West Bridge device. */ - cy_as_device_handle handle, - cy_as_function_callback cb, - uint32_t client - ); - -#include "cyas_cplus_end.h" - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h deleted file mode 100644 index 773b645..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h +++ /dev/null @@ -1,3838 +0,0 @@ -/* Cypress West Bridge API header file (cyasprotocol.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASPROTOCOL_H_ -#define _INCLUDED_CYASPROTOCOL_H_ - -/* - * Constants defining the per context buffer sizes - */ -#ifndef __doxygen__ -#define CY_CTX_GEN_MAX_DATA_SIZE (8) -#define CY_CTX_RES_MAX_DATA_SIZE (8) -#define CY_CTX_STR_MAX_DATA_SIZE (64) -#define CY_CTX_USB_MAX_DATA_SIZE (130 + 23) -#define CY_CTX_TUR_MAX_DATA_SIZE (12) -#endif - -/* Summary - This response indicates a command has been processed - and returned a status. - - Direction - West Bridge -> P Port Processor - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = all - * Response Code = 0 - - D0 - * 0 = success (CY_AS_ERROR_SUCCESS) - * non-zero = error code - - Description - This response indicates that a request was processed - and no data was generated as a result of the request - beyond a single 16 bit status value. This response - contains the 16 bit data value. - */ -#define CY_RESP_SUCCESS_FAILURE (0) - -/* Summary - This response indicates an invalid request was sent - - Direction - West Bridge -> P Port Processor - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = all - * Response Code = 1 - - D0 - * Mailbox contents for invalid request - - Description - This response is returned when a request is sent - that contains an invalid - context or request code. -*/ -#define CY_RESP_INVALID_REQUEST (1) - -/* Summary - This response indicates a request of invalid length was sent - - Direction - West Bridge -> P Port Processor - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = all - * Response Code = 2 - - D0 - * Mailbox contenxt for invalid request - * Length for invalid request - - Description - The software API and firmware sends requests across the - P Port to West Bridge interface on different contexts. - Each contexts has a maximum size of the request packet - that can be received. The size of a request can be - determined during the first cycle of a request transfer. - If the request is larger than can be handled by the - receiving context this response is returned. Note that - the complete request is received before this response is - sent, but that the request is dropped after this response - is sent. -*/ -#define CY_RESP_INVALID_LENGTH (2) - - -/* Summary - This response indicates a request was made to an - invalid storage address. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = all - * Response Code = 0 - - D0 - Bits 15 - 12 : Media Type - * 0 = NAND - * 1 = SD Flash - * 2 = MMC Flash - * 3 = CE-ATA - - Bits 11 - 8 : Zero based device index - - Bits 7 - 0 : Zero based unit index - - D1 - Upper 16 bits of block address - - D2 - Lower 16 bits of block address - - D3 - Portion of address that is invalid - * 0 = Media Type - * 1 = Device Index - * 2 = Unit Index - * 3 = Block Address - - Description - This response indicates a request to an invalid storage media - address - */ -#define CY_RESP_NO_SUCH_ADDRESS (3) - - -/******************************************************/ - -/*@@General requests - Summary - The general requests include: - * CY_RQT_GET_FIRMWARE_VERSION - * CY_RQT_SET_TRACE_LEVEL - * CY_RQT_INITIALIZATION_COMPLETE - * CY_RQT_READ_MCU_REGISTER - * CY_RQT_WRITE_MCU_REGISTER - * CY_RQT_STORAGE_MEDIA_CHANGED - * CY_RQT_CONTROL_ANTIOCH_HEARTBEAT - * CY_RQT_PREPARE_FOR_STANDBY - * CY_RQT_ENTER_SUSPEND_MODE - * CY_RQT_OUT_OF_SUSPEND - * CY_RQT_GET_GPIO_STATE - * CY_RQT_SET_GPIO_STATE - * CY_RQT_SET_SD_CLOCK_FREQ - * CY_RQT_WB_DEVICE_MISMATCH - * CY_RQT_BOOTLOAD_NO_FIRMWARE - * CY_RQT_RESERVE_LNA_BOOT_AREA - * CY_RQT_ABORT_P2S_XFER - */ - -#ifndef __doxygen__ -#define CY_RQT_GENERAL_RQT_CONTEXT (0) -#endif - -/* Summary - This command returns the firmware version number, - media types supported and debug/release mode information. - - Direction - P Port Processor-> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request Code = 0 - - Description - The response contains the 16-bit major version, the - 16-bit minor version, the 16 bit build number, media - types supported and release/debug mode information. - - Responses - * CY_RESP_FIRMWARE_VERSION - */ -#define CY_RQT_GET_FIRMWARE_VERSION (0) - - -/* Summary - This command changes the trace level and trace information - destination within the West Bridge firmware. - - Direction - P Port Processor-> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request Code = 1 - - D0 - Trace Level - * 0 = no trace information - * 1 = state information - * 2 = function call - * 3 = function call with args/return value - - D1 - Bits 12 - 15 : MediaType - * 0 = NAND - * 1 = SDIO Flash - * 2 = MMC Flash - * 3 = CE-ATA - - Bits 8 - 11 : Zero based device index - - Bits 0 - 7 : Zero based unit index - - Description - The West Bridge firmware contains debugging facilities that can - be used to trace the execution of the firmware. This request - sets the level of tracing information that is stored and the - location where it is stored. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_SET_TRACE_LEVEL (1) - -/* Summary - This command indicates that the firmware is up and ready - for communications with the P port processor. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 0 - * Request Code = 3 - - D0 - Major Version - - D1 - Minor Version - - D2 - Build Number - - D3 - Bits 15-8: Media types supported on Bus 1. - Bits 7-0: Media types supported on Bus 0. - Bits 8, 0: NAND support. - * 0: NAND is not supported. - * 1: NAND is supported. - Bits 9, 1: SD memory card support. - * 0: SD memory card is not supported. - * 1: SD memory card is supported. - Bits 10, 2: MMC card support. - * 0: MMC card is not supported. - * 1: MMC card is supported. - Bits 11, 3: CEATA drive support - * 0: CEATA drive is not supported. - * 1: CEATA drive is supported. - Bits 12, 4: SD IO card support. - * 0: SD IO card is not supported. - * 1: SD IO card is supported. - - D4 - Bits 15 - 8 : MTP information - * 0 : MTP not supported in firmware - * 1 : MTP supported in firmware - Bits 7 - 0 : Debug/Release mode information. - * 0 : Release mode - * 1 : Debug mode - - Description - When the West Bridge firmware is loaded it being by performing - initialization. Initialization must be complete before West - Bridge is ready to accept requests from the P port processor. - This request is sent from West Bridge to the P port processor - to indicate that initialization is complete. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_INITIALIZATION_COMPLETE (3) - -/* Summary - This command requests the firmware to read and return the contents - of a MCU accessible - register. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 4 - - D0 - Address of register to read - - Description - This debug command allows the processor to read the contents of - a MCU accessible register. - - Responses - * CY_RESP_MCU_REGISTER_DATA - */ -#define CY_RQT_READ_MCU_REGISTER (4) - -/* Summary - This command requests the firmware to write to an MCU - accessible register. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 5 - - D0 - Address of register to be written - - D1 - Bits 15 - 8 : Mask to be applied to existing data. - Bits 7 - 0 : Data to be ORed with masked data. - - Description - This debug command allows the processor to write to an MCU - accessible register. - Note: This has to be used with caution, and is supported by - the firmware only in special debug builds. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_WRITE_MCU_REGISTER (5) - -/* Summary - This command tells the West Bridge firmware that a change in - storage media has been detected. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 6 - - Description - If the insertion or removal of SD or MMC cards is detected by - hardware external to West Bridge, this command is used to tell - the West Bridge firmware to re-initialize the storage controlled - by the device. - - Responses - * CY_RESP_SUCCESS_FAILURE -*/ -#define CY_RQT_STORAGE_MEDIA_CHANGED (6) - -/* Summary - This command enables/disables the periodic heartbeat message - from the West Bridge firmware to the processor. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 7 - - Description - This command enables/disables the periodic heartbeat message - from the West Bridge firmware to the processor. The heartbeat - message is left enabled by default, and can lead to a loss - in performance on the P port interface. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_CONTROL_ANTIOCH_HEARTBEAT (7) - -/* Summary - This command requests the West Bridge firmware to prepare for - the device going into standby - mode. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 8 - - Description - This command is sent by the processor to the West Bridge as - preparation for going into standby mode. The request allows the - firmware to complete any pending/cached storage operations before - going into the low power state. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_PREPARE_FOR_STANDBY (8) - -/* Summary - Requests the firmware to go into suspend mode. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 9 - - D0 - Bits 7-0: Wakeup control information. - - Description - This command is sent by the processor to the West Bridge to - request the device to be placed in suspend mode. The firmware - will complete any pending/cached storage operations before - going into the low power state. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_ENTER_SUSPEND_MODE (9) - -/* Summary - Indicates that the device has left suspend mode. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 10 - - Description - This message is sent by the West Bridge to the Processor - to indicate that the device has woken up from suspend mode, - and is ready to accept new requests. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_OUT_OF_SUSPEND (10) - -/* Summary - Request to get the current state of an West Bridge GPIO pin. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 11 - - D0 - Bits 15 - 8 : GPIO pin identifier - - Responses - * CY_RESP_GPIO_STATE - - Description - Request from the processor to get the current state of - an West Bridge GPIO pin. - */ -#define CY_RQT_GET_GPIO_STATE (11) - -/* Summary - Request to update the output value on an West Bridge - GPIO pin. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 12 - - D0 - Bits 15 - 8 : GPIO pin identifier - Bit 0 : Desired output state - - Responses - * CY_RESP_SUCCESS_FAILURE - - Description - Request from the processor to update the output value on - an West Bridge GPIO pin. - */ -#define CY_RQT_SET_GPIO_STATE (12) - -/* Summary - Set the clock frequency on the SD interface of the West - Bridge device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 13 - - D0 - Bit 8: Type of SD/MMC media - 0 = low speed media - 1 = high speed media - Bit 0: Clock frequency selection - 0 = Default frequency - 1 = Alternate frequency (24 MHz in both cases) - - Description - This request is sent by the processor to set the operating clock - frequency used on the SD interface of the device. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_SET_SD_CLOCK_FREQ (13) - -/* Summary - Indicates the firmware downloaded to West Bridge cannot - run on the active device. - - Direction - West Bridge -> P Port processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 14 - - Description - Some versions of West Bridge firmware can only run on specific - types/versions of the West Bridge device. This error is - returned when a firmware image is downloaded onto a device that - does not support it. - - Responses - * None - */ -#define CY_RQT_WB_DEVICE_MISMATCH (14) - -/* Summary - This command is indicates that no firmware was found in the - storage media. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 0 - * Request code = 15 - - Description - The command is received only in case of silicon with bootloader - ROM. The device sends the request if there is no firmware image - found in the storage media or the image is corrupted. The - device is waiting for P port to download a valid firmware image. - - Responses - * None - */ -#define CY_RQT_BOOTLOAD_NO_FIRMWARE (15) - -/* Summary - This command reserves first numzones zones of nand device for - storing processor boot image. - - Direction - P Port Processor-> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request Code = 16 - - D0 - Bits 7-0: numzones - - Description - The first numzones zones in nand device will be used for storing - proc boot image. LNA firmware in Astoria will work on this nand - area and boots the processor which will then use the remaining - nand for usual purposes. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_RESERVE_LNA_BOOT_AREA (16) - -/* Summary - This command cancels the processing of a P2S operation in - firmware. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request Code = 17 - - Responses - * CY_RESP_SUCCESS_FAILURE -*/ -#define CY_RQT_ABORT_P2S_XFER (17) - -/* - * Used for debugging, ignore for normal operations - */ -#ifndef __doxygen__ -#define CY_RQT_DEBUG_MESSAGE (127) -#endif - -/******************************************************/ - -/*@@General responses - Summary - The general responses include: - * CY_RESP_FIRMWARE_VERSION - * CY_RESP_MCU_REGISTER_DATA - * CY_RESP_GPIO_STATE - */ - - -/* Summary - This response indicates success and contains the firmware - version number, media types supported by the firmware and - release/debug mode information. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - MailBox0 - * Context = 0 - * Response Code = 16 - - D0 - Major Version - - D1 - Minor Version - - D2 - Build Number - - D3 - Bits 15-8: Media types supported on Bus 1. - Bits 7-0: Media types supported on Bus 0. - Bits 8, 0: NAND support. - * 0: NAND is not supported. - * 1: NAND is supported. - Bits 9, 1: SD memory card support. - * 0: SD memory card is not supported. - * 1: SD memory card is supported. - Bits 10, 2: MMC card support. - * 0: MMC card is not supported. - * 1: MMC card is supported. - Bits 11, 3: CEATA drive support - * 0: CEATA drive is not supported. - * 1: CEATA drive is supported. - Bits 12, 4: SD IO card support. - * 0: SD IO card is not supported. - * 1: SD IO card is supported. - - D4 - Bits 15 - 8 : MTP information - * 0 : MTP not supported in firmware - * 1 : MTP supported in firmware - Bits 7 - 0 : Debug/Release mode information. - * 0 : Release mode - * 1 : Debug mode - - Description - This response is sent to return the firmware version - number to the requestor. - */ -#define CY_RESP_FIRMWARE_VERSION (16) - -/* Summary - This response returns the contents of a MCU accessible - register to the processor. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Response code = 17 - - D0 - Bits 7 - 0 : MCU register contents - - Description - This response is sent by the firmware in response to the - CY_RQT_READ_MCU_REGISTER - command. - */ -#define CY_RESP_MCU_REGISTER_DATA (17) - -/* Summary - Reports the current state of an West Bridge GPIO pin. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request code = 18 - - D0 - Bit 0: Current state of the GP input pin - - Description - This response is sent by the West Bridge to report the - current state observed on a general purpose input pin. - */ -#define CY_RESP_GPIO_STATE (18) - - -/* Summary - This command notifies West Bridge the polarity of the - SD power pin - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 0 - * Request Code = 19 - D0: CyAnMiscActivehigh / CyAnMiscActivelow - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - - */ - -#define CY_RQT_SDPOLARITY (19) - -/******************************/ - -/*@@Resource requests - Summary - - The resource requests include: - * CY_RQT_ACQUIRE_RESOURCE - * CY_RQT_RELEASE_RESOURCE - */ - - - - - -#ifndef __doxygen__ -#define CY_RQT_RESOURCE_RQT_CONTEXT (1) -#endif - - -/* Summary - This command is a request from the P port processor - for ownership of a resource. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 1 - * Request Code = 0 - - D0 - Resource - * 0 = USB - * 1 = SDIO/MMC - * 2 = NAND - - D1 - Force Flag - * 0 = Normal - * 1 = Force - - Description - The resource may be the USB pins, the SDIO/MMC bus, - or the NAND bus. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RELEASED - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_RESOURCE - */ -#define CY_RQT_ACQUIRE_RESOURCE (0) - - -/* Summary - This command is a request from the P port processor - to release ownership of a resource. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 1 - * Request Code = 1 - - D0 - Resource - * 0 = USB - * 1 = SDIO/MMC - * 2 = NAND - - Description - The resource may be the USB pins, the SDIO/MMC bus, or - the NAND bus. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_OWNER - */ -#define CY_RQT_RELEASE_RESOURCE (1) - - -/****************************/ - -/*@@Storage requests - Summary - The storage commands include: - * CY_RQT_START_STORAGE - * CY_RQT_STOP_STORAGE - * CY_RQT_CLAIM_STORAGE - * CY_RQT_RELEASE_STORAGE - * CY_RQT_QUERY_MEDIA - * CY_RQT_QUERY_DEVICE - * CY_RQT_QUERY_UNIT - * CY_RQT_READ_BLOCK - * CY_RQT_WRITE_BLOCK - * CY_RQT_MEDIA_CHANGED - * CY_RQT_ANTIOCH_CLAIM - * CY_RQT_ANTIOCH_RELEASE - * CY_RQT_SD_INTERFACE_CONTROL - * CY_RQT_SD_REGISTER_READ - * CY_RQT_CHECK_CARD_LOCK - * CY_RQT_QUERY_BUS - * CY_RQT_PARTITION_STORAGE - * CY_RQT_PARTITION_ERASE - * CY_RQT_GET_TRANSFER_AMOUNT - * CY_RQT_ERASE - * CY_RQT_SDIO_READ_DIRECT - * CY_RQT_SDIO_WRITE_DIRECT - * CY_RQT_SDIO_READ_EXTENDED - * CY_RQT_SDIO_WRITE_EXTENDED - * CY_RQT_SDIO_INIT_FUNCTION - * CY_RQT_SDIO_QUERY_CARD - * CY_RQT_SDIO_GET_TUPLE - * CY_RQT_SDIO_ABORT_IO - * CY_RQT_SDIO_INTR - * CY_RQT_SDIO_SUSPEND - * CY_RQT_SDIO_RESUME - * CY_RQT_SDIO_RESET_DEV - * CY_RQT_P2S_DMA_START - */ -#ifndef __doxygen__ -#define CY_RQT_STORAGE_RQT_CONTEXT (2) -#endif - -/* Summary - This command requests initialization of the storage stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 0 - - Description - This command is required before any other storage related command - can be send to the West Bridge firmware. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_ALREADY_RUNNING - */ -#define CY_RQT_START_STORAGE (0) - - -/* Summary - This command requests shutdown of the storage stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 1 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RUNNING - */ -#define CY_RQT_STOP_STORAGE (1) - - -/* Summary - This command requests ownership of the given media - type by the P port processor. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 2 - - D0 - Bits 12 - 15 : Bus Index - Bits 8 - 11 : Zero based device index - - Responses - * CY_RESP_MEDIA_CLAIMED_RELEASED - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_CLAIM_STORAGE (2) - - -/* Summary - This command releases ownership of a given media type - by the P port processor. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 3 - - D0 - Bits 12 - 15 : Bus Index - Bits 8 - 11 : Zero based device index - - Responses - * CY_RESP_MEDIA_CLAIMED_RELEASED - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_RELEASE_STORAGE (3) - - -/* Summary - This command returns the total number of logical devices - of the given type of media. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 4 - - D0 - Bits 12 - 15 : MediaType - * 0 = NAND - * 1 = SDIO Flash - * 2 = MMC Flash - * 3 = CE-ATA - - Bits 8 - 11 : Not Used - - Bits 0 - 7 : Not Used - - Responses - * CY_RESP_MEDIA_DESCRIPTOR - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_QUERY_MEDIA (4) - - -/* Summary - This command queries a given device to determine - information about the number of logical units on - the given device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 5 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Not Used - - Responses - * CY_RESP_DEVICE_DESCRIPTOR - * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_QUERY_DEVICE (5) - - -/* Summary - This command queries a given device to determine - information about the size and location of a logical unit - located on a physical device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 6 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - Responses - * CY_RESP_UNIT_DESCRIPTOR - * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE - * CY_RESP_NO_SUCH_ADDRESS - */ -#define CY_RQT_QUERY_UNIT (6) - - -/* Summary - This command initiates the read of a specific block - from the given media, - device and unit. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 2 - * Request Code = 7 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - D1 - Upper 16 bits of block address - - D2 - Lower 16 bits of block address - - D3 - BIT 8 - 15 : Upper 8 bits of Number of blocks - - BIT 0 - 7 : Reserved - - * D4 * - BITS 8 - 15 : Lower 8 bits of Number of blocks - BITS 1 - 7 : Not Used - BIT 0 : Indicates whether this command is a - part of a P2S only burst. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_ANTIOCH_DEFERRED_ERROR - */ -#define CY_RQT_READ_BLOCK (7) - - -/* Summary - This command initiates the write of a specific block - from the given media, device and unit. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 2 - * Request Code = 8 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - D1 - Upper 16 bits of block address - - D2 - Lower 16 bits of block address - - D3 - BIT 8 - 15 : Upper 8 bits of Number of blocks - - BIT 0 - 7 : Reserved - - * D4 * - BITS 8 - 15 : Lower 8 bits of Number of blocks - BITS 1 - 7 : Not Used - BIT 0 : Indicates whether this command is a - part of a P2S only burst. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_ANTIOCH_DEFERRED_ERROR - */ -#define CY_RQT_WRITE_BLOCK (8) - -/* Summary - This request is sent when the West Bridge device detects - a change in the status of the media. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request Code = 9 - - D0 - Bits 12 - 15 : Bus index - Bits 0 - 7 : Media type - - D1 - Bit 0 : Action - * 0 = Inserted - * 1 = Removed - - Description - When the media manager detects the insertion or removal - of a media from the West Bridge port, this request is sent - from the West Bridge device to the P Port processor to - inform the processor of the change in status of the media. - This request is sent for both an insert operation and a - removal operation. - - Responses - * CY_RESPO_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_MEDIA_CHANGED (9) - -/* Summary - This request is sent when the USB module wishes to claim - storage media. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request Code = 10 - - D0 - Bit 0: - * 0 = do not release NAND - * 1 = release NAND - - Bit 1: - * 0 = do not release SD Flash - * 1 = release SD Flash - - Bit 2: - * 0 = do not release MMC flash - * 1 = release MMC flash - - Bit 3: - * 0 = do not release CE-ATA storage - * 1 = release CE-ATA storage - - Bit 8: - * 0 = do not release storage on bus 0 - * 1 = release storage on bus 0 - - Bit 9: - * 0 = do not release storage on bus 1 - * 1 = release storage on bus 1 - - Description - When the USB cable is attached to the West Bridge device, - West Bridge will enumerate the storage devices per the USB - initialization of West Bridge. In order for West Bridge to - respond to requests received via USB for the mass storage - devices, the USB module must claim the storeage. This - request is a request to the P port processor to release the - storage medium. The medium will not be visible on the USB - host, until it has been released by the processor. -*/ -#define CY_RQT_ANTIOCH_CLAIM (10) - -/* Summary - This request is sent when the P port has asked West Bridge to - release storage media, and the West Bridge device has - completed this. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request Code = 11 - - D0 - Bit 0: - * 0 = No change in ownership of NAND storage - * 1 = NAND ownership has been given to processor - - Bit 1: - * 0 = No change in ownership of SD storage - * 1 = SD ownership has been given to processor - - Bit 2: - * 0 = No change in ownership of MMC storage - * 1 = MMC ownership has been given to processor - - Bit 3: - * 0 = No change in ownership of CE-ATA storage - * 1 = CE-ATA ownership has been given to processor - - Bit 4: - * 0 = No change in ownership of SD IO device - * 1 = SD IO device ownership has been given to processor - - Bit 8: - * 0 = No change in ownership of storage on bus 0 - * 1 = Bus 0 ownership has been given to processor - - Bit 9: - * 0 = No change in ownership of storage on bus 1 - * 1 = Bus 1 ownership has been given to processor - - Description - When the P port asks for control of a particular media, West - Bridge may be able to release the media immediately. West - Bridge may also need to complete the flush of buffers before - releasing the media. In the later case, West Bridge will - indicated a release is not possible immediately and West Bridge - will send this request to the P port when the release has been - completed. -*/ -#define CY_RQT_ANTIOCH_RELEASE (11) - -/* Summary - This request is sent by the Processor to enable/disable the - handling of SD card detection and SD card write protection - by the firmware. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 12 - - D0 - Bit 8: Enable/disable handling of card detection. - Bit 1: SDAT_3 = 0, GIPO_0 = 1 - Bit 0: Enable/disable handling of write protection. - - Description - This request is sent by the Processor to enable/disable - the handling of SD card detection and SD card write - protection by the firmware. - */ -#define CY_RQT_SD_INTERFACE_CONTROL (12) - -/* Summary - Request from the processor to read a register on the SD - card, and return the contents. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 13 - - D0 - Bits 12 - 15 : MediaType - * 0 = Reserved - * 1 = SDIO Flash - * 2 = MMC Flash - * 3 = Reserved - - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Type of register to read - - Description - This request is sent by the processor to instruct the - West Bridge to read a register on the SD/MMC card, and - send the contents back through the CY_RESP_SD_REGISTER_DATA - response. - */ -#define CY_RQT_SD_REGISTER_READ (13) - -/* Summary - Check if the SD/MMC card connected to West Bridge is - password locked. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 14 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - - Description - This request is sent by the processor to check if the - SD/MMC connected to the West Bridge is locked with a - password. - */ -#define CY_RQT_CHECK_CARD_LOCK (14) - -/* Summary - This command returns the total number of logical devices on the - given bus - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 15 - - D0 - Bits 12 - 15 : Bus Number - - Bits 0 - 11: Not Used - - Responses - * CY_RESP_BUS_DESCRIPTOR - * CY_RESP_NO_SUCH_BUS - */ -#define CY_RQT_QUERY_BUS (15) - -/* Summary - Divide a storage device into two partitions. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request code = 16 - - D0 - Bits 12 - 15 : Bus number - Bits 8 - 11 : Device number - Bits 0 - 7 : Not used - - D1 - Size of partition 0 (MS word) - - D2 - Size of partition 0 (LS word) - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_PARTITION_STORAGE (16) - -/* Summary - Remove the partition table and unify all partitions on - a storage device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request code = 17 - - D0 - Bits 12 - 15 : Bus number - Bits 8 - 11 : Device number - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_PARTITION_ERASE (17) - -/* Summary - Requests the current transfer amount. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request code = 18 - - D0 - Bits 12 - 15 : Bus number - Bits 8 - 11 : Device number - - Responses - * CY_RESP_TRANSFER_COUNT - */ -#define CY_RQT_GET_TRANSFER_AMOUNT (18) - -/* Summary - Erases. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 2 - * Request code = 19 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - D1 - Upper 16 bits of erase unit - - D2 - Lower 16 bits of erase unit - - D3 - BIT 8 - 15 : Upper 8 bits of Number of erase units - BIT 0 - 7 : Reserved - - * D4 * - BIT 8 - 15 : Lower 8 bits of Number of erase units - BIT 0 - 7 : Not Used - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - */ -#define CY_RQT_ERASE (19) - -/* Summary - This command reads 1 byte from an SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 23 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - D1 - Bits 8 - 15 : 0 - Bit 7 : 0 to indicate a read - Bits 4 - 6 : Function number - Bit 3 : 0 - Bit 2 : 1 if SDIO interrupt needs to be re-enabled. - Bits 0 - 1 : Two Most significant bits of Read address - - D2 - Bits 1 - 15 : 15 Least significant bits of Read address - Bit 0 : 0 - - - Responses - * CY_RESP_SUCCESS_FAILURE - * CY_RESP_SDIO_DIRECT -*/ -#define CY_RQT_SDIO_READ_DIRECT (23) - -/* Summary - This command writes 1 byte to an SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 24 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - D1 - Bits 8 - 15 : Data to write - Bit 7 : 1 to indicate a write - Bits 4 - 6 : Function number - Bit 3 : 1 if Read after write is enabled - Bit 2 : 1 if SDIO interrupt needs to be re-enabled. - Bits 0 - 1 : Two Most significant bits of write address - - D2 - Bits 1 - 15 : 15 Least significant bits of write address - Bit 0 : 0 - - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SDIO_DIRECT -*/ -#define CY_RQT_SDIO_WRITE_DIRECT (24) - -/* Summary - This command reads performs a multi block/byte read from - an SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 25 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - D1 - Bit 15 : 0 to indicate a read - Bit 12 - 14 : Function Number - Bit 11 : Block Mode - Bit 10 : OpCode - Bits 0 - 9 : 10 Most significant bits of Read address - - D2 - Bits 9 - 15 : 7 Least significant bits of address - Bits 0 - 8 : Block/Byte Count - - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SDIO_EXT -*/ -#define CY_RQT_SDIO_READ_EXTENDED (25) - -/* Summary - This command reads performs a multi block/byte write - to an SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 26 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - D1 - Bit 15 : 1 to indicate a write - Bit 12 - 14 : Function Number - Bit 11 : Block Mode - Bit 10 : OpCode - Bits 0 - 9 : 10 Most significant bits of Read address - - D2 - Bits 9 - 15 : 7 Least significant bits of address - Bits 0 - 8 : Block/Byte Count - - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SDIO_EXT -*/ -#define CY_RQT_SDIO_WRITE_EXTENDED (26) - -/* Summary - This command initialises an IO function on the SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 27 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SDIO_INIT_FUNCTION (27) - -/* Summary - This command gets properties of the SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 28 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_QUERY_CARD -*/ -#define CY_RQT_SDIO_QUERY_CARD (28) - -/* Summary - This command reads a tuple from the CIS of an SDIO card. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 29 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - D1 - Bits 8 - 15 : Tuple ID to read - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SDIO_GET_TUPLE -*/ -#define CY_RQT_SDIO_GET_TUPLE (29) - -/* Summary - This command Aborts an IO operation. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 30 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SDIO_ABORT_IO (30) - -/* Summary - SDIO Interrupt request sent to the processor from the West Bridge device. - - Direction - West Bridge ->P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 31 - - D0 - Bits 0 - 7 : Bus Index - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SDIO_INTR (31) - -/* Summary - This command Suspends an IO operation. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 32 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SDIO_SUSPEND (32) - -/* Summary - This command resumes a suspended operation. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 33 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based function number - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SDIO_RESUME -*/ -#define CY_RQT_SDIO_RESUME (33) - -/* Summary - This command resets an SDIO device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request Code = 34 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : 0 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SDIO_RESET_DEV (34) - -/* Summary - This command asks the API to start the DMA transfer - for a P2S operation. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Request code = 35 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_P2S_DMA_START (35) - -/******************************************************/ - -/*@@Storage responses - Summary - The storage responses include: - * CY_RESP_MEDIA_CLAIMED_RELEASED - * CY_RESP_MEDIA_DESCRIPTOR - * CY_RESP_DEVICE_DESCRIPTOR - * CY_RESP_UNIT_DESCRIPTOR - * CY_RESP_ANTIOCH_DEFERRED_ERROR - * CY_RESP_SD_REGISTER_DATA - * CY_RESP_SD_LOCK_STATUS - * CY_RESP_BUS_DESCRIPTOR - * CY_RESP_TRANSFER_COUNT - * CY_RESP_SDIO_EXT - * CY_RESP_SDIO_INIT_FUNCTION - * CY_RESP_SDIO_QUERY_CARD - * CY_RESP_SDIO_GET_TUPLE - * CY_RESP_SDIO_DIRECT - * CY_RESP_SDIO_INVALID_FUNCTION - * CY_RESP_SDIO_RESUME - */ - -/* Summary - Based on the request sent, the state of a given media was - changed as indicated by this response. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Response Code = 16 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - - D1 - State of Media - * 0 = released - * 1 = claimed - */ -#define CY_RESP_MEDIA_CLAIMED_RELEASED (16) - - -/* Summary - This response gives the number of physical devices - associated with a given media type. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Response Code = 17 - - D0 - Media Type - Bits 12 - 15 - * 0 = NAND - * 1 = SDIO Flash - * 2 = MMC Flash - * 3 = CE-ATA - - D1 - Number of devices - */ -#define CY_RESP_MEDIA_DESCRIPTOR (17) - - -/* Summary - This response gives description of a physical device. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - MailBox0 - * Context = 2 - * Response Code = 18 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Type of media present on bus - - D1 - Block Size in bytes - - D2 - Bit 15 : Is device removable - Bit 9 : Is device password locked - Bit 8 : Is device writeable - Bits 0 - 7 : Number Of Units - - D3 - ERASE_UNIT_SIZE high 16 bits - - D4 - ERASE_UNIT_SIZE low 16 bits - - */ -#define CY_RESP_DEVICE_DESCRIPTOR (18) - - -/* Summary - This response gives description of a unit on a - physical device. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 6 - - MailBox0 - * Context = 2 - * Response Code = 19 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - D1 - Bits 0 - 7 : Media type - * 1 = NAND - * 2 = SD FLASH - * 4 = MMC FLASH - * 8 = CEATA - * 16 = SD IO - - D2 - Block Size in bytes - - D3 - Start Block Low 16 bits - - D4 - Start Block High 16 bits - - D5 - Unit Size Low 16 bits - - D6 - Unit Size High 16 bits - */ -#define CY_RESP_UNIT_DESCRIPTOR (19) - - -/* Summary - This response is sent as error status for P2S - Storage operation. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 2 - * Request Code = 20 - - D0 - Bit 8 : Type of operation (Read / Write) - Bits 7 - 0 : Error code - - D1 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Zero based unit index - - *D2 - D3* - Address where the error occurred. - - D4 - Length of the operation in blocks. - - Description - This error is returned by the West Bridge to the - processor if a storage operation fails due to a - medium error. -*/ -#define CY_RESP_ANTIOCH_DEFERRED_ERROR (20) - -/* Summary - Contents of a register on the SD/MMC card connected to - West Bridge. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - Variable - - Mailbox0 - * Context = 2 - * Request code = 21 - - D0 - Length of data in bytes - - D1 - Dn - The register contents - - Description - This is the response to a CY_RQT_SD_REGISTER_READ - request. -*/ -#define CY_RESP_SD_REGISTER_DATA (21) - -/* Summary - Status of whether the SD card is password locked. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 22 - - D0 - Bit 0 : The card's lock status - - Description - Status of whether the SD card is password locked. -*/ -#define CY_RESP_SD_LOCK_STATUS (22) - - -/* Summary - This response gives the types of physical devices - attached to a given bus. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 2 - * Response Code = 23 - - D0 - Bus Number - Bits 12 - 15 - - D1 - Media present on addressed bus - */ -#define CY_RESP_BUS_DESCRIPTOR (23) - -/* Summary - Amount of data read/written through the USB mass - storage/MTP device. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - MailBox0 - * Context = 2 - * Request code = 24 - - D0 - MS 16 bits of number of sectors written - - D1 - LS 16 bits of number of sectors written - - D2 - MS 16 bits of number of sectors read - - D3 - LS 16 bits of number of sectors read - - Description - This is the response to the CY_RQT_GET_TRANSFER_AMOUNT - request, and represents the number of sectors of data - that has been written to or read from the storage device - through the USB Mass storage or MTP interface. - */ -#define CY_RESP_TRANSFER_COUNT (24) - -/* Summary - Status of SDIO Extended read/write operation. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 34 - - D0 - Bit 8 : 1 if Read response, 0 if write response - Bits 0-7: Error Status - - Description - Status of SDIO Extended read write operation. -*/ - -#define CY_RESP_SDIO_EXT (34) - -/* Summary - Status of SDIO operation to Initialize a function - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 2 - * Request code = 35 - - - D0 - Bits 8-15 : Function Interface Code - Bits 0-7: Extended Function Interface Code - - D1 - Bits 0-15 : Function Block Size - - D2 - Bits 0-15 : Most significant Word of Function PSN - - D3 - Bits 0-15 : Least significant Word of Function PSN - - D4 - Bit 15 : CSA Enabled Status - Bit 14 : CSA Support Status - Bit 9 : CSA No Format Status - Bit 8 : CSA Write Protect Status - Bit 0 : Function Wake Up Support status - - Description - Status of SDIO Function Initialization operation. -*/ -#define CY_RESP_SDIO_INIT_FUNCTION (35) - -/* Summary - Status of SDIO operation to query the Card - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 2 - * Request code = 36 - - - D0 - Bits 8-15 : Number of IO functions present - Bit 0: 1 if memory is present - - D1 - Bits 0-15 : Card Manufacturer ID - - D2 - Bits 0-15 : Card Manufacturer Additional Information - - D3 - Bits 0-15 : Function 0 Block Size - - D4 - Bits 8-15 :SDIO Card Capability register - Bits 0-7: SDIO Version - - - Description - Status of SDIO Card Query operation. - */ -#define CY_RESP_SDIO_QUERY_CARD (36) -/* Summary - Status of SDIO CIS read operation - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 37 - - D0 - Bit 8 : 1 - Bits 0-7: Error Status - - D1 - Bits 0 - 7 : Size of data read. - - Description - Status of SDIO Get Tuple Read operation. - */ -#define CY_RESP_SDIO_GET_TUPLE (37) - -/* Summary - Status of SDIO Direct read/write operation. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 38 - - D0 - Bit 8 : Error Status - Bits 0-7: Data Read(If any) - - Description - Status of SDIO Direct read write operation. - -*/ -#define CY_RESP_SDIO_DIRECT (38) - -/* Summary - Indicates an un-initialized function has been used for IO - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 39 - - Description - Indicates an IO request on an uninitialized function. -*/ -#define CY_RESP_SDIO_INVALID_FUNCTION (39) - -/* Summary - Response to a Resume request - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 2 - * Request code = 40 - - D0 - Bits 8-15 : Error Status - Bit 0: 1 if data is available. 0 otherwise. - - Description - Response to a Resume request. Indicates if data is - available after resum or not. -*/ -#define CY_RESP_SDIO_RESUME (40) - -/******************************************************/ - -/*@@USB requests - Summary - The USB requests include: - * CY_RQT_START_USB - * CY_RQT_STOP_USB - * CY_RQT_SET_CONNECT_STATE - * CY_RQT_GET_CONNECT_STATE - * CY_RQT_SET_USB_CONFIG - * CY_RQT_GET_USB_CONFIG - * CY_RQT_STALL_ENDPOINT - * CY_RQT_GET_STALL - * CY_RQT_SET_DESCRIPTOR - * CY_RQT_GET_DESCRIPTOR - * CY_RQT_SET_USB_CONFIG_REGISTERS - * CY_RQT_USB_EVENT - * CY_RQT_USB_EP_DATA - * CY_RQT_ENDPOINT_SET_NAK - * CY_RQT_GET_ENDPOINT_NAK - * CY_RQT_ACK_SETUP_PACKET - * CY_RQT_SCSI_INQUIRY_COMMAND - * CY_RQT_SCSI_START_STOP_COMMAND - * CY_RQT_SCSI_UNKNOWN_COMMAND - * CY_RQT_USB_REMOTE_WAKEUP - * CY_RQT_CLEAR_DESCRIPTORS - * CY_RQT_USB_STORAGE_MONITOR - * CY_RQT_USB_ACTIVITY_UPDATE - * CY_RQT_MS_PARTITION_SELECT - */ -#ifndef __doxygen__ -#define CY_RQT_USB_RQT_CONTEXT (3) -#endif - -/* Summary - This command requests initialization of the USB stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 0 - - Description - This command is required before any other USB related command can be - sent to the West Bridge firmware. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING - */ -#define CY_RQT_START_USB (0) - - -/* Summary - This command requests shutdown of the USB stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 1 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_STOP_USB (1) - - -/* Summary - This command requests that the USB pins be connected - or disconnected to/from the West Bridge device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 2 - - D0 - Desired Connect State - * 0 = DISCONNECTED - * 1 = CONNECTED - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_SET_CONNECT_STATE (2) - - -/* Summary - This command requests the connection state of the - West Bridge USB pins. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 3 - - Responses - * CY_RESP_CONNECT_STATE - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_GET_CONNECT_STATE (3) - - -/* Summary - This request configures the USB subsystem. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 3 - * Request Code = 4 - - D0 - Bits 8 - 15: Media to enumerate (bit mask) - Bits 0 - 7: Enumerate Mass Storage (bit mask) - * 1 = Enumerate device on bus 0 - * 2 = Enumerate device on bus 1 - - D1 - Enumeration Methodology - * 1 = West Bridge enumeration - * 0 = P Port enumeration - - D2 - Mass storage interface number - Interface number to - be used for the mass storage interface - - D3 - Mass storage callbacks - * 1 = relay to P port - * 0 = completely handle in firmware - - Description - This indicates how enumeration should be handled. - Enumeration can be handled by the West Bridge device - or by the P port processor. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_MASK - * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_STORAGE_MEDIA - */ -#define CY_RQT_SET_USB_CONFIG (4) - - -/* Summary - This request retrieves the current USB configuration from - the West Bridge device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 5 - - Responses - * CY_RESP_USB_CONFIG - */ -#define CY_RQT_GET_USB_CONFIG (5) - - -/* Summary - This request stalls the given endpoint. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 6 - - D0 - Endpoint Number - - D1 - * 1 = Stall Endpoint - * 0 = Clear Stall - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT - */ -#define CY_RQT_STALL_ENDPOINT (6) - - -/* Summary - This request retrieves the stall status of the - requested endpoint. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 7 - - D0 - Endpoint number - - Responses - * CY_RESP_ENDPOINT_STALL - * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT - */ -#define CY_RQT_GET_STALL (7) - - -/* Summary - This command sets the contents of a descriptor. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 8 - - D0 - Bit 15 - Bit 8 - Descriptor Index - - Bit 7 - Bit 0 - Descriptor Type - * Device = 1 - * Device Qualifier = 2 - * Full Speed Configuration = 3 - * High Speed Configuration = 4 - - * D1 - DN * - Actual data for the descriptor - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_LENGTH - */ -#define CY_RQT_SET_DESCRIPTOR (8) - -/* Summary - This command gets the contents of a descriptor. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 9 - - D0 - Bit 15 - Bit 8 - Descriptor Index - - Bit 7 - Bit 0 - Descriptor Type - * Device = 1 - * Device Qualifier = 2 - * Full Speed Configuration = 3 - * High Speed Configuration = 4 - - Responses - * CY_RESP_USB_DESCRIPTOR - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE - * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX - */ -#define CY_RQT_GET_DESCRIPTOR (9) - -/* Summary - This request is sent from the P port processor to the - West Bridge device to physically configure the endpoints - in the device. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 3 - - MailBox0 - * Context = 3 - * Request Code = 10 - - D0 - Bit 15 - Bit 8 - EP1OUTCFG register value - Bit 7 - Bit 0 - EP1INCFG register value - - * D1 - D2 * - PEPxCFS register values where x = 3, 5, 7, 9 - - * D3 - D7 * - LEPxCFG register values where x = 3, 5, 7, 9, 10, - 11, 12, 13, 14, 15 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_SET_USB_CONFIG_REGISTERS (10) - -/* Summary - This request is sent to the P port processor when a - USB event occurs and needs to be relayed to the - P port. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Request Code = 11 - - D0 - Event Type - * 0 = Reserved - * 1 = Reserved - * 2 = USB Suspend - * 3 = USB Resume - * 4 = USB Reset - * 5 = USB Set Configuration - * 6 = USB Speed change - - D1 - If EventTYpe is USB Speed change - * 0 = Full Speed - * 1 = High Speed - - If EventType is USB Set Configuration - * The number of the configuration to use - * (may be zero to unconfigure) - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_USB_EVENT (11) - -/* Summary - This request is sent in both directions to transfer - endpoint data for endpoints 0 and 1. - - Direction - West Bridge -> P Port Processor - P Port Processor -> West Bridge - - Length (in transfers) - Variable - - Mailbox0 - * Context = 3 - * Request Code = 12 - - D0 - Bit 15 - 14 Data Type - * 0 = Setup (payload should be the 8 byte setup packet) - * 1 = Data - * 2 = Status (payload should be empty) - - Bit 13 Endpoint Number (only 0 and 1 supported) - Bit 12 First Packet (only supported for Host -> - West Bridge traffic) - Bit 11 Last Packet (only supported for Host -> - West Bridge traffic) - - Bit 9 - 0 Data Length (real max data length is 64 bytes - for EP0 and EP1) - - *D1-Dn* - Endpoint data -*/ -#define CY_RQT_USB_EP_DATA (12) - - -/* Summary - This request sets the NAK bit on an endpoint. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 13 - - D0 - Endpoint Number - - D1 - * 1 = NAK Endpoint - * 0 = Clear NAK - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT - */ -#define CY_RQT_ENDPOINT_SET_NAK (13) - - -/* Summary - This request retrieves the NAK config status of the - requested endpoint. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Request Code = 14 - - D0 - Endpoint number - - Responses - * CY_RESP_ENDPOINT_NAK - * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT - */ -#define CY_RQT_GET_ENDPOINT_NAK (14) - -/* Summary - This request acknowledges a setup packet that does not - require any data transfer. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox - * Context = 3 - * Request Code = 15 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_ACK_SETUP_PACKET (15) - -/* Summary - This request is sent when the USB storage driver within - West Bridge receives an Inquiry request. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - x - variable - - Mailbox0 - * Context = 3 - * Request Code = 16 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Media type being addressed - - D1 - Bits 8 : EVPD bit from request - Bits 0 - 7 : Codepage from the inquiry request - - D2 - Length of the inquiry response in bytes - - * D3 - Dn * - The inquiry response - - Description - When the West Bridge firmware receives an SCSI Inquiry - request from the USB host, the response to this mass - storage command is created by West Bridge and forwarded to - the P port processor. The P port processor may change - this response before it is returned to the USB host. This - request is the method by which this may happen. -*/ -#define CY_RQT_SCSI_INQUIRY_COMMAND (16) - -/* Summary - This request is sent when the USB storage driver within - West Bridge receives a Start/Stop request. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Request Code = 17 - - D0 - Bits 12 - 15 : Bus index - Bits 8 - 11 : Zero based device index - Bits 0 - 7 : Media type being addressed - - D1 - Bit 1 - * LoEj Bit (See SCSI-3 specification) - - Bit 0 - * Start Bit (See SCSI-3 specification) - - Description - When the West Bridge firmware received a SCSI Start/Stop - request from the USB host, this request is relayed to the - P port processor. This request is used to relay the command. - The USB firmware will not response to the USB command until - the response to this request is recevied by the firmware. -*/ -#define CY_RQT_SCSI_START_STOP_COMMAND (17) - -/* Summary - This request is sent when the USB storage driver - receives an unknown CBW on mass storage. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 4 - - Mailbox0 - * Context = 3 - * Request Code = 18 - - D0 - Bits 12 - 15 : MediaType - * 0 = NAND - * 1 = SDIO Flash - * 2 = MMC Flash - * 3 = CE-ATA - - D1 - The length of the request in bytes - - D2 - Dn - CBW command block from the SCSI host controller. - - Description - When the firmware recevies a SCSI request that is not - understood, this request is relayed to the - P port processor. -*/ -#define CY_RQT_SCSI_UNKNOWN_COMMAND (18) - -/* Summary - Request the West Bridge to signal remote wakeup - to the USB host. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Request code = 19 - - Description - Request from the processor to West Bridge, to signal - remote wakeup to the USB host. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_USB_REMOTE_WAKEUP (19) - -/* Summary - Request the West Bridge to clear all descriptors tha - were set previously - using the Set Descriptor calls. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Request code = 20 - - Description - Request from the processor to West Bridge, to clear - all descriptor information that was previously stored - on the West Bridge using CyAnUsbSetDescriptor calls. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_CLEAR_DESCRIPTORS (20) - -/* Summary - Request the West Bridge to monitor USB to storage activity - and send periodic updates. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - Mailbox0 - * Context = 3 - * Request code = 21 - - D0 - Upper 16 bits of write threshold - - D1 - Lower 16 bits of write threshold - - D2 - Upper 16 bits of read threshold - - D3 - Lower 16 bits of read threshold - - Description - Request from the processor to West Bridge, to start - monitoring the level of read/write activity on the - USB mass storage drive and to set the threshold - level at which progress reports are sent. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_USB_STORAGE_MONITOR (21) - -/* Summary - Event from the West Bridge showing that U2S activity - since the last event has crossed the threshold. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 3 - * Request code = 22 - - D0 - Upper 16 bits of sectors written since last event. - - D1 - Lower 16 bits of sectors written since last event. - - D2 - Upper 16 bits of sectors read since last event. - - D3 - Lower 16 bits of sectors read since last event. - - Description - Event notification from the West Bridge indicating - that the number of read/writes on the USB mass - storage device have crossed a pre-defined threshold - level. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_USB_ACTIVITY_UPDATE (22) - -/* Summary - Request to select the partitions to be enumerated on a - storage device with partitions. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Request code = 23 - - D0 - Bits 8-15 : Bus index - Bits 0- 7 : Device index - - D1 - Bits 8-15 : Control whether to enumerate partition 1. - Bits 0- 7 : Control whether to enumerate partition 0. - - Responses - * CY_RESP_SUCCESS_FAILURE - */ -#define CY_RQT_MS_PARTITION_SELECT (23) - -/************/ - -/*@@USB responses - Summary - The USB responses include: - * CY_RESP_USB_CONFIG - * CY_RESP_ENDPOINT_CONFIG - * CY_RESP_ENDPOINT_STALL - * CY_RESP_CONNECT_STATE - * CY_RESP_USB_DESCRIPTOR - * CY_RESP_USB_INVALID_EVENT - * CY_RESP_ENDPOINT_NAK - * CY_RESP_INQUIRY_DATA - * CY_RESP_UNKNOWN_SCSI_COMMAND - */ - -/* Summary - This response contains the enumeration configuration - information for the USB module. - - Direction - 8051->P - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Response Code = 32 - - D0 - Bits 8 - 15: Media to enumerate (bit mask) - Bits 0 - 7: Buses to enumerate (bit mask) - * 1 = Bus 0 - * 2 = Bus 1 - - D1 - Enumeration Methodology - * 0 = West Bridge enumeration - * 1 = P Port enumeration - - D2 - Bits 7 - 0 : Interface Count - the number of interfaces - Bits 15 - 8 : Mass storage callbacks - - */ -#define CY_RESP_USB_CONFIG (32) - - -/* Summary - This response contains the configuration information - for the specified endpoint. - - Direction - 8051->P - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Response Code = 33 - - D0 - Bits 15 - 12 : Endpoint Number (0 - 15) - - Bits 11 - 10 : Endpoint Type - * 0 = Control - * 1 = Bulk - * 2 = Interrupt - * 3 = Isochronous - - Bits 9 : Endpoint Size - * 0 = 512 - * 1 = 1024 - - Bits 8 - 7 : Buffering - * 0 = Double - * 1 = Triple - * 2 = Quad - - Bits 6 : Bit Direction - * 0 = Input - * 1 = Output - */ -#define CY_RESP_ENDPOINT_CONFIG (33) - - -/* Summary - This response contains the stall status for - the specified endpoint. - - Direction - 8051->P - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Response Code = 34 - - D0 - Stall status - * 0 = Active - * 1 = Stalled - */ -#define CY_RESP_ENDPOINT_STALL (34) - - -/* Summary - This response contains the connected/disconnected - state of the West Bridge USB pins. - - Direction - 8051->P - - Length (in transfers) - 1 - - MailBox0 - * Context = 3 - * Response Code = 35 - - D0 - Connect state - * 0 = Disconnected - * 1 = Connected - */ -#define CY_RESP_CONNECT_STATE (35) - -/* Summary - This response contains the information - about the USB configuration - - Direction - West Bridge -> P Port Processor - - Length - x bytes - - Mailbox0 - * Context = 3 - * Response Code = 36 - - D0 - Length in bytes of the descriptor - - * D1 - DN * - Descriptor contents -*/ -#define CY_RESP_USB_DESCRIPTOR (36) - -/* Summary - This response is sent in response to a bad USB event code - - Direction - P Port Processor -> West Bridge - - Length - 1 word (2 bytes) - - Mailbox0 - * Context = 3 - * Response Code = 37 - - D0 - The invalid event code in the request -*/ -#define CY_RESP_USB_INVALID_EVENT (37) - -/* Summary - This response contains the current NAK status of - a USB endpoint. - - Direction - West Bridge -> P port processor - - Length - 1 transfer - - Mailbox0 - * Context = 3 - * Response Code = 38 - - D0 - The NAK status of the endpoint - 1 : NAK bit set - 0 : NAK bit clear -*/ -#define CY_RESP_ENDPOINT_NAK (38) - -/* Summary - This response gives the contents of the inquiry - data back to West Bridge to returns to the USB host. - - Direction - West Bridge -> P Port Processor - - Length - Variable - - MailBox0 - * Context = 3 - * Response Code = 39 - - D0 - Length of the inquiry response - - *D1 - Dn* - Inquiry data -*/ -#define CY_RESP_INQUIRY_DATA (39) - -/* Summary - This response gives the status of an unknown SCSI command. - This also gives three bytes of sense information. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 3 - * Response Code = 40 - - D0 - The length of the reply in bytes - - D1 - * Status of the command - * Sense Key - - D2 - * Additional Sense Code (ASC) - * Additional Sense Code Qualifier (ASCQ) -*/ -#define CY_RESP_UNKNOWN_SCSI_COMMAND (40) -/*******************************************************/ - -/*@@Turbo requests - Summary - The Turbo requests include: - * CY_RQT_START_MTP - * CY_RQT_STOP_MTP - * CY_RQT_INIT_SEND_OBJECT - * CY_RQT_CANCEL_SEND_OBJECT - * CY_RQT_INIT_GET_OBJECT - * CY_RQT_CANCEL_GET_OBJECT - * CY_RQT_SEND_BLOCK_TABLE - * CY_RQT_MTP_EVENT - * CY_RQT_TURBO_CMD_FROM_HOST - * CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST - * CY_RQT_TURBO_SWITCH_ENDPOINT - * CY_RQT_TURBO_START_WRITE_DMA - * CY_RQT_ENABLE_USB_PATH - * CY_RQT_CANCEL_ASYNC_TRANSFER - */ -#ifndef __doxygen__ -#define CY_RQT_TUR_RQT_CONTEXT (4) -#endif - -/* Summary - This command requests initialization of the MTP stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 0 - - Description - This command is required before any other MTP related - command can be sent to the West Bridge firmware. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING - */ -#define CY_RQT_START_MTP (0) - -/* Summary - This command requests shutdown of the MTP stack. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 1 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_STOP_MTP (1) - -/* Summary - This command sets up an MTP SendObject operation. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 2 - - D0 - Total bytes for send object Low 16 bits - - D1 - Total bytes for send object High 16 bits - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_INIT_SEND_OBJECT (2) - -/* Summary - This command cancels West Bridges handling of - an ongoing MTP SendObject operation. This - does NOT send an MTP response. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 3 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING - */ -#define CY_RQT_CANCEL_SEND_OBJECT (3) - -/* Summary - This command sets up an MTP GetObject operation. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 4 - * Request Code = 4 - - D0 - Total bytes for get object Low 16 bits - - D1 - Total bytes for get object High 16 bits - - D2 - Transaction Id for get object Low 16 bits - - D3 - Transaction Id for get object High 16 bits - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_INIT_GET_OBJECT (4) - -/* Summary - This command notifies West Bridge of a new - BlockTable transfer. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 5 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_SEND_BLOCK_TABLE (5) - -/* Summary - This request is sent to the P port processor when a MTP event occurs - and needs to be relayed to the P port. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 2 - - Mailbox0 - * Context = 4 - * Request Code = 6 - - D0 - Bits 15 - 8 : Return Status for GetObject/SendObject - Bits 7 - 0 : Event Type - * 0 = MTP SendObject Complete - * 1 = MTP GetObject Complete - * 2 = BlockTable Needed - - D1 - Lower 16 bits of the length of the data that got transferred - in the Turbo Endpoint.(Applicable to "MTP SendObject Complete" - and "MTP GetObject Complete" events) - - D2 - Upper 16 bits of the length of the data that got transferred - in the Turbo Endpoint. (Applicable to "MTP SendObject Complete" - and "MTP GetObject Complete" events) - - D3 - Lower 16 bits of the Transaction Id of the MTP_SEND_OBJECT - command. (Applicable to "MTP SendObject Complete" event) - - D4 - Upper 16 bits of the Transaction Id of the MTP_SEND_OBJECT - command. (Applicable to "MTP SendObject Complete" event) - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_MTP_EVENT (6) - -/* Summary - This request is sent to the P port processor when a command - is received from Host in a Turbo Endpoint. Upon receiving - this event, P port should read the data from the endpoint as - soon as possible. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - Mailbox0 - * Context = 4 - * Request Code = 7 - - D0 - This contains the EP number. (This will be always two now). - - D1 - Length of the data available in the Turbo Endpoint. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_TURBO_CMD_FROM_HOST (7) - -/* Summary - This request is sent to the West Bridge when the P port - needs to send data to the Host in a Turbo Endpoint. - Upon receiving this event, Firmware will make the end point - available for the P port. If the length is zero, then - firmware will send a zero length packet. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - Mailbox0 - * Context = 4 - * Request Code = 8 - - D0 - This contains the EP number. (This will be always six now). - - D1 - Lower 16 bits of the length of the data that needs to be - sent in the Turbo Endpoint. - - D2 - Upper 16 bits of the length of the data that needs to be - sent in the Turbo Endpoint. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS -*/ -#define CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST (8) - -/* Summary - This command cancels West Bridges handling of - an ongoing MTP GetObject operation. This - does NOT send an MTP response. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 9 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING - */ -#define CY_RQT_CANCEL_GET_OBJECT (9) - -/* Summary - This command switches a Turbo endpoint - from the U port to the P port. If no data - is in the endpoint the endpoint is - primed to switch as soon as data is placed - in the endpoint. The endpoint will continue - to switch until all data has been transferd. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 2 - - MailBox0 - * Context = 4 - * Request Code = 10 - - D0 - Whether the read is a packet read. - - D1 - Lower 16 bits of the length of the data to switch - the Turbo Endpoint for. - - D2 - Upper 16 bits of the length of the data to switch - the Turbo Endpoint for. - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING - */ -#define CY_RQT_TURBO_SWITCH_ENDPOINT (10) - -/* Summary - This command requests the API to start the DMA - transfer of a packet of MTP data to the Antioch. - - Direction - West Bridge -> P Port Processor - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request Code = 11 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - */ -#define CY_RQT_TURBO_START_WRITE_DMA (11) - -/* Summary - This command requests the firmware to switch the - internal data paths to enable USB access to the - Mass storage / MTP endpoints. - - Direction - P Port Processor -> West Bridge - - Length (in transfers) - 1 - - MailBox0 - * Context = 4 - * Request code = 12 - - Responses - * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS - */ -#define CY_RQT_ENABLE_USB_PATH (12) - -/* Summary - Request to cancel an asynchronous MTP write from - the processor side. - - Direction - P Port processor -> West Bridge - - Length (in transfers) - 1 - - Mailbox0 - * Context = 4 - * Request code = 13 - - D0 - * EP number - - Description - This is a request to the firmware to update internal - state so that a pending write on the MTP endpoint - can be cancelled. - */ -#define CY_RQT_CANCEL_ASYNC_TRANSFER (13) - -/******************************************************/ - -/*@@Turbo responses - Summary - The Turbo responses include: - * CY_RESP_MTP_INVALID_EVENT - */ - -/* Summary - This response is sent in response to a bad MTP event code - - Direction - P Port Processor -> West Bridge - - Length - 1 word (2 bytes) - - Mailbox0 - * Context = 4 - * Response Code = 16 - - D0 - The invalid event code in the request -*/ -#define CY_RESP_MTP_INVALID_EVENT (16) - -#ifndef __doxygen__ -#define CY_RQT_CONTEXT_COUNT (5) -#endif - -#endif /* _INCLUDED_CYASPROTOCOL_H_ */ - diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasregs.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasregs.h deleted file mode 100644 index f049d7e..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasregs.h +++ /dev/null @@ -1,201 +0,0 @@ -/* Cypress West Bridge API header file (cyasregs.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASREG_H_ -#define _INCLUDED_CYASREG_H_ - -#if !defined(__doxygen__) - -#define CY_AS_MEM_CM_WB_CFG_ID (0x80) -#define CY_AS_MEM_CM_WB_CFG_ID_VER_MASK (0x000F) -#define CY_AS_MEM_CM_WB_CFG_ID_HDID_MASK (0xFFF0) -#define CY_AS_MEM_CM_WB_CFG_ID_HDID_ANTIOCH_VALUE (0xA100) -#define CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_FPGA_VALUE (0x6800) -#define CY_AS_MEM_CM_WB_CFG_ID_HDID_ASTORIA_VALUE (0xA200) - - -#define CY_AS_MEM_RST_CTRL_REG (0x81) -#define CY_AS_MEM_RST_CTRL_REG_HARD (0x0003) -#define CY_AS_MEM_RST_CTRL_REG_SOFT (0x0001) -#define CY_AS_MEM_RST_RSTCMPT (0x0004) - -#define CY_AS_MEM_P0_ENDIAN (0x82) -#define CY_AS_LITTLE_ENDIAN (0x0000) -#define CY_AS_BIG_ENDIAN (0x0101) - -#define CY_AS_MEM_P0_VM_SET (0x83) -#define CY_AS_MEM_P0_VM_SET_VMTYPE_MASK (0x0007) -#define CY_AS_MEM_P0_VM_SET_VMTYPE_RAM (0x0005) -#define CY_AS_MEM_P0_VM_SET_VMTYPE_SRAM (0x0007) -#define CY_AS_MEM_P0_VM_SET_VMTYPE_VMWIDTH (0x0008) -#define CY_AS_MEM_P0_VM_SET_VMTYPE_FLOWCTRL (0x0010) -#define CY_AS_MEM_P0_VM_SET_IFMODE (0x0020) -#define CY_AS_MEM_P0_VM_SET_CFGMODE (0x0040) -#define CY_AS_MEM_P0_VM_SET_DACKEOB (0x0080) -#define CY_AS_MEM_P0_VM_SET_OVERRIDE (0x0100) -#define CY_AS_MEM_P0_VM_SET_INTOVERD (0x0200) -#define CY_AS_MEM_P0_VM_SET_DRQOVERD (0x0400) -#define CY_AS_MEM_P0_VM_SET_DRQPOL (0x0800) -#define CY_AS_MEM_P0_VM_SET_DACKPOL (0x1000) - - -#define CY_AS_MEM_P0_NV_SET (0x84) -#define CY_AS_MEM_P0_NV_SET_WPSWEN (0x0001) -#define CY_AS_MEM_P0_NV_SET_WPPOLAR (0x0002) - -#define CY_AS_MEM_PMU_UPDATE (0x85) -#define CY_AS_MEM_PMU_UPDATE_UVALID (0x0001) -#define CY_AS_MEM_PMU_UPDATE_USBUPDATE (0x0002) -#define CY_AS_MEM_PMU_UPDATE_SDIOUPDATE (0x0004) - -#define CY_AS_MEM_P0_INTR_REG (0x90) -#define CY_AS_MEM_P0_INTR_REG_MCUINT (0x0020) -#define CY_AS_MEM_P0_INTR_REG_DRQINT (0x0800) -#define CY_AS_MEM_P0_INTR_REG_MBINT (0x1000) -#define CY_AS_MEM_P0_INTR_REG_PMINT (0x2000) -#define CY_AS_MEM_P0_INTR_REG_PLLLOCKINT (0x4000) - -#define CY_AS_MEM_P0_INT_MASK_REG (0x91) -#define CY_AS_MEM_P0_INT_MASK_REG_MMCUINT (0x0020) -#define CY_AS_MEM_P0_INT_MASK_REG_MDRQINT (0x0800) -#define CY_AS_MEM_P0_INT_MASK_REG_MMBINT (0x1000) -#define CY_AS_MEM_P0_INT_MASK_REG_MPMINT (0x2000) -#define CY_AS_MEM_P0_INT_MASK_REG_MPLLLOCKINT (0x4000) - -#define CY_AS_MEM_MCU_MB_STAT (0x92) -#define CY_AS_MEM_P0_MCU_MBNOTRD (0x0001) - -#define CY_AS_MEM_P0_MCU_STAT (0x94) -#define CY_AS_MEM_P0_MCU_STAT_CARDINS (0x0001) -#define CY_AS_MEM_P0_MCU_STAT_CARDREM (0x0002) - -#define CY_AS_MEM_PWR_MAGT_STAT (0x95) -#define CY_AS_MEM_PWR_MAGT_STAT_WAKEUP (0x0001) - -#define CY_AS_MEM_P0_RSE_ALLOCATE (0x98) -#define CY_AS_MEM_P0_RSE_ALLOCATE_SDIOAVI (0x0001) -#define CY_AS_MEM_P0_RSE_ALLOCATE_SDIOALLO (0x0002) -#define CY_AS_MEM_P0_RSE_ALLOCATE_NANDAVI (0x0004) -#define CY_AS_MEM_P0_RSE_ALLOCATE_NANDALLO (0x0008) -#define CY_AS_MEM_P0_RSE_ALLOCATE_USBAVI (0x0010) -#define CY_AS_MEM_P0_RSE_ALLOCATE_USBALLO (0x0020) - -#define CY_AS_MEM_P0_RSE_MASK (0x9A) -#define CY_AS_MEM_P0_RSE_MASK_MSDIOBUS_RW (0x0003) -#define CY_AS_MEM_P0_RSE_MASK_MNANDBUS_RW (0x00C0) -#define CY_AS_MEM_P0_RSE_MASK_MUSBBUS_RW (0x0030) - -#define CY_AS_MEM_P0_DRQ (0xA0) -#define CY_AS_MEM_P0_DRQ_EP2DRQ (0x0004) -#define CY_AS_MEM_P0_DRQ_EP3DRQ (0x0008) -#define CY_AS_MEM_P0_DRQ_EP4DRQ (0x0010) -#define CY_AS_MEM_P0_DRQ_EP5DRQ (0x0020) -#define CY_AS_MEM_P0_DRQ_EP6DRQ (0x0040) -#define CY_AS_MEM_P0_DRQ_EP7DRQ (0x0080) -#define CY_AS_MEM_P0_DRQ_EP8DRQ (0x0100) -#define CY_AS_MEM_P0_DRQ_EP9DRQ (0x0200) -#define CY_AS_MEM_P0_DRQ_EP10DRQ (0x0400) -#define CY_AS_MEM_P0_DRQ_EP11DRQ (0x0800) -#define CY_AS_MEM_P0_DRQ_EP12DRQ (0x1000) -#define CY_AS_MEM_P0_DRQ_EP13DRQ (0x2000) -#define CY_AS_MEM_P0_DRQ_EP14DRQ (0x4000) -#define CY_AS_MEM_P0_DRQ_EP15DRQ (0x8000) - -#define CY_AS_MEM_P0_DRQ_MASK (0xA1) -#define CY_AS_MEM_P0_DRQ_MASK_MEP2DRQ (0x0004) -#define CY_AS_MEM_P0_DRQ_MASK_MEP3DRQ (0x0008) -#define CY_AS_MEM_P0_DRQ_MASK_MEP4DRQ (0x0010) -#define CY_AS_MEM_P0_DRQ_MASK_MEP5DRQ (0x0020) -#define CY_AS_MEM_P0_DRQ_MASK_MEP6DRQ (0x0040) -#define CY_AS_MEM_P0_DRQ_MASK_MEP7DRQ (0x0080) -#define CY_AS_MEM_P0_DRQ_MASK_MEP8DRQ (0x0100) -#define CY_AS_MEM_P0_DRQ_MASK_MEP9DRQ (0x0200) -#define CY_AS_MEM_P0_DRQ_MASK_MEP10DRQ (0x0400) -#define CY_AS_MEM_P0_DRQ_MASK_MEP11DRQ (0x0800) -#define CY_AS_MEM_P0_DRQ_MASK_MEP12DRQ (0x1000) -#define CY_AS_MEM_P0_DRQ_MASK_MEP13DRQ (0x2000) -#define CY_AS_MEM_P0_DRQ_MASK_MEP14DRQ (0x4000) -#define CY_AS_MEM_P0_DRQ_MASK_MEP15DRQ (0x8000) - -#define CY_AS_MEM_P0_EP2_DMA_REG (0xA2) -#define CY_AS_MEM_P0_E_pn_DMA_REG_COUNT_MASK (0x7FF) -#define CY_AS_MEM_P0_E_pn_DMA_REG_DMAVAL (1 << 12) -#define CY_AS_MEM_P0_EP3_DMA_REG (0xA3) -#define CY_AS_MEM_P0_EP4_DMA_REG (0xA4) -#define CY_AS_MEM_P0_EP5_DMA_REG (0xA5) -#define CY_AS_MEM_P0_EP6_DMA_REG (0xA6) -#define CY_AS_MEM_P0_EP7_DMA_REG (0xA7) -#define CY_AS_MEM_P0_EP8_DMA_REG (0xA8) -#define CY_AS_MEM_P0_EP9_DMA_REG (0xA9) -#define CY_AS_MEM_P0_EP10_DMA_REG (0xAA) -#define CY_AS_MEM_P0_EP11_DMA_REG (0xAB) -#define CY_AS_MEM_P0_EP12_DMA_REG (0xAC) -#define CY_AS_MEM_P0_EP13_DMA_REG (0xAD) -#define CY_AS_MEM_P0_EP14_DMA_REG (0xAE) -#define CY_AS_MEM_P0_EP15_DMA_REG (0xAF) - -#define CY_AS_MEM_IROS_SLB_DATARET (0xC0) - -#define CY_AS_MEM_IROS_IO_CFG (0xC1) -#define CY_AS_MEM_IROS_IO_CFG_GPIODRVST_MASK (0x0003) -#define CY_AS_MEM_IROS_IO_CFG_GPIOSLEW_MASK (0x0004) -#define CY_AS_MEM_IROS_IO_CFG_PPIODRVST_MASK (0x0018) -#define CY_AS_MEM_IROS_IO_CFG_PPIOSLEW_MASK (0x0020) -#define CY_AS_MEM_IROS_IO_CFG_SSIODRVST_MASK (0x0300) -#define CY_AS_MEM_IROS_IO_CFG_SSIOSLEW_MASK (0x0400) -#define CY_AS_MEM_IROS_IO_CFG_SNIODRVST_MASK (0x1800) -#define CY_AS_MEM_IROS_IO_CFG_SNIOSLEW_MASK (0x2000) - -#define CY_AS_MEM_IROS_PLL_CFG (0xC2) - -#define CY_AS_MEM_IROS_PXB_DATARET (0xC3) - -#define CY_AS_MEM_PLL_LOCK_LOSS_STAT (0xC4) -#define CY_AS_MEM_PLL_LOCK_LOSS_STAT_PLLSTAT (0x0800) - -#define CY_AS_MEM_IROS_SLEEP_CFG (0xC5) - -#define CY_AS_MEM_PNAND_CFG (0xDA) -#define CY_AS_MEM_PNAND_CFG_IOWIDTH_MASK (0x0001) -#define CY_AS_MEM_PNAND_CFG_IOWIDTH_8BIT (0x0000) -#define CY_AS_MEM_PNAND_CFG_IOWIDTH_16BIT (0x0001) -#define CY_AS_MEM_PNAND_CFG_BLKTYPE_MASK (0x0002) -#define CY_AS_MEM_PNAND_CFG_BLKTYPE_SMALL (0x0002) -#define CY_AS_MEM_PNAND_CFG_BLKTYPE_LARGE (0x0000) -#define CY_AS_MEM_PNAND_CFG_EPABYTE_POS (4) -#define CY_AS_MEM_PNAND_CFG_EPABYTE_MASK (0x0030) -#define CY_AS_MEM_PNAND_CFG_EPABIT_POS (6) -#define CY_AS_MEM_PNAND_CFG_EPABIT_MASK (0x00C0) -#define CY_AS_MEM_PNAND_CFG_LNAEN_MASK (0x0100) - -#define CY_AS_MEM_P0_MAILBOX0 (0xF0) -#define CY_AS_MEM_P0_MAILBOX1 (0xF1) -#define CY_AS_MEM_P0_MAILBOX2 (0xF2) -#define CY_AS_MEM_P0_MAILBOX3 (0xF3) - -#define CY_AS_MEM_MCU_MAILBOX0 (0xF8) -#define CY_AS_MEM_MCU_MAILBOX1 (0xF9) -#define CY_AS_MEM_MCU_MAILBOX2 (0xFA) -#define CY_AS_MEM_MCU_MAILBOX3 (0xFB) - -#endif /* !defined(__doxygen__) */ - -#endif /* _INCLUDED_CYASREG_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h deleted file mode 100644 index 52b93c3..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h +++ /dev/null @@ -1,2759 +0,0 @@ -/* Cypress West Bridge API header file (cyasstorage.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASSTORAGE_H_ -#define _INCLUDED_CYASSTORAGE_H_ - -#include "cyasmedia.h" -#include "cyasmisc.h" -#include "cyas_cplus_start.h" - - -/*@@Storage APIs - Summary - This section documents the storage APIs supported by the - West Bridge API. - - Description - The storage API is based on some specific concepts which - are referenced here. - * - * Addressing - * Ownership - * -*/ - -/*@@Storage API Overview - Summary - Storage devices are identified by media type. Each media - type is considered a single logical device. - - Description - Each media type has a consistent block size and consists - of a set of logical blocks numbered from 0 to N - 1 where - N is the size of the - media type in blocks. The mass storage APIs defined below - provide the - capability to query for devices that are present, and - read/write data to/from - these devices. -*/ - -/*@@Addressing - Summary - Blocks within a storage device are address by a hierarchal - block address. This - address consists of the bus number, physical device, - logical unit, and finally - block address. - - Description - While currently only a single device of each media type - is supported, the address - space reserves space in the future for multiple devices - of each type. Therefore - the second element of the address is the specific device - being addressed within - a given device type. For this release of the software, - this value will always be - zero to address the first device. - - The third element of the address is the logical unit. - A device being managed - by West Bridge can be partitioned into multiple logical - units. This partition - information is stored on each device itself. Currently, - one of the storage devices - managed by West Bridge can be partitioned into two - logical units. - - Finally a logical block address is given within the - logical unit to address an - individual block. -*/ - -/*@@Ownership - Summary - While West Bridge supports concurrent block level - operations from both the USB port and - the processor port, this is not desirable in most - situations as the file system - contained on the storage media cannot be accessed - concurrently. To insure access - by only one of USB and the processor, the West Bridge - API provides for ownership of storage - devices based on media type. - - Description - The processor requests ownership of a given media type - by calling CyAsStorageClaim(). - The firmware in West Bridge releases control of the - media and signals the processor through - the event callback registered with - CyAsStorageRegisterCallback(). The specific event is - the CyAsStorageProcessor. The processor can later - release the media via a call to - CyAsStorageRelease(). This call is immediate and - no callback is required. - - If the processor has claimed storage and the USB port - is connected, West Bridge will need to - claim the storage to manage the mass storage device. - West Bridge requests the storage through - the event callback registered with - CyAsStorageRegisterCallback(). The specific event is - CyAsStorageAntioch and is named as such to reflect - the USB view of storage. This callback - is a request for the processor to release storage. - The storage is not actually released - until the processor calls CyAsStorageRelease(). - - Note that the CyAsStorageAntioch is only sent when the - USB storage device is enumerated and - NOT at every USB operation. The ownership of a given - storage media type is assumed to belong - to the processor until the USB connection is established. - At that point, the storage ownership - is transferred to West Bridge. After the USB connection - is broken, ownership can be transferred - back to the processor. -*/ - -/*@@Asynchronous Versus Synchronous Operation - Summary - When read or write operations are performed to the - storage devices, these operations may be - synchronous or asynchronous. A synchronous operation - is an operation where the read or write - operation is requested and the function does not return - until the operation is complete. This - type of function is the easiest to use but does not - provide for optimal usage of the P port processor time. - - Description - An asynchronous operation is one where the function returns - as soon as the request is started. - The specific read and write request will complete at some - time in the future and the P port - processor will be notified via a callback function. While - asynchronous functions provide for - much better usage of the CPU, these function have more - stringent requirements for use. First, - any buffer use for data transfer must be valid from the - function call to request the operation - through when the callback function is called. This basically - implies that stack based buffers - are not acceptable for asynchronous calls. Second, error - handling must be deferred until the - callback function is called indicating any kind of error - that may have occurred. -*/ - -/*@@Partitioning - Summary - West Bridge API and firmware support the creation of up to - two logical partitions on one - of the storage devices that are managed by West Bridge. The - partitions are managed through - the CyAsStorageCreatePPartition and CyAsStorageRemovePPartition - APIs. - - Description - The CyAsStorageCreatePPartition API is used to divide the total - storage on a storage - device into two logical units or partitions. Since the partition - information is stored - on the storage device in a custom format, partitions should - only be created on fixed - storage devices (i.e., no removable SD/MMC cards). Any data - stored on the device - before the creation of the partition, is liable to be lost when - a partition is created. - - The CyAsStorageRemovePPartition API is used to remove the - stored partition information, - so that all of the device's capacity is treated as a single - partition again. - - When a storage device with two partitions (units) is being - enumerated as a mass storage - device through the West Bridge, it is possible to select the - partitions to be made - visible to the USB host. This is done through the - CyAsUsbSelectMSPartitions API. -*/ - -/********************************* - * West Bridge Constants - **********************************/ - -/* Summary - This constants indicates a raw device access to the read/write - functions - - Description - When performing reading and writing operations on the - storage devices attached - to West Bridge, there are cases where writes need to - happen to raw devices, versus - the units contained within a device. This is - specifically required to manage - the partitions within physical devices. This constant - is used in calls to - CyAsStorageRead(), CyAsStorageReadAsync(), - CyAsStorageWrite() and - CyAsStorageWriteAsync(), to indicate that the raw - physical device is being - accessed and not any specific unit on the device. - - See Also - * CyAsStorageRead - * CyAsStorageReadAsync - * CyAsStorageWrite - * CyAsStorageWriteAsync -*/ -#define CY_AS_LUN_PHYSICAL_DEVICE (0xffffffff) - -/* Summary - This constant represents the maximum DMA burst length - supported on a storage endpoint - - Description - West Bridge reserves separate endpoints for accessing - storage media through the - CyAsStorageRead() and CyAsStorageWrite() calls. The - maximum size of these - endpoints is always 512 bytes, regardless of status - and speed of the USB - connection. -*/ -#define CY_AS_STORAGE_EP_SIZE (512) - -/******************************** - * West Bridge Types - *******************************/ - -/* Summary - This type indicates the type of event in an event - callback from West Bridge - - Description - At times West Bridge needs to inform the P port - processor of events that have - occurred. These events are asynchronous to the - thread of control on the P - port processor and as such are generally delivered - via a callback function that - is called as part of an interrupt handler. This - type indicates the resonse for - the call to the callback function. - - See Also - * CyAsStorageEventCallback - * CyAsStorageRegisterCallback -*/ -typedef enum cy_as_storage_event { - /* This event occurs when the West Bridge device has - detected a USB connect and has enumerated the - storage controlled by west bridge to the USB port. - this event is the signal that the processor - needs to release the storage media. west bridge will - not have control of the storage media until the - processor calls cy_as_release_storage() to release - the specific media. */ - cy_as_storage_antioch, - - /* This event occurs when the processor has requested - ownership of a given media type and west bridge has - released the media. this event is an indicator - that the transfer of ownership is complete and the - processor now owns the given media type. */ - cy_as_storage_processor, - - /* This event occurs when a removable media type has - been removed. */ - cy_as_storage_removed, - - /* This event occurs when a removable media type has - been inserted. */ - cy_as_storage_inserted, - - /* This event occurs when the West Bridge device - * percieves an interrrupt from an SDIO card */ - cy_as_sdio_interrupt - -} cy_as_storage_event; - -/* Summary - This type gives the type of the operation in a storage - operation callback - - Description - This type is used in the callback function for asynchronous - operation. This type indicates whether it is a - CyAsStorageRead() or CyAsStorageWrite() operation that - has completed. - - See Also - * - * CyAsStorageRead - * CyAsStorageWrite -*/ -typedef enum cy_as_oper_type { - /* A data read operation */ - cy_as_op_read, - /* A data write operation */ - cy_as_op_write -} cy_as_oper_type; - -/* Summary - This data structure describes a specific type of media - - Description - This data structure is the return value from the - CyAsStorageQueryDevice function. This structure provides - information about the specific storage device being queried. - - See Also - * CyAsStorageQueryDevice -*/ -typedef struct cy_as_device_desc { - /* Type of device */ - cy_as_media_type type; - /* Is the device removable */ - cy_bool removable; - /* Is the device writeable */ - cy_bool writeable; - /* Basic block size for device */ - uint16_t block_size; - /* Number of LUNs on the device */ - uint32_t number_units; - /* Is the device password locked */ - cy_bool locked; - /* Size in bytes of an Erase Unit. Block erase operation - is only supported for SD storage, and the erase_unit_size - is invalid for all other kinds of storage. */ - uint32_t erase_unit_size; -} cy_as_device_desc; - -/* Summary - This data structure describes a specific unit on a - specific type of media - - Description - This data structure is the return value from the - CyAsStorageQueryUnit function. This structure provides - information about the specific unit. - - See Also - * CyAsStorageQueryUnit -*/ -typedef struct cy_as_unit_desc { - /* Type of device */ - cy_as_media_type type; - /* Basic block size for device */ - uint16_t block_size; - /* Physical start block for LUN */ - uint32_t start_block; - /* Number of blocks in the LUN */ - uint32_t unit_size; -} cy_as_unit_desc; - -/* Summary - This function type defines a callback to be called after an - asynchronous operation - - Description - This function type defines a callback function that is called - at the completion of any asynchronous read or write operation. - - See Also - * CyAsStorageReadAsync() - * CyAsStorageWriteAsync() -*/ -typedef void (*cy_as_storage_callback)( - /* Handle to the device completing the storage operation */ - cy_as_device_handle handle, - /* The bus completing the operation */ - cy_as_bus_number_t bus, - /* The device completing the operation */ - uint32_t device, - /* The unit completing the operation */ - uint32_t unit, - /* The block number of the completed operation */ - uint32_t block_number, - /* The type of operation */ - cy_as_oper_type op, - /* The error status */ - cy_as_return_status_t status - ); - -/* Summary - This function type defines a callback to be called in the - event of a storage related event - - Description - At times West Bridge needs to inform the P port processor - of events that have - occurred. These events are asynchronous to the thread of - control on the P - port processor and as such are generally delivered via a - callback function that - is called as part of an interrupt handler. This type - defines the type of function - that must be provided as a callback function. - - See Also - * CyAsStorageEvent - * CyAsStorageRegisterCallback -*/ -typedef void (*cy_as_storage_event_callback)( - /* Handle to the device sending the event notification */ - cy_as_device_handle handle, - /* The bus where the event happened */ - cy_as_bus_number_t bus, - /* The device where the event happened */ - uint32_t device, - /* The event type */ - cy_as_storage_event evtype, - /* Event related data */ - void *evdata - ); - -/* Summary - This function type defines a callback to be called after - an asynchronous sdio operation - - Description - The Callback function is called at the completion of an - asynchronous sdio read or write operation. - - See Also - * CyAsSdioExtendedRead() - * CyAsSdioExtendedWrite() -*/ -typedef void (*cy_as_sdio_callback)( - /* Handle to the device completing the storage operation */ - cy_as_device_handle handle, - /* The bus completing the operation */ - cy_as_bus_number_t bus, - /* The device completing the operation */ - uint32_t device, - /* The function number of the completing the operation. - if the status of the operation is either CY_AS_ERROR_IO_ABORTED - or CY_AS_IO_SUSPENDED then the most significant word parameter will - contain the number of blocks still pending. */ - uint32_t function, - /* The base address of the completed operation */ - uint32_t address, - /* The type of operation */ - cy_as_oper_type op, - /* The status of the operation */ - cy_as_return_status_t status - ); - -/* Summary - Enumeration of SD/MMC card registers that can be read - through the API. - - Description - Some of the registers on the SD/MMC card(s) attached to the - West Bridge can be read through the API layers. This type - enumerates the registers that can be read. - - See Also - * CyAsStorageSDRegisterRead - */ -typedef enum cy_as_sd_card_reg_type { - cy_as_sd_reg_OCR = 0, - cy_as_sd_reg_CID, - cy_as_sd_reg_CSD -} cy_as_sd_card_reg_type; - -/* Summary - Struct encapsulating parameters and return values for a - CyAsStorageQueryDevice call. - - Description - This struct holds the input parameters and the return values - for an asynchronous CyAsStorageQueryDevice call. - - See Also - * CyAsStorageQueryDevice - */ -typedef struct cy_as_storage_query_device_data { - /* The bus with the device to query */ - cy_as_bus_number_t bus; - /* The logical device number to query */ - uint32_t device; - /* The return value for the device descriptor */ - cy_as_device_desc desc_p; -} cy_as_storage_query_device_data; - - -/* Summary - Struct encapsulating parameters and return values - for a CyAsStorageQueryUnit call. - - Description - This struct holds the input parameters and the return - values for an asynchronous CyAsStorageQueryUnit call. - - See Also - * CyAsStorageQueryUnit - */ -typedef struct cy_as_storage_query_unit_data { - /* The bus with the device to query */ - cy_as_bus_number_t bus; - /* The logical device number to query */ - uint32_t device; - /* The unit to query on the device */ - uint32_t unit; - /* The return value for the unit descriptor */ - cy_as_unit_desc desc_p; -} cy_as_storage_query_unit_data; - -/* Summary - Struct encapsulating the input parameter and return - values for a CyAsStorageSDRegisterRead call. - - Description - This struct holds the input parameter and return - values for an asynchronous CyAsStorageSDRegisterRead - call. - - See Also - * CyAsStorageSDRegisterRead - */ -typedef struct cy_as_storage_sd_reg_read_data { - /* Pointer to the result buffer. */ - uint8_t *buf_p; - /* Length of data to be copied in bytes. */ - uint8_t length; -} cy_as_storage_sd_reg_read_data; - -/* Summary - Controls which pins are used for card detection - - Description - When a StorageDeviceControl call is made to enable or - disable card detection this enum is passed in to - control which pin is used for the detection. - - See Also - * CyAsStorageDeviceControl -*/ -typedef enum cy_as_storage_card_detect { - cy_as_storage_detect_GPIO, - cy_as_storage_detect_SDAT_3 -} cy_as_storage_card_detect; - -#ifndef __doxygen__ -#define cy_as_storage_detect_GPIO_0 cy_as_storage_detect_GPIO - -/* Length of OCR value in bytes. */ -#define CY_AS_SD_REG_OCR_LENGTH (4) -/* Length of CID value in bytes. */ -#define CY_AS_SD_REG_CID_LENGTH (16) -/* Length of CSD value in bytes. */ -#define CY_AS_SD_REG_CSD_LENGTH (16) -/* Max. length of register response in words. */ -#define CY_AS_SD_REG_MAX_RESP_LENGTH (10) - -#endif - -/* Summary - This data structure is the data passed via the evdata - paramater on a usb event callback for the mass storage - device progress event. - - Description - This data structure reports the number of sectors that have - been written and read on the USB mass storage device since - the last event report. The corresponding event is only sent - when either the number of writes, or the number of reads has - crossed a pre-set threshold. - - See Also - * CyAsUsbEventCallback - * CyAsUsbRegisterCallback -*/ -typedef struct cy_as_m_s_c_progress_data { - /* Number of sectors written since the last event. */ - uint32_t wr_count; - /* Number of sectors read since the last event. */ - uint32_t rd_count; -} cy_as_m_s_c_progress_data; - -/* Summary -Flag to set Direct Write operation to read back from the -address written to. - - - See Also - *CyAsSdioDirectWrite() -*/ -#define CY_SDIO_RAW (0x01) - - -/* Summary -Flag to set Extended Read and Write to perform IO -using a FIFO i.e. read or write from the specified -address only. - - See Also - *CyAsSdioExtendedRead() - *CyAsSdioExtendedWrite() -*/ -#define CY_SDIO_OP_FIFO (0x00) - -/* Summary -Flag to set Extended Read and Write to perform incremental -IO using the address provided as the base address. - - - See Also - *CyAsSdioExtendedRead() - *CyAsSdioExtendedWrite() -*/ -#define CY_SDIO_OP_INCR (0x02) - -/* Summary -Flag to set Extended Read and Write to Block Mode operation - - See Also - *CyAsSdioExtendedRead() - *CyAsSdioExtendedWrite() -*/ -#define CY_SDIO_BLOCKMODE (0x04) - -/* Summary -Flag to set Extended Read and Write to Byte Mode operation - - See Also - *CyAsSdioExtendedRead() - *CyAsSdioExtendedWrite() -*/ -#define CY_SDIO_BYTEMODE (0x00) - -/* Summary -Flag to force re/initialization of a function. - -Description -If not set a call to CyAsSdioInitFunction() -will not initialize a function that has been previously -initialized. - See Also - *CyAsSdioInitFunction() - */ -#define CY_SDIO_FORCE_INIT (0x40) - -/* Summary -Flag to re-enable the SDIO interrupts. - -Description -Used with a direct read or direct write -after the Interrupt triggerred by SDIO has been serviced -and cleared to reset the West Bridge Sdio Interrupt. - See Also - *CyAsSdioDirectRead() - *CyAsSdioDirectWrite() -*/ - -#define CY_SDIO_REARM_INT (0x80) - - -/* Summary - Flag to check if 4 bit support is enabled on a - low speed card - See Also - */ -#define CY_SDIO_4BLS (0x80) - -/* Summary - Flag to check if card is a low speed card - See Also - */ -#define CY_SDIO_LSC (0x40) - -/* Summary - Flag to check if interrupt during multiblock data - transfer is enabled - See Also - */ -#define CY_SDIO_E4MI (0x20) - -/* Summary - Flag to check if interrupt during multiblock data - transfer is supported - See Also - */ -#define CY_SDIO_S4MI (0x10) - -/* Summary - Flag to check if card supports function suspending. - See Also - */ -#define CY_SDIO_SBS (0x08) - -/* Summary - Flag to check if card supports SDIO Read-Wait - See Also - */ -#define CY_SDIO_SRW (0x04) - -/* Summary - Flag to check if card supports multi-block transfers - See Also - */ -#define CY_SDIO_SMB (0x02) - -/* Summary - Flag to check if card supports Direct IO commands - during execution of an Extended - IO function - See Also - */ -#define CY_SDIO_SDC (0x01) - -/* Summary - Flag to check if function has a CSA area. - See Also - */ -#define CY_SDIO_CSA_SUP (0x40) - -/* Summary - Flag to check if CSA access is enabled. - See Also - */ -#define CY_SDIO_CSA_EN (0x80) - -/* Summary - Flag to check if CSA is Write protected. - See Also - */ -#define CY_SDIO_CSA_WP (0x01) - -/* Summary - Flag to check if CSA formatting is prohibited. - See Also - */ -#define CY_SDIO_CSA_NF (0x02) - -/* Summary - Flag to check if the function allows wake-up from low - power mode using some vendor specific method. - See Also - */ -#define CY_SDIO_FN_WUS (0x01) - - -/* Summary - This data structure stores SDIO function 0 - parameters for a SDIO card -*/ -typedef struct cy_as_sdio_card { - /* Number of functions present on the card. */ - uint8_t num_functions; - /* Memory present(Combo card) or not */ - uint8_t memory_present; - /* 16 bit manufacturer ID */ - uint16_t manufacturer__id; - /* Additional vendor specific info */ - uint16_t manufacturer_info; - /* Max Block size for function 0 */ - uint16_t maxblocksize; - /* Block size used for function 0 */ - uint16_t blocksize; - /* SDIO version supported by the card */ - uint8_t sdio_version; - /* Card capability flags */ - uint8_t card_capability; -} cy_as_sdio_card; - -/* Summary - This data structure stores SDIO function 1-7 parameters - for a SDIO card -*/ -typedef struct cy_as_sdio_func { - /* SDIO function code. 0 if non standard function */ - uint8_t function_code; - /* Extended function type code for non-standard function */ - uint8_t extended_func_code; - /* Max IO Blocksize supported by the function */ - uint16_t maxblocksize; - /* IO Blocksize used by the function */ - uint16_t blocksize; - /* 32 bit product serial number for the function */ - uint32_t card_psn; - /* Code storage area variables */ - uint8_t csa_bits; - /* Function wake-up support */ - uint8_t wakeup_support; -} cy_as_sdio_func; - -/*********************************** - * West Bridge Functions - ************************************/ - -/* Summary - This function starts the West Bridge storage module. - - Description - This function initializes the West Bridge storage software - stack and readies this module to service storage related - requests. If the stack is already running, the reference - count for the stack is incremented. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_SUCCESS - the module started successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsStorageStop -*/ -EXTERN cy_as_return_status_t -cy_as_storage_start( - /* Handle to the device */ - cy_as_device_handle handle, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function stops the West Bridge storage module. - - Description - This function decrements the reference count for the - storage stack and if this count is zero, the storage - stack is shut down. The shutdown frees all resources - associated with the storage stack. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - While all resources associated with the storage stack - will be freed is a shutdown occurs, - resources associated with underlying layers of the - software will not be freed if they - are shared by the USB stack and the USB stack is - active. Specifically the DMA manager, - the interrupt manager, and the West Bridge - communications module are all shared by both the - USB stack and the storage stack. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge - * device has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not - * been loaded into West Bridge - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - this module was shut - * down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - * CY_AS_ERROR_ASYNC_PENDING - * CY_AS_ERROR_OUT_OF_MEMORY - - See Also - * CyAsStorageStart -*/ -EXTERN cy_as_return_status_t -cy_as_storage_stop( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function is used to register a callback function - for the storage API. - - Description - At times West Bridge needs to inform the P port processor - of events that have occurred. These events are asynchronous - to the thread of control on the P - port processor and as such are generally delivered via a - callback function that - is called as part of an interrupt handler. This function - registers the callback - function that is called when an event occurs. Each call - to this function - replaces any old callback function with a new callback - function supplied on - the most recent call. This function can also be called - with a callback function - of NULL in order to remove any existing callback function - - * Valid In Asynchronous Callback:YES - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has - * not been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle - * was passed in - * CY_AS_ERROR_SUCCESS - the function was registered - * successfully - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - - See Also - * CyAsStorageEventCallback - * CyAsStorageEvent -*/ -EXTERN cy_as_return_status_t -cy_as_storage_register_callback( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The callback function to call for async storage events */ - cy_as_storage_event_callback callback - ); - -/* Summary - This function claims a given media type. - - Description - This function communicates to West Bridge that the - processor wants control of the - given storage media type. Each media type can be - claimed or released by the - processor independently. As the processor is the - master for the storage, - West Bridge should release control of the requested - media as soon as possible and - signal the processor via the CyAsStorageProcessor event. - - * Valid In Asynchronous Callback: NO - - Notes - This function just notifies West Bridge that the storage - is desired. The storage - has not actually been released by West Bridge until the - registered callback function - is called with the CyAsStorageProcessor event - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - this request was successfully - * transmitted to the West Bridge device - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_MEDIA - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_ACQUIRED - - See Also: - * CyAsStorageClaim - * CyAsStorageRelease -*/ -EXTERN cy_as_return_status_t -cy_as_storage_claim( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to claim */ - cy_as_bus_number_t bus, - /* The device to claim */ - uint32_t device, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function releases a given media type. - - Description - This function communicates to West Bridge that the - processor has released control of - the given storage media type. Each media type can - be claimed or released by the - processor independently. As the processor is the - master for the storage, West Bridge - can now assume ownership of the media type. No callback - or event is generated. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle - * was passed in - * CY_AS_ERROR_SUCCESS - the media was successfully - * released - * CY_AS_ERROR_MEDIA_NOT_CLAIMED - the media was not - * claimed by the P port - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_MEDIA - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsStorageClaim -*/ -EXTERN cy_as_return_status_t -cy_as_storage_release( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to release */ - cy_as_bus_number_t bus, - /* The device to release */ - uint32_t device, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function information about the number of devices present - on a given bus - - Description - This function retrieves information about how many devices on - on the given - West Bridge bus. - - * Valid In Asynchronous Callback: NO - - Notes - While the current implementation of West Bridge only - supports one of logical device of - each media type, future versions WestBridge/Antioch may - support multiple devices. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsStorageQueryDevice - * CyAsStorageQueryUnit -*/ -EXTERN cy_as_return_status_t -cy_as_storage_query_bus( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to query */ - cy_as_bus_number_t bus, - /* The return value containing the number of - devices present for this media type */ - uint32_t *count, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function information about the number of devices - present for a given media type - - Description - This function retrieves information about how many - devices of a given media type are attached to West Bridge. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - While the current implementation of West Bridge only - supports one of logical device of each media type, future - versions West Bridge may support multiple devices. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsStorageQueryMedia - * CyAsMediaType - * CyAsStorageQueryDevice - * CyAsStorageQueryUnit -*/ -EXTERN cy_as_return_status_t -cy_as_storage_query_media( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to query */ - cy_as_media_type type, - /* The return value containing the number of - devices present for this media type */ - uint32_t *count, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function returns information about a given device - of a specific media type - - Description - This function retrieves information about a device of a - given type of media. The function is called with a given - media type and device and a pointer to a media descriptor - (CyAsDeviceDesc). This function fills in the data in the - media descriptor to provide information about the - attributes of the device of the given device. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - Currently this API only supports a single logical device - of each media type. Therefore the only acceptable value - for the parameter device is zero (0). - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_NO_SUCH_MEDIA - * CY_AS_ERROR_NO_SUCH_DEVICE - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsMediaType - * CyAsStorageQueryMedia - * CyAsStorageQueryUnit - * CyAsDeviceDesc -*/ -EXTERN cy_as_return_status_t -cy_as_storage_query_device( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Parameters and return value for the query call */ - cy_as_storage_query_device_data *data, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function returns information about a given unit on a - specific device - - Description - This function retrieves information about a device of a - given logical unit. The function is called with a given - media type, device address, unit address, and a pointer - to a unit descriptor (CyAsUnitDesc). This function fills - in the data in the unit descriptor to provide information - about the attributes of the device of the given logical - unit. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_NO_SUCH_DEVICE - * CY_AS_ERROR_NO_SUCH_UNIT - * CY_AS_ERROR_INVALID_RESPONSE - - - See Also - * CyAsMediaType - * CyAsStorageQueryMedia - * CyAsStorageQueryDevice - * CyAsUnitDesc -*/ -EXTERN cy_as_return_status_t -cy_as_storage_query_unit( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Parameters and return value for the query call */ - cy_as_storage_query_unit_data *data_p, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function enables/disables the handling of SD/MMC card - detection and SD/MMC write protection in West Bridge Firmware. - - Description - If the detection of SD/MMC card insertion or removal is being - done by the Processor directly, the West Bridge firmware needs - to be instructed to disable the card detect feature. Also, if - the hardware design does not use the SD_WP GPIO of the West - Bridge to handle SD card's write protect notch, the handling - of write protection if firmware should be disabled. This API - is used to enable/disable the card detect and write protect - support in West Bridge firmware. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the feature controls were - * set successfully - * CY_AS_ERROR_NO_SUCH_BUS - the specified bus is invalid - * CY_AS_ERROR_NOT_SUPPORTED - function not supported on - * the device in the specified bus - * CY_AS_ERROR_IN_SUSPEND - the West Brdige device is in - * suspended mode - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - -*/ -EXTERN cy_as_return_status_t -cy_as_storage_device_control( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The bus to control */ - cy_as_bus_number_t bus, - /* The device to control */ - uint32_t device, - /* Enable/disable control for card detection */ - cy_bool card_detect_en, - /* Enable/disable control for write protect handling */ - cy_bool write_prot_en, - /* Control which pin is used for card detection */ - cy_as_storage_card_detect config_detect, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -/* Summary - This function reads one or more blocks of data from - the storage system. - - Description - This function synchronously reads one or more blocks - of data from the given media - type/device and places the data into the data buffer - given. This function does not - return until the data is read and placed into the buffer. - - * Valid In Asynchronous Callback: NO - - Notes - If the Samsung CEATA drive is the target for a - read/write operation, the maximum - number of sectors that can be accessed through a - single API call is limited to 2047. - Longer accesses addressed to a Samsung CEATA drive - can result in time-out errors. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle - * was passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified - * does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified - * media/device pair does not exist - * CY_AS_ERROR_NO_SUCH_UNIT - the unit specified - * does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation - * is pending - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was - * error in reading from the media - * CY_AS_ERROR_MEDIA_WRITE_PROTECTED - the media is - * write protected - * CY_AS_ERROR_INVALID_PARAMETER - Reads/Writes greater - * than 4095 logic blocks are not allowed - - See Also - * CyAsStorageReadAsync - * CyAsStorageWrite - * CyAsStorageWriteAsync - * CyAsStorageCancelAsync - * -*/ -EXTERN cy_as_return_status_t -cy_as_storage_read( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to access */ - cy_as_bus_number_t bus, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where data will be placed */ - void *data_p, - /* The number of blocks to be read */ - uint16_t num_blocks - ); - -/* Summary - This function asynchronously reads one or more blocks of data - from the storage system. - - Description - This function asynchronously reads one or more blocks of - data from the given media - type/device and places the data into the data buffer given. - This function returns - as soon as the request is transmitted to the West Bridge - device but before the data is - available. When the read is complete, the callback function - is called to indicate the - data has been placed into the data buffer. Note that the - data buffer must remain - valid from when the read is requested until the callback - function is called. - - * Valid In Asynchronous Callback: YES - - Notes - If the Samsung CEATA drive is the target for a read/write - operation, the maximum - number of sectors that can be accessed through a single API - call is limited to 2047. - Longer accesses addressed to a Samsung CEATA drive can - result in time-out errors. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle - * was passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_ASYNC_PENDING - an async operation - * is pending - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error - * in reading from the media - * CY_AS_ERROR_MEDIA_WRITE_PROTECTED - the media is - * write protected - * CY_AS_ERROR_QUERY_DEVICE_NEEDED - Before an - * asynchronous read can be issue a call to - * CyAsStorageQueryDevice must be made - * CY_AS_ERROR_INVALID_PARAMETER - Reads/Writes greater - * than 4095 logic blocks are not allowed - - See Also - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageWriteAsync - * CyAsStorageCancelAsync - * CyAsStorageQueryDevice - * -*/ -EXTERN cy_as_return_status_t -cy_as_storage_read_async( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to access */ - cy_as_bus_number_t bus, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where data will be placed */ - void *data_p, - /* The number of blocks to be read */ - uint16_t num_blocks, - /* The function to call when the read is complete - or an error occurs */ - cy_as_storage_callback callback - ); - -/* Summary - This function writes one or more blocks of data - to the storage system. - - Description - This function synchronously writes one or more blocks of - data to the given media/device. - This function does not return until the data is written - into the media. - - * Valid In Asynchronous Callback: NO - - Notes - If the Samsung CEATA drive is the target for a read/write - operation, the maximum - number of sectors that can be accessed through a single - API call is limited to 2047. - Longer accesses addressed to a Samsung CEATA drive can - result in time-out errors. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does - * not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified - * media/device pair does not exist - * CY_AS_ERROR_NO_SUCH_UNIT - the unit specified - * does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation - * is pending - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error - * in reading from the media - * CY_AS_ERROR_MEDIA_WRITE_PROTECTED - the media is - * write protected - * CY_AS_ERROR_INVALID_PARAMETER - Reads/Writes greater - * than 4095 logic blocks are not allowed - - See Also - * CyAsStorageRead - * CyAsStorageReadAsync - * CyAsStorageWriteAsync - * CyAsStorageCancelAsync - * -*/ -EXTERN cy_as_return_status_t -cy_as_storage_write( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to access */ - cy_as_bus_number_t bus, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer containing the data to be written */ - void *data_p, - /* The number of blocks to be written */ - uint16_t num_blocks - ); - -/* Summary - This function asynchronously writes one or more blocks - of data to the storage system - - Description - This function asynchronously writes one or more blocks of - data to the given media type/device. - This function returns as soon as the request is transmitted - to the West Bridge device - but before the data is actually written. When the write is - complete, the callback - function is called to indicate the data has been physically - written into the media. - - * Valid In Asynchronous Callback: YES - - Notes - If the Samsung CEATA drive is the target for a read/write - operation, the maximum - number of sectors that can be accessed through a single API - call is limited to 2047. - Longer accesses addressed to a Samsung CEATA drive can - result in time-out errors. - - Notes - The data buffer must remain valid from when the write is - requested until the callback function is called. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has - * not been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_ASYNC_PENDING - an async operation is - * pending - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_MEDIA_WRITE_PROTECTED - the media is write - * protected - * CY_AS_ERROR_QUERY_DEVICE_NEEDED - A query device call is - * required before async writes are allowed - * CY_AS_ERROR_INVALID_PARAMETER - Reads/Writes greater - * than 4095 logic blocks are not allowed - - See Also - * CyAsStorageRead - * CyAsStorageWrite - * CyAsStorageReadAsync - * CyAsStorageCancelAsync - * CyAsStorageQueryDevice - * -*/ -EXTERN cy_as_return_status_t -cy_as_storage_write_async( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The bus to access */ - cy_as_bus_number_t bus, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where the data to be written is stored */ - void *data_p, - /* The number of blocks to be written */ - uint16_t num_blocks, - /* The function to call when the write is complete - or an error occurs */ - cy_as_storage_callback callback - ); - -/* Summary - This function aborts any outstanding asynchronous operation - - Description - This function aborts any asynchronous block read or block - write operation. As only a single asynchronous block read - or write operation is possible at one time, this aborts - the single operation in progress. - - * Valid In Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_OPERATION_PENDING - no asynchronous - * operation is pending - - See Also - * CyAsStorageRead - * CyAsStorageReadAsync - * CyAsStorageWrite - * CyAsStorageWriteAsync - * -*/ -EXTERN cy_as_return_status_t -cy_as_storage_cancel_async( - /* Handle to the device with outstanding async request */ - cy_as_device_handle handle - ); - -/* Summary - This function is used to read the content of SD registers - - Description - This function is used to read the contents of CSD, CID and - CSD registers of the SD Card. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the read operation was successful - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_IN_SUSPEND - The West Bridge device is in - * suspend mode - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device pair - * does not exist - * CY_AS_ERROR_INVALID_PARAMETER - The register type is invalid - * or the media is not supported on the bus - * CY_AS_ERROR_OUT_OF_MEMORY - failed to get memory to process - * request - * CY_AS_ERROR_INVALID_RESPONSE - communication failure with - * West Bridge firmware - - See Also - * CyAsStorageSDRegReadData - */ -EXTERN cy_as_return_status_t -cy_as_storage_sd_register_read( - /* Handle to the West Bridge device. */ - cy_as_device_handle handle, - /* The bus to query */ - cy_as_bus_number_t bus, - /* The device to query */ - uint8_t device, - /* The type of register to read. */ - cy_as_sd_card_reg_type reg_type, - /* Output data buffer and length. */ - cy_as_storage_sd_reg_read_data *data_p, - /* Callback function to call when done. */ - cy_as_function_callback cb, - /* Call context to send to the cb function. */ - uint32_t client - ); - -/* Summary - Creates a partition starting at the given block and using the - remaining blocks on the card. - - Description - Storage devices attached to West Bridge can be partitioned - into two units. - The visibility of these units through the mass storage - interface can be - individually controlled. This API is used to partition - a device into two. - - * Valid in Asynchronous Callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the partition was successfully created - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_IN_SUSPEND - The West Bridge device is in - * suspend mode - * CY_AS_ERROR_USB_RUNNING - Partition cannot be created while - * USB stack is active - * CY_AS_ERROR_OUT_OF_MEMORY - failed to get memory to - * process request - * CY_AS_ERROR_INVALID_REQUEST - feature not supported by - * active device or firmware - * CY_AS_ERROR_INVALID_RESPONSE - communication failure with - * West Bridge firmware - * CY_AS_ERROR_ALREADY_PARTITIONED - the storage device already - * has been partitioned - * CY_AS_ERROR_INVALID_BLOCK - Size specified for the partition - * exceeds the actual device capacity - - See Also - * - * CyAsStorageRemovePPartition - */ -EXTERN cy_as_return_status_t -cy_as_storage_create_p_partition( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Bus on which the device to be partitioned is connected */ - cy_as_bus_number_t bus, - /* Device number to be partitioned */ - uint32_t device, - /* Size of partition number 0 in blocks */ - uint32_t size, - /* Callback in case of async call */ - cy_as_function_callback cb, - /* Client context to pass to the callback */ - uint32_t client - ); - -/* Summary - Removes the partition table on a storage device connected - to the West Bridge. - - Description - Storage devices attached to West Bridge can be partitioned - into two units.This partition information is stored on the - device and is non-volatile. This API is used to remove the - stored partition information and make the entire device - visible as a single partition (unit). - - * Valid in Asynchronous Callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the partition was successfully - * deleted - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_IN_SUSPEND - The West Bridge device is in - * suspend mode - * CY_AS_ERROR_USB_RUNNING - Partition cannot be created - * while USB stack is active - * CY_AS_ERROR_OUT_OF_MEMORY - failed to get memory to - * process request - * CY_AS_ERROR_INVALID_REQUEST - operation not supported - * by active device/firmware - * CY_AS_ERROR_NO_SUCH_UNIT - the addressed device is - * not partitioned - - See Also - * - * CyAsStorageCreatePPartition - */ -EXTERN cy_as_return_status_t -cy_as_storage_remove_p_partition( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Bus on which device of interest is connected */ - cy_as_bus_number_t bus, - /* Device number of interest */ - uint32_t device, - /* Callback in case of async call */ - cy_as_function_callback cb, - /* Client context to pass to the callback */ - uint32_t client - ); - -/* Summary - Returns the amount of data read/written to the given - device from the USB host. - - Description - - * Valid in Asynchronous Callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - API call completed successfully - * CY_AS_ERROR_INVALID_HANDLE - Invalid West Bridge device - * handle - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - No firmware image has been - * loaded on West Bridge device - * CY_AS_ERROR_NOT_RUNNING - Storage stack has not been - * started - * CY_AS_ERROR_NOT_SUPPORTED - This function is not - * supported by active firmware version - * CY_AS_ERROR_OUT_OF_MEMORY - Failed to get memory to - * process the request - * CY_AS_ERROR_TIMEOUT - West Bridge firmware did not - * respond to request - * CY_AS_ERROR_INVALID_RESPONSE - Unexpected reply from - * West Bridge firmware - - See Also - * CyAsUsbSetMSReportThreshold -*/ -EXTERN cy_as_return_status_t -cy_as_storage_get_transfer_amount( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Bus on which device of interest is connected */ - cy_as_bus_number_t bus, - /* Device number of interest */ - uint32_t device, - /* Return value containing read/write sector counts. */ - cy_as_m_s_c_progress_data *data_p, - /* Callback in case of async call */ - cy_as_function_callback cb, - /* Client context to pass to the callback */ - uint32_t client - ); - -/* Summary - Performs a Sector Erase on an attached SD Card - - Description - This allows you to erase an attached SD card. The area to erase - is specified in terms of a starting Erase Unit and a number of - Erase Units. The size of each Erase Unit is defined in the - DeviceDesc returned from a StorageQueryDevice call and it can - differ between SD cards. - - A large erase can take a while to complete depending on the SD - card. In such a case it is recommended that an async call is made. - - Returns - * CY_AS_ERROR_SUCCESS - API call completed successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed in - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_ASYNC_PENDING - an async operation is pending - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_MEDIA_WRITE_PROTECTED - the media is write protected - * CY_AS_ERROR_QUERY_DEVICE_NEEDED - A query device call is - * required before erase is allowed - * CY_AS_ERROR_NO_SUCH_BUS - * CY_AS_ERROR_NO_SUCH_DEVICE - * CY_AS_ERROR_NOT_SUPPORTED - Erase is currently only supported - * on SD and using SD only firmware - * CY_AS_ERROR_OUT_OF_MEMORY - - See Also - * CyAsStorageSDRegisterRead -*/ -EXTERN cy_as_return_status_t -cy_as_storage_erase( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Bus on which device of interest is connected */ - cy_as_bus_number_t bus, - /* Device number of interest */ - uint32_t device, - /* Erase Unit to start the erase */ - uint32_t erase_unit, - /* Number of Erase Units to erase */ - uint16_t num_erase_units, - /* Callback in case of async call */ - cy_as_function_callback cb, - /* Client context to pass to the callback */ - uint32_t client - ); - -/* Summary - This function is used to read a Tuple from the SDIO CIS area. - - Description - This function is used to read a Tuple from the SDIO CIS area. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device - * is in suspend mode - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation is pending - * CY_AS_ERROR_INVALID_REQUEST - an invalid IO request - * type was made - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made to - * an invalid function - * CY_AS_ERROR_INVALID_ENDPOINT - A DMA request was made to - * an invalid endpoint - * CY_AS_ERROR_ENDPOINT_DISABLED - A DMA request was made to - * a disabled endpoint - -*/ -cy_as_return_status_t -cy_as_sdio_get_c_i_s_info( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Id of tuple to be fetched */ - uint16_t tuple_id, - /* Buffer to hold tuple read from card. - should be at least 256 bytes in size */ - uint8_t *data_p - ); - - -/* Summary - This function is used to read properties of the SDIO card. - - Description - This function is used to read properties of the SDIO card - into a CyAsSDIOCard structure. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_SUCCESS - the card information was returned - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - -*/ -cy_as_return_status_t -cy_as_sdio_query_card( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* Buffer to store card properties */ - cy_as_sdio_card *data_p - ); - -/* Summary - This function is used to reset a SDIO card. - - Description - This function is used to reset a SDIO card by writing to - the reset bit in the CCCR and reinitializing the card. This - function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - */ -cy_as_return_status_t -cy_as_sdio_reset_card( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device - ); - -/* Summary - This function performs a Synchronous 1 byte read from the sdio - device function. - - Description - This function is used to perform a synchronous 1 byte read - from an SDIO card function. This function is to be used only - for IO to an SDIO card as other media will not respond to the - SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed - * in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device pair - * does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was received - * from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in reading - * from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made to an - * invalid function - * CY_AS_ERROR_FUNCTION_SUSPENDED - The function to which read - * was attempted is in suspend -*/ -cy_as_return_status_t -cy_as_sdio_direct_read( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Address for IO */ - uint32_t address, - /* Set to CY_SDIO_REARM_INT to reinitialize SDIO interrupt */ - uint8_t misc_buf, - /* Buffer to hold byte read from card */ - uint8_t *data_p - ); - -/* Summary - This function performs a Synchronous 1 byte write to the - sdio device function. - - Description - This function is used to perform a synchronous 1 byte write - to an SDIO card function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was received - * from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made to - * an invalid function - * CY_AS_ERROR_FUNCTION_SUSPENDED - The function to which - * write was attempted is in suspend -*/ -cy_as_return_status_t -cy_as_sdio_direct_write( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Address for IO */ - uint32_t address, - /* Set to CY_SDIO_REARM_INT to reinitialize SDIO interrupt, - set to CY_SDIO_RAW for read after write */ - uint8_t misc_buf, - /* Byte to write */ - uint16_t argument, - /* Buffer to hold byte read from card in Read after write mode */ - uint8_t *data_p - ); - -/* Summary - This function is used to set the blocksize of an SDIO function. - - Description - This function is used to set the blocksize of an SDIO function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory - * available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function - * CY_AS_ERROR_INVALID_BLOCKSIZE - An incorrect blocksize - * was passed to the function. - * CY_AS_ERROR_FUNCTION_SUSPENDED - The function to which - * write was attempted is in suspend -*/ -cy_as_return_status_t -cy_as_sdio_set_blocksize( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Block size to set. */ - uint16_t blocksize - ); - -/* Summary - This function is used to read Multibyte/Block data from a - IO function. - - Description - This function is used to read Multibyte/Block data from a - IO function. This function is to be used only for IO to an - SDIO card as other media will not respond to the SDIO - command set. - - * Valid in Asynchronous Callback: YES - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation is pending - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was received - * from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made to - * an invalid function - * CY_AS_ERROR_INVALID_BLOCKSIZE - An incorrect blocksize or - * block count was passed to the function. - * CY_AS_ERROR_FUNCTION_SUSPENDED - The function to which - * write was attempted is in suspend - * CY_AS_ERROR_IO_ABORTED - The IO operation was aborted - * CY_AS_ERROR_IO_SUSPENDED - The IO operation was suspended - * CY_AS_ERROR_INVALID_REQUEST - An invalid request was - * passed to the card. - -*/ -cy_as_return_status_t -cy_as_sdio_extended_read( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Base Address for IO */ - uint32_t address, - /* Set to CY_SDIO_BLOCKMODE for block IO, - CY_SDIO_BYTEMODE for multibyte IO, - CY_SDIO_OP_FIFO to read multiple bytes from the - same address, CY_SDIO_OP_INCR to read bytes from - the incrementing addresses */ - uint8_t misc_buf, - /* Block/Byte count to read */ - uint16_t argument, - /* Buffer to hold data read from card */ - uint8_t *data_p, - /* Callback in case of Asyncronous call. 0 if Synchronous */ - cy_as_sdio_callback callback - ); - -/* Summary - This function is used to write Multibyte/Block data - to a IO function. - - Description - This function is used to write Multibyte/Block data - to a IO function. This function is to be used only - for IO to an SDIO card as other media will not respond - to the SDIO command set. - - * Valid in Asynchronous Callback: YES - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation is pending - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function - * CY_AS_ERROR_INVALID_BLOCKSIZE - An incorrect blocksize or - * block count was passed to the function. - * CY_AS_ERROR_FUNCTION_SUSPENDED - The function to which - * write was attempted is in suspend - * CY_AS_ERROR_IO_ABORTED - The IO operation was aborted - * CY_AS_ERROR_IO_SUSPENDED - The IO operation was suspended - * CY_AS_ERROR_INVALID_REQUEST - An invalid request was - * passed to the card. -*/ -cy_as_return_status_t -cy_as_sdio_extended_write( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Base Address for IO */ - uint32_t address, - /* Set to CY_SDIO_BLOCKMODE for block IO, - CY_SDIO_BYTEMODE for multibyte IO, - CY_SDIO_OP_FIFO to write multiple bytes to the same address, - CY_SDIO_OP_INCR to write multiple bytes to incrementing - addresses */ - uint8_t misc_buf, - /* Block/Byte count to write - in case of byte mode the count should not exceed the block size - or 512, whichever is smaller. - in case of block mode, maximum number of blocks is 511. */ - uint16_t argument, - /* Buffer to hold data to be written to card. */ - uint8_t *data_p, - /* Callback in case of Asyncronous call. 0 if Synchronous */ - cy_as_sdio_callback callback - ); - -/* Summary - This function is used to initialize a SDIO card function. - - Description - This function is used to initialize a SDIO card function - (1 - 7). This function is to be used only for IO to an - SDIO card as other media will not respond to the SDIO - command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed - * in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error in - * reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function -*/ -cy_as_return_status_t -cy_as_sdio_init_function( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Set to CY_SDIO_FORCE_INIT to reinitialize function */ - uint8_t misc_buf - ); - -/* Summary - This function is used to get properties of a SDIO card function. - - Description - This function is used to get properties of a SDIO card functio - (1 - 7) into a CyAsSDIOFunc structure. This function is to be - used only for IO to an SDIO card as other media will not respond - to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not been - * started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was passed - * in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the media specified does - * not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device pair - * does not exist - * CY_AS_ERROR_INVALID_FUNCTION - An IO request was made to - * an invalid function -*/ -cy_as_return_status_t -cy_as_sdio_query_function( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Buffer to store function properties */ - cy_as_sdio_func *data_p - ); - -/* Summary - This function is used to Abort the current IO function. - - Description - This function is used to Abort the current IO function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified - * media/device pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory - * available - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function -*/ -cy_as_return_status_t -cy_as_sdio_abort_function( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no - ); - -/* Summary - This function is used to Disable IO to an SDIO function. - - Description - This function is used to Disable IO to an SDIO function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is - * in suspend mode - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified media/device - * pair does not exist - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function -*/ -cy_as_return_status_t -cy_as_sdio_de_init_function( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no - ); - -/* Summary - This function is used to Suspend the current IO function. - - Description - This function is used to Suspend the current IO function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has - * not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is in - * suspend mode - * CY_AS_ERROR_SUCCESS - the media information was returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified does not - * exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified - * media/device pair does not exist - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory - * available - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was made - * to an invalid function -*/ -cy_as_return_status_t -cy_as_sdio_suspend( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no - ); - -/* Summary - This function is used to resume a Suspended IO function. - - Description - This function is used to resume a Suspended IO function. - This function is to be used only for IO to an SDIO card as - other media will not respond to the SDIO command set. - - * Valid in Asynchronous Callback: NO - * Valid on Antioch device: NO - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device - * has not been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been - * loaded into West Bridge - * CY_AS_ERROR_NOT_RUNNING - the storage stack has not - * been started - * CY_AS_ERROR_INVALID_HANDLE - an invalid handle was - * passed in - * CY_AS_ERROR_IN_SUSPEND - the West Bridge device is - * in suspend mode - * CY_AS_ERROR_SUCCESS - the media information was - * returned - * CY_AS_ERROR_TIMEOUT - a timeout occurred - * communicating with the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the stack is not running - * CY_AS_ERROR_NO_SUCH_BUS - the bus specified - * does not exist - * CY_AS_ERROR_NO_SUCH_DEVICE - the specified - * media/device pair does not exist - * CY_AS_ERROR_ASYNC_PENDING - an async operation - * is pending - * CY_AS_ERROR_OUT_OF_MEMORY - insufficient memory - * available - * CY_AS_ERROR_INVALID_RESPONSE - an error message was - * received from the firmware - * CY_AS_ERROR_MEDIA_ACCESS_FAILURE - there was error - * in reading from the media - * CY_AS_ERROR_INVALID_FUNCTION - An IO attempt was - * made to an invalid function - * CY_AS_ERROR_IO_ABORTED - The IO operation was - * aborted - * CY_AS_ERROR_IO_SUSPENDED - The IO operation was - * suspended - * CY_AS_ERROR_INVALID_REQUEST - An invalid request was - * passed to the card. - -*/ -cy_as_return_status_t -cy_as_sdio_resume( - /* Handle to the Westbridge device */ - cy_as_device_handle handle, - /* Bus to use */ - cy_as_bus_number_t bus, - /* Device number */ - uint32_t device, - /* IO function Number */ - uint8_t n_function_no, - /* Operation to resume (Read or Write) */ - cy_as_oper_type op, - /* Micellaneous buffer same as for Extended read and Write */ - uint8_t misc_buf, - /* Number of pending blocks for IO. Should be less - than or equal to the maximum defined for extended - read and write */ - uint16_t pendingblockcount, - /* Buffer to continue the Suspended IO operation */ - uint8_t *data_p - ); - - - -/* For supporting deprecated functions */ -#include "cyasstorage_dep.h" - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASSTORAGE_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage_dep.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage_dep.h deleted file mode 100644 index 566b244..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage_dep.h +++ /dev/null @@ -1,309 +0,0 @@ -/* Cypress West Bridge API header file (cyanstorage_dep.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* This header will contain Antioch specific declaration - * of the APIs that are deprecated in Astoria SDK. This is - * for maintaining backward compatibility - */ -#ifndef __INCLUDED_CYANSTORAGE_DEP_H__ -#define __INCLUDED_CYANSTORAGE_DEP_H__ - -#ifndef __doxygen__ - -typedef void (*cy_as_storage_callback_dep)( -/* Handle to the device completing the storage operation */ - cy_as_device_handle handle, - /* The media type completing the operation */ - cy_as_media_type type, - /* The device completing the operation */ - uint32_t device, - /* The unit completing the operation */ - uint32_t unit, - /* The block number of the completed operation */ - uint32_t block_number, - /* The type of operation */ - cy_as_oper_type op, - /* The error status */ - cy_as_return_status_t status - ); - -typedef void (*cy_as_storage_event_callback_dep)( - /* Handle to the device sending the event notification */ - cy_as_device_handle handle, - /* The media type */ - cy_as_media_type type, - /* The event type */ - cy_as_storage_event evtype, - /* Event related data */ - void *evdata - ); - -typedef struct cy_as_storage_query_device_data_dep { - /* The type of media to query */ - cy_as_media_type type; - /* The logical device number to query */ - uint32_t device; - /* The return value for the device descriptor */ - cy_as_device_desc desc_p; -} cy_as_storage_query_device_data_dep; - -typedef struct cy_as_storage_query_unit_data_dep { - /* The type of media to query */ - cy_as_media_type type; - /* The logical device number to query */ - uint32_t device; - /* The unit to query on the device */ - uint32_t unit; - /* The return value for the unit descriptor */ - cy_as_unit_desc desc_p; -} cy_as_storage_query_unit_data_dep; - - -/************ FUNCTIONS *********************/ - -EXTERN cy_as_return_status_t -cy_as_storage_register_callback_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The callback function to call for async storage events */ - cy_as_storage_event_callback_dep callback - ); - -EXTERN cy_as_return_status_t -cy_as_storage_claim_dep(cy_as_device_handle handle, - cy_as_media_type type - ); - -EXTERN cy_as_return_status_t -cy_as_storage_claim_dep_EX( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to claim */ - cy_as_media_type *type, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_storage_release_dep(cy_as_device_handle handle, - cy_as_media_type type - ); - -EXTERN cy_as_return_status_t -cy_as_storage_release_dep_EX( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Handle to the device of interest */ - cy_as_media_type *type, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_storage_query_device_dep( - cy_as_device_handle handle, - cy_as_media_type media, - uint32_t device, - cy_as_device_desc *desc_p - ); - -EXTERN cy_as_return_status_t -cy_as_storage_query_device_dep_EX( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Parameters and return value for the query call */ - cy_as_storage_query_device_data_dep *data, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_storage_query_unit_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to query */ - cy_as_media_type type, - /* The logical device number to query */ - uint32_t device, - /* The unit to query on the device */ - uint32_t unit, - /* The return value for the unit descriptor */ - cy_as_unit_desc *unit_p - ); - -EXTERN cy_as_return_status_t -cy_as_storage_query_unit_dep_EX( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* Parameters and return value for the query call */ - cy_as_storage_query_unit_data_dep *data_p, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_storage_device_control_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Enable/disable control for card detection */ - cy_bool card_detect_en, - /* Enable/disable control for write protect handling */ - cy_bool write_prot_en, - /* Callback to be called when the operation is complete */ - cy_as_function_callback cb, - /* Client data to be passed to the callback */ - uint32_t client - ); - - -EXTERN cy_as_return_status_t -cy_as_storage_read_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to access */ - cy_as_media_type type, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where data will be placed */ - void *data_p, - /* The number of blocks to be read */ - uint16_t num_blocks - ); - -EXTERN cy_as_return_status_t -cy_as_storage_read_async_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to access */ - cy_as_media_type type, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where data will be placed */ - void *data_p, - /* The number of blocks to be read */ - uint16_t num_blocks, - /* The function to call when the read is complete - or an error occurs */ - cy_as_storage_callback_dep callback - ); -EXTERN cy_as_return_status_t -cy_as_storage_write_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to access */ - cy_as_media_type type, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer containing the data to be written */ - void *data_p, - /* The number of blocks to be written */ - uint16_t num_blocks - ); - -EXTERN cy_as_return_status_t -cy_as_storage_write_async_dep( - /* Handle to the device of interest */ - cy_as_device_handle handle, - /* The type of media to access */ - cy_as_media_type type, - /* The device to access */ - uint32_t device, - /* The unit to access */ - uint32_t unit, - /* The first block to access */ - uint32_t block, - /* The buffer where the data to be written is stored */ - void *data_p, - /* The number of blocks to be written */ - uint16_t num_blocks, - /* The function to call when the write is complete - or an error occurs */ - cy_as_storage_callback_dep callback - ); - -EXTERN cy_as_return_status_t -cy_as_storage_sd_register_read_dep( - cy_as_device_handle handle, - cy_as_media_type type, - uint8_t device, - cy_as_sd_card_reg_type reg_type, - uint8_t read_len, - uint8_t *data_p - ); - -EXTERN cy_as_return_status_t -cy_as_storage_sd_register_read_dep_EX( - /* Handle to the West Bridge device. */ - cy_as_device_handle handle, - /* The type of media to query */ - cy_as_media_type type, - /* The device to query */ - uint8_t device, - /* The type of register to read. */ - cy_as_sd_card_reg_type reg_type, - /* Output data buffer and length. */ - cy_as_storage_sd_reg_read_data *data_p, - /* Callback function to call when done. */ - cy_as_function_callback cb, - /* Call context to send to the cb function. */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_storage_create_p_partition_dep( - cy_as_device_handle handle, - cy_as_media_type media, - uint32_t device, - uint32_t size, - cy_as_function_callback cb, - uint32_t client); - -EXTERN cy_as_return_status_t -cy_as_storage_remove_p_partition_dep( - cy_as_device_handle handle, - cy_as_media_type media, - uint32_t device, - cy_as_function_callback cb, - uint32_t client); - -#endif /*__doxygen*/ - -#endif /*__INCLUDED_CYANSTORAGE_DEP_H__*/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastoria.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastoria.h deleted file mode 100644 index b1b18d0..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastoria.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Cypress West Bridge API header file (cyastioch.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASTORIA_H_ -#define _INCLUDED_CYASTORIA_H_ - -#if !defined(__doxygen__) - -#include "cyaserr.h" -#include "cyasmisc.h" -#include "cyasstorage.h" -#include "cyasusb.h" -#include "cyasmtp.h" - -#endif - -#endif - diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastsdkversion.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastsdkversion.h deleted file mode 100644 index a3c10aa..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastsdkversion.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Cypress Astoria Sdk Version file (cyastsdkversion.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street, Fifth Floor -## Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASTSDK_VERSION_H_ -#define _INCLUDED_CYASTSDK_VERSION_H_ - -/* Astoria SDK version 1.2.1 */ -#define CYAS_MAJOR_VERSION (1) -#define CYAS_MINOR_VERSION (2) -#define CYAS_BUILD_NUMBER (197) - -#endif /*_INCLUDED_CYASTSDK_VERSION_H_*/ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastypes.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastypes.h deleted file mode 100644 index 18043c1..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyastypes.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Cypress West Bridge API header file (cyastypes.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASTYPES_H_ -#define _INCLUDED_CYASTYPES_H_ -/* moved to staging location, eventual implementation - * considered is here -#include -*/ - #include "../../../arch/arm/plat-omap/include/mach/westbridge/cyashaldef.h" - -/* Types that are not available on specific platforms. - * These are used only in the reference HAL implementations and - * are not required for using the API. - */ -#ifdef __unix__ -typedef unsigned long DWORD; -typedef void *LPVOID; -#define WINAPI -#define INFINITE (0xFFFFFFFF) -#define ptr_to_uint(ptr) ((unsigned int)(ptr)) -#endif - -/* Basic types used by the entire API */ - -/* Summary - This type represents an endpoint number -*/ -typedef uint8_t cy_as_end_point_number_t; - -/* Summary - This type is used to return status information from - an API call. -*/ -typedef uint16_t cy_as_return_status_t; - -/* Summary - This type represents a bus number -*/ -typedef uint32_t cy_as_bus_number_t; - -/* Summary - All APIs provided with this release are marked extern - through this definition. This definition can be changed - to meet the scope changes required in the user build - environment. - - For example, this can be changed to __declspec(exportdll) - to enable exporting the API from a DLL. - */ -#define EXTERN extern - -#endif diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb.h deleted file mode 100644 index e3ba9ca..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb.h +++ /dev/null @@ -1,1862 +0,0 @@ -/* Cypress West Bridge API header file (cyasusb.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -#ifndef _INCLUDED_CYASUSB_H_ -#define _INCLUDED_CYASUSB_H_ - -#include "cyasmisc.h" - -#include "cyas_cplus_start.h" - -/*@@Enumeration Model - Summary - The USB enumeration process is the process of communicating - to the USB host information - about the capabilities of the connected device. This - process is completed by servicing - requests for various types of descriptors. In the software - APIs described below, this - process is controlled in one of two ways. - - Description - There are advantages to either type of enumeration - and this is why both models are supported. - P Port processor based enumeraton gives the P port - processor maximum control and flexibility - for providing USB configuration information. However, - this does require (near) real time data - responses from the P port processor during the enumeration - process. West Bridge based enumeration - requires no real time information from the P port processor, - ensuring the fastest possible - enumeration times. - - * P Port Based Enumeration * - The first method for handling USB enumeration is for the - processor client to handle all - endpoint zero requests for descriptors. This mode is - configured by indicating to the API - that the processor wants to handle all endpoint zero - requests. This is done by setting - bit 0 in the end_point_mask to a 1. The processor uses - CyAsUsbReadDataAsync() to read the request and - CyAsUsbWriteDataAsync() to write the response. - - * West Bridge Based Enumeration * - The second method for handling USB enumeration is the - configuration information method. - Before enabling a connection from the West Bridge device - to the USB connector, the P Port - processor sends information about the USB configuration to - West Bridge through the configuration - APIs. This information is stored within the West Bridge - device. When a USB cable is attached, - the West Bridge device then handles all descriptor requests - based on the stored information. - Note that this method of enumeration only supports a single - USB configuration. - - In either model of enumeration, the processor client is - responsible for ensuring that - the system meets USB Chapter 9 compliance requirements. This - can be done by providing spec - compliant descriptors, and handling any setup packets that - are sent to the client - appropriately. - - Mass storage class compliance will be ensured by the West - Bridge firmware when the mass - storage functionality is enabled. -*/ - -/*@@Endpoint Configuration - Summary - The West Bridge device has one 64-byte control endpoint, one - 64-byte low bandwidth endpoint, four bulk - endpoints dedicated for mass storage usage, and up to ten - bulk/interrupt/isochronous - endpoints that can be used for USB-to-Processor communication. - - Description - The four storage endpoints (Endpoints 2, 4, 6 and 8) are - reserved for accessing storage - devices attached to West Bridge and are not available for use - by the processor. These are - used implicitly when using the storage API to read/write to - the storage media. - - Endpoint 0 is the standard USB control pipe used for all - enumeration activity. Though - the endpoint buffer is not directly accessible from the - processor, read/write activity - can be performed on this endpoint through the API layers. - This endpoint is always - configured as a bi-directional control endpoint. - - Endpoint 1 is a 64-byte endpoint that can be used for low - bandwidth bulk/interrupt - activity. The physical buffer is not accessible from the - processor, but can be read/written - through the API. As the data coming to this endpoint is - being handled through the - software layers, there can be loss of data if a read call - is not waiting when an OUT - packet arrives. - - Endpoints 3, 5, 7, 9, 10, 11, 12, 13, 14 and 15 are ten - configurable endpoints - mapped to parts of a total 4 KB FIFO buffer space on the - West Bridge device. This 4 KB - physical buffer space is divided into up to four endpoints - called PEP1, PEP2, PEP3 and PEP4 - in this software document. There are multiple configurations - in which this buffer space - can be used, and the size and number of buffers available to - each physical endpoint - vary between these configurations. See the West Bridge PDD - for details on the buffer - orientation corresponding to each configuration. - - * Note * - PEPs 1, 2, 3 and 4 are called Physical EP 3, 5, 7 and 9 in the - West Bridge PDD. The - sequential number scheme is used in the software to disambiguate - these from the logical - endpoint numbers, and also for convenience of array indexing. -*/ - -#if !defined(__doxygen__) - - -#endif - -/* Summary - This constants defines the maximum size of a USB descriptor - when referenced via the CyAsUsbSetDescriptor or - CyAsUsbGetDescriptor functions. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor -*/ -#define CY_AS_MAX_USB_DESCRIPTOR_SIZE (128) - -/*************************************** - * West Bridge Types - ***************************************/ - - -/* Summary - This data structure is the data passed via the evdata paramater - on a usb event callback for the inquiry request. - - Description - When a SCSI inquiry request arrives via the USB connection and - the P Port has asked - to receive inquiry requests, this request is forwarded to the - client via the USB - callback. This callback is called twice, once before the - inquiry data is forwarded - to the host (CyAsEventUsbInquiryBefore) and once after the - inquiry has been sent to the - USB host (CyAsEventUsbInquiryAfter). The evdata parameter - is a pointer to this data - structure. - - *CyAsEventUsbInquiryBefore* - If the client just wishes to see the inquiry request and - associated data, then a simple - return from the callback will forward the inquiry response - to the USB host. If the - client wishes to change the data returned to the USB host, - the updated parameter must - be set to CyTrue and the memory area address by the data - parameter should be updated. - The data pointer can be changed to point to a new memory - area and the length field - changed to change the amount of data returned from the - inquiry request. Note that the - data area pointed to by the data parameter must remain - valid and the contents must - remain consistent until after the CyAsEventUsbInquiryAfter - event has occurred. THE LENGTH - MUST BE LESS THAN 192 BYTES OR THE CUSTOM INQUIRY RESPONSE - WILL NOT BE RETURNED. If the - length is too long, the default inquiry response will be - returned. - - *CyAsEventUsbInquiryAfter* - If the client needs to free any data, this event signals that - the data associated with the inquiry is no longer needed. - - See Also - * CyAsUsbEventCallback - * CyAsUsbRegisterCallback -*/ -typedef struct cy_as_usb_inquiry_data { - /* The bus for the event */ - cy_as_bus_number_t bus; - /* The device the event */ - uint32_t device; - /* The EVPD bit from the SCSI INQUIRY request */ - uint8_t evpd; - /* The codepage in the inquiry request */ - uint8_t codepage; - /* This bool must be set to CyTrue indicate that the inquiry - data was changed */ - cy_bool updated; - /* The length of the data */ - uint16_t length; - /* The inquiry data */ - void *data; -} cy_as_usb_inquiry_data; - - -/* Summary - This data structure is the data passed via the evdata - parameter on a usb event - callback for the unknown mass storage request. - - Description - When a SCSI request is made that the mass storage - firmware in West Bridge does not - know how to process, this request is passed to the - processor for handling via - the usb callback. This data structure is used to - pass the request and the - associated response. The user may set the status - to indicate the status of the - request. The status value is the bCSWStatus value - from the USB mass storage - Command Status Wrapper (0 = command passed, 1 = - command failed). If the status - is set to command failed (1), the sense information - should be set as well. For - more information about sense information, see the - USB mass storage specification - as well as the SCSI specifications for block devices. - By default the status is - initialized to 1 (failure) with a sense information - of 05h/20h/00h which - indicates INVALID COMMAND. -*/ -typedef struct cy_as_usb_unknown_command_data { - /* The bus for the event */ - cy_as_bus_number_t bus; - /* The device for the event */ - uint32_t device; - - uint16_t reqlen; - /* The request */ - void *request; - - /* The returned status value for the command */ - uint8_t status; - /* If status is failed, the sense key */ - uint8_t key; - /* If status is failed, the additional sense code */ - uint8_t asc; - /* If status if failed, the additional sense code qualifier */ - uint8_t ascq; -} cy_as_usb_unknown_command_data; - - -/* Summary - This data structure is the data passed via the evdata - paramater on a usb event callback for the start/stop request. - - Description - When a SCSI start stop request arrives via the USB connection - and the P Port has asked - - See Also - * CyAsUsbEventCallback - * CyAsUsbRegisterCallback -*/ -typedef struct cy_as_usb_start_stop_data { - /* The bus for the event */ - cy_as_bus_number_t bus; - /* The device for the event */ - uint32_t device; - /* CyTrue means start request, CyFalse means stop request */ - cy_bool start; - /* CyTrue means LoEj bit set, otherwise false */ - cy_bool loej; -} cy_as_usb_start_stop_data; - -/* Summary - This data type is used to indicate which mass storage devices - are enumerated. - - Description - - See Also - * CyAsUsbEnumControl - * CyAsUsbSetEnumConfig -*/ -typedef enum cy_as_usb_mass_storage_enum { - cy_as_usb_nand_enum = 0x01, - cy_as_usb_sd_enum = 0x02, - cy_as_usb_mmc_enum = 0x04, - cy_as_usb_ce_ata_enum = 0x08 -} cy_as_usb_mass_storage_enum; - -/* Summary - This data type specifies the type of descriptor to transfer - to the West Bridge device - - Description - During enumeration, if West Bridge is handling enumeration, - the West Bridge device needs to USB descriptors - to complete the enumeration. The function CyAsUsbSetDescriptor() - is used to transfer the descriptors - to the West Bridge device. This type is an argument to that - function and specifies which descriptor - is being transferred. - - See Also - * CyAsUsbSetDescriptor - * CyAsUsbGetDescriptor -*/ -typedef enum cy_as_usb_desc_type { - /* A device descriptor - See USB 2.0 specification Chapter 9 */ - cy_as_usb_desc_device = 1, - /* A device descriptor qualifier - - * See USB 2.0 specification Chapter 9 */ - cy_as_usb_desc_device_qual = 2, - /* A configuration descriptor for FS operation - - * See USB 2.0 specification Chapter 9 */ - cy_as_usb_desc_f_s_configuration = 3, - /* A configuration descriptor for HS operation - - * See USB 2.0 specification Chapter 9 */ - cy_as_usb_desc_h_s_configuration = 4, - cy_as_usb_desc_string = 5 -} cy_as_usb_desc_type; - -/* Summary - This type specifies the direction of an endpoint - - Description - This type is used when configuring the endpoint hardware - to specify the direction - of the endpoint. - - See Also - * CyAsUsbEndPointConfig - * CyAsUsbSetEndPointConfig - * CyAsUsbGetEndPointConfig -*/ -typedef enum cy_as_usb_end_point_dir { - /* The endpoint direction is IN (West Bridge -> USB Host) */ - cy_as_usb_in = 0, - /* The endpoint direction is OUT (USB Host -> West Bridge) */ - cy_as_usb_out = 1, - /* The endpoint direction is IN/OUT (valid only for EP 0 & 1) */ - cy_as_usb_in_out = 2 -} cy_as_usb_end_point_dir; - -/* Summary - This type specifies the type of an endpoint - - Description - This type is used when configuring the endpoint hardware - to specify the type of endpoint. - - See Also - * CyAsUsbEndPointConfig - * CyAsUsbSetEndPointConfig - * CyAsUsbGetEndPointConfig -*/ -typedef enum cy_as_usb_end_point_type { - cy_as_usb_control, - cy_as_usb_iso, - cy_as_usb_bulk, - cy_as_usb_int -} cy_as_usb_end_point_type; - -/* Summary - This type is a structure used to indicate the top level - configuration of the USB stack - - Description - In order to configure the USB stack, the CyAsUsbSetEnumConfig() - function is called to indicate - how mass storage is to be handled, the specific number of - interfaces to be supported if - West Bridge is handling enumeration, and the end points of - specifi interest. This structure - contains this information. - - See Also - * CyAsUsbSetConfig - * CyAsUsbGetConfig - * -*/ -typedef struct cy_as_usb_enum_control { - /* Designate which devices on which buses to enumerate */ - cy_bool devices_to_enumerate[CY_AS_MAX_BUSES] - [CY_AS_MAX_STORAGE_DEVICES]; - /* If true, West Bridge will control enumeration. If this - * is false the P port controls enumeration. if the P port - * is controlling enumeration, traffic will be received via - * endpoint zero. */ - cy_bool antioch_enumeration; - /* This is the interface # to use for the mass storage - * interface, if mass storage is enumerated. if mass - * storage is not enumerated this value should be zero. */ - uint8_t mass_storage_interface; - /* This is the interface # to use for the MTP interface, - * if MTP is enumerated. if MTP is not enumerated - * this value should be zero. */ - uint8_t mtp_interface; - /* If true, Inquiry, START/STOP, and unknown mass storage - * requests cause a callback to occur for handling by the - * baseband processor. */ - cy_bool mass_storage_callbacks; -} cy_as_usb_enum_control; - - -/* Summary - This structure is used to configure a single endpoint - - Description - This data structure contains all of the information required - to configure the West Bridge hardware - associated with a given endpoint. - - See Also - * CyAsUsbSetEndPointConfig - * CyAsUsbGetEndPointConfig -*/ -typedef struct cy_as_usb_end_point_config { - /* If true, this endpoint is enabled */ - cy_bool enabled; - /* The direction of this endpoint */ - cy_as_usb_end_point_dir dir; - /* The type of endpoint */ - cy_as_usb_end_point_type type; - /* The physical endpoint #, 1, 2, 3, 4 */ - cy_as_end_point_number_t physical; - /* The size of the endpoint in bytes */ - uint16_t size; -} cy_as_usb_end_point_config; - -/* Summary - List of partition enumeration combinations that can - be selected on a partitioned storage device. - - Description - West Bridge firmware supports creating up to two - partitions on mass storage devices connected to - West Bridge. When there are two partitions on a device, - the user can choose which of these partitions should be - made visible to a USB host through the mass storage - interface. This enumeration lists the various enumeration - selections that can be made. - - See Also - * CyAsStorageCreatePPartition - * CyAsStorageRemovePPartition - * CyAsUsbSelectMSPartitions - */ -typedef enum cy_as_usb_m_s_type_t { - /* Enumerate only partition 0 as CD (autorun) device */ - cy_as_usb_m_s_unit0 = 0, - /* Enumerate only partition 1 as MS device (default setting) */ - cy_as_usb_m_s_unit1, - /* Enumerate both units */ - cy_as_usb_m_s_both -} cy_as_usb_m_s_type_t; - -/* Summary - This type specifies the type of USB event that has occurred - - Description - This type is used in the USB event callback function to - indicate the type of USB event that has occurred. The callback - function includes both this reasons for the callback and a data - parameter associated with the reason. The data parameter is used - in a reason specific way and is documented below with each reason. - - See Also - * CyAsUsbIoCallback -*/ -typedef enum cy_as_usb_event { - /* This event is sent when West Bridge is put into the suspend - state by the USB host. the data parameter is not used and - will be zero. */ - cy_as_event_usb_suspend, - /* This event is sent when West Bridge is taken out of the - suspend state by the USB host. the data parameter is not - used and will be zero. */ - cy_as_event_usb_resume, - /* This event is sent when a USB reset request is received - by the west bridge device. the data parameter is not used and - will be zero. */ - cy_as_event_usb_reset, - /* This event is sent when a USB set configuration request is made. - the data parameter is a pointer to a uint16_t that contains the - configuration number. the configuration number may be zero to - indicate an unconfigure operation. */ - cy_as_event_usb_set_config, - /* This event is sent when the USB connection changes speed. This is - generally a transition from full speed to high speed. the parameter - to this event is a pointer to uint16_t that gives the speed of the - USB connection. zero indicates full speed, one indicates high speed */ - cy_as_event_usb_speed_change, - /* This event is sent when a setup packet is received. - * The data parameter is a pointer to the eight bytes of setup data. */ - cy_as_event_usb_setup_packet, - /* This event is sent when a status packet is received. The data - parameter is not used. */ - cy_as_event_usb_status_packet, - /* This event is sent when mass storage receives an inquiry - request and we have asked to see these requests. */ - cy_as_event_usb_inquiry_before, - /* This event is sent when mass storage has finished processing an - inquiry request and any data associated with the request is no longer - required. */ - cy_as_event_usb_inquiry_after, - /* This event is sent when mass storage receives a start/stop - * request and we have asked to see these requests */ - cy_as_event_usb_start_stop, - /* This event is sent when a Clear Feature request is received. - * The data parameter is the endpoint number. */ - cy_as_event_usb_clear_feature, - /* This event is sent when mass storage receives a request - * that is not known and we have asked to see these requests */ - cy_as_event_usb_unknown_storage, - /* This event is sent when the read/write activity on the USB mass - storage has crossed a pre-set level */ - cy_as_event_usb_m_s_c_progress -} cy_as_usb_event; - -/* Summary - This type is the type of a callback function that is - called when a USB event occurs - - Description - At times West Bridge needs to inform the P port processor - of events that have - occurred. These events are asynchronous to the thread of - control on the P - port processor and as such are generally delivered via a - callback function that - is called as part of an interrupt handler. This type - defines the type of function - that must be provided as a callback function for USB events. - - See Also - * CyAsUsbEvent -*/ -typedef void (*cy_as_usb_event_callback)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The event type being reported */ - cy_as_usb_event ev, - /* The data assocaited with the event being reported */ - void *evdata -); - - -/* Summary - This type is the callback function called after an - asynchronous USB read/write operation - - Description - This function type defines a callback function that is - called at the completion of any - asynchronous read or write operation. - - See Also - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync - * CY_AS_ERROR_CANCELED -*/ -typedef void (*cy_as_usb_io_callback)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The endpoint that has completed an operation */ - cy_as_end_point_number_t ep, - /* THe amount of data transferred to/from USB */ - uint32_t count, - /* The data buffer for the operation */ - void *buffer, - /* The error status of the operation */ - cy_as_return_status_t status -); - -/* Summary - This type is the callback function called after asynchronous - API functions have completed. - - Description - When calling API functions from callback routines (interrupt - handlers usually) the async version of - these functions must be used. This callback is called when an - asynchronous API function has completed. -*/ -typedef void (*cy_as_usb_function_callback)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The error status of the operation */ - cy_as_return_status_t status, - /* A client supplied 32 bit tag */ - uint32_t client -); - - -/******************************************** - * West Bridge Functions - ********************************************/ - -/* Summary - This function starts the USB stack - - Description - This function initializes the West Bridge USB software - stack if it has not yet been stared. - This initializes any required data structures and powers - up any USB specific portions of - the West Bridge hardware. If the stack had already been - started, the USB stack reference count - is incremented. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - This function cannot be called from any type of West Bridge - callback. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_SUCCESS - the stack initialized and is ready - * for use - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating - * with the West Bridge device - - See Also - * CyAsUsbStop -*/ -EXTERN cy_as_return_status_t -cy_as_usb_start( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function stops the USB stack - - Description - This function decrements the reference count for - the USB stack and if this count - is zero, the USB stack is shut down. The shutdown - frees all resources associated - with the USB stack. - - * Valid In Asynchronous Callback: NO - - Notes - While all resources associated with the USB stack will - be freed is a shutdown occurs, - resources associated with underlying layers of the software - will not be freed if they - are shared by the storage stack and the storage stack is active. - Specifically the DMA manager, - the interrupt manager, and the West Bridge communications module - are all shared by both the - USB stack and the storage stack. - - Returns - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - - See Also - * CyAsUsbStart -*/ -EXTERN cy_as_return_status_t -cy_as_usb_stop( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function registers a callback function to be called when an - asynchronous USB event occurs - - Description - When asynchronous USB events occur, a callback function can be - called to alert the calling program. This - functions allows the calling program to register a callback. - - * Valid In Asynchronous Callback: YES -*/ -EXTERN cy_as_return_status_t -cy_as_usb_register_callback( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The function to call */ - cy_as_usb_event_callback callback - ); - - -/* Summary - This function connects the West Bridge device D+ and D- signals - physically to the USB host. - - Description - The West Bridge device has the ability to programmatically - disconnect the USB pins on the device - from the USB host. This feature allows for re-enumeration of - the West Bridge device as a different - device when necessary. This function connects the D+ and D- - signal physically to the USB host - if they have been previously disconnected. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - - See Also - * CyAsUsbDisconnect -*/ -EXTERN cy_as_return_status_t -cy_as_usb_connect( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function disconnects the West Bridge device D+ and D- - signals physically from the USB host. - - Description - The West Bridge device has the ability to programmatically - disconnect the USB pins on the device - from the USB host. This feature allows for re-enumeration - of the West Bridge device as a different - device when necessary. This function disconnects the D+ - and D- signal physically from the USB host - if they have been previously connected. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - - See Also - * CyAsUsbConnect -*/ -EXTERN cy_as_return_status_t -cy_as_usb_disconnect( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function configures the USB stack - - Description - This function is used to configure the USB stack. It is - used to indicate which endpoints are going to - be used, and how to deal with the mass storage USB device - within West Bridge. - - * Valid In Asynchronous Callback: Yes (if cb supplied) - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - - See Also - * CyAsUsbGetEnumConfig - * CyAsUsbEnumControl - */ -EXTERN cy_as_return_status_t -cy_as_usb_set_enum_config( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The USB configuration information */ - cy_as_usb_enum_control *config_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function retreives the current configuration of - the USB stack - - Description - This function sends a request to West Bridge to retrieve - the current configuration - - * Valid In Asynchronous Callback: Yes (if cb supplied) - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - - See Also - * CyAsUsbSetConfig - * CyAsUsbConfig - */ -EXTERN cy_as_return_status_t -cy_as_usb_get_enum_config( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The return value for USB congifuration information */ - cy_as_usb_enum_control *config_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function sets the USB descriptor - - Description - This function is used to set the various descriptors - assocaited with the USB enumeration - process. This function should only be called when the - West Bridge enumeration model is selected. - Descriptors set using this function can be cleared by - stopping the USB stack, or by calling - the CyAsUsbClearDescriptors function. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - These descriptors are described in the USB 2.0 specification, - Chapter 9. - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_DESCRIPTOR - the descriptor passed is - * not valid - * CY_AS_ERROR_BAD_INDEX - a bad index was given for the type - * of descriptor given - * CY_AS_ERROR_BAD_ENUMERATION_MODE - this function cannot be - * called if the P port processor doing enumeration - - See Also - * CyAsUsbGetDescriptor - * CyAsUsbClearDescriptors - * -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_descriptor( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The type of descriptor */ - cy_as_usb_desc_type type, - /* Only valid for string descriptors */ - uint8_t index, - /* The descriptor to be transferred */ - void *desc_p, - /* The length of the descriptor in bytes */ - uint16_t length, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function clears all user descriptors stored - on the West Bridge. - - Description - This function is used to clear all descriptors that - were previously - stored on the West Bridge through CyAsUsbSetDescriptor - calls, and go back - to the default descriptor setup in the firmware. This - function should - only be called when the Antioch enumeration model is - selected. - - * Valid In Asynchronous Callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - all descriptors cleared successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_BAD_ENUMERATION_MODE - this function cannot be - * called if the P port processor is doing enumeration - - See Also - * CyAsUsbSetDescriptor - * -*/ -EXTERN cy_as_return_status_t -cy_as_usb_clear_descriptors( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); -/* Summary - This structure contains the descriptor buffer to be - filled by CyAsUsbGetDescriptor API. - - Description - This data structure the buffer to hold the descriptor - data, and an in/out parameter ti indicate the - length of the buffer and descriptor data in bytes. - - See Also - * CyAsUsbGetDescriptor -*/ -typedef struct cy_as_get_descriptor_data { - /* The buffer to hold the returned descriptor */ - void *desc_p; - /* This is an input and output parameter. - * Before the code this pointer points to a uint32_t - * that contains the length of the buffer. after - * the call, this value contains the amount of data - * actually returned. */ - uint32_t length; - -} cy_as_get_descriptor_data; - -/* Summary - This function retreives a given descriptor from the - West Bridge device - - Description - This function retreives a USB descriptor from the West - Bridge device. This function should only be called when the - West Bridge enumeration model is selected. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Notes - These descriptors are described in the USB 2.0 specification, - Chapter 9. - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_BAD_INDEX - a bad index was given for the type of - * descriptor given - * CY_AS_ERROR_BAD_ENUMERATION_MODE - this function cannot be - * called if the P port processor doing enumeration - - See Also - * CyAsUsbSetDescriptor - * -*/ - -EXTERN cy_as_return_status_t -cy_as_usb_get_descriptor( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The type of descriptor */ - cy_as_usb_desc_type type, - /* Index for string descriptor */ - uint8_t index, - /* Parameters and return value for the get descriptor call */ - cy_as_get_descriptor_data *data, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function sets the configuration of the physical - endpoints into one of the twelve supported configuration - - Description - USB endpoints are mapped onto one of four physical - endpoints in the device. Therefore - USB endpoints are known as logical endpoints and these - logical endpoints are mapped to - one of four physical endpoints. In support of these - four physical endpoints there is - four kilo-bytes of buffer spaces that can be used as - buffers for these physical endpoints. - This 4K of buffer space can be configured in one of - twelve ways. This function sets the - buffer configuration for the physical endpoints. - - * Config 1: PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (2 * 512), PEP4 (2 * 512) - * Config 2: PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (4 * 512), PEP4 (N/A) - * Config 3: PEP1 (2 * 512), PEP2 (2 * 512), - * PEP3 (2 * 1024), PEP4(N/A) - * Config 4: PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (2 * 512), PEP4 (2 * 512) - * Config 5: PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (4 * 512), PEP4 (N/A) - * Config 6: PEP1 (4 * 512), PEP2 (N/A), - * PEP3 (2 * 1024), PEP4 (N/A) - * Config 7: PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (2 * 512), PEP4 (2 * 512) - * Config 8: PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (4 * 512), PEP4 (N/A) - * Config 9: PEP1 (2 * 1024), PEP2 (N/A), - * PEP3 (2 * 1024), PEP4 (N/A) - * Config 10: PEP1 (3 * 512), PEP2 (N/A), - * PEP3 (3 * 512), PEP4 (2 * 512) - * Config 11: PEP1 (3 * 1024), PEP2 (N/A), - * PEP3 (N/A), PEP4 (2 * 512) - * Config 12: PEP1 (4 * 1024), PEP2 (N/A), - * PEP3 (N/A), PEP4 (N/A) - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_CONFIGURATION - the configuration given - * is not between 1 and 12 -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_physical_configuration( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The physical endpoint configuration number */ - uint8_t config - ); - -/* Summary - This function sets the hardware configuration for a given endpoint - - Description - This function sets the hardware configuration for a given endpoint. - This is the method to set the direction of the endpoint, the type - of endpoint, the size of the endpoint buffer, and the buffering - style for the endpoint. - - * Valid In Asynchronous Callback: NO - - Notes - Add documentation about endpoint configuration limitations - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is invalid - * CY_AS_ERROR_INVALID_CONFIGURATION - the endpoint configuration - * given is not valid - * CY_AS_ERROR_ENDPOINT_CONFIG_NOT_SET - the physical endpoint - * configuration is not set - - See Also - * CyAsUsbGetEndPointConfig - * CyAsUsbEndPointConfig -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_end_point_config( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The configuration information for the endpoint */ - cy_as_usb_end_point_config *config_p - ); - -/* Summary - This function retreives the hardware configuration for - a given endpoint - - Description - This function gets the hardware configuration for the given - endpoint. This include information about the direction of - the endpoint, the type of endpoint, the size of the endpoint - buffer, and the buffering style for the endpoint. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is - * invalid - - See Also - * CyAsUsbSetEndPointConfig - * CyAsUsbEndPointConfig -*/ -EXTERN cy_as_return_status_t -cy_as_usb_get_end_point_config( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest*/ - cy_as_end_point_number_t ep, - /* The return value containing the endpoint config - * information */ - cy_as_usb_end_point_config *config_p - ); - -/* Summary - This function commits the configuration information that - has previously been set. - - Description - The initialization process involves calling CyAsUsbSetEnumConfig() - and CyAsUsbSetEndPointConfig(). These - functions do not actually send the configuration information to - the West Bridge device. Instead, these - functions store away the configuration information and this - CyAsUsbCommitConfig() actually finds the - best hardware configuration based on the requested endpoint - configuration and sends this optimal - confiuration down to the West Bridge device. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - a configuration was found and sent - * to West Bridge - * CY_AS_ERROR_NOT_CONFIGURED - the West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - the firmware has not been loaded - * into West Bridge - * CY_AS_ERROR_INVALID_CONFIGURATION - the configuration requested - * is not possible - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - - See Also - * CyAsUsbSetEndPointConfig - * CyAsUsbSetEnumConfig -*/ - -EXTERN cy_as_return_status_t -cy_as_usb_commit_config( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function reads data from a USB endpoint. - - Description - This function reads data from an OUT. This function blocks - until the read is complete. - If this is a packet read, a single received USB packet will - complete the read. If this - is not a packet read, this function will block until all of - the data requested has been - recevied. - - * Valid In Asynchronous Callback: NO - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is - * invalid - - See Also - * CyAsUsbReadDataAsync - * CyAsUsbWriteData - * CyAsUsbWriteDataAsync -*/ -EXTERN cy_as_return_status_t -cy_as_usb_read_data( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* If CyTrue, this is a packet read */ - cy_bool pktread, - /* The amount of data to read */ - uint32_t dsize, - /* The amount of data read */ - uint32_t *dataread, - /* The buffer to hold the data read */ - void *data - ); - -/* Summary - This function reads data from a USB endpoint - - Description - This function reads data from an OUT endpoint. This - function will return immediately and the callback - provided will be called when the read is complete. - If this is a packet read, then the callback will be - called on the next received packet. If this is not a - packet read, the callback will be called when the - requested data is received. - - * Valid In Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is - * invalid - - See Also - * CyAsUsbReadData - * CyAsUsbWriteData - * CyAsUsbWriteDataAsync -*/ -EXTERN cy_as_return_status_t -cy_as_usb_read_data_async( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* If CyTrue, this is a packet read */ - cy_bool pktread, - /* The amount of data to read */ - uint32_t dsize, - /* The buffer for storing the data */ - void *data, - /* The callback function to call when the data is read */ - cy_as_usb_io_callback callback - ); - -/* Summary - This function writes data to a USB endpoint - - Description - This function writes data to an IN endpoint data buffer. - Multiple USB packets may be sent until all data requeste - has been sent. This function blocks until all of the data - has been sent. - - * Valid In Asynchronous Callback: NO - - Notes - Calling this function with a dsize of zero will result in - a zero length packet transmitted to the USB host. - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is - * invalid - - See Also - * CyAsUsbReadData - * CyAsUsbReadDataAsync - * CyAsUsbWriteDataAsync -*/ -EXTERN cy_as_return_status_t -cy_as_usb_write_data( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint to write data to */ - cy_as_end_point_number_t ep, - /* The size of the data to write */ - uint32_t dsize, - /* The data buffer */ - void *data - ); - -/* Summary - This function writes data to a USB endpoint - - Description - This function writes data to an IN endpoint data buffer. - This function returns immediately and when the write - completes, or if an error occurs, the callback function - is called to indicate completion of the write operation. - - * Valid In Asynchronous Callback: YES - - Notes - Calling this function with a dsize of zero will result - in a zero length packet transmitted to the USB host. - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down successfully - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint parameter is - * invalid - - See Also - * CyAsUsbReadData - * CyAsUsbReadDataAsync - * CyAsUsbWriteData -*/ -EXTERN cy_as_return_status_t -cy_as_usb_write_data_async( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint to write data to */ - cy_as_end_point_number_t ep, - /* The size of the data */ - uint32_t dsize, - /* The buffer containing the data */ - void *data, - /* If true, send a short packet to terminate data */ - cy_bool spacket, - /* The callback to call when the data is written */ - cy_as_usb_io_callback callback - ); - -/* Summary - This function aborts an outstanding asynchronous - operation on a given endpoint - - Description - This function aborts any outstanding operation that is - pending on the given endpoint. - - * Valid In Asynchronous Callback: YES - - Returns - * CY_AS_ERROR_SUCCESS - this module was shut down - * successfully - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not - * running - * CY_AS_ERROR_ASYNC_NOT_PENDING - no asynchronous USB - * operation was pending - - See Also - * CyAsUsbReadData - * CyAsUsbReadDataAsync - * CyAsUsbWriteData - * CyAsUsbWriteDataAsync -*/ -EXTERN cy_as_return_status_t -cy_as_usb_cancel_async( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep - ); - -/* Summary - This function sets a stall condition on a given endpoint - - Description - This function sets a stall condition on the given endpoint. - If the callback function is not zero, the function is - executed asynchronously and the callback is called when - the function is completed. If the callback function is - zero, this function executes synchronously and will not - return until the function has completed. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was invalid, - * or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK (only if no cb supplied) - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbGetStall - * CyAsUsbClearStall -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_stall( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client -); - -/* Summary - This function clears a stall condition on a given endpoint - - Description - This function clears a stall condition on the given endpoint. - If the callback function is not zero, the function is - executed asynchronously and the callback is called when the - function is completed. If the callback function is zero, this - function executes synchronously and will not return until the - function has completed. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was invalid, - * or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK (only if no cb supplied) - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbGetStall - * CyAsUsbSetStall -*/ - -EXTERN cy_as_return_status_t -cy_as_usb_clear_stall( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - - -/* Summary - This function returns the stall status for a given endpoint - - Description - This function returns the stall status for a given endpoint - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was invalid, - * or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbGetStall - * CyAsUsbSetStall - * CyAsUsbClearStall -*/ - -EXTERN cy_as_return_status_t -cy_as_usb_get_stall( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The return value for the stall state */ - cy_bool *stall_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function sets a NAK condition on a given endpoint - - Description - This function sets a NAK condition on the given endpoint. - If the callback function is not zero, the function is - executed asynchronously and the callback is called when - the function is completed. If the callback function is - zero, this function executes synchronously and will not - return until the function has completed. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was - * invalid, or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK (only if no cb supplied) - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbGetNak - * CyAsUsbClearNak -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_nak( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client -); - -/* Summary - This function clears a NAK condition on a given endpoint - - Description - This function clears a NAK condition on the given endpoint. - If the callback function is not zero, the function is - executed asynchronously and the callback is called when the - function is completed. If the callback function is zero, - this function executes synchronously and will not return - until the function has completed. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was invalid, - * or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK (only if no cb supplied) - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbGetNak - * CyAsUsbSetNak -*/ -EXTERN cy_as_return_status_t -cy_as_usb_clear_nak( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function returns the NAK status for a given endpoint - - Description - This function returns the NAK status for a given endpoint - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_INVALID_ENDPOINT - the endpoint given was invalid, - * or was not configured as an OUT endpoint - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - - See Also - * CyAsUsbSetNak - * CyAsUsbClearNak -*/ -EXTERN cy_as_return_status_t -cy_as_usb_get_nak( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The return value for the stall state */ - cy_bool *nak_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client -); - -/* Summary - This function triggers a USB remote wakeup from the Processor - API - - Description - When there is a Suspend condition on the USB bus, this function - programmatically takes the USB bus out of thi suspend state. - - * Valid In Asynchronous Callback: YES (if cb supplied) - * Nestable: YES - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - * CY_AS_ERROR_INVALID_IN_CALLBACK - * CY_AS_ERROR_OUT_OF_MEMORY - * CY_AS_ERROR_INVALID_RESPONSE - * CY_AS_ERROR_NOT_IN_SUSPEND - -*/ -EXTERN cy_as_return_status_t -cy_as_usb_signal_remote_wakeup( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - This function sets the threshold levels for mass storage progress - reports from the West Bridge. - - Description - The West Bridge firmware can be configured to track the amount of - read/write activity on the mass storage device, and send progress - reports when the activity level has crossed a threshold level. - This function sets the threshold levels for the progress reports. - Set wr_sectors and rd_sectors to 0, if the progress reports are to - be turned off. - - * Valid In Asynchronous Callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - the function succeeded - * CY_AS_ERROR_NOT_RUNNING - the USB stack is not running - * CY_AS_ERROR_TIMEOUT - a timeout occurred communicating with - * the West Bridge device - * CY_AS_ERROR_INVALID_HANDLE - Bad handle - * CY_AS_ERROR_INVALID_IN_CALLBACK - Synchronous call made - * while in callback - * CY_AS_ERROR_OUT_OF_MEMORY - Failed allocating memory for - * request processing - * CY_AS_ERROR_NOT_SUPPORTED - Firmware version does not support - * mass storage progress tracking - * CY_AS_ERROR_INVALID_RESPONSE - Unexpected response from - * Firmware - - See Also - * CyAsUsbMSCProgressData - * CyAsEventUsbMSCProgress -*/ -EXTERN cy_as_return_status_t -cy_as_usb_set_m_s_report_threshold( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Number of sectors written before report is sent */ - uint32_t wr_sectors, - /* Number of sectors read before report is sent */ - uint32_t rd_sectors, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -/* Summary - Specify which of the partitions on a partitioned mass storage - device should be made visible to USB. - - Description - West Bridge firmware supports the creation of up to two - partitions on mass storage devices connected to the West Bridge - device. When there are two partitions on a device, the user can - choose which of these partitions should be made visible to the - USB host through the USB mass storage interface. This function - allows the user to configure the partitions that should be - enumerated. At least one partition should be selected through - this API. If neither partition needs to be enumerated, use - CyAsUsbSetEnumConfig to control this. - - * Valid in Asynchronous callback: Yes (if cb supplied) - * Nestable: Yes - - Returns - * CY_AS_ERROR_SUCCESS - operation completed successfully - * CY_AS_ERROR_INVALID_HANDLE - invalid handle to the West - * Bridge device - * CY_AS_ERROR_NOT_CONFIGURED - West Bridge device has not - * been configured - * CY_AS_ERROR_NO_FIRMWARE - no firmware running on West - * Bridge device - * CY_AS_ERROR_NOT_RUNNING - USB stack has not been started - * CY_AS_ERROR_IN_SUSPEND - West Bridge device is in - * suspend mode - * CY_AS_ERROR_INVALID_CALL_SEQUENCE - this API has to be - * called before CyAsUsbSetEnumConfig - * CY_AS_ERROR_OUT_OF_MEMORY - failed to get memory to - * process the request - * CY_AS_ERROR_NO_SUCH_UNIT - Storage device addressed has - * not been partitioned - * CY_AS_ERROR_NOT_SUPPORTED - operation is not supported by - * active device/firmware. - - See Also - * CyAsStorageCreatePPartition - * CyAsStorageRemovePPartition - * CyAsUsbMsType_t - */ -EXTERN cy_as_return_status_t -cy_as_usb_select_m_s_partitions( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* Bus index of the device being addressed */ - cy_as_bus_number_t bus, - /* Device id of the device being addressed */ - uint32_t device, - /* Selection of partitions to be enumerated */ - cy_as_usb_m_s_type_t type, - /* The callback, if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -extern cy_as_media_type -cy_as_storage_get_media_from_address(uint16_t v); - -extern cy_as_bus_number_t -cy_as_storage_get_bus_from_address(uint16_t v); - -extern uint32_t -cy_as_storage_get_device_from_address(uint16_t v); - -/* For supporting deprecated functions */ -#include "cyasusb_dep.h" - -#include "cyas_cplus_end.h" - -#endif /* _INCLUDED_CYASUSB_H_ */ diff --git a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb_dep.h b/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb_dep.h deleted file mode 100644 index 829edde..0000000 --- a/drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb_dep.h +++ /dev/null @@ -1,224 +0,0 @@ -/* Cypress West Bridge API header file (cyasusb_dep.h) -## =========================== -## Copyright (C) 2010 Cypress Semiconductor -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License -## as published by the Free Software Foundation; either version 2 -## of the License, or (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin Street -## Fifth Floor, Boston, MA 02110-1301, USA. -## =========================== -*/ - -/* - * This header will contain Antioch specific declaration - * of the APIs that are deprecated in Astoria SDK. This is - * for maintaining backward compatibility. - */ - -#ifndef __INCLUDED_CYASUSB_DEP_H__ -#define __INCLUDED_CYASUSB_DEP_H__ - -#ifndef __doxygen__ - -/* - This data structure is the data passed via the evdata - paramater on a usb event callback for the inquiry request. -*/ - -typedef struct cy_as_usb_inquiry_data_dep { - /* The media for the event */ - cy_as_media_type media; - /* The EVPD bit from the SCSI INQUIRY request */ - uint8_t evpd; - /* The codepage in the inquiry request */ - uint8_t codepage; - /* This bool must be set to CyTrue indicate - * that the inquiry data was changed */ - cy_bool updated; - /* The length of the data */ - uint16_t length; - /* The inquiry data */ - void *data; -} cy_as_usb_inquiry_data_dep; - - -typedef struct cy_as_usb_unknown_command_data_dep { - /* The media for the event */ - cy_as_media_type media; - /* The length of the requst (should be 16 bytes) */ - uint16_t reqlen; - /* The request */ - void *request; - /* The returned status value for the command */ - uint8_t status; - /* If status is failed, the sense key */ - uint8_t key; - /* If status is failed, the additional sense code */ - uint8_t asc; - /* If status if failed, the additional sense code qualifier */ - uint8_t ascq; -} cy_as_usb_unknown_command_data_dep; - - -typedef struct cy_as_usb_start_stop_data_dep { - /* The media type for the event */ - cy_as_media_type media; - /* CyTrue means start request, CyFalse means stop request */ - cy_bool start; - /* CyTrue means LoEj bit set, otherwise false */ - cy_bool loej; -} cy_as_usb_start_stop_data_dep; - - -typedef struct cy_as_usb_enum_control_dep { - /* The bits in this member determine which mass storage devices - are enumerated. see cy_as_usb_mass_storage_enum for more details. */ - uint8_t enum_mass_storage; - /* If true, West Bridge will control enumeration. If this is false the - pport controls enumeration. if the P port is controlling - enumeration, traffic will be received via endpoint zero. */ - cy_bool antioch_enumeration; - /* This is the interface # to use for the mass storage interface, - if mass storage is enumerated. if mass storage is not enumerated - this value should be zero. */ - uint8_t mass_storage_interface; - /* If true, Inquiry, START/STOP, and unknown mass storage - requests cause a callback to occur for handling by the - baseband processor. */ - cy_bool mass_storage_callbacks; -} cy_as_usb_enum_control_dep; - - -typedef void (*cy_as_usb_event_callback_dep)( - /* Handle to the device to configure */ - cy_as_device_handle handle, - /* The event type being reported */ - cy_as_usb_event ev, - /* The data assocaited with the event being reported */ - void *evdata -); - - - -/* Register Callback api */ -EXTERN cy_as_return_status_t -cy_as_usb_register_callback_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The function to call */ - cy_as_usb_event_callback_dep callback - ); - - -extern cy_as_return_status_t -cy_as_usb_set_enum_config_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The USB configuration information */ - cy_as_usb_enum_control_dep *config_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - - -extern cy_as_return_status_t -cy_as_usb_get_enum_config_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The return value for USB congifuration information */ - cy_as_usb_enum_control_dep *config_p, - /* The callback if async call */ - cy_as_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -extern cy_as_return_status_t -cy_as_usb_get_descriptor_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The type of descriptor */ - cy_as_usb_desc_type type, - /* Index for string descriptor */ - uint8_t index, - /* The buffer to hold the returned descriptor */ - void *desc_p, - /* This is an input and output parameter. Before the code this pointer - points to a uint32_t that contains the length of the buffer. after - the call, this value contains the amount of data actually returned. */ - uint32_t *length_p - ); - -extern cy_as_return_status_t -cy_as_usb_set_stall_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_usb_function_callback cb, - /* Client supplied data */ - uint32_t client -); - -EXTERN cy_as_return_status_t -cy_as_usb_clear_stall_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_usb_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_usb_set_nak_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_usb_function_callback cb, - /* Client supplied data */ - uint32_t client -); - -EXTERN cy_as_return_status_t -cy_as_usb_clear_nak_dep( - /* Handle to the West Bridge device */ - cy_as_device_handle handle, - /* The endpoint of interest */ - cy_as_end_point_number_t ep, - /* The callback if async call */ - cy_as_usb_function_callback cb, - /* Client supplied data */ - uint32_t client - ); - -EXTERN cy_as_return_status_t -cy_as_usb_select_m_s_partitions_dep( - cy_as_device_handle handle, - cy_as_media_type media, - uint32_t device, - cy_as_usb_m_s_type_t type, - cy_as_function_callback cb, - uint32_t client - ); - -#endif /*__doxygen*/ - -#endif /*__INCLUDED_CYANSTORAGE_DEP_H__*/ -- cgit v0.10.2 From 4aede84b33d6beb401136a3deca0651ae07c5e99 Mon Sep 17 00:00:00 2001 From: Justin TerAvest Date: Tue, 12 Jul 2011 08:31:45 +0200 Subject: fixlet: Remove fs_excl from struct task. fs_excl is a poor man's priority inheritance for filesystems to hint to the block layer that an operation is important. It was never clearly specified, not widely adopted, and will not prevent starvation in many cases (like across cgroups). fs_excl was introduced with the time sliced CFQ IO scheduler, to indicate when a process held FS exclusive resources and thus needed a boost. It doesn't cover all file systems, and it was never fully complete. Lets kill it. Signed-off-by: Justin TerAvest Signed-off-by: Jens Axboe diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 762bd50..d8b1087 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -134,7 +134,7 @@ struct cfq_queue { /* io prio of this group */ unsigned short ioprio, org_ioprio; - unsigned short ioprio_class, org_ioprio_class; + unsigned short ioprio_class; pid_t pid; @@ -2869,7 +2869,6 @@ static void cfq_init_prio_data(struct cfq_queue *cfqq, struct io_context *ioc) * elevate the priority of this queue */ cfqq->org_ioprio = cfqq->ioprio; - cfqq->org_ioprio_class = cfqq->ioprio_class; cfq_clear_cfqq_prio_changed(cfqq); } @@ -3593,30 +3592,6 @@ static void cfq_completed_request(struct request_queue *q, struct request *rq) cfq_schedule_dispatch(cfqd); } -/* - * we temporarily boost lower priority queues if they are holding fs exclusive - * resources. they are boosted to normal prio (CLASS_BE/4) - */ -static void cfq_prio_boost(struct cfq_queue *cfqq) -{ - if (has_fs_excl()) { - /* - * boost idle prio on transactions that would lock out other - * users of the filesystem - */ - if (cfq_class_idle(cfqq)) - cfqq->ioprio_class = IOPRIO_CLASS_BE; - if (cfqq->ioprio > IOPRIO_NORM) - cfqq->ioprio = IOPRIO_NORM; - } else { - /* - * unboost the queue (if needed) - */ - cfqq->ioprio_class = cfqq->org_ioprio_class; - cfqq->ioprio = cfqq->org_ioprio; - } -} - static inline int __cfq_may_queue(struct cfq_queue *cfqq) { if (cfq_cfqq_wait_request(cfqq) && !cfq_cfqq_must_alloc_slice(cfqq)) { @@ -3647,7 +3622,6 @@ static int cfq_may_queue(struct request_queue *q, int rw) cfqq = cic_to_cfqq(cic, rw_is_sync(rw)); if (cfqq) { cfq_init_prio_data(cfqq, cic->ioc); - cfq_prio_boost(cfqq); return __cfq_may_queue(cfqq); } diff --git a/fs/reiserfs/journal.c b/fs/reiserfs/journal.c index c5e82ec..a159ba5 100644 --- a/fs/reiserfs/journal.c +++ b/fs/reiserfs/journal.c @@ -678,23 +678,19 @@ struct buffer_chunk { static void write_chunk(struct buffer_chunk *chunk) { int i; - get_fs_excl(); for (i = 0; i < chunk->nr; i++) { submit_logged_buffer(chunk->bh[i]); } chunk->nr = 0; - put_fs_excl(); } static void write_ordered_chunk(struct buffer_chunk *chunk) { int i; - get_fs_excl(); for (i = 0; i < chunk->nr; i++) { submit_ordered_buffer(chunk->bh[i]); } chunk->nr = 0; - put_fs_excl(); } static int add_to_chunk(struct buffer_chunk *chunk, struct buffer_head *bh, @@ -986,8 +982,6 @@ static int flush_commit_list(struct super_block *s, return 0; } - get_fs_excl(); - /* before we can put our commit blocks on disk, we have to make sure everyone older than ** us is on disk too */ @@ -1145,7 +1139,6 @@ static int flush_commit_list(struct super_block *s, if (retval) reiserfs_abort(s, retval, "Journal write error in %s", __func__); - put_fs_excl(); return retval; } @@ -1374,8 +1367,6 @@ static int flush_journal_list(struct super_block *s, return 0; } - get_fs_excl(); - /* if all the work is already done, get out of here */ if (atomic_read(&(jl->j_nonzerolen)) <= 0 && atomic_read(&(jl->j_commit_left)) <= 0) { @@ -1597,7 +1588,6 @@ static int flush_journal_list(struct super_block *s, put_journal_list(s, jl); if (flushall) mutex_unlock(&journal->j_flush_mutex); - put_fs_excl(); return err; } @@ -3108,7 +3098,6 @@ static int do_journal_begin_r(struct reiserfs_transaction_handle *th, th->t_trans_id = journal->j_trans_id; unlock_journal(sb); INIT_LIST_HEAD(&th->t_list); - get_fs_excl(); return 0; out_fail: @@ -3964,7 +3953,6 @@ static int do_journal_end(struct reiserfs_transaction_handle *th, flush = flags & FLUSH_ALL; wait_on_commit = flags & WAIT; - put_fs_excl(); current->journal_info = th->t_handle_save; reiserfs_check_lock_depth(sb, "journal end"); if (journal->j_len == 0) { @@ -4316,4 +4304,3 @@ void reiserfs_abort_journal(struct super_block *sb, int errno) dump_stack(); #endif } - diff --git a/fs/super.c b/fs/super.c index ab3d672..cf12ba5 100644 --- a/fs/super.c +++ b/fs/super.c @@ -245,13 +245,11 @@ static int grab_super(struct super_block *s) __releases(sb_lock) */ void lock_super(struct super_block * sb) { - get_fs_excl(); mutex_lock(&sb->s_lock); } void unlock_super(struct super_block * sb) { - put_fs_excl(); mutex_unlock(&sb->s_lock); } @@ -280,7 +278,6 @@ void generic_shutdown_super(struct super_block *sb) if (sb->s_root) { shrink_dcache_for_umount(sb); sync_filesystem(sb); - get_fs_excl(); sb->s_flags &= ~MS_ACTIVE; fsnotify_unmount_inodes(&sb->s_inodes); @@ -295,7 +292,6 @@ void generic_shutdown_super(struct super_block *sb) "Self-destruct in 5 seconds. Have a nice day...\n", sb->s_id); } - put_fs_excl(); } spin_lock(&sb_lock); /* should be initialized for __put_super_and_need_restart() */ diff --git a/include/linux/fs.h b/include/linux/fs.h index 6e73e2e..f6c866c 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1453,10 +1453,6 @@ enum { #define vfs_check_frozen(sb, level) \ wait_event((sb)->s_wait_unfrozen, ((sb)->s_frozen < (level))) -#define get_fs_excl() atomic_inc(¤t->fs_excl) -#define put_fs_excl() atomic_dec(¤t->fs_excl) -#define has_fs_excl() atomic_read(¤t->fs_excl) - /* * until VFS tracks user namespaces for inodes, just make all files * belong to init_user_ns diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 580f70c..d14e058 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -176,7 +176,6 @@ extern struct cred init_cred; .alloc_lock = __SPIN_LOCK_UNLOCKED(tsk.alloc_lock), \ .journal_info = NULL, \ .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ - .fs_excl = ATOMIC_INIT(0), \ .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ .timer_slack_ns = 50000, /* 50 usec default slack */ \ .pids = { \ diff --git a/include/linux/sched.h b/include/linux/sched.h index a837b20..22f5424 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1503,7 +1503,6 @@ struct task_struct { short il_next; short pref_node_fork; #endif - atomic_t fs_excl; /* holding fs exclusive resources */ struct rcu_head rcu; /* diff --git a/kernel/exit.c b/kernel/exit.c index f2b321b..b412df4 100644 --- a/kernel/exit.c +++ b/kernel/exit.c @@ -906,7 +906,6 @@ NORET_TYPE void do_exit(long code) profile_task_exit(tsk); - WARN_ON(atomic_read(&tsk->fs_excl)); WARN_ON(blk_needs_flush_plug(tsk)); if (unlikely(in_interrupt())) diff --git a/kernel/fork.c b/kernel/fork.c index 0276c30..30a0e860 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -291,7 +291,6 @@ static struct task_struct *dup_task_struct(struct task_struct *orig) /* One for us, one for whoever does the "release_task()" (usually parent) */ atomic_set(&tsk->usage,2); - atomic_set(&tsk->fs_excl, 0); #ifdef CONFIG_BLK_DEV_IO_TRACE tsk->btrace_seq = 0; #endif -- cgit v0.10.2 From 7db2b37751caa2f17b026223a382eca07c90c575 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 21 Mar 2011 16:14:43 +0100 Subject: arm: lpc32xx: add tsc-device Fix the clock name, too. Signed-off-by: Wolfram Sang Tested-by: Kevin Wells diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index da0e649..1e02751 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -1077,7 +1077,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand) _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0) _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1) - _REGISTER_CLOCK("lpc32xx-ts", NULL, clk_tsc) + _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc) _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc) _REGISTER_CLOCK("lpc-net.0", NULL, clk_net) _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd) diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index ee24dc2..6880b47 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -95,6 +95,27 @@ struct platform_device lpc32xx_i2c2_device = { }, }; +/* TSC (Touch Screen Controller) */ + +static struct resource lpc32xx_tsc_resources[] = { + { + .start = LPC32XX_ADC_BASE, + .end = LPC32XX_ADC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_LPC32XX_TS_IRQ, + .end = IRQ_LPC32XX_TS_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device lpc32xx_tsc_device = { + .name = "ts-lpc32xx", + .id = -1, + .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources), + .resource = lpc32xx_tsc_resources, +}; + /* * Returns the unique ID for the device */ diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index f82211f..e81243c 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -28,6 +28,7 @@ extern struct platform_device lpc32xx_watchdog_device; extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; +extern struct platform_device lpc32xx_tsc_device; /* * Other arch specific structures and functions -- cgit v0.10.2 From 1c72f9eaa53e920f142f4c1d20b4fc82b1a10ed5 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 28 Mar 2011 16:51:35 +0200 Subject: arm: lpc32xx: add rtc-device Signed-off-by: Wolfram Sang Tested-by: Kevin Wells diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index 6880b47..205b2db 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -116,6 +116,27 @@ struct platform_device lpc32xx_tsc_device = { .resource = lpc32xx_tsc_resources, }; +/* RTC */ + +static struct resource lpc32xx_rtc_resources[] = { + { + .start = LPC32XX_RTC_BASE, + .end = LPC32XX_RTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + },{ + .start = IRQ_LPC32XX_RTC, + .end = IRQ_LPC32XX_RTC, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device lpc32xx_rtc_device = { + .name = "rtc-lpc32xx", + .id = -1, + .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources), + .resource = lpc32xx_rtc_resources, +}; + /* * Returns the unique ID for the device */ diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index e81243c..5583f52 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -29,6 +29,7 @@ extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; extern struct platform_device lpc32xx_tsc_device; +extern struct platform_device lpc32xx_rtc_device; /* * Other arch specific structures and functions -- cgit v0.10.2 From a4841e39f7ca85ee2a40803ebac6221c6d8822c0 Mon Sep 17 00:00:00 2001 From: Russell King - ARM Linux Date: Mon, 11 Jul 2011 22:25:43 +0100 Subject: ARM: introduce handle_IRQ() not to dump exception stack On Mon, Jul 11, 2011 at 3:52 PM, Russell King - ARM Linux wrote: ... > The __exception annotation on a function causes this to happen: > > [] (asm_do_IRQ+0x6c/0x8c) from [] > (__irq_svc+0x44/0xcc) > Exception stack(0xc3897c78 to 0xc3897cc0) > 7c60: 4022d320 4022e000 > 7c80: 08000075 00001000 c32273c0 c03ce1c0 c2b49b78 4022d000 c2b420b4 00000001 > 7ca0: 00000000 c3897cfc 00000000 c3897cc0 c00afc54 c002edd8 00000013 ffffffff > > Where that stack dump represents the pt_regs for the exception which > happened. Any function found in while unwinding will cause this to > be printed. > > If you insert a C function between the IRQ assembly and asm_do_IRQ, > the > dump you get from asm_do_IRQ will be the stack for your function, > not > the pt_regs. That makes the feature useless. > When __irq_svc - or any of the other exception handling assembly code - calls the C code, the stack pointer will be pointing at the pt_regs structure. All the entry points into C code from the exception handling code are marked with __exception or __exception_irq_enter to indicate that they are one of the functions which has pt_regs above them. Normally, when you've entered asm_do_IRQ() you will have this stack layout (higher address towards top): pt_regs asm_do_IRQ frame If you insert a C function between the exception assembly code and asm_do_IRQ, you end up with this stack layout instead: pt_regs your function frame asm_do_IRQ frame This means when we unwind, we'll get to asm_do_IRQ, and rather than dumping out the pt_regs, we'll dump out your functions stack frame instead, because that's what is above the asm_do_IRQ stack frame rather than the expected pt_regs structure. The fix is to introduce handle_IRQ() for no exception stack dump, so it can be called with MULTI_IRQ_HANDLER is selected and a C function is between the assembly code and the actual IRQ handling code. Signed-off-by: Russell King Signed-off-by: Eric Miao diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 2721a58..5a526af 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h @@ -23,6 +23,7 @@ struct pt_regs; extern void migrate_irqs(void); extern void asm_do_IRQ(unsigned int, struct pt_regs *); +void handle_IRQ(unsigned int, struct pt_regs *); void init_IRQ(void); #endif diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 83bbad0..dbc1f41 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -67,12 +67,12 @@ int arch_show_interrupts(struct seq_file *p, int prec) } /* - * do_IRQ handles all hardware IRQ's. Decoded IRQs should not - * come via this function. Instead, they should provide their - * own 'handler' + * handle_IRQ handles all hardware IRQ's. Decoded IRQs should + * not come via this function. Instead, they should provide their + * own 'handler'. Used by platform code implementing C-based 1st + * level decoding. */ -asmlinkage void __exception_irq_entry -asm_do_IRQ(unsigned int irq, struct pt_regs *regs) +void handle_IRQ(unsigned int irq, struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); @@ -97,6 +97,15 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs) set_irq_regs(old_regs); } +/* + * asm_do_IRQ is the interface to be used from assembly code. + */ +asmlinkage void __exception_irq_entry +asm_do_IRQ(unsigned int irq, struct pt_regs *regs) +{ + handle_IRQ(irq, regs); +} + void set_irq_flags(unsigned int irq, unsigned int iflags) { unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; -- cgit v0.10.2 From 4e234cc0ee9db31d5b16b58d7c09af17246b2466 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 4 Apr 2011 15:06:33 +0800 Subject: ARM: pxa: enable AUTO_ZRELADDR Signed-off-by: Eric Miao diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278..47c22a7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -618,6 +618,7 @@ config ARCH_PXA select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ + select AUTO_ZRELADDR help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. -- cgit v0.10.2 From 52585ccd93d75e368382af09ae336ed8f231642c Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 8 Apr 2011 20:15:38 +0800 Subject: ARM: pxa: add clk_set_rate() Since there're mulitple clock rates in some device controllers, enable clk_set_rate() for this usage. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c index 886e056..7c6f95f 100644 --- a/arch/arm/mach-mmp/clock.c +++ b/arch/arm/mach-mmp/clock.c @@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk) return rate; } EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index 9b027d7..3143e99 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h @@ -12,6 +12,7 @@ struct clkops { void (*enable)(struct clk *); void (*disable)(struct clk *); unsigned long (*getrate)(struct clk *); + int (*setrate)(struct clk *, unsigned long); }; struct clk { diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index d515222..4d46610 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c @@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) } EXPORT_SYMBOL(clk_get_rate); +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + void clk_dummy_enable(struct clk *clk) { } diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 1f2fb9c..3a258b1 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h @@ -5,6 +5,7 @@ struct clkops { void (*enable)(struct clk *); void (*disable)(struct clk *); unsigned long (*getrate)(struct clk *); + int (*setrate)(struct clk *, unsigned long); }; struct clk { -- cgit v0.10.2 From 9c86441081e84c9fb9fac3929c6e7d3e6f4dd891 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 15:35:54 +0800 Subject: ARM: pxa: add common header file for pxa3xx Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/include/mach/pxa300.h b/arch/arm/mach-pxa/include/mach/pxa300.h index 2f33076..733b641 100644 --- a/arch/arm/mach-pxa/include/mach/pxa300.h +++ b/arch/arm/mach-pxa/include/mach/pxa300.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA300_H #define __MACH_PXA300_H -#include -#include +#include #include #endif /* __MACH_PXA300_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa320.h b/arch/arm/mach-pxa/include/mach/pxa320.h index cab78e9..b6204e4 100644 --- a/arch/arm/mach-pxa/include/mach/pxa320.h +++ b/arch/arm/mach-pxa/include/mach/pxa320.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA320_H #define __MACH_PXA320_H -#include -#include +#include #include #endif /* __MACH_PXA320_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h new file mode 100644 index 0000000..5b9552d --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -0,0 +1,7 @@ +#ifndef __MACH_PXA3XX_H +#define __MACH_PXA3XX_H + +#include +#include + +#endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa930.h b/arch/arm/mach-pxa/include/mach/pxa930.h index d45f76a..190363b 100644 --- a/arch/arm/mach-pxa/include/mach/pxa930.h +++ b/arch/arm/mach-pxa/include/mach/pxa930.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA930_H #define __MACH_PXA930_H -#include -#include +#include #include #endif /* __MACH_PXA930_H */ -- cgit v0.10.2 From 5d284e353eb11ab2e8b1c5671ba06489b0bd1e0c Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 27 Apr 2011 22:48:04 +0800 Subject: ARM: pxa: avoid accessing interrupt registers directly Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 0384024..a94c694 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -104,4 +104,11 @@ #define NR_IRQS (IRQ_BOARD_START) +#ifndef __ASSEMBLY__ +struct irq_data; + +void pxa_mask_irq(struct irq_data *); +void pxa_unmask_irq(struct irq_data *); +#endif + #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h deleted file mode 100644 index 662288e..0000000 --- a/arch/arm/mach-pxa/include/mach/regs-intc.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __ASM_MACH_REGS_INTC_H -#define __ASM_MACH_REGS_INTC_H - -#include - -/* - * Interrupt Controller - */ - -#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ -#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ -#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ -#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ -#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ -#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ -#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ - -#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ -#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ -#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ - -#define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */ -#define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */ -#define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */ -#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ -#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ - -#endif /* __ASM_MACH_REGS_INTC_H */ diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 32ed551..c89c0e4 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -64,7 +64,7 @@ static inline void __iomem *irq_base(int i) return (void __iomem *)io_p2v(phys_base[i]); } -static void pxa_mask_irq(struct irq_data *d) +void pxa_mask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); @@ -73,7 +73,7 @@ static void pxa_mask_irq(struct irq_data *d) __raw_writel(icmr, base + ICMR); } -static void pxa_unmask_irq(struct irq_data *d) +void pxa_unmask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 8521d7d..e66dc15 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include "generic.h" @@ -328,13 +327,13 @@ static void pxa_ack_ext_wakeup(struct irq_data *d) static void pxa_mask_ext_wakeup(struct irq_data *d) { - ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f)); + pxa_mask_irq(d); PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0); } static void pxa_unmask_ext_wakeup(struct irq_data *d) { - ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f); + pxa_unmask_irq(d); PECR |= PECR_IE(d->irq - IRQ_WAKEUP0); } diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index ecc82a3..0ee166b 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c @@ -27,7 +27,6 @@ #include #include #include -#include #include "generic.h" #include "devices.h" -- cgit v0.10.2 From a551e4f787220459c6e78668a15cbe01f1ac7637 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 27 Apr 2011 22:48:05 +0800 Subject: ARM: pxa: introduce {icip,ichp}_handle_irq() to prepare MULTI_IRQ_HANDLER Thanks Dmitry for providing a fix to the original code. Signed-off-by: Eric Miao Signed-off-by: Dmitry Eremin-Solenikov diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index a94c694..564337d 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -106,9 +106,12 @@ #ifndef __ASSEMBLY__ struct irq_data; +struct pt_regs; void pxa_mask_irq(struct irq_data *); void pxa_unmask_irq(struct irq_data *); +void icip_handle_irq(struct pt_regs *); +void ichp_handle_irq(struct pt_regs *); #endif #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index c89c0e4..b09e848 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -37,6 +37,8 @@ #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ (0x144 + (((i) - 64) << 2))) +#define ICHP_VAL_IRQ (1 << 31) +#define ICHP_IRQ(i) (((i) >> 16) & 0x7fff) #define IPR_VALID (1 << 31) #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) @@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = { .irq_set_type = pxa_set_low_gpio_type, }; +asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) +{ + uint32_t icip, icmr, mask; + + do { + icip = __raw_readl(IRQ_BASE + ICIP); + icmr = __raw_readl(IRQ_BASE + ICMR); + mask = icip & icmr; + + if (mask == 0) + break; + + handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); + } while (1); +} + +asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) +{ + uint32_t ichp; + + do { + __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); + + if ((ichp & ICHP_VAL_IRQ) == 0) + break; + + handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); + } while (1); +} + static void __init pxa_init_low_gpio_irq(set_wake_t fn) { int irq; -- cgit v0.10.2 From ca0e687c8ea5a7ae4b1c7a735f797f95ed953f9a Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 21:19:04 +0800 Subject: ARM: pxa: move declarations from generic.h to .h Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index a109967..7cc7414 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -21,7 +21,8 @@ #include #include -#include +#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ff9ff5f..42b8929 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 0481c29..6e95e81 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -22,10 +22,9 @@ #include #include #include -#include +#include #include #include -#include #include #include diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index e6c9344..92a2e85 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -13,21 +13,8 @@ struct irq_data; struct sys_timer; extern struct sys_timer pxa_timer; -extern void __init pxa_init_irq(int irq_nr, - int (*set_wake)(struct irq_data *, - unsigned int)); -extern void __init pxa25x_init_irq(void); -#ifdef CONFIG_CPU_PXA26x -extern void __init pxa26x_init_irq(void); -#endif -extern void __init pxa27x_init_irq(void); -extern void __init pxa3xx_init_irq(void); -extern void __init pxa95x_init_irq(void); extern void __init pxa_map_io(void); -extern void __init pxa25x_map_io(void); -extern void __init pxa27x_map_io(void); -extern void __init pxa3xx_map_io(void); extern unsigned int get_clk_frequency_khz(int info); diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index e8603eb..a2ea979 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -24,8 +24,7 @@ #include #include -#include -#include +#include #include "generic.h" diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 564337d..7cc5a78 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -112,6 +112,8 @@ void pxa_mask_irq(struct irq_data *); void pxa_unmask_irq(struct irq_data *); void icip_handle_irq(struct pt_regs *); void ichp_handle_irq(struct pt_regs *); + +void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int)); #endif #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 508c3ba..187b14c 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h @@ -4,5 +4,11 @@ #include #include #include +#include +extern void __init pxa25x_map_io(void); +extern void __init pxa25x_init_irq(void); +#ifdef CONFIG_CPU_PXA26x +extern void __init pxa26x_init_irq(void); +#endif #endif /* __MACH_PXA25x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 0b70269..801f170 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h @@ -4,6 +4,7 @@ #include #include #include +#include #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ @@ -17,6 +18,8 @@ #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ +extern void __init pxa27x_map_io(void); +extern void __init pxa27x_init_irq(void); extern int __init pxa27x_set_pwrmode(unsigned int mode); #endif /* __MACH_PXA27x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index 5b9552d..c50a1b5 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -3,5 +3,9 @@ #include #include +#include +extern void __init pxa3xx_map_io(void); +extern void __init pxa3xx_init_irq(void); +extern void __init pxa95x_init_irq(void); #endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index fb06bd0..796d391 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -31,14 +31,13 @@ #include #include +#include #include #include #include #include -#include #include #include -#include #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 726f5b9..6e59c5f 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -31,11 +31,11 @@ #include #include +#include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index d130f77..ad1a313 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -46,10 +46,7 @@ #include #include -#include -#include -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index f55f8f2..03cfd60 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -28,8 +28,7 @@ #include #include -#include -#include +#include #include #include "generic.h" diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 00363c7..973590e 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -34,14 +34,13 @@ #include #include -#include +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 5821185..23776fb 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -24,7 +24,7 @@ #include #include -#include +#include #include #include #include -- cgit v0.10.2 From 8a97ae2f554d762a4bc67b5d13b52ef39c8d6baa Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 21:30:04 +0800 Subject: ARM: pxa: enable MULTI_IRQ_HANDLER for all boards Signed-off-by: Eric Miao diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 47c22a7..3eacf57 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -619,6 +619,7 @@ config ARCH_PXA select PLAT_PXA select SPARSE_IRQ select AUTO_ZRELADDR + select MULTI_IRQ_HANDLER help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 810a982..ef3e8b1 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -825,6 +825,7 @@ MACHINE_START(BALLOON3, "Balloon3") .map_io = balloon3_map_io, .nr_irqs = BALLOON3_NR_IRQS, .init_irq = balloon3_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = balloon3_init, .boot_params = PLAT_PHYS_OFFSET + 0x100, diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index 4284513..648b0ab 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c @@ -151,6 +151,7 @@ MACHINE_START(CAPC7117, .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = capc7117_init MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index 7cc7414..1719927 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -517,6 +517,8 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") .map_io = cmx2xx_map_io, .nr_irqs = CMX2XX_NR_IRQS, .init_irq = cmx2xx_init_irq, + /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */ + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = cmx2xx_init, MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index b2248e7..de577c7 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -859,6 +859,7 @@ MACHINE_START(CM_X300, "CM-X300 module") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = cm_x300_init, .fixup = cm_x300_fixup, diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 7545a48..8709209 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") .init_machine = colibri_pxa270_init, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END @@ -318,6 +319,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") .init_machine = colibri_pxa270_income_init, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 66dd81c..60a6781 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -187,6 +187,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") .init_machine = colibri_pxa300_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 42b8929..d2c6631 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -257,6 +257,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") .init_machine = colibri_pxa320_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3a5507e..185a37c 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -722,6 +722,7 @@ MACHINE_START(CORGI, "SHARP Corgi") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END @@ -732,6 +733,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END @@ -742,6 +744,7 @@ MACHINE_START(HUSKY, "SHARP Husky") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 6e95e81..fe812ea 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -275,6 +275,7 @@ MACHINE_START(CSB726, "Cogent CSB726") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = csb726_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index f8a6e9d..2e37ea5 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -1302,6 +1302,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, MACHINE_END @@ -1310,6 +1311,7 @@ MACHINE_START(EXEDA, "Compulab eXeda") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, MACHINE_END diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 2e3970f..b4599ec 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -193,6 +193,7 @@ MACHINE_START(E330, "Toshiba e330") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e330_init, .timer = &pxa_timer, @@ -242,6 +243,7 @@ MACHINE_START(E350, "Toshiba e350") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e350_init, .timer = &pxa_timer, @@ -364,6 +366,7 @@ MACHINE_START(E400, "Toshiba e400") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e400_init, .timer = &pxa_timer, @@ -552,6 +555,7 @@ MACHINE_START(E740, "Toshiba e740") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e740_init, .timer = &pxa_timer, @@ -743,6 +747,7 @@ MACHINE_START(E750, "Toshiba e750") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e750_init, .timer = &pxa_timer, @@ -947,6 +952,7 @@ MACHINE_START(E800, "Toshiba e800") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e800_init, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index d88aed8..b73eadb 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -801,6 +801,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a780_init, MACHINE_END @@ -866,6 +867,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e680_init, MACHINE_END @@ -931,6 +933,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a1200_init, MACHINE_END @@ -1121,6 +1124,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a910_init, MACHINE_END @@ -1186,6 +1190,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e6_init, MACHINE_END @@ -1225,6 +1230,7 @@ MACHINE_START(EZX_E2, "Motorola EZX E2") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e2_init, MACHINE_END diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index d65e4bd..deaa111 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c @@ -236,6 +236,7 @@ MACHINE_START(GUMSTIX, "Gumstix") .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = gumstix_init, MACHINE_END diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index 657db46..0a235128 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -205,6 +206,7 @@ MACHINE_START(H5400, "HP iPAQ H5000") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = h5000_init, MACHINE_END diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index a2ea979..a997d0ab 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -161,6 +161,7 @@ MACHINE_START(HIMALAYA, "HTC Himalaya") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = himalaya_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index f941a49..9a734cb 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -874,6 +874,7 @@ MACHINE_START(H4700, "HP iPAQ HX4700") .map_io = pxa27x_map_io, .nr_irqs = HX4700_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = hx4700_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index 6cedc81..d427429 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c @@ -194,6 +194,7 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = icontrol_init MACHINE_END diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index f7fb64f..ddf20e5 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -196,6 +196,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") /* Maintainer: Vibren Technologies */ .map_io = idp_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = idp_init, MACHINE_END diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 187b14c..3ac0baa 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h @@ -11,4 +11,7 @@ extern void __init pxa25x_init_irq(void); #ifdef CONFIG_CPU_PXA26x extern void __init pxa26x_init_irq(void); #endif + +#define pxa25x_handle_irq icip_handle_irq + #endif /* __MACH_PXA25x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 801f170..b9b1bdc 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h @@ -22,4 +22,6 @@ extern void __init pxa27x_map_io(void); extern void __init pxa27x_init_irq(void); extern int __init pxa27x_set_pwrmode(unsigned int mode); +#define pxa27x_handle_irq ichp_handle_irq + #endif /* __MACH_PXA27x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index c50a1b5..cd3e57f 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -8,4 +8,7 @@ extern void __init pxa3xx_map_io(void); extern void __init pxa3xx_init_irq(void); extern void __init pxa95x_init_irq(void); + +#define pxa3xx_handle_irq ichp_handle_irq + #endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index e5e326d..8f97e15 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -441,6 +441,7 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto .map_io = pxa3xx_map_io, .nr_irqs = LITTLETON_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = littleton_init, MACHINE_END diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 6cf8180..c171d6e 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -503,6 +503,7 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") .map_io = lpd270_map_io, .nr_irqs = LPD270_NR_IRQS, .init_irq = lpd270_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = lpd270_init, MACHINE_END diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index e10ddb8..a8c696b 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -553,6 +553,7 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") .map_io = lubbock_map_io, .nr_irqs = LUBBOCK_NR_IRQS, .init_irq = lubbock_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = lubbock_init, MACHINE_END diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index e192057..cb3509e 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -768,6 +768,7 @@ MACHINE_START(MAGICIAN, "HTC Magician") .map_io = pxa27x_map_io, .nr_irqs = MAGICIAN_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = magician_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 3479e2b..4622eb7 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -620,6 +620,7 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") .map_io = mainstone_map_io, .nr_irqs = MAINSTONE_NR_IRQS, .init_irq = mainstone_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = mainstone_init, MACHINE_END diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index e347013..ff92efd 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -794,6 +794,7 @@ MACHINE_START(MIOA701, "MIO A701") .boot_params = 0xa0000100, .map_io = &pxa27x_map_io, .init_irq = &pxa27x_init_irq, + .handle_irq = &pxa27x_handle_irq, .init_machine = mioa701_machine_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 59cce78..fb408861 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c @@ -96,6 +96,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C") .timer = &pxa_timer, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = mp900c_init, MACHINE_END diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 4061ecd..6b77365 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -345,6 +345,7 @@ MACHINE_START(PALMLD, "Palm LifeDrive") .boot_params = 0xa0000100, .map_io = palmld_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmld_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index df4d7d0..9bd3e47 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -206,6 +206,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5") .map_io = pxa27x_map_io, .reserve = palmt5_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmt5_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 796d391..6ad4a6c 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -540,6 +540,7 @@ MACHINE_START(PALMTC, "Palm Tungsten|C") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = palmtc_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 6e59c5f..664232f 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -359,6 +359,7 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = palmte2_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 20d1b18..bb27d4b 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -444,6 +444,7 @@ MACHINE_START(TREO680, "Palm Treo 680") .map_io = pxa27x_map_io, .reserve = treo_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = treo680_init, MACHINE_END @@ -453,6 +454,7 @@ MACHINE_START(CENTRO, "Palm Centro 685") .map_io = pxa27x_map_io, .reserve = treo_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = centro_init, MACHINE_END diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 595f002..fc428558 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -367,6 +367,7 @@ MACHINE_START(PALMTX, "Palm T|X") .boot_params = 0xa0000100, .map_io = palmtx_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmtx_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 65f24f0..95d71c3 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c @@ -401,6 +401,7 @@ MACHINE_START(PALMZ72, "Palm Zire72") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmz72_init MACHINE_END diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 1fc8a66..ffa65df 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -262,6 +262,7 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") .map_io = pcm027_map_io, .nr_irqs = PCM027_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = pcm027_init, MACHINE_END diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 16d14fd..a113ea9 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -468,6 +468,7 @@ MACHINE_START(POODLE, "SHARP Poodle") .map_io = pxa25x_map_io, .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = poodle_init, MACHINE_END diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index ad1a313..8b8cff6 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -1088,6 +1088,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") .init_machine = raumfeld_controller_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif @@ -1098,6 +1099,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") .init_machine = raumfeld_connector_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif @@ -1108,6 +1110,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") .init_machine = raumfeld_speaker_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index fee97a9..df4356e 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -599,6 +599,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saar_init, MACHINE_END diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 9322fe5..3b582d6 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -107,6 +107,7 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") .map_io = pxa_map_io, .nr_irqs = SAARB_NR_IRQS, .init_irq = pxa95x_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saarb_init, MACHINE_END diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 01c5769..438c7b5 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END @@ -994,6 +995,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END @@ -1004,6 +1006,7 @@ MACHINE_START(AKITA, "SHARP Akita") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index cb5611d..3f8d0af 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c @@ -1001,6 +1001,7 @@ static void __init stargate2_init(void) MACHINE_START(INTELMOTE2, "IMOTE 2") .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = imote2_init, .boot_params = 0xA0000100, @@ -1012,6 +1013,7 @@ MACHINE_START(STARGATE2, "Stargate 2") .map_io = pxa27x_map_io, .nr_irqs = STARGATE_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = stargate2_init, .boot_params = 0xA0000100, diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 53d4a47..32fb58e 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c @@ -492,6 +492,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = tavorevb_init, MACHINE_END diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 79f4422..fd5a8ea 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c @@ -129,6 +129,7 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") .map_io = pxa3xx_map_io, .nr_irqs = TAVOREVB3_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = evb3_init, MACHINE_END diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 5fa1457..9f69a26 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -974,6 +974,7 @@ MACHINE_START(TOSA, "SHARP Tosa") .map_io = pxa25x_map_io, .nr_irqs = TOSA_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = tosa_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 687417a..c041750 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") .init_machine = trizeps4_init, .map_io = trizeps4_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END @@ -567,5 +568,6 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") .init_machine = trizeps4_init, .map_io = trizeps4_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 903218e..d4a3dc7 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -995,6 +995,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") .boot_params = 0xa0000100, .map_io = viper_map_io, .init_irq = viper_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = viper_init, MACHINE_END diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 67bd414..5f8490a 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -719,6 +719,7 @@ MACHINE_START(VPAC270, "Voipac PXA270") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = vpac270_init MACHINE_END diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 03cfd60..acc600f 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -184,6 +184,7 @@ MACHINE_START(XCEP, "Iskratel XCEP") .init_machine = xcep_init, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index fbe9e02..e9b38cd 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -704,6 +704,7 @@ MACHINE_START(ZIPIT2, "Zipit Z2") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = z2_init, MACHINE_END diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 973590e..667e095 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -907,6 +907,7 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") .map_io = zeus_map_io, .nr_irqs = ZEUS_NR_IRQS, .init_irq = zeus_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = zeus_init, MACHINE_END diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 23776fb..15ec66b 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -426,6 +426,7 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") .map_io = pxa3xx_map_io, .nr_irqs = ZYLONITE_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = zylonite_init, MACHINE_END -- cgit v0.10.2 From 41646b24993590c49d21e6cc0f4378505e1f94a6 Mon Sep 17 00:00:00 2001 From: Vasily Khoruzhick Date: Tue, 15 Mar 2011 22:11:17 +0200 Subject: ARM: pxa/z2: add poweroff function Signed-off-by: Vasily Khoruzhick Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index e9b38cd..6c9275a 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -40,6 +40,7 @@ #include #include #include +#include #include "generic.h" #include "devices.h" @@ -677,6 +678,20 @@ static void __init z2_pmic_init(void) static inline void z2_pmic_init(void) {} #endif +#ifdef CONFIG_PM +static void z2_power_off(void) +{ + /* We're using deep sleep as poweroff, so clear PSPR to ensure that + * bootloader will jump to its entry point in resume handler + */ + PSPR = 0x0; + local_irq_disable(); + pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); +} +#else +#define z2_power_off NULL +#endif + /****************************************************************************** * Machine init ******************************************************************************/ @@ -698,6 +713,8 @@ static void __init z2_init(void) z2_leds_init(); z2_keys_init(); z2_pmic_init(); + + pm_power_off = z2_power_off; } MACHINE_START(ZIPIT2, "Zipit Z2") -- cgit v0.10.2 From 26407f818e62a88ac9cee64f250ec844fb079862 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay Date: Mon, 2 May 2011 11:29:58 +0530 Subject: ARM: pxa168: Add support for UART3 PXA168 has 3 onchip UARTs. Added support for the third one Signed-off-by: Tanmay Upadhyay Signed-off-by: Eric Miao diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index a52b3d2..705e963 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -17,6 +17,7 @@ extern void pxa168_clear_keypad_wakeup(void); extern struct pxa_device_desc pxa168_device_uart1; extern struct pxa_device_desc pxa168_device_uart2; +extern struct pxa_device_desc pxa168_device_uart3; extern struct pxa_device_desc pxa168_device_twsi0; extern struct pxa_device_desc pxa168_device_twsi1; extern struct pxa_device_desc pxa168_device_pwm1; @@ -39,6 +40,7 @@ static inline int pxa168_add_uart(int id) switch (id) { case 1: d = &pxa168_device_uart1; break; case 2: d = &pxa168_device_uart2; break; + case 3: d = &pxa168_device_uart3; break; } if (d == NULL) diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 72b4e76..dcb203b 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -66,6 +66,7 @@ void __init pxa168_init_irq(void) /* APB peripheral clocks */ static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); +static APBC_CLK(uart3, PXA168_UART3, 1, 14745600); static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); @@ -86,6 +87,7 @@ static APMU_CLK(lcd, LCD, 0x7f, 312000000); static struct clk_lookup pxa168_clkregs[] = { INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), + INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), @@ -149,6 +151,7 @@ void pxa168_clear_keypad_wakeup(void) /* on-chip devices */ PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); +PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); -- cgit v0.10.2 From 80def0dc35886328284dfbde525815643882e730 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay Date: Mon, 2 May 2011 11:29:59 +0530 Subject: ARM: pxa168: Add support for Ethernet Add wrapper that creates resources for PXA168 Ethernet driver Signed-off-by: Tanmay Upadhyay Signed-off-by: Eric Miao diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 713be15..8c78232 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h @@ -305,4 +305,23 @@ #define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) #define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) +/* Fast Ethernet */ +#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) +#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) +#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) +#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) +#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) +#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) +#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) +#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) +#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) +#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) +#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) +#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) +#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) +#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) +#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) +#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) +#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) + #endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 705e963..7f00584 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -14,6 +14,7 @@ extern void pxa168_clear_keypad_wakeup(void); #include